Boot log: mt8192-asurada-spherion-r0

    1 23:09:32.147253  lava-dispatcher, installed at version: 2023.10
    2 23:09:32.147488  start: 0 validate
    3 23:09:32.147628  Start time: 2023-12-27 23:09:32.147620+00:00 (UTC)
    4 23:09:32.147769  Using caching service: 'http://localhost/cache/?uri=%s'
    5 23:09:32.147912  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-igt%2F20230623.0%2Farm64%2Frootfs.cpio.gz exists
    6 23:09:32.416192  Using caching service: 'http://localhost/cache/?uri=%s'
    7 23:09:32.416361  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.66-cip11-rt6-10-g38253b8903b4%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
    8 23:09:32.666226  Using caching service: 'http://localhost/cache/?uri=%s'
    9 23:09:32.666394  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.66-cip11-rt6-10-g38253b8903b4%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8192-asurada-spherion-r0.dtb exists
   10 23:09:32.924826  Using caching service: 'http://localhost/cache/?uri=%s'
   11 23:09:32.925081  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.66-cip11-rt6-10-g38253b8903b4%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 23:09:33.177474  validate duration: 1.03
   14 23:09:33.177752  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 23:09:33.177849  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 23:09:33.177936  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 23:09:33.178061  Not decompressing ramdisk as can be used compressed.
   18 23:09:33.178150  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-igt/20230623.0/arm64/rootfs.cpio.gz
   19 23:09:33.178218  saving as /var/lib/lava/dispatcher/tmp/12395387/tftp-deploy-dugec_kp/ramdisk/rootfs.cpio.gz
   20 23:09:33.178282  total size: 43284872 (41 MB)
   21 23:09:33.183753  progress   0 % (0 MB)
   22 23:09:33.195124  progress   5 % (2 MB)
   23 23:09:33.206148  progress  10 % (4 MB)
   24 23:09:33.217304  progress  15 % (6 MB)
   25 23:09:33.228811  progress  20 % (8 MB)
   26 23:09:33.240312  progress  25 % (10 MB)
   27 23:09:33.251926  progress  30 % (12 MB)
   28 23:09:33.263184  progress  35 % (14 MB)
   29 23:09:33.274714  progress  40 % (16 MB)
   30 23:09:33.286073  progress  45 % (18 MB)
   31 23:09:33.297654  progress  50 % (20 MB)
   32 23:09:33.309018  progress  55 % (22 MB)
   33 23:09:33.320423  progress  60 % (24 MB)
   34 23:09:33.332016  progress  65 % (26 MB)
   35 23:09:33.343374  progress  70 % (28 MB)
   36 23:09:33.354724  progress  75 % (30 MB)
   37 23:09:33.365988  progress  80 % (33 MB)
   38 23:09:33.378325  progress  85 % (35 MB)
   39 23:09:33.389789  progress  90 % (37 MB)
   40 23:09:33.401416  progress  95 % (39 MB)
   41 23:09:33.413061  progress 100 % (41 MB)
   42 23:09:33.413334  41 MB downloaded in 0.24 s (175.62 MB/s)
   43 23:09:33.413559  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 23:09:33.413924  end: 1.1 download-retry (duration 00:00:00) [common]
   46 23:09:33.414060  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 23:09:33.414184  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 23:09:33.414361  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.66-cip11-rt6-10-g38253b8903b4/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
   49 23:09:33.414492  saving as /var/lib/lava/dispatcher/tmp/12395387/tftp-deploy-dugec_kp/kernel/Image
   50 23:09:33.414575  total size: 50024960 (47 MB)
   51 23:09:33.414656  No compression specified
   52 23:09:33.415892  progress   0 % (0 MB)
   53 23:09:33.429031  progress   5 % (2 MB)
   54 23:09:33.442063  progress  10 % (4 MB)
   55 23:09:33.455291  progress  15 % (7 MB)
   56 23:09:33.468361  progress  20 % (9 MB)
   57 23:09:33.481343  progress  25 % (11 MB)
   58 23:09:33.494400  progress  30 % (14 MB)
   59 23:09:33.507593  progress  35 % (16 MB)
   60 23:09:33.520607  progress  40 % (19 MB)
   61 23:09:33.533687  progress  45 % (21 MB)
   62 23:09:33.549390  progress  50 % (23 MB)
   63 23:09:33.563858  progress  55 % (26 MB)
   64 23:09:33.576914  progress  60 % (28 MB)
   65 23:09:33.590041  progress  65 % (31 MB)
   66 23:09:33.603100  progress  70 % (33 MB)
   67 23:09:33.616170  progress  75 % (35 MB)
   68 23:09:33.629333  progress  80 % (38 MB)
   69 23:09:33.642539  progress  85 % (40 MB)
   70 23:09:33.655619  progress  90 % (42 MB)
   71 23:09:33.668746  progress  95 % (45 MB)
   72 23:09:33.681737  progress 100 % (47 MB)
   73 23:09:33.681994  47 MB downloaded in 0.27 s (178.40 MB/s)
   74 23:09:33.682175  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 23:09:33.682536  end: 1.2 download-retry (duration 00:00:00) [common]
   77 23:09:33.682643  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 23:09:33.682750  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 23:09:33.682902  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.66-cip11-rt6-10-g38253b8903b4/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8192-asurada-spherion-r0.dtb
   80 23:09:33.683002  saving as /var/lib/lava/dispatcher/tmp/12395387/tftp-deploy-dugec_kp/dtb/mt8192-asurada-spherion-r0.dtb
   81 23:09:33.683102  total size: 47278 (0 MB)
   82 23:09:33.683203  No compression specified
   83 23:09:33.684901  progress  69 % (0 MB)
   84 23:09:33.685241  progress 100 % (0 MB)
   85 23:09:33.685427  0 MB downloaded in 0.00 s (19.41 MB/s)
   86 23:09:33.685595  end: 1.3.1 http-download (duration 00:00:00) [common]
   88 23:09:33.685949  end: 1.3 download-retry (duration 00:00:00) [common]
   89 23:09:33.686062  start: 1.4 download-retry (timeout 00:09:59) [common]
   90 23:09:33.686172  start: 1.4.1 http-download (timeout 00:09:59) [common]
   91 23:09:33.686319  downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.66-cip11-rt6-10-g38253b8903b4/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
   92 23:09:33.686435  saving as /var/lib/lava/dispatcher/tmp/12395387/tftp-deploy-dugec_kp/modules/modules.tar
   93 23:09:33.686519  total size: 8633892 (8 MB)
   94 23:09:33.686581  Using unxz to decompress xz
   95 23:09:33.690890  progress   0 % (0 MB)
   96 23:09:33.711943  progress   5 % (0 MB)
   97 23:09:33.735750  progress  10 % (0 MB)
   98 23:09:33.759757  progress  15 % (1 MB)
   99 23:09:33.783599  progress  20 % (1 MB)
  100 23:09:33.808083  progress  25 % (2 MB)
  101 23:09:33.836000  progress  30 % (2 MB)
  102 23:09:33.860629  progress  35 % (2 MB)
  103 23:09:33.884272  progress  40 % (3 MB)
  104 23:09:33.909084  progress  45 % (3 MB)
  105 23:09:33.935241  progress  50 % (4 MB)
  106 23:09:33.959972  progress  55 % (4 MB)
  107 23:09:33.988154  progress  60 % (4 MB)
  108 23:09:34.014334  progress  65 % (5 MB)
  109 23:09:34.040620  progress  70 % (5 MB)
  110 23:09:34.064864  progress  75 % (6 MB)
  111 23:09:34.092751  progress  80 % (6 MB)
  112 23:09:34.119271  progress  85 % (7 MB)
  113 23:09:34.146392  progress  90 % (7 MB)
  114 23:09:34.176781  progress  95 % (7 MB)
  115 23:09:34.205676  progress 100 % (8 MB)
  116 23:09:34.211607  8 MB downloaded in 0.53 s (15.68 MB/s)
  117 23:09:34.211883  end: 1.4.1 http-download (duration 00:00:01) [common]
  119 23:09:34.212182  end: 1.4 download-retry (duration 00:00:01) [common]
  120 23:09:34.212291  start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
  121 23:09:34.212402  start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
  122 23:09:34.212500  end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
  123 23:09:34.212623  start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
  124 23:09:34.212962  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs
  125 23:09:34.213201  makedir: /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin
  126 23:09:34.213382  makedir: /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/tests
  127 23:09:34.213558  makedir: /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/results
  128 23:09:34.213695  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-add-keys
  129 23:09:34.213865  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-add-sources
  130 23:09:34.214015  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-background-process-start
  131 23:09:34.214241  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-background-process-stop
  132 23:09:34.214439  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-common-functions
  133 23:09:34.214668  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-echo-ipv4
  134 23:09:34.214879  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-install-packages
  135 23:09:34.215041  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-installed-packages
  136 23:09:34.215196  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-os-build
  137 23:09:34.215352  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-probe-channel
  138 23:09:34.215519  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-probe-ip
  139 23:09:34.215658  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-target-ip
  140 23:09:34.215796  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-target-mac
  141 23:09:34.215935  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-target-storage
  142 23:09:34.216114  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-test-case
  143 23:09:34.216254  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-test-event
  144 23:09:34.216404  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-test-feedback
  145 23:09:34.216529  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-test-raise
  146 23:09:34.216681  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-test-reference
  147 23:09:34.216830  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-test-runner
  148 23:09:34.217008  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-test-set
  149 23:09:34.217138  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-test-shell
  150 23:09:34.217293  Updating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-install-packages (oe)
  151 23:09:34.217463  Updating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/bin/lava-installed-packages (oe)
  152 23:09:34.217618  Creating /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/environment
  153 23:09:34.217769  LAVA metadata
  154 23:09:34.217843  - LAVA_JOB_ID=12395387
  155 23:09:34.217908  - LAVA_DISPATCHER_IP=192.168.201.1
  156 23:09:34.218027  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  157 23:09:34.218109  skipped lava-vland-overlay
  158 23:09:34.218183  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  159 23:09:34.218261  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  160 23:09:34.218344  skipped lava-multinode-overlay
  161 23:09:34.218427  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  162 23:09:34.218530  start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
  163 23:09:34.218629  Loading test definitions
  164 23:09:34.218742  start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  165 23:09:34.218820  Using /lava-12395387 at stage 0
  166 23:09:34.219179  uuid=12395387_1.5.2.3.1 testdef=None
  167 23:09:34.219268  end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
  168 23:09:34.219356  start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
  169 23:09:34.219960  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  171 23:09:34.220196  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  172 23:09:34.220880  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  174 23:09:34.221115  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  175 23:09:34.221803  runner path: /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/0/tests/0_igt-kms-mediatek test_uuid 12395387_1.5.2.3.1
  176 23:09:34.222002  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  178 23:09:34.222348  Creating lava-test-runner.conf files
  179 23:09:34.222441  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/12395387/lava-overlay-87hn3mgs/lava-12395387/0 for stage 0
  180 23:09:34.222543  - 0_igt-kms-mediatek
  181 23:09:34.222678  end: 1.5.2.3 test-definition (duration 00:00:00) [common]
  182 23:09:34.222794  start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
  183 23:09:34.229717  end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
  184 23:09:34.229833  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  185 23:09:34.229925  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  186 23:09:34.230013  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  187 23:09:34.230108  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  188 23:09:35.669185  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  189 23:09:35.669584  start: 1.5.4 extract-modules (timeout 00:09:58) [common]
  190 23:09:35.669702  extracting modules file /var/lib/lava/dispatcher/tmp/12395387/tftp-deploy-dugec_kp/modules/modules.tar to /var/lib/lava/dispatcher/tmp/12395387/extract-overlay-ramdisk-tjyp8wx4/ramdisk
  191 23:09:35.907629  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  192 23:09:35.907802  start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
  193 23:09:35.907896  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12395387/compress-overlay-w077q8ty/overlay-1.5.2.4.tar.gz to ramdisk
  194 23:09:35.907970  [common] Applying overlay /var/lib/lava/dispatcher/tmp/12395387/compress-overlay-w077q8ty/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/12395387/extract-overlay-ramdisk-tjyp8wx4/ramdisk
  195 23:09:35.914623  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  196 23:09:35.914737  start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
  197 23:09:35.914827  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  198 23:09:35.914912  start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
  199 23:09:35.914988  Building ramdisk /var/lib/lava/dispatcher/tmp/12395387/extract-overlay-ramdisk-tjyp8wx4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/12395387/extract-overlay-ramdisk-tjyp8wx4/ramdisk
  200 23:09:36.887667  >> 370000 blocks

  201 23:09:42.707978  rename /var/lib/lava/dispatcher/tmp/12395387/extract-overlay-ramdisk-tjyp8wx4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/12395387/tftp-deploy-dugec_kp/ramdisk/ramdisk.cpio.gz
  202 23:09:42.708437  end: 1.5.7 compress-ramdisk (duration 00:00:07) [common]
  203 23:09:42.708555  start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
  204 23:09:42.708672  start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
  205 23:09:42.708779  Calling: 'lzma' '--keep' '/var/lib/lava/dispatcher/tmp/12395387/tftp-deploy-dugec_kp/kernel/Image'
  206 23:09:55.649665  Returned 0 in 12 seconds
  207 23:09:55.750315  mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/12395387/tftp-deploy-dugec_kp/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/12395387/tftp-deploy-dugec_kp/dtb/mt8192-asurada-spherion-r0.dtb -i /var/lib/lava/dispatcher/tmp/12395387/tftp-deploy-dugec_kp/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/12395387/tftp-deploy-dugec_kp/kernel/image.itb
  208 23:09:56.596667  output: FIT description: Kernel Image image with one or more FDT blobs
  209 23:09:56.597071  output: Created:         Wed Dec 27 23:09:56 2023
  210 23:09:56.597175  output:  Image 0 (kernel-1)
  211 23:09:56.597303  output:   Description:  
  212 23:09:56.597394  output:   Created:      Wed Dec 27 23:09:56 2023
  213 23:09:56.597481  output:   Type:         Kernel Image
  214 23:09:56.597569  output:   Compression:  lzma compressed
  215 23:09:56.597656  output:   Data Size:    11480388 Bytes = 11211.32 KiB = 10.95 MiB
  216 23:09:56.597742  output:   Architecture: AArch64
  217 23:09:56.597826  output:   OS:           Linux
  218 23:09:56.597911  output:   Load Address: 0x00000000
  219 23:09:56.597992  output:   Entry Point:  0x00000000
  220 23:09:56.598080  output:   Hash algo:    crc32
  221 23:09:56.598166  output:   Hash value:   a55b2f0b
  222 23:09:56.598252  output:  Image 1 (fdt-1)
  223 23:09:56.598332  output:   Description:  mt8192-asurada-spherion-r0
  224 23:09:56.598440  output:   Created:      Wed Dec 27 23:09:56 2023
  225 23:09:56.598510  output:   Type:         Flat Device Tree
  226 23:09:56.598562  output:   Compression:  uncompressed
  227 23:09:56.598615  output:   Data Size:    47278 Bytes = 46.17 KiB = 0.05 MiB
  228 23:09:56.598668  output:   Architecture: AArch64
  229 23:09:56.598720  output:   Hash algo:    crc32
  230 23:09:56.598772  output:   Hash value:   cc4352de
  231 23:09:56.598824  output:  Image 2 (ramdisk-1)
  232 23:09:56.598875  output:   Description:  unavailable
  233 23:09:56.598927  output:   Created:      Wed Dec 27 23:09:56 2023
  234 23:09:56.598979  output:   Type:         RAMDisk Image
  235 23:09:56.599030  output:   Compression:  Unknown Compression
  236 23:09:56.599082  output:   Data Size:    56433970 Bytes = 55111.30 KiB = 53.82 MiB
  237 23:09:56.599135  output:   Architecture: AArch64
  238 23:09:56.599187  output:   OS:           Linux
  239 23:09:56.599239  output:   Load Address: unavailable
  240 23:09:56.599290  output:   Entry Point:  unavailable
  241 23:09:56.599347  output:   Hash algo:    crc32
  242 23:09:56.599417  output:   Hash value:   e188ce76
  243 23:09:56.599474  output:  Default Configuration: 'conf-1'
  244 23:09:56.599526  output:  Configuration 0 (conf-1)
  245 23:09:56.599579  output:   Description:  mt8192-asurada-spherion-r0
  246 23:09:56.599631  output:   Kernel:       kernel-1
  247 23:09:56.599683  output:   Init Ramdisk: ramdisk-1
  248 23:09:56.599734  output:   FDT:          fdt-1
  249 23:09:56.599786  output:   Loadables:    kernel-1
  250 23:09:56.599837  output: 
  251 23:09:56.600032  end: 1.5.8.1 prepare-fit (duration 00:00:14) [common]
  252 23:09:56.600144  end: 1.5.8 prepare-kernel (duration 00:00:14) [common]
  253 23:09:56.600257  end: 1.5 prepare-tftp-overlay (duration 00:00:22) [common]
  254 23:09:56.600351  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
  255 23:09:56.600428  No LXC device requested
  256 23:09:56.600531  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  257 23:09:56.600648  start: 1.7 deploy-device-env (timeout 00:09:37) [common]
  258 23:09:56.600756  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  259 23:09:56.600852  Checking files for TFTP limit of 4294967296 bytes.
  260 23:09:56.601502  end: 1 tftp-deploy (duration 00:00:23) [common]
  261 23:09:56.601633  start: 2 depthcharge-action (timeout 00:05:00) [common]
  262 23:09:56.601753  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  263 23:09:56.601913  substitutions:
  264 23:09:56.602005  - {DTB}: 12395387/tftp-deploy-dugec_kp/dtb/mt8192-asurada-spherion-r0.dtb
  265 23:09:56.602097  - {INITRD}: 12395387/tftp-deploy-dugec_kp/ramdisk/ramdisk.cpio.gz
  266 23:09:56.602184  - {KERNEL}: 12395387/tftp-deploy-dugec_kp/kernel/Image
  267 23:09:56.602270  - {LAVA_MAC}: None
  268 23:09:56.602355  - {PRESEED_CONFIG}: None
  269 23:09:56.602459  - {PRESEED_LOCAL}: None
  270 23:09:56.602529  - {RAMDISK}: 12395387/tftp-deploy-dugec_kp/ramdisk/ramdisk.cpio.gz
  271 23:09:56.602584  - {ROOT_PART}: None
  272 23:09:56.602638  - {ROOT}: None
  273 23:09:56.602691  - {SERVER_IP}: 192.168.201.1
  274 23:09:56.602744  - {TEE}: None
  275 23:09:56.602796  Parsed boot commands:
  276 23:09:56.602849  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  277 23:09:56.603028  Parsed boot commands: tftpboot 192.168.201.1 12395387/tftp-deploy-dugec_kp/kernel/image.itb 12395387/tftp-deploy-dugec_kp/kernel/cmdline 
  278 23:09:56.603116  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  279 23:09:56.603200  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  280 23:09:56.603296  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  281 23:09:56.603378  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  282 23:09:56.603448  Not connected, no need to disconnect.
  283 23:09:56.603521  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  284 23:09:56.603599  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  285 23:09:56.603661  [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8192-asurada-spherion-r0-cbg-3'
  286 23:09:56.607703  Setting prompt string to ['lava-test: # ']
  287 23:09:56.608124  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  288 23:09:56.608248  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  289 23:09:56.608353  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  290 23:09:56.608502  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  291 23:09:56.608841  Calling: 'pduclient' '--daemon=localhost' '--hostname=mt8192-asurada-spherion-r0-cbg-3' '--port=1' '--command=reboot'
  292 23:10:01.752851  >> Command sent successfully.

  293 23:10:01.764166  Returned 0 in 5 seconds
  294 23:10:01.865582  end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
  296 23:10:01.867949  end: 2.2.2 reset-device (duration 00:00:05) [common]
  297 23:10:01.868766  start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
  298 23:10:01.869480  Setting prompt string to 'Starting depthcharge on Spherion...'
  299 23:10:01.870106  Changing prompt to 'Starting depthcharge on Spherion...'
  300 23:10:01.870740  depthcharge-start: Wait for prompt Starting depthcharge on Spherion... (timeout 00:05:00)
  301 23:10:01.872679  [Enter `^Ec?' for help]

  302 23:10:02.032970  

  303 23:10:02.033626  

  304 23:10:02.034130  F0: 102B 0000

  305 23:10:02.034665  

  306 23:10:02.035017  F3: 1001 0000 [0200]

  307 23:10:02.035326  

  308 23:10:02.036911  F3: 1001 0000

  309 23:10:02.037334  

  310 23:10:02.037669  F7: 102D 0000

  311 23:10:02.037982  

  312 23:10:02.038279  F1: 0000 0000

  313 23:10:02.040054  

  314 23:10:02.040528  V0: 0000 0000 [0001]

  315 23:10:02.040883  

  316 23:10:02.041200  00: 0007 8000

  317 23:10:02.041520  

  318 23:10:02.043687  01: 0000 0000

  319 23:10:02.044146  

  320 23:10:02.044500  BP: 0C00 0209 [0000]

  321 23:10:02.044821  

  322 23:10:02.047852  G0: 1182 0000

  323 23:10:02.048281  

  324 23:10:02.048624  EC: 0000 0021 [4000]

  325 23:10:02.048943  

  326 23:10:02.051794  S7: 0000 0000 [0000]

  327 23:10:02.052222  

  328 23:10:02.052563  CC: 0000 0000 [0001]

  329 23:10:02.052876  

  330 23:10:02.054922  T0: 0000 0040 [010F]

  331 23:10:02.055352  

  332 23:10:02.055740  Jump to BL

  333 23:10:02.056067  

  334 23:10:02.079647  

  335 23:10:02.080096  

  336 23:10:02.080439  

  337 23:10:02.086209  coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 bootblock starting (log level: 8)...

  338 23:10:02.090246  ARM64: Exception handlers installed.

  339 23:10:02.094523  ARM64: Testing exception

  340 23:10:02.098010  ARM64: Done test exception

  341 23:10:02.105713  Backing address range [0x00000000:0x1000000000000) with new page table @0x0010d000

  342 23:10:02.112016  Mapping address range [0x00000000:0x200000000) as     cacheable | read-write |     secure | device

  343 23:10:02.122090  Backing address range [0x00000000:0x8000000000) with new page table @0x0010e000

  344 23:10:02.132249  Mapping address range [0x00100000:0x00120000) as     cacheable | read-write |     secure | normal

  345 23:10:02.139215  Backing address range [0x00000000:0x40000000) with new page table @0x0010f000

  346 23:10:02.145371  Backing address range [0x00000000:0x00200000) with new page table @0x00110000

  347 23:10:02.156671  Mapping address range [0x00200000:0x00300000) as     cacheable | read-write |     secure | normal

  348 23:10:02.162809  Backing address range [0x00200000:0x00400000) with new page table @0x00111000

  349 23:10:02.182339  Mapping address range [0x00114000:0x00115000) as non-cacheable | read-write |     secure | normal

  350 23:10:02.186184  WDT: Last reset was cold boot

  351 23:10:02.188953  SPI1(PAD0) initialized at 2873684 Hz

  352 23:10:02.192402  SPI5(PAD0) initialized at 992727 Hz

  353 23:10:02.195873  VBOOT: Loading verstage.

  354 23:10:02.202732  SF: Detected 00 0000 with sector size 0x1000, total 0x800000

  355 23:10:02.206024  FMAP: Found "FLASH" version 1.1 at 0x20000.

  356 23:10:02.209080  FMAP: base = 0x0 size = 0x800000 #areas = 25

  357 23:10:02.212707  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

  358 23:10:02.219999  CBFS: mcache @0x00107c00 built for 77 files, used 0x1104 of 0x1800 bytes

  359 23:10:02.226291  CBFS: Found 'fallback/verstage' @0x75500 size 0xa1eb in mcache @0x00108150

  360 23:10:02.237248  read SPI 0x96554 0xa1eb: 4591 us, 9028 KB/s, 72.224 Mbps

  361 23:10:02.237681  

  362 23:10:02.238018  

  363 23:10:02.247743  coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 verstage starting (log level: 8)...

  364 23:10:02.251315  ARM64: Exception handlers installed.

  365 23:10:02.253813  ARM64: Testing exception

  366 23:10:02.254279  ARM64: Done test exception

  367 23:10:02.260965  FMAP: area RW_NVRAM found @ 57b000 (8192 bytes)

  368 23:10:02.264648  SF: Detected 00 0000 with sector size 0x1000, total 0x800000

  369 23:10:02.278503  Probing TPM: . done!

  370 23:10:02.279087  TPM ready after 0 ms

  371 23:10:02.283481  Connected to device vid:did:rid of 1ae0:0028:00

  372 23:10:02.295122  Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

  373 23:10:02.349631  Initialized TPM device CR50 revision 0

  374 23:10:02.361555  tlcl_send_startup: Startup return code is 0

  375 23:10:02.361995  TPM: setup succeeded

  376 23:10:02.373050  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0

  377 23:10:02.382442  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  378 23:10:02.395761  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)

  379 23:10:02.402173  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0

  380 23:10:02.405878  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

  381 23:10:02.413632  in-header: 03 07 00 00 08 00 00 00 

  382 23:10:02.417681  in-data: aa e4 47 04 13 02 00 00 

  383 23:10:02.420294  Chrome EC: UHEPI supported

  384 23:10:02.427693  out: cmd=0xa4: 03 4c a4 00 00 00 0c 00 00 01 00 00 00 00 00 00 00 00 00 00 

  385 23:10:02.431249  in-header: 03 ad 00 00 08 00 00 00 

  386 23:10:02.435555  in-data: 00 20 20 08 00 00 00 00 

  387 23:10:02.435984  Phase 1

  388 23:10:02.438840  FMAP: area GBB found @ 3f5000 (12032 bytes)

  389 23:10:02.446460  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7

  390 23:10:02.449895  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7

  391 23:10:02.453431  Recovery requested (1009000e)

  392 23:10:02.462756  TPM: Extending digest for VBOOT: boot mode into PCR 0

  393 23:10:02.468237  tlcl_extend: response is 0

  394 23:10:02.477184  TPM: Extending digest for VBOOT: GBB HWID into PCR 1

  395 23:10:02.483100  tlcl_extend: response is 0

  396 23:10:02.489969  CBFS: Found 'fallback/romstage' @0x80 size 0x2173b in mcache @0x00107c2c

  397 23:10:02.510007  read SPI 0x210d4 0x2173b: 15137 us, 9051 KB/s, 72.408 Mbps

  398 23:10:02.516678  BS: bootblock times (exec / console): total (unknown) / 148 ms

  399 23:10:02.517127  

  400 23:10:02.517473  

  401 23:10:02.526193  coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 romstage starting (log level: 8)...

  402 23:10:02.530517  ARM64: Exception handlers installed.

  403 23:10:02.530963  ARM64: Testing exception

  404 23:10:02.533497  ARM64: Done test exception

  405 23:10:02.555335  pmic_efuse_setting: Set efuses in 11 msecs

  406 23:10:02.559082  pmwrap_interface_init: Select PMIF_VLD_RDY

  407 23:10:02.565352  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M00: 0x1c070c9a

  408 23:10:02.568700  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M01: 0x1c070c9a

  409 23:10:02.575596  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M02: 0x1c070c9a

  410 23:10:02.578890  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M03: 0x1c070c9a

  411 23:10:02.582528  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M04: 0x1c070c9a

  412 23:10:02.589639  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M05: 0x1c070c9a

  413 23:10:02.593442  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M06: 0x1c070c9a

  414 23:10:02.596678  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M07: 0x1c070c9a

  415 23:10:02.600345  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M08: 0xc9c

  416 23:10:02.607762  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M09: 0x1c070c9a

  417 23:10:02.611704  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M10: 0x1c070c9a

  418 23:10:02.615308  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M11: 0xc9c

  419 23:10:02.623281  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M12: 0xc9c

  420 23:10:02.626309  [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M01 FPM SWITCH: 0x1c070c8a

  421 23:10:02.634083  [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M02 FPM SWITCH: 0x1c070c8a

  422 23:10:02.637294  [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M03 FPM SWITCH: 0x1c070c8a

  423 23:10:02.644798  [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M04 FPM SWITCH: 0x1c070c8a

  424 23:10:02.648565  [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M05 FPM SWITCH: 0x1c070c8a

  425 23:10:02.656316  [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M06 FPM SWITCH: 0x1c070c8a

  426 23:10:02.663509  [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M07 FPM SWITCH: 0x1c070c8a

  427 23:10:02.666632  [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M08 FPM SWITCH: 0xc8c

  428 23:10:02.670752  [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M09 FPM SWITCH: 0x1c070c8a

  429 23:10:02.678458  [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M10 FPM SWITCH: 0x1c070c8a

  430 23:10:02.681947  [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M11 FPM SWITCH: 0xc8c

  431 23:10:02.689229  [SRCLKEN_RC]__rc_ctrl_fpm_switch,186: M12 FPM SWITCH: 0xc8c

  432 23:10:02.692859  [SRCLKEN_RC]__rc_ctrl_bblpm_switch,193: M02 BBLPM SWITCH: 0x1c070caa

  433 23:10:02.699962  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M00: 0x1c070c92

  434 23:10:02.703462  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M02: 0x1c070ca2

  435 23:10:02.707877  [SRCLKEN_RC]__rc_ctrl_mode_switch,177: M07: 0x1c070c82

  436 23:10:02.714585  [SRCLKEN_RC]rc_dump_reg_info,132: SRCLKEN_RC_CFG:0x10

  437 23:10:02.718314  [SRCLKEN_RC]rc_dump_reg_info,133: RC_CENTRAL_CFG1:0x401425

  438 23:10:02.725751  [SRCLKEN_RC]rc_dump_reg_info,134: RC_CENTRAL_CFG2:0x1010

  439 23:10:02.729878  [SRCLKEN_RC]rc_dump_reg_info,135: RC_CENTRAL_CFG3:0x400f

  440 23:10:02.733499  [SRCLKEN_RC]rc_dump_reg_info,136: RC_CENTRAL_CFG4:0x20000

  441 23:10:02.740508  [SRCLKEN_RC]rc_dump_reg_info,137: RC_DCXO_FPM_CFG:0x8

  442 23:10:02.743888  [SRCLKEN_RC]rc_dump_reg_info,138: SUBSYS_INTF_CFG:0x1041efb

  443 23:10:02.747390  [SRCLKEN_RC]rc_dump_reg_info,139: RC_SPI_STA_0:0x40010698

  444 23:10:02.755130  [SRCLKEN_RC]rc_dump_reg_info,140: RC_PI_PO_STA:0xd15c3

  445 23:10:02.758834  [SRCLKEN_RC]rc_dump_reg_info,144: M00: 0x1c070c92

  446 23:10:02.762093  [SRCLKEN_RC]rc_dump_reg_info,144: M01: 0x1c070c8a

  447 23:10:02.765826  [SRCLKEN_RC]rc_dump_reg_info,144: M02: 0x1c070ca2

  448 23:10:02.772777  [SRCLKEN_RC]rc_dump_reg_info,144: M03: 0x1c070c8a

  449 23:10:02.776894  [SRCLKEN_RC]rc_dump_reg_info,144: M04: 0x1c070c8a

  450 23:10:02.780569  [SRCLKEN_RC]rc_dump_reg_info,144: M05: 0x1c070c8a

  451 23:10:02.784529  [SRCLKEN_RC]rc_dump_reg_info,144: M06: 0x1c070c8a

  452 23:10:02.788387  [SRCLKEN_RC]rc_dump_reg_info,144: M07: 0x1c070c82

  453 23:10:02.791852  [SRCLKEN_RC]rc_dump_reg_info,144: M08: 0xc8c

  454 23:10:02.795687  [SRCLKEN_RC]rc_dump_reg_info,144: M09: 0x1c070c8a

  455 23:10:02.803070  [SRCLKEN_RC]rc_dump_reg_info,144: M10: 0x1c070c8a

  456 23:10:02.806765  [SRCLKEN_RC]rc_dump_reg_info,144: M11: 0xc8c

  457 23:10:02.810721  [SRCLKEN_RC]rc_dump_reg_info,144: M12: 0xc8c

  458 23:10:02.817591  [CLKBUF]dump_clkbuf_log,60: DCXO_CW00/09/12/13/15/19=0x624d 0x53f0 0x8100 0x4c 0xf0f 0x9248

  459 23:10:02.824986  [CLKBUF]dump_clkbuf_log,71: spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x1 0x1 0x1 0x1 0x1

  460 23:10:02.832285  [CLKBUF]dump_clkbuf_log,74: clk buf vrfck_hv_en=0x0

  461 23:10:02.838990  [CLKBUF]dump_clkbuf_log,60: DCXO_CW00/09/12/13/15/19=0x4005 0x1f0 0x8100 0x4c 0xf0f 0x9248

  462 23:10:02.846583  [CLKBUF]dump_clkbuf_log,71: spi_con1/ldo_rf_op/ldo_bb_op/ldo_rf_en/ldo_bb_en=0x1 0x1 0x1 0x0 0x0

  463 23:10:02.850103  [CLKBUF]dump_clkbuf_log,74: clk buf vrfck_hv_en=0x0

  464 23:10:02.857676  [RTC]rtc_boot,324: PMIC_RG_SCK_TOP_CON0,0x50c:0x1

  465 23:10:02.861730  [RTC]rtc_boot,327: PMIC_RG_SCK_TOP_CON0,0x50c:0x1

  466 23:10:02.868428  [RTC]rtc_enable_dcxo,68: con=0x486, osc32con=0xde6f, sec=0x21

  467 23:10:02.872526  [RTC]rtc_check_state,173: con=486, pwrkey1=a357, pwrkey2=67d2

  468 23:10:02.879947  [RTC]rtc_osc_init,62: osc32con val = 0xde6f

  469 23:10:02.883722  [RTC]rtc_eosc_cali,20: PMIC_RG_FQMTR_CKSEL=0x4a

  470 23:10:02.892675  [RTC]rtc_get_frequency_meter,154: input=15, output=790

  471 23:10:02.901879  [RTC]rtc_get_frequency_meter,154: input=23, output=979

  472 23:10:02.911420  [RTC]rtc_get_frequency_meter,154: input=19, output=884

  473 23:10:02.921073  [RTC]rtc_get_frequency_meter,154: input=17, output=838

  474 23:10:02.930310  [RTC]rtc_get_frequency_meter,154: input=16, output=814

  475 23:10:02.939886  [RTC]rtc_get_frequency_meter,154: input=15, output=789

  476 23:10:02.950193  [RTC]rtc_get_frequency_meter,154: input=16, output=814

  477 23:10:02.954316  [RTC]rtc_eosc_cali,47: left: 15, middle: 15, right: 16

  478 23:10:02.957752  [RTC]rtc_osc_init,66: EOSC32 cali val = 0xde6f

  479 23:10:02.961360  [RTC]rtc_boot_common,202: RTC_STATE_REBOOT

  480 23:10:02.969401  [RTC]rtc_boot_common,220: irqsta=0, bbpu=81, con=486

  481 23:10:02.973310  [RTC]rtc_bbpu_power_on,298: rtc_write_trigger=1

  482 23:10:02.976571  [RTC]rtc_bbpu_power_on,300: done BBPU=0x81

  483 23:10:02.980573  ADC[4]: Raw value=900959 ID=7

  484 23:10:02.981015  ADC[3]: Raw value=213336 ID=1

  485 23:10:02.984220  RAM Code: 0x71

  486 23:10:02.987906  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

  487 23:10:02.991859  SF: Detected 00 0000 with sector size 0x1000, total 0x800000

  488 23:10:02.999310  CBFS: Found 'sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE' @0x75280 size 0x8 in mcache @0x00108014

  489 23:10:03.006874  DRAM-K: ddr_type: DSC, config_dvfs: 1, ddr_geometry: 2CH_2RK_8GB_4_4_BYTE

  490 23:10:03.010441  out: cmd=0xd: 03 f0 0d 00 00 00 00 00 

  491 23:10:03.014562  in-header: 03 07 00 00 08 00 00 00 

  492 23:10:03.017433  in-data: aa e4 47 04 13 02 00 00 

  493 23:10:03.021851  Chrome EC: UHEPI supported

  494 23:10:03.028571  out: cmd=0xa4: 03 4c a4 00 00 00 0c 00 00 01 00 00 00 00 00 00 00 00 00 00 

  495 23:10:03.032558  in-header: 03 ed 00 00 08 00 00 00 

  496 23:10:03.036300  in-data: 80 20 60 08 00 00 00 00 

  497 23:10:03.036748  MRC: failed to locate region type 0.

  498 23:10:03.043476  DRAM-K: Invalid data in flash (size: 0xffffffffffffffff, expected: 0xcf0)

  499 23:10:03.047208  DRAM-K: Running full calibration

  500 23:10:03.055058  DRAM-K: ddr_type: DSC, config_dvfs: 1, ddr_geometry: 2CH_2RK_8GB_4_4_BYTE

  501 23:10:03.055599  header.status = 0x0

  502 23:10:03.058478  header.version = 0x6 (expected: 0x6)

  503 23:10:03.062070  header.size = 0xd00 (expected: 0xd00)

  504 23:10:03.062486  header.flags = 0x0

  505 23:10:03.069458  CBFS: Found 'fallback/dram' @0x51540 size 0x1c583 in mcache @0x00107e40

  506 23:10:03.087422  read SPI 0x72590 0x1c583: 12500 us, 9287 KB/s, 74.296 Mbps

  507 23:10:03.094579  dram_init: MediaTek DRAM firmware version: 1.6.3, accepting param version 6

  508 23:10:03.098328  dram_init: ddr_geometry: 2

  509 23:10:03.098697  [EMI] MDL number = 2

  510 23:10:03.102144  [EMI] Get MDL freq = 0

  511 23:10:03.102484  dram_init: ddr_type: 0

  512 23:10:03.105538  is_discrete_lpddr4: 1

  513 23:10:03.108924  [Set_DRAM_Pinmux_Sel] DRAMPinmux = 0

  514 23:10:03.109227  

  515 23:10:03.109505  

  516 23:10:03.113229  [Bian_co] ETT version 0.0.0.1

  517 23:10:03.116478   dram_type 6, R0 cbt_mode 1, R1 cbt_mode 1 VENDOR=6

  518 23:10:03.116876  

  519 23:10:03.120216  dramc_set_vcore_voltage set vcore to 650000

  520 23:10:03.124355  Read voltage for 800, 4

  521 23:10:03.124656  Vio18 = 0

  522 23:10:03.124902  Vcore = 650000

  523 23:10:03.125133  Vdram = 0

  524 23:10:03.127685  Vddq = 0

  525 23:10:03.127988  Vmddr = 0

  526 23:10:03.131701  dram_init: config_dvfs: 1

  527 23:10:03.135476  [FAST_K] DramcSave_Time_For_Cal_Init SHU6, femmc_Ready=0

  528 23:10:03.138660  [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0

  529 23:10:03.142480  [SwImpedanceCal] DRVP=7, DRVN=17, ODTN=10

  530 23:10:03.147180  freq_region=0, Reg: DRVP=7, DRVN=17, ODTN=10

  531 23:10:03.149960  [SwImpedanceCal] DRVP=12, DRVN=25, ODTN=9

  532 23:10:03.157132  freq_region=1, Reg: DRVP=12, DRVN=25, ODTN=9

  533 23:10:03.157529  MEM_TYPE=3, freq_sel=18

  534 23:10:03.159850  sv_algorithm_assistance_LP4_1600 

  535 23:10:03.163252  ============ PULL DRAM RESETB DOWN ============

  536 23:10:03.170003  ========== PULL DRAM RESETB DOWN end =========

  537 23:10:03.173250  [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2

  538 23:10:03.176509  =================================== 

  539 23:10:03.180241  LPDDR4 DRAM CONFIGURATION

  540 23:10:03.183639  =================================== 

  541 23:10:03.183957  EX_ROW_EN[0]    = 0x0

  542 23:10:03.186534  EX_ROW_EN[1]    = 0x0

  543 23:10:03.186841  LP4Y_EN      = 0x0

  544 23:10:03.190251  WORK_FSP     = 0x0

  545 23:10:03.190645  WL           = 0x2

  546 23:10:03.193478  RL           = 0x2

  547 23:10:03.193907  BL           = 0x2

  548 23:10:03.197038  RPST         = 0x0

  549 23:10:03.197438  RD_PRE       = 0x0

  550 23:10:03.200549  WR_PRE       = 0x1

  551 23:10:03.203630  WR_PST       = 0x0

  552 23:10:03.203938  DBI_WR       = 0x0

  553 23:10:03.206891  DBI_RD       = 0x0

  554 23:10:03.207197  OTF          = 0x1

  555 23:10:03.210613  =================================== 

  556 23:10:03.213938  =================================== 

  557 23:10:03.214247  ANA top config

  558 23:10:03.216855  =================================== 

  559 23:10:03.220834  DLL_ASYNC_EN            =  0

  560 23:10:03.224154  ALL_SLAVE_EN            =  1

  561 23:10:03.227237  NEW_RANK_MODE           =  1

  562 23:10:03.227546  DLL_IDLE_MODE           =  1

  563 23:10:03.230502  LP45_APHY_COMB_EN       =  1

  564 23:10:03.234024  TX_ODT_DIS              =  1

  565 23:10:03.236894  NEW_8X_MODE             =  1

  566 23:10:03.240711  =================================== 

  567 23:10:03.244141  =================================== 

  568 23:10:03.247422  data_rate                  = 1600

  569 23:10:03.247739  CKR                        = 1

  570 23:10:03.250348  DQ_P2S_RATIO               = 8

  571 23:10:03.254389  =================================== 

  572 23:10:03.257337  CA_P2S_RATIO               = 8

  573 23:10:03.260625  DQ_CA_OPEN                 = 0

  574 23:10:03.264066  DQ_SEMI_OPEN               = 0

  575 23:10:03.267104  CA_SEMI_OPEN               = 0

  576 23:10:03.267411  CA_FULL_RATE               = 0

  577 23:10:03.270620  DQ_CKDIV4_EN               = 1

  578 23:10:03.273781  CA_CKDIV4_EN               = 1

  579 23:10:03.277374  CA_PREDIV_EN               = 0

  580 23:10:03.280597  PH8_DLY                    = 0

  581 23:10:03.280903  SEMI_OPEN_CA_PICK_MCK_RATIO= 0

  582 23:10:03.284051  DQ_AAMCK_DIV               = 4

  583 23:10:03.288038  CA_AAMCK_DIV               = 4

  584 23:10:03.291308  CA_ADMCK_DIV               = 4

  585 23:10:03.293918  DQ_TRACK_CA_EN             = 0

  586 23:10:03.297290  CA_PICK                    = 800

  587 23:10:03.300800  CA_MCKIO                   = 800

  588 23:10:03.301109  MCKIO_SEMI                 = 0

  589 23:10:03.304735  PLL_FREQ                   = 3068

  590 23:10:03.308559  DQ_UI_PI_RATIO             = 32

  591 23:10:03.311710  CA_UI_PI_RATIO             = 0

  592 23:10:03.315699  =================================== 

  593 23:10:03.316008  =================================== 

  594 23:10:03.319402  memory_type:LPDDR4         

  595 23:10:03.323271  GP_NUM     : 10       

  596 23:10:03.323577  SRAM_EN    : 1       

  597 23:10:03.327062  MD32_EN    : 0       

  598 23:10:03.330988  =================================== 

  599 23:10:03.331294  [ANA_INIT] >>>>>>>>>>>>>> 

  600 23:10:03.334475  <<<<<< [CONFIGURE PHASE]: ANA_TX

  601 23:10:03.338183  >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL

  602 23:10:03.341573  =================================== 

  603 23:10:03.344858  data_rate = 1600,PCW = 0X7600

  604 23:10:03.348300  =================================== 

  605 23:10:03.352062  <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL

  606 23:10:03.355183  >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration

  607 23:10:03.362139  <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration

  608 23:10:03.364925  >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2

  609 23:10:03.368789  >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL

  610 23:10:03.372043  <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL

  611 23:10:03.374819  [ANA_INIT] flow start 

  612 23:10:03.378568  [ANA_INIT] PLL >>>>>>>> 

  613 23:10:03.378876  [ANA_INIT] PLL <<<<<<<< 

  614 23:10:03.381809  [ANA_INIT] MIDPI >>>>>>>> 

  615 23:10:03.385233  [ANA_INIT] MIDPI <<<<<<<< 

  616 23:10:03.385542  [ANA_INIT] DLL >>>>>>>> 

  617 23:10:03.388823  [ANA_INIT] flow end 

  618 23:10:03.392473  ============ LP4 DIFF to SE enter ============

  619 23:10:03.395616  ============ LP4 DIFF to SE exit  ============

  620 23:10:03.398994  [ANA_INIT] <<<<<<<<<<<<< 

  621 23:10:03.402728  [Flow] Enable top DCM control >>>>> 

  622 23:10:03.405352  [Flow] Enable top DCM control <<<<< 

  623 23:10:03.409114  Enable DLL master slave shuffle 

  624 23:10:03.415293  ============================================================== 

  625 23:10:03.415602  Gating Mode config

  626 23:10:03.422068  ============================================================== 

  627 23:10:03.422446  Config description: 

  628 23:10:03.432580  RX_GATING_MODE        0: Pulse Mode      1: Burst Mode(8UI)        2: Burst Mode(7UI)  3: Original Burst Mode

  629 23:10:03.439467  RX_GATING_TRACK_MODE  0: Valid DLY Mode  1: Valid Mode (-like) 2: FIFO mode

  630 23:10:03.445703  SELPH_MODE            0: By rank         1: By Phase 

  631 23:10:03.448640  ============================================================== 

  632 23:10:03.452032  GAT_TRACK_EN                 =  1

  633 23:10:03.455571  RX_GATING_MODE               =  2

  634 23:10:03.459045  RX_GATING_TRACK_MODE         =  2

  635 23:10:03.461938  SELPH_MODE                   =  1

  636 23:10:03.465956  PICG_EARLY_EN                =  1

  637 23:10:03.468799  VALID_LAT_VALUE              =  1

  638 23:10:03.472349  ============================================================== 

  639 23:10:03.475938  Enter into Gating configuration >>>> 

  640 23:10:03.479701  Exit from Gating configuration <<<< 

  641 23:10:03.482214  Enter into  DVFS_PRE_config >>>>> 

  642 23:10:03.495843  Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL. 

  643 23:10:03.496373  Exit from  DVFS_PRE_config <<<<< 

  644 23:10:03.500024  Enter into PICG configuration >>>> 

  645 23:10:03.502866  Exit from PICG configuration <<<< 

  646 23:10:03.505808  [RX_INPUT] configuration >>>>> 

  647 23:10:03.509275  [RX_INPUT] configuration <<<<< 

  648 23:10:03.516183  [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>

  649 23:10:03.519507  [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<

  650 23:10:03.526896  [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>

  651 23:10:03.533122  [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<

  652 23:10:03.540509  [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>

  653 23:10:03.543208  [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<

  654 23:10:03.549961  [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0 

  655 23:10:03.553924  [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0 

  656 23:10:03.556748  [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0 

  657 23:10:03.560451  [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0 

  658 23:10:03.563362  [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0 

  659 23:10:03.570883  [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2

  660 23:10:03.574124  =================================== 

  661 23:10:03.574604  LPDDR4 DRAM CONFIGURATION

  662 23:10:03.577305  =================================== 

  663 23:10:03.580563  EX_ROW_EN[0]    = 0x0

  664 23:10:03.584233  EX_ROW_EN[1]    = 0x0

  665 23:10:03.584662  LP4Y_EN      = 0x0

  666 23:10:03.587491  WORK_FSP     = 0x0

  667 23:10:03.587920  WL           = 0x2

  668 23:10:03.591027  RL           = 0x2

  669 23:10:03.591455  BL           = 0x2

  670 23:10:03.594392  RPST         = 0x0

  671 23:10:03.594875  RD_PRE       = 0x0

  672 23:10:03.597633  WR_PRE       = 0x1

  673 23:10:03.598064  WR_PST       = 0x0

  674 23:10:03.601229  DBI_WR       = 0x0

  675 23:10:03.601659  DBI_RD       = 0x0

  676 23:10:03.604954  OTF          = 0x1

  677 23:10:03.607551  =================================== 

  678 23:10:03.610709  [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0 

  679 23:10:03.614499  [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0 

  680 23:10:03.617769  [ModeRegister RLWL Config] data_rate:1600-MR2_RLWL:2

  681 23:10:03.621093  =================================== 

  682 23:10:03.624069  LPDDR4 DRAM CONFIGURATION

  683 23:10:03.627753  =================================== 

  684 23:10:03.630982  EX_ROW_EN[0]    = 0x10

  685 23:10:03.631411  EX_ROW_EN[1]    = 0x0

  686 23:10:03.634368  LP4Y_EN      = 0x0

  687 23:10:03.634971  WORK_FSP     = 0x0

  688 23:10:03.637916  WL           = 0x2

  689 23:10:03.638480  RL           = 0x2

  690 23:10:03.641398  BL           = 0x2

  691 23:10:03.641828  RPST         = 0x0

  692 23:10:03.644732  RD_PRE       = 0x0

  693 23:10:03.645277  WR_PRE       = 0x1

  694 23:10:03.647519  WR_PST       = 0x0

  695 23:10:03.647981  DBI_WR       = 0x0

  696 23:10:03.650911  DBI_RD       = 0x0

  697 23:10:03.654934  OTF          = 0x1

  698 23:10:03.655480  =================================== 

  699 23:10:03.661032  [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit

  700 23:10:03.665750  nWR fixed to 40

  701 23:10:03.669340  [ModeRegInit_LP4] CH0 RK0

  702 23:10:03.669785  [ModeRegInit_LP4] CH0 RK1

  703 23:10:03.672955  [ModeRegInit_LP4] CH1 RK0

  704 23:10:03.676667  [ModeRegInit_LP4] CH1 RK1

  705 23:10:03.677127  match AC timing 13

  706 23:10:03.682973  dramType 5, freq 800, readDBI 0, DivMode 1, cbtMode 1

  707 23:10:03.686244  SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON

  708 23:10:03.689440  [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8

  709 23:10:03.696237  [TX_path_calculate] data rate=1600, WL=8, DQS_TotalUI=17

  710 23:10:03.700160  [TX_path_calculate] DQS = (2,1) DQS_OE = (1,6)

  711 23:10:03.700592  [EMI DOE] emi_dcm 0

  712 23:10:03.706566  [UpdateDFSTbltoDDR3200] Get Highest Freq is 1600

  713 23:10:03.707004  ==

  714 23:10:03.709988  Dram Type= 6, Freq= 0, CH_0, rank 0

  715 23:10:03.713196  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

  716 23:10:03.713660  ==

  717 23:10:03.720397  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

  718 23:10:03.723162  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34

  719 23:10:03.733099  [CA 0] Center 37 (7~68) winsize 62

  720 23:10:03.736977  [CA 1] Center 37 (6~68) winsize 63

  721 23:10:03.740022  [CA 2] Center 35 (5~66) winsize 62

  722 23:10:03.743226  [CA 3] Center 34 (4~65) winsize 62

  723 23:10:03.746757  [CA 4] Center 34 (3~65) winsize 63

  724 23:10:03.749912  [CA 5] Center 33 (3~64) winsize 62

  725 23:10:03.750443  

  726 23:10:03.754209  [CmdBusTrainingLP45] Vref(ca) range 1: 34

  727 23:10:03.754817  

  728 23:10:03.757179  [CATrainingPosCal] consider 1 rank data

  729 23:10:03.760010  u2DelayCellTimex100 = 270/100 ps

  730 23:10:03.763705  CA0 delay=37 (7~68),Diff = 4 PI (28 cell)

  731 23:10:03.767722  CA1 delay=37 (6~68),Diff = 4 PI (28 cell)

  732 23:10:03.774008  CA2 delay=35 (5~66),Diff = 2 PI (14 cell)

  733 23:10:03.776977  CA3 delay=34 (4~65),Diff = 1 PI (7 cell)

  734 23:10:03.780179  CA4 delay=34 (3~65),Diff = 1 PI (7 cell)

  735 23:10:03.783944  CA5 delay=33 (3~64),Diff = 0 PI (0 cell)

  736 23:10:03.784394  

  737 23:10:03.786891  CA PerBit enable=1, Macro0, CA PI delay=33

  738 23:10:03.787337  

  739 23:10:03.790576  [CBTSetCACLKResult] CA Dly = 33

  740 23:10:03.791026  CS Dly: 5 (0~36)

  741 23:10:03.791479  ==

  742 23:10:03.793915  Dram Type= 6, Freq= 0, CH_0, rank 1

  743 23:10:03.800982  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

  744 23:10:03.801569  ==

  745 23:10:03.804043  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

  746 23:10:03.810535  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34

  747 23:10:03.819435  [CA 0] Center 37 (6~68) winsize 63

  748 23:10:03.822875  [CA 1] Center 37 (7~68) winsize 62

  749 23:10:03.826228  [CA 2] Center 35 (5~66) winsize 62

  750 23:10:03.829524  [CA 3] Center 35 (5~65) winsize 61

  751 23:10:03.832858  [CA 4] Center 34 (3~65) winsize 63

  752 23:10:03.836099  [CA 5] Center 33 (3~64) winsize 62

  753 23:10:03.836333  

  754 23:10:03.839707  [CmdBusTrainingLP45] Vref(ca) range 1: 34

  755 23:10:03.839885  

  756 23:10:03.843304  [CATrainingPosCal] consider 2 rank data

  757 23:10:03.846386  u2DelayCellTimex100 = 270/100 ps

  758 23:10:03.849630  CA0 delay=37 (7~68),Diff = 4 PI (28 cell)

  759 23:10:03.853162  CA1 delay=37 (7~68),Diff = 4 PI (28 cell)

  760 23:10:03.856081  CA2 delay=35 (5~66),Diff = 2 PI (14 cell)

  761 23:10:03.863399  CA3 delay=35 (5~65),Diff = 2 PI (14 cell)

  762 23:10:03.866620  CA4 delay=34 (3~65),Diff = 1 PI (7 cell)

  763 23:10:03.870540  CA5 delay=33 (3~64),Diff = 0 PI (0 cell)

  764 23:10:03.870624  

  765 23:10:03.873079  CA PerBit enable=1, Macro0, CA PI delay=33

  766 23:10:03.873163  

  767 23:10:03.876266  [CBTSetCACLKResult] CA Dly = 33

  768 23:10:03.876367  CS Dly: 5 (0~37)

  769 23:10:03.876467  

  770 23:10:03.879460  ----->DramcWriteLeveling(PI) begin...

  771 23:10:03.879549  ==

  772 23:10:03.883119  Dram Type= 6, Freq= 0, CH_0, rank 0

  773 23:10:03.890561  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

  774 23:10:03.890647  ==

  775 23:10:03.890714  Write leveling (Byte 0): 32 => 32

  776 23:10:03.893963  Write leveling (Byte 1): 28 => 28

  777 23:10:03.897929  DramcWriteLeveling(PI) end<-----

  778 23:10:03.898015  

  779 23:10:03.898082  ==

  780 23:10:03.901307  Dram Type= 6, Freq= 0, CH_0, rank 0

  781 23:10:03.904591  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

  782 23:10:03.904683  ==

  783 23:10:03.907689  [Gating] SW mode calibration

  784 23:10:03.915926  [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0

  785 23:10:03.922270  RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)

  786 23:10:03.925237   0  6  0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)

  787 23:10:03.928561   0  6  4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)

  788 23:10:03.935318   0  6  8 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 0)

  789 23:10:03.938659   0  6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  790 23:10:03.941703   0  6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  791 23:10:03.948664   0  6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  792 23:10:03.951877   0  6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  793 23:10:03.955273   0  6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  794 23:10:03.962064   0  7  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  795 23:10:03.965134   0  7  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  796 23:10:03.969347   0  7  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  797 23:10:03.971884   0  7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  798 23:10:03.978638   0  7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  799 23:10:03.982163   0  7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  800 23:10:03.985831   0  7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  801 23:10:03.992732   0  7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  802 23:10:03.995720   0  8  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  803 23:10:03.999343   0  8  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 1)

  804 23:10:04.005839   0  8  8 | B1->B0 | 2323 2323 | 0 0 | (0 1) (0 1)

  805 23:10:04.009313   0  8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  806 23:10:04.012697   0  8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  807 23:10:04.015888   0  8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  808 23:10:04.022741   0  8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  809 23:10:04.026194   0  8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  810 23:10:04.029468   0  9  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  811 23:10:04.036218   0  9  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  812 23:10:04.039809   0  9  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  813 23:10:04.042849   0  9 12 | B1->B0 | 2525 2f2f | 0 0 | (0 0) (0 0)

  814 23:10:04.049517   0  9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

  815 23:10:04.052983   0  9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

  816 23:10:04.056326   0  9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

  817 23:10:04.063127   0  9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

  818 23:10:04.066301   0 10  0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

  819 23:10:04.069811   0 10  4 | B1->B0 | 3434 3434 | 1 1 | (1 0) (1 0)

  820 23:10:04.076613   0 10  8 | B1->B0 | 3434 3030 | 0 1 | (0 0) (1 0)

  821 23:10:04.079896   0 10 12 | B1->B0 | 2c2c 2626 | 0 0 | (0 1) (0 0)

  822 23:10:04.082883   0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  823 23:10:04.086385   0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  824 23:10:04.092995   0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  825 23:10:04.096539   0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  826 23:10:04.100060   0 11  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  827 23:10:04.106638   0 11  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

  828 23:10:04.109563   0 11  8 | B1->B0 | 2323 2b2b | 0 1 | (0 0) (0 0)

  829 23:10:04.112982   0 11 12 | B1->B0 | 3737 4444 | 0 0 | (0 0) (0 0)

  830 23:10:04.120120   0 11 16 | B1->B0 | 4545 4646 | 0 0 | (0 0) (0 0)

  831 23:10:04.123354   0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

  832 23:10:04.127139   0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

  833 23:10:04.133363   0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

  834 23:10:04.137062   0 12  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

  835 23:10:04.140400   0 12  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

  836 23:10:04.143762   0 12  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

  837 23:10:04.150303   0 12 12 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)

  838 23:10:04.153393   0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

  839 23:10:04.156704   0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

  840 23:10:04.163559   0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

  841 23:10:04.166637   0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

  842 23:10:04.170526   0 13  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

  843 23:10:04.176830   0 13  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

  844 23:10:04.180046   0 13  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

  845 23:10:04.183297   0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

  846 23:10:04.190426   0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

  847 23:10:04.193852   0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

  848 23:10:04.197318   0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

  849 23:10:04.203473   0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

  850 23:10:04.206934   0 14  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

  851 23:10:04.210255   0 14  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

  852 23:10:04.214017   0 14  8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)

  853 23:10:04.217172  Total UI for P1: 0, mck2ui 16

  854 23:10:04.220628  best dqsien dly found for B0: ( 0, 14,  4)

  855 23:10:04.227166   0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

  856 23:10:04.227251  Total UI for P1: 0, mck2ui 16

  857 23:10:04.234520  best dqsien dly found for B1: ( 0, 14,  8)

  858 23:10:04.237406  best DQS0 dly(MCK, UI, PI) = (0, 14, 4)

  859 23:10:04.240662  best DQS1 dly(MCK, UI, PI) = (0, 14, 8)

  860 23:10:04.240745  

  861 23:10:04.244094  best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 4)

  862 23:10:04.247237  best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 8)

  863 23:10:04.250677  [Gating] SW calibration Done

  864 23:10:04.250761  ==

  865 23:10:04.254252  Dram Type= 6, Freq= 0, CH_0, rank 0

  866 23:10:04.257701  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

  867 23:10:04.257786  ==

  868 23:10:04.260587  RX Vref Scan: 0

  869 23:10:04.260671  

  870 23:10:04.260737  RX Vref 0 -> 0, step: 1

  871 23:10:04.260800  

  872 23:10:04.264364  RX Delay -130 -> 252, step: 16

  873 23:10:04.267462  iDelay=222, Bit 0, Center 85 (-34 ~ 205) 240

  874 23:10:04.270946  iDelay=222, Bit 1, Center 85 (-34 ~ 205) 240

  875 23:10:04.277571  iDelay=222, Bit 2, Center 85 (-34 ~ 205) 240

  876 23:10:04.280860  iDelay=222, Bit 3, Center 85 (-34 ~ 205) 240

  877 23:10:04.284546  iDelay=222, Bit 4, Center 85 (-34 ~ 205) 240

  878 23:10:04.287933  iDelay=222, Bit 5, Center 69 (-50 ~ 189) 240

  879 23:10:04.291363  iDelay=222, Bit 6, Center 93 (-34 ~ 221) 256

  880 23:10:04.297814  iDelay=222, Bit 7, Center 93 (-18 ~ 205) 224

  881 23:10:04.301307  iDelay=222, Bit 8, Center 69 (-50 ~ 189) 240

  882 23:10:04.304330  iDelay=222, Bit 9, Center 69 (-50 ~ 189) 240

  883 23:10:04.307934  iDelay=222, Bit 10, Center 77 (-34 ~ 189) 224

  884 23:10:04.311123  iDelay=222, Bit 11, Center 77 (-34 ~ 189) 224

  885 23:10:04.318087  iDelay=222, Bit 12, Center 85 (-34 ~ 205) 240

  886 23:10:04.321260  iDelay=222, Bit 13, Center 85 (-34 ~ 205) 240

  887 23:10:04.324964  iDelay=222, Bit 14, Center 85 (-34 ~ 205) 240

  888 23:10:04.327778  iDelay=222, Bit 15, Center 85 (-34 ~ 205) 240

  889 23:10:04.327863  ==

  890 23:10:04.331744  Dram Type= 6, Freq= 0, CH_0, rank 0

  891 23:10:04.334841  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

  892 23:10:04.338175  ==

  893 23:10:04.338260  DQS Delay:

  894 23:10:04.338327  DQS0 = 0, DQS1 = 0

  895 23:10:04.341619  DQM Delay:

  896 23:10:04.341703  DQM0 = 85, DQM1 = 79

  897 23:10:04.345575  DQ Delay:

  898 23:10:04.345658  DQ0 =85, DQ1 =85, DQ2 =85, DQ3 =85

  899 23:10:04.348183  DQ4 =85, DQ5 =69, DQ6 =93, DQ7 =93

  900 23:10:04.351514  DQ8 =69, DQ9 =69, DQ10 =77, DQ11 =77

  901 23:10:04.354707  DQ12 =85, DQ13 =85, DQ14 =85, DQ15 =85

  902 23:10:04.354791  

  903 23:10:04.354858  

  904 23:10:04.358436  ==

  905 23:10:04.361537  Dram Type= 6, Freq= 0, CH_0, rank 0

  906 23:10:04.364797  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

  907 23:10:04.364881  ==

  908 23:10:04.364947  

  909 23:10:04.365008  

  910 23:10:04.368072  	TX Vref Scan disable

  911 23:10:04.368156   == TX Byte 0 ==

  912 23:10:04.371290  Update DQ  dly =584 (2 ,1, 40)  DQ  OEN =(1 ,6)

  913 23:10:04.378520  Update DQM dly =584 (2 ,1, 40)  DQM OEN =(1 ,6)

  914 23:10:04.378604   == TX Byte 1 ==

  915 23:10:04.381418  Update DQ  dly =578 (2 ,1, 34)  DQ  OEN =(1 ,6)

  916 23:10:04.388302  Update DQM dly =578 (2 ,1, 34)  DQM OEN =(1 ,6)

  917 23:10:04.388385  ==

  918 23:10:04.391406  Dram Type= 6, Freq= 0, CH_0, rank 0

  919 23:10:04.395126  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

  920 23:10:04.395210  ==

  921 23:10:04.408688  TX Vref=22, minBit 7, minWin=27, winSum=442

  922 23:10:04.412127  TX Vref=24, minBit 7, minWin=27, winSum=444

  923 23:10:04.415065  TX Vref=26, minBit 12, minWin=27, winSum=451

  924 23:10:04.418731  TX Vref=28, minBit 5, minWin=27, winSum=453

  925 23:10:04.422082  TX Vref=30, minBit 3, minWin=28, winSum=456

  926 23:10:04.428469  TX Vref=32, minBit 12, minWin=27, winSum=452

  927 23:10:04.432454  [TxChooseVref] Worse bit 3, Min win 28, Win sum 456, Final Vref 30

  928 23:10:04.432619  

  929 23:10:04.435557  Final TX Range 1 Vref 30

  930 23:10:04.435642  

  931 23:10:04.435708  ==

  932 23:10:04.438572  Dram Type= 6, Freq= 0, CH_0, rank 0

  933 23:10:04.442632  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

  934 23:10:04.442717  ==

  935 23:10:04.445686  

  936 23:10:04.445770  

  937 23:10:04.445836  	TX Vref Scan disable

  938 23:10:04.449165   == TX Byte 0 ==

  939 23:10:04.452285  Update DQ  dly =583 (2 ,1, 39)  DQ  OEN =(1 ,6)

  940 23:10:04.455656  Update DQM dly =583 (2 ,1, 39)  DQM OEN =(1 ,6)

  941 23:10:04.458904   == TX Byte 1 ==

  942 23:10:04.462178  Update DQ  dly =578 (2 ,1, 34)  DQ  OEN =(1 ,6)

  943 23:10:04.465432  Update DQM dly =578 (2 ,1, 34)  DQM OEN =(1 ,6)

  944 23:10:04.468900  

  945 23:10:04.468982  [DATLAT]

  946 23:10:04.469049  Freq=800, CH0 RK0

  947 23:10:04.469111  

  948 23:10:04.472023  DATLAT Default: 0xa

  949 23:10:04.472106  0, 0xFFFF, sum = 0

  950 23:10:04.475578  1, 0xFFFF, sum = 0

  951 23:10:04.475666  2, 0xFFFF, sum = 0

  952 23:10:04.478995  3, 0xFFFF, sum = 0

  953 23:10:04.479079  4, 0xFFFF, sum = 0

  954 23:10:04.481980  5, 0xFFFF, sum = 0

  955 23:10:04.482074  6, 0xFFFF, sum = 0

  956 23:10:04.485954  7, 0xFFFF, sum = 0

  957 23:10:04.486068  8, 0xFFFF, sum = 0

  958 23:10:04.488879  9, 0x0, sum = 1

  959 23:10:04.488964  10, 0x0, sum = 2

  960 23:10:04.492336  11, 0x0, sum = 3

  961 23:10:04.492420  12, 0x0, sum = 4

  962 23:10:04.495728  best_step = 10

  963 23:10:04.495811  

  964 23:10:04.495876  ==

  965 23:10:04.499336  Dram Type= 6, Freq= 0, CH_0, rank 0

  966 23:10:04.502344  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

  967 23:10:04.502466  ==

  968 23:10:04.505966  RX Vref Scan: 1

  969 23:10:04.506049  

  970 23:10:04.506143  Set Vref Range= 32 -> 127

  971 23:10:04.506205  

  972 23:10:04.508978  RX Vref 32 -> 127, step: 1

  973 23:10:04.509062  

  974 23:10:04.512698  RX Delay -95 -> 252, step: 8

  975 23:10:04.512782  

  976 23:10:04.516228  Set Vref, RX VrefLevel [Byte0]: 32

  977 23:10:04.519073                           [Byte1]: 32

  978 23:10:04.519156  

  979 23:10:04.522706  Set Vref, RX VrefLevel [Byte0]: 33

  980 23:10:04.526351                           [Byte1]: 33

  981 23:10:04.526457  

  982 23:10:04.529964  Set Vref, RX VrefLevel [Byte0]: 34

  983 23:10:04.533439                           [Byte1]: 34

  984 23:10:04.536935  

  985 23:10:04.537049  Set Vref, RX VrefLevel [Byte0]: 35

  986 23:10:04.539782                           [Byte1]: 35

  987 23:10:04.544539  

  988 23:10:04.544625  Set Vref, RX VrefLevel [Byte0]: 36

  989 23:10:04.547304                           [Byte1]: 36

  990 23:10:04.551877  

  991 23:10:04.551960  Set Vref, RX VrefLevel [Byte0]: 37

  992 23:10:04.555629                           [Byte1]: 37

  993 23:10:04.559875  

  994 23:10:04.559958  Set Vref, RX VrefLevel [Byte0]: 38

  995 23:10:04.563283                           [Byte1]: 38

  996 23:10:04.567078  

  997 23:10:04.567162  Set Vref, RX VrefLevel [Byte0]: 39

  998 23:10:04.570762                           [Byte1]: 39

  999 23:10:04.574611  

 1000 23:10:04.574698  Set Vref, RX VrefLevel [Byte0]: 40

 1001 23:10:04.577893                           [Byte1]: 40

 1002 23:10:04.582840  

 1003 23:10:04.582923  Set Vref, RX VrefLevel [Byte0]: 41

 1004 23:10:04.585551                           [Byte1]: 41

 1005 23:10:04.590138  

 1006 23:10:04.590222  Set Vref, RX VrefLevel [Byte0]: 42

 1007 23:10:04.593932                           [Byte1]: 42

 1008 23:10:04.597220  

 1009 23:10:04.597303  Set Vref, RX VrefLevel [Byte0]: 43

 1010 23:10:04.600872                           [Byte1]: 43

 1011 23:10:04.605342  

 1012 23:10:04.605426  Set Vref, RX VrefLevel [Byte0]: 44

 1013 23:10:04.608441                           [Byte1]: 44

 1014 23:10:04.612457  

 1015 23:10:04.612539  Set Vref, RX VrefLevel [Byte0]: 45

 1016 23:10:04.616040                           [Byte1]: 45

 1017 23:10:04.620524  

 1018 23:10:04.620608  Set Vref, RX VrefLevel [Byte0]: 46

 1019 23:10:04.623327                           [Byte1]: 46

 1020 23:10:04.628103  

 1021 23:10:04.628185  Set Vref, RX VrefLevel [Byte0]: 47

 1022 23:10:04.631296                           [Byte1]: 47

 1023 23:10:04.635268  

 1024 23:10:04.635350  Set Vref, RX VrefLevel [Byte0]: 48

 1025 23:10:04.638936                           [Byte1]: 48

 1026 23:10:04.642726  

 1027 23:10:04.642808  Set Vref, RX VrefLevel [Byte0]: 49

 1028 23:10:04.646006                           [Byte1]: 49

 1029 23:10:04.650666  

 1030 23:10:04.650773  Set Vref, RX VrefLevel [Byte0]: 50

 1031 23:10:04.654070                           [Byte1]: 50

 1032 23:10:04.658668  

 1033 23:10:04.658750  Set Vref, RX VrefLevel [Byte0]: 51

 1034 23:10:04.661569                           [Byte1]: 51

 1035 23:10:04.665747  

 1036 23:10:04.665829  Set Vref, RX VrefLevel [Byte0]: 52

 1037 23:10:04.669022                           [Byte1]: 52

 1038 23:10:04.673842  

 1039 23:10:04.673924  Set Vref, RX VrefLevel [Byte0]: 53

 1040 23:10:04.676772                           [Byte1]: 53

 1041 23:10:04.680924  

 1042 23:10:04.681006  Set Vref, RX VrefLevel [Byte0]: 54

 1043 23:10:04.684200                           [Byte1]: 54

 1044 23:10:04.688467  

 1045 23:10:04.688548  Set Vref, RX VrefLevel [Byte0]: 55

 1046 23:10:04.691844                           [Byte1]: 55

 1047 23:10:04.696929  

 1048 23:10:04.697056  Set Vref, RX VrefLevel [Byte0]: 56

 1049 23:10:04.700279                           [Byte1]: 56

 1050 23:10:04.703735  

 1051 23:10:04.703818  Set Vref, RX VrefLevel [Byte0]: 57

 1052 23:10:04.707139                           [Byte1]: 57

 1053 23:10:04.711770  

 1054 23:10:04.711852  Set Vref, RX VrefLevel [Byte0]: 58

 1055 23:10:04.714850                           [Byte1]: 58

 1056 23:10:04.718933  

 1057 23:10:04.719016  Set Vref, RX VrefLevel [Byte0]: 59

 1058 23:10:04.722110                           [Byte1]: 59

 1059 23:10:04.726529  

 1060 23:10:04.726611  Set Vref, RX VrefLevel [Byte0]: 60

 1061 23:10:04.729713                           [Byte1]: 60

 1062 23:10:04.734350  

 1063 23:10:04.734467  Set Vref, RX VrefLevel [Byte0]: 61

 1064 23:10:04.737404                           [Byte1]: 61

 1065 23:10:04.741791  

 1066 23:10:04.741875  Set Vref, RX VrefLevel [Byte0]: 62

 1067 23:10:04.745358                           [Byte1]: 62

 1068 23:10:04.749366  

 1069 23:10:04.749497  Set Vref, RX VrefLevel [Byte0]: 63

 1070 23:10:04.752741                           [Byte1]: 63

 1071 23:10:04.756907  

 1072 23:10:04.756988  Set Vref, RX VrefLevel [Byte0]: 64

 1073 23:10:04.760538                           [Byte1]: 64

 1074 23:10:04.764630  

 1075 23:10:04.764712  Set Vref, RX VrefLevel [Byte0]: 65

 1076 23:10:04.767788                           [Byte1]: 65

 1077 23:10:04.772476  

 1078 23:10:04.772557  Set Vref, RX VrefLevel [Byte0]: 66

 1079 23:10:04.775600                           [Byte1]: 66

 1080 23:10:04.779893  

 1081 23:10:04.779975  Set Vref, RX VrefLevel [Byte0]: 67

 1082 23:10:04.783515                           [Byte1]: 67

 1083 23:10:04.787615  

 1084 23:10:04.787697  Set Vref, RX VrefLevel [Byte0]: 68

 1085 23:10:04.790792                           [Byte1]: 68

 1086 23:10:04.795083  

 1087 23:10:04.795164  Set Vref, RX VrefLevel [Byte0]: 69

 1088 23:10:04.797961                           [Byte1]: 69

 1089 23:10:04.802955  

 1090 23:10:04.803038  Set Vref, RX VrefLevel [Byte0]: 70

 1091 23:10:04.806758                           [Byte1]: 70

 1092 23:10:04.810028  

 1093 23:10:04.810110  Set Vref, RX VrefLevel [Byte0]: 71

 1094 23:10:04.813297                           [Byte1]: 71

 1095 23:10:04.817509  

 1096 23:10:04.817591  Set Vref, RX VrefLevel [Byte0]: 72

 1097 23:10:04.821144                           [Byte1]: 72

 1098 23:10:04.825549  

 1099 23:10:04.825631  Set Vref, RX VrefLevel [Byte0]: 73

 1100 23:10:04.829160                           [Byte1]: 73

 1101 23:10:04.833152  

 1102 23:10:04.833234  Set Vref, RX VrefLevel [Byte0]: 74

 1103 23:10:04.836184                           [Byte1]: 74

 1104 23:10:04.840809  

 1105 23:10:04.840891  Set Vref, RX VrefLevel [Byte0]: 75

 1106 23:10:04.843807                           [Byte1]: 75

 1107 23:10:04.848223  

 1108 23:10:04.848305  Set Vref, RX VrefLevel [Byte0]: 76

 1109 23:10:04.851239                           [Byte1]: 76

 1110 23:10:04.856339  

 1111 23:10:04.856421  Final RX Vref Byte 0 = 62 to rank0

 1112 23:10:04.858881  Final RX Vref Byte 1 = 58 to rank0

 1113 23:10:04.862137  Final RX Vref Byte 0 = 62 to rank1

 1114 23:10:04.866044  Final RX Vref Byte 1 = 58 to rank1==

 1115 23:10:04.868854  Dram Type= 6, Freq= 0, CH_0, rank 0

 1116 23:10:04.875452  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1117 23:10:04.875536  ==

 1118 23:10:04.875601  DQS Delay:

 1119 23:10:04.875661  DQS0 = 0, DQS1 = 0

 1120 23:10:04.879482  DQM Delay:

 1121 23:10:04.879588  DQM0 = 87, DQM1 = 80

 1122 23:10:04.882337  DQ Delay:

 1123 23:10:04.885979  DQ0 =88, DQ1 =92, DQ2 =84, DQ3 =84

 1124 23:10:04.886061  DQ4 =88, DQ5 =76, DQ6 =96, DQ7 =92

 1125 23:10:04.888928  DQ8 =68, DQ9 =68, DQ10 =80, DQ11 =76

 1126 23:10:04.892218  DQ12 =88, DQ13 =80, DQ14 =92, DQ15 =88

 1127 23:10:04.895843  

 1128 23:10:04.895949  

 1129 23:10:04.902840  [DQSOSCAuto] RK0, (LSB)MR18= 0x230b, (MSB)MR19= 0x606, tDQSOscB0 = 407 ps tDQSOscB1 = 401 ps

 1130 23:10:04.905967  CH0 RK0: MR19=606, MR18=230B

 1131 23:10:04.912575  CH0_RK0: MR19=0x606, MR18=0x230B, DQSOSC=401, MR23=63, INC=91, DEC=61

 1132 23:10:04.912659  

 1133 23:10:04.915854  ----->DramcWriteLeveling(PI) begin...

 1134 23:10:04.915964  ==

 1135 23:10:04.919742  Dram Type= 6, Freq= 0, CH_0, rank 1

 1136 23:10:04.922884  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1137 23:10:04.922967  ==

 1138 23:10:04.926217  Write leveling (Byte 0): 30 => 30

 1139 23:10:04.930088  Write leveling (Byte 1): 28 => 28

 1140 23:10:04.932590  DramcWriteLeveling(PI) end<-----

 1141 23:10:04.932693  

 1142 23:10:04.932792  ==

 1143 23:10:04.935988  Dram Type= 6, Freq= 0, CH_0, rank 1

 1144 23:10:04.939517  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1145 23:10:04.939598  ==

 1146 23:10:04.942973  [Gating] SW mode calibration

 1147 23:10:04.949908  [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0

 1148 23:10:04.953250  RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)

 1149 23:10:04.959766   0  6  0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)

 1150 23:10:04.963395   0  6  4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)

 1151 23:10:04.966674   0  6  8 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)

 1152 23:10:05.010226   0  6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1153 23:10:05.010787   0  6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1154 23:10:05.011087   0  6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1155 23:10:05.011354   0  6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1156 23:10:05.011425   0  6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1157 23:10:05.012139   0  7  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1158 23:10:05.012391   0  7  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1159 23:10:05.012846   0  7  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1160 23:10:05.013156   0  7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1161 23:10:05.013224   0  7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1162 23:10:05.032411   0  7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1163 23:10:05.032725   0  7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1164 23:10:05.033058   0  7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1165 23:10:05.033346   0  8  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1166 23:10:05.033415   0  8  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 1)

 1167 23:10:05.039924   0  8  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1168 23:10:05.042741   0  8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1169 23:10:05.046378   0  8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1170 23:10:05.049724   0  8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1171 23:10:05.056156   0  8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1172 23:10:05.059659   0  8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1173 23:10:05.062987   0  9  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1174 23:10:05.069783   0  9  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1175 23:10:05.073033   0  9  8 | B1->B0 | 2323 3030 | 0 1 | (0 0) (0 0)

 1176 23:10:05.076594   0  9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 1177 23:10:05.083054   0  9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 1178 23:10:05.086743   0  9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 1179 23:10:05.090079   0  9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 1180 23:10:05.096725   0  9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 1181 23:10:05.099891   0 10  0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)

 1182 23:10:05.103179   0 10  4 | B1->B0 | 3434 3434 | 1 0 | (1 1) (0 1)

 1183 23:10:05.109717   0 10  8 | B1->B0 | 3131 2626 | 0 0 | (1 1) (1 1)

 1184 23:10:05.113135   0 10 12 | B1->B0 | 2525 2323 | 0 0 | (0 0) (0 0)

 1185 23:10:05.117194   0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1186 23:10:05.119761   0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1187 23:10:05.126556   0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1188 23:10:05.130254   0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1189 23:10:05.133294   0 11  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1190 23:10:05.141323   0 11  4 | B1->B0 | 2323 2626 | 0 1 | (0 0) (0 0)

 1191 23:10:05.144307   0 11  8 | B1->B0 | 2a2a 4343 | 0 0 | (0 0) (0 0)

 1192 23:10:05.147994   0 11 12 | B1->B0 | 3c3c 4646 | 0 0 | (0 0) (0 0)

 1193 23:10:05.151654   0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1194 23:10:05.155082   0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1195 23:10:05.162313   0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1196 23:10:05.165122   0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1197 23:10:05.169269   0 12  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1198 23:10:05.176152   0 12  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 1)

 1199 23:10:05.179017   0 12  8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)

 1200 23:10:05.182158   0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1201 23:10:05.185938   0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1202 23:10:05.192636   0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1203 23:10:05.196198   0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1204 23:10:05.199352   0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1205 23:10:05.206146   0 13  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1206 23:10:05.209279   0 13  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1207 23:10:05.213058   0 13  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1208 23:10:05.219700   0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1209 23:10:05.222840   0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1210 23:10:05.226580   0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1211 23:10:05.232813   0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1212 23:10:05.236459   0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1213 23:10:05.240036   0 14  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1214 23:10:05.242998   0 14  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1215 23:10:05.250051   0 14  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

 1216 23:10:05.253006   0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1217 23:10:05.256439  Total UI for P1: 0, mck2ui 16

 1218 23:10:05.259841  best dqsien dly found for B0: ( 0, 14,  8)

 1219 23:10:05.263611  Total UI for P1: 0, mck2ui 16

 1220 23:10:05.266287  best dqsien dly found for B1: ( 0, 14, 10)

 1221 23:10:05.270070  best DQS0 dly(MCK, UI, PI) = (0, 14, 8)

 1222 23:10:05.273179  best DQS1 dly(MCK, UI, PI) = (0, 14, 10)

 1223 23:10:05.273262  

 1224 23:10:05.276544  best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 8)

 1225 23:10:05.280264  best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 10)

 1226 23:10:05.283351  [Gating] SW calibration Done

 1227 23:10:05.283439  ==

 1228 23:10:05.286964  Dram Type= 6, Freq= 0, CH_0, rank 1

 1229 23:10:05.290234  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1230 23:10:05.293277  ==

 1231 23:10:05.293379  RX Vref Scan: 0

 1232 23:10:05.293461  

 1233 23:10:05.296612  RX Vref 0 -> 0, step: 1

 1234 23:10:05.296724  

 1235 23:10:05.300185  RX Delay -130 -> 252, step: 16

 1236 23:10:05.303164  iDelay=222, Bit 0, Center 93 (-18 ~ 205) 224

 1237 23:10:05.306899  iDelay=222, Bit 1, Center 85 (-34 ~ 205) 240

 1238 23:10:05.310061  iDelay=222, Bit 2, Center 85 (-34 ~ 205) 240

 1239 23:10:05.313212  iDelay=222, Bit 3, Center 85 (-34 ~ 205) 240

 1240 23:10:05.320671  iDelay=222, Bit 4, Center 93 (-18 ~ 205) 224

 1241 23:10:05.323103  iDelay=222, Bit 5, Center 69 (-50 ~ 189) 240

 1242 23:10:05.326991  iDelay=222, Bit 6, Center 101 (-18 ~ 221) 240

 1243 23:10:05.330672  iDelay=222, Bit 7, Center 93 (-18 ~ 205) 224

 1244 23:10:05.333845  iDelay=222, Bit 8, Center 69 (-50 ~ 189) 240

 1245 23:10:05.336828  iDelay=222, Bit 9, Center 69 (-50 ~ 189) 240

 1246 23:10:05.344067  iDelay=222, Bit 10, Center 69 (-50 ~ 189) 240

 1247 23:10:05.346824  iDelay=222, Bit 11, Center 69 (-50 ~ 189) 240

 1248 23:10:05.350437  iDelay=222, Bit 12, Center 77 (-34 ~ 189) 224

 1249 23:10:05.354190  iDelay=222, Bit 13, Center 85 (-34 ~ 205) 240

 1250 23:10:05.357228  iDelay=222, Bit 14, Center 93 (-18 ~ 205) 224

 1251 23:10:05.363870  iDelay=222, Bit 15, Center 93 (-18 ~ 205) 224

 1252 23:10:05.363953  ==

 1253 23:10:05.367376  Dram Type= 6, Freq= 0, CH_0, rank 1

 1254 23:10:05.370645  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1255 23:10:05.370728  ==

 1256 23:10:05.370793  DQS Delay:

 1257 23:10:05.373924  DQS0 = 0, DQS1 = 0

 1258 23:10:05.374005  DQM Delay:

 1259 23:10:05.377427  DQM0 = 88, DQM1 = 78

 1260 23:10:05.377508  DQ Delay:

 1261 23:10:05.380351  DQ0 =93, DQ1 =85, DQ2 =85, DQ3 =85

 1262 23:10:05.383959  DQ4 =93, DQ5 =69, DQ6 =101, DQ7 =93

 1263 23:10:05.387438  DQ8 =69, DQ9 =69, DQ10 =69, DQ11 =69

 1264 23:10:05.390926  DQ12 =77, DQ13 =85, DQ14 =93, DQ15 =93

 1265 23:10:05.391014  

 1266 23:10:05.391083  

 1267 23:10:05.391146  ==

 1268 23:10:05.393854  Dram Type= 6, Freq= 0, CH_0, rank 1

 1269 23:10:05.397705  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1270 23:10:05.397799  ==

 1271 23:10:05.397874  

 1272 23:10:05.397943  

 1273 23:10:05.400309  	TX Vref Scan disable

 1274 23:10:05.403859   == TX Byte 0 ==

 1275 23:10:05.407693  Update DQ  dly =582 (2 ,1, 38)  DQ  OEN =(1 ,6)

 1276 23:10:05.410755  Update DQM dly =582 (2 ,1, 38)  DQM OEN =(1 ,6)

 1277 23:10:05.414430   == TX Byte 1 ==

 1278 23:10:05.417809  Update DQ  dly =578 (2 ,1, 34)  DQ  OEN =(1 ,6)

 1279 23:10:05.420910  Update DQM dly =578 (2 ,1, 34)  DQM OEN =(1 ,6)

 1280 23:10:05.421062  ==

 1281 23:10:05.424740  Dram Type= 6, Freq= 0, CH_0, rank 1

 1282 23:10:05.427578  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1283 23:10:05.430676  ==

 1284 23:10:05.443111  TX Vref=22, minBit 0, minWin=27, winSum=442

 1285 23:10:05.446180  TX Vref=24, minBit 3, minWin=27, winSum=449

 1286 23:10:05.449807  TX Vref=26, minBit 3, minWin=27, winSum=450

 1287 23:10:05.452757  TX Vref=28, minBit 3, minWin=27, winSum=451

 1288 23:10:05.456328  TX Vref=30, minBit 0, minWin=28, winSum=457

 1289 23:10:05.459734  TX Vref=32, minBit 0, minWin=28, winSum=452

 1290 23:10:05.466632  [TxChooseVref] Worse bit 0, Min win 28, Win sum 457, Final Vref 30

 1291 23:10:05.467075  

 1292 23:10:05.469702  Final TX Range 1 Vref 30

 1293 23:10:05.470137  

 1294 23:10:05.470621  ==

 1295 23:10:05.473325  Dram Type= 6, Freq= 0, CH_0, rank 1

 1296 23:10:05.476506  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1297 23:10:05.476928  ==

 1298 23:10:05.477258  

 1299 23:10:05.477564  

 1300 23:10:05.479941  	TX Vref Scan disable

 1301 23:10:05.483121   == TX Byte 0 ==

 1302 23:10:05.486668  Update DQ  dly =581 (2 ,1, 37)  DQ  OEN =(1 ,6)

 1303 23:10:05.490369  Update DQM dly =581 (2 ,1, 37)  DQM OEN =(1 ,6)

 1304 23:10:05.493522   == TX Byte 1 ==

 1305 23:10:05.496408  Update DQ  dly =578 (2 ,1, 34)  DQ  OEN =(1 ,6)

 1306 23:10:05.500059  Update DQM dly =578 (2 ,1, 34)  DQM OEN =(1 ,6)

 1307 23:10:05.500386  

 1308 23:10:05.503552  [DATLAT]

 1309 23:10:05.503776  Freq=800, CH0 RK1

 1310 23:10:05.503956  

 1311 23:10:05.507194  DATLAT Default: 0xa

 1312 23:10:05.507375  0, 0xFFFF, sum = 0

 1313 23:10:05.509723  1, 0xFFFF, sum = 0

 1314 23:10:05.509905  2, 0xFFFF, sum = 0

 1315 23:10:05.513368  3, 0xFFFF, sum = 0

 1316 23:10:05.513521  4, 0xFFFF, sum = 0

 1317 23:10:05.516964  5, 0xFFFF, sum = 0

 1318 23:10:05.517167  6, 0xFFFF, sum = 0

 1319 23:10:05.519797  7, 0xFFFF, sum = 0

 1320 23:10:05.519987  8, 0xFFFF, sum = 0

 1321 23:10:05.523893  9, 0x0, sum = 1

 1322 23:10:05.523976  10, 0x0, sum = 2

 1323 23:10:05.526652  11, 0x0, sum = 3

 1324 23:10:05.526739  12, 0x0, sum = 4

 1325 23:10:05.526808  best_step = 10

 1326 23:10:05.529939  

 1327 23:10:05.530020  ==

 1328 23:10:05.533663  Dram Type= 6, Freq= 0, CH_0, rank 1

 1329 23:10:05.536622  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1330 23:10:05.536704  ==

 1331 23:10:05.536772  RX Vref Scan: 0

 1332 23:10:05.536833  

 1333 23:10:05.540507  RX Vref 0 -> 0, step: 1

 1334 23:10:05.540613  

 1335 23:10:05.543717  RX Delay -95 -> 252, step: 8

 1336 23:10:05.547143  iDelay=209, Bit 0, Center 88 (-23 ~ 200) 224

 1337 23:10:05.553281  iDelay=209, Bit 1, Center 88 (-23 ~ 200) 224

 1338 23:10:05.556836  iDelay=209, Bit 2, Center 84 (-31 ~ 200) 232

 1339 23:10:05.560366  iDelay=209, Bit 3, Center 84 (-31 ~ 200) 232

 1340 23:10:05.563703  iDelay=209, Bit 4, Center 88 (-23 ~ 200) 224

 1341 23:10:05.566919  iDelay=209, Bit 5, Center 76 (-39 ~ 192) 232

 1342 23:10:05.570228  iDelay=209, Bit 6, Center 96 (-15 ~ 208) 224

 1343 23:10:05.576994  iDelay=209, Bit 7, Center 96 (-15 ~ 208) 224

 1344 23:10:05.580143  iDelay=209, Bit 8, Center 68 (-39 ~ 176) 216

 1345 23:10:05.583669  iDelay=209, Bit 9, Center 68 (-39 ~ 176) 216

 1346 23:10:05.587013  iDelay=209, Bit 10, Center 80 (-31 ~ 192) 224

 1347 23:10:05.590520  iDelay=209, Bit 11, Center 68 (-39 ~ 176) 216

 1348 23:10:05.596991  iDelay=209, Bit 12, Center 80 (-31 ~ 192) 224

 1349 23:10:05.600629  iDelay=209, Bit 13, Center 84 (-23 ~ 192) 216

 1350 23:10:05.603809  iDelay=209, Bit 14, Center 88 (-23 ~ 200) 224

 1351 23:10:05.607347  iDelay=209, Bit 15, Center 88 (-23 ~ 200) 224

 1352 23:10:05.607589  ==

 1353 23:10:05.610174  Dram Type= 6, Freq= 0, CH_0, rank 1

 1354 23:10:05.617326  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1355 23:10:05.617408  ==

 1356 23:10:05.617473  DQS Delay:

 1357 23:10:05.617534  DQS0 = 0, DQS1 = 0

 1358 23:10:05.620571  DQM Delay:

 1359 23:10:05.620653  DQM0 = 87, DQM1 = 78

 1360 23:10:05.623696  DQ Delay:

 1361 23:10:05.627017  DQ0 =88, DQ1 =88, DQ2 =84, DQ3 =84

 1362 23:10:05.627098  DQ4 =88, DQ5 =76, DQ6 =96, DQ7 =96

 1363 23:10:05.630830  DQ8 =68, DQ9 =68, DQ10 =80, DQ11 =68

 1364 23:10:05.633799  DQ12 =80, DQ13 =84, DQ14 =88, DQ15 =88

 1365 23:10:05.637427  

 1366 23:10:05.637507  

 1367 23:10:05.643768  [DQSOSCAuto] RK1, (LSB)MR18= 0x331d, (MSB)MR19= 0x606, tDQSOscB0 = 402 ps tDQSOscB1 = 396 ps

 1368 23:10:05.647282  CH0 RK1: MR19=606, MR18=331D

 1369 23:10:05.653878  CH0_RK1: MR19=0x606, MR18=0x331D, DQSOSC=396, MR23=63, INC=94, DEC=62

 1370 23:10:05.653960  [RxdqsGatingPostProcess] freq 800

 1371 23:10:05.661136  ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1

 1372 23:10:05.664251  Pre-setting of DQS Precalculation

 1373 23:10:05.667627  [DualRankRxdatlatCal] RK0: 10, RK1: 10, Final_Datlat 10

 1374 23:10:05.670943  ==

 1375 23:10:05.674592  Dram Type= 6, Freq= 0, CH_1, rank 0

 1376 23:10:05.678018  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1377 23:10:05.678100  ==

 1378 23:10:05.680985  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 1379 23:10:05.687256  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34

 1380 23:10:05.697092  [CA 0] Center 36 (6~67) winsize 62

 1381 23:10:05.701250  [CA 1] Center 36 (5~67) winsize 63

 1382 23:10:05.703902  [CA 2] Center 34 (4~64) winsize 61

 1383 23:10:05.707607  [CA 3] Center 33 (3~64) winsize 62

 1384 23:10:05.710755  [CA 4] Center 34 (3~65) winsize 63

 1385 23:10:05.713973  [CA 5] Center 33 (3~64) winsize 62

 1386 23:10:05.714055  

 1387 23:10:05.717206  [CmdBusTrainingLP45] Vref(ca) range 1: 32

 1388 23:10:05.717287  

 1389 23:10:05.720767  [CATrainingPosCal] consider 1 rank data

 1390 23:10:05.724330  u2DelayCellTimex100 = 270/100 ps

 1391 23:10:05.727666  CA0 delay=36 (6~67),Diff = 3 PI (21 cell)

 1392 23:10:05.730796  CA1 delay=36 (5~67),Diff = 3 PI (21 cell)

 1393 23:10:05.734381  CA2 delay=34 (4~64),Diff = 1 PI (7 cell)

 1394 23:10:05.740786  CA3 delay=33 (3~64),Diff = 0 PI (0 cell)

 1395 23:10:05.744079  CA4 delay=34 (3~65),Diff = 1 PI (7 cell)

 1396 23:10:05.747753  CA5 delay=33 (3~64),Diff = 0 PI (0 cell)

 1397 23:10:05.747835  

 1398 23:10:05.751309  CA PerBit enable=1, Macro0, CA PI delay=33

 1399 23:10:05.751391  

 1400 23:10:05.754983  [CBTSetCACLKResult] CA Dly = 33

 1401 23:10:05.755065  CS Dly: 5 (0~36)

 1402 23:10:05.755129  ==

 1403 23:10:05.757799  Dram Type= 6, Freq= 0, CH_1, rank 1

 1404 23:10:05.761202  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1405 23:10:05.764836  ==

 1406 23:10:05.768134  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 1407 23:10:05.774933  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=24, u1VrefScanEnd=34

 1408 23:10:05.783567  [CA 0] Center 36 (5~67) winsize 63

 1409 23:10:05.787005  [CA 1] Center 36 (6~67) winsize 62

 1410 23:10:05.789848  [CA 2] Center 33 (3~64) winsize 62

 1411 23:10:05.793381  [CA 3] Center 33 (3~64) winsize 62

 1412 23:10:05.796667  [CA 4] Center 33 (3~64) winsize 62

 1413 23:10:05.800596  [CA 5] Center 33 (3~64) winsize 62

 1414 23:10:05.800718  

 1415 23:10:05.803768  [CmdBusTrainingLP45] Vref(ca) range 1: 34

 1416 23:10:05.803850  

 1417 23:10:05.807771  [CATrainingPosCal] consider 2 rank data

 1418 23:10:05.811460  u2DelayCellTimex100 = 270/100 ps

 1419 23:10:05.815431  CA0 delay=36 (6~67),Diff = 3 PI (21 cell)

 1420 23:10:05.818709  CA1 delay=36 (6~67),Diff = 3 PI (21 cell)

 1421 23:10:05.822223  CA2 delay=34 (4~64),Diff = 1 PI (7 cell)

 1422 23:10:05.826264  CA3 delay=33 (3~64),Diff = 0 PI (0 cell)

 1423 23:10:05.829936  CA4 delay=33 (3~64),Diff = 0 PI (0 cell)

 1424 23:10:05.833960  CA5 delay=33 (3~64),Diff = 0 PI (0 cell)

 1425 23:10:05.834069  

 1426 23:10:05.837655  CA PerBit enable=1, Macro0, CA PI delay=33

 1427 23:10:05.837737  

 1428 23:10:05.840772  [CBTSetCACLKResult] CA Dly = 33

 1429 23:10:05.840895  CS Dly: 5 (0~36)

 1430 23:10:05.840959  

 1431 23:10:05.844059  ----->DramcWriteLeveling(PI) begin...

 1432 23:10:05.844156  ==

 1433 23:10:05.847323  Dram Type= 6, Freq= 0, CH_1, rank 0

 1434 23:10:05.850943  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1435 23:10:05.854056  ==

 1436 23:10:05.854137  Write leveling (Byte 0): 30 => 30

 1437 23:10:05.857805  Write leveling (Byte 1): 31 => 31

 1438 23:10:05.861247  DramcWriteLeveling(PI) end<-----

 1439 23:10:05.861327  

 1440 23:10:05.861392  ==

 1441 23:10:05.864264  Dram Type= 6, Freq= 0, CH_1, rank 0

 1442 23:10:05.871196  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1443 23:10:05.871278  ==

 1444 23:10:05.871343  [Gating] SW mode calibration

 1445 23:10:05.881051  [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0

 1446 23:10:05.884505  RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)

 1447 23:10:05.888270   0  6  0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)

 1448 23:10:05.895160   0  6  4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)

 1449 23:10:05.898744   0  6  8 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)

 1450 23:10:05.901400   0  6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1451 23:10:05.908306   0  6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1452 23:10:05.911430   0  6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1453 23:10:05.915124   0  6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1454 23:10:05.918212   0  6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1455 23:10:05.925151   0  7  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1456 23:10:05.928553   0  7  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1457 23:10:05.931697   0  7  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1458 23:10:05.938498   0  7 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1459 23:10:05.942092   0  7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1460 23:10:05.945009   0  7 20 | B1->B0 | 2323 2323 | 1 0 | (0 0) (0 0)

 1461 23:10:05.951890   0  7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1462 23:10:05.955397   0  7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1463 23:10:05.958874   0  8  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1464 23:10:05.965881   0  8  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1465 23:10:05.968920   0  8  8 | B1->B0 | 2323 2323 | 0 0 | (0 1) (1 1)

 1466 23:10:05.972567   0  8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1467 23:10:05.975419   0  8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1468 23:10:05.982161   0  8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1469 23:10:05.986133   0  8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1470 23:10:05.988985   0  8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1471 23:10:05.995826   0  9  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1472 23:10:05.998723   0  9  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1473 23:10:06.002379   0  9  8 | B1->B0 | 2424 2323 | 1 0 | (1 1) (0 0)

 1474 23:10:06.008945   0  9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 1475 23:10:06.013102   0  9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 1476 23:10:06.015723   0  9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 1477 23:10:06.022282   0  9 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 1478 23:10:06.025705   0  9 28 | B1->B0 | 3535 3434 | 1 1 | (0 0) (1 1)

 1479 23:10:06.029607   0 10  0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 1480 23:10:06.032733   0 10  4 | B1->B0 | 3333 3434 | 1 1 | (1 1) (1 1)

 1481 23:10:06.039597   0 10  8 | B1->B0 | 2727 2e2e | 0 0 | (1 0) (0 0)

 1482 23:10:06.042762   0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1483 23:10:06.046013   0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1484 23:10:06.052592   0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1485 23:10:06.055987   0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1486 23:10:06.059624   0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1487 23:10:06.066331   0 11  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1488 23:10:06.069377   0 11  4 | B1->B0 | 2525 2323 | 0 0 | (0 0) (0 0)

 1489 23:10:06.072936   0 11  8 | B1->B0 | 3434 3131 | 0 0 | (0 0) (0 0)

 1490 23:10:06.079748   0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1491 23:10:06.082810   0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1492 23:10:06.086085   0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1493 23:10:06.093325   0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1494 23:10:06.096645   0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1495 23:10:06.099661   0 12  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1496 23:10:06.102857   0 12  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1497 23:10:06.110239   0 12  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 1498 23:10:06.113106   0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1499 23:10:06.116197   0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1500 23:10:06.123076   0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1501 23:10:06.126889   0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1502 23:10:06.129581   0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1503 23:10:06.136841   0 13  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1504 23:10:06.140007   0 13  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1505 23:10:06.143489   0 13  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1506 23:10:06.149634   0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1507 23:10:06.153455   0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1508 23:10:06.156719   0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1509 23:10:06.160509   0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1510 23:10:06.166873   0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1511 23:10:06.169806   0 14  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1512 23:10:06.173541   0 14  4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 1)

 1513 23:10:06.180049   0 14  8 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)

 1514 23:10:06.183481   0 14 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1515 23:10:06.186650  Total UI for P1: 0, mck2ui 16

 1516 23:10:06.190729  best dqsien dly found for B0: ( 0, 14,  8)

 1517 23:10:06.193433  Total UI for P1: 0, mck2ui 16

 1518 23:10:06.196735  best dqsien dly found for B1: ( 0, 14,  6)

 1519 23:10:06.200198  best DQS0 dly(MCK, UI, PI) = (0, 14, 8)

 1520 23:10:06.203796  best DQS1 dly(MCK, UI, PI) = (0, 14, 6)

 1521 23:10:06.203879  

 1522 23:10:06.207103  best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 8)

 1523 23:10:06.210849  best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 6)

 1524 23:10:06.213814  [Gating] SW calibration Done

 1525 23:10:06.213895  ==

 1526 23:10:06.217271  Dram Type= 6, Freq= 0, CH_1, rank 0

 1527 23:10:06.220348  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1528 23:10:06.220430  ==

 1529 23:10:06.224358  RX Vref Scan: 0

 1530 23:10:06.224495  

 1531 23:10:06.227544  RX Vref 0 -> 0, step: 1

 1532 23:10:06.227625  

 1533 23:10:06.227690  RX Delay -130 -> 252, step: 16

 1534 23:10:06.233858  iDelay=206, Bit 0, Center 85 (-34 ~ 205) 240

 1535 23:10:06.237030  iDelay=206, Bit 1, Center 69 (-50 ~ 189) 240

 1536 23:10:06.240339  iDelay=206, Bit 2, Center 69 (-50 ~ 189) 240

 1537 23:10:06.244175  iDelay=206, Bit 3, Center 85 (-34 ~ 205) 240

 1538 23:10:06.247153  iDelay=206, Bit 4, Center 85 (-34 ~ 205) 240

 1539 23:10:06.253785  iDelay=206, Bit 5, Center 85 (-34 ~ 205) 240

 1540 23:10:06.257143  iDelay=206, Bit 6, Center 93 (-18 ~ 205) 224

 1541 23:10:06.260775  iDelay=206, Bit 7, Center 77 (-50 ~ 205) 256

 1542 23:10:06.264493  iDelay=206, Bit 8, Center 61 (-66 ~ 189) 256

 1543 23:10:06.267609  iDelay=206, Bit 9, Center 61 (-66 ~ 189) 256

 1544 23:10:06.270615  iDelay=206, Bit 10, Center 69 (-50 ~ 189) 240

 1545 23:10:06.277783  iDelay=206, Bit 11, Center 69 (-50 ~ 189) 240

 1546 23:10:06.281134  iDelay=206, Bit 12, Center 85 (-34 ~ 205) 240

 1547 23:10:06.284017  iDelay=206, Bit 13, Center 85 (-34 ~ 205) 240

 1548 23:10:06.287337  iDelay=206, Bit 14, Center 85 (-34 ~ 205) 240

 1549 23:10:06.290941  iDelay=206, Bit 15, Center 85 (-34 ~ 205) 240

 1550 23:10:06.294386  ==

 1551 23:10:06.294491  Dram Type= 6, Freq= 0, CH_1, rank 0

 1552 23:10:06.301162  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1553 23:10:06.301251  ==

 1554 23:10:06.301321  DQS Delay:

 1555 23:10:06.304063  DQS0 = 0, DQS1 = 0

 1556 23:10:06.304151  DQM Delay:

 1557 23:10:06.307507  DQM0 = 81, DQM1 = 75

 1558 23:10:06.307601  DQ Delay:

 1559 23:10:06.310942  DQ0 =85, DQ1 =69, DQ2 =69, DQ3 =85

 1560 23:10:06.314580  DQ4 =85, DQ5 =85, DQ6 =93, DQ7 =77

 1561 23:10:06.317673  DQ8 =61, DQ9 =61, DQ10 =69, DQ11 =69

 1562 23:10:06.320938  DQ12 =85, DQ13 =85, DQ14 =85, DQ15 =85

 1563 23:10:06.321101  

 1564 23:10:06.321209  

 1565 23:10:06.321300  ==

 1566 23:10:06.324413  Dram Type= 6, Freq= 0, CH_1, rank 0

 1567 23:10:06.328028  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1568 23:10:06.328164  ==

 1569 23:10:06.328271  

 1570 23:10:06.328371  

 1571 23:10:06.331490  	TX Vref Scan disable

 1572 23:10:06.331648   == TX Byte 0 ==

 1573 23:10:06.338043  Update DQ  dly =581 (2 ,1, 37)  DQ  OEN =(1 ,6)

 1574 23:10:06.341289  Update DQM dly =581 (2 ,1, 37)  DQM OEN =(1 ,6)

 1575 23:10:06.341491   == TX Byte 1 ==

 1576 23:10:06.348243  Update DQ  dly =582 (2 ,1, 38)  DQ  OEN =(1 ,6)

 1577 23:10:06.351594  Update DQM dly =582 (2 ,1, 38)  DQM OEN =(1 ,6)

 1578 23:10:06.351944  ==

 1579 23:10:06.355635  Dram Type= 6, Freq= 0, CH_1, rank 0

 1580 23:10:06.358015  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1581 23:10:06.358437  ==

 1582 23:10:06.372053  TX Vref=22, minBit 0, minWin=27, winSum=435

 1583 23:10:06.375768  TX Vref=24, minBit 3, minWin=27, winSum=443

 1584 23:10:06.378731  TX Vref=26, minBit 0, minWin=28, winSum=450

 1585 23:10:06.382534  TX Vref=28, minBit 3, minWin=28, winSum=453

 1586 23:10:06.385861  TX Vref=30, minBit 0, minWin=28, winSum=454

 1587 23:10:06.389877  TX Vref=32, minBit 0, minWin=28, winSum=454

 1588 23:10:06.396337  [TxChooseVref] Worse bit 0, Min win 28, Win sum 454, Final Vref 30

 1589 23:10:06.396763  

 1590 23:10:06.399770  Final TX Range 1 Vref 30

 1591 23:10:06.400274  

 1592 23:10:06.400747  ==

 1593 23:10:06.403012  Dram Type= 6, Freq= 0, CH_1, rank 0

 1594 23:10:06.406161  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1595 23:10:06.406639  ==

 1596 23:10:06.406979  

 1597 23:10:06.407290  

 1598 23:10:06.409735  	TX Vref Scan disable

 1599 23:10:06.413509   == TX Byte 0 ==

 1600 23:10:06.416614  Update DQ  dly =581 (2 ,1, 37)  DQ  OEN =(1 ,6)

 1601 23:10:06.419814  Update DQM dly =581 (2 ,1, 37)  DQM OEN =(1 ,6)

 1602 23:10:06.423691   == TX Byte 1 ==

 1603 23:10:06.426370  Update DQ  dly =581 (2 ,1, 37)  DQ  OEN =(1 ,6)

 1604 23:10:06.430169  Update DQM dly =581 (2 ,1, 37)  DQM OEN =(1 ,6)

 1605 23:10:06.430714  

 1606 23:10:06.431052  [DATLAT]

 1607 23:10:06.433371  Freq=800, CH1 RK0

 1608 23:10:06.433792  

 1609 23:10:06.436700  DATLAT Default: 0xa

 1610 23:10:06.437126  0, 0xFFFF, sum = 0

 1611 23:10:06.440096  1, 0xFFFF, sum = 0

 1612 23:10:06.440522  2, 0xFFFF, sum = 0

 1613 23:10:06.443749  3, 0xFFFF, sum = 0

 1614 23:10:06.444175  4, 0xFFFF, sum = 0

 1615 23:10:06.446521  5, 0xFFFF, sum = 0

 1616 23:10:06.446949  6, 0xFFFF, sum = 0

 1617 23:10:06.449653  7, 0xFFFF, sum = 0

 1618 23:10:06.450080  8, 0xFFFF, sum = 0

 1619 23:10:06.453355  9, 0x0, sum = 1

 1620 23:10:06.453801  10, 0x0, sum = 2

 1621 23:10:06.456481  11, 0x0, sum = 3

 1622 23:10:06.456906  12, 0x0, sum = 4

 1623 23:10:06.457246  best_step = 10

 1624 23:10:06.457556  

 1625 23:10:06.460244  ==

 1626 23:10:06.463684  Dram Type= 6, Freq= 0, CH_1, rank 0

 1627 23:10:06.466918  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1628 23:10:06.467338  ==

 1629 23:10:06.467672  RX Vref Scan: 1

 1630 23:10:06.467984  

 1631 23:10:06.470180  Set Vref Range= 32 -> 127

 1632 23:10:06.470651  

 1633 23:10:06.473714  RX Vref 32 -> 127, step: 1

 1634 23:10:06.474130  

 1635 23:10:06.476817  RX Delay -111 -> 252, step: 8

 1636 23:10:06.477235  

 1637 23:10:06.480278  Set Vref, RX VrefLevel [Byte0]: 32

 1638 23:10:06.483390                           [Byte1]: 32

 1639 23:10:06.483809  

 1640 23:10:06.486910  Set Vref, RX VrefLevel [Byte0]: 33

 1641 23:10:06.490293                           [Byte1]: 33

 1642 23:10:06.490812  

 1643 23:10:06.493726  Set Vref, RX VrefLevel [Byte0]: 34

 1644 23:10:06.496985                           [Byte1]: 34

 1645 23:10:06.500444  

 1646 23:10:06.501022  Set Vref, RX VrefLevel [Byte0]: 35

 1647 23:10:06.503655                           [Byte1]: 35

 1648 23:10:06.508296  

 1649 23:10:06.508711  Set Vref, RX VrefLevel [Byte0]: 36

 1650 23:10:06.511155                           [Byte1]: 36

 1651 23:10:06.515608  

 1652 23:10:06.516020  Set Vref, RX VrefLevel [Byte0]: 37

 1653 23:10:06.519636                           [Byte1]: 37

 1654 23:10:06.523319  

 1655 23:10:06.523867  Set Vref, RX VrefLevel [Byte0]: 38

 1656 23:10:06.526355                           [Byte1]: 38

 1657 23:10:06.530863  

 1658 23:10:06.531275  Set Vref, RX VrefLevel [Byte0]: 39

 1659 23:10:06.534654                           [Byte1]: 39

 1660 23:10:06.539127  

 1661 23:10:06.539602  Set Vref, RX VrefLevel [Byte0]: 40

 1662 23:10:06.541514                           [Byte1]: 40

 1663 23:10:06.547125  

 1664 23:10:06.547678  Set Vref, RX VrefLevel [Byte0]: 41

 1665 23:10:06.549698                           [Byte1]: 41

 1666 23:10:06.553869  

 1667 23:10:06.554290  Set Vref, RX VrefLevel [Byte0]: 42

 1668 23:10:06.556938                           [Byte1]: 42

 1669 23:10:06.561641  

 1670 23:10:06.562077  Set Vref, RX VrefLevel [Byte0]: 43

 1671 23:10:06.564495                           [Byte1]: 43

 1672 23:10:06.569377  

 1673 23:10:06.569820  Set Vref, RX VrefLevel [Byte0]: 44

 1674 23:10:06.572351                           [Byte1]: 44

 1675 23:10:06.576910  

 1676 23:10:06.577517  Set Vref, RX VrefLevel [Byte0]: 45

 1677 23:10:06.580449                           [Byte1]: 45

 1678 23:10:06.584443  

 1679 23:10:06.585051  Set Vref, RX VrefLevel [Byte0]: 46

 1680 23:10:06.587759                           [Byte1]: 46

 1681 23:10:06.592118  

 1682 23:10:06.592764  Set Vref, RX VrefLevel [Byte0]: 47

 1683 23:10:06.595257                           [Byte1]: 47

 1684 23:10:06.599695  

 1685 23:10:06.600264  Set Vref, RX VrefLevel [Byte0]: 48

 1686 23:10:06.602952                           [Byte1]: 48

 1687 23:10:06.607168  

 1688 23:10:06.607761  Set Vref, RX VrefLevel [Byte0]: 49

 1689 23:10:06.610489                           [Byte1]: 49

 1690 23:10:06.614912  

 1691 23:10:06.615392  Set Vref, RX VrefLevel [Byte0]: 50

 1692 23:10:06.618463                           [Byte1]: 50

 1693 23:10:06.622495  

 1694 23:10:06.622930  Set Vref, RX VrefLevel [Byte0]: 51

 1695 23:10:06.625883                           [Byte1]: 51

 1696 23:10:06.630154  

 1697 23:10:06.630637  Set Vref, RX VrefLevel [Byte0]: 52

 1698 23:10:06.633723                           [Byte1]: 52

 1699 23:10:06.637963  

 1700 23:10:06.638443  Set Vref, RX VrefLevel [Byte0]: 53

 1701 23:10:06.641068                           [Byte1]: 53

 1702 23:10:06.645384  

 1703 23:10:06.645800  Set Vref, RX VrefLevel [Byte0]: 54

 1704 23:10:06.649026                           [Byte1]: 54

 1705 23:10:06.653151  

 1706 23:10:06.653571  Set Vref, RX VrefLevel [Byte0]: 55

 1707 23:10:06.656869                           [Byte1]: 55

 1708 23:10:06.661090  

 1709 23:10:06.661522  Set Vref, RX VrefLevel [Byte0]: 56

 1710 23:10:06.664359                           [Byte1]: 56

 1711 23:10:06.668414  

 1712 23:10:06.668830  Set Vref, RX VrefLevel [Byte0]: 57

 1713 23:10:06.671902                           [Byte1]: 57

 1714 23:10:06.675957  

 1715 23:10:06.676371  Set Vref, RX VrefLevel [Byte0]: 58

 1716 23:10:06.679599                           [Byte1]: 58

 1717 23:10:06.683506  

 1718 23:10:06.683917  Set Vref, RX VrefLevel [Byte0]: 59

 1719 23:10:06.686902                           [Byte1]: 59

 1720 23:10:06.691180  

 1721 23:10:06.691263  Set Vref, RX VrefLevel [Byte0]: 60

 1722 23:10:06.694304                           [Byte1]: 60

 1723 23:10:06.698805  

 1724 23:10:06.698888  Set Vref, RX VrefLevel [Byte0]: 61

 1725 23:10:06.702184                           [Byte1]: 61

 1726 23:10:06.706438  

 1727 23:10:06.706521  Set Vref, RX VrefLevel [Byte0]: 62

 1728 23:10:06.709457                           [Byte1]: 62

 1729 23:10:06.713951  

 1730 23:10:06.714034  Set Vref, RX VrefLevel [Byte0]: 63

 1731 23:10:06.718039                           [Byte1]: 63

 1732 23:10:06.722421  

 1733 23:10:06.722517  Set Vref, RX VrefLevel [Byte0]: 64

 1734 23:10:06.724845                           [Byte1]: 64

 1735 23:10:06.729664  

 1736 23:10:06.729745  Set Vref, RX VrefLevel [Byte0]: 65

 1737 23:10:06.732900                           [Byte1]: 65

 1738 23:10:06.737009  

 1739 23:10:06.737089  Set Vref, RX VrefLevel [Byte0]: 66

 1740 23:10:06.740604                           [Byte1]: 66

 1741 23:10:06.744485  

 1742 23:10:06.744565  Set Vref, RX VrefLevel [Byte0]: 67

 1743 23:10:06.747897                           [Byte1]: 67

 1744 23:10:06.752450  

 1745 23:10:06.752626  Set Vref, RX VrefLevel [Byte0]: 68

 1746 23:10:06.755727                           [Byte1]: 68

 1747 23:10:06.759886  

 1748 23:10:06.759967  Set Vref, RX VrefLevel [Byte0]: 69

 1749 23:10:06.762793                           [Byte1]: 69

 1750 23:10:06.767544  

 1751 23:10:06.767629  Set Vref, RX VrefLevel [Byte0]: 70

 1752 23:10:06.771223                           [Byte1]: 70

 1753 23:10:06.775557  

 1754 23:10:06.775664  Set Vref, RX VrefLevel [Byte0]: 71

 1755 23:10:06.778590                           [Byte1]: 71

 1756 23:10:06.782971  

 1757 23:10:06.783042  Set Vref, RX VrefLevel [Byte0]: 72

 1758 23:10:06.786236                           [Byte1]: 72

 1759 23:10:06.790619  

 1760 23:10:06.790699  Set Vref, RX VrefLevel [Byte0]: 73

 1761 23:10:06.793549                           [Byte1]: 73

 1762 23:10:06.798300  

 1763 23:10:06.798389  Set Vref, RX VrefLevel [Byte0]: 74

 1764 23:10:06.802040                           [Byte1]: 74

 1765 23:10:06.805728  

 1766 23:10:06.805810  Set Vref, RX VrefLevel [Byte0]: 75

 1767 23:10:06.809351                           [Byte1]: 75

 1768 23:10:06.813265  

 1769 23:10:06.813346  Set Vref, RX VrefLevel [Byte0]: 76

 1770 23:10:06.816833                           [Byte1]: 76

 1771 23:10:06.821689  

 1772 23:10:06.821769  Final RX Vref Byte 0 = 60 to rank0

 1773 23:10:06.824599  Final RX Vref Byte 1 = 59 to rank0

 1774 23:10:06.828737  Final RX Vref Byte 0 = 60 to rank1

 1775 23:10:06.831757  Final RX Vref Byte 1 = 59 to rank1==

 1776 23:10:06.834981  Dram Type= 6, Freq= 0, CH_1, rank 0

 1777 23:10:06.838082  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1778 23:10:06.841155  ==

 1779 23:10:06.841265  DQS Delay:

 1780 23:10:06.841401  DQS0 = 0, DQS1 = 0

 1781 23:10:06.844434  DQM Delay:

 1782 23:10:06.844515  DQM0 = 83, DQM1 = 73

 1783 23:10:06.848061  DQ Delay:

 1784 23:10:06.850886  DQ0 =84, DQ1 =76, DQ2 =72, DQ3 =84

 1785 23:10:06.850967  DQ4 =84, DQ5 =92, DQ6 =92, DQ7 =80

 1786 23:10:06.855146  DQ8 =60, DQ9 =60, DQ10 =72, DQ11 =72

 1787 23:10:06.858042  DQ12 =84, DQ13 =84, DQ14 =80, DQ15 =76

 1788 23:10:06.858158  

 1789 23:10:06.861455  

 1790 23:10:06.867854  [DQSOSCAuto] RK0, (LSB)MR18= 0x29fe, (MSB)MR19= 0x605, tDQSOscB0 = 410 ps tDQSOscB1 = 399 ps

 1791 23:10:06.871419  CH1 RK0: MR19=605, MR18=29FE

 1792 23:10:06.874839  CH1_RK0: MR19=0x605, MR18=0x29FE, DQSOSC=399, MR23=63, INC=92, DEC=61

 1793 23:10:06.878381  

 1794 23:10:06.881242  ----->DramcWriteLeveling(PI) begin...

 1795 23:10:06.881324  ==

 1796 23:10:06.884966  Dram Type= 6, Freq= 0, CH_1, rank 1

 1797 23:10:06.888036  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1798 23:10:06.888149  ==

 1799 23:10:06.891483  Write leveling (Byte 0): 26 => 26

 1800 23:10:06.894697  Write leveling (Byte 1): 30 => 30

 1801 23:10:06.898182  DramcWriteLeveling(PI) end<-----

 1802 23:10:06.898262  

 1803 23:10:06.898325  ==

 1804 23:10:06.901757  Dram Type= 6, Freq= 0, CH_1, rank 1

 1805 23:10:06.904954  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1806 23:10:06.905035  ==

 1807 23:10:06.908453  [Gating] SW mode calibration

 1808 23:10:06.915347  [GatingStartPos] MR0_LatencyMode 0, u1RealRL 14 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0

 1809 23:10:06.918821  RX_Path_delay_UI(22) -3 - DQSINCTL_UI(16) = u1StartUI(6)

 1810 23:10:06.925296   0  6  0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)

 1811 23:10:06.929072   0  6  4 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)

 1812 23:10:06.932122   0  6  8 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)

 1813 23:10:06.938687   0  6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1814 23:10:06.941962   0  6 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1815 23:10:06.945522   0  6 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1816 23:10:06.951879   0  6 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1817 23:10:06.955661   0  6 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1818 23:10:06.959019   0  7  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1819 23:10:06.965658   0  7  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1820 23:10:06.968673   0  7  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1821 23:10:06.972185   0  7 12 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)

 1822 23:10:06.975379   0  7 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1823 23:10:06.982257   0  7 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1824 23:10:06.985314   0  7 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1825 23:10:06.989233   0  7 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1826 23:10:06.995730   0  8  0 | B1->B0 | 2323 2323 | 0 0 | (0 1) (0 1)

 1827 23:10:06.999212   0  8  4 | B1->B0 | 2323 2323 | 0 0 | (0 1) (1 0)

 1828 23:10:07.002411   0  8  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1829 23:10:07.009358   0  8 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1830 23:10:07.012129   0  8 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1831 23:10:07.015561   0  8 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1832 23:10:07.022095   0  8 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1833 23:10:07.025634   0  8 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1834 23:10:07.028896   0  9  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1835 23:10:07.036950   0  9  4 | B1->B0 | 2323 2626 | 0 0 | (0 0) (0 0)

 1836 23:10:07.039702   0  9  8 | B1->B0 | 2e2e 3434 | 0 0 | (0 0) (0 0)

 1837 23:10:07.042290   0  9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 1838 23:10:07.045915   0  9 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 1839 23:10:07.052884   0  9 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 1840 23:10:07.056031   0  9 24 | B1->B0 | 3535 3434 | 0 1 | (0 0) (1 1)

 1841 23:10:07.059139   0  9 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 1842 23:10:07.065870   0 10  0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 1843 23:10:07.069225   0 10  4 | B1->B0 | 3131 2e2e | 0 0 | (0 0) (0 0)

 1844 23:10:07.072756   0 10  8 | B1->B0 | 2626 2323 | 0 0 | (0 0) (0 0)

 1845 23:10:07.079374   0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1846 23:10:07.083084   0 10 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1847 23:10:07.086410   0 10 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1848 23:10:07.093081   0 10 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1849 23:10:07.096574   0 10 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1850 23:10:07.099549   0 11  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 1851 23:10:07.103034   0 11  4 | B1->B0 | 2d2d 3737 | 0 0 | (0 0) (0 0)

 1852 23:10:07.109309   0 11  8 | B1->B0 | 3d3d 4646 | 0 0 | (0 0) (0 0)

 1853 23:10:07.113140   0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1854 23:10:07.116164   0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1855 23:10:07.122769   0 11 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1856 23:10:07.126125   0 11 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1857 23:10:07.129524   0 11 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1858 23:10:07.136258   0 12  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1859 23:10:07.140058   0 12  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 1860 23:10:07.142959   0 12  8 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)

 1861 23:10:07.149862   0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1862 23:10:07.153653   0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1863 23:10:07.157030   0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1864 23:10:07.163344   0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1865 23:10:07.166287   0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1866 23:10:07.169992   0 13  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1867 23:10:07.173508   0 13  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1868 23:10:07.179773   0 13  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1869 23:10:07.183319   0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1870 23:10:07.186263   0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1871 23:10:07.193533   0 13 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1872 23:10:07.196840   0 13 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1873 23:10:07.200326   0 13 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1874 23:10:07.206834   0 14  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 1875 23:10:07.210258   0 14  4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)

 1876 23:10:07.213444  Total UI for P1: 0, mck2ui 16

 1877 23:10:07.216839  best dqsien dly found for B0: ( 0, 14,  2)

 1878 23:10:07.220216   0 14  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 1879 23:10:07.223601  Total UI for P1: 0, mck2ui 16

 1880 23:10:07.227161  best dqsien dly found for B1: ( 0, 14,  4)

 1881 23:10:07.230708  best DQS0 dly(MCK, UI, PI) = (0, 14, 2)

 1882 23:10:07.234034  best DQS1 dly(MCK, UI, PI) = (0, 14, 4)

 1883 23:10:07.234145  

 1884 23:10:07.236961  best DQS0 P1 dly(MCK, UI, PI) = (1, 2, 2)

 1885 23:10:07.240847  best DQS1 P1 dly(MCK, UI, PI) = (1, 2, 4)

 1886 23:10:07.244177  [Gating] SW calibration Done

 1887 23:10:07.244293  ==

 1888 23:10:07.247024  Dram Type= 6, Freq= 0, CH_1, rank 1

 1889 23:10:07.250970  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1890 23:10:07.254038  ==

 1891 23:10:07.254147  RX Vref Scan: 0

 1892 23:10:07.254251  

 1893 23:10:07.257368  RX Vref 0 -> 0, step: 1

 1894 23:10:07.257483  

 1895 23:10:07.260423  RX Delay -130 -> 252, step: 16

 1896 23:10:07.264221  iDelay=206, Bit 0, Center 85 (-34 ~ 205) 240

 1897 23:10:07.267530  iDelay=206, Bit 1, Center 69 (-50 ~ 189) 240

 1898 23:10:07.271291  iDelay=206, Bit 2, Center 69 (-50 ~ 189) 240

 1899 23:10:07.274406  iDelay=206, Bit 3, Center 85 (-34 ~ 205) 240

 1900 23:10:07.280777  iDelay=206, Bit 4, Center 85 (-34 ~ 205) 240

 1901 23:10:07.283971  iDelay=206, Bit 5, Center 93 (-18 ~ 205) 224

 1902 23:10:07.287946  iDelay=206, Bit 6, Center 85 (-34 ~ 205) 240

 1903 23:10:07.290720  iDelay=206, Bit 7, Center 77 (-34 ~ 189) 224

 1904 23:10:07.294733  iDelay=206, Bit 8, Center 69 (-50 ~ 189) 240

 1905 23:10:07.297839  iDelay=206, Bit 9, Center 69 (-50 ~ 189) 240

 1906 23:10:07.304332  iDelay=206, Bit 10, Center 77 (-34 ~ 189) 224

 1907 23:10:07.307680  iDelay=206, Bit 11, Center 69 (-50 ~ 189) 240

 1908 23:10:07.311271  iDelay=206, Bit 12, Center 85 (-34 ~ 205) 240

 1909 23:10:07.314234  iDelay=206, Bit 13, Center 85 (-34 ~ 205) 240

 1910 23:10:07.317792  iDelay=206, Bit 14, Center 85 (-34 ~ 205) 240

 1911 23:10:07.324321  iDelay=206, Bit 15, Center 85 (-34 ~ 205) 240

 1912 23:10:07.324430  ==

 1913 23:10:07.327405  Dram Type= 6, Freq= 0, CH_1, rank 1

 1914 23:10:07.330884  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1915 23:10:07.330993  ==

 1916 23:10:07.331093  DQS Delay:

 1917 23:10:07.334361  DQS0 = 0, DQS1 = 0

 1918 23:10:07.334472  DQM Delay:

 1919 23:10:07.337723  DQM0 = 81, DQM1 = 78

 1920 23:10:07.337802  DQ Delay:

 1921 23:10:07.341196  DQ0 =85, DQ1 =69, DQ2 =69, DQ3 =85

 1922 23:10:07.344284  DQ4 =85, DQ5 =93, DQ6 =85, DQ7 =77

 1923 23:10:07.347773  DQ8 =69, DQ9 =69, DQ10 =77, DQ11 =69

 1924 23:10:07.351669  DQ12 =85, DQ13 =85, DQ14 =85, DQ15 =85

 1925 23:10:07.351753  

 1926 23:10:07.351837  

 1927 23:10:07.351935  ==

 1928 23:10:07.354195  Dram Type= 6, Freq= 0, CH_1, rank 1

 1929 23:10:07.357554  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1930 23:10:07.357665  ==

 1931 23:10:07.357749  

 1932 23:10:07.362338  

 1933 23:10:07.362481  	TX Vref Scan disable

 1934 23:10:07.364478   == TX Byte 0 ==

 1935 23:10:07.368125  Update DQ  dly =576 (2 ,1, 32)  DQ  OEN =(1 ,6)

 1936 23:10:07.370964  Update DQM dly =576 (2 ,1, 32)  DQM OEN =(1 ,6)

 1937 23:10:07.375052   == TX Byte 1 ==

 1938 23:10:07.377916  Update DQ  dly =581 (2 ,1, 37)  DQ  OEN =(1 ,6)

 1939 23:10:07.381657  Update DQM dly =581 (2 ,1, 37)  DQM OEN =(1 ,6)

 1940 23:10:07.381771  ==

 1941 23:10:07.384642  Dram Type= 6, Freq= 0, CH_1, rank 1

 1942 23:10:07.391349  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1943 23:10:07.391498  ==

 1944 23:10:07.403415  TX Vref=22, minBit 0, minWin=27, winSum=440

 1945 23:10:07.406803  TX Vref=24, minBit 5, minWin=27, winSum=446

 1946 23:10:07.409694  TX Vref=26, minBit 13, minWin=27, winSum=448

 1947 23:10:07.413385  TX Vref=28, minBit 15, minWin=27, winSum=450

 1948 23:10:07.416657  TX Vref=30, minBit 0, minWin=28, winSum=456

 1949 23:10:07.419896  TX Vref=32, minBit 0, minWin=28, winSum=458

 1950 23:10:07.427028  [TxChooseVref] Worse bit 0, Min win 28, Win sum 458, Final Vref 32

 1951 23:10:07.427170  

 1952 23:10:07.430197  Final TX Range 1 Vref 32

 1953 23:10:07.430314  

 1954 23:10:07.430420  ==

 1955 23:10:07.433664  Dram Type= 6, Freq= 0, CH_1, rank 1

 1956 23:10:07.437061  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1957 23:10:07.437183  ==

 1958 23:10:07.437281  

 1959 23:10:07.437384  

 1960 23:10:07.440281  	TX Vref Scan disable

 1961 23:10:07.443488   == TX Byte 0 ==

 1962 23:10:07.446706  Update DQ  dly =576 (2 ,1, 32)  DQ  OEN =(1 ,6)

 1963 23:10:07.450183  Update DQM dly =576 (2 ,1, 32)  DQM OEN =(1 ,6)

 1964 23:10:07.453291   == TX Byte 1 ==

 1965 23:10:07.456510  Update DQ  dly =580 (2 ,1, 36)  DQ  OEN =(1 ,6)

 1966 23:10:07.460279  Update DQM dly =580 (2 ,1, 36)  DQM OEN =(1 ,6)

 1967 23:10:07.460415  

 1968 23:10:07.463332  [DATLAT]

 1969 23:10:07.463453  Freq=800, CH1 RK1

 1970 23:10:07.463547  

 1971 23:10:07.466767  DATLAT Default: 0xa

 1972 23:10:07.466879  0, 0xFFFF, sum = 0

 1973 23:10:07.470150  1, 0xFFFF, sum = 0

 1974 23:10:07.470262  2, 0xFFFF, sum = 0

 1975 23:10:07.473284  3, 0xFFFF, sum = 0

 1976 23:10:07.473402  4, 0xFFFF, sum = 0

 1977 23:10:07.477166  5, 0xFFFF, sum = 0

 1978 23:10:07.477301  6, 0xFFFF, sum = 0

 1979 23:10:07.480187  7, 0xFFFF, sum = 0

 1980 23:10:07.480303  8, 0xFFFF, sum = 0

 1981 23:10:07.483824  9, 0x0, sum = 1

 1982 23:10:07.483959  10, 0x0, sum = 2

 1983 23:10:07.486866  11, 0x0, sum = 3

 1984 23:10:07.486952  12, 0x0, sum = 4

 1985 23:10:07.490388  best_step = 10

 1986 23:10:07.490474  

 1987 23:10:07.490551  ==

 1988 23:10:07.493397  Dram Type= 6, Freq= 0, CH_1, rank 1

 1989 23:10:07.497315  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 1990 23:10:07.497436  ==

 1991 23:10:07.500798  RX Vref Scan: 0

 1992 23:10:07.500905  

 1993 23:10:07.501006  RX Vref 0 -> 0, step: 1

 1994 23:10:07.501099  

 1995 23:10:07.503875  RX Delay -95 -> 252, step: 8

 1996 23:10:07.510227  iDelay=209, Bit 0, Center 84 (-31 ~ 200) 232

 1997 23:10:07.514064  iDelay=209, Bit 1, Center 72 (-47 ~ 192) 240

 1998 23:10:07.516678  iDelay=209, Bit 2, Center 68 (-47 ~ 184) 232

 1999 23:10:07.520290  iDelay=209, Bit 3, Center 76 (-39 ~ 192) 232

 2000 23:10:07.523910  iDelay=209, Bit 4, Center 80 (-39 ~ 200) 240

 2001 23:10:07.527034  iDelay=209, Bit 5, Center 92 (-23 ~ 208) 232

 2002 23:10:07.533806  iDelay=209, Bit 6, Center 92 (-23 ~ 208) 232

 2003 23:10:07.537032  iDelay=209, Bit 7, Center 76 (-39 ~ 192) 232

 2004 23:10:07.540785  iDelay=209, Bit 8, Center 64 (-55 ~ 184) 240

 2005 23:10:07.543875  iDelay=209, Bit 9, Center 60 (-55 ~ 176) 232

 2006 23:10:07.547343  iDelay=209, Bit 10, Center 76 (-39 ~ 192) 232

 2007 23:10:07.554330  iDelay=209, Bit 11, Center 68 (-47 ~ 184) 232

 2008 23:10:07.557051  iDelay=209, Bit 12, Center 80 (-31 ~ 192) 224

 2009 23:10:07.561186  iDelay=209, Bit 13, Center 84 (-31 ~ 200) 232

 2010 23:10:07.564194  iDelay=209, Bit 14, Center 84 (-31 ~ 200) 232

 2011 23:10:07.568067  iDelay=209, Bit 15, Center 84 (-31 ~ 200) 232

 2012 23:10:07.571210  ==

 2013 23:10:07.571324  Dram Type= 6, Freq= 0, CH_1, rank 1

 2014 23:10:07.577288  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2015 23:10:07.577399  ==

 2016 23:10:07.577492  DQS Delay:

 2017 23:10:07.581437  DQS0 = 0, DQS1 = 0

 2018 23:10:07.581537  DQM Delay:

 2019 23:10:07.584310  DQM0 = 80, DQM1 = 75

 2020 23:10:07.584412  DQ Delay:

 2021 23:10:07.587828  DQ0 =84, DQ1 =72, DQ2 =68, DQ3 =76

 2022 23:10:07.591099  DQ4 =80, DQ5 =92, DQ6 =92, DQ7 =76

 2023 23:10:07.594468  DQ8 =64, DQ9 =60, DQ10 =76, DQ11 =68

 2024 23:10:07.597913  DQ12 =80, DQ13 =84, DQ14 =84, DQ15 =84

 2025 23:10:07.598020  

 2026 23:10:07.598113  

 2027 23:10:07.604186  [DQSOSCAuto] RK1, (LSB)MR18= 0x232f, (MSB)MR19= 0x606, tDQSOscB0 = 397 ps tDQSOscB1 = 401 ps

 2028 23:10:07.608109  CH1 RK1: MR19=606, MR18=232F

 2029 23:10:07.614414  CH1_RK1: MR19=0x606, MR18=0x232F, DQSOSC=397, MR23=63, INC=93, DEC=62

 2030 23:10:07.617714  [RxdqsGatingPostProcess] freq 800

 2031 23:10:07.621274  ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1

 2032 23:10:07.625093  Pre-setting of DQS Precalculation

 2033 23:10:07.631042  [DualRankRxdatlatCal] RK0: 10, RK1: 10, Final_Datlat 10

 2034 23:10:07.638318  sync_frequency_calibration_params sync calibration params of frequency 800 to shu:4

 2035 23:10:07.644502  calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464

 2036 23:10:07.644617  

 2037 23:10:07.644713  

 2038 23:10:07.648511  [Calibration Summary] 1600 Mbps

 2039 23:10:07.648615  CH 0, Rank 0

 2040 23:10:07.651542  SW Impedance     : PASS

 2041 23:10:07.651622  DUTY Scan        : NO K

 2042 23:10:07.654741  ZQ Calibration   : PASS

 2043 23:10:07.658732  Jitter Meter     : NO K

 2044 23:10:07.658807  CBT Training     : PASS

 2045 23:10:07.661413  Write leveling   : PASS

 2046 23:10:07.664989  RX DQS gating    : PASS

 2047 23:10:07.665092  RX DQ/DQS(RDDQC) : PASS

 2048 23:10:07.668709  TX DQ/DQS        : PASS

 2049 23:10:07.671854  RX DATLAT        : PASS

 2050 23:10:07.671954  RX DQ/DQS(Engine): PASS

 2051 23:10:07.674994  TX OE            : NO K

 2052 23:10:07.675069  All Pass.

 2053 23:10:07.675161  

 2054 23:10:07.678274  CH 0, Rank 1

 2055 23:10:07.678371  SW Impedance     : PASS

 2056 23:10:07.681916  DUTY Scan        : NO K

 2057 23:10:07.685357  ZQ Calibration   : PASS

 2058 23:10:07.685436  Jitter Meter     : NO K

 2059 23:10:07.688983  CBT Training     : PASS

 2060 23:10:07.689085  Write leveling   : PASS

 2061 23:10:07.692191  RX DQS gating    : PASS

 2062 23:10:07.695257  RX DQ/DQS(RDDQC) : PASS

 2063 23:10:07.695330  TX DQ/DQS        : PASS

 2064 23:10:07.698194  RX DATLAT        : PASS

 2065 23:10:07.701745  RX DQ/DQS(Engine): PASS

 2066 23:10:07.701843  TX OE            : NO K

 2067 23:10:07.705547  All Pass.

 2068 23:10:07.705652  

 2069 23:10:07.705745  CH 1, Rank 0

 2070 23:10:07.708744  SW Impedance     : PASS

 2071 23:10:07.708845  DUTY Scan        : NO K

 2072 23:10:07.711835  ZQ Calibration   : PASS

 2073 23:10:07.715256  Jitter Meter     : NO K

 2074 23:10:07.715331  CBT Training     : PASS

 2075 23:10:07.718629  Write leveling   : PASS

 2076 23:10:07.718707  RX DQS gating    : PASS

 2077 23:10:07.721844  RX DQ/DQS(RDDQC) : PASS

 2078 23:10:07.725293  TX DQ/DQS        : PASS

 2079 23:10:07.725396  RX DATLAT        : PASS

 2080 23:10:07.728785  RX DQ/DQS(Engine): PASS

 2081 23:10:07.731796  TX OE            : NO K

 2082 23:10:07.731894  All Pass.

 2083 23:10:07.731982  

 2084 23:10:07.732076  CH 1, Rank 1

 2085 23:10:07.735386  SW Impedance     : PASS

 2086 23:10:07.738813  DUTY Scan        : NO K

 2087 23:10:07.738887  ZQ Calibration   : PASS

 2088 23:10:07.742315  Jitter Meter     : NO K

 2089 23:10:07.745899  CBT Training     : PASS

 2090 23:10:07.746002  Write leveling   : PASS

 2091 23:10:07.748884  RX DQS gating    : PASS

 2092 23:10:07.752418  RX DQ/DQS(RDDQC) : PASS

 2093 23:10:07.752489  TX DQ/DQS        : PASS

 2094 23:10:07.755677  RX DATLAT        : PASS

 2095 23:10:07.755750  RX DQ/DQS(Engine): PASS

 2096 23:10:07.759142  TX OE            : NO K

 2097 23:10:07.759213  All Pass.

 2098 23:10:07.759286  

 2099 23:10:07.762207  DramC Write-DBI off

 2100 23:10:07.765519  	PER_BANK_REFRESH: Hybrid Mode

 2101 23:10:07.765627  TX_TRACKING: ON

 2102 23:10:07.769619  [GetDramInforAfterCalByMRR] Vendor 6.

 2103 23:10:07.772378  [GetDramInforAfterCalByMRR] Revision 606.

 2104 23:10:07.775924  [GetDramInforAfterCalByMRR] Revision 2 0.

 2105 23:10:07.778898  MR0 0x3b3b

 2106 23:10:07.779006  MR8 0x5151

 2107 23:10:07.782241  RK0, DieNum 2, Density 16Gb, RKsize 32Gb.

 2108 23:10:07.782326  

 2109 23:10:07.782447  MR0 0x3b3b

 2110 23:10:07.785848  MR8 0x5151

 2111 23:10:07.789275  RK1, DieNum 2, Density 16Gb, RKsize 32Gb.

 2112 23:10:07.789383  

 2113 23:10:07.799488  [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 44, TRFC_05T 0, TXREFCNT 58, TRFCpb 16, TRFCpb_05T 0

 2114 23:10:07.803547  [FAST_K] Save calibration result to emmc

 2115 23:10:07.806114  [FAST_K] Save calibration result to emmc

 2116 23:10:07.806216  dram_init: config_dvfs: 1

 2117 23:10:07.812596  dramc_set_vcore_voltage set vcore to 662500

 2118 23:10:07.812707  Read voltage for 1200, 2

 2119 23:10:07.816405  Vio18 = 0

 2120 23:10:07.816506  Vcore = 662500

 2121 23:10:07.816606  Vdram = 0

 2122 23:10:07.816694  Vddq = 0

 2123 23:10:07.819267  Vmddr = 0

 2124 23:10:07.822962  [FAST_K] DramcSave_Time_For_Cal_Init SHU5, femmc_Ready=0

 2125 23:10:07.829488  [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0

 2126 23:10:07.832934  MEM_TYPE=3, freq_sel=15

 2127 23:10:07.833044  sv_algorithm_assistance_LP4_1600 

 2128 23:10:07.839632  ============ PULL DRAM RESETB DOWN ============

 2129 23:10:07.842775  ========== PULL DRAM RESETB DOWN end =========

 2130 23:10:07.846389  [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4

 2131 23:10:07.849383  =================================== 

 2132 23:10:07.853217  LPDDR4 DRAM CONFIGURATION

 2133 23:10:07.856051  =================================== 

 2134 23:10:07.859466  EX_ROW_EN[0]    = 0x0

 2135 23:10:07.859538  EX_ROW_EN[1]    = 0x0

 2136 23:10:07.863004  LP4Y_EN      = 0x0

 2137 23:10:07.863076  WORK_FSP     = 0x0

 2138 23:10:07.866150  WL           = 0x4

 2139 23:10:07.866256  RL           = 0x4

 2140 23:10:07.870277  BL           = 0x2

 2141 23:10:07.870378  RPST         = 0x0

 2142 23:10:07.873088  RD_PRE       = 0x0

 2143 23:10:07.873185  WR_PRE       = 0x1

 2144 23:10:07.876276  WR_PST       = 0x0

 2145 23:10:07.876346  DBI_WR       = 0x0

 2146 23:10:07.879713  DBI_RD       = 0x0

 2147 23:10:07.879789  OTF          = 0x1

 2148 23:10:07.883179  =================================== 

 2149 23:10:07.886595  =================================== 

 2150 23:10:07.890152  ANA top config

 2151 23:10:07.893744  =================================== 

 2152 23:10:07.893820  DLL_ASYNC_EN            =  0

 2153 23:10:07.896287  ALL_SLAVE_EN            =  0

 2154 23:10:07.899953  NEW_RANK_MODE           =  1

 2155 23:10:07.902928  DLL_IDLE_MODE           =  1

 2156 23:10:07.906792  LP45_APHY_COMB_EN       =  1

 2157 23:10:07.906896  TX_ODT_DIS              =  1

 2158 23:10:07.909884  NEW_8X_MODE             =  1

 2159 23:10:07.913463  =================================== 

 2160 23:10:07.916931  =================================== 

 2161 23:10:07.920038  data_rate                  = 2400

 2162 23:10:07.923095  CKR                        = 1

 2163 23:10:07.926658  DQ_P2S_RATIO               = 8

 2164 23:10:07.926735  =================================== 

 2165 23:10:07.930098  CA_P2S_RATIO               = 8

 2166 23:10:07.933401  DQ_CA_OPEN                 = 0

 2167 23:10:07.937005  DQ_SEMI_OPEN               = 0

 2168 23:10:07.939994  CA_SEMI_OPEN               = 0

 2169 23:10:07.943389  CA_FULL_RATE               = 0

 2170 23:10:07.943495  DQ_CKDIV4_EN               = 0

 2171 23:10:07.946856  CA_CKDIV4_EN               = 0

 2172 23:10:07.950112  CA_PREDIV_EN               = 0

 2173 23:10:07.953704  PH8_DLY                    = 17

 2174 23:10:07.956789  SEMI_OPEN_CA_PICK_MCK_RATIO= 0

 2175 23:10:07.960837  DQ_AAMCK_DIV               = 4

 2176 23:10:07.960918  CA_AAMCK_DIV               = 4

 2177 23:10:07.963859  CA_ADMCK_DIV               = 4

 2178 23:10:07.966835  DQ_TRACK_CA_EN             = 0

 2179 23:10:07.970243  CA_PICK                    = 1200

 2180 23:10:07.973798  CA_MCKIO                   = 1200

 2181 23:10:07.977094  MCKIO_SEMI                 = 0

 2182 23:10:07.980237  PLL_FREQ                   = 2366

 2183 23:10:07.980340  DQ_UI_PI_RATIO             = 32

 2184 23:10:07.984008  CA_UI_PI_RATIO             = 0

 2185 23:10:07.987182  =================================== 

 2186 23:10:07.990162  =================================== 

 2187 23:10:07.993909  memory_type:LPDDR4         

 2188 23:10:07.997005  GP_NUM     : 10       

 2189 23:10:07.997086  SRAM_EN    : 1       

 2190 23:10:08.000700  MD32_EN    : 0       

 2191 23:10:08.003662  =================================== 

 2192 23:10:08.003770  [ANA_INIT] >>>>>>>>>>>>>> 

 2193 23:10:08.007391  <<<<<< [CONFIGURE PHASE]: ANA_TX

 2194 23:10:08.010667  >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL

 2195 23:10:08.013611  =================================== 

 2196 23:10:08.018545  data_rate = 2400,PCW = 0X5b00

 2197 23:10:08.021040  =================================== 

 2198 23:10:08.023778  <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL

 2199 23:10:08.030637  >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration

 2200 23:10:08.033895  <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration

 2201 23:10:08.041076  >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2

 2202 23:10:08.044219  >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL

 2203 23:10:08.047595  <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL

 2204 23:10:08.047671  [ANA_INIT] flow start 

 2205 23:10:08.050486  [ANA_INIT] PLL >>>>>>>> 

 2206 23:10:08.053854  [ANA_INIT] PLL <<<<<<<< 

 2207 23:10:08.053955  [ANA_INIT] MIDPI >>>>>>>> 

 2208 23:10:08.057220  [ANA_INIT] MIDPI <<<<<<<< 

 2209 23:10:08.060601  [ANA_INIT] DLL >>>>>>>> 

 2210 23:10:08.064038  [ANA_INIT] DLL <<<<<<<< 

 2211 23:10:08.064120  [ANA_INIT] flow end 

 2212 23:10:08.068416  ============ LP4 DIFF to SE enter ============

 2213 23:10:08.074269  ============ LP4 DIFF to SE exit  ============

 2214 23:10:08.074376  [ANA_INIT] <<<<<<<<<<<<< 

 2215 23:10:08.077755  [Flow] Enable top DCM control >>>>> 

 2216 23:10:08.080593  [Flow] Enable top DCM control <<<<< 

 2217 23:10:08.084111  Enable DLL master slave shuffle 

 2218 23:10:08.090748  ============================================================== 

 2219 23:10:08.090829  Gating Mode config

 2220 23:10:08.097370  ============================================================== 

 2221 23:10:08.100542  Config description: 

 2222 23:10:08.107109  RX_GATING_MODE        0: Pulse Mode      1: Burst Mode(8UI)        2: Burst Mode(7UI)  3: Original Burst Mode

 2223 23:10:08.117209  RX_GATING_TRACK_MODE  0: Valid DLY Mode  1: Valid Mode (-like) 2: FIFO mode

 2224 23:10:08.120919  SELPH_MODE            0: By rank         1: By Phase 

 2225 23:10:08.127603  ============================================================== 

 2226 23:10:08.127712  GAT_TRACK_EN                 =  1

 2227 23:10:08.131350  RX_GATING_MODE               =  2

 2228 23:10:08.134054  RX_GATING_TRACK_MODE         =  2

 2229 23:10:08.137541  SELPH_MODE                   =  1

 2230 23:10:08.140777  PICG_EARLY_EN                =  1

 2231 23:10:08.144276  VALID_LAT_VALUE              =  1

 2232 23:10:08.150753  ============================================================== 

 2233 23:10:08.154266  Enter into Gating configuration >>>> 

 2234 23:10:08.157341  Exit from Gating configuration <<<< 

 2235 23:10:08.161256  Enter into  DVFS_PRE_config >>>>> 

 2236 23:10:08.170902  Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL. 

 2237 23:10:08.174215  Exit from  DVFS_PRE_config <<<<< 

 2238 23:10:08.177640  Enter into PICG configuration >>>> 

 2239 23:10:08.180828  Exit from PICG configuration <<<< 

 2240 23:10:08.180901  [RX_INPUT] configuration >>>>> 

 2241 23:10:08.184583  [RX_INPUT] configuration <<<<< 

 2242 23:10:08.191417  [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>

 2243 23:10:08.194957  [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<

 2244 23:10:08.201189  [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>

 2245 23:10:08.208082  [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<

 2246 23:10:08.214546  [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>

 2247 23:10:08.221024  [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<

 2248 23:10:08.224528  [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0 

 2249 23:10:08.228181  [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0 

 2250 23:10:08.231370  [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0 

 2251 23:10:08.237901  [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0 

 2252 23:10:08.241210  [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0 

 2253 23:10:08.244982  [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4

 2254 23:10:08.248695  =================================== 

 2255 23:10:08.251442  LPDDR4 DRAM CONFIGURATION

 2256 23:10:08.254690  =================================== 

 2257 23:10:08.254765  EX_ROW_EN[0]    = 0x0

 2258 23:10:08.258271  EX_ROW_EN[1]    = 0x0

 2259 23:10:08.261446  LP4Y_EN      = 0x0

 2260 23:10:08.261544  WORK_FSP     = 0x0

 2261 23:10:08.264650  WL           = 0x4

 2262 23:10:08.264724  RL           = 0x4

 2263 23:10:08.268482  BL           = 0x2

 2264 23:10:08.268582  RPST         = 0x0

 2265 23:10:08.271644  RD_PRE       = 0x0

 2266 23:10:08.271717  WR_PRE       = 0x1

 2267 23:10:08.274941  WR_PST       = 0x0

 2268 23:10:08.275034  DBI_WR       = 0x0

 2269 23:10:08.278839  DBI_RD       = 0x0

 2270 23:10:08.278906  OTF          = 0x1

 2271 23:10:08.282043  =================================== 

 2272 23:10:08.285007  [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0 

 2273 23:10:08.291669  [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0 

 2274 23:10:08.295427  [ModeRegister RLWL Config] data_rate:2400-MR2_RLWL:4

 2275 23:10:08.298830  =================================== 

 2276 23:10:08.302103  LPDDR4 DRAM CONFIGURATION

 2277 23:10:08.304961  =================================== 

 2278 23:10:08.305062  EX_ROW_EN[0]    = 0x10

 2279 23:10:08.308859  EX_ROW_EN[1]    = 0x0

 2280 23:10:08.308961  LP4Y_EN      = 0x0

 2281 23:10:08.312217  WORK_FSP     = 0x0

 2282 23:10:08.312315  WL           = 0x4

 2283 23:10:08.315404  RL           = 0x4

 2284 23:10:08.315477  BL           = 0x2

 2285 23:10:08.318722  RPST         = 0x0

 2286 23:10:08.318796  RD_PRE       = 0x0

 2287 23:10:08.321797  WR_PRE       = 0x1

 2288 23:10:08.321892  WR_PST       = 0x0

 2289 23:10:08.325466  DBI_WR       = 0x0

 2290 23:10:08.325569  DBI_RD       = 0x0

 2291 23:10:08.328888  OTF          = 0x1

 2292 23:10:08.332021  =================================== 

 2293 23:10:08.339048  [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit

 2294 23:10:08.339137  ==

 2295 23:10:08.342131  Dram Type= 6, Freq= 0, CH_0, rank 0

 2296 23:10:08.345241  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2297 23:10:08.345374  ==

 2298 23:10:08.348670  [Duty_Offset_Calibration]

 2299 23:10:08.348753  	B0:2	B1:-1	CA:1

 2300 23:10:08.348849  

 2301 23:10:08.352275  [DutyScan_Calibration_Flow] k_type=0

 2302 23:10:08.362460  

 2303 23:10:08.362537  ==CLK 0==

 2304 23:10:08.365880  Final CLK duty delay cell = -4

 2305 23:10:08.369126  [-4] MAX Duty = 5031%(X100), DQS PI = 4

 2306 23:10:08.372033  [-4] MIN Duty = 4875%(X100), DQS PI = 30

 2307 23:10:08.375798  [-4] AVG Duty = 4953%(X100)

 2308 23:10:08.375873  

 2309 23:10:08.378447  CH0 CLK Duty spec in!! Max-Min= 156%

 2310 23:10:08.382018  [DutyScan_Calibration_Flow] ====Done====

 2311 23:10:08.382132  

 2312 23:10:08.385276  [DutyScan_Calibration_Flow] k_type=1

 2313 23:10:08.401065  

 2314 23:10:08.401195  ==DQS 0 ==

 2315 23:10:08.404290  Final DQS duty delay cell = 0

 2316 23:10:08.407742  [0] MAX Duty = 5125%(X100), DQS PI = 48

 2317 23:10:08.411090  [0] MIN Duty = 5000%(X100), DQS PI = 14

 2318 23:10:08.411200  [0] AVG Duty = 5062%(X100)

 2319 23:10:08.414033  

 2320 23:10:08.414132  ==DQS 1 ==

 2321 23:10:08.418008  Final DQS duty delay cell = -4

 2322 23:10:08.421349  [-4] MAX Duty = 5124%(X100), DQS PI = 6

 2323 23:10:08.423965  [-4] MIN Duty = 5000%(X100), DQS PI = 44

 2324 23:10:08.427705  [-4] AVG Duty = 5062%(X100)

 2325 23:10:08.427806  

 2326 23:10:08.431098  CH0 DQS 0 Duty spec in!! Max-Min= 125%

 2327 23:10:08.431199  

 2328 23:10:08.434321  CH0 DQS 1 Duty spec in!! Max-Min= 124%

 2329 23:10:08.437793  [DutyScan_Calibration_Flow] ====Done====

 2330 23:10:08.437900  

 2331 23:10:08.441503  [DutyScan_Calibration_Flow] k_type=3

 2332 23:10:08.457715  

 2333 23:10:08.457798  ==DQM 0 ==

 2334 23:10:08.461502  Final DQM duty delay cell = 0

 2335 23:10:08.465057  [0] MAX Duty = 5000%(X100), DQS PI = 46

 2336 23:10:08.467582  [0] MIN Duty = 4907%(X100), DQS PI = 2

 2337 23:10:08.467688  [0] AVG Duty = 4953%(X100)

 2338 23:10:08.467780  

 2339 23:10:08.471228  ==DQM 1 ==

 2340 23:10:08.474792  Final DQM duty delay cell = 0

 2341 23:10:08.478158  [0] MAX Duty = 5156%(X100), DQS PI = 62

 2342 23:10:08.480967  [0] MIN Duty = 4969%(X100), DQS PI = 10

 2343 23:10:08.481068  [0] AVG Duty = 5062%(X100)

 2344 23:10:08.481166  

 2345 23:10:08.484335  CH0 DQM 0 Duty spec in!! Max-Min= 93%

 2346 23:10:08.484441  

 2347 23:10:08.491523  CH0 DQM 1 Duty spec in!! Max-Min= 187%

 2348 23:10:08.494664  [DutyScan_Calibration_Flow] ====Done====

 2349 23:10:08.494755  

 2350 23:10:08.498032  [DutyScan_Calibration_Flow] k_type=2

 2351 23:10:08.513772  

 2352 23:10:08.513912  ==DQ 0 ==

 2353 23:10:08.516696  Final DQ duty delay cell = -4

 2354 23:10:08.520353  [-4] MAX Duty = 5062%(X100), DQS PI = 54

 2355 23:10:08.523888  [-4] MIN Duty = 4876%(X100), DQS PI = 12

 2356 23:10:08.527316  [-4] AVG Duty = 4969%(X100)

 2357 23:10:08.527397  

 2358 23:10:08.527461  ==DQ 1 ==

 2359 23:10:08.530159  Final DQ duty delay cell = 0

 2360 23:10:08.533570  [0] MAX Duty = 5031%(X100), DQS PI = 18

 2361 23:10:08.536585  [0] MIN Duty = 4907%(X100), DQS PI = 46

 2362 23:10:08.536665  [0] AVG Duty = 4969%(X100)

 2363 23:10:08.536729  

 2364 23:10:08.540204  CH0 DQ 0 Duty spec in!! Max-Min= 186%

 2365 23:10:08.543580  

 2366 23:10:08.546685  CH0 DQ 1 Duty spec in!! Max-Min= 124%

 2367 23:10:08.550283  [DutyScan_Calibration_Flow] ====Done====

 2368 23:10:08.550404  ==

 2369 23:10:08.554021  Dram Type= 6, Freq= 0, CH_1, rank 0

 2370 23:10:08.556753  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2371 23:10:08.556861  ==

 2372 23:10:08.560320  [Duty_Offset_Calibration]

 2373 23:10:08.560426  	B0:1	B1:1	CA:2

 2374 23:10:08.560527  

 2375 23:10:08.563740  [DutyScan_Calibration_Flow] k_type=0

 2376 23:10:08.573696  

 2377 23:10:08.573795  ==CLK 0==

 2378 23:10:08.577025  Final CLK duty delay cell = 0

 2379 23:10:08.580810  [0] MAX Duty = 5156%(X100), DQS PI = 24

 2380 23:10:08.584390  [0] MIN Duty = 4969%(X100), DQS PI = 38

 2381 23:10:08.584471  [0] AVG Duty = 5062%(X100)

 2382 23:10:08.584535  

 2383 23:10:08.587403  CH1 CLK Duty spec in!! Max-Min= 187%

 2384 23:10:08.593817  [DutyScan_Calibration_Flow] ====Done====

 2385 23:10:08.593898  

 2386 23:10:08.597447  [DutyScan_Calibration_Flow] k_type=1

 2387 23:10:08.612744  

 2388 23:10:08.612861  ==DQS 0 ==

 2389 23:10:08.616329  Final DQS duty delay cell = 0

 2390 23:10:08.619527  [0] MAX Duty = 5031%(X100), DQS PI = 18

 2391 23:10:08.623008  [0] MIN Duty = 4844%(X100), DQS PI = 50

 2392 23:10:08.623082  [0] AVG Duty = 4937%(X100)

 2393 23:10:08.626501  

 2394 23:10:08.626598  ==DQS 1 ==

 2395 23:10:08.629641  Final DQS duty delay cell = 0

 2396 23:10:08.633039  [0] MAX Duty = 5062%(X100), DQS PI = 36

 2397 23:10:08.636781  [0] MIN Duty = 4907%(X100), DQS PI = 16

 2398 23:10:08.636856  [0] AVG Duty = 4984%(X100)

 2399 23:10:08.639479  

 2400 23:10:08.643233  CH1 DQS 0 Duty spec in!! Max-Min= 187%

 2401 23:10:08.643317  

 2402 23:10:08.646552  CH1 DQS 1 Duty spec in!! Max-Min= 155%

 2403 23:10:08.649852  [DutyScan_Calibration_Flow] ====Done====

 2404 23:10:08.649923  

 2405 23:10:08.653218  [DutyScan_Calibration_Flow] k_type=3

 2406 23:10:08.669456  

 2407 23:10:08.669557  ==DQM 0 ==

 2408 23:10:08.672737  Final DQM duty delay cell = 0

 2409 23:10:08.676254  [0] MAX Duty = 5093%(X100), DQS PI = 18

 2410 23:10:08.679998  [0] MIN Duty = 4875%(X100), DQS PI = 48

 2411 23:10:08.680101  [0] AVG Duty = 4984%(X100)

 2412 23:10:08.680201  

 2413 23:10:08.683272  ==DQM 1 ==

 2414 23:10:08.686218  Final DQM duty delay cell = 0

 2415 23:10:08.690089  [0] MAX Duty = 5156%(X100), DQS PI = 62

 2416 23:10:08.693171  [0] MIN Duty = 4938%(X100), DQS PI = 22

 2417 23:10:08.693272  [0] AVG Duty = 5047%(X100)

 2418 23:10:08.693371  

 2419 23:10:08.696893  CH1 DQM 0 Duty spec in!! Max-Min= 218%

 2420 23:10:08.700198  

 2421 23:10:08.703435  CH1 DQM 1 Duty spec in!! Max-Min= 218%

 2422 23:10:08.706377  [DutyScan_Calibration_Flow] ====Done====

 2423 23:10:08.706514  

 2424 23:10:08.710013  [DutyScan_Calibration_Flow] k_type=2

 2425 23:10:08.726564  

 2426 23:10:08.726681  ==DQ 0 ==

 2427 23:10:08.729537  Final DQ duty delay cell = 0

 2428 23:10:08.732990  [0] MAX Duty = 5124%(X100), DQS PI = 18

 2429 23:10:08.736021  [0] MIN Duty = 4969%(X100), DQS PI = 12

 2430 23:10:08.736096  [0] AVG Duty = 5046%(X100)

 2431 23:10:08.736159  

 2432 23:10:08.739443  ==DQ 1 ==

 2433 23:10:08.742880  Final DQ duty delay cell = 0

 2434 23:10:08.746257  [0] MAX Duty = 5093%(X100), DQS PI = 8

 2435 23:10:08.749423  [0] MIN Duty = 5031%(X100), DQS PI = 2

 2436 23:10:08.749531  [0] AVG Duty = 5062%(X100)

 2437 23:10:08.749622  

 2438 23:10:08.752692  CH1 DQ 0 Duty spec in!! Max-Min= 155%

 2439 23:10:08.752791  

 2440 23:10:08.756604  CH1 DQ 1 Duty spec in!! Max-Min= 62%

 2441 23:10:08.763052  [DutyScan_Calibration_Flow] ====Done====

 2442 23:10:08.766321  nWR fixed to 30

 2443 23:10:08.766445  [ModeRegInit_LP4] CH0 RK0

 2444 23:10:08.769810  [ModeRegInit_LP4] CH0 RK1

 2445 23:10:08.773784  [ModeRegInit_LP4] CH1 RK0

 2446 23:10:08.773857  [ModeRegInit_LP4] CH1 RK1

 2447 23:10:08.776301  match AC timing 7

 2448 23:10:08.779440  dramType 5, freq 1200, readDBI 0, DivMode 1, cbtMode 1

 2449 23:10:08.783456  SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON

 2450 23:10:08.789682  [WriteLatency GET] Version:0-MR_RL_field_value:4-WL:12

 2451 23:10:08.793307  [TX_path_calculate] data rate=2400, WL=12, DQS_TotalUI=25

 2452 23:10:08.796766  [TX_path_calculate] DQS = (3,1) DQS_OE = (2,6)

 2453 23:10:08.800070  ==

 2454 23:10:08.803033  Dram Type= 6, Freq= 0, CH_0, rank 0

 2455 23:10:08.806717  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2456 23:10:08.806795  ==

 2457 23:10:08.809921  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 2458 23:10:08.817003  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39

 2459 23:10:08.825695  [CA 0] Center 40 (10~71) winsize 62

 2460 23:10:08.829042  [CA 1] Center 39 (9~70) winsize 62

 2461 23:10:08.832769  [CA 2] Center 36 (6~67) winsize 62

 2462 23:10:08.835744  [CA 3] Center 36 (5~67) winsize 63

 2463 23:10:08.839003  [CA 4] Center 34 (4~65) winsize 62

 2464 23:10:08.842605  [CA 5] Center 34 (4~64) winsize 61

 2465 23:10:08.842712  

 2466 23:10:08.845748  [CmdBusTrainingLP45] Vref(ca) range 1: 37

 2467 23:10:08.845850  

 2468 23:10:08.848960  [CATrainingPosCal] consider 1 rank data

 2469 23:10:08.852439  u2DelayCellTimex100 = 270/100 ps

 2470 23:10:08.855803  CA0 delay=40 (10~71),Diff = 6 PI (28 cell)

 2471 23:10:08.863023  CA1 delay=39 (9~70),Diff = 5 PI (24 cell)

 2472 23:10:08.866048  CA2 delay=36 (6~67),Diff = 2 PI (9 cell)

 2473 23:10:08.869163  CA3 delay=36 (5~67),Diff = 2 PI (9 cell)

 2474 23:10:08.873189  CA4 delay=34 (4~65),Diff = 0 PI (0 cell)

 2475 23:10:08.876195  CA5 delay=34 (4~64),Diff = 0 PI (0 cell)

 2476 23:10:08.876268  

 2477 23:10:08.879699  CA PerBit enable=1, Macro0, CA PI delay=34

 2478 23:10:08.879774  

 2479 23:10:08.883164  [CBTSetCACLKResult] CA Dly = 34

 2480 23:10:08.883243  CS Dly: 7 (0~38)

 2481 23:10:08.883307  ==

 2482 23:10:08.886273  Dram Type= 6, Freq= 0, CH_0, rank 1

 2483 23:10:08.893251  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2484 23:10:08.893328  ==

 2485 23:10:08.895953  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 2486 23:10:08.903014  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39

 2487 23:10:08.912100  [CA 0] Center 39 (9~70) winsize 62

 2488 23:10:08.915222  [CA 1] Center 40 (10~70) winsize 61

 2489 23:10:08.918690  [CA 2] Center 36 (6~67) winsize 62

 2490 23:10:08.921775  [CA 3] Center 36 (5~67) winsize 63

 2491 23:10:08.925381  [CA 4] Center 34 (4~65) winsize 62

 2492 23:10:08.928699  [CA 5] Center 34 (4~64) winsize 61

 2493 23:10:08.928780  

 2494 23:10:08.931843  [CmdBusTrainingLP45] Vref(ca) range 1: 35

 2495 23:10:08.931919  

 2496 23:10:08.935153  [CATrainingPosCal] consider 2 rank data

 2497 23:10:08.938601  u2DelayCellTimex100 = 270/100 ps

 2498 23:10:08.942107  CA0 delay=40 (10~70),Diff = 6 PI (28 cell)

 2499 23:10:08.945230  CA1 delay=40 (10~70),Diff = 6 PI (28 cell)

 2500 23:10:08.952145  CA2 delay=36 (6~67),Diff = 2 PI (9 cell)

 2501 23:10:08.955241  CA3 delay=36 (5~67),Diff = 2 PI (9 cell)

 2502 23:10:08.958943  CA4 delay=34 (4~65),Diff = 0 PI (0 cell)

 2503 23:10:08.961781  CA5 delay=34 (4~64),Diff = 0 PI (0 cell)

 2504 23:10:08.961856  

 2505 23:10:08.966413  CA PerBit enable=1, Macro0, CA PI delay=34

 2506 23:10:08.966501  

 2507 23:10:08.968879  [CBTSetCACLKResult] CA Dly = 34

 2508 23:10:08.968952  CS Dly: 8 (0~41)

 2509 23:10:08.969020  

 2510 23:10:08.972617  ----->DramcWriteLeveling(PI) begin...

 2511 23:10:08.975441  ==

 2512 23:10:08.975549  Dram Type= 6, Freq= 0, CH_0, rank 0

 2513 23:10:08.982273  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2514 23:10:08.982350  ==

 2515 23:10:08.985275  Write leveling (Byte 0): 30 => 30

 2516 23:10:08.989030  Write leveling (Byte 1): 28 => 28

 2517 23:10:08.989109  DramcWriteLeveling(PI) end<-----

 2518 23:10:08.992036  

 2519 23:10:08.992112  ==

 2520 23:10:08.995769  Dram Type= 6, Freq= 0, CH_0, rank 0

 2521 23:10:08.999109  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2522 23:10:08.999185  ==

 2523 23:10:09.002245  [Gating] SW mode calibration

 2524 23:10:09.009559  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0

 2525 23:10:09.012585  RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)

 2526 23:10:09.019490   0 15  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 2527 23:10:09.022507   0 15  4 | B1->B0 | 2323 3030 | 0 1 | (0 0) (1 1)

 2528 23:10:09.026173   0 15  8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 2529 23:10:09.032533   0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 2530 23:10:09.036011   0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 2531 23:10:09.038928   0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 2532 23:10:09.046012   0 15 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 2533 23:10:09.049003   0 15 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)

 2534 23:10:09.052671   1  0  0 | B1->B0 | 3434 3030 | 0 1 | (0 1) (1 0)

 2535 23:10:09.055800   1  0  4 | B1->B0 | 2828 2323 | 0 0 | (0 0) (0 0)

 2536 23:10:09.062890   1  0  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 2537 23:10:09.065776   1  0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 2538 23:10:09.069324   1  0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 2539 23:10:09.076477   1  0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 2540 23:10:09.079420   1  0 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 2541 23:10:09.083111   1  0 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 2542 23:10:09.089330   1  1  0 | B1->B0 | 2323 2b2b | 0 0 | (0 0) (0 0)

 2543 23:10:09.093302   1  1  4 | B1->B0 | 3e3e 4545 | 0 0 | (0 0) (0 0)

 2544 23:10:09.096543   1  1  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 2545 23:10:09.102615   1  1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 2546 23:10:09.106331   1  1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 2547 23:10:09.109299   1  1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 2548 23:10:09.116133   1  1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 2549 23:10:09.119644   1  1 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 2550 23:10:09.123349   1  2  0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)

 2551 23:10:09.126110   1  2  4 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)

 2552 23:10:09.132922   1  2  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2553 23:10:09.136524   1  2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2554 23:10:09.140123   1  2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2555 23:10:09.146449   1  2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2556 23:10:09.150154   1  2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2557 23:10:09.153605   1  2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2558 23:10:09.160179   1  3  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2559 23:10:09.163178   1  3  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2560 23:10:09.167087   1  3  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2561 23:10:09.173313   1  3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2562 23:10:09.177160   1  3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2563 23:10:09.180516   1  3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2564 23:10:09.183150   1  3 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2565 23:10:09.190054   1  3 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2566 23:10:09.193648   1  4  0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)

 2567 23:10:09.197038   1  4  4 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)

 2568 23:10:09.199909  Total UI for P1: 0, mck2ui 16

 2569 23:10:09.204560  best dqsien dly found for B0: ( 1,  4,  0)

 2570 23:10:09.210310   1  4  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 2571 23:10:09.210418  Total UI for P1: 0, mck2ui 16

 2572 23:10:09.216751  best dqsien dly found for B1: ( 1,  4,  2)

 2573 23:10:09.220802  best DQS0 dly(MCK, UI, PI) = (1, 4, 0)

 2574 23:10:09.223669  best DQS1 dly(MCK, UI, PI) = (1, 4, 2)

 2575 23:10:09.223748  

 2576 23:10:09.226951  best DQS0 P1 dly(MCK, UI, PI) = (1, 8, 0)

 2577 23:10:09.230452  best DQS1 P1 dly(MCK, UI, PI) = (1, 8, 2)

 2578 23:10:09.233656  [Gating] SW calibration Done

 2579 23:10:09.233738  ==

 2580 23:10:09.236974  Dram Type= 6, Freq= 0, CH_0, rank 0

 2581 23:10:09.240262  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2582 23:10:09.240345  ==

 2583 23:10:09.243696  RX Vref Scan: 0

 2584 23:10:09.243778  

 2585 23:10:09.243858  RX Vref 0 -> 0, step: 1

 2586 23:10:09.243935  

 2587 23:10:09.246834  RX Delay -40 -> 252, step: 8

 2588 23:10:09.250345  iDelay=200, Bit 0, Center 115 (40 ~ 191) 152

 2589 23:10:09.253908  iDelay=200, Bit 1, Center 115 (40 ~ 191) 152

 2590 23:10:09.260791  iDelay=200, Bit 2, Center 111 (40 ~ 183) 144

 2591 23:10:09.263766  iDelay=200, Bit 3, Center 111 (40 ~ 183) 144

 2592 23:10:09.267541  iDelay=200, Bit 4, Center 115 (40 ~ 191) 152

 2593 23:10:09.270616  iDelay=200, Bit 5, Center 111 (40 ~ 183) 144

 2594 23:10:09.273995  iDelay=200, Bit 6, Center 123 (48 ~ 199) 152

 2595 23:10:09.280452  iDelay=200, Bit 7, Center 123 (48 ~ 199) 152

 2596 23:10:09.283709  iDelay=200, Bit 8, Center 95 (24 ~ 167) 144

 2597 23:10:09.287331  iDelay=200, Bit 9, Center 95 (24 ~ 167) 144

 2598 23:10:09.290327  iDelay=200, Bit 10, Center 107 (40 ~ 175) 136

 2599 23:10:09.294169  iDelay=200, Bit 11, Center 99 (32 ~ 167) 136

 2600 23:10:09.297225  iDelay=200, Bit 12, Center 115 (48 ~ 183) 136

 2601 23:10:09.303954  iDelay=200, Bit 13, Center 111 (40 ~ 183) 144

 2602 23:10:09.307109  iDelay=200, Bit 14, Center 119 (48 ~ 191) 144

 2603 23:10:09.310720  iDelay=200, Bit 15, Center 115 (48 ~ 183) 136

 2604 23:10:09.310811  ==

 2605 23:10:09.314118  Dram Type= 6, Freq= 0, CH_0, rank 0

 2606 23:10:09.317611  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2607 23:10:09.317696  ==

 2608 23:10:09.320853  DQS Delay:

 2609 23:10:09.320936  DQS0 = 0, DQS1 = 0

 2610 23:10:09.324221  DQM Delay:

 2611 23:10:09.324298  DQM0 = 115, DQM1 = 107

 2612 23:10:09.327264  DQ Delay:

 2613 23:10:09.331103  DQ0 =115, DQ1 =115, DQ2 =111, DQ3 =111

 2614 23:10:09.334240  DQ4 =115, DQ5 =111, DQ6 =123, DQ7 =123

 2615 23:10:09.337716  DQ8 =95, DQ9 =95, DQ10 =107, DQ11 =99

 2616 23:10:09.340592  DQ12 =115, DQ13 =111, DQ14 =119, DQ15 =115

 2617 23:10:09.340715  

 2618 23:10:09.340796  

 2619 23:10:09.340873  ==

 2620 23:10:09.344275  Dram Type= 6, Freq= 0, CH_0, rank 0

 2621 23:10:09.347230  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2622 23:10:09.347306  ==

 2623 23:10:09.347386  

 2624 23:10:09.347475  

 2625 23:10:09.350822  	TX Vref Scan disable

 2626 23:10:09.354333   == TX Byte 0 ==

 2627 23:10:09.357637  Update DQ  dly =850 (3 ,2, 18)  DQ  OEN =(2 ,7)

 2628 23:10:09.360724  Update DQM dly =850 (3 ,2, 18)  DQM OEN =(2 ,7)

 2629 23:10:09.360801   == TX Byte 1 ==

 2630 23:10:09.367340  Update DQ  dly =845 (3 ,2, 13)  DQ  OEN =(2 ,7)

 2631 23:10:09.370911  Update DQM dly =845 (3 ,2, 13)  DQM OEN =(2 ,7)

 2632 23:10:09.370993  ==

 2633 23:10:09.374050  Dram Type= 6, Freq= 0, CH_0, rank 0

 2634 23:10:09.377549  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2635 23:10:09.377632  ==

 2636 23:10:09.391355  TX Vref=22, minBit 1, minWin=24, winSum=416

 2637 23:10:09.394323  TX Vref=24, minBit 7, minWin=24, winSum=421

 2638 23:10:09.397938  TX Vref=26, minBit 1, minWin=25, winSum=428

 2639 23:10:09.401093  TX Vref=28, minBit 1, minWin=25, winSum=434

 2640 23:10:09.403772  TX Vref=30, minBit 1, minWin=26, winSum=434

 2641 23:10:09.407281  TX Vref=32, minBit 0, minWin=26, winSum=436

 2642 23:10:09.413855  [TxChooseVref] Worse bit 0, Min win 26, Win sum 436, Final Vref 32

 2643 23:10:09.413946  

 2644 23:10:09.417373  Final TX Range 1 Vref 32

 2645 23:10:09.417467  

 2646 23:10:09.417547  ==

 2647 23:10:09.420952  Dram Type= 6, Freq= 0, CH_0, rank 0

 2648 23:10:09.424400  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2649 23:10:09.424480  ==

 2650 23:10:09.424571  

 2651 23:10:09.424650  

 2652 23:10:09.427502  	TX Vref Scan disable

 2653 23:10:09.430909   == TX Byte 0 ==

 2654 23:10:09.434614  Update DQ  dly =849 (3 ,2, 17)  DQ  OEN =(2 ,7)

 2655 23:10:09.437616  Update DQM dly =849 (3 ,2, 17)  DQM OEN =(2 ,7)

 2656 23:10:09.441369   == TX Byte 1 ==

 2657 23:10:09.444532  Update DQ  dly =845 (3 ,2, 13)  DQ  OEN =(2 ,7)

 2658 23:10:09.447886  Update DQM dly =845 (3 ,2, 13)  DQM OEN =(2 ,7)

 2659 23:10:09.447969  

 2660 23:10:09.450670  [DATLAT]

 2661 23:10:09.450779  Freq=1200, CH0 RK0

 2662 23:10:09.450877  

 2663 23:10:09.454719  DATLAT Default: 0xd

 2664 23:10:09.454794  0, 0xFFFF, sum = 0

 2665 23:10:09.458209  1, 0xFFFF, sum = 0

 2666 23:10:09.458311  2, 0xFFFF, sum = 0

 2667 23:10:09.461155  3, 0xFFFF, sum = 0

 2668 23:10:09.461232  4, 0xFFFF, sum = 0

 2669 23:10:09.464739  5, 0xFFFF, sum = 0

 2670 23:10:09.464887  6, 0xFFFF, sum = 0

 2671 23:10:09.467953  7, 0xFFFF, sum = 0

 2672 23:10:09.468038  8, 0xFFFF, sum = 0

 2673 23:10:09.471449  9, 0xFFFF, sum = 0

 2674 23:10:09.471532  10, 0xFFFF, sum = 0

 2675 23:10:09.474654  11, 0xFFFF, sum = 0

 2676 23:10:09.474750  12, 0x0, sum = 1

 2677 23:10:09.477859  13, 0x0, sum = 2

 2678 23:10:09.477951  14, 0x0, sum = 3

 2679 23:10:09.481929  15, 0x0, sum = 4

 2680 23:10:09.482014  best_step = 13

 2681 23:10:09.482113  

 2682 23:10:09.482222  ==

 2683 23:10:09.484581  Dram Type= 6, Freq= 0, CH_0, rank 0

 2684 23:10:09.488021  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2685 23:10:09.491661  ==

 2686 23:10:09.491735  RX Vref Scan: 1

 2687 23:10:09.491821  

 2688 23:10:09.494688  Set Vref Range= 32 -> 127

 2689 23:10:09.494762  

 2690 23:10:09.498249  RX Vref 32 -> 127, step: 1

 2691 23:10:09.498333  

 2692 23:10:09.498464  RX Delay -21 -> 252, step: 4

 2693 23:10:09.498571  

 2694 23:10:09.501637  Set Vref, RX VrefLevel [Byte0]: 32

 2695 23:10:09.504666                           [Byte1]: 32

 2696 23:10:09.509260  

 2697 23:10:09.509354  Set Vref, RX VrefLevel [Byte0]: 33

 2698 23:10:09.512250                           [Byte1]: 33

 2699 23:10:09.517188  

 2700 23:10:09.517263  Set Vref, RX VrefLevel [Byte0]: 34

 2701 23:10:09.520313                           [Byte1]: 34

 2702 23:10:09.524779  

 2703 23:10:09.524876  Set Vref, RX VrefLevel [Byte0]: 35

 2704 23:10:09.527916                           [Byte1]: 35

 2705 23:10:09.532613  

 2706 23:10:09.532692  Set Vref, RX VrefLevel [Byte0]: 36

 2707 23:10:09.535904                           [Byte1]: 36

 2708 23:10:09.540231  

 2709 23:10:09.540307  Set Vref, RX VrefLevel [Byte0]: 37

 2710 23:10:09.544410                           [Byte1]: 37

 2711 23:10:09.548447  

 2712 23:10:09.548530  Set Vref, RX VrefLevel [Byte0]: 38

 2713 23:10:09.552114                           [Byte1]: 38

 2714 23:10:09.556609  

 2715 23:10:09.556692  Set Vref, RX VrefLevel [Byte0]: 39

 2716 23:10:09.559914                           [Byte1]: 39

 2717 23:10:09.564392  

 2718 23:10:09.564476  Set Vref, RX VrefLevel [Byte0]: 40

 2719 23:10:09.567788                           [Byte1]: 40

 2720 23:10:09.572096  

 2721 23:10:09.572178  Set Vref, RX VrefLevel [Byte0]: 41

 2722 23:10:09.575890                           [Byte1]: 41

 2723 23:10:09.580051  

 2724 23:10:09.580133  Set Vref, RX VrefLevel [Byte0]: 42

 2725 23:10:09.583510                           [Byte1]: 42

 2726 23:10:09.588044  

 2727 23:10:09.588128  Set Vref, RX VrefLevel [Byte0]: 43

 2728 23:10:09.591569                           [Byte1]: 43

 2729 23:10:09.596666  

 2730 23:10:09.596749  Set Vref, RX VrefLevel [Byte0]: 44

 2731 23:10:09.599344                           [Byte1]: 44

 2732 23:10:09.604207  

 2733 23:10:09.604299  Set Vref, RX VrefLevel [Byte0]: 45

 2734 23:10:09.607516                           [Byte1]: 45

 2735 23:10:09.612104  

 2736 23:10:09.612187  Set Vref, RX VrefLevel [Byte0]: 46

 2737 23:10:09.615027                           [Byte1]: 46

 2738 23:10:09.620079  

 2739 23:10:09.620161  Set Vref, RX VrefLevel [Byte0]: 47

 2740 23:10:09.622964                           [Byte1]: 47

 2741 23:10:09.627782  

 2742 23:10:09.627868  Set Vref, RX VrefLevel [Byte0]: 48

 2743 23:10:09.630852                           [Byte1]: 48

 2744 23:10:09.635660  

 2745 23:10:09.635749  Set Vref, RX VrefLevel [Byte0]: 49

 2746 23:10:09.638582                           [Byte1]: 49

 2747 23:10:09.643594  

 2748 23:10:09.643682  Set Vref, RX VrefLevel [Byte0]: 50

 2749 23:10:09.647039                           [Byte1]: 50

 2750 23:10:09.651214  

 2751 23:10:09.651300  Set Vref, RX VrefLevel [Byte0]: 51

 2752 23:10:09.654824                           [Byte1]: 51

 2753 23:10:09.659935  

 2754 23:10:09.660032  Set Vref, RX VrefLevel [Byte0]: 52

 2755 23:10:09.662853                           [Byte1]: 52

 2756 23:10:09.667711  

 2757 23:10:09.667795  Set Vref, RX VrefLevel [Byte0]: 53

 2758 23:10:09.670487                           [Byte1]: 53

 2759 23:10:09.675324  

 2760 23:10:09.675398  Set Vref, RX VrefLevel [Byte0]: 54

 2761 23:10:09.678522                           [Byte1]: 54

 2762 23:10:09.682909  

 2763 23:10:09.682991  Set Vref, RX VrefLevel [Byte0]: 55

 2764 23:10:09.686374                           [Byte1]: 55

 2765 23:10:09.691119  

 2766 23:10:09.691199  Set Vref, RX VrefLevel [Byte0]: 56

 2767 23:10:09.694603                           [Byte1]: 56

 2768 23:10:09.698883  

 2769 23:10:09.698966  Set Vref, RX VrefLevel [Byte0]: 57

 2770 23:10:09.702433                           [Byte1]: 57

 2771 23:10:09.706948  

 2772 23:10:09.707036  Set Vref, RX VrefLevel [Byte0]: 58

 2773 23:10:09.710560                           [Byte1]: 58

 2774 23:10:09.714583  

 2775 23:10:09.714657  Set Vref, RX VrefLevel [Byte0]: 59

 2776 23:10:09.718213                           [Byte1]: 59

 2777 23:10:09.722971  

 2778 23:10:09.723044  Set Vref, RX VrefLevel [Byte0]: 60

 2779 23:10:09.726505                           [Byte1]: 60

 2780 23:10:09.731201  

 2781 23:10:09.731282  Set Vref, RX VrefLevel [Byte0]: 61

 2782 23:10:09.733942                           [Byte1]: 61

 2783 23:10:09.738633  

 2784 23:10:09.738713  Set Vref, RX VrefLevel [Byte0]: 62

 2785 23:10:09.742541                           [Byte1]: 62

 2786 23:10:09.746687  

 2787 23:10:09.746769  Set Vref, RX VrefLevel [Byte0]: 63

 2788 23:10:09.749991                           [Byte1]: 63

 2789 23:10:09.754518  

 2790 23:10:09.754599  Set Vref, RX VrefLevel [Byte0]: 64

 2791 23:10:09.758025                           [Byte1]: 64

 2792 23:10:09.762343  

 2793 23:10:09.762447  Set Vref, RX VrefLevel [Byte0]: 65

 2794 23:10:09.765866                           [Byte1]: 65

 2795 23:10:09.770609  

 2796 23:10:09.770691  Set Vref, RX VrefLevel [Byte0]: 66

 2797 23:10:09.774352                           [Byte1]: 66

 2798 23:10:09.778293  

 2799 23:10:09.778389  Set Vref, RX VrefLevel [Byte0]: 67

 2800 23:10:09.781707                           [Byte1]: 67

 2801 23:10:09.786448  

 2802 23:10:09.786540  Set Vref, RX VrefLevel [Byte0]: 68

 2803 23:10:09.789900                           [Byte1]: 68

 2804 23:10:09.793968  

 2805 23:10:09.794089  Set Vref, RX VrefLevel [Byte0]: 69

 2806 23:10:09.798071                           [Byte1]: 69

 2807 23:10:09.802648  

 2808 23:10:09.802744  Final RX Vref Byte 0 = 55 to rank0

 2809 23:10:09.805596  Final RX Vref Byte 1 = 51 to rank0

 2810 23:10:09.809165  Final RX Vref Byte 0 = 55 to rank1

 2811 23:10:09.812678  Final RX Vref Byte 1 = 51 to rank1==

 2812 23:10:09.815387  Dram Type= 6, Freq= 0, CH_0, rank 0

 2813 23:10:09.819131  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2814 23:10:09.822244  ==

 2815 23:10:09.822326  DQS Delay:

 2816 23:10:09.822392  DQS0 = 0, DQS1 = 0

 2817 23:10:09.825684  DQM Delay:

 2818 23:10:09.825766  DQM0 = 114, DQM1 = 105

 2819 23:10:09.829792  DQ Delay:

 2820 23:10:09.832735  DQ0 =114, DQ1 =114, DQ2 =110, DQ3 =112

 2821 23:10:09.836454  DQ4 =116, DQ5 =110, DQ6 =120, DQ7 =122

 2822 23:10:09.839161  DQ8 =92, DQ9 =90, DQ10 =106, DQ11 =96

 2823 23:10:09.842373  DQ12 =114, DQ13 =110, DQ14 =118, DQ15 =114

 2824 23:10:09.842479  

 2825 23:10:09.842544  

 2826 23:10:09.849447  [DQSOSCAuto] RK0, (LSB)MR18= 0xffee, (MSB)MR19= 0x303, tDQSOscB0 = 417 ps tDQSOscB1 = 410 ps

 2827 23:10:09.852590  CH0 RK0: MR19=303, MR18=FFEE

 2828 23:10:09.859493  CH0_RK0: MR19=0x303, MR18=0xFFEE, DQSOSC=410, MR23=63, INC=39, DEC=26

 2829 23:10:09.859576  

 2830 23:10:09.862707  ----->DramcWriteLeveling(PI) begin...

 2831 23:10:09.862790  ==

 2832 23:10:09.865865  Dram Type= 6, Freq= 0, CH_0, rank 1

 2833 23:10:09.869624  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2834 23:10:09.869706  ==

 2835 23:10:09.872904  Write leveling (Byte 0): 33 => 33

 2836 23:10:09.876077  Write leveling (Byte 1): 28 => 28

 2837 23:10:09.879667  DramcWriteLeveling(PI) end<-----

 2838 23:10:09.879749  

 2839 23:10:09.879813  ==

 2840 23:10:09.882602  Dram Type= 6, Freq= 0, CH_0, rank 1

 2841 23:10:09.886022  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2842 23:10:09.886104  ==

 2843 23:10:09.889427  [Gating] SW mode calibration

 2844 23:10:09.895994  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0

 2845 23:10:09.903092  RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)

 2846 23:10:09.906187   0 15  0 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)

 2847 23:10:09.913185   0 15  4 | B1->B0 | 2d2d 3434 | 0 1 | (0 0) (1 1)

 2848 23:10:09.916098   0 15  8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 2849 23:10:09.919337   0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 2850 23:10:09.923160   0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 2851 23:10:09.929913   0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 2852 23:10:09.932784   0 15 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)

 2853 23:10:09.936384   0 15 28 | B1->B0 | 3434 2a2a | 1 0 | (1 1) (0 0)

 2854 23:10:09.943447   1  0  0 | B1->B0 | 2c2c 2323 | 0 0 | (0 1) (0 0)

 2855 23:10:09.946417   1  0  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 2856 23:10:09.949586   1  0  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 2857 23:10:09.956297   1  0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 2858 23:10:09.960434   1  0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 2859 23:10:09.963289   1  0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 2860 23:10:09.969963   1  0 24 | B1->B0 | 2323 2e2e | 0 0 | (0 0) (0 0)

 2861 23:10:09.973345   1  0 28 | B1->B0 | 2323 4545 | 0 0 | (0 0) (0 0)

 2862 23:10:09.977352   1  1  0 | B1->B0 | 3534 4343 | 1 0 | (0 0) (0 0)

 2863 23:10:09.980049   1  1  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 2864 23:10:09.986750   1  1  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 2865 23:10:09.990239   1  1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 2866 23:10:09.993642   1  1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 2867 23:10:09.999959   1  1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 2868 23:10:10.003365   1  1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 2869 23:10:10.006877   1  1 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 2870 23:10:10.013860   1  2  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 1)

 2871 23:10:10.016923   1  2  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2872 23:10:10.020357   1  2  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2873 23:10:10.027888   1  2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2874 23:10:10.030557   1  2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2875 23:10:10.033764   1  2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2876 23:10:10.037075   1  2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2877 23:10:10.043627   1  2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2878 23:10:10.047680   1  3  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2879 23:10:10.050238   1  3  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2880 23:10:10.057053   1  3  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2881 23:10:10.060591   1  3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2882 23:10:10.063722   1  3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2883 23:10:10.070267   1  3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2884 23:10:10.074226   1  3 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 2885 23:10:10.077125   1  3 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

 2886 23:10:10.083998   1  4  0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)

 2887 23:10:10.084080  Total UI for P1: 0, mck2ui 16

 2888 23:10:10.090849  best dqsien dly found for B0: ( 1,  3, 28)

 2889 23:10:10.094002   1  4  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 2890 23:10:10.097327  Total UI for P1: 0, mck2ui 16

 2891 23:10:10.100741  best dqsien dly found for B1: ( 1,  4,  0)

 2892 23:10:10.104133  best DQS0 dly(MCK, UI, PI) = (1, 3, 28)

 2893 23:10:10.107169  best DQS1 dly(MCK, UI, PI) = (1, 4, 0)

 2894 23:10:10.107296  

 2895 23:10:10.110914  best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 28)

 2896 23:10:10.114005  best DQS1 P1 dly(MCK, UI, PI) = (1, 8, 0)

 2897 23:10:10.117639  [Gating] SW calibration Done

 2898 23:10:10.117720  ==

 2899 23:10:10.121220  Dram Type= 6, Freq= 0, CH_0, rank 1

 2900 23:10:10.124205  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2901 23:10:10.124288  ==

 2902 23:10:10.127476  RX Vref Scan: 0

 2903 23:10:10.127584  

 2904 23:10:10.127681  RX Vref 0 -> 0, step: 1

 2905 23:10:10.127764  

 2906 23:10:10.130724  RX Delay -40 -> 252, step: 8

 2907 23:10:10.134165  iDelay=200, Bit 0, Center 115 (40 ~ 191) 152

 2908 23:10:10.140687  iDelay=200, Bit 1, Center 115 (40 ~ 191) 152

 2909 23:10:10.144355  iDelay=200, Bit 2, Center 111 (40 ~ 183) 144

 2910 23:10:10.148008  iDelay=200, Bit 3, Center 115 (40 ~ 191) 152

 2911 23:10:10.150988  iDelay=200, Bit 4, Center 115 (40 ~ 191) 152

 2912 23:10:10.154998  iDelay=200, Bit 5, Center 107 (32 ~ 183) 152

 2913 23:10:10.161509  iDelay=200, Bit 6, Center 123 (48 ~ 199) 152

 2914 23:10:10.164161  iDelay=200, Bit 7, Center 123 (48 ~ 199) 152

 2915 23:10:10.167963  iDelay=200, Bit 8, Center 95 (24 ~ 167) 144

 2916 23:10:10.171710  iDelay=200, Bit 9, Center 95 (24 ~ 167) 144

 2917 23:10:10.174466  iDelay=200, Bit 10, Center 103 (32 ~ 175) 144

 2918 23:10:10.177786  iDelay=200, Bit 11, Center 99 (32 ~ 167) 136

 2919 23:10:10.184620  iDelay=200, Bit 12, Center 115 (48 ~ 183) 136

 2920 23:10:10.188446  iDelay=200, Bit 13, Center 115 (48 ~ 183) 136

 2921 23:10:10.191460  iDelay=200, Bit 14, Center 119 (48 ~ 191) 144

 2922 23:10:10.194816  iDelay=200, Bit 15, Center 111 (40 ~ 183) 144

 2923 23:10:10.194890  ==

 2924 23:10:10.198557  Dram Type= 6, Freq= 0, CH_0, rank 1

 2925 23:10:10.204610  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2926 23:10:10.204688  ==

 2927 23:10:10.204752  DQS Delay:

 2928 23:10:10.204818  DQS0 = 0, DQS1 = 0

 2929 23:10:10.207982  DQM Delay:

 2930 23:10:10.208054  DQM0 = 115, DQM1 = 106

 2931 23:10:10.211319  DQ Delay:

 2932 23:10:10.214910  DQ0 =115, DQ1 =115, DQ2 =111, DQ3 =115

 2933 23:10:10.217957  DQ4 =115, DQ5 =107, DQ6 =123, DQ7 =123

 2934 23:10:10.221585  DQ8 =95, DQ9 =95, DQ10 =103, DQ11 =99

 2935 23:10:10.224858  DQ12 =115, DQ13 =115, DQ14 =119, DQ15 =111

 2936 23:10:10.224929  

 2937 23:10:10.225008  

 2938 23:10:10.225073  ==

 2939 23:10:10.228615  Dram Type= 6, Freq= 0, CH_0, rank 1

 2940 23:10:10.231696  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2941 23:10:10.231770  ==

 2942 23:10:10.231831  

 2943 23:10:10.231891  

 2944 23:10:10.234983  	TX Vref Scan disable

 2945 23:10:10.238211   == TX Byte 0 ==

 2946 23:10:10.241468  Update DQ  dly =852 (3 ,2, 20)  DQ  OEN =(2 ,7)

 2947 23:10:10.244704  Update DQM dly =852 (3 ,2, 20)  DQM OEN =(2 ,7)

 2948 23:10:10.248459   == TX Byte 1 ==

 2949 23:10:10.251496  Update DQ  dly =845 (3 ,2, 13)  DQ  OEN =(2 ,7)

 2950 23:10:10.255486  Update DQM dly =845 (3 ,2, 13)  DQM OEN =(2 ,7)

 2951 23:10:10.255568  ==

 2952 23:10:10.258710  Dram Type= 6, Freq= 0, CH_0, rank 1

 2953 23:10:10.261710  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2954 23:10:10.264652  ==

 2955 23:10:10.275404  TX Vref=22, minBit 0, minWin=25, winSum=419

 2956 23:10:10.279346  TX Vref=24, minBit 0, minWin=25, winSum=427

 2957 23:10:10.282258  TX Vref=26, minBit 0, minWin=26, winSum=432

 2958 23:10:10.286352  TX Vref=28, minBit 2, minWin=26, winSum=433

 2959 23:10:10.288871  TX Vref=30, minBit 3, minWin=26, winSum=434

 2960 23:10:10.292240  TX Vref=32, minBit 3, minWin=26, winSum=434

 2961 23:10:10.299140  [TxChooseVref] Worse bit 3, Min win 26, Win sum 434, Final Vref 30

 2962 23:10:10.299237  

 2963 23:10:10.301981  Final TX Range 1 Vref 30

 2964 23:10:10.302062  

 2965 23:10:10.302127  ==

 2966 23:10:10.305636  Dram Type= 6, Freq= 0, CH_0, rank 1

 2967 23:10:10.309014  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 2968 23:10:10.309098  ==

 2969 23:10:10.309180  

 2970 23:10:10.309240  

 2971 23:10:10.312438  	TX Vref Scan disable

 2972 23:10:10.315765   == TX Byte 0 ==

 2973 23:10:10.319429  Update DQ  dly =852 (3 ,2, 20)  DQ  OEN =(2 ,7)

 2974 23:10:10.322332  Update DQM dly =852 (3 ,2, 20)  DQM OEN =(2 ,7)

 2975 23:10:10.325744   == TX Byte 1 ==

 2976 23:10:10.329292  Update DQ  dly =845 (3 ,2, 13)  DQ  OEN =(2 ,7)

 2977 23:10:10.332614  Update DQM dly =845 (3 ,2, 13)  DQM OEN =(2 ,7)

 2978 23:10:10.332696  

 2979 23:10:10.335898  [DATLAT]

 2980 23:10:10.335981  Freq=1200, CH0 RK1

 2981 23:10:10.336046  

 2982 23:10:10.339000  DATLAT Default: 0xd

 2983 23:10:10.339082  0, 0xFFFF, sum = 0

 2984 23:10:10.342651  1, 0xFFFF, sum = 0

 2985 23:10:10.342734  2, 0xFFFF, sum = 0

 2986 23:10:10.346526  3, 0xFFFF, sum = 0

 2987 23:10:10.346610  4, 0xFFFF, sum = 0

 2988 23:10:10.349433  5, 0xFFFF, sum = 0

 2989 23:10:10.349516  6, 0xFFFF, sum = 0

 2990 23:10:10.352723  7, 0xFFFF, sum = 0

 2991 23:10:10.352822  8, 0xFFFF, sum = 0

 2992 23:10:10.355783  9, 0xFFFF, sum = 0

 2993 23:10:10.355897  10, 0xFFFF, sum = 0

 2994 23:10:10.359362  11, 0xFFFF, sum = 0

 2995 23:10:10.359448  12, 0x0, sum = 1

 2996 23:10:10.363041  13, 0x0, sum = 2

 2997 23:10:10.363154  14, 0x0, sum = 3

 2998 23:10:10.365844  15, 0x0, sum = 4

 2999 23:10:10.365927  best_step = 13

 3000 23:10:10.365993  

 3001 23:10:10.366053  ==

 3002 23:10:10.369712  Dram Type= 6, Freq= 0, CH_0, rank 1

 3003 23:10:10.376057  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3004 23:10:10.376140  ==

 3005 23:10:10.376205  RX Vref Scan: 0

 3006 23:10:10.376266  

 3007 23:10:10.379796  RX Vref 0 -> 0, step: 1

 3008 23:10:10.379878  

 3009 23:10:10.382796  RX Delay -21 -> 252, step: 4

 3010 23:10:10.386262  iDelay=195, Bit 0, Center 114 (43 ~ 186) 144

 3011 23:10:10.389783  iDelay=195, Bit 1, Center 112 (39 ~ 186) 148

 3012 23:10:10.392930  iDelay=195, Bit 2, Center 110 (39 ~ 182) 144

 3013 23:10:10.399288  iDelay=195, Bit 3, Center 114 (43 ~ 186) 144

 3014 23:10:10.403204  iDelay=195, Bit 4, Center 112 (43 ~ 182) 140

 3015 23:10:10.405873  iDelay=195, Bit 5, Center 106 (39 ~ 174) 136

 3016 23:10:10.409594  iDelay=195, Bit 6, Center 122 (51 ~ 194) 144

 3017 23:10:10.412675  iDelay=195, Bit 7, Center 122 (51 ~ 194) 144

 3018 23:10:10.419881  iDelay=195, Bit 8, Center 94 (27 ~ 162) 136

 3019 23:10:10.422980  iDelay=195, Bit 9, Center 92 (23 ~ 162) 140

 3020 23:10:10.426212  iDelay=195, Bit 10, Center 106 (39 ~ 174) 136

 3021 23:10:10.429981  iDelay=195, Bit 11, Center 96 (31 ~ 162) 132

 3022 23:10:10.432905  iDelay=195, Bit 12, Center 110 (43 ~ 178) 136

 3023 23:10:10.436239  iDelay=195, Bit 13, Center 110 (43 ~ 178) 136

 3024 23:10:10.443546  iDelay=195, Bit 14, Center 116 (51 ~ 182) 132

 3025 23:10:10.446687  iDelay=195, Bit 15, Center 112 (47 ~ 178) 132

 3026 23:10:10.446770  ==

 3027 23:10:10.450105  Dram Type= 6, Freq= 0, CH_0, rank 1

 3028 23:10:10.453145  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3029 23:10:10.453229  ==

 3030 23:10:10.456552  DQS Delay:

 3031 23:10:10.456639  DQS0 = 0, DQS1 = 0

 3032 23:10:10.456705  DQM Delay:

 3033 23:10:10.460145  DQM0 = 114, DQM1 = 104

 3034 23:10:10.460228  DQ Delay:

 3035 23:10:10.463849  DQ0 =114, DQ1 =112, DQ2 =110, DQ3 =114

 3036 23:10:10.467190  DQ4 =112, DQ5 =106, DQ6 =122, DQ7 =122

 3037 23:10:10.470266  DQ8 =94, DQ9 =92, DQ10 =106, DQ11 =96

 3038 23:10:10.473889  DQ12 =110, DQ13 =110, DQ14 =116, DQ15 =112

 3039 23:10:10.477110  

 3040 23:10:10.477193  

 3041 23:10:10.483255  [DQSOSCAuto] RK1, (LSB)MR18= 0x2f4, (MSB)MR19= 0x403, tDQSOscB0 = 415 ps tDQSOscB1 = 409 ps

 3042 23:10:10.486653  CH0 RK1: MR19=403, MR18=2F4

 3043 23:10:10.493311  CH0_RK1: MR19=0x403, MR18=0x2F4, DQSOSC=409, MR23=63, INC=39, DEC=26

 3044 23:10:10.493395  [RxdqsGatingPostProcess] freq 1200

 3045 23:10:10.500370  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2

 3046 23:10:10.503768  best DQS0 dly(2T, 0.5T) = (0, 12)

 3047 23:10:10.507207  best DQS1 dly(2T, 0.5T) = (0, 12)

 3048 23:10:10.510699  best DQS0 P1 dly(2T, 0.5T) = (1, 0)

 3049 23:10:10.514098  best DQS1 P1 dly(2T, 0.5T) = (1, 0)

 3050 23:10:10.517030  best DQS0 dly(2T, 0.5T) = (0, 11)

 3051 23:10:10.521051  best DQS1 dly(2T, 0.5T) = (0, 12)

 3052 23:10:10.523546  best DQS0 P1 dly(2T, 0.5T) = (0, 15)

 3053 23:10:10.526995  best DQS1 P1 dly(2T, 0.5T) = (1, 0)

 3054 23:10:10.527079  Pre-setting of DQS Precalculation

 3055 23:10:10.534311  [DualRankRxdatlatCal] RK0: 13, RK1: 13, Final_Datlat 13

 3056 23:10:10.534428  ==

 3057 23:10:10.537368  Dram Type= 6, Freq= 0, CH_1, rank 0

 3058 23:10:10.540924  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3059 23:10:10.541037  ==

 3060 23:10:10.547484  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 3061 23:10:10.554204  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=27, u1VrefScanEnd=37

 3062 23:10:10.560881  [CA 0] Center 38 (9~68) winsize 60

 3063 23:10:10.564318  [CA 1] Center 38 (8~68) winsize 61

 3064 23:10:10.567303  [CA 2] Center 35 (5~65) winsize 61

 3065 23:10:10.571358  [CA 3] Center 34 (4~65) winsize 62

 3066 23:10:10.574562  [CA 4] Center 34 (4~65) winsize 62

 3067 23:10:10.577723  [CA 5] Center 34 (4~64) winsize 61

 3068 23:10:10.577806  

 3069 23:10:10.581300  [CmdBusTrainingLP45] Vref(ca) range 1: 35

 3070 23:10:10.581384  

 3071 23:10:10.584363  [CATrainingPosCal] consider 1 rank data

 3072 23:10:10.587614  u2DelayCellTimex100 = 270/100 ps

 3073 23:10:10.590754  CA0 delay=38 (9~68),Diff = 4 PI (19 cell)

 3074 23:10:10.594286  CA1 delay=38 (8~68),Diff = 4 PI (19 cell)

 3075 23:10:10.601148  CA2 delay=35 (5~65),Diff = 1 PI (4 cell)

 3076 23:10:10.604428  CA3 delay=34 (4~65),Diff = 0 PI (0 cell)

 3077 23:10:10.607716  CA4 delay=34 (4~65),Diff = 0 PI (0 cell)

 3078 23:10:10.611537  CA5 delay=34 (4~64),Diff = 0 PI (0 cell)

 3079 23:10:10.611621  

 3080 23:10:10.614226  CA PerBit enable=1, Macro0, CA PI delay=34

 3081 23:10:10.614310  

 3082 23:10:10.617918  [CBTSetCACLKResult] CA Dly = 34

 3083 23:10:10.618002  CS Dly: 6 (0~37)

 3084 23:10:10.618069  ==

 3085 23:10:10.621127  Dram Type= 6, Freq= 0, CH_1, rank 1

 3086 23:10:10.627847  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3087 23:10:10.627930  ==

 3088 23:10:10.631198  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 3089 23:10:10.637692  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=29, u1VrefScanEnd=39

 3090 23:10:10.646479  [CA 0] Center 38 (8~68) winsize 61

 3091 23:10:10.650022  [CA 1] Center 37 (8~67) winsize 60

 3092 23:10:10.653209  [CA 2] Center 34 (4~65) winsize 62

 3093 23:10:10.656446  [CA 3] Center 34 (4~65) winsize 62

 3094 23:10:10.660052  [CA 4] Center 34 (4~65) winsize 62

 3095 23:10:10.663748  [CA 5] Center 33 (3~63) winsize 61

 3096 23:10:10.663832  

 3097 23:10:10.666811  [CmdBusTrainingLP45] Vref(ca) range 1: 33

 3098 23:10:10.666924  

 3099 23:10:10.670371  [CATrainingPosCal] consider 2 rank data

 3100 23:10:10.673951  u2DelayCellTimex100 = 270/100 ps

 3101 23:10:10.676939  CA0 delay=38 (9~68),Diff = 5 PI (24 cell)

 3102 23:10:10.680311  CA1 delay=37 (8~67),Diff = 4 PI (19 cell)

 3103 23:10:10.683623  CA2 delay=35 (5~65),Diff = 2 PI (9 cell)

 3104 23:10:10.690274  CA3 delay=34 (4~65),Diff = 1 PI (4 cell)

 3105 23:10:10.693227  CA4 delay=34 (4~65),Diff = 1 PI (4 cell)

 3106 23:10:10.696658  CA5 delay=33 (4~63),Diff = 0 PI (0 cell)

 3107 23:10:10.696739  

 3108 23:10:10.700283  CA PerBit enable=1, Macro0, CA PI delay=33

 3109 23:10:10.700382  

 3110 23:10:10.703478  [CBTSetCACLKResult] CA Dly = 33

 3111 23:10:10.703563  CS Dly: 7 (0~40)

 3112 23:10:10.703695  

 3113 23:10:10.707099  ----->DramcWriteLeveling(PI) begin...

 3114 23:10:10.707198  ==

 3115 23:10:10.710302  Dram Type= 6, Freq= 0, CH_1, rank 0

 3116 23:10:10.716824  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3117 23:10:10.716907  ==

 3118 23:10:10.720263  Write leveling (Byte 0): 26 => 26

 3119 23:10:10.723849  Write leveling (Byte 1): 31 => 31

 3120 23:10:10.723933  DramcWriteLeveling(PI) end<-----

 3121 23:10:10.723999  

 3122 23:10:10.726909  ==

 3123 23:10:10.730445  Dram Type= 6, Freq= 0, CH_1, rank 0

 3124 23:10:10.733510  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3125 23:10:10.733594  ==

 3126 23:10:10.736871  [Gating] SW mode calibration

 3127 23:10:10.743489  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0

 3128 23:10:10.747278  RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)

 3129 23:10:10.754358   0 15  0 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)

 3130 23:10:10.756927   0 15  4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 3131 23:10:10.760641   0 15  8 | B1->B0 | 3535 3434 | 0 1 | (0 0) (1 1)

 3132 23:10:10.767435   0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 3133 23:10:10.770446   0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 3134 23:10:10.773823   0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 3135 23:10:10.777847   0 15 24 | B1->B0 | 3535 3434 | 0 1 | (0 0) (1 1)

 3136 23:10:10.784355   0 15 28 | B1->B0 | 3333 3434 | 1 1 | (1 1) (1 0)

 3137 23:10:10.787643   1  0  0 | B1->B0 | 2424 2f2f | 0 0 | (0 0) (0 1)

 3138 23:10:10.790986   1  0  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 3139 23:10:10.797840   1  0  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 3140 23:10:10.800869   1  0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 3141 23:10:10.804160   1  0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 3142 23:10:10.811143   1  0 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 3143 23:10:10.814049   1  0 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 3144 23:10:10.818046   1  0 28 | B1->B0 | 2c2c 2626 | 0 0 | (0 0) (0 0)

 3145 23:10:10.824732   1  1  0 | B1->B0 | 4444 3434 | 0 1 | (0 0) (0 0)

 3146 23:10:10.827605   1  1  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 3147 23:10:10.831269   1  1  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 3148 23:10:10.834605   1  1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 3149 23:10:10.841240   1  1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 3150 23:10:10.844567   1  1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 3151 23:10:10.848639   1  1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 3152 23:10:10.855045   1  1 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 3153 23:10:10.858003   1  2  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)

 3154 23:10:10.861428   1  2  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 1)

 3155 23:10:10.868378   1  2  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3156 23:10:10.871593   1  2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3157 23:10:10.875665   1  2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3158 23:10:10.878429   1  2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3159 23:10:10.884776   1  2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3160 23:10:10.888247   1  2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3161 23:10:10.891603   1  3  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3162 23:10:10.898318   1  3  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3163 23:10:10.901811   1  3  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3164 23:10:10.905001   1  3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3165 23:10:10.911762   1  3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3166 23:10:10.915638   1  3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3167 23:10:10.918612   1  3 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3168 23:10:10.925592   1  3 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

 3169 23:10:10.928322   1  4  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 3170 23:10:10.932035  Total UI for P1: 0, mck2ui 16

 3171 23:10:10.935150  best dqsien dly found for B0: ( 1,  3, 28)

 3172 23:10:10.938636  Total UI for P1: 0, mck2ui 16

 3173 23:10:10.942401  best dqsien dly found for B1: ( 1,  3, 30)

 3174 23:10:10.945207  best DQS0 dly(MCK, UI, PI) = (1, 3, 28)

 3175 23:10:10.948586  best DQS1 dly(MCK, UI, PI) = (1, 3, 30)

 3176 23:10:10.948663  

 3177 23:10:10.951907  best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 28)

 3178 23:10:10.954982  best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 30)

 3179 23:10:10.958946  [Gating] SW calibration Done

 3180 23:10:10.959025  ==

 3181 23:10:10.961761  Dram Type= 6, Freq= 0, CH_1, rank 0

 3182 23:10:10.965575  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3183 23:10:10.965660  ==

 3184 23:10:10.968755  RX Vref Scan: 0

 3185 23:10:10.968841  

 3186 23:10:10.972385  RX Vref 0 -> 0, step: 1

 3187 23:10:10.972465  

 3188 23:10:10.972547  RX Delay -40 -> 252, step: 8

 3189 23:10:10.978625  iDelay=200, Bit 0, Center 119 (48 ~ 191) 144

 3190 23:10:10.982216  iDelay=200, Bit 1, Center 111 (40 ~ 183) 144

 3191 23:10:10.985393  iDelay=200, Bit 2, Center 103 (32 ~ 175) 144

 3192 23:10:10.988524  iDelay=200, Bit 3, Center 119 (48 ~ 191) 144

 3193 23:10:10.992217  iDelay=200, Bit 4, Center 115 (48 ~ 183) 136

 3194 23:10:10.998867  iDelay=200, Bit 5, Center 127 (56 ~ 199) 144

 3195 23:10:11.002108  iDelay=200, Bit 6, Center 123 (56 ~ 191) 136

 3196 23:10:11.005491  iDelay=200, Bit 7, Center 115 (48 ~ 183) 136

 3197 23:10:11.008560  iDelay=200, Bit 8, Center 99 (32 ~ 167) 136

 3198 23:10:11.012273  iDelay=200, Bit 9, Center 99 (32 ~ 167) 136

 3199 23:10:11.015257  iDelay=200, Bit 10, Center 107 (40 ~ 175) 136

 3200 23:10:11.022495  iDelay=200, Bit 11, Center 107 (40 ~ 175) 136

 3201 23:10:11.025612  iDelay=200, Bit 12, Center 123 (56 ~ 191) 136

 3202 23:10:11.029063  iDelay=200, Bit 13, Center 115 (48 ~ 183) 136

 3203 23:10:11.032105  iDelay=200, Bit 14, Center 115 (48 ~ 183) 136

 3204 23:10:11.035945  iDelay=200, Bit 15, Center 115 (48 ~ 183) 136

 3205 23:10:11.039289  ==

 3206 23:10:11.039371  Dram Type= 6, Freq= 0, CH_1, rank 0

 3207 23:10:11.045818  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3208 23:10:11.045900  ==

 3209 23:10:11.045985  DQS Delay:

 3210 23:10:11.048878  DQS0 = 0, DQS1 = 0

 3211 23:10:11.048960  DQM Delay:

 3212 23:10:11.052818  DQM0 = 116, DQM1 = 110

 3213 23:10:11.052897  DQ Delay:

 3214 23:10:11.055773  DQ0 =119, DQ1 =111, DQ2 =103, DQ3 =119

 3215 23:10:11.059188  DQ4 =115, DQ5 =127, DQ6 =123, DQ7 =115

 3216 23:10:11.062540  DQ8 =99, DQ9 =99, DQ10 =107, DQ11 =107

 3217 23:10:11.066104  DQ12 =123, DQ13 =115, DQ14 =115, DQ15 =115

 3218 23:10:11.066182  

 3219 23:10:11.066282  

 3220 23:10:11.066378  ==

 3221 23:10:11.069185  Dram Type= 6, Freq= 0, CH_1, rank 0

 3222 23:10:11.072821  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3223 23:10:11.075991  ==

 3224 23:10:11.076070  

 3225 23:10:11.076154  

 3226 23:10:11.076239  	TX Vref Scan disable

 3227 23:10:11.079105   == TX Byte 0 ==

 3228 23:10:11.082748  Update DQ  dly =845 (3 ,2, 13)  DQ  OEN =(2 ,7)

 3229 23:10:11.086080  Update DQM dly =845 (3 ,2, 13)  DQM OEN =(2 ,7)

 3230 23:10:11.089423   == TX Byte 1 ==

 3231 23:10:11.092459  Update DQ  dly =849 (3 ,2, 17)  DQ  OEN =(2 ,7)

 3232 23:10:11.096309  Update DQM dly =849 (3 ,2, 17)  DQM OEN =(2 ,7)

 3233 23:10:11.096391  ==

 3234 23:10:11.099175  Dram Type= 6, Freq= 0, CH_1, rank 0

 3235 23:10:11.106065  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3236 23:10:11.106177  ==

 3237 23:10:11.117039  TX Vref=22, minBit 11, minWin=24, winSum=406

 3238 23:10:11.120244  TX Vref=24, minBit 1, minWin=25, winSum=415

 3239 23:10:11.123993  TX Vref=26, minBit 0, minWin=26, winSum=421

 3240 23:10:11.126992  TX Vref=28, minBit 0, minWin=26, winSum=424

 3241 23:10:11.130691  TX Vref=30, minBit 13, minWin=25, winSum=425

 3242 23:10:11.137276  TX Vref=32, minBit 13, minWin=25, winSum=424

 3243 23:10:11.140673  [TxChooseVref] Worse bit 0, Min win 26, Win sum 424, Final Vref 28

 3244 23:10:11.140755  

 3245 23:10:11.144235  Final TX Range 1 Vref 28

 3246 23:10:11.144317  

 3247 23:10:11.144459  ==

 3248 23:10:11.147068  Dram Type= 6, Freq= 0, CH_1, rank 0

 3249 23:10:11.150756  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3250 23:10:11.150838  ==

 3251 23:10:11.150903  

 3252 23:10:11.153530  

 3253 23:10:11.153612  	TX Vref Scan disable

 3254 23:10:11.157361   == TX Byte 0 ==

 3255 23:10:11.160674  Update DQ  dly =844 (3 ,2, 12)  DQ  OEN =(2 ,7)

 3256 23:10:11.164201  Update DQM dly =844 (3 ,2, 12)  DQM OEN =(2 ,7)

 3257 23:10:11.167214   == TX Byte 1 ==

 3258 23:10:11.170701  Update DQ  dly =848 (3 ,2, 16)  DQ  OEN =(2 ,7)

 3259 23:10:11.174070  Update DQM dly =848 (3 ,2, 16)  DQM OEN =(2 ,7)

 3260 23:10:11.174151  

 3261 23:10:11.177404  [DATLAT]

 3262 23:10:11.177484  Freq=1200, CH1 RK0

 3263 23:10:11.177550  

 3264 23:10:11.180788  DATLAT Default: 0xd

 3265 23:10:11.180869  0, 0xFFFF, sum = 0

 3266 23:10:11.183977  1, 0xFFFF, sum = 0

 3267 23:10:11.184060  2, 0xFFFF, sum = 0

 3268 23:10:11.187315  3, 0xFFFF, sum = 0

 3269 23:10:11.187398  4, 0xFFFF, sum = 0

 3270 23:10:11.190842  5, 0xFFFF, sum = 0

 3271 23:10:11.190925  6, 0xFFFF, sum = 0

 3272 23:10:11.194284  7, 0xFFFF, sum = 0

 3273 23:10:11.194367  8, 0xFFFF, sum = 0

 3274 23:10:11.197274  9, 0xFFFF, sum = 0

 3275 23:10:11.197357  10, 0xFFFF, sum = 0

 3276 23:10:11.200723  11, 0xFFFF, sum = 0

 3277 23:10:11.200806  12, 0x0, sum = 1

 3278 23:10:11.204512  13, 0x0, sum = 2

 3279 23:10:11.204613  14, 0x0, sum = 3

 3280 23:10:11.207400  15, 0x0, sum = 4

 3281 23:10:11.207483  best_step = 13

 3282 23:10:11.207548  

 3283 23:10:11.207608  ==

 3284 23:10:11.211222  Dram Type= 6, Freq= 0, CH_1, rank 0

 3285 23:10:11.218094  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3286 23:10:11.218176  ==

 3287 23:10:11.218242  RX Vref Scan: 1

 3288 23:10:11.218303  

 3289 23:10:11.220896  Set Vref Range= 32 -> 127

 3290 23:10:11.220978  

 3291 23:10:11.224502  RX Vref 32 -> 127, step: 1

 3292 23:10:11.224584  

 3293 23:10:11.227268  RX Delay -13 -> 252, step: 4

 3294 23:10:11.227350  

 3295 23:10:11.227417  Set Vref, RX VrefLevel [Byte0]: 32

 3296 23:10:11.231023                           [Byte1]: 32

 3297 23:10:11.235521  

 3298 23:10:11.235603  Set Vref, RX VrefLevel [Byte0]: 33

 3299 23:10:11.238656                           [Byte1]: 33

 3300 23:10:11.243469  

 3301 23:10:11.243550  Set Vref, RX VrefLevel [Byte0]: 34

 3302 23:10:11.246296                           [Byte1]: 34

 3303 23:10:11.250961  

 3304 23:10:11.251041  Set Vref, RX VrefLevel [Byte0]: 35

 3305 23:10:11.254759                           [Byte1]: 35

 3306 23:10:11.259093  

 3307 23:10:11.259174  Set Vref, RX VrefLevel [Byte0]: 36

 3308 23:10:11.262378                           [Byte1]: 36

 3309 23:10:11.267286  

 3310 23:10:11.267367  Set Vref, RX VrefLevel [Byte0]: 37

 3311 23:10:11.269998                           [Byte1]: 37

 3312 23:10:11.274864  

 3313 23:10:11.274948  Set Vref, RX VrefLevel [Byte0]: 38

 3314 23:10:11.278076                           [Byte1]: 38

 3315 23:10:11.282541  

 3316 23:10:11.282621  Set Vref, RX VrefLevel [Byte0]: 39

 3317 23:10:11.286090                           [Byte1]: 39

 3318 23:10:11.290435  

 3319 23:10:11.290516  Set Vref, RX VrefLevel [Byte0]: 40

 3320 23:10:11.294045                           [Byte1]: 40

 3321 23:10:11.298908  

 3322 23:10:11.298988  Set Vref, RX VrefLevel [Byte0]: 41

 3323 23:10:11.302152                           [Byte1]: 41

 3324 23:10:11.306282  

 3325 23:10:11.306389  Set Vref, RX VrefLevel [Byte0]: 42

 3326 23:10:11.309724                           [Byte1]: 42

 3327 23:10:11.314258  

 3328 23:10:11.314364  Set Vref, RX VrefLevel [Byte0]: 43

 3329 23:10:11.317817                           [Byte1]: 43

 3330 23:10:11.322766  

 3331 23:10:11.322846  Set Vref, RX VrefLevel [Byte0]: 44

 3332 23:10:11.325611                           [Byte1]: 44

 3333 23:10:11.329954  

 3334 23:10:11.330034  Set Vref, RX VrefLevel [Byte0]: 45

 3335 23:10:11.333540                           [Byte1]: 45

 3336 23:10:11.337948  

 3337 23:10:11.338029  Set Vref, RX VrefLevel [Byte0]: 46

 3338 23:10:11.341821                           [Byte1]: 46

 3339 23:10:11.345762  

 3340 23:10:11.345843  Set Vref, RX VrefLevel [Byte0]: 47

 3341 23:10:11.349047                           [Byte1]: 47

 3342 23:10:11.353592  

 3343 23:10:11.353673  Set Vref, RX VrefLevel [Byte0]: 48

 3344 23:10:11.356912                           [Byte1]: 48

 3345 23:10:11.361662  

 3346 23:10:11.361742  Set Vref, RX VrefLevel [Byte0]: 49

 3347 23:10:11.364865                           [Byte1]: 49

 3348 23:10:11.369090  

 3349 23:10:11.369174  Set Vref, RX VrefLevel [Byte0]: 50

 3350 23:10:11.373086                           [Byte1]: 50

 3351 23:10:11.377227  

 3352 23:10:11.377307  Set Vref, RX VrefLevel [Byte0]: 51

 3353 23:10:11.380428                           [Byte1]: 51

 3354 23:10:11.385286  

 3355 23:10:11.385366  Set Vref, RX VrefLevel [Byte0]: 52

 3356 23:10:11.388381                           [Byte1]: 52

 3357 23:10:11.393498  

 3358 23:10:11.393579  Set Vref, RX VrefLevel [Byte0]: 53

 3359 23:10:11.396563                           [Byte1]: 53

 3360 23:10:11.400787  

 3361 23:10:11.400902  Set Vref, RX VrefLevel [Byte0]: 54

 3362 23:10:11.404277                           [Byte1]: 54

 3363 23:10:11.408763  

 3364 23:10:11.408863  Set Vref, RX VrefLevel [Byte0]: 55

 3365 23:10:11.411968                           [Byte1]: 55

 3366 23:10:11.417083  

 3367 23:10:11.417165  Set Vref, RX VrefLevel [Byte0]: 56

 3368 23:10:11.419987                           [Byte1]: 56

 3369 23:10:11.424845  

 3370 23:10:11.424926  Set Vref, RX VrefLevel [Byte0]: 57

 3371 23:10:11.427928                           [Byte1]: 57

 3372 23:10:11.432470  

 3373 23:10:11.432552  Set Vref, RX VrefLevel [Byte0]: 58

 3374 23:10:11.435680                           [Byte1]: 58

 3375 23:10:11.440364  

 3376 23:10:11.440445  Set Vref, RX VrefLevel [Byte0]: 59

 3377 23:10:11.444286                           [Byte1]: 59

 3378 23:10:11.448676  

 3379 23:10:11.448758  Set Vref, RX VrefLevel [Byte0]: 60

 3380 23:10:11.451730                           [Byte1]: 60

 3381 23:10:11.456041  

 3382 23:10:11.456122  Set Vref, RX VrefLevel [Byte0]: 61

 3383 23:10:11.459478                           [Byte1]: 61

 3384 23:10:11.464431  

 3385 23:10:11.464513  Set Vref, RX VrefLevel [Byte0]: 62

 3386 23:10:11.467859                           [Byte1]: 62

 3387 23:10:11.472285  

 3388 23:10:11.472366  Set Vref, RX VrefLevel [Byte0]: 63

 3389 23:10:11.475089                           [Byte1]: 63

 3390 23:10:11.480110  

 3391 23:10:11.480191  Set Vref, RX VrefLevel [Byte0]: 64

 3392 23:10:11.483169                           [Byte1]: 64

 3393 23:10:11.487468  

 3394 23:10:11.487564  Set Vref, RX VrefLevel [Byte0]: 65

 3395 23:10:11.491030                           [Byte1]: 65

 3396 23:10:11.495630  

 3397 23:10:11.495711  Set Vref, RX VrefLevel [Byte0]: 66

 3398 23:10:11.498682                           [Byte1]: 66

 3399 23:10:11.503792  

 3400 23:10:11.503873  Set Vref, RX VrefLevel [Byte0]: 67

 3401 23:10:11.506516                           [Byte1]: 67

 3402 23:10:11.511274  

 3403 23:10:11.511356  Set Vref, RX VrefLevel [Byte0]: 68

 3404 23:10:11.514559                           [Byte1]: 68

 3405 23:10:11.519409  

 3406 23:10:11.519490  Set Vref, RX VrefLevel [Byte0]: 69

 3407 23:10:11.522761                           [Byte1]: 69

 3408 23:10:11.527547  

 3409 23:10:11.527629  Set Vref, RX VrefLevel [Byte0]: 70

 3410 23:10:11.530294                           [Byte1]: 70

 3411 23:10:11.534860  

 3412 23:10:11.534944  Final RX Vref Byte 0 = 62 to rank0

 3413 23:10:11.538327  Final RX Vref Byte 1 = 53 to rank0

 3414 23:10:11.542077  Final RX Vref Byte 0 = 62 to rank1

 3415 23:10:11.548688  Final RX Vref Byte 1 = 53 to rank1==

 3416 23:10:11.548773  Dram Type= 6, Freq= 0, CH_1, rank 0

 3417 23:10:11.552128  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3418 23:10:11.555056  ==

 3419 23:10:11.555138  DQS Delay:

 3420 23:10:11.555203  DQS0 = 0, DQS1 = 0

 3421 23:10:11.558562  DQM Delay:

 3422 23:10:11.558644  DQM0 = 116, DQM1 = 110

 3423 23:10:11.562150  DQ Delay:

 3424 23:10:11.565446  DQ0 =120, DQ1 =110, DQ2 =106, DQ3 =116

 3425 23:10:11.568988  DQ4 =116, DQ5 =124, DQ6 =128, DQ7 =114

 3426 23:10:11.572092  DQ8 =98, DQ9 =98, DQ10 =114, DQ11 =106

 3427 23:10:11.575782  DQ12 =118, DQ13 =118, DQ14 =116, DQ15 =114

 3428 23:10:11.575863  

 3429 23:10:11.575927  

 3430 23:10:11.582980  [DQSOSCAuto] RK0, (LSB)MR18= 0xfbdf, (MSB)MR19= 0x303, tDQSOscB0 = 423 ps tDQSOscB1 = 412 ps

 3431 23:10:11.585736  CH1 RK0: MR19=303, MR18=FBDF

 3432 23:10:11.592335  CH1_RK0: MR19=0x303, MR18=0xFBDF, DQSOSC=412, MR23=63, INC=38, DEC=25

 3433 23:10:11.592418  

 3434 23:10:11.596017  ----->DramcWriteLeveling(PI) begin...

 3435 23:10:11.596100  ==

 3436 23:10:11.598982  Dram Type= 6, Freq= 0, CH_1, rank 1

 3437 23:10:11.602589  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3438 23:10:11.602672  ==

 3439 23:10:11.605970  Write leveling (Byte 0): 26 => 26

 3440 23:10:11.609014  Write leveling (Byte 1): 27 => 27

 3441 23:10:11.612560  DramcWriteLeveling(PI) end<-----

 3442 23:10:11.612642  

 3443 23:10:11.612707  ==

 3444 23:10:11.615848  Dram Type= 6, Freq= 0, CH_1, rank 1

 3445 23:10:11.619428  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3446 23:10:11.619511  ==

 3447 23:10:11.622838  [Gating] SW mode calibration

 3448 23:10:11.629491  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 26 , u4TDQSCK_UI_min 3, 1:4ExtraMCK 0

 3449 23:10:11.635984  RX_Path_delay_UI(47) -3 - DQSINCTL_UI(32) = u1StartUI(15)

 3450 23:10:11.639442   0 15  0 | B1->B0 | 3434 3434 | 1 1 | (0 0) (1 1)

 3451 23:10:11.642626   0 15  4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 3452 23:10:11.649455   0 15  8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 3453 23:10:11.653243   0 15 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 3454 23:10:11.656729   0 15 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 3455 23:10:11.663013   0 15 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)

 3456 23:10:11.666757   0 15 24 | B1->B0 | 3333 2828 | 1 0 | (1 1) (1 0)

 3457 23:10:11.670334   0 15 28 | B1->B0 | 2727 2323 | 0 0 | (0 0) (0 0)

 3458 23:10:11.676471   1  0  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 3459 23:10:11.680174   1  0  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 3460 23:10:11.683471   1  0  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 3461 23:10:11.686726   1  0 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 3462 23:10:11.693256   1  0 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 3463 23:10:11.696417   1  0 20 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)

 3464 23:10:11.700191   1  0 24 | B1->B0 | 2323 3b3b | 0 0 | (0 0) (1 1)

 3465 23:10:11.707176   1  0 28 | B1->B0 | 3f3f 4646 | 0 0 | (0 0) (0 0)

 3466 23:10:11.709838   1  1  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 3467 23:10:11.713596   1  1  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 3468 23:10:11.719847   1  1  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 3469 23:10:11.723727   1  1 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 3470 23:10:11.726511   1  1 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 3471 23:10:11.733080   1  1 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 3472 23:10:11.736282   1  1 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 3473 23:10:11.740141   1  1 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)

 3474 23:10:11.746246   1  2  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3475 23:10:11.749820   1  2  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3476 23:10:11.753004   1  2  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3477 23:10:11.760213   1  2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3478 23:10:11.763281   1  2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3479 23:10:11.766591   1  2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3480 23:10:11.770206   1  2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3481 23:10:11.776291   1  2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3482 23:10:11.780115   1  3  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3483 23:10:11.783536   1  3  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3484 23:10:11.790322   1  3  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3485 23:10:11.793447   1  3 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3486 23:10:11.796897   1  3 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3487 23:10:11.804131   1  3 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 3488 23:10:11.807046   1  3 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)

 3489 23:10:11.810243   1  3 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)

 3490 23:10:11.813712  Total UI for P1: 0, mck2ui 16

 3491 23:10:11.817116  best dqsien dly found for B0: ( 1,  3, 24)

 3492 23:10:11.820566   1  4  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 3493 23:10:11.824017  Total UI for P1: 0, mck2ui 16

 3494 23:10:11.826956  best dqsien dly found for B1: ( 1,  3, 26)

 3495 23:10:11.830143  best DQS0 dly(MCK, UI, PI) = (1, 3, 24)

 3496 23:10:11.837440  best DQS1 dly(MCK, UI, PI) = (1, 3, 26)

 3497 23:10:11.837522  

 3498 23:10:11.840363  best DQS0 P1 dly(MCK, UI, PI) = (1, 7, 24)

 3499 23:10:11.843868  best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 26)

 3500 23:10:11.847198  [Gating] SW calibration Done

 3501 23:10:11.847280  ==

 3502 23:10:11.850132  Dram Type= 6, Freq= 0, CH_1, rank 1

 3503 23:10:11.854169  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3504 23:10:11.854251  ==

 3505 23:10:11.854317  RX Vref Scan: 0

 3506 23:10:11.857399  

 3507 23:10:11.857480  RX Vref 0 -> 0, step: 1

 3508 23:10:11.857545  

 3509 23:10:11.860598  RX Delay -40 -> 252, step: 8

 3510 23:10:11.863969  iDelay=192, Bit 0, Center 111 (40 ~ 183) 144

 3511 23:10:11.866961  iDelay=192, Bit 1, Center 111 (40 ~ 183) 144

 3512 23:10:11.873990  iDelay=192, Bit 2, Center 103 (32 ~ 175) 144

 3513 23:10:11.877180  iDelay=192, Bit 3, Center 115 (48 ~ 183) 136

 3514 23:10:11.880566  iDelay=192, Bit 4, Center 111 (40 ~ 183) 144

 3515 23:10:11.883701  iDelay=192, Bit 5, Center 123 (56 ~ 191) 136

 3516 23:10:11.887485  iDelay=192, Bit 6, Center 119 (48 ~ 191) 144

 3517 23:10:11.894044  iDelay=192, Bit 7, Center 107 (40 ~ 175) 136

 3518 23:10:11.897100  iDelay=192, Bit 8, Center 103 (32 ~ 175) 144

 3519 23:10:11.900730  iDelay=192, Bit 9, Center 95 (24 ~ 167) 144

 3520 23:10:11.903860  iDelay=192, Bit 10, Center 111 (40 ~ 183) 144

 3521 23:10:11.907561  iDelay=192, Bit 11, Center 103 (32 ~ 175) 144

 3522 23:10:11.913974  iDelay=192, Bit 12, Center 115 (48 ~ 183) 136

 3523 23:10:11.917532  iDelay=192, Bit 13, Center 123 (56 ~ 191) 136

 3524 23:10:11.920365  iDelay=192, Bit 14, Center 119 (48 ~ 191) 144

 3525 23:10:11.923802  iDelay=192, Bit 15, Center 119 (48 ~ 191) 144

 3526 23:10:11.923882  ==

 3527 23:10:11.927427  Dram Type= 6, Freq= 0, CH_1, rank 1

 3528 23:10:11.930952  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3529 23:10:11.933747  ==

 3530 23:10:11.933829  DQS Delay:

 3531 23:10:11.933911  DQS0 = 0, DQS1 = 0

 3532 23:10:11.937677  DQM Delay:

 3533 23:10:11.937753  DQM0 = 112, DQM1 = 111

 3534 23:10:11.940882  DQ Delay:

 3535 23:10:11.944050  DQ0 =111, DQ1 =111, DQ2 =103, DQ3 =115

 3536 23:10:11.947046  DQ4 =111, DQ5 =123, DQ6 =119, DQ7 =107

 3537 23:10:11.950376  DQ8 =103, DQ9 =95, DQ10 =111, DQ11 =103

 3538 23:10:11.954002  DQ12 =115, DQ13 =123, DQ14 =119, DQ15 =119

 3539 23:10:11.954088  

 3540 23:10:11.954170  

 3541 23:10:11.954248  ==

 3542 23:10:11.957305  Dram Type= 6, Freq= 0, CH_1, rank 1

 3543 23:10:11.960481  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3544 23:10:11.960565  ==

 3545 23:10:11.960647  

 3546 23:10:11.960725  

 3547 23:10:11.964426  	TX Vref Scan disable

 3548 23:10:11.967107   == TX Byte 0 ==

 3549 23:10:11.970765  Update DQ  dly =844 (3 ,2, 12)  DQ  OEN =(2 ,7)

 3550 23:10:11.973692  Update DQM dly =844 (3 ,2, 12)  DQM OEN =(2 ,7)

 3551 23:10:11.977116   == TX Byte 1 ==

 3552 23:10:11.980719  Update DQ  dly =845 (3 ,2, 13)  DQ  OEN =(2 ,7)

 3553 23:10:11.983982  Update DQM dly =845 (3 ,2, 13)  DQM OEN =(2 ,7)

 3554 23:10:11.984057  ==

 3555 23:10:11.987247  Dram Type= 6, Freq= 0, CH_1, rank 1

 3556 23:10:11.994033  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3557 23:10:11.994114  ==

 3558 23:10:12.003944  TX Vref=22, minBit 1, minWin=25, winSum=419

 3559 23:10:12.007778  TX Vref=24, minBit 1, minWin=25, winSum=419

 3560 23:10:12.010809  TX Vref=26, minBit 3, minWin=26, winSum=431

 3561 23:10:12.014345  TX Vref=28, minBit 0, minWin=26, winSum=433

 3562 23:10:12.017318  TX Vref=30, minBit 2, minWin=26, winSum=435

 3563 23:10:12.020916  TX Vref=32, minBit 0, minWin=26, winSum=433

 3564 23:10:12.027667  [TxChooseVref] Worse bit 2, Min win 26, Win sum 435, Final Vref 30

 3565 23:10:12.027753  

 3566 23:10:12.030799  Final TX Range 1 Vref 30

 3567 23:10:12.030888  

 3568 23:10:12.030973  ==

 3569 23:10:12.034299  Dram Type= 6, Freq= 0, CH_1, rank 1

 3570 23:10:12.037477  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3571 23:10:12.037556  ==

 3572 23:10:12.037638  

 3573 23:10:12.037725  

 3574 23:10:12.040873  	TX Vref Scan disable

 3575 23:10:12.043983   == TX Byte 0 ==

 3576 23:10:12.047831  Update DQ  dly =844 (3 ,2, 12)  DQ  OEN =(2 ,7)

 3577 23:10:12.051030  Update DQM dly =844 (3 ,2, 12)  DQM OEN =(2 ,7)

 3578 23:10:12.054036   == TX Byte 1 ==

 3579 23:10:12.057473  Update DQ  dly =844 (3 ,2, 12)  DQ  OEN =(2 ,7)

 3580 23:10:12.061162  Update DQM dly =844 (3 ,2, 12)  DQM OEN =(2 ,7)

 3581 23:10:12.061250  

 3582 23:10:12.064459  [DATLAT]

 3583 23:10:12.064551  Freq=1200, CH1 RK1

 3584 23:10:12.064638  

 3585 23:10:12.067626  DATLAT Default: 0xd

 3586 23:10:12.067703  0, 0xFFFF, sum = 0

 3587 23:10:12.071008  1, 0xFFFF, sum = 0

 3588 23:10:12.071089  2, 0xFFFF, sum = 0

 3589 23:10:12.074384  3, 0xFFFF, sum = 0

 3590 23:10:12.074510  4, 0xFFFF, sum = 0

 3591 23:10:12.078170  5, 0xFFFF, sum = 0

 3592 23:10:12.078262  6, 0xFFFF, sum = 0

 3593 23:10:12.080894  7, 0xFFFF, sum = 0

 3594 23:10:12.080972  8, 0xFFFF, sum = 0

 3595 23:10:12.084665  9, 0xFFFF, sum = 0

 3596 23:10:12.084742  10, 0xFFFF, sum = 0

 3597 23:10:12.087957  11, 0xFFFF, sum = 0

 3598 23:10:12.088041  12, 0x0, sum = 1

 3599 23:10:12.090905  13, 0x0, sum = 2

 3600 23:10:12.090984  14, 0x0, sum = 3

 3601 23:10:12.094721  15, 0x0, sum = 4

 3602 23:10:12.094798  best_step = 13

 3603 23:10:12.094880  

 3604 23:10:12.094963  ==

 3605 23:10:12.097757  Dram Type= 6, Freq= 0, CH_1, rank 1

 3606 23:10:12.104483  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3607 23:10:12.104565  ==

 3608 23:10:12.104648  RX Vref Scan: 0

 3609 23:10:12.104734  

 3610 23:10:12.107998  RX Vref 0 -> 0, step: 1

 3611 23:10:12.108076  

 3612 23:10:12.111050  RX Delay -21 -> 252, step: 4

 3613 23:10:12.114578  iDelay=187, Bit 0, Center 114 (47 ~ 182) 136

 3614 23:10:12.117894  iDelay=187, Bit 1, Center 108 (43 ~ 174) 132

 3615 23:10:12.121392  iDelay=187, Bit 2, Center 104 (39 ~ 170) 132

 3616 23:10:12.128355  iDelay=187, Bit 3, Center 112 (47 ~ 178) 132

 3617 23:10:12.131359  iDelay=187, Bit 4, Center 114 (51 ~ 178) 128

 3618 23:10:12.135091  iDelay=187, Bit 5, Center 122 (59 ~ 186) 128

 3619 23:10:12.138137  iDelay=187, Bit 6, Center 120 (55 ~ 186) 132

 3620 23:10:12.141280  iDelay=187, Bit 7, Center 110 (47 ~ 174) 128

 3621 23:10:12.147900  iDelay=187, Bit 8, Center 98 (31 ~ 166) 136

 3622 23:10:12.151600  iDelay=187, Bit 9, Center 98 (35 ~ 162) 128

 3623 23:10:12.154567  iDelay=187, Bit 10, Center 112 (47 ~ 178) 132

 3624 23:10:12.157797  iDelay=187, Bit 11, Center 102 (35 ~ 170) 136

 3625 23:10:12.161214  iDelay=187, Bit 12, Center 114 (51 ~ 178) 128

 3626 23:10:12.168167  iDelay=187, Bit 13, Center 118 (55 ~ 182) 128

 3627 23:10:12.171588  iDelay=187, Bit 14, Center 118 (55 ~ 182) 128

 3628 23:10:12.174721  iDelay=187, Bit 15, Center 120 (55 ~ 186) 132

 3629 23:10:12.174803  ==

 3630 23:10:12.177805  Dram Type= 6, Freq= 0, CH_1, rank 1

 3631 23:10:12.181669  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3632 23:10:12.181756  ==

 3633 23:10:12.185219  DQS Delay:

 3634 23:10:12.185301  DQS0 = 0, DQS1 = 0

 3635 23:10:12.187820  DQM Delay:

 3636 23:10:12.187901  DQM0 = 113, DQM1 = 110

 3637 23:10:12.187966  DQ Delay:

 3638 23:10:12.194640  DQ0 =114, DQ1 =108, DQ2 =104, DQ3 =112

 3639 23:10:12.197996  DQ4 =114, DQ5 =122, DQ6 =120, DQ7 =110

 3640 23:10:12.201183  DQ8 =98, DQ9 =98, DQ10 =112, DQ11 =102

 3641 23:10:12.204942  DQ12 =114, DQ13 =118, DQ14 =118, DQ15 =120

 3642 23:10:12.205071  

 3643 23:10:12.205136  

 3644 23:10:12.211229  [DQSOSCAuto] RK1, (LSB)MR18= 0xfa00, (MSB)MR19= 0x304, tDQSOscB0 = 410 ps tDQSOscB1 = 412 ps

 3645 23:10:12.214675  CH1 RK1: MR19=304, MR18=FA00

 3646 23:10:12.221716  CH1_RK1: MR19=0x304, MR18=0xFA00, DQSOSC=410, MR23=63, INC=39, DEC=26

 3647 23:10:12.224606  [RxdqsGatingPostProcess] freq 1200

 3648 23:10:12.228254  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2

 3649 23:10:12.231480  best DQS0 dly(2T, 0.5T) = (0, 11)

 3650 23:10:12.234720  best DQS1 dly(2T, 0.5T) = (0, 11)

 3651 23:10:12.238446  best DQS0 P1 dly(2T, 0.5T) = (0, 15)

 3652 23:10:12.241814  best DQS1 P1 dly(2T, 0.5T) = (0, 15)

 3653 23:10:12.244855  best DQS0 dly(2T, 0.5T) = (0, 11)

 3654 23:10:12.248419  best DQS1 dly(2T, 0.5T) = (0, 11)

 3655 23:10:12.251629  best DQS0 P1 dly(2T, 0.5T) = (0, 15)

 3656 23:10:12.255538  best DQS1 P1 dly(2T, 0.5T) = (0, 15)

 3657 23:10:12.258422  Pre-setting of DQS Precalculation

 3658 23:10:12.261812  [DualRankRxdatlatCal] RK0: 13, RK1: 13, Final_Datlat 13

 3659 23:10:12.271833  sync_frequency_calibration_params sync calibration params of frequency 1200 to shu:2

 3660 23:10:12.278210  calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464

 3661 23:10:12.278320  

 3662 23:10:12.278451  

 3663 23:10:12.281786  [Calibration Summary] 2400 Mbps

 3664 23:10:12.281867  CH 0, Rank 0

 3665 23:10:12.285215  SW Impedance     : PASS

 3666 23:10:12.285297  DUTY Scan        : NO K

 3667 23:10:12.288443  ZQ Calibration   : PASS

 3668 23:10:12.291875  Jitter Meter     : NO K

 3669 23:10:12.291957  CBT Training     : PASS

 3670 23:10:12.295383  Write leveling   : PASS

 3671 23:10:12.295465  RX DQS gating    : PASS

 3672 23:10:12.298310  RX DQ/DQS(RDDQC) : PASS

 3673 23:10:12.301737  TX DQ/DQS        : PASS

 3674 23:10:12.301819  RX DATLAT        : PASS

 3675 23:10:12.304751  RX DQ/DQS(Engine): PASS

 3676 23:10:12.308370  TX OE            : NO K

 3677 23:10:12.308486  All Pass.

 3678 23:10:12.308583  

 3679 23:10:12.308659  CH 0, Rank 1

 3680 23:10:12.311634  SW Impedance     : PASS

 3681 23:10:12.314632  DUTY Scan        : NO K

 3682 23:10:12.314714  ZQ Calibration   : PASS

 3683 23:10:12.318014  Jitter Meter     : NO K

 3684 23:10:12.321661  CBT Training     : PASS

 3685 23:10:12.321743  Write leveling   : PASS

 3686 23:10:12.325087  RX DQS gating    : PASS

 3687 23:10:12.328195  RX DQ/DQS(RDDQC) : PASS

 3688 23:10:12.328276  TX DQ/DQS        : PASS

 3689 23:10:12.331648  RX DATLAT        : PASS

 3690 23:10:12.334703  RX DQ/DQS(Engine): PASS

 3691 23:10:12.334811  TX OE            : NO K

 3692 23:10:12.334905  All Pass.

 3693 23:10:12.338353  

 3694 23:10:12.338491  CH 1, Rank 0

 3695 23:10:12.341947  SW Impedance     : PASS

 3696 23:10:12.342029  DUTY Scan        : NO K

 3697 23:10:12.344857  ZQ Calibration   : PASS

 3698 23:10:12.344938  Jitter Meter     : NO K

 3699 23:10:12.348497  CBT Training     : PASS

 3700 23:10:12.351414  Write leveling   : PASS

 3701 23:10:12.351496  RX DQS gating    : PASS

 3702 23:10:12.354716  RX DQ/DQS(RDDQC) : PASS

 3703 23:10:12.358837  TX DQ/DQS        : PASS

 3704 23:10:12.358919  RX DATLAT        : PASS

 3705 23:10:12.361401  RX DQ/DQS(Engine): PASS

 3706 23:10:12.364955  TX OE            : NO K

 3707 23:10:12.365038  All Pass.

 3708 23:10:12.365103  

 3709 23:10:12.365232  CH 1, Rank 1

 3710 23:10:12.368299  SW Impedance     : PASS

 3711 23:10:12.371464  DUTY Scan        : NO K

 3712 23:10:12.371546  ZQ Calibration   : PASS

 3713 23:10:12.375161  Jitter Meter     : NO K

 3714 23:10:12.378738  CBT Training     : PASS

 3715 23:10:12.378820  Write leveling   : PASS

 3716 23:10:12.381575  RX DQS gating    : PASS

 3717 23:10:12.384847  RX DQ/DQS(RDDQC) : PASS

 3718 23:10:12.384929  TX DQ/DQS        : PASS

 3719 23:10:12.388364  RX DATLAT        : PASS

 3720 23:10:12.388446  RX DQ/DQS(Engine): PASS

 3721 23:10:12.391645  TX OE            : NO K

 3722 23:10:12.391727  All Pass.

 3723 23:10:12.391792  

 3724 23:10:12.394876  DramC Write-DBI off

 3725 23:10:12.398243  	PER_BANK_REFRESH: Hybrid Mode

 3726 23:10:12.398344  TX_TRACKING: ON

 3727 23:10:12.408118  [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 72, TRFC_05T 1, TXREFCNT 87, TRFCpb 30, TRFCpb_05T 1

 3728 23:10:12.411613  [FAST_K] Save calibration result to emmc

 3729 23:10:12.415434  dramc_set_vcore_voltage set vcore to 650000

 3730 23:10:12.418226  Read voltage for 600, 5

 3731 23:10:12.418310  Vio18 = 0

 3732 23:10:12.418374  Vcore = 650000

 3733 23:10:12.421937  Vdram = 0

 3734 23:10:12.422017  Vddq = 0

 3735 23:10:12.422081  Vmddr = 0

 3736 23:10:12.428486  [FAST_K] DramcSave_Time_For_Cal_Init SHU4, femmc_Ready=0

 3737 23:10:12.431499  [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0

 3738 23:10:12.434813  MEM_TYPE=3, freq_sel=19

 3739 23:10:12.438693  sv_algorithm_assistance_LP4_1600 

 3740 23:10:12.441684  ============ PULL DRAM RESETB DOWN ============

 3741 23:10:12.444963  ========== PULL DRAM RESETB DOWN end =========

 3742 23:10:12.451708  [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2

 3743 23:10:12.454988  =================================== 

 3744 23:10:12.458253  LPDDR4 DRAM CONFIGURATION

 3745 23:10:12.461556  =================================== 

 3746 23:10:12.461638  EX_ROW_EN[0]    = 0x0

 3747 23:10:12.465107  EX_ROW_EN[1]    = 0x0

 3748 23:10:12.465191  LP4Y_EN      = 0x0

 3749 23:10:12.468429  WORK_FSP     = 0x0

 3750 23:10:12.468511  WL           = 0x2

 3751 23:10:12.471499  RL           = 0x2

 3752 23:10:12.471580  BL           = 0x2

 3753 23:10:12.475191  RPST         = 0x0

 3754 23:10:12.475273  RD_PRE       = 0x0

 3755 23:10:12.479395  WR_PRE       = 0x1

 3756 23:10:12.479478  WR_PST       = 0x0

 3757 23:10:12.481855  DBI_WR       = 0x0

 3758 23:10:12.481937  DBI_RD       = 0x0

 3759 23:10:12.484897  OTF          = 0x1

 3760 23:10:12.488765  =================================== 

 3761 23:10:12.491923  =================================== 

 3762 23:10:12.492006  ANA top config

 3763 23:10:12.494864  =================================== 

 3764 23:10:12.498609  DLL_ASYNC_EN            =  0

 3765 23:10:12.502095  ALL_SLAVE_EN            =  1

 3766 23:10:12.505087  NEW_RANK_MODE           =  1

 3767 23:10:12.505170  DLL_IDLE_MODE           =  1

 3768 23:10:12.508466  LP45_APHY_COMB_EN       =  1

 3769 23:10:12.511550  TX_ODT_DIS              =  1

 3770 23:10:12.515085  NEW_8X_MODE             =  1

 3771 23:10:12.518487  =================================== 

 3772 23:10:12.522181  =================================== 

 3773 23:10:12.524923  data_rate                  = 1200

 3774 23:10:12.525007  CKR                        = 1

 3775 23:10:12.528542  DQ_P2S_RATIO               = 8

 3776 23:10:12.531909  =================================== 

 3777 23:10:12.535489  CA_P2S_RATIO               = 8

 3778 23:10:12.538498  DQ_CA_OPEN                 = 0

 3779 23:10:12.542164  DQ_SEMI_OPEN               = 0

 3780 23:10:12.542246  CA_SEMI_OPEN               = 0

 3781 23:10:12.545214  CA_FULL_RATE               = 0

 3782 23:10:12.548645  DQ_CKDIV4_EN               = 1

 3783 23:10:12.551872  CA_CKDIV4_EN               = 1

 3784 23:10:12.555200  CA_PREDIV_EN               = 0

 3785 23:10:12.558316  PH8_DLY                    = 0

 3786 23:10:12.558407  SEMI_OPEN_CA_PICK_MCK_RATIO= 0

 3787 23:10:12.561532  DQ_AAMCK_DIV               = 4

 3788 23:10:12.565352  CA_AAMCK_DIV               = 4

 3789 23:10:12.568272  CA_ADMCK_DIV               = 4

 3790 23:10:12.572056  DQ_TRACK_CA_EN             = 0

 3791 23:10:12.575111  CA_PICK                    = 600

 3792 23:10:12.575253  CA_MCKIO                   = 600

 3793 23:10:12.578323  MCKIO_SEMI                 = 0

 3794 23:10:12.582366  PLL_FREQ                   = 2288

 3795 23:10:12.585197  DQ_UI_PI_RATIO             = 32

 3796 23:10:12.588632  CA_UI_PI_RATIO             = 0

 3797 23:10:12.591934  =================================== 

 3798 23:10:12.595658  =================================== 

 3799 23:10:12.598873  memory_type:LPDDR4         

 3800 23:10:12.598956  GP_NUM     : 10       

 3801 23:10:12.602200  SRAM_EN    : 1       

 3802 23:10:12.602282  MD32_EN    : 0       

 3803 23:10:12.605309  =================================== 

 3804 23:10:12.608838  [ANA_INIT] >>>>>>>>>>>>>> 

 3805 23:10:12.612272  <<<<<< [CONFIGURE PHASE]: ANA_TX

 3806 23:10:12.615601  >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL

 3807 23:10:12.618364  =================================== 

 3808 23:10:12.621634  data_rate = 1200,PCW = 0X5800

 3809 23:10:12.625362  =================================== 

 3810 23:10:12.628867  <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL

 3811 23:10:12.631996  >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration

 3812 23:10:12.638671  <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration

 3813 23:10:12.642577  >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2

 3814 23:10:12.648659  >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL

 3815 23:10:12.651986  <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL

 3816 23:10:12.652068  [ANA_INIT] flow start 

 3817 23:10:12.655011  [ANA_INIT] PLL >>>>>>>> 

 3818 23:10:12.658663  [ANA_INIT] PLL <<<<<<<< 

 3819 23:10:12.658745  [ANA_INIT] MIDPI >>>>>>>> 

 3820 23:10:12.661996  [ANA_INIT] MIDPI <<<<<<<< 

 3821 23:10:12.665585  [ANA_INIT] DLL >>>>>>>> 

 3822 23:10:12.665666  [ANA_INIT] flow end 

 3823 23:10:12.668681  ============ LP4 DIFF to SE enter ============

 3824 23:10:12.675578  ============ LP4 DIFF to SE exit  ============

 3825 23:10:12.675660  [ANA_INIT] <<<<<<<<<<<<< 

 3826 23:10:12.678754  [Flow] Enable top DCM control >>>>> 

 3827 23:10:12.682226  [Flow] Enable top DCM control <<<<< 

 3828 23:10:12.685681  Enable DLL master slave shuffle 

 3829 23:10:12.692458  ============================================================== 

 3830 23:10:12.692559  Gating Mode config

 3831 23:10:12.698808  ============================================================== 

 3832 23:10:12.702290  Config description: 

 3833 23:10:12.709117  RX_GATING_MODE        0: Pulse Mode      1: Burst Mode(8UI)        2: Burst Mode(7UI)  3: Original Burst Mode

 3834 23:10:12.715798  RX_GATING_TRACK_MODE  0: Valid DLY Mode  1: Valid Mode (-like) 2: FIFO mode

 3835 23:10:12.722895  SELPH_MODE            0: By rank         1: By Phase 

 3836 23:10:12.725858  ============================================================== 

 3837 23:10:12.729042  GAT_TRACK_EN                 =  1

 3838 23:10:12.732772  RX_GATING_MODE               =  2

 3839 23:10:12.735834  RX_GATING_TRACK_MODE         =  2

 3840 23:10:12.739418  SELPH_MODE                   =  1

 3841 23:10:12.742592  PICG_EARLY_EN                =  1

 3842 23:10:12.745761  VALID_LAT_VALUE              =  1

 3843 23:10:12.752487  ============================================================== 

 3844 23:10:12.756057  Enter into Gating configuration >>>> 

 3845 23:10:12.759250  Exit from Gating configuration <<<< 

 3846 23:10:12.759349  Enter into  DVFS_PRE_config >>>>> 

 3847 23:10:12.772383  Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL. 

 3848 23:10:12.776005  Exit from  DVFS_PRE_config <<<<< 

 3849 23:10:12.779419  Enter into PICG configuration >>>> 

 3850 23:10:12.782931  Exit from PICG configuration <<<< 

 3851 23:10:12.783029  [RX_INPUT] configuration >>>>> 

 3852 23:10:12.785784  [RX_INPUT] configuration <<<<< 

 3853 23:10:12.792607  [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>

 3854 23:10:12.795990  [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<

 3855 23:10:12.802575  [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>

 3856 23:10:12.809319  [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<

 3857 23:10:12.815713  [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>

 3858 23:10:12.822475  [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<

 3859 23:10:12.826145  [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0 

 3860 23:10:12.829093  [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0 

 3861 23:10:12.832841  [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0 

 3862 23:10:12.839326  [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0 

 3863 23:10:12.843093  [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0 

 3864 23:10:12.845794  [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2

 3865 23:10:12.849149  =================================== 

 3866 23:10:12.852685  LPDDR4 DRAM CONFIGURATION

 3867 23:10:12.856233  =================================== 

 3868 23:10:12.859615  EX_ROW_EN[0]    = 0x0

 3869 23:10:12.859722  EX_ROW_EN[1]    = 0x0

 3870 23:10:12.862551  LP4Y_EN      = 0x0

 3871 23:10:12.862636  WORK_FSP     = 0x0

 3872 23:10:12.865925  WL           = 0x2

 3873 23:10:12.866007  RL           = 0x2

 3874 23:10:12.869415  BL           = 0x2

 3875 23:10:12.869522  RPST         = 0x0

 3876 23:10:12.872415  RD_PRE       = 0x0

 3877 23:10:12.872496  WR_PRE       = 0x1

 3878 23:10:12.875777  WR_PST       = 0x0

 3879 23:10:12.875869  DBI_WR       = 0x0

 3880 23:10:12.879488  DBI_RD       = 0x0

 3881 23:10:12.879570  OTF          = 0x1

 3882 23:10:12.882610  =================================== 

 3883 23:10:12.886635  [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0 

 3884 23:10:12.892392  [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0 

 3885 23:10:12.896536  [ModeRegister RLWL Config] data_rate:1200-MR2_RLWL:2

 3886 23:10:12.899476  =================================== 

 3887 23:10:12.902450  LPDDR4 DRAM CONFIGURATION

 3888 23:10:12.906010  =================================== 

 3889 23:10:12.906110  EX_ROW_EN[0]    = 0x10

 3890 23:10:12.909227  EX_ROW_EN[1]    = 0x0

 3891 23:10:12.912897  LP4Y_EN      = 0x0

 3892 23:10:12.912995  WORK_FSP     = 0x0

 3893 23:10:12.916289  WL           = 0x2

 3894 23:10:12.916387  RL           = 0x2

 3895 23:10:12.919062  BL           = 0x2

 3896 23:10:12.919160  RPST         = 0x0

 3897 23:10:12.922559  RD_PRE       = 0x0

 3898 23:10:12.922657  WR_PRE       = 0x1

 3899 23:10:12.926044  WR_PST       = 0x0

 3900 23:10:12.926173  DBI_WR       = 0x0

 3901 23:10:12.929304  DBI_RD       = 0x0

 3902 23:10:12.929402  OTF          = 0x1

 3903 23:10:12.932569  =================================== 

 3904 23:10:12.939311  [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit

 3905 23:10:12.943276  nWR fixed to 30

 3906 23:10:12.946472  [ModeRegInit_LP4] CH0 RK0

 3907 23:10:12.946567  [ModeRegInit_LP4] CH0 RK1

 3908 23:10:12.950272  [ModeRegInit_LP4] CH1 RK0

 3909 23:10:12.953139  [ModeRegInit_LP4] CH1 RK1

 3910 23:10:12.953304  match AC timing 17

 3911 23:10:12.960397  dramType 5, freq 600, readDBI 0, DivMode 1, cbtMode 1

 3912 23:10:12.963591  SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON

 3913 23:10:12.966961  [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8

 3914 23:10:12.973728  [TX_path_calculate] data rate=1200, WL=8, DQS_TotalUI=17

 3915 23:10:12.976463  [TX_path_calculate] DQS = (2,1) DQS_OE = (1,6)

 3916 23:10:12.976570  ==

 3917 23:10:12.979928  Dram Type= 6, Freq= 0, CH_0, rank 0

 3918 23:10:12.983230  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3919 23:10:12.983306  ==

 3920 23:10:12.989738  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 3921 23:10:12.996799  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37

 3922 23:10:13.000049  [CA 0] Center 36 (6~66) winsize 61

 3923 23:10:13.003409  [CA 1] Center 36 (6~66) winsize 61

 3924 23:10:13.006638  [CA 2] Center 34 (4~65) winsize 62

 3925 23:10:13.010249  [CA 3] Center 34 (4~65) winsize 62

 3926 23:10:13.013129  [CA 4] Center 33 (3~64) winsize 62

 3927 23:10:13.017164  [CA 5] Center 33 (3~64) winsize 62

 3928 23:10:13.017260  

 3929 23:10:13.020371  [CmdBusTrainingLP45] Vref(ca) range 1: 37

 3930 23:10:13.020481  

 3931 23:10:13.023221  [CATrainingPosCal] consider 1 rank data

 3932 23:10:13.026548  u2DelayCellTimex100 = 270/100 ps

 3933 23:10:13.029948  CA0 delay=36 (6~66),Diff = 3 PI (28 cell)

 3934 23:10:13.033733  CA1 delay=36 (6~66),Diff = 3 PI (28 cell)

 3935 23:10:13.037021  CA2 delay=34 (4~65),Diff = 1 PI (9 cell)

 3936 23:10:13.040058  CA3 delay=34 (4~65),Diff = 1 PI (9 cell)

 3937 23:10:13.043653  CA4 delay=33 (3~64),Diff = 0 PI (0 cell)

 3938 23:10:13.046558  CA5 delay=33 (3~64),Diff = 0 PI (0 cell)

 3939 23:10:13.046641  

 3940 23:10:13.053382  CA PerBit enable=1, Macro0, CA PI delay=33

 3941 23:10:13.053463  

 3942 23:10:13.053526  [CBTSetCACLKResult] CA Dly = 33

 3943 23:10:13.057042  CS Dly: 4 (0~35)

 3944 23:10:13.057123  ==

 3945 23:10:13.060078  Dram Type= 6, Freq= 0, CH_0, rank 1

 3946 23:10:13.063161  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3947 23:10:13.063243  ==

 3948 23:10:13.069686  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 3949 23:10:13.076315  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35

 3950 23:10:13.080322  [CA 0] Center 36 (6~66) winsize 61

 3951 23:10:13.083404  [CA 1] Center 36 (6~66) winsize 61

 3952 23:10:13.086133  [CA 2] Center 34 (4~65) winsize 62

 3953 23:10:13.090001  [CA 3] Center 34 (4~65) winsize 62

 3954 23:10:13.093365  [CA 4] Center 33 (3~64) winsize 62

 3955 23:10:13.096572  [CA 5] Center 33 (3~64) winsize 62

 3956 23:10:13.096674  

 3957 23:10:13.099992  [CmdBusTrainingLP45] Vref(ca) range 1: 35

 3958 23:10:13.100096  

 3959 23:10:13.103025  [CATrainingPosCal] consider 2 rank data

 3960 23:10:13.106581  u2DelayCellTimex100 = 270/100 ps

 3961 23:10:13.110025  CA0 delay=36 (6~66),Diff = 3 PI (28 cell)

 3962 23:10:13.113126  CA1 delay=36 (6~66),Diff = 3 PI (28 cell)

 3963 23:10:13.116237  CA2 delay=34 (4~65),Diff = 1 PI (9 cell)

 3964 23:10:13.119593  CA3 delay=34 (4~65),Diff = 1 PI (9 cell)

 3965 23:10:13.123347  CA4 delay=33 (3~64),Diff = 0 PI (0 cell)

 3966 23:10:13.126618  CA5 delay=33 (3~64),Diff = 0 PI (0 cell)

 3967 23:10:13.129766  

 3968 23:10:13.133265  CA PerBit enable=1, Macro0, CA PI delay=33

 3969 23:10:13.133347  

 3970 23:10:13.136398  [CBTSetCACLKResult] CA Dly = 33

 3971 23:10:13.136571  CS Dly: 4 (0~36)

 3972 23:10:13.136681  

 3973 23:10:13.139839  ----->DramcWriteLeveling(PI) begin...

 3974 23:10:13.139923  ==

 3975 23:10:13.143158  Dram Type= 6, Freq= 0, CH_0, rank 0

 3976 23:10:13.146957  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3977 23:10:13.149959  ==

 3978 23:10:13.150035  Write leveling (Byte 0): 32 => 32

 3979 23:10:13.153068  Write leveling (Byte 1): 30 => 30

 3980 23:10:13.156176  DramcWriteLeveling(PI) end<-----

 3981 23:10:13.156257  

 3982 23:10:13.156354  ==

 3983 23:10:13.159572  Dram Type= 6, Freq= 0, CH_0, rank 0

 3984 23:10:13.166688  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 3985 23:10:13.166774  ==

 3986 23:10:13.166839  [Gating] SW mode calibration

 3987 23:10:13.177172  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0

 3988 23:10:13.180174  RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)

 3989 23:10:13.182946   0  9  0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 3990 23:10:13.190002   0  9  4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 3991 23:10:13.193463   0  9  8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 3992 23:10:13.196659   0  9 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 3993 23:10:13.203992   0  9 16 | B1->B0 | 3434 2f2f | 0 0 | (0 1) (1 1)

 3994 23:10:13.206379   0  9 20 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)

 3995 23:10:13.209891   0  9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 3996 23:10:13.216473   0  9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 3997 23:10:13.219753   0 10  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 3998 23:10:13.223111   0 10  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 3999 23:10:13.229875   0 10  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 4000 23:10:13.233085   0 10 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 4001 23:10:13.237037   0 10 16 | B1->B0 | 3131 3c3c | 0 0 | (0 0) (0 0)

 4002 23:10:13.243618   0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4003 23:10:13.246695   0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4004 23:10:13.249617   0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4005 23:10:13.253068   0 11  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4006 23:10:13.260041   0 11  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4007 23:10:13.263303   0 11  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4008 23:10:13.266805   0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4009 23:10:13.273412   0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)

 4010 23:10:13.277311   0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4011 23:10:13.280094   0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4012 23:10:13.287281   0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4013 23:10:13.289692   0 12  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4014 23:10:13.293123   0 12  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4015 23:10:13.299789   0 12  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4016 23:10:13.303436   0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4017 23:10:13.306577   0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4018 23:10:13.313116   0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4019 23:10:13.316983   0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4020 23:10:13.320216   0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4021 23:10:13.326717   0 13  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4022 23:10:13.330216   0 13  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4023 23:10:13.333258   0 13  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4024 23:10:13.340148   0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4025 23:10:13.342953   0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)

 4026 23:10:13.346878  Total UI for P1: 0, mck2ui 16

 4027 23:10:13.350365  best dqsien dly found for B0: ( 0, 13, 14)

 4028 23:10:13.353053   0 13 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4029 23:10:13.356699  Total UI for P1: 0, mck2ui 16

 4030 23:10:13.360133  best dqsien dly found for B1: ( 0, 13, 16)

 4031 23:10:13.363407  best DQS0 dly(MCK, UI, PI) = (0, 13, 14)

 4032 23:10:13.366562  best DQS1 dly(MCK, UI, PI) = (0, 13, 16)

 4033 23:10:13.366636  

 4034 23:10:13.369849  best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 14)

 4035 23:10:13.373167  best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 16)

 4036 23:10:13.376596  [Gating] SW calibration Done

 4037 23:10:13.376693  ==

 4038 23:10:13.380134  Dram Type= 6, Freq= 0, CH_0, rank 0

 4039 23:10:13.386914  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4040 23:10:13.387038  ==

 4041 23:10:13.387130  RX Vref Scan: 0

 4042 23:10:13.387221  

 4043 23:10:13.390198  RX Vref 0 -> 0, step: 1

 4044 23:10:13.390302  

 4045 23:10:13.393440  RX Delay -230 -> 252, step: 16

 4046 23:10:13.396586  iDelay=218, Bit 0, Center 41 (-118 ~ 201) 320

 4047 23:10:13.400458  iDelay=218, Bit 1, Center 41 (-118 ~ 201) 320

 4048 23:10:13.403929  iDelay=218, Bit 2, Center 41 (-118 ~ 201) 320

 4049 23:10:13.410285  iDelay=218, Bit 3, Center 41 (-118 ~ 201) 320

 4050 23:10:13.413188  iDelay=218, Bit 4, Center 41 (-118 ~ 201) 320

 4051 23:10:13.416703  iDelay=218, Bit 5, Center 33 (-134 ~ 201) 336

 4052 23:10:13.420126  iDelay=218, Bit 6, Center 49 (-118 ~ 217) 336

 4053 23:10:13.423215  iDelay=218, Bit 7, Center 49 (-118 ~ 217) 336

 4054 23:10:13.430131  iDelay=218, Bit 8, Center 25 (-134 ~ 185) 320

 4055 23:10:13.433469  iDelay=218, Bit 9, Center 17 (-150 ~ 185) 336

 4056 23:10:13.437387  iDelay=218, Bit 10, Center 33 (-134 ~ 201) 336

 4057 23:10:13.440244  iDelay=218, Bit 11, Center 25 (-134 ~ 185) 320

 4058 23:10:13.446643  iDelay=218, Bit 12, Center 41 (-118 ~ 201) 320

 4059 23:10:13.449704  iDelay=218, Bit 13, Center 41 (-118 ~ 201) 320

 4060 23:10:13.453132  iDelay=218, Bit 14, Center 49 (-118 ~ 217) 336

 4061 23:10:13.456713  iDelay=218, Bit 15, Center 41 (-118 ~ 201) 320

 4062 23:10:13.456806  ==

 4063 23:10:13.460176  Dram Type= 6, Freq= 0, CH_0, rank 0

 4064 23:10:13.466677  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4065 23:10:13.466770  ==

 4066 23:10:13.466843  DQS Delay:

 4067 23:10:13.470082  DQS0 = 0, DQS1 = 0

 4068 23:10:13.470188  DQM Delay:

 4069 23:10:13.470280  DQM0 = 42, DQM1 = 34

 4070 23:10:13.473425  DQ Delay:

 4071 23:10:13.476995  DQ0 =41, DQ1 =41, DQ2 =41, DQ3 =41

 4072 23:10:13.480067  DQ4 =41, DQ5 =33, DQ6 =49, DQ7 =49

 4073 23:10:13.483559  DQ8 =25, DQ9 =17, DQ10 =33, DQ11 =25

 4074 23:10:13.486519  DQ12 =41, DQ13 =41, DQ14 =49, DQ15 =41

 4075 23:10:13.486597  

 4076 23:10:13.486660  

 4077 23:10:13.486731  ==

 4078 23:10:13.489808  Dram Type= 6, Freq= 0, CH_0, rank 0

 4079 23:10:13.493090  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4080 23:10:13.493198  ==

 4081 23:10:13.493289  

 4082 23:10:13.493376  

 4083 23:10:13.496430  	TX Vref Scan disable

 4084 23:10:13.500023   == TX Byte 0 ==

 4085 23:10:13.503137  Update DQ  dly =578 (2 ,1, 34)  DQ  OEN =(1 ,6)

 4086 23:10:13.506191  Update DQM dly =578 (2 ,1, 34)  DQM OEN =(1 ,6)

 4087 23:10:13.509605   == TX Byte 1 ==

 4088 23:10:13.513123  Update DQ  dly =575 (2 ,1, 31)  DQ  OEN =(1 ,6)

 4089 23:10:13.516505  Update DQM dly =575 (2 ,1, 31)  DQM OEN =(1 ,6)

 4090 23:10:13.516608  ==

 4091 23:10:13.519942  Dram Type= 6, Freq= 0, CH_0, rank 0

 4092 23:10:13.523375  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4093 23:10:13.523455  ==

 4094 23:10:13.523519  

 4095 23:10:13.526766  

 4096 23:10:13.526841  	TX Vref Scan disable

 4097 23:10:13.530110   == TX Byte 0 ==

 4098 23:10:13.533489  Update DQ  dly =578 (2 ,1, 34)  DQ  OEN =(1 ,6)

 4099 23:10:13.537202  Update DQM dly =578 (2 ,1, 34)  DQM OEN =(1 ,6)

 4100 23:10:13.539895   == TX Byte 1 ==

 4101 23:10:13.543829  Update DQ  dly =575 (2 ,1, 31)  DQ  OEN =(1 ,6)

 4102 23:10:13.546688  Update DQM dly =575 (2 ,1, 31)  DQM OEN =(1 ,6)

 4103 23:10:13.550197  

 4104 23:10:13.550271  [DATLAT]

 4105 23:10:13.550377  Freq=600, CH0 RK0

 4106 23:10:13.550491  

 4107 23:10:13.553294  DATLAT Default: 0x9

 4108 23:10:13.553400  0, 0xFFFF, sum = 0

 4109 23:10:13.557140  1, 0xFFFF, sum = 0

 4110 23:10:13.557215  2, 0xFFFF, sum = 0

 4111 23:10:13.560332  3, 0xFFFF, sum = 0

 4112 23:10:13.560414  4, 0xFFFF, sum = 0

 4113 23:10:13.563511  5, 0xFFFF, sum = 0

 4114 23:10:13.563592  6, 0xFFFF, sum = 0

 4115 23:10:13.567179  7, 0xFFFF, sum = 0

 4116 23:10:13.567261  8, 0x0, sum = 1

 4117 23:10:13.570122  9, 0x0, sum = 2

 4118 23:10:13.570231  10, 0x0, sum = 3

 4119 23:10:13.573301  11, 0x0, sum = 4

 4120 23:10:13.573410  best_step = 9

 4121 23:10:13.573501  

 4122 23:10:13.573588  ==

 4123 23:10:13.577249  Dram Type= 6, Freq= 0, CH_0, rank 0

 4124 23:10:13.583766  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4125 23:10:13.583874  ==

 4126 23:10:13.583980  RX Vref Scan: 1

 4127 23:10:13.584071  

 4128 23:10:13.587114  RX Vref 0 -> 0, step: 1

 4129 23:10:13.587220  

 4130 23:10:13.590814  RX Delay -195 -> 252, step: 8

 4131 23:10:13.590890  

 4132 23:10:13.593479  Set Vref, RX VrefLevel [Byte0]: 55

 4133 23:10:13.597037                           [Byte1]: 51

 4134 23:10:13.597127  

 4135 23:10:13.600234  Final RX Vref Byte 0 = 55 to rank0

 4136 23:10:13.603435  Final RX Vref Byte 1 = 51 to rank0

 4137 23:10:13.607277  Final RX Vref Byte 0 = 55 to rank1

 4138 23:10:13.610283  Final RX Vref Byte 1 = 51 to rank1==

 4139 23:10:13.613693  Dram Type= 6, Freq= 0, CH_0, rank 0

 4140 23:10:13.617451  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4141 23:10:13.617531  ==

 4142 23:10:13.620438  DQS Delay:

 4143 23:10:13.620512  DQS0 = 0, DQS1 = 0

 4144 23:10:13.620574  DQM Delay:

 4145 23:10:13.623689  DQM0 = 42, DQM1 = 33

 4146 23:10:13.623761  DQ Delay:

 4147 23:10:13.626862  DQ0 =44, DQ1 =40, DQ2 =40, DQ3 =40

 4148 23:10:13.630077  DQ4 =44, DQ5 =32, DQ6 =48, DQ7 =48

 4149 23:10:13.633574  DQ8 =20, DQ9 =20, DQ10 =36, DQ11 =28

 4150 23:10:13.636704  DQ12 =40, DQ13 =36, DQ14 =44, DQ15 =44

 4151 23:10:13.636780  

 4152 23:10:13.636842  

 4153 23:10:13.647413  [DQSOSCAuto] RK0, (LSB)MR18= 0x4524, (MSB)MR19= 0x808, tDQSOscB0 = 403 ps tDQSOscB1 = 396 ps

 4154 23:10:13.647497  CH0 RK0: MR19=808, MR18=4524

 4155 23:10:13.653701  CH0_RK0: MR19=0x808, MR18=0x4524, DQSOSC=396, MR23=63, INC=167, DEC=111

 4156 23:10:13.653787  

 4157 23:10:13.657019  ----->DramcWriteLeveling(PI) begin...

 4158 23:10:13.657102  ==

 4159 23:10:13.660784  Dram Type= 6, Freq= 0, CH_0, rank 1

 4160 23:10:13.667206  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4161 23:10:13.667301  ==

 4162 23:10:13.670594  Write leveling (Byte 0): 32 => 32

 4163 23:10:13.673914  Write leveling (Byte 1): 29 => 29

 4164 23:10:13.673995  DramcWriteLeveling(PI) end<-----

 4165 23:10:13.674061  

 4166 23:10:13.677164  ==

 4167 23:10:13.680199  Dram Type= 6, Freq= 0, CH_0, rank 1

 4168 23:10:13.683713  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4169 23:10:13.683795  ==

 4170 23:10:13.687676  [Gating] SW mode calibration

 4171 23:10:13.693766  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0

 4172 23:10:13.697157  RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)

 4173 23:10:13.703423   0  9  0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 4174 23:10:13.707303   0  9  4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 4175 23:10:13.710535   0  9  8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 4176 23:10:13.717204   0  9 12 | B1->B0 | 3434 2f2f | 1 0 | (1 1) (1 0)

 4177 23:10:13.720501   0  9 16 | B1->B0 | 2e2e 2424 | 1 0 | (1 0) (0 0)

 4178 23:10:13.723758   0  9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 4179 23:10:13.730426   0  9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 4180 23:10:13.733761   0  9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 4181 23:10:13.736927   0 10  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 4182 23:10:13.740443   0 10  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 4183 23:10:13.747574   0 10  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 4184 23:10:13.750449   0 10 12 | B1->B0 | 2323 3636 | 0 0 | (0 0) (0 0)

 4185 23:10:13.753531   0 10 16 | B1->B0 | 3939 4646 | 0 0 | (0 0) (0 0)

 4186 23:10:13.760497   0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4187 23:10:13.763449   0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4188 23:10:13.767184   0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4189 23:10:13.773642   0 11  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4190 23:10:13.777038   0 11  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4191 23:10:13.780732   0 11  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4192 23:10:13.787096   0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4193 23:10:13.790166   0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)

 4194 23:10:13.793690   0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4195 23:10:13.800427   0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4196 23:10:13.803722   0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4197 23:10:13.807419   0 12  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4198 23:10:13.813860   0 12  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4199 23:10:13.817292   0 12  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4200 23:10:13.820539   0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4201 23:10:13.827156   0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4202 23:10:13.830457   0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4203 23:10:13.833555   0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4204 23:10:13.836988   0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4205 23:10:13.843909   0 13  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4206 23:10:13.847473   0 13  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4207 23:10:13.851105   0 13  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

 4208 23:10:13.857378   0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

 4209 23:10:13.860183   0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4210 23:10:13.863674  Total UI for P1: 0, mck2ui 16

 4211 23:10:13.867461  best dqsien dly found for B0: ( 0, 13, 10)

 4212 23:10:13.870430  Total UI for P1: 0, mck2ui 16

 4213 23:10:13.873779  best dqsien dly found for B1: ( 0, 13, 14)

 4214 23:10:13.876882  best DQS0 dly(MCK, UI, PI) = (0, 13, 10)

 4215 23:10:13.880282  best DQS1 dly(MCK, UI, PI) = (0, 13, 14)

 4216 23:10:13.880395  

 4217 23:10:13.883701  best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 10)

 4218 23:10:13.886861  best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 14)

 4219 23:10:13.890336  [Gating] SW calibration Done

 4220 23:10:13.890477  ==

 4221 23:10:13.893988  Dram Type= 6, Freq= 0, CH_0, rank 1

 4222 23:10:13.900482  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4223 23:10:13.900565  ==

 4224 23:10:13.900630  RX Vref Scan: 0

 4225 23:10:13.900691  

 4226 23:10:13.903803  RX Vref 0 -> 0, step: 1

 4227 23:10:13.903885  

 4228 23:10:13.907422  RX Delay -230 -> 252, step: 16

 4229 23:10:13.910579  iDelay=218, Bit 0, Center 41 (-118 ~ 201) 320

 4230 23:10:13.913668  iDelay=218, Bit 1, Center 41 (-118 ~ 201) 320

 4231 23:10:13.916617  iDelay=218, Bit 2, Center 33 (-134 ~ 201) 336

 4232 23:10:13.923826  iDelay=218, Bit 3, Center 33 (-134 ~ 201) 336

 4233 23:10:13.926589  iDelay=218, Bit 4, Center 41 (-118 ~ 201) 320

 4234 23:10:13.930475  iDelay=218, Bit 5, Center 25 (-134 ~ 185) 320

 4235 23:10:13.934081  iDelay=218, Bit 6, Center 49 (-118 ~ 217) 336

 4236 23:10:13.936903  iDelay=218, Bit 7, Center 49 (-118 ~ 217) 336

 4237 23:10:13.943774  iDelay=218, Bit 8, Center 17 (-150 ~ 185) 336

 4238 23:10:13.946959  iDelay=218, Bit 9, Center 17 (-150 ~ 185) 336

 4239 23:10:13.950097  iDelay=218, Bit 10, Center 33 (-134 ~ 201) 336

 4240 23:10:13.953191  iDelay=218, Bit 11, Center 25 (-134 ~ 185) 320

 4241 23:10:13.960748  iDelay=218, Bit 12, Center 33 (-134 ~ 201) 336

 4242 23:10:13.963224  iDelay=218, Bit 13, Center 41 (-118 ~ 201) 320

 4243 23:10:13.966702  iDelay=218, Bit 14, Center 41 (-118 ~ 201) 320

 4244 23:10:13.970109  iDelay=218, Bit 15, Center 41 (-118 ~ 201) 320

 4245 23:10:13.970192  ==

 4246 23:10:13.973578  Dram Type= 6, Freq= 0, CH_0, rank 1

 4247 23:10:13.980338  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4248 23:10:13.980421  ==

 4249 23:10:13.980486  DQS Delay:

 4250 23:10:13.983393  DQS0 = 0, DQS1 = 0

 4251 23:10:13.983475  DQM Delay:

 4252 23:10:13.986389  DQM0 = 39, DQM1 = 31

 4253 23:10:13.986509  DQ Delay:

 4254 23:10:13.990180  DQ0 =41, DQ1 =41, DQ2 =33, DQ3 =33

 4255 23:10:13.993567  DQ4 =41, DQ5 =25, DQ6 =49, DQ7 =49

 4256 23:10:13.996639  DQ8 =17, DQ9 =17, DQ10 =33, DQ11 =25

 4257 23:10:13.999990  DQ12 =33, DQ13 =41, DQ14 =41, DQ15 =41

 4258 23:10:14.000072  

 4259 23:10:14.000137  

 4260 23:10:14.000198  ==

 4261 23:10:14.003467  Dram Type= 6, Freq= 0, CH_0, rank 1

 4262 23:10:14.006559  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4263 23:10:14.006641  ==

 4264 23:10:14.006707  

 4265 23:10:14.006768  

 4266 23:10:14.010612  	TX Vref Scan disable

 4267 23:10:14.013803   == TX Byte 0 ==

 4268 23:10:14.016762  Update DQ  dly =578 (2 ,1, 34)  DQ  OEN =(1 ,6)

 4269 23:10:14.020152  Update DQM dly =578 (2 ,1, 34)  DQM OEN =(1 ,6)

 4270 23:10:14.023190   == TX Byte 1 ==

 4271 23:10:14.026462  Update DQ  dly =574 (2 ,1, 30)  DQ  OEN =(1 ,6)

 4272 23:10:14.029653  Update DQM dly =574 (2 ,1, 30)  DQM OEN =(1 ,6)

 4273 23:10:14.029736  ==

 4274 23:10:14.033550  Dram Type= 6, Freq= 0, CH_0, rank 1

 4275 23:10:14.037128  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4276 23:10:14.040066  ==

 4277 23:10:14.040148  

 4278 23:10:14.040213  

 4279 23:10:14.040274  	TX Vref Scan disable

 4280 23:10:14.043784   == TX Byte 0 ==

 4281 23:10:14.047028  Update DQ  dly =578 (2 ,1, 34)  DQ  OEN =(1 ,6)

 4282 23:10:14.050358  Update DQM dly =578 (2 ,1, 34)  DQM OEN =(1 ,6)

 4283 23:10:14.054599   == TX Byte 1 ==

 4284 23:10:14.057077  Update DQ  dly =573 (2 ,1, 29)  DQ  OEN =(1 ,6)

 4285 23:10:14.060212  Update DQM dly =573 (2 ,1, 29)  DQM OEN =(1 ,6)

 4286 23:10:14.063968  

 4287 23:10:14.064050  [DATLAT]

 4288 23:10:14.064116  Freq=600, CH0 RK1

 4289 23:10:14.064177  

 4290 23:10:14.067067  DATLAT Default: 0x9

 4291 23:10:14.067149  0, 0xFFFF, sum = 0

 4292 23:10:14.070631  1, 0xFFFF, sum = 0

 4293 23:10:14.070715  2, 0xFFFF, sum = 0

 4294 23:10:14.073836  3, 0xFFFF, sum = 0

 4295 23:10:14.073918  4, 0xFFFF, sum = 0

 4296 23:10:14.077059  5, 0xFFFF, sum = 0

 4297 23:10:14.077141  6, 0xFFFF, sum = 0

 4298 23:10:14.080250  7, 0xFFFF, sum = 0

 4299 23:10:14.080332  8, 0x0, sum = 1

 4300 23:10:14.083944  9, 0x0, sum = 2

 4301 23:10:14.084036  10, 0x0, sum = 3

 4302 23:10:14.087306  11, 0x0, sum = 4

 4303 23:10:14.087389  best_step = 9

 4304 23:10:14.087454  

 4305 23:10:14.087514  ==

 4306 23:10:14.090414  Dram Type= 6, Freq= 0, CH_0, rank 1

 4307 23:10:14.097816  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4308 23:10:14.097898  ==

 4309 23:10:14.097962  RX Vref Scan: 0

 4310 23:10:14.098022  

 4311 23:10:14.100886  RX Vref 0 -> 0, step: 1

 4312 23:10:14.100967  

 4313 23:10:14.103979  RX Delay -195 -> 252, step: 8

 4314 23:10:14.107051  iDelay=205, Bit 0, Center 40 (-115 ~ 196) 312

 4315 23:10:14.113982  iDelay=205, Bit 1, Center 40 (-115 ~ 196) 312

 4316 23:10:14.117503  iDelay=205, Bit 2, Center 36 (-115 ~ 188) 304

 4317 23:10:14.120755  iDelay=205, Bit 3, Center 40 (-115 ~ 196) 312

 4318 23:10:14.123939  iDelay=205, Bit 4, Center 36 (-115 ~ 188) 304

 4319 23:10:14.127224  iDelay=205, Bit 5, Center 28 (-123 ~ 180) 304

 4320 23:10:14.134243  iDelay=205, Bit 6, Center 48 (-107 ~ 204) 312

 4321 23:10:14.137371  iDelay=205, Bit 7, Center 48 (-107 ~ 204) 312

 4322 23:10:14.140436  iDelay=205, Bit 8, Center 20 (-139 ~ 180) 320

 4323 23:10:14.144271  iDelay=205, Bit 9, Center 24 (-131 ~ 180) 312

 4324 23:10:14.147729  iDelay=205, Bit 10, Center 32 (-123 ~ 188) 312

 4325 23:10:14.154309  iDelay=205, Bit 11, Center 20 (-131 ~ 172) 304

 4326 23:10:14.157563  iDelay=205, Bit 12, Center 36 (-123 ~ 196) 320

 4327 23:10:14.160556  iDelay=205, Bit 13, Center 40 (-115 ~ 196) 312

 4328 23:10:14.164199  iDelay=205, Bit 14, Center 44 (-107 ~ 196) 304

 4329 23:10:14.170970  iDelay=205, Bit 15, Center 40 (-115 ~ 196) 312

 4330 23:10:14.171056  ==

 4331 23:10:14.174009  Dram Type= 6, Freq= 0, CH_0, rank 1

 4332 23:10:14.177381  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4333 23:10:14.177465  ==

 4334 23:10:14.177529  DQS Delay:

 4335 23:10:14.181077  DQS0 = 0, DQS1 = 0

 4336 23:10:14.181158  DQM Delay:

 4337 23:10:14.184112  DQM0 = 39, DQM1 = 32

 4338 23:10:14.184192  DQ Delay:

 4339 23:10:14.187100  DQ0 =40, DQ1 =40, DQ2 =36, DQ3 =40

 4340 23:10:14.190681  DQ4 =36, DQ5 =28, DQ6 =48, DQ7 =48

 4341 23:10:14.194301  DQ8 =20, DQ9 =24, DQ10 =32, DQ11 =20

 4342 23:10:14.197489  DQ12 =36, DQ13 =40, DQ14 =44, DQ15 =40

 4343 23:10:14.197573  

 4344 23:10:14.197637  

 4345 23:10:14.204560  [DQSOSCAuto] RK1, (LSB)MR18= 0x492b, (MSB)MR19= 0x808, tDQSOscB0 = 401 ps tDQSOscB1 = 396 ps

 4346 23:10:14.207218  CH0 RK1: MR19=808, MR18=492B

 4347 23:10:14.214059  CH0_RK1: MR19=0x808, MR18=0x492B, DQSOSC=396, MR23=63, INC=167, DEC=111

 4348 23:10:14.217535  [RxdqsGatingPostProcess] freq 600

 4349 23:10:14.223819  ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1

 4350 23:10:14.227899  Pre-setting of DQS Precalculation

 4351 23:10:14.230605  [DualRankRxdatlatCal] RK0: 9, RK1: 9, Final_Datlat 9

 4352 23:10:14.230686  ==

 4353 23:10:14.233967  Dram Type= 6, Freq= 0, CH_1, rank 0

 4354 23:10:14.237748  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4355 23:10:14.237855  ==

 4356 23:10:14.244533  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 4357 23:10:14.250952  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35

 4358 23:10:14.254941  [CA 0] Center 35 (5~66) winsize 62

 4359 23:10:14.257368  [CA 1] Center 35 (5~66) winsize 62

 4360 23:10:14.261050  [CA 2] Center 33 (3~64) winsize 62

 4361 23:10:14.264388  [CA 3] Center 33 (3~64) winsize 62

 4362 23:10:14.267444  [CA 4] Center 34 (3~65) winsize 63

 4363 23:10:14.270779  [CA 5] Center 33 (2~64) winsize 63

 4364 23:10:14.270860  

 4365 23:10:14.274420  [CmdBusTrainingLP45] Vref(ca) range 1: 35

 4366 23:10:14.274517  

 4367 23:10:14.277532  [CATrainingPosCal] consider 1 rank data

 4368 23:10:14.281261  u2DelayCellTimex100 = 270/100 ps

 4369 23:10:14.284109  CA0 delay=35 (5~66),Diff = 2 PI (19 cell)

 4370 23:10:14.287634  CA1 delay=35 (5~66),Diff = 2 PI (19 cell)

 4371 23:10:14.291272  CA2 delay=33 (3~64),Diff = 0 PI (0 cell)

 4372 23:10:14.294223  CA3 delay=33 (3~64),Diff = 0 PI (0 cell)

 4373 23:10:14.297585  CA4 delay=34 (3~65),Diff = 1 PI (9 cell)

 4374 23:10:14.300876  CA5 delay=33 (2~64),Diff = 0 PI (0 cell)

 4375 23:10:14.300958  

 4376 23:10:14.307432  CA PerBit enable=1, Macro0, CA PI delay=33

 4377 23:10:14.307522  

 4378 23:10:14.307586  [CBTSetCACLKResult] CA Dly = 33

 4379 23:10:14.310946  CS Dly: 4 (0~35)

 4380 23:10:14.311027  ==

 4381 23:10:14.314106  Dram Type= 6, Freq= 0, CH_1, rank 1

 4382 23:10:14.318170  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4383 23:10:14.318283  ==

 4384 23:10:14.324208  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 4385 23:10:14.331038  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=33, u1VrefScanEnd=33

 4386 23:10:14.334317  [CA 0] Center 35 (5~66) winsize 62

 4387 23:10:14.338191  [CA 1] Center 35 (5~66) winsize 62

 4388 23:10:14.341125  [CA 2] Center 34 (3~65) winsize 63

 4389 23:10:14.344583  [CA 3] Center 34 (3~65) winsize 63

 4390 23:10:14.347665  [CA 4] Center 34 (3~65) winsize 63

 4391 23:10:14.351273  [CA 5] Center 33 (3~64) winsize 62

 4392 23:10:14.351355  

 4393 23:10:14.354664  [CmdBusTrainingLP45] Vref(ca) range 1: 33

 4394 23:10:14.354793  

 4395 23:10:14.357547  [CATrainingPosCal] consider 2 rank data

 4396 23:10:14.361699  u2DelayCellTimex100 = 270/100 ps

 4397 23:10:14.364623  CA0 delay=35 (5~66),Diff = 2 PI (19 cell)

 4398 23:10:14.367981  CA1 delay=35 (5~66),Diff = 2 PI (19 cell)

 4399 23:10:14.371345  CA2 delay=33 (3~64),Diff = 0 PI (0 cell)

 4400 23:10:14.374319  CA3 delay=33 (3~64),Diff = 0 PI (0 cell)

 4401 23:10:14.377928  CA4 delay=34 (3~65),Diff = 1 PI (9 cell)

 4402 23:10:14.381298  CA5 delay=33 (3~64),Diff = 0 PI (0 cell)

 4403 23:10:14.381381  

 4404 23:10:14.384272  CA PerBit enable=1, Macro0, CA PI delay=33

 4405 23:10:14.388403  

 4406 23:10:14.388485  [CBTSetCACLKResult] CA Dly = 33

 4407 23:10:14.391876  CS Dly: 4 (0~36)

 4408 23:10:14.391963  

 4409 23:10:14.394317  ----->DramcWriteLeveling(PI) begin...

 4410 23:10:14.394445  ==

 4411 23:10:14.398007  Dram Type= 6, Freq= 0, CH_1, rank 0

 4412 23:10:14.401123  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4413 23:10:14.401209  ==

 4414 23:10:14.404522  Write leveling (Byte 0): 30 => 30

 4415 23:10:14.408275  Write leveling (Byte 1): 30 => 30

 4416 23:10:14.411632  DramcWriteLeveling(PI) end<-----

 4417 23:10:14.411730  

 4418 23:10:14.411827  ==

 4419 23:10:14.414294  Dram Type= 6, Freq= 0, CH_1, rank 0

 4420 23:10:14.417704  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4421 23:10:14.417787  ==

 4422 23:10:14.421230  [Gating] SW mode calibration

 4423 23:10:14.427864  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0

 4424 23:10:14.434202  RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)

 4425 23:10:14.438032   0  9  0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 4426 23:10:14.444236   0  9  4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 4427 23:10:14.447930   0  9  8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 4428 23:10:14.451299   0  9 12 | B1->B0 | 3434 3333 | 1 0 | (0 0) (0 0)

 4429 23:10:14.457495   0  9 16 | B1->B0 | 2929 2a2a | 0 0 | (1 1) (0 0)

 4430 23:10:14.461510   0  9 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 4431 23:10:14.464438   0  9 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 4432 23:10:14.467602   0  9 28 | B1->B0 | 2423 2323 | 1 0 | (0 0) (0 0)

 4433 23:10:14.474567   0 10  0 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)

 4434 23:10:14.478197   0 10  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 4435 23:10:14.481143   0 10  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 4436 23:10:14.488259   0 10 12 | B1->B0 | 2727 2828 | 0 0 | (0 0) (0 0)

 4437 23:10:14.491098   0 10 16 | B1->B0 | 3e3e 4444 | 0 0 | (0 0) (0 0)

 4438 23:10:14.494523   0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4439 23:10:14.501265   0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4440 23:10:14.504664   0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4441 23:10:14.507941   0 11  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4442 23:10:14.514670   0 11  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4443 23:10:14.517762   0 11  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4444 23:10:14.521303   0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4445 23:10:14.527656   0 11 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)

 4446 23:10:14.531153   0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4447 23:10:14.534708   0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4448 23:10:14.541063   0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4449 23:10:14.544636   0 12  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4450 23:10:14.547929   0 12  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4451 23:10:14.551427   0 12  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4452 23:10:14.558132   0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4453 23:10:14.561662   0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4454 23:10:14.564579   0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4455 23:10:14.571396   0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4456 23:10:14.574335   0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4457 23:10:14.578004   0 13  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4458 23:10:14.585175   0 13  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4459 23:10:14.588048   0 13  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4460 23:10:14.591693   0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4461 23:10:14.597819   0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 0)

 4462 23:10:14.597913  Total UI for P1: 0, mck2ui 16

 4463 23:10:14.605551  best dqsien dly found for B0: ( 0, 13, 14)

 4464 23:10:14.608134   0 13 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4465 23:10:14.611105  Total UI for P1: 0, mck2ui 16

 4466 23:10:14.614638  best dqsien dly found for B1: ( 0, 13, 18)

 4467 23:10:14.618163  best DQS0 dly(MCK, UI, PI) = (0, 13, 14)

 4468 23:10:14.621210  best DQS1 dly(MCK, UI, PI) = (0, 13, 18)

 4469 23:10:14.621310  

 4470 23:10:14.624524  best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 14)

 4471 23:10:14.628364  best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 18)

 4472 23:10:14.631203  [Gating] SW calibration Done

 4473 23:10:14.631311  ==

 4474 23:10:14.634666  Dram Type= 6, Freq= 0, CH_1, rank 0

 4475 23:10:14.637583  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4476 23:10:14.641518  ==

 4477 23:10:14.641627  RX Vref Scan: 0

 4478 23:10:14.641719  

 4479 23:10:14.644586  RX Vref 0 -> 0, step: 1

 4480 23:10:14.644688  

 4481 23:10:14.647764  RX Delay -230 -> 252, step: 16

 4482 23:10:14.651456  iDelay=218, Bit 0, Center 41 (-118 ~ 201) 320

 4483 23:10:14.654270  iDelay=218, Bit 1, Center 41 (-118 ~ 201) 320

 4484 23:10:14.657641  iDelay=218, Bit 2, Center 25 (-134 ~ 185) 320

 4485 23:10:14.661028  iDelay=218, Bit 3, Center 41 (-118 ~ 201) 320

 4486 23:10:14.667962  iDelay=218, Bit 4, Center 41 (-118 ~ 201) 320

 4487 23:10:14.671260  iDelay=218, Bit 5, Center 49 (-118 ~ 217) 336

 4488 23:10:14.674514  iDelay=218, Bit 6, Center 57 (-102 ~ 217) 320

 4489 23:10:14.677868  iDelay=218, Bit 7, Center 33 (-134 ~ 201) 336

 4490 23:10:14.684431  iDelay=218, Bit 8, Center 17 (-150 ~ 185) 336

 4491 23:10:14.688170  iDelay=218, Bit 9, Center 25 (-134 ~ 185) 320

 4492 23:10:14.690870  iDelay=218, Bit 10, Center 33 (-134 ~ 201) 336

 4493 23:10:14.694526  iDelay=218, Bit 11, Center 33 (-134 ~ 201) 336

 4494 23:10:14.700866  iDelay=218, Bit 12, Center 49 (-118 ~ 217) 336

 4495 23:10:14.704614  iDelay=218, Bit 13, Center 41 (-118 ~ 201) 320

 4496 23:10:14.707731  iDelay=218, Bit 14, Center 41 (-118 ~ 201) 320

 4497 23:10:14.711121  iDelay=218, Bit 15, Center 41 (-118 ~ 201) 320

 4498 23:10:14.711195  ==

 4499 23:10:14.714808  Dram Type= 6, Freq= 0, CH_1, rank 0

 4500 23:10:14.719068  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4501 23:10:14.721006  ==

 4502 23:10:14.721087  DQS Delay:

 4503 23:10:14.721205  DQS0 = 0, DQS1 = 0

 4504 23:10:14.724590  DQM Delay:

 4505 23:10:14.724672  DQM0 = 41, DQM1 = 35

 4506 23:10:14.728151  DQ Delay:

 4507 23:10:14.731231  DQ0 =41, DQ1 =41, DQ2 =25, DQ3 =41

 4508 23:10:14.731312  DQ4 =41, DQ5 =49, DQ6 =57, DQ7 =33

 4509 23:10:14.734267  DQ8 =17, DQ9 =25, DQ10 =33, DQ11 =33

 4510 23:10:14.738041  DQ12 =49, DQ13 =41, DQ14 =41, DQ15 =41

 4511 23:10:14.741055  

 4512 23:10:14.741136  

 4513 23:10:14.741239  ==

 4514 23:10:14.744790  Dram Type= 6, Freq= 0, CH_1, rank 0

 4515 23:10:14.747491  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4516 23:10:14.747573  ==

 4517 23:10:14.747638  

 4518 23:10:14.747749  

 4519 23:10:14.751684  	TX Vref Scan disable

 4520 23:10:14.751811   == TX Byte 0 ==

 4521 23:10:14.758035  Update DQ  dly =575 (2 ,1, 31)  DQ  OEN =(1 ,6)

 4522 23:10:14.761057  Update DQM dly =575 (2 ,1, 31)  DQM OEN =(1 ,6)

 4523 23:10:14.761140   == TX Byte 1 ==

 4524 23:10:14.768066  Update DQ  dly =575 (2 ,1, 31)  DQ  OEN =(1 ,6)

 4525 23:10:14.771106  Update DQM dly =575 (2 ,1, 31)  DQM OEN =(1 ,6)

 4526 23:10:14.771209  ==

 4527 23:10:14.774791  Dram Type= 6, Freq= 0, CH_1, rank 0

 4528 23:10:14.778017  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4529 23:10:14.778122  ==

 4530 23:10:14.778212  

 4531 23:10:14.778306  

 4532 23:10:14.781181  	TX Vref Scan disable

 4533 23:10:14.784914   == TX Byte 0 ==

 4534 23:10:14.787714  Update DQ  dly =575 (2 ,1, 31)  DQ  OEN =(1 ,6)

 4535 23:10:14.791524  Update DQM dly =575 (2 ,1, 31)  DQM OEN =(1 ,6)

 4536 23:10:14.794451   == TX Byte 1 ==

 4537 23:10:14.798029  Update DQ  dly =575 (2 ,1, 31)  DQ  OEN =(1 ,6)

 4538 23:10:14.801095  Update DQM dly =575 (2 ,1, 31)  DQM OEN =(1 ,6)

 4539 23:10:14.801203  

 4540 23:10:14.804177  [DATLAT]

 4541 23:10:14.804290  Freq=600, CH1 RK0

 4542 23:10:14.804380  

 4543 23:10:14.807822  DATLAT Default: 0x9

 4544 23:10:14.807897  0, 0xFFFF, sum = 0

 4545 23:10:14.811640  1, 0xFFFF, sum = 0

 4546 23:10:14.811716  2, 0xFFFF, sum = 0

 4547 23:10:14.814572  3, 0xFFFF, sum = 0

 4548 23:10:14.814669  4, 0xFFFF, sum = 0

 4549 23:10:14.817521  5, 0xFFFF, sum = 0

 4550 23:10:14.817597  6, 0xFFFF, sum = 0

 4551 23:10:14.821099  7, 0xFFFF, sum = 0

 4552 23:10:14.821201  8, 0x0, sum = 1

 4553 23:10:14.825482  9, 0x0, sum = 2

 4554 23:10:14.825562  10, 0x0, sum = 3

 4555 23:10:14.827847  11, 0x0, sum = 4

 4556 23:10:14.827924  best_step = 9

 4557 23:10:14.827986  

 4558 23:10:14.828111  ==

 4559 23:10:14.831559  Dram Type= 6, Freq= 0, CH_1, rank 0

 4560 23:10:14.834640  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4561 23:10:14.837648  ==

 4562 23:10:14.837731  RX Vref Scan: 1

 4563 23:10:14.837798  

 4564 23:10:14.840977  RX Vref 0 -> 0, step: 1

 4565 23:10:14.841078  

 4566 23:10:14.844361  RX Delay -195 -> 252, step: 8

 4567 23:10:14.844448  

 4568 23:10:14.848365  Set Vref, RX VrefLevel [Byte0]: 62

 4569 23:10:14.851490                           [Byte1]: 53

 4570 23:10:14.851560  

 4571 23:10:14.854248  Final RX Vref Byte 0 = 62 to rank0

 4572 23:10:14.857735  Final RX Vref Byte 1 = 53 to rank0

 4573 23:10:14.860808  Final RX Vref Byte 0 = 62 to rank1

 4574 23:10:14.864668  Final RX Vref Byte 1 = 53 to rank1==

 4575 23:10:14.867991  Dram Type= 6, Freq= 0, CH_1, rank 0

 4576 23:10:14.871840  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4577 23:10:14.871922  ==

 4578 23:10:14.871987  DQS Delay:

 4579 23:10:14.874290  DQS0 = 0, DQS1 = 0

 4580 23:10:14.874372  DQM Delay:

 4581 23:10:14.877847  DQM0 = 40, DQM1 = 32

 4582 23:10:14.877928  DQ Delay:

 4583 23:10:14.881206  DQ0 =44, DQ1 =36, DQ2 =28, DQ3 =40

 4584 23:10:14.884550  DQ4 =36, DQ5 =48, DQ6 =52, DQ7 =36

 4585 23:10:14.887810  DQ8 =20, DQ9 =20, DQ10 =36, DQ11 =24

 4586 23:10:14.890869  DQ12 =40, DQ13 =40, DQ14 =40, DQ15 =40

 4587 23:10:14.890952  

 4588 23:10:14.891017  

 4589 23:10:14.901309  [DQSOSCAuto] RK0, (LSB)MR18= 0x3e04, (MSB)MR19= 0x808, tDQSOscB0 = 409 ps tDQSOscB1 = 398 ps

 4590 23:10:14.901392  CH1 RK0: MR19=808, MR18=3E04

 4591 23:10:14.907807  CH1_RK0: MR19=0x808, MR18=0x3E04, DQSOSC=398, MR23=63, INC=165, DEC=110

 4592 23:10:14.907891  

 4593 23:10:14.911590  ----->DramcWriteLeveling(PI) begin...

 4594 23:10:14.911695  ==

 4595 23:10:14.914297  Dram Type= 6, Freq= 0, CH_1, rank 1

 4596 23:10:14.920953  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4597 23:10:14.921059  ==

 4598 23:10:14.924617  Write leveling (Byte 0): 30 => 30

 4599 23:10:14.924706  Write leveling (Byte 1): 29 => 29

 4600 23:10:14.928098  DramcWriteLeveling(PI) end<-----

 4601 23:10:14.928171  

 4602 23:10:14.928232  ==

 4603 23:10:14.931876  Dram Type= 6, Freq= 0, CH_1, rank 1

 4604 23:10:14.937932  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4605 23:10:14.938049  ==

 4606 23:10:14.940944  [Gating] SW mode calibration

 4607 23:10:14.947903  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 0

 4608 23:10:14.951292  RX_Path_delay_UI(25) -3 - DQSINCTL_UI(16) = u1StartUI(9)

 4609 23:10:14.958200   0  9  0 | B1->B0 | 3535 3434 | 1 1 | (0 0) (1 1)

 4610 23:10:14.961051   0  9  4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 4611 23:10:14.964552   0  9  8 | B1->B0 | 3535 3434 | 1 1 | (0 0) (1 1)

 4612 23:10:14.968107   0  9 12 | B1->B0 | 3030 2a2a | 0 0 | (0 0) (1 1)

 4613 23:10:14.974775   0  9 16 | B1->B0 | 2525 2323 | 0 0 | (0 0) (0 0)

 4614 23:10:14.977802   0  9 20 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)

 4615 23:10:14.981628   0  9 24 | B1->B0 | 2424 2323 | 0 0 | (0 0) (0 0)

 4616 23:10:14.988051   0  9 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 4617 23:10:14.991188   0 10  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 4618 23:10:14.994933   0 10  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 4619 23:10:15.001789   0 10  8 | B1->B0 | 2424 2525 | 0 0 | (0 0) (1 1)

 4620 23:10:15.004847   0 10 12 | B1->B0 | 3333 3d3d | 0 0 | (0 0) (0 0)

 4621 23:10:15.007888   0 10 16 | B1->B0 | 4444 4646 | 0 0 | (0 0) (0 0)

 4622 23:10:15.014733   0 10 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4623 23:10:15.017810   0 10 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4624 23:10:15.021028   0 10 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4625 23:10:15.028079   0 11  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4626 23:10:15.032446   0 11  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4627 23:10:15.035165   0 11  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4628 23:10:15.041676   0 11 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 4629 23:10:15.045014   0 11 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4630 23:10:15.048408   0 11 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4631 23:10:15.051709   0 11 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4632 23:10:15.057998   0 11 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4633 23:10:15.061527   0 12  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4634 23:10:15.065335   0 12  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4635 23:10:15.071519   0 12  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4636 23:10:15.074877   0 12 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4637 23:10:15.078121   0 12 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4638 23:10:15.084882   0 12 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4639 23:10:15.087976   0 12 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4640 23:10:15.091218   0 12 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4641 23:10:15.098328   0 13  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4642 23:10:15.101227   0 13  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 4643 23:10:15.104811   0 13  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

 4644 23:10:15.111467   0 13 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

 4645 23:10:15.114474   0 13 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 4646 23:10:15.117951  Total UI for P1: 0, mck2ui 16

 4647 23:10:15.121448  best dqsien dly found for B0: ( 0, 13, 10)

 4648 23:10:15.124743  Total UI for P1: 0, mck2ui 16

 4649 23:10:15.128272  best dqsien dly found for B1: ( 0, 13, 14)

 4650 23:10:15.131346  best DQS0 dly(MCK, UI, PI) = (0, 13, 10)

 4651 23:10:15.134616  best DQS1 dly(MCK, UI, PI) = (0, 13, 14)

 4652 23:10:15.134700  

 4653 23:10:15.138145  best DQS0 P1 dly(MCK, UI, PI) = (1, 1, 10)

 4654 23:10:15.142030  best DQS1 P1 dly(MCK, UI, PI) = (1, 1, 14)

 4655 23:10:15.144730  [Gating] SW calibration Done

 4656 23:10:15.144810  ==

 4657 23:10:15.147832  Dram Type= 6, Freq= 0, CH_1, rank 1

 4658 23:10:15.151233  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4659 23:10:15.151308  ==

 4660 23:10:15.154790  RX Vref Scan: 0

 4661 23:10:15.154861  

 4662 23:10:15.157769  RX Vref 0 -> 0, step: 1

 4663 23:10:15.157866  

 4664 23:10:15.157956  RX Delay -230 -> 252, step: 16

 4665 23:10:15.165154  iDelay=218, Bit 0, Center 41 (-118 ~ 201) 320

 4666 23:10:15.168069  iDelay=218, Bit 1, Center 33 (-134 ~ 201) 336

 4667 23:10:15.171609  iDelay=218, Bit 2, Center 25 (-134 ~ 185) 320

 4668 23:10:15.175089  iDelay=218, Bit 3, Center 41 (-118 ~ 201) 320

 4669 23:10:15.181771  iDelay=218, Bit 4, Center 41 (-118 ~ 201) 320

 4670 23:10:15.185093  iDelay=218, Bit 5, Center 49 (-118 ~ 217) 336

 4671 23:10:15.187996  iDelay=218, Bit 6, Center 49 (-118 ~ 217) 336

 4672 23:10:15.191410  iDelay=218, Bit 7, Center 41 (-118 ~ 201) 320

 4673 23:10:15.195061  iDelay=218, Bit 8, Center 17 (-150 ~ 185) 336

 4674 23:10:15.202010  iDelay=218, Bit 9, Center 17 (-150 ~ 185) 336

 4675 23:10:15.204845  iDelay=218, Bit 10, Center 33 (-134 ~ 201) 336

 4676 23:10:15.208314  iDelay=218, Bit 11, Center 33 (-134 ~ 201) 336

 4677 23:10:15.212055  iDelay=218, Bit 12, Center 41 (-118 ~ 201) 320

 4678 23:10:15.218167  iDelay=218, Bit 13, Center 49 (-118 ~ 217) 336

 4679 23:10:15.222346  iDelay=218, Bit 14, Center 41 (-118 ~ 201) 320

 4680 23:10:15.224936  iDelay=218, Bit 15, Center 41 (-118 ~ 201) 320

 4681 23:10:15.225032  ==

 4682 23:10:15.228691  Dram Type= 6, Freq= 0, CH_1, rank 1

 4683 23:10:15.232027  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4684 23:10:15.232103  ==

 4685 23:10:15.234931  DQS Delay:

 4686 23:10:15.235034  DQS0 = 0, DQS1 = 0

 4687 23:10:15.238276  DQM Delay:

 4688 23:10:15.238376  DQM0 = 40, DQM1 = 34

 4689 23:10:15.238516  DQ Delay:

 4690 23:10:15.241855  DQ0 =41, DQ1 =33, DQ2 =25, DQ3 =41

 4691 23:10:15.245167  DQ4 =41, DQ5 =49, DQ6 =49, DQ7 =41

 4692 23:10:15.248438  DQ8 =17, DQ9 =17, DQ10 =33, DQ11 =33

 4693 23:10:15.252055  DQ12 =41, DQ13 =49, DQ14 =41, DQ15 =41

 4694 23:10:15.252129  

 4695 23:10:15.252209  

 4696 23:10:15.254920  ==

 4697 23:10:15.254992  Dram Type= 6, Freq= 0, CH_1, rank 1

 4698 23:10:15.262235  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4699 23:10:15.262340  ==

 4700 23:10:15.262467  

 4701 23:10:15.262531  

 4702 23:10:15.264773  	TX Vref Scan disable

 4703 23:10:15.264872   == TX Byte 0 ==

 4704 23:10:15.268539  Update DQ  dly =575 (2 ,1, 31)  DQ  OEN =(1 ,6)

 4705 23:10:15.275067  Update DQM dly =575 (2 ,1, 31)  DQM OEN =(1 ,6)

 4706 23:10:15.275138   == TX Byte 1 ==

 4707 23:10:15.278603  Update DQ  dly =574 (2 ,1, 30)  DQ  OEN =(1 ,6)

 4708 23:10:15.284901  Update DQM dly =574 (2 ,1, 30)  DQM OEN =(1 ,6)

 4709 23:10:15.284998  ==

 4710 23:10:15.288863  Dram Type= 6, Freq= 0, CH_1, rank 1

 4711 23:10:15.291886  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4712 23:10:15.291986  ==

 4713 23:10:15.292075  

 4714 23:10:15.292161  

 4715 23:10:15.295270  	TX Vref Scan disable

 4716 23:10:15.298221   == TX Byte 0 ==

 4717 23:10:15.301942  Update DQ  dly =575 (2 ,1, 31)  DQ  OEN =(1 ,6)

 4718 23:10:15.305438  Update DQM dly =575 (2 ,1, 31)  DQM OEN =(1 ,6)

 4719 23:10:15.308627   == TX Byte 1 ==

 4720 23:10:15.311957  Update DQ  dly =574 (2 ,1, 30)  DQ  OEN =(1 ,6)

 4721 23:10:15.314992  Update DQM dly =574 (2 ,1, 30)  DQM OEN =(1 ,6)

 4722 23:10:15.315076  

 4723 23:10:15.318447  [DATLAT]

 4724 23:10:15.318528  Freq=600, CH1 RK1

 4725 23:10:15.318592  

 4726 23:10:15.321619  DATLAT Default: 0x9

 4727 23:10:15.321710  0, 0xFFFF, sum = 0

 4728 23:10:15.325355  1, 0xFFFF, sum = 0

 4729 23:10:15.325457  2, 0xFFFF, sum = 0

 4730 23:10:15.328412  3, 0xFFFF, sum = 0

 4731 23:10:15.328495  4, 0xFFFF, sum = 0

 4732 23:10:15.331680  5, 0xFFFF, sum = 0

 4733 23:10:15.331763  6, 0xFFFF, sum = 0

 4734 23:10:15.335164  7, 0xFFFF, sum = 0

 4735 23:10:15.335275  8, 0x0, sum = 1

 4736 23:10:15.338245  9, 0x0, sum = 2

 4737 23:10:15.338327  10, 0x0, sum = 3

 4738 23:10:15.341613  11, 0x0, sum = 4

 4739 23:10:15.341723  best_step = 9

 4740 23:10:15.341815  

 4741 23:10:15.341903  ==

 4742 23:10:15.344931  Dram Type= 6, Freq= 0, CH_1, rank 1

 4743 23:10:15.348780  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4744 23:10:15.348862  ==

 4745 23:10:15.351641  RX Vref Scan: 0

 4746 23:10:15.351721  

 4747 23:10:15.355147  RX Vref 0 -> 0, step: 1

 4748 23:10:15.355288  

 4749 23:10:15.355355  RX Delay -195 -> 252, step: 8

 4750 23:10:15.363129  iDelay=205, Bit 0, Center 40 (-115 ~ 196) 312

 4751 23:10:15.366239  iDelay=205, Bit 1, Center 32 (-123 ~ 188) 312

 4752 23:10:15.370691  iDelay=205, Bit 2, Center 28 (-123 ~ 180) 304

 4753 23:10:15.373698  iDelay=205, Bit 3, Center 36 (-115 ~ 188) 304

 4754 23:10:15.380029  iDelay=205, Bit 4, Center 36 (-115 ~ 188) 304

 4755 23:10:15.382925  iDelay=205, Bit 5, Center 48 (-107 ~ 204) 312

 4756 23:10:15.386535  iDelay=205, Bit 6, Center 48 (-107 ~ 204) 312

 4757 23:10:15.389424  iDelay=205, Bit 7, Center 32 (-115 ~ 180) 296

 4758 23:10:15.393150  iDelay=205, Bit 8, Center 20 (-139 ~ 180) 320

 4759 23:10:15.399967  iDelay=205, Bit 9, Center 20 (-139 ~ 180) 320

 4760 23:10:15.403421  iDelay=205, Bit 10, Center 36 (-123 ~ 196) 320

 4761 23:10:15.406506  iDelay=205, Bit 11, Center 24 (-131 ~ 180) 312

 4762 23:10:15.409718  iDelay=205, Bit 12, Center 40 (-115 ~ 196) 312

 4763 23:10:15.416289  iDelay=205, Bit 13, Center 40 (-115 ~ 196) 312

 4764 23:10:15.419722  iDelay=205, Bit 14, Center 40 (-115 ~ 196) 312

 4765 23:10:15.423319  iDelay=205, Bit 15, Center 40 (-115 ~ 196) 312

 4766 23:10:15.423393  ==

 4767 23:10:15.426645  Dram Type= 6, Freq= 0, CH_1, rank 1

 4768 23:10:15.429742  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 4769 23:10:15.429830  ==

 4770 23:10:15.433062  DQS Delay:

 4771 23:10:15.433162  DQS0 = 0, DQS1 = 0

 4772 23:10:15.436319  DQM Delay:

 4773 23:10:15.436422  DQM0 = 37, DQM1 = 32

 4774 23:10:15.436516  DQ Delay:

 4775 23:10:15.439896  DQ0 =40, DQ1 =32, DQ2 =28, DQ3 =36

 4776 23:10:15.442968  DQ4 =36, DQ5 =48, DQ6 =48, DQ7 =32

 4777 23:10:15.446956  DQ8 =20, DQ9 =20, DQ10 =36, DQ11 =24

 4778 23:10:15.449403  DQ12 =40, DQ13 =40, DQ14 =40, DQ15 =40

 4779 23:10:15.449503  

 4780 23:10:15.449591  

 4781 23:10:15.460151  [DQSOSCAuto] RK1, (LSB)MR18= 0x3240, (MSB)MR19= 0x808, tDQSOscB0 = 397 ps tDQSOscB1 = 400 ps

 4782 23:10:15.462993  CH1 RK1: MR19=808, MR18=3240

 4783 23:10:15.469864  CH1_RK1: MR19=0x808, MR18=0x3240, DQSOSC=397, MR23=63, INC=166, DEC=110

 4784 23:10:15.469968  [RxdqsGatingPostProcess] freq 600

 4785 23:10:15.476584  ChangeDQSINCTL 0, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 1

 4786 23:10:15.479996  Pre-setting of DQS Precalculation

 4787 23:10:15.482896  [DualRankRxdatlatCal] RK0: 9, RK1: 9, Final_Datlat 9

 4788 23:10:15.493630  sync_frequency_calibration_params sync calibration params of frequency 600 to shu:5

 4789 23:10:15.499698  calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464

 4790 23:10:15.499783  

 4791 23:10:15.499854  

 4792 23:10:15.503046  [Calibration Summary] 1200 Mbps

 4793 23:10:15.503150  CH 0, Rank 0

 4794 23:10:15.505995  SW Impedance     : PASS

 4795 23:10:15.506095  DUTY Scan        : NO K

 4796 23:10:15.509694  ZQ Calibration   : PASS

 4797 23:10:15.512810  Jitter Meter     : NO K

 4798 23:10:15.512916  CBT Training     : PASS

 4799 23:10:15.516645  Write leveling   : PASS

 4800 23:10:15.520068  RX DQS gating    : PASS

 4801 23:10:15.520172  RX DQ/DQS(RDDQC) : PASS

 4802 23:10:15.523232  TX DQ/DQS        : PASS

 4803 23:10:15.526516  RX DATLAT        : PASS

 4804 23:10:15.526593  RX DQ/DQS(Engine): PASS

 4805 23:10:15.529442  TX OE            : NO K

 4806 23:10:15.529519  All Pass.

 4807 23:10:15.529585  

 4808 23:10:15.532888  CH 0, Rank 1

 4809 23:10:15.532988  SW Impedance     : PASS

 4810 23:10:15.536646  DUTY Scan        : NO K

 4811 23:10:15.536735  ZQ Calibration   : PASS

 4812 23:10:15.540014  Jitter Meter     : NO K

 4813 23:10:15.543134  CBT Training     : PASS

 4814 23:10:15.543212  Write leveling   : PASS

 4815 23:10:15.546091  RX DQS gating    : PASS

 4816 23:10:15.549625  RX DQ/DQS(RDDQC) : PASS

 4817 23:10:15.549702  TX DQ/DQS        : PASS

 4818 23:10:15.552744  RX DATLAT        : PASS

 4819 23:10:15.556408  RX DQ/DQS(Engine): PASS

 4820 23:10:15.556489  TX OE            : NO K

 4821 23:10:15.559852  All Pass.

 4822 23:10:15.559933  

 4823 23:10:15.559998  CH 1, Rank 0

 4824 23:10:15.563410  SW Impedance     : PASS

 4825 23:10:15.563491  DUTY Scan        : NO K

 4826 23:10:15.566822  ZQ Calibration   : PASS

 4827 23:10:15.566904  Jitter Meter     : NO K

 4828 23:10:15.569837  CBT Training     : PASS

 4829 23:10:15.572892  Write leveling   : PASS

 4830 23:10:15.572973  RX DQS gating    : PASS

 4831 23:10:15.576625  RX DQ/DQS(RDDQC) : PASS

 4832 23:10:15.579430  TX DQ/DQS        : PASS

 4833 23:10:15.579543  RX DATLAT        : PASS

 4834 23:10:15.583363  RX DQ/DQS(Engine): PASS

 4835 23:10:15.586663  TX OE            : NO K

 4836 23:10:15.586747  All Pass.

 4837 23:10:15.586812  

 4838 23:10:15.586871  CH 1, Rank 1

 4839 23:10:15.589558  SW Impedance     : PASS

 4840 23:10:15.593542  DUTY Scan        : NO K

 4841 23:10:15.593623  ZQ Calibration   : PASS

 4842 23:10:15.596394  Jitter Meter     : NO K

 4843 23:10:15.599891  CBT Training     : PASS

 4844 23:10:15.600001  Write leveling   : PASS

 4845 23:10:15.603544  RX DQS gating    : PASS

 4846 23:10:15.606588  RX DQ/DQS(RDDQC) : PASS

 4847 23:10:15.606689  TX DQ/DQS        : PASS

 4848 23:10:15.609925  RX DATLAT        : PASS

 4849 23:10:15.612853  RX DQ/DQS(Engine): PASS

 4850 23:10:15.612962  TX OE            : NO K

 4851 23:10:15.613054  All Pass.

 4852 23:10:15.613153  

 4853 23:10:15.616379  DramC Write-DBI off

 4854 23:10:15.620359  	PER_BANK_REFRESH: Hybrid Mode

 4855 23:10:15.620468  TX_TRACKING: ON

 4856 23:10:15.629857  [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 30, TRFC_05T 1, TXREFCNT 44, TRFCpb 9, TRFCpb_05T 1

 4857 23:10:15.633001  [FAST_K] Save calibration result to emmc

 4858 23:10:15.636340  dramc_set_vcore_voltage set vcore to 662500

 4859 23:10:15.640200  Read voltage for 933, 3

 4860 23:10:15.640311  Vio18 = 0

 4861 23:10:15.640417  Vcore = 662500

 4862 23:10:15.643788  Vdram = 0

 4863 23:10:15.643927  Vddq = 0

 4864 23:10:15.644031  Vmddr = 0

 4865 23:10:15.649725  [FAST_K] DramcSave_Time_For_Cal_Init SHU3, femmc_Ready=0

 4866 23:10:15.653279  [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0

 4867 23:10:15.656384  MEM_TYPE=3, freq_sel=17

 4868 23:10:15.660126  sv_algorithm_assistance_LP4_1600 

 4869 23:10:15.663343  ============ PULL DRAM RESETB DOWN ============

 4870 23:10:15.666656  ========== PULL DRAM RESETB DOWN end =========

 4871 23:10:15.673326  [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3

 4872 23:10:15.676770  =================================== 

 4873 23:10:15.680241  LPDDR4 DRAM CONFIGURATION

 4874 23:10:15.683493  =================================== 

 4875 23:10:15.683592  EX_ROW_EN[0]    = 0x0

 4876 23:10:15.686989  EX_ROW_EN[1]    = 0x0

 4877 23:10:15.687099  LP4Y_EN      = 0x0

 4878 23:10:15.689922  WORK_FSP     = 0x0

 4879 23:10:15.690025  WL           = 0x3

 4880 23:10:15.693219  RL           = 0x3

 4881 23:10:15.693318  BL           = 0x2

 4882 23:10:15.696913  RPST         = 0x0

 4883 23:10:15.697009  RD_PRE       = 0x0

 4884 23:10:15.699905  WR_PRE       = 0x1

 4885 23:10:15.699979  WR_PST       = 0x0

 4886 23:10:15.704026  DBI_WR       = 0x0

 4887 23:10:15.704100  DBI_RD       = 0x0

 4888 23:10:15.706897  OTF          = 0x1

 4889 23:10:15.709930  =================================== 

 4890 23:10:15.713171  =================================== 

 4891 23:10:15.713281  ANA top config

 4892 23:10:15.717010  =================================== 

 4893 23:10:15.720868  DLL_ASYNC_EN            =  0

 4894 23:10:15.723502  ALL_SLAVE_EN            =  1

 4895 23:10:15.723584  NEW_RANK_MODE           =  1

 4896 23:10:15.727167  DLL_IDLE_MODE           =  1

 4897 23:10:15.730553  LP45_APHY_COMB_EN       =  1

 4898 23:10:15.733678  TX_ODT_DIS              =  1

 4899 23:10:15.736981  NEW_8X_MODE             =  1

 4900 23:10:15.739964  =================================== 

 4901 23:10:15.743477  =================================== 

 4902 23:10:15.743559  data_rate                  = 1866

 4903 23:10:15.746646  CKR                        = 1

 4904 23:10:15.749989  DQ_P2S_RATIO               = 8

 4905 23:10:15.753734  =================================== 

 4906 23:10:15.756590  CA_P2S_RATIO               = 8

 4907 23:10:15.760367  DQ_CA_OPEN                 = 0

 4908 23:10:15.763668  DQ_SEMI_OPEN               = 0

 4909 23:10:15.763745  CA_SEMI_OPEN               = 0

 4910 23:10:15.766872  CA_FULL_RATE               = 0

 4911 23:10:15.770222  DQ_CKDIV4_EN               = 1

 4912 23:10:15.773921  CA_CKDIV4_EN               = 1

 4913 23:10:15.776939  CA_PREDIV_EN               = 0

 4914 23:10:15.777082  PH8_DLY                    = 0

 4915 23:10:15.780406  SEMI_OPEN_CA_PICK_MCK_RATIO= 0

 4916 23:10:15.783699  DQ_AAMCK_DIV               = 4

 4917 23:10:15.787456  CA_AAMCK_DIV               = 4

 4918 23:10:15.790521  CA_ADMCK_DIV               = 4

 4919 23:10:15.793525  DQ_TRACK_CA_EN             = 0

 4920 23:10:15.797178  CA_PICK                    = 933

 4921 23:10:15.797280  CA_MCKIO                   = 933

 4922 23:10:15.800458  MCKIO_SEMI                 = 0

 4923 23:10:15.803922  PLL_FREQ                   = 3732

 4924 23:10:15.806822  DQ_UI_PI_RATIO             = 32

 4925 23:10:15.810195  CA_UI_PI_RATIO             = 0

 4926 23:10:15.813815  =================================== 

 4927 23:10:15.817264  =================================== 

 4928 23:10:15.820511  memory_type:LPDDR4         

 4929 23:10:15.820612  GP_NUM     : 10       

 4930 23:10:15.823681  SRAM_EN    : 1       

 4931 23:10:15.823780  MD32_EN    : 0       

 4932 23:10:15.826871  =================================== 

 4933 23:10:15.830356  [ANA_INIT] >>>>>>>>>>>>>> 

 4934 23:10:15.833440  <<<<<< [CONFIGURE PHASE]: ANA_TX

 4935 23:10:15.836706  >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL

 4936 23:10:15.839831  =================================== 

 4937 23:10:15.843761  data_rate = 1866,PCW = 0X8f00

 4938 23:10:15.846796  =================================== 

 4939 23:10:15.850347  <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL

 4940 23:10:15.853415  >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration

 4941 23:10:15.860379  <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration

 4942 23:10:15.863762  >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2

 4943 23:10:15.870186  >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL

 4944 23:10:15.873487  <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL

 4945 23:10:15.873563  [ANA_INIT] flow start 

 4946 23:10:15.876526  [ANA_INIT] PLL >>>>>>>> 

 4947 23:10:15.879837  [ANA_INIT] PLL <<<<<<<< 

 4948 23:10:15.879939  [ANA_INIT] MIDPI >>>>>>>> 

 4949 23:10:15.883199  [ANA_INIT] MIDPI <<<<<<<< 

 4950 23:10:15.887261  [ANA_INIT] DLL >>>>>>>> 

 4951 23:10:15.887344  [ANA_INIT] flow end 

 4952 23:10:15.890294  ============ LP4 DIFF to SE enter ============

 4953 23:10:15.897318  ============ LP4 DIFF to SE exit  ============

 4954 23:10:15.897400  [ANA_INIT] <<<<<<<<<<<<< 

 4955 23:10:15.900385  [Flow] Enable top DCM control >>>>> 

 4956 23:10:15.903669  [Flow] Enable top DCM control <<<<< 

 4957 23:10:15.907171  Enable DLL master slave shuffle 

 4958 23:10:15.913565  ============================================================== 

 4959 23:10:15.913676  Gating Mode config

 4960 23:10:15.919931  ============================================================== 

 4961 23:10:15.923289  Config description: 

 4962 23:10:15.933879  RX_GATING_MODE        0: Pulse Mode      1: Burst Mode(8UI)        2: Burst Mode(7UI)  3: Original Burst Mode

 4963 23:10:15.937678  RX_GATING_TRACK_MODE  0: Valid DLY Mode  1: Valid Mode (-like) 2: FIFO mode

 4964 23:10:15.943428  SELPH_MODE            0: By rank         1: By Phase 

 4965 23:10:15.950667  ============================================================== 

 4966 23:10:15.950777  GAT_TRACK_EN                 =  1

 4967 23:10:15.953713  RX_GATING_MODE               =  2

 4968 23:10:15.956838  RX_GATING_TRACK_MODE         =  2

 4969 23:10:15.960515  SELPH_MODE                   =  1

 4970 23:10:15.964120  PICG_EARLY_EN                =  1

 4971 23:10:15.967169  VALID_LAT_VALUE              =  1

 4972 23:10:15.974225  ============================================================== 

 4973 23:10:15.977169  Enter into Gating configuration >>>> 

 4974 23:10:15.980583  Exit from Gating configuration <<<< 

 4975 23:10:15.983677  Enter into  DVFS_PRE_config >>>>> 

 4976 23:10:15.993978  Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL. 

 4977 23:10:15.997212  Exit from  DVFS_PRE_config <<<<< 

 4978 23:10:16.000242  Enter into PICG configuration >>>> 

 4979 23:10:16.003620  Exit from PICG configuration <<<< 

 4980 23:10:16.007034  [RX_INPUT] configuration >>>>> 

 4981 23:10:16.007124  [RX_INPUT] configuration <<<<< 

 4982 23:10:16.014106  [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>

 4983 23:10:16.020183  [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<

 4984 23:10:16.023642  [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>

 4985 23:10:16.030713  [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<

 4986 23:10:16.037208  [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>

 4987 23:10:16.044099  [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<

 4988 23:10:16.046827  [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0 

 4989 23:10:16.050690  [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0 

 4990 23:10:16.056850  [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0 

 4991 23:10:16.060707  [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0 

 4992 23:10:16.063902  [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0 

 4993 23:10:16.067062  [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3

 4994 23:10:16.070190  =================================== 

 4995 23:10:16.074062  LPDDR4 DRAM CONFIGURATION

 4996 23:10:16.077360  =================================== 

 4997 23:10:16.081046  EX_ROW_EN[0]    = 0x0

 4998 23:10:16.081150  EX_ROW_EN[1]    = 0x0

 4999 23:10:16.083514  LP4Y_EN      = 0x0

 5000 23:10:16.083616  WORK_FSP     = 0x0

 5001 23:10:16.086831  WL           = 0x3

 5002 23:10:16.086937  RL           = 0x3

 5003 23:10:16.090238  BL           = 0x2

 5004 23:10:16.090338  RPST         = 0x0

 5005 23:10:16.093732  RD_PRE       = 0x0

 5006 23:10:16.093841  WR_PRE       = 0x1

 5007 23:10:16.097277  WR_PST       = 0x0

 5008 23:10:16.097369  DBI_WR       = 0x0

 5009 23:10:16.100334  DBI_RD       = 0x0

 5010 23:10:16.103661  OTF          = 0x1

 5011 23:10:16.103739  =================================== 

 5012 23:10:16.110293  [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0 

 5013 23:10:16.113500  [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0 

 5014 23:10:16.117021  [ModeRegister RLWL Config] data_rate:1866-MR2_RLWL:3

 5015 23:10:16.120469  =================================== 

 5016 23:10:16.123581  LPDDR4 DRAM CONFIGURATION

 5017 23:10:16.126951  =================================== 

 5018 23:10:16.130302  EX_ROW_EN[0]    = 0x10

 5019 23:10:16.130421  EX_ROW_EN[1]    = 0x0

 5020 23:10:16.133830  LP4Y_EN      = 0x0

 5021 23:10:16.133934  WORK_FSP     = 0x0

 5022 23:10:16.136988  WL           = 0x3

 5023 23:10:16.137095  RL           = 0x3

 5024 23:10:16.140350  BL           = 0x2

 5025 23:10:16.140426  RPST         = 0x0

 5026 23:10:16.144087  RD_PRE       = 0x0

 5027 23:10:16.144198  WR_PRE       = 0x1

 5028 23:10:16.147069  WR_PST       = 0x0

 5029 23:10:16.147196  DBI_WR       = 0x0

 5030 23:10:16.150370  DBI_RD       = 0x0

 5031 23:10:16.150474  OTF          = 0x1

 5032 23:10:16.153932  =================================== 

 5033 23:10:16.160593  [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit

 5034 23:10:16.164993  nWR fixed to 30

 5035 23:10:16.168377  [ModeRegInit_LP4] CH0 RK0

 5036 23:10:16.168496  [ModeRegInit_LP4] CH0 RK1

 5037 23:10:16.171504  [ModeRegInit_LP4] CH1 RK0

 5038 23:10:16.174870  [ModeRegInit_LP4] CH1 RK1

 5039 23:10:16.174970  match AC timing 9

 5040 23:10:16.181704  dramType 5, freq 933, readDBI 0, DivMode 1, cbtMode 1

 5041 23:10:16.184940  SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON

 5042 23:10:16.188248  [WriteLatency GET] Version:0-MR_RL_field_value:3-WL:10

 5043 23:10:16.195609  [TX_path_calculate] data rate=1866, WL=10, DQS_TotalUI=21

 5044 23:10:16.198070  [TX_path_calculate] DQS = (2,5) DQS_OE = (2,2)

 5045 23:10:16.198174  ==

 5046 23:10:16.202134  Dram Type= 6, Freq= 0, CH_0, rank 0

 5047 23:10:16.205030  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5048 23:10:16.205132  ==

 5049 23:10:16.211875  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 5050 23:10:16.218201  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37

 5051 23:10:16.221959  [CA 0] Center 38 (7~69) winsize 63

 5052 23:10:16.224959  [CA 1] Center 37 (7~68) winsize 62

 5053 23:10:16.228523  [CA 2] Center 35 (5~66) winsize 62

 5054 23:10:16.231700  [CA 3] Center 35 (4~66) winsize 63

 5055 23:10:16.234880  [CA 4] Center 34 (4~64) winsize 61

 5056 23:10:16.238361  [CA 5] Center 34 (4~64) winsize 61

 5057 23:10:16.238459  

 5058 23:10:16.241414  [CmdBusTrainingLP45] Vref(ca) range 1: 37

 5059 23:10:16.241513  

 5060 23:10:16.245419  [CATrainingPosCal] consider 1 rank data

 5061 23:10:16.248188  u2DelayCellTimex100 = 270/100 ps

 5062 23:10:16.251895  CA0 delay=38 (7~69),Diff = 4 PI (24 cell)

 5063 23:10:16.254907  CA1 delay=37 (7~68),Diff = 3 PI (18 cell)

 5064 23:10:16.258618  CA2 delay=35 (5~66),Diff = 1 PI (6 cell)

 5065 23:10:16.261933  CA3 delay=35 (4~66),Diff = 1 PI (6 cell)

 5066 23:10:16.265603  CA4 delay=34 (4~64),Diff = 0 PI (0 cell)

 5067 23:10:16.268490  CA5 delay=34 (4~64),Diff = 0 PI (0 cell)

 5068 23:10:16.268599  

 5069 23:10:16.271584  CA PerBit enable=1, Macro0, CA PI delay=34

 5070 23:10:16.275421  

 5071 23:10:16.275496  [CBTSetCACLKResult] CA Dly = 34

 5072 23:10:16.278283  CS Dly: 6 (0~37)

 5073 23:10:16.278383  ==

 5074 23:10:16.281776  Dram Type= 6, Freq= 0, CH_0, rank 1

 5075 23:10:16.285236  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5076 23:10:16.285343  ==

 5077 23:10:16.291922  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 5078 23:10:16.298407  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35

 5079 23:10:16.301714  [CA 0] Center 38 (7~69) winsize 63

 5080 23:10:16.305165  [CA 1] Center 38 (7~69) winsize 63

 5081 23:10:16.308699  [CA 2] Center 35 (5~66) winsize 62

 5082 23:10:16.311752  [CA 3] Center 35 (4~66) winsize 63

 5083 23:10:16.315068  [CA 4] Center 34 (4~64) winsize 61

 5084 23:10:16.318506  [CA 5] Center 33 (3~64) winsize 62

 5085 23:10:16.318592  

 5086 23:10:16.321635  [CmdBusTrainingLP45] Vref(ca) range 1: 35

 5087 23:10:16.321724  

 5088 23:10:16.325357  [CATrainingPosCal] consider 2 rank data

 5089 23:10:16.328591  u2DelayCellTimex100 = 270/100 ps

 5090 23:10:16.331907  CA0 delay=38 (7~69),Diff = 4 PI (24 cell)

 5091 23:10:16.335129  CA1 delay=37 (7~68),Diff = 3 PI (18 cell)

 5092 23:10:16.338436  CA2 delay=35 (5~66),Diff = 1 PI (6 cell)

 5093 23:10:16.341561  CA3 delay=35 (4~66),Diff = 1 PI (6 cell)

 5094 23:10:16.345435  CA4 delay=34 (4~64),Diff = 0 PI (0 cell)

 5095 23:10:16.348285  CA5 delay=34 (4~64),Diff = 0 PI (0 cell)

 5096 23:10:16.348362  

 5097 23:10:16.351740  CA PerBit enable=1, Macro0, CA PI delay=34

 5098 23:10:16.351823  

 5099 23:10:16.355446  [CBTSetCACLKResult] CA Dly = 34

 5100 23:10:16.358420  CS Dly: 7 (0~39)

 5101 23:10:16.358515  

 5102 23:10:16.361907  ----->DramcWriteLeveling(PI) begin...

 5103 23:10:16.361990  ==

 5104 23:10:16.365263  Dram Type= 6, Freq= 0, CH_0, rank 0

 5105 23:10:16.368778  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5106 23:10:16.368898  ==

 5107 23:10:16.372117  Write leveling (Byte 0): 30 => 30

 5108 23:10:16.375208  Write leveling (Byte 1): 27 => 27

 5109 23:10:16.378404  DramcWriteLeveling(PI) end<-----

 5110 23:10:16.378527  

 5111 23:10:16.378627  ==

 5112 23:10:16.381740  Dram Type= 6, Freq= 0, CH_0, rank 0

 5113 23:10:16.384980  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5114 23:10:16.385080  ==

 5115 23:10:16.388312  [Gating] SW mode calibration

 5116 23:10:16.395172  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0

 5117 23:10:16.401762  RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)

 5118 23:10:16.405298   0 14  0 | B1->B0 | 2323 2828 | 0 0 | (0 0) (0 0)

 5119 23:10:16.412059   0 14  4 | B1->B0 | 2f2f 3434 | 1 1 | (0 0) (1 1)

 5120 23:10:16.415015   0 14  8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5121 23:10:16.418833   0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5122 23:10:16.421738   0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5123 23:10:16.428346   0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5124 23:10:16.432120   0 14 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5125 23:10:16.436068   0 14 28 | B1->B0 | 3434 3333 | 1 1 | (1 1) (1 1)

 5126 23:10:16.442231   0 15  0 | B1->B0 | 3030 2b2b | 1 0 | (1 0) (0 1)

 5127 23:10:16.445327   0 15  4 | B1->B0 | 2626 2323 | 1 0 | (0 1) (0 0)

 5128 23:10:16.448623   0 15  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5129 23:10:16.455251   0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5130 23:10:16.458779   0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5131 23:10:16.461936   0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5132 23:10:16.468659   0 15 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5133 23:10:16.471958   0 15 28 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)

 5134 23:10:16.475738   1  0  0 | B1->B0 | 3131 4040 | 0 0 | (0 0) (0 0)

 5135 23:10:16.481779   1  0  4 | B1->B0 | 4343 4646 | 0 0 | (0 0) (0 0)

 5136 23:10:16.485134   1  0  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5137 23:10:16.489175   1  0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5138 23:10:16.491861   1  0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5139 23:10:16.498916   1  0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5140 23:10:16.502141   1  0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5141 23:10:16.505547   1  0 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)

 5142 23:10:16.512051   1  1  0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)

 5143 23:10:16.516257   1  1  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5144 23:10:16.518810   1  1  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5145 23:10:16.525422   1  1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5146 23:10:16.528573   1  1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5147 23:10:16.532274   1  1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5148 23:10:16.538546   1  1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5149 23:10:16.542264   1  1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5150 23:10:16.548023   1  2  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5151 23:10:16.552203   1  2  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5152 23:10:16.555595   1  2  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5153 23:10:16.558803   1  2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5154 23:10:16.565615   1  2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5155 23:10:16.568503   1  2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5156 23:10:16.571930   1  2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

 5157 23:10:16.578834   1  2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5158 23:10:16.582274   1  3  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5159 23:10:16.585295  Total UI for P1: 0, mck2ui 16

 5160 23:10:16.588605  best dqsien dly found for B0: ( 1,  2, 30)

 5161 23:10:16.592025  Total UI for P1: 0, mck2ui 16

 5162 23:10:16.595115  best dqsien dly found for B1: ( 1,  2, 30)

 5163 23:10:16.598738  best DQS0 dly(MCK, UI, PI) = (1, 2, 30)

 5164 23:10:16.602593  best DQS1 dly(MCK, UI, PI) = (1, 2, 30)

 5165 23:10:16.602668  

 5166 23:10:16.605201  best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 30)

 5167 23:10:16.608641  best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 30)

 5168 23:10:16.612199  [Gating] SW calibration Done

 5169 23:10:16.612301  ==

 5170 23:10:16.615260  Dram Type= 6, Freq= 0, CH_0, rank 0

 5171 23:10:16.618517  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5172 23:10:16.618618  ==

 5173 23:10:16.621948  RX Vref Scan: 0

 5174 23:10:16.622046  

 5175 23:10:16.622136  RX Vref 0 -> 0, step: 1

 5176 23:10:16.625415  

 5177 23:10:16.625496  RX Delay -80 -> 252, step: 8

 5178 23:10:16.632185  iDelay=200, Bit 0, Center 95 (0 ~ 191) 192

 5179 23:10:16.635797  iDelay=200, Bit 1, Center 99 (0 ~ 199) 200

 5180 23:10:16.638648  iDelay=200, Bit 2, Center 95 (0 ~ 191) 192

 5181 23:10:16.642358  iDelay=200, Bit 3, Center 95 (0 ~ 191) 192

 5182 23:10:16.645671  iDelay=200, Bit 4, Center 99 (0 ~ 199) 200

 5183 23:10:16.648541  iDelay=200, Bit 5, Center 87 (-8 ~ 183) 192

 5184 23:10:16.652245  iDelay=200, Bit 6, Center 103 (8 ~ 199) 192

 5185 23:10:16.658930  iDelay=200, Bit 7, Center 103 (8 ~ 199) 192

 5186 23:10:16.662112  iDelay=200, Bit 8, Center 79 (-16 ~ 175) 192

 5187 23:10:16.665232  iDelay=200, Bit 9, Center 75 (-16 ~ 167) 184

 5188 23:10:16.668706  iDelay=200, Bit 10, Center 87 (-8 ~ 183) 192

 5189 23:10:16.672024  iDelay=200, Bit 11, Center 79 (-16 ~ 175) 192

 5190 23:10:16.675676  iDelay=200, Bit 12, Center 95 (0 ~ 191) 192

 5191 23:10:16.682287  iDelay=200, Bit 13, Center 95 (0 ~ 191) 192

 5192 23:10:16.685383  iDelay=200, Bit 14, Center 95 (0 ~ 191) 192

 5193 23:10:16.689145  iDelay=200, Bit 15, Center 95 (0 ~ 191) 192

 5194 23:10:16.689247  ==

 5195 23:10:16.692488  Dram Type= 6, Freq= 0, CH_0, rank 0

 5196 23:10:16.695206  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5197 23:10:16.695309  ==

 5198 23:10:16.699194  DQS Delay:

 5199 23:10:16.699269  DQS0 = 0, DQS1 = 0

 5200 23:10:16.701934  DQM Delay:

 5201 23:10:16.702003  DQM0 = 97, DQM1 = 87

 5202 23:10:16.702062  DQ Delay:

 5203 23:10:16.705611  DQ0 =95, DQ1 =99, DQ2 =95, DQ3 =95

 5204 23:10:16.708887  DQ4 =99, DQ5 =87, DQ6 =103, DQ7 =103

 5205 23:10:16.711981  DQ8 =79, DQ9 =75, DQ10 =87, DQ11 =79

 5206 23:10:16.715582  DQ12 =95, DQ13 =95, DQ14 =95, DQ15 =95

 5207 23:10:16.715671  

 5208 23:10:16.715742  

 5209 23:10:16.715802  ==

 5210 23:10:16.718725  Dram Type= 6, Freq= 0, CH_0, rank 0

 5211 23:10:16.726035  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5212 23:10:16.726118  ==

 5213 23:10:16.726184  

 5214 23:10:16.726243  

 5215 23:10:16.726300  	TX Vref Scan disable

 5216 23:10:16.729287   == TX Byte 0 ==

 5217 23:10:16.733024  Update DQ  dly =714 (2 ,6, 10)  DQ  OEN =(2 ,3)

 5218 23:10:16.739877  Update DQM dly =714 (2 ,6, 10)  DQM OEN =(2 ,3)

 5219 23:10:16.739984   == TX Byte 1 ==

 5220 23:10:16.742767  Update DQ  dly =709 (2 ,5, 37)  DQ  OEN =(2 ,2)

 5221 23:10:16.748968  Update DQM dly =709 (2 ,5, 37)  DQM OEN =(2 ,2)

 5222 23:10:16.749076  ==

 5223 23:10:16.752982  Dram Type= 6, Freq= 0, CH_0, rank 0

 5224 23:10:16.756620  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5225 23:10:16.756721  ==

 5226 23:10:16.756811  

 5227 23:10:16.756897  

 5228 23:10:16.759400  	TX Vref Scan disable

 5229 23:10:16.759501   == TX Byte 0 ==

 5230 23:10:16.766166  Update DQ  dly =714 (2 ,6, 10)  DQ  OEN =(2 ,3)

 5231 23:10:16.769821  Update DQM dly =714 (2 ,6, 10)  DQM OEN =(2 ,3)

 5232 23:10:16.769924   == TX Byte 1 ==

 5233 23:10:16.775952  Update DQ  dly =709 (2 ,5, 37)  DQ  OEN =(2 ,2)

 5234 23:10:16.779025  Update DQM dly =709 (2 ,5, 37)  DQM OEN =(2 ,2)

 5235 23:10:16.779125  

 5236 23:10:16.779228  [DATLAT]

 5237 23:10:16.782679  Freq=933, CH0 RK0

 5238 23:10:16.782812  

 5239 23:10:16.782933  DATLAT Default: 0xd

 5240 23:10:16.786331  0, 0xFFFF, sum = 0

 5241 23:10:16.786465  1, 0xFFFF, sum = 0

 5242 23:10:16.789200  2, 0xFFFF, sum = 0

 5243 23:10:16.789299  3, 0xFFFF, sum = 0

 5244 23:10:16.792731  4, 0xFFFF, sum = 0

 5245 23:10:16.792805  5, 0xFFFF, sum = 0

 5246 23:10:16.796026  6, 0xFFFF, sum = 0

 5247 23:10:16.796110  7, 0xFFFF, sum = 0

 5248 23:10:16.799149  8, 0xFFFF, sum = 0

 5249 23:10:16.802483  9, 0xFFFF, sum = 0

 5250 23:10:16.802566  10, 0x0, sum = 1

 5251 23:10:16.802631  11, 0x0, sum = 2

 5252 23:10:16.806305  12, 0x0, sum = 3

 5253 23:10:16.806387  13, 0x0, sum = 4

 5254 23:10:16.809252  best_step = 11

 5255 23:10:16.809341  

 5256 23:10:16.809406  ==

 5257 23:10:16.812392  Dram Type= 6, Freq= 0, CH_0, rank 0

 5258 23:10:16.816021  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5259 23:10:16.816103  ==

 5260 23:10:16.819612  RX Vref Scan: 1

 5261 23:10:16.819706  

 5262 23:10:16.819772  RX Vref 0 -> 0, step: 1

 5263 23:10:16.819833  

 5264 23:10:16.822718  RX Delay -61 -> 252, step: 4

 5265 23:10:16.822796  

 5266 23:10:16.825973  Set Vref, RX VrefLevel [Byte0]: 55

 5267 23:10:16.829289                           [Byte1]: 51

 5268 23:10:16.833453  

 5269 23:10:16.833540  Final RX Vref Byte 0 = 55 to rank0

 5270 23:10:16.836513  Final RX Vref Byte 1 = 51 to rank0

 5271 23:10:16.840086  Final RX Vref Byte 0 = 55 to rank1

 5272 23:10:16.843767  Final RX Vref Byte 1 = 51 to rank1==

 5273 23:10:16.846815  Dram Type= 6, Freq= 0, CH_0, rank 0

 5274 23:10:16.853251  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5275 23:10:16.853356  ==

 5276 23:10:16.853450  DQS Delay:

 5277 23:10:16.853573  DQS0 = 0, DQS1 = 0

 5278 23:10:16.857226  DQM Delay:

 5279 23:10:16.857328  DQM0 = 97, DQM1 = 89

 5280 23:10:16.859855  DQ Delay:

 5281 23:10:16.863178  DQ0 =98, DQ1 =98, DQ2 =92, DQ3 =94

 5282 23:10:16.866774  DQ4 =98, DQ5 =88, DQ6 =106, DQ7 =104

 5283 23:10:16.870374  DQ8 =78, DQ9 =78, DQ10 =90, DQ11 =80

 5284 23:10:16.873055  DQ12 =96, DQ13 =92, DQ14 =100, DQ15 =100

 5285 23:10:16.873158  

 5286 23:10:16.873236  

 5287 23:10:16.880145  [DQSOSCAuto] RK0, (LSB)MR18= 0x11fc, (MSB)MR19= 0x504, tDQSOscB0 = 423 ps tDQSOscB1 = 416 ps

 5288 23:10:16.883469  CH0 RK0: MR19=504, MR18=11FC

 5289 23:10:16.889921  CH0_RK0: MR19=0x504, MR18=0x11FC, DQSOSC=416, MR23=63, INC=62, DEC=41

 5290 23:10:16.890004  

 5291 23:10:16.893378  ----->DramcWriteLeveling(PI) begin...

 5292 23:10:16.893460  ==

 5293 23:10:16.896669  Dram Type= 6, Freq= 0, CH_0, rank 1

 5294 23:10:16.900440  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5295 23:10:16.900521  ==

 5296 23:10:16.904012  Write leveling (Byte 0): 30 => 30

 5297 23:10:16.906433  Write leveling (Byte 1): 27 => 27

 5298 23:10:16.910171  DramcWriteLeveling(PI) end<-----

 5299 23:10:16.910252  

 5300 23:10:16.910315  ==

 5301 23:10:16.913466  Dram Type= 6, Freq= 0, CH_0, rank 1

 5302 23:10:16.916905  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5303 23:10:16.916999  ==

 5304 23:10:16.920321  [Gating] SW mode calibration

 5305 23:10:16.926731  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0

 5306 23:10:16.933565  RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)

 5307 23:10:16.936888   0 14  0 | B1->B0 | 2929 3434 | 0 1 | (0 0) (1 1)

 5308 23:10:16.940021   0 14  4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5309 23:10:16.947061   0 14  8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5310 23:10:16.950280   0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5311 23:10:16.953470   0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5312 23:10:16.960025   0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)

 5313 23:10:16.963452   0 14 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)

 5314 23:10:16.967058   0 14 28 | B1->B0 | 3333 2f2f | 0 1 | (0 0) (1 0)

 5315 23:10:16.973370   0 15  0 | B1->B0 | 2d2d 2323 | 0 0 | (1 0) (0 0)

 5316 23:10:16.976549   0 15  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5317 23:10:16.979817   0 15  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5318 23:10:16.987080   0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5319 23:10:16.989825   0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5320 23:10:16.993426   0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5321 23:10:17.000109   0 15 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5322 23:10:17.003166   0 15 28 | B1->B0 | 2727 3636 | 0 0 | (0 0) (0 0)

 5323 23:10:17.006582   1  0  0 | B1->B0 | 3737 4646 | 0 0 | (1 1) (0 0)

 5324 23:10:17.013437   1  0  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5325 23:10:17.016633   1  0  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5326 23:10:17.019947   1  0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5327 23:10:17.023252   1  0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5328 23:10:17.029854   1  0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5329 23:10:17.033334   1  0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 5330 23:10:17.037027   1  0 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 5331 23:10:17.043161   1  1  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 1)

 5332 23:10:17.046805   1  1  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5333 23:10:17.050125   1  1  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5334 23:10:17.056903   1  1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5335 23:10:17.060156   1  1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5336 23:10:17.063379   1  1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5337 23:10:17.070176   1  1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5338 23:10:17.073528   1  1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5339 23:10:17.077668   1  2  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5340 23:10:17.083002   1  2  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5341 23:10:17.086588   1  2  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5342 23:10:17.090197   1  2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5343 23:10:17.097116   1  2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5344 23:10:17.100352   1  2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5345 23:10:17.103044   1  2 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)

 5346 23:10:17.110003   1  2 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

 5347 23:10:17.113609   1  3  0 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)

 5348 23:10:17.117110  Total UI for P1: 0, mck2ui 16

 5349 23:10:17.119979  best dqsien dly found for B0: ( 1,  2, 26)

 5350 23:10:17.123313   1  3  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5351 23:10:17.126617  Total UI for P1: 0, mck2ui 16

 5352 23:10:17.129676  best dqsien dly found for B1: ( 1,  3,  0)

 5353 23:10:17.133196  best DQS0 dly(MCK, UI, PI) = (1, 2, 26)

 5354 23:10:17.136916  best DQS1 dly(MCK, UI, PI) = (1, 3, 0)

 5355 23:10:17.136998  

 5356 23:10:17.140292  best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 26)

 5357 23:10:17.143402  best DQS1 P1 dly(MCK, UI, PI) = (1, 7, 0)

 5358 23:10:17.146321  [Gating] SW calibration Done

 5359 23:10:17.146413  ==

 5360 23:10:17.149836  Dram Type= 6, Freq= 0, CH_0, rank 1

 5361 23:10:17.156861  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5362 23:10:17.156949  ==

 5363 23:10:17.157016  RX Vref Scan: 0

 5364 23:10:17.157077  

 5365 23:10:17.159773  RX Vref 0 -> 0, step: 1

 5366 23:10:17.159855  

 5367 23:10:17.163273  RX Delay -80 -> 252, step: 8

 5368 23:10:17.166315  iDelay=208, Bit 0, Center 99 (0 ~ 199) 200

 5369 23:10:17.169729  iDelay=208, Bit 1, Center 99 (0 ~ 199) 200

 5370 23:10:17.173294  iDelay=208, Bit 2, Center 95 (0 ~ 191) 192

 5371 23:10:17.176384  iDelay=208, Bit 3, Center 91 (-8 ~ 191) 200

 5372 23:10:17.179883  iDelay=208, Bit 4, Center 95 (0 ~ 191) 192

 5373 23:10:17.186701  iDelay=208, Bit 5, Center 87 (-8 ~ 183) 192

 5374 23:10:17.189787  iDelay=208, Bit 6, Center 107 (8 ~ 207) 200

 5375 23:10:17.193310  iDelay=208, Bit 7, Center 107 (8 ~ 207) 200

 5376 23:10:17.196394  iDelay=208, Bit 8, Center 83 (-8 ~ 175) 184

 5377 23:10:17.200017  iDelay=208, Bit 9, Center 79 (-16 ~ 175) 192

 5378 23:10:17.203096  iDelay=208, Bit 10, Center 87 (-8 ~ 183) 192

 5379 23:10:17.209865  iDelay=208, Bit 11, Center 83 (-8 ~ 175) 184

 5380 23:10:17.213409  iDelay=208, Bit 12, Center 91 (0 ~ 183) 184

 5381 23:10:17.216173  iDelay=208, Bit 13, Center 95 (0 ~ 191) 192

 5382 23:10:17.220146  iDelay=208, Bit 14, Center 95 (0 ~ 191) 192

 5383 23:10:17.222881  iDelay=208, Bit 15, Center 95 (0 ~ 191) 192

 5384 23:10:17.222987  ==

 5385 23:10:17.226566  Dram Type= 6, Freq= 0, CH_0, rank 1

 5386 23:10:17.233337  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5387 23:10:17.233445  ==

 5388 23:10:17.233550  DQS Delay:

 5389 23:10:17.236189  DQS0 = 0, DQS1 = 0

 5390 23:10:17.236291  DQM Delay:

 5391 23:10:17.236383  DQM0 = 97, DQM1 = 88

 5392 23:10:17.239633  DQ Delay:

 5393 23:10:17.242853  DQ0 =99, DQ1 =99, DQ2 =95, DQ3 =91

 5394 23:10:17.246577  DQ4 =95, DQ5 =87, DQ6 =107, DQ7 =107

 5395 23:10:17.249588  DQ8 =83, DQ9 =79, DQ10 =87, DQ11 =83

 5396 23:10:17.252975  DQ12 =91, DQ13 =95, DQ14 =95, DQ15 =95

 5397 23:10:17.253078  

 5398 23:10:17.253174  

 5399 23:10:17.253272  ==

 5400 23:10:17.256591  Dram Type= 6, Freq= 0, CH_0, rank 1

 5401 23:10:17.260066  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5402 23:10:17.260170  ==

 5403 23:10:17.260263  

 5404 23:10:17.260356  

 5405 23:10:17.263154  	TX Vref Scan disable

 5406 23:10:17.263232   == TX Byte 0 ==

 5407 23:10:17.270210  Update DQ  dly =714 (2 ,6, 10)  DQ  OEN =(2 ,3)

 5408 23:10:17.273229  Update DQM dly =714 (2 ,6, 10)  DQM OEN =(2 ,3)

 5409 23:10:17.273335   == TX Byte 1 ==

 5410 23:10:17.279986  Update DQ  dly =709 (2 ,5, 37)  DQ  OEN =(2 ,2)

 5411 23:10:17.283219  Update DQM dly =709 (2 ,5, 37)  DQM OEN =(2 ,2)

 5412 23:10:17.283296  ==

 5413 23:10:17.286816  Dram Type= 6, Freq= 0, CH_0, rank 1

 5414 23:10:17.289817  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5415 23:10:17.289896  ==

 5416 23:10:17.289961  

 5417 23:10:17.293560  

 5418 23:10:17.293636  	TX Vref Scan disable

 5419 23:10:17.296273   == TX Byte 0 ==

 5420 23:10:17.299750  Update DQ  dly =713 (2 ,5, 41)  DQ  OEN =(2 ,2)

 5421 23:10:17.303063  Update DQM dly =713 (2 ,5, 41)  DQM OEN =(2 ,2)

 5422 23:10:17.306511   == TX Byte 1 ==

 5423 23:10:17.309951  Update DQ  dly =709 (2 ,5, 37)  DQ  OEN =(2 ,2)

 5424 23:10:17.312883  Update DQM dly =709 (2 ,5, 37)  DQM OEN =(2 ,2)

 5425 23:10:17.316544  

 5426 23:10:17.316657  [DATLAT]

 5427 23:10:17.316751  Freq=933, CH0 RK1

 5428 23:10:17.316841  

 5429 23:10:17.320577  DATLAT Default: 0xb

 5430 23:10:17.320689  0, 0xFFFF, sum = 0

 5431 23:10:17.323166  1, 0xFFFF, sum = 0

 5432 23:10:17.323241  2, 0xFFFF, sum = 0

 5433 23:10:17.326879  3, 0xFFFF, sum = 0

 5434 23:10:17.326986  4, 0xFFFF, sum = 0

 5435 23:10:17.330003  5, 0xFFFF, sum = 0

 5436 23:10:17.330113  6, 0xFFFF, sum = 0

 5437 23:10:17.333417  7, 0xFFFF, sum = 0

 5438 23:10:17.333522  8, 0xFFFF, sum = 0

 5439 23:10:17.336479  9, 0xFFFF, sum = 0

 5440 23:10:17.336586  10, 0x0, sum = 1

 5441 23:10:17.340064  11, 0x0, sum = 2

 5442 23:10:17.340172  12, 0x0, sum = 3

 5443 23:10:17.343386  13, 0x0, sum = 4

 5444 23:10:17.343462  best_step = 11

 5445 23:10:17.343529  

 5446 23:10:17.343605  ==

 5447 23:10:17.346224  Dram Type= 6, Freq= 0, CH_0, rank 1

 5448 23:10:17.353144  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5449 23:10:17.353251  ==

 5450 23:10:17.353346  RX Vref Scan: 0

 5451 23:10:17.353435  

 5452 23:10:17.356290  RX Vref 0 -> 0, step: 1

 5453 23:10:17.356364  

 5454 23:10:17.359919  RX Delay -61 -> 252, step: 4

 5455 23:10:17.363532  iDelay=199, Bit 0, Center 96 (3 ~ 190) 188

 5456 23:10:17.366163  iDelay=199, Bit 1, Center 98 (3 ~ 194) 192

 5457 23:10:17.372968  iDelay=199, Bit 2, Center 94 (3 ~ 186) 184

 5458 23:10:17.376469  iDelay=199, Bit 3, Center 94 (-5 ~ 194) 200

 5459 23:10:17.380197  iDelay=199, Bit 4, Center 94 (3 ~ 186) 184

 5460 23:10:17.383395  iDelay=199, Bit 5, Center 86 (-5 ~ 178) 184

 5461 23:10:17.386255  iDelay=199, Bit 6, Center 104 (11 ~ 198) 188

 5462 23:10:17.390204  iDelay=199, Bit 7, Center 104 (11 ~ 198) 188

 5463 23:10:17.396428  iDelay=199, Bit 8, Center 80 (-9 ~ 170) 180

 5464 23:10:17.399824  iDelay=199, Bit 9, Center 80 (-9 ~ 170) 180

 5465 23:10:17.403388  iDelay=199, Bit 10, Center 88 (-1 ~ 178) 180

 5466 23:10:17.406172  iDelay=199, Bit 11, Center 78 (-9 ~ 166) 176

 5467 23:10:17.409858  iDelay=199, Bit 12, Center 92 (3 ~ 182) 180

 5468 23:10:17.413252  iDelay=199, Bit 13, Center 94 (7 ~ 182) 176

 5469 23:10:17.419999  iDelay=199, Bit 14, Center 98 (11 ~ 186) 176

 5470 23:10:17.423306  iDelay=199, Bit 15, Center 94 (7 ~ 182) 176

 5471 23:10:17.423386  ==

 5472 23:10:17.426015  Dram Type= 6, Freq= 0, CH_0, rank 1

 5473 23:10:17.429828  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5474 23:10:17.429907  ==

 5475 23:10:17.433160  DQS Delay:

 5476 23:10:17.433262  DQS0 = 0, DQS1 = 0

 5477 23:10:17.433365  DQM Delay:

 5478 23:10:17.436333  DQM0 = 96, DQM1 = 88

 5479 23:10:17.436427  DQ Delay:

 5480 23:10:17.439877  DQ0 =96, DQ1 =98, DQ2 =94, DQ3 =94

 5481 23:10:17.442819  DQ4 =94, DQ5 =86, DQ6 =104, DQ7 =104

 5482 23:10:17.447676  DQ8 =80, DQ9 =80, DQ10 =88, DQ11 =78

 5483 23:10:17.449485  DQ12 =92, DQ13 =94, DQ14 =98, DQ15 =94

 5484 23:10:17.449593  

 5485 23:10:17.449661  

 5486 23:10:17.459807  [DQSOSCAuto] RK1, (LSB)MR18= 0x1906, (MSB)MR19= 0x505, tDQSOscB0 = 420 ps tDQSOscB1 = 413 ps

 5487 23:10:17.459894  CH0 RK1: MR19=505, MR18=1906

 5488 23:10:17.466036  CH0_RK1: MR19=0x505, MR18=0x1906, DQSOSC=413, MR23=63, INC=63, DEC=42

 5489 23:10:17.469199  [RxdqsGatingPostProcess] freq 933

 5490 23:10:17.476060  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2

 5491 23:10:17.479619  best DQS0 dly(2T, 0.5T) = (0, 10)

 5492 23:10:17.482812  best DQS1 dly(2T, 0.5T) = (0, 10)

 5493 23:10:17.485896  best DQS0 P1 dly(2T, 0.5T) = (0, 14)

 5494 23:10:17.489393  best DQS1 P1 dly(2T, 0.5T) = (0, 14)

 5495 23:10:17.492548  best DQS0 dly(2T, 0.5T) = (0, 10)

 5496 23:10:17.496238  best DQS1 dly(2T, 0.5T) = (0, 11)

 5497 23:10:17.499048  best DQS0 P1 dly(2T, 0.5T) = (0, 14)

 5498 23:10:17.502738  best DQS1 P1 dly(2T, 0.5T) = (0, 15)

 5499 23:10:17.502823  Pre-setting of DQS Precalculation

 5500 23:10:17.509178  [DualRankRxdatlatCal] RK0: 11, RK1: 11, Final_Datlat 11

 5501 23:10:17.509258  ==

 5502 23:10:17.512699  Dram Type= 6, Freq= 0, CH_1, rank 0

 5503 23:10:17.516305  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5504 23:10:17.516383  ==

 5505 23:10:17.522590  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 5506 23:10:17.529316  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35

 5507 23:10:17.533204  [CA 0] Center 36 (6~67) winsize 62

 5508 23:10:17.536124  [CA 1] Center 36 (6~67) winsize 62

 5509 23:10:17.539426  [CA 2] Center 34 (4~64) winsize 61

 5510 23:10:17.542874  [CA 3] Center 33 (3~64) winsize 62

 5511 23:10:17.546296  [CA 4] Center 34 (3~65) winsize 63

 5512 23:10:17.549399  [CA 5] Center 33 (3~64) winsize 62

 5513 23:10:17.549504  

 5514 23:10:17.552670  [CmdBusTrainingLP45] Vref(ca) range 1: 35

 5515 23:10:17.552749  

 5516 23:10:17.556690  [CATrainingPosCal] consider 1 rank data

 5517 23:10:17.559900  u2DelayCellTimex100 = 270/100 ps

 5518 23:10:17.562620  CA0 delay=36 (6~67),Diff = 3 PI (18 cell)

 5519 23:10:17.566945  CA1 delay=36 (6~67),Diff = 3 PI (18 cell)

 5520 23:10:17.570032  CA2 delay=34 (4~64),Diff = 1 PI (6 cell)

 5521 23:10:17.572712  CA3 delay=33 (3~64),Diff = 0 PI (0 cell)

 5522 23:10:17.576744  CA4 delay=34 (3~65),Diff = 1 PI (6 cell)

 5523 23:10:17.579373  CA5 delay=33 (3~64),Diff = 0 PI (0 cell)

 5524 23:10:17.579457  

 5525 23:10:17.582830  CA PerBit enable=1, Macro0, CA PI delay=33

 5526 23:10:17.582909  

 5527 23:10:17.586533  [CBTSetCACLKResult] CA Dly = 33

 5528 23:10:17.589438  CS Dly: 4 (0~35)

 5529 23:10:17.589521  ==

 5530 23:10:17.592930  Dram Type= 6, Freq= 0, CH_1, rank 1

 5531 23:10:17.596137  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5532 23:10:17.596250  ==

 5533 23:10:17.603238  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 5534 23:10:17.610053  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=33, u1VrefScanEnd=33

 5535 23:10:17.613088  [CA 0] Center 36 (6~67) winsize 62

 5536 23:10:17.616315  [CA 1] Center 36 (6~67) winsize 62

 5537 23:10:17.619779  [CA 2] Center 34 (4~64) winsize 61

 5538 23:10:17.623564  [CA 3] Center 33 (3~64) winsize 62

 5539 23:10:17.626224  [CA 4] Center 33 (3~64) winsize 62

 5540 23:10:17.626330  [CA 5] Center 33 (3~63) winsize 61

 5541 23:10:17.626456  

 5542 23:10:17.633380  [CmdBusTrainingLP45] Vref(ca) range 1: 33

 5543 23:10:17.633461  

 5544 23:10:17.636358  [CATrainingPosCal] consider 2 rank data

 5545 23:10:17.639479  u2DelayCellTimex100 = 270/100 ps

 5546 23:10:17.643127  CA0 delay=36 (6~67),Diff = 3 PI (18 cell)

 5547 23:10:17.646630  CA1 delay=36 (6~67),Diff = 3 PI (18 cell)

 5548 23:10:17.650616  CA2 delay=34 (4~64),Diff = 1 PI (6 cell)

 5549 23:10:17.652848  CA3 delay=33 (3~64),Diff = 0 PI (0 cell)

 5550 23:10:17.656275  CA4 delay=33 (3~64),Diff = 0 PI (0 cell)

 5551 23:10:17.659459  CA5 delay=33 (3~63),Diff = 0 PI (0 cell)

 5552 23:10:17.659560  

 5553 23:10:17.663199  CA PerBit enable=1, Macro0, CA PI delay=33

 5554 23:10:17.663308  

 5555 23:10:17.666344  [CBTSetCACLKResult] CA Dly = 33

 5556 23:10:17.670042  CS Dly: 5 (0~38)

 5557 23:10:17.670243  

 5558 23:10:17.672885  ----->DramcWriteLeveling(PI) begin...

 5559 23:10:17.673000  ==

 5560 23:10:17.676947  Dram Type= 6, Freq= 0, CH_1, rank 0

 5561 23:10:17.679805  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5562 23:10:17.679918  ==

 5563 23:10:17.682949  Write leveling (Byte 0): 24 => 24

 5564 23:10:17.686788  Write leveling (Byte 1): 28 => 28

 5565 23:10:17.690342  DramcWriteLeveling(PI) end<-----

 5566 23:10:17.690459  

 5567 23:10:17.690561  ==

 5568 23:10:17.693082  Dram Type= 6, Freq= 0, CH_1, rank 0

 5569 23:10:17.696360  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5570 23:10:17.696462  ==

 5571 23:10:17.699929  [Gating] SW mode calibration

 5572 23:10:17.706257  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0

 5573 23:10:17.713158  RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)

 5574 23:10:17.716374   0 14  0 | B1->B0 | 2e2e 2f2f | 0 1 | (0 0) (1 1)

 5575 23:10:17.719998   0 14  4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5576 23:10:17.726329   0 14  8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5577 23:10:17.729931   0 14 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5578 23:10:17.733335   0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5579 23:10:17.739531   0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5580 23:10:17.742806   0 14 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5581 23:10:17.746140   0 14 28 | B1->B0 | 2f2f 2f2f | 0 0 | (1 1) (0 1)

 5582 23:10:17.753011   0 15  0 | B1->B0 | 2626 2929 | 0 0 | (1 0) (0 0)

 5583 23:10:17.756680   0 15  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5584 23:10:17.760113   0 15  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5585 23:10:17.766401   0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5586 23:10:17.769805   0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5587 23:10:17.773187   0 15 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5588 23:10:17.780288   0 15 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5589 23:10:17.783148   0 15 28 | B1->B0 | 2f2f 2c2c | 0 0 | (0 0) (0 0)

 5590 23:10:17.786610   1  0  0 | B1->B0 | 4545 4444 | 0 0 | (0 0) (0 0)

 5591 23:10:17.789821   1  0  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5592 23:10:17.796556   1  0  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5593 23:10:17.799446   1  0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5594 23:10:17.802874   1  0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5595 23:10:17.809685   1  0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5596 23:10:17.814072   1  0 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)

 5597 23:10:17.816448   1  0 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 0)

 5598 23:10:17.823436   1  1  0 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)

 5599 23:10:17.827037   1  1  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5600 23:10:17.830254   1  1  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5601 23:10:17.836189   1  1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5602 23:10:17.840171   1  1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5603 23:10:17.843379   1  1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5604 23:10:17.849976   1  1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5605 23:10:17.853446   1  1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5606 23:10:17.856589   1  2  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5607 23:10:17.863211   1  2  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5608 23:10:17.866517   1  2  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5609 23:10:17.869964   1  2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5610 23:10:17.876767   1  2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5611 23:10:17.879950   1  2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5612 23:10:17.883310   1  2 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5613 23:10:17.889776   1  2 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)

 5614 23:10:17.893085   1  3  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5615 23:10:17.896707  Total UI for P1: 0, mck2ui 16

 5616 23:10:17.899505  best dqsien dly found for B0: ( 1,  2, 28)

 5617 23:10:17.903097  Total UI for P1: 0, mck2ui 16

 5618 23:10:17.906292  best dqsien dly found for B1: ( 1,  2, 28)

 5619 23:10:17.909727  best DQS0 dly(MCK, UI, PI) = (1, 2, 28)

 5620 23:10:17.913341  best DQS1 dly(MCK, UI, PI) = (1, 2, 28)

 5621 23:10:17.913441  

 5622 23:10:17.916799  best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 28)

 5623 23:10:17.919768  best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 28)

 5624 23:10:17.922976  [Gating] SW calibration Done

 5625 23:10:17.923061  ==

 5626 23:10:17.925994  Dram Type= 6, Freq= 0, CH_1, rank 0

 5627 23:10:17.929665  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5628 23:10:17.929748  ==

 5629 23:10:17.933367  RX Vref Scan: 0

 5630 23:10:17.933476  

 5631 23:10:17.933569  RX Vref 0 -> 0, step: 1

 5632 23:10:17.936436  

 5633 23:10:17.936543  RX Delay -80 -> 252, step: 8

 5634 23:10:17.943957  iDelay=208, Bit 0, Center 99 (8 ~ 191) 184

 5635 23:10:17.946153  iDelay=208, Bit 1, Center 95 (0 ~ 191) 192

 5636 23:10:17.949720  iDelay=208, Bit 2, Center 83 (-8 ~ 175) 184

 5637 23:10:17.952678  iDelay=208, Bit 3, Center 95 (0 ~ 191) 192

 5638 23:10:17.956351  iDelay=208, Bit 4, Center 95 (0 ~ 191) 192

 5639 23:10:17.959528  iDelay=208, Bit 5, Center 107 (8 ~ 207) 200

 5640 23:10:17.963080  iDelay=208, Bit 6, Center 107 (16 ~ 199) 184

 5641 23:10:17.970291  iDelay=208, Bit 7, Center 91 (-8 ~ 191) 200

 5642 23:10:17.973292  iDelay=208, Bit 8, Center 79 (-16 ~ 175) 192

 5643 23:10:17.976782  iDelay=208, Bit 9, Center 79 (-16 ~ 175) 192

 5644 23:10:17.979936  iDelay=208, Bit 10, Center 87 (-8 ~ 183) 192

 5645 23:10:17.983083  iDelay=208, Bit 11, Center 83 (-16 ~ 183) 200

 5646 23:10:17.986394  iDelay=208, Bit 12, Center 95 (0 ~ 191) 192

 5647 23:10:17.993386  iDelay=208, Bit 13, Center 95 (0 ~ 191) 192

 5648 23:10:17.996349  iDelay=208, Bit 14, Center 95 (0 ~ 191) 192

 5649 23:10:18.000195  iDelay=208, Bit 15, Center 95 (0 ~ 191) 192

 5650 23:10:18.000294  ==

 5651 23:10:18.003135  Dram Type= 6, Freq= 0, CH_1, rank 0

 5652 23:10:18.006704  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5653 23:10:18.006787  ==

 5654 23:10:18.010083  DQS Delay:

 5655 23:10:18.010183  DQS0 = 0, DQS1 = 0

 5656 23:10:18.013373  DQM Delay:

 5657 23:10:18.013472  DQM0 = 96, DQM1 = 88

 5658 23:10:18.013570  DQ Delay:

 5659 23:10:18.016959  DQ0 =99, DQ1 =95, DQ2 =83, DQ3 =95

 5660 23:10:18.019946  DQ4 =95, DQ5 =107, DQ6 =107, DQ7 =91

 5661 23:10:18.023589  DQ8 =79, DQ9 =79, DQ10 =87, DQ11 =83

 5662 23:10:18.026537  DQ12 =95, DQ13 =95, DQ14 =95, DQ15 =95

 5663 23:10:18.026638  

 5664 23:10:18.026767  

 5665 23:10:18.026874  ==

 5666 23:10:18.029720  Dram Type= 6, Freq= 0, CH_1, rank 0

 5667 23:10:18.036670  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5668 23:10:18.036754  ==

 5669 23:10:18.036865  

 5670 23:10:18.036955  

 5671 23:10:18.037041  	TX Vref Scan disable

 5672 23:10:18.040432   == TX Byte 0 ==

 5673 23:10:18.043653  Update DQ  dly =708 (2 ,5, 36)  DQ  OEN =(2 ,2)

 5674 23:10:18.047269  Update DQM dly =708 (2 ,5, 36)  DQM OEN =(2 ,2)

 5675 23:10:18.050950   == TX Byte 1 ==

 5676 23:10:18.053743  Update DQ  dly =710 (2 ,5, 38)  DQ  OEN =(2 ,2)

 5677 23:10:18.060361  Update DQM dly =710 (2 ,5, 38)  DQM OEN =(2 ,2)

 5678 23:10:18.060445  ==

 5679 23:10:18.064293  Dram Type= 6, Freq= 0, CH_1, rank 0

 5680 23:10:18.066975  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5681 23:10:18.067058  ==

 5682 23:10:18.067124  

 5683 23:10:18.067186  

 5684 23:10:18.070849  	TX Vref Scan disable

 5685 23:10:18.070931   == TX Byte 0 ==

 5686 23:10:18.076990  Update DQ  dly =708 (2 ,5, 36)  DQ  OEN =(2 ,2)

 5687 23:10:18.080353  Update DQM dly =708 (2 ,5, 36)  DQM OEN =(2 ,2)

 5688 23:10:18.080430   == TX Byte 1 ==

 5689 23:10:18.086921  Update DQ  dly =710 (2 ,5, 38)  DQ  OEN =(2 ,2)

 5690 23:10:18.090235  Update DQM dly =710 (2 ,5, 38)  DQM OEN =(2 ,2)

 5691 23:10:18.090338  

 5692 23:10:18.090449  [DATLAT]

 5693 23:10:18.093705  Freq=933, CH1 RK0

 5694 23:10:18.093778  

 5695 23:10:18.093847  DATLAT Default: 0xd

 5696 23:10:18.097081  0, 0xFFFF, sum = 0

 5697 23:10:18.097163  1, 0xFFFF, sum = 0

 5698 23:10:18.100365  2, 0xFFFF, sum = 0

 5699 23:10:18.100450  3, 0xFFFF, sum = 0

 5700 23:10:18.103726  4, 0xFFFF, sum = 0

 5701 23:10:18.103803  5, 0xFFFF, sum = 0

 5702 23:10:18.107336  6, 0xFFFF, sum = 0

 5703 23:10:18.107419  7, 0xFFFF, sum = 0

 5704 23:10:18.110930  8, 0xFFFF, sum = 0

 5705 23:10:18.111012  9, 0xFFFF, sum = 0

 5706 23:10:18.113783  10, 0x0, sum = 1

 5707 23:10:18.113858  11, 0x0, sum = 2

 5708 23:10:18.117259  12, 0x0, sum = 3

 5709 23:10:18.117339  13, 0x0, sum = 4

 5710 23:10:18.120431  best_step = 11

 5711 23:10:18.120505  

 5712 23:10:18.120576  ==

 5713 23:10:18.123422  Dram Type= 6, Freq= 0, CH_1, rank 0

 5714 23:10:18.126854  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5715 23:10:18.126929  ==

 5716 23:10:18.130496  RX Vref Scan: 1

 5717 23:10:18.130568  

 5718 23:10:18.130629  RX Vref 0 -> 0, step: 1

 5719 23:10:18.130688  

 5720 23:10:18.133451  RX Delay -61 -> 252, step: 4

 5721 23:10:18.133524  

 5722 23:10:18.137720  Set Vref, RX VrefLevel [Byte0]: 62

 5723 23:10:18.140171                           [Byte1]: 53

 5724 23:10:18.144540  

 5725 23:10:18.144623  Final RX Vref Byte 0 = 62 to rank0

 5726 23:10:18.147766  Final RX Vref Byte 1 = 53 to rank0

 5727 23:10:18.151210  Final RX Vref Byte 0 = 62 to rank1

 5728 23:10:18.154716  Final RX Vref Byte 1 = 53 to rank1==

 5729 23:10:18.157606  Dram Type= 6, Freq= 0, CH_1, rank 0

 5730 23:10:18.164287  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5731 23:10:18.164376  ==

 5732 23:10:18.164443  DQS Delay:

 5733 23:10:18.164503  DQS0 = 0, DQS1 = 0

 5734 23:10:18.167760  DQM Delay:

 5735 23:10:18.167842  DQM0 = 98, DQM1 = 91

 5736 23:10:18.171452  DQ Delay:

 5737 23:10:18.174591  DQ0 =102, DQ1 =92, DQ2 =88, DQ3 =98

 5738 23:10:18.177781  DQ4 =96, DQ5 =106, DQ6 =110, DQ7 =94

 5739 23:10:18.181545  DQ8 =78, DQ9 =78, DQ10 =90, DQ11 =88

 5740 23:10:18.184267  DQ12 =98, DQ13 =100, DQ14 =98, DQ15 =98

 5741 23:10:18.184349  

 5742 23:10:18.184413  

 5743 23:10:18.190889  [DQSOSCAuto] RK0, (LSB)MR18= 0x15f2, (MSB)MR19= 0x504, tDQSOscB0 = 426 ps tDQSOscB1 = 415 ps

 5744 23:10:18.194551  CH1 RK0: MR19=504, MR18=15F2

 5745 23:10:18.201735  CH1_RK0: MR19=0x504, MR18=0x15F2, DQSOSC=415, MR23=63, INC=62, DEC=41

 5746 23:10:18.201835  

 5747 23:10:18.204888  ----->DramcWriteLeveling(PI) begin...

 5748 23:10:18.204971  ==

 5749 23:10:18.208691  Dram Type= 6, Freq= 0, CH_1, rank 1

 5750 23:10:18.211693  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5751 23:10:18.211777  ==

 5752 23:10:18.215150  Write leveling (Byte 0): 28 => 28

 5753 23:10:18.218210  Write leveling (Byte 1): 28 => 28

 5754 23:10:18.221591  DramcWriteLeveling(PI) end<-----

 5755 23:10:18.221696  

 5756 23:10:18.221764  ==

 5757 23:10:18.224817  Dram Type= 6, Freq= 0, CH_1, rank 1

 5758 23:10:18.228101  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5759 23:10:18.228213  ==

 5760 23:10:18.231907  [Gating] SW mode calibration

 5761 23:10:18.237951  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 22 , u4TDQSCK_UI_min 2, 1:4ExtraMCK 0

 5762 23:10:18.244645  RX_Path_delay_UI(38) -3 - DQSINCTL_UI(24) = u1StartUI(14)

 5763 23:10:18.248064   0 14  0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5764 23:10:18.252098   0 14  4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5765 23:10:18.258069   0 14  8 | B1->B0 | 3534 3434 | 1 1 | (0 0) (1 1)

 5766 23:10:18.261651   0 14 12 | B1->B0 | 3535 3434 | 0 1 | (0 0) (1 1)

 5767 23:10:18.264650   0 14 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 5768 23:10:18.271396   0 14 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)

 5769 23:10:18.274972   0 14 24 | B1->B0 | 3333 3030 | 0 0 | (0 1) (0 1)

 5770 23:10:18.277771   0 14 28 | B1->B0 | 2525 2323 | 0 0 | (0 0) (0 0)

 5771 23:10:18.284526   0 15  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5772 23:10:18.288021   0 15  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5773 23:10:18.291322   0 15  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5774 23:10:18.298157   0 15 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5775 23:10:18.301000   0 15 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 5776 23:10:18.304652   0 15 20 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)

 5777 23:10:18.311513   0 15 24 | B1->B0 | 2727 3434 | 0 0 | (0 0) (1 1)

 5778 23:10:18.314901   0 15 28 | B1->B0 | 4242 4646 | 0 0 | (0 0) (0 0)

 5779 23:10:18.317966   1  0  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5780 23:10:18.321257   1  0  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5781 23:10:18.327823   1  0  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5782 23:10:18.330937   1  0 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5783 23:10:18.334767   1  0 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5784 23:10:18.341150   1  0 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5785 23:10:18.344670   1  0 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 5786 23:10:18.348291   1  0 28 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)

 5787 23:10:18.354817   1  1  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5788 23:10:18.357915   1  1  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5789 23:10:18.361484   1  1  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5790 23:10:18.368155   1  1 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5791 23:10:18.371409   1  1 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5792 23:10:18.374546   1  1 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5793 23:10:18.381693   1  1 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5794 23:10:18.384484   1  1 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5795 23:10:18.388134   1  2  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5796 23:10:18.395013   1  2  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5797 23:10:18.397962   1  2  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5798 23:10:18.401612   1  2 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5799 23:10:18.404770   1  2 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 5800 23:10:18.411592   1  2 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

 5801 23:10:18.414549   1  2 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)

 5802 23:10:18.418258  Total UI for P1: 0, mck2ui 16

 5803 23:10:18.421473  best dqsien dly found for B0: ( 1,  2, 20)

 5804 23:10:18.424569   1  2 28 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)

 5805 23:10:18.431406   1  3  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 5806 23:10:18.431487  Total UI for P1: 0, mck2ui 16

 5807 23:10:18.438098  best dqsien dly found for B1: ( 1,  2, 26)

 5808 23:10:18.441528  best DQS0 dly(MCK, UI, PI) = (1, 2, 20)

 5809 23:10:18.444569  best DQS1 dly(MCK, UI, PI) = (1, 2, 26)

 5810 23:10:18.444646  

 5811 23:10:18.447725  best DQS0 P1 dly(MCK, UI, PI) = (1, 6, 20)

 5812 23:10:18.451339  best DQS1 P1 dly(MCK, UI, PI) = (1, 6, 26)

 5813 23:10:18.454382  [Gating] SW calibration Done

 5814 23:10:18.454470  ==

 5815 23:10:18.458167  Dram Type= 6, Freq= 0, CH_1, rank 1

 5816 23:10:18.461907  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5817 23:10:18.461986  ==

 5818 23:10:18.464901  RX Vref Scan: 0

 5819 23:10:18.464974  

 5820 23:10:18.465038  RX Vref 0 -> 0, step: 1

 5821 23:10:18.465098  

 5822 23:10:18.468208  RX Delay -80 -> 252, step: 8

 5823 23:10:18.471802  iDelay=200, Bit 0, Center 95 (0 ~ 191) 192

 5824 23:10:18.478163  iDelay=200, Bit 1, Center 87 (-8 ~ 183) 192

 5825 23:10:18.481350  iDelay=200, Bit 2, Center 87 (-8 ~ 183) 192

 5826 23:10:18.485030  iDelay=200, Bit 3, Center 95 (0 ~ 191) 192

 5827 23:10:18.488126  iDelay=200, Bit 4, Center 95 (0 ~ 191) 192

 5828 23:10:18.491835  iDelay=200, Bit 5, Center 103 (8 ~ 199) 192

 5829 23:10:18.494549  iDelay=200, Bit 6, Center 103 (8 ~ 199) 192

 5830 23:10:18.498006  iDelay=200, Bit 7, Center 91 (0 ~ 183) 184

 5831 23:10:18.505517  iDelay=200, Bit 8, Center 79 (-16 ~ 175) 192

 5832 23:10:18.508549  iDelay=200, Bit 9, Center 79 (-16 ~ 175) 192

 5833 23:10:18.511563  iDelay=200, Bit 10, Center 91 (-8 ~ 191) 200

 5834 23:10:18.515366  iDelay=200, Bit 11, Center 83 (-8 ~ 175) 184

 5835 23:10:18.518681  iDelay=200, Bit 12, Center 95 (0 ~ 191) 192

 5836 23:10:18.521405  iDelay=200, Bit 13, Center 95 (0 ~ 191) 192

 5837 23:10:18.528667  iDelay=200, Bit 14, Center 95 (0 ~ 191) 192

 5838 23:10:18.531551  iDelay=200, Bit 15, Center 95 (0 ~ 191) 192

 5839 23:10:18.531631  ==

 5840 23:10:18.535001  Dram Type= 6, Freq= 0, CH_1, rank 1

 5841 23:10:18.538476  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5842 23:10:18.538563  ==

 5843 23:10:18.541760  DQS Delay:

 5844 23:10:18.541839  DQS0 = 0, DQS1 = 0

 5845 23:10:18.541911  DQM Delay:

 5846 23:10:18.544874  DQM0 = 94, DQM1 = 89

 5847 23:10:18.544951  DQ Delay:

 5848 23:10:18.548195  DQ0 =95, DQ1 =87, DQ2 =87, DQ3 =95

 5849 23:10:18.551741  DQ4 =95, DQ5 =103, DQ6 =103, DQ7 =91

 5850 23:10:18.554774  DQ8 =79, DQ9 =79, DQ10 =91, DQ11 =83

 5851 23:10:18.558336  DQ12 =95, DQ13 =95, DQ14 =95, DQ15 =95

 5852 23:10:18.558428  

 5853 23:10:18.558495  

 5854 23:10:18.558555  ==

 5855 23:10:18.562024  Dram Type= 6, Freq= 0, CH_1, rank 1

 5856 23:10:18.568497  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5857 23:10:18.568583  ==

 5858 23:10:18.568649  

 5859 23:10:18.568709  

 5860 23:10:18.568768  	TX Vref Scan disable

 5861 23:10:18.571880   == TX Byte 0 ==

 5862 23:10:18.575194  Update DQ  dly =711 (2 ,5, 39)  DQ  OEN =(2 ,2)

 5863 23:10:18.579159  Update DQM dly =711 (2 ,5, 39)  DQM OEN =(2 ,2)

 5864 23:10:18.582148   == TX Byte 1 ==

 5865 23:10:18.585110  Update DQ  dly =710 (2 ,5, 38)  DQ  OEN =(2 ,2)

 5866 23:10:18.588470  Update DQM dly =710 (2 ,5, 38)  DQM OEN =(2 ,2)

 5867 23:10:18.588546  ==

 5868 23:10:18.591929  Dram Type= 6, Freq= 0, CH_1, rank 1

 5869 23:10:18.599209  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5870 23:10:18.599288  ==

 5871 23:10:18.599352  

 5872 23:10:18.599413  

 5873 23:10:18.599480  	TX Vref Scan disable

 5874 23:10:18.603366   == TX Byte 0 ==

 5875 23:10:18.606173  Update DQ  dly =710 (2 ,5, 38)  DQ  OEN =(2 ,2)

 5876 23:10:18.609775  Update DQM dly =710 (2 ,5, 38)  DQM OEN =(2 ,2)

 5877 23:10:18.613444   == TX Byte 1 ==

 5878 23:10:18.616291  Update DQ  dly =710 (2 ,5, 38)  DQ  OEN =(2 ,2)

 5879 23:10:18.619590  Update DQM dly =710 (2 ,5, 38)  DQM OEN =(2 ,2)

 5880 23:10:18.623370  

 5881 23:10:18.623491  [DATLAT]

 5882 23:10:18.623581  Freq=933, CH1 RK1

 5883 23:10:18.623666  

 5884 23:10:18.626619  DATLAT Default: 0xb

 5885 23:10:18.626687  0, 0xFFFF, sum = 0

 5886 23:10:18.629567  1, 0xFFFF, sum = 0

 5887 23:10:18.629640  2, 0xFFFF, sum = 0

 5888 23:10:18.633087  3, 0xFFFF, sum = 0

 5889 23:10:18.633184  4, 0xFFFF, sum = 0

 5890 23:10:18.636344  5, 0xFFFF, sum = 0

 5891 23:10:18.636416  6, 0xFFFF, sum = 0

 5892 23:10:18.639503  7, 0xFFFF, sum = 0

 5893 23:10:18.643039  8, 0xFFFF, sum = 0

 5894 23:10:18.643182  9, 0xFFFF, sum = 0

 5895 23:10:18.646556  10, 0x0, sum = 1

 5896 23:10:18.646640  11, 0x0, sum = 2

 5897 23:10:18.646704  12, 0x0, sum = 3

 5898 23:10:18.649702  13, 0x0, sum = 4

 5899 23:10:18.649778  best_step = 11

 5900 23:10:18.649842  

 5901 23:10:18.649900  ==

 5902 23:10:18.653424  Dram Type= 6, Freq= 0, CH_1, rank 1

 5903 23:10:18.660147  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5904 23:10:18.660226  ==

 5905 23:10:18.660296  RX Vref Scan: 0

 5906 23:10:18.660357  

 5907 23:10:18.663766  RX Vref 0 -> 0, step: 1

 5908 23:10:18.663838  

 5909 23:10:18.666356  RX Delay -61 -> 252, step: 4

 5910 23:10:18.670208  iDelay=195, Bit 0, Center 96 (7 ~ 186) 180

 5911 23:10:18.673193  iDelay=195, Bit 1, Center 90 (-1 ~ 182) 184

 5912 23:10:18.679796  iDelay=195, Bit 2, Center 84 (-5 ~ 174) 180

 5913 23:10:18.683310  iDelay=195, Bit 3, Center 94 (3 ~ 186) 184

 5914 23:10:18.687234  iDelay=195, Bit 4, Center 94 (3 ~ 186) 184

 5915 23:10:18.689916  iDelay=195, Bit 5, Center 104 (15 ~ 194) 180

 5916 23:10:18.693135  iDelay=195, Bit 6, Center 104 (15 ~ 194) 180

 5917 23:10:18.696548  iDelay=195, Bit 7, Center 92 (7 ~ 178) 172

 5918 23:10:18.703252  iDelay=195, Bit 8, Center 80 (-13 ~ 174) 188

 5919 23:10:18.706345  iDelay=195, Bit 9, Center 78 (-13 ~ 170) 184

 5920 23:10:18.710326  iDelay=195, Bit 10, Center 90 (-5 ~ 186) 192

 5921 23:10:18.713103  iDelay=195, Bit 11, Center 84 (-5 ~ 174) 180

 5922 23:10:18.717014  iDelay=195, Bit 12, Center 96 (7 ~ 186) 180

 5923 23:10:18.720105  iDelay=195, Bit 13, Center 96 (3 ~ 190) 188

 5924 23:10:18.726559  iDelay=195, Bit 14, Center 98 (7 ~ 190) 184

 5925 23:10:18.730311  iDelay=195, Bit 15, Center 98 (7 ~ 190) 184

 5926 23:10:18.730459  ==

 5927 23:10:18.733244  Dram Type= 6, Freq= 0, CH_1, rank 1

 5928 23:10:18.736448  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 1

 5929 23:10:18.736525  ==

 5930 23:10:18.740149  DQS Delay:

 5931 23:10:18.740241  DQS0 = 0, DQS1 = 0

 5932 23:10:18.740305  DQM Delay:

 5933 23:10:18.743236  DQM0 = 94, DQM1 = 90

 5934 23:10:18.743313  DQ Delay:

 5935 23:10:18.746731  DQ0 =96, DQ1 =90, DQ2 =84, DQ3 =94

 5936 23:10:18.750415  DQ4 =94, DQ5 =104, DQ6 =104, DQ7 =92

 5937 23:10:18.753745  DQ8 =80, DQ9 =78, DQ10 =90, DQ11 =84

 5938 23:10:18.757098  DQ12 =96, DQ13 =96, DQ14 =98, DQ15 =98

 5939 23:10:18.757173  

 5940 23:10:18.757236  

 5941 23:10:18.766689  [DQSOSCAuto] RK1, (LSB)MR18= 0xe16, (MSB)MR19= 0x505, tDQSOscB0 = 414 ps tDQSOscB1 = 417 ps

 5942 23:10:18.766766  CH1 RK1: MR19=505, MR18=E16

 5943 23:10:18.772936  CH1_RK1: MR19=0x505, MR18=0xE16, DQSOSC=414, MR23=63, INC=63, DEC=42

 5944 23:10:18.776812  [RxdqsGatingPostProcess] freq 933

 5945 23:10:18.783209  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 1, u1TXDLY_Cal_min 2

 5946 23:10:18.786632  best DQS0 dly(2T, 0.5T) = (0, 10)

 5947 23:10:18.789856  best DQS1 dly(2T, 0.5T) = (0, 10)

 5948 23:10:18.793372  best DQS0 P1 dly(2T, 0.5T) = (0, 14)

 5949 23:10:18.796462  best DQS1 P1 dly(2T, 0.5T) = (0, 14)

 5950 23:10:18.796574  best DQS0 dly(2T, 0.5T) = (0, 10)

 5951 23:10:18.799850  best DQS1 dly(2T, 0.5T) = (0, 10)

 5952 23:10:18.803243  best DQS0 P1 dly(2T, 0.5T) = (0, 14)

 5953 23:10:18.806789  best DQS1 P1 dly(2T, 0.5T) = (0, 14)

 5954 23:10:18.809836  Pre-setting of DQS Precalculation

 5955 23:10:18.816346  [DualRankRxdatlatCal] RK0: 11, RK1: 11, Final_Datlat 11

 5956 23:10:18.823402  sync_frequency_calibration_params sync calibration params of frequency 933 to shu:3

 5957 23:10:18.830706  calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464

 5958 23:10:18.830823  

 5959 23:10:18.830904  

 5960 23:10:18.833177  [Calibration Summary] 1866 Mbps

 5961 23:10:18.833288  CH 0, Rank 0

 5962 23:10:18.836707  SW Impedance     : PASS

 5963 23:10:18.840047  DUTY Scan        : NO K

 5964 23:10:18.840157  ZQ Calibration   : PASS

 5965 23:10:18.844147  Jitter Meter     : NO K

 5966 23:10:18.844236  CBT Training     : PASS

 5967 23:10:18.847103  Write leveling   : PASS

 5968 23:10:18.849882  RX DQS gating    : PASS

 5969 23:10:18.850027  RX DQ/DQS(RDDQC) : PASS

 5970 23:10:18.853735  TX DQ/DQS        : PASS

 5971 23:10:18.856659  RX DATLAT        : PASS

 5972 23:10:18.856736  RX DQ/DQS(Engine): PASS

 5973 23:10:18.860042  TX OE            : NO K

 5974 23:10:18.860112  All Pass.

 5975 23:10:18.860173  

 5976 23:10:18.863461  CH 0, Rank 1

 5977 23:10:18.863547  SW Impedance     : PASS

 5978 23:10:18.867434  DUTY Scan        : NO K

 5979 23:10:18.870061  ZQ Calibration   : PASS

 5980 23:10:18.870131  Jitter Meter     : NO K

 5981 23:10:18.873783  CBT Training     : PASS

 5982 23:10:18.877053  Write leveling   : PASS

 5983 23:10:18.877140  RX DQS gating    : PASS

 5984 23:10:18.880182  RX DQ/DQS(RDDQC) : PASS

 5985 23:10:18.883681  TX DQ/DQS        : PASS

 5986 23:10:18.883757  RX DATLAT        : PASS

 5987 23:10:18.887183  RX DQ/DQS(Engine): PASS

 5988 23:10:18.887254  TX OE            : NO K

 5989 23:10:18.890214  All Pass.

 5990 23:10:18.890313  

 5991 23:10:18.890412  CH 1, Rank 0

 5992 23:10:18.893442  SW Impedance     : PASS

 5993 23:10:18.893537  DUTY Scan        : NO K

 5994 23:10:18.896959  ZQ Calibration   : PASS

 5995 23:10:18.900777  Jitter Meter     : NO K

 5996 23:10:18.900857  CBT Training     : PASS

 5997 23:10:18.903738  Write leveling   : PASS

 5998 23:10:18.906962  RX DQS gating    : PASS

 5999 23:10:18.907039  RX DQ/DQS(RDDQC) : PASS

 6000 23:10:18.910255  TX DQ/DQS        : PASS

 6001 23:10:18.913417  RX DATLAT        : PASS

 6002 23:10:18.913514  RX DQ/DQS(Engine): PASS

 6003 23:10:18.916736  TX OE            : NO K

 6004 23:10:18.916807  All Pass.

 6005 23:10:18.916869  

 6006 23:10:18.920142  CH 1, Rank 1

 6007 23:10:18.920210  SW Impedance     : PASS

 6008 23:10:18.923909  DUTY Scan        : NO K

 6009 23:10:18.926704  ZQ Calibration   : PASS

 6010 23:10:18.926780  Jitter Meter     : NO K

 6011 23:10:18.930044  CBT Training     : PASS

 6012 23:10:18.933211  Write leveling   : PASS

 6013 23:10:18.933317  RX DQS gating    : PASS

 6014 23:10:18.936791  RX DQ/DQS(RDDQC) : PASS

 6015 23:10:18.936860  TX DQ/DQS        : PASS

 6016 23:10:18.940493  RX DATLAT        : PASS

 6017 23:10:18.943770  RX DQ/DQS(Engine): PASS

 6018 23:10:18.943843  TX OE            : NO K

 6019 23:10:18.946926  All Pass.

 6020 23:10:18.946999  

 6021 23:10:18.947075  DramC Write-DBI off

 6022 23:10:18.950201  	PER_BANK_REFRESH: Hybrid Mode

 6023 23:10:18.953573  TX_TRACKING: ON

 6024 23:10:18.960374  [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 53, TRFC_05T 1, TXREFCNT 68, TRFCpb 21, TRFCpb_05T 0

 6025 23:10:18.963876  [FAST_K] Save calibration result to emmc

 6026 23:10:18.966862  dramc_set_vcore_voltage set vcore to 650000

 6027 23:10:18.969925  Read voltage for 400, 6

 6028 23:10:18.969994  Vio18 = 0

 6029 23:10:18.973302  Vcore = 650000

 6030 23:10:18.973375  Vdram = 0

 6031 23:10:18.973444  Vddq = 0

 6032 23:10:18.977164  Vmddr = 0

 6033 23:10:18.980257  [FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=0

 6034 23:10:18.987409  [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0

 6035 23:10:18.987482  MEM_TYPE=3, freq_sel=20

 6036 23:10:18.990692  sv_algorithm_assistance_LP4_800 

 6037 23:10:18.993743  ============ PULL DRAM RESETB DOWN ============

 6038 23:10:19.000188  ========== PULL DRAM RESETB DOWN end =========

 6039 23:10:19.003657  [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2

 6040 23:10:19.006872  =================================== 

 6041 23:10:19.010303  LPDDR4 DRAM CONFIGURATION

 6042 23:10:19.013351  =================================== 

 6043 23:10:19.013429  EX_ROW_EN[0]    = 0x0

 6044 23:10:19.017085  EX_ROW_EN[1]    = 0x0

 6045 23:10:19.017152  LP4Y_EN      = 0x0

 6046 23:10:19.020319  WORK_FSP     = 0x0

 6047 23:10:19.023896  WL           = 0x2

 6048 23:10:19.023978  RL           = 0x2

 6049 23:10:19.027018  BL           = 0x2

 6050 23:10:19.027092  RPST         = 0x0

 6051 23:10:19.029988  RD_PRE       = 0x0

 6052 23:10:19.030057  WR_PRE       = 0x1

 6053 23:10:19.033372  WR_PST       = 0x0

 6054 23:10:19.033441  DBI_WR       = 0x0

 6055 23:10:19.037155  DBI_RD       = 0x0

 6056 23:10:19.037223  OTF          = 0x1

 6057 23:10:19.040226  =================================== 

 6058 23:10:19.043491  =================================== 

 6059 23:10:19.046773  ANA top config

 6060 23:10:19.050163  =================================== 

 6061 23:10:19.050261  DLL_ASYNC_EN            =  0

 6062 23:10:19.053310  ALL_SLAVE_EN            =  1

 6063 23:10:19.057323  NEW_RANK_MODE           =  1

 6064 23:10:19.060234  DLL_IDLE_MODE           =  1

 6065 23:10:19.060306  LP45_APHY_COMB_EN       =  1

 6066 23:10:19.063403  TX_ODT_DIS              =  1

 6067 23:10:19.066920  NEW_8X_MODE             =  1

 6068 23:10:19.070371  =================================== 

 6069 23:10:19.073758  =================================== 

 6070 23:10:19.076866  data_rate                  =  800

 6071 23:10:19.079917  CKR                        = 1

 6072 23:10:19.079988  DQ_P2S_RATIO               = 4

 6073 23:10:19.083467  =================================== 

 6074 23:10:19.086935  CA_P2S_RATIO               = 4

 6075 23:10:19.090687  DQ_CA_OPEN                 = 0

 6076 23:10:19.093579  DQ_SEMI_OPEN               = 1

 6077 23:10:19.096995  CA_SEMI_OPEN               = 1

 6078 23:10:19.099941  CA_FULL_RATE               = 0

 6079 23:10:19.100047  DQ_CKDIV4_EN               = 0

 6080 23:10:19.104185  CA_CKDIV4_EN               = 1

 6081 23:10:19.107379  CA_PREDIV_EN               = 0

 6082 23:10:19.110305  PH8_DLY                    = 0

 6083 23:10:19.113794  SEMI_OPEN_CA_PICK_MCK_RATIO= 4

 6084 23:10:19.117335  DQ_AAMCK_DIV               = 0

 6085 23:10:19.117435  CA_AAMCK_DIV               = 0

 6086 23:10:19.120601  CA_ADMCK_DIV               = 4

 6087 23:10:19.123775  DQ_TRACK_CA_EN             = 0

 6088 23:10:19.126792  CA_PICK                    = 800

 6089 23:10:19.130679  CA_MCKIO                   = 400

 6090 23:10:19.133398  MCKIO_SEMI                 = 400

 6091 23:10:19.136772  PLL_FREQ                   = 3016

 6092 23:10:19.136857  DQ_UI_PI_RATIO             = 32

 6093 23:10:19.140579  CA_UI_PI_RATIO             = 32

 6094 23:10:19.144252  =================================== 

 6095 23:10:19.147566  =================================== 

 6096 23:10:19.150645  memory_type:LPDDR4         

 6097 23:10:19.153711  GP_NUM     : 10       

 6098 23:10:19.153785  SRAM_EN    : 1       

 6099 23:10:19.157000  MD32_EN    : 0       

 6100 23:10:19.160423  =================================== 

 6101 23:10:19.160527  [ANA_INIT] >>>>>>>>>>>>>> 

 6102 23:10:19.163737  <<<<<< [CONFIGURE PHASE]: ANA_TX

 6103 23:10:19.166969  >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL

 6104 23:10:19.170616  =================================== 

 6105 23:10:19.173526  data_rate = 800,PCW = 0X7400

 6106 23:10:19.177414  =================================== 

 6107 23:10:19.180370  <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL

 6108 23:10:19.186668  >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration

 6109 23:10:19.196817  WARN: tr->DQ_AAMCK_DIV=  0, Because of DQ_SEMI_OPEN, It's don't care.<<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration

 6110 23:10:19.203836  >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2

 6111 23:10:19.207567  >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL

 6112 23:10:19.210371  <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL

 6113 23:10:19.210465  [ANA_INIT] flow start 

 6114 23:10:19.213540  [ANA_INIT] PLL >>>>>>>> 

 6115 23:10:19.217384  [ANA_INIT] PLL <<<<<<<< 

 6116 23:10:19.217485  [ANA_INIT] MIDPI >>>>>>>> 

 6117 23:10:19.220481  [ANA_INIT] MIDPI <<<<<<<< 

 6118 23:10:19.223979  [ANA_INIT] DLL >>>>>>>> 

 6119 23:10:19.224056  [ANA_INIT] flow end 

 6120 23:10:19.230608  ============ LP4 DIFF to SE enter ============

 6121 23:10:19.233662  ============ LP4 DIFF to SE exit  ============

 6122 23:10:19.233733  [ANA_INIT] <<<<<<<<<<<<< 

 6123 23:10:19.237095  [Flow] Enable top DCM control >>>>> 

 6124 23:10:19.240564  [Flow] Enable top DCM control <<<<< 

 6125 23:10:19.243914  Enable DLL master slave shuffle 

 6126 23:10:19.250956  ============================================================== 

 6127 23:10:19.254720  Gating Mode config

 6128 23:10:19.257263  ============================================================== 

 6129 23:10:19.260613  Config description: 

 6130 23:10:19.270628  RX_GATING_MODE        0: Pulse Mode      1: Burst Mode(8UI)        2: Burst Mode(7UI)  3: Original Burst Mode

 6131 23:10:19.277557  RX_GATING_TRACK_MODE  0: Valid DLY Mode  1: Valid Mode (-like) 2: FIFO mode

 6132 23:10:19.280885  SELPH_MODE            0: By rank         1: By Phase 

 6133 23:10:19.287224  ============================================================== 

 6134 23:10:19.290544  GAT_TRACK_EN                 =  0

 6135 23:10:19.290619  RX_GATING_MODE               =  2

 6136 23:10:19.294179  RX_GATING_TRACK_MODE         =  2

 6137 23:10:19.297318  SELPH_MODE                   =  1

 6138 23:10:19.300943  PICG_EARLY_EN                =  1

 6139 23:10:19.304180  VALID_LAT_VALUE              =  1

 6140 23:10:19.310494  ============================================================== 

 6141 23:10:19.313929  Enter into Gating configuration >>>> 

 6142 23:10:19.317168  Exit from Gating configuration <<<< 

 6143 23:10:19.320659  Enter into  DVFS_PRE_config >>>>> 

 6144 23:10:19.330607  Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL. 

 6145 23:10:19.333917  Exit from  DVFS_PRE_config <<<<< 

 6146 23:10:19.337359  Enter into PICG configuration >>>> 

 6147 23:10:19.340654  Exit from PICG configuration <<<< 

 6148 23:10:19.344158  [RX_INPUT] configuration >>>>> 

 6149 23:10:19.347050  [RX_INPUT] configuration <<<<< 

 6150 23:10:19.350361  [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>

 6151 23:10:19.357239  [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<

 6152 23:10:19.363686  [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>

 6153 23:10:19.367166  [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<

 6154 23:10:19.373995  [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>

 6155 23:10:19.380768  [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<

 6156 23:10:19.384120  [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0 

 6157 23:10:19.387339  [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0 

 6158 23:10:19.394004  [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0 

 6159 23:10:19.397159  [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0 

 6160 23:10:19.400683  [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0 

 6161 23:10:19.407532  [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2

 6162 23:10:19.410730  =================================== 

 6163 23:10:19.410842  LPDDR4 DRAM CONFIGURATION

 6164 23:10:19.413764  =================================== 

 6165 23:10:19.417177  EX_ROW_EN[0]    = 0x0

 6166 23:10:19.417258  EX_ROW_EN[1]    = 0x0

 6167 23:10:19.420466  LP4Y_EN      = 0x0

 6168 23:10:19.420555  WORK_FSP     = 0x0

 6169 23:10:19.423921  WL           = 0x2

 6170 23:10:19.427410  RL           = 0x2

 6171 23:10:19.427483  BL           = 0x2

 6172 23:10:19.430637  RPST         = 0x0

 6173 23:10:19.430712  RD_PRE       = 0x0

 6174 23:10:19.434090  WR_PRE       = 0x1

 6175 23:10:19.434161  WR_PST       = 0x0

 6176 23:10:19.437684  DBI_WR       = 0x0

 6177 23:10:19.437761  DBI_RD       = 0x0

 6178 23:10:19.440452  OTF          = 0x1

 6179 23:10:19.444303  =================================== 

 6180 23:10:19.447384  [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0 

 6181 23:10:19.450671  [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0 

 6182 23:10:19.453752  [ModeRegister RLWL Config] data_rate: 800-MR2_RLWL:2

 6183 23:10:19.456944  =================================== 

 6184 23:10:19.460597  LPDDR4 DRAM CONFIGURATION

 6185 23:10:19.463648  =================================== 

 6186 23:10:19.467197  EX_ROW_EN[0]    = 0x10

 6187 23:10:19.467280  EX_ROW_EN[1]    = 0x0

 6188 23:10:19.470529  LP4Y_EN      = 0x0

 6189 23:10:19.470610  WORK_FSP     = 0x0

 6190 23:10:19.474011  WL           = 0x2

 6191 23:10:19.474082  RL           = 0x2

 6192 23:10:19.477491  BL           = 0x2

 6193 23:10:19.477564  RPST         = 0x0

 6194 23:10:19.480600  RD_PRE       = 0x0

 6195 23:10:19.480671  WR_PRE       = 0x1

 6196 23:10:19.483934  WR_PST       = 0x0

 6197 23:10:19.484018  DBI_WR       = 0x0

 6198 23:10:19.487108  DBI_RD       = 0x0

 6199 23:10:19.490931  OTF          = 0x1

 6200 23:10:19.491008  =================================== 

 6201 23:10:19.497616  [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit

 6202 23:10:19.502077  nWR fixed to 30

 6203 23:10:19.505302  [ModeRegInit_LP4] CH0 RK0

 6204 23:10:19.505381  [ModeRegInit_LP4] CH0 RK1

 6205 23:10:19.509584  [ModeRegInit_LP4] CH1 RK0

 6206 23:10:19.512034  [ModeRegInit_LP4] CH1 RK1

 6207 23:10:19.512106  match AC timing 19

 6208 23:10:19.519188  dramType 5, freq 400, readDBI 0, DivMode 2, cbtMode 1

 6209 23:10:19.523009  SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON

 6210 23:10:19.525961  [WriteLatency GET] Version:0-MR_RL_field_value:2-WL: 8

 6211 23:10:19.532526  [TX_path_calculate] data rate=800, WL=8, DQS_TotalUI=17

 6212 23:10:19.535623  [TX_path_calculate] DQS = (4,1) DQS_OE = (3,2)

 6213 23:10:19.535700  ==

 6214 23:10:19.539397  Dram Type= 6, Freq= 0, CH_0, rank 0

 6215 23:10:19.542689  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6216 23:10:19.542771  ==

 6217 23:10:19.548743  pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0

 6218 23:10:19.555428  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=37, u1VrefScanEnd=37

 6219 23:10:19.559292  [CA 0] Center 36 (8~64) winsize 57

 6220 23:10:19.562655  [CA 1] Center 36 (8~64) winsize 57

 6221 23:10:19.562735  [CA 2] Center 36 (8~64) winsize 57

 6222 23:10:19.565941  [CA 3] Center 36 (8~64) winsize 57

 6223 23:10:19.569283  [CA 4] Center 36 (8~64) winsize 57

 6224 23:10:19.572722  [CA 5] Center 36 (8~64) winsize 57

 6225 23:10:19.572794  

 6226 23:10:19.575992  [CmdBusTrainingLP45] Vref(ca) range 1: 37

 6227 23:10:19.576064  

 6228 23:10:19.582737  [CATrainingPosCal] consider 1 rank data

 6229 23:10:19.582810  u2DelayCellTimex100 = 270/100 ps

 6230 23:10:19.585819  CA0 delay=36 (8~64),Diff = 0 PI (0 cell)

 6231 23:10:19.592549  CA1 delay=36 (8~64),Diff = 0 PI (0 cell)

 6232 23:10:19.595625  CA2 delay=36 (8~64),Diff = 0 PI (0 cell)

 6233 23:10:19.599177  CA3 delay=36 (8~64),Diff = 0 PI (0 cell)

 6234 23:10:19.602331  CA4 delay=36 (8~64),Diff = 0 PI (0 cell)

 6235 23:10:19.606006  CA5 delay=36 (8~64),Diff = 0 PI (0 cell)

 6236 23:10:19.606088  

 6237 23:10:19.609261  CA PerBit enable=1, Macro0, CA PI delay=36

 6238 23:10:19.609342  

 6239 23:10:19.612306  [CBTSetCACLKResult] CA Dly = 36

 6240 23:10:19.612387  CS Dly: 1 (0~32)

 6241 23:10:19.615765  ==

 6242 23:10:19.619672  Dram Type= 6, Freq= 0, CH_0, rank 1

 6243 23:10:19.622265  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6244 23:10:19.622346  ==

 6245 23:10:19.625750  pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0

 6246 23:10:19.632603  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35

 6247 23:10:19.635477  [CA 0] Center 36 (8~64) winsize 57

 6248 23:10:19.639074  [CA 1] Center 36 (8~64) winsize 57

 6249 23:10:19.642634  [CA 2] Center 36 (8~64) winsize 57

 6250 23:10:19.645788  [CA 3] Center 36 (8~64) winsize 57

 6251 23:10:19.649748  [CA 4] Center 36 (8~64) winsize 57

 6252 23:10:19.652355  [CA 5] Center 36 (8~64) winsize 57

 6253 23:10:19.652465  

 6254 23:10:19.655920  [CmdBusTrainingLP45] Vref(ca) range 1: 35

 6255 23:10:19.656000  

 6256 23:10:19.659060  [CATrainingPosCal] consider 2 rank data

 6257 23:10:19.662576  u2DelayCellTimex100 = 270/100 ps

 6258 23:10:19.665564  CA0 delay=36 (8~64),Diff = 0 PI (0 cell)

 6259 23:10:19.669034  CA1 delay=36 (8~64),Diff = 0 PI (0 cell)

 6260 23:10:19.672408  CA2 delay=36 (8~64),Diff = 0 PI (0 cell)

 6261 23:10:19.676064  CA3 delay=36 (8~64),Diff = 0 PI (0 cell)

 6262 23:10:19.679312  CA4 delay=36 (8~64),Diff = 0 PI (0 cell)

 6263 23:10:19.682424  CA5 delay=36 (8~64),Diff = 0 PI (0 cell)

 6264 23:10:19.686017  

 6265 23:10:19.689329  CA PerBit enable=1, Macro0, CA PI delay=36

 6266 23:10:19.689431  

 6267 23:10:19.693316  [CBTSetCACLKResult] CA Dly = 36

 6268 23:10:19.693416  CS Dly: 1 (0~32)

 6269 23:10:19.693519  

 6270 23:10:19.695930  ----->DramcWriteLeveling(PI) begin...

 6271 23:10:19.696004  ==

 6272 23:10:19.699306  Dram Type= 6, Freq= 0, CH_0, rank 0

 6273 23:10:19.702457  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6274 23:10:19.702538  ==

 6275 23:10:19.705785  Write leveling (Byte 0): 40 => 8

 6276 23:10:19.709274  Write leveling (Byte 1): 32 => 0

 6277 23:10:19.712609  DramcWriteLeveling(PI) end<-----

 6278 23:10:19.712685  

 6279 23:10:19.712748  ==

 6280 23:10:19.715996  Dram Type= 6, Freq= 0, CH_0, rank 0

 6281 23:10:19.719479  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6282 23:10:19.722932  ==

 6283 23:10:19.723022  [Gating] SW mode calibration

 6284 23:10:19.729145  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1

 6285 23:10:19.736019  RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)

 6286 23:10:19.739760   0 11  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 6287 23:10:19.746072   0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 6288 23:10:19.749085   0 12  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 6289 23:10:19.752584   0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 6290 23:10:19.759310   0 13  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6291 23:10:19.762802   0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6292 23:10:19.766032   0 14  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6293 23:10:19.772679   0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6294 23:10:19.776308   0 15  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 6295 23:10:19.779954  Total UI for P1: 0, mck2ui 16

 6296 23:10:19.783248  best dqsien dly found for B0: ( 0, 14, 24)

 6297 23:10:19.786280  Total UI for P1: 0, mck2ui 16

 6298 23:10:19.790115  best dqsien dly found for B1: ( 0, 14, 24)

 6299 23:10:19.793136  best DQS0 dly(MCK, UI, PI) = (0, 14, 24)

 6300 23:10:19.796148  best DQS1 dly(MCK, UI, PI) = (0, 14, 24)

 6301 23:10:19.796235  

 6302 23:10:19.799651  best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)

 6303 23:10:19.803254  best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)

 6304 23:10:19.806138  [Gating] SW calibration Done

 6305 23:10:19.806251  ==

 6306 23:10:19.809608  Dram Type= 6, Freq= 0, CH_0, rank 0

 6307 23:10:19.812564  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6308 23:10:19.812639  ==

 6309 23:10:19.816093  RX Vref Scan: 0

 6310 23:10:19.816175  

 6311 23:10:19.819877  RX Vref 0 -> 0, step: 1

 6312 23:10:19.819951  

 6313 23:10:19.820013  RX Delay -410 -> 252, step: 16

 6314 23:10:19.826278  iDelay=230, Bit 0, Center -27 (-266 ~ 213) 480

 6315 23:10:19.829499  iDelay=230, Bit 1, Center -27 (-282 ~ 229) 512

 6316 23:10:19.833157  iDelay=230, Bit 2, Center -35 (-282 ~ 213) 496

 6317 23:10:19.836147  iDelay=230, Bit 3, Center -35 (-282 ~ 213) 496

 6318 23:10:19.843079  iDelay=230, Bit 4, Center -27 (-266 ~ 213) 480

 6319 23:10:19.846622  iDelay=230, Bit 5, Center -35 (-282 ~ 213) 496

 6320 23:10:19.850858  iDelay=230, Bit 6, Center -19 (-266 ~ 229) 496

 6321 23:10:19.852890  iDelay=230, Bit 7, Center -19 (-266 ~ 229) 496

 6322 23:10:19.859578  iDelay=230, Bit 8, Center -51 (-298 ~ 197) 496

 6323 23:10:19.862908  iDelay=230, Bit 9, Center -51 (-298 ~ 197) 496

 6324 23:10:19.866214  iDelay=230, Bit 10, Center -35 (-282 ~ 213) 496

 6325 23:10:19.869852  iDelay=230, Bit 11, Center -51 (-298 ~ 197) 496

 6326 23:10:19.876611  iDelay=230, Bit 12, Center -35 (-282 ~ 213) 496

 6327 23:10:19.879727  iDelay=230, Bit 13, Center -35 (-282 ~ 213) 496

 6328 23:10:19.883394  iDelay=230, Bit 14, Center -35 (-282 ~ 213) 496

 6329 23:10:19.886411  iDelay=230, Bit 15, Center -35 (-282 ~ 213) 496

 6330 23:10:19.890021  ==

 6331 23:10:19.890091  Dram Type= 6, Freq= 0, CH_0, rank 0

 6332 23:10:19.896494  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6333 23:10:19.896571  ==

 6334 23:10:19.896633  DQS Delay:

 6335 23:10:19.899870  DQS0 = 35, DQS1 = 51

 6336 23:10:19.899943  DQM Delay:

 6337 23:10:19.903314  DQM0 = 7, DQM1 = 10

 6338 23:10:19.903386  DQ Delay:

 6339 23:10:19.906260  DQ0 =8, DQ1 =8, DQ2 =0, DQ3 =0

 6340 23:10:19.909738  DQ4 =8, DQ5 =0, DQ6 =16, DQ7 =16

 6341 23:10:19.909807  DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =0

 6342 23:10:19.916443  DQ12 =16, DQ13 =16, DQ14 =16, DQ15 =16

 6343 23:10:19.916517  

 6344 23:10:19.916578  

 6345 23:10:19.916638  ==

 6346 23:10:19.920055  Dram Type= 6, Freq= 0, CH_0, rank 0

 6347 23:10:19.923440  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6348 23:10:19.923517  ==

 6349 23:10:19.923579  

 6350 23:10:19.923636  

 6351 23:10:19.926070  	TX Vref Scan disable

 6352 23:10:19.926170   == TX Byte 0 ==

 6353 23:10:19.929617  Update DQ  dly =580 (4 ,2, 4)  DQ  OEN =(3 ,3)

 6354 23:10:19.936257  Update DQM dly =580 (4 ,2, 4)  DQM OEN =(3 ,3)

 6355 23:10:19.936359   == TX Byte 1 ==

 6356 23:10:19.942839  Update DQ  dly =572 (4 ,1, 28)  DQ  OEN =(3 ,2)

 6357 23:10:19.946153  Update DQM dly =572 (4 ,1, 28)  DQM OEN =(3 ,2)

 6358 23:10:19.946228  ==

 6359 23:10:19.949513  Dram Type= 6, Freq= 0, CH_0, rank 0

 6360 23:10:19.952516  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6361 23:10:19.952594  ==

 6362 23:10:19.952657  

 6363 23:10:19.952716  

 6364 23:10:19.956201  	TX Vref Scan disable

 6365 23:10:19.956280   == TX Byte 0 ==

 6366 23:10:19.963292  Update DQ  dly =580 (4 ,2, 4)  DQ  OEN =(3 ,3)

 6367 23:10:19.966653  Update DQM dly =580 (4 ,2, 4)  DQM OEN =(3 ,3)

 6368 23:10:19.966731   == TX Byte 1 ==

 6369 23:10:19.972531  Update DQ  dly =572 (4 ,1, 28)  DQ  OEN =(3 ,2)

 6370 23:10:19.976151  Update DQM dly =572 (4 ,1, 28)  DQM OEN =(3 ,2)

 6371 23:10:19.976221  

 6372 23:10:19.976289  [DATLAT]

 6373 23:10:19.979178  Freq=400, CH0 RK0

 6374 23:10:19.979260  

 6375 23:10:19.979319  DATLAT Default: 0xf

 6376 23:10:19.982816  0, 0xFFFF, sum = 0

 6377 23:10:19.982884  1, 0xFFFF, sum = 0

 6378 23:10:19.986129  2, 0xFFFF, sum = 0

 6379 23:10:19.986195  3, 0xFFFF, sum = 0

 6380 23:10:19.989145  4, 0xFFFF, sum = 0

 6381 23:10:19.989213  5, 0xFFFF, sum = 0

 6382 23:10:19.992408  6, 0xFFFF, sum = 0

 6383 23:10:19.992485  7, 0xFFFF, sum = 0

 6384 23:10:19.995938  8, 0xFFFF, sum = 0

 6385 23:10:19.996013  9, 0xFFFF, sum = 0

 6386 23:10:19.999388  10, 0xFFFF, sum = 0

 6387 23:10:20.002761  11, 0xFFFF, sum = 0

 6388 23:10:20.002831  12, 0xFFFF, sum = 0

 6389 23:10:20.006055  13, 0x0, sum = 1

 6390 23:10:20.006132  14, 0x0, sum = 2

 6391 23:10:20.006194  15, 0x0, sum = 3

 6392 23:10:20.009508  16, 0x0, sum = 4

 6393 23:10:20.009578  best_step = 14

 6394 23:10:20.009637  

 6395 23:10:20.009694  ==

 6396 23:10:20.012874  Dram Type= 6, Freq= 0, CH_0, rank 0

 6397 23:10:20.019351  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6398 23:10:20.019430  ==

 6399 23:10:20.019501  RX Vref Scan: 1

 6400 23:10:20.019561  

 6401 23:10:20.022448  RX Vref 0 -> 0, step: 1

 6402 23:10:20.022530  

 6403 23:10:20.026461  RX Delay -343 -> 252, step: 8

 6404 23:10:20.026537  

 6405 23:10:20.029501  Set Vref, RX VrefLevel [Byte0]: 55

 6406 23:10:20.032415                           [Byte1]: 51

 6407 23:10:20.036545  

 6408 23:10:20.036625  Final RX Vref Byte 0 = 55 to rank0

 6409 23:10:20.039468  Final RX Vref Byte 1 = 51 to rank0

 6410 23:10:20.042733  Final RX Vref Byte 0 = 55 to rank1

 6411 23:10:20.045743  Final RX Vref Byte 1 = 51 to rank1==

 6412 23:10:20.049579  Dram Type= 6, Freq= 0, CH_0, rank 0

 6413 23:10:20.056222  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6414 23:10:20.056301  ==

 6415 23:10:20.056367  DQS Delay:

 6416 23:10:20.056437  DQS0 = 44, DQS1 = 60

 6417 23:10:20.059320  DQM Delay:

 6418 23:10:20.059391  DQM0 = 11, DQM1 = 15

 6419 23:10:20.062950  DQ Delay:

 6420 23:10:20.066147  DQ0 =12, DQ1 =12, DQ2 =8, DQ3 =8

 6421 23:10:20.066227  DQ4 =12, DQ5 =0, DQ6 =16, DQ7 =20

 6422 23:10:20.069608  DQ8 =0, DQ9 =4, DQ10 =16, DQ11 =12

 6423 23:10:20.072951  DQ12 =20, DQ13 =20, DQ14 =24, DQ15 =24

 6424 23:10:20.073027  

 6425 23:10:20.073089  

 6426 23:10:20.082911  [DQSOSCAuto] RK0, (LSB)MR18= 0x8858, (MSB)MR19= 0xc0c, tDQSOscB0 = 398 ps tDQSOscB1 = 392 ps

 6427 23:10:20.085793  CH0 RK0: MR19=C0C, MR18=8858

 6428 23:10:20.092552  CH0_RK0: MR19=0xC0C, MR18=0x8858, DQSOSC=392, MR23=63, INC=384, DEC=256

 6429 23:10:20.092632  ==

 6430 23:10:20.096246  Dram Type= 6, Freq= 0, CH_0, rank 1

 6431 23:10:20.099383  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6432 23:10:20.099484  ==

 6433 23:10:20.102994  [Gating] SW mode calibration

 6434 23:10:20.109308  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1

 6435 23:10:20.113199  RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)

 6436 23:10:20.119226   0 11  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 6437 23:10:20.122881   0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 6438 23:10:20.125785   0 12  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 6439 23:10:20.132618   0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 6440 23:10:20.136514   0 13  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6441 23:10:20.139772   0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6442 23:10:20.146358   0 14  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6443 23:10:20.149740   0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6444 23:10:20.152497   0 15  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 6445 23:10:20.156135  Total UI for P1: 0, mck2ui 16

 6446 23:10:20.159307  best dqsien dly found for B0: ( 0, 14, 24)

 6447 23:10:20.163310  Total UI for P1: 0, mck2ui 16

 6448 23:10:20.166089  best dqsien dly found for B1: ( 0, 14, 24)

 6449 23:10:20.169337  best DQS0 dly(MCK, UI, PI) = (0, 14, 24)

 6450 23:10:20.172759  best DQS1 dly(MCK, UI, PI) = (0, 14, 24)

 6451 23:10:20.172856  

 6452 23:10:20.179804  best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)

 6453 23:10:20.182974  best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)

 6454 23:10:20.183046  [Gating] SW calibration Done

 6455 23:10:20.186231  ==

 6456 23:10:20.186332  Dram Type= 6, Freq= 0, CH_0, rank 1

 6457 23:10:20.192579  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6458 23:10:20.192665  ==

 6459 23:10:20.192731  RX Vref Scan: 0

 6460 23:10:20.192791  

 6461 23:10:20.196320  RX Vref 0 -> 0, step: 1

 6462 23:10:20.196416  

 6463 23:10:20.199517  RX Delay -410 -> 252, step: 16

 6464 23:10:20.202924  iDelay=230, Bit 0, Center -27 (-266 ~ 213) 480

 6465 23:10:20.205854  iDelay=230, Bit 1, Center -35 (-282 ~ 213) 496

 6466 23:10:20.213070  iDelay=230, Bit 2, Center -27 (-266 ~ 213) 480

 6467 23:10:20.216097  iDelay=230, Bit 3, Center -35 (-282 ~ 213) 496

 6468 23:10:20.219390  iDelay=230, Bit 4, Center -27 (-266 ~ 213) 480

 6469 23:10:20.223422  iDelay=230, Bit 5, Center -43 (-282 ~ 197) 480

 6470 23:10:20.229506  iDelay=230, Bit 6, Center -19 (-266 ~ 229) 496

 6471 23:10:20.232661  iDelay=230, Bit 7, Center -19 (-266 ~ 229) 496

 6472 23:10:20.236260  iDelay=230, Bit 8, Center -51 (-298 ~ 197) 496

 6473 23:10:20.239816  iDelay=230, Bit 9, Center -51 (-298 ~ 197) 496

 6474 23:10:20.246150  iDelay=230, Bit 10, Center -35 (-282 ~ 213) 496

 6475 23:10:20.249223  iDelay=230, Bit 11, Center -51 (-298 ~ 197) 496

 6476 23:10:20.252581  iDelay=230, Bit 12, Center -35 (-282 ~ 213) 496

 6477 23:10:20.256439  iDelay=230, Bit 13, Center -35 (-282 ~ 213) 496

 6478 23:10:20.262840  iDelay=230, Bit 14, Center -35 (-282 ~ 213) 496

 6479 23:10:20.266583  iDelay=230, Bit 15, Center -35 (-282 ~ 213) 496

 6480 23:10:20.266659  ==

 6481 23:10:20.269396  Dram Type= 6, Freq= 0, CH_0, rank 1

 6482 23:10:20.273078  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6483 23:10:20.273154  ==

 6484 23:10:20.276254  DQS Delay:

 6485 23:10:20.276323  DQS0 = 43, DQS1 = 51

 6486 23:10:20.279117  DQM Delay:

 6487 23:10:20.279188  DQM0 = 14, DQM1 = 10

 6488 23:10:20.279255  DQ Delay:

 6489 23:10:20.283053  DQ0 =16, DQ1 =8, DQ2 =16, DQ3 =8

 6490 23:10:20.285706  DQ4 =16, DQ5 =0, DQ6 =24, DQ7 =24

 6491 23:10:20.289359  DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =0

 6492 23:10:20.293050  DQ12 =16, DQ13 =16, DQ14 =16, DQ15 =16

 6493 23:10:20.293127  

 6494 23:10:20.293198  

 6495 23:10:20.293258  ==

 6496 23:10:20.296003  Dram Type= 6, Freq= 0, CH_0, rank 1

 6497 23:10:20.302951  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6498 23:10:20.303023  ==

 6499 23:10:20.303085  

 6500 23:10:20.303147  

 6501 23:10:20.303214  	TX Vref Scan disable

 6502 23:10:20.305945   == TX Byte 0 ==

 6503 23:10:20.309155  Update DQ  dly =584 (4 ,2, 8)  DQ  OEN =(3 ,3)

 6504 23:10:20.312905  Update DQM dly =584 (4 ,2, 8)  DQM OEN =(3 ,3)

 6505 23:10:20.316135   == TX Byte 1 ==

 6506 23:10:20.319395  Update DQ  dly =580 (4 ,2, 4)  DQ  OEN =(3 ,3)

 6507 23:10:20.323240  Update DQM dly =580 (4 ,2, 4)  DQM OEN =(3 ,3)

 6508 23:10:20.323331  ==

 6509 23:10:20.326259  Dram Type= 6, Freq= 0, CH_0, rank 1

 6510 23:10:20.332990  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6511 23:10:20.333062  ==

 6512 23:10:20.333130  

 6513 23:10:20.333190  

 6514 23:10:20.333246  	TX Vref Scan disable

 6515 23:10:20.336114   == TX Byte 0 ==

 6516 23:10:20.339705  Update DQ  dly =584 (4 ,2, 8)  DQ  OEN =(3 ,3)

 6517 23:10:20.342622  Update DQM dly =584 (4 ,2, 8)  DQM OEN =(3 ,3)

 6518 23:10:20.346232   == TX Byte 1 ==

 6519 23:10:20.349654  Update DQ  dly =580 (4 ,2, 4)  DQ  OEN =(3 ,3)

 6520 23:10:20.353431  Update DQM dly =580 (4 ,2, 4)  DQM OEN =(3 ,3)

 6521 23:10:20.353532  

 6522 23:10:20.356392  [DATLAT]

 6523 23:10:20.356474  Freq=400, CH0 RK1

 6524 23:10:20.356537  

 6525 23:10:20.359478  DATLAT Default: 0xe

 6526 23:10:20.359550  0, 0xFFFF, sum = 0

 6527 23:10:20.363161  1, 0xFFFF, sum = 0

 6528 23:10:20.363236  2, 0xFFFF, sum = 0

 6529 23:10:20.366494  3, 0xFFFF, sum = 0

 6530 23:10:20.366566  4, 0xFFFF, sum = 0

 6531 23:10:20.369554  5, 0xFFFF, sum = 0

 6532 23:10:20.369628  6, 0xFFFF, sum = 0

 6533 23:10:20.372638  7, 0xFFFF, sum = 0

 6534 23:10:20.372746  8, 0xFFFF, sum = 0

 6535 23:10:20.376134  9, 0xFFFF, sum = 0

 6536 23:10:20.376247  10, 0xFFFF, sum = 0

 6537 23:10:20.379724  11, 0xFFFF, sum = 0

 6538 23:10:20.379831  12, 0xFFFF, sum = 0

 6539 23:10:20.382638  13, 0x0, sum = 1

 6540 23:10:20.382715  14, 0x0, sum = 2

 6541 23:10:20.386384  15, 0x0, sum = 3

 6542 23:10:20.386535  16, 0x0, sum = 4

 6543 23:10:20.389249  best_step = 14

 6544 23:10:20.389327  

 6545 23:10:20.389389  ==

 6546 23:10:20.392949  Dram Type= 6, Freq= 0, CH_0, rank 1

 6547 23:10:20.395897  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6548 23:10:20.395993  ==

 6549 23:10:20.399481  RX Vref Scan: 0

 6550 23:10:20.399584  

 6551 23:10:20.399679  RX Vref 0 -> 0, step: 1

 6552 23:10:20.399764  

 6553 23:10:20.402909  RX Delay -343 -> 252, step: 8

 6554 23:10:20.410642  iDelay=217, Bit 0, Center -32 (-271 ~ 208) 480

 6555 23:10:20.413969  iDelay=217, Bit 1, Center -32 (-271 ~ 208) 480

 6556 23:10:20.417698  iDelay=217, Bit 2, Center -36 (-279 ~ 208) 488

 6557 23:10:20.420805  iDelay=217, Bit 3, Center -36 (-279 ~ 208) 488

 6558 23:10:20.427195  iDelay=217, Bit 4, Center -36 (-279 ~ 208) 488

 6559 23:10:20.430554  iDelay=217, Bit 5, Center -48 (-287 ~ 192) 480

 6560 23:10:20.433723  iDelay=217, Bit 6, Center -28 (-271 ~ 216) 488

 6561 23:10:20.437912  iDelay=217, Bit 7, Center -28 (-271 ~ 216) 488

 6562 23:10:20.443970  iDelay=217, Bit 8, Center -60 (-303 ~ 184) 488

 6563 23:10:20.447028  iDelay=217, Bit 9, Center -56 (-295 ~ 184) 480

 6564 23:10:20.450800  iDelay=217, Bit 10, Center -44 (-287 ~ 200) 488

 6565 23:10:20.453606  iDelay=217, Bit 11, Center -52 (-287 ~ 184) 472

 6566 23:10:20.460484  iDelay=217, Bit 12, Center -44 (-287 ~ 200) 488

 6567 23:10:20.463769  iDelay=217, Bit 13, Center -40 (-279 ~ 200) 480

 6568 23:10:20.467121  iDelay=217, Bit 14, Center -36 (-279 ~ 208) 488

 6569 23:10:20.474008  iDelay=217, Bit 15, Center -36 (-279 ~ 208) 488

 6570 23:10:20.474109  ==

 6571 23:10:20.477485  Dram Type= 6, Freq= 0, CH_0, rank 1

 6572 23:10:20.480511  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6573 23:10:20.480583  ==

 6574 23:10:20.480648  DQS Delay:

 6575 23:10:20.484115  DQS0 = 48, DQS1 = 60

 6576 23:10:20.484222  DQM Delay:

 6577 23:10:20.487452  DQM0 = 13, DQM1 = 14

 6578 23:10:20.487531  DQ Delay:

 6579 23:10:20.490708  DQ0 =16, DQ1 =16, DQ2 =12, DQ3 =12

 6580 23:10:20.494200  DQ4 =12, DQ5 =0, DQ6 =20, DQ7 =20

 6581 23:10:20.497722  DQ8 =0, DQ9 =4, DQ10 =16, DQ11 =8

 6582 23:10:20.500585  DQ12 =16, DQ13 =20, DQ14 =24, DQ15 =24

 6583 23:10:20.500660  

 6584 23:10:20.500722  

 6585 23:10:20.507079  [DQSOSCAuto] RK1, (LSB)MR18= 0x8f61, (MSB)MR19= 0xc0c, tDQSOscB0 = 397 ps tDQSOscB1 = 391 ps

 6586 23:10:20.510774  CH0 RK1: MR19=C0C, MR18=8F61

 6587 23:10:20.517667  CH0_RK1: MR19=0xC0C, MR18=0x8F61, DQSOSC=391, MR23=63, INC=386, DEC=257

 6588 23:10:20.520773  [RxdqsGatingPostProcess] freq 400

 6589 23:10:20.527378  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 6590 23:10:20.527461  best DQS0 dly(2T, 0.5T) = (0, 10)

 6591 23:10:20.530662  best DQS1 dly(2T, 0.5T) = (0, 10)

 6592 23:10:20.533937  best DQS0 P1 dly(2T, 0.5T) = (0, 12)

 6593 23:10:20.537228  best DQS1 P1 dly(2T, 0.5T) = (0, 12)

 6594 23:10:20.540898  best DQS0 dly(2T, 0.5T) = (0, 10)

 6595 23:10:20.543943  best DQS1 dly(2T, 0.5T) = (0, 10)

 6596 23:10:20.547761  best DQS0 P1 dly(2T, 0.5T) = (0, 12)

 6597 23:10:20.551077  best DQS1 P1 dly(2T, 0.5T) = (0, 12)

 6598 23:10:20.553763  Pre-setting of DQS Precalculation

 6599 23:10:20.557291  [DualRankRxdatlatCal] RK0: 14, RK1: 14, Final_Datlat 14

 6600 23:10:20.560327  ==

 6601 23:10:20.560409  Dram Type= 6, Freq= 0, CH_1, rank 0

 6602 23:10:20.567535  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6603 23:10:20.567616  ==

 6604 23:10:20.570837  pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0

 6605 23:10:20.577073  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=35, u1VrefScanEnd=35

 6606 23:10:20.580733  [CA 0] Center 36 (8~64) winsize 57

 6607 23:10:20.584054  [CA 1] Center 36 (8~64) winsize 57

 6608 23:10:20.587341  [CA 2] Center 36 (8~64) winsize 57

 6609 23:10:20.591087  [CA 3] Center 36 (8~64) winsize 57

 6610 23:10:20.593838  [CA 4] Center 36 (8~64) winsize 57

 6611 23:10:20.597365  [CA 5] Center 36 (8~64) winsize 57

 6612 23:10:20.597441  

 6613 23:10:20.601134  [CmdBusTrainingLP45] Vref(ca) range 1: 35

 6614 23:10:20.601210  

 6615 23:10:20.604700  [CATrainingPosCal] consider 1 rank data

 6616 23:10:20.607362  u2DelayCellTimex100 = 270/100 ps

 6617 23:10:20.611080  CA0 delay=36 (8~64),Diff = 0 PI (0 cell)

 6618 23:10:20.613733  CA1 delay=36 (8~64),Diff = 0 PI (0 cell)

 6619 23:10:20.617383  CA2 delay=36 (8~64),Diff = 0 PI (0 cell)

 6620 23:10:20.620812  CA3 delay=36 (8~64),Diff = 0 PI (0 cell)

 6621 23:10:20.623885  CA4 delay=36 (8~64),Diff = 0 PI (0 cell)

 6622 23:10:20.627735  CA5 delay=36 (8~64),Diff = 0 PI (0 cell)

 6623 23:10:20.627826  

 6624 23:10:20.634051  CA PerBit enable=1, Macro0, CA PI delay=36

 6625 23:10:20.634156  

 6626 23:10:20.637414  [CBTSetCACLKResult] CA Dly = 36

 6627 23:10:20.637487  CS Dly: 1 (0~32)

 6628 23:10:20.637548  ==

 6629 23:10:20.640543  Dram Type= 6, Freq= 0, CH_1, rank 1

 6630 23:10:20.644048  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6631 23:10:20.644122  ==

 6632 23:10:20.650945  pi_start=-16, pi_end=95, pi_step=8, new_cbt_mode=1, autok=0

 6633 23:10:20.658003  u1VRangeStart=1, u1VRangeEnd=1, u1VrefScanStart=33, u1VrefScanEnd=33

 6634 23:10:20.660890  [CA 0] Center 36 (8~64) winsize 57

 6635 23:10:20.664403  [CA 1] Center 36 (8~64) winsize 57

 6636 23:10:20.667193  [CA 2] Center 36 (8~64) winsize 57

 6637 23:10:20.670855  [CA 3] Center 36 (8~64) winsize 57

 6638 23:10:20.670942  [CA 4] Center 36 (8~64) winsize 57

 6639 23:10:20.674191  [CA 5] Center 36 (8~64) winsize 57

 6640 23:10:20.674301  

 6641 23:10:20.681229  [CmdBusTrainingLP45] Vref(ca) range 1: 33

 6642 23:10:20.681301  

 6643 23:10:20.684327  [CATrainingPosCal] consider 2 rank data

 6644 23:10:20.684412  u2DelayCellTimex100 = 270/100 ps

 6645 23:10:20.690834  CA0 delay=36 (8~64),Diff = 0 PI (0 cell)

 6646 23:10:20.694143  CA1 delay=36 (8~64),Diff = 0 PI (0 cell)

 6647 23:10:20.697276  CA2 delay=36 (8~64),Diff = 0 PI (0 cell)

 6648 23:10:20.700453  CA3 delay=36 (8~64),Diff = 0 PI (0 cell)

 6649 23:10:20.704139  CA4 delay=36 (8~64),Diff = 0 PI (0 cell)

 6650 23:10:20.707383  CA5 delay=36 (8~64),Diff = 0 PI (0 cell)

 6651 23:10:20.707455  

 6652 23:10:20.710804  CA PerBit enable=1, Macro0, CA PI delay=36

 6653 23:10:20.710875  

 6654 23:10:20.714359  [CBTSetCACLKResult] CA Dly = 36

 6655 23:10:20.717834  CS Dly: 1 (0~32)

 6656 23:10:20.717910  

 6657 23:10:20.720957  ----->DramcWriteLeveling(PI) begin...

 6658 23:10:20.721059  ==

 6659 23:10:20.724326  Dram Type= 6, Freq= 0, CH_1, rank 0

 6660 23:10:20.727445  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6661 23:10:20.727533  ==

 6662 23:10:20.730709  Write leveling (Byte 0): 40 => 8

 6663 23:10:20.734223  Write leveling (Byte 1): 40 => 8

 6664 23:10:20.738007  DramcWriteLeveling(PI) end<-----

 6665 23:10:20.738102  

 6666 23:10:20.738202  ==

 6667 23:10:20.740797  Dram Type= 6, Freq= 0, CH_1, rank 0

 6668 23:10:20.744572  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6669 23:10:20.744674  ==

 6670 23:10:20.747309  [Gating] SW mode calibration

 6671 23:10:20.754021  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1

 6672 23:10:20.761257  RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)

 6673 23:10:20.764163   0 11  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 6674 23:10:20.767513   0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 6675 23:10:20.774197   0 12  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 6676 23:10:20.777819   0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 6677 23:10:20.781112   0 13  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6678 23:10:20.784423   0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6679 23:10:20.791241   0 14  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6680 23:10:20.794538   0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6681 23:10:20.798242   0 15  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 6682 23:10:20.800857  Total UI for P1: 0, mck2ui 16

 6683 23:10:20.804333  best dqsien dly found for B0: ( 0, 14, 24)

 6684 23:10:20.807478  Total UI for P1: 0, mck2ui 16

 6685 23:10:20.810773  best dqsien dly found for B1: ( 0, 14, 24)

 6686 23:10:20.814601  best DQS0 dly(MCK, UI, PI) = (0, 14, 24)

 6687 23:10:20.821288  best DQS1 dly(MCK, UI, PI) = (0, 14, 24)

 6688 23:10:20.821389  

 6689 23:10:20.824594  best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)

 6690 23:10:20.827645  best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)

 6691 23:10:20.830785  [Gating] SW calibration Done

 6692 23:10:20.830886  ==

 6693 23:10:20.834307  Dram Type= 6, Freq= 0, CH_1, rank 0

 6694 23:10:20.837762  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6695 23:10:20.837835  ==

 6696 23:10:20.837895  RX Vref Scan: 0

 6697 23:10:20.841268  

 6698 23:10:20.841339  RX Vref 0 -> 0, step: 1

 6699 23:10:20.841398  

 6700 23:10:20.844129  RX Delay -410 -> 252, step: 16

 6701 23:10:20.847386  iDelay=230, Bit 0, Center -27 (-266 ~ 213) 480

 6702 23:10:20.854564  iDelay=230, Bit 1, Center -35 (-282 ~ 213) 496

 6703 23:10:20.858068  iDelay=230, Bit 2, Center -51 (-298 ~ 197) 496

 6704 23:10:20.861213  iDelay=230, Bit 3, Center -35 (-282 ~ 213) 496

 6705 23:10:20.864150  iDelay=230, Bit 4, Center -35 (-282 ~ 213) 496

 6706 23:10:20.870925  iDelay=230, Bit 5, Center -19 (-266 ~ 229) 496

 6707 23:10:20.873980  iDelay=230, Bit 6, Center -19 (-266 ~ 229) 496

 6708 23:10:20.877549  iDelay=230, Bit 7, Center -35 (-282 ~ 213) 496

 6709 23:10:20.881073  iDelay=230, Bit 8, Center -59 (-314 ~ 197) 512

 6710 23:10:20.887588  iDelay=230, Bit 9, Center -59 (-314 ~ 197) 512

 6711 23:10:20.891111  iDelay=230, Bit 10, Center -43 (-298 ~ 213) 512

 6712 23:10:20.894696  iDelay=230, Bit 11, Center -43 (-298 ~ 213) 512

 6713 23:10:20.897703  iDelay=230, Bit 12, Center -35 (-282 ~ 213) 496

 6714 23:10:20.904528  iDelay=230, Bit 13, Center -35 (-282 ~ 213) 496

 6715 23:10:20.908042  iDelay=230, Bit 14, Center -35 (-282 ~ 213) 496

 6716 23:10:20.911058  iDelay=230, Bit 15, Center -35 (-282 ~ 213) 496

 6717 23:10:20.911139  ==

 6718 23:10:20.914384  Dram Type= 6, Freq= 0, CH_1, rank 0

 6719 23:10:20.917917  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6720 23:10:20.917999  ==

 6721 23:10:20.920848  DQS Delay:

 6722 23:10:20.920929  DQS0 = 51, DQS1 = 59

 6723 23:10:20.924214  DQM Delay:

 6724 23:10:20.924284  DQM0 = 19, DQM1 = 16

 6725 23:10:20.928120  DQ Delay:

 6726 23:10:20.928196  DQ0 =24, DQ1 =16, DQ2 =0, DQ3 =16

 6727 23:10:20.930970  DQ4 =16, DQ5 =32, DQ6 =32, DQ7 =16

 6728 23:10:20.934467  DQ8 =0, DQ9 =0, DQ10 =16, DQ11 =16

 6729 23:10:20.938107  DQ12 =24, DQ13 =24, DQ14 =24, DQ15 =24

 6730 23:10:20.938186  

 6731 23:10:20.938248  

 6732 23:10:20.940965  ==

 6733 23:10:20.941036  Dram Type= 6, Freq= 0, CH_1, rank 0

 6734 23:10:20.947686  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6735 23:10:20.947794  ==

 6736 23:10:20.947860  

 6737 23:10:20.947918  

 6738 23:10:20.950767  	TX Vref Scan disable

 6739 23:10:20.950836   == TX Byte 0 ==

 6740 23:10:20.954399  Update DQ  dly =580 (4 ,2, 4)  DQ  OEN =(3 ,3)

 6741 23:10:20.957845  Update DQM dly =580 (4 ,2, 4)  DQM OEN =(3 ,3)

 6742 23:10:20.961216   == TX Byte 1 ==

 6743 23:10:20.964560  Update DQ  dly =580 (4 ,2, 4)  DQ  OEN =(3 ,3)

 6744 23:10:20.968102  Update DQM dly =580 (4 ,2, 4)  DQM OEN =(3 ,3)

 6745 23:10:20.971369  ==

 6746 23:10:20.971436  Dram Type= 6, Freq= 0, CH_1, rank 0

 6747 23:10:20.977406  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6748 23:10:20.977512  ==

 6749 23:10:20.977604  

 6750 23:10:20.977689  

 6751 23:10:20.981191  	TX Vref Scan disable

 6752 23:10:20.981262   == TX Byte 0 ==

 6753 23:10:20.984522  Update DQ  dly =580 (4 ,2, 4)  DQ  OEN =(3 ,3)

 6754 23:10:20.991455  Update DQM dly =580 (4 ,2, 4)  DQM OEN =(3 ,3)

 6755 23:10:20.991561   == TX Byte 1 ==

 6756 23:10:20.994405  Update DQ  dly =580 (4 ,2, 4)  DQ  OEN =(3 ,3)

 6757 23:10:20.997716  Update DQM dly =580 (4 ,2, 4)  DQM OEN =(3 ,3)

 6758 23:10:21.000989  

 6759 23:10:21.001061  [DATLAT]

 6760 23:10:21.001122  Freq=400, CH1 RK0

 6761 23:10:21.001182  

 6762 23:10:21.004589  DATLAT Default: 0xf

 6763 23:10:21.004665  0, 0xFFFF, sum = 0

 6764 23:10:21.007572  1, 0xFFFF, sum = 0

 6765 23:10:21.007640  2, 0xFFFF, sum = 0

 6766 23:10:21.011399  3, 0xFFFF, sum = 0

 6767 23:10:21.011496  4, 0xFFFF, sum = 0

 6768 23:10:21.014200  5, 0xFFFF, sum = 0

 6769 23:10:21.014299  6, 0xFFFF, sum = 0

 6770 23:10:21.017929  7, 0xFFFF, sum = 0

 6771 23:10:21.020820  8, 0xFFFF, sum = 0

 6772 23:10:21.020924  9, 0xFFFF, sum = 0

 6773 23:10:21.024119  10, 0xFFFF, sum = 0

 6774 23:10:21.024193  11, 0xFFFF, sum = 0

 6775 23:10:21.027543  12, 0xFFFF, sum = 0

 6776 23:10:21.027620  13, 0x0, sum = 1

 6777 23:10:21.031248  14, 0x0, sum = 2

 6778 23:10:21.031350  15, 0x0, sum = 3

 6779 23:10:21.034229  16, 0x0, sum = 4

 6780 23:10:21.034328  best_step = 14

 6781 23:10:21.034453  

 6782 23:10:21.034512  ==

 6783 23:10:21.037982  Dram Type= 6, Freq= 0, CH_1, rank 0

 6784 23:10:21.041273  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6785 23:10:21.041344  ==

 6786 23:10:21.044041  RX Vref Scan: 1

 6787 23:10:21.044115  

 6788 23:10:21.047695  RX Vref 0 -> 0, step: 1

 6789 23:10:21.047797  

 6790 23:10:21.047891  RX Delay -359 -> 252, step: 8

 6791 23:10:21.047962  

 6792 23:10:21.051031  Set Vref, RX VrefLevel [Byte0]: 62

 6793 23:10:21.054120                           [Byte1]: 53

 6794 23:10:21.059523  

 6795 23:10:21.059599  Final RX Vref Byte 0 = 62 to rank0

 6796 23:10:21.063124  Final RX Vref Byte 1 = 53 to rank0

 6797 23:10:21.066196  Final RX Vref Byte 0 = 62 to rank1

 6798 23:10:21.069734  Final RX Vref Byte 1 = 53 to rank1==

 6799 23:10:21.072592  Dram Type= 6, Freq= 0, CH_1, rank 0

 6800 23:10:21.079576  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6801 23:10:21.079650  ==

 6802 23:10:21.079712  DQS Delay:

 6803 23:10:21.079775  DQS0 = 44, DQS1 = 60

 6804 23:10:21.083310  DQM Delay:

 6805 23:10:21.083382  DQM0 = 8, DQM1 = 13

 6806 23:10:21.086749  DQ Delay:

 6807 23:10:21.086825  DQ0 =12, DQ1 =4, DQ2 =0, DQ3 =8

 6808 23:10:21.089404  DQ4 =4, DQ5 =16, DQ6 =20, DQ7 =4

 6809 23:10:21.093116  DQ8 =0, DQ9 =0, DQ10 =12, DQ11 =12

 6810 23:10:21.096668  DQ12 =20, DQ13 =20, DQ14 =20, DQ15 =20

 6811 23:10:21.096823  

 6812 23:10:21.096931  

 6813 23:10:21.106724  [DQSOSCAuto] RK0, (LSB)MR18= 0x842c, (MSB)MR19= 0xc0c, tDQSOscB0 = 404 ps tDQSOscB1 = 393 ps

 6814 23:10:21.109973  CH1 RK0: MR19=C0C, MR18=842C

 6815 23:10:21.113002  CH1_RK0: MR19=0xC0C, MR18=0x842C, DQSOSC=393, MR23=63, INC=382, DEC=254

 6816 23:10:21.116534  ==

 6817 23:10:21.119952  Dram Type= 6, Freq= 0, CH_1, rank 1

 6818 23:10:21.123632  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6819 23:10:21.123741  ==

 6820 23:10:21.126547  [Gating] SW mode calibration

 6821 23:10:21.133550  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 16 , u4TDQSCK_UI_min 1, 1:4ExtraMCK 1

 6822 23:10:21.136112  RX_Path_delay_UI(31) -3 - DQSINCTL_UI(20) = u1StartUI(11)

 6823 23:10:21.143045   0 11  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 6824 23:10:21.146645   0 11 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 6825 23:10:21.149462   0 12  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 6826 23:10:21.156514   0 12 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 6827 23:10:21.159524   0 13  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6828 23:10:21.163086   0 13 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6829 23:10:21.169888   0 14  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6830 23:10:21.173475   0 14 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 6831 23:10:21.177006   0 15  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 6832 23:10:21.179722  Total UI for P1: 0, mck2ui 16

 6833 23:10:21.182834  best dqsien dly found for B0: ( 0, 14, 24)

 6834 23:10:21.186644  Total UI for P1: 0, mck2ui 16

 6835 23:10:21.189673  best dqsien dly found for B1: ( 0, 14, 24)

 6836 23:10:21.193147  best DQS0 dly(MCK, UI, PI) = (0, 14, 24)

 6837 23:10:21.196790  best DQS1 dly(MCK, UI, PI) = (0, 14, 24)

 6838 23:10:21.196872  

 6839 23:10:21.199975  best DQS0 P1 dly(MCK, UI, PI) = (1, 0, 24)

 6840 23:10:21.206650  best DQS1 P1 dly(MCK, UI, PI) = (1, 0, 24)

 6841 23:10:21.206732  [Gating] SW calibration Done

 6842 23:10:21.209755  ==

 6843 23:10:21.209837  Dram Type= 6, Freq= 0, CH_1, rank 1

 6844 23:10:21.216167  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6845 23:10:21.216249  ==

 6846 23:10:21.216314  RX Vref Scan: 0

 6847 23:10:21.216374  

 6848 23:10:21.219416  RX Vref 0 -> 0, step: 1

 6849 23:10:21.219498  

 6850 23:10:21.223163  RX Delay -410 -> 252, step: 16

 6851 23:10:21.226365  iDelay=230, Bit 0, Center -35 (-282 ~ 213) 496

 6852 23:10:21.229877  iDelay=230, Bit 1, Center -43 (-298 ~ 213) 512

 6853 23:10:21.237140  iDelay=230, Bit 2, Center -51 (-298 ~ 197) 496

 6854 23:10:21.239595  iDelay=230, Bit 3, Center -35 (-282 ~ 213) 496

 6855 23:10:21.243061  iDelay=230, Bit 4, Center -35 (-282 ~ 213) 496

 6856 23:10:21.246719  iDelay=230, Bit 5, Center -19 (-266 ~ 229) 496

 6857 23:10:21.253330  iDelay=230, Bit 6, Center -19 (-266 ~ 229) 496

 6858 23:10:21.256685  iDelay=230, Bit 7, Center -35 (-282 ~ 213) 496

 6859 23:10:21.260151  iDelay=230, Bit 8, Center -59 (-314 ~ 197) 512

 6860 23:10:21.263187  iDelay=230, Bit 9, Center -51 (-298 ~ 197) 496

 6861 23:10:21.270132  iDelay=230, Bit 10, Center -43 (-298 ~ 213) 512

 6862 23:10:21.273438  iDelay=230, Bit 11, Center -43 (-298 ~ 213) 512

 6863 23:10:21.276856  iDelay=230, Bit 12, Center -35 (-282 ~ 213) 496

 6864 23:10:21.279895  iDelay=230, Bit 13, Center -27 (-282 ~ 229) 512

 6865 23:10:21.286977  iDelay=230, Bit 14, Center -27 (-282 ~ 229) 512

 6866 23:10:21.290161  iDelay=230, Bit 15, Center -27 (-282 ~ 229) 512

 6867 23:10:21.290244  ==

 6868 23:10:21.293599  Dram Type= 6, Freq= 0, CH_1, rank 1

 6869 23:10:21.297142  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6870 23:10:21.297224  ==

 6871 23:10:21.297289  DQS Delay:

 6872 23:10:21.300494  DQS0 = 51, DQS1 = 59

 6873 23:10:21.300601  DQM Delay:

 6874 23:10:21.303605  DQM0 = 17, DQM1 = 20

 6875 23:10:21.303686  DQ Delay:

 6876 23:10:21.306728  DQ0 =16, DQ1 =8, DQ2 =0, DQ3 =16

 6877 23:10:21.310113  DQ4 =16, DQ5 =32, DQ6 =32, DQ7 =16

 6878 23:10:21.313637  DQ8 =0, DQ9 =8, DQ10 =16, DQ11 =16

 6879 23:10:21.316584  DQ12 =24, DQ13 =32, DQ14 =32, DQ15 =32

 6880 23:10:21.316694  

 6881 23:10:21.316795  

 6882 23:10:21.316857  ==

 6883 23:10:21.320059  Dram Type= 6, Freq= 0, CH_1, rank 1

 6884 23:10:21.323529  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6885 23:10:21.323626  ==

 6886 23:10:21.326451  

 6887 23:10:21.326534  

 6888 23:10:21.326598  	TX Vref Scan disable

 6889 23:10:21.329982   == TX Byte 0 ==

 6890 23:10:21.333772  Update DQ  dly =584 (4 ,2, 8)  DQ  OEN =(3 ,3)

 6891 23:10:21.337341  Update DQM dly =584 (4 ,2, 8)  DQM OEN =(3 ,3)

 6892 23:10:21.339966   == TX Byte 1 ==

 6893 23:10:21.343319  Update DQ  dly =584 (4 ,2, 8)  DQ  OEN =(3 ,3)

 6894 23:10:21.346858  Update DQM dly =584 (4 ,2, 8)  DQM OEN =(3 ,3)

 6895 23:10:21.346957  ==

 6896 23:10:21.349993  Dram Type= 6, Freq= 0, CH_1, rank 1

 6897 23:10:21.353478  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6898 23:10:21.357116  ==

 6899 23:10:21.357218  

 6900 23:10:21.357359  

 6901 23:10:21.357447  	TX Vref Scan disable

 6902 23:10:21.360305   == TX Byte 0 ==

 6903 23:10:21.363495  Update DQ  dly =584 (4 ,2, 8)  DQ  OEN =(3 ,3)

 6904 23:10:21.366524  Update DQM dly =584 (4 ,2, 8)  DQM OEN =(3 ,3)

 6905 23:10:21.369935   == TX Byte 1 ==

 6906 23:10:21.373424  Update DQ  dly =584 (4 ,2, 8)  DQ  OEN =(3 ,3)

 6907 23:10:21.376484  Update DQM dly =584 (4 ,2, 8)  DQM OEN =(3 ,3)

 6908 23:10:21.376564  

 6909 23:10:21.376632  [DATLAT]

 6910 23:10:21.380046  Freq=400, CH1 RK1

 6911 23:10:21.380129  

 6912 23:10:21.383213  DATLAT Default: 0xe

 6913 23:10:21.383295  0, 0xFFFF, sum = 0

 6914 23:10:21.386627  1, 0xFFFF, sum = 0

 6915 23:10:21.386710  2, 0xFFFF, sum = 0

 6916 23:10:21.389746  3, 0xFFFF, sum = 0

 6917 23:10:21.389838  4, 0xFFFF, sum = 0

 6918 23:10:21.393347  5, 0xFFFF, sum = 0

 6919 23:10:21.393440  6, 0xFFFF, sum = 0

 6920 23:10:21.396442  7, 0xFFFF, sum = 0

 6921 23:10:21.396525  8, 0xFFFF, sum = 0

 6922 23:10:21.400418  9, 0xFFFF, sum = 0

 6923 23:10:21.400500  10, 0xFFFF, sum = 0

 6924 23:10:21.403193  11, 0xFFFF, sum = 0

 6925 23:10:21.403275  12, 0xFFFF, sum = 0

 6926 23:10:21.406811  13, 0x0, sum = 1

 6927 23:10:21.406894  14, 0x0, sum = 2

 6928 23:10:21.409828  15, 0x0, sum = 3

 6929 23:10:21.409911  16, 0x0, sum = 4

 6930 23:10:21.413094  best_step = 14

 6931 23:10:21.413249  

 6932 23:10:21.413346  ==

 6933 23:10:21.416724  Dram Type= 6, Freq= 0, CH_1, rank 1

 6934 23:10:21.419556  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6935 23:10:21.419639  ==

 6936 23:10:21.423606  RX Vref Scan: 0

 6937 23:10:21.423684  

 6938 23:10:21.423748  RX Vref 0 -> 0, step: 1

 6939 23:10:21.423808  

 6940 23:10:21.426572  RX Delay -359 -> 252, step: 8

 6941 23:10:21.434324  iDelay=217, Bit 0, Center -36 (-279 ~ 208) 488

 6942 23:10:21.437615  iDelay=217, Bit 1, Center -44 (-287 ~ 200) 488

 6943 23:10:21.440964  iDelay=217, Bit 2, Center -52 (-295 ~ 192) 488

 6944 23:10:21.444610  iDelay=217, Bit 3, Center -40 (-279 ~ 200) 480

 6945 23:10:21.451223  iDelay=217, Bit 4, Center -40 (-279 ~ 200) 480

 6946 23:10:21.454492  iDelay=217, Bit 5, Center -24 (-263 ~ 216) 480

 6947 23:10:21.457754  iDelay=217, Bit 6, Center -28 (-271 ~ 216) 488

 6948 23:10:21.460952  iDelay=217, Bit 7, Center -44 (-287 ~ 200) 488

 6949 23:10:21.468004  iDelay=217, Bit 8, Center -56 (-303 ~ 192) 496

 6950 23:10:21.471476  iDelay=217, Bit 9, Center -56 (-303 ~ 192) 496

 6951 23:10:21.474294  iDelay=217, Bit 10, Center -48 (-295 ~ 200) 496

 6952 23:10:21.477719  iDelay=217, Bit 11, Center -56 (-303 ~ 192) 496

 6953 23:10:21.484524  iDelay=217, Bit 12, Center -40 (-279 ~ 200) 480

 6954 23:10:21.487399  iDelay=217, Bit 13, Center -40 (-287 ~ 208) 496

 6955 23:10:21.491382  iDelay=217, Bit 14, Center -40 (-287 ~ 208) 496

 6956 23:10:21.497815  iDelay=217, Bit 15, Center -40 (-287 ~ 208) 496

 6957 23:10:21.497903  ==

 6958 23:10:21.500921  Dram Type= 6, Freq= 0, CH_1, rank 1

 6959 23:10:21.504897  fsp= 0, odt_onoff= 0, Byte mode= 1, DivMode= 2

 6960 23:10:21.504972  ==

 6961 23:10:21.505048  DQS Delay:

 6962 23:10:21.507746  DQS0 = 52, DQS1 = 56

 6963 23:10:21.507817  DQM Delay:

 6964 23:10:21.511011  DQM0 = 13, DQM1 = 9

 6965 23:10:21.511081  DQ Delay:

 6966 23:10:21.514294  DQ0 =16, DQ1 =8, DQ2 =0, DQ3 =12

 6967 23:10:21.517533  DQ4 =12, DQ5 =28, DQ6 =24, DQ7 =8

 6968 23:10:21.520918  DQ8 =0, DQ9 =0, DQ10 =8, DQ11 =0

 6969 23:10:21.524417  DQ12 =16, DQ13 =16, DQ14 =16, DQ15 =16

 6970 23:10:21.524502  

 6971 23:10:21.524570  

 6972 23:10:21.530743  [DQSOSCAuto] RK1, (LSB)MR18= 0x7085, (MSB)MR19= 0xc0c, tDQSOscB0 = 393 ps tDQSOscB1 = 395 ps

 6973 23:10:21.534787  CH1 RK1: MR19=C0C, MR18=7085

 6974 23:10:21.541230  CH1_RK1: MR19=0xC0C, MR18=0x7085, DQSOSC=393, MR23=63, INC=382, DEC=254

 6975 23:10:21.546889  [RxdqsGatingPostProcess] freq 400

 6976 23:10:21.547772  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 6977 23:10:21.551202  best DQS0 dly(2T, 0.5T) = (0, 10)

 6978 23:10:21.554453  best DQS1 dly(2T, 0.5T) = (0, 10)

 6979 23:10:21.557876  best DQS0 P1 dly(2T, 0.5T) = (0, 12)

 6980 23:10:21.561121  best DQS1 P1 dly(2T, 0.5T) = (0, 12)

 6981 23:10:21.564587  best DQS0 dly(2T, 0.5T) = (0, 10)

 6982 23:10:21.567493  best DQS1 dly(2T, 0.5T) = (0, 10)

 6983 23:10:21.570660  best DQS0 P1 dly(2T, 0.5T) = (0, 12)

 6984 23:10:21.574406  best DQS1 P1 dly(2T, 0.5T) = (0, 12)

 6985 23:10:21.578144  Pre-setting of DQS Precalculation

 6986 23:10:21.580899  [DualRankRxdatlatCal] RK0: 14, RK1: 14, Final_Datlat 14

 6987 23:10:21.587893  sync_frequency_calibration_params sync calibration params of frequency 400 to shu:6

 6988 23:10:21.597506  calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464

 6989 23:10:21.597597  

 6990 23:10:21.597664  

 6991 23:10:21.601459  [Calibration Summary] 800 Mbps

 6992 23:10:21.601543  CH 0, Rank 0

 6993 23:10:21.604995  SW Impedance     : PASS

 6994 23:10:21.605078  DUTY Scan        : NO K

 6995 23:10:21.607592  ZQ Calibration   : PASS

 6996 23:10:21.607680  Jitter Meter     : NO K

 6997 23:10:21.610744  CBT Training     : PASS

 6998 23:10:21.614895  Write leveling   : PASS

 6999 23:10:21.615000  RX DQS gating    : PASS

 7000 23:10:21.617805  RX DQ/DQS(RDDQC) : PASS

 7001 23:10:21.621208  TX DQ/DQS        : PASS

 7002 23:10:21.621300  RX DATLAT        : PASS

 7003 23:10:21.624504  RX DQ/DQS(Engine): PASS

 7004 23:10:21.628137  TX OE            : NO K

 7005 23:10:21.628219  All Pass.

 7006 23:10:21.628292  

 7007 23:10:21.628359  CH 0, Rank 1

 7008 23:10:21.630961  SW Impedance     : PASS

 7009 23:10:21.634656  DUTY Scan        : NO K

 7010 23:10:21.634754  ZQ Calibration   : PASS

 7011 23:10:21.637804  Jitter Meter     : NO K

 7012 23:10:21.641621  CBT Training     : PASS

 7013 23:10:21.641693  Write leveling   : NO K

 7014 23:10:21.645077  RX DQS gating    : PASS

 7015 23:10:21.645190  RX DQ/DQS(RDDQC) : PASS

 7016 23:10:21.648219  TX DQ/DQS        : PASS

 7017 23:10:21.651416  RX DATLAT        : PASS

 7018 23:10:21.651497  RX DQ/DQS(Engine): PASS

 7019 23:10:21.654524  TX OE            : NO K

 7020 23:10:21.654608  All Pass.

 7021 23:10:21.654676  

 7022 23:10:21.658292  CH 1, Rank 0

 7023 23:10:21.658409  SW Impedance     : PASS

 7024 23:10:21.661106  DUTY Scan        : NO K

 7025 23:10:21.664539  ZQ Calibration   : PASS

 7026 23:10:21.664622  Jitter Meter     : NO K

 7027 23:10:21.667916  CBT Training     : PASS

 7028 23:10:21.671571  Write leveling   : PASS

 7029 23:10:21.671685  RX DQS gating    : PASS

 7030 23:10:21.674926  RX DQ/DQS(RDDQC) : PASS

 7031 23:10:21.677683  TX DQ/DQS        : PASS

 7032 23:10:21.677794  RX DATLAT        : PASS

 7033 23:10:21.681069  RX DQ/DQS(Engine): PASS

 7034 23:10:21.684573  TX OE            : NO K

 7035 23:10:21.684657  All Pass.

 7036 23:10:21.684723  

 7037 23:10:21.684785  CH 1, Rank 1

 7038 23:10:21.687677  SW Impedance     : PASS

 7039 23:10:21.691235  DUTY Scan        : NO K

 7040 23:10:21.691346  ZQ Calibration   : PASS

 7041 23:10:21.694908  Jitter Meter     : NO K

 7042 23:10:21.694991  CBT Training     : PASS

 7043 23:10:21.698219  Write leveling   : NO K

 7044 23:10:21.701403  RX DQS gating    : PASS

 7045 23:10:21.701487  RX DQ/DQS(RDDQC) : PASS

 7046 23:10:21.704814  TX DQ/DQS        : PASS

 7047 23:10:21.707723  RX DATLAT        : PASS

 7048 23:10:21.707807  RX DQ/DQS(Engine): PASS

 7049 23:10:21.711810  TX OE            : NO K

 7050 23:10:21.711889  All Pass.

 7051 23:10:21.711954  

 7052 23:10:21.714390  DramC Write-DBI off

 7053 23:10:21.718215  	PER_BANK_REFRESH: Hybrid Mode

 7054 23:10:21.718325  TX_TRACKING: ON

 7055 23:10:21.728031  [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 44, TRFC_05T 0, TXREFCNT 58, TRFCpb 16, TRFCpb_05T 0

 7056 23:10:21.730995  [FAST_K] Save calibration result to emmc

 7057 23:10:21.734582  dramc_set_vcore_voltage set vcore to 725000

 7058 23:10:21.737526  Read voltage for 1600, 0

 7059 23:10:21.737626  Vio18 = 0

 7060 23:10:21.737721  Vcore = 725000

 7061 23:10:21.741537  Vdram = 0

 7062 23:10:21.741619  Vddq = 0

 7063 23:10:21.741693  Vmddr = 0

 7064 23:10:21.747912  [FAST_K] DramcSave_Time_For_Cal_Init SHU1, femmc_Ready=0

 7065 23:10:21.751238  [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0

 7066 23:10:21.754567  MEM_TYPE=3, freq_sel=13

 7067 23:10:21.758177  sv_algorithm_assistance_LP4_3733 

 7068 23:10:21.761000  ============ PULL DRAM RESETB DOWN ============

 7069 23:10:21.764284  ========== PULL DRAM RESETB DOWN end =========

 7070 23:10:21.771143  [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5

 7071 23:10:21.774400  =================================== 

 7072 23:10:21.777766  LPDDR4 DRAM CONFIGURATION

 7073 23:10:21.781033  =================================== 

 7074 23:10:21.781110  EX_ROW_EN[0]    = 0x0

 7075 23:10:21.784507  EX_ROW_EN[1]    = 0x0

 7076 23:10:21.784584  LP4Y_EN      = 0x0

 7077 23:10:21.787332  WORK_FSP     = 0x1

 7078 23:10:21.787410  WL           = 0x5

 7079 23:10:21.790936  RL           = 0x5

 7080 23:10:21.791014  BL           = 0x2

 7081 23:10:21.794499  RPST         = 0x0

 7082 23:10:21.794571  RD_PRE       = 0x0

 7083 23:10:21.798185  WR_PRE       = 0x1

 7084 23:10:21.798260  WR_PST       = 0x1

 7085 23:10:21.802010  DBI_WR       = 0x0

 7086 23:10:21.802085  DBI_RD       = 0x0

 7087 23:10:21.804394  OTF          = 0x1

 7088 23:10:21.807467  =================================== 

 7089 23:10:21.811121  =================================== 

 7090 23:10:21.811196  ANA top config

 7091 23:10:21.814276  =================================== 

 7092 23:10:21.817472  DLL_ASYNC_EN            =  0

 7093 23:10:21.821153  ALL_SLAVE_EN            =  0

 7094 23:10:21.824430  NEW_RANK_MODE           =  1

 7095 23:10:21.824514  DLL_IDLE_MODE           =  1

 7096 23:10:21.828074  LP45_APHY_COMB_EN       =  1

 7097 23:10:21.831255  TX_ODT_DIS              =  0

 7098 23:10:21.834285  NEW_8X_MODE             =  1

 7099 23:10:21.837544  =================================== 

 7100 23:10:21.841582  =================================== 

 7101 23:10:21.844331  data_rate                  = 3200

 7102 23:10:21.844419  CKR                        = 1

 7103 23:10:21.848145  DQ_P2S_RATIO               = 8

 7104 23:10:21.851214  =================================== 

 7105 23:10:21.854855  CA_P2S_RATIO               = 8

 7106 23:10:21.858285  DQ_CA_OPEN                 = 0

 7107 23:10:21.861053  DQ_SEMI_OPEN               = 0

 7108 23:10:21.861137  CA_SEMI_OPEN               = 0

 7109 23:10:21.864484  CA_FULL_RATE               = 0

 7110 23:10:21.867866  DQ_CKDIV4_EN               = 0

 7111 23:10:21.871322  CA_CKDIV4_EN               = 0

 7112 23:10:21.874899  CA_PREDIV_EN               = 0

 7113 23:10:21.877958  PH8_DLY                    = 12

 7114 23:10:21.878042  SEMI_OPEN_CA_PICK_MCK_RATIO= 0

 7115 23:10:21.881129  DQ_AAMCK_DIV               = 4

 7116 23:10:21.884539  CA_AAMCK_DIV               = 4

 7117 23:10:21.888145  CA_ADMCK_DIV               = 4

 7118 23:10:21.891488  DQ_TRACK_CA_EN             = 0

 7119 23:10:21.894411  CA_PICK                    = 1600

 7120 23:10:21.898237  CA_MCKIO                   = 1600

 7121 23:10:21.898321  MCKIO_SEMI                 = 0

 7122 23:10:21.901663  PLL_FREQ                   = 3068

 7123 23:10:21.904745  DQ_UI_PI_RATIO             = 32

 7124 23:10:21.908244  CA_UI_PI_RATIO             = 0

 7125 23:10:21.911421  =================================== 

 7126 23:10:21.914769  =================================== 

 7127 23:10:21.918119  memory_type:LPDDR4         

 7128 23:10:21.918203  GP_NUM     : 10       

 7129 23:10:21.921398  SRAM_EN    : 1       

 7130 23:10:21.921503  MD32_EN    : 0       

 7131 23:10:21.924715  =================================== 

 7132 23:10:21.928059  [ANA_INIT] >>>>>>>>>>>>>> 

 7133 23:10:21.931418  <<<<<< [CONFIGURE PHASE]: ANA_TX

 7134 23:10:21.934585  >>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL

 7135 23:10:21.938254  =================================== 

 7136 23:10:21.941335  data_rate = 3200,PCW = 0X7600

 7137 23:10:21.945260  =================================== 

 7138 23:10:21.948259  <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLL

 7139 23:10:21.952001  >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration

 7140 23:10:21.958090  <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration

 7141 23:10:21.961689  >>>>>> [CONFIGURE PHASE][SHUFFLE]: Add DLL Gain = 2

 7142 23:10:21.968317  >>>>>> [CONFIGURE PHASE][SHUFFLE]: DLL

 7143 23:10:21.971749  <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL

 7144 23:10:21.971834  [ANA_INIT] flow start 

 7145 23:10:21.975066  [ANA_INIT] PLL >>>>>>>> 

 7146 23:10:21.978236  [ANA_INIT] PLL <<<<<<<< 

 7147 23:10:21.978312  [ANA_INIT] MIDPI >>>>>>>> 

 7148 23:10:21.981417  [ANA_INIT] MIDPI <<<<<<<< 

 7149 23:10:21.984761  [ANA_INIT] DLL >>>>>>>> 

 7150 23:10:21.984838  [ANA_INIT] DLL <<<<<<<< 

 7151 23:10:21.988431  [ANA_INIT] flow end 

 7152 23:10:21.991602  ============ LP4 DIFF to SE enter ============

 7153 23:10:21.994807  ============ LP4 DIFF to SE exit  ============

 7154 23:10:21.998636  [ANA_INIT] <<<<<<<<<<<<< 

 7155 23:10:22.002056  [Flow] Enable top DCM control >>>>> 

 7156 23:10:22.005318  [Flow] Enable top DCM control <<<<< 

 7157 23:10:22.008769  Enable DLL master slave shuffle 

 7158 23:10:22.015289  ============================================================== 

 7159 23:10:22.015369  Gating Mode config

 7160 23:10:22.021659  ============================================================== 

 7161 23:10:22.021776  Config description: 

 7162 23:10:22.031828  RX_GATING_MODE        0: Pulse Mode      1: Burst Mode(8UI)        2: Burst Mode(7UI)  3: Original Burst Mode

 7163 23:10:22.038884  RX_GATING_TRACK_MODE  0: Valid DLY Mode  1: Valid Mode (-like) 2: FIFO mode

 7164 23:10:22.045002  SELPH_MODE            0: By rank         1: By Phase 

 7165 23:10:22.048915  ============================================================== 

 7166 23:10:22.051714  GAT_TRACK_EN                 =  1

 7167 23:10:22.055575  RX_GATING_MODE               =  2

 7168 23:10:22.058431  RX_GATING_TRACK_MODE         =  2

 7169 23:10:22.062592  SELPH_MODE                   =  1

 7170 23:10:22.065452  PICG_EARLY_EN                =  1

 7171 23:10:22.068956  VALID_LAT_VALUE              =  1

 7172 23:10:22.072101  ============================================================== 

 7173 23:10:22.075102  Enter into Gating configuration >>>> 

 7174 23:10:22.078367  Exit from Gating configuration <<<< 

 7175 23:10:22.082219  Enter into  DVFS_PRE_config >>>>> 

 7176 23:10:22.095075  Because of DLL_ASYNC_EN for indenpendent DLL NOT enable, salve channel's DVFS_DLL_CHA should set 0 to follow master CH's DLL. 

 7177 23:10:22.095167  Exit from  DVFS_PRE_config <<<<< 

 7178 23:10:22.098483  Enter into PICG configuration >>>> 

 7179 23:10:22.102025  Exit from PICG configuration <<<< 

 7180 23:10:22.104979  [RX_INPUT] configuration >>>>> 

 7181 23:10:22.108982  [RX_INPUT] configuration <<<<< 

 7182 23:10:22.115000  [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 >>>>>

 7183 23:10:22.118341  [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id: 0, group_id: 0 <<<<<

 7184 23:10:22.125293  [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 >>>>>

 7185 23:10:22.132293  [DIG_FREQ_CONFIG][IMPDANCE][Configuration] ch_id: 0, group_id: 0 <<<<<

 7186 23:10:22.138528  [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 >>>>>

 7187 23:10:22.145263  [DIG_FREQ_CONFIG][RX_INPUT][Configuration] ch_id: 0, group_id: 0 <<<<<

 7188 23:10:22.148613  [DIG_SHUF_CONFIG] MISC >>>>>, group_id= 0 

 7189 23:10:22.151675  [DIG_SHUF_CONFIG] MISC <<<<<<, group_id= 0 

 7190 23:10:22.155146  [DIG_SHUF_CONFIG] DQSG_RETRY >>>>>>, group_id= 0 

 7191 23:10:22.161788  [DIG_SHUF_CONFIG] DQSG_RETRY <<<<<<, group_id= 0 

 7192 23:10:22.165095  [DIG_SHUF_CONFIG] DBI >>>>>>, group_id= 0 

 7193 23:10:22.168562  [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5

 7194 23:10:22.171617  =================================== 

 7195 23:10:22.175098  LPDDR4 DRAM CONFIGURATION

 7196 23:10:22.178765  =================================== 

 7197 23:10:22.178843  EX_ROW_EN[0]    = 0x0

 7198 23:10:22.182163  EX_ROW_EN[1]    = 0x0

 7199 23:10:22.182247  LP4Y_EN      = 0x0

 7200 23:10:22.185486  WORK_FSP     = 0x1

 7201 23:10:22.185560  WL           = 0x5

 7202 23:10:22.188572  RL           = 0x5

 7203 23:10:22.192009  BL           = 0x2

 7204 23:10:22.192112  RPST         = 0x0

 7205 23:10:22.195186  RD_PRE       = 0x0

 7206 23:10:22.195297  WR_PRE       = 0x1

 7207 23:10:22.198654  WR_PST       = 0x1

 7208 23:10:22.198762  DBI_WR       = 0x0

 7209 23:10:22.201897  DBI_RD       = 0x0

 7210 23:10:22.201972  OTF          = 0x1

 7211 23:10:22.205739  =================================== 

 7212 23:10:22.208460  [DIG_SHUF_CONFIG] DBI <<<<<<, group_id= 0 

 7213 23:10:22.216311  [DIG_SHUF_CONFIG] DVFSRLWL >>>>>>, group_id= 0 

 7214 23:10:22.218664  [ModeRegister RLWL Config] data_rate:3200-MR2_RLWL:5

 7215 23:10:22.222280  =================================== 

 7216 23:10:22.225377  LPDDR4 DRAM CONFIGURATION

 7217 23:10:22.228632  =================================== 

 7218 23:10:22.228746  EX_ROW_EN[0]    = 0x10

 7219 23:10:22.231816  EX_ROW_EN[1]    = 0x0

 7220 23:10:22.231920  LP4Y_EN      = 0x0

 7221 23:10:22.235454  WORK_FSP     = 0x1

 7222 23:10:22.235563  WL           = 0x5

 7223 23:10:22.238783  RL           = 0x5

 7224 23:10:22.238896  BL           = 0x2

 7225 23:10:22.241904  RPST         = 0x0

 7226 23:10:22.242008  RD_PRE       = 0x0

 7227 23:10:22.245106  WR_PRE       = 0x1

 7228 23:10:22.245210  WR_PST       = 0x1

 7229 23:10:22.248717  DBI_WR       = 0x0

 7230 23:10:22.248825  DBI_RD       = 0x0

 7231 23:10:22.251935  OTF          = 0x1

 7232 23:10:22.255692  =================================== 

 7233 23:10:22.262258  [test_sa.c]====>ch_id: 0, group_id: 0, DPI_TBA_DVFS_WLRL_setting Exit

 7234 23:10:22.262352  ==

 7235 23:10:22.265096  Dram Type= 6, Freq= 0, CH_0, rank 0

 7236 23:10:22.268779  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7237 23:10:22.268865  ==

 7238 23:10:22.272491  [Duty_Offset_Calibration]

 7239 23:10:22.272572  	B0:2	B1:-1	CA:1

 7240 23:10:22.272637  

 7241 23:10:22.275699  [DutyScan_Calibration_Flow] k_type=0

 7242 23:10:22.285223  

 7243 23:10:22.285334  ==CLK 0==

 7244 23:10:22.289121  Final CLK duty delay cell = -4

 7245 23:10:22.292086  [-4] MAX Duty = 5031%(X100), DQS PI = 22

 7246 23:10:22.295542  [-4] MIN Duty = 4844%(X100), DQS PI = 32

 7247 23:10:22.298706  [-4] AVG Duty = 4937%(X100)

 7248 23:10:22.298827  

 7249 23:10:22.302284  CH0 CLK Duty spec in!! Max-Min= 187%

 7250 23:10:22.305371  [DutyScan_Calibration_Flow] ====Done====

 7251 23:10:22.305463  

 7252 23:10:22.309235  [DutyScan_Calibration_Flow] k_type=1

 7253 23:10:22.325131  

 7254 23:10:22.325266  ==DQS 0 ==

 7255 23:10:22.328260  Final DQS duty delay cell = 0

 7256 23:10:22.331911  [0] MAX Duty = 5125%(X100), DQS PI = 56

 7257 23:10:22.335635  [0] MIN Duty = 5000%(X100), DQS PI = 14

 7258 23:10:22.338316  [0] AVG Duty = 5062%(X100)

 7259 23:10:22.338437  

 7260 23:10:22.338535  ==DQS 1 ==

 7261 23:10:22.341918  Final DQS duty delay cell = -4

 7262 23:10:22.344842  [-4] MAX Duty = 5093%(X100), DQS PI = 0

 7263 23:10:22.348210  [-4] MIN Duty = 5031%(X100), DQS PI = 8

 7264 23:10:22.351462  [-4] AVG Duty = 5062%(X100)

 7265 23:10:22.351572  

 7266 23:10:22.355082  CH0 DQS 0 Duty spec in!! Max-Min= 125%

 7267 23:10:22.355166  

 7268 23:10:22.358253  CH0 DQS 1 Duty spec in!! Max-Min= 62%

 7269 23:10:22.361529  [DutyScan_Calibration_Flow] ====Done====

 7270 23:10:22.361612  

 7271 23:10:22.365574  [DutyScan_Calibration_Flow] k_type=3

 7272 23:10:22.382227  

 7273 23:10:22.382311  ==DQM 0 ==

 7274 23:10:22.385839  Final DQM duty delay cell = 0

 7275 23:10:22.389108  [0] MAX Duty = 5000%(X100), DQS PI = 20

 7276 23:10:22.392569  [0] MIN Duty = 4875%(X100), DQS PI = 4

 7277 23:10:22.392654  [0] AVG Duty = 4937%(X100)

 7278 23:10:22.395765  

 7279 23:10:22.395848  ==DQM 1 ==

 7280 23:10:22.398973  Final DQM duty delay cell = 0

 7281 23:10:22.402251  [0] MAX Duty = 5187%(X100), DQS PI = 60

 7282 23:10:22.405900  [0] MIN Duty = 4969%(X100), DQS PI = 18

 7283 23:10:22.405984  [0] AVG Duty = 5078%(X100)

 7284 23:10:22.409048  

 7285 23:10:22.412354  CH0 DQM 0 Duty spec in!! Max-Min= 125%

 7286 23:10:22.412456  

 7287 23:10:22.416024  CH0 DQM 1 Duty spec in!! Max-Min= 218%

 7288 23:10:22.419434  [DutyScan_Calibration_Flow] ====Done====

 7289 23:10:22.419517  

 7290 23:10:22.422315  [DutyScan_Calibration_Flow] k_type=2

 7291 23:10:22.438961  

 7292 23:10:22.439048  ==DQ 0 ==

 7293 23:10:22.442524  Final DQ duty delay cell = -4

 7294 23:10:22.445174  [-4] MAX Duty = 5031%(X100), DQS PI = 56

 7295 23:10:22.448646  [-4] MIN Duty = 4844%(X100), DQS PI = 12

 7296 23:10:22.451914  [-4] AVG Duty = 4937%(X100)

 7297 23:10:22.452009  

 7298 23:10:22.452075  ==DQ 1 ==

 7299 23:10:22.455564  Final DQ duty delay cell = 0

 7300 23:10:22.459388  [0] MAX Duty = 5031%(X100), DQS PI = 30

 7301 23:10:22.462420  [0] MIN Duty = 4938%(X100), DQS PI = 4

 7302 23:10:22.462516  [0] AVG Duty = 4984%(X100)

 7303 23:10:22.462581  

 7304 23:10:22.466047  CH0 DQ 0 Duty spec in!! Max-Min= 187%

 7305 23:10:22.469115  

 7306 23:10:22.472246  CH0 DQ 1 Duty spec in!! Max-Min= 93%

 7307 23:10:22.475373  [DutyScan_Calibration_Flow] ====Done====

 7308 23:10:22.475447  ==

 7309 23:10:22.479048  Dram Type= 6, Freq= 0, CH_1, rank 0

 7310 23:10:22.482124  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7311 23:10:22.482195  ==

 7312 23:10:22.485510  [Duty_Offset_Calibration]

 7313 23:10:22.485583  	B0:1	B1:1	CA:2

 7314 23:10:22.485644  

 7315 23:10:22.489021  [DutyScan_Calibration_Flow] k_type=0

 7316 23:10:22.499372  

 7317 23:10:22.499450  ==CLK 0==

 7318 23:10:22.502229  Final CLK duty delay cell = 0

 7319 23:10:22.505842  [0] MAX Duty = 5156%(X100), DQS PI = 24

 7320 23:10:22.509783  [0] MIN Duty = 4938%(X100), DQS PI = 56

 7321 23:10:22.509857  [0] AVG Duty = 5047%(X100)

 7322 23:10:22.512685  

 7323 23:10:22.512760  CH1 CLK Duty spec in!! Max-Min= 218%

 7324 23:10:22.519384  [DutyScan_Calibration_Flow] ====Done====

 7325 23:10:22.519468  

 7326 23:10:22.522713  [DutyScan_Calibration_Flow] k_type=1

 7327 23:10:22.538907  

 7328 23:10:22.538987  ==DQS 0 ==

 7329 23:10:22.542587  Final DQS duty delay cell = 0

 7330 23:10:22.545932  [0] MAX Duty = 5062%(X100), DQS PI = 20

 7331 23:10:22.549501  [0] MIN Duty = 4813%(X100), DQS PI = 52

 7332 23:10:22.552337  [0] AVG Duty = 4937%(X100)

 7333 23:10:22.552412  

 7334 23:10:22.552473  ==DQS 1 ==

 7335 23:10:22.555068  Final DQS duty delay cell = 0

 7336 23:10:22.558865  [0] MAX Duty = 5062%(X100), DQS PI = 34

 7337 23:10:22.561981  [0] MIN Duty = 4938%(X100), DQS PI = 12

 7338 23:10:22.565328  [0] AVG Duty = 5000%(X100)

 7339 23:10:22.565400  

 7340 23:10:22.569102  CH1 DQS 0 Duty spec in!! Max-Min= 249%

 7341 23:10:22.569182  

 7342 23:10:22.571691  CH1 DQS 1 Duty spec in!! Max-Min= 124%

 7343 23:10:22.575285  [DutyScan_Calibration_Flow] ====Done====

 7344 23:10:22.575359  

 7345 23:10:22.578600  [DutyScan_Calibration_Flow] k_type=3

 7346 23:10:22.596040  

 7347 23:10:22.596124  ==DQM 0 ==

 7348 23:10:22.599908  Final DQM duty delay cell = 0

 7349 23:10:22.603381  [0] MAX Duty = 5156%(X100), DQS PI = 20

 7350 23:10:22.606316  [0] MIN Duty = 4844%(X100), DQS PI = 50

 7351 23:10:22.606453  [0] AVG Duty = 5000%(X100)

 7352 23:10:22.609671  

 7353 23:10:22.609749  ==DQM 1 ==

 7354 23:10:22.612705  Final DQM duty delay cell = 0

 7355 23:10:22.615952  [0] MAX Duty = 5187%(X100), DQS PI = 60

 7356 23:10:22.619207  [0] MIN Duty = 4875%(X100), DQS PI = 20

 7357 23:10:22.619284  [0] AVG Duty = 5031%(X100)

 7358 23:10:22.622692  

 7359 23:10:22.626220  CH1 DQM 0 Duty spec in!! Max-Min= 312%

 7360 23:10:22.626326  

 7361 23:10:22.629340  CH1 DQM 1 Duty spec in!! Max-Min= 312%

 7362 23:10:22.632714  [DutyScan_Calibration_Flow] ====Done====

 7363 23:10:22.632797  

 7364 23:10:22.636327  [DutyScan_Calibration_Flow] k_type=2

 7365 23:10:22.652924  

 7366 23:10:22.653008  ==DQ 0 ==

 7367 23:10:22.656338  Final DQ duty delay cell = 0

 7368 23:10:22.659633  [0] MAX Duty = 5156%(X100), DQS PI = 22

 7369 23:10:22.662745  [0] MIN Duty = 4907%(X100), DQS PI = 54

 7370 23:10:22.662826  [0] AVG Duty = 5031%(X100)

 7371 23:10:22.662929  

 7372 23:10:22.666381  ==DQ 1 ==

 7373 23:10:22.669523  Final DQ duty delay cell = 0

 7374 23:10:22.673121  [0] MAX Duty = 5093%(X100), DQS PI = 6

 7375 23:10:22.676452  [0] MIN Duty = 5031%(X100), DQS PI = 0

 7376 23:10:22.676533  [0] AVG Duty = 5062%(X100)

 7377 23:10:22.676596  

 7378 23:10:22.679707  CH1 DQ 0 Duty spec in!! Max-Min= 249%

 7379 23:10:22.679790  

 7380 23:10:22.682843  CH1 DQ 1 Duty spec in!! Max-Min= 62%

 7381 23:10:22.689641  [DutyScan_Calibration_Flow] ====Done====

 7382 23:10:22.693243  nWR fixed to 30

 7383 23:10:22.693324  [ModeRegInit_LP4] CH0 RK0

 7384 23:10:22.696108  [ModeRegInit_LP4] CH0 RK1

 7385 23:10:22.700105  [ModeRegInit_LP4] CH1 RK0

 7386 23:10:22.700185  [ModeRegInit_LP4] CH1 RK1

 7387 23:10:22.702564  match AC timing 5

 7388 23:10:22.706229  dramType 5, freq 1600, readDBI 0, DivMode 1, cbtMode 1

 7389 23:10:22.709336  SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON

 7390 23:10:22.716798  [WriteLatency GET] Version:0-MR_RL_field_value:5-WL:14

 7391 23:10:22.720126  [TX_path_calculate] data rate=3200, WL=14, DQS_TotalUI=29

 7392 23:10:22.726353  [TX_path_calculate] DQS = (3,5) DQS_OE = (3,2)

 7393 23:10:22.726467  [MiockJmeterHQA]

 7394 23:10:22.726532  

 7395 23:10:22.729524  [DramcMiockJmeter] u1RxGatingPI = 0

 7396 23:10:22.729611  0 : 4368, 4142

 7397 23:10:22.732900  4 : 4257, 4029

 7398 23:10:22.732991  8 : 4252, 4027

 7399 23:10:22.736306  12 : 4253, 4027

 7400 23:10:22.736402  16 : 4363, 4137

 7401 23:10:22.739809  20 : 4252, 4027

 7402 23:10:22.739885  24 : 4252, 4027

 7403 23:10:22.739948  28 : 4253, 4027

 7404 23:10:22.743201  32 : 4255, 4029

 7405 23:10:22.743279  36 : 4252, 4027

 7406 23:10:22.746086  40 : 4252, 4027

 7407 23:10:22.746158  44 : 4366, 4139

 7408 23:10:22.750046  48 : 4253, 4027

 7409 23:10:22.750143  52 : 4254, 4029

 7410 23:10:22.752795  56 : 4253, 4026

 7411 23:10:22.752868  60 : 4363, 4138

 7412 23:10:22.752928  64 : 4252, 4027

 7413 23:10:22.756734  68 : 4361, 4137

 7414 23:10:22.756818  72 : 4250, 4027

 7415 23:10:22.759955  76 : 4250, 4026

 7416 23:10:22.760038  80 : 4250, 4027

 7417 23:10:22.763233  84 : 4252, 4029

 7418 23:10:22.763315  88 : 4361, 4137

 7419 23:10:22.763381  92 : 4250, 4027

 7420 23:10:22.766993  96 : 4360, 3365

 7421 23:10:22.767077  100 : 4250, 0

 7422 23:10:22.769920  104 : 4360, 0

 7423 23:10:22.770003  108 : 4363, 0

 7424 23:10:22.770069  112 : 4250, 0

 7425 23:10:22.773276  116 : 4250, 0

 7426 23:10:22.773360  120 : 4253, 0

 7427 23:10:22.776975  124 : 4250, 0

 7428 23:10:22.777058  128 : 4361, 0

 7429 23:10:22.777129  132 : 4250, 0

 7430 23:10:22.779934  136 : 4250, 0

 7431 23:10:22.780017  140 : 4253, 0

 7432 23:10:22.780083  144 : 4363, 0

 7433 23:10:22.783460  148 : 4250, 0

 7434 23:10:22.783543  152 : 4360, 0

 7435 23:10:22.786390  156 : 4361, 0

 7436 23:10:22.786511  160 : 4363, 0

 7437 23:10:22.786577  164 : 4250, 0

 7438 23:10:22.790351  168 : 4250, 0

 7439 23:10:22.790485  172 : 4253, 0

 7440 23:10:22.793331  176 : 4250, 0

 7441 23:10:22.793414  180 : 4250, 0

 7442 23:10:22.793513  184 : 4253, 0

 7443 23:10:22.796765  188 : 4250, 0

 7444 23:10:22.796874  192 : 4360, 0

 7445 23:10:22.800432  196 : 4250, 0

 7446 23:10:22.800514  200 : 4250, 0

 7447 23:10:22.800586  204 : 4250, 0

 7448 23:10:22.803255  208 : 4250, 0

 7449 23:10:22.803338  212 : 4253, 85

 7450 23:10:22.807287  216 : 4361, 3739

 7451 23:10:22.807370  220 : 4250, 4027

 7452 23:10:22.809659  224 : 4250, 4027

 7453 23:10:22.809741  228 : 4363, 4140

 7454 23:10:22.809807  232 : 4361, 4137

 7455 23:10:22.813563  236 : 4250, 4027

 7456 23:10:22.813646  240 : 4250, 4027

 7457 23:10:22.816678  244 : 4253, 4029

 7458 23:10:22.816761  248 : 4250, 4027

 7459 23:10:22.819571  252 : 4250, 4027

 7460 23:10:22.819654  256 : 4250, 4027

 7461 23:10:22.823347  260 : 4253, 4030

 7462 23:10:22.823430  264 : 4250, 4027

 7463 23:10:22.826682  268 : 4361, 4137

 7464 23:10:22.826764  272 : 4361, 4137

 7465 23:10:22.830111  276 : 4250, 4026

 7466 23:10:22.830194  280 : 4363, 4139

 7467 23:10:22.833718  284 : 4361, 4137

 7468 23:10:22.833802  288 : 4249, 4027

 7469 23:10:22.833868  292 : 4250, 4027

 7470 23:10:22.836673  296 : 4253, 4029

 7471 23:10:22.836757  300 : 4250, 4027

 7472 23:10:22.839857  304 : 4250, 4027

 7473 23:10:22.839940  308 : 4250, 4027

 7474 23:10:22.843090  312 : 4253, 4029

 7475 23:10:22.843173  316 : 4250, 4027

 7476 23:10:22.846527  320 : 4360, 4138

 7477 23:10:22.846610  324 : 4361, 4137

 7478 23:10:22.849681  328 : 4250, 4026

 7479 23:10:22.849764  332 : 4363, 2947

 7480 23:10:22.849830  336 : 4361, 41

 7481 23:10:22.853666  

 7482 23:10:22.853747  	MIOCK jitter meter	ch=0

 7483 23:10:22.853811  

 7484 23:10:22.856669  1T = (336-100) = 236 dly cells

 7485 23:10:22.863228  Clock freq = 1534 MHz, period = 651 ps, 1 dly cell = 275/100 ps

 7486 23:10:22.863307  ==

 7487 23:10:22.866553  Dram Type= 6, Freq= 0, CH_0, rank 0

 7488 23:10:22.869764  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7489 23:10:22.869847  ==

 7490 23:10:22.876732  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 7491 23:10:22.880180  [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=1

 7492 23:10:22.883445  [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=1

 7493 23:10:22.889686  u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32

 7494 23:10:22.899367  [CA 0] Center 44 (14~75) winsize 62

 7495 23:10:22.902879  [CA 1] Center 43 (13~74) winsize 62

 7496 23:10:22.906127  [CA 2] Center 39 (10~68) winsize 59

 7497 23:10:22.909226  [CA 3] Center 38 (9~68) winsize 60

 7498 23:10:22.912666  [CA 4] Center 37 (7~67) winsize 61

 7499 23:10:22.915797  [CA 5] Center 37 (7~67) winsize 61

 7500 23:10:22.915871  

 7501 23:10:22.919182  [CmdBusTrainingLP45] Vref(ca) range 0: 32

 7502 23:10:22.919264  

 7503 23:10:22.922587  [CATrainingPosCal] consider 1 rank data

 7504 23:10:22.925408  u2DelayCellTimex100 = 275/100 ps

 7505 23:10:22.929697  CA0 delay=44 (14~75),Diff = 7 PI (24 cell)

 7506 23:10:22.935903  CA1 delay=43 (13~74),Diff = 6 PI (21 cell)

 7507 23:10:22.938888  CA2 delay=39 (10~68),Diff = 2 PI (7 cell)

 7508 23:10:22.942714  CA3 delay=38 (9~68),Diff = 1 PI (3 cell)

 7509 23:10:22.945871  CA4 delay=37 (7~67),Diff = 0 PI (0 cell)

 7510 23:10:22.949125  CA5 delay=37 (7~67),Diff = 0 PI (0 cell)

 7511 23:10:22.949201  

 7512 23:10:22.952140  CA PerBit enable=1, Macro0, CA PI delay=37

 7513 23:10:22.952222  

 7514 23:10:22.955278  [CBTSetCACLKResult] CA Dly = 37

 7515 23:10:22.959503  CS Dly: 10 (0~41)

 7516 23:10:22.962596  [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=0

 7517 23:10:22.965542  [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=0

 7518 23:10:22.965622  ==

 7519 23:10:22.968650  Dram Type= 6, Freq= 0, CH_0, rank 1

 7520 23:10:22.972094  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7521 23:10:22.975352  ==

 7522 23:10:22.978662  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 7523 23:10:22.981841  [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=1

 7524 23:10:22.988515  [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=1

 7525 23:10:22.995662  u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32

 7526 23:10:23.003151  [CA 0] Center 43 (13~74) winsize 62

 7527 23:10:23.006138  [CA 1] Center 43 (13~74) winsize 62

 7528 23:10:23.009463  [CA 2] Center 39 (10~69) winsize 60

 7529 23:10:23.012784  [CA 3] Center 38 (9~68) winsize 60

 7530 23:10:23.016179  [CA 4] Center 37 (7~67) winsize 61

 7531 23:10:23.019637  [CA 5] Center 37 (7~67) winsize 61

 7532 23:10:23.019718  

 7533 23:10:23.022672  [CmdBusTrainingLP45] Vref(ca) range 0: 32

 7534 23:10:23.022754  

 7535 23:10:23.026589  [CATrainingPosCal] consider 2 rank data

 7536 23:10:23.029307  u2DelayCellTimex100 = 275/100 ps

 7537 23:10:23.033212  CA0 delay=44 (14~74),Diff = 7 PI (24 cell)

 7538 23:10:23.039570  CA1 delay=43 (13~74),Diff = 6 PI (21 cell)

 7539 23:10:23.042633  CA2 delay=39 (10~68),Diff = 2 PI (7 cell)

 7540 23:10:23.046346  CA3 delay=38 (9~68),Diff = 1 PI (3 cell)

 7541 23:10:23.049599  CA4 delay=37 (7~67),Diff = 0 PI (0 cell)

 7542 23:10:23.053110  CA5 delay=37 (7~67),Diff = 0 PI (0 cell)

 7543 23:10:23.053191  

 7544 23:10:23.056077  CA PerBit enable=1, Macro0, CA PI delay=37

 7545 23:10:23.056158  

 7546 23:10:23.059417  [CBTSetCACLKResult] CA Dly = 37

 7547 23:10:23.062860  CS Dly: 11 (0~43)

 7548 23:10:23.066223  [DramcModeRegInit_CATerm] CH0 RK0 bWorkAround=0

 7549 23:10:23.069212  [DramcModeRegInit_CATerm] CH0 RK1 bWorkAround=0

 7550 23:10:23.069293  

 7551 23:10:23.073279  ----->DramcWriteLeveling(PI) begin...

 7552 23:10:23.073378  ==

 7553 23:10:23.075943  Dram Type= 6, Freq= 0, CH_0, rank 0

 7554 23:10:23.079426  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7555 23:10:23.083007  ==

 7556 23:10:23.083088  Write leveling (Byte 0): 31 => 31

 7557 23:10:23.086622  Write leveling (Byte 1): 28 => 28

 7558 23:10:23.090260  DramcWriteLeveling(PI) end<-----

 7559 23:10:23.090341  

 7560 23:10:23.090476  ==

 7561 23:10:23.093126  Dram Type= 6, Freq= 0, CH_0, rank 0

 7562 23:10:23.099751  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7563 23:10:23.099833  ==

 7564 23:10:23.099898  [Gating] SW mode calibration

 7565 23:10:23.109289  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0

 7566 23:10:23.112612  RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)

 7567 23:10:23.116402   1  4  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 7568 23:10:23.122898   1  4  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 7569 23:10:23.126016   1  4  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 7570 23:10:23.129213   1  4 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 7571 23:10:23.136147   1  4 16 | B1->B0 | 2323 2727 | 0 0 | (0 0) (0 0)

 7572 23:10:23.139917   1  4 20 | B1->B0 | 2424 3333 | 1 1 | (0 0) (1 1)

 7573 23:10:23.142776   1  4 24 | B1->B0 | 3030 3434 | 0 1 | (0 0) (1 1)

 7574 23:10:23.149609   1  4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 7575 23:10:23.153124   1  5  0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 7576 23:10:23.156120   1  5  4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 7577 23:10:23.163294   1  5  8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 7578 23:10:23.166492   1  5 12 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 7579 23:10:23.169864   1  5 16 | B1->B0 | 3434 3030 | 1 0 | (1 1) (0 0)

 7580 23:10:23.176243   1  5 20 | B1->B0 | 3434 2424 | 1 0 | (1 0) (0 0)

 7581 23:10:23.179543   1  5 24 | B1->B0 | 2d2d 2323 | 0 0 | (0 1) (0 0)

 7582 23:10:23.183430   1  5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 7583 23:10:23.189620   1  6  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 7584 23:10:23.192656   1  6  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 7585 23:10:23.195920   1  6  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 7586 23:10:23.202757   1  6 12 | B1->B0 | 2323 2525 | 0 1 | (0 0) (0 0)

 7587 23:10:23.206255   1  6 16 | B1->B0 | 2323 3030 | 0 0 | (0 0) (0 0)

 7588 23:10:23.209978   1  6 20 | B1->B0 | 2929 4646 | 0 0 | (0 0) (0 0)

 7589 23:10:23.212899   1  6 24 | B1->B0 | 3f3f 4646 | 0 0 | (0 0) (0 0)

 7590 23:10:23.219987   1  6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 7591 23:10:23.222906   1  7  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 7592 23:10:23.226183   1  7  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 7593 23:10:23.232848   1  7  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 7594 23:10:23.235943   1  7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 7595 23:10:23.239410   1  7 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 7596 23:10:23.246261   1  7 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 7597 23:10:23.249858   1  7 24 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)

 7598 23:10:23.252872   1  7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 7599 23:10:23.259391   1  8  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 7600 23:10:23.263207   1  8  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 7601 23:10:23.266563   1  8  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 7602 23:10:23.272958   1  8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 7603 23:10:23.276576   1  8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 7604 23:10:23.279686   1  8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 7605 23:10:23.283243   1  8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 7606 23:10:23.289750   1  8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 7607 23:10:23.293354   1  9  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 7608 23:10:23.296742   1  9  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 7609 23:10:23.303491   1  9  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 7610 23:10:23.306548   1  9 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 7611 23:10:23.310231   1  9 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

 7612 23:10:23.316797   1  9 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (1 0)

 7613 23:10:23.319792   1  9 24 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)

 7614 23:10:23.323125  Total UI for P1: 0, mck2ui 16

 7615 23:10:23.326576  best dqsien dly found for B0: ( 1,  9, 18)

 7616 23:10:23.329681   1  9 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 7617 23:10:23.333114  Total UI for P1: 0, mck2ui 16

 7618 23:10:23.337065  best dqsien dly found for B1: ( 1,  9, 22)

 7619 23:10:23.339850  best DQS0 dly(MCK, UI, PI) = (1, 9, 18)

 7620 23:10:23.343277  best DQS1 dly(MCK, UI, PI) = (1, 9, 22)

 7621 23:10:23.343349  

 7622 23:10:23.349994  best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 18)

 7623 23:10:23.353246  best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 22)

 7624 23:10:23.356409  [Gating] SW calibration Done

 7625 23:10:23.356479  ==

 7626 23:10:23.359426  Dram Type= 6, Freq= 0, CH_0, rank 0

 7627 23:10:23.363026  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7628 23:10:23.363120  ==

 7629 23:10:23.363220  RX Vref Scan: 0

 7630 23:10:23.363292  

 7631 23:10:23.366290  RX Vref 0 -> 0, step: 1

 7632 23:10:23.366383  

 7633 23:10:23.369615  RX Delay 0 -> 252, step: 8

 7634 23:10:23.373163  iDelay=200, Bit 0, Center 131 (80 ~ 183) 104

 7635 23:10:23.376649  iDelay=200, Bit 1, Center 135 (80 ~ 191) 112

 7636 23:10:23.379654  iDelay=200, Bit 2, Center 127 (72 ~ 183) 112

 7637 23:10:23.386740  iDelay=200, Bit 3, Center 127 (72 ~ 183) 112

 7638 23:10:23.389647  iDelay=200, Bit 4, Center 135 (80 ~ 191) 112

 7639 23:10:23.393277  iDelay=200, Bit 5, Center 119 (64 ~ 175) 112

 7640 23:10:23.396799  iDelay=200, Bit 6, Center 143 (88 ~ 199) 112

 7641 23:10:23.399558  iDelay=200, Bit 7, Center 139 (88 ~ 191) 104

 7642 23:10:23.406810  iDelay=200, Bit 8, Center 111 (56 ~ 167) 112

 7643 23:10:23.409375  iDelay=200, Bit 9, Center 115 (64 ~ 167) 104

 7644 23:10:23.413005  iDelay=200, Bit 10, Center 123 (72 ~ 175) 104

 7645 23:10:23.416264  iDelay=200, Bit 11, Center 119 (72 ~ 167) 96

 7646 23:10:23.419295  iDelay=200, Bit 12, Center 131 (72 ~ 191) 120

 7647 23:10:23.426061  iDelay=200, Bit 13, Center 131 (80 ~ 183) 104

 7648 23:10:23.429402  iDelay=200, Bit 14, Center 135 (80 ~ 191) 112

 7649 23:10:23.433291  iDelay=200, Bit 15, Center 135 (80 ~ 191) 112

 7650 23:10:23.433381  ==

 7651 23:10:23.436424  Dram Type= 6, Freq= 0, CH_0, rank 0

 7652 23:10:23.439387  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7653 23:10:23.439472  ==

 7654 23:10:23.442939  DQS Delay:

 7655 23:10:23.443012  DQS0 = 0, DQS1 = 0

 7656 23:10:23.446281  DQM Delay:

 7657 23:10:23.446350  DQM0 = 132, DQM1 = 125

 7658 23:10:23.449788  DQ Delay:

 7659 23:10:23.452596  DQ0 =131, DQ1 =135, DQ2 =127, DQ3 =127

 7660 23:10:23.455867  DQ4 =135, DQ5 =119, DQ6 =143, DQ7 =139

 7661 23:10:23.459585  DQ8 =111, DQ9 =115, DQ10 =123, DQ11 =119

 7662 23:10:23.462949  DQ12 =131, DQ13 =131, DQ14 =135, DQ15 =135

 7663 23:10:23.463087  

 7664 23:10:23.463153  

 7665 23:10:23.463212  ==

 7666 23:10:23.465992  Dram Type= 6, Freq= 0, CH_0, rank 0

 7667 23:10:23.469452  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7668 23:10:23.469524  ==

 7669 23:10:23.469583  

 7670 23:10:23.469640  

 7671 23:10:23.472885  	TX Vref Scan disable

 7672 23:10:23.476144   == TX Byte 0 ==

 7673 23:10:23.479231  Update DQ  dly =988 (3 ,6, 28)  DQ  OEN =(3 ,3)

 7674 23:10:23.482833  Update DQM dly =988 (3 ,6, 28)  DQM OEN =(3 ,3)

 7675 23:10:23.486264   == TX Byte 1 ==

 7676 23:10:23.489475  Update DQ  dly =984 (3 ,6, 24)  DQ  OEN =(3 ,3)

 7677 23:10:23.492830  Update DQM dly =984 (3 ,6, 24)  DQM OEN =(3 ,3)

 7678 23:10:23.492901  ==

 7679 23:10:23.497016  Dram Type= 6, Freq= 0, CH_0, rank 0

 7680 23:10:23.499667  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7681 23:10:23.502595  ==

 7682 23:10:23.515339  

 7683 23:10:23.518795  TX Vref early break, caculate TX vref

 7684 23:10:23.522092  TX Vref=16, minBit 0, minWin=21, winSum=359

 7685 23:10:23.525363  TX Vref=18, minBit 7, minWin=21, winSum=371

 7686 23:10:23.529261  TX Vref=20, minBit 1, minWin=22, winSum=381

 7687 23:10:23.531961  TX Vref=22, minBit 7, minWin=21, winSum=389

 7688 23:10:23.535470  TX Vref=24, minBit 1, minWin=23, winSum=399

 7689 23:10:23.541696  TX Vref=26, minBit 1, minWin=23, winSum=409

 7690 23:10:23.545395  TX Vref=28, minBit 7, minWin=24, winSum=415

 7691 23:10:23.548959  TX Vref=30, minBit 0, minWin=25, winSum=412

 7692 23:10:23.552119  TX Vref=32, minBit 4, minWin=23, winSum=404

 7693 23:10:23.554946  TX Vref=34, minBit 4, minWin=23, winSum=397

 7694 23:10:23.558366  TX Vref=36, minBit 4, minWin=23, winSum=392

 7695 23:10:23.565393  [TxChooseVref] Worse bit 0, Min win 25, Win sum 412, Final Vref 30

 7696 23:10:23.565469  

 7697 23:10:23.568851  Final TX Range 0 Vref 30

 7698 23:10:23.568923  

 7699 23:10:23.568997  ==

 7700 23:10:23.572660  Dram Type= 6, Freq= 0, CH_0, rank 0

 7701 23:10:23.575353  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7702 23:10:23.575424  ==

 7703 23:10:23.575485  

 7704 23:10:23.575542  

 7705 23:10:23.578903  	TX Vref Scan disable

 7706 23:10:23.585507  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =275/100 ps

 7707 23:10:23.585584   == TX Byte 0 ==

 7708 23:10:23.588742  u2DelayCellOfst[0]=14 cells (4 PI)

 7709 23:10:23.591993  u2DelayCellOfst[1]=21 cells (6 PI)

 7710 23:10:23.595267  u2DelayCellOfst[2]=10 cells (3 PI)

 7711 23:10:23.598760  u2DelayCellOfst[3]=14 cells (4 PI)

 7712 23:10:23.601864  u2DelayCellOfst[4]=10 cells (3 PI)

 7713 23:10:23.605387  u2DelayCellOfst[5]=0 cells (0 PI)

 7714 23:10:23.608952  u2DelayCellOfst[6]=17 cells (5 PI)

 7715 23:10:23.611955  u2DelayCellOfst[7]=17 cells (5 PI)

 7716 23:10:23.615156  Update DQ  dly =986 (3 ,6, 26)  DQ  OEN =(3 ,3)

 7717 23:10:23.618818  Update DQM dly =989 (3 ,6, 29)  DQM OEN =(3 ,3)

 7718 23:10:23.621945   == TX Byte 1 ==

 7719 23:10:23.622043  u2DelayCellOfst[8]=0 cells (0 PI)

 7720 23:10:23.625965  u2DelayCellOfst[9]=3 cells (1 PI)

 7721 23:10:23.628914  u2DelayCellOfst[10]=7 cells (2 PI)

 7722 23:10:23.631822  u2DelayCellOfst[11]=0 cells (0 PI)

 7723 23:10:23.635680  u2DelayCellOfst[12]=14 cells (4 PI)

 7724 23:10:23.638701  u2DelayCellOfst[13]=14 cells (4 PI)

 7725 23:10:23.642053  u2DelayCellOfst[14]=17 cells (5 PI)

 7726 23:10:23.645143  u2DelayCellOfst[15]=14 cells (4 PI)

 7727 23:10:23.648822  Update DQ  dly =982 (3 ,6, 22)  DQ  OEN =(3 ,3)

 7728 23:10:23.655196  Update DQM dly =984 (3 ,6, 24)  DQM OEN =(3 ,3)

 7729 23:10:23.655311  DramC Write-DBI on

 7730 23:10:23.655403  ==

 7731 23:10:23.658576  Dram Type= 6, Freq= 0, CH_0, rank 0

 7732 23:10:23.661849  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7733 23:10:23.661931  ==

 7734 23:10:23.665050  

 7735 23:10:23.665139  

 7736 23:10:23.665214  	TX Vref Scan disable

 7737 23:10:23.668580   == TX Byte 0 ==

 7738 23:10:23.672066  Update DQM dly =733 (2 ,6, 29)  DQM OEN =(3 ,3)

 7739 23:10:23.675396   == TX Byte 1 ==

 7740 23:10:23.678533  Update DQM dly =726 (2 ,6, 22)  DQM OEN =(3 ,3)

 7741 23:10:23.682322  DramC Write-DBI off

 7742 23:10:23.682420  

 7743 23:10:23.682499  [DATLAT]

 7744 23:10:23.682558  Freq=1600, CH0 RK0

 7745 23:10:23.682652  

 7746 23:10:23.684963  DATLAT Default: 0xf

 7747 23:10:23.685042  0, 0xFFFF, sum = 0

 7748 23:10:23.688289  1, 0xFFFF, sum = 0

 7749 23:10:23.688371  2, 0xFFFF, sum = 0

 7750 23:10:23.692262  3, 0xFFFF, sum = 0

 7751 23:10:23.695802  4, 0xFFFF, sum = 0

 7752 23:10:23.695920  5, 0xFFFF, sum = 0

 7753 23:10:23.698765  6, 0xFFFF, sum = 0

 7754 23:10:23.698844  7, 0xFFFF, sum = 0

 7755 23:10:23.701854  8, 0xFFFF, sum = 0

 7756 23:10:23.701932  9, 0xFFFF, sum = 0

 7757 23:10:23.705082  10, 0xFFFF, sum = 0

 7758 23:10:23.705160  11, 0xFFFF, sum = 0

 7759 23:10:23.708408  12, 0xFFFF, sum = 0

 7760 23:10:23.708480  13, 0xFFFF, sum = 0

 7761 23:10:23.711832  14, 0x0, sum = 1

 7762 23:10:23.711921  15, 0x0, sum = 2

 7763 23:10:23.715516  16, 0x0, sum = 3

 7764 23:10:23.715599  17, 0x0, sum = 4

 7765 23:10:23.718703  best_step = 15

 7766 23:10:23.718795  

 7767 23:10:23.718860  ==

 7768 23:10:23.722247  Dram Type= 6, Freq= 0, CH_0, rank 0

 7769 23:10:23.725548  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7770 23:10:23.725625  ==

 7771 23:10:23.725689  RX Vref Scan: 1

 7772 23:10:23.725747  

 7773 23:10:23.728567  Set Vref Range= 24 -> 127

 7774 23:10:23.728647  

 7775 23:10:23.731899  RX Vref 24 -> 127, step: 1

 7776 23:10:23.731984  

 7777 23:10:23.735387  RX Delay 11 -> 252, step: 4

 7778 23:10:23.735470  

 7779 23:10:23.739098  Set Vref, RX VrefLevel [Byte0]: 24

 7780 23:10:23.742235                           [Byte1]: 24

 7781 23:10:23.742317  

 7782 23:10:23.745397  Set Vref, RX VrefLevel [Byte0]: 25

 7783 23:10:23.749525                           [Byte1]: 25

 7784 23:10:23.749609  

 7785 23:10:23.752284  Set Vref, RX VrefLevel [Byte0]: 26

 7786 23:10:23.755501                           [Byte1]: 26

 7787 23:10:23.759323  

 7788 23:10:23.759406  Set Vref, RX VrefLevel [Byte0]: 27

 7789 23:10:23.762252                           [Byte1]: 27

 7790 23:10:23.766516  

 7791 23:10:23.766599  Set Vref, RX VrefLevel [Byte0]: 28

 7792 23:10:23.770140                           [Byte1]: 28

 7793 23:10:23.774363  

 7794 23:10:23.774488  Set Vref, RX VrefLevel [Byte0]: 29

 7795 23:10:23.777263                           [Byte1]: 29

 7796 23:10:23.781820  

 7797 23:10:23.781937  Set Vref, RX VrefLevel [Byte0]: 30

 7798 23:10:23.785108                           [Byte1]: 30

 7799 23:10:23.789358  

 7800 23:10:23.789440  Set Vref, RX VrefLevel [Byte0]: 31

 7801 23:10:23.792851                           [Byte1]: 31

 7802 23:10:23.797330  

 7803 23:10:23.797412  Set Vref, RX VrefLevel [Byte0]: 32

 7804 23:10:23.800913                           [Byte1]: 32

 7805 23:10:23.804848  

 7806 23:10:23.804930  Set Vref, RX VrefLevel [Byte0]: 33

 7807 23:10:23.808382                           [Byte1]: 33

 7808 23:10:23.812639  

 7809 23:10:23.812721  Set Vref, RX VrefLevel [Byte0]: 34

 7810 23:10:23.815798                           [Byte1]: 34

 7811 23:10:23.820185  

 7812 23:10:23.820270  Set Vref, RX VrefLevel [Byte0]: 35

 7813 23:10:23.823357                           [Byte1]: 35

 7814 23:10:23.827580  

 7815 23:10:23.827662  Set Vref, RX VrefLevel [Byte0]: 36

 7816 23:10:23.830659                           [Byte1]: 36

 7817 23:10:23.835385  

 7818 23:10:23.835467  Set Vref, RX VrefLevel [Byte0]: 37

 7819 23:10:23.838587                           [Byte1]: 37

 7820 23:10:23.843173  

 7821 23:10:23.843255  Set Vref, RX VrefLevel [Byte0]: 38

 7822 23:10:23.845879                           [Byte1]: 38

 7823 23:10:23.850555  

 7824 23:10:23.850653  Set Vref, RX VrefLevel [Byte0]: 39

 7825 23:10:23.853677                           [Byte1]: 39

 7826 23:10:23.858266  

 7827 23:10:23.858374  Set Vref, RX VrefLevel [Byte0]: 40

 7828 23:10:23.861571                           [Byte1]: 40

 7829 23:10:23.865747  

 7830 23:10:23.865829  Set Vref, RX VrefLevel [Byte0]: 41

 7831 23:10:23.869479                           [Byte1]: 41

 7832 23:10:23.873304  

 7833 23:10:23.873386  Set Vref, RX VrefLevel [Byte0]: 42

 7834 23:10:23.876278                           [Byte1]: 42

 7835 23:10:23.880737  

 7836 23:10:23.880819  Set Vref, RX VrefLevel [Byte0]: 43

 7837 23:10:23.884342                           [Byte1]: 43

 7838 23:10:23.888512  

 7839 23:10:23.888594  Set Vref, RX VrefLevel [Byte0]: 44

 7840 23:10:23.891838                           [Byte1]: 44

 7841 23:10:23.896138  

 7842 23:10:23.896220  Set Vref, RX VrefLevel [Byte0]: 45

 7843 23:10:23.899663                           [Byte1]: 45

 7844 23:10:23.904257  

 7845 23:10:23.904338  Set Vref, RX VrefLevel [Byte0]: 46

 7846 23:10:23.907515                           [Byte1]: 46

 7847 23:10:23.911265  

 7848 23:10:23.911347  Set Vref, RX VrefLevel [Byte0]: 47

 7849 23:10:23.914441                           [Byte1]: 47

 7850 23:10:23.919355  

 7851 23:10:23.919435  Set Vref, RX VrefLevel [Byte0]: 48

 7852 23:10:23.922177                           [Byte1]: 48

 7853 23:10:23.927014  

 7854 23:10:23.927106  Set Vref, RX VrefLevel [Byte0]: 49

 7855 23:10:23.930108                           [Byte1]: 49

 7856 23:10:23.933960  

 7857 23:10:23.934047  Set Vref, RX VrefLevel [Byte0]: 50

 7858 23:10:23.937422                           [Byte1]: 50

 7859 23:10:23.941430  

 7860 23:10:23.941513  Set Vref, RX VrefLevel [Byte0]: 51

 7861 23:10:23.945059                           [Byte1]: 51

 7862 23:10:23.949862  

 7863 23:10:23.949945  Set Vref, RX VrefLevel [Byte0]: 52

 7864 23:10:23.952660                           [Byte1]: 52

 7865 23:10:23.956773  

 7866 23:10:23.956850  Set Vref, RX VrefLevel [Byte0]: 53

 7867 23:10:23.960738                           [Byte1]: 53

 7868 23:10:23.964698  

 7869 23:10:23.964783  Set Vref, RX VrefLevel [Byte0]: 54

 7870 23:10:23.967553                           [Byte1]: 54

 7871 23:10:23.972081  

 7872 23:10:23.972162  Set Vref, RX VrefLevel [Byte0]: 55

 7873 23:10:23.978596                           [Byte1]: 55

 7874 23:10:23.978679  

 7875 23:10:23.982341  Set Vref, RX VrefLevel [Byte0]: 56

 7876 23:10:23.985209                           [Byte1]: 56

 7877 23:10:23.985291  

 7878 23:10:23.988420  Set Vref, RX VrefLevel [Byte0]: 57

 7879 23:10:23.991683                           [Byte1]: 57

 7880 23:10:23.991766  

 7881 23:10:23.994969  Set Vref, RX VrefLevel [Byte0]: 58

 7882 23:10:23.998663                           [Byte1]: 58

 7883 23:10:24.002770  

 7884 23:10:24.002862  Set Vref, RX VrefLevel [Byte0]: 59

 7885 23:10:24.006254                           [Byte1]: 59

 7886 23:10:24.010301  

 7887 23:10:24.010418  Set Vref, RX VrefLevel [Byte0]: 60

 7888 23:10:24.013850                           [Byte1]: 60

 7889 23:10:24.017841  

 7890 23:10:24.017926  Set Vref, RX VrefLevel [Byte0]: 61

 7891 23:10:24.021143                           [Byte1]: 61

 7892 23:10:24.025509  

 7893 23:10:24.025592  Set Vref, RX VrefLevel [Byte0]: 62

 7894 23:10:24.028899                           [Byte1]: 62

 7895 23:10:24.033409  

 7896 23:10:24.033493  Set Vref, RX VrefLevel [Byte0]: 63

 7897 23:10:24.036538                           [Byte1]: 63

 7898 23:10:24.041143  

 7899 23:10:24.041226  Set Vref, RX VrefLevel [Byte0]: 64

 7900 23:10:24.043910                           [Byte1]: 64

 7901 23:10:24.048309  

 7902 23:10:24.048394  Set Vref, RX VrefLevel [Byte0]: 65

 7903 23:10:24.052464                           [Byte1]: 65

 7904 23:10:24.055813  

 7905 23:10:24.055896  Set Vref, RX VrefLevel [Byte0]: 66

 7906 23:10:24.059394                           [Byte1]: 66

 7907 23:10:24.063541  

 7908 23:10:24.063623  Set Vref, RX VrefLevel [Byte0]: 67

 7909 23:10:24.066684                           [Byte1]: 67

 7910 23:10:24.070915  

 7911 23:10:24.071057  Set Vref, RX VrefLevel [Byte0]: 68

 7912 23:10:24.074526                           [Byte1]: 68

 7913 23:10:24.079276  

 7914 23:10:24.079358  Set Vref, RX VrefLevel [Byte0]: 69

 7915 23:10:24.081924                           [Byte1]: 69

 7916 23:10:24.086630  

 7917 23:10:24.086713  Set Vref, RX VrefLevel [Byte0]: 70

 7918 23:10:24.089772                           [Byte1]: 70

 7919 23:10:24.093762  

 7920 23:10:24.093861  Set Vref, RX VrefLevel [Byte0]: 71

 7921 23:10:24.097426                           [Byte1]: 71

 7922 23:10:24.101716  

 7923 23:10:24.101805  Set Vref, RX VrefLevel [Byte0]: 72

 7924 23:10:24.104854                           [Byte1]: 72

 7925 23:10:24.109253  

 7926 23:10:24.109357  Set Vref, RX VrefLevel [Byte0]: 73

 7927 23:10:24.112416                           [Byte1]: 73

 7928 23:10:24.116948  

 7929 23:10:24.117049  Set Vref, RX VrefLevel [Byte0]: 74

 7930 23:10:24.120182                           [Byte1]: 74

 7931 23:10:24.124498  

 7932 23:10:24.124572  Set Vref, RX VrefLevel [Byte0]: 75

 7933 23:10:24.127776                           [Byte1]: 75

 7934 23:10:24.131774  

 7935 23:10:24.131857  Set Vref, RX VrefLevel [Byte0]: 76

 7936 23:10:24.135295                           [Byte1]: 76

 7937 23:10:24.139746  

 7938 23:10:24.139827  Final RX Vref Byte 0 = 56 to rank0

 7939 23:10:24.143381  Final RX Vref Byte 1 = 60 to rank0

 7940 23:10:24.146159  Final RX Vref Byte 0 = 56 to rank1

 7941 23:10:24.149782  Final RX Vref Byte 1 = 60 to rank1==

 7942 23:10:24.153097  Dram Type= 6, Freq= 0, CH_0, rank 0

 7943 23:10:24.159718  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7944 23:10:24.159802  ==

 7945 23:10:24.159868  DQS Delay:

 7946 23:10:24.159928  DQS0 = 0, DQS1 = 0

 7947 23:10:24.162964  DQM Delay:

 7948 23:10:24.163046  DQM0 = 129, DQM1 = 122

 7949 23:10:24.166252  DQ Delay:

 7950 23:10:24.169375  DQ0 =128, DQ1 =132, DQ2 =122, DQ3 =126

 7951 23:10:24.173087  DQ4 =132, DQ5 =120, DQ6 =136, DQ7 =138

 7952 23:10:24.176585  DQ8 =110, DQ9 =110, DQ10 =122, DQ11 =118

 7953 23:10:24.179715  DQ12 =128, DQ13 =126, DQ14 =132, DQ15 =132

 7954 23:10:24.179796  

 7955 23:10:24.179861  

 7956 23:10:24.179921  

 7957 23:10:24.182750  [DramC_TX_OE_Calibration] TA2

 7958 23:10:24.186515  Original DQ_B0 (3 6) =30, OEN = 27

 7959 23:10:24.189868  Original DQ_B1 (3 6) =30, OEN = 27

 7960 23:10:24.193030  24, 0x0, End_B0=24 End_B1=24

 7961 23:10:24.193138  25, 0x0, End_B0=25 End_B1=25

 7962 23:10:24.196019  26, 0x0, End_B0=26 End_B1=26

 7963 23:10:24.200046  27, 0x0, End_B0=27 End_B1=27

 7964 23:10:24.202941  28, 0x0, End_B0=28 End_B1=28

 7965 23:10:24.203047  29, 0x0, End_B0=29 End_B1=29

 7966 23:10:24.206279  30, 0x0, End_B0=30 End_B1=30

 7967 23:10:24.210033  31, 0x4141, End_B0=30 End_B1=30

 7968 23:10:24.213026  Byte0 end_step=30  best_step=27

 7969 23:10:24.216008  Byte1 end_step=30  best_step=27

 7970 23:10:24.219661  Byte0 TX OE(2T, 0.5T) = (3, 3)

 7971 23:10:24.219765  Byte1 TX OE(2T, 0.5T) = (3, 3)

 7972 23:10:24.219861  

 7973 23:10:24.223128  

 7974 23:10:24.229966  [DQSOSCAuto] RK0, (LSB)MR18= 0x1509, (MSB)MR19= 0x303, tDQSOscB0 = 405 ps tDQSOscB1 = 399 ps

 7975 23:10:24.232850  CH0 RK0: MR19=303, MR18=1509

 7976 23:10:24.240159  CH0_RK0: MR19=0x303, MR18=0x1509, DQSOSC=399, MR23=63, INC=23, DEC=15

 7977 23:10:24.240299  

 7978 23:10:24.243371  ----->DramcWriteLeveling(PI) begin...

 7979 23:10:24.243477  ==

 7980 23:10:24.246593  Dram Type= 6, Freq= 0, CH_0, rank 1

 7981 23:10:24.250171  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7982 23:10:24.250275  ==

 7983 23:10:24.252973  Write leveling (Byte 0): 33 => 33

 7984 23:10:24.256777  Write leveling (Byte 1): 28 => 28

 7985 23:10:24.259798  DramcWriteLeveling(PI) end<-----

 7986 23:10:24.259880  

 7987 23:10:24.259945  ==

 7988 23:10:24.263110  Dram Type= 6, Freq= 0, CH_0, rank 1

 7989 23:10:24.266644  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 7990 23:10:24.266727  ==

 7991 23:10:24.270141  [Gating] SW mode calibration

 7992 23:10:24.276879  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0

 7993 23:10:24.283316  RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)

 7994 23:10:24.286627   1  4  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 7995 23:10:24.290083   1  4  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 7996 23:10:24.296783   1  4  8 | B1->B0 | 2323 2424 | 0 0 | (0 0) (0 0)

 7997 23:10:24.299985   1  4 12 | B1->B0 | 2323 2f2f | 0 0 | (0 0) (0 0)

 7998 23:10:24.302972   1  4 16 | B1->B0 | 2323 3434 | 0 1 | (0 0) (1 1)

 7999 23:10:24.306359   1  4 20 | B1->B0 | 2828 3434 | 1 1 | (1 1) (1 1)

 8000 23:10:24.313832   1  4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 8001 23:10:24.317137   1  4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 8002 23:10:24.320024   1  5  0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 8003 23:10:24.326867   1  5  4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)

 8004 23:10:24.330524   1  5  8 | B1->B0 | 3434 2f2f | 1 1 | (1 1) (1 0)

 8005 23:10:24.333079   1  5 12 | B1->B0 | 3434 2525 | 1 0 | (1 1) (1 0)

 8006 23:10:24.339986   1  5 16 | B1->B0 | 3434 2323 | 1 0 | (1 1) (0 0)

 8007 23:10:24.343450   1  5 20 | B1->B0 | 2e2e 2323 | 1 0 | (1 0) (0 0)

 8008 23:10:24.346550   1  5 24 | B1->B0 | 2525 2323 | 0 0 | (0 0) (0 0)

 8009 23:10:24.353547   1  5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8010 23:10:24.356945   1  6  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8011 23:10:24.360023   1  6  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8012 23:10:24.366603   1  6  8 | B1->B0 | 2323 2e2e | 0 0 | (0 0) (0 0)

 8013 23:10:24.370806   1  6 12 | B1->B0 | 2323 4545 | 0 0 | (0 0) (0 0)

 8014 23:10:24.373661   1  6 16 | B1->B0 | 2323 4646 | 0 0 | (0 0) (0 0)

 8015 23:10:24.376639   1  6 20 | B1->B0 | 3938 4646 | 1 0 | (0 0) (0 0)

 8016 23:10:24.383414   1  6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8017 23:10:24.386921   1  6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8018 23:10:24.390061   1  7  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8019 23:10:24.396805   1  7  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8020 23:10:24.400988   1  7  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 8021 23:10:24.403631   1  7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 8022 23:10:24.410882   1  7 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 1)

 8023 23:10:24.413948   1  7 20 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)

 8024 23:10:24.417102   1  7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8025 23:10:24.423961   1  7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8026 23:10:24.427453   1  8  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8027 23:10:24.430968   1  8  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8028 23:10:24.437163   1  8  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8029 23:10:24.440588   1  8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8030 23:10:24.443942   1  8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8031 23:10:24.446908   1  8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8032 23:10:24.453679   1  8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8033 23:10:24.457049   1  8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8034 23:10:24.460251   1  9  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8035 23:10:24.467120   1  9  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8036 23:10:24.470756   1  9  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

 8037 23:10:24.474612   1  9 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

 8038 23:10:24.480327   1  9 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (0 0)

 8039 23:10:24.483620  Total UI for P1: 0, mck2ui 16

 8040 23:10:24.487410  best dqsien dly found for B0: ( 1,  9, 10)

 8041 23:10:24.490527   1  9 20 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)

 8042 23:10:24.493901   1  9 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8043 23:10:24.497622  Total UI for P1: 0, mck2ui 16

 8044 23:10:24.500457  best dqsien dly found for B1: ( 1,  9, 20)

 8045 23:10:24.503656  best DQS0 dly(MCK, UI, PI) = (1, 9, 10)

 8046 23:10:24.507285  best DQS1 dly(MCK, UI, PI) = (1, 9, 20)

 8047 23:10:24.507369  

 8048 23:10:24.514200  best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 10)

 8049 23:10:24.517438  best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 20)

 8050 23:10:24.517513  [Gating] SW calibration Done

 8051 23:10:24.520601  ==

 8052 23:10:24.523778  Dram Type= 6, Freq= 0, CH_0, rank 1

 8053 23:10:24.527373  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8054 23:10:24.527454  ==

 8055 23:10:24.527517  RX Vref Scan: 0

 8056 23:10:24.527592  

 8057 23:10:24.530663  RX Vref 0 -> 0, step: 1

 8058 23:10:24.530777  

 8059 23:10:24.534090  RX Delay 0 -> 252, step: 8

 8060 23:10:24.537476  iDelay=200, Bit 0, Center 131 (72 ~ 191) 120

 8061 23:10:24.540505  iDelay=200, Bit 1, Center 131 (72 ~ 191) 120

 8062 23:10:24.544490  iDelay=200, Bit 2, Center 127 (72 ~ 183) 112

 8063 23:10:24.550629  iDelay=200, Bit 3, Center 131 (72 ~ 191) 120

 8064 23:10:24.554004  iDelay=200, Bit 4, Center 131 (72 ~ 191) 120

 8065 23:10:24.557278  iDelay=200, Bit 5, Center 115 (56 ~ 175) 120

 8066 23:10:24.561120  iDelay=200, Bit 6, Center 139 (80 ~ 199) 120

 8067 23:10:24.564178  iDelay=200, Bit 7, Center 139 (80 ~ 199) 120

 8068 23:10:24.570260  iDelay=200, Bit 8, Center 115 (56 ~ 175) 120

 8069 23:10:24.573762  iDelay=200, Bit 9, Center 115 (56 ~ 175) 120

 8070 23:10:24.577573  iDelay=200, Bit 10, Center 123 (64 ~ 183) 120

 8071 23:10:24.580566  iDelay=200, Bit 11, Center 119 (64 ~ 175) 112

 8072 23:10:24.584482  iDelay=200, Bit 12, Center 127 (72 ~ 183) 112

 8073 23:10:24.591186  iDelay=200, Bit 13, Center 131 (72 ~ 191) 120

 8074 23:10:24.594073  iDelay=200, Bit 14, Center 135 (80 ~ 191) 112

 8075 23:10:24.598386  iDelay=200, Bit 15, Center 131 (72 ~ 191) 120

 8076 23:10:24.598532  ==

 8077 23:10:24.601996  Dram Type= 6, Freq= 0, CH_0, rank 1

 8078 23:10:24.604343  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8079 23:10:24.604418  ==

 8080 23:10:24.607447  DQS Delay:

 8081 23:10:24.607522  DQS0 = 0, DQS1 = 0

 8082 23:10:24.607600  DQM Delay:

 8083 23:10:24.610800  DQM0 = 130, DQM1 = 124

 8084 23:10:24.610880  DQ Delay:

 8085 23:10:24.614013  DQ0 =131, DQ1 =131, DQ2 =127, DQ3 =131

 8086 23:10:24.617880  DQ4 =131, DQ5 =115, DQ6 =139, DQ7 =139

 8087 23:10:24.624056  DQ8 =115, DQ9 =115, DQ10 =123, DQ11 =119

 8088 23:10:24.627743  DQ12 =127, DQ13 =131, DQ14 =135, DQ15 =131

 8089 23:10:24.627817  

 8090 23:10:24.627880  

 8091 23:10:24.627939  ==

 8092 23:10:24.631231  Dram Type= 6, Freq= 0, CH_0, rank 1

 8093 23:10:24.634304  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8094 23:10:24.634375  ==

 8095 23:10:24.634491  

 8096 23:10:24.634551  

 8097 23:10:24.637253  	TX Vref Scan disable

 8098 23:10:24.640667   == TX Byte 0 ==

 8099 23:10:24.644000  Update DQ  dly =989 (3 ,6, 29)  DQ  OEN =(3 ,3)

 8100 23:10:24.647451  Update DQM dly =989 (3 ,6, 29)  DQM OEN =(3 ,3)

 8101 23:10:24.647522   == TX Byte 1 ==

 8102 23:10:24.654405  Update DQ  dly =984 (3 ,6, 24)  DQ  OEN =(3 ,3)

 8103 23:10:24.657542  Update DQM dly =984 (3 ,6, 24)  DQM OEN =(3 ,3)

 8104 23:10:24.657641  ==

 8105 23:10:24.661716  Dram Type= 6, Freq= 0, CH_0, rank 1

 8106 23:10:24.664959  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8107 23:10:24.665045  ==

 8108 23:10:24.679770  

 8109 23:10:24.683064  TX Vref early break, caculate TX vref

 8110 23:10:24.686177  TX Vref=16, minBit 3, minWin=22, winSum=371

 8111 23:10:24.689517  TX Vref=18, minBit 0, minWin=23, winSum=382

 8112 23:10:24.692971  TX Vref=20, minBit 0, minWin=24, winSum=396

 8113 23:10:24.696205  TX Vref=22, minBit 0, minWin=24, winSum=401

 8114 23:10:24.699662  TX Vref=24, minBit 1, minWin=24, winSum=409

 8115 23:10:24.706792  TX Vref=26, minBit 0, minWin=25, winSum=418

 8116 23:10:24.709775  TX Vref=28, minBit 0, minWin=25, winSum=420

 8117 23:10:24.713188  TX Vref=30, minBit 2, minWin=25, winSum=419

 8118 23:10:24.716010  TX Vref=32, minBit 4, minWin=24, winSum=414

 8119 23:10:24.719695  TX Vref=34, minBit 4, minWin=23, winSum=404

 8120 23:10:24.722996  TX Vref=36, minBit 0, minWin=23, winSum=389

 8121 23:10:24.729590  [TxChooseVref] Worse bit 0, Min win 25, Win sum 420, Final Vref 28

 8122 23:10:24.729674  

 8123 23:10:24.732965  Final TX Range 0 Vref 28

 8124 23:10:24.733049  

 8125 23:10:24.733134  ==

 8126 23:10:24.736357  Dram Type= 6, Freq= 0, CH_0, rank 1

 8127 23:10:24.739865  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8128 23:10:24.739971  ==

 8129 23:10:24.740067  

 8130 23:10:24.740155  

 8131 23:10:24.743176  	TX Vref Scan disable

 8132 23:10:24.749413  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =275/100 ps

 8133 23:10:24.749495   == TX Byte 0 ==

 8134 23:10:24.753220  u2DelayCellOfst[0]=14 cells (4 PI)

 8135 23:10:24.756333  u2DelayCellOfst[1]=17 cells (5 PI)

 8136 23:10:24.760083  u2DelayCellOfst[2]=10 cells (3 PI)

 8137 23:10:24.763189  u2DelayCellOfst[3]=10 cells (3 PI)

 8138 23:10:24.766372  u2DelayCellOfst[4]=10 cells (3 PI)

 8139 23:10:24.769465  u2DelayCellOfst[5]=0 cells (0 PI)

 8140 23:10:24.773061  u2DelayCellOfst[6]=17 cells (5 PI)

 8141 23:10:24.776742  u2DelayCellOfst[7]=17 cells (5 PI)

 8142 23:10:24.780131  Update DQ  dly =987 (3 ,6, 27)  DQ  OEN =(3 ,3)

 8143 23:10:24.783441  Update DQM dly =989 (3 ,6, 29)  DQM OEN =(3 ,3)

 8144 23:10:24.786369   == TX Byte 1 ==

 8145 23:10:24.786510  u2DelayCellOfst[8]=0 cells (0 PI)

 8146 23:10:24.789923  u2DelayCellOfst[9]=0 cells (0 PI)

 8147 23:10:24.792949  u2DelayCellOfst[10]=7 cells (2 PI)

 8148 23:10:24.796471  u2DelayCellOfst[11]=0 cells (0 PI)

 8149 23:10:24.799976  u2DelayCellOfst[12]=14 cells (4 PI)

 8150 23:10:24.803151  u2DelayCellOfst[13]=10 cells (3 PI)

 8151 23:10:24.806669  u2DelayCellOfst[14]=14 cells (4 PI)

 8152 23:10:24.809510  u2DelayCellOfst[15]=10 cells (3 PI)

 8153 23:10:24.813483  Update DQ  dly =982 (3 ,6, 22)  DQ  OEN =(3 ,3)

 8154 23:10:24.819722  Update DQM dly =984 (3 ,6, 24)  DQM OEN =(3 ,3)

 8155 23:10:24.819800  DramC Write-DBI on

 8156 23:10:24.819862  ==

 8157 23:10:24.823370  Dram Type= 6, Freq= 0, CH_0, rank 1

 8158 23:10:24.825922  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8159 23:10:24.829572  ==

 8160 23:10:24.829676  

 8161 23:10:24.829768  

 8162 23:10:24.829854  	TX Vref Scan disable

 8163 23:10:24.833246   == TX Byte 0 ==

 8164 23:10:24.836300  Update DQM dly =733 (2 ,6, 29)  DQM OEN =(3 ,3)

 8165 23:10:24.839772   == TX Byte 1 ==

 8166 23:10:24.843434  Update DQM dly =726 (2 ,6, 22)  DQM OEN =(3 ,3)

 8167 23:10:24.846379  DramC Write-DBI off

 8168 23:10:24.846483  

 8169 23:10:24.846547  [DATLAT]

 8170 23:10:24.846607  Freq=1600, CH0 RK1

 8171 23:10:24.846665  

 8172 23:10:24.850056  DATLAT Default: 0xf

 8173 23:10:24.850189  0, 0xFFFF, sum = 0

 8174 23:10:24.853108  1, 0xFFFF, sum = 0

 8175 23:10:24.856412  2, 0xFFFF, sum = 0

 8176 23:10:24.856494  3, 0xFFFF, sum = 0

 8177 23:10:24.859438  4, 0xFFFF, sum = 0

 8178 23:10:24.859520  5, 0xFFFF, sum = 0

 8179 23:10:24.863034  6, 0xFFFF, sum = 0

 8180 23:10:24.863116  7, 0xFFFF, sum = 0

 8181 23:10:24.866446  8, 0xFFFF, sum = 0

 8182 23:10:24.866528  9, 0xFFFF, sum = 0

 8183 23:10:24.869705  10, 0xFFFF, sum = 0

 8184 23:10:24.869790  11, 0xFFFF, sum = 0

 8185 23:10:24.873137  12, 0xFFFF, sum = 0

 8186 23:10:24.873222  13, 0xFFFF, sum = 0

 8187 23:10:24.876594  14, 0x0, sum = 1

 8188 23:10:24.876678  15, 0x0, sum = 2

 8189 23:10:24.879837  16, 0x0, sum = 3

 8190 23:10:24.879925  17, 0x0, sum = 4

 8191 23:10:24.883401  best_step = 15

 8192 23:10:24.883484  

 8193 23:10:24.883568  ==

 8194 23:10:24.886197  Dram Type= 6, Freq= 0, CH_0, rank 1

 8195 23:10:24.890244  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8196 23:10:24.890325  ==

 8197 23:10:24.890390  RX Vref Scan: 0

 8198 23:10:24.890495  

 8199 23:10:24.893053  RX Vref 0 -> 0, step: 1

 8200 23:10:24.893134  

 8201 23:10:24.897070  RX Delay 11 -> 252, step: 4

 8202 23:10:24.899952  iDelay=191, Bit 0, Center 126 (71 ~ 182) 112

 8203 23:10:24.906450  iDelay=191, Bit 1, Center 130 (75 ~ 186) 112

 8204 23:10:24.910041  iDelay=191, Bit 2, Center 122 (67 ~ 178) 112

 8205 23:10:24.913407  iDelay=191, Bit 3, Center 128 (71 ~ 186) 116

 8206 23:10:24.916613  iDelay=191, Bit 4, Center 124 (71 ~ 178) 108

 8207 23:10:24.919756  iDelay=191, Bit 5, Center 114 (59 ~ 170) 112

 8208 23:10:24.923041  iDelay=191, Bit 6, Center 134 (79 ~ 190) 112

 8209 23:10:24.930435  iDelay=191, Bit 7, Center 134 (79 ~ 190) 112

 8210 23:10:24.932945  iDelay=191, Bit 8, Center 112 (59 ~ 166) 108

 8211 23:10:24.936231  iDelay=191, Bit 9, Center 110 (55 ~ 166) 112

 8212 23:10:24.940069  iDelay=191, Bit 10, Center 122 (67 ~ 178) 112

 8213 23:10:24.943046  iDelay=191, Bit 11, Center 118 (67 ~ 170) 104

 8214 23:10:24.949835  iDelay=191, Bit 12, Center 126 (75 ~ 178) 104

 8215 23:10:24.953210  iDelay=191, Bit 13, Center 128 (75 ~ 182) 108

 8216 23:10:24.956626  iDelay=191, Bit 14, Center 134 (79 ~ 190) 112

 8217 23:10:24.959955  iDelay=191, Bit 15, Center 132 (79 ~ 186) 108

 8218 23:10:24.960036  ==

 8219 23:10:24.963163  Dram Type= 6, Freq= 0, CH_0, rank 1

 8220 23:10:24.970334  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8221 23:10:24.970453  ==

 8222 23:10:24.970519  DQS Delay:

 8223 23:10:24.972867  DQS0 = 0, DQS1 = 0

 8224 23:10:24.972947  DQM Delay:

 8225 23:10:24.976702  DQM0 = 126, DQM1 = 122

 8226 23:10:24.976782  DQ Delay:

 8227 23:10:24.979540  DQ0 =126, DQ1 =130, DQ2 =122, DQ3 =128

 8228 23:10:24.982847  DQ4 =124, DQ5 =114, DQ6 =134, DQ7 =134

 8229 23:10:24.986270  DQ8 =112, DQ9 =110, DQ10 =122, DQ11 =118

 8230 23:10:24.990305  DQ12 =126, DQ13 =128, DQ14 =134, DQ15 =132

 8231 23:10:24.990387  

 8232 23:10:24.990490  

 8233 23:10:24.990550  

 8234 23:10:24.993096  [DramC_TX_OE_Calibration] TA2

 8235 23:10:24.997020  Original DQ_B0 (3 6) =30, OEN = 27

 8236 23:10:25.000072  Original DQ_B1 (3 6) =30, OEN = 27

 8237 23:10:25.003087  24, 0x0, End_B0=24 End_B1=24

 8238 23:10:25.003161  25, 0x0, End_B0=25 End_B1=25

 8239 23:10:25.006308  26, 0x0, End_B0=26 End_B1=26

 8240 23:10:25.009590  27, 0x0, End_B0=27 End_B1=27

 8241 23:10:25.013080  28, 0x0, End_B0=28 End_B1=28

 8242 23:10:25.016454  29, 0x0, End_B0=29 End_B1=29

 8243 23:10:25.016530  30, 0x0, End_B0=30 End_B1=30

 8244 23:10:25.019539  31, 0x4141, End_B0=30 End_B1=30

 8245 23:10:25.023266  Byte0 end_step=30  best_step=27

 8246 23:10:25.026418  Byte1 end_step=30  best_step=27

 8247 23:10:25.030018  Byte0 TX OE(2T, 0.5T) = (3, 3)

 8248 23:10:25.030090  Byte1 TX OE(2T, 0.5T) = (3, 3)

 8249 23:10:25.033331  

 8250 23:10:25.033410  

 8251 23:10:25.039964  [DQSOSCAuto] RK1, (LSB)MR18= 0x1509, (MSB)MR19= 0x303, tDQSOscB0 = 405 ps tDQSOscB1 = 399 ps

 8252 23:10:25.042998  CH0 RK1: MR19=303, MR18=1509

 8253 23:10:25.049842  CH0_RK1: MR19=0x303, MR18=0x1509, DQSOSC=399, MR23=63, INC=23, DEC=15

 8254 23:10:25.053211  [RxdqsGatingPostProcess] freq 1600

 8255 23:10:25.056336  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 8256 23:10:25.060188  best DQS0 dly(2T, 0.5T) = (1, 1)

 8257 23:10:25.063146  best DQS1 dly(2T, 0.5T) = (1, 1)

 8258 23:10:25.066990  best DQS0 P1 dly(2T, 0.5T) = (1, 5)

 8259 23:10:25.070381  best DQS1 P1 dly(2T, 0.5T) = (1, 5)

 8260 23:10:25.073302  best DQS0 dly(2T, 0.5T) = (1, 1)

 8261 23:10:25.076634  best DQS1 dly(2T, 0.5T) = (1, 1)

 8262 23:10:25.079886  best DQS0 P1 dly(2T, 0.5T) = (1, 5)

 8263 23:10:25.083240  best DQS1 P1 dly(2T, 0.5T) = (1, 5)

 8264 23:10:25.086633  Pre-setting of DQS Precalculation

 8265 23:10:25.090009  [DualRankRxdatlatCal] RK0: 15, RK1: 15, Final_Datlat 15

 8266 23:10:25.090078  ==

 8267 23:10:25.093503  Dram Type= 6, Freq= 0, CH_1, rank 0

 8268 23:10:25.097025  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8269 23:10:25.097102  ==

 8270 23:10:25.103593  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 8271 23:10:25.106505  [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=1

 8272 23:10:25.109787  [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=1

 8273 23:10:25.116787  u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32

 8274 23:10:25.126994  [CA 0] Center 42 (13~71) winsize 59

 8275 23:10:25.129836  [CA 1] Center 42 (13~71) winsize 59

 8276 23:10:25.132808  [CA 2] Center 37 (9~66) winsize 58

 8277 23:10:25.136317  [CA 3] Center 35 (6~65) winsize 60

 8278 23:10:25.139693  [CA 4] Center 37 (8~66) winsize 59

 8279 23:10:25.142653  [CA 5] Center 36 (7~66) winsize 60

 8280 23:10:25.142722  

 8281 23:10:25.146174  [CmdBusTrainingLP45] Vref(ca) range 0: 32

 8282 23:10:25.146247  

 8283 23:10:25.149679  [CATrainingPosCal] consider 1 rank data

 8284 23:10:25.152767  u2DelayCellTimex100 = 275/100 ps

 8285 23:10:25.156861  CA0 delay=42 (13~71),Diff = 7 PI (24 cell)

 8286 23:10:25.162768  CA1 delay=42 (13~71),Diff = 7 PI (24 cell)

 8287 23:10:25.166266  CA2 delay=37 (9~66),Diff = 2 PI (7 cell)

 8288 23:10:25.169317  CA3 delay=35 (6~65),Diff = 0 PI (0 cell)

 8289 23:10:25.172799  CA4 delay=37 (8~66),Diff = 2 PI (7 cell)

 8290 23:10:25.176040  CA5 delay=36 (7~66),Diff = 1 PI (3 cell)

 8291 23:10:25.176110  

 8292 23:10:25.179756  CA PerBit enable=1, Macro0, CA PI delay=35

 8293 23:10:25.179826  

 8294 23:10:25.183463  [CBTSetCACLKResult] CA Dly = 35

 8295 23:10:25.183530  CS Dly: 9 (0~40)

 8296 23:10:25.189357  [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=0

 8297 23:10:25.192900  [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=0

 8298 23:10:25.192972  ==

 8299 23:10:25.196554  Dram Type= 6, Freq= 0, CH_1, rank 1

 8300 23:10:25.199588  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8301 23:10:25.199659  ==

 8302 23:10:25.206581  pi_start=-16, pi_end=95, pi_step=1, new_cbt_mode=1, autok=0

 8303 23:10:25.209575  [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=1

 8304 23:10:25.212778  [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=1

 8305 23:10:25.220196  u1VRangeStart=0, u1VRangeEnd=0, u1VrefScanStart=22, u1VrefScanEnd=32

 8306 23:10:25.229711  [CA 0] Center 43 (14~72) winsize 59

 8307 23:10:25.233063  [CA 1] Center 43 (14~72) winsize 59

 8308 23:10:25.236053  [CA 2] Center 38 (9~67) winsize 59

 8309 23:10:25.239213  [CA 3] Center 37 (8~66) winsize 59

 8310 23:10:25.242531  [CA 4] Center 38 (9~68) winsize 60

 8311 23:10:25.246418  [CA 5] Center 37 (8~66) winsize 59

 8312 23:10:25.246510  

 8313 23:10:25.249756  [CmdBusTrainingLP45] Vref(ca) range 0: 30

 8314 23:10:25.249827  

 8315 23:10:25.253080  [CATrainingPosCal] consider 2 rank data

 8316 23:10:25.256174  u2DelayCellTimex100 = 275/100 ps

 8317 23:10:25.259831  CA0 delay=42 (14~71),Diff = 6 PI (21 cell)

 8318 23:10:25.262951  CA1 delay=42 (14~71),Diff = 6 PI (21 cell)

 8319 23:10:25.269683  CA2 delay=37 (9~66),Diff = 1 PI (3 cell)

 8320 23:10:25.272995  CA3 delay=36 (8~65),Diff = 0 PI (0 cell)

 8321 23:10:25.276164  CA4 delay=37 (9~66),Diff = 1 PI (3 cell)

 8322 23:10:25.279825  CA5 delay=37 (8~66),Diff = 1 PI (3 cell)

 8323 23:10:25.279898  

 8324 23:10:25.283029  CA PerBit enable=1, Macro0, CA PI delay=36

 8325 23:10:25.283129  

 8326 23:10:25.286328  [CBTSetCACLKResult] CA Dly = 36

 8327 23:10:25.286457  CS Dly: 11 (0~44)

 8328 23:10:25.292988  [DramcModeRegInit_CATerm] CH1 RK0 bWorkAround=0

 8329 23:10:25.296011  [DramcModeRegInit_CATerm] CH1 RK1 bWorkAround=0

 8330 23:10:25.296079  

 8331 23:10:25.299929  ----->DramcWriteLeveling(PI) begin...

 8332 23:10:25.299998  ==

 8333 23:10:25.302937  Dram Type= 6, Freq= 0, CH_1, rank 0

 8334 23:10:25.306172  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8335 23:10:25.306271  ==

 8336 23:10:25.309658  Write leveling (Byte 0): 25 => 25

 8337 23:10:25.313110  Write leveling (Byte 1): 29 => 29

 8338 23:10:25.317030  DramcWriteLeveling(PI) end<-----

 8339 23:10:25.317102  

 8340 23:10:25.317161  ==

 8341 23:10:25.319897  Dram Type= 6, Freq= 0, CH_1, rank 0

 8342 23:10:25.323369  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8343 23:10:25.326570  ==

 8344 23:10:25.326641  [Gating] SW mode calibration

 8345 23:10:25.332923  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0

 8346 23:10:25.340152  RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)

 8347 23:10:25.342876   1  4  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8348 23:10:25.349550   1  4  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8349 23:10:25.352895   1  4  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8350 23:10:25.356567   1  4 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8351 23:10:25.363289   1  4 16 | B1->B0 | 2b2b 2626 | 1 0 | (1 1) (0 0)

 8352 23:10:25.365971   1  4 20 | B1->B0 | 3434 3434 | 1 0 | (1 1) (0 0)

 8353 23:10:25.369821   1  4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 8354 23:10:25.376857   1  4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 8355 23:10:25.379905   1  5  0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 8356 23:10:25.383194   1  5  4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 8357 23:10:25.389697   1  5  8 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 8358 23:10:25.393137   1  5 12 | B1->B0 | 3434 3434 | 1 1 | (1 0) (1 0)

 8359 23:10:25.396111   1  5 16 | B1->B0 | 2e2e 3131 | 1 1 | (1 0) (1 0)

 8360 23:10:25.399447   1  5 20 | B1->B0 | 2323 2323 | 0 0 | (1 0) (0 0)

 8361 23:10:25.406512   1  5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8362 23:10:25.409640   1  5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8363 23:10:25.412967   1  6  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8364 23:10:25.419553   1  6  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8365 23:10:25.422793   1  6  8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8366 23:10:25.426545   1  6 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8367 23:10:25.432935   1  6 16 | B1->B0 | 4040 3636 | 0 0 | (1 1) (0 0)

 8368 23:10:25.436562   1  6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8369 23:10:25.439833   1  6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8370 23:10:25.446534   1  6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8371 23:10:25.449588   1  7  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8372 23:10:25.452885   1  7  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8373 23:10:25.460188   1  7  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8374 23:10:25.463657   1  7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 8375 23:10:25.466599   1  7 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (0 1)

 8376 23:10:25.469975   1  7 20 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)

 8377 23:10:25.476929   1  7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8378 23:10:25.479712   1  7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8379 23:10:25.483580   1  8  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8380 23:10:25.489967   1  8  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8381 23:10:25.493190   1  8  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8382 23:10:25.496305   1  8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8383 23:10:25.503141   1  8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8384 23:10:25.506903   1  8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8385 23:10:25.509848   1  8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8386 23:10:25.516527   1  8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8387 23:10:25.519691   1  9  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8388 23:10:25.523261   1  9  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8389 23:10:25.529984   1  9  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8390 23:10:25.533314   1  9 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8391 23:10:25.536733   1  9 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (1 0)

 8392 23:10:25.539737  Total UI for P1: 0, mck2ui 16

 8393 23:10:25.543345  best dqsien dly found for B1: ( 1,  9, 14)

 8394 23:10:25.549661   1  9 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8395 23:10:25.549741  Total UI for P1: 0, mck2ui 16

 8396 23:10:25.553129  best dqsien dly found for B0: ( 1,  9, 16)

 8397 23:10:25.559624  best DQS0 dly(MCK, UI, PI) = (1, 9, 16)

 8398 23:10:25.563422  best DQS1 dly(MCK, UI, PI) = (1, 9, 14)

 8399 23:10:25.563496  

 8400 23:10:25.566595  best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 16)

 8401 23:10:25.569460  best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 14)

 8402 23:10:25.573326  [Gating] SW calibration Done

 8403 23:10:25.573402  ==

 8404 23:10:25.576407  Dram Type= 6, Freq= 0, CH_1, rank 0

 8405 23:10:25.580158  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8406 23:10:25.580232  ==

 8407 23:10:25.582866  RX Vref Scan: 0

 8408 23:10:25.582943  

 8409 23:10:25.583004  RX Vref 0 -> 0, step: 1

 8410 23:10:25.583067  

 8411 23:10:25.586294  RX Delay 0 -> 252, step: 8

 8412 23:10:25.589785  iDelay=208, Bit 0, Center 139 (88 ~ 191) 104

 8413 23:10:25.593344  iDelay=208, Bit 1, Center 127 (72 ~ 183) 112

 8414 23:10:25.599754  iDelay=208, Bit 2, Center 123 (72 ~ 175) 104

 8415 23:10:25.603601  iDelay=208, Bit 3, Center 135 (80 ~ 191) 112

 8416 23:10:25.606698  iDelay=208, Bit 4, Center 135 (80 ~ 191) 112

 8417 23:10:25.610508  iDelay=208, Bit 5, Center 147 (88 ~ 207) 120

 8418 23:10:25.613205  iDelay=208, Bit 6, Center 143 (96 ~ 191) 96

 8419 23:10:25.620144  iDelay=208, Bit 7, Center 127 (72 ~ 183) 112

 8420 23:10:25.623283  iDelay=208, Bit 8, Center 115 (64 ~ 167) 104

 8421 23:10:25.626747  iDelay=208, Bit 9, Center 115 (64 ~ 167) 104

 8422 23:10:25.630111  iDelay=208, Bit 10, Center 127 (72 ~ 183) 112

 8423 23:10:25.633520  iDelay=208, Bit 11, Center 123 (72 ~ 175) 104

 8424 23:10:25.639710  iDelay=208, Bit 12, Center 135 (80 ~ 191) 112

 8425 23:10:25.643537  iDelay=208, Bit 13, Center 135 (80 ~ 191) 112

 8426 23:10:25.646553  iDelay=208, Bit 14, Center 135 (80 ~ 191) 112

 8427 23:10:25.649863  iDelay=208, Bit 15, Center 135 (80 ~ 191) 112

 8428 23:10:25.649934  ==

 8429 23:10:25.653514  Dram Type= 6, Freq= 0, CH_1, rank 0

 8430 23:10:25.656574  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8431 23:10:25.659819  ==

 8432 23:10:25.659885  DQS Delay:

 8433 23:10:25.659945  DQS0 = 0, DQS1 = 0

 8434 23:10:25.663735  DQM Delay:

 8435 23:10:25.663802  DQM0 = 134, DQM1 = 127

 8436 23:10:25.666834  DQ Delay:

 8437 23:10:25.670269  DQ0 =139, DQ1 =127, DQ2 =123, DQ3 =135

 8438 23:10:25.673479  DQ4 =135, DQ5 =147, DQ6 =143, DQ7 =127

 8439 23:10:25.676690  DQ8 =115, DQ9 =115, DQ10 =127, DQ11 =123

 8440 23:10:25.680253  DQ12 =135, DQ13 =135, DQ14 =135, DQ15 =135

 8441 23:10:25.680324  

 8442 23:10:25.680384  

 8443 23:10:25.680441  ==

 8444 23:10:25.683499  Dram Type= 6, Freq= 0, CH_1, rank 0

 8445 23:10:25.686915  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8446 23:10:25.686983  ==

 8447 23:10:25.689678  

 8448 23:10:25.689749  

 8449 23:10:25.689808  	TX Vref Scan disable

 8450 23:10:25.693400   == TX Byte 0 ==

 8451 23:10:25.696788  Update DQ  dly =982 (3 ,6, 22)  DQ  OEN =(3 ,3)

 8452 23:10:25.699861  Update DQM dly =982 (3 ,6, 22)  DQM OEN =(3 ,3)

 8453 23:10:25.703478   == TX Byte 1 ==

 8454 23:10:25.706835  Update DQ  dly =985 (3 ,6, 25)  DQ  OEN =(3 ,3)

 8455 23:10:25.710095  Update DQM dly =985 (3 ,6, 25)  DQM OEN =(3 ,3)

 8456 23:10:25.710163  ==

 8457 23:10:25.712933  Dram Type= 6, Freq= 0, CH_1, rank 0

 8458 23:10:25.719681  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8459 23:10:25.719757  ==

 8460 23:10:25.732853  

 8461 23:10:25.736395  TX Vref early break, caculate TX vref

 8462 23:10:25.739460  TX Vref=16, minBit 8, minWin=21, winSum=363

 8463 23:10:25.742970  TX Vref=18, minBit 8, minWin=21, winSum=372

 8464 23:10:25.746513  TX Vref=20, minBit 8, minWin=22, winSum=383

 8465 23:10:25.749717  TX Vref=22, minBit 8, minWin=22, winSum=389

 8466 23:10:25.753066  TX Vref=24, minBit 8, minWin=23, winSum=408

 8467 23:10:25.756325  TX Vref=26, minBit 8, minWin=24, winSum=410

 8468 23:10:25.763268  TX Vref=28, minBit 0, minWin=25, winSum=415

 8469 23:10:25.766374  TX Vref=30, minBit 1, minWin=25, winSum=413

 8470 23:10:25.770107  TX Vref=32, minBit 3, minWin=24, winSum=401

 8471 23:10:25.773055  TX Vref=34, minBit 9, minWin=23, winSum=395

 8472 23:10:25.776882  TX Vref=36, minBit 1, minWin=23, winSum=386

 8473 23:10:25.783624  [TxChooseVref] Worse bit 0, Min win 25, Win sum 415, Final Vref 28

 8474 23:10:25.783702  

 8475 23:10:25.786113  Final TX Range 0 Vref 28

 8476 23:10:25.786184  

 8477 23:10:25.786245  ==

 8478 23:10:25.789780  Dram Type= 6, Freq= 0, CH_1, rank 0

 8479 23:10:25.793076  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8480 23:10:25.793148  ==

 8481 23:10:25.793207  

 8482 23:10:25.793264  

 8483 23:10:25.796375  	TX Vref Scan disable

 8484 23:10:25.802917  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =275/100 ps

 8485 23:10:25.802994   == TX Byte 0 ==

 8486 23:10:25.806153  u2DelayCellOfst[0]=17 cells (5 PI)

 8487 23:10:25.809521  u2DelayCellOfst[1]=10 cells (3 PI)

 8488 23:10:25.813029  u2DelayCellOfst[2]=0 cells (0 PI)

 8489 23:10:25.816823  u2DelayCellOfst[3]=7 cells (2 PI)

 8490 23:10:25.819778  u2DelayCellOfst[4]=7 cells (2 PI)

 8491 23:10:25.822863  u2DelayCellOfst[5]=17 cells (5 PI)

 8492 23:10:25.826019  u2DelayCellOfst[6]=17 cells (5 PI)

 8493 23:10:25.826093  u2DelayCellOfst[7]=7 cells (2 PI)

 8494 23:10:25.832573  Update DQ  dly =980 (3 ,6, 20)  DQ  OEN =(3 ,3)

 8495 23:10:25.836828  Update DQM dly =982 (3 ,6, 22)  DQM OEN =(3 ,3)

 8496 23:10:25.836930   == TX Byte 1 ==

 8497 23:10:25.839321  u2DelayCellOfst[8]=0 cells (0 PI)

 8498 23:10:25.843687  u2DelayCellOfst[9]=3 cells (1 PI)

 8499 23:10:25.846430  u2DelayCellOfst[10]=7 cells (2 PI)

 8500 23:10:25.849815  u2DelayCellOfst[11]=3 cells (1 PI)

 8501 23:10:25.852757  u2DelayCellOfst[12]=10 cells (3 PI)

 8502 23:10:25.856119  u2DelayCellOfst[13]=14 cells (4 PI)

 8503 23:10:25.859221  u2DelayCellOfst[14]=17 cells (5 PI)

 8504 23:10:25.862626  u2DelayCellOfst[15]=14 cells (4 PI)

 8505 23:10:25.866128  Update DQ  dly =983 (3 ,6, 23)  DQ  OEN =(3 ,3)

 8506 23:10:25.872777  Update DQM dly =985 (3 ,6, 25)  DQM OEN =(3 ,3)

 8507 23:10:25.872855  DramC Write-DBI on

 8508 23:10:25.872957  ==

 8509 23:10:25.876268  Dram Type= 6, Freq= 0, CH_1, rank 0

 8510 23:10:25.879523  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8511 23:10:25.879595  ==

 8512 23:10:25.882569  

 8513 23:10:25.882669  

 8514 23:10:25.882758  	TX Vref Scan disable

 8515 23:10:25.886010   == TX Byte 0 ==

 8516 23:10:25.889114  Update DQM dly =723 (2 ,6, 19)  DQM OEN =(3 ,3)

 8517 23:10:25.892376   == TX Byte 1 ==

 8518 23:10:25.895738  Update DQM dly =725 (2 ,6, 21)  DQM OEN =(3 ,3)

 8519 23:10:25.895813  DramC Write-DBI off

 8520 23:10:25.899016  

 8521 23:10:25.899087  [DATLAT]

 8522 23:10:25.899151  Freq=1600, CH1 RK0

 8523 23:10:25.899213  

 8524 23:10:25.902679  DATLAT Default: 0xf

 8525 23:10:25.902752  0, 0xFFFF, sum = 0

 8526 23:10:25.905802  1, 0xFFFF, sum = 0

 8527 23:10:25.905874  2, 0xFFFF, sum = 0

 8528 23:10:25.909401  3, 0xFFFF, sum = 0

 8529 23:10:25.909477  4, 0xFFFF, sum = 0

 8530 23:10:25.912829  5, 0xFFFF, sum = 0

 8531 23:10:25.915976  6, 0xFFFF, sum = 0

 8532 23:10:25.916059  7, 0xFFFF, sum = 0

 8533 23:10:25.919255  8, 0xFFFF, sum = 0

 8534 23:10:25.919340  9, 0xFFFF, sum = 0

 8535 23:10:25.922207  10, 0xFFFF, sum = 0

 8536 23:10:25.922316  11, 0xFFFF, sum = 0

 8537 23:10:25.926835  12, 0xFFFF, sum = 0

 8538 23:10:25.926919  13, 0xFFFF, sum = 0

 8539 23:10:25.929382  14, 0x0, sum = 1

 8540 23:10:25.929489  15, 0x0, sum = 2

 8541 23:10:25.932733  16, 0x0, sum = 3

 8542 23:10:25.932818  17, 0x0, sum = 4

 8543 23:10:25.932882  best_step = 15

 8544 23:10:25.936510  

 8545 23:10:25.936590  ==

 8546 23:10:25.939117  Dram Type= 6, Freq= 0, CH_1, rank 0

 8547 23:10:25.942942  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8548 23:10:25.943023  ==

 8549 23:10:25.943165  RX Vref Scan: 1

 8550 23:10:25.943229  

 8551 23:10:25.945697  Set Vref Range= 24 -> 127

 8552 23:10:25.945766  

 8553 23:10:25.949425  RX Vref 24 -> 127, step: 1

 8554 23:10:25.949495  

 8555 23:10:25.952822  RX Delay 19 -> 252, step: 4

 8556 23:10:25.952900  

 8557 23:10:25.956061  Set Vref, RX VrefLevel [Byte0]: 24

 8558 23:10:25.960180                           [Byte1]: 24

 8559 23:10:25.960260  

 8560 23:10:25.962760  Set Vref, RX VrefLevel [Byte0]: 25

 8561 23:10:25.965987                           [Byte1]: 25

 8562 23:10:25.966062  

 8563 23:10:25.969148  Set Vref, RX VrefLevel [Byte0]: 26

 8564 23:10:25.972664                           [Byte1]: 26

 8565 23:10:25.976103  

 8566 23:10:25.976188  Set Vref, RX VrefLevel [Byte0]: 27

 8567 23:10:25.979307                           [Byte1]: 27

 8568 23:10:25.983957  

 8569 23:10:25.984026  Set Vref, RX VrefLevel [Byte0]: 28

 8570 23:10:25.987104                           [Byte1]: 28

 8571 23:10:25.990955  

 8572 23:10:25.991036  Set Vref, RX VrefLevel [Byte0]: 29

 8573 23:10:25.994720                           [Byte1]: 29

 8574 23:10:25.998504  

 8575 23:10:25.998579  Set Vref, RX VrefLevel [Byte0]: 30

 8576 23:10:26.002121                           [Byte1]: 30

 8577 23:10:26.006229  

 8578 23:10:26.006337  Set Vref, RX VrefLevel [Byte0]: 31

 8579 23:10:26.009618                           [Byte1]: 31

 8580 23:10:26.013814  

 8581 23:10:26.013883  Set Vref, RX VrefLevel [Byte0]: 32

 8582 23:10:26.017314                           [Byte1]: 32

 8583 23:10:26.022001  

 8584 23:10:26.022099  Set Vref, RX VrefLevel [Byte0]: 33

 8585 23:10:26.024622                           [Byte1]: 33

 8586 23:10:26.029200  

 8587 23:10:26.029311  Set Vref, RX VrefLevel [Byte0]: 34

 8588 23:10:26.032343                           [Byte1]: 34

 8589 23:10:26.036846  

 8590 23:10:26.036951  Set Vref, RX VrefLevel [Byte0]: 35

 8591 23:10:26.039772                           [Byte1]: 35

 8592 23:10:26.044641  

 8593 23:10:26.044712  Set Vref, RX VrefLevel [Byte0]: 36

 8594 23:10:26.047275                           [Byte1]: 36

 8595 23:10:26.051588  

 8596 23:10:26.051660  Set Vref, RX VrefLevel [Byte0]: 37

 8597 23:10:26.055609                           [Byte1]: 37

 8598 23:10:26.059201  

 8599 23:10:26.059272  Set Vref, RX VrefLevel [Byte0]: 38

 8600 23:10:26.062974                           [Byte1]: 38

 8601 23:10:26.066696  

 8602 23:10:26.066795  Set Vref, RX VrefLevel [Byte0]: 39

 8603 23:10:26.070256                           [Byte1]: 39

 8604 23:10:26.074346  

 8605 23:10:26.074468  Set Vref, RX VrefLevel [Byte0]: 40

 8606 23:10:26.078149                           [Byte1]: 40

 8607 23:10:26.081946  

 8608 23:10:26.082019  Set Vref, RX VrefLevel [Byte0]: 41

 8609 23:10:26.085549                           [Byte1]: 41

 8610 23:10:26.089876  

 8611 23:10:26.089974  Set Vref, RX VrefLevel [Byte0]: 42

 8612 23:10:26.093076                           [Byte1]: 42

 8613 23:10:26.097181  

 8614 23:10:26.097251  Set Vref, RX VrefLevel [Byte0]: 43

 8615 23:10:26.100741                           [Byte1]: 43

 8616 23:10:26.104876  

 8617 23:10:26.104949  Set Vref, RX VrefLevel [Byte0]: 44

 8618 23:10:26.107939                           [Byte1]: 44

 8619 23:10:26.112522  

 8620 23:10:26.112594  Set Vref, RX VrefLevel [Byte0]: 45

 8621 23:10:26.115410                           [Byte1]: 45

 8622 23:10:26.119982  

 8623 23:10:26.120095  Set Vref, RX VrefLevel [Byte0]: 46

 8624 23:10:26.123247                           [Byte1]: 46

 8625 23:10:26.127438  

 8626 23:10:26.127508  Set Vref, RX VrefLevel [Byte0]: 47

 8627 23:10:26.130974                           [Byte1]: 47

 8628 23:10:26.134953  

 8629 23:10:26.135031  Set Vref, RX VrefLevel [Byte0]: 48

 8630 23:10:26.138491                           [Byte1]: 48

 8631 23:10:26.142719  

 8632 23:10:26.142791  Set Vref, RX VrefLevel [Byte0]: 49

 8633 23:10:26.145876                           [Byte1]: 49

 8634 23:10:26.150571  

 8635 23:10:26.150643  Set Vref, RX VrefLevel [Byte0]: 50

 8636 23:10:26.153628                           [Byte1]: 50

 8637 23:10:26.157782  

 8638 23:10:26.157851  Set Vref, RX VrefLevel [Byte0]: 51

 8639 23:10:26.161379                           [Byte1]: 51

 8640 23:10:26.165976  

 8641 23:10:26.166052  Set Vref, RX VrefLevel [Byte0]: 52

 8642 23:10:26.168684                           [Byte1]: 52

 8643 23:10:26.172965  

 8644 23:10:26.173043  Set Vref, RX VrefLevel [Byte0]: 53

 8645 23:10:26.176005                           [Byte1]: 53

 8646 23:10:26.180768  

 8647 23:10:26.180871  Set Vref, RX VrefLevel [Byte0]: 54

 8648 23:10:26.184196                           [Byte1]: 54

 8649 23:10:26.188541  

 8650 23:10:26.188615  Set Vref, RX VrefLevel [Byte0]: 55

 8651 23:10:26.191207                           [Byte1]: 55

 8652 23:10:26.196118  

 8653 23:10:26.196195  Set Vref, RX VrefLevel [Byte0]: 56

 8654 23:10:26.198789                           [Byte1]: 56

 8655 23:10:26.203104  

 8656 23:10:26.203172  Set Vref, RX VrefLevel [Byte0]: 57

 8657 23:10:26.206415                           [Byte1]: 57

 8658 23:10:26.210973  

 8659 23:10:26.211040  Set Vref, RX VrefLevel [Byte0]: 58

 8660 23:10:26.214014                           [Byte1]: 58

 8661 23:10:26.218143  

 8662 23:10:26.218212  Set Vref, RX VrefLevel [Byte0]: 59

 8663 23:10:26.221909                           [Byte1]: 59

 8664 23:10:26.225749  

 8665 23:10:26.225821  Set Vref, RX VrefLevel [Byte0]: 60

 8666 23:10:26.229477                           [Byte1]: 60

 8667 23:10:26.233366  

 8668 23:10:26.233437  Set Vref, RX VrefLevel [Byte0]: 61

 8669 23:10:26.236710                           [Byte1]: 61

 8670 23:10:26.240964  

 8671 23:10:26.241038  Set Vref, RX VrefLevel [Byte0]: 62

 8672 23:10:26.244235                           [Byte1]: 62

 8673 23:10:26.249010  

 8674 23:10:26.249084  Set Vref, RX VrefLevel [Byte0]: 63

 8675 23:10:26.252370                           [Byte1]: 63

 8676 23:10:26.256514  

 8677 23:10:26.256594  Set Vref, RX VrefLevel [Byte0]: 64

 8678 23:10:26.259603                           [Byte1]: 64

 8679 23:10:26.263617  

 8680 23:10:26.263705  Set Vref, RX VrefLevel [Byte0]: 65

 8681 23:10:26.267056                           [Byte1]: 65

 8682 23:10:26.271520  

 8683 23:10:26.271598  Set Vref, RX VrefLevel [Byte0]: 66

 8684 23:10:26.275183                           [Byte1]: 66

 8685 23:10:26.279121  

 8686 23:10:26.279213  Set Vref, RX VrefLevel [Byte0]: 67

 8687 23:10:26.282654                           [Byte1]: 67

 8688 23:10:26.286224  

 8689 23:10:26.286324  Set Vref, RX VrefLevel [Byte0]: 68

 8690 23:10:26.289776                           [Byte1]: 68

 8691 23:10:26.294032  

 8692 23:10:26.294112  Set Vref, RX VrefLevel [Byte0]: 69

 8693 23:10:26.297569                           [Byte1]: 69

 8694 23:10:26.301732  

 8695 23:10:26.301811  Set Vref, RX VrefLevel [Byte0]: 70

 8696 23:10:26.304991                           [Byte1]: 70

 8697 23:10:26.309142  

 8698 23:10:26.309221  Set Vref, RX VrefLevel [Byte0]: 71

 8699 23:10:26.312840                           [Byte1]: 71

 8700 23:10:26.317316  

 8701 23:10:26.317397  Set Vref, RX VrefLevel [Byte0]: 72

 8702 23:10:26.320100                           [Byte1]: 72

 8703 23:10:26.324626  

 8704 23:10:26.324700  Set Vref, RX VrefLevel [Byte0]: 73

 8705 23:10:26.327505                           [Byte1]: 73

 8706 23:10:26.332224  

 8707 23:10:26.332305  Set Vref, RX VrefLevel [Byte0]: 74

 8708 23:10:26.335778                           [Byte1]: 74

 8709 23:10:26.339489  

 8710 23:10:26.339560  Set Vref, RX VrefLevel [Byte0]: 75

 8711 23:10:26.342946                           [Byte1]: 75

 8712 23:10:26.347176  

 8713 23:10:26.347247  Set Vref, RX VrefLevel [Byte0]: 76

 8714 23:10:26.350267                           [Byte1]: 76

 8715 23:10:26.354991  

 8716 23:10:26.355093  Final RX Vref Byte 0 = 54 to rank0

 8717 23:10:26.358020  Final RX Vref Byte 1 = 60 to rank0

 8718 23:10:26.361767  Final RX Vref Byte 0 = 54 to rank1

 8719 23:10:26.364978  Final RX Vref Byte 1 = 60 to rank1==

 8720 23:10:26.367773  Dram Type= 6, Freq= 0, CH_1, rank 0

 8721 23:10:26.374912  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8722 23:10:26.374999  ==

 8723 23:10:26.375064  DQS Delay:

 8724 23:10:26.375122  DQS0 = 0, DQS1 = 0

 8725 23:10:26.378114  DQM Delay:

 8726 23:10:26.378193  DQM0 = 130, DQM1 = 124

 8727 23:10:26.381114  DQ Delay:

 8728 23:10:26.384491  DQ0 =134, DQ1 =124, DQ2 =118, DQ3 =130

 8729 23:10:26.388131  DQ4 =128, DQ5 =142, DQ6 =142, DQ7 =126

 8730 23:10:26.391292  DQ8 =110, DQ9 =112, DQ10 =126, DQ11 =118

 8731 23:10:26.394719  DQ12 =134, DQ13 =132, DQ14 =130, DQ15 =132

 8732 23:10:26.394798  

 8733 23:10:26.394861  

 8734 23:10:26.394936  

 8735 23:10:26.398625  [DramC_TX_OE_Calibration] TA2

 8736 23:10:26.401459  Original DQ_B0 (3 6) =30, OEN = 27

 8737 23:10:26.404931  Original DQ_B1 (3 6) =30, OEN = 27

 8738 23:10:26.407997  24, 0x0, End_B0=24 End_B1=24

 8739 23:10:26.408071  25, 0x0, End_B0=25 End_B1=25

 8740 23:10:26.411192  26, 0x0, End_B0=26 End_B1=26

 8741 23:10:26.414777  27, 0x0, End_B0=27 End_B1=27

 8742 23:10:26.418288  28, 0x0, End_B0=28 End_B1=28

 8743 23:10:26.418414  29, 0x0, End_B0=29 End_B1=29

 8744 23:10:26.421287  30, 0x0, End_B0=30 End_B1=30

 8745 23:10:26.424934  31, 0x4545, End_B0=30 End_B1=30

 8746 23:10:26.428751  Byte0 end_step=30  best_step=27

 8747 23:10:26.432019  Byte1 end_step=30  best_step=27

 8748 23:10:26.434700  Byte0 TX OE(2T, 0.5T) = (3, 3)

 8749 23:10:26.434781  Byte1 TX OE(2T, 0.5T) = (3, 3)

 8750 23:10:26.434845  

 8751 23:10:26.434919  

 8752 23:10:26.444819  [DQSOSCAuto] RK0, (LSB)MR18= 0x14fe, (MSB)MR19= 0x302, tDQSOscB0 = 411 ps tDQSOscB1 = 399 ps

 8753 23:10:26.448662  CH1 RK0: MR19=302, MR18=14FE

 8754 23:10:26.452347  CH1_RK0: MR19=0x302, MR18=0x14FE, DQSOSC=399, MR23=63, INC=23, DEC=15

 8755 23:10:26.454870  

 8756 23:10:26.458008  ----->DramcWriteLeveling(PI) begin...

 8757 23:10:26.458128  ==

 8758 23:10:26.461752  Dram Type= 6, Freq= 0, CH_1, rank 1

 8759 23:10:26.464719  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8760 23:10:26.464794  ==

 8761 23:10:26.468031  Write leveling (Byte 0): 23 => 23

 8762 23:10:26.471182  Write leveling (Byte 1): 28 => 28

 8763 23:10:26.474800  DramcWriteLeveling(PI) end<-----

 8764 23:10:26.474888  

 8765 23:10:26.474957  ==

 8766 23:10:26.478309  Dram Type= 6, Freq= 0, CH_1, rank 1

 8767 23:10:26.481249  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8768 23:10:26.481329  ==

 8769 23:10:26.485010  [Gating] SW mode calibration

 8770 23:10:26.491120  [GatingStartPos] MR0_LatencyMode 1, u1RealRL 32 , u4TDQSCK_UI_min 4, 1:4ExtraMCK 0

 8771 23:10:26.498424  RX_Path_delay_UI(60) -3 - DQSINCTL_UI(40) = u1StartUI(20)

 8772 23:10:26.501652   1  4  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8773 23:10:26.504416   1  4  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8774 23:10:26.511771   1  4  8 | B1->B0 | 2323 2626 | 0 0 | (0 0) (0 0)

 8775 23:10:26.514714   1  4 12 | B1->B0 | 3030 3434 | 1 1 | (1 1) (1 1)

 8776 23:10:26.518282   1  4 16 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 8777 23:10:26.524801   1  4 20 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 8778 23:10:26.528439   1  4 24 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 8779 23:10:26.531385   1  4 28 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 1)

 8780 23:10:26.538218   1  5  0 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)

 8781 23:10:26.541545   1  5  4 | B1->B0 | 3434 3434 | 1 1 | (1 1) (1 0)

 8782 23:10:26.545099   1  5  8 | B1->B0 | 3434 3131 | 1 0 | (1 1) (0 1)

 8783 23:10:26.550561   1  5 12 | B1->B0 | 2a2a 2323 | 0 0 | (0 1) (0 0)

 8784 23:10:26.555361   1  5 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8785 23:10:26.557875   1  5 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8786 23:10:26.561371   1  5 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8787 23:10:26.567753   1  5 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8788 23:10:26.571363   1  6  0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8789 23:10:26.574666   1  6  4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)

 8790 23:10:26.581306   1  6  8 | B1->B0 | 2525 3a3a | 0 0 | (0 0) (0 0)

 8791 23:10:26.584725   1  6 12 | B1->B0 | 3f3f 4646 | 0 0 | (0 0) (0 0)

 8792 23:10:26.588129   1  6 16 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8793 23:10:26.594764   1  6 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8794 23:10:26.597869   1  6 24 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8795 23:10:26.601098   1  6 28 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8796 23:10:26.607749   1  7  0 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8797 23:10:26.611082   1  7  4 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 8798 23:10:26.614729   1  7  8 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 8799 23:10:26.621502   1  7 12 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 1)

 8800 23:10:26.624982   1  7 16 | B1->B0 | 4646 4646 | 0 0 | (0 1) (1 1)

 8801 23:10:26.627974   1  7 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8802 23:10:26.631810   1  7 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8803 23:10:26.638328   1  7 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8804 23:10:26.641468   1  8  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8805 23:10:26.645172   1  8  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8806 23:10:26.651421   1  8  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8807 23:10:26.654738   1  8 12 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8808 23:10:26.657934   1  8 16 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8809 23:10:26.664493   1  8 20 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8810 23:10:26.668164   1  8 24 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8811 23:10:26.671770   1  8 28 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8812 23:10:26.678704   1  9  0 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 1)

 8813 23:10:26.681151   1  9  4 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

 8814 23:10:26.684514   1  9  8 | B1->B0 | 4646 4646 | 0 0 | (1 1) (1 0)

 8815 23:10:26.691433   1  9 12 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)

 8816 23:10:26.691508  Total UI for P1: 0, mck2ui 16

 8817 23:10:26.698419  best dqsien dly found for B0: ( 1,  9,  6)

 8818 23:10:26.701285   1  9 16 | B1->B0 | 4646 4646 | 0 0 | (1 0) (0 0)

 8819 23:10:26.704481   1  9 20 | B1->B0 | 4646 4646 | 0 0 | (0 0) (0 0)

 8820 23:10:26.708376  Total UI for P1: 0, mck2ui 16

 8821 23:10:26.711274  best dqsien dly found for B1: ( 1,  9, 14)

 8822 23:10:26.715031  best DQS0 dly(MCK, UI, PI) = (1, 9, 6)

 8823 23:10:26.717746  best DQS1 dly(MCK, UI, PI) = (1, 9, 14)

 8824 23:10:26.717824  

 8825 23:10:26.721376  best DQS0 P1 dly(MCK, UI, PI) = (1, 13, 6)

 8826 23:10:26.728275  best DQS1 P1 dly(MCK, UI, PI) = (1, 13, 14)

 8827 23:10:26.728350  [Gating] SW calibration Done

 8828 23:10:26.728412  ==

 8829 23:10:26.731875  Dram Type= 6, Freq= 0, CH_1, rank 1

 8830 23:10:26.738580  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8831 23:10:26.738657  ==

 8832 23:10:26.738720  RX Vref Scan: 0

 8833 23:10:26.738780  

 8834 23:10:26.741343  RX Vref 0 -> 0, step: 1

 8835 23:10:26.741408  

 8836 23:10:26.745016  RX Delay 0 -> 252, step: 8

 8837 23:10:26.747781  iDelay=200, Bit 0, Center 135 (80 ~ 191) 112

 8838 23:10:26.751521  iDelay=200, Bit 1, Center 127 (72 ~ 183) 112

 8839 23:10:26.754538  iDelay=200, Bit 2, Center 119 (64 ~ 175) 112

 8840 23:10:26.758186  iDelay=200, Bit 3, Center 135 (80 ~ 191) 112

 8841 23:10:26.764530  iDelay=200, Bit 4, Center 131 (72 ~ 191) 120

 8842 23:10:26.768256  iDelay=200, Bit 5, Center 143 (88 ~ 199) 112

 8843 23:10:26.771755  iDelay=200, Bit 6, Center 143 (88 ~ 199) 112

 8844 23:10:26.774609  iDelay=200, Bit 7, Center 127 (72 ~ 183) 112

 8845 23:10:26.777860  iDelay=200, Bit 8, Center 115 (56 ~ 175) 120

 8846 23:10:26.784582  iDelay=200, Bit 9, Center 115 (56 ~ 175) 120

 8847 23:10:26.788199  iDelay=200, Bit 10, Center 127 (64 ~ 191) 128

 8848 23:10:26.790980  iDelay=200, Bit 11, Center 123 (64 ~ 183) 120

 8849 23:10:26.794910  iDelay=200, Bit 12, Center 139 (80 ~ 199) 120

 8850 23:10:26.797974  iDelay=200, Bit 13, Center 135 (80 ~ 191) 112

 8851 23:10:26.804966  iDelay=200, Bit 14, Center 139 (80 ~ 199) 120

 8852 23:10:26.807992  iDelay=200, Bit 15, Center 139 (80 ~ 199) 120

 8853 23:10:26.808065  ==

 8854 23:10:26.811133  Dram Type= 6, Freq= 0, CH_1, rank 1

 8855 23:10:26.814934  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8856 23:10:26.815002  ==

 8857 23:10:26.818187  DQS Delay:

 8858 23:10:26.818287  DQS0 = 0, DQS1 = 0

 8859 23:10:26.818379  DQM Delay:

 8860 23:10:26.821780  DQM0 = 132, DQM1 = 129

 8861 23:10:26.821849  DQ Delay:

 8862 23:10:26.824876  DQ0 =135, DQ1 =127, DQ2 =119, DQ3 =135

 8863 23:10:26.827874  DQ4 =131, DQ5 =143, DQ6 =143, DQ7 =127

 8864 23:10:26.831867  DQ8 =115, DQ9 =115, DQ10 =127, DQ11 =123

 8865 23:10:26.838490  DQ12 =139, DQ13 =135, DQ14 =139, DQ15 =139

 8866 23:10:26.838598  

 8867 23:10:26.838690  

 8868 23:10:26.838776  ==

 8869 23:10:26.841469  Dram Type= 6, Freq= 0, CH_1, rank 1

 8870 23:10:26.845512  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8871 23:10:26.845580  ==

 8872 23:10:26.845640  

 8873 23:10:26.845697  

 8874 23:10:26.848463  	TX Vref Scan disable

 8875 23:10:26.848531   == TX Byte 0 ==

 8876 23:10:26.855950  Update DQ  dly =980 (3 ,6, 20)  DQ  OEN =(3 ,3)

 8877 23:10:26.858619  Update DQM dly =980 (3 ,6, 20)  DQM OEN =(3 ,3)

 8878 23:10:26.858694   == TX Byte 1 ==

 8879 23:10:26.864659  Update DQ  dly =983 (3 ,6, 23)  DQ  OEN =(3 ,3)

 8880 23:10:26.867888  Update DQM dly =983 (3 ,6, 23)  DQM OEN =(3 ,3)

 8881 23:10:26.867967  ==

 8882 23:10:26.871454  Dram Type= 6, Freq= 0, CH_1, rank 1

 8883 23:10:26.875094  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8884 23:10:26.875166  ==

 8885 23:10:26.889913  

 8886 23:10:26.893719  TX Vref early break, caculate TX vref

 8887 23:10:26.896745  TX Vref=16, minBit 8, minWin=22, winSum=377

 8888 23:10:26.899798  TX Vref=18, minBit 8, minWin=22, winSum=389

 8889 23:10:26.904224  TX Vref=20, minBit 8, minWin=23, winSum=395

 8890 23:10:26.906244  TX Vref=22, minBit 8, minWin=24, winSum=405

 8891 23:10:26.909847  TX Vref=24, minBit 8, minWin=24, winSum=412

 8892 23:10:26.916936  TX Vref=26, minBit 8, minWin=25, winSum=417

 8893 23:10:26.920066  TX Vref=28, minBit 5, minWin=25, winSum=425

 8894 23:10:26.923481  TX Vref=30, minBit 5, minWin=25, winSum=422

 8895 23:10:26.926525  TX Vref=32, minBit 0, minWin=25, winSum=414

 8896 23:10:26.929809  TX Vref=34, minBit 0, minWin=25, winSum=408

 8897 23:10:26.933784  TX Vref=36, minBit 5, minWin=23, winSum=397

 8898 23:10:26.939646  [TxChooseVref] Worse bit 5, Min win 25, Win sum 425, Final Vref 28

 8899 23:10:26.939728  

 8900 23:10:26.943374  Final TX Range 0 Vref 28

 8901 23:10:26.943467  

 8902 23:10:26.943532  ==

 8903 23:10:26.946971  Dram Type= 6, Freq= 0, CH_1, rank 1

 8904 23:10:26.949709  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8905 23:10:26.949783  ==

 8906 23:10:26.949845  

 8907 23:10:26.949906  

 8908 23:10:26.953335  	TX Vref Scan disable

 8909 23:10:26.960735  [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =275/100 ps

 8910 23:10:26.960887   == TX Byte 0 ==

 8911 23:10:26.963777  u2DelayCellOfst[0]=17 cells (5 PI)

 8912 23:10:26.966637  u2DelayCellOfst[1]=14 cells (4 PI)

 8913 23:10:26.970591  u2DelayCellOfst[2]=0 cells (0 PI)

 8914 23:10:26.973309  u2DelayCellOfst[3]=7 cells (2 PI)

 8915 23:10:26.976793  u2DelayCellOfst[4]=7 cells (2 PI)

 8916 23:10:26.979928  u2DelayCellOfst[5]=21 cells (6 PI)

 8917 23:10:26.983063  u2DelayCellOfst[6]=17 cells (5 PI)

 8918 23:10:26.983171  u2DelayCellOfst[7]=7 cells (2 PI)

 8919 23:10:26.989711  Update DQ  dly =977 (3 ,6, 17)  DQ  OEN =(3 ,3)

 8920 23:10:26.993652  Update DQM dly =980 (3 ,6, 20)  DQM OEN =(3 ,3)

 8921 23:10:26.996567   == TX Byte 1 ==

 8922 23:10:26.996666  u2DelayCellOfst[8]=0 cells (0 PI)

 8923 23:10:26.999688  u2DelayCellOfst[9]=7 cells (2 PI)

 8924 23:10:27.003020  u2DelayCellOfst[10]=10 cells (3 PI)

 8925 23:10:27.006785  u2DelayCellOfst[11]=7 cells (2 PI)

 8926 23:10:27.010309  u2DelayCellOfst[12]=14 cells (4 PI)

 8927 23:10:27.013465  u2DelayCellOfst[13]=17 cells (5 PI)

 8928 23:10:27.016927  u2DelayCellOfst[14]=17 cells (5 PI)

 8929 23:10:27.020570  u2DelayCellOfst[15]=17 cells (5 PI)

 8930 23:10:27.023158  Update DQ  dly =981 (3 ,6, 21)  DQ  OEN =(3 ,3)

 8931 23:10:27.029994  Update DQM dly =983 (3 ,6, 23)  DQM OEN =(3 ,3)

 8932 23:10:27.030102  DramC Write-DBI on

 8933 23:10:27.030194  ==

 8934 23:10:27.033832  Dram Type= 6, Freq= 0, CH_1, rank 1

 8935 23:10:27.036596  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8936 23:10:27.036701  ==

 8937 23:10:27.039875  

 8938 23:10:27.039974  

 8939 23:10:27.040045  	TX Vref Scan disable

 8940 23:10:27.043250   == TX Byte 0 ==

 8941 23:10:27.047059  Update DQM dly =721 (2 ,6, 17)  DQM OEN =(3 ,3)

 8942 23:10:27.049783   == TX Byte 1 ==

 8943 23:10:27.053346  Update DQM dly =724 (2 ,6, 20)  DQM OEN =(3 ,3)

 8944 23:10:27.053435  DramC Write-DBI off

 8945 23:10:27.053509  

 8946 23:10:27.056606  [DATLAT]

 8947 23:10:27.056688  Freq=1600, CH1 RK1

 8948 23:10:27.056802  

 8949 23:10:27.059857  DATLAT Default: 0xf

 8950 23:10:27.059938  0, 0xFFFF, sum = 0

 8951 23:10:27.063679  1, 0xFFFF, sum = 0

 8952 23:10:27.063762  2, 0xFFFF, sum = 0

 8953 23:10:27.066576  3, 0xFFFF, sum = 0

 8954 23:10:27.066657  4, 0xFFFF, sum = 0

 8955 23:10:27.069858  5, 0xFFFF, sum = 0

 8956 23:10:27.069940  6, 0xFFFF, sum = 0

 8957 23:10:27.073200  7, 0xFFFF, sum = 0

 8958 23:10:27.076462  8, 0xFFFF, sum = 0

 8959 23:10:27.076545  9, 0xFFFF, sum = 0

 8960 23:10:27.079800  10, 0xFFFF, sum = 0

 8961 23:10:27.079882  11, 0xFFFF, sum = 0

 8962 23:10:27.083669  12, 0xFFFF, sum = 0

 8963 23:10:27.083751  13, 0xFFFF, sum = 0

 8964 23:10:27.086292  14, 0x0, sum = 1

 8965 23:10:27.086376  15, 0x0, sum = 2

 8966 23:10:27.090020  16, 0x0, sum = 3

 8967 23:10:27.090102  17, 0x0, sum = 4

 8968 23:10:27.090167  best_step = 15

 8969 23:10:27.093427  

 8970 23:10:27.093507  ==

 8971 23:10:27.097030  Dram Type= 6, Freq= 0, CH_1, rank 1

 8972 23:10:27.099983  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8973 23:10:27.100065  ==

 8974 23:10:27.100129  RX Vref Scan: 0

 8975 23:10:27.100189  

 8976 23:10:27.103320  RX Vref 0 -> 0, step: 1

 8977 23:10:27.103400  

 8978 23:10:27.106603  RX Delay 11 -> 252, step: 4

 8979 23:10:27.110247  iDelay=195, Bit 0, Center 132 (83 ~ 182) 100

 8980 23:10:27.113725  iDelay=195, Bit 1, Center 124 (71 ~ 178) 108

 8981 23:10:27.120239  iDelay=195, Bit 2, Center 118 (67 ~ 170) 104

 8982 23:10:27.123633  iDelay=195, Bit 3, Center 126 (75 ~ 178) 104

 8983 23:10:27.127244  iDelay=195, Bit 4, Center 128 (75 ~ 182) 108

 8984 23:10:27.129928  iDelay=195, Bit 5, Center 144 (95 ~ 194) 100

 8985 23:10:27.133449  iDelay=195, Bit 6, Center 138 (87 ~ 190) 104

 8986 23:10:27.140401  iDelay=195, Bit 7, Center 124 (71 ~ 178) 108

 8987 23:10:27.143858  iDelay=195, Bit 8, Center 112 (55 ~ 170) 116

 8988 23:10:27.147179  iDelay=195, Bit 9, Center 112 (59 ~ 166) 108

 8989 23:10:27.150546  iDelay=195, Bit 10, Center 128 (75 ~ 182) 108

 8990 23:10:27.153337  iDelay=195, Bit 11, Center 120 (67 ~ 174) 108

 8991 23:10:27.160469  iDelay=195, Bit 12, Center 134 (83 ~ 186) 104

 8992 23:10:27.163660  iDelay=195, Bit 13, Center 136 (87 ~ 186) 100

 8993 23:10:27.166802  iDelay=195, Bit 14, Center 134 (79 ~ 190) 112

 8994 23:10:27.170116  iDelay=195, Bit 15, Center 136 (83 ~ 190) 108

 8995 23:10:27.170193  ==

 8996 23:10:27.173832  Dram Type= 6, Freq= 0, CH_1, rank 1

 8997 23:10:27.179854  fsp= 1, odt_onoff= 1, Byte mode= 1, DivMode= 1

 8998 23:10:27.179933  ==

 8999 23:10:27.179997  DQS Delay:

 9000 23:10:27.180056  DQS0 = 0, DQS1 = 0

 9001 23:10:27.183379  DQM Delay:

 9002 23:10:27.183453  DQM0 = 129, DQM1 = 126

 9003 23:10:27.187021  DQ Delay:

 9004 23:10:27.190378  DQ0 =132, DQ1 =124, DQ2 =118, DQ3 =126

 9005 23:10:27.193679  DQ4 =128, DQ5 =144, DQ6 =138, DQ7 =124

 9006 23:10:27.196720  DQ8 =112, DQ9 =112, DQ10 =128, DQ11 =120

 9007 23:10:27.200046  DQ12 =134, DQ13 =136, DQ14 =134, DQ15 =136

 9008 23:10:27.200122  

 9009 23:10:27.200183  

 9010 23:10:27.200239  

 9011 23:10:27.203421  [DramC_TX_OE_Calibration] TA2

 9012 23:10:27.207283  Original DQ_B0 (3 6) =30, OEN = 27

 9013 23:10:27.210061  Original DQ_B1 (3 6) =30, OEN = 27

 9014 23:10:27.213239  24, 0x0, End_B0=24 End_B1=24

 9015 23:10:27.213312  25, 0x0, End_B0=25 End_B1=25

 9016 23:10:27.216631  26, 0x0, End_B0=26 End_B1=26

 9017 23:10:27.219940  27, 0x0, End_B0=27 End_B1=27

 9018 23:10:27.223667  28, 0x0, End_B0=28 End_B1=28

 9019 23:10:27.223740  29, 0x0, End_B0=29 End_B1=29

 9020 23:10:27.226684  30, 0x0, End_B0=30 End_B1=30

 9021 23:10:27.230324  31, 0x4141, End_B0=30 End_B1=30

 9022 23:10:27.233783  Byte0 end_step=30  best_step=27

 9023 23:10:27.237294  Byte1 end_step=30  best_step=27

 9024 23:10:27.240381  Byte0 TX OE(2T, 0.5T) = (3, 3)

 9025 23:10:27.240455  Byte1 TX OE(2T, 0.5T) = (3, 3)

 9026 23:10:27.240521  

 9027 23:10:27.240579  

 9028 23:10:27.250063  [DQSOSCAuto] RK1, (LSB)MR18= 0x1016, (MSB)MR19= 0x303, tDQSOscB0 = 398 ps tDQSOscB1 = 401 ps

 9029 23:10:27.253806  CH1 RK1: MR19=303, MR18=1016

 9030 23:10:27.260350  CH1_RK1: MR19=0x303, MR18=0x1016, DQSOSC=398, MR23=63, INC=23, DEC=15

 9031 23:10:27.260431  [RxdqsGatingPostProcess] freq 1600

 9032 23:10:27.267394  ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3

 9033 23:10:27.270061  best DQS0 dly(2T, 0.5T) = (1, 1)

 9034 23:10:27.273586  best DQS1 dly(2T, 0.5T) = (1, 1)

 9035 23:10:27.277086  best DQS0 P1 dly(2T, 0.5T) = (1, 5)

 9036 23:10:27.280203  best DQS1 P1 dly(2T, 0.5T) = (1, 5)

 9037 23:10:27.283297  best DQS0 dly(2T, 0.5T) = (1, 1)

 9038 23:10:27.286769  best DQS1 dly(2T, 0.5T) = (1, 1)

 9039 23:10:27.290999  best DQS0 P1 dly(2T, 0.5T) = (1, 5)

 9040 23:10:27.291077  best DQS1 P1 dly(2T, 0.5T) = (1, 5)

 9041 23:10:27.293540  Pre-setting of DQS Precalculation

 9042 23:10:27.300183  [DualRankRxdatlatCal] RK0: 15, RK1: 15, Final_Datlat 15

 9043 23:10:27.307227  sync_frequency_calibration_params sync calibration params of frequency 1600 to shu:0

 9044 23:10:27.313491  calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464

 9045 23:10:27.313567  

 9046 23:10:27.313630  

 9047 23:10:27.317236  [Calibration Summary] 3200 Mbps

 9048 23:10:27.320261  CH 0, Rank 0

 9049 23:10:27.320337  SW Impedance     : PASS

 9050 23:10:27.323517  DUTY Scan        : NO K

 9051 23:10:27.323593  ZQ Calibration   : PASS

 9052 23:10:27.326640  Jitter Meter     : NO K

 9053 23:10:27.330359  CBT Training     : PASS

 9054 23:10:27.330480  Write leveling   : PASS

 9055 23:10:27.334325  RX DQS gating    : PASS

 9056 23:10:27.337172  RX DQ/DQS(RDDQC) : PASS

 9057 23:10:27.337242  TX DQ/DQS        : PASS

 9058 23:10:27.340053  RX DATLAT        : PASS

 9059 23:10:27.343704  RX DQ/DQS(Engine): PASS

 9060 23:10:27.343771  TX OE            : PASS

 9061 23:10:27.346882  All Pass.

 9062 23:10:27.346948  

 9063 23:10:27.347010  CH 0, Rank 1

 9064 23:10:27.350226  SW Impedance     : PASS

 9065 23:10:27.350293  DUTY Scan        : NO K

 9066 23:10:27.353688  ZQ Calibration   : PASS

 9067 23:10:27.356705  Jitter Meter     : NO K

 9068 23:10:27.356815  CBT Training     : PASS

 9069 23:10:27.360097  Write leveling   : PASS

 9070 23:10:27.363745  RX DQS gating    : PASS

 9071 23:10:27.363816  RX DQ/DQS(RDDQC) : PASS

 9072 23:10:27.366817  TX DQ/DQS        : PASS

 9073 23:10:27.366884  RX DATLAT        : PASS

 9074 23:10:27.370533  RX DQ/DQS(Engine): PASS

 9075 23:10:27.373621  TX OE            : PASS

 9076 23:10:27.373693  All Pass.

 9077 23:10:27.373753  

 9078 23:10:27.373810  CH 1, Rank 0

 9079 23:10:27.376712  SW Impedance     : PASS

 9080 23:10:27.380357  DUTY Scan        : NO K

 9081 23:10:27.380437  ZQ Calibration   : PASS

 9082 23:10:27.383588  Jitter Meter     : NO K

 9083 23:10:27.387138  CBT Training     : PASS

 9084 23:10:27.387207  Write leveling   : PASS

 9085 23:10:27.391725  RX DQS gating    : PASS

 9086 23:10:27.393994  RX DQ/DQS(RDDQC) : PASS

 9087 23:10:27.394060  TX DQ/DQS        : PASS

 9088 23:10:27.397103  RX DATLAT        : PASS

 9089 23:10:27.400161  RX DQ/DQS(Engine): PASS

 9090 23:10:27.400235  TX OE            : PASS

 9091 23:10:27.400301  All Pass.

 9092 23:10:27.403714  

 9093 23:10:27.403780  CH 1, Rank 1

 9094 23:10:27.407324  SW Impedance     : PASS

 9095 23:10:27.407389  DUTY Scan        : NO K

 9096 23:10:27.410680  ZQ Calibration   : PASS

 9097 23:10:27.410746  Jitter Meter     : NO K

 9098 23:10:27.413425  CBT Training     : PASS

 9099 23:10:27.417479  Write leveling   : PASS

 9100 23:10:27.417548  RX DQS gating    : PASS

 9101 23:10:27.420389  RX DQ/DQS(RDDQC) : PASS

 9102 23:10:27.423652  TX DQ/DQS        : PASS

 9103 23:10:27.423724  RX DATLAT        : PASS

 9104 23:10:27.426910  RX DQ/DQS(Engine): PASS

 9105 23:10:27.430443  TX OE            : PASS

 9106 23:10:27.430517  All Pass.

 9107 23:10:27.430578  

 9108 23:10:27.430639  DramC Write-DBI on

 9109 23:10:27.434008  	PER_BANK_REFRESH: Hybrid Mode

 9110 23:10:27.437762  TX_TRACKING: ON

 9111 23:10:27.444431  [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 115, TRFCpb 44, TRFCpb_05T 0

 9112 23:10:27.454007  sync_frequency_calibration_params_to_shu sync calibration params of frequency 1600 to shu:1

 9113 23:10:27.460443  calibartion params size is 464, SAVE_TIME_FOR_CALIBRATION_T:464, sdram_params:464

 9114 23:10:27.463887  [FAST_K] Save calibration result to emmc

 9115 23:10:27.467075  sync common calibartion params.

 9116 23:10:27.467146  sync cbt_mode0:1, 1:1

 9117 23:10:27.470788  dram_init: ddr_geometry: 2

 9118 23:10:27.474359  dram_init: ddr_geometry: 2

 9119 23:10:27.477305  dram_init: ddr_geometry: 2

 9120 23:10:27.477404  0:dram_rank_size:100000000

 9121 23:10:27.480311  1:dram_rank_size:100000000

 9122 23:10:27.487677  sync rank num:2, rank0_size:0x100000000, rank1_size:0x100000000

 9123 23:10:27.487752  DFS_SHUFFLE_HW_MODE: ON

 9124 23:10:27.494017  dramc_set_vcore_voltage set vcore to 725000

 9125 23:10:27.494115  Read voltage for 1600, 0

 9126 23:10:27.494206  Vio18 = 0

 9127 23:10:27.498004  Vcore = 725000

 9128 23:10:27.498073  Vdram = 0

 9129 23:10:27.498132  Vddq = 0

 9130 23:10:27.500721  Vmddr = 0

 9131 23:10:27.500787  switch to 3200 Mbps bootup

 9132 23:10:27.504117  [DramcRunTimeConfig]

 9133 23:10:27.504186  PHYPLL

 9134 23:10:27.506986  DPM_CONTROL_AFTERK: ON

 9135 23:10:27.507053  PER_BANK_REFRESH: ON

 9136 23:10:27.510543  REFRESH_OVERHEAD_REDUCTION: ON

 9137 23:10:27.513740  CMD_PICG_NEW_MODE: OFF

 9138 23:10:27.513812  XRTWTW_NEW_MODE: ON

 9139 23:10:27.517584  XRTRTR_NEW_MODE: ON

 9140 23:10:27.517651  TX_TRACKING: ON

 9141 23:10:27.521127  RDSEL_TRACKING: OFF

 9142 23:10:27.524487  DQS Precalculation for DVFS: ON

 9143 23:10:27.524554  RX_TRACKING: OFF

 9144 23:10:27.528411  HW_GATING DBG: ON

 9145 23:10:27.528483  ZQCS_ENABLE_LP4: ON

 9146 23:10:27.531072  RX_PICG_NEW_MODE: ON

 9147 23:10:27.531146  TX_PICG_NEW_MODE: ON

 9148 23:10:27.534655  ENABLE_RX_DCM_DPHY: ON

 9149 23:10:27.537774  LOWPOWER_GOLDEN_SETTINGS(DCM): ON

 9150 23:10:27.541284  DUMMY_READ_FOR_TRACKING: OFF

 9151 23:10:27.541365  !!! SPM_CONTROL_AFTERK: OFF

 9152 23:10:27.545104  !!! SPM could not control APHY

 9153 23:10:27.548054  IMPEDANCE_TRACKING: ON

 9154 23:10:27.548158  TEMP_SENSOR: ON

 9155 23:10:27.550673  HW_SAVE_FOR_SR: OFF

 9156 23:10:27.553948  CLK_FREE_FUN_FOR_DRAMC_PSEL: OFF

 9157 23:10:27.557541  PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: OFF

 9158 23:10:27.557622  Read ODT Tracking: ON

 9159 23:10:27.560798  Refresh Rate DeBounce: ON

 9160 23:10:27.564053  DFS_NO_QUEUE_FLUSH: ON

 9161 23:10:27.568438  DFS_NO_QUEUE_FLUSH_LATENCY_CNT: OFF

 9162 23:10:27.570702  ENABLE_DFS_RUNTIME_MRW: OFF

 9163 23:10:27.570783  DDR_RESERVE_NEW_MODE: ON

 9164 23:10:27.574229  MR_CBT_SWITCH_FREQ: ON

 9165 23:10:27.577435  =========================

 9166 23:10:27.594294  [MEM] 1st complex R/W mem test pass (start addr:0x4c400000)

 9167 23:10:27.597709  dram_init: ddr_geometry: 2

 9168 23:10:27.616489  [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)

 9169 23:10:27.619609  dram_init: dram init end (result: 0)

 9170 23:10:27.626503  DRAM-K: Full calibration passed in 24567 msecs

 9171 23:10:27.629903  MRC: failed to locate region type 0.

 9172 23:10:27.629973  DRAM rank0 size:0x100000000,

 9173 23:10:27.632918  DRAM rank1 size=0x100000000

 9174 23:10:27.643461  Mapping address range [0x40000000:0x240000000) as     cacheable | read-write | non-secure | normal

 9175 23:10:27.649923  Mapping address range [0x40000000:0x40100000) as non-cacheable | read-write | non-secure | normal

 9176 23:10:27.656564  Backing address range [0x40000000:0x80000000) with new page table @0x00112000

 9177 23:10:27.662633  Backing address range [0x40000000:0x40200000) with new page table @0x00113000

 9178 23:10:27.666258  DRAM rank0 size:0x100000000,

 9179 23:10:27.670133  DRAM rank1 size=0x100000000

 9180 23:10:27.670204  CBMEM:

 9181 23:10:27.673104  IMD: root @ 0xfffff000 254 entries.

 9182 23:10:27.675997  IMD: root @ 0xffffec00 62 entries.

 9183 23:10:27.679910  FMAP: area RO_VPD found @ 3f8000 (32768 bytes)

 9184 23:10:27.683086  WARNING: RO_VPD is uninitialized or empty.

 9185 23:10:27.689480  FMAP: area RW_VPD found @ 577000 (16384 bytes)

 9186 23:10:27.696318  CBFS: Found 'fallback/ramstage' @0x21840 size 0xe01e in mcache @0x00107c80

 9187 23:10:27.709084  read SPI 0x42894 0xe01e: 6224 us, 9218 KB/s, 73.744 Mbps

 9188 23:10:27.720558  BS: romstage times (exec / console): total (unknown) / 24072 ms

 9189 23:10:27.720666  

 9190 23:10:27.720759  

 9191 23:10:27.730643  coreboot-v1.9308_26_0.0.22-20932-gb2c84cc22f Sat Sep 11 09:59:37 UTC 2021 ramstage starting (log level: 8)...

 9192 23:10:27.733892  ARM64: Exception handlers installed.

 9193 23:10:27.737286  ARM64: Testing exception

 9194 23:10:27.740181  ARM64: Done test exception

 9195 23:10:27.740262  Enumerating buses...

 9196 23:10:27.743340  Show all devs... Before device enumeration.

 9197 23:10:27.747525  Root Device: enabled 1

 9198 23:10:27.751085  CPU_CLUSTER: 0: enabled 1

 9199 23:10:27.751164  CPU: 00: enabled 1

 9200 23:10:27.753593  Compare with tree...

 9201 23:10:27.753668  Root Device: enabled 1

 9202 23:10:27.757224   CPU_CLUSTER: 0: enabled 1

 9203 23:10:27.760440    CPU: 00: enabled 1

 9204 23:10:27.760515  Root Device scanning...

 9205 23:10:27.763371  scan_static_bus for Root Device

 9206 23:10:27.766963  CPU_CLUSTER: 0 enabled

 9207 23:10:27.770409  scan_static_bus for Root Device done

 9208 23:10:27.773468  scan_bus: bus Root Device finished in 8 msecs

 9209 23:10:27.773558  done

 9210 23:10:27.780419  BS: BS_DEV_ENUMERATE run times (exec / console): 0 / 35 ms

 9211 23:10:27.783633  FMAP: area RW_MRC_CACHE found @ 57d000 (8192 bytes)

 9212 23:10:27.790164  SF: Detected 00 0000 with sector size 0x1000, total 0x800000

 9213 23:10:27.793670  BS: BS_DEV_ENUMERATE exit times (exec / console): 0 / 10 ms

 9214 23:10:27.796900  Allocating resources...

 9215 23:10:27.796978  Reading resources...

 9216 23:10:27.803803  Root Device read_resources bus 0 link: 0

 9217 23:10:27.803886  DRAM rank0 size:0x100000000,

 9218 23:10:27.806989  DRAM rank1 size=0x100000000

 9219 23:10:27.809946  CPU_CLUSTER: 0 read_resources bus 0 link: 0

 9220 23:10:27.813303  CPU: 00 missing read_resources

 9221 23:10:27.816955  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done

 9222 23:10:27.824345  Root Device read_resources bus 0 link: 0 done

 9223 23:10:27.824428  Done reading resources.

 9224 23:10:27.830028  Show resources in subtree (Root Device)...After reading.

 9225 23:10:27.833655   Root Device child on link 0 CPU_CLUSTER: 0

 9226 23:10:27.837201    CPU_CLUSTER: 0 child on link 0 CPU: 00

 9227 23:10:27.847367    CPU_CLUSTER: 0 resource base 40000000 size 200000000 align 0 gran 0 limit 0 flags e0004200 index 0

 9228 23:10:27.847446     CPU: 00

 9229 23:10:27.850756  Root Device assign_resources, bus 0 link: 0

 9230 23:10:27.853856  CPU_CLUSTER: 0 missing set_resources

 9231 23:10:27.857364  Root Device assign_resources, bus 0 link: 0 done

 9232 23:10:27.860636  Done setting resources.

 9233 23:10:27.867050  Show resources in subtree (Root Device)...After assigning values.

 9234 23:10:27.870310   Root Device child on link 0 CPU_CLUSTER: 0

 9235 23:10:27.873733    CPU_CLUSTER: 0 child on link 0 CPU: 00

 9236 23:10:27.883580    CPU_CLUSTER: 0 resource base 40000000 size 200000000 align 0 gran 0 limit 0 flags e0004200 index 0

 9237 23:10:27.883663     CPU: 00

 9238 23:10:27.886784  Done allocating resources.

 9239 23:10:27.890291  BS: BS_DEV_RESOURCES run times (exec / console): 0 / 91 ms

 9240 23:10:27.893994  Enabling resources...

 9241 23:10:27.894074  done.

 9242 23:10:27.897243  BS: BS_DEV_ENABLE run times (exec / console): 0 / 3 ms

 9243 23:10:27.900202  Initializing devices...

 9244 23:10:27.903742  Root Device init

 9245 23:10:27.903823  init hardware done!

 9246 23:10:27.906908  0x00000018: ctrlr->caps

 9247 23:10:27.906996  52.000 MHz: ctrlr->f_max

 9248 23:10:27.910299  0.400 MHz: ctrlr->f_min

 9249 23:10:27.914253  0x40ff8080: ctrlr->voltages

 9250 23:10:27.914380  sclk: 390625

 9251 23:10:27.917197  Bus Width = 1

 9252 23:10:27.917278  sclk: 390625

 9253 23:10:27.917341  Bus Width = 1

 9254 23:10:27.920390  Early init status = 3

 9255 23:10:27.923796  out: cmd=0x12e: 03 c9 2e 01 00 00 04 00 01 00 00 00 

 9256 23:10:27.928067  in-header: 03 fc 00 00 01 00 00 00 

 9257 23:10:27.931349  in-data: 00 

 9258 23:10:27.934780  out: cmd=0x12d: 03 c8 2d 01 00 00 05 00 01 00 00 00 01 

 9259 23:10:27.939414  in-header: 03 fd 00 00 00 00 00 00 

 9260 23:10:27.942783  in-data: 

 9261 23:10:27.946159  out: cmd=0x12e: 03 ca 2e 01 00 00 04 00 00 00 00 00 

 9262 23:10:27.949938  in-header: 03 fc 00 00 01 00 00 00 

 9263 23:10:27.953724  in-data: 00 

 9264 23:10:27.956602  out: cmd=0x12d: 03 c9 2d 01 00 00 05 00 00 00 00 00 01 

 9265 23:10:27.962550  in-header: 03 fd 00 00 00 00 00 00 

 9266 23:10:27.965617  in-data: 

 9267 23:10:27.969285  [SSUSB] Setting up USB HOST controller...

 9268 23:10:27.972697  [SSUSB] u3phy_ports_enable u2p:1, u3p:1

 9269 23:10:27.975840  [SSUSB] phy power-on done.

 9270 23:10:27.979639  FMAP: area COREBOOT found @ 21000 (4014080 bytes)

 9271 23:10:27.986047  CBFS: Found 'dpm.dm' @0x2fe00 size 0x20 in mcache @0xffffc13c

 9272 23:10:27.988969  mtk_init_mcu: Loaded (and reset) dpm.dm in 9 msecs (40 bytes)

 9273 23:10:27.995605  CBFS: Found 'dpm.pm' @0x2fe80 size 0x2ad3 in mcache @0xffffc16c

 9274 23:10:28.002777  read SPI 0x50eb0 0x2ad3: 1174 us, 9338 KB/s, 74.704 Mbps

 9275 23:10:28.009854  mtk_init_mcu: Loaded (and reset) dpm.pm in 13 msecs (14004 bytes)

 9276 23:10:28.015542  CBFS: Found 'spm_firmware.bin' @0x4f580 size 0x1f6a in mcache @0xffffc204

 9277 23:10:28.022251  read SPI 0x705bc 0x1f6a: 924 us, 8703 KB/s, 69.624 Mbps

 9278 23:10:28.022365  SPM: binary array size = 0x9dc

 9279 23:10:28.029149  SPM: spmfw (version pcm_suspend_v1.45_20201028_mtcmosapi_align16)

 9280 23:10:28.035980  spm_kick_im_to_fetch: ptr = 0x80000010, pmem/dmem words = 0x9c4/0x18

 9281 23:10:28.042294  mtk_init_mcu: Loaded (and reset) spm_firmware.bin in 27 msecs (10173 bytes)

 9282 23:10:28.045535  SPM: spm_init done in 34 msecs, spm pc = 0x3f4

 9283 23:10:28.049218  configure_display: Starting display init

 9284 23:10:28.085601  anx7625_power_on_init: Init interface.

 9285 23:10:28.088629  anx7625_disable_pd_protocol: Disabled PD feature.

 9286 23:10:28.092066  anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.

 9287 23:10:28.120138  anx7625_start_dp_work: Secure OCM version=00

 9288 23:10:28.124008  anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91

 9289 23:10:28.138366  sp_tx_get_edid_block: EDID Block = 1

 9290 23:10:28.240778  Extracted contents:

 9291 23:10:28.244010  header:          00 ff ff ff ff ff ff 00

 9292 23:10:28.247212  serial number:   26 cf 7d 05 00 00 00 00 00 1e

 9293 23:10:28.250345  version:         01 04

 9294 23:10:28.253681  basic params:    95 1f 11 78 0a

 9295 23:10:28.257565  chroma info:     76 90 94 55 54 90 27 21 50 54

 9296 23:10:28.260472  established:     00 00 00

 9297 23:10:28.267278  standard:        01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01

 9298 23:10:28.270699  descriptor 1:    38 36 80 a0 70 38 20 40 18 30 3c 00 35 ae 10 00 00 19

 9299 23:10:28.277923  descriptor 2:    00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

 9300 23:10:28.284024  descriptor 3:    00 00 00 fe 00 49 6e 66 6f 56 69 73 69 6f 6e 0a 20 20

 9301 23:10:28.290819  descriptor 4:    00 00 00 fe 00 52 31 34 30 4e 57 46 35 20 52 48 20 0a

 9302 23:10:28.294322  extensions:      00

 9303 23:10:28.294416  checksum:        fb

 9304 23:10:28.294497  

 9305 23:10:28.297277  Manufacturer: IVO Model 57d Serial Number 0

 9306 23:10:28.300448  Made week 0 of 2020

 9307 23:10:28.300518  EDID version: 1.4

 9308 23:10:28.304200  Digital display

 9309 23:10:28.308166  6 bits per primary color channel

 9310 23:10:28.308245  DisplayPort interface

 9311 23:10:28.310614  Maximum image size: 31 cm x 17 cm

 9312 23:10:28.310695  Gamma: 220%

 9313 23:10:28.314453  Check DPMS levels

 9314 23:10:28.318430  Supported color formats: RGB 4:4:4, YCrCb 4:2:2

 9315 23:10:28.320578  First detailed timing is preferred timing

 9316 23:10:28.324646  Established timings supported:

 9317 23:10:28.327604  Standard timings supported:

 9318 23:10:28.327674  Detailed timings

 9319 23:10:28.334160  Hex of detail: 383680a07038204018303c0035ae10000019

 9320 23:10:28.337425  Detailed mode (IN HEX): Clock 138800 KHz, 135 mm x ae mm

 9321 23:10:28.341050                 0780 0798 07c8 0820 hborder 0

 9322 23:10:28.348136                 0438 043b 0447 0458 vborder 0

 9323 23:10:28.348220                 -hsync -vsync

 9324 23:10:28.351178  Did detailed timing

 9325 23:10:28.354357  Hex of detail: 000000000000000000000000000000000000

 9326 23:10:28.357664  Manufacturer-specified data, tag 0

 9327 23:10:28.364458  Hex of detail: 000000fe00496e666f566973696f6e0a2020

 9328 23:10:28.364539  ASCII string: InfoVision

 9329 23:10:28.371295  Hex of detail: 000000fe00523134304e574635205248200a

 9330 23:10:28.371370  ASCII string: R140NWF5 RH 

 9331 23:10:28.374369  Checksum

 9332 23:10:28.374464  Checksum: 0xfb (valid)

 9333 23:10:28.380898  configure_display: 'IVO R140NWF5 RH ' 1920x1080@0Hz

 9334 23:10:28.381004  DSI data_rate: 832800000 bps

 9335 23:10:28.388767  anx7625_parse_edid: detected IVO panel, use k value 0x3b

 9336 23:10:28.391295  anx7625_parse_edid: pixelclock(138800).

 9337 23:10:28.395637   hactive(1920), hsync(48), hfp(24), hbp(88)

 9338 23:10:28.398505   vactive(1080), vsync(12), vfp(3), vbp(17)

 9339 23:10:28.401829  anx7625_dsi_config: config dsi.

 9340 23:10:28.408328  anx7625_dsi_video_config: compute M(11370496), N(552960), divider(4).

 9341 23:10:28.423146  anx7625_dsi_config: success to config DSI

 9342 23:10:28.426134  anx7625_dp_start: MIPI phy setup OK.

 9343 23:10:28.429302  mtk_ddp_mode_set display resolution: 1920x1080@0 bpp 4

 9344 23:10:28.432726  mtk_ddp_mode_set invalid vrefresh 60

 9345 23:10:28.436430  main_disp_path_setup

 9346 23:10:28.436510  ovl_layer_smi_id_en

 9347 23:10:28.439649  ovl_layer_smi_id_en

 9348 23:10:28.439751  ccorr_config

 9349 23:10:28.439841  aal_config

 9350 23:10:28.442928  gamma_config

 9351 23:10:28.443002  postmask_config

 9352 23:10:28.445756  dither_config

 9353 23:10:28.449249  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32

 9354 23:10:28.456173                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x0

 9355 23:10:28.459697  Root Device init finished in 553 msecs

 9356 23:10:28.459773  CPU_CLUSTER: 0 init

 9357 23:10:28.469294  Mapping address range [0x00200000:0x00300000) as     cacheable | read-write |     secure | device

 9358 23:10:28.472668  INFRA2APU_SRAM_PROT_EN 0x10001e98 = 0x3fffffff

 9359 23:10:28.476215  APU_MBOX 0x190000b0 = 0x10001

 9360 23:10:28.479409  APU_MBOX 0x190001b0 = 0x10001

 9361 23:10:28.483248  APU_MBOX 0x190005b0 = 0x10001

 9362 23:10:28.486209  APU_MBOX 0x190006b0 = 0x10001

 9363 23:10:28.489275  CBFS: Found 'mcupm.bin' @0x329c0 size 0xe237 in mcache @0xffffc19c

 9364 23:10:28.501636  read SPI 0x539f4 0xe237: 6247 us, 9270 KB/s, 74.160 Mbps

 9365 23:10:28.514195  mtk_init_mcu: Loaded (and reset) mcupm.bin in 24 msecs (117884 bytes)

 9366 23:10:28.520602  CBFS: Found 'sspm.bin' @0x40c40 size 0xe8ef in mcache @0xffffc1d0

 9367 23:10:28.532363  read SPI 0x61c74 0xe8ef: 6408 us, 9305 KB/s, 74.440 Mbps

 9368 23:10:28.541646  mtk_init_mcu: Loaded (and reset) sspm.bin in 21 msecs (137228 bytes)

 9369 23:10:28.544676  CPU_CLUSTER: 0 init finished in 81 msecs

 9370 23:10:28.548855  Devices initialized

 9371 23:10:28.551419  Show all devs... After init.

 9372 23:10:28.551491  Root Device: enabled 1

 9373 23:10:28.554572  CPU_CLUSTER: 0: enabled 1

 9374 23:10:28.558297  CPU: 00: enabled 1

 9375 23:10:28.561231  BS: BS_DEV_INIT run times (exec / console): 211 / 447 ms

 9376 23:10:28.565153  FMAP: area RW_ELOG found @ 57f000 (4096 bytes)

 9377 23:10:28.568592  ELOG: NV offset 0x57f000 size 0x1000

 9378 23:10:28.574823  read SPI 0x57f000 0x1000: 487 us, 8410 KB/s, 67.280 Mbps

 9379 23:10:28.581834  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024

 9380 23:10:28.584862  ELOG: Event(17) added with size 13 at 2023-12-27 23:11:07 UTC

 9381 23:10:28.588097  out: cmd=0x121: 03 db 21 01 00 00 00 00 

 9382 23:10:28.592189  in-header: 03 dd 00 00 2c 00 00 00 

 9383 23:10:28.606526  in-data: 82 68 00 00 00 00 00 00 0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 

 9384 23:10:28.612963  ELOG: Event(A1) added with size 10 at 2023-12-27 23:11:07 UTC

 9385 23:10:28.619042  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b

 9386 23:10:28.625626  ELOG: Event(A0) added with size 9 at 2023-12-27 23:11:07 UTC

 9387 23:10:28.629023  elog_add_boot_reason: Logged dev mode boot

 9388 23:10:28.632275  BS: BS_POST_DEVICE entry times (exec / console): 3 / 64 ms

 9389 23:10:28.636172  Finalize devices...

 9390 23:10:28.636250  Devices finalized

 9391 23:10:28.642442  BS: BS_POST_DEVICE run times (exec / console): 0 / 3 ms

 9392 23:10:28.645765  Writing coreboot table at 0xffe64000

 9393 23:10:28.648973   0. 000000000010a000-0000000000113fff: RAMSTAGE

 9394 23:10:28.652445   1. 0000000040000000-00000000400fffff: RAM

 9395 23:10:28.655873   2. 0000000040100000-000000004032afff: RAMSTAGE

 9396 23:10:28.662823   3. 000000004032b000-00000000545fffff: RAM

 9397 23:10:28.666375   4. 0000000054600000-000000005465ffff: BL31

 9398 23:10:28.669965   5. 0000000054660000-00000000ffe63fff: RAM

 9399 23:10:28.672895   6. 00000000ffe64000-00000000ffffffff: CONFIGURATION TABLES

 9400 23:10:28.679174   7. 0000000100000000-000000023fffffff: RAM

 9401 23:10:28.679249  Passing 5 GPIOs to payload:

 9402 23:10:28.686293              NAME |       PORT | POLARITY |     VALUE

 9403 23:10:28.688998          EC in RW | 0x000000aa |      low | undefined

 9404 23:10:28.695982      EC interrupt | 0x00000005 |      low | undefined

 9405 23:10:28.699118     TPM interrupt | 0x000000ab |     high | undefined

 9406 23:10:28.702311    SD card detect | 0x00000011 |     high | undefined

 9407 23:10:28.709230    speaker enable | 0x00000093 |     high | undefined

 9408 23:10:28.712515  out: cmd=0x6: 03 f7 06 00 00 00 00 00 

 9409 23:10:28.715790  in-header: 03 f9 00 00 02 00 00 00 

 9410 23:10:28.715861  in-data: 02 00 

 9411 23:10:28.718818  ADC[4]: Raw value=900590 ID=7

 9412 23:10:28.722135  ADC[3]: Raw value=213336 ID=1

 9413 23:10:28.722210  RAM Code: 0x71

 9414 23:10:28.726020  ADC[6]: Raw value=74557 ID=0

 9415 23:10:28.728907  ADC[5]: Raw value=211860 ID=1

 9416 23:10:28.729001  SKU Code: 0x1

 9417 23:10:28.736712  Wrote coreboot table at: 0xffe64000, 0x3ac bytes, checksum 703a

 9418 23:10:28.739388  coreboot table: 964 bytes.

 9419 23:10:28.742519  IMD ROOT    0. 0xfffff000 0x00001000

 9420 23:10:28.745367  IMD SMALL   1. 0xffffe000 0x00001000

 9421 23:10:28.749019  RO MCACHE   2. 0xffffc000 0x00001104

 9422 23:10:28.752517  CONSOLE     3. 0xfff7c000 0x00080000

 9423 23:10:28.755524  FMAP        4. 0xfff7b000 0x00000452

 9424 23:10:28.759298  TIME STAMP  5. 0xfff7a000 0x00000910

 9425 23:10:28.762866  VBOOT WORK  6. 0xfff66000 0x00014000

 9426 23:10:28.765994  RAMOOPS     7. 0xffe66000 0x00100000

 9427 23:10:28.768878  COREBOOT    8. 0xffe64000 0x00002000

 9428 23:10:28.768947  IMD small region:

 9429 23:10:28.772893    IMD ROOT    0. 0xffffec00 0x00000400

 9430 23:10:28.775451    VPD         1. 0xffffeb80 0x0000006c

 9431 23:10:28.779040    MMC STATUS  2. 0xffffeb60 0x00000004

 9432 23:10:28.785749  BS: BS_WRITE_TABLES run times (exec / console): 1 / 137 ms

 9433 23:10:28.785824  Probing TPM:  done!

 9434 23:10:28.792966  Connected to device vid:did:rid of 1ae0:0028:00

 9435 23:10:28.799471  Firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_B:0.6.171/cr50_v3.94_pp.126-3593bf581c

 9436 23:10:28.802639  Initialized TPM device CR50 revision 0

 9437 23:10:28.806319  Checking cr50 for pending updates

 9438 23:10:28.812141  Reading cr50 TPM mode

 9439 23:10:28.820721  BS: BS_PAYLOAD_LOAD entry times (exec / console): 9 / 22 ms

 9440 23:10:28.827590  CBFS: Found 'fallback/payload' @0x3780c0 size 0x4f1b0 in mcache @0xffffd098

 9441 23:10:28.867576  read SPI 0x3990ec 0x4f1b0: 34849 us, 9297 KB/s, 74.376 Mbps

 9442 23:10:28.870904  Checking segment from ROM address 0x40100000

 9443 23:10:28.875089  Checking segment from ROM address 0x4010001c

 9444 23:10:28.880573  Loading segment from ROM address 0x40100000

 9445 23:10:28.880648    code (compression=0)

 9446 23:10:28.887539    New segment dstaddr 0x80000000 memsize 0x21a7280 srcaddr 0x40100038 filesize 0x4f178

 9447 23:10:28.897576  Loading Segment: addr: 0x80000000 memsz: 0x00000000021a7280 filesz: 0x000000000004f178

 9448 23:10:28.897653  it's not compressed!

 9449 23:10:28.904610  [ 0x80000000, 8004f178, 0x821a7280) <- 40100038

 9450 23:10:28.908140  Clearing Segment: addr: 0x000000008004f178 memsz: 0x0000000002158108

 9451 23:10:28.927906  Loading segment from ROM address 0x4010001c

 9452 23:10:28.928005    Entry Point 0x80000000

 9453 23:10:28.931543  Loaded segments

 9454 23:10:28.935075  BS: BS_PAYLOAD_LOAD run times (exec / console): 48 / 61 ms

 9455 23:10:28.941284  Jumping to boot code at 0x80000000(0xffe64000)

 9456 23:10:28.948255  CPU0: stack: 0x0010a000 - 0x0010d000, lowest used address 0x0010c500, stack used: 2816 bytes

 9457 23:10:28.954894  CBFS: Found 'fallback/bl31' @0x6db40 size 0x74a8 in mcache @0xffffc290

 9458 23:10:28.962131  read SPI 0x8eb68 0x74a8: 3224 us, 9263 KB/s, 74.104 Mbps

 9459 23:10:28.965788  Checking segment from ROM address 0x40100000

 9460 23:10:28.968730  Checking segment from ROM address 0x4010001c

 9461 23:10:28.972965  Loading segment from ROM address 0x40100000

 9462 23:10:28.975805    code (compression=1)

 9463 23:10:28.982373    New segment dstaddr 0x54600000 memsize 0x2e000 srcaddr 0x40100038 filesize 0x7470

 9464 23:10:28.993941  Loading Segment: addr: 0x54600000 memsz: 0x000000000002e000 filesz: 0x0000000000007470

 9465 23:10:28.994017  using LZMA

 9466 23:10:29.000405  [ 0x54600000, 54614abc, 0x5462e000) <- 40100038

 9467 23:10:29.007549  Clearing Segment: addr: 0x0000000054614abc memsz: 0x0000000000019544

 9468 23:10:29.011029  Loading segment from ROM address 0x4010001c

 9469 23:10:29.011104    Entry Point 0x54601000

 9470 23:10:29.014315  Loaded segments

 9471 23:10:29.017648  NOTICE:  MT8192 bl31_setup

 9472 23:10:29.024286  NOTICE:  BL31: v2.4(debug):v2.4-448-gce3ebc861

 9473 23:10:29.027847  NOTICE:  BL31: Built : Sat Sep 11 09:59:37 UTC 2021

 9474 23:10:29.031375  WARNING: region 0:

 9475 23:10:29.034415  WARNING: 	sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0

 9476 23:10:29.034497  WARNING: region 1:

 9477 23:10:29.040757  WARNING: 	sa:0x8000, ea:0x83ff, apc0: 0x80b6db40 apc1: 0xb6db6d

 9478 23:10:29.044102  WARNING: region 2:

 9479 23:10:29.048267  WARNING: 	sa:0x1000, ea:0x113f, apc0: 0x80b6d168 apc1: 0xb6db6d

 9480 23:10:29.051130  WARNING: region 3:

 9481 23:10:29.054579  WARNING: 	sa:0x0, ea:0x1bfff, apc0: 0x80b6db68 apc1: 0xb6db6d

 9482 23:10:29.057594  WARNING: region 4:

 9483 23:10:29.061013  WARNING: 	sa:0x0, ea:0x1bfff, apc0: 0x80b6db68 apc1: 0xb6db6d

 9484 23:10:29.065621  WARNING: region 5:

 9485 23:10:29.067526  WARNING: 	sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0

 9486 23:10:29.071115  WARNING: region 6:

 9487 23:10:29.074869  WARNING: 	sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0

 9488 23:10:29.074940  WARNING: region 7:

 9489 23:10:29.081676  WARNING: 	sa:0x0, ea:0x0, apc0: 0x0 apc1: 0x0

 9490 23:10:29.088091  INFO:    [DEVAPC] (INFRA_AO_SYS0)D0_APC_0: 0x14000000

 9491 23:10:29.091543  INFO:    [DEVAPC] (INFRA_AO_SYS0)D0_APC_1: 0x0

 9492 23:10:29.094840  INFO:    [DEVAPC] (INFRA_AO_SYS0)D1_APC_0: 0xffffffff

 9493 23:10:29.098165  INFO:    [DEVAPC] (INFRA_AO_SYS0)D1_APC_1: 0xfff

 9494 23:10:29.105296  INFO:    [DEVAPC] (INFRA_AO_SYS0)D2_APC_0: 0xffffffff

 9495 23:10:29.108732  INFO:    [DEVAPC] (INFRA_AO_SYS0)D2_APC_1: 0x3f00

 9496 23:10:29.115078  INFO:    [DEVAPC] (INFRA_AO_SYS0)D3_APC_0: 0xffffffff

 9497 23:10:29.118715  INFO:    [DEVAPC] (INFRA_AO_SYS0)D3_APC_1: 0x3fff

 9498 23:10:29.121709  INFO:    [DEVAPC] (INFRA_AO_SYS0)D4_APC_0: 0xffffffff

 9499 23:10:29.128207  INFO:    [DEVAPC] (INFRA_AO_SYS0)D4_APC_1: 0x3fff

 9500 23:10:29.131432  INFO:    [DEVAPC] (INFRA_AO_SYS0)D5_APC_0: 0xffffffff

 9501 23:10:29.134827  INFO:    [DEVAPC] (INFRA_AO_SYS0)D5_APC_1: 0x3fff

 9502 23:10:29.142054  INFO:    [DEVAPC] (INFRA_AO_SYS0)D6_APC_0: 0xffffffff

 9503 23:10:29.145015  INFO:    [DEVAPC] (INFRA_AO_SYS0)D6_APC_1: 0x3fff

 9504 23:10:29.148770  INFO:    [DEVAPC] (INFRA_AO_SYS0)D7_APC_0: 0xffffffff

 9505 23:10:29.155700  INFO:    [DEVAPC] (INFRA_AO_SYS0)D7_APC_1: 0x3fff

 9506 23:10:29.158541  INFO:    [DEVAPC] (INFRA_AO_SYS0)D8_APC_0: 0xffffffff

 9507 23:10:29.162155  INFO:    [DEVAPC] (INFRA_AO_SYS0)D8_APC_1: 0x3fff

 9508 23:10:29.168732  INFO:    [DEVAPC] (INFRA_AO_SYS0)D9_APC_0: 0xffffffff

 9509 23:10:29.172309  INFO:    [DEVAPC] (INFRA_AO_SYS0)D9_APC_1: 0x3fff

 9510 23:10:29.179100  INFO:    [DEVAPC] (INFRA_AO_SYS0)D10_APC_0: 0xffffffff

 9511 23:10:29.182004  INFO:    [DEVAPC] (INFRA_AO_SYS0)D10_APC_1: 0x3fff

 9512 23:10:29.185927  INFO:    [DEVAPC] (INFRA_AO_SYS0)D11_APC_0: 0xffffffff

 9513 23:10:29.192491  INFO:    [DEVAPC] (INFRA_AO_SYS0)D11_APC_1: 0x3fff

 9514 23:10:29.195660  INFO:    [DEVAPC] (INFRA_AO_SYS0)D12_APC_0: 0xffffffff

 9515 23:10:29.198813  INFO:    [DEVAPC] (INFRA_AO_SYS0)D12_APC_1: 0x3fff

 9516 23:10:29.205846  INFO:    [DEVAPC] (INFRA_AO_SYS0)D13_APC_0: 0xffffffff

 9517 23:10:29.209127  INFO:    [DEVAPC] (INFRA_AO_SYS0)D13_APC_1: 0x3fff

 9518 23:10:29.215791  INFO:    [DEVAPC] (INFRA_AO_SYS0)D14_APC_0: 0xffffffff

 9519 23:10:29.219463  INFO:    [DEVAPC] (INFRA_AO_SYS0)D14_APC_1: 0x3fff

 9520 23:10:29.222980  INFO:    [DEVAPC] (INFRA_AO_SYS0)D15_APC_0: 0xffffffff

 9521 23:10:29.229395  INFO:    [DEVAPC] (INFRA_AO_SYS0)D15_APC_1: 0x3fff

 9522 23:10:29.232522  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_0: 0x0

 9523 23:10:29.236042  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_1: 0x0

 9524 23:10:29.239862  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_2: 0x0

 9525 23:10:29.246304  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_3: 0x0

 9526 23:10:29.249650  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_4: 0x0

 9527 23:10:29.252843  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_5: 0x0

 9528 23:10:29.256092  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_6: 0x0

 9529 23:10:29.262827  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_7: 0x0

 9530 23:10:29.266208  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_8: 0x0

 9531 23:10:29.269452  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_9: 0x0

 9532 23:10:29.272711  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_10: 0x0

 9533 23:10:29.279505  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_11: 0x0

 9534 23:10:29.283153  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_12: 0x0

 9535 23:10:29.286341  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_13: 0x0

 9536 23:10:29.289316  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_14: 0x0

 9537 23:10:29.296613  INFO:    [DEVAPC] (INFRA_AO_SYS1)D0_APC_15: 0x0

 9538 23:10:29.299958  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_0: 0xffffffff

 9539 23:10:29.303012  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_1: 0xffffffff

 9540 23:10:29.309849  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_2: 0xffffffff

 9541 23:10:29.313512  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_3: 0xffffffff

 9542 23:10:29.320092  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_4: 0xffffffff

 9543 23:10:29.324159  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_5: 0xffffffff

 9544 23:10:29.326603  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_6: 0xffffffff

 9545 23:10:29.333352  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_7: 0xffffffff

 9546 23:10:29.336743  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_8: 0xffffffff

 9547 23:10:29.343431  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_9: 0xffffffff

 9548 23:10:29.346983  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_10: 0xffffffff

 9549 23:10:29.353682  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_11: 0xffffffff

 9550 23:10:29.357050  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_12: 0xffffffff

 9551 23:10:29.361001  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_13: 0xffffffff

 9552 23:10:29.367519  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_14: 0xffffffff

 9553 23:10:29.370506  INFO:    [DEVAPC] (INFRA_AO_SYS1)D1_APC_15: 0xffffffff

 9554 23:10:29.377060  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_0: 0xffffffff

 9555 23:10:29.380477  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_1: 0xffffffff

 9556 23:10:29.387344  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_2: 0xffffffff

 9557 23:10:29.390721  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_3: 0xffffffff

 9558 23:10:29.393734  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_4: 0xffffffff

 9559 23:10:29.400443  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_5: 0xffffffff

 9560 23:10:29.403863  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_6: 0xffffffff

 9561 23:10:29.410686  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_7: 0xffffffff

 9562 23:10:29.414226  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_8: 0xffffffff

 9563 23:10:29.417478  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_9: 0xffffffff

 9564 23:10:29.424407  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_10: 0xffffffff

 9565 23:10:29.427305  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_11: 0xffffffff

 9566 23:10:29.434702  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_12: 0xffffffff

 9567 23:10:29.437866  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_13: 0xffffffff

 9568 23:10:29.444180  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_14: 0xffffffff

 9569 23:10:29.447840  INFO:    [DEVAPC] (INFRA_AO_SYS1)D2_APC_15: 0xffffffff

 9570 23:10:29.450929  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_0: 0xffffffff

 9571 23:10:29.458450  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_1: 0xffffffff

 9572 23:10:29.460799  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_2: 0xffffffff

 9573 23:10:29.467960  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_3: 0xffffffff

 9574 23:10:29.471121  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_4: 0xffffffff

 9575 23:10:29.477911  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_5: 0xcfff30ff

 9576 23:10:29.481163  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_6: 0xffffffff

 9577 23:10:29.485077  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_7: 0xffffffff

 9578 23:10:29.491717  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_8: 0xffffffff

 9579 23:10:29.494807  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_9: 0xffffffff

 9580 23:10:29.501665  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_10: 0xffffffff

 9581 23:10:29.504594  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_11: 0xffffffff

 9582 23:10:29.508430  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_12: 0xffffffff

 9583 23:10:29.515028  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_13: 0xffffffff

 9584 23:10:29.518188  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_14: 0xffffffff

 9585 23:10:29.525288  INFO:    [DEVAPC] (INFRA_AO_SYS1)D3_APC_15: 0xffffffff

 9586 23:10:29.528453  INFO:    [DEVAPC] (INFRA_AO_SYS2)D0_APC_0: 0x0

 9587 23:10:29.531480  INFO:    [DEVAPC] (INFRA_AO_SYS2)D0_APC_1: 0x0

 9588 23:10:29.538265  INFO:    [DEVAPC] (INFRA_AO_SYS2)D0_APC_2: 0x0

 9589 23:10:29.541312  INFO:    [DEVAPC] (INFRA_AO_SYS2)D0_APC_3: 0x0

 9590 23:10:29.544755  INFO:    [DEVAPC] (INFRA_AO_SYS2)D0_APC_4: 0x0

 9591 23:10:29.548438  INFO:    [DEVAPC] (INFRA_AO_SYS2)D1_APC_0: 0xffffffff

 9592 23:10:29.555125  INFO:    [DEVAPC] (INFRA_AO_SYS2)D1_APC_1: 0xffffffff

 9593 23:10:29.558195  INFO:    [DEVAPC] (INFRA_AO_SYS2)D1_APC_2: 0xffffffff

 9594 23:10:29.565013  INFO:    [DEVAPC] (INFRA_AO_SYS2)D1_APC_3: 0xffffffff

 9595 23:10:29.568546  INFO:    [DEVAPC] (INFRA_AO_SYS2)D1_APC_4: 0xfff

 9596 23:10:29.571667  INFO:    [DEVAPC] (INFRA_AO_SYS2)D2_APC_0: 0xffffffff

 9597 23:10:29.578644  INFO:    [DEVAPC] (INFRA_AO_SYS2)D2_APC_1: 0xffffffff

 9598 23:10:29.582320  INFO:    [DEVAPC] (INFRA_AO_SYS2)D2_APC_2: 0xffffffff

 9599 23:10:29.588811  INFO:    [DEVAPC] (INFRA_AO_SYS2)D2_APC_3: 0xffffffff

 9600 23:10:29.592013  INFO:    [DEVAPC] (INFRA_AO_SYS2)D2_APC_4: 0xfff

 9601 23:10:29.595153  INFO:    [DEVAPC] (INFRA_AO_SYS2)D3_APC_0: 0xffffffff

 9602 23:10:29.601705  INFO:    [DEVAPC] (INFRA_AO_SYS2)D3_APC_1: 0xffffffff

 9603 23:10:29.605039  INFO:    [DEVAPC] (INFRA_AO_SYS2)D3_APC_2: 0xffffffff

 9604 23:10:29.612118  INFO:    [DEVAPC] (INFRA_AO_SYS2)D3_APC_3: 0xffffffff

 9605 23:10:29.615183  INFO:    [DEVAPC] (INFRA_AO_SYS2)D3_APC_4: 0xfff

 9606 23:10:29.618833  INFO:    [DEVAPC] (INFRA_AO)MAS_SEC_0: 0x18

 9607 23:10:29.622455  INFO:    [DEVAPC] (PERI_AO_SYS0)D0_APC_0: 0x10000000

 9608 23:10:29.628965  INFO:    [DEVAPC] (PERI_AO_SYS0)D0_APC_1: 0x1000004

 9609 23:10:29.631915  INFO:    [DEVAPC] (PERI_AO_SYS0)D0_APC_2: 0x0

 9610 23:10:29.636294  INFO:    [DEVAPC] (PERI_AO_SYS0)D0_APC_3: 0x0

 9611 23:10:29.638772  INFO:    [DEVAPC] (PERI_AO_SYS0)D0_APC_4: 0x0

 9612 23:10:29.642414  INFO:    [DEVAPC] (PERI_AO_SYS0)D0_APC_5: 0x0

 9613 23:10:29.648846  INFO:    [DEVAPC] (PERI_AO_SYS0)D0_APC_6: 0x10000

 9614 23:10:29.653098  INFO:    [DEVAPC] (PERI_AO_SYS0)D1_APC_0: 0xffffffff

 9615 23:10:29.659947  INFO:    [DEVAPC] (PERI_AO_SYS0)D1_APC_1: 0xffffffff

 9616 23:10:29.662541  INFO:    [DEVAPC] (PERI_AO_SYS0)D1_APC_2: 0xffffffff

 9617 23:10:29.666296  INFO:    [DEVAPC] (PERI_AO_SYS0)D1_APC_3: 0x3fffffff

 9618 23:10:29.672613  INFO:    [DEVAPC] (PERI_AO_SYS0)D1_APC_4: 0xffffffff

 9619 23:10:29.675862  INFO:    [DEVAPC] (PERI_AO_SYS0)D1_APC_5: 0xffffffff

 9620 23:10:29.679536  INFO:    [DEVAPC] (PERI_AO_SYS0)D1_APC_6: 0x3ffff

 9621 23:10:29.686110  INFO:    [DEVAPC] (PERI_AO_SYS0)D2_APC_0: 0xfffc03fc

 9622 23:10:29.689423  INFO:    [DEVAPC] (PERI_AO_SYS0)D2_APC_1: 0xfff3ffff

 9623 23:10:29.696801  INFO:    [DEVAPC] (PERI_AO_SYS0)D2_APC_2: 0xfffcfccf

 9624 23:10:29.699414  INFO:    [DEVAPC] (PERI_AO_SYS0)D2_APC_3: 0xff3fffff

 9625 23:10:29.703002  INFO:    [DEVAPC] (PERI_AO_SYS0)D2_APC_4: 0xffff3ffc

 9626 23:10:29.709415  INFO:    [DEVAPC] (PERI_AO_SYS0)D2_APC_5: 0xffffffff

 9627 23:10:29.712508  INFO:    [DEVAPC] (PERI_AO_SYS0)D2_APC_6: 0x3ffff

 9628 23:10:29.717086  INFO:    [DEVAPC] (PERI_AO_SYS0)D3_APC_0: 0xff3f33ff

 9629 23:10:29.722975  INFO:    [DEVAPC] (PERI_AO_SYS0)D3_APC_1: 0xffffffff

 9630 23:10:29.725920  INFO:    [DEVAPC] (PERI_AO_SYS0)D3_APC_2: 0xffffffff

 9631 23:10:29.733157  INFO:    [DEVAPC] (PERI_AO_SYS0)D3_APC_3: 0xffffffff

 9632 23:10:29.736001  INFO:    [DEVAPC] (PERI_AO_SYS0)D3_APC_4: 0xffffffff

 9633 23:10:29.739750  INFO:    [DEVAPC] (PERI_AO_SYS0)D3_APC_5: 0xffffffff

 9634 23:10:29.746309  INFO:    [DEVAPC] (PERI_AO_SYS0)D3_APC_6: 0x3ffff

 9635 23:10:29.749902  INFO:    [DEVAPC] (PERI_AO_SYS0)D4_APC_0: 0xffffffff

 9636 23:10:29.753297  INFO:    [DEVAPC] (PERI_AO_SYS0)D4_APC_1: 0xffffffff

 9637 23:10:29.759541  INFO:    [DEVAPC] (PERI_AO_SYS0)D4_APC_2: 0xffffffff

 9638 23:10:29.763112  INFO:    [DEVAPC] (PERI_AO_SYS0)D4_APC_3: 0xffffffff

 9639 23:10:29.769948  INFO:    [DEVAPC] (PERI_AO_SYS0)D4_APC_4: 0xffffffff

 9640 23:10:29.773165  INFO:    [DEVAPC] (PERI_AO_SYS0)D4_APC_5: 0xffffffff

 9641 23:10:29.776711  INFO:    [DEVAPC] (PERI_AO_SYS0)D4_APC_6: 0x3ffff

 9642 23:10:29.783570  INFO:    [DEVAPC] (PERI_AO_SYS0)D5_APC_0: 0xffffffff

 9643 23:10:29.787026  INFO:    [DEVAPC] (PERI_AO_SYS0)D5_APC_1: 0xffffffff

 9644 23:10:29.790433  INFO:    [DEVAPC] (PERI_AO_SYS0)D5_APC_2: 0xffffffff

 9645 23:10:29.796968  INFO:    [DEVAPC] (PERI_AO_SYS0)D5_APC_3: 0xffffffff

 9646 23:10:29.799970  INFO:    [DEVAPC] (PERI_AO_SYS0)D5_APC_4: 0xffffffff

 9647 23:10:29.806681  INFO:    [DEVAPC] (PERI_AO_SYS0)D5_APC_5: 0xffffffff

 9648 23:10:29.809970  INFO:    [DEVAPC] (PERI_AO_SYS0)D5_APC_6: 0x3ffff

 9649 23:10:29.813387  INFO:    [DEVAPC] (PERI_AO_SYS0)D6_APC_0: 0xffffffff

 9650 23:10:29.820502  INFO:    [DEVAPC] (PERI_AO_SYS0)D6_APC_1: 0xffffffff

 9651 23:10:29.823657  INFO:    [DEVAPC] (PERI_AO_SYS0)D6_APC_2: 0xffffffff

 9652 23:10:29.827160  INFO:    [DEVAPC] (PERI_AO_SYS0)D6_APC_3: 0xffffffff

 9653 23:10:29.833672  INFO:    [DEVAPC] (PERI_AO_SYS0)D6_APC_4: 0xffffffff

 9654 23:10:29.836750  INFO:    [DEVAPC] (PERI_AO_SYS0)D6_APC_5: 0xffffffff

 9655 23:10:29.843480  INFO:    [DEVAPC] (PERI_AO_SYS0)D6_APC_6: 0x3ffff

 9656 23:10:29.847044  INFO:    [DEVAPC] (PERI_AO_SYS0)D7_APC_0: 0xffffffff

 9657 23:10:29.850075  INFO:    [DEVAPC] (PERI_AO_SYS0)D7_APC_1: 0xffffffff

 9658 23:10:29.856800  INFO:    [DEVAPC] (PERI_AO_SYS0)D7_APC_2: 0xffffffff

 9659 23:10:29.860131  INFO:    [DEVAPC] (PERI_AO_SYS0)D7_APC_3: 0xffffffff

 9660 23:10:29.867199  INFO:    [DEVAPC] (PERI_AO_SYS0)D7_APC_4: 0xffffffff

 9661 23:10:29.870757  INFO:    [DEVAPC] (PERI_AO_SYS0)D7_APC_5: 0xffffffff

 9662 23:10:29.873466  INFO:    [DEVAPC] (PERI_AO_SYS0)D7_APC_6: 0x3ffff

 9663 23:10:29.880836  INFO:    [DEVAPC] (PERI_AO_SYS0)D8_APC_0: 0xfffff3ff

 9664 23:10:29.883326  INFO:    [DEVAPC] (PERI_AO_SYS0)D8_APC_1: 0xffffffff

 9665 23:10:29.887019  INFO:    [DEVAPC] (PERI_AO_SYS0)D8_APC_2: 0xffffffff

 9666 23:10:29.894105  INFO:    [DEVAPC] (PERI_AO_SYS0)D8_APC_3: 0xffffffff

 9667 23:10:29.896881  INFO:    [DEVAPC] (PERI_AO_SYS0)D8_APC_4: 0xffffffff

 9668 23:10:29.903517  INFO:    [DEVAPC] (PERI_AO_SYS0)D8_APC_5: 0xffffffff

 9669 23:10:29.907495  INFO:    [DEVAPC] (PERI_AO_SYS0)D8_APC_6: 0x3ffff

 9670 23:10:29.910724  INFO:    [DEVAPC] (PERI_AO_SYS0)D9_APC_0: 0xffffffff

 9671 23:10:29.917164  INFO:    [DEVAPC] (PERI_AO_SYS0)D9_APC_1: 0xffffffff

 9672 23:10:29.920562  INFO:    [DEVAPC] (PERI_AO_SYS0)D9_APC_2: 0xffffffff

 9673 23:10:29.926751  INFO:    [DEVAPC] (PERI_AO_SYS0)D9_APC_3: 0xffffffff

 9674 23:10:29.930237  INFO:    [DEVAPC] (PERI_AO_SYS0)D9_APC_4: 0xffffffff

 9675 23:10:29.933835  INFO:    [DEVAPC] (PERI_AO_SYS0)D9_APC_5: 0xffffffff

 9676 23:10:29.940610  INFO:    [DEVAPC] (PERI_AO_SYS0)D9_APC_6: 0x3ffff

 9677 23:10:29.944352  INFO:    [DEVAPC] (PERI_AO_SYS0)D10_APC_0: 0xffffffff

 9678 23:10:29.947028  INFO:    [DEVAPC] (PERI_AO_SYS0)D10_APC_1: 0xffffffff

 9679 23:10:29.953632  INFO:    [DEVAPC] (PERI_AO_SYS0)D10_APC_2: 0xffffffff

 9680 23:10:29.957020  INFO:    [DEVAPC] (PERI_AO_SYS0)D10_APC_3: 0xffffffff

 9681 23:10:29.963800  INFO:    [DEVAPC] (PERI_AO_SYS0)D10_APC_4: 0xffffffff

 9682 23:10:29.967086  INFO:    [DEVAPC] (PERI_AO_SYS0)D10_APC_5: 0xffffffff

 9683 23:10:29.973548  INFO:    [DEVAPC] (PERI_AO_SYS0)D10_APC_6: 0x3ffff

 9684 23:10:29.976868  INFO:    [DEVAPC] (PERI_AO_SYS0)D11_APC_0: 0xffffffff

 9685 23:10:29.980179  INFO:    [DEVAPC] (PERI_AO_SYS0)D11_APC_1: 0xffffffff

 9686 23:10:29.986791  INFO:    [DEVAPC] (PERI_AO_SYS0)D11_APC_2: 0xffffffff

 9687 23:10:29.990194  INFO:    [DEVAPC] (PERI_AO_SYS0)D11_APC_3: 0xffffffff

 9688 23:10:29.996927  INFO:    [DEVAPC] (PERI_AO_SYS0)D11_APC_4: 0xffffffff

 9689 23:10:30.000129  INFO:    [DEVAPC] (PERI_AO_SYS0)D11_APC_5: 0xffffffff

 9690 23:10:30.003581  INFO:    [DEVAPC] (PERI_AO_SYS0)D11_APC_6: 0x3ffff

 9691 23:10:30.010301  INFO:    [DEVAPC] (PERI_AO_SYS0)D12_APC_0: 0xffffffff

 9692 23:10:30.013591  INFO:    [DEVAPC] (PERI_AO_SYS0)D12_APC_1: 0xffffffff

 9693 23:10:30.020579  INFO:    [DEVAPC] (PERI_AO_SYS0)D12_APC_2: 0xffffffff

 9694 23:10:30.023956  INFO:    [DEVAPC] (PERI_AO_SYS0)D12_APC_3: 0xffffffff

 9695 23:10:30.026995  INFO:    [DEVAPC] (PERI_AO_SYS0)D12_APC_4: 0xffffffff

 9696 23:10:30.033952  INFO:    [DEVAPC] (PERI_AO_SYS0)D12_APC_5: 0xffffffff

 9697 23:10:30.037177  INFO:    [DEVAPC] (PERI_AO_SYS0)D12_APC_6: 0x3ffff

 9698 23:10:30.044039  INFO:    [DEVAPC] (PERI_AO_SYS0)D13_APC_0: 0xffffffff

 9699 23:10:30.047020  INFO:    [DEVAPC] (PERI_AO_SYS0)D13_APC_1: 0xffffffff

 9700 23:10:30.051008  INFO:    [DEVAPC] (PERI_AO_SYS0)D13_APC_2: 0xffffffff

 9701 23:10:30.057398  INFO:    [DEVAPC] (PERI_AO_SYS0)D13_APC_3: 0xffffffff

 9702 23:10:30.060424  INFO:    [DEVAPC] (PERI_AO_SYS0)D13_APC_4: 0xffffffff

 9703 23:10:30.067542  INFO:    [DEVAPC] (PERI_AO_SYS0)D13_APC_5: 0xffffffff

 9704 23:10:30.070788  INFO:    [DEVAPC] (PERI_AO_SYS0)D13_APC_6: 0x3ffff

 9705 23:10:30.073867  INFO:    [DEVAPC] (PERI_AO_SYS0)D14_APC_0: 0xffffffff

 9706 23:10:30.081372  INFO:    [DEVAPC] (PERI_AO_SYS0)D14_APC_1: 0xffffffff

 9707 23:10:30.084172  INFO:    [DEVAPC] (PERI_AO_SYS0)D14_APC_2: 0xffffffff

 9708 23:10:30.090753  INFO:    [DEVAPC] (PERI_AO_SYS0)D14_APC_3: 0xffffffff

 9709 23:10:30.093946  INFO:    [DEVAPC] (PERI_AO_SYS0)D14_APC_4: 0xffffffff

 9710 23:10:30.101282  INFO:    [DEVAPC] (PERI_AO_SYS0)D14_APC_5: 0xffffffff

 9711 23:10:30.103935  INFO:    [DEVAPC] (PERI_AO_SYS0)D14_APC_6: 0x3ffff

 9712 23:10:30.107610  INFO:    [DEVAPC] (PERI_AO_SYS0)D15_APC_0: 0xffffffff

 9713 23:10:30.114257  INFO:    [DEVAPC] (PERI_AO_SYS0)D15_APC_1: 0xffffffff

 9714 23:10:30.117341  INFO:    [DEVAPC] (PERI_AO_SYS0)D15_APC_2: 0xffffffff

 9715 23:10:30.124607  INFO:    [DEVAPC] (PERI_AO_SYS0)D15_APC_3: 0xffffffff

 9716 23:10:30.127973  INFO:    [DEVAPC] (PERI_AO_SYS0)D15_APC_4: 0xffffffff

 9717 23:10:30.131036  INFO:    [DEVAPC] (PERI_AO_SYS0)D15_APC_5: 0xffffffff

 9718 23:10:30.137417  INFO:    [DEVAPC] (PERI_AO_SYS0)D15_APC_6: 0x3ffff

 9719 23:10:30.141101  INFO:    [DEVAPC] (PERI_AO_SYS1)D0_APC_0: 0x0

 9720 23:10:30.144238  INFO:    [DEVAPC] (PERI_AO_SYS1)D0_APC_1: 0x0

 9721 23:10:30.147261  INFO:    [DEVAPC] (PERI_AO_SYS1)D0_APC_2: 0x0

 9722 23:10:30.154039  INFO:    [DEVAPC] (PERI_AO_SYS1)D0_APC_3: 0x0

 9723 23:10:30.157593  INFO:    [DEVAPC] (PERI_AO_SYS1)D0_APC_4: 0x0

 9724 23:10:30.161512  INFO:    [DEVAPC] (PERI_AO_SYS1)D1_APC_0: 0xffffffff

 9725 23:10:30.167664  INFO:    [DEVAPC] (PERI_AO_SYS1)D1_APC_1: 0xffffffff

 9726 23:10:30.170862  INFO:    [DEVAPC] (PERI_AO_SYS1)D1_APC_2: 0xffffffff

 9727 23:10:30.174377  INFO:    [DEVAPC] (PERI_AO_SYS1)D1_APC_3: 0xffffffff

 9728 23:10:30.181248  INFO:    [DEVAPC] (PERI_AO_SYS1)D1_APC_4: 0xf

 9729 23:10:30.184353  INFO:    [DEVAPC] (PERI_AO_SYS1)D2_APC_0: 0xffffffff

 9730 23:10:30.187956  INFO:    [DEVAPC] (PERI_AO_SYS1)D2_APC_1: 0xffffffff

 9731 23:10:30.194346  INFO:    [DEVAPC] (PERI_AO_SYS1)D2_APC_2: 0xffffffff

 9732 23:10:30.198237  INFO:    [DEVAPC] (PERI_AO_SYS1)D2_APC_3: 0xffffffff

 9733 23:10:30.200900  INFO:    [DEVAPC] (PERI_AO_SYS1)D2_APC_4: 0xf

 9734 23:10:30.208452  INFO:    [DEVAPC] (PERI_AO_SYS1)D3_APC_0: 0xffffffff

 9735 23:10:30.211358  INFO:    [DEVAPC] (PERI_AO_SYS1)D3_APC_1: 0xffffffff

 9736 23:10:30.217630  INFO:    [DEVAPC] (PERI_AO_SYS1)D3_APC_2: 0xffffffff

 9737 23:10:30.221341  INFO:    [DEVAPC] (PERI_AO_SYS1)D3_APC_3: 0xffffffff

 9738 23:10:30.224563  INFO:    [DEVAPC] (PERI_AO_SYS1)D3_APC_4: 0xf

 9739 23:10:30.231449  INFO:    [DEVAPC] (PERI_AO_SYS1)D4_APC_0: 0xffffffff

 9740 23:10:30.234220  INFO:    [DEVAPC] (PERI_AO_SYS1)D4_APC_1: 0xffffffff

 9741 23:10:30.238062  INFO:    [DEVAPC] (PERI_AO_SYS1)D4_APC_2: 0xffffffff

 9742 23:10:30.244697  INFO:    [DEVAPC] (PERI_AO_SYS1)D4_APC_3: 0xffffffff

 9743 23:10:30.247918  INFO:    [DEVAPC] (PERI_AO_SYS1)D4_APC_4: 0xf

 9744 23:10:30.251236  INFO:    [DEVAPC] (PERI_AO_SYS1)D5_APC_0: 0xffffffff

 9745 23:10:30.257928  INFO:    [DEVAPC] (PERI_AO_SYS1)D5_APC_1: 0xffffffff

 9746 23:10:30.261335  INFO:    [DEVAPC] (PERI_AO_SYS1)D5_APC_2: 0xffffffff

 9747 23:10:30.264323  INFO:    [DEVAPC] (PERI_AO_SYS1)D5_APC_3: 0xffffffff

 9748 23:10:30.271174  INFO:    [DEVAPC] (PERI_AO_SYS1)D5_APC_4: 0xf

 9749 23:10:30.275000  INFO:    [DEVAPC] (PERI_AO_SYS1)D6_APC_0: 0xffffffff

 9750 23:10:30.281324  INFO:    [DEVAPC] (PERI_AO_SYS1)D6_APC_1: 0xffffffff

 9751 23:10:30.284215  INFO:    [DEVAPC] (PERI_AO_SYS1)D6_APC_2: 0xffffffff

 9752 23:10:30.288034  INFO:    [DEVAPC] (PERI_AO_SYS1)D6_APC_3: 0xffffffff

 9753 23:10:30.294391  INFO:    [DEVAPC] (PERI_AO_SYS1)D6_APC_4: 0xf

 9754 23:10:30.298393  INFO:    [DEVAPC] (PERI_AO_SYS1)D7_APC_0: 0xffffffff

 9755 23:10:30.301272  INFO:    [DEVAPC] (PERI_AO_SYS1)D7_APC_1: 0xffffffff

 9756 23:10:30.308152  INFO:    [DEVAPC] (PERI_AO_SYS1)D7_APC_2: 0xffffffff

 9757 23:10:30.310989  INFO:    [DEVAPC] (PERI_AO_SYS1)D7_APC_3: 0xffffffff

 9758 23:10:30.314255  INFO:    [DEVAPC] (PERI_AO_SYS1)D7_APC_4: 0xf

 9759 23:10:30.321137  INFO:    [DEVAPC] (PERI_AO_SYS2)D0_APC_0: 0x0

 9760 23:10:30.324260  INFO:    [DEVAPC] (PERI_AO_SYS2)D1_APC_0: 0x3

 9761 23:10:30.328539  INFO:    [DEVAPC] (PERI_AO_SYS2)D2_APC_0: 0x3

 9762 23:10:30.331664  INFO:    [DEVAPC] (PERI_AO_SYS2)D3_APC_0: 0x3

 9763 23:10:30.334662  INFO:    [DEVAPC] (PERI_AO)MAS_SEC_0: 0x0

 9764 23:10:30.341718  INFO:    [DEVAPC] (PERI_AO2_SYS0)D0_APC_0: 0x400400

 9765 23:10:30.344791  INFO:    [DEVAPC] (PERI_AO2_SYS0)D0_APC_1: 0x0

 9766 23:10:30.348064  INFO:    [DEVAPC] (PERI_AO2_SYS0)D0_APC_2: 0x0

 9767 23:10:30.351597  INFO:    [DEVAPC] (PERI_AO2_SYS0)D0_APC_3: 0x0

 9768 23:10:30.357994  INFO:    [DEVAPC] (PERI_AO2_SYS0)D0_APC_4: 0x0

 9769 23:10:30.361171  INFO:    [DEVAPC] (PERI_AO2_SYS0)D0_APC_5: 0x0

 9770 23:10:30.365132  INFO:    [DEVAPC] (PERI_AO2_SYS0)D0_APC_6: 0x140000

 9771 23:10:30.368199  INFO:    [DEVAPC] (PERI_AO2_SYS0)D0_APC_7: 0x0

 9772 23:10:30.374508  INFO:    [DEVAPC] (PERI_AO2_SYS0)D1_APC_0: 0xffffffff

 9773 23:10:30.378135  INFO:    [DEVAPC] (PERI_AO2_SYS0)D1_APC_1: 0xffffffff

 9774 23:10:30.384971  INFO:    [DEVAPC] (PERI_AO2_SYS0)D1_APC_2: 0xffffffff

 9775 23:10:30.387977  INFO:    [DEVAPC] (PERI_AO2_SYS0)D1_APC_3: 0xffffffff

 9776 23:10:30.394484  INFO:    [DEVAPC] (PERI_AO2_SYS0)D1_APC_4: 0xffffffff

 9777 23:10:30.398324  INFO:    [DEVAPC] (PERI_AO2_SYS0)D1_APC_5: 0xffffffff

 9778 23:10:30.401511  INFO:    [DEVAPC] (PERI_AO2_SYS0)D1_APC_6: 0xffffffff

 9779 23:10:30.407856  INFO:    [DEVAPC] (PERI_AO2_SYS0)D1_APC_7: 0x3f

 9780 23:10:30.411538  INFO:    [DEVAPC] (PERI_AO2_SYS0)D2_APC_0: 0xfffffff3

 9781 23:10:30.414792  INFO:    [DEVAPC] (PERI_AO2_SYS0)D2_APC_1: 0xffffefff

 9782 23:10:30.421466  INFO:    [DEVAPC] (PERI_AO2_SYS0)D2_APC_2: 0xffffffff

 9783 23:10:30.424628  INFO:    [DEVAPC] (PERI_AO2_SYS0)D2_APC_3: 0xffffffff

 9784 23:10:30.431612  INFO:    [DEVAPC] (PERI_AO2_SYS0)D2_APC_4: 0xffffffff

 9785 23:10:30.434952  INFO:    [DEVAPC] (PERI_AO2_SYS0)D2_APC_5: 0xcfffffff

 9786 23:10:30.441656  INFO:    [DEVAPC] (PERI_AO2_SYS0)D2_APC_6: 0xf3fcffff

 9787 23:10:30.444770  INFO:    [DEVAPC] (PERI_AO2_SYS0)D2_APC_7: 0x3f

 9788 23:10:30.448430  INFO:    [DEVAPC] (PERI_AO2_SYS0)D3_APC_0: 0xffffffff

 9789 23:10:30.455003  INFO:    [DEVAPC] (PERI_AO2_SYS0)D3_APC_1: 0xffffffff

 9790 23:10:30.458177  INFO:    [DEVAPC] (PERI_AO2_SYS0)D3_APC_2: 0xffffffff

 9791 23:10:30.461131  INFO:    [DEVAPC] (PERI_AO2_SYS0)D3_APC_3: 0xffffffff

 9792 23:10:30.468071  INFO:    [DEVAPC] (PERI_AO2_SYS0)D3_APC_4: 0xffffffff

 9793 23:10:30.471397  INFO:    [DEVAPC] (PERI_AO2_SYS0)D3_APC_5: 0xffffffff

 9794 23:10:30.477965  INFO:    [DEVAPC] (PERI_AO2_SYS0)D3_APC_6: 0xffffffff

 9795 23:10:30.481730  INFO:    [DEVAPC] (PERI_AO2_SYS0)D3_APC_7: 0x3f

 9796 23:10:30.485181  INFO:    [DEVAPC] (PERI_AO2_SYS0)D4_APC_0: 0xffffffff

 9797 23:10:30.491362  INFO:    [DEVAPC] (PERI_AO2_SYS0)D4_APC_1: 0xffffffff

 9798 23:10:30.494883  INFO:    [DEVAPC] (PERI_AO2_SYS0)D4_APC_2: 0xffffffff

 9799 23:10:30.501841  INFO:    [DEVAPC] (PERI_AO2_SYS0)D4_APC_3: 0xffffffff

 9800 23:10:30.505583  INFO:    [DEVAPC] (PERI_AO2_SYS0)D4_APC_4: 0xffffffff

 9801 23:10:30.511663  INFO:    [DEVAPC] (PERI_AO2_SYS0)D4_APC_5: 0xffffffff

 9802 23:10:30.514451  INFO:    [DEVAPC] (PERI_AO2_SYS0)D4_APC_6: 0xffffffff

 9803 23:10:30.518511  INFO:    [DEVAPC] (PERI_AO2_SYS0)D4_APC_7: 0x3f

 9804 23:10:30.525294  INFO:    [DEVAPC] (PERI_AO2_SYS0)D5_APC_0: 0xffffffff

 9805 23:10:30.528077  INFO:    [DEVAPC] (PERI_AO2_SYS0)D5_APC_1: 0xffffffff

 9806 23:10:30.531575  INFO:    [DEVAPC] (PERI_AO2_SYS0)D5_APC_2: 0xffffffff

 9807 23:10:30.538018  INFO:    [DEVAPC] (PERI_AO2_SYS0)D5_APC_3: 0xffffffff

 9808 23:10:30.541707  INFO:    [DEVAPC] (PERI_AO2_SYS0)D5_APC_4: 0xffffffff

 9809 23:10:30.548060  INFO:    [DEVAPC] (PERI_AO2_SYS0)D5_APC_5: 0xffffffff

 9810 23:10:30.552249  INFO:    [DEVAPC] (PERI_AO2_SYS0)D5_APC_6: 0xffffffff

 9811 23:10:30.555996  INFO:    [DEVAPC] (PERI_AO2_SYS0)D5_APC_7: 0x3f

 9812 23:10:30.562448  INFO:    [DEVAPC] (PERI_AO2_SYS0)D6_APC_0: 0xffffffff

 9813 23:10:30.565123  INFO:    [DEVAPC] (PERI_AO2_SYS0)D6_APC_1: 0xffffffff

 9814 23:10:30.571593  INFO:    [DEVAPC] (PERI_AO2_SYS0)D6_APC_2: 0xffffffff

 9815 23:10:30.574972  INFO:    [DEVAPC] (PERI_AO2_SYS0)D6_APC_3: 0xffffffff

 9816 23:10:30.578374  INFO:    [DEVAPC] (PERI_AO2_SYS0)D6_APC_4: 0xffffffff

 9817 23:10:30.585194  INFO:    [DEVAPC] (PERI_AO2_SYS0)D6_APC_5: 0xffffffff

 9818 23:10:30.588682  INFO:    [DEVAPC] (PERI_AO2_SYS0)D6_APC_6: 0xffffffff

 9819 23:10:30.595325  INFO:    [DEVAPC] (PERI_AO2_SYS0)D6_APC_7: 0x3f

 9820 23:10:30.598869  INFO:    [DEVAPC] (PERI_AO2_SYS0)D7_APC_0: 0xffffffff

 9821 23:10:30.602232  INFO:    [DEVAPC] (PERI_AO2_SYS0)D7_APC_1: 0xffffffff

 9822 23:10:30.609288  INFO:    [DEVAPC] (PERI_AO2_SYS0)D7_APC_2: 0xffffffff

 9823 23:10:30.612144  INFO:    [DEVAPC] (PERI_AO2_SYS0)D7_APC_3: 0xffffffff

 9824 23:10:30.619009  INFO:    [DEVAPC] (PERI_AO2_SYS0)D7_APC_4: 0xffffffff

 9825 23:10:30.622550  INFO:    [DEVAPC] (PERI_AO2_SYS0)D7_APC_5: 0xffffffff

 9826 23:10:30.625943  INFO:    [DEVAPC] (PERI_AO2_SYS0)D7_APC_6: 0xffffffff

 9827 23:10:30.632316  INFO:    [DEVAPC] (PERI_AO2_SYS0)D7_APC_7: 0x3f

 9828 23:10:30.635607  INFO:    [DEVAPC] (PERI_AO2_SYS0)D8_APC_0: 0xffffffff

 9829 23:10:30.641919  INFO:    [DEVAPC] (PERI_AO2_SYS0)D8_APC_1: 0xffffffff

 9830 23:10:30.645087  INFO:    [DEVAPC] (PERI_AO2_SYS0)D8_APC_2: 0xffffffff

 9831 23:10:30.649384  INFO:    [DEVAPC] (PERI_AO2_SYS0)D8_APC_3: 0xffffffff

 9832 23:10:30.655111  INFO:    [DEVAPC] (PERI_AO2_SYS0)D8_APC_4: 0xffffffff

 9833 23:10:30.658507  INFO:    [DEVAPC] (PERI_AO2_SYS0)D8_APC_5: 0xffffffff

 9834 23:10:30.665243  INFO:    [DEVAPC] (PERI_AO2_SYS0)D8_APC_6: 0xffffffff

 9835 23:10:30.669044  INFO:    [DEVAPC] (PERI_AO2_SYS0)D8_APC_7: 0x3f

 9836 23:10:30.671861  INFO:    [DEVAPC] (PERI_AO2_SYS0)D9_APC_0: 0xffffffff

 9837 23:10:30.679469  INFO:    [DEVAPC] (PERI_AO2_SYS0)D9_APC_1: 0xffffffff

 9838 23:10:30.682349  INFO:    [DEVAPC] (PERI_AO2_SYS0)D9_APC_2: 0xffffffff

 9839 23:10:30.688630  INFO:    [DEVAPC] (PERI_AO2_SYS0)D9_APC_3: 0xffffffff

 9840 23:10:30.692087  INFO:    [DEVAPC] (PERI_AO2_SYS0)D9_APC_4: 0xffffffff

 9841 23:10:30.695574  INFO:    [DEVAPC] (PERI_AO2_SYS0)D9_APC_5: 0xffffffff

 9842 23:10:30.702106  INFO:    [DEVAPC] (PERI_AO2_SYS0)D9_APC_6: 0xffffffff

 9843 23:10:30.705851  INFO:    [DEVAPC] (PERI_AO2_SYS0)D9_APC_7: 0x3f

 9844 23:10:30.712436  INFO:    [DEVAPC] (PERI_AO2_SYS0)D10_APC_0: 0xffffffff

 9845 23:10:30.715357  INFO:    [DEVAPC] (PERI_AO2_SYS0)D10_APC_1: 0xffffffff

 9846 23:10:30.719006  INFO:    [DEVAPC] (PERI_AO2_SYS0)D10_APC_2: 0xffffffff

 9847 23:10:30.725662  INFO:    [DEVAPC] (PERI_AO2_SYS0)D10_APC_3: 0xffffffff

 9848 23:10:30.729026  INFO:    [DEVAPC] (PERI_AO2_SYS0)D10_APC_4: 0xffffffff

 9849 23:10:30.735319  INFO:    [DEVAPC] (PERI_AO2_SYS0)D10_APC_5: 0xffffffff

 9850 23:10:30.738684  INFO:    [DEVAPC] (PERI_AO2_SYS0)D10_APC_6: 0xffffffff

 9851 23:10:30.746178  INFO:    [DEVAPC] (PERI_AO2_SYS0)D10_APC_7: 0x3f

 9852 23:10:30.749283  INFO:    [DEVAPC] (PERI_AO2_SYS0)D11_APC_0: 0xffffffff

 9853 23:10:30.752975  INFO:    [DEVAPC] (PERI_AO2_SYS0)D11_APC_1: 0xffffffff

 9854 23:10:30.758861  INFO:    [DEVAPC] (PERI_AO2_SYS0)D11_APC_2: 0xffffffff

 9855 23:10:30.762504  INFO:    [DEVAPC] (PERI_AO2_SYS0)D11_APC_3: 0xffffffff

 9856 23:10:30.769203  INFO:    [DEVAPC] (PERI_AO2_SYS0)D11_APC_4: 0xffffffff

 9857 23:10:30.772299  INFO:    [DEVAPC] (PERI_AO2_SYS0)D11_APC_5: 0xffffffff

 9858 23:10:30.778769  INFO:    [DEVAPC] (PERI_AO2_SYS0)D11_APC_6: 0xffffffff

 9859 23:10:30.782608  INFO:    [DEVAPC] (PERI_AO2_SYS0)D11_APC_7: 0x3f

 9860 23:10:30.786277  INFO:    [DEVAPC] (PERI_AO2_SYS0)D12_APC_0: 0xffffffff

 9861 23:10:30.792553  INFO:    [DEVAPC] (PERI_AO2_SYS0)D12_APC_1: 0xffffffff

 9862 23:10:30.796400  INFO:    [DEVAPC] (PERI_AO2_SYS0)D12_APC_2: 0xffffffff

 9863 23:10:30.802744  INFO:    [DEVAPC] (PERI_AO2_SYS0)D12_APC_3: 0xffffffff

 9864 23:10:30.805699  INFO:    [DEVAPC] (PERI_AO2_SYS0)D12_APC_4: 0xffffffff

 9865 23:10:30.812361  INFO:    [DEVAPC] (PERI_AO2_SYS0)D12_APC_5: 0xffffffff

 9866 23:10:30.815713  INFO:    [DEVAPC] (PERI_AO2_SYS0)D12_APC_6: 0xffffffff

 9867 23:10:30.819666  INFO:    [DEVAPC] (PERI_AO2_SYS0)D12_APC_7: 0x3f

 9868 23:10:30.826137  INFO:    [DEVAPC] (PERI_AO2_SYS0)D13_APC_0: 0xffffffff

 9869 23:10:30.829194  INFO:    [DEVAPC] (PERI_AO2_SYS0)D13_APC_1: 0xffffffff

 9870 23:10:30.835839  INFO:    [DEVAPC] (PERI_AO2_SYS0)D13_APC_2: 0xffffffff

 9871 23:10:30.839458  INFO:    [DEVAPC] (PERI_AO2_SYS0)D13_APC_3: 0xffffffff

 9872 23:10:30.845962  INFO:    [DEVAPC] (PERI_AO2_SYS0)D13_APC_4: 0xffffffff

 9873 23:10:30.849512  INFO:    [DEVAPC] (PERI_AO2_SYS0)D13_APC_5: 0xffffffff

 9874 23:10:30.853195  INFO:    [DEVAPC] (PERI_AO2_SYS0)D13_APC_6: 0xffffffff

 9875 23:10:30.859572  INFO:    [DEVAPC] (PERI_AO2_SYS0)D13_APC_7: 0x3f

 9876 23:10:30.862603  INFO:    [DEVAPC] (PERI_AO2_SYS0)D14_APC_0: 0xffffffff

 9877 23:10:30.869265  INFO:    [DEVAPC] (PERI_AO2_SYS0)D14_APC_1: 0xffffffff

 9878 23:10:30.872149  INFO:    [DEVAPC] (PERI_AO2_SYS0)D14_APC_2: 0xffffffff

 9879 23:10:30.878828  INFO:    [DEVAPC] (PERI_AO2_SYS0)D14_APC_3: 0xffffffff

 9880 23:10:30.882664  INFO:    [DEVAPC] (PERI_AO2_SYS0)D14_APC_4: 0xffffffff

 9881 23:10:30.885900  INFO:    [DEVAPC] (PERI_AO2_SYS0)D14_APC_5: 0xffffffff

 9882 23:10:30.892346  INFO:    [DEVAPC] (PERI_AO2_SYS0)D14_APC_6: 0xffffffff

 9883 23:10:30.895719  INFO:    [DEVAPC] (PERI_AO2_SYS0)D14_APC_7: 0x3f

 9884 23:10:30.902822  INFO:    [DEVAPC] (PERI_AO2_SYS0)D15_APC_0: 0xffffffff

 9885 23:10:30.906299  INFO:    [DEVAPC] (PERI_AO2_SYS0)D15_APC_1: 0xffffffff

 9886 23:10:30.909272  INFO:    [DEVAPC] (PERI_AO2_SYS0)D15_APC_2: 0xffffffff

 9887 23:10:30.915821  INFO:    [DEVAPC] (PERI_AO2_SYS0)D15_APC_3: 0xffffffff

 9888 23:10:30.919671  INFO:    [DEVAPC] (PERI_AO2_SYS0)D15_APC_4: 0xffffffff

 9889 23:10:30.926090  INFO:    [DEVAPC] (PERI_AO2_SYS0)D15_APC_5: 0xffffffff

 9890 23:10:30.929443  INFO:    [DEVAPC] (PERI_AO2_SYS0)D15_APC_6: 0xffffffff

 9891 23:10:30.936115  INFO:    [DEVAPC] (PERI_AO2_SYS0)D15_APC_7: 0x3f

 9892 23:10:30.939566  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D0_APC_0: 0x0

 9893 23:10:30.942941  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D0_APC_1: 0x10000

 9894 23:10:30.949475  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D1_APC_0: 0xffffffff

 9895 23:10:30.952605  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D1_APC_1: 0x3fffff

 9896 23:10:30.959378  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D2_APC_0: 0xffffcff3

 9897 23:10:30.962969  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D2_APC_1: 0x3fcfff

 9898 23:10:30.969908  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D3_APC_0: 0xffffffff

 9899 23:10:30.972750  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D3_APC_1: 0x3fffff

 9900 23:10:30.979397  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D4_APC_0: 0xffffffff

 9901 23:10:30.982698  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D4_APC_1: 0x3fffff

 9902 23:10:30.986221  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D5_APC_0: 0xffffffff

 9903 23:10:30.993033  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D5_APC_1: 0x3fffff

 9904 23:10:30.996323  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D6_APC_0: 0xffffffff

 9905 23:10:31.003418  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D6_APC_1: 0x3fffff

 9906 23:10:31.006331  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D7_APC_0: 0xffffffff

 9907 23:10:31.012622  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D7_APC_1: 0x3fffff

 9908 23:10:31.016744  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D8_APC_0: 0xffffffff

 9909 23:10:31.022998  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D8_APC_1: 0x3fffff

 9910 23:10:31.026553  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D9_APC_0: 0xffffffff

 9911 23:10:31.032832  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D9_APC_1: 0x3fffff

 9912 23:10:31.035900  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D10_APC_0: 0xffffffff

 9913 23:10:31.042737  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D10_APC_1: 0x3fffff

 9914 23:10:31.046162  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D11_APC_0: 0xffffffff

 9915 23:10:31.052623  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D11_APC_1: 0x3fffff

 9916 23:10:31.056728  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D12_APC_0: 0xffffffff

 9917 23:10:31.062550  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D12_APC_1: 0x3fffff

 9918 23:10:31.066281  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D13_APC_0: 0xffffffff

 9919 23:10:31.073100  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D13_APC_1: 0x3fffff

 9920 23:10:31.076349  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D14_APC_0: 0xffffffff

 9921 23:10:31.082783  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D14_APC_1: 0x3fffff

 9922 23:10:31.086047  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D15_APC_0: 0xffffffff

 9923 23:10:31.093128  INFO:    [DEVAPC] (PERI_PAR_AO_SYS0)D15_APC_1: 0x3fffff

 9924 23:10:31.096101  INFO:    [DEVAPC] (PERI_PAR_AO)MAS_SEC_0: 0x0

 9925 23:10:31.100155  INFO:    [APUAPC] vio 0

 9926 23:10:31.102942  INFO:    [APUAPC] set_apusys_ao_apc - SUCCESS!

 9927 23:10:31.106962  INFO:    [APUAPC] set_apusys_noc_dapc - SUCCESS!

 9928 23:10:31.110339  INFO:    [APUAPC] D0_APC_0: 0x400510

 9929 23:10:31.112902  INFO:    [APUAPC] D0_APC_1: 0x0

 9930 23:10:31.116691  INFO:    [APUAPC] D0_APC_2: 0x1540

 9931 23:10:31.119723  INFO:    [APUAPC] D0_APC_3: 0x0

 9932 23:10:31.122816  INFO:    [APUAPC] D1_APC_0: 0xffffffff

 9933 23:10:31.126526  INFO:    [APUAPC] D1_APC_1: 0xffffffff

 9934 23:10:31.129589  INFO:    [APUAPC] D1_APC_2: 0x3fffff

 9935 23:10:31.133286  INFO:    [APUAPC] D1_APC_3: 0x0

 9936 23:10:31.136841  INFO:    [APUAPC] D2_APC_0: 0xffffffff

 9937 23:10:31.139668  INFO:    [APUAPC] D2_APC_1: 0xffffffff

 9938 23:10:31.143240  INFO:    [APUAPC] D2_APC_2: 0x3fffff

 9939 23:10:31.146573  INFO:    [APUAPC] D2_APC_3: 0x0

 9940 23:10:31.149880  INFO:    [APUAPC] D3_APC_0: 0xffffffff

 9941 23:10:31.153313  INFO:    [APUAPC] D3_APC_1: 0xffffffff

 9942 23:10:31.156840  INFO:    [APUAPC] D3_APC_2: 0x3fffff

 9943 23:10:31.159528  INFO:    [APUAPC] D3_APC_3: 0x0

 9944 23:10:31.162872  INFO:    [APUAPC] D4_APC_0: 0xffffffff

 9945 23:10:31.166090  INFO:    [APUAPC] D4_APC_1: 0xffffffff

 9946 23:10:31.169581  INFO:    [APUAPC] D4_APC_2: 0x3fffff

 9947 23:10:31.172846  INFO:    [APUAPC] D4_APC_3: 0x0

 9948 23:10:31.176646  INFO:    [APUAPC] D5_APC_0: 0xffffffff

 9949 23:10:31.180048  INFO:    [APUAPC] D5_APC_1: 0xffffffff

 9950 23:10:31.182758  INFO:    [APUAPC] D5_APC_2: 0x3fffff

 9951 23:10:31.186343  INFO:    [APUAPC] D5_APC_3: 0x0

 9952 23:10:31.189326  INFO:    [APUAPC] D6_APC_0: 0xffffffff

 9953 23:10:31.192818  INFO:    [APUAPC] D6_APC_1: 0xffffffff

 9954 23:10:31.196482  INFO:    [APUAPC] D6_APC_2: 0x3fffff

 9955 23:10:31.196579  INFO:    [APUAPC] D6_APC_3: 0x0

 9956 23:10:31.199819  INFO:    [APUAPC] D7_APC_0: 0xffffffff

 9957 23:10:31.206300  INFO:    [APUAPC] D7_APC_1: 0xffffffff

 9958 23:10:31.206408  INFO:    [APUAPC] D7_APC_2: 0x3fffff

 9959 23:10:31.209868  INFO:    [APUAPC] D7_APC_3: 0x0

 9960 23:10:31.213106  INFO:    [APUAPC] D8_APC_0: 0xffffffff

 9961 23:10:31.216000  INFO:    [APUAPC] D8_APC_1: 0xffffffff

 9962 23:10:31.219797  INFO:    [APUAPC] D8_APC_2: 0x3fffff

 9963 23:10:31.223254  INFO:    [APUAPC] D8_APC_3: 0x0

 9964 23:10:31.226562  INFO:    [APUAPC] D9_APC_0: 0xffffffff

 9965 23:10:31.230117  INFO:    [APUAPC] D9_APC_1: 0xffffffff

 9966 23:10:31.232972  INFO:    [APUAPC] D9_APC_2: 0x3fffff

 9967 23:10:31.236354  INFO:    [APUAPC] D9_APC_3: 0x0

 9968 23:10:31.239721  INFO:    [APUAPC] D10_APC_0: 0xffffffff

 9969 23:10:31.243665  INFO:    [APUAPC] D10_APC_1: 0xffffffff

 9970 23:10:31.246310  INFO:    [APUAPC] D10_APC_2: 0x3fffff

 9971 23:10:31.249289  INFO:    [APUAPC] D10_APC_3: 0x0

 9972 23:10:31.253318  INFO:    [APUAPC] D11_APC_0: 0xffffffff

 9973 23:10:31.256689  INFO:    [APUAPC] D11_APC_1: 0xffffffff

 9974 23:10:31.259668  INFO:    [APUAPC] D11_APC_2: 0x3fffff

 9975 23:10:31.262920  INFO:    [APUAPC] D11_APC_3: 0x0

 9976 23:10:31.266593  INFO:    [APUAPC] D12_APC_0: 0xffffffff

 9977 23:10:31.269958  INFO:    [APUAPC] D12_APC_1: 0xffffffff

 9978 23:10:31.273125  INFO:    [APUAPC] D12_APC_2: 0x3fffff

 9979 23:10:31.276421  INFO:    [APUAPC] D12_APC_3: 0x0

 9980 23:10:31.280004  INFO:    [APUAPC] D13_APC_0: 0xffffffff

 9981 23:10:31.283381  INFO:    [APUAPC] D13_APC_1: 0xffffffff

 9982 23:10:31.286788  INFO:    [APUAPC] D13_APC_2: 0x3fffff

 9983 23:10:31.290076  INFO:    [APUAPC] D13_APC_3: 0x0

 9984 23:10:31.293432  INFO:    [APUAPC] D14_APC_0: 0xffffffff

 9985 23:10:31.296431  INFO:    [APUAPC] D14_APC_1: 0xffffffff

 9986 23:10:31.299912  INFO:    [APUAPC] D14_APC_2: 0x3fffff

 9987 23:10:31.303486  INFO:    [APUAPC] D14_APC_3: 0x0

 9988 23:10:31.307008  INFO:    [APUAPC] D15_APC_0: 0xffffffff

 9989 23:10:31.309946  INFO:    [APUAPC] D15_APC_1: 0xffffffff

 9990 23:10:31.313319  INFO:    [APUAPC] D15_APC_2: 0x3fffff

 9991 23:10:31.316503  INFO:    [APUAPC] D15_APC_3: 0x0

 9992 23:10:31.319877  INFO:    [APUAPC] APC_CON: 0x4

 9993 23:10:31.323568  INFO:    [NOCDAPC] D0_APC_0: 0x0

 9994 23:10:31.326360  INFO:    [NOCDAPC] D0_APC_1: 0x0

 9995 23:10:31.330022  INFO:    [NOCDAPC] D1_APC_0: 0x0

 9996 23:10:31.332961  INFO:    [NOCDAPC] D1_APC_1: 0xfff

 9997 23:10:31.333032  INFO:    [NOCDAPC] D2_APC_0: 0x0

 9998 23:10:31.336326  INFO:    [NOCDAPC] D2_APC_1: 0xfff

 9999 23:10:31.340047  INFO:    [NOCDAPC] D3_APC_0: 0x0

10000 23:10:31.342898  INFO:    [NOCDAPC] D3_APC_1: 0xfff

10001 23:10:31.346705  INFO:    [NOCDAPC] D4_APC_0: 0x0

10002 23:10:31.350043  INFO:    [NOCDAPC] D4_APC_1: 0xfff

10003 23:10:31.353402  INFO:    [NOCDAPC] D5_APC_0: 0x0

10004 23:10:31.356439  INFO:    [NOCDAPC] D5_APC_1: 0xfff

10005 23:10:31.360206  INFO:    [NOCDAPC] D6_APC_0: 0x0

10006 23:10:31.362916  INFO:    [NOCDAPC] D6_APC_1: 0xfff

10007 23:10:31.366956  INFO:    [NOCDAPC] D7_APC_0: 0x0

10008 23:10:31.367028  INFO:    [NOCDAPC] D7_APC_1: 0xfff

10009 23:10:31.369778  INFO:    [NOCDAPC] D8_APC_0: 0x0

10010 23:10:31.373197  INFO:    [NOCDAPC] D8_APC_1: 0xfff

10011 23:10:31.376708  INFO:    [NOCDAPC] D9_APC_0: 0x0

10012 23:10:31.379936  INFO:    [NOCDAPC] D9_APC_1: 0xfff

10013 23:10:31.383445  INFO:    [NOCDAPC] D10_APC_0: 0x0

10014 23:10:31.386364  INFO:    [NOCDAPC] D10_APC_1: 0xfff

10015 23:10:31.389782  INFO:    [NOCDAPC] D11_APC_0: 0x0

10016 23:10:31.393286  INFO:    [NOCDAPC] D11_APC_1: 0xfff

10017 23:10:31.397069  INFO:    [NOCDAPC] D12_APC_0: 0x0

10018 23:10:31.399904  INFO:    [NOCDAPC] D12_APC_1: 0xfff

10019 23:10:31.403278  INFO:    [NOCDAPC] D13_APC_0: 0x0

10020 23:10:31.403352  INFO:    [NOCDAPC] D13_APC_1: 0xfff

10021 23:10:31.406724  INFO:    [NOCDAPC] D14_APC_0: 0x0

10022 23:10:31.409647  INFO:    [NOCDAPC] D14_APC_1: 0xfff

10023 23:10:31.413795  INFO:    [NOCDAPC] D15_APC_0: 0x0

10024 23:10:31.416430  INFO:    [NOCDAPC] D15_APC_1: 0xfff

10025 23:10:31.419835  INFO:    [NOCDAPC] APC_CON: 0x4

10026 23:10:31.423052  INFO:    [APUAPC] set_apusys_apc done

10027 23:10:31.427979  INFO:    [DEVAPC] devapc_init done

10028 23:10:31.431714  INFO:    GICv3 without legacy support detected.

10029 23:10:31.433213  INFO:    ARM GICv3 driver initialized in EL3

10030 23:10:31.440171  INFO:    Maximum SPI INTID supported: 639

10031 23:10:31.443095  INFO:    BL31: Initializing runtime services

10032 23:10:31.446737  WARNING: BL31: cortex_a55: CPU workaround for 1530923 was missing!

10033 23:10:31.449770  INFO:    SPM: enable CPC mode

10034 23:10:31.456981  INFO:    mcdi ready for mcusys-off-idle and system suspend

10035 23:10:31.459902  INFO:    BL31: Preparing for EL3 exit to normal world

10036 23:10:31.463542  INFO:    Entry point address = 0x80000000

10037 23:10:31.466918  INFO:    SPSR = 0x8

10038 23:10:31.472292  

10039 23:10:31.472360  

10040 23:10:31.472420  

10041 23:10:31.475234  Starting depthcharge on Spherion...

10042 23:10:31.475302  

10043 23:10:31.475360  Wipe memory regions:

10044 23:10:31.475416  

10045 23:10:31.476085  end: 2.2.3 depthcharge-start (duration 00:00:30) [common]
10046 23:10:31.476182  start: 2.2.4 bootloader-commands (timeout 00:04:25) [common]
10047 23:10:31.476260  Setting prompt string to ['asurada:']
10048 23:10:31.476338  bootloader-commands: Wait for prompt ['asurada:'] (timeout 00:04:25)
10049 23:10:31.478687  	[0x00000040000000, 0x00000054600000)

10050 23:10:31.601003  

10051 23:10:31.601118  	[0x00000054660000, 0x00000080000000)

10052 23:10:31.861443  

10053 23:10:31.861581  	[0x000000821a7280, 0x000000ffe64000)

10054 23:10:32.606933  

10055 23:10:32.607084  	[0x00000100000000, 0x00000240000000)

10056 23:10:34.497842  

10057 23:10:34.500400  Initializing XHCI USB controller at 0x11200000.

10058 23:10:35.539014  

10059 23:10:35.542887  [firmware-asurada-13885.B-collabora] Dec  7 2021 09:38:38

10060 23:10:35.543314  

10061 23:10:35.543644  

10062 23:10:35.543950  

10063 23:10:35.544684  Setting prompt string to ['asurada:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10065 23:10:35.645796  asurada: tftpboot 192.168.201.1 12395387/tftp-deploy-dugec_kp/kernel/image.itb 12395387/tftp-deploy-dugec_kp/kernel/cmdline 

10066 23:10:35.646318  Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10067 23:10:35.646777  bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:21)
10068 23:10:35.651675  tftpboot 192.168.201.1 12395387/tftp-deploy-dugec_kp/kernel/image.ittp-deploy-dugec_kp/kernel/cmdline 

10069 23:10:35.652099  

10070 23:10:35.652427  Waiting for link

10071 23:10:35.811992  

10072 23:10:35.812117  R8152: Initializing

10073 23:10:35.812184  

10074 23:10:35.815026  Version 6 (ocp_data = 5c30)

10075 23:10:35.815107  

10076 23:10:35.818053  R8152: Done initializing

10077 23:10:35.818133  

10078 23:10:35.818198  Adding net device

10079 23:10:37.716839  

10080 23:10:37.716984  done.

10081 23:10:37.717052  

10082 23:10:37.717113  MAC: 00:24:32:30:78:52

10083 23:10:37.717172  

10084 23:10:37.720788  Sending DHCP discover... done.

10085 23:10:37.720871  

10086 23:10:37.723581  Waiting for reply... done.

10087 23:10:37.723662  

10088 23:10:37.728061  Sending DHCP request... done.

10089 23:10:37.728150  

10090 23:10:37.733883  Waiting for reply... done.

10091 23:10:37.733959  

10092 23:10:37.734026  My ip is 192.168.201.14

10093 23:10:37.734087  

10094 23:10:37.737311  The DHCP server ip is 192.168.201.1

10095 23:10:37.737389  

10096 23:10:37.744041  TFTP server IP predefined by user: 192.168.201.1

10097 23:10:37.744121  

10098 23:10:37.750829  Bootfile predefined by user: 12395387/tftp-deploy-dugec_kp/kernel/image.itb

10099 23:10:37.750907  

10100 23:10:37.750970  Sending tftp read request... done.

10101 23:10:37.753780  

10102 23:10:37.757136  Waiting for the transfer... 

10103 23:10:37.757211  

10104 23:10:38.319810  00000000 ################################################################

10105 23:10:38.319957  

10106 23:10:38.877707  00080000 ################################################################

10107 23:10:38.877854  

10108 23:10:39.427047  00100000 ################################################################

10109 23:10:39.427197  

10110 23:10:39.980523  00180000 ################################################################

10111 23:10:39.980662  

10112 23:10:40.529964  00200000 ################################################################

10113 23:10:40.530099  

10114 23:10:41.057898  00280000 ################################################################

10115 23:10:41.058057  

10116 23:10:41.645643  00300000 ################################################################

10117 23:10:41.646163  

10118 23:10:42.364273  00380000 ################################################################

10119 23:10:42.364792  

10120 23:10:43.062216  00400000 ################################################################

10121 23:10:43.062790  

10122 23:10:43.784589  00480000 ################################################################

10123 23:10:43.785089  

10124 23:10:44.503974  00500000 ################################################################

10125 23:10:44.504478  

10126 23:10:45.229454  00580000 ################################################################

10127 23:10:45.230000  

10128 23:10:45.959238  00600000 ################################################################

10129 23:10:45.959827  

10130 23:10:46.670548  00680000 ################################################################

10131 23:10:46.671172  

10132 23:10:47.380792  00700000 ################################################################

10133 23:10:47.381326  

10134 23:10:48.089066  00780000 ################################################################

10135 23:10:48.089641  

10136 23:10:48.813288  00800000 ################################################################

10137 23:10:48.813796  

10138 23:10:49.520294  00880000 ################################################################

10139 23:10:49.520826  

10140 23:10:50.220489  00900000 ################################################################

10141 23:10:50.221007  

10142 23:10:50.934133  00980000 ################################################################

10143 23:10:50.934690  

10144 23:10:51.648696  00a00000 ################################################################

10145 23:10:51.649227  

10146 23:10:52.288539  00a80000 ################################################################

10147 23:10:52.288692  

10148 23:10:52.852793  00b00000 ################################################################

10149 23:10:52.852985  

10150 23:10:53.431245  00b80000 ################################################################

10151 23:10:53.431424  

10152 23:10:54.019190  00c00000 ################################################################

10153 23:10:54.019339  

10154 23:10:54.591211  00c80000 ################################################################

10155 23:10:54.591377  

10156 23:10:55.157263  00d00000 ################################################################

10157 23:10:55.157420  

10158 23:10:55.712300  00d80000 ################################################################

10159 23:10:55.712455  

10160 23:10:56.253236  00e00000 ################################################################

10161 23:10:56.253431  

10162 23:10:56.818448  00e80000 ################################################################

10163 23:10:56.818594  

10164 23:10:57.386823  00f00000 ################################################################

10165 23:10:57.386980  

10166 23:10:57.950224  00f80000 ################################################################

10167 23:10:57.950381  

10168 23:10:58.525506  01000000 ################################################################

10169 23:10:58.525664  

10170 23:10:59.087561  01080000 ################################################################

10171 23:10:59.087712  

10172 23:10:59.665021  01100000 ################################################################

10173 23:10:59.665205  

10174 23:11:00.247432  01180000 ################################################################

10175 23:11:00.247606  

10176 23:11:00.819953  01200000 ################################################################

10177 23:11:00.820107  

10178 23:11:01.397194  01280000 ################################################################

10179 23:11:01.397331  

10180 23:11:01.978428  01300000 ################################################################

10181 23:11:01.978590  

10182 23:11:02.564485  01380000 ################################################################

10183 23:11:02.564653  

10184 23:11:03.165602  01400000 ################################################################

10185 23:11:03.165740  

10186 23:11:03.749453  01480000 ################################################################

10187 23:11:03.749609  

10188 23:11:04.292492  01500000 ################################################################

10189 23:11:04.292701  

10190 23:11:04.862292  01580000 ################################################################

10191 23:11:04.862492  

10192 23:11:05.432227  01600000 ################################################################

10193 23:11:05.432386  

10194 23:11:06.004189  01680000 ################################################################

10195 23:11:06.004352  

10196 23:11:06.585015  01700000 ################################################################

10197 23:11:06.585170  

10198 23:11:07.160326  01780000 ################################################################

10199 23:11:07.160484  

10200 23:11:07.724430  01800000 ################################################################

10201 23:11:07.724590  

10202 23:11:08.294804  01880000 ################################################################

10203 23:11:08.294962  

10204 23:11:08.867778  01900000 ################################################################

10205 23:11:08.867938  

10206 23:11:09.463911  01980000 ################################################################

10207 23:11:09.464076  

10208 23:11:10.058431  01a00000 ################################################################

10209 23:11:10.058598  

10210 23:11:10.645046  01a80000 ################################################################

10211 23:11:10.645200  

10212 23:11:11.238492  01b00000 ################################################################

10213 23:11:11.238641  

10214 23:11:11.848838  01b80000 ################################################################

10215 23:11:11.848986  

10216 23:11:12.447215  01c00000 ################################################################

10217 23:11:12.447371  

10218 23:11:13.046365  01c80000 ################################################################

10219 23:11:13.046542  

10220 23:11:13.641582  01d00000 ################################################################

10221 23:11:13.641737  

10222 23:11:14.225197  01d80000 ################################################################

10223 23:11:14.225353  

10224 23:11:14.817862  01e00000 ################################################################

10225 23:11:14.818014  

10226 23:11:15.408549  01e80000 ################################################################

10227 23:11:15.408700  

10228 23:11:16.005725  01f00000 ################################################################

10229 23:11:16.005877  

10230 23:11:16.601678  01f80000 ################################################################

10231 23:11:16.601822  

10232 23:11:17.220806  02000000 ################################################################

10233 23:11:17.220984  

10234 23:11:17.842913  02080000 ################################################################

10235 23:11:17.843394  

10236 23:11:18.563664  02100000 ################################################################

10237 23:11:18.564295  

10238 23:11:19.285806  02180000 ################################################################

10239 23:11:19.286464  

10240 23:11:20.004616  02200000 ################################################################

10241 23:11:20.005147  

10242 23:11:20.723467  02280000 ################################################################

10243 23:11:20.723986  

10244 23:11:21.430216  02300000 ################################################################

10245 23:11:21.430752  

10246 23:11:22.136849  02380000 ################################################################

10247 23:11:22.137354  

10248 23:11:22.854443  02400000 ################################################################

10249 23:11:22.854978  

10250 23:11:23.570687  02480000 ################################################################

10251 23:11:23.571231  

10252 23:11:24.260777  02500000 ################################################################

10253 23:11:24.261291  

10254 23:11:24.934186  02580000 ################################################################

10255 23:11:24.934798  

10256 23:11:25.610730  02600000 ################################################################

10257 23:11:25.611230  

10258 23:11:26.261642  02680000 ################################################################

10259 23:11:26.261786  

10260 23:11:26.782574  02700000 ################################################################

10261 23:11:26.782747  

10262 23:11:27.301940  02780000 ################################################################

10263 23:11:27.302079  

10264 23:11:27.824451  02800000 ################################################################

10265 23:11:27.824593  

10266 23:11:28.360432  02880000 ################################################################

10267 23:11:28.360581  

10268 23:11:28.883595  02900000 ################################################################

10269 23:11:28.883770  

10270 23:11:29.405759  02980000 ################################################################

10271 23:11:29.405904  

10272 23:11:29.927229  02a00000 ################################################################

10273 23:11:29.927374  

10274 23:11:30.449269  02a80000 ################################################################

10275 23:11:30.449451  

10276 23:11:30.971060  02b00000 ################################################################

10277 23:11:30.971204  

10278 23:11:31.495830  02b80000 ################################################################

10279 23:11:31.495975  

10280 23:11:32.016386  02c00000 ################################################################

10281 23:11:32.016535  

10282 23:11:32.535192  02c80000 ################################################################

10283 23:11:32.535350  

10284 23:11:33.064999  02d00000 ################################################################

10285 23:11:33.065139  

10286 23:11:33.622276  02d80000 ################################################################

10287 23:11:33.622475  

10288 23:11:34.146883  02e00000 ################################################################

10289 23:11:34.147016  

10290 23:11:34.669234  02e80000 ################################################################

10291 23:11:34.669390  

10292 23:11:35.205384  02f00000 ################################################################

10293 23:11:35.205542  

10294 23:11:35.737171  02f80000 ################################################################

10295 23:11:35.737329  

10296 23:11:36.257004  03000000 ################################################################

10297 23:11:36.257173  

10298 23:11:36.778316  03080000 ################################################################

10299 23:11:36.778500  

10300 23:11:37.300496  03100000 ################################################################

10301 23:11:37.300626  

10302 23:11:37.818653  03180000 ################################################################

10303 23:11:37.818793  

10304 23:11:38.331651  03200000 ################################################################

10305 23:11:38.331809  

10306 23:11:38.851034  03280000 ################################################################

10307 23:11:38.851218  

10308 23:11:39.365158  03300000 ################################################################

10309 23:11:39.365374  

10310 23:11:39.877971  03380000 ################################################################

10311 23:11:39.878155  

10312 23:11:40.410216  03400000 ################################################################

10313 23:11:40.410364  

10314 23:11:40.941293  03480000 ################################################################

10315 23:11:40.941433  

10316 23:11:41.462760  03500000 ################################################################

10317 23:11:41.462936  

10318 23:11:41.992821  03580000 ################################################################

10319 23:11:41.992970  

10320 23:11:42.520752  03600000 ################################################################

10321 23:11:42.520939  

10322 23:11:43.093081  03680000 ################################################################

10323 23:11:43.093262  

10324 23:11:43.664549  03700000 ################################################################

10325 23:11:43.664702  

10326 23:11:44.241655  03780000 ################################################################

10327 23:11:44.241807  

10328 23:11:44.809810  03800000 ################################################################

10329 23:11:44.809947  

10330 23:11:45.369081  03880000 ################################################################

10331 23:11:45.369231  

10332 23:11:45.936500  03900000 ################################################################

10333 23:11:45.936636  

10334 23:11:46.508009  03980000 ################################################################

10335 23:11:46.508163  

10336 23:11:47.083001  03a00000 ################################################################

10337 23:11:47.083149  

10338 23:11:47.677346  03a80000 ################################################################

10339 23:11:47.677497  

10340 23:11:48.263793  03b00000 ################################################################

10341 23:11:48.263943  

10342 23:11:48.863160  03b80000 ################################################################

10343 23:11:48.863309  

10344 23:11:49.446500  03c00000 ################################################################

10345 23:11:49.446648  

10346 23:11:50.054750  03c80000 ################################################################

10347 23:11:50.054904  

10348 23:11:50.653704  03d00000 ################################################################

10349 23:11:50.653858  

10350 23:11:51.237133  03d80000 ################################################################

10351 23:11:51.237306  

10352 23:11:51.825162  03e00000 ################################################################

10353 23:11:51.825338  

10354 23:11:52.396198  03e80000 ################################################################

10355 23:11:52.396353  

10356 23:11:52.968606  03f00000 ################################################################

10357 23:11:52.968754  

10358 23:11:53.549870  03f80000 ################################################################

10359 23:11:53.550012  

10360 23:11:54.108504  04000000 ################################################################

10361 23:11:54.108653  

10362 23:11:54.442895  04080000 ######################################### done.

10363 23:11:54.443070  

10364 23:11:54.446861  The bootfile was 67963670 bytes long.

10365 23:11:54.446959  

10366 23:11:54.449424  Sending tftp read request... done.

10367 23:11:54.449530  

10368 23:11:54.449597  Waiting for the transfer... 

10369 23:11:54.449658  

10370 23:11:54.453338  00000000 # done.

10371 23:11:54.453447  

10372 23:11:54.459947  Command line loaded dynamically from TFTP file: 12395387/tftp-deploy-dugec_kp/kernel/cmdline

10373 23:11:54.460055  

10374 23:11:54.473318  The command line is: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

10375 23:11:54.473434  

10376 23:11:54.476383  Loading FIT.

10377 23:11:54.476482  

10378 23:11:54.479322  Image ramdisk-1 has 56433970 bytes.

10379 23:11:54.479423  

10380 23:11:54.479512  Image fdt-1 has 47278 bytes.

10381 23:11:54.479601  

10382 23:11:54.483236  Image kernel-1 has 11480388 bytes.

10383 23:11:54.483336  

10384 23:11:54.493272  Compat preference: google,spherion-rev2-sku1 google,spherion-rev2 google,spherion-sku1 google,spherion

10385 23:11:54.493381  

10386 23:11:54.509784  Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,spherion-rev3 google,spherion-rev2 (match) google,spherion-rev1 google,spherion-rev0 google,spherion mediatek,mt8192

10387 23:11:54.509891  

10388 23:11:54.516368  Choosing best match conf-1 for compat google,spherion-rev2.

10389 23:11:54.519730  

10390 23:11:54.524284  Connected to device vid:did:rid of 1ae0:0028:00

10391 23:11:54.533088  

10392 23:11:54.536278  tpm_get_response: command 0x17b, return code 0x0

10393 23:11:54.536384  

10394 23:11:54.539735  ec_init: CrosEC protocol v3 supported (256, 248)

10395 23:11:54.543320  

10396 23:11:54.546748  tpm_cleanup: add release locality here.

10397 23:11:54.546836  

10398 23:11:54.546923  Shutting down all USB controllers.

10399 23:11:54.547015  

10400 23:11:54.549623  Removing current net device

10401 23:11:54.549701  

10402 23:11:54.556519  Exiting depthcharge with code 4 at timestamp: 112474069

10403 23:11:54.556637  

10404 23:11:54.560279  LZMA decompressing kernel-1 to 0x821a6718

10405 23:11:54.560385  

10406 23:11:54.562899  LZMA decompressing kernel-1 to 0x40000000

10407 23:11:55.999530  

10408 23:11:55.999714  jumping to kernel

10409 23:11:56.000784  end: 2.2.4 bootloader-commands (duration 00:01:25) [common]
10410 23:11:56.000924  start: 2.2.5 auto-login-action (timeout 00:03:01) [common]
10411 23:11:56.001031  Setting prompt string to ['Linux version [0-9]']
10412 23:11:56.001139  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
10413 23:11:56.001237  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
10414 23:11:56.081566  

10415 23:11:56.084325  [    0.000000] Booting Linux on physical CPU 0x0000000000 [0x412fd050]

10416 23:11:56.088096  start: 2.2.5.1 login-action (timeout 00:03:01) [common]
10417 23:11:56.088285  The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
10418 23:11:56.088396  Setting prompt string to []
10419 23:11:56.088527  Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
10420 23:11:56.088639  Using line separator: #'\n'#
10421 23:11:56.088722  No login prompt set.
10422 23:11:56.088808  Parsing kernel messages
10423 23:11:56.088884  ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
10424 23:11:56.089021  [login-action] Waiting for messages, (timeout 00:03:01)
10425 23:11:56.108084  [    0.000000] Linux version 6.1.67-cip12-rt7 (KernelCI@build-j59954-arm64-gcc-10-defconfig-arm64-chromebook-nblph) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Wed Dec 27 22:50:56 UTC 2023

10426 23:11:56.110933  [    0.000000] random: crng init done

10427 23:11:56.117810  [    0.000000] Machine model: Google Spherion (rev0 - 3)

10428 23:11:56.121188  [    0.000000] efi: UEFI not found.

10429 23:11:56.128000  [    0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB

10430 23:11:56.134759  [    0.000000] OF: reserved mem: initialized node scp@50000000, compatible id shared-dma-pool

10431 23:11:56.144784  [    0.000000] software IO TLB: Reserved memory: created restricted DMA pool at 0x00000000c0000000, size 64 MiB

10432 23:11:56.154357  [    0.000000] OF: reserved mem: initialized node wifi@c0000000, compatible id restricted-dma-pool

10433 23:11:56.161437  [    0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')

10434 23:11:56.167848  [    0.000000] printk: bootconsole [mtk8250] enabled

10435 23:11:56.174473  [    0.000000] NUMA: No NUMA configuration found

10436 23:11:56.181511  [    0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000023fffffff]

10437 23:11:56.184786  [    0.000000] NUMA: NODE_DATA [mem 0x23efcfa00-0x23efd1fff]

10438 23:11:56.187957  [    0.000000] Zone ranges:

10439 23:11:56.194505  [    0.000000]   DMA      [mem 0x0000000040000000-0x00000000ffffffff]

10440 23:11:56.197793  [    0.000000]   DMA32    empty

10441 23:11:56.204406  [    0.000000]   Normal   [mem 0x0000000100000000-0x000000023fffffff]

10442 23:11:56.207912  [    0.000000] Movable zone start for each node

10443 23:11:56.211049  [    0.000000] Early memory node ranges

10444 23:11:56.218137  [    0.000000]   node   0: [mem 0x0000000040000000-0x000000004fffffff]

10445 23:11:56.224284  [    0.000000]   node   0: [mem 0x0000000050000000-0x00000000528fffff]

10446 23:11:56.230757  [    0.000000]   node   0: [mem 0x0000000052900000-0x00000000545fffff]

10447 23:11:56.234342  [    0.000000]   node   0: [mem 0x0000000054700000-0x00000000ffdfffff]

10448 23:11:56.240889  [    0.000000]   node   0: [mem 0x0000000100000000-0x000000023fffffff]

10449 23:11:56.247445  [    0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000023fffffff]

10450 23:11:56.306090  [    0.000000] On node 0, zone DMA: 256 pages in unavailable ranges

10451 23:11:56.312485  [    0.000000] On node 0, zone Normal: 512 pages in unavailable ranges

10452 23:11:56.318917  [    0.000000] cma: Reserved 32 MiB at 0x00000000fde00000

10453 23:11:56.322557  [    0.000000] psci: probing for conduit method from DT.

10454 23:11:56.329321  [    0.000000] psci: PSCIv1.1 detected in firmware.

10455 23:11:56.332864  [    0.000000] psci: Using standard PSCI v0.2 function IDs

10456 23:11:56.339452  [    0.000000] psci: MIGRATE_INFO_TYPE not supported.

10457 23:11:56.342500  [    0.000000] psci: SMC Calling Convention v1.2

10458 23:11:56.349203  [    0.000000] percpu: Embedded 21 pages/cpu s45224 r8192 d32600 u86016

10459 23:11:56.352435  [    0.000000] Detected VIPT I-cache on CPU0

10460 23:11:56.359620  [    0.000000] CPU features: detected: GIC system register CPU interface

10461 23:11:56.365598  [    0.000000] CPU features: detected: Virtualization Host Extensions

10462 23:11:56.372486  [    0.000000] CPU features: kernel page table isolation forced ON by KASLR

10463 23:11:56.378914  [    0.000000] CPU features: detected: Kernel page table isolation (KPTI)

10464 23:11:56.386079  [    0.000000] CPU features: detected: Qualcomm erratum 1009, or ARM erratum 1286807, 2441009

10465 23:11:56.392291  [    0.000000] CPU features: detected: ARM errata 1165522, 1319367, or 1530923

10466 23:11:56.399506  [    0.000000] alternatives: applying boot alternatives

10467 23:11:56.402941  [    0.000000] Fallback order for Node 0: 0 

10468 23:11:56.409433  [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 2063616

10469 23:11:56.412616  [    0.000000] Policy zone: Normal

10470 23:11:56.429174  [    0.000000] Kernel command line: console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1

10471 23:11:56.439681  <5>[    0.000000] Unknown kernel command line parameters "tftpserverip=192.168.201.1", will be passed to user space.

10472 23:11:56.449323  <6>[    0.000000] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes, linear)

10473 23:11:56.459546  <6>[    0.000000] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)

10474 23:11:56.465573  <6>[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off

10475 23:11:56.469052  <6>[    0.000000] software IO TLB: area num 8.

10476 23:11:56.525533  <6>[    0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)

10477 23:11:56.675057  <6>[    0.000000] Memory: 7913608K/8385536K available (17984K kernel code, 4116K rwdata, 18184K rodata, 8448K init, 615K bss, 439160K reserved, 32768K cma-reserved)

10478 23:11:56.682021  <6>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1

10479 23:11:56.688349  <6>[    0.000000] rcu: Preemptible hierarchical RCU implementation.

10480 23:11:56.691933  <6>[    0.000000] rcu: 	RCU event tracing is enabled.

10481 23:11:56.698113  <6>[    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.

10482 23:11:56.704609  <6>[    0.000000] 	Trampoline variant of Tasks RCU enabled.

10483 23:11:56.708503  <6>[    0.000000] 	Tracing variant of Tasks RCU enabled.

10484 23:11:56.718009  <6>[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.

10485 23:11:56.724539  <6>[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8

10486 23:11:56.728254  <6>[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0

10487 23:11:56.735868  <6>[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode

10488 23:11:56.739395  <6>[    0.000000] GICv3: 608 SPIs implemented

10489 23:11:56.745791  <6>[    0.000000] GICv3: 0 Extended SPIs implemented

10490 23:11:56.749238  <6>[    0.000000] Root IRQ handler: gic_handle_irq

10491 23:11:56.752294  <6>[    0.000000] GICv3: GICv3 features: 16 PPIs

10492 23:11:56.769715  <6>[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c040000

10493 23:11:56.772366  <6>[    0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@100[1] /cpus/cpu@200[2] /cpus/cpu@300[3] }

10494 23:11:56.786078  <6>[    0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@400[4] /cpus/cpu@500[5] /cpus/cpu@600[6] /cpus/cpu@700[7] }

10495 23:11:56.792315  <6>[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.

10496 23:11:56.801239  <6>[    0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).

10497 23:11:56.814448  <6>[    0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns

10498 23:11:56.821588  <6>[    0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns

10499 23:11:56.827952  <6>[    0.009181] Console: colour dummy device 80x25

10500 23:11:56.838495  <6>[    0.013929] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)

10501 23:11:56.841128  <6>[    0.024371] pid_max: default: 32768 minimum: 301

10502 23:11:56.848543  <6>[    0.029244] LSM: Security Framework initializing

10503 23:11:56.854858  <6>[    0.034181] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)

10504 23:11:56.865270  <6>[    0.041996] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes, linear)

10505 23:11:56.871026  <6>[    0.051456] cblist_init_generic: Setting adjustable number of callback queues.

10506 23:11:56.878501  <6>[    0.058898] cblist_init_generic: Setting shift to 3 and lim to 1.

10507 23:11:56.888409  <6>[    0.065237] cblist_init_generic: Setting adjustable number of callback queues.

10508 23:11:56.891887  <6>[    0.072664] cblist_init_generic: Setting shift to 3 and lim to 1.

10509 23:11:56.898432  <6>[    0.079143] rcu: Hierarchical SRCU implementation.

10510 23:11:56.904824  <6>[    0.079145] rcu: 	Max phase no-delay instances is 1000.

10511 23:11:56.911409  <6>[    0.079170] printk: bootconsole [mtk8250] printing thread started

10512 23:11:56.917804  <6>[    0.097507] EFI services will not be available.

10513 23:11:56.921534  <6>[    0.097709] smp: Bringing up secondary CPUs ...

10514 23:11:56.924895  <6>[    0.098018] Detected VIPT I-cache on CPU1

10515 23:11:56.931206  <6>[    0.098085] GICv3: CPU1: found redistributor 100 region 0:0x000000000c060000

10516 23:11:56.938134  <6>[    0.098118] CPU1: Booted secondary processor 0x0000000100 [0x412fd050]

10517 23:11:56.949907  <6>[    0.125963] Detected VIPT I-cache on CPU2

10518 23:11:56.956551  <6>[    0.126009] GICv3: CPU2: found redistributor 200 region 0:0x000000000c080000

10519 23:11:56.966202  <6>[    0.126023] CPU2: Booted secondary processor 0x0000000200 [0x412fd050]

10520 23:11:56.969721  <6>[    0.126277] Detected VIPT I-cache on CPU3

10521 23:11:56.976421  <6>[    0.126323] GICv3: CPU3: found redistributor 300 region 0:0x000000000c0a0000

10522 23:11:56.983112  <6>[    0.126336] CPU3: Booted secondary processor 0x0000000300 [0x412fd050]

10523 23:11:56.986424  <6>[    0.126647] CPU features: detected: Spectre-v4

10524 23:11:56.993047  <6>[    0.126653] CPU features: detected: Spectre-BHB

10525 23:11:56.996401  <6>[    0.126658] Detected PIPT I-cache on CPU4

10526 23:11:57.002907  <6>[    0.126718] GICv3: CPU4: found redistributor 400 region 0:0x000000000c0c0000

10527 23:11:57.009917  <6>[    0.126733] CPU4: Booted secondary processor 0x0000000400 [0x414fd0b0]

10528 23:11:57.016039  <6>[    0.127028] Detected PIPT I-cache on CPU5

10529 23:11:57.022676  <6>[    0.127088] GICv3: CPU5: found redistributor 500 region 0:0x000000000c0e0000

10530 23:11:57.030238  <6>[    0.127105] CPU5: Booted secondary processor 0x0000000500 [0x414fd0b0]

10531 23:11:57.033205  <6>[    0.127379] Detected PIPT I-cache on CPU6

10532 23:11:57.039516  <6>[    0.127444] GICv3: CPU6: found redistributor 600 region 0:0x000000000c100000

10533 23:11:57.046199  <6>[    0.127460] CPU6: Booted secondary processor 0x0000000600 [0x414fd0b0]

10534 23:11:57.052572  <6>[    0.127752] Detected PIPT I-cache on CPU7

10535 23:11:57.059046  <6>[    0.127817] GICv3: CPU7: found redistributor 700 region 0:0x000000000c120000

10536 23:11:57.065975  <6>[    0.127834] CPU7: Booted secondary processor 0x0000000700 [0x414fd0b0]

10537 23:11:57.069073  <6>[    0.127882] smp: Brought up 1 node, 8 CPUs

10538 23:11:57.076092  <6>[    0.127886] SMP: Total of 8 processors activated.

10539 23:11:57.079701  <6>[    0.127889] CPU features: detected: 32-bit EL0 Support

10540 23:11:57.089095  <6>[    0.127891] CPU features: detected: Data cache clean to the PoU not required for I/D coherence

10541 23:11:57.096439  <6>[    0.127893] CPU features: detected: Common not Private translations

10542 23:11:57.099134  <6>[    0.127895] CPU features: detected: CRC32 instructions

10543 23:11:57.105910  <6>[    0.127897] CPU features: detected: RCpc load-acquire (LDAPR)

10544 23:11:57.112631  <6>[    0.127899] CPU features: detected: LSE atomic instructions

10545 23:11:57.119046  <6>[    0.127901] CPU features: detected: Privileged Access Never

10546 23:11:57.122482  <6>[    0.127902] CPU features: detected: RAS Extension Support

10547 23:11:57.132016  <6>[    0.127905] CPU features: detected: Speculative Store Bypassing Safe (SSBS)

10548 23:11:57.135795  <6>[    0.127972] CPU: All CPU(s) started at EL2

10549 23:11:57.142565  <6>[    0.127974] alternatives: applying system-wide alternatives

10550 23:11:57.146202  <6>[    0.141056] devtmpfs: initialized

10551 23:11:57.170364  �|-cache hash table entries: 512 (order 0, 4096 bytes)

10552 23:11:57.177037  <6>[    0.356105]< printk: console [ttyS0] printing thread started

10553 23:11:57.180196  6>[   <6>[    0.356135] printk: console [ttyS0] enabled

10554 23:11:57.183649   0.225739] pnp: PnP ACPI: disabled

10555 23:11:57.192678  <6>[    0.356139] printk: bootconsole [mtk8250] disabled

10556 23:11:57.199900  <6>[    0.370115] printk: bootconsole [mtk8250] printing thread stopped

10557 23:11:57.202730  <6>[    0.371144] SuperH (H)SCI(F) driver initialized

10558 23:11:57.209527  <6>[    0.371626] msm_serial: driver initialized

10559 23:11:57.215981  <6>[    0.376186] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14005000

10560 23:11:57.226213  <6>[    0.376214] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14006000

10561 23:11:57.232655  <6>[    0.376243] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@14007000

10562 23:11:57.247718  <6>[    0.376272] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@14009000

10563 23:11:57.260864  <6>[    0.376293] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400a000

10564 23:11:57.280029  <6>[    0.376321] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@1400b000

10565 23:11:57.281775  <6>[    0.376349] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@1400c000

10566 23:11:57.282360  <6>[    0.376460] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14014000

10567 23:11:57.290015  <6>[    0.376489] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@14015000

10568 23:11:57.290628  <6>[    0.388693] loop: module loaded

10569 23:11:57.297707  <6>[    0.391209] vgpu11_sshub: Bringing 400000uV into 575000-575000uV

10570 23:11:57.304163  <4>[    0.408244] mtk-pmic-keys: Failed to locate of_node [id: -1]

10571 23:11:57.304307  <6>[    0.409081] megasas: 07.719.03.00-rc1

10572 23:11:57.311359  <6>[    0.420893] tpm_tis_spi spi1.0: TPM ready IRQ confirmed on attempt 2

10573 23:11:57.317843  <6>[    0.421049] spi-nor spi2.0: w25q64jwm (8192 Kbytes)

10574 23:11:57.324743  <6>[    0.432867] tpm_tis_spi spi1.0: 2.0 TPM (device-id 0x28, rev-id 0)

10575 23:11:57.334502  <6>[    0.485215] tpm_tis_spi spi1.0: Cr50 firmware version: B2-C:0 RO_B:0.0.12/9eb618de RW_B:0.6.171/cr50_v3.94_pp.126-3593b

10576 23:11:59.503877  <6>[    2.681799] Freeing initrd memory: 55108K

10577 23:11:59.510644  <6>[    2.687737] mtk-spi-nor 11234000.spi: spi frequency: 52000000 Hz

10578 23:11:59.514020  <6>[    2.692545] tun: Universal TUN/TAP device driver, 1.6

10579 23:11:59.517226  <6>[    2.693304] thunder_xcv, ver 1.0

10580 23:11:59.520592  <6>[    2.693322] thunder_bgx, ver 1.0

10581 23:11:59.523861  <6>[    2.693338] nicpf, ver 1.0

10582 23:11:59.531137  <6>[    2.694442] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version

10583 23:11:59.537277  <6>[    2.694446] hns3: Copyright (c) 2017 Huawei Corporation.

10584 23:11:59.540464  <6>[    2.694473] hclge is initializing

10585 23:11:59.547137  <6>[    2.694486] e1000: Intel(R) PRO/1000 Network Driver

10586 23:11:59.550845  <6>[    2.694488] e1000: Copyright (c) 1999-2006 Intel Corporation.

10587 23:11:59.558185  <6>[    2.694507] e1000e: Intel(R) PRO/1000 Network Driver

10588 23:11:59.565541  <6>[    2.694509] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.

10589 23:11:59.569334  <6>[    2.694524] igb: Intel(R) Gigabit Ethernet Network Driver

10590 23:11:59.575786  <6>[    2.694526] igb: Copyright (c) 2007-2014 Intel Corporation.

10591 23:11:59.582751  <6>[    2.694541] igbvf: Intel(R) Gigabit Virtual Function Network Driver

10592 23:11:59.589512  <6>[    2.694543] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.

10593 23:11:59.593149  <6>[    2.694836] sky2: driver version 1.30

10594 23:11:59.595993  <6>[    2.695918] VFIO - User Level meta-driver version: 0.3

10595 23:11:59.602522  <6>[    2.698751] usbcore: registered new interface driver usb-storage

10596 23:11:59.609040  <6>[    2.698948] usbcore: registered new device driver onboard-usb-hub

10597 23:11:59.615977  <6>[    2.701766] mt6397-rtc mt6359-rtc: registered as rtc0

10598 23:11:59.622939  <6>[    2.701922] mt6397-rtc mt6359-rtc: setting system clock to 2023-12-27T23:12:38 UTC (1703718758)

10599 23:11:59.629205  <6>[    2.702536] i2c_dev: i2c /dev entries driver

10600 23:11:59.635827  <6>[    2.709733] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)

10601 23:11:59.642266  <6>[    2.724716] cpu cpu0: EM: created perf domain

10602 23:11:59.645459  <6>[    2.725041] cpu cpu4: EM: created perf domain

10603 23:11:59.652865  <6>[    2.727979] sdhci: Secure Digital Host Controller Interface driver

10604 23:11:59.655648  <6>[    2.727980] sdhci: Copyright(c) Pierre Ossman

10605 23:11:59.662009  <6>[    2.728336] Synopsys Designware Multimedia Card Interface Driver

10606 23:11:59.669167  <6>[    2.728728] sdhci-pltfm: SDHCI platform and OF driver helper

10607 23:11:59.675596  <6>[    2.732978] ledtrig-cpu: registered to indicate activity on CPUs

10608 23:11:59.678587  <6>[    2.733710] mmc0: CQHCI version 5.10

10609 23:11:59.685668  <6>[    2.733797] SMCCC: SOC_ID: ID = jep106:0426:8192 Revision = 0x00000000

10610 23:11:59.692554  <6>[    2.734073] usbcore: registered new interface driver usbhid

10611 23:11:59.696088  <6>[    2.734074] usbhid: USB HID core driver

10612 23:11:59.701897  <6>[    2.734191] spi_master spi0: will run message pump with realtime priority

10613 23:11:59.715311  <6>[    2.766239] input: cros_ec as /devices/platform/soc/11010000.spi/spi_master/spi0/spi0.0/11010000.spi:ec@0:keyboard-controller/input/input0

10614 23:11:59.728806  <6>[    2.768997] input: cros_ec_buttons as /devices/platform/soc/11010000.spi/spi_master/spi0/spi0.0/11010000.spi:ec@0:keyboard-controller/input/input1

10615 23:11:59.735091  <6>[    2.770213] cros-ec-spi spi0.0: Chrome EC device registered

10616 23:11:59.745147  <6>[    2.782724] mt6359-sound mt6359-sound: mt6359_parse_dt() failed to read mic-type-1, use default (0)

10617 23:11:59.748806  <6>[    2.783659] NET: Registered PF_PACKET protocol family

10618 23:11:59.755127  <6>[    2.783731] 9pnet: Installing 9P2000 support

10619 23:11:59.758593  <5>[    2.783765] Key type dns_resolver registered

10620 23:11:59.761847  <6>[    2.784032] registered taskstats version 1

10621 23:11:59.768425  <5>[    2.784045] Loading compiled-in X.509 certificates

10622 23:11:59.778567  <4>[    2.798496] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator

10623 23:11:59.788630  <4>[    2.798644] mtk-power-controller 10006000.syscon:power-controller: supply domain not found, using dummy regulator

10624 23:11:59.795336  <3>[    2.798658] debugfs: File 'uA_load' in directory '/' already present!

10625 23:11:59.801777  <3>[    2.798665] debugfs: File 'min_uV' in directory '/' already present!

10626 23:11:59.808599  <3>[    2.798668] debugfs: File 'max_uV' in directory '/' already present!

10627 23:11:59.814933  <3>[    2.798672] debugfs: File 'constraint_flags' in directory '/' already present!

10628 23:11:59.825172  <3>[    2.800629] mediatek-mutex 14001000.mutex: error -2 can't parse gce-client-reg property (0)

10629 23:11:59.831440  <6>[    2.807774] xhci-mtk 11200000.usb: uwk - reg:0x420, version:102

10630 23:11:59.834911  <6>[    2.808406] xhci-mtk 11200000.usb: xHCI Host Controller

10631 23:11:59.844638  <6>[    2.808425] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1

10632 23:11:59.854739  <6>[    2.808636] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010

10633 23:11:59.858011  <6>[    2.808685] xhci-mtk 11200000.usb: irq 271, io mem 0x11200000

10634 23:11:59.864985  <6>[    2.808782] xhci-mtk 11200000.usb: xHCI Host Controller

10635 23:11:59.871662  <6>[    2.808788] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2

10636 23:11:59.877989  <6>[    2.808794] xhci-mtk 11200000.usb: Host supports USB 3.1 Enhanced SuperSpeed

10637 23:11:59.884492  <6>[    2.809288] hub 1-0:1.0: USB hub found

10638 23:11:59.888106  <6>[    2.809309] hub 1-0:1.0: 1 port detected

10639 23:11:59.894615  <6>[    2.809504] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.

10640 23:11:59.901426  <6>[    2.810450] hub 2-0:1.0: USB hub found

10641 23:11:59.904468  <6>[    2.810528] hub 2-0:1.0: 1 port detected

10642 23:11:59.907575  <6>[    2.813108] mtk-msdc 11f70000.mmc: Got CD GPIO

10643 23:11:59.917989  <6>[    2.821131] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_runtime_resume()

10644 23:11:59.924551  <6>[    2.821138] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_enable_clock()

10645 23:11:59.934515  <4>[    2.821212] mt8192-audio 11210000.syscon:mt8192-afe-pcm: No cache defaults, reading back from HW

10646 23:11:59.940926  <6>[    2.821722] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_runtime_suspend()

10647 23:11:59.950937  <6>[    2.821723] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_afe_disable_clock()

10648 23:11:59.957490  <6>[    2.822007] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_adda_register()

10649 23:11:59.964040  <6>[    2.822019] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_pcm_register()

10650 23:11:59.974116  <6>[    2.822021] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mt8192_dai_tdm_register()

10651 23:11:59.980493  <6>[    2.822027] mt8192-audio 11210000.syscon:mt8192-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 39

10652 23:11:59.991257  <6>[    2.823267] mtk-iommu 1401d000.m4u: bound 14003000.larb (ops mtk_smi_larb_component_ops)

10653 23:12:00.000525  <6>[    2.823281] mtk-iommu 1401d000.m4u: bound 14004000.larb (ops mtk_smi_larb_component_ops)

10654 23:12:00.007397  <6>[    2.823285] mtk-iommu 1401d000.m4u: bound 1f002000.larb (ops mtk_smi_larb_component_ops)

10655 23:12:00.017160  <6>[    2.823288] mtk-iommu 1401d000.m4u: bound 1602e000.larb (ops mtk_smi_larb_component_ops)

10656 23:12:00.024070  <6>[    2.823292] mtk-iommu 1401d000.m4u: bound 1600d000.larb (ops mtk_smi_larb_component_ops)

10657 23:12:00.033731  <6>[    2.823296] mtk-iommu 1401d000.m4u: bound 17010000.larb (ops mtk_smi_larb_component_ops)

10658 23:12:00.040757  <6>[    2.823300] mtk-iommu 1401d000.m4u: bound 1502e000.larb (ops mtk_smi_larb_component_ops)

10659 23:12:00.050648  <6>[    2.823303] mtk-iommu 1401d000.m4u: bound 1582e000.larb (ops mtk_smi_larb_component_ops)

10660 23:12:00.056830  <6>[    2.823307] mtk-iommu 1401d000.m4u: bound 1a001000.larb (ops mtk_smi_larb_component_ops)

10661 23:12:00.067382  <6>[    2.823310] mtk-iommu 1401d000.m4u: bound 1a002000.larb (ops mtk_smi_larb_component_ops)

10662 23:12:00.073845  <6>[    2.823313] mtk-iommu 1401d000.m4u: bound 1a00f000.larb (ops mtk_smi_larb_component_ops)

10663 23:12:00.083595  <6>[    2.823317] mtk-iommu 1401d000.m4u: bound 1a010000.larb (ops mtk_smi_larb_component_ops)

10664 23:12:00.090765  <6>[    2.823321] mtk-iommu 1401d000.m4u: bound 1a011000.larb (ops mtk_smi_larb_component_ops)

10665 23:12:00.100110  <6>[    2.823324] mtk-iommu 1401d000.m4u: bound 1b10f000.larb (ops mtk_smi_larb_component_ops)

10666 23:12:00.107147  <6>[    2.823328] mtk-iommu 1401d000.m4u: bound 1b00f000.larb (ops mtk_smi_larb_component_ops)

10667 23:12:00.114118  <6>[    2.823741] mediatek-disp-ovl 14005000.ovl: Adding to iommu group 0

10668 23:12:00.119969  <6>[    2.824475] mediatek-disp-ovl 14006000.ovl: Adding to iommu group 0

10669 23:12:00.127024  <6>[    2.824872] mediatek-disp-ovl 14014000.ovl: Adding to iommu group 0

10670 23:12:00.133352  <6>[    2.825227] mediatek-disp-rdma 14007000.rdma: Adding to iommu group 0

10671 23:12:00.139883  <6>[    2.825604] mediatek-disp-rdma 14015000.rdma: Adding to iommu group 0

10672 23:12:00.150369  <6>[    2.825787] mediatek-drm mediatek-drm.1.auto: bound 14005000.ovl (ops mtk_disp_ovl_component_ops)

10673 23:12:00.160110  <6>[    2.825797] mediatek-drm mediatek-drm.1.auto: bound 14006000.ovl (ops mtk_disp_ovl_component_ops)

10674 23:12:00.166380  <6>[    2.825800] mediatek-drm mediatek-drm.1.auto: bound 14007000.rdma (ops mtk_disp_rdma_component_ops)

10675 23:12:00.177243  <6>[    2.825803] mediatek-drm mediatek-drm.1.auto: bound 14009000.color (ops mtk_disp_color_component_ops)

10676 23:12:00.187282  <6>[    2.825806] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ccorr (ops mtk_disp_ccorr_component_ops)

10677 23:12:00.196522  <6>[    2.825809] mediatek-drm mediatek-drm.1.auto: bound 1400b000.aal (ops mtk_disp_aal_component_ops)

10678 23:12:00.206653  <6>[    2.825812] mediatek-drm mediatek-drm.1.auto: bound 1400c000.gamma (ops mtk_disp_gamma_component_ops)

10679 23:12:00.213307  <6>[    2.825815] mediatek-drm mediatek-drm.1.auto: bound 14014000.ovl (ops mtk_disp_ovl_component_ops)

10680 23:12:00.223022  <6>[    2.825817] mediatek-drm mediatek-drm.1.auto: bound 14015000.rdma (ops mtk_disp_rdma_component_ops)

10681 23:12:00.232844  <6>[    2.825821] mediatek-drm mediatek-drm.1.auto: Not creating crtc 0 because component 14 is disabled or missing

10682 23:12:00.243190  <6>[    2.825824] mediatek-drm mediatek-drm.1.auto: Not creating crtc 0 because component 10 is disabled or missing

10683 23:12:00.253331  <6>[    2.826808] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 0

10684 23:12:00.256070  <6>[    2.832431] mmc0: Command Queue Engine enabled

10685 23:12:00.262863  <6>[    2.832443] mmc0: new HS400 Enhanced strobe MMC card at address 0001

10686 23:12:00.269958  <6>[    2.833000] mmcblk0: mmc0:0001 DA4128 116 GiB 

10687 23:12:00.273143  <6>[    2.836079]  mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12

10688 23:12:00.279344  <6>[    2.836914] mmcblk0boot0: mmc0:0001 DA4128 4.00 MiB 

10689 23:12:00.286241  <6>[    2.837467] mmcblk0boot1: mmc0:0001 DA4128 4.00 MiB 

10690 23:12:00.292802  <6>[    2.838353] mmcblk0rpmb: mmc0:0001 DA4128 16.0 MiB, chardev (507:0)

10691 23:12:00.299970  <6>[    3.197902] usb 2-1: new SuperSpeed USB device number 2 using xhci-mtk

10692 23:12:00.302536  <6>[    3.224515] hub 2-1:1.0: USB hub found

10693 23:12:00.306139  <6>[    3.224896] hub 2-1:1.0: 3 ports detected

10694 23:12:00.308977  <6>[    3.227349] hub 2-1:1.0: USB hub found

10695 23:12:00.316093  <6>[    3.227729] hub 2-1:1.0: 3 ports detected

10696 23:12:00.322463  <6>[    3.345672] usb 1-1: new high-speed USB device number 2 using xhci-mtk

10697 23:12:00.326106  <6>[    3.502546] hub 1-1:1.0: USB hub found

10698 23:12:00.329031  <6>[    3.502953] hub 1-1:1.0: 4 ports detected

10699 23:12:00.332522  <6>[    3.506904] hub 1-1:1.0: USB hub found

10700 23:12:00.339285  <6>[    3.507218] hub 1-1:1.0: 4 ports detected

10701 23:12:00.407492  <6>[    3.582023] usb 2-1.3: new SuperSpeed USB device number 3 using xhci-mtk

10702 23:12:00.643238  <6>[    3.817662] usb 1-1.4: new high-speed USB device number 3 using xhci-mtk

10703 23:12:00.768192  <6>[    3.945759] hub 1-1.4:1.0: USB hub found

10704 23:12:00.771110  <6>[    3.946236] hub 1-1.4:1.0: 2 ports detected

10705 23:12:00.774546  <6>[    3.950694] hub 1-1.4:1.0: USB hub found

10706 23:12:00.781038  <6>[    3.951068] hub 1-1.4:1.0: 2 ports detected

10707 23:12:01.063214  <6>[    4.237793] usb 1-1.4.1: new high-speed USB device number 4 using xhci-mtk

10708 23:12:01.247491  <6>[    4.421794] usb 1-1.4.2: new high-speed USB device number 5 using xhci-mtk

10709 23:12:11.955629  <6>[   15.138855] ALSA device list:

10710 23:12:11.961786  <6>[   15.138877]   No soundcards found.

10711 23:12:11.966028  <6>[   15.143522] Freeing unused kernel memory: 8448K

10712 23:12:11.968393  <6>[   15.143748] Run /init as init process

10713 23:12:12.006631  <6>[   15.189101] NET: Registered PF_INET6 protocol family

10714 23:12:12.009635  <6>[   15.190369] Segment Routing with IPv6

10715 23:12:12.016132  <6>[   15.190386] In-situ OAM (IOAM) with IPv6

10716 23:12:12.021890  

10717 23:12:12.044953  Welcome to Debian GNU/Linux <30>[   15.207175] systemd[1]: systemd 247.3-7+deb11u2 running in system mode. (+PAM +AUDIT +SELINUX +IMA +APPARMOR +SMACK +SYSVINIT +UTMP +LIBCRYPTSETUP +GCRYPT +GNUTLS +ACL +XZ +LZ4 +ZSTD +SECCOMP +BLKID +ELFUTILS +KMOD +IDN2 -IDN +PCRE2 default-hierarchy=unified)

10718 23:12:12.051633  <30>[   15.207678] systemd[1]: Detected architecture arm64.

10719 23:12:12.051725  11 (bullseye)!

10720 23:12:12.054725  

10721 23:12:12.070300  <30>[   15.249813] systemd[1]: Set hostname to <debian-bullseye-arm64>.

10722 23:12:12.225946  <30>[   15.404877] systemd[1]: Queued start job for default target Graphical Interface.

10723 23:12:12.255534  [  OK  ] Created slice syste<30>[   15.434786] systemd[1]: Created slice system-getty.slice.

10724 23:12:12.259114  m-getty.slice.

10725 23:12:12.282158  [  OK  ] Created slice syste<30>[   15.458124] systemd[1]: Created slice system-modprobe.slice.

10726 23:12:12.282292  m-modprobe.slice.

10727 23:12:12.306065  [  OK  ] Created slice syste<30>[   15.482552] systemd[1]: Created slice system-serial\x2dgetty.slice.

10728 23:12:12.309417  m-serial\x2dgetty.slice.

10729 23:12:12.327758  [  OK  ] Created slic<30>[   15.507014] systemd[1]: Created slice User and Session Slice.

10730 23:12:12.330404  e User and Session Slice.

10731 23:12:12.353968  [  OK  ] Started Dispatch Pa<30>[   15.530147] systemd[1]: Started Dispatch Password Requests to Console Directory Watch.

10732 23:12:12.357185  ssword …ts to Console Directory Watch.

10733 23:12:12.381967  [  OK  ] Started Forward Pas<30>[   15.558005] systemd[1]: Started Forward Password Requests to Wall Directory Watch.

10734 23:12:12.384878  sword R…uests to Wall Directory Watch.

10735 23:12:12.409514  [  OK  ] Reached target Loca<30>[   15.581864] systemd[1]: Condition check resulted in Arbitrary Executable File Formats File System Automount Point being skipped.

10736 23:12:12.416384  <30>[   15.582075] systemd[1]: Reached target Local Encrypted Volumes.

10737 23:12:12.419291  l Encrypted Volumes.

10738 23:12:12.438769  [  OK  ] Reached target Path<30>[   15.618295] systemd[1]: Reached target Paths.

10739 23:12:12.438866  s.

10740 23:12:12.461616  [  OK  ] Reached target Remo<30>[   15.637793] systemd[1]: Reached target Remote File Systems.

10741 23:12:12.461709  te File Systems.

10742 23:12:12.482415  [  OK  ] Reached target Slic<30>[   15.662141] systemd[1]: Reached target Slices.

10743 23:12:12.482513  es.

10744 23:12:12.502528  [  OK  ] Reached target Swap<30>[   15.681819] systemd[1]: Reached target Swap.

10745 23:12:12.502617  .

10746 23:12:12.526244  [  OK  ] Listening on initct<30>[   15.702419] systemd[1]: Listening on initctl Compatibility Named Pipe.

10747 23:12:12.529945  l Compatibility Named Pipe.

10748 23:12:12.539570  [  OK  ] Listening on Journa<30>[   15.717844] systemd[1]: Listening on Journal Audit Socket.

10749 23:12:12.542568  l Audit Socket.

10750 23:12:12.566069  [  OK  ] Listening on Journa<30>[   15.742345] systemd[1]: Listening on Journal Socket (/dev/log).

10751 23:12:12.566158  l Socket (/dev/log).

10752 23:12:12.587928  [  OK  ] Listening on<30>[   15.767061] systemd[1]: Listening on Journal Socket.

10753 23:12:12.590889   Journal Socket.

10754 23:12:12.606984  [  OK  ] Listening on udev C<30>[   15.786459] systemd[1]: Listening on udev Control Socket.

10755 23:12:12.610372  ontrol Socket.

10756 23:12:12.631251  [  OK  ] Listening on<30>[   15.810880] systemd[1]: Listening on udev Kernel Socket.

10757 23:12:12.634997   udev Kernel Socket.

10758 23:12:12.678093           Mounting Huge Pages File Syste<30>[   15.857785] systemd[1]: Mounting Huge Pages File System...

10759 23:12:12.681925  m...

10760 23:12:12.700575           Mounting POSIX<30>[   15.879893] systemd[1]: Mounting POSIX Message Queue File System...

10761 23:12:12.703660   Message Queue File System...

10762 23:12:12.724981           Mountin<30>[   15.904723] systemd[1]: Mounting Kernel Debug File System...

10763 23:12:12.728841  g Kernel Debug File System...

10764 23:12:12.749460  <30>[   15.926116] systemd[1]: Condition check resulted in Kernel Trace File System being skipped.

10765 23:12:12.763120           Starting Create list of st…o<30>[   15.930450] systemd[1]: Starting Create list of static device nodes for the current kernel...

10766 23:12:12.766866  des for the current kernel...

10767 23:12:12.794311           Starting Load Kernel Module co<30>[   15.970606] systemd[1]: Starting Load Kernel Module configfs...

10768 23:12:12.794459  nfigfs...

10769 23:12:12.817584           Starting Load Kernel Module dr<30>[   15.993742] systemd[1]: Starting Load Kernel Module drm...

10770 23:12:12.817674  m...

10771 23:12:12.837820  <30>[   16.014015] systemd[1]: Condition check resulted in Set Up Additional Binary Formats being skipped.

10772 23:12:12.844958  <30>[   16.020240] systemd[1]: Starting Journal Service...

10773 23:12:12.847691           Starting Journal Service...

10774 23:12:12.868730           Startin<30>[   16.048497] systemd[1]: Starting Load Kernel Modules...

10775 23:12:12.872083  g Load Kernel Modules...

10776 23:12:12.900407           Starting Remou<30>[   16.079239] systemd[1]: Starting Remount Root and Kernel File Systems...

10777 23:12:12.906646  nt Root and Kernel File Systems...

10778 23:12:12.932239           Starting Coldp<30>[   16.111561] systemd[1]: Starting Coldplug All udev Devices...

10779 23:12:12.935144  lug All udev Devices...

10780 23:12:12.958075  [  OK  [<30>[   16.141020] systemd[1]: Started Journal Service.

10781 23:12:12.964630  0m] Started Journal Service.

10782 23:12:12.984805  [  OK  ] Mounted Huge Pages File System.

10783 23:12:13.007712  [  OK  ] Mounted POSIX Message Queue File System.

10784 23:12:13.028556  [  OK  ] Mounted Kernel Debug File System.

10785 23:12:13.052535  [  OK  ] Finished Create list of st… nodes for the current kernel.

10786 23:12:13.070019  [  OK  ] Finished Load Kernel Module configfs.

10787 23:12:13.089715  [  OK  ] Finished Load Kernel Module drm.

10788 23:12:13.109109  [  OK  ] Finished Load Kernel Modules.

10789 23:12:13.129242  [FAILED] Failed to start Remount Root and Kernel File Systems.

10790 23:12:13.142633  See 'systemctl status systemd-remount-fs.service' for details.

10791 23:12:13.197166           Mounting Kernel Configuration File System...

10792 23:12:13.217928           Starting Flush Journal to Persistent Storage...

10793 23:12:13.241855           Startin<46>[   16.416721] systemd-journald[194]: Received client request to flush runtime journal.

10794 23:12:13.245210  g Load/Save Random Seed...

10795 23:12:13.268267           Starting Apply Kernel Variables...

10796 23:12:13.286936           Starting Create System Users...

10797 23:12:13.306322  [  OK  ] Mounted Kernel Configuration File System.

10798 23:12:13.325259  [  OK  ] Finished Coldplug All udev Devices.

10799 23:12:13.347897  [  OK  ] Finished Flush Journal to Persistent Storage.

10800 23:12:13.364988  [  OK  ] Finished Load/Save Random Seed.

10801 23:12:13.384935  [  OK  ] Finished Apply Kernel Variables.

10802 23:12:13.404659  [  OK  ] Finished Create System Users.

10803 23:12:13.459384           Starting Create Static Device Nodes in /dev...

10804 23:12:13.492129  [  OK  ] Finished Create Static Device Nodes in /dev.

10805 23:12:13.507894  [  OK  ] Reached target Local File Systems (Pre).

10806 23:12:13.523696  [  OK  ] Reached target Local File Systems.

10807 23:12:13.579040           Starting Create Volatile Files and Directories...

10808 23:12:13.603293           Starting Rule-based Manage…for Device Events and Files...

10809 23:12:13.623496  [  OK  ] Finished Create Volatile Files and Directories.

10810 23:12:13.644706  [  OK  ] Started Rule-based Manager for Device Events and Files.

10811 23:12:13.695598           Starting Network Time Synchronization...

10812 23:12:13.719540           Starting Update UTMP about System Boot/Shutdown...

10813 23:12:13.758908  [  OK  ] Finished Update UTMP about System Boot/Shutdown.

10814 23:12:13.786487  [  OK  ] Created slice system-systemd\x2dbacklight.slice.

10815 23:12:13.792876  <6>[   16.970275] mtk-scp 10500000.scp: assigned reserved memory node scp@50000000

10816 23:12:13.799596  <6>[   16.975093] remoteproc remoteproc0: scp is available

10817 23:12:13.803112  <6>[   16.975252] remoteproc remoteproc0: powering up scp

10818 23:12:13.812896  <6>[   16.975270] remoteproc remoteproc0: Booting fw image mediatek/mt8192/scp.img, size 309164

10819 23:12:13.816389  <6>[   16.975318] mtk-scp 10500000.scp: IPI buf addr 0x000ffdb0

10820 23:12:13.831111  <6>[   17.009965] mc: Linux media interface: v0.10

10821 23:12:13.836898           Starting Load/Save Screen …of leds:white:kbd_backlight...

10822 23:12:13.852771  [  OK  ] Started Network Time Synchronization.

10823 23:12:13.862090  <6>[   17.043906] videodev: Linux video capture interface: v2.00

10824 23:12:13.885419  <6>[   17.063950] mtk-pcie-gen3 11230000.pcie: host bridge /soc/pcie@11230000 ranges:

10825 23:12:13.896031  [  OK  [<6>[   17.063987] mtk-pcie-gen3 11230000.pcie:      MEM 0x0012000000..0x00127fffff -> 0x0012000000

10826 23:12:13.905787  0m] Finished [0<6>[   17.063992] mtk-pcie-gen3 11230000.pcie:       IO 0x0012800000..0x0012ffffff -> 0x0012800000

10827 23:12:13.912578  ;1;39mLoad/Save Screen …s of leds:white:kbd_backlight.

10828 23:12:13.921805  <6>[   17.097918] mtk-scp 10500000.scp: SCP is ready. FW version asurada_scp_v2.0.20536+a3bcde3e

10829 23:12:13.928779  <6>[   17.097932] remoteproc remoteproc0: remote processor scp is now up

10830 23:12:13.938800  [  OK  [<6>[   17.097933] mtk-scp 10500000.scp: creating channel cros-ec-rpmsg addr 0xd

10831 23:12:13.944943  0m] Found device<4>[   17.098654] elants_i2c 4-0010: supply vcc33 not found, using dummy regulator

10832 23:12:13.952282  <4>[   17.101743] elants_i2c 4-0010: supply vccio not found, using dummy regulator

10833 23:12:13.962253  <3>[   17.108511] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0

10834 23:12:13.971664   /dev/t<3>[   17.108542] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0

10835 23:12:13.978492  <3>[   17.108555] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0

10836 23:12:13.988095  <3>[   17.117442] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0

10837 23:12:13.994760  <3>[   17.117584] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0

10838 23:12:14.001712  <3>[   17.117594] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0

10839 23:12:14.011461  <3>[   17.117605] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0

10840 23:12:14.018845  <3>[   17.117612] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0

10841 23:12:14.025165  <3>[   17.121266] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@0

10842 23:12:14.035314  <3>[   17.134224] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1

10843 23:12:14.042286  <3>[   17.134268] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1

10844 23:12:14.045156  tyS0.

10845 23:12:14.052242  <3>[   17.134278] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1

10846 23:12:14.058684  <3>[   17.143002] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1

10847 23:12:14.069388  <3>[   17.143024] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1

10848 23:12:14.075876  <3>[   17.143032] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1

10849 23:12:14.083237  <3>[   17.143042] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1

10850 23:12:14.093301  <3>[   17.143050] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1

10851 23:12:14.100321  <3>[   17.144511] OF: graph: no port node found in /soc/spi@11010000/ec@0/typec/connector@1

10852 23:12:14.106368  <6>[   17.148423] usbcore: registered new interface driver r8152

10853 23:12:14.113307  <6>[   17.160151] sbs-battery 5-000b: sbs-battery: battery gas gauge device registered

10854 23:12:14.119958  <6>[   17.182905] mtk-pcie-gen3 11230000.pcie: PCI host bridge to bus 0000:00

10855 23:12:14.126469  <6>[   17.182918] pci_bus 0000:00: root bus resource [bus 00-ff]

10856 23:12:14.133900  <6>[   17.182923] pci_bus 0000:00: root bus resource [mem 0x12000000-0x127fffff]

10857 23:12:14.143402  <6>[   17.182926] pci_bus 0000:00: root bus resource [io  0x0000-0x7fffff] (bus address [0x12800000-0x12ffffff])

10858 23:12:14.150179  <6>[   17.182963] pci 0000:00:00.0: [14c3:6786] type 01 class 0x060400

10859 23:12:14.156612  <6>[   17.182978] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x00003fff 64bit pref]

10860 23:12:14.163423  <6>[   17.183048] pci 0000:00:00.0: supports D1 D2

10861 23:12:14.170574  <6>[   17.183050] pci 0000:00:00.0: PME# supported from D0 D1 D2 D3hot D3cold

10862 23:12:14.177988  [  OK  [<6>[   17.184134] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring

10863 23:12:14.184910  <6>[   17.184241] pci 0000:01:00.0: [14c3:7961] type 00 class 0x028000

10864 23:12:14.195731  0m] Reached targ<6>[   17.184268] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x000fffff 64bit pref]

10865 23:12:14.202160  et Syst<6>[   17.184290] pci 0000:01:00.0: reg 0x18: [mem 0x00000000-0x00003fff 64bit pref]

10866 23:12:14.209287  <6>[   17.184306] pci 0000:01:00.0: reg 0x20: [mem 0x00000000-0x00000fff 64bit pref]

10867 23:12:14.216148  em Initializatio<6>[   17.184444] pci 0000:01:00.0: supports D1 D2

10868 23:12:14.216232  n.

10869 23:12:14.222847  <6>[   17.184448] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold

10870 23:12:14.232739  <4>[   17.189122] sbs-battery 5-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.

10871 23:12:14.236109  <4>[   17.189122] Fallback method does not support PEC.

10872 23:12:14.243037  <6>[   17.197610] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01

10873 23:12:14.253558  [  OK  [<6>[   17.197704] pci 0000:00:00.0: BAR 15: assigned [mem 0x12000000-0x121fffff 64bit pref]

10874 23:12:14.264111  0m] Started [0;<6>[   17.197712] pci 0000:00:00.0: BAR 0: assigned [mem 0x12200000-0x12203fff 64bit pref]

10875 23:12:14.270806  1;39mDaily Clean<6>[   17.197727] pci 0000:01:00.0: BAR 0: assigned [mem 0x12000000-0x120fffff 64bit pref]

10876 23:12:14.280566  up of Temporary <6>[   17.197741] pci 0000:01:00.0: BAR 2: assigned [mem 0x12100000-0x12103fff 64bit pref]

10877 23:12:14.290703  Directories.<6>[   17.197755] pci 0000:01:00.0: BAR 4: assigned [mem 0x12104000-0x12104fff 64bit pref]

10878 23:12:14.297717  <6>[   17.197769] pci 0000:00:00.0: PCI bridge to [bus 01]

10879 23:12:14.297829  

10880 23:12:14.304101  <6>[   17.197777] pci 0000:00:00.0:   bridge window [mem 0x12000000-0x121fffff 64bit pref]

10881 23:12:14.310842  <6>[   17.198246] pcieport 0000:00:00.0: enabling device (0000 -> 0002)

10882 23:12:14.318179  <6>[   17.199826] pcieport 0000:00:00.0: PME: Signaling with IRQ 282

10883 23:12:14.321766  <6>[   17.201333] pcieport 0000:00:00.0: AER: enabled with IRQ 282

10884 23:12:14.332388  <3>[   17.205914] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5

10885 23:12:14.339034  <6>[   17.212727] input: Elan Touchscreen as /devices/platform/soc/11f00000.i2c/i2c-4/4-0010/input/input2

10886 23:12:14.349149  <6>[   17.248926] usb 2-1.3: reset SuperSpeed USB device number 3 using xhci-mtk

10887 23:12:14.356642  [  OK  [<6>[   17.250174] cros-ec-dev cros-ec-dev.10.auto: CrOS System Control Processor MCU detected

10888 23:12:14.370286  0m] Reached targ<6>[   17.251527] elan_i2c 3-0015: Elan Touchpad: Module ID: 0x0128, Firmware: 0x0002, Sample: 0x0004, IAP: 0x0003

10889 23:12:14.380502  et Syst<6>[   17.251826] input: Elan Touchpad as /devices/platform/soc/11d21000.i2c/i2c-3/3-0015/input/input3

10890 23:12:14.387839  <6>[   17.252746] cros-ec-rpmsg 10500000.scp.cros-ec-rpmsg.13.-1: Chrome EC device registered

10891 23:12:14.397649  <3>[   17.271371] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5

10892 23:12:14.407036  em Time Set.<3>[   17.272093] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -6

10893 23:12:14.416943  <4>[   17.296308] r8152 2-1.3:1.0: Direct firmware load for rtl_nic/rtl8153a-4.fw failed with error -2

10894 23:12:14.423960  <4>[   17.296327] r8152 2-1.3:1.0: unable to load firmware patch rtl_nic/rtl8153a-4.fw (-2)

10895 23:12:14.430651  <6>[   17.301631] usb 1-1.4.1: Found UVC 1.10 device HD User Facing (04f2:b741)

10896 23:12:14.437312  <6>[   17.301737] usbcore: registered new interface driver cdc_ether

10897 23:12:14.440281  <6>[   17.310134] Bluetooth: Core ver 2.22

10898 23:12:14.446979  <6>[   17.310311] NET: Registered PF_BLUETOOTH protocol family

10899 23:12:14.453962  <6>[   17.310314] Bluetooth: HCI device and connection manager initialized

10900 23:12:14.456839  <6>[   17.310327] Bluetooth: HCI socket layer initialized

10901 23:12:14.463383  <6>[   17.310329] Bluetooth: L2CAP socket layer initialized

10902 23:12:14.467170  <6>[   17.310336] Bluetooth: SCO socket layer initialized

10903 23:12:14.480563  <6>[   17.315654] input: HD User Facing: HD User Facing as /devices/platform/soc/11200000.usb/usb1/1-1/1-1.4/1-1.4.1/1-1.4.1:1.0/input/input4

10904 23:12:14.487076  <6>[   17.315863] usbcore: registered new interface driver uvcvideo

10905 23:12:14.493823  <6>[   17.316519] usbcore: registered new interface driver r8153_ecm

10906 23:12:14.500356  <5>[   17.318269] cfg80211: Loading compiled-in X.509 certificates for regulatory database

10907 23:12:14.506851  <5>[   17.332859] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'

10908 23:12:14.516644  <4>[   17.332967] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2

10909 23:12:14.519911  <6>[   17.332983] cfg80211: failed to load regulatory.db

10910 23:12:14.526546  <6>[   17.349677] r8152 2-1.3:1.0 eth0: v1.12.13

10911 23:12:14.533487  <6>[   17.358399] mtk-vcodec-enc 17020000.vcodec: Adding to iommu group 0

10912 23:12:14.539851  <6>[   17.363404] r8152 2-1.3:1.0 enx002432307852: renamed from eth0

10913 23:12:14.543487  <6>[   17.373741] usbcore: registered new interface driver btusb

10914 23:12:14.553509  <4>[   17.374873] bluetooth hci0: Direct firmware load for mediatek/BT_RAM_CODE_MT7961_1_2_hdr.bin failed with error -2

10915 23:12:14.560460  <3>[   17.374901] Bluetooth: hci0: Failed to load firmware file (-2)

10916 23:12:14.566758  <3>[   17.374905] Bluetooth: hci0: Failed to set up firmware (-2)

10917 23:12:14.576915  <4>[   17.374909] Bluetooth: hci0: HCI Enhanced Setup Synchronous Connection command is advertised, but not supported.

10918 23:12:14.586391  <3>[   17.382386] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5

10919 23:12:14.593333  <3>[   17.383083] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -6

10920 23:12:14.603645  <3>[   17.391981] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5

10921 23:12:14.613114  <3>[   17.413264] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5

10922 23:12:14.619754  <3>[   17.434087] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5

10923 23:12:14.629904  <3>[   17.457265] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5

10924 23:12:14.639972  <3>[   17.481863] power_supply sbs-5-000b: driver failed to report `time_to_empty_now' property: -5

10925 23:12:14.646869  <6>[   17.645729] mt7921e 0000:01:00.0: assigned reserved memory node wifi@c0000000

10926 23:12:14.652891  <6>[   17.645852] mt7921e 0000:01:00.0: enabling device (0000 -> 0002)

10927 23:12:14.655760  <6>[   17.665687] mt7921e 0000:01:00.0: ASIC revision: 79610010

10928 23:12:14.666980  <6>[   17.760676] mt7921e 0000:01:00.0: HW/SW Version: 0x8a108a10, Build Time: 20231109190918a

10929 23:12:14.669624  <6>[   17.760676] 

10930 23:12:14.669710  

10931 23:12:14.683087  [  OK  ] Reached target System Time Synchronized.

10932 23:12:14.706714  [  OK  ] Started Discard unused blocks once a week.

10933 23:12:14.722356  [  OK  ] Reached target Timers.

10934 23:12:14.742629  [  OK  ] Listening on D-Bus System Message Bus Socket.

10935 23:12:14.755040  [  OK  ] Reached target Sockets.

10936 23:12:14.775352  [  OK  ] Reached target Basic System.

10937 23:12:14.794285  [  OK  ] Listening on Load/Save RF …itch Status /dev/rfkill Watch.

10938 23:12:14.841625  [  OK  ] Started D-Bus Syste<6>[   18.019542] mt7921e 0000:01:00.0: WM Firmware Version: ____010000, Build Time: 20231109190959

10939 23:12:14.844814  m Message Bus.

10940 23:12:14.879752           Starting User Login Management...

10941 23:12:14.899808           Starting Permit User Sessions...

10942 23:12:14.919055  [  OK  ] Finished Permit User Sessions.

10943 23:12:14.954277  [  OK  ] Started User Login Management.

10944 23:12:14.977064  [  OK  ] Reached target Bluetooth.

10945 23:12:15.016649  [  OK  ] Started Getty on tty1.

10946 23:12:15.037767  [  OK  ] Started Serial Getty on ttyS0.

10947 23:12:15.044603  [  OK  ] Reached target Login Prompts.

10948 23:12:15.058939  [  OK  ] Reached target Multi-User System.

10949 23:12:15.075071  [  OK  ] Reached target Graphical Interface.

10950 23:12:15.124368           Starting Load/Save RF Kill Switch Status...

10951 23:12:15.148017           Starting Update UTMP about System Runlevel Changes...

10952 23:12:15.167674  [  OK  ] Started Load/Save RF Kill Switch Status.

10953 23:12:15.206724  [  OK  ] Finished Update UTMP about System Runlevel Changes.

10954 23:12:15.255322  

10955 23:12:15.255442  

10956 23:12:15.258149  Debian GNU/Linux 11 debian-bullseye-arm64 ttyS0

10957 23:12:15.258246  

10958 23:12:15.261248  debian-bullseye-arm64 login: root (automatic login)

10959 23:12:15.261331  

10960 23:12:15.261396  

10961 23:12:15.282022  Linux debian-bullseye-arm64 6.1.67-cip12-rt7 #1 SMP PREEMPT Wed Dec 27 22:50:56 UTC 2023 aarch64

10962 23:12:15.282110  

10963 23:12:15.288956  The programs included with the Debian GNU/Linux system are free software;

10964 23:12:15.295631  the exact distribution terms for each program are described in the

10965 23:12:15.298299  individual files in /usr/share/doc/*/copyright.

10966 23:12:15.298415  

10967 23:12:15.305031  Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent

10968 23:12:15.308087  permitted by applicable law.

10969 23:12:15.308723  Matched prompt #10: / #
10971 23:12:15.309040  Setting prompt string to ['/ #']
10972 23:12:15.309173  end: 2.2.5.1 login-action (duration 00:00:19) [common]
10974 23:12:15.309562  end: 2.2.5 auto-login-action (duration 00:00:19) [common]
10975 23:12:15.309656  start: 2.2.6 expect-shell-connection (timeout 00:02:41) [common]
10976 23:12:15.309730  Setting prompt string to ['/ #']
10977 23:12:15.309831  Forcing a shell prompt, looking for ['/ #']
10979 23:12:15.360088  / # 

10980 23:12:15.360250  expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
10981 23:12:15.360372  Waiting using forced prompt support (timeout 00:02:30)
10982 23:12:15.365840  

10983 23:12:15.366143  end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
10984 23:12:15.366280  start: 2.2.7 export-device-env (timeout 00:02:41) [common]
10985 23:12:15.366417  end: 2.2.7 export-device-env (duration 00:00:00) [common]
10986 23:12:15.366511  end: 2.2 depthcharge-retry (duration 00:02:19) [common]
10987 23:12:15.366624  end: 2 depthcharge-action (duration 00:02:19) [common]
10988 23:12:15.366724  start: 3 lava-test-retry (timeout 00:07:18) [common]
10989 23:12:15.366857  start: 3.1 lava-test-shell (timeout 00:07:18) [common]
10990 23:12:15.366962  Using namespace: common
10992 23:12:15.467305  / # #

10993 23:12:15.467483  lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
10994 23:12:15.472747  #

10995 23:12:15.473061  Using /lava-12395387
10997 23:12:15.573402  / # export SHELL=/bin/sh

10998 23:12:15.579012  export SHELL=/bin/sh

11000 23:12:15.679563  / # . /lava-12395387/environment

11001 23:12:15.686645  . /lava-12395387/environment<6>[   18.867304] mt7921e 0000:01:00.0 wlp1s0: renamed from wlan0

11002 23:12:15.686751  

11004 23:12:15.790878  / # /lava-12395387/bin/lava-test-runner /lava-12395387/0

11005 23:12:15.791040  Test shell timeout: 10s (minimum of the action and connection timeout)
11006 23:12:15.796369  /lava-12395387/bin/lava-test-runner /lava-12395387/0

11007 23:12:15.820090  + export TESTRUN_ID=0_igt-kms-mediatek

11008 23:12:15.830075  + cd /lava-12395387/0/tests/0_igt-kms-medi<8>[   19.005713] <LAVA_SIGNAL_STARTRUN 0_igt-kms-mediatek 12395387_1.5.2.3.1>

11009 23:12:15.830213  atek

11010 23:12:15.830324  + cat uuid

11011 23:12:15.830631  Received signal: <STARTRUN> 0_igt-kms-mediatek 12395387_1.5.2.3.1
11012 23:12:15.830712  Starting test lava.0_igt-kms-mediatek (12395387_1.5.2.3.1)
11013 23:12:15.830804  Skipping test definition patterns.
11014 23:12:15.833098  + UUID=12395387_1.5.2.3.1

11015 23:12:15.833200  + set +x

11016 23:12:15.843195  + IGT_FORCE_DRIVER=mediatek /usr/bin/igt-parser.sh core_a<8>[   19.022789] <LAVA_SIGNAL_TESTSET START core_auth>

11017 23:12:15.843481  Received signal: <TESTSET> START core_auth
11018 23:12:15.843585  Starting test_set core_auth
11019 23:12:15.856300  uth core_getclient core_getstats core_getversion core_setmaster_vs_auth drm_read<14>[   19.035032] [IGT] core_auth: executing

11020 23:12:15.863678   kms_addfb_basic<14>[   19.035261] [IGT] core_auth: starting subtest getclient-simple

11021 23:12:15.870215   kms_atomic kms_<14>[   19.035392] [IGT] core_auth: finished subtest getclient-simple, SUCCESS

11022 23:12:15.876608  <14>[   19.035458] [IGT] core_auth: exiting, ret=0

11023 23:12:15.883065  <8>[   19.040929] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-simple RESULT=pass>

11024 23:12:15.883364  Received signal: <TESTCASE> TEST_CASE_ID=getclient-simple RESULT=pass
11026 23:12:15.889990  flip_event_leak <14>[   19.064185] [IGT] core_auth: executing

11027 23:12:15.896413  kms_prop_blob km<14>[   19.071526] [IGT] core_auth: starting subtest getclient-master-drop

11028 23:12:15.906253  s_setmode kms_vb<14>[   19.077017] [IGT] core_auth: finished subtest getclient-master-drop, SUCCESS

11029 23:12:15.910208  <14>[   19.077077] [IGT] core_auth: exiting, ret=0

11030 23:12:15.910312  lank

11031 23:12:15.923303  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Li<8>[   19.098675] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=getclient-master-drop RESULT=pass>

11032 23:12:15.923411  nux: 6.1.67-cip12-rt7 aarch64)

11033 23:12:15.923688  Received signal: <TESTCASE> TEST_CASE_ID=getclient-master-drop RESULT=pass
11035 23:12:15.929585  Starting subtest<14>[   19.111299] [IGT] core_auth: executing

11036 23:12:15.936187  <14>[   19.111567] [IGT] core_auth: starting subtest basic-auth

11037 23:12:15.942872  <14>[   19.111664] [IGT] core_auth: finished subtest basic-auth, SUCCESS

11038 23:12:15.946311  <14>[   19.111704] [IGT] core_auth: exiting, ret=0

11039 23:12:15.952704  <8>[   19.116355] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-auth RESULT=pass>

11040 23:12:15.952981  Received signal: <TESTCASE> TEST_CASE_ID=basic-auth RESULT=pass
11042 23:12:15.955885  <14>[   19.130681] [IGT] core_auth: executing

11043 23:12:15.959359  : getclient-simple

11044 23:12:15.966358  Opened device: /dev/dri/card<14>[   19.146048] [IGT] core_auth: starting subtest many-magics

11045 23:12:15.969317  0

11046 23:12:15.972268  Subtest getclient-simple: SUCCESS (0.000s)

11047 23:12:15.982208  IGT-Version: 1.27.1-g621c<14>[   19.158048] [IGT] core_auth: finished subtest many-magics, SUCCESS

11048 23:12:15.985893  2d3 (aarch64) (L<14>[   19.158103] [IGT] core_auth: exiting, ret=0

11049 23:12:15.992675  <8>[   19.163000] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=many-magics RESULT=pass>

11050 23:12:15.992957  Received signal: <TESTCASE> TEST_CASE_ID=many-magics RESULT=pass
11052 23:12:15.999172  <8>[   19.164101] <LAVA_SIGNAL_TESTSET STOP>

11053 23:12:15.999466  Received signal: <TESTSET> STOP
11054 23:12:15.999572  Closing test_set core_auth
11055 23:12:16.002284  inux: 6.1.67-cip12-rt7 aarch64)

11056 23:12:16.005830  Starting subtes<14>[   19.187794] [IGT] core_getclient: executing

11057 23:12:16.012222  t: getclient-mas<14>[   19.188079] [IGT] core_getclient: exiting, ret=0

11058 23:12:16.012327  ter-drop

11059 23:12:16.022472  Opened<8>[   19.192686] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getclient RESULT=pass>

11060 23:12:16.022555   device: /dev/dri/card0

11061 23:12:16.022812  Received signal: <TESTCASE> TEST_CASE_ID=core_getclient RESULT=pass
11063 23:12:16.028884  Subtest getclient-master-drop: SUCCESS (0.000s)

11064 23:12:16.035376  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11065 23:12:16.038316  Opened device: /dev/dri/card0

11066 23:12:16.038463  Starting subtest: basic-auth

11067 23:12:16.045368  Subtest basic-auth:<14>[   19.226830] [IGT] core_getstats: executing

11068 23:12:16.051974   SUCCESS (0.000s<14>[   19.227122] [IGT] core_getstats: exiting, ret=0

11069 23:12:16.058612  <8>[   19.232148] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getstats RESULT=pass>

11070 23:12:16.058893  Received signal: <TESTCASE> TEST_CASE_ID=core_getstats RESULT=pass
11072 23:12:16.062019  )

11073 23:12:16.068250  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11074 23:12:16.068351  Opened device: /dev/dri/card0

11075 23:12:16.071497  Starting subtest: many-magics

11076 23:12:16.075329  Reopening device failed after 1020 opens

11077 23:12:16.081692  Subtest many-magics: SUCCESS (0.012s)

11078 23:12:16.088585  IGT-Version: 1.27.1-g621<14>[   19.269067] [IGT] core_getversion: executing

11079 23:12:16.092171  <14>[   19.269544] [IGT] core_getversion: exiting, ret=0

11080 23:12:16.095516  c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11081 23:12:16.098530  Opened device: /dev/dri/card0

11082 23:12:16.101614  SUCCESS (0.000s)

11083 23:12:16.111831  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-r<8>[   19.290753] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_getversion RESULT=pass>

11084 23:12:16.112116  Received signal: <TESTCASE> TEST_CASE_ID=core_getversion RESULT=pass
11086 23:12:16.114798  t7 aarch64)

11087 23:12:16.118813  Opened device: /dev/dri/card0

11088 23:12:16.118890  SUCCESS (0.000s)

11089 23:12:16.125389  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11090 23:12:16.127964  Opened device: /dev/dri/card0

11091 23:12:16.128075  SUCCESS (0.000s)

11092 23:12:16.153089  IGT-Version: 1.2<14>[   19.336353] [IGT] core_setmaster_vs_auth: executing

11093 23:12:16.159571  <14>[   19.336827] [IGT] core_setmaster_vs_auth: exiting, ret=0

11094 23:12:16.166532  Received signal: <TESTCASE> TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass
11096 23:12:16.169536  <8>[   19.342462] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=core_setmaster_vs_auth RESULT=pass>

11097 23:12:16.172958  7.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11098 23:12:16.176212  Opened device: /dev/dri/card0

11099 23:12:16.176307  SUCCESS (0.000s)

11100 23:12:16.186536  <8>[   19.368002] <LAVA_SIGNAL_TESTSET START drm_read>

11101 23:12:16.186818  Received signal: <TESTSET> START drm_read
11102 23:12:16.186966  Starting test_set drm_read
11103 23:12:16.197653  IGT-Version: 1.2<14>[   19.380378] [IGT] drm_read: executing

11104 23:12:16.200883  <14>[   19.380823] [IGT] drm_read: exiting, ret=77

11105 23:12:16.210736  <8>[   19.385570] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-buffer RESULT=skip>

11106 23:12:16.211020  Received signal: <TESTCASE> TEST_CASE_ID=invalid-buffer RESULT=skip
11108 23:12:16.213579  7.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11109 23:12:16.216887  Opened<14>[   19.397609] [IGT] drm_read: executing

11110 23:12:16.223529   device: /dev/dr<14>[   19.398043] [IGT] drm_read: exiting, ret=77

11111 23:12:16.230205  <8>[   19.402292] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=fault-buffer RESULT=skip>

11112 23:12:16.230461  Received signal: <TESTCASE> TEST_CASE_ID=fault-buffer RESULT=skip
11114 23:12:16.233873  i/card0

11115 23:12:16.236861  No KMS driver or no outputs, pipes: 8, outputs: 0

11116 23:12:16.243324  Subtest invalid-<14>[   19.423951] [IGT] drm_read: executing

11117 23:12:16.246759  <14>[   19.424579] [IGT] drm_read: exiting, ret=77

11118 23:12:16.253727  <8>[   19.430435] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-block RESULT=skip>

11119 23:12:16.254017  Received signal: <TESTCASE> TEST_CASE_ID=empty-block RESULT=skip
11121 23:12:16.256818  buffer: SKIP (0.000s)

11122 23:12:16.263274  IGT-Version: 1.27.1-g<14>[   19.442784] [IGT] drm_read: executing

11123 23:12:16.266686  <14>[   19.443183] [IGT] drm_read: exiting, ret=77

11124 23:12:16.273057  <8>[   19.448367] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=empty-nonblock RESULT=skip>

11125 23:12:16.273306  Received signal: <TESTCASE> TEST_CASE_ID=empty-nonblock RESULT=skip
11127 23:12:16.283217  621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch<14>[   19.462307] [IGT] drm_read: executing

11128 23:12:16.286889  <14>[   19.462756] [IGT] drm_read: exiting, ret=77

11129 23:12:16.292988  <8>[   19.467217] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-block RESULT=skip>

11130 23:12:16.293069  64)

11131 23:12:16.293307  Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-block RESULT=skip
11133 23:12:16.296795  Opened device: /dev/dri/card0

11134 23:12:16.303362  No KMS drive<14>[   19.482572] [IGT] drm_read: executing

11135 23:12:16.306391  <14>[   19.483004] [IGT] drm_read: exiting, ret=77

11136 23:12:16.313644  <8>[   19.489462] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-nonblock RESULT=skip>

11137 23:12:16.313893  Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-nonblock RESULT=skip
11139 23:12:16.319815  r or no outputs, pipes: 8, outpu<14>[   19.503078] [IGT] drm_read: executing

11140 23:12:16.326645  <14>[   19.503504] [IGT] drm_read: exiting, ret=77

11141 23:12:16.332710  <8>[   19.510182] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=short-buffer-wakeup RESULT=skip>

11142 23:12:16.332968  Received signal: <TESTCASE> TEST_CASE_ID=short-buffer-wakeup RESULT=skip
11144 23:12:16.336440  <8>[   19.511794] <LAVA_SIGNAL_TESTSET STOP>

11145 23:12:16.336687  Received signal: <TESTSET> STOP
11146 23:12:16.336760  Closing test_set drm_read
11147 23:12:16.339747  ts: 0

11148 23:12:16.343803  Subtest fault-buffer: SKIP (0.000s)

11149 23:12:16.349446  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11150 23:12:16.349522  Opened device: /dev/dri/card0

11151 23:12:16.356046  No KMS driver or no outputs, pipes: 8, outputs: 0

11152 23:12:16.362845  Subtest empty-block: SKIP (0<8>[   19.541816] <LAVA_SIGNAL_TESTSET START kms_addfb_basic>

11153 23:12:16.363098  Received signal: <TESTSET> START kms_addfb_basic
11154 23:12:16.363168  Starting test_set kms_addfb_basic
11155 23:12:16.366349  .000s)

11156 23:12:16.369267  IGT-Version: 1.27.1-<14>[   19.553610] [IGT] kms_addfb_basic: executing

11157 23:12:16.376345  g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11158 23:12:16.386174  Opened device: /dev/dri/ca<14>[   19.564063] [IGT] kms_addfb_basic: starting subtest unused-handle

11159 23:12:16.392621  <14>[   19.564150] [IGT] kms_addfb_basic: finished subtest unused-handle, SUCCESS

11160 23:12:16.392706  rd0

11161 23:12:16.399364  No KMS driv<14>[   19.580600] [IGT] kms_addfb_basic: exiting, ret=0

11162 23:12:16.406193  <8>[   19.586470] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-handle RESULT=pass>

11163 23:12:16.406424  Received signal: <TESTCASE> TEST_CASE_ID=unused-handle RESULT=pass
11165 23:12:16.409513  er or no outputs, pipes: 8, outputs: 0

11166 23:12:16.412506  Subt<14>[   19.596908] [IGT] kms_addfb_basic: executing

11167 23:12:16.419396  <14>[   19.601333] [IGT] kms_addfb_basic: starting subtest unused-pitches

11168 23:12:16.428955  est empty-nonblo<14>[   19.609410] [IGT] kms_addfb_basic: finished subtest unused-pitches, SUCCESS

11169 23:12:16.432430  ck: SKIP (0.000s)

11170 23:12:16.439355  IGT-Version: 1.27.1-g621c<14>[   19.618285] [IGT] kms_addfb_basic: exiting, ret=0

11171 23:12:16.445473  <8>[   19.623930] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-pitches RESULT=pass>

11172 23:12:16.445731  Received signal: <TESTCASE> TEST_CASE_ID=unused-pitches RESULT=pass
11174 23:12:16.449592  2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11175 23:12:16.455662  <14>[   19.634893] [IGT] kms_addfb_basic: executing

11176 23:12:16.462746  <14>[   19.639170] [IGT] kms_addfb_basic: starting subtest unused-offsets

11177 23:12:16.462829  

11178 23:12:16.465349  Opened device: /dev/dri/card0

11179 23:12:16.472271  No KMS driver or<14>[   19.649895] [IGT] kms_addfb_basic: finished subtest unused-offsets, SUCCESS

11180 23:12:16.475740   no outputs, pipes: 8, outputs: 0

11181 23:12:16.482211  Subtest short-buffer-bloc<14>[   19.661707] [IGT] kms_addfb_basic: exiting, ret=0

11182 23:12:16.492077  <8>[   19.667476] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-offsets RESULT=pass>

11183 23:12:16.492163  k: SKIP (0.000s)

11184 23:12:16.492404  Received signal: <TESTCASE> TEST_CASE_ID=unused-offsets RESULT=pass
11186 23:12:16.498727  IGT-Versio<14>[   19.679320] [IGT] kms_addfb_basic: executing

11187 23:12:16.505107  <14>[   19.683576] [IGT] kms_addfb_basic: starting subtest unused-modifier

11188 23:12:16.512088  n: 1.27.1-g621c2<14>[   19.693397] [IGT] kms_addfb_basic: finished subtest unused-modifier, SUCCESS

11189 23:12:16.518463  d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11190 23:12:16.521601  <14>[   19.702326] [IGT] kms_addfb_basic: exiting, ret=0

11191 23:12:16.529062  <8>[   19.709126] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=unused-modifier RESULT=pass>

11192 23:12:16.529319  Received signal: <TESTCASE> TEST_CASE_ID=unused-modifier RESULT=pass
11194 23:12:16.531468  Opened device: /dev/dri/card0

11195 23:12:16.538829  No KMS driver or <14>[   19.719602] [IGT] kms_addfb_basic: executing

11196 23:12:16.544957  <14>[   19.723876] [IGT] kms_addfb_basic: starting subtest clobberred-modifier

11197 23:12:16.548204  no outputs, pipes: 8, outputs: 0

11198 23:12:16.558660  Subtest sh<14>[   19.734514] [IGT] kms_addfb_basic: finished subtest clobberred-modifier, SKIP

11199 23:12:16.561484  ort-buffer-nonblock: SKIP (0.000s)

11200 23:12:16.568621  IGT-Vers<14>[   19.746438] [IGT] kms_addfb_basic: exiting, ret=77

11201 23:12:16.574597  <8>[   19.751817] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clobberred-modifier RESULT=skip>

11202 23:12:16.574855  Received signal: <TESTCASE> TEST_CASE_ID=clobberred-modifier RESULT=skip
11204 23:12:16.581582  ion: 1.27.1-g621c2d3 (aarch64) (<14>[   19.763199] [IGT] kms_addfb_basic: executing

11205 23:12:16.588041  <14>[   19.767456] [IGT] kms_addfb_basic: starting subtest invalid-smem-bo-on-discrete

11206 23:12:16.591504  Linux: 6.1.67-cip12-rt7 aarch64)

11207 23:12:16.601220  Opened device:<14>[   19.778362] [IGT] kms_addfb_basic: finished subtest invalid-smem-bo-on-discrete, SKIP

11208 23:12:16.604718   /dev/dri/card0

11209 23:12:16.611440  No KMS driver or no outputs, pi<14>[   19.790842] [IGT] kms_addfb_basic: exiting, ret=77

11210 23:12:16.621248  pes: 8, outputs:<8>[   19.796351] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip>

11211 23:12:16.621331   0

11212 23:12:16.621572  Received signal: <TESTCASE> TEST_CASE_ID=invalid-smem-bo-on-discrete RESULT=skip
11214 23:12:16.624096  Subtest short-buffer-wakeup: SKIP (0.000s)

11215 23:12:16.631590  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11216 23:12:16.637463  Opened device:<14>[   19.818882] [IGT] kms_addfb_basic: executing

11217 23:12:16.640936   /dev/dri/card0

11218 23:12:16.648148  <14>[   19.823354] [IGT] kms_addfb_basic: starting subtest legacy-format

11219 23:12:16.648230  

11220 23:12:16.648295  Starting subtest: unused-handle

11221 23:12:16.654556  Subtest unused-handle: SUCCESS (0.000s)

11222 23:12:16.661631  Test requirem<14>[   19.840203] [IGT] kms_addfb_basic: finished subtest legacy-format, SUCCESS

11223 23:12:16.670752  ent not met in function igt_require_i915, file .<14>[   19.850351] [IGT] kms_addfb_basic: exiting, ret=0

11224 23:12:16.677624  <8>[   19.855741] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=legacy-format RESULT=pass>

11225 23:12:16.677879  Received signal: <TESTCASE> TEST_CASE_ID=legacy-format RESULT=pass
11227 23:12:16.681739  ./lib/drmtest.c:720:

11228 23:12:16.687642  Test requirement: is_i915_<14>[   19.866566] [IGT] kms_addfb_basic: executing

11229 23:12:16.694478  <14>[   19.872857] [IGT] kms_addfb_basic: starting subtest no-handle

11230 23:12:16.694560  device(fd)

11231 23:12:16.700888  Test<14>[   19.881477] [IGT] kms_addfb_basic: finished subtest no-handle, SUCCESS

11232 23:12:16.710446   requirement not met in function igt_require_i91<14>[   19.890000] [IGT] kms_addfb_basic: exiting, ret=0

11233 23:12:16.717501  <8>[   19.895373] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=no-handle RESULT=pass>

11234 23:12:16.717764  Received signal: <TESTCASE> TEST_CASE_ID=no-handle RESULT=pass
11236 23:12:16.720386  5, file ../lib/drmtest.c:720:

11237 23:12:16.727199  Test requirement:<14>[   19.905826] [IGT] kms_addfb_basic: executing

11238 23:12:16.730372  <14>[   19.912167] [IGT] kms_addfb_basic: starting subtest basic

11239 23:12:16.740710   is_i915_device(<14>[   19.920428] [IGT] kms_addfb_basic: finished subtest basic, SUCCESS

11240 23:12:16.740798  fd)

11241 23:12:16.743653  No KMS driver or no outputs, pipes: 8, outputs: 0

11242 23:12:16.750686  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11243 23:12:16.754516  Opened device: /dev/dri/card0

11244 23:12:16.756921  Starting subtest: unused-pitches

11245 23:12:16.760324  Subtest unused-pitches: SUCCESS (0.000s)

11246 23:12:16.767043  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11247 23:12:16.770330  Test requirement: is_i915_device(fd)

11248 23:12:16.780171  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11249 23:12:16.784066  Test requirement: is_i915_device(fd)

11250 23:12:16.786969  No KMS driver or no outputs, pipes: 8, outputs: 0

11251 23:12:16.794042  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11252 23:12:16.797001  Opened device: /dev/dri/card0

11253 23:12:16.797085  Starting subtest: unused-offsets

11254 23:12:16.803492  Subtest unused-offsets: SUCCESS (0.000s)

11255 23:12:16.810269  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11256 23:12:16.813532  Test requirement: is_i915_device(fd)

11257 23:12:16.820257  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11258 23:12:16.823629  Test requirement: is_i915_device(fd)

11259 23:12:16.826832  No KMS driver or no outputs, pipes: 8, outputs: 0

11260 23:12:16.833610  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11261 23:12:16.836592  Opened device: /dev/dri/card0

11262 23:12:16.839909  Starting subtest: unused-modifier

11263 23:12:16.843548  Subtest unused-modifier: SUCCESS (0.000s)

11264 23:12:16.853276  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11265 23:12:16.856488  Test requirement: is_i915_device(fd)

11266 23:12:16.863295  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11267 23:12:16.866579  Test requirement: is_i915_device(fd)

11268 23:12:16.870148  No KMS driver or no outputs, pipes: 8, outputs: 0

11269 23:12:16.876345  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11270 23:12:16.880090  Opened device: /dev/dri/card0

11271 23:12:16.883613  Starting subtest: clobberred-modifier

11272 23:12:16.890082  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11273 23:12:16.893394  Test requirement: is_i915_device(fd)

11274 23:12:16.896332  Subtest clobberred-modifier: SKIP (0.000s)

11275 23:12:16.906777  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11276 23:12:16.909711  Test requirement: is_i915_device(fd)

11277 23:12:16.916414  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11278 23:12:16.919691  Test requirement: is_i915_device(fd)

11279 23:12:16.923131  No KMS driver or no outputs, pipes: 8, outputs: 0

11280 23:12:16.929731  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11281 23:12:16.933261  Opened device: /dev/dri/card0

11282 23:12:16.936720  Starting subtest: invalid-smem-bo-on-discrete

11283 23:12:16.943564  Test requirement not met in function igt_require_intel, file ../lib/drmtest.c:715:

11284 23:12:16.946392  Test requirement: is_intel_device(fd)

11285 23:12:16.952924  Subtest invalid-smem-bo-on-discrete: SKIP (0.008s)

11286 23:12:16.959247  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11287 23:12:16.962534  Test requirement: is_i915_device(fd)

11288 23:12:16.969443  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11289 23:12:16.972585  Test requirement: is_i915_device(fd)

11290 23:12:16.979122  No KMS driver or no outputs, pipes: 8, outputs: 0

11291 23:12:16.982897  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11292 23:12:16.986236  Opened device: /dev/dri/card0

11293 23:12:16.989275  Starting subtest: legacy-format

11294 23:12:16.992507  Successfully fuzzed 10000 {bpp, depth} variations

11295 23:12:16.999010  Subtest legacy-format: SUCCESS (0.005s)

11296 23:12:17.005858  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11297 23:12:17.009389  Test requirement: is_i915_device(fd)

11298 23:12:17.015616  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11299 23:12:17.019148  Test requirement: is_i915_device(fd)

11300 23:12:17.022493  No KMS driver or no outputs, pipes: 8, outputs: 0

11301 23:12:17.029212  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11302 23:12:17.032069  Opened device: /dev/dri/card0

11303 23:12:17.035644  Starting subtest: no-handle

11304 23:12:17.039020  Subtest no-handle: SUCCESS (0.000s)

11305 23:12:17.045555  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11306 23:12:17.048990  Test requirement: is_i915_device(fd)

11307 23:12:17.055500  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11308 23:12:17.059090  Test requirement: is_i915_device(fd)

11309 23:12:17.065580  No KMS driver or no outputs, pipes: 8, outputs: 0

11310 23:12:17.071856  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11311 23:12:17.075407  Opened device: /dev/dri/card0

11312 23:12:17.075514  Starting subtest: basic

11313 23:12:17.081969  Subtest b<14>[   20.261876] [IGT] kms_addfb_basic: exiting, ret=0

11314 23:12:17.088923  <8>[   20.268197] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>

11315 23:12:17.089188  Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
11317 23:12:17.092294  asic: SUCCESS (0.000s)

11318 23:12:17.098807  Test requirement not met in function<14>[   20.280674] [IGT] kms_addfb_basic: executing

11319 23:12:17.105101  <14>[   20.287006] [IGT] kms_addfb_basic: starting subtest bad-pitch-0

11320 23:12:17.109356   igt_require_i915, file ../lib/drmtest.c:720:

11321 23:12:17.115269  T<14>[   20.293740] [IGT] kms_addfb_basic: finished subtest bad-pitch-0, SUCCESS

11322 23:12:17.121805  est requirement:<14>[   20.305304] [IGT] kms_addfb_basic: exiting, ret=0

11323 23:12:17.128708  <8>[   20.310475] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-0 RESULT=pass>

11324 23:12:17.128964  Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-0 RESULT=pass
11326 23:12:17.132253   is_i915_device(fd)

11327 23:12:17.141436  Test requirement not met in function igt_require_i915, file ../lib/drmtest.<14>[   20.322993] [IGT] kms_addfb_basic: executing

11328 23:12:17.148486  <14>[   20.329539] [IGT] kms_addfb_basic: starting subtest bad-pitch-32

11329 23:12:17.148567  c:720:

11330 23:12:17.152252  Test requirement: is_i915_device(fd)

11331 23:12:17.161881  No<14>[   20.337766] [IGT] kms_addfb_basic: finished subtest bad-pitch-32, SUCCESS

11332 23:12:17.168095   KMS driver or n<14>[   20.349462] [IGT] kms_addfb_basic: exiting, ret=0

11333 23:12:17.168177  o outputs, pipes: 8, outputs: 0

11334 23:12:17.181504  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: <8>[   20.360765] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-32 RESULT=pass>

11335 23:12:17.181760  Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-32 RESULT=pass
11337 23:12:17.185533  6.1.67-cip12-rt7 aarch64)

11338 23:12:17.188153  Opened device: /dev/d<14>[   20.373456] [IGT] kms_addfb_basic: executing

11339 23:12:17.191525  ri/card0

11340 23:12:17.194986  Starting subtest: bad-pitch-0

11341 23:12:17.198365  Subtest bad-pitch-0: SUCCESS (0.000s)

11342 23:12:17.204447  Test req<14>[   20.384654] [IGT] kms_addfb_basic: starting subtest bad-pitch-63

11343 23:12:17.211570  <14>[   20.384778] [IGT] kms_addfb_basic: finished subtest bad-pitch-63, SUCCESS

11344 23:12:17.217946  uirement not met<14>[   20.400524] [IGT] kms_addfb_basic: exiting, ret=0

11345 23:12:17.224569  <8>[   20.405825] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-63 RESULT=pass>

11346 23:12:17.224823  Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-63 RESULT=pass
11348 23:12:17.234602   in function igt_require_i915, file ../lib/drmte<14>[   20.417241] [IGT] kms_addfb_basic: executing

11349 23:12:17.234686  st.c:720:

11350 23:12:17.237999  Test requirement: is_i915_device(fd)

11351 23:12:17.244686  <14>[   20.423845] [IGT] kms_addfb_basic: starting subtest bad-pitch-128

11352 23:12:17.251094  <14>[   20.423945] [IGT] kms_addfb_basic: finished subtest bad-pitch-128, SUCCESS

11353 23:12:17.251174  

11354 23:12:17.258004  Test requiremen<14>[   20.440726] [IGT] kms_addfb_basic: exiting, ret=0

11355 23:12:17.264589  <8>[   20.446314] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-128 RESULT=pass>

11356 23:12:17.264843  Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-128 RESULT=pass
11358 23:12:17.272179  t not met in function igt_require_i915, file ../lib/drmtest.c:720:

11359 23:12:17.277802  Test requirement: is_i915_de<14>[   20.457802] [IGT] kms_addfb_basic: executing

11360 23:12:17.284468  <14>[   20.464235] [IGT] kms_addfb_basic: starting subtest bad-pitch-256

11361 23:12:17.284550  vice(fd)

11362 23:12:17.298335  No KMS driver or no outputs, pipes: 8,<14>[   20.473597] [IGT] kms_addfb_basic: finished subtest bad-pitch-256, SUCCESS

11363 23:12:17.298478   outputs: 0

11364 23:12:17.301184  IGT<14>[   20.485382] [IGT] kms_addfb_basic: exiting, ret=0

11365 23:12:17.311345  <8>[   20.490190] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-256 RESULT=pass>

11366 23:12:17.311605  Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-256 RESULT=pass
11368 23:12:17.314796  -Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11369 23:12:17.317877  Opened device: /dev/dri/card0

11370 23:12:17.321565  Starting subtest: bad-pitch-32

11371 23:12:17.331589  Subtest bad-pitch-32: SUCCESS (0.000s)<14>[   20.512938] [IGT] kms_addfb_basic: executing

11372 23:12:17.331675  

11373 23:12:17.341299  Test requirement not met in function igt_r<14>[   20.520091] [IGT] kms_addfb_basic: starting subtest bad-pitch-1024

11374 23:12:17.348360  <14>[   20.520204] [IGT] kms_addfb_basic: finished subtest bad-pitch-1024, SUCCESS

11375 23:12:17.354866  equire_i915, fil<14>[   20.536683] [IGT] kms_addfb_basic: exiting, ret=0

11376 23:12:17.358335  e ../lib/drmtest.c:720:

11377 23:12:17.364398  Test re<8>[   20.544442] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-1024 RESULT=pass>

11378 23:12:17.364660  Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-1024 RESULT=pass
11380 23:12:17.367983  quirement: is_i915_device(fd)

11381 23:12:17.374748  Test requirement not met in funct<14>[   20.555907] [IGT] kms_addfb_basic: executing

11382 23:12:17.381556  <14>[   20.562631] [IGT] kms_addfb_basic: starting subtest bad-pitch-999

11383 23:12:17.391125  ion igt_require_i915, file ../lib/drmtest.c:720:<14>[   20.569770] [IGT] kms_addfb_basic: finished subtest bad-pitch-999, SUCCESS

11384 23:12:17.391211  

11385 23:12:17.394387  Test requirement: is_i915_device(fd)

11386 23:12:17.404616  No KMS driver or no outp<14>[   20.581569] [IGT] kms_addfb_basic: exiting, ret=0

11387 23:12:17.411236  <8>[   20.587364] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-999 RESULT=pass>

11388 23:12:17.411321  uts, pipes: 8, outputs: 0

11389 23:12:17.411580  Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-999 RESULT=pass
11391 23:12:17.417588  IGT-V<14>[   20.599023] [IGT] kms_addfb_basic: executing

11392 23:12:17.424321  <14>[   20.605590] [IGT] kms_addfb_basic: starting subtest bad-pitch-65536

11393 23:12:17.434311  ersion: 1.27.1-g<14>[   20.613055] [IGT] kms_addfb_basic: finished subtest bad-pitch-65536, SUCCESS

11394 23:12:17.441256  621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch<14>[   20.622049] [IGT] kms_addfb_basic: exiting, ret=0

11395 23:12:17.450902  <8>[   20.628218] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bad-pitch-65536 RESULT=pass>

11396 23:12:17.450981  64)

11397 23:12:17.451218  Received signal: <TESTCASE> TEST_CASE_ID=bad-pitch-65536 RESULT=pass
11399 23:12:17.454135  Opened device: /dev/dri/card0

11400 23:12:17.457889  Starting sub<14>[   20.639610] [IGT] kms_addfb_basic: executing

11401 23:12:17.461365  test: bad-pitch-63

11402 23:12:17.467490  Subtest <14>[   20.647971] [IGT] kms_addfb_basic: starting subtest invalid-get-prop-any

11403 23:12:17.477578  <14>[   20.648083] [IGT] kms_addfb_basic: finished subtest invalid-get-prop-any, SUCCESS

11404 23:12:17.484143  bad-pitch-63: SU<14>[   20.665125] [IGT] kms_addfb_basic: exiting, ret=0

11405 23:12:17.491255  <8>[   20.670448] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>

11406 23:12:17.491360  CCESS (0.000s)

11407 23:12:17.491622  Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
11409 23:12:17.498352  Test require<14>[   20.680960] [IGT] kms_addfb_basic: executing

11410 23:12:17.507883  ment not met in function igt_require_i915, file <14>[   20.689159] [IGT] kms_addfb_basic: starting subtest invalid-get-prop

11411 23:12:17.517440  <14>[   20.689243] [IGT] kms_addfb_basic: finished subtest invalid-get-prop, SUCCESS

11412 23:12:17.524261  ../lib/drmtest.c<14>[   20.705091] [IGT] kms_addfb_basic: exiting, ret=0

11413 23:12:17.531088  <8>[   20.710530] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>

11414 23:12:17.531169  :720:

11415 23:12:17.531404  Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
11417 23:12:17.534609  Test requirement: is_i915_device(fd)

11418 23:12:17.537850  Tes<14>[   20.720948] [IGT] kms_addfb_basic: executing

11419 23:12:17.547627  t requirement not met in functio<14>[   20.729216] [IGT] kms_addfb_basic: starting subtest invalid-set-prop-any

11420 23:12:17.557982  <14>[   20.729315] [IGT] kms_addfb_basic: finished subtest invalid-set-prop-any, SUCCESS

11421 23:12:17.561278  n igt_require_i915, file ../lib/drmtest.c:720:

11422 23:12:17.567366  Test requirement<14>[   20.745508] [IGT] kms_addfb_basic: exiting, ret=0

11423 23:12:17.573873  <8>[   20.751215] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>

11424 23:12:17.574130  Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
11426 23:12:17.577435  : is_i915_device(fd)

11427 23:12:17.581512  No KMS dri<14>[   20.763775] [IGT] kms_addfb_basic: executing

11428 23:12:17.591125  ver or no outputs, pipes: 8, out<14>[   20.771998] [IGT] kms_addfb_basic: starting subtest invalid-set-prop

11429 23:12:17.594616  puts: 0

11430 23:12:17.597788  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11431 23:12:17.600866  Opened device: /dev/dri/card0

11432 23:12:17.604374  Starting subtest: bad-pitch-128

11433 23:12:17.607909  Subtest bad-pitch-128: SUCCESS (0.000s)

11434 23:12:17.617388  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11435 23:12:17.620987  Test requirement: is_i915_device(fd)

11436 23:12:17.628206  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11437 23:12:17.631051  Test requirement: is_i915_device(fd)

11438 23:12:17.634483  No KMS driver or no outputs, pipes: 8, outputs: 0

11439 23:12:17.641161  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11440 23:12:17.644098  Opened device: /dev/dri/card0

11441 23:12:17.647649  Starting subtest: bad-pitch-256

11442 23:12:17.650752  Subtest bad-pitch-256: SUCCESS (0.000s)

11443 23:12:17.657414  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11444 23:12:17.660729  Test requirement: is_i915_device(fd)

11445 23:12:17.667428  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11446 23:12:17.670722  Test requirement: is_i915_device(fd)

11447 23:12:17.677223  No KMS driver or no outputs, pipes: 8, outputs: 0

11448 23:12:17.684307  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11449 23:12:17.684486  Opened device: /dev/dri/card0

11450 23:12:17.687367  Starting subtest: bad-pitch-1024

11451 23:12:17.694143  Subtest bad-pitch-1024: SUCCESS (0.000s)

11452 23:12:17.700751  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11453 23:12:17.704166  Test requirement: is_i915_device(fd)

11454 23:12:17.710230  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11455 23:12:17.713671  Test requirement: is_i915_device(fd)

11456 23:12:17.717047  No KMS driver or no outputs, pipes: 8, outputs: 0

11457 23:12:17.723527  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11458 23:12:17.726784  Opened device: /dev/dri/card0

11459 23:12:17.730077  Starting subtest: bad-pitch-999

11460 23:12:17.733412  Subtest bad-pitch-999: SUCCESS (0.000s)

11461 23:12:17.740307  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11462 23:12:17.743570  Test requirement: is_i915_device(fd)

11463 23:12:17.753293  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11464 23:12:17.756437  Test requirement: is_i915_device(fd)

11465 23:12:17.760303  No KMS driver or no outputs, pipes: 8, outputs: 0

11466 23:12:17.766660  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11467 23:12:17.769680  Opened device: /dev/dri/card0

11468 23:12:17.773375  Starting subtest: bad-pitch-65536

11469 23:12:17.776560  Subtest bad-pitch-65536: SUCCESS (0.000s)

11470 23:12:17.783269  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11471 23:12:17.786859  Test requirement: is_i915_device(fd)

11472 23:12:17.793166  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11473 23:12:17.796733  Test requirement: is_i915_device(fd)

11474 23:12:17.803470  No KMS driver or no outputs, pipes: 8, outputs: 0

11475 23:12:17.809925  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11476 23:12:17.810007  Opened device: /dev/dri/card0

11477 23:12:17.813048  Starting subtest: invalid-get-prop-any

11478 23:12:17.819758  Subtest invalid-get-prop-any: SUCCESS (0.000s)

11479 23:12:17.825999  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11480 23:12:17.829492  Test requirement: is_i915_device(fd)

11481 23:12:17.836097  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11482 23:12:17.839831  Test requirement: is_i915_device(fd)

11483 23:12:17.846316  No KMS driver or no outputs, pipes: 8, outputs: 0

11484 23:12:17.849341  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11485 23:12:17.852486  Opened device: /dev/dri/card0

11486 23:12:17.855881  Starting subtest: invalid-get-prop

11487 23:12:17.862959  Subtest invalid-get-prop: SUCCESS (0.000s)

11488 23:12:17.869277  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11489 23:12:17.872479  Test requirement: is_i915_device(fd)

11490 23:12:17.879240  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11491 23:12:17.882780  Test requirement: is_i915_device(fd)

11492 23:12:17.886168  No KMS driver or no outputs, pipes: 8, outputs: 0

11493 23:12:17.892513  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11494 23:12:17.895926  Opened device: /dev/dri/card0

11495 23:12:17.899074  Starting subtest: invalid-set-prop-any

11496 23:12:17.902335  Subtest invalid-set-prop-any: SUCCESS (0.000s)

11497 23:12:17.912321  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11498 23:12:17.915713  Test requirement: is_i915_device(fd)

11499 23:12:17.922344  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11500 23:12:17.925572  Test requirement: is_i915_device(fd)

11501 23:12:17.932311  No<14>[   21.111416] [IGT] kms_addfb_basic: finished subtest invalid-set-prop, SUCCESS

11502 23:12:17.935891   KMS driver or no outputs, pipes: 8, outputs: 0

11503 23:12:17.942301  IGT-Version: 1.<14>[   21.121725] [IGT] kms_addfb_basic: exiting, ret=0

11504 23:12:17.949303  Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
11506 23:12:17.952510  <8>[   21.127364] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>

11507 23:12:17.959158  27.1-g621c2d3 (aarch64) (Linux: <14>[   21.139555] [IGT] kms_addfb_basic: executing

11508 23:12:17.962330  6.1.67-cip12-rt7 aarch64)

11509 23:12:17.962471  Opened device: /dev/dri/card0

11510 23:12:17.972661  Starting subtest: inva<14>[   21.149917] [IGT] kms_addfb_basic: starting subtest master-rmfb

11511 23:12:17.979281  <14>[   21.150052] [IGT] kms_addfb_basic: finished subtest master-rmfb, SUCCESS

11512 23:12:17.982090  <14>[   21.152208] [IGT] kms_addfb_basic: exiting, ret=0

11513 23:12:17.988719  Received signal: <TESTCASE> TEST_CASE_ID=master-rmfb RESULT=pass
11515 23:12:17.992063  <8>[   21.157701] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=master-rmfb RESULT=pass>

11516 23:12:17.995344  <14>[   21.172453] [IGT] kms_addfb_basic: executing

11517 23:12:17.995426  lid-set-prop

11518 23:12:18.002376  Subtest invalid-set-prop: SUCCESS (0.000s)

11519 23:12:18.009158  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11520 23:12:18.015151  Test requir<14>[   21.195846] [IGT] kms_addfb_basic: starting subtest addfb25-modifier-no-flag

11521 23:12:18.025669  <14>[   21.195958] [IGT] kms_addfb_basic: finished subtest addfb25-modifier-no-flag, SUCCESS

11522 23:12:18.028511  <14>[   21.196143] [IGT] kms_addfb_basic: exiting, ret=0

11523 23:12:18.038675  <8>[   21.201403] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass>

11524 23:12:18.038934  Received signal: <TESTCASE> TEST_CASE_ID=addfb25-modifier-no-flag RESULT=pass
11526 23:12:18.041724  <14>[   21.213597] [IGT] kms_addfb_basic: executing

11527 23:12:18.045303  ement: is_i915_device(fd)

11528 23:12:18.051924  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11529 23:12:18.055061  Test requirement: is_i915_device(fd)

11530 23:12:18.065143  No KMS driver or no outputs,<14>[   21.243376] [IGT] kms_addfb_basic: starting subtest addfb25-bad-modifier

11531 23:12:18.068404   pipes: 8, outputs: 0

11532 23:12:18.074990  IGT-Version: 1.27.1-g621c<14>[   21.255884] [IGT] kms_addfb_basic: finished subtest addfb25-bad-modifier, FAIL

11533 23:12:18.081655  <14>[   21.256115] [IGT] kms_addfb_basic: exiting, ret=98

11534 23:12:18.088376  <8>[   21.261297] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-bad-modifier RESULT=fail>

11535 23:12:18.088631  Received signal: <TESTCASE> TEST_CASE_ID=addfb25-bad-modifier RESULT=fail
11537 23:12:18.095025  2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11538 23:12:18.095133  Opened device: /dev/dri/card0

11539 23:12:18.101205  Starting subtest<14>[   21.284242] [IGT] kms_addfb_basic: executing

11540 23:12:18.104915  : master-rmfb

11541 23:12:18.108376  Subtest master-rmfb: SUCCESS (0.000s)

11542 23:12:18.118418  Test requirement not met in function igt_require_i915, file ../lib<14>[   21.298230] [IGT] kms_addfb_basic: exiting, ret=77

11543 23:12:18.128403  <8>[   21.305401] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip>

11544 23:12:18.128523  /drmtest.c:720:

11545 23:12:18.128834  Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-mismatch-legacy RESULT=skip
11547 23:12:18.131197  Test requirement: is_i915_device(fd)

11548 23:12:18.138087  Test requ<14>[   21.317707] [IGT] kms_addfb_basic: executing

11549 23:12:18.145092  irement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11550 23:12:18.151535  Test requirement: is_i<14>[   21.330193] [IGT] kms_addfb_basic: exiting, ret=77

11551 23:12:18.158070  <8>[   21.335425] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip>

11552 23:12:18.158351  Received signal: <TESTCASE> TEST_CASE_ID=addfb25-x-tiled-legacy RESULT=skip
11554 23:12:18.161495  915_device(fd)

11555 23:12:18.164623  No KMS driver or<14>[   21.347786] [IGT] kms_addfb_basic: executing

11556 23:12:18.168604   no outputs, pipes: 8, outputs: 0

11557 23:12:18.178019  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux<14>[   21.360496] [IGT] kms_addfb_basic: exiting, ret=77

11558 23:12:18.188206  <8>[   21.367137] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip>

11559 23:12:18.188486  Received signal: <TESTCASE> TEST_CASE_ID=addfb25-framebuffer-vs-set-tiling RESULT=skip
11561 23:12:18.191116  : 6.1.67-cip12-rt7 aarch64)

11562 23:12:18.191214  Opened device: /dev/dri/card0

11563 23:12:18.198344  Star<14>[   21.380023] [IGT] kms_addfb_basic: executing

11564 23:12:18.201325  ting subtest: addfb25-modifier-no-flag

11565 23:12:18.204542  Subtest addfb25-modifier-no-flag: SUCCESS (0.000s)

11566 23:12:18.214363  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11567 23:12:18.217958  Test requirement: is_i915_device(fd)

11568 23:12:18.224749  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11569 23:12:18.227872  Test requirement: is_i915_device(fd)

11570 23:12:18.231033  No KMS driver or no outputs, pipes: 8, outputs: 0

11571 23:12:18.237936  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11572 23:12:18.241667  Opened device: /dev/dri/card0

11573 23:12:18.244552  Starting subtest: addfb25-bad-modifier

11574 23:12:18.253938  (kms_addfb_basic:445) CRITICAL: Test assertion failure function addfb25_tests, file ../tests/kms_addfb_basic.c:662:

11575 23:12:18.270636  (kms_addfb_basic:445) CRITICAL: Failed assertion: igt_ioctl((fd), ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0+8)) | (((0xB8)) << 0) | ((((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)+8)))), (&f)) == -1

11576 23:12:18.277486  (kms_addfb_basic:445) CRITICAL: error: 0 != -1

11577 23:12:18.277567  Stack trace:

11578 23:12:18.281001    #0 ../lib/igt_core.c:1971 __igt_fail_assert()

11579 23:12:18.284264    #1 [<unknown>+0xc6a747e0]

11580 23:12:18.287484    #2 [<unknown>+0xc6a76278]

11581 23:12:18.290508    #3 [<unknown>+0xc6a7167c]

11582 23:12:18.290590    #4 [__libc_start_main+0xe8]

11583 23:12:18.294363    #5 [<unknown>+0xc6a716b4]

11584 23:12:18.297659    #6 [<unknown>+0xc6a716b4]

11585 23:12:18.300934  Subtest addfb25-bad-modifier failed.

11586 23:12:18.301074  **** DEBUG ****

11587 23:12:18.310768  (kms_addfb_basic:445) ioctl_wrappers-DEBUG: Test requirement passed: igt_has_fb_modifiers(fd)

11588 23:12:18.321147  (kms_addfb_basic:445) CRITICAL: Test assertion failure function addfb25_tests, file ../tests/kms_addfb_basic.c:662:

11589 23:12:18.337350  (kms_addfb_basic:445) CRITICAL: Failed assertion: igt_ioctl((fd), ((((2U|1U) << (((0+8)+8)+14)) | ((('d')) << (0+8)) | (((0xB8)) << 0) | ((((sizeof(struct drm_mode_fb_cmd2)))) << ((0+8)+8)))), (&f)) == -1

11590 23:12:18.344125  (kms_addfb_basic:445) CRITICAL: error: 0 != -1

11591 23:12:18.347182  (kms_addfb_basic:445) igt_core-INFO: Stack trace:

11592 23:12:18.353804  (kms_addfb_basic:445) igt_core-INFO:   #0 ../lib/igt_core.c:1971 __igt_fail_assert()

11593 23:12:18.360061  (kms_addfb_basic:445) igt_core-INFO:   #1 [<unknown>+0xc6a747e0]

11594 23:12:18.367370  (kms_addfb_basic:445) igt_core-INFO:   #2 [<unknown>+0xc6a76278]

11595 23:12:18.370365  (kms_addfb_basic:445) igt_core-INFO:   #3 [<unknown>+0xc6a7167c]

11596 23:12:18.376844  (kms_addfb_basic:445) igt_core-INFO:   #4 [__libc_start_main+0xe8]

11597 23:12:18.383359  (kms_addfb_basic:445) igt_core-INFO:   #5 [<unknown>+0xc6a716b4]

11598 23:12:18.390571  (kms_addfb_basic:445) igt_core-INFO:   #6 [<unknown>+0xc6a716b4]

11599 23:12:18.390680  ****  END  ****

11600 23:12:18.393592  Subtest addfb25-bad-modifier: FAIL (0.012s)

11601 23:12:18.403775  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11602 23:12:18.406637  Test requirement: is_i915_device(fd)

11603 23:12:18.413768  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11604 23:12:18.416804  Test requirement: is_i915_device(fd)

11605 23:12:18.420203  No KMS driver or no outputs, pipes: 8, outputs: 0

11606 23:12:18.426945  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11607 23:12:18.429841  Opened device: /dev/dri/card0

11608 23:12:18.437082  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11609 23:12:18.440185  Test requirement: is_i915_device(fd)

11610 23:12:18.446672  Subtest addfb25-x-tiled-mismatch-legacy: SKIP (0.000s)

11611 23:12:18.453744  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11612 23:12:18.456512  Test requirement: is_i915_device(fd)

11613 23:12:18.459506  No KMS driver or no outputs, pipes: 8, outputs: 0

11614 23:12:18.466392  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11615 23:12:18.469428  Opened device: /dev/dri/card0

11616 23:12:18.476055  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11617 23:12:18.479607  Test requirement: is_i915_device(fd)

11618 23:12:18.486309  Subtest addfb25-x-tiled-legacy: SKIP (0.000s)

11619 23:12:18.492878  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11620 23:12:18.496375  Test requirement: is_i915_device(fd)

11621 23:12:18.499608  No KMS driver or no outputs, pipes: 8, outputs: 0

11622 23:12:18.506138  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11623 23:12:18.509287  Opened device: /dev/dri/card0

11624 23:12:18.515996  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11625 23:12:18.519777  Test requirement: is_i915_device(fd)

11626 23:12:18.526482  Subtest addfb25-framebuffer-vs-set-tiling: SKIP (0.000s)

11627 23:12:18.532380  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11628 23:12:18.535909  Test requirement: is_i915_device(fd)

11629 23:12:18.540034  No KMS driver or no outputs, pipes: 8, outputs: 0

11630 23:12:18.546323  IGT-Version: 1.27.1-g6<14>[   21.725731] [IGT] kms_addfb_basic: exiting, ret=77

11631 23:12:18.555877  <8>[   21.731583] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip>

11632 23:12:18.556167  Received signal: <TESTCASE> TEST_CASE_ID=basic-x-tiled-legacy RESULT=skip
11634 23:12:18.562288  21c2d3 (aarch64) (Linux: 6.1.67-<14>[   21.743707] [IGT] kms_addfb_basic: executing

11635 23:12:18.562373  cip12-rt7 aarch64)

11636 23:12:18.566210  Opened device: /dev/dri/card0

11637 23:12:18.576158  Test requirement not met in f<14>[   21.756402] [IGT] kms_addfb_basic: exiting, ret=77

11638 23:12:18.582662  <8>[   21.761995] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip>

11639 23:12:18.582932  Received signal: <TESTCASE> TEST_CASE_ID=framebuffer-vs-set-tiling RESULT=skip
11641 23:12:18.589364  unction igt_require_i915, file .<14>[   21.772990] [IGT] kms_addfb_basic: executing

11642 23:12:18.592657  ./lib/drmtest.c:720:

11643 23:12:18.595838  Test requirement: is_i915_device(fd)

11644 23:12:18.605710  Test requirement not met in function igt_require_i915, file ../lib/d<14>[   21.785787] [IGT] kms_addfb_basic: exiting, ret=77

11645 23:12:18.612436  <8>[   21.791633] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tile-pitch-mismatch RESULT=skip>

11646 23:12:18.612728  Received signal: <TESTCASE> TEST_CASE_ID=tile-pitch-mismatch RESULT=skip
11648 23:12:18.615379  rmtest.c:720:

11649 23:12:18.622281  Test requirement:<14>[   21.803228] [IGT] kms_addfb_basic: executing

11650 23:12:18.622394   is_i915_device(fd)

11651 23:12:18.629202  Subtest basic-x-tiled-legacy: SKIP (0.000s)

11652 23:12:18.635476  No KMS driver or no ou<14>[   21.816133] [IGT] kms_addfb_basic: exiting, ret=77

11653 23:12:18.642449  <8>[   21.821710] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip>

11654 23:12:18.642706  Received signal: <TESTCASE> TEST_CASE_ID=basic-y-tiled-legacy RESULT=skip
11656 23:12:18.645963  tputs, pipes: 8, outputs: 0

11657 23:12:18.655712  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.<14>[   21.834346] [IGT] kms_addfb_basic: executing

11658 23:12:18.655819  67-cip12-rt7 aarch64)

11659 23:12:18.659034  Opened device: /dev/dri/card0

11660 23:12:18.665419  Test requirement not met i<14>[   21.847100] [IGT] kms_addfb_basic: exiting, ret=77

11661 23:12:18.672666  <8>[   21.852726] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=size-max RESULT=skip>

11662 23:12:18.672922  Received signal: <TESTCASE> TEST_CASE_ID=size-max RESULT=skip
11664 23:12:18.678785  n function igt_require_i915, file ../lib/drmtest.c:720:

11665 23:12:18.682278  Test requirement: is_i915_device(fd)

11666 23:12:18.685807  T<14>[   21.865640] [IGT] kms_addfb_basic: executing

11667 23:12:18.699171  est requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:<14>[   21.878484] [IGT] kms_addfb_basic: exiting, ret=77

11668 23:12:18.705911  <8>[   21.883995] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-wide RESULT=skip>

11669 23:12:18.705995  

11670 23:12:18.706235  Received signal: <TESTCASE> TEST_CASE_ID=too-wide RESULT=skip
11672 23:12:18.709152  Test requirement: is_i915_device(fd)

11673 23:12:18.712148  Subt<14>[   21.895928] [IGT] kms_addfb_basic: executing

11674 23:12:18.719520  est framebuffer-vs-set-tiling: SKIP (0.000s)

11675 23:12:18.725750  No KMS driver or no outputs, p<14>[   21.908592] [IGT] kms_addfb_basic: exiting, ret=77

11676 23:12:18.728820  ipes: 8, outputs: 0

11677 23:12:18.735503  IGT-Version: 1.27.1-g621c2d<8>[   21.915429] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=too-high RESULT=skip>

11678 23:12:18.735753  Received signal: <TESTCASE> TEST_CASE_ID=too-high RESULT=skip
11680 23:12:18.741893  3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11681 23:12:18.745435  O<14>[   21.928381] [IGT] kms_addfb_basic: executing

11682 23:12:18.748740  pened device: /dev/dri/card0

11683 23:12:18.759431  Test requirement not met in function igt_require_i915, file ../lib<14>[   21.941262] [IGT] kms_addfb_basic: exiting, ret=77

11684 23:12:18.762246  /drmtest.c:720:

11685 23:12:18.769023  Test requiremen<8>[   21.948325] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small RESULT=skip>

11686 23:12:18.769311  Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small RESULT=skip
11688 23:12:18.772204  t: is_i915_device(fd)

11689 23:12:18.778830  Test requirement not met <14>[   21.960816] [IGT] kms_addfb_basic: executing

11690 23:12:18.782820  in function igt_require_i915, file ../lib/drmtest.c:720:

11691 23:12:18.788743  Test requirement: is_i<14>[   21.973430] [IGT] kms_addfb_basic: exiting, ret=77

11692 23:12:18.792118  915_device(fd)

11693 23:12:18.798757  Subtest tile<8>[   21.980296] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=small-bo RESULT=skip>

11694 23:12:18.799013  Received signal: <TESTCASE> TEST_CASE_ID=small-bo RESULT=skip
11696 23:12:18.802444  -pitch-mismatch: SKIP (0.000s)

11697 23:12:18.808746  No KMS driver or no outputs,<14>[   21.993059] [IGT] kms_addfb_basic: executing

11698 23:12:18.812355   pipes: 8, outputs: 0

11699 23:12:18.818525  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11700 23:12:18.822215  Opened device: /dev/dri/card0

11701 23:12:18.825670  <14>[   22.005887] [IGT] kms_addfb_basic: exiting, ret=77

11702 23:12:18.835116  <8>[   22.012512] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip>

11703 23:12:18.835381  Received signal: <TESTCASE> TEST_CASE_ID=bo-too-small-due-to-tiling RESULT=skip
11705 23:12:18.841961  Test requirement not met in func<14>[   22.024680] [IGT] kms_addfb_basic: executing

11706 23:12:18.845397  tion igt_require_i915, file ../lib/drmtest.c:720:

11707 23:12:18.855249  Test requirement: is_i915_dev<14>[   22.037348] [IGT] kms_addfb_basic: exiting, ret=77

11708 23:12:18.855329  ice(fd)

11709 23:12:18.865399  Test requirement not met in function ig<8>[   22.042967] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip>

11710 23:12:18.865662  Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-legacy RESULT=skip
11712 23:12:18.868977  t_require_i915, file ../lib/drmtest.c:720:

11713 23:12:18.875340  Test<14>[   22.055882] [IGT] kms_addfb_basic: executing

11714 23:12:18.878315   requirement: is_i915_device(fd)

11715 23:12:18.888787  Subtest basic-y-tiled-legacy: SKIP (0.000s<14>[   22.068778] [IGT] kms_addfb_basic: exiting, ret=77

11716 23:12:18.895187  <8>[   22.074641] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip>

11717 23:12:18.895283  )

11718 23:12:18.895529  Received signal: <TESTCASE> TEST_CASE_ID=addfb25-yf-tiled-legacy RESULT=skip
11720 23:12:18.898515  No KMS driver or no outputs, pipes: 8, outputs: 0

11721 23:12:18.905058  IGT-Version: 1.27.1-g6<14>[   22.087261] [IGT] kms_addfb_basic: executing

11722 23:12:18.911463  21c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11723 23:12:18.918542  Opened device: /dev/dri/card<14>[   22.099936] [IGT] kms_addfb_basic: exiting, ret=77

11724 23:12:18.928469  <8>[   22.106776] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip>

11725 23:12:18.928549  0

11726 23:12:18.928788  Received signal: <TESTCASE> TEST_CASE_ID=addfb25-y-tiled-small-legacy RESULT=skip
11728 23:12:18.935064  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11729 23:12:18.938577  Test requirement: is_i915_device(fd)

11730 23:12:18.945833  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11731 23:12:18.948230  T<14>[   22.130344] [IGT] kms_addfb_basic: executing

11732 23:12:18.952014  est requirement: is_i915_device(fd)

11733 23:12:18.958567  No KMS driver or no outputs, pipes: 8, outputs: 0

11734 23:12:18.961594  Subt<14>[   22.144204] [IGT] kms_addfb_basic: exiting, ret=77

11735 23:12:18.971521  est size-max: SK<8>[   22.150401] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=addfb25-4-tiled RESULT=skip>

11736 23:12:18.971773  Received signal: <TESTCASE> TEST_CASE_ID=addfb25-4-tiled RESULT=skip
11738 23:12:18.975420  <8>[   22.151955] <LAVA_SIGNAL_TESTSET STOP>

11739 23:12:18.975699  Received signal: <TESTSET> STOP
11740 23:12:18.975797  Closing test_set kms_addfb_basic
11741 23:12:18.978298  IP (0.000s)

11742 23:12:18.985408  Received signal: <TESTSET> START kms_atomic
11743 23:12:18.985486  Starting test_set kms_atomic
11744 23:12:18.988439  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: <8>[   22.167887] <LAVA_SIGNAL_TESTSET START kms_atomic>

11745 23:12:18.988515  6.1.67-cip12-rt7 aarch64)

11746 23:12:18.991252  Opened device: /dev/dri/card0

11747 23:12:18.998177  Test requirement not m<14>[   22.179852] [IGT] kms_atomic: executing

11748 23:12:19.005052  et in function igt_require_i915, file ../lib/drmtest.c:720:

11749 23:12:19.007724  Test requirement: is_i915_device(fd)

11750 23:12:19.014581  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11751 23:12:19.018044  Test requirement: is_i915_device(fd)

11752 23:12:19.021232  No KMS driver or no outputs, pipes: 8, outputs: 0

11753 23:12:19.024338  Subtest too-wide: SKIP (0.000s)

11754 23:12:19.031334  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11755 23:12:19.034373  Opened device: /dev/dri/card0

11756 23:12:19.040788  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11757 23:12:19.044658  Test requirement: is_i915_device(fd)

11758 23:12:19.050912  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11759 23:12:19.054586  Test requirement: is_i915_device(fd)

11760 23:12:19.060948  No KMS driver or no outputs, pipes: 8, outputs: 0

11761 23:12:19.064844  Subtest too-high: SKIP (0.000s)

11762 23:12:19.071122  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11763 23:12:19.071199  Opened device: /dev/dri/card0

11764 23:12:19.080835  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11765 23:12:19.084114  Test requirement: is_i915_device(fd)

11766 23:12:19.090799  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11767 23:12:19.094444  Test requirement: is_i915_device(fd)

11768 23:12:19.097354  No KMS driver or no outputs, pipes: 8, outputs: 0

11769 23:12:19.100466  Subtest bo-too-small: SKIP (0.000s)

11770 23:12:19.107650  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11771 23:12:19.110786  Opened device: /dev/dri/card0

11772 23:12:19.117280  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11773 23:12:19.120743  Test requirement: is_i915_device(fd)

11774 23:12:19.126887  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11775 23:12:19.130669  Test requirement: is_i915_device(fd)

11776 23:12:19.137448  No KMS driver or no outputs, pipes: 8, outputs: 0

11777 23:12:19.140800  Subtest small-bo: SKIP (0.000s)

11778 23:12:19.147279  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11779 23:12:19.147357  Opened device: /dev/dri/card0

11780 23:12:19.157003  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11781 23:12:19.160177  Test requirement: is_i915_device(fd)

11782 23:12:19.167116  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11783 23:12:19.170691  Test requirement: is_i915_device(fd)

11784 23:12:19.173440  No KMS driver or no outputs, pipes: 8, outputs: 0

11785 23:12:19.180483  Subtest bo-too-small-due-to-tiling: SKIP (0.000s)

11786 23:12:19.187147  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11787 23:12:19.187228  Opened device: /dev/dri/card0

11788 23:12:19.196579  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11789 23:12:19.200384  Test requirement: is_i915_device(fd)

11790 23:12:19.206699  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11791 23:12:19.209894  Test requirement: is_i915_device(fd)

11792 23:12:19.213250  No KMS driver or no outputs, pipes: 8, outputs: 0

11793 23:12:19.220149  Subtest addfb25-y-tiled-legacy: SKIP (0.000s)

11794 23:12:19.223182  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11795 23:12:19.226975  Opened device: /dev/dri/card0

11796 23:12:19.233223  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11797 23:12:19.236790  Test requirement: is_i915_device(fd)

11798 23:12:19.246581  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11799 23:12:19.249669  Test requirement: is_i915_device(fd)

11800 23:12:19.253474  No KMS driver or no outputs, pipes: 8, outputs: 0

11801 23:12:19.256472  Subtest addfb25-yf-tiled-legacy: SKIP (0.000s)

11802 23:12:19.262801  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11803 23:12:19.266302  Opened device: /dev/dri/card0

11804 23:12:19.272861  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11805 23:12:19.276343  Test requirement: is_i915_device(fd)

11806 23:12:19.285610  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11807 23:12:19.289204  Test requirement: is_i915_device(fd)

11808 23:12:19.293026  No KMS driver or no outputs, pipes: 8, outputs: 0

11809 23:12:19.299675  Subtest addfb25-y-tiled-small-legacy: SKIP (0.000s)

11810 23:12:19.302490  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11811 23:12:19.305418  Opened device: /dev/dri/card0

11812 23:12:19.312476  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11813 23:12:19.315770  Test requirement: is_i915_device(fd)

11814 23:12:19.325808  Test requirement not met in function igt_require_i915, file ../lib/drmtest.c:720:

11815 23:12:19.329451  Test requirement: is_i915_device(fd)

11816 23:12:19.335544  No KMS driver or no o<14>[   22.517318] [IGT] kms_atomic: exiting, ret=77

11817 23:12:19.342274  <8>[   22.523020] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-overlay-legacy RESULT=skip>

11818 23:12:19.342551  Received signal: <TESTCASE> TEST_CASE_ID=plane-overlay-legacy RESULT=skip
11820 23:12:19.345631  utputs, pipes: 8, outputs: 0

11821 23:12:19.349541  Subtest addfb25-4-tiled: SKIP (0.000s)

11822 23:12:19.352655  IG<14>[   22.534929] [IGT] kms_atomic: executing

11823 23:12:19.358999  T-Version: 1.27.<14>[   22.535347] [IGT] kms_atomic: exiting, ret=77

11824 23:12:19.365329  <8>[   22.540018] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-legacy RESULT=skip>

11825 23:12:19.365604  Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-legacy RESULT=skip
11827 23:12:19.372817  1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11828 23:12:19.375490  Opened device: /dev/dri/card0

11829 23:12:19.382301  No KMS driver or no outputs, pipes: 8, ou<14>[   22.562618] [IGT] kms_atomic: executing

11830 23:12:19.385564  <14>[   22.563193] [IGT] kms_atomic: exiting, ret=77

11831 23:12:19.395461  <8>[   22.569054] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip>

11832 23:12:19.395545  tputs: 0

11833 23:12:19.395785  Received signal: <TESTCASE> TEST_CASE_ID=plane-primary-overlay-mutable-zpos RESULT=skip
11835 23:12:19.402190  Su<14>[   22.584675] [IGT] kms_atomic: executing

11836 23:12:19.405476  <14>[   22.585116] [IGT] kms_atomic: exiting, ret=77

11837 23:12:19.412141  <8>[   22.591839] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-immutable-zpos RESULT=skip>

11838 23:12:19.412389  Received signal: <TESTCASE> TEST_CASE_ID=plane-immutable-zpos RESULT=skip
11840 23:12:19.418751  btest plane-overlay-legacy: SKIP (0.000s)

11841 23:12:19.421922  I<14>[   22.604065] [IGT] kms_atomic: executing

11842 23:12:19.425692  <14>[   22.604491] [IGT] kms_atomic: exiting, ret=77

11843 23:12:19.432166  <8>[   22.610556] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test-only RESULT=skip>

11844 23:12:19.432431  Received signal: <TESTCASE> TEST_CASE_ID=test-only RESULT=skip
11846 23:12:19.438866  GT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11847 23:12:19.441888  Opened device: /dev/dri/card0

11848 23:12:19.448661  No KMS driver or no outputs, pipes: 8, o<14>[   22.633273] [IGT] kms_atomic: executing

11849 23:12:19.452669  utputs: 0

11850 23:12:19.458151  Subtest plane-pri<14>[   22.639511] [IGT] kms_atomic: exiting, ret=77

11851 23:12:19.465120  <8>[   22.645077] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-cursor-legacy RESULT=skip>

11852 23:12:19.465369  Received signal: <TESTCASE> TEST_CASE_ID=plane-cursor-legacy RESULT=skip
11854 23:12:19.469050  mary-legacy: SKIP (0.000s)

11855 23:12:19.475094  IGT-Version: 1.2<14>[   22.657400] [IGT] kms_atomic: executing

11856 23:12:19.481675  7.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 <14>[   22.662808] [IGT] kms_atomic: exiting, ret=77

11857 23:12:19.488522  Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params RESULT=skip
11859 23:12:19.491519  <8>[   22.668164] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params RESULT=skip>

11860 23:12:19.491598  aarch64)

11861 23:12:19.498309  Opened device: /dev/dr<14>[   22.680569] [IGT] kms_atomic: executing

11862 23:12:19.501656  <14>[   22.680960] [IGT] kms_atomic: exiting, ret=77

11863 23:12:19.508811  Received signal: <TESTCASE> TEST_CASE_ID=plane-invalid-params-fence RESULT=skip
11865 23:12:19.511700  <8>[   22.687777] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=plane-invalid-params-fence RESULT=skip>

11866 23:12:19.511776  i/card0

11867 23:12:19.518438  No KMS driver or no out<14>[   22.700459] [IGT] kms_atomic: executing

11868 23:12:19.521399  <14>[   22.700885] [IGT] kms_atomic: exiting, ret=77

11869 23:12:19.528158  <8>[   22.705567] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params RESULT=skip>

11870 23:12:19.528410  Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params RESULT=skip
11872 23:12:19.531726  puts, pipes: 8, outputs: 0

11873 23:12:19.538131  Subtest plane-pr<14>[   22.718449] [IGT] kms_atomic: executing

11874 23:12:19.541989  <14>[   22.718861] [IGT] kms_atomic: exiting, ret=77

11875 23:12:19.551152  <8>[   22.724462] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip>

11876 23:12:19.551400  Received signal: <TESTCASE> TEST_CASE_ID=crtc-invalid-params-fence RESULT=skip
11878 23:12:19.558538  imary-overlay-mutable-zpos: SKIP<14>[   22.739642] [IGT] kms_atomic: executing

11879 23:12:19.558630   (0.000s)

11880 23:12:19.564566  I<14>[   22.740046] [IGT] kms_atomic: exiting, ret=77

11881 23:12:19.571515  <8>[   22.747243] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic-invalid-params RESULT=skip>

11882 23:12:19.571780  Received signal: <TESTCASE> TEST_CASE_ID=atomic-invalid-params RESULT=skip
11884 23:12:19.577794  GT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11885 23:12:19.581707  Opened device: /dev/dri/card0

11886 23:12:19.584619  No KMS driver or no outputs, pipes: 8, outputs: 0

11887 23:12:19.588256  S<14>[   22.769962] [IGT] kms_atomic: executing

11888 23:12:19.594570  ubtest plane-imm<14>[   22.770583] [IGT] kms_atomic: exiting, ret=77

11889 23:12:19.604674  utable-zpos: SKI<8>[   22.775533] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=atomic_plane_damage RESULT=skip>

11890 23:12:19.604935  Received signal: <TESTCASE> TEST_CASE_ID=atomic_plane_damage RESULT=skip
11892 23:12:19.607944  <8>[   22.777072] <LAVA_SIGNAL_TESTSET STOP>

11893 23:12:19.608195  Received signal: <TESTSET> STOP
11894 23:12:19.608265  Closing test_set kms_atomic
11895 23:12:19.611348  P (0.000s)

11896 23:12:19.618536  IGT-Version: 1.27.1-g621c2d3 (aa<8>[   22.801174] <LAVA_SIGNAL_TESTSET START kms_flip_event_leak>

11897 23:12:19.618787  Received signal: <TESTSET> START kms_flip_event_leak
11898 23:12:19.618857  Starting test_set kms_flip_event_leak
11899 23:12:19.620876  rch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11900 23:12:19.624656  Opened device: /dev/dri/card0

11901 23:12:19.631533  No KMS <14>[   22.811686] [IGT] kms_flip_event_leak: executing

11902 23:12:19.637839  driver or no out<14>[   22.812106] [IGT] kms_flip_event_leak: exiting, ret=77

11903 23:12:19.644533  <8>[   22.819349] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=skip>

11904 23:12:19.644797  Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=skip
11906 23:12:19.648025  <8>[   22.821200] <LAVA_SIGNAL_TESTSET STOP>

11907 23:12:19.648274  Received signal: <TESTSET> STOP
11908 23:12:19.648362  Closing test_set kms_flip_event_leak
11909 23:12:19.654285  <8>[   22.836410] <LAVA_SIGNAL_TESTSET START kms_prop_blob>

11910 23:12:19.654365  puts, pipes: 8, outputs: 0

11911 23:12:19.654660  Received signal: <TESTSET> START kms_prop_blob
11912 23:12:19.654727  Starting test_set kms_prop_blob
11913 23:12:19.657811  Subtest test-only: SKIP (0.000s)

11914 23:12:19.664440  IGT-Version: 1.27.1-g621c2<14>[   22.846998] [IGT] kms_prop_blob: executing

11915 23:12:19.671713  <14>[   22.847278] [IGT] kms_prop_blob: starting subtest basic

11916 23:12:19.677694  <14>[   22.847324] [IGT] kms_prop_blob: finished subtest basic, SUCCESS

11917 23:12:19.684364  <14>[   22.847363] [IGT] kms_prop_blob: exiting, ret=0

11918 23:12:19.688226  <8>[   22.852388] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=pass>

11919 23:12:19.688477  Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=pass
11921 23:12:19.694980  <14>[   22.866896] [IGT] kms_prop_blob: executing

11922 23:12:19.697666  d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

11923 23:12:19.704797  <14>[   22.882701] [IGT] kms_prop_blob: starting subtest blob-prop-core

11924 23:12:19.711351  <14>[   22.882753] [IGT] kms_prop_blob: finished subtest blob-prop-core, SUCCESS

11925 23:12:19.717457  <14>[   22.882794] [IGT] kms_prop_blob: exiting, ret=0

11926 23:12:19.724042  <8>[   22.887863] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-core RESULT=pass>

11927 23:12:19.724292  Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-core RESULT=pass
11929 23:12:19.727713  <14>[   22.900275] [IGT] kms_prop_blob: executing

11930 23:12:19.734156  Opened device: /<14>[   22.916869] [IGT] kms_prop_blob: starting subtest blob-prop-validate

11931 23:12:19.744286  <14>[   22.916973] [IGT] kms_prop_blob: finished subtest blob-prop-validate, SUCCESS

11932 23:12:19.747493  <14>[   22.917016] [IGT] kms_prop_blob: exiting, ret=0

11933 23:12:19.754545  <8>[   22.922446] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-validate RESULT=pass>

11934 23:12:19.754798  Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-validate RESULT=pass
11936 23:12:19.760581  <14>[   22.937198] [IGT] kms_prop_blob: executing

11937 23:12:19.760686  dev/dri/card0

11938 23:12:19.767826  N<14>[   22.949271] [IGT] kms_prop_blob: starting subtest blob-prop-lifetime

11939 23:12:19.777257  <14>[   22.949352] [IGT] kms_prop_blob: finished subtest blob-prop-lifetime, SUCCESS

11940 23:12:19.780747  <14>[   22.949385] [IGT] kms_prop_blob: exiting, ret=0

11941 23:12:19.787846  <8>[   22.954673] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-prop-lifetime RESULT=pass>

11942 23:12:19.788098  Received signal: <TESTCASE> TEST_CASE_ID=blob-prop-lifetime RESULT=pass
11944 23:12:19.794209  o KMS driver or <14>[   22.977086] [IGT] kms_prop_blob: executing

11945 23:12:19.801277  <14>[   22.977364] [IGT] kms_prop_blob: starting subtest blob-multiple

11946 23:12:19.807205  no outputs, pipe<14>[   22.977475] [IGT] kms_prop_blob: finished subtest blob-multiple, SUCCESS

11947 23:12:19.814320  <14>[   22.977551] [IGT] kms_prop_blob: exiting, ret=0

11948 23:12:19.820705  <8>[   22.994576] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blob-multiple RESULT=pass>

11949 23:12:19.820780  s: 8, outputs: 0

11950 23:12:19.821027  Received signal: <TESTCASE> TEST_CASE_ID=blob-multiple RESULT=pass
11952 23:12:19.830385  Subtest plane-cursor-legac<14>[   23.009717] [IGT] kms_prop_blob: executing

11953 23:12:19.837264  <14>[   23.009998] [IGT] kms_prop_blob: starting subtest invalid-get-prop-any

11954 23:12:19.843543  <14>[   23.010047] [IGT] kms_prop_blob: finished subtest invalid-get-prop-any, SUCCESS

11955 23:12:19.846860  <14>[   23.010090] [IGT] kms_prop_blob: exiting, ret=0

11956 23:12:19.857234  <8>[   23.015607] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop-any RESULT=pass>

11957 23:12:19.857520  Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop-any RESULT=pass
11959 23:12:19.860483  <14>[   23.032912] [IGT] kms_prop_blob: executing

11960 23:12:19.863789  y: SKIP (0.000s)

11961 23:12:19.870734  IGT-Version: 1.27.1-g621c2<14>[   23.050021] [IGT] kms_prop_blob: starting subtest invalid-get-prop

11962 23:12:19.880243  <14>[   23.050070] [IGT] kms_prop_blob: finished subtest invalid-get-prop, SUCCESS

11963 23:12:19.883803  <14>[   23.050111] [IGT] kms_prop_blob: exiting, ret=0

11964 23:12:19.890326  <8>[   23.055501] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-get-prop RESULT=pass>

11965 23:12:19.890601  Received signal: <TESTCASE> TEST_CASE_ID=invalid-get-prop RESULT=pass
11967 23:12:19.897359  <14>[   23.067963] [IGT] kms_prop_blob: executing

11968 23:12:19.904136  d3 (aarch64) (Li<14>[   23.084739] [IGT] kms_prop_blob: starting subtest invalid-set-prop-any

11969 23:12:19.910243  <14>[   23.084785] [IGT] kms_prop_blob: finished subtest invalid-set-prop-any, SUCCESS

11970 23:12:19.917284  <14>[   23.084822] [IGT] kms_prop_blob: exiting, ret=0

11971 23:12:19.923752  <8>[   23.089919] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop-any RESULT=pass>

11972 23:12:19.924021  Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop-any RESULT=pass
11974 23:12:19.927466  <14>[   23.100534] [IGT] kms_prop_blob: executing

11975 23:12:19.930235  nux: 6.1.67-cip12-rt7 aarch64)

11976 23:12:19.933759  Opened device: /dev/dri/card0

11977 23:12:19.940366  N<14>[   23.117776] [IGT] kms_prop_blob: starting subtest invalid-set-prop

11978 23:12:19.946742  <14>[   23.117823] [IGT] kms_prop_blob: finished subtest invalid-set-prop, SUCCESS

11979 23:12:19.953558  <14>[   23.117860] [IGT] kms_prop_blob: exiting, ret=0

11980 23:12:19.960024  <8>[   23.122983] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-set-prop RESULT=pass>

11981 23:12:19.960277  Received signal: <TESTCASE> TEST_CASE_ID=invalid-set-prop RESULT=pass
11983 23:12:19.963472  <8>[   23.124188] <LAVA_SIGNAL_TESTSET STOP>

11984 23:12:19.963724  Received signal: <TESTSET> STOP
11985 23:12:19.963792  Closing test_set kms_prop_blob
11986 23:12:19.970194  <8>[   23.138849] <LAVA_SIGNAL_TESTSET START kms_setmode>

11987 23:12:19.970418  Received signal: <TESTSET> START kms_setmode
11988 23:12:19.970489  Starting test_set kms_setmode
11989 23:12:19.973626  <14>[   23.153206] [IGT] kms_setmode: executing

11990 23:12:19.983282  o KMS driver or no outputs, pipes: 8, outputs: 0<14>[   23.162817] [IGT] kms_setmode: starting subtest basic

11991 23:12:19.990806  <14>[   23.162865] [IGT] kms_setmode: finished subtest basic, SKIP

11992 23:12:19.993227  <14>[   23.162911] [IGT] kms_setmode: exiting, ret=77

11993 23:12:20.000513  <8>[   23.169263] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic RESULT=skip>

11994 23:12:20.000785  Received signal: <TESTCASE> TEST_CASE_ID=basic RESULT=skip
11996 23:12:20.003896  <14>[   23.182927] [IGT] kms_setmode: executing

11997 23:12:20.003981  

11998 23:12:20.009909  Subtest plane-invalid-params: SKIP (0.000s)

11999 23:12:20.016848  IGT-Versi<14>[   23.193923] [IGT] kms_setmode: starting subtest basic-clone-single-crtc

12000 23:12:20.023131  <14>[   23.193999] [IGT] kms_setmode: finished subtest basic-clone-single-crtc, SKIP

12001 23:12:20.029648  <14>[   23.194060] [IGT] kms_setmode: exiting, ret=77

12002 23:12:20.036423  <8>[   23.200501] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=basic-clone-single-crtc RESULT=skip>

12003 23:12:20.036711  Received signal: <TESTCASE> TEST_CASE_ID=basic-clone-single-crtc RESULT=skip
12005 23:12:20.039835  <14>[   23.213666] [IGT] kms_setmode: executing

12006 23:12:20.053267  on: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip<14>[   23.230779] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc

12007 23:12:20.060062  <14>[   23.230825] [IGT] kms_setmode: finished subtest invalid-clone-single-crtc, SKIP

12008 23:12:20.066932  <14>[   23.230871] [IGT] kms_setmode: exiting, ret=77

12009 23:12:20.072912  <8>[   23.237056] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip>

12010 23:12:20.073188  Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc RESULT=skip
12012 23:12:20.076151  <14>[   23.249624] [IGT] kms_setmode: executing

12013 23:12:20.079547  12-rt7 aarch64)

12014 23:12:20.082873  Opened device: /dev/dri/card0

12015 23:12:20.089771  <14>[   23.266924] [IGT] kms_setmode: starting subtest invalid-clone-exclusive-crtc

12016 23:12:20.096800  <14>[   23.266971] [IGT] kms_setmode: finished subtest invalid-clone-exclusive-crtc, SKIP

12017 23:12:20.102839  <14>[   23.267020] [IGT] kms_setmode: exiting, ret=77

12018 23:12:20.109827  <8>[   23.272526] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip>

12019 23:12:20.110085  Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-exclusive-crtc RESULT=skip
12021 23:12:20.113384  <14>[   23.286281] [IGT] kms_setmode: executing

12022 23:12:20.122775  No KMS driver or no outputs, pip<14>[   23.303908] [IGT] kms_setmode: starting subtest clone-exclusive-crtc

12023 23:12:20.133470  <14>[   23.303955] [IGT] kms_setmode: finished subtest clone-exclusive-crtc, SKIP

12024 23:12:20.136106  es: 8, outputs: <14>[   23.303998] [IGT] kms_setmode: exiting, ret=77

12025 23:12:20.146103  <8>[   23.308521] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=clone-exclusive-crtc RESULT=skip>

12026 23:12:20.146239  0

12027 23:12:20.146526  Received signal: <TESTCASE> TEST_CASE_ID=clone-exclusive-crtc RESULT=skip
12029 23:12:20.152571  Subtest plane-invalid-params-fence: SKIP <14>[   23.337449] [IGT] kms_setmode: executing

12030 23:12:20.156155  (0.000s)

12031 23:12:20.166136  IGT-Version: 1.27.1-g621c2d3 (aarc<14>[   23.342849] [IGT] kms_setmode: starting subtest invalid-clone-single-crtc-stealing

12032 23:12:20.169350  h64) (Linux: 6.1.67-cip12-rt7 aarch64)

12033 23:12:20.172730  Opened device: /dev/dri/card0

12034 23:12:20.176039  No KMS driver or no outputs, pipes: 8, outputs: 0

12035 23:12:20.179499  Subtest crtc-invalid-params: SKIP (0.000s)

12036 23:12:20.185921  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12037 23:12:20.189445  Opened device: /dev/dri/card0

12038 23:12:20.195904  No KMS driver or no outputs, pipes: 8, outputs: 0

12039 23:12:20.199166  Subtest crtc-invalid-params-fence: SKIP (0.000s)

12040 23:12:20.206132  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12041 23:12:20.209372  Opened device: /dev/dri/card0

12042 23:12:20.213187  No KMS driver or no outputs, pipes: 8, outputs: 0

12043 23:12:20.218954  Subtest atomic-invalid-params: SKIP (0.000s)

12044 23:12:20.222944  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12045 23:12:20.225808  Opened device: /dev/dri/card0

12046 23:12:20.232755  No KMS driver or no outputs, pipes: 8, outputs: 0

12047 23:12:20.235742  Subtest atomic_plane_damage: SKIP (0.000s)

12048 23:12:20.242556  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12049 23:12:20.245979  Opened device: /dev/dri/card0

12050 23:12:20.249457  No KMS driver or no outputs, pipes: 8, outputs: 0

12051 23:12:20.252457  Subtest basic: SKIP (0.000s)

12052 23:12:20.259006  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12053 23:12:20.262572  Opened device: /dev/dri/card0

12054 23:12:20.262655  Starting subtest: basic

12055 23:12:20.265292  Subtest basic: SUCCESS (0.000s)

12056 23:12:20.272135  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12057 23:12:20.275752  Opened device: /dev/dri/card0

12058 23:12:20.278590  Starting subtest: blob-prop-core

12059 23:12:20.282510  Subtest blob-prop-core: SUCCESS (0.000s)

12060 23:12:20.289216  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12061 23:12:20.292169  Opened device: /dev/dri/card0

12062 23:12:20.295459  Starting subtest: blob-prop-validate

12063 23:12:20.302756  Subtest blob-prop-validate: SUCCESS (0.000s)

12064 23:12:20.305368  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12065 23:12:20.308637  Opened device: /dev/dri/card0

12066 23:12:20.312107  Starting subtest: blob-prop-lifetime

12067 23:12:20.318799  Subtest blob-prop-lifetime: SUCCESS (0.000s)

12068 23:12:20.325419  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12069 23:12:20.325507  Opened device: /dev/dri/card0

12070 23:12:20.328667  Starting subtest: blob-multiple

12071 23:12:20.335106  Subtest blob-multiple: SUCCESS (0.000s)

12072 23:12:20.341682  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12073 23:12:20.341772  Opened device: /dev/dri/card0

12074 23:12:20.345612  Starting subtest: invalid-get-prop-any

12075 23:12:20.352185  Subtest invalid-get-prop-any: SUCCESS (0.000s)

12076 23:12:20.358662  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12077 23:12:20.361625  Opened device: /dev/dri/card0

12078 23:12:20.365108  Starting subtest: invalid-get-prop

12079 23:12:20.368601  Subtest invalid-get-prop: SUCCESS (0.000s)

12080 23:12:20.375076  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12081 23:12:20.378171  Opened device: /dev/dri/card0

12082 23:12:20.381620  Starting subtest: invalid-set-prop-any

12083 23:12:20.384962  Subtest invalid-set-prop-any: SUCCESS (0.000s)

12084 23:12:20.391756  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12085 23:12:20.394801  Opened device: /dev/dri/card0

12086 23:12:20.398570  Starting subtest: invalid-set-prop

12087 23:12:20.402253  Subtest invalid-set-prop: SUCCESS (0.000s)

12088 23:12:20.408334  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12089 23:12:20.411571  Opened device: /dev/dri/card0

12090 23:12:20.415238  Starting subtest: basic

12091 23:12:20.415316  No dynamic tests executed.

12092 23:12:20.417930  Subtest basic: SKIP (0.000s)

12093 23:12:20.424930  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12094 23:12:20.428448  Opened device: /dev/dri/card0

12095 23:12:20.431939  Starting subtest: basic-clone-single-crtc

12096 23:12:20.435033  No dynamic tests executed.

12097 23:12:20.438026  Subtest basic-clone-single-crtc: SKIP (0.000s)

12098 23:12:20.444975  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12099 23:12:20.448102  Opened device: /dev/dri/card0

12100 23:12:20.451215  Starting subtest: invalid-clone-single-crtc

12101 23:12:20.454554  No dynamic tests executed.

12102 23:12:20.461472  Subtest invalid-clone-single-crtc: SKIP (0.000s)

12103 23:12:20.468346  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12104 23:12:20.468451  Opened device: /dev/dri/card0

12105 23:12:20.474536  Starting subtest: invalid-clone-exclusive-crtc

12106 23:12:20.474644  No dynamic tests executed.

12107 23:12:20.481171  Subtest invalid-clone-exclusive-crtc: SKIP (0.000s)

12108 23:12:20.487884  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12109 23:12:20.490955  Opened device: /dev/dri/card0

12110 23:12:20.494731  Starting subtest: clone-exclusive-crtc

12111 23:12:20.494816  No dynamic tests executed.

12112 23:12:20.504367  Subtest clon<14>[   23.683943] [IGT] kms_setmode: finished subtest invalid-clone-single-crtc-stealing, SKIP

12113 23:12:20.511370  <14>[   23.684021] [IGT] kms_setmode: exiting, ret=77

12114 23:12:20.518003  Received signal: <TESTCASE> TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip
12116 23:12:20.521337  <8>[   23.690351] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-clone-single-crtc-stealing RESULT=skip>

12117 23:12:20.524587  <8>[   23.691897] <LAVA_SIGNAL_TESTSET STOP>

12118 23:12:20.524872  Received signal: <TESTSET> STOP
12119 23:12:20.524970  Closing test_set kms_setmode
12120 23:12:20.527736  <8>[   23.706369] <LAVA_SIGNAL_TESTSET START kms_vblank>

12121 23:12:20.528029  Received signal: <TESTSET> START kms_vblank
12122 23:12:20.528137  Starting test_set kms_vblank
12123 23:12:20.530997  e-exclusive-crtc: SKIP (0.000s)

12124 23:12:20.537413  IGT-Version<14>[   23.717747] [IGT] kms_vblank: executing

12125 23:12:20.542297  <14>[   23.718218] [IGT] kms_vblank: exiting, ret=77

12126 23:12:20.547501  <8>[   23.723515] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid RESULT=skip>

12127 23:12:20.547781  Received signal: <TESTCASE> TEST_CASE_ID=invalid RESULT=skip
12129 23:12:20.555132  : 1.27.1-g621c2d<14>[   23.737391] [IGT] kms_vblank: executing

12130 23:12:20.561191  3 (aarch64) (Linux: 6.1.67-cip12<14>[   23.743245] [IGT] kms_vblank: exiting, ret=77

12131 23:12:20.567797  <8>[   23.749394] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crtc-id RESULT=skip>

12132 23:12:20.568086  Received signal: <TESTCASE> TEST_CASE_ID=crtc-id RESULT=skip
12134 23:12:20.570764  -rt7 aarch64)

12135 23:12:20.570864  Opened device: /dev/dri/card0

12136 23:12:20.577745  Starting subtest: <14>[   23.760741] [IGT] kms_vblank: executing

12137 23:12:20.581200  <14>[   23.761262] [IGT] kms_vblank: exiting, ret=77

12138 23:12:20.590619  invalid-clone-si<8>[   23.766279] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-accuracy-idle RESULT=skip>

12139 23:12:20.590924  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-accuracy-idle RESULT=skip
12141 23:12:20.593993  ngle-crtc-stealing

12142 23:12:20.597186  No dynamic tests executed.

12143 23:12:20.600351  Subtest invalid-clone-single-crtc-stealing: SKIP (0.000s)

12144 23:12:20.610744  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux<14>[   23.792111] [IGT] kms_vblank: executing

12145 23:12:20.614015  <14>[   23.792973] [IGT] kms_vblank: exiting, ret=77

12146 23:12:20.620740  <8>[   23.798711] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-idle RESULT=skip>

12147 23:12:20.621020  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-idle RESULT=skip
12149 23:12:20.624316  : 6.1.67-cip12-rt7 aarch64)

12150 23:12:20.630658  Opened device: /dev<14>[   23.810725] [IGT] kms_vblank: executing

12151 23:12:20.634552  <14>[   23.811264] [IGT] kms_vblank: exiting, ret=77

12152 23:12:20.643793  <8>[   23.815908] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-idle-hang RESULT=skip>

12153 23:12:20.643925  /dri/card0

12154 23:12:20.644232  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-idle-hang RESULT=skip
12156 23:12:20.646935  No KMS driver or no outputs, pipes: 8, outputs: 0

12157 23:12:20.650958  Subtest invalid: SKIP (0.000s)

12158 23:12:20.656982  IGT-Version: 1.27.1-g621c<14>[   23.840975] [IGT] kms_vblank: executing

12159 23:12:20.663583  2d3 (aarch64) (Linux: 6.1.67-cip<14>[   23.847307] [IGT] kms_vblank: exiting, ret=77

12160 23:12:20.666882  12-rt7 aarch64)

12161 23:12:20.673918  <8>[   23.852735] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked RESULT=skip>

12162 23:12:20.674029  

12163 23:12:20.674282  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked RESULT=skip
12165 23:12:20.676872  Opened device: /dev/dri/card0

12166 23:12:20.681110  No KMS driver or no outputs, pipes: 8, outputs: 0

12167 23:12:20.683571  Subtest crtc-id: SKIP (0.000s)

12168 23:12:20.693886  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67<14>[   23.874109] [IGT] kms_vblank: executing

12169 23:12:20.697155  <14>[   23.876193] [IGT] kms_vblank: exiting, ret=77

12170 23:12:20.706756  <8>[   23.882181] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-hang RESULT=skip>

12171 23:12:20.706839  -cip12-rt7 aarch64)

12172 23:12:20.707079  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-hang RESULT=skip
12174 23:12:20.713655  Opened devi<14>[   23.895621] [IGT] kms_vblank: executing

12175 23:12:20.716648  <14>[   23.896132] [IGT] kms_vblank: exiting, ret=77

12176 23:12:20.726894  <8>[   23.902699] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-busy RESULT=skip>

12177 23:12:20.726976  ce: /dev/dri/card0

12178 23:12:20.727212  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-busy RESULT=skip
12180 23:12:20.734120  No KMS driver or no outputs,<14>[   23.914738] [IGT] kms_vblank: executing

12181 23:12:20.740581  <14>[   23.915250] [IGT] kms_vblank: exiting, ret=77

12182 23:12:20.747009  <8>[   23.922185] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-busy-hang RESULT=skip>

12183 23:12:20.747262  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-busy-hang RESULT=skip
12185 23:12:20.750055   pipes: 8, outputs: 0

12186 23:12:20.753286  Subte<14>[   23.935685] [IGT] kms_vblank: executing

12187 23:12:20.757192  <14>[   23.936194] [IGT] kms_vblank: exiting, ret=77

12188 23:12:20.766907  <8>[   23.941007] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-busy RESULT=skip>

12189 23:12:20.767189  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-busy RESULT=skip
12191 23:12:20.773643  st pipe-A-accuracy-idle: SKIP (0<14>[   23.955395] [IGT] kms_vblank: executing

12192 23:12:20.776537  <14>[   23.955883] [IGT] kms_vblank: exiting, ret=77

12193 23:12:20.786546  <8>[   23.960781] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-query-forked-busy-hang RESULT=skip>

12194 23:12:20.786683  .000s)

12195 23:12:20.786968  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-query-forked-busy-hang RESULT=skip
12197 23:12:20.793611  IGT-Version: 1.27.1-<14>[   23.975541] [IGT] kms_vblank: executing

12198 23:12:20.796534  <14>[   23.976023] [IGT] kms_vblank: exiting, ret=77

12199 23:12:20.806580  <8>[   23.982273] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-idle RESULT=skip>

12200 23:12:20.806863  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-idle RESULT=skip
12202 23:12:20.809944  g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12203 23:12:20.813363  Opened device: /dev/dri/card0

12204 23:12:20.816738  No KMS driver or no outputs, pipes: 8, outputs: 0

12205 23:12:20.823053  Subt<14>[   24.004426] [IGT] kms_vblank: executing

12206 23:12:20.826626  <14>[   24.005271] [IGT] kms_vblank: exiting, ret=77

12207 23:12:20.833491  <8>[   24.010220] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-idle-hang RESULT=skip>

12208 23:12:20.833747  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-idle-hang RESULT=skip
12210 23:12:20.840367  est pipe-A-query-idle: SKIP (0.0<14>[   24.023705] [IGT] kms_vblank: executing

12211 23:12:20.847195  <14>[   24.024180] [IGT] kms_vblank: exiting, ret=77

12212 23:12:20.853459  <8>[   24.030650] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked RESULT=skip>

12213 23:12:20.853542  00s)

12214 23:12:20.853780  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked RESULT=skip
12216 23:12:20.863585  IGT-Version: 1.27.1-g621c2d3 (aarch64)<14>[   24.042909] [IGT] kms_vblank: executing

12217 23:12:20.869894   (Linux: 6.1.67-<14>[   24.043404] [IGT] kms_vblank: exiting, ret=77

12218 23:12:20.877015  cip12-rt7 aarch6<8>[   24.047604] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-hang RESULT=skip>

12219 23:12:20.877098  4)

12220 23:12:20.877340  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-hang RESULT=skip
12222 23:12:20.880049  Opened device: /dev/dri/card0

12223 23:12:20.887056  No KMS driver or no outputs, pipes: 8, outputs: 0

12224 23:12:20.889579  Subtes<14>[   24.073006] [IGT] kms_vblank: executing

12225 23:12:20.896711  t pipe-A-query-idle-hang: SKIP (<14>[   24.079458] [IGT] kms_vblank: exiting, ret=77

12226 23:12:20.903313  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-busy RESULT=skip
12228 23:12:20.906568  <8>[   24.083932] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-busy RESULT=skip>

12229 23:12:20.906651  0.000s)

12230 23:12:20.913542  IGT-Version: 1.27.1-g621c2d3 (aarch<14>[   24.094443] [IGT] kms_vblank: executing

12231 23:12:20.920235  64) (Linux: 6.1.<14>[   24.094907] [IGT] kms_vblank: exiting, ret=77

12232 23:12:20.926207  <8>[   24.102138] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-busy-hang RESULT=skip>

12233 23:12:20.926437  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-busy-hang RESULT=skip
12235 23:12:20.929436  67-cip12-rt7 aarch64)

12236 23:12:20.932968  Opened device: /dev/dri/card0

12237 23:12:20.936484  No KMS driver or no outputs, pipes: 8, outputs: 0

12238 23:12:20.939526  Subtest pipe-A-query-forked: SKIP (0.000s)

12239 23:12:20.946044  IGT<14>[   24.125784] [IGT] kms_vblank: executing

12240 23:12:20.949934  <14>[   24.126634] [IGT] kms_vblank: exiting, ret=77

12241 23:12:20.956382  <8>[   24.131731] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-busy RESULT=skip>

12242 23:12:20.956649  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-busy RESULT=skip
12244 23:12:20.963351  -Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12245 23:12:20.970095  Opened de<14>[   24.150661] [IGT] kms_vblank: executing

12246 23:12:20.972773  <14>[   24.151529] [IGT] kms_vblank: exiting, ret=77

12247 23:12:20.983161  <8>[   24.156961] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-wait-forked-busy-hang RESULT=skip>

12248 23:12:20.983250  vice: /dev/dri/card0

12249 23:12:20.983488  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-wait-forked-busy-hang RESULT=skip
12251 23:12:20.989873  No KMS dri<14>[   24.171194] [IGT] kms_vblank: executing

12252 23:12:20.996102  ver or no output<14>[   24.171663] [IGT] kms_vblank: exiting, ret=77

12253 23:12:21.002738  <8>[   24.176702] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-idle RESULT=skip>

12254 23:12:21.003026  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-idle RESULT=skip
12256 23:12:21.006027  s, pipes: 8, outputs: 0

12257 23:12:21.009372  Subtest pipe-A-query-forked-hang: SKIP (0.000s)

12258 23:12:21.015975  IGT-Version: 1.27.1-g621c2d3 (<14>[   24.198427] [IGT] kms_vblank: executing

12259 23:12:21.022772  <14>[   24.199250] [IGT] kms_vblank: exiting, ret=77

12260 23:12:21.029042  <8>[   24.204463] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-idle-hang RESULT=skip>

12261 23:12:21.029339  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-idle-hang RESULT=skip
12263 23:12:21.035958  aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12264 23:12:21.036035  Opened device: /dev/dri/card0

12265 23:12:21.042619  No KMS driver or no outputs, pipes: 8, outputs: 0

12266 23:12:21.049245  Subtest pipe-A-query-busy: SKI<14>[   24.231786] [IGT] kms_vblank: executing

12267 23:12:21.052598  <14>[   24.232623] [IGT] kms_vblank: exiting, ret=77

12268 23:12:21.062990  <8>[   24.237595] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-dpms-rpm RESULT=skip>

12269 23:12:21.063077  P (0.000s)

12270 23:12:21.063317  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-dpms-rpm RESULT=skip
12272 23:12:21.069362  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12273 23:12:21.073214  Opened device: /dev/dri/card0

12274 23:12:21.078987  No KMS <14>[   24.258542] [IGT] kms_vblank: executing

12275 23:12:21.082389  <14>[   24.259403] [IGT] kms_vblank: exiting, ret=77

12276 23:12:21.092160  <8>[   24.264549] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-dpms-suspend RESULT=skip>

12277 23:12:21.092437  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-dpms-suspend RESULT=skip
12279 23:12:21.098729  driver or no outputs, pipes: 8, <14>[   24.280246] [IGT] kms_vblank: executing

12280 23:12:21.098813  outputs: 0

12281 23:12:21.105403  <14>[   24.280718] [IGT] kms_vblank: exiting, ret=77

12282 23:12:21.112514  <8>[   24.287558] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-suspend RESULT=skip>

12283 23:12:21.112769  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-suspend RESULT=skip
12285 23:12:21.122831  Subtest pipe-A-query-busy-hang: SKIP (0.000s)[0<14>[   24.301868] [IGT] kms_vblank: executing

12286 23:12:21.125976  <14>[   24.302332] [IGT] kms_vblank: exiting, ret=77

12287 23:12:21.135293  <8>[   24.308925] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset RESULT=skip>

12288 23:12:21.135383  m

12289 23:12:21.135620  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset RESULT=skip
12291 23:12:21.142140  IGT-Version: 1.27.1-g621c2d3 <14>[   24.323499] [IGT] kms_vblank: executing

12292 23:12:21.145729  <14>[   24.323972] [IGT] kms_vblank: exiting, ret=77

12293 23:12:21.155370  <8>[   24.328926] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset-hang RESULT=skip>

12294 23:12:21.155627  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset-hang RESULT=skip
12296 23:12:21.161983  (aarch64) (Linux: 6.1.67-cip12-r<14>[   24.344176] [IGT] kms_vblank: executing

12297 23:12:21.165198  <14>[   24.344636] [IGT] kms_vblank: exiting, ret=77

12298 23:12:21.174969  <8>[   24.350973] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-A-ts-continuation-modeset-rpm RESULT=skip>

12299 23:12:21.175092  t7 aarch64)

12300 23:12:21.175359  Received signal: <TESTCASE> TEST_CASE_ID=pipe-A-ts-continuation-modeset-rpm RESULT=skip
12302 23:12:21.178605  Opened device: /dev/dri/card0

12303 23:12:21.185484  No KMS driver or no outputs, pipes: 8, outputs: 0

12304 23:12:21.188272  Subtest pipe-<14>[   24.373253] [IGT] kms_vblank: executing

12305 23:12:21.191983  A-query-forked-busy: SKIP (0.000s)

12306 23:12:21.198550  IGT-Vers<14>[   24.379039] [IGT] kms_vblank: exiting, ret=77

12307 23:12:21.205072  <8>[   24.383629] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-accuracy-idle RESULT=skip>

12308 23:12:21.205324  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-accuracy-idle RESULT=skip
12310 23:12:21.215262  ion: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-ci<14>[   24.395162] [IGT] kms_vblank: executing

12311 23:12:21.218574  <14>[   24.395631] [IGT] kms_vblank: exiting, ret=77

12312 23:12:21.224899  <8>[   24.401751] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-idle RESULT=skip>

12313 23:12:21.225148  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-idle RESULT=skip
12315 23:12:21.228213  p12-rt7 aarch64)

12316 23:12:21.232023  Opened device: /dev/dri/card0

12317 23:12:21.234967  No KMS driver or no outputs, pipes: 8, outputs: 0

12318 23:12:21.241612  Subtest pipe-A-query-for<14>[   24.423747] [IGT] kms_vblank: executing

12319 23:12:21.245132  ked-busy-hang: SKIP (0.000s)

12320 23:12:21.251539  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12321 23:12:21.255347  Opened device: /dev/dri/card0

12322 23:12:21.258206  No KMS driver or no outputs, pipes: 8, outputs: 0

12323 23:12:21.261607  Subtest pipe-A-wait-idle: SKIP (0.000s)

12324 23:12:21.268375  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12325 23:12:21.271415  Opened device: /dev/dri/card0

12326 23:12:21.274807  No KMS driver or no outputs, pipes: 8, outputs: 0

12327 23:12:21.282002  Subtest pipe-A-wait-idle-hang: SKIP (0.000s)

12328 23:12:21.288646  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12329 23:12:21.291504  Opened device: /dev/dri/card0

12330 23:12:21.294417  No KMS driver or no outputs, pipes: 8, outputs: 0

12331 23:12:21.297968  Subtest pipe-A-wait-forked: SKIP (0.000s)

12332 23:12:21.304384  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12333 23:12:21.307599  Opened device: /dev/dri/card0

12334 23:12:21.311073  No KMS driver or no outputs, pipes: 8, outputs: 0

12335 23:12:21.317722  Subtest pipe-A-wait-forked-hang: SKIP (0.000s)

12336 23:12:21.324299  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12337 23:12:21.327839  Opened device: /dev/dri/card0

12338 23:12:21.331043  No KMS driver or no outputs, pipes: 8, outputs: 0

12339 23:12:21.334327  Subtest pipe-A-wait-busy: SKIP (0.000s)

12340 23:12:21.341355  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12341 23:12:21.344343  Opened device: /dev/dri/card0

12342 23:12:21.347612  No KMS driver or no outputs, pipes: 8, outputs: 0

12343 23:12:21.354438  Subtest pipe-A-wait-busy-hang: SKIP (0.000s)

12344 23:12:21.360537  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12345 23:12:21.360617  Opened device: /dev/dri/card0

12346 23:12:21.367693  No KMS driver or no outputs, pipes: 8, outputs: 0

12347 23:12:21.370837  Subtest pipe-A-wait-forked-busy: SKIP (0.000s)

12348 23:12:21.377630  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12349 23:12:21.380432  Opened device: /dev/dri/card0

12350 23:12:21.383931  No KMS driver or no outputs, pipes: 8, outputs: 0

12351 23:12:21.390825  Subtest pipe-A-wait-forked-busy-hang: SKIP (0.000s)

12352 23:12:21.397148  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12353 23:12:21.400951  Opened device: /dev/dri/card0

12354 23:12:21.404499  No KMS driver or no outputs, pipes: 8, outputs: 0

12355 23:12:21.410828  Subtest pipe-A-ts-continuation-idle: SKIP (0.000s)

12356 23:12:21.417513  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12357 23:12:21.417590  Opened device: /dev/dri/card0

12358 23:12:21.424238  No KMS driver or no outputs, pipes: 8, outputs: 0

12359 23:12:21.427219  Subtest pipe-A-ts-continuation-idle-hang: SKIP (0.000s)

12360 23:12:21.434098  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12361 23:12:21.437249  Opened device: /dev/dri/card0

12362 23:12:21.440255  No KMS driver or no outputs, pipes: 8, outputs: 0

12363 23:12:21.446996  Subtest pipe-A-ts-continuation-dpms-rpm: SKIP (0.000s)

12364 23:12:21.453601  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12365 23:12:21.456895  Opened device: /dev/dri/card0

12366 23:12:21.460745  No KMS driver or no outputs, pipes: 8, outputs: 0

12367 23:12:21.466685  Subtest pipe-A-ts-continuation-dpms-suspend: SKIP (0.000s)

12368 23:12:21.473776  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12369 23:12:21.476918  Opened device: /dev/dri/card0

12370 23:12:21.481263  No KMS driver or no outputs, pipes: 8, outputs: 0

12371 23:12:21.487201  Subtest pipe-A-ts-continuation-suspend: SKIP (0.000s)

12372 23:12:21.493965  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12373 23:12:21.494098  Opened device: /dev/dri/card0

12374 23:12:21.499967  No KMS driver or no outputs, pipes: 8, outputs: 0

12375 23:12:21.503188  Subtest pipe-A-ts-continuation-modeset: SKIP (0.000s)

12376 23:12:21.510829  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12377 23:12:21.513381  Opened device: /dev/dri/card0

12378 23:12:21.520235  No KMS driver or no outputs, pipes: 8, outputs: 0

12379 23:12:21.523235  Subtest pipe-A-ts-continuation-modeset-hang: SKIP (0.000s)

12380 23:12:21.529788  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12381 23:12:21.533391  Opened device: /dev/dri/card0

12382 23:12:21.536295  No KMS driver or no outputs, pipes: 8, outputs: 0

12383 23:12:21.543469  Subtest pipe-A-ts-continuation-modeset-rpm: SKIP (0.000s)

12384 23:12:21.549664  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12385 23:12:21.553342  Opened device: /dev/dri/card0

12386 23:12:21.556598  No KMS driver or no outputs, pipes: 8, outputs: 0

12387 23:12:21.562847  Subtest pipe-B-accuracy-idle: SKIP (0.000s)

12388 23:12:21.569733  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12389 23:12:21.569810  Opened device: /dev/dri/card0

12390 23:12:21.577005  No KMS driver or no outputs, pipes: 8, outputs: 0

12391 23:12:21.580136  Subtest p<14>[   24.762069] [IGT] kms_vblank: exiting, ret=77

12392 23:12:21.590019  <8>[   24.767190] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-idle-hang RESULT=skip>

12393 23:12:21.590290  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-idle-hang RESULT=skip
12395 23:12:21.593232  ipe-B-query-idle: SKIP (0.000s)

12396 23:12:21.599685  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12397 23:12:21.602936  Opened device: /dev/dri/card0

12398 23:12:21.606382  No<14>[   24.787698] [IGT] kms_vblank: executing

12399 23:12:21.610322  <14>[   24.788510] [IGT] kms_vblank: exiting, ret=77

12400 23:12:21.616450  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked RESULT=skip
12402 23:12:21.619730  <8>[   24.794001] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked RESULT=skip>

12403 23:12:21.626640   KMS driver or no outputs, pipes<14>[   24.807473] [IGT] kms_vblank: executing

12404 23:12:21.629526  <14>[   24.808016] [IGT] kms_vblank: exiting, ret=77

12405 23:12:21.636622  <8>[   24.813687] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-hang RESULT=skip>

12406 23:12:21.636916  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-hang RESULT=skip
12408 23:12:21.639812  : 8, outputs: 0

12409 23:12:21.646665  Subtest pip<14>[   24.826992] [IGT] kms_vblank: executing

12410 23:12:21.649566  e-B-query-idle-h<14>[   24.827523] [IGT] kms_vblank: exiting, ret=77

12411 23:12:21.659616  ang: SKIP (0.000<8>[   24.832179] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-busy RESULT=skip>

12412 23:12:21.659709  s)

12413 23:12:21.659953  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-busy RESULT=skip
12415 23:12:21.666314  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12416 23:12:21.669273  Opened device: /dev/dri/card0

12417 23:12:21.672673  <14>[   24.857241] [IGT] kms_vblank: executing

12418 23:12:21.672758  

12419 23:12:21.682905  No KMS driver or no outputs, pipes: 8, outputs:<14>[   24.863250] [IGT] kms_vblank: exiting, ret=77

12420 23:12:21.689229  <8>[   24.868558] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-busy-hang RESULT=skip>

12421 23:12:21.689335   0

12422 23:12:21.689615  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-busy-hang RESULT=skip
12424 23:12:21.696901  Subtest pipe-B-query-for<14>[   24.880329] [IGT] kms_vblank: executing

12425 23:12:21.703000  <14>[   24.880859] [IGT] kms_vblank: exiting, ret=77

12426 23:12:21.709737  <8>[   24.885648] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-busy RESULT=skip>

12427 23:12:21.710001  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-busy RESULT=skip
12429 23:12:21.712489  ked: SKIP (0.000s)

12430 23:12:21.719387  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12431 23:12:21.722597  Opened device: /dev/dri/card0

12432 23:12:21.729460  No KMS driver or no outputs, pipes: 8, outputs:<14>[   24.910526] [IGT] kms_vblank: executing

12433 23:12:21.732283  <14>[   24.911410] [IGT] kms_vblank: exiting, ret=77

12434 23:12:21.742787  <8>[   24.917081] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-query-forked-busy-hang RESULT=skip>

12435 23:12:21.742864   0

12436 23:12:21.743102  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-query-forked-busy-hang RESULT=skip
12438 23:12:21.749347  Subtest pipe-B-query-for<14>[   24.931889] [IGT] kms_vblank: executing

12439 23:12:21.756187  <14>[   24.932392] [IGT] kms_vblank: exiting, ret=77

12440 23:12:21.762352  <8>[   24.937605] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-idle RESULT=skip>

12441 23:12:21.762648  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-idle RESULT=skip
12443 23:12:21.765467  ked-hang: SKIP (0.000s)

12444 23:12:21.768848  IGT-Version: 1.27.1<14>[   24.950914] [IGT] kms_vblank: executing

12445 23:12:21.775537  <14>[   24.951441] [IGT] kms_vblank: exiting, ret=77

12446 23:12:21.782464  <8>[   24.956917] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-idle-hang RESULT=skip>

12447 23:12:21.782726  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-idle-hang RESULT=skip
12449 23:12:21.789134  -g621c2d3 (aarch64) (Linux: 6.1.<14>[   24.971790] [IGT] kms_vblank: executing

12450 23:12:21.795796  <14>[   24.972310] [IGT] kms_vblank: exiting, ret=77

12451 23:12:21.802319  <8>[   24.979062] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked RESULT=skip>

12452 23:12:21.802422  67-cip12-rt7 aarch64)

12453 23:12:21.802676  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked RESULT=skip
12455 23:12:21.808990  Opened device: /dev/dri/c<14>[   24.990985] [IGT] kms_vblank: executing

12456 23:12:21.816579  <14>[   24.991489] [IGT] kms_vblank: exiting, ret=77

12457 23:12:21.822460  <8>[   24.998720] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-hang RESULT=skip>

12458 23:12:21.822532  ard0

12459 23:12:21.822764  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-hang RESULT=skip
12461 23:12:21.829064  No KMS driver or no outputs, pipes: 8, outputs: 0

12462 23:12:21.832249  Subtest pipe-B-query-busy: SKIP (0.000s)

12463 23:12:21.842341  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67<14>[   25.024129] [IGT] kms_vblank: executing

12464 23:12:21.846006  <14>[   25.025000] [IGT] kms_vblank: exiting, ret=77

12465 23:12:21.852374  <8>[   25.030223] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-busy RESULT=skip>

12466 23:12:21.852622  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-busy RESULT=skip
12468 23:12:21.855650  -cip12-rt7 aarch64)

12469 23:12:21.859324  Opened device: /dev/dri/card0

12470 23:12:21.862612  No KMS driver or no outputs, pipes: 8, outputs: 0

12471 23:12:21.869100  Subtest pipe-B-query-busy-hang: SKIP <14>[   25.050186] [IGT] kms_vblank: executing

12472 23:12:21.875170  <14>[   25.050943] [IGT] kms_vblank: exiting, ret=77

12473 23:12:21.882146  <8>[   25.055726] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-busy-hang RESULT=skip>

12474 23:12:21.882222  (0.000s)

12475 23:12:21.882424  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-busy-hang RESULT=skip
12477 23:12:21.891793  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aa<14>[   25.075866] [IGT] kms_vblank: executing

12478 23:12:21.898578  <14>[   25.076654] [IGT] kms_vblank: exiting, ret=77

12479 23:12:21.904991  <8>[   25.082013] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-busy RESULT=skip>

12480 23:12:21.905068  rch64)

12481 23:12:21.905302  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-busy RESULT=skip
12483 23:12:21.909089  Opened device: /dev/dri/card0

12484 23:12:21.915433  No KMS driver or no outputs, pipes: 8, outputs: 0

12485 23:12:21.922144  Subtest pipe-B-query-forked-busy: <14>[   25.102532] [IGT] kms_vblank: executing

12486 23:12:21.925024  <14>[   25.103354] [IGT] kms_vblank: exiting, ret=77

12487 23:12:21.935338  <8>[   25.108492] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-wait-forked-busy-hang RESULT=skip>

12488 23:12:21.935419  SKIP (0.000s)

12489 23:12:21.935656  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-wait-forked-busy-hang RESULT=skip
12491 23:12:21.941562  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12492 23:12:21.945400  Opened device: /dev/dri/card0

12493 23:12:21.948782  No KMS driver or no outputs, pipes: 8, outputs: 0

12494 23:12:21.955137  <14>[   25.135917] [IGT] kms_vblank: executing

12495 23:12:21.958295  <14>[   25.136711] [IGT] kms_vblank: exiting, ret=77

12496 23:12:21.964828  <8>[   25.141748] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-idle RESULT=skip>

12497 23:12:21.965079  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-idle RESULT=skip
12499 23:12:21.975021  [1mSubtest pipe-B-query-forked-b<14>[   25.155881] [IGT] kms_vblank: executing

12500 23:12:21.978130  <14>[   25.156354] [IGT] kms_vblank: exiting, ret=77

12501 23:12:21.988374  <8>[   25.161846] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-idle-hang RESULT=skip>

12502 23:12:21.988621  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-idle-hang RESULT=skip
12504 23:12:21.991294  usy-hang: SKIP (<14>[   25.176329] [IGT] kms_vblank: executing

12505 23:12:21.994751  0.000s)

12506 23:12:21.998142  IGT<14>[   25.176818] [IGT] kms_vblank: exiting, ret=77

12507 23:12:22.008360  <8>[   25.184072] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-dpms-rpm RESULT=skip>

12508 23:12:22.008610  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-dpms-rpm RESULT=skip
12510 23:12:22.011765  -Version: 1.27.1<14>[   25.196649] [IGT] kms_vblank: executing

12511 23:12:22.018142  -g621c2d3 (aarch<14>[   25.197128] [IGT] kms_vblank: exiting, ret=77

12512 23:12:22.028398  <8>[   25.204294] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-dpms-suspend RESULT=skip>

12513 23:12:22.028652  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-dpms-suspend RESULT=skip
12515 23:12:22.034731  64) (Linux: 6.1.<14>[   25.217301] [IGT] kms_vblank: executing

12516 23:12:22.034812  67-cip12-rt7 aarch64)

12517 23:12:22.041190  Opened device: /dev/dri/c<14>[   25.223109] [IGT] kms_vblank: exiting, ret=77

12518 23:12:22.051318  <8>[   25.228331] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-suspend RESULT=skip>

12519 23:12:22.051395  ard0

12520 23:12:22.051628  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-suspend RESULT=skip
12522 23:12:22.058119  No KMS dri<14>[   25.240373] [IGT] kms_vblank: executing

12523 23:12:22.061611  ver or no output<14>[   25.240841] [IGT] kms_vblank: exiting, ret=77

12524 23:12:22.071170  <8>[   25.250044] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset RESULT=skip>

12525 23:12:22.071420  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset RESULT=skip
12527 23:12:22.077944  s, pipes: 8, out<14>[   25.260609] [IGT] kms_vblank: executing

12528 23:12:22.078025  puts: 0

12529 23:12:22.084244  Sub<14>[   25.261077] [IGT] kms_vblank: exiting, ret=77

12530 23:12:22.090977  <8>[   25.268243] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset-hang RESULT=skip>

12531 23:12:22.091224  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset-hang RESULT=skip
12533 23:12:22.094645  test pipe-B-wait-idle: SKIP (0.000s)

12534 23:12:22.101133  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12535 23:12:22.107869  Opened device: /dev/dri/card<14>[   25.292912] [IGT] kms_vblank: executing

12536 23:12:22.107940  0

12537 23:12:22.117295  No KMS driver or no outputs, pipes: 8, output<14>[   25.298217] [IGT] kms_vblank: exiting, ret=77

12538 23:12:22.127563  <8>[   25.303070] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-B-ts-continuation-modeset-rpm RESULT=skip>

12539 23:12:22.127643  s: 0

12540 23:12:22.127886  Received signal: <TESTCASE> TEST_CASE_ID=pipe-B-ts-continuation-modeset-rpm RESULT=skip
12542 23:12:22.130620  Subtest pipe-B-wait-idle-hang: SKIP (0.000s)

12543 23:12:22.140961  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarc<14>[   25.322856] [IGT] kms_vblank: executing

12544 23:12:22.147228  <14>[   25.323659] [IGT] kms_vblank: exiting, ret=77

12545 23:12:22.154309  <8>[   25.328928] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-accuracy-idle RESULT=skip>

12546 23:12:22.154400  h64)

12547 23:12:22.154656  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-accuracy-idle RESULT=skip
12549 23:12:22.160575  Opened device: /dev/dri/ca<14>[   25.343412] [IGT] kms_vblank: executing

12550 23:12:22.165271  <14>[   25.343882] [IGT] kms_vblank: exiting, ret=77

12551 23:12:22.174068  <8>[   25.352876] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-idle RESULT=skip>

12552 23:12:22.174150  rd0

12553 23:12:22.174388  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-idle RESULT=skip
12555 23:12:22.180959  No KMS driver or no outputs, pipes: 8, outp<14>[   25.363380] [IGT] kms_vblank: executing

12556 23:12:22.187633  <14>[   25.363849] [IGT] kms_vblank: exiting, ret=77

12557 23:12:22.194206  <8>[   25.368819] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-idle-hang RESULT=skip>

12558 23:12:22.194292  uts: 0

12559 23:12:22.194532  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-idle-hang RESULT=skip
12561 23:12:22.201233  Subtest pipe-B-wait-<14>[   25.383455] [IGT] kms_vblank: executing

12562 23:12:22.207508  forked: SKIP (0.<14>[   25.383934] [IGT] kms_vblank: exiting, ret=77

12563 23:12:22.214158  <8>[   25.391242] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked RESULT=skip>

12564 23:12:22.214237  000s)

12565 23:12:22.214478  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked RESULT=skip
12567 23:12:22.220673  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12568 23:12:22.227386  Opened device: /dev/dri/car<14>[   25.413324] [IGT] kms_vblank: executing

12569 23:12:22.227465  d0

12570 23:12:22.237751  No KMS driver or no outputs, pipes: 8, outpu<14>[   25.418727] [IGT] kms_vblank: exiting, ret=77

12571 23:12:22.243741  <8>[   25.423615] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-hang RESULT=skip>

12572 23:12:22.243992  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-hang RESULT=skip
12574 23:12:22.247318  ts: 0

12575 23:12:22.250381  Subtest pipe-B-wait-forked-hang: SKIP (0.000s)

12576 23:12:22.260376  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 a<14>[   25.443913] [IGT] kms_vblank: executing

12577 23:12:22.267153  <14>[   25.444698] [IGT] kms_vblank: exiting, ret=77

12578 23:12:22.273773  <8>[   25.449585] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-busy RESULT=skip>

12579 23:12:22.273854  arch64)

12580 23:12:22.274089  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-busy RESULT=skip
12582 23:12:22.276918  Opened device: /dev/dri/card0

12583 23:12:22.280654  No KMS d<14>[   25.462380] [IGT] kms_vblank: executing

12584 23:12:22.287747  <14>[   25.462858] [IGT] kms_vblank: exiting, ret=77

12585 23:12:22.294373  <8>[   25.468320] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-busy-hang RESULT=skip>

12586 23:12:22.294666  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-busy-hang RESULT=skip
12588 23:12:22.297176  river or no outputs, pipes: 8, outputs: 0

12589 23:12:22.300897  Subtest pipe-B-wait-busy: SKIP (0.000s)

12590 23:12:22.310319  IGT-Version: 1.27.1-g621c2d3 (aarch6<14>[   25.491035] [IGT] kms_vblank: executing

12591 23:12:22.313733  <14>[   25.491813] [IGT] kms_vblank: exiting, ret=77

12592 23:12:22.320382  <8>[   25.496857] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-busy RESULT=skip>

12593 23:12:22.320629  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-busy RESULT=skip
12595 23:12:22.330619  4) (Linux: 6.1.67-cip12-rt7 aarc<14>[   25.511336] [IGT] kms_vblank: executing

12596 23:12:22.330702  h64)

12597 23:12:22.333379  Opened device: /dev/dri/card0

12598 23:12:22.336927  No KMS driver or no outputs, pipes: 8, outputs: 0

12599 23:12:22.340581  Subtest pipe-B-wait-busy-hang: SKIP (0.000s)

12600 23:12:22.347917  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12601 23:12:22.350925  Opened device: /dev/dri/card0

12602 23:12:22.354172  No KMS driver or no outputs, pipes: 8, outputs: 0

12603 23:12:22.360380  Subtest pipe-B-wait-forked-busy: SKIP (0.000s)

12604 23:12:22.366697  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12605 23:12:22.370115  Opened device: /dev/dri/card0

12606 23:12:22.373531  No KMS driver or no outputs, pipes: 8, outputs: 0

12607 23:12:22.380117  Subtest pipe-B-wait-forked-busy-hang: SKIP (0.000s)

12608 23:12:22.383383  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12609 23:12:22.386901  Opened device: /dev/dri/card0

12610 23:12:22.393389  No KMS driver or no outputs, pipes: 8, outputs: 0

12611 23:12:22.397069  Subtest pipe-B-ts-continuation-idle: SKIP (0.000s)

12612 23:12:22.403941  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12613 23:12:22.407158  Opened device: /dev/dri/card0

12614 23:12:22.410662  No KMS driver or no outputs, pipes: 8, outputs: 0

12615 23:12:22.416777  Subtest pipe-B-ts-continuation-idle-hang: SKIP (0.000s)

12616 23:12:22.423578  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12617 23:12:22.427209  Opened device: /dev/dri/card0

12618 23:12:22.430816  No KMS driver or no outputs, pipes: 8, outputs: 0

12619 23:12:22.437025  Subtest pipe-B-ts-continuation-dpms-rpm: SKIP (0.000s)

12620 23:12:22.443456  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12621 23:12:22.443537  Opened device: /dev/dri/card0

12622 23:12:22.450552  No KMS driver or no outputs, pipes: 8, outputs: 0

12623 23:12:22.457116  Subtest pipe-B-ts-continuation-dpms-suspend: SKIP (0.000s)

12624 23:12:22.463571  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12625 23:12:22.463654  Opened device: /dev/dri/card0

12626 23:12:22.470146  No KMS driver or no outputs, pipes: 8, outputs: 0

12627 23:12:22.472999  Subtest pipe-B-ts-continuation-suspend: SKIP (0.000s)

12628 23:12:22.480003  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12629 23:12:22.483332  Opened device: /dev/dri/card0

12630 23:12:22.486281  No KMS driver or no outputs, pipes: 8, outputs: 0

12631 23:12:22.493176  Subtest pipe-B-ts-continuation-modeset: SKIP (0.000s)

12632 23:12:22.499495  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12633 23:12:22.503590  Opened device: /dev/dri/card0

12634 23:12:22.506134  No KMS driver or no outputs, pipes: 8, outputs: 0

12635 23:12:22.512884  Subtest pipe-B-ts-continuation-modeset-hang: SKIP (0.000s)

12636 23:12:22.519638  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12637 23:12:22.523039  Opened device: /dev/dri/card0

12638 23:12:22.526616  No KMS driver or no outputs, pipes: 8, outputs: 0

12639 23:12:22.532702  Subtest pipe-B-ts-continuation-modeset-rpm: SKIP (0.000s)

12640 23:12:22.539133  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12641 23:12:22.542589  Opened device: /dev/dri/card0

12642 23:12:22.547021  No KMS driver or no outputs, pipes: 8, outputs: 0

12643 23:12:22.549567  Subtest pipe-C-accuracy-idle: SKIP (0.000s)

12644 23:12:22.556282  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12645 23:12:22.559865  Opened device: /dev/dri/card0

12646 23:12:22.562981  No KMS driver or no outputs, pipes: 8, outputs: 0

12647 23:12:22.569591  Subtest pipe-C-query-idle: SKIP (0.000s)

12648 23:12:22.576084  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12649 23:12:22.576199  Opened device: /dev/dri/card0

12650 23:12:22.582517  No KMS driver or no outputs, pipes: 8, outputs: 0

12651 23:12:22.586119  Subtest pipe-C-query-idle-hang: SKIP (0.000s)

12652 23:12:22.592309  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12653 23:12:22.595984  Opened device: /dev/dri/card0

12654 23:12:22.598973  No KMS driver or no outputs, pipes: 8, outputs: 0

12655 23:12:22.605742  Subtest pipe-C-query-forked: SKIP (0.000s)

12656 23:12:22.612693  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12657 23:12:22.612806  Opened device: /dev/dri/card0

12658 23:12:22.619060  No KMS driver or no outputs, pipes: 8, outputs: 0

12659 23:12:22.622195  Subtest pipe-C-query-forked-hang: SKIP (0.000s)

12660 23:12:22.629461  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12661 23:12:22.632604  Opened device: /dev/dri/card0

12662 23:12:22.635432  No KMS driver or no outputs, pipes: 8, outputs: 0

12663 23:12:22.642707  Subtest pipe-C-query-busy: SKIP (0.000s)

12664 23:12:22.648860  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12665 23:12:22.648943  Opened device: /dev/dri/card0

12666 23:12:22.655296  No KMS driver or no outputs, pipes: 8, outputs: 0

12667 23:12:22.659056  Subtest pipe-C-query-busy-hang: SKIP (0.000s)

12668 23:12:22.668700  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64<14>[   25.850073] [IGT] kms_vblank: exiting, ret=77

12669 23:12:22.679325  <8>[   25.856851] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-query-forked-busy-hang RESULT=skip>

12670 23:12:22.679459  )

12671 23:12:22.679719  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-query-forked-busy-hang RESULT=skip
12673 23:12:22.685291  Opened device: /dev/dri/card0<14>[   25.867915] [IGT] kms_vblank: executing

12674 23:12:22.689348  <14>[   25.868385] [IGT] kms_vblank: exiting, ret=77

12675 23:12:22.699200  <8>[   25.875284] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-idle RESULT=skip>

12676 23:12:22.699284  

12677 23:12:22.699522  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-idle RESULT=skip
12679 23:12:22.705001  No KMS driver or no outputs, p<14>[   25.887809] [IGT] kms_vblank: executing

12680 23:12:22.708431  <14>[   25.888312] [IGT] kms_vblank: exiting, ret=77

12681 23:12:22.715516  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-idle-hang RESULT=skip
12683 23:12:22.718827  <8>[   25.894924] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-idle-hang RESULT=skip>

12684 23:12:22.718914  ipes: 8, outputs: 0

12685 23:12:22.725260  Subtest pipe-C-query-fo<14>[   25.907017] [IGT] kms_vblank: executing

12686 23:12:22.728623  <14>[   25.907543] [IGT] kms_vblank: exiting, ret=77

12687 23:12:22.738678  <8>[   25.914646] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked RESULT=skip>

12688 23:12:22.738938  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked RESULT=skip
12690 23:12:22.741770  rked-busy: SKIP (0.000s)

12691 23:12:22.745360  IG<14>[   25.927454] [IGT] kms_vblank: executing

12692 23:12:22.748238  <14>[   25.927987] [IGT] kms_vblank: exiting, ret=77

12693 23:12:22.758437  <8>[   25.933479] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-hang RESULT=skip>

12694 23:12:22.758710  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-hang RESULT=skip
12696 23:12:22.765162  T-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1<14>[   25.946642] [IGT] kms_vblank: executing

12697 23:12:22.772122  <14>[   25.947176] [IGT] kms_vblank: exiting, ret=77

12698 23:12:22.777839  <8>[   25.951979] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-busy RESULT=skip>

12699 23:12:22.778097  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-busy RESULT=skip
12701 23:12:22.781415  .67-cip12-rt7 aarch64)

12702 23:12:22.784983  Opened d<14>[   25.967064] [IGT] kms_vblank: executing

12703 23:12:22.791175  evice: /dev/dri/<14>[   25.967582] [IGT] kms_vblank: exiting, ret=77

12704 23:12:22.791261  card0

12705 23:12:22.801329  No KMS dr<8>[   25.972939] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-busy-hang RESULT=skip>

12706 23:12:22.801589  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-busy-hang RESULT=skip
12708 23:12:22.804972  iver or no outputs, pipes: 8, outputs: 0

12709 23:12:22.807951  Subtest pipe-C-query-forked-busy-hang: SKIP (0.000s)

12710 23:12:22.814826  IGT-Vers<14>[   25.995665] [IGT] kms_vblank: executing

12711 23:12:22.818036  <14>[   25.996479] [IGT] kms_vblank: exiting, ret=77

12712 23:12:22.827682  <8>[   26.001932] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-busy RESULT=skip>

12713 23:12:22.827941  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-busy RESULT=skip
12715 23:12:22.834190  ion: 1.27.1-g621c2d3 (aarch64) (<14>[   26.015811] [IGT] kms_vblank: executing

12716 23:12:22.841253  Linux: 6.1.67-ci<14>[   26.016320] [IGT] kms_vblank: exiting, ret=77

12717 23:12:22.847436  <8>[   26.023777] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-wait-forked-busy-hang RESULT=skip>

12718 23:12:22.847691  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-wait-forked-busy-hang RESULT=skip
12720 23:12:22.850842  p12-rt7 aarch64)

12721 23:12:22.850922  Opened device: /dev/dri/card0

12722 23:12:22.858811  No KMS driver or no outputs, pipes: 8, outputs: 0

12723 23:12:22.864494  Subtest pipe-C-wait-idle: SKIP (0.000s)<14>[   26.048666] [IGT] kms_vblank: executing

12724 23:12:22.867546  <14>[   26.049540] [IGT] kms_vblank: exiting, ret=77

12725 23:12:22.870820  [0m

12726 23:12:22.877973  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12727 23:12:22.885161  Opened device: /d<8>[   26.063552] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-idle RESULT=skip>

12728 23:12:22.885414  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-idle RESULT=skip
12730 23:12:22.887752  ev/dri/card0

12731 23:12:22.894370  No KMS driver or n<14>[   26.075286] [IGT] kms_vblank: executing

12732 23:12:22.897481  o outputs, pipes<14>[   26.075808] [IGT] kms_vblank: exiting, ret=77

12733 23:12:22.908058  <8>[   26.081062] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-idle-hang RESULT=skip>

12734 23:12:22.908144  : 8, outputs: 0

12735 23:12:22.908382  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-idle-hang RESULT=skip
12737 23:12:22.914542  Subtest pipe-C-wait-idle-hang: SKIP (0.000s)

12738 23:12:22.920768  IGT-Version: 1.27.1-g621c2d3 (aarch64) (L<14>[   26.103523] [IGT] kms_vblank: executing

12739 23:12:22.927600  <14>[   26.104339] [IGT] kms_vblank: exiting, ret=77

12740 23:12:22.934710  <8>[   26.109892] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-dpms-rpm RESULT=skip>

12741 23:12:22.934998  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-dpms-rpm RESULT=skip
12743 23:12:22.941129  inux: 6.1.67-cip<14>[   26.124288] [IGT] kms_vblank: executing

12744 23:12:22.944343  <14>[   26.124793] [IGT] kms_vblank: exiting, ret=77

12745 23:12:22.953820  <8>[   26.131565] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-dpms-suspend RESULT=skip>

12746 23:12:22.953904  12-rt7 aarch64)

12747 23:12:22.954142  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-dpms-suspend RESULT=skip
12749 23:12:22.960596  Opened device: <14>[   26.143561] [IGT] kms_vblank: executing

12750 23:12:22.967697  <14>[   26.144078] [IGT] kms_vblank: exiting, ret=77

12751 23:12:22.974553  <8>[   26.149050] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-suspend RESULT=skip>

12752 23:12:22.974810  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-suspend RESULT=skip
12754 23:12:22.977595  /dev/dri/card0

12755 23:12:22.980670  No KMS driver or<14>[   26.163778] [IGT] kms_vblank: executing

12756 23:12:22.987731  <14>[   26.164257] [IGT] kms_vblank: exiting, ret=77

12757 23:12:22.994613  <8>[   26.169246] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset RESULT=skip>

12758 23:12:22.994877  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset RESULT=skip
12760 23:12:23.000590   no outputs, pipes: 8, outputs: <14>[   26.184027] [IGT] kms_vblank: executing

12761 23:12:23.000673  0

12762 23:12:23.007665  Subtest p<14>[   26.184507] [IGT] kms_vblank: exiting, ret=77

12763 23:12:23.017380  <8>[   26.192180] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset-hang RESULT=skip>

12764 23:12:23.017635  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset-hang RESULT=skip
12766 23:12:23.020532  ipe-C-wait-forked: SKIP (0.000s)

12767 23:12:23.023760  IGT-Versio<14>[   26.206093] [IGT] kms_vblank: executing

12768 23:12:23.030746  n: 1.27.1-g621c2<14>[   26.206564] [IGT] kms_vblank: exiting, ret=77

12769 23:12:23.040887  <8>[   26.212961] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-C-ts-continuation-modeset-rpm RESULT=skip>

12770 23:12:23.041142  Received signal: <TESTCASE> TEST_CASE_ID=pipe-C-ts-continuation-modeset-rpm RESULT=skip
12772 23:12:23.044092  d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12773 23:12:23.046933  Opened device: /dev/dri/card0

12774 23:12:23.053616  No KMS driver or no outputs, pipe<14>[   26.235389] [IGT] kms_vblank: executing

12775 23:12:23.056881  <14>[   26.236252] [IGT] kms_vblank: exiting, ret=77

12776 23:12:23.067211  <8>[   26.241632] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-accuracy-idle RESULT=skip>

12777 23:12:23.067294  s: 8, outputs: 0

12778 23:12:23.067531  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-accuracy-idle RESULT=skip
12780 23:12:23.074046  Subtest pi<14>[   26.255677] [IGT] kms_vblank: executing

12781 23:12:23.077194  <14>[   26.256146] [IGT] kms_vblank: exiting, ret=77

12782 23:12:23.083962  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-idle RESULT=skip
12784 23:12:23.087078  <8>[   26.265396] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-idle RESULT=skip>

12785 23:12:23.090662  pe-C-wait-forked-hang: SKIP (0.000s)

12786 23:12:23.097377  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12787 23:12:23.097461  Opened device: /dev/dri/card0

12788 23:12:23.104022  No KMS driver or no outputs, <14>[   26.287729] [IGT] kms_vblank: executing

12789 23:12:23.110220  <14>[   26.288595] [IGT] kms_vblank: exiting, ret=77

12790 23:12:23.116872  <8>[   26.293609] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-idle-hang RESULT=skip>

12791 23:12:23.117144  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-idle-hang RESULT=skip
12793 23:12:23.119845  pipes: 8, outputs: 0

12794 23:12:23.123743  Subtest pipe-C-wait-busy: SKIP (0.000s)

12795 23:12:23.130605  IGT-Version: 1.27.1-g621c<14>[   26.313067] [IGT] kms_vblank: executing

12796 23:12:23.137719  2d3 (aarch64) (Linux: 6.1.67-cip<14>[   26.319614] [IGT] kms_vblank: exiting, ret=77

12797 23:12:23.143602  <8>[   26.324099] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked RESULT=skip>

12798 23:12:23.143886  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked RESULT=skip
12800 23:12:23.146601  12-rt7 aarch64)

12801 23:12:23.150185  Opened device: /dev/dri/card0

12802 23:12:23.153413  <14>[   26.335204] [IGT] kms_vblank: executing

12803 23:12:23.160331  No KMS driver or<14>[   26.335678] [IGT] kms_vblank: exiting, ret=77

12804 23:12:23.167619  <8>[   26.340802] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-hang RESULT=skip>

12805 23:12:23.167874  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-hang RESULT=skip
12807 23:12:23.170033   no outputs, pipes: 8, outputs: 0

12808 23:12:23.177296  Subtest pipe-C-wait-busy-hang: SKIP (0.000s)

12809 23:12:23.180275  IGT-Version: 1.27.1-g62<14>[   26.363221] [IGT] kms_vblank: executing

12810 23:12:23.186788  1c2d3 (aarch64) <14>[   26.363999] [IGT] kms_vblank: exiting, ret=77

12811 23:12:23.196642  (Linux: 6.1.67-c<8>[   26.368936] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-busy RESULT=skip>

12812 23:12:23.196727  ip12-rt7 aarch64)

12813 23:12:23.196962  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-busy RESULT=skip
12815 23:12:23.200087  Opened device: /dev/dri/card0

12816 23:12:23.210384  No KMS driver or no outputs, pipes: 8, outputs<14>[   26.389691] [IGT] kms_vblank: executing

12817 23:12:23.213309  <14>[   26.390521] [IGT] kms_vblank: exiting, ret=77

12818 23:12:23.220215  <8>[   26.396113] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-busy-hang RESULT=skip>

12819 23:12:23.220502  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-busy-hang RESULT=skip
12821 23:12:23.222978  : 0

12822 23:12:23.229923  Subtest pipe-C-wait-forked-busy: SKIP (<14>[   26.410779] [IGT] kms_vblank: executing

12823 23:12:23.230024  0.000s)

12824 23:12:23.236792  IGT<14>[   26.411248] [IGT] kms_vblank: exiting, ret=77

12825 23:12:23.243702  <8>[   26.415624] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-busy RESULT=skip>

12826 23:12:23.243974  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-busy RESULT=skip
12828 23:12:23.249903  -Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12829 23:12:23.253426  Opened device: /dev/dri/card0

12830 23:12:23.256875  No KMS dri<14>[   26.441087] [IGT] kms_vblank: executing

12831 23:12:23.266257  ver or no outputs, pipes: 8, out<14>[   26.447396] [IGT] kms_vblank: exiting, ret=77

12832 23:12:23.273012  <8>[   26.452055] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-query-forked-busy-hang RESULT=skip>

12833 23:12:23.273095  puts: 0

12834 23:12:23.273332  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-query-forked-busy-hang RESULT=skip
12836 23:12:23.280122  Subtest pipe-C-wait<14>[   26.463042] [IGT] kms_vblank: executing

12837 23:12:23.286757  -forked-busy-han<14>[   26.463503] [IGT] kms_vblank: exiting, ret=77

12838 23:12:23.293414  <8>[   26.468396] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-idle RESULT=skip>

12839 23:12:23.293684  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-idle RESULT=skip
12841 23:12:23.296941  g: SKIP (0.000s)

12842 23:12:23.303340  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12843 23:12:23.306438  Opened device: /dev/dri/card0

12844 23:12:23.309962  No KMS driver or no outputs, pipes: 8, outputs: 0

12845 23:12:23.316729  Subtest pipe-C-ts-continuation-idle: SKIP <14>[   26.498083] [IGT] kms_vblank: executing

12846 23:12:23.323097  <14>[   26.498847] [IGT] kms_vblank: exiting, ret=77

12847 23:12:23.330566  <8>[   26.503960] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-idle-hang RESULT=skip>

12848 23:12:23.330649  (0.000s)

12849 23:12:23.330919  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-idle-hang RESULT=skip
12851 23:12:23.336421  IGT-Version: 1.27.<14>[   26.519470] [IGT] kms_vblank: executing

12852 23:12:23.343011  1-g621c2d3 (aarc<14>[   26.519932] [IGT] kms_vblank: exiting, ret=77

12853 23:12:23.349969  <8>[   26.524987] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked RESULT=skip>

12854 23:12:23.350223  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked RESULT=skip
12856 23:12:23.353297  h64) (Linux: 6.1.67-cip12-rt7 aarch64)

12857 23:12:23.356337  Opened device: /dev/dri/card0

12858 23:12:23.362689  No KMS driver or no outputs, pipes: 8, ou<14>[   26.547207] [IGT] kms_vblank: executing

12859 23:12:23.366172  tputs: 0

12860 23:12:23.369741  Subtest pipe-C-ts-continuation-idle-hang: SKIP (0.000s)

12861 23:12:23.376187  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12862 23:12:23.380045  Opened device: /dev/dri/card0

12863 23:12:23.386435  No KMS driver or no outputs, pipes: 8, outputs: 0

12864 23:12:23.390001  Subtest pipe-C-ts-continuation-dpms-rpm: SKIP (0.000s)

12865 23:12:23.396192  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12866 23:12:23.399298  Opened device: /dev/dri/card0

12867 23:12:23.402887  No KMS driver or no outputs, pipes: 8, outputs: 0

12868 23:12:23.409193  Subtest pipe-C-ts-continuation-dpms-suspend: SKIP (0.000s)

12869 23:12:23.415891  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12870 23:12:23.419897  Opened device: /dev/dri/card0

12871 23:12:23.423014  No KMS driver or no outputs, pipes: 8, outputs: 0

12872 23:12:23.429489  Subtest pipe-C-ts-continuation-suspend: SKIP (0.000s)

12873 23:12:23.435939  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12874 23:12:23.439504  Opened device: /dev/dri/card0

12875 23:12:23.442683  No KMS driver or no outputs, pipes: 8, outputs: 0

12876 23:12:23.449081  Subtest pipe-C-ts-continuation-modeset: SKIP (0.000s)

12877 23:12:23.452591  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12878 23:12:23.455747  Opened device: /dev/dri/card0

12879 23:12:23.462517  No KMS driver or no outputs, pipes: 8, outputs: 0

12880 23:12:23.466642  Subtest pipe-C-ts-continuation-modeset-hang: SKIP (0.000s)

12881 23:12:23.473672  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12882 23:12:23.475849  Opened device: /dev/dri/card0

12883 23:12:23.479205  No KMS driver or no outputs, pipes: 8, outputs: 0

12884 23:12:23.486178  Subtest pipe-C-ts-continuation-modeset-rpm: SKIP (0.000s)

12885 23:12:23.492503  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12886 23:12:23.496070  Opened device: /dev/dri/card0

12887 23:12:23.499359  No KMS driver or no outputs, pipes: 8, outputs: 0

12888 23:12:23.505917  Subtest pipe-D-accuracy-idle: SKIP (0.000s)

12889 23:12:23.512354  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12890 23:12:23.512437  Opened device: /dev/dri/card0

12891 23:12:23.519477  No KMS driver or no outputs, pipes: 8, outputs: 0

12892 23:12:23.522289  Subtest pipe-D-query-idle: SKIP (0.000s)

12893 23:12:23.529463  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12894 23:12:23.532138  Opened device: /dev/dri/card0

12895 23:12:23.535860  No KMS driver or no outputs, pipes: 8, outputs: 0

12896 23:12:23.542286  Subtest pipe-D-query-idle-hang: SKIP (0.000s)

12897 23:12:23.549181  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12898 23:12:23.549265  Opened device: /dev/dri/card0

12899 23:12:23.555244  No KMS driver or no outputs, pipes: 8, outputs: 0

12900 23:12:23.559102  Subtest pipe-D-query-forked: SKIP (0.000s)

12901 23:12:23.565919  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12902 23:12:23.568869  Opened device: /dev/dri/card0

12903 23:12:23.571789  No KMS driver or no outputs, pipes: 8, outputs: 0

12904 23:12:23.578428  Subtest pipe-D-query-forked-hang: SKIP (0.000s)

12905 23:12:23.585402  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12906 23:12:23.585486  Opened device: /dev/dri/card0

12907 23:12:23.592114  No KMS driver or no outputs, pipes: 8, outputs: 0

12908 23:12:23.595222  Subtest pipe-D-query-busy: SKIP (0.000s)

12909 23:12:23.602235  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12910 23:12:23.605341  Opened device: /dev/dri/card0

12911 23:12:23.609050  No KMS driver or no outputs, pipes: 8, outputs: 0

12912 23:12:23.612020  Subtest pipe-D-query-busy-hang: SKIP (0.000s)

12913 23:12:23.618865  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12914 23:12:23.621769  Opened device: /dev/dri/card0

12915 23:12:23.628156  No KMS driver or no outputs, pipes: 8, outputs: 0

12916 23:12:23.631742  Subtest pipe-D-query-forked-busy: SKIP (0.000s)

12917 23:12:23.638978  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12918 23:12:23.641747  Opened device: /dev/dri/card0

12919 23:12:23.644978  No KMS driver or no outputs, pipes: 8, outputs: 0

12920 23:12:23.651330  Subtest pipe-D-query-forked-busy-hang: SKIP (0.000s)

12921 23:12:23.658184  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12922 23:12:23.661374  Opened device: /dev/dri/card0

12923 23:12:23.665001  No KMS driver or no outputs, pipes: 8, outputs: 0

12924 23:12:23.668412  Subtest pipe-D-wait-idle: SKIP (0.000s)

12925 23:12:23.675106  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12926 23:12:23.677927  Opened device: /dev/dri/card0

12927 23:12:23.681774  No KMS driver or no outputs, pipes: 8, outputs: 0

12928 23:12:23.688322  Subtest pipe-D-wait-idle-hang: SKIP (0.000s)

12929 23:12:23.694684  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12930 23:12:23.694767  Opened device: /dev/dri/card0

12931 23:12:23.701256  No KM<14>[   26.885073] [IGT] kms_vblank: exiting, ret=77

12932 23:12:23.705015  S driver or no outputs, pipes: 8, outputs: 0

12933 23:12:23.714916  [<8>[   26.891152] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-hang RESULT=skip>

12934 23:12:23.715179  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-hang RESULT=skip
12936 23:12:23.717894  1mSubtest pipe-D-wait-forked: SKIP (0.000s)

12937 23:12:23.721228  <14>[   26.902778] [IGT] kms_vblank: executing

12938 23:12:23.728356  <14>[   26.903295] [IGT] kms_vblank: exiting, ret=77

12939 23:12:23.734738  <8>[   26.907898] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-busy RESULT=skip>

12940 23:12:23.734835  

12941 23:12:23.735088  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-busy RESULT=skip
12943 23:12:23.741324  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12944 23:12:23.744356  Opened device: /dev/dri/card0

12945 23:12:23.747931  No KMS driver or no outputs, pipes: 8, outputs: 0

12946 23:12:23.754041  Subtest pipe-D-<14>[   26.936175] [IGT] kms_vblank: executing

12947 23:12:23.757491  <14>[   26.937011] [IGT] kms_vblank: exiting, ret=77

12948 23:12:23.764386  <8>[   26.942891] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-busy-hang RESULT=skip>

12949 23:12:23.764639  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-busy-hang RESULT=skip
12951 23:12:23.767773  wait-forked-hang: SKIP (0.000s)

12952 23:12:23.774280  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12953 23:12:23.781149  Opened device: /d<14>[   26.965113] [IGT] kms_vblank: executing

12954 23:12:23.781271  ev/dri/card0

12955 23:12:23.790835  No KMS driver or no outputs, pipes<14>[   26.970840] [IGT] kms_vblank: exiting, ret=77

12956 23:12:23.797471  <8>[   26.975918] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-busy RESULT=skip>

12957 23:12:23.797755  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-busy RESULT=skip
12959 23:12:23.800769  : 8, outputs: 0

12960 23:12:23.804476  Subtest pip<14>[   26.988550] [IGT] kms_vblank: executing

12961 23:12:23.810795  <14>[   26.989145] [IGT] kms_vblank: exiting, ret=77

12962 23:12:23.818019  <8>[   26.995800] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-wait-forked-busy-hang RESULT=skip>

12963 23:12:23.818273  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-wait-forked-busy-hang RESULT=skip
12965 23:12:23.824059  e-D-wait-busy: SKIP (0.000s)<14>[   27.007713] [IGT] kms_vblank: executing

12966 23:12:23.831007  <14>[   27.008259] [IGT] kms_vblank: exiting, ret=77

12967 23:12:23.831089  

12968 23:12:23.837479  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-idle RESULT=skip
12970 23:12:23.841022  IGT-Version: 1<8>[   27.012715] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-idle RESULT=skip>

12971 23:12:23.844036  .27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12972 23:12:23.847842  Opened device: /dev/dri/card0

12973 23:12:23.850584  No KMS driver or no outputs, pipes: 8, outputs: 0

12974 23:12:23.857221  Subtest pipe-D<14>[   27.037738] [IGT] kms_vblank: executing

12975 23:12:23.860825  <14>[   27.038631] [IGT] kms_vblank: exiting, ret=77

12976 23:12:23.870238  <8>[   27.044130] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-idle-hang RESULT=skip>

12977 23:12:23.870520  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-idle-hang RESULT=skip
12979 23:12:23.876945  -wait-busy-hang: SKIP (0.000s)[<14>[   27.060137] [IGT] kms_vblank: executing

12980 23:12:23.883414  <14>[   27.060657] [IGT] kms_vblank: exiting, ret=77

12981 23:12:23.890123  <8>[   27.067097] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-dpms-rpm RESULT=skip>

12982 23:12:23.890204  0m

12983 23:12:23.890435  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-dpms-rpm RESULT=skip
12985 23:12:23.896714  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

12986 23:12:23.900698  Opened device: /dev/dri/card0

12987 23:12:23.903609  No <14>[   27.087810] [IGT] kms_vblank: executing

12988 23:12:23.910006  <14>[   27.088415] [IGT] kms_vblank: exiting, ret=77

12989 23:12:23.916894  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-dpms-suspend RESULT=skip
12991 23:12:23.920436  <8>[   27.095671] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-dpms-suspend RESULT=skip>

12992 23:12:23.926560  KMS driver or no outputs, pipes:<14>[   27.108066] [IGT] kms_vblank: executing

12993 23:12:23.930275  <14>[   27.108589] [IGT] kms_vblank: exiting, ret=77

12994 23:12:23.939961  <8>[   27.115985] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-suspend RESULT=skip>

12995 23:12:23.940070   8, outputs: 0

12996 23:12:23.940338  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-suspend RESULT=skip
12998 23:12:23.943400  <14>[   27.128285] [IGT] kms_vblank: executing

12999 23:12:23.950048  <14>[   27.128798] [IGT] kms_vblank: exiting, ret=77

13000 23:12:23.959560  Subtest pipe<8>[   27.135403] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset RESULT=skip>

13001 23:12:23.959842  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset RESULT=skip
13003 23:12:23.963261  -D-wait-forked-b<14>[   27.148574] [IGT] kms_vblank: executing

13004 23:12:23.969949  <14>[   27.149034] [IGT] kms_vblank: exiting, ret=77

13005 23:12:23.980128  usy: SKIP (0.000<8>[   27.154595] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset-hang RESULT=skip>

13006 23:12:23.980234  s)

13007 23:12:23.980511  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset-hang RESULT=skip
13009 23:12:23.986350  IGT-Vers<14>[   27.169327] [IGT] kms_vblank: executing

13010 23:12:23.992863  ion: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-ci<14>[   27.175371] [IGT] kms_vblank: exiting, ret=77

13011 23:12:24.002729  <8>[   27.181239] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-D-ts-continuation-modeset-rpm RESULT=skip>

13012 23:12:24.003012  Received signal: <TESTCASE> TEST_CASE_ID=pipe-D-ts-continuation-modeset-rpm RESULT=skip
13014 23:12:24.009771  p12-rt7 aarch64)<14>[   27.192727] [IGT] kms_vblank: executing

13015 23:12:24.012632  <14>[   27.193199] [IGT] kms_vblank: exiting, ret=77

13016 23:12:24.019703  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-accuracy-idle RESULT=skip
13018 23:12:24.023231  <8>[   27.199774] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-accuracy-idle RESULT=skip>

13019 23:12:24.023311  

13020 23:12:24.023380  Opened device: /dev/dri/card0

13021 23:12:24.029249  No KMS driver o<14>[   27.210726] [IGT] kms_vblank: executing

13022 23:12:24.036026  <14>[   27.211204] [IGT] kms_vblank: exiting, ret=77

13023 23:12:24.042734  <8>[   27.217320] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-idle RESULT=skip>

13024 23:12:24.043010  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-idle RESULT=skip
13026 23:12:24.049299  r no outputs, pipes: 8, outputs:<14>[   27.231271] [IGT] kms_vblank: executing

13027 23:12:24.052495  <14>[   27.231745] [IGT] kms_vblank: exiting, ret=77

13028 23:12:24.062989  <8>[   27.236768] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-idle-hang RESULT=skip>

13029 23:12:24.063094   0

13030 23:12:24.063359  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-idle-hang RESULT=skip
13032 23:12:24.068753  Subtest pipe-D-wait-forked-busy-hang: SK<14>[   27.250820] [IGT] kms_vblank: executing

13033 23:12:24.075744  <14>[   27.251305] [IGT] kms_vblank: exiting, ret=77

13034 23:12:24.082196  <8>[   27.258558] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked RESULT=skip>

13035 23:12:24.082301  IP (0.000s)

13036 23:12:24.082566  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked RESULT=skip
13038 23:12:24.088668  IGT-Version: 1.<14>[   27.271525] [IGT] kms_vblank: executing

13039 23:12:24.092109  <14>[   27.271999] [IGT] kms_vblank: exiting, ret=77

13040 23:12:24.102169  <8>[   27.277072] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-hang RESULT=skip>

13041 23:12:24.102435  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-hang RESULT=skip
13043 23:12:24.109289  27.1-g621c2d3 (aarch64) (Linux: <14>[   27.291264] [IGT] kms_vblank: executing

13044 23:12:24.115182  6.1.67-cip12-rt7<14>[   27.291739] [IGT] kms_vblank: exiting, ret=77

13045 23:12:24.122349  <8>[   27.296010] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-busy RESULT=skip>

13046 23:12:24.122485   aarch64)

13047 23:12:24.122721  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-busy RESULT=skip
13049 23:12:24.125702  Opened device: /dev/dri/card0

13050 23:12:24.128393  No KMS driver or no outputs, pipes: 8, outputs: 0

13051 23:12:24.138355  Subtest pipe-D-ts-continuation-<14>[   27.318551] [IGT] kms_vblank: executing

13052 23:12:24.142378  <14>[   27.319416] [IGT] kms_vblank: exiting, ret=77

13053 23:12:24.148678  <8>[   27.325376] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-busy-hang RESULT=skip>

13054 23:12:24.148958  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-busy-hang RESULT=skip
13056 23:12:24.152195  idle: SKIP (0.000s)

13057 23:12:24.155235  IGT-Ver<14>[   27.339585] [IGT] kms_vblank: executing

13058 23:12:24.161735  <14>[   27.340043] [IGT] kms_vblank: exiting, ret=77

13059 23:12:24.169142  <8>[   27.345371] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-busy RESULT=skip>

13060 23:12:24.169419  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-busy RESULT=skip
13062 23:12:24.175157  sion: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13063 23:12:24.178404  Opened device: /dev/dri/card0

13064 23:12:24.182292  No KMS driver or no outputs, pipes: 8, outputs: 0

13065 23:12:24.189079  Subtest pipe-D-ts-conti<14>[   27.372617] [IGT] kms_vblank: executing

13066 23:12:24.191640  nuation-idle-hang: SKIP (0.000s)

13067 23:12:24.198302  IGT-Versio<14>[   27.373421] [IGT] kms_vblank: exiting, ret=77

13068 23:12:24.208911  n: 1.27.1-g621c2<8>[   27.383658] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-query-forked-busy-hang RESULT=skip>

13069 23:12:24.209214  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-query-forked-busy-hang RESULT=skip
13071 23:12:24.211439  d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13072 23:12:24.214956  Opened device: /dev/dri/card0

13073 23:12:24.221375  No KMS driver or <14>[   27.403068] [IGT] kms_vblank: executing

13074 23:12:24.224947  <14>[   27.403909] [IGT] kms_vblank: exiting, ret=77

13075 23:12:24.231492  <8>[   27.409041] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-idle RESULT=skip>

13076 23:12:24.231764  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-idle RESULT=skip
13078 23:12:24.234848  no outputs, pipes: 8, outputs: 0

13079 23:12:24.241504  Subtest pi<14>[   27.421974] [IGT] kms_vblank: executing

13080 23:12:24.244598  <14>[   27.422453] [IGT] kms_vblank: exiting, ret=77

13081 23:12:24.254469  <8>[   27.429736] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-idle-hang RESULT=skip>

13082 23:12:24.254764  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-idle-hang RESULT=skip
13084 23:12:24.260995  pe-D-ts-continuation-dpms-rpm: SKIP (0.000s)<14>[   27.442850] [IGT] kms_vblank: executing

13085 23:12:24.268121  <14>[   27.443311] [IGT] kms_vblank: exiting, ret=77

13086 23:12:24.274446  <8>[   27.450875] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked RESULT=skip>

13087 23:12:24.274529  

13088 23:12:24.274768  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked RESULT=skip
13090 23:12:24.281304  IGT-Version: 1.27.1-g621c2d3 (<14>[   27.463489] [IGT] kms_vblank: executing

13091 23:12:24.287773  aarch64) (Linux:<14>[   27.463955] [IGT] kms_vblank: exiting, ret=77

13092 23:12:24.294287  <8>[   27.471141] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-hang RESULT=skip>

13093 23:12:24.294582  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-hang RESULT=skip
13095 23:12:24.300713   6.1.67-cip12-rt<14>[   27.484481] [IGT] kms_vblank: executing

13096 23:12:24.300834  7 aarch64)

13097 23:12:24.308053  Open<14>[   27.484945] [IGT] kms_vblank: exiting, ret=77

13098 23:12:24.314774  <8>[   27.492636] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-busy RESULT=skip>

13099 23:12:24.315063  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-busy RESULT=skip
13101 23:12:24.318200  ed device: /dev/dri/card0

13102 23:12:24.321213  No KM<14>[   27.503497] [IGT] kms_vblank: executing

13103 23:12:24.323936  S driver or no outputs, pipes: 8, outputs: 0

13104 23:12:24.330668  Subtest pipe-D-ts-continuation-dpms-suspend: SKIP (0.000s)

13105 23:12:24.337652  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13106 23:12:24.340771  Opened device: /dev/dri/card0

13107 23:12:24.344063  No KMS driver or no outputs, pipes: 8, outputs: 0

13108 23:12:24.350342  Subtest pipe-D-ts-continuation-suspend: SKIP (0.000s)

13109 23:12:24.357282  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13110 23:12:24.357390  Opened device: /dev/dri/card0

13111 23:12:24.364058  No KMS driver or no outputs, pipes: 8, outputs: 0

13112 23:12:24.367259  Subtest pipe-D-ts-continuation-modeset: SKIP (0.000s)

13113 23:12:24.373987  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13114 23:12:24.377652  Opened device: /dev/dri/card0

13115 23:12:24.383962  No KMS driver or no outputs, pipes: 8, outputs: 0

13116 23:12:24.387074  Subtest pipe-D-ts-continuation-modeset-hang: SKIP (0.000s)

13117 23:12:24.394101  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13118 23:12:24.397316  Opened device: /dev/dri/card0

13119 23:12:24.400489  No KMS driver or no outputs, pipes: 8, outputs: 0

13120 23:12:24.407343  Subtest pipe-D-ts-continuation-modeset-rpm: SKIP (0.000s)

13121 23:12:24.413438  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13122 23:12:24.417405  Opened device: /dev/dri/card0

13123 23:12:24.420673  No KMS driver or no outputs, pipes: 8, outputs: 0

13124 23:12:24.426611  Subtest pipe-E-accuracy-idle: SKIP (0.000s)

13125 23:12:24.433471  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13126 23:12:24.433567  Opened device: /dev/dri/card0

13127 23:12:24.439893  No KMS driver or no outputs, pipes: 8, outputs: 0

13128 23:12:24.443983  Subtest pipe-E-query-idle: SKIP (0.000s)

13129 23:12:24.450026  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13130 23:12:24.453954  Opened device: /dev/dri/card0

13131 23:12:24.457201  No KMS driver or no outputs, pipes: 8, outputs: 0

13132 23:12:24.463539  Subtest pipe-E-query-idle-hang: SKIP (0.000s)

13133 23:12:24.469807  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13134 23:12:24.469918  Opened device: /dev/dri/card0

13135 23:12:24.476767  No KMS driver or no outputs, pipes: 8, outputs: 0

13136 23:12:24.479620  Subtest pipe-E-query-forked: SKIP (0.000s)

13137 23:12:24.486501  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13138 23:12:24.489905  Opened device: /dev/dri/card0

13139 23:12:24.492950  No KMS driver or no outputs, pipes: 8, outputs: 0

13140 23:12:24.499731  Subtest pipe-E-query-forked-hang: SKIP (0.000s)

13141 23:12:24.506806  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13142 23:12:24.506891  Opened device: /dev/dri/card0

13143 23:12:24.513009  No KMS driver or no outputs, pipes: 8, outputs: 0

13144 23:12:24.516112  Subtest pipe-E-query-busy: SKIP (0.000s)

13145 23:12:24.522887  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13146 23:12:24.525865  Opened device: /dev/dri/card0

13147 23:12:24.529296  No KMS driver or no outputs, pipes: 8, outputs: 0

13148 23:12:24.536214  Subtest pipe-E-query-busy-hang: SKIP (0.000s)

13149 23:12:24.542560  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13150 23:12:24.542668  Opened device: /dev/dri/card0

13151 23:12:24.549072  No KMS driver or no outputs, pipes: 8, outputs: 0

13152 23:12:24.552170  Subtest pipe-E-query-forked-busy: SKIP (0.000s)

13153 23:12:24.559127  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13154 23:12:24.562293  Opened device: /dev/dri/card0

13155 23:12:24.566153  No KMS driver or no outputs, pipes: 8, outputs: 0

13156 23:12:24.572612  Subtest pipe-E-query-forked-busy-hang: SKIP (0.000s)

13157 23:12:24.579278  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13158 23:12:24.582318  Opened device: /dev/dri/card0

13159 23:12:24.585797  No KMS driver or no outputs, pipes: 8, outputs: 0

13160 23:12:24.589133  Subtest pipe-E-wait-idle: SKIP (0.000s)

13161 23:12:24.595443  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13162 23:12:24.598739  Opened device: /dev/dri/card0

13163 23:12:24.602846  No KMS driver or no outputs, pipes: 8, outputs: 0

13164 23:12:24.608940  Subtest pipe-E-wait-idle-hang: SKIP (0.000s)

13165 23:12:24.615981  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13166 23:12:24.616085  Opened device: /dev/dri/card0

13167 23:12:24.622552  No KMS driver or no outputs, pipes: 8, outputs: 0

13168 23:12:24.626305  Subtest pipe-E-wait-forked: SKIP (0.000s)

13169 23:12:24.632185  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13170 23:12:24.635395  Opened device: /dev/dri/card0

13171 23:12:24.638991  No KMS driver or no outputs, pipes: 8, outputs: 0

13172 23:12:24.645288  Subtest pipe-E-wait-forked-hang: SKIP (0.000s)

13173 23:12:24.652144  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13174 23:12:24.658514  Opened device: /dev/dr<14>[   27.841330] [IGT] kms_vblank: exiting, ret=77

13175 23:12:24.658597  i/card0

13176 23:12:24.665029  No KMS <8>[   27.846165] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-busy-hang RESULT=skip>

13177 23:12:24.665320  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-busy-hang RESULT=skip
13179 23:12:24.672137  driver or no outputs, pipes: 8, outputs: 0

13180 23:12:24.675590  Subtest pipe-E-wait-busy: SKIP (0.000s)

13181 23:12:24.685601  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aar<14>[   27.868768] [IGT] kms_vblank: executing

13182 23:12:24.688659  <14>[   27.869703] [IGT] kms_vblank: exiting, ret=77

13183 23:12:24.688760  ch64)

13184 23:12:24.692055  Opened device: /dev/dri/card0

13185 23:12:24.705400  No KMS driver or no outputs, pipes: 8, out<8>[   27.884009] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-busy RESULT=skip>

13186 23:12:24.705512  puts: 0

13187 23:12:24.705761  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-busy RESULT=skip
13189 23:12:24.709003  Subtest pipe-E-wait-busy-hang: SKIP (0.000s)

13190 23:12:24.715427  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13191 23:12:24.718282  Opened device: /dev/dri/card0

13192 23:12:24.721936  No KMS driver or no outputs, pipes: 8, outputs: 0

13193 23:12:24.728259  Subtest pipe-E-wa<14>[   27.911705] [IGT] kms_vblank: executing

13194 23:12:24.735083  <14>[   27.912583] [IGT] kms_vblank: exiting, ret=77

13195 23:12:24.741412  <8>[   27.918682] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-wait-forked-busy-hang RESULT=skip>

13196 23:12:24.741699  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-wait-forked-busy-hang RESULT=skip
13198 23:12:24.748144  it-forked-busy: SKIP (0.000s)[0<14>[   27.932017] [IGT] kms_vblank: executing

13199 23:12:24.755328  <14>[   27.932559] [IGT] kms_vblank: exiting, ret=77

13200 23:12:24.761421  <8>[   27.937169] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-idle RESULT=skip>

13201 23:12:24.761500  m

13202 23:12:24.761740  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-idle RESULT=skip
13204 23:12:24.768156  IGT-Version: 1.27.1-g621c2d3 <14>[   27.951986] [IGT] kms_vblank: executing

13205 23:12:24.774966  (aarch64) (Linux<14>[   27.952567] [IGT] kms_vblank: exiting, ret=77

13206 23:12:24.784583  <8>[   27.959354] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-idle-hang RESULT=skip>

13207 23:12:24.784867  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-idle-hang RESULT=skip
13209 23:12:24.787987  : 6.1.67-cip12-rt7 aarch64)

13210 23:12:24.791814  Opened device: /dev<14>[   27.973780] [IGT] kms_vblank: executing

13211 23:12:24.794626  /dri/card0

13212 23:12:24.797992  No K<14>[   27.974374] [IGT] kms_vblank: exiting, ret=77

13213 23:12:24.807941  MS driver or no <8>[   27.979046] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-dpms-rpm RESULT=skip>

13214 23:12:24.808228  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-dpms-rpm RESULT=skip
13216 23:12:24.811668  outputs, pipes: 8, outputs: 0

13217 23:12:24.818314  Subtest pipe-E-wait-forked-busy-hang: SKIP (0.000s)

13218 23:12:24.821444  IGT-<14>[   28.002028] [IGT] kms_vblank: executing

13219 23:12:24.824986  <14>[   28.002951] [IGT] kms_vblank: exiting, ret=77

13220 23:12:24.834510  <8>[   28.008068] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-dpms-suspend RESULT=skip>

13221 23:12:24.834763  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-dpms-suspend RESULT=skip
13223 23:12:24.841850  Version: 1.27.1-<14>[   28.024423] [IGT] kms_vblank: executing

13224 23:12:24.845373  <14>[   28.024944] [IGT] kms_vblank: exiting, ret=77

13225 23:12:24.854894  <8>[   28.034446] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-suspend RESULT=skip>

13226 23:12:24.855207  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-suspend RESULT=skip
13228 23:12:24.858494  g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13229 23:12:24.865042  Opened device: /dev/dri/ca<14>[   28.045818] [IGT] kms_vblank: executing

13230 23:12:24.865147  rd0

13231 23:12:24.871103  No KMS driv<14>[   28.046330] [IGT] kms_vblank: exiting, ret=77

13232 23:12:24.878237  <8>[   28.050773] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset RESULT=skip>

13233 23:12:24.878516  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset RESULT=skip
13235 23:12:24.881198  er or no outputs, pipes: 8, outputs: 0

13236 23:12:24.887872  Subtest pipe-E-ts-continuation-idle: SKIP (0.000s)

13237 23:12:24.894606  IGT-Version:<14>[   28.076633] [IGT] kms_vblank: executing

13238 23:12:24.898229  <14>[   28.077564] [IGT] kms_vblank: exiting, ret=77

13239 23:12:24.904670   1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13240 23:12:24.914857  Opened device: /de<8>[   28.092014] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset-hang RESULT=skip>

13241 23:12:24.914967  v/dri/card0

13242 23:12:24.915236  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset-hang RESULT=skip
13244 23:12:24.921550  No KMS driver or no<14>[   28.103625] [IGT] kms_vblank: executing

13245 23:12:24.928116   outputs, pipes:<14>[   28.104141] [IGT] kms_vblank: exiting, ret=77

13246 23:12:24.934691  <8>[   28.111127] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-E-ts-continuation-modeset-rpm RESULT=skip>

13247 23:12:24.934982  Received signal: <TESTCASE> TEST_CASE_ID=pipe-E-ts-continuation-modeset-rpm RESULT=skip
13249 23:12:24.937879   8, outputs: 0

13250 23:12:24.944668  Subtest pipe-E-ts-continuation-idle-hang: SKIP (0.000s)

13251 23:12:24.951203  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7<14>[   28.133782] [IGT] kms_vblank: executing

13252 23:12:24.957762  <14>[   28.134632] [IGT] kms_vblank: exiting, ret=77

13253 23:12:24.965002  <8>[   28.139786] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-accuracy-idle RESULT=skip>

13254 23:12:24.965085   aarch64)

13255 23:12:24.965322  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-accuracy-idle RESULT=skip
13257 23:12:24.967898  Opened device: /dev/dri/card0

13258 23:12:24.974960  No KMS<14>[   28.154618] [IGT] kms_vblank: executing

13259 23:12:24.978202  <14>[   28.155135] [IGT] kms_vblank: exiting, ret=77

13260 23:12:24.984288  <8>[   28.159726] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-idle RESULT=skip>

13261 23:12:24.984543  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-idle RESULT=skip
13263 23:12:24.990995   driver or no outputs, pipes: 8,<14>[   28.175123] [IGT] kms_vblank: executing

13264 23:12:24.994694   outputs: 0

13265 23:12:24.997442  [1<14>[   28.175640] [IGT] kms_vblank: exiting, ret=77

13266 23:12:25.007768  <8>[   28.182996] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-idle-hang RESULT=skip>

13267 23:12:25.008023  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-idle-hang RESULT=skip
13269 23:12:25.011264  mSubtest pipe-E-ts-continuation-dpms-rpm: SKIP (0.000s)

13270 23:12:25.020905  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.<14>[   28.205355] [IGT] kms_vblank: executing

13271 23:12:25.020988  67-cip12-rt7 aarch64)

13272 23:12:25.030938  Opened device: /dev/dri/c<14>[   28.210403] [IGT] kms_vblank: exiting, ret=77

13273 23:12:25.038017  <8>[   28.215461] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked RESULT=skip>

13274 23:12:25.038100  ard0

13275 23:12:25.038336  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked RESULT=skip
13277 23:12:25.044083  No KMS driver or no outputs, pipes: 8, out<14>[   28.227350] [IGT] kms_vblank: executing

13278 23:12:25.050956  <14>[   28.227835] [IGT] kms_vblank: exiting, ret=77

13279 23:12:25.057366  <8>[   28.232464] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-hang RESULT=skip>

13280 23:12:25.057470  puts: 0

13281 23:12:25.057711  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-hang RESULT=skip
13283 23:12:25.064293  Subtest pipe-E-ts-c<14>[   28.247589] [IGT] kms_vblank: executing

13284 23:12:25.070766  ontinuation-dpms<14>[   28.248096] [IGT] kms_vblank: exiting, ret=77

13285 23:12:25.080187  -suspend: SKIP (<8>[   28.252735] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-busy RESULT=skip>

13286 23:12:25.080294  0.000s)

13287 23:12:25.080567  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-busy RESULT=skip
13289 23:12:25.087468  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13290 23:12:25.094304  Opened de<14>[   28.275369] [IGT] kms_vblank: executing

13291 23:12:25.096772  <14>[   28.276232] [IGT] kms_vblank: exiting, ret=77

13292 23:12:25.103668  <8>[   28.281422] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-busy-hang RESULT=skip>

13293 23:12:25.103930  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-busy-hang RESULT=skip
13295 23:12:25.106977  vice: /dev/dri/card0

13296 23:12:25.113682  No KMS driver or no output<14>[   28.294532] [IGT] kms_vblank: executing

13297 23:12:25.116809  <14>[   28.294993] [IGT] kms_vblank: exiting, ret=77

13298 23:12:25.127020  <8>[   28.304370] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-busy RESULT=skip>

13299 23:12:25.127133  s, pipes: 8, outputs: 0

13300 23:12:25.127401  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-busy RESULT=skip
13302 23:12:25.133824  Sub<14>[   28.315672] [IGT] kms_vblank: executing

13303 23:12:25.140063  test pipe-E-ts-c<14>[   28.316148] [IGT] kms_vblank: exiting, ret=77

13304 23:12:25.147099  <8>[   28.320279] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-query-forked-busy-hang RESULT=skip>

13305 23:12:25.147383  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-query-forked-busy-hang RESULT=skip
13307 23:12:25.149906  ontinuation-suspend: SKIP (0.000s)

13308 23:12:25.156753  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13309 23:12:25.160335  Opened device: /dev/dri/card0

13310 23:12:25.166881  No KMS driver o<14>[   28.346669] [IGT] kms_vblank: executing

13311 23:12:25.169884  <14>[   28.347486] [IGT] kms_vblank: exiting, ret=77

13312 23:12:25.176540  <8>[   28.352498] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-idle RESULT=skip>

13313 23:12:25.176819  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-idle RESULT=skip
13315 23:12:25.183585  r no outputs, pipes: 8, outputs:<14>[   28.367256] [IGT] kms_vblank: executing

13316 23:12:25.190611  <14>[   28.367734] [IGT] kms_vblank: exiting, ret=77

13317 23:12:25.197205  <8>[   28.371939] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-idle-hang RESULT=skip>

13318 23:12:25.197283   0

13319 23:12:25.197518  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-idle-hang RESULT=skip
13321 23:12:25.206676  Subtest pipe-E-ts-continuation-modeset: <14>[   28.386786] [IGT] kms_vblank: executing

13322 23:12:25.210216  <14>[   28.387281] [IGT] kms_vblank: exiting, ret=77

13323 23:12:25.216655  <8>[   28.391489] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked RESULT=skip>

13324 23:12:25.216939  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked RESULT=skip
13326 23:12:25.220266  SKIP (0.000s)

13327 23:12:25.227086  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13328 23:12:25.229698  Opened device: /dev/dri/card0

13329 23:12:25.233469  No K<14>[   28.414160] [IGT] kms_vblank: executing

13330 23:12:25.236884  <14>[   28.415077] [IGT] kms_vblank: exiting, ret=77

13331 23:12:25.246886  <8>[   28.420196] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-hang RESULT=skip>

13332 23:12:25.247140  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-hang RESULT=skip
13334 23:12:25.253054  MS driver or no outputs, pipes: <14>[   28.435333] [IGT] kms_vblank: executing

13335 23:12:25.256539  <14>[   28.435810] [IGT] kms_vblank: exiting, ret=77

13336 23:12:25.263205  <8>[   28.443503] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-busy RESULT=skip>

13337 23:12:25.263479  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-busy RESULT=skip
13339 23:12:25.266631  8, outputs: 0

13340 23:12:25.272958  Subtest pipe-E-ts-continuatio<14>[   28.454392] [IGT] kms_vblank: executing

13341 23:12:25.276645  <14>[   28.454873] [IGT] kms_vblank: exiting, ret=77

13342 23:12:25.286568  <8>[   28.460650] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-busy-hang RESULT=skip>

13343 23:12:25.286859  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-busy-hang RESULT=skip
13345 23:12:25.293306  n-modeset-hang: SKIP (0.000s)[0<14>[   28.475209] [IGT] kms_vblank: executing

13346 23:12:25.296437  <14>[   28.475686] [IGT] kms_vblank: exiting, ret=77

13347 23:12:25.306392  <8>[   28.481566] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-busy RESULT=skip>

13348 23:12:25.306505  m

13349 23:12:25.306741  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-busy RESULT=skip
13351 23:12:25.312989  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux<14>[   28.494830] [IGT] kms_vblank: executing

13352 23:12:25.320000  <14>[   28.495311] [IGT] kms_vblank: exiting, ret=77

13353 23:12:25.326293  <8>[   28.499584] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-wait-forked-busy-hang RESULT=skip>

13354 23:12:25.326595  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-wait-forked-busy-hang RESULT=skip
13356 23:12:25.329448  : 6.1.67-cip12-rt7 aarch64)

13357 23:12:25.333162  Ope<14>[   28.516316] [IGT] kms_vblank: executing

13358 23:12:25.339334  <14>[   28.516790] [IGT] kms_vblank: exiting, ret=77

13359 23:12:25.346692  <8>[   28.523518] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-idle RESULT=skip>

13360 23:12:25.346945  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-idle RESULT=skip
13362 23:12:25.349659  ned device: /dev/dri/card0

13363 23:12:25.353460  No K<14>[   28.536284] [IGT] kms_vblank: executing

13364 23:12:25.356191  MS driver or no outputs, pipes: 8, outputs: 0

13365 23:12:25.363403  Subtest pipe-E-ts-continuation-modeset-rpm: SKIP (0.000s)

13366 23:12:25.369550  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13367 23:12:25.373093  Opened device: /dev/dri/card0

13368 23:12:25.376466  No KMS driver or no outputs, pipes: 8, outputs: 0

13369 23:12:25.383369  Subtest pipe-F-accuracy-idle: SKIP (0.000s)

13370 23:12:25.389527  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13371 23:12:25.389643  Opened device: /dev/dri/card0

13372 23:12:25.396407  No KMS driver or no outputs, pipes: 8, outputs: 0

13373 23:12:25.399645  Subtest pipe-F-query-idle: SKIP (0.000s)

13374 23:12:25.406139  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13375 23:12:25.409418  Opened device: /dev/dri/card0

13376 23:12:25.412726  No KMS driver or no outputs, pipes: 8, outputs: 0

13377 23:12:25.419665  Subtest pipe-F-query-idle-hang: SKIP (0.000s)

13378 23:12:25.422838  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13379 23:12:25.426021  Opened device: /dev/dri/card0

13380 23:12:25.433024  No KMS driver or no outputs, pipes: 8, outputs: 0

13381 23:12:25.436091  Subtest pipe-F-query-forked: SKIP (0.000s)

13382 23:12:25.442829  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13383 23:12:25.446788  Opened device: /dev/dri/card0

13384 23:12:25.449462  No KMS driver or no outputs, pipes: 8, outputs: 0

13385 23:12:25.456251  Subtest pipe-F-query-forked-hang: SKIP (0.000s)

13386 23:12:25.459382  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13387 23:12:25.462324  Opened device: /dev/dri/card0

13388 23:12:25.469002  No KMS driver or no outputs, pipes: 8, outputs: 0

13389 23:12:25.472479  Subtest pipe-F-query-busy: SKIP (0.000s)

13390 23:12:25.479264  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13391 23:12:25.482488  Opened device: /dev/dri/card0

13392 23:12:25.485837  No KMS driver or no outputs, pipes: 8, outputs: 0

13393 23:12:25.489080  Subtest pipe-F-query-busy-hang: SKIP (0.000s)

13394 23:12:25.496068  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13395 23:12:25.499158  Opened device: /dev/dri/card0

13396 23:12:25.505803  No KMS driver or no outputs, pipes: 8, outputs: 0

13397 23:12:25.509113  Subtest pipe-F-query-forked-busy: SKIP (0.000s)

13398 23:12:25.515255  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13399 23:12:25.518849  Opened device: /dev/dri/card0

13400 23:12:25.522292  No KMS driver or no outputs, pipes: 8, outputs: 0

13401 23:12:25.528770  Subtest pipe-F-query-forked-busy-hang: SKIP (0.000s)

13402 23:12:25.535426  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13403 23:12:25.538922  Opened device: /dev/dri/card0

13404 23:12:25.542176  No KMS driver or no outputs, pipes: 8, outputs: 0

13405 23:12:25.545254  Subtest pipe-F-wait-idle: SKIP (0.000s)

13406 23:12:25.552106  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13407 23:12:25.555235  Opened device: /dev/dri/card0

13408 23:12:25.559023  No KMS driver or no outputs, pipes: 8, outputs: 0

13409 23:12:25.565098  Subtest pipe-F-wait-idle-hang: SKIP (0.000s)

13410 23:12:25.571791  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13411 23:12:25.571899  Opened device: /dev/dri/card0

13412 23:12:25.578477  No KMS driver or no outputs, pipes: 8, outputs: 0

13413 23:12:25.582196  Subtest pipe-F-wait-forked: SKIP (0.000s)

13414 23:12:25.588504  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13415 23:12:25.591739  Opened device: /dev/dri/card0

13416 23:12:25.594915  No KMS driver or no outputs, pipes: 8, outputs: 0

13417 23:12:25.601946  Subtest pipe-F-wait-forked-hang: SKIP (0.000s)

13418 23:12:25.608230  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13419 23:12:25.608307  Opened device: /dev/dri/card0

13420 23:12:25.615339  No KMS driver or no outputs, pipes: 8, outputs: 0

13421 23:12:25.618344  Subtest pipe-F-wait-busy: SKIP (0.000s)

13422 23:12:25.625100  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13423 23:12:25.628387  Opened device: /dev/dri/card0

13424 23:12:25.631196  No KMS driver or no outputs, pipes: 8, outputs: 0

13425 23:12:25.638078  Subtest pipe-F-wait-busy-hang: SKIP (0.000s)

13426 23:12:25.641858  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13427 23:12:25.645198  Opened device: /dev/dri/card0

13428 23:12:25.651234  No KMS driver or no outputs, pipes: 8, outputs: 0

13429 23:12:25.654934  Subtest pipe-F-wait-forked-busy: SKIP (0.000s)

13430 23:12:25.662036  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13431 23:12:25.665072  Opened device: /dev/dri/card0

13432 23:12:25.668019  No KMS driver or no outputs, pipes: 8, outputs: 0

13433 23:12:25.674669  Subtest pipe-F-wait-forked-busy-hang: SKIP (0.000s)

13434 23:12:25.681280  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13435 23:12:25.681399  Opened device: /dev/dri/card0

13436 23:12:25.687664  No KMS driver or no outputs, pipes: 8, outputs: 0

13437 23:12:25.694259  Subtest p<14>[   28.874066] [IGT] kms_vblank: exiting, ret=77

13438 23:12:25.701179  <8>[   28.878913] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-idle-hang RESULT=skip>

13439 23:12:25.701466  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-idle-hang RESULT=skip
13441 23:12:25.707515  ipe-F-ts-continuation-idle: SKIP<14>[   28.891423] [IGT] kms_vblank: executing

13442 23:12:25.714073  <14>[   28.891922] [IGT] kms_vblank: exiting, ret=77

13443 23:12:25.721005  <8>[   28.898502] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-dpms-rpm RESULT=skip>

13444 23:12:25.721279  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-dpms-rpm RESULT=skip
13446 23:12:25.724057   (0.000s)

13447 23:12:25.727942  IGT-Version: 1.27<14>[   28.911754] [IGT] kms_vblank: executing

13448 23:12:25.734188  <14>[   28.912230] [IGT] kms_vblank: exiting, ret=77

13449 23:12:25.745068  <8>[   28.916541] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-dpms-suspend RESULT=skip>

13450 23:12:25.745344  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-dpms-suspend RESULT=skip
13452 23:12:25.747561  .1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13453 23:12:25.750341  Opened device: /dev/dri/card0

13454 23:12:25.753746  No KMS driver or no outputs, pipes: 8, outputs: 0

13455 23:12:25.760393  Subtest pipe-F-ts<14>[   28.943584] [IGT] kms_vblank: executing

13456 23:12:25.764534  <14>[   28.944457] [IGT] kms_vblank: exiting, ret=77

13457 23:12:25.774288  <8>[   28.949685] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-suspend RESULT=skip>

13458 23:12:25.774572  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-suspend RESULT=skip
13460 23:12:25.781491  -continuation-idle-hang: SKIP (0<14>[   28.963756] [IGT] kms_vblank: executing

13461 23:12:25.787598  <14>[   28.964269] [IGT] kms_vblank: exiting, ret=77

13462 23:12:25.794133  <8>[   28.968967] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset RESULT=skip>

13463 23:12:25.794299  .000s)

13464 23:12:25.794581  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset RESULT=skip
13466 23:12:25.800604  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13467 23:12:25.803844  Opened device: /dev/dri/card0

13468 23:12:25.810681  No KMS driv<14>[   28.992246] [IGT] kms_vblank: executing

13469 23:12:25.813628  <14>[   28.993173] [IGT] kms_vblank: exiting, ret=77

13470 23:12:25.823996  <8>[   28.998352] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset-hang RESULT=skip>

13471 23:12:25.824275  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset-hang RESULT=skip
13473 23:12:25.830346  er or no outputs<14>[   29.012988] [IGT] kms_vblank: executing

13474 23:12:25.833886  <14>[   29.013532] [IGT] kms_vblank: exiting, ret=77

13475 23:12:25.843433  <8>[   29.023045] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-F-ts-continuation-modeset-rpm RESULT=skip>

13476 23:12:25.843543  , pipes: 8, outputs: 0

13477 23:12:25.843811  Received signal: <TESTCASE> TEST_CASE_ID=pipe-F-ts-continuation-modeset-rpm RESULT=skip
13479 23:12:25.849803  Subtest pipe-F-ts-continuation-dpms-rpm: SKIP (0.000s)

13480 23:12:25.857037  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13481 23:12:25.860079  Opened device: /dev/dri/card0

13482 23:12:25.863626  No KMS driver o<14>[   29.045955] [IGT] kms_vblank: executing

13483 23:12:25.870059  <14>[   29.046782] [IGT] kms_vblank: exiting, ret=77

13484 23:12:25.876353  <8>[   29.051567] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-accuracy-idle RESULT=skip>

13485 23:12:25.876628  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-accuracy-idle RESULT=skip
13487 23:12:25.879438  r no outputs, pipes: 8, outputs: 0

13488 23:12:25.886126  Subtest <14>[   29.066806] [IGT] kms_vblank: executing

13489 23:12:25.890070  <14>[   29.067293] [IGT] kms_vblank: exiting, ret=77

13490 23:12:25.896401  <8>[   29.073817] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-idle RESULT=skip>

13491 23:12:25.896678  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-idle RESULT=skip
13493 23:12:25.906653  pipe-F-ts-continuation-dpms-susp<14>[   29.087362] [IGT] kms_vblank: executing

13494 23:12:25.909645  <14>[   29.087877] [IGT] kms_vblank: exiting, ret=77

13495 23:12:25.915762  <8>[   29.092486] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-idle-hang RESULT=skip>

13496 23:12:25.916043  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-idle-hang RESULT=skip
13498 23:12:25.919325  end: SKIP (0.000s)

13499 23:12:25.926009  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13500 23:12:25.929009  Opened device: /dev/dri/card0

13501 23:12:25.932706  <14>[   29.114984] [IGT] kms_vblank: executing

13502 23:12:25.936420  <14>[   29.115861] [IGT] kms_vblank: exiting, ret=77

13503 23:12:25.945926  <8>[   29.120984] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked RESULT=skip>

13504 23:12:25.946029  

13505 23:12:25.946292  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked RESULT=skip
13507 23:12:25.949102  No KMS driver or no outputs, pipes: 8, outputs: 0

13508 23:12:25.956245  Subtest pipe-F-ts-continuation-suspend: <14>[   29.140115] [IGT] kms_vblank: executing

13509 23:12:25.962225  <14>[   29.140964] [IGT] kms_vblank: exiting, ret=77

13510 23:12:25.969560  <8>[   29.146229] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-hang RESULT=skip>

13511 23:12:25.969816  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-hang RESULT=skip
13513 23:12:25.972855  SKIP (0.000s)

13514 23:12:25.975522  IGT-Version: <14>[   29.159759] [IGT] kms_vblank: executing

13515 23:12:25.982089  <14>[   29.160236] [IGT] kms_vblank: exiting, ret=77

13516 23:12:25.988925  <8>[   29.167530] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-busy RESULT=skip>

13517 23:12:25.989203  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-busy RESULT=skip
13519 23:12:25.998926  1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-r<14>[   29.178911] [IGT] kms_vblank: executing

13520 23:12:26.002268  <14>[   29.179384] [IGT] kms_vblank: exiting, ret=77

13521 23:12:26.009044  <8>[   29.183824] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-busy-hang RESULT=skip>

13522 23:12:26.009339  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-busy-hang RESULT=skip
13524 23:12:26.012555  t7 aarch64)

13525 23:12:26.015545  Opened device: /dev<14>[   29.199847] [IGT] kms_vblank: executing

13526 23:12:26.022023  <14>[   29.200317] [IGT] kms_vblank: exiting, ret=77

13527 23:12:26.028973  <8>[   29.204854] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-busy RESULT=skip>

13528 23:12:26.029250  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-busy RESULT=skip
13530 23:12:26.032705  /dri/card0

13531 23:12:26.035676  No KMS driver or no outputs, pipes: 8, outputs: 0

13532 23:12:26.042014  Subtest pipe-F-ts-continuation-modeset: SKIP (0.000s)

13533 23:12:26.045276  IG<14>[   29.227523] [IGT] kms_vblank: executing

13534 23:12:26.048751  <14>[   29.228389] [IGT] kms_vblank: exiting, ret=77

13535 23:12:26.058858  <8>[   29.233440] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-query-forked-busy-hang RESULT=skip>

13536 23:12:26.059142  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-query-forked-busy-hang RESULT=skip
13538 23:12:26.065143  T-Version: 1.27.1-g621c2d3 (aarc<14>[   29.247997] [IGT] kms_vblank: executing

13539 23:12:26.068405  <14>[   29.248474] [IGT] kms_vblank: exiting, ret=77

13540 23:12:26.078824  <8>[   29.255454] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-idle RESULT=skip>

13541 23:12:26.079106  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-idle RESULT=skip
13543 23:12:26.081801  h64) (Linux: 6.1.67-cip12-rt7 aarch64)

13544 23:12:26.084981  Opened d<14>[   29.267032] [IGT] kms_vblank: executing

13545 23:12:26.091413  <14>[   29.267516] [IGT] kms_vblank: exiting, ret=77

13546 23:12:26.098162  <8>[   29.271878] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-idle-hang RESULT=skip>

13547 23:12:26.098423  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-idle-hang RESULT=skip
13549 23:12:26.101897  evice: /dev/dri/card0

13550 23:12:26.105073  No KMS dr<14>[   29.287937] [IGT] kms_vblank: executing

13551 23:12:26.111846  <14>[   29.288408] [IGT] kms_vblank: exiting, ret=77

13552 23:12:26.117794  <8>[   29.294784] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked RESULT=skip>

13553 23:12:26.118079  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked RESULT=skip
13555 23:12:26.124844  iver or no outputs, pipes: 8, ou<14>[   29.307137] [IGT] kms_vblank: executing

13556 23:12:26.128077  <14>[   29.307613] [IGT] kms_vblank: exiting, ret=77

13557 23:12:26.137950  <8>[   29.311996] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-hang RESULT=skip>

13558 23:12:26.138057  tputs: 0

13559 23:12:26.138324  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-hang RESULT=skip
13561 23:12:26.145258  Subtest pipe-F-ts-continuation-modeset-hang: SKIP (0.000s)

13562 23:12:26.151141  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1<14>[   29.334914] [IGT] kms_vblank: executing

13563 23:12:26.157924  <14>[   29.335792] [IGT] kms_vblank: exiting, ret=77

13564 23:12:26.164793  <8>[   29.340911] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-busy RESULT=skip>

13565 23:12:26.165075  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-busy RESULT=skip
13567 23:12:26.168104  .67-cip12-rt7 aarch64)

13568 23:12:26.170889  Opened device: /dev/dri/<14>[   29.354145] [IGT] kms_vblank: executing

13569 23:12:26.177884  <14>[   29.354614] [IGT] kms_vblank: exiting, ret=77

13570 23:12:26.184859  <8>[   29.362448] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-busy-hang RESULT=skip>

13571 23:12:26.184967  card0

13572 23:12:26.185234  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-busy-hang RESULT=skip
13574 23:12:26.191343  No KMS driver or no outpu<14>[   29.375012] [IGT] kms_vblank: executing

13575 23:12:26.197431  <14>[   29.375508] [IGT] kms_vblank: exiting, ret=77

13576 23:12:26.204085  <8>[   29.379978] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-busy RESULT=skip>

13577 23:12:26.204365  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-busy RESULT=skip
13579 23:12:26.207760  ts, pipes: 8, outputs: 0

13580 23:12:26.214544  Subtest pipe-F-ts-continuation-modeset-rpm: SKIP (0.000s)

13581 23:12:26.220909  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.<14>[   29.402407] [IGT] kms_vblank: executing

13582 23:12:26.227797  <14>[   29.403232] [IGT] kms_vblank: exiting, ret=77

13583 23:12:26.234611  <8>[   29.408687] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-wait-forked-busy-hang RESULT=skip>

13584 23:12:26.234863  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-wait-forked-busy-hang RESULT=skip
13586 23:12:26.240767  67-cip12-rt7 aar<14>[   29.424391] [IGT] kms_vblank: executing

13587 23:12:26.244229  <14>[   29.424854] [IGT] kms_vblank: exiting, ret=77

13588 23:12:26.254246  <8>[   29.431489] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-idle RESULT=skip>

13589 23:12:26.254349  ch64)

13590 23:12:26.254654  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-idle RESULT=skip
13592 23:12:26.257373  Opened device: /dev/dri/card0

13593 23:12:26.260985  No KMS dri<14>[   29.442978] [IGT] kms_vblank: executing

13594 23:12:26.267133  <14>[   29.443473] [IGT] kms_vblank: exiting, ret=77

13595 23:12:26.274026  <8>[   29.448013] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-idle-hang RESULT=skip>

13596 23:12:26.274307  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-idle-hang RESULT=skip
13598 23:12:26.280394  ver or no output<14>[   29.464820] [IGT] kms_vblank: executing

13599 23:12:26.283728  s, pipes: 8, outputs: 0

13600 23:12:26.287215  Subtest pipe-G-accuracy-idle: SKIP (0.000s)

13601 23:12:26.293525  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13602 23:12:26.297439  Opened device: /dev/dri/card0

13603 23:12:26.300143  No KMS driver or no outputs, pipes: 8, outputs: 0

13604 23:12:26.306658  Subtest pipe-G-query-idle: SKIP (0.000s)

13605 23:12:26.309802  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13606 23:12:26.313912  Opened device: /dev/dri/card0

13607 23:12:26.320407  No KMS driver or no outputs, pipes: 8, outputs: 0

13608 23:12:26.324208  Subtest pipe-G-query-idle-hang: SKIP (0.000s)

13609 23:12:26.329868  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13610 23:12:26.333333  Opened device: /dev/dri/card0

13611 23:12:26.336513  No KMS driver or no outputs, pipes: 8, outputs: 0

13612 23:12:26.343289  Subtest pipe-G-query-forked: SKIP (0.000s)

13613 23:12:26.346274  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13614 23:12:26.350079  Opened device: /dev/dri/card0

13615 23:12:26.356169  No KMS driver or no outputs, pipes: 8, outputs: 0

13616 23:12:26.359371  Subtest pipe-G-query-forked-hang: SKIP (0.000s)

13617 23:12:26.366278  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13618 23:12:26.369783  Opened device: /dev/dri/card0

13619 23:12:26.372938  No KMS driver or no outputs, pipes: 8, outputs: 0

13620 23:12:26.380059  Subtest pipe-G-query-busy: SKIP (0.000s)

13621 23:12:26.382972  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13622 23:12:26.386686  Opened device: /dev/dri/card0

13623 23:12:26.392907  No KMS driver or no outputs, pipes: 8, outputs: 0

13624 23:12:26.396299  Subtest pipe-G-query-busy-hang: SKIP (0.000s)

13625 23:12:26.403057  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13626 23:12:26.406321  Opened device: /dev/dri/card0

13627 23:12:26.409703  No KMS driver or no outputs, pipes: 8, outputs: 0

13628 23:12:26.416324  Subtest pipe-G-query-forked-busy: SKIP (0.000s)

13629 23:12:26.423364  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13630 23:12:26.423471  Opened device: /dev/dri/card0

13631 23:12:26.429390  No KMS driver or no outputs, pipes: 8, outputs: 0

13632 23:12:26.432711  Subtest pipe-G-query-forked-busy-hang: SKIP (0.000s)

13633 23:12:26.439699  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13634 23:12:26.443104  Opened device: /dev/dri/card0

13635 23:12:26.446143  No KMS driver or no outputs, pipes: 8, outputs: 0

13636 23:12:26.453016  Subtest pipe-G-wait-idle: SKIP (0.000s)

13637 23:12:26.459916  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13638 23:12:26.460025  Opened device: /dev/dri/card0

13639 23:12:26.466013  No KMS driver or no outputs, pipes: 8, outputs: 0

13640 23:12:26.470021  Subtest pipe-G-wait-idle-hang: SKIP (0.000s)

13641 23:12:26.475980  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13642 23:12:26.479754  Opened device: /dev/dri/card0

13643 23:12:26.482917  No KMS driver or no outputs, pipes: 8, outputs: 0

13644 23:12:26.489370  Subtest pipe-G-wait-forked: SKIP (0.000s)

13645 23:12:26.493450  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13646 23:12:26.496445  Opened device: /dev/dri/card0

13647 23:12:26.502847  No KMS driver or no outputs, pipes: 8, outputs: 0

13648 23:12:26.506387  Subtest pipe-G-wait-forked-hang: SKIP (0.000s)

13649 23:12:26.512775  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13650 23:12:26.516211  Opened device: /dev/dri/card0

13651 23:12:26.519893  No KMS driver or no outputs, pipes: 8, outputs: 0

13652 23:12:26.522517  Subtest pipe-G-wait-busy: SKIP (0.000s)

13653 23:12:26.529102  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13654 23:12:26.532973  Opened device: /dev/dri/card0

13655 23:12:26.535691  No KMS driver or no outputs, pipes: 8, outputs: 0

13656 23:12:26.542573  Subtest pipe-G-wait-busy-hang: SKIP (0.000s)

13657 23:12:26.549903  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13658 23:12:26.552584  Opened device: /dev/dri/card0

13659 23:12:26.556088  No KMS driver or no outputs, pipes: 8, outputs: 0

13660 23:12:26.559133  Subtest pipe-G-wait-forked-busy: SKIP (0.000s)

13661 23:12:26.565643  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13662 23:12:26.569423  Opened device: /dev/dri/card0

13663 23:12:26.572994  No KMS driver or no outputs, pipes: 8, outputs: 0

13664 23:12:26.579171  Subtest pipe-G-wait-forked-busy-hang: SKIP (0.000s)

13665 23:12:26.586177  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13666 23:12:26.588977  Opened device: /dev/dri/card0

13667 23:12:26.592284  No KMS driver or no outputs, pipes: 8, outputs: 0

13668 23:12:26.599231  Subtest pipe-G-ts-continuation-idle: SKIP (0.000s)

13669 23:12:26.606293  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13670 23:12:26.606423  Opened device: /dev/dri/card0

13671 23:12:26.612562  No KMS driver or no outputs, pipes: 8, outputs: 0

13672 23:12:26.622840  Subtest pipe-G-ts-continuation-idle-hang: SKIP (0.000s<14>[   29.802749] [IGT] kms_vblank: exiting, ret=77

13673 23:12:26.629484  <8>[   29.807636] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-dpms-rpm RESULT=skip>

13674 23:12:26.629596  )

13675 23:12:26.629875  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-dpms-rpm RESULT=skip
13677 23:12:26.636347  IGT-Version: 1.27.1-g621c<14>[   29.819990] [IGT] kms_vblank: executing

13678 23:12:26.642763  <14>[   29.820478] [IGT] kms_vblank: exiting, ret=77

13679 23:12:26.649468  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-dpms-suspend RESULT=skip
13681 23:12:26.652484  <8>[   29.824734] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-dpms-suspend RESULT=skip>

13682 23:12:26.655390  2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13683 23:12:26.659278  Opened device: /dev/dri/card0

13684 23:12:26.665362  No KMS driver or no outputs, pip<14>[   29.847167] [IGT] kms_vblank: executing

13685 23:12:26.669046  <14>[   29.848056] [IGT] kms_vblank: exiting, ret=77

13686 23:12:26.679806  <8>[   29.853330] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-suspend RESULT=skip>

13687 23:12:26.679912  es: 8, outputs: 0

13688 23:12:26.680183  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-suspend RESULT=skip
13690 23:12:26.685608  Subtest p<14>[   29.867866] [IGT] kms_vblank: executing

13691 23:12:26.688994  <14>[   29.868405] [IGT] kms_vblank: exiting, ret=77

13692 23:12:26.699351  <8>[   29.872857] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset RESULT=skip>

13693 23:12:26.699639  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset RESULT=skip
13695 23:12:26.702283  ipe-G-ts-continuation-dpms-rpm: SKIP (0.000s)

13696 23:12:26.712830  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-r<14>[   29.895873] [IGT] kms_vblank: executing

13697 23:12:26.715440  <14>[   29.896767] [IGT] kms_vblank: exiting, ret=77

13698 23:12:26.725610  <8>[   29.901944] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset-hang RESULT=skip>

13699 23:12:26.725691  t7 aarch64)

13700 23:12:26.725956  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset-hang RESULT=skip
13702 23:12:26.732190  Opened device: /dev<14>[   29.915683] [IGT] kms_vblank: executing

13703 23:12:26.738917  <14>[   29.916196] [IGT] kms_vblank: exiting, ret=77

13704 23:12:26.745498  <8>[   29.920618] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-G-ts-continuation-modeset-rpm RESULT=skip>

13705 23:12:26.745748  Received signal: <TESTCASE> TEST_CASE_ID=pipe-G-ts-continuation-modeset-rpm RESULT=skip
13707 23:12:26.748652  /dri/card0

13708 23:12:26.751745  No KMS driver or no outputs, pipes: 8, outputs: 0

13709 23:12:26.762311  Subtest pipe-G-ts-continuation-dpms-suspend: <14>[   29.943208] [IGT] kms_vblank: executing

13710 23:12:26.765485  <14>[   29.944072] [IGT] kms_vblank: exiting, ret=77

13711 23:12:26.771976  <8>[   29.949628] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-accuracy-idle RESULT=skip>

13712 23:12:26.772253  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-accuracy-idle RESULT=skip
13714 23:12:26.775659  SKIP (0.000s)

13715 23:12:26.782340  IGT-Version: 1.27.1-g621c2d3 <14>[   29.962574] [IGT] kms_vblank: executing

13716 23:12:26.785235  <14>[   29.963095] [IGT] kms_vblank: exiting, ret=77

13717 23:12:26.792032  <8>[   29.969673] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-idle RESULT=skip>

13718 23:12:26.792306  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-idle RESULT=skip
13720 23:12:26.798313  (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13721 23:12:26.802683  Ope<14>[   29.983097] [IGT] kms_vblank: executing

13722 23:12:26.804825  <14>[   29.983612] [IGT] kms_vblank: exiting, ret=77

13723 23:12:26.815257  <8>[   29.991094] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-idle-hang RESULT=skip>

13724 23:12:26.815343  ned device: /dev/dri/card0

13725 23:12:26.815581  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-idle-hang RESULT=skip
13727 23:12:26.821613  No K<14>[   30.004075] [IGT] kms_vblank: executing

13728 23:12:26.825158  <14>[   30.004564] [IGT] kms_vblank: exiting, ret=77

13729 23:12:26.831583  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked RESULT=skip
13731 23:12:26.834989  <8>[   30.011668] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked RESULT=skip>

13732 23:12:26.841951  MS driver or no outputs, pipes: <14>[   30.023350] [IGT] kms_vblank: executing

13733 23:12:26.845332  <14>[   30.023836] [IGT] kms_vblank: exiting, ret=77

13734 23:12:26.851778  <8>[   30.033391] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-hang RESULT=skip>

13735 23:12:26.852031  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-hang RESULT=skip
13737 23:12:26.855065  8, outputs: 0

13738 23:12:26.861694  Subtest pipe-<14>[   30.043843] [IGT] kms_vblank: executing

13739 23:12:26.864981  <14>[   30.044296] [IGT] kms_vblank: exiting, ret=77

13740 23:12:26.871942  <8>[   30.048537] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-busy RESULT=skip>

13741 23:12:26.872196  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-busy RESULT=skip
13743 23:12:26.875708  G-ts-continuation-suspend: SKIP (0.000s)

13744 23:12:26.881649  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13745 23:12:26.885018  Opened device: /dev/dri/card0

13746 23:12:26.891966  No KMS driver or no outputs, pipes: 8, ou<14>[   30.075488] [IGT] kms_vblank: executing

13747 23:12:26.898696  <14>[   30.076350] [IGT] kms_vblank: exiting, ret=77

13748 23:12:26.905045  <8>[   30.081372] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-busy-hang RESULT=skip>

13749 23:12:26.905153  tputs: 0

13750 23:12:26.905421  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-busy-hang RESULT=skip
13752 23:12:26.911922  Subtest pipe-G-ts-continuation-modeset: SKIP (0.000s)

13753 23:12:26.918681  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13754 23:12:26.924972  Opened device: /dev/dri/card0<14>[   30.107597] [IGT] kms_vblank: executing

13755 23:12:26.928407  <14>[   30.108468] [IGT] kms_vblank: exiting, ret=77

13756 23:12:26.938352  <8>[   30.113586] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-busy RESULT=skip>

13757 23:12:26.938500  

13758 23:12:26.938767  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-busy RESULT=skip
13760 23:12:26.942340  No KMS driver or no outputs, pipes: 8, outputs: 0

13761 23:12:26.948608  Subtest pipe-G-ts-continuation-modeset-hang: SKIP (0.000s)

13762 23:12:26.958707  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-c<14>[   30.140762] [IGT] kms_vblank: executing

13763 23:12:26.961755  <14>[   30.141679] [IGT] kms_vblank: exiting, ret=77

13764 23:12:26.965156  ip12-rt7 aarch64)

13765 23:12:26.965260  Opened device: /dev/dri/card0

13766 23:12:26.978062  No KMS driver or no outputs, p<8>[   30.156790] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-query-forked-busy-hang RESULT=skip>

13767 23:12:26.978173  ipes: 8, outputs: 0

13768 23:12:26.978476  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-query-forked-busy-hang RESULT=skip
13770 23:12:26.985009  Subtest pipe-G-ts-continuation-modeset-rpm: SKIP (0.000s)

13771 23:12:26.991561  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13772 23:12:26.995192  Opened device: /dev/dri/card0

13773 23:12:27.001686  No KMS driver or no outputs, pi<14>[   30.183027] [IGT] kms_vblank: executing

13774 23:12:27.005531  <14>[   30.183878] [IGT] kms_vblank: exiting, ret=77

13775 23:12:27.011598  <8>[   30.189061] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-idle RESULT=skip>

13776 23:12:27.011877  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-idle RESULT=skip
13778 23:12:27.015188  pes: 8, outputs: 0

13779 23:12:27.021927  Subtest <14>[   30.203157] [IGT] kms_vblank: executing

13780 23:12:27.024988  <14>[   30.203672] [IGT] kms_vblank: exiting, ret=77

13781 23:12:27.031959  <8>[   30.208112] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-idle-hang RESULT=skip>

13782 23:12:27.032242  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-idle-hang RESULT=skip
13784 23:12:27.035169  pipe-H-accuracy-idle: SKIP (0.000s)

13785 23:12:27.042015  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13786 23:12:27.045076  Opened device: /dev/dri/card0

13787 23:12:27.052030  No KMS driver or no outputs, p<14>[   30.235840] [IGT] kms_vblank: executing

13788 23:12:27.058116  <14>[   30.236680] [IGT] kms_vblank: exiting, ret=77

13789 23:12:27.065478  <8>[   30.242037] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked RESULT=skip>

13790 23:12:27.065577  ipes: 8, outputs: 0

13791 23:12:27.065845  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked RESULT=skip
13793 23:12:27.071297  Subtest pipe-H-query-id<14>[   30.254271] [IGT] kms_vblank: executing

13794 23:12:27.077989  <14>[   30.254806] [IGT] kms_vblank: exiting, ret=77

13795 23:12:27.084712  <8>[   30.260788] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-hang RESULT=skip>

13796 23:12:27.084994  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-hang RESULT=skip
13798 23:12:27.088204  le: SKIP (0.000s)

13799 23:12:27.091493  IGT-Versi<14>[   30.275301] [IGT] kms_vblank: executing

13800 23:12:27.098206  <14>[   30.275820] [IGT] kms_vblank: exiting, ret=77

13801 23:12:27.105147  <8>[   30.280347] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-busy RESULT=skip>

13802 23:12:27.105426  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-busy RESULT=skip
13804 23:12:27.111168  on: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip<14>[   30.294339] [IGT] kms_vblank: executing

13805 23:12:27.118008  <14>[   30.294845] [IGT] kms_vblank: exiting, ret=77

13806 23:12:27.124641  <8>[   30.300830] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-busy-hang RESULT=skip>

13807 23:12:27.124918  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-busy-hang RESULT=skip
13809 23:12:27.127814  12-rt7 aarch64)

13810 23:12:27.131693  Opened device: <14>[   30.315233] [IGT] kms_vblank: executing

13811 23:12:27.138221  <14>[   30.315715] [IGT] kms_vblank: exiting, ret=77

13812 23:12:27.144452  <8>[   30.322842] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-busy RESULT=skip>

13813 23:12:27.144733  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-busy RESULT=skip
13815 23:12:27.147705  /dev/dri/card0

13816 23:12:27.154069  No KMS driver or no outputs, pip<14>[   30.334854] [IGT] kms_vblank: executing

13817 23:12:27.157491  <14>[   30.335314] [IGT] kms_vblank: exiting, ret=77

13818 23:12:27.167863  <8>[   30.342859] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-wait-forked-busy-hang RESULT=skip>

13819 23:12:27.167969  es: 8, outputs: 0

13820 23:12:27.168242  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-wait-forked-busy-hang RESULT=skip
13822 23:12:27.174056  Subtest p<14>[   30.356291] [IGT] kms_vblank: executing

13823 23:12:27.177420  <14>[   30.356767] [IGT] kms_vblank: exiting, ret=77

13824 23:12:27.187709  <8>[   30.361198] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-idle RESULT=skip>

13825 23:12:27.188000  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-idle RESULT=skip
13827 23:12:27.190542  ipe-H-query-idle-hang: SKIP (0.000s)

13828 23:12:27.200931  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch6<14>[   30.383928] [IGT] kms_vblank: executing

13829 23:12:27.204004  <14>[   30.384794] [IGT] kms_vblank: exiting, ret=77

13830 23:12:27.213895  <8>[   30.389916] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-idle-hang RESULT=skip>

13831 23:12:27.214010  4)

13832 23:12:27.214281  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-idle-hang RESULT=skip
13834 23:12:27.221072  Opened device: /dev/dri/card<14>[   30.403577] [IGT] kms_vblank: executing

13835 23:12:27.224030  <14>[   30.404070] [IGT] kms_vblank: exiting, ret=77

13836 23:12:27.234064  <8>[   30.411417] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-dpms-rpm RESULT=skip>

13837 23:12:27.234146  0

13838 23:12:27.234383  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-dpms-rpm RESULT=skip
13840 23:12:27.240436  No KMS driver or no outputs, <14>[   30.423930] [IGT] kms_vblank: executing

13841 23:12:27.247009  <14>[   30.424418] [IGT] kms_vblank: exiting, ret=77

13842 23:12:27.253690  <8>[   30.428640] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-dpms-suspend RESULT=skip>

13843 23:12:27.253972  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-dpms-suspend RESULT=skip
13845 23:12:27.257072  pipes: 8, outputs: 0

13846 23:12:27.260341  Subtest pipe-H-query-forked: SKIP (0.000s)

13847 23:12:27.267142  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13848 23:12:27.273916  Opened devic<14>[   30.455961] [IGT] kms_vblank: executing

13849 23:12:27.276851  <14>[   30.456814] [IGT] kms_vblank: exiting, ret=77

13850 23:12:27.286759  <8>[   30.462035] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-suspend RESULT=skip>

13851 23:12:27.286865  e: /dev/dri/card0

13852 23:12:27.287131  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-suspend RESULT=skip
13854 23:12:27.293826  No KMS driver or no outputs, pipes: 8, outputs: 0

13855 23:12:27.296905  Subtes<14>[   30.481231] [IGT] kms_vblank: executing

13856 23:12:27.304459  t pipe-H-query-forked-hang: SKIP<14>[   30.487471] [IGT] kms_vblank: exiting, ret=77

13857 23:12:27.313546  <8>[   30.492491] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset RESULT=skip>

13858 23:12:27.313655   (0.000s)

13859 23:12:27.313925  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset RESULT=skip
13861 23:12:27.320549  IGT-Version: 1.27<14>[   30.503114] [IGT] kms_vblank: executing

13862 23:12:27.323807  <14>[   30.503598] [IGT] kms_vblank: exiting, ret=77

13863 23:12:27.333727  <8>[   30.509017] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset-hang RESULT=skip>

13864 23:12:27.334011  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset-hang RESULT=skip
13866 23:12:27.339711  .1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13867 23:12:27.339790  Opened device: /dev/dri/card0

13868 23:12:27.346756  No KMS driver or no outputs, pipes: 8, outputs: 0

13869 23:12:27.353811  Subtest pipe-H-query-busy: SKIP (<14>[   30.536824] [IGT] kms_vblank: executing

13870 23:12:27.353921  0.000s)

13871 23:12:27.359880  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13872 23:12:27.363146  Opened device: /dev/dri/card0

13873 23:12:27.366612  No KMS driver or no outputs, pipes: 8, outputs: 0

13874 23:12:27.373501  Subtest pipe-H-query-busy-hang: SKIP (0.000s)

13875 23:12:27.380135  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13876 23:12:27.383320  Opened device: /dev/dri/card0

13877 23:12:27.386158  No KMS driver or no outputs, pipes: 8, outputs: 0

13878 23:12:27.389967  Subtest pipe-H-query-forked-busy: SKIP (0.000s)

13879 23:12:27.396753  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13880 23:12:27.399708  Opened device: /dev/dri/card0

13881 23:12:27.402954  No KMS driver or no outputs, pipes: 8, outputs: 0

13882 23:12:27.409948  Subtest pipe-H-query-forked-busy-hang: SKIP (0.000s)

13883 23:12:27.416537  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13884 23:12:27.419930  Opened device: /dev/dri/card0

13885 23:12:27.423452  No KMS driver or no outputs, pipes: 8, outputs: 0

13886 23:12:27.426135  Subtest pipe-H-wait-idle: SKIP (0.000s)

13887 23:12:27.433043  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13888 23:12:27.436135  Opened device: /dev/dri/card0

13889 23:12:27.443083  No KMS driver or no outputs, pipes: 8, outputs: 0

13890 23:12:27.446831  Subtest pipe-H-wait-idle-hang: SKIP (0.000s)

13891 23:12:27.452885  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13892 23:12:27.456571  Opened device: /dev/dri/card0

13893 23:12:27.459181  No KMS driver or no outputs, pipes: 8, outputs: 0

13894 23:12:27.463124  Subtest pipe-H-wait-forked: SKIP (0.000s)

13895 23:12:27.469770  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13896 23:12:27.472920  Opened device: /dev/dri/card0

13897 23:12:27.479600  No KMS driver or no outputs, pipes: 8, outputs: 0

13898 23:12:27.482795  Subtest pipe-H-wait-forked-hang: SKIP (0.000s)

13899 23:12:27.489281  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13900 23:12:27.492407  Opened device: /dev/dri/card0

13901 23:12:27.496048  No KMS driver or no outputs, pipes: 8, outputs: 0

13902 23:12:27.499388  Subtest pipe-H-wait-busy: SKIP (0.000s)

13903 23:12:27.505796  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13904 23:12:27.509302  Opened device: /dev/dri/card0

13905 23:12:27.512368  No KMS driver or no outputs, pipes: 8, outputs: 0

13906 23:12:27.519109  Subtest pipe-H-wait-busy-hang: SKIP (0.000s)

13907 23:12:27.526145  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13908 23:12:27.529185  Opened device: /dev/dri/card0

13909 23:12:27.532592  No KMS driver or no outputs, pipes: 8, outputs: 0

13910 23:12:27.536151  Subtest pipe-H-wait-forked-busy: SKIP (0.000s)

13911 23:12:27.542710  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13912 23:12:27.545674  Opened device: /dev/dri/card0

13913 23:12:27.549556  No KMS driver or no outputs, pipes: 8, outputs: 0

13914 23:12:27.556366  Subtest pipe-H-wait-forked-busy-hang: SKIP (0.000s)

13915 23:12:27.562594  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13916 23:12:27.566124  Opened device: /dev/dri/card0

13917 23:12:27.569290  No KMS driver or no outputs, pipes: 8, outputs: 0

13918 23:12:27.575805  Subtest pipe-H-ts-continuation-idle: SKIP (0.000s)

13919 23:12:27.582254  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13920 23:12:27.582382  Opened device: /dev/dri/card0

13921 23:12:27.589454  No KMS driver or no outputs, pipes: 8, outputs: 0

13922 23:12:27.592432  Subtest pipe-H-ts-continuation-idle-hang: SKIP (0.000s)

13923 23:12:27.598859  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13924 23:12:27.602131  Opened device: /dev/dri/card0

13925 23:12:27.608900  No KMS driver or no outputs, pipes: 8, outputs: 0

13926 23:12:27.612645  Subtest pipe-H-ts-continuation-dpms-rpm: SKIP (0.000s)

13927 23:12:27.619182  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13928 23:12:27.622054  Opened device: /dev/dri/card0

13929 23:12:27.625451  No KMS driver or no outputs, pipes: 8, outputs: 0

13930 23:12:27.631871  Subtest pipe-H-ts-continuation-dpms-suspend: SKIP (0.000s)

13931 23:12:27.638941  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13932 23:12:27.642650  Opened device: /dev/dri/card0

13933 23:12:27.645242  No KMS driver or no outputs, pipes: 8, outputs: 0

13934 23:12:27.651631  Subtest pipe-H-ts-continuation-suspend: SKIP (0.000s)

13935 23:12:27.658283  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13936 23:12:27.661956  Opened device: /dev/dri/card0

13937 23:12:27.665593  No KMS driver or no outputs, pipes: 8, outputs: 0

13938 23:12:27.671967  Subtest pipe-H-ts-continuation-modeset: SKIP (0.000s)

13939 23:12:27.678821  IGT-Version: 1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13940 23:12:27.678939  Opened device: /dev/dri/card0

13941 23:12:27.684966  No KMS driver or no outputs, pipes: 8, outputs: 0

13942 23:12:27.691488  Subtest pipe-H-ts-continuation-modeset-hang:<14>[   30.875437] [IGT] kms_vblank: exiting, ret=77

13943 23:12:27.701741  <8>[   30.881572] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pipe-H-ts-continuation-modeset-rpm RESULT=skip>

13944 23:12:27.702033  Received signal: <TESTCASE> TEST_CASE_ID=pipe-H-ts-continuation-modeset-rpm RESULT=skip
13946 23:12:27.705007  <8>[   30.882707] <LAVA_SIGNAL_TESTSET STOP>

13947 23:12:27.705283  Received signal: <TESTSET> STOP
13948 23:12:27.705378  Closing test_set kms_vblank
13949 23:12:27.708221   SKIP (0.000s)

13950 23:12:27.714778  IGT-Version:<8>[   30.895667] <LAVA_SIGNAL_ENDRUN 0_igt-kms-mediatek 12395387_1.5.2.3.1>

13951 23:12:27.715060  Received signal: <ENDRUN> 0_igt-kms-mediatek 12395387_1.5.2.3.1
13952 23:12:27.715173  Ending use of test pattern.
13953 23:12:27.715267  Ending test lava.0_igt-kms-mediatek (12395387_1.5.2.3.1), duration 11.88
13955 23:12:27.721442   1.27.1-g621c2d3 (aarch64) (Linux: 6.1.67-cip12-rt7 aarch64)

13956 23:12:27.724953  Opened device: /dev/dri/card0

13957 23:12:27.727841  No KMS driver or no outputs, pipes: 8, outputs: 0

13958 23:12:27.734809  Subtest pipe-H-ts-continuation-modeset-rpm: SKIP (0.000s)

13959 23:12:27.734915  + set +x

13960 23:12:27.738203  <LAVA_TEST_RUNNER EXIT>

13961 23:12:27.738487  ok: lava_test_shell seems to have completed
13962 23:12:27.746549  addfb25-4-tiled:
  result: skip
  set: kms_addfb_basic
addfb25-bad-modifier:
  result: fail
  set: kms_addfb_basic
addfb25-framebuffer-vs-set-tiling:
  result: skip
  set: kms_addfb_basic
addfb25-modifier-no-flag:
  result: pass
  set: kms_addfb_basic
addfb25-x-tiled-legacy:
  result: skip
  set: kms_addfb_basic
addfb25-x-tiled-mismatch-legacy:
  result: skip
  set: kms_addfb_basic
addfb25-y-tiled-legacy:
  result: skip
  set: kms_addfb_basic
addfb25-y-tiled-small-legacy:
  result: skip
  set: kms_addfb_basic
addfb25-yf-tiled-legacy:
  result: skip
  set: kms_addfb_basic
atomic-invalid-params:
  result: skip
  set: kms_atomic
atomic_plane_damage:
  result: skip
  set: kms_atomic
bad-pitch-0:
  result: pass
  set: kms_addfb_basic
bad-pitch-1024:
  result: pass
  set: kms_addfb_basic
bad-pitch-128:
  result: pass
  set: kms_addfb_basic
bad-pitch-256:
  result: pass
  set: kms_addfb_basic
bad-pitch-32:
  result: pass
  set: kms_addfb_basic
bad-pitch-63:
  result: pass
  set: kms_addfb_basic
bad-pitch-65536:
  result: pass
  set: kms_addfb_basic
bad-pitch-999:
  result: pass
  set: kms_addfb_basic
basic:
  result: skip
  set: kms_setmode
basic-auth:
  result: pass
  set: core_auth
basic-clone-single-crtc:
  result: skip
  set: kms_setmode
basic-x-tiled-legacy:
  result: skip
  set: kms_addfb_basic
basic-y-tiled-legacy:
  result: skip
  set: kms_addfb_basic
blob-multiple:
  result: pass
  set: kms_prop_blob
blob-prop-core:
  result: pass
  set: kms_prop_blob
blob-prop-lifetime:
  result: pass
  set: kms_prop_blob
blob-prop-validate:
  result: pass
  set: kms_prop_blob
bo-too-small:
  result: skip
  set: kms_addfb_basic
bo-too-small-due-to-tiling:
  result: skip
  set: kms_addfb_basic
clobberred-modifier:
  result: skip
  set: kms_addfb_basic
clone-exclusive-crtc:
  result: skip
  set: kms_setmode
core_getclient: pass
core_getstats: pass
core_getversion: pass
core_setmaster_vs_auth: pass
crtc-id:
  result: skip
  set: kms_vblank
crtc-invalid-params:
  result: skip
  set: kms_atomic
crtc-invalid-params-fence:
  result: skip
  set: kms_atomic
empty-block:
  result: skip
  set: drm_read
empty-nonblock:
  result: skip
  set: drm_read
fault-buffer:
  result: skip
  set: drm_read
framebuffer-vs-set-tiling:
  result: skip
  set: kms_addfb_basic
getclient-master-drop:
  result: pass
  set: core_auth
getclient-simple:
  result: pass
  set: core_auth
invalid:
  result: skip
  set: kms_vblank
invalid-buffer:
  result: skip
  set: drm_read
invalid-clone-exclusive-crtc:
  result: skip
  set: kms_setmode
invalid-clone-single-crtc:
  result: skip
  set: kms_setmode
invalid-clone-single-crtc-stealing:
  result: skip
  set: kms_setmode
invalid-get-prop:
  result: pass
  set: kms_prop_blob
invalid-get-prop-any:
  result: pass
  set: kms_prop_blob
invalid-set-prop:
  result: pass
  set: kms_prop_blob
invalid-set-prop-any:
  result: pass
  set: kms_prop_blob
invalid-smem-bo-on-discrete:
  result: skip
  set: kms_addfb_basic
legacy-format:
  result: pass
  set: kms_addfb_basic
many-magics:
  result: pass
  set: core_auth
master-rmfb:
  result: pass
  set: kms_addfb_basic
no-handle:
  result: pass
  set: kms_addfb_basic
pipe-A-accuracy-idle:
  result: skip
  set: kms_vblank
pipe-A-query-busy:
  result: skip
  set: kms_vblank
pipe-A-query-busy-hang:
  result: skip
  set: kms_vblank
pipe-A-query-forked:
  result: skip
  set: kms_vblank
pipe-A-query-forked-busy:
  result: skip
  set: kms_vblank
pipe-A-query-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-A-query-forked-hang:
  result: skip
  set: kms_vblank
pipe-A-query-idle:
  result: skip
  set: kms_vblank
pipe-A-query-idle-hang:
  result: skip
  set: kms_vblank
pipe-A-ts-continuation-dpms-rpm:
  result: skip
  set: kms_vblank
pipe-A-ts-continuation-dpms-suspend:
  result: skip
  set: kms_vblank
pipe-A-ts-continuation-idle:
  result: skip
  set: kms_vblank
pipe-A-ts-continuation-idle-hang:
  result: skip
  set: kms_vblank
pipe-A-ts-continuation-modeset:
  result: skip
  set: kms_vblank
pipe-A-ts-continuation-modeset-hang:
  result: skip
  set: kms_vblank
pipe-A-ts-continuation-modeset-rpm:
  result: skip
  set: kms_vblank
pipe-A-ts-continuation-suspend:
  result: skip
  set: kms_vblank
pipe-A-wait-busy:
  result: skip
  set: kms_vblank
pipe-A-wait-busy-hang:
  result: skip
  set: kms_vblank
pipe-A-wait-forked:
  result: skip
  set: kms_vblank
pipe-A-wait-forked-busy:
  result: skip
  set: kms_vblank
pipe-A-wait-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-A-wait-forked-hang:
  result: skip
  set: kms_vblank
pipe-A-wait-idle:
  result: skip
  set: kms_vblank
pipe-A-wait-idle-hang:
  result: skip
  set: kms_vblank
pipe-B-accuracy-idle:
  result: skip
  set: kms_vblank
pipe-B-query-busy:
  result: skip
  set: kms_vblank
pipe-B-query-busy-hang:
  result: skip
  set: kms_vblank
pipe-B-query-forked:
  result: skip
  set: kms_vblank
pipe-B-query-forked-busy:
  result: skip
  set: kms_vblank
pipe-B-query-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-B-query-forked-hang:
  result: skip
  set: kms_vblank
pipe-B-query-idle:
  result: skip
  set: kms_vblank
pipe-B-query-idle-hang:
  result: skip
  set: kms_vblank
pipe-B-ts-continuation-dpms-rpm:
  result: skip
  set: kms_vblank
pipe-B-ts-continuation-dpms-suspend:
  result: skip
  set: kms_vblank
pipe-B-ts-continuation-idle:
  result: skip
  set: kms_vblank
pipe-B-ts-continuation-idle-hang:
  result: skip
  set: kms_vblank
pipe-B-ts-continuation-modeset:
  result: skip
  set: kms_vblank
pipe-B-ts-continuation-modeset-hang:
  result: skip
  set: kms_vblank
pipe-B-ts-continuation-modeset-rpm:
  result: skip
  set: kms_vblank
pipe-B-ts-continuation-suspend:
  result: skip
  set: kms_vblank
pipe-B-wait-busy:
  result: skip
  set: kms_vblank
pipe-B-wait-busy-hang:
  result: skip
  set: kms_vblank
pipe-B-wait-forked:
  result: skip
  set: kms_vblank
pipe-B-wait-forked-busy:
  result: skip
  set: kms_vblank
pipe-B-wait-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-B-wait-forked-hang:
  result: skip
  set: kms_vblank
pipe-B-wait-idle:
  result: skip
  set: kms_vblank
pipe-B-wait-idle-hang:
  result: skip
  set: kms_vblank
pipe-C-accuracy-idle:
  result: skip
  set: kms_vblank
pipe-C-query-busy:
  result: skip
  set: kms_vblank
pipe-C-query-busy-hang:
  result: skip
  set: kms_vblank
pipe-C-query-forked:
  result: skip
  set: kms_vblank
pipe-C-query-forked-busy:
  result: skip
  set: kms_vblank
pipe-C-query-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-C-query-forked-hang:
  result: skip
  set: kms_vblank
pipe-C-query-idle:
  result: skip
  set: kms_vblank
pipe-C-query-idle-hang:
  result: skip
  set: kms_vblank
pipe-C-ts-continuation-dpms-rpm:
  result: skip
  set: kms_vblank
pipe-C-ts-continuation-dpms-suspend:
  result: skip
  set: kms_vblank
pipe-C-ts-continuation-idle:
  result: skip
  set: kms_vblank
pipe-C-ts-continuation-idle-hang:
  result: skip
  set: kms_vblank
pipe-C-ts-continuation-modeset:
  result: skip
  set: kms_vblank
pipe-C-ts-continuation-modeset-hang:
  result: skip
  set: kms_vblank
pipe-C-ts-continuation-modeset-rpm:
  result: skip
  set: kms_vblank
pipe-C-ts-continuation-suspend:
  result: skip
  set: kms_vblank
pipe-C-wait-busy:
  result: skip
  set: kms_vblank
pipe-C-wait-busy-hang:
  result: skip
  set: kms_vblank
pipe-C-wait-forked:
  result: skip
  set: kms_vblank
pipe-C-wait-forked-busy:
  result: skip
  set: kms_vblank
pipe-C-wait-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-C-wait-forked-hang:
  result: skip
  set: kms_vblank
pipe-C-wait-idle:
  result: skip
  set: kms_vblank
pipe-C-wait-idle-hang:
  result: skip
  set: kms_vblank
pipe-D-accuracy-idle:
  result: skip
  set: kms_vblank
pipe-D-query-busy:
  result: skip
  set: kms_vblank
pipe-D-query-busy-hang:
  result: skip
  set: kms_vblank
pipe-D-query-forked:
  result: skip
  set: kms_vblank
pipe-D-query-forked-busy:
  result: skip
  set: kms_vblank
pipe-D-query-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-D-query-forked-hang:
  result: skip
  set: kms_vblank
pipe-D-query-idle:
  result: skip
  set: kms_vblank
pipe-D-query-idle-hang:
  result: skip
  set: kms_vblank
pipe-D-ts-continuation-dpms-rpm:
  result: skip
  set: kms_vblank
pipe-D-ts-continuation-dpms-suspend:
  result: skip
  set: kms_vblank
pipe-D-ts-continuation-idle:
  result: skip
  set: kms_vblank
pipe-D-ts-continuation-idle-hang:
  result: skip
  set: kms_vblank
pipe-D-ts-continuation-modeset:
  result: skip
  set: kms_vblank
pipe-D-ts-continuation-modeset-hang:
  result: skip
  set: kms_vblank
pipe-D-ts-continuation-modeset-rpm:
  result: skip
  set: kms_vblank
pipe-D-ts-continuation-suspend:
  result: skip
  set: kms_vblank
pipe-D-wait-busy:
  result: skip
  set: kms_vblank
pipe-D-wait-busy-hang:
  result: skip
  set: kms_vblank
pipe-D-wait-forked:
  result: skip
  set: kms_vblank
pipe-D-wait-forked-busy:
  result: skip
  set: kms_vblank
pipe-D-wait-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-D-wait-forked-hang:
  result: skip
  set: kms_vblank
pipe-D-wait-idle:
  result: skip
  set: kms_vblank
pipe-D-wait-idle-hang:
  result: skip
  set: kms_vblank
pipe-E-accuracy-idle:
  result: skip
  set: kms_vblank
pipe-E-query-busy:
  result: skip
  set: kms_vblank
pipe-E-query-busy-hang:
  result: skip
  set: kms_vblank
pipe-E-query-forked:
  result: skip
  set: kms_vblank
pipe-E-query-forked-busy:
  result: skip
  set: kms_vblank
pipe-E-query-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-E-query-forked-hang:
  result: skip
  set: kms_vblank
pipe-E-query-idle:
  result: skip
  set: kms_vblank
pipe-E-query-idle-hang:
  result: skip
  set: kms_vblank
pipe-E-ts-continuation-dpms-rpm:
  result: skip
  set: kms_vblank
pipe-E-ts-continuation-dpms-suspend:
  result: skip
  set: kms_vblank
pipe-E-ts-continuation-idle:
  result: skip
  set: kms_vblank
pipe-E-ts-continuation-idle-hang:
  result: skip
  set: kms_vblank
pipe-E-ts-continuation-modeset:
  result: skip
  set: kms_vblank
pipe-E-ts-continuation-modeset-hang:
  result: skip
  set: kms_vblank
pipe-E-ts-continuation-modeset-rpm:
  result: skip
  set: kms_vblank
pipe-E-ts-continuation-suspend:
  result: skip
  set: kms_vblank
pipe-E-wait-busy:
  result: skip
  set: kms_vblank
pipe-E-wait-busy-hang:
  result: skip
  set: kms_vblank
pipe-E-wait-forked:
  result: skip
  set: kms_vblank
pipe-E-wait-forked-busy:
  result: skip
  set: kms_vblank
pipe-E-wait-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-E-wait-forked-hang:
  result: skip
  set: kms_vblank
pipe-E-wait-idle:
  result: skip
  set: kms_vblank
pipe-E-wait-idle-hang:
  result: skip
  set: kms_vblank
pipe-F-accuracy-idle:
  result: skip
  set: kms_vblank
pipe-F-query-busy:
  result: skip
  set: kms_vblank
pipe-F-query-busy-hang:
  result: skip
  set: kms_vblank
pipe-F-query-forked:
  result: skip
  set: kms_vblank
pipe-F-query-forked-busy:
  result: skip
  set: kms_vblank
pipe-F-query-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-F-query-forked-hang:
  result: skip
  set: kms_vblank
pipe-F-query-idle:
  result: skip
  set: kms_vblank
pipe-F-query-idle-hang:
  result: skip
  set: kms_vblank
pipe-F-ts-continuation-dpms-rpm:
  result: skip
  set: kms_vblank
pipe-F-ts-continuation-dpms-suspend:
  result: skip
  set: kms_vblank
pipe-F-ts-continuation-idle:
  result: skip
  set: kms_vblank
pipe-F-ts-continuation-idle-hang:
  result: skip
  set: kms_vblank
pipe-F-ts-continuation-modeset:
  result: skip
  set: kms_vblank
pipe-F-ts-continuation-modeset-hang:
  result: skip
  set: kms_vblank
pipe-F-ts-continuation-modeset-rpm:
  result: skip
  set: kms_vblank
pipe-F-ts-continuation-suspend:
  result: skip
  set: kms_vblank
pipe-F-wait-busy:
  result: skip
  set: kms_vblank
pipe-F-wait-busy-hang:
  result: skip
  set: kms_vblank
pipe-F-wait-forked:
  result: skip
  set: kms_vblank
pipe-F-wait-forked-busy:
  result: skip
  set: kms_vblank
pipe-F-wait-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-F-wait-forked-hang:
  result: skip
  set: kms_vblank
pipe-F-wait-idle:
  result: skip
  set: kms_vblank
pipe-F-wait-idle-hang:
  result: skip
  set: kms_vblank
pipe-G-accuracy-idle:
  result: skip
  set: kms_vblank
pipe-G-query-busy:
  result: skip
  set: kms_vblank
pipe-G-query-busy-hang:
  result: skip
  set: kms_vblank
pipe-G-query-forked:
  result: skip
  set: kms_vblank
pipe-G-query-forked-busy:
  result: skip
  set: kms_vblank
pipe-G-query-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-G-query-forked-hang:
  result: skip
  set: kms_vblank
pipe-G-query-idle:
  result: skip
  set: kms_vblank
pipe-G-query-idle-hang:
  result: skip
  set: kms_vblank
pipe-G-ts-continuation-dpms-rpm:
  result: skip
  set: kms_vblank
pipe-G-ts-continuation-dpms-suspend:
  result: skip
  set: kms_vblank
pipe-G-ts-continuation-idle:
  result: skip
  set: kms_vblank
pipe-G-ts-continuation-idle-hang:
  result: skip
  set: kms_vblank
pipe-G-ts-continuation-modeset:
  result: skip
  set: kms_vblank
pipe-G-ts-continuation-modeset-hang:
  result: skip
  set: kms_vblank
pipe-G-ts-continuation-modeset-rpm:
  result: skip
  set: kms_vblank
pipe-G-ts-continuation-suspend:
  result: skip
  set: kms_vblank
pipe-G-wait-busy:
  result: skip
  set: kms_vblank
pipe-G-wait-busy-hang:
  result: skip
  set: kms_vblank
pipe-G-wait-forked:
  result: skip
  set: kms_vblank
pipe-G-wait-forked-busy:
  result: skip
  set: kms_vblank
pipe-G-wait-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-G-wait-forked-hang:
  result: skip
  set: kms_vblank
pipe-G-wait-idle:
  result: skip
  set: kms_vblank
pipe-G-wait-idle-hang:
  result: skip
  set: kms_vblank
pipe-H-accuracy-idle:
  result: skip
  set: kms_vblank
pipe-H-query-busy:
  result: skip
  set: kms_vblank
pipe-H-query-busy-hang:
  result: skip
  set: kms_vblank
pipe-H-query-forked:
  result: skip
  set: kms_vblank
pipe-H-query-forked-busy:
  result: skip
  set: kms_vblank
pipe-H-query-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-H-query-forked-hang:
  result: skip
  set: kms_vblank
pipe-H-query-idle:
  result: skip
  set: kms_vblank
pipe-H-query-idle-hang:
  result: skip
  set: kms_vblank
pipe-H-ts-continuation-dpms-rpm:
  result: skip
  set: kms_vblank
pipe-H-ts-continuation-dpms-suspend:
  result: skip
  set: kms_vblank
pipe-H-ts-continuation-idle:
  result: skip
  set: kms_vblank
pipe-H-ts-continuation-idle-hang:
  result: skip
  set: kms_vblank
pipe-H-ts-continuation-modeset:
  result: skip
  set: kms_vblank
pipe-H-ts-continuation-modeset-hang:
  result: skip
  set: kms_vblank
pipe-H-ts-continuation-modeset-rpm:
  result: skip
  set: kms_vblank
pipe-H-ts-continuation-suspend:
  result: skip
  set: kms_vblank
pipe-H-wait-busy:
  result: skip
  set: kms_vblank
pipe-H-wait-busy-hang:
  result: skip
  set: kms_vblank
pipe-H-wait-forked:
  result: skip
  set: kms_vblank
pipe-H-wait-forked-busy:
  result: skip
  set: kms_vblank
pipe-H-wait-forked-busy-hang:
  result: skip
  set: kms_vblank
pipe-H-wait-forked-hang:
  result: skip
  set: kms_vblank
pipe-H-wait-idle:
  result: skip
  set: kms_vblank
pipe-H-wait-idle-hang:
  result: skip
  set: kms_vblank
plane-cursor-legacy:
  result: skip
  set: kms_atomic
plane-immutable-zpos:
  result: skip
  set: kms_atomic
plane-invalid-params:
  result: skip
  set: kms_atomic
plane-invalid-params-fence:
  result: skip
  set: kms_atomic
plane-overlay-legacy:
  result: skip
  set: kms_atomic
plane-primary-legacy:
  result: skip
  set: kms_atomic
plane-primary-overlay-mutable-zpos:
  result: skip
  set: kms_atomic
short-buffer-block:
  result: skip
  set: drm_read
short-buffer-nonblock:
  result: skip
  set: drm_read
short-buffer-wakeup:
  result: skip
  set: drm_read
size-max:
  result: skip
  set: kms_addfb_basic
small-bo:
  result: skip
  set: kms_addfb_basic
test-only:
  result: skip
  set: kms_atomic
tile-pitch-mismatch:
  result: skip
  set: kms_addfb_basic
too-high:
  result: skip
  set: kms_addfb_basic
too-wide:
  result: skip
  set: kms_addfb_basic
unused-handle:
  result: pass
  set: kms_addfb_basic
unused-modifier:
  result: pass
  set: kms_addfb_basic
unused-offsets:
  result: pass
  set: kms_addfb_basic
unused-pitches:
  result: pass
  set: kms_addfb_basic

13963 23:12:27.746828  end: 3.1 lava-test-shell (duration 00:00:12) [common]
13964 23:12:27.746949  end: 3 lava-test-retry (duration 00:00:12) [common]
13965 23:12:27.747070  start: 4 finalize (timeout 00:07:05) [common]
13966 23:12:27.747196  start: 4.1 power-off (timeout 00:00:30) [common]
13967 23:12:27.747478  Calling: 'pduclient' '--daemon=localhost' '--hostname=mt8192-asurada-spherion-r0-cbg-3' '--port=1' '--command=off'
13968 23:12:27.825011  >> Command sent successfully.

13969 23:12:27.827482  Returned 0 in 0 seconds
13970 23:12:27.927932  end: 4.1 power-off (duration 00:00:00) [common]
13972 23:12:27.928364  start: 4.2 read-feedback (timeout 00:07:05) [common]
13973 23:12:27.928686  Listened to connection for namespace 'common' for up to 1s
13974 23:12:28.929615  Finalising connection for namespace 'common'
13975 23:12:28.929861  Disconnecting from shell: Finalise
13976 23:12:28.929983  / # 
13977 23:12:29.030311  end: 4.2 read-feedback (duration 00:00:01) [common]
13978 23:12:29.030544  end: 4 finalize (duration 00:00:01) [common]
13979 23:12:29.030690  Cleaning after the job
13980 23:12:29.030821  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12395387/tftp-deploy-dugec_kp/ramdisk
13981 23:12:29.038979  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12395387/tftp-deploy-dugec_kp/kernel
13982 23:12:29.047856  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12395387/tftp-deploy-dugec_kp/dtb
13983 23:12:29.048111  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/12395387/tftp-deploy-dugec_kp/modules
13984 23:12:29.055646  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/12395387
13985 23:12:29.191757  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/12395387
13986 23:12:29.191963  Job finished correctly