Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 48
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 88
1 23:52:34.818412 lava-dispatcher, installed at version: 2024.03
2 23:52:34.818605 start: 0 validate
3 23:52:34.818746 Start time: 2024-05-29 23:52:34.818739+00:00 (UTC)
4 23:52:34.818860 Using caching service: 'http://localhost/cache/?uri=%s'
5 23:52:34.818989 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:52:35.086800 Using caching service: 'http://localhost/cache/?uri=%s'
7 23:52:35.086983 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.91-cip21-33-g9433716496158%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 23:52:35.353545 Using caching service: 'http://localhost/cache/?uri=%s'
9 23:52:35.353714 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.91-cip21-33-g9433716496158%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 23:52:35.620588 Using caching service: 'http://localhost/cache/?uri=%s'
11 23:52:35.620744 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:52:35.886750 Using caching service: 'http://localhost/cache/?uri=%s'
13 23:52:35.886953 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.91-cip21-33-g9433716496158%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 23:52:36.153450 validate duration: 1.33
16 23:52:36.153802 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:52:36.153929 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:52:36.154019 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:52:36.154144 Not decompressing ramdisk as can be used compressed.
20 23:52:36.154228 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 23:52:36.154298 saving as /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/ramdisk/initrd.cpio.gz
22 23:52:36.154364 total size: 5628169 (5 MB)
23 23:52:36.155439 progress 0 % (0 MB)
24 23:52:36.156965 progress 5 % (0 MB)
25 23:52:36.158647 progress 10 % (0 MB)
26 23:52:36.160074 progress 15 % (0 MB)
27 23:52:36.161674 progress 20 % (1 MB)
28 23:52:36.163126 progress 25 % (1 MB)
29 23:52:36.164670 progress 30 % (1 MB)
30 23:52:36.166232 progress 35 % (1 MB)
31 23:52:36.167625 progress 40 % (2 MB)
32 23:52:36.169212 progress 45 % (2 MB)
33 23:52:36.170674 progress 50 % (2 MB)
34 23:52:36.172273 progress 55 % (2 MB)
35 23:52:36.173890 progress 60 % (3 MB)
36 23:52:36.175246 progress 65 % (3 MB)
37 23:52:36.176784 progress 70 % (3 MB)
38 23:52:36.178177 progress 75 % (4 MB)
39 23:52:36.179795 progress 80 % (4 MB)
40 23:52:36.181147 progress 85 % (4 MB)
41 23:52:36.182704 progress 90 % (4 MB)
42 23:52:36.184272 progress 95 % (5 MB)
43 23:52:36.185683 progress 100 % (5 MB)
44 23:52:36.185891 5 MB downloaded in 0.03 s (170.26 MB/s)
45 23:52:36.186043 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:52:36.186286 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:52:36.186371 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:52:36.186455 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:52:36.186589 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.91-cip21-33-g9433716496158/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 23:52:36.186658 saving as /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/kernel/Image
52 23:52:36.186720 total size: 54682112 (52 MB)
53 23:52:36.186782 No compression specified
54 23:52:36.187953 progress 0 % (0 MB)
55 23:52:36.202275 progress 5 % (2 MB)
56 23:52:36.216261 progress 10 % (5 MB)
57 23:52:36.230402 progress 15 % (7 MB)
58 23:52:36.244281 progress 20 % (10 MB)
59 23:52:36.258882 progress 25 % (13 MB)
60 23:52:36.273092 progress 30 % (15 MB)
61 23:52:36.287501 progress 35 % (18 MB)
62 23:52:36.301499 progress 40 % (20 MB)
63 23:52:36.315425 progress 45 % (23 MB)
64 23:52:36.329674 progress 50 % (26 MB)
65 23:52:36.343568 progress 55 % (28 MB)
66 23:52:36.357687 progress 60 % (31 MB)
67 23:52:36.371880 progress 65 % (33 MB)
68 23:52:36.386279 progress 70 % (36 MB)
69 23:52:36.400382 progress 75 % (39 MB)
70 23:52:36.414591 progress 80 % (41 MB)
71 23:52:36.428560 progress 85 % (44 MB)
72 23:52:36.442493 progress 90 % (46 MB)
73 23:52:36.456516 progress 95 % (49 MB)
74 23:52:36.470310 progress 100 % (52 MB)
75 23:52:36.470567 52 MB downloaded in 0.28 s (183.72 MB/s)
76 23:52:36.470766 end: 1.2.1 http-download (duration 00:00:00) [common]
78 23:52:36.471049 end: 1.2 download-retry (duration 00:00:00) [common]
79 23:52:36.471197 start: 1.3 download-retry (timeout 00:10:00) [common]
80 23:52:36.471286 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 23:52:36.471423 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.91-cip21-33-g9433716496158/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 23:52:36.471501 saving as /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 23:52:36.471564 total size: 57695 (0 MB)
84 23:52:36.471626 No compression specified
85 23:52:36.472758 progress 56 % (0 MB)
86 23:52:36.473045 progress 100 % (0 MB)
87 23:52:36.473251 0 MB downloaded in 0.00 s (32.66 MB/s)
88 23:52:36.473426 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:52:36.473733 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:52:36.473821 start: 1.4 download-retry (timeout 00:10:00) [common]
92 23:52:36.473906 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 23:52:36.474036 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 23:52:36.474136 saving as /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/nfsrootfs/full.rootfs.tar
95 23:52:36.474226 total size: 120894716 (115 MB)
96 23:52:36.474321 Using unxz to decompress xz
97 23:52:36.478315 progress 0 % (0 MB)
98 23:52:36.827601 progress 5 % (5 MB)
99 23:52:37.185407 progress 10 % (11 MB)
100 23:52:37.539493 progress 15 % (17 MB)
101 23:52:37.869323 progress 20 % (23 MB)
102 23:52:38.163943 progress 25 % (28 MB)
103 23:52:38.530406 progress 30 % (34 MB)
104 23:52:38.886018 progress 35 % (40 MB)
105 23:52:39.057303 progress 40 % (46 MB)
106 23:52:39.237900 progress 45 % (51 MB)
107 23:52:39.566228 progress 50 % (57 MB)
108 23:52:39.964169 progress 55 % (63 MB)
109 23:52:40.324793 progress 60 % (69 MB)
110 23:52:40.675709 progress 65 % (74 MB)
111 23:52:41.035684 progress 70 % (80 MB)
112 23:52:41.405248 progress 75 % (86 MB)
113 23:52:41.749714 progress 80 % (92 MB)
114 23:52:42.091684 progress 85 % (98 MB)
115 23:52:42.448862 progress 90 % (103 MB)
116 23:52:42.780161 progress 95 % (109 MB)
117 23:52:43.138269 progress 100 % (115 MB)
118 23:52:43.143652 115 MB downloaded in 6.67 s (17.29 MB/s)
119 23:52:43.143984 end: 1.4.1 http-download (duration 00:00:07) [common]
121 23:52:43.144380 end: 1.4 download-retry (duration 00:00:07) [common]
122 23:52:43.144512 start: 1.5 download-retry (timeout 00:09:53) [common]
123 23:52:43.144640 start: 1.5.1 http-download (timeout 00:09:53) [common]
124 23:52:43.144844 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.91-cip21-33-g9433716496158/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 23:52:43.144951 saving as /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/modules/modules.tar
126 23:52:43.145047 total size: 8601444 (8 MB)
127 23:52:43.145145 Using unxz to decompress xz
128 23:52:43.150382 progress 0 % (0 MB)
129 23:52:43.170454 progress 5 % (0 MB)
130 23:52:43.194967 progress 10 % (0 MB)
131 23:52:43.220818 progress 15 % (1 MB)
132 23:52:43.245472 progress 20 % (1 MB)
133 23:52:43.271017 progress 25 % (2 MB)
134 23:52:43.295893 progress 30 % (2 MB)
135 23:52:43.319369 progress 35 % (2 MB)
136 23:52:43.343842 progress 40 % (3 MB)
137 23:52:43.370910 progress 45 % (3 MB)
138 23:52:43.395071 progress 50 % (4 MB)
139 23:52:43.419647 progress 55 % (4 MB)
140 23:52:43.444302 progress 60 % (4 MB)
141 23:52:43.468261 progress 65 % (5 MB)
142 23:52:43.494684 progress 70 % (5 MB)
143 23:52:43.519688 progress 75 % (6 MB)
144 23:52:43.543172 progress 80 % (6 MB)
145 23:52:43.568838 progress 85 % (7 MB)
146 23:52:43.592598 progress 90 % (7 MB)
147 23:52:43.622012 progress 95 % (7 MB)
148 23:52:43.650463 progress 100 % (8 MB)
149 23:52:43.655994 8 MB downloaded in 0.51 s (16.05 MB/s)
150 23:52:43.656260 end: 1.5.1 http-download (duration 00:00:01) [common]
152 23:52:43.656658 end: 1.5 download-retry (duration 00:00:01) [common]
153 23:52:43.656793 start: 1.6 prepare-tftp-overlay (timeout 00:09:52) [common]
154 23:52:43.656916 start: 1.6.1 extract-nfsrootfs (timeout 00:09:52) [common]
155 23:52:47.224648 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14084357/extract-nfsrootfs-0a9r7_s_
156 23:52:47.224899 end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
157 23:52:47.225006 start: 1.6.2 lava-overlay (timeout 00:09:49) [common]
158 23:52:47.225182 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6
159 23:52:47.225356 makedir: /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin
160 23:52:47.225462 makedir: /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/tests
161 23:52:47.225561 makedir: /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/results
162 23:52:47.225665 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-add-keys
163 23:52:47.225810 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-add-sources
164 23:52:47.225942 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-background-process-start
165 23:52:47.226070 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-background-process-stop
166 23:52:47.226198 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-common-functions
167 23:52:47.226323 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-echo-ipv4
168 23:52:47.226448 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-install-packages
169 23:52:47.226573 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-installed-packages
170 23:52:47.226696 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-os-build
171 23:52:47.226822 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-probe-channel
172 23:52:47.226949 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-probe-ip
173 23:52:47.227074 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-target-ip
174 23:52:47.227197 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-target-mac
175 23:52:47.227322 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-target-storage
176 23:52:47.227448 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-test-case
177 23:52:47.227575 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-test-event
178 23:52:47.227697 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-test-feedback
179 23:52:47.227822 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-test-raise
180 23:52:47.227947 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-test-reference
181 23:52:47.228073 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-test-runner
182 23:52:47.228200 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-test-set
183 23:52:47.228326 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-test-shell
184 23:52:47.228453 Updating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-add-keys (debian)
185 23:52:47.228605 Updating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-add-sources (debian)
186 23:52:47.228745 Updating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-install-packages (debian)
187 23:52:47.228883 Updating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-installed-packages (debian)
188 23:52:47.229019 Updating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/bin/lava-os-build (debian)
189 23:52:47.229138 Creating /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/environment
190 23:52:47.229236 LAVA metadata
191 23:52:47.229342 - LAVA_JOB_ID=14084357
192 23:52:47.229406 - LAVA_DISPATCHER_IP=192.168.201.1
193 23:52:47.229516 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:49) [common]
194 23:52:47.229585 skipped lava-vland-overlay
195 23:52:47.229662 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 23:52:47.229744 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
197 23:52:47.229806 skipped lava-multinode-overlay
198 23:52:47.229878 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 23:52:47.229972 start: 1.6.2.3 test-definition (timeout 00:09:49) [common]
200 23:52:47.230049 Loading test definitions
201 23:52:47.230141 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:49) [common]
202 23:52:47.230215 Using /lava-14084357 at stage 0
203 23:52:47.230495 uuid=14084357_1.6.2.3.1 testdef=None
204 23:52:47.230584 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 23:52:47.230669 start: 1.6.2.3.2 test-overlay (timeout 00:09:49) [common]
206 23:52:47.231138 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 23:52:47.231364 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:49) [common]
209 23:52:47.231922 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 23:52:47.232153 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
212 23:52:47.232689 runner path: /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/0/tests/0_timesync-off test_uuid 14084357_1.6.2.3.1
213 23:52:47.232849 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 23:52:47.233076 start: 1.6.2.3.5 git-repo-action (timeout 00:09:49) [common]
216 23:52:47.233148 Using /lava-14084357 at stage 0
217 23:52:47.233247 Fetching tests from https://github.com/kernelci/test-definitions.git
218 23:52:47.233607 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/0/tests/1_kselftest-arm64'
219 23:52:49.247327 Running '/usr/bin/git checkout kernelci.org
220 23:52:49.397882 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/0/tests/1_kselftest-arm64/automated/linux/kselftest/kselftest.yaml
221 23:52:49.398872 uuid=14084357_1.6.2.3.5 testdef=None
222 23:52:49.399086 end: 1.6.2.3.5 git-repo-action (duration 00:00:02) [common]
224 23:52:49.399485 start: 1.6.2.3.6 test-overlay (timeout 00:09:47) [common]
225 23:52:49.400686 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 23:52:49.401075 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:47) [common]
228 23:52:49.402751 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 23:52:49.403167 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:47) [common]
231 23:52:49.404863 runner path: /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/0/tests/1_kselftest-arm64 test_uuid 14084357_1.6.2.3.5
232 23:52:49.405020 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 23:52:49.405127 BRANCH='cip-gitlab'
234 23:52:49.405231 SKIPFILE='/dev/null'
235 23:52:49.405354 SKIP_INSTALL='True'
236 23:52:49.405418 TESTPROG_URL='http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.91-cip21-33-g9433716496158/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
237 23:52:49.405479 TST_CASENAME=''
238 23:52:49.405536 TST_CMDFILES='arm64'
239 23:52:49.405691 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 23:52:49.405914 Creating lava-test-runner.conf files
242 23:52:49.406006 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14084357/lava-overlay-yupullw6/lava-14084357/0 for stage 0
243 23:52:49.406139 - 0_timesync-off
244 23:52:49.406242 - 1_kselftest-arm64
245 23:52:49.406376 end: 1.6.2.3 test-definition (duration 00:00:02) [common]
246 23:52:49.406499 start: 1.6.2.4 compress-overlay (timeout 00:09:47) [common]
247 23:52:57.063948 end: 1.6.2.4 compress-overlay (duration 00:00:08) [common]
248 23:52:57.064111 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
249 23:52:57.064209 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 23:52:57.064310 end: 1.6.2 lava-overlay (duration 00:00:10) [common]
251 23:52:57.064402 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
252 23:52:57.235359 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 23:52:57.235922 start: 1.6.4 extract-modules (timeout 00:09:39) [common]
254 23:52:57.236043 extracting modules file /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14084357/extract-nfsrootfs-0a9r7_s_
255 23:52:57.455775 extracting modules file /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14084357/extract-overlay-ramdisk-jfe8tbmi/ramdisk
256 23:52:57.678385 end: 1.6.4 extract-modules (duration 00:00:00) [common]
257 23:52:57.678569 start: 1.6.5 apply-overlay-tftp (timeout 00:09:38) [common]
258 23:52:57.678670 [common] Applying overlay to NFS
259 23:52:57.678745 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14084357/compress-overlay-mmd4rvpn/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14084357/extract-nfsrootfs-0a9r7_s_
260 23:52:58.616552 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 23:52:58.616727 start: 1.6.6 configure-preseed-file (timeout 00:09:38) [common]
262 23:52:58.616820 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 23:52:58.616910 start: 1.6.7 compress-ramdisk (timeout 00:09:38) [common]
264 23:52:58.616996 Building ramdisk /var/lib/lava/dispatcher/tmp/14084357/extract-overlay-ramdisk-jfe8tbmi/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14084357/extract-overlay-ramdisk-jfe8tbmi/ramdisk
265 23:52:58.943108 >> 130335 blocks
266 23:53:01.114717 rename /var/lib/lava/dispatcher/tmp/14084357/extract-overlay-ramdisk-jfe8tbmi/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/ramdisk/ramdisk.cpio.gz
267 23:53:01.115224 end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
268 23:53:01.115392 start: 1.6.8 prepare-kernel (timeout 00:09:35) [common]
269 23:53:01.115527 start: 1.6.8.1 prepare-fit (timeout 00:09:35) [common]
270 23:53:01.115665 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/kernel/Image']
271 23:53:15.205456 Returned 0 in 14 seconds
272 23:53:15.306077 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/kernel/image.itb
273 23:53:15.662048 output: FIT description: Kernel Image image with one or more FDT blobs
274 23:53:15.662428 output: Created: Thu May 30 00:53:15 2024
275 23:53:15.662540 output: Image 0 (kernel-1)
276 23:53:15.662624 output: Description:
277 23:53:15.662708 output: Created: Thu May 30 00:53:15 2024
278 23:53:15.662808 output: Type: Kernel Image
279 23:53:15.662910 output: Compression: lzma compressed
280 23:53:15.663010 output: Data Size: 13063488 Bytes = 12757.31 KiB = 12.46 MiB
281 23:53:15.663111 output: Architecture: AArch64
282 23:53:15.663211 output: OS: Linux
283 23:53:15.663311 output: Load Address: 0x00000000
284 23:53:15.663408 output: Entry Point: 0x00000000
285 23:53:15.663506 output: Hash algo: crc32
286 23:53:15.663601 output: Hash value: 907bf91d
287 23:53:15.663696 output: Image 1 (fdt-1)
288 23:53:15.663791 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 23:53:15.663886 output: Created: Thu May 30 00:53:15 2024
290 23:53:15.663981 output: Type: Flat Device Tree
291 23:53:15.664092 output: Compression: uncompressed
292 23:53:15.664184 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 23:53:15.664281 output: Architecture: AArch64
294 23:53:15.664375 output: Hash algo: crc32
295 23:53:15.664468 output: Hash value: a9713552
296 23:53:15.664560 output: Image 2 (ramdisk-1)
297 23:53:15.664652 output: Description: unavailable
298 23:53:15.664744 output: Created: Thu May 30 00:53:15 2024
299 23:53:15.664836 output: Type: RAMDisk Image
300 23:53:15.664928 output: Compression: Unknown Compression
301 23:53:15.665020 output: Data Size: 18719586 Bytes = 18280.85 KiB = 17.85 MiB
302 23:53:15.665112 output: Architecture: AArch64
303 23:53:15.665204 output: OS: Linux
304 23:53:15.665306 output: Load Address: unavailable
305 23:53:15.665399 output: Entry Point: unavailable
306 23:53:15.665491 output: Hash algo: crc32
307 23:53:15.665583 output: Hash value: 420299cc
308 23:53:15.665685 output: Default Configuration: 'conf-1'
309 23:53:15.665777 output: Configuration 0 (conf-1)
310 23:53:15.665868 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 23:53:15.665960 output: Kernel: kernel-1
312 23:53:15.666051 output: Init Ramdisk: ramdisk-1
313 23:53:15.666153 output: FDT: fdt-1
314 23:53:15.666258 output: Loadables: kernel-1
315 23:53:15.666374 output:
316 23:53:15.666671 end: 1.6.8.1 prepare-fit (duration 00:00:15) [common]
317 23:53:15.666817 end: 1.6.8 prepare-kernel (duration 00:00:15) [common]
318 23:53:15.666973 end: 1.6 prepare-tftp-overlay (duration 00:00:32) [common]
319 23:53:15.667107 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
320 23:53:15.667225 No LXC device requested
321 23:53:15.667348 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 23:53:15.667482 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
323 23:53:15.667600 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 23:53:15.667708 Checking files for TFTP limit of 4294967296 bytes.
325 23:53:15.668375 end: 1 tftp-deploy (duration 00:00:40) [common]
326 23:53:15.668517 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 23:53:15.668650 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 23:53:15.668838 substitutions:
329 23:53:15.668938 - {DTB}: 14084357/tftp-deploy-30xe4kpc/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 23:53:15.669042 - {INITRD}: 14084357/tftp-deploy-30xe4kpc/ramdisk/ramdisk.cpio.gz
331 23:53:15.669141 - {KERNEL}: 14084357/tftp-deploy-30xe4kpc/kernel/Image
332 23:53:15.669239 - {LAVA_MAC}: None
333 23:53:15.669379 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14084357/extract-nfsrootfs-0a9r7_s_
334 23:53:15.669477 - {NFS_SERVER_IP}: 192.168.201.1
335 23:53:15.669572 - {PRESEED_CONFIG}: None
336 23:53:15.669668 - {PRESEED_LOCAL}: None
337 23:53:15.669762 - {RAMDISK}: 14084357/tftp-deploy-30xe4kpc/ramdisk/ramdisk.cpio.gz
338 23:53:15.669856 - {ROOT_PART}: None
339 23:53:15.669950 - {ROOT}: None
340 23:53:15.670043 - {SERVER_IP}: 192.168.201.1
341 23:53:15.670137 - {TEE}: None
342 23:53:15.670230 Parsed boot commands:
343 23:53:15.670321 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 23:53:15.670562 Parsed boot commands: tftpboot 192.168.201.1 14084357/tftp-deploy-30xe4kpc/kernel/image.itb 14084357/tftp-deploy-30xe4kpc/kernel/cmdline
345 23:53:15.670687 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 23:53:15.670814 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 23:53:15.670949 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 23:53:15.671077 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 23:53:15.671187 Not connected, no need to disconnect.
350 23:53:15.671304 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 23:53:15.671432 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 23:53:15.671546 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
353 23:53:15.675525 Setting prompt string to ['lava-test: # ']
354 23:53:15.675951 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 23:53:15.676077 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 23:53:15.676216 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 23:53:15.676389 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 23:53:15.676599 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-3']
359 23:53:38.021048 Returned 0 in 22 seconds
360 23:53:38.121721 end: 2.2.2.1 pdu-reboot (duration 00:00:22) [common]
362 23:53:38.122183 end: 2.2.2 reset-device (duration 00:00:22) [common]
363 23:53:38.122345 start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
364 23:53:38.122469 Setting prompt string to 'Starting depthcharge on Juniper...'
365 23:53:38.122561 Changing prompt to 'Starting depthcharge on Juniper...'
366 23:53:38.122632 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
367 23:53:38.123093 [Enter `^Ec?' for help]
368 23:53:38.123205 [DL] 00000000 00000000 010701
369 23:53:38.123313
370 23:53:38.123419
371 23:53:38.123522 F0: 102B 0000
372 23:53:38.123633
373 23:53:38.123729 F3: 1006 0033 [0200]
374 23:53:38.123824
375 23:53:38.123918 F3: 4001 00E0 [0200]
376 23:53:38.124008
377 23:53:38.124095 F3: 0000 0000
378 23:53:38.124183
379 23:53:38.124270 V0: 0000 0000 [0001]
380 23:53:38.124356
381 23:53:38.124442 00: 1027 0002
382 23:53:38.124533
383 23:53:38.124619 01: 0000 0000
384 23:53:38.124708
385 23:53:38.124799 BP: 0C00 0251 [0000]
386 23:53:38.124860
387 23:53:38.124918 G0: 1182 0000
388 23:53:38.124975
389 23:53:38.125031 EC: 0004 0000 [0001]
390 23:53:38.125088
391 23:53:38.125144 S7: 0000 0000 [0000]
392 23:53:38.125201
393 23:53:38.125264 CC: 0000 0000 [0001]
394 23:53:38.125324
395 23:53:38.125382 T0: 0000 00DB [000F]
396 23:53:38.125458
397 23:53:38.125516 Jump to BL
398 23:53:38.125573
399 23:53:38.125630
400 23:53:38.125703
401 23:53:38.125761 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
402 23:53:38.125821 ARM64: Exception handlers installed.
403 23:53:38.125914 ARM64: Testing exception
404 23:53:38.125975 ARM64: Done test exception
405 23:53:38.126032 WDT: Last reset was cold boot
406 23:53:38.126089 SPI0(PAD0) initialized at 992727 Hz
407 23:53:38.126163 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
408 23:53:38.126223 Manufacturer: ef
409 23:53:38.126279 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
410 23:53:38.126337 Probing TPM: . done!
411 23:53:38.126410 TPM ready after 0 ms
412 23:53:38.126469 Connected to device vid:did:rid of 1ae0:0028:00
413 23:53:38.126560 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
414 23:53:38.126659 Initialized TPM device CR50 revision 0
415 23:53:38.126747 tlcl_send_startup: Startup return code is 0
416 23:53:38.126842 TPM: setup succeeded
417 23:53:38.126933 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
418 23:53:38.127021 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
419 23:53:38.127118 in-header: 03 19 00 00 08 00 00 00
420 23:53:38.127206 in-data: a2 e0 47 00 13 00 00 00
421 23:53:38.127292 Chrome EC: UHEPI supported
422 23:53:38.127389 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
423 23:53:38.127477 in-header: 03 a1 00 00 08 00 00 00
424 23:53:38.127564 in-data: 84 60 60 10 00 00 00 00
425 23:53:38.127660 Phase 1
426 23:53:38.127747 FMAP: area GBB found @ 3f5000 (12032 bytes)
427 23:53:38.127844 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
428 23:53:38.127933 VB2:vb2_check_recovery() Recovery was requested manually
429 23:53:38.128021 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
430 23:53:38.128115 Recovery requested (1009000e)
431 23:53:38.128203 tlcl_extend: response is 0
432 23:53:38.128290 tlcl_extend: response is 0
433 23:53:38.128369
434 23:53:38.128427
435 23:53:38.128485 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
436 23:53:38.128543 ARM64: Exception handlers installed.
437 23:53:38.128631 ARM64: Testing exception
438 23:53:38.128718 ARM64: Done test exception
439 23:53:38.128806 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x2000
440 23:53:38.128902 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
441 23:53:38.128990 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
442 23:53:38.129087 [RTC]rtc_get_frequency_meter,134: input=0xf, output=865
443 23:53:38.129183 [RTC]rtc_get_frequency_meter,134: input=0x7, output=732
444 23:53:38.129275 [RTC]rtc_get_frequency_meter,134: input=0xb, output=800
445 23:53:38.129353 [RTC]rtc_get_frequency_meter,134: input=0x9, output=766
446 23:53:38.129412 [RTC]rtc_get_frequency_meter,134: input=0xa, output=783
447 23:53:38.129490 [RTC]rtc_get_frequency_meter,134: input=0xa, output=783
448 23:53:38.129557 [RTC]rtc_get_frequency_meter,134: input=0xb, output=796
449 23:53:38.129618 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b
450 23:53:38.129676 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
451 23:53:38.129733 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
452 23:53:38.129802 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
453 23:53:38.129861 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
454 23:53:38.129917 in-header: 03 19 00 00 08 00 00 00
455 23:53:38.129984 in-data: a2 e0 47 00 13 00 00 00
456 23:53:38.130087 Chrome EC: UHEPI supported
457 23:53:38.130176 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
458 23:53:38.130265 in-header: 03 a1 00 00 08 00 00 00
459 23:53:38.130362 in-data: 84 60 60 10 00 00 00 00
460 23:53:38.130449 Skip loading cached calibration data
461 23:53:38.130542 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
462 23:53:38.130634 in-header: 03 a1 00 00 08 00 00 00
463 23:53:38.130721 in-data: 84 60 60 10 00 00 00 00
464 23:53:38.130817 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
465 23:53:38.130906 in-header: 03 a1 00 00 08 00 00 00
466 23:53:38.130993 in-data: 84 60 60 10 00 00 00 00
467 23:53:38.131088 ADC[3]: Raw value=1033918 ID=8
468 23:53:38.131175 Manufacturer: ef
469 23:53:38.131262 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
470 23:53:38.131359 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
471 23:53:38.131447 CBFS @ 21000 size 3d4000
472 23:53:38.131542 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
473 23:53:38.131632 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
474 23:53:38.131719 CBFS: Found @ offset 3c880 size 4b
475 23:53:38.131814 DRAM-K: Full Calibration
476 23:53:38.131902 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
477 23:53:38.131989 CBFS @ 21000 size 3d4000
478 23:53:38.132085 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
479 23:53:38.132173 CBFS: Locating 'fallback/dram'
480 23:53:38.132259 CBFS: Found @ offset 24b00 size 12268
481 23:53:38.132355 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
482 23:53:38.132443 ddr_geometry: 1, config: 0x0
483 23:53:38.132538 header.status = 0x0
484 23:53:38.132626 header.magic = 0x44524d4b (expected: 0x44524d4b)
485 23:53:38.132714 header.version = 0x5 (expected: 0x5)
486 23:53:38.133015 header.size = 0x8f0 (expected: 0x8f0)
487 23:53:38.133108 header.config = 0x0
488 23:53:38.133199 header.flags = 0x0
489 23:53:38.133294 header.checksum = 0x0
490 23:53:38.133354 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
491 23:53:38.133412 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
492 23:53:38.133487 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
493 23:53:38.133546 ddr_geometry:1
494 23:53:38.133603 [EMI] new MDL number = 1
495 23:53:38.133668 dram_cbt_mode_extern: 0
496 23:53:38.133732 dram_cbt_mode [RK0]: 0, [RK1]: 0
497 23:53:38.133789 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
498 23:53:38.133846
499 23:53:38.133904
500 23:53:38.133972 [Bianco] ETT version 0.0.0.1
501 23:53:38.134030 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
502 23:53:38.134087
503 23:53:38.134154 vSetVcoreByFreq with vcore:762500, freq=1600
504 23:53:38.134216
505 23:53:38.134273 [DramcInit]
506 23:53:38.134329 AutoRefreshCKEOff AutoREF OFF
507 23:53:38.134400 DDRPhyPLLSetting-CKEOFF
508 23:53:38.134488 DDRPhyPLLSetting-CKEON
509 23:53:38.134574
510 23:53:38.134669 Enable WDQS
511 23:53:38.134757 [ModeRegInit_LP4] CH0 RK0
512 23:53:38.134847 Write Rank0 MR13 =0x18
513 23:53:38.134939 Write Rank0 MR12 =0x5d
514 23:53:38.135026 Write Rank0 MR1 =0x56
515 23:53:38.135120 Write Rank0 MR2 =0x1a
516 23:53:38.135208 Write Rank0 MR11 =0x0
517 23:53:38.135294 Write Rank0 MR22 =0x38
518 23:53:38.135389 Write Rank0 MR14 =0x5d
519 23:53:38.135476 Write Rank0 MR3 =0x30
520 23:53:38.135562 Write Rank0 MR13 =0x58
521 23:53:38.135657 Write Rank0 MR12 =0x5d
522 23:53:38.135744 Write Rank0 MR1 =0x56
523 23:53:38.135837 Write Rank0 MR2 =0x2d
524 23:53:38.135925 Write Rank0 MR11 =0x23
525 23:53:38.136011 Write Rank0 MR22 =0x34
526 23:53:38.136104 Write Rank0 MR14 =0x10
527 23:53:38.136192 Write Rank0 MR3 =0x30
528 23:53:38.136278 Write Rank0 MR13 =0xd8
529 23:53:38.136373 [ModeRegInit_LP4] CH0 RK1
530 23:53:38.136460 Write Rank1 MR13 =0x18
531 23:53:38.136556 Write Rank1 MR12 =0x5d
532 23:53:38.136652 Write Rank1 MR1 =0x56
533 23:53:38.136739 Write Rank1 MR2 =0x1a
534 23:53:38.136829 Write Rank1 MR11 =0x0
535 23:53:38.136920 Write Rank1 MR22 =0x38
536 23:53:38.137006 Write Rank1 MR14 =0x5d
537 23:53:38.137100 Write Rank1 MR3 =0x30
538 23:53:38.137188 Write Rank1 MR13 =0x58
539 23:53:38.137279 Write Rank1 MR12 =0x5d
540 23:53:38.137355 Write Rank1 MR1 =0x56
541 23:53:38.137414 Write Rank1 MR2 =0x2d
542 23:53:38.137471 Write Rank1 MR11 =0x23
543 23:53:38.137527 Write Rank1 MR22 =0x34
544 23:53:38.137593 Write Rank1 MR14 =0x10
545 23:53:38.137653 Write Rank1 MR3 =0x30
546 23:53:38.137709 Write Rank1 MR13 =0xd8
547 23:53:38.137765 [ModeRegInit_LP4] CH1 RK0
548 23:53:38.137834 Write Rank0 MR13 =0x18
549 23:53:38.137892 Write Rank0 MR12 =0x5d
550 23:53:38.137949 Write Rank0 MR1 =0x56
551 23:53:38.138005 Write Rank0 MR2 =0x1a
552 23:53:38.138061 Write Rank0 MR11 =0x0
553 23:53:38.138135 Write Rank0 MR22 =0x38
554 23:53:38.138192 Write Rank0 MR14 =0x5d
555 23:53:38.138247 Write Rank0 MR3 =0x30
556 23:53:38.138303 Write Rank0 MR13 =0x58
557 23:53:38.138397 Write Rank0 MR12 =0x5d
558 23:53:38.138484 Write Rank0 MR1 =0x56
559 23:53:38.138573 Write Rank0 MR2 =0x2d
560 23:53:38.138666 Write Rank0 MR11 =0x23
561 23:53:38.138752 Write Rank0 MR22 =0x34
562 23:53:38.138847 Write Rank0 MR14 =0x10
563 23:53:38.138934 Write Rank0 MR3 =0x30
564 23:53:38.139020 Write Rank0 MR13 =0xd8
565 23:53:38.139114 [ModeRegInit_LP4] CH1 RK1
566 23:53:38.139202 Write Rank1 MR13 =0x18
567 23:53:38.139288 Write Rank1 MR12 =0x5d
568 23:53:38.139383 Write Rank1 MR1 =0x56
569 23:53:38.139469 Write Rank1 MR2 =0x1a
570 23:53:38.139562 Write Rank1 MR11 =0x0
571 23:53:38.139649 Write Rank1 MR22 =0x38
572 23:53:38.139735 Write Rank1 MR14 =0x5d
573 23:53:38.139829 Write Rank1 MR3 =0x30
574 23:53:38.139916 Write Rank1 MR13 =0x58
575 23:53:38.140009 Write Rank1 MR12 =0x5d
576 23:53:38.140097 Write Rank1 MR1 =0x56
577 23:53:38.140182 Write Rank1 MR2 =0x2d
578 23:53:38.140277 Write Rank1 MR11 =0x23
579 23:53:38.140364 Write Rank1 MR22 =0x34
580 23:53:38.140449 Write Rank1 MR14 =0x10
581 23:53:38.140544 Write Rank1 MR3 =0x30
582 23:53:38.140630 Write Rank1 MR13 =0xd8
583 23:53:38.140716 match AC timing 3
584 23:53:38.140814 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
585 23:53:38.140902 [MiockJmeterHQA]
586 23:53:38.141004 vSetVcoreByFreq with vcore:762500, freq=1600
587 23:53:38.141093
588 23:53:38.141180 MIOCK jitter meter ch=0
589 23:53:38.141276
590 23:53:38.141337 1T = (99-17) = 82 dly cells
591 23:53:38.141396 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
592 23:53:38.141454 vSetVcoreByFreq with vcore:725000, freq=1200
593 23:53:38.141529
594 23:53:38.141587 MIOCK jitter meter ch=0
595 23:53:38.141644
596 23:53:38.141700 1T = (94-16) = 78 dly cells
597 23:53:38.141776 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
598 23:53:38.141835 vSetVcoreByFreq with vcore:725000, freq=800
599 23:53:38.141892
600 23:53:38.141949 MIOCK jitter meter ch=0
601 23:53:38.142019
602 23:53:38.142076 1T = (94-16) = 78 dly cells
603 23:53:38.142134 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
604 23:53:38.142196 vSetVcoreByFreq with vcore:762500, freq=1600
605 23:53:38.142290 vSetVcoreByFreq with vcore:762500, freq=1600
606 23:53:38.142376
607 23:53:38.142470 K DRVP
608 23:53:38.142558 1. OCD DRVP=0 CALOUT=0
609 23:53:38.142647 1. OCD DRVP=1 CALOUT=0
610 23:53:38.142744 1. OCD DRVP=2 CALOUT=0
611 23:53:38.142834 1. OCD DRVP=3 CALOUT=0
612 23:53:38.142927 1. OCD DRVP=4 CALOUT=0
613 23:53:38.143021 1. OCD DRVP=5 CALOUT=0
614 23:53:38.143110 1. OCD DRVP=6 CALOUT=0
615 23:53:38.143206 1. OCD DRVP=7 CALOUT=0
616 23:53:38.143296 1. OCD DRVP=8 CALOUT=0
617 23:53:38.143385 1. OCD DRVP=9 CALOUT=1
618 23:53:38.143482
619 23:53:38.143571 1. OCD DRVP calibration OK! DRVP=9
620 23:53:38.143663
621 23:53:38.143758
622 23:53:38.143844
623 23:53:38.143937 K ODTN
624 23:53:38.144025 3. OCD ODTN=0 ,CALOUT=1
625 23:53:38.144116 3. OCD ODTN=1 ,CALOUT=1
626 23:53:38.144213 3. OCD ODTN=2 ,CALOUT=1
627 23:53:38.144302 3. OCD ODTN=3 ,CALOUT=1
628 23:53:38.144391 3. OCD ODTN=4 ,CALOUT=1
629 23:53:38.144465 3. OCD ODTN=5 ,CALOUT=1
630 23:53:38.144524 3. OCD ODTN=6 ,CALOUT=1
631 23:53:38.144581 3. OCD ODTN=7 ,CALOUT=0
632 23:53:38.144659
633 23:53:38.144753 3. OCD ODTN calibration OK! ODTN=7
634 23:53:38.144843
635 23:53:38.144938 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
636 23:53:38.145026 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
637 23:53:38.145114 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
638 23:53:38.145210
639 23:53:38.145308 K DRVP
640 23:53:38.145369 1. OCD DRVP=0 CALOUT=0
641 23:53:38.145446 1. OCD DRVP=1 CALOUT=0
642 23:53:38.145506 1. OCD DRVP=2 CALOUT=0
643 23:53:38.145564 1. OCD DRVP=3 CALOUT=0
644 23:53:38.145641 1. OCD DRVP=4 CALOUT=0
645 23:53:38.145731 1. OCD DRVP=5 CALOUT=0
646 23:53:38.145792 1. OCD DRVP=6 CALOUT=0
647 23:53:38.145851 1. OCD DRVP=7 CALOUT=0
648 23:53:38.145909 1. OCD DRVP=8 CALOUT=0
649 23:53:38.145966 1. OCD DRVP=9 CALOUT=0
650 23:53:38.146216 1. OCD DRVP=10 CALOUT=1
651 23:53:38.146280
652 23:53:38.146338 1. OCD DRVP calibration OK! DRVP=10
653 23:53:38.146416
654 23:53:38.146475
655 23:53:38.146532
656 23:53:38.146589 K ODTN
657 23:53:38.146663 3. OCD ODTN=0 ,CALOUT=1
658 23:53:38.146723 3. OCD ODTN=1 ,CALOUT=1
659 23:53:38.146780 3. OCD ODTN=2 ,CALOUT=1
660 23:53:38.146838 3. OCD ODTN=3 ,CALOUT=1
661 23:53:38.146913 3. OCD ODTN=4 ,CALOUT=1
662 23:53:38.146972 3. OCD ODTN=5 ,CALOUT=1
663 23:53:38.147030 3. OCD ODTN=6 ,CALOUT=1
664 23:53:38.147087 3. OCD ODTN=7 ,CALOUT=1
665 23:53:38.147164 3. OCD ODTN=8 ,CALOUT=1
666 23:53:38.147223 3. OCD ODTN=9 ,CALOUT=1
667 23:53:38.147280 3. OCD ODTN=10 ,CALOUT=1
668 23:53:38.147338 3. OCD ODTN=11 ,CALOUT=1
669 23:53:38.147413 3. OCD ODTN=12 ,CALOUT=1
670 23:53:38.147473 3. OCD ODTN=13 ,CALOUT=1
671 23:53:38.147530 3. OCD ODTN=14 ,CALOUT=0
672 23:53:38.147587
673 23:53:38.147661 3. OCD ODTN calibration OK! ODTN=14
674 23:53:38.147720
675 23:53:38.147777 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14
676 23:53:38.147833 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14
677 23:53:38.147922 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)
678 23:53:38.148010
679 23:53:38.148097 [DramcInit]
680 23:53:38.148193 AutoRefreshCKEOff AutoREF OFF
681 23:53:38.148280 DDRPhyPLLSetting-CKEOFF
682 23:53:38.148376 DDRPhyPLLSetting-CKEON
683 23:53:38.148471
684 23:53:38.148557 Enable WDQS
685 23:53:38.148653 ==
686 23:53:38.148741 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
687 23:53:38.148833 fsp= 1, odt_onoff= 1, Byte mode= 0
688 23:53:38.148925 ==
689 23:53:38.149011 [Duty_Offset_Calibration]
690 23:53:38.149103
691 23:53:38.149193 ===========================
692 23:53:38.149288 B0:0 B1:1 CA:1
693 23:53:38.149385 ==
694 23:53:38.149473 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
695 23:53:38.149561 fsp= 1, odt_onoff= 1, Byte mode= 0
696 23:53:38.149656 ==
697 23:53:38.149744 [Duty_Offset_Calibration]
698 23:53:38.149837
699 23:53:38.149924 ===========================
700 23:53:38.150011 B0:1 B1:2 CA:0
701 23:53:38.150104 [ModeRegInit_LP4] CH0 RK0
702 23:53:38.150192 Write Rank0 MR13 =0x18
703 23:53:38.150278 Write Rank0 MR12 =0x5d
704 23:53:38.150373 Write Rank0 MR1 =0x56
705 23:53:38.150460 Write Rank0 MR2 =0x1a
706 23:53:38.150546 Write Rank0 MR11 =0x0
707 23:53:38.150626 Write Rank0 MR22 =0x38
708 23:53:38.150684 Write Rank0 MR14 =0x5d
709 23:53:38.150741 Write Rank0 MR3 =0x30
710 23:53:38.150796 Write Rank0 MR13 =0x58
711 23:53:38.150870 Write Rank0 MR12 =0x5d
712 23:53:38.150927 Write Rank0 MR1 =0x56
713 23:53:38.150983 Write Rank0 MR2 =0x2d
714 23:53:38.151039 Write Rank0 MR11 =0x23
715 23:53:38.151122 Write Rank0 MR22 =0x34
716 23:53:38.151209 Write Rank0 MR14 =0x10
717 23:53:38.151295 Write Rank0 MR3 =0x30
718 23:53:38.151390 Write Rank0 MR13 =0xd8
719 23:53:38.151477 [ModeRegInit_LP4] CH0 RK1
720 23:53:38.151566 Write Rank1 MR13 =0x18
721 23:53:38.151659 Write Rank1 MR12 =0x5d
722 23:53:38.151745 Write Rank1 MR1 =0x56
723 23:53:38.151839 Write Rank1 MR2 =0x1a
724 23:53:38.151926 Write Rank1 MR11 =0x0
725 23:53:38.152012 Write Rank1 MR22 =0x38
726 23:53:38.152110 Write Rank1 MR14 =0x5d
727 23:53:38.152197 Write Rank1 MR3 =0x30
728 23:53:38.152293 Write Rank1 MR13 =0x58
729 23:53:38.152380 Write Rank1 MR12 =0x5d
730 23:53:38.152466 Write Rank1 MR1 =0x56
731 23:53:38.152552 Write Rank1 MR2 =0x2d
732 23:53:38.152638 Write Rank1 MR11 =0x23
733 23:53:38.152724 Write Rank1 MR22 =0x34
734 23:53:38.152810 Write Rank1 MR14 =0x10
735 23:53:38.152895 Write Rank1 MR3 =0x30
736 23:53:38.152984 Write Rank1 MR13 =0xd8
737 23:53:38.153070 [ModeRegInit_LP4] CH1 RK0
738 23:53:38.153156 Write Rank0 MR13 =0x18
739 23:53:38.153242 Write Rank0 MR12 =0x5d
740 23:53:38.153331 Write Rank0 MR1 =0x56
741 23:53:38.153419 Write Rank0 MR2 =0x1a
742 23:53:38.153509 Write Rank0 MR11 =0x0
743 23:53:38.153602 Write Rank0 MR22 =0x38
744 23:53:38.153697 Write Rank0 MR14 =0x5d
745 23:53:38.153794 Write Rank0 MR3 =0x30
746 23:53:38.153887 Write Rank0 MR13 =0x58
747 23:53:38.153977 Write Rank0 MR12 =0x5d
748 23:53:38.154066 Write Rank0 MR1 =0x56
749 23:53:38.154154 Write Rank0 MR2 =0x2d
750 23:53:38.154241 Write Rank0 MR11 =0x23
751 23:53:38.154337 Write Rank0 MR22 =0x34
752 23:53:38.154438 Write Rank0 MR14 =0x10
753 23:53:38.154531 Write Rank0 MR3 =0x30
754 23:53:38.154593 Write Rank0 MR13 =0xd8
755 23:53:38.154653 [ModeRegInit_LP4] CH1 RK1
756 23:53:38.154712 Write Rank1 MR13 =0x18
757 23:53:38.154770 Write Rank1 MR12 =0x5d
758 23:53:38.154827 Write Rank1 MR1 =0x56
759 23:53:38.154883 Write Rank1 MR2 =0x1a
760 23:53:38.154939 Write Rank1 MR11 =0x0
761 23:53:38.154996 Write Rank1 MR22 =0x38
762 23:53:38.155052 Write Rank1 MR14 =0x5d
763 23:53:38.155109 Write Rank1 MR3 =0x30
764 23:53:38.155164 Write Rank1 MR13 =0x58
765 23:53:38.155221 Write Rank1 MR12 =0x5d
766 23:53:38.155277 Write Rank1 MR1 =0x56
767 23:53:38.155333 Write Rank1 MR2 =0x2d
768 23:53:38.155389 Write Rank1 MR11 =0x23
769 23:53:38.155445 Write Rank1 MR22 =0x34
770 23:53:38.155501 Write Rank1 MR14 =0x10
771 23:53:38.155557 Write Rank1 MR3 =0x30
772 23:53:38.155613 Write Rank1 MR13 =0xd8
773 23:53:38.155669 match AC timing 3
774 23:53:38.155725 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
775 23:53:38.155783 DramC Write-DBI off
776 23:53:38.155839 DramC Read-DBI off
777 23:53:38.155894 Write Rank0 MR13 =0x59
778 23:53:38.155950 ==
779 23:53:38.156006 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
780 23:53:38.156063 fsp= 1, odt_onoff= 1, Byte mode= 0
781 23:53:38.156121 ==
782 23:53:38.156177 === u2Vref_new: 0x56 --> 0x2d
783 23:53:38.156237 === u2Vref_new: 0x58 --> 0x38
784 23:53:38.156308 === u2Vref_new: 0x5a --> 0x39
785 23:53:38.156366 === u2Vref_new: 0x5c --> 0x3c
786 23:53:38.156423 === u2Vref_new: 0x5e --> 0x3d
787 23:53:38.156479 === u2Vref_new: 0x60 --> 0xa0
788 23:53:38.156535
789 23:53:38.156591 CBT Vref found, early break!
790 23:53:38.156648 [CA 0] Center 33 (4~63) winsize 60
791 23:53:38.156703 [CA 1] Center 34 (5~63) winsize 59
792 23:53:38.156759 [CA 2] Center 29 (1~57) winsize 57
793 23:53:38.156815 [CA 3] Center 24 (-3~51) winsize 55
794 23:53:38.156871 [CA 4] Center 25 (-2~52) winsize 55
795 23:53:38.156928 [CA 5] Center 30 (2~58) winsize 57
796 23:53:38.156984
797 23:53:38.157040 [CATrainingPosCal] consider 1 rank data
798 23:53:38.157097 u2DelayCellTimex100 = 762/100 ps
799 23:53:38.157152 CA0 delay=33 (4~63),Diff = 9 PI (11 cell)
800 23:53:38.157209 CA1 delay=34 (5~63),Diff = 10 PI (12 cell)
801 23:53:38.157273 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
802 23:53:38.157332 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
803 23:53:38.157389 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
804 23:53:38.157445 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
805 23:53:38.157502
806 23:53:38.157558 CA PerBit enable=1, Macro0, CA PI delay=24
807 23:53:38.157614 === u2Vref_new: 0x56 --> 0x2d
808 23:53:38.157671
809 23:53:38.157726 Vref(ca) range 1: 22
810 23:53:38.157782
811 23:53:38.157838 CS Dly= 10 (41-0-32)
812 23:53:38.157894 Write Rank0 MR13 =0xd8
813 23:53:38.157950 Write Rank0 MR13 =0xd8
814 23:53:38.158006 Write Rank0 MR12 =0x56
815 23:53:38.158278 Write Rank1 MR13 =0x59
816 23:53:38.158341 ==
817 23:53:38.158399 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
818 23:53:38.158456 fsp= 1, odt_onoff= 1, Byte mode= 0
819 23:53:38.158514 ==
820 23:53:38.158571 === u2Vref_new: 0x56 --> 0x2d
821 23:53:38.158627 === u2Vref_new: 0x58 --> 0x38
822 23:53:38.158685 === u2Vref_new: 0x5a --> 0x39
823 23:53:38.158741 === u2Vref_new: 0x5c --> 0x3c
824 23:53:38.158797 === u2Vref_new: 0x5e --> 0x3d
825 23:53:38.158853 === u2Vref_new: 0x60 --> 0xa0
826 23:53:38.158908 [CA 0] Center 34 (5~63) winsize 59
827 23:53:38.158965 [CA 1] Center 34 (6~63) winsize 58
828 23:53:38.159020 [CA 2] Center 29 (1~58) winsize 58
829 23:53:38.159076 [CA 3] Center 23 (-4~51) winsize 56
830 23:53:38.159132 [CA 4] Center 24 (-3~52) winsize 56
831 23:53:38.159188 [CA 5] Center 30 (1~59) winsize 59
832 23:53:38.159244
833 23:53:38.159300 [CATrainingPosCal] consider 2 rank data
834 23:53:38.159356 u2DelayCellTimex100 = 762/100 ps
835 23:53:38.159412 CA0 delay=34 (5~63),Diff = 10 PI (12 cell)
836 23:53:38.159469 CA1 delay=34 (6~63),Diff = 10 PI (12 cell)
837 23:53:38.159525 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
838 23:53:38.159582 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
839 23:53:38.159637 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
840 23:53:38.159693 CA5 delay=30 (2~58),Diff = 6 PI (7 cell)
841 23:53:38.159750
842 23:53:38.159806 CA PerBit enable=1, Macro0, CA PI delay=24
843 23:53:38.159862 === u2Vref_new: 0x56 --> 0x2d
844 23:53:38.159917
845 23:53:38.159978 Vref(ca) range 1: 22
846 23:53:38.160047
847 23:53:38.160104 CS Dly= 11 (42-0-32)
848 23:53:38.160160 Write Rank1 MR13 =0xd8
849 23:53:38.160216 Write Rank1 MR13 =0xd8
850 23:53:38.160272 Write Rank1 MR12 =0x56
851 23:53:38.160328 [RankSwap] Rank num 2, (Multi 1), Rank 0
852 23:53:38.160385 Write Rank0 MR2 =0xad
853 23:53:38.160441 [Write Leveling]
854 23:53:38.160497 delay byte0 byte1 byte2 byte3
855 23:53:38.160552
856 23:53:38.160608 10 0 0
857 23:53:38.160665 11 0 0
858 23:53:38.160721 12 0 0
859 23:53:38.160778 13 0 0
860 23:53:38.160835 14 0 0
861 23:53:38.160892 15 0 0
862 23:53:38.160949 16 0 0
863 23:53:38.161006 17 0 0
864 23:53:38.161063 18 0 0
865 23:53:38.161119 19 0 0
866 23:53:38.161176 20 0 0
867 23:53:38.161232 21 0 0
868 23:53:38.161303 22 0 0
869 23:53:38.161360 23 0 0
870 23:53:38.161417 24 0 0
871 23:53:38.161474 25 0 0
872 23:53:38.161531 26 0 ff
873 23:53:38.161588 27 0 ff
874 23:53:38.161645 28 0 ff
875 23:53:38.161702 29 0 ff
876 23:53:38.161758 30 0 ff
877 23:53:38.161815 31 0 ff
878 23:53:38.161871 32 0 ff
879 23:53:38.161928 33 ff ff
880 23:53:38.161985 34 ff ff
881 23:53:38.162042 35 ff ff
882 23:53:38.162099 36 ff ff
883 23:53:38.162155 37 ff ff
884 23:53:38.162211 38 ff ff
885 23:53:38.162268 39 ff ff
886 23:53:38.162325 pass bytecount = 0xff (0xff: all bytes pass)
887 23:53:38.162382
888 23:53:38.162437 DQS0 dly: 33
889 23:53:38.162493 DQS1 dly: 26
890 23:53:38.162549 Write Rank0 MR2 =0x2d
891 23:53:38.162604 [RankSwap] Rank num 2, (Multi 1), Rank 0
892 23:53:38.162660 Write Rank0 MR1 =0xd6
893 23:53:38.162716 [Gating]
894 23:53:38.162772 ==
895 23:53:38.162828 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
896 23:53:38.162884 fsp= 1, odt_onoff= 1, Byte mode= 0
897 23:53:38.162941 ==
898 23:53:38.162996 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
899 23:53:38.163054 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
900 23:53:38.163111 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
901 23:53:38.163168 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
902 23:53:38.163226 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
903 23:53:38.163283 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
904 23:53:38.163341 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
905 23:53:38.163398 3 1 28 |2c2c 2c2b |(11 10)(11 11) |(1 0)(1 0)| 0
906 23:53:38.163455 3 2 0 |201 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
907 23:53:38.163513 3 2 4 |3534 404 |(11 11)(11 11) |(0 0)(0 0)| 0
908 23:53:38.163570 3 2 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
909 23:53:38.163627 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
910 23:53:38.163685 3 2 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
911 23:53:38.163741 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
912 23:53:38.163803 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
913 23:53:38.163860 3 2 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
914 23:53:38.163917 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
915 23:53:38.163975 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
916 23:53:38.164031 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
917 23:53:38.164088 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
918 23:53:38.164145 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
919 23:53:38.164202 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
920 23:53:38.164259 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
921 23:53:38.164316 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
922 23:53:38.164374 3 4 0 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
923 23:53:38.164431 3 4 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
924 23:53:38.164509 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
925 23:53:38.164599 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
926 23:53:38.164688 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
927 23:53:38.164777 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 23:53:38.164869 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 23:53:38.164930 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 23:53:38.164991 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 23:53:38.165085 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 23:53:38.165182 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 23:53:38.165282 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 23:53:38.165382 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
935 23:53:38.165451 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
936 23:53:38.165513 [Byte 0] Lead/lag falling Transition (3, 5, 20)
937 23:53:38.165572 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
938 23:53:38.165642 [Byte 1] Lead/lag falling Transition (3, 5, 24)
939 23:53:38.165709 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
940 23:53:38.165967 [Byte 0] Lead/lag Transition tap number (3)
941 23:53:38.166031 [Byte 1] Lead/lag Transition tap number (2)
942 23:53:38.166090 3 6 0 |201f 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
943 23:53:38.166150 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
944 23:53:38.166208 [Byte 0]First pass (3, 6, 4)
945 23:53:38.166266 3 6 8 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
946 23:53:38.166324 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
947 23:53:38.166381 [Byte 1]First pass (3, 6, 12)
948 23:53:38.166438 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 23:53:38.166495 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
950 23:53:38.166552 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 23:53:38.166609 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 23:53:38.166667 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 23:53:38.166724 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 23:53:38.166781 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
955 23:53:38.166838 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
956 23:53:38.166895 All bytes gating window > 1UI, Early break!
957 23:53:38.166979
958 23:53:38.167037 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
959 23:53:38.167094
960 23:53:38.167150 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
961 23:53:38.167207
962 23:53:38.167263
963 23:53:38.167318
964 23:53:38.167373 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
965 23:53:38.167430
966 23:53:38.167486 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
967 23:53:38.167542
968 23:53:38.167597
969 23:53:38.167653 Write Rank0 MR1 =0x56
970 23:53:38.167708
971 23:53:38.167763 best RODT dly(2T, 0.5T) = (2, 2)
972 23:53:38.167819
973 23:53:38.167874 best RODT dly(2T, 0.5T) = (2, 2)
974 23:53:38.167930 ==
975 23:53:38.167986 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
976 23:53:38.168042 fsp= 1, odt_onoff= 1, Byte mode= 0
977 23:53:38.168099 ==
978 23:53:38.168154 Start DQ dly to find pass range UseTestEngine =0
979 23:53:38.168211 x-axis: bit #, y-axis: DQ dly (-127~63)
980 23:53:38.168266 RX Vref Scan = 0
981 23:53:38.168322 -26, [0] xxxxxxxx xxxxxxxx [MSB]
982 23:53:38.168380 -25, [0] xxxxxxxx xxxxxxxx [MSB]
983 23:53:38.168437 -24, [0] xxxxxxxx xxxxxxxx [MSB]
984 23:53:38.168516 -23, [0] xxxxxxxx xxxxxxxx [MSB]
985 23:53:38.168576 -22, [0] xxxxxxxx xxxxxxxx [MSB]
986 23:53:38.168633 -21, [0] xxxxxxxx xxxxxxxx [MSB]
987 23:53:38.168691 -20, [0] xxxxxxxx xxxxxxxx [MSB]
988 23:53:38.168748 -19, [0] xxxxxxxx xxxxxxxx [MSB]
989 23:53:38.168805 -18, [0] xxxxxxxx xxxxxxxx [MSB]
990 23:53:38.168861 -17, [0] xxxxxxxx xxxxxxxx [MSB]
991 23:53:38.168918 -16, [0] xxxxxxxx xxxxxxxx [MSB]
992 23:53:38.168976 -15, [0] xxxxxxxx xxxxxxxx [MSB]
993 23:53:38.169033 -14, [0] xxxxxxxx xxxxxxxx [MSB]
994 23:53:38.169090 -13, [0] xxxxxxxx xxxxxxxx [MSB]
995 23:53:38.169148 -12, [0] xxxxxxxx xxxxxxxx [MSB]
996 23:53:38.169204 -11, [0] xxxxxxxx xxxxxxxx [MSB]
997 23:53:38.169270 -10, [0] xxxxxxxx xxxxxxxx [MSB]
998 23:53:38.169345 -9, [0] xxxxxxxx xxxxxxxx [MSB]
999 23:53:38.169406 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1000 23:53:38.169464 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1001 23:53:38.169520 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1002 23:53:38.169578 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1003 23:53:38.169635 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1004 23:53:38.169692 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1005 23:53:38.169748 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1006 23:53:38.169806 -1, [0] xxxoxxxx xxxxxxxx [MSB]
1007 23:53:38.169862 0, [0] xxxoxoxx xxxxxxxx [MSB]
1008 23:53:38.169920 1, [0] xxxoxoxx xxxoxxxx [MSB]
1009 23:53:38.169977 2, [0] xxxoxooo oxxoxoox [MSB]
1010 23:53:38.170034 3, [0] xxxoxooo oxxoxoox [MSB]
1011 23:53:38.170092 4, [0] xxxoxooo oxxoxoox [MSB]
1012 23:53:38.170151 5, [0] xxxoxooo ooxooooo [MSB]
1013 23:53:38.170209 6, [0] xxxoxooo ooxooooo [MSB]
1014 23:53:38.170267 7, [0] xooooooo ooxooooo [MSB]
1015 23:53:38.170324 8, [0] xooooooo oooooooo [MSB]
1016 23:53:38.170381 9, [0] xooooooo oooooooo [MSB]
1017 23:53:38.170438 10, [0] xooooooo oooooooo [MSB]
1018 23:53:38.170495 31, [0] oooooooo oooooooo [MSB]
1019 23:53:38.170579 32, [0] oooxoooo oooooooo [MSB]
1020 23:53:38.170638 33, [0] oooxoooo oooooxoo [MSB]
1021 23:53:38.170696 34, [0] oooxoxxo oooooxxo [MSB]
1022 23:53:38.170753 35, [0] oooxoxxx xooooxxo [MSB]
1023 23:53:38.170811 36, [0] oooxoxxx xooxoxxo [MSB]
1024 23:53:38.170868 37, [0] oooxoxxx xxoxxxxx [MSB]
1025 23:53:38.170932 38, [0] oooxoxxx xxoxxxxx [MSB]
1026 23:53:38.170991 39, [0] oooxoxxx xxoxxxxx [MSB]
1027 23:53:38.171048 40, [0] oooxoxxx xxoxxxxx [MSB]
1028 23:53:38.171106 41, [0] xoxxxxxx xxoxxxxx [MSB]
1029 23:53:38.171162 42, [0] xxxxxxxx xxoxxxxx [MSB]
1030 23:53:38.171218 43, [0] xxxxxxxx xxxxxxxx [MSB]
1031 23:53:38.171275 iDelay=43, Bit 0, Center 25 (11 ~ 40) 30
1032 23:53:38.171330 iDelay=43, Bit 1, Center 24 (7 ~ 41) 35
1033 23:53:38.171385 iDelay=43, Bit 2, Center 23 (7 ~ 40) 34
1034 23:53:38.171441 iDelay=43, Bit 3, Center 15 (-1 ~ 31) 33
1035 23:53:38.171495 iDelay=43, Bit 4, Center 23 (7 ~ 40) 34
1036 23:53:38.171550 iDelay=43, Bit 5, Center 16 (0 ~ 33) 34
1037 23:53:38.171605 iDelay=43, Bit 6, Center 17 (2 ~ 33) 32
1038 23:53:38.171660 iDelay=43, Bit 7, Center 18 (2 ~ 34) 33
1039 23:53:38.171715 iDelay=43, Bit 8, Center 18 (2 ~ 34) 33
1040 23:53:38.171770 iDelay=43, Bit 9, Center 20 (5 ~ 36) 32
1041 23:53:38.171825 iDelay=43, Bit 10, Center 25 (8 ~ 42) 35
1042 23:53:38.171880 iDelay=43, Bit 11, Center 18 (1 ~ 35) 35
1043 23:53:38.171935 iDelay=43, Bit 12, Center 20 (5 ~ 36) 32
1044 23:53:38.171991 iDelay=43, Bit 13, Center 17 (2 ~ 32) 31
1045 23:53:38.172045 iDelay=43, Bit 14, Center 17 (2 ~ 33) 32
1046 23:53:38.172101 iDelay=43, Bit 15, Center 20 (5 ~ 36) 32
1047 23:53:38.172155 ==
1048 23:53:38.172211 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1049 23:53:38.172266 fsp= 1, odt_onoff= 1, Byte mode= 0
1050 23:53:38.172322 ==
1051 23:53:38.172378 DQS Delay:
1052 23:53:38.172433 DQS0 = 0, DQS1 = 0
1053 23:53:38.172488 DQM Delay:
1054 23:53:38.172543 DQM0 = 20, DQM1 = 19
1055 23:53:38.172621 DQ Delay:
1056 23:53:38.172678 DQ0 =25, DQ1 =24, DQ2 =23, DQ3 =15
1057 23:53:38.172734 DQ4 =23, DQ5 =16, DQ6 =17, DQ7 =18
1058 23:53:38.172789 DQ8 =18, DQ9 =20, DQ10 =25, DQ11 =18
1059 23:53:38.172845 DQ12 =20, DQ13 =17, DQ14 =17, DQ15 =20
1060 23:53:38.172901
1061 23:53:38.172956
1062 23:53:38.173011 DramC Write-DBI off
1063 23:53:38.173066 ==
1064 23:53:38.173121 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1065 23:53:38.173177 fsp= 1, odt_onoff= 1, Byte mode= 0
1066 23:53:38.173232 ==
1067 23:53:38.173297 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1068 23:53:38.173371
1069 23:53:38.173428 Begin, DQ Scan Range 922~1178
1070 23:53:38.173483
1071 23:53:38.173538
1072 23:53:38.173787 TX Vref Scan disable
1073 23:53:38.173849 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1074 23:53:38.173908 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1075 23:53:38.173965 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1076 23:53:38.174022 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1077 23:53:38.174079 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1078 23:53:38.174135 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1079 23:53:38.174192 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1080 23:53:38.174248 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1081 23:53:38.174304 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1082 23:53:38.174360 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1083 23:53:38.174417 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1084 23:53:38.174473 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1085 23:53:38.174530 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1086 23:53:38.174586 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1087 23:53:38.174642 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1088 23:53:38.174697 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1089 23:53:38.174754 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1090 23:53:38.174810 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1091 23:53:38.174866 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1092 23:53:38.174922 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1093 23:53:38.174978 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1094 23:53:38.175035 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1095 23:53:38.175095 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1096 23:53:38.175175 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1097 23:53:38.175232 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1098 23:53:38.175288 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1099 23:53:38.175344 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1100 23:53:38.175401 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1101 23:53:38.175457 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1102 23:53:38.175513 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1103 23:53:38.175569 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1104 23:53:38.175625 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1105 23:53:38.175705 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1106 23:53:38.175764 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1107 23:53:38.175821 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1108 23:53:38.175878 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1109 23:53:38.175935 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1110 23:53:38.175991 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1111 23:53:38.176048 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1112 23:53:38.176105 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1113 23:53:38.176161 962 |3 6 2|[0] xxxxxxxx oxxoxoxx [MSB]
1114 23:53:38.176217 963 |3 6 3|[0] xxxxxxxx oxxoxoox [MSB]
1115 23:53:38.176276 964 |3 6 4|[0] xxxxxxxx oxxoooox [MSB]
1116 23:53:38.176333 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1117 23:53:38.176390 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1118 23:53:38.176446 967 |3 6 7|[0] xxxxxxxx ooxooooo [MSB]
1119 23:53:38.176501 968 |3 6 8|[0] xxxxxxxx oooooooo [MSB]
1120 23:53:38.176558 969 |3 6 9|[0] xxxoxoxx oooooooo [MSB]
1121 23:53:38.176614 970 |3 6 10|[0] xxxoxoox oooooooo [MSB]
1122 23:53:38.176670 971 |3 6 11|[0] xxxoxoox oooooooo [MSB]
1123 23:53:38.176726 972 |3 6 12|[0] xxxoxoox oooooooo [MSB]
1124 23:53:38.176782 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1125 23:53:38.176838 974 |3 6 14|[0] xxxooooo oooooooo [MSB]
1126 23:53:38.176894 975 |3 6 15|[0] xooooooo oooooooo [MSB]
1127 23:53:38.176950 986 |3 6 26|[0] oooooooo oooxoxoo [MSB]
1128 23:53:38.177014 987 |3 6 27|[0] oooooooo xooxxxoo [MSB]
1129 23:53:38.177107 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1130 23:53:38.177195 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1131 23:53:38.177299 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1132 23:53:38.177360 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1133 23:53:38.177417 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1134 23:53:38.177473 993 |3 6 33|[0] oooxoxxo xxxxxxxx [MSB]
1135 23:53:38.177529 994 |3 6 34|[0] xxxxxxxx xxxxxxxx [MSB]
1136 23:53:38.177585 Byte0, DQ PI dly=982, DQM PI dly= 982
1137 23:53:38.177641 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1138 23:53:38.177697
1139 23:53:38.177752 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1140 23:53:38.177807
1141 23:53:38.177861 Byte1, DQ PI dly=975, DQM PI dly= 975
1142 23:53:38.177916 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1143 23:53:38.177972
1144 23:53:38.178027 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1145 23:53:38.178082
1146 23:53:38.178137 ==
1147 23:53:38.178192 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1148 23:53:38.178247 fsp= 1, odt_onoff= 1, Byte mode= 0
1149 23:53:38.178302 ==
1150 23:53:38.178357 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1151 23:53:38.178413
1152 23:53:38.178476 Begin, DQ Scan Range 951~1015
1153 23:53:38.178546 Write Rank0 MR14 =0x0
1154 23:53:38.178602
1155 23:53:38.178658 CH=0, VrefRange= 0, VrefLevel = 0
1156 23:53:38.178713 TX Bit0 (978~994) 17 986, Bit8 (965~983) 19 974,
1157 23:53:38.178769 TX Bit1 (977~993) 17 985, Bit9 (967~982) 16 974,
1158 23:53:38.178825 TX Bit2 (976~993) 18 984, Bit10 (969~988) 20 978,
1159 23:53:38.178880 TX Bit3 (970~986) 17 978, Bit11 (965~982) 18 973,
1160 23:53:38.178936 TX Bit4 (976~993) 18 984, Bit12 (967~983) 17 975,
1161 23:53:38.178991 TX Bit5 (972~987) 16 979, Bit13 (966~982) 17 974,
1162 23:53:38.179047 TX Bit6 (974~988) 15 981, Bit14 (967~983) 17 975,
1163 23:53:38.179118 TX Bit7 (977~991) 15 984, Bit15 (969~983) 15 976,
1164 23:53:38.179177
1165 23:53:38.179232 Write Rank0 MR14 =0x2
1166 23:53:38.179287
1167 23:53:38.179342 CH=0, VrefRange= 0, VrefLevel = 2
1168 23:53:38.179398 TX Bit0 (977~994) 18 985, Bit8 (964~983) 20 973,
1169 23:53:38.179453 TX Bit1 (977~993) 17 985, Bit9 (967~983) 17 975,
1170 23:53:38.179508 TX Bit2 (977~993) 17 985, Bit10 (969~988) 20 978,
1171 23:53:38.179564 TX Bit3 (970~986) 17 978, Bit11 (965~982) 18 973,
1172 23:53:38.179620 TX Bit4 (975~993) 19 984, Bit12 (967~983) 17 975,
1173 23:53:38.179675 TX Bit5 (972~988) 17 980, Bit13 (965~982) 18 973,
1174 23:53:38.179730 TX Bit6 (973~989) 17 981, Bit14 (967~984) 18 975,
1175 23:53:38.179786 TX Bit7 (976~991) 16 983, Bit15 (968~984) 17 976,
1176 23:53:38.179841
1177 23:53:38.179895 Write Rank0 MR14 =0x4
1178 23:53:38.179950
1179 23:53:38.180004 CH=0, VrefRange= 0, VrefLevel = 4
1180 23:53:38.180255 TX Bit0 (977~995) 19 986, Bit8 (963~984) 22 973,
1181 23:53:38.180316 TX Bit1 (977~993) 17 985, Bit9 (966~983) 18 974,
1182 23:53:38.180373 TX Bit2 (976~993) 18 984, Bit10 (969~989) 21 979,
1183 23:53:38.180429 TX Bit3 (970~987) 18 978, Bit11 (964~982) 19 973,
1184 23:53:38.180485 TX Bit4 (975~994) 20 984, Bit12 (966~983) 18 974,
1185 23:53:38.180541 TX Bit5 (971~988) 18 979, Bit13 (966~982) 17 974,
1186 23:53:38.180597 TX Bit6 (973~990) 18 981, Bit14 (966~984) 19 975,
1187 23:53:38.180653 TX Bit7 (976~991) 16 983, Bit15 (968~984) 17 976,
1188 23:53:38.180709
1189 23:53:38.180763 Write Rank0 MR14 =0x6
1190 23:53:38.180819
1191 23:53:38.180874 CH=0, VrefRange= 0, VrefLevel = 6
1192 23:53:38.180929 TX Bit0 (977~995) 19 986, Bit8 (963~984) 22 973,
1193 23:53:38.180984 TX Bit1 (977~994) 18 985, Bit9 (966~984) 19 975,
1194 23:53:38.181040 TX Bit2 (976~993) 18 984, Bit10 (969~989) 21 979,
1195 23:53:38.181095 TX Bit3 (969~987) 19 978, Bit11 (964~983) 20 973,
1196 23:53:38.181151 TX Bit4 (975~994) 20 984, Bit12 (966~984) 19 975,
1197 23:53:38.181206 TX Bit5 (971~989) 19 980, Bit13 (965~983) 19 974,
1198 23:53:38.181273 TX Bit6 (973~991) 19 982, Bit14 (966~985) 20 975,
1199 23:53:38.181361 TX Bit7 (976~992) 17 984, Bit15 (968~985) 18 976,
1200 23:53:38.181446
1201 23:53:38.181531 Write Rank0 MR14 =0x8
1202 23:53:38.181600
1203 23:53:38.181656 CH=0, VrefRange= 0, VrefLevel = 8
1204 23:53:38.181715 TX Bit0 (977~995) 19 986, Bit8 (963~984) 22 973,
1205 23:53:38.181786 TX Bit1 (976~994) 19 985, Bit9 (966~984) 19 975,
1206 23:53:38.181843 TX Bit2 (976~994) 19 985, Bit10 (969~990) 22 979,
1207 23:53:38.181899 TX Bit3 (969~988) 20 978, Bit11 (963~983) 21 973,
1208 23:53:38.181954 TX Bit4 (975~995) 21 985, Bit12 (966~984) 19 975,
1209 23:53:38.182010 TX Bit5 (971~990) 20 980, Bit13 (964~983) 20 973,
1210 23:53:38.182066 TX Bit6 (972~991) 20 981, Bit14 (966~985) 20 975,
1211 23:53:38.182137 TX Bit7 (976~992) 17 984, Bit15 (968~985) 18 976,
1212 23:53:38.182197
1213 23:53:38.182252 Write Rank0 MR14 =0xa
1214 23:53:38.182307
1215 23:53:38.182363 CH=0, VrefRange= 0, VrefLevel = 10
1216 23:53:38.182418 TX Bit0 (977~996) 20 986, Bit8 (963~985) 23 974,
1217 23:53:38.182474 TX Bit1 (976~994) 19 985, Bit9 (965~984) 20 974,
1218 23:53:38.182529 TX Bit2 (976~994) 19 985, Bit10 (968~990) 23 979,
1219 23:53:38.182585 TX Bit3 (969~989) 21 979, Bit11 (963~983) 21 973,
1220 23:53:38.182641 TX Bit4 (975~995) 21 985, Bit12 (965~985) 21 975,
1221 23:53:38.182697 TX Bit5 (970~991) 22 980, Bit13 (965~983) 19 974,
1222 23:53:38.182753 TX Bit6 (971~991) 21 981, Bit14 (965~986) 22 975,
1223 23:53:38.182836 TX Bit7 (975~992) 18 983, Bit15 (967~986) 20 976,
1224 23:53:38.182895
1225 23:53:38.182950 Write Rank0 MR14 =0xc
1226 23:53:38.183005
1227 23:53:38.183060 CH=0, VrefRange= 0, VrefLevel = 12
1228 23:53:38.183115 TX Bit0 (976~997) 22 986, Bit8 (962~985) 24 973,
1229 23:53:38.183170 TX Bit1 (976~995) 20 985, Bit9 (965~985) 21 975,
1230 23:53:38.183226 TX Bit2 (975~994) 20 984, Bit10 (968~990) 23 979,
1231 23:53:38.183282 TX Bit3 (969~990) 22 979, Bit11 (963~984) 22 973,
1232 23:53:38.183338 TX Bit4 (974~995) 22 984, Bit12 (965~985) 21 975,
1233 23:53:38.183393 TX Bit5 (970~991) 22 980, Bit13 (963~984) 22 973,
1234 23:53:38.183448 TX Bit6 (971~991) 21 981, Bit14 (965~987) 23 976,
1235 23:53:38.183504 TX Bit7 (975~992) 18 983, Bit15 (967~987) 21 977,
1236 23:53:38.183561
1237 23:53:38.183631 Write Rank0 MR14 =0xe
1238 23:53:38.183686
1239 23:53:38.183741 CH=0, VrefRange= 0, VrefLevel = 14
1240 23:53:38.183825 TX Bit0 (976~997) 22 986, Bit8 (962~986) 25 974,
1241 23:53:38.183910 TX Bit1 (976~995) 20 985, Bit9 (964~986) 23 975,
1242 23:53:38.184001 TX Bit2 (975~995) 21 985, Bit10 (968~990) 23 979,
1243 23:53:38.184089 TX Bit3 (969~990) 22 979, Bit11 (962~984) 23 973,
1244 23:53:38.184174 TX Bit4 (974~996) 23 985, Bit12 (964~986) 23 975,
1245 23:53:38.184268 TX Bit5 (970~991) 22 980, Bit13 (963~984) 22 973,
1246 23:53:38.184364 TX Bit6 (970~992) 23 981, Bit14 (965~987) 23 976,
1247 23:53:38.184465 TX Bit7 (975~993) 19 984, Bit15 (967~988) 22 977,
1248 23:53:38.184562
1249 23:53:38.184663 Write Rank0 MR14 =0x10
1250 23:53:38.184729
1251 23:53:38.184790 CH=0, VrefRange= 0, VrefLevel = 16
1252 23:53:38.184848 TX Bit0 (976~998) 23 987, Bit8 (962~986) 25 974,
1253 23:53:38.184907 TX Bit1 (976~996) 21 986, Bit9 (964~986) 23 975,
1254 23:53:38.184964 TX Bit2 (975~995) 21 985, Bit10 (968~990) 23 979,
1255 23:53:38.185022 TX Bit3 (968~991) 24 979, Bit11 (962~985) 24 973,
1256 23:53:38.185078 TX Bit4 (973~996) 24 984, Bit12 (964~986) 23 975,
1257 23:53:38.185134 TX Bit5 (970~991) 22 980, Bit13 (963~985) 23 974,
1258 23:53:38.185190 TX Bit6 (970~992) 23 981, Bit14 (965~988) 24 976,
1259 23:53:38.185288 TX Bit7 (974~993) 20 983, Bit15 (967~988) 22 977,
1260 23:53:38.185348
1261 23:53:38.185405 Write Rank0 MR14 =0x12
1262 23:53:38.185461
1263 23:53:38.185517 CH=0, VrefRange= 0, VrefLevel = 18
1264 23:53:38.185576 TX Bit0 (975~998) 24 986, Bit8 (962~987) 26 974,
1265 23:53:38.185634 TX Bit1 (975~996) 22 985, Bit9 (964~987) 24 975,
1266 23:53:38.185705 TX Bit2 (975~996) 22 985, Bit10 (968~991) 24 979,
1267 23:53:38.185765 TX Bit3 (968~991) 24 979, Bit11 (962~985) 24 973,
1268 23:53:38.185821 TX Bit4 (973~997) 25 985, Bit12 (963~987) 25 975,
1269 23:53:38.185877 TX Bit5 (969~992) 24 980, Bit13 (963~985) 23 974,
1270 23:53:38.185933 TX Bit6 (970~992) 23 981, Bit14 (964~988) 25 976,
1271 23:53:38.185989 TX Bit7 (973~993) 21 983, Bit15 (967~989) 23 978,
1272 23:53:38.186045
1273 23:53:38.186100 Write Rank0 MR14 =0x14
1274 23:53:38.186181
1275 23:53:38.186239 CH=0, VrefRange= 0, VrefLevel = 20
1276 23:53:38.186295 TX Bit0 (975~999) 25 987, Bit8 (961~987) 27 974,
1277 23:53:38.186351 TX Bit1 (975~997) 23 986, Bit9 (963~987) 25 975,
1278 23:53:38.186407 TX Bit2 (975~996) 22 985, Bit10 (967~991) 25 979,
1279 23:53:38.186660 TX Bit3 (968~991) 24 979, Bit11 (961~986) 26 973,
1280 23:53:38.186728 TX Bit4 (973~998) 26 985, Bit12 (963~987) 25 975,
1281 23:53:38.186785 TX Bit5 (969~992) 24 980, Bit13 (962~986) 25 974,
1282 23:53:38.186842 TX Bit6 (970~993) 24 981, Bit14 (963~988) 26 975,
1283 23:53:38.186898 TX Bit7 (973~995) 23 984, Bit15 (966~989) 24 977,
1284 23:53:38.186954
1285 23:53:38.187009 Write Rank0 MR14 =0x16
1286 23:53:38.187064
1287 23:53:38.187119 CH=0, VrefRange= 0, VrefLevel = 22
1288 23:53:38.187174 TX Bit0 (975~999) 25 987, Bit8 (961~987) 27 974,
1289 23:53:38.187230 TX Bit1 (975~997) 23 986, Bit9 (963~988) 26 975,
1290 23:53:38.187285 TX Bit2 (974~997) 24 985, Bit10 (967~991) 25 979,
1291 23:53:38.187341 TX Bit3 (968~992) 25 980, Bit11 (961~986) 26 973,
1292 23:53:38.187397 TX Bit4 (972~998) 27 985, Bit12 (962~987) 26 974,
1293 23:53:38.187452 TX Bit5 (969~992) 24 980, Bit13 (962~986) 25 974,
1294 23:53:38.187508 TX Bit6 (969~993) 25 981, Bit14 (963~987) 25 975,
1295 23:53:38.187564 TX Bit7 (972~995) 24 983, Bit15 (966~989) 24 977,
1296 23:53:38.187624
1297 23:53:38.187679 Write Rank0 MR14 =0x18
1298 23:53:38.187734
1299 23:53:38.187788 CH=0, VrefRange= 0, VrefLevel = 24
1300 23:53:38.187843 TX Bit0 (975~999) 25 987, Bit8 (961~986) 26 973,
1301 23:53:38.187900 TX Bit1 (974~998) 25 986, Bit9 (963~989) 27 976,
1302 23:53:38.187955 TX Bit2 (974~997) 24 985, Bit10 (967~991) 25 979,
1303 23:53:38.188011 TX Bit3 (968~992) 25 980, Bit11 (961~985) 25 973,
1304 23:53:38.188066 TX Bit4 (973~998) 26 985, Bit12 (962~987) 26 974,
1305 23:53:38.188123 TX Bit5 (969~993) 25 981, Bit13 (961~985) 25 973,
1306 23:53:38.188178 TX Bit6 (969~994) 26 981, Bit14 (963~987) 25 975,
1307 23:53:38.188234 TX Bit7 (972~995) 24 983, Bit15 (966~990) 25 978,
1308 23:53:38.188289
1309 23:53:38.188344 Write Rank0 MR14 =0x1a
1310 23:53:38.188398
1311 23:53:38.188453 CH=0, VrefRange= 0, VrefLevel = 26
1312 23:53:38.188508 TX Bit0 (975~999) 25 987, Bit8 (961~986) 26 973,
1313 23:53:38.188564 TX Bit1 (974~998) 25 986, Bit9 (963~989) 27 976,
1314 23:53:38.188619 TX Bit2 (974~997) 24 985, Bit10 (967~991) 25 979,
1315 23:53:38.188675 TX Bit3 (968~992) 25 980, Bit11 (961~985) 25 973,
1316 23:53:38.188731 TX Bit4 (973~998) 26 985, Bit12 (962~987) 26 974,
1317 23:53:38.188786 TX Bit5 (969~993) 25 981, Bit13 (961~985) 25 973,
1318 23:53:38.188841 TX Bit6 (969~994) 26 981, Bit14 (963~987) 25 975,
1319 23:53:38.188896 TX Bit7 (972~995) 24 983, Bit15 (966~990) 25 978,
1320 23:53:38.188951
1321 23:53:38.189006 Write Rank0 MR14 =0x1c
1322 23:53:38.189061
1323 23:53:38.189115 CH=0, VrefRange= 0, VrefLevel = 28
1324 23:53:38.189185 TX Bit0 (975~999) 25 987, Bit8 (961~986) 26 973,
1325 23:53:38.189280 TX Bit1 (974~998) 25 986, Bit9 (963~989) 27 976,
1326 23:53:38.189339 TX Bit2 (974~997) 24 985, Bit10 (967~991) 25 979,
1327 23:53:38.189396 TX Bit3 (968~992) 25 980, Bit11 (961~985) 25 973,
1328 23:53:38.189452 TX Bit4 (973~998) 26 985, Bit12 (962~987) 26 974,
1329 23:53:38.189508 TX Bit5 (969~993) 25 981, Bit13 (961~985) 25 973,
1330 23:53:38.189566 TX Bit6 (969~994) 26 981, Bit14 (963~987) 25 975,
1331 23:53:38.189630 TX Bit7 (972~995) 24 983, Bit15 (966~990) 25 978,
1332 23:53:38.189686
1333 23:53:38.189742 Write Rank0 MR14 =0x1e
1334 23:53:38.189796
1335 23:53:38.189872 CH=0, VrefRange= 0, VrefLevel = 30
1336 23:53:38.189930 TX Bit0 (975~999) 25 987, Bit8 (961~986) 26 973,
1337 23:53:38.189987 TX Bit1 (974~998) 25 986, Bit9 (963~989) 27 976,
1338 23:53:38.190043 TX Bit2 (974~997) 24 985, Bit10 (967~991) 25 979,
1339 23:53:38.190099 TX Bit3 (968~992) 25 980, Bit11 (961~985) 25 973,
1340 23:53:38.190155 TX Bit4 (973~998) 26 985, Bit12 (962~987) 26 974,
1341 23:53:38.190211 TX Bit5 (969~993) 25 981, Bit13 (961~985) 25 973,
1342 23:53:38.190267 TX Bit6 (969~994) 26 981, Bit14 (963~987) 25 975,
1343 23:53:38.190322 TX Bit7 (972~995) 24 983, Bit15 (966~990) 25 978,
1344 23:53:38.190378
1345 23:53:38.190433
1346 23:53:38.190488 TX Vref found, early break! 374< 383
1347 23:53:38.190544 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1348 23:53:38.190600 u1DelayCellOfst[0]=8 cells (7 PI)
1349 23:53:38.190655 u1DelayCellOfst[1]=7 cells (6 PI)
1350 23:53:38.190711 u1DelayCellOfst[2]=6 cells (5 PI)
1351 23:53:38.190766 u1DelayCellOfst[3]=0 cells (0 PI)
1352 23:53:38.190834 u1DelayCellOfst[4]=6 cells (5 PI)
1353 23:53:38.190901 u1DelayCellOfst[5]=1 cells (1 PI)
1354 23:53:38.190957 u1DelayCellOfst[6]=1 cells (1 PI)
1355 23:53:38.191012 u1DelayCellOfst[7]=3 cells (3 PI)
1356 23:53:38.191067 Byte0, DQ PI dly=980, DQM PI dly= 983
1357 23:53:38.191123 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1358 23:53:38.191179
1359 23:53:38.191234 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1360 23:53:38.191290
1361 23:53:38.191345 u1DelayCellOfst[8]=0 cells (0 PI)
1362 23:53:38.191400 u1DelayCellOfst[9]=3 cells (3 PI)
1363 23:53:38.191455 u1DelayCellOfst[10]=7 cells (6 PI)
1364 23:53:38.191509 u1DelayCellOfst[11]=0 cells (0 PI)
1365 23:53:38.191567 u1DelayCellOfst[12]=1 cells (1 PI)
1366 23:53:38.191632 u1DelayCellOfst[13]=0 cells (0 PI)
1367 23:53:38.191688 u1DelayCellOfst[14]=2 cells (2 PI)
1368 23:53:38.191742 u1DelayCellOfst[15]=6 cells (5 PI)
1369 23:53:38.191796 Byte1, DQ PI dly=973, DQM PI dly= 976
1370 23:53:38.191852 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)
1371 23:53:38.191907
1372 23:53:38.191962 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)
1373 23:53:38.192017
1374 23:53:38.192072 Write Rank0 MR14 =0x18
1375 23:53:38.192127
1376 23:53:38.192181 Final TX Range 0 Vref 24
1377 23:53:38.192236
1378 23:53:38.192290 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1379 23:53:38.192346
1380 23:53:38.192401 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1381 23:53:38.192476 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1382 23:53:38.192535 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1383 23:53:38.192591 Write Rank0 MR3 =0xb0
1384 23:53:38.192646 DramC Write-DBI on
1385 23:53:38.192701 ==
1386 23:53:38.192756 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1387 23:53:38.193006 fsp= 1, odt_onoff= 1, Byte mode= 0
1388 23:53:38.193068 ==
1389 23:53:38.193124 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1390 23:53:38.193180
1391 23:53:38.193235 Begin, DQ Scan Range 696~760
1392 23:53:38.193304
1393 23:53:38.193359
1394 23:53:38.193414 TX Vref Scan disable
1395 23:53:38.193468 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1396 23:53:38.193525 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1397 23:53:38.193589 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1398 23:53:38.193646 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1399 23:53:38.193703 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1400 23:53:38.193758 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1401 23:53:38.193816 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1402 23:53:38.193872 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1403 23:53:38.193927 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1404 23:53:38.193983 705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]
1405 23:53:38.194067 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1406 23:53:38.194125 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1407 23:53:38.194180 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1408 23:53:38.194250 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1409 23:53:38.194310 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1410 23:53:38.194366 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1411 23:53:38.194422 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1412 23:53:38.194478 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1413 23:53:38.194534 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1414 23:53:38.194589 733 |2 6 29|[0] oooooooo xxxxxxxx [MSB]
1415 23:53:38.194645 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1416 23:53:38.194701 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1417 23:53:38.194756 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1418 23:53:38.194812 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1419 23:53:38.194868 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1420 23:53:38.194924 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1421 23:53:38.194980 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1422 23:53:38.195036 741 |2 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1423 23:53:38.195091 Byte0, DQ PI dly=727, DQM PI dly= 727
1424 23:53:38.195146 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
1425 23:53:38.195202
1426 23:53:38.195257 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
1427 23:53:38.195312
1428 23:53:38.195367 Byte1, DQ PI dly=718, DQM PI dly= 718
1429 23:53:38.195421 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 14)
1430 23:53:38.195485
1431 23:53:38.195542 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 14)
1432 23:53:38.195598
1433 23:53:38.195652 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1434 23:53:38.195708 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1435 23:53:38.195770 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1436 23:53:38.195839 Write Rank0 MR3 =0x30
1437 23:53:38.195894 DramC Write-DBI off
1438 23:53:38.195950
1439 23:53:38.196005 [DATLAT]
1440 23:53:38.196060 Freq=1600, CH0 RK0, use_rxtx_scan=0
1441 23:53:38.196115
1442 23:53:38.196170 DATLAT Default: 0xf
1443 23:53:38.196225 7, 0xFFFF, sum=0
1444 23:53:38.196281 8, 0xFFFF, sum=0
1445 23:53:38.196337 9, 0xFFFF, sum=0
1446 23:53:38.196392 10, 0xFFFF, sum=0
1447 23:53:38.196448 11, 0xFFFF, sum=0
1448 23:53:38.196504 12, 0xFFFF, sum=0
1449 23:53:38.196559 13, 0xFFFF, sum=0
1450 23:53:38.196615 14, 0x0, sum=1
1451 23:53:38.196671 15, 0x0, sum=2
1452 23:53:38.196727 16, 0x0, sum=3
1453 23:53:38.196782 17, 0x0, sum=4
1454 23:53:38.196838 pattern=2 first_step=14 total pass=5 best_step=16
1455 23:53:38.196892 ==
1456 23:53:38.196947 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1457 23:53:38.197002 fsp= 1, odt_onoff= 1, Byte mode= 0
1458 23:53:38.197057 ==
1459 23:53:38.197112 Start DQ dly to find pass range UseTestEngine =1
1460 23:53:38.197168 x-axis: bit #, y-axis: DQ dly (-127~63)
1461 23:53:38.197222 RX Vref Scan = 1
1462 23:53:38.197286
1463 23:53:38.197342 RX Vref found, early break!
1464 23:53:38.197397
1465 23:53:38.197452 Final RX Vref 12, apply to both rank0 and 1
1466 23:53:38.197506 ==
1467 23:53:38.197566 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1468 23:53:38.197622 fsp= 1, odt_onoff= 1, Byte mode= 0
1469 23:53:38.197678 ==
1470 23:53:38.197732 DQS Delay:
1471 23:53:38.197787 DQS0 = 0, DQS1 = 0
1472 23:53:38.197842 DQM Delay:
1473 23:53:38.197896 DQM0 = 20, DQM1 = 18
1474 23:53:38.197950 DQ Delay:
1475 23:53:38.198005 DQ0 =25, DQ1 =25, DQ2 =24, DQ3 =15
1476 23:53:38.198060 DQ4 =22, DQ5 =16, DQ6 =18, DQ7 =18
1477 23:53:38.198134 DQ8 =18, DQ9 =19, DQ10 =24, DQ11 =16
1478 23:53:38.198220 DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20
1479 23:53:38.198308
1480 23:53:38.198402
1481 23:53:38.198499
1482 23:53:38.198589 [DramC_TX_OE_Calibration] TA2
1483 23:53:38.198686 Original DQ_B0 (3 6) =30, OEN = 27
1484 23:53:38.198748 Original DQ_B1 (3 6) =30, OEN = 27
1485 23:53:38.198806 23, 0x0, End_B0=23 End_B1=23
1486 23:53:38.198864 24, 0x0, End_B0=24 End_B1=24
1487 23:53:38.198920 25, 0x0, End_B0=25 End_B1=25
1488 23:53:38.198976 26, 0x0, End_B0=26 End_B1=26
1489 23:53:38.199032 27, 0x0, End_B0=27 End_B1=27
1490 23:53:38.199109 28, 0x0, End_B0=28 End_B1=28
1491 23:53:38.199166 29, 0x0, End_B0=29 End_B1=29
1492 23:53:38.199222 30, 0x0, End_B0=30 End_B1=30
1493 23:53:38.199279 31, 0xFFFF, End_B0=30 End_B1=30
1494 23:53:38.199334 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1495 23:53:38.199390 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1496 23:53:38.199445
1497 23:53:38.199511
1498 23:53:38.199575 Write Rank0 MR23 =0x3f
1499 23:53:38.199654 [DQSOSC]
1500 23:53:38.199745 [DQSOSCAuto] RK0, (LSB)MR18= 0xaa, (MSB)MR19= 0x3, tDQSOscB0 = 335 ps tDQSOscB1 = 0 ps
1501 23:53:38.199806 CH0_RK0: MR19=0x3, MR18=0xAA, DQSOSC=335, MR23=63, INC=21, DEC=32
1502 23:53:38.199862 Write Rank0 MR23 =0x3f
1503 23:53:38.199918 [DQSOSC]
1504 23:53:38.199973 [DQSOSCAuto] RK0, (LSB)MR18= 0xa7, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps
1505 23:53:38.200029 CH0 RK0: MR19=3, MR18=A7
1506 23:53:38.200084 [RankSwap] Rank num 2, (Multi 1), Rank 1
1507 23:53:38.200140 Write Rank0 MR2 =0xad
1508 23:53:38.200194 [Write Leveling]
1509 23:53:38.200249 delay byte0 byte1 byte2 byte3
1510 23:53:38.200303
1511 23:53:38.200358 10 0 0
1512 23:53:38.200414 11 0 0
1513 23:53:38.200470 12 0 0
1514 23:53:38.200525 13 0 0
1515 23:53:38.200582 14 0 0
1516 23:53:38.200637 15 0 0
1517 23:53:38.200693 16 0 0
1518 23:53:38.200748 17 0 0
1519 23:53:38.200803 18 0 0
1520 23:53:38.200858 19 0 0
1521 23:53:38.200914 20 0 0
1522 23:53:38.200969 21 0 0
1523 23:53:38.201026 22 0 0
1524 23:53:38.201081 23 0 0
1525 23:53:38.201136 24 0 0
1526 23:53:38.201191 25 0 0
1527 23:53:38.201247 26 0 0
1528 23:53:38.201319 27 0 0
1529 23:53:38.201374 28 0 0
1530 23:53:38.201430 29 0 ff
1531 23:53:38.201486 30 0 ff
1532 23:53:38.201541 31 0 ff
1533 23:53:38.201799 32 0 ff
1534 23:53:38.201862 33 0 ff
1535 23:53:38.201919 34 0 ff
1536 23:53:38.201975 35 ff ff
1537 23:53:38.202070 36 ff ff
1538 23:53:38.202136 37 ff ff
1539 23:53:38.202193 38 ff ff
1540 23:53:38.202249 39 ff ff
1541 23:53:38.202305 40 ff ff
1542 23:53:38.202360 41 ff ff
1543 23:53:38.202415 pass bytecount = 0xff (0xff: all bytes pass)
1544 23:53:38.202471
1545 23:53:38.202525 DQS0 dly: 35
1546 23:53:38.202579 DQS1 dly: 29
1547 23:53:38.202634 Write Rank0 MR2 =0x2d
1548 23:53:38.202688 [RankSwap] Rank num 2, (Multi 1), Rank 0
1549 23:53:38.202743 Write Rank1 MR1 =0xd6
1550 23:53:38.202798 [Gating]
1551 23:53:38.202852 ==
1552 23:53:38.202906 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1553 23:53:38.202961 fsp= 1, odt_onoff= 1, Byte mode= 0
1554 23:53:38.203016 ==
1555 23:53:38.203070 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1556 23:53:38.203126 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1557 23:53:38.203183 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1558 23:53:38.203238 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1559 23:53:38.203294 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1560 23:53:38.203350 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1561 23:53:38.203406 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1562 23:53:38.203462 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1563 23:53:38.203518 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1564 23:53:38.203574 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1565 23:53:38.203630 3 2 8 |2c2c 2c2b |(11 0)(11 11) |(0 0)(0 0)| 0
1566 23:53:38.203686 3 2 12 |201 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
1567 23:53:38.203741 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1568 23:53:38.203796 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1569 23:53:38.203852 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1570 23:53:38.203907 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1571 23:53:38.203963 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1572 23:53:38.204019 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1573 23:53:38.204074 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1574 23:53:38.204129 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1575 23:53:38.204185 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1576 23:53:38.204240 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1577 23:53:38.204295 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1578 23:53:38.204350 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1579 23:53:38.204406 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1580 23:53:38.204461 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1581 23:53:38.204516 3 4 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1582 23:53:38.204571 3 4 12 |201 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1583 23:53:38.204627 3 4 16 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
1584 23:53:38.204682 3 4 20 |3d3d 1a1a |(11 11)(11 11) |(1 1)(1 1)| 0
1585 23:53:38.204737 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1586 23:53:38.204792 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1587 23:53:38.204848 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1588 23:53:38.204903 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1589 23:53:38.204957 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1590 23:53:38.205013 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1591 23:53:38.205069 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1592 23:53:38.205124 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1593 23:53:38.205179 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1594 23:53:38.205234 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1595 23:53:38.205302 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1596 23:53:38.205358 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1597 23:53:38.205418 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1598 23:53:38.205494 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1599 23:53:38.205552 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1600 23:53:38.205608 [Byte 0] Lead/lag Transition tap number (3)
1601 23:53:38.205663 [Byte 1] Lead/lag Transition tap number (2)
1602 23:53:38.205718 3 6 12 |606 3e3d |(1 1)(11 11) |(0 0)(0 0)| 0
1603 23:53:38.205774 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1604 23:53:38.205830 [Byte 0]First pass (3, 6, 16)
1605 23:53:38.205885 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1606 23:53:38.205941 [Byte 1]First pass (3, 6, 20)
1607 23:53:38.205995 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1608 23:53:38.206051 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1609 23:53:38.206107 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1610 23:53:38.206163 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1611 23:53:38.206218 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1612 23:53:38.206274 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1613 23:53:38.206330 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1614 23:53:38.206386 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1615 23:53:38.206441 All bytes gating window > 1UI, Early break!
1616 23:53:38.206497
1617 23:53:38.206551 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
1618 23:53:38.206606
1619 23:53:38.206660 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1620 23:53:38.206715
1621 23:53:38.206798
1622 23:53:38.206854
1623 23:53:38.206909 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1624 23:53:38.206963
1625 23:53:38.207017 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1626 23:53:38.207073
1627 23:53:38.207126
1628 23:53:38.207180 Write Rank1 MR1 =0x56
1629 23:53:38.207235
1630 23:53:38.207289 best RODT dly(2T, 0.5T) = (2, 3)
1631 23:53:38.207344
1632 23:53:38.207398 best RODT dly(2T, 0.5T) = (2, 3)
1633 23:53:38.207452 ==
1634 23:53:38.207506 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1635 23:53:38.207562 fsp= 1, odt_onoff= 1, Byte mode= 0
1636 23:53:38.207616 ==
1637 23:53:38.207671 Start DQ dly to find pass range UseTestEngine =0
1638 23:53:38.207726 x-axis: bit #, y-axis: DQ dly (-127~63)
1639 23:53:38.207781 RX Vref Scan = 0
1640 23:53:38.207836 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1641 23:53:38.207892 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1642 23:53:38.207948 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1643 23:53:38.208003 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1644 23:53:38.208059 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1645 23:53:38.208311 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1646 23:53:38.208377 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1647 23:53:38.208434 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1648 23:53:38.208490 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1649 23:53:38.208546 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1650 23:53:38.208602 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1651 23:53:38.208657 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1652 23:53:38.208712 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1653 23:53:38.208767 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1654 23:53:38.208823 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1655 23:53:38.208878 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1656 23:53:38.208934 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1657 23:53:38.208989 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1658 23:53:38.209044 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1659 23:53:38.209099 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1660 23:53:38.209154 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1661 23:53:38.209241 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1662 23:53:38.209341 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1663 23:53:38.209428 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1664 23:53:38.209520 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1665 23:53:38.209580 -1, [0] xxxxxxxx xxxxxxxx [MSB]
1666 23:53:38.209637 0, [0] xxxoxoxx xxxoxoxx [MSB]
1667 23:53:38.209693 1, [0] xxxoxoxx oxxoxoxx [MSB]
1668 23:53:38.209750 2, [0] xxxoxoxx ooxoooox [MSB]
1669 23:53:38.209805 3, [0] xxxoxooo ooxoooox [MSB]
1670 23:53:38.209861 4, [0] xxxoxooo ooxooooo [MSB]
1671 23:53:38.209916 5, [0] xxxoxooo ooxooooo [MSB]
1672 23:53:38.209971 6, [0] xxxoxooo oooooooo [MSB]
1673 23:53:38.210027 7, [0] xoxooooo oooooooo [MSB]
1674 23:53:38.210083 8, [0] xooooooo oooooooo [MSB]
1675 23:53:38.210138 9, [0] xooooooo oooooooo [MSB]
1676 23:53:38.210194 10, [0] xooooooo oooooooo [MSB]
1677 23:53:38.210266 33, [0] oooooooo oooooooo [MSB]
1678 23:53:38.210331 34, [0] oooxoooo oooooooo [MSB]
1679 23:53:38.210387 35, [0] oooxooxo oooooxxo [MSB]
1680 23:53:38.210459 36, [0] oooxooxx xooooxxo [MSB]
1681 23:53:38.210551 37, [0] oooxoxxx xxoxxxxo [MSB]
1682 23:53:38.210637 38, [0] oooxoxxx xxoxxxxx [MSB]
1683 23:53:38.210698 39, [0] oooxoxxx xxoxxxxx [MSB]
1684 23:53:38.210755 40, [0] oooxoxxx xxoxxxxx [MSB]
1685 23:53:38.210812 41, [0] xooxxxxx xxoxxxxx [MSB]
1686 23:53:38.210868 42, [0] xoxxxxxx xxoxxxxx [MSB]
1687 23:53:38.210923 43, [0] xxxxxxxx xxxxxxxx [MSB]
1688 23:53:38.210979 iDelay=43, Bit 0, Center 25 (11 ~ 40) 30
1689 23:53:38.211034 iDelay=43, Bit 1, Center 24 (7 ~ 42) 36
1690 23:53:38.211089 iDelay=43, Bit 2, Center 24 (8 ~ 41) 34
1691 23:53:38.211143 iDelay=43, Bit 3, Center 16 (0 ~ 33) 34
1692 23:53:38.211199 iDelay=43, Bit 4, Center 23 (7 ~ 40) 34
1693 23:53:38.211254 iDelay=43, Bit 5, Center 18 (0 ~ 36) 37
1694 23:53:38.211308 iDelay=43, Bit 6, Center 18 (3 ~ 34) 32
1695 23:53:38.211362 iDelay=43, Bit 7, Center 19 (3 ~ 35) 33
1696 23:53:38.211417 iDelay=43, Bit 8, Center 18 (1 ~ 35) 35
1697 23:53:38.211472 iDelay=43, Bit 9, Center 19 (2 ~ 36) 35
1698 23:53:38.211527 iDelay=43, Bit 10, Center 24 (6 ~ 42) 37
1699 23:53:38.211581 iDelay=43, Bit 11, Center 18 (0 ~ 36) 37
1700 23:53:38.211636 iDelay=43, Bit 12, Center 19 (2 ~ 36) 35
1701 23:53:38.211691 iDelay=43, Bit 13, Center 17 (0 ~ 34) 35
1702 23:53:38.211745 iDelay=43, Bit 14, Center 18 (2 ~ 34) 33
1703 23:53:38.211799 iDelay=43, Bit 15, Center 20 (4 ~ 37) 34
1704 23:53:38.211854 ==
1705 23:53:38.211909 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1706 23:53:38.211964 fsp= 1, odt_onoff= 1, Byte mode= 0
1707 23:53:38.212020 ==
1708 23:53:38.212074 DQS Delay:
1709 23:53:38.212128 DQS0 = 0, DQS1 = 0
1710 23:53:38.212183 DQM Delay:
1711 23:53:38.212264 DQM0 = 20, DQM1 = 19
1712 23:53:38.212322 DQ Delay:
1713 23:53:38.212377 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =16
1714 23:53:38.212432 DQ4 =23, DQ5 =18, DQ6 =18, DQ7 =19
1715 23:53:38.212488 DQ8 =18, DQ9 =19, DQ10 =24, DQ11 =18
1716 23:53:38.212542 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20
1717 23:53:38.212598
1718 23:53:38.212652
1719 23:53:38.212707 DramC Write-DBI off
1720 23:53:38.212762 ==
1721 23:53:38.212816 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1722 23:53:38.212871 fsp= 1, odt_onoff= 1, Byte mode= 0
1723 23:53:38.212926 ==
1724 23:53:38.212981 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1725 23:53:38.213035
1726 23:53:38.213090 Begin, DQ Scan Range 925~1181
1727 23:53:38.213144
1728 23:53:38.213198
1729 23:53:38.213252 TX Vref Scan disable
1730 23:53:38.213315 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1731 23:53:38.213372 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1732 23:53:38.213428 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1733 23:53:38.213484 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1734 23:53:38.213540 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1735 23:53:38.213595 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1736 23:53:38.213651 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1737 23:53:38.213705 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1738 23:53:38.213761 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1739 23:53:38.213817 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1740 23:53:38.213873 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1741 23:53:38.213929 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1742 23:53:38.213984 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1743 23:53:38.214039 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1744 23:53:38.214095 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1745 23:53:38.214150 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1746 23:53:38.214206 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1747 23:53:38.214261 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1748 23:53:38.214316 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1749 23:53:38.214372 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1750 23:53:38.214427 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1751 23:53:38.214483 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1752 23:53:38.214539 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1753 23:53:38.214595 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1754 23:53:38.214651 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1755 23:53:38.214706 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1756 23:53:38.214762 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1757 23:53:38.214818 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1758 23:53:38.214874 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1759 23:53:38.214957 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1760 23:53:38.215015 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1761 23:53:38.215071 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1762 23:53:38.215128 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1763 23:53:38.215184 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1764 23:53:38.215241 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1765 23:53:38.215491 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1766 23:53:38.215553 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1767 23:53:38.215610 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1768 23:53:38.215666 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1769 23:53:38.215722 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1770 23:53:38.215778 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1771 23:53:38.215834 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1772 23:53:38.215890 967 |3 6 7|[0] xxxxxxxx xxxoxoxx [MSB]
1773 23:53:38.215946 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1774 23:53:38.216002 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1775 23:53:38.216057 970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]
1776 23:53:38.216113 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1777 23:53:38.216169 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1778 23:53:38.216249 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
1779 23:53:38.216309 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1780 23:53:38.216365 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1781 23:53:38.216421 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1782 23:53:38.216477 977 |3 6 17|[0] xxxooooo oooooooo [MSB]
1783 23:53:38.216533 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1784 23:53:38.216589 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1785 23:53:38.216644 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1786 23:53:38.216700 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1787 23:53:38.216755 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1788 23:53:38.216811 995 |3 6 35|[0] oooooxoo xxxxxxxx [MSB]
1789 23:53:38.216866 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1790 23:53:38.216922 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1791 23:53:38.216977 998 |3 6 38|[0] oxxxxxxx xxxxxxxx [MSB]
1792 23:53:38.217035 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1793 23:53:38.217091 Byte0, DQ PI dly=986, DQM PI dly= 986
1794 23:53:38.217146 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1795 23:53:38.217202
1796 23:53:38.217263 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1797 23:53:38.217321
1798 23:53:38.217376 Byte1, DQ PI dly=979, DQM PI dly= 979
1799 23:53:38.217430 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1800 23:53:38.217485
1801 23:53:38.217539 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1802 23:53:38.217594
1803 23:53:38.217649 ==
1804 23:53:38.217703 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1805 23:53:38.217758 fsp= 1, odt_onoff= 1, Byte mode= 0
1806 23:53:38.217813 ==
1807 23:53:38.217868 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1808 23:53:38.217923
1809 23:53:38.217977 Begin, DQ Scan Range 955~1019
1810 23:53:38.218031 Write Rank1 MR14 =0x0
1811 23:53:38.218086
1812 23:53:38.218141 CH=0, VrefRange= 0, VrefLevel = 0
1813 23:53:38.218196 TX Bit0 (981~998) 18 989, Bit8 (969~985) 17 977,
1814 23:53:38.218251 TX Bit1 (979~998) 20 988, Bit9 (970~984) 15 977,
1815 23:53:38.218306 TX Bit2 (980~998) 19 989, Bit10 (975~990) 16 982,
1816 23:53:38.218361 TX Bit3 (974~991) 18 982, Bit11 (968~984) 17 976,
1817 23:53:38.218416 TX Bit4 (979~998) 20 988, Bit12 (969~986) 18 977,
1818 23:53:38.218476 TX Bit5 (977~991) 15 984, Bit13 (969~984) 16 976,
1819 23:53:38.218551 TX Bit6 (977~992) 16 984, Bit14 (970~984) 15 977,
1820 23:53:38.218607 TX Bit7 (978~994) 17 986, Bit15 (973~989) 17 981,
1821 23:53:38.218663
1822 23:53:38.218717 Write Rank1 MR14 =0x2
1823 23:53:38.218771
1824 23:53:38.218825 CH=0, VrefRange= 0, VrefLevel = 2
1825 23:53:38.218880 TX Bit0 (980~999) 20 989, Bit8 (969~985) 17 977,
1826 23:53:38.218934 TX Bit1 (979~998) 20 988, Bit9 (969~985) 17 977,
1827 23:53:38.218990 TX Bit2 (979~998) 20 988, Bit10 (975~990) 16 982,
1828 23:53:38.219045 TX Bit3 (974~992) 19 983, Bit11 (968~985) 18 976,
1829 23:53:38.219100 TX Bit4 (979~998) 20 988, Bit12 (969~986) 18 977,
1830 23:53:38.219155 TX Bit5 (977~991) 15 984, Bit13 (969~984) 16 976,
1831 23:53:38.219211 TX Bit6 (977~993) 17 985, Bit14 (969~985) 17 977,
1832 23:53:38.219293 TX Bit7 (978~994) 17 986, Bit15 (973~989) 17 981,
1833 23:53:38.219350
1834 23:53:38.219404 Write Rank1 MR14 =0x4
1835 23:53:38.219459
1836 23:53:38.219513 CH=0, VrefRange= 0, VrefLevel = 4
1837 23:53:38.219568 TX Bit0 (980~999) 20 989, Bit8 (969~986) 18 977,
1838 23:53:38.219624 TX Bit1 (979~998) 20 988, Bit9 (969~986) 18 977,
1839 23:53:38.219679 TX Bit2 (979~998) 20 988, Bit10 (975~990) 16 982,
1840 23:53:38.219734 TX Bit3 (974~992) 19 983, Bit11 (968~986) 19 977,
1841 23:53:38.219789 TX Bit4 (978~998) 21 988, Bit12 (969~987) 19 978,
1842 23:53:38.219844 TX Bit5 (976~991) 16 983, Bit13 (968~985) 18 976,
1843 23:53:38.219899 TX Bit6 (977~993) 17 985, Bit14 (969~986) 18 977,
1844 23:53:38.219955 TX Bit7 (977~995) 19 986, Bit15 (972~989) 18 980,
1845 23:53:38.220009
1846 23:53:38.220063 wait MRW command Rank1 MR14 =0x6 fired (1)
1847 23:53:38.220118 Write Rank1 MR14 =0x6
1848 23:53:38.220172
1849 23:53:38.220226 CH=0, VrefRange= 0, VrefLevel = 6
1850 23:53:38.220281 TX Bit0 (979~1000) 22 989, Bit8 (968~986) 19 977,
1851 23:53:38.220351 TX Bit1 (978~999) 22 988, Bit9 (969~987) 19 978,
1852 23:53:38.220407 TX Bit2 (979~998) 20 988, Bit10 (974~990) 17 982,
1853 23:53:38.220462 TX Bit3 (973~992) 20 982, Bit11 (968~986) 19 977,
1854 23:53:38.220516 TX Bit4 (978~998) 21 988, Bit12 (969~987) 19 978,
1855 23:53:38.220571 TX Bit5 (976~992) 17 984, Bit13 (968~985) 18 976,
1856 23:53:38.220626 TX Bit6 (976~993) 18 984, Bit14 (969~987) 19 978,
1857 23:53:38.220681 TX Bit7 (978~996) 19 987, Bit15 (973~989) 17 981,
1858 23:53:38.220736
1859 23:53:38.220790 Write Rank1 MR14 =0x8
1860 23:53:38.220844
1861 23:53:38.220898 CH=0, VrefRange= 0, VrefLevel = 8
1862 23:53:38.220953 TX Bit0 (979~1000) 22 989, Bit8 (968~987) 20 977,
1863 23:53:38.221008 TX Bit1 (978~999) 22 988, Bit9 (969~988) 20 978,
1864 23:53:38.221062 TX Bit2 (978~999) 22 988, Bit10 (973~991) 19 982,
1865 23:53:38.221117 TX Bit3 (972~993) 22 982, Bit11 (968~987) 20 977,
1866 23:53:38.221172 TX Bit4 (978~999) 22 988, Bit12 (969~988) 20 978,
1867 23:53:38.221227 TX Bit5 (975~992) 18 983, Bit13 (968~986) 19 977,
1868 23:53:38.221293 TX Bit6 (976~994) 19 985, Bit14 (969~987) 19 978,
1869 23:53:38.221350 TX Bit7 (977~997) 21 987, Bit15 (972~990) 19 981,
1870 23:53:38.221408
1871 23:53:38.221463 Write Rank1 MR14 =0xa
1872 23:53:38.221715
1873 23:53:38.221776 CH=0, VrefRange= 0, VrefLevel = 10
1874 23:53:38.221832 TX Bit0 (979~1000) 22 989, Bit8 (968~988) 21 978,
1875 23:53:38.221888 TX Bit1 (978~999) 22 988, Bit9 (969~988) 20 978,
1876 23:53:38.221943 TX Bit2 (978~999) 22 988, Bit10 (973~991) 19 982,
1877 23:53:38.221998 TX Bit3 (972~994) 23 983, Bit11 (968~987) 20 977,
1878 23:53:38.222053 TX Bit4 (978~999) 22 988, Bit12 (968~988) 21 978,
1879 23:53:38.222108 TX Bit5 (975~993) 19 984, Bit13 (968~986) 19 977,
1880 23:53:38.222162 TX Bit6 (975~995) 21 985, Bit14 (968~988) 21 978,
1881 23:53:38.222217 TX Bit7 (977~997) 21 987, Bit15 (971~990) 20 980,
1882 23:53:38.222272
1883 23:53:38.222327 Write Rank1 MR14 =0xc
1884 23:53:38.222381
1885 23:53:38.222436 CH=0, VrefRange= 0, VrefLevel = 12
1886 23:53:38.222490 TX Bit0 (978~1000) 23 989, Bit8 (968~989) 22 978,
1887 23:53:38.222546 TX Bit1 (978~999) 22 988, Bit9 (968~989) 22 978,
1888 23:53:38.222601 TX Bit2 (978~999) 22 988, Bit10 (972~992) 21 982,
1889 23:53:38.222656 TX Bit3 (972~994) 23 983, Bit11 (968~988) 21 978,
1890 23:53:38.222727 TX Bit4 (978~1000) 23 989, Bit12 (968~989) 22 978,
1891 23:53:38.222792 TX Bit5 (974~993) 20 983, Bit13 (968~987) 20 977,
1892 23:53:38.222872 TX Bit6 (975~996) 22 985, Bit14 (968~989) 22 978,
1893 23:53:38.222931 TX Bit7 (977~998) 22 987, Bit15 (971~990) 20 980,
1894 23:53:38.222987
1895 23:53:38.223042 Write Rank1 MR14 =0xe
1896 23:53:38.223096
1897 23:53:38.223150 CH=0, VrefRange= 0, VrefLevel = 14
1898 23:53:38.223205 TX Bit0 (978~1001) 24 989, Bit8 (968~989) 22 978,
1899 23:53:38.223261 TX Bit1 (978~1000) 23 989, Bit9 (968~989) 22 978,
1900 23:53:38.223315 TX Bit2 (978~999) 22 988, Bit10 (973~992) 20 982,
1901 23:53:38.223371 TX Bit3 (971~995) 25 983, Bit11 (967~989) 23 978,
1902 23:53:38.223433 TX Bit4 (978~1000) 23 989, Bit12 (968~989) 22 978,
1903 23:53:38.223519 TX Bit5 (974~994) 21 984, Bit13 (967~988) 22 977,
1904 23:53:38.223606 TX Bit6 (974~996) 23 985, Bit14 (968~989) 22 978,
1905 23:53:38.223699 TX Bit7 (977~998) 22 987, Bit15 (970~990) 21 980,
1906 23:53:38.223798
1907 23:53:38.223858 Write Rank1 MR14 =0x10
1908 23:53:38.223913
1909 23:53:38.223968 CH=0, VrefRange= 0, VrefLevel = 16
1910 23:53:38.224023 TX Bit0 (978~1001) 24 989, Bit8 (968~989) 22 978,
1911 23:53:38.224078 TX Bit1 (978~1000) 23 989, Bit9 (968~989) 22 978,
1912 23:53:38.224133 TX Bit2 (978~1000) 23 989, Bit10 (972~992) 21 982,
1913 23:53:38.224188 TX Bit3 (971~995) 25 983, Bit11 (967~989) 23 978,
1914 23:53:38.224244 TX Bit4 (977~1000) 24 988, Bit12 (968~989) 22 978,
1915 23:53:38.224299 TX Bit5 (974~994) 21 984, Bit13 (967~989) 23 978,
1916 23:53:38.224354 TX Bit6 (974~997) 24 985, Bit14 (968~989) 22 978,
1917 23:53:38.224409 TX Bit7 (977~998) 22 987, Bit15 (970~991) 22 980,
1918 23:53:38.224464
1919 23:53:38.224518 Write Rank1 MR14 =0x12
1920 23:53:38.224572
1921 23:53:38.224627 CH=0, VrefRange= 0, VrefLevel = 18
1922 23:53:38.224681 TX Bit0 (978~1002) 25 990, Bit8 (968~989) 22 978,
1923 23:53:38.224736 TX Bit1 (977~1000) 24 988, Bit9 (968~990) 23 979,
1924 23:53:38.224791 TX Bit2 (978~1000) 23 989, Bit10 (971~992) 22 981,
1925 23:53:38.224846 TX Bit3 (970~996) 27 983, Bit11 (967~989) 23 978,
1926 23:53:38.224901 TX Bit4 (977~1001) 25 989, Bit12 (968~990) 23 979,
1927 23:53:38.224956 TX Bit5 (973~995) 23 984, Bit13 (967~989) 23 978,
1928 23:53:38.225011 TX Bit6 (974~998) 25 986, Bit14 (968~990) 23 979,
1929 23:53:38.225066 TX Bit7 (976~998) 23 987, Bit15 (970~991) 22 980,
1930 23:53:38.225121
1931 23:53:38.225175 Write Rank1 MR14 =0x14
1932 23:53:38.225229
1933 23:53:38.225294 CH=0, VrefRange= 0, VrefLevel = 20
1934 23:53:38.225350 TX Bit0 (978~1002) 25 990, Bit8 (968~990) 23 979,
1935 23:53:38.225406 TX Bit1 (978~1000) 23 989, Bit9 (968~990) 23 979,
1936 23:53:38.225460 TX Bit2 (978~1000) 23 989, Bit10 (971~993) 23 982,
1937 23:53:38.225515 TX Bit3 (970~996) 27 983, Bit11 (967~989) 23 978,
1938 23:53:38.225570 TX Bit4 (977~1001) 25 989, Bit12 (968~990) 23 979,
1939 23:53:38.225625 TX Bit5 (972~996) 25 984, Bit13 (967~989) 23 978,
1940 23:53:38.225681 TX Bit6 (973~998) 26 985, Bit14 (968~990) 23 979,
1941 23:53:38.225736 TX Bit7 (976~999) 24 987, Bit15 (969~991) 23 980,
1942 23:53:38.225790
1943 23:53:38.225847 Write Rank1 MR14 =0x16
1944 23:53:38.225927
1945 23:53:38.225983 CH=0, VrefRange= 0, VrefLevel = 22
1946 23:53:38.226037 TX Bit0 (978~1002) 25 990, Bit8 (968~990) 23 979,
1947 23:53:38.226092 TX Bit1 (978~1000) 23 989, Bit9 (968~990) 23 979,
1948 23:53:38.226146 TX Bit2 (978~1000) 23 989, Bit10 (971~993) 23 982,
1949 23:53:38.226200 TX Bit3 (970~996) 27 983, Bit11 (967~989) 23 978,
1950 23:53:38.226255 TX Bit4 (977~1001) 25 989, Bit12 (968~990) 23 979,
1951 23:53:38.226310 TX Bit5 (972~996) 25 984, Bit13 (967~989) 23 978,
1952 23:53:38.226365 TX Bit6 (973~998) 26 985, Bit14 (968~990) 23 979,
1953 23:53:38.226420 TX Bit7 (976~999) 24 987, Bit15 (969~991) 23 980,
1954 23:53:38.226474
1955 23:53:38.226528 wait MRW command Rank1 MR14 =0x18 fired (1)
1956 23:53:38.226582 Write Rank1 MR14 =0x18
1957 23:53:38.226636
1958 23:53:38.226690 CH=0, VrefRange= 0, VrefLevel = 24
1959 23:53:38.226744 TX Bit0 (978~1002) 25 990, Bit8 (968~990) 23 979,
1960 23:53:38.226826 TX Bit1 (978~1000) 23 989, Bit9 (968~990) 23 979,
1961 23:53:38.226883 TX Bit2 (978~1000) 23 989, Bit10 (971~993) 23 982,
1962 23:53:38.226938 TX Bit3 (970~996) 27 983, Bit11 (967~989) 23 978,
1963 23:53:38.226994 TX Bit4 (977~1001) 25 989, Bit12 (968~990) 23 979,
1964 23:53:38.227049 TX Bit5 (972~996) 25 984, Bit13 (967~989) 23 978,
1965 23:53:38.227105 TX Bit6 (973~998) 26 985, Bit14 (968~990) 23 979,
1966 23:53:38.227160 TX Bit7 (976~999) 24 987, Bit15 (969~991) 23 980,
1967 23:53:38.227215
1968 23:53:38.227269 Write Rank1 MR14 =0x1a
1969 23:53:38.227323
1970 23:53:38.227378 CH=0, VrefRange= 0, VrefLevel = 26
1971 23:53:38.227433 TX Bit0 (978~1002) 25 990, Bit8 (968~990) 23 979,
1972 23:53:38.227691 TX Bit1 (978~1000) 23 989, Bit9 (968~990) 23 979,
1973 23:53:38.227755 TX Bit2 (978~1000) 23 989, Bit10 (971~993) 23 982,
1974 23:53:38.227812 TX Bit3 (970~996) 27 983, Bit11 (967~989) 23 978,
1975 23:53:38.227867 TX Bit4 (977~1001) 25 989, Bit12 (968~990) 23 979,
1976 23:53:38.618365 TX Bit5 (972~996) 25 984, Bit13 (967~989) 23 978,
1977 23:53:38.618523 TX Bit6 (973~998) 26 985, Bit14 (968~990) 23 979,
1978 23:53:38.618643 TX Bit7 (976~999) 24 987, Bit15 (969~991) 23 980,
1979 23:53:38.618737
1980 23:53:38.618850 Write Rank1 MR14 =0x1c
1981 23:53:38.618943
1982 23:53:38.619030 CH=0, VrefRange= 0, VrefLevel = 28
1983 23:53:38.619119 TX Bit0 (978~1002) 25 990, Bit8 (968~990) 23 979,
1984 23:53:38.619208 TX Bit1 (978~1000) 23 989, Bit9 (968~990) 23 979,
1985 23:53:38.619295 TX Bit2 (978~1000) 23 989, Bit10 (971~993) 23 982,
1986 23:53:38.619385 TX Bit3 (970~996) 27 983, Bit11 (967~989) 23 978,
1987 23:53:38.619474 TX Bit4 (977~1001) 25 989, Bit12 (968~990) 23 979,
1988 23:53:38.619560 TX Bit5 (972~996) 25 984, Bit13 (967~989) 23 978,
1989 23:53:38.619647 TX Bit6 (973~998) 26 985, Bit14 (968~990) 23 979,
1990 23:53:38.619744 TX Bit7 (976~999) 24 987, Bit15 (969~991) 23 980,
1991 23:53:38.619831
1992 23:53:38.619917 Write Rank1 MR14 =0x1e
1993 23:53:38.620003
1994 23:53:38.620087 CH=0, VrefRange= 0, VrefLevel = 30
1995 23:53:38.620185 TX Bit0 (978~1002) 25 990, Bit8 (968~990) 23 979,
1996 23:53:38.620272 TX Bit1 (978~1000) 23 989, Bit9 (968~990) 23 979,
1997 23:53:38.620380 TX Bit2 (978~1000) 23 989, Bit10 (971~993) 23 982,
1998 23:53:38.620470 TX Bit3 (970~996) 27 983, Bit11 (967~989) 23 978,
1999 23:53:38.620557 TX Bit4 (977~1001) 25 989, Bit12 (968~990) 23 979,
2000 23:53:38.620642 TX Bit5 (972~996) 25 984, Bit13 (967~989) 23 978,
2001 23:53:38.620727 TX Bit6 (973~998) 26 985, Bit14 (968~990) 23 979,
2002 23:53:38.620824 TX Bit7 (976~999) 24 987, Bit15 (969~991) 23 980,
2003 23:53:38.620910
2004 23:53:38.620996 Write Rank1 MR14 =0x20
2005 23:53:38.621081
2006 23:53:38.621164 CH=0, VrefRange= 0, VrefLevel = 32
2007 23:53:38.621249 TX Bit0 (978~1002) 25 990, Bit8 (968~990) 23 979,
2008 23:53:38.621331 TX Bit1 (978~1000) 23 989, Bit9 (968~990) 23 979,
2009 23:53:38.621392 TX Bit2 (978~1000) 23 989, Bit10 (971~993) 23 982,
2010 23:53:38.621456 TX Bit3 (970~996) 27 983, Bit11 (967~989) 23 978,
2011 23:53:38.621542 TX Bit4 (977~1001) 25 989, Bit12 (968~990) 23 979,
2012 23:53:38.621606 TX Bit5 (972~996) 25 984, Bit13 (967~989) 23 978,
2013 23:53:38.621663 TX Bit6 (973~998) 26 985, Bit14 (968~990) 23 979,
2014 23:53:38.621718 TX Bit7 (976~999) 24 987, Bit15 (969~991) 23 980,
2015 23:53:38.621773
2016 23:53:38.621829
2017 23:53:38.621886 TX Vref found, early break! 360< 362
2018 23:53:38.621953 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2019 23:53:38.622040 u1DelayCellOfst[0]=8 cells (7 PI)
2020 23:53:38.622120 u1DelayCellOfst[1]=7 cells (6 PI)
2021 23:53:38.622189 u1DelayCellOfst[2]=7 cells (6 PI)
2022 23:53:38.622270 u1DelayCellOfst[3]=0 cells (0 PI)
2023 23:53:38.622360 u1DelayCellOfst[4]=7 cells (6 PI)
2024 23:53:38.622457 u1DelayCellOfst[5]=1 cells (1 PI)
2025 23:53:38.622545 u1DelayCellOfst[6]=2 cells (2 PI)
2026 23:53:38.622622 u1DelayCellOfst[7]=5 cells (4 PI)
2027 23:53:38.622680 Byte0, DQ PI dly=983, DQM PI dly= 986
2028 23:53:38.622735 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2029 23:53:38.622789
2030 23:53:38.622846 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2031 23:53:38.622904
2032 23:53:38.623003 u1DelayCellOfst[8]=1 cells (1 PI)
2033 23:53:38.623097 u1DelayCellOfst[9]=1 cells (1 PI)
2034 23:53:38.623183 u1DelayCellOfst[10]=5 cells (4 PI)
2035 23:53:38.623267 u1DelayCellOfst[11]=0 cells (0 PI)
2036 23:53:38.623350 u1DelayCellOfst[12]=1 cells (1 PI)
2037 23:53:38.623412 u1DelayCellOfst[13]=0 cells (0 PI)
2038 23:53:38.623501 u1DelayCellOfst[14]=1 cells (1 PI)
2039 23:53:38.623585 u1DelayCellOfst[15]=2 cells (2 PI)
2040 23:53:38.623668 Byte1, DQ PI dly=978, DQM PI dly= 980
2041 23:53:38.623754 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2042 23:53:38.623840
2043 23:53:38.623925 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2044 23:53:38.624007
2045 23:53:38.624083 Write Rank1 MR14 =0x14
2046 23:53:38.624170
2047 23:53:38.624284 Final TX Range 0 Vref 20
2048 23:53:38.624396
2049 23:53:38.624493 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2050 23:53:38.624584
2051 23:53:38.624669 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2052 23:53:38.624755 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2053 23:53:38.624843 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2054 23:53:38.624929 Write Rank1 MR3 =0xb0
2055 23:53:38.625015 DramC Write-DBI on
2056 23:53:38.625100 ==
2057 23:53:38.625186 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2058 23:53:38.625278 fsp= 1, odt_onoff= 1, Byte mode= 0
2059 23:53:38.625364 ==
2060 23:53:38.625452 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2061 23:53:38.625538
2062 23:53:38.625623 Begin, DQ Scan Range 700~764
2063 23:53:38.625706
2064 23:53:38.625789
2065 23:53:38.625873 TX Vref Scan disable
2066 23:53:38.625959 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2067 23:53:38.626052 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2068 23:53:38.626141 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2069 23:53:38.626229 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2070 23:53:38.626317 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2071 23:53:38.626404 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2072 23:53:38.626493 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2073 23:53:38.626582 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2074 23:53:38.626699 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2075 23:53:38.626803 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2076 23:53:38.626894 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2077 23:53:38.626981 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2078 23:53:38.627072 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2079 23:53:38.627159 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2080 23:53:38.627267 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2081 23:53:38.627359 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2082 23:53:38.627448 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2083 23:53:38.627753 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2084 23:53:38.627849 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2085 23:53:38.627939 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2086 23:53:38.628031 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2087 23:53:38.628135 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2088 23:53:38.628223 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2089 23:53:38.628309 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2090 23:53:38.628396 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2091 23:53:38.628459 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2092 23:53:38.628518 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2093 23:53:38.628583 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2094 23:53:38.628670 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2095 23:53:38.628759 Byte0, DQ PI dly=731, DQM PI dly= 731
2096 23:53:38.628843 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
2097 23:53:38.628927
2098 23:53:38.629013 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
2099 23:53:38.629100
2100 23:53:38.629185 Byte1, DQ PI dly=722, DQM PI dly= 722
2101 23:53:38.629277 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2102 23:53:38.629363
2103 23:53:38.629447 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2104 23:53:38.629530
2105 23:53:38.629590 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2106 23:53:38.629652 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2107 23:53:38.629707 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2108 23:53:38.629761 Write Rank1 MR3 =0x30
2109 23:53:38.629815 DramC Write-DBI off
2110 23:53:38.629901
2111 23:53:38.629983 [DATLAT]
2112 23:53:38.630090 Freq=1600, CH0 RK1, use_rxtx_scan=0
2113 23:53:38.630180
2114 23:53:38.630267 DATLAT Default: 0x10
2115 23:53:38.630351 7, 0xFFFF, sum=0
2116 23:53:38.630437 8, 0xFFFF, sum=0
2117 23:53:38.630523 9, 0xFFFF, sum=0
2118 23:53:38.630611 10, 0xFFFF, sum=0
2119 23:53:38.630700 11, 0xFFFF, sum=0
2120 23:53:38.630788 12, 0xFFFF, sum=0
2121 23:53:38.630883 13, 0xFFFF, sum=0
2122 23:53:38.630970 14, 0x0, sum=1
2123 23:53:38.631057 15, 0x0, sum=2
2124 23:53:38.631146 16, 0x0, sum=3
2125 23:53:38.631235 17, 0x0, sum=4
2126 23:53:38.631323 pattern=2 first_step=14 total pass=5 best_step=16
2127 23:53:38.631406 ==
2128 23:53:38.631490 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2129 23:53:38.631576 fsp= 1, odt_onoff= 1, Byte mode= 0
2130 23:53:38.631685 ==
2131 23:53:38.631774 Start DQ dly to find pass range UseTestEngine =1
2132 23:53:38.631860 x-axis: bit #, y-axis: DQ dly (-127~63)
2133 23:53:38.631943 RX Vref Scan = 0
2134 23:53:38.632026 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2135 23:53:38.632114 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2136 23:53:38.632203 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2137 23:53:38.632285 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2138 23:53:38.632346 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2139 23:53:38.632421 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2140 23:53:38.632506 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2141 23:53:38.632592 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2142 23:53:38.632682 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2143 23:53:38.632768 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2144 23:53:38.632873 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2145 23:53:38.632963 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2146 23:53:38.633048 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2147 23:53:38.633152 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2148 23:53:38.633248 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2149 23:53:38.633344 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2150 23:53:38.633431 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2151 23:53:38.633518 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2152 23:53:38.633605 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2153 23:53:38.633693 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2154 23:53:38.633781 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2155 23:53:38.633869 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2156 23:53:38.633955 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2157 23:53:38.634041 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2158 23:53:38.634127 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2159 23:53:38.634215 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2160 23:53:38.634312 0, [0] xxxoxoxx xxxoxoxx [MSB]
2161 23:53:38.634407 1, [0] xxxoxoxx oxxoxoxx [MSB]
2162 23:53:38.634493 2, [0] xxxoxoxx oxxoxoxx [MSB]
2163 23:53:38.634579 3, [0] xxxoxooo ooxoooox [MSB]
2164 23:53:38.634676 4, [0] xxxoxooo ooxooooo [MSB]
2165 23:53:38.634773 5, [0] xxxoxooo ooxooooo [MSB]
2166 23:53:38.634873 6, [0] xxxooooo oooooooo [MSB]
2167 23:53:38.634964 7, [0] xoxooooo oooooooo [MSB]
2168 23:53:38.635051 8, [0] xooooooo oooooooo [MSB]
2169 23:53:38.635137 9, [0] xooooooo oooooooo [MSB]
2170 23:53:38.635227 33, [0] oooxoooo oooooooo [MSB]
2171 23:53:38.635314 34, [0] oooxoooo oooooxoo [MSB]
2172 23:53:38.635400 35, [0] oooxoooo oooxoxoo [MSB]
2173 23:53:38.635488 36, [0] oooxoxox oooxoxxo [MSB]
2174 23:53:38.635576 37, [0] oooxoxxx xooxoxxo [MSB]
2175 23:53:38.635672 38, [0] oooxoxxx xxoxxxxx [MSB]
2176 23:53:38.635770 39, [0] oooxoxxx xxoxxxxx [MSB]
2177 23:53:38.635858 40, [0] oooxoxxx xxoxxxxx [MSB]
2178 23:53:38.635944 41, [0] oooxxxxx xxoxxxxx [MSB]
2179 23:53:38.636032 42, [0] oooxxxxx xxoxxxxx [MSB]
2180 23:53:38.636130 43, [0] xxxxxxxx xxxxxxxx [MSB]
2181 23:53:38.636230 iDelay=43, Bit 0, Center 26 (10 ~ 42) 33
2182 23:53:38.636318 iDelay=43, Bit 1, Center 24 (7 ~ 42) 36
2183 23:53:38.636406 iDelay=43, Bit 2, Center 25 (8 ~ 42) 35
2184 23:53:38.636513 iDelay=43, Bit 3, Center 15 (-1 ~ 32) 34
2185 23:53:38.636614 iDelay=43, Bit 4, Center 23 (6 ~ 40) 35
2186 23:53:38.636701 iDelay=43, Bit 5, Center 17 (0 ~ 35) 36
2187 23:53:38.636787 iDelay=43, Bit 6, Center 19 (3 ~ 36) 34
2188 23:53:38.636873 iDelay=43, Bit 7, Center 19 (3 ~ 35) 33
2189 23:53:38.636957 iDelay=43, Bit 8, Center 18 (1 ~ 36) 36
2190 23:53:38.637040 iDelay=43, Bit 9, Center 20 (3 ~ 37) 35
2191 23:53:38.637127 iDelay=43, Bit 10, Center 24 (6 ~ 42) 37
2192 23:53:38.637213 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
2193 23:53:38.637306 iDelay=43, Bit 12, Center 20 (3 ~ 37) 35
2194 23:53:38.637392 iDelay=43, Bit 13, Center 16 (0 ~ 33) 34
2195 23:53:38.637476 iDelay=43, Bit 14, Center 19 (3 ~ 35) 33
2196 23:53:38.637570 iDelay=43, Bit 15, Center 20 (4 ~ 37) 34
2197 23:53:38.637639 ==
2198 23:53:38.637728 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2199 23:53:38.637812 fsp= 1, odt_onoff= 1, Byte mode= 0
2200 23:53:38.637896 ==
2201 23:53:38.637981 DQS Delay:
2202 23:53:38.638066 DQS0 = 0, DQS1 = 0
2203 23:53:38.638151 DQM Delay:
2204 23:53:38.638238 DQM0 = 21, DQM1 = 19
2205 23:53:38.638323 DQ Delay:
2206 23:53:38.638407 DQ0 =26, DQ1 =24, DQ2 =25, DQ3 =15
2207 23:53:38.638492 DQ4 =23, DQ5 =17, DQ6 =19, DQ7 =19
2208 23:53:38.638576 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =17
2209 23:53:38.638868 DQ12 =20, DQ13 =16, DQ14 =19, DQ15 =20
2210 23:53:38.638956
2211 23:53:38.639039
2212 23:53:38.639124
2213 23:53:38.639212 [DramC_TX_OE_Calibration] TA2
2214 23:53:38.639297 Original DQ_B0 (3 6) =30, OEN = 27
2215 23:53:38.639383 Original DQ_B1 (3 6) =30, OEN = 27
2216 23:53:38.639469 23, 0x0, End_B0=23 End_B1=23
2217 23:53:38.639555 24, 0x0, End_B0=24 End_B1=24
2218 23:53:38.639641 25, 0x0, End_B0=25 End_B1=25
2219 23:53:38.639731 26, 0x0, End_B0=26 End_B1=26
2220 23:53:38.639834 27, 0x0, End_B0=27 End_B1=27
2221 23:53:38.639930 28, 0x0, End_B0=28 End_B1=28
2222 23:53:38.640023 29, 0x0, End_B0=29 End_B1=29
2223 23:53:38.640122 30, 0x0, End_B0=30 End_B1=30
2224 23:53:38.640213 31, 0xFFFE, End_B0=30 End_B1=30
2225 23:53:38.640302 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2226 23:53:38.640388 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2227 23:53:38.640471
2228 23:53:38.640555
2229 23:53:38.640640 Write Rank1 MR23 =0x3f
2230 23:53:38.640728 [DQSOSC]
2231 23:53:38.640829 [DQSOSCAuto] RK1, (LSB)MR18= 0x7a, (MSB)MR19= 0x3, tDQSOscB0 = 353 ps tDQSOscB1 = 0 ps
2232 23:53:38.640924 CH0_RK1: MR19=0x3, MR18=0x7A, DQSOSC=353, MR23=63, INC=19, DEC=29
2233 23:53:38.641011 Write Rank1 MR23 =0x3f
2234 23:53:38.641095 [DQSOSC]
2235 23:53:38.641198 [DQSOSCAuto] RK1, (LSB)MR18= 0x77, (MSB)MR19= 0x3, tDQSOscB0 = 355 ps tDQSOscB1 = 0 ps
2236 23:53:38.641296 CH0 RK1: MR19=3, MR18=77
2237 23:53:38.641391 [RxdqsGatingPostProcess] freq 1600
2238 23:53:38.641476 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2239 23:53:38.641556 Rank: 0
2240 23:53:38.641620 best DQS0 dly(2T, 0.5T) = (2, 5)
2241 23:53:38.641707 best DQS1 dly(2T, 0.5T) = (2, 5)
2242 23:53:38.641793 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2243 23:53:38.641878 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2244 23:53:38.641962 Rank: 1
2245 23:53:38.642046 best DQS0 dly(2T, 0.5T) = (2, 6)
2246 23:53:38.642129 best DQS1 dly(2T, 0.5T) = (2, 6)
2247 23:53:38.642217 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2248 23:53:38.642304 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2249 23:53:38.642388 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2250 23:53:38.642474 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2251 23:53:38.642558 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2252 23:53:38.642642 Write Rank0 MR13 =0x59
2253 23:53:38.642728 ==
2254 23:53:38.642825 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2255 23:53:38.642922 fsp= 1, odt_onoff= 1, Byte mode= 0
2256 23:53:38.643030 ==
2257 23:53:38.643116 === u2Vref_new: 0x56 --> 0x3a
2258 23:53:38.643203 === u2Vref_new: 0x58 --> 0x58
2259 23:53:38.643291 === u2Vref_new: 0x5a --> 0x5a
2260 23:53:38.643377 === u2Vref_new: 0x5c --> 0x78
2261 23:53:38.643461 === u2Vref_new: 0x5e --> 0x7a
2262 23:53:38.643545 === u2Vref_new: 0x60 --> 0x90
2263 23:53:38.643631 [CA 0] Center 36 (9~63) winsize 55
2264 23:53:38.643717 [CA 1] Center 35 (7~63) winsize 57
2265 23:53:38.643804 [CA 2] Center 33 (4~62) winsize 59
2266 23:53:38.643889 [CA 3] Center 33 (3~63) winsize 61
2267 23:53:38.643973 [CA 4] Center 33 (4~63) winsize 60
2268 23:53:38.644056 [CA 5] Center 25 (-2~52) winsize 55
2269 23:53:38.644139
2270 23:53:38.644226 [CATrainingPosCal] consider 1 rank data
2271 23:53:38.644309 u2DelayCellTimex100 = 762/100 ps
2272 23:53:38.644390 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
2273 23:53:38.644477 CA1 delay=35 (7~63),Diff = 10 PI (12 cell)
2274 23:53:38.644563 CA2 delay=33 (4~62),Diff = 8 PI (10 cell)
2275 23:53:38.644647 CA3 delay=33 (3~63),Diff = 8 PI (10 cell)
2276 23:53:38.644734 CA4 delay=33 (4~63),Diff = 8 PI (10 cell)
2277 23:53:38.644821 CA5 delay=25 (-2~52),Diff = 0 PI (0 cell)
2278 23:53:38.644906
2279 23:53:38.644989 CA PerBit enable=1, Macro0, CA PI delay=25
2280 23:53:38.645075 === u2Vref_new: 0x56 --> 0x3a
2281 23:53:38.645158
2282 23:53:38.645265 Vref(ca) range 1: 22
2283 23:53:38.645334
2284 23:53:38.645417 CS Dly= 10 (41-0-32)
2285 23:53:38.645501 Write Rank0 MR13 =0xd8
2286 23:53:38.645588 Write Rank0 MR13 =0xd8
2287 23:53:38.645672 Write Rank0 MR12 =0x56
2288 23:53:38.645759 Write Rank1 MR13 =0x59
2289 23:53:38.645845 ==
2290 23:53:38.645930 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2291 23:53:38.646015 fsp= 1, odt_onoff= 1, Byte mode= 0
2292 23:53:38.646109 ==
2293 23:53:38.646208 === u2Vref_new: 0x56 --> 0x3a
2294 23:53:38.646296 === u2Vref_new: 0x58 --> 0x58
2295 23:53:38.646382 === u2Vref_new: 0x5a --> 0x5a
2296 23:53:38.646466 === u2Vref_new: 0x5c --> 0x78
2297 23:53:38.646549 === u2Vref_new: 0x5e --> 0x7a
2298 23:53:38.646636 === u2Vref_new: 0x60 --> 0x90
2299 23:53:38.646722 [CA 0] Center 36 (10~63) winsize 54
2300 23:53:38.646808 [CA 1] Center 35 (8~63) winsize 56
2301 23:53:38.646893 [CA 2] Center 33 (3~63) winsize 61
2302 23:53:38.646978 [CA 3] Center 33 (3~63) winsize 61
2303 23:53:38.647062 [CA 4] Center 34 (5~63) winsize 59
2304 23:53:38.647146 [CA 5] Center 25 (-2~53) winsize 56
2305 23:53:38.647232
2306 23:53:38.647318 [CATrainingPosCal] consider 2 rank data
2307 23:53:38.647403 u2DelayCellTimex100 = 762/100 ps
2308 23:53:38.647497 CA0 delay=36 (10~63),Diff = 11 PI (14 cell)
2309 23:53:38.647583 CA1 delay=35 (8~63),Diff = 10 PI (12 cell)
2310 23:53:38.647667 CA2 delay=33 (4~62),Diff = 8 PI (10 cell)
2311 23:53:38.647755 CA3 delay=33 (3~63),Diff = 8 PI (10 cell)
2312 23:53:38.647841 CA4 delay=34 (5~63),Diff = 9 PI (11 cell)
2313 23:53:38.647926 CA5 delay=25 (-2~52),Diff = 0 PI (0 cell)
2314 23:53:38.648011
2315 23:53:38.648099 CA PerBit enable=1, Macro0, CA PI delay=25
2316 23:53:38.648183 === u2Vref_new: 0x58 --> 0x58
2317 23:53:38.648270
2318 23:53:38.648355 Vref(ca) range 1: 24
2319 23:53:38.648439
2320 23:53:38.648522 CS Dly= 11 (42-0-32)
2321 23:53:38.648607 Write Rank1 MR13 =0xd8
2322 23:53:38.648690 Write Rank1 MR13 =0xd8
2323 23:53:38.648793 Write Rank1 MR12 =0x58
2324 23:53:38.648881 [RankSwap] Rank num 2, (Multi 1), Rank 0
2325 23:53:38.648965 Write Rank0 MR2 =0xad
2326 23:53:38.649049 [Write Leveling]
2327 23:53:38.649134 delay byte0 byte1 byte2 byte3
2328 23:53:38.649230
2329 23:53:38.649340 10 0 0
2330 23:53:38.649430 11 0 0
2331 23:53:38.649516 12 0 0
2332 23:53:38.649602 13 0 0
2333 23:53:38.649689 14 0 0
2334 23:53:38.649798 15 0 0
2335 23:53:38.649889 16 0 0
2336 23:53:38.649977 17 0 0
2337 23:53:38.650074 18 0 0
2338 23:53:38.650167 19 0 0
2339 23:53:38.650257 20 0 0
2340 23:53:38.650343 21 0 0
2341 23:53:38.650430 22 0 0
2342 23:53:38.650518 23 0 0
2343 23:53:38.650603 24 0 0
2344 23:53:38.650697 25 0 0
2345 23:53:38.650787 26 0 0
2346 23:53:38.650872 27 0 0
2347 23:53:38.650959 28 0 0
2348 23:53:38.651047 29 0 0
2349 23:53:38.651148 30 0 0
2350 23:53:38.651241 31 0 ff
2351 23:53:38.651316 32 0 ff
2352 23:53:38.651404 33 0 ff
2353 23:53:38.651491 34 0 ff
2354 23:53:38.651578 35 0 ff
2355 23:53:38.651856 36 ff ff
2356 23:53:38.651948 37 ff ff
2357 23:53:38.652036 38 ff ff
2358 23:53:38.652124 39 ff ff
2359 23:53:38.652223 40 ff ff
2360 23:53:38.652314 41 ff ff
2361 23:53:38.652402 42 ff ff
2362 23:53:38.652491 pass bytecount = 0xff (0xff: all bytes pass)
2363 23:53:38.652577
2364 23:53:38.652660 DQS0 dly: 36
2365 23:53:38.652744 DQS1 dly: 31
2366 23:53:38.652830 Write Rank0 MR2 =0x2d
2367 23:53:38.652913 [RankSwap] Rank num 2, (Multi 1), Rank 0
2368 23:53:38.652998 Write Rank0 MR1 =0xd6
2369 23:53:38.653083 [Gating]
2370 23:53:38.653185 ==
2371 23:53:38.653285 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2372 23:53:38.653373 fsp= 1, odt_onoff= 1, Byte mode= 0
2373 23:53:38.653458 ==
2374 23:53:38.653545 3 1 0 |2d2c 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2375 23:53:38.654860 3 1 4 |2e2d 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2376 23:53:38.661073 3 1 8 |1a1a 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2377 23:53:38.664454 3 1 12 |2a2a 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2378 23:53:38.667864 3 1 16 |2d2c 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2379 23:53:38.674512 3 1 20 |2e2e 3534 |(0 0)(11 11) |(1 0)(0 1)| 0
2380 23:53:38.677949 3 1 24 |2d2c 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2381 23:53:38.681092 3 1 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2382 23:53:38.684336 3 2 0 |3737 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
2383 23:53:38.691068 3 2 4 |3736 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2384 23:53:38.694496 3 2 8 |3535 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2385 23:53:38.698048 3 2 12 |3736 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2386 23:53:38.704985 3 2 16 |1716 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2387 23:53:38.707992 3 2 20 |3635 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2388 23:53:38.711127 3 2 24 |3736 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2389 23:53:38.717849 3 2 28 |1c1b 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2390 23:53:38.721714 [Byte 0] Lead/lag falling Transition (3, 2, 28)
2391 23:53:38.724799 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
2392 23:53:38.728343 3 3 4 |3534 b0a |(11 11)(11 11) |(0 1)(1 1)| 0
2393 23:53:38.734998 3 3 8 |3534 201 |(11 11)(11 11) |(0 1)(1 1)| 0
2394 23:53:38.738254 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2395 23:53:38.741831 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2396 23:53:38.748090 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2397 23:53:38.751980 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2398 23:53:38.755027 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2399 23:53:38.758114 3 3 28 |1d1c 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2400 23:53:38.765189 3 4 0 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
2401 23:53:38.768368 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2402 23:53:38.771521 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2403 23:53:38.778393 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2404 23:53:38.781777 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2405 23:53:38.784764 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2406 23:53:38.791624 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2407 23:53:38.794935 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2408 23:53:38.798796 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2409 23:53:38.801893 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2410 23:53:38.808744 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2411 23:53:38.812030 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2412 23:53:38.815101 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2413 23:53:38.821590 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2414 23:53:38.825586 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2415 23:53:38.828695 [Byte 0] Lead/lag Transition tap number (2)
2416 23:53:38.831990 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2417 23:53:38.838519 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2418 23:53:38.842436 3 5 28 |605 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2419 23:53:38.845349 [Byte 1] Lead/lag Transition tap number (2)
2420 23:53:38.848473 3 6 0 |4646 403 |(0 0)(11 11) |(0 0)(0 0)| 0
2421 23:53:38.851777 [Byte 0]First pass (3, 6, 0)
2422 23:53:38.855389 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2423 23:53:38.858739 [Byte 1]First pass (3, 6, 4)
2424 23:53:38.862340 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2425 23:53:38.865587 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2426 23:53:38.871984 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2427 23:53:38.875980 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2428 23:53:38.878846 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2429 23:53:38.882572 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2430 23:53:38.885520 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2431 23:53:38.892305 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2432 23:53:38.895523 All bytes gating window > 1UI, Early break!
2433 23:53:38.895610
2434 23:53:38.899063 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
2435 23:53:38.899149
2436 23:53:38.902725 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
2437 23:53:38.902811
2438 23:53:38.902899
2439 23:53:38.902988
2440 23:53:38.905495 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
2441 23:53:38.905582
2442 23:53:38.912657 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
2443 23:53:38.912774
2444 23:53:38.912859
2445 23:53:38.912922 Write Rank0 MR1 =0x56
2446 23:53:38.912982
2447 23:53:38.915924 best RODT dly(2T, 0.5T) = (2, 2)
2448 23:53:38.916009
2449 23:53:38.918886 best RODT dly(2T, 0.5T) = (2, 2)
2450 23:53:38.918982 ==
2451 23:53:38.926201 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2452 23:53:38.929325 fsp= 1, odt_onoff= 1, Byte mode= 0
2453 23:53:38.929410 ==
2454 23:53:38.932653 Start DQ dly to find pass range UseTestEngine =0
2455 23:53:38.935830 x-axis: bit #, y-axis: DQ dly (-127~63)
2456 23:53:38.935916 RX Vref Scan = 0
2457 23:53:38.939124 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2458 23:53:38.942799 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2459 23:53:38.945843 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2460 23:53:38.949321 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2461 23:53:38.952433 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2462 23:53:38.956281 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2463 23:53:38.959481 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2464 23:53:38.959568 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2465 23:53:38.962605 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2466 23:53:38.965799 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2467 23:53:38.969773 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2468 23:53:38.972804 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2469 23:53:38.975916 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2470 23:53:38.979892 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2471 23:53:38.983008 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2472 23:53:38.986214 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2473 23:53:38.986301 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2474 23:53:38.989431 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2475 23:53:38.992913 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2476 23:53:38.995995 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2477 23:53:38.999840 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2478 23:53:39.002874 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2479 23:53:39.002974 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2480 23:53:39.005985 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2481 23:53:39.009738 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2482 23:53:39.012942 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2483 23:53:39.016021 0, [0] xxxoxxxx xxxxxxxx [MSB]
2484 23:53:39.019554 1, [0] xxooxxxx xxxxxxxo [MSB]
2485 23:53:39.019648 2, [0] xxooxxxo xxxxxxxo [MSB]
2486 23:53:39.023207 3, [0] xxoooxxo oooxxoxo [MSB]
2487 23:53:39.026633 4, [0] xxoooxxo oooxxoxo [MSB]
2488 23:53:39.029533 5, [0] xxoooxxo oooooooo [MSB]
2489 23:53:39.032790 6, [0] xooooxxo oooooooo [MSB]
2490 23:53:39.036165 7, [0] xoooooxo oooooooo [MSB]
2491 23:53:39.036250 8, [0] ooooooxo oooooooo [MSB]
2492 23:53:39.039863 32, [0] ooxxoooo oooooooo [MSB]
2493 23:53:39.042933 33, [0] ooxxoooo ooooooox [MSB]
2494 23:53:39.046090 34, [0] ooxxoooo ooooooox [MSB]
2495 23:53:39.049672 35, [0] ooxxxooo ooxoooox [MSB]
2496 23:53:39.053077 36, [0] ooxxxoox xoxoooox [MSB]
2497 23:53:39.056700 37, [0] ooxxxoox xxxxoxxx [MSB]
2498 23:53:39.056785 38, [0] ooxxxoox xxxxoxxx [MSB]
2499 23:53:39.059808 39, [0] ooxxxoox xxxxxxxx [MSB]
2500 23:53:39.063312 40, [0] xxxxxoox xxxxxxxx [MSB]
2501 23:53:39.066541 41, [0] xxxxxxxx xxxxxxxx [MSB]
2502 23:53:39.069711 iDelay=41, Bit 0, Center 23 (8 ~ 39) 32
2503 23:53:39.072673 iDelay=41, Bit 1, Center 22 (6 ~ 39) 34
2504 23:53:39.076395 iDelay=41, Bit 2, Center 16 (1 ~ 31) 31
2505 23:53:39.079511 iDelay=41, Bit 3, Center 15 (0 ~ 31) 32
2506 23:53:39.082734 iDelay=41, Bit 4, Center 18 (3 ~ 34) 32
2507 23:53:39.086740 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2508 23:53:39.089597 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
2509 23:53:39.092806 iDelay=41, Bit 7, Center 18 (2 ~ 35) 34
2510 23:53:39.099939 iDelay=41, Bit 8, Center 19 (3 ~ 35) 33
2511 23:53:39.103006 iDelay=41, Bit 9, Center 19 (3 ~ 36) 34
2512 23:53:39.106092 iDelay=41, Bit 10, Center 18 (3 ~ 34) 32
2513 23:53:39.109953 iDelay=41, Bit 11, Center 20 (5 ~ 36) 32
2514 23:53:39.113057 iDelay=41, Bit 12, Center 21 (5 ~ 38) 34
2515 23:53:39.116300 iDelay=41, Bit 13, Center 19 (3 ~ 36) 34
2516 23:53:39.119400 iDelay=41, Bit 14, Center 20 (5 ~ 36) 32
2517 23:53:39.123299 iDelay=41, Bit 15, Center 16 (1 ~ 32) 32
2518 23:53:39.123375 ==
2519 23:53:39.129557 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2520 23:53:39.133506 fsp= 1, odt_onoff= 1, Byte mode= 0
2521 23:53:39.133583 ==
2522 23:53:39.133646 DQS Delay:
2523 23:53:39.136457 DQS0 = 0, DQS1 = 0
2524 23:53:39.136558 DQM Delay:
2525 23:53:39.136637 DQM0 = 19, DQM1 = 19
2526 23:53:39.139481 DQ Delay:
2527 23:53:39.142708 DQ0 =23, DQ1 =22, DQ2 =16, DQ3 =15
2528 23:53:39.145953 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =18
2529 23:53:39.149857 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =20
2530 23:53:39.152880 DQ12 =21, DQ13 =19, DQ14 =20, DQ15 =16
2531 23:53:39.152978
2532 23:53:39.153067
2533 23:53:39.153153 DramC Write-DBI off
2534 23:53:39.153238 ==
2535 23:53:39.159524 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2536 23:53:39.163115 fsp= 1, odt_onoff= 1, Byte mode= 0
2537 23:53:39.163189 ==
2538 23:53:39.166502 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2539 23:53:39.166589
2540 23:53:39.169975 Begin, DQ Scan Range 927~1183
2541 23:53:39.170058
2542 23:53:39.170124
2543 23:53:39.173481 TX Vref Scan disable
2544 23:53:39.176330 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2545 23:53:39.179701 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2546 23:53:39.182802 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2547 23:53:39.185980 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2548 23:53:39.189972 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2549 23:53:39.193226 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2550 23:53:39.196188 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2551 23:53:39.199934 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2552 23:53:39.203191 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2553 23:53:39.205899 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2554 23:53:39.209785 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2555 23:53:39.212739 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2556 23:53:39.216487 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2557 23:53:39.222664 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2558 23:53:39.226213 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2559 23:53:39.229307 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2560 23:53:39.233136 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2561 23:53:39.236229 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2562 23:53:39.239624 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2563 23:53:39.243257 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2564 23:53:39.245987 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2565 23:53:39.249511 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2566 23:53:39.252780 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2567 23:53:39.256556 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2568 23:53:39.259390 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2569 23:53:39.262931 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2570 23:53:39.266213 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2571 23:53:39.269645 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2572 23:53:39.273097 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2573 23:53:39.276395 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2574 23:53:39.279462 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2575 23:53:39.286329 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2576 23:53:39.289252 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2577 23:53:39.292927 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2578 23:53:39.296234 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2579 23:53:39.299348 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2580 23:53:39.302601 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2581 23:53:39.306374 964 |3 6 4|[0] xxxxxxxx xxxxxxxo [MSB]
2582 23:53:39.309396 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]
2583 23:53:39.312538 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
2584 23:53:39.316094 967 |3 6 7|[0] xxxxxxxx ooxxxxxo [MSB]
2585 23:53:39.319357 968 |3 6 8|[0] xxxxxxxx oooxxxoo [MSB]
2586 23:53:39.322529 969 |3 6 9|[0] xxxxxxxx oooooxoo [MSB]
2587 23:53:39.326202 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
2588 23:53:39.329355 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
2589 23:53:39.332694 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2590 23:53:39.335848 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
2591 23:53:39.339501 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
2592 23:53:39.342752 975 |3 6 15|[0] xxooxxxx oooooooo [MSB]
2593 23:53:39.346194 976 |3 6 16|[0] xooooxxo oooooooo [MSB]
2594 23:53:39.352321 977 |3 6 17|[0] ooooooxo oooooooo [MSB]
2595 23:53:39.356301 989 |3 6 29|[0] oooooooo ooooooox [MSB]
2596 23:53:39.359260 990 |3 6 30|[0] oooooooo oxooooox [MSB]
2597 23:53:39.362519 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2598 23:53:39.366166 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2599 23:53:39.368908 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2600 23:53:39.372154 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2601 23:53:39.379069 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
2602 23:53:39.382710 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
2603 23:53:39.385560 997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB]
2604 23:53:39.389132 998 |3 6 38|[0] ooxxooox xxxxxxxx [MSB]
2605 23:53:39.392365 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2606 23:53:39.395934 Byte0, DQ PI dly=986, DQM PI dly= 986
2607 23:53:39.398772 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
2608 23:53:39.398870
2609 23:53:39.405514 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
2610 23:53:39.405619
2611 23:53:39.408639 Byte1, DQ PI dly=978, DQM PI dly= 978
2612 23:53:39.412544 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2613 23:53:39.412624
2614 23:53:39.415603 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2615 23:53:39.415704
2616 23:53:39.415794 ==
2617 23:53:39.422520 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2618 23:53:39.425315 fsp= 1, odt_onoff= 1, Byte mode= 0
2619 23:53:39.425395 ==
2620 23:53:39.428999 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2621 23:53:39.429098
2622 23:53:39.432146 Begin, DQ Scan Range 954~1018
2623 23:53:39.435334 Write Rank0 MR14 =0x0
2624 23:53:39.442829
2625 23:53:39.442912 CH=1, VrefRange= 0, VrefLevel = 0
2626 23:53:39.449635 TX Bit0 (979~998) 20 988, Bit8 (969~985) 17 977,
2627 23:53:39.452878 TX Bit1 (978~996) 19 987, Bit9 (969~985) 17 977,
2628 23:53:39.459301 TX Bit2 (977~992) 16 984, Bit10 (970~985) 16 977,
2629 23:53:39.463077 TX Bit3 (975~990) 16 982, Bit11 (971~988) 18 979,
2630 23:53:39.466212 TX Bit4 (978~993) 16 985, Bit12 (970~988) 19 979,
2631 23:53:39.472542 TX Bit5 (978~998) 21 988, Bit13 (972~988) 17 980,
2632 23:53:39.476116 TX Bit6 (980~998) 19 989, Bit14 (971~986) 16 978,
2633 23:53:39.479406 TX Bit7 (978~992) 15 985, Bit15 (967~985) 19 976,
2634 23:53:39.479485
2635 23:53:39.482522 Write Rank0 MR14 =0x2
2636 23:53:39.491800
2637 23:53:39.491903 CH=1, VrefRange= 0, VrefLevel = 2
2638 23:53:39.498533 TX Bit0 (979~998) 20 988, Bit8 (969~985) 17 977,
2639 23:53:39.501499 TX Bit1 (978~997) 20 987, Bit9 (969~985) 17 977,
2640 23:53:39.508229 TX Bit2 (977~992) 16 984, Bit10 (969~986) 18 977,
2641 23:53:39.511655 TX Bit3 (975~990) 16 982, Bit11 (971~989) 19 980,
2642 23:53:39.514935 TX Bit4 (977~994) 18 985, Bit12 (970~989) 20 979,
2643 23:53:39.521464 TX Bit5 (978~998) 21 988, Bit13 (972~988) 17 980,
2644 23:53:39.525146 TX Bit6 (979~998) 20 988, Bit14 (970~987) 18 978,
2645 23:53:39.528311 TX Bit7 (977~992) 16 984, Bit15 (967~985) 19 976,
2646 23:53:39.528412
2647 23:53:39.531980 Write Rank0 MR14 =0x4
2648 23:53:39.541124
2649 23:53:39.541203 CH=1, VrefRange= 0, VrefLevel = 4
2650 23:53:39.547585 TX Bit0 (978~999) 22 988, Bit8 (968~986) 19 977,
2651 23:53:39.550728 TX Bit1 (977~997) 21 987, Bit9 (968~986) 19 977,
2652 23:53:39.557519 TX Bit2 (977~993) 17 985, Bit10 (969~986) 18 977,
2653 23:53:39.560649 TX Bit3 (975~991) 17 983, Bit11 (970~989) 20 979,
2654 23:53:39.563844 TX Bit4 (977~995) 19 986, Bit12 (970~990) 21 980,
2655 23:53:39.570718 TX Bit5 (978~998) 21 988, Bit13 (971~989) 19 980,
2656 23:53:39.573892 TX Bit6 (979~998) 20 988, Bit14 (970~987) 18 978,
2657 23:53:39.577772 TX Bit7 (977~993) 17 985, Bit15 (966~985) 20 975,
2658 23:53:39.577873
2659 23:53:39.580819 Write Rank0 MR14 =0x6
2660 23:53:39.589845
2661 23:53:39.589920 CH=1, VrefRange= 0, VrefLevel = 6
2662 23:53:39.596530 TX Bit0 (978~999) 22 988, Bit8 (968~986) 19 977,
2663 23:53:39.599675 TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977,
2664 23:53:39.606508 TX Bit2 (976~993) 18 984, Bit10 (969~987) 19 978,
2665 23:53:39.609569 TX Bit3 (975~991) 17 983, Bit11 (970~990) 21 980,
2666 23:53:39.613112 TX Bit4 (977~995) 19 986, Bit12 (969~990) 22 979,
2667 23:53:39.619701 TX Bit5 (978~998) 21 988, Bit13 (971~990) 20 980,
2668 23:53:39.623208 TX Bit6 (979~998) 20 988, Bit14 (970~988) 19 979,
2669 23:53:39.626584 TX Bit7 (977~994) 18 985, Bit15 (966~986) 21 976,
2670 23:53:39.626673
2671 23:53:39.629609 Write Rank0 MR14 =0x8
2672 23:53:39.638833
2673 23:53:39.638914 CH=1, VrefRange= 0, VrefLevel = 8
2674 23:53:39.645287 TX Bit0 (978~999) 22 988, Bit8 (968~987) 20 977,
2675 23:53:39.648754 TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977,
2676 23:53:39.655411 TX Bit2 (976~994) 19 985, Bit10 (969~988) 20 978,
2677 23:53:39.658663 TX Bit3 (974~992) 19 983, Bit11 (970~990) 21 980,
2678 23:53:39.662432 TX Bit4 (977~996) 20 986, Bit12 (969~990) 22 979,
2679 23:53:39.668771 TX Bit5 (978~999) 22 988, Bit13 (970~990) 21 980,
2680 23:53:39.672123 TX Bit6 (979~999) 21 989, Bit14 (969~988) 20 978,
2681 23:53:39.675229 TX Bit7 (977~994) 18 985, Bit15 (966~986) 21 976,
2682 23:53:39.675303
2683 23:53:39.679129 Write Rank0 MR14 =0xa
2684 23:53:39.688008
2685 23:53:39.691206 CH=1, VrefRange= 0, VrefLevel = 10
2686 23:53:39.694747 TX Bit0 (978~999) 22 988, Bit8 (968~988) 21 978,
2687 23:53:39.697787 TX Bit1 (977~998) 22 987, Bit9 (968~988) 21 978,
2688 23:53:39.704385 TX Bit2 (976~994) 19 985, Bit10 (968~988) 21 978,
2689 23:53:39.707571 TX Bit3 (974~992) 19 983, Bit11 (970~991) 22 980,
2690 23:53:39.711007 TX Bit4 (977~997) 21 987, Bit12 (969~991) 23 980,
2691 23:53:39.718003 TX Bit5 (978~999) 22 988, Bit13 (970~991) 22 980,
2692 23:53:39.721148 TX Bit6 (978~999) 22 988, Bit14 (969~990) 22 979,
2693 23:53:39.724244 TX Bit7 (976~995) 20 985, Bit15 (966~987) 22 976,
2694 23:53:39.724375
2695 23:53:39.728033 Write Rank0 MR14 =0xc
2696 23:53:39.737034
2697 23:53:39.740733 CH=1, VrefRange= 0, VrefLevel = 12
2698 23:53:39.744076 TX Bit0 (978~1000) 23 989, Bit8 (968~988) 21 978,
2699 23:53:39.746871 TX Bit1 (977~998) 22 987, Bit9 (968~988) 21 978,
2700 23:53:39.753733 TX Bit2 (976~995) 20 985, Bit10 (968~989) 22 978,
2701 23:53:39.757314 TX Bit3 (973~993) 21 983, Bit11 (969~991) 23 980,
2702 23:53:39.760627 TX Bit4 (976~997) 22 986, Bit12 (969~991) 23 980,
2703 23:53:39.767459 TX Bit5 (977~999) 23 988, Bit13 (970~991) 22 980,
2704 23:53:39.770615 TX Bit6 (979~999) 21 989, Bit14 (969~990) 22 979,
2705 23:53:39.773855 TX Bit7 (976~995) 20 985, Bit15 (965~987) 23 976,
2706 23:53:39.773930
2707 23:53:39.777049 Write Rank0 MR14 =0xe
2708 23:53:39.786666
2709 23:53:39.789795 CH=1, VrefRange= 0, VrefLevel = 14
2710 23:53:39.792957 TX Bit0 (978~1000) 23 989, Bit8 (967~989) 23 978,
2711 23:53:39.796193 TX Bit1 (976~999) 24 987, Bit9 (967~989) 23 978,
2712 23:53:39.803094 TX Bit2 (976~996) 21 986, Bit10 (968~990) 23 979,
2713 23:53:39.806363 TX Bit3 (973~993) 21 983, Bit11 (969~991) 23 980,
2714 23:53:39.809627 TX Bit4 (976~998) 23 987, Bit12 (969~991) 23 980,
2715 23:53:39.816525 TX Bit5 (977~999) 23 988, Bit13 (969~991) 23 980,
2716 23:53:39.819570 TX Bit6 (978~999) 22 988, Bit14 (969~990) 22 979,
2717 23:53:39.826332 TX Bit7 (976~996) 21 986, Bit15 (965~987) 23 976,
2718 23:53:39.826447
2719 23:53:39.826575 Write Rank0 MR14 =0x10
2720 23:53:39.836036
2721 23:53:39.839519 CH=1, VrefRange= 0, VrefLevel = 16
2722 23:53:39.842602 TX Bit0 (978~1000) 23 989, Bit8 (967~990) 24 978,
2723 23:53:39.846162 TX Bit1 (976~999) 24 987, Bit9 (967~989) 23 978,
2724 23:53:39.852883 TX Bit2 (975~996) 22 985, Bit10 (968~990) 23 979,
2725 23:53:39.856049 TX Bit3 (972~994) 23 983, Bit11 (969~991) 23 980,
2726 23:53:39.859388 TX Bit4 (976~998) 23 987, Bit12 (969~991) 23 980,
2727 23:53:39.866338 TX Bit5 (977~1000) 24 988, Bit13 (969~991) 23 980,
2728 23:53:39.869149 TX Bit6 (978~1000) 23 989, Bit14 (968~991) 24 979,
2729 23:53:39.872722 TX Bit7 (976~997) 22 986, Bit15 (965~988) 24 976,
2730 23:53:39.876090
2731 23:53:39.876162 Write Rank0 MR14 =0x12
2732 23:53:39.885480
2733 23:53:39.889355 CH=1, VrefRange= 0, VrefLevel = 18
2734 23:53:39.892329 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
2735 23:53:39.895446 TX Bit1 (976~999) 24 987, Bit9 (967~990) 24 978,
2736 23:53:39.902445 TX Bit2 (975~997) 23 986, Bit10 (968~991) 24 979,
2737 23:53:39.905646 TX Bit3 (972~994) 23 983, Bit11 (969~992) 24 980,
2738 23:53:39.908832 TX Bit4 (976~998) 23 987, Bit12 (969~992) 24 980,
2739 23:53:39.915872 TX Bit5 (977~1000) 24 988, Bit13 (969~991) 23 980,
2740 23:53:39.918938 TX Bit6 (978~1000) 23 989, Bit14 (969~991) 23 980,
2741 23:53:39.922361 TX Bit7 (976~997) 22 986, Bit15 (964~988) 25 976,
2742 23:53:39.925804
2743 23:53:39.925889 Write Rank0 MR14 =0x14
2744 23:53:39.936019
2745 23:53:39.939118 CH=1, VrefRange= 0, VrefLevel = 20
2746 23:53:39.942333 TX Bit0 (977~1001) 25 989, Bit8 (967~991) 25 979,
2747 23:53:39.945571 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
2748 23:53:39.952216 TX Bit2 (974~997) 24 985, Bit10 (968~991) 24 979,
2749 23:53:39.955372 TX Bit3 (972~995) 24 983, Bit11 (969~992) 24 980,
2750 23:53:39.958683 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2751 23:53:39.965533 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2752 23:53:39.968538 TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979,
2753 23:53:39.975158 TX Bit7 (976~998) 23 987, Bit15 (964~989) 26 976,
2754 23:53:39.975268
2755 23:53:39.975359 Write Rank0 MR14 =0x16
2756 23:53:39.985672
2757 23:53:39.985750 CH=1, VrefRange= 0, VrefLevel = 22
2758 23:53:39.992033 TX Bit0 (977~1001) 25 989, Bit8 (966~991) 26 978,
2759 23:53:39.995703 TX Bit1 (976~1000) 25 988, Bit9 (966~991) 26 978,
2760 23:53:40.001904 TX Bit2 (974~997) 24 985, Bit10 (967~991) 25 979,
2761 23:53:40.005600 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2762 23:53:40.008868 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2763 23:53:40.015411 TX Bit5 (977~1001) 25 989, Bit13 (969~991) 23 980,
2764 23:53:40.018754 TX Bit6 (977~1001) 25 989, Bit14 (968~991) 24 979,
2765 23:53:40.022401 TX Bit7 (975~998) 24 986, Bit15 (963~988) 26 975,
2766 23:53:40.025475
2767 23:53:40.025552 Write Rank0 MR14 =0x18
2768 23:53:40.035448
2769 23:53:40.035564 CH=1, VrefRange= 0, VrefLevel = 24
2770 23:53:40.041946 TX Bit0 (977~1002) 26 989, Bit8 (966~991) 26 978,
2771 23:53:40.045950 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
2772 23:53:40.052131 TX Bit2 (973~998) 26 985, Bit10 (967~991) 25 979,
2773 23:53:40.055215 TX Bit3 (971~995) 25 983, Bit11 (968~992) 25 980,
2774 23:53:40.059043 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2775 23:53:40.065253 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2776 23:53:40.068977 TX Bit6 (977~1002) 26 989, Bit14 (968~991) 24 979,
2777 23:53:40.075375 TX Bit7 (975~998) 24 986, Bit15 (963~988) 26 975,
2778 23:53:40.075482
2779 23:53:40.075577 Write Rank0 MR14 =0x1a
2780 23:53:40.085315
2781 23:53:40.088633 CH=1, VrefRange= 0, VrefLevel = 26
2782 23:53:40.092243 TX Bit0 (977~1002) 26 989, Bit8 (966~991) 26 978,
2783 23:53:40.095251 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
2784 23:53:40.102289 TX Bit2 (973~998) 26 985, Bit10 (967~991) 25 979,
2785 23:53:40.105453 TX Bit3 (971~995) 25 983, Bit11 (968~992) 25 980,
2786 23:53:40.108705 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2787 23:53:40.115938 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2788 23:53:40.118973 TX Bit6 (977~1002) 26 989, Bit14 (968~991) 24 979,
2789 23:53:40.122180 TX Bit7 (975~998) 24 986, Bit15 (963~988) 26 975,
2790 23:53:40.125509
2791 23:53:40.125609 Write Rank0 MR14 =0x1c
2792 23:53:40.135383
2793 23:53:40.139045 CH=1, VrefRange= 0, VrefLevel = 28
2794 23:53:40.141996 TX Bit0 (977~1002) 26 989, Bit8 (966~991) 26 978,
2795 23:53:40.145715 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
2796 23:53:40.152173 TX Bit2 (973~998) 26 985, Bit10 (967~991) 25 979,
2797 23:53:40.155540 TX Bit3 (971~995) 25 983, Bit11 (968~992) 25 980,
2798 23:53:40.158620 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2799 23:53:40.165521 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2800 23:53:40.168518 TX Bit6 (977~1002) 26 989, Bit14 (968~991) 24 979,
2801 23:53:40.175361 TX Bit7 (975~998) 24 986, Bit15 (963~988) 26 975,
2802 23:53:40.175466
2803 23:53:40.175559 Write Rank0 MR14 =0x1e
2804 23:53:40.185125
2805 23:53:40.188280 CH=1, VrefRange= 0, VrefLevel = 30
2806 23:53:40.191988 TX Bit0 (977~1002) 26 989, Bit8 (966~991) 26 978,
2807 23:53:40.195040 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
2808 23:53:40.201667 TX Bit2 (973~998) 26 985, Bit10 (967~991) 25 979,
2809 23:53:40.204972 TX Bit3 (971~995) 25 983, Bit11 (968~992) 25 980,
2810 23:53:40.208792 TX Bit4 (975~999) 25 987, Bit12 (968~992) 25 980,
2811 23:53:40.215090 TX Bit5 (976~1000) 25 988, Bit13 (969~991) 23 980,
2812 23:53:40.218342 TX Bit6 (977~1002) 26 989, Bit14 (968~991) 24 979,
2813 23:53:40.225374 TX Bit7 (975~998) 24 986, Bit15 (963~988) 26 975,
2814 23:53:40.225453
2815 23:53:40.225517
2816 23:53:40.228450 TX Vref found, early break! 377< 380
2817 23:53:40.231612 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2818 23:53:40.234962 u1DelayCellOfst[0]=7 cells (6 PI)
2819 23:53:40.238032 u1DelayCellOfst[1]=6 cells (5 PI)
2820 23:53:40.241407 u1DelayCellOfst[2]=2 cells (2 PI)
2821 23:53:40.244873 u1DelayCellOfst[3]=0 cells (0 PI)
2822 23:53:40.248376 u1DelayCellOfst[4]=5 cells (4 PI)
2823 23:53:40.251720 u1DelayCellOfst[5]=6 cells (5 PI)
2824 23:53:40.251823 u1DelayCellOfst[6]=7 cells (6 PI)
2825 23:53:40.255197 u1DelayCellOfst[7]=3 cells (3 PI)
2826 23:53:40.258263 Byte0, DQ PI dly=983, DQM PI dly= 986
2827 23:53:40.265308 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2828 23:53:40.265408
2829 23:53:40.268145 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2830 23:53:40.268262
2831 23:53:40.272191 u1DelayCellOfst[8]=3 cells (3 PI)
2832 23:53:40.275330 u1DelayCellOfst[9]=3 cells (3 PI)
2833 23:53:40.278313 u1DelayCellOfst[10]=5 cells (4 PI)
2834 23:53:40.281539 u1DelayCellOfst[11]=6 cells (5 PI)
2835 23:53:40.285102 u1DelayCellOfst[12]=6 cells (5 PI)
2836 23:53:40.288204 u1DelayCellOfst[13]=6 cells (5 PI)
2837 23:53:40.288281 u1DelayCellOfst[14]=5 cells (4 PI)
2838 23:53:40.291865 u1DelayCellOfst[15]=0 cells (0 PI)
2839 23:53:40.295048 Byte1, DQ PI dly=975, DQM PI dly= 977
2840 23:53:40.301602 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
2841 23:53:40.301684
2842 23:53:40.305099 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
2843 23:53:40.305201
2844 23:53:40.308545 Write Rank0 MR14 =0x18
2845 23:53:40.308620
2846 23:53:40.308684 Final TX Range 0 Vref 24
2847 23:53:40.308745
2848 23:53:40.314931 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2849 23:53:40.315014
2850 23:53:40.321975 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2851 23:53:40.331591 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2852 23:53:40.338655 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2853 23:53:40.338737 Write Rank0 MR3 =0xb0
2854 23:53:40.341612 DramC Write-DBI on
2855 23:53:40.341712 ==
2856 23:53:40.345428 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2857 23:53:40.348394 fsp= 1, odt_onoff= 1, Byte mode= 0
2858 23:53:40.348466 ==
2859 23:53:40.355013 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2860 23:53:40.355093
2861 23:53:40.355158 Begin, DQ Scan Range 697~761
2862 23:53:40.358047
2863 23:53:40.358123
2864 23:53:40.358192 TX Vref Scan disable
2865 23:53:40.361601 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2866 23:53:40.365437 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2867 23:53:40.368630 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2868 23:53:40.371900 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2869 23:53:40.375019 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2870 23:53:40.378142 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2871 23:53:40.384908 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2872 23:53:40.388148 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2873 23:53:40.391593 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2874 23:53:40.395346 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2875 23:53:40.398355 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
2876 23:53:40.401529 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
2877 23:53:40.405311 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2878 23:53:40.408513 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2879 23:53:40.411604 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2880 23:53:40.415150 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2881 23:53:40.418745 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2882 23:53:40.421667 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2883 23:53:40.424717 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2884 23:53:40.428138 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2885 23:53:40.431886 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2886 23:53:40.435191 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2887 23:53:40.443287 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2888 23:53:40.446381 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2889 23:53:40.449655 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2890 23:53:40.453269 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2891 23:53:40.456415 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2892 23:53:40.460025 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2893 23:53:40.463303 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2894 23:53:40.466785 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2895 23:53:40.470308 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2896 23:53:40.473493 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
2897 23:53:40.476920 Byte0, DQ PI dly=731, DQM PI dly= 731
2898 23:53:40.480085 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
2899 23:53:40.480216
2900 23:53:40.486648 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
2901 23:53:40.486725
2902 23:53:40.489883 Byte1, DQ PI dly=721, DQM PI dly= 721
2903 23:53:40.493417 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
2904 23:53:40.493516
2905 23:53:40.496720 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
2906 23:53:40.496798
2907 23:53:40.503286 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2908 23:53:40.510446 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2909 23:53:40.520080 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2910 23:53:40.520188 Write Rank0 MR3 =0x30
2911 23:53:40.523500 DramC Write-DBI off
2912 23:53:40.523603
2913 23:53:40.523710 [DATLAT]
2914 23:53:40.526655 Freq=1600, CH1 RK0, use_rxtx_scan=0
2915 23:53:40.526766
2916 23:53:40.530579 DATLAT Default: 0xf
2917 23:53:40.530681 7, 0xFFFF, sum=0
2918 23:53:40.533502 8, 0xFFFF, sum=0
2919 23:53:40.533602 9, 0xFFFF, sum=0
2920 23:53:40.537052 10, 0xFFFF, sum=0
2921 23:53:40.537159 11, 0xFFFF, sum=0
2922 23:53:40.537252 12, 0xFFFF, sum=0
2923 23:53:40.539968 13, 0xFFFF, sum=0
2924 23:53:40.540050 14, 0x0, sum=1
2925 23:53:40.543216 15, 0x0, sum=2
2926 23:53:40.543294 16, 0x0, sum=3
2927 23:53:40.546923 17, 0x0, sum=4
2928 23:53:40.549902 pattern=2 first_step=14 total pass=5 best_step=16
2929 23:53:40.550025 ==
2930 23:53:40.557152 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2931 23:53:40.557240 fsp= 1, odt_onoff= 1, Byte mode= 0
2932 23:53:40.560467 ==
2933 23:53:40.563760 Start DQ dly to find pass range UseTestEngine =1
2934 23:53:40.567100 x-axis: bit #, y-axis: DQ dly (-127~63)
2935 23:53:40.567179 RX Vref Scan = 1
2936 23:53:40.690771
2937 23:53:40.690897 RX Vref found, early break!
2938 23:53:40.690996
2939 23:53:40.697053 Final RX Vref 13, apply to both rank0 and 1
2940 23:53:40.697159 ==
2941 23:53:40.700714 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2942 23:53:40.703967 fsp= 1, odt_onoff= 1, Byte mode= 0
2943 23:53:40.704041 ==
2944 23:53:40.704103 DQS Delay:
2945 23:53:40.707056 DQS0 = 0, DQS1 = 0
2946 23:53:40.707126 DQM Delay:
2947 23:53:40.710709 DQM0 = 20, DQM1 = 18
2948 23:53:40.710799 DQ Delay:
2949 23:53:40.713788 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2950 23:53:40.717553 DQ4 =18, DQ5 =24, DQ6 =25, DQ7 =19
2951 23:53:40.720846 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19
2952 23:53:40.723956 DQ12 =20, DQ13 =19, DQ14 =19, DQ15 =17
2953 23:53:40.724071
2954 23:53:40.724158
2955 23:53:40.724217
2956 23:53:40.727127 [DramC_TX_OE_Calibration] TA2
2957 23:53:40.730780 Original DQ_B0 (3 6) =30, OEN = 27
2958 23:53:40.733886 Original DQ_B1 (3 6) =30, OEN = 27
2959 23:53:40.737595 23, 0x0, End_B0=23 End_B1=23
2960 23:53:40.737683 24, 0x0, End_B0=24 End_B1=24
2961 23:53:40.740605 25, 0x0, End_B0=25 End_B1=25
2962 23:53:40.744229 26, 0x0, End_B0=26 End_B1=26
2963 23:53:40.747349 27, 0x0, End_B0=27 End_B1=27
2964 23:53:40.747428 28, 0x0, End_B0=28 End_B1=28
2965 23:53:40.750320 29, 0x0, End_B0=29 End_B1=29
2966 23:53:40.754179 30, 0x0, End_B0=30 End_B1=30
2967 23:53:40.757346 31, 0xFFFF, End_B0=30 End_B1=30
2968 23:53:40.760439 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2969 23:53:40.767735 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2970 23:53:40.767813
2971 23:53:40.767877
2972 23:53:40.770670 Write Rank0 MR23 =0x3f
2973 23:53:40.770766 [DQSOSC]
2974 23:53:40.777236 [DQSOSCAuto] RK0, (LSB)MR18= 0xbb, (MSB)MR19= 0x3, tDQSOscB0 = 329 ps tDQSOscB1 = 0 ps
2975 23:53:40.783904 CH1_RK0: MR19=0x3, MR18=0xBB, DQSOSC=329, MR23=63, INC=22, DEC=34
2976 23:53:40.787042 Write Rank0 MR23 =0x3f
2977 23:53:40.787117 [DQSOSC]
2978 23:53:40.793807 [DQSOSCAuto] RK0, (LSB)MR18= 0xbd, (MSB)MR19= 0x3, tDQSOscB0 = 329 ps tDQSOscB1 = 0 ps
2979 23:53:40.796937 CH1 RK0: MR19=3, MR18=BD
2980 23:53:40.800667 [RankSwap] Rank num 2, (Multi 1), Rank 1
2981 23:53:40.803975 Write Rank0 MR2 =0xad
2982 23:53:40.804058 [Write Leveling]
2983 23:53:40.806840 delay byte0 byte1 byte2 byte3
2984 23:53:40.806940
2985 23:53:40.810576 10 0 0
2986 23:53:40.810649 11 0 0
2987 23:53:40.810710 12 0 0
2988 23:53:40.814246 13 0 0
2989 23:53:40.814321 14 0 0
2990 23:53:40.817166 15 0 0
2991 23:53:40.817289 16 0 0
2992 23:53:40.817397 17 0 0
2993 23:53:40.820302 18 0 0
2994 23:53:40.820374 19 0 0
2995 23:53:40.824010 20 0 0
2996 23:53:40.824105 21 0 0
2997 23:53:40.824195 22 0 0
2998 23:53:40.827139 23 0 0
2999 23:53:40.827235 24 0 0
3000 23:53:40.830456 25 0 0
3001 23:53:40.830530 26 0 0
3002 23:53:40.833557 27 0 0
3003 23:53:40.833657 28 0 0
3004 23:53:40.833747 29 0 0
3005 23:53:40.837309 30 0 0
3006 23:53:40.837384 31 0 0
3007 23:53:40.840275 32 0 ff
3008 23:53:40.840356 33 0 ff
3009 23:53:40.843805 34 ff ff
3010 23:53:40.843883 35 0 ff
3011 23:53:40.843946 36 ff ff
3012 23:53:40.846934 37 ff ff
3013 23:53:40.847004 38 ff ff
3014 23:53:40.850607 39 ff ff
3015 23:53:40.850677 40 ff ff
3016 23:53:40.853767 41 ff ff
3017 23:53:40.853838 42 ff ff
3018 23:53:40.857437 pass bytecount = 0xff (0xff: all bytes pass)
3019 23:53:40.860240
3020 23:53:40.860318 DQS0 dly: 36
3021 23:53:40.860381 DQS1 dly: 32
3022 23:53:40.864130 Write Rank0 MR2 =0x2d
3023 23:53:40.867292 [RankSwap] Rank num 2, (Multi 1), Rank 0
3024 23:53:40.870505 Write Rank1 MR1 =0xd6
3025 23:53:40.870579 [Gating]
3026 23:53:40.870641 ==
3027 23:53:40.873509 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3028 23:53:40.877399 fsp= 1, odt_onoff= 1, Byte mode= 0
3029 23:53:40.877472 ==
3030 23:53:40.883464 3 1 0 |f0e 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3031 23:53:40.887076 3 1 4 |2120 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3032 23:53:40.890848 3 1 8 |1717 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3033 23:53:40.897212 3 1 12 |302f 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3034 23:53:40.900405 3 1 16 |1110 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3035 23:53:40.904019 3 1 20 |3030 3534 |(10 10)(11 11) |(1 0)(0 1)| 0
3036 23:53:40.907124 3 1 24 |2c2c 3534 |(0 0)(11 11) |(0 0)(0 1)| 0
3037 23:53:40.913605 3 1 28 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
3038 23:53:40.917244 3 2 0 |3534 706 |(11 11)(11 11) |(1 1)(1 1)| 0
3039 23:53:40.920768 3 2 4 |2323 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3040 23:53:40.927514 3 2 8 |3535 3d3d |(0 0)(11 11) |(0 0)(1 1)| 0
3041 23:53:40.930685 3 2 12 |3636 3d3d |(0 0)(11 11) |(0 0)(1 1)| 0
3042 23:53:40.933787 3 2 16 |1c1b 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3043 23:53:40.937051 3 2 20 |3736 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3044 23:53:40.944284 3 2 24 |3535 3d3d |(0 0)(11 11) |(1 1)(1 1)| 0
3045 23:53:40.947320 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3046 23:53:40.950450 [Byte 0] Lead/lag falling Transition (3, 2, 28)
3047 23:53:40.957334 3 3 0 |2f2e 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
3048 23:53:40.960384 3 3 4 |3534 202 |(11 11)(11 11) |(0 1)(1 1)| 0
3049 23:53:40.964010 3 3 8 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3050 23:53:40.967346 [Byte 1] Lead/lag falling Transition (3, 3, 8)
3051 23:53:40.974249 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3052 23:53:40.977451 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3053 23:53:40.980570 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3054 23:53:40.987172 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3055 23:53:40.990258 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3056 23:53:40.993799 3 4 0 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
3057 23:53:41.000564 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3058 23:53:41.003864 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3059 23:53:41.006810 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3060 23:53:41.010616 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3061 23:53:41.017059 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3062 23:53:41.020722 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3063 23:53:41.023663 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3064 23:53:41.030418 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3065 23:53:41.033816 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3066 23:53:41.037122 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3067 23:53:41.043768 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3068 23:53:41.047601 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3069 23:53:41.050535 [Byte 0] Lead/lag falling Transition (3, 5, 16)
3070 23:53:41.054189 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3071 23:53:41.060426 [Byte 0] Lead/lag Transition tap number (2)
3072 23:53:41.063699 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3073 23:53:41.067345 [Byte 1] Lead/lag falling Transition (3, 5, 24)
3074 23:53:41.073597 3 5 28 |a0a 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3075 23:53:41.076742 [Byte 1] Lead/lag Transition tap number (2)
3076 23:53:41.080493 3 6 0 |4646 403 |(10 10)(11 11) |(0 0)(0 0)| 0
3077 23:53:41.083755 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3078 23:53:41.086874 [Byte 0]First pass (3, 6, 4)
3079 23:53:41.090588 [Byte 1]First pass (3, 6, 4)
3080 23:53:41.093850 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3081 23:53:41.097000 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3082 23:53:41.100405 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3083 23:53:41.107030 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3084 23:53:41.110149 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3085 23:53:41.113476 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3086 23:53:41.117062 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3087 23:53:41.120305 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3088 23:53:41.127143 All bytes gating window > 1UI, Early break!
3089 23:53:41.127225
3090 23:53:41.130264 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
3091 23:53:41.130342
3092 23:53:41.133493 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
3093 23:53:41.133566
3094 23:53:41.133628
3095 23:53:41.133706
3096 23:53:41.136985 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
3097 23:53:41.137059
3098 23:53:41.140135 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
3099 23:53:41.140229
3100 23:53:41.140291
3101 23:53:41.143793 Write Rank1 MR1 =0x56
3102 23:53:41.143869
3103 23:53:41.146637 best RODT dly(2T, 0.5T) = (2, 2)
3104 23:53:41.146713
3105 23:53:41.150645 best RODT dly(2T, 0.5T) = (2, 2)
3106 23:53:41.150732 ==
3107 23:53:41.156659 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3108 23:53:41.156749 fsp= 1, odt_onoff= 1, Byte mode= 0
3109 23:53:41.160392 ==
3110 23:53:41.163781 Start DQ dly to find pass range UseTestEngine =0
3111 23:53:41.166748 x-axis: bit #, y-axis: DQ dly (-127~63)
3112 23:53:41.166834 RX Vref Scan = 0
3113 23:53:41.170619 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3114 23:53:41.173096 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3115 23:53:41.177069 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3116 23:53:41.180183 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3117 23:53:41.183281 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3118 23:53:41.186597 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3119 23:53:41.189810 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3120 23:53:41.189921 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3121 23:53:41.193128 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3122 23:53:41.197083 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3123 23:53:41.200207 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3124 23:53:41.203503 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3125 23:53:41.207055 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3126 23:53:41.210011 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3127 23:53:41.213236 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3128 23:53:41.217125 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3129 23:53:41.217251 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3130 23:53:41.220227 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3131 23:53:41.223355 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3132 23:53:41.226660 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3133 23:53:41.229746 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3134 23:53:41.233072 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3135 23:53:41.233199 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3136 23:53:41.237007 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3137 23:53:41.240138 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3138 23:53:41.243235 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3139 23:53:41.246549 0, [0] xxooxxxx xxxxxxxo [MSB]
3140 23:53:41.250340 1, [0] xxoooxxo xxxxxxxo [MSB]
3141 23:53:41.253397 2, [0] xxoooxxo oooxxxoo [MSB]
3142 23:53:41.253532 3, [0] xxoooxxo ooooxooo [MSB]
3143 23:53:41.256655 4, [0] xxoooxxo ooooxooo [MSB]
3144 23:53:41.259950 5, [0] xoooooxo oooooooo [MSB]
3145 23:53:41.263528 6, [0] xoooooxo oooooooo [MSB]
3146 23:53:41.267045 34, [0] oooxoooo oooooooo [MSB]
3147 23:53:41.270317 35, [0] ooxxoooo ooooooox [MSB]
3148 23:53:41.270425 36, [0] ooxxoooo ooooooox [MSB]
3149 23:53:41.273313 37, [0] ooxxoooo ooxoooox [MSB]
3150 23:53:41.276863 38, [0] ooxxxooo xoxooxox [MSB]
3151 23:53:41.280517 39, [0] ooxxxoox xxxxoxxx [MSB]
3152 23:53:41.283962 40, [0] ooxxxoox xxxxoxxx [MSB]
3153 23:53:41.286757 41, [0] ooxxxoox xxxxxxxx [MSB]
3154 23:53:41.286838 42, [0] xxxxxxxx xxxxxxxx [MSB]
3155 23:53:41.293844 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
3156 23:53:41.296982 iDelay=42, Bit 1, Center 23 (5 ~ 41) 37
3157 23:53:41.300193 iDelay=42, Bit 2, Center 17 (0 ~ 34) 35
3158 23:53:41.303389 iDelay=42, Bit 3, Center 15 (-2 ~ 33) 36
3159 23:53:41.306748 iDelay=42, Bit 4, Center 19 (1 ~ 37) 37
3160 23:53:41.310494 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3161 23:53:41.313653 iDelay=42, Bit 6, Center 24 (7 ~ 41) 35
3162 23:53:41.316770 iDelay=42, Bit 7, Center 19 (1 ~ 38) 38
3163 23:53:41.320093 iDelay=42, Bit 8, Center 19 (2 ~ 37) 36
3164 23:53:41.323825 iDelay=42, Bit 9, Center 20 (2 ~ 38) 37
3165 23:53:41.327043 iDelay=42, Bit 10, Center 19 (2 ~ 36) 35
3166 23:53:41.330217 iDelay=42, Bit 11, Center 20 (3 ~ 38) 36
3167 23:53:41.333442 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3168 23:53:41.336754 iDelay=42, Bit 13, Center 20 (3 ~ 37) 35
3169 23:53:41.343787 iDelay=42, Bit 14, Center 20 (2 ~ 38) 37
3170 23:53:41.347231 iDelay=42, Bit 15, Center 16 (-1 ~ 34) 36
3171 23:53:41.347311 ==
3172 23:53:41.350409 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3173 23:53:41.353508 fsp= 1, odt_onoff= 1, Byte mode= 0
3174 23:53:41.353597 ==
3175 23:53:41.356838 DQS Delay:
3176 23:53:41.356918 DQS0 = 0, DQS1 = 0
3177 23:53:41.356984 DQM Delay:
3178 23:53:41.360388 DQM0 = 20, DQM1 = 19
3179 23:53:41.360499 DQ Delay:
3180 23:53:41.363739 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
3181 23:53:41.366941 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
3182 23:53:41.370315 DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =20
3183 23:53:41.373442 DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =16
3184 23:53:41.373522
3185 23:53:41.373588
3186 23:53:41.377276 DramC Write-DBI off
3187 23:53:41.377393 ==
3188 23:53:41.380421 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3189 23:53:41.383527 fsp= 1, odt_onoff= 1, Byte mode= 0
3190 23:53:41.383621 ==
3191 23:53:41.390447 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3192 23:53:41.390529
3193 23:53:41.390595 Begin, DQ Scan Range 928~1184
3194 23:53:41.393862
3195 23:53:41.393966
3196 23:53:41.394062 TX Vref Scan disable
3197 23:53:41.397237 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3198 23:53:41.400582 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3199 23:53:41.403638 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3200 23:53:41.406764 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3201 23:53:41.410823 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3202 23:53:41.417208 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3203 23:53:41.420145 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3204 23:53:41.423718 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3205 23:53:41.426839 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3206 23:53:41.430323 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3207 23:53:41.433819 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3208 23:53:41.437165 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3209 23:53:41.440223 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3210 23:53:41.443874 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3211 23:53:41.447250 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3212 23:53:41.450403 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3213 23:53:41.454157 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3214 23:53:41.457337 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3215 23:53:41.460467 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3216 23:53:41.463666 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3217 23:53:41.467493 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3218 23:53:41.470387 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3219 23:53:41.477338 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3220 23:53:41.480389 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3221 23:53:41.483705 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3222 23:53:41.486800 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3223 23:53:41.490825 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3224 23:53:41.493715 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3225 23:53:41.496988 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3226 23:53:41.500283 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3227 23:53:41.503730 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3228 23:53:41.507042 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3229 23:53:41.510260 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3230 23:53:41.513884 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3231 23:53:41.516947 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3232 23:53:41.520412 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3233 23:53:41.523690 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3234 23:53:41.527187 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3235 23:53:41.530236 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3236 23:53:41.533395 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3237 23:53:41.536930 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3238 23:53:41.540339 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
3239 23:53:41.546766 970 |3 6 10|[0] xxxxxxxx oooooxoo [MSB]
3240 23:53:41.550082 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3241 23:53:41.553453 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3242 23:53:41.556585 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3243 23:53:41.560042 974 |3 6 14|[0] xxxoxxxx oooooooo [MSB]
3244 23:53:41.563777 975 |3 6 15|[0] xxoooxxx oooooooo [MSB]
3245 23:53:41.566676 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
3246 23:53:41.569667 977 |3 6 17|[0] xooooooo oooooooo [MSB]
3247 23:53:41.576908 988 |3 6 28|[0] oooooooo ooooooox [MSB]
3248 23:53:41.580041 989 |3 6 29|[0] oooooooo ooooooox [MSB]
3249 23:53:41.583515 990 |3 6 30|[0] oooooooo ooooooox [MSB]
3250 23:53:41.586630 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3251 23:53:41.590454 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3252 23:53:41.593796 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3253 23:53:41.596944 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3254 23:53:41.600074 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3255 23:53:41.603220 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
3256 23:53:41.606980 997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]
3257 23:53:41.610141 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
3258 23:53:41.613201 999 |3 6 39|[0] ooxxxoox xxxxxxxx [MSB]
3259 23:53:41.616637 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
3260 23:53:41.620468 Byte0, DQ PI dly=986, DQM PI dly= 986
3261 23:53:41.626910 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3262 23:53:41.626997
3263 23:53:41.630435 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3264 23:53:41.630524
3265 23:53:41.633545 Byte1, DQ PI dly=978, DQM PI dly= 978
3266 23:53:41.636898 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3267 23:53:41.636997
3268 23:53:41.643302 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3269 23:53:41.643382
3270 23:53:41.643449 ==
3271 23:53:41.646918 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3272 23:53:41.650054 fsp= 1, odt_onoff= 1, Byte mode= 0
3273 23:53:41.650134 ==
3274 23:53:41.656774 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3275 23:53:41.656856
3276 23:53:41.656922 Begin, DQ Scan Range 954~1018
3277 23:53:41.659862 Write Rank1 MR14 =0x0
3278 23:53:41.668930
3279 23:53:41.672236 CH=1, VrefRange= 0, VrefLevel = 0
3280 23:53:41.675428 TX Bit0 (980~998) 19 989, Bit8 (971~986) 16 978,
3281 23:53:41.678764 TX Bit1 (979~997) 19 988, Bit9 (971~986) 16 978,
3282 23:53:41.685636 TX Bit2 (976~991) 16 983, Bit10 (974~986) 13 980,
3283 23:53:41.688814 TX Bit3 (975~991) 17 983, Bit11 (974~990) 17 982,
3284 23:53:41.692007 TX Bit4 (977~993) 17 985, Bit12 (973~987) 15 980,
3285 23:53:41.698562 TX Bit5 (979~997) 19 988, Bit13 (975~987) 13 981,
3286 23:53:41.702383 TX Bit6 (979~998) 20 988, Bit14 (972~987) 16 979,
3287 23:53:41.705716 TX Bit7 (978~992) 15 985, Bit15 (968~985) 18 976,
3288 23:53:41.705795
3289 23:53:41.708909 Write Rank1 MR14 =0x2
3290 23:53:41.717953
3291 23:53:41.718042 CH=1, VrefRange= 0, VrefLevel = 2
3292 23:53:41.724464 TX Bit0 (979~998) 20 988, Bit8 (971~987) 17 979,
3293 23:53:41.727835 TX Bit1 (979~997) 19 988, Bit9 (970~987) 18 978,
3294 23:53:41.734441 TX Bit2 (976~992) 17 984, Bit10 (971~987) 17 979,
3295 23:53:41.738176 TX Bit3 (975~991) 17 983, Bit11 (973~991) 19 982,
3296 23:53:41.741373 TX Bit4 (977~994) 18 985, Bit12 (972~989) 18 980,
3297 23:53:41.748184 TX Bit5 (979~997) 19 988, Bit13 (974~987) 14 980,
3298 23:53:41.751520 TX Bit6 (979~998) 20 988, Bit14 (973~987) 15 980,
3299 23:53:41.754927 TX Bit7 (977~993) 17 985, Bit15 (968~985) 18 976,
3300 23:53:41.755048
3301 23:53:41.757948 Write Rank1 MR14 =0x4
3302 23:53:41.766856
3303 23:53:41.766945 CH=1, VrefRange= 0, VrefLevel = 4
3304 23:53:41.773937 TX Bit0 (980~999) 20 989, Bit8 (970~988) 19 979,
3305 23:53:41.777190 TX Bit1 (979~998) 20 988, Bit9 (970~987) 18 978,
3306 23:53:41.783732 TX Bit2 (976~992) 17 984, Bit10 (971~987) 17 979,
3307 23:53:41.787371 TX Bit3 (975~992) 18 983, Bit11 (973~991) 19 982,
3308 23:53:41.790572 TX Bit4 (977~995) 19 986, Bit12 (972~989) 18 980,
3309 23:53:41.796941 TX Bit5 (978~998) 21 988, Bit13 (974~988) 15 981,
3310 23:53:41.800377 TX Bit6 (979~999) 21 989, Bit14 (972~988) 17 980,
3311 23:53:41.803982 TX Bit7 (977~993) 17 985, Bit15 (968~985) 18 976,
3312 23:53:41.804061
3313 23:53:41.807209 Write Rank1 MR14 =0x6
3314 23:53:41.816188
3315 23:53:41.816271 CH=1, VrefRange= 0, VrefLevel = 6
3316 23:53:41.822682 TX Bit0 (978~999) 22 988, Bit8 (970~988) 19 979,
3317 23:53:41.825999 TX Bit1 (978~998) 21 988, Bit9 (970~988) 19 979,
3318 23:53:41.832722 TX Bit2 (976~993) 18 984, Bit10 (970~989) 20 979,
3319 23:53:41.836034 TX Bit3 (975~992) 18 983, Bit11 (973~992) 20 982,
3320 23:53:41.839287 TX Bit4 (976~995) 20 985, Bit12 (971~990) 20 980,
3321 23:53:41.845906 TX Bit5 (978~998) 21 988, Bit13 (973~988) 16 980,
3322 23:53:41.849710 TX Bit6 (978~999) 22 988, Bit14 (972~990) 19 981,
3323 23:53:41.853001 TX Bit7 (977~994) 18 985, Bit15 (968~986) 19 977,
3324 23:53:41.853105
3325 23:53:41.855951 Write Rank1 MR14 =0x8
3326 23:53:41.865098
3327 23:53:41.865185 CH=1, VrefRange= 0, VrefLevel = 8
3328 23:53:41.872100 TX Bit0 (979~1000) 22 989, Bit8 (970~988) 19 979,
3329 23:53:41.875420 TX Bit1 (978~998) 21 988, Bit9 (970~989) 20 979,
3330 23:53:41.881964 TX Bit2 (976~993) 18 984, Bit10 (971~988) 18 979,
3331 23:53:41.885689 TX Bit3 (974~993) 20 983, Bit11 (972~991) 20 981,
3332 23:53:41.888931 TX Bit4 (977~996) 20 986, Bit12 (971~990) 20 980,
3333 23:53:41.895775 TX Bit5 (978~998) 21 988, Bit13 (972~990) 19 981,
3334 23:53:41.898618 TX Bit6 (978~999) 22 988, Bit14 (971~990) 20 980,
3335 23:53:41.902405 TX Bit7 (977~995) 19 986, Bit15 (967~986) 20 976,
3336 23:53:41.902491
3337 23:53:41.905722 Write Rank1 MR14 =0xa
3338 23:53:41.914578
3339 23:53:41.918302 CH=1, VrefRange= 0, VrefLevel = 10
3340 23:53:41.921460 TX Bit0 (979~1000) 22 989, Bit8 (970~990) 21 980,
3341 23:53:41.924754 TX Bit1 (978~999) 22 988, Bit9 (969~989) 21 979,
3342 23:53:41.931191 TX Bit2 (975~994) 20 984, Bit10 (970~989) 20 979,
3343 23:53:41.934557 TX Bit3 (974~993) 20 983, Bit11 (971~992) 22 981,
3344 23:53:41.938107 TX Bit4 (976~996) 21 986, Bit12 (971~991) 21 981,
3345 23:53:41.944351 TX Bit5 (978~999) 22 988, Bit13 (972~990) 19 981,
3346 23:53:41.948272 TX Bit6 (978~999) 22 988, Bit14 (971~990) 20 980,
3347 23:53:41.951557 TX Bit7 (977~995) 19 986, Bit15 (967~987) 21 977,
3348 23:53:41.954759
3349 23:53:41.954840 Write Rank1 MR14 =0xc
3350 23:53:41.964401
3351 23:53:41.967545 CH=1, VrefRange= 0, VrefLevel = 12
3352 23:53:41.971160 TX Bit0 (978~1000) 23 989, Bit8 (969~990) 22 979,
3353 23:53:41.974270 TX Bit1 (978~999) 22 988, Bit9 (969~989) 21 979,
3354 23:53:41.980932 TX Bit2 (975~994) 20 984, Bit10 (969~991) 23 980,
3355 23:53:41.983889 TX Bit3 (973~993) 21 983, Bit11 (971~992) 22 981,
3356 23:53:41.987357 TX Bit4 (976~997) 22 986, Bit12 (971~991) 21 981,
3357 23:53:41.994098 TX Bit5 (978~999) 22 988, Bit13 (971~991) 21 981,
3358 23:53:41.997360 TX Bit6 (978~1000) 23 989, Bit14 (970~991) 22 980,
3359 23:53:42.001117 TX Bit7 (977~996) 20 986, Bit15 (967~986) 20 976,
3360 23:53:42.001198
3361 23:53:42.004409 Write Rank1 MR14 =0xe
3362 23:53:42.013480
3363 23:53:42.017351 CH=1, VrefRange= 0, VrefLevel = 14
3364 23:53:42.020612 TX Bit0 (978~1000) 23 989, Bit8 (969~991) 23 980,
3365 23:53:42.024083 TX Bit1 (978~999) 22 988, Bit9 (969~990) 22 979,
3366 23:53:42.030246 TX Bit2 (975~995) 21 985, Bit10 (970~991) 22 980,
3367 23:53:42.033412 TX Bit3 (973~994) 22 983, Bit11 (971~992) 22 981,
3368 23:53:42.037304 TX Bit4 (976~997) 22 986, Bit12 (970~992) 23 981,
3369 23:53:42.043373 TX Bit5 (978~999) 22 988, Bit13 (972~991) 20 981,
3370 23:53:42.047256 TX Bit6 (978~1000) 23 989, Bit14 (970~991) 22 980,
3371 23:53:42.050178 TX Bit7 (977~996) 20 986, Bit15 (967~987) 21 977,
3372 23:53:42.053463
3373 23:53:42.053548 Write Rank1 MR14 =0x10
3374 23:53:42.063809
3375 23:53:42.066989 CH=1, VrefRange= 0, VrefLevel = 16
3376 23:53:42.070235 TX Bit0 (978~1001) 24 989, Bit8 (969~991) 23 980,
3377 23:53:42.073537 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
3378 23:53:42.080035 TX Bit2 (975~996) 22 985, Bit10 (970~991) 22 980,
3379 23:53:42.083292 TX Bit3 (972~995) 24 983, Bit11 (970~992) 23 981,
3380 23:53:42.086686 TX Bit4 (976~998) 23 987, Bit12 (970~992) 23 981,
3381 23:53:42.093325 TX Bit5 (977~999) 23 988, Bit13 (970~991) 22 980,
3382 23:53:42.096371 TX Bit6 (978~1000) 23 989, Bit14 (970~992) 23 981,
3383 23:53:42.100187 TX Bit7 (976~997) 22 986, Bit15 (967~988) 22 977,
3384 23:53:42.103352
3385 23:53:42.103430 Write Rank1 MR14 =0x12
3386 23:53:42.113213
3387 23:53:42.116440 CH=1, VrefRange= 0, VrefLevel = 18
3388 23:53:42.119988 TX Bit0 (978~1001) 24 989, Bit8 (969~991) 23 980,
3389 23:53:42.123154 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
3390 23:53:42.129615 TX Bit2 (975~996) 22 985, Bit10 (970~991) 22 980,
3391 23:53:42.133216 TX Bit3 (972~995) 24 983, Bit11 (970~992) 23 981,
3392 23:53:42.136226 TX Bit4 (976~998) 23 987, Bit12 (970~992) 23 981,
3393 23:53:42.142969 TX Bit5 (977~999) 23 988, Bit13 (970~991) 22 980,
3394 23:53:42.146561 TX Bit6 (978~1000) 23 989, Bit14 (970~992) 23 981,
3395 23:53:42.152843 TX Bit7 (976~997) 22 986, Bit15 (967~988) 22 977,
3396 23:53:42.152953
3397 23:53:42.153048 Write Rank1 MR14 =0x14
3398 23:53:42.163172
3399 23:53:42.166417 CH=1, VrefRange= 0, VrefLevel = 20
3400 23:53:42.169638 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3401 23:53:42.172918 TX Bit1 (977~1000) 24 988, Bit9 (969~991) 23 980,
3402 23:53:42.179933 TX Bit2 (974~997) 24 985, Bit10 (968~991) 24 979,
3403 23:53:42.183070 TX Bit3 (972~996) 25 984, Bit11 (970~993) 24 981,
3404 23:53:42.186272 TX Bit4 (975~998) 24 986, Bit12 (970~992) 23 981,
3405 23:53:42.193197 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3406 23:53:42.196352 TX Bit6 (977~1001) 25 989, Bit14 (970~992) 23 981,
3407 23:53:42.202918 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3408 23:53:42.203003
3409 23:53:42.203068 Write Rank1 MR14 =0x16
3410 23:53:42.213240
3411 23:53:42.216443 CH=1, VrefRange= 0, VrefLevel = 22
3412 23:53:42.219674 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3413 23:53:42.222980 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3414 23:53:42.229632 TX Bit2 (974~997) 24 985, Bit10 (969~991) 23 980,
3415 23:53:42.233196 TX Bit3 (971~996) 26 983, Bit11 (969~993) 25 981,
3416 23:53:42.236531 TX Bit4 (975~998) 24 986, Bit12 (969~992) 24 980,
3417 23:53:42.242886 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3418 23:53:42.246768 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3419 23:53:42.252938 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3420 23:53:42.253026
3421 23:53:42.253093 Write Rank1 MR14 =0x18
3422 23:53:42.263670
3423 23:53:42.266785 CH=1, VrefRange= 0, VrefLevel = 24
3424 23:53:42.270081 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3425 23:53:42.273198 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3426 23:53:42.280143 TX Bit2 (974~997) 24 985, Bit10 (969~991) 23 980,
3427 23:53:42.283497 TX Bit3 (971~996) 26 983, Bit11 (969~993) 25 981,
3428 23:53:42.286753 TX Bit4 (975~998) 24 986, Bit12 (969~992) 24 980,
3429 23:53:42.293560 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3430 23:53:42.296764 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3431 23:53:42.303219 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3432 23:53:42.303306
3433 23:53:42.303372 Write Rank1 MR14 =0x1a
3434 23:53:42.313929
3435 23:53:42.317040 CH=1, VrefRange= 0, VrefLevel = 26
3436 23:53:42.320221 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3437 23:53:42.323570 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3438 23:53:42.330701 TX Bit2 (974~997) 24 985, Bit10 (969~991) 23 980,
3439 23:53:42.333773 TX Bit3 (971~996) 26 983, Bit11 (969~993) 25 981,
3440 23:53:42.336983 TX Bit4 (975~998) 24 986, Bit12 (969~992) 24 980,
3441 23:53:42.344142 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3442 23:53:42.346946 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3443 23:53:42.353722 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3444 23:53:42.353845
3445 23:53:42.353917 Write Rank1 MR14 =0x1c
3446 23:53:42.364161
3447 23:53:42.367144 CH=1, VrefRange= 0, VrefLevel = 28
3448 23:53:42.370363 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3449 23:53:42.373663 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3450 23:53:42.380429 TX Bit2 (974~997) 24 985, Bit10 (969~991) 23 980,
3451 23:53:42.383567 TX Bit3 (971~996) 26 983, Bit11 (969~993) 25 981,
3452 23:53:42.387663 TX Bit4 (975~998) 24 986, Bit12 (969~992) 24 980,
3453 23:53:42.394195 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3454 23:53:42.397277 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3455 23:53:42.403704 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3456 23:53:42.403807
3457 23:53:42.403878 Write Rank1 MR14 =0x1e
3458 23:53:42.414264
3459 23:53:42.417421 CH=1, VrefRange= 0, VrefLevel = 30
3460 23:53:42.420550 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3461 23:53:42.423652 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3462 23:53:42.430537 TX Bit2 (974~997) 24 985, Bit10 (969~991) 23 980,
3463 23:53:42.433806 TX Bit3 (971~996) 26 983, Bit11 (969~993) 25 981,
3464 23:53:42.437092 TX Bit4 (975~998) 24 986, Bit12 (969~992) 24 980,
3465 23:53:42.443788 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3466 23:53:42.446877 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3467 23:53:42.453779 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3468 23:53:42.453866
3469 23:53:42.453933 Write Rank1 MR14 =0x20
3470 23:53:42.464048
3471 23:53:42.467311 CH=1, VrefRange= 0, VrefLevel = 32
3472 23:53:42.470582 TX Bit0 (977~1002) 26 989, Bit8 (969~991) 23 980,
3473 23:53:42.474177 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3474 23:53:42.480445 TX Bit2 (974~997) 24 985, Bit10 (969~991) 23 980,
3475 23:53:42.483941 TX Bit3 (971~996) 26 983, Bit11 (969~993) 25 981,
3476 23:53:42.487213 TX Bit4 (975~998) 24 986, Bit12 (969~992) 24 980,
3477 23:53:42.493853 TX Bit5 (977~1000) 24 988, Bit13 (970~992) 23 981,
3478 23:53:42.497141 TX Bit6 (977~1001) 25 989, Bit14 (969~992) 24 980,
3479 23:53:42.504074 TX Bit7 (976~998) 23 987, Bit15 (966~989) 24 977,
3480 23:53:42.504161
3481 23:53:42.504228
3482 23:53:42.507512 TX Vref found, early break! 362< 366
3483 23:53:42.510615 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3484 23:53:42.513848 u1DelayCellOfst[0]=7 cells (6 PI)
3485 23:53:42.517098 u1DelayCellOfst[1]=6 cells (5 PI)
3486 23:53:42.520471 u1DelayCellOfst[2]=2 cells (2 PI)
3487 23:53:42.523665 u1DelayCellOfst[3]=0 cells (0 PI)
3488 23:53:42.526788 u1DelayCellOfst[4]=3 cells (3 PI)
3489 23:53:42.530538 u1DelayCellOfst[5]=6 cells (5 PI)
3490 23:53:42.530620 u1DelayCellOfst[6]=7 cells (6 PI)
3491 23:53:42.533925 u1DelayCellOfst[7]=5 cells (4 PI)
3492 23:53:42.537209 Byte0, DQ PI dly=983, DQM PI dly= 986
3493 23:53:42.543924 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3494 23:53:42.544032
3495 23:53:42.546887 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3496 23:53:42.546969
3497 23:53:42.550708 u1DelayCellOfst[8]=3 cells (3 PI)
3498 23:53:42.553503 u1DelayCellOfst[9]=2 cells (2 PI)
3499 23:53:42.557103 u1DelayCellOfst[10]=3 cells (3 PI)
3500 23:53:42.560258 u1DelayCellOfst[11]=5 cells (4 PI)
3501 23:53:42.563752 u1DelayCellOfst[12]=3 cells (3 PI)
3502 23:53:42.567382 u1DelayCellOfst[13]=5 cells (4 PI)
3503 23:53:42.567482 u1DelayCellOfst[14]=3 cells (3 PI)
3504 23:53:42.570664 u1DelayCellOfst[15]=0 cells (0 PI)
3505 23:53:42.573892 Byte1, DQ PI dly=977, DQM PI dly= 979
3506 23:53:42.580242 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3507 23:53:42.580326
3508 23:53:42.583928 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3509 23:53:42.584005
3510 23:53:42.587053 Write Rank1 MR14 =0x16
3511 23:53:42.587126
3512 23:53:42.587187 Final TX Range 0 Vref 22
3513 23:53:42.587246
3514 23:53:42.593809 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3515 23:53:42.593905
3516 23:53:42.601001 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3517 23:53:42.607072 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3518 23:53:42.617467 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3519 23:53:42.617559 Write Rank1 MR3 =0xb0
3520 23:53:42.620827 DramC Write-DBI on
3521 23:53:42.620907 ==
3522 23:53:42.623970 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3523 23:53:42.627251 fsp= 1, odt_onoff= 1, Byte mode= 0
3524 23:53:42.627345 ==
3525 23:53:42.633851 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3526 23:53:42.633939
3527 23:53:42.634005 Begin, DQ Scan Range 699~763
3528 23:53:42.634069
3529 23:53:42.637086
3530 23:53:42.637164 TX Vref Scan disable
3531 23:53:42.640266 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3532 23:53:42.643684 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3533 23:53:42.647357 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3534 23:53:42.650822 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3535 23:53:42.654106 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3536 23:53:42.657362 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3537 23:53:42.660676 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3538 23:53:42.663810 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3539 23:53:42.670905 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3540 23:53:42.673991 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3541 23:53:42.677186 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3542 23:53:42.680581 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3543 23:53:42.683713 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3544 23:53:42.687533 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3545 23:53:42.690650 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3546 23:53:42.694238 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3547 23:53:42.697465 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3548 23:53:42.700769 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3549 23:53:42.704059 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3550 23:53:42.707314 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3551 23:53:42.714763 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3552 23:53:42.718161 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3553 23:53:42.721489 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3554 23:53:42.725180 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3555 23:53:42.728091 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3556 23:53:42.732026 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3557 23:53:42.735147 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3558 23:53:42.738389 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3559 23:53:42.741608 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3560 23:53:42.745090 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
3561 23:53:42.748284 Byte0, DQ PI dly=731, DQM PI dly= 731
3562 23:53:42.751453 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
3563 23:53:42.751542
3564 23:53:42.758662 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
3565 23:53:42.758752
3566 23:53:42.761450 Byte1, DQ PI dly=723, DQM PI dly= 723
3567 23:53:42.765217 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3568 23:53:42.765323
3569 23:53:42.768413 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3570 23:53:42.771574
3571 23:53:42.774952 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3572 23:53:42.785321 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3573 23:53:42.791585 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3574 23:53:42.791671 Write Rank1 MR3 =0x30
3575 23:53:42.794790 DramC Write-DBI off
3576 23:53:42.794873
3577 23:53:42.794938 [DATLAT]
3578 23:53:42.798247 Freq=1600, CH1 RK1, use_rxtx_scan=0
3579 23:53:42.798333
3580 23:53:42.801967 DATLAT Default: 0x10
3581 23:53:42.802051 7, 0xFFFF, sum=0
3582 23:53:42.805236 8, 0xFFFF, sum=0
3583 23:53:42.805329 9, 0xFFFF, sum=0
3584 23:53:42.808356 10, 0xFFFF, sum=0
3585 23:53:42.808440 11, 0xFFFF, sum=0
3586 23:53:42.808508 12, 0xFFFF, sum=0
3587 23:53:42.812091 13, 0xFFFF, sum=0
3588 23:53:42.812204 14, 0x0, sum=1
3589 23:53:42.815180 15, 0x0, sum=2
3590 23:53:42.815264 16, 0x0, sum=3
3591 23:53:42.818420 17, 0x0, sum=4
3592 23:53:42.822172 pattern=2 first_step=14 total pass=5 best_step=16
3593 23:53:42.822257 ==
3594 23:53:42.828330 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3595 23:53:42.828417 fsp= 1, odt_onoff= 1, Byte mode= 0
3596 23:53:42.831807 ==
3597 23:53:42.835027 Start DQ dly to find pass range UseTestEngine =1
3598 23:53:42.838682 x-axis: bit #, y-axis: DQ dly (-127~63)
3599 23:53:42.838766 RX Vref Scan = 0
3600 23:53:42.841867 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3601 23:53:42.844930 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3602 23:53:42.848996 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3603 23:53:42.852161 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3604 23:53:42.855219 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3605 23:53:42.858197 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3606 23:53:42.862082 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3607 23:53:42.865147 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3608 23:53:42.865233 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3609 23:53:42.868373 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3610 23:53:42.871546 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3611 23:53:42.874727 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3612 23:53:42.877940 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3613 23:53:42.881692 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3614 23:53:42.884824 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3615 23:53:42.888034 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3616 23:53:42.888119 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3617 23:53:42.891325 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3618 23:53:42.894598 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3619 23:53:42.898222 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3620 23:53:42.901125 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3621 23:53:42.904708 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3622 23:53:42.908270 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3623 23:53:42.908353 -3, [0] xxxoxxxx xxxxxxxx [MSB]
3624 23:53:42.911560 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3625 23:53:42.914451 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3626 23:53:42.917859 0, [0] xxooxxxx xxxxxxxo [MSB]
3627 23:53:42.921083 1, [0] xxooxxxx ooxxxxxo [MSB]
3628 23:53:42.925066 2, [0] xxoooxxo ooxxxxxo [MSB]
3629 23:53:42.925149 3, [0] xxoooxxo ooooxooo [MSB]
3630 23:53:42.928068 4, [0] xxoooxxo oooooooo [MSB]
3631 23:53:42.931278 5, [0] xoooooxo oooooooo [MSB]
3632 23:53:42.934500 6, [0] xoooooxo oooooooo [MSB]
3633 23:53:42.938338 34, [0] oooxoooo oooooooo [MSB]
3634 23:53:42.941976 35, [0] oooxoooo ooooooox [MSB]
3635 23:53:42.945040 36, [0] ooxxoooo ooooooox [MSB]
3636 23:53:42.948462 37, [0] ooxxxoox ooxooxxx [MSB]
3637 23:53:42.951577 38, [0] ooxxxoox xxxooxxx [MSB]
3638 23:53:42.955192 39, [0] ooxxxoox xxxxoxxx [MSB]
3639 23:53:42.955299 40, [0] ooxxxoox xxxxxxxx [MSB]
3640 23:53:42.958627 41, [0] ooxxxoox xxxxxxxx [MSB]
3641 23:53:42.961966 42, [0] oxxxxxox xxxxxxxx [MSB]
3642 23:53:42.965043 43, [0] xxxxxxxx xxxxxxxx [MSB]
3643 23:53:42.968649 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3644 23:53:42.971981 iDelay=43, Bit 1, Center 23 (5 ~ 41) 37
3645 23:53:42.975021 iDelay=43, Bit 2, Center 17 (0 ~ 35) 36
3646 23:53:42.978840 iDelay=43, Bit 3, Center 15 (-3 ~ 33) 37
3647 23:53:42.981942 iDelay=43, Bit 4, Center 19 (2 ~ 36) 35
3648 23:53:42.985039 iDelay=43, Bit 5, Center 23 (5 ~ 41) 37
3649 23:53:42.988286 iDelay=43, Bit 6, Center 24 (7 ~ 42) 36
3650 23:53:42.995091 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
3651 23:53:42.998449 iDelay=43, Bit 8, Center 19 (1 ~ 37) 37
3652 23:53:43.001463 iDelay=43, Bit 9, Center 19 (1 ~ 37) 37
3653 23:53:43.005351 iDelay=43, Bit 10, Center 19 (3 ~ 36) 34
3654 23:53:43.008488 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
3655 23:53:43.011636 iDelay=43, Bit 12, Center 21 (4 ~ 39) 36
3656 23:53:43.014876 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
3657 23:53:43.018468 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
3658 23:53:43.022170 iDelay=43, Bit 15, Center 17 (0 ~ 34) 35
3659 23:53:43.022317 ==
3660 23:53:43.028352 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3661 23:53:43.031708 fsp= 1, odt_onoff= 1, Byte mode= 0
3662 23:53:43.031796 ==
3663 23:53:43.031863 DQS Delay:
3664 23:53:43.034906 DQS0 = 0, DQS1 = 0
3665 23:53:43.034989 DQM Delay:
3666 23:53:43.035055 DQM0 = 20, DQM1 = 19
3667 23:53:43.038332 DQ Delay:
3668 23:53:43.041657 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
3669 23:53:43.044936 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
3670 23:53:43.048550 DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =20
3671 23:53:43.051953 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
3672 23:53:43.052050
3673 23:53:43.052149
3674 23:53:43.052210
3675 23:53:43.055039 [DramC_TX_OE_Calibration] TA2
3676 23:53:43.058708 Original DQ_B0 (3 6) =30, OEN = 27
3677 23:53:43.058793 Original DQ_B1 (3 6) =30, OEN = 27
3678 23:53:43.061700 23, 0x0, End_B0=23 End_B1=23
3679 23:53:43.064977 24, 0x0, End_B0=24 End_B1=24
3680 23:53:43.068251 25, 0x0, End_B0=25 End_B1=25
3681 23:53:43.071678 26, 0x0, End_B0=26 End_B1=26
3682 23:53:43.071822 27, 0x0, End_B0=27 End_B1=27
3683 23:53:43.074761 28, 0x0, End_B0=28 End_B1=28
3684 23:53:43.078433 29, 0x0, End_B0=29 End_B1=29
3685 23:53:43.082237 30, 0x0, End_B0=30 End_B1=30
3686 23:53:43.085233 31, 0xFFFF, End_B0=30 End_B1=30
3687 23:53:43.088391 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3688 23:53:43.094991 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3689 23:53:43.095077
3690 23:53:43.095145
3691 23:53:43.098333 Write Rank1 MR23 =0x3f
3692 23:53:43.098413 [DQSOSC]
3693 23:53:43.105238 [DQSOSCAuto] RK1, (LSB)MR18= 0xaf, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
3694 23:53:43.111617 CH1_RK1: MR19=0x3, MR18=0xAF, DQSOSC=334, MR23=63, INC=22, DEC=33
3695 23:53:43.111704 Write Rank1 MR23 =0x3f
3696 23:53:43.115094 [DQSOSC]
3697 23:53:43.122072 [DQSOSCAuto] RK1, (LSB)MR18= 0xae, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
3698 23:53:43.125201 CH1 RK1: MR19=3, MR18=AE
3699 23:53:43.128387 [RxdqsGatingPostProcess] freq 1600
3700 23:53:43.131841 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3701 23:53:43.134983 Rank: 0
3702 23:53:43.135067 best DQS0 dly(2T, 0.5T) = (2, 5)
3703 23:53:43.138048 best DQS1 dly(2T, 0.5T) = (2, 5)
3704 23:53:43.141749 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3705 23:53:43.144679 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3706 23:53:43.144764 Rank: 1
3707 23:53:43.148041 best DQS0 dly(2T, 0.5T) = (2, 5)
3708 23:53:43.151484 best DQS1 dly(2T, 0.5T) = (2, 5)
3709 23:53:43.154810 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3710 23:53:43.158456 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3711 23:53:43.164902 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3712 23:53:43.164989 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3713 23:53:43.171406 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3714 23:53:43.171491
3715 23:53:43.171557
3716 23:53:43.175047 [Calibration Summary] Freqency 1600
3717 23:53:43.175131 CH 0, Rank 0
3718 23:53:43.178601 All Pass.
3719 23:53:43.178708
3720 23:53:43.178776 CH 0, Rank 1
3721 23:53:43.178837 All Pass.
3722 23:53:43.178896
3723 23:53:43.181782 CH 1, Rank 0
3724 23:53:43.181865 All Pass.
3725 23:53:43.181932
3726 23:53:43.181993 CH 1, Rank 1
3727 23:53:43.185210 All Pass.
3728 23:53:43.185314
3729 23:53:43.191539 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3730 23:53:43.198506 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3731 23:53:43.205037 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3732 23:53:43.208288 Write Rank0 MR3 =0xb0
3733 23:53:43.211471 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3734 23:53:43.221842 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3735 23:53:43.228212 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3736 23:53:43.228329 Write Rank1 MR3 =0xb0
3737 23:53:43.235262 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3738 23:53:43.241457 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3739 23:53:43.248468 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3740 23:53:43.251413 Write Rank0 MR3 =0xb0
3741 23:53:43.258533 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3742 23:53:43.264875 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3743 23:53:43.271477 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3744 23:53:43.274671 Write Rank1 MR3 =0xb0
3745 23:53:43.274776 DramC Write-DBI on
3746 23:53:43.278400 [GetDramInforAfterCalByMRR] Vendor 1.
3747 23:53:43.281280 [GetDramInforAfterCalByMRR] Revision 7.
3748 23:53:43.285056 MR8 12
3749 23:53:43.288307 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3750 23:53:43.288394 MR8 12
3751 23:53:43.294704 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3752 23:53:43.294813 MR8 12
3753 23:53:43.298127 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3754 23:53:43.301556 MR8 12
3755 23:53:43.304663 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3756 23:53:43.315070 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3757 23:53:43.315159 Write Rank0 MR13 =0xd0
3758 23:53:43.318143 Write Rank1 MR13 =0xd0
3759 23:53:43.321644 Write Rank0 MR13 =0xd0
3760 23:53:43.321726 Write Rank1 MR13 =0xd0
3761 23:53:43.324539 Save calibration result to emmc
3762 23:53:43.324617
3763 23:53:43.324680
3764 23:53:43.328558 [DramcModeReg_Check] Freq_1600, FSP_1
3765 23:53:43.331823 FSP_1, CH_0, RK0
3766 23:53:43.331905 Write Rank0 MR13 =0xd8
3767 23:53:43.334917 MR12 = 0x56 (global = 0x56) match
3768 23:53:43.338234 MR14 = 0x18 (global = 0x18) match
3769 23:53:43.341502 FSP_1, CH_0, RK1
3770 23:53:43.341587 Write Rank1 MR13 =0xd8
3771 23:53:43.344705 MR12 = 0x56 (global = 0x56) match
3772 23:53:43.348526 MR14 = 0x14 (global = 0x14) match
3773 23:53:43.351550 FSP_1, CH_1, RK0
3774 23:53:43.351627 Write Rank0 MR13 =0xd8
3775 23:53:43.354918 MR12 = 0x56 (global = 0x56) match
3776 23:53:43.357958 MR14 = 0x18 (global = 0x18) match
3777 23:53:43.361840 FSP_1, CH_1, RK1
3778 23:53:43.361922 Write Rank1 MR13 =0xd8
3779 23:53:43.365035 MR12 = 0x58 (global = 0x58) match
3780 23:53:43.368508 MR14 = 0x16 (global = 0x16) match
3781 23:53:43.368636
3782 23:53:43.374716 [MEM_TEST] 02: After DFS, before run time config
3783 23:53:43.381675 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3784 23:53:43.381796
3785 23:53:43.384848 [TA2_TEST]
3786 23:53:43.384928 === TA2 HW
3787 23:53:43.385010 TA2 PAT: XTALK
3788 23:53:43.391498 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3789 23:53:43.394454 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3790 23:53:43.400985 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3791 23:53:43.404975 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3792 23:53:43.405099
3793 23:53:43.405219
3794 23:53:43.408052 Settings after calibration
3795 23:53:43.408159
3796 23:53:43.411308 [DramcRunTimeConfig]
3797 23:53:43.414390 TransferPLLToSPMControl - MODE SW PHYPLL
3798 23:53:43.414530 TX_TRACKING: ON
3799 23:53:43.418103 RX_TRACKING: ON
3800 23:53:43.418216 HW_GATING: ON
3801 23:53:43.421363 HW_GATING DBG: OFF
3802 23:53:43.421458 ddr_geometry:1
3803 23:53:43.421525 ddr_geometry:1
3804 23:53:43.424981 ddr_geometry:1
3805 23:53:43.425101 ddr_geometry:1
3806 23:53:43.427825 ddr_geometry:1
3807 23:53:43.427960 ddr_geometry:1
3808 23:53:43.428052 ddr_geometry:1
3809 23:53:43.431118 ddr_geometry:1
3810 23:53:43.434334 High Freq DUMMY_READ_FOR_TRACKING: ON
3811 23:53:43.434454 ZQCS_ENABLE_LP4: OFF
3812 23:53:43.437782 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3813 23:53:43.441090 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3814 23:53:43.444763 SPM_CONTROL_AFTERK: ON
3815 23:53:43.447725 IMPEDANCE_TRACKING: ON
3816 23:53:43.447844 TEMP_SENSOR: ON
3817 23:53:43.451302 PER_BANK_REFRESH: ON
3818 23:53:43.451419 HW_SAVE_FOR_SR: ON
3819 23:53:43.454697 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3820 23:53:43.458123 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3821 23:53:43.461208 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3822 23:53:43.464462 Read ODT Tracking: ON
3823 23:53:43.464548 =========================
3824 23:53:43.464615
3825 23:53:43.467670 [TA2_TEST]
3826 23:53:43.467768 === TA2 HW
3827 23:53:43.474872 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3828 23:53:43.477579 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3829 23:53:43.481381 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3830 23:53:43.487544 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3831 23:53:43.487627
3832 23:53:43.491029 [MEM_TEST] 03: After run time config
3833 23:53:43.501863 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3834 23:53:43.505179 [complex_mem_test] start addr:0x40024000, len:131072
3835 23:53:43.709546 1st complex R/W mem test pass
3836 23:53:43.716034 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3837 23:53:43.719777 sync preloader write leveling
3838 23:53:43.722792 sync preloader cbt_mr12
3839 23:53:43.722869 sync preloader cbt_clk_dly
3840 23:53:43.726247 sync preloader cbt_cmd_dly
3841 23:53:43.729536 sync preloader cbt_cs
3842 23:53:43.733116 sync preloader cbt_ca_perbit_delay
3843 23:53:43.733241 sync preloader clk_delay
3844 23:53:43.735994 sync preloader dqs_delay
3845 23:53:43.739509 sync preloader u1Gating2T_Save
3846 23:53:43.742743 sync preloader u1Gating05T_Save
3847 23:53:43.746047 sync preloader u1Gatingfine_tune_Save
3848 23:53:43.749592 sync preloader u1Gatingucpass_count_Save
3849 23:53:43.752724 sync preloader u1TxWindowPerbitVref_Save
3850 23:53:43.756529 sync preloader u1TxCenter_min_Save
3851 23:53:43.759588 sync preloader u1TxCenter_max_Save
3852 23:53:43.762516 sync preloader u1Txwin_center_Save
3853 23:53:43.765877 sync preloader u1Txfirst_pass_Save
3854 23:53:43.769485 sync preloader u1Txlast_pass_Save
3855 23:53:43.769563 sync preloader u1RxDatlat_Save
3856 23:53:43.772578 sync preloader u1RxWinPerbitVref_Save
3857 23:53:43.779499 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3858 23:53:43.783267 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3859 23:53:43.786283 sync preloader delay_cell_unit
3860 23:53:43.792983 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3861 23:53:43.796206 sync preloader write leveling
3862 23:53:43.796280 sync preloader cbt_mr12
3863 23:53:43.799431 sync preloader cbt_clk_dly
3864 23:53:43.802461 sync preloader cbt_cmd_dly
3865 23:53:43.802537 sync preloader cbt_cs
3866 23:53:43.806077 sync preloader cbt_ca_perbit_delay
3867 23:53:43.809180 sync preloader clk_delay
3868 23:53:43.812937 sync preloader dqs_delay
3869 23:53:43.813019 sync preloader u1Gating2T_Save
3870 23:53:43.816240 sync preloader u1Gating05T_Save
3871 23:53:43.819459 sync preloader u1Gatingfine_tune_Save
3872 23:53:43.822623 sync preloader u1Gatingucpass_count_Save
3873 23:53:43.826114 sync preloader u1TxWindowPerbitVref_Save
3874 23:53:43.829268 sync preloader u1TxCenter_min_Save
3875 23:53:43.833116 sync preloader u1TxCenter_max_Save
3876 23:53:43.835833 sync preloader u1Txwin_center_Save
3877 23:53:43.839223 sync preloader u1Txfirst_pass_Save
3878 23:53:43.842421 sync preloader u1Txlast_pass_Save
3879 23:53:43.846133 sync preloader u1RxDatlat_Save
3880 23:53:43.849211 sync preloader u1RxWinPerbitVref_Save
3881 23:53:43.852861 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3882 23:53:43.855746 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3883 23:53:43.859711 sync preloader delay_cell_unit
3884 23:53:43.866199 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3885 23:53:43.869136 sync preloader write leveling
3886 23:53:43.873160 sync preloader cbt_mr12
3887 23:53:43.873289 sync preloader cbt_clk_dly
3888 23:53:43.876062 sync preloader cbt_cmd_dly
3889 23:53:43.879169 sync preloader cbt_cs
3890 23:53:43.882542 sync preloader cbt_ca_perbit_delay
3891 23:53:43.882615 sync preloader clk_delay
3892 23:53:43.886035 sync preloader dqs_delay
3893 23:53:43.889353 sync preloader u1Gating2T_Save
3894 23:53:43.892923 sync preloader u1Gating05T_Save
3895 23:53:43.895880 sync preloader u1Gatingfine_tune_Save
3896 23:53:43.899217 sync preloader u1Gatingucpass_count_Save
3897 23:53:43.903079 sync preloader u1TxWindowPerbitVref_Save
3898 23:53:43.906218 sync preloader u1TxCenter_min_Save
3899 23:53:43.909173 sync preloader u1TxCenter_max_Save
3900 23:53:43.912546 sync preloader u1Txwin_center_Save
3901 23:53:43.916058 sync preloader u1Txfirst_pass_Save
3902 23:53:43.916160 sync preloader u1Txlast_pass_Save
3903 23:53:43.919159 sync preloader u1RxDatlat_Save
3904 23:53:43.923083 sync preloader u1RxWinPerbitVref_Save
3905 23:53:43.929442 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3906 23:53:43.932645 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3907 23:53:43.935996 sync preloader delay_cell_unit
3908 23:53:43.939165 just_for_test_dump_coreboot_params dump all params
3909 23:53:43.939250 dump source = 0x0
3910 23:53:43.942784 dump params frequency:1600
3911 23:53:43.945871 dump params rank number:2
3912 23:53:43.945954
3913 23:53:43.949195 dump params write leveling
3914 23:53:43.952805 write leveling[0][0][0] = 0x21
3915 23:53:43.952889 write leveling[0][0][1] = 0x1a
3916 23:53:43.955612 write leveling[0][1][0] = 0x23
3917 23:53:43.959209 write leveling[0][1][1] = 0x1d
3918 23:53:43.962689 write leveling[1][0][0] = 0x24
3919 23:53:43.965723 write leveling[1][0][1] = 0x1f
3920 23:53:43.965801 write leveling[1][1][0] = 0x24
3921 23:53:43.968936 write leveling[1][1][1] = 0x20
3922 23:53:43.972752 dump params cbt_cs
3923 23:53:43.972834 cbt_cs[0][0] = 0xa
3924 23:53:43.975693 cbt_cs[0][1] = 0xa
3925 23:53:43.975785 cbt_cs[1][0] = 0xa
3926 23:53:43.979206 cbt_cs[1][1] = 0xa
3927 23:53:43.979287 dump params cbt_mr12
3928 23:53:43.982414 cbt_mr12[0][0] = 0x16
3929 23:53:43.986115 cbt_mr12[0][1] = 0x16
3930 23:53:43.986192 cbt_mr12[1][0] = 0x16
3931 23:53:43.989291 cbt_mr12[1][1] = 0x18
3932 23:53:43.989382 dump params tx window
3933 23:53:43.992452 tx_center_min[0][0][0] = 980
3934 23:53:43.995714 tx_center_max[0][0][0] = 987
3935 23:53:43.999400 tx_center_min[0][0][1] = 973
3936 23:53:44.002439 tx_center_max[0][0][1] = 979
3937 23:53:44.002516 tx_center_min[0][1][0] = 983
3938 23:53:44.005947 tx_center_max[0][1][0] = 990
3939 23:53:44.009118 tx_center_min[0][1][1] = 978
3940 23:53:44.012440 tx_center_max[0][1][1] = 982
3941 23:53:44.015925 tx_center_min[1][0][0] = 983
3942 23:53:44.016005 tx_center_max[1][0][0] = 989
3943 23:53:44.019089 tx_center_min[1][0][1] = 975
3944 23:53:44.022565 tx_center_max[1][0][1] = 980
3945 23:53:44.025791 tx_center_min[1][1][0] = 983
3946 23:53:44.025874 tx_center_max[1][1][0] = 989
3947 23:53:44.029010 tx_center_min[1][1][1] = 977
3948 23:53:44.033035 tx_center_max[1][1][1] = 981
3949 23:53:44.036202 dump params tx window
3950 23:53:44.036280 tx_win_center[0][0][0] = 987
3951 23:53:44.039610 tx_first_pass[0][0][0] = 975
3952 23:53:44.042522 tx_last_pass[0][0][0] = 999
3953 23:53:44.045869 tx_win_center[0][0][1] = 986
3954 23:53:44.048938 tx_first_pass[0][0][1] = 974
3955 23:53:44.049058 tx_last_pass[0][0][1] = 998
3956 23:53:44.052954 tx_win_center[0][0][2] = 985
3957 23:53:44.055952 tx_first_pass[0][0][2] = 974
3958 23:53:44.059560 tx_last_pass[0][0][2] = 997
3959 23:53:44.059659 tx_win_center[0][0][3] = 980
3960 23:53:44.062630 tx_first_pass[0][0][3] = 968
3961 23:53:44.065866 tx_last_pass[0][0][3] = 992
3962 23:53:44.069287 tx_win_center[0][0][4] = 985
3963 23:53:44.069381 tx_first_pass[0][0][4] = 973
3964 23:53:44.072973 tx_last_pass[0][0][4] = 998
3965 23:53:44.076291 tx_win_center[0][0][5] = 981
3966 23:53:44.079586 tx_first_pass[0][0][5] = 969
3967 23:53:44.082824 tx_last_pass[0][0][5] = 993
3968 23:53:44.082935 tx_win_center[0][0][6] = 981
3969 23:53:44.085963 tx_first_pass[0][0][6] = 969
3970 23:53:44.089144 tx_last_pass[0][0][6] = 994
3971 23:53:44.092568 tx_win_center[0][0][7] = 983
3972 23:53:44.095756 tx_first_pass[0][0][7] = 972
3973 23:53:44.095834 tx_last_pass[0][0][7] = 995
3974 23:53:44.098864 tx_win_center[0][0][8] = 973
3975 23:53:44.102787 tx_first_pass[0][0][8] = 961
3976 23:53:44.105896 tx_last_pass[0][0][8] = 986
3977 23:53:44.105979 tx_win_center[0][0][9] = 976
3978 23:53:44.109072 tx_first_pass[0][0][9] = 963
3979 23:53:44.112710 tx_last_pass[0][0][9] = 989
3980 23:53:44.115992 tx_win_center[0][0][10] = 979
3981 23:53:44.119487 tx_first_pass[0][0][10] = 967
3982 23:53:44.119580 tx_last_pass[0][0][10] = 991
3983 23:53:44.122260 tx_win_center[0][0][11] = 973
3984 23:53:44.126002 tx_first_pass[0][0][11] = 961
3985 23:53:44.128749 tx_last_pass[0][0][11] = 985
3986 23:53:44.132739 tx_win_center[0][0][12] = 974
3987 23:53:44.132848 tx_first_pass[0][0][12] = 962
3988 23:53:44.135863 tx_last_pass[0][0][12] = 987
3989 23:53:44.139004 tx_win_center[0][0][13] = 973
3990 23:53:44.142208 tx_first_pass[0][0][13] = 961
3991 23:53:44.145679 tx_last_pass[0][0][13] = 985
3992 23:53:44.145769 tx_win_center[0][0][14] = 975
3993 23:53:44.149500 tx_first_pass[0][0][14] = 963
3994 23:53:44.152713 tx_last_pass[0][0][14] = 987
3995 23:53:44.156048 tx_win_center[0][0][15] = 978
3996 23:53:44.159231 tx_first_pass[0][0][15] = 966
3997 23:53:44.159345 tx_last_pass[0][0][15] = 990
3998 23:53:44.162295 tx_win_center[0][1][0] = 990
3999 23:53:44.165954 tx_first_pass[0][1][0] = 978
4000 23:53:44.168958 tx_last_pass[0][1][0] = 1002
4001 23:53:44.169067 tx_win_center[0][1][1] = 989
4002 23:53:44.172327 tx_first_pass[0][1][1] = 978
4003 23:53:44.175434 tx_last_pass[0][1][1] = 1000
4004 23:53:44.179021 tx_win_center[0][1][2] = 989
4005 23:53:44.182029 tx_first_pass[0][1][2] = 978
4006 23:53:44.182109 tx_last_pass[0][1][2] = 1000
4007 23:53:44.185752 tx_win_center[0][1][3] = 983
4008 23:53:44.188997 tx_first_pass[0][1][3] = 970
4009 23:53:44.192081 tx_last_pass[0][1][3] = 996
4010 23:53:44.195406 tx_win_center[0][1][4] = 989
4011 23:53:44.195503 tx_first_pass[0][1][4] = 977
4012 23:53:44.199039 tx_last_pass[0][1][4] = 1001
4013 23:53:44.202190 tx_win_center[0][1][5] = 984
4014 23:53:44.205420 tx_first_pass[0][1][5] = 972
4015 23:53:44.208723 tx_last_pass[0][1][5] = 996
4016 23:53:44.208829 tx_win_center[0][1][6] = 985
4017 23:53:44.211892 tx_first_pass[0][1][6] = 973
4018 23:53:44.215166 tx_last_pass[0][1][6] = 998
4019 23:53:44.219039 tx_win_center[0][1][7] = 987
4020 23:53:44.219120 tx_first_pass[0][1][7] = 976
4021 23:53:44.221794 tx_last_pass[0][1][7] = 999
4022 23:53:44.225641 tx_win_center[0][1][8] = 979
4023 23:53:44.228898 tx_first_pass[0][1][8] = 968
4024 23:53:44.232020 tx_last_pass[0][1][8] = 990
4025 23:53:44.232129 tx_win_center[0][1][9] = 979
4026 23:53:44.235194 tx_first_pass[0][1][9] = 968
4027 23:53:44.239143 tx_last_pass[0][1][9] = 990
4028 23:53:44.242393 tx_win_center[0][1][10] = 982
4029 23:53:44.242505 tx_first_pass[0][1][10] = 971
4030 23:53:44.245215 tx_last_pass[0][1][10] = 993
4031 23:53:44.249007 tx_win_center[0][1][11] = 978
4032 23:53:44.251678 tx_first_pass[0][1][11] = 967
4033 23:53:44.255148 tx_last_pass[0][1][11] = 989
4034 23:53:44.258903 tx_win_center[0][1][12] = 979
4035 23:53:44.259017 tx_first_pass[0][1][12] = 968
4036 23:53:44.262274 tx_last_pass[0][1][12] = 990
4037 23:53:44.265347 tx_win_center[0][1][13] = 978
4038 23:53:44.268474 tx_first_pass[0][1][13] = 967
4039 23:53:44.272201 tx_last_pass[0][1][13] = 989
4040 23:53:44.272313 tx_win_center[0][1][14] = 979
4041 23:53:44.275065 tx_first_pass[0][1][14] = 968
4042 23:53:44.278311 tx_last_pass[0][1][14] = 990
4043 23:53:44.282075 tx_win_center[0][1][15] = 980
4044 23:53:44.284991 tx_first_pass[0][1][15] = 969
4045 23:53:44.285104 tx_last_pass[0][1][15] = 991
4046 23:53:44.288567 tx_win_center[1][0][0] = 989
4047 23:53:44.292192 tx_first_pass[1][0][0] = 977
4048 23:53:44.295238 tx_last_pass[1][0][0] = 1002
4049 23:53:44.295326 tx_win_center[1][0][1] = 988
4050 23:53:44.298910 tx_first_pass[1][0][1] = 976
4051 23:53:44.302170 tx_last_pass[1][0][1] = 1000
4052 23:53:44.305408 tx_win_center[1][0][2] = 985
4053 23:53:44.308516 tx_first_pass[1][0][2] = 973
4054 23:53:44.308604 tx_last_pass[1][0][2] = 998
4055 23:53:44.312089 tx_win_center[1][0][3] = 983
4056 23:53:44.315264 tx_first_pass[1][0][3] = 971
4057 23:53:44.318498 tx_last_pass[1][0][3] = 995
4058 23:53:44.318586 tx_win_center[1][0][4] = 987
4059 23:53:44.322251 tx_first_pass[1][0][4] = 975
4060 23:53:44.325485 tx_last_pass[1][0][4] = 999
4061 23:53:44.328485 tx_win_center[1][0][5] = 988
4062 23:53:44.331902 tx_first_pass[1][0][5] = 976
4063 23:53:44.331990 tx_last_pass[1][0][5] = 1000
4064 23:53:44.335506 tx_win_center[1][0][6] = 989
4065 23:53:44.338698 tx_first_pass[1][0][6] = 977
4066 23:53:44.341981 tx_last_pass[1][0][6] = 1002
4067 23:53:44.342068 tx_win_center[1][0][7] = 986
4068 23:53:44.345479 tx_first_pass[1][0][7] = 975
4069 23:53:44.348750 tx_last_pass[1][0][7] = 998
4070 23:53:44.352070 tx_win_center[1][0][8] = 978
4071 23:53:44.355314 tx_first_pass[1][0][8] = 966
4072 23:53:44.355391 tx_last_pass[1][0][8] = 991
4073 23:53:44.358982 tx_win_center[1][0][9] = 978
4074 23:53:44.362283 tx_first_pass[1][0][9] = 966
4075 23:53:44.365541 tx_last_pass[1][0][9] = 990
4076 23:53:44.365629 tx_win_center[1][0][10] = 979
4077 23:53:44.368367 tx_first_pass[1][0][10] = 967
4078 23:53:44.371891 tx_last_pass[1][0][10] = 991
4079 23:53:44.375376 tx_win_center[1][0][11] = 980
4080 23:53:44.378999 tx_first_pass[1][0][11] = 968
4081 23:53:44.379088 tx_last_pass[1][0][11] = 992
4082 23:53:44.381994 tx_win_center[1][0][12] = 980
4083 23:53:44.385579 tx_first_pass[1][0][12] = 968
4084 23:53:44.388855 tx_last_pass[1][0][12] = 992
4085 23:53:44.392128 tx_win_center[1][0][13] = 980
4086 23:53:44.392236 tx_first_pass[1][0][13] = 969
4087 23:53:44.395810 tx_last_pass[1][0][13] = 991
4088 23:53:44.398588 tx_win_center[1][0][14] = 979
4089 23:53:44.402175 tx_first_pass[1][0][14] = 968
4090 23:53:44.405197 tx_last_pass[1][0][14] = 991
4091 23:53:44.405318 tx_win_center[1][0][15] = 975
4092 23:53:44.408534 tx_first_pass[1][0][15] = 963
4093 23:53:44.412243 tx_last_pass[1][0][15] = 988
4094 23:53:44.415575 tx_win_center[1][1][0] = 989
4095 23:53:44.418953 tx_first_pass[1][1][0] = 977
4096 23:53:44.419028 tx_last_pass[1][1][0] = 1002
4097 23:53:44.422135 tx_win_center[1][1][1] = 988
4098 23:53:44.425460 tx_first_pass[1][1][1] = 977
4099 23:53:44.428570 tx_last_pass[1][1][1] = 1000
4100 23:53:44.432330 tx_win_center[1][1][2] = 985
4101 23:53:44.432421 tx_first_pass[1][1][2] = 974
4102 23:53:44.435687 tx_last_pass[1][1][2] = 997
4103 23:53:44.438737 tx_win_center[1][1][3] = 983
4104 23:53:44.441948 tx_first_pass[1][1][3] = 971
4105 23:53:44.442052 tx_last_pass[1][1][3] = 996
4106 23:53:44.445825 tx_win_center[1][1][4] = 986
4107 23:53:44.448948 tx_first_pass[1][1][4] = 975
4108 23:53:44.452152 tx_last_pass[1][1][4] = 998
4109 23:53:44.452253 tx_win_center[1][1][5] = 988
4110 23:53:44.455387 tx_first_pass[1][1][5] = 977
4111 23:53:44.458695 tx_last_pass[1][1][5] = 1000
4112 23:53:44.461896 tx_win_center[1][1][6] = 989
4113 23:53:44.465740 tx_first_pass[1][1][6] = 977
4114 23:53:44.465827 tx_last_pass[1][1][6] = 1001
4115 23:53:44.469058 tx_win_center[1][1][7] = 987
4116 23:53:44.472386 tx_first_pass[1][1][7] = 976
4117 23:53:44.475312 tx_last_pass[1][1][7] = 998
4118 23:53:44.479037 tx_win_center[1][1][8] = 980
4119 23:53:44.479145 tx_first_pass[1][1][8] = 969
4120 23:53:44.482592 tx_last_pass[1][1][8] = 991
4121 23:53:44.485449 tx_win_center[1][1][9] = 979
4122 23:53:44.488907 tx_first_pass[1][1][9] = 968
4123 23:53:44.489012 tx_last_pass[1][1][9] = 991
4124 23:53:44.492221 tx_win_center[1][1][10] = 980
4125 23:53:44.495330 tx_first_pass[1][1][10] = 969
4126 23:53:44.498825 tx_last_pass[1][1][10] = 991
4127 23:53:44.502207 tx_win_center[1][1][11] = 981
4128 23:53:44.502309 tx_first_pass[1][1][11] = 969
4129 23:53:44.505428 tx_last_pass[1][1][11] = 993
4130 23:53:44.508886 tx_win_center[1][1][12] = 980
4131 23:53:44.512462 tx_first_pass[1][1][12] = 969
4132 23:53:44.515819 tx_last_pass[1][1][12] = 992
4133 23:53:44.515897 tx_win_center[1][1][13] = 981
4134 23:53:44.519018 tx_first_pass[1][1][13] = 970
4135 23:53:44.522192 tx_last_pass[1][1][13] = 992
4136 23:53:44.526061 tx_win_center[1][1][14] = 980
4137 23:53:44.529293 tx_first_pass[1][1][14] = 969
4138 23:53:44.529368 tx_last_pass[1][1][14] = 992
4139 23:53:44.532519 tx_win_center[1][1][15] = 977
4140 23:53:44.535717 tx_first_pass[1][1][15] = 966
4141 23:53:44.539001 tx_last_pass[1][1][15] = 989
4142 23:53:44.539108 dump params rx window
4143 23:53:44.542249 rx_firspass[0][0][0] = 9
4144 23:53:44.545892 rx_lastpass[0][0][0] = 42
4145 23:53:44.545974 rx_firspass[0][0][1] = 9
4146 23:53:44.549154 rx_lastpass[0][0][1] = 40
4147 23:53:44.552132 rx_firspass[0][0][2] = 9
4148 23:53:44.556028 rx_lastpass[0][0][2] = 39
4149 23:53:44.556133 rx_firspass[0][0][3] = -1
4150 23:53:44.559239 rx_lastpass[0][0][3] = 31
4151 23:53:44.562197 rx_firspass[0][0][4] = 7
4152 23:53:44.562298 rx_lastpass[0][0][4] = 39
4153 23:53:44.565463 rx_firspass[0][0][5] = 3
4154 23:53:44.568816 rx_lastpass[0][0][5] = 29
4155 23:53:44.568893 rx_firspass[0][0][6] = 2
4156 23:53:44.572614 rx_lastpass[0][0][6] = 32
4157 23:53:44.575772 rx_firspass[0][0][7] = 4
4158 23:53:44.578983 rx_lastpass[0][0][7] = 34
4159 23:53:44.579116 rx_firspass[0][0][8] = 3
4160 23:53:44.582623 rx_lastpass[0][0][8] = 34
4161 23:53:44.585750 rx_firspass[0][0][9] = 5
4162 23:53:44.585914 rx_lastpass[0][0][9] = 35
4163 23:53:44.588799 rx_firspass[0][0][10] = 9
4164 23:53:44.592371 rx_lastpass[0][0][10] = 38
4165 23:53:44.592504 rx_firspass[0][0][11] = 3
4166 23:53:44.595988 rx_lastpass[0][0][11] = 30
4167 23:53:44.598976 rx_firspass[0][0][12] = 5
4168 23:53:44.602984 rx_lastpass[0][0][12] = 34
4169 23:53:44.603091 rx_firspass[0][0][13] = 1
4170 23:53:44.605733 rx_lastpass[0][0][13] = 31
4171 23:53:44.609491 rx_firspass[0][0][14] = 3
4172 23:53:44.612320 rx_lastpass[0][0][14] = 33
4173 23:53:44.612424 rx_firspass[0][0][15] = 4
4174 23:53:44.615822 rx_lastpass[0][0][15] = 35
4175 23:53:44.618670 rx_firspass[0][1][0] = 10
4176 23:53:44.618778 rx_lastpass[0][1][0] = 42
4177 23:53:44.622132 rx_firspass[0][1][1] = 7
4178 23:53:44.625631 rx_lastpass[0][1][1] = 42
4179 23:53:44.629043 rx_firspass[0][1][2] = 8
4180 23:53:44.629154 rx_lastpass[0][1][2] = 42
4181 23:53:44.632058 rx_firspass[0][1][3] = -1
4182 23:53:44.635754 rx_lastpass[0][1][3] = 32
4183 23:53:44.635853 rx_firspass[0][1][4] = 6
4184 23:53:44.638903 rx_lastpass[0][1][4] = 40
4185 23:53:44.641992 rx_firspass[0][1][5] = 0
4186 23:53:44.642081 rx_lastpass[0][1][5] = 35
4187 23:53:44.645863 rx_firspass[0][1][6] = 3
4188 23:53:44.649003 rx_lastpass[0][1][6] = 36
4189 23:53:44.652184 rx_firspass[0][1][7] = 3
4190 23:53:44.652278 rx_lastpass[0][1][7] = 35
4191 23:53:44.655349 rx_firspass[0][1][8] = 1
4192 23:53:44.659248 rx_lastpass[0][1][8] = 36
4193 23:53:44.659404 rx_firspass[0][1][9] = 3
4194 23:53:44.662387 rx_lastpass[0][1][9] = 37
4195 23:53:44.665488 rx_firspass[0][1][10] = 6
4196 23:53:44.668569 rx_lastpass[0][1][10] = 42
4197 23:53:44.668743 rx_firspass[0][1][11] = 0
4198 23:53:44.672410 rx_lastpass[0][1][11] = 34
4199 23:53:44.675472 rx_firspass[0][1][12] = 3
4200 23:53:44.675633 rx_lastpass[0][1][12] = 37
4201 23:53:44.678619 rx_firspass[0][1][13] = 0
4202 23:53:44.682520 rx_lastpass[0][1][13] = 33
4203 23:53:44.685744 rx_firspass[0][1][14] = 3
4204 23:53:44.685891 rx_lastpass[0][1][14] = 35
4205 23:53:44.688588 rx_firspass[0][1][15] = 4
4206 23:53:44.692300 rx_lastpass[0][1][15] = 37
4207 23:53:44.692417 rx_firspass[1][0][0] = 8
4208 23:53:44.695542 rx_lastpass[1][0][0] = 40
4209 23:53:44.698549 rx_firspass[1][0][1] = 7
4210 23:53:44.702560 rx_lastpass[1][0][1] = 38
4211 23:53:44.702666 rx_firspass[1][0][2] = 1
4212 23:53:44.705623 rx_lastpass[1][0][2] = 32
4213 23:53:44.709008 rx_firspass[1][0][3] = 0
4214 23:53:44.709097 rx_lastpass[1][0][3] = 31
4215 23:53:44.712249 rx_firspass[1][0][4] = 4
4216 23:53:44.715559 rx_lastpass[1][0][4] = 33
4217 23:53:44.715655 rx_firspass[1][0][5] = 9
4218 23:53:44.719398 rx_lastpass[1][0][5] = 38
4219 23:53:44.722519 rx_firspass[1][0][6] = 10
4220 23:53:44.725433 rx_lastpass[1][0][6] = 40
4221 23:53:44.725519 rx_firspass[1][0][7] = 5
4222 23:53:44.728959 rx_lastpass[1][0][7] = 33
4223 23:53:44.732448 rx_firspass[1][0][8] = 3
4224 23:53:44.732533 rx_lastpass[1][0][8] = 35
4225 23:53:44.735441 rx_firspass[1][0][9] = 4
4226 23:53:44.739033 rx_lastpass[1][0][9] = 35
4227 23:53:44.739118 rx_firspass[1][0][10] = 2
4228 23:53:44.742472 rx_lastpass[1][0][10] = 34
4229 23:53:44.745655 rx_firspass[1][0][11] = 4
4230 23:53:44.748918 rx_lastpass[1][0][11] = 34
4231 23:53:44.749003 rx_firspass[1][0][12] = 5
4232 23:53:44.751947 rx_lastpass[1][0][12] = 35
4233 23:53:44.755764 rx_firspass[1][0][13] = 5
4234 23:53:44.759047 rx_lastpass[1][0][13] = 32
4235 23:53:44.759131 rx_firspass[1][0][14] = 3
4236 23:53:44.762006 rx_lastpass[1][0][14] = 34
4237 23:53:44.765780 rx_firspass[1][0][15] = 0
4238 23:53:44.765873 rx_lastpass[1][0][15] = 32
4239 23:53:44.769096 rx_firspass[1][1][0] = 7
4240 23:53:44.772095 rx_lastpass[1][1][0] = 42
4241 23:53:44.772181 rx_firspass[1][1][1] = 5
4242 23:53:44.775343 rx_lastpass[1][1][1] = 41
4243 23:53:44.779279 rx_firspass[1][1][2] = 0
4244 23:53:44.782377 rx_lastpass[1][1][2] = 35
4245 23:53:44.782462 rx_firspass[1][1][3] = -3
4246 23:53:44.785470 rx_lastpass[1][1][3] = 33
4247 23:53:44.788874 rx_firspass[1][1][4] = 2
4248 23:53:44.788958 rx_lastpass[1][1][4] = 36
4249 23:53:44.792539 rx_firspass[1][1][5] = 5
4250 23:53:44.795640 rx_lastpass[1][1][5] = 41
4251 23:53:44.795727 rx_firspass[1][1][6] = 7
4252 23:53:44.799230 rx_lastpass[1][1][6] = 42
4253 23:53:44.802341 rx_firspass[1][1][7] = 2
4254 23:53:44.805580 rx_lastpass[1][1][7] = 36
4255 23:53:44.805669 rx_firspass[1][1][8] = 1
4256 23:53:44.808671 rx_lastpass[1][1][8] = 37
4257 23:53:44.812336 rx_firspass[1][1][9] = 1
4258 23:53:44.812432 rx_lastpass[1][1][9] = 37
4259 23:53:44.815315 rx_firspass[1][1][10] = 3
4260 23:53:44.818867 rx_lastpass[1][1][10] = 36
4261 23:53:44.822097 rx_firspass[1][1][11] = 3
4262 23:53:44.822191 rx_lastpass[1][1][11] = 38
4263 23:53:44.825609 rx_firspass[1][1][12] = 4
4264 23:53:44.828680 rx_lastpass[1][1][12] = 39
4265 23:53:44.828766 rx_firspass[1][1][13] = 3
4266 23:53:44.832284 rx_lastpass[1][1][13] = 36
4267 23:53:44.835284 rx_firspass[1][1][14] = 3
4268 23:53:44.838779 rx_lastpass[1][1][14] = 36
4269 23:53:44.838865 rx_firspass[1][1][15] = 0
4270 23:53:44.841952 rx_lastpass[1][1][15] = 34
4271 23:53:44.845452 dump params clk_delay
4272 23:53:44.845537 clk_delay[0] = -1
4273 23:53:44.849100 clk_delay[1] = 0
4274 23:53:44.849185 dump params dqs_delay
4275 23:53:44.852419 dqs_delay[0][0] = 0
4276 23:53:44.852503 dqs_delay[0][1] = -1
4277 23:53:44.855467 dqs_delay[1][0] = -1
4278 23:53:44.855551 dqs_delay[1][1] = 0
4279 23:53:44.858478 dump params delay_cell_unit = 762
4280 23:53:44.862427 dump source = 0x0
4281 23:53:44.865367 dump params frequency:1200
4282 23:53:44.865454 dump params rank number:2
4283 23:53:44.865522
4284 23:53:44.868552 dump params write leveling
4285 23:53:44.872377 write leveling[0][0][0] = 0x0
4286 23:53:44.875699 write leveling[0][0][1] = 0x0
4287 23:53:44.878813 write leveling[0][1][0] = 0x0
4288 23:53:44.878948 write leveling[0][1][1] = 0x0
4289 23:53:44.881983 write leveling[1][0][0] = 0x0
4290 23:53:44.885221 write leveling[1][0][1] = 0x0
4291 23:53:44.888969 write leveling[1][1][0] = 0x0
4292 23:53:44.892059 write leveling[1][1][1] = 0x0
4293 23:53:44.892167 dump params cbt_cs
4294 23:53:44.895240 cbt_cs[0][0] = 0x0
4295 23:53:44.895344 cbt_cs[0][1] = 0x0
4296 23:53:44.899022 cbt_cs[1][0] = 0x0
4297 23:53:44.899124 cbt_cs[1][1] = 0x0
4298 23:53:44.902241 dump params cbt_mr12
4299 23:53:44.902380 cbt_mr12[0][0] = 0x0
4300 23:53:44.905309 cbt_mr12[0][1] = 0x0
4301 23:53:44.905444 cbt_mr12[1][0] = 0x0
4302 23:53:44.908446 cbt_mr12[1][1] = 0x0
4303 23:53:44.912481 dump params tx window
4304 23:53:44.912617 tx_center_min[0][0][0] = 0
4305 23:53:44.915559 tx_center_max[0][0][0] = 0
4306 23:53:44.918696 tx_center_min[0][0][1] = 0
4307 23:53:44.918803 tx_center_max[0][0][1] = 0
4308 23:53:44.922080 tx_center_min[0][1][0] = 0
4309 23:53:44.925134 tx_center_max[0][1][0] = 0
4310 23:53:44.928751 tx_center_min[0][1][1] = 0
4311 23:53:44.928856 tx_center_max[0][1][1] = 0
4312 23:53:44.932091 tx_center_min[1][0][0] = 0
4313 23:53:44.935692 tx_center_max[1][0][0] = 0
4314 23:53:44.938452 tx_center_min[1][0][1] = 0
4315 23:53:44.938535 tx_center_max[1][0][1] = 0
4316 23:53:44.942042 tx_center_min[1][1][0] = 0
4317 23:53:44.945598 tx_center_max[1][1][0] = 0
4318 23:53:44.948939 tx_center_min[1][1][1] = 0
4319 23:53:44.949020 tx_center_max[1][1][1] = 0
4320 23:53:44.951877 dump params tx window
4321 23:53:44.955434 tx_win_center[0][0][0] = 0
4322 23:53:44.955547 tx_first_pass[0][0][0] = 0
4323 23:53:44.959271 tx_last_pass[0][0][0] = 0
4324 23:53:44.962189 tx_win_center[0][0][1] = 0
4325 23:53:44.965277 tx_first_pass[0][0][1] = 0
4326 23:53:44.965388 tx_last_pass[0][0][1] = 0
4327 23:53:44.968973 tx_win_center[0][0][2] = 0
4328 23:53:44.971908 tx_first_pass[0][0][2] = 0
4329 23:53:44.972026 tx_last_pass[0][0][2] = 0
4330 23:53:44.975766 tx_win_center[0][0][3] = 0
4331 23:53:44.978948 tx_first_pass[0][0][3] = 0
4332 23:53:44.982135 tx_last_pass[0][0][3] = 0
4333 23:53:44.982211 tx_win_center[0][0][4] = 0
4334 23:53:44.985153 tx_first_pass[0][0][4] = 0
4335 23:53:44.988281 tx_last_pass[0][0][4] = 0
4336 23:53:44.992109 tx_win_center[0][0][5] = 0
4337 23:53:44.992212 tx_first_pass[0][0][5] = 0
4338 23:53:44.995205 tx_last_pass[0][0][5] = 0
4339 23:53:44.999084 tx_win_center[0][0][6] = 0
4340 23:53:44.999160 tx_first_pass[0][0][6] = 0
4341 23:53:45.001993 tx_last_pass[0][0][6] = 0
4342 23:53:45.005911 tx_win_center[0][0][7] = 0
4343 23:53:45.009097 tx_first_pass[0][0][7] = 0
4344 23:53:45.009173 tx_last_pass[0][0][7] = 0
4345 23:53:45.012071 tx_win_center[0][0][8] = 0
4346 23:53:45.015368 tx_first_pass[0][0][8] = 0
4347 23:53:45.015442 tx_last_pass[0][0][8] = 0
4348 23:53:45.018610 tx_win_center[0][0][9] = 0
4349 23:53:45.021873 tx_first_pass[0][0][9] = 0
4350 23:53:45.025530 tx_last_pass[0][0][9] = 0
4351 23:53:45.025607 tx_win_center[0][0][10] = 0
4352 23:53:45.028582 tx_first_pass[0][0][10] = 0
4353 23:53:45.031874 tx_last_pass[0][0][10] = 0
4354 23:53:45.035569 tx_win_center[0][0][11] = 0
4355 23:53:45.035646 tx_first_pass[0][0][11] = 0
4356 23:53:45.039049 tx_last_pass[0][0][11] = 0
4357 23:53:45.042194 tx_win_center[0][0][12] = 0
4358 23:53:45.045923 tx_first_pass[0][0][12] = 0
4359 23:53:45.046000 tx_last_pass[0][0][12] = 0
4360 23:53:45.048937 tx_win_center[0][0][13] = 0
4361 23:53:45.052148 tx_first_pass[0][0][13] = 0
4362 23:53:45.055360 tx_last_pass[0][0][13] = 0
4363 23:53:45.055438 tx_win_center[0][0][14] = 0
4364 23:53:45.058688 tx_first_pass[0][0][14] = 0
4365 23:53:45.062091 tx_last_pass[0][0][14] = 0
4366 23:53:45.065479 tx_win_center[0][0][15] = 0
4367 23:53:45.065555 tx_first_pass[0][0][15] = 0
4368 23:53:45.068518 tx_last_pass[0][0][15] = 0
4369 23:53:45.072376 tx_win_center[0][1][0] = 0
4370 23:53:45.075390 tx_first_pass[0][1][0] = 0
4371 23:53:45.075467 tx_last_pass[0][1][0] = 0
4372 23:53:45.078583 tx_win_center[0][1][1] = 0
4373 23:53:45.082321 tx_first_pass[0][1][1] = 0
4374 23:53:45.082393 tx_last_pass[0][1][1] = 0
4375 23:53:45.085365 tx_win_center[0][1][2] = 0
4376 23:53:45.088780 tx_first_pass[0][1][2] = 0
4377 23:53:45.091827 tx_last_pass[0][1][2] = 0
4378 23:53:45.091899 tx_win_center[0][1][3] = 0
4379 23:53:45.095431 tx_first_pass[0][1][3] = 0
4380 23:53:45.098794 tx_last_pass[0][1][3] = 0
4381 23:53:45.102383 tx_win_center[0][1][4] = 0
4382 23:53:45.102481 tx_first_pass[0][1][4] = 0
4383 23:53:45.105590 tx_last_pass[0][1][4] = 0
4384 23:53:45.109251 tx_win_center[0][1][5] = 0
4385 23:53:45.109353 tx_first_pass[0][1][5] = 0
4386 23:53:45.112507 tx_last_pass[0][1][5] = 0
4387 23:53:45.115752 tx_win_center[0][1][6] = 0
4388 23:53:45.118961 tx_first_pass[0][1][6] = 0
4389 23:53:45.119043 tx_last_pass[0][1][6] = 0
4390 23:53:45.121960 tx_win_center[0][1][7] = 0
4391 23:53:45.125711 tx_first_pass[0][1][7] = 0
4392 23:53:45.125794 tx_last_pass[0][1][7] = 0
4393 23:53:45.128915 tx_win_center[0][1][8] = 0
4394 23:53:45.132250 tx_first_pass[0][1][8] = 0
4395 23:53:45.135452 tx_last_pass[0][1][8] = 0
4396 23:53:45.135558 tx_win_center[0][1][9] = 0
4397 23:53:45.138674 tx_first_pass[0][1][9] = 0
4398 23:53:45.142031 tx_last_pass[0][1][9] = 0
4399 23:53:45.145174 tx_win_center[0][1][10] = 0
4400 23:53:45.145279 tx_first_pass[0][1][10] = 0
4401 23:53:45.148651 tx_last_pass[0][1][10] = 0
4402 23:53:45.152027 tx_win_center[0][1][11] = 0
4403 23:53:45.155463 tx_first_pass[0][1][11] = 0
4404 23:53:45.155536 tx_last_pass[0][1][11] = 0
4405 23:53:45.158838 tx_win_center[0][1][12] = 0
4406 23:53:45.161920 tx_first_pass[0][1][12] = 0
4407 23:53:45.165218 tx_last_pass[0][1][12] = 0
4408 23:53:45.165325 tx_win_center[0][1][13] = 0
4409 23:53:45.168747 tx_first_pass[0][1][13] = 0
4410 23:53:45.172208 tx_last_pass[0][1][13] = 0
4411 23:53:45.175248 tx_win_center[0][1][14] = 0
4412 23:53:45.175322 tx_first_pass[0][1][14] = 0
4413 23:53:45.178802 tx_last_pass[0][1][14] = 0
4414 23:53:45.182189 tx_win_center[0][1][15] = 0
4415 23:53:45.185471 tx_first_pass[0][1][15] = 0
4416 23:53:45.185553 tx_last_pass[0][1][15] = 0
4417 23:53:45.189062 tx_win_center[1][0][0] = 0
4418 23:53:45.192409 tx_first_pass[1][0][0] = 0
4419 23:53:45.195402 tx_last_pass[1][0][0] = 0
4420 23:53:45.195499 tx_win_center[1][0][1] = 0
4421 23:53:45.199293 tx_first_pass[1][0][1] = 0
4422 23:53:45.202330 tx_last_pass[1][0][1] = 0
4423 23:53:45.202413 tx_win_center[1][0][2] = 0
4424 23:53:45.205952 tx_first_pass[1][0][2] = 0
4425 23:53:45.208646 tx_last_pass[1][0][2] = 0
4426 23:53:45.212232 tx_win_center[1][0][3] = 0
4427 23:53:45.212314 tx_first_pass[1][0][3] = 0
4428 23:53:45.215356 tx_last_pass[1][0][3] = 0
4429 23:53:45.219201 tx_win_center[1][0][4] = 0
4430 23:53:45.219283 tx_first_pass[1][0][4] = 0
4431 23:53:45.222408 tx_last_pass[1][0][4] = 0
4432 23:53:45.225517 tx_win_center[1][0][5] = 0
4433 23:53:45.228578 tx_first_pass[1][0][5] = 0
4434 23:53:45.228686 tx_last_pass[1][0][5] = 0
4435 23:53:45.232495 tx_win_center[1][0][6] = 0
4436 23:53:45.235665 tx_first_pass[1][0][6] = 0
4437 23:53:45.239220 tx_last_pass[1][0][6] = 0
4438 23:53:45.239306 tx_win_center[1][0][7] = 0
4439 23:53:45.242159 tx_first_pass[1][0][7] = 0
4440 23:53:45.245444 tx_last_pass[1][0][7] = 0
4441 23:53:45.245529 tx_win_center[1][0][8] = 0
4442 23:53:45.248588 tx_first_pass[1][0][8] = 0
4443 23:53:45.251921 tx_last_pass[1][0][8] = 0
4444 23:53:45.255577 tx_win_center[1][0][9] = 0
4445 23:53:45.255725 tx_first_pass[1][0][9] = 0
4446 23:53:45.258744 tx_last_pass[1][0][9] = 0
4447 23:53:45.262419 tx_win_center[1][0][10] = 0
4448 23:53:45.265686 tx_first_pass[1][0][10] = 0
4449 23:53:45.265804 tx_last_pass[1][0][10] = 0
4450 23:53:45.269028 tx_win_center[1][0][11] = 0
4451 23:53:45.271958 tx_first_pass[1][0][11] = 0
4452 23:53:45.275391 tx_last_pass[1][0][11] = 0
4453 23:53:45.275476 tx_win_center[1][0][12] = 0
4454 23:53:45.278996 tx_first_pass[1][0][12] = 0
4455 23:53:45.282347 tx_last_pass[1][0][12] = 0
4456 23:53:45.285373 tx_win_center[1][0][13] = 0
4457 23:53:45.285459 tx_first_pass[1][0][13] = 0
4458 23:53:45.288551 tx_last_pass[1][0][13] = 0
4459 23:53:45.291935 tx_win_center[1][0][14] = 0
4460 23:53:45.295465 tx_first_pass[1][0][14] = 0
4461 23:53:45.295551 tx_last_pass[1][0][14] = 0
4462 23:53:45.299000 tx_win_center[1][0][15] = 0
4463 23:53:45.302141 tx_first_pass[1][0][15] = 0
4464 23:53:45.302227 tx_last_pass[1][0][15] = 0
4465 23:53:45.306055 tx_win_center[1][1][0] = 0
4466 23:53:45.309092 tx_first_pass[1][1][0] = 0
4467 23:53:45.312278 tx_last_pass[1][1][0] = 0
4468 23:53:45.312380 tx_win_center[1][1][1] = 0
4469 23:53:45.315461 tx_first_pass[1][1][1] = 0
4470 23:53:45.319189 tx_last_pass[1][1][1] = 0
4471 23:53:45.322333 tx_win_center[1][1][2] = 0
4472 23:53:45.322419 tx_first_pass[1][1][2] = 0
4473 23:53:45.325497 tx_last_pass[1][1][2] = 0
4474 23:53:45.328647 tx_win_center[1][1][3] = 0
4475 23:53:45.328718 tx_first_pass[1][1][3] = 0
4476 23:53:45.331963 tx_last_pass[1][1][3] = 0
4477 23:53:45.335158 tx_win_center[1][1][4] = 0
4478 23:53:45.338956 tx_first_pass[1][1][4] = 0
4479 23:53:45.339039 tx_last_pass[1][1][4] = 0
4480 23:53:45.341988 tx_win_center[1][1][5] = 0
4481 23:53:45.345502 tx_first_pass[1][1][5] = 0
4482 23:53:45.348604 tx_last_pass[1][1][5] = 0
4483 23:53:45.348683 tx_win_center[1][1][6] = 0
4484 23:53:45.351771 tx_first_pass[1][1][6] = 0
4485 23:53:45.355509 tx_last_pass[1][1][6] = 0
4486 23:53:45.355584 tx_win_center[1][1][7] = 0
4487 23:53:45.359085 tx_first_pass[1][1][7] = 0
4488 23:53:45.361965 tx_last_pass[1][1][7] = 0
4489 23:53:45.365818 tx_win_center[1][1][8] = 0
4490 23:53:45.365903 tx_first_pass[1][1][8] = 0
4491 23:53:45.368855 tx_last_pass[1][1][8] = 0
4492 23:53:45.371780 tx_win_center[1][1][9] = 0
4493 23:53:45.375514 tx_first_pass[1][1][9] = 0
4494 23:53:45.375600 tx_last_pass[1][1][9] = 0
4495 23:53:45.378609 tx_win_center[1][1][10] = 0
4496 23:53:45.382340 tx_first_pass[1][1][10] = 0
4497 23:53:45.385223 tx_last_pass[1][1][10] = 0
4498 23:53:45.385349 tx_win_center[1][1][11] = 0
4499 23:53:45.388587 tx_first_pass[1][1][11] = 0
4500 23:53:45.391902 tx_last_pass[1][1][11] = 0
4501 23:53:45.395034 tx_win_center[1][1][12] = 0
4502 23:53:45.395119 tx_first_pass[1][1][12] = 0
4503 23:53:45.398425 tx_last_pass[1][1][12] = 0
4504 23:53:45.402132 tx_win_center[1][1][13] = 0
4505 23:53:45.404985 tx_first_pass[1][1][13] = 0
4506 23:53:45.405071 tx_last_pass[1][1][13] = 0
4507 23:53:45.408495 tx_win_center[1][1][14] = 0
4508 23:53:45.411679 tx_first_pass[1][1][14] = 0
4509 23:53:45.415228 tx_last_pass[1][1][14] = 0
4510 23:53:45.415309 tx_win_center[1][1][15] = 0
4511 23:53:45.418361 tx_first_pass[1][1][15] = 0
4512 23:53:45.422023 tx_last_pass[1][1][15] = 0
4513 23:53:45.422114 dump params rx window
4514 23:53:45.425014 rx_firspass[0][0][0] = 0
4515 23:53:45.428719 rx_lastpass[0][0][0] = 0
4516 23:53:45.428792 rx_firspass[0][0][1] = 0
4517 23:53:45.431899 rx_lastpass[0][0][1] = 0
4518 23:53:45.435289 rx_firspass[0][0][2] = 0
4519 23:53:45.438427 rx_lastpass[0][0][2] = 0
4520 23:53:45.438498 rx_firspass[0][0][3] = 0
4521 23:53:45.442146 rx_lastpass[0][0][3] = 0
4522 23:53:45.445436 rx_firspass[0][0][4] = 0
4523 23:53:45.445506 rx_lastpass[0][0][4] = 0
4524 23:53:45.448567 rx_firspass[0][0][5] = 0
4525 23:53:45.452073 rx_lastpass[0][0][5] = 0
4526 23:53:45.452143 rx_firspass[0][0][6] = 0
4527 23:53:45.455032 rx_lastpass[0][0][6] = 0
4528 23:53:45.458239 rx_firspass[0][0][7] = 0
4529 23:53:45.458336 rx_lastpass[0][0][7] = 0
4530 23:53:45.461920 rx_firspass[0][0][8] = 0
4531 23:53:45.465215 rx_lastpass[0][0][8] = 0
4532 23:53:45.465323 rx_firspass[0][0][9] = 0
4533 23:53:45.468712 rx_lastpass[0][0][9] = 0
4534 23:53:45.471940 rx_firspass[0][0][10] = 0
4535 23:53:45.475098 rx_lastpass[0][0][10] = 0
4536 23:53:45.475174 rx_firspass[0][0][11] = 0
4537 23:53:45.478253 rx_lastpass[0][0][11] = 0
4538 23:53:45.482226 rx_firspass[0][0][12] = 0
4539 23:53:45.482325 rx_lastpass[0][0][12] = 0
4540 23:53:45.485575 rx_firspass[0][0][13] = 0
4541 23:53:45.488555 rx_lastpass[0][0][13] = 0
4542 23:53:45.488632 rx_firspass[0][0][14] = 0
4543 23:53:45.491641 rx_lastpass[0][0][14] = 0
4544 23:53:45.495397 rx_firspass[0][0][15] = 0
4545 23:53:45.498401 rx_lastpass[0][0][15] = 0
4546 23:53:45.498502 rx_firspass[0][1][0] = 0
4547 23:53:45.501966 rx_lastpass[0][1][0] = 0
4548 23:53:45.505025 rx_firspass[0][1][1] = 0
4549 23:53:45.505126 rx_lastpass[0][1][1] = 0
4550 23:53:45.508489 rx_firspass[0][1][2] = 0
4551 23:53:45.511972 rx_lastpass[0][1][2] = 0
4552 23:53:45.512071 rx_firspass[0][1][3] = 0
4553 23:53:45.515285 rx_lastpass[0][1][3] = 0
4554 23:53:45.518199 rx_firspass[0][1][4] = 0
4555 23:53:45.521704 rx_lastpass[0][1][4] = 0
4556 23:53:45.521810 rx_firspass[0][1][5] = 0
4557 23:53:45.524780 rx_lastpass[0][1][5] = 0
4558 23:53:45.528572 rx_firspass[0][1][6] = 0
4559 23:53:45.528669 rx_lastpass[0][1][6] = 0
4560 23:53:45.531803 rx_firspass[0][1][7] = 0
4561 23:53:45.535216 rx_lastpass[0][1][7] = 0
4562 23:53:45.535351 rx_firspass[0][1][8] = 0
4563 23:53:45.538029 rx_lastpass[0][1][8] = 0
4564 23:53:45.541967 rx_firspass[0][1][9] = 0
4565 23:53:45.542039 rx_lastpass[0][1][9] = 0
4566 23:53:45.545117 rx_firspass[0][1][10] = 0
4567 23:53:45.548285 rx_lastpass[0][1][10] = 0
4568 23:53:45.552186 rx_firspass[0][1][11] = 0
4569 23:53:45.552259 rx_lastpass[0][1][11] = 0
4570 23:53:45.555019 rx_firspass[0][1][12] = 0
4571 23:53:45.558532 rx_lastpass[0][1][12] = 0
4572 23:53:45.558628 rx_firspass[0][1][13] = 0
4573 23:53:45.561585 rx_lastpass[0][1][13] = 0
4574 23:53:45.564932 rx_firspass[0][1][14] = 0
4575 23:53:45.565005 rx_lastpass[0][1][14] = 0
4576 23:53:45.568242 rx_firspass[0][1][15] = 0
4577 23:53:45.571585 rx_lastpass[0][1][15] = 0
4578 23:53:45.575270 rx_firspass[1][0][0] = 0
4579 23:53:45.575342 rx_lastpass[1][0][0] = 0
4580 23:53:45.578450 rx_firspass[1][0][1] = 0
4581 23:53:45.581650 rx_lastpass[1][0][1] = 0
4582 23:53:45.581722 rx_firspass[1][0][2] = 0
4583 23:53:45.584868 rx_lastpass[1][0][2] = 0
4584 23:53:45.588450 rx_firspass[1][0][3] = 0
4585 23:53:45.588550 rx_lastpass[1][0][3] = 0
4586 23:53:45.591819 rx_firspass[1][0][4] = 0
4587 23:53:45.594964 rx_lastpass[1][0][4] = 0
4588 23:53:45.595034 rx_firspass[1][0][5] = 0
4589 23:53:45.598806 rx_lastpass[1][0][5] = 0
4590 23:53:45.601963 rx_firspass[1][0][6] = 0
4591 23:53:45.602033 rx_lastpass[1][0][6] = 0
4592 23:53:45.605015 rx_firspass[1][0][7] = 0
4593 23:53:45.608549 rx_lastpass[1][0][7] = 0
4594 23:53:45.611718 rx_firspass[1][0][8] = 0
4595 23:53:45.611818 rx_lastpass[1][0][8] = 0
4596 23:53:45.614822 rx_firspass[1][0][9] = 0
4597 23:53:45.618467 rx_lastpass[1][0][9] = 0
4598 23:53:45.618559 rx_firspass[1][0][10] = 0
4599 23:53:45.622002 rx_lastpass[1][0][10] = 0
4600 23:53:45.625271 rx_firspass[1][0][11] = 0
4601 23:53:45.625359 rx_lastpass[1][0][11] = 0
4602 23:53:45.628337 rx_firspass[1][0][12] = 0
4603 23:53:45.632181 rx_lastpass[1][0][12] = 0
4604 23:53:45.635290 rx_firspass[1][0][13] = 0
4605 23:53:45.635389 rx_lastpass[1][0][13] = 0
4606 23:53:45.638753 rx_firspass[1][0][14] = 0
4607 23:53:45.641536 rx_lastpass[1][0][14] = 0
4608 23:53:45.641610 rx_firspass[1][0][15] = 0
4609 23:53:45.645173 rx_lastpass[1][0][15] = 0
4610 23:53:45.648708 rx_firspass[1][1][0] = 0
4611 23:53:45.651735 rx_lastpass[1][1][0] = 0
4612 23:53:45.651809 rx_firspass[1][1][1] = 0
4613 23:53:45.654910 rx_lastpass[1][1][1] = 0
4614 23:53:45.658148 rx_firspass[1][1][2] = 0
4615 23:53:45.658220 rx_lastpass[1][1][2] = 0
4616 23:53:45.661757 rx_firspass[1][1][3] = 0
4617 23:53:45.665290 rx_lastpass[1][1][3] = 0
4618 23:53:45.665417 rx_firspass[1][1][4] = 0
4619 23:53:45.668652 rx_lastpass[1][1][4] = 0
4620 23:53:45.671673 rx_firspass[1][1][5] = 0
4621 23:53:45.671747 rx_lastpass[1][1][5] = 0
4622 23:53:45.675301 rx_firspass[1][1][6] = 0
4623 23:53:45.678248 rx_lastpass[1][1][6] = 0
4624 23:53:45.678321 rx_firspass[1][1][7] = 0
4625 23:53:45.681557 rx_lastpass[1][1][7] = 0
4626 23:53:45.685425 rx_firspass[1][1][8] = 0
4627 23:53:45.685500 rx_lastpass[1][1][8] = 0
4628 23:53:45.688463 rx_firspass[1][1][9] = 0
4629 23:53:45.691885 rx_lastpass[1][1][9] = 0
4630 23:53:45.695087 rx_firspass[1][1][10] = 0
4631 23:53:45.695181 rx_lastpass[1][1][10] = 0
4632 23:53:45.698251 rx_firspass[1][1][11] = 0
4633 23:53:45.701445 rx_lastpass[1][1][11] = 0
4634 23:53:45.701546 rx_firspass[1][1][12] = 0
4635 23:53:45.704712 rx_lastpass[1][1][12] = 0
4636 23:53:45.708536 rx_firspass[1][1][13] = 0
4637 23:53:45.711687 rx_lastpass[1][1][13] = 0
4638 23:53:45.711787 rx_firspass[1][1][14] = 0
4639 23:53:45.714768 rx_lastpass[1][1][14] = 0
4640 23:53:45.718410 rx_firspass[1][1][15] = 0
4641 23:53:45.718521 rx_lastpass[1][1][15] = 0
4642 23:53:45.721406 dump params clk_delay
4643 23:53:45.721531 clk_delay[0] = 0
4644 23:53:45.725408 clk_delay[1] = 0
4645 23:53:45.728183 dump params dqs_delay
4646 23:53:45.728328 dqs_delay[0][0] = 0
4647 23:53:45.731683 dqs_delay[0][1] = 0
4648 23:53:45.731808 dqs_delay[1][0] = 0
4649 23:53:45.734970 dqs_delay[1][1] = 0
4650 23:53:45.738009 dump params delay_cell_unit = 762
4651 23:53:45.738097 dump source = 0x0
4652 23:53:45.741843 dump params frequency:800
4653 23:53:45.741926 dump params rank number:2
4654 23:53:45.745070
4655 23:53:45.745195 dump params write leveling
4656 23:53:45.748439 write leveling[0][0][0] = 0x0
4657 23:53:45.751446 write leveling[0][0][1] = 0x0
4658 23:53:45.754861 write leveling[0][1][0] = 0x0
4659 23:53:45.758298 write leveling[0][1][1] = 0x0
4660 23:53:45.758379 write leveling[1][0][0] = 0x0
4661 23:53:45.761149 write leveling[1][0][1] = 0x0
4662 23:53:45.764715 write leveling[1][1][0] = 0x0
4663 23:53:45.768261 write leveling[1][1][1] = 0x0
4664 23:53:45.768365 dump params cbt_cs
4665 23:53:45.771117 cbt_cs[0][0] = 0x0
4666 23:53:45.771220 cbt_cs[0][1] = 0x0
4667 23:53:45.774811 cbt_cs[1][0] = 0x0
4668 23:53:45.774915 cbt_cs[1][1] = 0x0
4669 23:53:45.777815 dump params cbt_mr12
4670 23:53:45.777891 cbt_mr12[0][0] = 0x0
4671 23:53:45.781445 cbt_mr12[0][1] = 0x0
4672 23:53:45.785169 cbt_mr12[1][0] = 0x0
4673 23:53:45.785283 cbt_mr12[1][1] = 0x0
4674 23:53:45.788352 dump params tx window
4675 23:53:45.788439 tx_center_min[0][0][0] = 0
4676 23:53:45.791675 tx_center_max[0][0][0] = 0
4677 23:53:45.794704 tx_center_min[0][0][1] = 0
4678 23:53:45.798030 tx_center_max[0][0][1] = 0
4679 23:53:45.798113 tx_center_min[0][1][0] = 0
4680 23:53:45.801581 tx_center_max[0][1][0] = 0
4681 23:53:45.804805 tx_center_min[0][1][1] = 0
4682 23:53:45.807853 tx_center_max[0][1][1] = 0
4683 23:53:45.807939 tx_center_min[1][0][0] = 0
4684 23:53:45.811508 tx_center_max[1][0][0] = 0
4685 23:53:45.814704 tx_center_min[1][0][1] = 0
4686 23:53:45.818417 tx_center_max[1][0][1] = 0
4687 23:53:45.818501 tx_center_min[1][1][0] = 0
4688 23:53:45.821246 tx_center_max[1][1][0] = 0
4689 23:53:45.825010 tx_center_min[1][1][1] = 0
4690 23:53:45.828155 tx_center_max[1][1][1] = 0
4691 23:53:45.828240 dump params tx window
4692 23:53:45.831251 tx_win_center[0][0][0] = 0
4693 23:53:45.834984 tx_first_pass[0][0][0] = 0
4694 23:53:45.835098 tx_last_pass[0][0][0] = 0
4695 23:53:45.837959 tx_win_center[0][0][1] = 0
4696 23:53:45.841605 tx_first_pass[0][0][1] = 0
4697 23:53:45.841694 tx_last_pass[0][0][1] = 0
4698 23:53:45.844417 tx_win_center[0][0][2] = 0
4699 23:53:45.848458 tx_first_pass[0][0][2] = 0
4700 23:53:45.851547 tx_last_pass[0][0][2] = 0
4701 23:53:45.851638 tx_win_center[0][0][3] = 0
4702 23:53:45.854738 tx_first_pass[0][0][3] = 0
4703 23:53:45.857884 tx_last_pass[0][0][3] = 0
4704 23:53:45.861478 tx_win_center[0][0][4] = 0
4705 23:53:45.861584 tx_first_pass[0][0][4] = 0
4706 23:53:45.864526 tx_last_pass[0][0][4] = 0
4707 23:53:45.867767 tx_win_center[0][0][5] = 0
4708 23:53:45.871581 tx_first_pass[0][0][5] = 0
4709 23:53:45.871692 tx_last_pass[0][0][5] = 0
4710 23:53:45.874292 tx_win_center[0][0][6] = 0
4711 23:53:45.877688 tx_first_pass[0][0][6] = 0
4712 23:53:45.877764 tx_last_pass[0][0][6] = 0
4713 23:53:45.881215 tx_win_center[0][0][7] = 0
4714 23:53:45.884521 tx_first_pass[0][0][7] = 0
4715 23:53:45.887820 tx_last_pass[0][0][7] = 0
4716 23:53:45.887921 tx_win_center[0][0][8] = 0
4717 23:53:45.891382 tx_first_pass[0][0][8] = 0
4718 23:53:45.894468 tx_last_pass[0][0][8] = 0
4719 23:53:45.897718 tx_win_center[0][0][9] = 0
4720 23:53:45.897792 tx_first_pass[0][0][9] = 0
4721 23:53:45.900959 tx_last_pass[0][0][9] = 0
4722 23:53:45.904700 tx_win_center[0][0][10] = 0
4723 23:53:45.904773 tx_first_pass[0][0][10] = 0
4724 23:53:45.907339 tx_last_pass[0][0][10] = 0
4725 23:53:45.910898 tx_win_center[0][0][11] = 0
4726 23:53:45.914892 tx_first_pass[0][0][11] = 0
4727 23:53:45.914975 tx_last_pass[0][0][11] = 0
4728 23:53:45.917900 tx_win_center[0][0][12] = 0
4729 23:53:45.921121 tx_first_pass[0][0][12] = 0
4730 23:53:45.924383 tx_last_pass[0][0][12] = 0
4731 23:53:45.924526 tx_win_center[0][0][13] = 0
4732 23:53:45.927991 tx_first_pass[0][0][13] = 0
4733 23:53:45.930836 tx_last_pass[0][0][13] = 0
4734 23:53:45.934484 tx_win_center[0][0][14] = 0
4735 23:53:45.934594 tx_first_pass[0][0][14] = 0
4736 23:53:45.937757 tx_last_pass[0][0][14] = 0
4737 23:53:45.940902 tx_win_center[0][0][15] = 0
4738 23:53:45.944878 tx_first_pass[0][0][15] = 0
4739 23:53:45.944987 tx_last_pass[0][0][15] = 0
4740 23:53:45.948176 tx_win_center[0][1][0] = 0
4741 23:53:45.951108 tx_first_pass[0][1][0] = 0
4742 23:53:45.954406 tx_last_pass[0][1][0] = 0
4743 23:53:45.954492 tx_win_center[0][1][1] = 0
4744 23:53:45.957647 tx_first_pass[0][1][1] = 0
4745 23:53:45.961233 tx_last_pass[0][1][1] = 0
4746 23:53:45.961415 tx_win_center[0][1][2] = 0
4747 23:53:45.964435 tx_first_pass[0][1][2] = 0
4748 23:53:45.968142 tx_last_pass[0][1][2] = 0
4749 23:53:45.971198 tx_win_center[0][1][3] = 0
4750 23:53:45.971284 tx_first_pass[0][1][3] = 0
4751 23:53:45.974711 tx_last_pass[0][1][3] = 0
4752 23:53:45.977933 tx_win_center[0][1][4] = 0
4753 23:53:45.981523 tx_first_pass[0][1][4] = 0
4754 23:53:45.981609 tx_last_pass[0][1][4] = 0
4755 23:53:45.984443 tx_win_center[0][1][5] = 0
4756 23:53:45.987972 tx_first_pass[0][1][5] = 0
4757 23:53:45.988060 tx_last_pass[0][1][5] = 0
4758 23:53:45.991205 tx_win_center[0][1][6] = 0
4759 23:53:45.994499 tx_first_pass[0][1][6] = 0
4760 23:53:45.998169 tx_last_pass[0][1][6] = 0
4761 23:53:45.998256 tx_win_center[0][1][7] = 0
4762 23:53:46.001493 tx_first_pass[0][1][7] = 0
4763 23:53:46.004970 tx_last_pass[0][1][7] = 0
4764 23:53:46.005057 tx_win_center[0][1][8] = 0
4765 23:53:46.008123 tx_first_pass[0][1][8] = 0
4766 23:53:46.011292 tx_last_pass[0][1][8] = 0
4767 23:53:46.014353 tx_win_center[0][1][9] = 0
4768 23:53:46.014440 tx_first_pass[0][1][9] = 0
4769 23:53:46.018159 tx_last_pass[0][1][9] = 0
4770 23:53:46.021223 tx_win_center[0][1][10] = 0
4771 23:53:46.024491 tx_first_pass[0][1][10] = 0
4772 23:53:46.024579 tx_last_pass[0][1][10] = 0
4773 23:53:46.028355 tx_win_center[0][1][11] = 0
4774 23:53:46.031511 tx_first_pass[0][1][11] = 0
4775 23:53:46.034489 tx_last_pass[0][1][11] = 0
4776 23:53:46.034606 tx_win_center[0][1][12] = 0
4777 23:53:46.038019 tx_first_pass[0][1][12] = 0
4778 23:53:46.041570 tx_last_pass[0][1][12] = 0
4779 23:53:46.044584 tx_win_center[0][1][13] = 0
4780 23:53:46.044665 tx_first_pass[0][1][13] = 0
4781 23:53:46.047982 tx_last_pass[0][1][13] = 0
4782 23:53:46.051791 tx_win_center[0][1][14] = 0
4783 23:53:46.054922 tx_first_pass[0][1][14] = 0
4784 23:53:46.055023 tx_last_pass[0][1][14] = 0
4785 23:53:46.057978 tx_win_center[0][1][15] = 0
4786 23:53:46.061509 tx_first_pass[0][1][15] = 0
4787 23:53:46.065052 tx_last_pass[0][1][15] = 0
4788 23:53:46.065160 tx_win_center[1][0][0] = 0
4789 23:53:46.068278 tx_first_pass[1][0][0] = 0
4790 23:53:46.071403 tx_last_pass[1][0][0] = 0
4791 23:53:46.071485 tx_win_center[1][0][1] = 0
4792 23:53:46.074582 tx_first_pass[1][0][1] = 0
4793 23:53:46.078091 tx_last_pass[1][0][1] = 0
4794 23:53:46.081651 tx_win_center[1][0][2] = 0
4795 23:53:46.081739 tx_first_pass[1][0][2] = 0
4796 23:53:46.085268 tx_last_pass[1][0][2] = 0
4797 23:53:46.088890 tx_win_center[1][0][3] = 0
4798 23:53:46.088975 tx_first_pass[1][0][3] = 0
4799 23:53:46.091626 tx_last_pass[1][0][3] = 0
4800 23:53:46.094850 tx_win_center[1][0][4] = 0
4801 23:53:46.098175 tx_first_pass[1][0][4] = 0
4802 23:53:46.098261 tx_last_pass[1][0][4] = 0
4803 23:53:46.101710 tx_win_center[1][0][5] = 0
4804 23:53:46.104984 tx_first_pass[1][0][5] = 0
4805 23:53:46.108343 tx_last_pass[1][0][5] = 0
4806 23:53:46.108430 tx_win_center[1][0][6] = 0
4807 23:53:46.111591 tx_first_pass[1][0][6] = 0
4808 23:53:46.115338 tx_last_pass[1][0][6] = 0
4809 23:53:46.115426 tx_win_center[1][0][7] = 0
4810 23:53:46.118380 tx_first_pass[1][0][7] = 0
4811 23:53:46.121866 tx_last_pass[1][0][7] = 0
4812 23:53:46.124948 tx_win_center[1][0][8] = 0
4813 23:53:46.125035 tx_first_pass[1][0][8] = 0
4814 23:53:46.128164 tx_last_pass[1][0][8] = 0
4815 23:53:46.131862 tx_win_center[1][0][9] = 0
4816 23:53:46.134980 tx_first_pass[1][0][9] = 0
4817 23:53:46.135066 tx_last_pass[1][0][9] = 0
4818 23:53:46.138227 tx_win_center[1][0][10] = 0
4819 23:53:46.141485 tx_first_pass[1][0][10] = 0
4820 23:53:46.141570 tx_last_pass[1][0][10] = 0
4821 23:53:46.145006 tx_win_center[1][0][11] = 0
4822 23:53:46.148007 tx_first_pass[1][0][11] = 0
4823 23:53:46.151676 tx_last_pass[1][0][11] = 0
4824 23:53:46.151762 tx_win_center[1][0][12] = 0
4825 23:53:46.154705 tx_first_pass[1][0][12] = 0
4826 23:53:46.158455 tx_last_pass[1][0][12] = 0
4827 23:53:46.161688 tx_win_center[1][0][13] = 0
4828 23:53:46.161774 tx_first_pass[1][0][13] = 0
4829 23:53:46.165042 tx_last_pass[1][0][13] = 0
4830 23:53:46.168451 tx_win_center[1][0][14] = 0
4831 23:53:46.171802 tx_first_pass[1][0][14] = 0
4832 23:53:46.171885 tx_last_pass[1][0][14] = 0
4833 23:53:46.175059 tx_win_center[1][0][15] = 0
4834 23:53:46.178267 tx_first_pass[1][0][15] = 0
4835 23:53:46.181430 tx_last_pass[1][0][15] = 0
4836 23:53:46.181516 tx_win_center[1][1][0] = 0
4837 23:53:46.184746 tx_first_pass[1][1][0] = 0
4838 23:53:46.188404 tx_last_pass[1][1][0] = 0
4839 23:53:46.191948 tx_win_center[1][1][1] = 0
4840 23:53:46.192047 tx_first_pass[1][1][1] = 0
4841 23:53:46.195219 tx_last_pass[1][1][1] = 0
4842 23:53:46.198656 tx_win_center[1][1][2] = 0
4843 23:53:46.198741 tx_first_pass[1][1][2] = 0
4844 23:53:46.201855 tx_last_pass[1][1][2] = 0
4845 23:53:46.205215 tx_win_center[1][1][3] = 0
4846 23:53:46.208255 tx_first_pass[1][1][3] = 0
4847 23:53:46.208340 tx_last_pass[1][1][3] = 0
4848 23:53:46.211809 tx_win_center[1][1][4] = 0
4849 23:53:46.214899 tx_first_pass[1][1][4] = 0
4850 23:53:46.218499 tx_last_pass[1][1][4] = 0
4851 23:53:46.218584 tx_win_center[1][1][5] = 0
4852 23:53:46.221714 tx_first_pass[1][1][5] = 0
4853 23:53:46.224859 tx_last_pass[1][1][5] = 0
4854 23:53:46.224964 tx_win_center[1][1][6] = 0
4855 23:53:46.228215 tx_first_pass[1][1][6] = 0
4856 23:53:46.231683 tx_last_pass[1][1][6] = 0
4857 23:53:46.235074 tx_win_center[1][1][7] = 0
4858 23:53:46.235184 tx_first_pass[1][1][7] = 0
4859 23:53:46.238971 tx_last_pass[1][1][7] = 0
4860 23:53:46.241775 tx_win_center[1][1][8] = 0
4861 23:53:46.244955 tx_first_pass[1][1][8] = 0
4862 23:53:46.245066 tx_last_pass[1][1][8] = 0
4863 23:53:46.248070 tx_win_center[1][1][9] = 0
4864 23:53:46.251961 tx_first_pass[1][1][9] = 0
4865 23:53:46.252047 tx_last_pass[1][1][9] = 0
4866 23:53:46.254761 tx_win_center[1][1][10] = 0
4867 23:53:46.258387 tx_first_pass[1][1][10] = 0
4868 23:53:46.261995 tx_last_pass[1][1][10] = 0
4869 23:53:46.262114 tx_win_center[1][1][11] = 0
4870 23:53:46.264918 tx_first_pass[1][1][11] = 0
4871 23:53:46.268184 tx_last_pass[1][1][11] = 0
4872 23:53:46.271608 tx_win_center[1][1][12] = 0
4873 23:53:46.271694 tx_first_pass[1][1][12] = 0
4874 23:53:46.275392 tx_last_pass[1][1][12] = 0
4875 23:53:46.278320 tx_win_center[1][1][13] = 0
4876 23:53:46.281785 tx_first_pass[1][1][13] = 0
4877 23:53:46.281871 tx_last_pass[1][1][13] = 0
4878 23:53:46.284937 tx_win_center[1][1][14] = 0
4879 23:53:46.288256 tx_first_pass[1][1][14] = 0
4880 23:53:46.291905 tx_last_pass[1][1][14] = 0
4881 23:53:46.291990 tx_win_center[1][1][15] = 0
4882 23:53:46.295104 tx_first_pass[1][1][15] = 0
4883 23:53:46.298141 tx_last_pass[1][1][15] = 0
4884 23:53:46.298227 dump params rx window
4885 23:53:46.301489 rx_firspass[0][0][0] = 0
4886 23:53:46.304819 rx_lastpass[0][0][0] = 0
4887 23:53:46.308263 rx_firspass[0][0][1] = 0
4888 23:53:46.308349 rx_lastpass[0][0][1] = 0
4889 23:53:46.311601 rx_firspass[0][0][2] = 0
4890 23:53:46.314777 rx_lastpass[0][0][2] = 0
4891 23:53:46.314862 rx_firspass[0][0][3] = 0
4892 23:53:46.318378 rx_lastpass[0][0][3] = 0
4893 23:53:46.321573 rx_firspass[0][0][4] = 0
4894 23:53:46.321658 rx_lastpass[0][0][4] = 0
4895 23:53:46.325212 rx_firspass[0][0][5] = 0
4896 23:53:46.328298 rx_lastpass[0][0][5] = 0
4897 23:53:46.328383 rx_firspass[0][0][6] = 0
4898 23:53:46.331451 rx_lastpass[0][0][6] = 0
4899 23:53:46.335261 rx_firspass[0][0][7] = 0
4900 23:53:46.335347 rx_lastpass[0][0][7] = 0
4901 23:53:46.338247 rx_firspass[0][0][8] = 0
4902 23:53:46.341688 rx_lastpass[0][0][8] = 0
4903 23:53:46.345181 rx_firspass[0][0][9] = 0
4904 23:53:46.345324 rx_lastpass[0][0][9] = 0
4905 23:53:46.348039 rx_firspass[0][0][10] = 0
4906 23:53:46.351933 rx_lastpass[0][0][10] = 0
4907 23:53:46.352018 rx_firspass[0][0][11] = 0
4908 23:53:46.355083 rx_lastpass[0][0][11] = 0
4909 23:53:46.358469 rx_firspass[0][0][12] = 0
4910 23:53:46.358555 rx_lastpass[0][0][12] = 0
4911 23:53:46.361601 rx_firspass[0][0][13] = 0
4912 23:53:46.364999 rx_lastpass[0][0][13] = 0
4913 23:53:46.368061 rx_firspass[0][0][14] = 0
4914 23:53:46.368170 rx_lastpass[0][0][14] = 0
4915 23:53:46.371828 rx_firspass[0][0][15] = 0
4916 23:53:46.375007 rx_lastpass[0][0][15] = 0
4917 23:53:46.375092 rx_firspass[0][1][0] = 0
4918 23:53:46.378041 rx_lastpass[0][1][0] = 0
4919 23:53:46.381896 rx_firspass[0][1][1] = 0
4920 23:53:46.381980 rx_lastpass[0][1][1] = 0
4921 23:53:46.384860 rx_firspass[0][1][2] = 0
4922 23:53:46.388325 rx_lastpass[0][1][2] = 0
4923 23:53:46.391493 rx_firspass[0][1][3] = 0
4924 23:53:46.391578 rx_lastpass[0][1][3] = 0
4925 23:53:46.395201 rx_firspass[0][1][4] = 0
4926 23:53:46.398305 rx_lastpass[0][1][4] = 0
4927 23:53:46.398390 rx_firspass[0][1][5] = 0
4928 23:53:46.401440 rx_lastpass[0][1][5] = 0
4929 23:53:46.404657 rx_firspass[0][1][6] = 0
4930 23:53:46.404742 rx_lastpass[0][1][6] = 0
4931 23:53:46.408355 rx_firspass[0][1][7] = 0
4932 23:53:46.411982 rx_lastpass[0][1][7] = 0
4933 23:53:46.412067 rx_firspass[0][1][8] = 0
4934 23:53:46.414863 rx_lastpass[0][1][8] = 0
4935 23:53:46.418080 rx_firspass[0][1][9] = 0
4936 23:53:46.418165 rx_lastpass[0][1][9] = 0
4937 23:53:46.421576 rx_firspass[0][1][10] = 0
4938 23:53:46.424768 rx_lastpass[0][1][10] = 0
4939 23:53:46.428467 rx_firspass[0][1][11] = 0
4940 23:53:46.428552 rx_lastpass[0][1][11] = 0
4941 23:53:46.431349 rx_firspass[0][1][12] = 0
4942 23:53:46.435071 rx_lastpass[0][1][12] = 0
4943 23:53:46.435156 rx_firspass[0][1][13] = 0
4944 23:53:46.438211 rx_lastpass[0][1][13] = 0
4945 23:53:46.441844 rx_firspass[0][1][14] = 0
4946 23:53:46.445106 rx_lastpass[0][1][14] = 0
4947 23:53:46.445191 rx_firspass[0][1][15] = 0
4948 23:53:46.448251 rx_lastpass[0][1][15] = 0
4949 23:53:46.451755 rx_firspass[1][0][0] = 0
4950 23:53:46.451839 rx_lastpass[1][0][0] = 0
4951 23:53:46.455141 rx_firspass[1][0][1] = 0
4952 23:53:46.458480 rx_lastpass[1][0][1] = 0
4953 23:53:46.458565 rx_firspass[1][0][2] = 0
4954 23:53:46.461929 rx_lastpass[1][0][2] = 0
4955 23:53:46.465124 rx_firspass[1][0][3] = 0
4956 23:53:46.465209 rx_lastpass[1][0][3] = 0
4957 23:53:46.468269 rx_firspass[1][0][4] = 0
4958 23:53:46.471965 rx_lastpass[1][0][4] = 0
4959 23:53:46.472093 rx_firspass[1][0][5] = 0
4960 23:53:46.475117 rx_lastpass[1][0][5] = 0
4961 23:53:46.478258 rx_firspass[1][0][6] = 0
4962 23:53:46.478341 rx_lastpass[1][0][6] = 0
4963 23:53:46.481841 rx_firspass[1][0][7] = 0
4964 23:53:46.485057 rx_lastpass[1][0][7] = 0
4965 23:53:46.488298 rx_firspass[1][0][8] = 0
4966 23:53:46.488405 rx_lastpass[1][0][8] = 0
4967 23:53:46.491849 rx_firspass[1][0][9] = 0
4968 23:53:46.495276 rx_lastpass[1][0][9] = 0
4969 23:53:46.495358 rx_firspass[1][0][10] = 0
4970 23:53:46.498374 rx_lastpass[1][0][10] = 0
4971 23:53:46.501447 rx_firspass[1][0][11] = 0
4972 23:53:46.501530 rx_lastpass[1][0][11] = 0
4973 23:53:46.505173 rx_firspass[1][0][12] = 0
4974 23:53:46.508107 rx_lastpass[1][0][12] = 0
4975 23:53:46.511924 rx_firspass[1][0][13] = 0
4976 23:53:46.512007 rx_lastpass[1][0][13] = 0
4977 23:53:46.515128 rx_firspass[1][0][14] = 0
4978 23:53:46.518261 rx_lastpass[1][0][14] = 0
4979 23:53:46.518343 rx_firspass[1][0][15] = 0
4980 23:53:46.521699 rx_lastpass[1][0][15] = 0
4981 23:53:46.525340 rx_firspass[1][1][0] = 0
4982 23:53:46.525423 rx_lastpass[1][1][0] = 0
4983 23:53:46.528592 rx_firspass[1][1][1] = 0
4984 23:53:46.531703 rx_lastpass[1][1][1] = 0
4985 23:53:46.535259 rx_firspass[1][1][2] = 0
4986 23:53:46.535342 rx_lastpass[1][1][2] = 0
4987 23:53:46.538170 rx_firspass[1][1][3] = 0
4988 23:53:46.541782 rx_lastpass[1][1][3] = 0
4989 23:53:46.541866 rx_firspass[1][1][4] = 0
4990 23:53:46.544975 rx_lastpass[1][1][4] = 0
4991 23:53:46.548303 rx_firspass[1][1][5] = 0
4992 23:53:46.548385 rx_lastpass[1][1][5] = 0
4993 23:53:46.551978 rx_firspass[1][1][6] = 0
4994 23:53:46.555025 rx_lastpass[1][1][6] = 0
4995 23:53:46.555124 rx_firspass[1][1][7] = 0
4996 23:53:46.558274 rx_lastpass[1][1][7] = 0
4997 23:53:46.561290 rx_firspass[1][1][8] = 0
4998 23:53:46.564896 rx_lastpass[1][1][8] = 0
4999 23:53:46.564978 rx_firspass[1][1][9] = 0
5000 23:53:46.568283 rx_lastpass[1][1][9] = 0
5001 23:53:46.571579 rx_firspass[1][1][10] = 0
5002 23:53:46.571662 rx_lastpass[1][1][10] = 0
5003 23:53:46.574960 rx_firspass[1][1][11] = 0
5004 23:53:46.577912 rx_lastpass[1][1][11] = 0
5005 23:53:46.577996 rx_firspass[1][1][12] = 0
5006 23:53:46.581598 rx_lastpass[1][1][12] = 0
5007 23:53:46.584717 rx_firspass[1][1][13] = 0
5008 23:53:46.588317 rx_lastpass[1][1][13] = 0
5009 23:53:46.588402 rx_firspass[1][1][14] = 0
5010 23:53:46.591527 rx_lastpass[1][1][14] = 0
5011 23:53:46.594836 rx_firspass[1][1][15] = 0
5012 23:53:46.594919 rx_lastpass[1][1][15] = 0
5013 23:53:46.597985 dump params clk_delay
5014 23:53:46.601433 clk_delay[0] = 0
5015 23:53:46.601516 clk_delay[1] = 0
5016 23:53:46.604823 dump params dqs_delay
5017 23:53:46.604906 dqs_delay[0][0] = 0
5018 23:53:46.607955 dqs_delay[0][1] = 0
5019 23:53:46.608038 dqs_delay[1][0] = 0
5020 23:53:46.611516 dqs_delay[1][1] = 0
5021 23:53:46.614792 dump params delay_cell_unit = 762
5022 23:53:46.614875 mt_set_emi_preloader end
5023 23:53:46.621175 [mt_mem_init] dram size: 0x100000000, rank number: 2
5024 23:53:46.624205 [complex_mem_test] start addr:0x40000000, len:20480
5025 23:53:46.661984 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5026 23:53:46.668396 [complex_mem_test] start addr:0x80000000, len:20480
5027 23:53:46.704206 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5028 23:53:46.710584 [complex_mem_test] start addr:0xc0000000, len:20480
5029 23:53:46.746626 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5030 23:53:46.752884 [complex_mem_test] start addr:0x56000000, len:8192
5031 23:53:46.770054 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5032 23:53:46.770145 ddr_geometry:1
5033 23:53:46.776630 [complex_mem_test] start addr:0x80000000, len:8192
5034 23:53:46.793289 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5035 23:53:46.796862 dram_init: dram init end (result: 0)
5036 23:53:46.803990 Successfully loaded DRAM blobs and ran DRAM calibration
5037 23:53:46.813616 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5038 23:53:46.813726 CBMEM:
5039 23:53:46.816697 IMD: root @ 00000000fffff000 254 entries.
5040 23:53:46.820230 IMD: root @ 00000000ffffec00 62 entries.
5041 23:53:46.826878 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5042 23:53:46.833830 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5043 23:53:46.837041 in-header: 03 a1 00 00 08 00 00 00
5044 23:53:46.840228 in-data: 84 60 60 10 00 00 00 00
5045 23:53:46.843733 Chrome EC: clear events_b mask to 0x0000000020004000
5046 23:53:46.851117 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5047 23:53:46.854491 in-header: 03 fd 00 00 00 00 00 00
5048 23:53:46.854597 in-data:
5049 23:53:46.860986 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5050 23:53:46.861122 CBFS @ 21000 size 3d4000
5051 23:53:46.867412 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5052 23:53:46.870756 CBFS: Locating 'fallback/ramstage'
5053 23:53:46.873882 CBFS: Found @ offset 10d40 size d563
5054 23:53:46.895098 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5055 23:53:46.907403 Accumulated console time in romstage 12877 ms
5056 23:53:46.907495
5057 23:53:46.907580
5058 23:53:46.917640 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5059 23:53:46.921001 ARM64: Exception handlers installed.
5060 23:53:46.921089 ARM64: Testing exception
5061 23:53:46.923854 ARM64: Done test exception
5062 23:53:46.927656 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5063 23:53:46.930617 Manufacturer: ef
5064 23:53:46.934101 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5065 23:53:46.940463 WARNING: RO_VPD is uninitialized or empty.
5066 23:53:46.944242 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5067 23:53:46.947542 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5068 23:53:46.957079 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5069 23:53:46.960244 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5070 23:53:46.967023 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5071 23:53:46.967113 Enumerating buses...
5072 23:53:46.973867 Show all devs... Before device enumeration.
5073 23:53:46.973954 Root Device: enabled 1
5074 23:53:46.977513 CPU_CLUSTER: 0: enabled 1
5075 23:53:46.977600 CPU: 00: enabled 1
5076 23:53:46.980343 Compare with tree...
5077 23:53:46.983557 Root Device: enabled 1
5078 23:53:46.983658 CPU_CLUSTER: 0: enabled 1
5079 23:53:46.987365 CPU: 00: enabled 1
5080 23:53:46.987453 Root Device scanning...
5081 23:53:46.990530 root_dev_scan_bus for Root Device
5082 23:53:46.993707 CPU_CLUSTER: 0 enabled
5083 23:53:46.997516 root_dev_scan_bus for Root Device done
5084 23:53:47.003701 scan_bus: scanning of bus Root Device took 10690 usecs
5085 23:53:47.003804 done
5086 23:53:47.006994 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5087 23:53:47.010851 Allocating resources...
5088 23:53:47.010949 Reading resources...
5089 23:53:47.013965 Root Device read_resources bus 0 link: 0
5090 23:53:47.020671 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5091 23:53:47.020779 CPU: 00 missing read_resources
5092 23:53:47.026733 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5093 23:53:47.030147 Root Device read_resources bus 0 link: 0 done
5094 23:53:47.033545 Done reading resources.
5095 23:53:47.036789 Show resources in subtree (Root Device)...After reading.
5096 23:53:47.040196 Root Device child on link 0 CPU_CLUSTER: 0
5097 23:53:47.043674 CPU_CLUSTER: 0 child on link 0 CPU: 00
5098 23:53:47.053900 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5099 23:53:47.054009 CPU: 00
5100 23:53:47.056881 Setting resources...
5101 23:53:47.060260 Root Device assign_resources, bus 0 link: 0
5102 23:53:47.063495 CPU_CLUSTER: 0 missing set_resources
5103 23:53:47.067063 Root Device assign_resources, bus 0 link: 0
5104 23:53:47.070306 Done setting resources.
5105 23:53:47.076954 Show resources in subtree (Root Device)...After assigning values.
5106 23:53:47.080179 Root Device child on link 0 CPU_CLUSTER: 0
5107 23:53:47.083327 CPU_CLUSTER: 0 child on link 0 CPU: 00
5108 23:53:47.093767 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5109 23:53:47.093844 CPU: 00
5110 23:53:47.097057 Done allocating resources.
5111 23:53:47.100377 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5112 23:53:47.103515 Enabling resources...
5113 23:53:47.103587 done.
5114 23:53:47.106600 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5115 23:53:47.110426 Initializing devices...
5116 23:53:47.110502 Root Device init ...
5117 23:53:47.113497 mainboard_init: Starting display init.
5118 23:53:47.116797 ADC[4]: Raw value=76850 ID=0
5119 23:53:47.139675 anx7625_power_on_init: Init interface.
5120 23:53:47.143184 anx7625_disable_pd_protocol: Disabled PD feature.
5121 23:53:47.150258 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5122 23:53:47.196400 anx7625_start_dp_work: Secure OCM version=00
5123 23:53:47.199832 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5124 23:53:47.217072 sp_tx_get_edid_block: EDID Block = 1
5125 23:53:47.334110 Extracted contents:
5126 23:53:47.337759 header: 00 ff ff ff ff ff ff 00
5127 23:53:47.340912 serial number: 06 af 5c 14 00 00 00 00 00 1a
5128 23:53:47.344086 version: 01 04
5129 23:53:47.347713 basic params: 95 1a 0e 78 02
5130 23:53:47.350872 chroma info: 99 85 95 55 56 92 28 22 50 54
5131 23:53:47.353974 established: 00 00 00
5132 23:53:47.360573 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5133 23:53:47.363837 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5134 23:53:47.370890 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5135 23:53:47.377532 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5136 23:53:47.383850 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5137 23:53:47.387327 extensions: 00
5138 23:53:47.387430 checksum: ae
5139 23:53:47.387522
5140 23:53:47.390692 Manufacturer: AUO Model 145c Serial Number 0
5141 23:53:47.394107 Made week 0 of 2016
5142 23:53:47.394181 EDID version: 1.4
5143 23:53:47.397394 Digital display
5144 23:53:47.400388 6 bits per primary color channel
5145 23:53:47.400461 DisplayPort interface
5146 23:53:47.403733 Maximum image size: 26 cm x 14 cm
5147 23:53:47.407474 Gamma: 220%
5148 23:53:47.407579 Check DPMS levels
5149 23:53:47.410568 Supported color formats: RGB 4:4:4
5150 23:53:47.413845 First detailed timing is preferred timing
5151 23:53:47.416923 Established timings supported:
5152 23:53:47.420757 Standard timings supported:
5153 23:53:47.420831 Detailed timings
5154 23:53:47.427219 Hex of detail: ce1d56ea50001a3030204600009010000018
5155 23:53:47.430396 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5156 23:53:47.433850 0556 0586 05a6 0640 hborder 0
5157 23:53:47.436921 0300 0304 030a 031a vborder 0
5158 23:53:47.440475 -hsync -vsync
5159 23:53:47.443716 Did detailed timing
5160 23:53:47.447079 Hex of detail: 0000000f0000000000000000000000000020
5161 23:53:47.450071 Manufacturer-specified data, tag 15
5162 23:53:47.457171 Hex of detail: 000000fe0041554f0a202020202020202020
5163 23:53:47.457318 ASCII string: AUO
5164 23:53:47.460362 Hex of detail: 000000fe004231313658414230312e34200a
5165 23:53:47.463962 ASCII string: B116XAB01.4
5166 23:53:47.464062 Checksum
5167 23:53:47.467211 Checksum: 0xae (valid)
5168 23:53:47.473642 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5169 23:53:47.473725 DSI data_rate: 457800000 bps
5170 23:53:47.481398 anx7625_parse_edid: set default k value to 0x3d for panel
5171 23:53:47.484529 anx7625_parse_edid: pixelclock(76300).
5172 23:53:47.487710 hactive(1366), hsync(32), hfp(48), hbp(154)
5173 23:53:47.491246 vactive(768), vsync(6), vfp(4), vbp(16)
5174 23:53:47.494901 anx7625_dsi_config: config dsi.
5175 23:53:47.502508 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5176 23:53:47.523653 anx7625_dsi_config: success to config DSI
5177 23:53:47.527086 anx7625_dp_start: MIPI phy setup OK.
5178 23:53:47.530024 [SSUSB] Setting up USB HOST controller...
5179 23:53:47.533199 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5180 23:53:47.537112 [SSUSB] phy power-on done.
5181 23:53:47.540876 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5182 23:53:47.544031 in-header: 03 fc 01 00 00 00 00 00
5183 23:53:47.544114 in-data:
5184 23:53:47.551026 handle_proto3_response: EC response with error code: 1
5185 23:53:47.551109 SPM: pcm index = 1
5186 23:53:47.554126 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5187 23:53:47.557410 CBFS @ 21000 size 3d4000
5188 23:53:47.564146 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5189 23:53:47.567035 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5190 23:53:47.570599 CBFS: Found @ offset 1e7c0 size 1026
5191 23:53:47.577087 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5192 23:53:47.580690 SPM: binary array size = 2988
5193 23:53:47.583767 SPM: version = pcm_allinone_v1.17.2_20180829
5194 23:53:47.586924 SPM binary loaded in 32 msecs
5195 23:53:47.594754 spm_kick_im_to_fetch: ptr = 000000004021eec2
5196 23:53:47.597963 spm_kick_im_to_fetch: len = 2988
5197 23:53:47.598037 SPM: spm_kick_pcm_to_run
5198 23:53:47.601379 SPM: spm_kick_pcm_to_run done
5199 23:53:47.604374 SPM: spm_init done in 52 msecs
5200 23:53:47.608073 Root Device init finished in 494989 usecs
5201 23:53:47.611208 CPU_CLUSTER: 0 init ...
5202 23:53:47.621125 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5203 23:53:47.624327 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5204 23:53:47.627680 CBFS @ 21000 size 3d4000
5205 23:53:47.631256 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5206 23:53:47.634735 CBFS: Locating 'sspm.bin'
5207 23:53:47.637697 CBFS: Found @ offset 208c0 size 41cb
5208 23:53:47.647797 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5209 23:53:47.655961 CPU_CLUSTER: 0 init finished in 42803 usecs
5210 23:53:47.656046 Devices initialized
5211 23:53:47.658682 Show all devs... After init.
5212 23:53:47.662331 Root Device: enabled 1
5213 23:53:47.662414 CPU_CLUSTER: 0: enabled 1
5214 23:53:47.665684 CPU: 00: enabled 1
5215 23:53:47.669358 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5216 23:53:47.672508 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5217 23:53:47.675495 ELOG: NV offset 0x558000 size 0x1000
5218 23:53:47.683329 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5219 23:53:47.690122 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5220 23:53:47.693115 ELOG: Event(17) added with size 13 at 2024-05-29 23:53:47 UTC
5221 23:53:47.696384 out: cmd=0x121: 03 db 21 01 00 00 00 00
5222 23:53:47.700034 in-header: 03 72 00 00 2c 00 00 00
5223 23:53:47.713520 in-data: 57 48 00 00 00 00 00 00 02 10 00 00 06 80 00 00 be ee 00 00 06 80 00 00 9f 91 03 00 06 80 00 00 9e 48 02 00 06 80 00 00 66 66 03 00
5224 23:53:47.716752 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5225 23:53:47.720062 in-header: 03 19 00 00 08 00 00 00
5226 23:53:47.723964 in-data: a2 e0 47 00 13 00 00 00
5227 23:53:47.726796 Chrome EC: UHEPI supported
5228 23:53:47.733487 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5229 23:53:47.736606 in-header: 03 e1 00 00 08 00 00 00
5230 23:53:47.739946 in-data: 84 20 60 10 00 00 00 00
5231 23:53:47.743249 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5232 23:53:47.750042 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5233 23:53:47.753156 in-header: 03 e1 00 00 08 00 00 00
5234 23:53:47.756989 in-data: 84 20 60 10 00 00 00 00
5235 23:53:47.763262 ELOG: Event(A1) added with size 10 at 2024-05-29 23:53:47 UTC
5236 23:53:47.770143 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5237 23:53:47.774782 ELOG: Event(A0) added with size 9 at 2024-05-29 23:53:47 UTC
5238 23:53:47.779974 elog_add_boot_reason: Logged dev mode boot
5239 23:53:47.780060 Finalize devices...
5240 23:53:47.783168 Devices finalized
5241 23:53:47.786953 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5242 23:53:47.789964 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5243 23:53:47.796919 ELOG: Event(91) added with size 10 at 2024-05-29 23:53:47 UTC
5244 23:53:47.800103 Writing coreboot table at 0xffeda000
5245 23:53:47.803190 0. 0000000000114000-000000000011efff: RAMSTAGE
5246 23:53:47.810050 1. 0000000040000000-000000004023cfff: RAMSTAGE
5247 23:53:47.813220 2. 000000004023d000-00000000545fffff: RAM
5248 23:53:47.817039 3. 0000000054600000-000000005465ffff: BL31
5249 23:53:47.819699 4. 0000000054660000-00000000ffed9fff: RAM
5250 23:53:47.826883 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5251 23:53:47.830124 6. 0000000100000000-000000013fffffff: RAM
5252 23:53:47.830208 Passing 5 GPIOs to payload:
5253 23:53:47.836457 NAME | PORT | POLARITY | VALUE
5254 23:53:47.840343 write protect | 0x00000096 | low | high
5255 23:53:47.846596 EC in RW | 0x000000b1 | high | undefined
5256 23:53:47.849945 EC interrupt | 0x00000097 | low | undefined
5257 23:53:47.853599 TPM interrupt | 0x00000099 | high | undefined
5258 23:53:47.860207 speaker enable | 0x000000af | high | undefined
5259 23:53:47.863054 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5260 23:53:47.866909 in-header: 03 f7 00 00 02 00 00 00
5261 23:53:47.867018 in-data: 04 00
5262 23:53:47.870099 Board ID: 4
5263 23:53:47.873129 ADC[3]: Raw value=1034629 ID=8
5264 23:53:47.873211 RAM code: 8
5265 23:53:47.873315 SKU ID: 16
5266 23:53:47.876957 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5267 23:53:47.880066 CBFS @ 21000 size 3d4000
5268 23:53:47.886840 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5269 23:53:47.893544 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 2762
5270 23:53:47.893627 coreboot table: 940 bytes.
5271 23:53:47.896860 IMD ROOT 0. 00000000fffff000 00001000
5272 23:53:47.903322 IMD SMALL 1. 00000000ffffe000 00001000
5273 23:53:47.907107 CONSOLE 2. 00000000fffde000 00020000
5274 23:53:47.910179 FMAP 3. 00000000fffdd000 0000047c
5275 23:53:47.913442 TIME STAMP 4. 00000000fffdc000 00000910
5276 23:53:47.916487 RAMOOPS 5. 00000000ffedc000 00100000
5277 23:53:47.920143 COREBOOT 6. 00000000ffeda000 00002000
5278 23:53:47.920251 IMD small region:
5279 23:53:47.926556 IMD ROOT 0. 00000000ffffec00 00000400
5280 23:53:47.929673 VBOOT WORK 1. 00000000ffffeb00 00000100
5281 23:53:47.933317 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5282 23:53:47.936377 VPD 3. 00000000ffffea60 0000006c
5283 23:53:47.939944 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5284 23:53:47.946983 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5285 23:53:47.949795 in-header: 03 e1 00 00 08 00 00 00
5286 23:53:47.953591 in-data: 84 20 60 10 00 00 00 00
5287 23:53:47.960128 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5288 23:53:47.960231 CBFS @ 21000 size 3d4000
5289 23:53:47.966663 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5290 23:53:47.969957 CBFS: Locating 'fallback/payload'
5291 23:53:47.977741 CBFS: Found @ offset dc040 size 439a0
5292 23:53:48.065461 read SPI 0xfd078 0x439a0: 84380 us, 3281 KB/s, 26.248 Mbps
5293 23:53:48.068713 Checking segment from ROM address 0x0000000040003a00
5294 23:53:48.075444 Checking segment from ROM address 0x0000000040003a1c
5295 23:53:48.079023 Loading segment from ROM address 0x0000000040003a00
5296 23:53:48.082197 code (compression=0)
5297 23:53:48.092201 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5298 23:53:48.098965 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5299 23:53:48.102186 it's not compressed!
5300 23:53:48.105418 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5301 23:53:48.112128 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5302 23:53:48.119850 Loading segment from ROM address 0x0000000040003a1c
5303 23:53:48.123072 Entry Point 0x0000000080000000
5304 23:53:48.123150 Loaded segments
5305 23:53:48.130000 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5306 23:53:48.133253 Jumping to boot code at 0000000080000000(00000000ffeda000)
5307 23:53:48.143222 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5308 23:53:48.146337 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5309 23:53:48.149551 CBFS @ 21000 size 3d4000
5310 23:53:48.156454 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5311 23:53:48.159477 CBFS: Locating 'fallback/bl31'
5312 23:53:48.163219 CBFS: Found @ offset 36dc0 size 5820
5313 23:53:48.173692 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5314 23:53:48.176982 Checking segment from ROM address 0x0000000040003a00
5315 23:53:48.183716 Checking segment from ROM address 0x0000000040003a1c
5316 23:53:48.187140 Loading segment from ROM address 0x0000000040003a00
5317 23:53:48.190142 code (compression=1)
5318 23:53:48.196740 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5319 23:53:48.206873 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5320 23:53:48.206958 using LZMA
5321 23:53:48.215796 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5322 23:53:48.222008 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5323 23:53:48.225412 Loading segment from ROM address 0x0000000040003a1c
5324 23:53:48.228852 Entry Point 0x0000000054601000
5325 23:53:48.228931 Loaded segments
5326 23:53:48.232225 NOTICE: MT8183 bl31_setup
5327 23:53:48.239052 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5328 23:53:48.242352 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5329 23:53:48.245856 INFO: [DEVAPC] dump DEVAPC registers:
5330 23:53:48.255912 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5331 23:53:48.262765 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5332 23:53:48.272586 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5333 23:53:48.279549 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5334 23:53:48.289413 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5335 23:53:48.295913 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5336 23:53:48.306096 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5337 23:53:48.312153 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5338 23:53:48.318984 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5339 23:53:48.329067 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5340 23:53:48.335351 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5341 23:53:48.345404 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5342 23:53:48.352225 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5343 23:53:48.359092 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5344 23:53:48.369138 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5345 23:53:48.375600 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5346 23:53:48.382578 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5347 23:53:48.389045 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5348 23:53:48.395785 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5349 23:53:48.405693 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5350 23:53:48.412713 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5351 23:53:48.419260 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5352 23:53:48.422174 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5353 23:53:48.425732 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5354 23:53:48.428629 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5355 23:53:48.432246 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5356 23:53:48.435531 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5357 23:53:48.442362 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5358 23:53:48.445466 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5359 23:53:48.449173 WARNING: region 0:
5360 23:53:48.452190 WARNING: apc:0x168, sa:0x0, ea:0xfff
5361 23:53:48.452273 WARNING: region 1:
5362 23:53:48.458566 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5363 23:53:48.458653 WARNING: region 2:
5364 23:53:48.462307 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5365 23:53:48.465368 WARNING: region 3:
5366 23:53:48.469111 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5367 23:53:48.469196 WARNING: region 4:
5368 23:53:48.475567 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5369 23:53:48.475649 WARNING: region 5:
5370 23:53:48.478470 WARNING: apc:0x0, sa:0x0, ea:0x0
5371 23:53:48.478580 WARNING: region 6:
5372 23:53:48.482087 WARNING: apc:0x0, sa:0x0, ea:0x0
5373 23:53:48.485311 WARNING: region 7:
5374 23:53:48.488563 WARNING: apc:0x0, sa:0x0, ea:0x0
5375 23:53:48.495297 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5376 23:53:48.498505 INFO: SPM: enable SPMC mode
5377 23:53:48.502377 NOTICE: spm_boot_init() start
5378 23:53:48.502459 NOTICE: spm_boot_init() end
5379 23:53:48.508832 INFO: BL31: Initializing runtime services
5380 23:53:48.512105 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5381 23:53:48.518800 INFO: BL31: Preparing for EL3 exit to normal world
5382 23:53:48.522417 INFO: Entry point address = 0x80000000
5383 23:53:48.522499 INFO: SPSR = 0x8
5384 23:53:48.545770
5385 23:53:48.545860
5386 23:53:48.545926
5387 23:53:48.546444 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
5388 23:53:48.546558 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5389 23:53:48.546646 Setting prompt string to ['jacuzzi:']
5390 23:53:48.546727 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5391 23:53:48.549380 Starting depthcharge on Juniper...
5392 23:53:48.549465
5393 23:53:48.552404 vboot_handoff: creating legacy vboot_handoff structure
5394 23:53:48.552485
5395 23:53:48.555673 ec_init(0): CrosEC protocol v3 supported (544, 544)
5396 23:53:48.555754
5397 23:53:48.559156 Wipe memory regions:
5398 23:53:48.559234
5399 23:53:48.562483 [0x00000040000000, 0x00000054600000)
5400 23:53:48.605524
5401 23:53:48.605631 [0x00000054660000, 0x00000080000000)
5402 23:53:48.696645
5403 23:53:48.696783 [0x000000811994a0, 0x000000ffeda000)
5404 23:53:48.956380
5405 23:53:48.956517 [0x00000100000000, 0x00000140000000)
5406 23:53:49.088594
5407 23:53:49.092283 Initializing XHCI USB controller at 0x11200000.
5408 23:53:49.114781
5409 23:53:49.118176 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5410 23:53:49.118266
5411 23:53:49.118337
5412 23:53:49.118622 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5414 23:53:49.218952 jacuzzi: tftpboot 192.168.201.1 14084357/tftp-deploy-30xe4kpc/kernel/image.itb 14084357/tftp-deploy-30xe4kpc/kernel/cmdline
5415 23:53:49.219094 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5416 23:53:49.219212 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5417 23:53:49.223667 tftpboot 192.168.201.1 14084357/tftp-deploy-30xe4kpc/kernel/image.ittp-deploy-30xe4kpc/kernel/cmdline
5418 23:53:49.223790
5419 23:53:49.223854 Waiting for link
5420 23:53:49.629044
5421 23:53:49.629181 R8152: Initializing
5422 23:53:49.629248
5423 23:53:49.632171 Version 9 (ocp_data = 6010)
5424 23:53:49.632254
5425 23:53:49.635409 R8152: Done initializing
5426 23:53:49.635493
5427 23:53:49.635566 Adding net device
5428 23:53:50.021233
5429 23:53:50.021439 done.
5430 23:53:50.021537
5431 23:53:50.021627 MAC: 00:e0:4c:71:a7:1f
5432 23:53:50.021718
5433 23:53:50.024840 Sending DHCP discover... done.
5434 23:53:50.024929
5435 23:53:50.027672 Waiting for reply... done.
5436 23:53:50.027763
5437 23:53:50.031194 Sending DHCP request... done.
5438 23:53:50.031288
5439 23:53:50.035627 Waiting for reply... done.
5440 23:53:50.035723
5441 23:53:50.035802 My ip is 192.168.201.23
5442 23:53:50.035871
5443 23:53:50.039515 The DHCP server ip is 192.168.201.1
5444 23:53:50.039592
5445 23:53:50.045826 TFTP server IP predefined by user: 192.168.201.1
5446 23:53:50.045912
5447 23:53:50.049371 Bootfile predefined by user: 14084357/tftp-deploy-30xe4kpc/kernel/image.itb
5448 23:53:50.052470
5449 23:53:50.052580 Sending tftp read request... done.
5450 23:53:50.052677
5451 23:53:50.058915 Waiting for the transfer...
5452 23:53:50.059000
5453 23:53:50.334865 00000000 ################################################################
5454 23:53:50.335029
5455 23:53:50.583690 00080000 ################################################################
5456 23:53:50.583829
5457 23:53:50.843434 00100000 ################################################################
5458 23:53:50.843580
5459 23:53:51.106762 00180000 ################################################################
5460 23:53:51.106933
5461 23:53:51.364945 00200000 ################################################################
5462 23:53:51.365115
5463 23:53:51.610380 00280000 ################################################################
5464 23:53:51.610520
5465 23:53:51.857191 00300000 ################################################################
5466 23:53:51.857359
5467 23:53:52.103848 00380000 ################################################################
5468 23:53:52.103987
5469 23:53:52.353365 00400000 ################################################################
5470 23:53:52.353499
5471 23:53:52.609305 00480000 ################################################################
5472 23:53:52.609440
5473 23:53:52.854403 00500000 ################################################################
5474 23:53:52.854582
5475 23:53:53.098450 00580000 ################################################################
5476 23:53:53.098587
5477 23:53:53.343629 00600000 ################################################################
5478 23:53:53.343768
5479 23:53:53.595415 00680000 ################################################################
5480 23:53:53.595579
5481 23:53:53.851075 00700000 ################################################################
5482 23:53:53.851229
5483 23:53:54.108574 00780000 ################################################################
5484 23:53:54.108709
5485 23:53:54.367741 00800000 ################################################################
5486 23:53:54.367901
5487 23:53:54.630239 00880000 ################################################################
5488 23:53:54.630391
5489 23:53:54.892294 00900000 ################################################################
5490 23:53:54.892450
5491 23:53:55.151583 00980000 ################################################################
5492 23:53:55.151722
5493 23:53:55.413236 00a00000 ################################################################
5494 23:53:55.413411
5495 23:53:55.672074 00a80000 ################################################################
5496 23:53:55.672211
5497 23:53:55.918043 00b00000 ################################################################
5498 23:53:55.918192
5499 23:53:56.164144 00b80000 ################################################################
5500 23:53:56.164287
5501 23:53:56.415814 00c00000 ################################################################
5502 23:53:56.415965
5503 23:53:56.659982 00c80000 ################################################################
5504 23:53:56.660156
5505 23:53:56.910206 00d00000 ################################################################
5506 23:53:56.910369
5507 23:53:57.156052 00d80000 ################################################################
5508 23:53:57.156223
5509 23:53:57.401019 00e00000 ################################################################
5510 23:53:57.401159
5511 23:53:57.646571 00e80000 ################################################################
5512 23:53:57.646709
5513 23:53:57.894144 00f00000 ################################################################
5514 23:53:57.894295
5515 23:53:58.144335 00f80000 ################################################################
5516 23:53:58.144474
5517 23:53:58.398572 01000000 ################################################################
5518 23:53:58.398725
5519 23:53:58.650560 01080000 ################################################################
5520 23:53:58.650712
5521 23:53:58.896589 01100000 ################################################################
5522 23:53:58.896736
5523 23:53:59.140116 01180000 ################################################################
5524 23:53:59.140268
5525 23:53:59.382168 01200000 ################################################################
5526 23:53:59.382316
5527 23:53:59.625987 01280000 ################################################################
5528 23:53:59.626183
5529 23:53:59.869061 01300000 ################################################################
5530 23:53:59.869215
5531 23:54:00.115158 01380000 ################################################################
5532 23:54:00.115293
5533 23:54:00.359319 01400000 ################################################################
5534 23:54:00.359456
5535 23:54:00.608056 01480000 ################################################################
5536 23:54:00.608202
5537 23:54:00.861567 01500000 ################################################################
5538 23:54:00.861704
5539 23:54:01.112737 01580000 ################################################################
5540 23:54:01.112878
5541 23:54:01.358974 01600000 ################################################################
5542 23:54:01.359133
5543 23:54:01.607832 01680000 ################################################################
5544 23:54:01.608010
5545 23:54:01.862677 01700000 ################################################################
5546 23:54:01.862846
5547 23:54:02.117028 01780000 ################################################################
5548 23:54:02.117167
5549 23:54:02.362224 01800000 ################################################################
5550 23:54:02.362365
5551 23:54:02.611466 01880000 ################################################################
5552 23:54:02.611598
5553 23:54:02.856946 01900000 ################################################################
5554 23:54:02.857133
5555 23:54:03.101797 01980000 ################################################################
5556 23:54:03.101946
5557 23:54:03.346330 01a00000 ################################################################
5558 23:54:03.346472
5559 23:54:03.595660 01a80000 ################################################################
5560 23:54:03.595851
5561 23:54:03.847789 01b00000 ################################################################
5562 23:54:03.847929
5563 23:54:04.095591 01b80000 ################################################################
5564 23:54:04.095739
5565 23:54:04.344208 01c00000 ################################################################
5566 23:54:04.344403
5567 23:54:04.589782 01c80000 ################################################################
5568 23:54:04.589954
5569 23:54:04.837626 01d00000 ################################################################
5570 23:54:04.837801
5571 23:54:05.089058 01d80000 ################################################################
5572 23:54:05.089249
5573 23:54:05.272329 01e00000 ################################################ done.
5574 23:54:05.272490
5575 23:54:05.275294 The bootfile was 31842818 bytes long.
5576 23:54:05.275400
5577 23:54:05.279077 Sending tftp read request... done.
5578 23:54:05.279182
5579 23:54:05.279274 Waiting for the transfer...
5580 23:54:05.281984
5581 23:54:05.282085 00000000 # done.
5582 23:54:05.282183
5583 23:54:05.288863 Command line loaded dynamically from TFTP file: 14084357/tftp-deploy-30xe4kpc/kernel/cmdline
5584 23:54:05.288969
5585 23:54:05.315637 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14084357/extract-nfsrootfs-0a9r7_s_,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5586 23:54:05.315759
5587 23:54:05.315854 Loading FIT.
5588 23:54:05.315944
5589 23:54:05.318893 Image ramdisk-1 has 18719586 bytes.
5590 23:54:05.318991
5591 23:54:05.322092 Image fdt-1 has 57695 bytes.
5592 23:54:05.322190
5593 23:54:05.325590 Image kernel-1 has 13063488 bytes.
5594 23:54:05.325693
5595 23:54:05.335333 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5596 23:54:05.335440
5597 23:54:05.345395 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5598 23:54:05.345501
5599 23:54:05.352227 Choosing best match conf-1 for compat google,juniper-sku16.
5600 23:54:05.356554
5601 23:54:05.360687 Connected to device vid:did:rid of 1ae0:0028:00
5602 23:54:05.369024
5603 23:54:05.371871 tpm_get_response: command 0x17b, return code 0x0
5604 23:54:05.371972
5605 23:54:05.375440 tpm_cleanup: add release locality here.
5606 23:54:05.375541
5607 23:54:05.379102 Shutting down all USB controllers.
5608 23:54:05.379197
5609 23:54:05.382229 Removing current net device
5610 23:54:05.382326
5611 23:54:05.385372 Exiting depthcharge with code 4 at timestamp: 33280241
5612 23:54:05.385476
5613 23:54:05.389134 LZMA decompressing kernel-1 to 0x80193568
5614 23:54:05.389229
5615 23:54:05.392051 LZMA decompressing kernel-1 to 0x40000000
5616 23:54:07.252508
5617 23:54:07.252674 jumping to kernel
5618 23:54:07.253407 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
5619 23:54:07.253510 start: 2.2.5 auto-login-action (timeout 00:04:08) [common]
5620 23:54:07.253590 Setting prompt string to ['Linux version [0-9]']
5621 23:54:07.253661 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5622 23:54:07.253730 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5623 23:54:07.327188
5624 23:54:07.330753 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5625 23:54:07.334389 start: 2.2.5.1 login-action (timeout 00:04:08) [common]
5626 23:54:07.334513 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5627 23:54:07.334615 Setting prompt string to []
5628 23:54:07.334720 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5629 23:54:07.334824 Using line separator: #'\n'#
5630 23:54:07.334915 No login prompt set.
5631 23:54:07.335021 Parsing kernel messages
5632 23:54:07.335109 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5633 23:54:07.335279 [login-action] Waiting for messages, (timeout 00:04:08)
5634 23:54:07.335395 Waiting using forced prompt support (timeout 00:02:04)
5635 23:54:07.354445 [ 0.000000] Linux version 6.1.91-cip21 (KernelCI@build-j210753-arm64-gcc-10-defconfig-arm64-chromebook-lsmmd) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Wed May 29 23:36:28 UTC 2024
5636 23:54:07.357562 [ 0.000000] random: crng init done
5637 23:54:07.364033 [ 0.000000] Machine model: Google juniper sku16 board
5638 23:54:07.364142 [ 0.000000] efi: UEFI not found.
5639 23:54:07.373875 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5640 23:54:07.380661 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5641 23:54:07.390505 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5642 23:54:07.394174 [ 0.000000] printk: bootconsole [mtk8250] enabled
5643 23:54:07.402351 [ 0.000000] NUMA: No NUMA configuration found
5644 23:54:07.408725 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5645 23:54:07.415435 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5646 23:54:07.415542 [ 0.000000] Zone ranges:
5647 23:54:07.422065 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5648 23:54:07.425317 [ 0.000000] DMA32 empty
5649 23:54:07.432166 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5650 23:54:07.435171 [ 0.000000] Movable zone start for each node
5651 23:54:07.438913 [ 0.000000] Early memory node ranges
5652 23:54:07.445531 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5653 23:54:07.452103 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5654 23:54:07.458936 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5655 23:54:07.465660 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5656 23:54:07.472018 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5657 23:54:07.478687 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5658 23:54:07.494583 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5659 23:54:07.501422 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5660 23:54:07.507985 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5661 23:54:07.511232 [ 0.000000] psci: probing for conduit method from DT.
5662 23:54:07.518417 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5663 23:54:07.521374 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5664 23:54:07.527673 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5665 23:54:07.530976 [ 0.000000] psci: SMC Calling Convention v1.1
5666 23:54:07.537878 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5667 23:54:07.541141 [ 0.000000] Detected VIPT I-cache on CPU0
5668 23:54:07.547776 [ 0.000000] CPU features: detected: GIC system register CPU interface
5669 23:54:07.554214 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5670 23:54:07.561460 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5671 23:54:07.567459 [ 0.000000] CPU features: detected: ARM erratum 845719
5672 23:54:07.571241 [ 0.000000] alternatives: applying boot alternatives
5673 23:54:07.574515 [ 0.000000] Fallback order for Node 0: 0
5674 23:54:07.580963 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5675 23:54:07.584607 [ 0.000000] Policy zone: Normal
5676 23:54:07.610817 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14084357/extract-nfsrootfs-0a9r7_s_,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5677 23:54:07.624740 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5678 23:54:07.634348 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5679 23:54:07.641062 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5680 23:54:07.647599 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5681 23:54:07.650995 <6>[ 0.000000] software IO TLB: area num 8.
5682 23:54:07.678109 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5683 23:54:07.736616 <6>[ 0.000000] Memory: 3896920K/4191232K available (18112K kernel code, 4120K rwdata, 22504K rodata, 8512K init, 616K bss, 261544K reserved, 32768K cma-reserved)
5684 23:54:07.743350 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5685 23:54:07.749708 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5686 23:54:07.753377 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5687 23:54:07.759761 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5688 23:54:07.766091 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5689 23:54:07.769673 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5690 23:54:07.779520 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5691 23:54:07.785987 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5692 23:54:07.789190 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5693 23:54:07.801498 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5694 23:54:07.807650 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5695 23:54:07.811182 <6>[ 0.000000] GICv3: 640 SPIs implemented
5696 23:54:07.814354 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5697 23:54:07.821145 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5698 23:54:07.824380 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5699 23:54:07.830888 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5700 23:54:07.844202 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5701 23:54:07.854011 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5702 23:54:07.863777 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5703 23:54:07.873213 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5704 23:54:07.886766 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5705 23:54:07.892761 <6>[ 0.000001] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5706 23:54:07.899887 <6>[ 0.009467] Console: colour dummy device 80x25
5707 23:54:07.903694 <6>[ 0.014532] printk: console [tty1] enabled
5708 23:54:07.912971 <6>[ 0.018919] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5709 23:54:07.919855 <6>[ 0.029384] pid_max: default: 32768 minimum: 301
5710 23:54:07.923089 <6>[ 0.034266] LSM: Security Framework initializing
5711 23:54:07.933542 <6>[ 0.039181] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5712 23:54:07.940080 <6>[ 0.046805] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5713 23:54:07.946740 <4>[ 0.055677] cacheinfo: Unable to detect cache hierarchy for CPU 0
5714 23:54:07.956801 <6>[ 0.062307] cblist_init_generic: Setting adjustable number of callback queues.
5715 23:54:07.959888 <6>[ 0.069752] cblist_init_generic: Setting shift to 3 and lim to 1.
5716 23:54:07.970094 <6>[ 0.076104] cblist_init_generic: Setting adjustable number of callback queues.
5717 23:54:07.976306 <6>[ 0.083548] cblist_init_generic: Setting shift to 3 and lim to 1.
5718 23:54:07.979728 <6>[ 0.089945] rcu: Hierarchical SRCU implementation.
5719 23:54:07.986323 <6>[ 0.094971] rcu: Max phase no-delay instances is 1000.
5720 23:54:07.993494 <6>[ 0.102902] EFI services will not be available.
5721 23:54:07.996393 <6>[ 0.107849] smp: Bringing up secondary CPUs ...
5722 23:54:08.007426 <6>[ 0.113127] Detected VIPT I-cache on CPU1
5723 23:54:08.013628 <4>[ 0.113172] cacheinfo: Unable to detect cache hierarchy for CPU 1
5724 23:54:08.020156 <6>[ 0.113182] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5725 23:54:08.027068 <6>[ 0.113215] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5726 23:54:08.030347 <6>[ 0.113695] Detected VIPT I-cache on CPU2
5727 23:54:08.037379 <4>[ 0.113728] cacheinfo: Unable to detect cache hierarchy for CPU 2
5728 23:54:08.043425 <6>[ 0.113733] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5729 23:54:08.050117 <6>[ 0.113745] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5730 23:54:08.053356 <6>[ 0.114191] Detected VIPT I-cache on CPU3
5731 23:54:08.059856 <4>[ 0.114221] cacheinfo: Unable to detect cache hierarchy for CPU 3
5732 23:54:08.070090 <6>[ 0.114226] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5733 23:54:08.077144 <6>[ 0.114237] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5734 23:54:08.079880 <6>[ 0.114811] CPU features: detected: Spectre-v2
5735 23:54:08.083905 <6>[ 0.114821] CPU features: detected: Spectre-BHB
5736 23:54:08.090322 <6>[ 0.114826] CPU features: detected: ARM erratum 858921
5737 23:54:08.093924 <6>[ 0.114831] Detected VIPT I-cache on CPU4
5738 23:54:08.100009 <4>[ 0.114879] cacheinfo: Unable to detect cache hierarchy for CPU 4
5739 23:54:08.106573 <6>[ 0.114887] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5740 23:54:08.113340 <6>[ 0.114896] arch_timer: Enabling local workaround for ARM erratum 858921
5741 23:54:08.120176 <6>[ 0.114906] arch_timer: CPU4: Trapping CNTVCT access
5742 23:54:08.127244 <6>[ 0.114914] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5743 23:54:08.130207 <6>[ 0.115399] Detected VIPT I-cache on CPU5
5744 23:54:08.136985 <4>[ 0.115441] cacheinfo: Unable to detect cache hierarchy for CPU 5
5745 23:54:08.143946 <6>[ 0.115446] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5746 23:54:08.149990 <6>[ 0.115453] arch_timer: Enabling local workaround for ARM erratum 858921
5747 23:54:08.156730 <6>[ 0.115460] arch_timer: CPU5: Trapping CNTVCT access
5748 23:54:08.163692 <6>[ 0.115465] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5749 23:54:08.166561 <6>[ 0.115999] Detected VIPT I-cache on CPU6
5750 23:54:08.173557 <4>[ 0.116044] cacheinfo: Unable to detect cache hierarchy for CPU 6
5751 23:54:08.180496 <6>[ 0.116050] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5752 23:54:08.186796 <6>[ 0.116057] arch_timer: Enabling local workaround for ARM erratum 858921
5753 23:54:08.193409 <6>[ 0.116063] arch_timer: CPU6: Trapping CNTVCT access
5754 23:54:08.199896 <6>[ 0.116068] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5755 23:54:08.203388 <6>[ 0.116599] Detected VIPT I-cache on CPU7
5756 23:54:08.209810 <4>[ 0.116642] cacheinfo: Unable to detect cache hierarchy for CPU 7
5757 23:54:08.216906 <6>[ 0.116648] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5758 23:54:08.223569 <6>[ 0.116655] arch_timer: Enabling local workaround for ARM erratum 858921
5759 23:54:08.230168 <6>[ 0.116662] arch_timer: CPU7: Trapping CNTVCT access
5760 23:54:08.236455 <6>[ 0.116667] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5761 23:54:08.240005 <6>[ 0.116715] smp: Brought up 1 node, 8 CPUs
5762 23:54:08.246543 <6>[ 0.355594] SMP: Total of 8 processors activated.
5763 23:54:08.250265 <6>[ 0.360531] CPU features: detected: 32-bit EL0 Support
5764 23:54:08.256797 <6>[ 0.365902] CPU features: detected: 32-bit EL1 Support
5765 23:54:08.263051 <6>[ 0.371268] CPU features: detected: CRC32 instructions
5766 23:54:08.266625 <6>[ 0.376696] CPU: All CPU(s) started at EL2
5767 23:54:08.273192 <6>[ 0.381039] alternatives: applying system-wide alternatives
5768 23:54:08.276740 <6>[ 0.389110] devtmpfs: initialized
5769 23:54:08.291637 <6>[ 0.398061] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5770 23:54:08.301766 <6>[ 0.408011] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5771 23:54:08.304779 <6>[ 0.415737] pinctrl core: initialized pinctrl subsystem
5772 23:54:08.313581 <6>[ 0.422836] DMI not present or invalid.
5773 23:54:08.320226 <6>[ 0.427205] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5774 23:54:08.326900 <6>[ 0.434113] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5775 23:54:08.336504 <6>[ 0.441642] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5776 23:54:08.343225 <6>[ 0.449892] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5777 23:54:08.349974 <6>[ 0.458071] audit: initializing netlink subsys (disabled)
5778 23:54:08.356283 <5>[ 0.463774] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5779 23:54:08.363099 <6>[ 0.464745] thermal_sys: Registered thermal governor 'step_wise'
5780 23:54:08.369895 <6>[ 0.471739] thermal_sys: Registered thermal governor 'power_allocator'
5781 23:54:08.373418 <6>[ 0.478036] cpuidle: using governor menu
5782 23:54:08.379817 <6>[ 0.488999] NET: Registered PF_QIPCRTR protocol family
5783 23:54:08.385983 <6>[ 0.494494] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5784 23:54:08.393127 <6>[ 0.501591] ASID allocator initialised with 32768 entries
5785 23:54:08.399674 <6>[ 0.508353] Serial: AMBA PL011 UART driver
5786 23:54:08.409409 <4>[ 0.518750] Trying to register duplicate clock ID: 113
5787 23:54:08.468951 <6>[ 0.575151] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5788 23:54:08.483485 <6>[ 0.589473] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5789 23:54:08.486862 <6>[ 0.599216] KASLR enabled
5790 23:54:08.500910 <6>[ 0.607227] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5791 23:54:08.507905 <6>[ 0.614229] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5792 23:54:08.514217 <6>[ 0.620705] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5793 23:54:08.520772 <6>[ 0.627696] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5794 23:54:08.527853 <6>[ 0.634170] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5795 23:54:08.534200 <6>[ 0.641161] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5796 23:54:08.540973 <6>[ 0.647635] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5797 23:54:08.547471 <6>[ 0.654625] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5798 23:54:08.550851 <6>[ 0.662194] ACPI: Interpreter disabled.
5799 23:54:08.560707 <6>[ 0.670161] iommu: Default domain type: Translated
5800 23:54:08.567362 <6>[ 0.675268] iommu: DMA domain TLB invalidation policy: strict mode
5801 23:54:08.570785 <5>[ 0.681899] SCSI subsystem initialized
5802 23:54:08.577365 <6>[ 0.686309] usbcore: registered new interface driver usbfs
5803 23:54:08.584081 <6>[ 0.692037] usbcore: registered new interface driver hub
5804 23:54:08.587091 <6>[ 0.697578] usbcore: registered new device driver usb
5805 23:54:08.594383 <6>[ 0.703869] pps_core: LinuxPPS API ver. 1 registered
5806 23:54:08.604154 <6>[ 0.709054] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5807 23:54:08.607427 <6>[ 0.718378] PTP clock support registered
5808 23:54:08.610959 <6>[ 0.722631] EDAC MC: Ver: 3.0.0
5809 23:54:08.618521 <6>[ 0.728266] FPGA manager framework
5810 23:54:08.621978 <6>[ 0.731953] Advanced Linux Sound Architecture Driver Initialized.
5811 23:54:08.626121 <6>[ 0.738698] vgaarb: loaded
5812 23:54:08.632845 <6>[ 0.741827] clocksource: Switched to clocksource arch_sys_counter
5813 23:54:08.639014 <5>[ 0.748256] VFS: Disk quotas dquot_6.6.0
5814 23:54:08.645731 <6>[ 0.752430] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5815 23:54:08.649200 <6>[ 0.759606] pnp: PnP ACPI: disabled
5816 23:54:08.657120 <6>[ 0.766455] NET: Registered PF_INET protocol family
5817 23:54:08.663533 <6>[ 0.771688] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5818 23:54:08.675463 <6>[ 0.781581] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5819 23:54:08.685145 <6>[ 0.790335] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5820 23:54:08.692328 <6>[ 0.798286] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5821 23:54:08.698809 <6>[ 0.806518] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5822 23:54:08.705098 <6>[ 0.814611] TCP: Hash tables configured (established 32768 bind 32768)
5823 23:54:08.715646 <6>[ 0.821438] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5824 23:54:08.722024 <6>[ 0.828410] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5825 23:54:08.728499 <6>[ 0.835892] NET: Registered PF_UNIX/PF_LOCAL protocol family
5826 23:54:08.731871 <6>[ 0.841974] RPC: Registered named UNIX socket transport module.
5827 23:54:08.738563 <6>[ 0.848112] RPC: Registered udp transport module.
5828 23:54:08.741680 <6>[ 0.853036] RPC: Registered tcp transport module.
5829 23:54:08.748874 <6>[ 0.857961] RPC: Registered tcp NFSv4.1 backchannel transport module.
5830 23:54:08.755452 <6>[ 0.864613] PCI: CLS 0 bytes, default 64
5831 23:54:08.758470 <6>[ 0.868864] Unpacking initramfs...
5832 23:54:08.765449 <6>[ 0.872936] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5833 23:54:08.775682 <6>[ 0.881634] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5834 23:54:08.782146 <6>[ 0.890528] kvm [1]: IPA Size Limit: 40 bits
5835 23:54:08.785074 <6>[ 0.896860] kvm [1]: vgic-v2@c420000
5836 23:54:08.792204 <6>[ 0.900688] kvm [1]: GIC system register CPU interface enabled
5837 23:54:08.795647 <6>[ 0.906862] kvm [1]: vgic interrupt IRQ18
5838 23:54:08.802052 <6>[ 0.911218] kvm [1]: Hyp mode initialized successfully
5839 23:54:08.808418 <5>[ 0.917551] Initialise system trusted keyrings
5840 23:54:08.815577 <6>[ 0.922334] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5841 23:54:08.822923 <6>[ 0.932281] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5842 23:54:08.829359 <5>[ 0.938693] NFS: Registering the id_resolver key type
5843 23:54:08.832994 <5>[ 0.943998] Key type id_resolver registered
5844 23:54:08.839303 <5>[ 0.948411] Key type id_legacy registered
5845 23:54:08.845734 <6>[ 0.952708] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5846 23:54:08.852529 <6>[ 0.959626] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5847 23:54:08.859342 <6>[ 0.967364] 9p: Installing v9fs 9p2000 file system support
5848 23:54:08.886462 <5>[ 0.995586] Key type asymmetric registered
5849 23:54:08.889340 <5>[ 0.999922] Asymmetric key parser 'x509' registered
5850 23:54:08.899510 <6>[ 1.005069] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5851 23:54:08.903118 <6>[ 1.012678] io scheduler mq-deadline registered
5852 23:54:08.906101 <6>[ 1.017432] io scheduler kyber registered
5853 23:54:08.928574 <6>[ 1.038097] EINJ: ACPI disabled.
5854 23:54:08.935368 <4>[ 1.041842] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5855 23:54:08.972499 <6>[ 1.082077] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5856 23:54:08.981014 <6>[ 1.090531] printk: console [ttyS0] disabled
5857 23:54:09.009088 <6>[ 1.115170] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5858 23:54:09.015586 <6>[ 1.124636] printk: console [ttyS0] enabled
5859 23:54:09.019121 <6>[ 1.124636] printk: console [ttyS0] enabled
5860 23:54:09.025706 <6>[ 1.133552] printk: bootconsole [mtk8250] disabled
5861 23:54:09.028778 <6>[ 1.133552] printk: bootconsole [mtk8250] disabled
5862 23:54:09.039244 <3>[ 1.144074] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5863 23:54:09.045667 <3>[ 1.152448] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5864 23:54:09.074456 <6>[ 1.180846] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5865 23:54:09.081058 <6>[ 1.190488] serial serial0: tty port ttyS1 registered
5866 23:54:09.087851 <6>[ 1.197033] SuperH (H)SCI(F) driver initialized
5867 23:54:09.091005 <6>[ 1.202515] msm_serial: driver initialized
5868 23:54:09.106512 <6>[ 1.212794] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5869 23:54:09.116448 <6>[ 1.221386] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5870 23:54:09.123138 <6>[ 1.229956] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5871 23:54:09.133443 <6>[ 1.238524] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5872 23:54:09.139997 <6>[ 1.247176] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5873 23:54:09.149925 <6>[ 1.255840] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5874 23:54:09.159985 <6>[ 1.264575] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5875 23:54:09.166210 <6>[ 1.273311] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5876 23:54:09.176244 <6>[ 1.281875] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5877 23:54:09.182977 <6>[ 1.290671] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5878 23:54:09.193428 <4>[ 1.303019] cacheinfo: Unable to detect cache hierarchy for CPU 0
5879 23:54:09.202866 <6>[ 1.312337] loop: module loaded
5880 23:54:09.214560 <6>[ 1.324167] vsim1: Bringing 1800000uV into 2700000-2700000uV
5881 23:54:09.232776 <6>[ 1.342114] megasas: 07.719.03.00-rc1
5882 23:54:09.241175 <6>[ 1.350796] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5883 23:54:09.256200 <6>[ 1.365204] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5884 23:54:09.272991 <6>[ 1.381956] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5885 23:54:09.329157 <6>[ 1.432082] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5886 23:54:09.383755 <6>[ 1.493305] Freeing initrd memory: 18276K
5887 23:54:09.398978 <4>[ 1.505121] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5888 23:54:09.405890 <4>[ 1.514351] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.91-cip21 #1
5889 23:54:09.412316 <4>[ 1.521049] Hardware name: Google juniper sku16 board (DT)
5890 23:54:09.415415 <4>[ 1.526788] Call trace:
5891 23:54:09.419200 <4>[ 1.529488] dump_backtrace.part.0+0xe0/0xf0
5892 23:54:09.422159 <4>[ 1.534024] show_stack+0x18/0x30
5893 23:54:09.425559 <4>[ 1.537596] dump_stack_lvl+0x68/0x84
5894 23:54:09.429184 <4>[ 1.541518] dump_stack+0x18/0x34
5895 23:54:09.435871 <4>[ 1.545088] sysfs_warn_dup+0x64/0x80
5896 23:54:09.438862 <4>[ 1.549010] sysfs_do_create_link_sd+0xf0/0x100
5897 23:54:09.442667 <4>[ 1.553797] sysfs_create_link+0x20/0x40
5898 23:54:09.449038 <4>[ 1.557976] bus_add_device+0x68/0x10c
5899 23:54:09.452518 <4>[ 1.561982] device_add+0x340/0x7ac
5900 23:54:09.455461 <4>[ 1.565725] of_device_add+0x44/0x60
5901 23:54:09.459117 <4>[ 1.569559] of_platform_device_create_pdata+0x90/0x120
5902 23:54:09.465768 <4>[ 1.575040] of_platform_bus_create+0x170/0x370
5903 23:54:09.469042 <4>[ 1.579826] of_platform_populate+0x50/0xfc
5904 23:54:09.475767 <4>[ 1.584265] parse_mtd_partitions+0x1dc/0x510
5905 23:54:09.478909 <4>[ 1.588879] mtd_device_parse_register+0xf8/0x2e0
5906 23:54:09.482111 <4>[ 1.593837] spi_nor_probe+0x21c/0x2f0
5907 23:54:09.485732 <4>[ 1.597843] spi_mem_probe+0x6c/0xb0
5908 23:54:09.489120 <4>[ 1.601675] spi_probe+0x84/0xe4
5909 23:54:09.495870 <4>[ 1.605156] really_probe+0xbc/0x2e0
5910 23:54:09.499053 <4>[ 1.608986] __driver_probe_device+0x78/0x11c
5911 23:54:09.502747 <4>[ 1.613598] driver_probe_device+0xd8/0x160
5912 23:54:09.509155 <4>[ 1.618036] __device_attach_driver+0xb8/0x134
5913 23:54:09.512516 <4>[ 1.622734] bus_for_each_drv+0x78/0xd0
5914 23:54:09.516231 <4>[ 1.626824] __device_attach+0xa8/0x1c0
5915 23:54:09.522260 <4>[ 1.630914] device_initial_probe+0x14/0x20
5916 23:54:09.525802 <4>[ 1.635353] bus_probe_device+0x9c/0xa4
5917 23:54:09.528858 <4>[ 1.639443] device_add+0x3ac/0x7ac
5918 23:54:09.532546 <4>[ 1.643185] __spi_add_device+0x78/0x120
5919 23:54:09.535853 <4>[ 1.647363] spi_add_device+0x40/0x7c
5920 23:54:09.542383 <4>[ 1.651280] spi_register_controller+0x610/0xad0
5921 23:54:09.545490 <4>[ 1.656153] devm_spi_register_controller+0x4c/0xa4
5922 23:54:09.552770 <4>[ 1.661286] mtk_spi_probe+0x3f8/0x650
5923 23:54:09.555697 <4>[ 1.665290] platform_probe+0x68/0xe0
5924 23:54:09.559494 <4>[ 1.669209] really_probe+0xbc/0x2e0
5925 23:54:09.562501 <4>[ 1.673038] __driver_probe_device+0x78/0x11c
5926 23:54:09.568811 <4>[ 1.677650] driver_probe_device+0xd8/0x160
5927 23:54:09.572466 <4>[ 1.682087] __driver_attach+0x94/0x19c
5928 23:54:09.575967 <4>[ 1.686178] bus_for_each_dev+0x70/0xd0
5929 23:54:09.578985 <4>[ 1.690268] driver_attach+0x24/0x30
5930 23:54:09.582665 <4>[ 1.694097] bus_add_driver+0x154/0x20c
5931 23:54:09.589205 <4>[ 1.698187] driver_register+0x78/0x130
5932 23:54:09.592285 <4>[ 1.702278] __platform_driver_register+0x28/0x34
5933 23:54:09.595859 <4>[ 1.707237] mtk_spi_driver_init+0x1c/0x28
5934 23:54:09.602317 <4>[ 1.711591] do_one_initcall+0x50/0x1d0
5935 23:54:09.605885 <4>[ 1.715681] kernel_init_freeable+0x21c/0x288
5936 23:54:09.608940 <4>[ 1.720294] kernel_init+0x24/0x12c
5937 23:54:09.612440 <4>[ 1.724039] ret_from_fork+0x10/0x20
5938 23:54:09.623872 <6>[ 1.732920] tun: Universal TUN/TAP device driver, 1.6
5939 23:54:09.626884 <6>[ 1.739198] thunder_xcv, ver 1.0
5940 23:54:09.629927 <6>[ 1.742718] thunder_bgx, ver 1.0
5941 23:54:09.633801 <6>[ 1.746224] nicpf, ver 1.0
5942 23:54:09.644658 <6>[ 1.750586] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5943 23:54:09.647967 <6>[ 1.758069] hns3: Copyright (c) 2017 Huawei Corporation.
5944 23:54:09.651185 <6>[ 1.763667] hclge is initializing
5945 23:54:09.657737 <6>[ 1.767252] e1000: Intel(R) PRO/1000 Network Driver
5946 23:54:09.664607 <6>[ 1.772387] e1000: Copyright (c) 1999-2006 Intel Corporation.
5947 23:54:09.667649 <6>[ 1.778408] e1000e: Intel(R) PRO/1000 Network Driver
5948 23:54:09.674605 <6>[ 1.783629] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5949 23:54:09.681538 <6>[ 1.789830] igb: Intel(R) Gigabit Ethernet Network Driver
5950 23:54:09.688161 <6>[ 1.795487] igb: Copyright (c) 2007-2014 Intel Corporation.
5951 23:54:09.694597 <6>[ 1.801330] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5952 23:54:09.701030 <6>[ 1.807852] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5953 23:54:09.704651 <6>[ 1.814402] sky2: driver version 1.30
5954 23:54:09.710864 <6>[ 1.819642] usbcore: registered new device driver r8152-cfgselector
5955 23:54:09.717794 <6>[ 1.826185] usbcore: registered new interface driver r8152
5956 23:54:09.724687 <6>[ 1.832020] VFIO - User Level meta-driver version: 0.3
5957 23:54:09.731476 <6>[ 1.839794] mtu3 11201000.usb: uwk - reg:0x420, version:101
5958 23:54:09.737908 <4>[ 1.845669] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5959 23:54:09.744456 <6>[ 1.852953] mtu3 11201000.usb: dr_mode: 1, drd: auto
5960 23:54:09.751116 <6>[ 1.858180] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5961 23:54:09.754168 <6>[ 1.864364] mtu3 11201000.usb: usb3-drd: 0
5962 23:54:09.761211 <6>[ 1.869917] mtu3 11201000.usb: xHCI platform device register success...
5963 23:54:09.772462 <4>[ 1.878518] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5964 23:54:09.779106 <6>[ 1.886462] xhci-mtk 11200000.usb: xHCI Host Controller
5965 23:54:09.785850 <6>[ 1.891974] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5966 23:54:09.792294 <6>[ 1.899697] xhci-mtk 11200000.usb: USB3 root hub has no ports
5967 23:54:09.799076 <6>[ 1.905705] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5968 23:54:09.805906 <6>[ 1.915129] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5969 23:54:09.813324 <6>[ 1.921206] xhci-mtk 11200000.usb: xHCI Host Controller
5970 23:54:09.819656 <6>[ 1.926717] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5971 23:54:09.826112 <6>[ 1.934377] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5972 23:54:09.829797 <6>[ 1.941191] hub 1-0:1.0: USB hub found
5973 23:54:09.836422 <6>[ 1.945220] hub 1-0:1.0: 1 port detected
5974 23:54:09.842642 <6>[ 1.950574] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5975 23:54:09.849785 <6>[ 1.959214] hub 2-0:1.0: USB hub found
5976 23:54:09.856797 <3>[ 1.963260] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5977 23:54:09.863214 <6>[ 1.971156] usbcore: registered new interface driver usb-storage
5978 23:54:09.870004 <6>[ 1.977741] usbcore: registered new device driver onboard-usb-hub
5979 23:54:09.879944 <4>[ 1.985948] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
5980 23:54:09.889031 <6>[ 1.998183] mt6397-rtc mt6358-rtc: registered as rtc0
5981 23:54:09.898499 <6>[ 2.003688] mt6397-rtc mt6358-rtc: setting system clock to 2024-05-29T23:54:09 UTC (1717026849)
5982 23:54:09.902129 <6>[ 2.013524] i2c_dev: i2c /dev entries driver
5983 23:54:09.913711 <6>[ 2.019946] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5984 23:54:09.923699 <6>[ 2.028264] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5985 23:54:09.926998 <6>[ 2.037170] i2c 4-0058: Fixed dependency cycle(s) with /panel
5986 23:54:09.937091 <6>[ 2.043200] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
5987 23:54:09.943543 <3>[ 2.050664] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5988 23:54:09.961523 <6>[ 2.067611] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
5989 23:54:09.970281 <6>[ 2.079086] cpu cpu0: EM: created perf domain
5990 23:54:09.980038 <6>[ 2.084515] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
5991 23:54:09.986446 <6>[ 2.095798] cpu cpu4: EM: created perf domain
5992 23:54:09.992991 <6>[ 2.102496] sdhci: Secure Digital Host Controller Interface driver
5993 23:54:09.999925 <6>[ 2.108952] sdhci: Copyright(c) Pierre Ossman
5994 23:54:10.006534 <6>[ 2.114326] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
5995 23:54:10.013072 <6>[ 2.114416] Synopsys Designware Multimedia Card Interface Driver
5996 23:54:10.019459 <6>[ 2.126866] sdhci-pltfm: SDHCI platform and OF driver helper
5997 23:54:10.026443 <6>[ 2.134737] ledtrig-cpu: registered to indicate activity on CPUs
5998 23:54:10.032745 <6>[ 2.142462] usbcore: registered new interface driver usbhid
5999 23:54:10.036513 <6>[ 2.148301] usbhid: USB HID core driver
6000 23:54:10.047237 <6>[ 2.152625] spi_master spi2: will run message pump with realtime priority
6001 23:54:10.050603 <4>[ 2.152768] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6002 23:54:10.058288 <4>[ 2.167043] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6003 23:54:10.071717 <6>[ 2.172448] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6004 23:54:10.090994 <6>[ 2.190467] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6005 23:54:10.097586 <4>[ 2.197686] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6006 23:54:10.100818 <6>[ 2.205229] cros-ec-spi spi2.0: Chrome EC device registered
6007 23:54:10.114375 <4>[ 2.220309] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6008 23:54:10.125764 <4>[ 2.231984] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6009 23:54:10.132540 <4>[ 2.240998] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6010 23:54:10.146963 <6>[ 2.252778] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6011 23:54:10.150148 <6>[ 2.258182] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6012 23:54:10.157085 <6>[ 2.266444] mmc0: new HS400 MMC card at address 0001
6013 23:54:10.163609 <6>[ 2.273063] mmcblk0: mmc0:0001 TB2932 29.2 GiB
6014 23:54:10.174179 <6>[ 2.283940] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6015 23:54:10.183321 <6>[ 2.292872] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
6016 23:54:10.193291 <6>[ 2.296807] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6017 23:54:10.197201 <6>[ 2.299781] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
6018 23:54:10.207435 <6>[ 2.310263] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6019 23:54:10.213807 <6>[ 2.313295] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
6020 23:54:10.220502 <6>[ 2.324197] NET: Registered PF_PACKET protocol family
6021 23:54:10.233811 <6>[ 2.330240] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6022 23:54:10.236978 <6>[ 2.334810] 9pnet: Installing 9P2000 support
6023 23:54:10.246884 <6>[ 2.346912] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6024 23:54:10.250176 <5>[ 2.351380] Key type dns_resolver registered
6025 23:54:10.256951 <6>[ 2.366008] registered taskstats version 1
6026 23:54:10.263867 <6>[ 2.370373] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6027 23:54:10.267432 <5>[ 2.377179] Loading compiled-in X.509 certificates
6028 23:54:10.312933 <3>[ 2.419133] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6029 23:54:10.337943 <4>[ 2.443501] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6030 23:54:10.351608 <6>[ 2.454108] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6031 23:54:10.361539 <6>[ 2.465887] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6032 23:54:10.375004 <3>[ 2.477120] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6033 23:54:10.390044 <3>[ 2.492809] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6034 23:54:10.396696 <3>[ 2.505317] debugfs: File 'Playback' in directory 'dapm' already present!
6035 23:54:10.406854 <3>[ 2.512368] debugfs: File 'Capture' in directory 'dapm' already present!
6036 23:54:10.420857 <6>[ 2.523095] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input4
6037 23:54:10.423999 <6>[ 2.533305] hub 1-1:1.0: USB hub found
6038 23:54:10.430301 <6>[ 2.536983] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6039 23:54:10.436793 <6>[ 2.538287] hub 1-1:1.0: 3 ports detected
6040 23:54:10.443852 <6>[ 2.546303] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6041 23:54:10.453852 <6>[ 2.559092] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6042 23:54:10.460069 <6>[ 2.567611] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6043 23:54:10.469606 <6>[ 2.576129] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6044 23:54:10.480145 <6>[ 2.584648] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6045 23:54:10.486406 <6>[ 2.593166] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6046 23:54:10.493110 <6>[ 2.602396] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6047 23:54:10.500284 <6>[ 2.609934] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6048 23:54:10.507815 <6>[ 2.617212] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6049 23:54:10.518598 <6>[ 2.624456] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6050 23:54:10.525234 <6>[ 2.631881] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6051 23:54:10.531616 <6>[ 2.640155] panfrost 13040000.gpu: clock rate = 511999970
6052 23:54:10.541317 <6>[ 2.645856] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6053 23:54:10.547955 <6>[ 2.655840] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6054 23:54:10.558373 <6>[ 2.663864] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6055 23:54:10.571488 <6>[ 2.672298] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6056 23:54:10.578045 <6>[ 2.684374] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6057 23:54:10.588025 <6>[ 2.694267] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6058 23:54:10.598032 <6>[ 2.703003] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6059 23:54:10.608325 <6>[ 2.712151] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6060 23:54:10.614681 <6>[ 2.721280] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6061 23:54:10.624464 <6>[ 2.730417] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6062 23:54:10.634306 <6>[ 2.739718] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6063 23:54:10.644590 <6>[ 2.749018] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6064 23:54:10.654295 <6>[ 2.758493] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6065 23:54:10.661138 <6>[ 2.767966] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6066 23:54:10.670886 <6>[ 2.777092] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6067 23:54:10.743614 <6>[ 2.849678] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6068 23:54:10.753683 <6>[ 2.858602] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6069 23:54:10.764308 <6>[ 2.870711] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6070 23:54:10.783484 <6>[ 2.889849] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6071 23:54:11.465219 <6>[ 3.082318] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6072 23:54:11.474964 <4>[ 3.198968] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6073 23:54:11.481864 <4>[ 3.198985] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6074 23:54:11.488965 <6>[ 3.235865] r8152 1-1.2:1.0 eth0: v1.12.13
6075 23:54:11.495577 <6>[ 3.313854] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6076 23:54:11.501907 <6>[ 3.554767] Console: switching to colour frame buffer device 170x48
6077 23:54:11.508603 <6>[ 3.615403] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6078 23:54:11.526474 <6>[ 3.632553] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input5
6079 23:54:11.533051 <6>[ 3.640828] input: volume-buttons as /devices/platform/volume-buttons/input/input6
6080 23:54:12.859503 <6>[ 4.968747] r8152 1-1.2:1.0 eth0: carrier on
6081 23:54:15.248427 <5>[ 4.997867] Sending DHCP requests .., OK
6082 23:54:15.255102 <6>[ 7.362228] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23
6083 23:54:15.258712 <6>[ 7.370703] IP-Config: Complete:
6084 23:54:15.271792 <6>[ 7.374272] device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1
6085 23:54:15.281794 <6>[ 7.385180] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)
6086 23:54:15.288886 <6>[ 7.394661] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6087 23:54:15.291533 <6>[ 7.394671] nameserver0=192.168.201.1
6088 23:54:15.298300 <6>[ 7.407075] clk: Disabling unused clocks
6089 23:54:15.301817 <6>[ 7.412183] ALSA device list:
6090 23:54:15.309660 <6>[ 7.418860] #0: mt8183_mt6358_ts3a227_max98357
6091 23:54:15.320703 <6>[ 7.430234] Freeing unused kernel memory: 8512K
6092 23:54:15.328227 <6>[ 7.437706] Run /init as init process
6093 23:54:15.341950 Loading, please wait...
6094 23:54:15.377980 Starting systemd-udevd version 252.22-1~deb12u1
6095 23:54:15.673559 <3>[ 7.783136] mtk-scp 10500000.scp: invalid resource
6096 23:54:15.684413 <6>[ 7.790265] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6097 23:54:15.692578 <6>[ 7.802065] remoteproc remoteproc0: scp is available
6098 23:54:15.699692 <3>[ 7.807857] thermal_sys: Failed to find 'trips' node
6099 23:54:15.706239 <4>[ 7.808236] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6100 23:54:15.716499 <3>[ 7.813264] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6101 23:54:15.722600 <6>[ 7.818017] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6102 23:54:15.732637 <3>[ 7.818121] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6103 23:54:15.740096 <3>[ 7.818126] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6104 23:54:15.750518 <3>[ 7.818131] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6105 23:54:15.756815 <3>[ 7.818136] elan_i2c 2-0015: Error applying setting, reverse things back
6106 23:54:15.763370 <6>[ 7.821774] remoteproc remoteproc0: powering up scp
6107 23:54:15.769983 <4>[ 7.822192] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6108 23:54:15.780445 <4>[ 7.823874] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6109 23:54:15.786985 <3>[ 7.829124] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6110 23:54:15.796975 <4>[ 7.836894] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6111 23:54:15.803530 <4>[ 7.846839] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6112 23:54:15.813986 <3>[ 7.852742] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6113 23:54:15.824152 <3>[ 7.852760] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6114 23:54:15.833656 <3>[ 7.852766] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6115 23:54:15.840865 <3>[ 7.852839] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6116 23:54:15.850199 <3>[ 7.852845] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6117 23:54:15.859981 <3>[ 7.852849] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6118 23:54:15.867069 <3>[ 7.852855] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6119 23:54:15.876822 <3>[ 7.852859] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6120 23:54:15.883252 <3>[ 7.852879] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6121 23:54:15.890242 <3>[ 7.853586] remoteproc remoteproc0: request_firmware failed: -2
6122 23:54:15.893667 <6>[ 7.857204] Bluetooth: Core ver 2.22
6123 23:54:15.900951 <6>[ 7.857314] NET: Registered PF_BLUETOOTH protocol family
6124 23:54:15.907651 <6>[ 7.857317] Bluetooth: HCI device and connection manager initialized
6125 23:54:15.914470 <6>[ 7.857334] Bluetooth: HCI socket layer initialized
6126 23:54:15.917559 <6>[ 7.857340] Bluetooth: L2CAP socket layer initialized
6127 23:54:15.924835 <6>[ 7.857351] Bluetooth: SCO socket layer initialized
6128 23:54:15.932091 <6>[ 7.865701] mc: Linux media interface: v0.10
6129 23:54:15.934997 <3>[ 7.865883] thermal_sys: Failed to find 'trips' node
6130 23:54:15.945171 <3>[ 7.865886] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6131 23:54:15.952035 <3>[ 7.865893] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6132 23:54:15.958344 <4>[ 7.865896] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6133 23:54:15.965505 <6>[ 7.876823] cs_system_cfg: CoreSight Configuration manager initialised
6134 23:54:15.972225 <6>[ 7.887705] videodev: Linux video capture interface: v2.00
6135 23:54:15.982238 <5>[ 7.888404] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6136 23:54:15.989424 <5>[ 7.897432] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6137 23:54:15.995345 <6>[ 7.953888] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6138 23:54:16.006105 <5>[ 7.956426] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6139 23:54:16.016140 <6>[ 7.973381] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6140 23:54:16.022484 <4>[ 7.973809] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6141 23:54:16.032944 <6>[ 7.982428] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6142 23:54:16.039913 <6>[ 7.990945] cfg80211: failed to load regulatory.db
6143 23:54:16.046334 <6>[ 7.999586] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6144 23:54:16.052884 <6>[ 8.000079] Bluetooth: HCI UART driver ver 2.3
6145 23:54:16.056528 <6>[ 8.000103] Bluetooth: HCI UART protocol H4 registered
6146 23:54:16.063536 <6>[ 8.000172] Bluetooth: HCI UART protocol LL registered
6147 23:54:16.070113 <6>[ 8.000199] Bluetooth: HCI UART protocol Three-wire (H5) registered
6148 23:54:16.076905 <6>[ 8.000713] Bluetooth: HCI UART protocol Broadcom registered
6149 23:54:16.083239 <6>[ 8.000755] Bluetooth: HCI UART protocol QCA registered
6150 23:54:16.091849 <6>[ 8.000778] Bluetooth: HCI UART protocol Marvell registered
6151 23:54:16.101167 <6>[ 8.002496] Bluetooth: hci0: setting up ROME/QCA6390
6152 23:54:16.107632 <6>[ 8.018624] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6153 23:54:16.118992 <6>[ 8.023379] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6154 23:54:16.125973 Begin: Loading essential drivers<6>[ 8.023910] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6155 23:54:16.128866 ... done.
6156 23:54:16.132362 <6>[ 8.024001] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6157 23:54:16.139301 Begin: Running /scripts/init-premount ... done.
6158 23:54:16.145594 <6>[ 8.024406] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6159 23:54:16.145678
6160 23:54:16.155510 Begin: Mounting root file syste<6>[ 8.024546] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6161 23:54:16.168981 m ... Begin: Run<6>[ 8.047165] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6162 23:54:16.178596 ning /scripts/nf<6>[ 8.050673] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6163 23:54:16.182015 s-top ... done.
6164 23:54:16.191930 <6>[ 8.058356] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6165 23:54:16.192040
6166 23:54:16.198813 Begin: Running <6>[ 8.058449] usbcore: registered new interface driver uvcvideo
6167 23:54:16.208644 /scripts/nfs-premount ... Waitin<6>[ 8.073869] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6168 23:54:16.218383 g up to 60 secs for any ethernet<6>[ 8.074579] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6169 23:54:16.228613 to become avail<6>[ 8.081538] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6170 23:54:16.228699 able
6171 23:54:16.245024 Device /sys/class/net/eth0<6>[ 8.087260] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6172 23:54:16.245136 found
6173 23:54:16.245204 done.
6174 23:54:16.255073 Begin: Waiting up<6>[ 8.095289] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6175 23:54:16.264511 to 180 secs for any network dev<4>[ 8.188847] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6176 23:54:16.271432 <4>[ 8.188847] Fallback method does not support PEC.
6177 23:54:16.278058 ice to become available ... done<3>[ 8.221134] Bluetooth: hci0: Frame reassembly failed (-84)
6178 23:54:16.278144 .
6179 23:54:16.289006 <3>[ 8.233751] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6180 23:54:16.298887 <6>[ 8.262253] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6181 23:54:16.357044 <3>[ 8.462579] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6182 23:54:16.379832 IP-Config: eth0 hardware address 00:e0:4c:71:a7:1f mtu 1500 DHCP<6>[ 8.487260] Bluetooth: hci0: QCA Product ID :0x00000008
6183 23:54:16.379934
6184 23:54:16.385933 IP-Config: eth0 complete (dhcp<6>[ 8.495247] Bluetooth: hci0: QCA SOC Version :0x00000044
6185 23:54:16.389267 from 192.168.201.1):
6186 23:54:16.395999 address:<6>[ 8.503763] Bluetooth: hci0: QCA ROM Version :0x00000302
6187 23:54:16.406224 192.168.201.23 broadcast: 192<6>[ 8.512718] Bluetooth: hci0: QCA Patch Version:0x00000111
6188 23:54:16.409198 .168.201.255 netmask: 255.255.255.0
6189 23:54:16.416140 gatewa<6>[ 8.521450] Bluetooth: hci0: QCA controller version 0x00440302
6190 23:54:16.423056 y: 192.168.201.1 dns0 : 1<6>[ 8.531550] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6191 23:54:16.435928 92.168.201.1 dns1 : 0.0.0.0<4>[ 8.540710] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6192 23:54:16.436017
6193 23:54:16.445830 host : mt8183-kuku<3>[ 8.552500] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6194 23:54:16.455761 i-jacuzzi-juniper-sku16-cbg-3 <3>[ 8.563331] Bluetooth: hci0: QCA Failed to download patch (-2)
6195 23:54:16.459166
6196 23:54:16.465954 domain : lava-rack
6197 23:54:16.469068 rootserver: 192.168.201.1 rootpath:
6198 23:54:16.469190 filename :
6199 23:54:16.567600 done.
6200 23:54:16.574948 Begin: Running /scripts/nfs-bottom ... done.
6201 23:54:16.587988 Begin: Running /scripts/init-bottom ... done.
6202 23:54:16.714853 <6>[ 8.820493] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6203 23:54:16.789803 <4>[ 8.898613] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6204 23:54:16.812563 <4>[ 8.918054] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6205 23:54:16.827448 <4>[ 8.933457] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6206 23:54:16.837228 <4>[ 8.946450] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6207 23:54:17.950506 <6>[ 10.059902] NET: Registered PF_INET6 protocol family
6208 23:54:17.962831 <6>[ 10.071910] Segment Routing with IPv6
6209 23:54:17.970950 <6>[ 10.080065] In-situ OAM (IOAM) with IPv6
6210 23:54:18.151250 <30>[ 10.234070] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6211 23:54:18.172071 <30>[ 10.281171] systemd[1]: Detected architecture arm64.
6212 23:54:18.183000
6213 23:54:18.186284 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6214 23:54:18.186368
6215 23:54:18.209735 <30>[ 10.318815] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6216 23:54:19.125435 <30>[ 11.231458] systemd[1]: Queued start job for default target graphical.target.
6217 23:54:19.161811 <30>[ 11.267544] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6218 23:54:19.174108 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6219 23:54:19.195567 <30>[ 11.301307] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6220 23:54:19.209205 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6221 23:54:19.230957 <30>[ 11.336269] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6222 23:54:19.244712 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6223 23:54:19.261966 <30>[ 11.367479] systemd[1]: Created slice user.slice - User and Session Slice.
6224 23:54:19.274435 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6225 23:54:19.297043 <30>[ 11.398905] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6226 23:54:19.310461 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6227 23:54:19.333141 <30>[ 11.434869] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6228 23:54:19.345129 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6229 23:54:19.373890 <30>[ 11.470211] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6230 23:54:19.394076 <30>[ 11.499888] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6231 23:54:19.401558 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6232 23:54:19.419890 <30>[ 11.526037] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6233 23:54:19.432953 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6234 23:54:19.452619 <30>[ 11.558438] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6235 23:54:19.466964 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6236 23:54:19.480915 <30>[ 11.590118] systemd[1]: Reached target paths.target - Path Units.
6237 23:54:19.495608 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6238 23:54:19.512487 <30>[ 11.618027] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6239 23:54:19.524274 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6240 23:54:19.536774 <30>[ 11.645993] systemd[1]: Reached target slices.target - Slice Units.
6241 23:54:19.551458 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6242 23:54:19.564844 <30>[ 11.674031] systemd[1]: Reached target swap.target - Swaps.
6243 23:54:19.575218 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6244 23:54:19.596411 <30>[ 11.702086] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6245 23:54:19.610031 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6246 23:54:19.628742 <30>[ 11.734550] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6247 23:54:19.642295 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6248 23:54:19.663064 <30>[ 11.768806] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6249 23:54:19.676287 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6250 23:54:19.693186 <30>[ 11.799429] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6251 23:54:19.707364 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6252 23:54:19.724793 <30>[ 11.830877] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6253 23:54:19.736948 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6254 23:54:19.757728 <30>[ 11.863760] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6255 23:54:19.771840 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6256 23:54:19.790436 <30>[ 11.896163] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6257 23:54:19.803897 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6258 23:54:19.820768 <30>[ 11.926618] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6259 23:54:19.833590 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6260 23:54:19.872558 <30>[ 11.978450] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6261 23:54:19.884713 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6262 23:54:19.906394 <30>[ 12.011837] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6263 23:54:19.917646 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6264 23:54:19.940765 <30>[ 12.046903] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6265 23:54:19.954153 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6266 23:54:19.979964 <30>[ 12.079347] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6267 23:54:20.004383 <30>[ 12.110400] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6268 23:54:20.017599 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6269 23:54:20.065023 <30>[ 12.170658] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6270 23:54:20.076691 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6271 23:54:20.102706 <30>[ 12.208235] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6272 23:54:20.113120 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6273 23:54:20.136466 <30>[ 12.242255] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6274 23:54:20.149757 Startin<6>[ 12.253632] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6275 23:54:20.153369 g [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6276 23:54:20.179320 <30>[ 12.284798] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6277 23:54:20.190653 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6278 23:54:20.249075 <30>[ 12.355235] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6279 23:54:20.262607 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6280 23:54:20.287901 <30>[ 12.394042] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6281 23:54:20.298485 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6282 23:54:20.315733 <6>[ 12.424879] fuse: init (API version 7.37)
6283 23:54:20.331383 <30>[ 12.437354] systemd[1]: Starting systemd-journald.service - Journal Service...
6284 23:54:20.344576 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6285 23:54:20.392750 <30>[ 12.499007] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6286 23:54:20.404004 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6287 23:54:20.427884 <30>[ 12.530413] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6288 23:54:20.440124 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6289 23:54:20.473816 <30>[ 12.578712] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6290 23:54:20.483409 <3>[ 12.587991] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6291 23:54:20.502540 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems..<3>[ 12.607479] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6292 23:54:20.502646 .
6293 23:54:20.523142 <3>[ 12.628969] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6294 23:54:20.540457 <3>[ 12.646285] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6295 23:54:20.558602 <3>[ 12.664619] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6296 23:54:20.568456 <30>[ 12.674473] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6297 23:54:20.587724 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices..<3>[ 12.692131] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6298 23:54:20.587820 .
6299 23:54:20.603512 <3>[ 12.709474] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6300 23:54:20.619487 <30>[ 12.725002] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6301 23:54:20.625898 <3>[ 12.725250] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6302 23:54:20.638341 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6303 23:54:20.660890 <30>[ 12.766897] systemd[1]: Started systemd-journald.service - Journal Service.
6304 23:54:20.672117 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6305 23:54:20.697175 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6306 23:54:20.721639 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6307 23:54:20.746572 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6308 23:54:20.767770 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6309 23:54:20.787451 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6310 23:54:20.807071 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6311 23:54:20.825998 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6312 23:54:20.851163 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6313 23:54:20.874935 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6314 23:54:20.893718 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6315 23:54:20.913580 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6316 23:54:20.938012 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6317 23:54:20.959036 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6318 23:54:20.992212 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6319 23:54:21.017245 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6320 23:54:21.045596 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6321 23:54:21.075592 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6322 23:54:21.093313 <46>[ 13.199215] systemd-journald[314]: Received client request to flush runtime journal.
6323 23:54:21.113706 <4>[ 13.212546] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6324 23:54:21.124397 <3>[ 13.230278] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6325 23:54:21.135169 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6326 23:54:21.341332 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6327 23:54:21.678251 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6328 23:54:21.699197 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6329 23:54:21.717698 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6330 23:54:21.739358 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6331 23:54:22.207551 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6332 23:54:22.266967 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6333 23:54:22.317766 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6334 23:54:22.574779 <4>[ 14.683669] power_supply_show_property: 3 callbacks suppressed
6335 23:54:22.585693 <3>[ 14.683687] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6336 23:54:22.606063 <3>[ 14.711479] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6337 23:54:22.624138 <3>[ 14.729690] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6338 23:54:22.642421 <3>[ 14.748135] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6339 23:54:22.660754 <3>[ 14.766729] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6340 23:54:22.676199 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate <3>[ 14.783513] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6341 23:54:22.679712 Static Device Nodes in /dev.
6342 23:54:22.697277 <3>[ 14.803384] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6343 23:54:22.704341 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6344 23:54:22.717910 <3>[ 14.823784] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6345 23:54:22.729015 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6346 23:54:22.735724 <3>[ 14.841171] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6347 23:54:22.751409 <3>[ 14.857120] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6348 23:54:22.789994 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6349 23:54:22.814584 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6350 23:54:22.840319 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6351 23:54:23.038095 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6352 23:54:23.092678 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6353 23:54:23.156294 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6354 23:54:23.385283 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6355 23:54:23.404978 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6356 23:54:23.464708 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6357 23:54:23.547665 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6358 23:54:23.585231 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6359 23:54:23.605913 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6360 23:54:23.746576 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6361 23:54:23.773190 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6362 23:54:23.794600 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6363 23:54:23.815074 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6364 23:54:23.833656 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6365 23:54:23.905495 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6366 23:54:23.953198 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6367 23:54:23.976278 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6368 23:54:23.999866 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6369 23:54:24.058311 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6370 23:54:24.079062 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6371 23:54:24.100348 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6372 23:54:24.120045 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6373 23:54:24.139997 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6374 23:54:24.163278 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6375 23:54:24.181502 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6376 23:54:24.208618 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6377 23:54:24.231297 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6378 23:54:24.249389 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6379 23:54:24.271663 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6380 23:54:24.292928 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6381 23:54:24.308744 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6382 23:54:24.326048 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6383 23:54:24.360523 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6384 23:54:24.376660 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6385 23:54:24.397548 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6386 23:54:24.441864 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6387 23:54:24.453110 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6388 23:54:24.484375 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6389 23:54:24.573183 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6390 23:54:24.600163 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6391 23:54:24.622740 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6392 23:54:24.641527 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6393 23:54:24.768835 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6394 23:54:24.809231 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6395 23:54:24.835823 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6396 23:54:24.857477 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6397 23:54:24.879104 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6398 23:54:24.926772 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6399 23:54:24.952811 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6400 23:54:24.969125 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6401 23:54:24.989995 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6402 23:54:25.033068 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6403 23:54:25.087389 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6404 23:54:25.175514
6405 23:54:25.178019 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6406 23:54:25.178101
6407 23:54:25.181435 debian-bookworm-arm64 login: root (automatic login)
6408 23:54:25.181531
6409 23:54:25.440418 Linux debian-bookworm-arm64 6.1.91-cip21 #1 SMP PREEMPT Wed May 29 23:36:28 UTC 2024 aarch64
6410 23:54:25.440566
6411 23:54:25.447258 The programs included with the Debian GNU/Linux system are free software;
6412 23:54:25.453668 the exact distribution terms for each program are described in the
6413 23:54:25.457368 individual files in /usr/share/doc/*/copyright.
6414 23:54:25.457481
6415 23:54:25.463390 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6416 23:54:25.466806 permitted by applicable law.
6417 23:54:26.570037 Matched prompt #10: / #
6419 23:54:26.570311 Setting prompt string to ['/ #']
6420 23:54:26.570413 end: 2.2.5.1 login-action (duration 00:00:19) [common]
6422 23:54:26.570635 end: 2.2.5 auto-login-action (duration 00:00:19) [common]
6423 23:54:26.570724 start: 2.2.6 expect-shell-connection (timeout 00:03:49) [common]
6424 23:54:26.570798 Setting prompt string to ['/ #']
6425 23:54:26.570861 Forcing a shell prompt, looking for ['/ #']
6427 23:54:26.621061 / #
6428 23:54:26.621196 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6429 23:54:26.621285 Waiting using forced prompt support (timeout 00:02:30)
6430 23:54:26.626073
6431 23:54:26.626359 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6432 23:54:26.626458 start: 2.2.7 export-device-env (timeout 00:03:49) [common]
6434 23:54:26.726786 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14084357/extract-nfsrootfs-0a9r7_s_'
6435 23:54:26.732212 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14084357/extract-nfsrootfs-0a9r7_s_'
6437 23:54:26.832806 / # export NFS_SERVER_IP='192.168.201.1'
6438 23:54:26.837488 export NFS_SERVER_IP='192.168.201.1'
6439 23:54:26.837777 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6440 23:54:26.837878 end: 2.2 depthcharge-retry (duration 00:01:11) [common]
6441 23:54:26.837972 end: 2 depthcharge-action (duration 00:01:11) [common]
6442 23:54:26.838063 start: 3 lava-test-retry (timeout 00:08:09) [common]
6443 23:54:26.838148 start: 3.1 lava-test-shell (timeout 00:08:09) [common]
6444 23:54:26.838227 Using namespace: common
6446 23:54:26.938544 / # #
6447 23:54:26.938691 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6448 23:54:26.943038 #
6449 23:54:26.943307 Using /lava-14084357
6451 23:54:27.043647 / # export SHELL=/bin/bash
6452 23:54:27.048398 export SHELL=/bin/bash
6454 23:54:27.148939 / # . /lava-14084357/environment
6455 23:54:27.154026 . /lava-14084357/environment
6457 23:54:27.261708 / # /lava-14084357/bin/lava-test-runner /lava-14084357/0
6458 23:54:27.261885 Test shell timeout: 10s (minimum of the action and connection timeout)
6459 23:54:27.266483 /lava-14084357/bin/lava-test-runner /lava-14084357/0
6460 23:54:27.485539 + export TESTRUN_ID=0_timesync-off
6461 23:54:27.488746 + TESTRUN_ID=0_timesync-off
6462 23:54:27.492212 + cd /lava-14084357/0/tests/0_timesync-off
6463 23:54:27.495813 ++ cat uuid
6464 23:54:27.499015 + UUID=14084357_1.6.2.3.1
6465 23:54:27.499089 + set +x
6466 23:54:27.502280 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14084357_1.6.2.3.1>
6467 23:54:27.502533 Received signal: <STARTRUN> 0_timesync-off 14084357_1.6.2.3.1
6468 23:54:27.502605 Starting test lava.0_timesync-off (14084357_1.6.2.3.1)
6469 23:54:27.502690 Skipping test definition patterns.
6470 23:54:27.505775 + systemctl stop systemd-timesyncd
6471 23:54:27.576079 + set +x
6472 23:54:27.579602 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14084357_1.6.2.3.1>
6473 23:54:27.579863 Received signal: <ENDRUN> 0_timesync-off 14084357_1.6.2.3.1
6474 23:54:27.579949 Ending use of test pattern.
6475 23:54:27.580013 Ending test lava.0_timesync-off (14084357_1.6.2.3.1), duration 0.08
6477 23:54:27.635974 + export TESTRUN_ID=1_kselftest-arm64
6478 23:54:27.636081 + TESTRUN_ID=1_kselftest-arm64
6479 23:54:27.643199 + cd /lava-14084357/0/tests/1_kselftest-arm64
6480 23:54:27.643285 ++ cat uuid
6481 23:54:27.645843 + UUID=14084357_1.6.2.3.5
6482 23:54:27.645927 + set +x
6483 23:54:27.649292 <LAVA_SIGNAL_STARTRUN 1_kselftest-arm64 14084357_1.6.2.3.5>
6484 23:54:27.649550 Received signal: <STARTRUN> 1_kselftest-arm64 14084357_1.6.2.3.5
6485 23:54:27.649623 Starting test lava.1_kselftest-arm64 (14084357_1.6.2.3.5)
6486 23:54:27.649705 Skipping test definition patterns.
6487 23:54:27.652688 + cd ./automated/linux/kselftest/
6488 23:54:27.682400 + ./kselftest.sh -c arm64 -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.91-cip21-33-g9433716496158/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip-gitlab -e '' -p /opt/kselftests/mainline/ -n 1 -i 1
6489 23:54:27.705776 INFO: install_deps skipped
6490 23:54:28.198786 --2024-05-29 23:54:27-- http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.91-cip21-33-g9433716496158/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
6491 23:54:28.205418 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6492 23:54:28.334209 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6493 23:54:28.467865 HTTP request sent, awaiting response... 200 OK
6494 23:54:28.471229 Length: 1642292 (1.6M) [application/octet-stream]
6495 23:54:28.474166 Saving to: 'kselftest_armhf.tar.gz'
6496 23:54:28.474249
6497 23:54:28.474315
6498 23:54:28.734404 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6499 23:54:28.999610 kselftest_armhf.tar 2%[ ] 44.98K 169KB/s
6500 23:54:29.397243 kselftest_armhf.tar 13%[=> ] 214.67K 404KB/s
6501 23:54:29.535190 kselftest_armhf.tar 53%[=========> ] 855.24K 920KB/s
6502 23:54:29.541659 kselftest_armhf.tar 100%[===================>] 1.57M 1.47MB/s in 1.1s
6503 23:54:29.541748
6504 23:54:29.685184 2024-05-29 23:54:29 (1.47 MB/s) - 'kselftest_armhf.tar.gz' saved [1642292/1642292]
6505 23:54:29.685358
6506 23:54:33.595246 skiplist:
6507 23:54:33.598244 ========================================
6508 23:54:33.601810 ========================================
6509 23:54:33.644177 arm64:tags_test
6510 23:54:33.647634 arm64:run_tags_test.sh
6511 23:54:33.647722 arm64:fake_sigreturn_bad_magic
6512 23:54:33.651229 arm64:fake_sigreturn_bad_size
6513 23:54:33.654520 arm64:fake_sigreturn_bad_size_for_magic0
6514 23:54:33.657973 arm64:fake_sigreturn_duplicated_fpsimd
6515 23:54:33.660890 arm64:fake_sigreturn_misaligned_sp
6516 23:54:33.664132 arm64:fake_sigreturn_missing_fpsimd
6517 23:54:33.667715 arm64:fake_sigreturn_sme_change_vl
6518 23:54:33.670662 arm64:fake_sigreturn_sve_change_vl
6519 23:54:33.674112 arm64:mangle_pstate_invalid_compat_toggle
6520 23:54:33.677695 arm64:mangle_pstate_invalid_daif_bits
6521 23:54:33.680854 arm64:mangle_pstate_invalid_mode_el1h
6522 23:54:33.683961 arm64:mangle_pstate_invalid_mode_el1t
6523 23:54:33.687253 arm64:mangle_pstate_invalid_mode_el2h
6524 23:54:33.690569 arm64:mangle_pstate_invalid_mode_el2t
6525 23:54:33.693931 arm64:mangle_pstate_invalid_mode_el3h
6526 23:54:33.697471 arm64:mangle_pstate_invalid_mode_el3t
6527 23:54:33.700699 arm64:sme_trap_no_sm
6528 23:54:33.704060 arm64:sme_trap_non_streaming
6529 23:54:33.704145 arm64:sme_trap_za
6530 23:54:33.707497 arm64:sme_vl
6531 23:54:33.707581 arm64:ssve_regs
6532 23:54:33.710887 arm64:sve_regs
6533 23:54:33.710971 arm64:sve_vl
6534 23:54:33.711037 arm64:za_no_regs
6535 23:54:33.713773 arm64:za_regs
6536 23:54:33.713855 arm64:pac
6537 23:54:33.717410 arm64:fp-stress
6538 23:54:33.717505 arm64:sve-ptrace
6539 23:54:33.720696 arm64:sve-probe-vls
6540 23:54:33.720778 arm64:vec-syscfg
6541 23:54:33.720843 arm64:za-fork
6542 23:54:33.724057 arm64:za-ptrace
6543 23:54:33.724140 arm64:check_buffer_fill
6544 23:54:33.727317 arm64:check_child_memory
6545 23:54:33.730446 arm64:check_gcr_el1_cswitch
6546 23:54:33.733746 arm64:check_ksm_options
6547 23:54:33.733836 arm64:check_mmap_options
6548 23:54:33.737279 arm64:check_prctl
6549 23:54:33.740681 arm64:check_tags_inclusion
6550 23:54:33.740764 arm64:check_user_mem
6551 23:54:33.740829 arm64:btitest
6552 23:54:33.744005 arm64:nobtitest
6553 23:54:33.744113 arm64:hwcap
6554 23:54:33.747402 arm64:ptrace
6555 23:54:33.747493 arm64:syscall-abi
6556 23:54:33.750816 arm64:tpidr2
6557 23:54:33.754099 ============== Tests to run ===============
6558 23:54:33.754199 arm64:tags_test
6559 23:54:33.757143 arm64:run_tags_test.sh
6560 23:54:33.760510 arm64:fake_sigreturn_bad_magic
6561 23:54:33.760608 arm64:fake_sigreturn_bad_size
6562 23:54:33.766735 arm64:fake_sigreturn_bad_size_for_magic0
6563 23:54:33.770314 arm64:fake_sigreturn_duplicated_fpsimd
6564 23:54:33.773678 arm64:fake_sigreturn_misaligned_sp
6565 23:54:33.776620 arm64:fake_sigreturn_missing_fpsimd
6566 23:54:33.776694 arm64:fake_sigreturn_sme_change_vl
6567 23:54:33.780210 arm64:fake_sigreturn_sve_change_vl
6568 23:54:33.786708 arm64:mangle_pstate_invalid_compat_toggle
6569 23:54:33.790102 arm64:mangle_pstate_invalid_daif_bits
6570 23:54:33.793619 arm64:mangle_pstate_invalid_mode_el1h
6571 23:54:33.796943 arm64:mangle_pstate_invalid_mode_el1t
6572 23:54:33.800129 arm64:mangle_pstate_invalid_mode_el2h
6573 23:54:33.803525 arm64:mangle_pstate_invalid_mode_el2t
6574 23:54:33.806615 arm64:mangle_pstate_invalid_mode_el3h
6575 23:54:33.809875 arm64:mangle_pstate_invalid_mode_el3t
6576 23:54:33.809977 arm64:sme_trap_no_sm
6577 23:54:33.813684 arm64:sme_trap_non_streaming
6578 23:54:33.816757 arm64:sme_trap_za
6579 23:54:33.816834 arm64:sme_vl
6580 23:54:33.816896 arm64:ssve_regs
6581 23:54:33.820262 arm64:sve_regs
6582 23:54:33.820337 arm64:sve_vl
6583 23:54:33.823069 arm64:za_no_regs
6584 23:54:33.823139 arm64:za_regs
6585 23:54:33.823207 arm64:pac
6586 23:54:33.826860 arm64:fp-stress
6587 23:54:33.826938 arm64:sve-ptrace
6588 23:54:33.830284 arm64:sve-probe-vls
6589 23:54:33.830381 arm64:vec-syscfg
6590 23:54:33.833498 arm64:za-fork
6591 23:54:33.833576 arm64:za-ptrace
6592 23:54:33.836515 arm64:check_buffer_fill
6593 23:54:33.836615 arm64:check_child_memory
6594 23:54:33.840140 arm64:check_gcr_el1_cswitch
6595 23:54:33.843073 arm64:check_ksm_options
6596 23:54:33.843152 arm64:check_mmap_options
6597 23:54:33.846799 arm64:check_prctl
6598 23:54:33.849953 arm64:check_tags_inclusion
6599 23:54:33.850046 arm64:check_user_mem
6600 23:54:33.853124 arm64:btitest
6601 23:54:33.853220 arm64:nobtitest
6602 23:54:33.853331 arm64:hwcap
6603 23:54:33.856627 arm64:ptrace
6604 23:54:33.856723 arm64:syscall-abi
6605 23:54:33.860074 arm64:tpidr2
6606 23:54:33.863230 ===========End Tests to run ===============
6607 23:54:33.863334 shardfile-arm64 pass
6608 23:54:34.093353 <12>[ 26.201893] kselftest: Running tests in arm64
6609 23:54:34.104761 TAP version 13
6610 23:54:34.119615 1..48
6611 23:54:34.137563 # selftests: arm64: tags_test
6612 23:54:34.585220 ok 1 selftests: arm64: tags_test
6613 23:54:34.600835 # selftests: arm64: run_tags_test.sh
6614 23:54:34.658940 # --------------------
6615 23:54:34.662424 # running tags test
6616 23:54:34.662520 # --------------------
6617 23:54:34.665901 # [PASS]
6618 23:54:34.669149 ok 2 selftests: arm64: run_tags_test.sh
6619 23:54:34.681594 # selftests: arm64: fake_sigreturn_bad_magic
6620 23:54:34.756023 # Registered handlers for all signals.
6621 23:54:34.756214 # Detected MINSTKSIGSZ:4720
6622 23:54:34.759133 # Testcase initialized.
6623 23:54:34.762574 # uc context validated.
6624 23:54:34.765734 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6625 23:54:34.769523 # Handled SIG_COPYCTX
6626 23:54:34.769667 # Available space:3568
6627 23:54:34.775881 # Using badly built context - ERR: BAD MAGIC !
6628 23:54:34.782563 # SIG_OK -- SP:0xFFFFFB8DE440 si_addr@:0xfffffb8de440 si_code:2 token@:0xfffffb8dd1e0 offset:-4704
6629 23:54:34.785693 # ==>> completed. PASS(1)
6630 23:54:34.792561 # # FAKE_SIGRETURN_BAD_MAGIC :: Trigger a sigreturn with a sigframe with a bad magic
6631 23:54:34.799239 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFFB8DD1E0
6632 23:54:34.802602 ok 3 selftests: arm64: fake_sigreturn_bad_magic
6633 23:54:34.809057 # selftests: arm64: fake_sigreturn_bad_size
6634 23:54:34.838202 # Registered handlers for all signals.
6635 23:54:34.838340 # Detected MINSTKSIGSZ:4720
6636 23:54:34.841194 # Testcase initialized.
6637 23:54:34.844623 # uc context validated.
6638 23:54:34.848083 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6639 23:54:34.851365 # Handled SIG_COPYCTX
6640 23:54:34.851463 # Available space:3568
6641 23:54:34.854307 # uc context validated.
6642 23:54:34.861222 # Using badly built context - ERR: Bad size for esr_context
6643 23:54:34.867627 # SIG_OK -- SP:0xFFFFEF8C0040 si_addr@:0xffffef8c0040 si_code:2 token@:0xffffef8bede0 offset:-4704
6644 23:54:34.871290 # ==>> completed. PASS(1)
6645 23:54:34.877912 # # FAKE_SIGRETURN_BAD_SIZE :: Triggers a sigreturn with a overrun __reserved area
6646 23:54:34.884272 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFEF8BEDE0
6647 23:54:34.888040 ok 4 selftests: arm64: fake_sigreturn_bad_size
6648 23:54:34.894336 # selftests: arm64: fake_sigreturn_bad_size_for_magic0
6649 23:54:34.927119 # Registered handlers for all signals.
6650 23:54:34.927229 # Detected MINSTKSIGSZ:4720
6651 23:54:34.930425 # Testcase initialized.
6652 23:54:34.933902 # uc context validated.
6653 23:54:34.937066 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6654 23:54:34.940329 # Handled SIG_COPYCTX
6655 23:54:34.940425 # Available space:3568
6656 23:54:34.946899 # Using badly built context - ERR: Bad size for terminator
6657 23:54:34.956878 # SIG_OK -- SP:0xFFFFCD1EE870 si_addr@:0xffffcd1ee870 si_code:2 token@:0xffffcd1ed610 offset:-4704
6658 23:54:34.956963 # ==>> completed. PASS(1)
6659 23:54:34.967174 # # FAKE_SIGRETURN_BAD_SIZE_FOR_TERMINATOR :: Trigger a sigreturn using non-zero size terminator
6660 23:54:34.973251 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFCD1ED610
6661 23:54:34.976968 ok 5 selftests: arm64: fake_sigreturn_bad_size_for_magic0
6662 23:54:34.983498 # selftests: arm64: fake_sigreturn_duplicated_fpsimd
6663 23:54:35.020928 # Registered handlers for all signals.
6664 23:54:35.021367 # Detected MINSTKSIGSZ:4720
6665 23:54:35.023595 # Testcase initialized.
6666 23:54:35.027109 # uc context validated.
6667 23:54:35.030527 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6668 23:54:35.034283 # Handled SIG_COPYCTX
6669 23:54:35.034879 # Available space:3568
6670 23:54:35.040600 # Using badly built context - ERR: Multiple FPSIMD_MAGIC
6671 23:54:35.050899 # SIG_OK -- SP:0xFFFFC3FCECD0 si_addr@:0xffffc3fcecd0 si_code:2 token@:0xffffc3fcda70 offset:-4704
6672 23:54:35.051479 # ==>> completed. PASS(1)
6673 23:54:35.060451 # # FAKE_SIGRETURN_DUPLICATED_FPSIMD :: Triggers a sigreturn including two fpsimd_context
6674 23:54:35.067259 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFC3FCDA70
6675 23:54:35.071018 ok 6 selftests: arm64: fake_sigreturn_duplicated_fpsimd
6676 23:54:35.073907 # selftests: arm64: fake_sigreturn_misaligned_sp
6677 23:54:35.115108 # Registered handlers for all signals.
6678 23:54:35.115331 # Detected MINSTKSIGSZ:4720
6679 23:54:35.118592 # Testcase initialized.
6680 23:54:35.121510 # uc context validated.
6681 23:54:35.125023 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6682 23:54:35.128090 # Handled SIG_COPYCTX
6683 23:54:35.134467 # SIG_OK -- SP:0xFFFFDD9F2043 si_addr@:0xffffdd9f2043 si_code:2 token@:0xffffdd9f2043 offset:0
6684 23:54:35.137956 # ==>> completed. PASS(1)
6685 23:54:35.144750 # # FAKE_SIGRETURN_MISALIGNED_SP :: Triggers a sigreturn with a misaligned sigframe
6686 23:54:35.151842 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFDD9F2043
6687 23:54:35.158506 ok 7 selftests: arm64: fake_sigreturn_misaligned_sp
6688 23:54:35.161765 # selftests: arm64: fake_sigreturn_missing_fpsimd
6689 23:54:35.190292 # Registered handlers for all signals.
6690 23:54:35.190462 # Detected MINSTKSIGSZ:4720
6691 23:54:35.192740 # Testcase initialized.
6692 23:54:35.196473 # uc context validated.
6693 23:54:35.199659 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6694 23:54:35.202926 # Handled SIG_COPYCTX
6695 23:54:35.206505 # Mangling template header. Spare space:4096
6696 23:54:35.209673 # Using badly built context - ERR: Missing FPSIMD
6697 23:54:35.219784 # SIG_OK -- SP:0xFFFFE3DB1350 si_addr@:0xffffe3db1350 si_code:2 token@:0xffffe3db00f0 offset:-4704
6698 23:54:35.222899 # ==>> completed. PASS(1)
6699 23:54:35.229840 # # FAKE_SIGRETURN_MISSING_FPSIMD :: Triggers a sigreturn with a missing fpsimd_context
6700 23:54:35.236471 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE3DB00F0
6701 23:54:35.239253 ok 8 selftests: arm64: fake_sigreturn_missing_fpsimd
6702 23:54:35.245897 # selftests: arm64: fake_sigreturn_sme_change_vl
6703 23:54:35.295436 # Registered handlers for all signals.
6704 23:54:35.295878 # Detected MINSTKSIGSZ:4720
6705 23:54:35.298502 # ==>> completed. SKIP.
6706 23:54:35.305163 # # FAKE_SIGRETURN_SSVE_CHANGE :: Attempt to change Streaming SVE VL
6707 23:54:35.308527 ok 9 selftests: arm64: fake_sigreturn_sme_change_vl # SKIP
6708 23:54:35.319589 # selftests: arm64: fake_sigreturn_sve_change_vl
6709 23:54:35.400467 # Registered handlers for all signals.
6710 23:54:35.400932 # Detected MINSTKSIGSZ:4720
6711 23:54:35.404225 # ==>> completed. SKIP.
6712 23:54:35.410418 # # FAKE_SIGRETURN_SVE_CHANGE :: Attempt to change SVE VL
6713 23:54:35.413943 ok 10 selftests: arm64: fake_sigreturn_sve_change_vl # SKIP
6714 23:54:35.422881 # selftests: arm64: mangle_pstate_invalid_compat_toggle
6715 23:54:35.500549 # Registered handlers for all signals.
6716 23:54:35.501144 # Detected MINSTKSIGSZ:4720
6717 23:54:35.503929 # Testcase initialized.
6718 23:54:35.507378 # uc context validated.
6719 23:54:35.507830 # Handled SIG_TRIG
6720 23:54:35.517708 # SIG_OK -- SP:0xFFFFFCD45FA0 si_addr@:0xfffffcd45fa0 si_code:2 token@:(nil) offset:-281474923519904
6721 23:54:35.520574 # ==>> completed. PASS(1)
6722 23:54:35.527286 # # MANGLE_PSTATE_INVALID_STATE_TOGGLE :: Mangling uc_mcontext with INVALID STATE_TOGGLE
6723 23:54:35.533915 ok 11 selftests: arm64: mangle_pstate_invalid_compat_toggle
6724 23:54:35.536866 # selftests: arm64: mangle_pstate_invalid_daif_bits
6725 23:54:35.604977 # Registered handlers for all signals.
6726 23:54:35.605557 # Detected MINSTKSIGSZ:4720
6727 23:54:35.608139 # Testcase initialized.
6728 23:54:35.611691 # uc context validated.
6729 23:54:35.612302 # Handled SIG_TRIG
6730 23:54:35.621748 # SIG_OK -- SP:0xFFFFC9A92870 si_addr@:0xffffc9a92870 si_code:2 token@:(nil) offset:-281474065049712
6731 23:54:35.624735 # ==>> completed. PASS(1)
6732 23:54:35.631470 # # MANGLE_PSTATE_INVALID_DAIF_BITS :: Mangling uc_mcontext with INVALID DAIF_BITS
6733 23:54:35.635352 ok 12 selftests: arm64: mangle_pstate_invalid_daif_bits
6734 23:54:35.641668 # selftests: arm64: mangle_pstate_invalid_mode_el1h
6735 23:54:35.700640 # Registered handlers for all signals.
6736 23:54:35.701376 # Detected MINSTKSIGSZ:4720
6737 23:54:35.704017 # Testcase initialized.
6738 23:54:35.707090 # uc context validated.
6739 23:54:35.707511 # Handled SIG_TRIG
6740 23:54:35.717539 # SIG_OK -- SP:0xFFFFDCF18700 si_addr@:0xffffdcf18700 si_code:2 token@:(nil) offset:-281474388559616
6741 23:54:35.720460 # ==>> completed. PASS(1)
6742 23:54:35.727322 # # MANGLE_PSTATE_INVALID_MODE_EL1h :: Mangling uc_mcontext INVALID MODE EL1h
6743 23:54:35.730361 ok 13 selftests: arm64: mangle_pstate_invalid_mode_el1h
6744 23:54:35.737100 # selftests: arm64: mangle_pstate_invalid_mode_el1t
6745 23:54:35.800592 # Registered handlers for all signals.
6746 23:54:35.801142 # Detected MINSTKSIGSZ:4720
6747 23:54:35.803984 # Testcase initialized.
6748 23:54:35.807211 # uc context validated.
6749 23:54:35.807672 # Handled SIG_TRIG
6750 23:54:35.817149 # SIG_OK -- SP:0xFFFFC7E77860 si_addr@:0xffffc7e77860 si_code:2 token@:(nil) offset:-281474035578976
6751 23:54:35.820394 # ==>> completed. PASS(1)
6752 23:54:35.827037 # # MANGLE_PSTATE_INVALID_MODE_EL1t :: Mangling uc_mcontext INVALID MODE EL1t
6753 23:54:35.830703 ok 14 selftests: arm64: mangle_pstate_invalid_mode_el1t
6754 23:54:35.837405 # selftests: arm64: mangle_pstate_invalid_mode_el2h
6755 23:54:35.904640 # Registered handlers for all signals.
6756 23:54:35.905099 # Detected MINSTKSIGSZ:4720
6757 23:54:35.908187 # Testcase initialized.
6758 23:54:35.911360 # uc context validated.
6759 23:54:35.911783 # Handled SIG_TRIG
6760 23:54:35.921299 # SIG_OK -- SP:0xFFFFDA245210 si_addr@:0xffffda245210 si_code:2 token@:(nil) offset:-281474341556752
6761 23:54:35.924423 # ==>> completed. PASS(1)
6762 23:54:35.931077 # # MANGLE_PSTATE_INVALID_MODE_EL2h :: Mangling uc_mcontext INVALID MODE EL2h
6763 23:54:35.934115 ok 15 selftests: arm64: mangle_pstate_invalid_mode_el2h
6764 23:54:35.940857 # selftests: arm64: mangle_pstate_invalid_mode_el2t
6765 23:54:36.004652 # Registered handlers for all signals.
6766 23:54:36.004812 # Detected MINSTKSIGSZ:4720
6767 23:54:36.008049 # Testcase initialized.
6768 23:54:36.011663 # uc context validated.
6769 23:54:36.011768 # Handled SIG_TRIG
6770 23:54:36.021254 # SIG_OK -- SP:0xFFFFE6D1F4D0 si_addr@:0xffffe6d1f4d0 si_code:2 token@:(nil) offset:-281474554262736
6771 23:54:36.024541 # ==>> completed. PASS(1)
6772 23:54:36.030997 # # MANGLE_PSTATE_INVALID_MODE_EL2t :: Mangling uc_mcontext INVALID MODE EL2t
6773 23:54:36.034365 ok 16 selftests: arm64: mangle_pstate_invalid_mode_el2t
6774 23:54:36.041070 # selftests: arm64: mangle_pstate_invalid_mode_el3h
6775 23:54:36.093262 # Registered handlers for all signals.
6776 23:54:36.093408 # Detected MINSTKSIGSZ:4720
6777 23:54:36.096329 # Testcase initialized.
6778 23:54:36.099754 # uc context validated.
6779 23:54:36.099854 # Handled SIG_TRIG
6780 23:54:36.109994 # SIG_OK -- SP:0xFFFFF461EA10 si_addr@:0xfffff461ea10 si_code:2 token@:(nil) offset:-281474781800976
6781 23:54:36.113099 # ==>> completed. PASS(1)
6782 23:54:36.119796 # # MANGLE_PSTATE_INVALID_MODE_EL3h :: Mangling uc_mcontext INVALID MODE EL3h
6783 23:54:36.122983 ok 17 selftests: arm64: mangle_pstate_invalid_mode_el3h
6784 23:54:36.129841 # selftests: arm64: mangle_pstate_invalid_mode_el3t
6785 23:54:36.183753 # Registered handlers for all signals.
6786 23:54:36.183883 # Detected MINSTKSIGSZ:4720
6787 23:54:36.187028 # Testcase initialized.
6788 23:54:36.190539 # uc context validated.
6789 23:54:36.190613 # Handled SIG_TRIG
6790 23:54:36.200401 # SIG_OK -- SP:0xFFFFDA65DC70 si_addr@:0xffffda65dc70 si_code:2 token@:(nil) offset:-281474345852016
6791 23:54:36.203554 # ==>> completed. PASS(1)
6792 23:54:36.210182 # # MANGLE_PSTATE_INVALID_MODE_EL3t :: Mangling uc_mcontext INVALID MODE EL3t
6793 23:54:36.213539 ok 18 selftests: arm64: mangle_pstate_invalid_mode_el3t
6794 23:54:36.217039 # selftests: arm64: sme_trap_no_sm
6795 23:54:36.263397 # Registered handlers for all signals.
6796 23:54:36.263536 # Detected MINSTKSIGSZ:4720
6797 23:54:36.266726 # ==>> completed. SKIP.
6798 23:54:36.277113 # # SME trap without SM :: Check that we get a SIGILL if we use streaming mode without enabling it
6799 23:54:36.280390 ok 19 selftests: arm64: sme_trap_no_sm # SKIP
6800 23:54:36.287616 # selftests: arm64: sme_trap_non_streaming
6801 23:54:36.356905 # Registered handlers for all signals.
6802 23:54:36.357049 # Detected MINSTKSIGSZ:4720
6803 23:54:36.359946 # ==>> completed. SKIP.
6804 23:54:36.370141 # # SME SM trap unsupported instruction :: Check that we get a SIGILL if we use an unsupported instruction in streaming mode
6805 23:54:36.376935 ok 20 selftests: arm64: sme_trap_non_streaming # SKIP
6806 23:54:36.379637 # selftests: arm64: sme_trap_za
6807 23:54:36.439684 # Registered handlers for all signals.
6808 23:54:36.439832 # Detected MINSTKSIGSZ:4720
6809 23:54:36.443337 # Testcase initialized.
6810 23:54:36.452845 # SIG_OK -- SP:0xFFFFF111C520 si_addr@:0xaaaaad242510 si_code:1 token@:(nil) offset:-187650025989392
6811 23:54:36.452976 # ==>> completed. PASS(1)
6812 23:54:36.462592 # # SME ZA trap :: Check that we get a SIGILL if we access ZA without enabling
6813 23:54:36.465996 ok 21 selftests: arm64: sme_trap_za
6814 23:54:36.466113 # selftests: arm64: sme_vl
6815 23:54:36.523642 # Registered handlers for all signals.
6816 23:54:36.523782 # Detected MINSTKSIGSZ:4720
6817 23:54:36.526824 # ==>> completed. SKIP.
6818 23:54:36.533937 # # SME VL :: Check that we get the right SME VL reported
6819 23:54:36.536966 ok 22 selftests: arm64: sme_vl # SKIP
6820 23:54:36.541052 # selftests: arm64: ssve_regs
6821 23:54:36.621306 # Registered handlers for all signals.
6822 23:54:36.621455 # Detected MINSTKSIGSZ:4720
6823 23:54:36.624885 # ==>> completed. SKIP.
6824 23:54:36.631609 # # Streaming SVE registers :: Check that we get the right Streaming SVE registers reported
6825 23:54:36.635166 ok 23 selftests: arm64: ssve_regs # SKIP
6826 23:54:36.638447 # selftests: arm64: sve_regs
6827 23:54:36.696879 # Registered handlers for all signals.
6828 23:54:36.697030 # Detected MINSTKSIGSZ:4720
6829 23:54:36.700478 # ==>> completed. SKIP.
6830 23:54:36.706946 # # SVE registers :: Check that we get the right SVE registers reported
6831 23:54:36.710021 ok 24 selftests: arm64: sve_regs # SKIP
6832 23:54:36.714615 # selftests: arm64: sve_vl
6833 23:54:36.796223 # Registered handlers for all signals.
6834 23:54:36.796369 # Detected MINSTKSIGSZ:4720
6835 23:54:36.799681 # ==>> completed. SKIP.
6836 23:54:36.806195 # # SVE VL :: Check that we get the right SVE VL reported
6837 23:54:36.809414 ok 25 selftests: arm64: sve_vl # SKIP
6838 23:54:36.814553 # selftests: arm64: za_no_regs
6839 23:54:36.880043 # Registered handlers for all signals.
6840 23:54:36.880187 # Detected MINSTKSIGSZ:4720
6841 23:54:36.883386 # ==>> completed. SKIP.
6842 23:54:36.889886 # # ZA registers - ZA disabled :: Check ZA context with ZA disabled
6843 23:54:36.893466 ok 26 selftests: arm64: za_no_regs # SKIP
6844 23:54:36.896495 # selftests: arm64: za_regs
6845 23:54:36.960040 # Registered handlers for all signals.
6846 23:54:36.960189 # Detected MINSTKSIGSZ:4720
6847 23:54:36.962857 # ==>> completed. SKIP.
6848 23:54:36.969712 # # ZA register :: Check that we get the right ZA registers reported
6849 23:54:36.972618 ok 27 selftests: arm64: za_regs # SKIP
6850 23:54:36.978451 # selftests: arm64: pac
6851 23:54:37.050892 # TAP version 13
6852 23:54:37.051042 # 1..7
6853 23:54:37.054575 # # Starting 7 tests from 1 test cases.
6854 23:54:37.057236 # # RUN global.corrupt_pac ...
6855 23:54:37.060900 # # SKIP PAUTH not enabled
6856 23:54:37.063850 # # OK global.corrupt_pac
6857 23:54:37.067355 # ok 1 # SKIP PAUTH not enabled
6858 23:54:37.073955 # # RUN global.pac_instructions_not_nop ...
6859 23:54:37.077173 # # SKIP PAUTH not enabled
6860 23:54:37.080611 # # OK global.pac_instructions_not_nop
6861 23:54:37.083610 # ok 2 # SKIP PAUTH not enabled
6862 23:54:37.090661 # # RUN global.pac_instructions_not_nop_generic ...
6863 23:54:37.093973 # # SKIP Generic PAUTH not enabled
6864 23:54:37.097277 # # OK global.pac_instructions_not_nop_generic
6865 23:54:37.100471 # ok 3 # SKIP Generic PAUTH not enabled
6866 23:54:37.107096 # # RUN global.single_thread_different_keys ...
6867 23:54:37.110511 # # SKIP PAUTH not enabled
6868 23:54:37.117027 # # OK global.single_thread_different_keys
6869 23:54:37.117175 # ok 4 # SKIP PAUTH not enabled
6870 23:54:37.123330 # # RUN global.exec_changed_keys ...
6871 23:54:37.127116 # # SKIP PAUTH not enabled
6872 23:54:37.130027 # # OK global.exec_changed_keys
6873 23:54:37.133756 # ok 5 # SKIP PAUTH not enabled
6874 23:54:37.136697 # # RUN global.context_switch_keep_keys ...
6875 23:54:37.140051 # # SKIP PAUTH not enabled
6876 23:54:37.146931 # # OK global.context_switch_keep_keys
6877 23:54:37.147045 # ok 6 # SKIP PAUTH not enabled
6878 23:54:37.153441 # # RUN global.context_switch_keep_keys_generic ...
6879 23:54:37.156724 # # SKIP Generic PAUTH not enabled
6880 23:54:37.163166 # # OK global.context_switch_keep_keys_generic
6881 23:54:37.166754 # ok 7 # SKIP Generic PAUTH not enabled
6882 23:54:37.170009 # # PASSED: 7 / 7 tests passed.
6883 23:54:37.173585 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:7 error:0
6884 23:54:37.176727 ok 28 selftests: arm64: pac
6885 23:54:37.179618 # selftests: arm64: fp-stress
6886 23:54:45.879516 <6>[ 37.991219] vaux18: disabling
6887 23:54:45.882919 <6>[ 37.994919] vio28: disabling
6888 23:54:47.127209 # TAP version 13
6889 23:54:47.127365 # 1..16
6890 23:54:47.130549 # # 8 CPUs, 0 SVE VLs, 0 SME VLs
6891 23:54:47.133496 # # Will run for 10s
6892 23:54:47.133581 # # Started FPSIMD-0-0
6893 23:54:47.136797 # # Started FPSIMD-0-1
6894 23:54:47.140197 # # Started FPSIMD-1-0
6895 23:54:47.140283 # # Started FPSIMD-1-1
6896 23:54:47.143647 # # Started FPSIMD-2-0
6897 23:54:47.143730 # # Started FPSIMD-2-1
6898 23:54:47.146675 # # Started FPSIMD-3-0
6899 23:54:47.150102 # # Started FPSIMD-3-1
6900 23:54:47.150186 # # Started FPSIMD-4-0
6901 23:54:47.153227 # # Started FPSIMD-4-1
6902 23:54:47.156977 # # Started FPSIMD-5-0
6903 23:54:47.157098 # # Started FPSIMD-5-1
6904 23:54:47.160107 # # Started FPSIMD-6-0
6905 23:54:47.160241 # # Started FPSIMD-6-1
6906 23:54:47.163288 # # Started FPSIMD-7-0
6907 23:54:47.167135 # # Started FPSIMD-7-1
6908 23:54:47.170105 # # FPSIMD-0-1: Vector length: 128 bits
6909 23:54:47.170205 # # FPSIMD-0-1: PID: 1187
6910 23:54:47.176885 # # FPSIMD-0-0: Vector length: 128 bits
6911 23:54:47.176977 # # FPSIMD-0-0: PID: 1186
6912 23:54:47.180375 # # FPSIMD-1-0: Vector length: 128 bits
6913 23:54:47.183525 # # FPSIMD-1-0: PID: 1188
6914 23:54:47.186735 # # FPSIMD-2-1: Vector length: 128 bits
6915 23:54:47.190080 # # FPSIMD-2-1: PID: 1191
6916 23:54:47.193612 # # FPSIMD-2-0: Vector length: 128 bits
6917 23:54:47.196875 # # FPSIMD-1-1: Vector length: 128 bits
6918 23:54:47.200191 # # FPSIMD-1-1: PID: 1189
6919 23:54:47.200265 # # FPSIMD-2-0: PID: 1190
6920 23:54:47.203560 # # FPSIMD-7-1: Vector length: 128 bits
6921 23:54:47.206775 # # FPSIMD-7-1: PID: 1201
6922 23:54:47.210171 # # FPSIMD-4-0: Vector length: 128 bits
6923 23:54:47.214100 # # FPSIMD-4-0: PID: 1194
6924 23:54:47.216645 # # FPSIMD-3-0: Vector length: 128 bits
6925 23:54:47.220096 # # FPSIMD-3-0: PID: 1192
6926 23:54:47.223764 # # FPSIMD-5-1: Vector length: 128 bits
6927 23:54:47.223842 # # FPSIMD-5-1: PID: 1197
6928 23:54:47.230295 # # FPSIMD-5-0: Vector length: 128 bits
6929 23:54:47.230388 # # FPSIMD-5-0: PID: 1196
6930 23:54:47.233668 # # FPSIMD-7-0: Vector length: 128 bits
6931 23:54:47.236912 # # FPSIMD-7-0: PID: 1200
6932 23:54:47.240357 # # FPSIMD-4-1: Vector length: 128 bits
6933 23:54:47.243525 # # FPSIMD-4-1: PID: 1195
6934 23:54:47.246994 # # FPSIMD-6-1: Vector length: 128 bits
6935 23:54:47.250272 # # FPSIMD-6-1: PID: 1199
6936 23:54:47.253317 # # FPSIMD-6-0: Vector length: 128 bits
6937 23:54:47.253429 # # FPSIMD-6-0: PID: 1198
6938 23:54:47.256951 # # FPSIMD-3-1: Vector length: 128 bits
6939 23:54:47.259986 # # FPSIMD-3-1: PID: 1193
6940 23:54:47.263458 # # Finishing up...
6941 23:54:47.269981 # # FPSIMD-0-0: Terminated by signal 15, no error, iterations=706402, signals=10
6942 23:54:47.276549 # # FPSIMD-1-0: Terminated by signal 15, no error, iterations=1004628, signals=10
6943 23:54:47.283431 # # FPSIMD-2-1: Terminated by signal 15, no error, iterations=904340, signals=10
6944 23:54:47.289942 # # FPSIMD-4-0: Terminated by signal 15, no error, iterations=830065, signals=10
6945 23:54:47.296403 # # FPSIMD-5-1: Terminated by signal 15, no error, iterations=820918, signals=10
6946 23:54:47.306450 # # FPSIMD-5-0: Terminated by signal 15, no error, iterations=761443, signals=10
6947 23:54:47.313330 # # FPSIMD-2-0: Terminated by signal 15, no error, iterations=785081, signals=9
6948 23:54:47.313424 # ok 1 FPSIMD-0-0
6949 23:54:47.316931 # ok 2 FPSIMD-0-1
6950 23:54:47.317005 # ok 3 FPSIMD-1-0
6951 23:54:47.320259 # ok 4 FPSIMD-1-1
6952 23:54:47.320328 # ok 5 FPSIMD-2-0
6953 23:54:47.323027 # ok 6 FPSIMD-2-1
6954 23:54:47.323107 # ok 7 FPSIMD-3-0
6955 23:54:47.326659 # ok 8 FPSIMD-3-1
6956 23:54:47.326734 # ok 9 FPSIMD-4-0
6957 23:54:47.329705 # ok 10 FPSIMD-4-1
6958 23:54:47.329805 # ok 11 FPSIMD-5-0
6959 23:54:47.332994 # ok 12 FPSIMD-5-1
6960 23:54:47.333108 # ok 13 FPSIMD-6-0
6961 23:54:47.336028 # ok 14 FPSIMD-6-1
6962 23:54:47.339348 # ok 15 FPSIMD-7-0
6963 23:54:47.339433 # ok 16 FPSIMD-7-1
6964 23:54:47.345937 # # FPSIMD-6-0: Terminated by signal 15, no error, iterations=782009, signals=9
6965 23:54:47.352744 # # FPSIMD-1-1: Terminated by signal 15, no error, iterations=758488, signals=10
6966 23:54:47.359357 # # FPSIMD-3-1: Terminated by signal 15, no error, iterations=732330, signals=10
6967 23:54:47.369104 # # FPSIMD-7-0: Terminated by signal 15, no error, iterations=717475, signals=10
6968 23:54:47.375889 # # FPSIMD-3-0: Terminated by signal 15, no error, iterations=861829, signals=10
6969 23:54:47.382291 # # FPSIMD-6-1: Terminated by signal 15, no error, iterations=715517, signals=10
6970 23:54:47.389036 # # FPSIMD-7-1: Terminated by signal 15, no error, iterations=718667, signals=10
6971 23:54:47.395732 # # FPSIMD-0-1: Terminated by signal 15, no error, iterations=1037300, signals=9
6972 23:54:47.402788 # # FPSIMD-4-1: Terminated by signal 15, no error, iterations=693059, signals=10
6973 23:54:47.409133 # # Totals: pass:16 fail:0 xfail:0 xpass:0 skip:0 error:0
6974 23:54:47.412259 ok 29 selftests: arm64: fp-stress
6975 23:54:47.415317 # selftests: arm64: sve-ptrace
6976 23:54:47.415447 # TAP version 13
6977 23:54:47.419514 # 1..4104
6978 23:54:47.419606 # ok 2 # SKIP SVE not available
6979 23:54:47.425450 # # Planned tests != run tests (4104 != 1)
6980 23:54:47.429165 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0
6981 23:54:47.432248 ok 30 selftests: arm64: sve-ptrace # SKIP
6982 23:54:47.435237 # selftests: arm64: sve-probe-vls
6983 23:54:47.438586 # TAP version 13
6984 23:54:47.438676 # 1..2
6985 23:54:47.441708 # ok 2 # SKIP SVE not available
6986 23:54:47.445062 # # Planned tests != run tests (2 != 1)
6987 23:54:47.448705 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0
6988 23:54:47.454914 ok 31 selftests: arm64: sve-probe-vls # SKIP
6989 23:54:47.455001 # selftests: arm64: vec-syscfg
6990 23:54:47.458783 # TAP version 13
6991 23:54:47.458892 # 1..20
6992 23:54:47.461698 # ok 1 # SKIP SVE not supported
6993 23:54:47.465291 # ok 2 # SKIP SVE not supported
6994 23:54:47.468503 # ok 3 # SKIP SVE not supported
6995 23:54:47.471706 # ok 4 # SKIP SVE not supported
6996 23:54:47.471783 # ok 5 # SKIP SVE not supported
6997 23:54:47.475004 # ok 6 # SKIP SVE not supported
6998 23:54:47.478256 # ok 7 # SKIP SVE not supported
6999 23:54:47.481476 # ok 8 # SKIP SVE not supported
7000 23:54:47.485119 # ok 9 # SKIP SVE not supported
7001 23:54:47.488659 # ok 10 # SKIP SVE not supported
7002 23:54:47.491769 # ok 11 # SKIP SME not supported
7003 23:54:47.495176 # ok 12 # SKIP SME not supported
7004 23:54:47.495253 # ok 13 # SKIP SME not supported
7005 23:54:47.498729 # ok 14 # SKIP SME not supported
7006 23:54:47.501787 # ok 15 # SKIP SME not supported
7007 23:54:47.504588 # ok 16 # SKIP SME not supported
7008 23:54:47.507898 # ok 17 # SKIP SME not supported
7009 23:54:47.511283 # ok 18 # SKIP SME not supported
7010 23:54:47.514584 # ok 19 # SKIP SME not supported
7011 23:54:47.518189 # ok 20 # SKIP SME not supported
7012 23:54:47.521425 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:20 error:0
7013 23:54:47.525060 ok 32 selftests: arm64: vec-syscfg
7014 23:54:47.528093 # selftests: arm64: za-fork
7015 23:54:47.528170 # TAP version 13
7016 23:54:47.531106 # 1..1
7017 23:54:47.531179 # # PID: 1278
7018 23:54:47.534578 # # SME support not present
7019 23:54:47.534649 # ok 0 skipped
7020 23:54:47.541023 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0
7021 23:54:47.544801 ok 33 selftests: arm64: za-fork
7022 23:54:47.544879 # selftests: arm64: za-ptrace
7023 23:54:47.594767 # TAP version 13
7024 23:54:47.594920 # 1..1
7025 23:54:47.598003 # ok 2 # SKIP SME not available
7026 23:54:47.604604 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0
7027 23:54:47.607830 ok 34 selftests: arm64: za-ptrace # SKIP
7028 23:54:47.618625 # selftests: arm64: check_buffer_fill
7029 23:54:47.685760 # # SKIP: MTE features unavailable
7030 23:54:47.695079 ok 35 selftests: arm64: check_buffer_fill # SKIP
7031 23:54:47.711189 # selftests: arm64: check_child_memory
7032 23:54:47.752310 # # SKIP: MTE features unavailable
7033 23:54:47.759722 ok 36 selftests: arm64: check_child_memory # SKIP
7034 23:54:47.775165 # selftests: arm64: check_gcr_el1_cswitch
7035 23:54:47.841112 # # SKIP: MTE features unavailable
7036 23:54:47.850850 ok 37 selftests: arm64: check_gcr_el1_cswitch # SKIP
7037 23:54:47.867542 # selftests: arm64: check_ksm_options
7038 23:54:47.941740 # # SKIP: MTE features unavailable
7039 23:54:47.950425 ok 38 selftests: arm64: check_ksm_options # SKIP
7040 23:54:47.967455 # selftests: arm64: check_mmap_options
7041 23:54:48.024238 # # SKIP: MTE features unavailable
7042 23:54:48.031780 ok 39 selftests: arm64: check_mmap_options # SKIP
7043 23:54:48.042916 # selftests: arm64: check_prctl
7044 23:54:48.120687 # TAP version 13
7045 23:54:48.120873 # 1..5
7046 23:54:48.123612 # ok 1 check_basic_read
7047 23:54:48.123697 # ok 2 NONE
7048 23:54:48.127069 # ok 3 # SKIP SYNC
7049 23:54:48.127153 # ok 4 # SKIP ASYNC
7050 23:54:48.130813 # ok 5 # SKIP SYNC+ASYNC
7051 23:54:48.133833 # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:3 error:0
7052 23:54:48.137137 ok 40 selftests: arm64: check_prctl
7053 23:54:48.147296 # selftests: arm64: check_tags_inclusion
7054 23:54:48.223755 # # SKIP: MTE features unavailable
7055 23:54:48.233047 ok 41 selftests: arm64: check_tags_inclusion # SKIP
7056 23:54:48.243463 # selftests: arm64: check_user_mem
7057 23:54:48.321815 # # SKIP: MTE features unavailable
7058 23:54:48.330753 ok 42 selftests: arm64: check_user_mem # SKIP
7059 23:54:48.343396 # selftests: arm64: btitest
7060 23:54:48.418782 # TAP version 13
7061 23:54:48.418933 # 1..18
7062 23:54:48.422135 # # HWCAP_PACA not present
7063 23:54:48.425052 # # HWCAP2_BTI not present
7064 23:54:48.428349 # # Test binary built for BTI
7065 23:54:48.431917 # ok 1 nohint_func/call_using_br_x0 # SKIP
7066 23:54:48.435131 # ok 1 nohint_func/call_using_br_x16 # SKIP
7067 23:54:48.438953 # ok 1 nohint_func/call_using_blr # SKIP
7068 23:54:48.442041 # ok 1 bti_none_func/call_using_br_x0 # SKIP
7069 23:54:48.444983 # ok 1 bti_none_func/call_using_br_x16 # SKIP
7070 23:54:48.451828 # ok 1 bti_none_func/call_using_blr # SKIP
7071 23:54:48.455082 # ok 1 bti_c_func/call_using_br_x0 # SKIP
7072 23:54:48.458746 # ok 1 bti_c_func/call_using_br_x16 # SKIP
7073 23:54:48.461567 # ok 1 bti_c_func/call_using_blr # SKIP
7074 23:54:48.464948 # ok 1 bti_j_func/call_using_br_x0 # SKIP
7075 23:54:48.468441 # ok 1 bti_j_func/call_using_br_x16 # SKIP
7076 23:54:48.471945 # ok 1 bti_j_func/call_using_blr # SKIP
7077 23:54:48.474868 # ok 1 bti_jc_func/call_using_br_x0 # SKIP
7078 23:54:48.481754 # ok 1 bti_jc_func/call_using_br_x16 # SKIP
7079 23:54:48.484921 # ok 1 bti_jc_func/call_using_blr # SKIP
7080 23:54:48.487922 # ok 1 paciasp_func/call_using_br_x0 # SKIP
7081 23:54:48.491560 # ok 1 paciasp_func/call_using_br_x16 # SKIP
7082 23:54:48.494882 # ok 1 paciasp_func/call_using_blr # SKIP
7083 23:54:48.501602 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:18 error:0
7084 23:54:48.504888 # # WARNING - EXPECTED TEST COUNT WRONG
7085 23:54:48.507911 ok 43 selftests: arm64: btitest
7086 23:54:48.511480 # selftests: arm64: nobtitest
7087 23:54:48.522010 # TAP version 13
7088 23:54:48.522096 # 1..18
7089 23:54:48.525214 # # HWCAP_PACA not present
7090 23:54:48.528608 # # HWCAP2_BTI not present
7091 23:54:48.531812 # # Test binary not built for BTI
7092 23:54:48.534909 # ok 1 nohint_func/call_using_br_x0 # SKIP
7093 23:54:48.538551 # ok 1 nohint_func/call_using_br_x16 # SKIP
7094 23:54:48.542235 # ok 1 nohint_func/call_using_blr # SKIP
7095 23:54:48.545008 # ok 1 bti_none_func/call_using_br_x0 # SKIP
7096 23:54:48.548400 # ok 1 bti_none_func/call_using_br_x16 # SKIP
7097 23:54:48.555445 # ok 1 bti_none_func/call_using_blr # SKIP
7098 23:54:48.558351 # ok 1 bti_c_func/call_using_br_x0 # SKIP
7099 23:54:48.561658 # ok 1 bti_c_func/call_using_br_x16 # SKIP
7100 23:54:48.564722 # ok 1 bti_c_func/call_using_blr # SKIP
7101 23:54:48.568303 # ok 1 bti_j_func/call_using_br_x0 # SKIP
7102 23:54:48.571682 # ok 1 bti_j_func/call_using_br_x16 # SKIP
7103 23:54:48.574669 # ok 1 bti_j_func/call_using_blr # SKIP
7104 23:54:48.578150 # ok 1 bti_jc_func/call_using_br_x0 # SKIP
7105 23:54:48.584718 # ok 1 bti_jc_func/call_using_br_x16 # SKIP
7106 23:54:48.588308 # ok 1 bti_jc_func/call_using_blr # SKIP
7107 23:54:48.591365 # ok 1 paciasp_func/call_using_br_x0 # SKIP
7108 23:54:48.594557 # ok 1 paciasp_func/call_using_br_x16 # SKIP
7109 23:54:48.598012 # ok 1 paciasp_func/call_using_blr # SKIP
7110 23:54:48.604702 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:18 error:0
7111 23:54:48.607995 # # WARNING - EXPECTED TEST COUNT WRONG
7112 23:54:48.611298 ok 44 selftests: arm64: nobtitest
7113 23:54:48.614907 # selftests: arm64: hwcap
7114 23:54:48.614989 # TAP version 13
7115 23:54:48.615097 # 1..28
7116 23:54:48.618171 # ok 1 cpuinfo_match_RNG
7117 23:54:48.621239 # # SIGILL reported for RNG
7118 23:54:48.621358 # ok 2 # SKIP sigill_RNG
7119 23:54:48.624613 # ok 3 cpuinfo_match_SME
7120 23:54:48.627916 # ok 4 sigill_SME
7121 23:54:48.628002 # ok 5 cpuinfo_match_SVE
7122 23:54:48.631746 # ok 6 sigill_SVE
7123 23:54:48.631830 # ok 7 cpuinfo_match_SVE 2
7124 23:54:48.634845 # # SIGILL reported for SVE 2
7125 23:54:48.638078 # ok 8 # SKIP sigill_SVE 2
7126 23:54:48.641241 # ok 9 cpuinfo_match_SVE AES
7127 23:54:48.644684 # # SIGILL reported for SVE AES
7128 23:54:48.644776 # ok 10 # SKIP sigill_SVE AES
7129 23:54:48.647987 # ok 11 cpuinfo_match_SVE2 PMULL
7130 23:54:48.651636 # # SIGILL reported for SVE2 PMULL
7131 23:54:48.654648 # ok 12 # SKIP sigill_SVE2 PMULL
7132 23:54:48.657782 # ok 13 cpuinfo_match_SVE2 BITPERM
7133 23:54:48.661181 # # SIGILL reported for SVE2 BITPERM
7134 23:54:48.664630 # ok 14 # SKIP sigill_SVE2 BITPERM
7135 23:54:48.667782 # ok 15 cpuinfo_match_SVE2 SHA3
7136 23:54:48.671166 # # SIGILL reported for SVE2 SHA3
7137 23:54:48.674968 # ok 16 # SKIP sigill_SVE2 SHA3
7138 23:54:48.678461 # ok 17 cpuinfo_match_SVE2 SM4
7139 23:54:48.678564 # # SIGILL reported for SVE2 SM4
7140 23:54:48.681118 # ok 18 # SKIP sigill_SVE2 SM4
7141 23:54:48.684443 # ok 19 cpuinfo_match_SVE2 I8MM
7142 23:54:48.687673 # # SIGILL reported for SVE2 I8MM
7143 23:54:48.691551 # ok 20 # SKIP sigill_SVE2 I8MM
7144 23:54:48.694339 # ok 21 cpuinfo_match_SVE2 F32MM
7145 23:54:48.697749 # # SIGILL reported for SVE2 F32MM
7146 23:54:48.701237 # ok 22 # SKIP sigill_SVE2 F32MM
7147 23:54:48.704484 # ok 23 cpuinfo_match_SVE2 F64MM
7148 23:54:48.704561 # # SIGILL reported for SVE2 F64MM
7149 23:54:48.707887 # ok 24 # SKIP sigill_SVE2 F64MM
7150 23:54:48.711097 # ok 25 cpuinfo_match_SVE2 BF16
7151 23:54:48.714527 # # SIGILL reported for SVE2 BF16
7152 23:54:48.717729 # ok 26 # SKIP sigill_SVE2 BF16
7153 23:54:48.721534 # ok 27 cpuinfo_match_SVE2 EBF16
7154 23:54:48.724450 # ok 28 # SKIP sigill_SVE2 EBF16
7155 23:54:48.727852 # # Totals: pass:16 fail:0 xfail:0 xpass:0 skip:12 error:0
7156 23:54:48.731195 ok 45 selftests: arm64: hwcap
7157 23:54:48.734204 # selftests: arm64: ptrace
7158 23:54:48.734282 # TAP version 13
7159 23:54:48.737835 # 1..7
7160 23:54:48.741074 # # Parent is 1520, child is 1521
7161 23:54:48.741193 # ok 1 read_tpidr_one
7162 23:54:48.744352 # ok 2 write_tpidr_one
7163 23:54:48.744467 # ok 3 verify_tpidr_one
7164 23:54:48.747584 # ok 4 count_tpidrs
7165 23:54:48.751069 # ok 5 tpidr2_write
7166 23:54:48.751171 # ok 6 tpidr2_read
7167 23:54:48.754290 # ok 7 write_tpidr_only
7168 23:54:48.757724 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
7169 23:54:48.760934 ok 46 selftests: arm64: ptrace
7170 23:54:48.764029 # selftests: arm64: syscall-abi
7171 23:54:48.764105 # TAP version 13
7172 23:54:48.767599 # 1..2
7173 23:54:48.767673 # ok 1 getpid() FPSIMD
7174 23:54:48.770697 # ok 2 sched_yield() FPSIMD
7175 23:54:48.777362 # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:0 error:0
7176 23:54:48.780975 ok 47 selftests: arm64: syscall-abi
7177 23:54:48.784895 # selftests: arm64: tpidr2
7178 23:54:48.860177 # TAP version 13
7179 23:54:48.860353 # 1..5
7180 23:54:48.863957 # # PID: 1557
7181 23:54:48.864046 # # SME support not present
7182 23:54:48.866780 # ok 0 skipped, TPIDR2 not supported
7183 23:54:48.870257 # ok 1 skipped, TPIDR2 not supported
7184 23:54:48.873668 # ok 2 skipped, TPIDR2 not supported
7185 23:54:48.877237 # ok 3 skipped, TPIDR2 not supported
7186 23:54:48.880398 # ok 4 skipped, TPIDR2 not supported
7187 23:54:48.887095 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:5 error:0
7188 23:54:48.890302 ok 48 selftests: arm64: tpidr2
7189 23:54:50.394741 arm64_tags_test pass
7190 23:54:50.398041 arm64_run_tags_test_sh pass
7191 23:54:50.401733 arm64_fake_sigreturn_bad_magic pass
7192 23:54:50.404961 arm64_fake_sigreturn_bad_size pass
7193 23:54:50.408351 arm64_fake_sigreturn_bad_size_for_magic0 pass
7194 23:54:50.411473 arm64_fake_sigreturn_duplicated_fpsimd pass
7195 23:54:50.415018 arm64_fake_sigreturn_misaligned_sp pass
7196 23:54:50.418433 arm64_fake_sigreturn_missing_fpsimd pass
7197 23:54:50.421473 arm64_fake_sigreturn_sme_change_vl skip
7198 23:54:50.428208 arm64_fake_sigreturn_sve_change_vl skip
7199 23:54:50.431420 arm64_mangle_pstate_invalid_compat_toggle pass
7200 23:54:50.434639 arm64_mangle_pstate_invalid_daif_bits pass
7201 23:54:50.438084 arm64_mangle_pstate_invalid_mode_el1h pass
7202 23:54:50.441810 arm64_mangle_pstate_invalid_mode_el1t pass
7203 23:54:50.448062 arm64_mangle_pstate_invalid_mode_el2h pass
7204 23:54:50.451255 arm64_mangle_pstate_invalid_mode_el2t pass
7205 23:54:50.454927 arm64_mangle_pstate_invalid_mode_el3h pass
7206 23:54:50.458167 arm64_mangle_pstate_invalid_mode_el3t pass
7207 23:54:50.461351 arm64_sme_trap_no_sm skip
7208 23:54:50.464792 arm64_sme_trap_non_streaming skip
7209 23:54:50.464896 arm64_sme_trap_za pass
7210 23:54:50.467682 arm64_sme_vl skip
7211 23:54:50.471540 arm64_ssve_regs skip
7212 23:54:50.471616 arm64_sve_regs skip
7213 23:54:50.474275 arm64_sve_vl skip
7214 23:54:50.474346 arm64_za_no_regs skip
7215 23:54:50.477757 arm64_za_regs skip
7216 23:54:50.481521 arm64_pac_PAUTH_not_enabled skip
7217 23:54:50.484311 arm64_pac_PAUTH_not_enabled_dup2 skip
7218 23:54:50.487615 arm64_pac_Generic_PAUTH_not_enabled skip
7219 23:54:50.491243 arm64_pac_PAUTH_not_enabled_dup3 skip
7220 23:54:50.494450 arm64_pac_PAUTH_not_enabled_dup4 skip
7221 23:54:50.497365 arm64_pac_PAUTH_not_enabled_dup5 skip
7222 23:54:50.504163 arm64_pac_Generic_PAUTH_not_enabled_dup2 skip
7223 23:54:50.504268 arm64_pac pass
7224 23:54:50.507379 arm64_fp-stress_FPSIMD-0-0 pass
7225 23:54:50.511011 arm64_fp-stress_FPSIMD-0-1 pass
7226 23:54:50.513959 arm64_fp-stress_FPSIMD-1-0 pass
7227 23:54:50.517717 arm64_fp-stress_FPSIMD-1-1 pass
7228 23:54:50.520564 arm64_fp-stress_FPSIMD-2-0 pass
7229 23:54:50.523802 arm64_fp-stress_FPSIMD-2-1 pass
7230 23:54:50.527105 arm64_fp-stress_FPSIMD-3-0 pass
7231 23:54:50.530408 arm64_fp-stress_FPSIMD-3-1 pass
7232 23:54:50.533599 arm64_fp-stress_FPSIMD-4-0 pass
7233 23:54:50.536963 arm64_fp-stress_FPSIMD-4-1 pass
7234 23:54:50.537064 arm64_fp-stress_FPSIMD-5-0 pass
7235 23:54:50.540335 arm64_fp-stress_FPSIMD-5-1 pass
7236 23:54:50.543542 arm64_fp-stress_FPSIMD-6-0 pass
7237 23:54:50.546981 arm64_fp-stress_FPSIMD-6-1 pass
7238 23:54:50.550035 arm64_fp-stress_FPSIMD-7-0 pass
7239 23:54:50.553648 arm64_fp-stress_FPSIMD-7-1 pass
7240 23:54:50.556681 arm64_fp-stress pass
7241 23:54:50.560332 arm64_sve-ptrace_SVE_not_available skip
7242 23:54:50.563596 arm64_sve-ptrace skip
7243 23:54:50.566594 arm64_sve-probe-vls_SVE_not_available skip
7244 23:54:50.570158 arm64_sve-probe-vls skip
7245 23:54:50.573334 arm64_vec-syscfg_SVE_not_supported skip
7246 23:54:50.576770 arm64_vec-syscfg_SVE_not_supported_dup2 skip
7247 23:54:50.583033 arm64_vec-syscfg_SVE_not_supported_dup3 skip
7248 23:54:50.586377 arm64_vec-syscfg_SVE_not_supported_dup4 skip
7249 23:54:50.589668 arm64_vec-syscfg_SVE_not_supported_dup5 skip
7250 23:54:50.596288 arm64_vec-syscfg_SVE_not_supported_dup6 skip
7251 23:54:50.599904 arm64_vec-syscfg_SVE_not_supported_dup7 skip
7252 23:54:50.602805 arm64_vec-syscfg_SVE_not_supported_dup8 skip
7253 23:54:50.606547 arm64_vec-syscfg_SVE_not_supported_dup9 skip
7254 23:54:50.612754 arm64_vec-syscfg_SVE_not_supported_dup10 skip
7255 23:54:50.616642 arm64_vec-syscfg_SME_not_supported skip
7256 23:54:50.619458 arm64_vec-syscfg_SME_not_supported_dup2 skip
7257 23:54:50.622734 arm64_vec-syscfg_SME_not_supported_dup3 skip
7258 23:54:50.626044 arm64_vec-syscfg_SME_not_supported_dup4 skip
7259 23:54:50.632739 arm64_vec-syscfg_SME_not_supported_dup5 skip
7260 23:54:50.636196 arm64_vec-syscfg_SME_not_supported_dup6 skip
7261 23:54:50.639576 arm64_vec-syscfg_SME_not_supported_dup7 skip
7262 23:54:50.643072 arm64_vec-syscfg_SME_not_supported_dup8 skip
7263 23:54:50.649143 arm64_vec-syscfg_SME_not_supported_dup9 skip
7264 23:54:50.652847 arm64_vec-syscfg_SME_not_supported_dup10 skip
7265 23:54:50.652921 arm64_vec-syscfg pass
7266 23:54:50.655883 arm64_za-fork_skipped pass
7267 23:54:50.659573 arm64_za-fork pass
7268 23:54:50.662694 arm64_za-ptrace_SME_not_available skip
7269 23:54:50.662792 arm64_za-ptrace skip
7270 23:54:50.665701 arm64_check_buffer_fill skip
7271 23:54:50.668986 arm64_check_child_memory skip
7272 23:54:50.672765 arm64_check_gcr_el1_cswitch skip
7273 23:54:50.675541 arm64_check_ksm_options skip
7274 23:54:50.679150 arm64_check_mmap_options skip
7275 23:54:50.682558 arm64_check_prctl_check_basic_read pass
7276 23:54:50.685992 arm64_check_prctl_NONE pass
7277 23:54:50.686064 arm64_check_prctl_SYNC skip
7278 23:54:50.689064 arm64_check_prctl_ASYNC skip
7279 23:54:50.692249 arm64_check_prctl_SYNC_ASYNC skip
7280 23:54:50.695762 arm64_check_prctl pass
7281 23:54:50.698812 arm64_check_tags_inclusion skip
7282 23:54:50.698888 arm64_check_user_mem skip
7283 23:54:50.705413 arm64_btitest_nohint_func_call_using_br_x0 skip
7284 23:54:50.708685 arm64_btitest_nohint_func_call_using_br_x16 skip
7285 23:54:50.712050 arm64_btitest_nohint_func_call_using_blr skip
7286 23:54:50.719113 arm64_btitest_bti_none_func_call_using_br_x0 skip
7287 23:54:50.722040 arm64_btitest_bti_none_func_call_using_br_x16 skip
7288 23:54:50.725178 arm64_btitest_bti_none_func_call_using_blr skip
7289 23:54:50.731807 arm64_btitest_bti_c_func_call_using_br_x0 skip
7290 23:54:50.735428 arm64_btitest_bti_c_func_call_using_br_x16 skip
7291 23:54:50.738546 arm64_btitest_bti_c_func_call_using_blr skip
7292 23:54:50.745223 arm64_btitest_bti_j_func_call_using_br_x0 skip
7293 23:54:50.748969 arm64_btitest_bti_j_func_call_using_br_x16 skip
7294 23:54:50.751816 arm64_btitest_bti_j_func_call_using_blr skip
7295 23:54:50.755250 arm64_btitest_bti_jc_func_call_using_br_x0 skip
7296 23:54:50.762116 arm64_btitest_bti_jc_func_call_using_br_x16 skip
7297 23:54:50.765051 arm64_btitest_bti_jc_func_call_using_blr skip
7298 23:54:50.768617 arm64_btitest_paciasp_func_call_using_br_x0 skip
7299 23:54:50.775092 arm64_btitest_paciasp_func_call_using_br_x16 skip
7300 23:54:50.778395 arm64_btitest_paciasp_func_call_using_blr skip
7301 23:54:50.778480 arm64_btitest pass
7302 23:54:50.785027 arm64_nobtitest_nohint_func_call_using_br_x0 skip
7303 23:54:50.788365 arm64_nobtitest_nohint_func_call_using_br_x16 skip
7304 23:54:50.792005 arm64_nobtitest_nohint_func_call_using_blr skip
7305 23:54:50.798122 arm64_nobtitest_bti_none_func_call_using_br_x0 skip
7306 23:54:50.801960 arm64_nobtitest_bti_none_func_call_using_br_x16 skip
7307 23:54:50.805391 arm64_nobtitest_bti_none_func_call_using_blr skip
7308 23:54:50.811604 arm64_nobtitest_bti_c_func_call_using_br_x0 skip
7309 23:54:50.815118 arm64_nobtitest_bti_c_func_call_using_br_x16 skip
7310 23:54:50.818213 arm64_nobtitest_bti_c_func_call_using_blr skip
7311 23:54:50.824761 arm64_nobtitest_bti_j_func_call_using_br_x0 skip
7312 23:54:50.828157 arm64_nobtitest_bti_j_func_call_using_br_x16 skip
7313 23:54:50.831368 arm64_nobtitest_bti_j_func_call_using_blr skip
7314 23:54:50.837956 arm64_nobtitest_bti_jc_func_call_using_br_x0 skip
7315 23:54:50.841565 arm64_nobtitest_bti_jc_func_call_using_br_x16 skip
7316 23:54:50.844595 arm64_nobtitest_bti_jc_func_call_using_blr skip
7317 23:54:50.851406 arm64_nobtitest_paciasp_func_call_using_br_x0 skip
7318 23:54:50.854513 arm64_nobtitest_paciasp_func_call_using_br_x16 skip
7319 23:54:50.858103 arm64_nobtitest_paciasp_func_call_using_blr skip
7320 23:54:50.861418 arm64_nobtitest pass
7321 23:54:50.864552 arm64_hwcap_cpuinfo_match_RNG pass
7322 23:54:50.867568 arm64_hwcap_sigill_RNG skip
7323 23:54:50.870837 arm64_hwcap_cpuinfo_match_SME pass
7324 23:54:50.870938 arm64_hwcap_sigill_SME pass
7325 23:54:50.874344 arm64_hwcap_cpuinfo_match_SVE pass
7326 23:54:50.877582 arm64_hwcap_sigill_SVE pass
7327 23:54:50.880820 arm64_hwcap_cpuinfo_match_SVE_2 pass
7328 23:54:50.884341 arm64_hwcap_sigill_SVE_2 skip
7329 23:54:50.887872 arm64_hwcap_cpuinfo_match_SVE_AES pass
7330 23:54:50.891164 arm64_hwcap_sigill_SVE_AES skip
7331 23:54:50.894282 arm64_hwcap_cpuinfo_match_SVE2_PMULL pass
7332 23:54:50.897438 arm64_hwcap_sigill_SVE2_PMULL skip
7333 23:54:50.900837 arm64_hwcap_cpuinfo_match_SVE2_BITPERM pass
7334 23:54:50.904296 arm64_hwcap_sigill_SVE2_BITPERM skip
7335 23:54:50.907446 arm64_hwcap_cpuinfo_match_SVE2_SHA3 pass
7336 23:54:50.910865 arm64_hwcap_sigill_SVE2_SHA3 skip
7337 23:54:50.914150 arm64_hwcap_cpuinfo_match_SVE2_SM4 pass
7338 23:54:50.917396 arm64_hwcap_sigill_SVE2_SM4 skip
7339 23:54:50.920931 arm64_hwcap_cpuinfo_match_SVE2_I8MM pass
7340 23:54:50.924200 arm64_hwcap_sigill_SVE2_I8MM skip
7341 23:54:50.927603 arm64_hwcap_cpuinfo_match_SVE2_F32MM pass
7342 23:54:50.930619 arm64_hwcap_sigill_SVE2_F32MM skip
7343 23:54:50.933917 arm64_hwcap_cpuinfo_match_SVE2_F64MM pass
7344 23:54:50.937106 arm64_hwcap_sigill_SVE2_F64MM skip
7345 23:54:50.940723 arm64_hwcap_cpuinfo_match_SVE2_BF16 pass
7346 23:54:50.943629 arm64_hwcap_sigill_SVE2_BF16 skip
7347 23:54:50.947604 arm64_hwcap_cpuinfo_match_SVE2_EBF16 pass
7348 23:54:50.950392 arm64_hwcap_sigill_SVE2_EBF16 skip
7349 23:54:50.953934 arm64_hwcap pass
7350 23:54:50.957402 arm64_ptrace_read_tpidr_one pass
7351 23:54:50.960627 arm64_ptrace_write_tpidr_one pass
7352 23:54:50.963826 arm64_ptrace_verify_tpidr_one pass
7353 23:54:50.963913 arm64_ptrace_count_tpidrs pass
7354 23:54:50.967194 arm64_ptrace_tpidr2_write pass
7355 23:54:50.970524 arm64_ptrace_tpidr2_read pass
7356 23:54:50.973509 arm64_ptrace_write_tpidr_only pass
7357 23:54:50.977015 arm64_ptrace pass
7358 23:54:50.980505 arm64_syscall-abi_getpid_FPSIMD pass
7359 23:54:50.983871 arm64_syscall-abi_sched_yield_FPSIMD pass
7360 23:54:50.983957 arm64_syscall-abi pass
7361 23:54:50.990016 arm64_tpidr2_skipped_TPIDR2_not_supported pass
7362 23:54:50.993506 arm64_tpidr2_skipped_TPIDR2_not_supported_dup2 pass
7363 23:54:51.000375 arm64_tpidr2_skipped_TPIDR2_not_supported_dup3 pass
7364 23:54:51.003566 arm64_tpidr2_skipped_TPIDR2_not_supported_dup4 pass
7365 23:54:51.006837 arm64_tpidr2_skipped_TPIDR2_not_supported_dup5 pass
7366 23:54:51.010070 arm64_tpidr2 pass
7367 23:54:51.013392 + ../../utils/send-to-lava.sh ./output/result.txt
7368 23:54:51.020078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-arm64 RESULT=pass>
7369 23:54:51.020368 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-arm64 RESULT=pass
7371 23:54:51.026618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tags_test RESULT=pass>
7372 23:54:51.026907 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tags_test RESULT=pass
7374 23:54:51.030027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass>
7375 23:54:51.030285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass
7377 23:54:51.040264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass>
7378 23:54:51.040549 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass
7380 23:54:51.046702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass>
7381 23:54:51.046963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass
7383 23:54:51.053645 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass>
7384 23:54:51.053903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass
7386 23:54:51.060153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass>
7387 23:54:51.060445 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass
7389 23:54:51.086012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass>
7390 23:54:51.086292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass
7392 23:54:51.122455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass>
7393 23:54:51.122727 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass
7395 23:54:51.153583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=skip>
7396 23:54:51.153875 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=skip
7398 23:54:51.187336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=skip>
7399 23:54:51.187597 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=skip
7401 23:54:51.220422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass>
7402 23:54:51.220693 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass
7404 23:54:51.256618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass>
7405 23:54:51.256884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass
7407 23:54:51.288972 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass>
7408 23:54:51.289237 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass
7410 23:54:51.321988 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass>
7411 23:54:51.322268 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass
7413 23:54:51.358051 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass>
7414 23:54:51.358325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass
7416 23:54:51.391292 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass>
7417 23:54:51.391558 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass
7419 23:54:51.425220 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass>
7420 23:54:51.425543 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass
7422 23:54:51.457417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass>
7423 23:54:51.457683 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass
7425 23:54:51.492132 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=skip>
7426 23:54:51.492453 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=skip
7428 23:54:51.529611 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip
7430 23:54:51.532823 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip>
7431 23:54:51.567443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_za RESULT=pass>
7432 23:54:51.567765 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_za RESULT=pass
7434 23:54:51.602618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_vl RESULT=skip>
7435 23:54:51.602894 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_vl RESULT=skip
7437 23:54:51.640747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ssve_regs RESULT=skip>
7438 23:54:51.641030 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ssve_regs RESULT=skip
7440 23:54:51.677417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_regs RESULT=skip>
7441 23:54:51.677699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_regs RESULT=skip
7443 23:54:51.718107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_vl RESULT=skip>
7444 23:54:51.718416 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_vl RESULT=skip
7446 23:54:51.755806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_no_regs RESULT=skip>
7447 23:54:51.756084 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_no_regs RESULT=skip
7449 23:54:51.796300 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_regs RESULT=skip>
7450 23:54:51.796568 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_regs RESULT=skip
7452 23:54:51.835981 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled RESULT=skip
7454 23:54:51.839610 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled RESULT=skip>
7455 23:54:51.879123 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup2 RESULT=skip>
7456 23:54:51.879396 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup2 RESULT=skip
7458 23:54:51.919285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled RESULT=skip>
7459 23:54:51.919555 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled RESULT=skip
7461 23:54:51.955454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup3 RESULT=skip>
7462 23:54:51.955732 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup3 RESULT=skip
7464 23:54:51.992492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup4 RESULT=skip>
7465 23:54:51.992762 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup4 RESULT=skip
7467 23:54:52.028777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup5 RESULT=skip>
7468 23:54:52.029043 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup5 RESULT=skip
7470 23:54:52.063922 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled_dup2 RESULT=skip>
7471 23:54:52.064236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled_dup2 RESULT=skip
7473 23:54:52.100458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac RESULT=pass>
7474 23:54:52.100735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac RESULT=pass
7476 23:54:52.138087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass>
7477 23:54:52.138361 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass
7479 23:54:52.176069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-1 RESULT=pass>
7480 23:54:52.176344 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-1 RESULT=pass
7482 23:54:52.217232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-0 RESULT=pass>
7483 23:54:52.217556 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-0 RESULT=pass
7485 23:54:52.259793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-1 RESULT=pass>
7486 23:54:52.260078 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-1 RESULT=pass
7488 23:54:52.298618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-0 RESULT=pass>
7489 23:54:52.298901 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-0 RESULT=pass
7491 23:54:52.335143 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-1 RESULT=pass>
7492 23:54:52.335454 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-1 RESULT=pass
7494 23:54:52.374769 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-0 RESULT=pass>
7495 23:54:52.375040 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-0 RESULT=pass
7497 23:54:52.420680 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-1 RESULT=pass>
7498 23:54:52.420947 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-1 RESULT=pass
7500 23:54:52.459004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-0 RESULT=pass>
7501 23:54:52.459275 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-0 RESULT=pass
7503 23:54:52.500384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-1 RESULT=pass>
7504 23:54:52.500657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-1 RESULT=pass
7506 23:54:52.537838 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-0 RESULT=pass>
7507 23:54:52.538114 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-0 RESULT=pass
7509 23:54:52.575535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-1 RESULT=pass>
7510 23:54:52.575826 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-1 RESULT=pass
7512 23:54:52.612490 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-0 RESULT=pass>
7513 23:54:52.612752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-0 RESULT=pass
7515 23:54:52.650414 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-1 RESULT=pass>
7516 23:54:52.650691 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-1 RESULT=pass
7518 23:54:52.688097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-0 RESULT=pass>
7519 23:54:52.688365 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-0 RESULT=pass
7521 23:54:52.727097 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-1 RESULT=pass>
7522 23:54:52.727367 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-1 RESULT=pass
7524 23:54:52.768640 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress RESULT=pass>
7525 23:54:52.768938 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress RESULT=pass
7527 23:54:52.807690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_not_available RESULT=skip>
7528 23:54:52.807998 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_not_available RESULT=skip
7530 23:54:52.840882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace RESULT=skip>
7531 23:54:52.841170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace RESULT=skip
7533 23:54:52.879599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_SVE_not_available RESULT=skip>
7534 23:54:52.879898 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_SVE_not_available RESULT=skip
7536 23:54:52.915306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls RESULT=skip>
7537 23:54:52.915580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls RESULT=skip
7539 23:54:52.962964 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported RESULT=skip>
7540 23:54:52.963236 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported RESULT=skip
7542 23:54:53.001144 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup2 RESULT=skip>
7543 23:54:53.001466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup2 RESULT=skip
7545 23:54:53.037765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup3 RESULT=skip>
7546 23:54:53.038041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup3 RESULT=skip
7548 23:54:53.080310 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup4 RESULT=skip>
7549 23:54:53.080584 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup4 RESULT=skip
7551 23:54:53.121469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup5 RESULT=skip>
7552 23:54:53.121799 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup5 RESULT=skip
7554 23:54:53.159899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup6 RESULT=skip>
7555 23:54:53.160185 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup6 RESULT=skip
7557 23:54:53.200302 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup7 RESULT=skip>
7558 23:54:53.200572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup7 RESULT=skip
7560 23:54:53.244715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup8 RESULT=skip>
7561 23:54:53.244989 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup8 RESULT=skip
7563 23:54:53.279705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup9 RESULT=skip>
7564 23:54:53.279973 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup9 RESULT=skip
7566 23:54:53.317968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup10 RESULT=skip>
7567 23:54:53.318245 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup10 RESULT=skip
7569 23:54:53.357443 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported RESULT=skip>
7570 23:54:53.357721 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported RESULT=skip
7572 23:54:53.395842 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup2 RESULT=skip>
7573 23:54:53.396117 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup2 RESULT=skip
7575 23:54:53.433862 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup3 RESULT=skip>
7576 23:54:53.434126 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup3 RESULT=skip
7578 23:54:53.472116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup4 RESULT=skip>
7579 23:54:53.472457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup4 RESULT=skip
7581 23:54:53.510126 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup5 RESULT=skip>
7582 23:54:53.510404 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup5 RESULT=skip
7584 23:54:53.547970 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup6 RESULT=skip>
7585 23:54:53.548242 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup6 RESULT=skip
7587 23:54:53.584740 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup7 RESULT=skip>
7588 23:54:53.585017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup7 RESULT=skip
7590 23:54:53.621321 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup8 RESULT=skip>
7591 23:54:53.621588 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup8 RESULT=skip
7593 23:54:53.656759 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup9 RESULT=skip>
7594 23:54:53.657031 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup9 RESULT=skip
7596 23:54:53.694061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup10 RESULT=skip>
7597 23:54:53.694325 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup10 RESULT=skip
7599 23:54:53.726979 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg RESULT=pass>
7600 23:54:53.727239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg RESULT=pass
7602 23:54:53.765191 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork_skipped RESULT=pass>
7603 23:54:53.765545 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork_skipped RESULT=pass
7605 23:54:53.802684 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork RESULT=pass>
7606 23:54:53.802987 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork RESULT=pass
7608 23:54:53.843542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_SME_not_available RESULT=skip>
7609 23:54:53.843848 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_SME_not_available RESULT=skip
7611 23:54:53.879370 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace RESULT=skip>
7612 23:54:53.879686 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace RESULT=skip
7614 23:54:53.916916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill RESULT=skip>
7615 23:54:53.917231 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill RESULT=skip
7617 23:54:53.956099 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory RESULT=skip>
7618 23:54:53.956400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory RESULT=skip
7620 23:54:53.997537 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=skip>
7621 23:54:53.997812 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=skip
7623 23:54:54.035858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options RESULT=skip>
7624 23:54:54.036137 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options RESULT=skip
7626 23:54:54.076384 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options RESULT=skip>
7627 23:54:54.076661 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options RESULT=skip
7629 23:54:54.119455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass>
7630 23:54:54.119747 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass
7632 23:54:54.155473 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass>
7633 23:54:54.155777 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass
7635 23:54:54.195054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=skip>
7636 23:54:54.195343 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=skip
7638 23:54:54.230877 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=skip>
7639 23:54:54.231149 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=skip
7641 23:54:54.272351 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=skip
7643 23:54:54.275412 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=skip>
7644 23:54:54.304765 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl RESULT=pass>
7645 23:54:54.305042 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl RESULT=pass
7647 23:54:54.341924 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion RESULT=skip>
7648 23:54:54.342203 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion RESULT=skip
7650 23:54:54.378460 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem RESULT=skip>
7651 23:54:54.378752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem RESULT=skip
7653 23:54:54.419142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=skip>
7654 23:54:54.419406 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=skip
7656 23:54:54.452793 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=skip>
7657 23:54:54.453056 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=skip
7659 23:54:54.488848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=skip>
7660 23:54:54.489151 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=skip
7662 23:54:54.526422 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=skip>
7663 23:54:54.526687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=skip
7665 23:54:54.561850 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=skip>
7666 23:54:54.562112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=skip
7668 23:54:54.597344 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=skip>
7669 23:54:54.597614 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=skip
7671 23:54:54.635053 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=skip>
7672 23:54:54.635346 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=skip
7674 23:54:54.671857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=skip>
7675 23:54:54.672144 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=skip
7677 23:54:54.708518 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=skip>
7678 23:54:54.708790 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=skip
7680 23:54:54.743809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=skip>
7681 23:54:54.744098 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=skip
7683 23:54:54.779810 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=skip>
7684 23:54:54.780081 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=skip
7686 23:54:54.812259 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=skip>
7687 23:54:54.812520 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=skip
7689 23:54:54.846872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=skip>
7690 23:54:54.847161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=skip
7692 23:54:54.884209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=skip>
7693 23:54:54.884482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=skip
7695 23:54:54.921886 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=skip>
7696 23:54:54.922174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=skip
7698 23:54:54.961076 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=skip>
7699 23:54:54.961359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=skip
7701 23:54:55.003417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=skip>
7702 23:54:55.003710 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=skip
7704 23:54:55.042621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=skip>
7705 23:54:55.042922 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=skip
7707 23:54:55.077463 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest RESULT=pass>
7708 23:54:55.077760 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest RESULT=pass
7710 23:54:55.123376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=skip>
7711 23:54:55.123678 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=skip
7713 23:54:55.160511 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=skip>
7714 23:54:55.160809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=skip
7716 23:54:55.196359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=skip>
7717 23:54:55.196623 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=skip
7719 23:54:55.230665 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=skip>
7720 23:54:55.230964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=skip
7722 23:54:55.267304 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=skip>
7723 23:54:55.267599 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=skip
7725 23:54:55.308012 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=skip>
7726 23:54:55.308324 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=skip
7728 23:54:55.344330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=skip>
7729 23:54:55.344647 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=skip
7731 23:54:55.381642 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=skip>
7732 23:54:55.381937 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=skip
7734 23:54:55.420237 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=skip>
7735 23:54:55.420536 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=skip
7737 23:54:55.459052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=skip>
7738 23:54:55.459353 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=skip
7740 23:54:55.495623 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=skip>
7741 23:54:55.495915 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=skip
7743 23:54:55.529348 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=skip>
7744 23:54:55.529613 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=skip
7746 23:54:55.567614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=skip>
7747 23:54:55.567934 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=skip
7749 23:54:55.611261 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=skip>
7750 23:54:55.611534 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=skip
7752 23:54:55.651802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=skip>
7753 23:54:55.652072 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=skip
7755 23:54:55.692442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=skip>
7756 23:54:55.692717 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=skip
7758 23:54:55.732195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=skip>
7759 23:54:55.732460 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=skip
7761 23:54:55.775174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=skip>
7762 23:54:55.775442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=skip
7764 23:54:55.815852 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest RESULT=pass>
7765 23:54:55.816120 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest RESULT=pass
7767 23:54:55.859661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass>
7768 23:54:55.859924 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass
7770 23:54:55.897050 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=skip>
7771 23:54:55.897359 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=skip
7773 23:54:55.936371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass>
7774 23:54:55.936663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass
7776 23:54:55.971753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass>
7777 23:54:55.972016 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass
7779 23:54:56.011128 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass
7781 23:54:56.014202 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass>
7782 23:54:56.050389 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass>
7783 23:54:56.050662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass
7785 23:54:56.089876 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass>
7786 23:54:56.090187 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass
7788 23:54:56.121682 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=skip>
7789 23:54:56.121970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=skip
7791 23:54:56.166316 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass>
7792 23:54:56.166637 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass
7794 23:54:56.198995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=skip>
7795 23:54:56.199301 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=skip
7797 23:54:56.240173 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass>
7798 23:54:56.240487 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass
7800 23:54:56.276159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=skip>
7801 23:54:56.276442 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=skip
7803 23:54:56.318687 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass>
7804 23:54:56.319009 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass
7806 23:54:56.359171 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=skip>
7807 23:54:56.359503 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=skip
7809 23:54:56.400858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass>
7810 23:54:56.401229 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass
7812 23:54:56.441150 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=skip
7814 23:54:56.444239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=skip>
7815 23:54:56.483777 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass>
7816 23:54:56.484140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass
7818 23:54:56.526663 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=skip
7820 23:54:56.529781 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=skip>
7821 23:54:56.575681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass>
7822 23:54:56.575990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass
7824 23:54:56.613028 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=skip
7826 23:54:56.616162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=skip>
7827 23:54:56.659963 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass>
7828 23:54:56.660321 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass
7830 23:54:56.701177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=skip>
7831 23:54:56.701521 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=skip
7833 23:54:56.740605 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass>
7834 23:54:56.740884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass
7836 23:54:56.778945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=skip>
7837 23:54:56.779234 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=skip
7839 23:54:56.815825 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass>
7840 23:54:56.816105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass
7842 23:54:56.851494 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=skip
7844 23:54:56.854417 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=skip>
7845 23:54:56.894566 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass>
7846 23:54:56.894851 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass
7848 23:54:56.937232 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip>
7849 23:54:56.937533 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip
7851 23:54:56.973423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap RESULT=pass>
7852 23:54:56.973696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap RESULT=pass
7854 23:54:57.015754 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass
7856 23:54:57.019128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass>
7857 23:54:57.052896 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass
7859 23:54:57.055800 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass>
7860 23:54:57.100064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass>
7861 23:54:57.100337 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass
7863 23:54:57.132748 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass>
7864 23:54:57.133013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass
7866 23:54:57.175376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass>
7867 23:54:57.175697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass
7869 23:54:57.212690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass>
7870 23:54:57.213008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass
7872 23:54:57.254100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass>
7873 23:54:57.254446 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass
7875 23:54:57.288625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace RESULT=pass>
7876 23:54:57.288925 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace RESULT=pass
7878 23:54:57.330170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass>
7879 23:54:57.330479 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass
7881 23:54:57.369476 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass>
7882 23:54:57.369816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass
7884 23:54:57.404345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi RESULT=pass>
7885 23:54:57.404671 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi RESULT=pass
7887 23:54:57.445916 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported RESULT=pass>
7888 23:54:57.446225 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported RESULT=pass
7890 23:54:57.483159 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup2 RESULT=pass>
7891 23:54:57.483466 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup2 RESULT=pass
7893 23:54:57.519119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup3 RESULT=pass>
7894 23:54:57.519457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup3 RESULT=pass
7896 23:54:57.555676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup4 RESULT=pass>
7897 23:54:57.555990 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup4 RESULT=pass
7899 23:54:57.596027 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup5 RESULT=pass>
7900 23:54:57.596372 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup5 RESULT=pass
7902 23:54:57.629897 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2 RESULT=pass>
7903 23:54:57.630021 + set +x
7904 23:54:57.630309 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2 RESULT=pass
7906 23:54:57.636818 <LAVA_SIGNAL_ENDRUN 1_kselftest-arm64 14084357_1.6.2.3.5>
7907 23:54:57.637135 Received signal: <ENDRUN> 1_kselftest-arm64 14084357_1.6.2.3.5
7908 23:54:57.637242 Ending use of test pattern.
7909 23:54:57.637348 Ending test lava.1_kselftest-arm64 (14084357_1.6.2.3.5), duration 29.99
7911 23:54:57.639791 <LAVA_TEST_RUNNER EXIT>
7912 23:54:57.640055 ok: lava_test_shell seems to have completed
7913 23:54:57.641191 arm64_btitest: pass
arm64_btitest_bti_c_func_call_using_blr: skip
arm64_btitest_bti_c_func_call_using_br_x0: skip
arm64_btitest_bti_c_func_call_using_br_x16: skip
arm64_btitest_bti_j_func_call_using_blr: skip
arm64_btitest_bti_j_func_call_using_br_x0: skip
arm64_btitest_bti_j_func_call_using_br_x16: skip
arm64_btitest_bti_jc_func_call_using_blr: skip
arm64_btitest_bti_jc_func_call_using_br_x0: skip
arm64_btitest_bti_jc_func_call_using_br_x16: skip
arm64_btitest_bti_none_func_call_using_blr: skip
arm64_btitest_bti_none_func_call_using_br_x0: skip
arm64_btitest_bti_none_func_call_using_br_x16: skip
arm64_btitest_nohint_func_call_using_blr: skip
arm64_btitest_nohint_func_call_using_br_x0: skip
arm64_btitest_nohint_func_call_using_br_x16: skip
arm64_btitest_paciasp_func_call_using_blr: skip
arm64_btitest_paciasp_func_call_using_br_x0: skip
arm64_btitest_paciasp_func_call_using_br_x16: skip
arm64_check_buffer_fill: skip
arm64_check_child_memory: skip
arm64_check_gcr_el1_cswitch: skip
arm64_check_ksm_options: skip
arm64_check_mmap_options: skip
arm64_check_prctl: pass
arm64_check_prctl_ASYNC: skip
arm64_check_prctl_NONE: pass
arm64_check_prctl_SYNC: skip
arm64_check_prctl_SYNC_ASYNC: skip
arm64_check_prctl_check_basic_read: pass
arm64_check_tags_inclusion: skip
arm64_check_user_mem: skip
arm64_fake_sigreturn_bad_magic: pass
arm64_fake_sigreturn_bad_size: pass
arm64_fake_sigreturn_bad_size_for_magic0: pass
arm64_fake_sigreturn_duplicated_fpsimd: pass
arm64_fake_sigreturn_misaligned_sp: pass
arm64_fake_sigreturn_missing_fpsimd: pass
arm64_fake_sigreturn_sme_change_vl: skip
arm64_fake_sigreturn_sve_change_vl: skip
arm64_fp-stress: pass
arm64_fp-stress_FPSIMD-0-0: pass
arm64_fp-stress_FPSIMD-0-1: pass
arm64_fp-stress_FPSIMD-1-0: pass
arm64_fp-stress_FPSIMD-1-1: pass
arm64_fp-stress_FPSIMD-2-0: pass
arm64_fp-stress_FPSIMD-2-1: pass
arm64_fp-stress_FPSIMD-3-0: pass
arm64_fp-stress_FPSIMD-3-1: pass
arm64_fp-stress_FPSIMD-4-0: pass
arm64_fp-stress_FPSIMD-4-1: pass
arm64_fp-stress_FPSIMD-5-0: pass
arm64_fp-stress_FPSIMD-5-1: pass
arm64_fp-stress_FPSIMD-6-0: pass
arm64_fp-stress_FPSIMD-6-1: pass
arm64_fp-stress_FPSIMD-7-0: pass
arm64_fp-stress_FPSIMD-7-1: pass
arm64_hwcap: pass
arm64_hwcap_cpuinfo_match_RNG: pass
arm64_hwcap_cpuinfo_match_SME: pass
arm64_hwcap_cpuinfo_match_SVE: pass
arm64_hwcap_cpuinfo_match_SVE2_BF16: pass
arm64_hwcap_cpuinfo_match_SVE2_BITPERM: pass
arm64_hwcap_cpuinfo_match_SVE2_EBF16: pass
arm64_hwcap_cpuinfo_match_SVE2_F32MM: pass
arm64_hwcap_cpuinfo_match_SVE2_F64MM: pass
arm64_hwcap_cpuinfo_match_SVE2_I8MM: pass
arm64_hwcap_cpuinfo_match_SVE2_PMULL: pass
arm64_hwcap_cpuinfo_match_SVE2_SHA3: pass
arm64_hwcap_cpuinfo_match_SVE2_SM4: pass
arm64_hwcap_cpuinfo_match_SVE_2: pass
arm64_hwcap_cpuinfo_match_SVE_AES: pass
arm64_hwcap_sigill_RNG: skip
arm64_hwcap_sigill_SME: pass
arm64_hwcap_sigill_SVE: pass
arm64_hwcap_sigill_SVE2_BF16: skip
arm64_hwcap_sigill_SVE2_BITPERM: skip
arm64_hwcap_sigill_SVE2_EBF16: skip
arm64_hwcap_sigill_SVE2_F32MM: skip
arm64_hwcap_sigill_SVE2_F64MM: skip
arm64_hwcap_sigill_SVE2_I8MM: skip
arm64_hwcap_sigill_SVE2_PMULL: skip
arm64_hwcap_sigill_SVE2_SHA3: skip
arm64_hwcap_sigill_SVE2_SM4: skip
arm64_hwcap_sigill_SVE_2: skip
arm64_hwcap_sigill_SVE_AES: skip
arm64_mangle_pstate_invalid_compat_toggle: pass
arm64_mangle_pstate_invalid_daif_bits: pass
arm64_mangle_pstate_invalid_mode_el1h: pass
arm64_mangle_pstate_invalid_mode_el1t: pass
arm64_mangle_pstate_invalid_mode_el2h: pass
arm64_mangle_pstate_invalid_mode_el2t: pass
arm64_mangle_pstate_invalid_mode_el3h: pass
arm64_mangle_pstate_invalid_mode_el3t: pass
arm64_nobtitest: pass
arm64_nobtitest_bti_c_func_call_using_blr: skip
arm64_nobtitest_bti_c_func_call_using_br_x0: skip
arm64_nobtitest_bti_c_func_call_using_br_x16: skip
arm64_nobtitest_bti_j_func_call_using_blr: skip
arm64_nobtitest_bti_j_func_call_using_br_x0: skip
arm64_nobtitest_bti_j_func_call_using_br_x16: skip
arm64_nobtitest_bti_jc_func_call_using_blr: skip
arm64_nobtitest_bti_jc_func_call_using_br_x0: skip
arm64_nobtitest_bti_jc_func_call_using_br_x16: skip
arm64_nobtitest_bti_none_func_call_using_blr: skip
arm64_nobtitest_bti_none_func_call_using_br_x0: skip
arm64_nobtitest_bti_none_func_call_using_br_x16: skip
arm64_nobtitest_nohint_func_call_using_blr: skip
arm64_nobtitest_nohint_func_call_using_br_x0: skip
arm64_nobtitest_nohint_func_call_using_br_x16: skip
arm64_nobtitest_paciasp_func_call_using_blr: skip
arm64_nobtitest_paciasp_func_call_using_br_x0: skip
arm64_nobtitest_paciasp_func_call_using_br_x16: skip
arm64_pac: pass
arm64_pac_Generic_PAUTH_not_enabled: skip
arm64_pac_Generic_PAUTH_not_enabled_dup2: skip
arm64_pac_PAUTH_not_enabled: skip
arm64_pac_PAUTH_not_enabled_dup2: skip
arm64_pac_PAUTH_not_enabled_dup3: skip
arm64_pac_PAUTH_not_enabled_dup4: skip
arm64_pac_PAUTH_not_enabled_dup5: skip
arm64_ptrace: pass
arm64_ptrace_count_tpidrs: pass
arm64_ptrace_read_tpidr_one: pass
arm64_ptrace_tpidr2_read: pass
arm64_ptrace_tpidr2_write: pass
arm64_ptrace_verify_tpidr_one: pass
arm64_ptrace_write_tpidr_one: pass
arm64_ptrace_write_tpidr_only: pass
arm64_run_tags_test_sh: pass
arm64_sme_trap_no_sm: skip
arm64_sme_trap_non_streaming: skip
arm64_sme_trap_za: pass
arm64_sme_vl: skip
arm64_ssve_regs: skip
arm64_sve-probe-vls: skip
arm64_sve-probe-vls_SVE_not_available: skip
arm64_sve-ptrace: skip
arm64_sve-ptrace_SVE_not_available: skip
arm64_sve_regs: skip
arm64_sve_vl: skip
arm64_syscall-abi: pass
arm64_syscall-abi_getpid_FPSIMD: pass
arm64_syscall-abi_sched_yield_FPSIMD: pass
arm64_tags_test: pass
arm64_tpidr2: pass
arm64_tpidr2_skipped_TPIDR2_not_supported: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup2: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup3: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup4: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup5: pass
arm64_vec-syscfg: pass
arm64_vec-syscfg_SME_not_supported: skip
arm64_vec-syscfg_SME_not_supported_dup10: skip
arm64_vec-syscfg_SME_not_supported_dup2: skip
arm64_vec-syscfg_SME_not_supported_dup3: skip
arm64_vec-syscfg_SME_not_supported_dup4: skip
arm64_vec-syscfg_SME_not_supported_dup5: skip
arm64_vec-syscfg_SME_not_supported_dup6: skip
arm64_vec-syscfg_SME_not_supported_dup7: skip
arm64_vec-syscfg_SME_not_supported_dup8: skip
arm64_vec-syscfg_SME_not_supported_dup9: skip
arm64_vec-syscfg_SVE_not_supported: skip
arm64_vec-syscfg_SVE_not_supported_dup10: skip
arm64_vec-syscfg_SVE_not_supported_dup2: skip
arm64_vec-syscfg_SVE_not_supported_dup3: skip
arm64_vec-syscfg_SVE_not_supported_dup4: skip
arm64_vec-syscfg_SVE_not_supported_dup5: skip
arm64_vec-syscfg_SVE_not_supported_dup6: skip
arm64_vec-syscfg_SVE_not_supported_dup7: skip
arm64_vec-syscfg_SVE_not_supported_dup8: skip
arm64_vec-syscfg_SVE_not_supported_dup9: skip
arm64_za-fork: pass
arm64_za-fork_skipped: pass
arm64_za-ptrace: skip
arm64_za-ptrace_SME_not_available: skip
arm64_za_no_regs: skip
arm64_za_regs: skip
shardfile-arm64: pass
7914 23:54:57.641393 end: 3.1 lava-test-shell (duration 00:00:31) [common]
7915 23:54:57.641484 end: 3 lava-test-retry (duration 00:00:31) [common]
7916 23:54:57.641572 start: 4 finalize (timeout 00:07:39) [common]
7917 23:54:57.641660 start: 4.1 power-off (timeout 00:00:30) [common]
7918 23:54:57.641816 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
7919 23:54:58.859061 >> Command sent successfully.
7920 23:54:58.861511 Returned 0 in 1 seconds
7921 23:54:58.961924 end: 4.1 power-off (duration 00:00:01) [common]
7923 23:54:58.962290 start: 4.2 read-feedback (timeout 00:07:37) [common]
7924 23:54:58.962570 Listened to connection for namespace 'common' for up to 1s
7925 23:54:59.963539 Finalising connection for namespace 'common'
7926 23:54:59.963732 Disconnecting from shell: Finalise
7927 23:54:59.963837 / #
7928 23:55:00.064187 end: 4.2 read-feedback (duration 00:00:01) [common]
7929 23:55:00.064382 end: 4 finalize (duration 00:00:02) [common]
7930 23:55:00.064527 Cleaning after the job
7931 23:55:00.064657 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/ramdisk
7932 23:55:00.066863 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/kernel
7933 23:55:00.077584 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/dtb
7934 23:55:00.077815 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/nfsrootfs
7935 23:55:00.141963 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14084357/tftp-deploy-30xe4kpc/modules
7936 23:55:00.147589 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14084357
7937 23:55:00.726919 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14084357
7938 23:55:00.727100 Job finished correctly