Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 1
- Kernel Errors: 37
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 87
1 00:38:06.241639 lava-dispatcher, installed at version: 2024.03
2 00:38:06.241837 start: 0 validate
3 00:38:06.241968 Start time: 2024-06-05 00:38:06.241961+00:00 (UTC)
4 00:38:06.242090 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:38:06.242214 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 00:38:06.503546 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:38:06.504284 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-168-g96fd74998d4ca%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 00:38:25.759732 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:38:25.760469 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-168-g96fd74998d4ca%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 00:38:26.021070 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:38:26.021865 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-168-g96fd74998d4ca%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 00:38:28.779762 validate duration: 22.54
14 00:38:28.780039 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 00:38:28.780149 start: 1.1 download-retry (timeout 00:10:00) [common]
16 00:38:28.780244 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 00:38:28.780372 Not decompressing ramdisk as can be used compressed.
18 00:38:28.780457 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 00:38:28.780523 saving as /var/lib/lava/dispatcher/tmp/14173524/tftp-deploy-e3uml72i/ramdisk/rootfs.cpio.gz
20 00:38:28.780588 total size: 8181887 (7 MB)
21 00:38:29.050845 progress 0 % (0 MB)
22 00:38:29.054496 progress 5 % (0 MB)
23 00:38:29.058058 progress 10 % (0 MB)
24 00:38:29.061578 progress 15 % (1 MB)
25 00:38:29.065149 progress 20 % (1 MB)
26 00:38:29.068637 progress 25 % (1 MB)
27 00:38:29.071866 progress 30 % (2 MB)
28 00:38:29.075497 progress 35 % (2 MB)
29 00:38:29.078710 progress 40 % (3 MB)
30 00:38:29.082226 progress 45 % (3 MB)
31 00:38:29.085569 progress 50 % (3 MB)
32 00:38:29.089239 progress 55 % (4 MB)
33 00:38:29.092565 progress 60 % (4 MB)
34 00:38:29.095116 progress 65 % (5 MB)
35 00:38:29.097220 progress 70 % (5 MB)
36 00:38:29.099459 progress 75 % (5 MB)
37 00:38:29.101769 progress 80 % (6 MB)
38 00:38:29.103963 progress 85 % (6 MB)
39 00:38:29.106042 progress 90 % (7 MB)
40 00:38:29.108397 progress 95 % (7 MB)
41 00:38:29.110591 progress 100 % (7 MB)
42 00:38:29.110819 7 MB downloaded in 0.33 s (23.63 MB/s)
43 00:38:29.111018 end: 1.1.1 http-download (duration 00:00:00) [common]
45 00:38:29.111310 end: 1.1 download-retry (duration 00:00:00) [common]
46 00:38:29.111427 start: 1.2 download-retry (timeout 00:10:00) [common]
47 00:38:29.111542 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 00:38:29.111682 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-168-g96fd74998d4ca/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 00:38:29.111753 saving as /var/lib/lava/dispatcher/tmp/14173524/tftp-deploy-e3uml72i/kernel/Image
50 00:38:29.111816 total size: 54682112 (52 MB)
51 00:38:29.111879 No compression specified
52 00:38:29.113039 progress 0 % (0 MB)
53 00:38:29.127146 progress 5 % (2 MB)
54 00:38:29.141358 progress 10 % (5 MB)
55 00:38:29.155650 progress 15 % (7 MB)
56 00:38:29.170585 progress 20 % (10 MB)
57 00:38:29.185295 progress 25 % (13 MB)
58 00:38:29.199197 progress 30 % (15 MB)
59 00:38:29.213362 progress 35 % (18 MB)
60 00:38:29.227267 progress 40 % (20 MB)
61 00:38:29.241198 progress 45 % (23 MB)
62 00:38:29.255305 progress 50 % (26 MB)
63 00:38:29.269329 progress 55 % (28 MB)
64 00:38:29.283373 progress 60 % (31 MB)
65 00:38:29.297234 progress 65 % (33 MB)
66 00:38:29.311441 progress 70 % (36 MB)
67 00:38:29.325254 progress 75 % (39 MB)
68 00:38:29.339226 progress 80 % (41 MB)
69 00:38:29.353014 progress 85 % (44 MB)
70 00:38:29.366874 progress 90 % (46 MB)
71 00:38:29.381084 progress 95 % (49 MB)
72 00:38:29.394833 progress 100 % (52 MB)
73 00:38:29.395103 52 MB downloaded in 0.28 s (184.09 MB/s)
74 00:38:29.395268 end: 1.2.1 http-download (duration 00:00:00) [common]
76 00:38:29.395534 end: 1.2 download-retry (duration 00:00:00) [common]
77 00:38:29.395623 start: 1.3 download-retry (timeout 00:09:59) [common]
78 00:38:29.395709 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 00:38:29.395836 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-168-g96fd74998d4ca/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 00:38:29.395909 saving as /var/lib/lava/dispatcher/tmp/14173524/tftp-deploy-e3uml72i/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 00:38:29.395973 total size: 57695 (0 MB)
82 00:38:29.396036 No compression specified
83 00:38:29.397191 progress 56 % (0 MB)
84 00:38:29.397489 progress 100 % (0 MB)
85 00:38:29.397697 0 MB downloaded in 0.00 s (31.97 MB/s)
86 00:38:29.397828 end: 1.3.1 http-download (duration 00:00:00) [common]
88 00:38:29.398078 end: 1.3 download-retry (duration 00:00:00) [common]
89 00:38:29.398167 start: 1.4 download-retry (timeout 00:09:59) [common]
90 00:38:29.398252 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 00:38:29.398373 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-168-g96fd74998d4ca/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 00:38:29.398443 saving as /var/lib/lava/dispatcher/tmp/14173524/tftp-deploy-e3uml72i/modules/modules.tar
93 00:38:29.398507 total size: 8605984 (8 MB)
94 00:38:29.398573 Using unxz to decompress xz
95 00:38:29.402921 progress 0 % (0 MB)
96 00:38:29.422230 progress 5 % (0 MB)
97 00:38:29.451544 progress 10 % (0 MB)
98 00:38:29.484597 progress 15 % (1 MB)
99 00:38:29.510810 progress 20 % (1 MB)
100 00:38:29.536927 progress 25 % (2 MB)
101 00:38:29.563252 progress 30 % (2 MB)
102 00:38:29.589681 progress 35 % (2 MB)
103 00:38:29.618391 progress 40 % (3 MB)
104 00:38:29.643366 progress 45 % (3 MB)
105 00:38:29.669116 progress 50 % (4 MB)
106 00:38:29.694918 progress 55 % (4 MB)
107 00:38:29.721427 progress 60 % (4 MB)
108 00:38:29.746960 progress 65 % (5 MB)
109 00:38:29.774521 progress 70 % (5 MB)
110 00:38:29.800144 progress 75 % (6 MB)
111 00:38:29.829569 progress 80 % (6 MB)
112 00:38:29.855765 progress 85 % (7 MB)
113 00:38:29.883149 progress 90 % (7 MB)
114 00:38:29.909820 progress 95 % (7 MB)
115 00:38:29.936651 progress 100 % (8 MB)
116 00:38:29.942436 8 MB downloaded in 0.54 s (15.09 MB/s)
117 00:38:29.942796 end: 1.4.1 http-download (duration 00:00:01) [common]
119 00:38:29.943222 end: 1.4 download-retry (duration 00:00:01) [common]
120 00:38:29.943364 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 00:38:29.943507 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 00:38:29.943636 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 00:38:29.943770 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 00:38:29.944062 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5
125 00:38:29.944254 makedir: /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin
126 00:38:29.944408 makedir: /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/tests
127 00:38:29.944561 makedir: /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/results
128 00:38:29.944727 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-add-keys
129 00:38:29.944941 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-add-sources
130 00:38:29.945136 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-background-process-start
131 00:38:29.945345 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-background-process-stop
132 00:38:29.945539 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-common-functions
133 00:38:29.945727 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-echo-ipv4
134 00:38:29.945921 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-install-packages
135 00:38:29.946117 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-installed-packages
136 00:38:29.946305 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-os-build
137 00:38:29.946495 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-probe-channel
138 00:38:29.946687 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-probe-ip
139 00:38:29.946875 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-target-ip
140 00:38:29.947066 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-target-mac
141 00:38:29.947255 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-target-storage
142 00:38:29.947445 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-test-case
143 00:38:29.947635 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-test-event
144 00:38:29.947827 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-test-feedback
145 00:38:29.948020 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-test-raise
146 00:38:29.948211 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-test-reference
147 00:38:29.948398 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-test-runner
148 00:38:29.948586 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-test-set
149 00:38:29.948776 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-test-shell
150 00:38:29.948972 Updating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-install-packages (oe)
151 00:38:29.949201 Updating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/bin/lava-installed-packages (oe)
152 00:38:29.949396 Creating /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/environment
153 00:38:29.949555 LAVA metadata
154 00:38:29.949673 - LAVA_JOB_ID=14173524
155 00:38:29.949781 - LAVA_DISPATCHER_IP=192.168.201.1
156 00:38:29.949949 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 00:38:29.950063 skipped lava-vland-overlay
158 00:38:29.950189 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 00:38:29.950325 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 00:38:29.950432 skipped lava-multinode-overlay
161 00:38:29.950552 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 00:38:29.950690 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 00:38:29.950815 Loading test definitions
164 00:38:29.950967 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 00:38:29.951092 Using /lava-14173524 at stage 0
166 00:38:29.951591 uuid=14173524_1.5.2.3.1 testdef=None
167 00:38:29.951731 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 00:38:29.951866 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 00:38:29.952705 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 00:38:29.953082 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 00:38:29.954079 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 00:38:29.954465 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 00:38:29.955401 runner path: /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/0/tests/0_dmesg test_uuid 14173524_1.5.2.3.1
176 00:38:29.955632 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 00:38:29.955979 Creating lava-test-runner.conf files
179 00:38:29.956083 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14173524/lava-overlay-k3wdfni5/lava-14173524/0 for stage 0
180 00:38:29.956223 - 0_dmesg
181 00:38:29.956374 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 00:38:29.956514 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 00:38:29.966988 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 00:38:29.967188 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 00:38:29.967334 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 00:38:29.967475 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 00:38:29.967611 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 00:38:30.218272 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
189 00:38:30.218761 start: 1.5.4 extract-modules (timeout 00:09:59) [common]
190 00:38:30.218925 extracting modules file /var/lib/lava/dispatcher/tmp/14173524/tftp-deploy-e3uml72i/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14173524/extract-overlay-ramdisk-kn2bioji/ramdisk
191 00:38:30.453918 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 00:38:30.454103 start: 1.5.5 apply-overlay-tftp (timeout 00:09:58) [common]
193 00:38:30.454206 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14173524/compress-overlay-vxuz33ui/overlay-1.5.2.4.tar.gz to ramdisk
194 00:38:30.454281 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14173524/compress-overlay-vxuz33ui/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14173524/extract-overlay-ramdisk-kn2bioji/ramdisk
195 00:38:30.461241 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 00:38:30.461418 start: 1.5.6 configure-preseed-file (timeout 00:09:58) [common]
197 00:38:30.461516 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 00:38:30.461612 start: 1.5.7 compress-ramdisk (timeout 00:09:58) [common]
199 00:38:30.461702 Building ramdisk /var/lib/lava/dispatcher/tmp/14173524/extract-overlay-ramdisk-kn2bioji/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14173524/extract-overlay-ramdisk-kn2bioji/ramdisk
200 00:38:30.866472 >> 145130 blocks
201 00:38:33.245218 rename /var/lib/lava/dispatcher/tmp/14173524/extract-overlay-ramdisk-kn2bioji/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14173524/tftp-deploy-e3uml72i/ramdisk/ramdisk.cpio.gz
202 00:38:33.245782 end: 1.5.7 compress-ramdisk (duration 00:00:03) [common]
203 00:38:33.245965 start: 1.5.8 prepare-kernel (timeout 00:09:56) [common]
204 00:38:33.246108 start: 1.5.8.1 prepare-fit (timeout 00:09:56) [common]
205 00:38:33.246269 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14173524/tftp-deploy-e3uml72i/kernel/Image']
206 00:38:47.805661 Returned 0 in 14 seconds
207 00:38:47.906293 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14173524/tftp-deploy-e3uml72i/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14173524/tftp-deploy-e3uml72i/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14173524/tftp-deploy-e3uml72i/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14173524/tftp-deploy-e3uml72i/kernel/image.itb
208 00:38:48.316876 output: FIT description: Kernel Image image with one or more FDT blobs
209 00:38:48.317246 output: Created: Wed Jun 5 01:38:48 2024
210 00:38:48.317363 output: Image 0 (kernel-1)
211 00:38:48.317429 output: Description:
212 00:38:48.317490 output: Created: Wed Jun 5 01:38:48 2024
213 00:38:48.317552 output: Type: Kernel Image
214 00:38:48.317615 output: Compression: lzma compressed
215 00:38:48.317676 output: Data Size: 13059919 Bytes = 12753.83 KiB = 12.45 MiB
216 00:38:48.317740 output: Architecture: AArch64
217 00:38:48.317801 output: OS: Linux
218 00:38:48.317863 output: Load Address: 0x00000000
219 00:38:48.317925 output: Entry Point: 0x00000000
220 00:38:48.317981 output: Hash algo: crc32
221 00:38:48.318039 output: Hash value: 4c96ec19
222 00:38:48.318097 output: Image 1 (fdt-1)
223 00:38:48.318154 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 00:38:48.318210 output: Created: Wed Jun 5 01:38:48 2024
225 00:38:48.318266 output: Type: Flat Device Tree
226 00:38:48.318320 output: Compression: uncompressed
227 00:38:48.318375 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 00:38:48.318428 output: Architecture: AArch64
229 00:38:48.318482 output: Hash algo: crc32
230 00:38:48.318535 output: Hash value: a9713552
231 00:38:48.318589 output: Image 2 (ramdisk-1)
232 00:38:48.318642 output: Description: unavailable
233 00:38:48.318696 output: Created: Wed Jun 5 01:38:48 2024
234 00:38:48.318750 output: Type: RAMDisk Image
235 00:38:48.318803 output: Compression: Unknown Compression
236 00:38:48.318857 output: Data Size: 21346514 Bytes = 20846.21 KiB = 20.36 MiB
237 00:38:48.318911 output: Architecture: AArch64
238 00:38:48.318964 output: OS: Linux
239 00:38:48.319017 output: Load Address: unavailable
240 00:38:48.319071 output: Entry Point: unavailable
241 00:38:48.319124 output: Hash algo: crc32
242 00:38:48.319177 output: Hash value: 9839a6a7
243 00:38:48.319230 output: Default Configuration: 'conf-1'
244 00:38:48.319283 output: Configuration 0 (conf-1)
245 00:38:48.319335 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 00:38:48.319389 output: Kernel: kernel-1
247 00:38:48.319442 output: Init Ramdisk: ramdisk-1
248 00:38:48.319495 output: FDT: fdt-1
249 00:38:48.319548 output: Loadables: kernel-1
250 00:38:48.319601 output:
251 00:38:48.319805 end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
252 00:38:48.319906 end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
253 00:38:48.320011 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
254 00:38:48.320105 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:40) [common]
255 00:38:48.320181 No LXC device requested
256 00:38:48.320260 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 00:38:48.320362 start: 1.7 deploy-device-env (timeout 00:09:40) [common]
258 00:38:48.320455 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 00:38:48.320522 Checking files for TFTP limit of 4294967296 bytes.
260 00:38:48.321022 end: 1 tftp-deploy (duration 00:00:20) [common]
261 00:38:48.321128 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 00:38:48.321224 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 00:38:48.321397 substitutions:
264 00:38:48.321467 - {DTB}: 14173524/tftp-deploy-e3uml72i/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 00:38:48.321533 - {INITRD}: 14173524/tftp-deploy-e3uml72i/ramdisk/ramdisk.cpio.gz
266 00:38:48.321595 - {KERNEL}: 14173524/tftp-deploy-e3uml72i/kernel/Image
267 00:38:48.321654 - {LAVA_MAC}: None
268 00:38:48.321712 - {PRESEED_CONFIG}: None
269 00:38:48.321770 - {PRESEED_LOCAL}: None
270 00:38:48.321826 - {RAMDISK}: 14173524/tftp-deploy-e3uml72i/ramdisk/ramdisk.cpio.gz
271 00:38:48.321883 - {ROOT_PART}: None
272 00:38:48.321939 - {ROOT}: None
273 00:38:48.321994 - {SERVER_IP}: 192.168.201.1
274 00:38:48.322049 - {TEE}: None
275 00:38:48.322104 Parsed boot commands:
276 00:38:48.322161 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 00:38:48.322423 Parsed boot commands: tftpboot 192.168.201.1 14173524/tftp-deploy-e3uml72i/kernel/image.itb 14173524/tftp-deploy-e3uml72i/kernel/cmdline
278 00:38:48.322518 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 00:38:48.322606 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 00:38:48.322700 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 00:38:48.322790 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 00:38:48.322865 Not connected, no need to disconnect.
283 00:38:48.322940 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 00:38:48.323023 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 00:38:48.323091 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
286 00:38:48.326983 Setting prompt string to ['lava-test: # ']
287 00:38:48.327384 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 00:38:48.327496 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 00:38:48.327597 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 00:38:48.327692 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 00:38:48.328030 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-3']
292 00:39:11.021814 Returned 0 in 22 seconds
293 00:39:11.123100 end: 2.2.2.1 pdu-reboot (duration 00:00:23) [common]
295 00:39:11.124473 end: 2.2.2 reset-device (duration 00:00:23) [common]
296 00:39:11.124977 start: 2.2.3 depthcharge-start (timeout 00:04:37) [common]
297 00:39:11.125476 Setting prompt string to 'Starting depthcharge on Juniper...'
298 00:39:11.125897 Changing prompt to 'Starting depthcharge on Juniper...'
299 00:39:11.126261 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 00:39:11.128103 [Enter `^Ec?' for help]
301 00:39:11.128617 [DL] 00000000 00000000 010701
302 00:39:11.128972
303 00:39:11.129328
304 00:39:11.129648 F0: 102B 0000
305 00:39:11.129960
306 00:39:11.130265 F3: 1006 0033 [0200]
307 00:39:11.130578
308 00:39:11.130883 F3: 4001 00E0 [0200]
309 00:39:11.131184
310 00:39:11.131486 F3: 0000 0000
311 00:39:11.131843
312 00:39:11.132130 V0: 0000 0000 [0001]
313 00:39:11.132415
314 00:39:11.132696 00: 1027 0002
315 00:39:11.132999
316 00:39:11.133300 01: 0000 0000
317 00:39:11.133603
318 00:39:11.133886 BP: 0C00 0251 [0000]
319 00:39:11.134236
320 00:39:11.134646 G0: 1182 0000
321 00:39:11.135123
322 00:39:11.135564 EC: 0004 0000 [0001]
323 00:39:11.135872
324 00:39:11.136161 S7: 0000 0000 [0000]
325 00:39:11.136448
326 00:39:11.136732 CC: 0000 0000 [0001]
327 00:39:11.137016
328 00:39:11.137335 T0: 0000 00DB [000F]
329 00:39:11.137629
330 00:39:11.137907 Jump to BL
331 00:39:11.138314
332 00:39:11.138780
333 00:39:11.139089
334 00:39:11.139381 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 00:39:11.139702 ARM64: Exception handlers installed.
336 00:39:11.139994 ARM64: Testing exception
337 00:39:11.140280 ARM64: Done test exception
338 00:39:11.140564 WDT: Last reset was cold boot
339 00:39:11.140845 SPI0(PAD0) initialized at 992727 Hz
340 00:39:11.141129 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 00:39:11.141464 Manufacturer: ef
342 00:39:11.141787 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 00:39:11.142085 Probing TPM: . done!
344 00:39:11.142416 TPM ready after 0 ms
345 00:39:11.142715 Connected to device vid:did:rid of 1ae0:0028:00
346 00:39:11.143004 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
347 00:39:11.143291 Initialized TPM device CR50 revision 0
348 00:39:11.143578 tlcl_send_startup: Startup return code is 0
349 00:39:11.143861 TPM: setup succeeded
350 00:39:11.144142 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 00:39:11.144424 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 00:39:11.144706 in-header: 03 19 00 00 08 00 00 00
353 00:39:11.144987 in-data: a2 e0 47 00 13 00 00 00
354 00:39:11.145298 Chrome EC: UHEPI supported
355 00:39:11.145591 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 00:39:11.145878 in-header: 03 a1 00 00 08 00 00 00
357 00:39:11.146160 in-data: 84 60 60 10 00 00 00 00
358 00:39:11.146478 Phase 1
359 00:39:11.146777 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 00:39:11.147066 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 00:39:11.147348 VB2:vb2_check_recovery() Recovery was requested manually
362 00:39:11.147634 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 00:39:11.147919 Recovery requested (1009000e)
364 00:39:11.148198 tlcl_extend: response is 0
365 00:39:11.148475 tlcl_extend: response is 0
366 00:39:11.148755
367 00:39:11.149030
368 00:39:11.149347 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 00:39:11.149642 ARM64: Exception handlers installed.
370 00:39:11.149924 ARM64: Testing exception
371 00:39:11.150216 ARM64: Done test exception
372 00:39:11.150465 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x2020
373 00:39:11.150666 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 00:39:11.150867 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 00:39:11.151068 [RTC]rtc_get_frequency_meter,134: input=0xf, output=860
376 00:39:11.151268 [RTC]rtc_get_frequency_meter,134: input=0x7, output=731
377 00:39:11.151468 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
378 00:39:11.151669 [RTC]rtc_get_frequency_meter,134: input=0x9, output=765
379 00:39:11.151870 [RTC]rtc_get_frequency_meter,134: input=0xa, output=783
380 00:39:11.152070 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
381 00:39:11.152272 [RTC]rtc_get_frequency_meter,134: input=0xb, output=800
382 00:39:11.152472 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b
383 00:39:11.152672 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
384 00:39:11.152874 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
385 00:39:11.153073 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
386 00:39:11.153292 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
387 00:39:11.153500 in-header: 03 19 00 00 08 00 00 00
388 00:39:11.153705 in-data: a2 e0 47 00 13 00 00 00
389 00:39:11.153903 Chrome EC: UHEPI supported
390 00:39:11.154104 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
391 00:39:11.154306 in-header: 03 a1 00 00 08 00 00 00
392 00:39:11.154505 in-data: 84 60 60 10 00 00 00 00
393 00:39:11.154704 Skip loading cached calibration data
394 00:39:11.154906 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
395 00:39:11.155109 in-header: 03 a1 00 00 08 00 00 00
396 00:39:11.155384 in-data: 84 60 60 10 00 00 00 00
397 00:39:11.155563 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
398 00:39:11.155719 in-header: 03 a1 00 00 08 00 00 00
399 00:39:11.155873 in-data: 84 60 60 10 00 00 00 00
400 00:39:11.156024 ADC[3]: Raw value=1037476 ID=8
401 00:39:11.156208 Manufacturer: ef
402 00:39:11.156364 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
403 00:39:11.156518 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
404 00:39:11.156672 CBFS @ 21000 size 3d4000
405 00:39:11.156823 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
406 00:39:11.156976 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
407 00:39:11.157129 CBFS: Found @ offset 3c880 size 4b
408 00:39:11.157302 DRAM-K: Full Calibration
409 00:39:11.157460 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
410 00:39:11.157613 CBFS @ 21000 size 3d4000
411 00:39:11.157763 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
412 00:39:11.157914 CBFS: Locating 'fallback/dram'
413 00:39:11.158066 CBFS: Found @ offset 24b00 size 12268
414 00:39:11.158218 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
415 00:39:11.158370 ddr_geometry: 1, config: 0x0
416 00:39:11.158523 header.status = 0x0
417 00:39:11.158713 header.magic = 0x44524d4b (expected: 0x44524d4b)
418 00:39:11.158906 header.version = 0x5 (expected: 0x5)
419 00:39:11.159321 header.size = 0x8f0 (expected: 0x8f0)
420 00:39:11.159498 header.config = 0x0
421 00:39:11.159690 header.flags = 0x0
422 00:39:11.159846 header.checksum = 0x0
423 00:39:11.160000 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
424 00:39:11.160158 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
425 00:39:11.160323 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
426 00:39:11.160445 ddr_geometry:1
427 00:39:11.160565 [EMI] new MDL number = 1
428 00:39:11.160687 dram_cbt_mode_extern: 0
429 00:39:11.160808 dram_cbt_mode [RK0]: 0, [RK1]: 0
430 00:39:11.160930 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
431 00:39:11.161052
432 00:39:11.161171
433 00:39:11.161312 [Bianco] ETT version 0.0.0.1
434 00:39:11.161437 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
435 00:39:11.161559
436 00:39:11.161680 vSetVcoreByFreq with vcore:762500, freq=1600
437 00:39:11.161805
438 00:39:11.161924 [DramcInit]
439 00:39:11.162046 AutoRefreshCKEOff AutoREF OFF
440 00:39:11.162167 DDRPhyPLLSetting-CKEOFF
441 00:39:11.162301 DDRPhyPLLSetting-CKEON
442 00:39:11.162473
443 00:39:11.162599 Enable WDQS
444 00:39:11.162721 [ModeRegInit_LP4] CH0 RK0
445 00:39:11.162843 Write Rank0 MR13 =0x18
446 00:39:11.162964 Write Rank0 MR12 =0x5d
447 00:39:11.163085 Write Rank0 MR1 =0x56
448 00:39:11.163205 Write Rank0 MR2 =0x1a
449 00:39:11.163327 Write Rank0 MR11 =0x0
450 00:39:11.163448 Write Rank0 MR22 =0x38
451 00:39:11.163569 Write Rank0 MR14 =0x5d
452 00:39:11.163690 Write Rank0 MR3 =0x30
453 00:39:11.163811 Write Rank0 MR13 =0x58
454 00:39:11.163931 Write Rank0 MR12 =0x5d
455 00:39:11.164049 Write Rank0 MR1 =0x56
456 00:39:11.164169 Write Rank0 MR2 =0x2d
457 00:39:11.164289 Write Rank0 MR11 =0x23
458 00:39:11.164408 Write Rank0 MR22 =0x34
459 00:39:11.164529 Write Rank0 MR14 =0x10
460 00:39:11.164649 Write Rank0 MR3 =0x30
461 00:39:11.164770 Write Rank0 MR13 =0xd8
462 00:39:11.164890 [ModeRegInit_LP4] CH0 RK1
463 00:39:11.165009 Write Rank1 MR13 =0x18
464 00:39:11.165130 Write Rank1 MR12 =0x5d
465 00:39:11.165250 Write Rank1 MR1 =0x56
466 00:39:11.165387 Write Rank1 MR2 =0x1a
467 00:39:11.165488 Write Rank1 MR11 =0x0
468 00:39:11.165589 Write Rank1 MR22 =0x38
469 00:39:11.165718 Write Rank1 MR14 =0x5d
470 00:39:11.165830 Write Rank1 MR3 =0x30
471 00:39:11.165932 Write Rank1 MR13 =0x58
472 00:39:11.166033 Write Rank1 MR12 =0x5d
473 00:39:11.166133 Write Rank1 MR1 =0x56
474 00:39:11.166233 Write Rank1 MR2 =0x2d
475 00:39:11.166334 Write Rank1 MR11 =0x23
476 00:39:11.166434 Write Rank1 MR22 =0x34
477 00:39:11.166536 Write Rank1 MR14 =0x10
478 00:39:11.166636 Write Rank1 MR3 =0x30
479 00:39:11.166736 Write Rank1 MR13 =0xd8
480 00:39:11.166837 [ModeRegInit_LP4] CH1 RK0
481 00:39:11.166938 Write Rank0 MR13 =0x18
482 00:39:11.167037 Write Rank0 MR12 =0x5d
483 00:39:11.167138 Write Rank0 MR1 =0x56
484 00:39:11.167239 Write Rank0 MR2 =0x1a
485 00:39:11.167339 Write Rank0 MR11 =0x0
486 00:39:11.167438 Write Rank0 MR22 =0x38
487 00:39:11.167538 Write Rank0 MR14 =0x5d
488 00:39:11.167638 Write Rank0 MR3 =0x30
489 00:39:11.167737 Write Rank0 MR13 =0x58
490 00:39:11.167836 Write Rank0 MR12 =0x5d
491 00:39:11.167936 Write Rank0 MR1 =0x56
492 00:39:11.168036 Write Rank0 MR2 =0x2d
493 00:39:11.168135 Write Rank0 MR11 =0x23
494 00:39:11.168235 Write Rank0 MR22 =0x34
495 00:39:11.168334 Write Rank0 MR14 =0x10
496 00:39:11.168435 Write Rank0 MR3 =0x30
497 00:39:11.168534 Write Rank0 MR13 =0xd8
498 00:39:11.168635 [ModeRegInit_LP4] CH1 RK1
499 00:39:11.168737 Write Rank1 MR13 =0x18
500 00:39:11.168849 Write Rank1 MR12 =0x5d
501 00:39:11.168990 Write Rank1 MR1 =0x56
502 00:39:11.169094 Write Rank1 MR2 =0x1a
503 00:39:11.169197 Write Rank1 MR11 =0x0
504 00:39:11.169307 Write Rank1 MR22 =0x38
505 00:39:11.169409 Write Rank1 MR14 =0x5d
506 00:39:11.169510 Write Rank1 MR3 =0x30
507 00:39:11.169611 Write Rank1 MR13 =0x58
508 00:39:11.169710 Write Rank1 MR12 =0x5d
509 00:39:11.169810 Write Rank1 MR1 =0x56
510 00:39:11.169910 Write Rank1 MR2 =0x2d
511 00:39:11.170010 Write Rank1 MR11 =0x23
512 00:39:11.170110 Write Rank1 MR22 =0x34
513 00:39:11.170211 Write Rank1 MR14 =0x10
514 00:39:11.170326 Write Rank1 MR3 =0x30
515 00:39:11.170411 Write Rank1 MR13 =0xd8
516 00:39:11.170497 match AC timing 3
517 00:39:11.170584 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
518 00:39:11.170672 [MiockJmeterHQA]
519 00:39:11.170759 vSetVcoreByFreq with vcore:762500, freq=1600
520 00:39:11.170846
521 00:39:11.170932 MIOCK jitter meter ch=0
522 00:39:11.171018
523 00:39:11.171104 1T = (100-18) = 82 dly cells
524 00:39:11.171193 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
525 00:39:11.171280 vSetVcoreByFreq with vcore:725000, freq=1200
526 00:39:11.171368
527 00:39:11.171453 MIOCK jitter meter ch=0
528 00:39:11.171539
529 00:39:11.171625 1T = (95-17) = 78 dly cells
530 00:39:11.171713 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
531 00:39:11.171800 vSetVcoreByFreq with vcore:725000, freq=800
532 00:39:11.171888
533 00:39:11.172015 MIOCK jitter meter ch=0
534 00:39:11.172106
535 00:39:11.172194 1T = (95-17) = 78 dly cells
536 00:39:11.172284 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
537 00:39:11.172378 vSetVcoreByFreq with vcore:762500, freq=1600
538 00:39:11.172477 vSetVcoreByFreq with vcore:762500, freq=1600
539 00:39:11.172565
540 00:39:11.172652 K DRVP
541 00:39:11.172739 1. OCD DRVP=0 CALOUT=0
542 00:39:11.172828 1. OCD DRVP=1 CALOUT=0
543 00:39:11.172917 1. OCD DRVP=2 CALOUT=0
544 00:39:11.173006 1. OCD DRVP=3 CALOUT=0
545 00:39:11.173094 1. OCD DRVP=4 CALOUT=0
546 00:39:11.173182 1. OCD DRVP=5 CALOUT=0
547 00:39:11.173283 1. OCD DRVP=6 CALOUT=0
548 00:39:11.173374 1. OCD DRVP=7 CALOUT=0
549 00:39:11.173462 1. OCD DRVP=8 CALOUT=0
550 00:39:11.173551 1. OCD DRVP=9 CALOUT=1
551 00:39:11.173638
552 00:39:11.173745 1. OCD DRVP calibration OK! DRVP=9
553 00:39:11.173835
554 00:39:11.173921
555 00:39:11.174006
556 00:39:11.174094 K ODTN
557 00:39:11.174179 3. OCD ODTN=0 ,CALOUT=1
558 00:39:11.174271 3. OCD ODTN=1 ,CALOUT=1
559 00:39:11.174360 3. OCD ODTN=2 ,CALOUT=1
560 00:39:11.174449 3. OCD ODTN=3 ,CALOUT=1
561 00:39:11.174536 3. OCD ODTN=4 ,CALOUT=1
562 00:39:11.174623 3. OCD ODTN=5 ,CALOUT=1
563 00:39:11.174711 3. OCD ODTN=6 ,CALOUT=1
564 00:39:11.174799 3. OCD ODTN=7 ,CALOUT=0
565 00:39:11.174887
566 00:39:11.174972 3. OCD ODTN calibration OK! ODTN=7
567 00:39:11.175060
568 00:39:11.175146 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
569 00:39:11.175233 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
570 00:39:11.175331 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
571 00:39:11.175408
572 00:39:11.175511 K DRVP
573 00:39:11.175598 1. OCD DRVP=0 CALOUT=0
574 00:39:11.175677 1. OCD DRVP=1 CALOUT=0
575 00:39:11.175755 1. OCD DRVP=2 CALOUT=0
576 00:39:11.175833 1. OCD DRVP=3 CALOUT=0
577 00:39:11.175911 1. OCD DRVP=4 CALOUT=0
578 00:39:11.175988 1. OCD DRVP=5 CALOUT=0
579 00:39:11.176064 1. OCD DRVP=6 CALOUT=0
580 00:39:11.176142 1. OCD DRVP=7 CALOUT=0
581 00:39:11.176218 1. OCD DRVP=8 CALOUT=0
582 00:39:11.176294 1. OCD DRVP=9 CALOUT=0
583 00:39:11.176579 1. OCD DRVP=10 CALOUT=1
584 00:39:11.176669
585 00:39:11.176747 1. OCD DRVP calibration OK! DRVP=10
586 00:39:11.176826
587 00:39:11.176903
588 00:39:11.176978
589 00:39:11.177054 K ODTN
590 00:39:11.177130 3. OCD ODTN=0 ,CALOUT=1
591 00:39:11.177208 3. OCD ODTN=1 ,CALOUT=1
592 00:39:11.177297 3. OCD ODTN=2 ,CALOUT=1
593 00:39:11.177376 3. OCD ODTN=3 ,CALOUT=1
594 00:39:11.177453 3. OCD ODTN=4 ,CALOUT=1
595 00:39:11.177530 3. OCD ODTN=5 ,CALOUT=1
596 00:39:11.177608 3. OCD ODTN=6 ,CALOUT=1
597 00:39:11.177685 3. OCD ODTN=7 ,CALOUT=1
598 00:39:11.177762 3. OCD ODTN=8 ,CALOUT=1
599 00:39:11.177838 3. OCD ODTN=9 ,CALOUT=1
600 00:39:11.177916 3. OCD ODTN=10 ,CALOUT=1
601 00:39:11.177993 3. OCD ODTN=11 ,CALOUT=1
602 00:39:11.178069 3. OCD ODTN=12 ,CALOUT=1
603 00:39:11.178146 3. OCD ODTN=13 ,CALOUT=1
604 00:39:11.178222 3. OCD ODTN=14 ,CALOUT=0
605 00:39:11.178300
606 00:39:11.178375 3. OCD ODTN calibration OK! ODTN=14
607 00:39:11.178457
608 00:39:11.178532 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14
609 00:39:11.178609 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14
610 00:39:11.178685 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)
611 00:39:11.178762
612 00:39:11.178837 [DramcInit]
613 00:39:11.178913 AutoRefreshCKEOff AutoREF OFF
614 00:39:11.178989 DDRPhyPLLSetting-CKEOFF
615 00:39:11.179096 DDRPhyPLLSetting-CKEON
616 00:39:11.179174
617 00:39:11.179250 Enable WDQS
618 00:39:11.179326 ==
619 00:39:11.179403 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
620 00:39:11.179479 fsp= 1, odt_onoff= 1, Byte mode= 0
621 00:39:11.179556 ==
622 00:39:11.179632 [Duty_Offset_Calibration]
623 00:39:11.179707
624 00:39:11.179782 ===========================
625 00:39:11.179859 B0:0 B1:1 CA:1
626 00:39:11.179935 ==
627 00:39:11.180010 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
628 00:39:11.180098 fsp= 1, odt_onoff= 1, Byte mode= 0
629 00:39:11.180180 ==
630 00:39:11.180256 [Duty_Offset_Calibration]
631 00:39:11.180331
632 00:39:11.180414 ===========================
633 00:39:11.180481 B0:1 B1:2 CA:0
634 00:39:11.180549 [ModeRegInit_LP4] CH0 RK0
635 00:39:11.180616 Write Rank0 MR13 =0x18
636 00:39:11.180683 Write Rank0 MR12 =0x5d
637 00:39:11.180750 Write Rank0 MR1 =0x56
638 00:39:11.180817 Write Rank0 MR2 =0x1a
639 00:39:11.180885 Write Rank0 MR11 =0x0
640 00:39:11.180952 Write Rank0 MR22 =0x38
641 00:39:11.181019 Write Rank0 MR14 =0x5d
642 00:39:11.181086 Write Rank0 MR3 =0x30
643 00:39:11.181153 Write Rank0 MR13 =0x58
644 00:39:11.181220 Write Rank0 MR12 =0x5d
645 00:39:11.181300 Write Rank0 MR1 =0x56
646 00:39:11.181369 Write Rank0 MR2 =0x2d
647 00:39:11.181436 Write Rank0 MR11 =0x23
648 00:39:11.181503 Write Rank0 MR22 =0x34
649 00:39:11.181570 Write Rank0 MR14 =0x10
650 00:39:11.181636 Write Rank0 MR3 =0x30
651 00:39:11.181703 Write Rank0 MR13 =0xd8
652 00:39:11.181770 [ModeRegInit_LP4] CH0 RK1
653 00:39:11.181837 Write Rank1 MR13 =0x18
654 00:39:11.181904 Write Rank1 MR12 =0x5d
655 00:39:11.181983 Write Rank1 MR1 =0x56
656 00:39:11.182076 Write Rank1 MR2 =0x1a
657 00:39:11.182146 Write Rank1 MR11 =0x0
658 00:39:11.182214 Write Rank1 MR22 =0x38
659 00:39:11.182282 Write Rank1 MR14 =0x5d
660 00:39:11.182350 Write Rank1 MR3 =0x30
661 00:39:11.182417 Write Rank1 MR13 =0x58
662 00:39:11.182484 Write Rank1 MR12 =0x5d
663 00:39:11.182552 Write Rank1 MR1 =0x56
664 00:39:11.182620 Write Rank1 MR2 =0x2d
665 00:39:11.182687 Write Rank1 MR11 =0x23
666 00:39:11.182754 Write Rank1 MR22 =0x34
667 00:39:11.182822 Write Rank1 MR14 =0x10
668 00:39:11.182889 Write Rank1 MR3 =0x30
669 00:39:11.182955 Write Rank1 MR13 =0xd8
670 00:39:11.183039 [ModeRegInit_LP4] CH1 RK0
671 00:39:11.183108 Write Rank0 MR13 =0x18
672 00:39:11.183176 Write Rank0 MR12 =0x5d
673 00:39:11.183243 Write Rank0 MR1 =0x56
674 00:39:11.183310 Write Rank0 MR2 =0x1a
675 00:39:11.183378 Write Rank0 MR11 =0x0
676 00:39:11.183445 Write Rank0 MR22 =0x38
677 00:39:11.183513 Write Rank0 MR14 =0x5d
678 00:39:11.183580 Write Rank0 MR3 =0x30
679 00:39:11.183647 Write Rank0 MR13 =0x58
680 00:39:11.183715 Write Rank0 MR12 =0x5d
681 00:39:11.183782 Write Rank0 MR1 =0x56
682 00:39:11.183849 Write Rank0 MR2 =0x2d
683 00:39:11.183916 Write Rank0 MR11 =0x23
684 00:39:11.183983 Write Rank0 MR22 =0x34
685 00:39:11.184050 Write Rank0 MR14 =0x10
686 00:39:11.184118 Write Rank0 MR3 =0x30
687 00:39:11.184186 Write Rank0 MR13 =0xd8
688 00:39:11.184253 [ModeRegInit_LP4] CH1 RK1
689 00:39:11.184320 Write Rank1 MR13 =0x18
690 00:39:11.184388 Write Rank1 MR12 =0x5d
691 00:39:11.184455 Write Rank1 MR1 =0x56
692 00:39:11.184521 Write Rank1 MR2 =0x1a
693 00:39:11.184589 Write Rank1 MR11 =0x0
694 00:39:11.184656 Write Rank1 MR22 =0x38
695 00:39:11.184723 Write Rank1 MR14 =0x5d
696 00:39:11.184790 Write Rank1 MR3 =0x30
697 00:39:11.184857 Write Rank1 MR13 =0x58
698 00:39:11.184925 Write Rank1 MR12 =0x5d
699 00:39:11.184993 Write Rank1 MR1 =0x56
700 00:39:11.185059 Write Rank1 MR2 =0x2d
701 00:39:11.185127 Write Rank1 MR11 =0x23
702 00:39:11.185194 Write Rank1 MR22 =0x34
703 00:39:11.185269 Write Rank1 MR14 =0x10
704 00:39:11.185380 Write Rank1 MR3 =0x30
705 00:39:11.185446 Write Rank1 MR13 =0xd8
706 00:39:11.185507 match AC timing 3
707 00:39:11.185568 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
708 00:39:11.185631 DramC Write-DBI off
709 00:39:11.185692 DramC Read-DBI off
710 00:39:11.185752 Write Rank0 MR13 =0x59
711 00:39:11.185813 ==
712 00:39:11.185875 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
713 00:39:11.185936 fsp= 1, odt_onoff= 1, Byte mode= 0
714 00:39:11.185997 ==
715 00:39:11.186058 === u2Vref_new: 0x56 --> 0x2d
716 00:39:11.186120 === u2Vref_new: 0x58 --> 0x38
717 00:39:11.186181 === u2Vref_new: 0x5a --> 0x39
718 00:39:11.186242 === u2Vref_new: 0x5c --> 0x3c
719 00:39:11.186303 === u2Vref_new: 0x5e --> 0x3d
720 00:39:11.186364 === u2Vref_new: 0x60 --> 0xa0
721 00:39:11.186425 [CA 0] Center 33 (4~63) winsize 60
722 00:39:11.186486 [CA 1] Center 34 (5~63) winsize 59
723 00:39:11.186546 [CA 2] Center 29 (1~57) winsize 57
724 00:39:11.186607 [CA 3] Center 24 (-3~51) winsize 55
725 00:39:11.186668 [CA 4] Center 25 (-2~52) winsize 55
726 00:39:11.186729 [CA 5] Center 29 (2~57) winsize 56
727 00:39:11.186790
728 00:39:11.186850 [CATrainingPosCal] consider 1 rank data
729 00:39:11.186911 u2DelayCellTimex100 = 762/100 ps
730 00:39:11.186971 CA0 delay=33 (4~63),Diff = 9 PI (11 cell)
731 00:39:11.187048 CA1 delay=34 (5~63),Diff = 10 PI (12 cell)
732 00:39:11.187111 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
733 00:39:11.187173 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
734 00:39:11.187234 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
735 00:39:11.187295 CA5 delay=29 (2~57),Diff = 5 PI (6 cell)
736 00:39:11.187356
737 00:39:11.187416 CA PerBit enable=1, Macro0, CA PI delay=24
738 00:39:11.187477 === u2Vref_new: 0x56 --> 0x2d
739 00:39:11.187539
740 00:39:11.187599 Vref(ca) range 1: 22
741 00:39:11.187659
742 00:39:11.187720 CS Dly= 10 (41-0-32)
743 00:39:11.187781 Write Rank0 MR13 =0xd8
744 00:39:11.187843 Write Rank0 MR13 =0xd8
745 00:39:11.187903 Write Rank0 MR12 =0x56
746 00:39:11.187964 Write Rank1 MR13 =0x59
747 00:39:11.188024 ==
748 00:39:11.188291 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
749 00:39:11.188360 fsp= 1, odt_onoff= 1, Byte mode= 0
750 00:39:11.188424 ==
751 00:39:11.188486 === u2Vref_new: 0x56 --> 0x2d
752 00:39:11.188547 === u2Vref_new: 0x58 --> 0x38
753 00:39:11.188608 === u2Vref_new: 0x5a --> 0x39
754 00:39:11.188669 === u2Vref_new: 0x5c --> 0x3c
755 00:39:11.188730 === u2Vref_new: 0x5e --> 0x3d
756 00:39:11.188817 === u2Vref_new: 0x60 --> 0xa0
757 00:39:11.188882 [CA 0] Center 34 (5~63) winsize 59
758 00:39:11.188944 [CA 1] Center 34 (6~63) winsize 58
759 00:39:11.189004 [CA 2] Center 29 (0~58) winsize 59
760 00:39:11.189066 [CA 3] Center 23 (-4~50) winsize 55
761 00:39:11.189126 [CA 4] Center 24 (-3~52) winsize 56
762 00:39:11.189187 [CA 5] Center 30 (1~59) winsize 59
763 00:39:11.189247
764 00:39:11.189335 [CATrainingPosCal] consider 2 rank data
765 00:39:11.189398 u2DelayCellTimex100 = 762/100 ps
766 00:39:11.189459 CA0 delay=34 (5~63),Diff = 11 PI (14 cell)
767 00:39:11.189520 CA1 delay=34 (6~63),Diff = 11 PI (14 cell)
768 00:39:11.189582 CA2 delay=29 (1~57),Diff = 6 PI (7 cell)
769 00:39:11.189644 CA3 delay=23 (-3~50),Diff = 0 PI (0 cell)
770 00:39:11.189705 CA4 delay=25 (-2~52),Diff = 2 PI (2 cell)
771 00:39:11.189766 CA5 delay=29 (2~57),Diff = 6 PI (7 cell)
772 00:39:11.189826
773 00:39:11.189902 CA PerBit enable=1, Macro0, CA PI delay=23
774 00:39:11.189965 === u2Vref_new: 0x56 --> 0x2d
775 00:39:11.190027
776 00:39:11.190087 Vref(ca) range 1: 22
777 00:39:11.190148
778 00:39:11.190209 CS Dly= 11 (42-0-32)
779 00:39:11.190270 Write Rank1 MR13 =0xd8
780 00:39:11.190342 Write Rank1 MR13 =0xd8
781 00:39:11.190397 Write Rank1 MR12 =0x56
782 00:39:11.190452 [RankSwap] Rank num 2, (Multi 1), Rank 0
783 00:39:11.190507 Write Rank0 MR2 =0xad
784 00:39:11.190562 [Write Leveling]
785 00:39:11.190618 delay byte0 byte1 byte2 byte3
786 00:39:11.190674
787 00:39:11.190729 10 0 0
788 00:39:11.190785 11 0 0
789 00:39:11.190841 12 0 0
790 00:39:11.190898 13 0 0
791 00:39:11.190954 14 0 0
792 00:39:11.191010 15 0 0
793 00:39:11.191065 16 0 0
794 00:39:11.191122 17 0 0
795 00:39:11.191177 18 0 0
796 00:39:11.191233 19 0 0
797 00:39:11.191289 20 0 0
798 00:39:11.191345 21 0 0
799 00:39:11.191401 22 0 0
800 00:39:11.191457 23 0 0
801 00:39:11.191513 24 0 0
802 00:39:11.191568 25 0 ff
803 00:39:11.191623 26 0 ff
804 00:39:11.191679 27 0 ff
805 00:39:11.191735 28 0 ff
806 00:39:11.191790 29 0 ff
807 00:39:11.191846 30 0 ff
808 00:39:11.191902 31 0 ff
809 00:39:11.191958 32 0 ff
810 00:39:11.192014 33 ff ff
811 00:39:11.192071 34 ff ff
812 00:39:11.192127 35 ff ff
813 00:39:11.192182 36 ff ff
814 00:39:11.192239 37 ff ff
815 00:39:11.192295 38 ff ff
816 00:39:11.192358 39 ff ff
817 00:39:11.192436 pass bytecount = 0xff (0xff: all bytes pass)
818 00:39:11.192494
819 00:39:11.192550 DQS0 dly: 33
820 00:39:11.192605 DQS1 dly: 25
821 00:39:11.192660 Write Rank0 MR2 =0x2d
822 00:39:11.192716 [RankSwap] Rank num 2, (Multi 1), Rank 0
823 00:39:11.192771 Write Rank0 MR1 =0xd6
824 00:39:11.192827 [Gating]
825 00:39:11.192882 ==
826 00:39:11.192938 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
827 00:39:11.192994 fsp= 1, odt_onoff= 1, Byte mode= 0
828 00:39:11.193050 ==
829 00:39:11.193105 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
830 00:39:11.193162 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
831 00:39:11.193219 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
832 00:39:11.193284 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
833 00:39:11.193342 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
834 00:39:11.193399 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
835 00:39:11.193456 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
836 00:39:11.193513 3 1 28 |2c2c 2c2b |(11 10)(11 11) |(0 0)(1 0)| 0
837 00:39:11.193570 3 2 0 |201f 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
838 00:39:11.193627 3 2 4 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
839 00:39:11.193684 3 2 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
840 00:39:11.193741 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
841 00:39:11.193798 3 2 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
842 00:39:11.193854 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
843 00:39:11.193911 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
844 00:39:11.193968 3 2 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
845 00:39:11.194024 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
846 00:39:11.194081 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
847 00:39:11.194137 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
848 00:39:11.194195 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
849 00:39:11.194252 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
850 00:39:11.194308 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
851 00:39:11.194364 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
852 00:39:11.194421 3 3 28 |807 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
853 00:39:11.194477 3 4 0 |201 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
854 00:39:11.194534 3 4 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
855 00:39:11.194591 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
856 00:39:11.194647 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
857 00:39:11.194704 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
858 00:39:11.194761 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 00:39:11.194818 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 00:39:11.194874 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 00:39:11.194931 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 00:39:11.194987 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 00:39:11.195044 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 00:39:11.195101 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 00:39:11.195157 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 00:39:11.195213 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 00:39:11.195270 [Byte 0] Lead/lag falling Transition (3, 5, 20)
868 00:39:11.195338 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
869 00:39:11.195393 [Byte 0] Lead/lag Transition tap number (2)
870 00:39:11.195447 [Byte 1] Lead/lag falling Transition (3, 5, 24)
871 00:39:11.195502 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
872 00:39:11.195761 [Byte 1] Lead/lag Transition tap number (2)
873 00:39:11.195827 3 6 0 |404 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
874 00:39:11.195885 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
875 00:39:11.195942 [Byte 0]First pass (3, 6, 4)
876 00:39:11.195997 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
877 00:39:11.196054 [Byte 1]First pass (3, 6, 8)
878 00:39:11.196109 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
879 00:39:11.196164 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 00:39:11.196220 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 00:39:11.196276 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 00:39:11.196331 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 00:39:11.196387 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 00:39:11.196442 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 00:39:11.196497 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 00:39:11.196556 All bytes gating window > 1UI, Early break!
887 00:39:11.196610
888 00:39:11.196665 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)
889 00:39:11.196719
890 00:39:11.196772 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
891 00:39:11.196826
892 00:39:11.196879
893 00:39:11.196932
894 00:39:11.196986 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
895 00:39:11.197040
896 00:39:11.197093 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
897 00:39:11.197146
898 00:39:11.197200
899 00:39:11.197253 Write Rank0 MR1 =0x56
900 00:39:11.197350
901 00:39:11.197403 best RODT dly(2T, 0.5T) = (2, 2)
902 00:39:11.197457
903 00:39:11.197511 best RODT dly(2T, 0.5T) = (2, 2)
904 00:39:11.197565 ==
905 00:39:11.197619 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
906 00:39:11.197674 fsp= 1, odt_onoff= 1, Byte mode= 0
907 00:39:11.197728 ==
908 00:39:11.197782 Start DQ dly to find pass range UseTestEngine =0
909 00:39:11.197837 x-axis: bit #, y-axis: DQ dly (-127~63)
910 00:39:11.197891 RX Vref Scan = 0
911 00:39:11.197945 -26, [0] xxxxxxxx xxxxxxxx [MSB]
912 00:39:11.198001 -25, [0] xxxxxxxx xxxxxxxx [MSB]
913 00:39:11.198057 -24, [0] xxxxxxxx xxxxxxxx [MSB]
914 00:39:11.198113 -23, [0] xxxxxxxx xxxxxxxx [MSB]
915 00:39:11.198168 -22, [0] xxxxxxxx xxxxxxxx [MSB]
916 00:39:11.198224 -21, [0] xxxxxxxx xxxxxxxx [MSB]
917 00:39:11.198279 -20, [0] xxxxxxxx xxxxxxxx [MSB]
918 00:39:11.198334 -19, [0] xxxxxxxx xxxxxxxx [MSB]
919 00:39:11.198389 -18, [0] xxxxxxxx xxxxxxxx [MSB]
920 00:39:11.198444 -17, [0] xxxxxxxx xxxxxxxx [MSB]
921 00:39:11.198499 -16, [0] xxxxxxxx xxxxxxxx [MSB]
922 00:39:11.198554 -15, [0] xxxxxxxx xxxxxxxx [MSB]
923 00:39:11.198609 -14, [0] xxxxxxxx xxxxxxxx [MSB]
924 00:39:11.198664 -13, [0] xxxxxxxx xxxxxxxx [MSB]
925 00:39:11.198719 -12, [0] xxxxxxxx xxxxxxxx [MSB]
926 00:39:11.198774 -11, [0] xxxxxxxx xxxxxxxx [MSB]
927 00:39:11.198829 -10, [0] xxxxxxxx xxxxxxxx [MSB]
928 00:39:11.198888 -9, [0] xxxxxxxx xxxxxxxx [MSB]
929 00:39:11.198983 -8, [0] xxxxxxxx xxxxxxxx [MSB]
930 00:39:11.199071 -7, [0] xxxxxxxx xxxxxxxx [MSB]
931 00:39:11.199156 -6, [0] xxxxxxxx xxxxxxxx [MSB]
932 00:39:11.199214 -5, [0] xxxxxxxx xxxxxxxx [MSB]
933 00:39:11.199270 -4, [0] xxxxxxxx xxxxxxxx [MSB]
934 00:39:11.199325 -3, [0] xxxxxxxx xxxxxxxx [MSB]
935 00:39:11.199380 -2, [0] xxxxxxxx xxxxxxxx [MSB]
936 00:39:11.199436 -1, [0] xxxxxxxx xxxxxxxx [MSB]
937 00:39:11.199492 0, [0] xxxoxoxx xxxxxxxx [MSB]
938 00:39:11.199548 1, [0] xxxoxoxx xxxoxxxx [MSB]
939 00:39:11.199604 2, [0] xxxoxoxx xxxoxxxx [MSB]
940 00:39:11.199660 3, [0] xxxoxooo oxxoxoox [MSB]
941 00:39:11.199715 4, [0] xxxoxooo ooxoxooo [MSB]
942 00:39:11.199770 5, [0] xxxoxooo ooxooooo [MSB]
943 00:39:11.199829 6, [0] xxxoxooo ooxooooo [MSB]
944 00:39:11.199885 7, [0] xooooooo ooxooooo [MSB]
945 00:39:11.199940 8, [0] xooooooo oooooooo [MSB]
946 00:39:11.199996 9, [0] xooooooo oooooooo [MSB]
947 00:39:11.200051 10, [0] xooooooo oooooooo [MSB]
948 00:39:11.200107 32, [0] oooxoooo oooooooo [MSB]
949 00:39:11.200162 33, [0] oooxoooo oooooxoo [MSB]
950 00:39:11.200217 34, [0] oooxoxxo oooooxxo [MSB]
951 00:39:11.200272 35, [0] oooxoxxx xooooxxo [MSB]
952 00:39:11.200326 36, [0] oooxoxxx xooxoxxo [MSB]
953 00:39:11.200382 37, [0] oooxoxxx xxoxxxxx [MSB]
954 00:39:11.200437 38, [0] oooxoxxx xxoxxxxx [MSB]
955 00:39:11.200492 39, [0] oooxoxxx xxoxxxxx [MSB]
956 00:39:11.200547 40, [0] oooxoxxx xxoxxxxx [MSB]
957 00:39:11.200601 41, [0] xoxxxxxx xxoxxxxx [MSB]
958 00:39:11.200657 42, [0] xxxxxxxx xxoxxxxx [MSB]
959 00:39:11.200711 43, [0] xxxxxxxx xxxxxxxx [MSB]
960 00:39:11.200766 iDelay=43, Bit 0, Center 25 (11 ~ 40) 30
961 00:39:11.200820 iDelay=43, Bit 1, Center 24 (7 ~ 41) 35
962 00:39:11.200874 iDelay=43, Bit 2, Center 23 (7 ~ 40) 34
963 00:39:11.200929 iDelay=43, Bit 3, Center 15 (0 ~ 31) 32
964 00:39:11.200983 iDelay=43, Bit 4, Center 23 (7 ~ 40) 34
965 00:39:11.201038 iDelay=43, Bit 5, Center 16 (0 ~ 33) 34
966 00:39:11.201092 iDelay=43, Bit 6, Center 18 (3 ~ 33) 31
967 00:39:11.201146 iDelay=43, Bit 7, Center 18 (3 ~ 34) 32
968 00:39:11.201200 iDelay=43, Bit 8, Center 18 (3 ~ 34) 32
969 00:39:11.201254 iDelay=43, Bit 9, Center 20 (4 ~ 36) 33
970 00:39:11.201380 iDelay=43, Bit 10, Center 25 (8 ~ 42) 35
971 00:39:11.201453 iDelay=43, Bit 11, Center 18 (1 ~ 35) 35
972 00:39:11.201510 iDelay=43, Bit 12, Center 20 (5 ~ 36) 32
973 00:39:11.201564 iDelay=43, Bit 13, Center 17 (3 ~ 32) 30
974 00:39:11.201619 iDelay=43, Bit 14, Center 18 (3 ~ 33) 31
975 00:39:11.201673 iDelay=43, Bit 15, Center 20 (4 ~ 36) 33
976 00:39:11.201727 ==
977 00:39:11.201781 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
978 00:39:11.201835 fsp= 1, odt_onoff= 1, Byte mode= 0
979 00:39:11.201890 ==
980 00:39:11.201945 DQS Delay:
981 00:39:11.201998 DQS0 = 0, DQS1 = 0
982 00:39:11.202053 DQM Delay:
983 00:39:11.202106 DQM0 = 20, DQM1 = 19
984 00:39:11.202160 DQ Delay:
985 00:39:11.202236 DQ0 =25, DQ1 =24, DQ2 =23, DQ3 =15
986 00:39:11.202293 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
987 00:39:11.202348 DQ8 =18, DQ9 =20, DQ10 =25, DQ11 =18
988 00:39:11.202403 DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20
989 00:39:11.202458
990 00:39:11.202512
991 00:39:11.202566 DramC Write-DBI off
992 00:39:11.202620 ==
993 00:39:11.202674 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
994 00:39:11.202728 fsp= 1, odt_onoff= 1, Byte mode= 0
995 00:39:11.202783 ==
996 00:39:11.202837 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
997 00:39:11.202892
998 00:39:11.202946 Begin, DQ Scan Range 921~1177
999 00:39:11.203000
1000 00:39:11.203053
1001 00:39:11.203107 TX Vref Scan disable
1002 00:39:11.203162 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1003 00:39:11.203217 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1004 00:39:11.203462 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1005 00:39:11.203525 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1006 00:39:11.203582 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1007 00:39:11.203639 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1008 00:39:11.203695 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1009 00:39:11.203751 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1010 00:39:11.203807 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1011 00:39:11.203862 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1012 00:39:11.203918 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1013 00:39:11.203973 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1014 00:39:11.204029 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1015 00:39:11.204085 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1016 00:39:11.204140 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1017 00:39:11.204197 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1018 00:39:11.204253 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1019 00:39:11.204309 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1020 00:39:11.204364 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1021 00:39:11.204420 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1022 00:39:11.204476 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1023 00:39:11.204532 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1024 00:39:11.204588 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1025 00:39:11.204650 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1026 00:39:11.204708 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1027 00:39:11.204764 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1028 00:39:11.204820 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1029 00:39:11.204875 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1030 00:39:11.204931 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1031 00:39:11.204986 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1032 00:39:11.205047 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1033 00:39:11.205165 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1034 00:39:11.205254 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1035 00:39:11.205352 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1036 00:39:11.205409 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1037 00:39:11.205465 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1038 00:39:11.205519 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1039 00:39:11.205574 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1040 00:39:11.205630 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1041 00:39:11.205684 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1042 00:39:11.205739 961 |3 6 1|[0] xxxxxxxx oxxoxoxx [MSB]
1043 00:39:11.205794 962 |3 6 2|[0] xxxxxxxx oxxoooxx [MSB]
1044 00:39:11.205849 963 |3 6 3|[0] xxxxxxxx ooxoooox [MSB]
1045 00:39:11.205903 964 |3 6 4|[0] xxxxxxxx ooxoooox [MSB]
1046 00:39:11.205958 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1047 00:39:11.206012 966 |3 6 6|[0] xxxxxxxx ooxooooo [MSB]
1048 00:39:11.206067 967 |3 6 7|[0] xxxxxxxx oooooooo [MSB]
1049 00:39:11.206121 968 |3 6 8|[0] xxxxxxxx oooooooo [MSB]
1050 00:39:11.206176 969 |3 6 9|[0] xxxoxxxx oooooooo [MSB]
1051 00:39:11.206230 970 |3 6 10|[0] xxxoxoox oooooooo [MSB]
1052 00:39:11.206285 971 |3 6 11|[0] xxxoxoox oooooooo [MSB]
1053 00:39:11.206340 972 |3 6 12|[0] xxxoxoox oooooooo [MSB]
1054 00:39:11.206394 973 |3 6 13|[0] xxxooooo oooooooo [MSB]
1055 00:39:11.206449 974 |3 6 14|[0] xxxooooo oooooooo [MSB]
1056 00:39:11.206503 975 |3 6 15|[0] xooooooo oooooooo [MSB]
1057 00:39:11.206558 985 |3 6 25|[0] oooooooo oxxxxxxx [MSB]
1058 00:39:11.206613 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1059 00:39:11.206667 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1060 00:39:11.206722 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1061 00:39:11.206776 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1062 00:39:11.206831 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1063 00:39:11.206885 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1064 00:39:11.206939 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1065 00:39:11.206993 993 |3 6 33|[0] xoxxxxxx xxxxxxxx [MSB]
1066 00:39:11.207048 994 |3 6 34|[0] xxxxxxxx xxxxxxxx [MSB]
1067 00:39:11.207103 Byte0, DQ PI dly=982, DQM PI dly= 982
1068 00:39:11.207157 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1069 00:39:11.207212
1070 00:39:11.207265 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1071 00:39:11.207320
1072 00:39:11.207374 Byte1, DQ PI dly=973, DQM PI dly= 973
1073 00:39:11.207428 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)
1074 00:39:11.207483
1075 00:39:11.207536 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)
1076 00:39:11.207591
1077 00:39:11.207644 ==
1078 00:39:11.207710 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1079 00:39:11.207838 fsp= 1, odt_onoff= 1, Byte mode= 0
1080 00:39:11.207959 ==
1081 00:39:11.208018 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1082 00:39:11.208074
1083 00:39:11.208128 Begin, DQ Scan Range 949~1013
1084 00:39:11.208183 Write Rank0 MR14 =0x0
1085 00:39:11.208237
1086 00:39:11.208290 CH=0, VrefRange= 0, VrefLevel = 0
1087 00:39:11.208346 TX Bit0 (977~994) 18 985, Bit8 (963~982) 20 972,
1088 00:39:11.208456 TX Bit1 (977~993) 17 985, Bit9 (966~982) 17 974,
1089 00:39:11.208514 TX Bit2 (976~993) 18 984, Bit10 (969~987) 19 978,
1090 00:39:11.208569 TX Bit3 (970~986) 17 978, Bit11 (964~982) 19 973,
1091 00:39:11.208624 TX Bit4 (976~993) 18 984, Bit12 (966~982) 17 974,
1092 00:39:11.208678 TX Bit5 (972~987) 16 979, Bit13 (965~982) 18 973,
1093 00:39:11.208733 TX Bit6 (974~988) 15 981, Bit14 (966~983) 18 974,
1094 00:39:11.208787 TX Bit7 (977~991) 15 984, Bit15 (968~983) 16 975,
1095 00:39:11.208841
1096 00:39:11.208896 Write Rank0 MR14 =0x2
1097 00:39:11.208950
1098 00:39:11.209003 CH=0, VrefRange= 0, VrefLevel = 2
1099 00:39:11.209058 TX Bit0 (977~994) 18 985, Bit8 (962~983) 22 972,
1100 00:39:11.209112 TX Bit1 (977~993) 17 985, Bit9 (966~982) 17 974,
1101 00:39:11.209167 TX Bit2 (976~993) 18 984, Bit10 (969~988) 20 978,
1102 00:39:11.209221 TX Bit3 (970~987) 18 978, Bit11 (963~982) 20 972,
1103 00:39:11.209316 TX Bit4 (976~993) 18 984, Bit12 (965~983) 19 974,
1104 00:39:11.209372 TX Bit5 (971~988) 18 979, Bit13 (965~982) 18 973,
1105 00:39:11.209426 TX Bit6 (973~990) 18 981, Bit14 (966~983) 18 974,
1106 00:39:11.209481 TX Bit7 (976~991) 16 983, Bit15 (968~983) 16 975,
1107 00:39:11.209534
1108 00:39:11.209588 Write Rank0 MR14 =0x4
1109 00:39:11.209642
1110 00:39:11.209695 CH=0, VrefRange= 0, VrefLevel = 4
1111 00:39:11.209953 TX Bit0 (977~994) 18 985, Bit8 (962~983) 22 972,
1112 00:39:11.210014 TX Bit1 (977~993) 17 985, Bit9 (966~983) 18 974,
1113 00:39:11.210071 TX Bit2 (976~993) 18 984, Bit10 (968~988) 21 978,
1114 00:39:11.210126 TX Bit3 (970~987) 18 978, Bit11 (963~982) 20 972,
1115 00:39:11.210180 TX Bit4 (976~994) 19 985, Bit12 (965~983) 19 974,
1116 00:39:11.210235 TX Bit5 (971~988) 18 979, Bit13 (965~982) 18 973,
1117 00:39:11.210289 TX Bit6 (973~989) 17 981, Bit14 (966~983) 18 974,
1118 00:39:11.210343 TX Bit7 (976~991) 16 983, Bit15 (968~983) 16 975,
1119 00:39:11.210397
1120 00:39:11.210450 Write Rank0 MR14 =0x6
1121 00:39:11.210505
1122 00:39:11.210558 CH=0, VrefRange= 0, VrefLevel = 6
1123 00:39:11.210612 TX Bit0 (977~995) 19 986, Bit8 (962~983) 22 972,
1124 00:39:11.210666 TX Bit1 (976~994) 19 985, Bit9 (965~983) 19 974,
1125 00:39:11.210720 TX Bit2 (976~993) 18 984, Bit10 (968~989) 22 978,
1126 00:39:11.210774 TX Bit3 (969~987) 19 978, Bit11 (963~982) 20 972,
1127 00:39:11.210827 TX Bit4 (975~994) 20 984, Bit12 (964~983) 20 973,
1128 00:39:11.210881 TX Bit5 (971~989) 19 980, Bit13 (964~982) 19 973,
1129 00:39:11.210936 TX Bit6 (972~990) 19 981, Bit14 (965~984) 20 974,
1130 00:39:11.210990 TX Bit7 (976~992) 17 984, Bit15 (968~984) 17 976,
1131 00:39:11.211044
1132 00:39:11.211097 Write Rank0 MR14 =0x8
1133 00:39:11.211151
1134 00:39:11.211204 CH=0, VrefRange= 0, VrefLevel = 8
1135 00:39:11.211258 TX Bit0 (977~996) 20 986, Bit8 (962~983) 22 972,
1136 00:39:11.211312 TX Bit1 (976~994) 19 985, Bit9 (964~983) 20 973,
1137 00:39:11.211367 TX Bit2 (976~994) 19 985, Bit10 (968~989) 22 978,
1138 00:39:11.211421 TX Bit3 (969~988) 20 978, Bit11 (962~983) 22 972,
1139 00:39:11.211475 TX Bit4 (975~994) 20 984, Bit12 (964~983) 20 973,
1140 00:39:11.211533 TX Bit5 (970~990) 21 980, Bit13 (963~983) 21 973,
1141 00:39:11.211595 TX Bit6 (971~991) 21 981, Bit14 (965~984) 20 974,
1142 00:39:11.211649 TX Bit7 (975~992) 18 983, Bit15 (967~984) 18 975,
1143 00:39:11.211737
1144 00:39:11.211791 Write Rank0 MR14 =0xa
1145 00:39:11.211845
1146 00:39:11.211899 CH=0, VrefRange= 0, VrefLevel = 10
1147 00:39:11.211953 TX Bit0 (976~996) 21 986, Bit8 (961~984) 24 972,
1148 00:39:11.212007 TX Bit1 (976~995) 20 985, Bit9 (964~984) 21 974,
1149 00:39:11.212062 TX Bit2 (975~994) 20 984, Bit10 (967~989) 23 978,
1150 00:39:11.212116 TX Bit3 (969~989) 21 979, Bit11 (962~983) 22 972,
1151 00:39:11.212170 TX Bit4 (974~995) 22 984, Bit12 (964~984) 21 974,
1152 00:39:11.212224 TX Bit5 (970~990) 21 980, Bit13 (963~983) 21 973,
1153 00:39:11.212279 TX Bit6 (971~991) 21 981, Bit14 (964~985) 22 974,
1154 00:39:11.212333 TX Bit7 (975~992) 18 983, Bit15 (967~985) 19 976,
1155 00:39:11.212387
1156 00:39:11.212440 Write Rank0 MR14 =0xc
1157 00:39:11.212493
1158 00:39:11.212547 CH=0, VrefRange= 0, VrefLevel = 12
1159 00:39:11.212600 TX Bit0 (976~997) 22 986, Bit8 (962~984) 23 973,
1160 00:39:11.212655 TX Bit1 (976~995) 20 985, Bit9 (964~984) 21 974,
1161 00:39:11.212709 TX Bit2 (975~994) 20 984, Bit10 (967~990) 24 978,
1162 00:39:11.212763 TX Bit3 (969~990) 22 979, Bit11 (962~983) 22 972,
1163 00:39:11.212817 TX Bit4 (974~995) 22 984, Bit12 (964~984) 21 974,
1164 00:39:11.212872 TX Bit5 (970~991) 22 980, Bit13 (962~983) 22 972,
1165 00:39:11.212926 TX Bit6 (971~991) 21 981, Bit14 (964~985) 22 974,
1166 00:39:11.212979 TX Bit7 (975~993) 19 984, Bit15 (967~985) 19 976,
1167 00:39:11.213033
1168 00:39:11.213086 Write Rank0 MR14 =0xe
1169 00:39:11.213139
1170 00:39:11.213193 CH=0, VrefRange= 0, VrefLevel = 14
1171 00:39:11.213247 TX Bit0 (976~997) 22 986, Bit8 (961~984) 24 972,
1172 00:39:11.213343 TX Bit1 (975~995) 21 985, Bit9 (963~985) 23 974,
1173 00:39:11.213397 TX Bit2 (975~995) 21 985, Bit10 (967~990) 24 978,
1174 00:39:11.213451 TX Bit3 (969~990) 22 979, Bit11 (961~984) 24 972,
1175 00:39:11.213505 TX Bit4 (974~996) 23 985, Bit12 (963~985) 23 974,
1176 00:39:11.213560 TX Bit5 (970~991) 22 980, Bit13 (962~984) 23 973,
1177 00:39:11.213614 TX Bit6 (970~991) 22 980, Bit14 (963~986) 24 974,
1178 00:39:11.213667 TX Bit7 (974~993) 20 983, Bit15 (966~986) 21 976,
1179 00:39:11.213721
1180 00:39:11.213774 Write Rank0 MR14 =0x10
1181 00:39:11.213828
1182 00:39:11.213881 CH=0, VrefRange= 0, VrefLevel = 16
1183 00:39:11.213934 TX Bit0 (976~998) 23 987, Bit8 (961~985) 25 973,
1184 00:39:11.213989 TX Bit1 (976~995) 20 985, Bit9 (963~985) 23 974,
1185 00:39:11.214042 TX Bit2 (975~995) 21 985, Bit10 (967~990) 24 978,
1186 00:39:11.214096 TX Bit3 (968~990) 23 979, Bit11 (961~984) 24 972,
1187 00:39:11.214150 TX Bit4 (974~996) 23 985, Bit12 (962~985) 24 973,
1188 00:39:11.214204 TX Bit5 (969~991) 23 980, Bit13 (962~984) 23 973,
1189 00:39:11.214271 TX Bit6 (970~992) 23 981, Bit14 (963~986) 24 974,
1190 00:39:11.214326 TX Bit7 (973~993) 21 983, Bit15 (966~986) 21 976,
1191 00:39:11.214381
1192 00:39:11.214434 Write Rank0 MR14 =0x12
1193 00:39:11.214488
1194 00:39:11.214542 CH=0, VrefRange= 0, VrefLevel = 18
1195 00:39:11.214596 TX Bit0 (976~998) 23 987, Bit8 (961~985) 25 973,
1196 00:39:11.214650 TX Bit1 (975~996) 22 985, Bit9 (962~986) 25 974,
1197 00:39:11.214704 TX Bit2 (974~996) 23 985, Bit10 (967~990) 24 978,
1198 00:39:11.214759 TX Bit3 (968~991) 24 979, Bit11 (961~984) 24 972,
1199 00:39:11.214813 TX Bit4 (973~997) 25 985, Bit12 (962~985) 24 973,
1200 00:39:11.214867 TX Bit5 (969~992) 24 980, Bit13 (962~984) 23 973,
1201 00:39:11.214920 TX Bit6 (970~993) 24 981, Bit14 (961~987) 27 974,
1202 00:39:11.214974 TX Bit7 (973~993) 21 983, Bit15 (966~987) 22 976,
1203 00:39:11.215028
1204 00:39:11.215083 Write Rank0 MR14 =0x14
1205 00:39:11.215137
1206 00:39:11.215190 CH=0, VrefRange= 0, VrefLevel = 20
1207 00:39:11.215243 TX Bit0 (975~998) 24 986, Bit8 (961~985) 25 973,
1208 00:39:11.215297 TX Bit1 (975~996) 22 985, Bit9 (962~986) 25 974,
1209 00:39:11.215352 TX Bit2 (975~996) 22 985, Bit10 (966~990) 25 978,
1210 00:39:11.215405 TX Bit3 (968~991) 24 979, Bit11 (961~985) 25 973,
1211 00:39:11.215650 TX Bit4 (973~998) 26 985, Bit12 (961~986) 26 973,
1212 00:39:11.215714 TX Bit5 (969~992) 24 980, Bit13 (961~985) 25 973,
1213 00:39:11.215770 TX Bit6 (969~993) 25 981, Bit14 (962~986) 25 974,
1214 00:39:11.215825 TX Bit7 (972~994) 23 983, Bit15 (965~987) 23 976,
1215 00:39:11.215879
1216 00:39:11.215933 Write Rank0 MR14 =0x16
1217 00:39:11.215987
1218 00:39:11.216041 CH=0, VrefRange= 0, VrefLevel = 22
1219 00:39:11.216094 TX Bit0 (976~999) 24 987, Bit8 (961~985) 25 973,
1220 00:39:11.216149 TX Bit1 (974~997) 24 985, Bit9 (962~986) 25 974,
1221 00:39:11.216203 TX Bit2 (974~996) 23 985, Bit10 (966~990) 25 978,
1222 00:39:11.216257 TX Bit3 (968~992) 25 980, Bit11 (961~985) 25 973,
1223 00:39:11.216312 TX Bit4 (972~998) 27 985, Bit12 (962~986) 25 974,
1224 00:39:11.216366 TX Bit5 (969~992) 24 980, Bit13 (961~985) 25 973,
1225 00:39:11.216420 TX Bit6 (969~993) 25 981, Bit14 (962~986) 25 974,
1226 00:39:11.216474 TX Bit7 (972~995) 24 983, Bit15 (965~989) 25 977,
1227 00:39:11.216529
1228 00:39:11.216582 Write Rank0 MR14 =0x18
1229 00:39:11.216636
1230 00:39:11.216689 CH=0, VrefRange= 0, VrefLevel = 24
1231 00:39:11.216742 TX Bit0 (975~999) 25 987, Bit8 (961~985) 25 973,
1232 00:39:11.216796 TX Bit1 (974~997) 24 985, Bit9 (962~987) 26 974,
1233 00:39:11.216850 TX Bit2 (974~997) 24 985, Bit10 (967~990) 24 978,
1234 00:39:11.216904 TX Bit3 (968~992) 25 980, Bit11 (961~984) 24 972,
1235 00:39:11.216958 TX Bit4 (973~998) 26 985, Bit12 (961~985) 25 973,
1236 00:39:11.217012 TX Bit5 (969~992) 24 980, Bit13 (961~984) 24 972,
1237 00:39:11.217066 TX Bit6 (969~993) 25 981, Bit14 (962~985) 24 973,
1238 00:39:11.217120 TX Bit7 (971~995) 25 983, Bit15 (965~989) 25 977,
1239 00:39:11.217198
1240 00:39:11.217253 Write Rank0 MR14 =0x1a
1241 00:39:11.217331
1242 00:39:11.217384 CH=0, VrefRange= 0, VrefLevel = 26
1243 00:39:11.217438 TX Bit0 (975~999) 25 987, Bit8 (961~985) 25 973,
1244 00:39:11.217492 TX Bit1 (974~997) 24 985, Bit9 (962~987) 26 974,
1245 00:39:11.217546 TX Bit2 (974~998) 25 986, Bit10 (967~990) 24 978,
1246 00:39:11.217600 TX Bit3 (968~992) 25 980, Bit11 (961~984) 24 972,
1247 00:39:11.217654 TX Bit4 (974~997) 24 985, Bit12 (961~985) 25 973,
1248 00:39:11.217708 TX Bit5 (968~992) 25 980, Bit13 (961~984) 24 972,
1249 00:39:11.217762 TX Bit6 (969~993) 25 981, Bit14 (962~985) 24 973,
1250 00:39:11.217816 TX Bit7 (971~995) 25 983, Bit15 (964~989) 26 976,
1251 00:39:11.217870
1252 00:39:11.217923 Write Rank0 MR14 =0x1c
1253 00:39:11.217977
1254 00:39:11.218029 CH=0, VrefRange= 0, VrefLevel = 28
1255 00:39:11.218083 TX Bit0 (975~999) 25 987, Bit8 (961~985) 25 973,
1256 00:39:11.218157 TX Bit1 (974~997) 24 985, Bit9 (962~987) 26 974,
1257 00:39:11.218213 TX Bit2 (974~998) 25 986, Bit10 (967~990) 24 978,
1258 00:39:11.218267 TX Bit3 (968~992) 25 980, Bit11 (961~984) 24 972,
1259 00:39:11.218321 TX Bit4 (974~997) 24 985, Bit12 (961~985) 25 973,
1260 00:39:11.218375 TX Bit5 (968~992) 25 980, Bit13 (961~984) 24 972,
1261 00:39:11.218429 TX Bit6 (969~993) 25 981, Bit14 (962~985) 24 973,
1262 00:39:11.218483 TX Bit7 (971~995) 25 983, Bit15 (964~989) 26 976,
1263 00:39:11.218537
1264 00:39:11.218593 Write Rank0 MR14 =0x1e
1265 00:39:11.218647
1266 00:39:11.218701 CH=0, VrefRange= 0, VrefLevel = 30
1267 00:39:11.218754 TX Bit0 (975~999) 25 987, Bit8 (961~985) 25 973,
1268 00:39:11.218808 TX Bit1 (974~997) 24 985, Bit9 (962~987) 26 974,
1269 00:39:11.218862 TX Bit2 (974~998) 25 986, Bit10 (967~990) 24 978,
1270 00:39:11.218915 TX Bit3 (968~992) 25 980, Bit11 (961~984) 24 972,
1271 00:39:11.218969 TX Bit4 (974~997) 24 985, Bit12 (961~985) 25 973,
1272 00:39:11.219023 TX Bit5 (968~992) 25 980, Bit13 (961~984) 24 972,
1273 00:39:11.219077 TX Bit6 (969~993) 25 981, Bit14 (962~985) 24 973,
1274 00:39:11.219130 TX Bit7 (971~995) 25 983, Bit15 (964~989) 26 976,
1275 00:39:11.219184
1276 00:39:11.219237
1277 00:39:11.219290 TX Vref found, early break! 375< 376
1278 00:39:11.219344 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1279 00:39:11.219399 u1DelayCellOfst[0]=8 cells (7 PI)
1280 00:39:11.219453 u1DelayCellOfst[1]=6 cells (5 PI)
1281 00:39:11.219506 u1DelayCellOfst[2]=7 cells (6 PI)
1282 00:39:11.219560 u1DelayCellOfst[3]=0 cells (0 PI)
1283 00:39:11.219613 u1DelayCellOfst[4]=6 cells (5 PI)
1284 00:39:11.219667 u1DelayCellOfst[5]=0 cells (0 PI)
1285 00:39:11.219720 u1DelayCellOfst[6]=1 cells (1 PI)
1286 00:39:11.219774 u1DelayCellOfst[7]=3 cells (3 PI)
1287 00:39:11.219827 Byte0, DQ PI dly=980, DQM PI dly= 983
1288 00:39:11.219881 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1289 00:39:11.219936
1290 00:39:11.219988 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1291 00:39:11.220042
1292 00:39:11.220095 u1DelayCellOfst[8]=1 cells (1 PI)
1293 00:39:11.220149 u1DelayCellOfst[9]=2 cells (2 PI)
1294 00:39:11.220202 u1DelayCellOfst[10]=7 cells (6 PI)
1295 00:39:11.220255 u1DelayCellOfst[11]=0 cells (0 PI)
1296 00:39:11.220308 u1DelayCellOfst[12]=1 cells (1 PI)
1297 00:39:11.220361 u1DelayCellOfst[13]=0 cells (0 PI)
1298 00:39:11.220414 u1DelayCellOfst[14]=1 cells (1 PI)
1299 00:39:11.220467 u1DelayCellOfst[15]=5 cells (4 PI)
1300 00:39:11.220520 Byte1, DQ PI dly=972, DQM PI dly= 975
1301 00:39:11.220573 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 12)
1302 00:39:11.220626
1303 00:39:11.220678 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 12)
1304 00:39:11.220732
1305 00:39:11.220785 Write Rank0 MR14 =0x1a
1306 00:39:11.220838
1307 00:39:11.220891 Final TX Range 0 Vref 26
1308 00:39:11.220945
1309 00:39:11.220997 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1310 00:39:11.221051
1311 00:39:11.221104 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1312 00:39:11.221169 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1313 00:39:11.221263 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1314 00:39:11.221357 Write Rank0 MR3 =0xb0
1315 00:39:11.221411 DramC Write-DBI on
1316 00:39:11.221465 ==
1317 00:39:11.221518 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1318 00:39:11.221572 fsp= 1, odt_onoff= 1, Byte mode= 0
1319 00:39:11.221626 ==
1320 00:39:11.221869 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1321 00:39:11.221929
1322 00:39:11.221983 Begin, DQ Scan Range 695~759
1323 00:39:11.222038
1324 00:39:11.222092
1325 00:39:11.222145 TX Vref Scan disable
1326 00:39:11.222199 695 |2 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1327 00:39:11.222254 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1328 00:39:11.222309 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1329 00:39:11.222363 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1330 00:39:11.222418 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1331 00:39:11.222473 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1332 00:39:11.222527 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1333 00:39:11.222583 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1334 00:39:11.222637 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1335 00:39:11.222691 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1336 00:39:11.222745 705 |2 6 1|[0] xxxxxxxx oooooooo [MSB]
1337 00:39:11.222798 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1338 00:39:11.222853 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1339 00:39:11.222907 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1340 00:39:11.222961 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1341 00:39:11.223015 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1342 00:39:11.223069 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1343 00:39:11.223124 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1344 00:39:11.223178 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1345 00:39:11.223232 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1346 00:39:11.223287 731 |2 6 27|[0] oooooooo xxxxxxxx [MSB]
1347 00:39:11.223341 732 |2 6 28|[0] oooooooo xxxxxxxx [MSB]
1348 00:39:11.223395 733 |2 6 29|[0] oooooooo xxxxxxxx [MSB]
1349 00:39:11.223449 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1350 00:39:11.223502 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1351 00:39:11.223556 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1352 00:39:11.223610 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1353 00:39:11.223663 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1354 00:39:11.223717 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1355 00:39:11.223772 740 |2 6 36|[0] xxxxxxxx xxxxxxxx [MSB]
1356 00:39:11.223826 Byte0, DQ PI dly=727, DQM PI dly= 727
1357 00:39:11.223879 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
1358 00:39:11.223933
1359 00:39:11.223985 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
1360 00:39:11.224040
1361 00:39:11.224092 Byte1, DQ PI dly=717, DQM PI dly= 717
1362 00:39:11.224145 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 13)
1363 00:39:11.224198
1364 00:39:11.224251 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 13)
1365 00:39:11.224305
1366 00:39:11.224358 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1367 00:39:11.224412 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1368 00:39:11.224466 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1369 00:39:11.224519 Write Rank0 MR3 =0x30
1370 00:39:11.224573 DramC Write-DBI off
1371 00:39:11.224627
1372 00:39:11.224680 [DATLAT]
1373 00:39:11.224733 Freq=1600, CH0 RK0, use_rxtx_scan=0
1374 00:39:11.224787
1375 00:39:11.224840 DATLAT Default: 0xf
1376 00:39:11.224893 7, 0xFFFF, sum=0
1377 00:39:11.224948 8, 0xFFFF, sum=0
1378 00:39:11.225001 9, 0xFFFF, sum=0
1379 00:39:11.225056 10, 0xFFFF, sum=0
1380 00:39:11.225110 11, 0xFFFF, sum=0
1381 00:39:11.225189 12, 0xFFFF, sum=0
1382 00:39:11.225244 13, 0xFFFF, sum=0
1383 00:39:11.225323 14, 0x0, sum=1
1384 00:39:11.225378 15, 0x0, sum=2
1385 00:39:11.225432 16, 0x0, sum=3
1386 00:39:11.225486 17, 0x0, sum=4
1387 00:39:11.225540 pattern=2 first_step=14 total pass=5 best_step=16
1388 00:39:11.225593 ==
1389 00:39:11.225645 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1390 00:39:11.225699 fsp= 1, odt_onoff= 1, Byte mode= 0
1391 00:39:11.225752 ==
1392 00:39:11.225805 Start DQ dly to find pass range UseTestEngine =1
1393 00:39:11.225859 x-axis: bit #, y-axis: DQ dly (-127~63)
1394 00:39:11.225913 RX Vref Scan = 1
1395 00:39:11.225966
1396 00:39:11.226019 RX Vref found, early break!
1397 00:39:11.226072
1398 00:39:11.226125 Final RX Vref 12, apply to both rank0 and 1
1399 00:39:11.226179 ==
1400 00:39:11.226232 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1401 00:39:11.226286 fsp= 1, odt_onoff= 1, Byte mode= 0
1402 00:39:11.226339 ==
1403 00:39:11.226392 DQS Delay:
1404 00:39:11.226445 DQS0 = 0, DQS1 = 0
1405 00:39:11.226498 DQM Delay:
1406 00:39:11.226550 DQM0 = 20, DQM1 = 19
1407 00:39:11.226603 DQ Delay:
1408 00:39:11.226656 DQ0 =25, DQ1 =25, DQ2 =24, DQ3 =15
1409 00:39:11.226710 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
1410 00:39:11.226763 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =16
1411 00:39:11.226816 DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20
1412 00:39:11.226870
1413 00:39:11.226923
1414 00:39:11.226977
1415 00:39:11.227030 [DramC_TX_OE_Calibration] TA2
1416 00:39:11.227084 Original DQ_B0 (3 6) =30, OEN = 27
1417 00:39:11.227159 Original DQ_B1 (3 6) =30, OEN = 27
1418 00:39:11.227248 23, 0x0, End_B0=23 End_B1=23
1419 00:39:11.227308 24, 0x0, End_B0=24 End_B1=24
1420 00:39:11.227364 25, 0x0, End_B0=25 End_B1=25
1421 00:39:11.227418 26, 0x0, End_B0=26 End_B1=26
1422 00:39:11.227473 27, 0x0, End_B0=27 End_B1=27
1423 00:39:11.227528 28, 0x0, End_B0=28 End_B1=28
1424 00:39:11.227582 29, 0x0, End_B0=29 End_B1=29
1425 00:39:11.227636 30, 0x0, End_B0=30 End_B1=30
1426 00:39:11.227691 31, 0xFFFF, End_B0=30 End_B1=30
1427 00:39:11.227745 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1428 00:39:11.227799 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1429 00:39:11.227852
1430 00:39:11.227905
1431 00:39:11.227957 Write Rank0 MR23 =0x3f
1432 00:39:11.228010 [DQSOSC]
1433 00:39:11.228064 [DQSOSCAuto] RK0, (LSB)MR18= 0xaa, (MSB)MR19= 0x3, tDQSOscB0 = 335 ps tDQSOscB1 = 0 ps
1434 00:39:11.228118 CH0_RK0: MR19=0x3, MR18=0xAA, DQSOSC=335, MR23=63, INC=21, DEC=32
1435 00:39:11.228172 Write Rank0 MR23 =0x3f
1436 00:39:11.228225 [DQSOSC]
1437 00:39:11.228278 [DQSOSCAuto] RK0, (LSB)MR18= 0xaa, (MSB)MR19= 0x3, tDQSOscB0 = 335 ps tDQSOscB1 = 0 ps
1438 00:39:11.228333 CH0 RK0: MR19=3, MR18=AA
1439 00:39:11.228386 [RankSwap] Rank num 2, (Multi 1), Rank 1
1440 00:39:11.228440 Write Rank0 MR2 =0xad
1441 00:39:11.228493 [Write Leveling]
1442 00:39:11.228547 delay byte0 byte1 byte2 byte3
1443 00:39:11.228600
1444 00:39:11.228652 10 0 0
1445 00:39:11.228706 11 0 0
1446 00:39:11.228760 12 0 0
1447 00:39:11.228814 13 0 0
1448 00:39:11.228868 14 0 0
1449 00:39:11.228922 15 0 0
1450 00:39:11.228976 16 0 0
1451 00:39:11.229030 17 0 0
1452 00:39:11.229083 18 0 0
1453 00:39:11.229159 19 0 0
1454 00:39:11.229214 20 0 0
1455 00:39:11.229277 21 0 0
1456 00:39:11.229346 22 0 0
1457 00:39:11.229401 23 0 0
1458 00:39:11.229454 24 0 0
1459 00:39:11.229508 25 0 0
1460 00:39:11.229563 26 0 0
1461 00:39:11.229617 27 0 ff
1462 00:39:11.229863 28 0 ff
1463 00:39:11.229924 29 0 ff
1464 00:39:11.229980 30 0 ff
1465 00:39:11.230034 31 0 ff
1466 00:39:11.230089 32 0 ff
1467 00:39:11.230143 33 0 ff
1468 00:39:11.230197 34 0 ff
1469 00:39:11.230251 35 ff ff
1470 00:39:11.230305 36 ff ff
1471 00:39:11.230359 37 ff ff
1472 00:39:11.230413 38 ff ff
1473 00:39:11.230467 39 ff ff
1474 00:39:11.230521 40 ff ff
1475 00:39:11.230575 41 ff ff
1476 00:39:11.230629 pass bytecount = 0xff (0xff: all bytes pass)
1477 00:39:11.230682
1478 00:39:11.230735 DQS0 dly: 35
1479 00:39:11.230787 DQS1 dly: 27
1480 00:39:11.230840 Write Rank0 MR2 =0x2d
1481 00:39:11.230893 [RankSwap] Rank num 2, (Multi 1), Rank 0
1482 00:39:11.230947 Write Rank1 MR1 =0xd6
1483 00:39:11.231000 [Gating]
1484 00:39:11.231052 ==
1485 00:39:11.231105 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1486 00:39:11.231158 fsp= 1, odt_onoff= 1, Byte mode= 0
1487 00:39:11.231211 ==
1488 00:39:11.231264 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1489 00:39:11.231319 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1490 00:39:11.231374 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1491 00:39:11.231428 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1492 00:39:11.231483 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1493 00:39:11.231537 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1494 00:39:11.231591 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1495 00:39:11.231645 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1496 00:39:11.231698 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1497 00:39:11.231752 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1498 00:39:11.231807 3 2 8 |c0b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1499 00:39:11.231861 3 2 12 |3534 404 |(11 11)(11 11) |(0 0)(0 0)| 0
1500 00:39:11.231915 3 2 16 |3534 3030 |(11 11)(11 11) |(0 0)(0 0)| 0
1501 00:39:11.231969 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1502 00:39:11.232023 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1503 00:39:11.232077 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1504 00:39:11.232131 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1505 00:39:11.232185 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1506 00:39:11.232239 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1507 00:39:11.232292 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1508 00:39:11.232346 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1509 00:39:11.232401 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1510 00:39:11.232455 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1511 00:39:11.232509 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1512 00:39:11.232563 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1513 00:39:11.232617 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1514 00:39:11.232671 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1515 00:39:11.232724 3 4 12 |707 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1516 00:39:11.232778 3 4 16 |3d3d 707 |(11 11)(11 11) |(1 1)(1 1)| 0
1517 00:39:11.232832 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1518 00:39:11.232886 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1519 00:39:11.232940 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1520 00:39:11.232994 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1521 00:39:11.233048 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1522 00:39:11.233102 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1523 00:39:11.233156 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1524 00:39:11.233209 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1525 00:39:11.233317 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1526 00:39:11.233379 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1527 00:39:11.233434 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1528 00:39:11.233488 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1529 00:39:11.233542 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1530 00:39:11.233595 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1531 00:39:11.233649 [Byte 0] Lead/lag Transition tap number (2)
1532 00:39:11.233704 [Byte 1] Lead/lag Transition tap number (1)
1533 00:39:11.233757 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1534 00:39:11.233811 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
1535 00:39:11.233865 [Byte 0]First pass (3, 6, 12)
1536 00:39:11.233918 3 6 16 |4646 a0a |(0 0)(11 11) |(0 0)(0 0)| 0
1537 00:39:11.233972 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1538 00:39:11.234026 [Byte 1]First pass (3, 6, 20)
1539 00:39:11.234079 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1540 00:39:11.234132 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1541 00:39:11.234187 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1542 00:39:11.234241 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1543 00:39:11.234295 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1544 00:39:11.234349 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1545 00:39:11.234403 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1546 00:39:11.234456 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1547 00:39:11.234563 All bytes gating window > 1UI, Early break!
1548 00:39:11.234631
1549 00:39:11.234684 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1550 00:39:11.234738
1551 00:39:11.234791 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)
1552 00:39:11.234844
1553 00:39:11.234897
1554 00:39:11.234949
1555 00:39:11.235001 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1556 00:39:11.235054
1557 00:39:11.235110 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1558 00:39:11.235164
1559 00:39:11.235215
1560 00:39:11.235267 Write Rank1 MR1 =0x56
1561 00:39:11.235320
1562 00:39:11.235372 best RODT dly(2T, 0.5T) = (2, 3)
1563 00:39:11.235425
1564 00:39:11.235477 best RODT dly(2T, 0.5T) = (2, 3)
1565 00:39:11.235530 ==
1566 00:39:11.235583 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1567 00:39:11.235636 fsp= 1, odt_onoff= 1, Byte mode= 0
1568 00:39:11.235689 ==
1569 00:39:11.235742 Start DQ dly to find pass range UseTestEngine =0
1570 00:39:11.235795 x-axis: bit #, y-axis: DQ dly (-127~63)
1571 00:39:11.235849 RX Vref Scan = 0
1572 00:39:11.235902 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1573 00:39:11.235957 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1574 00:39:11.236011 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1575 00:39:11.236064 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1576 00:39:11.236311 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1577 00:39:11.236374 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1578 00:39:11.236430 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1579 00:39:11.236485 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1580 00:39:11.236539 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1581 00:39:11.236593 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1582 00:39:11.236647 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1583 00:39:11.236701 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1584 00:39:11.236754 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1585 00:39:11.236808 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1586 00:39:11.236862 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1587 00:39:11.236916 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1588 00:39:11.236970 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1589 00:39:11.237023 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1590 00:39:11.237078 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1591 00:39:11.237131 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1592 00:39:11.237185 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1593 00:39:11.237238 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1594 00:39:11.237340 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1595 00:39:11.237395 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1596 00:39:11.237449 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1597 00:39:11.237503 -1, [0] xxxxxxxx xxxxxxxx [MSB]
1598 00:39:11.237556 0, [0] xxxoxoxx oxxoxoxx [MSB]
1599 00:39:11.237611 1, [0] xxxoxoxx oxxoxoxx [MSB]
1600 00:39:11.237664 2, [0] xxxoxoxx oxxoxoox [MSB]
1601 00:39:11.237719 3, [0] xxxoxooo ooxoooox [MSB]
1602 00:39:11.237773 4, [0] xxxoxooo ooxooooo [MSB]
1603 00:39:11.237827 5, [0] xxxoxooo oooooooo [MSB]
1604 00:39:11.237880 6, [0] xxxoxooo oooooooo [MSB]
1605 00:39:11.237934 7, [0] xooooooo oooooooo [MSB]
1606 00:39:11.237987 8, [0] xooooooo oooooooo [MSB]
1607 00:39:11.238041 9, [0] xooooooo oooooooo [MSB]
1608 00:39:11.238094 33, [0] oooooooo oooooooo [MSB]
1609 00:39:11.238148 34, [0] oooxoooo oooooooo [MSB]
1610 00:39:11.238202 35, [0] oooxooxo oooooxxo [MSB]
1611 00:39:11.238258 36, [0] oooxooxx oooxoxxo [MSB]
1612 00:39:11.238312 37, [0] oooxoxxx xxoxxxxo [MSB]
1613 00:39:11.238366 38, [0] oooxoxxx xxoxxxxo [MSB]
1614 00:39:11.238419 39, [0] oooxoxxx xxoxxxxx [MSB]
1615 00:39:11.238472 40, [0] oooxoxxx xxoxxxxx [MSB]
1616 00:39:11.238526 41, [0] oooxxxxx xxoxxxxx [MSB]
1617 00:39:11.238579 42, [0] xoxxxxxx xxoxxxxx [MSB]
1618 00:39:11.238633 43, [0] xxxxxxxx xxxxxxxx [MSB]
1619 00:39:11.238687 iDelay=43, Bit 0, Center 25 (10 ~ 41) 32
1620 00:39:11.238740 iDelay=43, Bit 1, Center 24 (7 ~ 42) 36
1621 00:39:11.238793 iDelay=43, Bit 2, Center 24 (7 ~ 41) 35
1622 00:39:11.238846 iDelay=43, Bit 3, Center 16 (0 ~ 33) 34
1623 00:39:11.238899 iDelay=43, Bit 4, Center 23 (7 ~ 40) 34
1624 00:39:11.238951 iDelay=43, Bit 5, Center 18 (0 ~ 36) 37
1625 00:39:11.239004 iDelay=43, Bit 6, Center 18 (3 ~ 34) 32
1626 00:39:11.239057 iDelay=43, Bit 7, Center 19 (3 ~ 35) 33
1627 00:39:11.239109 iDelay=43, Bit 8, Center 18 (0 ~ 36) 37
1628 00:39:11.239162 iDelay=43, Bit 9, Center 19 (3 ~ 36) 34
1629 00:39:11.239215 iDelay=43, Bit 10, Center 23 (5 ~ 42) 38
1630 00:39:11.239268 iDelay=43, Bit 11, Center 17 (0 ~ 35) 36
1631 00:39:11.239321 iDelay=43, Bit 12, Center 19 (3 ~ 36) 34
1632 00:39:11.239373 iDelay=43, Bit 13, Center 17 (0 ~ 34) 35
1633 00:39:11.239426 iDelay=43, Bit 14, Center 18 (2 ~ 34) 33
1634 00:39:11.239478 iDelay=43, Bit 15, Center 21 (4 ~ 38) 35
1635 00:39:11.239530 ==
1636 00:39:11.239583 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1637 00:39:11.239637 fsp= 1, odt_onoff= 1, Byte mode= 0
1638 00:39:11.239690 ==
1639 00:39:11.239742 DQS Delay:
1640 00:39:11.239795 DQS0 = 0, DQS1 = 0
1641 00:39:11.239848 DQM Delay:
1642 00:39:11.239900 DQM0 = 20, DQM1 = 19
1643 00:39:11.239952 DQ Delay:
1644 00:39:11.240004 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =16
1645 00:39:11.240057 DQ4 =23, DQ5 =18, DQ6 =18, DQ7 =19
1646 00:39:11.240109 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17
1647 00:39:11.240162 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =21
1648 00:39:11.240214
1649 00:39:11.240267
1650 00:39:11.240319 DramC Write-DBI off
1651 00:39:11.240373 ==
1652 00:39:11.240426 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1653 00:39:11.240479 fsp= 1, odt_onoff= 1, Byte mode= 0
1654 00:39:11.240531 ==
1655 00:39:11.240584 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1656 00:39:11.240637
1657 00:39:11.240689 Begin, DQ Scan Range 923~1179
1658 00:39:11.240742
1659 00:39:11.240794
1660 00:39:11.240846 TX Vref Scan disable
1661 00:39:11.240899 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1662 00:39:11.240953 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1663 00:39:11.241008 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1664 00:39:11.241061 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1665 00:39:11.241116 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1666 00:39:11.241188 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1667 00:39:11.241244 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1668 00:39:11.241320 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1669 00:39:11.241375 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1670 00:39:11.241429 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1671 00:39:11.241483 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1672 00:39:11.241538 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1673 00:39:11.241592 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1674 00:39:11.241645 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1675 00:39:11.241699 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1676 00:39:11.241753 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1677 00:39:11.241807 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1678 00:39:11.241860 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1679 00:39:11.241914 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1680 00:39:11.241968 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1681 00:39:11.242022 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1682 00:39:11.242076 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1683 00:39:11.242129 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1684 00:39:11.242183 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1685 00:39:11.242236 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1686 00:39:11.242291 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1687 00:39:11.242345 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1688 00:39:11.242398 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1689 00:39:11.242453 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1690 00:39:11.242507 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1691 00:39:11.242561 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1692 00:39:11.242614 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1693 00:39:11.242668 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1694 00:39:11.242722 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1695 00:39:11.242775 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1696 00:39:11.243018 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1697 00:39:11.243078 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1698 00:39:11.243133 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1699 00:39:11.243188 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1700 00:39:11.243243 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1701 00:39:11.243297 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1702 00:39:11.243351 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1703 00:39:11.243405 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1704 00:39:11.243458 966 |3 6 6|[0] xxxxxxxx xxxoxoxx [MSB]
1705 00:39:11.243513 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1706 00:39:11.243566 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1707 00:39:11.243620 969 |3 6 9|[0] xxxxxxxx ooxooooo [MSB]
1708 00:39:11.243674 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1709 00:39:11.243728 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1710 00:39:11.243782 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1711 00:39:11.243836 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
1712 00:39:11.243889 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1713 00:39:11.243943 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1714 00:39:11.243997 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1715 00:39:11.244050 977 |3 6 17|[0] xoxooooo oooooooo [MSB]
1716 00:39:11.244105 987 |3 6 27|[0] oooooooo oooooxoo [MSB]
1717 00:39:11.244158 988 |3 6 28|[0] oooooooo xooxoxoo [MSB]
1718 00:39:11.244212 989 |3 6 29|[0] oooooooo xxoxxxxo [MSB]
1719 00:39:11.244265 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1720 00:39:11.244319 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1721 00:39:11.244373 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1722 00:39:11.244426 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1723 00:39:11.244480 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1724 00:39:11.244534 995 |3 6 35|[0] oooooxoo xxxxxxxx [MSB]
1725 00:39:11.244588 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1726 00:39:11.244642 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1727 00:39:11.244696 998 |3 6 38|[0] xxoxxxxx xxxxxxxx [MSB]
1728 00:39:11.244750 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1729 00:39:11.244803 Byte0, DQ PI dly=986, DQM PI dly= 986
1730 00:39:11.244857 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1731 00:39:11.244910
1732 00:39:11.244962 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1733 00:39:11.245015
1734 00:39:11.245069 Byte1, DQ PI dly=977, DQM PI dly= 977
1735 00:39:11.245121 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1736 00:39:11.245174
1737 00:39:11.245226 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1738 00:39:11.245321
1739 00:39:11.245375 ==
1740 00:39:11.245428 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1741 00:39:11.245481 fsp= 1, odt_onoff= 1, Byte mode= 0
1742 00:39:11.245534 ==
1743 00:39:11.245588 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1744 00:39:11.245641
1745 00:39:11.245694 Begin, DQ Scan Range 953~1017
1746 00:39:11.245747 Write Rank1 MR14 =0x0
1747 00:39:11.245800
1748 00:39:11.245852 CH=0, VrefRange= 0, VrefLevel = 0
1749 00:39:11.245906 TX Bit0 (980~999) 20 989, Bit8 (968~983) 16 975,
1750 00:39:11.245959 TX Bit1 (979~998) 20 988, Bit9 (969~983) 15 976,
1751 00:39:11.246013 TX Bit2 (979~997) 19 988, Bit10 (973~989) 17 981,
1752 00:39:11.246067 TX Bit3 (974~991) 18 982, Bit11 (968~983) 16 975,
1753 00:39:11.246120 TX Bit4 (979~997) 19 988, Bit12 (969~984) 16 976,
1754 00:39:11.246173 TX Bit5 (977~991) 15 984, Bit13 (968~983) 16 975,
1755 00:39:11.246226 TX Bit6 (977~992) 16 984, Bit14 (969~983) 15 976,
1756 00:39:11.246280 TX Bit7 (978~993) 16 985, Bit15 (971~986) 16 978,
1757 00:39:11.246333
1758 00:39:11.246385 Write Rank1 MR14 =0x2
1759 00:39:11.246438
1760 00:39:11.246490 CH=0, VrefRange= 0, VrefLevel = 2
1761 00:39:11.246543 TX Bit0 (980~999) 20 989, Bit8 (968~984) 17 976,
1762 00:39:11.246596 TX Bit1 (978~998) 21 988, Bit9 (969~984) 16 976,
1763 00:39:11.246650 TX Bit2 (979~998) 20 988, Bit10 (973~989) 17 981,
1764 00:39:11.246704 TX Bit3 (974~992) 19 983, Bit11 (967~983) 17 975,
1765 00:39:11.246757 TX Bit4 (979~998) 20 988, Bit12 (968~984) 17 976,
1766 00:39:11.246811 TX Bit5 (976~991) 16 983, Bit13 (968~983) 16 975,
1767 00:39:11.246864 TX Bit6 (977~992) 16 984, Bit14 (969~984) 16 976,
1768 00:39:11.246917 TX Bit7 (978~994) 17 986, Bit15 (971~987) 17 979,
1769 00:39:11.246970
1770 00:39:11.247022 Write Rank1 MR14 =0x4
1771 00:39:11.247075
1772 00:39:11.247127 CH=0, VrefRange= 0, VrefLevel = 4
1773 00:39:11.247203 TX Bit0 (980~999) 20 989, Bit8 (968~984) 17 976,
1774 00:39:11.247270 TX Bit1 (979~998) 20 988, Bit9 (969~984) 16 976,
1775 00:39:11.247324 TX Bit2 (979~998) 20 988, Bit10 (972~989) 18 980,
1776 00:39:11.247377 TX Bit3 (973~992) 20 982, Bit11 (968~984) 17 976,
1777 00:39:11.247430 TX Bit4 (979~998) 20 988, Bit12 (968~984) 17 976,
1778 00:39:11.247483 TX Bit5 (976~991) 16 983, Bit13 (968~983) 16 975,
1779 00:39:11.247537 TX Bit6 (976~993) 18 984, Bit14 (968~984) 17 976,
1780 00:39:11.247590 TX Bit7 (978~995) 18 986, Bit15 (970~988) 19 979,
1781 00:39:11.247642
1782 00:39:11.247694 Write Rank1 MR14 =0x6
1783 00:39:11.247746
1784 00:39:11.247798 CH=0, VrefRange= 0, VrefLevel = 6
1785 00:39:11.247852 TX Bit0 (979~1000) 22 989, Bit8 (968~985) 18 976,
1786 00:39:11.247905 TX Bit1 (978~999) 22 988, Bit9 (968~985) 18 976,
1787 00:39:11.247959 TX Bit2 (979~998) 20 988, Bit10 (972~989) 18 980,
1788 00:39:11.248013 TX Bit3 (973~992) 20 982, Bit11 (967~984) 18 975,
1789 00:39:11.248065 TX Bit4 (978~999) 22 988, Bit12 (968~985) 18 976,
1790 00:39:11.248118 TX Bit5 (976~992) 17 984, Bit13 (968~984) 17 976,
1791 00:39:11.248172 TX Bit6 (976~993) 18 984, Bit14 (968~985) 18 976,
1792 00:39:11.248225 TX Bit7 (977~996) 20 986, Bit15 (971~988) 18 979,
1793 00:39:11.248277
1794 00:39:11.248329 Write Rank1 MR14 =0x8
1795 00:39:11.248381
1796 00:39:11.248434 CH=0, VrefRange= 0, VrefLevel = 8
1797 00:39:11.248486 TX Bit0 (979~1000) 22 989, Bit8 (967~985) 19 976,
1798 00:39:11.248539 TX Bit1 (978~999) 22 988, Bit9 (968~985) 18 976,
1799 00:39:11.248592 TX Bit2 (978~998) 21 988, Bit10 (972~990) 19 981,
1800 00:39:11.248646 TX Bit3 (973~993) 21 983, Bit11 (967~985) 19 976,
1801 00:39:11.248700 TX Bit4 (978~999) 22 988, Bit12 (968~986) 19 977,
1802 00:39:11.248941 TX Bit5 (975~992) 18 983, Bit13 (967~984) 18 975,
1803 00:39:11.249003 TX Bit6 (975~994) 20 984, Bit14 (968~985) 18 976,
1804 00:39:11.249058 TX Bit7 (977~997) 21 987, Bit15 (970~989) 20 979,
1805 00:39:11.249111
1806 00:39:11.249165 Write Rank1 MR14 =0xa
1807 00:39:11.249217
1808 00:39:11.249275 CH=0, VrefRange= 0, VrefLevel = 10
1809 00:39:11.249368 TX Bit0 (979~1000) 22 989, Bit8 (968~986) 19 977,
1810 00:39:11.249421 TX Bit1 (978~999) 22 988, Bit9 (968~986) 19 977,
1811 00:39:11.249475 TX Bit2 (978~999) 22 988, Bit10 (971~990) 20 980,
1812 00:39:11.249528 TX Bit3 (972~993) 22 982, Bit11 (966~985) 20 975,
1813 00:39:11.249581 TX Bit4 (978~999) 22 988, Bit12 (968~986) 19 977,
1814 00:39:11.249634 TX Bit5 (975~992) 18 983, Bit13 (967~984) 18 975,
1815 00:39:11.249687 TX Bit6 (975~995) 21 985, Bit14 (968~986) 19 977,
1816 00:39:11.249740 TX Bit7 (977~997) 21 987, Bit15 (970~989) 20 979,
1817 00:39:11.249793
1818 00:39:11.249845 Write Rank1 MR14 =0xc
1819 00:39:11.249898
1820 00:39:11.249950 CH=0, VrefRange= 0, VrefLevel = 12
1821 00:39:11.250004 TX Bit0 (978~1000) 23 989, Bit8 (967~986) 20 976,
1822 00:39:11.250057 TX Bit1 (978~999) 22 988, Bit9 (968~987) 20 977,
1823 00:39:11.250110 TX Bit2 (978~999) 22 988, Bit10 (971~990) 20 980,
1824 00:39:11.250164 TX Bit3 (971~994) 24 982, Bit11 (966~986) 21 976,
1825 00:39:11.250217 TX Bit4 (978~999) 22 988, Bit12 (968~987) 20 977,
1826 00:39:11.250270 TX Bit5 (974~993) 20 983, Bit13 (966~985) 20 975,
1827 00:39:11.250323 TX Bit6 (975~995) 21 985, Bit14 (967~986) 20 976,
1828 00:39:11.250376 TX Bit7 (977~997) 21 987, Bit15 (969~989) 21 979,
1829 00:39:11.250428
1830 00:39:11.250481 Write Rank1 MR14 =0xe
1831 00:39:11.250534
1832 00:39:11.250586 CH=0, VrefRange= 0, VrefLevel = 14
1833 00:39:11.250639 TX Bit0 (978~1001) 24 989, Bit8 (967~987) 21 977,
1834 00:39:11.250692 TX Bit1 (978~999) 22 988, Bit9 (968~988) 21 978,
1835 00:39:11.250746 TX Bit2 (978~999) 22 988, Bit10 (971~990) 20 980,
1836 00:39:11.250800 TX Bit3 (971~995) 25 983, Bit11 (966~986) 21 976,
1837 00:39:11.250853 TX Bit4 (978~1000) 23 989, Bit12 (967~987) 21 977,
1838 00:39:11.250907 TX Bit5 (974~994) 21 984, Bit13 (966~985) 20 975,
1839 00:39:11.250960 TX Bit6 (974~996) 23 985, Bit14 (967~987) 21 977,
1840 00:39:11.251013 TX Bit7 (976~998) 23 987, Bit15 (969~989) 21 979,
1841 00:39:11.251065
1842 00:39:11.251117 Write Rank1 MR14 =0x10
1843 00:39:11.251170
1844 00:39:11.251223 CH=0, VrefRange= 0, VrefLevel = 16
1845 00:39:11.251276 TX Bit0 (978~1001) 24 989, Bit8 (967~988) 22 977,
1846 00:39:11.251329 TX Bit1 (978~1000) 23 989, Bit9 (968~988) 21 978,
1847 00:39:11.251382 TX Bit2 (978~1000) 23 989, Bit10 (970~991) 22 980,
1848 00:39:11.251435 TX Bit3 (970~995) 26 982, Bit11 (966~987) 22 976,
1849 00:39:11.251489 TX Bit4 (978~1000) 23 989, Bit12 (967~988) 22 977,
1850 00:39:11.251542 TX Bit5 (973~994) 22 983, Bit13 (966~986) 21 976,
1851 00:39:11.251595 TX Bit6 (974~997) 24 985, Bit14 (967~988) 22 977,
1852 00:39:11.251648 TX Bit7 (977~998) 22 987, Bit15 (969~990) 22 979,
1853 00:39:11.251701
1854 00:39:11.251753 Write Rank1 MR14 =0x12
1855 00:39:11.251805
1856 00:39:11.251857 CH=0, VrefRange= 0, VrefLevel = 18
1857 00:39:11.251910 TX Bit0 (978~1001) 24 989, Bit8 (967~988) 22 977,
1858 00:39:11.251963 TX Bit1 (977~1000) 24 988, Bit9 (968~989) 22 978,
1859 00:39:11.252016 TX Bit2 (978~1000) 23 989, Bit10 (970~991) 22 980,
1860 00:39:11.252070 TX Bit3 (971~996) 26 983, Bit11 (966~987) 22 976,
1861 00:39:11.252123 TX Bit4 (977~1000) 24 988, Bit12 (967~988) 22 977,
1862 00:39:11.252176 TX Bit5 (973~995) 23 984, Bit13 (966~987) 22 976,
1863 00:39:11.252230 TX Bit6 (974~998) 25 986, Bit14 (967~988) 22 977,
1864 00:39:11.252282 TX Bit7 (976~998) 23 987, Bit15 (969~990) 22 979,
1865 00:39:11.252336
1866 00:39:11.252388 Write Rank1 MR14 =0x14
1867 00:39:11.252440
1868 00:39:11.252493 CH=0, VrefRange= 0, VrefLevel = 20
1869 00:39:11.252545 TX Bit0 (978~1002) 25 990, Bit8 (966~988) 23 977,
1870 00:39:11.252598 TX Bit1 (977~1000) 24 988, Bit9 (967~989) 23 978,
1871 00:39:11.252652 TX Bit2 (978~1000) 23 989, Bit10 (969~991) 23 980,
1872 00:39:11.252705 TX Bit3 (970~996) 27 983, Bit11 (966~988) 23 977,
1873 00:39:11.252759 TX Bit4 (977~1001) 25 989, Bit12 (967~989) 23 978,
1874 00:39:11.252812 TX Bit5 (972~995) 24 983, Bit13 (965~987) 23 976,
1875 00:39:11.252865 TX Bit6 (973~998) 26 985, Bit14 (966~989) 24 977,
1876 00:39:11.252918 TX Bit7 (976~999) 24 987, Bit15 (969~990) 22 979,
1877 00:39:11.252971
1878 00:39:11.253022 Write Rank1 MR14 =0x16
1879 00:39:11.253075
1880 00:39:11.253127 CH=0, VrefRange= 0, VrefLevel = 22
1881 00:39:11.253180 TX Bit0 (978~1002) 25 990, Bit8 (966~988) 23 977,
1882 00:39:11.253233 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1883 00:39:11.253323 TX Bit2 (977~1000) 24 988, Bit10 (969~991) 23 980,
1884 00:39:11.253377 TX Bit3 (970~996) 27 983, Bit11 (965~988) 24 976,
1885 00:39:11.253431 TX Bit4 (977~1001) 25 989, Bit12 (966~989) 24 977,
1886 00:39:11.253484 TX Bit5 (972~996) 25 984, Bit13 (965~986) 22 975,
1887 00:39:11.253537 TX Bit6 (973~998) 26 985, Bit14 (967~989) 23 978,
1888 00:39:11.253589 TX Bit7 (976~999) 24 987, Bit15 (968~990) 23 979,
1889 00:39:11.253642
1890 00:39:11.253694 Write Rank1 MR14 =0x18
1891 00:39:11.253746
1892 00:39:11.253799 CH=0, VrefRange= 0, VrefLevel = 24
1893 00:39:11.253852 TX Bit0 (977~1003) 27 990, Bit8 (966~988) 23 977,
1894 00:39:11.253905 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1895 00:39:11.253958 TX Bit2 (977~1001) 25 989, Bit10 (969~991) 23 980,
1896 00:39:11.254012 TX Bit3 (970~995) 26 982, Bit11 (966~988) 23 977,
1897 00:39:11.254065 TX Bit4 (976~1001) 26 988, Bit12 (966~989) 24 977,
1898 00:39:11.254117 TX Bit5 (972~997) 26 984, Bit13 (964~986) 23 975,
1899 00:39:11.254170 TX Bit6 (972~998) 27 985, Bit14 (967~988) 22 977,
1900 00:39:11.254223 TX Bit7 (975~999) 25 987, Bit15 (968~990) 23 979,
1901 00:39:11.254277
1902 00:39:11.254328 Write Rank1 MR14 =0x1a
1903 00:39:11.254381
1904 00:39:11.254433 CH=0, VrefRange= 0, VrefLevel = 26
1905 00:39:11.254675 TX Bit0 (977~1003) 27 990, Bit8 (966~988) 23 977,
1906 00:39:11.254739 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1907 00:39:11.254794 TX Bit2 (977~1001) 25 989, Bit10 (969~991) 23 980,
1908 00:39:11.395399 TX Bit3 (970~995) 26 982, Bit11 (966~988) 23 977,
1909 00:39:11.395881 TX Bit4 (976~1001) 26 988, Bit12 (966~989) 24 977,
1910 00:39:11.396223 TX Bit5 (972~997) 26 984, Bit13 (964~986) 23 975,
1911 00:39:11.396539 TX Bit6 (972~998) 27 985, Bit14 (967~988) 22 977,
1912 00:39:11.396860 TX Bit7 (975~999) 25 987, Bit15 (968~990) 23 979,
1913 00:39:11.397154
1914 00:39:11.397545 Write Rank1 MR14 =0x1c
1915 00:39:11.397868
1916 00:39:11.398156 CH=0, VrefRange= 0, VrefLevel = 28
1917 00:39:11.398443 TX Bit0 (977~1003) 27 990, Bit8 (966~988) 23 977,
1918 00:39:11.398729 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1919 00:39:11.399014 TX Bit2 (977~1001) 25 989, Bit10 (969~991) 23 980,
1920 00:39:11.399296 TX Bit3 (970~995) 26 982, Bit11 (966~988) 23 977,
1921 00:39:11.399597 TX Bit4 (976~1001) 26 988, Bit12 (966~989) 24 977,
1922 00:39:11.399877 TX Bit5 (972~997) 26 984, Bit13 (964~986) 23 975,
1923 00:39:11.400158 TX Bit6 (972~998) 27 985, Bit14 (967~988) 22 977,
1924 00:39:11.400437 TX Bit7 (975~999) 25 987, Bit15 (968~990) 23 979,
1925 00:39:11.400715
1926 00:39:11.401036 Write Rank1 MR14 =0x1e
1927 00:39:11.401470
1928 00:39:11.401757 CH=0, VrefRange= 0, VrefLevel = 30
1929 00:39:11.402038 TX Bit0 (977~1003) 27 990, Bit8 (966~988) 23 977,
1930 00:39:11.402317 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1931 00:39:11.402595 TX Bit2 (977~1001) 25 989, Bit10 (969~991) 23 980,
1932 00:39:11.402875 TX Bit3 (970~995) 26 982, Bit11 (966~988) 23 977,
1933 00:39:11.403153 TX Bit4 (976~1001) 26 988, Bit12 (966~989) 24 977,
1934 00:39:11.403431 TX Bit5 (972~997) 26 984, Bit13 (964~986) 23 975,
1935 00:39:11.403708 TX Bit6 (972~998) 27 985, Bit14 (967~988) 22 977,
1936 00:39:11.403985 TX Bit7 (975~999) 25 987, Bit15 (968~990) 23 979,
1937 00:39:11.404260
1938 00:39:11.404531
1939 00:39:11.404806 TX Vref found, early break! 366< 371
1940 00:39:11.405194 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1941 00:39:11.405507 u1DelayCellOfst[0]=10 cells (8 PI)
1942 00:39:11.405784 u1DelayCellOfst[1]=8 cells (7 PI)
1943 00:39:11.406060 u1DelayCellOfst[2]=8 cells (7 PI)
1944 00:39:11.406335 u1DelayCellOfst[3]=0 cells (0 PI)
1945 00:39:11.406612 u1DelayCellOfst[4]=7 cells (6 PI)
1946 00:39:11.406889 u1DelayCellOfst[5]=2 cells (2 PI)
1947 00:39:11.407258 u1DelayCellOfst[6]=3 cells (3 PI)
1948 00:39:11.407607 u1DelayCellOfst[7]=6 cells (5 PI)
1949 00:39:11.407893 Byte0, DQ PI dly=982, DQM PI dly= 986
1950 00:39:11.408316 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1951 00:39:11.408609
1952 00:39:11.408886 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1953 00:39:11.409170
1954 00:39:11.409465 u1DelayCellOfst[8]=2 cells (2 PI)
1955 00:39:11.409745 u1DelayCellOfst[9]=3 cells (3 PI)
1956 00:39:11.410019 u1DelayCellOfst[10]=6 cells (5 PI)
1957 00:39:11.410295 u1DelayCellOfst[11]=2 cells (2 PI)
1958 00:39:11.410569 u1DelayCellOfst[12]=2 cells (2 PI)
1959 00:39:11.410844 u1DelayCellOfst[13]=0 cells (0 PI)
1960 00:39:11.411119 u1DelayCellOfst[14]=2 cells (2 PI)
1961 00:39:11.411461 u1DelayCellOfst[15]=5 cells (4 PI)
1962 00:39:11.411752 Byte1, DQ PI dly=975, DQM PI dly= 977
1963 00:39:11.412031 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1964 00:39:11.412308
1965 00:39:11.412582 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1966 00:39:11.412861
1967 00:39:11.413134 Write Rank1 MR14 =0x18
1968 00:39:11.413430
1969 00:39:11.413707 Final TX Range 0 Vref 24
1970 00:39:11.413982
1971 00:39:11.414258 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1972 00:39:11.414639
1973 00:39:11.414927 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1974 00:39:11.415208 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1975 00:39:11.415492 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1976 00:39:11.415773 Write Rank1 MR3 =0xb0
1977 00:39:11.416050 DramC Write-DBI on
1978 00:39:11.416324 ==
1979 00:39:11.416601 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1980 00:39:11.416879 fsp= 1, odt_onoff= 1, Byte mode= 0
1981 00:39:11.417158 ==
1982 00:39:11.417461 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1983 00:39:11.417740
1984 00:39:11.418010 Begin, DQ Scan Range 697~761
1985 00:39:11.418286
1986 00:39:11.418570
1987 00:39:11.418841 TX Vref Scan disable
1988 00:39:11.419116 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1989 00:39:11.419399 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1990 00:39:11.419682 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1991 00:39:11.419965 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1992 00:39:11.420243 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1993 00:39:11.420467 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1994 00:39:11.420664 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1995 00:39:11.420864 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1996 00:39:11.421061 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1997 00:39:11.421271 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1998 00:39:11.421476 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1999 00:39:11.421674 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
2000 00:39:11.421873 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2001 00:39:11.422071 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2002 00:39:11.422269 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2003 00:39:11.422470 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2004 00:39:11.422667 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2005 00:39:11.422866 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2006 00:39:11.423065 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2007 00:39:11.423264 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2008 00:39:11.423462 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2009 00:39:11.423663 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
2010 00:39:11.423863 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2011 00:39:11.424061 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2012 00:39:11.424261 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2013 00:39:11.424460 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2014 00:39:11.424660 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2015 00:39:11.425169 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2016 00:39:11.425418 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2017 00:39:11.425574 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2018 00:39:11.425729 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2019 00:39:11.425882 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2020 00:39:11.426035 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
2021 00:39:11.426187 Byte0, DQ PI dly=731, DQM PI dly= 731
2022 00:39:11.426335 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
2023 00:39:11.426487
2024 00:39:11.426635 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
2025 00:39:11.426786
2026 00:39:11.426932 Byte1, DQ PI dly=720, DQM PI dly= 720
2027 00:39:11.427082 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)
2028 00:39:11.427231
2029 00:39:11.427379 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)
2030 00:39:11.427530
2031 00:39:11.427679 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2032 00:39:11.427830 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2033 00:39:11.427981 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2034 00:39:11.428131 Write Rank1 MR3 =0x30
2035 00:39:11.428280 DramC Write-DBI off
2036 00:39:11.428428
2037 00:39:11.428574 [DATLAT]
2038 00:39:11.428722 Freq=1600, CH0 RK1, use_rxtx_scan=0
2039 00:39:11.428871
2040 00:39:11.429018 DATLAT Default: 0x10
2041 00:39:11.429167 7, 0xFFFF, sum=0
2042 00:39:11.429328 8, 0xFFFF, sum=0
2043 00:39:11.429481 9, 0xFFFF, sum=0
2044 00:39:11.429631 10, 0xFFFF, sum=0
2045 00:39:11.429783 11, 0xFFFF, sum=0
2046 00:39:11.429934 12, 0xFFFF, sum=0
2047 00:39:11.430084 13, 0xFFFF, sum=0
2048 00:39:11.430233 14, 0x0, sum=1
2049 00:39:11.430379 15, 0x0, sum=2
2050 00:39:11.430499 16, 0x0, sum=3
2051 00:39:11.430620 17, 0x0, sum=4
2052 00:39:11.430738 pattern=2 first_step=14 total pass=5 best_step=16
2053 00:39:11.430858 ==
2054 00:39:11.430976 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2055 00:39:11.431096 fsp= 1, odt_onoff= 1, Byte mode= 0
2056 00:39:11.431216 ==
2057 00:39:11.431335 Start DQ dly to find pass range UseTestEngine =1
2058 00:39:11.431454 x-axis: bit #, y-axis: DQ dly (-127~63)
2059 00:39:11.431574 RX Vref Scan = 0
2060 00:39:11.431691 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2061 00:39:11.431813 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2062 00:39:11.431935 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2063 00:39:11.432057 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2064 00:39:11.432178 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2065 00:39:11.432299 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2066 00:39:11.432420 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2067 00:39:11.432540 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2068 00:39:11.432661 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2069 00:39:11.432781 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2070 00:39:11.432902 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2071 00:39:11.433023 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2072 00:39:11.433144 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2073 00:39:11.433274 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2074 00:39:11.433397 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2075 00:39:11.433518 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2076 00:39:11.433639 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2077 00:39:11.433758 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2078 00:39:11.433879 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2079 00:39:11.434000 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2080 00:39:11.434122 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2081 00:39:11.434243 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2082 00:39:11.434363 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2083 00:39:11.434484 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2084 00:39:11.434605 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2085 00:39:11.434725 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2086 00:39:11.434846 0, [0] xxxoxoxx xxxoxoxx [MSB]
2087 00:39:11.434967 1, [0] xxxoxoxx oxxoxoxx [MSB]
2088 00:39:11.435088 2, [0] xxxoxoxx ooxoooox [MSB]
2089 00:39:11.435208 3, [0] xxxoxooo ooxoooox [MSB]
2090 00:39:11.435344 4, [0] xxxoxooo ooxooooo [MSB]
2091 00:39:11.435446 5, [0] xxxoxooo ooxooooo [MSB]
2092 00:39:11.435547 6, [0] xxxooooo oooooooo [MSB]
2093 00:39:11.435649 7, [0] xoxooooo oooooooo [MSB]
2094 00:39:11.435751 8, [0] xooooooo oooooooo [MSB]
2095 00:39:11.435852 33, [0] oooxoooo oooooooo [MSB]
2096 00:39:11.435953 34, [0] oooxoooo oooooxoo [MSB]
2097 00:39:11.436054 35, [0] oooxoooo oooxoxoo [MSB]
2098 00:39:11.436154 36, [0] oooxoxoo oooxoxxo [MSB]
2099 00:39:11.436255 37, [0] oooxoxxx xooxoxxo [MSB]
2100 00:39:11.436356 38, [0] oooxoxxx xxoxxxxx [MSB]
2101 00:39:11.436458 39, [0] oooxoxxx xxoxxxxx [MSB]
2102 00:39:11.436559 40, [0] oooxoxxx xxoxxxxx [MSB]
2103 00:39:11.436659 41, [0] oooxxxxx xxoxxxxx [MSB]
2104 00:39:11.436760 42, [0] oooxxxxx xxoxxxxx [MSB]
2105 00:39:11.436862 43, [0] xxxxxxxx xxxxxxxx [MSB]
2106 00:39:11.436963 iDelay=43, Bit 0, Center 25 (9 ~ 42) 34
2107 00:39:11.437063 iDelay=43, Bit 1, Center 24 (7 ~ 42) 36
2108 00:39:11.437163 iDelay=43, Bit 2, Center 25 (8 ~ 42) 35
2109 00:39:11.437272 iDelay=43, Bit 3, Center 15 (-1 ~ 32) 34
2110 00:39:11.437374 iDelay=43, Bit 4, Center 23 (6 ~ 40) 35
2111 00:39:11.437473 iDelay=43, Bit 5, Center 17 (0 ~ 35) 36
2112 00:39:11.437572 iDelay=43, Bit 6, Center 19 (3 ~ 36) 34
2113 00:39:11.437671 iDelay=43, Bit 7, Center 19 (3 ~ 36) 34
2114 00:39:11.437770 iDelay=43, Bit 8, Center 18 (1 ~ 36) 36
2115 00:39:11.437869 iDelay=43, Bit 9, Center 19 (2 ~ 37) 36
2116 00:39:11.437968 iDelay=43, Bit 10, Center 24 (6 ~ 42) 37
2117 00:39:11.438068 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
2118 00:39:11.438167 iDelay=43, Bit 12, Center 19 (2 ~ 37) 36
2119 00:39:11.438266 iDelay=43, Bit 13, Center 16 (0 ~ 33) 34
2120 00:39:11.438366 iDelay=43, Bit 14, Center 18 (2 ~ 35) 34
2121 00:39:11.438465 iDelay=43, Bit 15, Center 20 (4 ~ 37) 34
2122 00:39:11.438564 ==
2123 00:39:11.438663 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2124 00:39:11.438765 fsp= 1, odt_onoff= 1, Byte mode= 0
2125 00:39:11.438865 ==
2126 00:39:11.438965 DQS Delay:
2127 00:39:11.439063 DQS0 = 0, DQS1 = 0
2128 00:39:11.439163 DQM Delay:
2129 00:39:11.439262 DQM0 = 20, DQM1 = 18
2130 00:39:11.439361 DQ Delay:
2131 00:39:11.439460 DQ0 =25, DQ1 =24, DQ2 =25, DQ3 =15
2132 00:39:11.439559 DQ4 =23, DQ5 =17, DQ6 =19, DQ7 =19
2133 00:39:11.439659 DQ8 =18, DQ9 =19, DQ10 =24, DQ11 =17
2134 00:39:11.439758 DQ12 =19, DQ13 =16, DQ14 =18, DQ15 =20
2135 00:39:11.439857
2136 00:39:11.439956
2137 00:39:11.440055
2138 00:39:11.440154 [DramC_TX_OE_Calibration] TA2
2139 00:39:11.440253 Original DQ_B0 (3 6) =30, OEN = 27
2140 00:39:11.440363 Original DQ_B1 (3 6) =30, OEN = 27
2141 00:39:11.440449 23, 0x0, End_B0=23 End_B1=23
2142 00:39:11.440535 24, 0x0, End_B0=24 End_B1=24
2143 00:39:11.440621 25, 0x0, End_B0=25 End_B1=25
2144 00:39:11.440707 26, 0x0, End_B0=26 End_B1=26
2145 00:39:11.441011 27, 0x0, End_B0=27 End_B1=27
2146 00:39:11.441110 28, 0x0, End_B0=28 End_B1=28
2147 00:39:11.441201 29, 0x0, End_B0=29 End_B1=29
2148 00:39:11.441298 30, 0x0, End_B0=30 End_B1=30
2149 00:39:11.441388 31, 0xFFFE, End_B0=30 End_B1=30
2150 00:39:11.441476 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2151 00:39:11.441565 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2152 00:39:11.441652
2153 00:39:11.441737
2154 00:39:11.441822 Write Rank1 MR23 =0x3f
2155 00:39:11.441909 [DQSOSC]
2156 00:39:11.441995 [DQSOSCAuto] RK1, (LSB)MR18= 0x78, (MSB)MR19= 0x3, tDQSOscB0 = 354 ps tDQSOscB1 = 0 ps
2157 00:39:11.442083 CH0_RK1: MR19=0x3, MR18=0x78, DQSOSC=354, MR23=63, INC=19, DEC=29
2158 00:39:11.442170 Write Rank1 MR23 =0x3f
2159 00:39:11.442255 [DQSOSC]
2160 00:39:11.442341 [DQSOSCAuto] RK1, (LSB)MR18= 0x7c, (MSB)MR19= 0x3, tDQSOscB0 = 353 ps tDQSOscB1 = 0 ps
2161 00:39:11.442427 CH0 RK1: MR19=3, MR18=7C
2162 00:39:11.442511 [RxdqsGatingPostProcess] freq 1600
2163 00:39:11.442598 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2164 00:39:11.442683 Rank: 0
2165 00:39:11.442768 best DQS0 dly(2T, 0.5T) = (2, 5)
2166 00:39:11.442853 best DQS1 dly(2T, 0.5T) = (2, 5)
2167 00:39:11.442938 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2168 00:39:11.443024 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2169 00:39:11.443109 Rank: 1
2170 00:39:11.443193 best DQS0 dly(2T, 0.5T) = (2, 6)
2171 00:39:11.443278 best DQS1 dly(2T, 0.5T) = (2, 6)
2172 00:39:11.443364 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2173 00:39:11.443449 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2174 00:39:11.443533 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2175 00:39:11.443620 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2176 00:39:11.443706 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2177 00:39:11.443792 Write Rank0 MR13 =0x59
2178 00:39:11.443877 ==
2179 00:39:11.443963 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2180 00:39:11.444050 fsp= 1, odt_onoff= 1, Byte mode= 0
2181 00:39:11.444137 ==
2182 00:39:11.444222 === u2Vref_new: 0x56 --> 0x3a
2183 00:39:11.444309 === u2Vref_new: 0x58 --> 0x58
2184 00:39:11.444395 === u2Vref_new: 0x5a --> 0x5a
2185 00:39:11.444481 === u2Vref_new: 0x5c --> 0x78
2186 00:39:11.444567 === u2Vref_new: 0x5e --> 0x7a
2187 00:39:11.444653 === u2Vref_new: 0x60 --> 0x90
2188 00:39:11.444739 [CA 0] Center 36 (9~63) winsize 55
2189 00:39:11.444824 [CA 1] Center 35 (8~63) winsize 56
2190 00:39:11.444910 [CA 2] Center 32 (3~61) winsize 59
2191 00:39:11.444995 [CA 3] Center 33 (3~63) winsize 61
2192 00:39:11.445080 [CA 4] Center 33 (3~63) winsize 61
2193 00:39:11.445166 [CA 5] Center 26 (-1~53) winsize 55
2194 00:39:11.445252
2195 00:39:11.445344 [CATrainingPosCal] consider 1 rank data
2196 00:39:11.445434 u2DelayCellTimex100 = 762/100 ps
2197 00:39:11.445509 CA0 delay=36 (9~63),Diff = 10 PI (12 cell)
2198 00:39:11.445584 CA1 delay=35 (8~63),Diff = 9 PI (11 cell)
2199 00:39:11.445660 CA2 delay=32 (3~61),Diff = 6 PI (7 cell)
2200 00:39:11.445735 CA3 delay=33 (3~63),Diff = 7 PI (8 cell)
2201 00:39:11.445810 CA4 delay=33 (3~63),Diff = 7 PI (8 cell)
2202 00:39:11.445885 CA5 delay=26 (-1~53),Diff = 0 PI (0 cell)
2203 00:39:11.445960
2204 00:39:11.446035 CA PerBit enable=1, Macro0, CA PI delay=26
2205 00:39:11.446111 === u2Vref_new: 0x58 --> 0x58
2206 00:39:11.446187
2207 00:39:11.446261 Vref(ca) range 1: 24
2208 00:39:11.446337
2209 00:39:11.446412 CS Dly= 10 (41-0-32)
2210 00:39:11.446487 Write Rank0 MR13 =0xd8
2211 00:39:11.446562 Write Rank0 MR13 =0xd8
2212 00:39:11.446637 Write Rank0 MR12 =0x58
2213 00:39:11.446712 Write Rank1 MR13 =0x59
2214 00:39:11.446786 ==
2215 00:39:11.446861 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2216 00:39:11.446937 fsp= 1, odt_onoff= 1, Byte mode= 0
2217 00:39:11.447012 ==
2218 00:39:11.447088 === u2Vref_new: 0x56 --> 0x3a
2219 00:39:11.447164 === u2Vref_new: 0x58 --> 0x58
2220 00:39:11.447238 === u2Vref_new: 0x5a --> 0x5a
2221 00:39:11.447314 === u2Vref_new: 0x5c --> 0x78
2222 00:39:11.447389 === u2Vref_new: 0x5e --> 0x7a
2223 00:39:11.447483 === u2Vref_new: 0x60 --> 0x90
2224 00:39:11.447563 [CA 0] Center 36 (10~63) winsize 54
2225 00:39:11.449440 [CA 1] Center 35 (8~63) winsize 56
2226 00:39:11.452893 [CA 2] Center 33 (3~63) winsize 61
2227 00:39:11.456274 [CA 3] Center 33 (3~63) winsize 61
2228 00:39:11.459315 [CA 4] Center 34 (5~63) winsize 59
2229 00:39:11.462587 [CA 5] Center 25 (-2~53) winsize 56
2230 00:39:11.462854
2231 00:39:11.466374 [CATrainingPosCal] consider 2 rank data
2232 00:39:11.469251 u2DelayCellTimex100 = 762/100 ps
2233 00:39:11.472714 CA0 delay=36 (10~63),Diff = 10 PI (12 cell)
2234 00:39:11.475878 CA1 delay=35 (8~63),Diff = 9 PI (11 cell)
2235 00:39:11.479391 CA2 delay=32 (3~61),Diff = 6 PI (7 cell)
2236 00:39:11.482884 CA3 delay=33 (3~63),Diff = 7 PI (8 cell)
2237 00:39:11.486499 CA4 delay=34 (5~63),Diff = 8 PI (10 cell)
2238 00:39:11.489398 CA5 delay=26 (-1~53),Diff = 0 PI (0 cell)
2239 00:39:11.489645
2240 00:39:11.493172 CA PerBit enable=1, Macro0, CA PI delay=26
2241 00:39:11.496235 === u2Vref_new: 0x58 --> 0x58
2242 00:39:11.496483
2243 00:39:11.499806 Vref(ca) range 1: 24
2244 00:39:11.500052
2245 00:39:11.502960 CS Dly= 11 (42-0-32)
2246 00:39:11.503274 Write Rank1 MR13 =0xd8
2247 00:39:11.506652 Write Rank1 MR13 =0xd8
2248 00:39:11.506902 Write Rank1 MR12 =0x58
2249 00:39:11.509945 [RankSwap] Rank num 2, (Multi 1), Rank 0
2250 00:39:11.512536 Write Rank0 MR2 =0xad
2251 00:39:11.512620 [Write Leveling]
2252 00:39:11.516126 delay byte0 byte1 byte2 byte3
2253 00:39:11.516210
2254 00:39:11.519661 10 0 0
2255 00:39:11.519746 11 0 0
2256 00:39:11.522754 12 0 0
2257 00:39:11.522841 13 0 0
2258 00:39:11.522909 14 0 0
2259 00:39:11.526610 15 0 0
2260 00:39:11.526695 16 0 0
2261 00:39:11.529573 17 0 0
2262 00:39:11.529658 18 0 0
2263 00:39:11.533253 19 0 0
2264 00:39:11.533375 20 0 0
2265 00:39:11.533443 21 0 0
2266 00:39:11.536855 22 0 0
2267 00:39:11.536945 23 0 0
2268 00:39:11.539774 24 0 0
2269 00:39:11.539875 25 0 0
2270 00:39:11.539974 26 0 0
2271 00:39:11.542844 27 0 0
2272 00:39:11.542927 28 0 0
2273 00:39:11.547077 29 0 0
2274 00:39:11.547162 30 0 0
2275 00:39:11.547231 31 0 ff
2276 00:39:11.549837 32 0 ff
2277 00:39:11.549922 33 0 ff
2278 00:39:11.553804 34 ff ff
2279 00:39:11.553895 35 ff ff
2280 00:39:11.556876 36 ff ff
2281 00:39:11.556974 37 ff ff
2282 00:39:11.560190 38 ff ff
2283 00:39:11.560403 39 ff ff
2284 00:39:11.563737 40 ff ff
2285 00:39:11.566473 pass bytecount = 0xff (0xff: all bytes pass)
2286 00:39:11.566587
2287 00:39:11.566677 DQS0 dly: 34
2288 00:39:11.570019 DQS1 dly: 31
2289 00:39:11.570132 Write Rank0 MR2 =0x2d
2290 00:39:11.573524 [RankSwap] Rank num 2, (Multi 1), Rank 0
2291 00:39:11.576381 Write Rank0 MR1 =0xd6
2292 00:39:11.576519 [Gating]
2293 00:39:11.576629 ==
2294 00:39:11.583514 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2295 00:39:11.586775 fsp= 1, odt_onoff= 1, Byte mode= 0
2296 00:39:11.587038 ==
2297 00:39:11.590191 3 1 0 |2928 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2298 00:39:11.593425 3 1 4 |707 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2299 00:39:11.600691 3 1 8 |2a29 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2300 00:39:11.603890 3 1 12 |2f2e 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2301 00:39:11.606918 3 1 16 |2d2d 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2302 00:39:11.610212 3 1 20 |1110 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2303 00:39:11.616919 3 1 24 |3231 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2304 00:39:11.620524 3 1 28 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2305 00:39:11.623620 3 2 0 |3736 403 |(11 11)(11 11) |(0 0)(1 1)| 0
2306 00:39:11.630387 3 2 4 |4847 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2307 00:39:11.633719 3 2 8 |100f 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2308 00:39:11.637457 3 2 12 |3635 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2309 00:39:11.643843 3 2 16 |3736 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2310 00:39:11.647480 3 2 20 |3736 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2311 00:39:11.650494 3 2 24 |3736 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2312 00:39:11.654213 3 2 28 |3636 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2313 00:39:11.660965 [Byte 0] Lead/lag falling Transition (3, 2, 28)
2314 00:39:11.664156 3 3 0 |504 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
2315 00:39:11.667713 3 3 4 |3534 1413 |(11 11)(11 11) |(0 1)(1 1)| 0
2316 00:39:11.674129 3 3 8 |3534 b0a |(11 11)(11 11) |(0 1)(1 1)| 0
2317 00:39:11.677670 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2318 00:39:11.681091 [Byte 1] Lead/lag falling Transition (3, 3, 12)
2319 00:39:11.683979 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2320 00:39:11.691035 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2321 00:39:11.694702 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2322 00:39:11.697306 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2323 00:39:11.704038 3 4 0 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
2324 00:39:11.707663 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2325 00:39:11.711335 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2326 00:39:11.714276 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2327 00:39:11.721008 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2328 00:39:11.724575 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2329 00:39:11.727977 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2330 00:39:11.734228 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2331 00:39:11.737927 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2332 00:39:11.740831 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2333 00:39:11.748179 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2334 00:39:11.751267 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2335 00:39:11.754641 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2336 00:39:11.758056 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2337 00:39:11.764743 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2338 00:39:11.768175 [Byte 0] Lead/lag Transition tap number (2)
2339 00:39:11.770987 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2340 00:39:11.774597 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2341 00:39:11.781379 3 5 28 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2342 00:39:11.784702 [Byte 1] Lead/lag Transition tap number (2)
2343 00:39:11.787971 3 6 0 |4646 807 |(0 0)(11 11) |(0 0)(0 0)| 0
2344 00:39:11.791375 [Byte 0]First pass (3, 6, 0)
2345 00:39:11.795008 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2346 00:39:11.798084 [Byte 1]First pass (3, 6, 4)
2347 00:39:11.801466 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2348 00:39:11.804794 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2349 00:39:11.807846 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2350 00:39:11.814851 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2351 00:39:11.818084 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2352 00:39:11.821152 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2353 00:39:11.824761 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2354 00:39:11.828271 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2355 00:39:11.835132 All bytes gating window > 1UI, Early break!
2356 00:39:11.835570
2357 00:39:11.838514 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
2358 00:39:11.838946
2359 00:39:11.841711 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
2360 00:39:11.842138
2361 00:39:11.842476
2362 00:39:11.842787
2363 00:39:11.844826 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
2364 00:39:11.845284
2365 00:39:11.848589 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
2366 00:39:11.849019
2367 00:39:11.849402
2368 00:39:11.851973 Write Rank0 MR1 =0x56
2369 00:39:11.852403
2370 00:39:11.855702 best RODT dly(2T, 0.5T) = (2, 2)
2371 00:39:11.856135
2372 00:39:11.858389 best RODT dly(2T, 0.5T) = (2, 2)
2373 00:39:11.858861 ==
2374 00:39:11.861691 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2375 00:39:11.864804 fsp= 1, odt_onoff= 1, Byte mode= 0
2376 00:39:11.868972 ==
2377 00:39:11.871755 Start DQ dly to find pass range UseTestEngine =0
2378 00:39:11.875264 x-axis: bit #, y-axis: DQ dly (-127~63)
2379 00:39:11.875697 RX Vref Scan = 0
2380 00:39:11.878608 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2381 00:39:11.882021 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2382 00:39:11.885390 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2383 00:39:11.888697 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2384 00:39:11.892142 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2385 00:39:11.895200 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2386 00:39:11.895639 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2387 00:39:11.898905 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2388 00:39:11.902683 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2389 00:39:11.905761 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2390 00:39:11.909148 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2391 00:39:11.912368 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2392 00:39:11.915409 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2393 00:39:11.915848 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2394 00:39:11.918752 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2395 00:39:11.922226 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2396 00:39:11.925360 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2397 00:39:11.928602 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2398 00:39:11.931909 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2399 00:39:11.936100 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2400 00:39:11.939250 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2401 00:39:11.939691 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2402 00:39:11.942167 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2403 00:39:11.946204 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2404 00:39:11.949196 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2405 00:39:11.952744 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2406 00:39:11.955789 0, [0] xxxoxxxx xxxxxxxx [MSB]
2407 00:39:11.956265 1, [0] xxxoxxxx xxxxxxxo [MSB]
2408 00:39:11.959339 2, [0] xxooxxxo xxxxxxxo [MSB]
2409 00:39:11.962433 3, [0] xxoooxxo xxxxxxxo [MSB]
2410 00:39:11.965965 4, [0] xxoooxxo ooooooxo [MSB]
2411 00:39:11.968955 5, [0] xxoooxxo oooooooo [MSB]
2412 00:39:11.972614 6, [0] xooooxxo oooooooo [MSB]
2413 00:39:11.973207 7, [0] xoooooxo oooooooo [MSB]
2414 00:39:11.975744 8, [0] ooooooxo oooooooo [MSB]
2415 00:39:11.979299 32, [0] ooxxoooo oooooooo [MSB]
2416 00:39:11.982559 33, [0] ooxxoooo ooooooox [MSB]
2417 00:39:11.986050 34, [0] ooxxoooo ooooooox [MSB]
2418 00:39:11.989516 35, [0] ooxxxooo ooxoooox [MSB]
2419 00:39:11.989975 36, [0] ooxxxooo ooxoooox [MSB]
2420 00:39:11.992444 37, [0] ooxxxoox xxxxoxxx [MSB]
2421 00:39:11.995789 38, [0] ooxxxoox xxxxoxxx [MSB]
2422 00:39:11.999916 39, [0] ooxxxoox xxxxxxxx [MSB]
2423 00:39:12.002637 40, [0] oxxxxoox xxxxxxxx [MSB]
2424 00:39:12.005864 41, [0] xxxxxxxx xxxxxxxx [MSB]
2425 00:39:12.009627 iDelay=41, Bit 0, Center 24 (8 ~ 40) 33
2426 00:39:12.012787 iDelay=41, Bit 1, Center 22 (6 ~ 39) 34
2427 00:39:12.016027 iDelay=41, Bit 2, Center 16 (2 ~ 31) 30
2428 00:39:12.019619 iDelay=41, Bit 3, Center 15 (0 ~ 31) 32
2429 00:39:12.022890 iDelay=41, Bit 4, Center 18 (3 ~ 34) 32
2430 00:39:12.026359 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2431 00:39:12.029783 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
2432 00:39:12.032493 iDelay=41, Bit 7, Center 19 (2 ~ 36) 35
2433 00:39:12.036066 iDelay=41, Bit 8, Center 20 (4 ~ 36) 33
2434 00:39:12.039696 iDelay=41, Bit 9, Center 20 (4 ~ 36) 33
2435 00:39:12.042760 iDelay=41, Bit 10, Center 19 (4 ~ 34) 31
2436 00:39:12.046145 iDelay=41, Bit 11, Center 20 (4 ~ 36) 33
2437 00:39:12.053127 iDelay=41, Bit 12, Center 21 (4 ~ 38) 35
2438 00:39:12.055866 iDelay=41, Bit 13, Center 20 (4 ~ 36) 33
2439 00:39:12.059431 iDelay=41, Bit 14, Center 20 (5 ~ 36) 32
2440 00:39:12.062554 iDelay=41, Bit 15, Center 16 (1 ~ 32) 32
2441 00:39:12.062981 ==
2442 00:39:12.066207 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2443 00:39:12.069249 fsp= 1, odt_onoff= 1, Byte mode= 0
2444 00:39:12.069724 ==
2445 00:39:12.072631 DQS Delay:
2446 00:39:12.073051 DQS0 = 0, DQS1 = 0
2447 00:39:12.075784 DQM Delay:
2448 00:39:12.076201 DQM0 = 20, DQM1 = 19
2449 00:39:12.076536 DQ Delay:
2450 00:39:12.079548 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2451 00:39:12.082882 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =19
2452 00:39:12.086277 DQ8 =20, DQ9 =20, DQ10 =19, DQ11 =20
2453 00:39:12.089152 DQ12 =21, DQ13 =20, DQ14 =20, DQ15 =16
2454 00:39:12.089609
2455 00:39:12.089947
2456 00:39:12.092618 DramC Write-DBI off
2457 00:39:12.093040 ==
2458 00:39:12.099192 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2459 00:39:12.099615 fsp= 1, odt_onoff= 1, Byte mode= 0
2460 00:39:12.102380 ==
2461 00:39:12.105696 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2462 00:39:12.106133
2463 00:39:12.109185 Begin, DQ Scan Range 927~1183
2464 00:39:12.109664
2465 00:39:12.110107
2466 00:39:12.110427 TX Vref Scan disable
2467 00:39:12.112784 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2468 00:39:12.119430 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2469 00:39:12.122609 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2470 00:39:12.125712 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2471 00:39:12.129343 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2472 00:39:12.132424 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2473 00:39:12.135962 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2474 00:39:12.138861 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2475 00:39:12.142238 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2476 00:39:12.145611 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2477 00:39:12.149085 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2478 00:39:12.152644 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2479 00:39:12.155671 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2480 00:39:12.159178 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2481 00:39:12.162004 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2482 00:39:12.165742 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2483 00:39:12.172438 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2484 00:39:12.175739 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2485 00:39:12.178853 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2486 00:39:12.181989 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2487 00:39:12.185541 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2488 00:39:12.188936 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2489 00:39:12.192045 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2490 00:39:12.195396 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2491 00:39:12.198834 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2492 00:39:12.202316 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2493 00:39:12.205446 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2494 00:39:12.208718 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2495 00:39:12.212005 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2496 00:39:12.215509 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2497 00:39:12.219096 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2498 00:39:12.222244 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2499 00:39:12.225776 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2500 00:39:12.232567 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2501 00:39:12.235213 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2502 00:39:12.238958 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2503 00:39:12.242554 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2504 00:39:12.245016 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2505 00:39:12.248736 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]
2506 00:39:12.252143 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
2507 00:39:12.255153 967 |3 6 7|[0] xxxxxxxx ooxxxxxo [MSB]
2508 00:39:12.258851 968 |3 6 8|[0] xxxxxxxx oooxxxxo [MSB]
2509 00:39:12.262092 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
2510 00:39:12.265146 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
2511 00:39:12.268572 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
2512 00:39:12.272231 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2513 00:39:12.275197 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
2514 00:39:12.278599 974 |3 6 14|[0] xxooxxxo oooooooo [MSB]
2515 00:39:12.281730 975 |3 6 15|[0] xxoooxxo oooooooo [MSB]
2516 00:39:12.285239 976 |3 6 16|[0] xoooooxo oooooooo [MSB]
2517 00:39:12.293289 989 |3 6 29|[0] oooooooo ooooooox [MSB]
2518 00:39:12.296394 990 |3 6 30|[0] oooooooo xxooooox [MSB]
2519 00:39:12.299633 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2520 00:39:12.303269 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2521 00:39:12.306503 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
2522 00:39:12.310233 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
2523 00:39:12.313286 995 |3 6 35|[0] ooxxooox xxxxxxxx [MSB]
2524 00:39:12.316639 996 |3 6 36|[0] ooxxooox xxxxxxxx [MSB]
2525 00:39:12.319814 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
2526 00:39:12.323396 Byte0, DQ PI dly=984, DQM PI dly= 984
2527 00:39:12.326165 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
2528 00:39:12.326590
2529 00:39:12.333029 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
2530 00:39:12.333571
2531 00:39:12.336407 Byte1, DQ PI dly=977, DQM PI dly= 977
2532 00:39:12.339860 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
2533 00:39:12.340290
2534 00:39:12.343836 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
2535 00:39:12.344264
2536 00:39:12.346545 ==
2537 00:39:12.349678 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2538 00:39:12.352739 fsp= 1, odt_onoff= 1, Byte mode= 0
2539 00:39:12.353325 ==
2540 00:39:12.357069 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2541 00:39:12.357531
2542 00:39:12.360047 Begin, DQ Scan Range 953~1017
2543 00:39:12.362954 Write Rank0 MR14 =0x0
2544 00:39:12.370693
2545 00:39:12.371133 CH=1, VrefRange= 0, VrefLevel = 0
2546 00:39:12.377686 TX Bit0 (978~995) 18 986, Bit8 (969~985) 17 977,
2547 00:39:12.380610 TX Bit1 (977~994) 18 985, Bit9 (969~985) 17 977,
2548 00:39:12.387512 TX Bit2 (976~990) 15 983, Bit10 (969~985) 17 977,
2549 00:39:12.390605 TX Bit3 (974~989) 16 981, Bit11 (971~988) 18 979,
2550 00:39:12.393726 TX Bit4 (977~992) 16 984, Bit12 (970~988) 19 979,
2551 00:39:12.400725 TX Bit5 (977~994) 18 985, Bit13 (971~988) 18 979,
2552 00:39:12.404124 TX Bit6 (978~995) 18 986, Bit14 (970~986) 17 978,
2553 00:39:12.406973 TX Bit7 (976~991) 16 983, Bit15 (967~985) 19 976,
2554 00:39:12.407055
2555 00:39:12.410300 Write Rank0 MR14 =0x2
2556 00:39:12.419322
2557 00:39:12.419405 CH=1, VrefRange= 0, VrefLevel = 2
2558 00:39:12.426371 TX Bit0 (978~997) 20 987, Bit8 (969~985) 17 977,
2559 00:39:12.429228 TX Bit1 (977~994) 18 985, Bit9 (969~985) 17 977,
2560 00:39:12.435978 TX Bit2 (976~991) 16 983, Bit10 (969~986) 18 977,
2561 00:39:12.439315 TX Bit3 (973~990) 18 981, Bit11 (971~988) 18 979,
2562 00:39:12.442476 TX Bit4 (976~992) 17 984, Bit12 (970~988) 19 979,
2563 00:39:12.449191 TX Bit5 (977~996) 20 986, Bit13 (972~988) 17 980,
2564 00:39:12.452820 TX Bit6 (978~996) 19 987, Bit14 (970~987) 18 978,
2565 00:39:12.455981 TX Bit7 (976~991) 16 983, Bit15 (967~985) 19 976,
2566 00:39:12.459163
2567 00:39:12.459605 Write Rank0 MR14 =0x4
2568 00:39:12.468501
2569 00:39:12.468920 CH=1, VrefRange= 0, VrefLevel = 4
2570 00:39:12.475704 TX Bit0 (978~997) 20 987, Bit8 (968~986) 19 977,
2571 00:39:12.478579 TX Bit1 (976~994) 19 985, Bit9 (968~986) 19 977,
2572 00:39:12.484958 TX Bit2 (975~991) 17 983, Bit10 (969~986) 18 977,
2573 00:39:12.488929 TX Bit3 (973~990) 18 981, Bit11 (970~989) 20 979,
2574 00:39:12.492028 TX Bit4 (976~992) 17 984, Bit12 (970~989) 20 979,
2575 00:39:12.498775 TX Bit5 (977~996) 20 986, Bit13 (972~989) 18 980,
2576 00:39:12.502100 TX Bit6 (978~996) 19 987, Bit14 (970~987) 18 978,
2577 00:39:12.505787 TX Bit7 (976~991) 16 983, Bit15 (966~985) 20 975,
2578 00:39:12.506210
2579 00:39:12.508745 Write Rank0 MR14 =0x6
2580 00:39:12.517355
2581 00:39:12.517949 CH=1, VrefRange= 0, VrefLevel = 6
2582 00:39:12.524030 TX Bit0 (977~997) 21 987, Bit8 (968~986) 19 977,
2583 00:39:12.527235 TX Bit1 (976~995) 20 985, Bit9 (968~986) 19 977,
2584 00:39:12.534105 TX Bit2 (975~992) 18 983, Bit10 (969~987) 19 978,
2585 00:39:12.537516 TX Bit3 (972~990) 19 981, Bit11 (970~990) 21 980,
2586 00:39:12.541026 TX Bit4 (976~992) 17 984, Bit12 (969~990) 22 979,
2587 00:39:12.547693 TX Bit5 (977~997) 21 987, Bit13 (971~990) 20 980,
2588 00:39:12.551310 TX Bit6 (978~997) 20 987, Bit14 (970~988) 19 979,
2589 00:39:12.554005 TX Bit7 (976~992) 17 984, Bit15 (966~986) 21 976,
2590 00:39:12.554431
2591 00:39:12.557105 Write Rank0 MR14 =0x8
2592 00:39:12.566786
2593 00:39:12.567211 CH=1, VrefRange= 0, VrefLevel = 8
2594 00:39:12.572992 TX Bit0 (977~998) 22 987, Bit8 (968~987) 20 977,
2595 00:39:12.576648 TX Bit1 (976~996) 21 986, Bit9 (968~987) 20 977,
2596 00:39:12.583145 TX Bit2 (975~992) 18 983, Bit10 (969~987) 19 978,
2597 00:39:12.586787 TX Bit3 (972~991) 20 981, Bit11 (970~990) 21 980,
2598 00:39:12.589912 TX Bit4 (976~993) 18 984, Bit12 (969~990) 22 979,
2599 00:39:12.596273 TX Bit5 (976~997) 22 986, Bit13 (971~990) 20 980,
2600 00:39:12.599490 TX Bit6 (978~998) 21 988, Bit14 (970~988) 19 979,
2601 00:39:12.603459 TX Bit7 (976~992) 17 984, Bit15 (966~986) 21 976,
2602 00:39:12.603883
2603 00:39:12.606527 Write Rank0 MR14 =0xa
2604 00:39:12.615664
2605 00:39:12.619163 CH=1, VrefRange= 0, VrefLevel = 10
2606 00:39:12.622545 TX Bit0 (977~998) 22 987, Bit8 (968~987) 20 977,
2607 00:39:12.625389 TX Bit1 (976~996) 21 986, Bit9 (968~987) 20 977,
2608 00:39:12.632399 TX Bit2 (974~992) 19 983, Bit10 (969~988) 20 978,
2609 00:39:12.635586 TX Bit3 (971~991) 21 981, Bit11 (970~991) 22 980,
2610 00:39:12.638728 TX Bit4 (975~994) 20 984, Bit12 (969~991) 23 980,
2611 00:39:12.645500 TX Bit5 (976~997) 22 986, Bit13 (970~990) 21 980,
2612 00:39:12.648802 TX Bit6 (977~997) 21 987, Bit14 (969~989) 21 979,
2613 00:39:12.651998 TX Bit7 (975~993) 19 984, Bit15 (966~986) 21 976,
2614 00:39:12.652421
2615 00:39:12.655682 Write Rank0 MR14 =0xc
2616 00:39:12.664746
2617 00:39:12.667937 CH=1, VrefRange= 0, VrefLevel = 12
2618 00:39:12.671534 TX Bit0 (977~999) 23 988, Bit8 (968~988) 21 978,
2619 00:39:12.674796 TX Bit1 (976~997) 22 986, Bit9 (968~987) 20 977,
2620 00:39:12.681637 TX Bit2 (974~993) 20 983, Bit10 (968~989) 22 978,
2621 00:39:12.685098 TX Bit3 (971~991) 21 981, Bit11 (970~991) 22 980,
2622 00:39:12.688447 TX Bit4 (975~994) 20 984, Bit12 (969~991) 23 980,
2623 00:39:12.694972 TX Bit5 (976~998) 23 987, Bit13 (970~991) 22 980,
2624 00:39:12.697816 TX Bit6 (977~998) 22 987, Bit14 (969~990) 22 979,
2625 00:39:12.701135 TX Bit7 (975~993) 19 984, Bit15 (965~987) 23 976,
2626 00:39:12.704380
2627 00:39:12.704796 Write Rank0 MR14 =0xe
2628 00:39:12.713886
2629 00:39:12.717365 CH=1, VrefRange= 0, VrefLevel = 14
2630 00:39:12.720585 TX Bit0 (977~999) 23 988, Bit8 (968~989) 22 978,
2631 00:39:12.723813 TX Bit1 (975~997) 23 986, Bit9 (967~988) 22 977,
2632 00:39:12.730920 TX Bit2 (974~993) 20 983, Bit10 (968~990) 23 979,
2633 00:39:12.734155 TX Bit3 (970~991) 22 980, Bit11 (969~991) 23 980,
2634 00:39:12.737360 TX Bit4 (975~995) 21 985, Bit12 (969~991) 23 980,
2635 00:39:12.744417 TX Bit5 (976~998) 23 987, Bit13 (970~991) 22 980,
2636 00:39:12.747186 TX Bit6 (977~998) 22 987, Bit14 (969~990) 22 979,
2637 00:39:12.750620 TX Bit7 (975~994) 20 984, Bit15 (965~987) 23 976,
2638 00:39:12.751046
2639 00:39:12.754433 Write Rank0 MR14 =0x10
2640 00:39:12.763667
2641 00:39:12.766669 CH=1, VrefRange= 0, VrefLevel = 16
2642 00:39:12.770484 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
2643 00:39:12.773146 TX Bit1 (975~998) 24 986, Bit9 (967~989) 23 978,
2644 00:39:12.780345 TX Bit2 (974~994) 21 984, Bit10 (968~990) 23 979,
2645 00:39:12.783940 TX Bit3 (970~992) 23 981, Bit11 (969~991) 23 980,
2646 00:39:12.787281 TX Bit4 (974~996) 23 985, Bit12 (969~991) 23 980,
2647 00:39:12.793562 TX Bit5 (976~999) 24 987, Bit13 (970~991) 22 980,
2648 00:39:12.796761 TX Bit6 (977~999) 23 988, Bit14 (969~991) 23 980,
2649 00:39:12.800468 TX Bit7 (974~994) 21 984, Bit15 (965~988) 24 976,
2650 00:39:12.801145
2651 00:39:12.803593 Write Rank0 MR14 =0x12
2652 00:39:12.812607
2653 00:39:12.816195 CH=1, VrefRange= 0, VrefLevel = 18
2654 00:39:12.819792 TX Bit0 (977~999) 23 988, Bit8 (967~990) 24 978,
2655 00:39:12.822773 TX Bit1 (975~998) 24 986, Bit9 (967~990) 24 978,
2656 00:39:12.829182 TX Bit2 (973~994) 22 983, Bit10 (968~991) 24 979,
2657 00:39:12.832587 TX Bit3 (970~992) 23 981, Bit11 (969~992) 24 980,
2658 00:39:12.835913 TX Bit4 (974~997) 24 985, Bit12 (968~992) 25 980,
2659 00:39:12.843067 TX Bit5 (976~999) 24 987, Bit13 (969~991) 23 980,
2660 00:39:12.846059 TX Bit6 (977~999) 23 988, Bit14 (969~991) 23 980,
2661 00:39:12.849931 TX Bit7 (974~995) 22 984, Bit15 (964~988) 25 976,
2662 00:39:12.852700
2663 00:39:12.853341 Write Rank0 MR14 =0x14
2664 00:39:12.862203
2665 00:39:12.865690 CH=1, VrefRange= 0, VrefLevel = 20
2666 00:39:12.868653 TX Bit0 (976~999) 24 987, Bit8 (967~990) 24 978,
2667 00:39:12.872127 TX Bit1 (975~998) 24 986, Bit9 (967~990) 24 978,
2668 00:39:12.878392 TX Bit2 (972~995) 24 983, Bit10 (967~991) 25 979,
2669 00:39:12.882037 TX Bit3 (970~993) 24 981, Bit11 (969~992) 24 980,
2670 00:39:12.885350 TX Bit4 (974~997) 24 985, Bit12 (968~992) 25 980,
2671 00:39:12.891859 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2672 00:39:12.895513 TX Bit6 (976~999) 24 987, Bit14 (968~991) 24 979,
2673 00:39:12.898834 TX Bit7 (974~996) 23 985, Bit15 (964~989) 26 976,
2674 00:39:12.901810
2675 00:39:12.902329 Write Rank0 MR14 =0x16
2676 00:39:12.911434
2677 00:39:12.914940 CH=1, VrefRange= 0, VrefLevel = 22
2678 00:39:12.918348 TX Bit0 (976~999) 24 987, Bit8 (967~991) 25 979,
2679 00:39:12.921687 TX Bit1 (975~998) 24 986, Bit9 (967~990) 24 978,
2680 00:39:12.928014 TX Bit2 (971~995) 25 983, Bit10 (968~991) 24 979,
2681 00:39:12.931592 TX Bit3 (970~993) 24 981, Bit11 (968~992) 25 980,
2682 00:39:12.934914 TX Bit4 (973~997) 25 985, Bit12 (968~992) 25 980,
2683 00:39:12.941602 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2684 00:39:12.944413 TX Bit6 (976~999) 24 987, Bit14 (968~991) 24 979,
2685 00:39:12.948271 TX Bit7 (974~996) 23 985, Bit15 (964~988) 25 976,
2686 00:39:12.948760
2687 00:39:12.951880 Write Rank0 MR14 =0x18
2688 00:39:12.961125
2689 00:39:12.961620 CH=1, VrefRange= 0, VrefLevel = 24
2690 00:39:12.967701 TX Bit0 (976~1000) 25 988, Bit8 (966~991) 26 978,
2691 00:39:12.970907 TX Bit1 (975~999) 25 987, Bit9 (966~990) 25 978,
2692 00:39:12.977676 TX Bit2 (971~995) 25 983, Bit10 (967~991) 25 979,
2693 00:39:12.980980 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
2694 00:39:12.984339 TX Bit4 (973~997) 25 985, Bit12 (968~992) 25 980,
2695 00:39:12.990959 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2696 00:39:12.993977 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
2697 00:39:12.997688 TX Bit7 (973~996) 24 984, Bit15 (963~988) 26 975,
2698 00:39:13.000833
2699 00:39:13.001453 Write Rank0 MR14 =0x1a
2700 00:39:13.010716
2701 00:39:13.013632 CH=1, VrefRange= 0, VrefLevel = 26
2702 00:39:13.016972 TX Bit0 (976~1000) 25 988, Bit8 (966~991) 26 978,
2703 00:39:13.020278 TX Bit1 (975~999) 25 987, Bit9 (966~990) 25 978,
2704 00:39:13.027357 TX Bit2 (971~995) 25 983, Bit10 (967~991) 25 979,
2705 00:39:13.030370 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
2706 00:39:13.034153 TX Bit4 (973~997) 25 985, Bit12 (968~992) 25 980,
2707 00:39:13.040607 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2708 00:39:13.043701 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
2709 00:39:13.047269 TX Bit7 (973~996) 24 984, Bit15 (963~988) 26 975,
2710 00:39:13.050572
2711 00:39:13.050995 Write Rank0 MR14 =0x1c
2712 00:39:13.060388
2713 00:39:13.063592 CH=1, VrefRange= 0, VrefLevel = 28
2714 00:39:13.067274 TX Bit0 (976~1000) 25 988, Bit8 (966~991) 26 978,
2715 00:39:13.070047 TX Bit1 (975~999) 25 987, Bit9 (966~990) 25 978,
2716 00:39:13.076453 TX Bit2 (971~995) 25 983, Bit10 (967~991) 25 979,
2717 00:39:13.080086 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
2718 00:39:13.083135 TX Bit4 (973~997) 25 985, Bit12 (968~992) 25 980,
2719 00:39:13.089673 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2720 00:39:13.093248 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
2721 00:39:13.100053 TX Bit7 (973~996) 24 984, Bit15 (963~988) 26 975,
2722 00:39:13.100144
2723 00:39:13.100236 Write Rank0 MR14 =0x1e
2724 00:39:13.109664
2725 00:39:13.113154 CH=1, VrefRange= 0, VrefLevel = 30
2726 00:39:13.116245 TX Bit0 (976~1000) 25 988, Bit8 (966~991) 26 978,
2727 00:39:13.119701 TX Bit1 (975~999) 25 987, Bit9 (966~990) 25 978,
2728 00:39:13.126398 TX Bit2 (971~995) 25 983, Bit10 (967~991) 25 979,
2729 00:39:13.129691 TX Bit3 (969~993) 25 981, Bit11 (968~992) 25 980,
2730 00:39:13.133041 TX Bit4 (973~997) 25 985, Bit12 (968~992) 25 980,
2731 00:39:13.139358 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2732 00:39:13.143159 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
2733 00:39:13.149870 TX Bit7 (973~996) 24 984, Bit15 (963~988) 26 975,
2734 00:39:13.150302
2735 00:39:13.150643
2736 00:39:13.153549 TX Vref found, early break! 374< 378
2737 00:39:13.156148 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2738 00:39:13.159746 u1DelayCellOfst[0]=8 cells (7 PI)
2739 00:39:13.163214 u1DelayCellOfst[1]=7 cells (6 PI)
2740 00:39:13.166237 u1DelayCellOfst[2]=2 cells (2 PI)
2741 00:39:13.169647 u1DelayCellOfst[3]=0 cells (0 PI)
2742 00:39:13.173005 u1DelayCellOfst[4]=5 cells (4 PI)
2743 00:39:13.173477 u1DelayCellOfst[5]=7 cells (6 PI)
2744 00:39:13.176115 u1DelayCellOfst[6]=8 cells (7 PI)
2745 00:39:13.179340 u1DelayCellOfst[7]=3 cells (3 PI)
2746 00:39:13.182960 Byte0, DQ PI dly=981, DQM PI dly= 984
2747 00:39:13.189376 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2748 00:39:13.189810
2749 00:39:13.192621 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2750 00:39:13.193050
2751 00:39:13.196413 u1DelayCellOfst[8]=3 cells (3 PI)
2752 00:39:13.199311 u1DelayCellOfst[9]=3 cells (3 PI)
2753 00:39:13.202870 u1DelayCellOfst[10]=5 cells (4 PI)
2754 00:39:13.206225 u1DelayCellOfst[11]=6 cells (5 PI)
2755 00:39:13.209364 u1DelayCellOfst[12]=6 cells (5 PI)
2756 00:39:13.213195 u1DelayCellOfst[13]=6 cells (5 PI)
2757 00:39:13.213716 u1DelayCellOfst[14]=5 cells (4 PI)
2758 00:39:13.216188 u1DelayCellOfst[15]=0 cells (0 PI)
2759 00:39:13.219393 Byte1, DQ PI dly=975, DQM PI dly= 977
2760 00:39:13.226140 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
2761 00:39:13.226661
2762 00:39:13.229560 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
2763 00:39:13.230055
2764 00:39:13.233174 Write Rank0 MR14 =0x18
2765 00:39:13.233643
2766 00:39:13.233983 Final TX Range 0 Vref 24
2767 00:39:13.234319
2768 00:39:13.239842 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2769 00:39:13.240283
2770 00:39:13.245935 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2771 00:39:13.256247 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2772 00:39:13.262622 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2773 00:39:13.263062 Write Rank0 MR3 =0xb0
2774 00:39:13.266093 DramC Write-DBI on
2775 00:39:13.266524 ==
2776 00:39:13.269785 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2777 00:39:13.272664 fsp= 1, odt_onoff= 1, Byte mode= 0
2778 00:39:13.273097 ==
2779 00:39:13.279476 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2780 00:39:13.279905
2781 00:39:13.280249 Begin, DQ Scan Range 697~761
2782 00:39:13.280570
2783 00:39:13.282828
2784 00:39:13.283254 TX Vref Scan disable
2785 00:39:13.285989 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2786 00:39:13.289657 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2787 00:39:13.293077 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2788 00:39:13.296000 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2789 00:39:13.299392 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2790 00:39:13.306353 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2791 00:39:13.309479 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2792 00:39:13.312670 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2793 00:39:13.315891 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2794 00:39:13.319426 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2795 00:39:13.322930 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
2796 00:39:13.326043 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
2797 00:39:13.329457 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2798 00:39:13.332543 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2799 00:39:13.336662 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2800 00:39:13.339525 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2801 00:39:13.343038 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2802 00:39:13.346494 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2803 00:39:13.349348 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2804 00:39:13.357886 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2805 00:39:13.360869 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2806 00:39:13.364944 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2807 00:39:13.367910 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2808 00:39:13.371505 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2809 00:39:13.374302 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2810 00:39:13.377694 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2811 00:39:13.381143 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2812 00:39:13.384393 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2813 00:39:13.387226 Byte0, DQ PI dly=729, DQM PI dly= 729
2814 00:39:13.390579 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
2815 00:39:13.390847
2816 00:39:13.397753 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
2817 00:39:13.398052
2818 00:39:13.400578 Byte1, DQ PI dly=721, DQM PI dly= 721
2819 00:39:13.404169 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
2820 00:39:13.404395
2821 00:39:13.407371 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
2822 00:39:13.407683
2823 00:39:13.414207 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2824 00:39:13.423788 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2825 00:39:13.430640 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2826 00:39:13.430937 Write Rank0 MR3 =0x30
2827 00:39:13.433969 DramC Write-DBI off
2828 00:39:13.434339
2829 00:39:13.434633 [DATLAT]
2830 00:39:13.437024 Freq=1600, CH1 RK0, use_rxtx_scan=0
2831 00:39:13.437343
2832 00:39:13.440861 DATLAT Default: 0xf
2833 00:39:13.441152 7, 0xFFFF, sum=0
2834 00:39:13.444471 8, 0xFFFF, sum=0
2835 00:39:13.444890 9, 0xFFFF, sum=0
2836 00:39:13.447315 10, 0xFFFF, sum=0
2837 00:39:13.447610 11, 0xFFFF, sum=0
2838 00:39:13.450844 12, 0xFFFF, sum=0
2839 00:39:13.451156 13, 0xFFFF, sum=0
2840 00:39:13.451452 14, 0x0, sum=1
2841 00:39:13.453853 15, 0x0, sum=2
2842 00:39:13.454155 16, 0x0, sum=3
2843 00:39:13.457014 17, 0x0, sum=4
2844 00:39:13.460452 pattern=2 first_step=14 total pass=5 best_step=16
2845 00:39:13.460743 ==
2846 00:39:13.467507 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2847 00:39:13.470617 fsp= 1, odt_onoff= 1, Byte mode= 0
2848 00:39:13.470935 ==
2849 00:39:13.474031 Start DQ dly to find pass range UseTestEngine =1
2850 00:39:13.477251 x-axis: bit #, y-axis: DQ dly (-127~63)
2851 00:39:13.477575 RX Vref Scan = 1
2852 00:39:13.593737
2853 00:39:13.594181 RX Vref found, early break!
2854 00:39:13.594478
2855 00:39:13.600213 Final RX Vref 13, apply to both rank0 and 1
2856 00:39:13.600649 ==
2857 00:39:13.603716 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2858 00:39:13.607576 fsp= 1, odt_onoff= 1, Byte mode= 0
2859 00:39:13.607946 ==
2860 00:39:13.608278 DQS Delay:
2861 00:39:13.610504 DQS0 = 0, DQS1 = 0
2862 00:39:13.610984 DQM Delay:
2863 00:39:13.613711 DQM0 = 20, DQM1 = 18
2864 00:39:13.614103 DQ Delay:
2865 00:39:13.617142 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2866 00:39:13.620474 DQ4 =19, DQ5 =24, DQ6 =25, DQ7 =19
2867 00:39:13.623495 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19
2868 00:39:13.627075 DQ12 =20, DQ13 =19, DQ14 =19, DQ15 =17
2869 00:39:13.627445
2870 00:39:13.627738
2871 00:39:13.628010
2872 00:39:13.630599 [DramC_TX_OE_Calibration] TA2
2873 00:39:13.633617 Original DQ_B0 (3 6) =30, OEN = 27
2874 00:39:13.636923 Original DQ_B1 (3 6) =30, OEN = 27
2875 00:39:13.640661 23, 0x0, End_B0=23 End_B1=23
2876 00:39:13.641219 24, 0x0, End_B0=24 End_B1=24
2877 00:39:13.643501 25, 0x0, End_B0=25 End_B1=25
2878 00:39:13.647134 26, 0x0, End_B0=26 End_B1=26
2879 00:39:13.650710 27, 0x0, End_B0=27 End_B1=27
2880 00:39:13.651283 28, 0x0, End_B0=28 End_B1=28
2881 00:39:13.653622 29, 0x0, End_B0=29 End_B1=29
2882 00:39:13.657306 30, 0x0, End_B0=30 End_B1=30
2883 00:39:13.660220 31, 0xFFFF, End_B0=30 End_B1=30
2884 00:39:13.663995 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2885 00:39:13.670467 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2886 00:39:13.670982
2887 00:39:13.671427
2888 00:39:13.673879 Write Rank0 MR23 =0x3f
2889 00:39:13.674358 [DQSOSC]
2890 00:39:13.680651 [DQSOSCAuto] RK0, (LSB)MR18= 0xbf, (MSB)MR19= 0x3, tDQSOscB0 = 328 ps tDQSOscB1 = 0 ps
2891 00:39:13.687145 CH1_RK0: MR19=0x3, MR18=0xBF, DQSOSC=328, MR23=63, INC=22, DEC=34
2892 00:39:13.690946 Write Rank0 MR23 =0x3f
2893 00:39:13.691479 [DQSOSC]
2894 00:39:13.697453 [DQSOSCAuto] RK0, (LSB)MR18= 0xbb, (MSB)MR19= 0x3, tDQSOscB0 = 329 ps tDQSOscB1 = 0 ps
2895 00:39:13.700586 CH1 RK0: MR19=3, MR18=BB
2896 00:39:13.703748 [RankSwap] Rank num 2, (Multi 1), Rank 1
2897 00:39:13.707681 Write Rank0 MR2 =0xad
2898 00:39:13.708195 [Write Leveling]
2899 00:39:13.710567 delay byte0 byte1 byte2 byte3
2900 00:39:13.711007
2901 00:39:13.711450 10 0 0
2902 00:39:13.713649 11 0 0
2903 00:39:13.714095 12 0 0
2904 00:39:13.716889 13 0 0
2905 00:39:13.717491 14 0 0
2906 00:39:13.720494 15 0 0
2907 00:39:13.720940 16 0 0
2908 00:39:13.721497 17 0 0
2909 00:39:13.723940 18 0 0
2910 00:39:13.724385 19 0 0
2911 00:39:13.727070 20 0 0
2912 00:39:13.727517 21 0 0
2913 00:39:13.727966 22 0 0
2914 00:39:13.730265 23 0 0
2915 00:39:13.730712 24 0 0
2916 00:39:13.733718 25 0 0
2917 00:39:13.734160 26 0 0
2918 00:39:13.736976 27 0 0
2919 00:39:13.737542 28 0 0
2920 00:39:13.737990 29 0 0
2921 00:39:13.740197 30 0 0
2922 00:39:13.740720 31 0 ff
2923 00:39:13.744174 32 0 ff
2924 00:39:13.744624 33 0 ff
2925 00:39:13.746782 34 0 ff
2926 00:39:13.747272 35 ff ff
2927 00:39:13.747628 36 ff ff
2928 00:39:13.750583 37 ff ff
2929 00:39:13.751164 38 ff ff
2930 00:39:13.753893 39 ff ff
2931 00:39:13.754328 40 ff ff
2932 00:39:13.756995 41 ff ff
2933 00:39:13.760260 pass bytecount = 0xff (0xff: all bytes pass)
2934 00:39:13.760686
2935 00:39:13.761024 DQS0 dly: 35
2936 00:39:13.763930 DQS1 dly: 31
2937 00:39:13.764355 Write Rank0 MR2 =0x2d
2938 00:39:13.767327 [RankSwap] Rank num 2, (Multi 1), Rank 0
2939 00:39:13.770412 Write Rank1 MR1 =0xd6
2940 00:39:13.770837 [Gating]
2941 00:39:13.771176 ==
2942 00:39:13.777340 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2943 00:39:13.781075 fsp= 1, odt_onoff= 1, Byte mode= 0
2944 00:39:13.781538 ==
2945 00:39:13.783627 3 1 0 |3333 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2946 00:39:13.787243 3 1 4 |2726 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2947 00:39:13.793973 3 1 8 |2f2f 3534 |(0 0)(11 11) |(0 1)(0 1)| 0
2948 00:39:13.797235 3 1 12 |2e2d 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2949 00:39:13.800391 3 1 16 |302f 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2950 00:39:13.807218 3 1 20 |605 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2951 00:39:13.810798 3 1 24 |2e2e 3534 |(0 11)(11 11) |(0 0)(0 1)| 0
2952 00:39:13.813641 3 1 28 |201 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
2953 00:39:13.820392 3 2 0 |3838 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2954 00:39:13.823447 3 2 4 |3837 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2955 00:39:13.826802 3 2 8 |3636 3d3d |(0 0)(11 11) |(0 0)(1 1)| 0
2956 00:39:13.830738 3 2 12 |2827 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2957 00:39:13.837328 3 2 16 |3b3b 3d3d |(0 0)(11 11) |(1 1)(1 1)| 0
2958 00:39:13.840627 3 2 20 |3a3a 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2959 00:39:13.843857 3 2 24 |d0c 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2960 00:39:13.850195 3 2 28 |e0d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2961 00:39:13.853776 [Byte 0] Lead/lag falling Transition (3, 2, 28)
2962 00:39:13.857092 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
2963 00:39:13.859928 3 3 4 |3534 1514 |(11 11)(11 11) |(0 1)(1 1)| 0
2964 00:39:13.866826 3 3 8 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2965 00:39:13.870339 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2966 00:39:13.873645 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2967 00:39:13.880246 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2968 00:39:13.883395 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2969 00:39:13.886773 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2970 00:39:13.893591 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2971 00:39:13.896800 3 4 0 |3d3d 100f |(11 11)(11 11) |(1 1)(1 1)| 0
2972 00:39:13.899846 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2973 00:39:13.906891 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2974 00:39:13.910515 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2975 00:39:13.913250 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2976 00:39:13.916583 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2977 00:39:13.923295 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2978 00:39:13.926534 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2979 00:39:13.930040 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2980 00:39:13.936679 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2981 00:39:13.939951 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2982 00:39:13.943427 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2983 00:39:13.949671 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2984 00:39:13.953230 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2985 00:39:13.956778 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2986 00:39:13.959882 [Byte 0] Lead/lag Transition tap number (2)
2987 00:39:13.966758 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2988 00:39:13.969856 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2989 00:39:13.973292 3 5 28 |404 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2990 00:39:13.976604 [Byte 1] Lead/lag Transition tap number (2)
2991 00:39:13.983623 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2992 00:39:13.984166 [Byte 0]First pass (3, 6, 0)
2993 00:39:13.990053 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2994 00:39:13.990504 [Byte 1]First pass (3, 6, 4)
2995 00:39:13.996466 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2996 00:39:13.999816 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2997 00:39:14.003296 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2998 00:39:14.006801 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2999 00:39:14.010109 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3000 00:39:14.016655 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3001 00:39:14.020275 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3002 00:39:14.023149 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3003 00:39:14.026492 All bytes gating window > 1UI, Early break!
3004 00:39:14.027025
3005 00:39:14.029949 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
3006 00:39:14.030457
3007 00:39:14.033201 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
3008 00:39:14.033845
3009 00:39:14.034199
3010 00:39:14.036828
3011 00:39:14.040156 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
3012 00:39:14.040701
3013 00:39:14.043406 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
3014 00:39:14.043842
3015 00:39:14.044365
3016 00:39:14.046701 Write Rank1 MR1 =0x56
3017 00:39:14.047209
3018 00:39:14.049985 best RODT dly(2T, 0.5T) = (2, 2)
3019 00:39:14.050419
3020 00:39:14.050763 best RODT dly(2T, 0.5T) = (2, 2)
3021 00:39:14.053239 ==
3022 00:39:14.057205 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3023 00:39:14.060005 fsp= 1, odt_onoff= 1, Byte mode= 0
3024 00:39:14.060450 ==
3025 00:39:14.063277 Start DQ dly to find pass range UseTestEngine =0
3026 00:39:14.067249 x-axis: bit #, y-axis: DQ dly (-127~63)
3027 00:39:14.069816 RX Vref Scan = 0
3028 00:39:14.073221 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3029 00:39:14.076455 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3030 00:39:14.079661 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3031 00:39:14.079913 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3032 00:39:14.083260 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3033 00:39:14.086085 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3034 00:39:14.089458 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3035 00:39:14.093039 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3036 00:39:14.096362 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3037 00:39:14.099546 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3038 00:39:14.103287 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3039 00:39:14.103404 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3040 00:39:14.106483 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3041 00:39:14.109368 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3042 00:39:14.112821 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3043 00:39:14.116557 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3044 00:39:14.119442 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3045 00:39:14.122917 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3046 00:39:14.126139 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3047 00:39:14.126230 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3048 00:39:14.129334 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3049 00:39:14.133023 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3050 00:39:14.136549 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3051 00:39:14.139647 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3052 00:39:14.142690 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3053 00:39:14.145886 -1, [0] xxxoxxxx xxxxxxxo [MSB]
3054 00:39:14.146027 0, [0] xxooxxxx xxxxxxxo [MSB]
3055 00:39:14.150076 1, [0] xxooxxxo xxxxxxxo [MSB]
3056 00:39:14.152840 2, [0] xxoooxxo oooxxxxo [MSB]
3057 00:39:14.156449 3, [0] xxoooxxo ooooxooo [MSB]
3058 00:39:14.159748 4, [0] xxoooxxo ooooxooo [MSB]
3059 00:39:14.162763 5, [0] xoooooxo oooooooo [MSB]
3060 00:39:14.162862 6, [0] xoooooxo oooooooo [MSB]
3061 00:39:14.166812 34, [0] ooxxoooo oooooooo [MSB]
3062 00:39:14.169740 35, [0] ooxxoooo ooooooox [MSB]
3063 00:39:14.172925 36, [0] ooxxoooo ooooooox [MSB]
3064 00:39:14.176289 37, [0] ooxxoooo ooxoooox [MSB]
3065 00:39:14.179780 38, [0] ooxxxooo xoxooxxx [MSB]
3066 00:39:14.183066 39, [0] ooxxxoox xxxxoxxx [MSB]
3067 00:39:14.183156 40, [0] ooxxxoox xxxxoxxx [MSB]
3068 00:39:14.186045 41, [0] ooxxxoox xxxxxxxx [MSB]
3069 00:39:14.189679 42, [0] oxxxxxxx xxxxxxxx [MSB]
3070 00:39:14.192796 43, [0] xxxxxxxx xxxxxxxx [MSB]
3071 00:39:14.196050 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3072 00:39:14.199672 iDelay=43, Bit 1, Center 23 (5 ~ 41) 37
3073 00:39:14.202761 iDelay=43, Bit 2, Center 16 (0 ~ 33) 34
3074 00:39:14.206033 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
3075 00:39:14.209680 iDelay=43, Bit 4, Center 19 (2 ~ 37) 36
3076 00:39:14.213092 iDelay=43, Bit 5, Center 23 (5 ~ 41) 37
3077 00:39:14.216186 iDelay=43, Bit 6, Center 24 (7 ~ 41) 35
3078 00:39:14.219504 iDelay=43, Bit 7, Center 19 (1 ~ 38) 38
3079 00:39:14.223165 iDelay=43, Bit 8, Center 19 (2 ~ 37) 36
3080 00:39:14.229518 iDelay=43, Bit 9, Center 20 (2 ~ 38) 37
3081 00:39:14.232781 iDelay=43, Bit 10, Center 19 (2 ~ 36) 35
3082 00:39:14.236152 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
3083 00:39:14.240139 iDelay=43, Bit 12, Center 22 (5 ~ 40) 36
3084 00:39:14.242687 iDelay=43, Bit 13, Center 20 (3 ~ 37) 35
3085 00:39:14.246203 iDelay=43, Bit 14, Center 20 (3 ~ 37) 35
3086 00:39:14.249546 iDelay=43, Bit 15, Center 16 (-1 ~ 34) 36
3087 00:39:14.249643 ==
3088 00:39:14.256169 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3089 00:39:14.259814 fsp= 1, odt_onoff= 1, Byte mode= 0
3090 00:39:14.259906 ==
3091 00:39:14.259978 DQS Delay:
3092 00:39:14.262873 DQS0 = 0, DQS1 = 0
3093 00:39:14.262964 DQM Delay:
3094 00:39:14.263036 DQM0 = 20, DQM1 = 19
3095 00:39:14.266366 DQ Delay:
3096 00:39:14.270144 DQ0 =24, DQ1 =23, DQ2 =16, DQ3 =15
3097 00:39:14.272885 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
3098 00:39:14.272990 DQ8 =19, DQ9 =20, DQ10 =19, DQ11 =20
3099 00:39:14.279706 DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =16
3100 00:39:14.279820
3101 00:39:14.279910
3102 00:39:14.279993 DramC Write-DBI off
3103 00:39:14.280076 ==
3104 00:39:14.286579 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3105 00:39:14.290165 fsp= 1, odt_onoff= 1, Byte mode= 0
3106 00:39:14.290331 ==
3107 00:39:14.293379 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3108 00:39:14.293536
3109 00:39:14.296424 Begin, DQ Scan Range 927~1183
3110 00:39:14.296580
3111 00:39:14.296704
3112 00:39:14.299569 TX Vref Scan disable
3113 00:39:14.303253 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3114 00:39:14.306638 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3115 00:39:14.309686 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3116 00:39:14.313253 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3117 00:39:14.316375 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3118 00:39:14.319906 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3119 00:39:14.323120 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3120 00:39:14.326361 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3121 00:39:14.329976 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3122 00:39:14.333248 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3123 00:39:14.336376 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3124 00:39:14.339753 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3125 00:39:14.343036 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3126 00:39:14.346198 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3127 00:39:14.353325 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3128 00:39:14.356582 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3129 00:39:14.360063 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3130 00:39:14.363094 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3131 00:39:14.366291 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3132 00:39:14.369611 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3133 00:39:14.373118 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3134 00:39:14.376377 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3135 00:39:14.379904 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3136 00:39:14.383260 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3137 00:39:14.386271 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3138 00:39:14.389663 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3139 00:39:14.392793 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3140 00:39:14.396230 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3141 00:39:14.399905 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3142 00:39:14.403223 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3143 00:39:14.406415 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3144 00:39:14.413154 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3145 00:39:14.416305 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3146 00:39:14.419734 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3147 00:39:14.422716 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3148 00:39:14.426087 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3149 00:39:14.429717 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3150 00:39:14.432660 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3151 00:39:14.435873 965 |3 6 5|[0] xxxxxxxx xxxxxxxo [MSB]
3152 00:39:14.439501 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
3153 00:39:14.442761 967 |3 6 7|[0] xxxxxxxx xoxxxxxo [MSB]
3154 00:39:14.446058 968 |3 6 8|[0] xxxxxxxx oooxxxxo [MSB]
3155 00:39:14.449683 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
3156 00:39:14.452737 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
3157 00:39:14.456193 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3158 00:39:14.459402 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3159 00:39:14.463203 973 |3 6 13|[0] xxooxxxx oooooooo [MSB]
3160 00:39:14.466341 974 |3 6 14|[0] xxooxxxx oooooooo [MSB]
3161 00:39:14.469485 975 |3 6 15|[0] xxoooxxx oooooooo [MSB]
3162 00:39:14.472823 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
3163 00:39:14.480727 987 |3 6 27|[0] oooooooo ooooooox [MSB]
3164 00:39:14.484051 988 |3 6 28|[0] oooooooo ooooooox [MSB]
3165 00:39:14.487544 989 |3 6 29|[0] oooooooo ooooooox [MSB]
3166 00:39:14.491007 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3167 00:39:14.494028 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3168 00:39:14.497568 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3169 00:39:14.500805 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3170 00:39:14.504390 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3171 00:39:14.507748 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
3172 00:39:14.510726 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
3173 00:39:14.514271 997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB]
3174 00:39:14.517846 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
3175 00:39:14.520852 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3176 00:39:14.523932 Byte0, DQ PI dly=985, DQM PI dly= 985
3177 00:39:14.530694 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
3178 00:39:14.530830
3179 00:39:14.534353 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
3180 00:39:14.534475
3181 00:39:14.537372 Byte1, DQ PI dly=977, DQM PI dly= 977
3182 00:39:14.540479 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3183 00:39:14.540599
3184 00:39:14.547439 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3185 00:39:14.547538
3186 00:39:14.547629 ==
3187 00:39:14.550931 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3188 00:39:14.553900 fsp= 1, odt_onoff= 1, Byte mode= 0
3189 00:39:14.553997 ==
3190 00:39:14.560811 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3191 00:39:14.560961
3192 00:39:14.561090 Begin, DQ Scan Range 953~1017
3193 00:39:14.564256 Write Rank1 MR14 =0x0
3194 00:39:14.573124
3195 00:39:14.573314 CH=1, VrefRange= 0, VrefLevel = 0
3196 00:39:14.579922 TX Bit0 (979~997) 19 988, Bit8 (969~985) 17 977,
3197 00:39:14.583402 TX Bit1 (978~996) 19 987, Bit9 (969~985) 17 977,
3198 00:39:14.589798 TX Bit2 (976~991) 16 983, Bit10 (969~985) 17 977,
3199 00:39:14.593184 TX Bit3 (975~990) 16 982, Bit11 (970~988) 19 979,
3200 00:39:14.596065 TX Bit4 (976~992) 17 984, Bit12 (970~986) 17 978,
3201 00:39:14.603287 TX Bit5 (978~997) 20 987, Bit13 (972~985) 14 978,
3202 00:39:14.605900 TX Bit6 (978~997) 20 987, Bit14 (970~986) 17 978,
3203 00:39:14.609949 TX Bit7 (977~991) 15 984, Bit15 (967~984) 18 975,
3204 00:39:14.610047
3205 00:39:14.612647 Write Rank1 MR14 =0x2
3206 00:39:14.621924
3207 00:39:14.622013 CH=1, VrefRange= 0, VrefLevel = 2
3208 00:39:14.628429 TX Bit0 (979~998) 20 988, Bit8 (969~985) 17 977,
3209 00:39:14.632316 TX Bit1 (978~996) 19 987, Bit9 (969~985) 17 977,
3210 00:39:14.638883 TX Bit2 (975~991) 17 983, Bit10 (970~985) 16 977,
3211 00:39:14.642113 TX Bit3 (974~991) 18 982, Bit11 (971~989) 19 980,
3212 00:39:14.645688 TX Bit4 (976~993) 18 984, Bit12 (970~987) 18 978,
3213 00:39:14.652047 TX Bit5 (978~997) 20 987, Bit13 (971~986) 16 978,
3214 00:39:14.655626 TX Bit6 (978~997) 20 987, Bit14 (970~987) 18 978,
3215 00:39:14.659184 TX Bit7 (977~992) 16 984, Bit15 (967~984) 18 975,
3216 00:39:14.659292
3217 00:39:14.662069 Write Rank1 MR14 =0x4
3218 00:39:14.671037
3219 00:39:14.671172 CH=1, VrefRange= 0, VrefLevel = 4
3220 00:39:14.678111 TX Bit0 (978~998) 21 988, Bit8 (969~986) 18 977,
3221 00:39:14.681696 TX Bit1 (978~997) 20 987, Bit9 (968~985) 18 976,
3222 00:39:14.688315 TX Bit2 (975~992) 18 983, Bit10 (969~986) 18 977,
3223 00:39:14.691671 TX Bit3 (974~991) 18 982, Bit11 (970~990) 21 980,
3224 00:39:14.694487 TX Bit4 (976~993) 18 984, Bit12 (970~987) 18 978,
3225 00:39:14.701584 TX Bit5 (978~997) 20 987, Bit13 (971~986) 16 978,
3226 00:39:14.705014 TX Bit6 (978~998) 21 988, Bit14 (970~987) 18 978,
3227 00:39:14.708308 TX Bit7 (977~992) 16 984, Bit15 (966~984) 19 975,
3228 00:39:14.708621
3229 00:39:14.710946 Write Rank1 MR14 =0x6
3230 00:39:14.720519
3231 00:39:14.720732 CH=1, VrefRange= 0, VrefLevel = 6
3232 00:39:14.726985 TX Bit0 (978~999) 22 988, Bit8 (969~986) 18 977,
3233 00:39:14.730575 TX Bit1 (978~997) 20 987, Bit9 (968~986) 19 977,
3234 00:39:14.737392 TX Bit2 (975~992) 18 983, Bit10 (969~986) 18 977,
3235 00:39:14.740199 TX Bit3 (974~992) 19 983, Bit11 (970~990) 21 980,
3236 00:39:14.743921 TX Bit4 (976~994) 19 985, Bit12 (969~988) 20 978,
3237 00:39:14.750691 TX Bit5 (978~998) 21 988, Bit13 (970~987) 18 978,
3238 00:39:14.753861 TX Bit6 (978~999) 22 988, Bit14 (970~988) 19 979,
3239 00:39:14.757404 TX Bit7 (977~993) 17 985, Bit15 (967~984) 18 975,
3240 00:39:14.757497
3241 00:39:14.760553 Write Rank1 MR14 =0x8
3242 00:39:14.769522
3243 00:39:14.769642 CH=1, VrefRange= 0, VrefLevel = 8
3244 00:39:14.776614 TX Bit0 (978~999) 22 988, Bit8 (969~987) 19 978,
3245 00:39:14.779925 TX Bit1 (978~998) 21 988, Bit9 (968~986) 19 977,
3246 00:39:14.787151 TX Bit2 (975~992) 18 983, Bit10 (969~987) 19 978,
3247 00:39:14.789569 TX Bit3 (973~992) 20 982, Bit11 (970~991) 22 980,
3248 00:39:14.792825 TX Bit4 (976~995) 20 985, Bit12 (969~989) 21 979,
3249 00:39:14.799933 TX Bit5 (977~998) 22 987, Bit13 (970~988) 19 979,
3250 00:39:14.802812 TX Bit6 (977~998) 22 987, Bit14 (969~988) 20 978,
3251 00:39:14.806166 TX Bit7 (977~994) 18 985, Bit15 (966~985) 20 975,
3252 00:39:14.806251
3253 00:39:14.809600 Write Rank1 MR14 =0xa
3254 00:39:14.818952
3255 00:39:14.822486 CH=1, VrefRange= 0, VrefLevel = 10
3256 00:39:14.826027 TX Bit0 (978~999) 22 988, Bit8 (969~988) 20 978,
3257 00:39:14.828829 TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977,
3258 00:39:14.836094 TX Bit2 (975~993) 19 984, Bit10 (968~988) 21 978,
3259 00:39:14.839187 TX Bit3 (973~992) 20 982, Bit11 (970~991) 22 980,
3260 00:39:14.842713 TX Bit4 (975~995) 21 985, Bit12 (969~990) 22 979,
3261 00:39:14.848764 TX Bit5 (977~998) 22 987, Bit13 (969~988) 20 978,
3262 00:39:14.852389 TX Bit6 (977~999) 23 988, Bit14 (969~989) 21 979,
3263 00:39:14.856102 TX Bit7 (977~994) 18 985, Bit15 (966~985) 20 975,
3264 00:39:14.856354
3265 00:39:14.859271 Write Rank1 MR14 =0xc
3266 00:39:14.868702
3267 00:39:14.871880 CH=1, VrefRange= 0, VrefLevel = 12
3268 00:39:14.875289 TX Bit0 (977~1000) 24 988, Bit8 (968~988) 21 978,
3269 00:39:14.878522 TX Bit1 (977~998) 22 987, Bit9 (968~988) 21 978,
3270 00:39:14.885655 TX Bit2 (975~993) 19 984, Bit10 (969~988) 20 978,
3271 00:39:14.888501 TX Bit3 (972~993) 22 982, Bit11 (969~991) 23 980,
3272 00:39:14.891993 TX Bit4 (975~996) 22 985, Bit12 (969~990) 22 979,
3273 00:39:14.898665 TX Bit5 (977~999) 23 988, Bit13 (970~989) 20 979,
3274 00:39:14.901736 TX Bit6 (978~999) 22 988, Bit14 (969~990) 22 979,
3275 00:39:14.905091 TX Bit7 (977~995) 19 986, Bit15 (966~985) 20 975,
3276 00:39:14.908462
3277 00:39:14.908890 Write Rank1 MR14 =0xe
3278 00:39:14.918381
3279 00:39:14.921737 CH=1, VrefRange= 0, VrefLevel = 14
3280 00:39:14.925036 TX Bit0 (978~1000) 23 989, Bit8 (968~989) 22 978,
3281 00:39:14.928204 TX Bit1 (977~999) 23 988, Bit9 (968~988) 21 978,
3282 00:39:14.934696 TX Bit2 (974~994) 21 984, Bit10 (968~989) 22 978,
3283 00:39:14.938221 TX Bit3 (972~993) 22 982, Bit11 (969~991) 23 980,
3284 00:39:14.941586 TX Bit4 (975~997) 23 986, Bit12 (969~990) 22 979,
3285 00:39:14.948116 TX Bit5 (977~999) 23 988, Bit13 (969~990) 22 979,
3286 00:39:14.951580 TX Bit6 (977~999) 23 988, Bit14 (969~990) 22 979,
3287 00:39:14.954516 TX Bit7 (976~995) 20 985, Bit15 (965~986) 22 975,
3288 00:39:14.957991
3289 00:39:14.958086 Write Rank1 MR14 =0x10
3290 00:39:14.967721
3291 00:39:14.971038 CH=1, VrefRange= 0, VrefLevel = 16
3292 00:39:14.974689 TX Bit0 (977~1000) 24 988, Bit8 (968~990) 23 979,
3293 00:39:14.978014 TX Bit1 (977~999) 23 988, Bit9 (967~989) 23 978,
3294 00:39:14.984856 TX Bit2 (974~994) 21 984, Bit10 (968~990) 23 979,
3295 00:39:14.988179 TX Bit3 (971~994) 24 982, Bit11 (969~992) 24 980,
3296 00:39:14.991114 TX Bit4 (975~997) 23 986, Bit12 (969~991) 23 980,
3297 00:39:14.997827 TX Bit5 (977~999) 23 988, Bit13 (969~990) 22 979,
3298 00:39:15.001251 TX Bit6 (977~1000) 24 988, Bit14 (969~990) 22 979,
3299 00:39:15.004827 TX Bit7 (976~996) 21 986, Bit15 (965~986) 22 975,
3300 00:39:15.007531
3301 00:39:15.007678 Write Rank1 MR14 =0x12
3302 00:39:15.017957
3303 00:39:15.020942 CH=1, VrefRange= 0, VrefLevel = 18
3304 00:39:15.024531 TX Bit0 (977~1000) 24 988, Bit8 (968~990) 23 979,
3305 00:39:15.027680 TX Bit1 (977~999) 23 988, Bit9 (967~990) 24 978,
3306 00:39:15.034448 TX Bit2 (973~995) 23 984, Bit10 (968~990) 23 979,
3307 00:39:15.037755 TX Bit3 (971~994) 24 982, Bit11 (968~992) 25 980,
3308 00:39:15.041439 TX Bit4 (975~997) 23 986, Bit12 (968~991) 24 979,
3309 00:39:15.048298 TX Bit5 (977~999) 23 988, Bit13 (969~990) 22 979,
3310 00:39:15.051683 TX Bit6 (977~1000) 24 988, Bit14 (968~991) 24 979,
3311 00:39:15.054750 TX Bit7 (976~996) 21 986, Bit15 (965~987) 23 976,
3312 00:39:15.055195
3313 00:39:15.057832 Write Rank1 MR14 =0x14
3314 00:39:15.067966
3315 00:39:15.071465 CH=1, VrefRange= 0, VrefLevel = 20
3316 00:39:15.074716 TX Bit0 (977~1001) 25 989, Bit8 (968~990) 23 979,
3317 00:39:15.077926 TX Bit1 (976~999) 24 987, Bit9 (967~990) 24 978,
3318 00:39:15.084928 TX Bit2 (973~996) 24 984, Bit10 (967~990) 24 978,
3319 00:39:15.088006 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
3320 00:39:15.091217 TX Bit4 (974~998) 25 986, Bit12 (968~991) 24 979,
3321 00:39:15.098470 TX Bit5 (976~999) 24 987, Bit13 (969~991) 23 980,
3322 00:39:15.101214 TX Bit6 (976~1000) 25 988, Bit14 (968~991) 24 979,
3323 00:39:15.104246 TX Bit7 (976~997) 22 986, Bit15 (964~987) 24 975,
3324 00:39:15.107782
3325 00:39:15.108208 Write Rank1 MR14 =0x16
3326 00:39:15.117869
3327 00:39:15.121134 CH=1, VrefRange= 0, VrefLevel = 22
3328 00:39:15.124296 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978,
3329 00:39:15.127637 TX Bit1 (976~999) 24 987, Bit9 (967~990) 24 978,
3330 00:39:15.134542 TX Bit2 (972~996) 25 984, Bit10 (968~989) 22 978,
3331 00:39:15.137503 TX Bit3 (970~995) 26 982, Bit11 (968~992) 25 980,
3332 00:39:15.141174 TX Bit4 (974~998) 25 986, Bit12 (968~991) 24 979,
3333 00:39:15.147530 TX Bit5 (976~1000) 25 988, Bit13 (968~991) 24 979,
3334 00:39:15.150892 TX Bit6 (976~1001) 26 988, Bit14 (968~991) 24 979,
3335 00:39:15.154551 TX Bit7 (975~997) 23 986, Bit15 (964~988) 25 976,
3336 00:39:15.157898
3337 00:39:15.158320 Write Rank1 MR14 =0x18
3338 00:39:15.167864
3339 00:39:15.171209 CH=1, VrefRange= 0, VrefLevel = 24
3340 00:39:15.174536 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
3341 00:39:15.178012 TX Bit1 (977~1000) 24 988, Bit9 (966~989) 24 977,
3342 00:39:15.184876 TX Bit2 (972~997) 26 984, Bit10 (967~989) 23 978,
3343 00:39:15.187944 TX Bit3 (970~995) 26 982, Bit11 (968~991) 24 979,
3344 00:39:15.191331 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
3345 00:39:15.197867 TX Bit5 (976~1000) 25 988, Bit13 (968~990) 23 979,
3346 00:39:15.201148 TX Bit6 (977~1001) 25 989, Bit14 (967~991) 25 979,
3347 00:39:15.208130 TX Bit7 (975~998) 24 986, Bit15 (963~987) 25 975,
3348 00:39:15.208625
3349 00:39:15.208965 Write Rank1 MR14 =0x1a
3350 00:39:15.217967
3351 00:39:15.221117 CH=1, VrefRange= 0, VrefLevel = 26
3352 00:39:15.224850 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
3353 00:39:15.227871 TX Bit1 (977~1000) 24 988, Bit9 (966~989) 24 977,
3354 00:39:15.234935 TX Bit2 (972~997) 26 984, Bit10 (967~989) 23 978,
3355 00:39:15.238317 TX Bit3 (970~995) 26 982, Bit11 (968~991) 24 979,
3356 00:39:15.241722 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
3357 00:39:15.248478 TX Bit5 (976~1000) 25 988, Bit13 (968~990) 23 979,
3358 00:39:15.251687 TX Bit6 (977~1001) 25 989, Bit14 (967~991) 25 979,
3359 00:39:15.255077 TX Bit7 (975~998) 24 986, Bit15 (963~987) 25 975,
3360 00:39:15.258071
3361 00:39:15.258488 Write Rank1 MR14 =0x1c
3362 00:39:15.268039
3363 00:39:15.271497 CH=1, VrefRange= 0, VrefLevel = 28
3364 00:39:15.274687 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
3365 00:39:15.278081 TX Bit1 (977~1000) 24 988, Bit9 (966~989) 24 977,
3366 00:39:15.284593 TX Bit2 (972~997) 26 984, Bit10 (967~989) 23 978,
3367 00:39:15.288404 TX Bit3 (970~995) 26 982, Bit11 (968~991) 24 979,
3368 00:39:15.291692 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
3369 00:39:15.297908 TX Bit5 (976~1000) 25 988, Bit13 (968~990) 23 979,
3370 00:39:15.301822 TX Bit6 (977~1001) 25 989, Bit14 (967~991) 25 979,
3371 00:39:15.308238 TX Bit7 (975~998) 24 986, Bit15 (963~987) 25 975,
3372 00:39:15.308773
3373 00:39:15.309117 Write Rank1 MR14 =0x1e
3374 00:39:15.318734
3375 00:39:15.321583 CH=1, VrefRange= 0, VrefLevel = 30
3376 00:39:15.324934 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
3377 00:39:15.328390 TX Bit1 (977~1000) 24 988, Bit9 (966~989) 24 977,
3378 00:39:15.335215 TX Bit2 (972~997) 26 984, Bit10 (967~989) 23 978,
3379 00:39:15.338324 TX Bit3 (970~995) 26 982, Bit11 (968~991) 24 979,
3380 00:39:15.341634 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
3381 00:39:15.348284 TX Bit5 (976~1000) 25 988, Bit13 (968~990) 23 979,
3382 00:39:15.351365 TX Bit6 (977~1001) 25 989, Bit14 (967~991) 25 979,
3383 00:39:15.358381 TX Bit7 (975~998) 24 986, Bit15 (963~987) 25 975,
3384 00:39:15.358805
3385 00:39:15.359205 Write Rank1 MR14 =0x20
3386 00:39:15.368729
3387 00:39:15.372067 CH=1, VrefRange= 0, VrefLevel = 32
3388 00:39:15.375199 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
3389 00:39:15.378657 TX Bit1 (977~1000) 24 988, Bit9 (966~989) 24 977,
3390 00:39:15.385231 TX Bit2 (972~997) 26 984, Bit10 (967~989) 23 978,
3391 00:39:15.388282 TX Bit3 (970~995) 26 982, Bit11 (968~991) 24 979,
3392 00:39:15.392193 TX Bit4 (974~998) 25 986, Bit12 (968~992) 25 980,
3393 00:39:15.398668 TX Bit5 (976~1000) 25 988, Bit13 (968~990) 23 979,
3394 00:39:15.401494 TX Bit6 (977~1001) 25 989, Bit14 (967~991) 25 979,
3395 00:39:15.408485 TX Bit7 (975~998) 24 986, Bit15 (963~987) 25 975,
3396 00:39:15.409028
3397 00:39:15.409420
3398 00:39:15.411882 TX Vref found, early break! 363< 374
3399 00:39:15.415305 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3400 00:39:15.418170 u1DelayCellOfst[0]=8 cells (7 PI)
3401 00:39:15.421362 u1DelayCellOfst[1]=7 cells (6 PI)
3402 00:39:15.425121 u1DelayCellOfst[2]=2 cells (2 PI)
3403 00:39:15.428128 u1DelayCellOfst[3]=0 cells (0 PI)
3404 00:39:15.431587 u1DelayCellOfst[4]=5 cells (4 PI)
3405 00:39:15.432018 u1DelayCellOfst[5]=7 cells (6 PI)
3406 00:39:15.435013 u1DelayCellOfst[6]=8 cells (7 PI)
3407 00:39:15.438343 u1DelayCellOfst[7]=5 cells (4 PI)
3408 00:39:15.441920 Byte0, DQ PI dly=982, DQM PI dly= 985
3409 00:39:15.448557 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3410 00:39:15.449144
3411 00:39:15.451653 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3412 00:39:15.452086
3413 00:39:15.455254 u1DelayCellOfst[8]=3 cells (3 PI)
3414 00:39:15.458016 u1DelayCellOfst[9]=2 cells (2 PI)
3415 00:39:15.461637 u1DelayCellOfst[10]=3 cells (3 PI)
3416 00:39:15.465114 u1DelayCellOfst[11]=5 cells (4 PI)
3417 00:39:15.468076 u1DelayCellOfst[12]=6 cells (5 PI)
3418 00:39:15.471311 u1DelayCellOfst[13]=5 cells (4 PI)
3419 00:39:15.474693 u1DelayCellOfst[14]=5 cells (4 PI)
3420 00:39:15.475125 u1DelayCellOfst[15]=0 cells (0 PI)
3421 00:39:15.478290 Byte1, DQ PI dly=975, DQM PI dly= 977
3422 00:39:15.484810 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
3423 00:39:15.485246
3424 00:39:15.488321 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
3425 00:39:15.488857
3426 00:39:15.491456 Write Rank1 MR14 =0x18
3427 00:39:15.491884
3428 00:39:15.492223 Final TX Range 0 Vref 24
3429 00:39:15.495163
3430 00:39:15.498205 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3431 00:39:15.498709
3432 00:39:15.505127 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3433 00:39:15.515289 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3434 00:39:15.521535 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3435 00:39:15.521967 Write Rank1 MR3 =0xb0
3436 00:39:15.524988 DramC Write-DBI on
3437 00:39:15.525459 ==
3438 00:39:15.528432 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3439 00:39:15.531388 fsp= 1, odt_onoff= 1, Byte mode= 0
3440 00:39:15.531821 ==
3441 00:39:15.538560 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3442 00:39:15.538993
3443 00:39:15.539337 Begin, DQ Scan Range 697~761
3444 00:39:15.539661
3445 00:39:15.541696
3446 00:39:15.542123 TX Vref Scan disable
3447 00:39:15.545095 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3448 00:39:15.548510 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3449 00:39:15.551628 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3450 00:39:15.555154 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3451 00:39:15.558378 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3452 00:39:15.561692 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3453 00:39:15.568571 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3454 00:39:15.571581 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3455 00:39:15.574888 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3456 00:39:15.578171 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3457 00:39:15.581679 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3458 00:39:15.585081 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
3459 00:39:15.588713 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
3460 00:39:15.591968 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
3461 00:39:15.594852 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3462 00:39:15.598660 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3463 00:39:15.601771 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3464 00:39:15.605536 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3465 00:39:15.608869 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3466 00:39:15.611809 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3467 00:39:15.615345 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3468 00:39:15.623192 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
3469 00:39:15.626867 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3470 00:39:15.629778 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3471 00:39:15.633040 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3472 00:39:15.636197 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3473 00:39:15.639657 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3474 00:39:15.643116 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3475 00:39:15.646169 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3476 00:39:15.649724 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3477 00:39:15.652957 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3478 00:39:15.656501 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
3479 00:39:15.659435 Byte0, DQ PI dly=731, DQM PI dly= 731
3480 00:39:15.666346 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
3481 00:39:15.666781
3482 00:39:15.669369 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
3483 00:39:15.669807
3484 00:39:15.672906 Byte1, DQ PI dly=721, DQM PI dly= 721
3485 00:39:15.676211 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
3486 00:39:15.676644
3487 00:39:15.679716 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
3488 00:39:15.683273
3489 00:39:15.686427 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3490 00:39:15.696094 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3491 00:39:15.703103 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3492 00:39:15.703672 Write Rank1 MR3 =0x30
3493 00:39:15.706262 DramC Write-DBI off
3494 00:39:15.706725
3495 00:39:15.707062 [DATLAT]
3496 00:39:15.709802 Freq=1600, CH1 RK1, use_rxtx_scan=0
3497 00:39:15.710261
3498 00:39:15.712756 DATLAT Default: 0x10
3499 00:39:15.713179 7, 0xFFFF, sum=0
3500 00:39:15.716246 8, 0xFFFF, sum=0
3501 00:39:15.716675 9, 0xFFFF, sum=0
3502 00:39:15.720216 10, 0xFFFF, sum=0
3503 00:39:15.720667 11, 0xFFFF, sum=0
3504 00:39:15.723290 12, 0xFFFF, sum=0
3505 00:39:15.723762 13, 0xFFFF, sum=0
3506 00:39:15.726062 14, 0x0, sum=1
3507 00:39:15.726567 15, 0x0, sum=2
3508 00:39:15.727070 16, 0x0, sum=3
3509 00:39:15.729804 17, 0x0, sum=4
3510 00:39:15.732842 pattern=2 first_step=14 total pass=5 best_step=16
3511 00:39:15.733297 ==
3512 00:39:15.739657 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3513 00:39:15.743363 fsp= 1, odt_onoff= 1, Byte mode= 0
3514 00:39:15.743785 ==
3515 00:39:15.746582 Start DQ dly to find pass range UseTestEngine =1
3516 00:39:15.750267 x-axis: bit #, y-axis: DQ dly (-127~63)
3517 00:39:15.750815 RX Vref Scan = 0
3518 00:39:15.752872 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3519 00:39:15.756684 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3520 00:39:15.759779 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3521 00:39:15.763209 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3522 00:39:15.766283 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3523 00:39:15.770147 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3524 00:39:15.773424 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3525 00:39:15.773896 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3526 00:39:15.776859 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3527 00:39:15.779893 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3528 00:39:15.783033 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3529 00:39:15.786746 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3530 00:39:15.789861 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3531 00:39:15.793171 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3532 00:39:15.796609 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3533 00:39:15.800037 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3534 00:39:15.800591 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3535 00:39:15.803789 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3536 00:39:15.806790 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3537 00:39:15.810041 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3538 00:39:15.813062 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3539 00:39:15.816619 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3540 00:39:15.819701 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3541 00:39:15.820131 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3542 00:39:15.823393 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3543 00:39:15.826555 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3544 00:39:15.829844 0, [0] xxooxxxx xxxxxxxo [MSB]
3545 00:39:15.833392 1, [0] xxooxxxx oxxxxxxo [MSB]
3546 00:39:15.836777 2, [0] xxoooxxo oooxxxxo [MSB]
3547 00:39:15.837208 3, [0] xxoooxxo ooooxooo [MSB]
3548 00:39:15.839649 4, [0] xxoooxxo oooooooo [MSB]
3549 00:39:15.843184 5, [0] xoooooxo oooooooo [MSB]
3550 00:39:15.846564 6, [0] xoooooxo oooooooo [MSB]
3551 00:39:15.849922 34, [0] oooxoooo oooooooo [MSB]
3552 00:39:15.853248 35, [0] oooxoooo ooooooox [MSB]
3553 00:39:15.856705 36, [0] ooxxoooo ooooooox [MSB]
3554 00:39:15.860476 37, [0] ooxxxoox ooxooxxx [MSB]
3555 00:39:15.863233 38, [0] ooxxxoox xxxooxxx [MSB]
3556 00:39:15.866499 39, [0] ooxxxoox xxxxoxxx [MSB]
3557 00:39:15.866931 40, [0] ooxxxoox xxxxxxxx [MSB]
3558 00:39:15.869787 41, [0] oxxxxoox xxxxxxxx [MSB]
3559 00:39:15.873767 42, [0] oxxxxxox xxxxxxxx [MSB]
3560 00:39:15.876559 43, [0] xxxxxxxx xxxxxxxx [MSB]
3561 00:39:15.880465 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3562 00:39:15.883807 iDelay=43, Bit 1, Center 22 (5 ~ 40) 36
3563 00:39:15.886963 iDelay=43, Bit 2, Center 17 (0 ~ 35) 36
3564 00:39:15.890576 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
3565 00:39:15.893310 iDelay=43, Bit 4, Center 19 (2 ~ 36) 35
3566 00:39:15.896740 iDelay=43, Bit 5, Center 23 (5 ~ 41) 37
3567 00:39:15.899896 iDelay=43, Bit 6, Center 24 (7 ~ 42) 36
3568 00:39:15.906762 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
3569 00:39:15.910062 iDelay=43, Bit 8, Center 19 (1 ~ 37) 37
3570 00:39:15.913559 iDelay=43, Bit 9, Center 19 (2 ~ 37) 36
3571 00:39:15.917222 iDelay=43, Bit 10, Center 19 (2 ~ 36) 35
3572 00:39:15.920348 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
3573 00:39:15.923426 iDelay=43, Bit 12, Center 21 (4 ~ 39) 36
3574 00:39:15.926662 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
3575 00:39:15.930001 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
3576 00:39:15.933373 iDelay=43, Bit 15, Center 17 (0 ~ 34) 35
3577 00:39:15.933818 ==
3578 00:39:15.940169 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3579 00:39:15.943643 fsp= 1, odt_onoff= 1, Byte mode= 0
3580 00:39:15.944173 ==
3581 00:39:15.944535 DQS Delay:
3582 00:39:15.946928 DQS0 = 0, DQS1 = 0
3583 00:39:15.947442 DQM Delay:
3584 00:39:15.947822 DQM0 = 20, DQM1 = 19
3585 00:39:15.949700 DQ Delay:
3586 00:39:15.953004 DQ0 =24, DQ1 =22, DQ2 =17, DQ3 =15
3587 00:39:15.956694 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
3588 00:39:15.959887 DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =20
3589 00:39:15.963425 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
3590 00:39:15.963845
3591 00:39:15.964176
3592 00:39:15.964485
3593 00:39:15.966951 [DramC_TX_OE_Calibration] TA2
3594 00:39:15.969839 Original DQ_B0 (3 6) =30, OEN = 27
3595 00:39:15.970279 Original DQ_B1 (3 6) =30, OEN = 27
3596 00:39:15.973226 23, 0x0, End_B0=23 End_B1=23
3597 00:39:15.976818 24, 0x0, End_B0=24 End_B1=24
3598 00:39:15.980323 25, 0x0, End_B0=25 End_B1=25
3599 00:39:15.983562 26, 0x0, End_B0=26 End_B1=26
3600 00:39:15.984010 27, 0x0, End_B0=27 End_B1=27
3601 00:39:15.986618 28, 0x0, End_B0=28 End_B1=28
3602 00:39:15.990101 29, 0x0, End_B0=29 End_B1=29
3603 00:39:15.993170 30, 0x0, End_B0=30 End_B1=30
3604 00:39:15.996950 31, 0xFFFF, End_B0=30 End_B1=30
3605 00:39:16.000058 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3606 00:39:16.006946 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3607 00:39:16.007372
3608 00:39:16.007705
3609 00:39:16.009870 Write Rank1 MR23 =0x3f
3610 00:39:16.010327 [DQSOSC]
3611 00:39:16.016649 [DQSOSCAuto] RK1, (LSB)MR18= 0xaf, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
3612 00:39:16.023015 CH1_RK1: MR19=0x3, MR18=0xAF, DQSOSC=334, MR23=63, INC=22, DEC=33
3613 00:39:16.023464 Write Rank1 MR23 =0x3f
3614 00:39:16.026555 [DQSOSC]
3615 00:39:16.033011 [DQSOSCAuto] RK1, (LSB)MR18= 0xb3, (MSB)MR19= 0x3, tDQSOscB0 = 332 ps tDQSOscB1 = 0 ps
3616 00:39:16.036556 CH1 RK1: MR19=3, MR18=B3
3617 00:39:16.039921 [RxdqsGatingPostProcess] freq 1600
3618 00:39:16.043602 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3619 00:39:16.046830 Rank: 0
3620 00:39:16.047318 best DQS0 dly(2T, 0.5T) = (2, 5)
3621 00:39:16.049713 best DQS1 dly(2T, 0.5T) = (2, 5)
3622 00:39:16.052995 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3623 00:39:16.056923 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3624 00:39:16.057493 Rank: 1
3625 00:39:16.059799 best DQS0 dly(2T, 0.5T) = (2, 5)
3626 00:39:16.063248 best DQS1 dly(2T, 0.5T) = (2, 5)
3627 00:39:16.066539 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3628 00:39:16.069749 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3629 00:39:16.076500 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3630 00:39:16.079693 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3631 00:39:16.083038 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3632 00:39:16.083552
3633 00:39:16.084086
3634 00:39:16.086296 [Calibration Summary] Freqency 1600
3635 00:39:16.086718 CH 0, Rank 0
3636 00:39:16.089548 All Pass.
3637 00:39:16.089970
3638 00:39:16.090301 CH 0, Rank 1
3639 00:39:16.090610 All Pass.
3640 00:39:16.090906
3641 00:39:16.093241 CH 1, Rank 0
3642 00:39:16.093700 All Pass.
3643 00:39:16.094036
3644 00:39:16.094349 CH 1, Rank 1
3645 00:39:16.096150 All Pass.
3646 00:39:16.096567
3647 00:39:16.103110 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3648 00:39:16.109577 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3649 00:39:16.116575 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3650 00:39:16.119531 Write Rank0 MR3 =0xb0
3651 00:39:16.126292 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3652 00:39:16.132967 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3653 00:39:16.139705 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3654 00:39:16.140145 Write Rank1 MR3 =0xb0
3655 00:39:16.146539 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3656 00:39:16.153039 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3657 00:39:16.159939 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3658 00:39:16.162961 Write Rank0 MR3 =0xb0
3659 00:39:16.169805 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3660 00:39:16.176849 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3661 00:39:16.183124 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3662 00:39:16.186109 Write Rank1 MR3 =0xb0
3663 00:39:16.186533 DramC Write-DBI on
3664 00:39:16.189290 [GetDramInforAfterCalByMRR] Vendor 1.
3665 00:39:16.193016 [GetDramInforAfterCalByMRR] Revision 7.
3666 00:39:16.196199 MR8 12
3667 00:39:16.199774 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3668 00:39:16.200255 MR8 12
3669 00:39:16.206186 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3670 00:39:16.206891 MR8 12
3671 00:39:16.209396 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3672 00:39:16.212928 MR8 12
3673 00:39:16.216436 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3674 00:39:16.226292 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3675 00:39:16.226972 Write Rank0 MR13 =0xd0
3676 00:39:16.229399 Write Rank1 MR13 =0xd0
3677 00:39:16.232847 Write Rank0 MR13 =0xd0
3678 00:39:16.233416 Write Rank1 MR13 =0xd0
3679 00:39:16.235988 Save calibration result to emmc
3680 00:39:16.236410
3681 00:39:16.236741
3682 00:39:16.239569 [DramcModeReg_Check] Freq_1600, FSP_1
3683 00:39:16.242563 FSP_1, CH_0, RK0
3684 00:39:16.243006 Write Rank0 MR13 =0xd8
3685 00:39:16.246052 MR12 = 0x56 (global = 0x56) match
3686 00:39:16.249373 MR14 = 0x1a (global = 0x1a) match
3687 00:39:16.253030 FSP_1, CH_0, RK1
3688 00:39:16.253493 Write Rank1 MR13 =0xd8
3689 00:39:16.256442 MR12 = 0x56 (global = 0x56) match
3690 00:39:16.260037 MR14 = 0x18 (global = 0x18) match
3691 00:39:16.262830 FSP_1, CH_1, RK0
3692 00:39:16.263250 Write Rank0 MR13 =0xd8
3693 00:39:16.266069 MR12 = 0x58 (global = 0x58) match
3694 00:39:16.269540 MR14 = 0x18 (global = 0x18) match
3695 00:39:16.272987 FSP_1, CH_1, RK1
3696 00:39:16.273450 Write Rank1 MR13 =0xd8
3697 00:39:16.276702 MR12 = 0x58 (global = 0x58) match
3698 00:39:16.279544 MR14 = 0x18 (global = 0x18) match
3699 00:39:16.279968
3700 00:39:16.285808 [MEM_TEST] 02: After DFS, before run time config
3701 00:39:16.293167 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3702 00:39:16.293698
3703 00:39:16.296312 [TA2_TEST]
3704 00:39:16.296733 === TA2 HW
3705 00:39:16.297069 TA2 PAT: XTALK
3706 00:39:16.302822 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3707 00:39:16.305936 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3708 00:39:16.312839 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3709 00:39:16.316322 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3710 00:39:16.316837
3711 00:39:16.317178
3712 00:39:16.319645 Settings after calibration
3713 00:39:16.320067
3714 00:39:16.323063 [DramcRunTimeConfig]
3715 00:39:16.326005 TransferPLLToSPMControl - MODE SW PHYPLL
3716 00:39:16.326428 TX_TRACKING: ON
3717 00:39:16.329753 RX_TRACKING: ON
3718 00:39:16.330171 HW_GATING: ON
3719 00:39:16.333108 HW_GATING DBG: OFF
3720 00:39:16.333582 ddr_geometry:1
3721 00:39:16.333938 ddr_geometry:1
3722 00:39:16.336038 ddr_geometry:1
3723 00:39:16.336454 ddr_geometry:1
3724 00:39:16.339576 ddr_geometry:1
3725 00:39:16.339994 ddr_geometry:1
3726 00:39:16.340324 ddr_geometry:1
3727 00:39:16.343278 ddr_geometry:1
3728 00:39:16.345937 High Freq DUMMY_READ_FOR_TRACKING: ON
3729 00:39:16.346364 ZQCS_ENABLE_LP4: OFF
3730 00:39:16.349484 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3731 00:39:16.352973 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3732 00:39:16.356198 SPM_CONTROL_AFTERK: ON
3733 00:39:16.359535 IMPEDANCE_TRACKING: ON
3734 00:39:16.359956 TEMP_SENSOR: ON
3735 00:39:16.362812 PER_BANK_REFRESH: ON
3736 00:39:16.363257 HW_SAVE_FOR_SR: ON
3737 00:39:16.365864 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3738 00:39:16.369419 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3739 00:39:16.372915 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3740 00:39:16.375926 Read ODT Tracking: ON
3741 00:39:16.376346 =========================
3742 00:39:16.379052
3743 00:39:16.379475 [TA2_TEST]
3744 00:39:16.379809 === TA2 HW
3745 00:39:16.386316 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3746 00:39:16.389233 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3747 00:39:16.396031 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3748 00:39:16.399373 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3749 00:39:16.399905
3750 00:39:16.402722 [MEM_TEST] 03: After run time config
3751 00:39:16.413968 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3752 00:39:16.416620 [complex_mem_test] start addr:0x40024000, len:131072
3753 00:39:16.621078 1st complex R/W mem test pass
3754 00:39:16.627515 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3755 00:39:16.631061 sync preloader write leveling
3756 00:39:16.634743 sync preloader cbt_mr12
3757 00:39:16.637384 sync preloader cbt_clk_dly
3758 00:39:16.637855 sync preloader cbt_cmd_dly
3759 00:39:16.640913 sync preloader cbt_cs
3760 00:39:16.644711 sync preloader cbt_ca_perbit_delay
3761 00:39:16.645246 sync preloader clk_delay
3762 00:39:16.647993 sync preloader dqs_delay
3763 00:39:16.650778 sync preloader u1Gating2T_Save
3764 00:39:16.654299 sync preloader u1Gating05T_Save
3765 00:39:16.657561 sync preloader u1Gatingfine_tune_Save
3766 00:39:16.660868 sync preloader u1Gatingucpass_count_Save
3767 00:39:16.663975 sync preloader u1TxWindowPerbitVref_Save
3768 00:39:16.667740 sync preloader u1TxCenter_min_Save
3769 00:39:16.671138 sync preloader u1TxCenter_max_Save
3770 00:39:16.674115 sync preloader u1Txwin_center_Save
3771 00:39:16.677478 sync preloader u1Txfirst_pass_Save
3772 00:39:16.681033 sync preloader u1Txlast_pass_Save
3773 00:39:16.681497 sync preloader u1RxDatlat_Save
3774 00:39:16.684412 sync preloader u1RxWinPerbitVref_Save
3775 00:39:16.690605 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3776 00:39:16.694033 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3777 00:39:16.697242 sync preloader delay_cell_unit
3778 00:39:16.704124 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3779 00:39:16.707641 sync preloader write leveling
3780 00:39:16.708162 sync preloader cbt_mr12
3781 00:39:16.710861 sync preloader cbt_clk_dly
3782 00:39:16.713863 sync preloader cbt_cmd_dly
3783 00:39:16.714298 sync preloader cbt_cs
3784 00:39:16.717510 sync preloader cbt_ca_perbit_delay
3785 00:39:16.720944 sync preloader clk_delay
3786 00:39:16.724381 sync preloader dqs_delay
3787 00:39:16.724830 sync preloader u1Gating2T_Save
3788 00:39:16.727770 sync preloader u1Gating05T_Save
3789 00:39:16.730758 sync preloader u1Gatingfine_tune_Save
3790 00:39:16.733862 sync preloader u1Gatingucpass_count_Save
3791 00:39:16.737709 sync preloader u1TxWindowPerbitVref_Save
3792 00:39:16.740958 sync preloader u1TxCenter_min_Save
3793 00:39:16.744476 sync preloader u1TxCenter_max_Save
3794 00:39:16.747090 sync preloader u1Txwin_center_Save
3795 00:39:16.750431 sync preloader u1Txfirst_pass_Save
3796 00:39:16.753898 sync preloader u1Txlast_pass_Save
3797 00:39:16.757230 sync preloader u1RxDatlat_Save
3798 00:39:16.760957 sync preloader u1RxWinPerbitVref_Save
3799 00:39:16.764019 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3800 00:39:16.767284 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3801 00:39:16.770295 sync preloader delay_cell_unit
3802 00:39:16.777278 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3803 00:39:16.780304 sync preloader write leveling
3804 00:39:16.783927 sync preloader cbt_mr12
3805 00:39:16.784021 sync preloader cbt_clk_dly
3806 00:39:16.787021 sync preloader cbt_cmd_dly
3807 00:39:16.790289 sync preloader cbt_cs
3808 00:39:16.793917 sync preloader cbt_ca_perbit_delay
3809 00:39:16.794062 sync preloader clk_delay
3810 00:39:16.796814 sync preloader dqs_delay
3811 00:39:16.800339 sync preloader u1Gating2T_Save
3812 00:39:16.803806 sync preloader u1Gating05T_Save
3813 00:39:16.807228 sync preloader u1Gatingfine_tune_Save
3814 00:39:16.810112 sync preloader u1Gatingucpass_count_Save
3815 00:39:16.813699 sync preloader u1TxWindowPerbitVref_Save
3816 00:39:16.817368 sync preloader u1TxCenter_min_Save
3817 00:39:16.820702 sync preloader u1TxCenter_max_Save
3818 00:39:16.824420 sync preloader u1Txwin_center_Save
3819 00:39:16.827575 sync preloader u1Txfirst_pass_Save
3820 00:39:16.828273 sync preloader u1Txlast_pass_Save
3821 00:39:16.830717 sync preloader u1RxDatlat_Save
3822 00:39:16.834103 sync preloader u1RxWinPerbitVref_Save
3823 00:39:16.840891 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3824 00:39:16.844356 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3825 00:39:16.847362 sync preloader delay_cell_unit
3826 00:39:16.850809 just_for_test_dump_coreboot_params dump all params
3827 00:39:16.851258 dump source = 0x0
3828 00:39:16.854195 dump params frequency:1600
3829 00:39:16.857298 dump params rank number:2
3830 00:39:16.857728
3831 00:39:16.860681 dump params write leveling
3832 00:39:16.861218 write leveling[0][0][0] = 0x21
3833 00:39:16.864175 write leveling[0][0][1] = 0x19
3834 00:39:16.867780 write leveling[0][1][0] = 0x23
3835 00:39:16.870897 write leveling[0][1][1] = 0x1b
3836 00:39:16.874571 write leveling[1][0][0] = 0x22
3837 00:39:16.878317 write leveling[1][0][1] = 0x1f
3838 00:39:16.878755 write leveling[1][1][0] = 0x23
3839 00:39:16.880852 write leveling[1][1][1] = 0x1f
3840 00:39:16.884417 dump params cbt_cs
3841 00:39:16.884841 cbt_cs[0][0] = 0xa
3842 00:39:16.887674 cbt_cs[0][1] = 0xa
3843 00:39:16.888112 cbt_cs[1][0] = 0xa
3844 00:39:16.891194 cbt_cs[1][1] = 0xa
3845 00:39:16.891619 dump params cbt_mr12
3846 00:39:16.894062 cbt_mr12[0][0] = 0x16
3847 00:39:16.897805 cbt_mr12[0][1] = 0x16
3848 00:39:16.898245 cbt_mr12[1][0] = 0x18
3849 00:39:16.900954 cbt_mr12[1][1] = 0x18
3850 00:39:16.901424 dump params tx window
3851 00:39:16.903904 tx_center_min[0][0][0] = 980
3852 00:39:16.907291 tx_center_max[0][0][0] = 987
3853 00:39:16.910430 tx_center_min[0][0][1] = 972
3854 00:39:16.913847 tx_center_max[0][0][1] = 978
3855 00:39:16.914189 tx_center_min[0][1][0] = 982
3856 00:39:16.916798 tx_center_max[0][1][0] = 990
3857 00:39:16.920379 tx_center_min[0][1][1] = 975
3858 00:39:16.923708 tx_center_max[0][1][1] = 980
3859 00:39:16.923863 tx_center_min[1][0][0] = 981
3860 00:39:16.927096 tx_center_max[1][0][0] = 988
3861 00:39:16.930494 tx_center_min[1][0][1] = 975
3862 00:39:16.933823 tx_center_max[1][0][1] = 980
3863 00:39:16.936924 tx_center_min[1][1][0] = 982
3864 00:39:16.937019 tx_center_max[1][1][0] = 989
3865 00:39:16.940817 tx_center_min[1][1][1] = 975
3866 00:39:16.944282 tx_center_max[1][1][1] = 980
3867 00:39:16.947445 dump params tx window
3868 00:39:16.947705 tx_win_center[0][0][0] = 987
3869 00:39:16.950970 tx_first_pass[0][0][0] = 975
3870 00:39:16.953957 tx_last_pass[0][0][0] = 999
3871 00:39:16.957486 tx_win_center[0][0][1] = 985
3872 00:39:16.960393 tx_first_pass[0][0][1] = 974
3873 00:39:16.960743 tx_last_pass[0][0][1] = 997
3874 00:39:16.963881 tx_win_center[0][0][2] = 986
3875 00:39:16.967067 tx_first_pass[0][0][2] = 974
3876 00:39:16.970880 tx_last_pass[0][0][2] = 998
3877 00:39:16.971199 tx_win_center[0][0][3] = 980
3878 00:39:16.974029 tx_first_pass[0][0][3] = 968
3879 00:39:16.977445 tx_last_pass[0][0][3] = 992
3880 00:39:16.980886 tx_win_center[0][0][4] = 985
3881 00:39:16.981188 tx_first_pass[0][0][4] = 974
3882 00:39:16.984095 tx_last_pass[0][0][4] = 997
3883 00:39:16.987227 tx_win_center[0][0][5] = 980
3884 00:39:16.990973 tx_first_pass[0][0][5] = 968
3885 00:39:16.994339 tx_last_pass[0][0][5] = 992
3886 00:39:16.994828 tx_win_center[0][0][6] = 981
3887 00:39:16.997451 tx_first_pass[0][0][6] = 969
3888 00:39:17.000911 tx_last_pass[0][0][6] = 993
3889 00:39:17.004017 tx_win_center[0][0][7] = 983
3890 00:39:17.004441 tx_first_pass[0][0][7] = 971
3891 00:39:17.007313 tx_last_pass[0][0][7] = 995
3892 00:39:17.010619 tx_win_center[0][0][8] = 973
3893 00:39:17.014084 tx_first_pass[0][0][8] = 961
3894 00:39:17.017136 tx_last_pass[0][0][8] = 985
3895 00:39:17.017587 tx_win_center[0][0][9] = 974
3896 00:39:17.020462 tx_first_pass[0][0][9] = 962
3897 00:39:17.024300 tx_last_pass[0][0][9] = 987
3898 00:39:17.027117 tx_win_center[0][0][10] = 978
3899 00:39:17.030582 tx_first_pass[0][0][10] = 967
3900 00:39:17.031010 tx_last_pass[0][0][10] = 990
3901 00:39:17.033960 tx_win_center[0][0][11] = 972
3902 00:39:17.037157 tx_first_pass[0][0][11] = 961
3903 00:39:17.040883 tx_last_pass[0][0][11] = 984
3904 00:39:17.044325 tx_win_center[0][0][12] = 973
3905 00:39:17.044757 tx_first_pass[0][0][12] = 961
3906 00:39:17.047592 tx_last_pass[0][0][12] = 985
3907 00:39:17.050863 tx_win_center[0][0][13] = 972
3908 00:39:17.053970 tx_first_pass[0][0][13] = 961
3909 00:39:17.057390 tx_last_pass[0][0][13] = 984
3910 00:39:17.057841 tx_win_center[0][0][14] = 973
3911 00:39:17.060635 tx_first_pass[0][0][14] = 962
3912 00:39:17.063946 tx_last_pass[0][0][14] = 985
3913 00:39:17.067880 tx_win_center[0][0][15] = 976
3914 00:39:17.070692 tx_first_pass[0][0][15] = 964
3915 00:39:17.071198 tx_last_pass[0][0][15] = 989
3916 00:39:17.074003 tx_win_center[0][1][0] = 990
3917 00:39:17.077512 tx_first_pass[0][1][0] = 977
3918 00:39:17.080752 tx_last_pass[0][1][0] = 1003
3919 00:39:17.081336 tx_win_center[0][1][1] = 989
3920 00:39:17.084120 tx_first_pass[0][1][1] = 977
3921 00:39:17.087765 tx_last_pass[0][1][1] = 1001
3922 00:39:17.090983 tx_win_center[0][1][2] = 989
3923 00:39:17.094018 tx_first_pass[0][1][2] = 977
3924 00:39:17.094445 tx_last_pass[0][1][2] = 1001
3925 00:39:17.097719 tx_win_center[0][1][3] = 982
3926 00:39:17.100746 tx_first_pass[0][1][3] = 970
3927 00:39:17.104136 tx_last_pass[0][1][3] = 995
3928 00:39:17.104570 tx_win_center[0][1][4] = 988
3929 00:39:17.107686 tx_first_pass[0][1][4] = 976
3930 00:39:17.110858 tx_last_pass[0][1][4] = 1001
3931 00:39:17.114194 tx_win_center[0][1][5] = 984
3932 00:39:17.117714 tx_first_pass[0][1][5] = 972
3933 00:39:17.118215 tx_last_pass[0][1][5] = 997
3934 00:39:17.120579 tx_win_center[0][1][6] = 985
3935 00:39:17.124164 tx_first_pass[0][1][6] = 972
3936 00:39:17.127133 tx_last_pass[0][1][6] = 998
3937 00:39:17.130765 tx_win_center[0][1][7] = 987
3938 00:39:17.131188 tx_first_pass[0][1][7] = 975
3939 00:39:17.133985 tx_last_pass[0][1][7] = 999
3940 00:39:17.137239 tx_win_center[0][1][8] = 977
3941 00:39:17.140651 tx_first_pass[0][1][8] = 966
3942 00:39:17.141099 tx_last_pass[0][1][8] = 988
3943 00:39:17.143863 tx_win_center[0][1][9] = 978
3944 00:39:17.147237 tx_first_pass[0][1][9] = 967
3945 00:39:17.150451 tx_last_pass[0][1][9] = 989
3946 00:39:17.153785 tx_win_center[0][1][10] = 980
3947 00:39:17.154220 tx_first_pass[0][1][10] = 969
3948 00:39:17.157203 tx_last_pass[0][1][10] = 991
3949 00:39:17.160788 tx_win_center[0][1][11] = 977
3950 00:39:17.163909 tx_first_pass[0][1][11] = 966
3951 00:39:17.167268 tx_last_pass[0][1][11] = 988
3952 00:39:17.167694 tx_win_center[0][1][12] = 977
3953 00:39:17.170420 tx_first_pass[0][1][12] = 966
3954 00:39:17.173708 tx_last_pass[0][1][12] = 989
3955 00:39:17.177254 tx_win_center[0][1][13] = 975
3956 00:39:17.180738 tx_first_pass[0][1][13] = 964
3957 00:39:17.181165 tx_last_pass[0][1][13] = 986
3958 00:39:17.183713 tx_win_center[0][1][14] = 977
3959 00:39:17.187470 tx_first_pass[0][1][14] = 967
3960 00:39:17.190677 tx_last_pass[0][1][14] = 988
3961 00:39:17.194188 tx_win_center[0][1][15] = 979
3962 00:39:17.194611 tx_first_pass[0][1][15] = 968
3963 00:39:17.197238 tx_last_pass[0][1][15] = 990
3964 00:39:17.200495 tx_win_center[1][0][0] = 988
3965 00:39:17.204522 tx_first_pass[1][0][0] = 976
3966 00:39:17.207436 tx_last_pass[1][0][0] = 1000
3967 00:39:17.207865 tx_win_center[1][0][1] = 987
3968 00:39:17.210738 tx_first_pass[1][0][1] = 975
3969 00:39:17.213633 tx_last_pass[1][0][1] = 999
3970 00:39:17.217225 tx_win_center[1][0][2] = 983
3971 00:39:17.217679 tx_first_pass[1][0][2] = 971
3972 00:39:17.220594 tx_last_pass[1][0][2] = 995
3973 00:39:17.224106 tx_win_center[1][0][3] = 981
3974 00:39:17.227540 tx_first_pass[1][0][3] = 969
3975 00:39:17.227964 tx_last_pass[1][0][3] = 993
3976 00:39:17.230443 tx_win_center[1][0][4] = 985
3977 00:39:17.233801 tx_first_pass[1][0][4] = 973
3978 00:39:17.237391 tx_last_pass[1][0][4] = 997
3979 00:39:17.240857 tx_win_center[1][0][5] = 987
3980 00:39:17.241322 tx_first_pass[1][0][5] = 975
3981 00:39:17.243998 tx_last_pass[1][0][5] = 999
3982 00:39:17.247463 tx_win_center[1][0][6] = 988
3983 00:39:17.250436 tx_first_pass[1][0][6] = 976
3984 00:39:17.254081 tx_last_pass[1][0][6] = 1000
3985 00:39:17.254572 tx_win_center[1][0][7] = 984
3986 00:39:17.257056 tx_first_pass[1][0][7] = 973
3987 00:39:17.260572 tx_last_pass[1][0][7] = 996
3988 00:39:17.263864 tx_win_center[1][0][8] = 978
3989 00:39:17.264289 tx_first_pass[1][0][8] = 966
3990 00:39:17.267039 tx_last_pass[1][0][8] = 991
3991 00:39:17.270443 tx_win_center[1][0][9] = 978
3992 00:39:17.273448 tx_first_pass[1][0][9] = 966
3993 00:39:17.276770 tx_last_pass[1][0][9] = 990
3994 00:39:17.277193 tx_win_center[1][0][10] = 979
3995 00:39:17.280278 tx_first_pass[1][0][10] = 967
3996 00:39:17.284073 tx_last_pass[1][0][10] = 991
3997 00:39:17.287367 tx_win_center[1][0][11] = 980
3998 00:39:17.290681 tx_first_pass[1][0][11] = 968
3999 00:39:17.291107 tx_last_pass[1][0][11] = 992
4000 00:39:17.293930 tx_win_center[1][0][12] = 980
4001 00:39:17.297014 tx_first_pass[1][0][12] = 968
4002 00:39:17.300509 tx_last_pass[1][0][12] = 992
4003 00:39:17.301014 tx_win_center[1][0][13] = 980
4004 00:39:17.304229 tx_first_pass[1][0][13] = 969
4005 00:39:17.307381 tx_last_pass[1][0][13] = 991
4006 00:39:17.310461 tx_win_center[1][0][14] = 979
4007 00:39:17.314372 tx_first_pass[1][0][14] = 968
4008 00:39:17.314804 tx_last_pass[1][0][14] = 991
4009 00:39:17.317284 tx_win_center[1][0][15] = 975
4010 00:39:17.320361 tx_first_pass[1][0][15] = 963
4011 00:39:17.323487 tx_last_pass[1][0][15] = 988
4012 00:39:17.326957 tx_win_center[1][1][0] = 989
4013 00:39:17.330457 tx_first_pass[1][1][0] = 977
4014 00:39:17.330881 tx_last_pass[1][1][0] = 1002
4015 00:39:17.333498 tx_win_center[1][1][1] = 988
4016 00:39:17.337422 tx_first_pass[1][1][1] = 977
4017 00:39:17.340322 tx_last_pass[1][1][1] = 1000
4018 00:39:17.340751 tx_win_center[1][1][2] = 984
4019 00:39:17.343958 tx_first_pass[1][1][2] = 972
4020 00:39:17.347141 tx_last_pass[1][1][2] = 997
4021 00:39:17.350559 tx_win_center[1][1][3] = 982
4022 00:39:17.353718 tx_first_pass[1][1][3] = 970
4023 00:39:17.354220 tx_last_pass[1][1][3] = 995
4024 00:39:17.357015 tx_win_center[1][1][4] = 986
4025 00:39:17.360511 tx_first_pass[1][1][4] = 974
4026 00:39:17.364073 tx_last_pass[1][1][4] = 998
4027 00:39:17.364499 tx_win_center[1][1][5] = 988
4028 00:39:17.367101 tx_first_pass[1][1][5] = 976
4029 00:39:17.370644 tx_last_pass[1][1][5] = 1000
4030 00:39:17.373753 tx_win_center[1][1][6] = 989
4031 00:39:17.377001 tx_first_pass[1][1][6] = 977
4032 00:39:17.377448 tx_last_pass[1][1][6] = 1001
4033 00:39:17.380238 tx_win_center[1][1][7] = 986
4034 00:39:17.383581 tx_first_pass[1][1][7] = 975
4035 00:39:17.387380 tx_last_pass[1][1][7] = 998
4036 00:39:17.387876 tx_win_center[1][1][8] = 978
4037 00:39:17.391161 tx_first_pass[1][1][8] = 967
4038 00:39:17.393772 tx_last_pass[1][1][8] = 990
4039 00:39:17.397016 tx_win_center[1][1][9] = 977
4040 00:39:17.400789 tx_first_pass[1][1][9] = 966
4041 00:39:17.401350 tx_last_pass[1][1][9] = 989
4042 00:39:17.403923 tx_win_center[1][1][10] = 978
4043 00:39:17.407168 tx_first_pass[1][1][10] = 967
4044 00:39:17.410917 tx_last_pass[1][1][10] = 989
4045 00:39:17.411350 tx_win_center[1][1][11] = 979
4046 00:39:17.414350 tx_first_pass[1][1][11] = 968
4047 00:39:17.417540 tx_last_pass[1][1][11] = 991
4048 00:39:17.420545 tx_win_center[1][1][12] = 980
4049 00:39:17.423852 tx_first_pass[1][1][12] = 968
4050 00:39:17.424293 tx_last_pass[1][1][12] = 992
4051 00:39:17.427188 tx_win_center[1][1][13] = 979
4052 00:39:17.430452 tx_first_pass[1][1][13] = 968
4053 00:39:17.433884 tx_last_pass[1][1][13] = 990
4054 00:39:17.437152 tx_win_center[1][1][14] = 979
4055 00:39:17.440603 tx_first_pass[1][1][14] = 967
4056 00:39:17.441029 tx_last_pass[1][1][14] = 991
4057 00:39:17.443553 tx_win_center[1][1][15] = 975
4058 00:39:17.447082 tx_first_pass[1][1][15] = 963
4059 00:39:17.450254 tx_last_pass[1][1][15] = 987
4060 00:39:17.450690 dump params rx window
4061 00:39:17.453930 rx_firspass[0][0][0] = 8
4062 00:39:17.457066 rx_lastpass[0][0][0] = 42
4063 00:39:17.457536 rx_firspass[0][0][1] = 8
4064 00:39:17.460764 rx_lastpass[0][0][1] = 40
4065 00:39:17.463813 rx_firspass[0][0][2] = 8
4066 00:39:17.464252 rx_lastpass[0][0][2] = 40
4067 00:39:17.467052 rx_firspass[0][0][3] = -2
4068 00:39:17.470221 rx_lastpass[0][0][3] = 32
4069 00:39:17.473961 rx_firspass[0][0][4] = 7
4070 00:39:17.474383 rx_lastpass[0][0][4] = 40
4071 00:39:17.476735 rx_firspass[0][0][5] = 2
4072 00:39:17.480329 rx_lastpass[0][0][5] = 30
4073 00:39:17.480531 rx_firspass[0][0][6] = 1
4074 00:39:17.483691 rx_lastpass[0][0][6] = 34
4075 00:39:17.486784 rx_firspass[0][0][7] = 3
4076 00:39:17.489858 rx_lastpass[0][0][7] = 35
4077 00:39:17.490038 rx_firspass[0][0][8] = 1
4078 00:39:17.493459 rx_lastpass[0][0][8] = 35
4079 00:39:17.496601 rx_firspass[0][0][9] = 4
4080 00:39:17.496775 rx_lastpass[0][0][9] = 36
4081 00:39:17.500224 rx_firspass[0][0][10] = 8
4082 00:39:17.503467 rx_lastpass[0][0][10] = 39
4083 00:39:17.503656 rx_firspass[0][0][11] = 2
4084 00:39:17.506495 rx_lastpass[0][0][11] = 31
4085 00:39:17.510253 rx_firspass[0][0][12] = 4
4086 00:39:17.513249 rx_lastpass[0][0][12] = 36
4087 00:39:17.513343 rx_firspass[0][0][13] = 1
4088 00:39:17.516706 rx_lastpass[0][0][13] = 32
4089 00:39:17.519926 rx_firspass[0][0][14] = 2
4090 00:39:17.523660 rx_lastpass[0][0][14] = 34
4091 00:39:17.523808 rx_firspass[0][0][15] = 3
4092 00:39:17.526596 rx_lastpass[0][0][15] = 36
4093 00:39:17.530180 rx_firspass[0][1][0] = 9
4094 00:39:17.530323 rx_lastpass[0][1][0] = 42
4095 00:39:17.533872 rx_firspass[0][1][1] = 7
4096 00:39:17.536388 rx_lastpass[0][1][1] = 42
4097 00:39:17.536474 rx_firspass[0][1][2] = 8
4098 00:39:17.539857 rx_lastpass[0][1][2] = 42
4099 00:39:17.543566 rx_firspass[0][1][3] = -1
4100 00:39:17.546489 rx_lastpass[0][1][3] = 32
4101 00:39:17.546648 rx_firspass[0][1][4] = 6
4102 00:39:17.549739 rx_lastpass[0][1][4] = 40
4103 00:39:17.553160 rx_firspass[0][1][5] = 0
4104 00:39:17.553362 rx_lastpass[0][1][5] = 35
4105 00:39:17.556734 rx_firspass[0][1][6] = 3
4106 00:39:17.559852 rx_lastpass[0][1][6] = 36
4107 00:39:17.563493 rx_firspass[0][1][7] = 3
4108 00:39:17.563623 rx_lastpass[0][1][7] = 36
4109 00:39:17.567077 rx_firspass[0][1][8] = 1
4110 00:39:17.570036 rx_lastpass[0][1][8] = 36
4111 00:39:17.570274 rx_firspass[0][1][9] = 2
4112 00:39:17.573279 rx_lastpass[0][1][9] = 37
4113 00:39:17.577222 rx_firspass[0][1][10] = 6
4114 00:39:17.577499 rx_lastpass[0][1][10] = 42
4115 00:39:17.579822 rx_firspass[0][1][11] = 0
4116 00:39:17.583250 rx_lastpass[0][1][11] = 34
4117 00:39:17.586971 rx_firspass[0][1][12] = 2
4118 00:39:17.587324 rx_lastpass[0][1][12] = 37
4119 00:39:17.590402 rx_firspass[0][1][13] = 0
4120 00:39:17.593455 rx_lastpass[0][1][13] = 33
4121 00:39:17.596822 rx_firspass[0][1][14] = 2
4122 00:39:17.597364 rx_lastpass[0][1][14] = 35
4123 00:39:17.600511 rx_firspass[0][1][15] = 4
4124 00:39:17.603732 rx_lastpass[0][1][15] = 37
4125 00:39:17.604228 rx_firspass[1][0][0] = 7
4126 00:39:17.606964 rx_lastpass[1][0][0] = 42
4127 00:39:17.610249 rx_firspass[1][0][1] = 6
4128 00:39:17.610804 rx_lastpass[1][0][1] = 40
4129 00:39:17.613470 rx_firspass[1][0][2] = 0
4130 00:39:17.616885 rx_lastpass[1][0][2] = 33
4131 00:39:17.620183 rx_firspass[1][0][3] = -1
4132 00:39:17.620617 rx_lastpass[1][0][3] = 32
4133 00:39:17.623578 rx_firspass[1][0][4] = 3
4134 00:39:17.626880 rx_lastpass[1][0][4] = 34
4135 00:39:17.627429 rx_firspass[1][0][5] = 8
4136 00:39:17.630169 rx_lastpass[1][0][5] = 40
4137 00:39:17.633353 rx_firspass[1][0][6] = 9
4138 00:39:17.636768 rx_lastpass[1][0][6] = 41
4139 00:39:17.637165 rx_firspass[1][0][7] = 4
4140 00:39:17.640410 rx_lastpass[1][0][7] = 34
4141 00:39:17.643834 rx_firspass[1][0][8] = 2
4142 00:39:17.644067 rx_lastpass[1][0][8] = 36
4143 00:39:17.646458 rx_firspass[1][0][9] = 3
4144 00:39:17.649869 rx_lastpass[1][0][9] = 36
4145 00:39:17.650056 rx_firspass[1][0][10] = 2
4146 00:39:17.652950 rx_lastpass[1][0][10] = 35
4147 00:39:17.656327 rx_firspass[1][0][11] = 3
4148 00:39:17.659730 rx_lastpass[1][0][11] = 36
4149 00:39:17.659865 rx_firspass[1][0][12] = 4
4150 00:39:17.663264 rx_lastpass[1][0][12] = 36
4151 00:39:17.666312 rx_firspass[1][0][13] = 4
4152 00:39:17.669803 rx_lastpass[1][0][13] = 34
4153 00:39:17.669907 rx_firspass[1][0][14] = 3
4154 00:39:17.673205 rx_lastpass[1][0][14] = 35
4155 00:39:17.676695 rx_firspass[1][0][15] = 0
4156 00:39:17.676779 rx_lastpass[1][0][15] = 33
4157 00:39:17.679666 rx_firspass[1][1][0] = 7
4158 00:39:17.683366 rx_lastpass[1][1][0] = 42
4159 00:39:17.683450 rx_firspass[1][1][1] = 5
4160 00:39:17.686866 rx_lastpass[1][1][1] = 40
4161 00:39:17.689856 rx_firspass[1][1][2] = 0
4162 00:39:17.693890 rx_lastpass[1][1][2] = 35
4163 00:39:17.694046 rx_firspass[1][1][3] = -2
4164 00:39:17.696718 rx_lastpass[1][1][3] = 33
4165 00:39:17.700117 rx_firspass[1][1][4] = 2
4166 00:39:17.700275 rx_lastpass[1][1][4] = 36
4167 00:39:17.703693 rx_firspass[1][1][5] = 5
4168 00:39:17.706539 rx_lastpass[1][1][5] = 41
4169 00:39:17.706698 rx_firspass[1][1][6] = 7
4170 00:39:17.710115 rx_lastpass[1][1][6] = 42
4171 00:39:17.713054 rx_firspass[1][1][7] = 2
4172 00:39:17.716236 rx_lastpass[1][1][7] = 36
4173 00:39:17.716381 rx_firspass[1][1][8] = 1
4174 00:39:17.719982 rx_lastpass[1][1][8] = 37
4175 00:39:17.723281 rx_firspass[1][1][9] = 2
4176 00:39:17.723423 rx_lastpass[1][1][9] = 37
4177 00:39:17.726545 rx_firspass[1][1][10] = 2
4178 00:39:17.729675 rx_lastpass[1][1][10] = 36
4179 00:39:17.733002 rx_firspass[1][1][11] = 3
4180 00:39:17.733172 rx_lastpass[1][1][11] = 38
4181 00:39:17.736828 rx_firspass[1][1][12] = 4
4182 00:39:17.739780 rx_lastpass[1][1][12] = 39
4183 00:39:17.739969 rx_firspass[1][1][13] = 3
4184 00:39:17.743381 rx_lastpass[1][1][13] = 36
4185 00:39:17.746412 rx_firspass[1][1][14] = 3
4186 00:39:17.749647 rx_lastpass[1][1][14] = 36
4187 00:39:17.749829 rx_firspass[1][1][15] = 0
4188 00:39:17.752882 rx_lastpass[1][1][15] = 34
4189 00:39:17.756308 dump params clk_delay
4190 00:39:17.756484 clk_delay[0] = -1
4191 00:39:17.760175 clk_delay[1] = 0
4192 00:39:17.760465 dump params dqs_delay
4193 00:39:17.763474 dqs_delay[0][0] = 0
4194 00:39:17.763681 dqs_delay[0][1] = -1
4195 00:39:17.766523 dqs_delay[1][0] = -1
4196 00:39:17.766769 dqs_delay[1][1] = 0
4197 00:39:17.769904 dump params delay_cell_unit = 762
4198 00:39:17.773078 dump source = 0x0
4199 00:39:17.776445 dump params frequency:1200
4200 00:39:17.776881 dump params rank number:2
4201 00:39:17.777206
4202 00:39:17.779738 dump params write leveling
4203 00:39:17.783565 write leveling[0][0][0] = 0x0
4204 00:39:17.786520 write leveling[0][0][1] = 0x0
4205 00:39:17.789952 write leveling[0][1][0] = 0x0
4206 00:39:17.790413 write leveling[0][1][1] = 0x0
4207 00:39:17.793128 write leveling[1][0][0] = 0x0
4208 00:39:17.796448 write leveling[1][0][1] = 0x0
4209 00:39:17.800099 write leveling[1][1][0] = 0x0
4210 00:39:17.803504 write leveling[1][1][1] = 0x0
4211 00:39:17.804046 dump params cbt_cs
4212 00:39:17.806566 cbt_cs[0][0] = 0x0
4213 00:39:17.807087 cbt_cs[0][1] = 0x0
4214 00:39:17.809957 cbt_cs[1][0] = 0x0
4215 00:39:17.810481 cbt_cs[1][1] = 0x0
4216 00:39:17.813130 dump params cbt_mr12
4217 00:39:17.813591 cbt_mr12[0][0] = 0x0
4218 00:39:17.816336 cbt_mr12[0][1] = 0x0
4219 00:39:17.816765 cbt_mr12[1][0] = 0x0
4220 00:39:17.820109 cbt_mr12[1][1] = 0x0
4221 00:39:17.822904 dump params tx window
4222 00:39:17.823338 tx_center_min[0][0][0] = 0
4223 00:39:17.826375 tx_center_max[0][0][0] = 0
4224 00:39:17.829684 tx_center_min[0][0][1] = 0
4225 00:39:17.833455 tx_center_max[0][0][1] = 0
4226 00:39:17.833883 tx_center_min[0][1][0] = 0
4227 00:39:17.836550 tx_center_max[0][1][0] = 0
4228 00:39:17.839593 tx_center_min[0][1][1] = 0
4229 00:39:17.843001 tx_center_max[0][1][1] = 0
4230 00:39:17.843433 tx_center_min[1][0][0] = 0
4231 00:39:17.846718 tx_center_max[1][0][0] = 0
4232 00:39:17.849992 tx_center_min[1][0][1] = 0
4233 00:39:17.850425 tx_center_max[1][0][1] = 0
4234 00:39:17.853252 tx_center_min[1][1][0] = 0
4235 00:39:17.856503 tx_center_max[1][1][0] = 0
4236 00:39:17.859733 tx_center_min[1][1][1] = 0
4237 00:39:17.860178 tx_center_max[1][1][1] = 0
4238 00:39:17.863330 dump params tx window
4239 00:39:17.866897 tx_win_center[0][0][0] = 0
4240 00:39:17.867325 tx_first_pass[0][0][0] = 0
4241 00:39:17.869674 tx_last_pass[0][0][0] = 0
4242 00:39:17.873294 tx_win_center[0][0][1] = 0
4243 00:39:17.876723 tx_first_pass[0][0][1] = 0
4244 00:39:17.877298 tx_last_pass[0][0][1] = 0
4245 00:39:17.879912 tx_win_center[0][0][2] = 0
4246 00:39:17.883154 tx_first_pass[0][0][2] = 0
4247 00:39:17.883586 tx_last_pass[0][0][2] = 0
4248 00:39:17.886769 tx_win_center[0][0][3] = 0
4249 00:39:17.889968 tx_first_pass[0][0][3] = 0
4250 00:39:17.893068 tx_last_pass[0][0][3] = 0
4251 00:39:17.893591 tx_win_center[0][0][4] = 0
4252 00:39:17.896707 tx_first_pass[0][0][4] = 0
4253 00:39:17.900044 tx_last_pass[0][0][4] = 0
4254 00:39:17.903315 tx_win_center[0][0][5] = 0
4255 00:39:17.903839 tx_first_pass[0][0][5] = 0
4256 00:39:17.906793 tx_last_pass[0][0][5] = 0
4257 00:39:17.909739 tx_win_center[0][0][6] = 0
4258 00:39:17.910162 tx_first_pass[0][0][6] = 0
4259 00:39:17.913056 tx_last_pass[0][0][6] = 0
4260 00:39:17.916509 tx_win_center[0][0][7] = 0
4261 00:39:17.919959 tx_first_pass[0][0][7] = 0
4262 00:39:17.920405 tx_last_pass[0][0][7] = 0
4263 00:39:17.923199 tx_win_center[0][0][8] = 0
4264 00:39:17.926629 tx_first_pass[0][0][8] = 0
4265 00:39:17.929885 tx_last_pass[0][0][8] = 0
4266 00:39:17.930436 tx_win_center[0][0][9] = 0
4267 00:39:17.933375 tx_first_pass[0][0][9] = 0
4268 00:39:17.936632 tx_last_pass[0][0][9] = 0
4269 00:39:17.937078 tx_win_center[0][0][10] = 0
4270 00:39:17.939883 tx_first_pass[0][0][10] = 0
4271 00:39:17.942821 tx_last_pass[0][0][10] = 0
4272 00:39:17.946578 tx_win_center[0][0][11] = 0
4273 00:39:17.947022 tx_first_pass[0][0][11] = 0
4274 00:39:17.949453 tx_last_pass[0][0][11] = 0
4275 00:39:17.953096 tx_win_center[0][0][12] = 0
4276 00:39:17.956625 tx_first_pass[0][0][12] = 0
4277 00:39:17.957070 tx_last_pass[0][0][12] = 0
4278 00:39:17.960304 tx_win_center[0][0][13] = 0
4279 00:39:17.963369 tx_first_pass[0][0][13] = 0
4280 00:39:17.966175 tx_last_pass[0][0][13] = 0
4281 00:39:17.966615 tx_win_center[0][0][14] = 0
4282 00:39:17.969759 tx_first_pass[0][0][14] = 0
4283 00:39:17.973237 tx_last_pass[0][0][14] = 0
4284 00:39:17.976627 tx_win_center[0][0][15] = 0
4285 00:39:17.977104 tx_first_pass[0][0][15] = 0
4286 00:39:17.979843 tx_last_pass[0][0][15] = 0
4287 00:39:17.983033 tx_win_center[0][1][0] = 0
4288 00:39:17.986469 tx_first_pass[0][1][0] = 0
4289 00:39:17.986895 tx_last_pass[0][1][0] = 0
4290 00:39:17.989735 tx_win_center[0][1][1] = 0
4291 00:39:17.992839 tx_first_pass[0][1][1] = 0
4292 00:39:17.996374 tx_last_pass[0][1][1] = 0
4293 00:39:17.996847 tx_win_center[0][1][2] = 0
4294 00:39:17.999816 tx_first_pass[0][1][2] = 0
4295 00:39:18.003151 tx_last_pass[0][1][2] = 0
4296 00:39:18.003585 tx_win_center[0][1][3] = 0
4297 00:39:18.006487 tx_first_pass[0][1][3] = 0
4298 00:39:18.009826 tx_last_pass[0][1][3] = 0
4299 00:39:18.013358 tx_win_center[0][1][4] = 0
4300 00:39:18.013797 tx_first_pass[0][1][4] = 0
4301 00:39:18.016269 tx_last_pass[0][1][4] = 0
4302 00:39:18.020066 tx_win_center[0][1][5] = 0
4303 00:39:18.022858 tx_first_pass[0][1][5] = 0
4304 00:39:18.023160 tx_last_pass[0][1][5] = 0
4305 00:39:18.025872 tx_win_center[0][1][6] = 0
4306 00:39:18.029309 tx_first_pass[0][1][6] = 0
4307 00:39:18.029540 tx_last_pass[0][1][6] = 0
4308 00:39:18.032446 tx_win_center[0][1][7] = 0
4309 00:39:18.036552 tx_first_pass[0][1][7] = 0
4310 00:39:18.039871 tx_last_pass[0][1][7] = 0
4311 00:39:18.040290 tx_win_center[0][1][8] = 0
4312 00:39:18.042742 tx_first_pass[0][1][8] = 0
4313 00:39:18.046474 tx_last_pass[0][1][8] = 0
4314 00:39:18.049706 tx_win_center[0][1][9] = 0
4315 00:39:18.050129 tx_first_pass[0][1][9] = 0
4316 00:39:18.053111 tx_last_pass[0][1][9] = 0
4317 00:39:18.056019 tx_win_center[0][1][10] = 0
4318 00:39:18.056438 tx_first_pass[0][1][10] = 0
4319 00:39:18.059420 tx_last_pass[0][1][10] = 0
4320 00:39:18.062853 tx_win_center[0][1][11] = 0
4321 00:39:18.066048 tx_first_pass[0][1][11] = 0
4322 00:39:18.066471 tx_last_pass[0][1][11] = 0
4323 00:39:18.069578 tx_win_center[0][1][12] = 0
4324 00:39:18.073168 tx_first_pass[0][1][12] = 0
4325 00:39:18.075999 tx_last_pass[0][1][12] = 0
4326 00:39:18.076458 tx_win_center[0][1][13] = 0
4327 00:39:18.079455 tx_first_pass[0][1][13] = 0
4328 00:39:18.082991 tx_last_pass[0][1][13] = 0
4329 00:39:18.086260 tx_win_center[0][1][14] = 0
4330 00:39:18.089828 tx_first_pass[0][1][14] = 0
4331 00:39:18.090249 tx_last_pass[0][1][14] = 0
4332 00:39:18.092723 tx_win_center[0][1][15] = 0
4333 00:39:18.096084 tx_first_pass[0][1][15] = 0
4334 00:39:18.096505 tx_last_pass[0][1][15] = 0
4335 00:39:18.099462 tx_win_center[1][0][0] = 0
4336 00:39:18.103055 tx_first_pass[1][0][0] = 0
4337 00:39:18.106074 tx_last_pass[1][0][0] = 0
4338 00:39:18.106646 tx_win_center[1][0][1] = 0
4339 00:39:18.109278 tx_first_pass[1][0][1] = 0
4340 00:39:18.113061 tx_last_pass[1][0][1] = 0
4341 00:39:18.115890 tx_win_center[1][0][2] = 0
4342 00:39:18.116313 tx_first_pass[1][0][2] = 0
4343 00:39:18.119409 tx_last_pass[1][0][2] = 0
4344 00:39:18.122686 tx_win_center[1][0][3] = 0
4345 00:39:18.123274 tx_first_pass[1][0][3] = 0
4346 00:39:18.126462 tx_last_pass[1][0][3] = 0
4347 00:39:18.129427 tx_win_center[1][0][4] = 0
4348 00:39:18.132686 tx_first_pass[1][0][4] = 0
4349 00:39:18.133255 tx_last_pass[1][0][4] = 0
4350 00:39:18.136220 tx_win_center[1][0][5] = 0
4351 00:39:18.139491 tx_first_pass[1][0][5] = 0
4352 00:39:18.142949 tx_last_pass[1][0][5] = 0
4353 00:39:18.143378 tx_win_center[1][0][6] = 0
4354 00:39:18.146050 tx_first_pass[1][0][6] = 0
4355 00:39:18.149420 tx_last_pass[1][0][6] = 0
4356 00:39:18.150023 tx_win_center[1][0][7] = 0
4357 00:39:18.152750 tx_first_pass[1][0][7] = 0
4358 00:39:18.156155 tx_last_pass[1][0][7] = 0
4359 00:39:18.159508 tx_win_center[1][0][8] = 0
4360 00:39:18.159949 tx_first_pass[1][0][8] = 0
4361 00:39:18.162948 tx_last_pass[1][0][8] = 0
4362 00:39:18.166287 tx_win_center[1][0][9] = 0
4363 00:39:18.166710 tx_first_pass[1][0][9] = 0
4364 00:39:18.169337 tx_last_pass[1][0][9] = 0
4365 00:39:18.172951 tx_win_center[1][0][10] = 0
4366 00:39:18.176523 tx_first_pass[1][0][10] = 0
4367 00:39:18.177065 tx_last_pass[1][0][10] = 0
4368 00:39:18.179538 tx_win_center[1][0][11] = 0
4369 00:39:18.182869 tx_first_pass[1][0][11] = 0
4370 00:39:18.186502 tx_last_pass[1][0][11] = 0
4371 00:39:18.186922 tx_win_center[1][0][12] = 0
4372 00:39:18.189607 tx_first_pass[1][0][12] = 0
4373 00:39:18.192986 tx_last_pass[1][0][12] = 0
4374 00:39:18.196482 tx_win_center[1][0][13] = 0
4375 00:39:18.197033 tx_first_pass[1][0][13] = 0
4376 00:39:18.199618 tx_last_pass[1][0][13] = 0
4377 00:39:18.202977 tx_win_center[1][0][14] = 0
4378 00:39:18.206161 tx_first_pass[1][0][14] = 0
4379 00:39:18.206598 tx_last_pass[1][0][14] = 0
4380 00:39:18.209745 tx_win_center[1][0][15] = 0
4381 00:39:18.212996 tx_first_pass[1][0][15] = 0
4382 00:39:18.215769 tx_last_pass[1][0][15] = 0
4383 00:39:18.216312 tx_win_center[1][1][0] = 0
4384 00:39:18.219485 tx_first_pass[1][1][0] = 0
4385 00:39:18.222736 tx_last_pass[1][1][0] = 0
4386 00:39:18.226187 tx_win_center[1][1][1] = 0
4387 00:39:18.226447 tx_first_pass[1][1][1] = 0
4388 00:39:18.229172 tx_last_pass[1][1][1] = 0
4389 00:39:18.232812 tx_win_center[1][1][2] = 0
4390 00:39:18.235958 tx_first_pass[1][1][2] = 0
4391 00:39:18.236144 tx_last_pass[1][1][2] = 0
4392 00:39:18.239271 tx_win_center[1][1][3] = 0
4393 00:39:18.242196 tx_first_pass[1][1][3] = 0
4394 00:39:18.242355 tx_last_pass[1][1][3] = 0
4395 00:39:18.245655 tx_win_center[1][1][4] = 0
4396 00:39:18.249117 tx_first_pass[1][1][4] = 0
4397 00:39:18.252348 tx_last_pass[1][1][4] = 0
4398 00:39:18.252483 tx_win_center[1][1][5] = 0
4399 00:39:18.255620 tx_first_pass[1][1][5] = 0
4400 00:39:18.258776 tx_last_pass[1][1][5] = 0
4401 00:39:18.262132 tx_win_center[1][1][6] = 0
4402 00:39:18.262221 tx_first_pass[1][1][6] = 0
4403 00:39:18.265367 tx_last_pass[1][1][6] = 0
4404 00:39:18.268598 tx_win_center[1][1][7] = 0
4405 00:39:18.268684 tx_first_pass[1][1][7] = 0
4406 00:39:18.272252 tx_last_pass[1][1][7] = 0
4407 00:39:18.275401 tx_win_center[1][1][8] = 0
4408 00:39:18.278894 tx_first_pass[1][1][8] = 0
4409 00:39:18.278980 tx_last_pass[1][1][8] = 0
4410 00:39:18.282313 tx_win_center[1][1][9] = 0
4411 00:39:18.285249 tx_first_pass[1][1][9] = 0
4412 00:39:18.285345 tx_last_pass[1][1][9] = 0
4413 00:39:18.288896 tx_win_center[1][1][10] = 0
4414 00:39:18.292126 tx_first_pass[1][1][10] = 0
4415 00:39:18.295235 tx_last_pass[1][1][10] = 0
4416 00:39:18.295338 tx_win_center[1][1][11] = 0
4417 00:39:18.298729 tx_first_pass[1][1][11] = 0
4418 00:39:18.302142 tx_last_pass[1][1][11] = 0
4419 00:39:18.305222 tx_win_center[1][1][12] = 0
4420 00:39:18.308475 tx_first_pass[1][1][12] = 0
4421 00:39:18.308559 tx_last_pass[1][1][12] = 0
4422 00:39:18.311897 tx_win_center[1][1][13] = 0
4423 00:39:18.315478 tx_first_pass[1][1][13] = 0
4424 00:39:18.318400 tx_last_pass[1][1][13] = 0
4425 00:39:18.318484 tx_win_center[1][1][14] = 0
4426 00:39:18.321861 tx_first_pass[1][1][14] = 0
4427 00:39:18.325271 tx_last_pass[1][1][14] = 0
4428 00:39:18.328428 tx_win_center[1][1][15] = 0
4429 00:39:18.328511 tx_first_pass[1][1][15] = 0
4430 00:39:18.331818 tx_last_pass[1][1][15] = 0
4431 00:39:18.335282 dump params rx window
4432 00:39:18.335365 rx_firspass[0][0][0] = 0
4433 00:39:18.338655 rx_lastpass[0][0][0] = 0
4434 00:39:18.341590 rx_firspass[0][0][1] = 0
4435 00:39:18.341673 rx_lastpass[0][0][1] = 0
4436 00:39:18.345492 rx_firspass[0][0][2] = 0
4437 00:39:18.348898 rx_lastpass[0][0][2] = 0
4438 00:39:18.348981 rx_firspass[0][0][3] = 0
4439 00:39:18.351916 rx_lastpass[0][0][3] = 0
4440 00:39:18.355255 rx_firspass[0][0][4] = 0
4441 00:39:18.358689 rx_lastpass[0][0][4] = 0
4442 00:39:18.358800 rx_firspass[0][0][5] = 0
4443 00:39:18.361643 rx_lastpass[0][0][5] = 0
4444 00:39:18.365188 rx_firspass[0][0][6] = 0
4445 00:39:18.365313 rx_lastpass[0][0][6] = 0
4446 00:39:18.368589 rx_firspass[0][0][7] = 0
4447 00:39:18.371538 rx_lastpass[0][0][7] = 0
4448 00:39:18.371622 rx_firspass[0][0][8] = 0
4449 00:39:18.375153 rx_lastpass[0][0][8] = 0
4450 00:39:18.378506 rx_firspass[0][0][9] = 0
4451 00:39:18.378616 rx_lastpass[0][0][9] = 0
4452 00:39:18.381648 rx_firspass[0][0][10] = 0
4453 00:39:18.384857 rx_lastpass[0][0][10] = 0
4454 00:39:18.384940 rx_firspass[0][0][11] = 0
4455 00:39:18.388111 rx_lastpass[0][0][11] = 0
4456 00:39:18.391784 rx_firspass[0][0][12] = 0
4457 00:39:18.395298 rx_lastpass[0][0][12] = 0
4458 00:39:18.395381 rx_firspass[0][0][13] = 0
4459 00:39:18.398412 rx_lastpass[0][0][13] = 0
4460 00:39:18.402155 rx_firspass[0][0][14] = 0
4461 00:39:18.405459 rx_lastpass[0][0][14] = 0
4462 00:39:18.405542 rx_firspass[0][0][15] = 0
4463 00:39:18.408220 rx_lastpass[0][0][15] = 0
4464 00:39:18.412240 rx_firspass[0][1][0] = 0
4465 00:39:18.412323 rx_lastpass[0][1][0] = 0
4466 00:39:18.415086 rx_firspass[0][1][1] = 0
4467 00:39:18.418180 rx_lastpass[0][1][1] = 0
4468 00:39:18.418263 rx_firspass[0][1][2] = 0
4469 00:39:18.421402 rx_lastpass[0][1][2] = 0
4470 00:39:18.425183 rx_firspass[0][1][3] = 0
4471 00:39:18.425330 rx_lastpass[0][1][3] = 0
4472 00:39:18.428390 rx_firspass[0][1][4] = 0
4473 00:39:18.432009 rx_lastpass[0][1][4] = 0
4474 00:39:18.432092 rx_firspass[0][1][5] = 0
4475 00:39:18.434943 rx_lastpass[0][1][5] = 0
4476 00:39:18.438390 rx_firspass[0][1][6] = 0
4477 00:39:18.441942 rx_lastpass[0][1][6] = 0
4478 00:39:18.442029 rx_firspass[0][1][7] = 0
4479 00:39:18.445220 rx_lastpass[0][1][7] = 0
4480 00:39:18.448786 rx_firspass[0][1][8] = 0
4481 00:39:18.448869 rx_lastpass[0][1][8] = 0
4482 00:39:18.451475 rx_firspass[0][1][9] = 0
4483 00:39:18.455013 rx_lastpass[0][1][9] = 0
4484 00:39:18.455093 rx_firspass[0][1][10] = 0
4485 00:39:18.458358 rx_lastpass[0][1][10] = 0
4486 00:39:18.462236 rx_firspass[0][1][11] = 0
4487 00:39:18.462319 rx_lastpass[0][1][11] = 0
4488 00:39:18.465002 rx_firspass[0][1][12] = 0
4489 00:39:18.468374 rx_lastpass[0][1][12] = 0
4490 00:39:18.472023 rx_firspass[0][1][13] = 0
4491 00:39:18.472106 rx_lastpass[0][1][13] = 0
4492 00:39:18.475461 rx_firspass[0][1][14] = 0
4493 00:39:18.478186 rx_lastpass[0][1][14] = 0
4494 00:39:18.478269 rx_firspass[0][1][15] = 0
4495 00:39:18.481782 rx_lastpass[0][1][15] = 0
4496 00:39:18.485498 rx_firspass[1][0][0] = 0
4497 00:39:18.485581 rx_lastpass[1][0][0] = 0
4498 00:39:18.488483 rx_firspass[1][0][1] = 0
4499 00:39:18.491926 rx_lastpass[1][0][1] = 0
4500 00:39:18.495230 rx_firspass[1][0][2] = 0
4501 00:39:18.495313 rx_lastpass[1][0][2] = 0
4502 00:39:18.498787 rx_firspass[1][0][3] = 0
4503 00:39:18.502132 rx_lastpass[1][0][3] = 0
4504 00:39:18.502215 rx_firspass[1][0][4] = 0
4505 00:39:18.505295 rx_lastpass[1][0][4] = 0
4506 00:39:18.508341 rx_firspass[1][0][5] = 0
4507 00:39:18.508424 rx_lastpass[1][0][5] = 0
4508 00:39:18.511907 rx_firspass[1][0][6] = 0
4509 00:39:18.514989 rx_lastpass[1][0][6] = 0
4510 00:39:18.515072 rx_firspass[1][0][7] = 0
4511 00:39:18.518566 rx_lastpass[1][0][7] = 0
4512 00:39:18.521754 rx_firspass[1][0][8] = 0
4513 00:39:18.521839 rx_lastpass[1][0][8] = 0
4514 00:39:18.525229 rx_firspass[1][0][9] = 0
4515 00:39:18.528299 rx_lastpass[1][0][9] = 0
4516 00:39:18.531741 rx_firspass[1][0][10] = 0
4517 00:39:18.531826 rx_lastpass[1][0][10] = 0
4518 00:39:18.535335 rx_firspass[1][0][11] = 0
4519 00:39:18.538499 rx_lastpass[1][0][11] = 0
4520 00:39:18.538585 rx_firspass[1][0][12] = 0
4521 00:39:18.541681 rx_lastpass[1][0][12] = 0
4522 00:39:18.545137 rx_firspass[1][0][13] = 0
4523 00:39:18.545221 rx_lastpass[1][0][13] = 0
4524 00:39:18.548795 rx_firspass[1][0][14] = 0
4525 00:39:18.552019 rx_lastpass[1][0][14] = 0
4526 00:39:18.555432 rx_firspass[1][0][15] = 0
4527 00:39:18.555515 rx_lastpass[1][0][15] = 0
4528 00:39:18.558642 rx_firspass[1][1][0] = 0
4529 00:39:18.561752 rx_lastpass[1][1][0] = 0
4530 00:39:18.561838 rx_firspass[1][1][1] = 0
4531 00:39:18.565524 rx_lastpass[1][1][1] = 0
4532 00:39:18.568600 rx_firspass[1][1][2] = 0
4533 00:39:18.568683 rx_lastpass[1][1][2] = 0
4534 00:39:18.572109 rx_firspass[1][1][3] = 0
4535 00:39:18.575462 rx_lastpass[1][1][3] = 0
4536 00:39:18.575545 rx_firspass[1][1][4] = 0
4537 00:39:18.578454 rx_lastpass[1][1][4] = 0
4538 00:39:18.582149 rx_firspass[1][1][5] = 0
4539 00:39:18.582232 rx_lastpass[1][1][5] = 0
4540 00:39:18.585279 rx_firspass[1][1][6] = 0
4541 00:39:18.588792 rx_lastpass[1][1][6] = 0
4542 00:39:18.592163 rx_firspass[1][1][7] = 0
4543 00:39:18.592247 rx_lastpass[1][1][7] = 0
4544 00:39:18.595547 rx_firspass[1][1][8] = 0
4545 00:39:18.598798 rx_lastpass[1][1][8] = 0
4546 00:39:18.598881 rx_firspass[1][1][9] = 0
4547 00:39:18.602246 rx_lastpass[1][1][9] = 0
4548 00:39:18.605306 rx_firspass[1][1][10] = 0
4549 00:39:18.605390 rx_lastpass[1][1][10] = 0
4550 00:39:18.608685 rx_firspass[1][1][11] = 0
4551 00:39:18.611794 rx_lastpass[1][1][11] = 0
4552 00:39:18.615321 rx_firspass[1][1][12] = 0
4553 00:39:18.615404 rx_lastpass[1][1][12] = 0
4554 00:39:18.618746 rx_firspass[1][1][13] = 0
4555 00:39:18.622217 rx_lastpass[1][1][13] = 0
4556 00:39:18.622300 rx_firspass[1][1][14] = 0
4557 00:39:18.625303 rx_lastpass[1][1][14] = 0
4558 00:39:18.628612 rx_firspass[1][1][15] = 0
4559 00:39:18.631940 rx_lastpass[1][1][15] = 0
4560 00:39:18.632023 dump params clk_delay
4561 00:39:18.635683 clk_delay[0] = 0
4562 00:39:18.635769 clk_delay[1] = 0
4563 00:39:18.638650 dump params dqs_delay
4564 00:39:18.638734 dqs_delay[0][0] = 0
4565 00:39:18.641937 dqs_delay[0][1] = 0
4566 00:39:18.642020 dqs_delay[1][0] = 0
4567 00:39:18.645593 dqs_delay[1][1] = 0
4568 00:39:18.648803 dump params delay_cell_unit = 762
4569 00:39:18.648886 dump source = 0x0
4570 00:39:18.651867 dump params frequency:800
4571 00:39:18.655359 dump params rank number:2
4572 00:39:18.655442
4573 00:39:18.655508 dump params write leveling
4574 00:39:18.658632 write leveling[0][0][0] = 0x0
4575 00:39:18.662309 write leveling[0][0][1] = 0x0
4576 00:39:18.665562 write leveling[0][1][0] = 0x0
4577 00:39:18.668820 write leveling[0][1][1] = 0x0
4578 00:39:18.668954 write leveling[1][0][0] = 0x0
4579 00:39:18.672307 write leveling[1][0][1] = 0x0
4580 00:39:18.675378 write leveling[1][1][0] = 0x0
4581 00:39:18.679193 write leveling[1][1][1] = 0x0
4582 00:39:18.679276 dump params cbt_cs
4583 00:39:18.681986 cbt_cs[0][0] = 0x0
4584 00:39:18.682069 cbt_cs[0][1] = 0x0
4585 00:39:18.685364 cbt_cs[1][0] = 0x0
4586 00:39:18.685447 cbt_cs[1][1] = 0x0
4587 00:39:18.688304 dump params cbt_mr12
4588 00:39:18.691724 cbt_mr12[0][0] = 0x0
4589 00:39:18.691807 cbt_mr12[0][1] = 0x0
4590 00:39:18.695219 cbt_mr12[1][0] = 0x0
4591 00:39:18.695302 cbt_mr12[1][1] = 0x0
4592 00:39:18.698961 dump params tx window
4593 00:39:18.702285 tx_center_min[0][0][0] = 0
4594 00:39:18.702370 tx_center_max[0][0][0] = 0
4595 00:39:18.705200 tx_center_min[0][0][1] = 0
4596 00:39:18.708147 tx_center_max[0][0][1] = 0
4597 00:39:18.711514 tx_center_min[0][1][0] = 0
4598 00:39:18.711598 tx_center_max[0][1][0] = 0
4599 00:39:18.715107 tx_center_min[0][1][1] = 0
4600 00:39:18.718459 tx_center_max[0][1][1] = 0
4601 00:39:18.721838 tx_center_min[1][0][0] = 0
4602 00:39:18.721923 tx_center_max[1][0][0] = 0
4603 00:39:18.725281 tx_center_min[1][0][1] = 0
4604 00:39:18.728785 tx_center_max[1][0][1] = 0
4605 00:39:18.728871 tx_center_min[1][1][0] = 0
4606 00:39:18.731522 tx_center_max[1][1][0] = 0
4607 00:39:18.734724 tx_center_min[1][1][1] = 0
4608 00:39:18.738351 tx_center_max[1][1][1] = 0
4609 00:39:18.738438 dump params tx window
4610 00:39:18.741903 tx_win_center[0][0][0] = 0
4611 00:39:18.744868 tx_first_pass[0][0][0] = 0
4612 00:39:18.747894 tx_last_pass[0][0][0] = 0
4613 00:39:18.747977 tx_win_center[0][0][1] = 0
4614 00:39:18.751583 tx_first_pass[0][0][1] = 0
4615 00:39:18.754915 tx_last_pass[0][0][1] = 0
4616 00:39:18.754998 tx_win_center[0][0][2] = 0
4617 00:39:18.758107 tx_first_pass[0][0][2] = 0
4618 00:39:18.761902 tx_last_pass[0][0][2] = 0
4619 00:39:18.764669 tx_win_center[0][0][3] = 0
4620 00:39:18.764754 tx_first_pass[0][0][3] = 0
4621 00:39:18.768592 tx_last_pass[0][0][3] = 0
4622 00:39:18.771351 tx_win_center[0][0][4] = 0
4623 00:39:18.774566 tx_first_pass[0][0][4] = 0
4624 00:39:18.774649 tx_last_pass[0][0][4] = 0
4625 00:39:18.778028 tx_win_center[0][0][5] = 0
4626 00:39:18.781457 tx_first_pass[0][0][5] = 0
4627 00:39:18.781541 tx_last_pass[0][0][5] = 0
4628 00:39:18.785189 tx_win_center[0][0][6] = 0
4629 00:39:18.788046 tx_first_pass[0][0][6] = 0
4630 00:39:18.791449 tx_last_pass[0][0][6] = 0
4631 00:39:18.791561 tx_win_center[0][0][7] = 0
4632 00:39:18.794645 tx_first_pass[0][0][7] = 0
4633 00:39:18.797996 tx_last_pass[0][0][7] = 0
4634 00:39:18.798080 tx_win_center[0][0][8] = 0
4635 00:39:18.801998 tx_first_pass[0][0][8] = 0
4636 00:39:18.804814 tx_last_pass[0][0][8] = 0
4637 00:39:18.807927 tx_win_center[0][0][9] = 0
4638 00:39:18.808011 tx_first_pass[0][0][9] = 0
4639 00:39:18.811255 tx_last_pass[0][0][9] = 0
4640 00:39:18.814717 tx_win_center[0][0][10] = 0
4641 00:39:18.818484 tx_first_pass[0][0][10] = 0
4642 00:39:18.818567 tx_last_pass[0][0][10] = 0
4643 00:39:18.821250 tx_win_center[0][0][11] = 0
4644 00:39:18.824808 tx_first_pass[0][0][11] = 0
4645 00:39:18.828353 tx_last_pass[0][0][11] = 0
4646 00:39:18.828437 tx_win_center[0][0][12] = 0
4647 00:39:18.831232 tx_first_pass[0][0][12] = 0
4648 00:39:18.834556 tx_last_pass[0][0][12] = 0
4649 00:39:18.837983 tx_win_center[0][0][13] = 0
4650 00:39:18.838066 tx_first_pass[0][0][13] = 0
4651 00:39:18.841571 tx_last_pass[0][0][13] = 0
4652 00:39:18.845048 tx_win_center[0][0][14] = 0
4653 00:39:18.847652 tx_first_pass[0][0][14] = 0
4654 00:39:18.847735 tx_last_pass[0][0][14] = 0
4655 00:39:18.851281 tx_win_center[0][0][15] = 0
4656 00:39:18.854677 tx_first_pass[0][0][15] = 0
4657 00:39:18.857793 tx_last_pass[0][0][15] = 0
4658 00:39:18.857876 tx_win_center[0][1][0] = 0
4659 00:39:18.860980 tx_first_pass[0][1][0] = 0
4660 00:39:18.864255 tx_last_pass[0][1][0] = 0
4661 00:39:18.867628 tx_win_center[0][1][1] = 0
4662 00:39:18.867763 tx_first_pass[0][1][1] = 0
4663 00:39:18.870930 tx_last_pass[0][1][1] = 0
4664 00:39:18.874357 tx_win_center[0][1][2] = 0
4665 00:39:18.874441 tx_first_pass[0][1][2] = 0
4666 00:39:18.877644 tx_last_pass[0][1][2] = 0
4667 00:39:18.880916 tx_win_center[0][1][3] = 0
4668 00:39:18.884398 tx_first_pass[0][1][3] = 0
4669 00:39:18.884481 tx_last_pass[0][1][3] = 0
4670 00:39:18.887799 tx_win_center[0][1][4] = 0
4671 00:39:18.891058 tx_first_pass[0][1][4] = 0
4672 00:39:18.894572 tx_last_pass[0][1][4] = 0
4673 00:39:18.894655 tx_win_center[0][1][5] = 0
4674 00:39:18.897975 tx_first_pass[0][1][5] = 0
4675 00:39:18.901417 tx_last_pass[0][1][5] = 0
4676 00:39:18.901501 tx_win_center[0][1][6] = 0
4677 00:39:18.904668 tx_first_pass[0][1][6] = 0
4678 00:39:18.907624 tx_last_pass[0][1][6] = 0
4679 00:39:18.911096 tx_win_center[0][1][7] = 0
4680 00:39:18.911179 tx_first_pass[0][1][7] = 0
4681 00:39:18.914616 tx_last_pass[0][1][7] = 0
4682 00:39:18.917844 tx_win_center[0][1][8] = 0
4683 00:39:18.917927 tx_first_pass[0][1][8] = 0
4684 00:39:18.921092 tx_last_pass[0][1][8] = 0
4685 00:39:18.924569 tx_win_center[0][1][9] = 0
4686 00:39:18.928026 tx_first_pass[0][1][9] = 0
4687 00:39:18.928110 tx_last_pass[0][1][9] = 0
4688 00:39:18.931073 tx_win_center[0][1][10] = 0
4689 00:39:18.934325 tx_first_pass[0][1][10] = 0
4690 00:39:18.937880 tx_last_pass[0][1][10] = 0
4691 00:39:18.937978 tx_win_center[0][1][11] = 0
4692 00:39:18.941163 tx_first_pass[0][1][11] = 0
4693 00:39:18.944699 tx_last_pass[0][1][11] = 0
4694 00:39:18.947499 tx_win_center[0][1][12] = 0
4695 00:39:18.947582 tx_first_pass[0][1][12] = 0
4696 00:39:18.951436 tx_last_pass[0][1][12] = 0
4697 00:39:18.954272 tx_win_center[0][1][13] = 0
4698 00:39:18.957895 tx_first_pass[0][1][13] = 0
4699 00:39:18.957978 tx_last_pass[0][1][13] = 0
4700 00:39:18.960801 tx_win_center[0][1][14] = 0
4701 00:39:18.964238 tx_first_pass[0][1][14] = 0
4702 00:39:18.967453 tx_last_pass[0][1][14] = 0
4703 00:39:18.967537 tx_win_center[0][1][15] = 0
4704 00:39:18.970842 tx_first_pass[0][1][15] = 0
4705 00:39:18.974784 tx_last_pass[0][1][15] = 0
4706 00:39:18.977832 tx_win_center[1][0][0] = 0
4707 00:39:18.977915 tx_first_pass[1][0][0] = 0
4708 00:39:18.981367 tx_last_pass[1][0][0] = 0
4709 00:39:18.984187 tx_win_center[1][0][1] = 0
4710 00:39:18.987711 tx_first_pass[1][0][1] = 0
4711 00:39:18.987795 tx_last_pass[1][0][1] = 0
4712 00:39:18.991136 tx_win_center[1][0][2] = 0
4713 00:39:18.994589 tx_first_pass[1][0][2] = 0
4714 00:39:18.994673 tx_last_pass[1][0][2] = 0
4715 00:39:18.997618 tx_win_center[1][0][3] = 0
4716 00:39:19.001178 tx_first_pass[1][0][3] = 0
4717 00:39:19.004370 tx_last_pass[1][0][3] = 0
4718 00:39:19.004453 tx_win_center[1][0][4] = 0
4719 00:39:19.007720 tx_first_pass[1][0][4] = 0
4720 00:39:19.010872 tx_last_pass[1][0][4] = 0
4721 00:39:19.010955 tx_win_center[1][0][5] = 0
4722 00:39:19.014403 tx_first_pass[1][0][5] = 0
4723 00:39:19.017841 tx_last_pass[1][0][5] = 0
4724 00:39:19.020962 tx_win_center[1][0][6] = 0
4725 00:39:19.021063 tx_first_pass[1][0][6] = 0
4726 00:39:19.024848 tx_last_pass[1][0][6] = 0
4727 00:39:19.027920 tx_win_center[1][0][7] = 0
4728 00:39:19.030923 tx_first_pass[1][0][7] = 0
4729 00:39:19.031006 tx_last_pass[1][0][7] = 0
4730 00:39:19.034406 tx_win_center[1][0][8] = 0
4731 00:39:19.037636 tx_first_pass[1][0][8] = 0
4732 00:39:19.037720 tx_last_pass[1][0][8] = 0
4733 00:39:19.041351 tx_win_center[1][0][9] = 0
4734 00:39:19.044129 tx_first_pass[1][0][9] = 0
4735 00:39:19.047395 tx_last_pass[1][0][9] = 0
4736 00:39:19.047479 tx_win_center[1][0][10] = 0
4737 00:39:19.050733 tx_first_pass[1][0][10] = 0
4738 00:39:19.054321 tx_last_pass[1][0][10] = 0
4739 00:39:19.057686 tx_win_center[1][0][11] = 0
4740 00:39:19.057769 tx_first_pass[1][0][11] = 0
4741 00:39:19.060824 tx_last_pass[1][0][11] = 0
4742 00:39:19.064137 tx_win_center[1][0][12] = 0
4743 00:39:19.067630 tx_first_pass[1][0][12] = 0
4744 00:39:19.067714 tx_last_pass[1][0][12] = 0
4745 00:39:19.070840 tx_win_center[1][0][13] = 0
4746 00:39:19.074597 tx_first_pass[1][0][13] = 0
4747 00:39:19.077446 tx_last_pass[1][0][13] = 0
4748 00:39:19.077529 tx_win_center[1][0][14] = 0
4749 00:39:19.081057 tx_first_pass[1][0][14] = 0
4750 00:39:19.084544 tx_last_pass[1][0][14] = 0
4751 00:39:19.087533 tx_win_center[1][0][15] = 0
4752 00:39:19.087616 tx_first_pass[1][0][15] = 0
4753 00:39:19.091320 tx_last_pass[1][0][15] = 0
4754 00:39:19.094091 tx_win_center[1][1][0] = 0
4755 00:39:19.097990 tx_first_pass[1][1][0] = 0
4756 00:39:19.098074 tx_last_pass[1][1][0] = 0
4757 00:39:19.101217 tx_win_center[1][1][1] = 0
4758 00:39:19.104422 tx_first_pass[1][1][1] = 0
4759 00:39:19.104506 tx_last_pass[1][1][1] = 0
4760 00:39:19.107414 tx_win_center[1][1][2] = 0
4761 00:39:19.111092 tx_first_pass[1][1][2] = 0
4762 00:39:19.114210 tx_last_pass[1][1][2] = 0
4763 00:39:19.114293 tx_win_center[1][1][3] = 0
4764 00:39:19.117724 tx_first_pass[1][1][3] = 0
4765 00:39:19.120935 tx_last_pass[1][1][3] = 0
4766 00:39:19.124425 tx_win_center[1][1][4] = 0
4767 00:39:19.124508 tx_first_pass[1][1][4] = 0
4768 00:39:19.127862 tx_last_pass[1][1][4] = 0
4769 00:39:19.130724 tx_win_center[1][1][5] = 0
4770 00:39:19.130808 tx_first_pass[1][1][5] = 0
4771 00:39:19.134572 tx_last_pass[1][1][5] = 0
4772 00:39:19.137834 tx_win_center[1][1][6] = 0
4773 00:39:19.140894 tx_first_pass[1][1][6] = 0
4774 00:39:19.140977 tx_last_pass[1][1][6] = 0
4775 00:39:19.144085 tx_win_center[1][1][7] = 0
4776 00:39:19.147638 tx_first_pass[1][1][7] = 0
4777 00:39:19.150892 tx_last_pass[1][1][7] = 0
4778 00:39:19.150975 tx_win_center[1][1][8] = 0
4779 00:39:19.154025 tx_first_pass[1][1][8] = 0
4780 00:39:19.157379 tx_last_pass[1][1][8] = 0
4781 00:39:19.157462 tx_win_center[1][1][9] = 0
4782 00:39:19.160990 tx_first_pass[1][1][9] = 0
4783 00:39:19.163885 tx_last_pass[1][1][9] = 0
4784 00:39:19.168001 tx_win_center[1][1][10] = 0
4785 00:39:19.168086 tx_first_pass[1][1][10] = 0
4786 00:39:19.170896 tx_last_pass[1][1][10] = 0
4787 00:39:19.174181 tx_win_center[1][1][11] = 0
4788 00:39:19.177511 tx_first_pass[1][1][11] = 0
4789 00:39:19.177594 tx_last_pass[1][1][11] = 0
4790 00:39:19.181117 tx_win_center[1][1][12] = 0
4791 00:39:19.184044 tx_first_pass[1][1][12] = 0
4792 00:39:19.187649 tx_last_pass[1][1][12] = 0
4793 00:39:19.187732 tx_win_center[1][1][13] = 0
4794 00:39:19.190984 tx_first_pass[1][1][13] = 0
4795 00:39:19.194645 tx_last_pass[1][1][13] = 0
4796 00:39:19.198125 tx_win_center[1][1][14] = 0
4797 00:39:19.198209 tx_first_pass[1][1][14] = 0
4798 00:39:19.200742 tx_last_pass[1][1][14] = 0
4799 00:39:19.204192 tx_win_center[1][1][15] = 0
4800 00:39:19.207743 tx_first_pass[1][1][15] = 0
4801 00:39:19.207826 tx_last_pass[1][1][15] = 0
4802 00:39:19.210670 dump params rx window
4803 00:39:19.214180 rx_firspass[0][0][0] = 0
4804 00:39:19.214263 rx_lastpass[0][0][0] = 0
4805 00:39:19.217727 rx_firspass[0][0][1] = 0
4806 00:39:19.220628 rx_lastpass[0][0][1] = 0
4807 00:39:19.220711 rx_firspass[0][0][2] = 0
4808 00:39:19.224656 rx_lastpass[0][0][2] = 0
4809 00:39:19.227510 rx_firspass[0][0][3] = 0
4810 00:39:19.227594 rx_lastpass[0][0][3] = 0
4811 00:39:19.230777 rx_firspass[0][0][4] = 0
4812 00:39:19.234369 rx_lastpass[0][0][4] = 0
4813 00:39:19.234467 rx_firspass[0][0][5] = 0
4814 00:39:19.237851 rx_lastpass[0][0][5] = 0
4815 00:39:19.241005 rx_firspass[0][0][6] = 0
4816 00:39:19.244412 rx_lastpass[0][0][6] = 0
4817 00:39:19.244496 rx_firspass[0][0][7] = 0
4818 00:39:19.247592 rx_lastpass[0][0][7] = 0
4819 00:39:19.251065 rx_firspass[0][0][8] = 0
4820 00:39:19.251151 rx_lastpass[0][0][8] = 0
4821 00:39:19.254313 rx_firspass[0][0][9] = 0
4822 00:39:19.257650 rx_lastpass[0][0][9] = 0
4823 00:39:19.257733 rx_firspass[0][0][10] = 0
4824 00:39:19.260584 rx_lastpass[0][0][10] = 0
4825 00:39:19.264044 rx_firspass[0][0][11] = 0
4826 00:39:19.267686 rx_lastpass[0][0][11] = 0
4827 00:39:19.267785 rx_firspass[0][0][12] = 0
4828 00:39:19.270662 rx_lastpass[0][0][12] = 0
4829 00:39:19.273975 rx_firspass[0][0][13] = 0
4830 00:39:19.274086 rx_lastpass[0][0][13] = 0
4831 00:39:19.277522 rx_firspass[0][0][14] = 0
4832 00:39:19.280887 rx_lastpass[0][0][14] = 0
4833 00:39:19.283772 rx_firspass[0][0][15] = 0
4834 00:39:19.283872 rx_lastpass[0][0][15] = 0
4835 00:39:19.287231 rx_firspass[0][1][0] = 0
4836 00:39:19.290491 rx_lastpass[0][1][0] = 0
4837 00:39:19.290598 rx_firspass[0][1][1] = 0
4838 00:39:19.294077 rx_lastpass[0][1][1] = 0
4839 00:39:19.297502 rx_firspass[0][1][2] = 0
4840 00:39:19.297616 rx_lastpass[0][1][2] = 0
4841 00:39:19.301127 rx_firspass[0][1][3] = 0
4842 00:39:19.304396 rx_lastpass[0][1][3] = 0
4843 00:39:19.304480 rx_firspass[0][1][4] = 0
4844 00:39:19.307345 rx_lastpass[0][1][4] = 0
4845 00:39:19.310773 rx_firspass[0][1][5] = 0
4846 00:39:19.310856 rx_lastpass[0][1][5] = 0
4847 00:39:19.314160 rx_firspass[0][1][6] = 0
4848 00:39:19.317308 rx_lastpass[0][1][6] = 0
4849 00:39:19.317406 rx_firspass[0][1][7] = 0
4850 00:39:19.320590 rx_lastpass[0][1][7] = 0
4851 00:39:19.324018 rx_firspass[0][1][8] = 0
4852 00:39:19.327331 rx_lastpass[0][1][8] = 0
4853 00:39:19.327415 rx_firspass[0][1][9] = 0
4854 00:39:19.330778 rx_lastpass[0][1][9] = 0
4855 00:39:19.334143 rx_firspass[0][1][10] = 0
4856 00:39:19.334232 rx_lastpass[0][1][10] = 0
4857 00:39:19.337690 rx_firspass[0][1][11] = 0
4858 00:39:19.340984 rx_lastpass[0][1][11] = 0
4859 00:39:19.341101 rx_firspass[0][1][12] = 0
4860 00:39:19.343838 rx_lastpass[0][1][12] = 0
4861 00:39:19.347172 rx_firspass[0][1][13] = 0
4862 00:39:19.350568 rx_lastpass[0][1][13] = 0
4863 00:39:19.350659 rx_firspass[0][1][14] = 0
4864 00:39:19.354009 rx_lastpass[0][1][14] = 0
4865 00:39:19.357425 rx_firspass[0][1][15] = 0
4866 00:39:19.357535 rx_lastpass[0][1][15] = 0
4867 00:39:19.360870 rx_firspass[1][0][0] = 0
4868 00:39:19.364165 rx_lastpass[1][0][0] = 0
4869 00:39:19.364267 rx_firspass[1][0][1] = 0
4870 00:39:19.367195 rx_lastpass[1][0][1] = 0
4871 00:39:19.370805 rx_firspass[1][0][2] = 0
4872 00:39:19.374151 rx_lastpass[1][0][2] = 0
4873 00:39:19.374268 rx_firspass[1][0][3] = 0
4874 00:39:19.377141 rx_lastpass[1][0][3] = 0
4875 00:39:19.380701 rx_firspass[1][0][4] = 0
4876 00:39:19.380784 rx_lastpass[1][0][4] = 0
4877 00:39:19.384076 rx_firspass[1][0][5] = 0
4878 00:39:19.387625 rx_lastpass[1][0][5] = 0
4879 00:39:19.387708 rx_firspass[1][0][6] = 0
4880 00:39:19.390511 rx_lastpass[1][0][6] = 0
4881 00:39:19.394163 rx_firspass[1][0][7] = 0
4882 00:39:19.394247 rx_lastpass[1][0][7] = 0
4883 00:39:19.397159 rx_firspass[1][0][8] = 0
4884 00:39:19.400885 rx_lastpass[1][0][8] = 0
4885 00:39:19.400969 rx_firspass[1][0][9] = 0
4886 00:39:19.404168 rx_lastpass[1][0][9] = 0
4887 00:39:19.407033 rx_firspass[1][0][10] = 0
4888 00:39:19.410403 rx_lastpass[1][0][10] = 0
4889 00:39:19.410487 rx_firspass[1][0][11] = 0
4890 00:39:19.413806 rx_lastpass[1][0][11] = 0
4891 00:39:19.417508 rx_firspass[1][0][12] = 0
4892 00:39:19.417590 rx_lastpass[1][0][12] = 0
4893 00:39:19.420489 rx_firspass[1][0][13] = 0
4894 00:39:19.424097 rx_lastpass[1][0][13] = 0
4895 00:39:19.427417 rx_firspass[1][0][14] = 0
4896 00:39:19.427499 rx_lastpass[1][0][14] = 0
4897 00:39:19.430553 rx_firspass[1][0][15] = 0
4898 00:39:19.434182 rx_lastpass[1][0][15] = 0
4899 00:39:19.434265 rx_firspass[1][1][0] = 0
4900 00:39:19.437424 rx_lastpass[1][1][0] = 0
4901 00:39:19.440739 rx_firspass[1][1][1] = 0
4902 00:39:19.440822 rx_lastpass[1][1][1] = 0
4903 00:39:19.443995 rx_firspass[1][1][2] = 0
4904 00:39:19.447252 rx_lastpass[1][1][2] = 0
4905 00:39:19.447335 rx_firspass[1][1][3] = 0
4906 00:39:19.450844 rx_lastpass[1][1][3] = 0
4907 00:39:19.454419 rx_firspass[1][1][4] = 0
4908 00:39:19.457369 rx_lastpass[1][1][4] = 0
4909 00:39:19.457452 rx_firspass[1][1][5] = 0
4910 00:39:19.460717 rx_lastpass[1][1][5] = 0
4911 00:39:19.464081 rx_firspass[1][1][6] = 0
4912 00:39:19.464167 rx_lastpass[1][1][6] = 0
4913 00:39:19.467236 rx_firspass[1][1][7] = 0
4914 00:39:19.470548 rx_lastpass[1][1][7] = 0
4915 00:39:19.470631 rx_firspass[1][1][8] = 0
4916 00:39:19.474284 rx_lastpass[1][1][8] = 0
4917 00:39:19.477449 rx_firspass[1][1][9] = 0
4918 00:39:19.477531 rx_lastpass[1][1][9] = 0
4919 00:39:19.480588 rx_firspass[1][1][10] = 0
4920 00:39:19.484119 rx_lastpass[1][1][10] = 0
4921 00:39:19.484203 rx_firspass[1][1][11] = 0
4922 00:39:19.487629 rx_lastpass[1][1][11] = 0
4923 00:39:19.490848 rx_firspass[1][1][12] = 0
4924 00:39:19.494197 rx_lastpass[1][1][12] = 0
4925 00:39:19.494282 rx_firspass[1][1][13] = 0
4926 00:39:19.497499 rx_lastpass[1][1][13] = 0
4927 00:39:19.500466 rx_firspass[1][1][14] = 0
4928 00:39:19.500549 rx_lastpass[1][1][14] = 0
4929 00:39:19.503972 rx_firspass[1][1][15] = 0
4930 00:39:19.507454 rx_lastpass[1][1][15] = 0
4931 00:39:19.507537 dump params clk_delay
4932 00:39:19.510910 clk_delay[0] = 0
4933 00:39:19.510993 clk_delay[1] = 0
4934 00:39:19.514340 dump params dqs_delay
4935 00:39:19.517652 dqs_delay[0][0] = 0
4936 00:39:19.517735 dqs_delay[0][1] = 0
4937 00:39:19.520914 dqs_delay[1][0] = 0
4938 00:39:19.521003 dqs_delay[1][1] = 0
4939 00:39:19.524290 dump params delay_cell_unit = 762
4940 00:39:19.527276 mt_set_emi_preloader end
4941 00:39:19.531233 [mt_mem_init] dram size: 0x100000000, rank number: 2
4942 00:39:19.537617 [complex_mem_test] start addr:0x40000000, len:20480
4943 00:39:19.572530 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
4944 00:39:19.579018 [complex_mem_test] start addr:0x80000000, len:20480
4945 00:39:19.614799 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
4946 00:39:19.621382 [complex_mem_test] start addr:0xc0000000, len:20480
4947 00:39:19.657310 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
4948 00:39:19.663684 [complex_mem_test] start addr:0x56000000, len:8192
4949 00:39:19.680902 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
4950 00:39:19.680995 ddr_geometry:1
4951 00:39:19.687463 [complex_mem_test] start addr:0x80000000, len:8192
4952 00:39:19.704135 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
4953 00:39:19.707547 dram_init: dram init end (result: 0)
4954 00:39:19.714133 Successfully loaded DRAM blobs and ran DRAM calibration
4955 00:39:19.724586 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
4956 00:39:19.724671 CBMEM:
4957 00:39:19.727262 IMD: root @ 00000000fffff000 254 entries.
4958 00:39:19.730609 IMD: root @ 00000000ffffec00 62 entries.
4959 00:39:19.737785 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
4960 00:39:19.743987 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
4961 00:39:19.747623 in-header: 03 a1 00 00 08 00 00 00
4962 00:39:19.750708 in-data: 84 60 60 10 00 00 00 00
4963 00:39:19.753969 Chrome EC: clear events_b mask to 0x0000000020004000
4964 00:39:19.761441 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
4965 00:39:19.764909 in-header: 03 fd 00 00 00 00 00 00
4966 00:39:19.765007 in-data:
4967 00:39:19.771722 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
4968 00:39:19.771823 CBFS @ 21000 size 3d4000
4969 00:39:19.778337 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
4970 00:39:19.781615 CBFS: Locating 'fallback/ramstage'
4971 00:39:19.785003 CBFS: Found @ offset 10d40 size d563
4972 00:39:19.806085 read SPI 0x31d94 0xd547: 16639 us, 3281 KB/s, 26.248 Mbps
4973 00:39:19.818227 Accumulated console time in romstage 12830 ms
4974 00:39:19.818318
4975 00:39:19.818385
4976 00:39:19.828322 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
4977 00:39:19.831622 ARM64: Exception handlers installed.
4978 00:39:19.831710 ARM64: Testing exception
4979 00:39:19.835053 ARM64: Done test exception
4980 00:39:19.838168 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
4981 00:39:19.841518 Manufacturer: ef
4982 00:39:19.844656 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
4983 00:39:19.851433 WARNING: RO_VPD is uninitialized or empty.
4984 00:39:19.854991 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4985 00:39:19.857858 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4986 00:39:19.867805 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
4987 00:39:19.871225 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
4988 00:39:19.878048 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
4989 00:39:19.878133 Enumerating buses...
4990 00:39:19.884552 Show all devs... Before device enumeration.
4991 00:39:19.884636 Root Device: enabled 1
4992 00:39:19.887676 CPU_CLUSTER: 0: enabled 1
4993 00:39:19.887760 CPU: 00: enabled 1
4994 00:39:19.891125 Compare with tree...
4995 00:39:19.894672 Root Device: enabled 1
4996 00:39:19.894755 CPU_CLUSTER: 0: enabled 1
4997 00:39:19.897709 CPU: 00: enabled 1
4998 00:39:19.901162 Root Device scanning...
4999 00:39:19.901271 root_dev_scan_bus for Root Device
5000 00:39:19.904592 CPU_CLUSTER: 0 enabled
5001 00:39:19.908153 root_dev_scan_bus for Root Device done
5002 00:39:19.914278 scan_bus: scanning of bus Root Device took 10689 usecs
5003 00:39:19.914365 done
5004 00:39:19.917984 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5005 00:39:19.920879 Allocating resources...
5006 00:39:19.920962 Reading resources...
5007 00:39:19.924388 Root Device read_resources bus 0 link: 0
5008 00:39:19.930987 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5009 00:39:19.931072 CPU: 00 missing read_resources
5010 00:39:19.937633 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5011 00:39:19.941347 Root Device read_resources bus 0 link: 0 done
5012 00:39:19.944112 Done reading resources.
5013 00:39:19.947557 Show resources in subtree (Root Device)...After reading.
5014 00:39:19.951092 Root Device child on link 0 CPU_CLUSTER: 0
5015 00:39:19.954346 CPU_CLUSTER: 0 child on link 0 CPU: 00
5016 00:39:19.964540 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5017 00:39:19.964625 CPU: 00
5018 00:39:19.967896 Setting resources...
5019 00:39:19.970788 Root Device assign_resources, bus 0 link: 0
5020 00:39:19.974143 CPU_CLUSTER: 0 missing set_resources
5021 00:39:19.978088 Root Device assign_resources, bus 0 link: 0
5022 00:39:19.981102 Done setting resources.
5023 00:39:19.987792 Show resources in subtree (Root Device)...After assigning values.
5024 00:39:19.991124 Root Device child on link 0 CPU_CLUSTER: 0
5025 00:39:19.994512 CPU_CLUSTER: 0 child on link 0 CPU: 00
5026 00:39:20.001223 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5027 00:39:20.004082 CPU: 00
5028 00:39:20.007816 Done allocating resources.
5029 00:39:20.010968 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5030 00:39:20.014457 Enabling resources...
5031 00:39:20.014540 done.
5032 00:39:20.017540 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5033 00:39:20.020794 Initializing devices...
5034 00:39:20.020877 Root Device init ...
5035 00:39:20.024578 mainboard_init: Starting display init.
5036 00:39:20.027662 ADC[4]: Raw value=76850 ID=0
5037 00:39:20.050694 anx7625_power_on_init: Init interface.
5038 00:39:20.054146 anx7625_disable_pd_protocol: Disabled PD feature.
5039 00:39:20.060327 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5040 00:39:20.107500 anx7625_start_dp_work: Secure OCM version=00
5041 00:39:20.110530 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5042 00:39:20.128080 sp_tx_get_edid_block: EDID Block = 1
5043 00:39:20.244910 Extracted contents:
5044 00:39:20.248281 header: 00 ff ff ff ff ff ff 00
5045 00:39:20.251510 serial number: 06 af 5c 14 00 00 00 00 00 1a
5046 00:39:20.254977 version: 01 04
5047 00:39:20.258842 basic params: 95 1a 0e 78 02
5048 00:39:20.261877 chroma info: 99 85 95 55 56 92 28 22 50 54
5049 00:39:20.265286 established: 00 00 00
5050 00:39:20.271748 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5051 00:39:20.275254 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5052 00:39:20.281541 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5053 00:39:20.288064 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5054 00:39:20.294838 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5055 00:39:20.298119 extensions: 00
5056 00:39:20.298202 checksum: ae
5057 00:39:20.298268
5058 00:39:20.301689 Manufacturer: AUO Model 145c Serial Number 0
5059 00:39:20.304672 Made week 0 of 2016
5060 00:39:20.304755 EDID version: 1.4
5061 00:39:20.308369 Digital display
5062 00:39:20.311564 6 bits per primary color channel
5063 00:39:20.311649 DisplayPort interface
5064 00:39:20.315225 Maximum image size: 26 cm x 14 cm
5065 00:39:20.318371 Gamma: 220%
5066 00:39:20.318454 Check DPMS levels
5067 00:39:20.321632 Supported color formats: RGB 4:4:4
5068 00:39:20.325034 First detailed timing is preferred timing
5069 00:39:20.328093 Established timings supported:
5070 00:39:20.331550 Standard timings supported:
5071 00:39:20.331662 Detailed timings
5072 00:39:20.338349 Hex of detail: ce1d56ea50001a3030204600009010000018
5073 00:39:20.341647 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5074 00:39:20.345161 0556 0586 05a6 0640 hborder 0
5075 00:39:20.348478 0300 0304 030a 031a vborder 0
5076 00:39:20.351696 -hsync -vsync
5077 00:39:20.355418 Did detailed timing
5078 00:39:20.358366 Hex of detail: 0000000f0000000000000000000000000020
5079 00:39:20.361765 Manufacturer-specified data, tag 15
5080 00:39:20.364813 Hex of detail: 000000fe0041554f0a202020202020202020
5081 00:39:20.367958 ASCII string: AUO
5082 00:39:20.371401 Hex of detail: 000000fe004231313658414230312e34200a
5083 00:39:20.374961 ASCII string: B116XAB01.4
5084 00:39:20.375044 Checksum
5085 00:39:20.378416 Checksum: 0xae (valid)
5086 00:39:20.384837 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5087 00:39:20.384922 DSI data_rate: 457800000 bps
5088 00:39:20.392044 anx7625_parse_edid: set default k value to 0x3d for panel
5089 00:39:20.395016 anx7625_parse_edid: pixelclock(76300).
5090 00:39:20.398786 hactive(1366), hsync(32), hfp(48), hbp(154)
5091 00:39:20.402045 vactive(768), vsync(6), vfp(4), vbp(16)
5092 00:39:20.405062 anx7625_dsi_config: config dsi.
5093 00:39:20.413114 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5094 00:39:20.434144 anx7625_dsi_config: success to config DSI
5095 00:39:20.437274 anx7625_dp_start: MIPI phy setup OK.
5096 00:39:20.440820 [SSUSB] Setting up USB HOST controller...
5097 00:39:20.443993 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5098 00:39:20.447451 [SSUSB] phy power-on done.
5099 00:39:20.451471 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5100 00:39:20.454576 in-header: 03 fc 01 00 00 00 00 00
5101 00:39:20.454662 in-data:
5102 00:39:20.458197 handle_proto3_response: EC response with error code: 1
5103 00:39:20.461219 SPM: pcm index = 1
5104 00:39:20.464794 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5105 00:39:20.468016 CBFS @ 21000 size 3d4000
5106 00:39:20.474935 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5107 00:39:20.478361 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5108 00:39:20.481350 CBFS: Found @ offset 1e7c0 size 1026
5109 00:39:20.488196 read SPI 0x3f808 0x1026: 1272 us, 3250 KB/s, 26.000 Mbps
5110 00:39:20.491878 SPM: binary array size = 2988
5111 00:39:20.494903 SPM: version = pcm_allinone_v1.17.2_20180829
5112 00:39:20.498319 SPM binary loaded in 32 msecs
5113 00:39:20.505646 spm_kick_im_to_fetch: ptr = 000000004021eec2
5114 00:39:20.508388 spm_kick_im_to_fetch: len = 2988
5115 00:39:20.508472 SPM: spm_kick_pcm_to_run
5116 00:39:20.512060 SPM: spm_kick_pcm_to_run done
5117 00:39:20.515384 SPM: spm_init done in 52 msecs
5118 00:39:20.518502 Root Device init finished in 494988 usecs
5119 00:39:20.521771 CPU_CLUSTER: 0 init ...
5120 00:39:20.532019 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5121 00:39:20.535294 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5122 00:39:20.538823 CBFS @ 21000 size 3d4000
5123 00:39:20.542025 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5124 00:39:20.545560 CBFS: Locating 'sspm.bin'
5125 00:39:20.548251 CBFS: Found @ offset 208c0 size 41cb
5126 00:39:20.558566 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5127 00:39:20.566726 CPU_CLUSTER: 0 init finished in 42806 usecs
5128 00:39:20.566812 Devices initialized
5129 00:39:20.569563 Show all devs... After init.
5130 00:39:20.572963 Root Device: enabled 1
5131 00:39:20.573047 CPU_CLUSTER: 0: enabled 1
5132 00:39:20.576405 CPU: 00: enabled 1
5133 00:39:20.579592 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5134 00:39:20.583213 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5135 00:39:20.586664 ELOG: NV offset 0x558000 size 0x1000
5136 00:39:20.593952 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5137 00:39:20.600988 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5138 00:39:20.604206 ELOG: Event(17) added with size 13 at 2024-06-05 00:39:20 UTC
5139 00:39:20.607727 out: cmd=0x121: 03 db 21 01 00 00 00 00
5140 00:39:20.611160 in-header: 03 ec 00 00 2c 00 00 00
5141 00:39:20.624305 in-data: 1f 48 00 00 00 00 00 00 02 10 00 00 06 80 00 00 6f 25 01 00 06 80 00 00 88 93 02 00 06 80 00 00 6f 29 06 00 06 80 00 00 5a 7a 30 00
5142 00:39:20.627406 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5143 00:39:20.630864 in-header: 03 19 00 00 08 00 00 00
5144 00:39:20.634368 in-data: a2 e0 47 00 13 00 00 00
5145 00:39:20.637437 Chrome EC: UHEPI supported
5146 00:39:20.644035 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5147 00:39:20.647367 in-header: 03 e1 00 00 08 00 00 00
5148 00:39:20.650485 in-data: 84 20 60 10 00 00 00 00
5149 00:39:20.654169 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5150 00:39:20.660718 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5151 00:39:20.663777 in-header: 03 e1 00 00 08 00 00 00
5152 00:39:20.667380 in-data: 84 20 60 10 00 00 00 00
5153 00:39:20.674012 ELOG: Event(A1) added with size 10 at 2024-06-05 00:39:20 UTC
5154 00:39:20.680414 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5155 00:39:20.683949 ELOG: Event(A0) added with size 9 at 2024-06-05 00:39:20 UTC
5156 00:39:20.690372 elog_add_boot_reason: Logged dev mode boot
5157 00:39:20.690456 Finalize devices...
5158 00:39:20.693856 Devices finalized
5159 00:39:20.696842 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5160 00:39:20.700635 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5161 00:39:20.706896 ELOG: Event(91) added with size 10 at 2024-06-05 00:39:20 UTC
5162 00:39:20.710290 Writing coreboot table at 0xffeda000
5163 00:39:20.714153 0. 0000000000114000-000000000011efff: RAMSTAGE
5164 00:39:20.720257 1. 0000000040000000-000000004023cfff: RAMSTAGE
5165 00:39:20.723950 2. 000000004023d000-00000000545fffff: RAM
5166 00:39:20.727506 3. 0000000054600000-000000005465ffff: BL31
5167 00:39:20.730454 4. 0000000054660000-00000000ffed9fff: RAM
5168 00:39:20.737241 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5169 00:39:20.740100 6. 0000000100000000-000000013fffffff: RAM
5170 00:39:20.743623 Passing 5 GPIOs to payload:
5171 00:39:20.746876 NAME | PORT | POLARITY | VALUE
5172 00:39:20.750268 write protect | 0x00000096 | low | high
5173 00:39:20.757225 EC in RW | 0x000000b1 | high | undefined
5174 00:39:20.760553 EC interrupt | 0x00000097 | low | undefined
5175 00:39:20.767338 TPM interrupt | 0x00000099 | high | undefined
5176 00:39:20.770408 speaker enable | 0x000000af | high | undefined
5177 00:39:20.773614 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5178 00:39:20.777295 in-header: 03 f7 00 00 02 00 00 00
5179 00:39:20.777392 in-data: 04 00
5180 00:39:20.780503 Board ID: 4
5181 00:39:20.783769 ADC[3]: Raw value=1034629 ID=8
5182 00:39:20.783852 RAM code: 8
5183 00:39:20.783918 SKU ID: 16
5184 00:39:20.790206 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5185 00:39:20.790291 CBFS @ 21000 size 3d4000
5186 00:39:20.797165 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5187 00:39:20.803548 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum bb1a
5188 00:39:20.803632 coreboot table: 940 bytes.
5189 00:39:20.810387 IMD ROOT 0. 00000000fffff000 00001000
5190 00:39:20.813353 IMD SMALL 1. 00000000ffffe000 00001000
5191 00:39:20.816736 CONSOLE 2. 00000000fffde000 00020000
5192 00:39:20.820016 FMAP 3. 00000000fffdd000 0000047c
5193 00:39:20.823367 TIME STAMP 4. 00000000fffdc000 00000910
5194 00:39:20.826910 RAMOOPS 5. 00000000ffedc000 00100000
5195 00:39:20.829969 COREBOOT 6. 00000000ffeda000 00002000
5196 00:39:20.833518 IMD small region:
5197 00:39:20.836779 IMD ROOT 0. 00000000ffffec00 00000400
5198 00:39:20.840010 VBOOT WORK 1. 00000000ffffeb00 00000100
5199 00:39:20.843376 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5200 00:39:20.846417 VPD 3. 00000000ffffea60 0000006c
5201 00:39:20.853601 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5202 00:39:20.860074 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5203 00:39:20.863297 in-header: 03 e1 00 00 08 00 00 00
5204 00:39:20.863380 in-data: 84 20 60 10 00 00 00 00
5205 00:39:20.870235 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5206 00:39:20.870320 CBFS @ 21000 size 3d4000
5207 00:39:20.876991 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5208 00:39:20.879935 CBFS: Locating 'fallback/payload'
5209 00:39:20.884965 CBFS: Found @ offset dc040 size 439a0
5210 00:39:20.976228 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5211 00:39:20.979515 Checking segment from ROM address 0x0000000040003a00
5212 00:39:20.985970 Checking segment from ROM address 0x0000000040003a1c
5213 00:39:20.989232 Loading segment from ROM address 0x0000000040003a00
5214 00:39:20.992609 code (compression=0)
5215 00:39:21.002412 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5216 00:39:21.009505 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5217 00:39:21.012730 it's not compressed!
5218 00:39:21.016131 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5219 00:39:21.022663 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5220 00:39:21.030309 Loading segment from ROM address 0x0000000040003a1c
5221 00:39:21.033606 Entry Point 0x0000000080000000
5222 00:39:21.033738 Loaded segments
5223 00:39:21.040175 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5224 00:39:21.043736 Jumping to boot code at 0000000080000000(00000000ffeda000)
5225 00:39:21.053442 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5226 00:39:21.056867 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5227 00:39:21.060465 CBFS @ 21000 size 3d4000
5228 00:39:21.067098 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5229 00:39:21.070047 CBFS: Locating 'fallback/bl31'
5230 00:39:21.073595 CBFS: Found @ offset 36dc0 size 5820
5231 00:39:21.084582 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5232 00:39:21.087978 Checking segment from ROM address 0x0000000040003a00
5233 00:39:21.094145 Checking segment from ROM address 0x0000000040003a1c
5234 00:39:21.097652 Loading segment from ROM address 0x0000000040003a00
5235 00:39:21.100959 code (compression=1)
5236 00:39:21.107970 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5237 00:39:21.117391 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5238 00:39:21.117495 using LZMA
5239 00:39:21.126321 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5240 00:39:21.133049 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5241 00:39:21.136252 Loading segment from ROM address 0x0000000040003a1c
5242 00:39:21.139706 Entry Point 0x0000000054601000
5243 00:39:21.139790 Loaded segments
5244 00:39:21.143004 NOTICE: MT8183 bl31_setup
5245 00:39:21.149926 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5246 00:39:21.153017 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5247 00:39:21.156316 INFO: [DEVAPC] dump DEVAPC registers:
5248 00:39:21.166457 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5249 00:39:21.173294 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5250 00:39:21.180221 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5251 00:39:21.190559 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5252 00:39:21.196952 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5253 00:39:21.206937 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5254 00:39:21.213457 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5255 00:39:21.223235 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5256 00:39:21.230073 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5257 00:39:21.239574 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5258 00:39:21.246393 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5259 00:39:21.256701 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5260 00:39:21.263200 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5261 00:39:21.269843 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5262 00:39:21.279500 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5263 00:39:21.286245 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5264 00:39:21.292839 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5265 00:39:21.299624 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5266 00:39:21.306449 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5267 00:39:21.316554 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5268 00:39:21.322999 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5269 00:39:21.329480 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5270 00:39:21.332702 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5271 00:39:21.336193 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5272 00:39:21.339763 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5273 00:39:21.343226 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5274 00:39:21.346233 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5275 00:39:21.353022 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5276 00:39:21.356569 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5277 00:39:21.359651 WARNING: region 0:
5278 00:39:21.363126 WARNING: apc:0x168, sa:0x0, ea:0xfff
5279 00:39:21.363209 WARNING: region 1:
5280 00:39:21.369396 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5281 00:39:21.369483 WARNING: region 2:
5282 00:39:21.372976 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5283 00:39:21.376625 WARNING: region 3:
5284 00:39:21.379375 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5285 00:39:21.379458 WARNING: region 4:
5286 00:39:21.382910 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5287 00:39:21.386163 WARNING: region 5:
5288 00:39:21.389754 WARNING: apc:0x0, sa:0x0, ea:0x0
5289 00:39:21.389837 WARNING: region 6:
5290 00:39:21.392882 WARNING: apc:0x0, sa:0x0, ea:0x0
5291 00:39:21.396494 WARNING: region 7:
5292 00:39:21.399475 WARNING: apc:0x0, sa:0x0, ea:0x0
5293 00:39:21.406455 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5294 00:39:21.409229 INFO: SPM: enable SPMC mode
5295 00:39:21.413079 NOTICE: spm_boot_init() start
5296 00:39:21.413190 NOTICE: spm_boot_init() end
5297 00:39:21.419493 INFO: BL31: Initializing runtime services
5298 00:39:21.422909 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5299 00:39:21.429254 INFO: BL31: Preparing for EL3 exit to normal world
5300 00:39:21.433047 INFO: Entry point address = 0x80000000
5301 00:39:21.433158 INFO: SPSR = 0x8
5302 00:39:21.456064
5303 00:39:21.456152
5304 00:39:21.456218
5305 00:39:21.456656 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
5306 00:39:21.456753 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5307 00:39:21.456837 Setting prompt string to ['jacuzzi:']
5308 00:39:21.456917 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5309 00:39:21.459618 Starting depthcharge on Juniper...
5310 00:39:21.459703
5311 00:39:21.462810 vboot_handoff: creating legacy vboot_handoff structure
5312 00:39:21.462893
5313 00:39:21.466339 ec_init(0): CrosEC protocol v3 supported (544, 544)
5314 00:39:21.466421
5315 00:39:21.469738 Wipe memory regions:
5316 00:39:21.469820
5317 00:39:21.473040 [0x00000040000000, 0x00000054600000)
5318 00:39:21.515926
5319 00:39:21.516014 [0x00000054660000, 0x00000080000000)
5320 00:39:21.607094
5321 00:39:21.607227 [0x000000811994a0, 0x000000ffeda000)
5322 00:39:21.867215
5323 00:39:21.867350 [0x00000100000000, 0x00000140000000)
5324 00:39:21.999582
5325 00:39:22.002966 Initializing XHCI USB controller at 0x11200000.
5326 00:39:22.025878
5327 00:39:22.029189 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5328 00:39:22.029297
5329 00:39:22.029364
5330 00:39:22.029644 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5332 00:39:22.129996 jacuzzi: tftpboot 192.168.201.1 14173524/tftp-deploy-e3uml72i/kernel/image.itb 14173524/tftp-deploy-e3uml72i/kernel/cmdline
5333 00:39:22.130129 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5334 00:39:22.130213 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5335 00:39:22.134216 tftpboot 192.168.201.1 14173524/tftp-deploy-e3uml72i/kernel/image.ittp-deploy-e3uml72i/kernel/cmdline
5336 00:39:22.134303
5337 00:39:22.134370 Waiting for link
5338 00:39:22.540074
5339 00:39:22.540204 R8152: Initializing
5340 00:39:22.540272
5341 00:39:22.543200 Version 9 (ocp_data = 6010)
5342 00:39:22.543284
5343 00:39:22.546240 R8152: Done initializing
5344 00:39:22.546325
5345 00:39:22.546391 Adding net device
5346 00:39:22.932031
5347 00:39:22.932164 done.
5348 00:39:22.932231
5349 00:39:22.932294 MAC: 00:e0:4c:71:a7:1f
5350 00:39:22.932354
5351 00:39:22.935426 Sending DHCP discover... done.
5352 00:39:22.935511
5353 00:39:22.938863 Waiting for reply... done.
5354 00:39:22.938950
5355 00:39:22.941944 Sending DHCP request... done.
5356 00:39:22.942034
5357 00:39:22.944933 Waiting for reply... done.
5358 00:39:22.945018
5359 00:39:22.945083 My ip is 192.168.201.23
5360 00:39:22.945145
5361 00:39:22.948523 The DHCP server ip is 192.168.201.1
5362 00:39:22.948608
5363 00:39:22.955278 TFTP server IP predefined by user: 192.168.201.1
5364 00:39:22.955363
5365 00:39:22.958970 Bootfile predefined by user: 14173524/tftp-deploy-e3uml72i/kernel/image.itb
5366 00:39:22.961623
5367 00:39:22.961706 Sending tftp read request... done.
5368 00:39:22.961771
5369 00:39:22.968212 Waiting for the transfer...
5370 00:39:22.968377
5371 00:39:23.212224 00000000 ################################################################
5372 00:39:23.212355
5373 00:39:23.451833 00080000 ################################################################
5374 00:39:23.451967
5375 00:39:23.691509 00100000 ################################################################
5376 00:39:23.691670
5377 00:39:23.940610 00180000 ################################################################
5378 00:39:23.940778
5379 00:39:24.180693 00200000 ################################################################
5380 00:39:24.180857
5381 00:39:24.422634 00280000 ################################################################
5382 00:39:24.422770
5383 00:39:24.662432 00300000 ################################################################
5384 00:39:24.662570
5385 00:39:24.903629 00380000 ################################################################
5386 00:39:24.903762
5387 00:39:25.147647 00400000 ################################################################
5388 00:39:25.147831
5389 00:39:25.389987 00480000 ################################################################
5390 00:39:25.390160
5391 00:39:25.625916 00500000 ################################################################
5392 00:39:25.626064
5393 00:39:25.859919 00580000 ################################################################
5394 00:39:25.860060
5395 00:39:26.099967 00600000 ################################################################
5396 00:39:26.100131
5397 00:39:26.340510 00680000 ################################################################
5398 00:39:26.340689
5399 00:39:26.583781 00700000 ################################################################
5400 00:39:26.583947
5401 00:39:26.826708 00780000 ################################################################
5402 00:39:26.826866
5403 00:39:27.071225 00800000 ################################################################
5404 00:39:27.071358
5405 00:39:27.315581 00880000 ################################################################
5406 00:39:27.315713
5407 00:39:27.560587 00900000 ################################################################
5408 00:39:27.560724
5409 00:39:27.802632 00980000 ################################################################
5410 00:39:27.802770
5411 00:39:28.043669 00a00000 ################################################################
5412 00:39:28.043845
5413 00:39:28.288458 00a80000 ################################################################
5414 00:39:28.288605
5415 00:39:28.528197 00b00000 ################################################################
5416 00:39:28.528343
5417 00:39:28.770880 00b80000 ################################################################
5418 00:39:28.771017
5419 00:39:29.010931 00c00000 ################################################################
5420 00:39:29.011061
5421 00:39:29.253406 00c80000 ################################################################
5422 00:39:29.253541
5423 00:39:29.495463 00d00000 ################################################################
5424 00:39:29.495593
5425 00:39:29.737139 00d80000 ################################################################
5426 00:39:29.737304
5427 00:39:29.979012 00e00000 ################################################################
5428 00:39:29.979143
5429 00:39:30.220982 00e80000 ################################################################
5430 00:39:30.221143
5431 00:39:30.464785 00f00000 ################################################################
5432 00:39:30.464945
5433 00:39:30.717608 00f80000 ################################################################
5434 00:39:30.717770
5435 00:39:30.975931 01000000 ################################################################
5436 00:39:30.976122
5437 00:39:31.225915 01080000 ################################################################
5438 00:39:31.226064
5439 00:39:31.484807 01100000 ################################################################
5440 00:39:31.484984
5441 00:39:31.725392 01180000 ################################################################
5442 00:39:31.725571
5443 00:39:31.973100 01200000 ################################################################
5444 00:39:31.973270
5445 00:39:32.217950 01280000 ################################################################
5446 00:39:32.218110
5447 00:39:32.472520 01300000 ################################################################
5448 00:39:32.472685
5449 00:39:32.715736 01380000 ################################################################
5450 00:39:32.715872
5451 00:39:32.955839 01400000 ################################################################
5452 00:39:32.955977
5453 00:39:33.195046 01480000 ################################################################
5454 00:39:33.195215
5455 00:39:33.435408 01500000 ################################################################
5456 00:39:33.435580
5457 00:39:33.677431 01580000 ################################################################
5458 00:39:33.677601
5459 00:39:33.925690 01600000 ################################################################
5460 00:39:33.925825
5461 00:39:34.179018 01680000 ################################################################
5462 00:39:34.179162
5463 00:39:34.429434 01700000 ################################################################
5464 00:39:34.429608
5465 00:39:34.674119 01780000 ################################################################
5466 00:39:34.674277
5467 00:39:34.923005 01800000 ################################################################
5468 00:39:34.923144
5469 00:39:35.188194 01880000 ################################################################
5470 00:39:35.188332
5471 00:39:35.450498 01900000 ################################################################
5472 00:39:35.450626
5473 00:39:35.701817 01980000 ################################################################
5474 00:39:35.701962
5475 00:39:35.949923 01a00000 ################################################################
5476 00:39:35.950058
5477 00:39:36.200020 01a80000 ################################################################
5478 00:39:36.200155
5479 00:39:36.444923 01b00000 ################################################################
5480 00:39:36.445055
5481 00:39:36.693140 01b80000 ################################################################
5482 00:39:36.693306
5483 00:39:36.938508 01c00000 ################################################################
5484 00:39:36.938677
5485 00:39:37.187191 01c80000 ################################################################
5486 00:39:37.187350
5487 00:39:37.431210 01d00000 ################################################################
5488 00:39:37.431341
5489 00:39:37.675454 01d80000 ################################################################
5490 00:39:37.675591
5491 00:39:37.929921 01e00000 ################################################################
5492 00:39:37.930057
5493 00:39:38.190853 01e80000 ################################################################
5494 00:39:38.190990
5495 00:39:38.437276 01f00000 ################################################################
5496 00:39:38.437420
5497 00:39:38.696350 01f80000 ################################################################
5498 00:39:38.696518
5499 00:39:38.944171 02000000 ################################################################
5500 00:39:38.944346
5501 00:39:39.126419 02080000 ################################################ done.
5502 00:39:39.126568
5503 00:39:39.130214 The bootfile was 34466178 bytes long.
5504 00:39:39.130306
5505 00:39:39.133313 Sending tftp read request... done.
5506 00:39:39.133399
5507 00:39:39.136740 Waiting for the transfer...
5508 00:39:39.136825
5509 00:39:39.136892 00000000 # done.
5510 00:39:39.136957
5511 00:39:39.146560 Command line loaded dynamically from TFTP file: 14173524/tftp-deploy-e3uml72i/kernel/cmdline
5512 00:39:39.146645
5513 00:39:39.163472 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5514 00:39:39.163564
5515 00:39:39.163631 Loading FIT.
5516 00:39:39.163694
5517 00:39:39.167087 Image ramdisk-1 has 21346514 bytes.
5518 00:39:39.167171
5519 00:39:39.169934 Image fdt-1 has 57695 bytes.
5520 00:39:39.170017
5521 00:39:39.173359 Image kernel-1 has 13059919 bytes.
5522 00:39:39.173442
5523 00:39:39.179594 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5524 00:39:39.179678
5525 00:39:39.192832 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5526 00:39:39.192920
5527 00:39:39.199860 Choosing best match conf-1 for compat google,juniper-sku16.
5528 00:39:39.199944
5529 00:39:39.207453 Connected to device vid:did:rid of 1ae0:0028:00
5530 00:39:39.215375
5531 00:39:39.218743 tpm_get_response: command 0x17b, return code 0x0
5532 00:39:39.218828
5533 00:39:39.222427 tpm_cleanup: add release locality here.
5534 00:39:39.222511
5535 00:39:39.225945 Shutting down all USB controllers.
5536 00:39:39.226030
5537 00:39:39.228891 Removing current net device
5538 00:39:39.228974
5539 00:39:39.232167 Exiting depthcharge with code 4 at timestamp: 34158952
5540 00:39:39.232251
5541 00:39:39.235980 LZMA decompressing kernel-1 to 0x80193568
5542 00:39:39.236064
5543 00:39:39.239132 LZMA decompressing kernel-1 to 0x40000000
5544 00:39:41.098022
5545 00:39:41.098161 jumping to kernel
5546 00:39:41.098628 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
5547 00:39:41.098731 start: 2.2.5 auto-login-action (timeout 00:04:07) [common]
5548 00:39:41.098808 Setting prompt string to ['Linux version [0-9]']
5549 00:39:41.098879 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5550 00:39:41.098949 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5551 00:39:41.173241
5552 00:39:41.176589 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5553 00:39:41.179740 start: 2.2.5.1 login-action (timeout 00:04:07) [common]
5554 00:39:41.179839 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5555 00:39:41.179914 Setting prompt string to []
5556 00:39:41.179995 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5557 00:39:41.180075 Using line separator: #'\n'#
5558 00:39:41.180137 No login prompt set.
5559 00:39:41.180199 Parsing kernel messages
5560 00:39:41.180255 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5561 00:39:41.180358 [login-action] Waiting for messages, (timeout 00:04:07)
5562 00:39:41.180423 Waiting using forced prompt support (timeout 00:02:04)
5563 00:39:41.199392 [ 0.000000] Linux version 6.1.92-cip22-rt12 (KernelCI@build-j217237-arm64-gcc-10-defconfig-arm64-chromebook-pmq2q) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Wed Jun 5 00:22:12 UTC 2024
5564 00:39:41.202835 [ 0.000000] random: crng init done
5565 00:39:41.209287 [ 0.000000] Machine model: Google juniper sku16 board
5566 00:39:41.213024 [ 0.000000] efi: UEFI not found.
5567 00:39:41.219430 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5568 00:39:41.229576 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5569 00:39:41.236812 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5570 00:39:41.239563 [ 0.000000] printk: bootconsole [mtk8250] enabled
5571 00:39:41.248987 [ 0.000000] NUMA: No NUMA configuration found
5572 00:39:41.255226 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5573 00:39:41.261991 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5574 00:39:41.262077 [ 0.000000] Zone ranges:
5575 00:39:41.268437 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5576 00:39:41.271952 [ 0.000000] DMA32 empty
5577 00:39:41.278363 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5578 00:39:41.282160 [ 0.000000] Movable zone start for each node
5579 00:39:41.284968 [ 0.000000] Early memory node ranges
5580 00:39:41.291502 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5581 00:39:41.298552 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5582 00:39:41.304792 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5583 00:39:41.312050 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5584 00:39:41.318486 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5585 00:39:41.325132 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5586 00:39:41.340896 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5587 00:39:41.347410 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5588 00:39:41.354131 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5589 00:39:41.357814 [ 0.000000] psci: probing for conduit method from DT.
5590 00:39:41.364697 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5591 00:39:41.367883 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5592 00:39:41.374399 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5593 00:39:41.377630 [ 0.000000] psci: SMC Calling Convention v1.1
5594 00:39:41.384134 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5595 00:39:41.387315 [ 0.000000] Detected VIPT I-cache on CPU0
5596 00:39:41.394415 [ 0.000000] CPU features: detected: GIC system register CPU interface
5597 00:39:41.400712 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5598 00:39:41.407571 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5599 00:39:41.410993 [ 0.000000] CPU features: detected: ARM erratum 845719
5600 00:39:41.417534 [ 0.000000] alternatives: applying boot alternatives
5601 00:39:41.421127 [ 0.000000] Fallback order for Node 0: 0
5602 00:39:41.427346 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5603 00:39:41.430631 [ 0.000000] Policy zone: Normal
5604 00:39:41.450545 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5605 00:39:41.460788 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5606 00:39:41.471355 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5607 00:39:41.477923 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5608 00:39:41.484626 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5609 00:39:41.491436 <6>[ 0.000000] software IO TLB: area num 8.
5610 00:39:41.515306 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5611 00:39:41.573621 <6>[ 0.000000] Memory: 3894356K/4191232K available (18112K kernel code, 4120K rwdata, 22504K rodata, 8512K init, 616K bss, 264108K reserved, 32768K cma-reserved)
5612 00:39:41.580487 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5613 00:39:41.587144 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5614 00:39:41.589971 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5615 00:39:41.597052 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5616 00:39:41.603502 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5617 00:39:41.606629 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5618 00:39:41.616893 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5619 00:39:41.623216 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5620 00:39:41.626686 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5621 00:39:41.638297 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5622 00:39:41.645440 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5623 00:39:41.648723 <6>[ 0.000000] GICv3: 640 SPIs implemented
5624 00:39:41.652120 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5625 00:39:41.658670 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5626 00:39:41.661730 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5627 00:39:41.668297 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5628 00:39:41.681630 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5629 00:39:41.692330 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5630 00:39:41.698619 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5631 00:39:41.710560 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5632 00:39:41.723555 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5633 00:39:41.730241 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5634 00:39:41.737475 <6>[ 0.009477] Console: colour dummy device 80x25
5635 00:39:41.740551 <6>[ 0.014501] printk: console [tty1] enabled
5636 00:39:41.750742 <6>[ 0.018886] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5637 00:39:41.757519 <6>[ 0.029350] pid_max: default: 32768 minimum: 301
5638 00:39:41.760564 <6>[ 0.034231] LSM: Security Framework initializing
5639 00:39:41.770456 <6>[ 0.039145] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5640 00:39:41.777433 <6>[ 0.046769] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5641 00:39:41.783635 <4>[ 0.055640] cacheinfo: Unable to detect cache hierarchy for CPU 0
5642 00:39:41.793509 <6>[ 0.062263] cblist_init_generic: Setting adjustable number of callback queues.
5643 00:39:41.800796 <6>[ 0.069709] cblist_init_generic: Setting shift to 3 and lim to 1.
5644 00:39:41.806773 <6>[ 0.076061] cblist_init_generic: Setting adjustable number of callback queues.
5645 00:39:41.813723 <6>[ 0.083506] cblist_init_generic: Setting shift to 3 and lim to 1.
5646 00:39:41.821850 <6>[ 0.089965] printk: bootconsole [mtk8250] printing thread started
5647 00:39:41.828372 <6>[ 0.089980] rcu: Hierarchical SRCU implementation.
5648 00:39:41.832183 <6>[ 0.089982] rcu: Max phase no-delay instances is 1000.
5649 00:39:41.838485 <6>[ 0.090012] printk: console [tty1] printing thread started
5650 00:39:41.844919 <6>[ 0.092478] EFI services will not be available.
5651 00:39:41.848270 <6>[ 0.092657] smp: Bringing up secondary CPUs ...
5652 00:39:41.851397 <6>[ 0.093130] Detected VIPT I-cache on CPU1
5653 00:39:41.858316 <4>[ 0.093177] cacheinfo: Unable to detect cache hierarchy for CPU 1
5654 00:39:41.864681 <6>[ 0.093184] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5655 00:39:41.871820 <6>[ 0.093215] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5656 00:39:41.878242 <6>[ 0.093697] Detected VIPT I-cache on CPU2
5657 00:39:41.885200 <4>[ 0.093729] cacheinfo: Unable to detect cache hierarchy for CPU 2
5658 00:39:41.891458 <6>[ 0.093734] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5659 00:39:41.898074 <6>[ 0.093745] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5660 00:39:41.906315 <6>[ 0.174924] Detected VIPT I-cache on CPU3
5661 00:39:41.913116 <4>[ 0.174954] cacheinfo: Unable to detect cache hierarchy for CPU 3
5662 00:39:41.919534 <6>[ 0.174958] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5663 00:39:41.926263 <6>[ 0.174969] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5664 00:39:41.932799 <6>[ 0.175544] CPU features: detected: Spectre-v2
5665 00:39:41.936207 <6>[ 0.175554] CPU features: detected: Spectre-BHB
5666 00:39:41.942641 <6>[ 0.175557] CPU features: detected: ARM erratum 858921
5667 00:39:41.946057 <6>[ 0.175562] Detected VIPT I-cache on CPU4
5668 00:39:41.952888 <4>[ 0.175609] cacheinfo: Unable to detect cache hierarchy for CPU 4
5669 00:39:41.959467 <6>[ 0.175617] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5670 00:39:41.965977 <6>[ 0.175624] arch_timer: Enabling local workaround for ARM erratum 858921
5671 00:39:41.973137 <6>[ 0.175634] arch_timer: CPU4: Trapping CNTVCT access
5672 00:39:41.979351 <6>[ 0.175642] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5673 00:39:41.983190 <6>[ 0.176132] Detected VIPT I-cache on CPU5
5674 00:39:41.989847 <4>[ 0.176171] cacheinfo: Unable to detect cache hierarchy for CPU 5
5675 00:39:41.995889 <6>[ 0.176176] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5676 00:39:42.007836 <6>[ 0.176183] arch_timer: Enabling local workaround for ARM erratum 858921
5677 00:39:42.011312 <6>[ 0.176189] arch_timer: CPU5: Trapping CNTVCT access
5678 00:39:42.017501 <6>[ 0.176194] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5679 00:39:42.021057 <6>[ 0.176632] Detected VIPT I-cache on CPU6
5680 00:39:42.027979 <4>[ 0.176677] cacheinfo: Unable to detect cache hierarchy for CPU 6
5681 00:39:42.034367 <6>[ 0.176683] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5682 00:39:42.044815 <6>[ 0.176689] arch_timer: Enabling local workaround for ARM erratum 858921
5683 00:39:42.047819 <6>[ 0.176695] arch_timer: CPU6: Trapping CNTVCT access
5684 00:39:42.054357 <6>[ 0.176700] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5685 00:39:42.058090 <6>[ 0.177232] Detected VIPT I-cache on CPU7
5686 00:39:42.064559 <4>[ 0.177275] cacheinfo: Unable to detect cache hierarchy for CPU 7
5687 00:39:42.071161 <6>[ 0.177280] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5688 00:39:42.080880 <6>[ 0.177287] arch_timer: Enabling local workaround for ARM erratum 858921
5689 00:39:42.084659 <6>[ 0.177293] arch_timer: CPU7: Trapping CNTVCT access
5690 00:39:42.090849 <6>[ 0.177298] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5691 00:39:42.094484 <6>[ 0.177345] smp: Brought up 1 node, 8 CPUs
5692 00:39:42.101061 <6>[ 0.177350] SMP: Total of 8 processors activated.
5693 00:39:42.126056 <6>[ 0.398260] printk: console [ttyS0]< printing thread started
5694 00:39:42.132561 6>[<6>[ 0.398286] printk: console [ttyS0] enabled
5695 00:39:42.136017 0.177353] CPU features: detected: 32-bit EL0 Support
5696 00:39:42.145220 <6>[ 0.398290] printk: bootconsole [mtk8250] disabled
5697 00:39:42.152008 <6>[ 0.413937] printk: bootconsole [mtk8250] printing thread stopped
5698 00:39:42.158829 <3>[ 0.414363] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5699 00:39:42.168741 <3>[ 0.414368] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5700 00:39:42.178779 <6>[ 0.434715] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5701 00:39:42.181849 <6>[ 0.434876] serial serial0: tty port ttyS1 registered
5702 00:39:42.188931 <6>[ 0.436123] SuperH (H)SCI(F) driver initialized
5703 00:39:42.192103 <6>[ 0.436729] msm_serial: driver initialized
5704 00:39:42.201945 <6>[ 0.442525] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5705 00:39:42.208929 <6>[ 0.442562] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5706 00:39:42.222898 <6>[ 0.442589] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5707 00:39:42.233143 <6>[ 0.442613] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5708 00:39:42.241976 <6>[ 0.442637] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5709 00:39:42.246207 <6>[ 0.442669] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5710 00:39:42.259342 <6>[ 0.442694] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5711 00:39:42.263125 <6>[ 0.442719] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5712 00:39:42.275619 <6>[ 0.442742] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5713 00:39:42.281182 <6>[ 0.442813] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5714 00:39:42.285053 <4>[ 0.454897] cacheinfo: Unable to detect cache hierarchy for CPU 0
5715 00:39:42.288653 <6>[ 0.457903] loop: module loaded
5716 00:39:42.295343 <6>[ 0.466401] vsim1: Bringing 1800000uV into 2700000-2700000uV
5717 00:39:42.298535 <6>[ 0.478326] megasas: 07.719.03.00-rc1
5718 00:39:42.301822 <6>[ 0.483050] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5719 00:39:42.308576 <6>[ 0.493071] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5720 00:39:42.315112 <6>[ 0.505008] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5721 00:39:42.325130 <6>[ 0.560472] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5722 00:39:42.709228 <6>[ 0.979122] Freeing initrd memory: 20844K
5723 00:39:42.724755 <4>[ 0.990600] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5724 00:39:42.732002 <4>[ 0.990606] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22-rt12 #1
5725 00:39:42.738173 <4>[ 0.990613] Hardware name: Google juniper sku16 board (DT)
5726 00:39:42.742022 <4>[ 0.990616] Call trace:
5727 00:39:42.744832 <4>[ 0.990619] dump_backtrace.part.0+0xe0/0xf0
5728 00:39:42.748548 <4>[ 0.990634] show_stack+0x18/0x30
5729 00:39:42.751605 <4>[ 0.990641] dump_stack_lvl+0x68/0x84
5730 00:39:42.758325 <4>[ 0.990650] dump_stack+0x18/0x34
5731 00:39:42.761609 <4>[ 0.990655] sysfs_warn_dup+0x64/0x80
5732 00:39:42.765755 <4>[ 0.990661] sysfs_do_create_link_sd+0xf0/0x100
5733 00:39:42.769712 <4>[ 0.990665] sysfs_create_link+0x20/0x40
5734 00:39:42.773476 <4>[ 0.990668] bus_add_device+0x68/0x10c
5735 00:39:42.776689 <4>[ 0.990675] device_add+0x340/0x7ac
5736 00:39:42.780393 <4>[ 0.990680] of_device_add+0x44/0x60
5737 00:39:42.787011 <4>[ 0.990688] of_platform_device_create_pdata+0x90/0x120
5738 00:39:42.789860 <4>[ 0.990692] of_platform_bus_create+0x170/0x370
5739 00:39:42.796584 <4>[ 0.990696] of_platform_populate+0x50/0xfc
5740 00:39:42.800495 <4>[ 0.990700] parse_mtd_partitions+0x1dc/0x510
5741 00:39:42.807456 <4>[ 0.990706] mtd_device_parse_register+0xf8/0x2e0
5742 00:39:42.809977 <4>[ 0.990710] spi_nor_probe+0x21c/0x2f0
5743 00:39:42.813418 <4>[ 0.990717] spi_mem_probe+0x6c/0xb0
5744 00:39:42.817020 <4>[ 0.990723] spi_probe+0x84/0xe4
5745 00:39:42.819964 <4>[ 0.990727] really_probe+0xbc/0x2e0
5746 00:39:42.826903 <4>[ 0.990732] __driver_probe_device+0x78/0x11c
5747 00:39:42.830216 <4>[ 0.990737] driver_probe_device+0xd8/0x160
5748 00:39:42.833570 <4>[ 0.990742] __device_attach_driver+0xb8/0x134
5749 00:39:42.839899 <4>[ 0.990747] bus_for_each_drv+0x78/0xd0
5750 00:39:42.843247 <4>[ 0.990751] __device_attach+0xa8/0x1c0
5751 00:39:42.846747 <4>[ 0.990756] device_initial_probe+0x14/0x20
5752 00:39:42.850247 <4>[ 0.990761] bus_probe_device+0x9c/0xa4
5753 00:39:42.853642 <4>[ 0.990765] device_add+0x3ac/0x7ac
5754 00:39:42.859877 <4>[ 0.990769] __spi_add_device+0x78/0x120
5755 00:39:42.863388 <4>[ 0.990774] spi_add_device+0x40/0x7c
5756 00:39:42.867004 <4>[ 0.990779] spi_register_controller+0x610/0xad0
5757 00:39:42.873606 <4>[ 0.990784] devm_spi_register_controller+0x4c/0xa4
5758 00:39:42.876960 <4>[ 0.990790] mtk_spi_probe+0x3f8/0x650
5759 00:39:42.880402 <4>[ 0.990795] platform_probe+0x68/0xe0
5760 00:39:42.883192 <4>[ 0.990801] really_probe+0xbc/0x2e0
5761 00:39:42.890064 <4>[ 0.990805] __driver_probe_device+0x78/0x11c
5762 00:39:42.893767 <4>[ 0.990810] driver_probe_device+0xd8/0x160
5763 00:39:42.896698 <4>[ 0.990815] __driver_attach+0x94/0x19c
5764 00:39:42.903662 <4>[ 0.990819] bus_for_each_dev+0x70/0xd0
5765 00:39:42.906951 <4>[ 0.990823] driver_attach+0x24/0x30
5766 00:39:42.910356 <4>[ 0.990827] bus_add_driver+0x154/0x20c
5767 00:39:42.913579 <4>[ 0.990832] driver_register+0x78/0x130
5768 00:39:42.920368 <4>[ 0.990837] __platform_driver_register+0x28/0x34
5769 00:39:42.924007 <4>[ 0.990843] mtk_spi_driver_init+0x1c/0x28
5770 00:39:42.926976 <4>[ 0.990850] do_one_initcall+0x50/0x1d0
5771 00:39:42.930143 <4>[ 0.990854] kernel_init_freeable+0x21c/0x288
5772 00:39:42.936980 <4>[ 0.990861] kernel_init+0x24/0x12c
5773 00:39:42.940354 <4>[ 0.990867] ret_from_fork+0x10/0x20
5774 00:39:42.943994 <6>[ 0.995956] tun: Universal TUN/TAP device driver, 1.6
5775 00:39:42.946786 <6>[ 0.996901] thunder_xcv, ver 1.0
5776 00:39:42.950274 <6>[ 0.996920] thunder_bgx, ver 1.0
5777 00:39:42.954003 <6>[ 0.996936] nicpf, ver 1.0
5778 00:39:42.964058 <6>[ 0.998334] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5779 00:39:42.966903 <6>[ 0.998339] hns3: Copyright (c) 2017 Huawei Corporation.
5780 00:39:42.970241 <6>[ 0.998370] hclge is initializing
5781 00:39:42.977529 <6>[ 0.998383] e1000: Intel(R) PRO/1000 Network Driver
5782 00:39:42.983470 <6>[ 0.998386] e1000: Copyright (c) 1999-2006 Intel Corporation.
5783 00:39:42.987214 <6>[ 0.998407] e1000e: Intel(R) PRO/1000 Network Driver
5784 00:39:42.993922 <6>[ 0.998409] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5785 00:39:43.000766 <6>[ 0.998430] igb: Intel(R) Gigabit Ethernet Network Driver
5786 00:39:43.003602 <6>[ 0.998433] igb: Copyright (c) 2007-2014 Intel Corporation.
5787 00:39:43.010250 <6>[ 0.998448] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5788 00:39:43.016754 <6>[ 0.998450] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5789 00:39:43.020140 <6>[ 0.998821] sky2: driver version 1.30
5790 00:39:43.026983 <6>[ 1.000135] usbcore: registered new device driver r8152-cfgselector
5791 00:39:43.033415 <6>[ 1.000152] usbcore: registered new interface driver r8152
5792 00:39:43.040250 <6>[ 1.000239] VFIO - User Level meta-driver version: 0.3
5793 00:39:43.043681 <6>[ 1.002609] mtu3 11201000.usb: uwk - reg:0x420, version:101
5794 00:39:43.053468 <4>[ 1.002641] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5795 00:39:43.056942 <6>[ 1.002694] mtu3 11201000.usb: dr_mode: 1, drd: auto
5796 00:39:43.064070 <6>[ 1.002698] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5797 00:39:43.067047 <6>[ 1.002876] mtu3 11201000.usb: usb3-drd: 0
5798 00:39:43.074037 <6>[ 1.004040] mtu3 11201000.usb: xHCI platform device register success...
5799 00:39:43.084056 <4>[ 1.005813] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5800 00:39:43.087734 <6>[ 1.006170] xhci-mtk 11200000.usb: xHCI Host Controller
5801 00:39:43.094130 <6>[ 1.006183] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5802 00:39:43.100833 <6>[ 1.006251] xhci-mtk 11200000.usb: USB3 root hub has no ports
5803 00:39:43.110619 <6>[ 1.006256] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5804 00:39:43.117497 <6>[ 1.006293] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5805 00:39:43.120874 <6>[ 1.006366] xhci-mtk 11200000.usb: xHCI Host Controller
5806 00:39:43.130856 <6>[ 1.006372] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5807 00:39:43.137092 <6>[ 1.006378] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5808 00:39:43.140763 <6>[ 1.006681] hub 1-0:1.0: USB hub found
5809 00:39:43.144217 <6>[ 1.006696] hub 1-0:1.0: 1 port detected
5810 00:39:43.153687 <6>[ 1.007833] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5811 00:39:43.157030 <6>[ 1.008080] hub 2-0:1.0: USB hub found
5812 00:39:43.164089 <3>[ 1.008093] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5813 00:39:43.171021 <6>[ 1.008574] usbcore: registered new interface driver usb-storage
5814 00:39:43.177488 <6>[ 1.008870] usbcore: registered new device driver onboard-usb-hub
5815 00:39:43.184155 <4>[ 1.009164] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
5816 00:39:43.704963 <6>[ 1.012727] mt6397-rtc mt6358-rtc: registered as rtc0
5817 00:39:43.714876 <6>[ 1.012877] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-05T00:39:42 UTC (1717547982)
5818 00:39:43.718346 <6>[ 1.013733] i2c_dev: i2c /dev entries driver
5819 00:39:43.728251 <6>[ 1.015566] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5820 00:39:43.734994 <6>[ 1.015610] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5821 00:39:43.741282 <6>[ 1.015643] i2c 4-0058: Fixed dependency cycle(s) with /panel
5822 00:39:43.748403 <6>[ 1.015670] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
5823 00:39:43.758144 <3>[ 1.016159] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
5824 00:39:43.764577 <6>[ 1.025248] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
5825 00:39:43.768097 <6>[ 1.028587] cpu cpu0: EM: created perf domain
5826 00:39:43.781452 <6>[ 1.029406] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
5827 00:39:43.785119 <6>[ 1.029629] cpu cpu4: EM: created perf domain
5828 00:39:43.791234 <6>[ 1.034447] sdhci: Secure Digital Host Controller Interface driver
5829 00:39:43.794728 <6>[ 1.034453] sdhci: Copyright(c) Pierre Ossman
5830 00:39:43.801694 <6>[ 1.035164] Synopsys Designware Multimedia Card Interface Driver
5831 00:39:43.808122 <6>[ 1.035643] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
5832 00:39:43.814879 <6>[ 1.036177] sdhci-pltfm: SDHCI platform and OF driver helper
5833 00:39:43.821331 <6>[ 1.037978] ledtrig-cpu: registered to indicate activity on CPUs
5834 00:39:43.824697 <6>[ 1.039473] usbcore: registered new interface driver usbhid
5835 00:39:43.831579 <6>[ 1.039478] usbhid: USB HID core driver
5836 00:39:43.838344 <6>[ 1.039679] spi_master spi2: will run message pump with realtime priority
5837 00:39:43.844387 <4>[ 1.039909] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
5838 00:39:43.851140 <4>[ 1.040025] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
5839 00:39:43.864123 <6>[ 1.052975] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
5840 00:39:43.877553 <6>[ 1.055144] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
5841 00:39:43.884240 <6>[ 1.056137] cros-ec-spi spi2.0: Chrome EC device registered
5842 00:39:43.890677 <4>[ 1.105345] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
5843 00:39:43.900975 <6>[ 1.110654] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
5844 00:39:43.907594 <4>[ 1.112771] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
5845 00:39:43.917546 <6>[ 1.113561] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5846 00:39:43.924454 <6>[ 1.114516] NET: Registered PF_PACKET protocol family
5847 00:39:43.927592 <6>[ 1.114579] 9pnet: Installing 9P2000 support
5848 00:39:43.930662 <5>[ 1.114606] Key type dns_resolver registered
5849 00:39:43.937096 <6>[ 1.114957] registered taskstats version 1
5850 00:39:43.940901 <5>[ 1.114966] Loading compiled-in X.509 certificates
5851 00:39:43.950515 <4>[ 1.116339] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
5852 00:39:43.954108 <4>[ 1.116976] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
5853 00:39:43.960330 <6>[ 1.120743] mmc1: new ultra high speed SDR104 SDIO card at address 0001
5854 00:39:43.967032 <6>[ 1.142882] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
5855 00:39:43.973619 <6>[ 1.143150] mmc0: new HS400 MMC card at address 0001
5856 00:39:43.977036 <6>[ 1.143762] mmcblk0: mmc0:0001 TB2932 29.2 GiB
5857 00:39:43.986755 <3>[ 1.143868] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
5858 00:39:43.993388 <6>[ 1.146228] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
5859 00:39:43.997146 <6>[ 1.147147] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
5860 00:39:44.003527 <6>[ 1.148365] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
5861 00:39:44.010080 <6>[ 1.149273] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
5862 00:39:44.020308 <4>[ 1.163771] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
5863 00:39:44.030065 <6>[ 1.164395] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
5864 00:39:44.039929 <6>[ 1.167046] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5865 00:39:44.053403 <3>[ 1.167521] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
5866 00:39:44.066658 <6>[ 1.186277] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input3
5867 00:39:44.072862 <6>[ 1.186755] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
5868 00:39:44.086264 <3>[ 1.200922] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
5869 00:39:44.093242 <3>[ 1.201813] debugfs: File 'Playback' in directory 'dapm' already present!
5870 00:39:44.099527 <3>[ 1.201821] debugfs: File 'Capture' in directory 'dapm' already present!
5871 00:39:44.109513 <6>[ 1.204373] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input2
5872 00:39:44.119719 <6>[ 1.208404] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
5873 00:39:44.129191 <6>[ 1.208424] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
5874 00:39:44.136284 <6>[ 1.208431] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
5875 00:39:44.145893 <6>[ 1.208437] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
5876 00:39:44.152684 <6>[ 1.208443] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
5877 00:39:44.162833 <6>[ 1.208449] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
5878 00:39:44.169555 <6>[ 1.208456] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
5879 00:39:44.176105 <6>[ 1.209249] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
5880 00:39:44.182569 <6>[ 1.210498] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
5881 00:39:44.189176 <6>[ 1.211409] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
5882 00:39:44.195979 <6>[ 1.212202] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
5883 00:39:44.202846 <6>[ 1.212936] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
5884 00:39:44.209290 <6>[ 1.214916] panfrost 13040000.gpu: clock rate = 511999970
5885 00:39:44.219252 <6>[ 1.214935] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
5886 00:39:44.226065 <6>[ 1.215458] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
5887 00:39:44.236017 <6>[ 1.215463] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
5888 00:39:44.245735 <6>[ 1.215468] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
5889 00:39:44.252293 <6>[ 1.215474] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
5890 00:39:44.262861 <6>[ 1.217569] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
5891 00:39:44.272346 <6>[ 1.218900] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
5892 00:39:44.278909 <6>[ 1.218918] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
5893 00:39:44.288849 <6>[ 1.218925] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
5894 00:39:44.298537 <6>[ 1.218932] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
5895 00:39:44.308608 <6>[ 1.218939] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
5896 00:39:44.318422 <6>[ 1.218946] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
5897 00:39:44.325431 <6>[ 1.218954] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
5898 00:39:44.334960 <6>[ 1.218961] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
5899 00:39:44.344639 <6>[ 1.218968] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
5900 00:39:44.354670 <6>[ 1.284336] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
5901 00:39:44.364971 <6>[ 1.284510] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
5902 00:39:44.371483 <6>[ 1.285701] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
5903 00:39:44.378264 <6>[ 1.429698] usb 1-1: new high-speed USB device number 2 using xhci-mtk
5904 00:39:44.381694 <6>[ 1.582260] hub 1-1:1.0: USB hub found
5905 00:39:44.388210 <6>[ 1.582798] hub 1-1:1.0: 3 ports detected
5906 00:39:44.395214 <6>[ 1.959291] Console: switching to colour frame buffer device 170x48
5907 00:39:44.401654 <6>[ 1.975834] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
5908 00:39:44.407918 <6>[ 1.983635] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input5
5909 00:39:44.418086 <6>[ 1.984268] input: volume-buttons as /devices/platform/volume-buttons/input/input6
5910 00:39:44.424524 <6>[ 2.269724] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
5911 00:39:44.431253 <6>[ 2.466158] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
5912 00:39:44.440924 <4>[ 2.590275] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
5913 00:39:44.451431 <4>[ 2.590292] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
5914 00:39:44.454541 <6>[ 2.635614] r8152 1-1.2:1.0 eth0: v1.12.13
5915 00:39:44.460885 <6>[ 2.721835] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
5916 00:39:46.213457 <6>[ 4.482777] r8152 1-1.2:1.0 eth0: carrier on
5917 00:39:47.349791 <5>[ 4.505720] Sending DHCP requests .
5918 00:39:47.356942 <3>[ 5.622091] DHCP/BOOTP: Reply not for us on eth0, op[2] xid[6596b4e5]
5919 00:39:47.363184 <3>[ 5.626040] DHCP/BOOTP: Reply not for us on eth0, op[2] xid[6596b4e5]
5920 00:39:49.154943 <4>[ 7.405713] ., OK
5921 00:39:49.164927 <6>[ 7.421758] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23
5922 00:39:49.168390 <6>[ 7.421773] IP-Config: Complete:
5923 00:39:49.178442 <6>[ 7.421775] device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1
5924 00:39:49.188683 <6>[ 7.421788] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)
5925 00:39:49.195034 <6>[ 7.421795] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
5926 00:39:49.201468 Starting syslogd<6>[ 7.421802] nameserver0=192.168.201.1
5927 00:39:49.205094 : OK<6>[ 7.422112] clk: Disabling unused clocks
5928 00:39:49.205179
5929 00:39:49.211394 Starting klogd<6>[ 7.422915] ALSA device list:
5930 00:39:49.211480 : OK
5931 00:39:49.214694 <6>[ 7.422922] #0: mt8183_mt6358_ts3a227_max98357
5932 00:39:49.221775 Running sysctl: <6>[ 7.429479] Freeing unused kernel memory: 8512K
5933 00:39:49.221862 OK
5934 00:39:49.224728 <6>[ 7.429645] Run /init as init process
5935 00:39:49.237741 Populating /dev using udev: <30>[ 7.505953] udevd[210]: starting version 3.2.9
5936 00:39:49.244765 <27>[ 7.507942] udevd[210]: specified user 'tss' unknown
5937 00:39:49.247581 <27>[ 7.507968] udevd[210]: specified group 'tss' unknown
5938 00:39:49.254465 <30>[ 7.509166] udevd[211]: starting eudev-3.2.9
5939 00:39:49.261908 <27>[ 7.533629] udevd[211]: specified user 'tss' unknown
5940 00:39:49.268388 <27>[ 7.533792] udevd[211]: specified group 'tss' unknown
5941 00:39:49.413445 <3>[ 7.681617] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
5942 00:39:49.423248 <3>[ 7.681632] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
5943 00:39:49.433284 <3>[ 7.681637] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
5944 00:39:49.440271 <3>[ 7.681643] elan_i2c 2-0015: Error applying setting, reverse things back
5945 00:39:49.446381 <4>[ 7.710118] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
5946 00:39:49.456271 <4>[ 7.710421] elants_i2c 0-0010: supply vccio not found, using dummy regulator
5947 00:39:49.459670 <3>[ 7.728296] thermal_sys: Failed to find 'trips' node
5948 00:39:49.466201 <3>[ 7.728303] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
5949 00:39:49.476136 <3>[ 7.728309] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
5950 00:39:49.483240 <4>[ 7.728313] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
5951 00:39:49.489569 <3>[ 7.729548] thermal_sys: Failed to find 'trips' node
5952 00:39:49.496484 <3>[ 7.729552] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
5953 00:39:49.506385 <3>[ 7.729558] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
5954 00:39:49.512936 <4>[ 7.729561] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
5955 00:39:49.524003 <6>[ 7.734040] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
5956 00:39:49.530573 <5>[ 7.746534] cfg80211: Loading compiled-in X.509 certificates for regulatory database
5957 00:39:49.540035 <3>[ 7.753733] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5958 00:39:49.546862 <3>[ 7.753757] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5959 00:39:49.556521 <3>[ 7.753765] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5960 00:39:49.563381 <3>[ 7.753876] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5961 00:39:49.573575 <3>[ 7.753885] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5962 00:39:49.583100 <3>[ 7.753893] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5963 00:39:49.590058 <3>[ 7.753902] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5964 00:39:49.599658 <3>[ 7.753909] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5965 00:39:49.606544 <3>[ 7.753944] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
5966 00:39:49.613051 <6>[ 7.754108] mc: Linux media interface: v0.10
5967 00:39:49.619791 <5>[ 7.765297] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
5968 00:39:49.626338 <5>[ 7.766358] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
5969 00:39:49.636575 <4>[ 7.766423] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
5970 00:39:49.640005 <6>[ 7.766430] cfg80211: failed to load regulatory.db
5971 00:39:49.646318 <6>[ 7.792073] videodev: Linux video capture interface: v2.00
5972 00:39:49.653144 <6>[ 7.801027] cs_system_cfg: CoreSight Configuration manager initialised
5973 00:39:49.663163 <6>[ 7.808437] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
5974 00:39:49.669860 <6>[ 7.808528] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
5975 00:39:49.676243 <6>[ 7.808582] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
5976 00:39:49.686091 <6>[ 7.808635] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
5977 00:39:49.692896 <6>[ 7.816564] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
5978 00:39:49.702534 <6>[ 7.816685] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
5979 00:39:49.709448 <6>[ 7.816766] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
5980 00:39:49.716236 <6>[ 7.816826] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
5981 00:39:49.725935 <6>[ 7.861713] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
5982 00:39:49.732391 <3>[ 7.891380] mtk-scp 10500000.scp: invalid resource
5983 00:39:49.739169 <6>[ 7.891455] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
5984 00:39:49.742506 <6>[ 7.905961] remoteproc remoteproc0: scp is available
5985 00:39:49.753181 <4>[ 7.906062] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
5986 00:39:49.756330 <6>[ 7.906071] remoteproc remoteproc0: powering up scp
5987 00:39:49.766458 <4>[ 7.906094] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
5988 00:39:49.773228 <3>[ 7.906099] remoteproc remoteproc0: request_firmware failed: -2
5989 00:39:49.776636 <6>[ 7.906641] Bluetooth: Core ver 2.22
5990 00:39:49.783434 <6>[ 7.906685] NET: Registered PF_BLUETOOTH protocol family
5991 00:39:49.789733 <6>[ 7.906687] Bluetooth: HCI device and connection manager initialized
5992 00:39:49.793105 <6>[ 7.906700] Bluetooth: HCI socket layer initialized
5993 00:39:49.800143 <6>[ 7.906704] Bluetooth: L2CAP socket layer initialized
5994 00:39:49.803229 <6>[ 7.906712] Bluetooth: SCO socket layer initialized
5995 00:39:49.809717 <6>[ 7.956309] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
5996 00:39:49.816648 <6>[ 7.962706] Bluetooth: HCI UART driver ver 2.3
5997 00:39:49.820139 <6>[ 7.962713] Bluetooth: HCI UART protocol H4 registered
5998 00:39:49.826874 <6>[ 7.962750] Bluetooth: HCI UART protocol LL registered
5999 00:39:49.833225 <6>[ 7.962762] Bluetooth: HCI UART protocol Three-wire (H5) registered
6000 00:39:49.839783 <6>[ 7.963078] Bluetooth: HCI UART protocol Broadcom registered
6001 00:39:49.842875 <6>[ 7.963113] Bluetooth: HCI UART protocol QCA registered
6002 00:39:49.849482 <6>[ 7.963126] Bluetooth: HCI UART protocol Marvell registered
6003 00:39:49.855978 <6>[ 7.963868] Bluetooth: hci0: setting up ROME/QCA6390
6004 00:39:49.862837 <6>[ 7.971196] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6005 00:39:49.866682 <6>[ 7.971263] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6006 00:39:49.878872 <6>[ 7.971800] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6007 00:39:49.885342 <6>[ 7.972272] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6008 00:39:49.895151 <6>[ 7.974853] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6009 00:39:49.901529 <6>[ 7.975238] usbcore: registered new interface driver uvcvideo
6010 00:39:49.911646 <6>[ 7.982462] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6011 00:39:49.918115 <6>[ 7.982476] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6012 00:39:49.931605 <6>[ 7.982875] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6013 00:39:49.938466 <6>[ 8.131468] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6014 00:39:49.948296 <4>[ 8.141231] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6015 00:39:49.951748 <4>[ 8.141231] Fallback method does not support PEC.
6016 00:39:49.961437 <3>[ 8.146749] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6017 00:39:49.968278 <3>[ 8.154381] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6018 00:39:49.975107 <3>[ 8.177304] Bluetooth: hci0: Frame reassembly failed (-84)
6019 00:39:50.027159 done
6020 00:39:50.034613 Saving random seed: OK
6021 00:39:50.044485 Starting network: ip: RTNETLINK answers: File exists
6022 00:39:50.047492 FAIL
6023 00:39:50.093485 Starting dropbear sshd: <6>[ 8.363032] NET: Registered PF_INET6 protocol family
6024 00:39:50.096570 <6>[ 8.364100] Segment Routing with IPv6
6025 00:39:50.096664 OK
6026 00:39:50.102888 <6>[ 8.364114] In-situ OAM (IOAM) with IPv6
6027 00:39:50.106129 /bin/sh: can't access tty; job control turned off
6028 00:39:50.106453 Matched prompt #10: / #
6030 00:39:50.106658 Setting prompt string to ['/ #']
6031 00:39:50.106751 end: 2.2.5.1 login-action (duration 00:00:09) [common]
6033 00:39:50.106955 end: 2.2.5 auto-login-action (duration 00:00:09) [common]
6034 00:39:50.107074 start: 2.2.6 expect-shell-connection (timeout 00:03:58) [common]
6035 00:39:50.107145 Setting prompt string to ['/ #']
6036 00:39:50.107206 Forcing a shell prompt, looking for ['/ #']
6038 00:39:50.157421 / #
6039 00:39:50.157571 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6040 00:39:50.157683 Waiting using forced prompt support (timeout 00:02:30)
6041 00:39:50.162495
6042 00:39:50.162783 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6043 00:39:50.162886 start: 2.2.7 export-device-env (timeout 00:03:58) [common]
6044 00:39:50.162983 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6045 00:39:50.163074 end: 2.2 depthcharge-retry (duration 00:01:02) [common]
6046 00:39:50.163159 end: 2 depthcharge-action (duration 00:01:02) [common]
6047 00:39:50.163247 start: 3 lava-test-retry (timeout 00:01:00) [common]
6048 00:39:50.163334 start: 3.1 lava-test-shell (timeout 00:01:00) [common]
6049 00:39:50.163412 Using namespace: common
6051 00:39:50.263755 / # #
6052 00:39:50.263922 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:01:00)
6053 00:39:50.264041 <6>[ 8.456019] Bluetooth: hci0: QCA Product ID :0x00000008
6054 00:39:50.264113 <6>[ 8.456031] Bluetooth: hci0: QCA SOC Version :0x00000044
6055 00:39:50.264176 <6>[ 8.456034] Bluetooth: hci0: QCA ROM Version :0x00000302
6056 00:39:50.264238 <6>[ 8.456036] Bluetooth: hci0: QCA Patch Version:0x00000111
6057 00:39:50.264297 <6>[ 8.456039] Bluetooth: hci0: QCA controller version 0x00440302
6058 00:39:50.264356 <6>[ 8.456043] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6059 00:39:50.264415 <4>[ 8.456090] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6060 00:39:50.264474 <3>[ 8.456098] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6061 00:39:50.264532 <3>[ 8.456101] Bluetooth: hci0: QCA Failed to download patch (-2)
6062 00:39:50.264590 <6>[ 8.490768] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6063 00:39:50.269413 #
6064 00:39:50.269680 Using /lava-14173524
6066 00:39:50.369995 / # export SHELL=/bin/sh
6067 00:39:50.370208 <4>[ 8.561531] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6068 00:39:50.370286 <4>[ 8.570395] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6069 00:39:50.370354 <4>[ 8.573596] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6070 00:39:50.370417 <4>[ 8.574607] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6071 00:39:50.375480 export SHELL=/bin/sh
6073 00:39:50.475979 / # . /lava-14173524/environment
6074 00:39:50.481028 . /lava-14173524/environment
6076 00:39:50.581607 / # /lava-14173524/bin/lava-test-runner /lava-14173524/0
6077 00:39:50.581734 Test shell timeout: 10s (minimum of the action and connection timeout)
6078 00:39:50.586329 /lava-14173524/bin/lava-test-runner /lava-14173524/0
6079 00:39:50.610566 + export 'TESTRUN_ID=0_dmesg'
6080 00:39:50.620317 + cd /lava-14173524<8>[ 8.889377] <LAVA_SIGNAL_STARTRUN 0_dmesg 14173524_1.5.2.3.1>
6081 00:39:50.620445 /0/tests/0_dmesg
6082 00:39:50.620527 + cat uuid
6083 00:39:50.620769 Received signal: <STARTRUN> 0_dmesg 14173524_1.5.2.3.1
6084 00:39:50.620841 Starting test lava.0_dmesg (14173524_1.5.2.3.1)
6085 00:39:50.620939 Skipping test definition patterns.
6086 00:39:50.623776 + UUID=14173524_1.5.2.3.1
6087 00:39:50.623862 + set +x
6088 00:39:50.630397 + KERNELCI_LAVA=y /bin/sh /opt/kernelci/dmesg.sh
6089 00:39:50.641123 <8>[ 8.905891] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0>
6090 00:39:50.641412 Received signal: <TESTCASE> TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0
6092 00:39:50.652926 <8>[ 8.919325] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0>
6093 00:39:50.653186 Received signal: <TESTCASE> TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0
6095 00:39:50.659432 + set +x
6096 00:39:50.659690 ok: lava_test_shell seems to have completed
6097 00:39:50.659768 Marking unfinished test run as failed
6099 00:39:50.659955 alert: pass
crit: pass
6100 00:39:50.660041 end: 3.1 lava-test-shell (duration 00:00:00) [common]
6101 00:39:50.660142 end: 3 lava-test-retry (duration 00:00:00) [common]
6102 00:39:50.660230 start: 4 finalize (timeout 00:08:38) [common]
6103 00:39:50.660319 start: 4.1 power-off (timeout 00:00:30) [common]
6104 00:39:50.660475 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
6105 00:39:51.831082 >> Command sent successfully.
6106 00:39:51.833738 Returned 0 in 1 seconds
6107 00:39:51.934203 end: 4.1 power-off (duration 00:00:01) [common]
6109 00:39:51.934517 start: 4.2 read-feedback (timeout 00:08:37) [common]
6113 00:39:51.935229 Listened to connection for namespace 'common' for up to 1s
6114 00:39:52.935708 Finalising connection for namespace 'common'
6115 00:39:52.935908 Disconnecting from shell: Finalise
6116 00:39:53.036266 end: 4.2 read-feedback (duration 00:00:01) [common]
6117 00:39:53.036451 end: 4 finalize (duration 00:00:02) [common]
6118 00:39:53.036567 Cleaning after the job
6119 00:39:53.036678 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14173524/tftp-deploy-e3uml72i/ramdisk
6120 00:39:53.039201 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14173524/tftp-deploy-e3uml72i/kernel
6121 00:39:53.046546 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14173524/tftp-deploy-e3uml72i/dtb
6122 00:39:53.046719 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14173524/tftp-deploy-e3uml72i/modules
6123 00:39:53.052397 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14173524
6124 00:39:53.094112 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14173524
6125 00:39:53.094292 Job finished correctly