Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 37
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 81
1 00:38:33.014936 lava-dispatcher, installed at version: 2024.03
2 00:38:33.015168 start: 0 validate
3 00:38:33.015312 Start time: 2024-06-05 00:38:33.015303+00:00 (UTC)
4 00:38:33.015456 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:38:33.015604 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 00:38:33.274526 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:38:33.274714 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-168-g96fd74998d4ca%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 00:38:58.033773 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:38:58.034497 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-168-g96fd74998d4ca%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 00:38:58.295632 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:38:58.296291 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-168-g96fd74998d4ca%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 00:39:01.551215 validate duration: 28.54
14 00:39:01.551520 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 00:39:01.551641 start: 1.1 download-retry (timeout 00:10:00) [common]
16 00:39:01.551744 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 00:39:01.551881 Not decompressing ramdisk as can be used compressed.
18 00:39:01.551975 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 00:39:01.552049 saving as /var/lib/lava/dispatcher/tmp/14173469/tftp-deploy-jo3367m1/ramdisk/rootfs.cpio.gz
20 00:39:01.552120 total size: 47897469 (45 MB)
21 00:39:01.553285 progress 0 % (0 MB)
22 00:39:01.567131 progress 5 % (2 MB)
23 00:39:01.580751 progress 10 % (4 MB)
24 00:39:01.594586 progress 15 % (6 MB)
25 00:39:01.609309 progress 20 % (9 MB)
26 00:39:01.623435 progress 25 % (11 MB)
27 00:39:01.637634 progress 30 % (13 MB)
28 00:39:01.651361 progress 35 % (16 MB)
29 00:39:01.665159 progress 40 % (18 MB)
30 00:39:01.679312 progress 45 % (20 MB)
31 00:39:01.693285 progress 50 % (22 MB)
32 00:39:01.707622 progress 55 % (25 MB)
33 00:39:01.721864 progress 60 % (27 MB)
34 00:39:01.735378 progress 65 % (29 MB)
35 00:39:01.749046 progress 70 % (32 MB)
36 00:39:01.762710 progress 75 % (34 MB)
37 00:39:01.776937 progress 80 % (36 MB)
38 00:39:01.791247 progress 85 % (38 MB)
39 00:39:01.807383 progress 90 % (41 MB)
40 00:39:01.822041 progress 95 % (43 MB)
41 00:39:01.835254 progress 100 % (45 MB)
42 00:39:01.835529 45 MB downloaded in 0.28 s (161.18 MB/s)
43 00:39:01.835701 end: 1.1.1 http-download (duration 00:00:00) [common]
45 00:39:01.835973 end: 1.1 download-retry (duration 00:00:00) [common]
46 00:39:01.836069 start: 1.2 download-retry (timeout 00:10:00) [common]
47 00:39:01.836164 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 00:39:01.836310 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-168-g96fd74998d4ca/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 00:39:01.836387 saving as /var/lib/lava/dispatcher/tmp/14173469/tftp-deploy-jo3367m1/kernel/Image
50 00:39:01.836487 total size: 54682112 (52 MB)
51 00:39:01.836561 No compression specified
52 00:39:01.837801 progress 0 % (0 MB)
53 00:39:01.853224 progress 5 % (2 MB)
54 00:39:01.868559 progress 10 % (5 MB)
55 00:39:01.884407 progress 15 % (7 MB)
56 00:39:01.903315 progress 20 % (10 MB)
57 00:39:01.922447 progress 25 % (13 MB)
58 00:39:01.937848 progress 30 % (15 MB)
59 00:39:01.953483 progress 35 % (18 MB)
60 00:39:01.968901 progress 40 % (20 MB)
61 00:39:01.984436 progress 45 % (23 MB)
62 00:39:02.000019 progress 50 % (26 MB)
63 00:39:02.015382 progress 55 % (28 MB)
64 00:39:02.030955 progress 60 % (31 MB)
65 00:39:02.046254 progress 65 % (33 MB)
66 00:39:02.061775 progress 70 % (36 MB)
67 00:39:02.077005 progress 75 % (39 MB)
68 00:39:02.092544 progress 80 % (41 MB)
69 00:39:02.107861 progress 85 % (44 MB)
70 00:39:02.123154 progress 90 % (46 MB)
71 00:39:02.138541 progress 95 % (49 MB)
72 00:39:02.153604 progress 100 % (52 MB)
73 00:39:02.153895 52 MB downloaded in 0.32 s (164.30 MB/s)
74 00:39:02.154064 end: 1.2.1 http-download (duration 00:00:00) [common]
76 00:39:02.154319 end: 1.2 download-retry (duration 00:00:00) [common]
77 00:39:02.154413 start: 1.3 download-retry (timeout 00:09:59) [common]
78 00:39:02.154505 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 00:39:02.154651 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-168-g96fd74998d4ca/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 00:39:02.154732 saving as /var/lib/lava/dispatcher/tmp/14173469/tftp-deploy-jo3367m1/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 00:39:02.154798 total size: 57695 (0 MB)
82 00:39:02.154864 No compression specified
83 00:39:02.156096 progress 56 % (0 MB)
84 00:39:02.156400 progress 100 % (0 MB)
85 00:39:02.156623 0 MB downloaded in 0.00 s (30.21 MB/s)
86 00:39:02.156759 end: 1.3.1 http-download (duration 00:00:00) [common]
88 00:39:02.157008 end: 1.3 download-retry (duration 00:00:00) [common]
89 00:39:02.157103 start: 1.4 download-retry (timeout 00:09:59) [common]
90 00:39:02.157201 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 00:39:02.157354 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-168-g96fd74998d4ca/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 00:39:02.157432 saving as /var/lib/lava/dispatcher/tmp/14173469/tftp-deploy-jo3367m1/modules/modules.tar
93 00:39:02.157499 total size: 8605984 (8 MB)
94 00:39:02.157567 Using unxz to decompress xz
95 00:39:02.161922 progress 0 % (0 MB)
96 00:39:02.184701 progress 5 % (0 MB)
97 00:39:02.217077 progress 10 % (0 MB)
98 00:39:02.252758 progress 15 % (1 MB)
99 00:39:02.280820 progress 20 % (1 MB)
100 00:39:02.308776 progress 25 % (2 MB)
101 00:39:02.336890 progress 30 % (2 MB)
102 00:39:02.366122 progress 35 % (2 MB)
103 00:39:02.398066 progress 40 % (3 MB)
104 00:39:02.425127 progress 45 % (3 MB)
105 00:39:02.453753 progress 50 % (4 MB)
106 00:39:02.482527 progress 55 % (4 MB)
107 00:39:02.511294 progress 60 % (4 MB)
108 00:39:02.540496 progress 65 % (5 MB)
109 00:39:02.570144 progress 70 % (5 MB)
110 00:39:02.598556 progress 75 % (6 MB)
111 00:39:02.631581 progress 80 % (6 MB)
112 00:39:02.660887 progress 85 % (7 MB)
113 00:39:02.692059 progress 90 % (7 MB)
114 00:39:02.722754 progress 95 % (7 MB)
115 00:39:02.752935 progress 100 % (8 MB)
116 00:39:02.759306 8 MB downloaded in 0.60 s (13.64 MB/s)
117 00:39:02.759604 end: 1.4.1 http-download (duration 00:00:01) [common]
119 00:39:02.759922 end: 1.4 download-retry (duration 00:00:01) [common]
120 00:39:02.760028 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 00:39:02.760134 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 00:39:02.760225 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 00:39:02.760321 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 00:39:02.760595 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz
125 00:39:02.760743 makedir: /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin
126 00:39:02.760863 makedir: /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/tests
127 00:39:02.760998 makedir: /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/results
128 00:39:02.761137 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-add-keys
129 00:39:02.761320 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-add-sources
130 00:39:02.761478 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-background-process-start
131 00:39:02.761627 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-background-process-stop
132 00:39:02.761768 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-common-functions
133 00:39:02.761919 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-echo-ipv4
134 00:39:02.762062 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-install-packages
135 00:39:02.762201 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-installed-packages
136 00:39:02.762340 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-os-build
137 00:39:02.762480 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-probe-channel
138 00:39:02.762641 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-probe-ip
139 00:39:02.762780 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-target-ip
140 00:39:02.762918 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-target-mac
141 00:39:02.763070 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-target-storage
142 00:39:02.763237 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-test-case
143 00:39:02.763380 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-test-event
144 00:39:02.763542 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-test-feedback
145 00:39:02.763687 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-test-raise
146 00:39:02.763826 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-test-reference
147 00:39:02.763967 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-test-runner
148 00:39:02.764110 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-test-set
149 00:39:02.764265 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-test-shell
150 00:39:02.764410 Updating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-install-packages (oe)
151 00:39:02.764576 Updating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/bin/lava-installed-packages (oe)
152 00:39:02.764752 Creating /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/environment
153 00:39:02.764873 LAVA metadata
154 00:39:02.764970 - LAVA_JOB_ID=14173469
155 00:39:02.765058 - LAVA_DISPATCHER_IP=192.168.201.1
156 00:39:02.765179 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 00:39:02.765257 skipped lava-vland-overlay
158 00:39:02.765344 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 00:39:02.765435 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 00:39:02.765519 skipped lava-multinode-overlay
161 00:39:02.765601 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 00:39:02.765695 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 00:39:02.765779 Loading test definitions
164 00:39:02.765880 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 00:39:02.765964 Using /lava-14173469 at stage 0
166 00:39:02.766304 uuid=14173469_1.5.2.3.1 testdef=None
167 00:39:02.766403 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 00:39:02.766498 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 00:39:02.767114 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 00:39:02.767504 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 00:39:02.768207 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 00:39:02.768464 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 00:39:02.769123 runner path: /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/0/tests/0_igt-gpu-panfrost test_uuid 14173469_1.5.2.3.1
176 00:39:02.769301 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 00:39:02.769533 Creating lava-test-runner.conf files
179 00:39:02.769606 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14173469/lava-overlay-9vynb6hz/lava-14173469/0 for stage 0
180 00:39:02.769705 - 0_igt-gpu-panfrost
181 00:39:02.769813 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 00:39:02.769910 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 00:39:02.777823 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 00:39:02.777954 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 00:39:02.778054 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 00:39:02.778152 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 00:39:02.778250 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 00:39:04.811462 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:02) [common]
189 00:39:04.811880 start: 1.5.4 extract-modules (timeout 00:09:57) [common]
190 00:39:04.812012 extracting modules file /var/lib/lava/dispatcher/tmp/14173469/tftp-deploy-jo3367m1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14173469/extract-overlay-ramdisk-wpk4hyvu/ramdisk
191 00:39:05.070576 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 00:39:05.070753 start: 1.5.5 apply-overlay-tftp (timeout 00:09:56) [common]
193 00:39:05.070854 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14173469/compress-overlay-xb1juk3q/overlay-1.5.2.4.tar.gz to ramdisk
194 00:39:05.070937 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14173469/compress-overlay-xb1juk3q/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14173469/extract-overlay-ramdisk-wpk4hyvu/ramdisk
195 00:39:05.078588 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 00:39:05.078762 start: 1.5.6 configure-preseed-file (timeout 00:09:56) [common]
197 00:39:05.078898 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 00:39:05.079024 start: 1.5.7 compress-ramdisk (timeout 00:09:56) [common]
199 00:39:05.079142 Building ramdisk /var/lib/lava/dispatcher/tmp/14173469/extract-overlay-ramdisk-wpk4hyvu/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14173469/extract-overlay-ramdisk-wpk4hyvu/ramdisk
200 00:39:06.584882 >> 465931 blocks
201 00:39:13.566525 rename /var/lib/lava/dispatcher/tmp/14173469/extract-overlay-ramdisk-wpk4hyvu/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14173469/tftp-deploy-jo3367m1/ramdisk/ramdisk.cpio.gz
202 00:39:13.567014 end: 1.5.7 compress-ramdisk (duration 00:00:08) [common]
203 00:39:13.567156 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
204 00:39:13.567271 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
205 00:39:13.567397 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14173469/tftp-deploy-jo3367m1/kernel/Image']
206 00:39:28.446072 Returned 0 in 14 seconds
207 00:39:28.546762 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14173469/tftp-deploy-jo3367m1/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14173469/tftp-deploy-jo3367m1/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14173469/tftp-deploy-jo3367m1/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14173469/tftp-deploy-jo3367m1/kernel/image.itb
208 00:39:29.509943 output: FIT description: Kernel Image image with one or more FDT blobs
209 00:39:29.510359 output: Created: Wed Jun 5 01:39:29 2024
210 00:39:29.510445 output: Image 0 (kernel-1)
211 00:39:29.510518 output: Description:
212 00:39:29.510589 output: Created: Wed Jun 5 01:39:29 2024
213 00:39:29.510656 output: Type: Kernel Image
214 00:39:29.510722 output: Compression: lzma compressed
215 00:39:29.510787 output: Data Size: 13059919 Bytes = 12753.83 KiB = 12.45 MiB
216 00:39:29.510851 output: Architecture: AArch64
217 00:39:29.510912 output: OS: Linux
218 00:39:29.510972 output: Load Address: 0x00000000
219 00:39:29.511036 output: Entry Point: 0x00000000
220 00:39:29.511098 output: Hash algo: crc32
221 00:39:29.511160 output: Hash value: 4c96ec19
222 00:39:29.511222 output: Image 1 (fdt-1)
223 00:39:29.511287 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 00:39:29.511352 output: Created: Wed Jun 5 01:39:29 2024
225 00:39:29.511427 output: Type: Flat Device Tree
226 00:39:29.511490 output: Compression: uncompressed
227 00:39:29.511551 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 00:39:29.511612 output: Architecture: AArch64
229 00:39:29.511671 output: Hash algo: crc32
230 00:39:29.511730 output: Hash value: a9713552
231 00:39:29.511789 output: Image 2 (ramdisk-1)
232 00:39:29.511848 output: Description: unavailable
233 00:39:29.511907 output: Created: Wed Jun 5 01:39:29 2024
234 00:39:29.511967 output: Type: RAMDisk Image
235 00:39:29.512026 output: Compression: Unknown Compression
236 00:39:29.512085 output: Data Size: 60998763 Bytes = 59569.10 KiB = 58.17 MiB
237 00:39:29.512144 output: Architecture: AArch64
238 00:39:29.512203 output: OS: Linux
239 00:39:29.512262 output: Load Address: unavailable
240 00:39:29.512320 output: Entry Point: unavailable
241 00:39:29.512379 output: Hash algo: crc32
242 00:39:29.512437 output: Hash value: 393b3b33
243 00:39:29.512496 output: Default Configuration: 'conf-1'
244 00:39:29.512555 output: Configuration 0 (conf-1)
245 00:39:29.512614 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 00:39:29.512673 output: Kernel: kernel-1
247 00:39:29.512732 output: Init Ramdisk: ramdisk-1
248 00:39:29.512791 output: FDT: fdt-1
249 00:39:29.512849 output: Loadables: kernel-1
250 00:39:29.512908 output:
251 00:39:29.513138 end: 1.5.8.1 prepare-fit (duration 00:00:16) [common]
252 00:39:29.513252 end: 1.5.8 prepare-kernel (duration 00:00:16) [common]
253 00:39:29.513364 end: 1.5 prepare-tftp-overlay (duration 00:00:27) [common]
254 00:39:29.513468 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:32) [common]
255 00:39:29.513569 No LXC device requested
256 00:39:29.513675 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 00:39:29.513770 start: 1.7 deploy-device-env (timeout 00:09:32) [common]
258 00:39:29.513858 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 00:39:29.513939 Checking files for TFTP limit of 4294967296 bytes.
260 00:39:29.514494 end: 1 tftp-deploy (duration 00:00:28) [common]
261 00:39:29.514613 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 00:39:29.514714 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 00:39:29.514852 substitutions:
264 00:39:29.514928 - {DTB}: 14173469/tftp-deploy-jo3367m1/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 00:39:29.515000 - {INITRD}: 14173469/tftp-deploy-jo3367m1/ramdisk/ramdisk.cpio.gz
266 00:39:29.515066 - {KERNEL}: 14173469/tftp-deploy-jo3367m1/kernel/Image
267 00:39:29.515131 - {LAVA_MAC}: None
268 00:39:29.515195 - {PRESEED_CONFIG}: None
269 00:39:29.515258 - {PRESEED_LOCAL}: None
270 00:39:29.515320 - {RAMDISK}: 14173469/tftp-deploy-jo3367m1/ramdisk/ramdisk.cpio.gz
271 00:39:29.515382 - {ROOT_PART}: None
272 00:39:29.515477 - {ROOT}: None
273 00:39:29.515574 - {SERVER_IP}: 192.168.201.1
274 00:39:29.515669 - {TEE}: None
275 00:39:29.515734 Parsed boot commands:
276 00:39:29.515796 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 00:39:29.515997 Parsed boot commands: tftpboot 192.168.201.1 14173469/tftp-deploy-jo3367m1/kernel/image.itb 14173469/tftp-deploy-jo3367m1/kernel/cmdline
278 00:39:29.516099 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 00:39:29.516196 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 00:39:29.516299 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 00:39:29.516396 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 00:39:29.516473 Not connected, no need to disconnect.
283 00:39:29.516556 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 00:39:29.516649 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 00:39:29.516725 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
286 00:39:29.520716 Setting prompt string to ['lava-test: # ']
287 00:39:29.521123 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 00:39:29.521241 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 00:39:29.521351 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 00:39:29.521449 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 00:39:29.521646 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-0']
292 00:39:52.875590 Returned 0 in 23 seconds
293 00:39:52.976398 end: 2.2.2.1 pdu-reboot (duration 00:00:23) [common]
295 00:39:52.977727 end: 2.2.2 reset-device (duration 00:00:23) [common]
296 00:39:52.977969 start: 2.2.3 depthcharge-start (timeout 00:04:37) [common]
297 00:39:52.978171 Setting prompt string to 'Starting depthcharge on Juniper...'
298 00:39:52.978330 Changing prompt to 'Starting depthcharge on Juniper...'
299 00:39:52.978496 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 00:39:52.979381 [Enter `^Ec?' for help]
301 00:39:52.979593 [DL] 00000000 00000000 010701
302 00:39:52.979752
303 00:39:52.979902
304 00:39:52.980049 F0: 102B 0000
305 00:39:52.980191
306 00:39:52.980331 F3: 1006 0033 [0200]
307 00:39:52.980462
308 00:39:52.980591 F3: 4001 00E0 [0200]
309 00:39:52.980722
310 00:39:52.980852 F3: 0000 0000
311 00:39:52.980982
312 00:39:52.981109 V0: 0000 0000 [0001]
313 00:39:52.981237
314 00:39:52.981365 00: 1027 0002
315 00:39:52.981501
316 00:39:52.981626 01: 0000 0000
317 00:39:52.981763
318 00:39:52.981824 BP: 0C00 0251 [0000]
319 00:39:52.981884
320 00:39:52.981944 G0: 1182 0000
321 00:39:52.982004
322 00:39:52.982063 EC: 0004 0000 [0001]
323 00:39:52.982123
324 00:39:52.982183 S7: 0000 0000 [0000]
325 00:39:52.982243
326 00:39:52.982302 CC: 0000 0000 [0001]
327 00:39:52.982362
328 00:39:52.982421 T0: 0000 00DB [000F]
329 00:39:52.982483
330 00:39:52.982542 Jump to BL
331 00:39:52.982602
332 00:39:52.982662
333 00:39:52.982721
334 00:39:52.982781 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 00:39:52.982845 ARM64: Exception handlers installed.
336 00:39:52.982907 ARM64: Testing exception
337 00:39:52.982968 ARM64: Done test exception
338 00:39:52.983028 WDT: Last reset was cold boot
339 00:39:52.983087 SPI0(PAD0) initialized at 992727 Hz
340 00:39:52.983147 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 00:39:52.983208 Manufacturer: ef
342 00:39:52.983268 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 00:39:52.983328 Probing TPM: . done!
344 00:39:52.983388 TPM ready after 0 ms
345 00:39:52.983459 Connected to device vid:did:rid of 1ae0:0028:00
346 00:39:52.983521 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
347 00:39:52.983583 Initialized TPM device CR50 revision 0
348 00:39:52.983644 tlcl_send_startup: Startup return code is 0
349 00:39:52.983705 TPM: setup succeeded
350 00:39:52.983766 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 00:39:52.983827 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 00:39:52.983888 in-header: 03 19 00 00 08 00 00 00
353 00:39:52.983948 in-data: a2 e0 47 00 13 00 00 00
354 00:39:52.984008 Chrome EC: UHEPI supported
355 00:39:52.984068 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 00:39:52.984129 in-header: 03 a1 00 00 08 00 00 00
357 00:39:52.984210 in-data: 84 60 60 10 00 00 00 00
358 00:39:52.984272 Phase 1
359 00:39:52.984333 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 00:39:52.984395 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 00:39:52.984456 VB2:vb2_check_recovery() Recovery was requested manually
362 00:39:52.984516 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 00:39:52.984577 Recovery requested (1009000e)
364 00:39:52.984637 tlcl_extend: response is 0
365 00:39:52.984697 tlcl_extend: response is 0
366 00:39:52.984757
367 00:39:52.984817
368 00:39:52.984877 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 00:39:52.984938 ARM64: Exception handlers installed.
370 00:39:52.984998 ARM64: Testing exception
371 00:39:52.985058 ARM64: Done test exception
372 00:39:52.985118 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2004
373 00:39:52.985178 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 00:39:52.985239 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 00:39:52.985299 [RTC]rtc_get_frequency_meter,134: input=0xf, output=916
376 00:39:52.985359 [RTC]rtc_get_frequency_meter,134: input=0x7, output=779
377 00:39:52.985419 [RTC]rtc_get_frequency_meter,134: input=0xb, output=848
378 00:39:52.985487 [RTC]rtc_get_frequency_meter,134: input=0x9, output=815
379 00:39:52.985586 [RTC]rtc_get_frequency_meter,134: input=0x8, output=798
380 00:39:52.985681 [RTC]rtc_get_frequency_meter,134: input=0x7, output=778
381 00:39:52.985780 [RTC]rtc_get_frequency_meter,134: input=0x8, output=799
382 00:39:52.985846 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
383 00:39:52.985908 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
384 00:39:52.985969 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
385 00:39:52.986029 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
386 00:39:52.986089 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
387 00:39:52.986150 in-header: 03 19 00 00 08 00 00 00
388 00:39:52.986210 in-data: a2 e0 47 00 13 00 00 00
389 00:39:52.986271 Chrome EC: UHEPI supported
390 00:39:52.986331 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
391 00:39:52.986392 in-header: 03 a1 00 00 08 00 00 00
392 00:39:52.986452 in-data: 84 60 60 10 00 00 00 00
393 00:39:52.986512 Skip loading cached calibration data
394 00:39:52.986572 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
395 00:39:52.986633 in-header: 03 a1 00 00 08 00 00 00
396 00:39:52.986693 in-data: 84 60 60 10 00 00 00 00
397 00:39:52.986753 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
398 00:39:52.986813 in-header: 03 a1 00 00 08 00 00 00
399 00:39:52.986873 in-data: 84 60 60 10 00 00 00 00
400 00:39:52.986933 ADC[3]: Raw value=215860 ID=1
401 00:39:52.986992 Manufacturer: ef
402 00:39:52.987051 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
403 00:39:52.987111 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
404 00:39:52.987172 CBFS @ 21000 size 3d4000
405 00:39:52.987231 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
406 00:39:52.987291 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
407 00:39:52.987351 CBFS: Found @ offset 3c700 size 44
408 00:39:52.987419 DRAM-K: Full Calibration
409 00:39:52.987481 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
410 00:39:52.987542 CBFS @ 21000 size 3d4000
411 00:39:52.987602 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
412 00:39:52.987662 CBFS: Locating 'fallback/dram'
413 00:39:52.987722 CBFS: Found @ offset 24b00 size 12268
414 00:39:52.987782 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
415 00:39:52.987841 ddr_geometry: 1, config: 0x0
416 00:39:52.987904 header.status = 0x0
417 00:39:52.987963 header.magic = 0x44524d4b (expected: 0x44524d4b)
418 00:39:52.988024 header.version = 0x5 (expected: 0x5)
419 00:39:52.988278 header.size = 0x8f0 (expected: 0x8f0)
420 00:39:52.988347 header.config = 0x0
421 00:39:52.988408 header.flags = 0x0
422 00:39:52.988467 header.checksum = 0x0
423 00:39:52.988528 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
424 00:39:52.988589 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
425 00:39:52.988649 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
426 00:39:52.988709 ddr_geometry:1
427 00:39:52.988770 [EMI] new MDL number = 1
428 00:39:52.988830 dram_cbt_mode_extern: 0
429 00:39:52.988890 dram_cbt_mode [RK0]: 0, [RK1]: 0
430 00:39:52.988950 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
431 00:39:52.989011
432 00:39:52.989071
433 00:39:52.989130 [Bianco] ETT version 0.0.0.1
434 00:39:52.989191 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
435 00:39:52.989251
436 00:39:52.989310 vSetVcoreByFreq with vcore:762500, freq=1600
437 00:39:52.989372
438 00:39:52.989432 [DramcInit]
439 00:39:52.989492 AutoRefreshCKEOff AutoREF OFF
440 00:39:52.989551 DDRPhyPLLSetting-CKEOFF
441 00:39:52.989610 DDRPhyPLLSetting-CKEON
442 00:39:52.989669
443 00:39:52.989729 Enable WDQS
444 00:39:52.989789 [ModeRegInit_LP4] CH0 RK0
445 00:39:52.989849 Write Rank0 MR13 =0x18
446 00:39:52.989909 Write Rank0 MR12 =0x5d
447 00:39:52.989969 Write Rank0 MR1 =0x56
448 00:39:52.990028 Write Rank0 MR2 =0x1a
449 00:39:52.990087 Write Rank0 MR11 =0x0
450 00:39:52.990147 Write Rank0 MR22 =0x38
451 00:39:52.990206 Write Rank0 MR14 =0x5d
452 00:39:52.990266 Write Rank0 MR3 =0x30
453 00:39:52.990334 Write Rank0 MR13 =0x58
454 00:39:52.990403 Write Rank0 MR12 =0x5d
455 00:39:52.990463 Write Rank0 MR1 =0x56
456 00:39:52.990523 Write Rank0 MR2 =0x2d
457 00:39:52.990583 Write Rank0 MR11 =0x23
458 00:39:52.990644 Write Rank0 MR22 =0x34
459 00:39:52.990703 Write Rank0 MR14 =0x10
460 00:39:52.990763 Write Rank0 MR3 =0x30
461 00:39:52.990822 Write Rank0 MR13 =0xd8
462 00:39:52.990881 [ModeRegInit_LP4] CH0 RK1
463 00:39:52.990941 Write Rank1 MR13 =0x18
464 00:39:52.991001 Write Rank1 MR12 =0x5d
465 00:39:52.991060 Write Rank1 MR1 =0x56
466 00:39:52.991119 Write Rank1 MR2 =0x1a
467 00:39:52.991179 Write Rank1 MR11 =0x0
468 00:39:52.991239 Write Rank1 MR22 =0x38
469 00:39:52.991298 Write Rank1 MR14 =0x5d
470 00:39:52.991358 Write Rank1 MR3 =0x30
471 00:39:52.991428 Write Rank1 MR13 =0x58
472 00:39:52.991505 Write Rank1 MR12 =0x5d
473 00:39:52.991612 Write Rank1 MR1 =0x56
474 00:39:52.991679 Write Rank1 MR2 =0x2d
475 00:39:52.991740 Write Rank1 MR11 =0x23
476 00:39:52.991800 Write Rank1 MR22 =0x34
477 00:39:52.991860 Write Rank1 MR14 =0x10
478 00:39:52.991919 Write Rank1 MR3 =0x30
479 00:39:52.991977 Write Rank1 MR13 =0xd8
480 00:39:52.992037 [ModeRegInit_LP4] CH1 RK0
481 00:39:52.992096 Write Rank0 MR13 =0x18
482 00:39:52.992156 Write Rank0 MR12 =0x5d
483 00:39:52.992215 Write Rank0 MR1 =0x56
484 00:39:52.992274 Write Rank0 MR2 =0x1a
485 00:39:52.992334 Write Rank0 MR11 =0x0
486 00:39:52.992393 Write Rank0 MR22 =0x38
487 00:39:52.992453 Write Rank0 MR14 =0x5d
488 00:39:52.992512 Write Rank0 MR3 =0x30
489 00:39:52.992571 Write Rank0 MR13 =0x58
490 00:39:52.992630 Write Rank0 MR12 =0x5d
491 00:39:52.992688 Write Rank0 MR1 =0x56
492 00:39:52.992747 Write Rank0 MR2 =0x2d
493 00:39:52.992806 Write Rank0 MR11 =0x23
494 00:39:52.992865 Write Rank0 MR22 =0x34
495 00:39:52.992924 Write Rank0 MR14 =0x10
496 00:39:52.992984 Write Rank0 MR3 =0x30
497 00:39:52.993043 Write Rank0 MR13 =0xd8
498 00:39:52.993103 [ModeRegInit_LP4] CH1 RK1
499 00:39:52.993162 Write Rank1 MR13 =0x18
500 00:39:52.993221 Write Rank1 MR12 =0x5d
501 00:39:52.993281 Write Rank1 MR1 =0x56
502 00:39:52.993340 Write Rank1 MR2 =0x1a
503 00:39:52.993399 Write Rank1 MR11 =0x0
504 00:39:52.993458 Write Rank1 MR22 =0x38
505 00:39:52.993517 Write Rank1 MR14 =0x5d
506 00:39:52.993576 Write Rank1 MR3 =0x30
507 00:39:52.993635 Write Rank1 MR13 =0x58
508 00:39:52.993694 Write Rank1 MR12 =0x5d
509 00:39:52.993754 Write Rank1 MR1 =0x56
510 00:39:52.993813 Write Rank1 MR2 =0x2d
511 00:39:52.993873 Write Rank1 MR11 =0x23
512 00:39:52.993933 Write Rank1 MR22 =0x34
513 00:39:52.993993 Write Rank1 MR14 =0x10
514 00:39:52.994053 Write Rank1 MR3 =0x30
515 00:39:52.994112 Write Rank1 MR13 =0xd8
516 00:39:52.994171 match AC timing 3
517 00:39:52.994231 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
518 00:39:52.994292 [MiockJmeterHQA]
519 00:39:52.994352 vSetVcoreByFreq with vcore:762500, freq=1600
520 00:39:52.994412
521 00:39:52.994471 MIOCK jitter meter ch=0
522 00:39:52.994531
523 00:39:52.994590 1T = (102-17) = 85 dly cells
524 00:39:52.994652 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
525 00:39:52.994712 vSetVcoreByFreq with vcore:725000, freq=1200
526 00:39:52.994772
527 00:39:52.994830 MIOCK jitter meter ch=0
528 00:39:52.994890
529 00:39:52.994949 1T = (97-16) = 81 dly cells
530 00:39:52.995010 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps
531 00:39:52.995070 vSetVcoreByFreq with vcore:725000, freq=800
532 00:39:52.995130
533 00:39:52.995190 MIOCK jitter meter ch=0
534 00:39:52.995249
535 00:39:52.995308 1T = (97-16) = 81 dly cells
536 00:39:52.995369 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 771/100 ps
537 00:39:52.995442 vSetVcoreByFreq with vcore:762500, freq=1600
538 00:39:52.995504 vSetVcoreByFreq with vcore:762500, freq=1600
539 00:39:52.995564
540 00:39:52.995623 K DRVP
541 00:39:52.995682 1. OCD DRVP=0 CALOUT=0
542 00:39:52.995743 1. OCD DRVP=1 CALOUT=0
543 00:39:52.995804 1. OCD DRVP=2 CALOUT=0
544 00:39:52.995866 1. OCD DRVP=3 CALOUT=0
545 00:39:52.995926 1. OCD DRVP=4 CALOUT=0
546 00:39:52.995987 1. OCD DRVP=5 CALOUT=0
547 00:39:52.996047 1. OCD DRVP=6 CALOUT=0
548 00:39:52.996108 1. OCD DRVP=7 CALOUT=0
549 00:39:52.996190 1. OCD DRVP=8 CALOUT=0
550 00:39:52.996254 1. OCD DRVP=9 CALOUT=1
551 00:39:52.996315
552 00:39:52.996375 1. OCD DRVP calibration OK! DRVP=9
553 00:39:52.996436
554 00:39:52.996496
555 00:39:52.996556
556 00:39:52.996614 K ODTN
557 00:39:52.996674 3. OCD ODTN=0 ,CALOUT=1
558 00:39:52.996738 3. OCD ODTN=1 ,CALOUT=1
559 00:39:52.996799 3. OCD ODTN=2 ,CALOUT=1
560 00:39:52.996860 3. OCD ODTN=3 ,CALOUT=1
561 00:39:52.996921 3. OCD ODTN=4 ,CALOUT=1
562 00:39:52.996981 3. OCD ODTN=5 ,CALOUT=1
563 00:39:52.997043 3. OCD ODTN=6 ,CALOUT=1
564 00:39:52.997103 3. OCD ODTN=7 ,CALOUT=0
565 00:39:52.997163
566 00:39:52.997223 3. OCD ODTN calibration OK! ODTN=7
567 00:39:52.997284
568 00:39:52.997343 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
569 00:39:52.997403 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
570 00:39:52.997463 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
571 00:39:52.997523
572 00:39:52.997582 K DRVP
573 00:39:52.997642 1. OCD DRVP=0 CALOUT=0
574 00:39:52.997703 1. OCD DRVP=1 CALOUT=0
575 00:39:52.997763 1. OCD DRVP=2 CALOUT=0
576 00:39:52.997824 1. OCD DRVP=3 CALOUT=0
577 00:39:52.997884 1. OCD DRVP=4 CALOUT=0
578 00:39:52.997945 1. OCD DRVP=5 CALOUT=0
579 00:39:52.998006 1. OCD DRVP=6 CALOUT=0
580 00:39:52.998066 1. OCD DRVP=7 CALOUT=0
581 00:39:52.998127 1. OCD DRVP=8 CALOUT=0
582 00:39:52.998187 1. OCD DRVP=9 CALOUT=0
583 00:39:52.998440 1. OCD DRVP=10 CALOUT=0
584 00:39:52.998515 1. OCD DRVP=11 CALOUT=1
585 00:39:52.998578
586 00:39:52.998637 1. OCD DRVP calibration OK! DRVP=11
587 00:39:52.998700
588 00:39:52.998759
589 00:39:52.998819
590 00:39:52.998878 K ODTN
591 00:39:52.998938 3. OCD ODTN=0 ,CALOUT=1
592 00:39:52.998998 3. OCD ODTN=1 ,CALOUT=1
593 00:39:52.999060 3. OCD ODTN=2 ,CALOUT=1
594 00:39:52.999121 3. OCD ODTN=3 ,CALOUT=1
595 00:39:52.999182 3. OCD ODTN=4 ,CALOUT=1
596 00:39:52.999242 3. OCD ODTN=5 ,CALOUT=1
597 00:39:52.999304 3. OCD ODTN=6 ,CALOUT=1
598 00:39:52.999365 3. OCD ODTN=7 ,CALOUT=1
599 00:39:52.999433 3. OCD ODTN=8 ,CALOUT=1
600 00:39:52.999496 3. OCD ODTN=9 ,CALOUT=1
601 00:39:52.999556 3. OCD ODTN=10 ,CALOUT=1
602 00:39:52.999617 3. OCD ODTN=11 ,CALOUT=1
603 00:39:52.999677 3. OCD ODTN=12 ,CALOUT=1
604 00:39:52.999738 3. OCD ODTN=13 ,CALOUT=1
605 00:39:52.999799 3. OCD ODTN=14 ,CALOUT=1
606 00:39:52.999860 3. OCD ODTN=15 ,CALOUT=0
607 00:39:52.999920
608 00:39:52.999979 3. OCD ODTN calibration OK! ODTN=15
609 00:39:53.000041
610 00:39:53.000100 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
611 00:39:53.000160 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
612 00:39:53.000221 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
613 00:39:53.000281
614 00:39:53.000341 [DramcInit]
615 00:39:53.000409 AutoRefreshCKEOff AutoREF OFF
616 00:39:53.000471 DDRPhyPLLSetting-CKEOFF
617 00:39:53.000531 DDRPhyPLLSetting-CKEON
618 00:39:53.000590
619 00:39:53.000649 Enable WDQS
620 00:39:53.000708 ==
621 00:39:53.000767 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
622 00:39:53.000827 fsp= 1, odt_onoff= 1, Byte mode= 0
623 00:39:53.000887 ==
624 00:39:53.000947 [Duty_Offset_Calibration]
625 00:39:53.001006
626 00:39:53.001066 ===========================
627 00:39:53.001125 B0:1 B1:1 CA:1
628 00:39:53.001184 ==
629 00:39:53.001243 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
630 00:39:53.001303 fsp= 1, odt_onoff= 1, Byte mode= 0
631 00:39:53.001363 ==
632 00:39:53.001422 [Duty_Offset_Calibration]
633 00:39:53.001481
634 00:39:53.001540 ===========================
635 00:39:53.001599 B0:1 B1:0 CA:2
636 00:39:53.001659 [ModeRegInit_LP4] CH0 RK0
637 00:39:53.001717 Write Rank0 MR13 =0x18
638 00:39:53.001777 Write Rank0 MR12 =0x5d
639 00:39:53.001836 Write Rank0 MR1 =0x56
640 00:39:53.001895 Write Rank0 MR2 =0x1a
641 00:39:53.001954 Write Rank0 MR11 =0x0
642 00:39:53.002012 Write Rank0 MR22 =0x38
643 00:39:53.002071 Write Rank0 MR14 =0x5d
644 00:39:53.002130 Write Rank0 MR3 =0x30
645 00:39:53.002189 Write Rank0 MR13 =0x58
646 00:39:53.002248 Write Rank0 MR12 =0x5d
647 00:39:53.002307 Write Rank0 MR1 =0x56
648 00:39:53.002366 Write Rank0 MR2 =0x2d
649 00:39:53.002432 Write Rank0 MR11 =0x23
650 00:39:53.002515 Write Rank0 MR22 =0x34
651 00:39:53.002616 Write Rank0 MR14 =0x10
652 00:39:53.002678 Write Rank0 MR3 =0x30
653 00:39:53.002739 Write Rank0 MR13 =0xd8
654 00:39:53.002799 [ModeRegInit_LP4] CH0 RK1
655 00:39:53.002859 Write Rank1 MR13 =0x18
656 00:39:53.002918 Write Rank1 MR12 =0x5d
657 00:39:53.002977 Write Rank1 MR1 =0x56
658 00:39:53.003037 Write Rank1 MR2 =0x1a
659 00:39:53.003096 Write Rank1 MR11 =0x0
660 00:39:53.003155 Write Rank1 MR22 =0x38
661 00:39:53.003214 Write Rank1 MR14 =0x5d
662 00:39:53.003274 Write Rank1 MR3 =0x30
663 00:39:53.003332 Write Rank1 MR13 =0x58
664 00:39:53.003392 Write Rank1 MR12 =0x5d
665 00:39:53.003457 Write Rank1 MR1 =0x56
666 00:39:53.003517 Write Rank1 MR2 =0x2d
667 00:39:53.003576 Write Rank1 MR11 =0x23
668 00:39:53.003635 Write Rank1 MR22 =0x34
669 00:39:53.003694 Write Rank1 MR14 =0x10
670 00:39:53.003754 Write Rank1 MR3 =0x30
671 00:39:53.003814 Write Rank1 MR13 =0xd8
672 00:39:53.003873 [ModeRegInit_LP4] CH1 RK0
673 00:39:53.003932 Write Rank0 MR13 =0x18
674 00:39:53.003992 Write Rank0 MR12 =0x5d
675 00:39:53.004052 Write Rank0 MR1 =0x56
676 00:39:53.004111 Write Rank0 MR2 =0x1a
677 00:39:53.004170 Write Rank0 MR11 =0x0
678 00:39:53.004229 Write Rank0 MR22 =0x38
679 00:39:53.004288 Write Rank0 MR14 =0x5d
680 00:39:53.004346 Write Rank0 MR3 =0x30
681 00:39:53.004405 Write Rank0 MR13 =0x58
682 00:39:53.004465 Write Rank0 MR12 =0x5d
683 00:39:53.004524 Write Rank0 MR1 =0x56
684 00:39:53.004583 Write Rank0 MR2 =0x2d
685 00:39:53.004642 Write Rank0 MR11 =0x23
686 00:39:53.004702 Write Rank0 MR22 =0x34
687 00:39:53.004761 Write Rank0 MR14 =0x10
688 00:39:53.004820 Write Rank0 MR3 =0x30
689 00:39:53.004879 Write Rank0 MR13 =0xd8
690 00:39:53.004939 [ModeRegInit_LP4] CH1 RK1
691 00:39:53.004998 Write Rank1 MR13 =0x18
692 00:39:53.005057 Write Rank1 MR12 =0x5d
693 00:39:53.005116 Write Rank1 MR1 =0x56
694 00:39:53.005176 Write Rank1 MR2 =0x1a
695 00:39:53.005235 Write Rank1 MR11 =0x0
696 00:39:53.005294 Write Rank1 MR22 =0x38
697 00:39:53.005353 Write Rank1 MR14 =0x5d
698 00:39:53.005413 Write Rank1 MR3 =0x30
699 00:39:53.005472 Write Rank1 MR13 =0x58
700 00:39:53.005530 Write Rank1 MR12 =0x5d
701 00:39:53.005590 Write Rank1 MR1 =0x56
702 00:39:53.005648 Write Rank1 MR2 =0x2d
703 00:39:53.005708 Write Rank1 MR11 =0x23
704 00:39:53.005767 Write Rank1 MR22 =0x34
705 00:39:53.005826 Write Rank1 MR14 =0x10
706 00:39:53.005885 Write Rank1 MR3 =0x30
707 00:39:53.005945 Write Rank1 MR13 =0xd8
708 00:39:53.006005 match AC timing 3
709 00:39:53.006065 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
710 00:39:53.006125 DramC Write-DBI off
711 00:39:53.006185 DramC Read-DBI off
712 00:39:53.006244 Write Rank0 MR13 =0x59
713 00:39:53.006303 ==
714 00:39:53.006363 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
715 00:39:53.006424 fsp= 1, odt_onoff= 1, Byte mode= 0
716 00:39:53.006484 ==
717 00:39:53.006545 === u2Vref_new: 0x56 --> 0x2d
718 00:39:53.006605 === u2Vref_new: 0x58 --> 0x38
719 00:39:53.006664 === u2Vref_new: 0x5a --> 0x39
720 00:39:53.006723 === u2Vref_new: 0x5c --> 0x3c
721 00:39:53.006782 === u2Vref_new: 0x5e --> 0x3d
722 00:39:53.006842 === u2Vref_new: 0x60 --> 0xa0
723 00:39:53.006902 [CA 0] Center 34 (6~63) winsize 58
724 00:39:53.006962 [CA 1] Center 36 (9~63) winsize 55
725 00:39:53.007022 [CA 2] Center 29 (0~58) winsize 59
726 00:39:53.007082 [CA 3] Center 24 (-3~52) winsize 56
727 00:39:53.007141 [CA 4] Center 25 (-3~54) winsize 58
728 00:39:53.007201 [CA 5] Center 29 (0~59) winsize 60
729 00:39:53.007261
730 00:39:53.007320 [CATrainingPosCal] consider 1 rank data
731 00:39:53.007380 u2DelayCellTimex100 = 735/100 ps
732 00:39:53.007445 CA0 delay=34 (6~63),Diff = 10 PI (13 cell)
733 00:39:53.007506 CA1 delay=36 (9~63),Diff = 12 PI (15 cell)
734 00:39:53.007566 CA2 delay=29 (0~58),Diff = 5 PI (6 cell)
735 00:39:53.007626 CA3 delay=24 (-3~52),Diff = 0 PI (0 cell)
736 00:39:53.007686 CA4 delay=25 (-3~54),Diff = 1 PI (1 cell)
737 00:39:53.007746 CA5 delay=29 (0~59),Diff = 5 PI (6 cell)
738 00:39:53.007806
739 00:39:53.007866 CA PerBit enable=1, Macro0, CA PI delay=24
740 00:39:53.007925 === u2Vref_new: 0x5e --> 0x3d
741 00:39:53.007985
742 00:39:53.008046 Vref(ca) range 1: 30
743 00:39:53.008105
744 00:39:53.008165 CS Dly= 9 (40-0-32)
745 00:39:53.008224 Write Rank0 MR13 =0xd8
746 00:39:53.008284 Write Rank0 MR13 =0xd8
747 00:39:53.008343 Write Rank0 MR12 =0x5e
748 00:39:53.008609 Write Rank1 MR13 =0x59
749 00:39:53.008676 ==
750 00:39:53.008738 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
751 00:39:53.008799 fsp= 1, odt_onoff= 1, Byte mode= 0
752 00:39:53.008860 ==
753 00:39:53.008920 === u2Vref_new: 0x56 --> 0x2d
754 00:39:53.008980 === u2Vref_new: 0x58 --> 0x38
755 00:39:53.009040 === u2Vref_new: 0x5a --> 0x39
756 00:39:53.009100 === u2Vref_new: 0x5c --> 0x3c
757 00:39:53.009160 === u2Vref_new: 0x5e --> 0x3d
758 00:39:53.009220 === u2Vref_new: 0x60 --> 0xa0
759 00:39:53.009280 [CA 0] Center 36 (9~63) winsize 55
760 00:39:53.009340 [CA 1] Center 36 (9~63) winsize 55
761 00:39:53.009400 [CA 2] Center 31 (2~60) winsize 59
762 00:39:53.009459 [CA 3] Center 25 (-3~53) winsize 57
763 00:39:53.009519 [CA 4] Center 25 (-3~54) winsize 58
764 00:39:53.009579 [CA 5] Center 31 (2~61) winsize 60
765 00:39:53.009639
766 00:39:53.009699 [CATrainingPosCal] consider 2 rank data
767 00:39:53.009759 u2DelayCellTimex100 = 735/100 ps
768 00:39:53.009819 CA0 delay=36 (9~63),Diff = 12 PI (15 cell)
769 00:39:53.009879 CA1 delay=36 (9~63),Diff = 12 PI (15 cell)
770 00:39:53.009939 CA2 delay=30 (2~58),Diff = 6 PI (7 cell)
771 00:39:53.009998 CA3 delay=24 (-3~52),Diff = 0 PI (0 cell)
772 00:39:53.010058 CA4 delay=25 (-3~54),Diff = 1 PI (1 cell)
773 00:39:53.010118 CA5 delay=30 (2~59),Diff = 6 PI (7 cell)
774 00:39:53.010178
775 00:39:53.010238 CA PerBit enable=1, Macro0, CA PI delay=24
776 00:39:53.010298 === u2Vref_new: 0x5a --> 0x39
777 00:39:53.010358
778 00:39:53.010421 Vref(ca) range 1: 26
779 00:39:53.010480
780 00:39:53.010540 CS Dly= 7 (38-0-32)
781 00:39:53.010599 Write Rank1 MR13 =0xd8
782 00:39:53.010659 Write Rank1 MR13 =0xd8
783 00:39:53.010718 Write Rank1 MR12 =0x5a
784 00:39:53.010777 [RankSwap] Rank num 2, (Multi 1), Rank 0
785 00:39:53.010837 Write Rank0 MR2 =0xad
786 00:39:53.010896 [Write Leveling]
787 00:39:53.010955 delay byte0 byte1 byte2 byte3
788 00:39:53.011015
789 00:39:53.011074 10 0 0
790 00:39:53.011135 11 0 0
791 00:39:53.011195 12 0 0
792 00:39:53.011256 13 0 0
793 00:39:53.011316 14 0 0
794 00:39:53.011377 15 0 0
795 00:39:53.011444 16 0 0
796 00:39:53.011506 17 0 0
797 00:39:53.011566 18 0 0
798 00:39:53.011628 19 0 0
799 00:39:53.011689 20 0 0
800 00:39:53.011749 21 0 0
801 00:39:53.011809 22 0 0
802 00:39:53.011869 23 0 0
803 00:39:53.011930 24 0 ff
804 00:39:53.011990 25 0 ff
805 00:39:53.012051 26 0 ff
806 00:39:53.012128 27 0 ff
807 00:39:53.012194 28 0 ff
808 00:39:53.012256 29 0 ff
809 00:39:53.012317 30 0 ff
810 00:39:53.012377 31 0 ff
811 00:39:53.012437 32 ff ff
812 00:39:53.012497 33 ff ff
813 00:39:53.012557 34 ff ff
814 00:39:53.012618 35 ff ff
815 00:39:53.012678 36 ff ff
816 00:39:53.012738 37 ff ff
817 00:39:53.012798 38 ff ff
818 00:39:53.012859 pass bytecount = 0xff (0xff: all bytes pass)
819 00:39:53.012918
820 00:39:53.012978 DQS0 dly: 32
821 00:39:53.013037 DQS1 dly: 24
822 00:39:53.013097 Write Rank0 MR2 =0x2d
823 00:39:53.013157 [RankSwap] Rank num 2, (Multi 1), Rank 0
824 00:39:53.013216 Write Rank0 MR1 =0xd6
825 00:39:53.013276 [Gating]
826 00:39:53.013336 ==
827 00:39:53.013395 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
828 00:39:53.013456 fsp= 1, odt_onoff= 1, Byte mode= 0
829 00:39:53.013516 ==
830 00:39:53.013576 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
831 00:39:53.013637 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
832 00:39:53.013698 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
833 00:39:53.013759 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
834 00:39:53.013820 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
835 00:39:53.013881 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
836 00:39:53.013941 3 1 24 |2c2c 3534 |(11 0)(11 11) |(0 0)(0 1)| 0
837 00:39:53.014002 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
838 00:39:53.014063 3 2 0 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
839 00:39:53.014124 3 2 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
840 00:39:53.014184 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
841 00:39:53.014244 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
842 00:39:53.014305 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
843 00:39:53.014366 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
844 00:39:53.014426 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
845 00:39:53.014487 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
846 00:39:53.014547 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
847 00:39:53.014608 3 3 4 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
848 00:39:53.014669 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
849 00:39:53.014729 [Byte 1] Lead/lag falling Transition (3, 3, 8)
850 00:39:53.014789 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
851 00:39:53.014849 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
852 00:39:53.014910 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
853 00:39:53.014970 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
854 00:39:53.015031 3 3 28 |1918 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
855 00:39:53.015092 3 4 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
856 00:39:53.015151 3 4 4 |3d3d 1515 |(11 11)(11 11) |(1 1)(1 1)| 0
857 00:39:53.015212 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
858 00:39:53.015273 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 00:39:53.015333 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 00:39:53.015394 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 00:39:53.015465 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 00:39:53.015526 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 00:39:53.015587 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 00:39:53.015648 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 00:39:53.015708 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 00:39:53.015769 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 00:39:53.015830 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 00:39:53.015890 [Byte 0] Lead/lag falling Transition (3, 5, 16)
869 00:39:53.015950 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
870 00:39:53.016010 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
871 00:39:53.016071 [Byte 0] Lead/lag Transition tap number (3)
872 00:39:53.016366 [Byte 1] Lead/lag falling Transition (3, 5, 24)
873 00:39:53.016552 3 5 28 |1212 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
874 00:39:53.016719 [Byte 1] Lead/lag Transition tap number (2)
875 00:39:53.016874 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
876 00:39:53.017030 [Byte 0]First pass (3, 6, 0)
877 00:39:53.017178 3 6 4 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
878 00:39:53.017333 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
879 00:39:53.017486 [Byte 1]First pass (3, 6, 8)
880 00:39:53.017634 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 00:39:53.017706 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 00:39:53.017771 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 00:39:53.017834 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 00:39:53.017898 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 00:39:53.017960 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 00:39:53.018021 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 00:39:53.018083 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 00:39:53.018144 All bytes gating window > 1UI, Early break!
889 00:39:53.018204
890 00:39:53.018264 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 22)
891 00:39:53.018323
892 00:39:53.018382 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
893 00:39:53.018442
894 00:39:53.018502
895 00:39:53.018560
896 00:39:53.018618 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 22)
897 00:39:53.018678
898 00:39:53.018737 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
899 00:39:53.018796
900 00:39:53.018854
901 00:39:53.018912 Write Rank0 MR1 =0x56
902 00:39:53.018972
903 00:39:53.019030 best RODT dly(2T, 0.5T) = (2, 2)
904 00:39:53.019089
905 00:39:53.019148 best RODT dly(2T, 0.5T) = (2, 2)
906 00:39:53.019206 ==
907 00:39:53.019266 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
908 00:39:53.019325 fsp= 1, odt_onoff= 1, Byte mode= 0
909 00:39:53.019384 ==
910 00:39:53.019452 Start DQ dly to find pass range UseTestEngine =0
911 00:39:53.019512 x-axis: bit #, y-axis: DQ dly (-127~63)
912 00:39:53.019571 RX Vref Scan = 0
913 00:39:53.019630 -26, [0] xxxxxxxx xxxxxxxx [MSB]
914 00:39:53.019692 -25, [0] xxxxxxxx xxxxxxxx [MSB]
915 00:39:53.019752 -24, [0] xxxxxxxx xxxxxxxx [MSB]
916 00:39:53.019811 -23, [0] xxxxxxxx xxxxxxxx [MSB]
917 00:39:53.019872 -22, [0] xxxxxxxx xxxxxxxx [MSB]
918 00:39:53.019932 -21, [0] xxxxxxxx xxxxxxxx [MSB]
919 00:39:53.019991 -20, [0] xxxxxxxx xxxxxxxx [MSB]
920 00:39:53.020051 -19, [0] xxxxxxxx xxxxxxxx [MSB]
921 00:39:53.020110 -18, [0] xxxxxxxx xxxxxxxx [MSB]
922 00:39:53.020170 -17, [0] xxxxxxxx xxxxxxxx [MSB]
923 00:39:53.020229 -16, [0] xxxxxxxx xxxxxxxx [MSB]
924 00:39:53.020289 -15, [0] xxxxxxxx xxxxxxxx [MSB]
925 00:39:53.020347 -14, [0] xxxxxxxx xxxxxxxx [MSB]
926 00:39:53.020407 -13, [0] xxxxxxxx xxxxxxxx [MSB]
927 00:39:53.020467 -12, [0] xxxxxxxx xxxxxxxx [MSB]
928 00:39:53.020527 -11, [0] xxxxxxxx xxxxxxxx [MSB]
929 00:39:53.020587 -10, [0] xxxxxxxx xxxxxxxx [MSB]
930 00:39:53.020646 -9, [0] xxxxxxxx xxxxxxxx [MSB]
931 00:39:53.020707 -8, [0] xxxxxxxx xxxxxxxx [MSB]
932 00:39:53.020766 -7, [0] xxxxxxxx xxxxxxxx [MSB]
933 00:39:53.020825 -6, [0] xxxxxxxx xxxxxxxx [MSB]
934 00:39:53.020885 -5, [0] xxxxxxxx xxxxxxxx [MSB]
935 00:39:53.020945 -4, [0] xxxxxxxx xxxxxxxx [MSB]
936 00:39:53.021004 -3, [0] xxxxxxxx xxxxxxxx [MSB]
937 00:39:53.021064 -2, [0] xxxoxxxx oxxxxxxx [MSB]
938 00:39:53.021124 -1, [0] xxxoxxxx ooxoxxxx [MSB]
939 00:39:53.021183 0, [0] xxxoxoxx ooxoxxxx [MSB]
940 00:39:53.021244 1, [0] xxxoxoox ooxoooxx [MSB]
941 00:39:53.021304 2, [0] xxxoxoox ooxoooxx [MSB]
942 00:39:53.021363 3, [0] xoxoxooo ooxoooox [MSB]
943 00:39:53.021427 4, [0] xoooxooo ooxooooo [MSB]
944 00:39:53.021487 5, [0] xooooooo ooxooooo [MSB]
945 00:39:53.021547 6, [0] oooooooo ooxooooo [MSB]
946 00:39:53.021607 7, [0] oooooooo ooxooooo [MSB]
947 00:39:53.021666 33, [0] oooxoooo xooooooo [MSB]
948 00:39:53.021726 34, [0] oooxoooo xooooooo [MSB]
949 00:39:53.021786 35, [0] oooxoooo xooooooo [MSB]
950 00:39:53.021846 36, [0] oooxoxoo xooxoooo [MSB]
951 00:39:53.021906 37, [0] oooxoxxx xxoxoooo [MSB]
952 00:39:53.021965 38, [0] oooxoxxx xxoxxoxo [MSB]
953 00:39:53.022025 39, [0] oooxxxxx xxoxxxxo [MSB]
954 00:39:53.022084 40, [0] oooxxxxx xxoxxxxo [MSB]
955 00:39:53.022144 41, [0] xxoxxxxx xxoxxxxo [MSB]
956 00:39:53.022203 42, [0] xxxxxxxx xxoxxxxx [MSB]
957 00:39:53.022263 43, [0] xxxxxxxx xxoxxxxx [MSB]
958 00:39:53.022323 44, [0] xxxxxxxx xxxxxxxx [MSB]
959 00:39:53.022382 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
960 00:39:53.022441 iDelay=44, Bit 1, Center 21 (3 ~ 40) 38
961 00:39:53.022499 iDelay=44, Bit 2, Center 22 (4 ~ 41) 38
962 00:39:53.022558 iDelay=44, Bit 3, Center 15 (-2 ~ 32) 35
963 00:39:53.022617 iDelay=44, Bit 4, Center 21 (5 ~ 38) 34
964 00:39:53.022676 iDelay=44, Bit 5, Center 17 (0 ~ 35) 36
965 00:39:53.022735 iDelay=44, Bit 6, Center 18 (1 ~ 36) 36
966 00:39:53.022793 iDelay=44, Bit 7, Center 19 (3 ~ 36) 34
967 00:39:53.022852 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
968 00:39:53.022911 iDelay=44, Bit 9, Center 17 (-1 ~ 36) 38
969 00:39:53.022969 iDelay=44, Bit 10, Center 25 (8 ~ 43) 36
970 00:39:53.023028 iDelay=44, Bit 11, Center 17 (-1 ~ 35) 37
971 00:39:53.023086 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
972 00:39:53.023144 iDelay=44, Bit 13, Center 19 (1 ~ 38) 38
973 00:39:53.023202 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
974 00:39:53.023260 iDelay=44, Bit 15, Center 22 (4 ~ 41) 38
975 00:39:53.023319 ==
976 00:39:53.023378 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
977 00:39:53.023442 fsp= 1, odt_onoff= 1, Byte mode= 0
978 00:39:53.023502 ==
979 00:39:53.023560 DQS Delay:
980 00:39:53.023619 DQS0 = 0, DQS1 = 0
981 00:39:53.023677 DQM Delay:
982 00:39:53.023735 DQM0 = 19, DQM1 = 19
983 00:39:53.023793 DQ Delay:
984 00:39:53.023851 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15
985 00:39:53.023909 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =19
986 00:39:53.023968 DQ8 =15, DQ9 =17, DQ10 =25, DQ11 =17
987 00:39:53.024027 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =22
988 00:39:53.024086
989 00:39:53.024144
990 00:39:53.024202 DramC Write-DBI off
991 00:39:53.024260 ==
992 00:39:53.024318 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
993 00:39:53.024376 fsp= 1, odt_onoff= 1, Byte mode= 0
994 00:39:53.024436 ==
995 00:39:53.024495 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
996 00:39:53.024554
997 00:39:53.024612 Begin, DQ Scan Range 920~1176
998 00:39:53.024671
999 00:39:53.024729
1000 00:39:53.024787 TX Vref Scan disable
1001 00:39:53.024846 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1002 00:39:53.024906 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1003 00:39:53.025167 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1004 00:39:53.025237 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1005 00:39:53.025299 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1006 00:39:53.025359 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1007 00:39:53.025420 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1008 00:39:53.025480 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1009 00:39:53.025540 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1010 00:39:53.025601 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1011 00:39:53.025660 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1012 00:39:53.025721 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1013 00:39:53.025780 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1014 00:39:53.025841 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1015 00:39:53.025902 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1016 00:39:53.025961 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1017 00:39:53.026022 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1018 00:39:53.026083 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1019 00:39:53.026144 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1020 00:39:53.026204 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1021 00:39:53.026263 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1022 00:39:53.026324 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1023 00:39:53.026384 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1024 00:39:53.026445 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1025 00:39:53.026512 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1026 00:39:53.026577 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1027 00:39:53.026639 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1028 00:39:53.026699 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1029 00:39:53.026760 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1030 00:39:53.026819 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1031 00:39:53.026878 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1032 00:39:53.026938 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1033 00:39:53.026997 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1034 00:39:53.027057 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1035 00:39:53.027115 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1036 00:39:53.027175 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1037 00:39:53.027235 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1038 00:39:53.027294 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1039 00:39:53.027353 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1040 00:39:53.027422 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1041 00:39:53.027484 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1042 00:39:53.027543 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1043 00:39:53.027603 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1044 00:39:53.027663 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1045 00:39:53.027722 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1046 00:39:53.027782 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1047 00:39:53.027842 966 |3 6 6|[0] xxxxxxxx oxxoxxxx [MSB]
1048 00:39:53.027902 967 |3 6 7|[0] xxxxxxxx oxxoxxox [MSB]
1049 00:39:53.027961 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1050 00:39:53.028021 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1051 00:39:53.028080 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1052 00:39:53.028140 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1053 00:39:53.028200 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1054 00:39:53.028259 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1055 00:39:53.028319 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1056 00:39:53.028378 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1057 00:39:53.028437 976 |3 6 16|[0] xoxooooo oooooooo [MSB]
1058 00:39:53.028496 985 |3 6 25|[0] oooooooo xooooooo [MSB]
1059 00:39:53.028556 986 |3 6 26|[0] oooooooo xooxoooo [MSB]
1060 00:39:53.028615 987 |3 6 27|[0] oooooooo xooxoooo [MSB]
1061 00:39:53.028675 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1062 00:39:53.028734 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1063 00:39:53.028793 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1064 00:39:53.028852 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1065 00:39:53.028911 992 |3 6 32|[0] oooxoooo xxxxxxxx [MSB]
1066 00:39:53.028970 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1067 00:39:53.029029 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1068 00:39:53.029088 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1069 00:39:53.029147 996 |3 6 36|[0] oooxoxxx xxxxxxxx [MSB]
1070 00:39:53.029205 997 |3 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1071 00:39:53.029264 Byte0, DQ PI dly=984, DQM PI dly= 984
1072 00:39:53.029323 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1073 00:39:53.029382
1074 00:39:53.029440 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1075 00:39:53.029499
1076 00:39:53.029557 Byte1, DQ PI dly=977, DQM PI dly= 977
1077 00:39:53.029616 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1078 00:39:53.029675
1079 00:39:53.029733 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1080 00:39:53.029791
1081 00:39:53.029849 ==
1082 00:39:53.029906 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1083 00:39:53.029964 fsp= 1, odt_onoff= 1, Byte mode= 0
1084 00:39:53.030023 ==
1085 00:39:53.030081 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1086 00:39:53.030139
1087 00:39:53.030197 Begin, DQ Scan Range 953~1017
1088 00:39:53.030255 Write Rank0 MR14 =0x0
1089 00:39:53.030312
1090 00:39:53.030370 CH=0, VrefRange= 0, VrefLevel = 0
1091 00:39:53.030428 TX Bit0 (978~993) 16 985, Bit8 (967~978) 12 972,
1092 00:39:53.030487 TX Bit1 (977~992) 16 984, Bit9 (969~983) 15 976,
1093 00:39:53.030546 TX Bit2 (978~993) 16 985, Bit10 (975~987) 13 981,
1094 00:39:53.030605 TX Bit3 (974~985) 12 979, Bit11 (968~982) 15 975,
1095 00:39:53.030663 TX Bit4 (977~991) 15 984, Bit12 (970~983) 14 976,
1096 00:39:53.030721 TX Bit5 (976~990) 15 983, Bit13 (970~984) 15 977,
1097 00:39:53.030780 TX Bit6 (977~988) 12 982, Bit14 (969~984) 16 976,
1098 00:39:53.030838 TX Bit7 (978~991) 14 984, Bit15 (974~986) 13 980,
1099 00:39:53.030896
1100 00:39:53.030954 Write Rank0 MR14 =0x2
1101 00:39:53.031012
1102 00:39:53.031069 CH=0, VrefRange= 0, VrefLevel = 2
1103 00:39:53.031128 TX Bit0 (978~993) 16 985, Bit8 (967~980) 14 973,
1104 00:39:53.031186 TX Bit1 (977~992) 16 984, Bit9 (969~984) 16 976,
1105 00:39:53.031245 TX Bit2 (977~993) 17 985, Bit10 (975~988) 14 981,
1106 00:39:53.031303 TX Bit3 (974~986) 13 980, Bit11 (968~982) 15 975,
1107 00:39:53.031362 TX Bit4 (977~991) 15 984, Bit12 (970~984) 15 977,
1108 00:39:53.031429 TX Bit5 (975~991) 17 983, Bit13 (969~984) 16 976,
1109 00:39:53.031691 TX Bit6 (976~991) 16 983, Bit14 (969~985) 17 977,
1110 00:39:53.031839 TX Bit7 (977~992) 16 984, Bit15 (974~986) 13 980,
1111 00:39:53.031984
1112 00:39:53.032126 Write Rank0 MR14 =0x4
1113 00:39:53.032271
1114 00:39:53.032419 CH=0, VrefRange= 0, VrefLevel = 4
1115 00:39:53.032565 TX Bit0 (978~994) 17 986, Bit8 (967~980) 14 973,
1116 00:39:53.032711 TX Bit1 (977~993) 17 985, Bit9 (968~984) 17 976,
1117 00:39:53.032857 TX Bit2 (977~994) 18 985, Bit10 (974~989) 16 981,
1118 00:39:53.032943 TX Bit3 (974~987) 14 980, Bit11 (968~983) 16 975,
1119 00:39:53.033005 TX Bit4 (977~992) 16 984, Bit12 (970~984) 15 977,
1120 00:39:53.033066 TX Bit5 (975~991) 17 983, Bit13 (969~984) 16 976,
1121 00:39:53.033126 TX Bit6 (977~991) 15 984, Bit14 (969~985) 17 977,
1122 00:39:53.033186 TX Bit7 (977~992) 16 984, Bit15 (974~988) 15 981,
1123 00:39:53.033245
1124 00:39:53.033303 Write Rank0 MR14 =0x6
1125 00:39:53.033362
1126 00:39:53.033420 CH=0, VrefRange= 0, VrefLevel = 6
1127 00:39:53.033478 TX Bit0 (977~994) 18 985, Bit8 (967~982) 16 974,
1128 00:39:53.033537 TX Bit1 (977~993) 17 985, Bit9 (968~985) 18 976,
1129 00:39:53.033596 TX Bit2 (977~994) 18 985, Bit10 (974~989) 16 981,
1130 00:39:53.033655 TX Bit3 (973~988) 16 980, Bit11 (968~983) 16 975,
1131 00:39:53.033714 TX Bit4 (977~993) 17 985, Bit12 (970~985) 16 977,
1132 00:39:53.033773 TX Bit5 (975~992) 18 983, Bit13 (969~985) 17 977,
1133 00:39:53.033831 TX Bit6 (976~992) 17 984, Bit14 (968~986) 19 977,
1134 00:39:53.033890 TX Bit7 (977~992) 16 984, Bit15 (974~988) 15 981,
1135 00:39:53.033948
1136 00:39:53.034007 wait MRW command Rank0 MR14 =0x8 fired (1)
1137 00:39:53.034065 Write Rank0 MR14 =0x8
1138 00:39:53.034123
1139 00:39:53.034180 CH=0, VrefRange= 0, VrefLevel = 8
1140 00:39:53.034239 TX Bit0 (977~995) 19 986, Bit8 (966~982) 17 974,
1141 00:39:53.034298 TX Bit1 (977~994) 18 985, Bit9 (968~985) 18 976,
1142 00:39:53.034357 TX Bit2 (978~994) 17 986, Bit10 (974~990) 17 982,
1143 00:39:53.034416 TX Bit3 (973~988) 16 980, Bit11 (967~984) 18 975,
1144 00:39:53.034474 TX Bit4 (976~993) 18 984, Bit12 (969~985) 17 977,
1145 00:39:53.034533 TX Bit5 (974~992) 19 983, Bit13 (969~985) 17 977,
1146 00:39:53.034592 TX Bit6 (976~992) 17 984, Bit14 (968~986) 19 977,
1147 00:39:53.034651 TX Bit7 (977~993) 17 985, Bit15 (973~989) 17 981,
1148 00:39:53.034709
1149 00:39:53.034767 Write Rank0 MR14 =0xa
1150 00:39:53.034825
1151 00:39:53.034882 CH=0, VrefRange= 0, VrefLevel = 10
1152 00:39:53.034940 TX Bit0 (977~996) 20 986, Bit8 (966~983) 18 974,
1153 00:39:53.034999 TX Bit1 (977~994) 18 985, Bit9 (968~986) 19 977,
1154 00:39:53.035057 TX Bit2 (977~995) 19 986, Bit10 (974~991) 18 982,
1155 00:39:53.035115 TX Bit3 (972~990) 19 981, Bit11 (967~984) 18 975,
1156 00:39:53.035173 TX Bit4 (976~993) 18 984, Bit12 (969~986) 18 977,
1157 00:39:53.035232 TX Bit5 (974~992) 19 983, Bit13 (968~987) 20 977,
1158 00:39:53.035290 TX Bit6 (976~992) 17 984, Bit14 (968~988) 21 978,
1159 00:39:53.035348 TX Bit7 (977~993) 17 985, Bit15 (973~990) 18 981,
1160 00:39:53.035414
1161 00:39:53.035474 Write Rank0 MR14 =0xc
1162 00:39:53.035532
1163 00:39:53.035589 CH=0, VrefRange= 0, VrefLevel = 12
1164 00:39:53.035647 TX Bit0 (977~997) 21 987, Bit8 (966~983) 18 974,
1165 00:39:53.035706 TX Bit1 (976~995) 20 985, Bit9 (968~986) 19 977,
1166 00:39:53.035765 TX Bit2 (977~996) 20 986, Bit10 (973~991) 19 982,
1167 00:39:53.035824 TX Bit3 (972~991) 20 981, Bit11 (967~985) 19 976,
1168 00:39:53.035882 TX Bit4 (976~994) 19 985, Bit12 (968~987) 20 977,
1169 00:39:53.035941 TX Bit5 (974~993) 20 983, Bit13 (968~987) 20 977,
1170 00:39:53.036000 TX Bit6 (975~993) 19 984, Bit14 (968~987) 20 977,
1171 00:39:53.036058 TX Bit7 (977~994) 18 985, Bit15 (972~990) 19 981,
1172 00:39:53.036116
1173 00:39:53.036173 Write Rank0 MR14 =0xe
1174 00:39:53.036231
1175 00:39:53.036289 CH=0, VrefRange= 0, VrefLevel = 14
1176 00:39:53.036348 TX Bit0 (977~997) 21 987, Bit8 (966~984) 19 975,
1177 00:39:53.036407 TX Bit1 (976~995) 20 985, Bit9 (967~986) 20 976,
1178 00:39:53.036466 TX Bit2 (977~997) 21 987, Bit10 (973~991) 19 982,
1179 00:39:53.036525 TX Bit3 (971~991) 21 981, Bit11 (967~985) 19 976,
1180 00:39:53.036584 TX Bit4 (976~994) 19 985, Bit12 (969~987) 19 978,
1181 00:39:53.036643 TX Bit5 (973~993) 21 983, Bit13 (968~987) 20 977,
1182 00:39:53.036701 TX Bit6 (975~993) 19 984, Bit14 (968~989) 22 978,
1183 00:39:53.036760 TX Bit7 (977~994) 18 985, Bit15 (972~991) 20 981,
1184 00:39:53.036819
1185 00:39:53.036876 Write Rank0 MR14 =0x10
1186 00:39:53.036934
1187 00:39:53.036992 CH=0, VrefRange= 0, VrefLevel = 16
1188 00:39:53.037050 TX Bit0 (977~998) 22 987, Bit8 (965~984) 20 974,
1189 00:39:53.037109 TX Bit1 (976~995) 20 985, Bit9 (967~987) 21 977,
1190 00:39:53.037168 TX Bit2 (976~998) 23 987, Bit10 (972~992) 21 982,
1191 00:39:53.037227 TX Bit3 (971~991) 21 981, Bit11 (966~986) 21 976,
1192 00:39:53.037285 TX Bit4 (976~995) 20 985, Bit12 (968~988) 21 978,
1193 00:39:53.037343 TX Bit5 (972~993) 22 982, Bit13 (968~988) 21 978,
1194 00:39:53.037402 TX Bit6 (975~994) 20 984, Bit14 (968~990) 23 979,
1195 00:39:53.037461 TX Bit7 (976~995) 20 985, Bit15 (972~991) 20 981,
1196 00:39:53.037519
1197 00:39:53.037576 Write Rank0 MR14 =0x12
1198 00:39:53.037634
1199 00:39:53.037695 CH=0, VrefRange= 0, VrefLevel = 18
1200 00:39:53.037754 TX Bit0 (976~998) 23 987, Bit8 (965~984) 20 974,
1201 00:39:53.037812 TX Bit1 (976~997) 22 986, Bit9 (967~988) 22 977,
1202 00:39:53.037871 TX Bit2 (976~998) 23 987, Bit10 (971~992) 22 981,
1203 00:39:53.037930 TX Bit3 (971~991) 21 981, Bit11 (966~986) 21 976,
1204 00:39:53.037989 TX Bit4 (976~995) 20 985, Bit12 (968~988) 21 978,
1205 00:39:53.038047 TX Bit5 (972~994) 23 983, Bit13 (968~988) 21 978,
1206 00:39:53.038106 TX Bit6 (975~994) 20 984, Bit14 (967~990) 24 978,
1207 00:39:53.038165 TX Bit7 (976~996) 21 986, Bit15 (971~991) 21 981,
1208 00:39:53.038223
1209 00:39:53.038280 Write Rank0 MR14 =0x14
1210 00:39:53.038338
1211 00:39:53.038396 CH=0, VrefRange= 0, VrefLevel = 20
1212 00:39:53.038654 TX Bit0 (976~999) 24 987, Bit8 (965~985) 21 975,
1213 00:39:53.038753 TX Bit1 (975~997) 23 986, Bit9 (967~989) 23 978,
1214 00:39:53.038846 TX Bit2 (976~998) 23 987, Bit10 (971~992) 22 981,
1215 00:39:53.038939 TX Bit3 (970~992) 23 981, Bit11 (966~987) 22 976,
1216 00:39:53.039031 TX Bit4 (975~996) 22 985, Bit12 (968~989) 22 978,
1217 00:39:53.039094 TX Bit5 (972~994) 23 983, Bit13 (967~989) 23 978,
1218 00:39:53.039154 TX Bit6 (974~995) 22 984, Bit14 (967~990) 24 978,
1219 00:39:53.039213 TX Bit7 (976~996) 21 986, Bit15 (971~992) 22 981,
1220 00:39:53.039271
1221 00:39:53.039330 Write Rank0 MR14 =0x16
1222 00:39:53.039387
1223 00:39:53.039455 CH=0, VrefRange= 0, VrefLevel = 22
1224 00:39:53.039515 TX Bit0 (976~999) 24 987, Bit8 (965~985) 21 975,
1225 00:39:53.039574 TX Bit1 (975~998) 24 986, Bit9 (967~989) 23 978,
1226 00:39:53.039633 TX Bit2 (976~998) 23 987, Bit10 (971~993) 23 982,
1227 00:39:53.039692 TX Bit3 (970~992) 23 981, Bit11 (966~988) 23 977,
1228 00:39:53.039751 TX Bit4 (975~997) 23 986, Bit12 (967~990) 24 978,
1229 00:39:53.039819 TX Bit5 (972~994) 23 983, Bit13 (967~990) 24 978,
1230 00:39:53.039878 TX Bit6 (974~995) 22 984, Bit14 (967~990) 24 978,
1231 00:39:53.039937 TX Bit7 (976~997) 22 986, Bit15 (970~992) 23 981,
1232 00:39:53.039996
1233 00:39:53.040054 Write Rank0 MR14 =0x18
1234 00:39:53.040112
1235 00:39:53.040169 CH=0, VrefRange= 0, VrefLevel = 24
1236 00:39:53.040227 TX Bit0 (976~999) 24 987, Bit8 (965~987) 23 976,
1237 00:39:53.040285 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1238 00:39:53.040344 TX Bit2 (976~999) 24 987, Bit10 (970~993) 24 981,
1239 00:39:53.040403 TX Bit3 (969~993) 25 981, Bit11 (966~988) 23 977,
1240 00:39:53.040462 TX Bit4 (975~998) 24 986, Bit12 (968~990) 23 979,
1241 00:39:53.040520 TX Bit5 (971~995) 25 983, Bit13 (967~990) 24 978,
1242 00:39:53.040578 TX Bit6 (974~996) 23 985, Bit14 (967~991) 25 979,
1243 00:39:53.040636 TX Bit7 (976~997) 22 986, Bit15 (970~992) 23 981,
1244 00:39:53.040695
1245 00:39:53.040753 Write Rank0 MR14 =0x1a
1246 00:39:53.040810
1247 00:39:53.040868 CH=0, VrefRange= 0, VrefLevel = 26
1248 00:39:53.040926 TX Bit0 (976~999) 24 987, Bit8 (964~987) 24 975,
1249 00:39:53.040984 TX Bit1 (975~999) 25 987, Bit9 (966~990) 25 978,
1250 00:39:53.041044 TX Bit2 (976~999) 24 987, Bit10 (970~994) 25 982,
1251 00:39:53.041102 TX Bit3 (969~993) 25 981, Bit11 (965~989) 25 977,
1252 00:39:53.041161 TX Bit4 (975~998) 24 986, Bit12 (967~990) 24 978,
1253 00:39:53.041219 TX Bit5 (971~995) 25 983, Bit13 (967~990) 24 978,
1254 00:39:53.041277 TX Bit6 (974~996) 23 985, Bit14 (967~991) 25 979,
1255 00:39:53.041335 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1256 00:39:53.041393
1257 00:39:53.041451 Write Rank0 MR14 =0x1c
1258 00:39:53.041509
1259 00:39:53.041566 CH=0, VrefRange= 0, VrefLevel = 28
1260 00:39:53.041624 TX Bit0 (976~1000) 25 988, Bit8 (965~987) 23 976,
1261 00:39:53.041683 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1262 00:39:53.041741 TX Bit2 (975~999) 25 987, Bit10 (969~994) 26 981,
1263 00:39:53.041799 TX Bit3 (969~993) 25 981, Bit11 (965~989) 25 977,
1264 00:39:53.041858 TX Bit4 (974~999) 26 986, Bit12 (967~991) 25 979,
1265 00:39:53.041916 TX Bit5 (971~996) 26 983, Bit13 (967~990) 24 978,
1266 00:39:53.041975 TX Bit6 (973~997) 25 985, Bit14 (967~991) 25 979,
1267 00:39:53.042033 TX Bit7 (975~999) 25 987, Bit15 (969~993) 25 981,
1268 00:39:53.042091
1269 00:39:53.042161 wait MRW command Rank0 MR14 =0x1e fired (1)
1270 00:39:53.042221 Write Rank0 MR14 =0x1e
1271 00:39:53.042279
1272 00:39:53.042337 CH=0, VrefRange= 0, VrefLevel = 30
1273 00:39:53.042396 TX Bit0 (976~1000) 25 988, Bit8 (964~988) 25 976,
1274 00:39:53.042454 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1275 00:39:53.042512 TX Bit2 (976~999) 24 987, Bit10 (969~994) 26 981,
1276 00:39:53.042571 TX Bit3 (969~994) 26 981, Bit11 (965~989) 25 977,
1277 00:39:53.042629 TX Bit4 (974~999) 26 986, Bit12 (967~991) 25 979,
1278 00:39:53.042687 TX Bit5 (971~995) 25 983, Bit13 (967~990) 24 978,
1279 00:39:53.042746 TX Bit6 (973~997) 25 985, Bit14 (967~990) 24 978,
1280 00:39:53.042805 TX Bit7 (975~999) 25 987, Bit15 (969~993) 25 981,
1281 00:39:53.042863
1282 00:39:53.042921 wait MRW command Rank0 MR14 =0x20 fired (1)
1283 00:39:53.042979 Write Rank0 MR14 =0x20
1284 00:39:53.043037
1285 00:39:53.043095 CH=0, VrefRange= 0, VrefLevel = 32
1286 00:39:53.043154 TX Bit0 (976~1000) 25 988, Bit8 (964~988) 25 976,
1287 00:39:53.043213 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1288 00:39:53.043272 TX Bit2 (976~999) 24 987, Bit10 (969~994) 26 981,
1289 00:39:53.043330 TX Bit3 (969~994) 26 981, Bit11 (965~989) 25 977,
1290 00:39:53.043389 TX Bit4 (974~999) 26 986, Bit12 (967~991) 25 979,
1291 00:39:53.043452 TX Bit5 (971~995) 25 983, Bit13 (967~990) 24 978,
1292 00:39:53.043512 TX Bit6 (973~997) 25 985, Bit14 (967~990) 24 978,
1293 00:39:53.043570 TX Bit7 (975~999) 25 987, Bit15 (969~993) 25 981,
1294 00:39:53.043629
1295 00:39:53.043687 Write Rank0 MR14 =0x22
1296 00:39:53.043744
1297 00:39:53.043801 CH=0, VrefRange= 0, VrefLevel = 34
1298 00:39:53.043859 TX Bit0 (976~1000) 25 988, Bit8 (964~988) 25 976,
1299 00:39:53.043916 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1300 00:39:53.043974 TX Bit2 (976~999) 24 987, Bit10 (969~994) 26 981,
1301 00:39:53.044033 TX Bit3 (969~994) 26 981, Bit11 (965~989) 25 977,
1302 00:39:53.044091 TX Bit4 (974~999) 26 986, Bit12 (967~991) 25 979,
1303 00:39:53.044148 TX Bit5 (971~995) 25 983, Bit13 (967~990) 24 978,
1304 00:39:53.044207 TX Bit6 (973~997) 25 985, Bit14 (967~990) 24 978,
1305 00:39:53.044264 TX Bit7 (975~999) 25 987, Bit15 (969~993) 25 981,
1306 00:39:53.044322
1307 00:39:53.044379 Write Rank0 MR14 =0x24
1308 00:39:53.044435
1309 00:39:53.044492 CH=0, VrefRange= 0, VrefLevel = 36
1310 00:39:53.044550 TX Bit0 (976~1000) 25 988, Bit8 (964~988) 25 976,
1311 00:39:53.044608 TX Bit1 (975~999) 25 987, Bit9 (967~990) 24 978,
1312 00:39:53.044864 TX Bit2 (976~999) 24 987, Bit10 (969~994) 26 981,
1313 00:39:53.045012 TX Bit3 (969~994) 26 981, Bit11 (965~989) 25 977,
1314 00:39:53.045156 TX Bit4 (974~999) 26 986, Bit12 (967~991) 25 979,
1315 00:39:53.045302 TX Bit5 (971~995) 25 983, Bit13 (967~990) 24 978,
1316 00:39:53.045446 TX Bit6 (973~997) 25 985, Bit14 (967~990) 24 978,
1317 00:39:53.045587 TX Bit7 (975~999) 25 987, Bit15 (969~993) 25 981,
1318 00:39:53.045731
1319 00:39:53.045871
1320 00:39:53.046013 TX Vref found, early break! 373< 379
1321 00:39:53.046142 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1322 00:39:53.046207 u1DelayCellOfst[0]=9 cells (7 PI)
1323 00:39:53.046268 u1DelayCellOfst[1]=7 cells (6 PI)
1324 00:39:53.046328 u1DelayCellOfst[2]=7 cells (6 PI)
1325 00:39:53.046387 u1DelayCellOfst[3]=0 cells (0 PI)
1326 00:39:53.046445 u1DelayCellOfst[4]=6 cells (5 PI)
1327 00:39:53.046503 u1DelayCellOfst[5]=2 cells (2 PI)
1328 00:39:53.046561 u1DelayCellOfst[6]=5 cells (4 PI)
1329 00:39:53.046618 u1DelayCellOfst[7]=7 cells (6 PI)
1330 00:39:53.046676 Byte0, DQ PI dly=981, DQM PI dly= 984
1331 00:39:53.046736 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1332 00:39:53.046795
1333 00:39:53.046853 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1334 00:39:53.046911
1335 00:39:53.046968 u1DelayCellOfst[8]=0 cells (0 PI)
1336 00:39:53.047026 u1DelayCellOfst[9]=2 cells (2 PI)
1337 00:39:53.047083 u1DelayCellOfst[10]=6 cells (5 PI)
1338 00:39:53.047141 u1DelayCellOfst[11]=1 cells (1 PI)
1339 00:39:53.047198 u1DelayCellOfst[12]=3 cells (3 PI)
1340 00:39:53.047254 u1DelayCellOfst[13]=2 cells (2 PI)
1341 00:39:53.047311 u1DelayCellOfst[14]=2 cells (2 PI)
1342 00:39:53.047369 u1DelayCellOfst[15]=6 cells (5 PI)
1343 00:39:53.047441 Byte1, DQ PI dly=976, DQM PI dly= 978
1344 00:39:53.047500 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1345 00:39:53.047558
1346 00:39:53.047616 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1347 00:39:53.047674
1348 00:39:53.047731 Write Rank0 MR14 =0x1e
1349 00:39:53.047789
1350 00:39:53.047846 Final TX Range 0 Vref 30
1351 00:39:53.047903
1352 00:39:53.047960 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1353 00:39:53.048019
1354 00:39:53.048077 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1355 00:39:53.048135 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1356 00:39:53.048194 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1357 00:39:53.048252 Write Rank0 MR3 =0xb0
1358 00:39:53.048309 DramC Write-DBI on
1359 00:39:53.048366 ==
1360 00:39:53.048424 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1361 00:39:53.048483 fsp= 1, odt_onoff= 1, Byte mode= 0
1362 00:39:53.048541 ==
1363 00:39:53.048598 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1364 00:39:53.048656
1365 00:39:53.048713 Begin, DQ Scan Range 698~762
1366 00:39:53.048771
1367 00:39:53.048828
1368 00:39:53.048886 TX Vref Scan disable
1369 00:39:53.048943 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1370 00:39:53.049003 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1371 00:39:53.049063 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1372 00:39:53.049123 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1373 00:39:53.049181 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1374 00:39:53.049240 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1375 00:39:53.049299 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1376 00:39:53.049358 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1377 00:39:53.049417 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1378 00:39:53.049475 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1379 00:39:53.049534 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1380 00:39:53.049592 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1381 00:39:53.049651 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1382 00:39:53.049710 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1383 00:39:53.049769 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1384 00:39:53.049828 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1385 00:39:53.049887 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1386 00:39:53.049945 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1387 00:39:53.050004 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1388 00:39:53.050062 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1389 00:39:53.050121 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1390 00:39:53.050179 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1391 00:39:53.050238 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1392 00:39:53.050296 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1393 00:39:53.050354 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1394 00:39:53.050412 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1395 00:39:53.050471 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1396 00:39:53.050529 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1397 00:39:53.050588 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1398 00:39:53.050646 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1399 00:39:53.050705 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1400 00:39:53.050763 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
1401 00:39:53.050821 Byte0, DQ PI dly=731, DQM PI dly= 731
1402 00:39:53.050878 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
1403 00:39:53.050937
1404 00:39:53.050994 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
1405 00:39:53.051051
1406 00:39:53.051109 Byte1, DQ PI dly=721, DQM PI dly= 721
1407 00:39:53.051166 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
1408 00:39:53.051225
1409 00:39:53.051282 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
1410 00:39:53.051340
1411 00:39:53.051397 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1412 00:39:53.051467 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1413 00:39:53.051525 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1414 00:39:53.051584 Write Rank0 MR3 =0x30
1415 00:39:53.051641 DramC Write-DBI off
1416 00:39:53.051698
1417 00:39:53.051756 [DATLAT]
1418 00:39:53.051813 Freq=1600, CH0 RK0, use_rxtx_scan=0
1419 00:39:53.051871
1420 00:39:53.051929 DATLAT Default: 0xf
1421 00:39:53.051987 7, 0xFFFF, sum=0
1422 00:39:53.052045 8, 0xFFFF, sum=0
1423 00:39:53.052104 9, 0xFFFF, sum=0
1424 00:39:53.052162 10, 0xFFFF, sum=0
1425 00:39:53.052220 11, 0xFFFF, sum=0
1426 00:39:53.052278 12, 0xFFFF, sum=0
1427 00:39:53.052336 13, 0xFFFF, sum=0
1428 00:39:53.052394 14, 0x0, sum=1
1429 00:39:53.052452 15, 0x0, sum=2
1430 00:39:53.052510 16, 0x0, sum=3
1431 00:39:53.052569 17, 0x0, sum=4
1432 00:39:53.052627 pattern=2 first_step=14 total pass=5 best_step=16
1433 00:39:53.052685 ==
1434 00:39:53.052944 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1435 00:39:53.053010 fsp= 1, odt_onoff= 1, Byte mode= 0
1436 00:39:53.053071 ==
1437 00:39:53.053130 Start DQ dly to find pass range UseTestEngine =1
1438 00:39:53.053188 x-axis: bit #, y-axis: DQ dly (-127~63)
1439 00:39:53.053247 RX Vref Scan = 1
1440 00:39:53.053305
1441 00:39:53.053363 RX Vref found, early break!
1442 00:39:53.053420
1443 00:39:53.053477 Final RX Vref 12, apply to both rank0 and 1
1444 00:39:53.053536 ==
1445 00:39:53.053594 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1446 00:39:53.053652 fsp= 1, odt_onoff= 1, Byte mode= 0
1447 00:39:53.053711 ==
1448 00:39:53.053768 DQS Delay:
1449 00:39:53.053825 DQS0 = 0, DQS1 = 0
1450 00:39:53.053884 DQM Delay:
1451 00:39:53.053942 DQM0 = 19, DQM1 = 19
1452 00:39:53.053999 DQ Delay:
1453 00:39:53.054057 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15
1454 00:39:53.054115 DQ4 =21, DQ5 =17, DQ6 =19, DQ7 =20
1455 00:39:53.054172 DQ8 =15, DQ9 =17, DQ10 =25, DQ11 =17
1456 00:39:53.054230 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1457 00:39:53.054288
1458 00:39:53.054344
1459 00:39:53.054401
1460 00:39:53.054458 [DramC_TX_OE_Calibration] TA2
1461 00:39:53.054515 Original DQ_B0 (3 6) =30, OEN = 27
1462 00:39:53.054573 Original DQ_B1 (3 6) =30, OEN = 27
1463 00:39:53.054630 23, 0x0, End_B0=23 End_B1=23
1464 00:39:53.054689 24, 0x0, End_B0=24 End_B1=24
1465 00:39:53.054748 25, 0x0, End_B0=25 End_B1=25
1466 00:39:53.054806 26, 0x0, End_B0=26 End_B1=26
1467 00:39:53.054864 27, 0x0, End_B0=27 End_B1=27
1468 00:39:53.054923 28, 0x0, End_B0=28 End_B1=28
1469 00:39:53.054982 29, 0x0, End_B0=29 End_B1=29
1470 00:39:53.055040 30, 0x0, End_B0=30 End_B1=30
1471 00:39:53.055098 31, 0xFFFF, End_B0=30 End_B1=30
1472 00:39:53.055157 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1473 00:39:53.055215 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1474 00:39:53.055272
1475 00:39:53.055329
1476 00:39:53.055386 Write Rank0 MR23 =0x3f
1477 00:39:53.055452 [DQSOSC]
1478 00:39:53.055510 [DQSOSCAuto] RK0, (LSB)MR18= 0x1212, (MSB)MR19= 0x303, tDQSOscB0 = 400 ps tDQSOscB1 = 400 ps
1479 00:39:53.055569 CH0_RK0: MR19=0x303, MR18=0x1212, DQSOSC=400, MR23=63, INC=15, DEC=23
1480 00:39:53.055628 Write Rank0 MR23 =0x3f
1481 00:39:53.055685 [DQSOSC]
1482 00:39:53.055743 [DQSOSCAuto] RK0, (LSB)MR18= 0x1212, (MSB)MR19= 0x303, tDQSOscB0 = 400 ps tDQSOscB1 = 400 ps
1483 00:39:53.055801 CH0 RK0: MR19=303, MR18=1212
1484 00:39:53.055860 [RankSwap] Rank num 2, (Multi 1), Rank 1
1485 00:39:53.055918 Write Rank0 MR2 =0xad
1486 00:39:53.055976 [Write Leveling]
1487 00:39:53.056033 delay byte0 byte1 byte2 byte3
1488 00:39:53.056091
1489 00:39:53.056148 10 0 0
1490 00:39:53.056207 11 0 0
1491 00:39:53.056267 12 0 0
1492 00:39:53.056326 13 0 0
1493 00:39:53.056384 14 0 0
1494 00:39:53.056442 15 0 0
1495 00:39:53.056500 16 0 0
1496 00:39:53.056559 17 0 0
1497 00:39:53.056618 18 0 0
1498 00:39:53.056676 19 0 0
1499 00:39:53.056735 20 0 0
1500 00:39:53.056793 21 0 0
1501 00:39:53.056851 22 0 0
1502 00:39:53.056910 23 0 0
1503 00:39:53.056968 24 0 ff
1504 00:39:53.057026 25 0 ff
1505 00:39:53.057084 26 ff ff
1506 00:39:53.057143 27 ff ff
1507 00:39:53.057201 28 ff ff
1508 00:39:53.057260 29 ff ff
1509 00:39:53.057318 30 ff ff
1510 00:39:53.057375 31 ff ff
1511 00:39:53.057433 32 ff ff
1512 00:39:53.057491 pass bytecount = 0xff (0xff: all bytes pass)
1513 00:39:53.057549
1514 00:39:53.057606 DQS0 dly: 26
1515 00:39:53.057664 DQS1 dly: 24
1516 00:39:53.057721 Write Rank0 MR2 =0x2d
1517 00:39:53.057779 [RankSwap] Rank num 2, (Multi 1), Rank 0
1518 00:39:53.057837 Write Rank1 MR1 =0xd6
1519 00:39:53.057894 [Gating]
1520 00:39:53.057952 ==
1521 00:39:53.058009 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1522 00:39:53.058067 fsp= 1, odt_onoff= 1, Byte mode= 0
1523 00:39:53.058124 ==
1524 00:39:53.058182 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1525 00:39:53.058241 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1526 00:39:53.058300 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1527 00:39:53.058359 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1528 00:39:53.058418 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1529 00:39:53.058477 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1530 00:39:53.058535 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1531 00:39:53.058594 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1532 00:39:53.058653 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1533 00:39:53.058714 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1534 00:39:53.058772 3 2 8 |302 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1535 00:39:53.058831 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1536 00:39:53.058889 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1537 00:39:53.058948 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1538 00:39:53.059007 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1539 00:39:53.059066 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1540 00:39:53.059126 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1541 00:39:53.059184 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1542 00:39:53.059243 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1543 00:39:53.059302 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1544 00:39:53.059361 [Byte 0] Lead/lag Transition tap number (1)
1545 00:39:53.059425 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1546 00:39:53.059485 3 3 20 |3534 e0d |(11 11)(11 11) |(0 0)(1 1)| 0
1547 00:39:53.059544 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1548 00:39:53.059603 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1549 00:39:53.059662 [Byte 1] Lead/lag falling Transition (3, 3, 28)
1550 00:39:53.059720 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1551 00:39:53.059778 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1552 00:39:53.059837 3 4 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1553 00:39:53.059896 3 4 12 |2e2d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1554 00:39:53.059955 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1555 00:39:53.060014 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 00:39:53.060073 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1557 00:39:53.060131 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 00:39:53.060190 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 00:39:53.060248 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 00:39:53.060507 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 00:39:53.060662 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 00:39:53.060811 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1563 00:39:53.060957 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1564 00:39:53.061103 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1565 00:39:53.061205 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1566 00:39:53.061271 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1567 00:39:53.061334 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1568 00:39:53.061394 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1569 00:39:53.061454 [Byte 0] Lead/lag Transition tap number (2)
1570 00:39:53.061513 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1571 00:39:53.061571 3 6 8 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1572 00:39:53.061630 [Byte 1] Lead/lag Transition tap number (2)
1573 00:39:53.061689 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
1574 00:39:53.061748 [Byte 0]First pass (3, 6, 12)
1575 00:39:53.061806 3 6 16 |4646 c0c |(0 0)(11 11) |(0 0)(0 0)| 0
1576 00:39:53.061865 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1577 00:39:53.061925 [Byte 1]First pass (3, 6, 20)
1578 00:39:53.061983 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1579 00:39:53.062042 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1580 00:39:53.062101 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1581 00:39:53.062159 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1582 00:39:53.062218 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1583 00:39:53.062277 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1584 00:39:53.062335 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1585 00:39:53.062393 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1586 00:39:53.062452 All bytes gating window > 1UI, Early break!
1587 00:39:53.062509
1588 00:39:53.062567 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1589 00:39:53.062626
1590 00:39:53.062683 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1591 00:39:53.062742
1592 00:39:53.062799
1593 00:39:53.062856
1594 00:39:53.062918 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1595 00:39:53.062991
1596 00:39:53.063049 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1597 00:39:53.063107
1598 00:39:53.063165
1599 00:39:53.063222 Write Rank1 MR1 =0x56
1600 00:39:53.063280
1601 00:39:53.063337 best RODT dly(2T, 0.5T) = (2, 3)
1602 00:39:53.063395
1603 00:39:53.063464 best RODT dly(2T, 0.5T) = (2, 3)
1604 00:39:53.063522 ==
1605 00:39:53.063580 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1606 00:39:53.063639 fsp= 1, odt_onoff= 1, Byte mode= 0
1607 00:39:53.063697 ==
1608 00:39:53.063755 Start DQ dly to find pass range UseTestEngine =0
1609 00:39:53.063813 x-axis: bit #, y-axis: DQ dly (-127~63)
1610 00:39:53.063871 RX Vref Scan = 0
1611 00:39:53.063928 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1612 00:39:53.063988 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1613 00:39:53.064047 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1614 00:39:53.064106 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1615 00:39:53.064165 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1616 00:39:53.064224 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1617 00:39:53.064282 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1618 00:39:53.064341 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1619 00:39:53.064402 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1620 00:39:53.064489 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1621 00:39:53.064586 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1622 00:39:53.064649 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1623 00:39:53.064709 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1624 00:39:53.064769 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1625 00:39:53.064829 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1626 00:39:53.064888 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1627 00:39:53.064948 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1628 00:39:53.065008 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1629 00:39:53.065067 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1630 00:39:53.065126 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1631 00:39:53.065185 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1632 00:39:53.065244 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1633 00:39:53.065303 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1634 00:39:53.065362 -3, [0] xxxxxxxx oxxxxxxx [MSB]
1635 00:39:53.065420 -2, [0] xxxxxxxx oxxoxxxx [MSB]
1636 00:39:53.065479 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1637 00:39:53.065538 0, [0] xxxoxoxx oxxoxxxx [MSB]
1638 00:39:53.065597 1, [0] xxxoxoox ooxoooxx [MSB]
1639 00:39:53.065657 2, [0] xxxoxooo ooxoooxx [MSB]
1640 00:39:53.065715 3, [0] xoxooooo ooxoooox [MSB]
1641 00:39:53.065773 4, [0] xooooooo ooxoooox [MSB]
1642 00:39:53.065832 5, [0] oooooooo ooxooooo [MSB]
1643 00:39:53.065891 6, [0] oooooooo ooxooooo [MSB]
1644 00:39:53.065949 7, [0] oooooooo ooxooooo [MSB]
1645 00:39:53.066009 33, [0] oooooooo xooooooo [MSB]
1646 00:39:53.066069 34, [0] oooxoooo xooooooo [MSB]
1647 00:39:53.066128 35, [0] oooxoooo xooooooo [MSB]
1648 00:39:53.066186 36, [0] oooxoooo xooxoooo [MSB]
1649 00:39:53.066245 37, [0] oooxoxoo xxoxoxoo [MSB]
1650 00:39:53.066303 38, [0] oooxoxoo xxoxxxxo [MSB]
1651 00:39:53.066362 39, [0] oooxoxxx xxoxxxxo [MSB]
1652 00:39:53.066430 40, [0] oooxoxxx xxoxxxxo [MSB]
1653 00:39:53.066499 41, [0] oxxxoxxx xxoxxxxx [MSB]
1654 00:39:53.066559 42, [0] oxxxxxxx xxoxxxxx [MSB]
1655 00:39:53.066618 43, [0] xxxxxxxx xxoxxxxx [MSB]
1656 00:39:53.066676 44, [0] xxxxxxxx xxoxxxxx [MSB]
1657 00:39:53.066734 45, [0] xxxxxxxx xxxxxxxx [MSB]
1658 00:39:53.066793 iDelay=45, Bit 0, Center 23 (5 ~ 42) 38
1659 00:39:53.066851 iDelay=45, Bit 1, Center 21 (3 ~ 40) 38
1660 00:39:53.066909 iDelay=45, Bit 2, Center 22 (4 ~ 40) 37
1661 00:39:53.066967 iDelay=45, Bit 3, Center 16 (-1 ~ 33) 35
1662 00:39:53.067025 iDelay=45, Bit 4, Center 22 (3 ~ 41) 39
1663 00:39:53.067082 iDelay=45, Bit 5, Center 18 (0 ~ 36) 37
1664 00:39:53.067139 iDelay=45, Bit 6, Center 19 (1 ~ 38) 38
1665 00:39:53.067197 iDelay=45, Bit 7, Center 20 (2 ~ 38) 37
1666 00:39:53.067255 iDelay=45, Bit 8, Center 14 (-3 ~ 32) 36
1667 00:39:53.067312 iDelay=45, Bit 9, Center 18 (1 ~ 36) 36
1668 00:39:53.067369 iDelay=45, Bit 10, Center 26 (8 ~ 44) 37
1669 00:39:53.067438 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1670 00:39:53.067497 iDelay=45, Bit 12, Center 19 (1 ~ 37) 37
1671 00:39:53.067555 iDelay=45, Bit 13, Center 18 (1 ~ 36) 36
1672 00:39:53.067612 iDelay=45, Bit 14, Center 20 (3 ~ 37) 35
1673 00:39:53.067670 iDelay=45, Bit 15, Center 22 (5 ~ 40) 36
1674 00:39:53.067728 ==
1675 00:39:53.067786 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1676 00:39:53.067844 fsp= 1, odt_onoff= 1, Byte mode= 0
1677 00:39:53.067902 ==
1678 00:39:53.067960 DQS Delay:
1679 00:39:53.068017 DQS0 = 0, DQS1 = 0
1680 00:39:53.068074 DQM Delay:
1681 00:39:53.068327 DQM0 = 20, DQM1 = 19
1682 00:39:53.068392 DQ Delay:
1683 00:39:53.068451 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =16
1684 00:39:53.068510 DQ4 =22, DQ5 =18, DQ6 =19, DQ7 =20
1685 00:39:53.068568 DQ8 =14, DQ9 =18, DQ10 =26, DQ11 =16
1686 00:39:53.068627 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1687 00:39:53.068685
1688 00:39:53.068743
1689 00:39:53.068800 DramC Write-DBI off
1690 00:39:53.068858 ==
1691 00:39:53.068915 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1692 00:39:53.068974 fsp= 1, odt_onoff= 1, Byte mode= 0
1693 00:39:53.069032 ==
1694 00:39:53.069090 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1695 00:39:53.069148
1696 00:39:53.069205 Begin, DQ Scan Range 920~1176
1697 00:39:53.069263
1698 00:39:53.069320
1699 00:39:53.069377 TX Vref Scan disable
1700 00:39:53.069434 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1701 00:39:53.069493 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1702 00:39:53.069552 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1703 00:39:53.069611 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1704 00:39:53.069670 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1705 00:39:53.069751 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1706 00:39:53.069813 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1707 00:39:53.069873 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1708 00:39:53.069932 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1709 00:39:53.069991 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1710 00:39:53.070051 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1711 00:39:53.070111 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1712 00:39:53.070170 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1713 00:39:53.070229 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1714 00:39:53.070288 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1715 00:39:53.070347 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1716 00:39:53.070406 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1717 00:39:53.070465 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1718 00:39:53.070524 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1719 00:39:53.070583 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1720 00:39:53.070642 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1721 00:39:53.070701 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1722 00:39:53.070760 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1723 00:39:53.070820 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1724 00:39:53.070879 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1725 00:39:53.070937 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1726 00:39:53.070996 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1727 00:39:53.071055 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1728 00:39:53.071113 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1729 00:39:53.071172 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1730 00:39:53.071231 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1731 00:39:53.071290 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1732 00:39:53.071349 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1733 00:39:53.071420 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1734 00:39:53.071482 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1735 00:39:53.071541 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1736 00:39:53.071601 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1737 00:39:53.071659 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1738 00:39:53.071719 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1739 00:39:53.071779 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1740 00:39:53.071838 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1741 00:39:53.071897 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1742 00:39:53.071956 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1743 00:39:53.072014 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1744 00:39:53.072073 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1745 00:39:53.072132 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1746 00:39:53.072191 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1747 00:39:53.072250 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1748 00:39:53.072308 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1749 00:39:53.072367 969 |3 6 9|[0] xxxxxxxx ooxooxxx [MSB]
1750 00:39:53.072426 970 |3 6 10|[0] xxxxxxxx ooxooxox [MSB]
1751 00:39:53.072485 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1752 00:39:53.072544 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1753 00:39:53.072602 973 |3 6 13|[0] xxxxxxxx ooxooooo [MSB]
1754 00:39:53.072661 974 |3 6 14|[0] xoxooooo ooxooooo [MSB]
1755 00:39:53.072719 975 |3 6 15|[0] ooxooooo oooooooo [MSB]
1756 00:39:53.072778 987 |3 6 27|[0] oooooooo xooooooo [MSB]
1757 00:39:53.072836 988 |3 6 28|[0] oooooooo xooxoooo [MSB]
1758 00:39:53.072894 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1759 00:39:53.072955 990 |3 6 30|[0] oooxoooo xxxxxxxx [MSB]
1760 00:39:53.073013 991 |3 6 31|[0] oooxoooo xxxxxxxx [MSB]
1761 00:39:53.073071 992 |3 6 32|[0] xxxxxxxx xxxxxxxx [MSB]
1762 00:39:53.073130 Byte0, DQ PI dly=982, DQM PI dly= 982
1763 00:39:53.073187 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1764 00:39:53.073246
1765 00:39:53.073318 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1766 00:39:53.073382
1767 00:39:53.073440 Byte1, DQ PI dly=979, DQM PI dly= 979
1768 00:39:53.073498 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1769 00:39:53.073556
1770 00:39:53.073614 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1771 00:39:53.073673
1772 00:39:53.073730 ==
1773 00:39:53.073787 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1774 00:39:53.073845 fsp= 1, odt_onoff= 1, Byte mode= 0
1775 00:39:53.073905 ==
1776 00:39:53.073963 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1777 00:39:53.074021
1778 00:39:53.074078 Begin, DQ Scan Range 955~1019
1779 00:39:53.074136 Write Rank1 MR14 =0x0
1780 00:39:53.074194
1781 00:39:53.074251 CH=0, VrefRange= 0, VrefLevel = 0
1782 00:39:53.074308 TX Bit0 (977~991) 15 984, Bit8 (969~982) 14 975,
1783 00:39:53.074367 TX Bit1 (976~987) 12 981, Bit9 (971~985) 15 978,
1784 00:39:53.074425 TX Bit2 (977~989) 13 983, Bit10 (977~988) 12 982,
1785 00:39:53.074483 TX Bit3 (970~983) 14 976, Bit11 (971~983) 13 977,
1786 00:39:53.074541 TX Bit4 (976~989) 14 982, Bit12 (973~985) 13 979,
1787 00:39:53.074599 TX Bit5 (973~985) 13 979, Bit13 (974~983) 10 978,
1788 00:39:53.074657 TX Bit6 (975~987) 13 981, Bit14 (974~985) 12 979,
1789 00:39:53.074715 TX Bit7 (975~989) 15 982, Bit15 (976~988) 13 982,
1790 00:39:53.074773
1791 00:39:53.074830 Write Rank1 MR14 =0x2
1792 00:39:53.074887
1793 00:39:53.074943 CH=0, VrefRange= 0, VrefLevel = 2
1794 00:39:53.075000 TX Bit0 (977~991) 15 984, Bit8 (969~983) 15 976,
1795 00:39:53.075058 TX Bit1 (976~988) 13 982, Bit9 (971~985) 15 978,
1796 00:39:53.075311 TX Bit2 (977~990) 14 983, Bit10 (976~990) 15 983,
1797 00:39:53.075377 TX Bit3 (970~984) 15 977, Bit11 (970~983) 14 976,
1798 00:39:53.075461 TX Bit4 (975~990) 16 982, Bit12 (973~985) 13 979,
1799 00:39:53.075525 TX Bit5 (973~986) 14 979, Bit13 (974~983) 10 978,
1800 00:39:53.075584 TX Bit6 (974~988) 15 981, Bit14 (974~986) 13 980,
1801 00:39:53.075643 TX Bit7 (975~990) 16 982, Bit15 (976~990) 15 983,
1802 00:39:53.075705
1803 00:39:53.075764 Write Rank1 MR14 =0x4
1804 00:39:53.075822
1805 00:39:53.075880 CH=0, VrefRange= 0, VrefLevel = 4
1806 00:39:53.075939 TX Bit0 (977~992) 16 984, Bit8 (969~983) 15 976,
1807 00:39:53.075997 TX Bit1 (976~989) 14 982, Bit9 (970~986) 17 978,
1808 00:39:53.076055 TX Bit2 (977~991) 15 984, Bit10 (976~990) 15 983,
1809 00:39:53.076113 TX Bit3 (970~984) 15 977, Bit11 (970~983) 14 976,
1810 00:39:53.076171 TX Bit4 (975~990) 16 982, Bit12 (972~986) 15 979,
1811 00:39:53.076230 TX Bit5 (972~987) 16 979, Bit13 (974~984) 11 979,
1812 00:39:53.076303 TX Bit6 (974~990) 17 982, Bit14 (974~987) 14 980,
1813 00:39:53.076366 TX Bit7 (975~990) 16 982, Bit15 (976~990) 15 983,
1814 00:39:53.076426
1815 00:39:53.076483 Write Rank1 MR14 =0x6
1816 00:39:53.076541
1817 00:39:53.076598 CH=0, VrefRange= 0, VrefLevel = 6
1818 00:39:53.076656 TX Bit0 (977~992) 16 984, Bit8 (968~984) 17 976,
1819 00:39:53.076714 TX Bit1 (976~990) 15 983, Bit9 (970~987) 18 978,
1820 00:39:53.076772 TX Bit2 (977~991) 15 984, Bit10 (976~991) 16 983,
1821 00:39:53.076830 TX Bit3 (970~985) 16 977, Bit11 (969~984) 16 976,
1822 00:39:53.076888 TX Bit4 (975~991) 17 983, Bit12 (971~987) 17 979,
1823 00:39:53.076947 TX Bit5 (971~988) 18 979, Bit13 (973~985) 13 979,
1824 00:39:53.077005 TX Bit6 (973~990) 18 981, Bit14 (972~988) 17 980,
1825 00:39:53.077063 TX Bit7 (974~991) 18 982, Bit15 (975~991) 17 983,
1826 00:39:53.077120
1827 00:39:53.077177 Write Rank1 MR14 =0x8
1828 00:39:53.077235
1829 00:39:53.077292 CH=0, VrefRange= 0, VrefLevel = 8
1830 00:39:53.077351 TX Bit0 (976~992) 17 984, Bit8 (968~984) 17 976,
1831 00:39:53.077409 TX Bit1 (976~991) 16 983, Bit9 (970~987) 18 978,
1832 00:39:53.077467 TX Bit2 (976~991) 16 983, Bit10 (976~991) 16 983,
1833 00:39:53.077525 TX Bit3 (969~986) 18 977, Bit11 (969~984) 16 976,
1834 00:39:53.077584 TX Bit4 (975~991) 17 983, Bit12 (972~987) 16 979,
1835 00:39:53.077642 TX Bit5 (971~989) 19 980, Bit13 (973~985) 13 979,
1836 00:39:53.077704 TX Bit6 (973~990) 18 981, Bit14 (973~989) 17 981,
1837 00:39:53.077774 TX Bit7 (974~991) 18 982, Bit15 (975~991) 17 983,
1838 00:39:53.077834
1839 00:39:53.077891 Write Rank1 MR14 =0xa
1840 00:39:53.077949
1841 00:39:53.078006 CH=0, VrefRange= 0, VrefLevel = 10
1842 00:39:53.078064 TX Bit0 (976~993) 18 984, Bit8 (968~985) 18 976,
1843 00:39:53.078122 TX Bit1 (975~991) 17 983, Bit9 (969~988) 20 978,
1844 00:39:53.078180 TX Bit2 (976~992) 17 984, Bit10 (975~991) 17 983,
1845 00:39:53.078238 TX Bit3 (969~987) 19 978, Bit11 (968~985) 18 976,
1846 00:39:53.078296 TX Bit4 (974~991) 18 982, Bit12 (971~988) 18 979,
1847 00:39:53.078353 TX Bit5 (971~990) 20 980, Bit13 (972~986) 15 979,
1848 00:39:53.078411 TX Bit6 (973~991) 19 982, Bit14 (971~989) 19 980,
1849 00:39:53.078469 TX Bit7 (973~991) 19 982, Bit15 (974~992) 19 983,
1850 00:39:53.078526
1851 00:39:53.078582 Write Rank1 MR14 =0xc
1852 00:39:53.078640
1853 00:39:53.078697 CH=0, VrefRange= 0, VrefLevel = 12
1854 00:39:53.078755 TX Bit0 (976~994) 19 985, Bit8 (968~985) 18 976,
1855 00:39:53.078812 TX Bit1 (975~991) 17 983, Bit9 (969~989) 21 979,
1856 00:39:53.078870 TX Bit2 (976~992) 17 984, Bit10 (975~992) 18 983,
1857 00:39:53.078928 TX Bit3 (969~987) 19 978, Bit11 (968~986) 19 977,
1858 00:39:53.078986 TX Bit4 (974~992) 19 983, Bit12 (970~989) 20 979,
1859 00:39:53.079044 TX Bit5 (971~990) 20 980, Bit13 (972~986) 15 979,
1860 00:39:53.079102 TX Bit6 (972~991) 20 981, Bit14 (971~990) 20 980,
1861 00:39:53.079160 TX Bit7 (972~992) 21 982, Bit15 (974~992) 19 983,
1862 00:39:53.079218
1863 00:39:53.079275 Write Rank1 MR14 =0xe
1864 00:39:53.079332
1865 00:39:53.079389 CH=0, VrefRange= 0, VrefLevel = 14
1866 00:39:53.079458 TX Bit0 (976~994) 19 985, Bit8 (968~986) 19 977,
1867 00:39:53.079517 TX Bit1 (974~992) 19 983, Bit9 (969~989) 21 979,
1868 00:39:53.079574 TX Bit2 (976~993) 18 984, Bit10 (975~993) 19 984,
1869 00:39:53.079633 TX Bit3 (969~988) 20 978, Bit11 (968~986) 19 977,
1870 00:39:53.079692 TX Bit4 (973~992) 20 982, Bit12 (970~990) 21 980,
1871 00:39:53.079773 TX Bit5 (970~990) 21 980, Bit13 (971~987) 17 979,
1872 00:39:53.079833 TX Bit6 (971~991) 21 981, Bit14 (970~990) 21 980,
1873 00:39:53.079891 TX Bit7 (972~992) 21 982, Bit15 (974~993) 20 983,
1874 00:39:53.079949
1875 00:39:53.080005 Write Rank1 MR14 =0x10
1876 00:39:53.080062
1877 00:39:53.080120 CH=0, VrefRange= 0, VrefLevel = 16
1878 00:39:53.080177 TX Bit0 (976~995) 20 985, Bit8 (967~987) 21 977,
1879 00:39:53.080235 TX Bit1 (974~992) 19 983, Bit9 (969~990) 22 979,
1880 00:39:53.080293 TX Bit2 (976~993) 18 984, Bit10 (975~993) 19 984,
1881 00:39:53.080351 TX Bit3 (969~989) 21 979, Bit11 (968~987) 20 977,
1882 00:39:53.080409 TX Bit4 (973~993) 21 983, Bit12 (969~990) 22 979,
1883 00:39:53.080467 TX Bit5 (970~991) 22 980, Bit13 (971~989) 19 980,
1884 00:39:53.080525 TX Bit6 (972~992) 21 982, Bit14 (970~990) 21 980,
1885 00:39:53.080583 TX Bit7 (972~993) 22 982, Bit15 (974~993) 20 983,
1886 00:39:53.080641
1887 00:39:53.080698 Write Rank1 MR14 =0x12
1888 00:39:53.080755
1889 00:39:53.080812 CH=0, VrefRange= 0, VrefLevel = 18
1890 00:39:53.080870 TX Bit0 (975~995) 21 985, Bit8 (967~987) 21 977,
1891 00:39:53.080929 TX Bit1 (974~993) 20 983, Bit9 (969~990) 22 979,
1892 00:39:53.080987 TX Bit2 (975~994) 20 984, Bit10 (975~994) 20 984,
1893 00:39:53.081045 TX Bit3 (968~989) 22 978, Bit11 (968~988) 21 978,
1894 00:39:53.081103 TX Bit4 (973~993) 21 983, Bit12 (969~990) 22 979,
1895 00:39:53.081161 TX Bit5 (970~991) 22 980, Bit13 (970~989) 20 979,
1896 00:39:53.081416 TX Bit6 (971~992) 22 981, Bit14 (969~991) 23 980,
1897 00:39:53.081483 TX Bit7 (972~993) 22 982, Bit15 (974~993) 20 983,
1898 00:39:53.081543
1899 00:39:53.081601 Write Rank1 MR14 =0x14
1900 00:39:53.081659
1901 00:39:53.081716 CH=0, VrefRange= 0, VrefLevel = 20
1902 00:39:53.081802 TX Bit0 (975~996) 22 985, Bit8 (967~988) 22 977,
1903 00:39:53.081899 TX Bit1 (973~994) 22 983, Bit9 (968~990) 23 979,
1904 00:39:53.081962 TX Bit2 (975~994) 20 984, Bit10 (974~994) 21 984,
1905 00:39:53.082022 TX Bit3 (968~990) 23 979, Bit11 (968~989) 22 978,
1906 00:39:53.209066 TX Bit4 (972~994) 23 983, Bit12 (969~991) 23 980,
1907 00:39:53.209341 TX Bit5 (970~991) 22 980, Bit13 (970~990) 21 980,
1908 00:39:53.209517 TX Bit6 (970~992) 23 981, Bit14 (969~991) 23 980,
1909 00:39:53.209675 TX Bit7 (971~994) 24 982, Bit15 (974~994) 21 984,
1910 00:39:53.209858
1911 00:39:53.210012 Write Rank1 MR14 =0x16
1912 00:39:53.210163
1913 00:39:53.210346 CH=0, VrefRange= 0, VrefLevel = 22
1914 00:39:53.210501 TX Bit0 (975~997) 23 986, Bit8 (967~988) 22 977,
1915 00:39:53.210651 TX Bit1 (973~994) 22 983, Bit9 (968~991) 24 979,
1916 00:39:53.210829 TX Bit2 (975~995) 21 985, Bit10 (974~995) 22 984,
1917 00:39:53.210981 TX Bit3 (968~990) 23 979, Bit11 (967~989) 23 978,
1918 00:39:53.211130 TX Bit4 (972~994) 23 983, Bit12 (969~991) 23 980,
1919 00:39:53.211314 TX Bit5 (969~992) 24 980, Bit13 (969~990) 22 979,
1920 00:39:53.211483 TX Bit6 (970~993) 24 981, Bit14 (969~991) 23 980,
1921 00:39:53.211636 TX Bit7 (971~994) 24 982, Bit15 (973~994) 22 983,
1922 00:39:53.211811
1923 00:39:53.211959 Write Rank1 MR14 =0x18
1924 00:39:53.212107
1925 00:39:53.212284 CH=0, VrefRange= 0, VrefLevel = 24
1926 00:39:53.212435 TX Bit0 (975~997) 23 986, Bit8 (967~990) 24 978,
1927 00:39:53.212581 TX Bit1 (973~995) 23 984, Bit9 (968~991) 24 979,
1928 00:39:53.212757 TX Bit2 (975~996) 22 985, Bit10 (974~996) 23 985,
1929 00:39:53.212906 TX Bit3 (968~990) 23 979, Bit11 (967~990) 24 978,
1930 00:39:53.213050 TX Bit4 (972~995) 24 983, Bit12 (968~991) 24 979,
1931 00:39:53.213230 TX Bit5 (969~992) 24 980, Bit13 (969~990) 22 979,
1932 00:39:53.213380 TX Bit6 (970~993) 24 981, Bit14 (969~991) 23 980,
1933 00:39:53.213523 TX Bit7 (971~995) 25 983, Bit15 (973~995) 23 984,
1934 00:39:53.213706
1935 00:39:53.213868 Write Rank1 MR14 =0x1a
1936 00:39:53.214002
1937 00:39:53.214127 CH=0, VrefRange= 0, VrefLevel = 26
1938 00:39:53.214287 TX Bit0 (974~998) 25 986, Bit8 (966~990) 25 978,
1939 00:39:53.214431 TX Bit1 (973~995) 23 984, Bit9 (968~991) 24 979,
1940 00:39:53.214557 TX Bit2 (975~996) 22 985, Bit10 (973~996) 24 984,
1941 00:39:53.214709 TX Bit3 (968~991) 24 979, Bit11 (967~990) 24 978,
1942 00:39:53.214843 TX Bit4 (971~995) 25 983, Bit12 (968~992) 25 980,
1943 00:39:53.214967 TX Bit5 (969~992) 24 980, Bit13 (969~990) 22 979,
1944 00:39:53.215136 TX Bit6 (970~993) 24 981, Bit14 (969~992) 24 980,
1945 00:39:53.215279 TX Bit7 (971~996) 26 983, Bit15 (972~995) 24 983,
1946 00:39:53.215412
1947 00:39:53.215560 Write Rank1 MR14 =0x1c
1948 00:39:53.215696
1949 00:39:53.215819 CH=0, VrefRange= 0, VrefLevel = 28
1950 00:39:53.215966 TX Bit0 (974~998) 25 986, Bit8 (966~990) 25 978,
1951 00:39:53.216119 TX Bit1 (972~995) 24 983, Bit9 (968~991) 24 979,
1952 00:39:53.216247 TX Bit2 (975~997) 23 986, Bit10 (973~997) 25 985,
1953 00:39:53.216380 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1954 00:39:53.216543 TX Bit4 (971~995) 25 983, Bit12 (968~992) 25 980,
1955 00:39:53.216673 TX Bit5 (969~992) 24 980, Bit13 (969~991) 23 980,
1956 00:39:53.216798 TX Bit6 (969~994) 26 981, Bit14 (969~992) 24 980,
1957 00:39:53.216961 TX Bit7 (970~996) 27 983, Bit15 (971~996) 26 983,
1958 00:39:53.217093
1959 00:39:53.217217 Write Rank1 MR14 =0x1e
1960 00:39:53.217381
1961 00:39:53.217513 CH=0, VrefRange= 0, VrefLevel = 30
1962 00:39:53.217638 TX Bit0 (974~998) 25 986, Bit8 (966~990) 25 978,
1963 00:39:53.217799 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
1964 00:39:53.217935 TX Bit2 (974~997) 24 985, Bit10 (973~997) 25 985,
1965 00:39:53.218062 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1966 00:39:53.218218 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
1967 00:39:53.218353 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
1968 00:39:53.218478 TX Bit6 (969~994) 26 981, Bit14 (968~992) 25 980,
1969 00:39:53.218630 TX Bit7 (970~997) 28 983, Bit15 (971~996) 26 983,
1970 00:39:53.218770
1971 00:39:53.218879 Write Rank1 MR14 =0x20
1972 00:39:53.219016
1973 00:39:53.219132 CH=0, VrefRange= 0, VrefLevel = 32
1974 00:39:53.219242 TX Bit0 (973~998) 26 985, Bit8 (967~990) 24 978,
1975 00:39:53.219378 TX Bit1 (972~996) 25 984, Bit9 (968~990) 23 979,
1976 00:39:53.219515 TX Bit2 (974~998) 25 986, Bit10 (972~998) 27 985,
1977 00:39:53.219640 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1978 00:39:53.219752 TX Bit4 (971~997) 27 984, Bit12 (968~992) 25 980,
1979 00:39:53.219889 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
1980 00:39:53.220009 TX Bit6 (969~995) 27 982, Bit14 (968~992) 25 980,
1981 00:39:53.220120 TX Bit7 (971~997) 27 984, Bit15 (971~995) 25 983,
1982 00:39:53.220251
1983 00:39:53.220367 Write Rank1 MR14 =0x22
1984 00:39:53.220476
1985 00:39:53.220609 CH=0, VrefRange= 0, VrefLevel = 34
1986 00:39:53.220729 TX Bit0 (973~998) 26 985, Bit8 (967~990) 24 978,
1987 00:39:53.220840 TX Bit1 (972~996) 25 984, Bit9 (968~990) 23 979,
1988 00:39:53.220976 TX Bit2 (974~998) 25 986, Bit10 (972~998) 27 985,
1989 00:39:53.221096 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1990 00:39:53.221206 TX Bit4 (971~997) 27 984, Bit12 (968~992) 25 980,
1991 00:39:53.221339 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
1992 00:39:53.221457 TX Bit6 (969~995) 27 982, Bit14 (968~992) 25 980,
1993 00:39:53.221567 TX Bit7 (971~997) 27 984, Bit15 (971~995) 25 983,
1994 00:39:53.221699
1995 00:39:53.221815 Write Rank1 MR14 =0x24
1996 00:39:53.221923
1997 00:39:53.222056 CH=0, VrefRange= 0, VrefLevel = 36
1998 00:39:53.222418 TX Bit0 (973~998) 26 985, Bit8 (967~990) 24 978,
1999 00:39:53.222548 TX Bit1 (972~996) 25 984, Bit9 (968~990) 23 979,
2000 00:39:53.222674 TX Bit2 (974~998) 25 986, Bit10 (972~998) 27 985,
2001 00:39:53.222801 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
2002 00:39:53.222914 TX Bit4 (971~997) 27 984, Bit12 (968~992) 25 980,
2003 00:39:53.223041 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
2004 00:39:53.223164 TX Bit6 (969~995) 27 982, Bit14 (968~992) 25 980,
2005 00:39:53.223274 TX Bit7 (971~997) 27 984, Bit15 (971~995) 25 983,
2006 00:39:53.223400
2007 00:39:53.223535 Write Rank1 MR14 =0x26
2008 00:39:53.223646
2009 00:39:53.223775 CH=0, VrefRange= 0, VrefLevel = 38
2010 00:39:53.223888 TX Bit0 (973~998) 26 985, Bit8 (967~990) 24 978,
2011 00:39:53.223988 TX Bit1 (972~996) 25 984, Bit9 (968~990) 23 979,
2012 00:39:53.224093 TX Bit2 (974~998) 25 986, Bit10 (972~998) 27 985,
2013 00:39:53.224210 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
2014 00:39:53.224329 TX Bit4 (971~997) 27 984, Bit12 (968~992) 25 980,
2015 00:39:53.224432 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
2016 00:39:53.224538 TX Bit6 (969~995) 27 982, Bit14 (968~992) 25 980,
2017 00:39:53.224655 TX Bit7 (971~997) 27 984, Bit15 (971~995) 25 983,
2018 00:39:53.224754
2019 00:39:53.224854
2020 00:39:53.224974 TX Vref found, early break! 380< 382
2021 00:39:53.225075 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2022 00:39:53.225176 u1DelayCellOfst[0]=7 cells (6 PI)
2023 00:39:53.225296 u1DelayCellOfst[1]=6 cells (5 PI)
2024 00:39:53.225397 u1DelayCellOfst[2]=9 cells (7 PI)
2025 00:39:53.225494 u1DelayCellOfst[3]=0 cells (0 PI)
2026 00:39:53.225612 u1DelayCellOfst[4]=6 cells (5 PI)
2027 00:39:53.225712 u1DelayCellOfst[5]=2 cells (2 PI)
2028 00:39:53.225809 u1DelayCellOfst[6]=3 cells (3 PI)
2029 00:39:53.225927 u1DelayCellOfst[7]=6 cells (5 PI)
2030 00:39:53.226026 Byte0, DQ PI dly=979, DQM PI dly= 982
2031 00:39:53.226124 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2032 00:39:53.226248
2033 00:39:53.226350 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2034 00:39:53.226449
2035 00:39:53.226574 u1DelayCellOfst[8]=0 cells (0 PI)
2036 00:39:53.226682 u1DelayCellOfst[9]=1 cells (1 PI)
2037 00:39:53.226778 u1DelayCellOfst[10]=9 cells (7 PI)
2038 00:39:53.226899 u1DelayCellOfst[11]=0 cells (0 PI)
2039 00:39:53.227000 u1DelayCellOfst[12]=2 cells (2 PI)
2040 00:39:53.227096 u1DelayCellOfst[13]=2 cells (2 PI)
2041 00:39:53.227218 u1DelayCellOfst[14]=2 cells (2 PI)
2042 00:39:53.227318 u1DelayCellOfst[15]=6 cells (5 PI)
2043 00:39:53.227420 Byte1, DQ PI dly=978, DQM PI dly= 981
2044 00:39:53.227550 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2045 00:39:53.227653
2046 00:39:53.227750 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2047 00:39:53.227875
2048 00:39:53.227977 Write Rank1 MR14 =0x20
2049 00:39:53.228074
2050 00:39:53.228192 Final TX Range 0 Vref 32
2051 00:39:53.228295
2052 00:39:53.228390 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2053 00:39:53.228510
2054 00:39:53.228619 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2055 00:39:53.228729 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2056 00:39:53.228836 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2057 00:39:53.228949 Write Rank1 MR3 =0xb0
2058 00:39:53.229054 DramC Write-DBI on
2059 00:39:53.229143 ==
2060 00:39:53.229238 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2061 00:39:53.229344 fsp= 1, odt_onoff= 1, Byte mode= 0
2062 00:39:53.229434 ==
2063 00:39:53.229525 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2064 00:39:53.229630
2065 00:39:53.229718 Begin, DQ Scan Range 701~765
2066 00:39:53.229807
2067 00:39:53.229910
2068 00:39:53.229998 TX Vref Scan disable
2069 00:39:53.230086 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2070 00:39:53.230200 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2071 00:39:53.230293 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2072 00:39:53.230383 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2073 00:39:53.230494 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2074 00:39:53.230587 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2075 00:39:53.230675 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2076 00:39:53.230783 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2077 00:39:53.230875 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2078 00:39:53.230963 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2079 00:39:53.231071 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2080 00:39:53.231162 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2081 00:39:53.231250 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2082 00:39:53.231358 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2083 00:39:53.231456 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2084 00:39:53.231546 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2085 00:39:53.231658 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2086 00:39:53.231751 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2087 00:39:53.231839 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2088 00:39:53.231951 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2089 00:39:53.232043 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2090 00:39:53.232132 Byte0, DQ PI dly=728, DQM PI dly= 728
2091 00:39:53.232243 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2092 00:39:53.232348
2093 00:39:53.232441 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2094 00:39:53.232530
2095 00:39:53.232640 Byte1, DQ PI dly=723, DQM PI dly= 723
2096 00:39:53.232734 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2097 00:39:53.232822
2098 00:39:53.232933 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2099 00:39:53.233028
2100 00:39:53.233115 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2101 00:39:53.233224 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2102 00:39:53.233319 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2103 00:39:53.233408 Write Rank1 MR3 =0x30
2104 00:39:53.233513 DramC Write-DBI off
2105 00:39:53.233605
2106 00:39:53.233691 [DATLAT]
2107 00:39:53.233797 Freq=1600, CH0 RK1, use_rxtx_scan=0
2108 00:39:53.233891
2109 00:39:53.233977 DATLAT Default: 0x10
2110 00:39:53.234083 7, 0xFFFF, sum=0
2111 00:39:53.234180 8, 0xFFFF, sum=0
2112 00:39:53.234269 9, 0xFFFF, sum=0
2113 00:39:53.234375 10, 0xFFFF, sum=0
2114 00:39:53.234473 11, 0xFFFF, sum=0
2115 00:39:53.234562 12, 0xFFFF, sum=0
2116 00:39:53.234668 13, 0xFFFF, sum=0
2117 00:39:53.234764 14, 0x0, sum=1
2118 00:39:53.234853 15, 0x0, sum=2
2119 00:39:53.235176 16, 0x0, sum=3
2120 00:39:53.235286 17, 0x0, sum=4
2121 00:39:53.235379 pattern=2 first_step=14 total pass=5 best_step=16
2122 00:39:53.235473 ==
2123 00:39:53.235538 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2124 00:39:53.235601 fsp= 1, odt_onoff= 1, Byte mode= 0
2125 00:39:53.235662 ==
2126 00:39:53.235722 Start DQ dly to find pass range UseTestEngine =1
2127 00:39:53.235782 x-axis: bit #, y-axis: DQ dly (-127~63)
2128 00:39:53.235843 RX Vref Scan = 0
2129 00:39:53.235902 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2130 00:39:53.235964 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2131 00:39:53.236025 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2132 00:39:53.236086 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2133 00:39:53.236147 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2134 00:39:53.236208 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2135 00:39:53.236267 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2136 00:39:53.236326 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2137 00:39:53.236386 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2138 00:39:53.236446 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2139 00:39:53.236506 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2140 00:39:53.236565 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2141 00:39:53.236625 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2142 00:39:53.236685 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2143 00:39:53.236744 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2144 00:39:53.236802 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2145 00:39:53.236861 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2146 00:39:53.236920 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2147 00:39:53.236980 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2148 00:39:53.237040 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2149 00:39:53.237099 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2150 00:39:53.237159 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2151 00:39:53.237218 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2152 00:39:53.237277 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2153 00:39:53.237337 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2154 00:39:53.237396 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2155 00:39:53.237455 0, [0] xxxoxxxx oxxoxxxx [MSB]
2156 00:39:53.237516 1, [0] xxxoxoxx ooxooxxx [MSB]
2157 00:39:53.237575 2, [0] xxxoxoxx ooxoooxx [MSB]
2158 00:39:53.237634 3, [0] xxxoxooo ooxoooox [MSB]
2159 00:39:53.237694 4, [0] xxxoxooo ooxoooox [MSB]
2160 00:39:53.237754 5, [0] xoxooooo ooxoooox [MSB]
2161 00:39:53.237812 6, [0] oooooooo ooxooooo [MSB]
2162 00:39:53.237871 33, [0] oooooooo xooooooo [MSB]
2163 00:39:53.237931 34, [0] oooxoooo xooooooo [MSB]
2164 00:39:53.237990 35, [0] oooxoxoo xooxoooo [MSB]
2165 00:39:53.238050 36, [0] oooxoxoo xooxoxoo [MSB]
2166 00:39:53.238109 37, [0] oooxoxoo xxoxoxoo [MSB]
2167 00:39:53.238168 38, [0] oooxoxxo xxoxxxxo [MSB]
2168 00:39:53.238227 39, [0] oxxxoxxx xxoxxxxo [MSB]
2169 00:39:53.238287 40, [0] oxxxxxxx xxoxxxxx [MSB]
2170 00:39:53.238345 41, [0] xxxxxxxx xxoxxxxx [MSB]
2171 00:39:53.238405 42, [0] xxxxxxxx xxoxxxxx [MSB]
2172 00:39:53.238464 43, [0] xxxxxxxx xxoxxxxx [MSB]
2173 00:39:53.238522 44, [0] xxxxxxxx xxxxxxxx [MSB]
2174 00:39:53.238582 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
2175 00:39:53.238641 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2176 00:39:53.238699 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2177 00:39:53.238757 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2178 00:39:53.238815 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
2179 00:39:53.238873 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2180 00:39:53.238931 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2181 00:39:53.239004 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2182 00:39:53.239078 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
2183 00:39:53.242455 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2184 00:39:53.245909 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2185 00:39:53.252526 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2186 00:39:53.256050 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2187 00:39:53.259299 iDelay=44, Bit 13, Center 18 (2 ~ 35) 34
2188 00:39:53.262478 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
2189 00:39:53.265991 iDelay=44, Bit 15, Center 22 (6 ~ 39) 34
2190 00:39:53.266084 ==
2191 00:39:53.269479 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2192 00:39:53.272607 fsp= 1, odt_onoff= 1, Byte mode= 0
2193 00:39:53.272700 ==
2194 00:39:53.275989 DQS Delay:
2195 00:39:53.276081 DQS0 = 0, DQS1 = 0
2196 00:39:53.279022 DQM Delay:
2197 00:39:53.279111 DQM0 = 20, DQM1 = 19
2198 00:39:53.279184 DQ Delay:
2199 00:39:53.282657 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15
2200 00:39:53.286059 DQ4 =22, DQ5 =17, DQ6 =20, DQ7 =20
2201 00:39:53.289380 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
2202 00:39:53.292796 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
2203 00:39:53.292887
2204 00:39:53.292959
2205 00:39:53.293025
2206 00:39:53.296093 [DramC_TX_OE_Calibration] TA2
2207 00:39:53.299174 Original DQ_B0 (3 6) =30, OEN = 27
2208 00:39:53.302942 Original DQ_B1 (3 6) =30, OEN = 27
2209 00:39:53.306058 23, 0x0, End_B0=23 End_B1=23
2210 00:39:53.309556 24, 0x0, End_B0=24 End_B1=24
2211 00:39:53.309649 25, 0x0, End_B0=25 End_B1=25
2212 00:39:53.313114 26, 0x0, End_B0=26 End_B1=26
2213 00:39:53.316350 27, 0x0, End_B0=27 End_B1=27
2214 00:39:53.319564 28, 0x0, End_B0=28 End_B1=28
2215 00:39:53.319657 29, 0x0, End_B0=29 End_B1=29
2216 00:39:53.323147 30, 0x0, End_B0=30 End_B1=30
2217 00:39:53.326080 31, 0xFFFF, End_B0=30 End_B1=30
2218 00:39:53.332662 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2219 00:39:53.336010 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2220 00:39:53.336102
2221 00:39:53.339865
2222 00:39:53.339955 Write Rank1 MR23 =0x3f
2223 00:39:53.340027 [DQSOSC]
2224 00:39:53.349505 [DQSOSCAuto] RK1, (LSB)MR18= 0xdbdb, (MSB)MR19= 0x202, tDQSOscB0 = 430 ps tDQSOscB1 = 430 ps
2225 00:39:53.356271 CH0_RK1: MR19=0x202, MR18=0xDBDB, DQSOSC=430, MR23=63, INC=13, DEC=19
2226 00:39:53.356365 Write Rank1 MR23 =0x3f
2227 00:39:53.356437 [DQSOSC]
2228 00:39:53.366499 [DQSOSCAuto] RK1, (LSB)MR18= 0xd9d9, (MSB)MR19= 0x202, tDQSOscB0 = 432 ps tDQSOscB1 = 432 ps
2229 00:39:53.369786 CH0 RK1: MR19=202, MR18=D9D9
2230 00:39:53.372921 [RxdqsGatingPostProcess] freq 1600
2231 00:39:53.376212 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2232 00:39:53.379600 Rank: 0
2233 00:39:53.379692 best DQS0 dly(2T, 0.5T) = (2, 5)
2234 00:39:53.383364 best DQS1 dly(2T, 0.5T) = (2, 5)
2235 00:39:53.386633 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2236 00:39:53.389660 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2237 00:39:53.389752 Rank: 1
2238 00:39:53.393568 best DQS0 dly(2T, 0.5T) = (2, 6)
2239 00:39:53.396215 best DQS1 dly(2T, 0.5T) = (2, 6)
2240 00:39:53.400010 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2241 00:39:53.403178 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2242 00:39:53.409804 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2243 00:39:53.409898 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2244 00:39:53.416544 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2245 00:39:53.419753 Write Rank0 MR13 =0x59
2246 00:39:53.419872 ==
2247 00:39:53.423519 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2248 00:39:53.426990 fsp= 1, odt_onoff= 1, Byte mode= 0
2249 00:39:53.427082 ==
2250 00:39:53.430101 === u2Vref_new: 0x56 --> 0x3a
2251 00:39:53.433187 === u2Vref_new: 0x58 --> 0x58
2252 00:39:53.436430 === u2Vref_new: 0x5a --> 0x5a
2253 00:39:53.439816 === u2Vref_new: 0x5c --> 0x78
2254 00:39:53.443792 === u2Vref_new: 0x5e --> 0x7a
2255 00:39:53.446518 === u2Vref_new: 0x60 --> 0x90
2256 00:39:53.449691 [CA 0] Center 38 (13~63) winsize 51
2257 00:39:53.453375 [CA 1] Center 37 (12~63) winsize 52
2258 00:39:53.456663 [CA 2] Center 34 (6~63) winsize 58
2259 00:39:53.456755 [CA 3] Center 34 (6~63) winsize 58
2260 00:39:53.459831 [CA 4] Center 34 (6~63) winsize 58
2261 00:39:53.463134 [CA 5] Center 28 (-2~58) winsize 61
2262 00:39:53.463225
2263 00:39:53.466471 [CATrainingPosCal] consider 1 rank data
2264 00:39:53.470298 u2DelayCellTimex100 = 735/100 ps
2265 00:39:53.473451 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2266 00:39:53.479902 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2267 00:39:53.483396 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2268 00:39:53.486648 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2269 00:39:53.489891 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2270 00:39:53.493423 CA5 delay=28 (-2~58),Diff = 0 PI (0 cell)
2271 00:39:53.493515
2272 00:39:53.497451 CA PerBit enable=1, Macro0, CA PI delay=28
2273 00:39:53.500061 === u2Vref_new: 0x60 --> 0x90
2274 00:39:53.500152
2275 00:39:53.503070 Vref(ca) range 1: 32
2276 00:39:53.503161
2277 00:39:53.503234 CS Dly= 11 (42-0-32)
2278 00:39:53.506717 Write Rank0 MR13 =0xd8
2279 00:39:53.509920 Write Rank0 MR13 =0xd8
2280 00:39:53.510011 Write Rank0 MR12 =0x60
2281 00:39:53.513069 Write Rank1 MR13 =0x59
2282 00:39:53.513159 ==
2283 00:39:53.516669 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2284 00:39:53.519900 fsp= 1, odt_onoff= 1, Byte mode= 0
2285 00:39:53.519992 ==
2286 00:39:53.522851 === u2Vref_new: 0x56 --> 0x3a
2287 00:39:53.526647 === u2Vref_new: 0x58 --> 0x58
2288 00:39:53.529683 === u2Vref_new: 0x5a --> 0x5a
2289 00:39:53.533014 === u2Vref_new: 0x5c --> 0x78
2290 00:39:53.536552 === u2Vref_new: 0x5e --> 0x7a
2291 00:39:53.540013 === u2Vref_new: 0x60 --> 0x90
2292 00:39:53.543811 [CA 0] Center 38 (14~63) winsize 50
2293 00:39:53.546780 [CA 1] Center 37 (12~63) winsize 52
2294 00:39:53.549953 [CA 2] Center 35 (7~63) winsize 57
2295 00:39:53.553539 [CA 3] Center 35 (7~63) winsize 57
2296 00:39:53.556505 [CA 4] Center 34 (6~63) winsize 58
2297 00:39:53.559852 [CA 5] Center 27 (-2~57) winsize 60
2298 00:39:53.559943
2299 00:39:53.563688 [CATrainingPosCal] consider 2 rank data
2300 00:39:53.563779 u2DelayCellTimex100 = 735/100 ps
2301 00:39:53.570167 CA0 delay=38 (14~63),Diff = 11 PI (14 cell)
2302 00:39:53.573394 CA1 delay=37 (12~63),Diff = 10 PI (13 cell)
2303 00:39:53.576537 CA2 delay=35 (7~63),Diff = 8 PI (10 cell)
2304 00:39:53.579967 CA3 delay=35 (7~63),Diff = 8 PI (10 cell)
2305 00:39:53.583181 CA4 delay=34 (6~63),Diff = 7 PI (9 cell)
2306 00:39:53.587316 CA5 delay=27 (-2~57),Diff = 0 PI (0 cell)
2307 00:39:53.587413
2308 00:39:53.590378 CA PerBit enable=1, Macro0, CA PI delay=27
2309 00:39:53.593684 === u2Vref_new: 0x5e --> 0x7a
2310 00:39:53.593775
2311 00:39:53.596591 Vref(ca) range 1: 30
2312 00:39:53.596681
2313 00:39:53.596751 CS Dly= 11 (42-0-32)
2314 00:39:53.600294 Write Rank1 MR13 =0xd8
2315 00:39:53.603351 Write Rank1 MR13 =0xd8
2316 00:39:53.603452 Write Rank1 MR12 =0x5e
2317 00:39:53.606906 [RankSwap] Rank num 2, (Multi 1), Rank 0
2318 00:39:53.610264 Write Rank0 MR2 =0xad
2319 00:39:53.610354 [Write Leveling]
2320 00:39:53.613532 delay byte0 byte1 byte2 byte3
2321 00:39:53.613623
2322 00:39:53.617345 10 0 0
2323 00:39:53.617437 11 0 0
2324 00:39:53.620637 12 0 0
2325 00:39:53.620730 13 0 0
2326 00:39:53.620804 14 0 0
2327 00:39:53.623726 15 0 0
2328 00:39:53.623817 16 0 0
2329 00:39:53.627176 17 0 0
2330 00:39:53.627268 18 0 0
2331 00:39:53.627342 19 0 0
2332 00:39:53.630586 20 0 0
2333 00:39:53.630678 21 0 0
2334 00:39:53.634143 22 0 0
2335 00:39:53.634235 23 0 0
2336 00:39:53.637190 24 0 ff
2337 00:39:53.637289 25 0 ff
2338 00:39:53.637363 26 0 ff
2339 00:39:53.640419 27 0 ff
2340 00:39:53.640511 28 0 ff
2341 00:39:53.643552 29 0 ff
2342 00:39:53.643643 30 0 ff
2343 00:39:53.647347 31 0 ff
2344 00:39:53.647447 32 0 ff
2345 00:39:53.650558 33 ff ff
2346 00:39:53.650649 34 ff ff
2347 00:39:53.650722 35 ff ff
2348 00:39:53.653615 36 ff ff
2349 00:39:53.653707 37 ff ff
2350 00:39:53.657102 38 ff ff
2351 00:39:53.657193 39 ff ff
2352 00:39:53.664014 pass bytecount = 0xff (0xff: all bytes pass)
2353 00:39:53.664106
2354 00:39:53.664178 DQS0 dly: 33
2355 00:39:53.664245 DQS1 dly: 24
2356 00:39:53.666935 Write Rank0 MR2 =0x2d
2357 00:39:53.670327 [RankSwap] Rank num 2, (Multi 1), Rank 0
2358 00:39:53.673872 Write Rank0 MR1 =0xd6
2359 00:39:53.673962 [Gating]
2360 00:39:53.674032 ==
2361 00:39:53.677506 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2362 00:39:53.680344 fsp= 1, odt_onoff= 1, Byte mode= 0
2363 00:39:53.680434 ==
2364 00:39:53.687294 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2365 00:39:53.690595 3 1 4 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2366 00:39:53.693791 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2367 00:39:53.700874 3 1 12 |3535 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2368 00:39:53.704166 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2369 00:39:53.707209 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2370 00:39:53.714193 [Byte 0] Lead/lag falling Transition (3, 1, 20)
2371 00:39:53.717414 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2372 00:39:53.720447 3 1 28 |3535 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2373 00:39:53.723916 3 2 0 |3434 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2374 00:39:53.730708 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2375 00:39:53.733828 3 2 8 |3434 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2376 00:39:53.737685 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2377 00:39:53.744357 3 2 16 |1110 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2378 00:39:53.747374 3 2 20 |403 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2379 00:39:53.750876 3 2 24 |3d3d 302 |(11 11)(11 11) |(1 1)(0 0)| 0
2380 00:39:53.757068 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2381 00:39:53.760627 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2382 00:39:53.764079 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2383 00:39:53.767251 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2384 00:39:53.773936 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2385 00:39:53.777144 3 3 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2386 00:39:53.780877 3 3 20 |403 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2387 00:39:53.787400 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2388 00:39:53.790815 [Byte 0] Lead/lag falling Transition (3, 3, 24)
2389 00:39:53.794110 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2390 00:39:53.800875 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2391 00:39:53.804401 [Byte 1] Lead/lag Transition tap number (1)
2392 00:39:53.807364 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2393 00:39:53.810550 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2394 00:39:53.817508 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2395 00:39:53.820627 3 4 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2396 00:39:53.824030 3 4 20 |b0a 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2397 00:39:53.830746 3 4 24 |3d3d 2f2e |(11 11)(11 11) |(1 1)(1 1)| 0
2398 00:39:53.834073 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2399 00:39:53.837599 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2400 00:39:53.840996 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2401 00:39:53.847262 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2402 00:39:53.851283 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2403 00:39:53.854264 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2404 00:39:53.860620 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2405 00:39:53.864338 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2406 00:39:53.867668 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2407 00:39:53.873885 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2408 00:39:53.877585 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2409 00:39:53.880817 [Byte 0] Lead/lag falling Transition (3, 6, 4)
2410 00:39:53.884136 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2411 00:39:53.890899 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2412 00:39:53.894096 [Byte 0] Lead/lag Transition tap number (3)
2413 00:39:53.897504 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2414 00:39:53.900670 [Byte 1] Lead/lag falling Transition (3, 6, 16)
2415 00:39:53.907909 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2416 00:39:53.910956 [Byte 1] Lead/lag Transition tap number (2)
2417 00:39:53.914371 3 6 24 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
2418 00:39:53.917368 [Byte 0]First pass (3, 6, 24)
2419 00:39:53.920613 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2420 00:39:53.924071 [Byte 1]First pass (3, 6, 28)
2421 00:39:53.927554 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2422 00:39:53.930854 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2423 00:39:53.937279 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2424 00:39:53.940992 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2425 00:39:53.943837 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2426 00:39:53.947607 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2427 00:39:53.950898 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2428 00:39:53.957356 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2429 00:39:53.960598 All bytes gating window > 1UI, Early break!
2430 00:39:53.960690
2431 00:39:53.963878 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
2432 00:39:53.963969
2433 00:39:53.967123 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
2434 00:39:53.967258
2435 00:39:53.967364
2436 00:39:53.967458
2437 00:39:53.970371 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
2438 00:39:53.974216
2439 00:39:53.977404 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2440 00:39:53.977499
2441 00:39:53.977572
2442 00:39:53.977640 Write Rank0 MR1 =0x56
2443 00:39:53.977705
2444 00:39:53.980484 best RODT dly(2T, 0.5T) = (2, 3)
2445 00:39:53.980577
2446 00:39:53.984001 best RODT dly(2T, 0.5T) = (2, 3)
2447 00:39:53.984103 ==
2448 00:39:53.991162 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2449 00:39:53.993885 fsp= 1, odt_onoff= 1, Byte mode= 0
2450 00:39:53.993981 ==
2451 00:39:53.996978 Start DQ dly to find pass range UseTestEngine =0
2452 00:39:54.000636 x-axis: bit #, y-axis: DQ dly (-127~63)
2453 00:39:54.004125 RX Vref Scan = 0
2454 00:39:54.007179 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2455 00:39:54.007280 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2456 00:39:54.010637 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2457 00:39:54.013897 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2458 00:39:54.017671 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2459 00:39:54.020758 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2460 00:39:54.023933 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2461 00:39:54.027146 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2462 00:39:54.030469 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2463 00:39:54.030563 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2464 00:39:54.033983 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2465 00:39:54.037141 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2466 00:39:54.040674 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2467 00:39:54.043735 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2468 00:39:54.047267 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2469 00:39:54.050953 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2470 00:39:54.053874 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2471 00:39:54.053968 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2472 00:39:54.057075 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2473 00:39:54.060423 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2474 00:39:54.064042 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2475 00:39:54.067231 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2476 00:39:54.070689 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2477 00:39:54.074404 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2478 00:39:54.074502 -2, [0] xxxoxxxx xoxxxxxo [MSB]
2479 00:39:54.077435 -1, [0] xxxoxxxx xoxxxxxo [MSB]
2480 00:39:54.080740 0, [0] xxxoxxxx ooxxxxxo [MSB]
2481 00:39:54.083797 1, [0] xxxoxxxx ooxxxxxo [MSB]
2482 00:39:54.087167 2, [0] xxooxxxx oooxxxxo [MSB]
2483 00:39:54.090663 3, [0] oxooxxxo oooxxxxo [MSB]
2484 00:39:54.090756 4, [0] oooooxxo ooooooxo [MSB]
2485 00:39:54.093860 32, [0] oooooooo ooooooox [MSB]
2486 00:39:54.097369 33, [0] oooooooo ooooooox [MSB]
2487 00:39:54.100305 34, [0] oooooooo ooooooox [MSB]
2488 00:39:54.103831 35, [0] oooxoooo xxooooox [MSB]
2489 00:39:54.107056 36, [0] oooxoooo xxooooox [MSB]
2490 00:39:54.110728 37, [0] ooxxoooo xxooooox [MSB]
2491 00:39:54.113561 38, [0] ooxxoooo xxooooox [MSB]
2492 00:39:54.113676 39, [0] ooxxooox xxooooox [MSB]
2493 00:39:54.116932 40, [0] oxxxxoox xxxoooox [MSB]
2494 00:39:54.120509 41, [0] oxxxxoox xxxxxxox [MSB]
2495 00:39:54.124002 42, [0] xxxxxxxx xxxxxxxx [MSB]
2496 00:39:54.127225 iDelay=42, Bit 0, Center 22 (3 ~ 41) 39
2497 00:39:54.130818 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
2498 00:39:54.134155 iDelay=42, Bit 2, Center 19 (2 ~ 36) 35
2499 00:39:54.137200 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
2500 00:39:54.140349 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2501 00:39:54.143923 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
2502 00:39:54.146921 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
2503 00:39:54.150250 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
2504 00:39:54.153939 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
2505 00:39:54.160527 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
2506 00:39:54.163901 iDelay=42, Bit 10, Center 20 (2 ~ 39) 38
2507 00:39:54.167143 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
2508 00:39:54.170658 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
2509 00:39:54.173795 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
2510 00:39:54.177074 iDelay=42, Bit 14, Center 23 (5 ~ 41) 37
2511 00:39:54.180926 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
2512 00:39:54.181018 ==
2513 00:39:54.187045 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2514 00:39:54.190416 fsp= 1, odt_onoff= 1, Byte mode= 0
2515 00:39:54.190508 ==
2516 00:39:54.190580 DQS Delay:
2517 00:39:54.190647 DQS0 = 0, DQS1 = 0
2518 00:39:54.194107 DQM Delay:
2519 00:39:54.194199 DQM0 = 20, DQM1 = 19
2520 00:39:54.197382 DQ Delay:
2521 00:39:54.200800 DQ0 =22, DQ1 =21, DQ2 =19, DQ3 =16
2522 00:39:54.203886 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
2523 00:39:54.206866 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
2524 00:39:54.210096 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =14
2525 00:39:54.210188
2526 00:39:54.210259
2527 00:39:54.210325 DramC Write-DBI off
2528 00:39:54.210389 ==
2529 00:39:54.216815 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2530 00:39:54.220317 fsp= 1, odt_onoff= 1, Byte mode= 0
2531 00:39:54.220408 ==
2532 00:39:54.223909 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2533 00:39:54.224037
2534 00:39:54.227006 Begin, DQ Scan Range 920~1176
2535 00:39:54.227098
2536 00:39:54.227169
2537 00:39:54.229958 TX Vref Scan disable
2538 00:39:54.233450 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
2539 00:39:54.237155 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2540 00:39:54.240022 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2541 00:39:54.243398 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2542 00:39:54.246920 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2543 00:39:54.250050 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2544 00:39:54.253487 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2545 00:39:54.256628 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2546 00:39:54.260151 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2547 00:39:54.263170 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2548 00:39:54.266825 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2549 00:39:54.273272 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2550 00:39:54.276493 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2551 00:39:54.279812 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2552 00:39:54.283207 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2553 00:39:54.287001 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2554 00:39:54.290205 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2555 00:39:54.293327 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2556 00:39:54.296675 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2557 00:39:54.299718 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2558 00:39:54.303094 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2559 00:39:54.306254 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2560 00:39:54.309432 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2561 00:39:54.312692 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2562 00:39:54.316212 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2563 00:39:54.319622 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2564 00:39:54.326706 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2565 00:39:54.329556 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2566 00:39:54.333099 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2567 00:39:54.336037 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2568 00:39:54.339727 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2569 00:39:54.342819 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2570 00:39:54.346007 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2571 00:39:54.349365 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2572 00:39:54.352787 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2573 00:39:54.355936 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2574 00:39:54.359195 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2575 00:39:54.362763 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2576 00:39:54.365713 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2577 00:39:54.369446 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2578 00:39:54.372461 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2579 00:39:54.378836 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2580 00:39:54.382103 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2581 00:39:54.385219 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2582 00:39:54.388853 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2583 00:39:54.392008 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2584 00:39:54.395844 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2585 00:39:54.398987 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2586 00:39:54.402238 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2587 00:39:54.405724 969 |3 6 9|[0] xxxxxxxx xxxxxxxo [MSB]
2588 00:39:54.408810 970 |3 6 10|[0] xxxxxxxx oxxxxxxo [MSB]
2589 00:39:54.412040 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
2590 00:39:54.415361 972 |3 6 12|[0] xxxxxxxx oooxxxoo [MSB]
2591 00:39:54.418931 973 |3 6 13|[0] xxxxxxxx oooxoxoo [MSB]
2592 00:39:54.421976 974 |3 6 14|[0] xxxxxxxx oooooxoo [MSB]
2593 00:39:54.425365 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2594 00:39:54.428821 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2595 00:39:54.432124 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2596 00:39:54.435288 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2597 00:39:54.438445 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2598 00:39:54.445692 980 |3 6 20|[0] xxxxxxxo oooooooo [MSB]
2599 00:39:54.448567 981 |3 6 21|[0] xooooxoo oooooooo [MSB]
2600 00:39:54.452112 986 |3 6 26|[0] oooooooo ooooooox [MSB]
2601 00:39:54.455275 987 |3 6 27|[0] oooooooo oxooooox [MSB]
2602 00:39:54.458454 988 |3 6 28|[0] oooooooo oxooooox [MSB]
2603 00:39:54.462119 989 |3 6 29|[0] oooooooo xxooooox [MSB]
2604 00:39:54.465349 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
2605 00:39:54.468560 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2606 00:39:54.471984 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2607 00:39:54.475301 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2608 00:39:54.478491 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2609 00:39:54.481869 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2610 00:39:54.485168 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2611 00:39:54.491624 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2612 00:39:54.495312 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2613 00:39:54.498399 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2614 00:39:54.501587 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2615 00:39:54.505324 1001 |3 6 41|[0] oxxxooox xxxxxxxx [MSB]
2616 00:39:54.508286 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2617 00:39:54.511845 Byte0, DQ PI dly=990, DQM PI dly= 990
2618 00:39:54.515267 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2619 00:39:54.515358
2620 00:39:54.521823 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2621 00:39:54.521915
2622 00:39:54.524988 Byte1, DQ PI dly=979, DQM PI dly= 979
2623 00:39:54.528296 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2624 00:39:54.528388
2625 00:39:54.531947 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2626 00:39:54.532038
2627 00:39:54.532109 ==
2628 00:39:54.538362 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2629 00:39:54.541575 fsp= 1, odt_onoff= 1, Byte mode= 0
2630 00:39:54.541666 ==
2631 00:39:54.544784 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2632 00:39:54.544874
2633 00:39:54.548596 Begin, DQ Scan Range 955~1019
2634 00:39:54.551422 Write Rank0 MR14 =0x0
2635 00:39:54.559468
2636 00:39:54.559558 CH=1, VrefRange= 0, VrefLevel = 0
2637 00:39:54.566047 TX Bit0 (984~999) 16 991, Bit8 (973~984) 12 978,
2638 00:39:54.569953 TX Bit1 (983~996) 14 989, Bit9 (974~983) 10 978,
2639 00:39:54.576622 TX Bit2 (981~996) 16 988, Bit10 (975~986) 12 980,
2640 00:39:54.579541 TX Bit3 (979~991) 13 985, Bit11 (976~987) 12 981,
2641 00:39:54.583218 TX Bit4 (983~997) 15 990, Bit12 (976~987) 12 981,
2642 00:39:54.589486 TX Bit5 (985~997) 13 991, Bit13 (977~987) 11 982,
2643 00:39:54.592659 TX Bit6 (983~998) 16 990, Bit14 (975~986) 12 980,
2644 00:39:54.596125 TX Bit7 (983~996) 14 989, Bit15 (969~979) 11 974,
2645 00:39:54.596217
2646 00:39:54.599334 Write Rank0 MR14 =0x2
2647 00:39:54.608552
2648 00:39:54.608643 CH=1, VrefRange= 0, VrefLevel = 2
2649 00:39:54.615329 TX Bit0 (984~1000) 17 992, Bit8 (973~984) 12 978,
2650 00:39:54.618635 TX Bit1 (983~998) 16 990, Bit9 (973~983) 11 978,
2651 00:39:54.625012 TX Bit2 (981~997) 17 989, Bit10 (975~987) 13 981,
2652 00:39:54.628441 TX Bit3 (979~992) 14 985, Bit11 (976~988) 13 982,
2653 00:39:54.631814 TX Bit4 (982~998) 17 990, Bit12 (975~987) 13 981,
2654 00:39:54.638325 TX Bit5 (984~998) 15 991, Bit13 (976~988) 13 982,
2655 00:39:54.641513 TX Bit6 (983~998) 16 990, Bit14 (975~987) 13 981,
2656 00:39:54.644993 TX Bit7 (983~997) 15 990, Bit15 (969~980) 12 974,
2657 00:39:54.648170
2658 00:39:54.648261 Write Rank0 MR14 =0x4
2659 00:39:54.657642
2660 00:39:54.657733 CH=1, VrefRange= 0, VrefLevel = 4
2661 00:39:54.664138 TX Bit0 (984~1000) 17 992, Bit8 (972~985) 14 978,
2662 00:39:54.667791 TX Bit1 (982~998) 17 990, Bit9 (972~984) 13 978,
2663 00:39:54.674147 TX Bit2 (980~997) 18 988, Bit10 (975~987) 13 981,
2664 00:39:54.677675 TX Bit3 (979~993) 15 986, Bit11 (975~988) 14 981,
2665 00:39:54.680985 TX Bit4 (982~999) 18 990, Bit12 (975~989) 15 982,
2666 00:39:54.687543 TX Bit5 (984~999) 16 991, Bit13 (976~989) 14 982,
2667 00:39:54.691215 TX Bit6 (983~998) 16 990, Bit14 (974~987) 14 980,
2668 00:39:54.694335 TX Bit7 (983~998) 16 990, Bit15 (969~982) 14 975,
2669 00:39:54.694428
2670 00:39:54.697442 Write Rank0 MR14 =0x6
2671 00:39:54.706897
2672 00:39:54.706988 CH=1, VrefRange= 0, VrefLevel = 6
2673 00:39:54.713707 TX Bit0 (983~1001) 19 992, Bit8 (971~985) 15 978,
2674 00:39:54.717204 TX Bit1 (982~999) 18 990, Bit9 (972~984) 13 978,
2675 00:39:54.724072 TX Bit2 (979~998) 20 988, Bit10 (975~989) 15 982,
2676 00:39:54.727289 TX Bit3 (978~994) 17 986, Bit11 (975~990) 16 982,
2677 00:39:54.730269 TX Bit4 (982~999) 18 990, Bit12 (975~990) 16 982,
2678 00:39:54.736874 TX Bit5 (984~999) 16 991, Bit13 (976~989) 14 982,
2679 00:39:54.740143 TX Bit6 (983~999) 17 991, Bit14 (974~989) 16 981,
2680 00:39:54.743865 TX Bit7 (982~998) 17 990, Bit15 (968~983) 16 975,
2681 00:39:54.743958
2682 00:39:54.747114 Write Rank0 MR14 =0x8
2683 00:39:54.756333
2684 00:39:54.756424 CH=1, VrefRange= 0, VrefLevel = 8
2685 00:39:54.762871 TX Bit0 (983~1001) 19 992, Bit8 (971~986) 16 978,
2686 00:39:54.766065 TX Bit1 (981~999) 19 990, Bit9 (971~984) 14 977,
2687 00:39:54.772688 TX Bit2 (979~998) 20 988, Bit10 (974~989) 16 981,
2688 00:39:54.775850 TX Bit3 (978~995) 18 986, Bit11 (975~990) 16 982,
2689 00:39:54.779579 TX Bit4 (982~1000) 19 991, Bit12 (975~990) 16 982,
2690 00:39:54.786169 TX Bit5 (984~1000) 17 992, Bit13 (976~991) 16 983,
2691 00:39:54.789383 TX Bit6 (982~999) 18 990, Bit14 (974~989) 16 981,
2692 00:39:54.795952 TX Bit7 (982~999) 18 990, Bit15 (968~983) 16 975,
2693 00:39:54.796043
2694 00:39:54.796116 Write Rank0 MR14 =0xa
2695 00:39:54.805824
2696 00:39:54.809060 CH=1, VrefRange= 0, VrefLevel = 10
2697 00:39:54.812285 TX Bit0 (982~1002) 21 992, Bit8 (970~986) 17 978,
2698 00:39:54.815586 TX Bit1 (981~999) 19 990, Bit9 (971~985) 15 978,
2699 00:39:54.822345 TX Bit2 (979~999) 21 989, Bit10 (974~990) 17 982,
2700 00:39:54.826055 TX Bit3 (978~995) 18 986, Bit11 (975~990) 16 982,
2701 00:39:54.829247 TX Bit4 (981~1000) 20 990, Bit12 (974~991) 18 982,
2702 00:39:54.835614 TX Bit5 (983~1001) 19 992, Bit13 (975~991) 17 983,
2703 00:39:54.839065 TX Bit6 (982~1000) 19 991, Bit14 (973~990) 18 981,
2704 00:39:54.845326 TX Bit7 (982~999) 18 990, Bit15 (968~984) 17 976,
2705 00:39:54.845418
2706 00:39:54.845511 Write Rank0 MR14 =0xc
2707 00:39:54.855578
2708 00:39:54.859270 CH=1, VrefRange= 0, VrefLevel = 12
2709 00:39:54.862566 TX Bit0 (982~1002) 21 992, Bit8 (970~987) 18 978,
2710 00:39:54.865720 TX Bit1 (981~1000) 20 990, Bit9 (971~985) 15 978,
2711 00:39:54.872397 TX Bit2 (979~999) 21 989, Bit10 (973~991) 19 982,
2712 00:39:54.875866 TX Bit3 (978~996) 19 987, Bit11 (975~991) 17 983,
2713 00:39:54.879195 TX Bit4 (980~1001) 22 990, Bit12 (974~991) 18 982,
2714 00:39:54.885488 TX Bit5 (983~1001) 19 992, Bit13 (975~991) 17 983,
2715 00:39:54.888767 TX Bit6 (981~1000) 20 990, Bit14 (973~991) 19 982,
2716 00:39:54.895744 TX Bit7 (981~999) 19 990, Bit15 (968~984) 17 976,
2717 00:39:54.895864
2718 00:39:54.895967 Write Rank0 MR14 =0xe
2719 00:39:54.905662
2720 00:39:54.909073 CH=1, VrefRange= 0, VrefLevel = 14
2721 00:39:54.912046 TX Bit0 (982~1003) 22 992, Bit8 (970~987) 18 978,
2722 00:39:54.915816 TX Bit1 (980~1000) 21 990, Bit9 (970~986) 17 978,
2723 00:39:54.922077 TX Bit2 (978~999) 22 988, Bit10 (973~991) 19 982,
2724 00:39:54.925365 TX Bit3 (977~997) 21 987, Bit11 (973~991) 19 982,
2725 00:39:54.928884 TX Bit4 (980~1001) 22 990, Bit12 (973~992) 20 982,
2726 00:39:54.935394 TX Bit5 (983~1001) 19 992, Bit13 (975~992) 18 983,
2727 00:39:54.938665 TX Bit6 (981~1001) 21 991, Bit14 (972~991) 20 981,
2728 00:39:54.945457 TX Bit7 (980~1000) 21 990, Bit15 (967~985) 19 976,
2729 00:39:54.945549
2730 00:39:54.945621 Write Rank0 MR14 =0x10
2731 00:39:54.955669
2732 00:39:54.959160 CH=1, VrefRange= 0, VrefLevel = 16
2733 00:39:54.962328 TX Bit0 (981~1003) 23 992, Bit8 (970~988) 19 979,
2734 00:39:54.965635 TX Bit1 (979~1001) 23 990, Bit9 (970~987) 18 978,
2735 00:39:54.972477 TX Bit2 (978~1000) 23 989, Bit10 (972~991) 20 981,
2736 00:39:54.975864 TX Bit3 (977~998) 22 987, Bit11 (973~992) 20 982,
2737 00:39:54.978944 TX Bit4 (980~1001) 22 990, Bit12 (972~992) 21 982,
2738 00:39:54.985892 TX Bit5 (982~1002) 21 992, Bit13 (975~992) 18 983,
2739 00:39:54.989033 TX Bit6 (980~1001) 22 990, Bit14 (972~992) 21 982,
2740 00:39:54.995737 TX Bit7 (981~1001) 21 991, Bit15 (967~985) 19 976,
2741 00:39:54.995828
2742 00:39:54.995899 Write Rank0 MR14 =0x12
2743 00:39:55.006245
2744 00:39:55.006335 CH=1, VrefRange= 0, VrefLevel = 18
2745 00:39:55.013053 TX Bit0 (981~1004) 24 992, Bit8 (969~989) 21 979,
2746 00:39:55.016544 TX Bit1 (979~1001) 23 990, Bit9 (970~987) 18 978,
2747 00:39:55.022993 TX Bit2 (978~1000) 23 989, Bit10 (971~992) 22 981,
2748 00:39:55.026497 TX Bit3 (977~998) 22 987, Bit11 (972~992) 21 982,
2749 00:39:55.029449 TX Bit4 (979~1002) 24 990, Bit12 (972~993) 22 982,
2750 00:39:55.036137 TX Bit5 (982~1002) 21 992, Bit13 (974~992) 19 983,
2751 00:39:55.039746 TX Bit6 (980~1001) 22 990, Bit14 (971~992) 22 981,
2752 00:39:55.046148 TX Bit7 (980~1001) 22 990, Bit15 (967~985) 19 976,
2753 00:39:55.046237
2754 00:39:55.046309 Write Rank0 MR14 =0x14
2755 00:39:55.056813
2756 00:39:55.056906 CH=1, VrefRange= 0, VrefLevel = 20
2757 00:39:55.063304 TX Bit0 (981~1004) 24 992, Bit8 (969~990) 22 979,
2758 00:39:55.066777 TX Bit1 (979~1002) 24 990, Bit9 (970~988) 19 979,
2759 00:39:55.073034 TX Bit2 (978~1000) 23 989, Bit10 (971~992) 22 981,
2760 00:39:55.076506 TX Bit3 (977~999) 23 988, Bit11 (972~992) 21 982,
2761 00:39:55.080150 TX Bit4 (979~1003) 25 991, Bit12 (972~993) 22 982,
2762 00:39:55.086288 TX Bit5 (982~1003) 22 992, Bit13 (973~993) 21 983,
2763 00:39:55.089888 TX Bit6 (980~1002) 23 991, Bit14 (971~992) 22 981,
2764 00:39:55.096765 TX Bit7 (979~1001) 23 990, Bit15 (967~986) 20 976,
2765 00:39:55.096857
2766 00:39:55.096930 Write Rank0 MR14 =0x16
2767 00:39:55.107067
2768 00:39:55.110433 CH=1, VrefRange= 0, VrefLevel = 22
2769 00:39:55.114120 TX Bit0 (980~1005) 26 992, Bit8 (969~990) 22 979,
2770 00:39:55.117154 TX Bit1 (979~1002) 24 990, Bit9 (970~989) 20 979,
2771 00:39:55.124179 TX Bit2 (978~1001) 24 989, Bit10 (971~992) 22 981,
2772 00:39:55.126996 TX Bit3 (977~999) 23 988, Bit11 (972~992) 21 982,
2773 00:39:55.130588 TX Bit4 (979~1003) 25 991, Bit12 (972~994) 23 983,
2774 00:39:55.136895 TX Bit5 (982~1003) 22 992, Bit13 (974~992) 19 983,
2775 00:39:55.140668 TX Bit6 (979~1003) 25 991, Bit14 (971~993) 23 982,
2776 00:39:55.147135 TX Bit7 (979~1002) 24 990, Bit15 (967~986) 20 976,
2777 00:39:55.147227
2778 00:39:55.147299 Write Rank0 MR14 =0x18
2779 00:39:55.157836
2780 00:39:55.161318 CH=1, VrefRange= 0, VrefLevel = 24
2781 00:39:55.164566 TX Bit0 (980~1005) 26 992, Bit8 (969~991) 23 980,
2782 00:39:55.167831 TX Bit1 (978~1003) 26 990, Bit9 (969~990) 22 979,
2783 00:39:55.174466 TX Bit2 (977~1002) 26 989, Bit10 (971~992) 22 981,
2784 00:39:55.177631 TX Bit3 (977~999) 23 988, Bit11 (971~993) 23 982,
2785 00:39:55.180979 TX Bit4 (978~1003) 26 990, Bit12 (971~994) 24 982,
2786 00:39:55.187859 TX Bit5 (981~1004) 24 992, Bit13 (974~993) 20 983,
2787 00:39:55.191138 TX Bit6 (979~1003) 25 991, Bit14 (971~993) 23 982,
2788 00:39:55.197730 TX Bit7 (979~1003) 25 991, Bit15 (966~987) 22 976,
2789 00:39:55.197822
2790 00:39:55.197894 Write Rank0 MR14 =0x1a
2791 00:39:55.208500
2792 00:39:55.211924 CH=1, VrefRange= 0, VrefLevel = 26
2793 00:39:55.215142 TX Bit0 (980~1005) 26 992, Bit8 (969~991) 23 980,
2794 00:39:55.218327 TX Bit1 (978~1003) 26 990, Bit9 (968~990) 23 979,
2795 00:39:55.225255 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2796 00:39:55.228347 TX Bit3 (976~1000) 25 988, Bit11 (971~993) 23 982,
2797 00:39:55.231899 TX Bit4 (978~1003) 26 990, Bit12 (971~994) 24 982,
2798 00:39:55.238379 TX Bit5 (980~1005) 26 992, Bit13 (973~993) 21 983,
2799 00:39:55.241449 TX Bit6 (979~1003) 25 991, Bit14 (970~993) 24 981,
2800 00:39:55.248312 TX Bit7 (979~1002) 24 990, Bit15 (966~987) 22 976,
2801 00:39:55.248402
2802 00:39:55.248473 Write Rank0 MR14 =0x1c
2803 00:39:55.259506
2804 00:39:55.262871 CH=1, VrefRange= 0, VrefLevel = 28
2805 00:39:55.266065 TX Bit0 (979~1006) 28 992, Bit8 (969~991) 23 980,
2806 00:39:55.269322 TX Bit1 (978~1003) 26 990, Bit9 (969~990) 22 979,
2807 00:39:55.275625 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2808 00:39:55.279400 TX Bit3 (976~1000) 25 988, Bit11 (971~994) 24 982,
2809 00:39:55.285888 TX Bit4 (978~1004) 27 991, Bit12 (970~994) 25 982,
2810 00:39:55.288936 TX Bit5 (981~1005) 25 993, Bit13 (973~994) 22 983,
2811 00:39:55.292341 TX Bit6 (978~1004) 27 991, Bit14 (970~994) 25 982,
2812 00:39:55.298938 TX Bit7 (979~1003) 25 991, Bit15 (966~988) 23 977,
2813 00:39:55.299025
2814 00:39:55.299100 Write Rank0 MR14 =0x1e
2815 00:39:55.310345
2816 00:39:55.313532 CH=1, VrefRange= 0, VrefLevel = 30
2817 00:39:55.316538 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2818 00:39:55.320343 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
2819 00:39:55.326671 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2820 00:39:55.329875 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2821 00:39:55.333506 TX Bit4 (978~1005) 28 991, Bit12 (970~994) 25 982,
2822 00:39:55.340228 TX Bit5 (980~1006) 27 993, Bit13 (973~994) 22 983,
2823 00:39:55.343329 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2824 00:39:55.349866 TX Bit7 (978~1005) 28 991, Bit15 (965~988) 24 976,
2825 00:39:55.349954
2826 00:39:55.350026 Write Rank0 MR14 =0x20
2827 00:39:55.361117
2828 00:39:55.364205 CH=1, VrefRange= 0, VrefLevel = 32
2829 00:39:55.367482 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2830 00:39:55.371070 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2831 00:39:55.378037 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2832 00:39:55.381400 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2833 00:39:55.384578 TX Bit4 (979~1005) 27 992, Bit12 (970~994) 25 982,
2834 00:39:55.390813 TX Bit5 (979~1006) 28 992, Bit13 (971~994) 24 982,
2835 00:39:55.394387 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2836 00:39:55.400528 TX Bit7 (978~1003) 26 990, Bit15 (965~987) 23 976,
2837 00:39:55.400615
2838 00:39:55.400686 Write Rank0 MR14 =0x22
2839 00:39:55.411717
2840 00:39:55.415083 CH=1, VrefRange= 0, VrefLevel = 34
2841 00:39:55.418518 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2842 00:39:55.421784 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2843 00:39:55.428782 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2844 00:39:55.431671 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2845 00:39:55.435356 TX Bit4 (979~1005) 27 992, Bit12 (970~994) 25 982,
2846 00:39:55.442017 TX Bit5 (979~1006) 28 992, Bit13 (971~994) 24 982,
2847 00:39:55.444940 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2848 00:39:55.451810 TX Bit7 (978~1003) 26 990, Bit15 (965~987) 23 976,
2849 00:39:55.451905
2850 00:39:55.451977 Write Rank0 MR14 =0x24
2851 00:39:55.462773
2852 00:39:55.465879 CH=1, VrefRange= 0, VrefLevel = 36
2853 00:39:55.469641 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2854 00:39:55.472606 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2855 00:39:55.479287 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2856 00:39:55.482755 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2857 00:39:55.489126 TX Bit4 (979~1005) 27 992, Bit12 (970~994) 25 982,
2858 00:39:55.492521 TX Bit5 (979~1006) 28 992, Bit13 (971~994) 24 982,
2859 00:39:55.495600 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2860 00:39:55.502779 TX Bit7 (978~1003) 26 990, Bit15 (965~987) 23 976,
2861 00:39:55.502870
2862 00:39:55.502941 Write Rank0 MR14 =0x26
2863 00:39:55.513270
2864 00:39:55.516530 CH=1, VrefRange= 0, VrefLevel = 38
2865 00:39:55.520163 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2866 00:39:55.523291 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2867 00:39:55.529900 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2868 00:39:55.532959 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2869 00:39:55.536459 TX Bit4 (979~1005) 27 992, Bit12 (970~994) 25 982,
2870 00:39:55.543353 TX Bit5 (979~1006) 28 992, Bit13 (971~994) 24 982,
2871 00:39:55.546591 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2872 00:39:55.553198 TX Bit7 (978~1003) 26 990, Bit15 (965~987) 23 976,
2873 00:39:55.553290
2874 00:39:55.553362
2875 00:39:55.556518 TX Vref found, early break! 375< 386
2876 00:39:55.559900 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2877 00:39:55.562907 u1DelayCellOfst[0]=5 cells (4 PI)
2878 00:39:55.566674 u1DelayCellOfst[1]=3 cells (3 PI)
2879 00:39:55.569895 u1DelayCellOfst[2]=1 cells (1 PI)
2880 00:39:55.573171 u1DelayCellOfst[3]=0 cells (0 PI)
2881 00:39:55.576323 u1DelayCellOfst[4]=5 cells (4 PI)
2882 00:39:55.580150 u1DelayCellOfst[5]=5 cells (4 PI)
2883 00:39:55.582975 u1DelayCellOfst[6]=3 cells (3 PI)
2884 00:39:55.583065 u1DelayCellOfst[7]=2 cells (2 PI)
2885 00:39:55.586354 Byte0, DQ PI dly=988, DQM PI dly= 990
2886 00:39:55.592956 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2887 00:39:55.593047
2888 00:39:55.596740 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2889 00:39:55.596831
2890 00:39:55.599877 u1DelayCellOfst[8]=5 cells (4 PI)
2891 00:39:55.603080 u1DelayCellOfst[9]=5 cells (4 PI)
2892 00:39:55.606242 u1DelayCellOfst[10]=6 cells (5 PI)
2893 00:39:55.609927 u1DelayCellOfst[11]=7 cells (6 PI)
2894 00:39:55.612975 u1DelayCellOfst[12]=7 cells (6 PI)
2895 00:39:55.616708 u1DelayCellOfst[13]=7 cells (6 PI)
2896 00:39:55.619771 u1DelayCellOfst[14]=7 cells (6 PI)
2897 00:39:55.623041 u1DelayCellOfst[15]=0 cells (0 PI)
2898 00:39:55.626298 Byte1, DQ PI dly=976, DQM PI dly= 979
2899 00:39:55.629796 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2900 00:39:55.629889
2901 00:39:55.633218 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2902 00:39:55.633310
2903 00:39:55.636271 Write Rank0 MR14 =0x20
2904 00:39:55.636362
2905 00:39:55.640251 Final TX Range 0 Vref 32
2906 00:39:55.640343
2907 00:39:55.646311 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2908 00:39:55.646402
2909 00:39:55.653058 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2910 00:39:55.660215 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2911 00:39:55.666271 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2912 00:39:55.666363 Write Rank0 MR3 =0xb0
2913 00:39:55.669815 DramC Write-DBI on
2914 00:39:55.669906 ==
2915 00:39:55.672958 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2916 00:39:55.676559 fsp= 1, odt_onoff= 1, Byte mode= 0
2917 00:39:55.676650 ==
2918 00:39:55.683324 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2919 00:39:55.683421
2920 00:39:55.686427 Begin, DQ Scan Range 699~763
2921 00:39:55.686518
2922 00:39:55.686590
2923 00:39:55.686657 TX Vref Scan disable
2924 00:39:55.689708 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2925 00:39:55.693456 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2926 00:39:55.696587 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2927 00:39:55.703019 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2928 00:39:55.706417 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2929 00:39:55.709815 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2930 00:39:55.712858 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2931 00:39:55.716479 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2932 00:39:55.719638 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2933 00:39:55.723397 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2934 00:39:55.726560 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2935 00:39:55.729598 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2936 00:39:55.733271 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2937 00:39:55.736490 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2938 00:39:55.739792 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2939 00:39:55.743056 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2940 00:39:55.746407 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2941 00:39:55.750188 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2942 00:39:55.752941 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2943 00:39:55.756727 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2944 00:39:55.759618 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2945 00:39:55.763262 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2946 00:39:55.766413 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2947 00:39:55.774865 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2948 00:39:55.778477 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2949 00:39:55.781872 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2950 00:39:55.784777 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2951 00:39:55.788524 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2952 00:39:55.792020 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2953 00:39:55.795113 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2954 00:39:55.798081 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2955 00:39:55.801784 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2956 00:39:55.805002 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2957 00:39:55.808229 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2958 00:39:55.811577 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2959 00:39:55.815162 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2960 00:39:55.818344 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2961 00:39:55.821542 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2962 00:39:55.824693 Byte0, DQ PI dly=736, DQM PI dly= 736
2963 00:39:55.831999 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
2964 00:39:55.832091
2965 00:39:55.834986 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
2966 00:39:55.835077
2967 00:39:55.838243 Byte1, DQ PI dly=724, DQM PI dly= 724
2968 00:39:55.844858 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2969 00:39:55.844949
2970 00:39:55.848408 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2971 00:39:55.848499
2972 00:39:55.855040 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2973 00:39:55.861404 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2974 00:39:55.868116 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2975 00:39:55.871072 Write Rank0 MR3 =0x30
2976 00:39:55.871163 DramC Write-DBI off
2977 00:39:55.871235
2978 00:39:55.874678 [DATLAT]
2979 00:39:55.878275 Freq=1600, CH1 RK0, use_rxtx_scan=0
2980 00:39:55.878370
2981 00:39:55.878443 DATLAT Default: 0xf
2982 00:39:55.881043 7, 0xFFFF, sum=0
2983 00:39:55.881136 8, 0xFFFF, sum=0
2984 00:39:55.884318 9, 0xFFFF, sum=0
2985 00:39:55.884411 10, 0xFFFF, sum=0
2986 00:39:55.887952 11, 0xFFFF, sum=0
2987 00:39:55.888044 12, 0xFFFF, sum=0
2988 00:39:55.891131 13, 0xFFFF, sum=0
2989 00:39:55.891223 14, 0x0, sum=1
2990 00:39:55.891296 15, 0x0, sum=2
2991 00:39:55.894421 16, 0x0, sum=3
2992 00:39:55.894514 17, 0x0, sum=4
2993 00:39:55.901063 pattern=2 first_step=14 total pass=5 best_step=16
2994 00:39:55.901154 ==
2995 00:39:55.904306 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2996 00:39:55.908069 fsp= 1, odt_onoff= 1, Byte mode= 0
2997 00:39:55.908160 ==
2998 00:39:55.910797 Start DQ dly to find pass range UseTestEngine =1
2999 00:39:55.917459 x-axis: bit #, y-axis: DQ dly (-127~63)
3000 00:39:55.917549 RX Vref Scan = 1
3001 00:39:56.024883
3002 00:39:56.025038 RX Vref found, early break!
3003 00:39:56.025112
3004 00:39:56.031712 Final RX Vref 11, apply to both rank0 and 1
3005 00:39:56.031821 ==
3006 00:39:56.035126 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3007 00:39:56.038111 fsp= 1, odt_onoff= 1, Byte mode= 0
3008 00:39:56.038206 ==
3009 00:39:56.038280 DQS Delay:
3010 00:39:56.041665 DQS0 = 0, DQS1 = 0
3011 00:39:56.041759 DQM Delay:
3012 00:39:56.044957 DQM0 = 21, DQM1 = 19
3013 00:39:56.045053 DQ Delay:
3014 00:39:56.048352 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =17
3015 00:39:56.051637 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =21
3016 00:39:56.054547 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3017 00:39:56.057926 DQ12 =22, DQ13 =21, DQ14 =23, DQ15 =13
3018 00:39:56.058025
3019 00:39:56.058099
3020 00:39:56.058167
3021 00:39:56.061117 [DramC_TX_OE_Calibration] TA2
3022 00:39:56.064887 Original DQ_B0 (3 6) =30, OEN = 27
3023 00:39:56.067842 Original DQ_B1 (3 6) =30, OEN = 27
3024 00:39:56.071567 23, 0x0, End_B0=23 End_B1=23
3025 00:39:56.071667 24, 0x0, End_B0=24 End_B1=24
3026 00:39:56.074698 25, 0x0, End_B0=25 End_B1=25
3027 00:39:56.078151 26, 0x0, End_B0=26 End_B1=26
3028 00:39:56.081139 27, 0x0, End_B0=27 End_B1=27
3029 00:39:56.084893 28, 0x0, End_B0=28 End_B1=28
3030 00:39:56.084987 29, 0x0, End_B0=29 End_B1=29
3031 00:39:56.088084 30, 0x0, End_B0=30 End_B1=30
3032 00:39:56.091697 31, 0xFFFF, End_B0=30 End_B1=30
3033 00:39:56.098011 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3034 00:39:56.101500 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3035 00:39:56.101659
3036 00:39:56.101785
3037 00:39:56.104483 Write Rank0 MR23 =0x3f
3038 00:39:56.104633 [DQSOSC]
3039 00:39:56.114799 [DQSOSCAuto] RK0, (LSB)MR18= 0xbdbd, (MSB)MR19= 0x202, tDQSOscB0 = 449 ps tDQSOscB1 = 449 ps
3040 00:39:56.117999 CH1_RK0: MR19=0x202, MR18=0xBDBD, DQSOSC=449, MR23=63, INC=12, DEC=18
3041 00:39:56.121256 Write Rank0 MR23 =0x3f
3042 00:39:56.121397 [DQSOSC]
3043 00:39:56.131033 [DQSOSCAuto] RK0, (LSB)MR18= 0xc1c1, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
3044 00:39:56.134765 CH1 RK0: MR19=202, MR18=C1C1
3045 00:39:56.138063 [RankSwap] Rank num 2, (Multi 1), Rank 1
3046 00:39:56.138213 Write Rank0 MR2 =0xad
3047 00:39:56.140952 [Write Leveling]
3048 00:39:56.144954 delay byte0 byte1 byte2 byte3
3049 00:39:56.145057
3050 00:39:56.145131 10 0 0
3051 00:39:56.148005 11 0 0
3052 00:39:56.148099 12 0 0
3053 00:39:56.148173 13 0 0
3054 00:39:56.151136 14 0 0
3055 00:39:56.151229 15 0 0
3056 00:39:56.154318 16 0 0
3057 00:39:56.154403 17 0 0
3058 00:39:56.154487 18 0 0
3059 00:39:56.157714 19 0 0
3060 00:39:56.157807 20 0 0
3061 00:39:56.160923 21 0 0
3062 00:39:56.161016 22 0 0
3063 00:39:56.164884 23 0 0
3064 00:39:56.164977 24 0 ff
3065 00:39:56.165051 25 0 ff
3066 00:39:56.167557 26 0 ff
3067 00:39:56.167650 27 0 ff
3068 00:39:56.171577 28 0 ff
3069 00:39:56.171670 29 0 ff
3070 00:39:56.174657 30 0 ff
3071 00:39:56.174750 31 0 ff
3072 00:39:56.174823 32 0 ff
3073 00:39:56.177627 33 0 ff
3074 00:39:56.177719 34 0 ff
3075 00:39:56.180794 35 ff ff
3076 00:39:56.180885 36 ff ff
3077 00:39:56.184441 37 ff ff
3078 00:39:56.184533 38 ff ff
3079 00:39:56.187678 39 ff ff
3080 00:39:56.187769 40 ff ff
3081 00:39:56.190818 41 ff ff
3082 00:39:56.194332 pass bytecount = 0xff (0xff: all bytes pass)
3083 00:39:56.194423
3084 00:39:56.194495 DQS0 dly: 35
3085 00:39:56.197938 DQS1 dly: 24
3086 00:39:56.198028 Write Rank0 MR2 =0x2d
3087 00:39:56.201230 [RankSwap] Rank num 2, (Multi 1), Rank 0
3088 00:39:56.204666 Write Rank1 MR1 =0xd6
3089 00:39:56.204757 [Gating]
3090 00:39:56.204829 ==
3091 00:39:56.210870 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3092 00:39:56.214635 fsp= 1, odt_onoff= 1, Byte mode= 0
3093 00:39:56.214727 ==
3094 00:39:56.217735 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3095 00:39:56.221039 3 1 4 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3096 00:39:56.227945 3 1 8 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3097 00:39:56.231081 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3098 00:39:56.234348 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3099 00:39:56.240875 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3100 00:39:56.244450 3 1 24 |3535 2c2b |(0 0)(11 11) |(0 1)(1 0)| 0
3101 00:39:56.247434 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3102 00:39:56.250905 3 2 0 |3434 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3103 00:39:56.257577 3 2 4 |706 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3104 00:39:56.260979 3 2 8 |2a2a 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3105 00:39:56.264588 3 2 12 |3d3d 201 |(11 11)(11 11) |(1 1)(0 0)| 0
3106 00:39:56.271158 3 2 16 |3d3d 2322 |(11 11)(11 11) |(1 1)(0 0)| 0
3107 00:39:56.274582 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3108 00:39:56.277595 3 2 24 |3d3d 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
3109 00:39:56.280960 3 2 28 |3d3d 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
3110 00:39:56.287804 3 3 0 |3d3d 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
3111 00:39:56.291064 3 3 4 |3333 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3112 00:39:56.294545 3 3 8 |201 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3113 00:39:56.300921 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3114 00:39:56.304440 [Byte 0] Lead/lag falling Transition (3, 3, 12)
3115 00:39:56.307539 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3116 00:39:56.311078 [Byte 1] Lead/lag Transition tap number (1)
3117 00:39:56.317387 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3118 00:39:56.320914 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3119 00:39:56.324032 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3120 00:39:56.331091 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3121 00:39:56.333991 3 4 4 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3122 00:39:56.337208 3 4 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3123 00:39:56.344278 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3124 00:39:56.347511 3 4 16 |3d3d 908 |(11 11)(11 11) |(1 1)(1 1)| 0
3125 00:39:56.350929 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3126 00:39:56.357397 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3127 00:39:56.360515 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3128 00:39:56.364194 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3129 00:39:56.367166 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3130 00:39:56.373922 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3131 00:39:56.377213 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3132 00:39:56.380403 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3133 00:39:56.387140 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3134 00:39:56.390534 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3135 00:39:56.394006 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3136 00:39:56.400689 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3137 00:39:56.404131 [Byte 0] Lead/lag Transition tap number (2)
3138 00:39:56.407512 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3139 00:39:56.410648 [Byte 1] Lead/lag falling Transition (3, 6, 0)
3140 00:39:56.417477 3 6 4 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3141 00:39:56.420677 3 6 8 |4646 3d3d |(0 0)(11 11) |(0 0)(1 0)| 0
3142 00:39:56.423928 [Byte 0]First pass (3, 6, 8)
3143 00:39:56.427103 [Byte 1] Lead/lag Transition tap number (3)
3144 00:39:56.430572 3 6 12 |4646 2e2d |(0 0)(11 11) |(0 0)(0 0)| 0
3145 00:39:56.433665 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3146 00:39:56.440483 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3147 00:39:56.440601 [Byte 1]First pass (3, 6, 20)
3148 00:39:56.446895 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3149 00:39:56.450830 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3150 00:39:56.453604 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3151 00:39:56.457330 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3152 00:39:56.460407 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3153 00:39:56.467068 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3154 00:39:56.470328 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3155 00:39:56.473572 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3156 00:39:56.477325 All bytes gating window > 1UI, Early break!
3157 00:39:56.477417
3158 00:39:56.480319 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 28)
3159 00:39:56.480411
3160 00:39:56.484087 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)
3161 00:39:56.484178
3162 00:39:56.484250
3163 00:39:56.487053
3164 00:39:56.490726 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
3165 00:39:56.490817
3166 00:39:56.493606 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
3167 00:39:56.493697
3168 00:39:56.493770
3169 00:39:56.497230 Write Rank1 MR1 =0x56
3170 00:39:56.497321
3171 00:39:56.500581 best RODT dly(2T, 0.5T) = (2, 2)
3172 00:39:56.500673
3173 00:39:56.500745 best RODT dly(2T, 0.5T) = (2, 3)
3174 00:39:56.503880 ==
3175 00:39:56.507359 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3176 00:39:56.510829 fsp= 1, odt_onoff= 1, Byte mode= 0
3177 00:39:56.510921 ==
3178 00:39:56.513984 Start DQ dly to find pass range UseTestEngine =0
3179 00:39:56.516987 x-axis: bit #, y-axis: DQ dly (-127~63)
3180 00:39:56.520732 RX Vref Scan = 0
3181 00:39:56.524039 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3182 00:39:56.527210 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3183 00:39:56.530691 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3184 00:39:56.530784 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3185 00:39:56.533508 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3186 00:39:56.537209 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3187 00:39:56.540309 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3188 00:39:56.543531 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3189 00:39:56.547042 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3190 00:39:56.549907 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3191 00:39:56.553445 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3192 00:39:56.556917 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3193 00:39:56.557010 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3194 00:39:56.560052 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3195 00:39:56.563422 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3196 00:39:56.566717 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3197 00:39:56.570040 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3198 00:39:56.573593 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3199 00:39:56.576917 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3200 00:39:56.580052 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3201 00:39:56.580145 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3202 00:39:56.583326 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3203 00:39:56.587205 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3204 00:39:56.590161 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3205 00:39:56.593446 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3206 00:39:56.596631 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3207 00:39:56.596724 0, [0] xxooxxxx ooxxxxxo [MSB]
3208 00:39:56.599787 1, [0] xxooxxxx ooxxxxxo [MSB]
3209 00:39:56.603102 2, [0] xxooxxxx ooxxxxxo [MSB]
3210 00:39:56.606599 3, [0] xxooxxxo oooxxxxo [MSB]
3211 00:39:56.609750 4, [0] oxoooxxo oooxoxxo [MSB]
3212 00:39:56.613071 5, [0] oooooxoo ooooooxo [MSB]
3213 00:39:56.616443 32, [0] oooooooo ooooooox [MSB]
3214 00:39:56.616536 33, [0] oooooooo ooooooox [MSB]
3215 00:39:56.619907 34, [0] oooooooo ooooooox [MSB]
3216 00:39:56.623333 35, [0] oooxoooo xxooooox [MSB]
3217 00:39:56.626501 36, [0] oooxoooo xxooooox [MSB]
3218 00:39:56.630033 37, [0] ooxxoooo xxooooox [MSB]
3219 00:39:56.633578 38, [0] ooxxoooo xxooooox [MSB]
3220 00:39:56.636554 39, [0] oxxxooox xxooooox [MSB]
3221 00:39:56.636647 40, [0] oxxxxoox xxxoooox [MSB]
3222 00:39:56.639937 41, [0] oxxxxoox xxxxxxox [MSB]
3223 00:39:56.643206 42, [0] xxxxxxxx xxxxxxxx [MSB]
3224 00:39:56.646644 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
3225 00:39:56.650239 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3226 00:39:56.653177 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3227 00:39:56.656510 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3228 00:39:56.660094 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3229 00:39:56.663082 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
3230 00:39:56.666571 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3231 00:39:56.673529 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3232 00:39:56.676899 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
3233 00:39:56.680180 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
3234 00:39:56.683013 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3235 00:39:56.686189 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3236 00:39:56.689637 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3237 00:39:56.693141 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
3238 00:39:56.696549 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
3239 00:39:56.699518 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3240 00:39:56.699609 ==
3241 00:39:56.706564 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3242 00:39:56.709733 fsp= 1, odt_onoff= 1, Byte mode= 0
3243 00:39:56.709828 ==
3244 00:39:56.709906 DQS Delay:
3245 00:39:56.713233 DQS0 = 0, DQS1 = 0
3246 00:39:56.713324 DQM Delay:
3247 00:39:56.716490 DQM0 = 20, DQM1 = 19
3248 00:39:56.716581 DQ Delay:
3249 00:39:56.720038 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3250 00:39:56.723577 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
3251 00:39:56.726669 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3252 00:39:56.730083 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =14
3253 00:39:56.730174
3254 00:39:56.730245
3255 00:39:56.730312 DramC Write-DBI off
3256 00:39:56.733196 ==
3257 00:39:56.736601 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3258 00:39:56.739803 fsp= 1, odt_onoff= 1, Byte mode= 0
3259 00:39:56.739894 ==
3260 00:39:56.742933 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3261 00:39:56.743024
3262 00:39:56.746479 Begin, DQ Scan Range 920~1176
3263 00:39:56.746570
3264 00:39:56.746641
3265 00:39:56.749877 TX Vref Scan disable
3266 00:39:56.753434 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
3267 00:39:56.756883 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3268 00:39:56.759959 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3269 00:39:56.763253 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3270 00:39:56.766225 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3271 00:39:56.769999 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3272 00:39:56.772840 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3273 00:39:56.776715 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3274 00:39:56.779462 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3275 00:39:56.783083 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3276 00:39:56.789677 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3277 00:39:56.792741 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3278 00:39:56.795906 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3279 00:39:56.799564 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3280 00:39:56.802562 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3281 00:39:56.806141 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3282 00:39:56.809418 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3283 00:39:56.812696 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3284 00:39:56.815975 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3285 00:39:56.819096 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3286 00:39:56.822668 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3287 00:39:56.825822 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3288 00:39:56.829503 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3289 00:39:56.832707 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3290 00:39:56.835802 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3291 00:39:56.842544 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3292 00:39:56.845830 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3293 00:39:56.849659 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3294 00:39:56.852625 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3295 00:39:56.856244 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3296 00:39:56.859459 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3297 00:39:56.862785 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3298 00:39:56.865792 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3299 00:39:56.869452 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3300 00:39:56.872345 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3301 00:39:56.875931 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3302 00:39:56.879136 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3303 00:39:56.882663 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3304 00:39:56.885848 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3305 00:39:56.889226 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3306 00:39:56.892705 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3307 00:39:56.898797 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3308 00:39:56.902021 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3309 00:39:56.906075 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3310 00:39:56.909062 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3311 00:39:56.912524 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3312 00:39:56.915739 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3313 00:39:56.918826 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3314 00:39:56.922374 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3315 00:39:56.925520 969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]
3316 00:39:56.928749 970 |3 6 10|[0] xxxxxxxx oooxxxxo [MSB]
3317 00:39:56.932242 971 |3 6 11|[0] xxxxxxxx oooooxoo [MSB]
3318 00:39:56.935355 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3319 00:39:56.939281 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3320 00:39:56.941871 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3321 00:39:56.945344 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3322 00:39:56.948601 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3323 00:39:56.952143 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3324 00:39:56.955361 978 |3 6 18|[0] xxooxxxx oooooooo [MSB]
3325 00:39:56.958721 979 |3 6 19|[0] xooooxxx oooooooo [MSB]
3326 00:39:56.965251 980 |3 6 20|[0] xoooooox oooooooo [MSB]
3327 00:39:56.968773 985 |3 6 25|[0] oooooooo ooooooox [MSB]
3328 00:39:56.971885 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3329 00:39:56.975287 987 |3 6 27|[0] oooooooo ooooooox [MSB]
3330 00:39:56.978358 988 |3 6 28|[0] oooooooo xxooooox [MSB]
3331 00:39:56.982063 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
3332 00:39:56.985330 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3333 00:39:56.988747 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3334 00:39:56.992151 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3335 00:39:56.995189 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3336 00:39:56.998437 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3337 00:39:57.001860 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3338 00:39:57.005530 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3339 00:39:57.012079 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3340 00:39:57.015277 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3341 00:39:57.018524 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3342 00:39:57.021803 1000 |3 6 40|[0] ooxxooox xxxxxxxx [MSB]
3343 00:39:57.025225 1001 |3 6 41|[0] oxxxxoox xxxxxxxx [MSB]
3344 00:39:57.028540 1002 |3 6 42|[0] oxxxxoxx xxxxxxxx [MSB]
3345 00:39:57.032292 1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
3346 00:39:57.034904 Byte0, DQ PI dly=989, DQM PI dly= 989
3347 00:39:57.038174 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3348 00:39:57.038257
3349 00:39:57.045040 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3350 00:39:57.045125
3351 00:39:57.048671 Byte1, DQ PI dly=977, DQM PI dly= 977
3352 00:39:57.051576 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3353 00:39:57.051666
3354 00:39:57.054975 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3355 00:39:57.055065
3356 00:39:57.058432 ==
3357 00:39:57.061612 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3358 00:39:57.064855 fsp= 1, odt_onoff= 1, Byte mode= 0
3359 00:39:57.064946 ==
3360 00:39:57.068013 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3361 00:39:57.068103
3362 00:39:57.071509 Begin, DQ Scan Range 953~1017
3363 00:39:57.074806 Write Rank1 MR14 =0x0
3364 00:39:57.083173
3365 00:39:57.083299 CH=1, VrefRange= 0, VrefLevel = 0
3366 00:39:57.089731 TX Bit0 (983~998) 16 990, Bit8 (970~983) 14 976,
3367 00:39:57.093521 TX Bit1 (982~997) 16 989, Bit9 (970~984) 15 977,
3368 00:39:57.100160 TX Bit2 (980~994) 15 987, Bit10 (974~985) 12 979,
3369 00:39:57.103365 TX Bit3 (978~991) 14 984, Bit11 (975~985) 11 980,
3370 00:39:57.106651 TX Bit4 (982~997) 16 989, Bit12 (976~984) 9 980,
3371 00:39:57.113770 TX Bit5 (983~998) 16 990, Bit13 (976~987) 12 981,
3372 00:39:57.116996 TX Bit6 (983~997) 15 990, Bit14 (975~984) 10 979,
3373 00:39:57.120128 TX Bit7 (984~995) 12 989, Bit15 (969~978) 10 973,
3374 00:39:57.120212
3375 00:39:57.123159 Write Rank1 MR14 =0x2
3376 00:39:57.132407
3377 00:39:57.132501 CH=1, VrefRange= 0, VrefLevel = 2
3378 00:39:57.138973 TX Bit0 (983~998) 16 990, Bit8 (970~984) 15 977,
3379 00:39:57.142429 TX Bit1 (982~997) 16 989, Bit9 (971~984) 14 977,
3380 00:39:57.148966 TX Bit2 (979~996) 18 987, Bit10 (974~985) 12 979,
3381 00:39:57.152492 TX Bit3 (978~991) 14 984, Bit11 (974~987) 14 980,
3382 00:39:57.155815 TX Bit4 (981~997) 17 989, Bit12 (975~985) 11 980,
3383 00:39:57.162519 TX Bit5 (983~998) 16 990, Bit13 (975~987) 13 981,
3384 00:39:57.165955 TX Bit6 (982~998) 17 990, Bit14 (973~985) 13 979,
3385 00:39:57.169133 TX Bit7 (984~996) 13 990, Bit15 (968~978) 11 973,
3386 00:39:57.169228
3387 00:39:57.172120 Write Rank1 MR14 =0x4
3388 00:39:57.181441
3389 00:39:57.181563 CH=1, VrefRange= 0, VrefLevel = 4
3390 00:39:57.188383 TX Bit0 (983~999) 17 991, Bit8 (969~984) 16 976,
3391 00:39:57.191725 TX Bit1 (981~998) 18 989, Bit9 (970~984) 15 977,
3392 00:39:57.198183 TX Bit2 (979~996) 18 987, Bit10 (973~986) 14 979,
3393 00:39:57.201607 TX Bit3 (978~992) 15 985, Bit11 (974~987) 14 980,
3394 00:39:57.204783 TX Bit4 (981~998) 18 989, Bit12 (974~986) 13 980,
3395 00:39:57.211541 TX Bit5 (982~999) 18 990, Bit13 (974~989) 16 981,
3396 00:39:57.214710 TX Bit6 (981~998) 18 989, Bit14 (975~986) 12 980,
3397 00:39:57.218275 TX Bit7 (983~997) 15 990, Bit15 (968~980) 13 974,
3398 00:39:57.218365
3399 00:39:57.221430 Write Rank1 MR14 =0x6
3400 00:39:57.231264
3401 00:39:57.231383 CH=1, VrefRange= 0, VrefLevel = 6
3402 00:39:57.237609 TX Bit0 (982~999) 18 990, Bit8 (969~985) 17 977,
3403 00:39:57.241086 TX Bit1 (981~998) 18 989, Bit9 (970~985) 16 977,
3404 00:39:57.247462 TX Bit2 (979~997) 19 988, Bit10 (973~987) 15 980,
3405 00:39:57.250746 TX Bit3 (978~993) 16 985, Bit11 (973~989) 17 981,
3406 00:39:57.254428 TX Bit4 (980~998) 19 989, Bit12 (974~987) 14 980,
3407 00:39:57.261122 TX Bit5 (982~999) 18 990, Bit13 (973~989) 17 981,
3408 00:39:57.264000 TX Bit6 (981~998) 18 989, Bit14 (973~986) 14 979,
3409 00:39:57.267550 TX Bit7 (983~997) 15 990, Bit15 (968~981) 14 974,
3410 00:39:57.267641
3411 00:39:57.270913 Write Rank1 MR14 =0x8
3412 00:39:57.280474
3413 00:39:57.280594 CH=1, VrefRange= 0, VrefLevel = 8
3414 00:39:57.287127 TX Bit0 (982~1000) 19 991, Bit8 (969~985) 17 977,
3415 00:39:57.290745 TX Bit1 (981~999) 19 990, Bit9 (970~985) 16 977,
3416 00:39:57.296833 TX Bit2 (978~997) 20 987, Bit10 (972~987) 16 979,
3417 00:39:57.300125 TX Bit3 (978~994) 17 986, Bit11 (973~989) 17 981,
3418 00:39:57.303436 TX Bit4 (980~998) 19 989, Bit12 (972~988) 17 980,
3419 00:39:57.310180 TX Bit5 (982~1000) 19 991, Bit13 (973~990) 18 981,
3420 00:39:57.313463 TX Bit6 (981~999) 19 990, Bit14 (973~987) 15 980,
3421 00:39:57.319937 TX Bit7 (983~998) 16 990, Bit15 (967~982) 16 974,
3422 00:39:57.320056
3423 00:39:57.320158 Write Rank1 MR14 =0xa
3424 00:39:57.330080
3425 00:39:57.333729 CH=1, VrefRange= 0, VrefLevel = 10
3426 00:39:57.336872 TX Bit0 (981~1000) 20 990, Bit8 (969~985) 17 977,
3427 00:39:57.340030 TX Bit1 (980~999) 20 989, Bit9 (969~985) 17 977,
3428 00:39:57.346550 TX Bit2 (978~998) 21 988, Bit10 (971~988) 18 979,
3429 00:39:57.350448 TX Bit3 (978~995) 18 986, Bit11 (973~990) 18 981,
3430 00:39:57.353538 TX Bit4 (980~999) 20 989, Bit12 (972~988) 17 980,
3431 00:39:57.360030 TX Bit5 (981~1001) 21 991, Bit13 (973~990) 18 981,
3432 00:39:57.363533 TX Bit6 (981~999) 19 990, Bit14 (972~988) 17 980,
3433 00:39:57.366639 TX Bit7 (982~998) 17 990, Bit15 (967~983) 17 975,
3434 00:39:57.370037
3435 00:39:57.370156 Write Rank1 MR14 =0xc
3436 00:39:57.379971
3437 00:39:57.383076 CH=1, VrefRange= 0, VrefLevel = 12
3438 00:39:57.386864 TX Bit0 (981~1001) 21 991, Bit8 (969~986) 18 977,
3439 00:39:57.389991 TX Bit1 (980~999) 20 989, Bit9 (969~986) 18 977,
3440 00:39:57.396671 TX Bit2 (979~998) 20 988, Bit10 (971~989) 19 980,
3441 00:39:57.399885 TX Bit3 (977~996) 20 986, Bit11 (972~990) 19 981,
3442 00:39:57.402930 TX Bit4 (979~999) 21 989, Bit12 (971~989) 19 980,
3443 00:39:57.409624 TX Bit5 (981~1001) 21 991, Bit13 (972~991) 20 981,
3444 00:39:57.412979 TX Bit6 (980~1000) 21 990, Bit14 (972~989) 18 980,
3445 00:39:57.419686 TX Bit7 (981~999) 19 990, Bit15 (967~984) 18 975,
3446 00:39:57.419776
3447 00:39:57.419846 Write Rank1 MR14 =0xe
3448 00:39:57.430446
3449 00:39:57.433134 CH=1, VrefRange= 0, VrefLevel = 14
3450 00:39:57.436709 TX Bit0 (981~1001) 21 991, Bit8 (968~987) 20 977,
3451 00:39:57.439766 TX Bit1 (979~1000) 22 989, Bit9 (969~986) 18 977,
3452 00:39:57.446711 TX Bit2 (978~998) 21 988, Bit10 (971~989) 19 980,
3453 00:39:57.449912 TX Bit3 (977~996) 20 986, Bit11 (972~991) 20 981,
3454 00:39:57.453071 TX Bit4 (979~1000) 22 989, Bit12 (972~990) 19 981,
3455 00:39:57.459813 TX Bit5 (980~1002) 23 991, Bit13 (972~991) 20 981,
3456 00:39:57.463148 TX Bit6 (980~1001) 22 990, Bit14 (971~989) 19 980,
3457 00:39:57.469640 TX Bit7 (981~999) 19 990, Bit15 (966~984) 19 975,
3458 00:39:57.469732
3459 00:39:57.469804 Write Rank1 MR14 =0x10
3460 00:39:57.480752
3461 00:39:57.483919 CH=1, VrefRange= 0, VrefLevel = 16
3462 00:39:57.487285 TX Bit0 (980~1002) 23 991, Bit8 (968~987) 20 977,
3463 00:39:57.490468 TX Bit1 (980~1000) 21 990, Bit9 (969~987) 19 978,
3464 00:39:57.497008 TX Bit2 (978~999) 22 988, Bit10 (970~990) 21 980,
3465 00:39:57.500547 TX Bit3 (977~997) 21 987, Bit11 (971~991) 21 981,
3466 00:39:57.503877 TX Bit4 (979~1000) 22 989, Bit12 (971~990) 20 980,
3467 00:39:57.510396 TX Bit5 (980~1002) 23 991, Bit13 (971~991) 21 981,
3468 00:39:57.513396 TX Bit6 (979~1001) 23 990, Bit14 (971~990) 20 980,
3469 00:39:57.520324 TX Bit7 (981~1000) 20 990, Bit15 (966~984) 19 975,
3470 00:39:57.520416
3471 00:39:57.520489 Write Rank1 MR14 =0x12
3472 00:39:57.530907
3473 00:39:57.534640 CH=1, VrefRange= 0, VrefLevel = 18
3474 00:39:57.537689 TX Bit0 (980~1003) 24 991, Bit8 (968~988) 21 978,
3475 00:39:57.541451 TX Bit1 (979~1001) 23 990, Bit9 (969~987) 19 978,
3476 00:39:57.547823 TX Bit2 (978~999) 22 988, Bit10 (970~991) 22 980,
3477 00:39:57.550752 TX Bit3 (977~997) 21 987, Bit11 (970~991) 22 980,
3478 00:39:57.554322 TX Bit4 (979~1001) 23 990, Bit12 (971~991) 21 981,
3479 00:39:57.560899 TX Bit5 (980~1003) 24 991, Bit13 (971~992) 22 981,
3480 00:39:57.564317 TX Bit6 (979~1002) 24 990, Bit14 (970~991) 22 980,
3481 00:39:57.570827 TX Bit7 (980~1000) 21 990, Bit15 (966~985) 20 975,
3482 00:39:57.570918
3483 00:39:57.570989 Write Rank1 MR14 =0x14
3484 00:39:57.581776
3485 00:39:57.585045 CH=1, VrefRange= 0, VrefLevel = 20
3486 00:39:57.588127 TX Bit0 (980~1003) 24 991, Bit8 (968~988) 21 978,
3487 00:39:57.591275 TX Bit1 (979~1001) 23 990, Bit9 (968~988) 21 978,
3488 00:39:57.598259 TX Bit2 (978~999) 22 988, Bit10 (970~991) 22 980,
3489 00:39:57.601753 TX Bit3 (977~998) 22 987, Bit11 (971~991) 21 981,
3490 00:39:57.605335 TX Bit4 (978~1001) 24 989, Bit12 (970~991) 22 980,
3491 00:39:57.611453 TX Bit5 (979~1003) 25 991, Bit13 (971~992) 22 981,
3492 00:39:57.614873 TX Bit6 (979~1002) 24 990, Bit14 (970~991) 22 980,
3493 00:39:57.621287 TX Bit7 (980~1000) 21 990, Bit15 (966~985) 20 975,
3494 00:39:57.621379
3495 00:39:57.621451 Write Rank1 MR14 =0x16
3496 00:39:57.632416
3497 00:39:57.632506 CH=1, VrefRange= 0, VrefLevel = 22
3498 00:39:57.639281 TX Bit0 (979~1004) 26 991, Bit8 (968~989) 22 978,
3499 00:39:57.642568 TX Bit1 (978~1002) 25 990, Bit9 (968~989) 22 978,
3500 00:39:57.649068 TX Bit2 (977~1000) 24 988, Bit10 (970~991) 22 980,
3501 00:39:57.652352 TX Bit3 (977~998) 22 987, Bit11 (970~992) 23 981,
3502 00:39:57.655633 TX Bit4 (978~1002) 25 990, Bit12 (971~991) 21 981,
3503 00:39:57.662196 TX Bit5 (979~1004) 26 991, Bit13 (971~992) 22 981,
3504 00:39:57.665214 TX Bit6 (979~1003) 25 991, Bit14 (970~991) 22 980,
3505 00:39:57.672078 TX Bit7 (979~1001) 23 990, Bit15 (966~985) 20 975,
3506 00:39:57.672170
3507 00:39:57.672241 Write Rank1 MR14 =0x18
3508 00:39:57.683681
3509 00:39:57.686783 CH=1, VrefRange= 0, VrefLevel = 24
3510 00:39:57.690434 TX Bit0 (979~1005) 27 992, Bit8 (967~990) 24 978,
3511 00:39:57.693547 TX Bit1 (978~1002) 25 990, Bit9 (968~989) 22 978,
3512 00:39:57.700185 TX Bit2 (977~1000) 24 988, Bit10 (969~991) 23 980,
3513 00:39:57.703038 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3514 00:39:57.706558 TX Bit4 (978~1002) 25 990, Bit12 (970~992) 23 981,
3515 00:39:57.713430 TX Bit5 (979~1004) 26 991, Bit13 (970~992) 23 981,
3516 00:39:57.716467 TX Bit6 (978~1003) 26 990, Bit14 (970~991) 22 980,
3517 00:39:57.723285 TX Bit7 (979~1002) 24 990, Bit15 (965~986) 22 975,
3518 00:39:57.723375
3519 00:39:57.723462 Write Rank1 MR14 =0x1a
3520 00:39:57.734644
3521 00:39:57.737734 CH=1, VrefRange= 0, VrefLevel = 26
3522 00:39:57.740960 TX Bit0 (979~1005) 27 992, Bit8 (967~991) 25 979,
3523 00:39:57.744113 TX Bit1 (978~1003) 26 990, Bit9 (968~990) 23 979,
3524 00:39:57.751313 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3525 00:39:57.754123 TX Bit3 (976~999) 24 987, Bit11 (970~992) 23 981,
3526 00:39:57.757811 TX Bit4 (978~1002) 25 990, Bit12 (970~992) 23 981,
3527 00:39:57.764047 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3528 00:39:57.767588 TX Bit6 (978~1004) 27 991, Bit14 (970~992) 23 981,
3529 00:39:57.774278 TX Bit7 (980~1002) 23 991, Bit15 (964~986) 23 975,
3530 00:39:57.774371
3531 00:39:57.774444 Write Rank1 MR14 =0x1c
3532 00:39:57.785583
3533 00:39:57.788828 CH=1, VrefRange= 0, VrefLevel = 28
3534 00:39:57.791957 TX Bit0 (979~1005) 27 992, Bit8 (967~990) 24 978,
3535 00:39:57.795583 TX Bit1 (978~1004) 27 991, Bit9 (968~990) 23 979,
3536 00:39:57.801989 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3537 00:39:57.805190 TX Bit3 (976~999) 24 987, Bit11 (969~993) 25 981,
3538 00:39:57.808614 TX Bit4 (978~1004) 27 991, Bit12 (970~992) 23 981,
3539 00:39:57.815181 TX Bit5 (978~1005) 28 991, Bit13 (970~993) 24 981,
3540 00:39:57.818641 TX Bit6 (978~1004) 27 991, Bit14 (970~992) 23 981,
3541 00:39:57.825112 TX Bit7 (979~1003) 25 991, Bit15 (964~987) 24 975,
3542 00:39:57.825204
3543 00:39:57.825276 Write Rank1 MR14 =0x1e
3544 00:39:57.836412
3545 00:39:57.836502 CH=1, VrefRange= 0, VrefLevel = 30
3546 00:39:57.843213 TX Bit0 (979~1005) 27 992, Bit8 (967~990) 24 978,
3547 00:39:57.846379 TX Bit1 (978~1004) 27 991, Bit9 (968~990) 23 979,
3548 00:39:57.852773 TX Bit2 (977~1001) 25 989, Bit10 (969~993) 25 981,
3549 00:39:57.856809 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3550 00:39:57.859744 TX Bit4 (978~1004) 27 991, Bit12 (970~993) 24 981,
3551 00:39:57.866869 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3552 00:39:57.869931 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3553 00:39:57.876379 TX Bit7 (979~1004) 26 991, Bit15 (964~987) 24 975,
3554 00:39:57.876472
3555 00:39:57.876544 Write Rank1 MR14 =0x20
3556 00:39:57.887386
3557 00:39:57.890457 CH=1, VrefRange= 0, VrefLevel = 32
3558 00:39:57.894121 TX Bit0 (979~1005) 27 992, Bit8 (967~990) 24 978,
3559 00:39:57.897432 TX Bit1 (978~1004) 27 991, Bit9 (968~990) 23 979,
3560 00:39:57.904285 TX Bit2 (977~1002) 26 989, Bit10 (969~992) 24 980,
3561 00:39:57.907335 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3562 00:39:57.910577 TX Bit4 (978~1004) 27 991, Bit12 (969~993) 25 981,
3563 00:39:57.917572 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3564 00:39:57.920808 TX Bit6 (978~1005) 28 991, Bit14 (969~992) 24 980,
3565 00:39:57.927637 TX Bit7 (978~1004) 27 991, Bit15 (963~987) 25 975,
3566 00:39:57.927729
3567 00:39:57.927800 Write Rank1 MR14 =0x22
3568 00:39:57.950245
3569 00:39:57.950353 CH=1, VrefRange= 0, VrefLevel = 34
3570 00:39:57.950429 TX Bit0 (979~1005) 27 992, Bit8 (967~990) 24 978,
3571 00:39:57.950499 TX Bit1 (978~1003) 26 990, Bit9 (967~990) 24 978,
3572 00:39:57.954958 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3573 00:39:57.958263 TX Bit3 (975~998) 24 986, Bit11 (969~992) 24 980,
3574 00:39:57.961424 TX Bit4 (978~1003) 26 990, Bit12 (969~993) 25 981,
3575 00:39:57.968154 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3576 00:39:57.971568 TX Bit6 (978~1004) 27 991, Bit14 (969~992) 24 980,
3577 00:39:57.977888 TX Bit7 (978~1003) 26 990, Bit15 (963~986) 24 974,
3578 00:39:57.977980
3579 00:39:57.978052 Write Rank1 MR14 =0x24
3580 00:39:57.989547
3581 00:39:57.992660 CH=1, VrefRange= 0, VrefLevel = 36
3582 00:39:57.996167 TX Bit0 (979~1005) 27 992, Bit8 (967~990) 24 978,
3583 00:39:57.999139 TX Bit1 (978~1003) 26 990, Bit9 (967~990) 24 978,
3584 00:39:58.005783 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3585 00:39:58.009036 TX Bit3 (975~998) 24 986, Bit11 (969~992) 24 980,
3586 00:39:58.015727 TX Bit4 (978~1003) 26 990, Bit12 (969~993) 25 981,
3587 00:39:58.018900 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3588 00:39:58.022500 TX Bit6 (978~1004) 27 991, Bit14 (969~992) 24 980,
3589 00:39:58.028915 TX Bit7 (978~1003) 26 990, Bit15 (963~986) 24 974,
3590 00:39:58.029007
3591 00:39:58.029079 Write Rank1 MR14 =0x26
3592 00:39:58.040729
3593 00:39:58.043619 CH=1, VrefRange= 0, VrefLevel = 38
3594 00:39:58.047054 TX Bit0 (979~1005) 27 992, Bit8 (967~990) 24 978,
3595 00:39:58.050386 TX Bit1 (978~1003) 26 990, Bit9 (967~990) 24 978,
3596 00:39:58.057393 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3597 00:39:58.060355 TX Bit3 (975~998) 24 986, Bit11 (969~992) 24 980,
3598 00:39:58.063808 TX Bit4 (978~1003) 26 990, Bit12 (969~993) 25 981,
3599 00:39:58.070265 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3600 00:39:58.073420 TX Bit6 (978~1004) 27 991, Bit14 (969~992) 24 980,
3601 00:39:58.080110 TX Bit7 (978~1003) 26 990, Bit15 (963~986) 24 974,
3602 00:39:58.080201
3603 00:39:58.080273 Write Rank1 MR14 =0x28
3604 00:39:58.091362
3605 00:39:58.094960 CH=1, VrefRange= 0, VrefLevel = 40
3606 00:39:58.097580 TX Bit0 (979~1005) 27 992, Bit8 (967~990) 24 978,
3607 00:39:58.101476 TX Bit1 (978~1003) 26 990, Bit9 (967~990) 24 978,
3608 00:39:58.108146 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3609 00:39:58.110880 TX Bit3 (975~998) 24 986, Bit11 (969~992) 24 980,
3610 00:39:58.114678 TX Bit4 (978~1003) 26 990, Bit12 (969~993) 25 981,
3611 00:39:58.121150 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3612 00:39:58.124315 TX Bit6 (978~1004) 27 991, Bit14 (969~992) 24 980,
3613 00:39:58.130570 TX Bit7 (978~1003) 26 990, Bit15 (963~986) 24 974,
3614 00:39:58.130661
3615 00:39:58.130732
3616 00:39:58.134136 TX Vref found, early break! 373< 380
3617 00:39:58.137365 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3618 00:39:58.140616 u1DelayCellOfst[0]=7 cells (6 PI)
3619 00:39:58.144354 u1DelayCellOfst[1]=5 cells (4 PI)
3620 00:39:58.147546 u1DelayCellOfst[2]=3 cells (3 PI)
3621 00:39:58.150930 u1DelayCellOfst[3]=0 cells (0 PI)
3622 00:39:58.153863 u1DelayCellOfst[4]=5 cells (4 PI)
3623 00:39:58.157159 u1DelayCellOfst[5]=7 cells (6 PI)
3624 00:39:58.160852 u1DelayCellOfst[6]=6 cells (5 PI)
3625 00:39:58.164287 u1DelayCellOfst[7]=5 cells (4 PI)
3626 00:39:58.167296 Byte0, DQ PI dly=986, DQM PI dly= 989
3627 00:39:58.170466 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3628 00:39:58.170558
3629 00:39:58.173883 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3630 00:39:58.173983
3631 00:39:58.176945 u1DelayCellOfst[8]=5 cells (4 PI)
3632 00:39:58.180788 u1DelayCellOfst[9]=5 cells (4 PI)
3633 00:39:58.184026 u1DelayCellOfst[10]=7 cells (6 PI)
3634 00:39:58.187339 u1DelayCellOfst[11]=7 cells (6 PI)
3635 00:39:58.190282 u1DelayCellOfst[12]=9 cells (7 PI)
3636 00:39:58.194064 u1DelayCellOfst[13]=9 cells (7 PI)
3637 00:39:58.197129 u1DelayCellOfst[14]=7 cells (6 PI)
3638 00:39:58.200842 u1DelayCellOfst[15]=0 cells (0 PI)
3639 00:39:58.203446 Byte1, DQ PI dly=974, DQM PI dly= 977
3640 00:39:58.207378 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
3641 00:39:58.207478
3642 00:39:58.210170 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
3643 00:39:58.210261
3644 00:39:58.213797 Write Rank1 MR14 =0x22
3645 00:39:58.213887
3646 00:39:58.217059 Final TX Range 0 Vref 34
3647 00:39:58.217148
3648 00:39:58.223934 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3649 00:39:58.224025
3650 00:39:58.230350 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3651 00:39:58.236934 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3652 00:39:58.243745 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3653 00:39:58.243836 Write Rank1 MR3 =0xb0
3654 00:39:58.246908 DramC Write-DBI on
3655 00:39:58.246998 ==
3656 00:39:58.253952 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3657 00:39:58.257239 fsp= 1, odt_onoff= 1, Byte mode= 0
3658 00:39:58.257336 ==
3659 00:39:58.260433 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3660 00:39:58.260524
3661 00:39:58.263641 Begin, DQ Scan Range 697~761
3662 00:39:58.263731
3663 00:39:58.263801
3664 00:39:58.263867 TX Vref Scan disable
3665 00:39:58.267376 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3666 00:39:58.273583 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3667 00:39:58.276943 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3668 00:39:58.280207 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3669 00:39:58.283517 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3670 00:39:58.287262 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3671 00:39:58.290088 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3672 00:39:58.293913 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3673 00:39:58.296756 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3674 00:39:58.300310 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3675 00:39:58.303548 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3676 00:39:58.306808 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3677 00:39:58.310626 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3678 00:39:58.313556 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3679 00:39:58.316630 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3680 00:39:58.320588 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3681 00:39:58.323691 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3682 00:39:58.326795 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3683 00:39:58.330143 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3684 00:39:58.333251 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3685 00:39:58.336737 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3686 00:39:58.343729 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3687 00:39:58.346731 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3688 00:39:58.349976 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3689 00:39:58.353229 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3690 00:39:58.356999 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3691 00:39:58.363742 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3692 00:39:58.366926 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3693 00:39:58.370349 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3694 00:39:58.373605 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3695 00:39:58.377127 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3696 00:39:58.380196 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3697 00:39:58.383349 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3698 00:39:58.386696 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3699 00:39:58.390171 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3700 00:39:58.393434 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3701 00:39:58.396453 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3702 00:39:58.400158 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3703 00:39:58.403363 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3704 00:39:58.406536 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3705 00:39:58.410162 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3706 00:39:58.413062 Byte0, DQ PI dly=736, DQM PI dly= 736
3707 00:39:58.420437 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
3708 00:39:58.420528
3709 00:39:58.423413 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
3710 00:39:58.423505
3711 00:39:58.426812 Byte1, DQ PI dly=723, DQM PI dly= 723
3712 00:39:58.430073 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3713 00:39:58.430164
3714 00:39:58.436766 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3715 00:39:58.436860
3716 00:39:58.443284 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3717 00:39:58.450165 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3718 00:39:58.456643 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3719 00:39:58.460248 Write Rank1 MR3 =0x30
3720 00:39:58.460338 DramC Write-DBI off
3721 00:39:58.460409
3722 00:39:58.460475 [DATLAT]
3723 00:39:58.463143 Freq=1600, CH1 RK1, use_rxtx_scan=0
3724 00:39:58.463234
3725 00:39:58.466421 DATLAT Default: 0x10
3726 00:39:58.466510 7, 0xFFFF, sum=0
3727 00:39:58.469716 8, 0xFFFF, sum=0
3728 00:39:58.469807 9, 0xFFFF, sum=0
3729 00:39:58.472971 10, 0xFFFF, sum=0
3730 00:39:58.473063 11, 0xFFFF, sum=0
3731 00:39:58.476637 12, 0xFFFF, sum=0
3732 00:39:58.476728 13, 0xFFFF, sum=0
3733 00:39:58.479800 14, 0x0, sum=1
3734 00:39:58.479892 15, 0x0, sum=2
3735 00:39:58.483183 16, 0x0, sum=3
3736 00:39:58.483285 17, 0x0, sum=4
3737 00:39:58.486164 pattern=2 first_step=14 total pass=5 best_step=16
3738 00:39:58.486253 ==
3739 00:39:58.493112 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3740 00:39:58.496241 fsp= 1, odt_onoff= 1, Byte mode= 0
3741 00:39:58.496332 ==
3742 00:39:58.499593 Start DQ dly to find pass range UseTestEngine =1
3743 00:39:58.503014 x-axis: bit #, y-axis: DQ dly (-127~63)
3744 00:39:58.506044 RX Vref Scan = 0
3745 00:39:58.509633 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3746 00:39:58.512965 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3747 00:39:58.513057 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3748 00:39:58.516231 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3749 00:39:58.519623 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3750 00:39:58.522758 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3751 00:39:58.525985 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3752 00:39:58.529214 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3753 00:39:58.532681 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3754 00:39:58.535927 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3755 00:39:58.539313 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3756 00:39:58.542749 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3757 00:39:58.542841 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3758 00:39:58.545957 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3759 00:39:58.549301 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3760 00:39:58.552362 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3761 00:39:58.555852 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3762 00:39:58.558949 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3763 00:39:58.561979 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3764 00:39:58.565782 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3765 00:39:58.565878 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3766 00:39:58.568894 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3767 00:39:58.572022 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3768 00:39:58.575398 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3769 00:39:58.578847 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3770 00:39:58.582023 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3771 00:39:58.585598 0, [0] xxooxxxx ooxxxxxo [MSB]
3772 00:39:58.585694 1, [0] xxooxxxx ooxxxxxo [MSB]
3773 00:39:58.588973 2, [0] xxooxxxx ooxxxxxo [MSB]
3774 00:39:58.592250 3, [0] xxooxxxo oooxxxxo [MSB]
3775 00:39:58.595049 4, [0] oooooxxo ooooooxo [MSB]
3776 00:39:58.598764 32, [0] oooooooo ooooooox [MSB]
3777 00:39:58.601979 33, [0] oooooooo ooooooox [MSB]
3778 00:39:58.605393 34, [0] oooooooo ooooooox [MSB]
3779 00:39:58.608761 35, [0] oooxoooo oxooooox [MSB]
3780 00:39:58.612051 36, [0] oooxoooo xxooooox [MSB]
3781 00:39:58.615581 37, [0] ooxxoooo xxooooox [MSB]
3782 00:39:58.615673 38, [0] ooxxoooo xxooooox [MSB]
3783 00:39:58.618871 39, [0] ooxxooox xxooooox [MSB]
3784 00:39:58.622179 40, [0] oxxxxoox xxxoooox [MSB]
3785 00:39:58.625401 41, [0] xxxxxxox xxxxxxxx [MSB]
3786 00:39:58.628746 42, [0] xxxxxxxx xxxxxxxx [MSB]
3787 00:39:58.632176 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
3788 00:39:58.635612 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
3789 00:39:58.638594 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3790 00:39:58.641837 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3791 00:39:58.645063 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3792 00:39:58.648983 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3793 00:39:58.651701 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3794 00:39:58.655205 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3795 00:39:58.658513 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
3796 00:39:58.664965 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3797 00:39:58.668512 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3798 00:39:58.671947 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3799 00:39:58.675084 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3800 00:39:58.678357 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
3801 00:39:58.681730 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3802 00:39:58.685507 iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36
3803 00:39:58.685597 ==
3804 00:39:58.692124 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3805 00:39:58.695814 fsp= 1, odt_onoff= 1, Byte mode= 0
3806 00:39:58.695906 ==
3807 00:39:58.695978 DQS Delay:
3808 00:39:58.698634 DQS0 = 0, DQS1 = 0
3809 00:39:58.698724 DQM Delay:
3810 00:39:58.698796 DQM0 = 20, DQM1 = 19
3811 00:39:58.701867 DQ Delay:
3812 00:39:58.705263 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3813 00:39:58.709045 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3814 00:39:58.712030 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3815 00:39:58.714945 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =13
3816 00:39:58.715035
3817 00:39:58.715106
3818 00:39:58.715172
3819 00:39:58.718977 [DramC_TX_OE_Calibration] TA2
3820 00:39:58.721735 Original DQ_B0 (3 6) =30, OEN = 27
3821 00:39:58.721827 Original DQ_B1 (3 6) =30, OEN = 27
3822 00:39:58.724851 23, 0x0, End_B0=23 End_B1=23
3823 00:39:58.728714 24, 0x0, End_B0=24 End_B1=24
3824 00:39:58.731609 25, 0x0, End_B0=25 End_B1=25
3825 00:39:58.735239 26, 0x0, End_B0=26 End_B1=26
3826 00:39:58.735337 27, 0x0, End_B0=27 End_B1=27
3827 00:39:58.738210 28, 0x0, End_B0=28 End_B1=28
3828 00:39:58.741592 29, 0x0, End_B0=29 End_B1=29
3829 00:39:58.745409 30, 0x0, End_B0=30 End_B1=30
3830 00:39:58.745501 31, 0xFFFF, End_B0=30 End_B1=30
3831 00:39:58.751836 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3832 00:39:58.758326 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3833 00:39:58.758417
3834 00:39:58.758489
3835 00:39:58.762364 Write Rank1 MR23 =0x3f
3836 00:39:58.762454 [DQSOSC]
3837 00:39:58.768352 [DQSOSCAuto] RK1, (LSB)MR18= 0xcece, (MSB)MR19= 0x202, tDQSOscB0 = 438 ps tDQSOscB1 = 438 ps
3838 00:39:58.775379 CH1_RK1: MR19=0x202, MR18=0xCECE, DQSOSC=438, MR23=63, INC=12, DEC=19
3839 00:39:58.778363 Write Rank1 MR23 =0x3f
3840 00:39:58.778454 [DQSOSC]
3841 00:39:58.785196 [DQSOSCAuto] RK1, (LSB)MR18= 0xcccc, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
3842 00:39:58.788464 CH1 RK1: MR19=202, MR18=CCCC
3843 00:39:58.791604 [RxdqsGatingPostProcess] freq 1600
3844 00:39:58.798595 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3845 00:39:58.798686 Rank: 0
3846 00:39:58.801650 best DQS0 dly(2T, 0.5T) = (2, 6)
3847 00:39:58.805038 best DQS1 dly(2T, 0.5T) = (2, 6)
3848 00:39:58.808394 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3849 00:39:58.811969 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3850 00:39:58.812060 Rank: 1
3851 00:39:58.814971 best DQS0 dly(2T, 0.5T) = (2, 5)
3852 00:39:58.818313 best DQS1 dly(2T, 0.5T) = (2, 6)
3853 00:39:58.821619 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3854 00:39:58.825339 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3855 00:39:58.828445 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3856 00:39:58.831861 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3857 00:39:58.835049 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3858 00:39:58.838451
3859 00:39:58.838540
3860 00:39:58.841727 [Calibration Summary] Freqency 1600
3861 00:39:58.841818 CH 0, Rank 0
3862 00:39:58.841890 All Pass.
3863 00:39:58.841956
3864 00:39:58.844983 CH 0, Rank 1
3865 00:39:58.845073 All Pass.
3866 00:39:58.845145
3867 00:39:58.845210 CH 1, Rank 0
3868 00:39:58.848342 All Pass.
3869 00:39:58.848432
3870 00:39:58.848503 CH 1, Rank 1
3871 00:39:58.848570 All Pass.
3872 00:39:58.848634
3873 00:39:58.854813 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3874 00:39:58.861510 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3875 00:39:58.871503 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3876 00:39:58.871592 Write Rank0 MR3 =0xb0
3877 00:39:58.877980 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3878 00:39:58.884744 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3879 00:39:58.891601 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3880 00:39:58.894432 Write Rank1 MR3 =0xb0
3881 00:39:58.901336 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3882 00:39:58.907774 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3883 00:39:58.914696 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3884 00:39:58.918235 Write Rank0 MR3 =0xb0
3885 00:39:58.924296 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3886 00:39:58.931519 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3887 00:39:58.937843 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3888 00:39:58.941130 Write Rank1 MR3 =0xb0
3889 00:39:58.941220 DramC Write-DBI on
3890 00:39:58.944415 [GetDramInforAfterCalByMRR] Vendor 6.
3891 00:39:58.947859 [GetDramInforAfterCalByMRR] Revision 505.
3892 00:39:58.947949 MR8 1111
3893 00:39:58.954271 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3894 00:39:58.954362 MR8 1111
3895 00:39:58.960848 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3896 00:39:58.960940 MR8 1111
3897 00:39:58.964422 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3898 00:39:58.967448 MR8 1111
3899 00:39:58.971240 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3900 00:39:58.980760 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3901 00:39:58.980879 Write Rank0 MR13 =0xd0
3902 00:39:58.984077 Write Rank1 MR13 =0xd0
3903 00:39:58.987434 Write Rank0 MR13 =0xd0
3904 00:39:58.987526 Write Rank1 MR13 =0xd0
3905 00:39:58.991028 Save calibration result to emmc
3906 00:39:58.991118
3907 00:39:58.991188
3908 00:39:58.994019 [DramcModeReg_Check] Freq_1600, FSP_1
3909 00:39:58.997802 FSP_1, CH_0, RK0
3910 00:39:58.997893 Write Rank0 MR13 =0xd8
3911 00:39:59.001131 MR12 = 0x5e (global = 0x5e) match
3912 00:39:59.003924 MR14 = 0x1e (global = 0x1e) match
3913 00:39:59.007654 FSP_1, CH_0, RK1
3914 00:39:59.007748 Write Rank1 MR13 =0xd8
3915 00:39:59.010925 MR12 = 0x5a (global = 0x5a) match
3916 00:39:59.014219 MR14 = 0x20 (global = 0x20) match
3917 00:39:59.017094 FSP_1, CH_1, RK0
3918 00:39:59.017185 Write Rank0 MR13 =0xd8
3919 00:39:59.020618 MR12 = 0x60 (global = 0x60) match
3920 00:39:59.023947 MR14 = 0x20 (global = 0x20) match
3921 00:39:59.027518 FSP_1, CH_1, RK1
3922 00:39:59.027608 Write Rank1 MR13 =0xd8
3923 00:39:59.030702 MR12 = 0x5e (global = 0x5e) match
3924 00:39:59.034260 MR14 = 0x22 (global = 0x22) match
3925 00:39:59.034350
3926 00:39:59.040508 [MEM_TEST] 02: After DFS, before run time config
3927 00:39:59.047223 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3928 00:39:59.047318
3929 00:39:59.050382 [TA2_TEST]
3930 00:39:59.050472 === TA2 HW
3931 00:39:59.054018 TA2 PAT: XTALK
3932 00:39:59.057000 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3933 00:39:59.060506 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3934 00:39:59.067308 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3935 00:39:59.070126 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3936 00:39:59.070217
3937 00:39:59.070288
3938 00:39:59.073780 Settings after calibration
3939 00:39:59.073870
3940 00:39:59.076910 [DramcRunTimeConfig]
3941 00:39:59.080318 TransferPLLToSPMControl - MODE SW PHYPLL
3942 00:39:59.080408 TX_TRACKING: ON
3943 00:39:59.083886 RX_TRACKING: ON
3944 00:39:59.083977 HW_GATING: ON
3945 00:39:59.087227 HW_GATING DBG: OFF
3946 00:39:59.087316 ddr_geometry:1
3947 00:39:59.090047 ddr_geometry:1
3948 00:39:59.090136 ddr_geometry:1
3949 00:39:59.090210 ddr_geometry:1
3950 00:39:59.093564 ddr_geometry:1
3951 00:39:59.093653 ddr_geometry:1
3952 00:39:59.097325 ddr_geometry:1
3953 00:39:59.097415 ddr_geometry:1
3954 00:39:59.100121 High Freq DUMMY_READ_FOR_TRACKING: ON
3955 00:39:59.103463 ZQCS_ENABLE_LP4: OFF
3956 00:39:59.106924 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3957 00:39:59.109925 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3958 00:39:59.110015 SPM_CONTROL_AFTERK: ON
3959 00:39:59.113487 IMPEDANCE_TRACKING: ON
3960 00:39:59.113578 TEMP_SENSOR: ON
3961 00:39:59.116851 PER_BANK_REFRESH: ON
3962 00:39:59.116941 HW_SAVE_FOR_SR: ON
3963 00:39:59.120121 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3964 00:39:59.123040 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3965 00:39:59.127026 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3966 00:39:59.130443 Read ODT Tracking: ON
3967 00:39:59.133480 =========================
3968 00:39:59.133570
3969 00:39:59.133641 [TA2_TEST]
3970 00:39:59.133707 === TA2 HW
3971 00:39:59.140005 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3972 00:39:59.143464 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3973 00:39:59.150018 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3974 00:39:59.153380 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3975 00:39:59.153470
3976 00:39:59.156532 [MEM_TEST] 03: After run time config
3977 00:39:59.168157 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3978 00:39:59.171132 [complex_mem_test] start addr:0x40024000, len:131072
3979 00:39:59.375476 1st complex R/W mem test pass
3980 00:39:59.382430 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3981 00:39:59.384951 sync preloader write leveling
3982 00:39:59.388809 sync preloader cbt_mr12
3983 00:39:59.392220 sync preloader cbt_clk_dly
3984 00:39:59.392311 sync preloader cbt_cmd_dly
3985 00:39:59.395153 sync preloader cbt_cs
3986 00:39:59.398834 sync preloader cbt_ca_perbit_delay
3987 00:39:59.398924 sync preloader clk_delay
3988 00:39:59.401783 sync preloader dqs_delay
3989 00:39:59.405112 sync preloader u1Gating2T_Save
3990 00:39:59.408646 sync preloader u1Gating05T_Save
3991 00:39:59.411492 sync preloader u1Gatingfine_tune_Save
3992 00:39:59.415171 sync preloader u1Gatingucpass_count_Save
3993 00:39:59.418684 sync preloader u1TxWindowPerbitVref_Save
3994 00:39:59.421760 sync preloader u1TxCenter_min_Save
3995 00:39:59.425348 sync preloader u1TxCenter_max_Save
3996 00:39:59.428688 sync preloader u1Txwin_center_Save
3997 00:39:59.431917 sync preloader u1Txfirst_pass_Save
3998 00:39:59.435176 sync preloader u1Txlast_pass_Save
3999 00:39:59.435266 sync preloader u1RxDatlat_Save
4000 00:39:59.438506 sync preloader u1RxWinPerbitVref_Save
4001 00:39:59.445373 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4002 00:39:59.448288 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4003 00:39:59.451648 sync preloader delay_cell_unit
4004 00:39:59.458647 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4005 00:39:59.462295 sync preloader write leveling
4006 00:39:59.462384 sync preloader cbt_mr12
4007 00:39:59.465480 sync preloader cbt_clk_dly
4008 00:39:59.468685 sync preloader cbt_cmd_dly
4009 00:39:59.468766 sync preloader cbt_cs
4010 00:39:59.471787 sync preloader cbt_ca_perbit_delay
4011 00:39:59.475033 sync preloader clk_delay
4012 00:39:59.478296 sync preloader dqs_delay
4013 00:39:59.478409 sync preloader u1Gating2T_Save
4014 00:39:59.482121 sync preloader u1Gating05T_Save
4015 00:39:59.485586 sync preloader u1Gatingfine_tune_Save
4016 00:39:59.488779 sync preloader u1Gatingucpass_count_Save
4017 00:39:59.491926 sync preloader u1TxWindowPerbitVref_Save
4018 00:39:59.495202 sync preloader u1TxCenter_min_Save
4019 00:39:59.498589 sync preloader u1TxCenter_max_Save
4020 00:39:59.501958 sync preloader u1Txwin_center_Save
4021 00:39:59.504999 sync preloader u1Txfirst_pass_Save
4022 00:39:59.508471 sync preloader u1Txlast_pass_Save
4023 00:39:59.511549 sync preloader u1RxDatlat_Save
4024 00:39:59.514984 sync preloader u1RxWinPerbitVref_Save
4025 00:39:59.518433 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4026 00:39:59.521739 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4027 00:39:59.524834 sync preloader delay_cell_unit
4028 00:39:59.531540 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4029 00:39:59.535074 sync preloader write leveling
4030 00:39:59.538133 sync preloader cbt_mr12
4031 00:39:59.538246 sync preloader cbt_clk_dly
4032 00:39:59.541588 sync preloader cbt_cmd_dly
4033 00:39:59.544894 sync preloader cbt_cs
4034 00:39:59.548273 sync preloader cbt_ca_perbit_delay
4035 00:39:59.548355 sync preloader clk_delay
4036 00:39:59.551356 sync preloader dqs_delay
4037 00:39:59.554836 sync preloader u1Gating2T_Save
4038 00:39:59.558258 sync preloader u1Gating05T_Save
4039 00:39:59.561452 sync preloader u1Gatingfine_tune_Save
4040 00:39:59.564922 sync preloader u1Gatingucpass_count_Save
4041 00:39:59.568559 sync preloader u1TxWindowPerbitVref_Save
4042 00:39:59.571492 sync preloader u1TxCenter_min_Save
4043 00:39:59.575339 sync preloader u1TxCenter_max_Save
4044 00:39:59.578604 sync preloader u1Txwin_center_Save
4045 00:39:59.581740 sync preloader u1Txfirst_pass_Save
4046 00:39:59.585055 sync preloader u1Txlast_pass_Save
4047 00:39:59.585167 sync preloader u1RxDatlat_Save
4048 00:39:59.587962 sync preloader u1RxWinPerbitVref_Save
4049 00:39:59.594624 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4050 00:39:59.598219 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4051 00:39:59.601560 sync preloader delay_cell_unit
4052 00:39:59.604863 just_for_test_dump_coreboot_params dump all params
4053 00:39:59.608197 dump source = 0x0
4054 00:39:59.608282 dump params frequency:1600
4055 00:39:59.611793 dump params rank number:2
4056 00:39:59.611879
4057 00:39:59.615080 dump params write leveling
4058 00:39:59.618457 write leveling[0][0][0] = 0x20
4059 00:39:59.618549 write leveling[0][0][1] = 0x18
4060 00:39:59.621467 write leveling[0][1][0] = 0x1a
4061 00:39:59.624640 write leveling[0][1][1] = 0x18
4062 00:39:59.628007 write leveling[1][0][0] = 0x21
4063 00:39:59.631315 write leveling[1][0][1] = 0x18
4064 00:39:59.634983 write leveling[1][1][0] = 0x23
4065 00:39:59.635095 write leveling[1][1][1] = 0x18
4066 00:39:59.637820 dump params cbt_cs
4067 00:39:59.637906 cbt_cs[0][0] = 0x8
4068 00:39:59.641417 cbt_cs[0][1] = 0x8
4069 00:39:59.644397 cbt_cs[1][0] = 0xb
4070 00:39:59.644517 cbt_cs[1][1] = 0xb
4071 00:39:59.647977 dump params cbt_mr12
4072 00:39:59.648092 cbt_mr12[0][0] = 0x1e
4073 00:39:59.651398 cbt_mr12[0][1] = 0x1a
4074 00:39:59.651492 cbt_mr12[1][0] = 0x20
4075 00:39:59.654707 cbt_mr12[1][1] = 0x1e
4076 00:39:59.657742 dump params tx window
4077 00:39:59.657826 tx_center_min[0][0][0] = 981
4078 00:39:59.661445 tx_center_max[0][0][0] = 988
4079 00:39:59.664484 tx_center_min[0][0][1] = 976
4080 00:39:59.668110 tx_center_max[0][0][1] = 981
4081 00:39:59.671064 tx_center_min[0][1][0] = 979
4082 00:39:59.671177 tx_center_max[0][1][0] = 986
4083 00:39:59.674617 tx_center_min[0][1][1] = 978
4084 00:39:59.677814 tx_center_max[0][1][1] = 985
4085 00:39:59.681435 tx_center_min[1][0][0] = 988
4086 00:39:59.684829 tx_center_max[1][0][0] = 992
4087 00:39:59.684944 tx_center_min[1][0][1] = 976
4088 00:39:59.688120 tx_center_max[1][0][1] = 982
4089 00:39:59.691348 tx_center_min[1][1][0] = 986
4090 00:39:59.694671 tx_center_max[1][1][0] = 992
4091 00:39:59.694755 tx_center_min[1][1][1] = 974
4092 00:39:59.697814 tx_center_max[1][1][1] = 981
4093 00:39:59.701103 dump params tx window
4094 00:39:59.704395 tx_win_center[0][0][0] = 988
4095 00:39:59.704493 tx_first_pass[0][0][0] = 976
4096 00:39:59.707760 tx_last_pass[0][0][0] = 1000
4097 00:39:59.710955 tx_win_center[0][0][1] = 987
4098 00:39:59.714085 tx_first_pass[0][0][1] = 975
4099 00:39:59.717507 tx_last_pass[0][0][1] = 999
4100 00:39:59.717622 tx_win_center[0][0][2] = 987
4101 00:39:59.720821 tx_first_pass[0][0][2] = 976
4102 00:39:59.724682 tx_last_pass[0][0][2] = 999
4103 00:39:59.727785 tx_win_center[0][0][3] = 981
4104 00:39:59.727876 tx_first_pass[0][0][3] = 969
4105 00:39:59.731171 tx_last_pass[0][0][3] = 994
4106 00:39:59.734631 tx_win_center[0][0][4] = 986
4107 00:39:59.738029 tx_first_pass[0][0][4] = 974
4108 00:39:59.738149 tx_last_pass[0][0][4] = 999
4109 00:39:59.741285 tx_win_center[0][0][5] = 983
4110 00:39:59.745262 tx_first_pass[0][0][5] = 971
4111 00:39:59.748003 tx_last_pass[0][0][5] = 995
4112 00:39:59.751886 tx_win_center[0][0][6] = 985
4113 00:39:59.751977 tx_first_pass[0][0][6] = 973
4114 00:39:59.754607 tx_last_pass[0][0][6] = 997
4115 00:39:59.758478 tx_win_center[0][0][7] = 987
4116 00:39:59.761361 tx_first_pass[0][0][7] = 975
4117 00:39:59.761452 tx_last_pass[0][0][7] = 999
4118 00:39:59.764578 tx_win_center[0][0][8] = 976
4119 00:39:59.767687 tx_first_pass[0][0][8] = 964
4120 00:39:59.771134 tx_last_pass[0][0][8] = 988
4121 00:39:59.774787 tx_win_center[0][0][9] = 978
4122 00:39:59.774908 tx_first_pass[0][0][9] = 967
4123 00:39:59.778200 tx_last_pass[0][0][9] = 990
4124 00:39:59.781489 tx_win_center[0][0][10] = 981
4125 00:39:59.784302 tx_first_pass[0][0][10] = 969
4126 00:39:59.788261 tx_last_pass[0][0][10] = 994
4127 00:39:59.788351 tx_win_center[0][0][11] = 977
4128 00:39:59.791211 tx_first_pass[0][0][11] = 965
4129 00:39:59.794590 tx_last_pass[0][0][11] = 989
4130 00:39:59.797845 tx_win_center[0][0][12] = 979
4131 00:39:59.801153 tx_first_pass[0][0][12] = 967
4132 00:39:59.801275 tx_last_pass[0][0][12] = 991
4133 00:39:59.804691 tx_win_center[0][0][13] = 978
4134 00:39:59.807604 tx_first_pass[0][0][13] = 967
4135 00:39:59.811025 tx_last_pass[0][0][13] = 990
4136 00:39:59.814687 tx_win_center[0][0][14] = 978
4137 00:39:59.814777 tx_first_pass[0][0][14] = 967
4138 00:39:59.818207 tx_last_pass[0][0][14] = 990
4139 00:39:59.821289 tx_win_center[0][0][15] = 981
4140 00:39:59.825688 tx_first_pass[0][0][15] = 969
4141 00:39:59.828060 tx_last_pass[0][0][15] = 993
4142 00:39:59.828151 tx_win_center[0][1][0] = 985
4143 00:39:59.831176 tx_first_pass[0][1][0] = 973
4144 00:39:59.834607 tx_last_pass[0][1][0] = 998
4145 00:39:59.837455 tx_win_center[0][1][1] = 984
4146 00:39:59.837570 tx_first_pass[0][1][1] = 972
4147 00:39:59.841038 tx_last_pass[0][1][1] = 996
4148 00:39:59.844602 tx_win_center[0][1][2] = 986
4149 00:39:59.847517 tx_first_pass[0][1][2] = 974
4150 00:39:59.851264 tx_last_pass[0][1][2] = 998
4151 00:39:59.851384 tx_win_center[0][1][3] = 979
4152 00:39:59.854478 tx_first_pass[0][1][3] = 967
4153 00:39:59.857586 tx_last_pass[0][1][3] = 991
4154 00:39:59.860859 tx_win_center[0][1][4] = 984
4155 00:39:59.860949 tx_first_pass[0][1][4] = 971
4156 00:39:59.864379 tx_last_pass[0][1][4] = 997
4157 00:39:59.867438 tx_win_center[0][1][5] = 981
4158 00:39:59.871220 tx_first_pass[0][1][5] = 969
4159 00:39:59.874022 tx_last_pass[0][1][5] = 993
4160 00:39:59.874113 tx_win_center[0][1][6] = 982
4161 00:39:59.877325 tx_first_pass[0][1][6] = 969
4162 00:39:59.881169 tx_last_pass[0][1][6] = 995
4163 00:39:59.884266 tx_win_center[0][1][7] = 984
4164 00:39:59.887192 tx_first_pass[0][1][7] = 971
4165 00:39:59.887282 tx_last_pass[0][1][7] = 997
4166 00:39:59.890967 tx_win_center[0][1][8] = 978
4167 00:39:59.893727 tx_first_pass[0][1][8] = 967
4168 00:39:59.897450 tx_last_pass[0][1][8] = 990
4169 00:39:59.897540 tx_win_center[0][1][9] = 979
4170 00:39:59.900769 tx_first_pass[0][1][9] = 968
4171 00:39:59.903838 tx_last_pass[0][1][9] = 990
4172 00:39:59.907146 tx_win_center[0][1][10] = 985
4173 00:39:59.910517 tx_first_pass[0][1][10] = 972
4174 00:39:59.910609 tx_last_pass[0][1][10] = 998
4175 00:39:59.913750 tx_win_center[0][1][11] = 978
4176 00:39:59.916943 tx_first_pass[0][1][11] = 967
4177 00:39:59.920178 tx_last_pass[0][1][11] = 990
4178 00:39:59.923471 tx_win_center[0][1][12] = 980
4179 00:39:59.923584 tx_first_pass[0][1][12] = 968
4180 00:39:59.927058 tx_last_pass[0][1][12] = 992
4181 00:39:59.930284 tx_win_center[0][1][13] = 980
4182 00:39:59.933618 tx_first_pass[0][1][13] = 969
4183 00:39:59.937377 tx_last_pass[0][1][13] = 991
4184 00:39:59.937468 tx_win_center[0][1][14] = 980
4185 00:39:59.940288 tx_first_pass[0][1][14] = 968
4186 00:39:59.943549 tx_last_pass[0][1][14] = 992
4187 00:39:59.947086 tx_win_center[0][1][15] = 983
4188 00:39:59.950785 tx_first_pass[0][1][15] = 971
4189 00:39:59.950875 tx_last_pass[0][1][15] = 995
4190 00:39:59.954015 tx_win_center[1][0][0] = 992
4191 00:39:59.957443 tx_first_pass[1][0][0] = 979
4192 00:39:59.960250 tx_last_pass[1][0][0] = 1006
4193 00:39:59.963706 tx_win_center[1][0][1] = 991
4194 00:39:59.963797 tx_first_pass[1][0][1] = 978
4195 00:39:59.966841 tx_last_pass[1][0][1] = 1004
4196 00:39:59.970566 tx_win_center[1][0][2] = 989
4197 00:39:59.973728 tx_first_pass[1][0][2] = 977
4198 00:39:59.977065 tx_last_pass[1][0][2] = 1002
4199 00:39:59.977156 tx_win_center[1][0][3] = 988
4200 00:39:59.980263 tx_first_pass[1][0][3] = 976
4201 00:39:59.983620 tx_last_pass[1][0][3] = 1000
4202 00:39:59.987110 tx_win_center[1][0][4] = 992
4203 00:39:59.987200 tx_first_pass[1][0][4] = 979
4204 00:39:59.990687 tx_last_pass[1][0][4] = 1005
4205 00:39:59.993870 tx_win_center[1][0][5] = 992
4206 00:39:59.997492 tx_first_pass[1][0][5] = 979
4207 00:40:00.000526 tx_last_pass[1][0][5] = 1006
4208 00:40:00.000616 tx_win_center[1][0][6] = 991
4209 00:40:00.004217 tx_first_pass[1][0][6] = 978
4210 00:40:00.007355 tx_last_pass[1][0][6] = 1005
4211 00:40:00.010606 tx_win_center[1][0][7] = 990
4212 00:40:00.013850 tx_first_pass[1][0][7] = 978
4213 00:40:00.013940 tx_last_pass[1][0][7] = 1003
4214 00:40:00.017179 tx_win_center[1][0][8] = 980
4215 00:40:00.020402 tx_first_pass[1][0][8] = 968
4216 00:40:00.023904 tx_last_pass[1][0][8] = 992
4217 00:40:00.023994 tx_win_center[1][0][9] = 980
4218 00:40:00.026872 tx_first_pass[1][0][9] = 969
4219 00:40:00.030241 tx_last_pass[1][0][9] = 991
4220 00:40:00.033868 tx_win_center[1][0][10] = 981
4221 00:40:00.037233 tx_first_pass[1][0][10] = 970
4222 00:40:00.037323 tx_last_pass[1][0][10] = 993
4223 00:40:00.040408 tx_win_center[1][0][11] = 982
4224 00:40:00.043547 tx_first_pass[1][0][11] = 970
4225 00:40:00.046687 tx_last_pass[1][0][11] = 994
4226 00:40:00.050637 tx_win_center[1][0][12] = 982
4227 00:40:00.050727 tx_first_pass[1][0][12] = 970
4228 00:40:00.053564 tx_last_pass[1][0][12] = 994
4229 00:40:00.056714 tx_win_center[1][0][13] = 982
4230 00:40:00.060723 tx_first_pass[1][0][13] = 971
4231 00:40:00.063546 tx_last_pass[1][0][13] = 994
4232 00:40:00.063637 tx_win_center[1][0][14] = 982
4233 00:40:00.066675 tx_first_pass[1][0][14] = 971
4234 00:40:00.070314 tx_last_pass[1][0][14] = 993
4235 00:40:00.073334 tx_win_center[1][0][15] = 976
4236 00:40:00.076654 tx_first_pass[1][0][15] = 965
4237 00:40:00.076744 tx_last_pass[1][0][15] = 987
4238 00:40:00.080152 tx_win_center[1][1][0] = 992
4239 00:40:00.083150 tx_first_pass[1][1][0] = 979
4240 00:40:00.086534 tx_last_pass[1][1][0] = 1005
4241 00:40:00.089776 tx_win_center[1][1][1] = 990
4242 00:40:00.089867 tx_first_pass[1][1][1] = 978
4243 00:40:00.093523 tx_last_pass[1][1][1] = 1003
4244 00:40:00.096785 tx_win_center[1][1][2] = 989
4245 00:40:00.100112 tx_first_pass[1][1][2] = 977
4246 00:40:00.103363 tx_last_pass[1][1][2] = 1001
4247 00:40:00.103474 tx_win_center[1][1][3] = 986
4248 00:40:00.106525 tx_first_pass[1][1][3] = 975
4249 00:40:00.109955 tx_last_pass[1][1][3] = 998
4250 00:40:00.113159 tx_win_center[1][1][4] = 990
4251 00:40:00.116480 tx_first_pass[1][1][4] = 978
4252 00:40:00.116570 tx_last_pass[1][1][4] = 1003
4253 00:40:00.119846 tx_win_center[1][1][5] = 992
4254 00:40:00.123089 tx_first_pass[1][1][5] = 979
4255 00:40:00.126531 tx_last_pass[1][1][5] = 1005
4256 00:40:00.126621 tx_win_center[1][1][6] = 991
4257 00:40:00.129645 tx_first_pass[1][1][6] = 978
4258 00:40:00.133358 tx_last_pass[1][1][6] = 1004
4259 00:40:00.136480 tx_win_center[1][1][7] = 990
4260 00:40:00.139570 tx_first_pass[1][1][7] = 978
4261 00:40:00.139660 tx_last_pass[1][1][7] = 1003
4262 00:40:00.142906 tx_win_center[1][1][8] = 978
4263 00:40:00.146428 tx_first_pass[1][1][8] = 967
4264 00:40:00.149826 tx_last_pass[1][1][8] = 990
4265 00:40:00.149916 tx_win_center[1][1][9] = 978
4266 00:40:00.152778 tx_first_pass[1][1][9] = 967
4267 00:40:00.156114 tx_last_pass[1][1][9] = 990
4268 00:40:00.159887 tx_win_center[1][1][10] = 980
4269 00:40:00.163015 tx_first_pass[1][1][10] = 969
4270 00:40:00.163106 tx_last_pass[1][1][10] = 992
4271 00:40:00.166648 tx_win_center[1][1][11] = 980
4272 00:40:00.169474 tx_first_pass[1][1][11] = 969
4273 00:40:00.173064 tx_last_pass[1][1][11] = 992
4274 00:40:00.176203 tx_win_center[1][1][12] = 981
4275 00:40:00.179292 tx_first_pass[1][1][12] = 969
4276 00:40:00.179413 tx_last_pass[1][1][12] = 993
4277 00:40:00.183010 tx_win_center[1][1][13] = 981
4278 00:40:00.186360 tx_first_pass[1][1][13] = 970
4279 00:40:00.189587 tx_last_pass[1][1][13] = 993
4280 00:40:00.189707 tx_win_center[1][1][14] = 980
4281 00:40:00.192976 tx_first_pass[1][1][14] = 969
4282 00:40:00.196100 tx_last_pass[1][1][14] = 992
4283 00:40:00.200016 tx_win_center[1][1][15] = 974
4284 00:40:00.203117 tx_first_pass[1][1][15] = 963
4285 00:40:00.203232 tx_last_pass[1][1][15] = 986
4286 00:40:00.206363 dump params rx window
4287 00:40:00.209219 rx_firspass[0][0][0] = 5
4288 00:40:00.213075 rx_lastpass[0][0][0] = 38
4289 00:40:00.213187 rx_firspass[0][0][1] = 5
4290 00:40:00.215974 rx_lastpass[0][0][1] = 36
4291 00:40:00.219365 rx_firspass[0][0][2] = 6
4292 00:40:00.219465 rx_lastpass[0][0][2] = 36
4293 00:40:00.222612 rx_firspass[0][0][3] = -2
4294 00:40:00.226216 rx_lastpass[0][0][3] = 31
4295 00:40:00.226299 rx_firspass[0][0][4] = 5
4296 00:40:00.229526 rx_lastpass[0][0][4] = 36
4297 00:40:00.232856 rx_firspass[0][0][5] = 2
4298 00:40:00.236269 rx_lastpass[0][0][5] = 31
4299 00:40:00.236363 rx_firspass[0][0][6] = 3
4300 00:40:00.239349 rx_lastpass[0][0][6] = 33
4301 00:40:00.242530 rx_firspass[0][0][7] = 5
4302 00:40:00.242614 rx_lastpass[0][0][7] = 36
4303 00:40:00.245815 rx_firspass[0][0][8] = -2
4304 00:40:00.249175 rx_lastpass[0][0][8] = 32
4305 00:40:00.249351 rx_firspass[0][0][9] = 1
4306 00:40:00.252783 rx_lastpass[0][0][9] = 32
4307 00:40:00.255965 rx_firspass[0][0][10] = 9
4308 00:40:00.259283 rx_lastpass[0][0][10] = 41
4309 00:40:00.259423 rx_firspass[0][0][11] = 1
4310 00:40:00.262334 rx_lastpass[0][0][11] = 32
4311 00:40:00.265793 rx_firspass[0][0][12] = 2
4312 00:40:00.269264 rx_lastpass[0][0][12] = 36
4313 00:40:00.269382 rx_firspass[0][0][13] = 4
4314 00:40:00.272945 rx_lastpass[0][0][13] = 33
4315 00:40:00.276164 rx_firspass[0][0][14] = 3
4316 00:40:00.276283 rx_lastpass[0][0][14] = 37
4317 00:40:00.279402 rx_firspass[0][0][15] = 8
4318 00:40:00.282770 rx_lastpass[0][0][15] = 37
4319 00:40:00.286078 rx_firspass[0][1][0] = 6
4320 00:40:00.286168 rx_lastpass[0][1][0] = 40
4321 00:40:00.289448 rx_firspass[0][1][1] = 5
4322 00:40:00.292876 rx_lastpass[0][1][1] = 38
4323 00:40:00.292965 rx_firspass[0][1][2] = 6
4324 00:40:00.295837 rx_lastpass[0][1][2] = 38
4325 00:40:00.299463 rx_firspass[0][1][3] = -2
4326 00:40:00.299553 rx_lastpass[0][1][3] = 33
4327 00:40:00.302667 rx_firspass[0][1][4] = 5
4328 00:40:00.306189 rx_lastpass[0][1][4] = 39
4329 00:40:00.309669 rx_firspass[0][1][5] = 1
4330 00:40:00.309759 rx_lastpass[0][1][5] = 34
4331 00:40:00.312870 rx_firspass[0][1][6] = 3
4332 00:40:00.315790 rx_lastpass[0][1][6] = 37
4333 00:40:00.315908 rx_firspass[0][1][7] = 3
4334 00:40:00.319166 rx_lastpass[0][1][7] = 38
4335 00:40:00.322445 rx_firspass[0][1][8] = -2
4336 00:40:00.322535 rx_lastpass[0][1][8] = 32
4337 00:40:00.325872 rx_firspass[0][1][9] = 1
4338 00:40:00.329117 rx_lastpass[0][1][9] = 36
4339 00:40:00.332728 rx_firspass[0][1][10] = 7
4340 00:40:00.332818 rx_lastpass[0][1][10] = 43
4341 00:40:00.335727 rx_firspass[0][1][11] = -2
4342 00:40:00.339335 rx_lastpass[0][1][11] = 34
4343 00:40:00.342413 rx_firspass[0][1][12] = 1
4344 00:40:00.342514 rx_lastpass[0][1][12] = 37
4345 00:40:00.346401 rx_firspass[0][1][13] = 2
4346 00:40:00.349397 rx_lastpass[0][1][13] = 35
4347 00:40:00.349487 rx_firspass[0][1][14] = 3
4348 00:40:00.352966 rx_lastpass[0][1][14] = 37
4349 00:40:00.355994 rx_firspass[0][1][15] = 6
4350 00:40:00.359283 rx_lastpass[0][1][15] = 39
4351 00:40:00.359392 rx_firspass[1][0][0] = 5
4352 00:40:00.362608 rx_lastpass[1][0][0] = 38
4353 00:40:00.365826 rx_firspass[1][0][1] = 5
4354 00:40:00.365947 rx_lastpass[1][0][1] = 38
4355 00:40:00.369078 rx_firspass[1][0][2] = 2
4356 00:40:00.372562 rx_lastpass[1][0][2] = 35
4357 00:40:00.372654 rx_firspass[1][0][3] = 0
4358 00:40:00.375687 rx_lastpass[1][0][3] = 33
4359 00:40:00.379059 rx_firspass[1][0][4] = 5
4360 00:40:00.382785 rx_lastpass[1][0][4] = 38
4361 00:40:00.382894 rx_firspass[1][0][5] = 7
4362 00:40:00.385919 rx_lastpass[1][0][5] = 39
4363 00:40:00.389184 rx_firspass[1][0][6] = 7
4364 00:40:00.389285 rx_lastpass[1][0][6] = 40
4365 00:40:00.392359 rx_firspass[1][0][7] = 5
4366 00:40:00.396149 rx_lastpass[1][0][7] = 38
4367 00:40:00.396252 rx_firspass[1][0][8] = 1
4368 00:40:00.399065 rx_lastpass[1][0][8] = 33
4369 00:40:00.402085 rx_firspass[1][0][9] = 0
4370 00:40:00.405892 rx_lastpass[1][0][9] = 32
4371 00:40:00.406010 rx_firspass[1][0][10] = 5
4372 00:40:00.408657 rx_lastpass[1][0][10] = 35
4373 00:40:00.412328 rx_firspass[1][0][11] = 5
4374 00:40:00.415438 rx_lastpass[1][0][11] = 38
4375 00:40:00.415552 rx_firspass[1][0][12] = 6
4376 00:40:00.419059 rx_lastpass[1][0][12] = 38
4377 00:40:00.422551 rx_firspass[1][0][13] = 6
4378 00:40:00.422640 rx_lastpass[1][0][13] = 37
4379 00:40:00.425832 rx_firspass[1][0][14] = 7
4380 00:40:00.429137 rx_lastpass[1][0][14] = 38
4381 00:40:00.432291 rx_firspass[1][0][15] = -3
4382 00:40:00.432381 rx_lastpass[1][0][15] = 30
4383 00:40:00.435553 rx_firspass[1][1][0] = 4
4384 00:40:00.439059 rx_lastpass[1][1][0] = 40
4385 00:40:00.439148 rx_firspass[1][1][1] = 4
4386 00:40:00.442296 rx_lastpass[1][1][1] = 39
4387 00:40:00.445434 rx_firspass[1][1][2] = 0
4388 00:40:00.448610 rx_lastpass[1][1][2] = 36
4389 00:40:00.448699 rx_firspass[1][1][3] = -2
4390 00:40:00.451837 rx_lastpass[1][1][3] = 34
4391 00:40:00.455144 rx_firspass[1][1][4] = 4
4392 00:40:00.455261 rx_lastpass[1][1][4] = 39
4393 00:40:00.458676 rx_firspass[1][1][5] = 5
4394 00:40:00.461895 rx_lastpass[1][1][5] = 40
4395 00:40:00.462008 rx_firspass[1][1][6] = 5
4396 00:40:00.465426 rx_lastpass[1][1][6] = 41
4397 00:40:00.468723 rx_firspass[1][1][7] = 3
4398 00:40:00.472224 rx_lastpass[1][1][7] = 38
4399 00:40:00.472302 rx_firspass[1][1][8] = 0
4400 00:40:00.475365 rx_lastpass[1][1][8] = 35
4401 00:40:00.478404 rx_firspass[1][1][9] = -1
4402 00:40:00.478524 rx_lastpass[1][1][9] = 34
4403 00:40:00.482181 rx_firspass[1][1][10] = 3
4404 00:40:00.485273 rx_lastpass[1][1][10] = 39
4405 00:40:00.488423 rx_firspass[1][1][11] = 4
4406 00:40:00.488532 rx_lastpass[1][1][11] = 40
4407 00:40:00.491953 rx_firspass[1][1][12] = 4
4408 00:40:00.494977 rx_lastpass[1][1][12] = 40
4409 00:40:00.498975 rx_firspass[1][1][13] = 4
4410 00:40:00.499055 rx_lastpass[1][1][13] = 40
4411 00:40:00.501693 rx_firspass[1][1][14] = 5
4412 00:40:00.505195 rx_lastpass[1][1][14] = 40
4413 00:40:00.505303 rx_firspass[1][1][15] = -4
4414 00:40:00.508684 rx_lastpass[1][1][15] = 31
4415 00:40:00.511884 dump params clk_delay
4416 00:40:00.511998 clk_delay[0] = 1
4417 00:40:00.515363 clk_delay[1] = 0
4418 00:40:00.515463 dump params dqs_delay
4419 00:40:00.518283 dqs_delay[0][0] = -2
4420 00:40:00.518391 dqs_delay[0][1] = 0
4421 00:40:00.521845 dqs_delay[1][0] = 0
4422 00:40:00.525196 dqs_delay[1][1] = 0
4423 00:40:00.525302 dump params delay_cell_unit = 735
4424 00:40:00.528248 dump source = 0x0
4425 00:40:00.531517 dump params frequency:1200
4426 00:40:00.531603 dump params rank number:2
4427 00:40:00.531677
4428 00:40:00.535154 dump params write leveling
4429 00:40:00.538397 write leveling[0][0][0] = 0x0
4430 00:40:00.541649 write leveling[0][0][1] = 0x0
4431 00:40:00.544977 write leveling[0][1][0] = 0x0
4432 00:40:00.545054 write leveling[0][1][1] = 0x0
4433 00:40:00.548437 write leveling[1][0][0] = 0x0
4434 00:40:00.551578 write leveling[1][0][1] = 0x0
4435 00:40:00.555310 write leveling[1][1][0] = 0x0
4436 00:40:00.558415 write leveling[1][1][1] = 0x0
4437 00:40:00.558517 dump params cbt_cs
4438 00:40:00.561548 cbt_cs[0][0] = 0x0
4439 00:40:00.561650 cbt_cs[0][1] = 0x0
4440 00:40:00.564871 cbt_cs[1][0] = 0x0
4441 00:40:00.564945 cbt_cs[1][1] = 0x0
4442 00:40:00.568107 dump params cbt_mr12
4443 00:40:00.568185 cbt_mr12[0][0] = 0x0
4444 00:40:00.571891 cbt_mr12[0][1] = 0x0
4445 00:40:00.571965 cbt_mr12[1][0] = 0x0
4446 00:40:00.574982 cbt_mr12[1][1] = 0x0
4447 00:40:00.578440 dump params tx window
4448 00:40:00.578551 tx_center_min[0][0][0] = 0
4449 00:40:00.581569 tx_center_max[0][0][0] = 0
4450 00:40:00.584996 tx_center_min[0][0][1] = 0
4451 00:40:00.588369 tx_center_max[0][0][1] = 0
4452 00:40:00.588460 tx_center_min[0][1][0] = 0
4453 00:40:00.591756 tx_center_max[0][1][0] = 0
4454 00:40:00.594820 tx_center_min[0][1][1] = 0
4455 00:40:00.598115 tx_center_max[0][1][1] = 0
4456 00:40:00.598225 tx_center_min[1][0][0] = 0
4457 00:40:00.601675 tx_center_max[1][0][0] = 0
4458 00:40:00.604992 tx_center_min[1][0][1] = 0
4459 00:40:00.605072 tx_center_max[1][0][1] = 0
4460 00:40:00.608210 tx_center_min[1][1][0] = 0
4461 00:40:00.611513 tx_center_max[1][1][0] = 0
4462 00:40:00.614828 tx_center_min[1][1][1] = 0
4463 00:40:00.614941 tx_center_max[1][1][1] = 0
4464 00:40:00.618237 dump params tx window
4465 00:40:00.621435 tx_win_center[0][0][0] = 0
4466 00:40:00.624814 tx_first_pass[0][0][0] = 0
4467 00:40:00.624924 tx_last_pass[0][0][0] = 0
4468 00:40:00.628374 tx_win_center[0][0][1] = 0
4469 00:40:00.631361 tx_first_pass[0][0][1] = 0
4470 00:40:00.631482 tx_last_pass[0][0][1] = 0
4471 00:40:00.634414 tx_win_center[0][0][2] = 0
4472 00:40:00.638060 tx_first_pass[0][0][2] = 0
4473 00:40:00.641288 tx_last_pass[0][0][2] = 0
4474 00:40:00.641414 tx_win_center[0][0][3] = 0
4475 00:40:00.644306 tx_first_pass[0][0][3] = 0
4476 00:40:00.648187 tx_last_pass[0][0][3] = 0
4477 00:40:00.651302 tx_win_center[0][0][4] = 0
4478 00:40:00.651429 tx_first_pass[0][0][4] = 0
4479 00:40:00.654503 tx_last_pass[0][0][4] = 0
4480 00:40:00.657718 tx_win_center[0][0][5] = 0
4481 00:40:00.657829 tx_first_pass[0][0][5] = 0
4482 00:40:00.661016 tx_last_pass[0][0][5] = 0
4483 00:40:00.664431 tx_win_center[0][0][6] = 0
4484 00:40:00.667845 tx_first_pass[0][0][6] = 0
4485 00:40:00.667965 tx_last_pass[0][0][6] = 0
4486 00:40:00.671000 tx_win_center[0][0][7] = 0
4487 00:40:00.674436 tx_first_pass[0][0][7] = 0
4488 00:40:00.677749 tx_last_pass[0][0][7] = 0
4489 00:40:00.677839 tx_win_center[0][0][8] = 0
4490 00:40:00.681006 tx_first_pass[0][0][8] = 0
4491 00:40:00.684386 tx_last_pass[0][0][8] = 0
4492 00:40:00.684476 tx_win_center[0][0][9] = 0
4493 00:40:00.687755 tx_first_pass[0][0][9] = 0
4494 00:40:00.691021 tx_last_pass[0][0][9] = 0
4495 00:40:00.694323 tx_win_center[0][0][10] = 0
4496 00:40:00.694441 tx_first_pass[0][0][10] = 0
4497 00:40:00.697636 tx_last_pass[0][0][10] = 0
4498 00:40:00.700902 tx_win_center[0][0][11] = 0
4499 00:40:00.704335 tx_first_pass[0][0][11] = 0
4500 00:40:00.704426 tx_last_pass[0][0][11] = 0
4501 00:40:00.708080 tx_win_center[0][0][12] = 0
4502 00:40:00.711375 tx_first_pass[0][0][12] = 0
4503 00:40:00.714424 tx_last_pass[0][0][12] = 0
4504 00:40:00.714544 tx_win_center[0][0][13] = 0
4505 00:40:00.717662 tx_first_pass[0][0][13] = 0
4506 00:40:00.720727 tx_last_pass[0][0][13] = 0
4507 00:40:00.724045 tx_win_center[0][0][14] = 0
4508 00:40:00.724142 tx_first_pass[0][0][14] = 0
4509 00:40:00.727693 tx_last_pass[0][0][14] = 0
4510 00:40:00.730779 tx_win_center[0][0][15] = 0
4511 00:40:00.734136 tx_first_pass[0][0][15] = 0
4512 00:40:00.734254 tx_last_pass[0][0][15] = 0
4513 00:40:00.737420 tx_win_center[0][1][0] = 0
4514 00:40:00.740711 tx_first_pass[0][1][0] = 0
4515 00:40:00.744040 tx_last_pass[0][1][0] = 0
4516 00:40:00.744134 tx_win_center[0][1][1] = 0
4517 00:40:00.747694 tx_first_pass[0][1][1] = 0
4518 00:40:00.750795 tx_last_pass[0][1][1] = 0
4519 00:40:00.753893 tx_win_center[0][1][2] = 0
4520 00:40:00.753984 tx_first_pass[0][1][2] = 0
4521 00:40:00.757149 tx_last_pass[0][1][2] = 0
4522 00:40:00.760700 tx_win_center[0][1][3] = 0
4523 00:40:00.760790 tx_first_pass[0][1][3] = 0
4524 00:40:00.763901 tx_last_pass[0][1][3] = 0
4525 00:40:00.767354 tx_win_center[0][1][4] = 0
4526 00:40:00.770964 tx_first_pass[0][1][4] = 0
4527 00:40:00.771054 tx_last_pass[0][1][4] = 0
4528 00:40:00.773897 tx_win_center[0][1][5] = 0
4529 00:40:00.777325 tx_first_pass[0][1][5] = 0
4530 00:40:00.780812 tx_last_pass[0][1][5] = 0
4531 00:40:00.780934 tx_win_center[0][1][6] = 0
4532 00:40:00.783861 tx_first_pass[0][1][6] = 0
4533 00:40:00.787596 tx_last_pass[0][1][6] = 0
4534 00:40:00.787703 tx_win_center[0][1][7] = 0
4535 00:40:00.790648 tx_first_pass[0][1][7] = 0
4536 00:40:00.794033 tx_last_pass[0][1][7] = 0
4537 00:40:00.797259 tx_win_center[0][1][8] = 0
4538 00:40:00.797349 tx_first_pass[0][1][8] = 0
4539 00:40:00.800698 tx_last_pass[0][1][8] = 0
4540 00:40:00.803762 tx_win_center[0][1][9] = 0
4541 00:40:00.807204 tx_first_pass[0][1][9] = 0
4542 00:40:00.807325 tx_last_pass[0][1][9] = 0
4543 00:40:00.810653 tx_win_center[0][1][10] = 0
4544 00:40:00.814053 tx_first_pass[0][1][10] = 0
4545 00:40:00.817130 tx_last_pass[0][1][10] = 0
4546 00:40:00.817220 tx_win_center[0][1][11] = 0
4547 00:40:00.820512 tx_first_pass[0][1][11] = 0
4548 00:40:00.823823 tx_last_pass[0][1][11] = 0
4549 00:40:00.826928 tx_win_center[0][1][12] = 0
4550 00:40:00.827018 tx_first_pass[0][1][12] = 0
4551 00:40:00.830582 tx_last_pass[0][1][12] = 0
4552 00:40:00.833602 tx_win_center[0][1][13] = 0
4553 00:40:00.837473 tx_first_pass[0][1][13] = 0
4554 00:40:00.837564 tx_last_pass[0][1][13] = 0
4555 00:40:00.840445 tx_win_center[0][1][14] = 0
4556 00:40:00.843980 tx_first_pass[0][1][14] = 0
4557 00:40:00.847317 tx_last_pass[0][1][14] = 0
4558 00:40:00.847440 tx_win_center[0][1][15] = 0
4559 00:40:00.850446 tx_first_pass[0][1][15] = 0
4560 00:40:00.853720 tx_last_pass[0][1][15] = 0
4561 00:40:00.857208 tx_win_center[1][0][0] = 0
4562 00:40:00.857297 tx_first_pass[1][0][0] = 0
4563 00:40:00.860215 tx_last_pass[1][0][0] = 0
4564 00:40:00.863676 tx_win_center[1][0][1] = 0
4565 00:40:00.863766 tx_first_pass[1][0][1] = 0
4566 00:40:00.866992 tx_last_pass[1][0][1] = 0
4567 00:40:00.870399 tx_win_center[1][0][2] = 0
4568 00:40:00.873742 tx_first_pass[1][0][2] = 0
4569 00:40:00.873832 tx_last_pass[1][0][2] = 0
4570 00:40:00.876797 tx_win_center[1][0][3] = 0
4571 00:40:00.880559 tx_first_pass[1][0][3] = 0
4572 00:40:00.880649 tx_last_pass[1][0][3] = 0
4573 00:40:00.883930 tx_win_center[1][0][4] = 0
4574 00:40:00.886932 tx_first_pass[1][0][4] = 0
4575 00:40:00.890375 tx_last_pass[1][0][4] = 0
4576 00:40:00.890465 tx_win_center[1][0][5] = 0
4577 00:40:00.893355 tx_first_pass[1][0][5] = 0
4578 00:40:00.897103 tx_last_pass[1][0][5] = 0
4579 00:40:00.900267 tx_win_center[1][0][6] = 0
4580 00:40:00.900357 tx_first_pass[1][0][6] = 0
4581 00:40:00.903377 tx_last_pass[1][0][6] = 0
4582 00:40:00.907121 tx_win_center[1][0][7] = 0
4583 00:40:00.907211 tx_first_pass[1][0][7] = 0
4584 00:40:00.910344 tx_last_pass[1][0][7] = 0
4585 00:40:00.913995 tx_win_center[1][0][8] = 0
4586 00:40:00.917050 tx_first_pass[1][0][8] = 0
4587 00:40:00.917141 tx_last_pass[1][0][8] = 0
4588 00:40:00.920095 tx_win_center[1][0][9] = 0
4589 00:40:00.923876 tx_first_pass[1][0][9] = 0
4590 00:40:00.926933 tx_last_pass[1][0][9] = 0
4591 00:40:00.927022 tx_win_center[1][0][10] = 0
4592 00:40:00.930382 tx_first_pass[1][0][10] = 0
4593 00:40:00.933312 tx_last_pass[1][0][10] = 0
4594 00:40:00.936965 tx_win_center[1][0][11] = 0
4595 00:40:00.937055 tx_first_pass[1][0][11] = 0
4596 00:40:00.940122 tx_last_pass[1][0][11] = 0
4597 00:40:00.943610 tx_win_center[1][0][12] = 0
4598 00:40:00.946556 tx_first_pass[1][0][12] = 0
4599 00:40:00.946679 tx_last_pass[1][0][12] = 0
4600 00:40:00.950083 tx_win_center[1][0][13] = 0
4601 00:40:00.953438 tx_first_pass[1][0][13] = 0
4602 00:40:00.956794 tx_last_pass[1][0][13] = 0
4603 00:40:00.956884 tx_win_center[1][0][14] = 0
4604 00:40:00.960021 tx_first_pass[1][0][14] = 0
4605 00:40:00.963296 tx_last_pass[1][0][14] = 0
4606 00:40:00.967144 tx_win_center[1][0][15] = 0
4607 00:40:00.967234 tx_first_pass[1][0][15] = 0
4608 00:40:00.970119 tx_last_pass[1][0][15] = 0
4609 00:40:00.973235 tx_win_center[1][1][0] = 0
4610 00:40:00.976971 tx_first_pass[1][1][0] = 0
4611 00:40:00.977061 tx_last_pass[1][1][0] = 0
4612 00:40:00.979987 tx_win_center[1][1][1] = 0
4613 00:40:00.983585 tx_first_pass[1][1][1] = 0
4614 00:40:00.983676 tx_last_pass[1][1][1] = 0
4615 00:40:00.986923 tx_win_center[1][1][2] = 0
4616 00:40:00.990234 tx_first_pass[1][1][2] = 0
4617 00:40:00.993374 tx_last_pass[1][1][2] = 0
4618 00:40:00.993464 tx_win_center[1][1][3] = 0
4619 00:40:00.996767 tx_first_pass[1][1][3] = 0
4620 00:40:01.000027 tx_last_pass[1][1][3] = 0
4621 00:40:01.003308 tx_win_center[1][1][4] = 0
4622 00:40:01.003429 tx_first_pass[1][1][4] = 0
4623 00:40:01.007219 tx_last_pass[1][1][4] = 0
4624 00:40:01.010306 tx_win_center[1][1][5] = 0
4625 00:40:01.010396 tx_first_pass[1][1][5] = 0
4626 00:40:01.013262 tx_last_pass[1][1][5] = 0
4627 00:40:01.016993 tx_win_center[1][1][6] = 0
4628 00:40:01.019932 tx_first_pass[1][1][6] = 0
4629 00:40:01.020022 tx_last_pass[1][1][6] = 0
4630 00:40:01.023613 tx_win_center[1][1][7] = 0
4631 00:40:01.026900 tx_first_pass[1][1][7] = 0
4632 00:40:01.026990 tx_last_pass[1][1][7] = 0
4633 00:40:01.030394 tx_win_center[1][1][8] = 0
4634 00:40:01.033725 tx_first_pass[1][1][8] = 0
4635 00:40:01.036844 tx_last_pass[1][1][8] = 0
4636 00:40:01.036934 tx_win_center[1][1][9] = 0
4637 00:40:01.040017 tx_first_pass[1][1][9] = 0
4638 00:40:01.043114 tx_last_pass[1][1][9] = 0
4639 00:40:01.046468 tx_win_center[1][1][10] = 0
4640 00:40:01.046558 tx_first_pass[1][1][10] = 0
4641 00:40:01.049821 tx_last_pass[1][1][10] = 0
4642 00:40:01.053504 tx_win_center[1][1][11] = 0
4643 00:40:01.056806 tx_first_pass[1][1][11] = 0
4644 00:40:01.056896 tx_last_pass[1][1][11] = 0
4645 00:40:01.060007 tx_win_center[1][1][12] = 0
4646 00:40:01.063263 tx_first_pass[1][1][12] = 0
4647 00:40:01.066863 tx_last_pass[1][1][12] = 0
4648 00:40:01.066953 tx_win_center[1][1][13] = 0
4649 00:40:01.070055 tx_first_pass[1][1][13] = 0
4650 00:40:01.073371 tx_last_pass[1][1][13] = 0
4651 00:40:01.076531 tx_win_center[1][1][14] = 0
4652 00:40:01.076621 tx_first_pass[1][1][14] = 0
4653 00:40:01.079713 tx_last_pass[1][1][14] = 0
4654 00:40:01.083349 tx_win_center[1][1][15] = 0
4655 00:40:01.087174 tx_first_pass[1][1][15] = 0
4656 00:40:01.087306 tx_last_pass[1][1][15] = 0
4657 00:40:01.090026 dump params rx window
4658 00:40:01.093528 rx_firspass[0][0][0] = 0
4659 00:40:01.093618 rx_lastpass[0][0][0] = 0
4660 00:40:01.096740 rx_firspass[0][0][1] = 0
4661 00:40:01.099851 rx_lastpass[0][0][1] = 0
4662 00:40:01.099941 rx_firspass[0][0][2] = 0
4663 00:40:01.103728 rx_lastpass[0][0][2] = 0
4664 00:40:01.106721 rx_firspass[0][0][3] = 0
4665 00:40:01.106811 rx_lastpass[0][0][3] = 0
4666 00:40:01.110176 rx_firspass[0][0][4] = 0
4667 00:40:01.113167 rx_lastpass[0][0][4] = 0
4668 00:40:01.113257 rx_firspass[0][0][5] = 0
4669 00:40:01.116759 rx_lastpass[0][0][5] = 0
4670 00:40:01.119873 rx_firspass[0][0][6] = 0
4671 00:40:01.123058 rx_lastpass[0][0][6] = 0
4672 00:40:01.123175 rx_firspass[0][0][7] = 0
4673 00:40:01.126600 rx_lastpass[0][0][7] = 0
4674 00:40:01.129867 rx_firspass[0][0][8] = 0
4675 00:40:01.129956 rx_lastpass[0][0][8] = 0
4676 00:40:01.132823 rx_firspass[0][0][9] = 0
4677 00:40:01.136720 rx_lastpass[0][0][9] = 0
4678 00:40:01.136810 rx_firspass[0][0][10] = 0
4679 00:40:01.139911 rx_lastpass[0][0][10] = 0
4680 00:40:01.143072 rx_firspass[0][0][11] = 0
4681 00:40:01.146631 rx_lastpass[0][0][11] = 0
4682 00:40:01.146720 rx_firspass[0][0][12] = 0
4683 00:40:01.149714 rx_lastpass[0][0][12] = 0
4684 00:40:01.152962 rx_firspass[0][0][13] = 0
4685 00:40:01.153051 rx_lastpass[0][0][13] = 0
4686 00:40:01.156288 rx_firspass[0][0][14] = 0
4687 00:40:01.159579 rx_lastpass[0][0][14] = 0
4688 00:40:01.162880 rx_firspass[0][0][15] = 0
4689 00:40:01.162969 rx_lastpass[0][0][15] = 0
4690 00:40:01.166035 rx_firspass[0][1][0] = 0
4691 00:40:01.169201 rx_lastpass[0][1][0] = 0
4692 00:40:01.169291 rx_firspass[0][1][1] = 0
4693 00:40:01.172638 rx_lastpass[0][1][1] = 0
4694 00:40:01.175909 rx_firspass[0][1][2] = 0
4695 00:40:01.175998 rx_lastpass[0][1][2] = 0
4696 00:40:01.179145 rx_firspass[0][1][3] = 0
4697 00:40:01.182395 rx_lastpass[0][1][3] = 0
4698 00:40:01.185744 rx_firspass[0][1][4] = 0
4699 00:40:01.185833 rx_lastpass[0][1][4] = 0
4700 00:40:01.189339 rx_firspass[0][1][5] = 0
4701 00:40:01.192577 rx_lastpass[0][1][5] = 0
4702 00:40:01.192695 rx_firspass[0][1][6] = 0
4703 00:40:01.196142 rx_lastpass[0][1][6] = 0
4704 00:40:01.198915 rx_firspass[0][1][7] = 0
4705 00:40:01.199036 rx_lastpass[0][1][7] = 0
4706 00:40:01.202699 rx_firspass[0][1][8] = 0
4707 00:40:01.205482 rx_lastpass[0][1][8] = 0
4708 00:40:01.205572 rx_firspass[0][1][9] = 0
4709 00:40:01.209074 rx_lastpass[0][1][9] = 0
4710 00:40:01.212379 rx_firspass[0][1][10] = 0
4711 00:40:01.215557 rx_lastpass[0][1][10] = 0
4712 00:40:01.215647 rx_firspass[0][1][11] = 0
4713 00:40:01.219316 rx_lastpass[0][1][11] = 0
4714 00:40:01.222679 rx_firspass[0][1][12] = 0
4715 00:40:01.222770 rx_lastpass[0][1][12] = 0
4716 00:40:01.225786 rx_firspass[0][1][13] = 0
4717 00:40:01.228838 rx_lastpass[0][1][13] = 0
4718 00:40:01.228927 rx_firspass[0][1][14] = 0
4719 00:40:01.232308 rx_lastpass[0][1][14] = 0
4720 00:40:01.235397 rx_firspass[0][1][15] = 0
4721 00:40:01.239222 rx_lastpass[0][1][15] = 0
4722 00:40:01.239312 rx_firspass[1][0][0] = 0
4723 00:40:01.242092 rx_lastpass[1][0][0] = 0
4724 00:40:01.245722 rx_firspass[1][0][1] = 0
4725 00:40:01.245811 rx_lastpass[1][0][1] = 0
4726 00:40:01.249400 rx_firspass[1][0][2] = 0
4727 00:40:01.252358 rx_lastpass[1][0][2] = 0
4728 00:40:01.252447 rx_firspass[1][0][3] = 0
4729 00:40:01.256041 rx_lastpass[1][0][3] = 0
4730 00:40:01.259285 rx_firspass[1][0][4] = 0
4731 00:40:01.259374 rx_lastpass[1][0][4] = 0
4732 00:40:01.262771 rx_firspass[1][0][5] = 0
4733 00:40:01.266023 rx_lastpass[1][0][5] = 0
4734 00:40:01.266112 rx_firspass[1][0][6] = 0
4735 00:40:01.268937 rx_lastpass[1][0][6] = 0
4736 00:40:01.272760 rx_firspass[1][0][7] = 0
4737 00:40:01.276019 rx_lastpass[1][0][7] = 0
4738 00:40:01.276159 rx_firspass[1][0][8] = 0
4739 00:40:01.279302 rx_lastpass[1][0][8] = 0
4740 00:40:01.282706 rx_firspass[1][0][9] = 0
4741 00:40:01.282850 rx_lastpass[1][0][9] = 0
4742 00:40:01.286234 rx_firspass[1][0][10] = 0
4743 00:40:01.289101 rx_lastpass[1][0][10] = 0
4744 00:40:01.289240 rx_firspass[1][0][11] = 0
4745 00:40:01.292595 rx_lastpass[1][0][11] = 0
4746 00:40:01.295565 rx_firspass[1][0][12] = 0
4747 00:40:01.298998 rx_lastpass[1][0][12] = 0
4748 00:40:01.299242 rx_firspass[1][0][13] = 0
4749 00:40:01.302333 rx_lastpass[1][0][13] = 0
4750 00:40:01.306104 rx_firspass[1][0][14] = 0
4751 00:40:01.306255 rx_lastpass[1][0][14] = 0
4752 00:40:01.309321 rx_firspass[1][0][15] = 0
4753 00:40:01.312561 rx_lastpass[1][0][15] = 0
4754 00:40:01.312762 rx_firspass[1][1][0] = 0
4755 00:40:01.316130 rx_lastpass[1][1][0] = 0
4756 00:40:01.319566 rx_firspass[1][1][1] = 0
4757 00:40:01.322552 rx_lastpass[1][1][1] = 0
4758 00:40:01.322727 rx_firspass[1][1][2] = 0
4759 00:40:01.325824 rx_lastpass[1][1][2] = 0
4760 00:40:01.329185 rx_firspass[1][1][3] = 0
4761 00:40:01.329316 rx_lastpass[1][1][3] = 0
4762 00:40:01.332455 rx_firspass[1][1][4] = 0
4763 00:40:01.335824 rx_lastpass[1][1][4] = 0
4764 00:40:01.335950 rx_firspass[1][1][5] = 0
4765 00:40:01.339569 rx_lastpass[1][1][5] = 0
4766 00:40:01.342522 rx_firspass[1][1][6] = 0
4767 00:40:01.342613 rx_lastpass[1][1][6] = 0
4768 00:40:01.345869 rx_firspass[1][1][7] = 0
4769 00:40:01.349227 rx_lastpass[1][1][7] = 0
4770 00:40:01.349317 rx_firspass[1][1][8] = 0
4771 00:40:01.352606 rx_lastpass[1][1][8] = 0
4772 00:40:01.356032 rx_firspass[1][1][9] = 0
4773 00:40:01.359299 rx_lastpass[1][1][9] = 0
4774 00:40:01.359424 rx_firspass[1][1][10] = 0
4775 00:40:01.362520 rx_lastpass[1][1][10] = 0
4776 00:40:01.365738 rx_firspass[1][1][11] = 0
4777 00:40:01.365830 rx_lastpass[1][1][11] = 0
4778 00:40:01.369308 rx_firspass[1][1][12] = 0
4779 00:40:01.372225 rx_lastpass[1][1][12] = 0
4780 00:40:01.375963 rx_firspass[1][1][13] = 0
4781 00:40:01.376052 rx_lastpass[1][1][13] = 0
4782 00:40:01.379207 rx_firspass[1][1][14] = 0
4783 00:40:01.382402 rx_lastpass[1][1][14] = 0
4784 00:40:01.382498 rx_firspass[1][1][15] = 0
4785 00:40:01.385715 rx_lastpass[1][1][15] = 0
4786 00:40:01.388953 dump params clk_delay
4787 00:40:01.389078 clk_delay[0] = 0
4788 00:40:01.392243 clk_delay[1] = 0
4789 00:40:01.392366 dump params dqs_delay
4790 00:40:01.395484 dqs_delay[0][0] = 0
4791 00:40:01.395578 dqs_delay[0][1] = 0
4792 00:40:01.398747 dqs_delay[1][0] = 0
4793 00:40:01.398838 dqs_delay[1][1] = 0
4794 00:40:01.402172 dump params delay_cell_unit = 735
4795 00:40:01.405422 dump source = 0x0
4796 00:40:01.409537 dump params frequency:800
4797 00:40:01.409635 dump params rank number:2
4798 00:40:01.409720
4799 00:40:01.412518 dump params write leveling
4800 00:40:01.415523 write leveling[0][0][0] = 0x0
4801 00:40:01.418951 write leveling[0][0][1] = 0x0
4802 00:40:01.419042 write leveling[0][1][0] = 0x0
4803 00:40:01.422077 write leveling[0][1][1] = 0x0
4804 00:40:01.425787 write leveling[1][0][0] = 0x0
4805 00:40:01.428911 write leveling[1][0][1] = 0x0
4806 00:40:01.432299 write leveling[1][1][0] = 0x0
4807 00:40:01.432398 write leveling[1][1][1] = 0x0
4808 00:40:01.435504 dump params cbt_cs
4809 00:40:01.435599 cbt_cs[0][0] = 0x0
4810 00:40:01.438629 cbt_cs[0][1] = 0x0
4811 00:40:01.442201 cbt_cs[1][0] = 0x0
4812 00:40:01.442293 cbt_cs[1][1] = 0x0
4813 00:40:01.445508 dump params cbt_mr12
4814 00:40:01.445599 cbt_mr12[0][0] = 0x0
4815 00:40:01.448533 cbt_mr12[0][1] = 0x0
4816 00:40:01.448628 cbt_mr12[1][0] = 0x0
4817 00:40:01.452095 cbt_mr12[1][1] = 0x0
4818 00:40:01.452186 dump params tx window
4819 00:40:01.455461 tx_center_min[0][0][0] = 0
4820 00:40:01.458531 tx_center_max[0][0][0] = 0
4821 00:40:01.462293 tx_center_min[0][0][1] = 0
4822 00:40:01.462392 tx_center_max[0][0][1] = 0
4823 00:40:01.465456 tx_center_min[0][1][0] = 0
4824 00:40:01.468576 tx_center_max[0][1][0] = 0
4825 00:40:01.472034 tx_center_min[0][1][1] = 0
4826 00:40:01.472132 tx_center_max[0][1][1] = 0
4827 00:40:01.475548 tx_center_min[1][0][0] = 0
4828 00:40:01.478786 tx_center_max[1][0][0] = 0
4829 00:40:01.482251 tx_center_min[1][0][1] = 0
4830 00:40:01.482345 tx_center_max[1][0][1] = 0
4831 00:40:01.485412 tx_center_min[1][1][0] = 0
4832 00:40:01.488479 tx_center_max[1][1][0] = 0
4833 00:40:01.491836 tx_center_min[1][1][1] = 0
4834 00:40:01.491937 tx_center_max[1][1][1] = 0
4835 00:40:01.495274 dump params tx window
4836 00:40:01.498695 tx_win_center[0][0][0] = 0
4837 00:40:01.498823 tx_first_pass[0][0][0] = 0
4838 00:40:01.501929 tx_last_pass[0][0][0] = 0
4839 00:40:01.505362 tx_win_center[0][0][1] = 0
4840 00:40:01.508782 tx_first_pass[0][0][1] = 0
4841 00:40:01.508885 tx_last_pass[0][0][1] = 0
4842 00:40:01.512089 tx_win_center[0][0][2] = 0
4843 00:40:01.515351 tx_first_pass[0][0][2] = 0
4844 00:40:01.515455 tx_last_pass[0][0][2] = 0
4845 00:40:01.518647 tx_win_center[0][0][3] = 0
4846 00:40:01.522022 tx_first_pass[0][0][3] = 0
4847 00:40:01.525389 tx_last_pass[0][0][3] = 0
4848 00:40:01.525480 tx_win_center[0][0][4] = 0
4849 00:40:01.528819 tx_first_pass[0][0][4] = 0
4850 00:40:01.532414 tx_last_pass[0][0][4] = 0
4851 00:40:01.532505 tx_win_center[0][0][5] = 0
4852 00:40:01.535709 tx_first_pass[0][0][5] = 0
4853 00:40:01.538761 tx_last_pass[0][0][5] = 0
4854 00:40:01.542092 tx_win_center[0][0][6] = 0
4855 00:40:01.542183 tx_first_pass[0][0][6] = 0
4856 00:40:01.545386 tx_last_pass[0][0][6] = 0
4857 00:40:01.548597 tx_win_center[0][0][7] = 0
4858 00:40:01.551888 tx_first_pass[0][0][7] = 0
4859 00:40:01.551979 tx_last_pass[0][0][7] = 0
4860 00:40:01.555084 tx_win_center[0][0][8] = 0
4861 00:40:01.558711 tx_first_pass[0][0][8] = 0
4862 00:40:01.558801 tx_last_pass[0][0][8] = 0
4863 00:40:01.561855 tx_win_center[0][0][9] = 0
4864 00:40:01.565187 tx_first_pass[0][0][9] = 0
4865 00:40:01.568483 tx_last_pass[0][0][9] = 0
4866 00:40:01.568574 tx_win_center[0][0][10] = 0
4867 00:40:01.571823 tx_first_pass[0][0][10] = 0
4868 00:40:01.575178 tx_last_pass[0][0][10] = 0
4869 00:40:01.578675 tx_win_center[0][0][11] = 0
4870 00:40:01.578766 tx_first_pass[0][0][11] = 0
4871 00:40:01.581703 tx_last_pass[0][0][11] = 0
4872 00:40:01.585111 tx_win_center[0][0][12] = 0
4873 00:40:01.588704 tx_first_pass[0][0][12] = 0
4874 00:40:01.588795 tx_last_pass[0][0][12] = 0
4875 00:40:01.591675 tx_win_center[0][0][13] = 0
4876 00:40:01.594760 tx_first_pass[0][0][13] = 0
4877 00:40:01.598561 tx_last_pass[0][0][13] = 0
4878 00:40:01.598651 tx_win_center[0][0][14] = 0
4879 00:40:01.601366 tx_first_pass[0][0][14] = 0
4880 00:40:01.604781 tx_last_pass[0][0][14] = 0
4881 00:40:01.608680 tx_win_center[0][0][15] = 0
4882 00:40:01.608770 tx_first_pass[0][0][15] = 0
4883 00:40:01.611461 tx_last_pass[0][0][15] = 0
4884 00:40:01.615138 tx_win_center[0][1][0] = 0
4885 00:40:01.618429 tx_first_pass[0][1][0] = 0
4886 00:40:01.618520 tx_last_pass[0][1][0] = 0
4887 00:40:01.621375 tx_win_center[0][1][1] = 0
4888 00:40:01.624896 tx_first_pass[0][1][1] = 0
4889 00:40:01.628104 tx_last_pass[0][1][1] = 0
4890 00:40:01.628195 tx_win_center[0][1][2] = 0
4891 00:40:01.631690 tx_first_pass[0][1][2] = 0
4892 00:40:01.635061 tx_last_pass[0][1][2] = 0
4893 00:40:01.635152 tx_win_center[0][1][3] = 0
4894 00:40:01.638238 tx_first_pass[0][1][3] = 0
4895 00:40:01.641419 tx_last_pass[0][1][3] = 0
4896 00:40:01.644639 tx_win_center[0][1][4] = 0
4897 00:40:01.644729 tx_first_pass[0][1][4] = 0
4898 00:40:01.648226 tx_last_pass[0][1][4] = 0
4899 00:40:01.651726 tx_win_center[0][1][5] = 0
4900 00:40:01.654772 tx_first_pass[0][1][5] = 0
4901 00:40:01.654862 tx_last_pass[0][1][5] = 0
4902 00:40:01.658306 tx_win_center[0][1][6] = 0
4903 00:40:01.661367 tx_first_pass[0][1][6] = 0
4904 00:40:01.661458 tx_last_pass[0][1][6] = 0
4905 00:40:01.664683 tx_win_center[0][1][7] = 0
4906 00:40:01.668011 tx_first_pass[0][1][7] = 0
4907 00:40:01.671462 tx_last_pass[0][1][7] = 0
4908 00:40:01.671552 tx_win_center[0][1][8] = 0
4909 00:40:01.674770 tx_first_pass[0][1][8] = 0
4910 00:40:01.677888 tx_last_pass[0][1][8] = 0
4911 00:40:01.681756 tx_win_center[0][1][9] = 0
4912 00:40:01.681847 tx_first_pass[0][1][9] = 0
4913 00:40:01.685111 tx_last_pass[0][1][9] = 0
4914 00:40:01.687983 tx_win_center[0][1][10] = 0
4915 00:40:01.691684 tx_first_pass[0][1][10] = 0
4916 00:40:01.691774 tx_last_pass[0][1][10] = 0
4917 00:40:01.694829 tx_win_center[0][1][11] = 0
4918 00:40:01.698011 tx_first_pass[0][1][11] = 0
4919 00:40:01.698100 tx_last_pass[0][1][11] = 0
4920 00:40:01.701688 tx_win_center[0][1][12] = 0
4921 00:40:01.704999 tx_first_pass[0][1][12] = 0
4922 00:40:01.707853 tx_last_pass[0][1][12] = 0
4923 00:40:01.707943 tx_win_center[0][1][13] = 0
4924 00:40:01.711551 tx_first_pass[0][1][13] = 0
4925 00:40:01.714588 tx_last_pass[0][1][13] = 0
4926 00:40:01.718226 tx_win_center[0][1][14] = 0
4927 00:40:01.721269 tx_first_pass[0][1][14] = 0
4928 00:40:01.721359 tx_last_pass[0][1][14] = 0
4929 00:40:01.725054 tx_win_center[0][1][15] = 0
4930 00:40:01.728041 tx_first_pass[0][1][15] = 0
4931 00:40:01.731157 tx_last_pass[0][1][15] = 0
4932 00:40:01.731247 tx_win_center[1][0][0] = 0
4933 00:40:01.735019 tx_first_pass[1][0][0] = 0
4934 00:40:01.738082 tx_last_pass[1][0][0] = 0
4935 00:40:01.738171 tx_win_center[1][0][1] = 0
4936 00:40:01.741539 tx_first_pass[1][0][1] = 0
4937 00:40:01.745034 tx_last_pass[1][0][1] = 0
4938 00:40:01.748150 tx_win_center[1][0][2] = 0
4939 00:40:01.748240 tx_first_pass[1][0][2] = 0
4940 00:40:01.751148 tx_last_pass[1][0][2] = 0
4941 00:40:01.754556 tx_win_center[1][0][3] = 0
4942 00:40:01.754646 tx_first_pass[1][0][3] = 0
4943 00:40:01.757961 tx_last_pass[1][0][3] = 0
4944 00:40:01.761556 tx_win_center[1][0][4] = 0
4945 00:40:01.764887 tx_first_pass[1][0][4] = 0
4946 00:40:01.764977 tx_last_pass[1][0][4] = 0
4947 00:40:01.768328 tx_win_center[1][0][5] = 0
4948 00:40:01.771658 tx_first_pass[1][0][5] = 0
4949 00:40:01.774695 tx_last_pass[1][0][5] = 0
4950 00:40:01.774785 tx_win_center[1][0][6] = 0
4951 00:40:01.778136 tx_first_pass[1][0][6] = 0
4952 00:40:01.781296 tx_last_pass[1][0][6] = 0
4953 00:40:01.781386 tx_win_center[1][0][7] = 0
4954 00:40:01.784636 tx_first_pass[1][0][7] = 0
4955 00:40:01.787761 tx_last_pass[1][0][7] = 0
4956 00:40:01.791761 tx_win_center[1][0][8] = 0
4957 00:40:01.791850 tx_first_pass[1][0][8] = 0
4958 00:40:01.794438 tx_last_pass[1][0][8] = 0
4959 00:40:01.797835 tx_win_center[1][0][9] = 0
4960 00:40:01.801386 tx_first_pass[1][0][9] = 0
4961 00:40:01.801505 tx_last_pass[1][0][9] = 0
4962 00:40:01.804655 tx_win_center[1][0][10] = 0
4963 00:40:01.807950 tx_first_pass[1][0][10] = 0
4964 00:40:01.808040 tx_last_pass[1][0][10] = 0
4965 00:40:01.811437 tx_win_center[1][0][11] = 0
4966 00:40:01.814917 tx_first_pass[1][0][11] = 0
4967 00:40:01.818414 tx_last_pass[1][0][11] = 0
4968 00:40:01.818504 tx_win_center[1][0][12] = 0
4969 00:40:01.821285 tx_first_pass[1][0][12] = 0
4970 00:40:01.824906 tx_last_pass[1][0][12] = 0
4971 00:40:01.828041 tx_win_center[1][0][13] = 0
4972 00:40:01.831171 tx_first_pass[1][0][13] = 0
4973 00:40:01.831261 tx_last_pass[1][0][13] = 0
4974 00:40:01.834454 tx_win_center[1][0][14] = 0
4975 00:40:01.837781 tx_first_pass[1][0][14] = 0
4976 00:40:01.837871 tx_last_pass[1][0][14] = 0
4977 00:40:01.840976 tx_win_center[1][0][15] = 0
4978 00:40:01.844436 tx_first_pass[1][0][15] = 0
4979 00:40:01.847687 tx_last_pass[1][0][15] = 0
4980 00:40:01.847777 tx_win_center[1][1][0] = 0
4981 00:40:01.851286 tx_first_pass[1][1][0] = 0
4982 00:40:01.855333 tx_last_pass[1][1][0] = 0
4983 00:40:01.857786 tx_win_center[1][1][1] = 0
4984 00:40:01.857877 tx_first_pass[1][1][1] = 0
4985 00:40:01.861464 tx_last_pass[1][1][1] = 0
4986 00:40:01.864959 tx_win_center[1][1][2] = 0
4987 00:40:01.868040 tx_first_pass[1][1][2] = 0
4988 00:40:01.868130 tx_last_pass[1][1][2] = 0
4989 00:40:01.871279 tx_win_center[1][1][3] = 0
4990 00:40:01.874504 tx_first_pass[1][1][3] = 0
4991 00:40:01.874594 tx_last_pass[1][1][3] = 0
4992 00:40:01.878085 tx_win_center[1][1][4] = 0
4993 00:40:01.881151 tx_first_pass[1][1][4] = 0
4994 00:40:01.884557 tx_last_pass[1][1][4] = 0
4995 00:40:01.884646 tx_win_center[1][1][5] = 0
4996 00:40:01.887672 tx_first_pass[1][1][5] = 0
4997 00:40:01.891033 tx_last_pass[1][1][5] = 0
4998 00:40:01.894423 tx_win_center[1][1][6] = 0
4999 00:40:01.894514 tx_first_pass[1][1][6] = 0
5000 00:40:01.898063 tx_last_pass[1][1][6] = 0
5001 00:40:01.901165 tx_win_center[1][1][7] = 0
5002 00:40:01.901254 tx_first_pass[1][1][7] = 0
5003 00:40:01.904070 tx_last_pass[1][1][7] = 0
5004 00:40:01.907719 tx_win_center[1][1][8] = 0
5005 00:40:01.911020 tx_first_pass[1][1][8] = 0
5006 00:40:01.911110 tx_last_pass[1][1][8] = 0
5007 00:40:01.914470 tx_win_center[1][1][9] = 0
5008 00:40:01.917596 tx_first_pass[1][1][9] = 0
5009 00:40:01.920829 tx_last_pass[1][1][9] = 0
5010 00:40:01.920920 tx_win_center[1][1][10] = 0
5011 00:40:01.924440 tx_first_pass[1][1][10] = 0
5012 00:40:01.928195 tx_last_pass[1][1][10] = 0
5013 00:40:01.930999 tx_win_center[1][1][11] = 0
5014 00:40:01.931090 tx_first_pass[1][1][11] = 0
5015 00:40:01.934196 tx_last_pass[1][1][11] = 0
5016 00:40:01.937452 tx_win_center[1][1][12] = 0
5017 00:40:01.940879 tx_first_pass[1][1][12] = 0
5018 00:40:01.940969 tx_last_pass[1][1][12] = 0
5019 00:40:01.944142 tx_win_center[1][1][13] = 0
5020 00:40:01.947489 tx_first_pass[1][1][13] = 0
5021 00:40:01.950879 tx_last_pass[1][1][13] = 0
5022 00:40:01.950968 tx_win_center[1][1][14] = 0
5023 00:40:01.954318 tx_first_pass[1][1][14] = 0
5024 00:40:01.957369 tx_last_pass[1][1][14] = 0
5025 00:40:01.961264 tx_win_center[1][1][15] = 0
5026 00:40:01.961354 tx_first_pass[1][1][15] = 0
5027 00:40:01.964694 tx_last_pass[1][1][15] = 0
5028 00:40:01.967714 dump params rx window
5029 00:40:01.967803 rx_firspass[0][0][0] = 0
5030 00:40:01.971071 rx_lastpass[0][0][0] = 0
5031 00:40:01.974408 rx_firspass[0][0][1] = 0
5032 00:40:01.974497 rx_lastpass[0][0][1] = 0
5033 00:40:01.977550 rx_firspass[0][0][2] = 0
5034 00:40:01.980853 rx_lastpass[0][0][2] = 0
5035 00:40:01.980943 rx_firspass[0][0][3] = 0
5036 00:40:01.984710 rx_lastpass[0][0][3] = 0
5037 00:40:01.987815 rx_firspass[0][0][4] = 0
5038 00:40:01.987904 rx_lastpass[0][0][4] = 0
5039 00:40:01.991200 rx_firspass[0][0][5] = 0
5040 00:40:01.994280 rx_lastpass[0][0][5] = 0
5041 00:40:01.997517 rx_firspass[0][0][6] = 0
5042 00:40:01.997607 rx_lastpass[0][0][6] = 0
5043 00:40:02.000876 rx_firspass[0][0][7] = 0
5044 00:40:02.004161 rx_lastpass[0][0][7] = 0
5045 00:40:02.004250 rx_firspass[0][0][8] = 0
5046 00:40:02.007299 rx_lastpass[0][0][8] = 0
5047 00:40:02.010938 rx_firspass[0][0][9] = 0
5048 00:40:02.011027 rx_lastpass[0][0][9] = 0
5049 00:40:02.013961 rx_firspass[0][0][10] = 0
5050 00:40:02.017252 rx_lastpass[0][0][10] = 0
5051 00:40:02.017342 rx_firspass[0][0][11] = 0
5052 00:40:02.021173 rx_lastpass[0][0][11] = 0
5053 00:40:02.024293 rx_firspass[0][0][12] = 0
5054 00:40:02.027199 rx_lastpass[0][0][12] = 0
5055 00:40:02.027288 rx_firspass[0][0][13] = 0
5056 00:40:02.031074 rx_lastpass[0][0][13] = 0
5057 00:40:02.034005 rx_firspass[0][0][14] = 0
5058 00:40:02.037322 rx_lastpass[0][0][14] = 0
5059 00:40:02.037411 rx_firspass[0][0][15] = 0
5060 00:40:02.040584 rx_lastpass[0][0][15] = 0
5061 00:40:02.044150 rx_firspass[0][1][0] = 0
5062 00:40:02.044240 rx_lastpass[0][1][0] = 0
5063 00:40:02.047149 rx_firspass[0][1][1] = 0
5064 00:40:02.050578 rx_lastpass[0][1][1] = 0
5065 00:40:02.050668 rx_firspass[0][1][2] = 0
5066 00:40:02.054372 rx_lastpass[0][1][2] = 0
5067 00:40:02.057059 rx_firspass[0][1][3] = 0
5068 00:40:02.057149 rx_lastpass[0][1][3] = 0
5069 00:40:02.060684 rx_firspass[0][1][4] = 0
5070 00:40:02.064105 rx_lastpass[0][1][4] = 0
5071 00:40:02.066954 rx_firspass[0][1][5] = 0
5072 00:40:02.067043 rx_lastpass[0][1][5] = 0
5073 00:40:02.070790 rx_firspass[0][1][6] = 0
5074 00:40:02.073737 rx_lastpass[0][1][6] = 0
5075 00:40:02.073826 rx_firspass[0][1][7] = 0
5076 00:40:02.077471 rx_lastpass[0][1][7] = 0
5077 00:40:02.080581 rx_firspass[0][1][8] = 0
5078 00:40:02.080670 rx_lastpass[0][1][8] = 0
5079 00:40:02.083978 rx_firspass[0][1][9] = 0
5080 00:40:02.087137 rx_lastpass[0][1][9] = 0
5081 00:40:02.087227 rx_firspass[0][1][10] = 0
5082 00:40:02.090694 rx_lastpass[0][1][10] = 0
5083 00:40:02.093804 rx_firspass[0][1][11] = 0
5084 00:40:02.097033 rx_lastpass[0][1][11] = 0
5085 00:40:02.097122 rx_firspass[0][1][12] = 0
5086 00:40:02.100485 rx_lastpass[0][1][12] = 0
5087 00:40:02.103705 rx_firspass[0][1][13] = 0
5088 00:40:02.103795 rx_lastpass[0][1][13] = 0
5089 00:40:02.107105 rx_firspass[0][1][14] = 0
5090 00:40:02.110312 rx_lastpass[0][1][14] = 0
5091 00:40:02.113910 rx_firspass[0][1][15] = 0
5092 00:40:02.113999 rx_lastpass[0][1][15] = 0
5093 00:40:02.117174 rx_firspass[1][0][0] = 0
5094 00:40:02.120609 rx_lastpass[1][0][0] = 0
5095 00:40:02.120698 rx_firspass[1][0][1] = 0
5096 00:40:02.123838 rx_lastpass[1][0][1] = 0
5097 00:40:02.126900 rx_firspass[1][0][2] = 0
5098 00:40:02.126989 rx_lastpass[1][0][2] = 0
5099 00:40:02.130833 rx_firspass[1][0][3] = 0
5100 00:40:02.134171 rx_lastpass[1][0][3] = 0
5101 00:40:02.134261 rx_firspass[1][0][4] = 0
5102 00:40:02.137304 rx_lastpass[1][0][4] = 0
5103 00:40:02.140365 rx_firspass[1][0][5] = 0
5104 00:40:02.140484 rx_lastpass[1][0][5] = 0
5105 00:40:02.144314 rx_firspass[1][0][6] = 0
5106 00:40:02.147329 rx_lastpass[1][0][6] = 0
5107 00:40:02.147452 rx_firspass[1][0][7] = 0
5108 00:40:02.150856 rx_lastpass[1][0][7] = 0
5109 00:40:02.154212 rx_firspass[1][0][8] = 0
5110 00:40:02.157278 rx_lastpass[1][0][8] = 0
5111 00:40:02.157386 rx_firspass[1][0][9] = 0
5112 00:40:02.160479 rx_lastpass[1][0][9] = 0
5113 00:40:02.164103 rx_firspass[1][0][10] = 0
5114 00:40:02.164218 rx_lastpass[1][0][10] = 0
5115 00:40:02.167344 rx_firspass[1][0][11] = 0
5116 00:40:02.170274 rx_lastpass[1][0][11] = 0
5117 00:40:02.170380 rx_firspass[1][0][12] = 0
5118 00:40:02.173906 rx_lastpass[1][0][12] = 0
5119 00:40:02.177207 rx_firspass[1][0][13] = 0
5120 00:40:02.180216 rx_lastpass[1][0][13] = 0
5121 00:40:02.180324 rx_firspass[1][0][14] = 0
5122 00:40:02.183831 rx_lastpass[1][0][14] = 0
5123 00:40:02.187135 rx_firspass[1][0][15] = 0
5124 00:40:02.187250 rx_lastpass[1][0][15] = 0
5125 00:40:02.190723 rx_firspass[1][1][0] = 0
5126 00:40:02.193783 rx_lastpass[1][1][0] = 0
5127 00:40:02.196964 rx_firspass[1][1][1] = 0
5128 00:40:02.197070 rx_lastpass[1][1][1] = 0
5129 00:40:02.200376 rx_firspass[1][1][2] = 0
5130 00:40:02.203689 rx_lastpass[1][1][2] = 0
5131 00:40:02.203803 rx_firspass[1][1][3] = 0
5132 00:40:02.207012 rx_lastpass[1][1][3] = 0
5133 00:40:02.210723 rx_firspass[1][1][4] = 0
5134 00:40:02.210829 rx_lastpass[1][1][4] = 0
5135 00:40:02.214181 rx_firspass[1][1][5] = 0
5136 00:40:02.217171 rx_lastpass[1][1][5] = 0
5137 00:40:02.217284 rx_firspass[1][1][6] = 0
5138 00:40:02.220447 rx_lastpass[1][1][6] = 0
5139 00:40:02.223659 rx_firspass[1][1][7] = 0
5140 00:40:02.223773 rx_lastpass[1][1][7] = 0
5141 00:40:02.226810 rx_firspass[1][1][8] = 0
5142 00:40:02.230298 rx_lastpass[1][1][8] = 0
5143 00:40:02.233727 rx_firspass[1][1][9] = 0
5144 00:40:02.233835 rx_lastpass[1][1][9] = 0
5145 00:40:02.236943 rx_firspass[1][1][10] = 0
5146 00:40:02.240186 rx_lastpass[1][1][10] = 0
5147 00:40:02.240295 rx_firspass[1][1][11] = 0
5148 00:40:02.243428 rx_lastpass[1][1][11] = 0
5149 00:40:02.247040 rx_firspass[1][1][12] = 0
5150 00:40:02.247146 rx_lastpass[1][1][12] = 0
5151 00:40:02.250810 rx_firspass[1][1][13] = 0
5152 00:40:02.253505 rx_lastpass[1][1][13] = 0
5153 00:40:02.257378 rx_firspass[1][1][14] = 0
5154 00:40:02.257483 rx_lastpass[1][1][14] = 0
5155 00:40:02.260642 rx_firspass[1][1][15] = 0
5156 00:40:02.263880 rx_lastpass[1][1][15] = 0
5157 00:40:02.263970 dump params clk_delay
5158 00:40:02.266705 clk_delay[0] = 0
5159 00:40:02.266795 clk_delay[1] = 0
5160 00:40:02.270486 dump params dqs_delay
5161 00:40:02.270575 dqs_delay[0][0] = 0
5162 00:40:02.273774 dqs_delay[0][1] = 0
5163 00:40:02.276841 dqs_delay[1][0] = 0
5164 00:40:02.276931 dqs_delay[1][1] = 0
5165 00:40:02.280056 dump params delay_cell_unit = 735
5166 00:40:02.283219 mt_set_emi_preloader end
5167 00:40:02.286511 [mt_mem_init] dram size: 0x100000000, rank number: 2
5168 00:40:02.290109 [complex_mem_test] start addr:0x40000000, len:20480
5169 00:40:02.328288 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5170 00:40:02.335343 [complex_mem_test] start addr:0x80000000, len:20480
5171 00:40:02.370833 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5172 00:40:02.377479 [complex_mem_test] start addr:0xc0000000, len:20480
5173 00:40:02.412977 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5174 00:40:02.419435 [complex_mem_test] start addr:0x56000000, len:8192
5175 00:40:02.436489 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5176 00:40:02.436580 ddr_geometry:1
5177 00:40:02.442548 [complex_mem_test] start addr:0x80000000, len:8192
5178 00:40:02.460207 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5179 00:40:02.463320 dram_init: dram init end (result: 0)
5180 00:40:02.469794 Successfully loaded DRAM blobs and ran DRAM calibration
5181 00:40:02.479582 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5182 00:40:02.479675 CBMEM:
5183 00:40:02.482908 IMD: root @ 00000000fffff000 254 entries.
5184 00:40:02.486502 IMD: root @ 00000000ffffec00 62 entries.
5185 00:40:02.493348 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5186 00:40:02.500006 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5187 00:40:02.503252 in-header: 03 a1 00 00 08 00 00 00
5188 00:40:02.506567 in-data: 84 60 60 10 00 00 00 00
5189 00:40:02.509548 Chrome EC: clear events_b mask to 0x0000000020004000
5190 00:40:02.516998 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5191 00:40:02.520476 in-header: 03 fd 00 00 00 00 00 00
5192 00:40:02.520564 in-data:
5193 00:40:02.527157 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5194 00:40:02.527267 CBFS @ 21000 size 3d4000
5195 00:40:02.533661 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5196 00:40:02.536913 CBFS: Locating 'fallback/ramstage'
5197 00:40:02.540581 CBFS: Found @ offset 10d40 size d563
5198 00:40:02.561642 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5199 00:40:02.574030 Accumulated console time in romstage 13672 ms
5200 00:40:02.574150
5201 00:40:02.574261
5202 00:40:02.583943 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5203 00:40:02.587057 ARM64: Exception handlers installed.
5204 00:40:02.587168 ARM64: Testing exception
5205 00:40:02.590464 ARM64: Done test exception
5206 00:40:02.593894 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5207 00:40:02.597143 Manufacturer: ef
5208 00:40:02.600494 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5209 00:40:02.607056 WARNING: RO_VPD is uninitialized or empty.
5210 00:40:02.610467 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5211 00:40:02.613764 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5212 00:40:02.623885 read SPI 0x550600 0x3a00: 4533 us, 3275 KB/s, 26.200 Mbps
5213 00:40:02.626855 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5214 00:40:02.633855 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5215 00:40:02.633946 Enumerating buses...
5216 00:40:02.640344 Show all devs... Before device enumeration.
5217 00:40:02.640435 Root Device: enabled 1
5218 00:40:02.643735 CPU_CLUSTER: 0: enabled 1
5219 00:40:02.643825 CPU: 00: enabled 1
5220 00:40:02.647193 Compare with tree...
5221 00:40:02.650409 Root Device: enabled 1
5222 00:40:02.650499 CPU_CLUSTER: 0: enabled 1
5223 00:40:02.653694 CPU: 00: enabled 1
5224 00:40:02.656749 Root Device scanning...
5225 00:40:02.656838 root_dev_scan_bus for Root Device
5226 00:40:02.660393 CPU_CLUSTER: 0 enabled
5227 00:40:02.663569 root_dev_scan_bus for Root Device done
5228 00:40:02.670457 scan_bus: scanning of bus Root Device took 10690 usecs
5229 00:40:02.670548 done
5230 00:40:02.673600 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5231 00:40:02.677015 Allocating resources...
5232 00:40:02.677105 Reading resources...
5233 00:40:02.680492 Root Device read_resources bus 0 link: 0
5234 00:40:02.687345 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5235 00:40:02.687461 CPU: 00 missing read_resources
5236 00:40:02.693769 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5237 00:40:02.696692 Root Device read_resources bus 0 link: 0 done
5238 00:40:02.700156 Done reading resources.
5239 00:40:02.703768 Show resources in subtree (Root Device)...After reading.
5240 00:40:02.706746 Root Device child on link 0 CPU_CLUSTER: 0
5241 00:40:02.710056 CPU_CLUSTER: 0 child on link 0 CPU: 00
5242 00:40:02.720162 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5243 00:40:02.720279 CPU: 00
5244 00:40:02.723771 Setting resources...
5245 00:40:02.726778 Root Device assign_resources, bus 0 link: 0
5246 00:40:02.730313 CPU_CLUSTER: 0 missing set_resources
5247 00:40:02.733635 Root Device assign_resources, bus 0 link: 0
5248 00:40:02.736791 Done setting resources.
5249 00:40:02.743623 Show resources in subtree (Root Device)...After assigning values.
5250 00:40:02.747174 Root Device child on link 0 CPU_CLUSTER: 0
5251 00:40:02.750317 CPU_CLUSTER: 0 child on link 0 CPU: 00
5252 00:40:02.757153 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5253 00:40:02.760388 CPU: 00
5254 00:40:02.760486 Done allocating resources.
5255 00:40:02.766864 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5256 00:40:02.766982 Enabling resources...
5257 00:40:02.770497 done.
5258 00:40:02.773383 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5259 00:40:02.776916 Initializing devices...
5260 00:40:02.777029 Root Device init ...
5261 00:40:02.779887 mainboard_init: Starting display init.
5262 00:40:02.783477 ADC[4]: Raw value=75746 ID=0
5263 00:40:02.806460 anx7625_power_on_init: Init interface.
5264 00:40:02.810168 anx7625_disable_pd_protocol: Disabled PD feature.
5265 00:40:02.816680 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5266 00:40:02.862833 anx7625_start_dp_work: Secure OCM version=00
5267 00:40:02.866266 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5268 00:40:02.883250 sp_tx_get_edid_block: EDID Block = 1
5269 00:40:03.000948 Extracted contents:
5270 00:40:03.003897 header: 00 ff ff ff ff ff ff 00
5271 00:40:03.007545 serial number: 06 af 5c 14 00 00 00 00 00 1a
5272 00:40:03.010542 version: 01 04
5273 00:40:03.013844 basic params: 95 1a 0e 78 02
5274 00:40:03.017194 chroma info: 99 85 95 55 56 92 28 22 50 54
5275 00:40:03.020793 established: 00 00 00
5276 00:40:03.027249 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5277 00:40:03.030483 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5278 00:40:03.037200 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5279 00:40:03.043541 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5280 00:40:03.050591 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5281 00:40:03.053679 extensions: 00
5282 00:40:03.053770 checksum: ae
5283 00:40:03.053841
5284 00:40:03.057068 Manufacturer: AUO Model 145c Serial Number 0
5285 00:40:03.060077 Made week 0 of 2016
5286 00:40:03.060171 EDID version: 1.4
5287 00:40:03.063356 Digital display
5288 00:40:03.067213 6 bits per primary color channel
5289 00:40:03.067305 DisplayPort interface
5290 00:40:03.070613 Maximum image size: 26 cm x 14 cm
5291 00:40:03.073986 Gamma: 220%
5292 00:40:03.074076 Check DPMS levels
5293 00:40:03.077193 Supported color formats: RGB 4:4:4
5294 00:40:03.080709 First detailed timing is preferred timing
5295 00:40:03.083511 Established timings supported:
5296 00:40:03.087249 Standard timings supported:
5297 00:40:03.087366 Detailed timings
5298 00:40:03.093628 Hex of detail: ce1d56ea50001a3030204600009010000018
5299 00:40:03.096815 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5300 00:40:03.100362 0556 0586 05a6 0640 hborder 0
5301 00:40:03.103431 0300 0304 030a 031a vborder 0
5302 00:40:03.106809 -hsync -vsync
5303 00:40:03.110058 Did detailed timing
5304 00:40:03.113593 Hex of detail: 0000000f0000000000000000000000000020
5305 00:40:03.116985 Manufacturer-specified data, tag 15
5306 00:40:03.123652 Hex of detail: 000000fe0041554f0a202020202020202020
5307 00:40:03.123743 ASCII string: AUO
5308 00:40:03.126732 Hex of detail: 000000fe004231313658414230312e34200a
5309 00:40:03.130386 ASCII string: B116XAB01.4
5310 00:40:03.130475 Checksum
5311 00:40:03.133469 Checksum: 0xae (valid)
5312 00:40:03.139903 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5313 00:40:03.140022 DSI data_rate: 457800000 bps
5314 00:40:03.147559 anx7625_parse_edid: set default k value to 0x3d for panel
5315 00:40:03.150857 anx7625_parse_edid: pixelclock(76300).
5316 00:40:03.154740 hactive(1366), hsync(32), hfp(48), hbp(154)
5317 00:40:03.157801 vactive(768), vsync(6), vfp(4), vbp(16)
5318 00:40:03.160730 anx7625_dsi_config: config dsi.
5319 00:40:03.169268 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5320 00:40:03.189956 anx7625_dsi_config: success to config DSI
5321 00:40:03.193317 anx7625_dp_start: MIPI phy setup OK.
5322 00:40:03.196734 [SSUSB] Setting up USB HOST controller...
5323 00:40:03.200068 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5324 00:40:03.203397 [SSUSB] phy power-on done.
5325 00:40:03.207135 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5326 00:40:03.210360 in-header: 03 fc 01 00 00 00 00 00
5327 00:40:03.210451 in-data:
5328 00:40:03.216822 handle_proto3_response: EC response with error code: 1
5329 00:40:03.216913 SPM: pcm index = 1
5330 00:40:03.220630 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5331 00:40:03.223847 CBFS @ 21000 size 3d4000
5332 00:40:03.230824 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5333 00:40:03.233923 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5334 00:40:03.237263 CBFS: Found @ offset 1e7c0 size 1026
5335 00:40:03.243937 read SPI 0x3f808 0x1026: 1272 us, 3250 KB/s, 26.000 Mbps
5336 00:40:03.247064 SPM: binary array size = 2988
5337 00:40:03.250296 SPM: version = pcm_allinone_v1.17.2_20180829
5338 00:40:03.253935 SPM binary loaded in 32 msecs
5339 00:40:03.261523 spm_kick_im_to_fetch: ptr = 000000004021eec2
5340 00:40:03.264123 spm_kick_im_to_fetch: len = 2988
5341 00:40:03.264214 SPM: spm_kick_pcm_to_run
5342 00:40:03.267914 SPM: spm_kick_pcm_to_run done
5343 00:40:03.271075 SPM: spm_init done in 52 msecs
5344 00:40:03.274363 Root Device init finished in 494998 usecs
5345 00:40:03.277556 CPU_CLUSTER: 0 init ...
5346 00:40:03.287750 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5347 00:40:03.291037 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5348 00:40:03.294494 CBFS @ 21000 size 3d4000
5349 00:40:03.298035 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5350 00:40:03.301255 CBFS: Locating 'sspm.bin'
5351 00:40:03.304318 CBFS: Found @ offset 208c0 size 41cb
5352 00:40:03.314232 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5353 00:40:03.322482 CPU_CLUSTER: 0 init finished in 42802 usecs
5354 00:40:03.322574 Devices initialized
5355 00:40:03.325445 Show all devs... After init.
5356 00:40:03.328847 Root Device: enabled 1
5357 00:40:03.328939 CPU_CLUSTER: 0: enabled 1
5358 00:40:03.332195 CPU: 00: enabled 1
5359 00:40:03.335307 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5360 00:40:03.338789 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5361 00:40:03.341950 ELOG: NV offset 0x558000 size 0x1000
5362 00:40:03.349774 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5363 00:40:03.356200 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5364 00:40:03.359721 ELOG: Event(17) added with size 13 at 2024-06-05 00:39:06 UTC
5365 00:40:03.366326 out: cmd=0x121: 03 db 21 01 00 00 00 00
5366 00:40:03.369368 in-header: 03 b9 00 00 2c 00 00 00
5367 00:40:03.379903 in-data: b8 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 6a 27 01 00 06 80 00 00 92 4e 02 00 06 80 00 00 6e 7d 01 00 06 80 00 00 b2 a9 30 00
5368 00:40:03.383027 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5369 00:40:03.386469 in-header: 03 19 00 00 08 00 00 00
5370 00:40:03.389828 in-data: a2 e0 47 00 13 00 00 00
5371 00:40:03.392976 Chrome EC: UHEPI supported
5372 00:40:03.399726 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5373 00:40:03.402823 in-header: 03 e1 00 00 08 00 00 00
5374 00:40:03.406106 in-data: 84 20 60 10 00 00 00 00
5375 00:40:03.409454 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5376 00:40:03.416370 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5377 00:40:03.419323 in-header: 03 e1 00 00 08 00 00 00
5378 00:40:03.422497 in-data: 84 20 60 10 00 00 00 00
5379 00:40:03.429428 ELOG: Event(A1) added with size 10 at 2024-06-05 00:39:06 UTC
5380 00:40:03.435781 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5381 00:40:03.439133 ELOG: Event(A0) added with size 9 at 2024-06-05 00:39:06 UTC
5382 00:40:03.445942 elog_add_boot_reason: Logged dev mode boot
5383 00:40:03.446033 Finalize devices...
5384 00:40:03.449334 Devices finalized
5385 00:40:03.452597 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5386 00:40:03.459389 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5387 00:40:03.462369 ELOG: Event(91) added with size 10 at 2024-06-05 00:39:06 UTC
5388 00:40:03.465836 Writing coreboot table at 0xffeda000
5389 00:40:03.469314 0. 0000000000114000-000000000011efff: RAMSTAGE
5390 00:40:03.475685 1. 0000000040000000-000000004023cfff: RAMSTAGE
5391 00:40:03.478897 2. 000000004023d000-00000000545fffff: RAM
5392 00:40:03.482534 3. 0000000054600000-000000005465ffff: BL31
5393 00:40:03.485662 4. 0000000054660000-00000000ffed9fff: RAM
5394 00:40:03.492200 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5395 00:40:03.495422 6. 0000000100000000-000000013fffffff: RAM
5396 00:40:03.499218 Passing 5 GPIOs to payload:
5397 00:40:03.502005 NAME | PORT | POLARITY | VALUE
5398 00:40:03.509225 write protect | 0x00000096 | low | high
5399 00:40:03.511929 EC in RW | 0x000000b1 | high | undefined
5400 00:40:03.515862 EC interrupt | 0x00000097 | low | undefined
5401 00:40:03.522275 TPM interrupt | 0x00000099 | high | undefined
5402 00:40:03.525598 speaker enable | 0x000000af | high | undefined
5403 00:40:03.528760 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5404 00:40:03.532317 in-header: 03 f7 00 00 02 00 00 00
5405 00:40:03.535332 in-data: 04 00
5406 00:40:03.535456 Board ID: 4
5407 00:40:03.538423 ADC[3]: Raw value=215860 ID=1
5408 00:40:03.538539 RAM code: 1
5409 00:40:03.538631 SKU ID: 16
5410 00:40:03.545065 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5411 00:40:03.545153 CBFS @ 21000 size 3d4000
5412 00:40:03.551796 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5413 00:40:03.558781 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 834c
5414 00:40:03.561649 coreboot table: 940 bytes.
5415 00:40:03.565519 IMD ROOT 0. 00000000fffff000 00001000
5416 00:40:03.568261 IMD SMALL 1. 00000000ffffe000 00001000
5417 00:40:03.571987 CONSOLE 2. 00000000fffde000 00020000
5418 00:40:03.575368 FMAP 3. 00000000fffdd000 0000047c
5419 00:40:03.578274 TIME STAMP 4. 00000000fffdc000 00000910
5420 00:40:03.581853 RAMOOPS 5. 00000000ffedc000 00100000
5421 00:40:03.584891 COREBOOT 6. 00000000ffeda000 00002000
5422 00:40:03.588241 IMD small region:
5423 00:40:03.591490 IMD ROOT 0. 00000000ffffec00 00000400
5424 00:40:03.594914 VBOOT WORK 1. 00000000ffffeb00 00000100
5425 00:40:03.598718 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5426 00:40:03.601468 VPD 3. 00000000ffffea60 0000006c
5427 00:40:03.608746 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5428 00:40:03.614699 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5429 00:40:03.618487 in-header: 03 e1 00 00 08 00 00 00
5430 00:40:03.621839 in-data: 84 20 60 10 00 00 00 00
5431 00:40:03.625048 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5432 00:40:03.628528 CBFS @ 21000 size 3d4000
5433 00:40:03.631496 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5434 00:40:03.634562 CBFS: Locating 'fallback/payload'
5435 00:40:03.644290 CBFS: Found @ offset dc040 size 439a0
5436 00:40:03.731817 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5437 00:40:03.734953 Checking segment from ROM address 0x0000000040003a00
5438 00:40:03.741781 Checking segment from ROM address 0x0000000040003a1c
5439 00:40:03.745048 Loading segment from ROM address 0x0000000040003a00
5440 00:40:03.748104 code (compression=0)
5441 00:40:03.758159 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5442 00:40:03.765003 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5443 00:40:03.768072 it's not compressed!
5444 00:40:03.771344 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5445 00:40:03.777965 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5446 00:40:03.786146 Loading segment from ROM address 0x0000000040003a1c
5447 00:40:03.789346 Entry Point 0x0000000080000000
5448 00:40:03.789430 Loaded segments
5449 00:40:03.795808 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5450 00:40:03.799623 Jumping to boot code at 0000000080000000(00000000ffeda000)
5451 00:40:03.809126 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5452 00:40:03.812471 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5453 00:40:03.815878 CBFS @ 21000 size 3d4000
5454 00:40:03.822705 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5455 00:40:03.825611 CBFS: Locating 'fallback/bl31'
5456 00:40:03.829157 CBFS: Found @ offset 36dc0 size 5820
5457 00:40:03.839788 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5458 00:40:03.843810 Checking segment from ROM address 0x0000000040003a00
5459 00:40:03.849929 Checking segment from ROM address 0x0000000040003a1c
5460 00:40:03.853495 Loading segment from ROM address 0x0000000040003a00
5461 00:40:03.856862 code (compression=1)
5462 00:40:03.863163 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5463 00:40:03.872962 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5464 00:40:03.873050 using LZMA
5465 00:40:03.881746 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5466 00:40:03.888191 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5467 00:40:03.891489 Loading segment from ROM address 0x0000000040003a1c
5468 00:40:03.895457 Entry Point 0x0000000054601000
5469 00:40:03.895568 Loaded segments
5470 00:40:03.897878 NOTICE: MT8183 bl31_setup
5471 00:40:03.905317 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5472 00:40:03.908913 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5473 00:40:03.912155 INFO: [DEVAPC] dump DEVAPC registers:
5474 00:40:03.922066 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5475 00:40:03.928668 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5476 00:40:03.938807 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5477 00:40:03.945462 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5478 00:40:03.955481 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5479 00:40:03.962253 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5480 00:40:03.971674 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5481 00:40:03.978621 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5482 00:40:03.985012 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5483 00:40:03.995110 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5484 00:40:04.002271 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5485 00:40:04.012028 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5486 00:40:04.018282 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5487 00:40:04.025642 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5488 00:40:04.035279 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5489 00:40:04.041870 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5490 00:40:04.048505 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5491 00:40:04.055303 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5492 00:40:04.065050 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5493 00:40:04.071462 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5494 00:40:04.078122 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5495 00:40:04.084899 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5496 00:40:04.088404 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5497 00:40:04.091583 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5498 00:40:04.094928 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5499 00:40:04.098861 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5500 00:40:04.101939 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5501 00:40:04.108225 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5502 00:40:04.111662 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5503 00:40:04.115094 WARNING: region 0:
5504 00:40:04.118455 WARNING: apc:0x168, sa:0x0, ea:0xfff
5505 00:40:04.121763 WARNING: region 1:
5506 00:40:04.124783 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5507 00:40:04.124874 WARNING: region 2:
5508 00:40:04.128053 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5509 00:40:04.131678 WARNING: region 3:
5510 00:40:04.134895 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5511 00:40:04.134987 WARNING: region 4:
5512 00:40:04.141123 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5513 00:40:04.141219 WARNING: region 5:
5514 00:40:04.144767 WARNING: apc:0x0, sa:0x0, ea:0x0
5515 00:40:04.148218 WARNING: region 6:
5516 00:40:04.148310 WARNING: apc:0x0, sa:0x0, ea:0x0
5517 00:40:04.151625 WARNING: region 7:
5518 00:40:04.154722 WARNING: apc:0x0, sa:0x0, ea:0x0
5519 00:40:04.161612 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5520 00:40:04.164644 INFO: SPM: enable SPMC mode
5521 00:40:04.167981 NOTICE: spm_boot_init() start
5522 00:40:04.170920 NOTICE: spm_boot_init() end
5523 00:40:04.174500 INFO: BL31: Initializing runtime services
5524 00:40:04.177705 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5525 00:40:04.184741 INFO: BL31: Preparing for EL3 exit to normal world
5526 00:40:04.187902 INFO: Entry point address = 0x80000000
5527 00:40:04.191047 INFO: SPSR = 0x8
5528 00:40:04.212016
5529 00:40:04.212117
5530 00:40:04.212216
5531 00:40:04.212722 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5532 00:40:04.212850 start: 2.2.4 bootloader-commands (timeout 00:04:25) [common]
5533 00:40:04.212956 Setting prompt string to ['jacuzzi:']
5534 00:40:04.213061 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:25)
5535 00:40:04.215184 Starting depthcharge on Juniper...
5536 00:40:04.215304
5537 00:40:04.218876 vboot_handoff: creating legacy vboot_handoff structure
5538 00:40:04.218964
5539 00:40:04.222193 ec_init(0): CrosEC protocol v3 supported (544, 544)
5540 00:40:04.222303
5541 00:40:04.225288 Wipe memory regions:
5542 00:40:04.225364
5543 00:40:04.228389 [0x00000040000000, 0x00000054600000)
5544 00:40:04.271539
5545 00:40:04.271627 [0x00000054660000, 0x00000080000000)
5546 00:40:04.363152
5547 00:40:04.363264 [0x000000811994a0, 0x000000ffeda000)
5548 00:40:04.623394
5549 00:40:04.623543 [0x00000100000000, 0x00000140000000)
5550 00:40:04.755555
5551 00:40:04.759251 Initializing XHCI USB controller at 0x11200000.
5552 00:40:04.782050
5553 00:40:04.785502 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5554 00:40:04.785592
5555 00:40:04.785665
5556 00:40:04.785962 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5558 00:40:04.886271 jacuzzi: tftpboot 192.168.201.1 14173469/tftp-deploy-jo3367m1/kernel/image.itb 14173469/tftp-deploy-jo3367m1/kernel/cmdline
5559 00:40:04.886414 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5560 00:40:04.886504 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:25)
5561 00:40:04.890362 tftpboot 192.168.201.1 14173469/tftp-deploy-jo3367m1/kernel/image.ittp-deploy-jo3367m1/kernel/cmdline
5562 00:40:04.890453
5563 00:40:04.890525 Waiting for link
5564 00:40:05.295801
5565 00:40:05.295940 R8152: Initializing
5566 00:40:05.296020
5567 00:40:05.299246 Version 9 (ocp_data = 6010)
5568 00:40:05.299353
5569 00:40:05.302179 R8152: Done initializing
5570 00:40:05.302259
5571 00:40:05.302327 Adding net device
5572 00:40:05.688243
5573 00:40:05.688381 done.
5574 00:40:05.688461
5575 00:40:05.688531 MAC: 00:e0:4c:68:0b:b9
5576 00:40:05.688598
5577 00:40:05.691462 Sending DHCP discover... done.
5578 00:40:05.691552
5579 00:40:05.694847 Waiting for reply... done.
5580 00:40:05.694969
5581 00:40:05.697974 Sending DHCP request... done.
5582 00:40:05.698059
5583 00:40:05.698129 Waiting for reply... done.
5584 00:40:05.698200
5585 00:40:05.701401 My ip is 192.168.201.13
5586 00:40:05.701487
5587 00:40:05.704676 The DHCP server ip is 192.168.201.1
5588 00:40:05.704758
5589 00:40:05.708115 TFTP server IP predefined by user: 192.168.201.1
5590 00:40:05.708200
5591 00:40:05.714710 Bootfile predefined by user: 14173469/tftp-deploy-jo3367m1/kernel/image.itb
5592 00:40:05.714796
5593 00:40:05.717762 Sending tftp read request... done.
5594 00:40:05.717843
5595 00:40:05.721285 Waiting for the transfer...
5596 00:40:05.721365
5597 00:40:05.978802 00000000 ################################################################
5598 00:40:05.978943
5599 00:40:06.226327 00080000 ################################################################
5600 00:40:06.226467
5601 00:40:06.478190 00100000 ################################################################
5602 00:40:06.478328
5603 00:40:06.724971 00180000 ################################################################
5604 00:40:06.725118
5605 00:40:06.975946 00200000 ################################################################
5606 00:40:06.976104
5607 00:40:07.222858 00280000 ################################################################
5608 00:40:07.223003
5609 00:40:07.470465 00300000 ################################################################
5610 00:40:07.470610
5611 00:40:07.718594 00380000 ################################################################
5612 00:40:07.718734
5613 00:40:07.967604 00400000 ################################################################
5614 00:40:07.967750
5615 00:40:08.220159 00480000 ################################################################
5616 00:40:08.220299
5617 00:40:08.472184 00500000 ################################################################
5618 00:40:08.472327
5619 00:40:08.722328 00580000 ################################################################
5620 00:40:08.722474
5621 00:40:08.976799 00600000 ################################################################
5622 00:40:08.976943
5623 00:40:09.225596 00680000 ################################################################
5624 00:40:09.225738
5625 00:40:09.470792 00700000 ################################################################
5626 00:40:09.470933
5627 00:40:09.717452 00780000 ################################################################
5628 00:40:09.717601
5629 00:40:09.972615 00800000 ################################################################
5630 00:40:09.972749
5631 00:40:10.234139 00880000 ################################################################
5632 00:40:10.234279
5633 00:40:10.478120 00900000 ################################################################
5634 00:40:10.478263
5635 00:40:10.721475 00980000 ################################################################
5636 00:40:10.721622
5637 00:40:10.966344 00a00000 ################################################################
5638 00:40:10.966489
5639 00:40:11.211764 00a80000 ################################################################
5640 00:40:11.211898
5641 00:40:11.457832 00b00000 ################################################################
5642 00:40:11.458011
5643 00:40:11.711979 00b80000 ################################################################
5644 00:40:11.712154
5645 00:40:11.968476 00c00000 ################################################################
5646 00:40:11.968630
5647 00:40:12.221981 00c80000 ################################################################
5648 00:40:12.222165
5649 00:40:12.472860 00d00000 ################################################################
5650 00:40:12.473002
5651 00:40:12.721351 00d80000 ################################################################
5652 00:40:12.721522
5653 00:40:12.974271 00e00000 ################################################################
5654 00:40:12.974410
5655 00:40:13.236242 00e80000 ################################################################
5656 00:40:13.236385
5657 00:40:13.486611 00f00000 ################################################################
5658 00:40:13.486790
5659 00:40:13.745791 00f80000 ################################################################
5660 00:40:13.745958
5661 00:40:14.004903 01000000 ################################################################
5662 00:40:14.005049
5663 00:40:14.268632 01080000 ################################################################
5664 00:40:14.268774
5665 00:40:14.534339 01100000 ################################################################
5666 00:40:14.534475
5667 00:40:14.801216 01180000 ################################################################
5668 00:40:14.801361
5669 00:40:15.053718 01200000 ################################################################
5670 00:40:15.053865
5671 00:40:15.318092 01280000 ################################################################
5672 00:40:15.318235
5673 00:40:15.592304 01300000 ################################################################
5674 00:40:15.592442
5675 00:40:15.862397 01380000 ################################################################
5676 00:40:15.862544
5677 00:40:16.120536 01400000 ################################################################
5678 00:40:16.120677
5679 00:40:16.380223 01480000 ################################################################
5680 00:40:16.380372
5681 00:40:16.640805 01500000 ################################################################
5682 00:40:16.640950
5683 00:40:16.889803 01580000 ################################################################
5684 00:40:16.889943
5685 00:40:17.136511 01600000 ################################################################
5686 00:40:17.136654
5687 00:40:17.388687 01680000 ################################################################
5688 00:40:17.388830
5689 00:40:17.646347 01700000 ################################################################
5690 00:40:17.646493
5691 00:40:17.901412 01780000 ################################################################
5692 00:40:17.901554
5693 00:40:18.150899 01800000 ################################################################
5694 00:40:18.151033
5695 00:40:18.408718 01880000 ################################################################
5696 00:40:18.408901
5697 00:40:18.662477 01900000 ################################################################
5698 00:40:18.662616
5699 00:40:18.914259 01980000 ################################################################
5700 00:40:18.914406
5701 00:40:19.157830 01a00000 ################################################################
5702 00:40:19.157974
5703 00:40:19.403586 01a80000 ################################################################
5704 00:40:19.403723
5705 00:40:19.647853 01b00000 ################################################################
5706 00:40:19.647998
5707 00:40:19.890028 01b80000 ################################################################
5708 00:40:19.890168
5709 00:40:20.133001 01c00000 ################################################################
5710 00:40:20.133146
5711 00:40:20.381291 01c80000 ################################################################
5712 00:40:20.381454
5713 00:40:20.660502 01d00000 ################################################################
5714 00:40:20.660643
5715 00:40:20.949189 01d80000 ################################################################
5716 00:40:20.949328
5717 00:40:21.243445 01e00000 ################################################################
5718 00:40:21.243674
5719 00:40:21.513435 01e80000 ################################################################
5720 00:40:21.513611
5721 00:40:21.773484 01f00000 ################################################################
5722 00:40:21.773622
5723 00:40:22.024721 01f80000 ################################################################
5724 00:40:22.024863
5725 00:40:22.274728 02000000 ################################################################
5726 00:40:22.274876
5727 00:40:22.524834 02080000 ################################################################
5728 00:40:22.524982
5729 00:40:22.774726 02100000 ################################################################
5730 00:40:22.774895
5731 00:40:23.018601 02180000 ################################################################
5732 00:40:23.018742
5733 00:40:23.262898 02200000 ################################################################
5734 00:40:23.263040
5735 00:40:23.507120 02280000 ################################################################
5736 00:40:23.507263
5737 00:40:23.763303 02300000 ################################################################
5738 00:40:23.763491
5739 00:40:24.043071 02380000 ################################################################
5740 00:40:24.043243
5741 00:40:24.313714 02400000 ################################################################
5742 00:40:24.313873
5743 00:40:24.559550 02480000 ################################################################
5744 00:40:24.559725
5745 00:40:24.805463 02500000 ################################################################
5746 00:40:24.805602
5747 00:40:25.049332 02580000 ################################################################
5748 00:40:25.049499
5749 00:40:25.288129 02600000 ################################################################
5750 00:40:25.288278
5751 00:40:25.536586 02680000 ################################################################
5752 00:40:25.536726
5753 00:40:25.782241 02700000 ################################################################
5754 00:40:25.782416
5755 00:40:26.028040 02780000 ################################################################
5756 00:40:26.028178
5757 00:40:26.272501 02800000 ################################################################
5758 00:40:26.272641
5759 00:40:26.514958 02880000 ################################################################
5760 00:40:26.515114
5761 00:40:26.757251 02900000 ################################################################
5762 00:40:26.757418
5763 00:40:27.001304 02980000 ################################################################
5764 00:40:27.001454
5765 00:40:27.246316 02a00000 ################################################################
5766 00:40:27.246454
5767 00:40:27.492298 02a80000 ################################################################
5768 00:40:27.492455
5769 00:40:27.736820 02b00000 ################################################################
5770 00:40:27.737001
5771 00:40:27.982230 02b80000 ################################################################
5772 00:40:27.982382
5773 00:40:28.226678 02c00000 ################################################################
5774 00:40:28.226844
5775 00:40:28.477593 02c80000 ################################################################
5776 00:40:28.477774
5777 00:40:28.722867 02d00000 ################################################################
5778 00:40:28.723039
5779 00:40:28.965875 02d80000 ################################################################
5780 00:40:28.966054
5781 00:40:29.207371 02e00000 ################################################################
5782 00:40:29.207525
5783 00:40:29.449749 02e80000 ################################################################
5784 00:40:29.449890
5785 00:40:29.693006 02f00000 ################################################################
5786 00:40:29.693157
5787 00:40:29.937268 02f80000 ################################################################
5788 00:40:29.937411
5789 00:40:30.180825 03000000 ################################################################
5790 00:40:30.180968
5791 00:40:30.424886 03080000 ################################################################
5792 00:40:30.425028
5793 00:40:30.702768 03100000 ################################################################
5794 00:40:30.702920
5795 00:40:30.966440 03180000 ################################################################
5796 00:40:30.966583
5797 00:40:31.214682 03200000 ################################################################
5798 00:40:31.214827
5799 00:40:31.462398 03280000 ################################################################
5800 00:40:31.462567
5801 00:40:31.716127 03300000 ################################################################
5802 00:40:31.716275
5803 00:40:31.965576 03380000 ################################################################
5804 00:40:31.965716
5805 00:40:32.216276 03400000 ################################################################
5806 00:40:32.216415
5807 00:40:32.466115 03480000 ################################################################
5808 00:40:32.466260
5809 00:40:32.715041 03500000 ################################################################
5810 00:40:32.715185
5811 00:40:32.964314 03580000 ################################################################
5812 00:40:32.964458
5813 00:40:33.211580 03600000 ################################################################
5814 00:40:33.211751
5815 00:40:33.464195 03680000 ################################################################
5816 00:40:33.464340
5817 00:40:33.713817 03700000 ################################################################
5818 00:40:33.713960
5819 00:40:33.962323 03780000 ################################################################
5820 00:40:33.962503
5821 00:40:34.211573 03800000 ################################################################
5822 00:40:34.211754
5823 00:40:34.484381 03880000 ################################################################
5824 00:40:34.484516
5825 00:40:34.775503 03900000 ################################################################
5826 00:40:34.775638
5827 00:40:35.030990 03980000 ################################################################
5828 00:40:35.031136
5829 00:40:35.279537 03a00000 ################################################################
5830 00:40:35.279674
5831 00:40:35.526404 03a80000 ################################################################
5832 00:40:35.526545
5833 00:40:35.772312 03b00000 ################################################################
5834 00:40:35.772448
5835 00:40:36.019357 03b80000 ################################################################
5836 00:40:36.019504
5837 00:40:36.268549 03c00000 ################################################################
5838 00:40:36.268693
5839 00:40:36.518741 03c80000 ################################################################
5840 00:40:36.518902
5841 00:40:36.768564 03d00000 ################################################################
5842 00:40:36.768699
5843 00:40:37.025755 03d80000 ################################################################
5844 00:40:37.025898
5845 00:40:37.273584 03e00000 ################################################################
5846 00:40:37.273720
5847 00:40:37.520118 03e80000 ################################################################
5848 00:40:37.520255
5849 00:40:37.770120 03f00000 ################################################################
5850 00:40:37.770256
5851 00:40:38.020707 03f80000 ################################################################
5852 00:40:38.020847
5853 00:40:38.267229 04000000 ################################################################
5854 00:40:38.267392
5855 00:40:38.515372 04080000 ################################################################
5856 00:40:38.515530
5857 00:40:38.762234 04100000 ################################################################
5858 00:40:38.762369
5859 00:40:39.008429 04180000 ################################################################
5860 00:40:39.008578
5861 00:40:39.257690 04200000 ################################################################
5862 00:40:39.257834
5863 00:40:39.534606 04280000 ################################################################
5864 00:40:39.534743
5865 00:40:39.805409 04300000 ################################################################
5866 00:40:39.805576
5867 00:40:40.053469 04380000 ################################################################
5868 00:40:40.053607
5869 00:40:40.307344 04400000 ################################################################
5870 00:40:40.307505
5871 00:40:40.555593 04480000 ################################################################
5872 00:40:40.555725
5873 00:40:40.803987 04500000 ################################################################
5874 00:40:40.804130
5875 00:40:41.051422 04580000 ################################################################
5876 00:40:41.051567
5877 00:40:41.298321 04600000 ################################################################
5878 00:40:41.298458
5879 00:40:41.388767 04680000 ######################## done.
5880 00:40:41.388886
5881 00:40:41.391618 The bootfile was 74118426 bytes long.
5882 00:40:41.391699
5883 00:40:41.395124 Sending tftp read request... done.
5884 00:40:41.395231
5885 00:40:41.398185 Waiting for the transfer...
5886 00:40:41.398265
5887 00:40:41.401920 00000000 # done.
5888 00:40:41.402000
5889 00:40:41.408640 Command line loaded dynamically from TFTP file: 14173469/tftp-deploy-jo3367m1/kernel/cmdline
5890 00:40:41.408727
5891 00:40:41.424692 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5892 00:40:41.424816
5893 00:40:41.428568 Loading FIT.
5894 00:40:41.428695
5895 00:40:41.431247 Image ramdisk-1 has 60998763 bytes.
5896 00:40:41.431434
5897 00:40:41.431557 Image fdt-1 has 57695 bytes.
5898 00:40:41.431661
5899 00:40:41.434540 Image kernel-1 has 13059919 bytes.
5900 00:40:41.434738
5901 00:40:41.444998 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5902 00:40:41.445187
5903 00:40:41.454945 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5904 00:40:41.458530
5905 00:40:41.461605 Choosing best match conf-1 for compat google,juniper-sku16.
5906 00:40:41.466136
5907 00:40:41.470500 Connected to device vid:did:rid of 1ae0:0028:00
5908 00:40:41.477797
5909 00:40:41.481411 tpm_get_response: command 0x17b, return code 0x0
5910 00:40:41.481863
5911 00:40:41.484433 tpm_cleanup: add release locality here.
5912 00:40:41.484859
5913 00:40:41.487861 Shutting down all USB controllers.
5914 00:40:41.488288
5915 00:40:41.491133 Removing current net device
5916 00:40:41.491614
5917 00:40:41.494505 Exiting depthcharge with code 4 at timestamp: 54615740
5918 00:40:41.494935
5919 00:40:41.497643 LZMA decompressing kernel-1 to 0x80193568
5920 00:40:41.498071
5921 00:40:41.504729 LZMA decompressing kernel-1 to 0x40000000
5922 00:40:43.359730
5923 00:40:43.360226 jumping to kernel
5924 00:40:43.362147 end: 2.2.4 bootloader-commands (duration 00:00:39) [common]
5925 00:40:43.362635 start: 2.2.5 auto-login-action (timeout 00:03:46) [common]
5926 00:40:43.363011 Setting prompt string to ['Linux version [0-9]']
5927 00:40:43.363349 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5928 00:40:43.363829 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5929 00:40:43.434838
5930 00:40:43.438323 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5931 00:40:43.442011 start: 2.2.5.1 login-action (timeout 00:03:46) [common]
5932 00:40:43.442491 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5933 00:40:43.442864 Setting prompt string to []
5934 00:40:43.443246 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5935 00:40:43.443670 Using line separator: #'\n'#
5936 00:40:43.444140 No login prompt set.
5937 00:40:43.444510 Parsing kernel messages
5938 00:40:43.444821 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5939 00:40:43.445347 [login-action] Waiting for messages, (timeout 00:03:46)
5940 00:40:43.445690 Waiting using forced prompt support (timeout 00:01:53)
5941 00:40:43.461409 [ 0.000000] Linux version 6.1.92-cip22-rt12 (KernelCI@build-j217237-arm64-gcc-10-defconfig-arm64-chromebook-pmq2q) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Wed Jun 5 00:22:12 UTC 2024
5942 00:40:43.464812 [ 0.000000] random: crng init done
5943 00:40:43.471665 [ 0.000000] Machine model: Google juniper sku16 board
5944 00:40:43.475036 [ 0.000000] efi: UEFI not found.
5945 00:40:43.481713 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5946 00:40:43.491539 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5947 00:40:43.498482 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5948 00:40:43.501365 [ 0.000000] printk: bootconsole [mtk8250] enabled
5949 00:40:43.510521 [ 0.000000] NUMA: No NUMA configuration found
5950 00:40:43.516998 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5951 00:40:43.523941 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5952 00:40:43.524394 [ 0.000000] Zone ranges:
5953 00:40:43.530665 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5954 00:40:43.533646 [ 0.000000] DMA32 empty
5955 00:40:43.539989 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5956 00:40:43.543671 [ 0.000000] Movable zone start for each node
5957 00:40:43.546905 [ 0.000000] Early memory node ranges
5958 00:40:43.553468 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5959 00:40:43.560035 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5960 00:40:43.566700 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5961 00:40:43.573593 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5962 00:40:43.580435 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5963 00:40:43.586513 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5964 00:40:43.602494 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5965 00:40:43.609183 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5966 00:40:43.616349 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5967 00:40:43.619287 [ 0.000000] psci: probing for conduit method from DT.
5968 00:40:43.625667 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5969 00:40:43.629317 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5970 00:40:43.635719 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5971 00:40:43.639221 [ 0.000000] psci: SMC Calling Convention v1.1
5972 00:40:43.645409 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5973 00:40:43.649221 [ 0.000000] Detected VIPT I-cache on CPU0
5974 00:40:43.655626 [ 0.000000] CPU features: detected: GIC system register CPU interface
5975 00:40:43.662409 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5976 00:40:43.669196 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5977 00:40:43.675769 [ 0.000000] CPU features: detected: ARM erratum 845719
5978 00:40:43.679058 [ 0.000000] alternatives: applying boot alternatives
5979 00:40:43.682337 [ 0.000000] Fallback order for Node 0: 0
5980 00:40:43.689342 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5981 00:40:43.692367 [ 0.000000] Policy zone: Normal
5982 00:40:43.712005 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5983 00:40:43.725594 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5984 00:40:43.732194 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5985 00:40:43.741761 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5986 00:40:43.748964 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5987 00:40:43.751723 <6>[ 0.000000] software IO TLB: area num 8.
5988 00:40:43.777034 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5989 00:40:43.835130 <6>[ 0.000000] Memory: 3855636K/4191232K available (18112K kernel code, 4120K rwdata, 22504K rodata, 8512K init, 616K bss, 302828K reserved, 32768K cma-reserved)
5990 00:40:43.841598 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5991 00:40:43.848392 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5992 00:40:43.851845 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5993 00:40:43.858631 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5994 00:40:43.864936 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5995 00:40:43.868171 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5996 00:40:43.878603 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5997 00:40:43.885003 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5998 00:40:43.891676 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5999 00:40:43.901736 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
6000 00:40:43.904860 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
6001 00:40:43.908137 <6>[ 0.000000] GICv3: 640 SPIs implemented
6002 00:40:43.914748 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
6003 00:40:43.918131 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
6004 00:40:43.921256 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
6005 00:40:43.931297 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
6006 00:40:43.941276 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
6007 00:40:43.954241 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
6008 00:40:43.961485 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
6009 00:40:43.972114 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
6010 00:40:43.985337 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
6011 00:40:43.991956 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
6012 00:40:43.998898 <6>[ 0.009478] Console: colour dummy device 80x25
6013 00:40:44.002377 <6>[ 0.014503] printk: console [tty1] enabled
6014 00:40:44.012455 <6>[ 0.018891] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
6015 00:40:44.018775 <6>[ 0.029356] pid_max: default: 32768 minimum: 301
6016 00:40:44.022391 <6>[ 0.034237] LSM: Security Framework initializing
6017 00:40:44.031885 <6>[ 0.039150] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
6018 00:40:44.038789 <6>[ 0.046773] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
6019 00:40:44.045199 <4>[ 0.055640] cacheinfo: Unable to detect cache hierarchy for CPU 0
6020 00:40:44.055149 <6>[ 0.062265] cblist_init_generic: Setting adjustable number of callback queues.
6021 00:40:44.061905 <6>[ 0.069711] cblist_init_generic: Setting shift to 3 and lim to 1.
6022 00:40:44.068310 <6>[ 0.076065] cblist_init_generic: Setting adjustable number of callback queues.
6023 00:40:44.075072 <6>[ 0.083509] cblist_init_generic: Setting shift to 3 and lim to 1.
6024 00:40:44.083510 <6>[ 0.089971] printk: bootconsole [mtk8250] printing thread started
6025 00:40:44.090015 <6>[ 0.089986] rcu: Hierarchical SRCU implementation.
6026 00:40:44.096458 <6>[ 0.089988] rcu: Max phase no-delay instances is 1000.
6027 00:40:44.100080 <6>[ 0.090017] printk: console [tty1] printing thread started
6028 00:40:44.106458 <6>[ 0.092487] EFI services will not be available.
6029 00:40:44.109711 <6>[ 0.092670] smp: Bringing up secondary CPUs ...
6030 00:40:44.113832 <6>[ 0.093204] Detected VIPT I-cache on CPU1
6031 00:40:44.120189 <4>[ 0.093250] cacheinfo: Unable to detect cache hierarchy for CPU 1
6032 00:40:44.126508 <6>[ 0.093257] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
6033 00:40:44.133252 <6>[ 0.093289] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
6034 00:40:44.139963 <6>[ 0.093773] Detected VIPT I-cache on CPU2
6035 00:40:44.146556 <4>[ 0.093804] cacheinfo: Unable to detect cache hierarchy for CPU 2
6036 00:40:44.152869 <6>[ 0.093809] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
6037 00:40:44.159534 <6>[ 0.093820] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
6038 00:40:44.167623 <6>[ 0.174999] Detected VIPT I-cache on CPU3
6039 00:40:44.174461 <4>[ 0.175030] cacheinfo: Unable to detect cache hierarchy for CPU 3
6040 00:40:44.181301 <6>[ 0.175034] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
6041 00:40:44.187736 <6>[ 0.175044] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
6042 00:40:44.194276 <6>[ 0.175620] CPU features: detected: Spectre-v2
6043 00:40:44.197576 <6>[ 0.175630] CPU features: detected: Spectre-BHB
6044 00:40:44.204135 <6>[ 0.175633] CPU features: detected: ARM erratum 858921
6045 00:40:44.207693 <6>[ 0.175638] Detected VIPT I-cache on CPU4
6046 00:40:44.214175 <4>[ 0.175685] cacheinfo: Unable to detect cache hierarchy for CPU 4
6047 00:40:44.221183 <6>[ 0.175692] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
6048 00:40:44.228027 <6>[ 0.175700] arch_timer: Enabling local workaround for ARM erratum 858921
6049 00:40:44.233916 <6>[ 0.175710] arch_timer: CPU4: Trapping CNTVCT access
6050 00:40:44.241086 <6>[ 0.175718] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
6051 00:40:44.244003 <6>[ 0.176206] Detected VIPT I-cache on CPU5
6052 00:40:44.251041 <4>[ 0.176246] cacheinfo: Unable to detect cache hierarchy for CPU 5
6053 00:40:44.257566 <6>[ 0.176251] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
6054 00:40:44.269304 <6>[ 0.176258] arch_timer: Enabling local workaround for ARM erratum 858921
6055 00:40:44.273070 <6>[ 0.176264] arch_timer: CPU5: Trapping CNTVCT access
6056 00:40:44.278943 <6>[ 0.176269] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
6057 00:40:44.282388 <6>[ 0.176706] Detected VIPT I-cache on CPU6
6058 00:40:44.289260 <4>[ 0.176751] cacheinfo: Unable to detect cache hierarchy for CPU 6
6059 00:40:44.298903 <6>[ 0.176756] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6060 00:40:44.305889 <6>[ 0.176763] arch_timer: Enabling local workaround for ARM erratum 858921
6061 00:40:44.308873 <6>[ 0.176769] arch_timer: CPU6: Trapping CNTVCT access
6062 00:40:44.315332 <6>[ 0.176774] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6063 00:40:44.319017 <6>[ 0.177307] Detected VIPT I-cache on CPU7
6064 00:40:44.325571 <4>[ 0.177350] cacheinfo: Unable to detect cache hierarchy for CPU 7
6065 00:40:44.335536 <6>[ 0.177356] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6066 00:40:44.342332 <6>[ 0.177363] arch_timer: Enabling local workaround for ARM erratum 858921
6067 00:40:44.345686 <6>[ 0.177369] arch_timer: CPU7: Trapping CNTVCT access
6068 00:40:44.351840 <6>[ 0.177374] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6069 00:40:44.358796 <6>[ 0.177421] smp: Brought up 1 node, 8 CPUs
6070 00:40:44.361954 <6>[ 0.177425] SMP: Total of 8 processors activated.
6071 00:40:44.368887 <6>[ 0.177428] CPU features: detected: 32-bit EL0 Support
6072 00:40:44.392555 <6>[ 0.403194] printk: consol<e [ttyS0] printing thread started
6073 00:40:44.399082 6>[ 0.177430] CPU features: detected: 32-bit EL1 Support
6074 00:40:44.407456 <6>[ 0.403203] printk: console [ttyS0] enabled
6075 00:40:44.410625 <6>[ 0.403207] printk: bootconsole [mtk8250] disabled
6076 00:40:44.417255 <6>[ 0.414448] printk: bootconsole [mtk8250] printing thread stopped
6077 00:40:44.427084 <3>[ 0.414886] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6078 00:40:44.433944 <3>[ 0.414892] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6079 00:40:44.443843 <6>[ 0.435244] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6080 00:40:44.450686 <6>[ 0.435407] serial serial0: tty port ttyS1 registered
6081 00:40:44.453756 <6>[ 0.436637] SuperH (H)SCI(F) driver initialized
6082 00:40:44.456958 <6>[ 0.437248] msm_serial: driver initialized
6083 00:40:44.472917 <6>[ 0.443079] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6084 00:40:44.478633 <6>[ 0.443116] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6085 00:40:44.491719 <6>[ 0.443142] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6086 00:40:44.492140 <6>[ 0.443166] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6087 00:40:44.508295 <6>[ 0.443190] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6088 00:40:44.513013 <6>[ 0.443223] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6089 00:40:44.518724 <6>[ 0.443247] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6090 00:40:44.530094 <6>[ 0.443272] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6091 00:40:44.536974 <6>[ 0.443296] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6092 00:40:44.543211 <6>[ 0.443369] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6093 00:40:44.550360 <4>[ 0.450029] cacheinfo: Unable to detect cache hierarchy for CPU 0
6094 00:40:44.553644 <6>[ 0.452976] loop: module loaded
6095 00:40:44.560069 <6>[ 0.461485] vsim1: Bringing 1800000uV into 2700000-2700000uV
6096 00:40:44.563464 <6>[ 0.473497] megasas: 07.719.03.00-rc1
6097 00:40:44.569901 <6>[ 0.478252] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6098 00:40:44.576502 <6>[ 0.481288] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6099 00:40:44.583216 <6>[ 0.493428] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6100 00:40:44.593087 <6>[ 0.547766] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6101 00:40:46.302996 <6>[ 2.312351] Freeing initrd memory: 59564K
6102 00:40:46.314580 <4>[ 2.319937] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6103 00:40:46.321364 <4>[ 2.319943] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22-rt12 #1
6104 00:40:46.328053 <4>[ 2.319950] Hardware name: Google juniper sku16 board (DT)
6105 00:40:46.331030 <4>[ 2.319953] Call trace:
6106 00:40:46.334677 <4>[ 2.319955] dump_backtrace.part.0+0xe0/0xf0
6107 00:40:46.337803 <4>[ 2.319972] show_stack+0x18/0x30
6108 00:40:46.344561 <4>[ 2.319978] dump_stack_lvl+0x68/0x84
6109 00:40:46.347888 <4>[ 2.319987] dump_stack+0x18/0x34
6110 00:40:46.351242 <4>[ 2.319992] sysfs_warn_dup+0x64/0x80
6111 00:40:46.354728 <4>[ 2.319998] sysfs_do_create_link_sd+0xf0/0x100
6112 00:40:46.358342 <4>[ 2.320001] sysfs_create_link+0x20/0x40
6113 00:40:46.362569 <4>[ 2.320005] bus_add_device+0x68/0x10c
6114 00:40:46.366836 <4>[ 2.320012] device_add+0x340/0x7ac
6115 00:40:46.370557 <4>[ 2.320016] of_device_add+0x44/0x60
6116 00:40:46.376967 <4>[ 2.320024] of_platform_device_create_pdata+0x90/0x120
6117 00:40:46.380230 <4>[ 2.320028] of_platform_bus_create+0x170/0x370
6118 00:40:46.386825 <4>[ 2.320032] of_platform_populate+0x50/0xfc
6119 00:40:46.390008 <4>[ 2.320036] parse_mtd_partitions+0x1dc/0x510
6120 00:40:46.396830 <4>[ 2.320042] mtd_device_parse_register+0xf8/0x2e0
6121 00:40:46.400462 <4>[ 2.320046] spi_nor_probe+0x21c/0x2f0
6122 00:40:46.403691 <4>[ 2.320052] spi_mem_probe+0x6c/0xb0
6123 00:40:46.406660 <4>[ 2.320059] spi_probe+0x84/0xe4
6124 00:40:46.410193 <4>[ 2.320062] really_probe+0xbc/0x2e0
6125 00:40:46.413564 <4>[ 2.320067] __driver_probe_device+0x78/0x11c
6126 00:40:46.420019 <4>[ 2.320072] driver_probe_device+0xd8/0x160
6127 00:40:46.423834 <4>[ 2.320077] __device_attach_driver+0xb8/0x134
6128 00:40:46.426980 <4>[ 2.320082] bus_for_each_drv+0x78/0xd0
6129 00:40:46.433468 <4>[ 2.320086] __device_attach+0xa8/0x1c0
6130 00:40:46.436517 <4>[ 2.320091] device_initial_probe+0x14/0x20
6131 00:40:46.440488 <4>[ 2.320096] bus_probe_device+0x9c/0xa4
6132 00:40:46.443150 <4>[ 2.320100] device_add+0x3ac/0x7ac
6133 00:40:46.449861 <4>[ 2.320104] __spi_add_device+0x78/0x120
6134 00:40:46.453422 <4>[ 2.320109] spi_add_device+0x40/0x7c
6135 00:40:46.456477 <4>[ 2.320114] spi_register_controller+0x610/0xad0
6136 00:40:46.463275 <4>[ 2.320119] devm_spi_register_controller+0x4c/0xa4
6137 00:40:46.466319 <4>[ 2.320125] mtk_spi_probe+0x3f8/0x650
6138 00:40:46.470023 <4>[ 2.320130] platform_probe+0x68/0xe0
6139 00:40:46.473479 <4>[ 2.320136] really_probe+0xbc/0x2e0
6140 00:40:46.479892 <4>[ 2.320141] __driver_probe_device+0x78/0x11c
6141 00:40:46.482953 <4>[ 2.320146] driver_probe_device+0xd8/0x160
6142 00:40:46.486449 <4>[ 2.320150] __driver_attach+0x94/0x19c
6143 00:40:46.492851 <4>[ 2.320155] bus_for_each_dev+0x70/0xd0
6144 00:40:46.496310 <4>[ 2.320159] driver_attach+0x24/0x30
6145 00:40:46.499902 <4>[ 2.320163] bus_add_driver+0x154/0x20c
6146 00:40:46.503101 <4>[ 2.320168] driver_register+0x78/0x130
6147 00:40:46.509664 <4>[ 2.320173] __platform_driver_register+0x28/0x34
6148 00:40:46.513149 <4>[ 2.320178] mtk_spi_driver_init+0x1c/0x28
6149 00:40:46.516847 <4>[ 2.320185] do_one_initcall+0x50/0x1d0
6150 00:40:46.523122 <4>[ 2.320190] kernel_init_freeable+0x21c/0x288
6151 00:40:46.526211 <4>[ 2.320196] kernel_init+0x24/0x12c
6152 00:40:46.529388 <4>[ 2.320202] ret_from_fork+0x10/0x20
6153 00:40:46.536053 <6>[ 2.325324] tun: Universal TUN/TAP device driver, 1.6
6154 00:40:46.539782 <6>[ 2.326282] thunder_xcv, ver 1.0
6155 00:40:46.542766 <6>[ 2.326306] thunder_bgx, ver 1.0
6156 00:40:46.546206 <6>[ 2.326323] nicpf, ver 1.0
6157 00:40:46.552588 <6>[ 2.327701] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6158 00:40:46.556456 <6>[ 2.327705] hns3: Copyright (c) 2017 Huawei Corporation.
6159 00:40:46.562367 <6>[ 2.327733] hclge is initializing
6160 00:40:46.565681 <6>[ 2.327746] e1000: Intel(R) PRO/1000 Network Driver
6161 00:40:46.572924 <6>[ 2.327748] e1000: Copyright (c) 1999-2006 Intel Corporation.
6162 00:40:46.576126 <6>[ 2.327768] e1000e: Intel(R) PRO/1000 Network Driver
6163 00:40:46.582726 <6>[ 2.327770] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6164 00:40:46.589166 <6>[ 2.327788] igb: Intel(R) Gigabit Ethernet Network Driver
6165 00:40:46.595889 <6>[ 2.327790] igb: Copyright (c) 2007-2014 Intel Corporation.
6166 00:40:46.602191 <6>[ 2.327809] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6167 00:40:46.609518 <6>[ 2.327811] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6168 00:40:46.612711 <6>[ 2.328175] sky2: driver version 1.30
6169 00:40:46.619303 <6>[ 2.329483] usbcore: registered new device driver r8152-cfgselector
6170 00:40:46.622735 <6>[ 2.329501] usbcore: registered new interface driver r8152
6171 00:40:46.629062 <6>[ 2.329588] VFIO - User Level meta-driver version: 0.3
6172 00:40:46.635851 <6>[ 2.331987] mtu3 11201000.usb: uwk - reg:0x420, version:101
6173 00:40:46.642661 <4>[ 2.332022] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6174 00:40:46.649275 <6>[ 2.332083] mtu3 11201000.usb: dr_mode: 1, drd: auto
6175 00:40:46.652371 <6>[ 2.332087] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6176 00:40:46.658885 <6>[ 2.332268] mtu3 11201000.usb: usb3-drd: 0
6177 00:40:46.665868 <6>[ 2.333442] mtu3 11201000.usb: xHCI platform device register success...
6178 00:40:46.672520 <4>[ 2.335223] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6179 00:40:46.678794 <6>[ 2.335574] xhci-mtk 11200000.usb: xHCI Host Controller
6180 00:40:46.685391 <6>[ 2.335587] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6181 00:40:46.691959 <6>[ 2.335651] xhci-mtk 11200000.usb: USB3 root hub has no ports
6182 00:40:46.701947 <6>[ 2.335656] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6183 00:40:46.705637 <6>[ 2.335694] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6184 00:40:46.712131 <6>[ 2.335775] xhci-mtk 11200000.usb: xHCI Host Controller
6185 00:40:46.718962 <6>[ 2.335782] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6186 00:40:46.725595 <6>[ 2.335788] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6187 00:40:46.732131 <6>[ 2.336075] hub 1-0:1.0: USB hub found
6188 00:40:46.735593 <6>[ 2.336098] hub 1-0:1.0: 1 port detected
6189 00:40:46.741919 <6>[ 2.337236] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6190 00:40:46.748610 <6>[ 2.337480] hub 2-0:1.0: USB hub found
6191 00:40:46.754995 <3>[ 2.337497] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6192 00:40:46.761928 <6>[ 2.337997] usbcore: registered new interface driver usb-storage
6193 00:40:46.768298 <6>[ 2.338305] usbcore: registered new device driver onboard-usb-hub
6194 00:40:46.775062 <4>[ 2.338607] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6195 00:40:46.781829 <6>[ 2.342111] mt6397-rtc mt6358-rtc: registered as rtc0
6196 00:40:46.788499 <6>[ 2.342265] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-05T00:39:49 UTC (1717547989)
6197 00:40:46.795614 <6>[ 2.343107] i2c_dev: i2c /dev entries driver
6198 00:40:46.801823 <6>[ 2.344937] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6199 00:40:47.342783 <6>[ 2.344984] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6200 00:40:47.349163 <6>[ 2.345015] i2c 4-0058: Fixed dependency cycle(s) with /panel
6201 00:40:47.356146 <6>[ 2.345042] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6202 00:40:47.362810 <3>[ 2.345547] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6203 00:40:47.372683 <6>[ 2.354668] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6204 00:40:47.376159 <6>[ 2.358037] cpu cpu0: EM: created perf domain
6205 00:40:47.389188 <6>[ 2.358872] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6206 00:40:47.392494 <6>[ 2.359095] cpu cpu4: EM: created perf domain
6207 00:40:47.398980 <6>[ 2.362617] sdhci: Secure Digital Host Controller Interface driver
6208 00:40:47.402567 <6>[ 2.362622] sdhci: Copyright(c) Pierre Ossman
6209 00:40:47.408959 <6>[ 2.363418] Synopsys Designware Multimedia Card Interface Driver
6210 00:40:47.415714 <6>[ 2.364038] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6211 00:40:47.422189 <6>[ 2.364471] sdhci-pltfm: SDHCI platform and OF driver helper
6212 00:40:47.428917 <6>[ 2.370928] ledtrig-cpu: registered to indicate activity on CPUs
6213 00:40:47.432556 <6>[ 2.372475] usbcore: registered new interface driver usbhid
6214 00:40:47.435667 <6>[ 2.372481] usbhid: USB HID core driver
6215 00:40:47.445563 <6>[ 2.372719] spi_master spi2: will run message pump with realtime priority
6216 00:40:47.451720 <4>[ 2.372850] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6217 00:40:47.458359 <4>[ 2.372960] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6218 00:40:47.471775 <6>[ 2.383831] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6219 00:40:47.484786 <6>[ 2.385660] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6220 00:40:47.491572 <6>[ 2.386535] cros-ec-spi spi2.0: Chrome EC device registered
6221 00:40:47.498413 <4>[ 2.430267] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6222 00:40:47.504905 <4>[ 2.438085] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6223 00:40:47.514574 <4>[ 2.441341] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6224 00:40:47.517950 <4>[ 2.441970] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6225 00:40:47.524737 <6>[ 2.446024] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6226 00:40:47.534614 <6>[ 2.450490] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6227 00:40:47.544404 <6>[ 2.455311] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6228 00:40:47.551279 <6>[ 2.457511] NET: Registered PF_PACKET protocol family
6229 00:40:47.554124 <6>[ 2.457617] 9pnet: Installing 9P2000 support
6230 00:40:47.560653 <5>[ 2.457658] Key type dns_resolver registered
6231 00:40:47.564482 <6>[ 2.458189] registered taskstats version 1
6232 00:40:47.570890 <5>[ 2.458203] Loading compiled-in X.509 certificates
6233 00:40:47.574236 <6>[ 2.459017] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6234 00:40:47.580623 <6>[ 2.460703] mmc0: new HS400 MMC card at address 0001
6235 00:40:47.583947 <6>[ 2.461669] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6236 00:40:47.590657 <6>[ 2.465602] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6237 00:40:47.597352 <6>[ 2.467234] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6238 00:40:47.600441 <6>[ 2.468885] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6239 00:40:47.607201 <6>[ 2.470159] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6240 00:40:47.617114 <3>[ 2.487917] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6241 00:40:47.627633 <4>[ 2.506012] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6242 00:40:47.637573 <6>[ 2.506654] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6243 00:40:47.647386 <6>[ 2.509377] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6244 00:40:47.660398 <3>[ 2.509910] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6245 00:40:47.673590 <6>[ 2.522038] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input3
6246 00:40:47.683629 <6>[ 2.522503] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6247 00:40:47.693828 <3>[ 2.545084] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6248 00:40:47.700375 <3>[ 2.545893] debugfs: File 'Playback' in directory 'dapm' already present!
6249 00:40:47.706980 <3>[ 2.545899] debugfs: File 'Capture' in directory 'dapm' already present!
6250 00:40:47.720045 <6>[ 2.549133] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input2
6251 00:40:47.726930 <6>[ 2.553311] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6252 00:40:47.737015 <6>[ 2.553337] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6253 00:40:47.743191 <6>[ 2.553343] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6254 00:40:47.753755 <6>[ 2.553349] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6255 00:40:47.760318 <6>[ 2.553356] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6256 00:40:47.770242 <6>[ 2.553362] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6257 00:40:47.779932 <6>[ 2.553368] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6258 00:40:47.786797 <6>[ 2.554205] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6259 00:40:47.793533 <6>[ 2.555449] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6260 00:40:47.796872 <6>[ 2.556306] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6261 00:40:47.803708 <6>[ 2.557052] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6262 00:40:47.809813 <6>[ 2.557773] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6263 00:40:47.816777 <6>[ 2.559851] panfrost 13040000.gpu: clock rate = 511999970
6264 00:40:47.826705 <6>[ 2.559878] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6265 00:40:47.833884 <6>[ 2.560336] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6266 00:40:47.843278 <6>[ 2.560342] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6267 00:40:47.856621 <6>[ 2.560346] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6268 00:40:47.863436 <6>[ 2.560353] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6269 00:40:47.869948 <6>[ 2.561810] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6270 00:40:47.879379 <6>[ 2.563416] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6271 00:40:47.886233 <6>[ 2.563444] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6272 00:40:47.896295 <6>[ 2.563451] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6273 00:40:47.906030 <6>[ 2.563459] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6274 00:40:47.915781 <6>[ 2.563467] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6275 00:40:47.925720 <6>[ 2.563474] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6276 00:40:47.935668 <6>[ 2.563482] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6277 00:40:47.942370 <6>[ 2.563489] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6278 00:40:47.952765 <6>[ 2.563497] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6279 00:40:47.962133 <6>[ 2.625357] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6280 00:40:47.972298 <6>[ 2.625543] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6281 00:40:47.978582 <6>[ 2.627579] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6282 00:40:47.985432 <6>[ 2.753863] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6283 00:40:47.992120 <6>[ 2.906383] hub 1-1:1.0: USB hub found
6284 00:40:47.995708 <6>[ 2.906912] hub 1-1:1.0: 3 ports detected
6285 00:40:48.001956 <6>[ 3.331988] Console: switching to colour frame buffer device 170x48
6286 00:40:48.008851 <6>[ 3.348529] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6287 00:40:48.018451 <6>[ 3.359091] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input5
6288 00:40:48.025289 <6>[ 3.359910] input: volume-buttons as /devices/platform/volume-buttons/input/input6
6289 00:40:48.031984 <6>[ 3.637884] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6290 00:40:48.041731 <6>[ 3.818194] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6291 00:40:48.048754 <4>[ 3.929423] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6292 00:40:48.058908 <4>[ 3.929447] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6293 00:40:48.061611 <6>[ 3.966874] r8152 1-1.2:1.0 eth0: v1.12.13
6294 00:40:48.068117 <6>[ 4.053872] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6295 00:40:49.547713 <6>[ 5.556834] r8152 1-1.2:1.0 eth0: carrier on
6296 00:40:52.155773 <5>[ 5.585885] Sending DHCP requests .., OK
6297 00:40:52.161966 <6>[ 8.161929] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6298 00:40:52.165321 <6>[ 8.161944] IP-Config: Complete:
6299 00:40:52.179183 <6>[ 8.161946] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6300 00:40:52.185214 <6>[ 8.161959] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6301 00:40:52.195383 <6>[ 8.161965] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6302 00:40:52.198628 <6>[ 8.161973] nameserver0=192.168.201.1
6303 00:40:52.205130 <6>[ 8.162246] clk: Disabling unused clocks
6304 00:40:52.208457 <6>[ 8.163209] ALSA device list:
6305 00:40:52.211634 <6>[ 8.163214] #0: mt8183_mt6358_ts3a227_max98357
6306 00:40:52.218252 <6>[ 8.170074] Freeing unused kernel memory: 8512K
6307 00:40:52.221826 <6>[ 8.170269] Run /init as init process
6308 00:40:52.228601 <6>[ 8.238118] NET: Registered PF_INET6 protocol family
6309 00:40:52.232011 <6>[ 8.239839] Segment Routing with IPv6
6310 00:40:52.238698 <6>[ 8.239856] In-situ OAM (IOAM) with IPv6
6311 00:40:52.251099
6312 00:40:52.283699 Welcome to [1<30>[ 8.264520] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6313 00:40:52.290899 mDebian GNU/Linu<30>[ 8.264551] systemd[1]: Detected architecture arm64.
6314 00:40:52.293947 x 12 (bookworm)[0m!
6315 00:40:52.294096
6316 00:40:52.310245 <30>[ 8.318385] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6317 00:40:52.511394 <30>[ 8.514078] systemd[1]: Queued start job for default target graphical.target.
6318 00:40:52.544017 [[0;32m OK [0m] Created slic<30>[ 8.547650] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6319 00:40:52.547293 e [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6320 00:40:52.572148 [[0;32m OK [0m] Created slice [0;1;39msyste<30>[ 8.575212] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6321 00:40:52.575289 m-modpr…lice[0m - Slice /system/modprobe.
6322 00:40:52.608653 [[0;32m OK [0m] Created slice [0;1;39msyste<30>[ 8.609070] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6323 00:40:52.611908 m-seria…[0m - Slice /system/serial-getty.
6324 00:40:52.635515 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Sli<30>[ 8.635417] systemd[1]: Created slice user.slice - User and Session Slice.
6325 00:40:52.636033 ce.
6326 00:40:52.655659 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6327 00:40:52.665929 <30>[ 8.662448] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6328 00:40:52.676130 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6329 00:40:52.686113 <30>[ 8.682959] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6330 00:40:52.693006 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6331 00:40:52.729465 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0<30>[ 8.702812] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6332 00:40:52.736264 <30>[ 8.702957] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6333 00:40:52.745718 <30>[ 8.718047] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6334 00:40:52.748968 m - Local Encrypted Volumes.
6335 00:40:52.769887 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protec<30>[ 8.769983] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6336 00:40:52.772826 ted Volumes.
6337 00:40:52.794167 [[0;32m OK [0m] Reached target [0;1;39mpath<30>[ 8.798092] systemd[1]: Reached target paths.target - Path Units.
6338 00:40:52.797289 s.target[0m - Path Units.
6339 00:40:52.818246 [[0;32m OK [0m] Reached target [0;1;39mremo<30>[ 8.822094] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6340 00:40:52.821253 te-fs.target[0m - Remote File Systems.
6341 00:40:52.842243 [[0;32m OK [0m] Reached target [0;1;39mslic<30>[ 8.846018] systemd[1]: Reached target slices.target - Slice Units.
6342 00:40:52.845099 es.target[0m - Slice Units.
6343 00:40:52.866248 [[0;32m OK [0m] Reached target [0;1;39mswap<30>[ 8.870099] systemd[1]: Reached target swap.target - Swaps.
6344 00:40:52.866345 .target[0m - Swaps.
6345 00:40:52.889971 [[0;32m OK [0m] Reached target [0;1;39mveri<30>[ 8.894108] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6346 00:40:52.896678 tysetup… - Local Verity Protected Volumes.
6347 00:40:52.918672 [[0;32m OK [0m] Listening on [0;1;39msystem<30>[ 8.922470] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6348 00:40:52.925516 d-initc… initctl Compatibility Named Pipe.
6349 00:40:52.947229 [[0;32m OK [0m] Listening on<30>[ 8.951593] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6350 00:40:52.953933 [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6351 00:40:52.978314 [[0;32m OK [0m] Listening on [0;1;39msystem<30>[ 8.978764] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6352 00:40:52.981413 d-journ…t[0m - Journal Socket (/dev/log).
6353 00:40:53.002618 [[0;32m OK [0m] Listening on [0;1;39msystem<30>[ 9.006665] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6354 00:40:53.005902 d-journald.socket[0m - Journal Socket.
6355 00:40:53.027159 [[0;32m OK [0m] Listening on [0;1;39msystem<30>[ 9.030847] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6356 00:40:53.033781 d-udevd….socket[0m - udev Control Socket.
6357 00:40:53.054591 [[0;32m OK [0m] Listening on [0;1;39msystem<30>[ 9.058533] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6358 00:40:53.061066 d-udevd…l.socket[0m - udev Kernel Socket.
6359 00:40:53.106462 Mounting [0;1;39mdev-hugepages.mount[<30>[ 9.110250] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6360 00:40:53.109643 0m - Huge Pages File System...
6361 00:40:53.127055 Mounting [0;1;39mdev-mqueue.mount…P<30>[ 9.130571] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6362 00:40:53.129840 OSIX Message Queue File System...
6363 00:40:53.159821 Mounting [0;1;39msys-k<30>[ 9.163626] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6364 00:40:53.162940 ernel-debug.…[0m - Kernel Debug File System...
6365 00:40:53.193103 <30>[ 9.190807] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6366 00:40:53.203078 <30>[ 9.205940] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6367 00:40:53.209508 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6368 00:40:53.271206 Starting [0;1;39mmodprobe@configfs…m<30>[ 9.274536] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6369 00:40:53.274238 - Load Kernel Module configfs...
6370 00:40:53.304776 Starting [0;1;39mmodpr<30>[ 9.308120] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6371 00:40:53.314188 obe@dm_mod.s…[0m - Load Kernel<6>[ 9.320839] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6372 00:40:53.317629 Module dm_mod...
6373 00:40:53.366583 Starting [0;1;39mmodpr<30>[ 9.370546] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6374 00:40:53.370357 obe@drm.service[0m - Load Kernel Module drm...
6375 00:40:53.396941 <30>[ 9.403957] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6376 00:40:53.403053 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6377 00:40:53.432746 Starting [0;1;39mmodpr<30>[ 9.436210] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6378 00:40:53.435814 obe@loop.ser…e[0m - Load Kernel Module loop...
6379 00:40:53.487110 Starting [0;1;39msystemd-journald.serv<30>[ 9.490676] systemd[1]: Starting systemd-journald.service - Journal Service...
6380 00:40:53.490491 ice[0m - Journal Service...
6381 00:40:53.514193 Starting [0;1;39msystemd-modules-l…r<30>[ 9.518173] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6382 00:40:53.517617 vice[0m - Load Kernel Modules...
6383 00:40:53.541384 Startin<30>[ 9.545364] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6384 00:40:53.548017 g [0;1;39msystemd-network-g… units from Kernel command line...
6385 00:40:53.573503 Startin<30>[ 9.577596] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6386 00:40:53.579945 g [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6387 00:40:53.605705 Startin<30>[ 9.609449] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6388 00:40:53.608822 g [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6389 00:40:53.630630 [[0;32m OK [<30>[ 9.637583] systemd[1]: Started systemd-journald.service - Journal Service.
6390 00:40:53.637179 0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6391 00:40:53.657503 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6392 00:40:53.675957 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6393 00:40:53.695889 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6394 00:40:53.712608 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6395 00:40:53.733632 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6396 00:40:53.753908 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6397 00:40:53.773907 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6398 00:40:53.793129 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6399 00:40:53.813389 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6400 00:40:53.832795 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6401 00:40:53.852394 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6402 00:40:53.873879 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6403 00:40:53.924308 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6404 00:40:53.951828 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6405 00:40:53.984597 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6406 00:40:54.000506 See 'systemctl status systemd-remount-fs.service' for details.
6407 00:40:54.025684 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6408 00:40:54.044002 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6409 00:40:54.064079 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6410 00:40:54.124327 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6411 00:40:54.150263 Startin<46>[ 10.147888] systemd-journald[204]: Received client request to flush runtime journal.
6412 00:40:54.156544 g [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6413 00:40:54.181088 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6414 00:40:54.203832 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6415 00:40:54.226252 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6416 00:40:54.248733 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6417 00:40:54.296063 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6418 00:40:54.331477 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6419 00:40:54.348193 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6420 00:40:54.367397 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6421 00:40:54.408179 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6422 00:40:54.433255 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6423 00:40:54.455923 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6424 00:40:54.483998 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6425 00:40:54.506315 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6426 00:40:54.524030 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6427 00:40:54.560955 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6428 00:40:54.587764 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6429 00:40:54.608666 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6430 00:40:54.730571 <3>[ 10.734833] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6431 00:40:54.740754 <3>[ 10.734847] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6432 00:40:54.750482 <3>[ 10.734853] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6433 00:40:54.757401 <3>[ 10.734858] elan_i2c 2-0015: Error applying setting, reverse things back
6434 00:40:54.763397 <3>[ 10.754959] mtk-scp 10500000.scp: invalid resource
6435 00:40:54.770783 <6>[ 10.755048] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6436 00:40:54.773353 <3>[ 10.757699] thermal_sys: Failed to find 'trips' node
6437 00:40:54.783964 <3>[ 10.757706] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6438 00:40:54.790456 <3>[ 10.757713] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6439 00:40:54.797115 <4>[ 10.757717] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6440 00:40:54.803287 <3>[ 10.760331] thermal_sys: Failed to find 'trips' node
6441 00:40:54.810393 <3>[ 10.760338] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6442 00:40:54.820205 <3>[ 10.760347] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6443 00:40:54.827155 <4>[ 10.760350] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6444 00:40:54.833744 <6>[ 10.769649] remoteproc remoteproc0: scp is available
6445 00:40:54.840434 <4>[ 10.769752] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6446 00:40:54.846833 <6>[ 10.769758] remoteproc remoteproc0: powering up scp
6447 00:40:54.853372 <4>[ 10.769774] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6448 00:40:54.859667 <3>[ 10.769778] remoteproc remoteproc0: request_firmware failed: -2
6449 00:40:54.870148 <3>[ 10.773584] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6450 00:40:54.876688 <3>[ 10.773603] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6451 00:40:54.886366 <3>[ 10.773612] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6452 00:40:54.893875 <3>[ 10.798383] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6453 00:40:54.903452 <3>[ 10.798419] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6454 00:40:54.910281 <3>[ 10.798428] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6455 00:40:54.920263 <3>[ 10.798439] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6456 00:40:54.926816 <3>[ 10.798447] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6457 00:40:54.936967 <3>[ 10.800175] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6458 00:40:54.943642 <4>[ 10.806980] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6459 00:40:54.950259 <4>[ 10.809297] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6460 00:40:54.957026 <6>[ 10.867683] mc: Linux media interface: v0.10
6461 00:40:54.963444 <6>[ 10.890742] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6462 00:40:54.974298 <5>[ 10.917870] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6463 00:40:54.977736 <6>[ 10.925369] videodev: Linux video capture interface: v2.00
6464 00:40:54.984270 <6>[ 10.928884] cs_system_cfg: CoreSight Configuration manager initialised
6465 00:40:54.991360 <5>[ 10.933443] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6466 00:40:55.000836 <5>[ 10.933967] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6467 00:40:55.013799 [[0;32m OK [0m] Created slice [0;1;39msyste<4>[ 10.934061] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6468 00:40:55.020251 m-syste…- Slic<6>[ 10.934072] cfg80211: failed to load regulatory.db
6469 00:40:55.030259 e /system/system<6>[ 10.943030] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6470 00:40:55.033459 d-backlight.
6471 00:40:55.036795 <6>[ 10.960968] Bluetooth: Core ver 2.22
6472 00:40:55.043433 <6>[ 10.961035] NET: Registered PF_BLUETOOTH protocol family
6473 00:40:55.050169 <6>[ 10.961038] Bluetooth: HCI device and connection manager initialized
6474 00:40:55.053402 <6>[ 10.961055] Bluetooth: HCI socket layer initialized
6475 00:40:55.060159 <6>[ 10.961062] Bluetooth: L2CAP socket layer initialized
6476 00:40:55.063970 <6>[ 10.961077] Bluetooth: SCO socket layer initialized
6477 00:40:55.073139 <6>[ 10.961373] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6478 00:40:55.079796 <6>[ 10.961624] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6479 00:40:55.087282 <6>[ 10.961738] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6480 00:40:55.097418 <6>[ 10.961823] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6481 00:40:55.103568 <6>[ 10.961914] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6482 00:40:55.114074 <6>[ 10.961991] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6483 00:40:55.120998 <6>[ 10.967306] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6484 00:40:55.127153 <6>[ 10.967662] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6485 00:40:55.150628 <46>[ 11.011071] systemd-journald[204]: Data hash table of /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal has a fill level at 75.1 (1537 of 2047 items, 524288 file size, 341 bytes per hash table item), suggesting rotation.
6486 00:40:55.163884 <46>[ 11.011091] systemd-journald[204]: /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal: Journal header limits reached or header out-of-date, rotating.
6487 00:40:55.167046 <6>[ 11.016543] Bluetooth: HCI UART driver ver 2.3
6488 00:40:55.177130 [[0;32m OK [<6>[ 11.016552] Bluetooth: HCI UART protocol H4 registered
6489 00:40:55.180671 <6>[ 11.016615] Bluetooth: HCI UART protocol LL registered
6490 00:40:55.186996 <6>[ 11.016679] Bluetooth: HCI UART protocol Three-wire (H5) registered
6491 00:40:55.193852 <6>[ 11.017053] Bluetooth: HCI UART protocol Broadcom registered
6492 00:40:55.198126 <6>[ 11.017080] Bluetooth: HCI UART protocol QCA registered
6493 00:40:55.204358 <6>[ 11.017094] Bluetooth: HCI UART protocol Marvell registered
6494 00:40:55.211296 <6>[ 11.017978] Bluetooth: hci0: setting up ROME/QCA6390
6495 00:40:55.217536 <6>[ 11.018001] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6496 00:40:55.221274 <6>[ 11.018262] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6497 00:40:55.231826 <6>[ 11.018613] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6498 00:40:55.238629 0m] Reached targ<6>[ 11.019133] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6499 00:40:55.250451 et [0;1;39msoun<6>[ 11.021647] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6500 00:40:55.261886 d.target[0m - S<6>[ 11.037872] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6501 00:40:55.262481 ound Card.
6502 00:40:55.270081 <6>[ 11.038007] usbcore: registered new interface driver uvcvideo
6503 00:40:55.278427 <6>[ 11.073550] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6504 00:40:55.286178 <6>[ 11.073559] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6505 00:40:55.301273 [[0;32m OK [0m] Reached targ<6>[ 11.073654] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6506 00:40:55.312211 et [0;1;39mtime<6>[ 11.222381] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6507 00:40:55.316407 <3>[ 11.237532] Bluetooth: hci0: Frame reassembly failed (-84)
6508 00:40:55.327273 -set.target[0m <4>[ 11.245307] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6509 00:40:55.331012 <4>[ 11.245307] Fallback method does not support PEC.
6510 00:40:55.341043 - System Time Se<3>[ 11.248808] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6511 00:40:55.341598 t.
6512 00:40:55.350449 <3>[ 11.258649] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6513 00:40:55.357086 <3>[ 11.259259] power_supply sbs-12-000b: driver failed to report `health' property: -6
6514 00:40:55.363665 <3>[ 11.264753] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6515 00:40:55.373406 [[0;32m OK [<3>[ 11.270287] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6516 00:40:55.383958 0m] Listening on<3>[ 11.275809] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6517 00:40:55.393904 [0;1;39msystem<3>[ 11.281611] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6518 00:40:55.403895 d-rfkil…l Swit<3>[ 11.287125] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6519 00:40:55.413480 ch Status /dev/r<3>[ 11.293630] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6520 00:40:55.413903 fkill Watch.
6521 00:40:55.423185 <3>[ 11.299133] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6522 00:40:55.484920 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6523 00:40:55.511440 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6524 00:40:55.529681 <6>[ 11.537353] Bluetooth: hci0: QCA Product ID :0x00000008
6525 00:40:55.536507 <6>[ 11.537371] Bluetooth: hci0: QCA SOC Version :0x00000044
6526 00:40:55.542846 <6>[ 11.537376] Bluetooth: hci0: QCA ROM Version :0x00000302
6527 00:40:55.546709 <6>[ 11.537382] Bluetooth: hci0: QCA Patch Version:0x00000111
6528 00:40:55.553150 <6>[ 11.537391] Bluetooth: hci0: QCA controller version 0x00440302
6529 00:40:55.562996 [[0;32m OK [<6>[ 11.537399] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6530 00:40:55.572769 <4>[ 11.537518] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6531 00:40:55.579910 <3>[ 11.537533] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6532 00:40:55.586202 0m] Reached targ<3>[ 11.537540] Bluetooth: hci0: QCA Failed to download patch (-2)
6533 00:40:55.599003 et [0;1;39mblue<6>[ 11.571947] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6534 00:40:55.602529 tooth.target[0m - Bluetooth Support.
6535 00:40:55.622630 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6536 00:40:55.644230 [[0;32m OK [0m] Started [0;<4>[ 11.651148] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6537 00:40:55.653956 1;39mfstrim.time<4>[ 11.659353] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6538 00:40:55.663521 r[0m - Discard <4>[ 11.662605] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6539 00:40:55.670381 <4>[ 11.663260] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6540 00:40:55.670827 unused blocks once a week.
6541 00:40:55.692118 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6542 00:40:55.711839 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6543 00:40:55.728416 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6544 00:40:55.744853 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6545 00:40:55.764537 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6546 00:40:55.805078 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6547 00:40:55.830150 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6548 00:40:55.855597 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6549 00:40:55.898251 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6550 00:40:55.919178 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6551 00:40:55.950060 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6552 00:40:55.973363 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6553 00:40:56.045496 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6554 00:40:56.085829 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6555 00:40:56.105500 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6556 00:40:56.121896 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6557 00:40:56.143891 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6558 00:40:56.162232 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6559 00:40:56.211718 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6560 00:40:56.246477 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6561 00:40:56.294572
6562 00:40:56.297914 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6563 00:40:56.298385
6564 00:40:56.301126 debian-bookworm-arm64 login: root (automatic login)
6565 00:40:56.301567
6566 00:40:56.325117 Linux debian-bookworm-arm64 6.1.92-cip22-rt12 #1 SMP PREEMPT Wed Jun 5 00:22:12 UTC 2024 aarch64
6567 00:40:56.325617
6568 00:40:56.331798 The programs included with the Debian GNU/Linux system are free software;
6569 00:40:56.338365 the exact distribution terms for each program are described in the
6570 00:40:56.342122 individual files in /usr/share/doc/*/copyright.
6571 00:40:56.342662
6572 00:40:56.348837 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6573 00:40:56.351800 permitted by applicable law.
6574 00:40:56.353127 Matched prompt #10: / #
6576 00:40:56.354134 Setting prompt string to ['/ #']
6577 00:40:56.354563 end: 2.2.5.1 login-action (duration 00:00:13) [common]
6579 00:40:56.355591 end: 2.2.5 auto-login-action (duration 00:00:13) [common]
6580 00:40:56.356068 start: 2.2.6 expect-shell-connection (timeout 00:03:33) [common]
6581 00:40:56.356443 Setting prompt string to ['/ #']
6582 00:40:56.356758 Forcing a shell prompt, looking for ['/ #']
6584 00:40:56.407537 / #
6585 00:40:56.408071 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6586 00:40:56.408459 Waiting using forced prompt support (timeout 00:02:30)
6587 00:40:56.413121
6588 00:40:56.414040 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6589 00:40:56.414574 start: 2.2.7 export-device-env (timeout 00:03:33) [common]
6590 00:40:56.415102 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6591 00:40:56.415648 end: 2.2 depthcharge-retry (duration 00:01:27) [common]
6592 00:40:56.416141 end: 2 depthcharge-action (duration 00:01:27) [common]
6593 00:40:56.416639 start: 3 lava-test-retry (timeout 00:08:05) [common]
6594 00:40:56.417137 start: 3.1 lava-test-shell (timeout 00:08:05) [common]
6595 00:40:56.417520 Using namespace: common
6597 00:40:56.518881 / # #
6598 00:40:56.519451 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6599 00:40:56.525314 #
6600 00:40:56.526025 Using /lava-14173469
6602 00:40:56.626931 / # export SHELL=/bin/sh
6603 00:40:56.631934 export SHELL=/bin/sh
6605 00:40:56.733042 / # . /lava-14173469/environment
6606 00:40:56.739571 . /lava-14173469/environment
6608 00:40:56.841107 / # /lava-14173469/bin/lava-test-runner /lava-14173469/0
6609 00:40:56.841710 Test shell timeout: 10s (minimum of the action and connection timeout)
6610 00:40:56.847615 /lava-14173469/bin/lava-test-runner /lava-14173469/0
6611 00:40:56.872247 + export TESTRUN_ID=0_igt-gpu-panfrost
6612 00:40:56.882569 + cd /lava-14173469/0/tests/0_igt-gpu-panf<8>[ 12.885716] <LAVA_SIGNAL_STARTRUN 0_igt-gpu-panfrost 14173469_1.5.2.3.1>
6613 00:40:56.883194 rost
6614 00:40:56.883605 + cat uuid
6615 00:40:56.884239 Received signal: <STARTRUN> 0_igt-gpu-panfrost 14173469_1.5.2.3.1
6616 00:40:56.884888 Starting test lava.0_igt-gpu-panfrost (14173469_1.5.2.3.1)
6617 00:40:56.885407 Skipping test definition patterns.
6618 00:40:56.886042 + UUID=14173469_1.5.2.3.1
6619 00:40:56.886538 + set +x
6620 00:40:56.895445 + IGT_FORCE_DRIVER=panfrost /usr/bin/igt-parser.sh panfrost_gem_new panfrost_get_param panfrost_prime panfrost_submit
6621 00:40:56.912251 <8>[ 12.922420] <LAVA_SIGNAL_TESTSET START panfrost_gem_new>
6622 00:40:56.912930 Received signal: <TESTSET> START panfrost_gem_new
6623 00:40:56.913309 Starting test_set panfrost_gem_new
6624 00:40:56.932812 IGT-Version: 1.2<6>[ 12.939395] Console: switching to colour dummy device 80x25
6625 00:40:56.939325 8-ga44ebfe (aarc<14>[ 12.939465] [IGT] panfrost_gem_new: executing
6626 00:40:56.945961 h64) (Linux: 6.1<14>[ 12.939783] [IGT] panfrost_gem_new: starting subtest gem-new-4096
6627 00:40:56.952295 .92-cip22-rt12 a<14>[ 12.939990] [IGT] panfrost_gem_new: finished subtest gem-new-4096, SUCCESS
6628 00:40:56.955647 arch64)
6629 00:40:56.959148 Using IGT_SRANDOM=1717548000 for randomisation
6630 00:40:56.961901 Opened device: /dev/dri/card0
6631 00:40:56.965669 Starting subtest: gem-new-4096
6632 00:40:56.969078 [1mSubtest gem-new-4096: SUCCESS (0.000s)[0m
6633 00:40:57.004068 <14>[ 12.940418] [IGT] panfrost_gem_new: exiting, ret=0
6634 00:40:57.010591 <6>[ 12.997221] Console: switching to colour frame buffer device 170x48
6635 00:40:57.017853 <8>[ 13.021396] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-4096 RESULT=pass>
6636 00:40:57.018549 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-4096 RESULT=pass
6638 00:40:57.028239 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.92-cip22-rt12 aarch64)
6639 00:40:57.034668 Using IGT_SRANDOM=1717548000 for randomisation
6640 00:40:57.038015 Opened device: /dev/dri/card0
6641 00:40:57.038572 Starting subtest: gem-new-0
6642 00:40:57.044429 [1mSubtest gem-new-0: SUCCESS (0.000s)[0m
6643 00:40:57.073908 <6>[ 13.037786] Console: switching to colour dummy device 80x25
6644 00:40:57.080412 <14>[ 13.037854] [IGT] panfrost_gem_new: executing
6645 00:40:57.086932 <14>[ 13.038161] [IGT] panfrost_gem_new: starting subtest gem-new-0
6646 00:40:57.093249 <14>[ 13.038222] [IGT] panfrost_gem_new: finished subtest gem-new-0, SUCCESS
6647 00:40:57.096520 <14>[ 13.038610] [IGT] panfrost_gem_new: exiting, ret=0
6648 00:40:57.103475 <6>[ 13.066159] Console: switching to colour frame buffer device 170x48
6649 00:40:57.110181 <8>[ 13.092218] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-0 RESULT=pass>
6650 00:40:57.111060 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-0 RESULT=pass
6652 00:40:57.116858 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.92-cip22-rt12 aarch64)
6653 00:40:57.120074 Using IGT_SRANDOM=1717548000 for randomisation
6654 00:40:57.123608 Opened device: /dev/dri/card0
6655 00:40:57.126886 Starting subtest: gem-new-zeroed
6656 00:40:57.133202 [1mSubtest gem-new-zeroed: SUCCESS (0.001s)[0m
6657 00:40:57.174738 <6>[ 13.125858] Console: switching to colour dummy device 80x25
6658 00:40:57.181060 <14>[ 13.125934] [IGT] panfrost_gem_new: executing
6659 00:40:57.187766 <14>[ 13.126259] [IGT] panfrost_gem_new: starting subtest gem-new-zeroed
6660 00:40:57.194343 <14>[ 13.127510] [IGT] panfrost_gem_new: finished subtest gem-new-zeroed, SUCCESS
6661 00:40:57.198727 <14>[ 13.127574] [IGT] panfrost_gem_new: exiting, ret=0
6662 00:40:57.203831 <6>[ 13.163464] Console: switching to colour frame buffer device 170x48
6663 00:40:57.211160 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-zeroed RESULT=pass
6665 00:40:57.214049 <8>[ 13.190796] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-zeroed RESULT=pass>
6666 00:40:57.217656 <8>[ 13.193314] <LAVA_SIGNAL_TESTSET STOP>
6667 00:40:57.218361 Received signal: <TESTSET> STOP
6668 00:40:57.218756 Closing test_set panfrost_gem_new
6669 00:40:57.220841 <8>[ 13.226118] <LAVA_SIGNAL_TESTSET START panfrost_get_param>
6670 00:40:57.221521 Received signal: <TESTSET> START panfrost_get_param
6671 00:40:57.221873 Starting test_set panfrost_get_param
6672 00:40:57.233417 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.92-cip22-rt12 aarch64)
6673 00:40:57.240319 Using IGT_SRANDOM=1717548000 for randomisation
6674 00:40:57.243660 Opened device: /dev/dri/card0
6675 00:40:57.244190 Starting subtest: base-params
6676 00:40:57.249803 [1mSubtest base-params: SUCCESS (0.000s)[0m
6677 00:40:57.291677 <6>[ 13.243327] Console: switching to colour dummy device 80x25
6678 00:40:57.298187 <14>[ 13.243394] [IGT] panfrost_get_param: executing
6679 00:40:57.302666 <14>[ 13.243690] [IGT] panfrost_get_param: starting subtest base-params
6680 00:40:57.312627 <14>[ 13.243758] [IGT] panfrost_get_param: finished subtest base-params, SUCCESS
6681 00:40:57.315896 <14>[ 13.244136] [IGT] panfrost_get_param: exiting, ret=0
6682 00:40:57.322382 <6>[ 13.282909] Console: switching to colour frame buffer device 170x48
6683 00:40:57.329221 <8>[ 13.307595] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=base-params RESULT=pass>
6684 00:40:57.329954 Received signal: <TESTCASE> TEST_CASE_ID=base-params RESULT=pass
6686 00:40:57.336067 IGT-Version: 1.2<6>[ 13.345117] Console: switching to colour dummy device 80x25
6687 00:40:57.342503 8-ga44ebfe (aarc<14>[ 13.345201] [IGT] panfrost_get_param: executing
6688 00:40:57.349135 h64) (Linux: 6.1.92-cip22-rt12 aarch64)
6689 00:40:57.352354 Using IGT_SRANDOM=1717548000 for randomisation
6690 00:40:57.355700 Opened device: /dev/dri/card0
6691 00:40:57.359102 Starting subtest: get-bad-param
6692 00:40:57.362160 [1mSubtest get-bad-param: SUCCESS (0.000s)[0m
6693 00:40:57.395094 <14>[ 13.345600] [IGT] panfrost_get_param: starting subtest get-bad-param
6694 00:40:57.401188 <14>[ 13.345672] [IGT] panfrost_get_param: finished subtest get-bad-param, SUCCESS
6695 00:40:57.404666 <14>[ 13.346101] [IGT] panfrost_get_param: exiting, ret=0
6696 00:40:57.411242 <6>[ 13.379690] Console: switching to colour frame buffer device 170x48
6697 00:40:57.418251 <8>[ 13.406727] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-param RESULT=pass>
6698 00:40:57.419107 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-param RESULT=pass
6700 00:40:57.428121 IGT-Version: 1.2<6>[ 13.434647] Console: switching to colour dummy device 80x25
6701 00:40:57.434523 8-ga44ebfe (aarc<14>[ 13.434786] [IGT] panfrost_get_param: executing
6702 00:40:57.437664 h64) (Linux: 6.1.92-cip22-rt12 aarch64)
6703 00:40:57.441622 Using IGT_SRANDOM=1717548000 for randomisation
6704 00:40:57.444603 Opened device: /dev/dri/card0
6705 00:40:57.448121 Starting subtest: get-bad-padding
6706 00:40:57.450931 [1mSubtest get-bad-padding: SUCCESS (0.000s)[0m
6707 00:40:57.489187 <14>[ 13.435117] [IGT] panfrost_get_param: starting subtest get-bad-padding
6708 00:40:57.495898 <14>[ 13.435171] [IGT] panfrost_get_param: finished subtest get-bad-padding, SUCCESS
6709 00:40:57.499124 <14>[ 13.435502] [IGT] panfrost_get_param: exiting, ret=0
6710 00:40:57.505193 <6>[ 13.478767] Console: switching to colour frame buffer device 170x48
6711 00:40:57.515875 <8>[ 13.502034] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-padding RESULT=pass>
6712 00:40:57.516612 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-padding RESULT=pass
6714 00:40:57.518519 <8>[ 13.504225] <LAVA_SIGNAL_TESTSET STOP>
6715 00:40:57.519342 Received signal: <TESTSET> STOP
6716 00:40:57.519762 Closing test_set panfrost_get_param
6717 00:40:57.522629 <8>[ 13.521769] <LAVA_SIGNAL_TESTSET START panfrost_prime>
6718 00:40:57.523519 Received signal: <TESTSET> START panfrost_prime
6719 00:40:57.523981 Starting test_set panfrost_prime
6720 00:40:57.532099 IGT-Version: 1.2<6>[ 13.538995] Console: switching to colour dummy device 80x25
6721 00:40:57.535559 8-ga44ebfe (aarc<14>[ 13.539063] [IGT] panfrost_prime: executing
6722 00:40:57.542792 h64) (Linux: 6.1.92-cip22-rt12 aarch64)
6723 00:40:57.545498 Using IGT_SRANDOM=1717548000 for randomisation
6724 00:40:57.552183 Opened device: /dev/dri<14>[ 13.560244] [IGT] panfrost_prime: starting subtest gem-prime-import
6725 00:40:57.555901 /card0
6726 00:40:57.558721 Starting subtest: gem-prime-import
6727 00:40:57.568497 (panfrost_prime:359) CRITICAL: Test assertion failur<14>[ 13.575919] [IGT] panfrost_prime: finished subtest gem-prime-import, FAIL
6728 00:40:57.575510 e function igt_h<14>[ 13.584553] [IGT] panfrost_prime: exiting, ret=98
6729 00:40:57.578566 as_dumb, file ../tests/panfrost_prime.c:44:
6730 00:40:57.589166 (panfrost_prime:359) CRITICAL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP
6731 00:40:57.595490 (panfrost_prime:359) CRITICAL: Last errno: 9, Bad file descriptor
6732 00:40:57.595949 Stack trace:
6733 00:40:57.601613 #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6734 00:40:57.602157 #1 [<unknown>+0xb2bd1358]
6735 00:40:57.604776 #2 [<unknown>+0xb2bd0f2c]
6736 00:40:57.608329 #3 [__libc_init_first+0x80]
6737 00:40:57.611373 #4 [__libc_start_main+0x98]
6738 00:40:57.615086 #5 [<unknown>+0xb2bd0f70]
6739 00:40:57.618097 Subtest gem-prime-import failed.
6740 00:40:57.624505 **** <6>[ 13.612177] Console: switching to colour frame buffer device 170x48
6741 00:40:57.625077 DEBUG ****
6742 00:40:57.631616 (pan<8>[ 13.635965] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-prime-import RESULT=fail>
6743 00:40:57.632450 Received signal: <TESTCASE> TEST_CASE_ID=gem-prime-import RESULT=fail
6745 00:40:57.638321 frost_prime:359)<8>[ 13.637710] <LAVA_SIGNAL_TESTSET STOP>
6746 00:40:57.639172 Received signal: <TESTSET> STOP
6747 00:40:57.639625 Closing test_set panfrost_prime
6748 00:40:57.644807 CRITICAL: Test assertion failure function igt_has_dumb, file ../tests/panfrost_prime.c:44:
6749 00:40:57.660990 (panfrost_prime:359) CRITICAL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP<8>[ 13.668812] <LAVA_SIGNAL_TESTSET START panfrost_submit>
6750 00:40:57.661635
6751 00:40:57.662341 Received signal: <TESTSET> START panfrost_submit
6752 00:40:57.662740 Starting test_set panfrost_submit
6753 00:40:57.667728 (panfrost_prime:359) CRITICAL: Last errno: 9, Bad file descriptor
6754 00:40:57.671071 (panfrost_prime:359) igt_core-INFO: Stack trace:
6755 00:40:57.677553 (panfrost_prime:359) igt_core-INFO: #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6756 00:40:57.684623 (panfrost_prime:359) igt_core-INFO: #1 [<unknown>+0xb2bd1358]
6757 00:40:57.691076 (panfrost_prime:359) igt_core-INFO: #2 [<unknown>+0xb2bd0f2c]
6758 00:40:57.694439 (panfrost_prime:359) igt_core-INFO: #3 [__libc_init_first+0x80]
6759 00:40:57.701516 (panfrost_prime:359) igt_core-INFO: #4 [__libc_start_main+0x98]
6760 00:40:57.707827 (panfrost_prime:359) igt_core-INFO: #5 [<unknown>+0xb2bd0f70]
6761 00:40:57.708293 **** END ****
6762 00:40:57.714824 [1mSubtest gem-prime-import: FAIL (0.016s)[0m
6763 00:40:57.728280 (panfrost_prime:359) drmtest-WARNING: Don't attempt to close standard/invalid file descri<6>[ 13.685976] Console: switching to colour dummy device 80x25
6764 00:40:57.730750 <14>[ 13.686051] [IGT] panfrost_submit: executing
6765 00:40:57.731326 ptor: -1
6766 00:40:57.737612 IGT-Ve<14>[ 13.686373] [IGT] panfrost_submit: starting subtest pan-submit
6767 00:40:57.744125 <14>[ 13.687024] [IGT] panfrost_submit: finished subtest pan-submit, SUCCESS
6768 00:40:57.750826 rsion: 1.28-ga44ebfe (aarch64) (Linux: 6.1.92-cip22-rt12 aarch64)
6769 00:40:57.757307 Using IGT_SRANDOM=1717548000 for randomisation
6770 00:40:57.757860 Opened device: /dev/dri/card0
6771 00:40:57.760770 Starting subtest: pan-submit
6772 00:40:57.764121 [1mSubtest pan-submit: SUCCESS (0.001s)[0m
6773 00:40:57.770693 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.92-cip22-rt12 aarch64)
6774 00:40:57.777260 Using IGT_SRANDOM=1717548000 for randomisation
6775 00:40:57.777812 Opened device: /dev/dri/card0
6776 00:40:57.780912 Starting subtest: pan-submit-error-no-jc
6777 00:40:57.787475 [1mSubtest pan-submit-error-no-jc: SUCCESS (0.000s)[0m
6778 00:40:57.805711 <14>[ 13.687132] [IGT] panfrost_submit: exiting, ret=0
6779 00:40:57.811999 <6>[ 13.712357] Console: switching to colour frame buffer device 170x48
6780 00:40:57.818590 <8>[ 13.740484] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit RESULT=pass>
6781 00:40:57.819278 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit RESULT=pass
6783 00:40:57.825747 <6>[ 13.760796] Console: switching to colour dummy device 80x25
6784 00:40:57.828659 <14>[ 13.760865] [IGT] panfrost_submit: executing
6785 00:40:57.835626 <14>[ 13.761188] [IGT] panfrost_submit: starting subtest pan-submit-error-no-jc
6786 00:40:57.844827 <14>[ 13.761249] [IGT] panfrost_submit: finished subtest pan-submit-error-no-jc, SUCCESS
6787 00:40:57.851569 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.92-cip22-rt12 aarch64)
6788 00:40:57.854739 Using IGT_SRANDOM=1717548000 for randomisation
6789 00:40:57.858399 Opened device: /dev/dri/card0
6790 00:40:57.861370 Starting subtest: pan-submit-error-bad-in-syncs
6791 00:40:57.867931 [1mSubtest pan-submit-error-bad-in-syncs: SUCCESS (0.000s)[0m
6792 00:40:57.902154 <14>[ 13.761614] [IGT] panfrost_submit: exiting, ret=0
6793 00:40:57.908518 <6>[ 13.795290] Console: switching to colour frame buffer device 170x48
6794 00:40:57.915262 <8>[ 13.824482] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass>
6795 00:40:57.916007 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass
6797 00:40:57.922044 <6>[ 13.859779] Console: switching to colour dummy device 80x25
6798 00:40:57.928272 <14>[ 13.859870] [IGT] panfrost_submit: executing
6799 00:40:57.935830 <14>[ 13.860193] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-in-syncs
6800 00:40:57.942318 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.92-cip22-rt12 aarch64)
6801 00:40:57.944953 Using IGT_SRANDOM=1717548001 for randomisation
6802 00:40:57.948315 Opened device: /dev/dri/card0
6803 00:40:57.951626 Starting subtest: pan-submit-error-bad-bo-handles
6804 00:40:57.958843 [1mSubtest pan-submit-error-bad-bo-handles: SUCCESS (0.000s)[0m
6805 00:40:57.993188 <14>[ 13.860477] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-in-syncs, SUCCESS
6806 00:40:57.999472 <14>[ 13.860892] [IGT] panfrost_submit: exiting, ret=0
6807 00:40:58.006822 <6>[ 13.897385] Console: switching to colour frame buffer device 170x48
6808 00:40:58.013142 <8>[ 13.918057] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass>
6809 00:40:58.013828 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass
6811 00:40:58.020189 IGT-Version: 1.2<6>[ 13.950266] Console: switching to colour dummy device 80x25
6812 00:40:58.026221 8-ga44ebfe (aarc<14>[ 13.950331] [IGT] panfrost_submit: executing
6813 00:40:58.029589 h64) (Linux: 6.1.92-cip22-rt12 aarch64)
6814 00:40:58.036030 Using IGT_SRANDOM=1717548001 for randomisation
6815 00:40:58.036683 Opened device: /dev/dri/card0
6816 00:40:58.042838 Starting subtest: pan-submit-error-bad-requirements
6817 00:40:58.049213 [1mSubtest pan-submit-error-bad-requirements: SUCCESS (0.000s)[0m
6818 00:40:58.091518 <14>[ 13.950638] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-bo-handles
6819 00:40:58.101898 <14>[ 13.950898] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-bo-handles, SUCCESS
6820 00:40:58.104921 <14>[ 13.951301] [IGT] panfrost_submit: exiting, ret=0
6821 00:40:58.111710 <6>[ 13.977718] Console: switching to colour frame buffer device 170x48
6822 00:40:58.121606 <8>[ 14.006208] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass>
6823 00:40:58.122429 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass
6825 00:40:58.125220 <6>[ 14.028794] Console: switching to colour dummy device 80x25
6826 00:40:58.131737 <14>[ 14.028856] [IGT] panfrost_submit: executing
6827 00:40:58.137891 <14>[ 14.029178] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-requirements
6828 00:40:58.147761 IGT-Version: 1.2<14>[ 14.029469] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-requirements, SUCCESS
6829 00:40:58.154320 <14>[ 14.030036] [IGT] panfrost_submit: exiting, ret=0
6830 00:40:58.161403 <6>[ 14.077550] Console: switching to colour frame buffer device 170x48
6831 00:40:58.171043 <8>[ 14.105418] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass>
6832 00:40:58.171770 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass
6834 00:40:58.177846 8-ga44ebfe (aarc<6>[ 14.154256] Console: switching to colour dummy device 80x25
6835 00:40:58.184577 h64) (Linux: 6.1<14>[ 14.154343] [IGT] panfrost_submit: executing
6836 00:40:58.190912 .92-cip22-rt12 a<14>[ 14.192707] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-out-sync
6837 00:40:58.194283 arch64)
6838 00:40:58.197403 Using IGT_SRANDOM=1717548001 for randomisation
6839 00:40:58.200853 Opened device: /dev/dri/card0
6840 00:40:58.204029 Starting subtest: pan-submit-error-bad-out-sync
6841 00:40:58.210760 [1mSubtest pan-submit-error-bad-out-sync: SUCCESS (0.000s)[0m
6842 00:40:58.255093 <14>[ 14.207724] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-out-sync, SUCCESS
6843 00:40:58.261933 <14>[ 14.208110] [IGT] panfrost_submit: exiting, ret=0
6844 00:40:58.268332 <6>[ 14.243631] Console: switching to colour frame buffer device 170x48
6845 00:40:58.275062 <8>[ 14.266930] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass>
6846 00:40:58.275822 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass
6848 00:40:58.282234 IGT-Version: 1.2<6>[ 14.290975] Console: switching to colour dummy device 80x25
6849 00:40:58.288693 <14>[ 14.291048] [IGT] panfrost_submit: executing
6850 00:40:58.295627 <14>[ 14.291364] [IGT] panfrost_submit: starting subtest pan-reset
6851 00:40:58.298730 8-ga44ebfe (aarch64) (Linux: 6.1.92-cip22-rt12 aarch64)
6852 00:40:58.301984 Using IGT_SRANDOM=1717548001 for randomisation
6853 00:40:58.305293 Opened device: /dev/dri/card0
6854 00:40:58.308256 Starting subtest: pan-reset
6855 00:40:58.806184 <3>[ 14.804737] panfrost 13040000.gpu: gpu sched timeout, js=1, config=0x7300, status=0x8, head=0x2000000, tail=0x2000000, sched_job=00000000a6ba0325
6856 00:40:58.809417 [1mSubtest pan-reset: SUCCESS (0.515s)[0m
6857 00:40:58.862732 <14>[ 14.819516] [IGT] panfrost_submit: finished subtest pan-reset, SUCCESS
6858 00:40:58.866322 <14>[ 14.819641] [IGT] panfrost_submit: exiting, ret=0
6859 00:40:58.872431 <6>[ 14.847516] Console: switching to colour frame buffer device 170x48
6860 00:40:58.879483 <8>[ 14.875282] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-reset RESULT=pass>
6861 00:40:58.880327 Received signal: <TESTCASE> TEST_CASE_ID=pan-reset RESULT=pass
6863 00:40:58.885790 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.92-cip22-rt12 aarch64)
6864 00:40:58.889189 Using IGT_SRANDOM=1717548002 for randomisation
6865 00:40:58.892280 Opened device: /dev/dri/card0
6866 00:40:58.895779 Starting subtest: pan-submit-and-close
6867 00:40:58.902143 [1mSubtest pan-submit-and-close: SUCCESS (0.001s)[0m
6868 00:40:58.936316 <6>[ 14.894585] Console: switching to colour dummy device 80x25
6869 00:40:58.942991 <14>[ 14.894649] [IGT] panfrost_submit: executing
6870 00:40:58.950306 <14>[ 14.894959] [IGT] panfrost_submit: starting subtest pan-submit-and-close
6871 00:40:58.955981 <14>[ 14.895555] [IGT] panfrost_submit: finished subtest pan-submit-and-close, SUCCESS
6872 00:40:58.962869 <14>[ 14.895615] [IGT] panfrost_submit: exiting, ret=0
6873 00:40:58.969377 <6>[ 14.925497] Console: switching to colour frame buffer device 170x48
6874 00:40:58.976465 IGT-Version: 1.2<8>[ 14.952568] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-and-close RESULT=pass>
6875 00:40:58.977162 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-and-close RESULT=pass
6877 00:40:58.982344 <6>[ 14.983381] Console: switching to colour dummy device 80x25
6878 00:40:58.989160 <14>[ 14.983462] [IGT] panfrost_submit: executing
6879 00:40:58.995834 8-ga44ebfe (aarc<14>[ 14.983789] [IGT] panfrost_submit: starting subtest pan-unhandled-pagefault
6880 00:40:58.999093 h64) (Linux: 6.1.92-cip22-rt12 aarch64)
6881 00:40:59.005804 Using IGT_SRANDOM=1717548002 for randomisation
6882 00:40:59.006160 Opened device: /dev/dri/card0
6883 00:40:59.012230 Starting subtest: pan-unhandled-pagefault
6884 00:40:59.084283 (panfrost_submit:390) CRITICAL: Test assertion failure function __igt_unique____real_main65, file ../tests/panfrost_submit.c:178:
6885 00:40:59.097607 (panfrost_submit:390) CRITICAL: Failed assertion: syncobj_wait(fd, &submit->args->out_sync, 1, abs_timeout(SHORT_TIME_NSEC), 0, NULL)
6886 00:40:59.097922 Stack trace:
6887 00:40:59.101069 #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6888 00:40:59.104732 #1 [<unknown>+0xba921980]
6889 00:40:59.107659 #2 [<unknown>+0xba920dec]
6890 00:40:59.110976 #3 [__libc_init_first+0x80]
6891 00:40:59.111372 #4 [__libc_start_main+0x98]
6892 00:40:59.114158 #5 [<unknown>+0xba920e30]
6893 00:40:59.117558 Subtest pan-unhandled-pagefault failed.
6894 00:40:59.120802 **** DEBUG ****
6895 00:40:59.131273 (panfrost_submit:390) CRITICAL: Test assertion failure function __igt_unique____real_main65, file ../tests/panfrost_submit.c:178:
6896 00:40:59.140378 (panfrost_submit:390)<14>[ 15.096071] [IGT] panfrost_submit: finished subtest pan-unhandled-pagefault, FAIL
6897 00:40:59.147312 CRITICAL: Faile<14>[ 15.096156] [IGT] panfrost_submit: exiting, ret=98
6898 00:40:59.157234 d assertion: syn<6>[ 15.127788] Console: switching to colour frame buffer device 170x48
6899 00:40:59.163706 cobj_wait(fd, &s<8>[ 15.161993] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-unhandled-pagefault RESULT=fail>
6900 00:40:59.163980 Received signal: <TESTCASE> TEST_CASE_ID=pan-unhandled-pagefault RESULT=fail
6902 00:40:59.170004 <8>[ 15.164871] <LAVA_SIGNAL_TESTSET STOP>
6903 00:40:59.170272 Received signal: <TESTSET> STOP
6904 00:40:59.170357 Closing test_set panfrost_submit
6905 00:40:59.176663 ubmit->args->out<8>[ 15.184875] <LAVA_SIGNAL_ENDRUN 0_igt-gpu-panfrost 14173469_1.5.2.3.1>
6906 00:40:59.176931 Received signal: <ENDRUN> 0_igt-gpu-panfrost 14173469_1.5.2.3.1
6907 00:40:59.177028 Ending use of test pattern.
6908 00:40:59.177112 Ending test lava.0_igt-gpu-panfrost (14173469_1.5.2.3.1), duration 2.29
6910 00:40:59.183402 _sync, 1, abs_timeout(SHORT_TIME_NSEC), 0, NULL)
6911 00:40:59.186540 (panfrost_submit:390) igt_core-INFO: Stack trace:
6912 00:40:59.193460 (panfrost_submit:390) igt_core-INFO: #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6913 00:40:59.200270 (panfrost_submit:390) igt_core-INFO: #1 [<unknown>+0xba921980]
6914 00:40:59.206958 (panfrost_submit:390) igt_core-INFO: #2 [<unknown>+0xba920dec]
6915 00:40:59.213392 (panfrost_submit:390) igt_core-INFO: #3 [__libc_init_first+0x80]
6916 00:40:59.220508 (panfrost_submit:390) igt_core-INFO: #4 [__libc_start_main+0x98]
6917 00:40:59.226631 (panfrost_submit:390) igt_core-INFO: #5 [<unknown>+0xba920e30]
6918 00:40:59.226725 **** END ****
6919 00:40:59.233224 [1mSubtest pan-unhandled-pagefault: FAIL (0.112s)[0m
6920 00:40:59.233319 + set +x
6921 00:40:59.236531 <LAVA_TEST_RUNNER EXIT>
6922 00:40:59.236801 ok: lava_test_shell seems to have completed
6923 00:40:59.237175 base-params:
result: pass
set: panfrost_get_param
gem-new-0:
result: pass
set: panfrost_gem_new
gem-new-4096:
result: pass
set: panfrost_gem_new
gem-new-zeroed:
result: pass
set: panfrost_gem_new
gem-prime-import:
result: fail
set: panfrost_prime
get-bad-padding:
result: pass
set: panfrost_get_param
get-bad-param:
result: pass
set: panfrost_get_param
pan-reset:
result: pass
set: panfrost_submit
pan-submit:
result: pass
set: panfrost_submit
pan-submit-and-close:
result: pass
set: panfrost_submit
pan-submit-error-bad-bo-handles:
result: pass
set: panfrost_submit
pan-submit-error-bad-in-syncs:
result: pass
set: panfrost_submit
pan-submit-error-bad-out-sync:
result: pass
set: panfrost_submit
pan-submit-error-bad-requirements:
result: pass
set: panfrost_submit
pan-submit-error-no-jc:
result: pass
set: panfrost_submit
pan-unhandled-pagefault:
result: fail
set: panfrost_submit
6924 00:40:59.237304 end: 3.1 lava-test-shell (duration 00:00:03) [common]
6925 00:40:59.237419 end: 3 lava-test-retry (duration 00:00:03) [common]
6926 00:40:59.237532 start: 4 finalize (timeout 00:08:02) [common]
6927 00:40:59.237651 start: 4.1 power-off (timeout 00:00:30) [common]
6928 00:40:59.237840 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
6929 00:41:00.475046 >> Command sent successfully.
6930 00:41:00.480310 Returned 0 in 1 seconds
6931 00:41:00.580821 end: 4.1 power-off (duration 00:00:01) [common]
6933 00:41:00.581188 start: 4.2 read-feedback (timeout 00:08:01) [common]
6934 00:41:00.581515 Listened to connection for namespace 'common' for up to 1s
6936 00:41:00.581945 Listened to connection for namespace 'common' for up to 1s
6937 00:41:01.581516 Finalising connection for namespace 'common'
6938 00:41:01.581691 Disconnecting from shell: Finalise
6939 00:41:01.682105 end: 4.2 read-feedback (duration 00:00:01) [common]
6940 00:41:01.682405 end: 4 finalize (duration 00:00:02) [common]
6941 00:41:01.682663 Cleaning after the job
6942 00:41:01.682885 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14173469/tftp-deploy-jo3367m1/ramdisk
6943 00:41:01.696030 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14173469/tftp-deploy-jo3367m1/kernel
6944 00:41:01.722989 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14173469/tftp-deploy-jo3367m1/dtb
6945 00:41:01.723261 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14173469/tftp-deploy-jo3367m1/modules
6946 00:41:01.730263 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14173469
6947 00:41:01.849699 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14173469
6948 00:41:01.849873 Job finished correctly