Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 45
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 86
1 01:22:14.447418 lava-dispatcher, installed at version: 2024.03
2 01:22:14.447639 start: 0 validate
3 01:22:14.447784 Start time: 2024-06-05 01:22:14.447776+00:00 (UTC)
4 01:22:14.447919 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:22:14.448066 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:22:14.703430 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:22:14.703611 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-168-g96fd74998d4ca%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 01:22:14.960711 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:22:14.960907 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-168-g96fd74998d4ca%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 01:22:15.210039 Using caching service: 'http://localhost/cache/?uri=%s'
11 01:22:15.210271 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:22:15.460570 Using caching service: 'http://localhost/cache/?uri=%s'
13 01:22:15.461285 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-168-g96fd74998d4ca%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 01:22:15.721206 validate duration: 1.27
16 01:22:15.722447 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:22:15.722958 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:22:15.723428 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:22:15.724001 Not decompressing ramdisk as can be used compressed.
20 01:22:15.724463 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 01:22:15.724812 saving as /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/ramdisk/initrd.cpio.gz
22 01:22:15.725153 total size: 5628169 (5 MB)
23 01:22:15.729950 progress 0 % (0 MB)
24 01:22:15.738117 progress 5 % (0 MB)
25 01:22:15.746076 progress 10 % (0 MB)
26 01:22:15.751026 progress 15 % (0 MB)
27 01:22:15.755316 progress 20 % (1 MB)
28 01:22:15.758571 progress 25 % (1 MB)
29 01:22:15.761827 progress 30 % (1 MB)
30 01:22:15.764764 progress 35 % (1 MB)
31 01:22:15.767113 progress 40 % (2 MB)
32 01:22:15.769574 progress 45 % (2 MB)
33 01:22:15.771653 progress 50 % (2 MB)
34 01:22:15.773786 progress 55 % (2 MB)
35 01:22:15.775907 progress 60 % (3 MB)
36 01:22:15.777602 progress 65 % (3 MB)
37 01:22:15.779523 progress 70 % (3 MB)
38 01:22:15.781181 progress 75 % (4 MB)
39 01:22:15.782905 progress 80 % (4 MB)
40 01:22:15.784449 progress 85 % (4 MB)
41 01:22:15.786189 progress 90 % (4 MB)
42 01:22:15.787905 progress 95 % (5 MB)
43 01:22:15.789452 progress 100 % (5 MB)
44 01:22:15.789681 5 MB downloaded in 0.06 s (83.16 MB/s)
45 01:22:15.789853 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:22:15.790137 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:22:15.790236 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:22:15.790333 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:22:15.790482 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-168-g96fd74998d4ca/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 01:22:15.790561 saving as /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/kernel/Image
52 01:22:15.790632 total size: 54682112 (52 MB)
53 01:22:15.790703 No compression specified
54 01:22:15.791931 progress 0 % (0 MB)
55 01:22:15.807298 progress 5 % (2 MB)
56 01:22:15.822713 progress 10 % (5 MB)
57 01:22:15.838158 progress 15 % (7 MB)
58 01:22:15.853447 progress 20 % (10 MB)
59 01:22:15.868990 progress 25 % (13 MB)
60 01:22:15.884413 progress 30 % (15 MB)
61 01:22:15.900078 progress 35 % (18 MB)
62 01:22:15.915454 progress 40 % (20 MB)
63 01:22:15.930878 progress 45 % (23 MB)
64 01:22:15.946419 progress 50 % (26 MB)
65 01:22:15.961850 progress 55 % (28 MB)
66 01:22:15.977371 progress 60 % (31 MB)
67 01:22:15.992801 progress 65 % (33 MB)
68 01:22:16.008312 progress 70 % (36 MB)
69 01:22:16.023703 progress 75 % (39 MB)
70 01:22:16.039311 progress 80 % (41 MB)
71 01:22:16.054623 progress 85 % (44 MB)
72 01:22:16.069967 progress 90 % (46 MB)
73 01:22:16.085323 progress 95 % (49 MB)
74 01:22:16.100409 progress 100 % (52 MB)
75 01:22:16.100665 52 MB downloaded in 0.31 s (168.21 MB/s)
76 01:22:16.100830 end: 1.2.1 http-download (duration 00:00:00) [common]
78 01:22:16.101094 end: 1.2 download-retry (duration 00:00:00) [common]
79 01:22:16.101193 start: 1.3 download-retry (timeout 00:10:00) [common]
80 01:22:16.101291 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 01:22:16.101440 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-168-g96fd74998d4ca/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 01:22:16.101529 saving as /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 01:22:16.101601 total size: 57695 (0 MB)
84 01:22:16.101672 No compression specified
85 01:22:16.102914 progress 56 % (0 MB)
86 01:22:16.103252 progress 100 % (0 MB)
87 01:22:16.103489 0 MB downloaded in 0.00 s (29.19 MB/s)
88 01:22:16.103630 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:22:16.103889 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:22:16.103986 start: 1.4 download-retry (timeout 00:10:00) [common]
92 01:22:16.104082 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 01:22:16.104208 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 01:22:16.104286 saving as /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/nfsrootfs/full.rootfs.tar
95 01:22:16.104356 total size: 120894716 (115 MB)
96 01:22:16.104428 Using unxz to decompress xz
97 01:22:16.108772 progress 0 % (0 MB)
98 01:22:16.488808 progress 5 % (5 MB)
99 01:22:16.880680 progress 10 % (11 MB)
100 01:22:17.266401 progress 15 % (17 MB)
101 01:22:17.626817 progress 20 % (23 MB)
102 01:22:17.949183 progress 25 % (28 MB)
103 01:22:18.344365 progress 30 % (34 MB)
104 01:22:18.717411 progress 35 % (40 MB)
105 01:22:18.899323 progress 40 % (46 MB)
106 01:22:19.095366 progress 45 % (51 MB)
107 01:22:19.436003 progress 50 % (57 MB)
108 01:22:19.847061 progress 55 % (63 MB)
109 01:22:20.225006 progress 60 % (69 MB)
110 01:22:20.598994 progress 65 % (74 MB)
111 01:22:20.977403 progress 70 % (80 MB)
112 01:22:21.369964 progress 75 % (86 MB)
113 01:22:21.748133 progress 80 % (92 MB)
114 01:22:22.121891 progress 85 % (98 MB)
115 01:22:22.516505 progress 90 % (103 MB)
116 01:22:22.878493 progress 95 % (109 MB)
117 01:22:23.272671 progress 100 % (115 MB)
118 01:22:23.278597 115 MB downloaded in 7.17 s (16.07 MB/s)
119 01:22:23.278876 end: 1.4.1 http-download (duration 00:00:07) [common]
121 01:22:23.279184 end: 1.4 download-retry (duration 00:00:07) [common]
122 01:22:23.279288 start: 1.5 download-retry (timeout 00:09:52) [common]
123 01:22:23.279390 start: 1.5.1 http-download (timeout 00:09:52) [common]
124 01:22:23.279565 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-168-g96fd74998d4ca/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 01:22:23.279648 saving as /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/modules/modules.tar
126 01:22:23.279718 total size: 8605984 (8 MB)
127 01:22:23.279791 Using unxz to decompress xz
128 01:22:23.284427 progress 0 % (0 MB)
129 01:22:23.305288 progress 5 % (0 MB)
130 01:22:23.335303 progress 10 % (0 MB)
131 01:22:23.368158 progress 15 % (1 MB)
132 01:22:23.394150 progress 20 % (1 MB)
133 01:22:23.420310 progress 25 % (2 MB)
134 01:22:23.446573 progress 30 % (2 MB)
135 01:22:23.473470 progress 35 % (2 MB)
136 01:22:23.502886 progress 40 % (3 MB)
137 01:22:23.527991 progress 45 % (3 MB)
138 01:22:23.554500 progress 50 % (4 MB)
139 01:22:23.582018 progress 55 % (4 MB)
140 01:22:23.609003 progress 60 % (4 MB)
141 01:22:23.635957 progress 65 % (5 MB)
142 01:22:23.663724 progress 70 % (5 MB)
143 01:22:23.690053 progress 75 % (6 MB)
144 01:22:23.720717 progress 80 % (6 MB)
145 01:22:23.747849 progress 85 % (7 MB)
146 01:22:23.775981 progress 90 % (7 MB)
147 01:22:23.803829 progress 95 % (7 MB)
148 01:22:23.831572 progress 100 % (8 MB)
149 01:22:23.837547 8 MB downloaded in 0.56 s (14.71 MB/s)
150 01:22:23.837821 end: 1.5.1 http-download (duration 00:00:01) [common]
152 01:22:23.838174 end: 1.5 download-retry (duration 00:00:01) [common]
153 01:22:23.838281 start: 1.6 prepare-tftp-overlay (timeout 00:09:52) [common]
154 01:22:23.838386 start: 1.6.1 extract-nfsrootfs (timeout 00:09:52) [common]
155 01:22:27.773887 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14173539/extract-nfsrootfs-d319lfd8
156 01:22:27.774114 end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
157 01:22:27.774233 start: 1.6.2 lava-overlay (timeout 00:09:48) [common]
158 01:22:27.774421 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz
159 01:22:27.774573 makedir: /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin
160 01:22:27.774688 makedir: /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/tests
161 01:22:27.774800 makedir: /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/results
162 01:22:27.774911 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-add-keys
163 01:22:27.775074 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-add-sources
164 01:22:27.775222 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-background-process-start
165 01:22:27.775366 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-background-process-stop
166 01:22:27.775577 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-common-functions
167 01:22:27.775732 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-echo-ipv4
168 01:22:27.775879 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-install-packages
169 01:22:27.776025 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-installed-packages
170 01:22:27.776167 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-os-build
171 01:22:27.776308 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-probe-channel
172 01:22:27.776450 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-probe-ip
173 01:22:27.776595 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-target-ip
174 01:22:27.776736 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-target-mac
175 01:22:27.776877 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-target-storage
176 01:22:27.777019 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-test-case
177 01:22:27.777166 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-test-event
178 01:22:27.777306 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-test-feedback
179 01:22:27.777447 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-test-raise
180 01:22:27.777590 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-test-reference
181 01:22:27.777733 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-test-runner
182 01:22:27.777874 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-test-set
183 01:22:27.778016 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-test-shell
184 01:22:27.778162 Updating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-add-keys (debian)
185 01:22:27.778327 Updating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-add-sources (debian)
186 01:22:27.778488 Updating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-install-packages (debian)
187 01:22:27.778649 Updating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-installed-packages (debian)
188 01:22:27.778805 Updating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/bin/lava-os-build (debian)
189 01:22:27.778940 Creating /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/environment
190 01:22:27.779050 LAVA metadata
191 01:22:27.779129 - LAVA_JOB_ID=14173539
192 01:22:27.779200 - LAVA_DISPATCHER_IP=192.168.201.1
193 01:22:27.779315 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:48) [common]
194 01:22:27.779390 skipped lava-vland-overlay
195 01:22:27.779703 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 01:22:27.779797 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
197 01:22:27.779868 skipped lava-multinode-overlay
198 01:22:27.779951 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 01:22:27.780039 start: 1.6.2.3 test-definition (timeout 00:09:48) [common]
200 01:22:27.780123 Loading test definitions
201 01:22:27.780229 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:48) [common]
202 01:22:27.780310 Using /lava-14173539 at stage 0
203 01:22:27.780625 uuid=14173539_1.6.2.3.1 testdef=None
204 01:22:27.780729 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 01:22:27.780824 start: 1.6.2.3.2 test-overlay (timeout 00:09:48) [common]
206 01:22:27.781336 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 01:22:27.781590 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:48) [common]
209 01:22:27.782207 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 01:22:27.782476 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
212 01:22:27.797302 runner path: /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/0/tests/0_timesync-off test_uuid 14173539_1.6.2.3.1
213 01:22:27.797519 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 01:22:27.797788 start: 1.6.2.3.5 git-repo-action (timeout 00:09:48) [common]
216 01:22:27.797893 Using /lava-14173539 at stage 0
217 01:22:27.798060 Fetching tests from https://github.com/kernelci/test-definitions.git
218 01:22:27.798266 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/0/tests/1_kselftest-tpm2'
219 01:22:30.438568 Running '/usr/bin/git checkout kernelci.org
220 01:22:30.608464 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/kselftest.yaml
221 01:22:30.609287 uuid=14173539_1.6.2.3.5 testdef=None
222 01:22:30.609473 end: 1.6.2.3.5 git-repo-action (duration 00:00:03) [common]
224 01:22:30.609762 start: 1.6.2.3.6 test-overlay (timeout 00:09:45) [common]
225 01:22:30.610626 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 01:22:30.610912 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:45) [common]
228 01:22:30.612043 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 01:22:30.612324 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:45) [common]
231 01:22:30.613406 runner path: /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/0/tests/1_kselftest-tpm2 test_uuid 14173539_1.6.2.3.5
232 01:22:30.613512 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 01:22:30.613592 BRANCH='cip-gitlab'
234 01:22:30.613669 SKIPFILE='/dev/null'
235 01:22:30.613762 SKIP_INSTALL='True'
236 01:22:30.613832 TESTPROG_URL='http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-168-g96fd74998d4ca/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
237 01:22:30.613901 TST_CASENAME=''
238 01:22:30.613966 TST_CMDFILES='tpm2'
239 01:22:30.614132 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 01:22:30.614406 Creating lava-test-runner.conf files
242 01:22:30.614484 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14173539/lava-overlay-e2iv0uwz/lava-14173539/0 for stage 0
243 01:22:30.614595 - 0_timesync-off
244 01:22:30.614676 - 1_kselftest-tpm2
245 01:22:30.614784 end: 1.6.2.3 test-definition (duration 00:00:03) [common]
246 01:22:30.614886 start: 1.6.2.4 compress-overlay (timeout 00:09:45) [common]
247 01:22:39.198095 end: 1.6.2.4 compress-overlay (duration 00:00:09) [common]
248 01:22:39.198258 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
249 01:22:39.198363 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 01:22:39.198474 end: 1.6.2 lava-overlay (duration 00:00:11) [common]
251 01:22:39.198574 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
252 01:22:39.383271 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 01:22:39.383723 start: 1.6.4 extract-modules (timeout 00:09:36) [common]
254 01:22:39.383894 extracting modules file /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14173539/extract-nfsrootfs-d319lfd8
255 01:22:39.628797 extracting modules file /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14173539/extract-overlay-ramdisk-djf6vyfv/ramdisk
256 01:22:39.872404 end: 1.6.4 extract-modules (duration 00:00:00) [common]
257 01:22:39.872571 start: 1.6.5 apply-overlay-tftp (timeout 00:09:36) [common]
258 01:22:39.872682 [common] Applying overlay to NFS
259 01:22:39.872766 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14173539/compress-overlay-0eec3h_g/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14173539/extract-nfsrootfs-d319lfd8
260 01:22:40.901089 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 01:22:40.901270 start: 1.6.6 configure-preseed-file (timeout 00:09:35) [common]
262 01:22:40.901387 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 01:22:40.901489 start: 1.6.7 compress-ramdisk (timeout 00:09:35) [common]
264 01:22:40.901583 Building ramdisk /var/lib/lava/dispatcher/tmp/14173539/extract-overlay-ramdisk-djf6vyfv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14173539/extract-overlay-ramdisk-djf6vyfv/ramdisk
265 01:22:41.241121 >> 130348 blocks
266 01:22:43.511514 rename /var/lib/lava/dispatcher/tmp/14173539/extract-overlay-ramdisk-djf6vyfv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/ramdisk/ramdisk.cpio.gz
267 01:22:43.511995 end: 1.6.7 compress-ramdisk (duration 00:00:03) [common]
268 01:22:43.512134 start: 1.6.8 prepare-kernel (timeout 00:09:32) [common]
269 01:22:43.512251 start: 1.6.8.1 prepare-fit (timeout 00:09:32) [common]
270 01:22:43.512389 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/kernel/Image']
271 01:22:57.889437 Returned 0 in 14 seconds
272 01:22:57.990469 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/kernel/image.itb
273 01:22:58.422019 output: FIT description: Kernel Image image with one or more FDT blobs
274 01:22:58.422431 output: Created: Wed Jun 5 02:22:58 2024
275 01:22:58.422516 output: Image 0 (kernel-1)
276 01:22:58.422594 output: Description:
277 01:22:58.422667 output: Created: Wed Jun 5 02:22:58 2024
278 01:22:58.422738 output: Type: Kernel Image
279 01:22:58.422808 output: Compression: lzma compressed
280 01:22:58.422875 output: Data Size: 13059919 Bytes = 12753.83 KiB = 12.45 MiB
281 01:22:58.422944 output: Architecture: AArch64
282 01:22:58.423010 output: OS: Linux
283 01:22:58.423076 output: Load Address: 0x00000000
284 01:22:58.423146 output: Entry Point: 0x00000000
285 01:22:58.423211 output: Hash algo: crc32
286 01:22:58.423276 output: Hash value: 4c96ec19
287 01:22:58.423344 output: Image 1 (fdt-1)
288 01:22:58.423420 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 01:22:58.423488 output: Created: Wed Jun 5 02:22:58 2024
290 01:22:58.423553 output: Type: Flat Device Tree
291 01:22:58.423615 output: Compression: uncompressed
292 01:22:58.423678 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 01:22:58.423759 output: Architecture: AArch64
294 01:22:58.423824 output: Hash algo: crc32
295 01:22:58.423886 output: Hash value: a9713552
296 01:22:58.423947 output: Image 2 (ramdisk-1)
297 01:22:58.424007 output: Description: unavailable
298 01:22:58.424069 output: Created: Wed Jun 5 02:22:58 2024
299 01:22:58.424130 output: Type: RAMDisk Image
300 01:22:58.424195 output: Compression: Unknown Compression
301 01:22:58.424257 output: Data Size: 18731706 Bytes = 18292.68 KiB = 17.86 MiB
302 01:22:58.424318 output: Architecture: AArch64
303 01:22:58.424379 output: OS: Linux
304 01:22:58.424439 output: Load Address: unavailable
305 01:22:58.424500 output: Entry Point: unavailable
306 01:22:58.424560 output: Hash algo: crc32
307 01:22:58.424621 output: Hash value: 00caf81d
308 01:22:58.424681 output: Default Configuration: 'conf-1'
309 01:22:58.424742 output: Configuration 0 (conf-1)
310 01:22:58.424803 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 01:22:58.424886 output: Kernel: kernel-1
312 01:22:58.424951 output: Init Ramdisk: ramdisk-1
313 01:22:58.425013 output: FDT: fdt-1
314 01:22:58.425075 output: Loadables: kernel-1
315 01:22:58.425135 output:
316 01:22:58.425366 end: 1.6.8.1 prepare-fit (duration 00:00:15) [common]
317 01:22:58.425477 end: 1.6.8 prepare-kernel (duration 00:00:15) [common]
318 01:22:58.425599 end: 1.6 prepare-tftp-overlay (duration 00:00:35) [common]
319 01:22:58.425705 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:17) [common]
320 01:22:58.425794 No LXC device requested
321 01:22:58.425884 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 01:22:58.425992 start: 1.8 deploy-device-env (timeout 00:09:17) [common]
323 01:22:58.426102 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 01:22:58.426183 Checking files for TFTP limit of 4294967296 bytes.
325 01:22:58.426756 end: 1 tftp-deploy (duration 00:00:43) [common]
326 01:22:58.426876 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 01:22:58.426980 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 01:22:58.427119 substitutions:
329 01:22:58.427201 - {DTB}: 14173539/tftp-deploy-moys6zp8/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 01:22:58.427276 - {INITRD}: 14173539/tftp-deploy-moys6zp8/ramdisk/ramdisk.cpio.gz
331 01:22:58.427345 - {KERNEL}: 14173539/tftp-deploy-moys6zp8/kernel/Image
332 01:22:58.427422 - {LAVA_MAC}: None
333 01:22:58.427492 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14173539/extract-nfsrootfs-d319lfd8
334 01:22:58.427559 - {NFS_SERVER_IP}: 192.168.201.1
335 01:22:58.427623 - {PRESEED_CONFIG}: None
336 01:22:58.427686 - {PRESEED_LOCAL}: None
337 01:22:58.427750 - {RAMDISK}: 14173539/tftp-deploy-moys6zp8/ramdisk/ramdisk.cpio.gz
338 01:22:58.427813 - {ROOT_PART}: None
339 01:22:58.427876 - {ROOT}: None
340 01:22:58.427938 - {SERVER_IP}: 192.168.201.1
341 01:22:58.428001 - {TEE}: None
342 01:22:58.428063 Parsed boot commands:
343 01:22:58.428124 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 01:22:58.428326 Parsed boot commands: tftpboot 192.168.201.1 14173539/tftp-deploy-moys6zp8/kernel/image.itb 14173539/tftp-deploy-moys6zp8/kernel/cmdline
345 01:22:58.428430 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 01:22:58.428530 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 01:22:58.428633 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 01:22:58.428733 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 01:22:58.428817 Not connected, no need to disconnect.
350 01:22:58.428903 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 01:22:58.428996 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 01:22:58.429075 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
353 01:22:58.433115 Setting prompt string to ['lava-test: # ']
354 01:22:58.433538 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 01:22:58.433665 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 01:22:58.433782 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 01:22:58.433885 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 01:22:58.434092 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-0']
359 01:23:08.846488 Returned 0 in 10 seconds
360 01:23:08.947827 end: 2.2.2.1 pdu-reboot (duration 00:00:11) [common]
362 01:23:08.949349 end: 2.2.2 reset-device (duration 00:00:11) [common]
363 01:23:08.949952 start: 2.2.3 depthcharge-start (timeout 00:04:49) [common]
364 01:23:08.950404 Setting prompt string to 'Starting depthcharge on Juniper...'
365 01:23:08.950766 Changing prompt to 'Starting depthcharge on Juniper...'
366 01:23:08.951135 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
367 01:23:08.953172 [Enter `^Ec?' for help]
368 01:23:08.953604 [DL] 00000000 00000000 010701
369 01:23:08.953962
370 01:23:08.954293
371 01:23:08.954633 F0: 102B 0000
372 01:23:08.954956
373 01:23:08.955377 F3: 1006 0033 [0200]
374 01:23:08.955743
375 01:23:08.956042 F3: 4001 00E0 [0200]
376 01:23:08.956338
377 01:23:08.956629 F3: 0000 0000
378 01:23:08.956929
379 01:23:08.957216 V0: 0000 0000 [0001]
380 01:23:08.957506
381 01:23:08.957794 00: 1027 0002
382 01:23:08.958225
383 01:23:08.958575 01: 0000 0000
384 01:23:08.959014
385 01:23:08.959325 BP: 0C00 0251 [0000]
386 01:23:08.959677
387 01:23:08.960107 G0: 1182 0000
388 01:23:08.960417
389 01:23:08.960730 EC: 0004 0000 [0001]
390 01:23:08.961133
391 01:23:08.961526 S7: 0000 0000 [0000]
392 01:23:08.962020
393 01:23:08.962419 CC: 0000 0000 [0001]
394 01:23:08.962815
395 01:23:08.963204 T0: 0000 00DB [000F]
396 01:23:08.963667
397 01:23:08.964062 Jump to BL
398 01:23:08.964453
399 01:23:08.964959
400 01:23:08.965448
401 01:23:08.965844 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
402 01:23:08.966253 ARM64: Exception handlers installed.
403 01:23:08.966646 ARM64: Testing exception
404 01:23:08.967136 ARM64: Done test exception
405 01:23:08.967624 WDT: Last reset was cold boot
406 01:23:08.968023 SPI0(PAD0) initialized at 992727 Hz
407 01:23:08.968418 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
408 01:23:08.968911 Manufacturer: ef
409 01:23:08.969307 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
410 01:23:08.969701 Probing TPM: . done!
411 01:23:08.970093 TPM ready after 0 ms
412 01:23:08.970585 Connected to device vid:did:rid of 1ae0:0028:00
413 01:23:08.971075 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
414 01:23:08.971516 Initialized TPM device CR50 revision 0
415 01:23:08.971912 tlcl_send_startup: Startup return code is 0
416 01:23:08.972302 TPM: setup succeeded
417 01:23:08.972692 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
418 01:23:08.973081 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
419 01:23:08.973469 in-header: 03 19 00 00 08 00 00 00
420 01:23:08.973859 in-data: a2 e0 47 00 13 00 00 00
421 01:23:08.974244 Chrome EC: UHEPI supported
422 01:23:08.974630 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
423 01:23:08.975119 in-header: 03 a1 00 00 08 00 00 00
424 01:23:08.975645 in-data: 84 60 60 10 00 00 00 00
425 01:23:08.976131 Phase 1
426 01:23:08.976529 FMAP: area GBB found @ 3f5000 (12032 bytes)
427 01:23:08.976958 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
428 01:23:08.977354 VB2:vb2_check_recovery() Recovery was requested manually
429 01:23:08.977747 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
430 01:23:08.978241 Recovery requested (1009000e)
431 01:23:08.978645 tlcl_extend: response is 0
432 01:23:08.978925 tlcl_extend: response is 0
433 01:23:08.979268
434 01:23:08.979702
435 01:23:08.980037 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
436 01:23:08.980360 ARM64: Exception handlers installed.
437 01:23:08.980674 ARM64: Testing exception
438 01:23:08.981039 ARM64: Done test exception
439 01:23:08.981391 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2004
440 01:23:08.981621 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
441 01:23:08.981891 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
442 01:23:08.982261 [RTC]rtc_get_frequency_meter,134: input=0xf, output=914
443 01:23:08.982555 [RTC]rtc_get_frequency_meter,134: input=0x7, output=779
444 01:23:08.982775 [RTC]rtc_get_frequency_meter,134: input=0xb, output=846
445 01:23:08.982985 [RTC]rtc_get_frequency_meter,134: input=0x9, output=813
446 01:23:08.983193 [RTC]rtc_get_frequency_meter,134: input=0x8, output=795
447 01:23:08.983429 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
448 01:23:08.983593 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
449 01:23:08.983748 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
450 01:23:08.983903 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
451 01:23:08.984058 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
452 01:23:08.984213 in-header: 03 19 00 00 08 00 00 00
453 01:23:08.984366 in-data: a2 e0 47 00 13 00 00 00
454 01:23:08.984519 Chrome EC: UHEPI supported
455 01:23:08.984673 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
456 01:23:08.984830 in-header: 03 a1 00 00 08 00 00 00
457 01:23:08.984985 in-data: 84 60 60 10 00 00 00 00
458 01:23:08.985137 Skip loading cached calibration data
459 01:23:08.985291 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
460 01:23:08.985448 in-header: 03 a1 00 00 08 00 00 00
461 01:23:08.985603 in-data: 84 60 60 10 00 00 00 00
462 01:23:08.985766 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
463 01:23:08.985922 in-header: 03 a1 00 00 08 00 00 00
464 01:23:08.986076 in-data: 84 60 60 10 00 00 00 00
465 01:23:08.986229 ADC[3]: Raw value=215860 ID=1
466 01:23:08.986382 Manufacturer: ef
467 01:23:08.986535 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
468 01:23:08.986690 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
469 01:23:08.986845 CBFS @ 21000 size 3d4000
470 01:23:08.986999 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
471 01:23:08.987153 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
472 01:23:08.987305 CBFS: Found @ offset 3c700 size 44
473 01:23:08.987480 DRAM-K: Full Calibration
474 01:23:08.987637 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
475 01:23:08.987792 CBFS @ 21000 size 3d4000
476 01:23:08.987946 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
477 01:23:08.988100 CBFS: Locating 'fallback/dram'
478 01:23:08.988254 CBFS: Found @ offset 24b00 size 12268
479 01:23:08.988412 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
480 01:23:08.988536 ddr_geometry: 1, config: 0x0
481 01:23:08.988659 header.status = 0x0
482 01:23:08.988781 header.magic = 0x44524d4b (expected: 0x44524d4b)
483 01:23:08.988903 header.version = 0x5 (expected: 0x5)
484 01:23:08.989026 header.size = 0x8f0 (expected: 0x8f0)
485 01:23:08.989148 header.config = 0x0
486 01:23:08.989269 header.flags = 0x0
487 01:23:08.989391 header.checksum = 0x0
488 01:23:08.989749 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
489 01:23:08.989886 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
490 01:23:08.990014 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
491 01:23:08.990138 ddr_geometry:1
492 01:23:08.990260 [EMI] new MDL number = 1
493 01:23:08.990383 dram_cbt_mode_extern: 0
494 01:23:08.990528 dram_cbt_mode [RK0]: 0, [RK1]: 0
495 01:23:08.990653 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
496 01:23:08.990778
497 01:23:08.990902
498 01:23:08.991024 [Bianco] ETT version 0.0.0.1
499 01:23:08.991147 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
500 01:23:08.991271
501 01:23:08.991395 vSetVcoreByFreq with vcore:762500, freq=1600
502 01:23:08.991547
503 01:23:08.991671 [DramcInit]
504 01:23:08.991794 AutoRefreshCKEOff AutoREF OFF
505 01:23:08.991917 DDRPhyPLLSetting-CKEOFF
506 01:23:08.992039 DDRPhyPLLSetting-CKEON
507 01:23:08.992161
508 01:23:08.992283 Enable WDQS
509 01:23:08.992405 [ModeRegInit_LP4] CH0 RK0
510 01:23:08.992529 Write Rank0 MR13 =0x18
511 01:23:08.992651 Write Rank0 MR12 =0x5d
512 01:23:08.992773 Write Rank0 MR1 =0x56
513 01:23:08.992896 Write Rank0 MR2 =0x1a
514 01:23:08.993019 Write Rank0 MR11 =0x0
515 01:23:08.993141 Write Rank0 MR22 =0x38
516 01:23:08.993263 Write Rank0 MR14 =0x5d
517 01:23:08.993394 Write Rank0 MR3 =0x30
518 01:23:08.993495 Write Rank0 MR13 =0x58
519 01:23:08.993595 Write Rank0 MR12 =0x5d
520 01:23:08.993697 Write Rank0 MR1 =0x56
521 01:23:08.993799 Write Rank0 MR2 =0x2d
522 01:23:08.993901 Write Rank0 MR11 =0x23
523 01:23:08.994002 Write Rank0 MR22 =0x34
524 01:23:08.994104 Write Rank0 MR14 =0x10
525 01:23:08.994205 Write Rank0 MR3 =0x30
526 01:23:08.994307 Write Rank0 MR13 =0xd8
527 01:23:08.994407 [ModeRegInit_LP4] CH0 RK1
528 01:23:08.994509 Write Rank1 MR13 =0x18
529 01:23:08.994611 Write Rank1 MR12 =0x5d
530 01:23:08.994713 Write Rank1 MR1 =0x56
531 01:23:08.994815 Write Rank1 MR2 =0x1a
532 01:23:08.994916 Write Rank1 MR11 =0x0
533 01:23:08.995017 Write Rank1 MR22 =0x38
534 01:23:08.995119 Write Rank1 MR14 =0x5d
535 01:23:08.995220 Write Rank1 MR3 =0x30
536 01:23:08.995322 Write Rank1 MR13 =0x58
537 01:23:08.995436 Write Rank1 MR12 =0x5d
538 01:23:08.995540 Write Rank1 MR1 =0x56
539 01:23:08.995642 Write Rank1 MR2 =0x2d
540 01:23:08.995744 Write Rank1 MR11 =0x23
541 01:23:08.995846 Write Rank1 MR22 =0x34
542 01:23:08.995946 Write Rank1 MR14 =0x10
543 01:23:08.996047 Write Rank1 MR3 =0x30
544 01:23:08.996148 Write Rank1 MR13 =0xd8
545 01:23:08.996249 [ModeRegInit_LP4] CH1 RK0
546 01:23:08.996351 Write Rank0 MR13 =0x18
547 01:23:08.996451 Write Rank0 MR12 =0x5d
548 01:23:08.996552 Write Rank0 MR1 =0x56
549 01:23:08.996654 Write Rank0 MR2 =0x1a
550 01:23:08.996756 Write Rank0 MR11 =0x0
551 01:23:08.996857 Write Rank0 MR22 =0x38
552 01:23:08.996958 Write Rank0 MR14 =0x5d
553 01:23:08.997059 Write Rank0 MR3 =0x30
554 01:23:08.997161 Write Rank0 MR13 =0x58
555 01:23:08.997261 Write Rank0 MR12 =0x5d
556 01:23:08.997362 Write Rank0 MR1 =0x56
557 01:23:08.997463 Write Rank0 MR2 =0x2d
558 01:23:08.997564 Write Rank0 MR11 =0x23
559 01:23:08.997665 Write Rank0 MR22 =0x34
560 01:23:08.997766 Write Rank0 MR14 =0x10
561 01:23:08.997867 Write Rank0 MR3 =0x30
562 01:23:08.997969 Write Rank0 MR13 =0xd8
563 01:23:08.998069 [ModeRegInit_LP4] CH1 RK1
564 01:23:08.998171 Write Rank1 MR13 =0x18
565 01:23:08.998272 Write Rank1 MR12 =0x5d
566 01:23:08.998374 Write Rank1 MR1 =0x56
567 01:23:08.998477 Write Rank1 MR2 =0x1a
568 01:23:08.998563 Write Rank1 MR11 =0x0
569 01:23:08.998650 Write Rank1 MR22 =0x38
570 01:23:08.998737 Write Rank1 MR14 =0x5d
571 01:23:08.998824 Write Rank1 MR3 =0x30
572 01:23:08.998911 Write Rank1 MR13 =0x58
573 01:23:08.998997 Write Rank1 MR12 =0x5d
574 01:23:08.999084 Write Rank1 MR1 =0x56
575 01:23:08.999171 Write Rank1 MR2 =0x2d
576 01:23:08.999257 Write Rank1 MR11 =0x23
577 01:23:08.999344 Write Rank1 MR22 =0x34
578 01:23:08.999468 Write Rank1 MR14 =0x10
579 01:23:08.999559 Write Rank1 MR3 =0x30
580 01:23:08.999648 Write Rank1 MR13 =0xd8
581 01:23:08.999736 match AC timing 3
582 01:23:08.999825 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
583 01:23:08.999914 [MiockJmeterHQA]
584 01:23:09.000002 vSetVcoreByFreq with vcore:762500, freq=1600
585 01:23:09.000090
586 01:23:09.000179 MIOCK jitter meter ch=0
587 01:23:09.000267
588 01:23:09.000355 1T = (102-17) = 85 dly cells
589 01:23:09.000446 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
590 01:23:09.000536 vSetVcoreByFreq with vcore:725000, freq=1200
591 01:23:09.000626
592 01:23:09.000713 MIOCK jitter meter ch=0
593 01:23:09.000801
594 01:23:09.000889 1T = (97-17) = 80 dly cells
595 01:23:09.000979 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
596 01:23:09.001068 vSetVcoreByFreq with vcore:725000, freq=800
597 01:23:09.001157
598 01:23:09.001246 MIOCK jitter meter ch=0
599 01:23:09.001334
600 01:23:09.001423 1T = (97-17) = 80 dly cells
601 01:23:09.001513 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
602 01:23:09.001603 vSetVcoreByFreq with vcore:762500, freq=1600
603 01:23:09.001691 vSetVcoreByFreq with vcore:762500, freq=1600
604 01:23:09.001779
605 01:23:09.001867 K DRVP
606 01:23:09.001954 1. OCD DRVP=0 CALOUT=0
607 01:23:09.002045 1. OCD DRVP=1 CALOUT=0
608 01:23:09.002135 1. OCD DRVP=2 CALOUT=0
609 01:23:09.002225 1. OCD DRVP=3 CALOUT=0
610 01:23:09.002313 1. OCD DRVP=4 CALOUT=0
611 01:23:09.002403 1. OCD DRVP=5 CALOUT=0
612 01:23:09.002491 1. OCD DRVP=6 CALOUT=0
613 01:23:09.002581 1. OCD DRVP=7 CALOUT=0
614 01:23:09.002670 1. OCD DRVP=8 CALOUT=0
615 01:23:09.002759 1. OCD DRVP=9 CALOUT=1
616 01:23:09.002848
617 01:23:09.002936 1. OCD DRVP calibration OK! DRVP=9
618 01:23:09.003027
619 01:23:09.003114
620 01:23:09.003202
621 01:23:09.003289 K ODTN
622 01:23:09.003387 3. OCD ODTN=0 ,CALOUT=1
623 01:23:09.003481 3. OCD ODTN=1 ,CALOUT=1
624 01:23:09.003561 3. OCD ODTN=2 ,CALOUT=1
625 01:23:09.003639 3. OCD ODTN=3 ,CALOUT=1
626 01:23:09.003717 3. OCD ODTN=4 ,CALOUT=1
627 01:23:09.003795 3. OCD ODTN=5 ,CALOUT=1
628 01:23:09.003873 3. OCD ODTN=6 ,CALOUT=1
629 01:23:09.003950 3. OCD ODTN=7 ,CALOUT=0
630 01:23:09.004029
631 01:23:09.004105 3. OCD ODTN calibration OK! ODTN=7
632 01:23:09.004183
633 01:23:09.004260 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
634 01:23:09.004339 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
635 01:23:09.004417 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
636 01:23:09.004495
637 01:23:09.004572 K DRVP
638 01:23:09.004649 1. OCD DRVP=0 CALOUT=0
639 01:23:09.004729 1. OCD DRVP=1 CALOUT=0
640 01:23:09.004807 1. OCD DRVP=2 CALOUT=0
641 01:23:09.004885 1. OCD DRVP=3 CALOUT=0
642 01:23:09.004964 1. OCD DRVP=4 CALOUT=0
643 01:23:09.005042 1. OCD DRVP=5 CALOUT=0
644 01:23:09.005120 1. OCD DRVP=6 CALOUT=0
645 01:23:09.005197 1. OCD DRVP=7 CALOUT=0
646 01:23:09.005275 1. OCD DRVP=8 CALOUT=0
647 01:23:09.005352 1. OCD DRVP=9 CALOUT=0
648 01:23:09.005431 1. OCD DRVP=10 CALOUT=0
649 01:23:09.005509 1. OCD DRVP=11 CALOUT=1
650 01:23:09.005587
651 01:23:09.005663 1. OCD DRVP calibration OK! DRVP=11
652 01:23:09.005742
653 01:23:09.005819
654 01:23:09.005895
655 01:23:09.005972 K ODTN
656 01:23:09.006049 3. OCD ODTN=0 ,CALOUT=1
657 01:23:09.006328 3. OCD ODTN=1 ,CALOUT=1
658 01:23:09.006415 3. OCD ODTN=2 ,CALOUT=1
659 01:23:09.006496 3. OCD ODTN=3 ,CALOUT=1
660 01:23:09.006576 3. OCD ODTN=4 ,CALOUT=1
661 01:23:09.006655 3. OCD ODTN=5 ,CALOUT=1
662 01:23:09.006734 3. OCD ODTN=6 ,CALOUT=1
663 01:23:09.006813 3. OCD ODTN=7 ,CALOUT=1
664 01:23:09.006891 3. OCD ODTN=8 ,CALOUT=1
665 01:23:09.006970 3. OCD ODTN=9 ,CALOUT=1
666 01:23:09.007049 3. OCD ODTN=10 ,CALOUT=1
667 01:23:09.007128 3. OCD ODTN=11 ,CALOUT=1
668 01:23:09.007206 3. OCD ODTN=12 ,CALOUT=1
669 01:23:09.007285 3. OCD ODTN=13 ,CALOUT=1
670 01:23:09.007363 3. OCD ODTN=14 ,CALOUT=1
671 01:23:09.007456 3. OCD ODTN=15 ,CALOUT=0
672 01:23:09.007537
673 01:23:09.007615 3. OCD ODTN calibration OK! ODTN=15
674 01:23:09.007695
675 01:23:09.007773 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
676 01:23:09.007851 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
677 01:23:09.007929 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
678 01:23:09.008008
679 01:23:09.008085 [DramcInit]
680 01:23:09.008162 AutoRefreshCKEOff AutoREF OFF
681 01:23:09.008239 DDRPhyPLLSetting-CKEOFF
682 01:23:09.008316 DDRPhyPLLSetting-CKEON
683 01:23:09.008402
684 01:23:09.008471 Enable WDQS
685 01:23:09.008540 ==
686 01:23:09.008609 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
687 01:23:09.008679 fsp= 1, odt_onoff= 1, Byte mode= 0
688 01:23:09.008749 ==
689 01:23:09.008818 [Duty_Offset_Calibration]
690 01:23:09.008887
691 01:23:09.008955 ===========================
692 01:23:09.009024 B0:1 B1:1 CA:1
693 01:23:09.009093 ==
694 01:23:09.009163 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
695 01:23:09.009232 fsp= 1, odt_onoff= 1, Byte mode= 0
696 01:23:09.009301 ==
697 01:23:09.009371 [Duty_Offset_Calibration]
698 01:23:09.009439
699 01:23:09.009508 ===========================
700 01:23:09.009577 B0:1 B1:0 CA:2
701 01:23:09.009645 [ModeRegInit_LP4] CH0 RK0
702 01:23:09.009713 Write Rank0 MR13 =0x18
703 01:23:09.009782 Write Rank0 MR12 =0x5d
704 01:23:09.009850 Write Rank0 MR1 =0x56
705 01:23:09.009918 Write Rank0 MR2 =0x1a
706 01:23:09.009986 Write Rank0 MR11 =0x0
707 01:23:09.010054 Write Rank0 MR22 =0x38
708 01:23:09.010122 Write Rank0 MR14 =0x5d
709 01:23:09.010190 Write Rank0 MR3 =0x30
710 01:23:09.010258 Write Rank0 MR13 =0x58
711 01:23:09.010326 Write Rank0 MR12 =0x5d
712 01:23:09.010393 Write Rank0 MR1 =0x56
713 01:23:09.010461 Write Rank0 MR2 =0x2d
714 01:23:09.010529 Write Rank0 MR11 =0x23
715 01:23:09.010597 Write Rank0 MR22 =0x34
716 01:23:09.010666 Write Rank0 MR14 =0x10
717 01:23:09.010733 Write Rank0 MR3 =0x30
718 01:23:09.010802 Write Rank0 MR13 =0xd8
719 01:23:09.010869 [ModeRegInit_LP4] CH0 RK1
720 01:23:09.010937 Write Rank1 MR13 =0x18
721 01:23:09.011005 Write Rank1 MR12 =0x5d
722 01:23:09.011073 Write Rank1 MR1 =0x56
723 01:23:09.011141 Write Rank1 MR2 =0x1a
724 01:23:09.011208 Write Rank1 MR11 =0x0
725 01:23:09.011276 Write Rank1 MR22 =0x38
726 01:23:09.011344 Write Rank1 MR14 =0x5d
727 01:23:09.011422 Write Rank1 MR3 =0x30
728 01:23:09.011505 Write Rank1 MR13 =0x58
729 01:23:09.011574 Write Rank1 MR12 =0x5d
730 01:23:09.011643 Write Rank1 MR1 =0x56
731 01:23:09.011710 Write Rank1 MR2 =0x2d
732 01:23:09.011778 Write Rank1 MR11 =0x23
733 01:23:09.011845 Write Rank1 MR22 =0x34
734 01:23:09.011913 Write Rank1 MR14 =0x10
735 01:23:09.011981 Write Rank1 MR3 =0x30
736 01:23:09.012049 Write Rank1 MR13 =0xd8
737 01:23:09.012116 [ModeRegInit_LP4] CH1 RK0
738 01:23:09.012184 Write Rank0 MR13 =0x18
739 01:23:09.012251 Write Rank0 MR12 =0x5d
740 01:23:09.012319 Write Rank0 MR1 =0x56
741 01:23:09.012386 Write Rank0 MR2 =0x1a
742 01:23:09.012455 Write Rank0 MR11 =0x0
743 01:23:09.012522 Write Rank0 MR22 =0x38
744 01:23:09.012591 Write Rank0 MR14 =0x5d
745 01:23:09.012658 Write Rank0 MR3 =0x30
746 01:23:09.012726 Write Rank0 MR13 =0x58
747 01:23:09.012794 Write Rank0 MR12 =0x5d
748 01:23:09.012861 Write Rank0 MR1 =0x56
749 01:23:09.012928 Write Rank0 MR2 =0x2d
750 01:23:09.012996 Write Rank0 MR11 =0x23
751 01:23:09.013064 Write Rank0 MR22 =0x34
752 01:23:09.013131 Write Rank0 MR14 =0x10
753 01:23:09.013199 Write Rank0 MR3 =0x30
754 01:23:09.013267 Write Rank0 MR13 =0xd8
755 01:23:09.013334 [ModeRegInit_LP4] CH1 RK1
756 01:23:09.013409 Write Rank1 MR13 =0x18
757 01:23:09.013470 Write Rank1 MR12 =0x5d
758 01:23:09.013531 Write Rank1 MR1 =0x56
759 01:23:09.013591 Write Rank1 MR2 =0x1a
760 01:23:09.013694 Write Rank1 MR11 =0x0
761 01:23:09.013804 Write Rank1 MR22 =0x38
762 01:23:09.013871 Write Rank1 MR14 =0x5d
763 01:23:09.013934 Write Rank1 MR3 =0x30
764 01:23:09.013996 Write Rank1 MR13 =0x58
765 01:23:09.014058 Write Rank1 MR12 =0x5d
766 01:23:09.014119 Write Rank1 MR1 =0x56
767 01:23:09.014180 Write Rank1 MR2 =0x2d
768 01:23:09.014242 Write Rank1 MR11 =0x23
769 01:23:09.014302 Write Rank1 MR22 =0x34
770 01:23:09.014364 Write Rank1 MR14 =0x10
771 01:23:09.014425 Write Rank1 MR3 =0x30
772 01:23:09.014486 Write Rank1 MR13 =0xd8
773 01:23:09.014547 match AC timing 3
774 01:23:09.014609 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
775 01:23:09.014672 DramC Write-DBI off
776 01:23:09.014733 DramC Read-DBI off
777 01:23:09.014795 Write Rank0 MR13 =0x59
778 01:23:09.014857 ==
779 01:23:09.014919 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
780 01:23:09.014982 fsp= 1, odt_onoff= 1, Byte mode= 0
781 01:23:09.015044 ==
782 01:23:09.015105 === u2Vref_new: 0x56 --> 0x2d
783 01:23:09.015167 === u2Vref_new: 0x58 --> 0x38
784 01:23:09.015231 === u2Vref_new: 0x5a --> 0x39
785 01:23:09.015293 === u2Vref_new: 0x5c --> 0x3c
786 01:23:09.015354 === u2Vref_new: 0x5e --> 0x3d
787 01:23:09.015424 === u2Vref_new: 0x60 --> 0xa0
788 01:23:09.015488 [CA 0] Center 34 (6~63) winsize 58
789 01:23:09.015549 [CA 1] Center 36 (9~63) winsize 55
790 01:23:09.015611 [CA 2] Center 29 (0~58) winsize 59
791 01:23:09.015672 [CA 3] Center 25 (-2~52) winsize 55
792 01:23:09.015734 [CA 4] Center 25 (-3~54) winsize 58
793 01:23:09.015795 [CA 5] Center 30 (0~60) winsize 61
794 01:23:09.015856
795 01:23:09.015918 [CATrainingPosCal] consider 1 rank data
796 01:23:09.015979 u2DelayCellTimex100 = 735/100 ps
797 01:23:09.016040 CA0 delay=34 (6~63),Diff = 9 PI (11 cell)
798 01:23:09.016102 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
799 01:23:09.016164 CA2 delay=29 (0~58),Diff = 4 PI (5 cell)
800 01:23:09.016226 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
801 01:23:09.016287 CA4 delay=25 (-3~54),Diff = 0 PI (0 cell)
802 01:23:09.016349 CA5 delay=30 (0~60),Diff = 5 PI (6 cell)
803 01:23:09.016410
804 01:23:09.016472 CA PerBit enable=1, Macro0, CA PI delay=25
805 01:23:09.016534 === u2Vref_new: 0x5e --> 0x3d
806 01:23:09.016596
807 01:23:09.016657 Vref(ca) range 1: 30
808 01:23:09.016719
809 01:23:09.016780 CS Dly= 9 (40-0-32)
810 01:23:09.016843 Write Rank0 MR13 =0xd8
811 01:23:09.016904 Write Rank0 MR13 =0xd8
812 01:23:09.016965 Write Rank0 MR12 =0x5e
813 01:23:09.017027 Write Rank1 MR13 =0x59
814 01:23:09.017088 ==
815 01:23:09.017150 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
816 01:23:09.017429 fsp= 1, odt_onoff= 1, Byte mode= 0
817 01:23:09.017498 ==
818 01:23:09.017561 === u2Vref_new: 0x56 --> 0x2d
819 01:23:09.017624 === u2Vref_new: 0x58 --> 0x38
820 01:23:09.017687 === u2Vref_new: 0x5a --> 0x39
821 01:23:09.017748 === u2Vref_new: 0x5c --> 0x3c
822 01:23:09.017810 === u2Vref_new: 0x5e --> 0x3d
823 01:23:09.017872 === u2Vref_new: 0x60 --> 0xa0
824 01:23:09.017934 [CA 0] Center 36 (9~63) winsize 55
825 01:23:09.017995 [CA 1] Center 36 (9~63) winsize 55
826 01:23:09.018056 [CA 2] Center 31 (2~60) winsize 59
827 01:23:09.018117 [CA 3] Center 26 (-2~54) winsize 57
828 01:23:09.018179 [CA 4] Center 26 (-2~54) winsize 57
829 01:23:09.018240 [CA 5] Center 31 (2~61) winsize 60
830 01:23:09.018301
831 01:23:09.018363 [CATrainingPosCal] consider 2 rank data
832 01:23:09.018425 u2DelayCellTimex100 = 735/100 ps
833 01:23:09.018487 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
834 01:23:09.018549 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
835 01:23:09.018610 CA2 delay=30 (2~58),Diff = 5 PI (6 cell)
836 01:23:09.018671 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
837 01:23:09.018733 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
838 01:23:09.018794 CA5 delay=31 (2~60),Diff = 6 PI (7 cell)
839 01:23:09.018855
840 01:23:09.018917 CA PerBit enable=1, Macro0, CA PI delay=25
841 01:23:09.018979 === u2Vref_new: 0x5c --> 0x3c
842 01:23:09.019041
843 01:23:09.019102 Vref(ca) range 1: 28
844 01:23:09.019164
845 01:23:09.019225 CS Dly= 7 (38-0-32)
846 01:23:09.019286 Write Rank1 MR13 =0xd8
847 01:23:09.019348 Write Rank1 MR13 =0xd8
848 01:23:09.019418 Write Rank1 MR12 =0x5c
849 01:23:09.019488 [RankSwap] Rank num 2, (Multi 1), Rank 0
850 01:23:09.019551 Write Rank0 MR2 =0xad
851 01:23:09.019612 [Write Leveling]
852 01:23:09.019674 delay byte0 byte1 byte2 byte3
853 01:23:09.019736
854 01:23:09.019798 10 0 0
855 01:23:09.019861 11 0 0
856 01:23:09.019923 12 0 0
857 01:23:09.019986 13 0 0
858 01:23:09.020048 14 0 0
859 01:23:09.020110 15 0 0
860 01:23:09.020173 16 0 0
861 01:23:09.020235 17 0 0
862 01:23:09.020298 18 0 0
863 01:23:09.020360 19 0 0
864 01:23:09.020422 20 0 0
865 01:23:09.020484 21 0 0
866 01:23:09.020546 22 0 0
867 01:23:09.020608 23 0 ff
868 01:23:09.020670 24 0 ff
869 01:23:09.020731 25 0 ff
870 01:23:09.020794 26 0 ff
871 01:23:09.020856 27 0 ff
872 01:23:09.020918 28 0 ff
873 01:23:09.020980 29 0 ff
874 01:23:09.021054 30 0 ff
875 01:23:09.021163 31 0 ff
876 01:23:09.021231 32 0 ff
877 01:23:09.021293 33 ff ff
878 01:23:09.021357 34 ff ff
879 01:23:09.021419 35 ff ff
880 01:23:09.021481 36 ff ff
881 01:23:09.021543 37 ff ff
882 01:23:09.021605 38 ff ff
883 01:23:09.021668 39 ff ff
884 01:23:09.021731 pass bytecount = 0xff (0xff: all bytes pass)
885 01:23:09.021793
886 01:23:09.021855 DQS0 dly: 33
887 01:23:09.021917 DQS1 dly: 23
888 01:23:09.021979 Write Rank0 MR2 =0x2d
889 01:23:09.022041 [RankSwap] Rank num 2, (Multi 1), Rank 0
890 01:23:09.022103 Write Rank0 MR1 =0xd6
891 01:23:09.022165 [Gating]
892 01:23:09.022227 ==
893 01:23:09.022288 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
894 01:23:09.022351 fsp= 1, odt_onoff= 1, Byte mode= 0
895 01:23:09.022413 ==
896 01:23:09.022475 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
897 01:23:09.022539 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
898 01:23:09.022603 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
899 01:23:09.022666 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
900 01:23:09.022730 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
901 01:23:09.022792 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
902 01:23:09.022854 3 1 24 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
903 01:23:09.022917 3 1 28 |1515 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
904 01:23:09.022980 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
905 01:23:09.023044 3 2 4 |3534 100f |(11 11)(11 11) |(0 0)(1 1)| 0
906 01:23:09.023107 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
907 01:23:09.023169 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
908 01:23:09.023232 3 2 16 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
909 01:23:09.023295 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
910 01:23:09.023358 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
911 01:23:09.023429 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
912 01:23:09.023498 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
913 01:23:09.023561 3 3 4 |3534 2524 |(11 11)(11 11) |(0 0)(1 1)| 0
914 01:23:09.023624 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
915 01:23:09.023687 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
916 01:23:09.023750 [Byte 1] Lead/lag falling Transition (3, 3, 12)
917 01:23:09.023812 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
918 01:23:09.023875 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
919 01:23:09.023938 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
920 01:23:09.024001 3 3 28 |b0a 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
921 01:23:09.024064 3 4 0 |3d3d 504 |(11 11)(11 11) |(1 1)(0 1)| 0
922 01:23:09.024126 3 4 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
923 01:23:09.024189 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
924 01:23:09.024251 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
925 01:23:09.024313 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
926 01:23:09.024376 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
927 01:23:09.024439 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 01:23:09.024502 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 01:23:09.024564 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 01:23:09.024627 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 01:23:09.024689 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 01:23:09.024751 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 01:23:09.024813 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 01:23:09.024875 [Byte 0] Lead/lag falling Transition (3, 5, 16)
935 01:23:09.024937 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
936 01:23:09.025000 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
937 01:23:09.025063 [Byte 0] Lead/lag Transition tap number (3)
938 01:23:09.025125 [Byte 1] Lead/lag falling Transition (3, 5, 24)
939 01:23:09.025186 3 5 28 |1414 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
940 01:23:09.025447 [Byte 1] Lead/lag Transition tap number (2)
941 01:23:09.025516 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
942 01:23:09.025581 [Byte 0]First pass (3, 6, 0)
943 01:23:09.025642 3 6 4 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
944 01:23:09.025706 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
945 01:23:09.025769 [Byte 1]First pass (3, 6, 8)
946 01:23:09.025831 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
947 01:23:09.025893 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
948 01:23:09.025956 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 01:23:09.026018 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
950 01:23:09.026090 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 01:23:09.026155 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 01:23:09.026218 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 01:23:09.026281 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 01:23:09.026343 All bytes gating window > 1UI, Early break!
955 01:23:09.026405
956 01:23:09.026466 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 22)
957 01:23:09.026528
958 01:23:09.026589 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
959 01:23:09.026651
960 01:23:09.026712
961 01:23:09.026772
962 01:23:09.026833 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 22)
963 01:23:09.026895
964 01:23:09.026956 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
965 01:23:09.027017
966 01:23:09.027078
967 01:23:09.027138 Write Rank0 MR1 =0x56
968 01:23:09.027200
969 01:23:09.027260 best RODT dly(2T, 0.5T) = (2, 2)
970 01:23:09.027321
971 01:23:09.027382 best RODT dly(2T, 0.5T) = (2, 2)
972 01:23:09.027457 ==
973 01:23:09.027519 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
974 01:23:09.027582 fsp= 1, odt_onoff= 1, Byte mode= 0
975 01:23:09.027644 ==
976 01:23:09.027706 Start DQ dly to find pass range UseTestEngine =0
977 01:23:09.027768 x-axis: bit #, y-axis: DQ dly (-127~63)
978 01:23:09.027830 RX Vref Scan = 0
979 01:23:09.027891 -26, [0] xxxxxxxx xxxxxxxx [MSB]
980 01:23:09.027956 -25, [0] xxxxxxxx xxxxxxxx [MSB]
981 01:23:09.028019 -24, [0] xxxxxxxx xxxxxxxx [MSB]
982 01:23:09.028082 -23, [0] xxxxxxxx xxxxxxxx [MSB]
983 01:23:09.028144 -22, [0] xxxxxxxx xxxxxxxx [MSB]
984 01:23:09.028206 -21, [0] xxxxxxxx xxxxxxxx [MSB]
985 01:23:09.028268 -20, [0] xxxxxxxx xxxxxxxx [MSB]
986 01:23:09.028331 -19, [0] xxxxxxxx xxxxxxxx [MSB]
987 01:23:09.028393 -18, [0] xxxxxxxx xxxxxxxx [MSB]
988 01:23:09.028456 -17, [0] xxxxxxxx xxxxxxxx [MSB]
989 01:23:09.028518 -16, [0] xxxxxxxx xxxxxxxx [MSB]
990 01:23:09.028580 -15, [0] xxxxxxxx xxxxxxxx [MSB]
991 01:23:09.028642 -14, [0] xxxxxxxx xxxxxxxx [MSB]
992 01:23:09.028704 -13, [0] xxxxxxxx xxxxxxxx [MSB]
993 01:23:09.028767 -12, [0] xxxxxxxx xxxxxxxx [MSB]
994 01:23:09.028830 -11, [0] xxxxxxxx xxxxxxxx [MSB]
995 01:23:09.028892 -10, [0] xxxxxxxx xxxxxxxx [MSB]
996 01:23:09.028954 -9, [0] xxxxxxxx xxxxxxxx [MSB]
997 01:23:09.029017 -8, [0] xxxxxxxx xxxxxxxx [MSB]
998 01:23:09.029080 -7, [0] xxxxxxxx xxxxxxxx [MSB]
999 01:23:09.029142 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1000 01:23:09.029204 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1001 01:23:09.029266 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1002 01:23:09.029328 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1003 01:23:09.029389 -2, [0] xxxoxxxx oxxxxxxx [MSB]
1004 01:23:09.029452 -1, [0] xxxoxxxx oxxxxxxx [MSB]
1005 01:23:09.029514 0, [0] xxxoxxxx ooxoxxxx [MSB]
1006 01:23:09.029576 1, [0] xxxoxoox ooxoooxx [MSB]
1007 01:23:09.029639 2, [0] xxxoxoox ooxoooxx [MSB]
1008 01:23:09.029701 3, [0] xxxoxooo ooxoooox [MSB]
1009 01:23:09.029763 4, [0] xoooxooo ooxooooo [MSB]
1010 01:23:09.029824 5, [0] xooooooo ooxooooo [MSB]
1011 01:23:09.029889 6, [0] xooooooo ooxooooo [MSB]
1012 01:23:09.029952 7, [0] oooooooo ooxooooo [MSB]
1013 01:23:09.030015 32, [0] oooxoooo xooooooo [MSB]
1014 01:23:09.030078 33, [0] oooxoooo xooooooo [MSB]
1015 01:23:09.030140 34, [0] oooxoooo xooooooo [MSB]
1016 01:23:09.030202 35, [0] oooxoooo xooooooo [MSB]
1017 01:23:09.030264 36, [0] oooxoxoo xooxoooo [MSB]
1018 01:23:09.030326 37, [0] oooxoxxx xxoxxoxo [MSB]
1019 01:23:09.030387 38, [0] oooxoxxx xxoxxoxo [MSB]
1020 01:23:09.030449 39, [0] oooxxxxx xxoxxxxo [MSB]
1021 01:23:09.030511 40, [0] xooxxxxx xxoxxxxo [MSB]
1022 01:23:09.030574 41, [0] xxxxxxxx xxoxxxxo [MSB]
1023 01:23:09.030636 42, [0] xxxxxxxx xxoxxxxx [MSB]
1024 01:23:09.030698 43, [0] xxxxxxxx xxxxxxxx [MSB]
1025 01:23:09.030769 iDelay=43, Bit 0, Center 23 (7 ~ 39) 33
1026 01:23:09.030833 iDelay=43, Bit 1, Center 22 (4 ~ 40) 37
1027 01:23:09.030895 iDelay=43, Bit 2, Center 22 (4 ~ 40) 37
1028 01:23:09.030956 iDelay=43, Bit 3, Center 14 (-2 ~ 31) 34
1029 01:23:09.031017 iDelay=43, Bit 4, Center 21 (5 ~ 38) 34
1030 01:23:09.031077 iDelay=43, Bit 5, Center 18 (1 ~ 35) 35
1031 01:23:09.031136 iDelay=43, Bit 6, Center 18 (1 ~ 36) 36
1032 01:23:09.031197 iDelay=43, Bit 7, Center 19 (3 ~ 36) 34
1033 01:23:09.031257 iDelay=43, Bit 8, Center 14 (-2 ~ 31) 34
1034 01:23:09.031317 iDelay=43, Bit 9, Center 18 (0 ~ 36) 37
1035 01:23:09.031377 iDelay=43, Bit 10, Center 25 (8 ~ 42) 35
1036 01:23:09.031448 iDelay=43, Bit 11, Center 17 (0 ~ 35) 36
1037 01:23:09.031509 iDelay=43, Bit 12, Center 18 (1 ~ 36) 36
1038 01:23:09.031570 iDelay=43, Bit 13, Center 19 (1 ~ 38) 38
1039 01:23:09.031630 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
1040 01:23:09.031690 iDelay=43, Bit 15, Center 22 (4 ~ 41) 38
1041 01:23:09.031751 ==
1042 01:23:09.031811 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1043 01:23:09.031872 fsp= 1, odt_onoff= 1, Byte mode= 0
1044 01:23:09.031933 ==
1045 01:23:09.031994 DQS Delay:
1046 01:23:09.032054 DQS0 = 0, DQS1 = 0
1047 01:23:09.032115 DQM Delay:
1048 01:23:09.032175 DQM0 = 19, DQM1 = 19
1049 01:23:09.032235 DQ Delay:
1050 01:23:09.032295 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =14
1051 01:23:09.032355 DQ4 =21, DQ5 =18, DQ6 =18, DQ7 =19
1052 01:23:09.032415 DQ8 =14, DQ9 =18, DQ10 =25, DQ11 =17
1053 01:23:09.032475 DQ12 =18, DQ13 =19, DQ14 =19, DQ15 =22
1054 01:23:09.032535
1055 01:23:09.032595
1056 01:23:09.032655 DramC Write-DBI off
1057 01:23:09.032716 ==
1058 01:23:09.032776 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1059 01:23:09.032836 fsp= 1, odt_onoff= 1, Byte mode= 0
1060 01:23:09.032896 ==
1061 01:23:09.032956 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1062 01:23:09.033016
1063 01:23:09.033076 Begin, DQ Scan Range 919~1175
1064 01:23:09.033136
1065 01:23:09.033195
1066 01:23:09.033255 TX Vref Scan disable
1067 01:23:09.033315 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1068 01:23:09.033378 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1069 01:23:09.033439 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1070 01:23:09.033500 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1071 01:23:09.033562 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1072 01:23:09.033821 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1073 01:23:09.033889 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1074 01:23:09.033952 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1075 01:23:09.034014 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1076 01:23:09.034076 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1077 01:23:09.034137 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1078 01:23:09.034199 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1079 01:23:09.034260 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1080 01:23:09.034322 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1081 01:23:09.034384 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1082 01:23:09.034446 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1083 01:23:09.034507 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1084 01:23:09.034569 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1085 01:23:09.034630 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1086 01:23:09.034691 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1087 01:23:09.034753 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1088 01:23:09.034814 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1089 01:23:09.034876 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1090 01:23:09.034937 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1091 01:23:09.034998 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1092 01:23:09.035059 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1093 01:23:09.035121 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1094 01:23:09.035182 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1095 01:23:09.035242 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1096 01:23:09.035303 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1097 01:23:09.035365 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1098 01:23:09.035436 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1099 01:23:09.035499 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1100 01:23:09.035560 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1101 01:23:09.035622 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1102 01:23:09.035683 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1103 01:23:09.035755 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1104 01:23:09.035818 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1105 01:23:09.035880 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1106 01:23:09.035941 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1107 01:23:09.036003 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1108 01:23:09.036066 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1109 01:23:09.036127 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1110 01:23:09.036189 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1111 01:23:09.036251 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1112 01:23:09.036312 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1113 01:23:09.036373 965 |3 6 5|[0] xxxxxxxx oxxoxxxx [MSB]
1114 01:23:09.036435 966 |3 6 6|[0] xxxxxxxx ooxoxxxx [MSB]
1115 01:23:09.036496 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1116 01:23:09.036558 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1117 01:23:09.036619 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1118 01:23:09.036681 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1119 01:23:09.036742 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1120 01:23:09.036803 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1121 01:23:09.036864 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1122 01:23:09.036926 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1123 01:23:09.036988 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1124 01:23:09.037049 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1125 01:23:09.037129 977 |3 6 17|[0] xooooooo oooooooo [MSB]
1126 01:23:09.037192 984 |3 6 24|[0] oooooooo xooooooo [MSB]
1127 01:23:09.037255 985 |3 6 25|[0] oooooooo xooxoooo [MSB]
1128 01:23:09.037317 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1129 01:23:09.037379 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1130 01:23:09.037440 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1131 01:23:09.037501 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1132 01:23:09.037564 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1133 01:23:09.037625 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1134 01:23:09.037687 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1135 01:23:09.037748 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1136 01:23:09.037810 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1137 01:23:09.037871 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1138 01:23:09.037933 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1139 01:23:09.037995 997 |3 6 37|[0] oooxoxxx xxxxxxxx [MSB]
1140 01:23:09.038056 998 |3 6 38|[0] oooxoxxx xxxxxxxx [MSB]
1141 01:23:09.038118 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1142 01:23:09.038179 Byte0, DQ PI dly=986, DQM PI dly= 986
1143 01:23:09.038239 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1144 01:23:09.038300
1145 01:23:09.038360 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1146 01:23:09.038420
1147 01:23:09.038480 Byte1, DQ PI dly=975, DQM PI dly= 975
1148 01:23:09.038540 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1149 01:23:09.038601
1150 01:23:09.038661 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1151 01:23:09.038722
1152 01:23:09.038782 ==
1153 01:23:09.038842 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1154 01:23:09.038903 fsp= 1, odt_onoff= 1, Byte mode= 0
1155 01:23:09.038978 ==
1156 01:23:09.039073 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1157 01:23:09.039172
1158 01:23:09.039266 Begin, DQ Scan Range 951~1015
1159 01:23:09.039359 Write Rank0 MR14 =0x0
1160 01:23:09.039447
1161 01:23:09.039509 CH=0, VrefRange= 0, VrefLevel = 0
1162 01:23:09.039571 TX Bit0 (980~994) 15 987, Bit8 (966~977) 12 971,
1163 01:23:09.039633 TX Bit1 (978~993) 16 985, Bit9 (968~982) 15 975,
1164 01:23:09.039695 TX Bit2 (979~994) 16 986, Bit10 (974~985) 12 979,
1165 01:23:09.039756 TX Bit3 (976~987) 12 981, Bit11 (967~979) 13 973,
1166 01:23:09.039817 TX Bit4 (979~992) 14 985, Bit12 (969~982) 14 975,
1167 01:23:09.039878 TX Bit5 (977~991) 15 984, Bit13 (969~983) 15 976,
1168 01:23:09.039939 TX Bit6 (978~991) 14 984, Bit14 (968~983) 16 975,
1169 01:23:09.040001 TX Bit7 (979~992) 14 985, Bit15 (974~984) 11 979,
1170 01:23:09.040061
1171 01:23:09.040122 Write Rank0 MR14 =0x2
1172 01:23:09.040183
1173 01:23:09.040243 CH=0, VrefRange= 0, VrefLevel = 2
1174 01:23:09.040304 TX Bit0 (979~995) 17 987, Bit8 (966~978) 13 972,
1175 01:23:09.040365 TX Bit1 (978~993) 16 985, Bit9 (968~983) 16 975,
1176 01:23:09.040426 TX Bit2 (980~995) 16 987, Bit10 (974~986) 13 980,
1177 01:23:09.040487 TX Bit3 (976~988) 13 982, Bit11 (967~981) 15 974,
1178 01:23:09.040745 TX Bit4 (979~993) 15 986, Bit12 (969~983) 15 976,
1179 01:23:09.040812 TX Bit5 (977~992) 16 984, Bit13 (968~983) 16 975,
1180 01:23:09.040874 TX Bit6 (977~992) 16 984, Bit14 (968~984) 17 976,
1181 01:23:09.040935 TX Bit7 (979~993) 15 986, Bit15 (973~985) 13 979,
1182 01:23:09.040997
1183 01:23:09.041057 Write Rank0 MR14 =0x4
1184 01:23:09.041120
1185 01:23:09.041180 CH=0, VrefRange= 0, VrefLevel = 4
1186 01:23:09.041241 TX Bit0 (979~996) 18 987, Bit8 (966~978) 13 972,
1187 01:23:09.041302 TX Bit1 (978~994) 17 986, Bit9 (968~983) 16 975,
1188 01:23:09.041363 TX Bit2 (979~995) 17 987, Bit10 (974~987) 14 980,
1189 01:23:09.041423 TX Bit3 (975~990) 16 982, Bit11 (967~982) 16 974,
1190 01:23:09.041483 TX Bit4 (978~993) 16 985, Bit12 (969~983) 15 976,
1191 01:23:09.041544 TX Bit5 (977~992) 16 984, Bit13 (968~983) 16 975,
1192 01:23:09.041604 TX Bit6 (977~992) 16 984, Bit14 (968~984) 17 976,
1193 01:23:09.041670 TX Bit7 (979~993) 15 986, Bit15 (972~986) 15 979,
1194 01:23:09.041754
1195 01:23:09.041833 Write Rank0 MR14 =0x6
1196 01:23:09.041944
1197 01:23:09.042039 CH=0, VrefRange= 0, VrefLevel = 6
1198 01:23:09.042134 TX Bit0 (979~997) 19 988, Bit8 (966~980) 15 973,
1199 01:23:09.042232 TX Bit1 (978~995) 18 986, Bit9 (967~984) 18 975,
1200 01:23:09.042298 TX Bit2 (979~996) 18 987, Bit10 (972~987) 16 979,
1201 01:23:09.042395 TX Bit3 (975~990) 16 982, Bit11 (967~982) 16 974,
1202 01:23:09.042461 TX Bit4 (978~993) 16 985, Bit12 (968~984) 17 976,
1203 01:23:09.042534 TX Bit5 (976~993) 18 984, Bit13 (968~984) 17 976,
1204 01:23:09.042597 TX Bit6 (977~993) 17 985, Bit14 (968~985) 18 976,
1205 01:23:09.042659 TX Bit7 (978~994) 17 986, Bit15 (972~986) 15 979,
1206 01:23:09.042720
1207 01:23:09.042780 Write Rank0 MR14 =0x8
1208 01:23:09.042841
1209 01:23:09.042902 CH=0, VrefRange= 0, VrefLevel = 8
1210 01:23:09.042972 TX Bit0 (979~997) 19 988, Bit8 (966~981) 16 973,
1211 01:23:09.043034 TX Bit1 (978~996) 19 987, Bit9 (967~984) 18 975,
1212 01:23:09.043096 TX Bit2 (978~997) 20 987, Bit10 (972~989) 18 980,
1213 01:23:09.043158 TX Bit3 (974~991) 18 982, Bit11 (967~983) 17 975,
1214 01:23:09.043219 TX Bit4 (978~994) 17 986, Bit12 (968~984) 17 976,
1215 01:23:09.043289 TX Bit5 (976~993) 18 984, Bit13 (968~984) 17 976,
1216 01:23:09.043390 TX Bit6 (977~993) 17 985, Bit14 (967~985) 19 976,
1217 01:23:09.043503 TX Bit7 (978~994) 17 986, Bit15 (971~987) 17 979,
1218 01:23:09.043589
1219 01:23:09.043654 Write Rank0 MR14 =0xa
1220 01:23:09.043717
1221 01:23:09.043778 CH=0, VrefRange= 0, VrefLevel = 10
1222 01:23:09.043839 TX Bit0 (978~998) 21 988, Bit8 (965~982) 18 973,
1223 01:23:09.043901 TX Bit1 (977~996) 20 986, Bit9 (967~984) 18 975,
1224 01:23:09.043962 TX Bit2 (979~998) 20 988, Bit10 (973~989) 17 981,
1225 01:23:09.044023 TX Bit3 (974~991) 18 982, Bit11 (966~983) 18 974,
1226 01:23:09.044083 TX Bit4 (977~995) 19 986, Bit12 (968~984) 17 976,
1227 01:23:09.044144 TX Bit5 (976~994) 19 985, Bit13 (968~984) 17 976,
1228 01:23:09.044205 TX Bit6 (977~994) 18 985, Bit14 (967~986) 20 976,
1229 01:23:09.044266 TX Bit7 (978~995) 18 986, Bit15 (971~989) 19 980,
1230 01:23:09.044326
1231 01:23:09.044386 Write Rank0 MR14 =0xc
1232 01:23:09.044446
1233 01:23:09.044506 CH=0, VrefRange= 0, VrefLevel = 12
1234 01:23:09.044567 TX Bit0 (978~999) 22 988, Bit8 (965~982) 18 973,
1235 01:23:09.044628 TX Bit1 (977~997) 21 987, Bit9 (967~985) 19 976,
1236 01:23:09.044689 TX Bit2 (978~999) 22 988, Bit10 (971~990) 20 980,
1237 01:23:09.044750 TX Bit3 (973~992) 20 982, Bit11 (966~983) 18 974,
1238 01:23:09.044818 TX Bit4 (977~996) 20 986, Bit12 (968~985) 18 976,
1239 01:23:09.044880 TX Bit5 (976~994) 19 985, Bit13 (967~985) 19 976,
1240 01:23:09.044941 TX Bit6 (977~994) 18 985, Bit14 (967~986) 20 976,
1241 01:23:09.045002 TX Bit7 (978~995) 18 986, Bit15 (971~989) 19 980,
1242 01:23:09.045062
1243 01:23:09.045122 Write Rank0 MR14 =0xe
1244 01:23:09.045183
1245 01:23:09.045243 CH=0, VrefRange= 0, VrefLevel = 14
1246 01:23:09.045304 TX Bit0 (978~999) 22 988, Bit8 (965~982) 18 973,
1247 01:23:09.045365 TX Bit1 (977~998) 22 987, Bit9 (967~985) 19 976,
1248 01:23:09.045426 TX Bit2 (977~999) 23 988, Bit10 (971~990) 20 980,
1249 01:23:09.045487 TX Bit3 (973~992) 20 982, Bit11 (966~984) 19 975,
1250 01:23:09.045547 TX Bit4 (977~997) 21 987, Bit12 (967~985) 19 976,
1251 01:23:09.045607 TX Bit5 (975~994) 20 984, Bit13 (967~985) 19 976,
1252 01:23:09.045668 TX Bit6 (976~995) 20 985, Bit14 (967~987) 21 977,
1253 01:23:09.045729 TX Bit7 (977~996) 20 986, Bit15 (970~990) 21 980,
1254 01:23:09.045790
1255 01:23:09.045850 Write Rank0 MR14 =0x10
1256 01:23:09.045910
1257 01:23:09.045970 CH=0, VrefRange= 0, VrefLevel = 16
1258 01:23:09.046031 TX Bit0 (978~999) 22 988, Bit8 (965~983) 19 974,
1259 01:23:09.046092 TX Bit1 (977~998) 22 987, Bit9 (967~985) 19 976,
1260 01:23:09.046152 TX Bit2 (977~999) 23 988, Bit10 (971~991) 21 981,
1261 01:23:09.046213 TX Bit3 (973~992) 20 982, Bit11 (965~984) 20 974,
1262 01:23:09.046274 TX Bit4 (977~997) 21 987, Bit12 (967~985) 19 976,
1263 01:23:09.046334 TX Bit5 (975~995) 21 985, Bit13 (967~986) 20 976,
1264 01:23:09.046395 TX Bit6 (976~996) 21 986, Bit14 (966~987) 22 976,
1265 01:23:09.046455 TX Bit7 (977~997) 21 987, Bit15 (970~990) 21 980,
1266 01:23:09.046515
1267 01:23:09.046576 Write Rank0 MR14 =0x12
1268 01:23:09.046635
1269 01:23:09.046695 CH=0, VrefRange= 0, VrefLevel = 18
1270 01:23:09.046754 TX Bit0 (977~1000) 24 988, Bit8 (964~983) 20 973,
1271 01:23:09.046815 TX Bit1 (977~999) 23 988, Bit9 (966~986) 21 976,
1272 01:23:09.046876 TX Bit2 (977~999) 23 988, Bit10 (970~991) 22 980,
1273 01:23:09.046936 TX Bit3 (972~993) 22 982, Bit11 (965~985) 21 975,
1274 01:23:09.046997 TX Bit4 (977~997) 21 987, Bit12 (967~986) 20 976,
1275 01:23:09.047058 TX Bit5 (975~996) 22 985, Bit13 (967~987) 21 977,
1276 01:23:09.047118 TX Bit6 (976~996) 21 986, Bit14 (966~988) 23 977,
1277 01:23:09.047179 TX Bit7 (977~998) 22 987, Bit15 (969~990) 22 979,
1278 01:23:09.047239
1279 01:23:09.047455 Write Rank0 MR14 =0x14
1280 01:23:09.047523
1281 01:23:09.047585 CH=0, VrefRange= 0, VrefLevel = 20
1282 01:23:09.047647 TX Bit0 (977~1000) 24 988, Bit8 (963~984) 22 973,
1283 01:23:09.047710 TX Bit1 (977~999) 23 988, Bit9 (966~986) 21 976,
1284 01:23:09.047771 TX Bit2 (978~1000) 23 989, Bit10 (970~991) 22 980,
1285 01:23:09.047834 TX Bit3 (972~993) 22 982, Bit11 (965~985) 21 975,
1286 01:23:09.047895 TX Bit4 (977~999) 23 988, Bit12 (967~987) 21 977,
1287 01:23:09.047956 TX Bit5 (975~996) 22 985, Bit13 (967~987) 21 977,
1288 01:23:09.048017 TX Bit6 (976~997) 22 986, Bit14 (966~989) 24 977,
1289 01:23:09.048078 TX Bit7 (977~998) 22 987, Bit15 (969~991) 23 980,
1290 01:23:09.048138
1291 01:23:09.048199 Write Rank0 MR14 =0x16
1292 01:23:09.048260
1293 01:23:09.048320 CH=0, VrefRange= 0, VrefLevel = 22
1294 01:23:09.048381 TX Bit0 (977~1000) 24 988, Bit8 (963~984) 22 973,
1295 01:23:09.048442 TX Bit1 (976~999) 24 987, Bit9 (966~987) 22 976,
1296 01:23:09.048502 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1297 01:23:09.048563 TX Bit3 (971~994) 24 982, Bit11 (965~986) 22 975,
1298 01:23:09.048624 TX Bit4 (976~999) 24 987, Bit12 (967~987) 21 977,
1299 01:23:09.048684 TX Bit5 (974~996) 23 985, Bit13 (966~987) 22 976,
1300 01:23:09.048745 TX Bit6 (975~998) 24 986, Bit14 (966~990) 25 978,
1301 01:23:09.048806 TX Bit7 (977~999) 23 988, Bit15 (969~991) 23 980,
1302 01:23:09.048867
1303 01:23:09.048927 Write Rank0 MR14 =0x18
1304 01:23:09.048987
1305 01:23:09.049047 CH=0, VrefRange= 0, VrefLevel = 24
1306 01:23:09.049108 TX Bit0 (977~1000) 24 988, Bit8 (962~984) 23 973,
1307 01:23:09.049169 TX Bit1 (977~1000) 24 988, Bit9 (966~987) 22 976,
1308 01:23:09.049230 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1309 01:23:09.049291 TX Bit3 (971~994) 24 982, Bit11 (964~986) 23 975,
1310 01:23:09.049351 TX Bit4 (976~999) 24 987, Bit12 (967~989) 23 978,
1311 01:23:09.049412 TX Bit5 (974~997) 24 985, Bit13 (966~989) 24 977,
1312 01:23:09.049473 TX Bit6 (975~998) 24 986, Bit14 (966~990) 25 978,
1313 01:23:09.049534 TX Bit7 (977~999) 23 988, Bit15 (969~991) 23 980,
1314 01:23:09.049594
1315 01:23:09.049657 Write Rank0 MR14 =0x1a
1316 01:23:09.049717
1317 01:23:09.049777 CH=0, VrefRange= 0, VrefLevel = 26
1318 01:23:09.049837 TX Bit0 (977~1001) 25 989, Bit8 (962~985) 24 973,
1319 01:23:09.049898 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1320 01:23:09.049958 TX Bit2 (976~1000) 25 988, Bit10 (968~992) 25 980,
1321 01:23:09.050019 TX Bit3 (971~994) 24 982, Bit11 (964~986) 23 975,
1322 01:23:09.050080 TX Bit4 (976~999) 24 987, Bit12 (966~989) 24 977,
1323 01:23:09.050141 TX Bit5 (973~998) 26 985, Bit13 (966~989) 24 977,
1324 01:23:09.050202 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1325 01:23:09.050262 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1326 01:23:09.050323
1327 01:23:09.050383 Write Rank0 MR14 =0x1c
1328 01:23:09.050443
1329 01:23:09.050504 CH=0, VrefRange= 0, VrefLevel = 28
1330 01:23:09.050564 TX Bit0 (977~1001) 25 989, Bit8 (962~985) 24 973,
1331 01:23:09.050625 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1332 01:23:09.050685 TX Bit2 (977~1001) 25 989, Bit10 (969~993) 25 981,
1333 01:23:09.050746 TX Bit3 (970~995) 26 982, Bit11 (964~987) 24 975,
1334 01:23:09.050807 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1335 01:23:09.050867 TX Bit5 (973~998) 26 985, Bit13 (966~989) 24 977,
1336 01:23:09.050928 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1337 01:23:09.050989 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1338 01:23:09.051049
1339 01:23:09.051109 Write Rank0 MR14 =0x1e
1340 01:23:09.051169
1341 01:23:09.051229 CH=0, VrefRange= 0, VrefLevel = 30
1342 01:23:09.051289 TX Bit0 (977~1001) 25 989, Bit8 (962~985) 24 973,
1343 01:23:09.051350 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1344 01:23:09.051422 TX Bit2 (977~1001) 25 989, Bit10 (969~993) 25 981,
1345 01:23:09.051485 TX Bit3 (970~995) 26 982, Bit11 (964~987) 24 975,
1346 01:23:09.051546 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1347 01:23:09.051607 TX Bit5 (973~998) 26 985, Bit13 (966~989) 24 977,
1348 01:23:09.051668 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1349 01:23:09.051728 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1350 01:23:09.051790
1351 01:23:09.051850 Write Rank0 MR14 =0x20
1352 01:23:09.051910
1353 01:23:09.051970 CH=0, VrefRange= 0, VrefLevel = 32
1354 01:23:09.052031 TX Bit0 (977~1001) 25 989, Bit8 (962~985) 24 973,
1355 01:23:09.052091 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1356 01:23:09.052152 TX Bit2 (977~1001) 25 989, Bit10 (969~993) 25 981,
1357 01:23:09.052213 TX Bit3 (970~995) 26 982, Bit11 (964~987) 24 975,
1358 01:23:09.052274 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1359 01:23:09.052334 TX Bit5 (973~998) 26 985, Bit13 (966~989) 24 977,
1360 01:23:09.052396 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1361 01:23:09.052456 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1362 01:23:09.052516
1363 01:23:09.052575 wait MRW command Rank0 MR14 =0x22 fired (1)
1364 01:23:09.052636 Write Rank0 MR14 =0x22
1365 01:23:09.052695
1366 01:23:09.052755 CH=0, VrefRange= 0, VrefLevel = 34
1367 01:23:09.052815 TX Bit0 (977~1001) 25 989, Bit8 (962~985) 24 973,
1368 01:23:09.052875 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1369 01:23:09.052935 TX Bit2 (977~1001) 25 989, Bit10 (969~993) 25 981,
1370 01:23:09.052995 TX Bit3 (970~995) 26 982, Bit11 (964~987) 24 975,
1371 01:23:09.053055 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1372 01:23:09.053115 TX Bit5 (973~998) 26 985, Bit13 (966~989) 24 977,
1373 01:23:09.053176 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1374 01:23:09.053236 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1375 01:23:09.053296
1376 01:23:09.053354 Write Rank0 MR14 =0x24
1377 01:23:09.053414
1378 01:23:09.053473 CH=0, VrefRange= 0, VrefLevel = 36
1379 01:23:09.053532 TX Bit0 (977~1001) 25 989, Bit8 (962~985) 24 973,
1380 01:23:09.053788 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1381 01:23:09.053855 TX Bit2 (977~1001) 25 989, Bit10 (969~993) 25 981,
1382 01:23:09.053916 TX Bit3 (970~995) 26 982, Bit11 (964~987) 24 975,
1383 01:23:09.053977 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1384 01:23:09.054038 TX Bit5 (973~998) 26 985, Bit13 (966~989) 24 977,
1385 01:23:09.054099 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1386 01:23:09.054159 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1387 01:23:09.054220
1388 01:23:09.054279
1389 01:23:09.054338 TX Vref found, early break! 365< 378
1390 01:23:09.054399 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1391 01:23:09.054459 u1DelayCellOfst[0]=9 cells (7 PI)
1392 01:23:09.054519 u1DelayCellOfst[1]=7 cells (6 PI)
1393 01:23:09.054580 u1DelayCellOfst[2]=9 cells (7 PI)
1394 01:23:09.054639 u1DelayCellOfst[3]=0 cells (0 PI)
1395 01:23:09.054699 u1DelayCellOfst[4]=7 cells (6 PI)
1396 01:23:09.054758 u1DelayCellOfst[5]=3 cells (3 PI)
1397 01:23:09.054817 u1DelayCellOfst[6]=6 cells (5 PI)
1398 01:23:09.054879 u1DelayCellOfst[7]=7 cells (6 PI)
1399 01:23:09.054939 Byte0, DQ PI dly=982, DQM PI dly= 985
1400 01:23:09.054999 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1401 01:23:09.055058
1402 01:23:09.055118 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1403 01:23:09.055178
1404 01:23:09.055263 u1DelayCellOfst[8]=0 cells (0 PI)
1405 01:23:09.055356 u1DelayCellOfst[9]=5 cells (4 PI)
1406 01:23:09.055450 u1DelayCellOfst[10]=10 cells (8 PI)
1407 01:23:09.055513 u1DelayCellOfst[11]=2 cells (2 PI)
1408 01:23:09.055573 u1DelayCellOfst[12]=6 cells (5 PI)
1409 01:23:09.055633 u1DelayCellOfst[13]=5 cells (4 PI)
1410 01:23:09.055693 u1DelayCellOfst[14]=6 cells (5 PI)
1411 01:23:09.055752 u1DelayCellOfst[15]=9 cells (7 PI)
1412 01:23:09.055813 Byte1, DQ PI dly=973, DQM PI dly= 977
1413 01:23:09.055873 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)
1414 01:23:09.055934
1415 01:23:09.055993 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)
1416 01:23:09.056054
1417 01:23:09.056113 Write Rank0 MR14 =0x1c
1418 01:23:09.056172
1419 01:23:09.056232 Final TX Range 0 Vref 28
1420 01:23:09.056292
1421 01:23:09.056351 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1422 01:23:09.056412
1423 01:23:09.056472 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1424 01:23:09.056533 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1425 01:23:09.056594 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1426 01:23:09.056654 Write Rank0 MR3 =0xb0
1427 01:23:09.056714 DramC Write-DBI on
1428 01:23:09.056774 ==
1429 01:23:09.056834 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1430 01:23:09.056895 fsp= 1, odt_onoff= 1, Byte mode= 0
1431 01:23:09.056954 ==
1432 01:23:09.057014 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1433 01:23:09.057074
1434 01:23:09.057134 Begin, DQ Scan Range 697~761
1435 01:23:09.057193
1436 01:23:09.057269
1437 01:23:09.057347 TX Vref Scan disable
1438 01:23:09.057411 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1439 01:23:09.057473 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1440 01:23:09.057535 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1441 01:23:09.057596 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1442 01:23:09.057658 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1443 01:23:09.057719 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1444 01:23:09.057780 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1445 01:23:09.057842 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1446 01:23:09.057903 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1447 01:23:09.057964 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1448 01:23:09.058025 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1449 01:23:09.058086 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1450 01:23:09.058147 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1451 01:23:09.058208 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1452 01:23:09.058270 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1453 01:23:09.058331 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1454 01:23:09.058392 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1455 01:23:09.058454 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1456 01:23:09.058515 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1457 01:23:09.058576 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1458 01:23:09.058637 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1459 01:23:09.058697 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1460 01:23:09.058758 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1461 01:23:09.058819 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1462 01:23:09.058881 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1463 01:23:09.058942 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1464 01:23:09.059003 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1465 01:23:09.059063 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1466 01:23:09.059124 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1467 01:23:09.059186 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1468 01:23:09.059246 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1469 01:23:09.059307 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1470 01:23:09.059367 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1471 01:23:09.059434 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1472 01:23:09.059495 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1473 01:23:09.059557 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1474 01:23:09.059619 Byte0, DQ PI dly=732, DQM PI dly= 732
1475 01:23:09.059679 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1476 01:23:09.059740
1477 01:23:09.059800 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1478 01:23:09.059861
1479 01:23:09.059920 Byte1, DQ PI dly=720, DQM PI dly= 720
1480 01:23:09.059979 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)
1481 01:23:09.060039
1482 01:23:09.060099 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)
1483 01:23:09.060160
1484 01:23:09.060220 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1485 01:23:09.060281 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1486 01:23:09.060341 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1487 01:23:09.060402 Write Rank0 MR3 =0x30
1488 01:23:09.060462 DramC Write-DBI off
1489 01:23:09.060521
1490 01:23:09.060581 [DATLAT]
1491 01:23:09.060640 Freq=1600, CH0 RK0, use_rxtx_scan=0
1492 01:23:09.060700
1493 01:23:09.060759 DATLAT Default: 0xf
1494 01:23:09.060819 7, 0xFFFF, sum=0
1495 01:23:09.060879 8, 0xFFFF, sum=0
1496 01:23:09.061141 9, 0xFFFF, sum=0
1497 01:23:09.061212 10, 0xFFFF, sum=0
1498 01:23:09.061274 11, 0xFFFF, sum=0
1499 01:23:09.061336 12, 0xFFFF, sum=0
1500 01:23:09.061397 13, 0xFFFF, sum=0
1501 01:23:09.061458 14, 0x0, sum=1
1502 01:23:09.061519 15, 0x0, sum=2
1503 01:23:09.061579 16, 0x0, sum=3
1504 01:23:09.061640 17, 0x0, sum=4
1505 01:23:09.061700 pattern=2 first_step=14 total pass=5 best_step=16
1506 01:23:09.061761 ==
1507 01:23:09.061821 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1508 01:23:09.061882 fsp= 1, odt_onoff= 1, Byte mode= 0
1509 01:23:09.061942 ==
1510 01:23:09.062002 Start DQ dly to find pass range UseTestEngine =1
1511 01:23:09.062062 x-axis: bit #, y-axis: DQ dly (-127~63)
1512 01:23:09.062123 RX Vref Scan = 1
1513 01:23:09.062182
1514 01:23:09.062242 RX Vref found, early break!
1515 01:23:09.062302
1516 01:23:09.062361 Final RX Vref 12, apply to both rank0 and 1
1517 01:23:09.062423 ==
1518 01:23:09.062483 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1519 01:23:09.062543 fsp= 1, odt_onoff= 1, Byte mode= 0
1520 01:23:09.062604 ==
1521 01:23:09.062663 DQS Delay:
1522 01:23:09.062723 DQS0 = 0, DQS1 = 0
1523 01:23:09.062783 DQM Delay:
1524 01:23:09.062843 DQM0 = 19, DQM1 = 18
1525 01:23:09.062902 DQ Delay:
1526 01:23:09.062970 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15
1527 01:23:09.063034 DQ4 =22, DQ5 =17, DQ6 =19, DQ7 =20
1528 01:23:09.063094 DQ8 =14, DQ9 =16, DQ10 =25, DQ11 =16
1529 01:23:09.063154 DQ12 =18, DQ13 =18, DQ14 =20, DQ15 =22
1530 01:23:09.063214
1531 01:23:09.063273
1532 01:23:09.063333
1533 01:23:09.063392 [DramC_TX_OE_Calibration] TA2
1534 01:23:09.063466 Original DQ_B0 (3 6) =30, OEN = 27
1535 01:23:09.063527 Original DQ_B1 (3 6) =30, OEN = 27
1536 01:23:09.063588 23, 0x0, End_B0=23 End_B1=23
1537 01:23:09.063649 24, 0x0, End_B0=24 End_B1=24
1538 01:23:09.063710 25, 0x0, End_B0=25 End_B1=25
1539 01:23:09.063771 26, 0x0, End_B0=26 End_B1=26
1540 01:23:09.063832 27, 0x0, End_B0=27 End_B1=27
1541 01:23:09.063892 28, 0x0, End_B0=28 End_B1=28
1542 01:23:09.063953 29, 0x0, End_B0=29 End_B1=29
1543 01:23:09.064014 30, 0x0, End_B0=30 End_B1=30
1544 01:23:09.064075 31, 0xFBFF, End_B0=30 End_B1=30
1545 01:23:09.064136 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1546 01:23:09.064197 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1547 01:23:09.064257
1548 01:23:09.064316
1549 01:23:09.064375 Write Rank0 MR23 =0x3f
1550 01:23:09.064435 [DQSOSC]
1551 01:23:09.064495 [DQSOSCAuto] RK0, (LSB)MR18= 0xf0f, (MSB)MR19= 0x303, tDQSOscB0 = 402 ps tDQSOscB1 = 402 ps
1552 01:23:09.064557 CH0_RK0: MR19=0x303, MR18=0xF0F, DQSOSC=402, MR23=63, INC=15, DEC=22
1553 01:23:09.064618 Write Rank0 MR23 =0x3f
1554 01:23:09.064678 [DQSOSC]
1555 01:23:09.064737 [DQSOSCAuto] RK0, (LSB)MR18= 0x1313, (MSB)MR19= 0x303, tDQSOscB0 = 400 ps tDQSOscB1 = 400 ps
1556 01:23:09.064798 CH0 RK0: MR19=303, MR18=1313
1557 01:23:09.064859 [RankSwap] Rank num 2, (Multi 1), Rank 1
1558 01:23:09.064919 Write Rank0 MR2 =0xad
1559 01:23:09.064978 [Write Leveling]
1560 01:23:09.065037 delay byte0 byte1 byte2 byte3
1561 01:23:09.065096
1562 01:23:09.065155 10 0 0
1563 01:23:09.065216 11 0 0
1564 01:23:09.065277 12 0 0
1565 01:23:09.065337 13 0 0
1566 01:23:09.065398 14 0 0
1567 01:23:09.065459 15 0 0
1568 01:23:09.065519 16 0 0
1569 01:23:09.065580 17 0 0
1570 01:23:09.065639 18 0 0
1571 01:23:09.065700 19 0 0
1572 01:23:09.065761 20 0 0
1573 01:23:09.065821 21 0 0
1574 01:23:09.065882 22 0 0
1575 01:23:09.065942 23 0 ff
1576 01:23:09.066003 24 0 ff
1577 01:23:09.066064 25 0 ff
1578 01:23:09.066124 26 ff ff
1579 01:23:09.066185 27 ff ff
1580 01:23:09.066245 28 ff ff
1581 01:23:09.066306 29 ff ff
1582 01:23:09.066367 30 ff ff
1583 01:23:09.066427 31 ff ff
1584 01:23:09.066488 32 ff ff
1585 01:23:09.066547 pass bytecount = 0xff (0xff: all bytes pass)
1586 01:23:09.066608
1587 01:23:09.066667 DQS0 dly: 26
1588 01:23:09.066726 DQS1 dly: 23
1589 01:23:09.066786 Write Rank0 MR2 =0x2d
1590 01:23:09.066845 [RankSwap] Rank num 2, (Multi 1), Rank 0
1591 01:23:09.066905 Write Rank1 MR1 =0xd6
1592 01:23:09.066965 [Gating]
1593 01:23:09.067024 ==
1594 01:23:09.067083 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1595 01:23:09.067144 fsp= 1, odt_onoff= 1, Byte mode= 0
1596 01:23:09.067205 ==
1597 01:23:09.067265 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1598 01:23:09.067326 3 1 4 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1599 01:23:09.067387 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1600 01:23:09.067453 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1601 01:23:09.067516 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1602 01:23:09.067577 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1603 01:23:09.067638 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1604 01:23:09.067699 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1605 01:23:09.067760 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1606 01:23:09.067821 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1607 01:23:09.067882 3 2 8 |b0a 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1608 01:23:09.067943 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1609 01:23:09.068004 3 2 16 |3534 1515 |(11 11)(11 11) |(0 0)(1 1)| 0
1610 01:23:09.068065 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1611 01:23:09.068126 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1612 01:23:09.068187 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1613 01:23:09.068247 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1614 01:23:09.068308 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1615 01:23:09.068369 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1616 01:23:09.068429 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1617 01:23:09.068490 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1618 01:23:09.068551 3 3 20 |3534 3d3d |(11 11)(10 10) |(0 0)(1 1)| 0
1619 01:23:09.068612 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1620 01:23:09.068673 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1621 01:23:09.068734 [Byte 1] Lead/lag falling Transition (3, 3, 28)
1622 01:23:09.068794 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1623 01:23:09.068856 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1624 01:23:09.068916 3 4 8 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1625 01:23:09.068978 3 4 12 |2828 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1626 01:23:09.069038 3 4 16 |3d3d 1515 |(11 11)(11 11) |(1 1)(1 1)| 0
1627 01:23:09.069099 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1628 01:23:09.069160 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1629 01:23:09.069418 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1630 01:23:09.069486 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1631 01:23:09.069548 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1632 01:23:09.069610 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1633 01:23:09.069672 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1634 01:23:09.069735 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1635 01:23:09.069796 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1636 01:23:09.069858 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1637 01:23:09.069919 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1638 01:23:09.069980 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1639 01:23:09.070041 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1640 01:23:09.070101 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1641 01:23:09.070162 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1642 01:23:09.070223 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1643 01:23:09.070285 [Byte 0] Lead/lag Transition tap number (3)
1644 01:23:09.070345 [Byte 1] Lead/lag Transition tap number (2)
1645 01:23:09.070405 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
1646 01:23:09.070466 [Byte 0]First pass (3, 6, 12)
1647 01:23:09.070527 3 6 16 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
1648 01:23:09.070589 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1649 01:23:09.070650 [Byte 1]First pass (3, 6, 20)
1650 01:23:09.070710 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1651 01:23:09.070771 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1652 01:23:09.070833 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1653 01:23:09.070893 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1654 01:23:09.070955 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1655 01:23:09.071016 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1656 01:23:09.071077 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1657 01:23:09.071138 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1658 01:23:09.071199 All bytes gating window > 1UI, Early break!
1659 01:23:09.071259
1660 01:23:09.071318 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
1661 01:23:09.071378
1662 01:23:09.071444 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1663 01:23:09.071505
1664 01:23:09.071565
1665 01:23:09.071623
1666 01:23:09.071682 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1667 01:23:09.071743
1668 01:23:09.071802 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1669 01:23:09.071862
1670 01:23:09.071920
1671 01:23:09.071980 Write Rank1 MR1 =0x56
1672 01:23:09.072040
1673 01:23:09.072100 best RODT dly(2T, 0.5T) = (2, 3)
1674 01:23:09.072159
1675 01:23:09.072218 best RODT dly(2T, 0.5T) = (2, 3)
1676 01:23:09.072277 ==
1677 01:23:09.072337 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1678 01:23:09.072397 fsp= 1, odt_onoff= 1, Byte mode= 0
1679 01:23:09.072457 ==
1680 01:23:09.072516 Start DQ dly to find pass range UseTestEngine =0
1681 01:23:09.072576 x-axis: bit #, y-axis: DQ dly (-127~63)
1682 01:23:09.072636 RX Vref Scan = 0
1683 01:23:09.072696 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1684 01:23:09.072758 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1685 01:23:09.072819 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1686 01:23:09.072880 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1687 01:23:09.072942 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1688 01:23:09.073002 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1689 01:23:09.073063 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1690 01:23:09.073123 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1691 01:23:09.073183 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1692 01:23:09.073244 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1693 01:23:09.073305 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1694 01:23:09.073365 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1695 01:23:09.073425 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1696 01:23:09.073486 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1697 01:23:09.073546 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1698 01:23:09.073607 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1699 01:23:09.073668 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1700 01:23:09.073728 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1701 01:23:09.073789 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1702 01:23:09.073850 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1703 01:23:09.073911 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1704 01:23:09.073972 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1705 01:23:09.074033 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1706 01:23:09.074093 -3, [0] xxxxxxxx oxxxxxxx [MSB]
1707 01:23:09.074154 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1708 01:23:09.074214 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1709 01:23:09.074275 0, [0] xxxoxxxx oxxoxxxx [MSB]
1710 01:23:09.074336 1, [0] xxxoxoxx ooxoooxx [MSB]
1711 01:23:09.074397 2, [0] xxxoxooo ooxoooox [MSB]
1712 01:23:09.074459 3, [0] xoxooooo ooxoooox [MSB]
1713 01:23:09.074519 4, [0] xooooooo ooxoooox [MSB]
1714 01:23:09.074580 5, [0] oooooooo ooxooooo [MSB]
1715 01:23:09.074641 6, [0] oooooooo ooxooooo [MSB]
1716 01:23:09.074701 34, [0] oooooooo xooooooo [MSB]
1717 01:23:09.074763 35, [0] oooxoooo xooooooo [MSB]
1718 01:23:09.074823 36, [0] oooxoooo xooxoooo [MSB]
1719 01:23:09.074884 37, [0] oooxoxoo xooxoxoo [MSB]
1720 01:23:09.074945 38, [0] oooxoxoo xxoxoxxo [MSB]
1721 01:23:09.075005 39, [0] oooxoxox xxoxxxxo [MSB]
1722 01:23:09.075066 40, [0] oooxoxxx xxoxxxxo [MSB]
1723 01:23:09.075127 41, [0] oxxxoxxx xxoxxxxx [MSB]
1724 01:23:09.075187 42, [0] oxxxxxxx xxoxxxxx [MSB]
1725 01:23:09.075247 43, [0] xxxxxxxx xxoxxxxx [MSB]
1726 01:23:09.075308 44, [0] xxxxxxxx xxoxxxxx [MSB]
1727 01:23:09.075369 45, [0] xxxxxxxx xxxxxxxx [MSB]
1728 01:23:09.075443 iDelay=45, Bit 0, Center 23 (5 ~ 42) 38
1729 01:23:09.075505 iDelay=45, Bit 1, Center 21 (3 ~ 40) 38
1730 01:23:09.075565 iDelay=45, Bit 2, Center 22 (4 ~ 40) 37
1731 01:23:09.075625 iDelay=45, Bit 3, Center 16 (-2 ~ 34) 37
1732 01:23:09.075685 iDelay=45, Bit 4, Center 22 (3 ~ 41) 39
1733 01:23:09.075744 iDelay=45, Bit 5, Center 18 (1 ~ 36) 36
1734 01:23:09.075804 iDelay=45, Bit 6, Center 20 (2 ~ 39) 38
1735 01:23:09.075864 iDelay=45, Bit 7, Center 20 (2 ~ 38) 37
1736 01:23:09.075924 iDelay=45, Bit 8, Center 15 (-3 ~ 33) 37
1737 01:23:09.075984 iDelay=45, Bit 9, Center 19 (1 ~ 37) 37
1738 01:23:09.076043 iDelay=45, Bit 10, Center 25 (7 ~ 44) 38
1739 01:23:09.076103 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1740 01:23:09.076163 iDelay=45, Bit 12, Center 19 (1 ~ 38) 38
1741 01:23:09.076222 iDelay=45, Bit 13, Center 18 (1 ~ 36) 36
1742 01:23:09.076282 iDelay=45, Bit 14, Center 19 (2 ~ 37) 36
1743 01:23:09.076342 iDelay=45, Bit 15, Center 22 (5 ~ 40) 36
1744 01:23:09.076401 ==
1745 01:23:09.076657 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1746 01:23:09.076724 fsp= 1, odt_onoff= 1, Byte mode= 0
1747 01:23:09.076786 ==
1748 01:23:09.076847 DQS Delay:
1749 01:23:09.076906 DQS0 = 0, DQS1 = 0
1750 01:23:09.076967 DQM Delay:
1751 01:23:09.077027 DQM0 = 20, DQM1 = 19
1752 01:23:09.077087 DQ Delay:
1753 01:23:09.077146 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =16
1754 01:23:09.077207 DQ4 =22, DQ5 =18, DQ6 =20, DQ7 =20
1755 01:23:09.077266 DQ8 =15, DQ9 =19, DQ10 =25, DQ11 =16
1756 01:23:09.077325 DQ12 =19, DQ13 =18, DQ14 =19, DQ15 =22
1757 01:23:09.077385
1758 01:23:09.077443
1759 01:23:09.077503 DramC Write-DBI off
1760 01:23:09.077562 ==
1761 01:23:09.077622 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1762 01:23:09.077682 fsp= 1, odt_onoff= 1, Byte mode= 0
1763 01:23:09.077742 ==
1764 01:23:09.077801 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1765 01:23:09.077861
1766 01:23:09.077920 Begin, DQ Scan Range 919~1175
1767 01:23:09.077980
1768 01:23:09.078039
1769 01:23:09.078098 TX Vref Scan disable
1770 01:23:09.078158 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1771 01:23:09.078220 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1772 01:23:09.078281 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1773 01:23:09.078343 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1774 01:23:09.078404 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1775 01:23:09.078464 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1776 01:23:09.078525 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1777 01:23:09.078586 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1778 01:23:09.078648 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1779 01:23:09.078709 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1780 01:23:09.078770 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1781 01:23:09.078830 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1782 01:23:09.078891 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1783 01:23:09.078953 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1784 01:23:09.079014 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1785 01:23:09.079075 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1786 01:23:09.079136 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1787 01:23:09.079197 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1788 01:23:09.079258 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1789 01:23:09.079318 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1790 01:23:09.079379 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1791 01:23:09.079448 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1792 01:23:09.079511 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1793 01:23:09.079571 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1794 01:23:09.079632 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1795 01:23:09.079693 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1796 01:23:09.079753 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1797 01:23:09.079814 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1798 01:23:09.079875 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1799 01:23:09.079936 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1800 01:23:09.079997 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1801 01:23:09.080058 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1802 01:23:09.080119 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1803 01:23:09.080180 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1804 01:23:09.080241 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1805 01:23:09.080302 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1806 01:23:09.080363 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1807 01:23:09.080423 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1808 01:23:09.080484 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1809 01:23:09.080545 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1810 01:23:09.080606 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1811 01:23:09.080666 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1812 01:23:09.080727 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1813 01:23:09.080787 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1814 01:23:09.080848 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1815 01:23:09.080908 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1816 01:23:09.080982 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1817 01:23:09.081047 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1818 01:23:09.081107 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1819 01:23:09.081169 968 |3 6 8|[0] xxxxxxxx ooxoxxxx [MSB]
1820 01:23:09.081230 969 |3 6 9|[0] xxxxxxxx ooxooxox [MSB]
1821 01:23:09.081291 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1822 01:23:09.081352 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1823 01:23:09.081413 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1824 01:23:09.081474 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1825 01:23:09.081535 974 |3 6 14|[0] xoxooooo oooooooo [MSB]
1826 01:23:09.081596 975 |3 6 15|[0] xoxooooo oooooooo [MSB]
1827 01:23:09.081657 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1828 01:23:09.081719 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1829 01:23:09.081779 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1830 01:23:09.081841 989 |3 6 29|[0] oooxoooo xxxxxxxx [MSB]
1831 01:23:09.081902 990 |3 6 30|[0] oooxoooo xxxxxxxx [MSB]
1832 01:23:09.081964 991 |3 6 31|[0] oooxoooo xxxxxxxx [MSB]
1833 01:23:09.082025 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1834 01:23:09.082086 993 |3 6 33|[0] xxxxxxxx xxxxxxxx [MSB]
1835 01:23:09.082147 Byte0, DQ PI dly=982, DQM PI dly= 982
1836 01:23:09.082261 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1837 01:23:09.082361
1838 01:23:09.082455 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1839 01:23:09.082544
1840 01:23:09.082606 Byte1, DQ PI dly=977, DQM PI dly= 977
1841 01:23:09.082667 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1842 01:23:09.082729
1843 01:23:09.082789 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1844 01:23:09.082850
1845 01:23:09.082909 ==
1846 01:23:09.082987 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1847 01:23:09.083051 fsp= 1, odt_onoff= 1, Byte mode= 0
1848 01:23:09.083112 ==
1849 01:23:09.083173 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1850 01:23:09.083234
1851 01:23:09.083293 Begin, DQ Scan Range 953~1017
1852 01:23:09.083353 wait MRW command Rank1 MR14 =0x0 fired (1)
1853 01:23:09.083423 Write Rank1 MR14 =0x0
1854 01:23:09.083486
1855 01:23:09.083545 CH=0, VrefRange= 0, VrefLevel = 0
1856 01:23:09.083606 TX Bit0 (977~991) 15 984, Bit8 (968~981) 14 974,
1857 01:23:09.083668 TX Bit1 (977~988) 12 982, Bit9 (970~983) 14 976,
1858 01:23:09.083729 TX Bit2 (977~990) 14 983, Bit10 (976~983) 8 979,
1859 01:23:09.083789 TX Bit3 (971~982) 12 976, Bit11 (969~982) 14 975,
1860 01:23:09.083849 TX Bit4 (976~989) 14 982, Bit12 (972~983) 12 977,
1861 01:23:09.083910 TX Bit5 (973~985) 13 979, Bit13 (973~981) 9 977,
1862 01:23:09.084167 TX Bit6 (975~987) 13 981, Bit14 (973~983) 11 978,
1863 01:23:09.084237 TX Bit7 (975~990) 16 982, Bit15 (975~987) 13 981,
1864 01:23:09.084298
1865 01:23:09.084359 Write Rank1 MR14 =0x2
1866 01:23:09.084420
1867 01:23:09.084480 CH=0, VrefRange= 0, VrefLevel = 2
1868 01:23:09.084541 TX Bit0 (977~991) 15 984, Bit8 (968~982) 15 975,
1869 01:23:09.084602 TX Bit1 (976~989) 14 982, Bit9 (969~984) 16 976,
1870 01:23:09.084663 TX Bit2 (977~990) 14 983, Bit10 (975~988) 14 981,
1871 01:23:09.084724 TX Bit3 (970~983) 14 976, Bit11 (969~982) 14 975,
1872 01:23:09.084785 TX Bit4 (976~989) 14 982, Bit12 (971~984) 14 977,
1873 01:23:09.084845 TX Bit5 (973~985) 13 979, Bit13 (973~982) 10 977,
1874 01:23:09.084906 TX Bit6 (974~988) 15 981, Bit14 (973~985) 13 979,
1875 01:23:09.084965 TX Bit7 (975~990) 16 982, Bit15 (975~988) 14 981,
1876 01:23:09.085026
1877 01:23:09.085085 Write Rank1 MR14 =0x4
1878 01:23:09.085145
1879 01:23:09.085204 CH=0, VrefRange= 0, VrefLevel = 4
1880 01:23:09.085263 TX Bit0 (977~992) 16 984, Bit8 (968~982) 15 975,
1881 01:23:09.085323 TX Bit1 (976~990) 15 983, Bit9 (969~985) 17 977,
1882 01:23:09.085384 TX Bit2 (977~991) 15 984, Bit10 (975~989) 15 982,
1883 01:23:09.085444 TX Bit3 (970~984) 15 977, Bit11 (969~983) 15 976,
1884 01:23:09.085505 TX Bit4 (975~990) 16 982, Bit12 (970~985) 16 977,
1885 01:23:09.085565 TX Bit5 (972~987) 16 979, Bit13 (972~983) 12 977,
1886 01:23:09.085625 TX Bit6 (974~989) 16 981, Bit14 (971~985) 15 978,
1887 01:23:09.085686 TX Bit7 (975~990) 16 982, Bit15 (975~989) 15 982,
1888 01:23:09.085746
1889 01:23:09.085805 Write Rank1 MR14 =0x6
1890 01:23:09.085865
1891 01:23:09.085924 CH=0, VrefRange= 0, VrefLevel = 6
1892 01:23:09.085984 TX Bit0 (977~992) 16 984, Bit8 (968~983) 16 975,
1893 01:23:09.086044 TX Bit1 (976~990) 15 983, Bit9 (969~985) 17 977,
1894 01:23:09.086104 TX Bit2 (977~991) 15 984, Bit10 (975~990) 16 982,
1895 01:23:09.086165 TX Bit3 (970~985) 16 977, Bit11 (968~983) 16 975,
1896 01:23:09.086224 TX Bit4 (975~991) 17 983, Bit12 (970~985) 16 977,
1897 01:23:09.086285 TX Bit5 (972~987) 16 979, Bit13 (972~983) 12 977,
1898 01:23:09.086346 TX Bit6 (973~989) 17 981, Bit14 (972~986) 15 979,
1899 01:23:09.086406 TX Bit7 (975~991) 17 983, Bit15 (974~990) 17 982,
1900 01:23:09.086465
1901 01:23:09.086524 Write Rank1 MR14 =0x8
1902 01:23:09.086584
1903 01:23:09.086644 CH=0, VrefRange= 0, VrefLevel = 8
1904 01:23:09.086705 TX Bit0 (976~992) 17 984, Bit8 (967~983) 17 975,
1905 01:23:09.086765 TX Bit1 (976~991) 16 983, Bit9 (969~985) 17 977,
1906 01:23:09.086825 TX Bit2 (977~991) 15 984, Bit10 (975~990) 16 982,
1907 01:23:09.086886 TX Bit3 (969~985) 17 977, Bit11 (968~983) 16 975,
1908 01:23:09.086979 TX Bit4 (975~991) 17 983, Bit12 (969~985) 17 977,
1909 01:23:09.087066 TX Bit5 (971~989) 19 980, Bit13 (971~984) 14 977,
1910 01:23:09.087129 TX Bit6 (972~990) 19 981, Bit14 (970~986) 17 978,
1911 01:23:09.087189 TX Bit7 (974~991) 18 982, Bit15 (974~990) 17 982,
1912 01:23:09.087250
1913 01:23:09.087309 Write Rank1 MR14 =0xa
1914 01:23:09.087370
1915 01:23:09.087440 CH=0, VrefRange= 0, VrefLevel = 10
1916 01:23:09.087502 TX Bit0 (976~993) 18 984, Bit8 (967~984) 18 975,
1917 01:23:09.087563 TX Bit1 (975~991) 17 983, Bit9 (968~986) 19 977,
1918 01:23:09.087623 TX Bit2 (976~992) 17 984, Bit10 (975~991) 17 983,
1919 01:23:09.087683 TX Bit3 (969~986) 18 977, Bit11 (968~984) 17 976,
1920 01:23:09.087743 TX Bit4 (974~992) 19 983, Bit12 (969~986) 18 977,
1921 01:23:09.087803 TX Bit5 (971~990) 20 980, Bit13 (971~984) 14 977,
1922 01:23:09.087864 TX Bit6 (973~991) 19 982, Bit14 (970~987) 18 978,
1923 01:23:09.087924 TX Bit7 (974~991) 18 982, Bit15 (974~991) 18 982,
1924 01:23:09.087984
1925 01:23:09.088043 Write Rank1 MR14 =0xc
1926 01:23:09.088103
1927 01:23:09.088163 CH=0, VrefRange= 0, VrefLevel = 12
1928 01:23:09.088223 TX Bit0 (976~993) 18 984, Bit8 (967~984) 18 975,
1929 01:23:09.088283 TX Bit1 (975~992) 18 983, Bit9 (968~986) 19 977,
1930 01:23:09.088344 TX Bit2 (976~992) 17 984, Bit10 (974~991) 18 982,
1931 01:23:09.088404 TX Bit3 (969~987) 19 978, Bit11 (968~984) 17 976,
1932 01:23:09.088464 TX Bit4 (974~992) 19 983, Bit12 (969~986) 18 977,
1933 01:23:09.088524 TX Bit5 (970~990) 21 980, Bit13 (970~985) 16 977,
1934 01:23:09.088585 TX Bit6 (972~991) 20 981, Bit14 (970~989) 20 979,
1935 01:23:09.088645 TX Bit7 (973~992) 20 982, Bit15 (973~991) 19 982,
1936 01:23:09.088705
1937 01:23:09.088764 Write Rank1 MR14 =0xe
1938 01:23:09.088824
1939 01:23:09.088883 CH=0, VrefRange= 0, VrefLevel = 14
1940 01:23:09.088944 TX Bit0 (976~994) 19 985, Bit8 (967~984) 18 975,
1941 01:23:09.089005 TX Bit1 (975~992) 18 983, Bit9 (968~988) 21 978,
1942 01:23:09.089065 TX Bit2 (976~993) 18 984, Bit10 (974~991) 18 982,
1943 01:23:09.089125 TX Bit3 (969~988) 20 978, Bit11 (967~985) 19 976,
1944 01:23:09.089185 TX Bit4 (973~992) 20 982, Bit12 (969~988) 20 978,
1945 01:23:09.089244 TX Bit5 (970~990) 21 980, Bit13 (970~986) 17 978,
1946 01:23:09.089305 TX Bit6 (972~991) 20 981, Bit14 (969~989) 21 979,
1947 01:23:09.089365 TX Bit7 (973~992) 20 982, Bit15 (973~991) 19 982,
1948 01:23:09.089426
1949 01:23:09.089485 Write Rank1 MR14 =0x10
1950 01:23:09.089544
1951 01:23:09.089604 CH=0, VrefRange= 0, VrefLevel = 16
1952 01:23:09.089663 TX Bit0 (976~994) 19 985, Bit8 (967~985) 19 976,
1953 01:23:09.089724 TX Bit1 (975~993) 19 984, Bit9 (968~988) 21 978,
1954 01:23:09.089784 TX Bit2 (976~993) 18 984, Bit10 (974~992) 19 983,
1955 01:23:09.089845 TX Bit3 (969~988) 20 978, Bit11 (967~985) 19 976,
1956 01:23:09.089905 TX Bit4 (973~993) 21 983, Bit12 (969~989) 21 979,
1957 01:23:09.089966 TX Bit5 (970~991) 22 980, Bit13 (969~986) 18 977,
1958 01:23:09.090026 TX Bit6 (971~992) 22 981, Bit14 (969~989) 21 979,
1959 01:23:09.090086 TX Bit7 (972~993) 22 982, Bit15 (973~992) 20 982,
1960 01:23:09.090146
1961 01:23:09.090206 Write Rank1 MR14 =0x12
1962 01:23:09.090267
1963 01:23:09.090326 CH=0, VrefRange= 0, VrefLevel = 18
1964 01:23:09.090387 TX Bit0 (975~995) 21 985, Bit8 (966~985) 20 975,
1965 01:23:09.090649 TX Bit1 (974~993) 20 983, Bit9 (968~989) 22 978,
1966 01:23:09.090717 TX Bit2 (976~994) 19 985, Bit10 (973~992) 20 982,
1967 01:23:09.090779 TX Bit3 (968~988) 21 978, Bit11 (967~986) 20 976,
1968 01:23:09.090841 TX Bit4 (973~993) 21 983, Bit12 (968~989) 22 978,
1969 01:23:09.090901 TX Bit5 (970~991) 22 980, Bit13 (969~987) 19 978,
1970 01:23:09.090961 TX Bit6 (971~992) 22 981, Bit14 (969~990) 22 979,
1971 01:23:09.091022 TX Bit7 (972~993) 22 982, Bit15 (972~992) 21 982,
1972 01:23:09.091083
1973 01:23:09.091143 Write Rank1 MR14 =0x14
1974 01:23:09.091203
1975 01:23:09.091262 CH=0, VrefRange= 0, VrefLevel = 20
1976 01:23:09.091322 TX Bit0 (975~996) 22 985, Bit8 (966~987) 22 976,
1977 01:23:09.338882 TX Bit1 (973~993) 21 983, Bit9 (967~989) 23 978,
1978 01:23:09.339382 TX Bit2 (975~994) 20 984, Bit10 (972~993) 22 982,
1979 01:23:09.339777 TX Bit3 (968~988) 21 978, Bit11 (967~987) 21 977,
1980 01:23:09.340097 TX Bit4 (973~993) 21 983, Bit12 (968~990) 23 979,
1981 01:23:09.340403 TX Bit5 (970~991) 22 980, Bit13 (969~989) 21 979,
1982 01:23:09.340709 TX Bit6 (970~992) 23 981, Bit14 (968~990) 23 979,
1983 01:23:09.341007 TX Bit7 (972~994) 23 983, Bit15 (972~993) 22 982,
1984 01:23:09.341302
1985 01:23:09.341586 Write Rank1 MR14 =0x16
1986 01:23:09.341877
1987 01:23:09.342164 CH=0, VrefRange= 0, VrefLevel = 22
1988 01:23:09.342450 TX Bit0 (974~996) 23 985, Bit8 (966~986) 21 976,
1989 01:23:09.342738 TX Bit1 (973~994) 22 983, Bit9 (968~990) 23 979,
1990 01:23:09.343025 TX Bit2 (975~995) 21 985, Bit10 (972~993) 22 982,
1991 01:23:09.343312 TX Bit3 (968~990) 23 979, Bit11 (966~987) 22 976,
1992 01:23:09.343704 TX Bit4 (972~994) 23 983, Bit12 (968~990) 23 979,
1993 01:23:09.344002 TX Bit5 (970~992) 23 981, Bit13 (969~989) 21 979,
1994 01:23:09.344288 TX Bit6 (970~993) 24 981, Bit14 (968~990) 23 979,
1995 01:23:09.344571 TX Bit7 (972~994) 23 983, Bit15 (972~993) 22 982,
1996 01:23:09.344856
1997 01:23:09.345140 Write Rank1 MR14 =0x18
1998 01:23:09.345423
1999 01:23:09.345702 CH=0, VrefRange= 0, VrefLevel = 24
2000 01:23:09.345984 TX Bit0 (974~997) 24 985, Bit8 (966~988) 23 977,
2001 01:23:09.346269 TX Bit1 (973~995) 23 984, Bit9 (967~990) 24 978,
2002 01:23:09.346554 TX Bit2 (975~996) 22 985, Bit10 (971~993) 23 982,
2003 01:23:09.346837 TX Bit3 (968~990) 23 979, Bit11 (966~988) 23 977,
2004 01:23:09.347120 TX Bit4 (971~995) 25 983, Bit12 (968~990) 23 979,
2005 01:23:09.347421 TX Bit5 (969~992) 24 980, Bit13 (968~989) 22 978,
2006 01:23:09.347718 TX Bit6 (970~993) 24 981, Bit14 (968~991) 24 979,
2007 01:23:09.348001 TX Bit7 (971~995) 25 983, Bit15 (971~993) 23 982,
2008 01:23:09.348283
2009 01:23:09.348562 Write Rank1 MR14 =0x1a
2010 01:23:09.348857
2011 01:23:09.349161 CH=0, VrefRange= 0, VrefLevel = 26
2012 01:23:09.349446 TX Bit0 (974~998) 25 986, Bit8 (966~988) 23 977,
2013 01:23:09.349738 TX Bit1 (972~995) 24 983, Bit9 (967~990) 24 978,
2014 01:23:09.350105 TX Bit2 (975~997) 23 986, Bit10 (972~994) 23 983,
2015 01:23:09.350395 TX Bit3 (967~991) 25 979, Bit11 (966~989) 24 977,
2016 01:23:09.350679 TX Bit4 (971~995) 25 983, Bit12 (968~991) 24 979,
2017 01:23:09.350961 TX Bit5 (969~992) 24 980, Bit13 (968~989) 22 978,
2018 01:23:09.351242 TX Bit6 (970~993) 24 981, Bit14 (968~991) 24 979,
2019 01:23:09.351587 TX Bit7 (971~995) 25 983, Bit15 (970~993) 24 981,
2020 01:23:09.351877
2021 01:23:09.352155 Write Rank1 MR14 =0x1c
2022 01:23:09.352435
2023 01:23:09.352714 CH=0, VrefRange= 0, VrefLevel = 28
2024 01:23:09.353092 TX Bit0 (974~998) 25 986, Bit8 (965~989) 25 977,
2025 01:23:09.353551 TX Bit1 (972~995) 24 983, Bit9 (967~990) 24 978,
2026 01:23:09.353865 TX Bit2 (974~997) 24 985, Bit10 (972~995) 24 983,
2027 01:23:09.354158 TX Bit3 (967~991) 25 979, Bit11 (966~989) 24 977,
2028 01:23:09.354446 TX Bit4 (971~995) 25 983, Bit12 (967~991) 25 979,
2029 01:23:09.354729 TX Bit5 (969~993) 25 981, Bit13 (968~990) 23 979,
2030 01:23:09.355011 TX Bit6 (970~994) 25 982, Bit14 (968~991) 24 979,
2031 01:23:09.355292 TX Bit7 (970~996) 27 983, Bit15 (970~994) 25 982,
2032 01:23:09.355654
2033 01:23:09.355941 Write Rank1 MR14 =0x1e
2034 01:23:09.356227
2035 01:23:09.356507 CH=0, VrefRange= 0, VrefLevel = 30
2036 01:23:09.356858 TX Bit0 (974~998) 25 986, Bit8 (965~989) 25 977,
2037 01:23:09.357151 TX Bit1 (971~997) 27 984, Bit9 (967~990) 24 978,
2038 01:23:09.357437 TX Bit2 (974~997) 24 985, Bit10 (971~995) 25 983,
2039 01:23:09.357721 TX Bit3 (967~991) 25 979, Bit11 (966~989) 24 977,
2040 01:23:09.358004 TX Bit4 (970~996) 27 983, Bit12 (967~991) 25 979,
2041 01:23:09.358286 TX Bit5 (969~993) 25 981, Bit13 (968~990) 23 979,
2042 01:23:09.358571 TX Bit6 (970~995) 26 982, Bit14 (967~991) 25 979,
2043 01:23:09.358855 TX Bit7 (970~997) 28 983, Bit15 (969~994) 26 981,
2044 01:23:09.359136
2045 01:23:09.359442 Write Rank1 MR14 =0x20
2046 01:23:09.359757
2047 01:23:09.360035 CH=0, VrefRange= 0, VrefLevel = 32
2048 01:23:09.360316 TX Bit0 (974~998) 25 986, Bit8 (965~989) 25 977,
2049 01:23:09.360601 TX Bit1 (971~997) 27 984, Bit9 (967~990) 24 978,
2050 01:23:09.360881 TX Bit2 (974~997) 24 985, Bit10 (971~995) 25 983,
2051 01:23:09.361160 TX Bit3 (967~991) 25 979, Bit11 (966~989) 24 977,
2052 01:23:09.361439 TX Bit4 (970~996) 27 983, Bit12 (967~991) 25 979,
2053 01:23:09.361719 TX Bit5 (969~993) 25 981, Bit13 (968~990) 23 979,
2054 01:23:09.362002 TX Bit6 (970~995) 26 982, Bit14 (967~991) 25 979,
2055 01:23:09.362281 TX Bit7 (970~997) 28 983, Bit15 (969~994) 26 981,
2056 01:23:09.362620
2057 01:23:09.362908 Write Rank1 MR14 =0x22
2058 01:23:09.363189
2059 01:23:09.363573 CH=0, VrefRange= 0, VrefLevel = 34
2060 01:23:09.363892 TX Bit0 (973~998) 26 985, Bit8 (965~988) 24 976,
2061 01:23:09.364177 TX Bit1 (972~996) 25 984, Bit9 (967~990) 24 978,
2062 01:23:09.364462 TX Bit2 (973~998) 26 985, Bit10 (971~994) 24 982,
2063 01:23:09.364745 TX Bit3 (968~991) 24 979, Bit11 (966~989) 24 977,
2064 01:23:09.365405 TX Bit4 (971~996) 26 983, Bit12 (967~991) 25 979,
2065 01:23:09.365652 TX Bit5 (969~993) 25 981, Bit13 (967~991) 25 979,
2066 01:23:09.365859 TX Bit6 (969~994) 26 981, Bit14 (967~991) 25 979,
2067 01:23:09.366063 TX Bit7 (971~996) 26 983, Bit15 (970~993) 24 981,
2068 01:23:09.366264
2069 01:23:09.366461 Write Rank1 MR14 =0x24
2070 01:23:09.366663
2071 01:23:09.366862 CH=0, VrefRange= 0, VrefLevel = 36
2072 01:23:09.367065 TX Bit0 (973~998) 26 985, Bit8 (965~988) 24 976,
2073 01:23:09.367282 TX Bit1 (972~996) 25 984, Bit9 (967~990) 24 978,
2074 01:23:09.367521 TX Bit2 (973~998) 26 985, Bit10 (971~994) 24 982,
2075 01:23:09.367729 TX Bit3 (968~991) 24 979, Bit11 (966~989) 24 977,
2076 01:23:09.367933 TX Bit4 (971~996) 26 983, Bit12 (967~991) 25 979,
2077 01:23:09.368140 TX Bit5 (969~993) 25 981, Bit13 (967~991) 25 979,
2078 01:23:09.368345 TX Bit6 (969~994) 26 981, Bit14 (967~991) 25 979,
2079 01:23:09.368552 TX Bit7 (971~996) 26 983, Bit15 (970~993) 24 981,
2080 01:23:09.368758
2081 01:23:09.368960 wait MRW command Rank1 MR14 =0x26 fired (1)
2082 01:23:09.369165 Write Rank1 MR14 =0x26
2083 01:23:09.369370
2084 01:23:09.369574 CH=0, VrefRange= 0, VrefLevel = 38
2085 01:23:09.369779 TX Bit0 (973~998) 26 985, Bit8 (965~988) 24 976,
2086 01:23:09.369983 TX Bit1 (972~996) 25 984, Bit9 (967~990) 24 978,
2087 01:23:09.370191 TX Bit2 (973~998) 26 985, Bit10 (971~994) 24 982,
2088 01:23:09.370407 TX Bit3 (968~991) 24 979, Bit11 (966~989) 24 977,
2089 01:23:09.370561 TX Bit4 (971~996) 26 983, Bit12 (967~991) 25 979,
2090 01:23:09.370713 TX Bit5 (969~993) 25 981, Bit13 (967~991) 25 979,
2091 01:23:09.370866 TX Bit6 (969~994) 26 981, Bit14 (967~991) 25 979,
2092 01:23:09.371018 TX Bit7 (971~996) 26 983, Bit15 (970~993) 24 981,
2093 01:23:09.371172
2094 01:23:09.371323
2095 01:23:09.371488 TX Vref found, early break! 373< 379
2096 01:23:09.371644 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2097 01:23:09.371798 u1DelayCellOfst[0]=7 cells (6 PI)
2098 01:23:09.371952 u1DelayCellOfst[1]=6 cells (5 PI)
2099 01:23:09.372103 u1DelayCellOfst[2]=7 cells (6 PI)
2100 01:23:09.372255 u1DelayCellOfst[3]=0 cells (0 PI)
2101 01:23:09.372406 u1DelayCellOfst[4]=5 cells (4 PI)
2102 01:23:09.372557 u1DelayCellOfst[5]=2 cells (2 PI)
2103 01:23:09.372708 u1DelayCellOfst[6]=2 cells (2 PI)
2104 01:23:09.372861 u1DelayCellOfst[7]=5 cells (4 PI)
2105 01:23:09.373012 Byte0, DQ PI dly=979, DQM PI dly= 982
2106 01:23:09.373164 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2107 01:23:09.373316
2108 01:23:09.373467 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2109 01:23:09.373620
2110 01:23:09.373771 u1DelayCellOfst[8]=0 cells (0 PI)
2111 01:23:09.373921 u1DelayCellOfst[9]=2 cells (2 PI)
2112 01:23:09.374072 u1DelayCellOfst[10]=7 cells (6 PI)
2113 01:23:09.374223 u1DelayCellOfst[11]=1 cells (1 PI)
2114 01:23:09.374375 u1DelayCellOfst[12]=3 cells (3 PI)
2115 01:23:09.374525 u1DelayCellOfst[13]=3 cells (3 PI)
2116 01:23:09.374676 u1DelayCellOfst[14]=3 cells (3 PI)
2117 01:23:09.374829 u1DelayCellOfst[15]=6 cells (5 PI)
2118 01:23:09.374980 Byte1, DQ PI dly=976, DQM PI dly= 979
2119 01:23:09.375133 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2120 01:23:09.375286
2121 01:23:09.375447 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2122 01:23:09.375571
2123 01:23:09.375692 Write Rank1 MR14 =0x22
2124 01:23:09.375814
2125 01:23:09.375935 Final TX Range 0 Vref 34
2126 01:23:09.376056
2127 01:23:09.376178 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2128 01:23:09.376300
2129 01:23:09.376421 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2130 01:23:09.376543 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2131 01:23:09.376666 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2132 01:23:09.376789 Write Rank1 MR3 =0xb0
2133 01:23:09.376910 DramC Write-DBI on
2134 01:23:09.377031 ==
2135 01:23:09.377153 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2136 01:23:09.377276 fsp= 1, odt_onoff= 1, Byte mode= 0
2137 01:23:09.377424 ==
2138 01:23:09.377548 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2139 01:23:09.377671
2140 01:23:09.377793 Begin, DQ Scan Range 699~763
2141 01:23:09.377915
2142 01:23:09.378038
2143 01:23:09.378158 TX Vref Scan disable
2144 01:23:09.378281 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2145 01:23:09.378405 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2146 01:23:09.378531 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2147 01:23:09.378655 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2148 01:23:09.378780 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2149 01:23:09.378903 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2150 01:23:09.379028 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2151 01:23:09.379151 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2152 01:23:09.379275 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2153 01:23:09.379399 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2154 01:23:09.379540 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2155 01:23:09.379666 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2156 01:23:09.379789 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2157 01:23:09.379914 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2158 01:23:09.380038 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2159 01:23:09.380163 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2160 01:23:09.380287 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2161 01:23:09.380418 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2162 01:23:09.380522 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2163 01:23:09.380624 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2164 01:23:09.380728 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2165 01:23:09.380830 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2166 01:23:09.380934 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2167 01:23:09.381037 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2168 01:23:09.381141 Byte0, DQ PI dly=728, DQM PI dly= 728
2169 01:23:09.381243 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2170 01:23:09.381345
2171 01:23:09.381446 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2172 01:23:09.381551
2173 01:23:09.381653 Byte1, DQ PI dly=722, DQM PI dly= 722
2174 01:23:09.381754 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2175 01:23:09.381856
2176 01:23:09.381956 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2177 01:23:09.382060
2178 01:23:09.382161 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2179 01:23:09.382482 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2180 01:23:09.382596 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2181 01:23:09.382701 Write Rank1 MR3 =0x30
2182 01:23:09.382804 DramC Write-DBI off
2183 01:23:09.382906
2184 01:23:09.383008 [DATLAT]
2185 01:23:09.383110 Freq=1600, CH0 RK1, use_rxtx_scan=0
2186 01:23:09.383217
2187 01:23:09.383320 DATLAT Default: 0x10
2188 01:23:09.383436 7, 0xFFFF, sum=0
2189 01:23:09.383543 8, 0xFFFF, sum=0
2190 01:23:09.383647 9, 0xFFFF, sum=0
2191 01:23:09.383749 10, 0xFFFF, sum=0
2192 01:23:09.383854 11, 0xFFFF, sum=0
2193 01:23:09.383964 12, 0xFFFF, sum=0
2194 01:23:09.384067 13, 0xFFFF, sum=0
2195 01:23:09.384171 14, 0x0, sum=1
2196 01:23:09.384274 15, 0x0, sum=2
2197 01:23:09.384377 16, 0x0, sum=3
2198 01:23:09.384479 17, 0x0, sum=4
2199 01:23:09.384583 pattern=2 first_step=14 total pass=5 best_step=16
2200 01:23:09.384684 ==
2201 01:23:09.384786 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2202 01:23:09.384889 fsp= 1, odt_onoff= 1, Byte mode= 0
2203 01:23:09.384992 ==
2204 01:23:09.385094 Start DQ dly to find pass range UseTestEngine =1
2205 01:23:09.385197 x-axis: bit #, y-axis: DQ dly (-127~63)
2206 01:23:09.385298 RX Vref Scan = 0
2207 01:23:09.385410 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2208 01:23:09.385501 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2209 01:23:09.385590 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2210 01:23:09.385679 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2211 01:23:09.385768 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2212 01:23:09.385857 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2213 01:23:09.385946 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2214 01:23:09.386035 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2215 01:23:09.386123 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2216 01:23:09.386211 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2217 01:23:09.386299 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2218 01:23:09.386389 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2219 01:23:09.386478 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2220 01:23:09.386567 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2221 01:23:09.386656 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2222 01:23:09.386746 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2223 01:23:09.386835 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2224 01:23:09.386924 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2225 01:23:09.387013 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2226 01:23:09.387102 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2227 01:23:09.387191 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2228 01:23:09.387280 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2229 01:23:09.387369 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2230 01:23:09.387474 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2231 01:23:09.387564 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2232 01:23:09.387654 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2233 01:23:09.387743 0, [0] xxxoxxxx oxxoxxxx [MSB]
2234 01:23:09.387833 1, [0] xxxoxoxx ooxoooxx [MSB]
2235 01:23:09.387922 2, [0] xxxoxoxx ooxoooxx [MSB]
2236 01:23:09.388011 3, [0] xxxoxooo ooxoooox [MSB]
2237 01:23:09.388100 4, [0] xxxoxooo ooxoooox [MSB]
2238 01:23:09.388189 5, [0] ooxooooo ooxoooox [MSB]
2239 01:23:09.388278 6, [0] oooooooo ooxooooo [MSB]
2240 01:23:09.388366 32, [0] oooooooo xooooooo [MSB]
2241 01:23:09.388455 33, [0] oooooooo xooooooo [MSB]
2242 01:23:09.388544 34, [0] oooxoooo xooooooo [MSB]
2243 01:23:09.388654 35, [0] oooxoxoo xooxoooo [MSB]
2244 01:23:09.388765 36, [0] oooxoxoo xooxoxoo [MSB]
2245 01:23:09.388859 37, [0] oooxoxoo xxoxoxoo [MSB]
2246 01:23:09.392500 38, [0] oooxoxxo xxoxxxxo [MSB]
2247 01:23:09.395393 39, [0] oxxxoxxx xxoxxxxo [MSB]
2248 01:23:09.399175 40, [0] oxxxxxxx xxoxxxxx [MSB]
2249 01:23:09.402317 41, [0] xxxxxxxx xxoxxxxx [MSB]
2250 01:23:09.405493 42, [0] xxxxxxxx xxoxxxxx [MSB]
2251 01:23:09.409266 43, [0] xxxxxxxx xxoxxxxx [MSB]
2252 01:23:09.409599 44, [0] xxxxxxxx xxxxxxxx [MSB]
2253 01:23:09.412360 iDelay=44, Bit 0, Center 22 (5 ~ 40) 36
2254 01:23:09.415737 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2255 01:23:09.422491 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2256 01:23:09.425665 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2257 01:23:09.429381 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
2258 01:23:09.432269 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2259 01:23:09.435735 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2260 01:23:09.439125 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2261 01:23:09.442744 iDelay=44, Bit 8, Center 14 (-2 ~ 31) 34
2262 01:23:09.446194 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2263 01:23:09.449415 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2264 01:23:09.452460 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2265 01:23:09.456075 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2266 01:23:09.458926 iDelay=44, Bit 13, Center 18 (1 ~ 35) 35
2267 01:23:09.462837 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
2268 01:23:09.469592 iDelay=44, Bit 15, Center 22 (6 ~ 39) 34
2269 01:23:09.470112 ==
2270 01:23:09.472712 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2271 01:23:09.475675 fsp= 1, odt_onoff= 1, Byte mode= 0
2272 01:23:09.476097 ==
2273 01:23:09.478983 DQS Delay:
2274 01:23:09.479398 DQS0 = 0, DQS1 = 0
2275 01:23:09.479754 DQM Delay:
2276 01:23:09.482601 DQM0 = 19, DQM1 = 19
2277 01:23:09.483019 DQ Delay:
2278 01:23:09.486170 DQ0 =22, DQ1 =21, DQ2 =22, DQ3 =15
2279 01:23:09.489096 DQ4 =22, DQ5 =17, DQ6 =20, DQ7 =20
2280 01:23:09.492543 DQ8 =14, DQ9 =18, DQ10 =25, DQ11 =16
2281 01:23:09.495997 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
2282 01:23:09.496565
2283 01:23:09.496912
2284 01:23:09.497233
2285 01:23:09.499216 [DramC_TX_OE_Calibration] TA2
2286 01:23:09.502150 Original DQ_B0 (3 6) =30, OEN = 27
2287 01:23:09.505986 Original DQ_B1 (3 6) =30, OEN = 27
2288 01:23:09.509217 23, 0x0, End_B0=23 End_B1=23
2289 01:23:09.509643 24, 0x0, End_B0=24 End_B1=24
2290 01:23:09.512709 25, 0x0, End_B0=25 End_B1=25
2291 01:23:09.515901 26, 0x0, End_B0=26 End_B1=26
2292 01:23:09.519652 27, 0x0, End_B0=27 End_B1=27
2293 01:23:09.522872 28, 0x0, End_B0=28 End_B1=28
2294 01:23:09.523432 29, 0x0, End_B0=29 End_B1=29
2295 01:23:09.525743 30, 0x0, End_B0=30 End_B1=30
2296 01:23:09.529600 31, 0xFFFF, End_B0=30 End_B1=30
2297 01:23:09.535512 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2298 01:23:09.538871 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2299 01:23:09.539387
2300 01:23:09.539775
2301 01:23:09.542671 Write Rank1 MR23 =0x3f
2302 01:23:09.543088 [DQSOSC]
2303 01:23:09.552285 [DQSOSCAuto] RK1, (LSB)MR18= 0xd9d9, (MSB)MR19= 0x202, tDQSOscB0 = 432 ps tDQSOscB1 = 432 ps
2304 01:23:09.556258 CH0_RK1: MR19=0x202, MR18=0xD9D9, DQSOSC=432, MR23=63, INC=13, DEC=19
2305 01:23:09.559362 Write Rank1 MR23 =0x3f
2306 01:23:09.559859 [DQSOSC]
2307 01:23:09.569299 [DQSOSCAuto] RK1, (LSB)MR18= 0xd7d7, (MSB)MR19= 0x202, tDQSOscB0 = 433 ps tDQSOscB1 = 433 ps
2308 01:23:09.572465 CH0 RK1: MR19=202, MR18=D7D7
2309 01:23:09.572989 [RxdqsGatingPostProcess] freq 1600
2310 01:23:09.579225 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2311 01:23:09.579773 Rank: 0
2312 01:23:09.582632 best DQS0 dly(2T, 0.5T) = (2, 5)
2313 01:23:09.585970 best DQS1 dly(2T, 0.5T) = (2, 5)
2314 01:23:09.589124 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2315 01:23:09.592948 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2316 01:23:09.593477 Rank: 1
2317 01:23:09.595660 best DQS0 dly(2T, 0.5T) = (2, 6)
2318 01:23:09.599006 best DQS1 dly(2T, 0.5T) = (2, 6)
2319 01:23:09.602872 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2320 01:23:09.606606 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2321 01:23:09.609575 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2322 01:23:09.612591 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2323 01:23:09.619580 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2324 01:23:09.620111 Write Rank0 MR13 =0x59
2325 01:23:09.622537 ==
2326 01:23:09.625843 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2327 01:23:09.629481 fsp= 1, odt_onoff= 1, Byte mode= 0
2328 01:23:09.630005 ==
2329 01:23:09.632847 === u2Vref_new: 0x56 --> 0x3a
2330 01:23:09.636318 === u2Vref_new: 0x58 --> 0x58
2331 01:23:09.639140 === u2Vref_new: 0x5a --> 0x5a
2332 01:23:09.642193 === u2Vref_new: 0x5c --> 0x78
2333 01:23:09.645711 === u2Vref_new: 0x5e --> 0x7a
2334 01:23:09.646137 === u2Vref_new: 0x60 --> 0x90
2335 01:23:09.649729 [CA 0] Center 37 (12~63) winsize 52
2336 01:23:09.653110 [CA 1] Center 37 (11~63) winsize 53
2337 01:23:09.656383 [CA 2] Center 34 (6~63) winsize 58
2338 01:23:09.659748 [CA 3] Center 34 (6~63) winsize 58
2339 01:23:09.662978 [CA 4] Center 34 (6~63) winsize 58
2340 01:23:09.666326 [CA 5] Center 28 (-2~59) winsize 62
2341 01:23:09.666748
2342 01:23:09.670102 [CATrainingPosCal] consider 1 rank data
2343 01:23:09.673097 u2DelayCellTimex100 = 735/100 ps
2344 01:23:09.676725 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2345 01:23:09.680129 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2346 01:23:09.683349 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2347 01:23:09.690221 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2348 01:23:09.694009 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2349 01:23:09.696331 CA5 delay=28 (-2~59),Diff = 0 PI (0 cell)
2350 01:23:09.696773
2351 01:23:09.699596 CA PerBit enable=1, Macro0, CA PI delay=28
2352 01:23:09.703500 === u2Vref_new: 0x5e --> 0x7a
2353 01:23:09.704018
2354 01:23:09.704359 Vref(ca) range 1: 30
2355 01:23:09.704680
2356 01:23:09.706940 CS Dly= 11 (42-0-32)
2357 01:23:09.710272 Write Rank0 MR13 =0xd8
2358 01:23:09.710792 Write Rank0 MR13 =0xd8
2359 01:23:09.713718 Write Rank0 MR12 =0x5e
2360 01:23:09.714240 Write Rank1 MR13 =0x59
2361 01:23:09.716391 ==
2362 01:23:09.719962 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2363 01:23:09.722903 fsp= 1, odt_onoff= 1, Byte mode= 0
2364 01:23:09.723326 ==
2365 01:23:09.726312 === u2Vref_new: 0x56 --> 0x3a
2366 01:23:09.730101 === u2Vref_new: 0x58 --> 0x58
2367 01:23:09.733443 === u2Vref_new: 0x5a --> 0x5a
2368 01:23:09.736886 === u2Vref_new: 0x5c --> 0x78
2369 01:23:09.739588 === u2Vref_new: 0x5e --> 0x7a
2370 01:23:09.739868 === u2Vref_new: 0x60 --> 0x90
2371 01:23:09.743489 [CA 0] Center 37 (12~63) winsize 52
2372 01:23:09.747311 [CA 1] Center 37 (12~63) winsize 52
2373 01:23:09.750249 [CA 2] Center 34 (6~63) winsize 58
2374 01:23:09.753410 [CA 3] Center 34 (6~63) winsize 58
2375 01:23:09.757252 [CA 4] Center 34 (6~63) winsize 58
2376 01:23:09.760323 [CA 5] Center 28 (-2~58) winsize 61
2377 01:23:09.760602
2378 01:23:09.763522 [CATrainingPosCal] consider 2 rank data
2379 01:23:09.766716 u2DelayCellTimex100 = 735/100 ps
2380 01:23:09.770195 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2381 01:23:09.773534 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2382 01:23:09.780350 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2383 01:23:09.783823 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2384 01:23:09.786928 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2385 01:23:09.790415 CA5 delay=28 (-2~58),Diff = 0 PI (0 cell)
2386 01:23:09.790897
2387 01:23:09.794080 CA PerBit enable=1, Macro0, CA PI delay=28
2388 01:23:09.796894 === u2Vref_new: 0x60 --> 0x90
2389 01:23:09.797308
2390 01:23:09.797635 Vref(ca) range 1: 32
2391 01:23:09.800097
2392 01:23:09.800476 CS Dly= 11 (42-0-32)
2393 01:23:09.803757 Write Rank1 MR13 =0xd8
2394 01:23:09.804273 Write Rank1 MR13 =0xd8
2395 01:23:09.806943 Write Rank1 MR12 =0x60
2396 01:23:09.810791 [RankSwap] Rank num 2, (Multi 1), Rank 0
2397 01:23:09.813411 Write Rank0 MR2 =0xad
2398 01:23:09.813825 [Write Leveling]
2399 01:23:09.817039 delay byte0 byte1 byte2 byte3
2400 01:23:09.817554
2401 01:23:09.820098 10 0 0
2402 01:23:09.820635 11 0 0
2403 01:23:09.821031 12 0 0
2404 01:23:09.823705 13 0 0
2405 01:23:09.824124 14 0 0
2406 01:23:09.826602 15 0 0
2407 01:23:09.827023 16 0 0
2408 01:23:09.827358 17 0 0
2409 01:23:09.830270 18 0 0
2410 01:23:09.830788 19 0 0
2411 01:23:09.833518 20 0 0
2412 01:23:09.834056 21 0 0
2413 01:23:09.834397 22 0 0
2414 01:23:09.836755 23 0 0
2415 01:23:09.837278 24 0 ff
2416 01:23:09.840026 25 0 ff
2417 01:23:09.840547 26 0 ff
2418 01:23:09.843170 27 0 ff
2419 01:23:09.843623 28 0 ff
2420 01:23:09.846742 29 0 ff
2421 01:23:09.847261 30 0 ff
2422 01:23:09.847662 31 0 ff
2423 01:23:09.849875 32 0 ff
2424 01:23:09.850296 33 ff ff
2425 01:23:09.853352 34 ff ff
2426 01:23:09.853870 35 ff ff
2427 01:23:09.857363 36 ff ff
2428 01:23:09.857889 37 ff ff
2429 01:23:09.859876 38 ff ff
2430 01:23:09.860295 39 ff ff
2431 01:23:09.863138 pass bytecount = 0xff (0xff: all bytes pass)
2432 01:23:09.863703
2433 01:23:09.866898 DQS0 dly: 33
2434 01:23:09.867592 DQS1 dly: 24
2435 01:23:09.869956 Write Rank0 MR2 =0x2d
2436 01:23:09.873171 [RankSwap] Rank num 2, (Multi 1), Rank 0
2437 01:23:09.873587 Write Rank0 MR1 =0xd6
2438 01:23:09.876459 [Gating]
2439 01:23:09.876978 ==
2440 01:23:09.880011 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2441 01:23:09.883542 fsp= 1, odt_onoff= 1, Byte mode= 0
2442 01:23:09.884140 ==
2443 01:23:09.889713 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2444 01:23:09.893034 3 1 4 |504 2c2b |(1 1)(11 11) |(1 1)(1 1)| 0
2445 01:23:09.896438 3 1 8 |909 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2446 01:23:09.899663 3 1 12 |b0b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2447 01:23:09.906461 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2448 01:23:09.910077 [Byte 1] Lead/lag Transition tap number (1)
2449 01:23:09.913131 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2450 01:23:09.916238 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2451 01:23:09.922983 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2452 01:23:09.926431 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2453 01:23:09.929870 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2454 01:23:09.936103 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2455 01:23:09.939860 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2456 01:23:09.943180 3 2 16 |201 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2457 01:23:09.949808 3 2 20 |3d3d 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2458 01:23:09.952884 3 2 24 |3d3d 201 |(11 11)(11 11) |(1 1)(0 0)| 0
2459 01:23:09.956504 3 2 28 |3d3d 606 |(11 11)(11 11) |(1 1)(0 0)| 0
2460 01:23:09.962963 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2461 01:23:09.966733 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2462 01:23:09.969882 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2463 01:23:09.972874 3 3 12 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2464 01:23:09.979726 3 3 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2465 01:23:09.982992 3 3 20 |807 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2466 01:23:09.986019 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2467 01:23:09.992616 [Byte 0] Lead/lag falling Transition (3, 3, 24)
2468 01:23:09.996308 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2469 01:23:09.999474 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2470 01:23:10.006635 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2471 01:23:10.009913 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2472 01:23:10.013018 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2473 01:23:10.019158 3 4 16 |504 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2474 01:23:10.022556 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2475 01:23:10.026167 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2476 01:23:10.029966 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2477 01:23:10.035718 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2478 01:23:10.039131 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2479 01:23:10.042449 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2480 01:23:10.049252 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2481 01:23:10.052851 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2482 01:23:10.056249 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2483 01:23:10.062344 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2484 01:23:10.065328 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2485 01:23:10.069104 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2486 01:23:10.075715 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2487 01:23:10.079063 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2488 01:23:10.082484 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2489 01:23:10.088825 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2490 01:23:10.092500 [Byte 0] Lead/lag Transition tap number (2)
2491 01:23:10.095714 3 6 16 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2492 01:23:10.098567 [Byte 1] Lead/lag Transition tap number (1)
2493 01:23:10.102353 3 6 20 |1212 3d3d |(1 1)(11 11) |(0 0)(0 0)| 0
2494 01:23:10.109128 3 6 24 |4646 403 |(0 0)(11 11) |(0 0)(0 0)| 0
2495 01:23:10.112210 [Byte 0]First pass (3, 6, 24)
2496 01:23:10.115666 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2497 01:23:10.119175 [Byte 1]First pass (3, 6, 28)
2498 01:23:10.121911 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2499 01:23:10.125612 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2500 01:23:10.128873 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2501 01:23:10.131858 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2502 01:23:10.138456 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2503 01:23:10.142364 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2504 01:23:10.145735 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2505 01:23:10.148665 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2506 01:23:10.151869 All bytes gating window > 1UI, Early break!
2507 01:23:10.152298
2508 01:23:10.158411 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
2509 01:23:10.158932
2510 01:23:10.161756 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
2511 01:23:10.162179
2512 01:23:10.162521
2513 01:23:10.162834
2514 01:23:10.165589 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
2515 01:23:10.166113
2516 01:23:10.168536 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
2517 01:23:10.168965
2518 01:23:10.169303
2519 01:23:10.171959 Write Rank0 MR1 =0x56
2520 01:23:10.172385
2521 01:23:10.175263 best RODT dly(2T, 0.5T) = (2, 3)
2522 01:23:10.175824
2523 01:23:10.178791 best RODT dly(2T, 0.5T) = (2, 3)
2524 01:23:10.179330 ==
2525 01:23:10.182314 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2526 01:23:10.184989 fsp= 1, odt_onoff= 1, Byte mode= 0
2527 01:23:10.185422 ==
2528 01:23:10.191831 Start DQ dly to find pass range UseTestEngine =0
2529 01:23:10.195261 x-axis: bit #, y-axis: DQ dly (-127~63)
2530 01:23:10.195746 RX Vref Scan = 0
2531 01:23:10.198347 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2532 01:23:10.201685 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2533 01:23:10.205506 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2534 01:23:10.208399 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2535 01:23:10.211859 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2536 01:23:10.215276 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2537 01:23:10.215735 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2538 01:23:10.218504 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2539 01:23:10.221820 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2540 01:23:10.225773 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2541 01:23:10.228073 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2542 01:23:10.231807 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2543 01:23:10.234998 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2544 01:23:10.238378 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2545 01:23:10.238943 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2546 01:23:10.241264 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2547 01:23:10.245511 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2548 01:23:10.248218 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2549 01:23:10.251130 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2550 01:23:10.255086 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2551 01:23:10.257980 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2552 01:23:10.261343 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2553 01:23:10.261780 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2554 01:23:10.264743 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2555 01:23:10.268117 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2556 01:23:10.271838 -1, [0] xxxxxxxx xoxxxxxo [MSB]
2557 01:23:10.274531 0, [0] xxxoxxxx ooxxxxxo [MSB]
2558 01:23:10.278239 1, [0] xxooxxxx ooxxxxxo [MSB]
2559 01:23:10.278779 2, [0] xxooxxxx ooxxxxxo [MSB]
2560 01:23:10.281667 3, [0] xxooxxxo oooxxxxo [MSB]
2561 01:23:10.284451 4, [0] oxooxxxo oooxxxxo [MSB]
2562 01:23:10.288061 5, [0] oooooooo ooooooxo [MSB]
2563 01:23:10.291538 32, [0] oooooooo ooooooox [MSB]
2564 01:23:10.294653 33, [0] oooooooo ooooooox [MSB]
2565 01:23:10.298022 34, [0] oooooooo ooooooox [MSB]
2566 01:23:10.298550 35, [0] oooxoooo xxooooox [MSB]
2567 01:23:10.301053 36, [0] oooxoooo xxooooox [MSB]
2568 01:23:10.304613 37, [0] ooxxoooo xxooooox [MSB]
2569 01:23:10.307795 38, [0] ooxxoooo xxooooox [MSB]
2570 01:23:10.311200 39, [0] ooxxooox xxooooox [MSB]
2571 01:23:10.314184 40, [0] oxxxxoox xxxoooox [MSB]
2572 01:23:10.318365 41, [0] oxxxxoox xxxoxoox [MSB]
2573 01:23:10.318920 42, [0] xxxxxxxx xxxxxxxx [MSB]
2574 01:23:10.321186 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
2575 01:23:10.327827 iDelay=42, Bit 1, Center 22 (5 ~ 39) 35
2576 01:23:10.331108 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
2577 01:23:10.334114 iDelay=42, Bit 3, Center 17 (0 ~ 34) 35
2578 01:23:10.338402 iDelay=42, Bit 4, Center 22 (5 ~ 39) 35
2579 01:23:10.340864 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
2580 01:23:10.344268 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
2581 01:23:10.348029 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
2582 01:23:10.351078 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
2583 01:23:10.354225 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
2584 01:23:10.357630 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
2585 01:23:10.360749 iDelay=42, Bit 11, Center 23 (5 ~ 41) 37
2586 01:23:10.364186 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
2587 01:23:10.367497 iDelay=42, Bit 13, Center 23 (5 ~ 41) 37
2588 01:23:10.374143 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
2589 01:23:10.378008 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
2590 01:23:10.378526 ==
2591 01:23:10.380868 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2592 01:23:10.384058 fsp= 1, odt_onoff= 1, Byte mode= 0
2593 01:23:10.384474 ==
2594 01:23:10.387867 DQS Delay:
2595 01:23:10.388403 DQS0 = 0, DQS1 = 0
2596 01:23:10.388750 DQM Delay:
2597 01:23:10.390686 DQM0 = 20, DQM1 = 19
2598 01:23:10.391100 DQ Delay:
2599 01:23:10.394127 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =17
2600 01:23:10.397372 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =20
2601 01:23:10.400835 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =23
2602 01:23:10.404133 DQ12 =22, DQ13 =23, DQ14 =23, DQ15 =14
2603 01:23:10.404655
2604 01:23:10.404994
2605 01:23:10.407863 DramC Write-DBI off
2606 01:23:10.408382 ==
2607 01:23:10.411075 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2608 01:23:10.414322 fsp= 1, odt_onoff= 1, Byte mode= 0
2609 01:23:10.414846 ==
2610 01:23:10.420751 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2611 01:23:10.421270
2612 01:23:10.423720 Begin, DQ Scan Range 920~1176
2613 01:23:10.424137
2614 01:23:10.424472
2615 01:23:10.424786 TX Vref Scan disable
2616 01:23:10.427623 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
2617 01:23:10.431321 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2618 01:23:10.433854 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2619 01:23:10.437415 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2620 01:23:10.443930 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2621 01:23:10.447627 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2622 01:23:10.451004 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2623 01:23:10.454231 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2624 01:23:10.457544 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2625 01:23:10.460198 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2626 01:23:10.463887 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2627 01:23:10.466944 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2628 01:23:10.470586 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2629 01:23:10.474124 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2630 01:23:10.476963 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2631 01:23:10.480352 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2632 01:23:10.483964 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2633 01:23:10.487529 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2634 01:23:10.490637 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2635 01:23:10.496908 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2636 01:23:10.500040 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2637 01:23:10.504072 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2638 01:23:10.507198 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2639 01:23:10.510584 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2640 01:23:10.513671 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2641 01:23:10.517708 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2642 01:23:10.520202 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2643 01:23:10.523190 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2644 01:23:10.527056 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2645 01:23:10.529999 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2646 01:23:10.533881 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2647 01:23:10.536876 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2648 01:23:10.540144 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2649 01:23:10.547017 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2650 01:23:10.550045 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2651 01:23:10.553163 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2652 01:23:10.556457 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2653 01:23:10.559986 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2654 01:23:10.563162 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2655 01:23:10.566262 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2656 01:23:10.569943 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2657 01:23:10.573089 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2658 01:23:10.576101 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2659 01:23:10.579796 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2660 01:23:10.583042 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2661 01:23:10.586116 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2662 01:23:10.589316 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2663 01:23:10.592851 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2664 01:23:10.596336 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2665 01:23:10.599448 969 |3 6 9|[0] xxxxxxxx xxxxxxxo [MSB]
2666 01:23:10.602978 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2667 01:23:10.606352 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
2668 01:23:10.612919 972 |3 6 12|[0] xxxxxxxx oooxxxoo [MSB]
2669 01:23:10.616310 973 |3 6 13|[0] xxxxxxxx oooxoxoo [MSB]
2670 01:23:10.619761 974 |3 6 14|[0] xxxxxxxx oooooxoo [MSB]
2671 01:23:10.622739 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2672 01:23:10.625791 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2673 01:23:10.629000 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2674 01:23:10.632820 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2675 01:23:10.635818 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2676 01:23:10.639177 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2677 01:23:10.642500 981 |3 6 21|[0] xooooxoo oooooooo [MSB]
2678 01:23:10.646396 982 |3 6 22|[0] oooooxoo oooooooo [MSB]
2679 01:23:10.649811 986 |3 6 26|[0] oooooooo ooooooox [MSB]
2680 01:23:10.652507 987 |3 6 27|[0] oooooooo ooooooox [MSB]
2681 01:23:10.659393 988 |3 6 28|[0] oooooooo oxooooox [MSB]
2682 01:23:10.662326 989 |3 6 29|[0] oooooooo oxooooox [MSB]
2683 01:23:10.665855 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
2684 01:23:10.669667 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2685 01:23:10.672253 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2686 01:23:10.676288 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2687 01:23:10.679282 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2688 01:23:10.683126 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2689 01:23:10.685912 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2690 01:23:10.689366 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2691 01:23:10.692322 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
2692 01:23:10.695533 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2693 01:23:10.698976 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2694 01:23:10.702313 1001 |3 6 41|[0] ooxxoooo xxxxxxxx [MSB]
2695 01:23:10.705768 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2696 01:23:10.709421 Byte0, DQ PI dly=990, DQM PI dly= 990
2697 01:23:10.716054 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2698 01:23:10.716576
2699 01:23:10.719482 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2700 01:23:10.720010
2701 01:23:10.722653 Byte1, DQ PI dly=979, DQM PI dly= 979
2702 01:23:10.728736 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2703 01:23:10.729257
2704 01:23:10.732129 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2705 01:23:10.732687
2706 01:23:10.733034 ==
2707 01:23:10.735787 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2708 01:23:10.739062 fsp= 1, odt_onoff= 1, Byte mode= 0
2709 01:23:10.742189 ==
2710 01:23:10.745839 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2711 01:23:10.746395
2712 01:23:10.748669 Begin, DQ Scan Range 955~1019
2713 01:23:10.749092 Write Rank0 MR14 =0x0
2714 01:23:10.758740
2715 01:23:10.759264 CH=1, VrefRange= 0, VrefLevel = 0
2716 01:23:10.765631 TX Bit0 (984~999) 16 991, Bit8 (974~984) 11 979,
2717 01:23:10.768800 TX Bit1 (983~996) 14 989, Bit9 (974~983) 10 978,
2718 01:23:10.775179 TX Bit2 (982~996) 15 989, Bit10 (975~986) 12 980,
2719 01:23:10.778912 TX Bit3 (979~992) 14 985, Bit11 (976~987) 12 981,
2720 01:23:10.782319 TX Bit4 (983~998) 16 990, Bit12 (975~987) 13 981,
2721 01:23:10.788616 TX Bit5 (985~998) 14 991, Bit13 (977~987) 11 982,
2722 01:23:10.791895 TX Bit6 (983~998) 16 990, Bit14 (975~986) 12 980,
2723 01:23:10.794804 TX Bit7 (984~996) 13 990, Bit15 (969~979) 11 974,
2724 01:23:10.795229
2725 01:23:10.798383 Write Rank0 MR14 =0x2
2726 01:23:10.807252
2727 01:23:10.807715 CH=1, VrefRange= 0, VrefLevel = 2
2728 01:23:10.814335 TX Bit0 (983~1000) 18 991, Bit8 (972~984) 13 978,
2729 01:23:10.817512 TX Bit1 (983~997) 15 990, Bit9 (973~983) 11 978,
2730 01:23:10.823795 TX Bit2 (981~996) 16 988, Bit10 (975~987) 13 981,
2731 01:23:10.827394 TX Bit3 (979~993) 15 986, Bit11 (975~988) 14 981,
2732 01:23:10.831080 TX Bit4 (983~998) 16 990, Bit12 (975~988) 14 981,
2733 01:23:10.837437 TX Bit5 (984~999) 16 991, Bit13 (977~988) 12 982,
2734 01:23:10.840820 TX Bit6 (983~998) 16 990, Bit14 (975~986) 12 980,
2735 01:23:10.844149 TX Bit7 (983~997) 15 990, Bit15 (969~981) 13 975,
2736 01:23:10.847473
2737 01:23:10.847857 Write Rank0 MR14 =0x4
2738 01:23:10.856813
2739 01:23:10.857341 CH=1, VrefRange= 0, VrefLevel = 4
2740 01:23:10.863432 TX Bit0 (983~1000) 18 991, Bit8 (971~985) 15 978,
2741 01:23:10.866688 TX Bit1 (983~998) 16 990, Bit9 (972~984) 13 978,
2742 01:23:10.873783 TX Bit2 (981~998) 18 989, Bit10 (975~988) 14 981,
2743 01:23:10.876825 TX Bit3 (979~993) 15 986, Bit11 (975~989) 15 982,
2744 01:23:10.880059 TX Bit4 (982~999) 18 990, Bit12 (975~989) 15 982,
2745 01:23:10.887310 TX Bit5 (984~999) 16 991, Bit13 (976~990) 15 983,
2746 01:23:10.890185 TX Bit6 (983~998) 16 990, Bit14 (974~987) 14 980,
2747 01:23:10.893228 TX Bit7 (983~998) 16 990, Bit15 (969~982) 14 975,
2748 01:23:10.893648
2749 01:23:10.896748 Write Rank0 MR14 =0x6
2750 01:23:10.906455
2751 01:23:10.906973 CH=1, VrefRange= 0, VrefLevel = 6
2752 01:23:10.912887 TX Bit0 (984~1001) 18 992, Bit8 (971~985) 15 978,
2753 01:23:10.916336 TX Bit1 (982~998) 17 990, Bit9 (972~984) 13 978,
2754 01:23:10.922649 TX Bit2 (980~998) 19 989, Bit10 (974~989) 16 981,
2755 01:23:10.926004 TX Bit3 (978~994) 17 986, Bit11 (975~989) 15 982,
2756 01:23:10.929042 TX Bit4 (982~999) 18 990, Bit12 (975~990) 16 982,
2757 01:23:10.936017 TX Bit5 (984~999) 16 991, Bit13 (976~990) 15 983,
2758 01:23:10.939042 TX Bit6 (982~999) 18 990, Bit14 (974~989) 16 981,
2759 01:23:10.942749 TX Bit7 (983~998) 16 990, Bit15 (969~983) 15 976,
2760 01:23:10.946048
2761 01:23:10.946577 Write Rank0 MR14 =0x8
2762 01:23:10.955385
2763 01:23:10.955927 CH=1, VrefRange= 0, VrefLevel = 8
2764 01:23:10.962006 TX Bit0 (983~1001) 19 992, Bit8 (971~986) 16 978,
2765 01:23:10.964713 TX Bit1 (982~999) 18 990, Bit9 (971~984) 14 977,
2766 01:23:10.971300 TX Bit2 (979~998) 20 988, Bit10 (974~990) 17 982,
2767 01:23:10.974818 TX Bit3 (978~995) 18 986, Bit11 (975~990) 16 982,
2768 01:23:10.978226 TX Bit4 (981~1000) 20 990, Bit12 (974~991) 18 982,
2769 01:23:10.984854 TX Bit5 (984~1000) 17 992, Bit13 (976~991) 16 983,
2770 01:23:10.987745 TX Bit6 (982~999) 18 990, Bit14 (974~990) 17 982,
2771 01:23:10.994475 TX Bit7 (982~999) 18 990, Bit15 (968~984) 17 976,
2772 01:23:10.994870
2773 01:23:10.995177 Write Rank0 MR14 =0xa
2774 01:23:11.004626
2775 01:23:11.005009 CH=1, VrefRange= 0, VrefLevel = 10
2776 01:23:11.011194 TX Bit0 (983~1002) 20 992, Bit8 (970~986) 17 978,
2777 01:23:11.014409 TX Bit1 (981~999) 19 990, Bit9 (970~985) 16 977,
2778 01:23:11.021361 TX Bit2 (979~999) 21 989, Bit10 (974~991) 18 982,
2779 01:23:11.024791 TX Bit3 (978~995) 18 986, Bit11 (974~991) 18 982,
2780 01:23:11.027789 TX Bit4 (981~1000) 20 990, Bit12 (974~991) 18 982,
2781 01:23:11.034960 TX Bit5 (983~1000) 18 991, Bit13 (975~991) 17 983,
2782 01:23:11.037699 TX Bit6 (982~999) 18 990, Bit14 (974~991) 18 982,
2783 01:23:11.044332 TX Bit7 (981~999) 19 990, Bit15 (968~984) 17 976,
2784 01:23:11.044721
2785 01:23:11.045030 Write Rank0 MR14 =0xc
2786 01:23:11.054672
2787 01:23:11.057897 CH=1, VrefRange= 0, VrefLevel = 12
2788 01:23:11.061068 TX Bit0 (983~1002) 20 992, Bit8 (970~986) 17 978,
2789 01:23:11.064547 TX Bit1 (981~999) 19 990, Bit9 (970~985) 16 977,
2790 01:23:11.071388 TX Bit2 (979~999) 21 989, Bit10 (974~991) 18 982,
2791 01:23:11.074633 TX Bit3 (978~995) 18 986, Bit11 (974~991) 18 982,
2792 01:23:11.077986 TX Bit4 (981~1000) 20 990, Bit12 (974~991) 18 982,
2793 01:23:11.083999 TX Bit5 (983~1000) 18 991, Bit13 (975~991) 17 983,
2794 01:23:11.087102 TX Bit6 (982~999) 18 990, Bit14 (974~991) 18 982,
2795 01:23:11.093532 TX Bit7 (981~999) 19 990, Bit15 (968~984) 17 976,
2796 01:23:11.093626
2797 01:23:11.093700 Write Rank0 MR14 =0xe
2798 01:23:11.103444
2799 01:23:11.106811 CH=1, VrefRange= 0, VrefLevel = 14
2800 01:23:11.110556 TX Bit0 (982~1002) 21 992, Bit8 (970~987) 18 978,
2801 01:23:11.113813 TX Bit1 (980~1000) 21 990, Bit9 (970~986) 17 978,
2802 01:23:11.120295 TX Bit2 (978~1000) 23 989, Bit10 (973~991) 19 982,
2803 01:23:11.123591 TX Bit3 (977~997) 21 987, Bit11 (974~992) 19 983,
2804 01:23:11.127185 TX Bit4 (980~1001) 22 990, Bit12 (973~992) 20 982,
2805 01:23:11.133581 TX Bit5 (983~1002) 20 992, Bit13 (975~992) 18 983,
2806 01:23:11.136826 TX Bit6 (981~1001) 21 991, Bit14 (973~992) 20 982,
2807 01:23:11.143136 TX Bit7 (981~1000) 20 990, Bit15 (967~985) 19 976,
2808 01:23:11.143229
2809 01:23:11.143303 Write Rank0 MR14 =0x10
2810 01:23:11.153675
2811 01:23:11.157202 CH=1, VrefRange= 0, VrefLevel = 16
2812 01:23:11.160513 TX Bit0 (982~1003) 22 992, Bit8 (970~989) 20 979,
2813 01:23:11.163698 TX Bit1 (980~1001) 22 990, Bit9 (970~987) 18 978,
2814 01:23:11.170592 TX Bit2 (978~1000) 23 989, Bit10 (972~991) 20 981,
2815 01:23:11.174007 TX Bit3 (977~998) 22 987, Bit11 (974~992) 19 983,
2816 01:23:11.177187 TX Bit4 (980~1002) 23 991, Bit12 (973~992) 20 982,
2817 01:23:11.183860 TX Bit5 (983~1002) 20 992, Bit13 (975~992) 18 983,
2818 01:23:11.187368 TX Bit6 (981~1001) 21 991, Bit14 (971~992) 22 981,
2819 01:23:11.193961 TX Bit7 (980~1000) 21 990, Bit15 (967~985) 19 976,
2820 01:23:11.194055
2821 01:23:11.194128 Write Rank0 MR14 =0x12
2822 01:23:11.204452
2823 01:23:11.207748 CH=1, VrefRange= 0, VrefLevel = 18
2824 01:23:11.211133 TX Bit0 (981~1004) 24 992, Bit8 (970~989) 20 979,
2825 01:23:11.214626 TX Bit1 (979~1001) 23 990, Bit9 (970~987) 18 978,
2826 01:23:11.221192 TX Bit2 (978~1001) 24 989, Bit10 (972~992) 21 982,
2827 01:23:11.224361 TX Bit3 (977~998) 22 987, Bit11 (973~992) 20 982,
2828 01:23:11.227682 TX Bit4 (980~1002) 23 991, Bit12 (972~993) 22 982,
2829 01:23:11.234257 TX Bit5 (982~1003) 22 992, Bit13 (975~992) 18 983,
2830 01:23:11.237704 TX Bit6 (980~1001) 22 990, Bit14 (971~992) 22 981,
2831 01:23:11.244174 TX Bit7 (980~1001) 22 990, Bit15 (967~985) 19 976,
2832 01:23:11.244266
2833 01:23:11.244338 Write Rank0 MR14 =0x14
2834 01:23:11.254876
2835 01:23:11.257852 CH=1, VrefRange= 0, VrefLevel = 20
2836 01:23:11.261134 TX Bit0 (981~1004) 24 992, Bit8 (969~990) 22 979,
2837 01:23:11.264789 TX Bit1 (979~1001) 23 990, Bit9 (969~989) 21 979,
2838 01:23:11.271697 TX Bit2 (978~1001) 24 989, Bit10 (972~992) 21 982,
2839 01:23:11.274728 TX Bit3 (977~999) 23 988, Bit11 (972~993) 22 982,
2840 01:23:11.278104 TX Bit4 (979~1002) 24 990, Bit12 (972~993) 22 982,
2841 01:23:11.284704 TX Bit5 (982~1003) 22 992, Bit13 (974~993) 20 983,
2842 01:23:11.287686 TX Bit6 (980~1002) 23 991, Bit14 (972~992) 21 982,
2843 01:23:11.294391 TX Bit7 (980~1002) 23 991, Bit15 (967~986) 20 976,
2844 01:23:11.294486
2845 01:23:11.294559 Write Rank0 MR14 =0x16
2846 01:23:11.305340
2847 01:23:11.308672 CH=1, VrefRange= 0, VrefLevel = 22
2848 01:23:11.311714 TX Bit0 (982~1005) 24 993, Bit8 (969~991) 23 980,
2849 01:23:11.315216 TX Bit1 (979~1002) 24 990, Bit9 (970~990) 21 980,
2850 01:23:11.322250 TX Bit2 (978~1001) 24 989, Bit10 (970~992) 23 981,
2851 01:23:11.325536 TX Bit3 (977~999) 23 988, Bit11 (972~993) 22 982,
2852 01:23:11.328338 TX Bit4 (979~1003) 25 991, Bit12 (972~993) 22 982,
2853 01:23:11.334941 TX Bit5 (981~1004) 24 992, Bit13 (974~993) 20 983,
2854 01:23:11.338537 TX Bit6 (979~1003) 25 991, Bit14 (971~993) 23 982,
2855 01:23:11.344993 TX Bit7 (979~1001) 23 990, Bit15 (967~986) 20 976,
2856 01:23:11.345089
2857 01:23:11.345163 Write Rank0 MR14 =0x18
2858 01:23:11.355996
2859 01:23:11.359206 CH=1, VrefRange= 0, VrefLevel = 24
2860 01:23:11.362462 TX Bit0 (980~1005) 26 992, Bit8 (969~991) 23 980,
2861 01:23:11.365602 TX Bit1 (978~1003) 26 990, Bit9 (969~990) 22 979,
2862 01:23:11.372147 TX Bit2 (977~1002) 26 989, Bit10 (971~993) 23 982,
2863 01:23:11.375724 TX Bit3 (977~999) 23 988, Bit11 (971~993) 23 982,
2864 01:23:11.379206 TX Bit4 (978~1003) 26 990, Bit12 (971~994) 24 982,
2865 01:23:11.385459 TX Bit5 (981~1004) 24 992, Bit13 (974~993) 20 983,
2866 01:23:11.389068 TX Bit6 (980~1003) 24 991, Bit14 (970~993) 24 981,
2867 01:23:11.395155 TX Bit7 (980~1002) 23 991, Bit15 (966~987) 22 976,
2868 01:23:11.395248
2869 01:23:11.395320 Write Rank0 MR14 =0x1a
2870 01:23:11.406633
2871 01:23:11.409958 CH=1, VrefRange= 0, VrefLevel = 26
2872 01:23:11.413011 TX Bit0 (980~1006) 27 993, Bit8 (969~991) 23 980,
2873 01:23:11.416914 TX Bit1 (978~1002) 25 990, Bit9 (969~990) 22 979,
2874 01:23:11.423380 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2875 01:23:11.426394 TX Bit3 (976~1000) 25 988, Bit11 (971~993) 23 982,
2876 01:23:11.430119 TX Bit4 (978~1004) 27 991, Bit12 (971~994) 24 982,
2877 01:23:11.436248 TX Bit5 (980~1005) 26 992, Bit13 (973~994) 22 983,
2878 01:23:11.439655 TX Bit6 (979~1003) 25 991, Bit14 (970~993) 24 981,
2879 01:23:11.446136 TX Bit7 (979~1002) 24 990, Bit15 (966~988) 23 977,
2880 01:23:11.446228
2881 01:23:11.446301 Write Rank0 MR14 =0x1c
2882 01:23:11.457551
2883 01:23:11.460866 CH=1, VrefRange= 0, VrefLevel = 28
2884 01:23:11.464366 TX Bit0 (979~1006) 28 992, Bit8 (969~991) 23 980,
2885 01:23:11.467303 TX Bit1 (978~1004) 27 991, Bit9 (969~990) 22 979,
2886 01:23:11.473816 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2887 01:23:11.477210 TX Bit3 (976~1000) 25 988, Bit11 (971~994) 24 982,
2888 01:23:11.480695 TX Bit4 (978~1005) 28 991, Bit12 (970~995) 26 982,
2889 01:23:11.487520 TX Bit5 (980~1005) 26 992, Bit13 (973~994) 22 983,
2890 01:23:11.490849 TX Bit6 (979~1004) 26 991, Bit14 (970~994) 25 982,
2891 01:23:11.497123 TX Bit7 (979~1003) 25 991, Bit15 (966~988) 23 977,
2892 01:23:11.497216
2893 01:23:11.497289 Write Rank0 MR14 =0x1e
2894 01:23:11.508361
2895 01:23:11.511519 CH=1, VrefRange= 0, VrefLevel = 30
2896 01:23:11.514764 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2897 01:23:11.518235 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
2898 01:23:11.524711 TX Bit2 (977~1001) 25 989, Bit10 (970~994) 25 982,
2899 01:23:11.528361 TX Bit3 (976~1000) 25 988, Bit11 (971~994) 24 982,
2900 01:23:11.531632 TX Bit4 (979~1005) 27 992, Bit12 (971~994) 24 982,
2901 01:23:11.538799 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2902 01:23:11.542261 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2903 01:23:11.548996 TX Bit7 (979~1003) 25 991, Bit15 (965~988) 24 976,
2904 01:23:11.549531
2905 01:23:11.549871 Write Rank0 MR14 =0x20
2906 01:23:11.559687
2907 01:23:11.563223 CH=1, VrefRange= 0, VrefLevel = 32
2908 01:23:11.566761 TX Bit0 (979~1006) 28 992, Bit8 (969~992) 24 980,
2909 01:23:11.569599 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2910 01:23:11.576168 TX Bit2 (978~1002) 25 990, Bit10 (970~993) 24 981,
2911 01:23:11.580105 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2912 01:23:11.582986 TX Bit4 (979~1005) 27 992, Bit12 (971~994) 24 982,
2913 01:23:11.589338 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2914 01:23:11.592789 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2915 01:23:11.599180 TX Bit7 (978~1004) 27 991, Bit15 (966~988) 23 977,
2916 01:23:11.599639
2917 01:23:11.599992 Write Rank0 MR14 =0x22
2918 01:23:11.610740
2919 01:23:11.614198 CH=1, VrefRange= 0, VrefLevel = 34
2920 01:23:11.616676 TX Bit0 (979~1006) 28 992, Bit8 (969~992) 24 980,
2921 01:23:11.620125 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2922 01:23:11.627548 TX Bit2 (978~1002) 25 990, Bit10 (970~993) 24 981,
2923 01:23:11.630079 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2924 01:23:11.637566 TX Bit4 (979~1005) 27 992, Bit12 (971~994) 24 982,
2925 01:23:11.639946 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2926 01:23:11.643350 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2927 01:23:11.650413 TX Bit7 (978~1004) 27 991, Bit15 (966~988) 23 977,
2928 01:23:11.650944
2929 01:23:11.651276 Write Rank0 MR14 =0x24
2930 01:23:11.661191
2931 01:23:11.664857 CH=1, VrefRange= 0, VrefLevel = 36
2932 01:23:11.668462 TX Bit0 (979~1006) 28 992, Bit8 (969~992) 24 980,
2933 01:23:11.671582 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2934 01:23:11.677668 TX Bit2 (978~1002) 25 990, Bit10 (970~993) 24 981,
2935 01:23:11.681519 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2936 01:23:11.684510 TX Bit4 (979~1005) 27 992, Bit12 (971~994) 24 982,
2937 01:23:11.691120 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2938 01:23:11.694238 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2939 01:23:11.701436 TX Bit7 (978~1004) 27 991, Bit15 (966~988) 23 977,
2940 01:23:11.701968
2941 01:23:11.702303 Write Rank0 MR14 =0x26
2942 01:23:11.712137
2943 01:23:11.715921 CH=1, VrefRange= 0, VrefLevel = 38
2944 01:23:11.719213 TX Bit0 (979~1006) 28 992, Bit8 (969~992) 24 980,
2945 01:23:11.722768 TX Bit1 (978~1004) 27 991, Bit9 (969~991) 23 980,
2946 01:23:11.728949 TX Bit2 (978~1002) 25 990, Bit10 (970~993) 24 981,
2947 01:23:11.732173 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2948 01:23:11.735651 TX Bit4 (979~1005) 27 992, Bit12 (971~994) 24 982,
2949 01:23:11.742601 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2950 01:23:11.745812 TX Bit6 (978~1005) 28 991, Bit14 (971~993) 23 982,
2951 01:23:11.751789 TX Bit7 (978~1004) 27 991, Bit15 (966~988) 23 977,
2952 01:23:11.752219
2953 01:23:11.752552
2954 01:23:11.755447 TX Vref found, early break! 378< 382
2955 01:23:11.758915 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2956 01:23:11.761916 u1DelayCellOfst[0]=5 cells (4 PI)
2957 01:23:11.765238 u1DelayCellOfst[1]=3 cells (3 PI)
2958 01:23:11.768493 u1DelayCellOfst[2]=2 cells (2 PI)
2959 01:23:11.771701 u1DelayCellOfst[3]=0 cells (0 PI)
2960 01:23:11.775502 u1DelayCellOfst[4]=5 cells (4 PI)
2961 01:23:11.778183 u1DelayCellOfst[5]=6 cells (5 PI)
2962 01:23:11.781666 u1DelayCellOfst[6]=3 cells (3 PI)
2963 01:23:11.782090 u1DelayCellOfst[7]=3 cells (3 PI)
2964 01:23:11.788533 Byte0, DQ PI dly=988, DQM PI dly= 990
2965 01:23:11.791385 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2966 01:23:11.791932
2967 01:23:11.794790 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2968 01:23:11.795214
2969 01:23:11.798404 u1DelayCellOfst[8]=3 cells (3 PI)
2970 01:23:11.801457 u1DelayCellOfst[9]=3 cells (3 PI)
2971 01:23:11.805473 u1DelayCellOfst[10]=5 cells (4 PI)
2972 01:23:11.808123 u1DelayCellOfst[11]=6 cells (5 PI)
2973 01:23:11.811464 u1DelayCellOfst[12]=6 cells (5 PI)
2974 01:23:11.815362 u1DelayCellOfst[13]=7 cells (6 PI)
2975 01:23:11.818982 u1DelayCellOfst[14]=6 cells (5 PI)
2976 01:23:11.822244 u1DelayCellOfst[15]=0 cells (0 PI)
2977 01:23:11.824907 Byte1, DQ PI dly=977, DQM PI dly= 980
2978 01:23:11.828664 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
2979 01:23:11.829197
2980 01:23:11.831887 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
2981 01:23:11.832581
2982 01:23:11.835562 Write Rank0 MR14 =0x20
2983 01:23:11.836082
2984 01:23:11.838205 Final TX Range 0 Vref 32
2985 01:23:11.838625
2986 01:23:11.844983 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2987 01:23:11.845525
2988 01:23:11.851270 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2989 01:23:11.858340 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2990 01:23:11.864459 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2991 01:23:11.868019 Write Rank0 MR3 =0xb0
2992 01:23:11.868507 DramC Write-DBI on
2993 01:23:11.868843 ==
2994 01:23:11.874579 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2995 01:23:11.878070 fsp= 1, odt_onoff= 1, Byte mode= 0
2996 01:23:11.878493 ==
2997 01:23:11.880842 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2998 01:23:11.881262
2999 01:23:11.884756 Begin, DQ Scan Range 700~764
3000 01:23:11.885174
3001 01:23:11.885507
3002 01:23:11.887712 TX Vref Scan disable
3003 01:23:11.890836 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3004 01:23:11.894208 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3005 01:23:11.897502 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3006 01:23:11.900675 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3007 01:23:11.904143 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3008 01:23:11.907822 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3009 01:23:11.910690 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3010 01:23:11.914585 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3011 01:23:11.917324 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3012 01:23:11.921075 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3013 01:23:11.924160 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3014 01:23:11.927649 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3015 01:23:11.930885 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3016 01:23:11.934203 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3017 01:23:11.937128 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3018 01:23:11.940617 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3019 01:23:11.944421 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3020 01:23:11.947852 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3021 01:23:11.953997 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3022 01:23:11.957431 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3023 01:23:11.960603 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3024 01:23:11.964169 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3025 01:23:11.970659 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3026 01:23:11.973760 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3027 01:23:11.977134 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3028 01:23:11.980791 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3029 01:23:11.983779 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3030 01:23:11.987015 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3031 01:23:11.990729 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3032 01:23:11.994040 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3033 01:23:11.997625 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3034 01:23:12.000705 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3035 01:23:12.004008 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3036 01:23:12.007236 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3037 01:23:12.010821 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3038 01:23:12.013642 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3039 01:23:12.016921 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3040 01:23:12.020231 Byte0, DQ PI dly=736, DQM PI dly= 736
3041 01:23:12.026870 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
3042 01:23:12.027295
3043 01:23:12.029948 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
3044 01:23:12.030370
3045 01:23:12.033242 Byte1, DQ PI dly=724, DQM PI dly= 724
3046 01:23:12.036415 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
3047 01:23:12.039794
3048 01:23:12.043389 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
3049 01:23:12.043854
3050 01:23:12.049684 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3051 01:23:12.056435 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3052 01:23:12.063256 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3053 01:23:12.066433 Write Rank0 MR3 =0x30
3054 01:23:12.066851 DramC Write-DBI off
3055 01:23:12.067186
3056 01:23:12.067543 [DATLAT]
3057 01:23:12.069907 Freq=1600, CH1 RK0, use_rxtx_scan=0
3058 01:23:12.070328
3059 01:23:12.073533 DATLAT Default: 0xf
3060 01:23:12.076340 7, 0xFFFF, sum=0
3061 01:23:12.076729 8, 0xFFFF, sum=0
3062 01:23:12.077040 9, 0xFFFF, sum=0
3063 01:23:12.079885 10, 0xFFFF, sum=0
3064 01:23:12.080273 11, 0xFFFF, sum=0
3065 01:23:12.083443 12, 0xFFFF, sum=0
3066 01:23:12.083837 13, 0xFFFF, sum=0
3067 01:23:12.086604 14, 0x0, sum=1
3068 01:23:12.086995 15, 0x0, sum=2
3069 01:23:12.089809 16, 0x0, sum=3
3070 01:23:12.090300 17, 0x0, sum=4
3071 01:23:12.093312 pattern=2 first_step=14 total pass=5 best_step=16
3072 01:23:12.093701 ==
3073 01:23:12.100333 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3074 01:23:12.102912 fsp= 1, odt_onoff= 1, Byte mode= 0
3075 01:23:12.103302 ==
3076 01:23:12.106589 Start DQ dly to find pass range UseTestEngine =1
3077 01:23:12.110248 x-axis: bit #, y-axis: DQ dly (-127~63)
3078 01:23:12.113533 RX Vref Scan = 1
3079 01:23:12.220050
3080 01:23:12.220574 RX Vref found, early break!
3081 01:23:12.220916
3082 01:23:12.226620 Final RX Vref 11, apply to both rank0 and 1
3083 01:23:12.227140 ==
3084 01:23:12.229994 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3085 01:23:12.233217 fsp= 1, odt_onoff= 1, Byte mode= 0
3086 01:23:12.233647 ==
3087 01:23:12.233987 DQS Delay:
3088 01:23:12.236651 DQS0 = 0, DQS1 = 0
3089 01:23:12.237072 DQM Delay:
3090 01:23:12.239745 DQM0 = 20, DQM1 = 19
3091 01:23:12.240269 DQ Delay:
3092 01:23:12.243552 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16
3093 01:23:12.246528 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =21
3094 01:23:12.250008 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3095 01:23:12.253248 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =13
3096 01:23:12.253790
3097 01:23:12.254130
3098 01:23:12.254438
3099 01:23:12.256280 [DramC_TX_OE_Calibration] TA2
3100 01:23:12.260107 Original DQ_B0 (3 6) =30, OEN = 27
3101 01:23:12.263551 Original DQ_B1 (3 6) =30, OEN = 27
3102 01:23:12.266821 23, 0x0, End_B0=23 End_B1=23
3103 01:23:12.267347 24, 0x0, End_B0=24 End_B1=24
3104 01:23:12.269444 25, 0x0, End_B0=25 End_B1=25
3105 01:23:12.273511 26, 0x0, End_B0=26 End_B1=26
3106 01:23:12.276187 27, 0x0, End_B0=27 End_B1=27
3107 01:23:12.279965 28, 0x0, End_B0=28 End_B1=28
3108 01:23:12.280495 29, 0x0, End_B0=29 End_B1=29
3109 01:23:12.283301 30, 0x0, End_B0=30 End_B1=30
3110 01:23:12.286373 31, 0xFFFF, End_B0=30 End_B1=30
3111 01:23:12.293334 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3112 01:23:12.296393 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3113 01:23:12.297145
3114 01:23:12.297589
3115 01:23:12.299815 Write Rank0 MR23 =0x3f
3116 01:23:12.300328 [DQSOSC]
3117 01:23:12.309827 [DQSOSCAuto] RK0, (LSB)MR18= 0xbebe, (MSB)MR19= 0x202, tDQSOscB0 = 448 ps tDQSOscB1 = 448 ps
3118 01:23:12.316684 CH1_RK0: MR19=0x202, MR18=0xBEBE, DQSOSC=448, MR23=63, INC=12, DEC=18
3119 01:23:12.317260 Write Rank0 MR23 =0x3f
3120 01:23:12.317610 [DQSOSC]
3121 01:23:12.326294 [DQSOSCAuto] RK0, (LSB)MR18= 0xbcbc, (MSB)MR19= 0x202, tDQSOscB0 = 450 ps tDQSOscB1 = 450 ps
3122 01:23:12.329491 CH1 RK0: MR19=202, MR18=BCBC
3123 01:23:12.332420 [RankSwap] Rank num 2, (Multi 1), Rank 1
3124 01:23:12.332841 Write Rank0 MR2 =0xad
3125 01:23:12.336457 [Write Leveling]
3126 01:23:12.339391 delay byte0 byte1 byte2 byte3
3127 01:23:12.339859
3128 01:23:12.340191 10 0 0
3129 01:23:12.342945 11 0 0
3130 01:23:12.343401 12 0 0
3131 01:23:12.343786 13 0 0
3132 01:23:12.345758 14 0 0
3133 01:23:12.346241 15 0 0
3134 01:23:12.349398 16 0 0
3135 01:23:12.349934 17 0 0
3136 01:23:12.352543 18 0 0
3137 01:23:12.352967 19 0 0
3138 01:23:12.353305 20 0 0
3139 01:23:12.355556 21 0 0
3140 01:23:12.355979 22 0 0
3141 01:23:12.359279 23 0 0
3142 01:23:12.359754 24 0 0
3143 01:23:12.360095 25 0 ff
3144 01:23:12.362761 26 0 ff
3145 01:23:12.363307 27 0 ff
3146 01:23:12.365662 28 0 ff
3147 01:23:12.366087 29 0 ff
3148 01:23:12.369467 30 0 ff
3149 01:23:12.369993 31 0 ff
3150 01:23:12.373013 32 0 ff
3151 01:23:12.373543 33 0 ff
3152 01:23:12.373890 34 ff ff
3153 01:23:12.376067 35 ff ff
3154 01:23:12.376599 36 ff ff
3155 01:23:12.379229 37 ff ff
3156 01:23:12.379697 38 ff ff
3157 01:23:12.383052 39 ff ff
3158 01:23:12.383644 40 ff ff
3159 01:23:12.386289 pass bytecount = 0xff (0xff: all bytes pass)
3160 01:23:12.386708
3161 01:23:12.389244 DQS0 dly: 34
3162 01:23:12.389667 DQS1 dly: 25
3163 01:23:12.393008 Write Rank0 MR2 =0x2d
3164 01:23:12.396132 [RankSwap] Rank num 2, (Multi 1), Rank 0
3165 01:23:12.396699 Write Rank1 MR1 =0xd6
3166 01:23:12.399507 [Gating]
3167 01:23:12.400032 ==
3168 01:23:12.402543 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3169 01:23:12.406545 fsp= 1, odt_onoff= 1, Byte mode= 0
3170 01:23:12.407070 ==
3171 01:23:12.412828 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3172 01:23:12.416404 3 1 4 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3173 01:23:12.419659 3 1 8 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3174 01:23:12.425672 3 1 12 |3535 2c2b |(0 0)(11 11) |(0 1)(1 0)| 0
3175 01:23:12.429606 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3176 01:23:12.432937 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3177 01:23:12.440004 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3178 01:23:12.442695 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3179 01:23:12.445940 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3180 01:23:12.449545 3 2 4 |c0c 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3181 01:23:12.455887 3 2 8 |e0e 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3182 01:23:12.459224 3 2 12 |3d3d 2c2c |(11 11)(11 11) |(1 1)(0 0)| 0
3183 01:23:12.462487 3 2 16 |3d3d 303 |(11 11)(11 11) |(1 1)(0 0)| 0
3184 01:23:12.469183 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3185 01:23:12.472955 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3186 01:23:12.476017 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3187 01:23:12.482487 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3188 01:23:12.485692 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3189 01:23:12.489324 3 3 8 |201 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3190 01:23:12.492367 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3191 01:23:12.499278 [Byte 0] Lead/lag falling Transition (3, 3, 12)
3192 01:23:12.502736 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3193 01:23:12.505558 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3194 01:23:12.512822 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3195 01:23:12.516192 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3196 01:23:12.519078 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3197 01:23:12.525540 3 4 4 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3198 01:23:12.528890 3 4 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3199 01:23:12.532434 3 4 12 |3d3d 201f |(11 11)(11 11) |(1 1)(1 1)| 0
3200 01:23:12.539059 3 4 16 |3d3d 1211 |(11 11)(11 11) |(1 1)(1 1)| 0
3201 01:23:12.542502 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3202 01:23:12.545773 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3203 01:23:12.549114 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3204 01:23:12.556015 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3205 01:23:12.559060 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3206 01:23:12.561811 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3207 01:23:12.568670 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3208 01:23:12.572108 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3209 01:23:12.575555 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3210 01:23:12.582205 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3211 01:23:12.585771 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3212 01:23:12.588965 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3213 01:23:12.595464 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3214 01:23:12.598490 [Byte 0] Lead/lag Transition tap number (3)
3215 01:23:12.602446 3 6 4 |202 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3216 01:23:12.605548 [Byte 1] Lead/lag falling Transition (3, 6, 4)
3217 01:23:12.608842 3 6 8 |4646 3d3d |(0 0)(11 11) |(0 0)(1 0)| 0
3218 01:23:12.612112 [Byte 0]First pass (3, 6, 8)
3219 01:23:12.615279 [Byte 1] Lead/lag Transition tap number (2)
3220 01:23:12.622196 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
3221 01:23:12.625561 3 6 16 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
3222 01:23:12.628560 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3223 01:23:12.631897 [Byte 1]First pass (3, 6, 20)
3224 01:23:12.635303 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3225 01:23:12.638467 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3226 01:23:12.645199 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3227 01:23:12.648894 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3228 01:23:12.651544 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3229 01:23:12.655134 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3230 01:23:12.658584 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3231 01:23:12.664975 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3232 01:23:12.668241 All bytes gating window > 1UI, Early break!
3233 01:23:12.668659
3234 01:23:12.672378 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 30)
3235 01:23:12.672895
3236 01:23:12.675599 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
3237 01:23:12.676116
3238 01:23:12.676451
3239 01:23:12.676761
3240 01:23:12.678197 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
3241 01:23:12.678612
3242 01:23:12.685082 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
3243 01:23:12.685605
3244 01:23:12.685938
3245 01:23:12.686247 Write Rank1 MR1 =0x56
3246 01:23:12.686547
3247 01:23:12.688099 best RODT dly(2T, 0.5T) = (2, 2)
3248 01:23:12.688513
3249 01:23:12.691723 best RODT dly(2T, 0.5T) = (2, 3)
3250 01:23:12.692139 ==
3251 01:23:12.698495 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3252 01:23:12.701797 fsp= 1, odt_onoff= 1, Byte mode= 0
3253 01:23:12.702330 ==
3254 01:23:12.704948 Start DQ dly to find pass range UseTestEngine =0
3255 01:23:12.708159 x-axis: bit #, y-axis: DQ dly (-127~63)
3256 01:23:12.711886 RX Vref Scan = 0
3257 01:23:12.712432 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3258 01:23:12.715325 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3259 01:23:12.718285 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3260 01:23:12.721880 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3261 01:23:12.724941 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3262 01:23:12.728128 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3263 01:23:12.731038 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3264 01:23:12.734584 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3265 01:23:12.737908 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3266 01:23:12.738333 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3267 01:23:12.741867 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3268 01:23:12.744757 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3269 01:23:12.748257 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3270 01:23:12.751574 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3271 01:23:12.754647 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3272 01:23:12.757900 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3273 01:23:12.761523 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3274 01:23:12.762039 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3275 01:23:12.764904 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3276 01:23:12.767991 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3277 01:23:12.771675 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3278 01:23:12.775220 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3279 01:23:12.778485 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3280 01:23:12.781378 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3281 01:23:12.781827 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3282 01:23:12.784939 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3283 01:23:12.788130 0, [0] xxxoxxxx xoxxxxxo [MSB]
3284 01:23:12.791487 1, [0] xxooxxxx ooxxxxxo [MSB]
3285 01:23:12.794647 2, [0] xxooxxxx ooxxxxxo [MSB]
3286 01:23:12.798138 3, [0] oxoooxxo oooxxxxo [MSB]
3287 01:23:12.798564 4, [0] xxoooxxo oooxxxxo [MSB]
3288 01:23:12.801384 5, [0] oooooxoo oooooooo [MSB]
3289 01:23:12.805172 31, [0] oooooooo ooooooox [MSB]
3290 01:23:12.807825 32, [0] oooooooo ooooooox [MSB]
3291 01:23:12.811445 33, [0] oooooooo ooooooox [MSB]
3292 01:23:12.814819 34, [0] oooooooo ooooooox [MSB]
3293 01:23:12.819179 35, [0] oooxoooo xxooooox [MSB]
3294 01:23:12.819671 36, [0] oooxoooo xxooooox [MSB]
3295 01:23:12.821022 37, [0] ooxxoooo xxooooox [MSB]
3296 01:23:12.824368 38, [0] ooxxoooo xxooooox [MSB]
3297 01:23:12.827741 39, [0] oxxxxoox xxooooox [MSB]
3298 01:23:12.831592 40, [0] oxxxxoox xxxoooox [MSB]
3299 01:23:12.834879 41, [0] oxxxxoox xxxxxoox [MSB]
3300 01:23:12.837988 42, [0] xxxxxxxx xxxxxxxx [MSB]
3301 01:23:12.841150 iDelay=42, Bit 0, Center 23 (5 ~ 41) 37
3302 01:23:12.844878 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3303 01:23:12.847529 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
3304 01:23:12.852073 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3305 01:23:12.854901 iDelay=42, Bit 4, Center 20 (3 ~ 38) 36
3306 01:23:12.857570 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
3307 01:23:12.860862 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3308 01:23:12.864332 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3309 01:23:12.867801 iDelay=42, Bit 8, Center 17 (1 ~ 34) 34
3310 01:23:12.871253 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3311 01:23:12.874524 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3312 01:23:12.878080 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3313 01:23:12.884699 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3314 01:23:12.887616 iDelay=42, Bit 13, Center 23 (5 ~ 41) 37
3315 01:23:12.891092 iDelay=42, Bit 14, Center 23 (5 ~ 41) 37
3316 01:23:12.894451 iDelay=42, Bit 15, Center 13 (-3 ~ 30) 34
3317 01:23:12.894934 ==
3318 01:23:12.897992 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3319 01:23:12.900894 fsp= 1, odt_onoff= 1, Byte mode= 0
3320 01:23:12.901311 ==
3321 01:23:12.904083 DQS Delay:
3322 01:23:12.904500 DQS0 = 0, DQS1 = 0
3323 01:23:12.907505 DQM Delay:
3324 01:23:12.907923 DQM0 = 20, DQM1 = 19
3325 01:23:12.908257 DQ Delay:
3326 01:23:12.911020 DQ0 =23, DQ1 =21, DQ2 =18, DQ3 =16
3327 01:23:12.914368 DQ4 =20, DQ5 =23, DQ6 =23, DQ7 =20
3328 01:23:12.917566 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3329 01:23:12.921025 DQ12 =22, DQ13 =23, DQ14 =23, DQ15 =13
3330 01:23:12.921547
3331 01:23:12.921883
3332 01:23:12.924429 DramC Write-DBI off
3333 01:23:12.924948 ==
3334 01:23:12.931005 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3335 01:23:12.934651 fsp= 1, odt_onoff= 1, Byte mode= 0
3336 01:23:12.935170 ==
3337 01:23:12.937436 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3338 01:23:12.937958
3339 01:23:12.940459 Begin, DQ Scan Range 921~1177
3340 01:23:12.940872
3341 01:23:12.941205
3342 01:23:12.941518 TX Vref Scan disable
3343 01:23:12.948045 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3344 01:23:12.950779 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3345 01:23:12.954218 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3346 01:23:12.957313 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3347 01:23:12.961150 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3348 01:23:12.964056 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3349 01:23:12.967004 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3350 01:23:12.970429 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3351 01:23:12.974275 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3352 01:23:12.976912 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3353 01:23:12.980441 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3354 01:23:12.983934 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3355 01:23:12.986997 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3356 01:23:12.989899 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3357 01:23:12.996793 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3358 01:23:13.000097 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3359 01:23:13.003695 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3360 01:23:13.006495 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3361 01:23:13.009951 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3362 01:23:13.013267 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3363 01:23:13.016374 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3364 01:23:13.020147 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3365 01:23:13.023007 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3366 01:23:13.026271 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3367 01:23:13.029544 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3368 01:23:13.033353 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3369 01:23:13.036814 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3370 01:23:13.039337 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3371 01:23:13.046385 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3372 01:23:13.049676 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3373 01:23:13.053497 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3374 01:23:13.056259 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3375 01:23:13.059966 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3376 01:23:13.063447 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3377 01:23:13.066420 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3378 01:23:13.070040 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3379 01:23:13.072827 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3380 01:23:13.076206 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3381 01:23:13.079396 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3382 01:23:13.082799 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3383 01:23:13.086400 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3384 01:23:13.089044 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3385 01:23:13.092655 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3386 01:23:13.096164 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3387 01:23:13.099206 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3388 01:23:13.102704 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3389 01:23:13.105976 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3390 01:23:13.112420 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3391 01:23:13.115615 969 |3 6 9|[0] xxxxxxxx oxxxxxxo [MSB]
3392 01:23:13.119051 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
3393 01:23:13.122104 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
3394 01:23:13.125624 972 |3 6 12|[0] xxxxxxxx oooxxxoo [MSB]
3395 01:23:13.129263 973 |3 6 13|[0] xxxxxxxx oooxxxoo [MSB]
3396 01:23:13.132402 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3397 01:23:13.135810 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3398 01:23:13.138694 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3399 01:23:13.142365 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3400 01:23:13.145983 978 |3 6 18|[0] xooooxxx oooooooo [MSB]
3401 01:23:13.149220 979 |3 6 19|[0] oooooxox oooooooo [MSB]
3402 01:23:13.152228 980 |3 6 20|[0] ooooooox oooooooo [MSB]
3403 01:23:13.158847 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3404 01:23:13.162389 987 |3 6 27|[0] oooooooo ooooooox [MSB]
3405 01:23:13.165522 988 |3 6 28|[0] oooooooo ooooooox [MSB]
3406 01:23:13.169109 989 |3 6 29|[0] oooooooo xxooooox [MSB]
3407 01:23:13.172132 990 |3 6 30|[0] oooooooo ooooooox [MSB]
3408 01:23:13.175829 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3409 01:23:13.179194 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3410 01:23:13.182596 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3411 01:23:13.185588 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3412 01:23:13.189423 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3413 01:23:13.192288 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3414 01:23:13.195393 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
3415 01:23:13.198397 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3416 01:23:13.201964 999 |3 6 39|[0] ooxxoooo xxxxxxxx [MSB]
3417 01:23:13.208625 1000 |3 6 40|[0] ooxxxoox xxxxxxxx [MSB]
3418 01:23:13.211756 1001 |3 6 41|[0] oxxxxoxx xxxxxxxx [MSB]
3419 01:23:13.215496 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
3420 01:23:13.218245 Byte0, DQ PI dly=988, DQM PI dly= 988
3421 01:23:13.221951 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3422 01:23:13.222179
3423 01:23:13.224878 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3424 01:23:13.225106
3425 01:23:13.228626 Byte1, DQ PI dly=979, DQM PI dly= 979
3426 01:23:13.235134 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
3427 01:23:13.235498
3428 01:23:13.238523 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
3429 01:23:13.238754
3430 01:23:13.238935 ==
3431 01:23:13.244977 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3432 01:23:13.248251 fsp= 1, odt_onoff= 1, Byte mode= 0
3433 01:23:13.248481 ==
3434 01:23:13.251699 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3435 01:23:13.251928
3436 01:23:13.255274 Begin, DQ Scan Range 955~1019
3437 01:23:13.255693 Write Rank1 MR14 =0x0
3438 01:23:13.265796
3439 01:23:13.266347 CH=1, VrefRange= 0, VrefLevel = 0
3440 01:23:13.272307 TX Bit0 (982~998) 17 990, Bit8 (972~985) 14 978,
3441 01:23:13.275436 TX Bit1 (981~997) 17 989, Bit9 (972~984) 13 978,
3442 01:23:13.282482 TX Bit2 (979~993) 15 986, Bit10 (976~986) 11 981,
3443 01:23:13.285227 TX Bit3 (978~990) 13 984, Bit11 (976~988) 13 982,
3444 01:23:13.288939 TX Bit4 (981~996) 16 988, Bit12 (977~986) 10 981,
3445 01:23:13.295766 TX Bit5 (982~998) 17 990, Bit13 (976~989) 14 982,
3446 01:23:13.298428 TX Bit6 (982~997) 16 989, Bit14 (976~986) 11 981,
3447 01:23:13.301676 TX Bit7 (984~993) 10 988, Bit15 (969~979) 11 974,
3448 01:23:13.305257
3449 01:23:13.305771 Write Rank1 MR14 =0x2
3450 01:23:13.314498
3451 01:23:13.315174 CH=1, VrefRange= 0, VrefLevel = 2
3452 01:23:13.321268 TX Bit0 (982~998) 17 990, Bit8 (971~985) 15 978,
3453 01:23:13.324968 TX Bit1 (980~997) 18 988, Bit9 (971~985) 15 978,
3454 01:23:13.331049 TX Bit2 (979~994) 16 986, Bit10 (975~987) 13 981,
3455 01:23:13.334120 TX Bit3 (978~991) 14 984, Bit11 (976~989) 14 982,
3456 01:23:13.337084 TX Bit4 (980~997) 18 988, Bit12 (976~988) 13 982,
3457 01:23:13.344078 TX Bit5 (982~998) 17 990, Bit13 (976~990) 15 983,
3458 01:23:13.347380 TX Bit6 (981~998) 18 989, Bit14 (976~986) 11 981,
3459 01:23:13.350640 TX Bit7 (983~994) 12 988, Bit15 (969~981) 13 975,
3460 01:23:13.353752
3461 01:23:13.354172 Write Rank1 MR14 =0x4
3462 01:23:13.362992
3463 01:23:13.363379 CH=1, VrefRange= 0, VrefLevel = 4
3464 01:23:13.369843 TX Bit0 (982~999) 18 990, Bit8 (970~985) 16 977,
3465 01:23:13.373219 TX Bit1 (980~998) 19 989, Bit9 (971~985) 15 978,
3466 01:23:13.379834 TX Bit2 (978~995) 18 986, Bit10 (975~988) 14 981,
3467 01:23:13.382778 TX Bit3 (977~991) 15 984, Bit11 (976~990) 15 983,
3468 01:23:13.386115 TX Bit4 (979~997) 19 988, Bit12 (975~988) 14 981,
3469 01:23:13.392998 TX Bit5 (982~999) 18 990, Bit13 (975~991) 17 983,
3470 01:23:13.396356 TX Bit6 (981~998) 18 989, Bit14 (976~987) 12 981,
3471 01:23:13.399616 TX Bit7 (982~995) 14 988, Bit15 (969~982) 14 975,
3472 01:23:13.399891
3473 01:23:13.402527 Write Rank1 MR14 =0x6
3474 01:23:13.411960
3475 01:23:13.412133 CH=1, VrefRange= 0, VrefLevel = 6
3476 01:23:13.418408 TX Bit0 (981~999) 19 990, Bit8 (970~986) 17 978,
3477 01:23:13.422014 TX Bit1 (980~998) 19 989, Bit9 (971~986) 16 978,
3478 01:23:13.428814 TX Bit2 (978~996) 19 987, Bit10 (974~989) 16 981,
3479 01:23:13.432013 TX Bit3 (977~992) 16 984, Bit11 (975~991) 17 983,
3480 01:23:13.435523 TX Bit4 (979~998) 20 988, Bit12 (976~989) 14 982,
3481 01:23:13.441825 TX Bit5 (981~999) 19 990, Bit13 (975~991) 17 983,
3482 01:23:13.445536 TX Bit6 (980~998) 19 989, Bit14 (975~989) 15 982,
3483 01:23:13.448643 TX Bit7 (983~997) 15 990, Bit15 (968~983) 16 975,
3484 01:23:13.449035
3485 01:23:13.452075 Write Rank1 MR14 =0x8
3486 01:23:13.461480
3487 01:23:13.461964 CH=1, VrefRange= 0, VrefLevel = 8
3488 01:23:13.468046 TX Bit0 (980~1000) 21 990, Bit8 (970~987) 18 978,
3489 01:23:13.471156 TX Bit1 (980~998) 19 989, Bit9 (970~986) 17 978,
3490 01:23:13.477689 TX Bit2 (978~997) 20 987, Bit10 (974~990) 17 982,
3491 01:23:13.481651 TX Bit3 (977~993) 17 985, Bit11 (975~991) 17 983,
3492 01:23:13.484867 TX Bit4 (979~998) 20 988, Bit12 (975~990) 16 982,
3493 01:23:13.491565 TX Bit5 (981~999) 19 990, Bit13 (975~991) 17 983,
3494 01:23:13.494681 TX Bit6 (980~999) 20 989, Bit14 (974~990) 17 982,
3495 01:23:13.498283 TX Bit7 (982~998) 17 990, Bit15 (968~984) 17 976,
3496 01:23:13.501395
3497 01:23:13.501916 Write Rank1 MR14 =0xa
3498 01:23:13.511050
3499 01:23:13.513978 CH=1, VrefRange= 0, VrefLevel = 10
3500 01:23:13.517173 TX Bit0 (981~1000) 20 990, Bit8 (970~987) 18 978,
3501 01:23:13.520607 TX Bit1 (979~998) 20 988, Bit9 (970~987) 18 978,
3502 01:23:13.527774 TX Bit2 (978~998) 21 988, Bit10 (974~991) 18 982,
3503 01:23:13.530465 TX Bit3 (977~994) 18 985, Bit11 (974~991) 18 982,
3504 01:23:13.533731 TX Bit4 (979~998) 20 988, Bit12 (975~991) 17 983,
3505 01:23:13.541114 TX Bit5 (980~1000) 21 990, Bit13 (975~992) 18 983,
3506 01:23:13.543581 TX Bit6 (979~999) 21 989, Bit14 (975~990) 16 982,
3507 01:23:13.547286 TX Bit7 (981~998) 18 989, Bit15 (968~984) 17 976,
3508 01:23:13.550918
3509 01:23:13.551496 Write Rank1 MR14 =0xc
3510 01:23:13.560179
3511 01:23:13.563194 CH=1, VrefRange= 0, VrefLevel = 12
3512 01:23:13.566809 TX Bit0 (980~1000) 21 990, Bit8 (970~988) 19 979,
3513 01:23:13.570271 TX Bit1 (979~999) 21 989, Bit9 (970~988) 19 979,
3514 01:23:13.576268 TX Bit2 (978~998) 21 988, Bit10 (973~991) 19 982,
3515 01:23:13.579844 TX Bit3 (977~994) 18 985, Bit11 (974~991) 18 982,
3516 01:23:13.583133 TX Bit4 (979~999) 21 989, Bit12 (974~990) 17 982,
3517 01:23:13.589676 TX Bit5 (980~1000) 21 990, Bit13 (974~992) 19 983,
3518 01:23:13.593233 TX Bit6 (979~1000) 22 989, Bit14 (974~990) 17 982,
3519 01:23:13.599653 TX Bit7 (980~998) 19 989, Bit15 (968~984) 17 976,
3520 01:23:13.600181
3521 01:23:13.600522 Write Rank1 MR14 =0xe
3522 01:23:13.609139
3523 01:23:13.612924 CH=1, VrefRange= 0, VrefLevel = 14
3524 01:23:13.616304 TX Bit0 (980~1001) 22 990, Bit8 (970~988) 19 979,
3525 01:23:13.619896 TX Bit1 (978~1000) 23 989, Bit9 (970~989) 20 979,
3526 01:23:13.626182 TX Bit2 (978~998) 21 988, Bit10 (972~991) 20 981,
3527 01:23:13.630097 TX Bit3 (977~995) 19 986, Bit11 (974~992) 19 983,
3528 01:23:13.633033 TX Bit4 (978~999) 22 988, Bit12 (974~991) 18 982,
3529 01:23:13.638984 TX Bit5 (979~1001) 23 990, Bit13 (974~992) 19 983,
3530 01:23:13.643058 TX Bit6 (979~1000) 22 989, Bit14 (973~991) 19 982,
3531 01:23:13.649300 TX Bit7 (980~999) 20 989, Bit15 (968~985) 18 976,
3532 01:23:13.649829
3533 01:23:13.650209 Write Rank1 MR14 =0x10
3534 01:23:13.659620
3535 01:23:13.662938 CH=1, VrefRange= 0, VrefLevel = 16
3536 01:23:13.665858 TX Bit0 (979~1001) 23 990, Bit8 (970~990) 21 980,
3537 01:23:13.668869 TX Bit1 (979~1000) 22 989, Bit9 (970~990) 21 980,
3538 01:23:13.676253 TX Bit2 (977~998) 22 987, Bit10 (972~992) 21 982,
3539 01:23:13.679507 TX Bit3 (976~997) 22 986, Bit11 (973~992) 20 982,
3540 01:23:13.682730 TX Bit4 (978~1000) 23 989, Bit12 (974~992) 19 983,
3541 01:23:13.689342 TX Bit5 (979~1001) 23 990, Bit13 (973~993) 21 983,
3542 01:23:13.692390 TX Bit6 (979~1000) 22 989, Bit14 (973~991) 19 982,
3543 01:23:13.698642 TX Bit7 (980~999) 20 989, Bit15 (967~985) 19 976,
3544 01:23:13.699146
3545 01:23:13.699516 Write Rank1 MR14 =0x12
3546 01:23:13.709645
3547 01:23:13.712238 CH=1, VrefRange= 0, VrefLevel = 18
3548 01:23:13.716134 TX Bit0 (979~1002) 24 990, Bit8 (969~990) 22 979,
3549 01:23:13.719304 TX Bit1 (978~1000) 23 989, Bit9 (970~990) 21 980,
3550 01:23:13.725972 TX Bit2 (977~999) 23 988, Bit10 (972~992) 21 982,
3551 01:23:13.729038 TX Bit3 (976~997) 22 986, Bit11 (973~993) 21 983,
3552 01:23:13.732425 TX Bit4 (978~1000) 23 989, Bit12 (973~992) 20 982,
3553 01:23:13.739631 TX Bit5 (979~1002) 24 990, Bit13 (973~993) 21 983,
3554 01:23:13.742179 TX Bit6 (979~1000) 22 989, Bit14 (971~992) 22 981,
3555 01:23:13.749095 TX Bit7 (979~1000) 22 989, Bit15 (967~986) 20 976,
3556 01:23:13.749626
3557 01:23:13.749970 Write Rank1 MR14 =0x14
3558 01:23:13.759970
3559 01:23:13.762565 CH=1, VrefRange= 0, VrefLevel = 20
3560 01:23:13.766395 TX Bit0 (979~1003) 25 991, Bit8 (969~991) 23 980,
3561 01:23:13.769795 TX Bit1 (978~1001) 24 989, Bit9 (969~990) 22 979,
3562 01:23:13.776149 TX Bit2 (977~999) 23 988, Bit10 (971~992) 22 981,
3563 01:23:13.780148 TX Bit3 (976~997) 22 986, Bit11 (973~993) 21 983,
3564 01:23:13.783115 TX Bit4 (978~1001) 24 989, Bit12 (972~992) 21 982,
3565 01:23:13.789517 TX Bit5 (979~1003) 25 991, Bit13 (973~993) 21 983,
3566 01:23:13.792843 TX Bit6 (979~1001) 23 990, Bit14 (972~992) 21 982,
3567 01:23:13.799635 TX Bit7 (979~1000) 22 989, Bit15 (967~986) 20 976,
3568 01:23:13.800142
3569 01:23:13.800478 Write Rank1 MR14 =0x16
3570 01:23:13.809785
3571 01:23:13.812818 CH=1, VrefRange= 0, VrefLevel = 22
3572 01:23:13.816348 TX Bit0 (979~1003) 25 991, Bit8 (969~991) 23 980,
3573 01:23:13.820030 TX Bit1 (978~1001) 24 989, Bit9 (969~991) 23 980,
3574 01:23:13.826340 TX Bit2 (977~999) 23 988, Bit10 (971~992) 22 981,
3575 01:23:13.829591 TX Bit3 (976~998) 23 987, Bit11 (972~993) 22 982,
3576 01:23:13.833014 TX Bit4 (978~1001) 24 989, Bit12 (972~993) 22 982,
3577 01:23:13.839164 TX Bit5 (978~1003) 26 990, Bit13 (972~994) 23 983,
3578 01:23:13.842695 TX Bit6 (978~1001) 24 989, Bit14 (972~992) 21 982,
3579 01:23:13.849469 TX Bit7 (979~1001) 23 990, Bit15 (967~987) 21 977,
3580 01:23:13.849993
3581 01:23:13.850331 Write Rank1 MR14 =0x18
3582 01:23:13.860621
3583 01:23:13.861132 CH=1, VrefRange= 0, VrefLevel = 24
3584 01:23:13.866996 TX Bit0 (978~1004) 27 991, Bit8 (969~991) 23 980,
3585 01:23:13.870455 TX Bit1 (978~1002) 25 990, Bit9 (970~991) 22 980,
3586 01:23:13.876993 TX Bit2 (977~1000) 24 988, Bit10 (971~993) 23 982,
3587 01:23:13.880437 TX Bit3 (975~998) 24 986, Bit11 (971~994) 24 982,
3588 01:23:13.883643 TX Bit4 (978~1001) 24 989, Bit12 (972~993) 22 982,
3589 01:23:13.890606 TX Bit5 (978~1004) 27 991, Bit13 (972~994) 23 983,
3590 01:23:13.893230 TX Bit6 (978~1002) 25 990, Bit14 (971~993) 23 982,
3591 01:23:13.900061 TX Bit7 (979~1001) 23 990, Bit15 (967~987) 21 977,
3592 01:23:13.900581
3593 01:23:13.900917 Write Rank1 MR14 =0x1a
3594 01:23:13.911175
3595 01:23:13.914781 CH=1, VrefRange= 0, VrefLevel = 26
3596 01:23:13.917710 TX Bit0 (978~1005) 28 991, Bit8 (968~992) 25 980,
3597 01:23:13.921223 TX Bit1 (978~1002) 25 990, Bit9 (969~992) 24 980,
3598 01:23:13.927679 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
3599 01:23:13.930954 TX Bit3 (975~999) 25 987, Bit11 (971~994) 24 982,
3600 01:23:13.934539 TX Bit4 (977~1002) 26 989, Bit12 (971~993) 23 982,
3601 01:23:13.940907 TX Bit5 (978~1004) 27 991, Bit13 (971~995) 25 983,
3602 01:23:13.944114 TX Bit6 (978~1002) 25 990, Bit14 (971~993) 23 982,
3603 01:23:13.951046 TX Bit7 (978~1001) 24 989, Bit15 (967~988) 22 977,
3604 01:23:13.951641
3605 01:23:13.951986 Write Rank1 MR14 =0x1c
3606 01:23:13.961570
3607 01:23:13.964739 CH=1, VrefRange= 0, VrefLevel = 28
3608 01:23:13.968180 TX Bit0 (978~1004) 27 991, Bit8 (968~992) 25 980,
3609 01:23:13.971481 TX Bit1 (978~1003) 26 990, Bit9 (969~992) 24 980,
3610 01:23:13.977921 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
3611 01:23:13.981826 TX Bit3 (975~998) 24 986, Bit11 (971~994) 24 982,
3612 01:23:13.984660 TX Bit4 (978~1003) 26 990, Bit12 (971~994) 24 982,
3613 01:23:13.991596 TX Bit5 (978~1004) 27 991, Bit13 (971~995) 25 983,
3614 01:23:13.995459 TX Bit6 (978~1003) 26 990, Bit14 (971~993) 23 982,
3615 01:23:14.001508 TX Bit7 (978~1002) 25 990, Bit15 (966~989) 24 977,
3616 01:23:14.002028
3617 01:23:14.002366 Write Rank1 MR14 =0x1e
3618 01:23:14.012323
3619 01:23:14.015823 CH=1, VrefRange= 0, VrefLevel = 30
3620 01:23:14.019053 TX Bit0 (978~1005) 28 991, Bit8 (968~992) 25 980,
3621 01:23:14.022115 TX Bit1 (978~1003) 26 990, Bit9 (968~992) 25 980,
3622 01:23:14.028976 TX Bit2 (976~1001) 26 988, Bit10 (970~994) 25 982,
3623 01:23:14.032585 TX Bit3 (974~998) 25 986, Bit11 (971~994) 24 982,
3624 01:23:14.035595 TX Bit4 (978~1003) 26 990, Bit12 (971~994) 24 982,
3625 01:23:14.041945 TX Bit5 (978~1005) 28 991, Bit13 (971~995) 25 983,
3626 01:23:14.045506 TX Bit6 (977~1004) 28 990, Bit14 (970~994) 25 982,
3627 01:23:14.051854 TX Bit7 (978~1002) 25 990, Bit15 (966~990) 25 978,
3628 01:23:14.052283
3629 01:23:14.052615 Write Rank1 MR14 =0x20
3630 01:23:14.062917
3631 01:23:14.065890 CH=1, VrefRange= 0, VrefLevel = 32
3632 01:23:14.069470 TX Bit0 (978~1005) 28 991, Bit8 (968~992) 25 980,
3633 01:23:14.072553 TX Bit1 (978~1003) 26 990, Bit9 (968~992) 25 980,
3634 01:23:14.079593 TX Bit2 (976~1001) 26 988, Bit10 (970~994) 25 982,
3635 01:23:14.082890 TX Bit3 (974~998) 25 986, Bit11 (971~994) 24 982,
3636 01:23:14.086256 TX Bit4 (978~1003) 26 990, Bit12 (971~994) 24 982,
3637 01:23:14.092733 TX Bit5 (978~1005) 28 991, Bit13 (971~995) 25 983,
3638 01:23:14.095785 TX Bit6 (977~1004) 28 990, Bit14 (970~994) 25 982,
3639 01:23:14.102904 TX Bit7 (978~1002) 25 990, Bit15 (966~990) 25 978,
3640 01:23:14.103465
3641 01:23:14.103814 Write Rank1 MR14 =0x22
3642 01:23:14.113738
3643 01:23:14.117213 CH=1, VrefRange= 0, VrefLevel = 34
3644 01:23:14.120369 TX Bit0 (978~1005) 28 991, Bit8 (968~992) 25 980,
3645 01:23:14.123635 TX Bit1 (978~1003) 26 990, Bit9 (968~992) 25 980,
3646 01:23:14.130540 TX Bit2 (976~1001) 26 988, Bit10 (970~994) 25 982,
3647 01:23:14.133648 TX Bit3 (974~998) 25 986, Bit11 (971~994) 24 982,
3648 01:23:14.136826 TX Bit4 (978~1003) 26 990, Bit12 (971~994) 24 982,
3649 01:23:14.143383 TX Bit5 (978~1005) 28 991, Bit13 (971~995) 25 983,
3650 01:23:14.146708 TX Bit6 (977~1004) 28 990, Bit14 (970~994) 25 982,
3651 01:23:14.153108 TX Bit7 (978~1002) 25 990, Bit15 (966~990) 25 978,
3652 01:23:14.153736
3653 01:23:14.154224 Write Rank1 MR14 =0x24
3654 01:23:14.164098
3655 01:23:14.167221 CH=1, VrefRange= 0, VrefLevel = 36
3656 01:23:14.170455 TX Bit0 (978~1005) 28 991, Bit8 (968~992) 25 980,
3657 01:23:14.174161 TX Bit1 (978~1003) 26 990, Bit9 (968~992) 25 980,
3658 01:23:14.180581 TX Bit2 (976~1001) 26 988, Bit10 (970~994) 25 982,
3659 01:23:14.184096 TX Bit3 (974~998) 25 986, Bit11 (971~994) 24 982,
3660 01:23:14.187086 TX Bit4 (978~1003) 26 990, Bit12 (971~994) 24 982,
3661 01:23:14.193861 TX Bit5 (978~1005) 28 991, Bit13 (971~995) 25 983,
3662 01:23:14.197117 TX Bit6 (977~1004) 28 990, Bit14 (970~994) 25 982,
3663 01:23:14.203617 TX Bit7 (978~1002) 25 990, Bit15 (966~990) 25 978,
3664 01:23:14.204007
3665 01:23:14.204316
3666 01:23:14.207175 TX Vref found, early break! 388< 389
3667 01:23:14.210753 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3668 01:23:14.214165 u1DelayCellOfst[0]=6 cells (5 PI)
3669 01:23:14.217709 u1DelayCellOfst[1]=5 cells (4 PI)
3670 01:23:14.220261 u1DelayCellOfst[2]=2 cells (2 PI)
3671 01:23:14.224240 u1DelayCellOfst[3]=0 cells (0 PI)
3672 01:23:14.227468 u1DelayCellOfst[4]=5 cells (4 PI)
3673 01:23:14.230550 u1DelayCellOfst[5]=6 cells (5 PI)
3674 01:23:14.233422 u1DelayCellOfst[6]=5 cells (4 PI)
3675 01:23:14.233812 u1DelayCellOfst[7]=5 cells (4 PI)
3676 01:23:14.236703 Byte0, DQ PI dly=986, DQM PI dly= 988
3677 01:23:14.243706 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3678 01:23:14.244188
3679 01:23:14.247443 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3680 01:23:14.247940
3681 01:23:14.250863 u1DelayCellOfst[8]=2 cells (2 PI)
3682 01:23:14.253871 u1DelayCellOfst[9]=2 cells (2 PI)
3683 01:23:14.257487 u1DelayCellOfst[10]=5 cells (4 PI)
3684 01:23:14.260765 u1DelayCellOfst[11]=5 cells (4 PI)
3685 01:23:14.263988 u1DelayCellOfst[12]=5 cells (4 PI)
3686 01:23:14.267028 u1DelayCellOfst[13]=6 cells (5 PI)
3687 01:23:14.270020 u1DelayCellOfst[14]=5 cells (4 PI)
3688 01:23:14.273768 u1DelayCellOfst[15]=0 cells (0 PI)
3689 01:23:14.276763 Byte1, DQ PI dly=978, DQM PI dly= 980
3690 01:23:14.280558 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3691 01:23:14.281105
3692 01:23:14.283912 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3693 01:23:14.284404
3694 01:23:14.286888 Write Rank1 MR14 =0x1e
3695 01:23:14.287398
3696 01:23:14.289885 Final TX Range 0 Vref 30
3697 01:23:14.290273
3698 01:23:14.296926 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3699 01:23:14.297314
3700 01:23:14.303503 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3701 01:23:14.310578 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3702 01:23:14.317015 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3703 01:23:14.317504 Write Rank1 MR3 =0xb0
3704 01:23:14.319764 DramC Write-DBI on
3705 01:23:14.320151 ==
3706 01:23:14.326521 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3707 01:23:14.330099 fsp= 1, odt_onoff= 1, Byte mode= 0
3708 01:23:14.330586 ==
3709 01:23:14.333827 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3710 01:23:14.334311
3711 01:23:14.336870 Begin, DQ Scan Range 700~764
3712 01:23:14.337258
3713 01:23:14.337564
3714 01:23:14.337853 TX Vref Scan disable
3715 01:23:14.343276 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3716 01:23:14.346318 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3717 01:23:14.350018 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3718 01:23:14.353370 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3719 01:23:14.356845 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3720 01:23:14.359585 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3721 01:23:14.362984 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3722 01:23:14.366638 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3723 01:23:14.369960 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3724 01:23:14.372841 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3725 01:23:14.376684 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3726 01:23:14.380297 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3727 01:23:14.382885 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3728 01:23:14.386540 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3729 01:23:14.389967 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3730 01:23:14.393208 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3731 01:23:14.396367 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3732 01:23:14.399573 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3733 01:23:14.402703 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3734 01:23:14.406508 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3735 01:23:14.412975 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3736 01:23:14.416201 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3737 01:23:14.419736 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3738 01:23:14.423233 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3739 01:23:14.426313 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3740 01:23:14.433025 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3741 01:23:14.436377 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3742 01:23:14.439630 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3743 01:23:14.443097 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3744 01:23:14.445945 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3745 01:23:14.449987 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3746 01:23:14.453234 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3747 01:23:14.456148 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3748 01:23:14.459729 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3749 01:23:14.462959 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3750 01:23:14.466092 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3751 01:23:14.469759 Byte0, DQ PI dly=735, DQM PI dly= 735
3752 01:23:14.476347 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
3753 01:23:14.476838
3754 01:23:14.479466 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
3755 01:23:14.479966
3756 01:23:14.483306 Byte1, DQ PI dly=724, DQM PI dly= 724
3757 01:23:14.485746 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
3758 01:23:14.486132
3759 01:23:14.492707 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
3760 01:23:14.493213
3761 01:23:14.499843 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3762 01:23:14.506155 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3763 01:23:14.512508 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3764 01:23:14.513019 Write Rank1 MR3 =0x30
3765 01:23:14.515968 DramC Write-DBI off
3766 01:23:14.516352
3767 01:23:14.516662 [DATLAT]
3768 01:23:14.519437 Freq=1600, CH1 RK1, use_rxtx_scan=0
3769 01:23:14.519825
3770 01:23:14.522841 DATLAT Default: 0x10
3771 01:23:14.523337 7, 0xFFFF, sum=0
3772 01:23:14.526219 8, 0xFFFF, sum=0
3773 01:23:14.526748 9, 0xFFFF, sum=0
3774 01:23:14.529199 10, 0xFFFF, sum=0
3775 01:23:14.529668 11, 0xFFFF, sum=0
3776 01:23:14.532266 12, 0xFFFF, sum=0
3777 01:23:14.532663 13, 0xFFFF, sum=0
3778 01:23:14.535953 14, 0x0, sum=1
3779 01:23:14.536444 15, 0x0, sum=2
3780 01:23:14.536760 16, 0x0, sum=3
3781 01:23:14.539468 17, 0x0, sum=4
3782 01:23:14.542706 pattern=2 first_step=14 total pass=5 best_step=16
3783 01:23:14.543260 ==
3784 01:23:14.549114 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3785 01:23:14.552102 fsp= 1, odt_onoff= 1, Byte mode= 0
3786 01:23:14.552525 ==
3787 01:23:14.555485 Start DQ dly to find pass range UseTestEngine =1
3788 01:23:14.558982 x-axis: bit #, y-axis: DQ dly (-127~63)
3789 01:23:14.562129 RX Vref Scan = 0
3790 01:23:14.565582 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3791 01:23:14.565974 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3792 01:23:14.569019 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3793 01:23:14.571944 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3794 01:23:14.575923 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3795 01:23:14.578826 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3796 01:23:14.582616 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3797 01:23:14.585963 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3798 01:23:14.588648 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3799 01:23:14.589041 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3800 01:23:14.592048 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3801 01:23:14.595842 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3802 01:23:14.598929 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3803 01:23:14.602053 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3804 01:23:14.606136 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3805 01:23:14.608414 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3806 01:23:14.611761 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3807 01:23:14.615748 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3808 01:23:14.616155 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3809 01:23:14.618742 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3810 01:23:14.621993 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3811 01:23:14.625273 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3812 01:23:14.628848 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3813 01:23:14.631956 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3814 01:23:14.635196 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3815 01:23:14.635636 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3816 01:23:14.638408 0, [0] xxxoxxxx ooxxxxxo [MSB]
3817 01:23:14.641986 1, [0] xxooxxxx ooxxxxxo [MSB]
3818 01:23:14.645141 2, [0] xxooxxxx ooxxxxxo [MSB]
3819 01:23:14.648722 3, [0] oxooxxxo oooxxxxo [MSB]
3820 01:23:14.651678 4, [0] oxoooxxo oooxoxxo [MSB]
3821 01:23:14.652083 5, [0] ooooooxo oooooooo [MSB]
3822 01:23:14.657157 32, [0] oooooooo ooooooox [MSB]
3823 01:23:14.659995 33, [0] oooooooo ooooooox [MSB]
3824 01:23:14.663666 34, [0] oooooooo ooooooox [MSB]
3825 01:23:14.667109 35, [0] oooxoooo xxooooox [MSB]
3826 01:23:14.670627 36, [0] oooxoooo xxooooox [MSB]
3827 01:23:14.673540 37, [0] ooxxoooo xxooooox [MSB]
3828 01:23:14.673945 38, [0] ooxxooox xxooooox [MSB]
3829 01:23:14.677558 39, [0] ooxxooox xxooooox [MSB]
3830 01:23:14.679990 40, [0] oxxxxoox xxxoooox [MSB]
3831 01:23:14.683650 41, [0] xxxxxxox xxxxxxox [MSB]
3832 01:23:14.686754 42, [0] xxxxxxxx xxxxxxxx [MSB]
3833 01:23:14.690110 iDelay=42, Bit 0, Center 21 (3 ~ 40) 38
3834 01:23:14.693620 iDelay=42, Bit 1, Center 22 (5 ~ 39) 35
3835 01:23:14.697206 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
3836 01:23:14.700133 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3837 01:23:14.703914 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3838 01:23:14.707330 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3839 01:23:14.710736 iDelay=42, Bit 6, Center 23 (6 ~ 41) 36
3840 01:23:14.713578 iDelay=42, Bit 7, Center 20 (3 ~ 37) 35
3841 01:23:14.716974 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
3842 01:23:14.723829 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
3843 01:23:14.726688 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3844 01:23:14.729727 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3845 01:23:14.733587 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3846 01:23:14.736805 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
3847 01:23:14.739755 iDelay=42, Bit 14, Center 23 (5 ~ 41) 37
3848 01:23:14.742945 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3849 01:23:14.743345 ==
3850 01:23:14.750303 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3851 01:23:14.753076 fsp= 1, odt_onoff= 1, Byte mode= 0
3852 01:23:14.753563 ==
3853 01:23:14.753872 DQS Delay:
3854 01:23:14.756643 DQS0 = 0, DQS1 = 0
3855 01:23:14.757129 DQM Delay:
3856 01:23:14.759885 DQM0 = 20, DQM1 = 19
3857 01:23:14.760271 DQ Delay:
3858 01:23:14.763225 DQ0 =21, DQ1 =22, DQ2 =18, DQ3 =16
3859 01:23:14.766661 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3860 01:23:14.769562 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3861 01:23:14.773284 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =14
3862 01:23:14.773794
3863 01:23:14.774110
3864 01:23:14.774395
3865 01:23:14.776616 [DramC_TX_OE_Calibration] TA2
3866 01:23:14.779907 Original DQ_B0 (3 6) =30, OEN = 27
3867 01:23:14.782907 Original DQ_B1 (3 6) =30, OEN = 27
3868 01:23:14.783389 23, 0x0, End_B0=23 End_B1=23
3869 01:23:14.786557 24, 0x0, End_B0=24 End_B1=24
3870 01:23:14.789700 25, 0x0, End_B0=25 End_B1=25
3871 01:23:14.792836 26, 0x0, End_B0=26 End_B1=26
3872 01:23:14.793325 27, 0x0, End_B0=27 End_B1=27
3873 01:23:14.796111 28, 0x0, End_B0=28 End_B1=28
3874 01:23:14.799491 29, 0x0, End_B0=29 End_B1=29
3875 01:23:14.803276 30, 0x0, End_B0=30 End_B1=30
3876 01:23:14.806939 31, 0xFFFF, End_B0=30 End_B1=30
3877 01:23:14.809511 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3878 01:23:14.815998 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3879 01:23:14.816470
3880 01:23:14.816776
3881 01:23:14.819754 Write Rank1 MR23 =0x3f
3882 01:23:14.820238 [DQSOSC]
3883 01:23:14.826414 [DQSOSCAuto] RK1, (LSB)MR18= 0xcaca, (MSB)MR19= 0x202, tDQSOscB0 = 441 ps tDQSOscB1 = 441 ps
3884 01:23:14.832845 CH1_RK1: MR19=0x202, MR18=0xCACA, DQSOSC=441, MR23=63, INC=12, DEC=18
3885 01:23:14.836593 Write Rank1 MR23 =0x3f
3886 01:23:14.837091 [DQSOSC]
3887 01:23:14.843328 [DQSOSCAuto] RK1, (LSB)MR18= 0xcbcb, (MSB)MR19= 0x202, tDQSOscB0 = 440 ps tDQSOscB1 = 440 ps
3888 01:23:14.846107 CH1 RK1: MR19=202, MR18=CBCB
3889 01:23:14.849761 [RxdqsGatingPostProcess] freq 1600
3890 01:23:14.855956 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3891 01:23:14.856347 Rank: 0
3892 01:23:14.859561 best DQS0 dly(2T, 0.5T) = (2, 6)
3893 01:23:14.862820 best DQS1 dly(2T, 0.5T) = (2, 6)
3894 01:23:14.866352 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3895 01:23:14.869837 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3896 01:23:14.870325 Rank: 1
3897 01:23:14.873183 best DQS0 dly(2T, 0.5T) = (2, 5)
3898 01:23:14.876214 best DQS1 dly(2T, 0.5T) = (2, 6)
3899 01:23:14.879646 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3900 01:23:14.882883 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3901 01:23:14.885778 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3902 01:23:14.889500 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3903 01:23:14.896066 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3904 01:23:14.896453
3905 01:23:14.896760
3906 01:23:14.899346 [Calibration Summary] Freqency 1600
3907 01:23:14.899793 CH 0, Rank 0
3908 01:23:14.900126 All Pass.
3909 01:23:14.900438
3910 01:23:14.902657 CH 0, Rank 1
3911 01:23:14.903170 All Pass.
3912 01:23:14.903557
3913 01:23:14.903876 CH 1, Rank 0
3914 01:23:14.905874 All Pass.
3915 01:23:14.906286
3916 01:23:14.906616 CH 1, Rank 1
3917 01:23:14.906925 All Pass.
3918 01:23:14.909315
3919 01:23:14.913132 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3920 01:23:14.922864 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3921 01:23:14.929275 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3922 01:23:14.929798 Write Rank0 MR3 =0xb0
3923 01:23:14.935970 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3924 01:23:14.942346 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3925 01:23:14.952376 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3926 01:23:14.952894 Write Rank1 MR3 =0xb0
3927 01:23:14.958992 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3928 01:23:14.965803 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3929 01:23:14.972328 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3930 01:23:14.975972 Write Rank0 MR3 =0xb0
3931 01:23:14.982240 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3932 01:23:14.988981 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3933 01:23:14.995573 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3934 01:23:14.999107 Write Rank1 MR3 =0xb0
3935 01:23:14.999707 DramC Write-DBI on
3936 01:23:15.001861 [GetDramInforAfterCalByMRR] Vendor 6.
3937 01:23:15.005823 [GetDramInforAfterCalByMRR] Revision 505.
3938 01:23:15.008341 MR8 1111
3939 01:23:15.011726 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3940 01:23:15.012148 MR8 1111
3941 01:23:15.018918 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3942 01:23:15.019485 MR8 1111
3943 01:23:15.022479 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3944 01:23:15.025739 MR8 1111
3945 01:23:15.028360 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3946 01:23:15.038600 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3947 01:23:15.039164 Write Rank0 MR13 =0xd0
3948 01:23:15.042123 Write Rank1 MR13 =0xd0
3949 01:23:15.045169 Write Rank0 MR13 =0xd0
3950 01:23:15.045590 Write Rank1 MR13 =0xd0
3951 01:23:15.048263 Save calibration result to emmc
3952 01:23:15.048859
3953 01:23:15.049208
3954 01:23:15.051937 [DramcModeReg_Check] Freq_1600, FSP_1
3955 01:23:15.054933 FSP_1, CH_0, RK0
3956 01:23:15.055474 Write Rank0 MR13 =0xd8
3957 01:23:15.058335 MR12 = 0x5e (global = 0x5e) match
3958 01:23:15.061788 MR14 = 0x1c (global = 0x1c) match
3959 01:23:15.064965 FSP_1, CH_0, RK1
3960 01:23:15.065387 Write Rank1 MR13 =0xd8
3961 01:23:15.068955 MR12 = 0x5c (global = 0x5c) match
3962 01:23:15.071751 MR14 = 0x22 (global = 0x22) match
3963 01:23:15.074773 FSP_1, CH_1, RK0
3964 01:23:15.075193 Write Rank0 MR13 =0xd8
3965 01:23:15.078513 MR12 = 0x5e (global = 0x5e) match
3966 01:23:15.081838 MR14 = 0x20 (global = 0x20) match
3967 01:23:15.085289 FSP_1, CH_1, RK1
3968 01:23:15.085805 Write Rank1 MR13 =0xd8
3969 01:23:15.088496 MR12 = 0x60 (global = 0x60) match
3970 01:23:15.091660 MR14 = 0x1e (global = 0x1e) match
3971 01:23:15.092178
3972 01:23:15.098358 [MEM_TEST] 02: After DFS, before run time config
3973 01:23:15.108373 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3974 01:23:15.108916
3975 01:23:15.109252 [TA2_TEST]
3976 01:23:15.109562 === TA2 HW
3977 01:23:15.111495 TA2 PAT: XTALK
3978 01:23:15.115146 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3979 01:23:15.121622 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3980 01:23:15.124675 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3981 01:23:15.127994 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3982 01:23:15.131502
3983 01:23:15.131958
3984 01:23:15.132394 Settings after calibration
3985 01:23:15.132810
3986 01:23:15.134724 [DramcRunTimeConfig]
3987 01:23:15.137542 TransferPLLToSPMControl - MODE SW PHYPLL
3988 01:23:15.137980 TX_TRACKING: ON
3989 01:23:15.141639 RX_TRACKING: ON
3990 01:23:15.142170 HW_GATING: ON
3991 01:23:15.145100 HW_GATING DBG: OFF
3992 01:23:15.145628 ddr_geometry:1
3993 01:23:15.147732 ddr_geometry:1
3994 01:23:15.148166 ddr_geometry:1
3995 01:23:15.148606 ddr_geometry:1
3996 01:23:15.150998 ddr_geometry:1
3997 01:23:15.151452 ddr_geometry:1
3998 01:23:15.154838 ddr_geometry:1
3999 01:23:15.155364 ddr_geometry:1
4000 01:23:15.158354 High Freq DUMMY_READ_FOR_TRACKING: ON
4001 01:23:15.161426 ZQCS_ENABLE_LP4: OFF
4002 01:23:15.164413 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
4003 01:23:15.167894 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
4004 01:23:15.168316 SPM_CONTROL_AFTERK: ON
4005 01:23:15.171497 IMPEDANCE_TRACKING: ON
4006 01:23:15.172021 TEMP_SENSOR: ON
4007 01:23:15.174580 PER_BANK_REFRESH: ON
4008 01:23:15.175107 HW_SAVE_FOR_SR: ON
4009 01:23:15.181113 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
4010 01:23:15.181619 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
4011 01:23:15.184070 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
4012 01:23:15.187744 Read ODT Tracking: ON
4013 01:23:15.191206 =========================
4014 01:23:15.191670
4015 01:23:15.192006 [TA2_TEST]
4016 01:23:15.192319 === TA2 HW
4017 01:23:15.197381 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
4018 01:23:15.200318 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
4019 01:23:15.207722 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
4020 01:23:15.210315 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
4021 01:23:15.210472
4022 01:23:15.214092 [MEM_TEST] 03: After run time config
4023 01:23:15.225365 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
4024 01:23:15.228711 [complex_mem_test] start addr:0x40024000, len:131072
4025 01:23:15.433754 1st complex R/W mem test pass
4026 01:23:15.439968 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
4027 01:23:15.443522 sync preloader write leveling
4028 01:23:15.447006 sync preloader cbt_mr12
4029 01:23:15.450548 sync preloader cbt_clk_dly
4030 01:23:15.451201 sync preloader cbt_cmd_dly
4031 01:23:15.453420 sync preloader cbt_cs
4032 01:23:15.456524 sync preloader cbt_ca_perbit_delay
4033 01:23:15.457072 sync preloader clk_delay
4034 01:23:15.460376 sync preloader dqs_delay
4035 01:23:15.463136 sync preloader u1Gating2T_Save
4036 01:23:15.466438 sync preloader u1Gating05T_Save
4037 01:23:15.470162 sync preloader u1Gatingfine_tune_Save
4038 01:23:15.473525 sync preloader u1Gatingucpass_count_Save
4039 01:23:15.476381 sync preloader u1TxWindowPerbitVref_Save
4040 01:23:15.480005 sync preloader u1TxCenter_min_Save
4041 01:23:15.483281 sync preloader u1TxCenter_max_Save
4042 01:23:15.486912 sync preloader u1Txwin_center_Save
4043 01:23:15.490624 sync preloader u1Txfirst_pass_Save
4044 01:23:15.493046 sync preloader u1Txlast_pass_Save
4045 01:23:15.493470 sync preloader u1RxDatlat_Save
4046 01:23:15.496787 sync preloader u1RxWinPerbitVref_Save
4047 01:23:15.502812 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4048 01:23:15.506404 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4049 01:23:15.509603 sync preloader delay_cell_unit
4050 01:23:15.516546 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4051 01:23:15.519824 sync preloader write leveling
4052 01:23:15.520244 sync preloader cbt_mr12
4053 01:23:15.522923 sync preloader cbt_clk_dly
4054 01:23:15.526090 sync preloader cbt_cmd_dly
4055 01:23:15.526512 sync preloader cbt_cs
4056 01:23:15.530334 sync preloader cbt_ca_perbit_delay
4057 01:23:15.532850 sync preloader clk_delay
4058 01:23:15.536326 sync preloader dqs_delay
4059 01:23:15.536759 sync preloader u1Gating2T_Save
4060 01:23:15.539921 sync preloader u1Gating05T_Save
4061 01:23:15.543118 sync preloader u1Gatingfine_tune_Save
4062 01:23:15.546295 sync preloader u1Gatingucpass_count_Save
4063 01:23:15.553526 sync preloader u1TxWindowPerbitVref_Save
4064 01:23:15.554022 sync preloader u1TxCenter_min_Save
4065 01:23:15.555972 sync preloader u1TxCenter_max_Save
4066 01:23:15.559586 sync preloader u1Txwin_center_Save
4067 01:23:15.563223 sync preloader u1Txfirst_pass_Save
4068 01:23:15.566177 sync preloader u1Txlast_pass_Save
4069 01:23:15.569394 sync preloader u1RxDatlat_Save
4070 01:23:15.572944 sync preloader u1RxWinPerbitVref_Save
4071 01:23:15.576074 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4072 01:23:15.582625 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4073 01:23:15.583046 sync preloader delay_cell_unit
4074 01:23:15.589123 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4075 01:23:15.592462 sync preloader write leveling
4076 01:23:15.595956 sync preloader cbt_mr12
4077 01:23:15.599850 sync preloader cbt_clk_dly
4078 01:23:15.600342 sync preloader cbt_cmd_dly
4079 01:23:15.602614 sync preloader cbt_cs
4080 01:23:15.606396 sync preloader cbt_ca_perbit_delay
4081 01:23:15.609303 sync preloader clk_delay
4082 01:23:15.609700 sync preloader dqs_delay
4083 01:23:15.612387 sync preloader u1Gating2T_Save
4084 01:23:15.615839 sync preloader u1Gating05T_Save
4085 01:23:15.619001 sync preloader u1Gatingfine_tune_Save
4086 01:23:15.622516 sync preloader u1Gatingucpass_count_Save
4087 01:23:15.626327 sync preloader u1TxWindowPerbitVref_Save
4088 01:23:15.629281 sync preloader u1TxCenter_min_Save
4089 01:23:15.632794 sync preloader u1TxCenter_max_Save
4090 01:23:15.636009 sync preloader u1Txwin_center_Save
4091 01:23:15.638992 sync preloader u1Txfirst_pass_Save
4092 01:23:15.642903 sync preloader u1Txlast_pass_Save
4093 01:23:15.645941 sync preloader u1RxDatlat_Save
4094 01:23:15.649430 sync preloader u1RxWinPerbitVref_Save
4095 01:23:15.652986 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4096 01:23:15.655979 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4097 01:23:15.659101 sync preloader delay_cell_unit
4098 01:23:15.662313 just_for_test_dump_coreboot_params dump all params
4099 01:23:15.666057 dump source = 0x0
4100 01:23:15.666561 dump params frequency:1600
4101 01:23:15.669424 dump params rank number:2
4102 01:23:15.669934
4103 01:23:15.672326 dump params write leveling
4104 01:23:15.675453 write leveling[0][0][0] = 0x21
4105 01:23:15.679530 write leveling[0][0][1] = 0x17
4106 01:23:15.679928 write leveling[0][1][0] = 0x1a
4107 01:23:15.682502 write leveling[0][1][1] = 0x17
4108 01:23:15.685864 write leveling[1][0][0] = 0x21
4109 01:23:15.688797 write leveling[1][0][1] = 0x18
4110 01:23:15.692325 write leveling[1][1][0] = 0x22
4111 01:23:15.695642 write leveling[1][1][1] = 0x19
4112 01:23:15.696054 dump params cbt_cs
4113 01:23:15.698729 cbt_cs[0][0] = 0x8
4114 01:23:15.699234 cbt_cs[0][1] = 0x8
4115 01:23:15.702210 cbt_cs[1][0] = 0xb
4116 01:23:15.702747 cbt_cs[1][1] = 0xb
4117 01:23:15.705859 dump params cbt_mr12
4118 01:23:15.706360 cbt_mr12[0][0] = 0x1e
4119 01:23:15.709075 cbt_mr12[0][1] = 0x1c
4120 01:23:15.711869 cbt_mr12[1][0] = 0x1e
4121 01:23:15.712266 cbt_mr12[1][1] = 0x20
4122 01:23:15.715268 dump params tx window
4123 01:23:15.718467 tx_center_min[0][0][0] = 982
4124 01:23:15.718946 tx_center_max[0][0][0] = 989
4125 01:23:15.722151 tx_center_min[0][0][1] = 973
4126 01:23:15.725256 tx_center_max[0][0][1] = 981
4127 01:23:15.728294 tx_center_min[0][1][0] = 979
4128 01:23:15.732148 tx_center_max[0][1][0] = 985
4129 01:23:15.732638 tx_center_min[0][1][1] = 976
4130 01:23:15.735324 tx_center_max[0][1][1] = 982
4131 01:23:15.738515 tx_center_min[1][0][0] = 988
4132 01:23:15.742098 tx_center_max[1][0][0] = 993
4133 01:23:15.745653 tx_center_min[1][0][1] = 977
4134 01:23:15.746150 tx_center_max[1][0][1] = 983
4135 01:23:15.748587 tx_center_min[1][1][0] = 986
4136 01:23:15.751944 tx_center_max[1][1][0] = 991
4137 01:23:15.754909 tx_center_min[1][1][1] = 978
4138 01:23:15.758367 tx_center_max[1][1][1] = 983
4139 01:23:15.758894 dump params tx window
4140 01:23:15.761310 tx_win_center[0][0][0] = 989
4141 01:23:15.765193 tx_first_pass[0][0][0] = 977
4142 01:23:15.765715 tx_last_pass[0][0][0] = 1001
4143 01:23:15.768222 tx_win_center[0][0][1] = 988
4144 01:23:15.772108 tx_first_pass[0][0][1] = 976
4145 01:23:15.775324 tx_last_pass[0][0][1] = 1000
4146 01:23:15.778518 tx_win_center[0][0][2] = 989
4147 01:23:15.778954 tx_first_pass[0][0][2] = 977
4148 01:23:15.781510 tx_last_pass[0][0][2] = 1001
4149 01:23:15.785060 tx_win_center[0][0][3] = 982
4150 01:23:15.788395 tx_first_pass[0][0][3] = 970
4151 01:23:15.792021 tx_last_pass[0][0][3] = 995
4152 01:23:15.792582 tx_win_center[0][0][4] = 988
4153 01:23:15.794905 tx_first_pass[0][0][4] = 976
4154 01:23:15.798302 tx_last_pass[0][0][4] = 1000
4155 01:23:15.801432 tx_win_center[0][0][5] = 985
4156 01:23:15.801854 tx_first_pass[0][0][5] = 973
4157 01:23:15.805229 tx_last_pass[0][0][5] = 998
4158 01:23:15.808110 tx_win_center[0][0][6] = 987
4159 01:23:15.811764 tx_first_pass[0][0][6] = 975
4160 01:23:15.815077 tx_last_pass[0][0][6] = 999
4161 01:23:15.815536 tx_win_center[0][0][7] = 988
4162 01:23:15.818196 tx_first_pass[0][0][7] = 976
4163 01:23:15.821339 tx_last_pass[0][0][7] = 1000
4164 01:23:15.824629 tx_win_center[0][0][8] = 973
4165 01:23:15.828028 tx_first_pass[0][0][8] = 962
4166 01:23:15.828446 tx_last_pass[0][0][8] = 985
4167 01:23:15.831307 tx_win_center[0][0][9] = 977
4168 01:23:15.834580 tx_first_pass[0][0][9] = 966
4169 01:23:15.838442 tx_last_pass[0][0][9] = 989
4170 01:23:15.838958 tx_win_center[0][0][10] = 981
4171 01:23:15.841531 tx_first_pass[0][0][10] = 969
4172 01:23:15.844314 tx_last_pass[0][0][10] = 993
4173 01:23:15.847781 tx_win_center[0][0][11] = 975
4174 01:23:15.851021 tx_first_pass[0][0][11] = 964
4175 01:23:15.854064 tx_last_pass[0][0][11] = 987
4176 01:23:15.854585 tx_win_center[0][0][12] = 978
4177 01:23:15.857590 tx_first_pass[0][0][12] = 966
4178 01:23:15.860848 tx_last_pass[0][0][12] = 990
4179 01:23:15.864256 tx_win_center[0][0][13] = 977
4180 01:23:15.867228 tx_first_pass[0][0][13] = 966
4181 01:23:15.867793 tx_last_pass[0][0][13] = 989
4182 01:23:15.871095 tx_win_center[0][0][14] = 978
4183 01:23:15.874546 tx_first_pass[0][0][14] = 966
4184 01:23:15.877450 tx_last_pass[0][0][14] = 990
4185 01:23:15.881127 tx_win_center[0][0][15] = 980
4186 01:23:15.881670 tx_first_pass[0][0][15] = 968
4187 01:23:15.884011 tx_last_pass[0][0][15] = 992
4188 01:23:15.887508 tx_win_center[0][1][0] = 985
4189 01:23:15.891137 tx_first_pass[0][1][0] = 973
4190 01:23:15.893904 tx_last_pass[0][1][0] = 998
4191 01:23:15.894318 tx_win_center[0][1][1] = 984
4192 01:23:15.897138 tx_first_pass[0][1][1] = 972
4193 01:23:15.900680 tx_last_pass[0][1][1] = 996
4194 01:23:15.903819 tx_win_center[0][1][2] = 985
4195 01:23:15.904239 tx_first_pass[0][1][2] = 973
4196 01:23:15.907674 tx_last_pass[0][1][2] = 998
4197 01:23:15.910891 tx_win_center[0][1][3] = 979
4198 01:23:15.913631 tx_first_pass[0][1][3] = 968
4199 01:23:15.917324 tx_last_pass[0][1][3] = 991
4200 01:23:15.917791 tx_win_center[0][1][4] = 983
4201 01:23:15.921087 tx_first_pass[0][1][4] = 971
4202 01:23:15.924056 tx_last_pass[0][1][4] = 996
4203 01:23:15.927097 tx_win_center[0][1][5] = 981
4204 01:23:15.927654 tx_first_pass[0][1][5] = 969
4205 01:23:15.930748 tx_last_pass[0][1][5] = 993
4206 01:23:15.934162 tx_win_center[0][1][6] = 981
4207 01:23:15.937497 tx_first_pass[0][1][6] = 969
4208 01:23:15.940632 tx_last_pass[0][1][6] = 994
4209 01:23:15.941061 tx_win_center[0][1][7] = 983
4210 01:23:15.943870 tx_first_pass[0][1][7] = 971
4211 01:23:15.947266 tx_last_pass[0][1][7] = 996
4212 01:23:15.950391 tx_win_center[0][1][8] = 976
4213 01:23:15.953812 tx_first_pass[0][1][8] = 965
4214 01:23:15.954238 tx_last_pass[0][1][8] = 988
4215 01:23:15.957311 tx_win_center[0][1][9] = 978
4216 01:23:15.960669 tx_first_pass[0][1][9] = 967
4217 01:23:15.963927 tx_last_pass[0][1][9] = 990
4218 01:23:15.964357 tx_win_center[0][1][10] = 982
4219 01:23:15.967275 tx_first_pass[0][1][10] = 971
4220 01:23:15.970645 tx_last_pass[0][1][10] = 994
4221 01:23:15.973596 tx_win_center[0][1][11] = 977
4222 01:23:15.976905 tx_first_pass[0][1][11] = 966
4223 01:23:15.977336 tx_last_pass[0][1][11] = 989
4224 01:23:15.979875 tx_win_center[0][1][12] = 979
4225 01:23:15.983159 tx_first_pass[0][1][12] = 967
4226 01:23:15.986795 tx_last_pass[0][1][12] = 991
4227 01:23:15.990355 tx_win_center[0][1][13] = 979
4228 01:23:15.990873 tx_first_pass[0][1][13] = 967
4229 01:23:15.993409 tx_last_pass[0][1][13] = 991
4230 01:23:15.996472 tx_win_center[0][1][14] = 979
4231 01:23:15.999874 tx_first_pass[0][1][14] = 967
4232 01:23:16.003262 tx_last_pass[0][1][14] = 991
4233 01:23:16.003716 tx_win_center[0][1][15] = 981
4234 01:23:16.007169 tx_first_pass[0][1][15] = 970
4235 01:23:16.010379 tx_last_pass[0][1][15] = 993
4236 01:23:16.013459 tx_win_center[1][0][0] = 992
4237 01:23:16.016864 tx_first_pass[1][0][0] = 979
4238 01:23:16.017298 tx_last_pass[1][0][0] = 1006
4239 01:23:16.020107 tx_win_center[1][0][1] = 991
4240 01:23:16.023522 tx_first_pass[1][0][1] = 978
4241 01:23:16.026885 tx_last_pass[1][0][1] = 1004
4242 01:23:16.030583 tx_win_center[1][0][2] = 990
4243 01:23:16.031101 tx_first_pass[1][0][2] = 978
4244 01:23:16.033411 tx_last_pass[1][0][2] = 1002
4245 01:23:16.036510 tx_win_center[1][0][3] = 988
4246 01:23:16.039643 tx_first_pass[1][0][3] = 976
4247 01:23:16.043168 tx_last_pass[1][0][3] = 1000
4248 01:23:16.043584 tx_win_center[1][0][4] = 992
4249 01:23:16.046396 tx_first_pass[1][0][4] = 979
4250 01:23:16.050177 tx_last_pass[1][0][4] = 1005
4251 01:23:16.053168 tx_win_center[1][0][5] = 993
4252 01:23:16.056161 tx_first_pass[1][0][5] = 980
4253 01:23:16.056610 tx_last_pass[1][0][5] = 1006
4254 01:23:16.059542 tx_win_center[1][0][6] = 991
4255 01:23:16.062802 tx_first_pass[1][0][6] = 978
4256 01:23:16.066418 tx_last_pass[1][0][6] = 1005
4257 01:23:16.066847 tx_win_center[1][0][7] = 991
4258 01:23:16.070122 tx_first_pass[1][0][7] = 978
4259 01:23:16.073238 tx_last_pass[1][0][7] = 1004
4260 01:23:16.076344 tx_win_center[1][0][8] = 980
4261 01:23:16.079744 tx_first_pass[1][0][8] = 969
4262 01:23:16.080266 tx_last_pass[1][0][8] = 992
4263 01:23:16.082934 tx_win_center[1][0][9] = 980
4264 01:23:16.086461 tx_first_pass[1][0][9] = 969
4265 01:23:16.089132 tx_last_pass[1][0][9] = 991
4266 01:23:16.092666 tx_win_center[1][0][10] = 981
4267 01:23:16.093189 tx_first_pass[1][0][10] = 970
4268 01:23:16.096208 tx_last_pass[1][0][10] = 993
4269 01:23:16.099136 tx_win_center[1][0][11] = 982
4270 01:23:16.102628 tx_first_pass[1][0][11] = 970
4271 01:23:16.106127 tx_last_pass[1][0][11] = 994
4272 01:23:16.106647 tx_win_center[1][0][12] = 982
4273 01:23:16.109577 tx_first_pass[1][0][12] = 971
4274 01:23:16.112886 tx_last_pass[1][0][12] = 994
4275 01:23:16.116266 tx_win_center[1][0][13] = 983
4276 01:23:16.119382 tx_first_pass[1][0][13] = 972
4277 01:23:16.119954 tx_last_pass[1][0][13] = 994
4278 01:23:16.122717 tx_win_center[1][0][14] = 982
4279 01:23:16.126667 tx_first_pass[1][0][14] = 971
4280 01:23:16.129616 tx_last_pass[1][0][14] = 993
4281 01:23:16.132486 tx_win_center[1][0][15] = 977
4282 01:23:16.132916 tx_first_pass[1][0][15] = 966
4283 01:23:16.136170 tx_last_pass[1][0][15] = 988
4284 01:23:16.140043 tx_win_center[1][1][0] = 991
4285 01:23:16.142627 tx_first_pass[1][1][0] = 978
4286 01:23:16.146372 tx_last_pass[1][1][0] = 1005
4287 01:23:16.146898 tx_win_center[1][1][1] = 990
4288 01:23:16.149552 tx_first_pass[1][1][1] = 978
4289 01:23:16.152345 tx_last_pass[1][1][1] = 1003
4290 01:23:16.155906 tx_win_center[1][1][2] = 988
4291 01:23:16.159052 tx_first_pass[1][1][2] = 976
4292 01:23:16.159515 tx_last_pass[1][1][2] = 1001
4293 01:23:16.162388 tx_win_center[1][1][3] = 986
4294 01:23:16.166252 tx_first_pass[1][1][3] = 974
4295 01:23:16.169654 tx_last_pass[1][1][3] = 998
4296 01:23:16.170173 tx_win_center[1][1][4] = 990
4297 01:23:16.172242 tx_first_pass[1][1][4] = 978
4298 01:23:16.175881 tx_last_pass[1][1][4] = 1003
4299 01:23:16.179183 tx_win_center[1][1][5] = 991
4300 01:23:16.182673 tx_first_pass[1][1][5] = 978
4301 01:23:16.183207 tx_last_pass[1][1][5] = 1005
4302 01:23:16.185842 tx_win_center[1][1][6] = 990
4303 01:23:16.188775 tx_first_pass[1][1][6] = 977
4304 01:23:16.192377 tx_last_pass[1][1][6] = 1004
4305 01:23:16.195571 tx_win_center[1][1][7] = 990
4306 01:23:16.196005 tx_first_pass[1][1][7] = 978
4307 01:23:16.199396 tx_last_pass[1][1][7] = 1002
4308 01:23:16.202736 tx_win_center[1][1][8] = 980
4309 01:23:16.205864 tx_first_pass[1][1][8] = 968
4310 01:23:16.206405 tx_last_pass[1][1][8] = 992
4311 01:23:16.208795 tx_win_center[1][1][9] = 980
4312 01:23:16.212396 tx_first_pass[1][1][9] = 968
4313 01:23:16.215807 tx_last_pass[1][1][9] = 992
4314 01:23:16.219367 tx_win_center[1][1][10] = 982
4315 01:23:16.219932 tx_first_pass[1][1][10] = 970
4316 01:23:16.222495 tx_last_pass[1][1][10] = 994
4317 01:23:16.225650 tx_win_center[1][1][11] = 982
4318 01:23:16.229231 tx_first_pass[1][1][11] = 971
4319 01:23:16.232161 tx_last_pass[1][1][11] = 994
4320 01:23:16.232596 tx_win_center[1][1][12] = 982
4321 01:23:16.235493 tx_first_pass[1][1][12] = 971
4322 01:23:16.238795 tx_last_pass[1][1][12] = 994
4323 01:23:16.241927 tx_win_center[1][1][13] = 983
4324 01:23:16.245473 tx_first_pass[1][1][13] = 971
4325 01:23:16.246031 tx_last_pass[1][1][13] = 995
4326 01:23:16.248838 tx_win_center[1][1][14] = 982
4327 01:23:16.251997 tx_first_pass[1][1][14] = 970
4328 01:23:16.255222 tx_last_pass[1][1][14] = 994
4329 01:23:16.258705 tx_win_center[1][1][15] = 978
4330 01:23:16.259368 tx_first_pass[1][1][15] = 966
4331 01:23:16.261726 tx_last_pass[1][1][15] = 990
4332 01:23:16.265131 dump params rx window
4333 01:23:16.268331 rx_firspass[0][0][0] = 5
4334 01:23:16.268878 rx_lastpass[0][0][0] = 38
4335 01:23:16.271599 rx_firspass[0][0][1] = 5
4336 01:23:16.275281 rx_lastpass[0][0][1] = 36
4337 01:23:16.276012 rx_firspass[0][0][2] = 6
4338 01:23:16.278678 rx_lastpass[0][0][2] = 36
4339 01:23:16.282192 rx_firspass[0][0][3] = -2
4340 01:23:16.282698 rx_lastpass[0][0][3] = 31
4341 01:23:16.284983 rx_firspass[0][0][4] = 4
4342 01:23:16.288289 rx_lastpass[0][0][4] = 37
4343 01:23:16.291328 rx_firspass[0][0][5] = 1
4344 01:23:16.291760 rx_lastpass[0][0][5] = 32
4345 01:23:16.295176 rx_firspass[0][0][6] = 3
4346 01:23:16.298512 rx_lastpass[0][0][6] = 34
4347 01:23:16.299162 rx_firspass[0][0][7] = 5
4348 01:23:16.301311 rx_lastpass[0][0][7] = 36
4349 01:23:16.304932 rx_firspass[0][0][8] = -4
4350 01:23:16.308128 rx_lastpass[0][0][8] = 33
4351 01:23:16.308406 rx_firspass[0][0][9] = 0
4352 01:23:16.311477 rx_lastpass[0][0][9] = 33
4353 01:23:16.315141 rx_firspass[0][0][10] = 8
4354 01:23:16.315542 rx_lastpass[0][0][10] = 41
4355 01:23:16.318374 rx_firspass[0][0][11] = 1
4356 01:23:16.321419 rx_lastpass[0][0][11] = 33
4357 01:23:16.324816 rx_firspass[0][0][12] = 1
4358 01:23:16.325182 rx_lastpass[0][0][12] = 37
4359 01:23:16.328026 rx_firspass[0][0][13] = 3
4360 01:23:16.331238 rx_lastpass[0][0][13] = 33
4361 01:23:16.334446 rx_firspass[0][0][14] = 1
4362 01:23:16.334719 rx_lastpass[0][0][14] = 37
4363 01:23:16.337994 rx_firspass[0][0][15] = 5
4364 01:23:16.341393 rx_lastpass[0][0][15] = 37
4365 01:23:16.341668 rx_firspass[0][1][0] = 5
4366 01:23:16.344409 rx_lastpass[0][1][0] = 40
4367 01:23:16.348529 rx_firspass[0][1][1] = 5
4368 01:23:16.348896 rx_lastpass[0][1][1] = 38
4369 01:23:16.351609 rx_firspass[0][1][2] = 6
4370 01:23:16.354671 rx_lastpass[0][1][2] = 38
4371 01:23:16.358445 rx_firspass[0][1][3] = -2
4372 01:23:16.358813 rx_lastpass[0][1][3] = 33
4373 01:23:16.361103 rx_firspass[0][1][4] = 5
4374 01:23:16.364413 rx_lastpass[0][1][4] = 39
4375 01:23:16.364812 rx_firspass[0][1][5] = 1
4376 01:23:16.368231 rx_lastpass[0][1][5] = 34
4377 01:23:16.371357 rx_firspass[0][1][6] = 3
4378 01:23:16.374774 rx_lastpass[0][1][6] = 37
4379 01:23:16.375295 rx_firspass[0][1][7] = 3
4380 01:23:16.377715 rx_lastpass[0][1][7] = 38
4381 01:23:16.381553 rx_firspass[0][1][8] = -2
4382 01:23:16.382050 rx_lastpass[0][1][8] = 31
4383 01:23:16.384775 rx_firspass[0][1][9] = 1
4384 01:23:16.387675 rx_lastpass[0][1][9] = 36
4385 01:23:16.388058 rx_firspass[0][1][10] = 7
4386 01:23:16.390935 rx_lastpass[0][1][10] = 43
4387 01:23:16.394772 rx_firspass[0][1][11] = -2
4388 01:23:16.397687 rx_lastpass[0][1][11] = 34
4389 01:23:16.398176 rx_firspass[0][1][12] = 1
4390 01:23:16.400873 rx_lastpass[0][1][12] = 37
4391 01:23:16.404586 rx_firspass[0][1][13] = 1
4392 01:23:16.407621 rx_lastpass[0][1][13] = 35
4393 01:23:16.408002 rx_firspass[0][1][14] = 3
4394 01:23:16.411495 rx_lastpass[0][1][14] = 37
4395 01:23:16.415091 rx_firspass[0][1][15] = 6
4396 01:23:16.418004 rx_lastpass[0][1][15] = 39
4397 01:23:16.418389 rx_firspass[1][0][0] = 5
4398 01:23:16.421409 rx_lastpass[1][0][0] = 39
4399 01:23:16.424496 rx_firspass[1][0][1] = 4
4400 01:23:16.424881 rx_lastpass[1][0][1] = 39
4401 01:23:16.427836 rx_firspass[1][0][2] = 2
4402 01:23:16.430998 rx_lastpass[1][0][2] = 36
4403 01:23:16.434247 rx_firspass[1][0][3] = -1
4404 01:23:16.434630 rx_lastpass[1][0][3] = 34
4405 01:23:16.437427 rx_firspass[1][0][4] = 5
4406 01:23:16.440889 rx_lastpass[1][0][4] = 38
4407 01:23:16.441282 rx_firspass[1][0][5] = 7
4408 01:23:16.444743 rx_lastpass[1][0][5] = 39
4409 01:23:16.448033 rx_firspass[1][0][6] = 7
4410 01:23:16.448521 rx_lastpass[1][0][6] = 40
4411 01:23:16.451280 rx_firspass[1][0][7] = 4
4412 01:23:16.453932 rx_lastpass[1][0][7] = 38
4413 01:23:16.457528 rx_firspass[1][0][8] = 1
4414 01:23:16.458010 rx_lastpass[1][0][8] = 34
4415 01:23:16.460985 rx_firspass[1][0][9] = 0
4416 01:23:16.464150 rx_lastpass[1][0][9] = 32
4417 01:23:16.464535 rx_firspass[1][0][10] = 5
4418 01:23:16.467002 rx_lastpass[1][0][10] = 35
4419 01:23:16.470574 rx_firspass[1][0][11] = 6
4420 01:23:16.474133 rx_lastpass[1][0][11] = 38
4421 01:23:16.474614 rx_firspass[1][0][12] = 5
4422 01:23:16.476983 rx_lastpass[1][0][12] = 38
4423 01:23:16.480234 rx_firspass[1][0][13] = 5
4424 01:23:16.480618 rx_lastpass[1][0][13] = 37
4425 01:23:16.483568 rx_firspass[1][0][14] = 7
4426 01:23:16.487236 rx_lastpass[1][0][14] = 38
4427 01:23:16.490996 rx_firspass[1][0][15] = -4
4428 01:23:16.491595 rx_lastpass[1][0][15] = 30
4429 01:23:16.493760 rx_firspass[1][1][0] = 3
4430 01:23:16.496886 rx_lastpass[1][1][0] = 40
4431 01:23:16.497300 rx_firspass[1][1][1] = 5
4432 01:23:16.500355 rx_lastpass[1][1][1] = 39
4433 01:23:16.503871 rx_firspass[1][1][2] = 1
4434 01:23:16.507246 rx_lastpass[1][1][2] = 36
4435 01:23:16.507754 rx_firspass[1][1][3] = -2
4436 01:23:16.510921 rx_lastpass[1][1][3] = 34
4437 01:23:16.513605 rx_firspass[1][1][4] = 4
4438 01:23:16.514092 rx_lastpass[1][1][4] = 39
4439 01:23:16.517178 rx_firspass[1][1][5] = 5
4440 01:23:16.520157 rx_lastpass[1][1][5] = 40
4441 01:23:16.523768 rx_firspass[1][1][6] = 6
4442 01:23:16.524250 rx_lastpass[1][1][6] = 41
4443 01:23:16.526982 rx_firspass[1][1][7] = 3
4444 01:23:16.530302 rx_lastpass[1][1][7] = 37
4445 01:23:16.530692 rx_firspass[1][1][8] = 0
4446 01:23:16.533502 rx_lastpass[1][1][8] = 34
4447 01:23:16.537155 rx_firspass[1][1][9] = -2
4448 01:23:16.537542 rx_lastpass[1][1][9] = 34
4449 01:23:16.540428 rx_firspass[1][1][10] = 3
4450 01:23:16.543712 rx_lastpass[1][1][10] = 39
4451 01:23:16.547637 rx_firspass[1][1][11] = 5
4452 01:23:16.548143 rx_lastpass[1][1][11] = 40
4453 01:23:16.550398 rx_firspass[1][1][12] = 4
4454 01:23:16.553890 rx_lastpass[1][1][12] = 40
4455 01:23:16.557153 rx_firspass[1][1][13] = 5
4456 01:23:16.557574 rx_lastpass[1][1][13] = 40
4457 01:23:16.560248 rx_firspass[1][1][14] = 5
4458 01:23:16.563740 rx_lastpass[1][1][14] = 41
4459 01:23:16.564156 rx_firspass[1][1][15] = -3
4460 01:23:16.567046 rx_lastpass[1][1][15] = 31
4461 01:23:16.570266 dump params clk_delay
4462 01:23:16.570684 clk_delay[0] = 1
4463 01:23:16.573603 clk_delay[1] = 0
4464 01:23:16.574020 dump params dqs_delay
4465 01:23:16.577139 dqs_delay[0][0] = -2
4466 01:23:16.577523 dqs_delay[0][1] = 0
4467 01:23:16.580391 dqs_delay[1][0] = 0
4468 01:23:16.583180 dqs_delay[1][1] = 0
4469 01:23:16.583588 dump params delay_cell_unit = 735
4470 01:23:16.587018 dump source = 0x0
4471 01:23:16.590306 dump params frequency:1200
4472 01:23:16.590791 dump params rank number:2
4473 01:23:16.591103
4474 01:23:16.593560 dump params write leveling
4475 01:23:16.596645 write leveling[0][0][0] = 0x0
4476 01:23:16.599778 write leveling[0][0][1] = 0x0
4477 01:23:16.602962 write leveling[0][1][0] = 0x0
4478 01:23:16.603359 write leveling[0][1][1] = 0x0
4479 01:23:16.606794 write leveling[1][0][0] = 0x0
4480 01:23:16.609809 write leveling[1][0][1] = 0x0
4481 01:23:16.613471 write leveling[1][1][0] = 0x0
4482 01:23:16.616498 write leveling[1][1][1] = 0x0
4483 01:23:16.616885 dump params cbt_cs
4484 01:23:16.619786 cbt_cs[0][0] = 0x0
4485 01:23:16.620172 cbt_cs[0][1] = 0x0
4486 01:23:16.623056 cbt_cs[1][0] = 0x0
4487 01:23:16.623600 cbt_cs[1][1] = 0x0
4488 01:23:16.626374 dump params cbt_mr12
4489 01:23:16.626760 cbt_mr12[0][0] = 0x0
4490 01:23:16.630096 cbt_mr12[0][1] = 0x0
4491 01:23:16.633304 cbt_mr12[1][0] = 0x0
4492 01:23:16.633789 cbt_mr12[1][1] = 0x0
4493 01:23:16.636543 dump params tx window
4494 01:23:16.637028 tx_center_min[0][0][0] = 0
4495 01:23:16.639527 tx_center_max[0][0][0] = 0
4496 01:23:16.643745 tx_center_min[0][0][1] = 0
4497 01:23:16.646441 tx_center_max[0][0][1] = 0
4498 01:23:16.646934 tx_center_min[0][1][0] = 0
4499 01:23:16.649912 tx_center_max[0][1][0] = 0
4500 01:23:16.653667 tx_center_min[0][1][1] = 0
4501 01:23:16.656091 tx_center_max[0][1][1] = 0
4502 01:23:16.656641 tx_center_min[1][0][0] = 0
4503 01:23:16.659877 tx_center_max[1][0][0] = 0
4504 01:23:16.663284 tx_center_min[1][0][1] = 0
4505 01:23:16.666694 tx_center_max[1][0][1] = 0
4506 01:23:16.667099 tx_center_min[1][1][0] = 0
4507 01:23:16.669648 tx_center_max[1][1][0] = 0
4508 01:23:16.672908 tx_center_min[1][1][1] = 0
4509 01:23:16.676256 tx_center_max[1][1][1] = 0
4510 01:23:16.676801 dump params tx window
4511 01:23:16.679475 tx_win_center[0][0][0] = 0
4512 01:23:16.683122 tx_first_pass[0][0][0] = 0
4513 01:23:16.683683 tx_last_pass[0][0][0] = 0
4514 01:23:16.685997 tx_win_center[0][0][1] = 0
4515 01:23:16.689746 tx_first_pass[0][0][1] = 0
4516 01:23:16.692852 tx_last_pass[0][0][1] = 0
4517 01:23:16.693369 tx_win_center[0][0][2] = 0
4518 01:23:16.696592 tx_first_pass[0][0][2] = 0
4519 01:23:16.699800 tx_last_pass[0][0][2] = 0
4520 01:23:16.700335 tx_win_center[0][0][3] = 0
4521 01:23:16.703129 tx_first_pass[0][0][3] = 0
4522 01:23:16.706436 tx_last_pass[0][0][3] = 0
4523 01:23:16.709514 tx_win_center[0][0][4] = 0
4524 01:23:16.710052 tx_first_pass[0][0][4] = 0
4525 01:23:16.712611 tx_last_pass[0][0][4] = 0
4526 01:23:16.716254 tx_win_center[0][0][5] = 0
4527 01:23:16.719136 tx_first_pass[0][0][5] = 0
4528 01:23:16.719590 tx_last_pass[0][0][5] = 0
4529 01:23:16.722814 tx_win_center[0][0][6] = 0
4530 01:23:16.726177 tx_first_pass[0][0][6] = 0
4531 01:23:16.726725 tx_last_pass[0][0][6] = 0
4532 01:23:16.728897 tx_win_center[0][0][7] = 0
4533 01:23:16.732457 tx_first_pass[0][0][7] = 0
4534 01:23:16.735563 tx_last_pass[0][0][7] = 0
4535 01:23:16.735991 tx_win_center[0][0][8] = 0
4536 01:23:16.739431 tx_first_pass[0][0][8] = 0
4537 01:23:16.742718 tx_last_pass[0][0][8] = 0
4538 01:23:16.746186 tx_win_center[0][0][9] = 0
4539 01:23:16.746726 tx_first_pass[0][0][9] = 0
4540 01:23:16.749538 tx_last_pass[0][0][9] = 0
4541 01:23:16.752806 tx_win_center[0][0][10] = 0
4542 01:23:16.753235 tx_first_pass[0][0][10] = 0
4543 01:23:16.756413 tx_last_pass[0][0][10] = 0
4544 01:23:16.759446 tx_win_center[0][0][11] = 0
4545 01:23:16.762246 tx_first_pass[0][0][11] = 0
4546 01:23:16.762666 tx_last_pass[0][0][11] = 0
4547 01:23:16.765362 tx_win_center[0][0][12] = 0
4548 01:23:16.768935 tx_first_pass[0][0][12] = 0
4549 01:23:16.772404 tx_last_pass[0][0][12] = 0
4550 01:23:16.775393 tx_win_center[0][0][13] = 0
4551 01:23:16.775863 tx_first_pass[0][0][13] = 0
4552 01:23:16.778756 tx_last_pass[0][0][13] = 0
4553 01:23:16.782237 tx_win_center[0][0][14] = 0
4554 01:23:16.785583 tx_first_pass[0][0][14] = 0
4555 01:23:16.785979 tx_last_pass[0][0][14] = 0
4556 01:23:16.788650 tx_win_center[0][0][15] = 0
4557 01:23:16.792228 tx_first_pass[0][0][15] = 0
4558 01:23:16.795219 tx_last_pass[0][0][15] = 0
4559 01:23:16.795455 tx_win_center[0][1][0] = 0
4560 01:23:16.798505 tx_first_pass[0][1][0] = 0
4561 01:23:16.802173 tx_last_pass[0][1][0] = 0
4562 01:23:16.802322 tx_win_center[0][1][1] = 0
4563 01:23:16.805892 tx_first_pass[0][1][1] = 0
4564 01:23:16.808787 tx_last_pass[0][1][1] = 0
4565 01:23:16.812085 tx_win_center[0][1][2] = 0
4566 01:23:16.812316 tx_first_pass[0][1][2] = 0
4567 01:23:16.815961 tx_last_pass[0][1][2] = 0
4568 01:23:16.818576 tx_win_center[0][1][3] = 0
4569 01:23:16.818794 tx_first_pass[0][1][3] = 0
4570 01:23:16.822805 tx_last_pass[0][1][3] = 0
4571 01:23:16.825591 tx_win_center[0][1][4] = 0
4572 01:23:16.828974 tx_first_pass[0][1][4] = 0
4573 01:23:16.829184 tx_last_pass[0][1][4] = 0
4574 01:23:16.832296 tx_win_center[0][1][5] = 0
4575 01:23:16.835593 tx_first_pass[0][1][5] = 0
4576 01:23:16.838959 tx_last_pass[0][1][5] = 0
4577 01:23:16.839285 tx_win_center[0][1][6] = 0
4578 01:23:16.842367 tx_first_pass[0][1][6] = 0
4579 01:23:16.845432 tx_last_pass[0][1][6] = 0
4580 01:23:16.845800 tx_win_center[0][1][7] = 0
4581 01:23:16.849032 tx_first_pass[0][1][7] = 0
4582 01:23:16.852150 tx_last_pass[0][1][7] = 0
4583 01:23:16.856035 tx_win_center[0][1][8] = 0
4584 01:23:16.856462 tx_first_pass[0][1][8] = 0
4585 01:23:16.859055 tx_last_pass[0][1][8] = 0
4586 01:23:16.862711 tx_win_center[0][1][9] = 0
4587 01:23:16.866070 tx_first_pass[0][1][9] = 0
4588 01:23:16.866646 tx_last_pass[0][1][9] = 0
4589 01:23:16.869046 tx_win_center[0][1][10] = 0
4590 01:23:16.872873 tx_first_pass[0][1][10] = 0
4591 01:23:16.873390 tx_last_pass[0][1][10] = 0
4592 01:23:16.876274 tx_win_center[0][1][11] = 0
4593 01:23:16.878822 tx_first_pass[0][1][11] = 0
4594 01:23:16.882579 tx_last_pass[0][1][11] = 0
4595 01:23:16.883102 tx_win_center[0][1][12] = 0
4596 01:23:16.885502 tx_first_pass[0][1][12] = 0
4597 01:23:16.889147 tx_last_pass[0][1][12] = 0
4598 01:23:16.891996 tx_win_center[0][1][13] = 0
4599 01:23:16.895840 tx_first_pass[0][1][13] = 0
4600 01:23:16.896360 tx_last_pass[0][1][13] = 0
4601 01:23:16.898879 tx_win_center[0][1][14] = 0
4602 01:23:16.902170 tx_first_pass[0][1][14] = 0
4603 01:23:16.905193 tx_last_pass[0][1][14] = 0
4604 01:23:16.905615 tx_win_center[0][1][15] = 0
4605 01:23:16.908949 tx_first_pass[0][1][15] = 0
4606 01:23:16.912620 tx_last_pass[0][1][15] = 0
4607 01:23:16.915386 tx_win_center[1][0][0] = 0
4608 01:23:16.915840 tx_first_pass[1][0][0] = 0
4609 01:23:16.919182 tx_last_pass[1][0][0] = 0
4610 01:23:16.922459 tx_win_center[1][0][1] = 0
4611 01:23:16.922980 tx_first_pass[1][0][1] = 0
4612 01:23:16.925853 tx_last_pass[1][0][1] = 0
4613 01:23:16.929052 tx_win_center[1][0][2] = 0
4614 01:23:16.932407 tx_first_pass[1][0][2] = 0
4615 01:23:16.932835 tx_last_pass[1][0][2] = 0
4616 01:23:16.935380 tx_win_center[1][0][3] = 0
4617 01:23:16.938983 tx_first_pass[1][0][3] = 0
4618 01:23:16.942428 tx_last_pass[1][0][3] = 0
4619 01:23:16.942949 tx_win_center[1][0][4] = 0
4620 01:23:16.945331 tx_first_pass[1][0][4] = 0
4621 01:23:16.948696 tx_last_pass[1][0][4] = 0
4622 01:23:16.949215 tx_win_center[1][0][5] = 0
4623 01:23:16.951787 tx_first_pass[1][0][5] = 0
4624 01:23:16.955040 tx_last_pass[1][0][5] = 0
4625 01:23:16.958144 tx_win_center[1][0][6] = 0
4626 01:23:16.958578 tx_first_pass[1][0][6] = 0
4627 01:23:16.962051 tx_last_pass[1][0][6] = 0
4628 01:23:16.964797 tx_win_center[1][0][7] = 0
4629 01:23:16.967961 tx_first_pass[1][0][7] = 0
4630 01:23:16.968385 tx_last_pass[1][0][7] = 0
4631 01:23:16.971588 tx_win_center[1][0][8] = 0
4632 01:23:16.974738 tx_first_pass[1][0][8] = 0
4633 01:23:16.975161 tx_last_pass[1][0][8] = 0
4634 01:23:16.978266 tx_win_center[1][0][9] = 0
4635 01:23:16.981991 tx_first_pass[1][0][9] = 0
4636 01:23:16.985437 tx_last_pass[1][0][9] = 0
4637 01:23:16.985960 tx_win_center[1][0][10] = 0
4638 01:23:16.988121 tx_first_pass[1][0][10] = 0
4639 01:23:16.991541 tx_last_pass[1][0][10] = 0
4640 01:23:16.994965 tx_win_center[1][0][11] = 0
4641 01:23:16.995501 tx_first_pass[1][0][11] = 0
4642 01:23:16.998429 tx_last_pass[1][0][11] = 0
4643 01:23:17.001293 tx_win_center[1][0][12] = 0
4644 01:23:17.004540 tx_first_pass[1][0][12] = 0
4645 01:23:17.004972 tx_last_pass[1][0][12] = 0
4646 01:23:17.008348 tx_win_center[1][0][13] = 0
4647 01:23:17.011755 tx_first_pass[1][0][13] = 0
4648 01:23:17.014644 tx_last_pass[1][0][13] = 0
4649 01:23:17.015109 tx_win_center[1][0][14] = 0
4650 01:23:17.017861 tx_first_pass[1][0][14] = 0
4651 01:23:17.021195 tx_last_pass[1][0][14] = 0
4652 01:23:17.024616 tx_win_center[1][0][15] = 0
4653 01:23:17.027462 tx_first_pass[1][0][15] = 0
4654 01:23:17.027845 tx_last_pass[1][0][15] = 0
4655 01:23:17.031051 tx_win_center[1][1][0] = 0
4656 01:23:17.034450 tx_first_pass[1][1][0] = 0
4657 01:23:17.034834 tx_last_pass[1][1][0] = 0
4658 01:23:17.037833 tx_win_center[1][1][1] = 0
4659 01:23:17.041161 tx_first_pass[1][1][1] = 0
4660 01:23:17.044228 tx_last_pass[1][1][1] = 0
4661 01:23:17.044609 tx_win_center[1][1][2] = 0
4662 01:23:17.048091 tx_first_pass[1][1][2] = 0
4663 01:23:17.051454 tx_last_pass[1][1][2] = 0
4664 01:23:17.054823 tx_win_center[1][1][3] = 0
4665 01:23:17.055346 tx_first_pass[1][1][3] = 0
4666 01:23:17.058239 tx_last_pass[1][1][3] = 0
4667 01:23:17.061181 tx_win_center[1][1][4] = 0
4668 01:23:17.061614 tx_first_pass[1][1][4] = 0
4669 01:23:17.064659 tx_last_pass[1][1][4] = 0
4670 01:23:17.067713 tx_win_center[1][1][5] = 0
4671 01:23:17.070996 tx_first_pass[1][1][5] = 0
4672 01:23:17.071461 tx_last_pass[1][1][5] = 0
4673 01:23:17.074569 tx_win_center[1][1][6] = 0
4674 01:23:17.077847 tx_first_pass[1][1][6] = 0
4675 01:23:17.081088 tx_last_pass[1][1][6] = 0
4676 01:23:17.081610 tx_win_center[1][1][7] = 0
4677 01:23:17.084448 tx_first_pass[1][1][7] = 0
4678 01:23:17.087666 tx_last_pass[1][1][7] = 0
4679 01:23:17.088093 tx_win_center[1][1][8] = 0
4680 01:23:17.091088 tx_first_pass[1][1][8] = 0
4681 01:23:17.094795 tx_last_pass[1][1][8] = 0
4682 01:23:17.098141 tx_win_center[1][1][9] = 0
4683 01:23:17.098661 tx_first_pass[1][1][9] = 0
4684 01:23:17.101083 tx_last_pass[1][1][9] = 0
4685 01:23:17.104152 tx_win_center[1][1][10] = 0
4686 01:23:17.107820 tx_first_pass[1][1][10] = 0
4687 01:23:17.108250 tx_last_pass[1][1][10] = 0
4688 01:23:17.111301 tx_win_center[1][1][11] = 0
4689 01:23:17.114519 tx_first_pass[1][1][11] = 0
4690 01:23:17.117476 tx_last_pass[1][1][11] = 0
4691 01:23:17.117998 tx_win_center[1][1][12] = 0
4692 01:23:17.120655 tx_first_pass[1][1][12] = 0
4693 01:23:17.124334 tx_last_pass[1][1][12] = 0
4694 01:23:17.127465 tx_win_center[1][1][13] = 0
4695 01:23:17.127922 tx_first_pass[1][1][13] = 0
4696 01:23:17.130699 tx_last_pass[1][1][13] = 0
4697 01:23:17.133889 tx_win_center[1][1][14] = 0
4698 01:23:17.137482 tx_first_pass[1][1][14] = 0
4699 01:23:17.138019 tx_last_pass[1][1][14] = 0
4700 01:23:17.141028 tx_win_center[1][1][15] = 0
4701 01:23:17.144109 tx_first_pass[1][1][15] = 0
4702 01:23:17.147269 tx_last_pass[1][1][15] = 0
4703 01:23:17.147871 dump params rx window
4704 01:23:17.151095 rx_firspass[0][0][0] = 0
4705 01:23:17.154631 rx_lastpass[0][0][0] = 0
4706 01:23:17.155160 rx_firspass[0][0][1] = 0
4707 01:23:17.157597 rx_lastpass[0][0][1] = 0
4708 01:23:17.160602 rx_firspass[0][0][2] = 0
4709 01:23:17.161027 rx_lastpass[0][0][2] = 0
4710 01:23:17.164332 rx_firspass[0][0][3] = 0
4711 01:23:17.167650 rx_lastpass[0][0][3] = 0
4712 01:23:17.168167 rx_firspass[0][0][4] = 0
4713 01:23:17.171174 rx_lastpass[0][0][4] = 0
4714 01:23:17.173894 rx_firspass[0][0][5] = 0
4715 01:23:17.174406 rx_lastpass[0][0][5] = 0
4716 01:23:17.177287 rx_firspass[0][0][6] = 0
4717 01:23:17.180777 rx_lastpass[0][0][6] = 0
4718 01:23:17.184017 rx_firspass[0][0][7] = 0
4719 01:23:17.184533 rx_lastpass[0][0][7] = 0
4720 01:23:17.187582 rx_firspass[0][0][8] = 0
4721 01:23:17.190330 rx_lastpass[0][0][8] = 0
4722 01:23:17.190844 rx_firspass[0][0][9] = 0
4723 01:23:17.194264 rx_lastpass[0][0][9] = 0
4724 01:23:17.197512 rx_firspass[0][0][10] = 0
4725 01:23:17.197975 rx_lastpass[0][0][10] = 0
4726 01:23:17.201089 rx_firspass[0][0][11] = 0
4727 01:23:17.203827 rx_lastpass[0][0][11] = 0
4728 01:23:17.206941 rx_firspass[0][0][12] = 0
4729 01:23:17.207359 rx_lastpass[0][0][12] = 0
4730 01:23:17.210310 rx_firspass[0][0][13] = 0
4731 01:23:17.213683 rx_lastpass[0][0][13] = 0
4732 01:23:17.214105 rx_firspass[0][0][14] = 0
4733 01:23:17.217402 rx_lastpass[0][0][14] = 0
4734 01:23:17.220782 rx_firspass[0][0][15] = 0
4735 01:23:17.221339 rx_lastpass[0][0][15] = 0
4736 01:23:17.224384 rx_firspass[0][1][0] = 0
4737 01:23:17.228109 rx_lastpass[0][1][0] = 0
4738 01:23:17.230853 rx_firspass[0][1][1] = 0
4739 01:23:17.231372 rx_lastpass[0][1][1] = 0
4740 01:23:17.234202 rx_firspass[0][1][2] = 0
4741 01:23:17.237059 rx_lastpass[0][1][2] = 0
4742 01:23:17.237481 rx_firspass[0][1][3] = 0
4743 01:23:17.241064 rx_lastpass[0][1][3] = 0
4744 01:23:17.243783 rx_firspass[0][1][4] = 0
4745 01:23:17.244206 rx_lastpass[0][1][4] = 0
4746 01:23:17.247641 rx_firspass[0][1][5] = 0
4747 01:23:17.250331 rx_lastpass[0][1][5] = 0
4748 01:23:17.250847 rx_firspass[0][1][6] = 0
4749 01:23:17.253544 rx_lastpass[0][1][6] = 0
4750 01:23:17.257230 rx_firspass[0][1][7] = 0
4751 01:23:17.257887 rx_lastpass[0][1][7] = 0
4752 01:23:17.260856 rx_firspass[0][1][8] = 0
4753 01:23:17.264001 rx_lastpass[0][1][8] = 0
4754 01:23:17.266819 rx_firspass[0][1][9] = 0
4755 01:23:17.267239 rx_lastpass[0][1][9] = 0
4756 01:23:17.270142 rx_firspass[0][1][10] = 0
4757 01:23:17.273954 rx_lastpass[0][1][10] = 0
4758 01:23:17.274474 rx_firspass[0][1][11] = 0
4759 01:23:17.276807 rx_lastpass[0][1][11] = 0
4760 01:23:17.280408 rx_firspass[0][1][12] = 0
4761 01:23:17.283607 rx_lastpass[0][1][12] = 0
4762 01:23:17.284031 rx_firspass[0][1][13] = 0
4763 01:23:17.287315 rx_lastpass[0][1][13] = 0
4764 01:23:17.290368 rx_firspass[0][1][14] = 0
4765 01:23:17.290885 rx_lastpass[0][1][14] = 0
4766 01:23:17.293385 rx_firspass[0][1][15] = 0
4767 01:23:17.296655 rx_lastpass[0][1][15] = 0
4768 01:23:17.300330 rx_firspass[1][0][0] = 0
4769 01:23:17.300847 rx_lastpass[1][0][0] = 0
4770 01:23:17.303426 rx_firspass[1][0][1] = 0
4771 01:23:17.306663 rx_lastpass[1][0][1] = 0
4772 01:23:17.307084 rx_firspass[1][0][2] = 0
4773 01:23:17.310196 rx_lastpass[1][0][2] = 0
4774 01:23:17.313531 rx_firspass[1][0][3] = 0
4775 01:23:17.313979 rx_lastpass[1][0][3] = 0
4776 01:23:17.316473 rx_firspass[1][0][4] = 0
4777 01:23:17.319861 rx_lastpass[1][0][4] = 0
4778 01:23:17.320467 rx_firspass[1][0][5] = 0
4779 01:23:17.323175 rx_lastpass[1][0][5] = 0
4780 01:23:17.326871 rx_firspass[1][0][6] = 0
4781 01:23:17.327447 rx_lastpass[1][0][6] = 0
4782 01:23:17.329874 rx_firspass[1][0][7] = 0
4783 01:23:17.333117 rx_lastpass[1][0][7] = 0
4784 01:23:17.333792 rx_firspass[1][0][8] = 0
4785 01:23:17.336759 rx_lastpass[1][0][8] = 0
4786 01:23:17.340289 rx_firspass[1][0][9] = 0
4787 01:23:17.342877 rx_lastpass[1][0][9] = 0
4788 01:23:17.343394 rx_firspass[1][0][10] = 0
4789 01:23:17.346384 rx_lastpass[1][0][10] = 0
4790 01:23:17.350075 rx_firspass[1][0][11] = 0
4791 01:23:17.350473 rx_lastpass[1][0][11] = 0
4792 01:23:17.353007 rx_firspass[1][0][12] = 0
4793 01:23:17.356688 rx_lastpass[1][0][12] = 0
4794 01:23:17.359622 rx_firspass[1][0][13] = 0
4795 01:23:17.360239 rx_lastpass[1][0][13] = 0
4796 01:23:17.362899 rx_firspass[1][0][14] = 0
4797 01:23:17.366426 rx_lastpass[1][0][14] = 0
4798 01:23:17.366929 rx_firspass[1][0][15] = 0
4799 01:23:17.369749 rx_lastpass[1][0][15] = 0
4800 01:23:17.373333 rx_firspass[1][1][0] = 0
4801 01:23:17.376446 rx_lastpass[1][1][0] = 0
4802 01:23:17.376833 rx_firspass[1][1][1] = 0
4803 01:23:17.380212 rx_lastpass[1][1][1] = 0
4804 01:23:17.383127 rx_firspass[1][1][2] = 0
4805 01:23:17.383543 rx_lastpass[1][1][2] = 0
4806 01:23:17.386316 rx_firspass[1][1][3] = 0
4807 01:23:17.390091 rx_lastpass[1][1][3] = 0
4808 01:23:17.390576 rx_firspass[1][1][4] = 0
4809 01:23:17.393266 rx_lastpass[1][1][4] = 0
4810 01:23:17.396220 rx_firspass[1][1][5] = 0
4811 01:23:17.396606 rx_lastpass[1][1][5] = 0
4812 01:23:17.399932 rx_firspass[1][1][6] = 0
4813 01:23:17.403239 rx_lastpass[1][1][6] = 0
4814 01:23:17.403753 rx_firspass[1][1][7] = 0
4815 01:23:17.406730 rx_lastpass[1][1][7] = 0
4816 01:23:17.410016 rx_firspass[1][1][8] = 0
4817 01:23:17.410499 rx_lastpass[1][1][8] = 0
4818 01:23:17.413173 rx_firspass[1][1][9] = 0
4819 01:23:17.416993 rx_lastpass[1][1][9] = 0
4820 01:23:17.419716 rx_firspass[1][1][10] = 0
4821 01:23:17.420101 rx_lastpass[1][1][10] = 0
4822 01:23:17.422651 rx_firspass[1][1][11] = 0
4823 01:23:17.426599 rx_lastpass[1][1][11] = 0
4824 01:23:17.426983 rx_firspass[1][1][12] = 0
4825 01:23:17.430106 rx_lastpass[1][1][12] = 0
4826 01:23:17.432889 rx_firspass[1][1][13] = 0
4827 01:23:17.436041 rx_lastpass[1][1][13] = 0
4828 01:23:17.436429 rx_firspass[1][1][14] = 0
4829 01:23:17.440013 rx_lastpass[1][1][14] = 0
4830 01:23:17.443422 rx_firspass[1][1][15] = 0
4831 01:23:17.443951 rx_lastpass[1][1][15] = 0
4832 01:23:17.446544 dump params clk_delay
4833 01:23:17.447063 clk_delay[0] = 0
4834 01:23:17.449858 clk_delay[1] = 0
4835 01:23:17.453543 dump params dqs_delay
4836 01:23:17.454060 dqs_delay[0][0] = 0
4837 01:23:17.456539 dqs_delay[0][1] = 0
4838 01:23:17.457035 dqs_delay[1][0] = 0
4839 01:23:17.459441 dqs_delay[1][1] = 0
4840 01:23:17.463088 dump params delay_cell_unit = 735
4841 01:23:17.463551 dump source = 0x0
4842 01:23:17.466871 dump params frequency:800
4843 01:23:17.469863 dump params rank number:2
4844 01:23:17.470286
4845 01:23:17.470649 dump params write leveling
4846 01:23:17.472954 write leveling[0][0][0] = 0x0
4847 01:23:17.476332 write leveling[0][0][1] = 0x0
4848 01:23:17.479895 write leveling[0][1][0] = 0x0
4849 01:23:17.483317 write leveling[0][1][1] = 0x0
4850 01:23:17.483892 write leveling[1][0][0] = 0x0
4851 01:23:17.486578 write leveling[1][0][1] = 0x0
4852 01:23:17.489503 write leveling[1][1][0] = 0x0
4853 01:23:17.492875 write leveling[1][1][1] = 0x0
4854 01:23:17.493298 dump params cbt_cs
4855 01:23:17.496291 cbt_cs[0][0] = 0x0
4856 01:23:17.496711 cbt_cs[0][1] = 0x0
4857 01:23:17.499517 cbt_cs[1][0] = 0x0
4858 01:23:17.499938 cbt_cs[1][1] = 0x0
4859 01:23:17.502738 dump params cbt_mr12
4860 01:23:17.506206 cbt_mr12[0][0] = 0x0
4861 01:23:17.506594 cbt_mr12[0][1] = 0x0
4862 01:23:17.510102 cbt_mr12[1][0] = 0x0
4863 01:23:17.510584 cbt_mr12[1][1] = 0x0
4864 01:23:17.513168 dump params tx window
4865 01:23:17.516272 tx_center_min[0][0][0] = 0
4866 01:23:17.516660 tx_center_max[0][0][0] = 0
4867 01:23:17.519797 tx_center_min[0][0][1] = 0
4868 01:23:17.523209 tx_center_max[0][0][1] = 0
4869 01:23:17.523649 tx_center_min[0][1][0] = 0
4870 01:23:17.526532 tx_center_max[0][1][0] = 0
4871 01:23:17.529745 tx_center_min[0][1][1] = 0
4872 01:23:17.532985 tx_center_max[0][1][1] = 0
4873 01:23:17.533373 tx_center_min[1][0][0] = 0
4874 01:23:17.535988 tx_center_max[1][0][0] = 0
4875 01:23:17.539462 tx_center_min[1][0][1] = 0
4876 01:23:17.543039 tx_center_max[1][0][1] = 0
4877 01:23:17.543569 tx_center_min[1][1][0] = 0
4878 01:23:17.545987 tx_center_max[1][1][0] = 0
4879 01:23:17.549519 tx_center_min[1][1][1] = 0
4880 01:23:17.552896 tx_center_max[1][1][1] = 0
4881 01:23:17.553387 dump params tx window
4882 01:23:17.556212 tx_win_center[0][0][0] = 0
4883 01:23:17.559325 tx_first_pass[0][0][0] = 0
4884 01:23:17.559871 tx_last_pass[0][0][0] = 0
4885 01:23:17.563011 tx_win_center[0][0][1] = 0
4886 01:23:17.566531 tx_first_pass[0][0][1] = 0
4887 01:23:17.569511 tx_last_pass[0][0][1] = 0
4888 01:23:17.569937 tx_win_center[0][0][2] = 0
4889 01:23:17.572634 tx_first_pass[0][0][2] = 0
4890 01:23:17.575953 tx_last_pass[0][0][2] = 0
4891 01:23:17.578772 tx_win_center[0][0][3] = 0
4892 01:23:17.579293 tx_first_pass[0][0][3] = 0
4893 01:23:17.582692 tx_last_pass[0][0][3] = 0
4894 01:23:17.586193 tx_win_center[0][0][4] = 0
4895 01:23:17.586720 tx_first_pass[0][0][4] = 0
4896 01:23:17.589337 tx_last_pass[0][0][4] = 0
4897 01:23:17.592680 tx_win_center[0][0][5] = 0
4898 01:23:17.596200 tx_first_pass[0][0][5] = 0
4899 01:23:17.596719 tx_last_pass[0][0][5] = 0
4900 01:23:17.599016 tx_win_center[0][0][6] = 0
4901 01:23:17.602690 tx_first_pass[0][0][6] = 0
4902 01:23:17.605758 tx_last_pass[0][0][6] = 0
4903 01:23:17.606188 tx_win_center[0][0][7] = 0
4904 01:23:17.609582 tx_first_pass[0][0][7] = 0
4905 01:23:17.612467 tx_last_pass[0][0][7] = 0
4906 01:23:17.612895 tx_win_center[0][0][8] = 0
4907 01:23:17.615849 tx_first_pass[0][0][8] = 0
4908 01:23:17.618955 tx_last_pass[0][0][8] = 0
4909 01:23:17.622700 tx_win_center[0][0][9] = 0
4910 01:23:17.623135 tx_first_pass[0][0][9] = 0
4911 01:23:17.626201 tx_last_pass[0][0][9] = 0
4912 01:23:17.629270 tx_win_center[0][0][10] = 0
4913 01:23:17.632693 tx_first_pass[0][0][10] = 0
4914 01:23:17.633212 tx_last_pass[0][0][10] = 0
4915 01:23:17.635523 tx_win_center[0][0][11] = 0
4916 01:23:17.639068 tx_first_pass[0][0][11] = 0
4917 01:23:17.642211 tx_last_pass[0][0][11] = 0
4918 01:23:17.642633 tx_win_center[0][0][12] = 0
4919 01:23:17.645577 tx_first_pass[0][0][12] = 0
4920 01:23:17.649241 tx_last_pass[0][0][12] = 0
4921 01:23:17.652065 tx_win_center[0][0][13] = 0
4922 01:23:17.652488 tx_first_pass[0][0][13] = 0
4923 01:23:17.655463 tx_last_pass[0][0][13] = 0
4924 01:23:17.658972 tx_win_center[0][0][14] = 0
4925 01:23:17.661945 tx_first_pass[0][0][14] = 0
4926 01:23:17.662368 tx_last_pass[0][0][14] = 0
4927 01:23:17.665478 tx_win_center[0][0][15] = 0
4928 01:23:17.668401 tx_first_pass[0][0][15] = 0
4929 01:23:17.671991 tx_last_pass[0][0][15] = 0
4930 01:23:17.672519 tx_win_center[0][1][0] = 0
4931 01:23:17.675388 tx_first_pass[0][1][0] = 0
4932 01:23:17.678909 tx_last_pass[0][1][0] = 0
4933 01:23:17.681807 tx_win_center[0][1][1] = 0
4934 01:23:17.682324 tx_first_pass[0][1][1] = 0
4935 01:23:17.684863 tx_last_pass[0][1][1] = 0
4936 01:23:17.688461 tx_win_center[0][1][2] = 0
4937 01:23:17.691710 tx_first_pass[0][1][2] = 0
4938 01:23:17.692228 tx_last_pass[0][1][2] = 0
4939 01:23:17.694972 tx_win_center[0][1][3] = 0
4940 01:23:17.698408 tx_first_pass[0][1][3] = 0
4941 01:23:17.698929 tx_last_pass[0][1][3] = 0
4942 01:23:17.701936 tx_win_center[0][1][4] = 0
4943 01:23:17.704475 tx_first_pass[0][1][4] = 0
4944 01:23:17.708092 tx_last_pass[0][1][4] = 0
4945 01:23:17.708515 tx_win_center[0][1][5] = 0
4946 01:23:17.711840 tx_first_pass[0][1][5] = 0
4947 01:23:17.714778 tx_last_pass[0][1][5] = 0
4948 01:23:17.718213 tx_win_center[0][1][6] = 0
4949 01:23:17.718734 tx_first_pass[0][1][6] = 0
4950 01:23:17.721294 tx_last_pass[0][1][6] = 0
4951 01:23:17.724499 tx_win_center[0][1][7] = 0
4952 01:23:17.727789 tx_first_pass[0][1][7] = 0
4953 01:23:17.728282 tx_last_pass[0][1][7] = 0
4954 01:23:17.730991 tx_win_center[0][1][8] = 0
4955 01:23:17.734452 tx_first_pass[0][1][8] = 0
4956 01:23:17.734874 tx_last_pass[0][1][8] = 0
4957 01:23:17.737576 tx_win_center[0][1][9] = 0
4958 01:23:17.740822 tx_first_pass[0][1][9] = 0
4959 01:23:17.744264 tx_last_pass[0][1][9] = 0
4960 01:23:17.744653 tx_win_center[0][1][10] = 0
4961 01:23:17.747962 tx_first_pass[0][1][10] = 0
4962 01:23:17.751209 tx_last_pass[0][1][10] = 0
4963 01:23:17.754568 tx_win_center[0][1][11] = 0
4964 01:23:17.755059 tx_first_pass[0][1][11] = 0
4965 01:23:17.757671 tx_last_pass[0][1][11] = 0
4966 01:23:17.760888 tx_win_center[0][1][12] = 0
4967 01:23:17.764610 tx_first_pass[0][1][12] = 0
4968 01:23:17.764997 tx_last_pass[0][1][12] = 0
4969 01:23:17.767647 tx_win_center[0][1][13] = 0
4970 01:23:17.770873 tx_first_pass[0][1][13] = 0
4971 01:23:17.774053 tx_last_pass[0][1][13] = 0
4972 01:23:17.774553 tx_win_center[0][1][14] = 0
4973 01:23:17.777348 tx_first_pass[0][1][14] = 0
4974 01:23:17.780863 tx_last_pass[0][1][14] = 0
4975 01:23:17.784399 tx_win_center[0][1][15] = 0
4976 01:23:17.787558 tx_first_pass[0][1][15] = 0
4977 01:23:17.788041 tx_last_pass[0][1][15] = 0
4978 01:23:17.791047 tx_win_center[1][0][0] = 0
4979 01:23:17.794065 tx_first_pass[1][0][0] = 0
4980 01:23:17.794546 tx_last_pass[1][0][0] = 0
4981 01:23:17.797145 tx_win_center[1][0][1] = 0
4982 01:23:17.800911 tx_first_pass[1][0][1] = 0
4983 01:23:17.803898 tx_last_pass[1][0][1] = 0
4984 01:23:17.804382 tx_win_center[1][0][2] = 0
4985 01:23:17.807045 tx_first_pass[1][0][2] = 0
4986 01:23:17.810713 tx_last_pass[1][0][2] = 0
4987 01:23:17.813783 tx_win_center[1][0][3] = 0
4988 01:23:17.814217 tx_first_pass[1][0][3] = 0
4989 01:23:17.817538 tx_last_pass[1][0][3] = 0
4990 01:23:17.821995 tx_win_center[1][0][4] = 0
4991 01:23:17.822381 tx_first_pass[1][0][4] = 0
4992 01:23:17.823540 tx_last_pass[1][0][4] = 0
4993 01:23:17.826956 tx_win_center[1][0][5] = 0
4994 01:23:17.830460 tx_first_pass[1][0][5] = 0
4995 01:23:17.830974 tx_last_pass[1][0][5] = 0
4996 01:23:17.833627 tx_win_center[1][0][6] = 0
4997 01:23:17.837289 tx_first_pass[1][0][6] = 0
4998 01:23:17.840767 tx_last_pass[1][0][6] = 0
4999 01:23:17.841257 tx_win_center[1][0][7] = 0
5000 01:23:17.843608 tx_first_pass[1][0][7] = 0
5001 01:23:17.846782 tx_last_pass[1][0][7] = 0
5002 01:23:17.847168 tx_win_center[1][0][8] = 0
5003 01:23:17.850660 tx_first_pass[1][0][8] = 0
5004 01:23:17.853678 tx_last_pass[1][0][8] = 0
5005 01:23:17.856896 tx_win_center[1][0][9] = 0
5006 01:23:17.857284 tx_first_pass[1][0][9] = 0
5007 01:23:17.860016 tx_last_pass[1][0][9] = 0
5008 01:23:17.863210 tx_win_center[1][0][10] = 0
5009 01:23:17.866583 tx_first_pass[1][0][10] = 0
5010 01:23:17.866970 tx_last_pass[1][0][10] = 0
5011 01:23:17.870228 tx_win_center[1][0][11] = 0
5012 01:23:17.873633 tx_first_pass[1][0][11] = 0
5013 01:23:17.877026 tx_last_pass[1][0][11] = 0
5014 01:23:17.877410 tx_win_center[1][0][12] = 0
5015 01:23:17.879811 tx_first_pass[1][0][12] = 0
5016 01:23:17.883253 tx_last_pass[1][0][12] = 0
5017 01:23:17.886609 tx_win_center[1][0][13] = 0
5018 01:23:17.886994 tx_first_pass[1][0][13] = 0
5019 01:23:17.890608 tx_last_pass[1][0][13] = 0
5020 01:23:17.893628 tx_win_center[1][0][14] = 0
5021 01:23:17.897028 tx_first_pass[1][0][14] = 0
5022 01:23:17.897516 tx_last_pass[1][0][14] = 0
5023 01:23:17.900554 tx_win_center[1][0][15] = 0
5024 01:23:17.903627 tx_first_pass[1][0][15] = 0
5025 01:23:17.906775 tx_last_pass[1][0][15] = 0
5026 01:23:17.907164 tx_win_center[1][1][0] = 0
5027 01:23:17.910126 tx_first_pass[1][1][0] = 0
5028 01:23:17.914209 tx_last_pass[1][1][0] = 0
5029 01:23:17.916618 tx_win_center[1][1][1] = 0
5030 01:23:17.917040 tx_first_pass[1][1][1] = 0
5031 01:23:17.920011 tx_last_pass[1][1][1] = 0
5032 01:23:17.923363 tx_win_center[1][1][2] = 0
5033 01:23:17.923966 tx_first_pass[1][1][2] = 0
5034 01:23:17.926893 tx_last_pass[1][1][2] = 0
5035 01:23:17.930327 tx_win_center[1][1][3] = 0
5036 01:23:17.933262 tx_first_pass[1][1][3] = 0
5037 01:23:17.933683 tx_last_pass[1][1][3] = 0
5038 01:23:17.936564 tx_win_center[1][1][4] = 0
5039 01:23:17.940399 tx_first_pass[1][1][4] = 0
5040 01:23:17.943244 tx_last_pass[1][1][4] = 0
5041 01:23:17.943802 tx_win_center[1][1][5] = 0
5042 01:23:17.946687 tx_first_pass[1][1][5] = 0
5043 01:23:17.949989 tx_last_pass[1][1][5] = 0
5044 01:23:17.950528 tx_win_center[1][1][6] = 0
5045 01:23:17.953651 tx_first_pass[1][1][6] = 0
5046 01:23:17.956420 tx_last_pass[1][1][6] = 0
5047 01:23:17.959998 tx_win_center[1][1][7] = 0
5048 01:23:17.960423 tx_first_pass[1][1][7] = 0
5049 01:23:17.963478 tx_last_pass[1][1][7] = 0
5050 01:23:17.967217 tx_win_center[1][1][8] = 0
5051 01:23:17.970137 tx_first_pass[1][1][8] = 0
5052 01:23:17.970603 tx_last_pass[1][1][8] = 0
5053 01:23:17.973255 tx_win_center[1][1][9] = 0
5054 01:23:17.976754 tx_first_pass[1][1][9] = 0
5055 01:23:17.977278 tx_last_pass[1][1][9] = 0
5056 01:23:17.979523 tx_win_center[1][1][10] = 0
5057 01:23:17.983372 tx_first_pass[1][1][10] = 0
5058 01:23:17.986703 tx_last_pass[1][1][10] = 0
5059 01:23:17.987313 tx_win_center[1][1][11] = 0
5060 01:23:17.989471 tx_first_pass[1][1][11] = 0
5061 01:23:17.993692 tx_last_pass[1][1][11] = 0
5062 01:23:17.996107 tx_win_center[1][1][12] = 0
5063 01:23:17.996534 tx_first_pass[1][1][12] = 0
5064 01:23:17.999570 tx_last_pass[1][1][12] = 0
5065 01:23:18.003320 tx_win_center[1][1][13] = 0
5066 01:23:18.006107 tx_first_pass[1][1][13] = 0
5067 01:23:18.006547 tx_last_pass[1][1][13] = 0
5068 01:23:18.009584 tx_win_center[1][1][14] = 0
5069 01:23:18.012845 tx_first_pass[1][1][14] = 0
5070 01:23:18.016250 tx_last_pass[1][1][14] = 0
5071 01:23:18.016737 tx_win_center[1][1][15] = 0
5072 01:23:18.020048 tx_first_pass[1][1][15] = 0
5073 01:23:18.023555 tx_last_pass[1][1][15] = 0
5074 01:23:18.026242 dump params rx window
5075 01:23:18.026663 rx_firspass[0][0][0] = 0
5076 01:23:18.029935 rx_lastpass[0][0][0] = 0
5077 01:23:18.032948 rx_firspass[0][0][1] = 0
5078 01:23:18.033467 rx_lastpass[0][0][1] = 0
5079 01:23:18.036074 rx_firspass[0][0][2] = 0
5080 01:23:18.039359 rx_lastpass[0][0][2] = 0
5081 01:23:18.039870 rx_firspass[0][0][3] = 0
5082 01:23:18.042497 rx_lastpass[0][0][3] = 0
5083 01:23:18.046363 rx_firspass[0][0][4] = 0
5084 01:23:18.046782 rx_lastpass[0][0][4] = 0
5085 01:23:18.049928 rx_firspass[0][0][5] = 0
5086 01:23:18.053029 rx_lastpass[0][0][5] = 0
5087 01:23:18.056392 rx_firspass[0][0][6] = 0
5088 01:23:18.056927 rx_lastpass[0][0][6] = 0
5089 01:23:18.059460 rx_firspass[0][0][7] = 0
5090 01:23:18.062895 rx_lastpass[0][0][7] = 0
5091 01:23:18.063507 rx_firspass[0][0][8] = 0
5092 01:23:18.066224 rx_lastpass[0][0][8] = 0
5093 01:23:18.069408 rx_firspass[0][0][9] = 0
5094 01:23:18.069838 rx_lastpass[0][0][9] = 0
5095 01:23:18.073012 rx_firspass[0][0][10] = 0
5096 01:23:18.076325 rx_lastpass[0][0][10] = 0
5097 01:23:18.076743 rx_firspass[0][0][11] = 0
5098 01:23:18.079759 rx_lastpass[0][0][11] = 0
5099 01:23:18.083153 rx_firspass[0][0][12] = 0
5100 01:23:18.086199 rx_lastpass[0][0][12] = 0
5101 01:23:18.086714 rx_firspass[0][0][13] = 0
5102 01:23:18.089562 rx_lastpass[0][0][13] = 0
5103 01:23:18.092430 rx_firspass[0][0][14] = 0
5104 01:23:18.092954 rx_lastpass[0][0][14] = 0
5105 01:23:18.096189 rx_firspass[0][0][15] = 0
5106 01:23:18.099237 rx_lastpass[0][0][15] = 0
5107 01:23:18.102890 rx_firspass[0][1][0] = 0
5108 01:23:18.103314 rx_lastpass[0][1][0] = 0
5109 01:23:18.106286 rx_firspass[0][1][1] = 0
5110 01:23:18.109301 rx_lastpass[0][1][1] = 0
5111 01:23:18.109730 rx_firspass[0][1][2] = 0
5112 01:23:18.112630 rx_lastpass[0][1][2] = 0
5113 01:23:18.116218 rx_firspass[0][1][3] = 0
5114 01:23:18.116643 rx_lastpass[0][1][3] = 0
5115 01:23:18.119776 rx_firspass[0][1][4] = 0
5116 01:23:18.122827 rx_lastpass[0][1][4] = 0
5117 01:23:18.123355 rx_firspass[0][1][5] = 0
5118 01:23:18.125766 rx_lastpass[0][1][5] = 0
5119 01:23:18.129799 rx_firspass[0][1][6] = 0
5120 01:23:18.130366 rx_lastpass[0][1][6] = 0
5121 01:23:18.133001 rx_firspass[0][1][7] = 0
5122 01:23:18.136416 rx_lastpass[0][1][7] = 0
5123 01:23:18.139479 rx_firspass[0][1][8] = 0
5124 01:23:18.140008 rx_lastpass[0][1][8] = 0
5125 01:23:18.142755 rx_firspass[0][1][9] = 0
5126 01:23:18.146277 rx_lastpass[0][1][9] = 0
5127 01:23:18.146805 rx_firspass[0][1][10] = 0
5128 01:23:18.149920 rx_lastpass[0][1][10] = 0
5129 01:23:18.153195 rx_firspass[0][1][11] = 0
5130 01:23:18.153721 rx_lastpass[0][1][11] = 0
5131 01:23:18.155935 rx_firspass[0][1][12] = 0
5132 01:23:18.159582 rx_lastpass[0][1][12] = 0
5133 01:23:18.163214 rx_firspass[0][1][13] = 0
5134 01:23:18.163792 rx_lastpass[0][1][13] = 0
5135 01:23:18.166671 rx_firspass[0][1][14] = 0
5136 01:23:18.169257 rx_lastpass[0][1][14] = 0
5137 01:23:18.169684 rx_firspass[0][1][15] = 0
5138 01:23:18.172541 rx_lastpass[0][1][15] = 0
5139 01:23:18.175728 rx_firspass[1][0][0] = 0
5140 01:23:18.176249 rx_lastpass[1][0][0] = 0
5141 01:23:18.179679 rx_firspass[1][0][1] = 0
5142 01:23:18.182583 rx_lastpass[1][0][1] = 0
5143 01:23:18.186198 rx_firspass[1][0][2] = 0
5144 01:23:18.186624 rx_lastpass[1][0][2] = 0
5145 01:23:18.189702 rx_firspass[1][0][3] = 0
5146 01:23:18.192686 rx_lastpass[1][0][3] = 0
5147 01:23:18.193114 rx_firspass[1][0][4] = 0
5148 01:23:18.195481 rx_lastpass[1][0][4] = 0
5149 01:23:18.198844 rx_firspass[1][0][5] = 0
5150 01:23:18.199266 rx_lastpass[1][0][5] = 0
5151 01:23:18.202309 rx_firspass[1][0][6] = 0
5152 01:23:18.205584 rx_lastpass[1][0][6] = 0
5153 01:23:18.206007 rx_firspass[1][0][7] = 0
5154 01:23:18.209073 rx_lastpass[1][0][7] = 0
5155 01:23:18.212991 rx_firspass[1][0][8] = 0
5156 01:23:18.215605 rx_lastpass[1][0][8] = 0
5157 01:23:18.216189 rx_firspass[1][0][9] = 0
5158 01:23:18.219519 rx_lastpass[1][0][9] = 0
5159 01:23:18.222712 rx_firspass[1][0][10] = 0
5160 01:23:18.223241 rx_lastpass[1][0][10] = 0
5161 01:23:18.225982 rx_firspass[1][0][11] = 0
5162 01:23:18.229357 rx_lastpass[1][0][11] = 0
5163 01:23:18.229900 rx_firspass[1][0][12] = 0
5164 01:23:18.232163 rx_lastpass[1][0][12] = 0
5165 01:23:18.235669 rx_firspass[1][0][13] = 0
5166 01:23:18.238797 rx_lastpass[1][0][13] = 0
5167 01:23:18.239244 rx_firspass[1][0][14] = 0
5168 01:23:18.242479 rx_lastpass[1][0][14] = 0
5169 01:23:18.245522 rx_firspass[1][0][15] = 0
5170 01:23:18.245947 rx_lastpass[1][0][15] = 0
5171 01:23:18.249424 rx_firspass[1][1][0] = 0
5172 01:23:18.252675 rx_lastpass[1][1][0] = 0
5173 01:23:18.253219 rx_firspass[1][1][1] = 0
5174 01:23:18.255934 rx_lastpass[1][1][1] = 0
5175 01:23:18.259219 rx_firspass[1][1][2] = 0
5176 01:23:18.262680 rx_lastpass[1][1][2] = 0
5177 01:23:18.263207 rx_firspass[1][1][3] = 0
5178 01:23:18.265341 rx_lastpass[1][1][3] = 0
5179 01:23:18.268574 rx_firspass[1][1][4] = 0
5180 01:23:18.268998 rx_lastpass[1][1][4] = 0
5181 01:23:18.272102 rx_firspass[1][1][5] = 0
5182 01:23:18.275778 rx_lastpass[1][1][5] = 0
5183 01:23:18.276312 rx_firspass[1][1][6] = 0
5184 01:23:18.279274 rx_lastpass[1][1][6] = 0
5185 01:23:18.282188 rx_firspass[1][1][7] = 0
5186 01:23:18.282605 rx_lastpass[1][1][7] = 0
5187 01:23:18.285608 rx_firspass[1][1][8] = 0
5188 01:23:18.289018 rx_lastpass[1][1][8] = 0
5189 01:23:18.292159 rx_firspass[1][1][9] = 0
5190 01:23:18.292609 rx_lastpass[1][1][9] = 0
5191 01:23:18.295263 rx_firspass[1][1][10] = 0
5192 01:23:18.298315 rx_lastpass[1][1][10] = 0
5193 01:23:18.298728 rx_firspass[1][1][11] = 0
5194 01:23:18.301755 rx_lastpass[1][1][11] = 0
5195 01:23:18.305106 rx_firspass[1][1][12] = 0
5196 01:23:18.308457 rx_lastpass[1][1][12] = 0
5197 01:23:18.308966 rx_firspass[1][1][13] = 0
5198 01:23:18.311803 rx_lastpass[1][1][13] = 0
5199 01:23:18.315171 rx_firspass[1][1][14] = 0
5200 01:23:18.315686 rx_lastpass[1][1][14] = 0
5201 01:23:18.318364 rx_firspass[1][1][15] = 0
5202 01:23:18.322197 rx_lastpass[1][1][15] = 0
5203 01:23:18.322712 dump params clk_delay
5204 01:23:18.324776 clk_delay[0] = 0
5205 01:23:18.325169 clk_delay[1] = 0
5206 01:23:18.328514 dump params dqs_delay
5207 01:23:18.328958 dqs_delay[0][0] = 0
5208 01:23:18.331755 dqs_delay[0][1] = 0
5209 01:23:18.335435 dqs_delay[1][0] = 0
5210 01:23:18.335933 dqs_delay[1][1] = 0
5211 01:23:18.338432 dump params delay_cell_unit = 735
5212 01:23:18.341939 mt_set_emi_preloader end
5213 01:23:18.344733 [mt_mem_init] dram size: 0x100000000, rank number: 2
5214 01:23:18.348001 [complex_mem_test] start addr:0x40000000, len:20480
5215 01:23:18.386549 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5216 01:23:18.393132 [complex_mem_test] start addr:0x80000000, len:20480
5217 01:23:18.428954 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5218 01:23:18.435089 [complex_mem_test] start addr:0xc0000000, len:20480
5219 01:23:18.471104 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5220 01:23:18.477846 [complex_mem_test] start addr:0x56000000, len:8192
5221 01:23:18.494544 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5222 01:23:18.494931 ddr_geometry:1
5223 01:23:18.500914 [complex_mem_test] start addr:0x80000000, len:8192
5224 01:23:18.518195 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5225 01:23:18.521785 dram_init: dram init end (result: 0)
5226 01:23:18.528600 Successfully loaded DRAM blobs and ran DRAM calibration
5227 01:23:18.538269 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5228 01:23:18.538779 CBMEM:
5229 01:23:18.541807 IMD: root @ 00000000fffff000 254 entries.
5230 01:23:18.545035 IMD: root @ 00000000ffffec00 62 entries.
5231 01:23:18.551525 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5232 01:23:18.558093 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5233 01:23:18.561163 in-header: 03 a1 00 00 08 00 00 00
5234 01:23:18.564285 in-data: 84 60 60 10 00 00 00 00
5235 01:23:18.567724 Chrome EC: clear events_b mask to 0x0000000020004000
5236 01:23:18.574338 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5237 01:23:18.578933 in-header: 03 fd 00 00 00 00 00 00
5238 01:23:18.581964 in-data:
5239 01:23:18.584690 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5240 01:23:18.588363 CBFS @ 21000 size 3d4000
5241 01:23:18.591677 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5242 01:23:18.595193 CBFS: Locating 'fallback/ramstage'
5243 01:23:18.597997 CBFS: Found @ offset 10d40 size d563
5244 01:23:18.619905 read SPI 0x31d94 0xd547: 16639 us, 3281 KB/s, 26.248 Mbps
5245 01:23:18.632546 Accumulated console time in romstage 13592 ms
5246 01:23:18.633061
5247 01:23:18.633393
5248 01:23:18.642524 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5249 01:23:18.645887 ARM64: Exception handlers installed.
5250 01:23:18.646489 ARM64: Testing exception
5251 01:23:18.648564 ARM64: Done test exception
5252 01:23:18.652270 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5253 01:23:18.655954 Manufacturer: ef
5254 01:23:18.658918 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5255 01:23:18.665245 WARNING: RO_VPD is uninitialized or empty.
5256 01:23:18.668725 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5257 01:23:18.671956 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5258 01:23:18.682249 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5259 01:23:18.685395 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5260 01:23:18.692095 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5261 01:23:18.692611 Enumerating buses...
5262 01:23:18.698916 Show all devs... Before device enumeration.
5263 01:23:18.699505 Root Device: enabled 1
5264 01:23:18.702012 CPU_CLUSTER: 0: enabled 1
5265 01:23:18.702468 CPU: 00: enabled 1
5266 01:23:18.705352 Compare with tree...
5267 01:23:18.708279 Root Device: enabled 1
5268 01:23:18.708718 CPU_CLUSTER: 0: enabled 1
5269 01:23:18.711956 CPU: 00: enabled 1
5270 01:23:18.715389 Root Device scanning...
5271 01:23:18.715967 root_dev_scan_bus for Root Device
5272 01:23:18.718918 CPU_CLUSTER: 0 enabled
5273 01:23:18.722267 root_dev_scan_bus for Root Device done
5274 01:23:18.728339 scan_bus: scanning of bus Root Device took 10689 usecs
5275 01:23:18.728768 done
5276 01:23:18.731933 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5277 01:23:18.734895 Allocating resources...
5278 01:23:18.735321 Reading resources...
5279 01:23:18.738452 Root Device read_resources bus 0 link: 0
5280 01:23:18.745107 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5281 01:23:18.748717 CPU: 00 missing read_resources
5282 01:23:18.752137 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5283 01:23:18.754973 Root Device read_resources bus 0 link: 0 done
5284 01:23:18.758395 Done reading resources.
5285 01:23:18.761897 Show resources in subtree (Root Device)...After reading.
5286 01:23:18.765190 Root Device child on link 0 CPU_CLUSTER: 0
5287 01:23:18.768348 CPU_CLUSTER: 0 child on link 0 CPU: 00
5288 01:23:18.778689 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5289 01:23:18.779222 CPU: 00
5290 01:23:18.781140 Setting resources...
5291 01:23:18.784797 Root Device assign_resources, bus 0 link: 0
5292 01:23:18.788254 CPU_CLUSTER: 0 missing set_resources
5293 01:23:18.791306 Root Device assign_resources, bus 0 link: 0
5294 01:23:18.795075 Done setting resources.
5295 01:23:18.801799 Show resources in subtree (Root Device)...After assigning values.
5296 01:23:18.804895 Root Device child on link 0 CPU_CLUSTER: 0
5297 01:23:18.808128 CPU_CLUSTER: 0 child on link 0 CPU: 00
5298 01:23:18.817578 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5299 01:23:18.818096 CPU: 00
5300 01:23:18.820918 Done allocating resources.
5301 01:23:18.824452 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5302 01:23:18.827696 Enabling resources...
5303 01:23:18.828120 done.
5304 01:23:18.831004 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5305 01:23:18.834812 Initializing devices...
5306 01:23:18.835341 Root Device init ...
5307 01:23:18.837906 mainboard_init: Starting display init.
5308 01:23:18.841097 ADC[4]: Raw value=75746 ID=0
5309 01:23:18.864636 anx7625_power_on_init: Init interface.
5310 01:23:18.868336 anx7625_disable_pd_protocol: Disabled PD feature.
5311 01:23:18.874929 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5312 01:23:18.921280 anx7625_start_dp_work: Secure OCM version=00
5313 01:23:18.924754 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5314 01:23:18.941982 sp_tx_get_edid_block: EDID Block = 1
5315 01:23:19.059307 Extracted contents:
5316 01:23:19.062805 header: 00 ff ff ff ff ff ff 00
5317 01:23:19.065756 serial number: 06 af 5c 14 00 00 00 00 00 1a
5318 01:23:19.069266 version: 01 04
5319 01:23:19.072689 basic params: 95 1a 0e 78 02
5320 01:23:19.075655 chroma info: 99 85 95 55 56 92 28 22 50 54
5321 01:23:19.079181 established: 00 00 00
5322 01:23:19.085984 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5323 01:23:19.089470 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5324 01:23:19.096059 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5325 01:23:19.102447 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5326 01:23:19.109246 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5327 01:23:19.112185 extensions: 00
5328 01:23:19.112611 checksum: ae
5329 01:23:19.112946
5330 01:23:19.116024 Manufacturer: AUO Model 145c Serial Number 0
5331 01:23:19.118975 Made week 0 of 2016
5332 01:23:19.119391 EDID version: 1.4
5333 01:23:19.122117 Digital display
5334 01:23:19.125644 6 bits per primary color channel
5335 01:23:19.126177 DisplayPort interface
5336 01:23:19.129370 Maximum image size: 26 cm x 14 cm
5337 01:23:19.132130 Gamma: 220%
5338 01:23:19.132550 Check DPMS levels
5339 01:23:19.135999 Supported color formats: RGB 4:4:4
5340 01:23:19.138934 First detailed timing is preferred timing
5341 01:23:19.142578 Established timings supported:
5342 01:23:19.146247 Standard timings supported:
5343 01:23:19.146772 Detailed timings
5344 01:23:19.152812 Hex of detail: ce1d56ea50001a3030204600009010000018
5345 01:23:19.155672 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5346 01:23:19.158976 0556 0586 05a6 0640 hborder 0
5347 01:23:19.162734 0300 0304 030a 031a vborder 0
5348 01:23:19.165346 -hsync -vsync
5349 01:23:19.168657 Did detailed timing
5350 01:23:19.172790 Hex of detail: 0000000f0000000000000000000000000020
5351 01:23:19.175832 Manufacturer-specified data, tag 15
5352 01:23:19.178840 Hex of detail: 000000fe0041554f0a202020202020202020
5353 01:23:19.182258 ASCII string: AUO
5354 01:23:19.185355 Hex of detail: 000000fe004231313658414230312e34200a
5355 01:23:19.188448 ASCII string: B116XAB01.4
5356 01:23:19.188868 Checksum
5357 01:23:19.191892 Checksum: 0xae (valid)
5358 01:23:19.198656 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5359 01:23:19.199188 DSI data_rate: 457800000 bps
5360 01:23:19.206291 anx7625_parse_edid: set default k value to 0x3d for panel
5361 01:23:19.209147 anx7625_parse_edid: pixelclock(76300).
5362 01:23:19.212834 hactive(1366), hsync(32), hfp(48), hbp(154)
5363 01:23:19.215941 vactive(768), vsync(6), vfp(4), vbp(16)
5364 01:23:19.218876 anx7625_dsi_config: config dsi.
5365 01:23:19.227374 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5366 01:23:19.248050 anx7625_dsi_config: success to config DSI
5367 01:23:19.251341 anx7625_dp_start: MIPI phy setup OK.
5368 01:23:19.254352 [SSUSB] Setting up USB HOST controller...
5369 01:23:19.258129 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5370 01:23:19.261664 [SSUSB] phy power-on done.
5371 01:23:19.264991 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5372 01:23:19.268336 in-header: 03 fc 01 00 00 00 00 00
5373 01:23:19.268436 in-data:
5374 01:23:19.275705 handle_proto3_response: EC response with error code: 1
5375 01:23:19.275918 SPM: pcm index = 1
5376 01:23:19.278443 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5377 01:23:19.281476 CBFS @ 21000 size 3d4000
5378 01:23:19.287997 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5379 01:23:19.291305 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5380 01:23:19.294805 CBFS: Found @ offset 1e7c0 size 1026
5381 01:23:19.301470 read SPI 0x3f808 0x1026: 1272 us, 3250 KB/s, 26.000 Mbps
5382 01:23:19.304576 SPM: binary array size = 2988
5383 01:23:19.307957 SPM: version = pcm_allinone_v1.17.2_20180829
5384 01:23:19.311321 SPM binary loaded in 32 msecs
5385 01:23:19.318894 spm_kick_im_to_fetch: ptr = 000000004021eec2
5386 01:23:19.322365 spm_kick_im_to_fetch: len = 2988
5387 01:23:19.322458 SPM: spm_kick_pcm_to_run
5388 01:23:19.325532 SPM: spm_kick_pcm_to_run done
5389 01:23:19.328779 SPM: spm_init done in 52 msecs
5390 01:23:19.331996 Root Device init finished in 494979 usecs
5391 01:23:19.335725 CPU_CLUSTER: 0 init ...
5392 01:23:19.345549 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5393 01:23:19.348579 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5394 01:23:19.352630 CBFS @ 21000 size 3d4000
5395 01:23:19.355288 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5396 01:23:19.358763 CBFS: Locating 'sspm.bin'
5397 01:23:19.362071 CBFS: Found @ offset 208c0 size 41cb
5398 01:23:19.372149 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5399 01:23:19.380290 CPU_CLUSTER: 0 init finished in 42803 usecs
5400 01:23:19.380480 Devices initialized
5401 01:23:19.383817 Show all devs... After init.
5402 01:23:19.387359 Root Device: enabled 1
5403 01:23:19.387542 CPU_CLUSTER: 0: enabled 1
5404 01:23:19.390530 CPU: 00: enabled 1
5405 01:23:19.393624 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5406 01:23:19.397024 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5407 01:23:19.400275 ELOG: NV offset 0x558000 size 0x1000
5408 01:23:19.407727 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5409 01:23:19.414884 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5410 01:23:19.417952 ELOG: Event(17) added with size 13 at 2024-06-05 01:22:22 UTC
5411 01:23:19.421913 out: cmd=0x121: 03 db 21 01 00 00 00 00
5412 01:23:19.425072 in-header: 03 11 00 00 2c 00 00 00
5413 01:23:19.438233 in-data: 21 4c 00 00 00 00 00 00 02 10 00 00 06 80 00 00 51 a6 06 00 06 80 00 00 8b f8 00 00 06 80 00 00 cb 98 06 00 06 80 00 00 68 d1 07 00
5414 01:23:19.441351 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5415 01:23:19.444482 in-header: 03 19 00 00 08 00 00 00
5416 01:23:19.447749 in-data: a2 e0 47 00 13 00 00 00
5417 01:23:19.451111 Chrome EC: UHEPI supported
5418 01:23:19.457680 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5419 01:23:19.461359 in-header: 03 e1 00 00 08 00 00 00
5420 01:23:19.464222 in-data: 84 20 60 10 00 00 00 00
5421 01:23:19.468145 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5422 01:23:19.474475 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5423 01:23:19.477678 in-header: 03 e1 00 00 08 00 00 00
5424 01:23:19.480914 in-data: 84 20 60 10 00 00 00 00
5425 01:23:19.487815 ELOG: Event(A1) added with size 10 at 2024-06-05 01:22:22 UTC
5426 01:23:19.495292 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5427 01:23:19.497849 ELOG: Event(A0) added with size 9 at 2024-06-05 01:22:22 UTC
5428 01:23:19.504416 elog_add_boot_reason: Logged dev mode boot
5429 01:23:19.504891 Finalize devices...
5430 01:23:19.507378 Devices finalized
5431 01:23:19.510860 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5432 01:23:19.517815 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5433 01:23:19.521422 ELOG: Event(91) added with size 10 at 2024-06-05 01:22:22 UTC
5434 01:23:19.523960 Writing coreboot table at 0xffeda000
5435 01:23:19.528229 0. 0000000000114000-000000000011efff: RAMSTAGE
5436 01:23:19.534141 1. 0000000040000000-000000004023cfff: RAMSTAGE
5437 01:23:19.537685 2. 000000004023d000-00000000545fffff: RAM
5438 01:23:19.540584 3. 0000000054600000-000000005465ffff: BL31
5439 01:23:19.544165 4. 0000000054660000-00000000ffed9fff: RAM
5440 01:23:19.551186 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5441 01:23:19.554040 6. 0000000100000000-000000013fffffff: RAM
5442 01:23:19.557734 Passing 5 GPIOs to payload:
5443 01:23:19.560611 NAME | PORT | POLARITY | VALUE
5444 01:23:19.567772 write protect | 0x00000096 | low | high
5445 01:23:19.570553 EC in RW | 0x000000b1 | high | undefined
5446 01:23:19.574346 EC interrupt | 0x00000097 | low | undefined
5447 01:23:19.581318 TPM interrupt | 0x00000099 | high | undefined
5448 01:23:19.584133 speaker enable | 0x000000af | high | undefined
5449 01:23:19.587534 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5450 01:23:19.590720 in-header: 03 f7 00 00 02 00 00 00
5451 01:23:19.594549 in-data: 04 00
5452 01:23:19.595076 Board ID: 4
5453 01:23:19.597005 ADC[3]: Raw value=215149 ID=1
5454 01:23:19.597430 RAM code: 1
5455 01:23:19.597866 SKU ID: 16
5456 01:23:19.603962 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5457 01:23:19.604421 CBFS @ 21000 size 3d4000
5458 01:23:19.610591 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5459 01:23:19.617027 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum c703
5460 01:23:19.621171 coreboot table: 940 bytes.
5461 01:23:19.624016 IMD ROOT 0. 00000000fffff000 00001000
5462 01:23:19.627025 IMD SMALL 1. 00000000ffffe000 00001000
5463 01:23:19.630828 CONSOLE 2. 00000000fffde000 00020000
5464 01:23:19.633783 FMAP 3. 00000000fffdd000 0000047c
5465 01:23:19.637172 TIME STAMP 4. 00000000fffdc000 00000910
5466 01:23:19.641059 RAMOOPS 5. 00000000ffedc000 00100000
5467 01:23:19.643957 COREBOOT 6. 00000000ffeda000 00002000
5468 01:23:19.647260 IMD small region:
5469 01:23:19.651054 IMD ROOT 0. 00000000ffffec00 00000400
5470 01:23:19.653679 VBOOT WORK 1. 00000000ffffeb00 00000100
5471 01:23:19.657452 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5472 01:23:19.660572 VPD 3. 00000000ffffea60 0000006c
5473 01:23:19.667104 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5474 01:23:19.673558 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5475 01:23:19.677140 in-header: 03 e1 00 00 08 00 00 00
5476 01:23:19.680777 in-data: 84 20 60 10 00 00 00 00
5477 01:23:19.683779 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5478 01:23:19.687265 CBFS @ 21000 size 3d4000
5479 01:23:19.691075 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5480 01:23:19.694429 CBFS: Locating 'fallback/payload'
5481 01:23:19.702501 CBFS: Found @ offset dc040 size 439a0
5482 01:23:19.790915 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5483 01:23:19.793806 Checking segment from ROM address 0x0000000040003a00
5484 01:23:19.800192 Checking segment from ROM address 0x0000000040003a1c
5485 01:23:19.803887 Loading segment from ROM address 0x0000000040003a00
5486 01:23:19.807000 code (compression=0)
5487 01:23:19.816577 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5488 01:23:19.823762 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5489 01:23:19.827275 it's not compressed!
5490 01:23:19.830747 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5491 01:23:19.837261 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5492 01:23:19.844811 Loading segment from ROM address 0x0000000040003a1c
5493 01:23:19.847962 Entry Point 0x0000000080000000
5494 01:23:19.848490 Loaded segments
5495 01:23:19.854648 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5496 01:23:19.858195 Jumping to boot code at 0000000080000000(00000000ffeda000)
5497 01:23:19.867990 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5498 01:23:19.871328 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5499 01:23:19.874091 CBFS @ 21000 size 3d4000
5500 01:23:19.880783 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5501 01:23:19.884926 CBFS: Locating 'fallback/bl31'
5502 01:23:19.887687 CBFS: Found @ offset 36dc0 size 5820
5503 01:23:19.898538 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5504 01:23:19.901814 Checking segment from ROM address 0x0000000040003a00
5505 01:23:19.908256 Checking segment from ROM address 0x0000000040003a1c
5506 01:23:19.911667 Loading segment from ROM address 0x0000000040003a00
5507 01:23:19.914822 code (compression=1)
5508 01:23:19.921725 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5509 01:23:19.932010 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5510 01:23:19.932540 using LZMA
5511 01:23:19.940235 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5512 01:23:19.946791 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5513 01:23:19.950097 Loading segment from ROM address 0x0000000040003a1c
5514 01:23:19.954018 Entry Point 0x0000000054601000
5515 01:23:19.954544 Loaded segments
5516 01:23:19.956951 NOTICE: MT8183 bl31_setup
5517 01:23:19.964424 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5518 01:23:19.967278 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5519 01:23:19.970658 INFO: [DEVAPC] dump DEVAPC registers:
5520 01:23:19.980775 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5521 01:23:19.987569 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5522 01:23:19.997282 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5523 01:23:20.003854 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5524 01:23:20.014492 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5525 01:23:20.020446 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5526 01:23:20.030604 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5527 01:23:20.036942 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5528 01:23:20.047049 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5529 01:23:20.053555 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5530 01:23:20.060133 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5531 01:23:20.070215 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5532 01:23:20.076809 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5533 01:23:20.086901 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5534 01:23:20.093781 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5535 01:23:20.099715 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5536 01:23:20.106881 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5537 01:23:20.113458 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5538 01:23:20.123594 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5539 01:23:20.129593 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5540 01:23:20.136523 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5541 01:23:20.143259 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5542 01:23:20.146580 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5543 01:23:20.149747 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5544 01:23:20.152665 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5545 01:23:20.156888 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5546 01:23:20.159599 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5547 01:23:20.166671 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5548 01:23:20.172782 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5549 01:23:20.173299 WARNING: region 0:
5550 01:23:20.176379 WARNING: apc:0x168, sa:0x0, ea:0xfff
5551 01:23:20.179795 WARNING: region 1:
5552 01:23:20.182889 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5553 01:23:20.183460 WARNING: region 2:
5554 01:23:20.186043 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5555 01:23:20.189730 WARNING: region 3:
5556 01:23:20.192986 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5557 01:23:20.196613 WARNING: region 4:
5558 01:23:20.199389 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5559 01:23:20.199991 WARNING: region 5:
5560 01:23:20.202756 WARNING: apc:0x0, sa:0x0, ea:0x0
5561 01:23:20.206408 WARNING: region 6:
5562 01:23:20.209575 WARNING: apc:0x0, sa:0x0, ea:0x0
5563 01:23:20.210001 WARNING: region 7:
5564 01:23:20.213107 WARNING: apc:0x0, sa:0x0, ea:0x0
5565 01:23:20.219190 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5566 01:23:20.222924 INFO: SPM: enable SPMC mode
5567 01:23:20.226325 NOTICE: spm_boot_init() start
5568 01:23:20.229253 NOTICE: spm_boot_init() end
5569 01:23:20.232746 INFO: BL31: Initializing runtime services
5570 01:23:20.239498 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5571 01:23:20.242652 INFO: BL31: Preparing for EL3 exit to normal world
5572 01:23:20.246065 INFO: Entry point address = 0x80000000
5573 01:23:20.249347 INFO: SPSR = 0x8
5574 01:23:20.270818
5575 01:23:20.271350
5576 01:23:20.271745
5577 01:23:20.273372 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5578 01:23:20.273969 start: 2.2.4 bootloader-commands (timeout 00:04:38) [common]
5579 01:23:20.274403 Setting prompt string to ['jacuzzi:']
5580 01:23:20.274834 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:38)
5581 01:23:20.275546 Starting depthcharge on Juniper...
5582 01:23:20.275908
5583 01:23:20.277039 vboot_handoff: creating legacy vboot_handoff structure
5584 01:23:20.277466
5585 01:23:20.280153 ec_init(0): CrosEC protocol v3 supported (544, 544)
5586 01:23:20.284249
5587 01:23:20.284918 Wipe memory regions:
5588 01:23:20.285273
5589 01:23:20.286889 [0x00000040000000, 0x00000054600000)
5590 01:23:20.330197
5591 01:23:20.330731 [0x00000054660000, 0x00000080000000)
5592 01:23:20.421757
5593 01:23:20.422285 [0x000000811994a0, 0x000000ffeda000)
5594 01:23:20.681172
5595 01:23:20.681340 [0x00000100000000, 0x00000140000000)
5596 01:23:20.813822
5597 01:23:20.817234 Initializing XHCI USB controller at 0x11200000.
5598 01:23:20.841309
5599 01:23:20.844530 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5600 01:23:20.845057
5601 01:23:20.845509
5602 01:23:20.846380 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5604 01:23:20.947748 jacuzzi: tftpboot 192.168.201.1 14173539/tftp-deploy-moys6zp8/kernel/image.itb 14173539/tftp-deploy-moys6zp8/kernel/cmdline
5605 01:23:20.948424 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5606 01:23:20.948930 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
5607 01:23:20.953869 tftpboot 192.168.201.1 14173539/tftp-deploy-moys6zp8/kernel/image.ittp-deploy-moys6zp8/kernel/cmdline
5608 01:23:20.954414
5609 01:23:20.954862 Waiting for link
5610 01:23:21.354494
5611 01:23:21.355028 R8152: Initializing
5612 01:23:21.355575
5613 01:23:21.357646 Version 9 (ocp_data = 6010)
5614 01:23:21.358184
5615 01:23:21.360734 R8152: Done initializing
5616 01:23:21.361268
5617 01:23:21.361718 Adding net device
5618 01:23:21.746124
5619 01:23:21.746721 done.
5620 01:23:21.747174
5621 01:23:21.747681 MAC: 00:e0:4c:68:0b:b9
5622 01:23:21.748115
5623 01:23:21.749702 Sending DHCP discover... done.
5624 01:23:21.750127
5625 01:23:21.752618 Waiting for reply... done.
5626 01:23:21.753060
5627 01:23:21.755632 Sending DHCP request... done.
5628 01:23:21.756058
5629 01:23:21.760086 Waiting for reply... done.
5630 01:23:21.760616
5631 01:23:21.760961 My ip is 192.168.201.13
5632 01:23:21.761278
5633 01:23:21.763526 The DHCP server ip is 192.168.201.1
5634 01:23:21.764058
5635 01:23:21.770010 TFTP server IP predefined by user: 192.168.201.1
5636 01:23:21.770545
5637 01:23:21.776383 Bootfile predefined by user: 14173539/tftp-deploy-moys6zp8/kernel/image.itb
5638 01:23:21.776924
5639 01:23:21.779561 Sending tftp read request... done.
5640 01:23:21.779986
5641 01:23:21.786175 Waiting for the transfer...
5642 01:23:21.786640
5643 01:23:22.076502 00000000 ################################################################
5644 01:23:22.076659
5645 01:23:22.367127 00080000 ################################################################
5646 01:23:22.367282
5647 01:23:22.661177 00100000 ################################################################
5648 01:23:22.661331
5649 01:23:22.952637 00180000 ################################################################
5650 01:23:22.952795
5651 01:23:23.246917 00200000 ################################################################
5652 01:23:23.247064
5653 01:23:23.544282 00280000 ################################################################
5654 01:23:23.544434
5655 01:23:23.817170 00300000 ################################################################
5656 01:23:23.817329
5657 01:23:24.098008 00380000 ################################################################
5658 01:23:24.098162
5659 01:23:24.391643 00400000 ################################################################
5660 01:23:24.391799
5661 01:23:24.646974 00480000 ################################################################
5662 01:23:24.647127
5663 01:23:24.913410 00500000 ################################################################
5664 01:23:24.913564
5665 01:23:25.203771 00580000 ################################################################
5666 01:23:25.203927
5667 01:23:25.496219 00600000 ################################################################
5668 01:23:25.496369
5669 01:23:25.781619 00680000 ################################################################
5670 01:23:25.781767
5671 01:23:26.046658 00700000 ################################################################
5672 01:23:26.046812
5673 01:23:26.342563 00780000 ################################################################
5674 01:23:26.342717
5675 01:23:26.617638 00800000 ################################################################
5676 01:23:26.617787
5677 01:23:26.877025 00880000 ################################################################
5678 01:23:26.877173
5679 01:23:27.159983 00900000 ################################################################
5680 01:23:27.160143
5681 01:23:27.459333 00980000 ################################################################
5682 01:23:27.459559
5683 01:23:27.757713 00a00000 ################################################################
5684 01:23:27.757863
5685 01:23:28.026058 00a80000 ################################################################
5686 01:23:28.026213
5687 01:23:28.308621 00b00000 ################################################################
5688 01:23:28.308776
5689 01:23:28.567466 00b80000 ################################################################
5690 01:23:28.567619
5691 01:23:28.826483 00c00000 ################################################################
5692 01:23:28.826638
5693 01:23:29.103919 00c80000 ################################################################
5694 01:23:29.104105
5695 01:23:29.411071 00d00000 ################################################################
5696 01:23:29.411252
5697 01:23:29.708158 00d80000 ################################################################
5698 01:23:29.708343
5699 01:23:30.002550 00e00000 ################################################################
5700 01:23:30.002750
5701 01:23:30.297429 00e80000 ################################################################
5702 01:23:30.297618
5703 01:23:30.591230 00f00000 ################################################################
5704 01:23:30.591415
5705 01:23:30.875590 00f80000 ################################################################
5706 01:23:30.875763
5707 01:23:31.170439 01000000 ################################################################
5708 01:23:31.170597
5709 01:23:31.468264 01080000 ################################################################
5710 01:23:31.468448
5711 01:23:31.741479 01100000 ################################################################
5712 01:23:31.741665
5713 01:23:32.020345 01180000 ################################################################
5714 01:23:32.020558
5715 01:23:32.304425 01200000 ################################################################
5716 01:23:32.304613
5717 01:23:32.559103 01280000 ################################################################
5718 01:23:32.559280
5719 01:23:32.855349 01300000 ################################################################
5720 01:23:32.855540
5721 01:23:33.146506 01380000 ################################################################
5722 01:23:33.146686
5723 01:23:33.426364 01400000 ################################################################
5724 01:23:33.426552
5725 01:23:33.718754 01480000 ################################################################
5726 01:23:33.718936
5727 01:23:34.009901 01500000 ################################################################
5728 01:23:34.010086
5729 01:23:34.288632 01580000 ################################################################
5730 01:23:34.288820
5731 01:23:34.563668 01600000 ################################################################
5732 01:23:34.563849
5733 01:23:34.837190 01680000 ################################################################
5734 01:23:34.837373
5735 01:23:35.134062 01700000 ################################################################
5736 01:23:35.134244
5737 01:23:35.418597 01780000 ################################################################
5738 01:23:35.418781
5739 01:23:35.706636 01800000 ################################################################
5740 01:23:35.706785
5741 01:23:35.997675 01880000 ################################################################
5742 01:23:35.997828
5743 01:23:36.277966 01900000 ################################################################
5744 01:23:36.278121
5745 01:23:36.535082 01980000 ################################################################
5746 01:23:36.535237
5747 01:23:36.790805 01a00000 ################################################################
5748 01:23:36.790986
5749 01:23:37.059367 01a80000 ################################################################
5750 01:23:37.059563
5751 01:23:37.350956 01b00000 ################################################################
5752 01:23:37.351116
5753 01:23:37.630969 01b80000 ################################################################
5754 01:23:37.631116
5755 01:23:37.919132 01c00000 ################################################################
5756 01:23:37.919300
5757 01:23:38.206204 01c80000 ################################################################
5758 01:23:38.206380
5759 01:23:38.500877 01d00000 ################################################################
5760 01:23:38.501045
5761 01:23:38.812502 01d80000 ################################################################
5762 01:23:38.813171
5763 01:23:39.068149 01e00000 ################################################# done.
5764 01:23:39.068322
5765 01:23:39.071288 The bootfile was 31851370 bytes long.
5766 01:23:39.071389
5767 01:23:39.074774 Sending tftp read request... done.
5768 01:23:39.075194
5769 01:23:39.078009 Waiting for the transfer...
5770 01:23:39.078430
5771 01:23:39.078764 00000000 # done.
5772 01:23:39.079090
5773 01:23:39.084868 Command line loaded dynamically from TFTP file: 14173539/tftp-deploy-moys6zp8/kernel/cmdline
5774 01:23:39.085388
5775 01:23:39.111468 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14173539/extract-nfsrootfs-d319lfd8,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5776 01:23:39.111995
5777 01:23:39.112333 Loading FIT.
5778 01:23:39.114816
5779 01:23:39.115238 Image ramdisk-1 has 18731706 bytes.
5780 01:23:39.118442
5781 01:23:39.118867 Image fdt-1 has 57695 bytes.
5782 01:23:39.119395
5783 01:23:39.121387 Image kernel-1 has 13059919 bytes.
5784 01:23:39.121806
5785 01:23:39.131185 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5786 01:23:39.131737
5787 01:23:39.141809 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5788 01:23:39.144843
5789 01:23:39.148134 Choosing best match conf-1 for compat google,juniper-sku16.
5790 01:23:39.152692
5791 01:23:39.157491 Connected to device vid:did:rid of 1ae0:0028:00
5792 01:23:39.165934
5793 01:23:39.168551 tpm_get_response: command 0x17b, return code 0x0
5794 01:23:39.168977
5795 01:23:39.172009 tpm_cleanup: add release locality here.
5796 01:23:39.172431
5797 01:23:39.175861 Shutting down all USB controllers.
5798 01:23:39.176386
5799 01:23:39.178675 Removing current net device
5800 01:23:39.179209
5801 01:23:39.182079 Exiting depthcharge with code 4 at timestamp: 36156125
5802 01:23:39.182607
5803 01:23:39.185592 LZMA decompressing kernel-1 to 0x80193568
5804 01:23:39.186122
5805 01:23:39.191285 LZMA decompressing kernel-1 to 0x40000000
5806 01:23:41.047209
5807 01:23:41.047767 jumping to kernel
5808 01:23:41.049363 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
5809 01:23:41.049866 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
5810 01:23:41.050288 Setting prompt string to ['Linux version [0-9]']
5811 01:23:41.050647 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5812 01:23:41.050998 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5813 01:23:41.123171
5814 01:23:41.126016 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5815 01:23:41.129985 start: 2.2.5.1 login-action (timeout 00:04:17) [common]
5816 01:23:41.130563 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5817 01:23:41.131035 Setting prompt string to []
5818 01:23:41.131466 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5819 01:23:41.131842 Using line separator: #'\n'#
5820 01:23:41.132156 No login prompt set.
5821 01:23:41.132481 Parsing kernel messages
5822 01:23:41.132806 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5823 01:23:41.133379 [login-action] Waiting for messages, (timeout 00:04:17)
5824 01:23:41.133728 Waiting using forced prompt support (timeout 00:02:09)
5825 01:23:41.149446 [ 0.000000] Linux version 6.1.92-cip22-rt12 (KernelCI@build-j217237-arm64-gcc-10-defconfig-arm64-chromebook-pmq2q) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Wed Jun 5 00:22:12 UTC 2024
5826 01:23:41.152779 [ 0.000000] random: crng init done
5827 01:23:41.159487 [ 0.000000] Machine model: Google juniper sku16 board
5828 01:23:41.163023 [ 0.000000] efi: UEFI not found.
5829 01:23:41.168972 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5830 01:23:41.179612 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5831 01:23:41.185746 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5832 01:23:41.189252 [ 0.000000] printk: bootconsole [mtk8250] enabled
5833 01:23:41.197986 [ 0.000000] NUMA: No NUMA configuration found
5834 01:23:41.204497 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5835 01:23:41.211219 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5836 01:23:41.211668 [ 0.000000] Zone ranges:
5837 01:23:41.217761 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5838 01:23:41.221241 [ 0.000000] DMA32 empty
5839 01:23:41.227772 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5840 01:23:41.231217 [ 0.000000] Movable zone start for each node
5841 01:23:41.234182 [ 0.000000] Early memory node ranges
5842 01:23:41.240965 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5843 01:23:41.247581 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5844 01:23:41.254180 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5845 01:23:41.261169 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5846 01:23:41.267595 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5847 01:23:41.274126 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5848 01:23:41.290597 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5849 01:23:41.297171 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5850 01:23:41.303538 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5851 01:23:41.307099 [ 0.000000] psci: probing for conduit method from DT.
5852 01:23:41.314212 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5853 01:23:41.316965 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5854 01:23:41.323480 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5855 01:23:41.326783 [ 0.000000] psci: SMC Calling Convention v1.1
5856 01:23:41.333847 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5857 01:23:41.336825 [ 0.000000] Detected VIPT I-cache on CPU0
5858 01:23:41.343561 [ 0.000000] CPU features: detected: GIC system register CPU interface
5859 01:23:41.349896 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5860 01:23:41.356840 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5861 01:23:41.363533 [ 0.000000] CPU features: detected: ARM erratum 845719
5862 01:23:41.366604 [ 0.000000] alternatives: applying boot alternatives
5863 01:23:41.370096 [ 0.000000] Fallback order for Node 0: 0
5864 01:23:41.376618 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5865 01:23:41.379616 [ 0.000000] Policy zone: Normal
5866 01:23:41.406484 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14173539/extract-nfsrootfs-d319lfd8,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5867 01:23:41.419602 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5868 01:23:41.429991 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5869 01:23:41.436447 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5870 01:23:41.443044 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5871 01:23:41.449604 <6>[ 0.000000] software IO TLB: area num 8.
5872 01:23:41.473940 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5873 01:23:41.532302 <6>[ 0.000000] Memory: 3896908K/4191232K available (18112K kernel code, 4120K rwdata, 22504K rodata, 8512K init, 616K bss, 261556K reserved, 32768K cma-reserved)
5874 01:23:41.538620 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5875 01:23:41.545316 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5876 01:23:41.548551 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5877 01:23:41.554891 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5878 01:23:41.562003 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5879 01:23:41.564976 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5880 01:23:41.574814 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5881 01:23:41.581702 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5882 01:23:41.584732 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5883 01:23:41.597038 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5884 01:23:41.603628 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5885 01:23:41.607233 <6>[ 0.000000] GICv3: 640 SPIs implemented
5886 01:23:41.610110 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5887 01:23:41.616654 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5888 01:23:41.620034 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5889 01:23:41.626562 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5890 01:23:41.636645 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5891 01:23:41.650250 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5892 01:23:41.656303 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5893 01:23:41.668403 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5894 01:23:41.682326 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5895 01:23:41.689041 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5896 01:23:41.695249 <6>[ 0.009469] Console: colour dummy device 80x25
5897 01:23:41.698667 <6>[ 0.014501] printk: console [tty1] enabled
5898 01:23:41.708929 <6>[ 0.018888] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5899 01:23:41.715603 <6>[ 0.029352] pid_max: default: 32768 minimum: 301
5900 01:23:41.718892 <6>[ 0.034233] LSM: Security Framework initializing
5901 01:23:41.728716 <6>[ 0.039148] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5902 01:23:41.735120 <6>[ 0.046771] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5903 01:23:41.742302 <4>[ 0.055645] cacheinfo: Unable to detect cache hierarchy for CPU 0
5904 01:23:41.752280 <6>[ 0.062268] cblist_init_generic: Setting adjustable number of callback queues.
5905 01:23:41.755374 <6>[ 0.069714] cblist_init_generic: Setting shift to 3 and lim to 1.
5906 01:23:41.765387 <6>[ 0.076067] cblist_init_generic: Setting adjustable number of callback queues.
5907 01:23:41.771875 <6>[ 0.083512] cblist_init_generic: Setting shift to 3 and lim to 1.
5908 01:23:41.780041 <6>[ 0.089973] printk: bootconsole [mtk8250] printing thread started
5909 01:23:41.786490 <6>[ 0.089988] rcu: Hierarchical SRCU implementation.
5910 01:23:41.793532 <6>[ 0.089990] rcu: Max phase no-delay instances is 1000.
5911 01:23:41.796314 <6>[ 0.090019] printk: console [tty1] printing thread started
5912 01:23:41.803464 <6>[ 0.092481] EFI services will not be available.
5913 01:23:41.806713 <6>[ 0.092662] smp: Bringing up secondary CPUs ...
5914 01:23:41.809906 <6>[ 0.093168] Detected VIPT I-cache on CPU1
5915 01:23:41.816600 <4>[ 0.093214] cacheinfo: Unable to detect cache hierarchy for CPU 1
5916 01:23:41.823002 <6>[ 0.093221] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5917 01:23:41.829782 <6>[ 0.093253] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5918 01:23:41.836892 <6>[ 0.093734] Detected VIPT I-cache on CPU2
5919 01:23:41.843006 <4>[ 0.093765] cacheinfo: Unable to detect cache hierarchy for CPU 2
5920 01:23:41.849966 <6>[ 0.093769] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5921 01:23:41.856665 <6>[ 0.093780] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5922 01:23:41.864231 <6>[ 0.174961] Detected VIPT I-cache on CPU3
5923 01:23:41.871069 <4>[ 0.174992] cacheinfo: Unable to detect cache hierarchy for CPU 3
5924 01:23:41.877692 <6>[ 0.174997] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5925 01:23:41.884436 <6>[ 0.175007] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5926 01:23:41.890776 <6>[ 0.175582] CPU features: detected: Spectre-v2
5927 01:23:41.894331 <6>[ 0.175591] CPU features: detected: Spectre-BHB
5928 01:23:41.900760 <6>[ 0.175594] CPU features: detected: ARM erratum 858921
5929 01:23:41.903953 <6>[ 0.175599] Detected VIPT I-cache on CPU4
5930 01:23:41.910435 <4>[ 0.175649] cacheinfo: Unable to detect cache hierarchy for CPU 4
5931 01:23:41.917147 <6>[ 0.175656] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5932 01:23:41.924258 <6>[ 0.175664] arch_timer: Enabling local workaround for ARM erratum 858921
5933 01:23:41.930932 <6>[ 0.175674] arch_timer: CPU4: Trapping CNTVCT access
5934 01:23:41.937599 <6>[ 0.175681] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5935 01:23:41.940879 <6>[ 0.176169] Detected VIPT I-cache on CPU5
5936 01:23:41.947544 <4>[ 0.176209] cacheinfo: Unable to detect cache hierarchy for CPU 5
5937 01:23:41.953958 <6>[ 0.176214] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5938 01:23:41.966156 <6>[ 0.176221] arch_timer: Enabling local workaround for ARM erratum 858921
5939 01:23:41.969293 <6>[ 0.176227] arch_timer: CPU5: Trapping CNTVCT access
5940 01:23:41.975946 <6>[ 0.176232] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5941 01:23:41.979001 <6>[ 0.176669] Detected VIPT I-cache on CPU6
5942 01:23:41.985926 <4>[ 0.176714] cacheinfo: Unable to detect cache hierarchy for CPU 6
5943 01:23:41.995331 <6>[ 0.176720] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5944 01:23:42.006408 <6>[ 0.176727] arch_timer: Enabling local workaround for ARM erratum 858921
5945 01:23:42.006956 <6>[ 0.176732] arch_timer: CPU6: Trapping CNTVCT access
5946 01:23:42.011972 <6>[ 0.176737] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5947 01:23:42.015513 <6>[ 0.177269] Detected VIPT I-cache on CPU7
5948 01:23:42.022217 <4>[ 0.177313] cacheinfo: Unable to detect cache hierarchy for CPU 7
5949 01:23:42.032381 <6>[ 0.177319] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5950 01:23:42.038666 <6>[ 0.177326] arch_timer: Enabling local workaround for ARM erratum 858921
5951 01:23:42.041832 <6>[ 0.177332] arch_timer: CPU7: Trapping CNTVCT access
5952 01:23:42.048491 <6>[ 0.177336] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5953 01:23:42.052097 <6>[ 0.177384] smp: Brought up 1 node, 8 CPUs
5954 01:23:42.058613 <6>[ 0.177389] SMP: Total of 8 processors activated.
5955 01:23:42.065515 <6>[ 0.177392] CPU features: detected: 32-bit EL0 Support
5956 01:23:42.089508 <6>[ 0.403145] printk: consol<e [ttyS0] printing thread started
5957 01:23:42.096142 6<6>[ 0.403154] printk: console [ttyS0] enabled
5958 01:23:42.099486 >[ 0.177393] CPU features: detected: 32-bit EL1 Support
5959 01:23:42.108191 <6>[ 0.403158] printk: bootconsole [mtk8250] disabled
5960 01:23:42.114934 <6>[ 0.418830] printk: bootconsole [mtk8250] printing thread stopped
5961 01:23:42.121298 <3>[ 0.419280] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5962 01:23:42.131123 <3>[ 0.419285] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5963 01:23:42.141233 <6>[ 0.439636] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5964 01:23:42.144237 <6>[ 0.439830] serial serial0: tty port ttyS1 registered
5965 01:23:42.151035 <6>[ 0.441098] SuperH (H)SCI(F) driver initialized
5966 01:23:42.154895 <6>[ 0.441711] msm_serial: driver initialized
5967 01:23:42.164238 <6>[ 0.447563] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5968 01:23:42.171351 <6>[ 0.447599] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5969 01:23:42.181985 <6>[ 0.447624] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5970 01:23:42.200258 <6>[ 0.447649] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5971 01:23:42.201403 <6>[ 0.447673] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5972 01:23:42.217778 <6>[ 0.447705] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5973 01:23:42.218321 <6>[ 0.447728] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5974 01:23:42.227207 <6>[ 0.447753] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5975 01:23:42.230828 <6>[ 0.447777] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5976 01:23:42.239801 <6>[ 0.447851] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5977 01:23:42.246764 <4>[ 0.451452] cacheinfo: Unable to detect cache hierarchy for CPU 0
5978 01:23:42.249896 <6>[ 0.454379] loop: module loaded
5979 01:23:42.256347 <6>[ 0.462959] vsim1: Bringing 1800000uV into 2700000-2700000uV
5980 01:23:42.259649 <6>[ 0.478084] megasas: 07.719.03.00-rc1
5981 01:23:42.266454 <6>[ 0.482794] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5982 01:23:42.273117 <6>[ 0.493278] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5983 01:23:42.276396 <6>[ 0.505552] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5984 01:23:42.289716 <6>[ 0.559266] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
5985 01:23:42.579899 <6>[ 0.891602] Freeing initrd memory: 18288K
5986 01:23:42.591441 <4>[ 0.899159] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5987 01:23:42.598305 <4>[ 0.899165] CPU: 7 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22-rt12 #1
5988 01:23:42.604816 <4>[ 0.899171] Hardware name: Google juniper sku16 board (DT)
5989 01:23:42.608160 <4>[ 0.899174] Call trace:
5990 01:23:42.611485 <4>[ 0.899177] dump_backtrace.part.0+0xe0/0xf0
5991 01:23:42.614672 <4>[ 0.899194] show_stack+0x18/0x30
5992 01:23:42.621061 <4>[ 0.899201] dump_stack_lvl+0x68/0x84
5993 01:23:42.624270 <4>[ 0.899210] dump_stack+0x18/0x34
5994 01:23:42.628031 <4>[ 0.899215] sysfs_warn_dup+0x64/0x80
5995 01:23:42.631127 <4>[ 0.899221] sysfs_do_create_link_sd+0xf0/0x100
5996 01:23:42.634879 <4>[ 0.899224] sysfs_create_link+0x20/0x40
5997 01:23:42.639475 <4>[ 0.899228] bus_add_device+0x68/0x10c
5998 01:23:42.643180 <4>[ 0.899235] device_add+0x340/0x7ac
5999 01:23:42.646517 <4>[ 0.899239] of_device_add+0x44/0x60
6000 01:23:42.653470 <4>[ 0.899249] of_platform_device_create_pdata+0x90/0x120
6001 01:23:42.656776 <4>[ 0.899252] of_platform_bus_create+0x170/0x370
6002 01:23:42.663368 <4>[ 0.899257] of_platform_populate+0x50/0xfc
6003 01:23:42.666673 <4>[ 0.899260] parse_mtd_partitions+0x1dc/0x510
6004 01:23:42.673461 <4>[ 0.899266] mtd_device_parse_register+0xf8/0x2e0
6005 01:23:42.676836 <4>[ 0.899271] spi_nor_probe+0x21c/0x2f0
6006 01:23:42.679739 <4>[ 0.899277] spi_mem_probe+0x6c/0xb0
6007 01:23:42.683146 <4>[ 0.899283] spi_probe+0x84/0xe4
6008 01:23:42.686894 <4>[ 0.899287] really_probe+0xbc/0x2e0
6009 01:23:42.690169 <4>[ 0.899292] __driver_probe_device+0x78/0x11c
6010 01:23:42.696665 <4>[ 0.899297] driver_probe_device+0xd8/0x160
6011 01:23:42.699780 <4>[ 0.899302] __device_attach_driver+0xb8/0x134
6012 01:23:42.702790 <4>[ 0.899307] bus_for_each_drv+0x78/0xd0
6013 01:23:42.709618 <4>[ 0.899311] __device_attach+0xa8/0x1c0
6014 01:23:42.713105 <4>[ 0.899316] device_initial_probe+0x14/0x20
6015 01:23:42.716621 <4>[ 0.899321] bus_probe_device+0x9c/0xa4
6016 01:23:42.719460 <4>[ 0.899325] device_add+0x3ac/0x7ac
6017 01:23:42.726493 <4>[ 0.899329] __spi_add_device+0x78/0x120
6018 01:23:42.729547 <4>[ 0.899334] spi_add_device+0x40/0x7c
6019 01:23:42.733208 <4>[ 0.899339] spi_register_controller+0x610/0xad0
6020 01:23:42.739969 <4>[ 0.899344] devm_spi_register_controller+0x4c/0xa4
6021 01:23:42.743042 <4>[ 0.899350] mtk_spi_probe+0x3f8/0x650
6022 01:23:42.746971 <4>[ 0.899355] platform_probe+0x68/0xe0
6023 01:23:42.750270 <4>[ 0.899361] really_probe+0xbc/0x2e0
6024 01:23:42.756865 <4>[ 0.899366] __driver_probe_device+0x78/0x11c
6025 01:23:42.759880 <4>[ 0.899370] driver_probe_device+0xd8/0x160
6026 01:23:42.763683 <4>[ 0.899375] __driver_attach+0x94/0x19c
6027 01:23:42.770368 <4>[ 0.899380] bus_for_each_dev+0x70/0xd0
6028 01:23:42.773651 <4>[ 0.899384] driver_attach+0x24/0x30
6029 01:23:42.777053 <4>[ 0.899388] bus_add_driver+0x154/0x20c
6030 01:23:42.779999 <4>[ 0.899392] driver_register+0x78/0x130
6031 01:23:42.786714 <4>[ 0.899397] __platform_driver_register+0x28/0x34
6032 01:23:42.789961 <4>[ 0.899403] mtk_spi_driver_init+0x1c/0x28
6033 01:23:42.793199 <4>[ 0.899411] do_one_initcall+0x50/0x1d0
6034 01:23:42.799648 <4>[ 0.899415] kernel_init_freeable+0x21c/0x288
6035 01:23:42.803599 <4>[ 0.899421] kernel_init+0x24/0x12c
6036 01:23:42.806735 <4>[ 0.899428] ret_from_fork+0x10/0x20
6037 01:23:42.810212 <6>[ 0.904501] tun: Universal TUN/TAP device driver, 1.6
6038 01:23:42.813236 <6>[ 0.905447] thunder_xcv, ver 1.0
6039 01:23:42.816951 <6>[ 0.905467] thunder_bgx, ver 1.0
6040 01:23:42.819827 <6>[ 0.905484] nicpf, ver 1.0
6041 01:23:42.829825 <6>[ 0.906888] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6042 01:23:42.833322 <6>[ 0.906892] hns3: Copyright (c) 2017 Huawei Corporation.
6043 01:23:42.836147 <6>[ 0.906922] hclge is initializing
6044 01:23:42.842869 <6>[ 0.906935] e1000: Intel(R) PRO/1000 Network Driver
6045 01:23:42.849793 <6>[ 0.906937] e1000: Copyright (c) 1999-2006 Intel Corporation.
6046 01:23:42.853020 <6>[ 0.906957] e1000e: Intel(R) PRO/1000 Network Driver
6047 01:23:42.859560 <6>[ 0.906958] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6048 01:23:42.866548 <6>[ 0.906979] igb: Intel(R) Gigabit Ethernet Network Driver
6049 01:23:42.873079 <6>[ 0.906981] igb: Copyright (c) 2007-2014 Intel Corporation.
6050 01:23:42.879810 <6>[ 0.906997] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6051 01:23:42.883503 <6>[ 0.906999] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6052 01:23:42.889874 <6>[ 0.907369] sky2: driver version 1.30
6053 01:23:42.896399 <6>[ 0.908678] usbcore: registered new device driver r8152-cfgselector
6054 01:23:42.899639 <6>[ 0.908696] usbcore: registered new interface driver r8152
6055 01:23:42.906399 <6>[ 0.908781] VFIO - User Level meta-driver version: 0.3
6056 01:23:42.912884 <6>[ 0.911166] mtu3 11201000.usb: uwk - reg:0x420, version:101
6057 01:23:42.919614 <4>[ 0.911199] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6058 01:23:42.922719 <6>[ 0.911254] mtu3 11201000.usb: dr_mode: 1, drd: auto
6059 01:23:42.929526 <6>[ 0.911258] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6060 01:23:42.932887 <6>[ 0.911434] mtu3 11201000.usb: usb3-drd: 0
6061 01:23:42.943081 <6>[ 0.912616] mtu3 11201000.usb: xHCI platform device register success...
6062 01:23:42.949281 <4>[ 0.914403] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6063 01:23:42.952556 <6>[ 0.914795] xhci-mtk 11200000.usb: xHCI Host Controller
6064 01:23:42.962485 <6>[ 0.914811] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6065 01:23:42.969632 <6>[ 0.914885] xhci-mtk 11200000.usb: USB3 root hub has no ports
6066 01:23:42.976285 <6>[ 0.914890] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6067 01:23:42.982853 <6>[ 0.914941] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6068 01:23:42.989234 <6>[ 0.915025] xhci-mtk 11200000.usb: xHCI Host Controller
6069 01:23:42.996172 <6>[ 0.915031] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6070 01:23:43.003254 <6>[ 0.915037] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6071 01:23:43.006143 <6>[ 0.915361] hub 1-0:1.0: USB hub found
6072 01:23:43.009820 <6>[ 0.915378] hub 1-0:1.0: 1 port detected
6073 01:23:43.019692 <6>[ 0.917139] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6074 01:23:43.023122 <6>[ 0.917384] hub 2-0:1.0: USB hub found
6075 01:23:43.029276 <3>[ 0.917397] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6076 01:23:43.035796 <6>[ 0.917813] usbcore: registered new interface driver usb-storage
6077 01:23:43.042088 <6>[ 0.918056] usbcore: registered new device driver onboard-usb-hub
6078 01:23:43.052484 <4>[ 0.918329] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6079 01:23:43.055913 <6>[ 0.921633] mt6397-rtc mt6358-rtc: registered as rtc0
6080 01:23:43.065971 <6>[ 0.921785] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-05T01:22:45 UTC (1717550565)
6081 01:23:43.604073 <6>[ 0.922574] i2c_dev: i2c /dev entries driver
6082 01:23:43.610913 <6>[ 0.924395] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6083 01:23:43.620917 <6>[ 0.924440] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6084 01:23:43.627156 <6>[ 0.924479] i2c 4-0058: Fixed dependency cycle(s) with /panel
6085 01:23:43.633472 <6>[ 0.924509] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6086 01:23:43.640200 <3>[ 0.925123] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6087 01:23:43.650366 <6>[ 0.933495] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6088 01:23:43.654092 <6>[ 0.937259] cpu cpu0: EM: created perf domain
6089 01:23:43.663898 <6>[ 0.938288] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6090 01:23:43.670731 <6>[ 0.938550] cpu cpu4: EM: created perf domain
6091 01:23:43.676926 <6>[ 0.942787] sdhci: Secure Digital Host Controller Interface driver
6092 01:23:43.680424 <6>[ 0.942791] sdhci: Copyright(c) Pierre Ossman
6093 01:23:43.686663 <6>[ 0.943778] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6094 01:23:43.693388 <6>[ 0.943901] Synopsys Designware Multimedia Card Interface Driver
6095 01:23:43.697090 <6>[ 0.945027] sdhci-pltfm: SDHCI platform and OF driver helper
6096 01:23:43.704103 <6>[ 0.950946] ledtrig-cpu: registered to indicate activity on CPUs
6097 01:23:43.710798 <6>[ 0.953242] usbcore: registered new interface driver usbhid
6098 01:23:43.714078 <6>[ 0.953248] usbhid: USB HID core driver
6099 01:23:43.719979 <6>[ 0.953549] spi_master spi2: will run message pump with realtime priority
6100 01:23:43.729759 <4>[ 0.953609] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6101 01:23:43.736916 <4>[ 0.953711] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6102 01:23:43.750117 <6>[ 0.965304] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6103 01:23:43.763449 <6>[ 0.967179] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6104 01:23:43.769765 <6>[ 0.967745] cros-ec-spi spi2.0: Chrome EC device registered
6105 01:23:43.776582 <4>[ 1.014830] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6106 01:23:43.783440 <4>[ 1.022307] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6107 01:23:43.790315 <4>[ 1.025499] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6108 01:23:43.796308 <4>[ 1.026143] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6109 01:23:43.806417 <6>[ 1.026598] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6110 01:23:43.813086 <6>[ 1.030737] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6111 01:23:43.823236 <6>[ 1.031905] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6112 01:23:43.829516 <6>[ 1.034133] NET: Registered PF_PACKET protocol family
6113 01:23:43.832603 <6>[ 1.034284] 9pnet: Installing 9P2000 support
6114 01:23:43.836349 <5>[ 1.034341] Key type dns_resolver registered
6115 01:23:43.842536 <6>[ 1.035338] registered taskstats version 1
6116 01:23:43.845915 <5>[ 1.035371] Loading compiled-in X.509 certificates
6117 01:23:43.852980 <6>[ 1.064492] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6118 01:23:43.859816 <6>[ 1.066079] mmc0: new HS400 MMC card at address 0001
6119 01:23:43.862469 <6>[ 1.066821] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6120 01:23:43.869638 <6>[ 1.070574] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6121 01:23:43.876297 <3>[ 1.071686] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6122 01:23:43.882869 <6>[ 1.072284] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6123 01:23:43.889670 <6>[ 1.073472] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6124 01:23:43.896069 <6>[ 1.074414] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6125 01:23:43.905787 <4>[ 1.090477] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6126 01:23:43.916030 <6>[ 1.091099] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6127 01:23:43.925867 <6>[ 1.093896] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6128 01:23:43.935583 <6>[ 1.094192] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6129 01:23:43.948585 <3>[ 1.094435] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6130 01:23:43.959346 <6>[ 1.094593] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6131 01:23:43.972037 <3>[ 1.130496] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6132 01:23:43.979513 <3>[ 1.131342] debugfs: File 'Playback' in directory 'dapm' already present!
6133 01:23:43.985587 <3>[ 1.131350] debugfs: File 'Capture' in directory 'dapm' already present!
6134 01:23:43.995078 <6>[ 1.133064] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input4
6135 01:23:44.005342 <6>[ 1.137131] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6136 01:23:44.012126 <6>[ 1.137151] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6137 01:23:44.021861 <6>[ 1.137157] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6138 01:23:44.028557 <6>[ 1.137164] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6139 01:23:44.038585 <6>[ 1.137171] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6140 01:23:44.048106 <6>[ 1.137177] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6141 01:23:44.054839 <6>[ 1.137183] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6142 01:23:44.061673 <6>[ 1.138015] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6143 01:23:44.068452 <6>[ 1.139269] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6144 01:23:44.075540 <6>[ 1.140103] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6145 01:23:44.082323 <6>[ 1.140865] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6146 01:23:44.088696 <6>[ 1.141626] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6147 01:23:44.094910 <6>[ 1.143742] panfrost 13040000.gpu: clock rate = 511999970
6148 01:23:44.105094 <6>[ 1.143763] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6149 01:23:44.111744 <6>[ 1.144304] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6150 01:23:44.121662 <6>[ 1.144310] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6151 01:23:44.131491 <6>[ 1.144315] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6152 01:23:44.138236 <6>[ 1.144322] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6153 01:23:44.147885 <6>[ 1.146916] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6154 01:23:44.154605 <6>[ 1.148360] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6155 01:23:44.164449 <6>[ 1.148378] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6156 01:23:44.174342 <6>[ 1.148386] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6157 01:23:44.184112 <6>[ 1.148394] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6158 01:23:44.191277 <6>[ 1.148403] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6159 01:23:44.200564 <6>[ 1.148411] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6160 01:23:44.210931 <6>[ 1.148420] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6161 01:23:44.221152 <6>[ 1.148428] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6162 01:23:44.230976 <6>[ 1.148436] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6163 01:23:44.237634 <6>[ 1.210555] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6164 01:23:44.247562 <6>[ 1.210725] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6165 01:23:44.257437 <6>[ 1.211994] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6166 01:23:44.263697 <6>[ 1.329947] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6167 01:23:44.267575 <6>[ 1.481388] hub 1-1:1.0: USB hub found
6168 01:23:44.273927 <6>[ 1.481822] hub 1-1:1.0: 3 ports detected
6169 01:23:44.280374 <6>[ 1.899595] Console: switching to colour frame buffer device 170x48
6170 01:23:44.286921 <6>[ 1.915703] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6171 01:23:44.293476 <6>[ 1.925507] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input5
6172 01:23:44.303370 <6>[ 1.926246] input: volume-buttons as /devices/platform/volume-buttons/input/input6
6173 01:23:44.310364 <6>[ 1.931112] Trying to probe devices needed for running init ...
6174 01:23:44.316490 <6>[ 2.205874] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6175 01:23:44.323917 <6>[ 2.390157] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6176 01:23:44.333061 <4>[ 2.501346] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6177 01:23:44.340038 <4>[ 2.501366] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6178 01:23:44.346762 <6>[ 2.538758] r8152 1-1.2:1.0 eth0: v1.12.13
6179 01:23:44.353319 <6>[ 2.621980] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6180 01:23:45.839814 <6>[ 4.152280] r8152 1-1.2:1.0 eth0: carrier on
6181 01:23:47.927983 <5>[ 4.181883] Sending DHCP requests .., OK
6182 01:23:47.934140 <6>[ 6.238148] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6183 01:23:47.937544 <6>[ 6.238163] IP-Config: Complete:
6184 01:23:47.950942 <6>[ 6.238166] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6185 01:23:47.957486 <6>[ 6.238179] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6186 01:23:47.967346 <6>[ 6.238185] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6187 01:23:47.970607 Loading, please <6>[ 6.238192] nameserver0=192.168.201.1
6188 01:23:47.973920 wait...
6189 01:23:47.977552 <6>[ 6.238443] clk: Disabling unused clocks
6190 01:23:47.980611 <6>[ 6.239383] ALSA device list:
6191 01:23:47.984465 <6>[ 6.239389] #0: mt8183_mt6358_ts3a227_max98357
6192 01:23:47.990602 <6>[ 6.265119] Freeing unused kernel memory: 8512K
6193 01:23:47.994360 <6>[ 6.265289] Run /init as init process
6194 01:23:48.000765 Starting systemd-udevd version 252.22-1~deb12u1
6195 01:23:48.324080 <3>[ 6.636969] mtk-scp 10500000.scp: invalid resource
6196 01:23:48.330687 <6>[ 6.637029] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6197 01:23:48.340210 <6>[ 6.644081] remoteproc remoteproc0: scp is available
6198 01:23:48.350296 <4>[ 6.644159] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6199 01:23:48.353132 <6>[ 6.644167] remoteproc remoteproc0: powering up scp
6200 01:23:48.366353 <4>[ 6.644181] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6201 01:23:48.373132 <3>[ 6.644184] remoteproc remoteproc0: request_firmware failed: -2
6202 01:23:48.379865 <4>[ 6.668177] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6203 01:23:48.386560 <4>[ 6.668322] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6204 01:23:48.396297 <3>[ 6.672880] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6205 01:23:48.403157 <3>[ 6.672890] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6206 01:23:48.416459 <3>[ 6.672893] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6207 01:23:48.423021 <3>[ 6.672898] elan_i2c 2-0015: Error applying setting, reverse things back
6208 01:23:48.426332 <6>[ 6.672986] mc: Linux media interface: v0.10
6209 01:23:48.436364 <3>[ 6.673337] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6210 01:23:48.443274 <3>[ 6.673354] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6211 01:23:48.452638 <3>[ 6.673366] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6212 01:23:48.460216 <3>[ 6.673434] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6213 01:23:48.470264 <3>[ 6.673443] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6214 01:23:48.476837 <3>[ 6.673451] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6215 01:23:48.486647 <3>[ 6.673537] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6216 01:23:48.496909 <3>[ 6.673548] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6217 01:23:48.503618 <3>[ 6.684870] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6218 01:23:48.509849 <3>[ 6.696104] thermal_sys: Failed to find 'trips' node
6219 01:23:48.516315 <3>[ 6.696113] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6220 01:23:48.523363 <3>[ 6.696122] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6221 01:23:48.533475 <4>[ 6.696127] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6222 01:23:48.536697 <3>[ 6.702203] thermal_sys: Failed to find 'trips' node
6223 01:23:48.546896 <3>[ 6.702213] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6224 01:23:48.552858 <3>[ 6.702221] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6225 01:23:48.559334 <4>[ 6.702226] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6226 01:23:48.566323 <6>[ 6.727183] videodev: Linux video capture interface: v2.00
6227 01:23:48.572911 <6>[ 6.727603] cs_system_cfg: CoreSight Configuration manager initialised
6228 01:23:48.583095 <5>[ 6.742736] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6229 01:23:48.589699 <6>[ 6.748905] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6230 01:23:48.595888 <6>[ 6.749865] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6231 01:23:48.605742 <6>[ 6.751204] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6232 01:23:48.612706 <6>[ 6.752370] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6233 01:23:48.622946 Begin: Loading e<6>[ 6.752895] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6234 01:23:48.632388 ssential drivers<6>[ 6.754645] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6235 01:23:48.639248 <6>[ 6.755084] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6236 01:23:48.649298 ... done.<6>[ 6.755346] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6237 01:23:48.655127 <6>[ 6.755425] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6238 01:23:48.655593
6239 01:23:48.662530 <5>[ 6.759271] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6240 01:23:48.672849 <5>[ 6.759697] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6241 01:23:48.680109 Begin: Running /<4>[ 6.759766] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6242 01:23:48.686904 scripts/init-pre<6>[ 6.759775] cfg80211: failed to load regulatory.db
6243 01:23:48.700358 mount ... done.<6>[ 6.821822] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6244 01:23:48.703510 <6>[ 6.857108] Bluetooth: Core ver 2.22
6245 01:23:48.706710 <6>[ 6.857197] NET: Registered PF_BLUETOOTH protocol family
6246 01:23:48.707238
6247 01:23:48.716740 Begin: Mountin<6>[ 6.857199] Bluetooth: HCI device and connection manager initialized
6248 01:23:48.719741 <6>[ 6.857215] Bluetooth: HCI socket layer initialized
6249 01:23:48.726695 g root file syst<6>[ 6.857220] Bluetooth: L2CAP socket layer initialized
6250 01:23:48.733252 em ... Begin: Ru<6>[ 6.857231] Bluetooth: SCO socket layer initialized
6251 01:23:48.740338 <6>[ 6.865570] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6252 01:23:48.746726 <6>[ 6.880705] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6253 01:23:48.756397 nning /scripts/n<6>[ 6.880757] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6254 01:23:48.763187 <6>[ 6.881154] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6255 01:23:48.772622 <6>[ 6.881303] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6256 01:23:48.786425 fs-top ... done.<6>[ 6.883818] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6257 01:23:48.786962
6258 01:23:48.792668 Begin: Running<6>[ 6.883987] usbcore: registered new interface driver uvcvideo
6259 01:23:48.799242 /scripts/nfs-pr<6>[ 6.908381] Bluetooth: HCI UART driver ver 2.3
6260 01:23:48.806409 emount ... Waiti<6>[ 6.908389] Bluetooth: HCI UART protocol H4 registered
6261 01:23:48.812991 ng up to 60 secs<6>[ 6.908426] Bluetooth: HCI UART protocol LL registered
6262 01:23:48.820268 for any etherne<6>[ 6.908439] Bluetooth: HCI UART protocol Three-wire (H5) registered
6263 01:23:48.826615 t to become avai<6>[ 6.908749] Bluetooth: HCI UART protocol Broadcom registered
6264 01:23:48.827042 lable
6265 01:23:48.834011 Device /s<6>[ 6.908776] Bluetooth: HCI UART protocol QCA registered
6266 01:23:48.841105 ys/class/net/eth<6>[ 6.908790] Bluetooth: HCI UART protocol Marvell registered
6267 01:23:48.841636 0 found
6268 01:23:48.841981 done.
6269 01:23:48.847996 <6>[ 6.909318] Bluetooth: hci0: setting up ROME/QCA6390
6270 01:23:48.857495 <6>[ 6.955275] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6271 01:23:48.864058 <6>[ 6.955286] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6272 01:23:48.877466 <6>[ 6.955680] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6273 01:23:48.884159 <6>[ 7.103742] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6274 01:23:48.890505 Begin: Waiting u<3>[ 7.125051] Bluetooth: hci0: Frame reassembly failed (-84)
6275 01:23:48.900465 p to 180 secs fo<4>[ 7.134041] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6276 01:23:48.907021 <4>[ 7.134041] Fallback method does not support PEC.
6277 01:23:48.916579 r any network de<3>[ 7.136635] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6278 01:23:48.927026 vice to become a<3>[ 7.149909] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6279 01:23:48.927625 vailable ... done.
6280 01:23:48.976192 IP-Config: eth0 hardware address 00:e0:4c:68:0b:b9 mtu 1500 DHCP
6281 01:23:48.982815 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6282 01:23:48.989240 address: 192.168.201.13 broadcast: 192.168.201.255 netmask: 255.255.255.0
6283 01:23:48.996017 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6284 01:23:49.002634 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-0
6285 01:23:49.009294 domain : lava-rack
6286 01:23:49.012538 rootserver: 192.168.201.1 rootpath:
6287 01:23:49.013068 filename :
6288 01:23:49.087522 <6>[ 7.400081] Bluetooth: hci0: QCA Product ID :0x00000008
6289 01:23:49.094109 <6>[ 7.400099] Bluetooth: hci0: QCA SOC Version :0x00000044
6290 01:23:49.100658 <6>[ 7.400104] Bluetooth: hci0: QCA ROM Version :0x00000302
6291 01:23:49.104121 <6>[ 7.400109] Bluetooth: hci0: QCA Patch Version:0x00000111
6292 01:23:49.111048 <6>[ 7.400117] Bluetooth: hci0: QCA controller version 0x00440302
6293 01:23:49.117227 <6>[ 7.400124] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6294 01:23:49.127523 <4>[ 7.400245] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6295 01:23:49.133868 <3>[ 7.400255] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6296 01:23:49.140758 <3>[ 7.400259] Bluetooth: hci0: QCA Failed to download patch (-2)
6297 01:23:49.150391 <6>[ 7.437400] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6298 01:23:49.199259 <4>[ 7.506922] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6299 01:23:49.205519 <4>[ 7.516769] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6300 01:23:49.212244 <4>[ 7.521097] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6301 01:23:49.218995 <4>[ 7.521961] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6302 01:23:49.225683 done.
6303 01:23:49.231749 Begin: Running /scripts/nfs-bottom ... done.
6304 01:23:49.244606 Begin: Running /scripts/init-bottom ... done.
6305 01:23:50.587752 <6>[ 8.898473] NET: Registered PF_INET6 protocol family
6306 01:23:50.591593 <6>[ 8.901116] Segment Routing with IPv6
6307 01:23:50.598118 <6>[ 8.901147] In-situ OAM (IOAM) with IPv6
6308 01:23:50.766284 <30>[ 9.052918] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6309 01:23:50.789201 <30>[ 9.052966] systemd[1]: Detected architecture arm64.
6310 01:23:50.789723
6311 01:23:50.795450 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6312 01:23:50.795997
6313 01:23:50.823296 <30>[ 9.132093] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6314 01:23:51.959656 <30>[ 10.266998] systemd[1]: Queued start job for default target graphical.target.
6315 01:23:52.005432 [[0;32m OK [0m] Created slic<30>[ 10.311437] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6316 01:23:52.008168 e [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6317 01:23:52.031046 [[0;32m OK [<30>[ 10.340887] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6318 01:23:52.040628 0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6319 01:23:52.061899 [[0;32m OK [0m] Created slic<30>[ 10.368220] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6320 01:23:52.068202 e [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6321 01:23:52.086266 [[0;32m OK [<30>[ 10.396275] systemd[1]: Created slice user.slice - User and Session Slice.
6322 01:23:52.093065 0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6323 01:23:52.119516 [[0;32m OK [0m] Started [0;<30>[ 10.422922] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6324 01:23:52.125969 1;39msystemd-ask-passwo…quests to Console Directory Watch.
6325 01:23:52.150683 [[0;32m OK [0m] Started [0;1;39msystemd-ask<30>[ 10.454266] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6326 01:23:52.154183 -passwo… Requests to Wall Directory Watch.
6327 01:23:52.188932 Expecting device [0;1;39mdev-ttyS0.dev<30>[ 10.482243] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6328 01:23:52.195113 <30>[ 10.482393] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6329 01:23:52.198549 ice[0m - /dev/ttyS0...
6330 01:23:52.219164 [[0;32m OK [0m] Reached target [0;1;39mcryp<30>[ 10.526058] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6331 01:23:52.222321 tsetup.…get[0m - Local Encrypted Volumes.
6332 01:23:52.246840 [[0;32m OK [0m] Reached target [0;1;39minte<30>[ 10.550285] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6333 01:23:52.249571 grityse…Local Integrity Protected Volumes.
6334 01:23:52.271066 [[0;32m OK [0m] Reached target [0;1;39mpath<30>[ 10.578146] systemd[1]: Reached target paths.target - Path Units.
6335 01:23:52.274358 s.target[0m - Path Units.
6336 01:23:52.294854 [[0;32m OK [0m] Reached target [0;1;39mremo<30>[ 10.602075] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6337 01:23:52.298749 te-fs.target[0m - Remote File Systems.
6338 01:23:52.319250 [[0;32m OK [0m] Reached target [0;1;39mslic<30>[ 10.626026] systemd[1]: Reached target slices.target - Slice Units.
6339 01:23:52.322351 es.target[0m - Slice Units.
6340 01:23:52.344204 [[0;32m OK [0m] Reached target [0;1;39mswap<30>[ 10.650453] systemd[1]: Reached target swap.target - Swaps.
6341 01:23:52.344721 .target[0m - Swaps.
6342 01:23:52.367752 [[0;32m OK [0m] Reached target [0;1;39mveri<30>[ 10.674555] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6343 01:23:52.374733 tysetup… - Local Verity Protected Volumes.
6344 01:23:52.399589 [[0;32m OK [0m] Listening on [0;1;39msystem<30>[ 10.702622] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6345 01:23:52.403017 d-initc… initctl Compatibility Named Pipe.
6346 01:23:52.426478 [[0;32m OK [<30>[ 10.733278] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6347 01:23:52.432283 0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6348 01:23:52.453276 [[0;32m OK [0m] Listening on<30>[ 10.759958] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6349 01:23:52.459367 [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6350 01:23:52.479864 [[0;32m OK [0m] Listening on [0;1;39msystem<30>[ 10.786769] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6351 01:23:52.483004 d-journald.socket[0m - Journal Socket.
6352 01:23:52.505254 [[0;32m OK [0m] Listening on<30>[ 10.812134] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6353 01:23:52.512197 [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6354 01:23:52.531479 [[0;32m OK [<30>[ 10.841510] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6355 01:23:52.541149 0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6356 01:23:52.560040 [[0;32m OK [0m] Listening on [0;1;39msystem<30>[ 10.866663] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6357 01:23:52.566274 d-udevd…l.socket[0m - udev Kernel Socket.
6358 01:23:52.635101 Mounting [0;1;39mdev-hugepages.mount[<30>[ 10.942315] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6359 01:23:52.638580 0m - Huge Pages File System...
6360 01:23:52.653439 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6361 01:23:52.659735 <30>[ 10.963406] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6362 01:23:52.677678 Mounting [0;1;39msys-kernel-debug.…<30>[ 10.984587] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6363 01:23:52.680762 [0m - Kernel Debug File System...
6364 01:23:52.717355 <30>[ 11.010740] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6365 01:23:52.730554 Starting [0;1;39mkmod-<30>[ 11.016389] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6366 01:23:52.733596 static-nodes…ate List of Static Device Nodes...
6367 01:23:52.760855 Starting [0;1;39mmodpr<30>[ 11.067658] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6368 01:23:52.764049 obe@configfs…m - Load Kernel Module configfs...
6369 01:23:52.791826 Starting [0;1;39mmodpr<30>[ 11.099061] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6370 01:23:52.795684 obe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6371 01:23:52.823472 Starting [0;1;39mmodprobe@drm.service<30>[ 11.130068] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6372 01:23:52.826375 [0m - Load Kernel Module drm...
6373 01:23:52.839079 <6>[ 11.148833] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6374 01:23:52.856612 Starting [0;1;39mmodpr<30>[ 11.163511] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6375 01:23:52.862698 obe@efi_psto…- Load Kernel Module efi_pstore...
6376 01:23:52.883779 <30>[ 11.193809] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6377 01:23:52.889770 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6378 01:23:52.911970 <30>[ 11.221824] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6379 01:23:52.921916 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6380 01:23:52.952206 Starting [0;1;39msyste<30>[ 11.259004] systemd[1]: Starting systemd-journald.service - Journal Service...
6381 01:23:52.954891 md-journald.serv<6>[ 11.260048] fuse: init (API version 7.37)
6382 01:23:52.958247 ice[0m - Journal Service...
6383 01:23:53.023736 Starting [0;1;39msystemd-modules-l…r<30>[ 11.330676] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6384 01:23:53.027079 vice[0m - Load Kernel Modules...
6385 01:23:53.059256 Starting [0;1;39msystemd-network-g… <30>[ 11.362947] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6386 01:23:53.062675 units from Kernel command line...
6387 01:23:53.088700 Starting [0;1;39msyste<30>[ 11.394990] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6388 01:23:53.095201 md-remount-f…nt Root and Kernel File Systems...
6389 01:23:53.120417 Starting [0;1;39msyste<30>[ 11.427424] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6390 01:23:53.123605 md-udev-trig…[0m - Coldplug All udev Devices...
6391 01:23:53.150414 [[0;32m OK [<30>[ 11.460670] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6392 01:23:53.157044 0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6393 01:23:53.168145 <3>[ 11.477723] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6394 01:23:53.184555 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.<30>[ 11.490778] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6395 01:23:53.194810 mount[…- POSI<3>[ 11.491611] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6396 01:23:53.197936 X Message Queue File System.
6397 01:23:53.210873 <3>[ 11.518254] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6398 01:23:53.219028 <3>[ 11.524241] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6399 01:23:53.227470 <3>[ 11.530770] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6400 01:23:53.235390 <3>[ 11.536320] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6401 01:23:53.242910 <30>[ 11.537367] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6402 01:23:53.250207 <3>[ 11.542253] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6403 01:23:53.259873 [[0;32m OK [<3>[ 11.548426] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6404 01:23:53.266668 0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6405 01:23:53.287835 [[0;32m OK [0m] Started [0;1;39msystemd-jou<30>[ 11.594795] systemd[1]: Started systemd-journald.service - Journal Service.
6406 01:23:53.290780 rnald.service[0m - Journal Service.
6407 01:23:53.316413 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6408 01:23:53.342043 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6409 01:23:53.365620 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6410 01:23:53.391680 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6411 01:23:53.411125 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6412 01:23:53.431253 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6413 01:23:53.450939 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6414 01:23:53.470011 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6415 01:23:53.494382 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6416 01:23:53.514555 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6417 01:23:53.535214 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6418 01:23:53.588885 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6419 01:23:53.608601 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6420 01:23:53.633106 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6421 01:23:53.663782 <4>[ 11.965393] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6422 01:23:53.670321 <3>[ 11.965404] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6423 01:23:53.680290 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6424 01:23:53.703417 <46>[ 12.009994] systemd-journald[323]: Received client request to flush runtime journal.
6425 01:23:53.710102 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6426 01:23:53.738307 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6427 01:23:54.028756 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6428 01:23:54.053297 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6429 01:23:54.072730 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6430 01:23:54.093449 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6431 01:23:54.497721 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6432 01:23:54.835929 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6433 01:23:54.896122 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6434 01:23:55.175095 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6435 01:23:55.269267 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6436 01:23:55.288707 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6437 01:23:55.307883 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6438 01:23:55.353233 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6439 01:23:55.377170 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6440 01:23:55.640955 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6441 01:23:55.708468 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6442 01:23:55.754801 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6443 01:23:55.993485 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6444 01:23:56.007344 <4>[ 14.315790] power_supply_show_property: 4 callbacks suppressed
6445 01:23:56.015527 <3>[ 14.315803] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6446 01:23:56.022717 <3>[ 14.316133] power_supply sbs-12-000b: driver failed to report `health' property: -6
6447 01:23:56.035269 [[0;32m OK [0m] Reached targ<3>[ 14.323539] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6448 01:23:56.047859 et [0;1;39mblue<3>[ 14.329052] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6449 01:23:56.055736 tooth.target[0m<3>[ 14.334624] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6450 01:23:56.065786 - Bluetooth Sup<3>[ 14.340740] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6451 01:23:56.066216 port.
6452 01:23:56.075522 <3>[ 14.346751] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6453 01:23:56.082095 <3>[ 14.352498] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6454 01:23:56.089070 <3>[ 14.358375] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6455 01:23:56.098501 <3>[ 14.363916] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6456 01:23:56.135949 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6457 01:23:56.153612 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6458 01:23:56.193347 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6459 01:23:56.260143 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6460 01:23:56.282238 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6461 01:23:56.306542 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6462 01:23:56.379707 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6463 01:23:56.497602 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6464 01:23:56.519545 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6465 01:23:56.542631 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6466 01:23:56.574294 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6467 01:23:56.595169 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6468 01:23:56.621320 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6469 01:23:56.644954 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6470 01:23:56.674390 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6471 01:23:56.698186 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6472 01:23:56.719287 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6473 01:23:56.739111 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6474 01:23:56.764478 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6475 01:23:56.780193 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6476 01:23:56.803944 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6477 01:23:56.823514 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6478 01:23:56.840302 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6479 01:23:56.859940 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6480 01:23:56.902242 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6481 01:23:56.920399 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6482 01:23:56.939983 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6483 01:23:56.959340 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6484 01:23:56.976345 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6485 01:23:56.992774 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6486 01:23:57.044208 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6487 01:23:57.072687 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6488 01:23:57.102073 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6489 01:23:57.157845 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6490 01:23:57.180641 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6491 01:23:57.204375 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6492 01:23:57.223547 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6493 01:23:57.319218 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6494 01:23:57.368400 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6495 01:23:57.387141 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6496 01:23:57.410828 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6497 01:23:57.507823 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6498 01:23:57.542788 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6499 01:23:57.565070 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6500 01:23:57.585504 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6501 01:23:57.605334 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6502 01:23:57.651647 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6503 01:23:57.716659 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6504 01:23:57.820539
6505 01:23:57.824160 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6506 01:23:57.824611
6507 01:23:57.827567 debian-bookworm-arm64 login: root (automatic login)
6508 01:23:57.828031
6509 01:23:58.171307 Linux debian-bookworm-arm64 6.1.92-cip22-rt12 #1 SMP PREEMPT Wed Jun 5 00:22:12 UTC 2024 aarch64
6510 01:23:58.171521
6511 01:23:58.178107 The programs included with the Debian GNU/Linux system are free software;
6512 01:23:58.185104 the exact distribution terms for each program are described in the
6513 01:23:58.188375 individual files in /usr/share/doc/*/copyright.
6514 01:23:58.188541
6515 01:23:58.194691 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6516 01:23:58.197950 permitted by applicable law.
6517 01:23:59.329748 Matched prompt #10: / #
6519 01:23:59.330237 Setting prompt string to ['/ #']
6520 01:23:59.330411 end: 2.2.5.1 login-action (duration 00:00:18) [common]
6522 01:23:59.330792 end: 2.2.5 auto-login-action (duration 00:00:18) [common]
6523 01:23:59.330959 start: 2.2.6 expect-shell-connection (timeout 00:03:59) [common]
6524 01:23:59.331094 Setting prompt string to ['/ #']
6525 01:23:59.331213 Forcing a shell prompt, looking for ['/ #']
6527 01:23:59.381652 / #
6528 01:23:59.382280 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6529 01:23:59.382663 Waiting using forced prompt support (timeout 00:02:30)
6530 01:23:59.387780
6531 01:23:59.388651 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6532 01:23:59.389128 start: 2.2.7 export-device-env (timeout 00:03:59) [common]
6534 01:23:59.490318 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14173539/extract-nfsrootfs-d319lfd8'
6535 01:23:59.496079 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14173539/extract-nfsrootfs-d319lfd8'
6537 01:23:59.597979 / # export NFS_SERVER_IP='192.168.201.1'
6538 01:23:59.604564 export NFS_SERVER_IP='192.168.201.1'
6539 01:23:59.605517 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6540 01:23:59.606059 end: 2.2 depthcharge-retry (duration 00:01:01) [common]
6541 01:23:59.606565 end: 2 depthcharge-action (duration 00:01:01) [common]
6542 01:23:59.607060 start: 3 lava-test-retry (timeout 00:08:16) [common]
6543 01:23:59.607599 start: 3.1 lava-test-shell (timeout 00:08:16) [common]
6544 01:23:59.608047 Using namespace: common
6546 01:23:59.709261 / # #
6547 01:23:59.709974 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6548 01:23:59.715288 #
6549 01:23:59.716250 Using /lava-14173539
6551 01:23:59.817462 / # export SHELL=/bin/bash
6552 01:23:59.824078 export SHELL=/bin/bash
6554 01:23:59.925752 / # . /lava-14173539/environment
6555 01:23:59.931655 . /lava-14173539/environment
6557 01:24:00.039668 / # /lava-14173539/bin/lava-test-runner /lava-14173539/0
6558 01:24:00.040301 Test shell timeout: 10s (minimum of the action and connection timeout)
6559 01:24:00.045744 /lava-14173539/bin/lava-test-runner /lava-14173539/0
6560 01:24:00.301898 + export TESTRUN_ID=0_timesync-off
6561 01:24:00.305804 + TESTRUN_ID=0_timesync-off
6562 01:24:00.308554 + cd /lava-14173539/0/tests/0_timesync-off
6563 01:24:00.311712 ++ cat uuid
6564 01:24:00.315373 + UUID=14173539_1.6.2.3.1
6565 01:24:00.315882 + set +x
6566 01:24:00.321971 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14173539_1.6.2.3.1>
6567 01:24:00.322696 Received signal: <STARTRUN> 0_timesync-off 14173539_1.6.2.3.1
6568 01:24:00.323132 Starting test lava.0_timesync-off (14173539_1.6.2.3.1)
6569 01:24:00.323676 Skipping test definition patterns.
6570 01:24:00.325314 + systemctl stop systemd-timesyncd
6571 01:24:00.394592 + set +x
6572 01:24:00.397759 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14173539_1.6.2.3.1>
6573 01:24:00.398444 Received signal: <ENDRUN> 0_timesync-off 14173539_1.6.2.3.1
6574 01:24:00.398906 Ending use of test pattern.
6575 01:24:00.399270 Ending test lava.0_timesync-off (14173539_1.6.2.3.1), duration 0.08
6577 01:24:00.485952 + export TESTRUN_ID=1_kselftest-tpm2
6578 01:24:00.489474 + TESTRUN_ID=1_kselftest-tpm2
6579 01:24:00.495902 + cd /lava-14173539/0/tests/1_kselftest-tpm2
6580 01:24:00.496376 ++ cat uuid
6581 01:24:00.504727 + UUID=14173539_1.6.2.3.5
6582 01:24:00.505234 + set +x
6583 01:24:00.511190 <LAVA_SIGNAL_STARTRUN 1_kselftest-tpm2 14173539_1.6.2.3.5>
6584 01:24:00.512034 Received signal: <STARTRUN> 1_kselftest-tpm2 14173539_1.6.2.3.5
6585 01:24:00.512412 Starting test lava.1_kselftest-tpm2 (14173539_1.6.2.3.5)
6586 01:24:00.512881 Skipping test definition patterns.
6587 01:24:00.514967 + cd ./automated/linux/kselftest/
6588 01:24:00.544279 + ./kselftest.sh -c tpm2 -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-168-g96fd74998d4ca/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip-gitlab -e '' -p /opt/kselftests/mainline/ -n 1 -i 1
6589 01:24:00.603149 INFO: install_deps skipped
6590 01:24:01.106747 --2024-06-05 01:23:04-- http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-168-g96fd74998d4ca/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
6591 01:24:01.112682 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6592 01:24:01.242575 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6593 01:24:01.373396 HTTP request sent, awaiting response... 200 OK
6594 01:24:01.376745 Length: 1648104 (1.6M) [application/octet-stream]
6595 01:24:01.379737 Saving to: 'kselftest_armhf.tar.gz'
6596 01:24:01.380158
6597 01:24:01.380557
6598 01:24:01.631351 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6599 01:24:01.887839 kselftest_armhf.tar 2%[ ] 46.39K 178KB/s
6600 01:24:02.192208 kselftest_armhf.tar 13%[=> ] 214.67K 413KB/s
6601 01:24:02.323367 kselftest_armhf.tar 51%[=========> ] 821.30K 992KB/s
6602 01:24:02.329732 kselftest_armhf.tar 100%[===================>] 1.57M 1.64MB/s in 1.0s
6603 01:24:02.330181
6604 01:24:02.474390 2024-06-05 01:23:05 (1.64 MB/s) - 'kselftest_armhf.tar.gz' saved [1648104/1648104]
6605 01:24:02.474656
6606 01:24:06.794807 skiplist:
6607 01:24:06.798119 ========================================
6608 01:24:06.801106 ========================================
6609 01:24:06.844877 tpm2:test_smoke.sh
6610 01:24:06.848066 tpm2:test_space.sh
6611 01:24:06.865437 ============== Tests to run ===============
6612 01:24:06.865532 tpm2:test_smoke.sh
6613 01:24:06.868696 tpm2:test_space.sh
6614 01:24:06.872231 ===========End Tests to run ===============
6615 01:24:06.875226 shardfile-tpm2 pass
6616 01:24:06.987904 <12>[ 25.301231] kselftest: Running tests in tpm2
6617 01:24:06.996642 TAP version 13
6618 01:24:07.011568 1..2
6619 01:24:07.045378 # selftests: tpm2: test_smoke.sh
6620 01:24:08.967236 # test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite) ... ERROR
6621 01:24:08.973572 # test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp) ... ERROR
6622 01:24:08.979792 # Exception ignored in: <function Client.__del__ at 0xffffa749ccc0>
6623 01:24:08.983520 # Traceback (most recent call last):
6624 01:24:08.993091 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6625 01:24:08.993518 # if self.tpm:
6626 01:24:08.996505 # ^^^^^^^^
6627 01:24:09.000290 # AttributeError: 'Client' object has no attribute 'tpm'
6628 01:24:09.006355 # test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth) ... ERROR
6629 01:24:09.013150 # Exception ignored in: <function Client.__del__ at 0xffffa749ccc0>
6630 01:24:09.016406 # Traceback (most recent call last):
6631 01:24:09.026505 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6632 01:24:09.026624 # if self.tpm:
6633 01:24:09.029603 # ^^^^^^^^
6634 01:24:09.032833 # AttributeError: 'Client' object has no attribute 'tpm'
6635 01:24:09.039490 # test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy) ... ERROR
6636 01:24:09.046305 # Exception ignored in: <function Client.__del__ at 0xffffa749ccc0>
6637 01:24:09.049491 # Traceback (most recent call last):
6638 01:24:09.059711 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6639 01:24:09.062876 # if self.tpm:
6640 01:24:09.062958 # ^^^^^^^^
6641 01:24:09.069581 # AttributeError: 'Client' object has no attribute 'tpm'
6642 01:24:09.076286 # test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth) ... ERROR
6643 01:24:09.082886 # Exception ignored in: <function Client.__del__ at 0xffffa749ccc0>
6644 01:24:09.086015 # Traceback (most recent call last):
6645 01:24:09.096093 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6646 01:24:09.096194 # if self.tpm:
6647 01:24:09.099537 # ^^^^^^^^
6648 01:24:09.102783 # AttributeError: 'Client' object has no attribute 'tpm'
6649 01:24:09.109817 # test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds) ... ERROR
6650 01:24:09.116306 # Exception ignored in: <function Client.__del__ at 0xffffa749ccc0>
6651 01:24:09.119498 # Traceback (most recent call last):
6652 01:24:09.129489 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6653 01:24:09.132969 # if self.tpm:
6654 01:24:09.133059 # ^^^^^^^^
6655 01:24:09.140459 # AttributeError: 'Client' object has no attribute 'tpm'
6656 01:24:09.147136 # test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd) ... ERROR
6657 01:24:09.150165 # Exception ignored in: <function Client.__del__ at 0xffffa749ccc0>
6658 01:24:09.153431 # Traceback (most recent call last):
6659 01:24:09.163345 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6660 01:24:09.166344 # if self.tpm:
6661 01:24:09.166437 # ^^^^^^^^
6662 01:24:09.172971 # AttributeError: 'Client' object has no attribute 'tpm'
6663 01:24:09.179787 # test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth) ... ERROR
6664 01:24:09.187144 # Exception ignored in: <function Client.__del__ at 0xffffa749ccc0>
6665 01:24:09.190338 # Traceback (most recent call last):
6666 01:24:09.199997 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6667 01:24:09.203491 # if self.tpm:
6668 01:24:09.203683 # ^^^^^^^^
6669 01:24:09.210552 # AttributeError: 'Client' object has no attribute 'tpm'
6670 01:24:09.217193 # test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy) ... ERROR
6671 01:24:09.223714 # Exception ignored in: <function Client.__del__ at 0xffffa749ccc0>
6672 01:24:09.226959 # Traceback (most recent call last):
6673 01:24:09.236784 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6674 01:24:09.240229 # if self.tpm:
6675 01:24:09.240751 # ^^^^^^^^
6676 01:24:09.247275 # AttributeError: 'Client' object has no attribute 'tpm'
6677 01:24:09.247888 #
6678 01:24:09.253446 # ======================================================================
6679 01:24:09.260372 # ERROR: test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite)
6680 01:24:09.266815 # ----------------------------------------------------------------------
6681 01:24:09.269862 # Traceback (most recent call last):
6682 01:24:09.279951 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 16, in setUp
6683 01:24:09.286996 # self.root_key = self.client.create_root_key()
6684 01:24:09.290065 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6685 01:24:09.299815 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6686 01:24:09.306726 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6687 01:24:09.310107 # ^^^^^^^^^^^^^^^^^^
6688 01:24:09.320023 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6689 01:24:09.323296 # raise ProtocolError(cc, rc)
6690 01:24:09.330675 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6691 01:24:09.331194 #
6692 01:24:09.336783 # ======================================================================
6693 01:24:09.343349 # ERROR: test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp)
6694 01:24:09.350335 # ----------------------------------------------------------------------
6695 01:24:09.353644 # Traceback (most recent call last):
6696 01:24:09.363631 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6697 01:24:09.366861 # self.client = tpm2.Client()
6698 01:24:09.372284 # ^^^^^^^^^^^^^
6699 01:24:09.380007 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6700 01:24:09.383226 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6701 01:24:09.389511 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6702 01:24:09.393159 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6703 01:24:09.393596 #
6704 01:24:09.400014 # ======================================================================
6705 01:24:09.406165 # ERROR: test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth)
6706 01:24:09.412998 # ----------------------------------------------------------------------
6707 01:24:09.416162 # Traceback (most recent call last):
6708 01:24:09.426548 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6709 01:24:09.429243 # self.client = tpm2.Client()
6710 01:24:09.432554 # ^^^^^^^^^^^^^
6711 01:24:09.442817 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6712 01:24:09.446120 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6713 01:24:09.453069 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6714 01:24:09.459145 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6715 01:24:09.459246 #
6716 01:24:09.465865 # ======================================================================
6717 01:24:09.472607 # ERROR: test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy)
6718 01:24:09.479163 # ----------------------------------------------------------------------
6719 01:24:09.482481 # Traceback (most recent call last):
6720 01:24:09.492752 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6721 01:24:09.493027 # self.client = tpm2.Client()
6722 01:24:09.496151 # ^^^^^^^^^^^^^
6723 01:24:09.506324 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6724 01:24:09.512828 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6725 01:24:09.516276 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6726 01:24:09.523472 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6727 01:24:09.523733 #
6728 01:24:09.529788 # ======================================================================
6729 01:24:09.536426 # ERROR: test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth)
6730 01:24:09.543169 # ----------------------------------------------------------------------
6731 01:24:09.546472 # Traceback (most recent call last):
6732 01:24:09.556451 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6733 01:24:09.559727 # self.client = tpm2.Client()
6734 01:24:09.563027 # ^^^^^^^^^^^^^
6735 01:24:09.573167 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6736 01:24:09.579452 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6737 01:24:09.582899 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6738 01:24:09.590421 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6739 01:24:09.590966 #
6740 01:24:09.596938 # ======================================================================
6741 01:24:09.603115 # ERROR: test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds)
6742 01:24:09.610086 # ----------------------------------------------------------------------
6743 01:24:09.612965 # Traceback (most recent call last):
6744 01:24:09.622920 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6745 01:24:09.626235 # self.client = tpm2.Client()
6746 01:24:09.629659 # ^^^^^^^^^^^^^
6747 01:24:09.639801 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6748 01:24:09.642891 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6749 01:24:09.649613 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6750 01:24:09.652959 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6751 01:24:09.653208 #
6752 01:24:09.659829 # ======================================================================
6753 01:24:09.665977 # ERROR: test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd)
6754 01:24:09.672681 # ----------------------------------------------------------------------
6755 01:24:09.675892 # Traceback (most recent call last):
6756 01:24:09.686335 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6757 01:24:09.689416 # self.client = tpm2.Client()
6758 01:24:09.692597 # ^^^^^^^^^^^^^
6759 01:24:09.702883 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6760 01:24:09.709378 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6761 01:24:09.712762 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6762 01:24:09.719511 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6763 01:24:09.719613 #
6764 01:24:09.725926 # ======================================================================
6765 01:24:09.732895 # ERROR: test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth)
6766 01:24:09.739598 # ----------------------------------------------------------------------
6767 01:24:09.742794 # Traceback (most recent call last):
6768 01:24:09.752895 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6769 01:24:09.756260 # self.client = tpm2.Client()
6770 01:24:09.759822 # ^^^^^^^^^^^^^
6771 01:24:09.770142 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6772 01:24:09.774309 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6773 01:24:09.780520 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6774 01:24:09.784126 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6775 01:24:09.784680 #
6776 01:24:09.793625 # ======================================================================
6777 01:24:09.800468 # ERROR: test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy)
6778 01:24:09.808078 # ----------------------------------------------------------------------
6779 01:24:09.808603 # Traceback (most recent call last):
6780 01:24:09.820137 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6781 01:24:09.823566 # self.client = tpm2.Client()
6782 01:24:09.826583 # ^^^^^^^^^^^^^
6783 01:24:09.836726 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6784 01:24:09.840326 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6785 01:24:09.845635 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6786 01:24:09.849586 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6787 01:24:09.853074 #
6788 01:24:09.859658 # ----------------------------------------------------------------------
6789 01:24:09.860181 # Ran 9 tests in 0.059s
6790 01:24:09.860519 #
6791 01:24:09.862938 # FAILED (errors=9)
6792 01:24:09.866271 # test_async (tpm2_tests.AsyncTest.test_async) ... ok
6793 01:24:09.876188 # test_flush_invalid_context (tpm2_tests.AsyncTest.test_flush_invalid_context) ... ok
6794 01:24:09.876713 #
6795 01:24:09.882919 # ----------------------------------------------------------------------
6796 01:24:09.883505 # Ran 2 tests in 0.033s
6797 01:24:09.883961 #
6798 01:24:09.886190 # OK
6799 01:24:09.886630 ok 1 selftests: tpm2: test_smoke.sh
6800 01:24:09.889218 # selftests: tpm2: test_space.sh
6801 01:24:09.895803 # test_flush_context (tpm2_tests.SpaceTest.test_flush_context) ... ERROR
6802 01:24:09.902891 # test_get_handles (tpm2_tests.SpaceTest.test_get_handles) ... ERROR
6803 01:24:09.909410 # test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc) ... ERROR
6804 01:24:09.915713 # test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces) ... ERROR
6805 01:24:09.916232 #
6806 01:24:09.923057 # ======================================================================
6807 01:24:09.929275 # ERROR: test_flush_context (tpm2_tests.SpaceTest.test_flush_context)
6808 01:24:09.935846 # ----------------------------------------------------------------------
6809 01:24:09.939561 # Traceback (most recent call last):
6810 01:24:09.949052 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 261, in test_flush_context
6811 01:24:09.952386 # root1 = space1.create_root_key()
6812 01:24:09.955781 # ^^^^^^^^^^^^^^^^^^^^^^^^
6813 01:24:09.965860 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6814 01:24:09.972346 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6815 01:24:09.975972 # ^^^^^^^^^^^^^^^^^^
6816 01:24:09.985917 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6817 01:24:09.989268 # raise ProtocolError(cc, rc)
6818 01:24:09.995493 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6819 01:24:09.995939 #
6820 01:24:10.002173 # ======================================================================
6821 01:24:10.009025 # ERROR: test_get_handles (tpm2_tests.SpaceTest.test_get_handles)
6822 01:24:10.015778 # ----------------------------------------------------------------------
6823 01:24:10.018740 # Traceback (most recent call last):
6824 01:24:10.028808 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 271, in test_get_handles
6825 01:24:10.032056 # space1.create_root_key()
6826 01:24:10.042065 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6827 01:24:10.049144 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6828 01:24:10.052127 # ^^^^^^^^^^^^^^^^^^
6829 01:24:10.062161 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6830 01:24:10.065988 # raise ProtocolError(cc, rc)
6831 01:24:10.072431 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6832 01:24:10.072969 #
6833 01:24:10.078861 # ======================================================================
6834 01:24:10.085450 # ERROR: test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc)
6835 01:24:10.092479 # ----------------------------------------------------------------------
6836 01:24:10.095624 # Traceback (most recent call last):
6837 01:24:10.105515 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 290, in test_invalid_cc
6838 01:24:10.108733 # root1 = space1.create_root_key()
6839 01:24:10.112784 # ^^^^^^^^^^^^^^^^^^^^^^^^
6840 01:24:10.122658 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6841 01:24:10.128782 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6842 01:24:10.131895 # ^^^^^^^^^^^^^^^^^^
6843 01:24:10.141934 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6844 01:24:10.145080 # raise ProtocolError(cc, rc)
6845 01:24:10.152302 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6846 01:24:10.152748 #
6847 01:24:10.158783 # ======================================================================
6848 01:24:10.165408 # ERROR: test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces)
6849 01:24:10.172322 # ----------------------------------------------------------------------
6850 01:24:10.175278 # Traceback (most recent call last):
6851 01:24:10.188834 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 247, in test_make_two_spaces
6852 01:24:10.192036 # root1 = space1.create_root_key()
6853 01:24:10.195548 # ^^^^^^^^^^^^^^^^^^^^^^^^
6854 01:24:10.206086 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6855 01:24:10.209019 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6856 01:24:10.215660 # ^^^^^^^^^^^^^^^^^^
6857 01:24:10.225713 # File "/lava-14173539/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6858 01:24:10.229084 # raise ProtocolError(cc, rc)
6859 01:24:10.235510 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6860 01:24:10.235959 #
6861 01:24:10.242751 # ----------------------------------------------------------------------
6862 01:24:10.243197 # Ran 4 tests in 0.111s
6863 01:24:10.243695 #
6864 01:24:10.246038 # FAILED (errors=4)
6865 01:24:10.248773 not ok 2 selftests: tpm2: test_space.sh # exit=1
6866 01:24:10.633866 tpm2_test_smoke_sh pass
6867 01:24:10.637001 tpm2_test_space_sh fail
6868 01:24:10.720033 + ../../utils/send-to-lava.sh ./output/result.txt
6869 01:24:10.798942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-tpm2 RESULT=pass>
6870 01:24:10.799818 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-tpm2 RESULT=pass
6872 01:24:10.846491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass>
6873 01:24:10.846893 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass
6875 01:24:10.893651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_space_sh RESULT=fail>
6876 01:24:10.894358 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_space_sh RESULT=fail
6878 01:24:10.896958 + set +x
6879 01:24:10.900524 <LAVA_SIGNAL_ENDRUN 1_kselftest-tpm2 14173539_1.6.2.3.5>
6880 01:24:10.901369 Received signal: <ENDRUN> 1_kselftest-tpm2 14173539_1.6.2.3.5
6881 01:24:10.901786 Ending use of test pattern.
6882 01:24:10.902191 Ending test lava.1_kselftest-tpm2 (14173539_1.6.2.3.5), duration 10.39
6884 01:24:10.904044 <LAVA_TEST_RUNNER EXIT>
6885 01:24:10.904703 ok: lava_test_shell seems to have completed
6886 01:24:10.905338 shardfile-tpm2: pass
tpm2_test_smoke_sh: pass
tpm2_test_space_sh: fail
6887 01:24:10.905831 end: 3.1 lava-test-shell (duration 00:00:11) [common]
6888 01:24:10.906332 end: 3 lava-test-retry (duration 00:00:11) [common]
6889 01:24:10.906883 start: 4 finalize (timeout 00:08:05) [common]
6890 01:24:10.907476 start: 4.1 power-off (timeout 00:00:30) [common]
6891 01:24:10.908339 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
6892 01:24:12.043129 >> Command sent successfully.
6893 01:24:12.053164 Returned 0 in 1 seconds
6894 01:24:12.154633 end: 4.1 power-off (duration 00:00:01) [common]
6896 01:24:12.156212 start: 4.2 read-feedback (timeout 00:08:04) [common]
6897 01:24:12.157537 Listened to connection for namespace 'common' for up to 1s
6898 01:24:13.158255 Finalising connection for namespace 'common'
6899 01:24:13.159005 Disconnecting from shell: Finalise
6900 01:24:13.159548 / #
6901 01:24:13.260678 end: 4.2 read-feedback (duration 00:00:01) [common]
6902 01:24:13.261415 end: 4 finalize (duration 00:00:02) [common]
6903 01:24:13.262081 Cleaning after the job
6904 01:24:13.262624 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/ramdisk
6905 01:24:13.271797 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/kernel
6906 01:24:13.307503 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/dtb
6907 01:24:13.307935 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/nfsrootfs
6908 01:24:13.381984 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14173539/tftp-deploy-moys6zp8/modules
6909 01:24:13.388007 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14173539
6910 01:24:13.990635 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14173539
6911 01:24:13.990834 Job finished correctly