Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 34
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 87
1 00:54:53.398639 lava-dispatcher, installed at version: 2024.03
2 00:54:53.398862 start: 0 validate
3 00:54:53.398983 Start time: 2024-06-16 00:54:53.398974+00:00 (UTC)
4 00:54:53.399112 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:54:53.399248 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 00:54:53.649364 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:54:53.649519 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 00:55:09.902515 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:55:09.902690 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 00:55:10.153552 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:55:10.153776 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 00:55:13.901516 validate duration: 20.50
14 00:55:13.901846 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 00:55:13.901951 start: 1.1 download-retry (timeout 00:10:00) [common]
16 00:55:13.902039 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 00:55:13.902183 Not decompressing ramdisk as can be used compressed.
18 00:55:13.902272 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 00:55:13.902339 saving as /var/lib/lava/dispatcher/tmp/14368598/tftp-deploy-xkhdqcna/ramdisk/rootfs.cpio.gz
20 00:55:13.902403 total size: 8181887 (7 MB)
21 00:55:14.150758 progress 0 % (0 MB)
22 00:55:14.153780 progress 5 % (0 MB)
23 00:55:14.156067 progress 10 % (0 MB)
24 00:55:14.158673 progress 15 % (1 MB)
25 00:55:14.161098 progress 20 % (1 MB)
26 00:55:14.163704 progress 25 % (1 MB)
27 00:55:14.166155 progress 30 % (2 MB)
28 00:55:14.168539 progress 35 % (2 MB)
29 00:55:14.170788 progress 40 % (3 MB)
30 00:55:14.173441 progress 45 % (3 MB)
31 00:55:14.175907 progress 50 % (3 MB)
32 00:55:14.178580 progress 55 % (4 MB)
33 00:55:14.180779 progress 60 % (4 MB)
34 00:55:14.183341 progress 65 % (5 MB)
35 00:55:14.185593 progress 70 % (5 MB)
36 00:55:14.188177 progress 75 % (5 MB)
37 00:55:14.190498 progress 80 % (6 MB)
38 00:55:14.192885 progress 85 % (6 MB)
39 00:55:14.195286 progress 90 % (7 MB)
40 00:55:14.197660 progress 95 % (7 MB)
41 00:55:14.199875 progress 100 % (7 MB)
42 00:55:14.200089 7 MB downloaded in 0.30 s (26.21 MB/s)
43 00:55:14.200248 end: 1.1.1 http-download (duration 00:00:00) [common]
45 00:55:14.200478 end: 1.1 download-retry (duration 00:00:00) [common]
46 00:55:14.200562 start: 1.2 download-retry (timeout 00:10:00) [common]
47 00:55:14.200641 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 00:55:14.200782 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 00:55:14.200846 saving as /var/lib/lava/dispatcher/tmp/14368598/tftp-deploy-xkhdqcna/kernel/Image
50 00:55:14.200901 total size: 54813184 (52 MB)
51 00:55:14.200957 No compression specified
52 00:55:14.202141 progress 0 % (0 MB)
53 00:55:14.216499 progress 5 % (2 MB)
54 00:55:14.230696 progress 10 % (5 MB)
55 00:55:14.244566 progress 15 % (7 MB)
56 00:55:14.258699 progress 20 % (10 MB)
57 00:55:14.272833 progress 25 % (13 MB)
58 00:55:14.286780 progress 30 % (15 MB)
59 00:55:14.300918 progress 35 % (18 MB)
60 00:55:14.315393 progress 40 % (20 MB)
61 00:55:14.330212 progress 45 % (23 MB)
62 00:55:14.345153 progress 50 % (26 MB)
63 00:55:14.360210 progress 55 % (28 MB)
64 00:55:14.374808 progress 60 % (31 MB)
65 00:55:14.389981 progress 65 % (34 MB)
66 00:55:14.404893 progress 70 % (36 MB)
67 00:55:14.420290 progress 75 % (39 MB)
68 00:55:14.436176 progress 80 % (41 MB)
69 00:55:14.452768 progress 85 % (44 MB)
70 00:55:14.468286 progress 90 % (47 MB)
71 00:55:14.483618 progress 95 % (49 MB)
72 00:55:14.498210 progress 100 % (52 MB)
73 00:55:14.498560 52 MB downloaded in 0.30 s (175.62 MB/s)
74 00:55:14.498728 end: 1.2.1 http-download (duration 00:00:00) [common]
76 00:55:14.498945 end: 1.2 download-retry (duration 00:00:00) [common]
77 00:55:14.499030 start: 1.3 download-retry (timeout 00:09:59) [common]
78 00:55:14.499109 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 00:55:14.499250 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 00:55:14.499355 saving as /var/lib/lava/dispatcher/tmp/14368598/tftp-deploy-xkhdqcna/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 00:55:14.499418 total size: 57695 (0 MB)
82 00:55:14.499474 No compression specified
83 00:55:14.500626 progress 56 % (0 MB)
84 00:55:14.500895 progress 100 % (0 MB)
85 00:55:14.501096 0 MB downloaded in 0.00 s (32.83 MB/s)
86 00:55:14.501221 end: 1.3.1 http-download (duration 00:00:00) [common]
88 00:55:14.501433 end: 1.3 download-retry (duration 00:00:00) [common]
89 00:55:14.501513 start: 1.4 download-retry (timeout 00:09:59) [common]
90 00:55:14.501614 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 00:55:14.501732 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 00:55:14.501796 saving as /var/lib/lava/dispatcher/tmp/14368598/tftp-deploy-xkhdqcna/modules/modules.tar
93 00:55:14.501852 total size: 8617404 (8 MB)
94 00:55:14.501909 Using unxz to decompress xz
95 00:55:14.503699 progress 0 % (0 MB)
96 00:55:14.524564 progress 5 % (0 MB)
97 00:55:14.553412 progress 10 % (0 MB)
98 00:55:14.582835 progress 15 % (1 MB)
99 00:55:14.608448 progress 20 % (1 MB)
100 00:55:14.633653 progress 25 % (2 MB)
101 00:55:14.659020 progress 30 % (2 MB)
102 00:55:14.687699 progress 35 % (2 MB)
103 00:55:14.714060 progress 40 % (3 MB)
104 00:55:14.738546 progress 45 % (3 MB)
105 00:55:14.764923 progress 50 % (4 MB)
106 00:55:14.792048 progress 55 % (4 MB)
107 00:55:14.818666 progress 60 % (4 MB)
108 00:55:14.848766 progress 65 % (5 MB)
109 00:55:14.880529 progress 70 % (5 MB)
110 00:55:14.907888 progress 75 % (6 MB)
111 00:55:14.935848 progress 80 % (6 MB)
112 00:55:14.961591 progress 85 % (7 MB)
113 00:55:14.988149 progress 90 % (7 MB)
114 00:55:15.014925 progress 95 % (7 MB)
115 00:55:15.040735 progress 100 % (8 MB)
116 00:55:15.046778 8 MB downloaded in 0.54 s (15.08 MB/s)
117 00:55:15.047030 end: 1.4.1 http-download (duration 00:00:01) [common]
119 00:55:15.047401 end: 1.4 download-retry (duration 00:00:01) [common]
120 00:55:15.047529 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 00:55:15.047656 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 00:55:15.047769 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 00:55:15.047881 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 00:55:15.048115 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz
125 00:55:15.048288 makedir: /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin
126 00:55:15.048430 makedir: /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/tests
127 00:55:15.048564 makedir: /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/results
128 00:55:15.048694 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-add-keys
129 00:55:15.048877 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-add-sources
130 00:55:15.049054 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-background-process-start
131 00:55:15.049231 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-background-process-stop
132 00:55:15.049420 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-common-functions
133 00:55:15.049606 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-echo-ipv4
134 00:55:15.049777 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-install-packages
135 00:55:15.049947 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-installed-packages
136 00:55:15.050123 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-os-build
137 00:55:15.050298 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-probe-channel
138 00:55:15.050474 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-probe-ip
139 00:55:15.050645 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-target-ip
140 00:55:15.050814 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-target-mac
141 00:55:15.050982 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-target-storage
142 00:55:15.051156 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-test-case
143 00:55:15.051332 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-test-event
144 00:55:15.051505 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-test-feedback
145 00:55:15.051682 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-test-raise
146 00:55:15.051854 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-test-reference
147 00:55:15.052022 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-test-runner
148 00:55:15.052192 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-test-set
149 00:55:15.052362 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-test-shell
150 00:55:15.052534 Updating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-install-packages (oe)
151 00:55:15.052744 Updating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/bin/lava-installed-packages (oe)
152 00:55:15.052921 Creating /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/environment
153 00:55:15.053060 LAVA metadata
154 00:55:15.053166 - LAVA_JOB_ID=14368598
155 00:55:15.053268 - LAVA_DISPATCHER_IP=192.168.201.1
156 00:55:15.053413 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 00:55:15.053504 skipped lava-vland-overlay
158 00:55:15.053624 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 00:55:15.053746 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 00:55:15.053839 skipped lava-multinode-overlay
161 00:55:15.053946 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 00:55:15.054062 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 00:55:15.054173 Loading test definitions
164 00:55:15.054296 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 00:55:15.054392 Using /lava-14368598 at stage 0
166 00:55:15.054876 uuid=14368598_1.5.2.3.1 testdef=None
167 00:55:15.054995 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 00:55:15.055116 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 00:55:15.055820 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 00:55:15.056152 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 00:55:15.057074 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 00:55:15.057428 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 00:55:15.058317 runner path: /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/0/tests/0_dmesg test_uuid 14368598_1.5.2.3.1
176 00:55:15.058522 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 00:55:15.058839 Creating lava-test-runner.conf files
179 00:55:15.058927 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14368598/lava-overlay-yditzogz/lava-14368598/0 for stage 0
180 00:55:15.059052 - 0_dmesg
181 00:55:15.059193 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 00:55:15.059319 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 00:55:15.068146 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 00:55:15.068317 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 00:55:15.068438 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 00:55:15.068558 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 00:55:15.068675 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 00:55:15.338874 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
189 00:55:15.339029 start: 1.5.4 extract-modules (timeout 00:09:59) [common]
190 00:55:15.339134 extracting modules file /var/lib/lava/dispatcher/tmp/14368598/tftp-deploy-xkhdqcna/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14368598/extract-overlay-ramdisk-799gqdba/ramdisk
191 00:55:15.605066 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 00:55:15.605224 start: 1.5.5 apply-overlay-tftp (timeout 00:09:58) [common]
193 00:55:15.605305 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368598/compress-overlay-99ukwnm6/overlay-1.5.2.4.tar.gz to ramdisk
194 00:55:15.605369 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368598/compress-overlay-99ukwnm6/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14368598/extract-overlay-ramdisk-799gqdba/ramdisk
195 00:55:15.612514 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 00:55:15.612643 start: 1.5.6 configure-preseed-file (timeout 00:09:58) [common]
197 00:55:15.612728 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 00:55:15.612809 start: 1.5.7 compress-ramdisk (timeout 00:09:58) [common]
199 00:55:15.612889 Building ramdisk /var/lib/lava/dispatcher/tmp/14368598/extract-overlay-ramdisk-799gqdba/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14368598/extract-overlay-ramdisk-799gqdba/ramdisk
200 00:55:15.971703 >> 145187 blocks
201 00:55:18.433536 rename /var/lib/lava/dispatcher/tmp/14368598/extract-overlay-ramdisk-799gqdba/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14368598/tftp-deploy-xkhdqcna/ramdisk/ramdisk.cpio.gz
202 00:55:18.433822 end: 1.5.7 compress-ramdisk (duration 00:00:03) [common]
203 00:55:18.433993 start: 1.5.8 prepare-kernel (timeout 00:09:55) [common]
204 00:55:18.434112 start: 1.5.8.1 prepare-fit (timeout 00:09:55) [common]
205 00:55:18.434275 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14368598/tftp-deploy-xkhdqcna/kernel/Image']
206 00:55:34.306702 Returned 0 in 15 seconds
207 00:55:34.407393 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14368598/tftp-deploy-xkhdqcna/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14368598/tftp-deploy-xkhdqcna/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14368598/tftp-deploy-xkhdqcna/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14368598/tftp-deploy-xkhdqcna/kernel/image.itb
208 00:55:34.881880 output: FIT description: Kernel Image image with one or more FDT blobs
209 00:55:34.882025 output: Created: Sun Jun 16 01:55:34 2024
210 00:55:34.882093 output: Image 0 (kernel-1)
211 00:55:34.882167 output: Description:
212 00:55:34.882228 output: Created: Sun Jun 16 01:55:34 2024
213 00:55:34.882284 output: Type: Kernel Image
214 00:55:34.882347 output: Compression: lzma compressed
215 00:55:34.882442 output: Data Size: 13125045 Bytes = 12817.43 KiB = 12.52 MiB
216 00:55:34.882529 output: Architecture: AArch64
217 00:55:34.882620 output: OS: Linux
218 00:55:34.882708 output: Load Address: 0x00000000
219 00:55:34.882794 output: Entry Point: 0x00000000
220 00:55:34.882886 output: Hash algo: crc32
221 00:55:34.882982 output: Hash value: f6f06660
222 00:55:34.883064 output: Image 1 (fdt-1)
223 00:55:34.883142 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 00:55:34.883210 output: Created: Sun Jun 16 01:55:34 2024
225 00:55:34.883263 output: Type: Flat Device Tree
226 00:55:34.883316 output: Compression: uncompressed
227 00:55:34.883367 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 00:55:34.883418 output: Architecture: AArch64
229 00:55:34.883469 output: Hash algo: crc32
230 00:55:34.883519 output: Hash value: a9713552
231 00:55:34.883568 output: Image 2 (ramdisk-1)
232 00:55:34.883617 output: Description: unavailable
233 00:55:34.883672 output: Created: Sun Jun 16 01:55:34 2024
234 00:55:34.883748 output: Type: RAMDisk Image
235 00:55:34.883800 output: Compression: uncompressed
236 00:55:34.883854 output: Data Size: 21363173 Bytes = 20862.47 KiB = 20.37 MiB
237 00:55:34.883905 output: Architecture: AArch64
238 00:55:34.883955 output: OS: Linux
239 00:55:34.884047 output: Load Address: unavailable
240 00:55:34.884129 output: Entry Point: unavailable
241 00:55:34.884221 output: Hash algo: crc32
242 00:55:34.884299 output: Hash value: 9be3757a
243 00:55:34.884377 output: Default Configuration: 'conf-1'
244 00:55:34.884454 output: Configuration 0 (conf-1)
245 00:55:34.884532 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 00:55:34.884609 output: Kernel: kernel-1
247 00:55:34.884687 output: Init Ramdisk: ramdisk-1
248 00:55:34.884769 output: FDT: fdt-1
249 00:55:34.884846 output: Loadables: kernel-1
250 00:55:34.884923 output:
251 00:55:34.885100 end: 1.5.8.1 prepare-fit (duration 00:00:16) [common]
252 00:55:34.885217 end: 1.5.8 prepare-kernel (duration 00:00:16) [common]
253 00:55:34.885334 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
254 00:55:34.885446 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
255 00:55:34.885557 No LXC device requested
256 00:55:34.885638 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 00:55:34.885717 start: 1.7 deploy-device-env (timeout 00:09:39) [common]
258 00:55:34.885788 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 00:55:34.885849 Checking files for TFTP limit of 4294967296 bytes.
260 00:55:34.886456 end: 1 tftp-deploy (duration 00:00:21) [common]
261 00:55:34.886575 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 00:55:34.886695 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 00:55:34.886866 substitutions:
264 00:55:34.886960 - {DTB}: 14368598/tftp-deploy-xkhdqcna/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 00:55:34.887063 - {INITRD}: 14368598/tftp-deploy-xkhdqcna/ramdisk/ramdisk.cpio.gz
266 00:55:34.887149 - {KERNEL}: 14368598/tftp-deploy-xkhdqcna/kernel/Image
267 00:55:34.887230 - {LAVA_MAC}: None
268 00:55:34.887320 - {PRESEED_CONFIG}: None
269 00:55:34.887402 - {PRESEED_LOCAL}: None
270 00:55:34.887482 - {RAMDISK}: 14368598/tftp-deploy-xkhdqcna/ramdisk/ramdisk.cpio.gz
271 00:55:34.887558 - {ROOT_PART}: None
272 00:55:34.887612 - {ROOT}: None
273 00:55:34.887663 - {SERVER_IP}: 192.168.201.1
274 00:55:34.887715 - {TEE}: None
275 00:55:34.887783 Parsed boot commands:
276 00:55:34.887835 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 00:55:34.888014 Parsed boot commands: tftpboot 192.168.201.1 14368598/tftp-deploy-xkhdqcna/kernel/image.itb 14368598/tftp-deploy-xkhdqcna/kernel/cmdline
278 00:55:34.888126 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 00:55:34.888241 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 00:55:34.888353 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 00:55:34.888473 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 00:55:34.888566 Not connected, no need to disconnect.
283 00:55:34.888672 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 00:55:34.888789 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 00:55:34.888863 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-4'
286 00:55:34.892600 Setting prompt string to ['lava-test: # ']
287 00:55:34.893116 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 00:55:34.893283 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 00:55:34.893453 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 00:55:34.893626 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 00:55:34.893877 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=reboot']
292 00:55:44.050726 >> Command sent successfully.
293 00:55:44.053907 Returned 0 in 9 seconds
294 00:55:44.154283 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
296 00:55:44.154664 end: 2.2.2 reset-device (duration 00:00:09) [common]
297 00:55:44.154789 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
298 00:55:44.154905 Setting prompt string to 'Starting depthcharge on Juniper...'
299 00:55:44.154997 Changing prompt to 'Starting depthcharge on Juniper...'
300 00:55:44.155089 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
301 00:55:44.155599 [Enter `^Ec?' for help]
302 00:55:51.001910 [DL] 00000000 00000000 010701
303 00:55:51.007433
304 00:55:51.007518
305 00:55:51.007583 F0: 102B 0000
306 00:55:51.007642
307 00:55:51.007701 F3: 1006 0033 [0200]
308 00:55:51.010762
309 00:55:51.010844 F3: 4001 00E0 [0200]
310 00:55:51.010908
311 00:55:51.010969 F3: 0000 0000
312 00:55:51.014358
313 00:55:51.014440 V0: 0000 0000 [0001]
314 00:55:51.014505
315 00:55:51.014563 00: 1027 0002
316 00:55:51.014619
317 00:55:51.017488 01: 0000 0000
318 00:55:51.017606
319 00:55:51.017697 BP: 0C00 0251 [0000]
320 00:55:51.017753
321 00:55:51.020258 G0: 1182 0000
322 00:55:51.020334
323 00:55:51.020393 EC: 0004 0000 [0001]
324 00:55:51.020447
325 00:55:51.023741 S7: 0000 0000 [0000]
326 00:55:51.023847
327 00:55:51.027300 CC: 0000 0000 [0001]
328 00:55:51.027382
329 00:55:51.027442 T0: 0000 00DB [000F]
330 00:55:51.027497
331 00:55:51.027549 Jump to BL
332 00:55:51.027600
333 00:55:51.063256
334 00:55:51.063380
335 00:55:51.069668 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
336 00:55:51.072967 ARM64: Exception handlers installed.
337 00:55:51.076386 ARM64: Testing exception
338 00:55:51.080201 ARM64: Done test exception
339 00:55:51.084434 WDT: Last reset was cold boot
340 00:55:51.084532 SPI0(PAD0) initialized at 992727 Hz
341 00:55:51.090711 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
342 00:55:51.090791 Manufacturer: ef
343 00:55:51.097454 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
344 00:55:51.109843 Probing TPM: . done!
345 00:55:51.109919 TPM ready after 0 ms
346 00:55:51.116905 Connected to device vid:did:rid of 1ae0:0028:00
347 00:55:51.123630 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
348 00:55:51.162454 Initialized TPM device CR50 revision 0
349 00:55:51.174430 tlcl_send_startup: Startup return code is 0
350 00:55:51.174555 TPM: setup succeeded
351 00:55:51.182712 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
352 00:55:51.185480 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
353 00:55:51.189103 in-header: 03 19 00 00 08 00 00 00
354 00:55:51.192424 in-data: a2 e0 47 00 13 00 00 00
355 00:55:51.195318 Chrome EC: UHEPI supported
356 00:55:51.202038 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
357 00:55:51.205183 in-header: 03 a1 00 00 08 00 00 00
358 00:55:51.208427 in-data: 84 60 60 10 00 00 00 00
359 00:55:51.208581 Phase 1
360 00:55:51.212246 FMAP: area GBB found @ 3f5000 (12032 bytes)
361 00:55:51.218560 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
362 00:55:51.225257 VB2:vb2_check_recovery() Recovery was requested manually
363 00:55:51.228885 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
364 00:55:51.235306 Recovery requested (1009000e)
365 00:55:51.244260 tlcl_extend: response is 0
366 00:55:51.249392 tlcl_extend: response is 0
367 00:55:51.273939
368 00:55:51.274049
369 00:55:51.280873 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
370 00:55:51.284422 ARM64: Exception handlers installed.
371 00:55:51.287306 ARM64: Testing exception
372 00:55:51.290626 ARM64: Done test exception
373 00:55:51.306442 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x9a6d, sec=0x2008
374 00:55:51.312886 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
375 00:55:51.316048 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
376 00:55:51.324333 [RTC]rtc_get_frequency_meter,134: input=0xf, output=822
377 00:55:51.331618 [RTC]rtc_get_frequency_meter,134: input=0x7, output=697
378 00:55:51.338563 [RTC]rtc_get_frequency_meter,134: input=0xb, output=761
379 00:55:51.345468 [RTC]rtc_get_frequency_meter,134: input=0xd, output=791
380 00:55:51.352024 [RTC]rtc_get_frequency_meter,134: input=0xe, output=807
381 00:55:51.359161 [RTC]rtc_get_frequency_meter,134: input=0xd, output=791
382 00:55:51.365978 [RTC]rtc_get_frequency_meter,134: input=0xe, output=806
383 00:55:51.369372 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x9a6d
384 00:55:51.375894 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
385 00:55:51.379212 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
386 00:55:51.385779 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
387 00:55:51.389043 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
388 00:55:51.392692 in-header: 03 19 00 00 08 00 00 00
389 00:55:51.395853 in-data: a2 e0 47 00 13 00 00 00
390 00:55:51.395936 Chrome EC: UHEPI supported
391 00:55:51.402268 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
392 00:55:51.405507 in-header: 03 a1 00 00 08 00 00 00
393 00:55:51.408842 in-data: 84 60 60 10 00 00 00 00
394 00:55:51.412076 Skip loading cached calibration data
395 00:55:51.418530 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
396 00:55:51.421947 in-header: 03 a1 00 00 08 00 00 00
397 00:55:51.425154 in-data: 84 60 60 10 00 00 00 00
398 00:55:51.432308 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
399 00:55:51.435731 in-header: 03 a1 00 00 08 00 00 00
400 00:55:51.438662 in-data: 84 60 60 10 00 00 00 00
401 00:55:51.441939 ADC[3]: Raw value=214540 ID=1
402 00:55:51.442013 Manufacturer: ef
403 00:55:51.448938 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
404 00:55:51.452043 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
405 00:55:51.455685 CBFS @ 21000 size 3d4000
406 00:55:51.461599 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
407 00:55:51.464939 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
408 00:55:51.468431 CBFS: Found @ offset 3c700 size 44
409 00:55:51.471940 DRAM-K: Full Calibration
410 00:55:51.475317 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
411 00:55:51.478781 CBFS @ 21000 size 3d4000
412 00:55:51.481437 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
413 00:55:51.484839 CBFS: Locating 'fallback/dram'
414 00:55:51.488251 CBFS: Found @ offset 24b00 size 12268
415 00:55:51.517205 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
416 00:55:51.520457 ddr_geometry: 1, config: 0x0
417 00:55:51.523700 header.status = 0x0
418 00:55:51.527223 header.magic = 0x44524d4b (expected: 0x44524d4b)
419 00:55:51.530151 header.version = 0x5 (expected: 0x5)
420 00:55:51.533780 header.size = 0x8f0 (expected: 0x8f0)
421 00:55:51.533860 header.config = 0x0
422 00:55:51.537033 header.flags = 0x0
423 00:55:51.540200 header.checksum = 0x0
424 00:55:51.546875 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
425 00:55:51.550462 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
426 00:55:51.557177 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
427 00:55:51.557263 ddr_geometry:1
428 00:55:51.559978 [EMI] new MDL number = 1
429 00:55:51.560057 dram_cbt_mode_extern: 0
430 00:55:51.563501 dram_cbt_mode [RK0]: 0, [RK1]: 0
431 00:55:51.570415 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
432 00:55:51.570500
433 00:55:51.570562
434 00:55:51.573189 [Bianco] ETT version 0.0.0.1
435 00:55:51.577310 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
436 00:55:51.577393
437 00:55:51.580190 vSetVcoreByFreq with vcore:762500, freq=1600
438 00:55:51.580270
439 00:55:51.583631 [DramcInit]
440 00:55:51.586743 AutoRefreshCKEOff AutoREF OFF
441 00:55:51.586823 DDRPhyPLLSetting-CKEOFF
442 00:55:51.590047 DDRPhyPLLSetting-CKEON
443 00:55:51.590126
444 00:55:51.590186 Enable WDQS
445 00:55:51.594907 [ModeRegInit_LP4] CH0 RK0
446 00:55:51.597758 Write Rank0 MR13 =0x18
447 00:55:51.597838 Write Rank0 MR12 =0x5d
448 00:55:51.600902 Write Rank0 MR1 =0x56
449 00:55:51.604579 Write Rank0 MR2 =0x1a
450 00:55:51.604659 Write Rank0 MR11 =0x0
451 00:55:51.607983 Write Rank0 MR22 =0x38
452 00:55:51.608065 Write Rank0 MR14 =0x5d
453 00:55:51.611162 Write Rank0 MR3 =0x30
454 00:55:51.614294 Write Rank0 MR13 =0x58
455 00:55:51.614387 Write Rank0 MR12 =0x5d
456 00:55:51.617876 Write Rank0 MR1 =0x56
457 00:55:51.620910 Write Rank0 MR2 =0x2d
458 00:55:51.621013 Write Rank0 MR11 =0x23
459 00:55:51.624084 Write Rank0 MR22 =0x34
460 00:55:51.624185 Write Rank0 MR14 =0x10
461 00:55:51.627666 Write Rank0 MR3 =0x30
462 00:55:51.631065 Write Rank0 MR13 =0xd8
463 00:55:51.631166 [ModeRegInit_LP4] CH0 RK1
464 00:55:51.634331 Write Rank1 MR13 =0x18
465 00:55:51.637527 Write Rank1 MR12 =0x5d
466 00:55:51.637643 Write Rank1 MR1 =0x56
467 00:55:51.641175 Write Rank1 MR2 =0x1a
468 00:55:51.641267 Write Rank1 MR11 =0x0
469 00:55:51.644250 Write Rank1 MR22 =0x38
470 00:55:51.647905 Write Rank1 MR14 =0x5d
471 00:55:51.647999 Write Rank1 MR3 =0x30
472 00:55:51.651145 Write Rank1 MR13 =0x58
473 00:55:51.651239 Write Rank1 MR12 =0x5d
474 00:55:51.654479 Write Rank1 MR1 =0x56
475 00:55:51.657541 Write Rank1 MR2 =0x2d
476 00:55:51.657658 Write Rank1 MR11 =0x23
477 00:55:51.661044 Write Rank1 MR22 =0x34
478 00:55:51.664323 Write Rank1 MR14 =0x10
479 00:55:51.664425 Write Rank1 MR3 =0x30
480 00:55:51.667881 Write Rank1 MR13 =0xd8
481 00:55:51.667984 [ModeRegInit_LP4] CH1 RK0
482 00:55:51.670480 Write Rank0 MR13 =0x18
483 00:55:51.674031 Write Rank0 MR12 =0x5d
484 00:55:51.674109 Write Rank0 MR1 =0x56
485 00:55:51.677553 Write Rank0 MR2 =0x1a
486 00:55:51.680957 Write Rank0 MR11 =0x0
487 00:55:51.681050 Write Rank0 MR22 =0x38
488 00:55:51.683975 Write Rank0 MR14 =0x5d
489 00:55:51.684052 Write Rank0 MR3 =0x30
490 00:55:51.687341 Write Rank0 MR13 =0x58
491 00:55:51.690574 Write Rank0 MR12 =0x5d
492 00:55:51.690668 Write Rank0 MR1 =0x56
493 00:55:51.694264 Write Rank0 MR2 =0x2d
494 00:55:51.694361 Write Rank0 MR11 =0x23
495 00:55:51.697055 Write Rank0 MR22 =0x34
496 00:55:51.700500 Write Rank0 MR14 =0x10
497 00:55:51.700577 Write Rank0 MR3 =0x30
498 00:55:51.703906 Write Rank0 MR13 =0xd8
499 00:55:51.707363 [ModeRegInit_LP4] CH1 RK1
500 00:55:51.707462 Write Rank1 MR13 =0x18
501 00:55:51.710360 Write Rank1 MR12 =0x5d
502 00:55:51.710461 Write Rank1 MR1 =0x56
503 00:55:51.713786 Write Rank1 MR2 =0x1a
504 00:55:51.717206 Write Rank1 MR11 =0x0
505 00:55:51.717285 Write Rank1 MR22 =0x38
506 00:55:51.720593 Write Rank1 MR14 =0x5d
507 00:55:51.723875 Write Rank1 MR3 =0x30
508 00:55:51.723988 Write Rank1 MR13 =0x58
509 00:55:51.726827 Write Rank1 MR12 =0x5d
510 00:55:51.726899 Write Rank1 MR1 =0x56
511 00:55:51.730084 Write Rank1 MR2 =0x2d
512 00:55:51.733149 Write Rank1 MR11 =0x23
513 00:55:51.733221 Write Rank1 MR22 =0x34
514 00:55:51.736861 Write Rank1 MR14 =0x10
515 00:55:51.736939 Write Rank1 MR3 =0x30
516 00:55:51.740309 Write Rank1 MR13 =0xd8
517 00:55:51.743006 match AC timing 3
518 00:55:51.753029 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
519 00:55:51.753145 [MiockJmeterHQA]
520 00:55:51.756775 vSetVcoreByFreq with vcore:762500, freq=1600
521 00:55:51.863762
522 00:55:51.863900 MIOCK jitter meter ch=0
523 00:55:51.863999
524 00:55:51.866879 1T = (103-19) = 84 dly cells
525 00:55:51.873717 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 744/100 ps
526 00:55:51.876676 vSetVcoreByFreq with vcore:725000, freq=1200
527 00:55:51.976970
528 00:55:51.977098 MIOCK jitter meter ch=0
529 00:55:51.977239
530 00:55:51.980569 1T = (97-19) = 78 dly cells
531 00:55:51.988182 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
532 00:55:51.988268 vSetVcoreByFreq with vcore:725000, freq=800
533 00:55:52.090432
534 00:55:52.090566 MIOCK jitter meter ch=0
535 00:55:52.090655
536 00:55:52.093446 1T = (97-19) = 78 dly cells
537 00:55:52.100010 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
538 00:55:52.103237 vSetVcoreByFreq with vcore:762500, freq=1600
539 00:55:52.106711 vSetVcoreByFreq with vcore:762500, freq=1600
540 00:55:52.106794
541 00:55:52.106855 K DRVP
542 00:55:52.110147 1. OCD DRVP=0 CALOUT=0
543 00:55:52.113190 1. OCD DRVP=1 CALOUT=0
544 00:55:52.113276 1. OCD DRVP=2 CALOUT=0
545 00:55:52.116875 1. OCD DRVP=3 CALOUT=0
546 00:55:52.119570 1. OCD DRVP=4 CALOUT=0
547 00:55:52.119651 1. OCD DRVP=5 CALOUT=0
548 00:55:52.123178 1. OCD DRVP=6 CALOUT=0
549 00:55:52.126162 1. OCD DRVP=7 CALOUT=0
550 00:55:52.126269 1. OCD DRVP=8 CALOUT=1
551 00:55:52.126357
552 00:55:52.129700 1. OCD DRVP calibration OK! DRVP=8
553 00:55:52.129781
554 00:55:52.129842
555 00:55:52.129896
556 00:55:52.132983 K ODTN
557 00:55:52.133080 3. OCD ODTN=0 ,CALOUT=1
558 00:55:52.136490 3. OCD ODTN=1 ,CALOUT=1
559 00:55:52.136572 3. OCD ODTN=2 ,CALOUT=1
560 00:55:52.140046 3. OCD ODTN=3 ,CALOUT=1
561 00:55:52.142607 3. OCD ODTN=4 ,CALOUT=1
562 00:55:52.142690 3. OCD ODTN=5 ,CALOUT=1
563 00:55:52.146167 3. OCD ODTN=6 ,CALOUT=1
564 00:55:52.149379 3. OCD ODTN=7 ,CALOUT=0
565 00:55:52.149481
566 00:55:52.152975 3. OCD ODTN calibration OK! ODTN=7
567 00:55:52.153054
568 00:55:52.156036 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
569 00:55:52.159550 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
570 00:55:52.165901 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
571 00:55:52.165983
572 00:55:52.166045 K DRVP
573 00:55:52.169249 1. OCD DRVP=0 CALOUT=0
574 00:55:52.169323 1. OCD DRVP=1 CALOUT=0
575 00:55:52.172727 1. OCD DRVP=2 CALOUT=0
576 00:55:52.172797 1. OCD DRVP=3 CALOUT=0
577 00:55:52.175481 1. OCD DRVP=4 CALOUT=0
578 00:55:52.178925 1. OCD DRVP=5 CALOUT=0
579 00:55:52.179022 1. OCD DRVP=6 CALOUT=0
580 00:55:52.182205 1. OCD DRVP=7 CALOUT=0
581 00:55:52.185986 1. OCD DRVP=8 CALOUT=0
582 00:55:52.186085 1. OCD DRVP=9 CALOUT=1
583 00:55:52.186208
584 00:55:52.189507 1. OCD DRVP calibration OK! DRVP=9
585 00:55:52.189676
586 00:55:52.189769
587 00:55:52.189842
588 00:55:52.192127 K ODTN
589 00:55:52.192206 3. OCD ODTN=0 ,CALOUT=1
590 00:55:52.195711 3. OCD ODTN=1 ,CALOUT=1
591 00:55:52.199017 3. OCD ODTN=2 ,CALOUT=1
592 00:55:52.199100 3. OCD ODTN=3 ,CALOUT=1
593 00:55:52.202143 3. OCD ODTN=4 ,CALOUT=1
594 00:55:52.202245 3. OCD ODTN=5 ,CALOUT=1
595 00:55:52.205475 3. OCD ODTN=6 ,CALOUT=1
596 00:55:52.209073 3. OCD ODTN=7 ,CALOUT=1
597 00:55:52.209167 3. OCD ODTN=8 ,CALOUT=1
598 00:55:52.212310 3. OCD ODTN=9 ,CALOUT=1
599 00:55:52.215815 3. OCD ODTN=10 ,CALOUT=1
600 00:55:52.215901 3. OCD ODTN=11 ,CALOUT=1
601 00:55:52.218493 3. OCD ODTN=12 ,CALOUT=1
602 00:55:52.221910 3. OCD ODTN=13 ,CALOUT=1
603 00:55:52.221997 3. OCD ODTN=14 ,CALOUT=0
604 00:55:52.225737
605 00:55:52.228823 3. OCD ODTN calibration OK! ODTN=14
606 00:55:52.228931
607 00:55:52.232097 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=14
608 00:55:52.235237 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=14
609 00:55:52.238033 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=14 (After Adjust)
610 00:55:52.241601
611 00:55:52.241680 [DramcInit]
612 00:55:52.245268 AutoRefreshCKEOff AutoREF OFF
613 00:55:52.245345 DDRPhyPLLSetting-CKEOFF
614 00:55:52.248018 DDRPhyPLLSetting-CKEON
615 00:55:52.248086
616 00:55:52.248150 Enable WDQS
617 00:55:52.248213 ==
618 00:55:52.254901 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
619 00:55:52.257758 fsp= 1, odt_onoff= 1, Byte mode= 0
620 00:55:52.257832 ==
621 00:55:52.261331 [Duty_Offset_Calibration]
622 00:55:52.261408
623 00:55:52.264674 ===========================
624 00:55:52.264754 B0:2 B1:2 CA:1
625 00:55:52.285981 ==
626 00:55:52.289349 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
627 00:55:52.292706 fsp= 1, odt_onoff= 1, Byte mode= 0
628 00:55:52.292789 ==
629 00:55:52.295858 [Duty_Offset_Calibration]
630 00:55:52.295937
631 00:55:52.299020 ===========================
632 00:55:52.299099 B0:0 B1:0 CA:-1
633 00:55:52.331707 [ModeRegInit_LP4] CH0 RK0
634 00:55:52.335110 Write Rank0 MR13 =0x18
635 00:55:52.335198 Write Rank0 MR12 =0x5d
636 00:55:52.338575 Write Rank0 MR1 =0x56
637 00:55:52.341784 Write Rank0 MR2 =0x1a
638 00:55:52.341864 Write Rank0 MR11 =0x0
639 00:55:52.345186 Write Rank0 MR22 =0x38
640 00:55:52.348498 Write Rank0 MR14 =0x5d
641 00:55:52.348594 Write Rank0 MR3 =0x30
642 00:55:52.351662 Write Rank0 MR13 =0x58
643 00:55:52.351768 Write Rank0 MR12 =0x5d
644 00:55:52.354734 Write Rank0 MR1 =0x56
645 00:55:52.357991 Write Rank0 MR2 =0x2d
646 00:55:52.358071 Write Rank0 MR11 =0x23
647 00:55:52.361500 Write Rank0 MR22 =0x34
648 00:55:52.361591 Write Rank0 MR14 =0x10
649 00:55:52.364804 Write Rank0 MR3 =0x30
650 00:55:52.367729 Write Rank0 MR13 =0xd8
651 00:55:52.367833 [ModeRegInit_LP4] CH0 RK1
652 00:55:52.371511 Write Rank1 MR13 =0x18
653 00:55:52.374920 Write Rank1 MR12 =0x5d
654 00:55:52.375001 Write Rank1 MR1 =0x56
655 00:55:52.378436 Write Rank1 MR2 =0x1a
656 00:55:52.378540 Write Rank1 MR11 =0x0
657 00:55:52.381178 Write Rank1 MR22 =0x38
658 00:55:52.384532 Write Rank1 MR14 =0x5d
659 00:55:52.384630 Write Rank1 MR3 =0x30
660 00:55:52.388131 Write Rank1 MR13 =0x58
661 00:55:52.391372 Write Rank1 MR12 =0x5d
662 00:55:52.391451 Write Rank1 MR1 =0x56
663 00:55:52.394834 Write Rank1 MR2 =0x2d
664 00:55:52.394914 Write Rank1 MR11 =0x23
665 00:55:52.397654 Write Rank1 MR22 =0x34
666 00:55:52.400903 Write Rank1 MR14 =0x10
667 00:55:52.400981 Write Rank1 MR3 =0x30
668 00:55:52.404485 Write Rank1 MR13 =0xd8
669 00:55:52.407729 [ModeRegInit_LP4] CH1 RK0
670 00:55:52.407832 Write Rank0 MR13 =0x18
671 00:55:52.411147 Write Rank0 MR12 =0x5d
672 00:55:52.411243 Write Rank0 MR1 =0x56
673 00:55:52.414247 Write Rank0 MR2 =0x1a
674 00:55:52.417470 Write Rank0 MR11 =0x0
675 00:55:52.417568 Write Rank0 MR22 =0x38
676 00:55:52.421115 Write Rank0 MR14 =0x5d
677 00:55:52.421192 Write Rank0 MR3 =0x30
678 00:55:52.424014 Write Rank0 MR13 =0x58
679 00:55:52.427869 Write Rank0 MR12 =0x5d
680 00:55:52.427950 Write Rank0 MR1 =0x56
681 00:55:52.430632 Write Rank0 MR2 =0x2d
682 00:55:52.430710 Write Rank0 MR11 =0x23
683 00:55:52.433909 Write Rank0 MR22 =0x34
684 00:55:52.437489 Write Rank0 MR14 =0x10
685 00:55:52.437606 Write Rank0 MR3 =0x30
686 00:55:52.440736 Write Rank0 MR13 =0xd8
687 00:55:52.444361 [ModeRegInit_LP4] CH1 RK1
688 00:55:52.444463 Write Rank1 MR13 =0x18
689 00:55:52.447443 Write Rank1 MR12 =0x5d
690 00:55:52.450834 Write Rank1 MR1 =0x56
691 00:55:52.450915 Write Rank1 MR2 =0x1a
692 00:55:52.454107 Write Rank1 MR11 =0x0
693 00:55:52.454185 Write Rank1 MR22 =0x38
694 00:55:52.457281 Write Rank1 MR14 =0x5d
695 00:55:52.460650 Write Rank1 MR3 =0x30
696 00:55:52.460727 Write Rank1 MR13 =0x58
697 00:55:52.464048 Write Rank1 MR12 =0x5d
698 00:55:52.464125 Write Rank1 MR1 =0x56
699 00:55:52.467379 Write Rank1 MR2 =0x2d
700 00:55:52.470987 Write Rank1 MR11 =0x23
701 00:55:52.471065 Write Rank1 MR22 =0x34
702 00:55:52.473970 Write Rank1 MR14 =0x10
703 00:55:52.477409 Write Rank1 MR3 =0x30
704 00:55:52.477486 Write Rank1 MR13 =0xd8
705 00:55:52.480441 match AC timing 3
706 00:55:52.490278 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
707 00:55:52.490363 DramC Write-DBI off
708 00:55:52.493479 DramC Read-DBI off
709 00:55:52.493581 Write Rank0 MR13 =0x59
710 00:55:52.493658 ==
711 00:55:52.500124 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
712 00:55:52.503601 fsp= 1, odt_onoff= 1, Byte mode= 0
713 00:55:52.503682 ==
714 00:55:52.507107 === u2Vref_new: 0x56 --> 0x2d
715 00:55:52.509704 === u2Vref_new: 0x58 --> 0x38
716 00:55:52.513171 === u2Vref_new: 0x5a --> 0x39
717 00:55:52.516434 === u2Vref_new: 0x5c --> 0x3c
718 00:55:52.516512 === u2Vref_new: 0x5e --> 0x3d
719 00:55:52.520584 === u2Vref_new: 0x60 --> 0xa0
720 00:55:52.523997 [CA 0] Center 34 (6~63) winsize 58
721 00:55:52.526372 [CA 1] Center 35 (8~63) winsize 56
722 00:55:52.530089 [CA 2] Center 30 (1~59) winsize 59
723 00:55:52.533199 [CA 3] Center 25 (-2~53) winsize 56
724 00:55:52.536761 [CA 4] Center 26 (-2~54) winsize 57
725 00:55:52.540346 [CA 5] Center 31 (2~60) winsize 59
726 00:55:52.540425
727 00:55:52.542927 [CATrainingPosCal] consider 1 rank data
728 00:55:52.546574 u2DelayCellTimex100 = 744/100 ps
729 00:55:52.549880 CA0 delay=34 (6~63),Diff = 9 PI (11 cell)
730 00:55:52.553038 CA1 delay=35 (8~63),Diff = 10 PI (13 cell)
731 00:55:52.556748 CA2 delay=30 (1~59),Diff = 5 PI (6 cell)
732 00:55:52.563442 CA3 delay=25 (-2~53),Diff = 0 PI (0 cell)
733 00:55:52.566571 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
734 00:55:52.570150 CA5 delay=31 (2~60),Diff = 6 PI (7 cell)
735 00:55:52.570231
736 00:55:52.572844 CA PerBit enable=1, Macro0, CA PI delay=25
737 00:55:52.576187 === u2Vref_new: 0x5e --> 0x3d
738 00:55:52.576266
739 00:55:52.576326 Vref(ca) range 1: 30
740 00:55:52.579548
741 00:55:52.579658 CS Dly= 7 (38-0-32)
742 00:55:52.582889 Write Rank0 MR13 =0xd8
743 00:55:52.582967 Write Rank0 MR13 =0xd8
744 00:55:52.586190 Write Rank0 MR12 =0x5e
745 00:55:52.589600 Write Rank1 MR13 =0x59
746 00:55:52.589680 ==
747 00:55:52.592977 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
748 00:55:52.596611 fsp= 1, odt_onoff= 1, Byte mode= 0
749 00:55:52.596707 ==
750 00:55:52.599220 === u2Vref_new: 0x56 --> 0x2d
751 00:55:52.602409 === u2Vref_new: 0x58 --> 0x38
752 00:55:52.606096 === u2Vref_new: 0x5a --> 0x39
753 00:55:52.609775 === u2Vref_new: 0x5c --> 0x3c
754 00:55:52.612513 === u2Vref_new: 0x5e --> 0x3d
755 00:55:52.615972 === u2Vref_new: 0x60 --> 0xa0
756 00:55:52.619046 [CA 0] Center 35 (8~63) winsize 56
757 00:55:52.622509 [CA 1] Center 35 (8~63) winsize 56
758 00:55:52.625740 [CA 2] Center 31 (2~60) winsize 59
759 00:55:52.628947 [CA 3] Center 25 (-2~53) winsize 56
760 00:55:52.632440 [CA 4] Center 26 (-2~55) winsize 58
761 00:55:52.635852 [CA 5] Center 32 (3~61) winsize 59
762 00:55:52.635931
763 00:55:52.639096 [CATrainingPosCal] consider 2 rank data
764 00:55:52.642486 u2DelayCellTimex100 = 744/100 ps
765 00:55:52.645488 CA0 delay=35 (8~63),Diff = 10 PI (13 cell)
766 00:55:52.649004 CA1 delay=35 (8~63),Diff = 10 PI (13 cell)
767 00:55:52.652256 CA2 delay=30 (2~59),Diff = 5 PI (6 cell)
768 00:55:52.655701 CA3 delay=25 (-2~53),Diff = 0 PI (0 cell)
769 00:55:52.658710 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
770 00:55:52.661828 CA5 delay=31 (3~60),Diff = 6 PI (7 cell)
771 00:55:52.661906
772 00:55:52.668820 CA PerBit enable=1, Macro0, CA PI delay=25
773 00:55:52.668906 === u2Vref_new: 0x60 --> 0xa0
774 00:55:52.668986
775 00:55:52.671959 Vref(ca) range 1: 32
776 00:55:52.672036
777 00:55:52.675208 CS Dly= 7 (38-0-32)
778 00:55:52.675286 Write Rank1 MR13 =0xd8
779 00:55:52.678567 Write Rank1 MR13 =0xd8
780 00:55:52.678647 Write Rank1 MR12 =0x60
781 00:55:52.684763 [RankSwap] Rank num 2, (Multi 1), Rank 0
782 00:55:52.684847 Write Rank0 MR2 =0xad
783 00:55:52.688877 [Write Leveling]
784 00:55:52.691402 delay byte0 byte1 byte2 byte3
785 00:55:52.691479
786 00:55:52.691540 10 0 0
787 00:55:52.691596 11 0 0
788 00:55:52.694839 12 0 0
789 00:55:52.694917 13 0 0
790 00:55:52.698176 14 0 0
791 00:55:52.698255 15 0 0
792 00:55:52.701529 16 0 0
793 00:55:52.701646 17 0 0
794 00:55:52.701709 18 0 0
795 00:55:52.705128 19 0 0
796 00:55:52.705206 20 0 0
797 00:55:52.708323 21 0 0
798 00:55:52.708402 22 0 0
799 00:55:52.708463 23 0 0
800 00:55:52.711524 24 0 ff
801 00:55:52.711603 25 0 ff
802 00:55:52.714940 26 0 ff
803 00:55:52.715018 27 0 ff
804 00:55:52.717936 28 0 ff
805 00:55:52.718015 29 0 ff
806 00:55:52.721495 30 0 ff
807 00:55:52.721610 31 0 ff
808 00:55:52.721673 32 ff ff
809 00:55:52.724884 33 ff ff
810 00:55:52.724962 34 ff ff
811 00:55:52.727564 35 ff ff
812 00:55:52.727644 36 ff ff
813 00:55:52.731194 37 ff ff
814 00:55:52.731273 38 ff ff
815 00:55:52.737698 pass bytecount = 0xff (0xff: all bytes pass)
816 00:55:52.737777
817 00:55:52.737838 DQS0 dly: 32
818 00:55:52.737894 DQS1 dly: 24
819 00:55:52.741029 Write Rank0 MR2 =0x2d
820 00:55:52.744477 [RankSwap] Rank num 2, (Multi 1), Rank 0
821 00:55:52.747923 Write Rank0 MR1 =0xd6
822 00:55:52.748001 [Gating]
823 00:55:52.748062 ==
824 00:55:52.754197 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
825 00:55:52.754277 fsp= 1, odt_onoff= 1, Byte mode= 0
826 00:55:52.757489 ==
827 00:55:52.761010 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
828 00:55:52.764407 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
829 00:55:52.767709 3 1 8 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
830 00:55:52.774057 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
831 00:55:52.777866 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
832 00:55:52.780816 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
833 00:55:52.787385 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
834 00:55:52.790738 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
835 00:55:52.794050 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
836 00:55:52.800921 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
837 00:55:52.804188 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
838 00:55:52.807014 3 2 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
839 00:55:52.813500 3 2 16 |1a1a 2b2a |(11 11)(11 11) |(1 1)(0 0)| 0
840 00:55:52.816942 3 2 20 |3d3d 201 |(11 11)(11 11) |(1 1)(0 0)| 0
841 00:55:52.820272 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
842 00:55:52.827115 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
843 00:55:52.830363 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
844 00:55:52.833390 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
845 00:55:52.840003 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
846 00:55:52.843168 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
847 00:55:52.846711 3 3 16 |0 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
848 00:55:52.849880 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
849 00:55:52.856751 [Byte 0] Lead/lag Transition tap number (1)
850 00:55:52.860174 [Byte 1] Lead/lag falling Transition (3, 3, 20)
851 00:55:52.863469 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
852 00:55:52.869590 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
853 00:55:52.873258 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
854 00:55:52.876335 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
855 00:55:52.879972 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
856 00:55:52.886120 3 4 12 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
857 00:55:52.889903 3 4 16 |707 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
858 00:55:52.892969 3 4 20 |3d3d 100f |(11 11)(11 11) |(1 1)(1 1)| 0
859 00:55:52.899528 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 00:55:52.902855 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 00:55:52.906207 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 00:55:52.913093 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 00:55:52.916184 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 00:55:52.919552 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 00:55:52.925527 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 00:55:52.929062 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 00:55:52.932611 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 00:55:52.939118 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 00:55:52.942448 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 00:55:52.945763 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
871 00:55:52.952318 [Byte 0] Lead/lag falling Transition (3, 6, 4)
872 00:55:52.955689 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
873 00:55:52.959261 [Byte 1] Lead/lag falling Transition (3, 6, 8)
874 00:55:52.962193 3 6 12 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
875 00:55:52.968725 [Byte 0] Lead/lag Transition tap number (3)
876 00:55:52.972525 [Byte 1] Lead/lag Transition tap number (2)
877 00:55:52.975489 3 6 16 |202 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
878 00:55:52.978646 3 6 20 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
879 00:55:52.982356 [Byte 0]First pass (3, 6, 20)
880 00:55:52.985355 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 00:55:52.988484 [Byte 1]First pass (3, 6, 24)
882 00:55:52.992415 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 00:55:52.998340 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 00:55:53.001912 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 00:55:53.004995 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 00:55:53.008284 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 00:55:53.012160 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 00:55:53.018459 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 00:55:53.021600 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
890 00:55:53.025126 All bytes gating window > 1UI, Early break!
891 00:55:53.025205
892 00:55:53.028516 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
893 00:55:53.028593
894 00:55:53.031095 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 12)
895 00:55:53.031173
896 00:55:53.034481
897 00:55:53.034557
898 00:55:53.038087 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
899 00:55:53.038165
900 00:55:53.041390 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
901 00:55:53.041490
902 00:55:53.041610
903 00:55:53.044659 Write Rank0 MR1 =0x56
904 00:55:53.044736
905 00:55:53.047767 best RODT dly(2T, 0.5T) = (2, 3)
906 00:55:53.047839
907 00:55:53.051272 best RODT dly(2T, 0.5T) = (2, 3)
908 00:55:53.051375 ==
909 00:55:53.054605 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
910 00:55:53.058219 fsp= 1, odt_onoff= 1, Byte mode= 0
911 00:55:53.058298 ==
912 00:55:53.064361 Start DQ dly to find pass range UseTestEngine =0
913 00:55:53.067737 x-axis: bit #, y-axis: DQ dly (-127~63)
914 00:55:53.067815 RX Vref Scan = 0
915 00:55:53.071159 -26, [0] xxxxxxxx xxxxxxxx [MSB]
916 00:55:53.074375 -25, [0] xxxxxxxx xxxxxxxx [MSB]
917 00:55:53.077475 -24, [0] xxxxxxxx xxxxxxxx [MSB]
918 00:55:53.080575 -23, [0] xxxxxxxx xxxxxxxx [MSB]
919 00:55:53.084458 -22, [0] xxxxxxxx xxxxxxxx [MSB]
920 00:55:53.084537 -21, [0] xxxxxxxx xxxxxxxx [MSB]
921 00:55:53.087369 -20, [0] xxxxxxxx xxxxxxxx [MSB]
922 00:55:53.091073 -19, [0] xxxxxxxx xxxxxxxx [MSB]
923 00:55:53.094270 -18, [0] xxxxxxxx xxxxxxxx [MSB]
924 00:55:53.097162 -17, [0] xxxxxxxx xxxxxxxx [MSB]
925 00:55:53.100638 -16, [0] xxxxxxxx xxxxxxxx [MSB]
926 00:55:53.103564 -15, [0] xxxxxxxx xxxxxxxx [MSB]
927 00:55:53.107439 -14, [0] xxxxxxxx xxxxxxxx [MSB]
928 00:55:53.110521 -13, [0] xxxxxxxx xxxxxxxx [MSB]
929 00:55:53.110601 -12, [0] xxxxxxxx xxxxxxxx [MSB]
930 00:55:53.113574 -11, [0] xxxxxxxx xxxxxxxx [MSB]
931 00:55:53.116787 -10, [0] xxxxxxxx xxxxxxxx [MSB]
932 00:55:53.120374 -9, [0] xxxxxxxx xxxxxxxx [MSB]
933 00:55:53.123932 -8, [0] xxxxxxxx xxxxxxxx [MSB]
934 00:55:53.126836 -7, [0] xxxxxxxx xxxxxxxx [MSB]
935 00:55:53.130394 -6, [0] xxxxxxxx xxxxxxxx [MSB]
936 00:55:53.130475 -5, [0] xxxxxxxx xxxxxxxx [MSB]
937 00:55:53.133715 -4, [0] xxxxxxxx xxxxxxxx [MSB]
938 00:55:53.137101 -3, [0] xxxoxxxx xxxxxxxx [MSB]
939 00:55:53.139845 -2, [0] xxxoxxxx oxxxxxxx [MSB]
940 00:55:53.143212 -1, [0] xxxoxxxx oxxoxxxx [MSB]
941 00:55:53.146656 0, [0] xxxoxoxx ooxoxxxx [MSB]
942 00:55:53.149831 1, [0] xxxoxoox ooxoooxx [MSB]
943 00:55:53.149912 2, [0] xxxoxoox ooxoooxx [MSB]
944 00:55:53.153111 3, [0] xxxoxooo ooxoooox [MSB]
945 00:55:53.156648 4, [0] xoxoxooo ooxoooox [MSB]
946 00:55:53.159934 5, [0] xoxooooo ooxooooo [MSB]
947 00:55:53.163356 6, [0] xooooooo ooxooooo [MSB]
948 00:55:53.166728 7, [0] oooooooo ooxooooo [MSB]
949 00:55:53.169470 33, [0] oooxoooo oooooooo [MSB]
950 00:55:53.169559 34, [0] oooxoxoo oooooooo [MSB]
951 00:55:53.173335 35, [0] oooxoxoo xooxoooo [MSB]
952 00:55:53.176596 36, [0] oooxoxoo xxoxoooo [MSB]
953 00:55:53.179602 37, [0] oooxoxoo xxoxxxoo [MSB]
954 00:55:53.183168 38, [0] oooxoxxx xxoxxxxo [MSB]
955 00:55:53.186489 39, [0] xooxoxxx xxoxxxxo [MSB]
956 00:55:53.189851 40, [0] xxoxoxxx xxoxxxxo [MSB]
957 00:55:53.189933 41, [0] xxxxxxxx xxoxxxxx [MSB]
958 00:55:53.193181 42, [0] xxxxxxxx xxoxxxxx [MSB]
959 00:55:53.196045 43, [0] xxxxxxxx xxxxxxxx [MSB]
960 00:55:53.199879 iDelay=43, Bit 0, Center 22 (7 ~ 38) 32
961 00:55:53.202995 iDelay=43, Bit 1, Center 21 (4 ~ 39) 36
962 00:55:53.206029 iDelay=43, Bit 2, Center 23 (6 ~ 40) 35
963 00:55:53.209476 iDelay=43, Bit 3, Center 14 (-3 ~ 32) 36
964 00:55:53.215790 iDelay=43, Bit 4, Center 22 (5 ~ 40) 36
965 00:55:53.219833 iDelay=43, Bit 5, Center 16 (0 ~ 33) 34
966 00:55:53.222395 iDelay=43, Bit 6, Center 19 (1 ~ 37) 37
967 00:55:53.226155 iDelay=43, Bit 7, Center 20 (3 ~ 37) 35
968 00:55:53.228998 iDelay=43, Bit 8, Center 16 (-2 ~ 34) 37
969 00:55:53.232289 iDelay=43, Bit 9, Center 17 (0 ~ 35) 36
970 00:55:53.235865 iDelay=43, Bit 10, Center 25 (8 ~ 42) 35
971 00:55:53.238722 iDelay=43, Bit 11, Center 16 (-1 ~ 34) 36
972 00:55:53.242074 iDelay=43, Bit 12, Center 18 (1 ~ 36) 36
973 00:55:53.245363 iDelay=43, Bit 13, Center 18 (1 ~ 36) 36
974 00:55:53.249160 iDelay=43, Bit 14, Center 20 (3 ~ 37) 35
975 00:55:53.255429 iDelay=43, Bit 15, Center 22 (5 ~ 40) 36
976 00:55:53.255518 ==
977 00:55:53.258768 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
978 00:55:53.262264 fsp= 1, odt_onoff= 1, Byte mode= 0
979 00:55:53.262346 ==
980 00:55:53.265466 DQS Delay:
981 00:55:53.265606 DQS0 = 0, DQS1 = 0
982 00:55:53.265671 DQM Delay:
983 00:55:53.268182 DQM0 = 19, DQM1 = 19
984 00:55:53.268260 DQ Delay:
985 00:55:53.271694 DQ0 =22, DQ1 =21, DQ2 =23, DQ3 =14
986 00:55:53.275173 DQ4 =22, DQ5 =16, DQ6 =19, DQ7 =20
987 00:55:53.278391 DQ8 =16, DQ9 =17, DQ10 =25, DQ11 =16
988 00:55:53.281713 DQ12 =18, DQ13 =18, DQ14 =20, DQ15 =22
989 00:55:53.281793
990 00:55:53.281853
991 00:55:53.285069 DramC Write-DBI off
992 00:55:53.285146 ==
993 00:55:53.288306 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
994 00:55:53.291546 fsp= 1, odt_onoff= 1, Byte mode= 0
995 00:55:53.291628 ==
996 00:55:53.298241 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
997 00:55:53.298324
998 00:55:53.301618 Begin, DQ Scan Range 920~1176
999 00:55:53.301698
1000 00:55:53.301758
1001 00:55:53.301854 TX Vref Scan disable
1002 00:55:53.304972 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1003 00:55:53.308251 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1004 00:55:53.315105 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1005 00:55:53.317701 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1006 00:55:53.321711 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1007 00:55:53.324795 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1008 00:55:53.327856 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1009 00:55:53.331617 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1010 00:55:53.334562 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1011 00:55:53.337530 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1012 00:55:53.341230 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1013 00:55:53.344325 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1014 00:55:53.347465 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1015 00:55:53.351008 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1016 00:55:53.354549 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1017 00:55:53.357737 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1018 00:55:53.363810 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1019 00:55:53.367636 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1020 00:55:53.370774 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1021 00:55:53.374359 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1022 00:55:53.377463 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1023 00:55:53.380819 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1024 00:55:53.383953 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1025 00:55:53.387366 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1026 00:55:53.390726 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1027 00:55:53.393920 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1028 00:55:53.397058 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1029 00:55:53.400386 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1030 00:55:53.403736 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1031 00:55:53.407159 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1032 00:55:53.413306 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1033 00:55:53.416544 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1034 00:55:53.419875 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1035 00:55:53.423157 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1036 00:55:53.426576 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1037 00:55:53.429968 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1038 00:55:53.433014 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1039 00:55:53.436764 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1040 00:55:53.439940 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1041 00:55:53.443219 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1042 00:55:53.446483 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1043 00:55:53.449566 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1044 00:55:53.452793 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1045 00:55:53.456230 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1046 00:55:53.459495 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1047 00:55:53.462774 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1048 00:55:53.469651 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1049 00:55:53.472770 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1050 00:55:53.475923 968 |3 6 8|[0] xxxxxxxx oxxxxxxx [MSB]
1051 00:55:53.479532 969 |3 6 9|[0] xxxxxxxx oxxoxxxx [MSB]
1052 00:55:53.482843 970 |3 6 10|[0] xxxxxxxx ooxooxxx [MSB]
1053 00:55:53.486305 971 |3 6 11|[0] xxxxxxxx ooxoooxx [MSB]
1054 00:55:53.489171 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1055 00:55:53.492663 973 |3 6 13|[0] xxxxxxxx ooxooooo [MSB]
1056 00:55:53.496114 974 |3 6 14|[0] xxxxxxxx ooxooooo [MSB]
1057 00:55:53.499725 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1058 00:55:53.502601 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1059 00:55:53.505996 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1060 00:55:53.509197 978 |3 6 18|[0] xxxoxoox oooooooo [MSB]
1061 00:55:53.512574 979 |3 6 19|[0] xxxoooox oooooooo [MSB]
1062 00:55:53.516037 980 |3 6 20|[0] xoxooooo oooooooo [MSB]
1063 00:55:53.519228 981 |3 6 21|[0] xooooooo oooooooo [MSB]
1064 00:55:53.526760 989 |3 6 29|[0] oooooooo xooxoooo [MSB]
1065 00:55:53.530062 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1066 00:55:53.533534 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1067 00:55:53.536694 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1068 00:55:53.540072 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1069 00:55:53.543298 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1070 00:55:53.546648 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1071 00:55:53.549989 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1072 00:55:53.553304 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1073 00:55:53.556563 998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]
1074 00:55:53.559697 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1075 00:55:53.563137 Byte0, DQ PI dly=988, DQM PI dly= 988
1076 00:55:53.569693 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
1077 00:55:53.569800
1078 00:55:53.572825 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
1079 00:55:53.572930
1080 00:55:53.576602 Byte1, DQ PI dly=980, DQM PI dly= 980
1081 00:55:53.579363 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1082 00:55:53.579465
1083 00:55:53.585751 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1084 00:55:53.585854
1085 00:55:53.585947 ==
1086 00:55:53.589034 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1087 00:55:53.592754 fsp= 1, odt_onoff= 1, Byte mode= 0
1088 00:55:53.592861 ==
1089 00:55:53.599603 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1090 00:55:53.599708
1091 00:55:53.602310 Begin, DQ Scan Range 956~1020
1092 00:55:53.602410 Write Rank0 MR14 =0x0
1093 00:55:53.611271
1094 00:55:53.611374 CH=0, VrefRange= 0, VrefLevel = 0
1095 00:55:53.617716 TX Bit0 (984~997) 14 990, Bit8 (971~982) 12 976,
1096 00:55:53.620947 TX Bit1 (983~995) 13 989, Bit9 (973~984) 12 978,
1097 00:55:53.627809 TX Bit2 (983~996) 14 989, Bit10 (978~989) 12 983,
1098 00:55:53.631045 TX Bit3 (977~990) 14 983, Bit11 (973~982) 10 977,
1099 00:55:53.634440 TX Bit4 (983~992) 10 987, Bit12 (973~985) 13 979,
1100 00:55:53.640936 TX Bit5 (981~991) 11 986, Bit13 (974~984) 11 979,
1101 00:55:53.644493 TX Bit6 (982~993) 12 987, Bit14 (974~988) 15 981,
1102 00:55:53.647873 TX Bit7 (983~993) 11 988, Bit15 (976~991) 16 983,
1103 00:55:53.651258
1104 00:55:53.651358 Write Rank0 MR14 =0x2
1105 00:55:53.659919
1106 00:55:53.660025 CH=0, VrefRange= 0, VrefLevel = 2
1107 00:55:53.666133 TX Bit0 (984~998) 15 991, Bit8 (971~983) 13 977,
1108 00:55:53.669826 TX Bit1 (982~996) 15 989, Bit9 (973~985) 13 979,
1109 00:55:53.676395 TX Bit2 (983~997) 15 990, Bit10 (977~989) 13 983,
1110 00:55:53.679813 TX Bit3 (977~991) 15 984, Bit11 (972~983) 12 977,
1111 00:55:53.682765 TX Bit4 (983~993) 11 988, Bit12 (973~985) 13 979,
1112 00:55:53.689074 TX Bit5 (979~991) 13 985, Bit13 (974~985) 12 979,
1113 00:55:53.692307 TX Bit6 (981~993) 13 987, Bit14 (974~989) 16 981,
1114 00:55:53.698975 TX Bit7 (983~993) 11 988, Bit15 (976~991) 16 983,
1115 00:55:53.699082
1116 00:55:53.699172 Write Rank0 MR14 =0x4
1117 00:55:53.708460
1118 00:55:53.708565 CH=0, VrefRange= 0, VrefLevel = 4
1119 00:55:53.715141 TX Bit0 (983~998) 16 990, Bit8 (970~984) 15 977,
1120 00:55:53.718001 TX Bit1 (982~996) 15 989, Bit9 (972~986) 15 979,
1121 00:55:53.724944 TX Bit2 (983~998) 16 990, Bit10 (976~990) 15 983,
1122 00:55:53.727879 TX Bit3 (976~991) 16 983, Bit11 (972~984) 13 978,
1123 00:55:53.731239 TX Bit4 (982~994) 13 988, Bit12 (973~987) 15 980,
1124 00:55:53.738086 TX Bit5 (979~992) 14 985, Bit13 (973~986) 14 979,
1125 00:55:53.741427 TX Bit6 (980~994) 15 987, Bit14 (973~989) 17 981,
1126 00:55:53.744843 TX Bit7 (982~994) 13 988, Bit15 (975~992) 18 983,
1127 00:55:53.796880
1128 00:55:53.797023 Write Rank0 MR14 =0x6
1129 00:55:53.797146
1130 00:55:53.797242 CH=0, VrefRange= 0, VrefLevel = 6
1131 00:55:53.797398 TX Bit0 (983~999) 17 991, Bit8 (970~984) 15 977,
1132 00:55:53.797714 TX Bit1 (982~998) 17 990, Bit9 (972~987) 16 979,
1133 00:55:53.797855 TX Bit2 (983~999) 17 991, Bit10 (976~991) 16 983,
1134 00:55:53.797946 TX Bit3 (976~992) 17 984, Bit11 (971~984) 14 977,
1135 00:55:53.798035 TX Bit4 (982~995) 14 988, Bit12 (973~988) 16 980,
1136 00:55:53.798123 TX Bit5 (979~992) 14 985, Bit13 (973~987) 15 980,
1137 00:55:53.798215 TX Bit6 (980~995) 16 987, Bit14 (973~990) 18 981,
1138 00:55:53.800992 TX Bit7 (982~995) 14 988, Bit15 (975~992) 18 983,
1139 00:55:53.801093
1140 00:55:53.801181 Write Rank0 MR14 =0x8
1141 00:55:53.806157
1142 00:55:53.806259 CH=0, VrefRange= 0, VrefLevel = 8
1143 00:55:53.812426 TX Bit0 (983~999) 17 991, Bit8 (969~985) 17 977,
1144 00:55:53.815884 TX Bit1 (981~998) 18 989, Bit9 (972~988) 17 980,
1145 00:55:53.822225 TX Bit2 (982~999) 18 990, Bit10 (976~992) 17 984,
1146 00:55:53.825482 TX Bit3 (976~992) 17 984, Bit11 (971~985) 15 978,
1147 00:55:53.828961 TX Bit4 (982~996) 15 989, Bit12 (972~988) 17 980,
1148 00:55:53.835510 TX Bit5 (978~993) 16 985, Bit13 (973~987) 15 980,
1149 00:55:53.838756 TX Bit6 (979~996) 18 987, Bit14 (973~990) 18 981,
1150 00:55:53.845365 TX Bit7 (982~996) 15 989, Bit15 (975~994) 20 984,
1151 00:55:53.845456
1152 00:55:53.845518 Write Rank0 MR14 =0xa
1153 00:55:53.854384
1154 00:55:53.857983 CH=0, VrefRange= 0, VrefLevel = 10
1155 00:55:53.861111 TX Bit0 (983~999) 17 991, Bit8 (969~986) 18 977,
1156 00:55:53.864455 TX Bit1 (981~999) 19 990, Bit9 (971~988) 18 979,
1157 00:55:53.871204 TX Bit2 (982~999) 18 990, Bit10 (975~993) 19 984,
1158 00:55:53.874596 TX Bit3 (976~993) 18 984, Bit11 (970~986) 17 978,
1159 00:55:53.877473 TX Bit4 (981~997) 17 989, Bit12 (972~988) 17 980,
1160 00:55:53.884227 TX Bit5 (978~994) 17 986, Bit13 (972~988) 17 980,
1161 00:55:53.887510 TX Bit6 (978~997) 20 987, Bit14 (972~991) 20 981,
1162 00:55:53.894123 TX Bit7 (981~997) 17 989, Bit15 (974~994) 21 984,
1163 00:55:53.894202
1164 00:55:53.894263 Write Rank0 MR14 =0xc
1165 00:55:53.903779
1166 00:55:53.906842 CH=0, VrefRange= 0, VrefLevel = 12
1167 00:55:53.909760 TX Bit0 (983~1000) 18 991, Bit8 (968~987) 20 977,
1168 00:55:53.913154 TX Bit1 (981~999) 19 990, Bit9 (971~989) 19 980,
1169 00:55:53.920150 TX Bit2 (982~1000) 19 991, Bit10 (975~994) 20 984,
1170 00:55:53.923354 TX Bit3 (976~993) 18 984, Bit11 (970~988) 19 979,
1171 00:55:53.926758 TX Bit4 (980~998) 19 989, Bit12 (971~989) 19 980,
1172 00:55:53.933250 TX Bit5 (978~995) 18 986, Bit13 (971~989) 19 980,
1173 00:55:53.936607 TX Bit6 (978~997) 20 987, Bit14 (972~991) 20 981,
1174 00:55:53.942657 TX Bit7 (980~998) 19 989, Bit15 (974~995) 22 984,
1175 00:55:53.942735
1176 00:55:53.942795 Write Rank0 MR14 =0xe
1177 00:55:53.952430
1178 00:55:53.955659 CH=0, VrefRange= 0, VrefLevel = 14
1179 00:55:53.959362 TX Bit0 (982~1000) 19 991, Bit8 (969~987) 19 978,
1180 00:55:53.962404 TX Bit1 (980~999) 20 989, Bit9 (970~989) 20 979,
1181 00:55:53.969065 TX Bit2 (981~1000) 20 990, Bit10 (975~995) 21 985,
1182 00:55:53.972503 TX Bit3 (975~994) 20 984, Bit11 (969~988) 20 978,
1183 00:55:53.975402 TX Bit4 (980~998) 19 989, Bit12 (971~989) 19 980,
1184 00:55:53.982390 TX Bit5 (977~995) 19 986, Bit13 (971~989) 19 980,
1185 00:55:53.985661 TX Bit6 (978~998) 21 988, Bit14 (972~992) 21 982,
1186 00:55:53.991776 TX Bit7 (980~998) 19 989, Bit15 (974~996) 23 985,
1187 00:55:53.991941
1188 00:55:53.992053 Write Rank0 MR14 =0x10
1189 00:55:54.001795
1190 00:55:54.004977 CH=0, VrefRange= 0, VrefLevel = 16
1191 00:55:54.008728 TX Bit0 (982~1001) 20 991, Bit8 (968~988) 21 978,
1192 00:55:54.011808 TX Bit1 (979~1000) 22 989, Bit9 (969~989) 21 979,
1193 00:55:54.018773 TX Bit2 (981~1001) 21 991, Bit10 (975~996) 22 985,
1194 00:55:54.021772 TX Bit3 (975~994) 20 984, Bit11 (969~988) 20 978,
1195 00:55:54.025121 TX Bit4 (980~999) 20 989, Bit12 (970~990) 21 980,
1196 00:55:54.031742 TX Bit5 (977~996) 20 986, Bit13 (970~990) 21 980,
1197 00:55:54.034895 TX Bit6 (977~998) 22 987, Bit14 (971~992) 22 981,
1198 00:55:54.041423 TX Bit7 (980~999) 20 989, Bit15 (974~996) 23 985,
1199 00:55:54.041555
1200 00:55:54.041689 Write Rank0 MR14 =0x12
1201 00:55:54.051748
1202 00:55:54.055050 CH=0, VrefRange= 0, VrefLevel = 18
1203 00:55:54.058381 TX Bit0 (982~1002) 21 992, Bit8 (968~988) 21 978,
1204 00:55:54.061840 TX Bit1 (979~1000) 22 989, Bit9 (969~990) 22 979,
1205 00:55:54.068221 TX Bit2 (980~1001) 22 990, Bit10 (975~996) 22 985,
1206 00:55:54.071643 TX Bit3 (975~995) 21 985, Bit11 (969~989) 21 979,
1207 00:55:54.074305 TX Bit4 (979~999) 21 989, Bit12 (970~990) 21 980,
1208 00:55:54.081657 TX Bit5 (977~997) 21 987, Bit13 (970~990) 21 980,
1209 00:55:54.084432 TX Bit6 (977~998) 22 987, Bit14 (971~992) 22 981,
1210 00:55:54.090771 TX Bit7 (979~999) 21 989, Bit15 (974~996) 23 985,
1211 00:55:54.090889
1212 00:55:54.090986 Write Rank0 MR14 =0x14
1213 00:55:54.101192
1214 00:55:54.104464 CH=0, VrefRange= 0, VrefLevel = 20
1215 00:55:54.107766 TX Bit0 (982~1002) 21 992, Bit8 (968~988) 21 978,
1216 00:55:54.111110 TX Bit1 (979~1000) 22 989, Bit9 (969~990) 22 979,
1217 00:55:54.117740 TX Bit2 (980~1001) 22 990, Bit10 (975~996) 22 985,
1218 00:55:54.120670 TX Bit3 (975~995) 21 985, Bit11 (969~989) 21 979,
1219 00:55:54.124479 TX Bit4 (979~999) 21 989, Bit12 (970~990) 21 980,
1220 00:55:54.130809 TX Bit5 (977~997) 21 987, Bit13 (970~990) 21 980,
1221 00:55:54.134352 TX Bit6 (977~998) 22 987, Bit14 (971~992) 22 981,
1222 00:55:54.141051 TX Bit7 (979~999) 21 989, Bit15 (974~996) 23 985,
1223 00:55:54.141171
1224 00:55:54.141267 Write Rank0 MR14 =0x16
1225 00:55:54.150953
1226 00:55:54.154130 CH=0, VrefRange= 0, VrefLevel = 22
1227 00:55:54.157570 TX Bit0 (980~1003) 24 991, Bit8 (968~989) 22 978,
1228 00:55:54.160882 TX Bit1 (979~1001) 23 990, Bit9 (969~991) 23 980,
1229 00:55:54.167674 TX Bit2 (980~1002) 23 991, Bit10 (974~996) 23 985,
1230 00:55:54.170462 TX Bit3 (975~996) 22 985, Bit11 (968~990) 23 979,
1231 00:55:54.177530 TX Bit4 (978~1000) 23 989, Bit12 (969~992) 24 980,
1232 00:55:54.180777 TX Bit5 (977~998) 22 987, Bit13 (969~991) 23 980,
1233 00:55:54.184141 TX Bit6 (977~999) 23 988, Bit14 (970~994) 25 982,
1234 00:55:54.190144 TX Bit7 (978~1000) 23 989, Bit15 (973~997) 25 985,
1235 00:55:54.190227
1236 00:55:54.190287 Write Rank0 MR14 =0x18
1237 00:55:54.201216
1238 00:55:54.204515 CH=0, VrefRange= 0, VrefLevel = 24
1239 00:55:54.207600 TX Bit0 (980~1003) 24 991, Bit8 (967~990) 24 978,
1240 00:55:54.211198 TX Bit1 (978~1002) 25 990, Bit9 (968~991) 24 979,
1241 00:55:54.216967 TX Bit2 (979~1003) 25 991, Bit10 (974~997) 24 985,
1242 00:55:54.220437 TX Bit3 (974~997) 24 985, Bit11 (968~990) 23 979,
1243 00:55:54.227155 TX Bit4 (978~1000) 23 989, Bit12 (969~992) 24 980,
1244 00:55:54.230645 TX Bit5 (976~998) 23 987, Bit13 (969~991) 23 980,
1245 00:55:54.233655 TX Bit6 (977~999) 23 988, Bit14 (970~995) 26 982,
1246 00:55:54.240227 TX Bit7 (978~1000) 23 989, Bit15 (972~997) 26 984,
1247 00:55:54.240300
1248 00:55:54.240357 Write Rank0 MR14 =0x1a
1249 00:55:54.250537
1250 00:55:54.253966 CH=0, VrefRange= 0, VrefLevel = 26
1251 00:55:54.257477 TX Bit0 (980~1003) 24 991, Bit8 (967~990) 24 978,
1252 00:55:54.260517 TX Bit1 (978~1002) 25 990, Bit9 (969~992) 24 980,
1253 00:55:54.267054 TX Bit2 (979~1003) 25 991, Bit10 (974~997) 24 985,
1254 00:55:54.270403 TX Bit3 (974~998) 25 986, Bit11 (968~991) 24 979,
1255 00:55:54.277013 TX Bit4 (977~1000) 24 988, Bit12 (968~993) 26 980,
1256 00:55:54.280374 TX Bit5 (976~999) 24 987, Bit13 (969~992) 24 980,
1257 00:55:54.283677 TX Bit6 (976~999) 24 987, Bit14 (969~995) 27 982,
1258 00:55:54.290454 TX Bit7 (978~1001) 24 989, Bit15 (972~997) 26 984,
1259 00:55:54.290539
1260 00:55:54.290601 Write Rank0 MR14 =0x1c
1261 00:55:54.301214
1262 00:55:54.304673 CH=0, VrefRange= 0, VrefLevel = 28
1263 00:55:54.307646 TX Bit0 (979~1004) 26 991, Bit8 (967~990) 24 978,
1264 00:55:54.310811 TX Bit1 (978~1002) 25 990, Bit9 (968~991) 24 979,
1265 00:55:54.317558 TX Bit2 (979~1004) 26 991, Bit10 (974~998) 25 986,
1266 00:55:54.320719 TX Bit3 (974~998) 25 986, Bit11 (968~991) 24 979,
1267 00:55:54.324000 TX Bit4 (977~1001) 25 989, Bit12 (968~993) 26 980,
1268 00:55:54.330832 TX Bit5 (976~999) 24 987, Bit13 (969~993) 25 981,
1269 00:55:54.334033 TX Bit6 (976~1000) 25 988, Bit14 (969~996) 28 982,
1270 00:55:54.340838 TX Bit7 (977~1001) 25 989, Bit15 (971~997) 27 984,
1271 00:55:54.340930
1272 00:55:54.341012 Write Rank0 MR14 =0x1e
1273 00:55:54.350888
1274 00:55:54.354100 CH=0, VrefRange= 0, VrefLevel = 30
1275 00:55:54.357222 TX Bit0 (979~1004) 26 991, Bit8 (967~990) 24 978,
1276 00:55:54.360804 TX Bit1 (978~1002) 25 990, Bit9 (968~991) 24 979,
1277 00:55:54.367394 TX Bit2 (979~1004) 26 991, Bit10 (974~998) 25 986,
1278 00:55:54.370639 TX Bit3 (974~998) 25 986, Bit11 (968~991) 24 979,
1279 00:55:54.377084 TX Bit4 (977~1001) 25 989, Bit12 (968~993) 26 980,
1280 00:55:54.380728 TX Bit5 (976~999) 24 987, Bit13 (969~993) 25 981,
1281 00:55:54.383747 TX Bit6 (976~1000) 25 988, Bit14 (969~996) 28 982,
1282 00:55:54.390231 TX Bit7 (977~1001) 25 989, Bit15 (971~997) 27 984,
1283 00:55:54.390380
1284 00:55:54.390467 Write Rank0 MR14 =0x20
1285 00:55:54.401309
1286 00:55:54.404922 CH=0, VrefRange= 0, VrefLevel = 32
1287 00:55:54.407671 TX Bit0 (979~1004) 26 991, Bit8 (967~990) 24 978,
1288 00:55:54.411155 TX Bit1 (978~1002) 25 990, Bit9 (968~991) 24 979,
1289 00:55:54.417829 TX Bit2 (979~1004) 26 991, Bit10 (974~998) 25 986,
1290 00:55:54.420534 TX Bit3 (974~998) 25 986, Bit11 (968~991) 24 979,
1291 00:55:54.427263 TX Bit4 (977~1001) 25 989, Bit12 (968~993) 26 980,
1292 00:55:54.430418 TX Bit5 (976~999) 24 987, Bit13 (969~993) 25 981,
1293 00:55:54.433694 TX Bit6 (976~1000) 25 988, Bit14 (969~996) 28 982,
1294 00:55:54.440316 TX Bit7 (977~1001) 25 989, Bit15 (971~997) 27 984,
1295 00:55:54.440430
1296 00:55:54.440498 Write Rank0 MR14 =0x22
1297 00:55:54.451217
1298 00:55:54.454856 CH=0, VrefRange= 0, VrefLevel = 34
1299 00:55:54.458072 TX Bit0 (979~1004) 26 991, Bit8 (967~990) 24 978,
1300 00:55:54.461220 TX Bit1 (978~1002) 25 990, Bit9 (968~991) 24 979,
1301 00:55:54.467766 TX Bit2 (979~1004) 26 991, Bit10 (974~998) 25 986,
1302 00:55:54.471193 TX Bit3 (974~998) 25 986, Bit11 (968~991) 24 979,
1303 00:55:54.474640 TX Bit4 (977~1001) 25 989, Bit12 (968~993) 26 980,
1304 00:55:54.481538 TX Bit5 (976~999) 24 987, Bit13 (969~993) 25 981,
1305 00:55:54.484695 TX Bit6 (976~1000) 25 988, Bit14 (969~996) 28 982,
1306 00:55:54.490956 TX Bit7 (977~1001) 25 989, Bit15 (971~997) 27 984,
1307 00:55:54.491047
1308 00:55:54.491123 Write Rank0 MR14 =0x24
1309 00:55:54.501277
1310 00:55:54.504639 CH=0, VrefRange= 0, VrefLevel = 36
1311 00:55:54.508105 TX Bit0 (979~1004) 26 991, Bit8 (967~990) 24 978,
1312 00:55:54.511455 TX Bit1 (978~1002) 25 990, Bit9 (968~991) 24 979,
1313 00:55:54.517686 TX Bit2 (979~1004) 26 991, Bit10 (974~998) 25 986,
1314 00:55:54.521068 TX Bit3 (974~998) 25 986, Bit11 (968~991) 24 979,
1315 00:55:54.524571 TX Bit4 (977~1001) 25 989, Bit12 (968~993) 26 980,
1316 00:55:54.530942 TX Bit5 (976~999) 24 987, Bit13 (969~993) 25 981,
1317 00:55:54.534364 TX Bit6 (976~1000) 25 988, Bit14 (969~996) 28 982,
1318 00:55:54.541012 TX Bit7 (977~1001) 25 989, Bit15 (971~997) 27 984,
1319 00:55:54.541109
1320 00:55:54.541171
1321 00:55:54.544356 TX Vref found, early break! 373< 383
1322 00:55:54.547519 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
1323 00:55:54.550823 u1DelayCellOfst[0]=6 cells (5 PI)
1324 00:55:54.554049 u1DelayCellOfst[1]=5 cells (4 PI)
1325 00:55:54.558039 u1DelayCellOfst[2]=6 cells (5 PI)
1326 00:55:54.560659 u1DelayCellOfst[3]=0 cells (0 PI)
1327 00:55:54.564199 u1DelayCellOfst[4]=3 cells (3 PI)
1328 00:55:54.567357 u1DelayCellOfst[5]=1 cells (1 PI)
1329 00:55:54.570868 u1DelayCellOfst[6]=2 cells (2 PI)
1330 00:55:54.570944 u1DelayCellOfst[7]=3 cells (3 PI)
1331 00:55:54.573853 Byte0, DQ PI dly=986, DQM PI dly= 988
1332 00:55:54.580584 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1333 00:55:54.580720
1334 00:55:54.584352 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1335 00:55:54.584521
1336 00:55:54.587624 u1DelayCellOfst[8]=0 cells (0 PI)
1337 00:55:54.590424 u1DelayCellOfst[9]=1 cells (1 PI)
1338 00:55:54.593931 u1DelayCellOfst[10]=10 cells (8 PI)
1339 00:55:54.597154 u1DelayCellOfst[11]=1 cells (1 PI)
1340 00:55:54.600701 u1DelayCellOfst[12]=2 cells (2 PI)
1341 00:55:54.603904 u1DelayCellOfst[13]=3 cells (3 PI)
1342 00:55:54.606973 u1DelayCellOfst[14]=5 cells (4 PI)
1343 00:55:54.610473 u1DelayCellOfst[15]=7 cells (6 PI)
1344 00:55:54.613666 Byte1, DQ PI dly=978, DQM PI dly= 982
1345 00:55:54.617084 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1346 00:55:54.617157
1347 00:55:54.619835 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1348 00:55:54.619906
1349 00:55:54.623722 Write Rank0 MR14 =0x1c
1350 00:55:54.623788
1351 00:55:54.626507 Final TX Range 0 Vref 28
1352 00:55:54.626597
1353 00:55:54.633299 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1354 00:55:54.633367
1355 00:55:54.640309 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1356 00:55:54.646572 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1357 00:55:54.653002 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1358 00:55:54.656563 Write Rank0 MR3 =0xb0
1359 00:55:54.656637 DramC Write-DBI on
1360 00:55:54.656697 ==
1361 00:55:54.662739 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1362 00:55:54.666856 fsp= 1, odt_onoff= 1, Byte mode= 0
1363 00:55:54.666934 ==
1364 00:55:54.669714 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1365 00:55:54.669821
1366 00:55:54.672912 Begin, DQ Scan Range 702~766
1367 00:55:54.672989
1368 00:55:54.673050
1369 00:55:54.676641 TX Vref Scan disable
1370 00:55:54.679397 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1371 00:55:54.682935 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1372 00:55:54.685892 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1373 00:55:54.689404 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1374 00:55:54.692881 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1375 00:55:54.696220 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1376 00:55:54.699312 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1377 00:55:54.702395 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1378 00:55:54.706132 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1379 00:55:54.709963 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1380 00:55:54.712970 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1381 00:55:54.715942 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1382 00:55:54.719692 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1383 00:55:54.722654 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1384 00:55:54.725708 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1385 00:55:54.732628 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1386 00:55:54.735817 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1387 00:55:54.739345 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1388 00:55:54.742104 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
1389 00:55:54.748771 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1390 00:55:54.752410 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1391 00:55:54.755262 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1392 00:55:54.758873 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1393 00:55:54.762022 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1394 00:55:54.765491 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1395 00:55:54.768319 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1396 00:55:54.771586 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1397 00:55:54.774993 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1398 00:55:54.778352 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
1399 00:55:54.781821 747 |2 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
1400 00:55:54.785171 Byte0, DQ PI dly=733, DQM PI dly= 733
1401 00:55:54.791715 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
1402 00:55:54.791814
1403 00:55:54.795084 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
1404 00:55:54.795180
1405 00:55:54.798139 Byte1, DQ PI dly=724, DQM PI dly= 724
1406 00:55:54.801262 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
1407 00:55:54.801329
1408 00:55:54.808426 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
1409 00:55:54.808495
1410 00:55:54.814328 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1411 00:55:54.821050 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1412 00:55:54.827809 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1413 00:55:54.830869 Write Rank0 MR3 =0x30
1414 00:55:54.830940 DramC Write-DBI off
1415 00:55:54.830998
1416 00:55:54.834405 [DATLAT]
1417 00:55:54.834485 Freq=1600, CH0 RK0, use_rxtx_scan=0
1418 00:55:54.837492
1419 00:55:54.837593 DATLAT Default: 0xf
1420 00:55:54.840873 7, 0xFFFF, sum=0
1421 00:55:54.840951 8, 0xFFFF, sum=0
1422 00:55:54.841013 9, 0xFFFF, sum=0
1423 00:55:54.844366 10, 0xFFFF, sum=0
1424 00:55:54.844446 11, 0xFFFF, sum=0
1425 00:55:54.847946 12, 0xFFFF, sum=0
1426 00:55:54.848024 13, 0xFFFF, sum=0
1427 00:55:54.851125 14, 0x0, sum=1
1428 00:55:54.851204 15, 0x0, sum=2
1429 00:55:54.854561 16, 0x0, sum=3
1430 00:55:54.854640 17, 0x0, sum=4
1431 00:55:54.860629 pattern=2 first_step=14 total pass=5 best_step=16
1432 00:55:54.860707 ==
1433 00:55:54.863986 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1434 00:55:54.867371 fsp= 1, odt_onoff= 1, Byte mode= 0
1435 00:55:54.867448 ==
1436 00:55:54.870790 Start DQ dly to find pass range UseTestEngine =1
1437 00:55:54.876905 x-axis: bit #, y-axis: DQ dly (-127~63)
1438 00:55:54.876983 RX Vref Scan = 1
1439 00:55:54.984788
1440 00:55:54.984924 RX Vref found, early break!
1441 00:55:54.984992
1442 00:55:54.990832 Final RX Vref 11, apply to both rank0 and 1
1443 00:55:54.990910 ==
1444 00:55:54.994284 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1445 00:55:54.997732 fsp= 1, odt_onoff= 1, Byte mode= 0
1446 00:55:54.997810 ==
1447 00:55:54.997871 DQS Delay:
1448 00:55:55.001068 DQS0 = 0, DQS1 = 0
1449 00:55:55.001144 DQM Delay:
1450 00:55:55.004373 DQM0 = 19, DQM1 = 18
1451 00:55:55.004450 DQ Delay:
1452 00:55:55.007559 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15
1453 00:55:55.010906 DQ4 =21, DQ5 =16, DQ6 =19, DQ7 =21
1454 00:55:55.013912 DQ8 =15, DQ9 =16, DQ10 =24, DQ11 =16
1455 00:55:55.017495 DQ12 =18, DQ13 =18, DQ14 =20, DQ15 =22
1456 00:55:55.017621
1457 00:55:55.017680
1458 00:55:55.017734
1459 00:55:55.020559 [DramC_TX_OE_Calibration] TA2
1460 00:55:55.024074 Original DQ_B0 (3 6) =30, OEN = 27
1461 00:55:55.027447 Original DQ_B1 (3 6) =30, OEN = 27
1462 00:55:55.030841 23, 0x0, End_B0=23 End_B1=23
1463 00:55:55.033860 24, 0x0, End_B0=24 End_B1=24
1464 00:55:55.033938 25, 0x0, End_B0=25 End_B1=25
1465 00:55:55.037129 26, 0x0, End_B0=26 End_B1=26
1466 00:55:55.040425 27, 0x0, End_B0=27 End_B1=27
1467 00:55:55.043754 28, 0x0, End_B0=28 End_B1=28
1468 00:55:55.043832 29, 0x0, End_B0=29 End_B1=29
1469 00:55:55.046847 30, 0x0, End_B0=30 End_B1=30
1470 00:55:55.050676 31, 0xFFFF, End_B0=30 End_B1=30
1471 00:55:55.056612 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1472 00:55:55.060027 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1473 00:55:55.063524
1474 00:55:55.063601
1475 00:55:55.063660 Write Rank0 MR23 =0x3f
1476 00:55:55.063716 [DQSOSC]
1477 00:55:55.073301 [DQSOSCAuto] RK0, (LSB)MR18= 0xaeae, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps
1478 00:55:55.079840 CH0_RK0: MR19=0x202, MR18=0xAEAE, DQSOSC=459, MR23=63, INC=11, DEC=17
1479 00:55:55.079916 Write Rank0 MR23 =0x3f
1480 00:55:55.083418 [DQSOSC]
1481 00:55:55.089521 [DQSOSCAuto] RK0, (LSB)MR18= 0xadad, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps
1482 00:55:55.093309 CH0 RK0: MR19=202, MR18=ADAD
1483 00:55:55.096524 [RankSwap] Rank num 2, (Multi 1), Rank 1
1484 00:55:55.099606 Write Rank0 MR2 =0xad
1485 00:55:55.099699 [Write Leveling]
1486 00:55:55.103245 delay byte0 byte1 byte2 byte3
1487 00:55:55.103322
1488 00:55:55.103382 10 0 0
1489 00:55:55.106537 11 0 0
1490 00:55:55.106614 12 0 0
1491 00:55:55.109743 13 0 0
1492 00:55:55.109820 14 0 0
1493 00:55:55.113023 15 0 0
1494 00:55:55.113101 16 0 0
1495 00:55:55.113162 17 0 0
1496 00:55:55.116477 18 0 0
1497 00:55:55.116556 19 0 0
1498 00:55:55.119741 20 0 0
1499 00:55:55.119820 21 0 0
1500 00:55:55.123009 22 0 ff
1501 00:55:55.123087 23 0 ff
1502 00:55:55.123148 24 0 ff
1503 00:55:55.126108 25 0 ff
1504 00:55:55.126186 26 0 ff
1505 00:55:55.129417 27 0 ff
1506 00:55:55.129520 28 0 ff
1507 00:55:55.132068 29 0 ff
1508 00:55:55.132146 30 0 ff
1509 00:55:55.135545 31 ff ff
1510 00:55:55.135622 32 ff ff
1511 00:55:55.139083 33 ff ff
1512 00:55:55.139162 34 ff ff
1513 00:55:55.139224 35 ff ff
1514 00:55:55.142328 36 ff ff
1515 00:55:55.142406 37 ff ff
1516 00:55:55.149243 pass bytecount = 0xff (0xff: all bytes pass)
1517 00:55:55.149320
1518 00:55:55.149382 DQS0 dly: 31
1519 00:55:55.149437 DQS1 dly: 22
1520 00:55:55.152363 Write Rank0 MR2 =0x2d
1521 00:55:55.155446 [RankSwap] Rank num 2, (Multi 1), Rank 0
1522 00:55:55.158729 Write Rank1 MR1 =0xd6
1523 00:55:55.158806 [Gating]
1524 00:55:55.158865 ==
1525 00:55:55.165029 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1526 00:55:55.168317 fsp= 1, odt_onoff= 1, Byte mode= 0
1527 00:55:55.168394 ==
1528 00:55:55.171690 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1529 00:55:55.175206 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1530 00:55:55.181976 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1531 00:55:55.185417 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1532 00:55:55.188580 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1533 00:55:55.194903 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1534 00:55:55.197828 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1535 00:55:55.201456 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1536 00:55:55.207675 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1537 00:55:55.211558 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1538 00:55:55.214690 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
1539 00:55:55.221696 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
1540 00:55:55.224223 3 2 16 |504 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1541 00:55:55.227521 3 2 20 |3d3d 404 |(11 11)(11 11) |(1 1)(0 0)| 0
1542 00:55:55.231293 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1543 00:55:55.237676 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1544 00:55:55.241283 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1545 00:55:55.244643 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1546 00:55:55.251063 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1547 00:55:55.254518 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1548 00:55:55.257681 3 3 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1549 00:55:55.264773 3 3 20 |707 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1550 00:55:55.267201 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1551 00:55:55.270810 [Byte 0] Lead/lag Transition tap number (1)
1552 00:55:55.277463 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1553 00:55:55.280777 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1554 00:55:55.283990 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1555 00:55:55.287539 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1556 00:55:55.293922 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1557 00:55:55.297091 3 4 16 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1558 00:55:55.300696 3 4 20 |3d3d 807 |(11 11)(11 11) |(1 1)(1 1)| 0
1559 00:55:55.307065 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 00:55:55.310069 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 00:55:55.313812 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 00:55:55.320682 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1563 00:55:55.323696 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1564 00:55:55.327070 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1565 00:55:55.333655 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1566 00:55:55.336459 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1567 00:55:55.339568 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1568 00:55:55.346409 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1569 00:55:55.349956 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1570 00:55:55.353196 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1571 00:55:55.359385 [Byte 0] Lead/lag falling Transition (3, 6, 4)
1572 00:55:55.362792 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1573 00:55:55.365899 [Byte 0] Lead/lag Transition tap number (2)
1574 00:55:55.369338 [Byte 1] Lead/lag falling Transition (3, 6, 8)
1575 00:55:55.376117 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1576 00:55:55.379227 [Byte 1] Lead/lag Transition tap number (2)
1577 00:55:55.382422 3 6 16 |605 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1578 00:55:55.385774 3 6 20 |404 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1579 00:55:55.392469 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1580 00:55:55.395939 [Byte 0]First pass (3, 6, 24)
1581 00:55:55.396005 [Byte 1]First pass (3, 6, 24)
1582 00:55:55.402288 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1583 00:55:55.405662 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1584 00:55:55.409011 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1585 00:55:55.412310 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1586 00:55:55.415584 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1587 00:55:55.422047 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1588 00:55:55.425335 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1589 00:55:55.428891 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1590 00:55:55.432165 All bytes gating window > 1UI, Early break!
1591 00:55:55.432230
1592 00:55:55.435335 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 8)
1593 00:55:55.435397
1594 00:55:55.442335 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 12)
1595 00:55:55.442401
1596 00:55:55.442456
1597 00:55:55.442508
1598 00:55:55.445144 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1599 00:55:55.445206
1600 00:55:55.448187 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
1601 00:55:55.448252
1602 00:55:55.448305
1603 00:55:55.451579 Write Rank1 MR1 =0x56
1604 00:55:55.451648
1605 00:55:55.455288 best RODT dly(2T, 0.5T) = (2, 3)
1606 00:55:55.455352
1607 00:55:55.458204 best RODT dly(2T, 0.5T) = (2, 3)
1608 00:55:55.458273 ==
1609 00:55:55.461466 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1610 00:55:55.464916 fsp= 1, odt_onoff= 1, Byte mode= 0
1611 00:55:55.464979 ==
1612 00:55:55.471812 Start DQ dly to find pass range UseTestEngine =0
1613 00:55:55.474910 x-axis: bit #, y-axis: DQ dly (-127~63)
1614 00:55:55.474980 RX Vref Scan = 0
1615 00:55:55.478297 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1616 00:55:55.481520 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1617 00:55:55.484762 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1618 00:55:55.487951 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1619 00:55:55.491363 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1620 00:55:55.491432 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1621 00:55:55.494967 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1622 00:55:55.498096 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1623 00:55:55.501511 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1624 00:55:55.504403 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1625 00:55:55.507642 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1626 00:55:55.510976 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1627 00:55:55.514267 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1628 00:55:55.517852 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1629 00:55:55.517945 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1630 00:55:55.521134 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1631 00:55:55.524342 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1632 00:55:55.527664 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1633 00:55:55.531513 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1634 00:55:55.534195 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1635 00:55:55.537461 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1636 00:55:55.537590 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1637 00:55:55.541141 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1638 00:55:55.544309 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1639 00:55:55.547617 -2, [0] xxxoxxxx xxxxxxxx [MSB]
1640 00:55:55.551076 -1, [0] xxxoxxxx xxxxxxxx [MSB]
1641 00:55:55.554285 0, [0] xxxoxoxx xxxoxxxx [MSB]
1642 00:55:55.557344 1, [0] xxxoxoox oxxoxxxx [MSB]
1643 00:55:55.557412 2, [0] xxxoxooo oxxoxxxx [MSB]
1644 00:55:55.560627 3, [0] xoxooooo ooxooxxx [MSB]
1645 00:55:55.564100 4, [0] xoxooooo ooxoooxx [MSB]
1646 00:55:55.567670 5, [0] ooxooooo ooxoooox [MSB]
1647 00:55:55.570737 6, [0] oooooooo ooxooooo [MSB]
1648 00:55:55.574424 7, [0] oooooooo ooxooooo [MSB]
1649 00:55:55.574503 8, [0] oooooooo ooxooooo [MSB]
1650 00:55:55.577394 9, [0] oooooooo ooxooooo [MSB]
1651 00:55:55.580596 33, [0] oooxoxoo oooooooo [MSB]
1652 00:55:55.583746 34, [0] oooxoxoo xooooooo [MSB]
1653 00:55:55.587618 35, [0] oooxoxoo xooxoooo [MSB]
1654 00:55:55.590291 36, [0] oooxoxoo xxoxxooo [MSB]
1655 00:55:55.594360 37, [0] oooxoxxo xxoxxxxo [MSB]
1656 00:55:55.594440 38, [0] xooxoxxx xxoxxxxo [MSB]
1657 00:55:55.596831 39, [0] xxoxoxxx xxoxxxxo [MSB]
1658 00:55:55.600300 40, [0] xxxxoxxx xxoxxxxo [MSB]
1659 00:55:55.603617 41, [0] xxxxxxxx xxoxxxxx [MSB]
1660 00:55:55.606853 42, [0] xxxxxxxx xxoxxxxx [MSB]
1661 00:55:55.610403 43, [0] xxxxxxxx xxxxxxxx [MSB]
1662 00:55:55.614086 iDelay=43, Bit 0, Center 21 (5 ~ 37) 33
1663 00:55:55.616707 iDelay=43, Bit 1, Center 20 (3 ~ 38) 36
1664 00:55:55.620135 iDelay=43, Bit 2, Center 22 (6 ~ 39) 34
1665 00:55:55.623681 iDelay=43, Bit 3, Center 15 (-2 ~ 32) 35
1666 00:55:55.627120 iDelay=43, Bit 4, Center 21 (3 ~ 40) 38
1667 00:55:55.630467 iDelay=43, Bit 5, Center 16 (0 ~ 32) 33
1668 00:55:55.633495 iDelay=43, Bit 6, Center 18 (1 ~ 36) 36
1669 00:55:55.636844 iDelay=43, Bit 7, Center 19 (2 ~ 37) 36
1670 00:55:55.640438 iDelay=43, Bit 8, Center 17 (1 ~ 33) 33
1671 00:55:55.646507 iDelay=43, Bit 9, Center 19 (3 ~ 35) 33
1672 00:55:55.649825 iDelay=43, Bit 10, Center 26 (10 ~ 42) 33
1673 00:55:55.652791 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
1674 00:55:55.656282 iDelay=43, Bit 12, Center 19 (3 ~ 35) 33
1675 00:55:55.659508 iDelay=43, Bit 13, Center 20 (4 ~ 36) 33
1676 00:55:55.663009 iDelay=43, Bit 14, Center 20 (5 ~ 36) 32
1677 00:55:55.666550 iDelay=43, Bit 15, Center 23 (6 ~ 40) 35
1678 00:55:55.666668 ==
1679 00:55:55.672624 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1680 00:55:55.675977 fsp= 1, odt_onoff= 1, Byte mode= 0
1681 00:55:55.676116 ==
1682 00:55:55.676224 DQS Delay:
1683 00:55:55.679315 DQS0 = 0, DQS1 = 0
1684 00:55:55.679452 DQM Delay:
1685 00:55:55.683221 DQM0 = 19, DQM1 = 20
1686 00:55:55.683335 DQ Delay:
1687 00:55:55.685991 DQ0 =21, DQ1 =20, DQ2 =22, DQ3 =15
1688 00:55:55.689345 DQ4 =21, DQ5 =16, DQ6 =18, DQ7 =19
1689 00:55:55.692336 DQ8 =17, DQ9 =19, DQ10 =26, DQ11 =17
1690 00:55:55.695836 DQ12 =19, DQ13 =20, DQ14 =20, DQ15 =23
1691 00:55:55.695912
1692 00:55:55.695972
1693 00:55:55.696027 DramC Write-DBI off
1694 00:55:55.696079 ==
1695 00:55:55.702789 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1696 00:55:55.706079 fsp= 1, odt_onoff= 1, Byte mode= 0
1697 00:55:55.706164 ==
1698 00:55:55.709282 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1699 00:55:55.709405
1700 00:55:55.712139 Begin, DQ Scan Range 918~1174
1701 00:55:55.712260
1702 00:55:55.712375
1703 00:55:55.715741 TX Vref Scan disable
1704 00:55:55.719018 918 |3 4 22|[0] xxxxxxxx xxxxxxxx [MSB]
1705 00:55:55.722582 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1706 00:55:55.725831 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1707 00:55:55.729439 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1708 00:55:55.732269 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1709 00:55:55.735642 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1710 00:55:55.739088 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1711 00:55:55.742169 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1712 00:55:55.748504 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1713 00:55:55.752535 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1714 00:55:55.755632 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1715 00:55:55.759237 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1716 00:55:55.761922 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1717 00:55:55.765055 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1718 00:55:55.768524 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1719 00:55:55.771939 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1720 00:55:55.775581 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1721 00:55:55.778934 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1722 00:55:55.781668 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1723 00:55:55.785018 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1724 00:55:55.788629 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1725 00:55:55.791888 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1726 00:55:55.795054 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1727 00:55:55.801330 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1728 00:55:55.805017 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1729 00:55:55.808212 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1730 00:55:55.811132 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1731 00:55:55.814667 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1732 00:55:55.817698 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1733 00:55:55.821490 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1734 00:55:55.824749 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1735 00:55:55.827653 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1736 00:55:55.831307 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1737 00:55:55.834528 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1738 00:55:55.837928 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1739 00:55:55.841150 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1740 00:55:55.844395 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1741 00:55:55.850702 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1742 00:55:55.854315 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1743 00:55:55.857760 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1744 00:55:55.860896 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1745 00:55:55.863882 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1746 00:55:55.867947 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1747 00:55:55.871007 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1748 00:55:55.873906 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1749 00:55:55.877529 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1750 00:55:55.880898 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1751 00:55:55.884201 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1752 00:55:55.886995 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1753 00:55:55.890280 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1754 00:55:55.893646 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1755 00:55:55.897130 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1756 00:55:55.900407 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1757 00:55:55.903968 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1758 00:55:55.909901 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1759 00:55:55.913299 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1760 00:55:55.916885 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1761 00:55:55.920174 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1762 00:55:55.923460 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1763 00:55:55.926897 977 |3 6 17|[0] xxxoxooo oooooooo [MSB]
1764 00:55:55.929451 978 |3 6 18|[0] xoxooooo oooooooo [MSB]
1765 00:55:55.933021 979 |3 6 19|[0] xoxooooo oooooooo [MSB]
1766 00:55:55.936480 980 |3 6 20|[0] xooooooo oooooooo [MSB]
1767 00:55:55.939777 986 |3 6 26|[0] oooooooo oooxoooo [MSB]
1768 00:55:55.946330 987 |3 6 27|[0] oooooooo xooxoooo [MSB]
1769 00:55:55.950015 988 |3 6 28|[0] oooooooo xxoxoooo [MSB]
1770 00:55:55.953045 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1771 00:55:55.956076 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1772 00:55:55.959555 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1773 00:55:55.962881 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1774 00:55:55.966420 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1775 00:55:55.969382 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1776 00:55:55.972822 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1777 00:55:55.975779 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1778 00:55:55.979716 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
1779 00:55:55.982748 998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]
1780 00:55:55.985726 999 |3 6 39|[0] xxoxxxxx xxxxxxxx [MSB]
1781 00:55:55.989221 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1782 00:55:55.992608 Byte0, DQ PI dly=987, DQM PI dly= 987
1783 00:55:55.998857 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
1784 00:55:55.998989
1785 00:55:56.002326 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
1786 00:55:56.002470
1787 00:55:56.006010 Byte1, DQ PI dly=978, DQM PI dly= 978
1788 00:55:56.013021 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1789 00:55:56.013151
1790 00:55:56.015419 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1791 00:55:56.015526
1792 00:55:56.015603 ==
1793 00:55:56.021990 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1794 00:55:56.022124 fsp= 1, odt_onoff= 1, Byte mode= 0
1795 00:55:56.025644 ==
1796 00:55:56.028799 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1797 00:55:56.028881
1798 00:55:56.032370 Begin, DQ Scan Range 954~1018
1799 00:55:56.032448 Write Rank1 MR14 =0x0
1800 00:55:56.041848
1801 00:55:56.041926 CH=0, VrefRange= 0, VrefLevel = 0
1802 00:55:56.048019 TX Bit0 (983~995) 13 989, Bit8 (968~981) 14 974,
1803 00:55:56.051778 TX Bit1 (982~993) 12 987, Bit9 (971~982) 12 976,
1804 00:55:56.057747 TX Bit2 (983~994) 12 988, Bit10 (975~989) 15 982,
1805 00:55:56.061310 TX Bit3 (977~990) 14 983, Bit11 (969~981) 13 975,
1806 00:55:56.064499 TX Bit4 (981~993) 13 987, Bit12 (971~983) 13 977,
1807 00:55:56.070860 TX Bit5 (978~991) 14 984, Bit13 (971~984) 14 977,
1808 00:55:56.074309 TX Bit6 (978~992) 15 985, Bit14 (972~985) 14 978,
1809 00:55:56.080825 TX Bit7 (980~994) 15 987, Bit15 (975~986) 12 980,
1810 00:55:56.080935
1811 00:55:56.080998 Write Rank1 MR14 =0x2
1812 00:55:56.090243
1813 00:55:56.090371 CH=0, VrefRange= 0, VrefLevel = 2
1814 00:55:56.096522 TX Bit0 (983~996) 14 989, Bit8 (968~982) 15 975,
1815 00:55:56.099823 TX Bit1 (981~994) 14 987, Bit9 (971~983) 13 977,
1816 00:55:56.106744 TX Bit2 (983~995) 13 989, Bit10 (975~989) 15 982,
1817 00:55:56.109802 TX Bit3 (976~990) 15 983, Bit11 (969~981) 13 975,
1818 00:55:56.113366 TX Bit4 (981~994) 14 987, Bit12 (970~983) 14 976,
1819 00:55:56.119686 TX Bit5 (979~992) 14 985, Bit13 (970~984) 15 977,
1820 00:55:56.123336 TX Bit6 (978~992) 15 985, Bit14 (972~986) 15 979,
1821 00:55:56.129818 TX Bit7 (980~995) 16 987, Bit15 (974~987) 14 980,
1822 00:55:56.129906
1823 00:55:56.129966 Write Rank1 MR14 =0x4
1824 00:55:56.139219
1825 00:55:56.139287 CH=0, VrefRange= 0, VrefLevel = 4
1826 00:55:56.145748 TX Bit0 (983~997) 15 990, Bit8 (968~982) 15 975,
1827 00:55:56.148667 TX Bit1 (981~995) 15 988, Bit9 (970~983) 14 976,
1828 00:55:56.155500 TX Bit2 (983~997) 15 990, Bit10 (975~990) 16 982,
1829 00:55:56.159184 TX Bit3 (976~991) 16 983, Bit11 (969~982) 14 975,
1830 00:55:56.161831 TX Bit4 (980~995) 16 987, Bit12 (969~984) 16 976,
1831 00:55:56.168535 TX Bit5 (978~992) 15 985, Bit13 (970~985) 16 977,
1832 00:55:56.171797 TX Bit6 (978~993) 16 985, Bit14 (971~987) 17 979,
1833 00:55:56.175198 TX Bit7 (979~995) 17 987, Bit15 (975~988) 14 981,
1834 00:55:56.178540
1835 00:55:56.178610 Write Rank1 MR14 =0x6
1836 00:55:56.187826
1837 00:55:56.187923 CH=0, VrefRange= 0, VrefLevel = 6
1838 00:55:56.194578 TX Bit0 (983~997) 15 990, Bit8 (967~983) 17 975,
1839 00:55:56.197497 TX Bit1 (980~996) 17 988, Bit9 (970~984) 15 977,
1840 00:55:56.203996 TX Bit2 (982~998) 17 990, Bit10 (974~990) 17 982,
1841 00:55:56.207483 TX Bit3 (976~991) 16 983, Bit11 (968~983) 16 975,
1842 00:55:56.210914 TX Bit4 (980~996) 17 988, Bit12 (970~984) 15 977,
1843 00:55:56.217492 TX Bit5 (977~993) 17 985, Bit13 (970~985) 16 977,
1844 00:55:56.220983 TX Bit6 (977~993) 17 985, Bit14 (970~988) 19 979,
1845 00:55:56.227707 TX Bit7 (979~996) 18 987, Bit15 (974~989) 16 981,
1846 00:55:56.227806
1847 00:55:56.227892 Write Rank1 MR14 =0x8
1848 00:55:56.236787
1849 00:55:56.236895 CH=0, VrefRange= 0, VrefLevel = 8
1850 00:55:56.243542 TX Bit0 (982~998) 17 990, Bit8 (967~983) 17 975,
1851 00:55:56.246511 TX Bit1 (980~997) 18 988, Bit9 (969~984) 16 976,
1852 00:55:56.252908 TX Bit2 (982~998) 17 990, Bit10 (974~990) 17 982,
1853 00:55:56.256279 TX Bit3 (975~991) 17 983, Bit11 (968~983) 16 975,
1854 00:55:56.259840 TX Bit4 (981~997) 17 989, Bit12 (969~985) 17 977,
1855 00:55:56.266709 TX Bit5 (977~993) 17 985, Bit13 (969~986) 18 977,
1856 00:55:56.269295 TX Bit6 (977~995) 19 986, Bit14 (971~989) 19 980,
1857 00:55:56.276205 TX Bit7 (978~998) 21 988, Bit15 (974~989) 16 981,
1858 00:55:56.276484
1859 00:55:56.276729 Write Rank1 MR14 =0xa
1860 00:55:56.285819
1861 00:55:56.289392 CH=0, VrefRange= 0, VrefLevel = 10
1862 00:55:56.292485 TX Bit0 (982~998) 17 990, Bit8 (967~984) 18 975,
1863 00:55:56.295725 TX Bit1 (980~998) 19 989, Bit9 (969~985) 17 977,
1864 00:55:56.302396 TX Bit2 (982~999) 18 990, Bit10 (974~991) 18 982,
1865 00:55:56.305640 TX Bit3 (975~992) 18 983, Bit11 (967~983) 17 975,
1866 00:55:56.309049 TX Bit4 (979~997) 19 988, Bit12 (968~986) 19 977,
1867 00:55:56.315485 TX Bit5 (977~994) 18 985, Bit13 (968~987) 20 977,
1868 00:55:56.319588 TX Bit6 (977~995) 19 986, Bit14 (969~989) 21 979,
1869 00:55:56.325349 TX Bit7 (978~998) 21 988, Bit15 (973~990) 18 981,
1870 00:55:56.325737
1871 00:55:56.326098 Write Rank1 MR14 =0xc
1872 00:55:56.334967
1873 00:55:56.338308 CH=0, VrefRange= 0, VrefLevel = 12
1874 00:55:56.341699 TX Bit0 (982~999) 18 990, Bit8 (967~985) 19 976,
1875 00:55:56.345396 TX Bit1 (978~998) 21 988, Bit9 (968~986) 19 977,
1876 00:55:56.351640 TX Bit2 (981~999) 19 990, Bit10 (973~992) 20 982,
1877 00:55:56.355389 TX Bit3 (975~992) 18 983, Bit11 (967~984) 18 975,
1878 00:55:56.357816 TX Bit4 (979~998) 20 988, Bit12 (968~986) 19 977,
1879 00:55:56.364709 TX Bit5 (977~995) 19 986, Bit13 (968~988) 21 978,
1880 00:55:56.368160 TX Bit6 (977~997) 21 987, Bit14 (969~990) 22 979,
1881 00:55:56.374368 TX Bit7 (978~999) 22 988, Bit15 (973~990) 18 981,
1882 00:55:56.374694
1883 00:55:56.374985 Write Rank1 MR14 =0xe
1884 00:55:56.384247
1885 00:55:56.387525 CH=0, VrefRange= 0, VrefLevel = 14
1886 00:55:56.390574 TX Bit0 (981~999) 19 990, Bit8 (967~985) 19 976,
1887 00:55:56.394406 TX Bit1 (978~999) 22 988, Bit9 (968~987) 20 977,
1888 00:55:56.400706 TX Bit2 (981~999) 19 990, Bit10 (973~992) 20 982,
1889 00:55:56.404449 TX Bit3 (975~992) 18 983, Bit11 (967~984) 18 975,
1890 00:55:56.407417 TX Bit4 (978~998) 21 988, Bit12 (968~988) 21 978,
1891 00:55:56.414173 TX Bit5 (976~996) 21 986, Bit13 (968~988) 21 978,
1892 00:55:56.417447 TX Bit6 (977~997) 21 987, Bit14 (968~990) 23 979,
1893 00:55:56.423893 TX Bit7 (978~999) 22 988, Bit15 (973~990) 18 981,
1894 00:55:56.423970
1895 00:55:56.424030 Write Rank1 MR14 =0x10
1896 00:55:56.433872
1897 00:55:56.437377 CH=0, VrefRange= 0, VrefLevel = 16
1898 00:55:56.440260 TX Bit0 (980~999) 20 989, Bit8 (966~985) 20 975,
1899 00:55:56.443482 TX Bit1 (978~999) 22 988, Bit9 (968~987) 20 977,
1900 00:55:56.450110 TX Bit2 (981~1000) 20 990, Bit10 (973~992) 20 982,
1901 00:55:56.453846 TX Bit3 (974~993) 20 983, Bit11 (967~985) 19 976,
1902 00:55:56.457269 TX Bit4 (978~999) 22 988, Bit12 (968~989) 22 978,
1903 00:55:56.463400 TX Bit5 (976~997) 22 986, Bit13 (968~989) 22 978,
1904 00:55:56.466503 TX Bit6 (976~998) 23 987, Bit14 (968~990) 23 979,
1905 00:55:56.473366 TX Bit7 (977~1000) 24 988, Bit15 (973~991) 19 982,
1906 00:55:56.473490
1907 00:55:56.473624 Write Rank1 MR14 =0x12
1908 00:55:56.483112
1909 00:55:56.486510 CH=0, VrefRange= 0, VrefLevel = 18
1910 00:55:56.490036 TX Bit0 (981~1000) 20 990, Bit8 (966~986) 21 976,
1911 00:55:56.493294 TX Bit1 (978~1000) 23 989, Bit9 (968~988) 21 978,
1912 00:55:56.499751 TX Bit2 (980~1000) 21 990, Bit10 (973~993) 21 983,
1913 00:55:56.503204 TX Bit3 (974~993) 20 983, Bit11 (967~985) 19 976,
1914 00:55:56.506388 TX Bit4 (978~999) 22 988, Bit12 (968~989) 22 978,
1915 00:55:56.513563 TX Bit5 (976~997) 22 986, Bit13 (968~989) 22 978,
1916 00:55:56.516458 TX Bit6 (976~998) 23 987, Bit14 (968~990) 23 979,
1917 00:55:56.522960 TX Bit7 (977~1000) 24 988, Bit15 (973~992) 20 982,
1918 00:55:56.523294
1919 00:55:56.523552 Write Rank1 MR14 =0x14
1920 00:55:56.533634
1921 00:55:56.536716 CH=0, VrefRange= 0, VrefLevel = 20
1922 00:55:56.539995 TX Bit0 (980~1000) 21 990, Bit8 (966~988) 23 977,
1923 00:55:56.543697 TX Bit1 (978~1000) 23 989, Bit9 (967~989) 23 978,
1924 00:55:56.550141 TX Bit2 (979~1001) 23 990, Bit10 (972~994) 23 983,
1925 00:55:56.552893 TX Bit3 (974~994) 21 984, Bit11 (966~987) 22 976,
1926 00:55:56.556194 TX Bit4 (977~999) 23 988, Bit12 (968~989) 22 978,
1927 00:55:56.563302 TX Bit5 (976~997) 22 986, Bit13 (968~990) 23 979,
1928 00:55:56.566748 TX Bit6 (976~999) 24 987, Bit14 (968~991) 24 979,
1929 00:55:56.573046 TX Bit7 (977~1000) 24 988, Bit15 (972~993) 22 982,
1930 00:55:56.573407
1931 00:55:56.573752 Write Rank1 MR14 =0x16
1932 00:55:56.583419
1933 00:55:56.586884 CH=0, VrefRange= 0, VrefLevel = 22
1934 00:55:56.590304 TX Bit0 (979~1001) 23 990, Bit8 (965~988) 24 976,
1935 00:55:56.593521 TX Bit1 (977~1000) 24 988, Bit9 (967~989) 23 978,
1936 00:55:56.599787 TX Bit2 (979~1001) 23 990, Bit10 (972~995) 24 983,
1937 00:55:56.603221 TX Bit3 (973~995) 23 984, Bit11 (966~988) 23 977,
1938 00:55:56.606333 TX Bit4 (977~1000) 24 988, Bit12 (967~990) 24 978,
1939 00:55:56.613052 TX Bit5 (976~998) 23 987, Bit13 (967~990) 24 978,
1940 00:55:56.616498 TX Bit6 (976~999) 24 987, Bit14 (968~991) 24 979,
1941 00:55:56.623410 TX Bit7 (977~1001) 25 989, Bit15 (972~993) 22 982,
1942 00:55:56.623744
1943 00:55:56.624002 Write Rank1 MR14 =0x18
1944 00:55:56.633478
1945 00:55:56.636813 CH=0, VrefRange= 0, VrefLevel = 24
1946 00:55:56.640034 TX Bit0 (979~1002) 24 990, Bit8 (965~988) 24 976,
1947 00:55:56.643307 TX Bit1 (977~1000) 24 988, Bit9 (967~989) 23 978,
1948 00:55:56.649954 TX Bit2 (979~1001) 23 990, Bit10 (971~996) 26 983,
1949 00:55:56.653384 TX Bit3 (973~995) 23 984, Bit11 (966~989) 24 977,
1950 00:55:56.656496 TX Bit4 (977~1000) 24 988, Bit12 (967~990) 24 978,
1951 00:55:56.662989 TX Bit5 (976~998) 23 987, Bit13 (967~989) 23 978,
1952 00:55:56.666474 TX Bit6 (976~999) 24 987, Bit14 (967~991) 25 979,
1953 00:55:56.673248 TX Bit7 (977~1001) 25 989, Bit15 (971~993) 23 982,
1954 00:55:56.673735
1955 00:55:56.674144 Write Rank1 MR14 =0x1a
1956 00:55:56.684170
1957 00:55:56.686892 CH=0, VrefRange= 0, VrefLevel = 26
1958 00:55:56.690473 TX Bit0 (978~1002) 25 990, Bit8 (965~988) 24 976,
1959 00:55:56.693954 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1960 00:55:56.700047 TX Bit2 (978~1002) 25 990, Bit10 (971~996) 26 983,
1961 00:55:56.703407 TX Bit3 (973~996) 24 984, Bit11 (966~989) 24 977,
1962 00:55:56.709608 TX Bit4 (977~1001) 25 989, Bit12 (967~990) 24 978,
1963 00:55:56.713085 TX Bit5 (975~998) 24 986, Bit13 (967~989) 23 978,
1964 00:55:56.716386 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1965 00:55:56.723418 TX Bit7 (976~1001) 26 988, Bit15 (970~993) 24 981,
1966 00:55:56.723816
1967 00:55:56.724100 Write Rank1 MR14 =0x1c
1968 00:55:56.734033
1969 00:55:56.737003 CH=0, VrefRange= 0, VrefLevel = 28
1970 00:55:56.740349 TX Bit0 (978~1002) 25 990, Bit8 (965~988) 24 976,
1971 00:55:56.743962 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1972 00:55:56.750649 TX Bit2 (978~1002) 25 990, Bit10 (971~996) 26 983,
1973 00:55:56.753535 TX Bit3 (973~996) 24 984, Bit11 (966~989) 24 977,
1974 00:55:56.757007 TX Bit4 (977~1001) 25 989, Bit12 (967~990) 24 978,
1975 00:55:56.763741 TX Bit5 (975~998) 24 986, Bit13 (967~989) 23 978,
1976 00:55:56.766940 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1977 00:55:56.773241 TX Bit7 (976~1001) 26 988, Bit15 (970~993) 24 981,
1978 00:55:56.773597
1979 00:55:56.773898 Write Rank1 MR14 =0x1e
1980 00:55:56.784225
1981 00:55:56.787298 CH=0, VrefRange= 0, VrefLevel = 30
1982 00:55:56.790777 TX Bit0 (978~1002) 25 990, Bit8 (965~988) 24 976,
1983 00:55:56.794590 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1984 00:55:56.801154 TX Bit2 (978~1002) 25 990, Bit10 (971~996) 26 983,
1985 00:55:56.803679 TX Bit3 (973~996) 24 984, Bit11 (966~989) 24 977,
1986 00:55:56.810649 TX Bit4 (977~1001) 25 989, Bit12 (967~990) 24 978,
1987 00:55:56.813963 TX Bit5 (975~998) 24 986, Bit13 (967~989) 23 978,
1988 00:55:56.817474 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1989 00:55:56.823623 TX Bit7 (976~1001) 26 988, Bit15 (970~993) 24 981,
1990 00:55:56.823996
1991 00:55:56.824279 Write Rank1 MR14 =0x20
1992 00:55:56.834380
1993 00:55:56.834739 CH=0, VrefRange= 0, VrefLevel = 32
1994 00:55:56.841240 TX Bit0 (978~1002) 25 990, Bit8 (965~988) 24 976,
1995 00:55:56.844788 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1996 00:55:56.851302 TX Bit2 (978~1002) 25 990, Bit10 (971~996) 26 983,
1997 00:55:56.854345 TX Bit3 (973~996) 24 984, Bit11 (966~989) 24 977,
1998 00:55:56.857844 TX Bit4 (977~1001) 25 989, Bit12 (967~990) 24 978,
1999 00:55:56.864606 TX Bit5 (975~998) 24 986, Bit13 (967~989) 23 978,
2000 00:55:56.867587 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
2001 00:55:56.874178 TX Bit7 (976~1001) 26 988, Bit15 (970~993) 24 981,
2002 00:55:56.874541
2003 00:55:56.874820 Write Rank1 MR14 =0x22
2004 00:55:56.884650
2005 00:55:56.888290 CH=0, VrefRange= 0, VrefLevel = 34
2006 00:55:56.890945 TX Bit0 (978~1002) 25 990, Bit8 (965~988) 24 976,
2007 00:55:56.894480 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
2008 00:55:56.901066 TX Bit2 (978~1002) 25 990, Bit10 (971~996) 26 983,
2009 00:55:56.904380 TX Bit3 (973~996) 24 984, Bit11 (966~989) 24 977,
2010 00:55:56.911060 TX Bit4 (977~1001) 25 989, Bit12 (967~990) 24 978,
2011 00:55:56.914297 TX Bit5 (975~998) 24 986, Bit13 (967~989) 23 978,
2012 00:55:56.917592 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
2013 00:55:56.924537 TX Bit7 (976~1001) 26 988, Bit15 (970~993) 24 981,
2014 00:55:56.924902
2015 00:55:56.925189
2016 00:55:56.927158 TX Vref found, early break! 365< 372
2017 00:55:56.930546 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2018 00:55:56.934018 u1DelayCellOfst[0]=7 cells (6 PI)
2019 00:55:56.937451 u1DelayCellOfst[1]=6 cells (5 PI)
2020 00:55:56.940712 u1DelayCellOfst[2]=7 cells (6 PI)
2021 00:55:56.944168 u1DelayCellOfst[3]=0 cells (0 PI)
2022 00:55:56.946843 u1DelayCellOfst[4]=6 cells (5 PI)
2023 00:55:56.950524 u1DelayCellOfst[5]=2 cells (2 PI)
2024 00:55:56.953673 u1DelayCellOfst[6]=3 cells (3 PI)
2025 00:55:56.956866 u1DelayCellOfst[7]=5 cells (4 PI)
2026 00:55:56.960643 Byte0, DQ PI dly=984, DQM PI dly= 987
2027 00:55:56.963248 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
2028 00:55:56.963634
2029 00:55:56.966909 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
2030 00:55:56.967275
2031 00:55:56.970239 u1DelayCellOfst[8]=0 cells (0 PI)
2032 00:55:56.973618 u1DelayCellOfst[9]=2 cells (2 PI)
2033 00:55:56.976961 u1DelayCellOfst[10]=9 cells (7 PI)
2034 00:55:56.980421 u1DelayCellOfst[11]=1 cells (1 PI)
2035 00:55:56.983815 u1DelayCellOfst[12]=2 cells (2 PI)
2036 00:55:56.987133 u1DelayCellOfst[13]=2 cells (2 PI)
2037 00:55:56.990488 u1DelayCellOfst[14]=3 cells (3 PI)
2038 00:55:56.993195 u1DelayCellOfst[15]=6 cells (5 PI)
2039 00:55:56.996630 Byte1, DQ PI dly=976, DQM PI dly= 979
2040 00:55:57.000138 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2041 00:55:57.000559
2042 00:55:57.003562 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2043 00:55:57.006471
2044 00:55:57.006850 Write Rank1 MR14 =0x1a
2045 00:55:57.007145
2046 00:55:57.009808 Final TX Range 0 Vref 26
2047 00:55:57.010186
2048 00:55:57.016206 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2049 00:55:57.016507
2050 00:55:57.022535 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2051 00:55:57.029517 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2052 00:55:57.035818 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2053 00:55:57.039402 Write Rank1 MR3 =0xb0
2054 00:55:57.039535 DramC Write-DBI on
2055 00:55:57.039619 ==
2056 00:55:57.045558 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2057 00:55:57.049085 fsp= 1, odt_onoff= 1, Byte mode= 0
2058 00:55:57.049188 ==
2059 00:55:57.051883 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2060 00:55:57.051998
2061 00:55:57.055321 Begin, DQ Scan Range 699~763
2062 00:55:57.055399
2063 00:55:57.055459
2064 00:55:57.058638 TX Vref Scan disable
2065 00:55:57.062305 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2066 00:55:57.065503 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2067 00:55:57.068832 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2068 00:55:57.071925 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2069 00:55:57.075220 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2070 00:55:57.079010 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2071 00:55:57.082239 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2072 00:55:57.085029 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2073 00:55:57.088656 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2074 00:55:57.091755 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2075 00:55:57.095238 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2076 00:55:57.098620 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2077 00:55:57.105442 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2078 00:55:57.108490 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2079 00:55:57.111863 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2080 00:55:57.114763 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2081 00:55:57.118038 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2082 00:55:57.121382 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2083 00:55:57.124919 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2084 00:55:57.128322 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2085 00:55:57.131134 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2086 00:55:57.134567 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2087 00:55:57.142530 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
2088 00:55:57.145924 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2089 00:55:57.148932 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2090 00:55:57.152340 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2091 00:55:57.155921 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2092 00:55:57.159097 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2093 00:55:57.162280 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2094 00:55:57.165809 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2095 00:55:57.169155 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2096 00:55:57.171946 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2097 00:55:57.175459 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2098 00:55:57.178602 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2099 00:55:57.181941 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2100 00:55:57.185433 Byte0, DQ PI dly=733, DQM PI dly= 733
2101 00:55:57.191984 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
2102 00:55:57.192516
2103 00:55:57.194877 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
2104 00:55:57.195272
2105 00:55:57.198169 Byte1, DQ PI dly=722, DQM PI dly= 722
2106 00:55:57.205207 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2107 00:55:57.205743
2108 00:55:57.208460 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2109 00:55:57.208865
2110 00:55:57.214796 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2111 00:55:57.221907 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2112 00:55:57.228392 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2113 00:55:57.231271 Write Rank1 MR3 =0x30
2114 00:55:57.231669 DramC Write-DBI off
2115 00:55:57.231976
2116 00:55:57.234884 [DATLAT]
2117 00:55:57.238155 Freq=1600, CH0 RK1, use_rxtx_scan=0
2118 00:55:57.238556
2119 00:55:57.238868 DATLAT Default: 0x10
2120 00:55:57.241044 7, 0xFFFF, sum=0
2121 00:55:57.241497 8, 0xFFFF, sum=0
2122 00:55:57.244373 9, 0xFFFF, sum=0
2123 00:55:57.244893 10, 0xFFFF, sum=0
2124 00:55:57.247932 11, 0xFFFF, sum=0
2125 00:55:57.248334 12, 0xFFFF, sum=0
2126 00:55:57.251199 13, 0xFFFF, sum=0
2127 00:55:57.251603 14, 0x0, sum=1
2128 00:55:57.251938 15, 0x0, sum=2
2129 00:55:57.254653 16, 0x0, sum=3
2130 00:55:57.255113 17, 0x0, sum=4
2131 00:55:57.260755 pattern=2 first_step=14 total pass=5 best_step=16
2132 00:55:57.261155 ==
2133 00:55:57.264451 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2134 00:55:57.267716 fsp= 1, odt_onoff= 1, Byte mode= 0
2135 00:55:57.268198 ==
2136 00:55:57.271012 Start DQ dly to find pass range UseTestEngine =1
2137 00:55:57.277373 x-axis: bit #, y-axis: DQ dly (-127~63)
2138 00:55:57.277856 RX Vref Scan = 0
2139 00:55:57.280843 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2140 00:55:57.284172 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2141 00:55:57.287471 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2142 00:55:57.290598 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2143 00:55:57.291000 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2144 00:55:57.294437 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2145 00:55:57.297338 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2146 00:55:57.300855 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2147 00:55:57.304208 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2148 00:55:57.307467 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2149 00:55:57.310775 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2150 00:55:57.314136 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2151 00:55:57.317472 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2152 00:55:57.317921 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2153 00:55:57.320227 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2154 00:55:57.323700 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2155 00:55:57.326711 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2156 00:55:57.330329 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2157 00:55:57.333661 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2158 00:55:57.336963 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2159 00:55:57.340323 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2160 00:55:57.340794 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2161 00:55:57.343790 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2162 00:55:57.347210 -3, [0] xxxoxxxx xxxxxxxx [MSB]
2163 00:55:57.349916 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2164 00:55:57.353258 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2165 00:55:57.356732 0, [0] xxxoxoxx oxxoxxxx [MSB]
2166 00:55:57.360166 1, [0] xxxoxoox oxxoxxxx [MSB]
2167 00:55:57.360524 2, [0] xxxoxoox ooxoxxxx [MSB]
2168 00:55:57.363472 3, [0] xoxoxoox ooxoooxx [MSB]
2169 00:55:57.366927 4, [0] ooxoxooo ooxoooxx [MSB]
2170 00:55:57.370338 5, [0] oooooooo ooxoooox [MSB]
2171 00:55:57.373144 6, [0] oooooooo ooxooooo [MSB]
2172 00:55:57.376393 7, [0] oooooooo ooxooooo [MSB]
2173 00:55:57.376738 8, [0] oooooooo ooxooooo [MSB]
2174 00:55:57.381639 32, [0] oooxoooo oooooooo [MSB]
2175 00:55:57.384981 33, [0] oooxoxoo oooooooo [MSB]
2176 00:55:57.388306 34, [0] oooxoxoo xooxoooo [MSB]
2177 00:55:57.391820 35, [0] oooxoxoo xooxoooo [MSB]
2178 00:55:57.394614 36, [0] oooxoxxo xxoxoooo [MSB]
2179 00:55:57.398142 37, [0] oooxoxxo xxoxxxoo [MSB]
2180 00:55:57.401371 38, [0] oooxoxxx xxoxxxxo [MSB]
2181 00:55:57.401801 39, [0] xooxxxxx xxoxxxxo [MSB]
2182 00:55:57.404630 40, [0] xxoxxxxx xxoxxxxo [MSB]
2183 00:55:57.408183 41, [0] xxxxxxxx xxoxxxxx [MSB]
2184 00:55:57.411255 42, [0] xxxxxxxx xxoxxxxx [MSB]
2185 00:55:57.414644 43, [0] xxxxxxxx xxxxxxxx [MSB]
2186 00:55:57.418146 iDelay=43, Bit 0, Center 21 (4 ~ 38) 35
2187 00:55:57.420848 iDelay=43, Bit 1, Center 21 (3 ~ 39) 37
2188 00:55:57.424034 iDelay=43, Bit 2, Center 22 (5 ~ 40) 36
2189 00:55:57.427129 iDelay=43, Bit 3, Center 14 (-3 ~ 31) 35
2190 00:55:57.430927 iDelay=43, Bit 4, Center 21 (5 ~ 38) 34
2191 00:55:57.433804 iDelay=43, Bit 5, Center 16 (0 ~ 32) 33
2192 00:55:57.437147 iDelay=43, Bit 6, Center 18 (1 ~ 35) 35
2193 00:55:57.440526 iDelay=43, Bit 7, Center 20 (4 ~ 37) 34
2194 00:55:57.447169 iDelay=43, Bit 8, Center 16 (0 ~ 33) 34
2195 00:55:57.450496 iDelay=43, Bit 9, Center 18 (2 ~ 35) 34
2196 00:55:57.453612 iDelay=43, Bit 10, Center 25 (9 ~ 42) 34
2197 00:55:57.457212 iDelay=43, Bit 11, Center 16 (0 ~ 33) 34
2198 00:55:57.460090 iDelay=43, Bit 12, Center 19 (3 ~ 36) 34
2199 00:55:57.463633 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
2200 00:55:57.467058 iDelay=43, Bit 14, Center 21 (5 ~ 37) 33
2201 00:55:57.470557 iDelay=43, Bit 15, Center 23 (6 ~ 40) 35
2202 00:55:57.470948 ==
2203 00:55:57.476823 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2204 00:55:57.480492 fsp= 1, odt_onoff= 1, Byte mode= 0
2205 00:55:57.480884 ==
2206 00:55:57.481192 DQS Delay:
2207 00:55:57.483139 DQS0 = 0, DQS1 = 0
2208 00:55:57.483599 DQM Delay:
2209 00:55:57.486708 DQM0 = 19, DQM1 = 19
2210 00:55:57.487122 DQ Delay:
2211 00:55:57.490061 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14
2212 00:55:57.493183 DQ4 =21, DQ5 =16, DQ6 =18, DQ7 =20
2213 00:55:57.496737 DQ8 =16, DQ9 =18, DQ10 =25, DQ11 =16
2214 00:55:57.500165 DQ12 =19, DQ13 =19, DQ14 =21, DQ15 =23
2215 00:55:57.500633
2216 00:55:57.500954
2217 00:55:57.501235
2218 00:55:57.503028 [DramC_TX_OE_Calibration] TA2
2219 00:55:57.506463 Original DQ_B0 (3 6) =30, OEN = 27
2220 00:55:57.509825 Original DQ_B1 (3 6) =30, OEN = 27
2221 00:55:57.510286 23, 0x0, End_B0=23 End_B1=23
2222 00:55:57.513111 24, 0x0, End_B0=24 End_B1=24
2223 00:55:57.516452 25, 0x0, End_B0=25 End_B1=25
2224 00:55:57.519724 26, 0x0, End_B0=26 End_B1=26
2225 00:55:57.522939 27, 0x0, End_B0=27 End_B1=27
2226 00:55:57.523373 28, 0x0, End_B0=28 End_B1=28
2227 00:55:57.526496 29, 0x0, End_B0=29 End_B1=29
2228 00:55:57.530134 30, 0x0, End_B0=30 End_B1=30
2229 00:55:57.532817 31, 0xFFFF, End_B0=30 End_B1=30
2230 00:55:57.536447 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2231 00:55:57.543035 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2232 00:55:57.543427
2233 00:55:57.543750
2234 00:55:57.545815 Write Rank1 MR23 =0x3f
2235 00:55:57.546202 [DQSOSC]
2236 00:55:57.556251 [DQSOSCAuto] RK1, (LSB)MR18= 0xb4b4, (MSB)MR19= 0x202, tDQSOscB0 = 455 ps tDQSOscB1 = 455 ps
2237 00:55:57.559407 CH0_RK1: MR19=0x202, MR18=0xB4B4, DQSOSC=455, MR23=63, INC=11, DEC=17
2238 00:55:57.562543 Write Rank1 MR23 =0x3f
2239 00:55:57.562786 [DQSOSC]
2240 00:55:57.572515 [DQSOSCAuto] RK1, (LSB)MR18= 0xb1b1, (MSB)MR19= 0x202, tDQSOscB0 = 457 ps tDQSOscB1 = 457 ps
2241 00:55:57.575471 CH0 RK1: MR19=202, MR18=B1B1
2242 00:55:57.575678 [RxdqsGatingPostProcess] freq 1600
2243 00:55:57.582318 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2244 00:55:57.582524 Rank: 0
2245 00:55:57.585575 best DQS0 dly(2T, 0.5T) = (2, 6)
2246 00:55:57.588684 best DQS1 dly(2T, 0.5T) = (2, 6)
2247 00:55:57.591914 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2248 00:55:57.595788 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2249 00:55:57.596004 Rank: 1
2250 00:55:57.598982 best DQS0 dly(2T, 0.5T) = (2, 6)
2251 00:55:57.602122 best DQS1 dly(2T, 0.5T) = (2, 6)
2252 00:55:57.605603 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2253 00:55:57.609044 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2254 00:55:57.615294 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2255 00:55:57.618664 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2256 00:55:57.622008 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2257 00:55:57.625320 Write Rank0 MR13 =0x59
2258 00:55:57.625778 ==
2259 00:55:57.628834 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2260 00:55:57.632353 fsp= 1, odt_onoff= 1, Byte mode= 0
2261 00:55:57.632730 ==
2262 00:55:57.634750 === u2Vref_new: 0x56 --> 0x3a
2263 00:55:57.638314 === u2Vref_new: 0x58 --> 0x58
2264 00:55:57.641980 === u2Vref_new: 0x5a --> 0x5a
2265 00:55:57.645073 === u2Vref_new: 0x5c --> 0x78
2266 00:55:57.648628 === u2Vref_new: 0x5e --> 0x7a
2267 00:55:57.651513 === u2Vref_new: 0x60 --> 0x90
2268 00:55:57.654852 [CA 0] Center 37 (12~63) winsize 52
2269 00:55:57.658180 [CA 1] Center 37 (11~63) winsize 53
2270 00:55:57.661673 [CA 2] Center 35 (7~63) winsize 57
2271 00:55:57.664747 [CA 3] Center 35 (8~63) winsize 56
2272 00:55:57.667908 [CA 4] Center 34 (5~63) winsize 59
2273 00:55:57.671315 [CA 5] Center 28 (-1~57) winsize 59
2274 00:55:57.671480
2275 00:55:57.673960 [CATrainingPosCal] consider 1 rank data
2276 00:55:57.677434 u2DelayCellTimex100 = 744/100 ps
2277 00:55:57.680798 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2278 00:55:57.684114 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2279 00:55:57.687393 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2280 00:55:57.690802 CA3 delay=35 (8~63),Diff = 7 PI (9 cell)
2281 00:55:57.693954 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2282 00:55:57.697182 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2283 00:55:57.697269
2284 00:55:57.703885 CA PerBit enable=1, Macro0, CA PI delay=28
2285 00:55:57.703965 === u2Vref_new: 0x5c --> 0x78
2286 00:55:57.704035
2287 00:55:57.707390 Vref(ca) range 1: 28
2288 00:55:57.707466
2289 00:55:57.710748 CS Dly= 10 (41-0-32)
2290 00:55:57.710823 Write Rank0 MR13 =0xd8
2291 00:55:57.713798 Write Rank0 MR13 =0xd8
2292 00:55:57.717003 Write Rank0 MR12 =0x5c
2293 00:55:57.717079 Write Rank1 MR13 =0x59
2294 00:55:57.717137 ==
2295 00:55:57.723830 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2296 00:55:57.726901 fsp= 1, odt_onoff= 1, Byte mode= 0
2297 00:55:57.726977 ==
2298 00:55:57.730577 === u2Vref_new: 0x56 --> 0x3a
2299 00:55:57.733853 === u2Vref_new: 0x58 --> 0x58
2300 00:55:57.733930 === u2Vref_new: 0x5a --> 0x5a
2301 00:55:57.737434 === u2Vref_new: 0x5c --> 0x78
2302 00:55:57.740827 === u2Vref_new: 0x5e --> 0x7a
2303 00:55:57.743813 === u2Vref_new: 0x60 --> 0x90
2304 00:55:57.747029 [CA 0] Center 37 (11~63) winsize 53
2305 00:55:57.750383 [CA 1] Center 37 (11~63) winsize 53
2306 00:55:57.753808 [CA 2] Center 34 (6~63) winsize 58
2307 00:55:57.757328 [CA 3] Center 35 (7~63) winsize 57
2308 00:55:57.760052 [CA 4] Center 34 (6~63) winsize 58
2309 00:55:57.763632 [CA 5] Center 28 (-1~57) winsize 59
2310 00:55:57.763756
2311 00:55:57.767013 [CATrainingPosCal] consider 2 rank data
2312 00:55:57.770356 u2DelayCellTimex100 = 744/100 ps
2313 00:55:57.773917 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2314 00:55:57.777110 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2315 00:55:57.783369 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2316 00:55:57.786693 CA3 delay=35 (8~63),Diff = 7 PI (9 cell)
2317 00:55:57.790161 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2318 00:55:57.793646 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2319 00:55:57.794016
2320 00:55:57.796785 CA PerBit enable=1, Macro0, CA PI delay=28
2321 00:55:57.800136 === u2Vref_new: 0x5c --> 0x78
2322 00:55:57.800535
2323 00:55:57.802890 Vref(ca) range 1: 28
2324 00:55:57.803279
2325 00:55:57.803584 CS Dly= 9 (40-0-32)
2326 00:55:57.806312 Write Rank1 MR13 =0xd8
2327 00:55:57.806703 Write Rank1 MR13 =0xd8
2328 00:55:57.809979 Write Rank1 MR12 =0x5c
2329 00:55:57.813145 [RankSwap] Rank num 2, (Multi 1), Rank 0
2330 00:55:57.816505 Write Rank0 MR2 =0xad
2331 00:55:57.816897 [Write Leveling]
2332 00:55:57.820160 delay byte0 byte1 byte2 byte3
2333 00:55:57.820548
2334 00:55:57.822903 10 0 0
2335 00:55:57.823299 11 0 0
2336 00:55:57.823621 12 0 0
2337 00:55:57.826416 13 0 0
2338 00:55:57.826811 14 0 0
2339 00:55:57.829700 15 0 0
2340 00:55:57.830153 16 0 0
2341 00:55:57.832863 17 0 0
2342 00:55:57.833258 18 0 0
2343 00:55:57.833611 19 0 0
2344 00:55:57.835871 20 0 0
2345 00:55:57.836265 21 0 0
2346 00:55:57.838952 22 0 0
2347 00:55:57.839349 23 0 0
2348 00:55:57.839660 24 0 0
2349 00:55:57.842517 25 0 0
2350 00:55:57.842920 26 0 0
2351 00:55:57.845839 27 0 0
2352 00:55:57.846241 28 0 0
2353 00:55:57.849057 29 0 0
2354 00:55:57.849516 30 0 0
2355 00:55:57.849914 31 0 0
2356 00:55:57.852569 32 0 0
2357 00:55:57.853082 33 0 0
2358 00:55:57.855935 34 0 ff
2359 00:55:57.856450 35 0 ff
2360 00:55:57.859051 36 ff ff
2361 00:55:57.859457 37 ff ff
2362 00:55:57.862503 38 ff ff
2363 00:55:57.862903 39 ff ff
2364 00:55:57.863343 40 ff ff
2365 00:55:57.865373 41 ff ff
2366 00:55:57.865821 42 ff ff
2367 00:55:57.871936 pass bytecount = 0xff (0xff: all bytes pass)
2368 00:55:57.872437
2369 00:55:57.872755 DQS0 dly: 36
2370 00:55:57.873042 DQS1 dly: 34
2371 00:55:57.875314 Write Rank0 MR2 =0x2d
2372 00:55:57.878722 [RankSwap] Rank num 2, (Multi 1), Rank 0
2373 00:55:57.882221 Write Rank0 MR1 =0xd6
2374 00:55:57.882616 [Gating]
2375 00:55:57.882995 ==
2376 00:55:57.888596 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2377 00:55:57.892227 fsp= 1, odt_onoff= 1, Byte mode= 0
2378 00:55:57.892624 ==
2379 00:55:57.895391 3 1 0 |2c2b 302 |(11 11)(11 11) |(1 1)(1 1)| 0
2380 00:55:57.898680 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2381 00:55:57.905348 3 1 8 |2c2b 3535 |(11 11)(11 11) |(1 1)(1 1)| 0
2382 00:55:57.908830 3 1 12 |2c2b 3736 |(11 11)(11 11) |(1 1)(0 0)| 0
2383 00:55:57.911632 3 1 16 |2c2b 3535 |(11 11)(11 11) |(0 0)(1 1)| 0
2384 00:55:57.918402 3 1 20 |2c2b 3635 |(11 11)(11 11) |(1 0)(0 0)| 0
2385 00:55:57.921321 3 1 24 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 0)| 0
2386 00:55:57.924899 3 1 28 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
2387 00:55:57.931651 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2388 00:55:57.934483 [Byte 1] Lead/lag Transition tap number (1)
2389 00:55:57.938124 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2390 00:55:57.941371 3 2 8 |2c2b 1f1e |(11 11)(11 11) |(1 0)(0 0)| 0
2391 00:55:57.947897 3 2 12 |2c2b 3434 |(11 11)(0 0) |(1 0)(0 0)| 0
2392 00:55:57.951059 3 2 16 |2c2b 1a19 |(11 11)(11 11) |(1 0)(0 0)| 0
2393 00:55:57.954548 3 2 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2394 00:55:57.960843 3 2 24 |201 2727 |(11 11)(11 11) |(0 0)(0 0)| 0
2395 00:55:57.963994 3 2 28 |1110 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2396 00:55:57.967823 3 3 0 |3534 403 |(11 11)(11 11) |(0 0)(1 1)| 0
2397 00:55:57.973803 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
2398 00:55:57.977597 3 3 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2399 00:55:57.980553 3 3 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2400 00:55:57.984297 3 3 16 |3534 3b3b |(11 11)(11 11) |(1 1)(1 1)| 0
2401 00:55:57.990651 3 3 20 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
2402 00:55:57.994121 3 3 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2403 00:55:57.997333 [Byte 0] Lead/lag Transition tap number (1)
2404 00:55:58.003556 3 3 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2405 00:55:58.006734 3 4 0 |3534 a09 |(11 11)(11 11) |(0 0)(1 1)| 0
2406 00:55:58.010313 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
2407 00:55:58.013438 [Byte 1] Lead/lag Transition tap number (1)
2408 00:55:58.020126 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2409 00:55:58.023595 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2410 00:55:58.027042 3 4 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2411 00:55:58.033203 3 4 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2412 00:55:58.036316 3 4 24 |201 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2413 00:55:58.039702 3 4 28 |2121 201 |(11 11)(11 11) |(1 1)(0 1)| 0
2414 00:55:58.045983 3 5 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2415 00:55:58.049520 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2416 00:55:58.052952 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2417 00:55:58.059443 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2418 00:55:58.062737 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2419 00:55:58.066491 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2420 00:55:58.072455 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2421 00:55:58.075975 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2422 00:55:58.079602 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2423 00:55:58.085498 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2424 00:55:58.089231 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2425 00:55:58.092367 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2426 00:55:58.098623 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2427 00:55:58.102052 [Byte 0] Lead/lag falling Transition (3, 6, 16)
2428 00:55:58.105629 3 6 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2429 00:55:58.112219 [Byte 0] Lead/lag Transition tap number (2)
2430 00:55:58.115192 [Byte 1] Lead/lag falling Transition (3, 6, 20)
2431 00:55:58.118992 3 6 24 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2432 00:55:58.121850 [Byte 1] Lead/lag Transition tap number (2)
2433 00:55:58.128414 3 6 28 |1010 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
2434 00:55:58.131590 3 7 0 |4646 2525 |(0 0)(11 11) |(0 0)(0 0)| 0
2435 00:55:58.134693 [Byte 0]First pass (3, 7, 0)
2436 00:55:58.138456 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2437 00:55:58.141755 [Byte 1]First pass (3, 7, 4)
2438 00:55:58.144556 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2439 00:55:58.147884 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2440 00:55:58.151139 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2441 00:55:58.158053 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2442 00:55:58.160840 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2443 00:55:58.164274 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2444 00:55:58.167886 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2445 00:55:58.171239 4 0 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2446 00:55:58.177468 All bytes gating window > 1UI, Early break!
2447 00:55:58.177964
2448 00:55:58.181132 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 20)
2449 00:55:58.181659
2450 00:55:58.184455 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 24)
2451 00:55:58.184909
2452 00:55:58.185196
2453 00:55:58.185454
2454 00:55:58.187124 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2455 00:55:58.187485
2456 00:55:58.193898 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 24)
2457 00:55:58.194325
2458 00:55:58.194615
2459 00:55:58.194879 Write Rank0 MR1 =0x56
2460 00:55:58.195135
2461 00:55:58.197226 best RODT dly(2T, 0.5T) = (2, 3)
2462 00:55:58.197669
2463 00:55:58.200642 best RODT dly(2T, 0.5T) = (2, 3)
2464 00:55:58.200997 ==
2465 00:55:58.207188 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2466 00:55:58.210172 fsp= 1, odt_onoff= 1, Byte mode= 0
2467 00:55:58.210534 ==
2468 00:55:58.213617 Start DQ dly to find pass range UseTestEngine =0
2469 00:55:58.217290 x-axis: bit #, y-axis: DQ dly (-127~63)
2470 00:55:58.220786 RX Vref Scan = 0
2471 00:55:58.223448 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2472 00:55:58.223913 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2473 00:55:58.227352 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2474 00:55:58.229961 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2475 00:55:58.233278 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2476 00:55:58.236788 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2477 00:55:58.239993 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2478 00:55:58.243166 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2479 00:55:58.246326 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2480 00:55:58.249396 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2481 00:55:58.249804 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2482 00:55:58.252985 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2483 00:55:58.255933 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2484 00:55:58.259319 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2485 00:55:58.262929 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2486 00:55:58.266255 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2487 00:55:58.269199 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2488 00:55:58.272590 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2489 00:55:58.276037 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2490 00:55:58.276493 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2491 00:55:58.279107 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2492 00:55:58.282562 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2493 00:55:58.285641 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2494 00:55:58.289185 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2495 00:55:58.292501 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2496 00:55:58.295894 -1, [0] xxxxxxxx xxxxxxxo [MSB]
2497 00:55:58.296287 0, [0] xxxxxxxx xoxxxxxo [MSB]
2498 00:55:58.298650 1, [0] xxxoxxxx ooxxxxxo [MSB]
2499 00:55:58.301981 2, [0] xxxoxxxx ooxxxxxo [MSB]
2500 00:55:58.305830 3, [0] xoooxxxx oooxxxxo [MSB]
2501 00:55:58.309128 4, [0] xxooxxxo oooxxxxo [MSB]
2502 00:55:58.312477 5, [0] xooooxxo oooooooo [MSB]
2503 00:55:58.312840 6, [0] xooooxxo oooooooo [MSB]
2504 00:55:58.315638 7, [0] xoooooxo oooooooo [MSB]
2505 00:55:58.318684 8, [0] xooooooo oooooooo [MSB]
2506 00:55:58.322169 33, [0] oooxoooo ooooooox [MSB]
2507 00:55:58.325286 34, [0] oooxoooo ooooooox [MSB]
2508 00:55:58.328166 35, [0] oooxoooo xxooooox [MSB]
2509 00:55:58.331730 36, [0] oooxoooo xxooooox [MSB]
2510 00:55:58.335135 37, [0] ooxxoooo xxooooox [MSB]
2511 00:55:58.335500 38, [0] ooxxoooo xxooooox [MSB]
2512 00:55:58.338139 39, [0] xxxxxoox xxooxoox [MSB]
2513 00:55:58.341502 40, [0] xxxxxoox xxxoxoox [MSB]
2514 00:55:58.345157 41, [0] xxxxxxxx xxxxxxxx [MSB]
2515 00:55:58.347787 iDelay=41, Bit 0, Center 23 (9 ~ 38) 30
2516 00:55:58.351260 iDelay=41, Bit 1, Center 21 (5 ~ 38) 34
2517 00:55:58.354735 iDelay=41, Bit 2, Center 19 (3 ~ 36) 34
2518 00:55:58.358232 iDelay=41, Bit 3, Center 16 (1 ~ 32) 32
2519 00:55:58.361487 iDelay=41, Bit 4, Center 21 (5 ~ 38) 34
2520 00:55:58.364304 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2521 00:55:58.371080 iDelay=41, Bit 6, Center 24 (8 ~ 40) 33
2522 00:55:58.374227 iDelay=41, Bit 7, Center 21 (4 ~ 38) 35
2523 00:55:58.377638 iDelay=41, Bit 8, Center 17 (1 ~ 34) 34
2524 00:55:58.380655 iDelay=41, Bit 9, Center 17 (0 ~ 34) 35
2525 00:55:58.384391 iDelay=41, Bit 10, Center 21 (3 ~ 39) 37
2526 00:55:58.387414 iDelay=41, Bit 11, Center 22 (5 ~ 40) 36
2527 00:55:58.390960 iDelay=41, Bit 12, Center 21 (5 ~ 38) 34
2528 00:55:58.394197 iDelay=41, Bit 13, Center 22 (5 ~ 40) 36
2529 00:55:58.396908 iDelay=41, Bit 14, Center 22 (5 ~ 40) 36
2530 00:55:58.400330 iDelay=41, Bit 15, Center 14 (-4 ~ 32) 37
2531 00:55:58.403610 ==
2532 00:55:58.407170 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2533 00:55:58.410374 fsp= 1, odt_onoff= 1, Byte mode= 0
2534 00:55:58.410767 ==
2535 00:55:58.411054 DQS Delay:
2536 00:55:58.413648 DQS0 = 0, DQS1 = 0
2537 00:55:58.414041 DQM Delay:
2538 00:55:58.416881 DQM0 = 21, DQM1 = 19
2539 00:55:58.417409 DQ Delay:
2540 00:55:58.420024 DQ0 =23, DQ1 =21, DQ2 =19, DQ3 =16
2541 00:55:58.423208 DQ4 =21, DQ5 =23, DQ6 =24, DQ7 =21
2542 00:55:58.426530 DQ8 =17, DQ9 =17, DQ10 =21, DQ11 =22
2543 00:55:58.430414 DQ12 =21, DQ13 =22, DQ14 =22, DQ15 =14
2544 00:55:58.430771
2545 00:55:58.431048
2546 00:55:58.433490 DramC Write-DBI off
2547 00:55:58.433877 ==
2548 00:55:58.436484 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2549 00:55:58.439672 fsp= 1, odt_onoff= 1, Byte mode= 0
2550 00:55:58.440043 ==
2551 00:55:58.446915 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2552 00:55:58.447274
2553 00:55:58.449503 Begin, DQ Scan Range 930~1186
2554 00:55:58.449887
2555 00:55:58.450168
2556 00:55:58.450427 TX Vref Scan disable
2557 00:55:58.452896 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2558 00:55:58.456309 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2559 00:55:58.462782 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2560 00:55:58.465898 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2561 00:55:58.469468 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2562 00:55:58.472197 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2563 00:55:58.475658 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2564 00:55:58.478983 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2565 00:55:58.482407 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2566 00:55:58.485916 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2567 00:55:58.489078 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2568 00:55:58.492584 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2569 00:55:58.495885 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2570 00:55:58.498560 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2571 00:55:58.502132 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2572 00:55:58.508587 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2573 00:55:58.511955 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2574 00:55:58.515181 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2575 00:55:58.518461 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2576 00:55:58.522015 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2577 00:55:58.525216 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2578 00:55:58.528473 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2579 00:55:58.531865 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2580 00:55:58.535165 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2581 00:55:58.538041 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2582 00:55:58.541517 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2583 00:55:58.544996 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2584 00:55:58.548198 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2585 00:55:58.551227 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2586 00:55:58.557814 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2587 00:55:58.561404 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2588 00:55:58.564619 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2589 00:55:58.568117 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2590 00:55:58.570765 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2591 00:55:58.574406 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2592 00:55:58.577857 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2593 00:55:58.581361 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2594 00:55:58.583972 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2595 00:55:58.587464 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2596 00:55:58.590841 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2597 00:55:58.594089 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2598 00:55:58.597834 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2599 00:55:58.600549 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2600 00:55:58.603833 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2601 00:55:58.607426 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2602 00:55:58.613425 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2603 00:55:58.616715 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2604 00:55:58.620151 977 |3 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2605 00:55:58.623685 978 |3 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2606 00:55:58.626927 979 |3 6 19|[0] xxxxxxxx xxxxxxxx [MSB]
2607 00:55:58.629805 980 |3 6 20|[0] xxxxxxxx xxxxxxxx [MSB]
2608 00:55:58.633629 981 |3 6 21|[0] xxxxxxxx oxxxxxxo [MSB]
2609 00:55:58.636835 982 |3 6 22|[0] xxxxxxxx ooxxxxxo [MSB]
2610 00:55:58.639764 983 |3 6 23|[0] xxxxxxxx ooxxxxxo [MSB]
2611 00:55:58.643132 984 |3 6 24|[0] xxxxxxxx ooxxxxxo [MSB]
2612 00:55:58.646574 985 |3 6 25|[0] oooooooo oooxoxoo [MSB]
2613 00:55:58.653985 997 |3 6 37|[0] oooooooo ooooooox [MSB]
2614 00:55:58.657193 998 |3 6 38|[0] oooooooo ooooooox [MSB]
2615 00:55:58.660523 999 |3 6 39|[0] oooooooo ooooooox [MSB]
2616 00:55:58.664277 1000 |3 6 40|[0] oooooooo ooooooox [MSB]
2617 00:55:58.667339 1001 |3 6 41|[0] oooooooo oxooooox [MSB]
2618 00:55:58.670901 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2619 00:55:58.673601 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
2620 00:55:58.677281 1004 |3 6 44|[0] oooxoooo xxxxxxxx [MSB]
2621 00:55:58.680476 1005 |3 6 45|[0] oooxoooo xxxxxxxx [MSB]
2622 00:55:58.683572 1006 |3 6 46|[0] ooxxoooo xxxxxxxx [MSB]
2623 00:55:58.690582 1007 |3 6 47|[0] ooxxxxxx xxxxxxxx [MSB]
2624 00:55:58.693604 1008 |3 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
2625 00:55:58.696862 Byte0, DQ PI dly=994, DQM PI dly= 994
2626 00:55:58.700276 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 34)
2627 00:55:58.700659
2628 00:55:58.703721 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 34)
2629 00:55:58.704083
2630 00:55:58.707190 Byte1, DQ PI dly=990, DQM PI dly= 990
2631 00:55:58.713679 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2632 00:55:58.714127
2633 00:55:58.716413 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2634 00:55:58.716782
2635 00:55:58.717200 ==
2636 00:55:58.723509 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2637 00:55:58.726329 fsp= 1, odt_onoff= 1, Byte mode= 0
2638 00:55:58.726700 ==
2639 00:55:58.729434 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2640 00:55:58.729817
2641 00:55:58.732869 Begin, DQ Scan Range 966~1030
2642 00:55:58.735972 Write Rank0 MR14 =0x0
2643 00:55:58.742089
2644 00:55:58.742265 CH=1, VrefRange= 0, VrefLevel = 0
2645 00:55:58.749163 TX Bit0 (987~1004) 18 995, Bit8 (985~995) 11 990,
2646 00:55:58.752135 TX Bit1 (985~1002) 18 993, Bit9 (985~994) 10 989,
2647 00:55:58.759065 TX Bit2 (985~998) 14 991, Bit10 (987~1000) 14 993,
2648 00:55:58.762217 TX Bit3 (984~996) 13 990, Bit11 (988~1000) 13 994,
2649 00:55:58.768558 TX Bit4 (986~1002) 17 994, Bit12 (987~999) 13 993,
2650 00:55:58.771919 TX Bit5 (987~1003) 17 995, Bit13 (988~999) 12 993,
2651 00:55:58.775578 TX Bit6 (986~1003) 18 994, Bit14 (987~996) 10 991,
2652 00:55:58.781738 TX Bit7 (986~1000) 15 993, Bit15 (982~992) 11 987,
2653 00:55:58.781815
2654 00:55:58.781876 Write Rank0 MR14 =0x2
2655 00:55:58.790852
2656 00:55:58.790929 CH=1, VrefRange= 0, VrefLevel = 2
2657 00:55:58.797829 TX Bit0 (986~1005) 20 995, Bit8 (985~996) 12 990,
2658 00:55:58.801033 TX Bit1 (985~1004) 20 994, Bit9 (985~995) 11 990,
2659 00:55:58.807722 TX Bit2 (985~999) 15 992, Bit10 (987~1001) 15 994,
2660 00:55:58.810603 TX Bit3 (984~997) 14 990, Bit11 (987~1000) 14 993,
2661 00:55:58.817422 TX Bit4 (986~1003) 18 994, Bit12 (987~1000) 14 993,
2662 00:55:58.820397 TX Bit5 (987~1004) 18 995, Bit13 (987~1000) 14 993,
2663 00:55:58.824100 TX Bit6 (986~1004) 19 995, Bit14 (987~996) 10 991,
2664 00:55:58.830958 TX Bit7 (986~1001) 16 993, Bit15 (981~993) 13 987,
2665 00:55:58.831118
2666 00:55:58.831246 Write Rank0 MR14 =0x4
2667 00:55:58.840529
2668 00:55:58.840772 CH=1, VrefRange= 0, VrefLevel = 4
2669 00:55:58.846964 TX Bit0 (987~1006) 20 996, Bit8 (985~997) 13 991,
2670 00:55:58.850315 TX Bit1 (985~1004) 20 994, Bit9 (985~995) 11 990,
2671 00:55:58.857347 TX Bit2 (984~1000) 17 992, Bit10 (986~1001) 16 993,
2672 00:55:58.860763 TX Bit3 (983~998) 16 990, Bit11 (987~1001) 15 994,
2673 00:55:58.866808 TX Bit4 (986~1004) 19 995, Bit12 (986~1001) 16 993,
2674 00:55:58.870431 TX Bit5 (987~1005) 19 996, Bit13 (987~1001) 15 994,
2675 00:55:58.873873 TX Bit6 (986~1004) 19 995, Bit14 (986~998) 13 992,
2676 00:55:58.880315 TX Bit7 (986~1002) 17 994, Bit15 (981~993) 13 987,
2677 00:55:58.880791
2678 00:55:58.881230 Write Rank0 MR14 =0x6
2679 00:55:58.889659
2680 00:55:58.890046 CH=1, VrefRange= 0, VrefLevel = 6
2681 00:55:58.896660 TX Bit0 (986~1005) 20 995, Bit8 (984~998) 15 991,
2682 00:55:58.899446 TX Bit1 (985~1005) 21 995, Bit9 (985~997) 13 991,
2683 00:55:58.906312 TX Bit2 (984~1001) 18 992, Bit10 (986~1001) 16 993,
2684 00:55:58.909779 TX Bit3 (983~998) 16 990, Bit11 (987~1001) 15 994,
2685 00:55:58.915961 TX Bit4 (985~1005) 21 995, Bit12 (986~1001) 16 993,
2686 00:55:58.919451 TX Bit5 (986~1005) 20 995, Bit13 (987~1001) 15 994,
2687 00:55:58.923110 TX Bit6 (986~1005) 20 995, Bit14 (986~999) 14 992,
2688 00:55:58.929291 TX Bit7 (986~1003) 18 994, Bit15 (980~994) 15 987,
2689 00:55:58.929847
2690 00:55:58.930281 Write Rank0 MR14 =0x8
2691 00:55:58.938933
2692 00:55:58.939324 CH=1, VrefRange= 0, VrefLevel = 8
2693 00:55:58.944993 TX Bit0 (986~1006) 21 996, Bit8 (983~999) 17 991,
2694 00:55:58.948621 TX Bit1 (985~1006) 22 995, Bit9 (984~997) 14 990,
2695 00:55:58.954978 TX Bit2 (984~1002) 19 993, Bit10 (986~1001) 16 993,
2696 00:55:58.958149 TX Bit3 (983~998) 16 990, Bit11 (986~1001) 16 993,
2697 00:55:58.965306 TX Bit4 (985~1005) 21 995, Bit12 (986~1002) 17 994,
2698 00:55:58.968293 TX Bit5 (986~1005) 20 995, Bit13 (987~1001) 15 994,
2699 00:55:58.971501 TX Bit6 (985~1005) 21 995, Bit14 (986~1000) 15 993,
2700 00:55:58.978135 TX Bit7 (985~1004) 20 994, Bit15 (980~994) 15 987,
2701 00:55:58.978562
2702 00:55:58.981221 Write Rank0 MR14 =0xa
2703 00:55:58.988197
2704 00:55:58.991387 CH=1, VrefRange= 0, VrefLevel = 10
2705 00:55:58.994852 TX Bit0 (985~1007) 23 996, Bit8 (982~1000) 19 991,
2706 00:55:58.998169 TX Bit1 (985~1006) 22 995, Bit9 (984~998) 15 991,
2707 00:55:59.004468 TX Bit2 (984~1003) 20 993, Bit10 (986~1002) 17 994,
2708 00:55:59.008167 TX Bit3 (982~1000) 19 991, Bit11 (986~1002) 17 994,
2709 00:55:59.014757 TX Bit4 (985~1005) 21 995, Bit12 (986~1002) 17 994,
2710 00:55:59.017599 TX Bit5 (986~1006) 21 996, Bit13 (987~1002) 16 994,
2711 00:55:59.024634 TX Bit6 (985~1006) 22 995, Bit14 (986~1001) 16 993,
2712 00:55:59.027274 TX Bit7 (985~1004) 20 994, Bit15 (980~994) 15 987,
2713 00:55:59.027664
2714 00:55:59.030735 Write Rank0 MR14 =0xc
2715 00:55:59.038476
2716 00:55:59.040991 CH=1, VrefRange= 0, VrefLevel = 12
2717 00:55:59.044381 TX Bit0 (986~1007) 22 996, Bit8 (982~1000) 19 991,
2718 00:55:59.047666 TX Bit1 (985~1006) 22 995, Bit9 (983~999) 17 991,
2719 00:55:59.054693 TX Bit2 (984~1003) 20 993, Bit10 (985~1002) 18 993,
2720 00:55:59.057275 TX Bit3 (982~1000) 19 991, Bit11 (986~1002) 17 994,
2721 00:55:59.063924 TX Bit4 (985~1006) 22 995, Bit12 (985~1002) 18 993,
2722 00:55:59.067525 TX Bit5 (985~1006) 22 995, Bit13 (986~1002) 17 994,
2723 00:55:59.074412 TX Bit6 (985~1006) 22 995, Bit14 (986~1001) 16 993,
2724 00:55:59.076837 TX Bit7 (985~1005) 21 995, Bit15 (979~995) 17 987,
2725 00:55:59.077275
2726 00:55:59.080611 Write Rank0 MR14 =0xe
2727 00:55:59.087391
2728 00:55:59.090936 CH=1, VrefRange= 0, VrefLevel = 14
2729 00:55:59.093734 TX Bit0 (986~1007) 22 996, Bit8 (982~1001) 20 991,
2730 00:55:59.097526 TX Bit1 (984~1006) 23 995, Bit9 (982~1000) 19 991,
2731 00:55:59.104200 TX Bit2 (983~1005) 23 994, Bit10 (985~1003) 19 994,
2732 00:55:59.107623 TX Bit3 (982~1001) 20 991, Bit11 (986~1003) 18 994,
2733 00:55:59.113935 TX Bit4 (985~1006) 22 995, Bit12 (985~1003) 19 994,
2734 00:55:59.116935 TX Bit5 (985~1006) 22 995, Bit13 (986~1003) 18 994,
2735 00:55:59.123669 TX Bit6 (985~1006) 22 995, Bit14 (986~1002) 17 994,
2736 00:55:59.127109 TX Bit7 (985~1005) 21 995, Bit15 (979~995) 17 987,
2737 00:55:59.127599
2738 00:55:59.130343 Write Rank0 MR14 =0x10
2739 00:55:59.137463
2740 00:55:59.140893 CH=1, VrefRange= 0, VrefLevel = 16
2741 00:55:59.144153 TX Bit0 (985~1008) 24 996, Bit8 (981~1001) 21 991,
2742 00:55:59.147735 TX Bit1 (984~1007) 24 995, Bit9 (982~1000) 19 991,
2743 00:55:59.154316 TX Bit2 (983~1005) 23 994, Bit10 (984~1003) 20 993,
2744 00:55:59.157244 TX Bit3 (981~1002) 22 991, Bit11 (986~1003) 18 994,
2745 00:55:59.163799 TX Bit4 (984~1006) 23 995, Bit12 (986~1003) 18 994,
2746 00:55:59.167162 TX Bit5 (985~1006) 22 995, Bit13 (986~1003) 18 994,
2747 00:55:59.173938 TX Bit6 (985~1006) 22 995, Bit14 (985~1002) 18 993,
2748 00:55:59.177510 TX Bit7 (985~1005) 21 995, Bit15 (978~996) 19 987,
2749 00:55:59.177961
2750 00:55:59.180056 Write Rank0 MR14 =0x12
2751 00:55:59.187549
2752 00:55:59.190979 CH=1, VrefRange= 0, VrefLevel = 18
2753 00:55:59.194294 TX Bit0 (985~1008) 24 996, Bit8 (981~1001) 21 991,
2754 00:55:59.197530 TX Bit1 (984~1007) 24 995, Bit9 (982~1001) 20 991,
2755 00:55:59.203826 TX Bit2 (983~1005) 23 994, Bit10 (985~1003) 19 994,
2756 00:55:59.207706 TX Bit3 (981~1002) 22 991, Bit11 (985~1003) 19 994,
2757 00:55:59.213601 TX Bit4 (984~1006) 23 995, Bit12 (985~1003) 19 994,
2758 00:55:59.216836 TX Bit5 (985~1007) 23 996, Bit13 (986~1003) 18 994,
2759 00:55:59.223343 TX Bit6 (984~1007) 24 995, Bit14 (985~1002) 18 993,
2760 00:55:59.227162 TX Bit7 (984~1006) 23 995, Bit15 (978~997) 20 987,
2761 00:55:59.227684
2762 00:55:59.230628 Write Rank0 MR14 =0x14
2763 00:55:59.237443
2764 00:55:59.241348 CH=1, VrefRange= 0, VrefLevel = 20
2765 00:55:59.243865 TX Bit0 (985~1008) 24 996, Bit8 (981~1002) 22 991,
2766 00:55:59.247273 TX Bit1 (984~1007) 24 995, Bit9 (981~1001) 21 991,
2767 00:55:59.254343 TX Bit2 (983~1006) 24 994, Bit10 (984~1004) 21 994,
2768 00:55:59.256993 TX Bit3 (981~1003) 23 992, Bit11 (985~1004) 20 994,
2769 00:55:59.264274 TX Bit4 (984~1007) 24 995, Bit12 (984~1004) 21 994,
2770 00:55:59.267007 TX Bit5 (985~1007) 23 996, Bit13 (986~1004) 19 995,
2771 00:55:59.273742 TX Bit6 (984~1007) 24 995, Bit14 (985~1003) 19 994,
2772 00:55:59.277126 TX Bit7 (984~1006) 23 995, Bit15 (978~998) 21 988,
2773 00:55:59.277678
2774 00:55:59.280555 Write Rank0 MR14 =0x16
2775 00:55:59.288061
2776 00:55:59.291600 CH=1, VrefRange= 0, VrefLevel = 22
2777 00:55:59.294359 TX Bit0 (985~1009) 25 997, Bit8 (980~1002) 23 991,
2778 00:55:59.297954 TX Bit1 (984~1008) 25 996, Bit9 (980~1001) 22 990,
2779 00:55:59.304512 TX Bit2 (982~1006) 25 994, Bit10 (984~1005) 22 994,
2780 00:55:59.307254 TX Bit3 (980~1004) 25 992, Bit11 (984~1005) 22 994,
2781 00:55:59.314061 TX Bit4 (984~1007) 24 995, Bit12 (985~1005) 21 995,
2782 00:55:59.317486 TX Bit5 (985~1008) 24 996, Bit13 (986~1005) 20 995,
2783 00:55:59.324441 TX Bit6 (984~1008) 25 996, Bit14 (985~1003) 19 994,
2784 00:55:59.327102 TX Bit7 (984~1007) 24 995, Bit15 (978~999) 22 988,
2785 00:55:59.327497
2786 00:55:59.330413 Write Rank0 MR14 =0x18
2787 00:55:59.337689
2788 00:55:59.341021 CH=1, VrefRange= 0, VrefLevel = 24
2789 00:55:59.344328 TX Bit0 (985~1009) 25 997, Bit8 (980~1002) 23 991,
2790 00:55:59.347488 TX Bit1 (984~1008) 25 996, Bit9 (980~1002) 23 991,
2791 00:55:59.354161 TX Bit2 (982~1006) 25 994, Bit10 (983~1006) 24 994,
2792 00:55:59.357198 TX Bit3 (980~1004) 25 992, Bit11 (985~1005) 21 995,
2793 00:55:59.363630 TX Bit4 (984~1008) 25 996, Bit12 (984~1005) 22 994,
2794 00:55:59.367561 TX Bit5 (985~1008) 24 996, Bit13 (985~1005) 21 995,
2795 00:55:59.373455 TX Bit6 (984~1008) 25 996, Bit14 (984~1003) 20 993,
2796 00:55:59.377046 TX Bit7 (984~1007) 24 995, Bit15 (978~999) 22 988,
2797 00:55:59.377123
2798 00:55:59.380057 Write Rank0 MR14 =0x1a
2799 00:55:59.387942
2800 00:55:59.391113 CH=1, VrefRange= 0, VrefLevel = 26
2801 00:55:59.394558 TX Bit0 (985~1009) 25 997, Bit8 (980~1003) 24 991,
2802 00:55:59.397477 TX Bit1 (983~1008) 26 995, Bit9 (980~1002) 23 991,
2803 00:55:59.404120 TX Bit2 (982~1007) 26 994, Bit10 (983~1005) 23 994,
2804 00:55:59.407472 TX Bit3 (979~1005) 27 992, Bit11 (984~1007) 24 995,
2805 00:55:59.413765 TX Bit4 (984~1008) 25 996, Bit12 (984~1006) 23 995,
2806 00:55:59.417428 TX Bit5 (985~1008) 24 996, Bit13 (985~1006) 22 995,
2807 00:55:59.424098 TX Bit6 (984~1008) 25 996, Bit14 (983~1004) 22 993,
2808 00:55:59.427451 TX Bit7 (984~1007) 24 995, Bit15 (978~1000) 23 989,
2809 00:55:59.427527
2810 00:55:59.430364 Write Rank0 MR14 =0x1c
2811 00:55:59.438625
2812 00:55:59.441207 CH=1, VrefRange= 0, VrefLevel = 28
2813 00:55:59.444652 TX Bit0 (985~1010) 26 997, Bit8 (980~1002) 23 991,
2814 00:55:59.448259 TX Bit1 (984~1008) 25 996, Bit9 (979~1002) 24 990,
2815 00:55:59.455020 TX Bit2 (982~1006) 25 994, Bit10 (983~1005) 23 994,
2816 00:55:59.457482 TX Bit3 (979~1005) 27 992, Bit11 (984~1006) 23 995,
2817 00:55:59.464234 TX Bit4 (984~1008) 25 996, Bit12 (984~1006) 23 995,
2818 00:55:59.467602 TX Bit5 (984~1009) 26 996, Bit13 (985~1006) 22 995,
2819 00:55:59.474128 TX Bit6 (984~1009) 26 996, Bit14 (983~1005) 23 994,
2820 00:55:59.477672 TX Bit7 (984~1008) 25 996, Bit15 (977~1000) 24 988,
2821 00:55:59.477749
2822 00:55:59.480900 Write Rank0 MR14 =0x1e
2823 00:55:59.488600
2824 00:55:59.491885 CH=1, VrefRange= 0, VrefLevel = 30
2825 00:55:59.495214 TX Bit0 (985~1010) 26 997, Bit8 (980~1002) 23 991,
2826 00:55:59.498537 TX Bit1 (984~1008) 25 996, Bit9 (979~1002) 24 990,
2827 00:55:59.504825 TX Bit2 (982~1006) 25 994, Bit10 (983~1005) 23 994,
2828 00:55:59.508831 TX Bit3 (979~1005) 27 992, Bit11 (984~1006) 23 995,
2829 00:55:59.514810 TX Bit4 (984~1008) 25 996, Bit12 (984~1006) 23 995,
2830 00:55:59.518670 TX Bit5 (984~1009) 26 996, Bit13 (985~1006) 22 995,
2831 00:55:59.524543 TX Bit6 (984~1009) 26 996, Bit14 (983~1005) 23 994,
2832 00:55:59.528071 TX Bit7 (984~1008) 25 996, Bit15 (977~1000) 24 988,
2833 00:55:59.528148
2834 00:55:59.530909 Write Rank0 MR14 =0x20
2835 00:55:59.538777
2836 00:55:59.542229 CH=1, VrefRange= 0, VrefLevel = 32
2837 00:55:59.545774 TX Bit0 (985~1010) 26 997, Bit8 (980~1002) 23 991,
2838 00:55:59.548516 TX Bit1 (984~1008) 25 996, Bit9 (979~1002) 24 990,
2839 00:55:59.555300 TX Bit2 (982~1006) 25 994, Bit10 (983~1005) 23 994,
2840 00:55:59.558853 TX Bit3 (979~1005) 27 992, Bit11 (984~1006) 23 995,
2841 00:55:59.564913 TX Bit4 (984~1008) 25 996, Bit12 (984~1006) 23 995,
2842 00:55:59.568438 TX Bit5 (984~1009) 26 996, Bit13 (985~1006) 22 995,
2843 00:55:59.574872 TX Bit6 (984~1009) 26 996, Bit14 (983~1005) 23 994,
2844 00:55:59.578115 TX Bit7 (984~1008) 25 996, Bit15 (977~1000) 24 988,
2845 00:55:59.578192
2846 00:55:59.581573 Write Rank0 MR14 =0x22
2847 00:55:59.589418
2848 00:55:59.592547 CH=1, VrefRange= 0, VrefLevel = 34
2849 00:55:59.595986 TX Bit0 (985~1010) 26 997, Bit8 (980~1002) 23 991,
2850 00:55:59.598759 TX Bit1 (984~1008) 25 996, Bit9 (979~1002) 24 990,
2851 00:55:59.605689 TX Bit2 (982~1006) 25 994, Bit10 (983~1005) 23 994,
2852 00:55:59.609217 TX Bit3 (979~1005) 27 992, Bit11 (984~1006) 23 995,
2853 00:55:59.615234 TX Bit4 (984~1008) 25 996, Bit12 (984~1006) 23 995,
2854 00:55:59.618662 TX Bit5 (984~1009) 26 996, Bit13 (985~1006) 22 995,
2855 00:55:59.625222 TX Bit6 (984~1009) 26 996, Bit14 (983~1005) 23 994,
2856 00:55:59.628547 TX Bit7 (984~1008) 25 996, Bit15 (977~1000) 24 988,
2857 00:55:59.628624
2858 00:55:59.628683
2859 00:55:59.631829 TX Vref found, early break! 368< 370
2860 00:55:59.638239 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2861 00:55:59.638315 u1DelayCellOfst[0]=6 cells (5 PI)
2862 00:55:59.641410 u1DelayCellOfst[1]=5 cells (4 PI)
2863 00:55:59.645169 u1DelayCellOfst[2]=2 cells (2 PI)
2864 00:55:59.648211 u1DelayCellOfst[3]=0 cells (0 PI)
2865 00:55:59.651671 u1DelayCellOfst[4]=5 cells (4 PI)
2866 00:55:59.654581 u1DelayCellOfst[5]=5 cells (4 PI)
2867 00:55:59.658459 u1DelayCellOfst[6]=5 cells (4 PI)
2868 00:55:59.661158 u1DelayCellOfst[7]=5 cells (4 PI)
2869 00:55:59.664914 Byte0, DQ PI dly=992, DQM PI dly= 994
2870 00:55:59.667921 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
2871 00:55:59.667998
2872 00:55:59.674843 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
2873 00:55:59.674923
2874 00:55:59.677485 u1DelayCellOfst[8]=3 cells (3 PI)
2875 00:55:59.677619 u1DelayCellOfst[9]=2 cells (2 PI)
2876 00:55:59.680996 u1DelayCellOfst[10]=7 cells (6 PI)
2877 00:55:59.684500 u1DelayCellOfst[11]=9 cells (7 PI)
2878 00:55:59.687341 u1DelayCellOfst[12]=9 cells (7 PI)
2879 00:55:59.690828 u1DelayCellOfst[13]=9 cells (7 PI)
2880 00:55:59.694111 u1DelayCellOfst[14]=7 cells (6 PI)
2881 00:55:59.697459 u1DelayCellOfst[15]=0 cells (0 PI)
2882 00:55:59.700849 Byte1, DQ PI dly=988, DQM PI dly= 991
2883 00:55:59.707206 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2884 00:55:59.707291
2885 00:55:59.710854 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2886 00:55:59.710924
2887 00:55:59.714393 Write Rank0 MR14 =0x1c
2888 00:55:59.714467
2889 00:55:59.714545 Final TX Range 0 Vref 28
2890 00:55:59.714614
2891 00:55:59.720220 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2892 00:55:59.720290
2893 00:55:59.727097 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2894 00:55:59.733667 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2895 00:55:59.743899 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2896 00:55:59.743995 Write Rank0 MR3 =0xb0
2897 00:55:59.746650 DramC Write-DBI on
2898 00:55:59.746718 ==
2899 00:55:59.749986 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2900 00:55:59.753457 fsp= 1, odt_onoff= 1, Byte mode= 0
2901 00:55:59.753577 ==
2902 00:55:59.759563 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2903 00:55:59.759645
2904 00:55:59.763021 Begin, DQ Scan Range 711~775
2905 00:55:59.763096
2906 00:55:59.763169
2907 00:55:59.763244 TX Vref Scan disable
2908 00:55:59.766233 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2909 00:55:59.769523 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2910 00:55:59.772616 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2911 00:55:59.776618 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2912 00:55:59.782570 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2913 00:55:59.785725 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2914 00:55:59.789441 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2915 00:55:59.792448 718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2916 00:55:59.795987 719 |2 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2917 00:55:59.798924 720 |2 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2918 00:55:59.802567 721 |2 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2919 00:55:59.805687 722 |2 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2920 00:55:59.808783 723 |2 6 19|[0] xxxxxxxx xxxxxxxx [MSB]
2921 00:55:59.812020 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2922 00:55:59.815409 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
2923 00:55:59.818930 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
2924 00:55:59.822344 727 |2 6 23|[0] xxxxxxxx oooooooo [MSB]
2925 00:55:59.831927 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2926 00:55:59.835293 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2927 00:55:59.838067 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2928 00:55:59.841411 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
2929 00:55:59.844663 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
2930 00:55:59.847935 753 |2 6 49|[0] oooooooo xxxxxxxx [MSB]
2931 00:55:59.851444 754 |2 6 50|[0] oooooooo xxxxxxxx [MSB]
2932 00:55:59.855080 755 |2 6 51|[0] xxxxxxxx xxxxxxxx [MSB]
2933 00:55:59.857900 Byte0, DQ PI dly=741, DQM PI dly= 741
2934 00:55:59.861268 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 37)
2935 00:55:59.864664
2936 00:55:59.868233 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 37)
2937 00:55:59.868313
2938 00:55:59.871376 Byte1, DQ PI dly=735, DQM PI dly= 735
2939 00:55:59.874891 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
2940 00:55:59.874968
2941 00:55:59.880854 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
2942 00:55:59.880930
2943 00:55:59.887668 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2944 00:55:59.894573 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2945 00:55:59.900373 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2946 00:55:59.900454 Write Rank0 MR3 =0x30
2947 00:55:59.903915 DramC Write-DBI off
2948 00:55:59.903988
2949 00:55:59.904085 [DATLAT]
2950 00:55:59.907293 Freq=1600, CH1 RK0, use_rxtx_scan=0
2951 00:55:59.907371
2952 00:55:59.910368 DATLAT Default: 0xf
2953 00:55:59.910439 7, 0xFFFF, sum=0
2954 00:55:59.913618 8, 0xFFFF, sum=0
2955 00:55:59.913705 9, 0xFFFF, sum=0
2956 00:55:59.917098 10, 0xFFFF, sum=0
2957 00:55:59.917193 11, 0xFFFF, sum=0
2958 00:55:59.920269 12, 0xFFFF, sum=0
2959 00:55:59.920343 13, 0xFFFF, sum=0
2960 00:55:59.923583 14, 0x0, sum=1
2961 00:55:59.923684 15, 0x0, sum=2
2962 00:55:59.927132 16, 0x0, sum=3
2963 00:55:59.927206 17, 0x0, sum=4
2964 00:55:59.930197 pattern=2 first_step=14 total pass=5 best_step=16
2965 00:55:59.930275 ==
2966 00:55:59.936437 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2967 00:55:59.939863 fsp= 1, odt_onoff= 1, Byte mode= 0
2968 00:55:59.939940 ==
2969 00:55:59.943402 Start DQ dly to find pass range UseTestEngine =1
2970 00:55:59.946596 x-axis: bit #, y-axis: DQ dly (-127~63)
2971 00:55:59.950038 RX Vref Scan = 1
2972 00:56:00.056649
2973 00:56:00.056763 RX Vref found, early break!
2974 00:56:00.056847
2975 00:56:00.063376 Final RX Vref 11, apply to both rank0 and 1
2976 00:56:00.063460 ==
2977 00:56:00.067016 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2978 00:56:00.069760 fsp= 1, odt_onoff= 1, Byte mode= 0
2979 00:56:00.069838 ==
2980 00:56:00.069898 DQS Delay:
2981 00:56:00.073183 DQS0 = 0, DQS1 = 0
2982 00:56:00.073259 DQM Delay:
2983 00:56:00.076692 DQM0 = 20, DQM1 = 19
2984 00:56:00.076768 DQ Delay:
2985 00:56:00.080124 DQ0 =22, DQ1 =20, DQ2 =19, DQ3 =16
2986 00:56:00.082819 DQ4 =20, DQ5 =22, DQ6 =24, DQ7 =21
2987 00:56:00.086330 DQ8 =17, DQ9 =17, DQ10 =20, DQ11 =21
2988 00:56:00.089609 DQ12 =22, DQ13 =21, DQ14 =22, DQ15 =14
2989 00:56:00.089699
2990 00:56:00.089758
2991 00:56:00.089813
2992 00:56:00.093047 [DramC_TX_OE_Calibration] TA2
2993 00:56:00.096521 Original DQ_B0 (3 6) =30, OEN = 27
2994 00:56:00.099556 Original DQ_B1 (3 6) =30, OEN = 27
2995 00:56:00.102784 23, 0x0, End_B0=23 End_B1=23
2996 00:56:00.106466 24, 0x0, End_B0=24 End_B1=24
2997 00:56:00.106542 25, 0x0, End_B0=25 End_B1=25
2998 00:56:00.109051 26, 0x0, End_B0=26 End_B1=26
2999 00:56:00.112369 27, 0x0, End_B0=27 End_B1=27
3000 00:56:00.115742 28, 0x0, End_B0=28 End_B1=28
3001 00:56:00.115819 29, 0x0, End_B0=29 End_B1=29
3002 00:56:00.119362 30, 0x0, End_B0=30 End_B1=30
3003 00:56:00.122988 31, 0xFFFF, End_B0=30 End_B1=30
3004 00:56:00.129125 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3005 00:56:00.135282 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3006 00:56:00.135390
3007 00:56:00.135476
3008 00:56:00.135562 Write Rank0 MR23 =0x3f
3009 00:56:00.138990 [DQSOSC]
3010 00:56:00.145024 [DQSOSCAuto] RK0, (LSB)MR18= 0xadad, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps
3011 00:56:00.151797 CH1_RK0: MR19=0x202, MR18=0xADAD, DQSOSC=459, MR23=63, INC=11, DEC=17
3012 00:56:00.151874 Write Rank0 MR23 =0x3f
3013 00:56:00.155094 [DQSOSC]
3014 00:56:00.161429 [DQSOSCAuto] RK0, (LSB)MR18= 0xb0b0, (MSB)MR19= 0x202, tDQSOscB0 = 457 ps tDQSOscB1 = 457 ps
3015 00:56:00.165050 CH1 RK0: MR19=202, MR18=B0B0
3016 00:56:00.168127 [RankSwap] Rank num 2, (Multi 1), Rank 1
3017 00:56:00.171191 Write Rank0 MR2 =0xad
3018 00:56:00.171285 [Write Leveling]
3019 00:56:00.174818 delay byte0 byte1 byte2 byte3
3020 00:56:00.174924
3021 00:56:00.177707 10 0 0
3022 00:56:00.177785 11 0 0
3023 00:56:00.177846 12 0 0
3024 00:56:00.181417 13 0 0
3025 00:56:00.181494 14 0 0
3026 00:56:00.184667 15 0 0
3027 00:56:00.184745 16 0 0
3028 00:56:00.187799 17 0 0
3029 00:56:00.187876 18 0 0
3030 00:56:00.187937 19 0 0
3031 00:56:00.191176 20 0 0
3032 00:56:00.191253 21 0 0
3033 00:56:00.194337 22 0 0
3034 00:56:00.194415 23 0 0
3035 00:56:00.197709 24 0 0
3036 00:56:00.197787 25 0 0
3037 00:56:00.197847 26 0 0
3038 00:56:00.201058 27 0 0
3039 00:56:00.201135 28 0 ff
3040 00:56:00.204174 29 0 ff
3041 00:56:00.204265 30 0 ff
3042 00:56:00.207584 31 0 ff
3043 00:56:00.207685 32 0 ff
3044 00:56:00.207773 33 0 ff
3045 00:56:00.210787 34 0 ff
3046 00:56:00.210864 35 ff ff
3047 00:56:00.214349 36 ff ff
3048 00:56:00.214428 37 ff ff
3049 00:56:00.217476 38 ff ff
3050 00:56:00.217575 39 ff ff
3051 00:56:00.220916 40 ff ff
3052 00:56:00.220993 41 ff ff
3053 00:56:00.223856 pass bytecount = 0xff (0xff: all bytes pass)
3054 00:56:00.226941
3055 00:56:00.227016 DQS0 dly: 35
3056 00:56:00.227076 DQS1 dly: 28
3057 00:56:00.230677 Write Rank0 MR2 =0x2d
3058 00:56:00.234103 [RankSwap] Rank num 2, (Multi 1), Rank 0
3059 00:56:00.236787 Write Rank1 MR1 =0xd6
3060 00:56:00.236862 [Gating]
3061 00:56:00.236920 ==
3062 00:56:00.240252 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3063 00:56:00.243757 fsp= 1, odt_onoff= 1, Byte mode= 0
3064 00:56:00.247092 ==
3065 00:56:00.249798 3 1 0 |2c2b 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
3066 00:56:00.253251 3 1 4 |2c2b 100 |(11 11)(11 11) |(1 1)(1 1)| 0
3067 00:56:00.257029 3 1 8 |2c2b 3535 |(11 11)(0 0) |(1 1)(0 0)| 0
3068 00:56:00.263144 3 1 12 |2c2b 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
3069 00:56:00.266437 3 1 16 |2c2b 3736 |(11 11)(11 11) |(1 0)(0 0)| 0
3070 00:56:00.269764 3 1 20 |2c2b 3636 |(11 11)(0 0) |(1 0)(1 1)| 0
3071 00:56:00.276214 3 1 24 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
3072 00:56:00.279955 [Byte 1] Lead/lag Transition tap number (1)
3073 00:56:00.282532 3 1 28 |2c2b 3535 |(11 11)(0 0) |(1 0)(0 0)| 0
3074 00:56:00.285958 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
3075 00:56:00.292493 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
3076 00:56:00.295698 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
3077 00:56:00.299097 3 2 12 |2c2b 3434 |(11 11)(11 11) |(1 0)(0 0)| 0
3078 00:56:00.305486 3 2 16 |2c2c 3434 |(11 10)(0 0) |(1 0)(1 1)| 0
3079 00:56:00.309076 3 2 20 |303 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
3080 00:56:00.312005 3 2 24 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
3081 00:56:00.318721 3 2 28 |3534 3c3b |(11 11)(11 11) |(0 0)(1 1)| 0
3082 00:56:00.322142 3 3 0 |3534 2828 |(11 11)(11 11) |(0 0)(1 1)| 0
3083 00:56:00.324970 3 3 4 |3534 3c3b |(11 11)(11 11) |(0 0)(1 1)| 0
3084 00:56:00.331644 3 3 8 |3534 3d3d |(11 11)(0 0) |(0 0)(1 1)| 0
3085 00:56:00.334925 3 3 12 |3534 3c3b |(11 11)(11 11) |(0 0)(1 1)| 0
3086 00:56:00.338650 3 3 16 |3534 3b3b |(11 11)(0 0) |(1 1)(1 1)| 0
3087 00:56:00.344687 3 3 20 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3088 00:56:00.348378 [Byte 0] Lead/lag Transition tap number (1)
3089 00:56:00.351815 3 3 24 |3534 e0e |(11 11)(11 11) |(0 0)(1 1)| 0
3090 00:56:00.354761 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
3091 00:56:00.361590 [Byte 1] Lead/lag Transition tap number (1)
3092 00:56:00.364981 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3093 00:56:00.367832 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3094 00:56:00.374616 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3095 00:56:00.378151 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3096 00:56:00.381252 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3097 00:56:00.387698 3 4 20 |e0e 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3098 00:56:00.390953 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3099 00:56:00.394462 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3100 00:56:00.400507 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3101 00:56:00.403861 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3102 00:56:00.407334 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3103 00:56:00.410852 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3104 00:56:00.417482 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3105 00:56:00.420314 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3106 00:56:00.426859 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3107 00:56:00.430226 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3108 00:56:00.433725 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3109 00:56:00.436477 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3110 00:56:00.443563 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3111 00:56:00.446695 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3112 00:56:00.450280 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3113 00:56:00.456571 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3114 00:56:00.459574 [Byte 0] Lead/lag Transition tap number (3)
3115 00:56:00.463195 [Byte 1] Lead/lag falling Transition (3, 6, 16)
3116 00:56:00.470128 3 6 20 |202 3e3d |(11 11)(11 11) |(0 0)(1 0)| 0
3117 00:56:00.472841 [Byte 1] Lead/lag Transition tap number (2)
3118 00:56:00.475955 3 6 24 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
3119 00:56:00.479512 [Byte 0]First pass (3, 6, 24)
3120 00:56:00.482774 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3121 00:56:00.486379 [Byte 1]First pass (3, 6, 28)
3122 00:56:00.489476 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3123 00:56:00.492167 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3124 00:56:00.495943 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3125 00:56:00.502293 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3126 00:56:00.505687 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3127 00:56:00.508762 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3128 00:56:00.511957 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3129 00:56:00.518523 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3130 00:56:00.521805 All bytes gating window > 1UI, Early break!
3131 00:56:00.521881
3132 00:56:00.525432 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 14)
3133 00:56:00.525509
3134 00:56:00.528505 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
3135 00:56:00.528582
3136 00:56:00.528641
3137 00:56:00.528695
3138 00:56:00.532102 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
3139 00:56:00.535510
3140 00:56:00.538851 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
3141 00:56:00.538926
3142 00:56:00.538985
3143 00:56:00.539039 Write Rank1 MR1 =0x56
3144 00:56:00.539092
3145 00:56:00.541692 best RODT dly(2T, 0.5T) = (2, 3)
3146 00:56:00.541768
3147 00:56:00.545485 best RODT dly(2T, 0.5T) = (2, 3)
3148 00:56:00.545570 ==
3149 00:56:00.551755 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3150 00:56:00.555137 fsp= 1, odt_onoff= 1, Byte mode= 0
3151 00:56:00.555214 ==
3152 00:56:00.558003 Start DQ dly to find pass range UseTestEngine =0
3153 00:56:00.561804 x-axis: bit #, y-axis: DQ dly (-127~63)
3154 00:56:00.564679 RX Vref Scan = 0
3155 00:56:00.568103 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3156 00:56:00.571182 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3157 00:56:00.571260 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3158 00:56:00.574390 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3159 00:56:00.577987 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3160 00:56:00.581165 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3161 00:56:00.584717 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3162 00:56:00.587431 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3163 00:56:00.591169 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3164 00:56:00.594651 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3165 00:56:00.597536 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3166 00:56:00.600879 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3167 00:56:00.600957 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3168 00:56:00.604333 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3169 00:56:00.607556 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3170 00:56:00.610658 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3171 00:56:00.613937 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3172 00:56:00.617040 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3173 00:56:00.620257 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3174 00:56:00.624009 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3175 00:56:00.624087 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3176 00:56:00.627161 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3177 00:56:00.630410 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3178 00:56:00.633428 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3179 00:56:00.636759 -2, [0] xxxxxxxx xxxxxxxx [MSB]
3180 00:56:00.640038 -1, [0] xxxxxxxx xxxxxxxo [MSB]
3181 00:56:00.643415 0, [0] xxxoxxxx xxxxxxxo [MSB]
3182 00:56:00.647050 1, [0] xxxoxxxx xxxxxxxo [MSB]
3183 00:56:00.647137 2, [0] xxxoxxxx ooxxxxxo [MSB]
3184 00:56:00.649622 3, [0] xoooxxxo ooxxxxxo [MSB]
3185 00:56:00.652933 4, [0] xooooxxo oooxxxxo [MSB]
3186 00:56:00.656776 5, [0] xooooxxo oooxxxxo [MSB]
3187 00:56:00.660213 6, [0] xooooooo ooooxxoo [MSB]
3188 00:56:00.662646 33, [0] oooxoooo ooooooox [MSB]
3189 00:56:00.662747 34, [0] oooxoooo ooooooox [MSB]
3190 00:56:00.666188 35, [0] ooxxoooo xoooooox [MSB]
3191 00:56:00.669476 36, [0] ooxxoooo xxooooox [MSB]
3192 00:56:00.673196 37, [0] ooxxoooo xxooooox [MSB]
3193 00:56:00.676003 38, [0] oxxxooox xxooooox [MSB]
3194 00:56:00.679323 39, [0] xxxxxoox xxxoxoox [MSB]
3195 00:56:00.682607 40, [0] xxxxxoox xxxoxxox [MSB]
3196 00:56:00.685987 41, [0] xxxxxxxx xxxxxxxx [MSB]
3197 00:56:00.689216 iDelay=41, Bit 0, Center 22 (7 ~ 38) 32
3198 00:56:00.692506 iDelay=41, Bit 1, Center 20 (3 ~ 37) 35
3199 00:56:00.695768 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3200 00:56:00.699191 iDelay=41, Bit 3, Center 16 (0 ~ 32) 33
3201 00:56:00.702512 iDelay=41, Bit 4, Center 21 (4 ~ 38) 35
3202 00:56:00.705695 iDelay=41, Bit 5, Center 23 (6 ~ 40) 35
3203 00:56:00.709388 iDelay=41, Bit 6, Center 23 (6 ~ 40) 35
3204 00:56:00.711967 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
3205 00:56:00.715764 iDelay=41, Bit 8, Center 18 (2 ~ 34) 33
3206 00:56:00.718817 iDelay=41, Bit 9, Center 18 (2 ~ 35) 34
3207 00:56:00.722351 iDelay=41, Bit 10, Center 21 (4 ~ 38) 35
3208 00:56:00.728291 iDelay=41, Bit 11, Center 23 (6 ~ 40) 35
3209 00:56:00.731481 iDelay=41, Bit 12, Center 22 (7 ~ 38) 32
3210 00:56:00.735643 iDelay=41, Bit 13, Center 23 (7 ~ 39) 33
3211 00:56:00.738573 iDelay=41, Bit 14, Center 23 (6 ~ 40) 35
3212 00:56:00.741603 iDelay=41, Bit 15, Center 15 (-1 ~ 32) 34
3213 00:56:00.741679 ==
3214 00:56:00.748103 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3215 00:56:00.751452 fsp= 1, odt_onoff= 1, Byte mode= 0
3216 00:56:00.751529 ==
3217 00:56:00.751588 DQS Delay:
3218 00:56:00.751643 DQS0 = 0, DQS1 = 0
3219 00:56:00.754871 DQM Delay:
3220 00:56:00.754948 DQM0 = 20, DQM1 = 20
3221 00:56:00.758210 DQ Delay:
3222 00:56:00.761219 DQ0 =22, DQ1 =20, DQ2 =18, DQ3 =16
3223 00:56:00.764803 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
3224 00:56:00.767975 DQ8 =18, DQ9 =18, DQ10 =21, DQ11 =23
3225 00:56:00.771487 DQ12 =22, DQ13 =23, DQ14 =23, DQ15 =15
3226 00:56:00.771563
3227 00:56:00.771621
3228 00:56:00.771675 DramC Write-DBI off
3229 00:56:00.771727 ==
3230 00:56:00.777979 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3231 00:56:00.781366 fsp= 1, odt_onoff= 1, Byte mode= 0
3232 00:56:00.781464 ==
3233 00:56:00.784163 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3234 00:56:00.784239
3235 00:56:00.787567 Begin, DQ Scan Range 924~1180
3236 00:56:00.787642
3237 00:56:00.787701
3238 00:56:00.791182 TX Vref Scan disable
3239 00:56:00.793930 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3240 00:56:00.797070 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3241 00:56:00.800569 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3242 00:56:00.803875 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3243 00:56:00.807042 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3244 00:56:00.810828 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3245 00:56:00.813899 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3246 00:56:00.816940 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3247 00:56:00.821022 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3248 00:56:00.827424 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3249 00:56:00.830168 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3250 00:56:00.833667 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3251 00:56:00.837078 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3252 00:56:00.840187 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3253 00:56:00.843331 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3254 00:56:00.846747 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3255 00:56:00.850446 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3256 00:56:00.853444 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3257 00:56:00.856746 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3258 00:56:00.860025 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3259 00:56:00.863607 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3260 00:56:00.866451 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3261 00:56:00.870045 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3262 00:56:00.876492 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3263 00:56:00.879789 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3264 00:56:00.882779 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3265 00:56:00.886479 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3266 00:56:00.889697 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3267 00:56:00.892911 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3268 00:56:00.895846 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3269 00:56:00.899367 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3270 00:56:00.902694 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3271 00:56:00.906190 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3272 00:56:00.909025 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3273 00:56:00.912601 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3274 00:56:00.918494 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3275 00:56:00.922427 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3276 00:56:00.925543 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3277 00:56:00.928990 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3278 00:56:00.931871 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3279 00:56:00.935086 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3280 00:56:00.938709 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3281 00:56:00.941789 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3282 00:56:00.945091 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3283 00:56:00.948552 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3284 00:56:00.951299 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3285 00:56:00.954730 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3286 00:56:00.958255 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3287 00:56:00.961538 972 |3 6 12|[0] xxxxxxxx oxxxxxxo [MSB]
3288 00:56:00.964931 973 |3 6 13|[0] xxxxxxxx ooxxxxxo [MSB]
3289 00:56:00.967986 974 |3 6 14|[0] xxxxxxxx ooxxxxxo [MSB]
3290 00:56:00.974885 975 |3 6 15|[0] xxxxxxxx ooxxxxxo [MSB]
3291 00:56:00.977925 976 |3 6 16|[0] xxxxxxxx oooxxxxo [MSB]
3292 00:56:00.980786 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3293 00:56:00.984538 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
3294 00:56:00.987627 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3295 00:56:00.990553 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3296 00:56:00.994124 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3297 00:56:00.997744 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
3298 00:56:01.000836 983 |3 6 23|[0] xxxxxxxx oooooooo [MSB]
3299 00:56:01.004222 984 |3 6 24|[0] xooooooo oooooooo [MSB]
3300 00:56:01.010789 992 |3 6 32|[0] oooooooo ooooooox [MSB]
3301 00:56:01.014256 993 |3 6 33|[0] oooooooo oxooooox [MSB]
3302 00:56:01.017241 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3303 00:56:01.020447 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3304 00:56:01.024218 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3305 00:56:01.027322 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3306 00:56:01.030729 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3307 00:56:01.034030 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
3308 00:56:01.036825 1000 |3 6 40|[0] oooooooo xxxxxxxx [MSB]
3309 00:56:01.040309 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3310 00:56:01.043622 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
3311 00:56:01.049910 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
3312 00:56:01.053325 1004 |3 6 44|[0] ooxxoooo xxxxxxxx [MSB]
3313 00:56:01.056855 1005 |3 6 45|[0] ooxxoooo xxxxxxxx [MSB]
3314 00:56:01.059903 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3315 00:56:01.063248 Byte0, DQ PI dly=993, DQM PI dly= 993
3316 00:56:01.066918 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 33)
3317 00:56:01.066996
3318 00:56:01.072882 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 33)
3319 00:56:01.072959
3320 00:56:01.076312 Byte1, DQ PI dly=983, DQM PI dly= 983
3321 00:56:01.079562 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3322 00:56:01.079638
3323 00:56:01.083037 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3324 00:56:01.083113
3325 00:56:01.083173 ==
3326 00:56:01.089887 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3327 00:56:01.092717 fsp= 1, odt_onoff= 1, Byte mode= 0
3328 00:56:01.092793 ==
3329 00:56:01.095768 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3330 00:56:01.095852
3331 00:56:01.099135 Begin, DQ Scan Range 959~1023
3332 00:56:01.102666 Write Rank1 MR14 =0x0
3333 00:56:01.110340
3334 00:56:01.110416 CH=1, VrefRange= 0, VrefLevel = 0
3335 00:56:01.116659 TX Bit0 (986~1000) 15 993, Bit8 (976~989) 14 982,
3336 00:56:01.119821 TX Bit1 (985~998) 14 991, Bit9 (977~986) 10 981,
3337 00:56:01.126581 TX Bit2 (984~998) 15 991, Bit10 (979~992) 14 985,
3338 00:56:01.130018 TX Bit3 (982~995) 14 988, Bit11 (979~992) 14 985,
3339 00:56:01.133678 TX Bit4 (985~999) 15 992, Bit12 (979~991) 13 985,
3340 00:56:01.139547 TX Bit5 (985~1000) 16 992, Bit13 (979~993) 15 986,
3341 00:56:01.143135 TX Bit6 (985~1000) 16 992, Bit14 (979~992) 14 985,
3342 00:56:01.149104 TX Bit7 (985~1000) 16 992, Bit15 (972~984) 13 978,
3343 00:56:01.149206
3344 00:56:01.149280 Write Rank1 MR14 =0x2
3345 00:56:01.159313
3346 00:56:01.159390 CH=1, VrefRange= 0, VrefLevel = 2
3347 00:56:01.165793 TX Bit0 (986~1001) 16 993, Bit8 (976~990) 15 983,
3348 00:56:01.168727 TX Bit1 (985~999) 15 992, Bit9 (977~987) 11 982,
3349 00:56:01.176125 TX Bit2 (983~999) 17 991, Bit10 (979~992) 14 985,
3350 00:56:01.178725 TX Bit3 (981~996) 16 988, Bit11 (979~992) 14 985,
3351 00:56:01.182127 TX Bit4 (985~1000) 16 992, Bit12 (979~992) 14 985,
3352 00:56:01.188992 TX Bit5 (986~1000) 15 993, Bit13 (979~993) 15 986,
3353 00:56:01.191978 TX Bit6 (985~1000) 16 992, Bit14 (979~992) 14 985,
3354 00:56:01.198223 TX Bit7 (985~1000) 16 992, Bit15 (972~985) 14 978,
3355 00:56:01.198299
3356 00:56:01.198359 Write Rank1 MR14 =0x4
3357 00:56:01.208239
3358 00:56:01.208314 CH=1, VrefRange= 0, VrefLevel = 4
3359 00:56:01.215200 TX Bit0 (986~1002) 17 994, Bit8 (975~991) 17 983,
3360 00:56:01.218607 TX Bit1 (985~1000) 16 992, Bit9 (976~987) 12 981,
3361 00:56:01.225000 TX Bit2 (984~999) 16 991, Bit10 (978~993) 16 985,
3362 00:56:01.228171 TX Bit3 (981~997) 17 989, Bit11 (979~993) 15 986,
3363 00:56:01.231357 TX Bit4 (985~1001) 17 993, Bit12 (979~993) 15 986,
3364 00:56:01.237933 TX Bit5 (986~1001) 16 993, Bit13 (979~994) 16 986,
3365 00:56:01.241339 TX Bit6 (984~1001) 18 992, Bit14 (978~992) 15 985,
3366 00:56:01.247934 TX Bit7 (985~1001) 17 993, Bit15 (972~985) 14 978,
3367 00:56:01.248011
3368 00:56:01.248070 Write Rank1 MR14 =0x6
3369 00:56:01.257768
3370 00:56:01.257844 CH=1, VrefRange= 0, VrefLevel = 6
3371 00:56:01.264664 TX Bit0 (985~1003) 19 994, Bit8 (974~991) 18 982,
3372 00:56:01.267875 TX Bit1 (984~1001) 18 992, Bit9 (975~988) 14 981,
3373 00:56:01.274713 TX Bit2 (983~1000) 18 991, Bit10 (978~993) 16 985,
3374 00:56:01.277871 TX Bit3 (980~997) 18 988, Bit11 (979~993) 15 986,
3375 00:56:01.283925 TX Bit4 (984~1002) 19 993, Bit12 (979~993) 15 986,
3376 00:56:01.287413 TX Bit5 (985~1002) 18 993, Bit13 (978~994) 17 986,
3377 00:56:01.290552 TX Bit6 (984~1002) 19 993, Bit14 (978~993) 16 985,
3378 00:56:01.297353 TX Bit7 (984~1002) 19 993, Bit15 (972~986) 15 979,
3379 00:56:01.297430
3380 00:56:01.297489 Write Rank1 MR14 =0x8
3381 00:56:01.307804
3382 00:56:01.307880 CH=1, VrefRange= 0, VrefLevel = 8
3383 00:56:01.314114 TX Bit0 (985~1003) 19 994, Bit8 (974~992) 19 983,
3384 00:56:01.317012 TX Bit1 (984~1002) 19 993, Bit9 (975~990) 16 982,
3385 00:56:01.323878 TX Bit2 (983~1000) 18 991, Bit10 (977~994) 18 985,
3386 00:56:01.327350 TX Bit3 (980~998) 19 989, Bit11 (978~994) 17 986,
3387 00:56:01.333873 TX Bit4 (984~1002) 19 993, Bit12 (978~993) 16 985,
3388 00:56:01.337413 TX Bit5 (985~1003) 19 994, Bit13 (978~995) 18 986,
3389 00:56:01.340712 TX Bit6 (984~1002) 19 993, Bit14 (978~994) 17 986,
3390 00:56:01.346494 TX Bit7 (984~1002) 19 993, Bit15 (971~987) 17 979,
3391 00:56:01.346570
3392 00:56:01.346630 Write Rank1 MR14 =0xa
3393 00:56:01.357367
3394 00:56:01.360443 CH=1, VrefRange= 0, VrefLevel = 10
3395 00:56:01.363764 TX Bit0 (985~1004) 20 994, Bit8 (973~992) 20 982,
3396 00:56:01.367408 TX Bit1 (984~1003) 20 993, Bit9 (974~990) 17 982,
3397 00:56:01.373402 TX Bit2 (982~1001) 20 991, Bit10 (977~994) 18 985,
3398 00:56:01.376819 TX Bit3 (979~998) 20 988, Bit11 (978~994) 17 986,
3399 00:56:01.380436 TX Bit4 (984~1003) 20 993, Bit12 (978~994) 17 986,
3400 00:56:01.387070 TX Bit5 (985~1004) 20 994, Bit13 (978~995) 18 986,
3401 00:56:01.390624 TX Bit6 (984~1003) 20 993, Bit14 (977~994) 18 985,
3402 00:56:01.396260 TX Bit7 (984~1003) 20 993, Bit15 (971~988) 18 979,
3403 00:56:01.396337
3404 00:56:01.396396 Write Rank1 MR14 =0xc
3405 00:56:01.406848
3406 00:56:01.410148 CH=1, VrefRange= 0, VrefLevel = 12
3407 00:56:01.413544 TX Bit0 (985~1005) 21 995, Bit8 (973~992) 20 982,
3408 00:56:01.416641 TX Bit1 (984~1004) 21 994, Bit9 (974~991) 18 982,
3409 00:56:01.423752 TX Bit2 (982~1002) 21 992, Bit10 (976~995) 20 985,
3410 00:56:01.426905 TX Bit3 (979~999) 21 989, Bit11 (977~995) 19 986,
3411 00:56:01.433553 TX Bit4 (984~1003) 20 993, Bit12 (978~994) 17 986,
3412 00:56:01.437183 TX Bit5 (985~1005) 21 995, Bit13 (978~996) 19 987,
3413 00:56:01.439718 TX Bit6 (984~1004) 21 994, Bit14 (977~994) 18 985,
3414 00:56:01.446492 TX Bit7 (984~1004) 21 994, Bit15 (971~989) 19 980,
3415 00:56:01.446612
3416 00:56:01.446675 Write Rank1 MR14 =0xe
3417 00:56:01.457085
3418 00:56:01.459964 CH=1, VrefRange= 0, VrefLevel = 14
3419 00:56:01.463308 TX Bit0 (985~1005) 21 995, Bit8 (973~993) 21 983,
3420 00:56:01.467165 TX Bit1 (984~1005) 22 994, Bit9 (973~991) 19 982,
3421 00:56:01.473239 TX Bit2 (982~1002) 21 992, Bit10 (976~996) 21 986,
3422 00:56:01.476513 TX Bit3 (979~999) 21 989, Bit11 (977~996) 20 986,
3423 00:56:01.483391 TX Bit4 (984~1004) 21 994, Bit12 (977~995) 19 986,
3424 00:56:01.486766 TX Bit5 (985~1005) 21 995, Bit13 (978~997) 20 987,
3425 00:56:01.490116 TX Bit6 (983~1005) 23 994, Bit14 (977~995) 19 986,
3426 00:56:01.496426 TX Bit7 (984~1005) 22 994, Bit15 (971~990) 20 980,
3427 00:56:01.496554
3428 00:56:01.496666 Write Rank1 MR14 =0x10
3429 00:56:01.507015
3430 00:56:01.510914 CH=1, VrefRange= 0, VrefLevel = 16
3431 00:56:01.513744 TX Bit0 (985~1006) 22 995, Bit8 (973~993) 21 983,
3432 00:56:01.517143 TX Bit1 (983~1005) 23 994, Bit9 (973~992) 20 982,
3433 00:56:01.523542 TX Bit2 (981~1003) 23 992, Bit10 (975~996) 22 985,
3434 00:56:01.527142 TX Bit3 (979~1000) 22 989, Bit11 (977~996) 20 986,
3435 00:56:01.533799 TX Bit4 (983~1005) 23 994, Bit12 (977~996) 20 986,
3436 00:56:01.536806 TX Bit5 (984~1006) 23 995, Bit13 (977~997) 21 987,
3437 00:56:01.540055 TX Bit6 (983~1005) 23 994, Bit14 (977~996) 20 986,
3438 00:56:01.546600 TX Bit7 (984~1005) 22 994, Bit15 (971~991) 21 981,
3439 00:56:01.546698
3440 00:56:01.546760 Write Rank1 MR14 =0x12
3441 00:56:01.557436
3442 00:56:01.560828 CH=1, VrefRange= 0, VrefLevel = 18
3443 00:56:01.564111 TX Bit0 (984~1006) 23 995, Bit8 (972~993) 22 982,
3444 00:56:01.567255 TX Bit1 (983~1005) 23 994, Bit9 (973~992) 20 982,
3445 00:56:01.573946 TX Bit2 (981~1004) 24 992, Bit10 (975~997) 23 986,
3446 00:56:01.576993 TX Bit3 (978~1000) 23 989, Bit11 (977~997) 21 987,
3447 00:56:01.583962 TX Bit4 (983~1005) 23 994, Bit12 (976~997) 22 986,
3448 00:56:01.586961 TX Bit5 (984~1006) 23 995, Bit13 (977~998) 22 987,
3449 00:56:01.590609 TX Bit6 (983~1005) 23 994, Bit14 (976~996) 21 986,
3450 00:56:01.596790 TX Bit7 (984~1005) 22 994, Bit15 (970~991) 22 980,
3451 00:56:01.596899
3452 00:56:01.597000 Write Rank1 MR14 =0x14
3453 00:56:01.608104
3454 00:56:01.610942 CH=1, VrefRange= 0, VrefLevel = 20
3455 00:56:01.614261 TX Bit0 (984~1006) 23 995, Bit8 (973~994) 22 983,
3456 00:56:01.617428 TX Bit1 (983~1005) 23 994, Bit9 (972~992) 21 982,
3457 00:56:01.624334 TX Bit2 (980~1005) 26 992, Bit10 (975~998) 24 986,
3458 00:56:01.627778 TX Bit3 (978~1001) 24 989, Bit11 (976~998) 23 987,
3459 00:56:01.633989 TX Bit4 (983~1006) 24 994, Bit12 (976~997) 22 986,
3460 00:56:01.637460 TX Bit5 (984~1006) 23 995, Bit13 (977~998) 22 987,
3461 00:56:01.640183 TX Bit6 (983~1005) 23 994, Bit14 (976~997) 22 986,
3462 00:56:01.647296 TX Bit7 (984~1005) 22 994, Bit15 (970~992) 23 981,
3463 00:56:01.647413
3464 00:56:01.650302 Write Rank1 MR14 =0x16
3465 00:56:01.658068
3466 00:56:01.661585 CH=1, VrefRange= 0, VrefLevel = 22
3467 00:56:01.664395 TX Bit0 (984~1006) 23 995, Bit8 (972~994) 23 983,
3468 00:56:01.667817 TX Bit1 (982~1006) 25 994, Bit9 (972~993) 22 982,
3469 00:56:01.674512 TX Bit2 (980~1005) 26 992, Bit10 (975~998) 24 986,
3470 00:56:01.677794 TX Bit3 (978~1001) 24 989, Bit11 (975~999) 25 987,
3471 00:56:01.684629 TX Bit4 (982~1006) 25 994, Bit12 (976~998) 23 987,
3472 00:56:01.688006 TX Bit5 (984~1006) 23 995, Bit13 (977~999) 23 988,
3473 00:56:01.690617 TX Bit6 (983~1006) 24 994, Bit14 (975~998) 24 986,
3474 00:56:01.697487 TX Bit7 (983~1006) 24 994, Bit15 (970~992) 23 981,
3475 00:56:01.697601
3476 00:56:01.697663 Write Rank1 MR14 =0x18
3477 00:56:01.708495
3478 00:56:01.711699 CH=1, VrefRange= 0, VrefLevel = 24
3479 00:56:01.715102 TX Bit0 (984~1007) 24 995, Bit8 (971~995) 25 983,
3480 00:56:01.718949 TX Bit1 (982~1006) 25 994, Bit9 (972~993) 22 982,
3481 00:56:01.724904 TX Bit2 (980~1005) 26 992, Bit10 (974~998) 25 986,
3482 00:56:01.728060 TX Bit3 (978~1002) 25 990, Bit11 (975~999) 25 987,
3483 00:56:01.735108 TX Bit4 (982~1006) 25 994, Bit12 (976~998) 23 987,
3484 00:56:01.737827 TX Bit5 (984~1007) 24 995, Bit13 (976~999) 24 987,
3485 00:56:01.741180 TX Bit6 (982~1006) 25 994, Bit14 (975~998) 24 986,
3486 00:56:01.748108 TX Bit7 (983~1006) 24 994, Bit15 (970~993) 24 981,
3487 00:56:01.748185
3488 00:56:01.750760 Write Rank1 MR14 =0x1a
3489 00:56:01.759282
3490 00:56:01.762488 CH=1, VrefRange= 0, VrefLevel = 26
3491 00:56:01.765713 TX Bit0 (984~1007) 24 995, Bit8 (971~996) 26 983,
3492 00:56:01.769113 TX Bit1 (982~1006) 25 994, Bit9 (972~993) 22 982,
3493 00:56:01.775736 TX Bit2 (979~1005) 27 992, Bit10 (973~999) 27 986,
3494 00:56:01.778482 TX Bit3 (978~1002) 25 990, Bit11 (975~999) 25 987,
3495 00:56:01.785690 TX Bit4 (982~1006) 25 994, Bit12 (975~999) 25 987,
3496 00:56:01.788469 TX Bit5 (984~1007) 24 995, Bit13 (976~1000) 25 988,
3497 00:56:01.792160 TX Bit6 (982~1006) 25 994, Bit14 (974~999) 26 986,
3498 00:56:01.798338 TX Bit7 (983~1006) 24 994, Bit15 (969~993) 25 981,
3499 00:56:01.798417
3500 00:56:01.798477 Write Rank1 MR14 =0x1c
3501 00:56:01.809879
3502 00:56:01.813346 CH=1, VrefRange= 0, VrefLevel = 28
3503 00:56:01.816427 TX Bit0 (984~1008) 25 996, Bit8 (972~996) 25 984,
3504 00:56:01.819532 TX Bit1 (982~1007) 26 994, Bit9 (971~994) 24 982,
3505 00:56:01.825922 TX Bit2 (979~1005) 27 992, Bit10 (973~999) 27 986,
3506 00:56:01.829489 TX Bit3 (977~1003) 27 990, Bit11 (974~999) 26 986,
3507 00:56:01.832681 TX Bit4 (982~1007) 26 994, Bit12 (975~999) 25 987,
3508 00:56:01.839527 TX Bit5 (983~1007) 25 995, Bit13 (976~1000) 25 988,
3509 00:56:01.843022 TX Bit6 (982~1007) 26 994, Bit14 (974~999) 26 986,
3510 00:56:01.849248 TX Bit7 (982~1007) 26 994, Bit15 (969~993) 25 981,
3511 00:56:01.849324
3512 00:56:01.849384 Write Rank1 MR14 =0x1e
3513 00:56:01.860118
3514 00:56:01.863494 CH=1, VrefRange= 0, VrefLevel = 30
3515 00:56:01.867257 TX Bit0 (983~1008) 26 995, Bit8 (972~996) 25 984,
3516 00:56:01.870099 TX Bit1 (982~1006) 25 994, Bit9 (971~994) 24 982,
3517 00:56:01.876895 TX Bit2 (979~1005) 27 992, Bit10 (973~1000) 28 986,
3518 00:56:01.880090 TX Bit3 (978~1003) 26 990, Bit11 (975~999) 25 987,
3519 00:56:01.886877 TX Bit4 (982~1007) 26 994, Bit12 (974~999) 26 986,
3520 00:56:01.889666 TX Bit5 (983~1008) 26 995, Bit13 (975~1000) 26 987,
3521 00:56:01.893247 TX Bit6 (982~1007) 26 994, Bit14 (974~999) 26 986,
3522 00:56:01.900019 TX Bit7 (982~1007) 26 994, Bit15 (969~993) 25 981,
3523 00:56:01.900092
3524 00:56:01.902855 Write Rank1 MR14 =0x20
3525 00:56:01.911193
3526 00:56:01.914711 CH=1, VrefRange= 0, VrefLevel = 32
3527 00:56:01.917936 TX Bit0 (983~1008) 26 995, Bit8 (972~996) 25 984,
3528 00:56:01.920771 TX Bit1 (982~1006) 25 994, Bit9 (971~994) 24 982,
3529 00:56:01.927613 TX Bit2 (979~1005) 27 992, Bit10 (973~1000) 28 986,
3530 00:56:01.930748 TX Bit3 (978~1003) 26 990, Bit11 (975~999) 25 987,
3531 00:56:01.937304 TX Bit4 (982~1007) 26 994, Bit12 (974~999) 26 986,
3532 00:56:01.940633 TX Bit5 (983~1008) 26 995, Bit13 (975~1000) 26 987,
3533 00:56:01.944184 TX Bit6 (982~1007) 26 994, Bit14 (974~999) 26 986,
3534 00:56:01.950423 TX Bit7 (982~1007) 26 994, Bit15 (969~993) 25 981,
3535 00:56:01.950492
3536 00:56:01.953330 Write Rank1 MR14 =0x22
3537 00:56:01.962545
3538 00:56:01.965652 CH=1, VrefRange= 0, VrefLevel = 34
3539 00:56:01.968351 TX Bit0 (983~1008) 26 995, Bit8 (972~996) 25 984,
3540 00:56:01.971746 TX Bit1 (982~1006) 25 994, Bit9 (971~994) 24 982,
3541 00:56:01.978337 TX Bit2 (979~1005) 27 992, Bit10 (973~1000) 28 986,
3542 00:56:01.981488 TX Bit3 (978~1003) 26 990, Bit11 (975~999) 25 987,
3543 00:56:01.988128 TX Bit4 (982~1007) 26 994, Bit12 (974~999) 26 986,
3544 00:56:01.991700 TX Bit5 (983~1008) 26 995, Bit13 (975~1000) 26 987,
3545 00:56:01.995242 TX Bit6 (982~1007) 26 994, Bit14 (974~999) 26 986,
3546 00:56:02.001398 TX Bit7 (982~1007) 26 994, Bit15 (969~993) 25 981,
3547 00:56:02.001493
3548 00:56:02.004837 Write Rank1 MR14 =0x24
3549 00:56:02.012491
3550 00:56:02.015785 CH=1, VrefRange= 0, VrefLevel = 36
3551 00:56:02.019173 TX Bit0 (983~1008) 26 995, Bit8 (972~996) 25 984,
3552 00:56:02.022594 TX Bit1 (982~1006) 25 994, Bit9 (971~994) 24 982,
3553 00:56:02.028899 TX Bit2 (979~1005) 27 992, Bit10 (973~1000) 28 986,
3554 00:56:02.032352 TX Bit3 (978~1003) 26 990, Bit11 (975~999) 25 987,
3555 00:56:02.038697 TX Bit4 (982~1007) 26 994, Bit12 (974~999) 26 986,
3556 00:56:02.041982 TX Bit5 (983~1008) 26 995, Bit13 (975~1000) 26 987,
3557 00:56:02.045253 TX Bit6 (982~1007) 26 994, Bit14 (974~999) 26 986,
3558 00:56:02.052136 TX Bit7 (982~1007) 26 994, Bit15 (969~993) 25 981,
3559 00:56:02.052231
3560 00:56:02.052304
3561 00:56:02.055470 TX Vref found, early break! 389< 392
3562 00:56:02.058775 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
3563 00:56:02.061530 u1DelayCellOfst[0]=6 cells (5 PI)
3564 00:56:02.064949 u1DelayCellOfst[1]=5 cells (4 PI)
3565 00:56:02.068884 u1DelayCellOfst[2]=2 cells (2 PI)
3566 00:56:02.071522 u1DelayCellOfst[3]=0 cells (0 PI)
3567 00:56:02.075108 u1DelayCellOfst[4]=5 cells (4 PI)
3568 00:56:02.078331 u1DelayCellOfst[5]=6 cells (5 PI)
3569 00:56:02.081551 u1DelayCellOfst[6]=5 cells (4 PI)
3570 00:56:02.084637 u1DelayCellOfst[7]=5 cells (4 PI)
3571 00:56:02.087703 Byte0, DQ PI dly=990, DQM PI dly= 992
3572 00:56:02.091064 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
3573 00:56:02.091135
3574 00:56:02.097963 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
3575 00:56:02.098032
3576 00:56:02.098088 u1DelayCellOfst[8]=3 cells (3 PI)
3577 00:56:02.101274 u1DelayCellOfst[9]=1 cells (1 PI)
3578 00:56:02.104342 u1DelayCellOfst[10]=6 cells (5 PI)
3579 00:56:02.107469 u1DelayCellOfst[11]=7 cells (6 PI)
3580 00:56:02.111393 u1DelayCellOfst[12]=6 cells (5 PI)
3581 00:56:02.114147 u1DelayCellOfst[13]=7 cells (6 PI)
3582 00:56:02.117719 u1DelayCellOfst[14]=6 cells (5 PI)
3583 00:56:02.121056 u1DelayCellOfst[15]=0 cells (0 PI)
3584 00:56:02.123687 Byte1, DQ PI dly=981, DQM PI dly= 984
3585 00:56:02.127536 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
3586 00:56:02.130305
3587 00:56:02.133728 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
3588 00:56:02.133808
3589 00:56:02.137387 wait MRW command Rank1 MR14 =0x1e fired (1)
3590 00:56:02.140166 Write Rank1 MR14 =0x1e
3591 00:56:02.140244
3592 00:56:02.140323 Final TX Range 0 Vref 30
3593 00:56:02.140397
3594 00:56:02.147181 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3595 00:56:02.147261
3596 00:56:02.153486 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3597 00:56:02.163055 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3598 00:56:02.169928 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3599 00:56:02.170008 Write Rank1 MR3 =0xb0
3600 00:56:02.173148 DramC Write-DBI on
3601 00:56:02.173223 ==
3602 00:56:02.176776 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3603 00:56:02.179574 fsp= 1, odt_onoff= 1, Byte mode= 0
3604 00:56:02.183196 ==
3605 00:56:02.186037 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3606 00:56:02.186114
3607 00:56:02.189580 Begin, DQ Scan Range 704~768
3608 00:56:02.189672
3609 00:56:02.189732
3610 00:56:02.189787 TX Vref Scan disable
3611 00:56:02.192652 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3612 00:56:02.195919 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3613 00:56:02.202530 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3614 00:56:02.205745 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3615 00:56:02.208868 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3616 00:56:02.212487 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3617 00:56:02.215698 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3618 00:56:02.219073 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3619 00:56:02.222287 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3620 00:56:02.225889 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3621 00:56:02.229045 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3622 00:56:02.232008 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3623 00:56:02.235372 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3624 00:56:02.238437 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3625 00:56:02.242222 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3626 00:56:02.245186 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3627 00:56:02.248694 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3628 00:56:02.254827 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3629 00:56:02.258361 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3630 00:56:02.261379 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3631 00:56:02.264931 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3632 00:56:02.268332 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
3633 00:56:02.271700 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
3634 00:56:02.278537 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3635 00:56:02.282000 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3636 00:56:02.285603 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3637 00:56:02.288150 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3638 00:56:02.291750 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3639 00:56:02.294695 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3640 00:56:02.297980 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3641 00:56:02.301535 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3642 00:56:02.304904 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3643 00:56:02.308196 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3644 00:56:02.310918 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
3645 00:56:02.314624 753 |2 6 49|[0] xxxxxxxx xxxxxxxx [MSB]
3646 00:56:02.317788 Byte0, DQ PI dly=739, DQM PI dly= 739
3647 00:56:02.324299 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 35)
3648 00:56:02.324376
3649 00:56:02.327451 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 35)
3650 00:56:02.327529
3651 00:56:02.330789 Byte1, DQ PI dly=728, DQM PI dly= 728
3652 00:56:02.337745 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
3653 00:56:02.337822
3654 00:56:02.341081 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
3655 00:56:02.341158
3656 00:56:02.347515 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3657 00:56:02.354100 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3658 00:56:02.360462 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3659 00:56:02.363732 Write Rank1 MR3 =0x30
3660 00:56:02.363809 DramC Write-DBI off
3661 00:56:02.363868
3662 00:56:02.366982 [DATLAT]
3663 00:56:02.370365 Freq=1600, CH1 RK1, use_rxtx_scan=0
3664 00:56:02.370463
3665 00:56:02.370537 DATLAT Default: 0x10
3666 00:56:02.373807 7, 0xFFFF, sum=0
3667 00:56:02.373877 8, 0xFFFF, sum=0
3668 00:56:02.376749 9, 0xFFFF, sum=0
3669 00:56:02.376819 10, 0xFFFF, sum=0
3670 00:56:02.380154 11, 0xFFFF, sum=0
3671 00:56:02.380226 12, 0xFFFF, sum=0
3672 00:56:02.383099 13, 0xFFFF, sum=0
3673 00:56:02.383170 14, 0x0, sum=1
3674 00:56:02.383227 15, 0x0, sum=2
3675 00:56:02.386663 16, 0x0, sum=3
3676 00:56:02.386742 17, 0x0, sum=4
3677 00:56:02.393662 pattern=2 first_step=14 total pass=5 best_step=16
3678 00:56:02.393737 ==
3679 00:56:02.396514 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3680 00:56:02.400109 fsp= 1, odt_onoff= 1, Byte mode= 0
3681 00:56:02.400177 ==
3682 00:56:02.406479 Start DQ dly to find pass range UseTestEngine =1
3683 00:56:02.409977 x-axis: bit #, y-axis: DQ dly (-127~63)
3684 00:56:02.410057 RX Vref Scan = 0
3685 00:56:02.412691 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3686 00:56:02.416184 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3687 00:56:02.419707 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3688 00:56:02.422392 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3689 00:56:02.426014 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3690 00:56:02.428969 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3691 00:56:02.429049 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3692 00:56:02.432635 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3693 00:56:02.435878 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3694 00:56:02.439258 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3695 00:56:02.442623 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3696 00:56:02.445884 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3697 00:56:02.449111 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3698 00:56:02.452706 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3699 00:56:02.455333 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3700 00:56:02.455411 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3701 00:56:02.458610 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3702 00:56:02.462131 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3703 00:56:02.465259 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3704 00:56:02.468998 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3705 00:56:02.472172 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3706 00:56:02.475353 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3707 00:56:02.478379 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3708 00:56:02.478457 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3709 00:56:02.481853 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3710 00:56:02.484904 -1, [0] xxxxxxxx xxxxxxxo [MSB]
3711 00:56:02.488236 0, [0] xxxoxxxx xxxxxxxo [MSB]
3712 00:56:02.491409 1, [0] xxxoxxxx ooxxxxxo [MSB]
3713 00:56:02.494992 2, [0] xoooxxxx ooxxxxxo [MSB]
3714 00:56:02.498134 3, [0] xooooxxx ooxxxxxo [MSB]
3715 00:56:02.498212 4, [0] xooooxxo oooxxxxo [MSB]
3716 00:56:02.501197 5, [0] ooooooxo ooooxxxo [MSB]
3717 00:56:02.504711 6, [0] ooooooxo ooooxooo [MSB]
3718 00:56:02.508644 33, [0] oooxoooo ooooooox [MSB]
3719 00:56:02.512013 34, [0] oooxoooo ooooooox [MSB]
3720 00:56:02.515602 35, [0] oooxoooo xxooooox [MSB]
3721 00:56:02.518409 36, [0] ooxxoooo xxooooox [MSB]
3722 00:56:02.521862 37, [0] ooxxoooo xxooooox [MSB]
3723 00:56:02.525650 38, [0] oxxxoooo xxxoooox [MSB]
3724 00:56:02.528302 39, [0] xxxxxoox xxxxxxxx [MSB]
3725 00:56:02.528379 40, [0] xxxxxoox xxxxxxxx [MSB]
3726 00:56:02.531434 41, [0] xxxxxxox xxxxxxxx [MSB]
3727 00:56:02.534865 42, [0] xxxxxxxx xxxxxxxx [MSB]
3728 00:56:02.538465 iDelay=42, Bit 0, Center 21 (5 ~ 38) 34
3729 00:56:02.541740 iDelay=42, Bit 1, Center 19 (2 ~ 37) 36
3730 00:56:02.545211 iDelay=42, Bit 2, Center 18 (2 ~ 35) 34
3731 00:56:02.548187 iDelay=42, Bit 3, Center 16 (0 ~ 32) 33
3732 00:56:02.554717 iDelay=42, Bit 4, Center 20 (3 ~ 38) 36
3733 00:56:02.558111 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3734 00:56:02.561378 iDelay=42, Bit 6, Center 24 (7 ~ 41) 35
3735 00:56:02.564918 iDelay=42, Bit 7, Center 21 (4 ~ 38) 35
3736 00:56:02.568174 iDelay=42, Bit 8, Center 17 (1 ~ 34) 34
3737 00:56:02.571021 iDelay=42, Bit 9, Center 17 (1 ~ 34) 34
3738 00:56:02.574065 iDelay=42, Bit 10, Center 20 (4 ~ 37) 34
3739 00:56:02.577373 iDelay=42, Bit 11, Center 21 (5 ~ 38) 34
3740 00:56:02.580945 iDelay=42, Bit 12, Center 22 (7 ~ 38) 32
3741 00:56:02.584431 iDelay=42, Bit 13, Center 22 (6 ~ 38) 33
3742 00:56:02.587841 iDelay=42, Bit 14, Center 22 (6 ~ 38) 33
3743 00:56:02.594191 iDelay=42, Bit 15, Center 15 (-2 ~ 32) 35
3744 00:56:02.594268 ==
3745 00:56:02.597205 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3746 00:56:02.600688 fsp= 1, odt_onoff= 1, Byte mode= 0
3747 00:56:02.600765 ==
3748 00:56:02.604001 DQS Delay:
3749 00:56:02.604077 DQS0 = 0, DQS1 = 0
3750 00:56:02.604136 DQM Delay:
3751 00:56:02.607539 DQM0 = 20, DQM1 = 19
3752 00:56:02.607614 DQ Delay:
3753 00:56:02.611107 DQ0 =21, DQ1 =19, DQ2 =18, DQ3 =16
3754 00:56:02.613753 DQ4 =20, DQ5 =22, DQ6 =24, DQ7 =21
3755 00:56:02.617655 DQ8 =17, DQ9 =17, DQ10 =20, DQ11 =21
3756 00:56:02.620348 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =15
3757 00:56:02.620424
3758 00:56:02.620483
3759 00:56:02.620538
3760 00:56:02.623945 [DramC_TX_OE_Calibration] TA2
3761 00:56:02.626945 Original DQ_B0 (3 6) =30, OEN = 27
3762 00:56:02.630296 Original DQ_B1 (3 6) =30, OEN = 27
3763 00:56:02.633927 23, 0x0, End_B0=23 End_B1=23
3764 00:56:02.637100 24, 0x0, End_B0=24 End_B1=24
3765 00:56:02.637178 25, 0x0, End_B0=25 End_B1=25
3766 00:56:02.639924 26, 0x0, End_B0=26 End_B1=26
3767 00:56:02.643376 27, 0x0, End_B0=27 End_B1=27
3768 00:56:02.646869 28, 0x0, End_B0=28 End_B1=28
3769 00:56:02.650268 29, 0x0, End_B0=29 End_B1=29
3770 00:56:02.650346 30, 0x0, End_B0=30 End_B1=30
3771 00:56:02.653043 31, 0xFFFF, End_B0=30 End_B1=30
3772 00:56:02.660153 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3773 00:56:02.666560 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3774 00:56:02.666635
3775 00:56:02.666694
3776 00:56:02.666749 Write Rank1 MR23 =0x3f
3777 00:56:02.669678 [DQSOSC]
3778 00:56:02.675817 [DQSOSCAuto] RK1, (LSB)MR18= 0xb0b0, (MSB)MR19= 0x202, tDQSOscB0 = 457 ps tDQSOscB1 = 457 ps
3779 00:56:02.682690 CH1_RK1: MR19=0x202, MR18=0xB0B0, DQSOSC=457, MR23=63, INC=11, DEC=17
3780 00:56:02.685949 Write Rank1 MR23 =0x3f
3781 00:56:02.686029 [DQSOSC]
3782 00:56:02.692889 [DQSOSCAuto] RK1, (LSB)MR18= 0xb0b0, (MSB)MR19= 0x202, tDQSOscB0 = 457 ps tDQSOscB1 = 457 ps
3783 00:56:02.695546 CH1 RK1: MR19=202, MR18=B0B0
3784 00:56:02.699075 [RxdqsGatingPostProcess] freq 1600
3785 00:56:02.705896 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3786 00:56:02.705975 Rank: 0
3787 00:56:02.709135 best DQS0 dly(2T, 0.5T) = (2, 6)
3788 00:56:02.712476 best DQS1 dly(2T, 0.5T) = (2, 6)
3789 00:56:02.715109 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3790 00:56:02.718553 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3791 00:56:02.718646 Rank: 1
3792 00:56:02.722028 best DQS0 dly(2T, 0.5T) = (2, 6)
3793 00:56:02.725442 best DQS1 dly(2T, 0.5T) = (2, 6)
3794 00:56:02.728648 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3795 00:56:02.731787 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3796 00:56:02.735173 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3797 00:56:02.738607 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3798 00:56:02.744570 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3799 00:56:02.744678
3800 00:56:02.744756
3801 00:56:02.748138 [Calibration Summary] Freqency 1600
3802 00:56:02.748240 CH 0, Rank 0
3803 00:56:02.748320 All Pass.
3804 00:56:02.748412
3805 00:56:02.751862 CH 0, Rank 1
3806 00:56:02.751941 All Pass.
3807 00:56:02.752019
3808 00:56:02.752091 CH 1, Rank 0
3809 00:56:02.754410 All Pass.
3810 00:56:02.754502
3811 00:56:02.754577 CH 1, Rank 1
3812 00:56:02.754648 All Pass.
3813 00:56:02.757839
3814 00:56:02.761425 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3815 00:56:02.771300 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3816 00:56:02.777494 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3817 00:56:02.777664 Write Rank0 MR3 =0xb0
3818 00:56:02.784480 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3819 00:56:02.790562 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3820 00:56:02.800558 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3821 00:56:02.800667 Write Rank1 MR3 =0xb0
3822 00:56:02.807512 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3823 00:56:02.813931 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3824 00:56:02.820349 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3825 00:56:02.823753 Write Rank0 MR3 =0xb0
3826 00:56:02.830166 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3827 00:56:02.836825 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3828 00:56:02.843134 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3829 00:56:02.846493 Write Rank1 MR3 =0xb0
3830 00:56:02.846592 DramC Write-DBI on
3831 00:56:02.852997 [GetDramInforAfterCalByMRR] Vendor 6.
3832 00:56:02.856637 [GetDramInforAfterCalByMRR] Revision 505.
3833 00:56:02.856713 MR8 1111
3834 00:56:02.859411 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3835 00:56:02.862892 MR8 1111
3836 00:56:02.866429 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3837 00:56:02.866509 MR8 1111
3838 00:56:02.872586 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3839 00:56:02.872684 MR8 1111
3840 00:56:02.879831 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3841 00:56:02.885913 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3842 00:56:02.888969 Write Rank0 MR13 =0xd0
3843 00:56:02.892470 Write Rank1 MR13 =0xd0
3844 00:56:02.892542 Write Rank0 MR13 =0xd0
3845 00:56:02.895619 Write Rank1 MR13 =0xd0
3846 00:56:02.899185 Save calibration result to emmc
3847 00:56:02.899251
3848 00:56:02.899307
3849 00:56:02.902131 [DramcModeReg_Check] Freq_1600, FSP_1
3850 00:56:02.902198 FSP_1, CH_0, RK0
3851 00:56:02.905439 Write Rank0 MR13 =0xd8
3852 00:56:02.908778 MR12 = 0x5e (global = 0x5e) match
3853 00:56:02.911733 MR14 = 0x1c (global = 0x1c) match
3854 00:56:02.911806 FSP_1, CH_0, RK1
3855 00:56:02.915289 Write Rank1 MR13 =0xd8
3856 00:56:02.918855 MR12 = 0x60 (global = 0x60) match
3857 00:56:02.922321 MR14 = 0x1a (global = 0x1a) match
3858 00:56:02.922392 FSP_1, CH_1, RK0
3859 00:56:02.925352 Write Rank0 MR13 =0xd8
3860 00:56:02.928365 MR12 = 0x5c (global = 0x5c) match
3861 00:56:02.931484 MR14 = 0x1c (global = 0x1c) match
3862 00:56:02.931555 FSP_1, CH_1, RK1
3863 00:56:02.935116 Write Rank1 MR13 =0xd8
3864 00:56:02.938520 MR12 = 0x5c (global = 0x5c) match
3865 00:56:02.941326 MR14 = 0x1e (global = 0x1e) match
3866 00:56:02.941405
3867 00:56:02.944885 [MEM_TEST] 02: After DFS, before run time config
3868 00:56:02.956872 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3869 00:56:02.956974
3870 00:56:02.957061 [TA2_TEST]
3871 00:56:02.957143 === TA2 HW
3872 00:56:02.960243 TA2 PAT: XTALK
3873 00:56:02.963229 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3874 00:56:02.969740 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3875 00:56:02.973227 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3876 00:56:02.979607 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3877 00:56:02.979708
3878 00:56:02.979801
3879 00:56:02.979890 Settings after calibration
3880 00:56:02.983363
3881 00:56:02.983477 [DramcRunTimeConfig]
3882 00:56:02.986638 TransferPLLToSPMControl - MODE SW PHYPLL
3883 00:56:02.989459 TX_TRACKING: ON
3884 00:56:02.989561 RX_TRACKING: ON
3885 00:56:02.989686 HW_GATING: ON
3886 00:56:02.992684 HW_GATING DBG: OFF
3887 00:56:02.992751 ddr_geometry:1
3888 00:56:02.996104 ddr_geometry:1
3889 00:56:02.996193 ddr_geometry:1
3890 00:56:02.999443 ddr_geometry:1
3891 00:56:02.999534 ddr_geometry:1
3892 00:56:03.002944 ddr_geometry:1
3893 00:56:03.003035 ddr_geometry:1
3894 00:56:03.003120 ddr_geometry:1
3895 00:56:03.006148 High Freq DUMMY_READ_FOR_TRACKING: ON
3896 00:56:03.009136 ZQCS_ENABLE_LP4: OFF
3897 00:56:03.012363 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3898 00:56:03.015868 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3899 00:56:03.019108 SPM_CONTROL_AFTERK: ON
3900 00:56:03.019185 IMPEDANCE_TRACKING: ON
3901 00:56:03.022641 TEMP_SENSOR: ON
3902 00:56:03.022718 PER_BANK_REFRESH: ON
3903 00:56:03.025914 HW_SAVE_FOR_SR: ON
3904 00:56:03.028870 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3905 00:56:03.032378 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3906 00:56:03.035398 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3907 00:56:03.035474 Read ODT Tracking: ON
3908 00:56:03.038724 =========================
3909 00:56:03.038800
3910 00:56:03.038859 [TA2_TEST]
3911 00:56:03.042224 === TA2 HW
3912 00:56:03.045211 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3913 00:56:03.052184 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3914 00:56:03.055156 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3915 00:56:03.061989 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3916 00:56:03.062065
3917 00:56:03.064785 [MEM_TEST] 03: After run time config
3918 00:56:03.075239 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3919 00:56:03.077801 [complex_mem_test] start addr:0x40024000, len:131072
3920 00:56:03.282598 1st complex R/W mem test pass
3921 00:56:03.288527 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3922 00:56:03.292151 sync preloader write leveling
3923 00:56:03.295386 sync preloader cbt_mr12
3924 00:56:03.298628 sync preloader cbt_clk_dly
3925 00:56:03.298734 sync preloader cbt_cmd_dly
3926 00:56:03.301851 sync preloader cbt_cs
3927 00:56:03.305522 sync preloader cbt_ca_perbit_delay
3928 00:56:03.308784 sync preloader clk_delay
3929 00:56:03.308862 sync preloader dqs_delay
3930 00:56:03.311640 sync preloader u1Gating2T_Save
3931 00:56:03.314995 sync preloader u1Gating05T_Save
3932 00:56:03.318641 sync preloader u1Gatingfine_tune_Save
3933 00:56:03.322000 sync preloader u1Gatingucpass_count_Save
3934 00:56:03.324678 sync preloader u1TxWindowPerbitVref_Save
3935 00:56:03.327877 sync preloader u1TxCenter_min_Save
3936 00:56:03.331628 sync preloader u1TxCenter_max_Save
3937 00:56:03.334652 sync preloader u1Txwin_center_Save
3938 00:56:03.338147 sync preloader u1Txfirst_pass_Save
3939 00:56:03.340964 sync preloader u1Txlast_pass_Save
3940 00:56:03.344278 sync preloader u1RxDatlat_Save
3941 00:56:03.347664 sync preloader u1RxWinPerbitVref_Save
3942 00:56:03.351194 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3943 00:56:03.354289 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3944 00:56:03.357772 sync preloader delay_cell_unit
3945 00:56:03.364239 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3946 00:56:03.367927 sync preloader write leveling
3947 00:56:03.370717 sync preloader cbt_mr12
3948 00:56:03.370796 sync preloader cbt_clk_dly
3949 00:56:03.374057 sync preloader cbt_cmd_dly
3950 00:56:03.377401 sync preloader cbt_cs
3951 00:56:03.380946 sync preloader cbt_ca_perbit_delay
3952 00:56:03.381016 sync preloader clk_delay
3953 00:56:03.383636 sync preloader dqs_delay
3954 00:56:03.386988 sync preloader u1Gating2T_Save
3955 00:56:03.390430 sync preloader u1Gating05T_Save
3956 00:56:03.393585 sync preloader u1Gatingfine_tune_Save
3957 00:56:03.397075 sync preloader u1Gatingucpass_count_Save
3958 00:56:03.400603 sync preloader u1TxWindowPerbitVref_Save
3959 00:56:03.403258 sync preloader u1TxCenter_min_Save
3960 00:56:03.406954 sync preloader u1TxCenter_max_Save
3961 00:56:03.409993 sync preloader u1Txwin_center_Save
3962 00:56:03.413113 sync preloader u1Txfirst_pass_Save
3963 00:56:03.416494 sync preloader u1Txlast_pass_Save
3964 00:56:03.419958 sync preloader u1RxDatlat_Save
3965 00:56:03.422887 sync preloader u1RxWinPerbitVref_Save
3966 00:56:03.426178 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3967 00:56:03.429744 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3968 00:56:03.433003 sync preloader delay_cell_unit
3969 00:56:03.439217 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3970 00:56:03.442649 sync preloader write leveling
3971 00:56:03.442742 sync preloader cbt_mr12
3972 00:56:03.446234 sync preloader cbt_clk_dly
3973 00:56:03.449189 sync preloader cbt_cmd_dly
3974 00:56:03.452906 sync preloader cbt_cs
3975 00:56:03.452999 sync preloader cbt_ca_perbit_delay
3976 00:56:03.455792 sync preloader clk_delay
3977 00:56:03.459461 sync preloader dqs_delay
3978 00:56:03.462516 sync preloader u1Gating2T_Save
3979 00:56:03.465506 sync preloader u1Gating05T_Save
3980 00:56:03.469179 sync preloader u1Gatingfine_tune_Save
3981 00:56:03.472095 sync preloader u1Gatingucpass_count_Save
3982 00:56:03.475344 sync preloader u1TxWindowPerbitVref_Save
3983 00:56:03.478770 sync preloader u1TxCenter_min_Save
3984 00:56:03.482186 sync preloader u1TxCenter_max_Save
3985 00:56:03.485736 sync preloader u1Txwin_center_Save
3986 00:56:03.488746 sync preloader u1Txfirst_pass_Save
3987 00:56:03.488822 sync preloader u1Txlast_pass_Save
3988 00:56:03.492066 sync preloader u1RxDatlat_Save
3989 00:56:03.495285 sync preloader u1RxWinPerbitVref_Save
3990 00:56:03.502011 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3991 00:56:03.505541 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3992 00:56:03.508791 sync preloader delay_cell_unit
3993 00:56:03.512028 just_for_test_dump_coreboot_params dump all params
3994 00:56:03.515478 dump source = 0x0
3995 00:56:03.515609 dump params frequency:1600
3996 00:56:03.518253 dump params rank number:2
3997 00:56:03.518354
3998 00:56:03.521408 dump params write leveling
3999 00:56:03.524883 write leveling[0][0][0] = 0x20
4000 00:56:03.524961 write leveling[0][0][1] = 0x18
4001 00:56:03.528189 write leveling[0][1][0] = 0x1f
4002 00:56:03.531668 write leveling[0][1][1] = 0x16
4003 00:56:03.535320 write leveling[1][0][0] = 0x24
4004 00:56:03.537919 write leveling[1][0][1] = 0x22
4005 00:56:03.541460 write leveling[1][1][0] = 0x23
4006 00:56:03.544925 write leveling[1][1][1] = 0x1c
4007 00:56:03.544993 dump params cbt_cs
4008 00:56:03.547564 cbt_cs[0][0] = 0x7
4009 00:56:03.547629 cbt_cs[0][1] = 0x7
4010 00:56:03.551232 cbt_cs[1][0] = 0x9
4011 00:56:03.551295 cbt_cs[1][1] = 0x9
4012 00:56:03.554528 dump params cbt_mr12
4013 00:56:03.554623 cbt_mr12[0][0] = 0x1e
4014 00:56:03.557903 cbt_mr12[0][1] = 0x20
4015 00:56:03.561146 cbt_mr12[1][0] = 0x1c
4016 00:56:03.561238 cbt_mr12[1][1] = 0x1c
4017 00:56:03.564701 dump params tx window
4018 00:56:03.567458 tx_center_min[0][0][0] = 986
4019 00:56:03.567530 tx_center_max[0][0][0] = 991
4020 00:56:03.571143 tx_center_min[0][0][1] = 978
4021 00:56:03.574055 tx_center_max[0][0][1] = 986
4022 00:56:03.577089 tx_center_min[0][1][0] = 984
4023 00:56:03.580846 tx_center_max[0][1][0] = 990
4024 00:56:03.580941 tx_center_min[0][1][1] = 976
4025 00:56:03.583860 tx_center_max[0][1][1] = 983
4026 00:56:03.587315 tx_center_min[1][0][0] = 992
4027 00:56:03.590140 tx_center_max[1][0][0] = 997
4028 00:56:03.593750 tx_center_min[1][0][1] = 988
4029 00:56:03.593861 tx_center_max[1][0][1] = 995
4030 00:56:03.596915 tx_center_min[1][1][0] = 990
4031 00:56:03.600224 tx_center_max[1][1][0] = 995
4032 00:56:03.603759 tx_center_min[1][1][1] = 981
4033 00:56:03.606557 tx_center_max[1][1][1] = 987
4034 00:56:03.606635 dump params tx window
4035 00:56:03.609930 tx_win_center[0][0][0] = 991
4036 00:56:03.613357 tx_first_pass[0][0][0] = 979
4037 00:56:03.616557 tx_last_pass[0][0][0] = 1004
4038 00:56:03.616635 tx_win_center[0][0][1] = 990
4039 00:56:03.620083 tx_first_pass[0][0][1] = 978
4040 00:56:03.623477 tx_last_pass[0][0][1] = 1002
4041 00:56:03.626710 tx_win_center[0][0][2] = 991
4042 00:56:03.629781 tx_first_pass[0][0][2] = 979
4043 00:56:03.629874 tx_last_pass[0][0][2] = 1004
4044 00:56:03.633311 tx_win_center[0][0][3] = 986
4045 00:56:03.636225 tx_first_pass[0][0][3] = 974
4046 00:56:03.639626 tx_last_pass[0][0][3] = 998
4047 00:56:03.642839 tx_win_center[0][0][4] = 989
4048 00:56:03.642941 tx_first_pass[0][0][4] = 977
4049 00:56:03.646469 tx_last_pass[0][0][4] = 1001
4050 00:56:03.649832 tx_win_center[0][0][5] = 987
4051 00:56:03.652423 tx_first_pass[0][0][5] = 976
4052 00:56:03.655861 tx_last_pass[0][0][5] = 999
4053 00:56:03.655938 tx_win_center[0][0][6] = 988
4054 00:56:03.659359 tx_first_pass[0][0][6] = 976
4055 00:56:03.662856 tx_last_pass[0][0][6] = 1000
4056 00:56:03.666149 tx_win_center[0][0][7] = 989
4057 00:56:03.669050 tx_first_pass[0][0][7] = 977
4058 00:56:03.669127 tx_last_pass[0][0][7] = 1001
4059 00:56:03.672316 tx_win_center[0][0][8] = 978
4060 00:56:03.675754 tx_first_pass[0][0][8] = 967
4061 00:56:03.679180 tx_last_pass[0][0][8] = 990
4062 00:56:03.679257 tx_win_center[0][0][9] = 979
4063 00:56:03.682033 tx_first_pass[0][0][9] = 968
4064 00:56:03.685393 tx_last_pass[0][0][9] = 991
4065 00:56:03.689009 tx_win_center[0][0][10] = 986
4066 00:56:03.692399 tx_first_pass[0][0][10] = 974
4067 00:56:03.692476 tx_last_pass[0][0][10] = 998
4068 00:56:03.695211 tx_win_center[0][0][11] = 979
4069 00:56:03.698500 tx_first_pass[0][0][11] = 968
4070 00:56:03.701744 tx_last_pass[0][0][11] = 991
4071 00:56:03.704819 tx_win_center[0][0][12] = 980
4072 00:56:03.708732 tx_first_pass[0][0][12] = 968
4073 00:56:03.708810 tx_last_pass[0][0][12] = 993
4074 00:56:03.711648 tx_win_center[0][0][13] = 981
4075 00:56:03.715394 tx_first_pass[0][0][13] = 969
4076 00:56:03.718056 tx_last_pass[0][0][13] = 993
4077 00:56:03.721724 tx_win_center[0][0][14] = 982
4078 00:56:03.721843 tx_first_pass[0][0][14] = 969
4079 00:56:03.724734 tx_last_pass[0][0][14] = 996
4080 00:56:03.728061 tx_win_center[0][0][15] = 984
4081 00:56:03.731441 tx_first_pass[0][0][15] = 971
4082 00:56:03.734638 tx_last_pass[0][0][15] = 997
4083 00:56:03.737855 tx_win_center[0][1][0] = 990
4084 00:56:03.737933 tx_first_pass[0][1][0] = 978
4085 00:56:03.741246 tx_last_pass[0][1][0] = 1002
4086 00:56:03.744422 tx_win_center[0][1][1] = 989
4087 00:56:03.747650 tx_first_pass[0][1][1] = 977
4088 00:56:03.751095 tx_last_pass[0][1][1] = 1001
4089 00:56:03.751172 tx_win_center[0][1][2] = 990
4090 00:56:03.754503 tx_first_pass[0][1][2] = 978
4091 00:56:03.757894 tx_last_pass[0][1][2] = 1002
4092 00:56:03.760608 tx_win_center[0][1][3] = 984
4093 00:56:03.763998 tx_first_pass[0][1][3] = 973
4094 00:56:03.764074 tx_last_pass[0][1][3] = 996
4095 00:56:03.767422 tx_win_center[0][1][4] = 989
4096 00:56:03.770776 tx_first_pass[0][1][4] = 977
4097 00:56:03.774352 tx_last_pass[0][1][4] = 1001
4098 00:56:03.774428 tx_win_center[0][1][5] = 986
4099 00:56:03.777086 tx_first_pass[0][1][5] = 975
4100 00:56:03.780364 tx_last_pass[0][1][5] = 998
4101 00:56:03.783818 tx_win_center[0][1][6] = 987
4102 00:56:03.787327 tx_first_pass[0][1][6] = 975
4103 00:56:03.787403 tx_last_pass[0][1][6] = 999
4104 00:56:03.790768 tx_win_center[0][1][7] = 988
4105 00:56:03.793704 tx_first_pass[0][1][7] = 976
4106 00:56:03.797053 tx_last_pass[0][1][7] = 1001
4107 00:56:03.800681 tx_win_center[0][1][8] = 976
4108 00:56:03.800757 tx_first_pass[0][1][8] = 965
4109 00:56:03.803373 tx_last_pass[0][1][8] = 988
4110 00:56:03.806845 tx_win_center[0][1][9] = 978
4111 00:56:03.810355 tx_first_pass[0][1][9] = 967
4112 00:56:03.810431 tx_last_pass[0][1][9] = 989
4113 00:56:03.813756 tx_win_center[0][1][10] = 983
4114 00:56:03.816444 tx_first_pass[0][1][10] = 971
4115 00:56:03.819615 tx_last_pass[0][1][10] = 996
4116 00:56:03.823483 tx_win_center[0][1][11] = 977
4117 00:56:03.826674 tx_first_pass[0][1][11] = 966
4118 00:56:03.826750 tx_last_pass[0][1][11] = 989
4119 00:56:03.830278 tx_win_center[0][1][12] = 978
4120 00:56:03.833701 tx_first_pass[0][1][12] = 967
4121 00:56:03.836647 tx_last_pass[0][1][12] = 990
4122 00:56:03.839435 tx_win_center[0][1][13] = 978
4123 00:56:03.839510 tx_first_pass[0][1][13] = 967
4124 00:56:03.843056 tx_last_pass[0][1][13] = 989
4125 00:56:03.846165 tx_win_center[0][1][14] = 979
4126 00:56:03.849169 tx_first_pass[0][1][14] = 967
4127 00:56:03.852348 tx_last_pass[0][1][14] = 991
4128 00:56:03.856038 tx_win_center[0][1][15] = 981
4129 00:56:03.856114 tx_first_pass[0][1][15] = 970
4130 00:56:03.859164 tx_last_pass[0][1][15] = 993
4131 00:56:03.862623 tx_win_center[1][0][0] = 997
4132 00:56:03.865647 tx_first_pass[1][0][0] = 985
4133 00:56:03.868872 tx_last_pass[1][0][0] = 1010
4134 00:56:03.868948 tx_win_center[1][0][1] = 996
4135 00:56:03.872127 tx_first_pass[1][0][1] = 984
4136 00:56:03.875526 tx_last_pass[1][0][1] = 1008
4137 00:56:03.878661 tx_win_center[1][0][2] = 994
4138 00:56:03.881697 tx_first_pass[1][0][2] = 982
4139 00:56:03.881775 tx_last_pass[1][0][2] = 1006
4140 00:56:03.885703 tx_win_center[1][0][3] = 992
4141 00:56:03.888475 tx_first_pass[1][0][3] = 979
4142 00:56:03.891819 tx_last_pass[1][0][3] = 1005
4143 00:56:03.895289 tx_win_center[1][0][4] = 996
4144 00:56:03.895366 tx_first_pass[1][0][4] = 984
4145 00:56:03.898341 tx_last_pass[1][0][4] = 1008
4146 00:56:03.901766 tx_win_center[1][0][5] = 996
4147 00:56:03.905108 tx_first_pass[1][0][5] = 984
4148 00:56:03.908440 tx_last_pass[1][0][5] = 1009
4149 00:56:03.908517 tx_win_center[1][0][6] = 996
4150 00:56:03.911865 tx_first_pass[1][0][6] = 984
4151 00:56:03.914597 tx_last_pass[1][0][6] = 1009
4152 00:56:03.918252 tx_win_center[1][0][7] = 996
4153 00:56:03.921583 tx_first_pass[1][0][7] = 984
4154 00:56:03.921673 tx_last_pass[1][0][7] = 1008
4155 00:56:03.924678 tx_win_center[1][0][8] = 991
4156 00:56:03.927978 tx_first_pass[1][0][8] = 980
4157 00:56:03.931062 tx_last_pass[1][0][8] = 1002
4158 00:56:03.934560 tx_win_center[1][0][9] = 990
4159 00:56:03.934637 tx_first_pass[1][0][9] = 979
4160 00:56:03.938188 tx_last_pass[1][0][9] = 1002
4161 00:56:03.940821 tx_win_center[1][0][10] = 994
4162 00:56:03.944371 tx_first_pass[1][0][10] = 983
4163 00:56:03.947921 tx_last_pass[1][0][10] = 1005
4164 00:56:03.947997 tx_win_center[1][0][11] = 995
4165 00:56:03.951027 tx_first_pass[1][0][11] = 984
4166 00:56:03.954152 tx_last_pass[1][0][11] = 1006
4167 00:56:03.957846 tx_win_center[1][0][12] = 995
4168 00:56:03.960518 tx_first_pass[1][0][12] = 984
4169 00:56:03.963882 tx_last_pass[1][0][12] = 1006
4170 00:56:03.963958 tx_win_center[1][0][13] = 995
4171 00:56:03.967325 tx_first_pass[1][0][13] = 985
4172 00:56:03.970674 tx_last_pass[1][0][13] = 1006
4173 00:56:03.974154 tx_win_center[1][0][14] = 994
4174 00:56:03.977473 tx_first_pass[1][0][14] = 983
4175 00:56:03.977572 tx_last_pass[1][0][14] = 1005
4176 00:56:03.980158 tx_win_center[1][0][15] = 988
4177 00:56:03.983568 tx_first_pass[1][0][15] = 977
4178 00:56:03.986547 tx_last_pass[1][0][15] = 1000
4179 00:56:03.990247 tx_win_center[1][1][0] = 995
4180 00:56:03.993165 tx_first_pass[1][1][0] = 983
4181 00:56:03.993254 tx_last_pass[1][1][0] = 1008
4182 00:56:03.996720 tx_win_center[1][1][1] = 994
4183 00:56:03.999865 tx_first_pass[1][1][1] = 982
4184 00:56:04.003018 tx_last_pass[1][1][1] = 1006
4185 00:56:04.006426 tx_win_center[1][1][2] = 992
4186 00:56:04.006503 tx_first_pass[1][1][2] = 979
4187 00:56:04.009474 tx_last_pass[1][1][2] = 1005
4188 00:56:04.013234 tx_win_center[1][1][3] = 990
4189 00:56:04.015974 tx_first_pass[1][1][3] = 978
4190 00:56:04.019341 tx_last_pass[1][1][3] = 1003
4191 00:56:04.019442 tx_win_center[1][1][4] = 994
4192 00:56:04.022694 tx_first_pass[1][1][4] = 982
4193 00:56:04.026043 tx_last_pass[1][1][4] = 1007
4194 00:56:04.029557 tx_win_center[1][1][5] = 995
4195 00:56:04.032250 tx_first_pass[1][1][5] = 983
4196 00:56:04.032325 tx_last_pass[1][1][5] = 1008
4197 00:56:04.035736 tx_win_center[1][1][6] = 994
4198 00:56:04.039265 tx_first_pass[1][1][6] = 982
4199 00:56:04.042556 tx_last_pass[1][1][6] = 1007
4200 00:56:04.045672 tx_win_center[1][1][7] = 994
4201 00:56:04.045748 tx_first_pass[1][1][7] = 982
4202 00:56:04.048782 tx_last_pass[1][1][7] = 1007
4203 00:56:04.052555 tx_win_center[1][1][8] = 984
4204 00:56:04.055270 tx_first_pass[1][1][8] = 972
4205 00:56:04.058574 tx_last_pass[1][1][8] = 996
4206 00:56:04.058650 tx_win_center[1][1][9] = 982
4207 00:56:04.062354 tx_first_pass[1][1][9] = 971
4208 00:56:04.065057 tx_last_pass[1][1][9] = 994
4209 00:56:04.068538 tx_win_center[1][1][10] = 986
4210 00:56:04.071922 tx_first_pass[1][1][10] = 973
4211 00:56:04.071999 tx_last_pass[1][1][10] = 1000
4212 00:56:04.075525 tx_win_center[1][1][11] = 987
4213 00:56:04.078333 tx_first_pass[1][1][11] = 975
4214 00:56:04.081453 tx_last_pass[1][1][11] = 999
4215 00:56:04.084882 tx_win_center[1][1][12] = 986
4216 00:56:04.084958 tx_first_pass[1][1][12] = 974
4217 00:56:04.088604 tx_last_pass[1][1][12] = 999
4218 00:56:04.091825 tx_win_center[1][1][13] = 987
4219 00:56:04.095249 tx_first_pass[1][1][13] = 975
4220 00:56:04.097950 tx_last_pass[1][1][13] = 1000
4221 00:56:04.098037 tx_win_center[1][1][14] = 986
4222 00:56:04.101472 tx_first_pass[1][1][14] = 974
4223 00:56:04.104771 tx_last_pass[1][1][14] = 999
4224 00:56:04.108076 tx_win_center[1][1][15] = 981
4225 00:56:04.111243 tx_first_pass[1][1][15] = 969
4226 00:56:04.114527 tx_last_pass[1][1][15] = 993
4227 00:56:04.114603 dump params rx window
4228 00:56:04.117736 rx_firspass[0][0][0] = 5
4229 00:56:04.120990 rx_lastpass[0][0][0] = 39
4230 00:56:04.121065 rx_firspass[0][0][1] = 5
4231 00:56:04.124253 rx_lastpass[0][0][1] = 36
4232 00:56:04.127539 rx_firspass[0][0][2] = 7
4233 00:56:04.127614 rx_lastpass[0][0][2] = 37
4234 00:56:04.131028 rx_firspass[0][0][3] = -1
4235 00:56:04.134240 rx_lastpass[0][0][3] = 30
4236 00:56:04.137485 rx_firspass[0][0][4] = 5
4237 00:56:04.137587 rx_lastpass[0][0][4] = 36
4238 00:56:04.140692 rx_firspass[0][0][5] = 1
4239 00:56:04.144061 rx_lastpass[0][0][5] = 33
4240 00:56:04.144137 rx_firspass[0][0][6] = 4
4241 00:56:04.147305 rx_lastpass[0][0][6] = 33
4242 00:56:04.150631 rx_firspass[0][0][7] = 7
4243 00:56:04.154010 rx_lastpass[0][0][7] = 36
4244 00:56:04.154085 rx_firspass[0][0][8] = 0
4245 00:56:04.157261 rx_lastpass[0][0][8] = 31
4246 00:56:04.160316 rx_firspass[0][0][9] = 1
4247 00:56:04.160410 rx_lastpass[0][0][9] = 32
4248 00:56:04.163434 rx_firspass[0][0][10] = 9
4249 00:56:04.167110 rx_lastpass[0][0][10] = 39
4250 00:56:04.170308 rx_firspass[0][0][11] = 1
4251 00:56:04.170416 rx_lastpass[0][0][11] = 30
4252 00:56:04.173863 rx_firspass[0][0][12] = 1
4253 00:56:04.176640 rx_lastpass[0][0][12] = 33
4254 00:56:04.179900 rx_firspass[0][0][13] = 2
4255 00:56:04.179976 rx_lastpass[0][0][13] = 33
4256 00:56:04.183378 rx_firspass[0][0][14] = 3
4257 00:56:04.186669 rx_lastpass[0][0][14] = 36
4258 00:56:04.186744 rx_firspass[0][0][15] = 7
4259 00:56:04.190021 rx_lastpass[0][0][15] = 37
4260 00:56:04.193517 rx_firspass[0][1][0] = 4
4261 00:56:04.196326 rx_lastpass[0][1][0] = 38
4262 00:56:04.196401 rx_firspass[0][1][1] = 3
4263 00:56:04.199781 rx_lastpass[0][1][1] = 39
4264 00:56:04.204122 rx_firspass[0][1][2] = 5
4265 00:56:04.206747 rx_lastpass[0][1][2] = 40
4266 00:56:04.206821 rx_firspass[0][1][3] = -3
4267 00:56:04.209445 rx_lastpass[0][1][3] = 31
4268 00:56:04.212874 rx_firspass[0][1][4] = 5
4269 00:56:04.212949 rx_lastpass[0][1][4] = 38
4270 00:56:04.216192 rx_firspass[0][1][5] = 0
4271 00:56:04.219509 rx_lastpass[0][1][5] = 32
4272 00:56:04.219610 rx_firspass[0][1][6] = 1
4273 00:56:04.222884 rx_lastpass[0][1][6] = 35
4274 00:56:04.226614 rx_firspass[0][1][7] = 4
4275 00:56:04.229873 rx_lastpass[0][1][7] = 37
4276 00:56:04.229948 rx_firspass[0][1][8] = 0
4277 00:56:04.232855 rx_lastpass[0][1][8] = 33
4278 00:56:04.235644 rx_firspass[0][1][9] = 2
4279 00:56:04.235719 rx_lastpass[0][1][9] = 35
4280 00:56:04.239129 rx_firspass[0][1][10] = 9
4281 00:56:04.242379 rx_lastpass[0][1][10] = 42
4282 00:56:04.245510 rx_firspass[0][1][11] = 0
4283 00:56:04.245618 rx_lastpass[0][1][11] = 33
4284 00:56:04.248784 rx_firspass[0][1][12] = 3
4285 00:56:04.252568 rx_lastpass[0][1][12] = 36
4286 00:56:04.255590 rx_firspass[0][1][13] = 3
4287 00:56:04.255665 rx_lastpass[0][1][13] = 36
4288 00:56:04.258863 rx_firspass[0][1][14] = 5
4289 00:56:04.262283 rx_lastpass[0][1][14] = 37
4290 00:56:04.265284 rx_firspass[0][1][15] = 6
4291 00:56:04.265399 rx_lastpass[0][1][15] = 40
4292 00:56:04.268757 rx_firspass[1][0][0] = 4
4293 00:56:04.271997 rx_lastpass[1][0][0] = 39
4294 00:56:04.272073 rx_firspass[1][0][1] = 3
4295 00:56:04.275055 rx_lastpass[1][0][1] = 36
4296 00:56:04.278702 rx_firspass[1][0][2] = 4
4297 00:56:04.281781 rx_lastpass[1][0][2] = 36
4298 00:56:04.281858 rx_firspass[1][0][3] = -1
4299 00:56:04.285425 rx_lastpass[1][0][3] = 34
4300 00:56:04.288253 rx_firspass[1][0][4] = 5
4301 00:56:04.288354 rx_lastpass[1][0][4] = 36
4302 00:56:04.291353 rx_firspass[1][0][5] = 6
4303 00:56:04.294653 rx_lastpass[1][0][5] = 38
4304 00:56:04.298307 rx_firspass[1][0][6] = 9
4305 00:56:04.298387 rx_lastpass[1][0][6] = 39
4306 00:56:04.301542 rx_firspass[1][0][7] = 5
4307 00:56:04.305277 rx_lastpass[1][0][7] = 37
4308 00:56:04.305352 rx_firspass[1][0][8] = 0
4309 00:56:04.307746 rx_lastpass[1][0][8] = 33
4310 00:56:04.311123 rx_firspass[1][0][9] = 2
4311 00:56:04.311193 rx_lastpass[1][0][9] = 32
4312 00:56:04.314707 rx_firspass[1][0][10] = 5
4313 00:56:04.317972 rx_lastpass[1][0][10] = 36
4314 00:56:04.321396 rx_firspass[1][0][11] = 7
4315 00:56:04.321466 rx_lastpass[1][0][11] = 36
4316 00:56:04.324758 rx_firspass[1][0][12] = 5
4317 00:56:04.327717 rx_lastpass[1][0][12] = 37
4318 00:56:04.330885 rx_firspass[1][0][13] = 7
4319 00:56:04.330962 rx_lastpass[1][0][13] = 36
4320 00:56:04.334193 rx_firspass[1][0][14] = 7
4321 00:56:04.337318 rx_lastpass[1][0][14] = 37
4322 00:56:04.340715 rx_firspass[1][0][15] = 0
4323 00:56:04.340791 rx_lastpass[1][0][15] = 29
4324 00:56:04.344122 rx_firspass[1][1][0] = 5
4325 00:56:04.347838 rx_lastpass[1][1][0] = 38
4326 00:56:04.347914 rx_firspass[1][1][1] = 2
4327 00:56:04.350416 rx_lastpass[1][1][1] = 37
4328 00:56:04.354048 rx_firspass[1][1][2] = 2
4329 00:56:04.357611 rx_lastpass[1][1][2] = 35
4330 00:56:04.357688 rx_firspass[1][1][3] = 0
4331 00:56:04.360264 rx_lastpass[1][1][3] = 32
4332 00:56:04.363643 rx_firspass[1][1][4] = 3
4333 00:56:04.363720 rx_lastpass[1][1][4] = 38
4334 00:56:04.367220 rx_firspass[1][1][5] = 5
4335 00:56:04.370631 rx_lastpass[1][1][5] = 40
4336 00:56:04.373822 rx_firspass[1][1][6] = 7
4337 00:56:04.373899 rx_lastpass[1][1][6] = 41
4338 00:56:04.377063 rx_firspass[1][1][7] = 4
4339 00:56:04.379775 rx_lastpass[1][1][7] = 38
4340 00:56:04.379852 rx_firspass[1][1][8] = 1
4341 00:56:04.383483 rx_lastpass[1][1][8] = 34
4342 00:56:04.386389 rx_firspass[1][1][9] = 1
4343 00:56:04.389944 rx_lastpass[1][1][9] = 34
4344 00:56:04.390021 rx_firspass[1][1][10] = 4
4345 00:56:04.393522 rx_lastpass[1][1][10] = 37
4346 00:56:04.396638 rx_firspass[1][1][11] = 5
4347 00:56:04.396714 rx_lastpass[1][1][11] = 38
4348 00:56:04.399847 rx_firspass[1][1][12] = 7
4349 00:56:04.402784 rx_lastpass[1][1][12] = 38
4350 00:56:04.406676 rx_firspass[1][1][13] = 6
4351 00:56:04.406752 rx_lastpass[1][1][13] = 38
4352 00:56:04.409895 rx_firspass[1][1][14] = 6
4353 00:56:04.412691 rx_lastpass[1][1][14] = 38
4354 00:56:04.416504 rx_firspass[1][1][15] = -2
4355 00:56:04.416604 rx_lastpass[1][1][15] = 32
4356 00:56:04.419927 dump params clk_delay
4357 00:56:04.420020 clk_delay[0] = 1
4358 00:56:04.422532 clk_delay[1] = 0
4359 00:56:04.425862 dump params dqs_delay
4360 00:56:04.425938 dqs_delay[0][0] = 0
4361 00:56:04.429462 dqs_delay[0][1] = 0
4362 00:56:04.429584 dqs_delay[1][0] = -1
4363 00:56:04.432993 dqs_delay[1][1] = 0
4364 00:56:04.435695 dump params delay_cell_unit = 744
4365 00:56:04.435771 dump source = 0x0
4366 00:56:04.439441 dump params frequency:1200
4367 00:56:04.442430 dump params rank number:2
4368 00:56:04.442507
4369 00:56:04.442567 dump params write leveling
4370 00:56:04.445695 write leveling[0][0][0] = 0x0
4371 00:56:04.448966 write leveling[0][0][1] = 0x0
4372 00:56:04.452624 write leveling[0][1][0] = 0x0
4373 00:56:04.455310 write leveling[0][1][1] = 0x0
4374 00:56:04.458656 write leveling[1][0][0] = 0x0
4375 00:56:04.458728 write leveling[1][0][1] = 0x0
4376 00:56:04.462248 write leveling[1][1][0] = 0x0
4377 00:56:04.465577 write leveling[1][1][1] = 0x0
4378 00:56:04.465666 dump params cbt_cs
4379 00:56:04.468730 cbt_cs[0][0] = 0x0
4380 00:56:04.472101 cbt_cs[0][1] = 0x0
4381 00:56:04.472192 cbt_cs[1][0] = 0x0
4382 00:56:04.475641 cbt_cs[1][1] = 0x0
4383 00:56:04.475746 dump params cbt_mr12
4384 00:56:04.478475 cbt_mr12[0][0] = 0x0
4385 00:56:04.478543 cbt_mr12[0][1] = 0x0
4386 00:56:04.481924 cbt_mr12[1][0] = 0x0
4387 00:56:04.481994 cbt_mr12[1][1] = 0x0
4388 00:56:04.484913 dump params tx window
4389 00:56:04.488782 tx_center_min[0][0][0] = 0
4390 00:56:04.491485 tx_center_max[0][0][0] = 0
4391 00:56:04.491575 tx_center_min[0][0][1] = 0
4392 00:56:04.494774 tx_center_max[0][0][1] = 0
4393 00:56:04.497922 tx_center_min[0][1][0] = 0
4394 00:56:04.501778 tx_center_max[0][1][0] = 0
4395 00:56:04.501846 tx_center_min[0][1][1] = 0
4396 00:56:04.504662 tx_center_max[0][1][1] = 0
4397 00:56:04.508451 tx_center_min[1][0][0] = 0
4398 00:56:04.511426 tx_center_max[1][0][0] = 0
4399 00:56:04.511502 tx_center_min[1][0][1] = 0
4400 00:56:04.514636 tx_center_max[1][0][1] = 0
4401 00:56:04.517755 tx_center_min[1][1][0] = 0
4402 00:56:04.520982 tx_center_max[1][1][0] = 0
4403 00:56:04.521073 tx_center_min[1][1][1] = 0
4404 00:56:04.524413 tx_center_max[1][1][1] = 0
4405 00:56:04.527705 dump params tx window
4406 00:56:04.527786 tx_win_center[0][0][0] = 0
4407 00:56:04.531352 tx_first_pass[0][0][0] = 0
4408 00:56:04.534057 tx_last_pass[0][0][0] = 0
4409 00:56:04.537273 tx_win_center[0][0][1] = 0
4410 00:56:04.537349 tx_first_pass[0][0][1] = 0
4411 00:56:04.541068 tx_last_pass[0][0][1] = 0
4412 00:56:04.543975 tx_win_center[0][0][2] = 0
4413 00:56:04.547218 tx_first_pass[0][0][2] = 0
4414 00:56:04.547290 tx_last_pass[0][0][2] = 0
4415 00:56:04.550592 tx_win_center[0][0][3] = 0
4416 00:56:04.553777 tx_first_pass[0][0][3] = 0
4417 00:56:04.557104 tx_last_pass[0][0][3] = 0
4418 00:56:04.557209 tx_win_center[0][0][4] = 0
4419 00:56:04.560468 tx_first_pass[0][0][4] = 0
4420 00:56:04.564058 tx_last_pass[0][0][4] = 0
4421 00:56:04.564160 tx_win_center[0][0][5] = 0
4422 00:56:04.566746 tx_first_pass[0][0][5] = 0
4423 00:56:04.570091 tx_last_pass[0][0][5] = 0
4424 00:56:04.573682 tx_win_center[0][0][6] = 0
4425 00:56:04.573755 tx_first_pass[0][0][6] = 0
4426 00:56:04.576968 tx_last_pass[0][0][6] = 0
4427 00:56:04.580000 tx_win_center[0][0][7] = 0
4428 00:56:04.583422 tx_first_pass[0][0][7] = 0
4429 00:56:04.583517 tx_last_pass[0][0][7] = 0
4430 00:56:04.586724 tx_win_center[0][0][8] = 0
4431 00:56:04.589769 tx_first_pass[0][0][8] = 0
4432 00:56:04.593575 tx_last_pass[0][0][8] = 0
4433 00:56:04.593674 tx_win_center[0][0][9] = 0
4434 00:56:04.596288 tx_first_pass[0][0][9] = 0
4435 00:56:04.599715 tx_last_pass[0][0][9] = 0
4436 00:56:04.603403 tx_win_center[0][0][10] = 0
4437 00:56:04.603471 tx_first_pass[0][0][10] = 0
4438 00:56:04.606161 tx_last_pass[0][0][10] = 0
4439 00:56:04.609496 tx_win_center[0][0][11] = 0
4440 00:56:04.612719 tx_first_pass[0][0][11] = 0
4441 00:56:04.612817 tx_last_pass[0][0][11] = 0
4442 00:56:04.616450 tx_win_center[0][0][12] = 0
4443 00:56:04.619527 tx_first_pass[0][0][12] = 0
4444 00:56:04.622670 tx_last_pass[0][0][12] = 0
4445 00:56:04.622767 tx_win_center[0][0][13] = 0
4446 00:56:04.625809 tx_first_pass[0][0][13] = 0
4447 00:56:04.629524 tx_last_pass[0][0][13] = 0
4448 00:56:04.632721 tx_win_center[0][0][14] = 0
4449 00:56:04.632819 tx_first_pass[0][0][14] = 0
4450 00:56:04.635838 tx_last_pass[0][0][14] = 0
4451 00:56:04.639243 tx_win_center[0][0][15] = 0
4452 00:56:04.642732 tx_first_pass[0][0][15] = 0
4453 00:56:04.642822 tx_last_pass[0][0][15] = 0
4454 00:56:04.645864 tx_win_center[0][1][0] = 0
4455 00:56:04.649106 tx_first_pass[0][1][0] = 0
4456 00:56:04.652277 tx_last_pass[0][1][0] = 0
4457 00:56:04.652354 tx_win_center[0][1][1] = 0
4458 00:56:04.655642 tx_first_pass[0][1][1] = 0
4459 00:56:04.658840 tx_last_pass[0][1][1] = 0
4460 00:56:04.662060 tx_win_center[0][1][2] = 0
4461 00:56:04.662136 tx_first_pass[0][1][2] = 0
4462 00:56:04.665617 tx_last_pass[0][1][2] = 0
4463 00:56:04.669042 tx_win_center[0][1][3] = 0
4464 00:56:04.672494 tx_first_pass[0][1][3] = 0
4465 00:56:04.672571 tx_last_pass[0][1][3] = 0
4466 00:56:04.675111 tx_win_center[0][1][4] = 0
4467 00:56:04.678514 tx_first_pass[0][1][4] = 0
4468 00:56:04.678609 tx_last_pass[0][1][4] = 0
4469 00:56:04.681962 tx_win_center[0][1][5] = 0
4470 00:56:04.685587 tx_first_pass[0][1][5] = 0
4471 00:56:04.688436 tx_last_pass[0][1][5] = 0
4472 00:56:04.688513 tx_win_center[0][1][6] = 0
4473 00:56:04.691737 tx_first_pass[0][1][6] = 0
4474 00:56:04.695189 tx_last_pass[0][1][6] = 0
4475 00:56:04.698774 tx_win_center[0][1][7] = 0
4476 00:56:04.698852 tx_first_pass[0][1][7] = 0
4477 00:56:04.701631 tx_last_pass[0][1][7] = 0
4478 00:56:04.704909 tx_win_center[0][1][8] = 0
4479 00:56:04.708585 tx_first_pass[0][1][8] = 0
4480 00:56:04.708662 tx_last_pass[0][1][8] = 0
4481 00:56:04.711139 tx_win_center[0][1][9] = 0
4482 00:56:04.714829 tx_first_pass[0][1][9] = 0
4483 00:56:04.714905 tx_last_pass[0][1][9] = 0
4484 00:56:04.718140 tx_win_center[0][1][10] = 0
4485 00:56:04.721607 tx_first_pass[0][1][10] = 0
4486 00:56:04.724883 tx_last_pass[0][1][10] = 0
4487 00:56:04.727931 tx_win_center[0][1][11] = 0
4488 00:56:04.728008 tx_first_pass[0][1][11] = 0
4489 00:56:04.731374 tx_last_pass[0][1][11] = 0
4490 00:56:04.734741 tx_win_center[0][1][12] = 0
4491 00:56:04.737429 tx_first_pass[0][1][12] = 0
4492 00:56:04.737530 tx_last_pass[0][1][12] = 0
4493 00:56:04.740908 tx_win_center[0][1][13] = 0
4494 00:56:04.744067 tx_first_pass[0][1][13] = 0
4495 00:56:04.747664 tx_last_pass[0][1][13] = 0
4496 00:56:04.747741 tx_win_center[0][1][14] = 0
4497 00:56:04.750898 tx_first_pass[0][1][14] = 0
4498 00:56:04.754036 tx_last_pass[0][1][14] = 0
4499 00:56:04.757225 tx_win_center[0][1][15] = 0
4500 00:56:04.757302 tx_first_pass[0][1][15] = 0
4501 00:56:04.760697 tx_last_pass[0][1][15] = 0
4502 00:56:04.763688 tx_win_center[1][0][0] = 0
4503 00:56:04.767157 tx_first_pass[1][0][0] = 0
4504 00:56:04.767262 tx_last_pass[1][0][0] = 0
4505 00:56:04.770835 tx_win_center[1][0][1] = 0
4506 00:56:04.774086 tx_first_pass[1][0][1] = 0
4507 00:56:04.776945 tx_last_pass[1][0][1] = 0
4508 00:56:04.777045 tx_win_center[1][0][2] = 0
4509 00:56:04.780413 tx_first_pass[1][0][2] = 0
4510 00:56:04.783612 tx_last_pass[1][0][2] = 0
4511 00:56:04.786919 tx_win_center[1][0][3] = 0
4512 00:56:04.787017 tx_first_pass[1][0][3] = 0
4513 00:56:04.790578 tx_last_pass[1][0][3] = 0
4514 00:56:04.793254 tx_win_center[1][0][4] = 0
4515 00:56:04.796706 tx_first_pass[1][0][4] = 0
4516 00:56:04.796785 tx_last_pass[1][0][4] = 0
4517 00:56:04.800114 tx_win_center[1][0][5] = 0
4518 00:56:04.803594 tx_first_pass[1][0][5] = 0
4519 00:56:04.803690 tx_last_pass[1][0][5] = 0
4520 00:56:04.806793 tx_win_center[1][0][6] = 0
4521 00:56:04.810157 tx_first_pass[1][0][6] = 0
4522 00:56:04.813090 tx_last_pass[1][0][6] = 0
4523 00:56:04.813187 tx_win_center[1][0][7] = 0
4524 00:56:04.816581 tx_first_pass[1][0][7] = 0
4525 00:56:04.819448 tx_last_pass[1][0][7] = 0
4526 00:56:04.823018 tx_win_center[1][0][8] = 0
4527 00:56:04.823112 tx_first_pass[1][0][8] = 0
4528 00:56:04.826296 tx_last_pass[1][0][8] = 0
4529 00:56:04.829738 tx_win_center[1][0][9] = 0
4530 00:56:04.832392 tx_first_pass[1][0][9] = 0
4531 00:56:04.832482 tx_last_pass[1][0][9] = 0
4532 00:56:04.835819 tx_win_center[1][0][10] = 0
4533 00:56:04.839023 tx_first_pass[1][0][10] = 0
4534 00:56:04.842443 tx_last_pass[1][0][10] = 0
4535 00:56:04.842534 tx_win_center[1][0][11] = 0
4536 00:56:04.845836 tx_first_pass[1][0][11] = 0
4537 00:56:04.849260 tx_last_pass[1][0][11] = 0
4538 00:56:04.852287 tx_win_center[1][0][12] = 0
4539 00:56:04.852382 tx_first_pass[1][0][12] = 0
4540 00:56:04.855318 tx_last_pass[1][0][12] = 0
4541 00:56:04.858740 tx_win_center[1][0][13] = 0
4542 00:56:04.862219 tx_first_pass[1][0][13] = 0
4543 00:56:04.862287 tx_last_pass[1][0][13] = 0
4544 00:56:04.865745 tx_win_center[1][0][14] = 0
4545 00:56:04.868895 tx_first_pass[1][0][14] = 0
4546 00:56:04.872127 tx_last_pass[1][0][14] = 0
4547 00:56:04.872221 tx_win_center[1][0][15] = 0
4548 00:56:04.875190 tx_first_pass[1][0][15] = 0
4549 00:56:04.878619 tx_last_pass[1][0][15] = 0
4550 00:56:04.881999 tx_win_center[1][1][0] = 0
4551 00:56:04.885192 tx_first_pass[1][1][0] = 0
4552 00:56:04.885280 tx_last_pass[1][1][0] = 0
4553 00:56:04.888459 tx_win_center[1][1][1] = 0
4554 00:56:04.891471 tx_first_pass[1][1][1] = 0
4555 00:56:04.891548 tx_last_pass[1][1][1] = 0
4556 00:56:04.894718 tx_win_center[1][1][2] = 0
4557 00:56:04.898499 tx_first_pass[1][1][2] = 0
4558 00:56:04.901764 tx_last_pass[1][1][2] = 0
4559 00:56:04.901842 tx_win_center[1][1][3] = 0
4560 00:56:04.904768 tx_first_pass[1][1][3] = 0
4561 00:56:04.907992 tx_last_pass[1][1][3] = 0
4562 00:56:04.911502 tx_win_center[1][1][4] = 0
4563 00:56:04.911579 tx_first_pass[1][1][4] = 0
4564 00:56:04.914735 tx_last_pass[1][1][4] = 0
4565 00:56:04.918019 tx_win_center[1][1][5] = 0
4566 00:56:04.921649 tx_first_pass[1][1][5] = 0
4567 00:56:04.921726 tx_last_pass[1][1][5] = 0
4568 00:56:04.925088 tx_win_center[1][1][6] = 0
4569 00:56:04.927671 tx_first_pass[1][1][6] = 0
4570 00:56:04.927773 tx_last_pass[1][1][6] = 0
4571 00:56:04.931320 tx_win_center[1][1][7] = 0
4572 00:56:04.934614 tx_first_pass[1][1][7] = 0
4573 00:56:04.938178 tx_last_pass[1][1][7] = 0
4574 00:56:04.938255 tx_win_center[1][1][8] = 0
4575 00:56:04.940825 tx_first_pass[1][1][8] = 0
4576 00:56:04.944172 tx_last_pass[1][1][8] = 0
4577 00:56:04.947387 tx_win_center[1][1][9] = 0
4578 00:56:04.947464 tx_first_pass[1][1][9] = 0
4579 00:56:04.950682 tx_last_pass[1][1][9] = 0
4580 00:56:04.954179 tx_win_center[1][1][10] = 0
4581 00:56:04.957579 tx_first_pass[1][1][10] = 0
4582 00:56:04.957670 tx_last_pass[1][1][10] = 0
4583 00:56:04.960797 tx_win_center[1][1][11] = 0
4584 00:56:04.964040 tx_first_pass[1][1][11] = 0
4585 00:56:04.967204 tx_last_pass[1][1][11] = 0
4586 00:56:04.967281 tx_win_center[1][1][12] = 0
4587 00:56:04.970537 tx_first_pass[1][1][12] = 0
4588 00:56:04.974121 tx_last_pass[1][1][12] = 0
4589 00:56:04.976827 tx_win_center[1][1][13] = 0
4590 00:56:04.976903 tx_first_pass[1][1][13] = 0
4591 00:56:04.980677 tx_last_pass[1][1][13] = 0
4592 00:56:04.983187 tx_win_center[1][1][14] = 0
4593 00:56:04.987076 tx_first_pass[1][1][14] = 0
4594 00:56:04.990607 tx_last_pass[1][1][14] = 0
4595 00:56:04.990684 tx_win_center[1][1][15] = 0
4596 00:56:04.993243 tx_first_pass[1][1][15] = 0
4597 00:56:04.996644 tx_last_pass[1][1][15] = 0
4598 00:56:04.996720 dump params rx window
4599 00:56:04.999921 rx_firspass[0][0][0] = 0
4600 00:56:05.003242 rx_lastpass[0][0][0] = 0
4601 00:56:05.003356 rx_firspass[0][0][1] = 0
4602 00:56:05.006548 rx_lastpass[0][0][1] = 0
4603 00:56:05.009498 rx_firspass[0][0][2] = 0
4604 00:56:05.012821 rx_lastpass[0][0][2] = 0
4605 00:56:05.012897 rx_firspass[0][0][3] = 0
4606 00:56:05.016259 rx_lastpass[0][0][3] = 0
4607 00:56:05.019731 rx_firspass[0][0][4] = 0
4608 00:56:05.019812 rx_lastpass[0][0][4] = 0
4609 00:56:05.022906 rx_firspass[0][0][5] = 0
4610 00:56:05.026454 rx_lastpass[0][0][5] = 0
4611 00:56:05.026531 rx_firspass[0][0][6] = 0
4612 00:56:05.029362 rx_lastpass[0][0][6] = 0
4613 00:56:05.032541 rx_firspass[0][0][7] = 0
4614 00:56:05.035954 rx_lastpass[0][0][7] = 0
4615 00:56:05.036031 rx_firspass[0][0][8] = 0
4616 00:56:05.039750 rx_lastpass[0][0][8] = 0
4617 00:56:05.042328 rx_firspass[0][0][9] = 0
4618 00:56:05.042405 rx_lastpass[0][0][9] = 0
4619 00:56:05.045692 rx_firspass[0][0][10] = 0
4620 00:56:05.049074 rx_lastpass[0][0][10] = 0
4621 00:56:05.052491 rx_firspass[0][0][11] = 0
4622 00:56:05.052568 rx_lastpass[0][0][11] = 0
4623 00:56:05.055603 rx_firspass[0][0][12] = 0
4624 00:56:05.059166 rx_lastpass[0][0][12] = 0
4625 00:56:05.059243 rx_firspass[0][0][13] = 0
4626 00:56:05.061859 rx_lastpass[0][0][13] = 0
4627 00:56:05.065628 rx_firspass[0][0][14] = 0
4628 00:56:05.069053 rx_lastpass[0][0][14] = 0
4629 00:56:05.069129 rx_firspass[0][0][15] = 0
4630 00:56:05.072077 rx_lastpass[0][0][15] = 0
4631 00:56:05.075354 rx_firspass[0][1][0] = 0
4632 00:56:05.075431 rx_lastpass[0][1][0] = 0
4633 00:56:05.078398 rx_firspass[0][1][1] = 0
4634 00:56:05.081914 rx_lastpass[0][1][1] = 0
4635 00:56:05.085096 rx_firspass[0][1][2] = 0
4636 00:56:05.085173 rx_lastpass[0][1][2] = 0
4637 00:56:05.088440 rx_firspass[0][1][3] = 0
4638 00:56:05.091697 rx_lastpass[0][1][3] = 0
4639 00:56:05.091774 rx_firspass[0][1][4] = 0
4640 00:56:05.094723 rx_lastpass[0][1][4] = 0
4641 00:56:05.097820 rx_firspass[0][1][5] = 0
4642 00:56:05.097897 rx_lastpass[0][1][5] = 0
4643 00:56:05.101196 rx_firspass[0][1][6] = 0
4644 00:56:05.104931 rx_lastpass[0][1][6] = 0
4645 00:56:05.105008 rx_firspass[0][1][7] = 0
4646 00:56:05.108237 rx_lastpass[0][1][7] = 0
4647 00:56:05.110909 rx_firspass[0][1][8] = 0
4648 00:56:05.114741 rx_lastpass[0][1][8] = 0
4649 00:56:05.114818 rx_firspass[0][1][9] = 0
4650 00:56:05.117459 rx_lastpass[0][1][9] = 0
4651 00:56:05.121264 rx_firspass[0][1][10] = 0
4652 00:56:05.121375 rx_lastpass[0][1][10] = 0
4653 00:56:05.124391 rx_firspass[0][1][11] = 0
4654 00:56:05.127480 rx_lastpass[0][1][11] = 0
4655 00:56:05.130885 rx_firspass[0][1][12] = 0
4656 00:56:05.130952 rx_lastpass[0][1][12] = 0
4657 00:56:05.134643 rx_firspass[0][1][13] = 0
4658 00:56:05.137826 rx_lastpass[0][1][13] = 0
4659 00:56:05.137895 rx_firspass[0][1][14] = 0
4660 00:56:05.140777 rx_lastpass[0][1][14] = 0
4661 00:56:05.144102 rx_firspass[0][1][15] = 0
4662 00:56:05.147361 rx_lastpass[0][1][15] = 0
4663 00:56:05.147444 rx_firspass[1][0][0] = 0
4664 00:56:05.150694 rx_lastpass[1][0][0] = 0
4665 00:56:05.153669 rx_firspass[1][0][1] = 0
4666 00:56:05.153746 rx_lastpass[1][0][1] = 0
4667 00:56:05.156885 rx_firspass[1][0][2] = 0
4668 00:56:05.160240 rx_lastpass[1][0][2] = 0
4669 00:56:05.160317 rx_firspass[1][0][3] = 0
4670 00:56:05.163569 rx_lastpass[1][0][3] = 0
4671 00:56:05.167269 rx_firspass[1][0][4] = 0
4672 00:56:05.170669 rx_lastpass[1][0][4] = 0
4673 00:56:05.170747 rx_firspass[1][0][5] = 0
4674 00:56:05.173424 rx_lastpass[1][0][5] = 0
4675 00:56:05.176739 rx_firspass[1][0][6] = 0
4676 00:56:05.176817 rx_lastpass[1][0][6] = 0
4677 00:56:05.180097 rx_firspass[1][0][7] = 0
4678 00:56:05.183380 rx_lastpass[1][0][7] = 0
4679 00:56:05.183457 rx_firspass[1][0][8] = 0
4680 00:56:05.186582 rx_lastpass[1][0][8] = 0
4681 00:56:05.190234 rx_firspass[1][0][9] = 0
4682 00:56:05.193701 rx_lastpass[1][0][9] = 0
4683 00:56:05.193778 rx_firspass[1][0][10] = 0
4684 00:56:05.196422 rx_lastpass[1][0][10] = 0
4685 00:56:05.199585 rx_firspass[1][0][11] = 0
4686 00:56:05.199662 rx_lastpass[1][0][11] = 0
4687 00:56:05.203421 rx_firspass[1][0][12] = 0
4688 00:56:05.206241 rx_lastpass[1][0][12] = 0
4689 00:56:05.209504 rx_firspass[1][0][13] = 0
4690 00:56:05.209613 rx_lastpass[1][0][13] = 0
4691 00:56:05.213043 rx_firspass[1][0][14] = 0
4692 00:56:05.216408 rx_lastpass[1][0][14] = 0
4693 00:56:05.216484 rx_firspass[1][0][15] = 0
4694 00:56:05.219931 rx_lastpass[1][0][15] = 0
4695 00:56:05.222537 rx_firspass[1][1][0] = 0
4696 00:56:05.225911 rx_lastpass[1][1][0] = 0
4697 00:56:05.225988 rx_firspass[1][1][1] = 0
4698 00:56:05.229538 rx_lastpass[1][1][1] = 0
4699 00:56:05.232749 rx_firspass[1][1][2] = 0
4700 00:56:05.232843 rx_lastpass[1][1][2] = 0
4701 00:56:05.236022 rx_firspass[1][1][3] = 0
4702 00:56:05.239200 rx_lastpass[1][1][3] = 0
4703 00:56:05.239314 rx_firspass[1][1][4] = 0
4704 00:56:05.242544 rx_lastpass[1][1][4] = 0
4705 00:56:05.245718 rx_firspass[1][1][5] = 0
4706 00:56:05.248858 rx_lastpass[1][1][5] = 0
4707 00:56:05.248949 rx_firspass[1][1][6] = 0
4708 00:56:05.252227 rx_lastpass[1][1][6] = 0
4709 00:56:05.255560 rx_firspass[1][1][7] = 0
4710 00:56:05.255638 rx_lastpass[1][1][7] = 0
4711 00:56:05.259026 rx_firspass[1][1][8] = 0
4712 00:56:05.262467 rx_lastpass[1][1][8] = 0
4713 00:56:05.262545 rx_firspass[1][1][9] = 0
4714 00:56:05.265099 rx_lastpass[1][1][9] = 0
4715 00:56:05.268509 rx_firspass[1][1][10] = 0
4716 00:56:05.271723 rx_lastpass[1][1][10] = 0
4717 00:56:05.271801 rx_firspass[1][1][11] = 0
4718 00:56:05.275197 rx_lastpass[1][1][11] = 0
4719 00:56:05.278592 rx_firspass[1][1][12] = 0
4720 00:56:05.282149 rx_lastpass[1][1][12] = 0
4721 00:56:05.282227 rx_firspass[1][1][13] = 0
4722 00:56:05.284767 rx_lastpass[1][1][13] = 0
4723 00:56:05.288176 rx_firspass[1][1][14] = 0
4724 00:56:05.288258 rx_lastpass[1][1][14] = 0
4725 00:56:05.291535 rx_firspass[1][1][15] = 0
4726 00:56:05.294543 rx_lastpass[1][1][15] = 0
4727 00:56:05.294620 dump params clk_delay
4728 00:56:05.298446 clk_delay[0] = 0
4729 00:56:05.298523 clk_delay[1] = 0
4730 00:56:05.301840 dump params dqs_delay
4731 00:56:05.304621 dqs_delay[0][0] = 0
4732 00:56:05.304697 dqs_delay[0][1] = 0
4733 00:56:05.307924 dqs_delay[1][0] = 0
4734 00:56:05.308001 dqs_delay[1][1] = 0
4735 00:56:05.311139 dump params delay_cell_unit = 744
4736 00:56:05.314332 dump source = 0x0
4737 00:56:05.314409 dump params frequency:800
4738 00:56:05.318074 dump params rank number:2
4739 00:56:05.318152
4740 00:56:05.321288 dump params write leveling
4741 00:56:05.324023 write leveling[0][0][0] = 0x0
4742 00:56:05.324100 write leveling[0][0][1] = 0x0
4743 00:56:05.327376 write leveling[0][1][0] = 0x0
4744 00:56:05.330877 write leveling[0][1][1] = 0x0
4745 00:56:05.334446 write leveling[1][0][0] = 0x0
4746 00:56:05.337832 write leveling[1][0][1] = 0x0
4747 00:56:05.340472 write leveling[1][1][0] = 0x0
4748 00:56:05.340544 write leveling[1][1][1] = 0x0
4749 00:56:05.344295 dump params cbt_cs
4750 00:56:05.344366 cbt_cs[0][0] = 0x0
4751 00:56:05.346917 cbt_cs[0][1] = 0x0
4752 00:56:05.346992 cbt_cs[1][0] = 0x0
4753 00:56:05.350395 cbt_cs[1][1] = 0x0
4754 00:56:05.353714 dump params cbt_mr12
4755 00:56:05.353783 cbt_mr12[0][0] = 0x0
4756 00:56:05.357049 cbt_mr12[0][1] = 0x0
4757 00:56:05.357136 cbt_mr12[1][0] = 0x0
4758 00:56:05.360293 cbt_mr12[1][1] = 0x0
4759 00:56:05.360370 dump params tx window
4760 00:56:05.363796 tx_center_min[0][0][0] = 0
4761 00:56:05.367010 tx_center_max[0][0][0] = 0
4762 00:56:05.370260 tx_center_min[0][0][1] = 0
4763 00:56:05.370338 tx_center_max[0][0][1] = 0
4764 00:56:05.373525 tx_center_min[0][1][0] = 0
4765 00:56:05.376755 tx_center_max[0][1][0] = 0
4766 00:56:05.380107 tx_center_min[0][1][1] = 0
4767 00:56:05.380176 tx_center_max[0][1][1] = 0
4768 00:56:05.383620 tx_center_min[1][0][0] = 0
4769 00:56:05.386203 tx_center_max[1][0][0] = 0
4770 00:56:05.389963 tx_center_min[1][0][1] = 0
4771 00:56:05.393123 tx_center_max[1][0][1] = 0
4772 00:56:05.393187 tx_center_min[1][1][0] = 0
4773 00:56:05.396495 tx_center_max[1][1][0] = 0
4774 00:56:05.399793 tx_center_min[1][1][1] = 0
4775 00:56:05.403075 tx_center_max[1][1][1] = 0
4776 00:56:05.403141 dump params tx window
4777 00:56:05.406515 tx_win_center[0][0][0] = 0
4778 00:56:05.409323 tx_first_pass[0][0][0] = 0
4779 00:56:05.409387 tx_last_pass[0][0][0] = 0
4780 00:56:05.412488 tx_win_center[0][0][1] = 0
4781 00:56:05.416073 tx_first_pass[0][0][1] = 0
4782 00:56:05.419283 tx_last_pass[0][0][1] = 0
4783 00:56:05.419373 tx_win_center[0][0][2] = 0
4784 00:56:05.422435 tx_first_pass[0][0][2] = 0
4785 00:56:05.426261 tx_last_pass[0][0][2] = 0
4786 00:56:05.426359 tx_win_center[0][0][3] = 0
4787 00:56:05.428853 tx_first_pass[0][0][3] = 0
4788 00:56:05.432211 tx_last_pass[0][0][3] = 0
4789 00:56:05.435620 tx_win_center[0][0][4] = 0
4790 00:56:05.435693 tx_first_pass[0][0][4] = 0
4791 00:56:05.439059 tx_last_pass[0][0][4] = 0
4792 00:56:05.442685 tx_win_center[0][0][5] = 0
4793 00:56:05.445412 tx_first_pass[0][0][5] = 0
4794 00:56:05.445506 tx_last_pass[0][0][5] = 0
4795 00:56:05.448710 tx_win_center[0][0][6] = 0
4796 00:56:05.452085 tx_first_pass[0][0][6] = 0
4797 00:56:05.454938 tx_last_pass[0][0][6] = 0
4798 00:56:05.455011 tx_win_center[0][0][7] = 0
4799 00:56:05.458191 tx_first_pass[0][0][7] = 0
4800 00:56:05.461848 tx_last_pass[0][0][7] = 0
4801 00:56:05.465125 tx_win_center[0][0][8] = 0
4802 00:56:05.465189 tx_first_pass[0][0][8] = 0
4803 00:56:05.468326 tx_last_pass[0][0][8] = 0
4804 00:56:05.471858 tx_win_center[0][0][9] = 0
4805 00:56:05.475024 tx_first_pass[0][0][9] = 0
4806 00:56:05.475095 tx_last_pass[0][0][9] = 0
4807 00:56:05.478441 tx_win_center[0][0][10] = 0
4808 00:56:05.481620 tx_first_pass[0][0][10] = 0
4809 00:56:05.484960 tx_last_pass[0][0][10] = 0
4810 00:56:05.485047 tx_win_center[0][0][11] = 0
4811 00:56:05.487875 tx_first_pass[0][0][11] = 0
4812 00:56:05.491423 tx_last_pass[0][0][11] = 0
4813 00:56:05.494425 tx_win_center[0][0][12] = 0
4814 00:56:05.494527 tx_first_pass[0][0][12] = 0
4815 00:56:05.497911 tx_last_pass[0][0][12] = 0
4816 00:56:05.500872 tx_win_center[0][0][13] = 0
4817 00:56:05.503886 tx_first_pass[0][0][13] = 0
4818 00:56:05.503983 tx_last_pass[0][0][13] = 0
4819 00:56:05.507597 tx_win_center[0][0][14] = 0
4820 00:56:05.510782 tx_first_pass[0][0][14] = 0
4821 00:56:05.514263 tx_last_pass[0][0][14] = 0
4822 00:56:05.514355 tx_win_center[0][0][15] = 0
4823 00:56:05.517718 tx_first_pass[0][0][15] = 0
4824 00:56:05.520410 tx_last_pass[0][0][15] = 0
4825 00:56:05.523827 tx_win_center[0][1][0] = 0
4826 00:56:05.523924 tx_first_pass[0][1][0] = 0
4827 00:56:05.527326 tx_last_pass[0][1][0] = 0
4828 00:56:05.530619 tx_win_center[0][1][1] = 0
4829 00:56:05.533671 tx_first_pass[0][1][1] = 0
4830 00:56:05.533765 tx_last_pass[0][1][1] = 0
4831 00:56:05.536824 tx_win_center[0][1][2] = 0
4832 00:56:05.540633 tx_first_pass[0][1][2] = 0
4833 00:56:05.543552 tx_last_pass[0][1][2] = 0
4834 00:56:05.543623 tx_win_center[0][1][3] = 0
4835 00:56:05.547129 tx_first_pass[0][1][3] = 0
4836 00:56:05.550415 tx_last_pass[0][1][3] = 0
4837 00:56:05.553751 tx_win_center[0][1][4] = 0
4838 00:56:05.553829 tx_first_pass[0][1][4] = 0
4839 00:56:05.556996 tx_last_pass[0][1][4] = 0
4840 00:56:05.559757 tx_win_center[0][1][5] = 0
4841 00:56:05.563729 tx_first_pass[0][1][5] = 0
4842 00:56:05.563806 tx_last_pass[0][1][5] = 0
4843 00:56:05.566959 tx_win_center[0][1][6] = 0
4844 00:56:05.569861 tx_first_pass[0][1][6] = 0
4845 00:56:05.569937 tx_last_pass[0][1][6] = 0
4846 00:56:05.573045 tx_win_center[0][1][7] = 0
4847 00:56:05.576472 tx_first_pass[0][1][7] = 0
4848 00:56:05.579811 tx_last_pass[0][1][7] = 0
4849 00:56:05.579912 tx_win_center[0][1][8] = 0
4850 00:56:05.583147 tx_first_pass[0][1][8] = 0
4851 00:56:05.586652 tx_last_pass[0][1][8] = 0
4852 00:56:05.589411 tx_win_center[0][1][9] = 0
4853 00:56:05.589527 tx_first_pass[0][1][9] = 0
4854 00:56:05.592741 tx_last_pass[0][1][9] = 0
4855 00:56:05.596165 tx_win_center[0][1][10] = 0
4856 00:56:05.599541 tx_first_pass[0][1][10] = 0
4857 00:56:05.599619 tx_last_pass[0][1][10] = 0
4858 00:56:05.602761 tx_win_center[0][1][11] = 0
4859 00:56:05.605929 tx_first_pass[0][1][11] = 0
4860 00:56:05.609163 tx_last_pass[0][1][11] = 0
4861 00:56:05.609241 tx_win_center[0][1][12] = 0
4862 00:56:05.612642 tx_first_pass[0][1][12] = 0
4863 00:56:05.616309 tx_last_pass[0][1][12] = 0
4864 00:56:05.619207 tx_win_center[0][1][13] = 0
4865 00:56:05.619285 tx_first_pass[0][1][13] = 0
4866 00:56:05.622441 tx_last_pass[0][1][13] = 0
4867 00:56:05.625939 tx_win_center[0][1][14] = 0
4868 00:56:05.628910 tx_first_pass[0][1][14] = 0
4869 00:56:05.628992 tx_last_pass[0][1][14] = 0
4870 00:56:05.632104 tx_win_center[0][1][15] = 0
4871 00:56:05.635554 tx_first_pass[0][1][15] = 0
4872 00:56:05.638820 tx_last_pass[0][1][15] = 0
4873 00:56:05.638898 tx_win_center[1][0][0] = 0
4874 00:56:05.642100 tx_first_pass[1][0][0] = 0
4875 00:56:05.645259 tx_last_pass[1][0][0] = 0
4876 00:56:05.648382 tx_win_center[1][0][1] = 0
4877 00:56:05.648459 tx_first_pass[1][0][1] = 0
4878 00:56:05.652301 tx_last_pass[1][0][1] = 0
4879 00:56:05.654978 tx_win_center[1][0][2] = 0
4880 00:56:05.658393 tx_first_pass[1][0][2] = 0
4881 00:56:05.658494 tx_last_pass[1][0][2] = 0
4882 00:56:05.661822 tx_win_center[1][0][3] = 0
4883 00:56:05.664969 tx_first_pass[1][0][3] = 0
4884 00:56:05.668510 tx_last_pass[1][0][3] = 0
4885 00:56:05.668588 tx_win_center[1][0][4] = 0
4886 00:56:05.671460 tx_first_pass[1][0][4] = 0
4887 00:56:05.674609 tx_last_pass[1][0][4] = 0
4888 00:56:05.678381 tx_win_center[1][0][5] = 0
4889 00:56:05.678459 tx_first_pass[1][0][5] = 0
4890 00:56:05.681831 tx_last_pass[1][0][5] = 0
4891 00:56:05.684407 tx_win_center[1][0][6] = 0
4892 00:56:05.687895 tx_first_pass[1][0][6] = 0
4893 00:56:05.687972 tx_last_pass[1][0][6] = 0
4894 00:56:05.691243 tx_win_center[1][0][7] = 0
4895 00:56:05.694764 tx_first_pass[1][0][7] = 0
4896 00:56:05.694842 tx_last_pass[1][0][7] = 0
4897 00:56:05.698011 tx_win_center[1][0][8] = 0
4898 00:56:05.700688 tx_first_pass[1][0][8] = 0
4899 00:56:05.704193 tx_last_pass[1][0][8] = 0
4900 00:56:05.704271 tx_win_center[1][0][9] = 0
4901 00:56:05.707607 tx_first_pass[1][0][9] = 0
4902 00:56:05.710648 tx_last_pass[1][0][9] = 0
4903 00:56:05.714066 tx_win_center[1][0][10] = 0
4904 00:56:05.714167 tx_first_pass[1][0][10] = 0
4905 00:56:05.717447 tx_last_pass[1][0][10] = 0
4906 00:56:05.720837 tx_win_center[1][0][11] = 0
4907 00:56:05.724179 tx_first_pass[1][0][11] = 0
4908 00:56:05.724263 tx_last_pass[1][0][11] = 0
4909 00:56:05.727496 tx_win_center[1][0][12] = 0
4910 00:56:05.730539 tx_first_pass[1][0][12] = 0
4911 00:56:05.733785 tx_last_pass[1][0][12] = 0
4912 00:56:05.733862 tx_win_center[1][0][13] = 0
4913 00:56:05.736915 tx_first_pass[1][0][13] = 0
4914 00:56:05.740600 tx_last_pass[1][0][13] = 0
4915 00:56:05.743505 tx_win_center[1][0][14] = 0
4916 00:56:05.746980 tx_first_pass[1][0][14] = 0
4917 00:56:05.747058 tx_last_pass[1][0][14] = 0
4918 00:56:05.750052 tx_win_center[1][0][15] = 0
4919 00:56:05.753382 tx_first_pass[1][0][15] = 0
4920 00:56:05.756862 tx_last_pass[1][0][15] = 0
4921 00:56:05.756939 tx_win_center[1][1][0] = 0
4922 00:56:05.760299 tx_first_pass[1][1][0] = 0
4923 00:56:05.763473 tx_last_pass[1][1][0] = 0
4924 00:56:05.763543 tx_win_center[1][1][1] = 0
4925 00:56:05.766564 tx_first_pass[1][1][1] = 0
4926 00:56:05.769964 tx_last_pass[1][1][1] = 0
4927 00:56:05.773482 tx_win_center[1][1][2] = 0
4928 00:56:05.773618 tx_first_pass[1][1][2] = 0
4929 00:56:05.777076 tx_last_pass[1][1][2] = 0
4930 00:56:05.780036 tx_win_center[1][1][3] = 0
4931 00:56:05.783458 tx_first_pass[1][1][3] = 0
4932 00:56:05.783535 tx_last_pass[1][1][3] = 0
4933 00:56:05.786520 tx_win_center[1][1][4] = 0
4934 00:56:05.789780 tx_first_pass[1][1][4] = 0
4935 00:56:05.792983 tx_last_pass[1][1][4] = 0
4936 00:56:05.793061 tx_win_center[1][1][5] = 0
4937 00:56:05.796648 tx_first_pass[1][1][5] = 0
4938 00:56:05.799407 tx_last_pass[1][1][5] = 0
4939 00:56:05.802618 tx_win_center[1][1][6] = 0
4940 00:56:05.802696 tx_first_pass[1][1][6] = 0
4941 00:56:05.806068 tx_last_pass[1][1][6] = 0
4942 00:56:05.809655 tx_win_center[1][1][7] = 0
4943 00:56:05.809733 tx_first_pass[1][1][7] = 0
4944 00:56:05.812833 tx_last_pass[1][1][7] = 0
4945 00:56:05.815601 tx_win_center[1][1][8] = 0
4946 00:56:05.819202 tx_first_pass[1][1][8] = 0
4947 00:56:05.819280 tx_last_pass[1][1][8] = 0
4948 00:56:05.822613 tx_win_center[1][1][9] = 0
4949 00:56:05.826012 tx_first_pass[1][1][9] = 0
4950 00:56:05.829047 tx_last_pass[1][1][9] = 0
4951 00:56:05.829149 tx_win_center[1][1][10] = 0
4952 00:56:05.832199 tx_first_pass[1][1][10] = 0
4953 00:56:05.835730 tx_last_pass[1][1][10] = 0
4954 00:56:05.839048 tx_win_center[1][1][11] = 0
4955 00:56:05.839127 tx_first_pass[1][1][11] = 0
4956 00:56:05.841939 tx_last_pass[1][1][11] = 0
4957 00:56:05.845222 tx_win_center[1][1][12] = 0
4958 00:56:05.848695 tx_first_pass[1][1][12] = 0
4959 00:56:05.848773 tx_last_pass[1][1][12] = 0
4960 00:56:05.851957 tx_win_center[1][1][13] = 0
4961 00:56:05.855448 tx_first_pass[1][1][13] = 0
4962 00:56:05.858674 tx_last_pass[1][1][13] = 0
4963 00:56:05.862200 tx_win_center[1][1][14] = 0
4964 00:56:05.862282 tx_first_pass[1][1][14] = 0
4965 00:56:05.865002 tx_last_pass[1][1][14] = 0
4966 00:56:05.868160 tx_win_center[1][1][15] = 0
4967 00:56:05.871845 tx_first_pass[1][1][15] = 0
4968 00:56:05.871923 tx_last_pass[1][1][15] = 0
4969 00:56:05.875139 dump params rx window
4970 00:56:05.877984 rx_firspass[0][0][0] = 0
4971 00:56:05.878061 rx_lastpass[0][0][0] = 0
4972 00:56:05.881419 rx_firspass[0][0][1] = 0
4973 00:56:05.884893 rx_lastpass[0][0][1] = 0
4974 00:56:05.885025 rx_firspass[0][0][2] = 0
4975 00:56:05.887805 rx_lastpass[0][0][2] = 0
4976 00:56:05.891660 rx_firspass[0][0][3] = 0
4977 00:56:05.894530 rx_lastpass[0][0][3] = 0
4978 00:56:05.894608 rx_firspass[0][0][4] = 0
4979 00:56:05.898009 rx_lastpass[0][0][4] = 0
4980 00:56:05.900826 rx_firspass[0][0][5] = 0
4981 00:56:05.900903 rx_lastpass[0][0][5] = 0
4982 00:56:05.904069 rx_firspass[0][0][6] = 0
4983 00:56:05.907616 rx_lastpass[0][0][6] = 0
4984 00:56:05.907694 rx_firspass[0][0][7] = 0
4985 00:56:05.910785 rx_lastpass[0][0][7] = 0
4986 00:56:05.913918 rx_firspass[0][0][8] = 0
4987 00:56:05.913996 rx_lastpass[0][0][8] = 0
4988 00:56:05.917207 rx_firspass[0][0][9] = 0
4989 00:56:05.920727 rx_lastpass[0][0][9] = 0
4990 00:56:05.924284 rx_firspass[0][0][10] = 0
4991 00:56:05.924385 rx_lastpass[0][0][10] = 0
4992 00:56:05.927036 rx_firspass[0][0][11] = 0
4993 00:56:05.930487 rx_lastpass[0][0][11] = 0
4994 00:56:05.930564 rx_firspass[0][0][12] = 0
4995 00:56:05.933958 rx_lastpass[0][0][12] = 0
4996 00:56:05.937492 rx_firspass[0][0][13] = 0
4997 00:56:05.940867 rx_lastpass[0][0][13] = 0
4998 00:56:05.940945 rx_firspass[0][0][14] = 0
4999 00:56:05.943777 rx_lastpass[0][0][14] = 0
5000 00:56:05.947139 rx_firspass[0][0][15] = 0
5001 00:56:05.950546 rx_lastpass[0][0][15] = 0
5002 00:56:05.950624 rx_firspass[0][1][0] = 0
5003 00:56:05.953398 rx_lastpass[0][1][0] = 0
5004 00:56:05.956734 rx_firspass[0][1][1] = 0
5005 00:56:05.956812 rx_lastpass[0][1][1] = 0
5006 00:56:05.960040 rx_firspass[0][1][2] = 0
5007 00:56:05.963622 rx_lastpass[0][1][2] = 0
5008 00:56:05.963699 rx_firspass[0][1][3] = 0
5009 00:56:05.966264 rx_lastpass[0][1][3] = 0
5010 00:56:05.969707 rx_firspass[0][1][4] = 0
5011 00:56:05.973250 rx_lastpass[0][1][4] = 0
5012 00:56:05.973377 rx_firspass[0][1][5] = 0
5013 00:56:05.976584 rx_lastpass[0][1][5] = 0
5014 00:56:05.979976 rx_firspass[0][1][6] = 0
5015 00:56:05.980052 rx_lastpass[0][1][6] = 0
5016 00:56:05.982855 rx_firspass[0][1][7] = 0
5017 00:56:05.986421 rx_lastpass[0][1][7] = 0
5018 00:56:05.986496 rx_firspass[0][1][8] = 0
5019 00:56:05.989785 rx_lastpass[0][1][8] = 0
5020 00:56:05.992550 rx_firspass[0][1][9] = 0
5021 00:56:05.996067 rx_lastpass[0][1][9] = 0
5022 00:56:05.996142 rx_firspass[0][1][10] = 0
5023 00:56:05.998995 rx_lastpass[0][1][10] = 0
5024 00:56:06.002283 rx_firspass[0][1][11] = 0
5025 00:56:06.002361 rx_lastpass[0][1][11] = 0
5026 00:56:06.005883 rx_firspass[0][1][12] = 0
5027 00:56:06.009421 rx_lastpass[0][1][12] = 0
5028 00:56:06.012257 rx_firspass[0][1][13] = 0
5029 00:56:06.012334 rx_lastpass[0][1][13] = 0
5030 00:56:06.016009 rx_firspass[0][1][14] = 0
5031 00:56:06.018953 rx_lastpass[0][1][14] = 0
5032 00:56:06.019029 rx_firspass[0][1][15] = 0
5033 00:56:06.022258 rx_lastpass[0][1][15] = 0
5034 00:56:06.025859 rx_firspass[1][0][0] = 0
5035 00:56:06.029124 rx_lastpass[1][0][0] = 0
5036 00:56:06.029199 rx_firspass[1][0][1] = 0
5037 00:56:06.032258 rx_lastpass[1][0][1] = 0
5038 00:56:06.035305 rx_firspass[1][0][2] = 0
5039 00:56:06.035380 rx_lastpass[1][0][2] = 0
5040 00:56:06.038484 rx_firspass[1][0][3] = 0
5041 00:56:06.041882 rx_lastpass[1][0][3] = 0
5042 00:56:06.041958 rx_firspass[1][0][4] = 0
5043 00:56:06.045183 rx_lastpass[1][0][4] = 0
5044 00:56:06.048479 rx_firspass[1][0][5] = 0
5045 00:56:06.051739 rx_lastpass[1][0][5] = 0
5046 00:56:06.051815 rx_firspass[1][0][6] = 0
5047 00:56:06.055050 rx_lastpass[1][0][6] = 0
5048 00:56:06.058422 rx_firspass[1][0][7] = 0
5049 00:56:06.058498 rx_lastpass[1][0][7] = 0
5050 00:56:06.062113 rx_firspass[1][0][8] = 0
5051 00:56:06.064854 rx_lastpass[1][0][8] = 0
5052 00:56:06.064929 rx_firspass[1][0][9] = 0
5053 00:56:06.067968 rx_lastpass[1][0][9] = 0
5054 00:56:06.071433 rx_firspass[1][0][10] = 0
5055 00:56:06.074864 rx_lastpass[1][0][10] = 0
5056 00:56:06.074940 rx_firspass[1][0][11] = 0
5057 00:56:06.077789 rx_lastpass[1][0][11] = 0
5058 00:56:06.081238 rx_firspass[1][0][12] = 0
5059 00:56:06.081314 rx_lastpass[1][0][12] = 0
5060 00:56:06.084714 rx_firspass[1][0][13] = 0
5061 00:56:06.087550 rx_lastpass[1][0][13] = 0
5062 00:56:06.091045 rx_firspass[1][0][14] = 0
5063 00:56:06.091121 rx_lastpass[1][0][14] = 0
5064 00:56:06.094466 rx_firspass[1][0][15] = 0
5065 00:56:06.097854 rx_lastpass[1][0][15] = 0
5066 00:56:06.097930 rx_firspass[1][1][0] = 0
5067 00:56:06.101033 rx_lastpass[1][1][0] = 0
5068 00:56:06.104435 rx_firspass[1][1][1] = 0
5069 00:56:06.107244 rx_lastpass[1][1][1] = 0
5070 00:56:06.107320 rx_firspass[1][1][2] = 0
5071 00:56:06.110750 rx_lastpass[1][1][2] = 0
5072 00:56:06.114133 rx_firspass[1][1][3] = 0
5073 00:56:06.114209 rx_lastpass[1][1][3] = 0
5074 00:56:06.117606 rx_firspass[1][1][4] = 0
5075 00:56:06.120362 rx_lastpass[1][1][4] = 0
5076 00:56:06.120438 rx_firspass[1][1][5] = 0
5077 00:56:06.123757 rx_lastpass[1][1][5] = 0
5078 00:56:06.127442 rx_firspass[1][1][6] = 0
5079 00:56:06.130806 rx_lastpass[1][1][6] = 0
5080 00:56:06.130883 rx_firspass[1][1][7] = 0
5081 00:56:06.133991 rx_lastpass[1][1][7] = 0
5082 00:56:06.137324 rx_firspass[1][1][8] = 0
5083 00:56:06.137400 rx_lastpass[1][1][8] = 0
5084 00:56:06.140537 rx_firspass[1][1][9] = 0
5085 00:56:06.143732 rx_lastpass[1][1][9] = 0
5086 00:56:06.143808 rx_firspass[1][1][10] = 0
5087 00:56:06.147243 rx_lastpass[1][1][10] = 0
5088 00:56:06.150020 rx_firspass[1][1][11] = 0
5089 00:56:06.153245 rx_lastpass[1][1][11] = 0
5090 00:56:06.153321 rx_firspass[1][1][12] = 0
5091 00:56:06.156981 rx_lastpass[1][1][12] = 0
5092 00:56:06.159829 rx_firspass[1][1][13] = 0
5093 00:56:06.159906 rx_lastpass[1][1][13] = 0
5094 00:56:06.163120 rx_firspass[1][1][14] = 0
5095 00:56:06.166630 rx_lastpass[1][1][14] = 0
5096 00:56:06.170051 rx_firspass[1][1][15] = 0
5097 00:56:06.170127 rx_lastpass[1][1][15] = 0
5098 00:56:06.172790 dump params clk_delay
5099 00:56:06.172866 clk_delay[0] = 0
5100 00:56:06.176609 clk_delay[1] = 0
5101 00:56:06.179694 dump params dqs_delay
5102 00:56:06.179770 dqs_delay[0][0] = 0
5103 00:56:06.183173 dqs_delay[0][1] = 0
5104 00:56:06.183249 dqs_delay[1][0] = 0
5105 00:56:06.185967 dqs_delay[1][1] = 0
5106 00:56:06.189691 dump params delay_cell_unit = 744
5107 00:56:06.189796 mt_set_emi_preloader end
5108 00:56:06.196111 [mt_mem_init] dram size: 0x100000000, rank number: 2
5109 00:56:06.199362 [complex_mem_test] start addr:0x40000000, len:20480
5110 00:56:06.236094 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5111 00:56:06.243131 [complex_mem_test] start addr:0x80000000, len:20480
5112 00:56:06.278863 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5113 00:56:06.285792 [complex_mem_test] start addr:0xc0000000, len:20480
5114 00:56:06.320996 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5115 00:56:06.327909 [complex_mem_test] start addr:0x56000000, len:8192
5116 00:56:06.344569 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5117 00:56:06.347884 ddr_geometry:1
5118 00:56:06.350635 [complex_mem_test] start addr:0x80000000, len:8192
5119 00:56:06.368155 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5120 00:56:06.371617 dram_init: dram init end (result: 0)
5121 00:56:06.377764 Successfully loaded DRAM blobs and ran DRAM calibration
5122 00:56:06.387611 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5123 00:56:06.387691 CBMEM:
5124 00:56:06.391130 IMD: root @ 00000000fffff000 254 entries.
5125 00:56:06.394642 IMD: root @ 00000000ffffec00 62 entries.
5126 00:56:06.401083 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5127 00:56:06.407548 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5128 00:56:06.410675 in-header: 03 a1 00 00 08 00 00 00
5129 00:56:06.414414 in-data: 84 60 60 10 00 00 00 00
5130 00:56:06.417687 Chrome EC: clear events_b mask to 0x0000000020004000
5131 00:56:06.423558 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5132 00:56:06.427968 in-header: 03 fd 00 00 00 00 00 00
5133 00:56:06.431098 in-data:
5134 00:56:06.434933 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5135 00:56:06.438113 CBFS @ 21000 size 3d4000
5136 00:56:06.441130 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5137 00:56:06.444537 CBFS: Locating 'fallback/ramstage'
5138 00:56:06.447935 CBFS: Found @ offset 10d40 size d563
5139 00:56:06.470274 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5140 00:56:06.482399 Accumulated console time in romstage 13481 ms
5141 00:56:06.482483
5142 00:56:06.482546
5143 00:56:06.492191 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5144 00:56:06.495108 ARM64: Exception handlers installed.
5145 00:56:06.495187 ARM64: Testing exception
5146 00:56:06.498447 ARM64: Done test exception
5147 00:56:06.501832 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5148 00:56:06.505003 Manufacturer: ef
5149 00:56:06.511458 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5150 00:56:06.514909 WARNING: RO_VPD is uninitialized or empty.
5151 00:56:06.518675 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5152 00:56:06.521141 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5153 00:56:06.531716 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5154 00:56:06.535665 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5155 00:56:06.541575 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5156 00:56:06.541667 Enumerating buses...
5157 00:56:06.548444 Show all devs... Before device enumeration.
5158 00:56:06.548522 Root Device: enabled 1
5159 00:56:06.551746 CPU_CLUSTER: 0: enabled 1
5160 00:56:06.555303 CPU: 00: enabled 1
5161 00:56:06.555380 Compare with tree...
5162 00:56:06.558366 Root Device: enabled 1
5163 00:56:06.558443 CPU_CLUSTER: 0: enabled 1
5164 00:56:06.561437 CPU: 00: enabled 1
5165 00:56:06.564475 Root Device scanning...
5166 00:56:06.568005 root_dev_scan_bus for Root Device
5167 00:56:06.568082 CPU_CLUSTER: 0 enabled
5168 00:56:06.571127 root_dev_scan_bus for Root Device done
5169 00:56:06.577482 scan_bus: scanning of bus Root Device took 10689 usecs
5170 00:56:06.577604 done
5171 00:56:06.581085 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5172 00:56:06.584598 Allocating resources...
5173 00:56:06.587433 Reading resources...
5174 00:56:06.590616 Root Device read_resources bus 0 link: 0
5175 00:56:06.594713 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5176 00:56:06.597117 CPU: 00 missing read_resources
5177 00:56:06.600605 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5178 00:56:06.604135 Root Device read_resources bus 0 link: 0 done
5179 00:56:06.607487 Done reading resources.
5180 00:56:06.610295 Show resources in subtree (Root Device)...After reading.
5181 00:56:06.616814 Root Device child on link 0 CPU_CLUSTER: 0
5182 00:56:06.620663 CPU_CLUSTER: 0 child on link 0 CPU: 00
5183 00:56:06.626996 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5184 00:56:06.630284 CPU: 00
5185 00:56:06.630362 Setting resources...
5186 00:56:06.636755 Root Device assign_resources, bus 0 link: 0
5187 00:56:06.639915 CPU_CLUSTER: 0 missing set_resources
5188 00:56:06.643333 Root Device assign_resources, bus 0 link: 0
5189 00:56:06.643412 Done setting resources.
5190 00:56:06.649762 Show resources in subtree (Root Device)...After assigning values.
5191 00:56:06.653118 Root Device child on link 0 CPU_CLUSTER: 0
5192 00:56:06.656716 CPU_CLUSTER: 0 child on link 0 CPU: 00
5193 00:56:06.666219 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5194 00:56:06.666298 CPU: 00
5195 00:56:06.669712 Done allocating resources.
5196 00:56:06.675770 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5197 00:56:06.675856 Enabling resources...
5198 00:56:06.675918 done.
5199 00:56:06.682717 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5200 00:56:06.682800 Initializing devices...
5201 00:56:06.686054 Root Device init ...
5202 00:56:06.688701 mainboard_init: Starting display init.
5203 00:56:06.692412 ADC[4]: Raw value=75908 ID=0
5204 00:56:06.714878 anx7625_power_on_init: Init interface.
5205 00:56:06.718175 anx7625_disable_pd_protocol: Disabled PD feature.
5206 00:56:06.724409 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5207 00:56:06.771070 anx7625_start_dp_work: Secure OCM version=00
5208 00:56:06.774382 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5209 00:56:06.792063 sp_tx_get_edid_block: EDID Block = 1
5210 00:56:06.908723 Extracted contents:
5211 00:56:06.912257 header: 00 ff ff ff ff ff ff 00
5212 00:56:06.915581 serial number: 06 af 5c 14 00 00 00 00 00 1a
5213 00:56:06.919081 version: 01 04
5214 00:56:06.921891 basic params: 95 1a 0e 78 02
5215 00:56:06.925286 chroma info: 99 85 95 55 56 92 28 22 50 54
5216 00:56:06.928759 established: 00 00 00
5217 00:56:06.935060 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5218 00:56:06.938550 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5219 00:56:06.945420 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5220 00:56:06.951713 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5221 00:56:06.958351 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5222 00:56:06.961811 extensions: 00
5223 00:56:06.961889 checksum: ae
5224 00:56:06.961970
5225 00:56:06.968235 Manufacturer: AUO Model 145c Serial Number 0
5226 00:56:06.968312 Made week 0 of 2016
5227 00:56:06.971634 EDID version: 1.4
5228 00:56:06.971710 Digital display
5229 00:56:06.974627 6 bits per primary color channel
5230 00:56:06.977893 DisplayPort interface
5231 00:56:06.977970 Maximum image size: 26 cm x 14 cm
5232 00:56:06.981240 Gamma: 220%
5233 00:56:06.981315 Check DPMS levels
5234 00:56:06.984734 Supported color formats: RGB 4:4:4
5235 00:56:06.987955 First detailed timing is preferred timing
5236 00:56:06.991234 Established timings supported:
5237 00:56:06.994624 Standard timings supported:
5238 00:56:06.994698 Detailed timings
5239 00:56:07.000863 Hex of detail: ce1d56ea50001a3030204600009010000018
5240 00:56:07.004471 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5241 00:56:07.010555 0556 0586 05a6 0640 hborder 0
5242 00:56:07.013918 0300 0304 030a 031a vborder 0
5243 00:56:07.017600 -hsync -vsync
5244 00:56:07.017685 Did detailed timing
5245 00:56:07.020912 Hex of detail: 0000000f0000000000000000000000000020
5246 00:56:07.024332 Manufacturer-specified data, tag 15
5247 00:56:07.030807 Hex of detail: 000000fe0041554f0a202020202020202020
5248 00:56:07.030876 ASCII string: AUO
5249 00:56:07.037373 Hex of detail: 000000fe004231313658414230312e34200a
5250 00:56:07.037453 ASCII string: B116XAB01.4
5251 00:56:07.040240 Checksum
5252 00:56:07.040310 Checksum: 0xae (valid)
5253 00:56:07.047216 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5254 00:56:07.050229 DSI data_rate: 457800000 bps
5255 00:56:07.057267 anx7625_parse_edid: set default k value to 0x3d for panel
5256 00:56:07.059740 anx7625_parse_edid: pixelclock(76300).
5257 00:56:07.063020 hactive(1366), hsync(32), hfp(48), hbp(154)
5258 00:56:07.066460 vactive(768), vsync(6), vfp(4), vbp(16)
5259 00:56:07.069691 anx7625_dsi_config: config dsi.
5260 00:56:07.077206 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5261 00:56:07.098666 anx7625_dsi_config: success to config DSI
5262 00:56:07.101886 anx7625_dp_start: MIPI phy setup OK.
5263 00:56:07.104491 [SSUSB] Setting up USB HOST controller...
5264 00:56:07.108044 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5265 00:56:07.111639 [SSUSB] phy power-on done.
5266 00:56:07.114986 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5267 00:56:07.118772 in-header: 03 fc 01 00 00 00 00 00
5268 00:56:07.118849 in-data:
5269 00:56:07.125084 handle_proto3_response: EC response with error code: 1
5270 00:56:07.125185 SPM: pcm index = 1
5271 00:56:07.128538 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5272 00:56:07.131576 CBFS @ 21000 size 3d4000
5273 00:56:07.138238 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5274 00:56:07.141630 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5275 00:56:07.145072 CBFS: Found @ offset 1e7c0 size 1026
5276 00:56:07.151344 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5277 00:56:07.154702 SPM: binary array size = 2988
5278 00:56:07.158120 SPM: version = pcm_allinone_v1.17.2_20180829
5279 00:56:07.161447 SPM binary loaded in 32 msecs
5280 00:56:07.169513 spm_kick_im_to_fetch: ptr = 000000004021eec2
5281 00:56:07.172942 spm_kick_im_to_fetch: len = 2988
5282 00:56:07.173014 SPM: spm_kick_pcm_to_run
5283 00:56:07.175660 SPM: spm_kick_pcm_to_run done
5284 00:56:07.179611 SPM: spm_init done in 52 msecs
5285 00:56:07.182326 Root Device init finished in 494987 usecs
5286 00:56:07.185888 CPU_CLUSTER: 0 init ...
5287 00:56:07.195403 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5288 00:56:07.198946 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5289 00:56:07.201813 CBFS @ 21000 size 3d4000
5290 00:56:07.205249 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5291 00:56:07.208634 CBFS: Locating 'sspm.bin'
5292 00:56:07.211746 CBFS: Found @ offset 208c0 size 41cb
5293 00:56:07.222585 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5294 00:56:07.230143 CPU_CLUSTER: 0 init finished in 42803 usecs
5295 00:56:07.230212 Devices initialized
5296 00:56:07.233372 Show all devs... After init.
5297 00:56:07.237279 Root Device: enabled 1
5298 00:56:07.237375 CPU_CLUSTER: 0: enabled 1
5299 00:56:07.240348 CPU: 00: enabled 1
5300 00:56:07.243763 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5301 00:56:07.250508 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5302 00:56:07.253255 ELOG: NV offset 0x558000 size 0x1000
5303 00:56:07.256626 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5304 00:56:07.263152 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5305 00:56:07.269441 ELOG: Event(17) added with size 13 at 2024-06-16 00:56:07 UTC
5306 00:56:07.273397 out: cmd=0x121: 03 db 21 01 00 00 00 00
5307 00:56:07.276507 in-header: 03 c7 00 00 2c 00 00 00
5308 00:56:07.289462 in-data: b8 4a 00 00 00 00 00 00 02 10 00 00 06 80 00 00 ad c3 00 00 06 80 00 00 81 ea 01 00 06 80 00 00 98 17 06 00 06 80 00 00 93 af 0b 00
5309 00:56:07.292820 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5310 00:56:07.295621 in-header: 03 19 00 00 08 00 00 00
5311 00:56:07.299495 in-data: a2 e0 47 00 13 00 00 00
5312 00:56:07.302873 Chrome EC: UHEPI supported
5313 00:56:07.309310 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5314 00:56:07.312738 in-header: 03 e1 00 00 08 00 00 00
5315 00:56:07.312804 in-data: 84 20 60 10 00 00 00 00
5316 00:56:07.318875 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5317 00:56:07.325880 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5318 00:56:07.329229 in-header: 03 e1 00 00 08 00 00 00
5319 00:56:07.332757 in-data: 84 20 60 10 00 00 00 00
5320 00:56:07.335178 ELOG: Event(A1) added with size 10 at 2024-06-16 00:56:07 UTC
5321 00:56:07.345203 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5322 00:56:07.348512 ELOG: Event(A0) added with size 9 at 2024-06-16 00:56:07 UTC
5323 00:56:07.351715 elog_add_boot_reason: Logged dev mode boot
5324 00:56:07.355251 Finalize devices...
5325 00:56:07.355317 Devices finalized
5326 00:56:07.362093 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5327 00:56:07.365559 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5328 00:56:07.371460 ELOG: Event(91) added with size 10 at 2024-06-16 00:56:07 UTC
5329 00:56:07.375290 Writing coreboot table at 0xffeda000
5330 00:56:07.378707 0. 0000000000114000-000000000011efff: RAMSTAGE
5331 00:56:07.384866 1. 0000000040000000-000000004023cfff: RAMSTAGE
5332 00:56:07.388386 2. 000000004023d000-00000000545fffff: RAM
5333 00:56:07.391218 3. 0000000054600000-000000005465ffff: BL31
5334 00:56:07.394593 4. 0000000054660000-00000000ffed9fff: RAM
5335 00:56:07.401286 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5336 00:56:07.404713 6. 0000000100000000-000000013fffffff: RAM
5337 00:56:07.407837 Passing 5 GPIOs to payload:
5338 00:56:07.411097 NAME | PORT | POLARITY | VALUE
5339 00:56:07.414750 write protect | 0x00000096 | low | high
5340 00:56:07.420893 EC in RW | 0x000000b1 | high | undefined
5341 00:56:07.424155 EC interrupt | 0x00000097 | low | undefined
5342 00:56:07.430722 TPM interrupt | 0x00000099 | high | undefined
5343 00:56:07.433945 speaker enable | 0x000000af | high | undefined
5344 00:56:07.437411 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5345 00:56:07.440845 in-header: 03 f7 00 00 02 00 00 00
5346 00:56:07.444337 in-data: 04 00
5347 00:56:07.444413 Board ID: 4
5348 00:56:07.446964 ADC[3]: Raw value=213471 ID=1
5349 00:56:07.447045 RAM code: 1
5350 00:56:07.447106 SKU ID: 16
5351 00:56:07.453509 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5352 00:56:07.453633 CBFS @ 21000 size 3d4000
5353 00:56:07.460276 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5354 00:56:07.466594 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum f809
5355 00:56:07.470083 coreboot table: 940 bytes.
5356 00:56:07.473385 IMD ROOT 0. 00000000fffff000 00001000
5357 00:56:07.476820 IMD SMALL 1. 00000000ffffe000 00001000
5358 00:56:07.480266 CONSOLE 2. 00000000fffde000 00020000
5359 00:56:07.483131 FMAP 3. 00000000fffdd000 0000047c
5360 00:56:07.486383 TIME STAMP 4. 00000000fffdc000 00000910
5361 00:56:07.489852 RAMOOPS 5. 00000000ffedc000 00100000
5362 00:56:07.493101 COREBOOT 6. 00000000ffeda000 00002000
5363 00:56:07.496425 IMD small region:
5364 00:56:07.499844 IMD ROOT 0. 00000000ffffec00 00000400
5365 00:56:07.503273 VBOOT WORK 1. 00000000ffffeb00 00000100
5366 00:56:07.506656 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5367 00:56:07.512703 VPD 3. 00000000ffffea60 0000006c
5368 00:56:07.515871 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5369 00:56:07.522689 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5370 00:56:07.525526 in-header: 03 e1 00 00 08 00 00 00
5371 00:56:07.529373 in-data: 84 20 60 10 00 00 00 00
5372 00:56:07.532800 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5373 00:56:07.536026 CBFS @ 21000 size 3d4000
5374 00:56:07.542630 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5375 00:56:07.545182 CBFS: Locating 'fallback/payload'
5376 00:56:07.552004 CBFS: Found @ offset dc040 size 439a0
5377 00:56:07.640131 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5378 00:56:07.643224 Checking segment from ROM address 0x0000000040003a00
5379 00:56:07.649976 Checking segment from ROM address 0x0000000040003a1c
5380 00:56:07.653389 Loading segment from ROM address 0x0000000040003a00
5381 00:56:07.656403 code (compression=0)
5382 00:56:07.666105 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5383 00:56:07.672819 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5384 00:56:07.676438 it's not compressed!
5385 00:56:07.679849 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5386 00:56:07.685871 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5387 00:56:07.694264 Loading segment from ROM address 0x0000000040003a1c
5388 00:56:07.698016 Entry Point 0x0000000080000000
5389 00:56:07.698094 Loaded segments
5390 00:56:07.704236 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5391 00:56:07.707364 Jumping to boot code at 0000000080000000(00000000ffeda000)
5392 00:56:07.717305 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5393 00:56:07.724372 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5394 00:56:07.724450 CBFS @ 21000 size 3d4000
5395 00:56:07.730403 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5396 00:56:07.733902 CBFS: Locating 'fallback/bl31'
5397 00:56:07.736831 CBFS: Found @ offset 36dc0 size 5820
5398 00:56:07.748658 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5399 00:56:07.751318 Checking segment from ROM address 0x0000000040003a00
5400 00:56:07.758040 Checking segment from ROM address 0x0000000040003a1c
5401 00:56:07.761544 Loading segment from ROM address 0x0000000040003a00
5402 00:56:07.764469 code (compression=1)
5403 00:56:07.774769 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5404 00:56:07.780588 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5405 00:56:07.780670 using LZMA
5406 00:56:07.790434 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5407 00:56:07.796902 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5408 00:56:07.800161 Loading segment from ROM address 0x0000000040003a1c
5409 00:56:07.803829 Entry Point 0x0000000054601000
5410 00:56:07.803914 Loaded segments
5411 00:56:07.807037 NOTICE: MT8183 bl31_setup
5412 00:56:07.813898 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5413 00:56:07.817023 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5414 00:56:07.820439 INFO: [DEVAPC] dump DEVAPC registers:
5415 00:56:07.829993 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5416 00:56:07.836757 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5417 00:56:07.846580 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5418 00:56:07.853418 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5419 00:56:07.863139 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5420 00:56:07.869929 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5421 00:56:07.879230 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5422 00:56:07.885960 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5423 00:56:07.895768 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5424 00:56:07.902205 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5425 00:56:07.912402 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5426 00:56:07.918666 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5427 00:56:07.928601 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5428 00:56:07.935350 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5429 00:56:07.942004 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5430 00:56:07.948385 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5431 00:56:07.958226 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5432 00:56:07.964867 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5433 00:56:07.971446 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5434 00:56:07.978389 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5435 00:56:07.987840 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5436 00:56:07.994758 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5437 00:56:07.997553 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5438 00:56:08.001065 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5439 00:56:08.004200 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5440 00:56:08.007488 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5441 00:56:08.010809 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5442 00:56:08.017490 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5443 00:56:08.020618 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5444 00:56:08.023929 WARNING: region 0:
5445 00:56:08.027283 WARNING: apc:0x168, sa:0x0, ea:0xfff
5446 00:56:08.027378 WARNING: region 1:
5447 00:56:08.030443 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5448 00:56:08.034075 WARNING: region 2:
5449 00:56:08.037369 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5450 00:56:08.040294 WARNING: region 3:
5451 00:56:08.043543 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5452 00:56:08.043612 WARNING: region 4:
5453 00:56:08.046918 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5454 00:56:08.050161 WARNING: region 5:
5455 00:56:08.053705 WARNING: apc:0x0, sa:0x0, ea:0x0
5456 00:56:08.053775 WARNING: region 6:
5457 00:56:08.056984 WARNING: apc:0x0, sa:0x0, ea:0x0
5458 00:56:08.059882 WARNING: region 7:
5459 00:56:08.063409 WARNING: apc:0x0, sa:0x0, ea:0x0
5460 00:56:08.070147 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5461 00:56:08.073159 INFO: SPM: enable SPMC mode
5462 00:56:08.076641 NOTICE: spm_boot_init() start
5463 00:56:08.076714 NOTICE: spm_boot_init() end
5464 00:56:08.083209 INFO: BL31: Initializing runtime services
5465 00:56:08.086450 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5466 00:56:08.092615 INFO: BL31: Preparing for EL3 exit to normal world
5467 00:56:08.096329 INFO: Entry point address = 0x80000000
5468 00:56:08.099382 INFO: SPSR = 0x8
5469 00:56:08.120478
5470 00:56:08.120566
5471 00:56:08.120644
5472 00:56:08.121146 end: 2.2.3 depthcharge-start (duration 00:00:24) [common]
5473 00:56:08.121244 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5474 00:56:08.121317 Setting prompt string to ['jacuzzi:']
5475 00:56:08.121394 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5476 00:56:08.123656 Starting depthcharge on Juniper...
5477 00:56:08.123735
5478 00:56:08.126915 vboot_handoff: creating legacy vboot_handoff structure
5479 00:56:08.126994
5480 00:56:08.130512 ec_init(0): CrosEC protocol v3 supported (544, 544)
5481 00:56:08.133466
5482 00:56:08.133545 Wipe memory regions:
5483 00:56:08.133616
5484 00:56:08.137021 [0x00000040000000, 0x00000054600000)
5485 00:56:08.179801
5486 00:56:08.179921 [0x00000054660000, 0x00000080000000)
5487 00:56:08.271570
5488 00:56:08.271677 [0x000000811994a0, 0x000000ffeda000)
5489 00:56:08.531332
5490 00:56:08.531447 [0x00000100000000, 0x00000140000000)
5491 00:56:08.664554
5492 00:56:08.667400 Initializing XHCI USB controller at 0x11200000.
5493 00:56:08.690827
5494 00:56:08.693581 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5495 00:56:08.693673
5496 00:56:08.693735
5497 00:56:08.694001 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5499 00:56:08.794330 jacuzzi: tftpboot 192.168.201.1 14368598/tftp-deploy-xkhdqcna/kernel/image.itb 14368598/tftp-deploy-xkhdqcna/kernel/cmdline
5500 00:56:08.794513 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5501 00:56:08.794596 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5502 00:56:08.798970 tftpboot 192.168.201.1 14368598/tftp-deploy-xkhdqcna/kernel/image.ittp-deploy-xkhdqcna/kernel/cmdline
5503 00:56:08.799049
5504 00:56:08.799109 Waiting for link
5505 00:56:09.204892
5506 00:56:09.205008 R8152: Initializing
5507 00:56:09.205070
5508 00:56:09.207715 Version 9 (ocp_data = 6010)
5509 00:56:09.207792
5510 00:56:09.211072 R8152: Done initializing
5511 00:56:09.211148
5512 00:56:09.211208 Adding net device
5513 00:56:09.596545
5514 00:56:09.596659 done.
5515 00:56:09.596722
5516 00:56:09.596777 MAC: 00:e0:4c:72:3d:a6
5517 00:56:09.596831
5518 00:56:09.599904 Sending DHCP discover... done.
5519 00:56:09.600001
5520 00:56:09.603439 Waiting for reply... done.
5521 00:56:09.603516
5522 00:56:09.606570 Sending DHCP request... done.
5523 00:56:09.606664
5524 00:56:09.606726 Waiting for reply... done.
5525 00:56:09.606782
5526 00:56:09.610065 My ip is 192.168.201.20
5527 00:56:09.610133
5528 00:56:09.613269 The DHCP server ip is 192.168.201.1
5529 00:56:09.613339
5530 00:56:09.616238 TFTP server IP predefined by user: 192.168.201.1
5531 00:56:09.616309
5532 00:56:09.623323 Bootfile predefined by user: 14368598/tftp-deploy-xkhdqcna/kernel/image.itb
5533 00:56:09.623402
5534 00:56:09.626265 Sending tftp read request... done.
5535 00:56:09.626335
5536 00:56:09.629375 Waiting for the transfer...
5537 00:56:09.629474
5538 00:56:09.878770 00000000 ################################################################
5539 00:56:09.878885
5540 00:56:10.121621 00080000 ################################################################
5541 00:56:10.121735
5542 00:56:10.368082 00100000 ################################################################
5543 00:56:10.368206
5544 00:56:10.629281 00180000 ################################################################
5545 00:56:10.629398
5546 00:56:10.878700 00200000 ################################################################
5547 00:56:10.878814
5548 00:56:11.132265 00280000 ################################################################
5549 00:56:11.132382
5550 00:56:11.396804 00300000 ################################################################
5551 00:56:11.396924
5552 00:56:11.647796 00380000 ################################################################
5553 00:56:11.647951
5554 00:56:11.906754 00400000 ################################################################
5555 00:56:11.906896
5556 00:56:12.154214 00480000 ################################################################
5557 00:56:12.154373
5558 00:56:12.420915 00500000 ################################################################
5559 00:56:12.421061
5560 00:56:12.672526 00580000 ################################################################
5561 00:56:12.672667
5562 00:56:12.907632 00600000 ################################################################
5563 00:56:12.907784
5564 00:56:13.148839 00680000 ################################################################
5565 00:56:13.148956
5566 00:56:13.393713 00700000 ################################################################
5567 00:56:13.393875
5568 00:56:13.644010 00780000 ################################################################
5569 00:56:13.644126
5570 00:56:13.899356 00800000 ################################################################
5571 00:56:13.899467
5572 00:56:14.145931 00880000 ################################################################
5573 00:56:14.146062
5574 00:56:14.392729 00900000 ################################################################
5575 00:56:14.392842
5576 00:56:14.642210 00980000 ################################################################
5577 00:56:14.642327
5578 00:56:14.896895 00a00000 ################################################################
5579 00:56:14.897045
5580 00:56:15.148828 00a80000 ################################################################
5581 00:56:15.148979
5582 00:56:15.398815 00b00000 ################################################################
5583 00:56:15.398928
5584 00:56:15.654548 00b80000 ################################################################
5585 00:56:15.654673
5586 00:56:15.912029 00c00000 ################################################################
5587 00:56:15.912166
5588 00:56:16.163707 00c80000 ################################################################
5589 00:56:16.163820
5590 00:56:16.416588 00d00000 ################################################################
5591 00:56:16.416705
5592 00:56:16.665095 00d80000 ################################################################
5593 00:56:16.665228
5594 00:56:16.923039 00e00000 ################################################################
5595 00:56:16.923156
5596 00:56:17.180791 00e80000 ################################################################
5597 00:56:17.180900
5598 00:56:17.440119 00f00000 ################################################################
5599 00:56:17.440258
5600 00:56:17.694498 00f80000 ################################################################
5601 00:56:17.694651
5602 00:56:17.956165 01000000 ################################################################
5603 00:56:17.956278
5604 00:56:18.210614 01080000 ################################################################
5605 00:56:18.210747
5606 00:56:18.473060 01100000 ################################################################
5607 00:56:18.473230
5608 00:56:18.735048 01180000 ################################################################
5609 00:56:18.735187
5610 00:56:18.986480 01200000 ################################################################
5611 00:56:18.986638
5612 00:56:19.239445 01280000 ################################################################
5613 00:56:19.239590
5614 00:56:19.493322 01300000 ################################################################
5615 00:56:19.493464
5616 00:56:19.743131 01380000 ################################################################
5617 00:56:19.743249
5618 00:56:19.991677 01400000 ################################################################
5619 00:56:19.991819
5620 00:56:20.245514 01480000 ################################################################
5621 00:56:20.245658
5622 00:56:20.501912 01500000 ################################################################
5623 00:56:20.502029
5624 00:56:20.758293 01580000 ################################################################
5625 00:56:20.758408
5626 00:56:21.005511 01600000 ################################################################
5627 00:56:21.005637
5628 00:56:21.254992 01680000 ################################################################
5629 00:56:21.255130
5630 00:56:21.505486 01700000 ################################################################
5631 00:56:21.505645
5632 00:56:21.755027 01780000 ################################################################
5633 00:56:21.755170
5634 00:56:22.004769 01800000 ################################################################
5635 00:56:22.004887
5636 00:56:22.253180 01880000 ################################################################
5637 00:56:22.253324
5638 00:56:22.502658 01900000 ################################################################
5639 00:56:22.502777
5640 00:56:22.753053 01980000 ################################################################
5641 00:56:22.753182
5642 00:56:23.003439 01a00000 ################################################################
5643 00:56:23.003565
5644 00:56:23.257798 01a80000 ################################################################
5645 00:56:23.257917
5646 00:56:23.510951 01b00000 ################################################################
5647 00:56:23.511093
5648 00:56:23.762614 01b80000 ################################################################
5649 00:56:23.762745
5650 00:56:24.020833 01c00000 ################################################################
5651 00:56:24.021014
5652 00:56:24.271996 01c80000 ################################################################
5653 00:56:24.272157
5654 00:56:24.517480 01d00000 ################################################################
5655 00:56:24.517663
5656 00:56:24.764593 01d80000 ################################################################
5657 00:56:24.764770
5658 00:56:25.014336 01e00000 ################################################################
5659 00:56:25.014487
5660 00:56:25.261392 01e80000 ################################################################
5661 00:56:25.261562
5662 00:56:25.510387 01f00000 ################################################################
5663 00:56:25.510521
5664 00:56:25.766732 01f80000 ################################################################
5665 00:56:25.766856
5666 00:56:26.013821 02000000 ################################################################
5667 00:56:26.013955
5668 00:56:26.234876 02080000 ########################################################## done.
5669 00:56:26.235028
5670 00:56:26.238251 The bootfile was 34547958 bytes long.
5671 00:56:26.238337
5672 00:56:26.241623 Sending tftp read request... done.
5673 00:56:26.241723
5674 00:56:26.244793 Waiting for the transfer...
5675 00:56:26.244872
5676 00:56:26.244940 00000000 # done.
5677 00:56:26.245010
5678 00:56:26.254914 Command line loaded dynamically from TFTP file: 14368598/tftp-deploy-xkhdqcna/kernel/cmdline
5679 00:56:26.255017
5680 00:56:26.271439 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5681 00:56:26.271554
5682 00:56:26.271642 Loading FIT.
5683 00:56:26.271743
5684 00:56:26.274549 Image ramdisk-1 has 21363173 bytes.
5685 00:56:26.274626
5686 00:56:26.277745 Image fdt-1 has 57695 bytes.
5687 00:56:26.277856
5688 00:56:26.281437 Image kernel-1 has 13125045 bytes.
5689 00:56:26.281536
5690 00:56:26.291067 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5691 00:56:26.291168
5692 00:56:26.301170 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5693 00:56:26.301271
5694 00:56:26.307282 Choosing best match conf-1 for compat google,juniper-sku16.
5695 00:56:26.310768
5696 00:56:26.315980 Connected to device vid:did:rid of 1ae0:0028:00
5697 00:56:26.323575
5698 00:56:26.327016 tpm_get_response: command 0x17b, return code 0x0
5699 00:56:26.327126
5700 00:56:26.330173 tpm_cleanup: add release locality here.
5701 00:56:26.330274
5702 00:56:26.334087 Shutting down all USB controllers.
5703 00:56:26.334189
5704 00:56:26.336754 Removing current net device
5705 00:56:26.336857
5706 00:56:26.340302 Exiting depthcharge with code 4 at timestamp: 35300189
5707 00:56:26.340407
5708 00:56:26.343617 LZMA decompressing kernel-1 to 0x80193568
5709 00:56:26.347252
5710 00:56:26.349893 LZMA decompressing kernel-1 to 0x40000000
5711 00:56:28.213981
5712 00:56:28.214115 jumping to kernel
5713 00:56:28.214576 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
5714 00:56:28.214669 start: 2.2.5 auto-login-action (timeout 00:04:07) [common]
5715 00:56:28.214738 Setting prompt string to ['Linux version [0-9]']
5716 00:56:28.214810 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5717 00:56:28.214874 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5718 00:56:28.289577
5719 00:56:28.292966 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5720 00:56:28.296014 start: 2.2.5.1 login-action (timeout 00:04:07) [common]
5721 00:56:28.296130 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5722 00:56:28.296233 Setting prompt string to []
5723 00:56:28.296338 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5724 00:56:28.296442 Using line separator: #'\n'#
5725 00:56:28.296526 No login prompt set.
5726 00:56:28.296614 Parsing kernel messages
5727 00:56:28.296701 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5728 00:56:28.296881 [login-action] Waiting for messages, (timeout 00:04:07)
5729 00:56:28.296979 Waiting using forced prompt support (timeout 00:02:03)
5730 00:56:28.315672 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j232339-arm64-gcc-10-defconfig-arm64-chromebook-6v4sp) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Sun Jun 16 00:43:03 UTC 2024
5731 00:56:28.319302 [ 0.000000] random: crng init done
5732 00:56:28.325705 [ 0.000000] Machine model: Google juniper sku16 board
5733 00:56:28.329075 [ 0.000000] efi: UEFI not found.
5734 00:56:28.335309 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5735 00:56:28.345568 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5736 00:56:28.352341 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5737 00:56:28.355291 [ 0.000000] printk: bootconsole [mtk8250] enabled
5738 00:56:28.364094 [ 0.000000] NUMA: No NUMA configuration found
5739 00:56:28.371064 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5740 00:56:28.377105 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5741 00:56:28.377185 [ 0.000000] Zone ranges:
5742 00:56:28.383930 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5743 00:56:28.387370 [ 0.000000] DMA32 empty
5744 00:56:28.393850 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5745 00:56:28.396841 [ 0.000000] Movable zone start for each node
5746 00:56:28.400676 [ 0.000000] Early memory node ranges
5747 00:56:28.406900 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5748 00:56:28.413693 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5749 00:56:28.420618 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5750 00:56:28.426951 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5751 00:56:28.433269 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5752 00:56:28.439751 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5753 00:56:28.456378 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5754 00:56:28.463244 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5755 00:56:28.469951 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5756 00:56:28.473033 [ 0.000000] psci: probing for conduit method from DT.
5757 00:56:28.479641 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5758 00:56:28.482700 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5759 00:56:28.489477 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5760 00:56:28.492987 [ 0.000000] psci: SMC Calling Convention v1.1
5761 00:56:28.499481 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5762 00:56:28.502716 [ 0.000000] Detected VIPT I-cache on CPU0
5763 00:56:28.509574 [ 0.000000] CPU features: detected: GIC system register CPU interface
5764 00:56:28.515632 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5765 00:56:28.522498 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5766 00:56:28.528643 [ 0.000000] CPU features: detected: ARM erratum 845719
5767 00:56:28.531868 [ 0.000000] alternatives: applying boot alternatives
5768 00:56:28.538714 [ 0.000000] Fallback order for Node 0: 0
5769 00:56:28.544971 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5770 00:56:28.548194 [ 0.000000] Policy zone: Normal
5771 00:56:28.564775 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5772 00:56:28.578395 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5773 00:56:28.587993 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5774 00:56:28.594650 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5775 00:56:28.601157 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5776 00:56:28.604190 <6>[ 0.000000] software IO TLB: area num 8.
5777 00:56:28.630831 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5778 00:56:28.689386 <6>[ 0.000000] Memory: 3894212K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 264252K reserved, 32768K cma-reserved)
5779 00:56:28.695622 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5780 00:56:28.702374 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5781 00:56:28.705933 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5782 00:56:28.712167 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5783 00:56:28.718648 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5784 00:56:28.725117 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5785 00:56:28.731685 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5786 00:56:28.738219 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5787 00:56:28.744907 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5788 00:56:28.754467 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5789 00:56:28.757923 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5790 00:56:28.764523 <6>[ 0.000000] GICv3: 640 SPIs implemented
5791 00:56:28.767902 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5792 00:56:28.774424 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5793 00:56:28.777672 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5794 00:56:28.784430 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5795 00:56:28.797507 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5796 00:56:28.807727 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5797 00:56:28.817218 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5798 00:56:28.826233 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5799 00:56:28.839650 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5800 00:56:28.846032 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5801 00:56:28.853051 <6>[ 0.009475] Console: colour dummy device 80x25
5802 00:56:28.856297 <6>[ 0.014514] printk: console [tty1] enabled
5803 00:56:28.869315 <6>[ 0.018902] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5804 00:56:28.872748 <6>[ 0.029367] pid_max: default: 32768 minimum: 301
5805 00:56:28.879267 <6>[ 0.034249] LSM: Security Framework initializing
5806 00:56:28.885980 <6>[ 0.039165] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5807 00:56:28.892232 <6>[ 0.046789] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5808 00:56:28.899228 <4>[ 0.055658] cacheinfo: Unable to detect cache hierarchy for CPU 0
5809 00:56:28.909073 <6>[ 0.062287] cblist_init_generic: Setting adjustable number of callback queues.
5810 00:56:28.915967 <6>[ 0.069734] cblist_init_generic: Setting shift to 3 and lim to 1.
5811 00:56:28.922346 <6>[ 0.076085] cblist_init_generic: Setting adjustable number of callback queues.
5812 00:56:28.929187 <6>[ 0.083530] cblist_init_generic: Setting shift to 3 and lim to 1.
5813 00:56:28.932338 <6>[ 0.089929] rcu: Hierarchical SRCU implementation.
5814 00:56:28.938595 <6>[ 0.094955] rcu: Max phase no-delay instances is 1000.
5815 00:56:28.946793 <6>[ 0.102894] EFI services will not be available.
5816 00:56:28.949409 <6>[ 0.107844] smp: Bringing up secondary CPUs ...
5817 00:56:28.959852 <6>[ 0.113066] Detected VIPT I-cache on CPU1
5818 00:56:28.967078 <4>[ 0.113113] cacheinfo: Unable to detect cache hierarchy for CPU 1
5819 00:56:28.973618 <6>[ 0.113122] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5820 00:56:28.980252 <6>[ 0.113154] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5821 00:56:28.983039 <6>[ 0.113635] Detected VIPT I-cache on CPU2
5822 00:56:28.989670 <4>[ 0.113669] cacheinfo: Unable to detect cache hierarchy for CPU 2
5823 00:56:28.996320 <6>[ 0.113674] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5824 00:56:29.003139 <6>[ 0.113686] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5825 00:56:29.009746 <6>[ 0.114132] Detected VIPT I-cache on CPU3
5826 00:56:29.016429 <4>[ 0.114162] cacheinfo: Unable to detect cache hierarchy for CPU 3
5827 00:56:29.022329 <6>[ 0.114167] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5828 00:56:29.029104 <6>[ 0.114178] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5829 00:56:29.032904 <6>[ 0.114752] CPU features: detected: Spectre-v2
5830 00:56:29.039351 <6>[ 0.114762] CPU features: detected: Spectre-BHB
5831 00:56:29.042339 <6>[ 0.114766] CPU features: detected: ARM erratum 858921
5832 00:56:29.049077 <6>[ 0.114772] Detected VIPT I-cache on CPU4
5833 00:56:29.052596 <4>[ 0.114820] cacheinfo: Unable to detect cache hierarchy for CPU 4
5834 00:56:29.062014 <6>[ 0.114828] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5835 00:56:29.068850 <6>[ 0.114836] arch_timer: Enabling local workaround for ARM erratum 858921
5836 00:56:29.072376 <6>[ 0.114846] arch_timer: CPU4: Trapping CNTVCT access
5837 00:56:29.078773 <6>[ 0.114854] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5838 00:56:29.084895 <6>[ 0.115338] Detected VIPT I-cache on CPU5
5839 00:56:29.091735 <4>[ 0.115380] cacheinfo: Unable to detect cache hierarchy for CPU 5
5840 00:56:29.098034 <6>[ 0.115385] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5841 00:56:29.104939 <6>[ 0.115392] arch_timer: Enabling local workaround for ARM erratum 858921
5842 00:56:29.108340 <6>[ 0.115398] arch_timer: CPU5: Trapping CNTVCT access
5843 00:56:29.117801 <6>[ 0.115403] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5844 00:56:29.121288 <6>[ 0.115839] Detected VIPT I-cache on CPU6
5845 00:56:29.127548 <4>[ 0.115884] cacheinfo: Unable to detect cache hierarchy for CPU 6
5846 00:56:29.134577 <6>[ 0.115890] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5847 00:56:29.141192 <6>[ 0.115897] arch_timer: Enabling local workaround for ARM erratum 858921
5848 00:56:29.147594 <6>[ 0.115903] arch_timer: CPU6: Trapping CNTVCT access
5849 00:56:29.154200 <6>[ 0.115909] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5850 00:56:29.157543 <6>[ 0.116439] Detected VIPT I-cache on CPU7
5851 00:56:29.163924 <4>[ 0.116482] cacheinfo: Unable to detect cache hierarchy for CPU 7
5852 00:56:29.170707 <6>[ 0.116488] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5853 00:56:29.176782 <6>[ 0.116495] arch_timer: Enabling local workaround for ARM erratum 858921
5854 00:56:29.183946 <6>[ 0.116501] arch_timer: CPU7: Trapping CNTVCT access
5855 00:56:29.190733 <6>[ 0.116507] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5856 00:56:29.194085 <6>[ 0.116555] smp: Brought up 1 node, 8 CPUs
5857 00:56:29.200399 <6>[ 0.355454] SMP: Total of 8 processors activated.
5858 00:56:29.203892 <6>[ 0.360389] CPU features: detected: 32-bit EL0 Support
5859 00:56:29.210190 <6>[ 0.365767] CPU features: detected: 32-bit EL1 Support
5860 00:56:29.216806 <6>[ 0.371135] CPU features: detected: CRC32 instructions
5861 00:56:29.219537 <6>[ 0.376560] CPU: All CPU(s) started at EL2
5862 00:56:29.226531 <6>[ 0.380897] alternatives: applying system-wide alternatives
5863 00:56:29.229484 <6>[ 0.388907] devtmpfs: initialized
5864 00:56:29.248316 <6>[ 0.397846] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5865 00:56:29.254355 <6>[ 0.407795] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5866 00:56:29.260838 <6>[ 0.415523] pinctrl core: initialized pinctrl subsystem
5867 00:56:29.264086 <6>[ 0.422648] DMI not present or invalid.
5868 00:56:29.271256 <6>[ 0.427018] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5869 00:56:29.280991 <6>[ 0.433922] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5870 00:56:29.287720 <6>[ 0.441450] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5871 00:56:29.297451 <6>[ 0.449698] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5872 00:56:29.300920 <6>[ 0.457876] audit: initializing netlink subsys (disabled)
5873 00:56:29.310620 <5>[ 0.463580] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
5874 00:56:29.317196 <6>[ 0.464560] thermal_sys: Registered thermal governor 'step_wise'
5875 00:56:29.323331 <6>[ 0.471547] thermal_sys: Registered thermal governor 'power_allocator'
5876 00:56:29.326927 <6>[ 0.477843] cpuidle: using governor menu
5877 00:56:29.333125 <6>[ 0.488808] NET: Registered PF_QIPCRTR protocol family
5878 00:56:29.340150 <6>[ 0.494293] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5879 00:56:29.346356 <6>[ 0.501389] ASID allocator initialised with 32768 entries
5880 00:56:29.349795 <6>[ 0.508158] Serial: AMBA PL011 UART driver
5881 00:56:29.362054 <4>[ 0.518583] Trying to register duplicate clock ID: 113
5882 00:56:29.421523 <6>[ 0.574962] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5883 00:56:29.436353 <6>[ 0.589327] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5884 00:56:29.439198 <6>[ 0.599069] KASLR enabled
5885 00:56:29.453933 <6>[ 0.607073] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5886 00:56:29.460237 <6>[ 0.614076] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5887 00:56:29.467182 <6>[ 0.620552] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5888 00:56:29.473560 <6>[ 0.627542] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5889 00:56:29.480444 <6>[ 0.634016] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5890 00:56:29.487022 <6>[ 0.641006] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5891 00:56:29.493156 <6>[ 0.647480] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5892 00:56:29.499611 <6>[ 0.654469] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5893 00:56:29.503036 <6>[ 0.662047] ACPI: Interpreter disabled.
5894 00:56:29.513675 <6>[ 0.670049] iommu: Default domain type: Translated
5895 00:56:29.520357 <6>[ 0.675156] iommu: DMA domain TLB invalidation policy: strict mode
5896 00:56:29.523648 <5>[ 0.681789] SCSI subsystem initialized
5897 00:56:29.530334 <6>[ 0.686203] usbcore: registered new interface driver usbfs
5898 00:56:29.536747 <6>[ 0.691932] usbcore: registered new interface driver hub
5899 00:56:29.539884 <6>[ 0.697473] usbcore: registered new device driver usb
5900 00:56:29.547503 <6>[ 0.703780] pps_core: LinuxPPS API ver. 1 registered
5901 00:56:29.557344 <6>[ 0.708965] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5902 00:56:29.560968 <6>[ 0.718289] PTP clock support registered
5903 00:56:29.563656 <6>[ 0.722540] EDAC MC: Ver: 3.0.0
5904 00:56:29.571964 <6>[ 0.728169] FPGA manager framework
5905 00:56:29.578172 <6>[ 0.731854] Advanced Linux Sound Architecture Driver Initialized.
5906 00:56:29.581508 <6>[ 0.738606] vgaarb: loaded
5907 00:56:29.588018 <6>[ 0.741725] clocksource: Switched to clocksource arch_sys_counter
5908 00:56:29.591034 <5>[ 0.748155] VFS: Disk quotas dquot_6.6.0
5909 00:56:29.597559 <6>[ 0.752331] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5910 00:56:29.600752 <6>[ 0.759504] pnp: PnP ACPI: disabled
5911 00:56:29.609804 <6>[ 0.766379] NET: Registered PF_INET protocol family
5912 00:56:29.616265 <6>[ 0.771601] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5913 00:56:29.628131 <6>[ 0.781502] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5914 00:56:29.638316 <6>[ 0.790255] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5915 00:56:29.645246 <6>[ 0.798206] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5916 00:56:29.651213 <6>[ 0.806440] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5917 00:56:29.661291 <6>[ 0.814535] TCP: Hash tables configured (established 32768 bind 32768)
5918 00:56:29.668209 <6>[ 0.821362] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5919 00:56:29.674535 <6>[ 0.828332] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5920 00:56:29.681542 <6>[ 0.835810] NET: Registered PF_UNIX/PF_LOCAL protocol family
5921 00:56:29.688047 <6>[ 0.841938] RPC: Registered named UNIX socket transport module.
5922 00:56:29.690814 <6>[ 0.848082] RPC: Registered udp transport module.
5923 00:56:29.697341 <6>[ 0.853006] RPC: Registered tcp transport module.
5924 00:56:29.703971 <6>[ 0.857930] RPC: Registered tcp NFSv4.1 backchannel transport module.
5925 00:56:29.707946 <6>[ 0.864583] PCI: CLS 0 bytes, default 64
5926 00:56:29.710381 <6>[ 0.868867] Unpacking initramfs...
5927 00:56:29.736821 <6>[ 0.889934] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5928 00:56:29.746575 <6>[ 0.898562] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5929 00:56:29.749639 <6>[ 0.907418] kvm [1]: IPA Size Limit: 40 bits
5930 00:56:29.757182 <6>[ 0.913759] kvm [1]: vgic-v2@c420000
5931 00:56:29.760933 <6>[ 0.917580] kvm [1]: GIC system register CPU interface enabled
5932 00:56:29.767339 <6>[ 0.923774] kvm [1]: vgic interrupt IRQ18
5933 00:56:29.770574 <6>[ 0.928143] kvm [1]: Hyp mode initialized successfully
5934 00:56:29.778510 <5>[ 0.934507] Initialise system trusted keyrings
5935 00:56:29.784596 <6>[ 0.939305] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5936 00:56:29.792991 <6>[ 0.949269] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5937 00:56:29.799190 <5>[ 0.955691] NFS: Registering the id_resolver key type
5938 00:56:29.802692 <5>[ 0.961005] Key type id_resolver registered
5939 00:56:29.809460 <5>[ 0.965419] Key type id_legacy registered
5940 00:56:29.815781 <6>[ 0.969730] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5941 00:56:29.822639 <6>[ 0.976651] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5942 00:56:29.828751 <6>[ 0.984391] 9p: Installing v9fs 9p2000 file system support
5943 00:56:29.856098 <5>[ 1.012760] Key type asymmetric registered
5944 00:56:29.860165 <5>[ 1.017107] Asymmetric key parser 'x509' registered
5945 00:56:29.869532 <6>[ 1.022263] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5946 00:56:29.873042 <6>[ 1.029875] io scheduler mq-deadline registered
5947 00:56:29.876425 <6>[ 1.034631] io scheduler kyber registered
5948 00:56:29.898903 <6>[ 1.055406] EINJ: ACPI disabled.
5949 00:56:29.905612 <4>[ 1.059200] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5950 00:56:29.944021 <6>[ 1.100148] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5951 00:56:29.952259 <6>[ 1.108625] printk: console [ttyS0] disabled
5952 00:56:29.980261 <6>[ 1.133285] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5953 00:56:29.986597 <6>[ 1.142760] printk: console [ttyS0] enabled
5954 00:56:29.989781 <6>[ 1.142760] printk: console [ttyS0] enabled
5955 00:56:29.996629 <6>[ 1.151678] printk: bootconsole [mtk8250] disabled
5956 00:56:29.999920 <6>[ 1.151678] printk: bootconsole [mtk8250] disabled
5957 00:56:30.009331 <3>[ 1.162219] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5958 00:56:30.016081 <3>[ 1.170602] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5959 00:56:30.047464 <6>[ 1.199014] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5960 00:56:30.052376 <6>[ 1.208674] serial serial0: tty port ttyS1 registered
5961 00:56:30.059270 <6>[ 1.215243] SuperH (H)SCI(F) driver initialized
5962 00:56:30.062444 <6>[ 1.220752] msm_serial: driver initialized
5963 00:56:30.078063 <6>[ 1.231137] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5964 00:56:30.087633 <6>[ 1.239735] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5965 00:56:30.094751 <6>[ 1.248308] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5966 00:56:30.104305 <6>[ 1.256876] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5967 00:56:30.113994 <6>[ 1.265527] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5968 00:56:30.121274 <6>[ 1.274187] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5969 00:56:30.130621 <6>[ 1.282927] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5970 00:56:30.137256 <6>[ 1.291666] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5971 00:56:30.147388 <6>[ 1.300231] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5972 00:56:30.157052 <6>[ 1.309044] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5973 00:56:30.165307 <4>[ 1.321432] cacheinfo: Unable to detect cache hierarchy for CPU 0
5974 00:56:30.174104 <6>[ 1.330804] loop: module loaded
5975 00:56:30.186105 <6>[ 1.342740] vsim1: Bringing 1800000uV into 2700000-2700000uV
5976 00:56:30.203960 <6>[ 1.360681] megasas: 07.719.03.00-rc1
5977 00:56:30.212674 <6>[ 1.369502] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5978 00:56:30.224659 <6>[ 1.381118] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5979 00:56:30.241527 <6>[ 1.397927] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5980 00:56:30.298357 <6>[ 1.448121] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5981 00:56:30.412316 <6>[ 1.568444] Freeing initrd memory: 20860K
5982 00:56:30.431070 <4>[ 1.584192] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5983 00:56:30.437505 <4>[ 1.593421] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
5984 00:56:30.444506 <4>[ 1.600119] Hardware name: Google juniper sku16 board (DT)
5985 00:56:30.447843 <4>[ 1.605858] Call trace:
5986 00:56:30.451170 <4>[ 1.608558] dump_backtrace.part.0+0xe0/0xf0
5987 00:56:30.454505 <4>[ 1.613095] show_stack+0x18/0x30
5988 00:56:30.460571 <4>[ 1.616667] dump_stack_lvl+0x68/0x84
5989 00:56:30.464163 <4>[ 1.620588] dump_stack+0x18/0x34
5990 00:56:30.467434 <4>[ 1.624158] sysfs_warn_dup+0x64/0x80
5991 00:56:30.470489 <4>[ 1.628079] sysfs_do_create_link_sd+0xf0/0x100
5992 00:56:30.477204 <4>[ 1.632866] sysfs_create_link+0x20/0x40
5993 00:56:30.480611 <4>[ 1.637046] bus_add_device+0x68/0x10c
5994 00:56:30.484119 <4>[ 1.641052] device_add+0x340/0x7ac
5995 00:56:30.486846 <4>[ 1.644796] of_device_add+0x44/0x60
5996 00:56:30.493659 <4>[ 1.648630] of_platform_device_create_pdata+0x90/0x120
5997 00:56:30.497087 <4>[ 1.654111] of_platform_bus_create+0x170/0x370
5998 00:56:30.503553 <4>[ 1.658898] of_platform_populate+0x50/0xfc
5999 00:56:30.506840 <4>[ 1.663338] parse_mtd_partitions+0x1dc/0x510
6000 00:56:30.510096 <4>[ 1.667950] mtd_device_parse_register+0xf8/0x2e0
6001 00:56:30.517031 <4>[ 1.672908] spi_nor_probe+0x21c/0x2f0
6002 00:56:30.520319 <4>[ 1.676914] spi_mem_probe+0x6c/0xb0
6003 00:56:30.523834 <4>[ 1.680747] spi_probe+0x84/0xe4
6004 00:56:30.526633 <4>[ 1.684229] really_probe+0xbc/0x2e0
6005 00:56:30.530088 <4>[ 1.688060] __driver_probe_device+0x78/0x11c
6006 00:56:30.536637 <4>[ 1.692672] driver_probe_device+0xd8/0x160
6007 00:56:30.539836 <4>[ 1.697110] __device_attach_driver+0xb8/0x134
6008 00:56:30.543458 <4>[ 1.701809] bus_for_each_drv+0x78/0xd0
6009 00:56:30.550401 <4>[ 1.705900] __device_attach+0xa8/0x1c0
6010 00:56:30.553667 <4>[ 1.709990] device_initial_probe+0x14/0x20
6011 00:56:30.556428 <4>[ 1.714429] bus_probe_device+0x9c/0xa4
6012 00:56:30.560239 <4>[ 1.718519] device_add+0x3ac/0x7ac
6013 00:56:30.566852 <4>[ 1.722261] __spi_add_device+0x78/0x120
6014 00:56:30.569511 <4>[ 1.726439] spi_add_device+0x40/0x7c
6015 00:56:30.573055 <4>[ 1.730358] spi_register_controller+0x610/0xad0
6016 00:56:30.579951 <4>[ 1.735230] devm_spi_register_controller+0x4c/0xa4
6017 00:56:30.583335 <4>[ 1.740364] mtk_spi_probe+0x3f8/0x650
6018 00:56:30.586467 <4>[ 1.744368] platform_probe+0x68/0xe0
6019 00:56:30.589537 <4>[ 1.748287] really_probe+0xbc/0x2e0
6020 00:56:30.596053 <4>[ 1.752117] __driver_probe_device+0x78/0x11c
6021 00:56:30.599830 <4>[ 1.756729] driver_probe_device+0xd8/0x160
6022 00:56:30.602966 <4>[ 1.761167] __driver_attach+0x94/0x19c
6023 00:56:30.609588 <4>[ 1.765257] bus_for_each_dev+0x70/0xd0
6024 00:56:30.612812 <4>[ 1.769347] driver_attach+0x24/0x30
6025 00:56:30.616345 <4>[ 1.773177] bus_add_driver+0x154/0x20c
6026 00:56:30.619901 <4>[ 1.777267] driver_register+0x78/0x130
6027 00:56:30.626571 <4>[ 1.781358] __platform_driver_register+0x28/0x34
6028 00:56:30.629310 <4>[ 1.786318] mtk_spi_driver_init+0x1c/0x28
6029 00:56:30.632853 <4>[ 1.790671] do_one_initcall+0x50/0x1d0
6030 00:56:30.639852 <4>[ 1.794761] kernel_init_freeable+0x21c/0x288
6031 00:56:30.643064 <4>[ 1.799375] kernel_init+0x24/0x12c
6032 00:56:30.646344 <4>[ 1.803120] ret_from_fork+0x10/0x20
6033 00:56:30.655851 <6>[ 1.812031] tun: Universal TUN/TAP device driver, 1.6
6034 00:56:30.658898 <6>[ 1.818329] thunder_xcv, ver 1.0
6035 00:56:30.665480 <6>[ 1.821842] thunder_bgx, ver 1.0
6036 00:56:30.665583 <6>[ 1.825340] nicpf, ver 1.0
6037 00:56:30.676423 <6>[ 1.829711] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6038 00:56:30.679850 <6>[ 1.837202] hns3: Copyright (c) 2017 Huawei Corporation.
6039 00:56:30.687017 <6>[ 1.842804] hclge is initializing
6040 00:56:30.689974 <6>[ 1.846394] e1000: Intel(R) PRO/1000 Network Driver
6041 00:56:30.696684 <6>[ 1.851531] e1000: Copyright (c) 1999-2006 Intel Corporation.
6042 00:56:30.703329 <6>[ 1.857553] e1000e: Intel(R) PRO/1000 Network Driver
6043 00:56:30.706469 <6>[ 1.862774] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6044 00:56:30.712881 <6>[ 1.868969] igb: Intel(R) Gigabit Ethernet Network Driver
6045 00:56:30.719923 <6>[ 1.874627] igb: Copyright (c) 2007-2014 Intel Corporation.
6046 00:56:30.726232 <6>[ 1.880470] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6047 00:56:30.732845 <6>[ 1.886993] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6048 00:56:30.736177 <6>[ 1.893550] sky2: driver version 1.30
6049 00:56:30.742603 <6>[ 1.898817] usbcore: registered new device driver r8152-cfgselector
6050 00:56:30.749266 <6>[ 1.905360] usbcore: registered new interface driver r8152
6051 00:56:30.756146 <6>[ 1.911186] VFIO - User Level meta-driver version: 0.3
6052 00:56:30.762297 <6>[ 1.918995] mtu3 11201000.usb: uwk - reg:0x420, version:101
6053 00:56:30.769176 <4>[ 1.924873] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6054 00:56:30.775498 <6>[ 1.932171] mtu3 11201000.usb: dr_mode: 1, drd: auto
6055 00:56:30.782110 <6>[ 1.937400] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6056 00:56:30.785720 <6>[ 1.943594] mtu3 11201000.usb: usb3-drd: 0
6057 00:56:30.796296 <6>[ 1.949161] mtu3 11201000.usb: xHCI platform device register success...
6058 00:56:30.802369 <4>[ 1.957869] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6059 00:56:30.809673 <6>[ 1.965800] xhci-mtk 11200000.usb: xHCI Host Controller
6060 00:56:30.816188 <6>[ 1.971298] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6061 00:56:30.822800 <6>[ 1.979018] xhci-mtk 11200000.usb: USB3 root hub has no ports
6062 00:56:30.833133 <6>[ 1.985026] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6063 00:56:30.839480 <6>[ 1.994448] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6064 00:56:30.846017 <6>[ 2.000520] xhci-mtk 11200000.usb: xHCI Host Controller
6065 00:56:30.852312 <6>[ 2.006009] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6066 00:56:30.859323 <6>[ 2.013667] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6067 00:56:30.862680 <6>[ 2.020480] hub 1-0:1.0: USB hub found
6068 00:56:30.865459 <6>[ 2.024509] hub 1-0:1.0: 1 port detected
6069 00:56:30.876539 <6>[ 2.029848] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6070 00:56:30.879926 <6>[ 2.038484] hub 2-0:1.0: USB hub found
6071 00:56:30.889624 <3>[ 2.042535] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6072 00:56:30.896576 <6>[ 2.050428] usbcore: registered new interface driver usb-storage
6073 00:56:30.903136 <6>[ 2.057020] usbcore: registered new device driver onboard-usb-hub
6074 00:56:30.912687 <4>[ 2.065824] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6075 00:56:30.921798 <6>[ 2.078063] mt6397-rtc mt6358-rtc: registered as rtc0
6076 00:56:30.931659 <6>[ 2.083539] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-16T00:56:30 UTC (1718499390)
6077 00:56:30.938016 <6>[ 2.093430] i2c_dev: i2c /dev entries driver
6078 00:56:30.947835 <6>[ 2.099856] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6079 00:56:30.954517 <6>[ 2.108199] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6080 00:56:30.961077 <6>[ 2.117104] i2c 4-0058: Fixed dependency cycle(s) with /panel
6081 00:56:30.967340 <6>[ 2.123136] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6082 00:56:30.977459 <3>[ 2.130591] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6083 00:56:30.994187 <6>[ 2.150529] cpu cpu0: EM: created perf domain
6084 00:56:31.004008 <6>[ 2.156007] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6085 00:56:31.010927 <6>[ 2.167282] cpu cpu4: EM: created perf domain
6086 00:56:31.017898 <6>[ 2.174017] sdhci: Secure Digital Host Controller Interface driver
6087 00:56:31.024407 <6>[ 2.180466] sdhci: Copyright(c) Pierre Ossman
6088 00:56:31.030866 <6>[ 2.185868] Synopsys Designware Multimedia Card Interface Driver
6089 00:56:31.037846 <6>[ 2.186379] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6090 00:56:31.041024 <6>[ 2.193025] sdhci-pltfm: SDHCI platform and OF driver helper
6091 00:56:31.049282 <6>[ 2.205844] ledtrig-cpu: registered to indicate activity on CPUs
6092 00:56:31.056989 <6>[ 2.213602] usbcore: registered new interface driver usbhid
6093 00:56:31.063967 <6>[ 2.219447] usbhid: USB HID core driver
6094 00:56:31.070914 <6>[ 2.223711] spi_master spi2: will run message pump with realtime priority
6095 00:56:31.075089 <4>[ 2.223717] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6096 00:56:31.085157 <4>[ 2.237995] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6097 00:56:31.098430 <6>[ 2.245867] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6098 00:56:31.115271 <6>[ 2.261686] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6099 00:56:31.122231 <4>[ 2.270074] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6100 00:56:31.128291 <6>[ 2.282657] cros-ec-spi spi2.0: Chrome EC device registered
6101 00:56:31.134858 <4>[ 2.290056] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6102 00:56:31.149073 <4>[ 2.301627] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6103 00:56:31.155055 <4>[ 2.310301] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6104 00:56:31.166987 <6>[ 2.320244] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6105 00:56:31.194514 <6>[ 2.350708] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6106 00:56:31.201763 <6>[ 2.358152] mmc0: new HS400 MMC card at address 0001
6107 00:56:31.208239 <6>[ 2.364856] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6108 00:56:31.219845 <6>[ 2.375847] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6109 00:56:31.229568 <6>[ 2.377615] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6110 00:56:31.232956 <6>[ 2.384573] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6111 00:56:31.245999 <6>[ 2.389733] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6112 00:56:31.255702 <6>[ 2.389846] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6113 00:56:31.266030 <6>[ 2.394292] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6114 00:56:31.273780 <6>[ 2.429649] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6115 00:56:31.279959 <6>[ 2.430064] NET: Registered PF_PACKET protocol family
6116 00:56:31.286327 <6>[ 2.436334] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6117 00:56:31.289470 <6>[ 2.440449] 9pnet: Installing 9P2000 support
6118 00:56:31.296615 <6>[ 2.446881] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6119 00:56:31.299501 <5>[ 2.451496] Key type dns_resolver registered
6120 00:56:31.306761 <6>[ 2.463343] registered taskstats version 1
6121 00:56:31.310182 <5>[ 2.467712] Loading compiled-in X.509 certificates
6122 00:56:31.354017 <3>[ 2.507247] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6123 00:56:31.384994 <6>[ 2.534831] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6124 00:56:31.395366 <6>[ 2.548384] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6125 00:56:31.405223 <6>[ 2.556960] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6126 00:56:31.411797 <6>[ 2.565487] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6127 00:56:31.421406 <6>[ 2.574014] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6128 00:56:31.428357 <6>[ 2.582537] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6129 00:56:31.438216 <6>[ 2.591059] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6130 00:56:31.447952 <6>[ 2.599581] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6131 00:56:31.454728 <6>[ 2.608675] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6132 00:56:31.458176 <6>[ 2.609671] hub 1-1:1.0: USB hub found
6133 00:56:31.464184 <6>[ 2.616039] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6134 00:56:31.467791 <6>[ 2.619682] hub 1-1:1.0: 3 ports detected
6135 00:56:31.474397 <6>[ 2.626413] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6136 00:56:31.481350 <6>[ 2.637227] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6137 00:56:31.491924 <6>[ 2.644740] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6138 00:56:31.498159 <6>[ 2.653101] panfrost 13040000.gpu: clock rate = 511999970
6139 00:56:31.508298 <6>[ 2.658802] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6140 00:56:31.514532 <6>[ 2.669319] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6141 00:56:31.524869 <6>[ 2.677332] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6142 00:56:31.537934 <6>[ 2.685764] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6143 00:56:31.544229 <6>[ 2.697840] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6144 00:56:31.555553 <6>[ 2.709003] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6145 00:56:31.565693 <6>[ 2.717846] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6146 00:56:31.575583 <6>[ 2.726986] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6147 00:56:31.585373 <6>[ 2.736117] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6148 00:56:31.592037 <6>[ 2.745246] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6149 00:56:31.602254 <6>[ 2.754547] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6150 00:56:31.611747 <6>[ 2.763846] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6151 00:56:31.621508 <6>[ 2.773319] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6152 00:56:31.631963 <6>[ 2.782794] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6153 00:56:31.641463 <6>[ 2.791920] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6154 00:56:31.712333 <6>[ 2.865442] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6155 00:56:31.722214 <6>[ 2.874331] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6156 00:56:31.733362 <6>[ 2.886181] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6157 00:56:31.764577 <6>[ 2.917760] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6158 00:56:32.424989 <6>[ 3.101995] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6159 00:56:32.434934 <4>[ 3.205268] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6160 00:56:32.441457 <4>[ 3.205285] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6161 00:56:32.448011 <6>[ 3.242635] r8152 1-1.2:1.0 eth0: v1.12.13
6162 00:56:32.454848 <6>[ 3.321756] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6163 00:56:32.461675 <6>[ 3.561592] Console: switching to colour frame buffer device 170x48
6164 00:56:32.467789 <6>[ 3.622248] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6165 00:56:32.489130 <6>[ 3.639222] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6166 00:56:32.506838 <6>[ 3.656675] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6167 00:56:32.517019 <6>[ 3.669138] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6168 00:56:32.523240 <6>[ 3.677422] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6169 00:56:32.533357 <6>[ 3.684746] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6170 00:56:32.554046 <6>[ 3.703710] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6171 00:56:33.715839 <6>[ 4.872016] r8152 1-1.2:1.0 eth0: carrier on
6172 00:56:36.017921 <5>[ 4.893763] Sending DHCP requests .., OK
6173 00:56:36.023890 <6>[ 7.178169] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.20
6174 00:56:36.027298 <6>[ 7.186619] IP-Config: Complete:
6175 00:56:36.040384 <6>[ 7.190186] device=eth0, hwaddr=00:e0:4c:72:3d:a6, ipaddr=192.168.201.20, mask=255.255.255.0, gw=192.168.201.1
6176 00:56:36.050789 <6>[ 7.201092] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4, domain=lava-rack, nis-domain=(none)
6177 00:56:36.062312 <6>[ 7.215410] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6178 00:56:36.070657 <6>[ 7.215421] nameserver0=192.168.201.1
6179 00:56:36.078708 <6>[ 7.235295] clk: Disabling unused clocks
6180 00:56:36.083858 <6>[ 7.243251] ALSA device list:
6181 00:56:36.092940 <6>[ 7.249295] No soundcards found.
6182 00:56:36.102102 <6>[ 7.258407] Freeing unused kernel memory: 8512K
6183 00:56:36.109351 <6>[ 7.265560] Run /init as init process
6184 00:56:36.149616 Starting syslogd: OK
6185 00:56:36.153238 Starting klogd: OK
6186 00:56:36.162631 Running sysctl: OK
6187 00:56:36.172227 Populating /dev using udev: <30>[ 7.327376] udevd[206]: starting version 3.2.9
6188 00:56:36.178704 <27>[ 7.335210] udevd[206]: specified user 'tss' unknown
6189 00:56:36.185561 <27>[ 7.341319] udevd[206]: specified group 'tss' unknown
6190 00:56:36.192224 <30>[ 7.348331] udevd[207]: starting eudev-3.2.9
6191 00:56:36.214559 <27>[ 7.370576] udevd[207]: specified user 'tss' unknown
6192 00:56:36.220584 <27>[ 7.377119] udevd[207]: specified group 'tss' unknown
6193 00:56:36.362601 <3>[ 7.518635] mtk-scp 10500000.scp: invalid resource
6194 00:56:36.372365 <6>[ 7.524232] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6195 00:56:36.379021 <6>[ 7.524554] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6196 00:56:36.385779 <3>[ 7.529813] thermal_sys: Failed to find 'trips' node
6197 00:56:36.392238 <3>[ 7.529818] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6198 00:56:36.402094 <3>[ 7.529825] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6199 00:56:36.408114 <4>[ 7.529829] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6200 00:56:36.414820 <3>[ 7.535740] thermal_sys: Failed to find 'trips' node
6201 00:56:36.417962 <6>[ 7.555561] remoteproc remoteproc0: scp is available
6202 00:56:36.428333 <3>[ 7.564737] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6203 00:56:36.434242 <4>[ 7.575961] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6204 00:56:36.444583 <4>[ 7.576503] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6205 00:56:36.448129 <6>[ 7.576515] remoteproc remoteproc0: powering up scp
6206 00:56:36.457701 <4>[ 7.576528] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6207 00:56:36.464414 <3>[ 7.576531] remoteproc remoteproc0: request_firmware failed: -2
6208 00:56:36.470754 <3>[ 7.581117] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6209 00:56:36.480934 <4>[ 7.592709] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6210 00:56:36.488081 <4>[ 7.595707] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6211 00:56:36.497249 <3>[ 7.601864] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6212 00:56:36.503752 <3>[ 7.601875] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6213 00:56:36.513508 <3>[ 7.601879] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6214 00:56:36.520082 <3>[ 7.601883] elan_i2c 2-0015: Error applying setting, reverse things back
6215 00:56:36.530009 <3>[ 7.611162] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6216 00:56:36.540146 <4>[ 7.620244] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6217 00:56:36.550130 <3>[ 7.625332] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6218 00:56:36.553187 <6>[ 7.631230] mc: Linux media interface: v0.10
6219 00:56:36.562976 <6>[ 7.633673] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6220 00:56:36.573264 <5>[ 7.635423] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6221 00:56:36.583523 <3>[ 7.640692] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6222 00:56:36.593902 <6>[ 7.649862] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6223 00:56:36.603573 <3>[ 7.658619] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6224 00:56:36.610165 <6>[ 7.658752] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6225 00:56:36.620242 <5>[ 7.661994] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6226 00:56:36.626648 <5>[ 7.662482] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6227 00:56:36.636856 <4>[ 7.662558] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6228 00:56:36.640004 <6>[ 7.662567] cfg80211: failed to load regulatory.db
6229 00:56:36.653559 <3>[ 7.665289] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6230 00:56:36.662861 <3>[ 7.678091] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6231 00:56:36.666116 <6>[ 7.692538] videodev: Linux video capture interface: v2.00
6232 00:56:36.676534 <6>[ 7.692977] cs_system_cfg: CoreSight Configuration manager initialised
6233 00:56:36.682649 <3>[ 7.702185] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6234 00:56:36.692863 <6>[ 7.744659] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6235 00:56:36.702420 <6>[ 7.753694] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6236 00:56:36.709124 <3>[ 7.755558] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6237 00:56:36.718978 <6>[ 7.771519] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6238 00:56:36.725802 <3>[ 7.773220] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6239 00:56:36.735882 <6>[ 7.780169] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6240 00:56:36.742476 <3>[ 7.790160] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6241 00:56:36.751980 <6>[ 7.797831] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6242 00:56:36.758521 <6>[ 7.803280] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6243 00:56:36.765422 <6>[ 7.816441] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6244 00:56:36.776777 <6>[ 7.823399] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6245 00:56:36.786603 <6>[ 7.823667] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6246 00:56:36.796417 <6>[ 7.824997] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6247 00:56:36.799429 <6>[ 7.825962] Bluetooth: Core ver 2.22
6248 00:56:36.807333 <6>[ 7.826006] NET: Registered PF_BLUETOOTH protocol family
6249 00:56:36.814444 <6>[ 7.826008] Bluetooth: HCI device and connection manager initialized
6250 00:56:36.822493 <6>[ 7.826018] Bluetooth: HCI socket layer initialized
6251 00:56:36.829362 <6>[ 7.826022] Bluetooth: L2CAP socket layer initialized
6252 00:56:36.836137 <6>[ 7.826029] Bluetooth: SCO socket layer initialized
6253 00:56:36.845779 <6>[ 7.826051] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6254 00:56:36.859554 <6>[ 7.847127] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6255 00:56:36.869376 <6>[ 7.853830] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6256 00:56:36.875936 <6>[ 7.863113] usbcore: registered new interface driver uvcvideo
6257 00:56:36.882719 <6>[ 7.863172] Bluetooth: HCI UART driver ver 2.3
6258 00:56:36.889524 <6>[ 7.863179] Bluetooth: HCI UART protocol H4 registered
6259 00:56:36.896446 <6>[ 7.863216] Bluetooth: HCI UART protocol LL registered
6260 00:56:36.903281 <6>[ 7.863229] Bluetooth: HCI UART protocol Three-wire (H5) registered
6261 00:56:36.918386 <3>[ 7.863329] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6262 00:56:36.924862 <6>[ 7.863563] Bluetooth: HCI UART protocol Broadcom registered
6263 00:56:36.931275 <6>[ 7.863589] Bluetooth: HCI UART protocol QCA registered
6264 00:56:36.937893 <6>[ 7.863601] Bluetooth: HCI UART protocol Marvell registered
6265 00:56:36.944767 <3>[ 7.864181] debugfs: File 'Playback' in directory 'dapm' already present!
6266 00:56:36.950947 <3>[ 7.864192] debugfs: File 'Capture' in directory 'dapm' already present!
6267 00:56:36.957781 <6>[ 7.864478] Bluetooth: hci0: setting up ROME/QCA6390
6268 00:56:36.970687 <6>[ 7.865749] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6269 00:56:36.977248 <6>[ 7.871618] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6270 00:56:36.987049 <6>[ 7.887524] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6271 00:56:36.997359 <6>[ 7.888292] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6272 00:56:37.007604 <6>[ 7.896028] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6273 00:56:37.013920 <3>[ 8.077368] Bluetooth: hci0: Frame reassembly failed (-84)
6274 00:56:37.024017 <6>[ 8.080016] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6275 00:56:37.067767 <4>[ 8.220244] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6276 00:56:37.073741 <4>[ 8.220244] Fallback method does not support PEC.
6277 00:56:37.084893 <3>[ 8.238119] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6278 00:56:37.085010 done
6279 00:56:37.101790 Saving random seed: <3>[ 8.253797] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6280 00:56:37.101882 OK
6281 00:56:37.114087 Starting network: ip: RTNETLINK answers: File exists
6282 00:56:37.118125 FAIL
6283 00:56:37.160969 Starting dropbear sshd: <6>[ 8.316909] NET: Registered PF_INET6 protocol family
6284 00:56:37.169293 <6>[ 8.325503] Segment Routing with IPv6
6285 00:56:37.175679 <6>[ 8.331333] In-situ OAM (IOAM) with IPv6
6286 00:56:37.180111 OK
6287 00:56:37.190852 /bin/sh: can't access tty; job control turned off
6288 00:56:37.191192 Matched prompt #10: / #
6290 00:56:37.191379 Setting prompt string to ['/ #']
6291 00:56:37.191471 end: 2.2.5.1 login-action (duration 00:00:09) [common]
6293 00:56:37.191654 end: 2.2.5 auto-login-action (duration 00:00:09) [common]
6294 00:56:37.191763 start: 2.2.6 expect-shell-connection (timeout 00:03:58) [common]
6295 00:56:37.191858 Setting prompt string to ['/ #']
6296 00:56:37.191944 Forcing a shell prompt, looking for ['/ #']
6298 00:56:37.242173 / #
6299 00:56:37.242338 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6300 00:56:37.242413 Waiting using forced prompt support (timeout 00:02:30)
6301 00:56:37.242507 <6>[ 8.363263] Bluetooth: hci0: QCA Product ID :0x00000008
6302 00:56:37.242591 <6>[ 8.367075] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6303 00:56:37.242679 <6>[ 8.368974] Bluetooth: hci0: QCA SOC Version :0x00000044
6304 00:56:37.242763 <6>[ 8.393772] Bluetooth: hci0: QCA ROM Version :0x00000302
6305 00:56:37.289606 <6>[ 8.403184] Bluetooth: hci0: QCA Patch Version:0x00000111
6306 00:56:37.289693
6307 00:56:37.289755 / # <6>[ 8.412246] Bluetooth: hci0: QCA controller version 0x00440302
6308 00:56:37.289817 <6>[ 8.421231] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6309 00:56:37.290103 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6310 00:56:37.290193 start: 2.2.7 export-device-env (timeout 00:03:58) [common]
6311 00:56:37.290276 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6312 00:56:37.290355 end: 2.2 depthcharge-retry (duration 00:01:02) [common]
6313 00:56:37.290445 end: 2 depthcharge-action (duration 00:01:02) [common]
6314 00:56:37.290526 start: 3 lava-test-retry (timeout 00:01:00) [common]
6315 00:56:37.290639 start: 3.1 lava-test-shell (timeout 00:01:00) [common]
6316 00:56:37.290734 Using namespace: common
6318 00:56:37.391059 #
6319 00:56:37.391268 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:01:00)
6320 00:56:37.391406 <4>[ 8.430991] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6321 00:56:37.391504 <3>[ 8.442685] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6322 00:56:37.391592 <3>[ 8.452996] Bluetooth: hci0: QCA Failed to download patch (-2)
6323 00:56:37.395648 #
6324 00:56:37.395922 Using /lava-14368598
6326 00:56:37.496271 / # export SHELL=/bin/sh
6327 00:56:37.500968 export SHELL=/bin/sh
6329 00:56:37.601490 / # . /lava-14368598/environment
6330 00:56:37.601764 . /lava-14368598/environment<6>[ 8.724846] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6331 00:56:37.606809
6333 00:56:37.707341 / # /lava-14368598/bin/lava-test-runner /lava-14368598/0
6334 00:56:37.707651 Test shell timeout: 10s (minimum of the action and connection timeout)
6335 00:56:37.708139 <4>[ 8.809815] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6336 00:56:37.708238 /lava-14368598/bin/lava-test-runner /lava-14368598/0<4>[ 8.830943] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6337 00:56:37.708330 <4>[ 8.847026] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6338 00:56:37.708416 <4>[ 8.860244] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6339 00:56:37.713005
6340 00:56:37.753598 + export 'TESTRUN_ID=0_dmesg'
6341 00:56:37.753716 +<8>[ 8.897731] <LAVA_SIGNAL_STARTRUN 0_dmesg 14368598_1.5.2.3.1>
6342 00:56:37.753991 Received signal: <STARTRUN> 0_dmesg 14368598_1.5.2.3.1
6343 00:56:37.754089 Starting test lava.0_dmesg (14368598_1.5.2.3.1)
6344 00:56:37.754200 Skipping test definition patterns.
6345 00:56:37.754332 cd /lava-14368598/0/tests/0_dmesg
6346 00:56:37.754419 + cat uuid
6347 00:56:37.754514 + UUID=14368598_1.5.2.3.1
6348 00:56:37.754598 + set +x
6349 00:56:37.755898 + KERNELCI_LAVA=y /bin/sh /opt/kernelci/dmesg.sh
6350 00:56:37.768558 <8>[ 8.921652] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0>
6351 00:56:37.768812 Received signal: <TESTCASE> TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0
6353 00:56:37.793516 <8>[ 8.946592] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0>
6354 00:56:37.793782 Received signal: <TESTCASE> TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0
6356 00:56:37.819765 <8>[ 8.972862] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0>
6357 00:56:37.820041 Received signal: <TESTCASE> TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0
6359 00:56:37.828146 <8>[ 8.984501] <LAVA_SIGNAL_ENDRUN 0_dmesg 14368598_1.5.2.3.1>
6360 00:56:37.828415 Received signal: <ENDRUN> 0_dmesg 14368598_1.5.2.3.1
6361 00:56:37.828518 Ending use of test pattern.
6362 00:56:37.828606 Ending test lava.0_dmesg (14368598_1.5.2.3.1), duration 0.07
6364 00:56:37.831626 + set +x
6365 00:56:37.834905 <LAVA_TEST_RUNNER EXIT>
6366 00:56:37.835167 ok: lava_test_shell seems to have completed
6367 00:56:37.835309 alert: pass
crit: pass
emerg: pass
6368 00:56:37.835423 end: 3.1 lava-test-shell (duration 00:00:01) [common]
6369 00:56:37.835531 end: 3 lava-test-retry (duration 00:00:01) [common]
6370 00:56:37.835642 start: 4 finalize (timeout 00:08:36) [common]
6371 00:56:37.835756 start: 4.1 power-off (timeout 00:00:30) [common]
6372 00:56:37.836014 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=off']
6373 00:56:39.926538 >> Command sent successfully.
6374 00:56:39.930381 Returned 0 in 2 seconds
6375 00:56:40.030685 end: 4.1 power-off (duration 00:00:02) [common]
6377 00:56:40.031063 start: 4.2 read-feedback (timeout 00:08:34) [common]
6378 00:56:40.031338 Listened to connection for namespace 'common' for up to 1s
6379 00:56:41.032267 Finalising connection for namespace 'common'
6380 00:56:41.032452 Disconnecting from shell: Finalise
6381 00:56:41.032557 / #
6382 00:56:41.132827 end: 4.2 read-feedback (duration 00:00:01) [common]
6383 00:56:41.132985 end: 4 finalize (duration 00:00:03) [common]
6384 00:56:41.133099 Cleaning after the job
6385 00:56:41.133194 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368598/tftp-deploy-xkhdqcna/ramdisk
6386 00:56:41.135613 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368598/tftp-deploy-xkhdqcna/kernel
6387 00:56:41.143537 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368598/tftp-deploy-xkhdqcna/dtb
6388 00:56:41.143735 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368598/tftp-deploy-xkhdqcna/modules
6389 00:56:41.149494 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14368598
6390 00:56:41.192211 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14368598
6391 00:56:41.192411 Job finished correctly