Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 46
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 89
1 01:00:33.170650 lava-dispatcher, installed at version: 2024.03
2 01:00:33.170917 start: 0 validate
3 01:00:33.171041 Start time: 2024-06-16 01:00:33.171033+00:00 (UTC)
4 01:00:33.171175 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:00:33.171318 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-libcamera%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:00:33.436185 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:00:33.436345 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 01:00:33.686908 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:00:33.687797 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 01:00:33.940352 Using caching service: 'http://localhost/cache/?uri=%s'
11 01:00:33.940939 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-libcamera%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:00:34.193484 Using caching service: 'http://localhost/cache/?uri=%s'
13 01:00:34.194175 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 01:00:34.452005 validate duration: 1.28
16 01:00:34.453242 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:00:34.453926 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:00:34.454407 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:00:34.455131 Not decompressing ramdisk as can be used compressed.
20 01:00:34.455626 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-libcamera/20240313.0/arm64/initrd.cpio.gz
21 01:00:34.455975 saving as /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/ramdisk/initrd.cpio.gz
22 01:00:34.456307 total size: 5628151 (5 MB)
23 01:00:34.461105 progress 0 % (0 MB)
24 01:00:34.469494 progress 5 % (0 MB)
25 01:00:34.477536 progress 10 % (0 MB)
26 01:00:34.483136 progress 15 % (0 MB)
27 01:00:34.487398 progress 20 % (1 MB)
28 01:00:34.490772 progress 25 % (1 MB)
29 01:00:34.494057 progress 30 % (1 MB)
30 01:00:34.496843 progress 35 % (1 MB)
31 01:00:34.499213 progress 40 % (2 MB)
32 01:00:34.501616 progress 45 % (2 MB)
33 01:00:34.503751 progress 50 % (2 MB)
34 01:00:34.505869 progress 55 % (2 MB)
35 01:00:34.507953 progress 60 % (3 MB)
36 01:00:34.509689 progress 65 % (3 MB)
37 01:00:34.511586 progress 70 % (3 MB)
38 01:00:34.513250 progress 75 % (4 MB)
39 01:00:34.514965 progress 80 % (4 MB)
40 01:00:34.516520 progress 85 % (4 MB)
41 01:00:34.518230 progress 90 % (4 MB)
42 01:00:34.519792 progress 95 % (5 MB)
43 01:00:34.521172 progress 100 % (5 MB)
44 01:00:34.521380 5 MB downloaded in 0.07 s (82.48 MB/s)
45 01:00:34.521536 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:00:34.521779 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:00:34.521862 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:00:34.521940 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:00:34.522070 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 01:00:34.522133 saving as /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/kernel/Image
52 01:00:34.522189 total size: 54813184 (52 MB)
53 01:00:34.522244 No compression specified
54 01:00:34.523268 progress 0 % (0 MB)
55 01:00:34.536921 progress 5 % (2 MB)
56 01:00:34.550798 progress 10 % (5 MB)
57 01:00:34.564370 progress 15 % (7 MB)
58 01:00:34.578219 progress 20 % (10 MB)
59 01:00:34.592204 progress 25 % (13 MB)
60 01:00:34.605836 progress 30 % (15 MB)
61 01:00:34.619496 progress 35 % (18 MB)
62 01:00:34.633285 progress 40 % (20 MB)
63 01:00:34.646932 progress 45 % (23 MB)
64 01:00:34.660723 progress 50 % (26 MB)
65 01:00:34.674553 progress 55 % (28 MB)
66 01:00:34.688283 progress 60 % (31 MB)
67 01:00:34.702194 progress 65 % (34 MB)
68 01:00:34.716082 progress 70 % (36 MB)
69 01:00:34.729796 progress 75 % (39 MB)
70 01:00:34.743556 progress 80 % (41 MB)
71 01:00:34.757108 progress 85 % (44 MB)
72 01:00:34.770885 progress 90 % (47 MB)
73 01:00:34.784719 progress 95 % (49 MB)
74 01:00:34.798337 progress 100 % (52 MB)
75 01:00:34.798565 52 MB downloaded in 0.28 s (189.14 MB/s)
76 01:00:34.798715 end: 1.2.1 http-download (duration 00:00:00) [common]
78 01:00:34.798920 end: 1.2 download-retry (duration 00:00:00) [common]
79 01:00:34.799002 start: 1.3 download-retry (timeout 00:10:00) [common]
80 01:00:34.799078 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 01:00:34.799203 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 01:00:34.799270 saving as /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 01:00:34.799323 total size: 57695 (0 MB)
84 01:00:34.799376 No compression specified
85 01:00:34.800485 progress 56 % (0 MB)
86 01:00:34.800749 progress 100 % (0 MB)
87 01:00:34.800941 0 MB downloaded in 0.00 s (34.05 MB/s)
88 01:00:34.801055 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:00:34.801263 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:00:34.801372 start: 1.4 download-retry (timeout 00:10:00) [common]
92 01:00:34.801477 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 01:00:34.801650 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-libcamera/20240313.0/arm64/full.rootfs.tar.xz
94 01:00:34.801713 saving as /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/nfsrootfs/full.rootfs.tar
95 01:00:34.801766 total size: 69067788 (65 MB)
96 01:00:34.801821 Using unxz to decompress xz
97 01:00:34.802994 progress 0 % (0 MB)
98 01:00:34.988282 progress 5 % (3 MB)
99 01:00:35.185296 progress 10 % (6 MB)
100 01:00:35.378755 progress 15 % (9 MB)
101 01:00:35.540620 progress 20 % (13 MB)
102 01:00:35.721523 progress 25 % (16 MB)
103 01:00:35.914698 progress 30 % (19 MB)
104 01:00:36.036862 progress 35 % (23 MB)
105 01:00:36.139680 progress 40 % (26 MB)
106 01:00:36.337850 progress 45 % (29 MB)
107 01:00:36.538190 progress 50 % (32 MB)
108 01:00:36.743456 progress 55 % (36 MB)
109 01:00:36.950125 progress 60 % (39 MB)
110 01:00:37.136190 progress 65 % (42 MB)
111 01:00:37.330215 progress 70 % (46 MB)
112 01:00:37.519730 progress 75 % (49 MB)
113 01:00:37.720463 progress 80 % (52 MB)
114 01:00:37.891176 progress 85 % (56 MB)
115 01:00:38.077734 progress 90 % (59 MB)
116 01:00:38.277441 progress 95 % (62 MB)
117 01:00:38.475202 progress 100 % (65 MB)
118 01:00:38.481185 65 MB downloaded in 3.68 s (17.90 MB/s)
119 01:00:38.481356 end: 1.4.1 http-download (duration 00:00:04) [common]
121 01:00:38.481577 end: 1.4 download-retry (duration 00:00:04) [common]
122 01:00:38.481657 start: 1.5 download-retry (timeout 00:09:56) [common]
123 01:00:38.481736 start: 1.5.1 http-download (timeout 00:09:56) [common]
124 01:00:38.481863 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 01:00:38.481924 saving as /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/modules/modules.tar
126 01:00:38.481996 total size: 8617404 (8 MB)
127 01:00:38.482053 Using unxz to decompress xz
128 01:00:38.483337 progress 0 % (0 MB)
129 01:00:38.501857 progress 5 % (0 MB)
130 01:00:38.527738 progress 10 % (0 MB)
131 01:00:38.554397 progress 15 % (1 MB)
132 01:00:38.577466 progress 20 % (1 MB)
133 01:00:38.600228 progress 25 % (2 MB)
134 01:00:38.623035 progress 30 % (2 MB)
135 01:00:38.648609 progress 35 % (2 MB)
136 01:00:38.672030 progress 40 % (3 MB)
137 01:00:38.694011 progress 45 % (3 MB)
138 01:00:38.717283 progress 50 % (4 MB)
139 01:00:38.741227 progress 55 % (4 MB)
140 01:00:38.764608 progress 60 % (4 MB)
141 01:00:38.788028 progress 65 % (5 MB)
142 01:00:38.813752 progress 70 % (5 MB)
143 01:00:38.836717 progress 75 % (6 MB)
144 01:00:38.861240 progress 80 % (6 MB)
145 01:00:38.884557 progress 85 % (7 MB)
146 01:00:38.908787 progress 90 % (7 MB)
147 01:00:38.932995 progress 95 % (7 MB)
148 01:00:38.956910 progress 100 % (8 MB)
149 01:00:38.962553 8 MB downloaded in 0.48 s (17.10 MB/s)
150 01:00:38.962713 end: 1.5.1 http-download (duration 00:00:00) [common]
152 01:00:38.962922 end: 1.5 download-retry (duration 00:00:00) [common]
153 01:00:38.962999 start: 1.6 prepare-tftp-overlay (timeout 00:09:55) [common]
154 01:00:38.963075 start: 1.6.1 extract-nfsrootfs (timeout 00:09:55) [common]
155 01:00:40.680684 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14368621/extract-nfsrootfs-1kkixd0n
156 01:00:40.680861 end: 1.6.1 extract-nfsrootfs (duration 00:00:02) [common]
157 01:00:40.680954 start: 1.6.2 lava-overlay (timeout 00:09:54) [common]
158 01:00:40.681120 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue
159 01:00:40.681235 makedir: /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin
160 01:00:40.681333 makedir: /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/tests
161 01:00:40.681421 makedir: /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/results
162 01:00:40.681507 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-add-keys
163 01:00:40.681736 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-add-sources
164 01:00:40.681858 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-background-process-start
165 01:00:40.681981 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-background-process-stop
166 01:00:40.682106 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-common-functions
167 01:00:40.682229 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-echo-ipv4
168 01:00:40.682343 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-install-packages
169 01:00:40.682467 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-installed-packages
170 01:00:40.682580 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-os-build
171 01:00:40.682697 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-probe-channel
172 01:00:40.682809 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-probe-ip
173 01:00:40.682926 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-target-ip
174 01:00:40.683037 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-target-mac
175 01:00:40.683149 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-target-storage
176 01:00:40.683267 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-test-case
177 01:00:40.683379 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-test-event
178 01:00:40.683495 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-test-feedback
179 01:00:40.683652 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-test-raise
180 01:00:40.683825 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-test-reference
181 01:00:40.683969 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-test-runner
182 01:00:40.684091 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-test-set
183 01:00:40.684204 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-test-shell
184 01:00:40.684324 Updating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-install-packages (oe)
185 01:00:40.684467 Updating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/bin/lava-installed-packages (oe)
186 01:00:40.684577 Creating /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/environment
187 01:00:40.684670 LAVA metadata
188 01:00:40.684735 - LAVA_JOB_ID=14368621
189 01:00:40.684791 - LAVA_DISPATCHER_IP=192.168.201.1
190 01:00:40.684887 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:54) [common]
191 01:00:40.684942 skipped lava-vland-overlay
192 01:00:40.685007 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
193 01:00:40.685077 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:54) [common]
194 01:00:40.685137 skipped lava-multinode-overlay
195 01:00:40.685202 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
196 01:00:40.685271 start: 1.6.2.3 test-definition (timeout 00:09:54) [common]
197 01:00:40.685332 Loading test definitions
198 01:00:40.685412 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:54) [common]
199 01:00:40.685471 Using /lava-14368621 at stage 0
200 01:00:40.685877 uuid=14368621_1.6.2.3.1 testdef=None
201 01:00:40.685994 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
202 01:00:40.686077 start: 1.6.2.3.2 test-overlay (timeout 00:09:54) [common]
203 01:00:40.686517 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
205 01:00:40.686759 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:54) [common]
206 01:00:40.687316 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
208 01:00:40.687530 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:54) [common]
209 01:00:40.688082 runner path: /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/0/tests/0_lc-compliance test_uuid 14368621_1.6.2.3.1
210 01:00:40.688229 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
212 01:00:40.688458 Creating lava-test-runner.conf files
213 01:00:40.688518 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14368621/lava-overlay-93vh0nue/lava-14368621/0 for stage 0
214 01:00:40.688599 - 0_lc-compliance
215 01:00:40.688689 end: 1.6.2.3 test-definition (duration 00:00:00) [common]
216 01:00:40.688771 start: 1.6.2.4 compress-overlay (timeout 00:09:54) [common]
217 01:00:40.694697 end: 1.6.2.4 compress-overlay (duration 00:00:00) [common]
218 01:00:40.694798 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:54) [common]
219 01:00:40.694876 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
220 01:00:40.694953 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
221 01:00:40.695036 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:54) [common]
222 01:00:40.856350 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
223 01:00:40.856498 start: 1.6.4 extract-modules (timeout 00:09:54) [common]
224 01:00:40.856579 extracting modules file /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14368621/extract-nfsrootfs-1kkixd0n
225 01:00:41.098264 extracting modules file /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14368621/extract-overlay-ramdisk-v9dk7bnr/ramdisk
226 01:00:41.356642 end: 1.6.4 extract-modules (duration 00:00:01) [common]
227 01:00:41.356818 start: 1.6.5 apply-overlay-tftp (timeout 00:09:53) [common]
228 01:00:41.356927 [common] Applying overlay to NFS
229 01:00:41.357018 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368621/compress-overlay-a_x62xpd/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14368621/extract-nfsrootfs-1kkixd0n
230 01:00:41.363814 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
231 01:00:41.363911 start: 1.6.6 configure-preseed-file (timeout 00:09:53) [common]
232 01:00:41.363990 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
233 01:00:41.364074 start: 1.6.7 compress-ramdisk (timeout 00:09:53) [common]
234 01:00:41.364139 Building ramdisk /var/lib/lava/dispatcher/tmp/14368621/extract-overlay-ramdisk-v9dk7bnr/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14368621/extract-overlay-ramdisk-v9dk7bnr/ramdisk
235 01:00:41.664822 >> 130405 blocks
236 01:00:43.789068 rename /var/lib/lava/dispatcher/tmp/14368621/extract-overlay-ramdisk-v9dk7bnr/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/ramdisk/ramdisk.cpio.gz
237 01:00:43.789263 end: 1.6.7 compress-ramdisk (duration 00:00:02) [common]
238 01:00:43.789382 start: 1.6.8 prepare-kernel (timeout 00:09:51) [common]
239 01:00:43.789521 start: 1.6.8.1 prepare-fit (timeout 00:09:51) [common]
240 01:00:43.789698 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/kernel/Image']
241 01:00:57.909561 Returned 0 in 14 seconds
242 01:00:58.010082 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/kernel/image.itb
243 01:00:58.430480 output: FIT description: Kernel Image image with one or more FDT blobs
244 01:00:58.430625 output: Created: Sun Jun 16 02:00:58 2024
245 01:00:58.430695 output: Image 0 (kernel-1)
246 01:00:58.430756 output: Description:
247 01:00:58.430839 output: Created: Sun Jun 16 02:00:58 2024
248 01:00:58.430903 output: Type: Kernel Image
249 01:00:58.430963 output: Compression: lzma compressed
250 01:00:58.431030 output: Data Size: 13125045 Bytes = 12817.43 KiB = 12.52 MiB
251 01:00:58.431102 output: Architecture: AArch64
252 01:00:58.431162 output: OS: Linux
253 01:00:58.431221 output: Load Address: 0x00000000
254 01:00:58.431295 output: Entry Point: 0x00000000
255 01:00:58.431354 output: Hash algo: crc32
256 01:00:58.431411 output: Hash value: f6f06660
257 01:00:58.431466 output: Image 1 (fdt-1)
258 01:00:58.431540 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
259 01:00:58.431594 output: Created: Sun Jun 16 02:00:58 2024
260 01:00:58.431646 output: Type: Flat Device Tree
261 01:00:58.431695 output: Compression: uncompressed
262 01:00:58.431749 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
263 01:00:58.431813 output: Architecture: AArch64
264 01:00:58.431863 output: Hash algo: crc32
265 01:00:58.431911 output: Hash value: a9713552
266 01:00:58.431958 output: Image 2 (ramdisk-1)
267 01:00:58.432027 output: Description: unavailable
268 01:00:58.432078 output: Created: Sun Jun 16 02:00:58 2024
269 01:00:58.432126 output: Type: RAMDisk Image
270 01:00:58.432175 output: Compression: uncompressed
271 01:00:58.432238 output: Data Size: 18738034 Bytes = 18298.86 KiB = 17.87 MiB
272 01:00:58.432290 output: Architecture: AArch64
273 01:00:58.432338 output: OS: Linux
274 01:00:58.432390 output: Load Address: unavailable
275 01:00:58.432462 output: Entry Point: unavailable
276 01:00:58.432514 output: Hash algo: crc32
277 01:00:58.432561 output: Hash value: bdc9a12f
278 01:00:58.432609 output: Default Configuration: 'conf-1'
279 01:00:58.432658 output: Configuration 0 (conf-1)
280 01:00:58.432734 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
281 01:00:58.432785 output: Kernel: kernel-1
282 01:00:58.432833 output: Init Ramdisk: ramdisk-1
283 01:00:58.432880 output: FDT: fdt-1
284 01:00:58.432942 output: Loadables: kernel-1
285 01:00:58.432995 output:
286 01:00:58.433131 end: 1.6.8.1 prepare-fit (duration 00:00:15) [common]
287 01:00:58.433249 end: 1.6.8 prepare-kernel (duration 00:00:15) [common]
288 01:00:58.433345 end: 1.6 prepare-tftp-overlay (duration 00:00:19) [common]
289 01:00:58.433440 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:36) [common]
290 01:00:58.433537 No LXC device requested
291 01:00:58.433621 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
292 01:00:58.433719 start: 1.8 deploy-device-env (timeout 00:09:36) [common]
293 01:00:58.433792 end: 1.8 deploy-device-env (duration 00:00:00) [common]
294 01:00:58.433854 Checking files for TFTP limit of 4294967296 bytes.
295 01:00:58.434345 end: 1 tftp-deploy (duration 00:00:24) [common]
296 01:00:58.434463 start: 2 depthcharge-action (timeout 00:05:00) [common]
297 01:00:58.434552 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
298 01:00:58.434685 substitutions:
299 01:00:58.434753 - {DTB}: 14368621/tftp-deploy-sqd68brs/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
300 01:00:58.434814 - {INITRD}: 14368621/tftp-deploy-sqd68brs/ramdisk/ramdisk.cpio.gz
301 01:00:58.434868 - {KERNEL}: 14368621/tftp-deploy-sqd68brs/kernel/Image
302 01:00:58.434948 - {LAVA_MAC}: None
303 01:00:58.435005 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14368621/extract-nfsrootfs-1kkixd0n
304 01:00:58.435057 - {NFS_SERVER_IP}: 192.168.201.1
305 01:00:58.435112 - {PRESEED_CONFIG}: None
306 01:00:58.435193 - {PRESEED_LOCAL}: None
307 01:00:58.435246 - {RAMDISK}: 14368621/tftp-deploy-sqd68brs/ramdisk/ramdisk.cpio.gz
308 01:00:58.435296 - {ROOT_PART}: None
309 01:00:58.435344 - {ROOT}: None
310 01:00:58.435416 - {SERVER_IP}: 192.168.201.1
311 01:00:58.435466 - {TEE}: None
312 01:00:58.435516 Parsed boot commands:
313 01:00:58.435564 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
314 01:00:58.435739 Parsed boot commands: tftpboot 192.168.201.1 14368621/tftp-deploy-sqd68brs/kernel/image.itb 14368621/tftp-deploy-sqd68brs/kernel/cmdline
315 01:00:58.435836 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
316 01:00:58.435947 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
317 01:00:58.436058 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
318 01:00:58.436185 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
319 01:00:58.436276 Not connected, no need to disconnect.
320 01:00:58.436387 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
321 01:00:58.436489 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
322 01:00:58.436592 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-4'
323 01:00:58.440187 Setting prompt string to ['lava-test: # ']
324 01:00:58.440575 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
325 01:00:58.440728 end: 2.2.1 reset-connection (duration 00:00:00) [common]
326 01:00:58.440856 start: 2.2.2 reset-device (timeout 00:05:00) [common]
327 01:00:58.440996 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
328 01:00:58.441326 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=reboot']
329 01:01:07.583026 >> Command sent successfully.
330 01:01:07.586441 Returned 0 in 9 seconds
331 01:01:07.686774 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
333 01:01:07.687163 end: 2.2.2 reset-device (duration 00:00:09) [common]
334 01:01:07.687292 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
335 01:01:07.687378 Setting prompt string to 'Starting depthcharge on Juniper...'
336 01:01:07.687438 Changing prompt to 'Starting depthcharge on Juniper...'
337 01:01:07.687512 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
338 01:01:07.687911 [Enter `^Ec?' for help]
339 01:01:14.027461 [DL] 00000000 00000000 010701
340 01:01:14.031909
341 01:01:14.032406
342 01:01:14.032772 F0: 102B 0000
343 01:01:14.033120
344 01:01:14.035073 F3: 1006 0033 [0200]
345 01:01:14.035527
346 01:01:14.035886 F3: 4001 00E0 [0200]
347 01:01:14.036234
348 01:01:14.036559 F3: 0000 0000
349 01:01:14.038586
350 01:01:14.039042 V0: 0000 0000 [0001]
351 01:01:14.039407
352 01:01:14.039749 00: 1027 0002
353 01:01:14.041923
354 01:01:14.042352 01: 0000 0000
355 01:01:14.042691
356 01:01:14.042994 BP: 0C00 0251 [0000]
357 01:01:14.043287
358 01:01:14.045279 G0: 1182 0000
359 01:01:14.045682
360 01:01:14.045979 EC: 0004 0000 [0001]
361 01:01:14.046260
362 01:01:14.048412 S7: 0000 0000 [0000]
363 01:01:14.048798
364 01:01:14.051747 CC: 0000 0000 [0001]
365 01:01:14.052166
366 01:01:14.052521 T0: 0000 00DB [000F]
367 01:01:14.052816
368 01:01:14.053079 Jump to BL
369 01:01:14.054691
370 01:01:14.088091
371 01:01:14.088561
372 01:01:14.097859 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
373 01:01:14.100735 ARM64: Exception handlers installed.
374 01:01:14.101124 ARM64: Testing exception
375 01:01:14.104426 ARM64: Done test exception
376 01:01:14.108729 WDT: Last reset was cold boot
377 01:01:14.109124 SPI0(PAD0) initialized at 992727 Hz
378 01:01:14.115134 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
379 01:01:14.115527 Manufacturer: ef
380 01:01:14.121629 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
381 01:01:14.134845 Probing TPM: . done!
382 01:01:14.135286 TPM ready after 0 ms
383 01:01:14.141432 Connected to device vid:did:rid of 1ae0:0028:00
384 01:01:14.148067 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
385 01:01:14.187452 Initialized TPM device CR50 revision 0
386 01:01:14.199100 tlcl_send_startup: Startup return code is 0
387 01:01:14.199504 TPM: setup succeeded
388 01:01:14.207260 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
389 01:01:14.210546 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
390 01:01:14.213705 in-header: 03 19 00 00 08 00 00 00
391 01:01:14.217309 in-data: a2 e0 47 00 13 00 00 00
392 01:01:14.220304 Chrome EC: UHEPI supported
393 01:01:14.226893 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
394 01:01:14.230015 in-header: 03 a1 00 00 08 00 00 00
395 01:01:14.233867 in-data: 84 60 60 10 00 00 00 00
396 01:01:14.234441 Phase 1
397 01:01:14.237261 FMAP: area GBB found @ 3f5000 (12032 bytes)
398 01:01:14.244112 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
399 01:01:14.250309 VB2:vb2_check_recovery() Recovery was requested manually
400 01:01:14.253529 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
401 01:01:14.257279 Recovery requested (1009000e)
402 01:01:14.269029 tlcl_extend: response is 0
403 01:01:14.274075 tlcl_extend: response is 0
404 01:01:14.299077
405 01:01:14.299601
406 01:01:14.308828 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
407 01:01:14.312442 ARM64: Exception handlers installed.
408 01:01:14.313015 ARM64: Testing exception
409 01:01:14.315828 ARM64: Done test exception
410 01:01:14.331425 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x9a6d, sec=0x2008
411 01:01:14.338079 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
412 01:01:14.341460 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
413 01:01:14.350146 [RTC]rtc_get_frequency_meter,134: input=0xf, output=823
414 01:01:14.356546 [RTC]rtc_get_frequency_meter,134: input=0x7, output=697
415 01:01:14.363538 [RTC]rtc_get_frequency_meter,134: input=0xb, output=760
416 01:01:14.370349 [RTC]rtc_get_frequency_meter,134: input=0xd, output=791
417 01:01:14.376861 [RTC]rtc_get_frequency_meter,134: input=0xe, output=807
418 01:01:14.384074 [RTC]rtc_get_frequency_meter,134: input=0xd, output=791
419 01:01:14.390781 [RTC]rtc_get_frequency_meter,134: input=0xe, output=808
420 01:01:14.394366 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x9a6d
421 01:01:14.401288 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
422 01:01:14.404668 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
423 01:01:14.410789 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
424 01:01:14.413969 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
425 01:01:14.417956 in-header: 03 19 00 00 08 00 00 00
426 01:01:14.418403 in-data: a2 e0 47 00 13 00 00 00
427 01:01:14.420758 Chrome EC: UHEPI supported
428 01:01:14.427565 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
429 01:01:14.431046 in-header: 03 a1 00 00 08 00 00 00
430 01:01:14.433939 in-data: 84 60 60 10 00 00 00 00
431 01:01:14.437528 Skip loading cached calibration data
432 01:01:14.444629 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
433 01:01:14.447129 in-header: 03 a1 00 00 08 00 00 00
434 01:01:14.450502 in-data: 84 60 60 10 00 00 00 00
435 01:01:14.457250 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
436 01:01:14.460410 in-header: 03 a1 00 00 08 00 00 00
437 01:01:14.463922 in-data: 84 60 60 10 00 00 00 00
438 01:01:14.467065 ADC[3]: Raw value=214183 ID=1
439 01:01:14.467481 Manufacturer: ef
440 01:01:14.473936 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
441 01:01:14.476779 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
442 01:01:14.480162 CBFS @ 21000 size 3d4000
443 01:01:14.487480 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
444 01:01:14.490496 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
445 01:01:14.493716 CBFS: Found @ offset 3c700 size 44
446 01:01:14.496835 DRAM-K: Full Calibration
447 01:01:14.500460 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
448 01:01:14.503389 CBFS @ 21000 size 3d4000
449 01:01:14.507224 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
450 01:01:14.509831 CBFS: Locating 'fallback/dram'
451 01:01:14.513195 CBFS: Found @ offset 24b00 size 12268
452 01:01:14.541806 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
453 01:01:14.545248 ddr_geometry: 1, config: 0x0
454 01:01:14.548531 header.status = 0x0
455 01:01:14.551648 header.magic = 0x44524d4b (expected: 0x44524d4b)
456 01:01:14.555496 header.version = 0x5 (expected: 0x5)
457 01:01:14.558553 header.size = 0x8f0 (expected: 0x8f0)
458 01:01:14.558678 header.config = 0x0
459 01:01:14.561796 header.flags = 0x0
460 01:01:14.565107 header.checksum = 0x0
461 01:01:14.571323 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
462 01:01:14.574992 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
463 01:01:14.581307 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
464 01:01:14.581413 ddr_geometry:1
465 01:01:14.584339 [EMI] new MDL number = 1
466 01:01:14.584417 dram_cbt_mode_extern: 0
467 01:01:14.588138 dram_cbt_mode [RK0]: 0, [RK1]: 0
468 01:01:14.594346 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
469 01:01:14.594424
470 01:01:14.594483
471 01:01:14.598207 [Bianco] ETT version 0.0.0.1
472 01:01:14.601035 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
473 01:01:14.601112
474 01:01:14.604832 vSetVcoreByFreq with vcore:762500, freq=1600
475 01:01:14.604909
476 01:01:14.607407 [DramcInit]
477 01:01:14.611380 AutoRefreshCKEOff AutoREF OFF
478 01:01:14.611457 DDRPhyPLLSetting-CKEOFF
479 01:01:14.614235 DDRPhyPLLSetting-CKEON
480 01:01:14.614310
481 01:01:14.614370 Enable WDQS
482 01:01:14.619389 [ModeRegInit_LP4] CH0 RK0
483 01:01:14.622461 Write Rank0 MR13 =0x18
484 01:01:14.622539 Write Rank0 MR12 =0x5d
485 01:01:14.625722 Write Rank0 MR1 =0x56
486 01:01:14.629228 Write Rank0 MR2 =0x1a
487 01:01:14.629305 Write Rank0 MR11 =0x0
488 01:01:14.631978 Write Rank0 MR22 =0x38
489 01:01:14.635297 Write Rank0 MR14 =0x5d
490 01:01:14.635374 Write Rank0 MR3 =0x30
491 01:01:14.639239 Write Rank0 MR13 =0x58
492 01:01:14.639316 Write Rank0 MR12 =0x5d
493 01:01:14.642210 Write Rank0 MR1 =0x56
494 01:01:14.645450 Write Rank0 MR2 =0x2d
495 01:01:14.645557 Write Rank0 MR11 =0x23
496 01:01:14.649156 Write Rank0 MR22 =0x34
497 01:01:14.649234 Write Rank0 MR14 =0x10
498 01:01:14.651971 Write Rank0 MR3 =0x30
499 01:01:14.655649 Write Rank0 MR13 =0xd8
500 01:01:14.655727 [ModeRegInit_LP4] CH0 RK1
501 01:01:14.658767 Write Rank1 MR13 =0x18
502 01:01:14.661971 Write Rank1 MR12 =0x5d
503 01:01:14.662049 Write Rank1 MR1 =0x56
504 01:01:14.665174 Write Rank1 MR2 =0x1a
505 01:01:14.665255 Write Rank1 MR11 =0x0
506 01:01:14.668299 Write Rank1 MR22 =0x38
507 01:01:14.671730 Write Rank1 MR14 =0x5d
508 01:01:14.671808 Write Rank1 MR3 =0x30
509 01:01:14.675180 Write Rank1 MR13 =0x58
510 01:01:14.678532 Write Rank1 MR12 =0x5d
511 01:01:14.678611 Write Rank1 MR1 =0x56
512 01:01:14.681770 Write Rank1 MR2 =0x2d
513 01:01:14.681847 Write Rank1 MR11 =0x23
514 01:01:14.684966 Write Rank1 MR22 =0x34
515 01:01:14.688141 Write Rank1 MR14 =0x10
516 01:01:14.688219 Write Rank1 MR3 =0x30
517 01:01:14.691404 Write Rank1 MR13 =0xd8
518 01:01:14.694607 [ModeRegInit_LP4] CH1 RK0
519 01:01:14.694685 Write Rank0 MR13 =0x18
520 01:01:14.698487 Write Rank0 MR12 =0x5d
521 01:01:14.698564 Write Rank0 MR1 =0x56
522 01:01:14.701632 Write Rank0 MR2 =0x1a
523 01:01:14.704750 Write Rank0 MR11 =0x0
524 01:01:14.704829 Write Rank0 MR22 =0x38
525 01:01:14.708253 Write Rank0 MR14 =0x5d
526 01:01:14.708354 Write Rank0 MR3 =0x30
527 01:01:14.711759 Write Rank0 MR13 =0x58
528 01:01:14.714928 Write Rank0 MR12 =0x5d
529 01:01:14.715005 Write Rank0 MR1 =0x56
530 01:01:14.718130 Write Rank0 MR2 =0x2d
531 01:01:14.721534 Write Rank0 MR11 =0x23
532 01:01:14.721660 Write Rank0 MR22 =0x34
533 01:01:14.724381 Write Rank0 MR14 =0x10
534 01:01:14.724458 Write Rank0 MR3 =0x30
535 01:01:14.728109 Write Rank0 MR13 =0xd8
536 01:01:14.731352 [ModeRegInit_LP4] CH1 RK1
537 01:01:14.731431 Write Rank1 MR13 =0x18
538 01:01:14.734606 Write Rank1 MR12 =0x5d
539 01:01:14.737969 Write Rank1 MR1 =0x56
540 01:01:14.738046 Write Rank1 MR2 =0x1a
541 01:01:14.741307 Write Rank1 MR11 =0x0
542 01:01:14.741385 Write Rank1 MR22 =0x38
543 01:01:14.744470 Write Rank1 MR14 =0x5d
544 01:01:14.747534 Write Rank1 MR3 =0x30
545 01:01:14.747611 Write Rank1 MR13 =0x58
546 01:01:14.750753 Write Rank1 MR12 =0x5d
547 01:01:14.754268 Write Rank1 MR1 =0x56
548 01:01:14.754346 Write Rank1 MR2 =0x2d
549 01:01:14.758033 Write Rank1 MR11 =0x23
550 01:01:14.758111 Write Rank1 MR22 =0x34
551 01:01:14.760971 Write Rank1 MR14 =0x10
552 01:01:14.764094 Write Rank1 MR3 =0x30
553 01:01:14.764182 Write Rank1 MR13 =0xd8
554 01:01:14.767449 match AC timing 3
555 01:01:14.777196 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
556 01:01:14.777284 [MiockJmeterHQA]
557 01:01:14.780432 vSetVcoreByFreq with vcore:762500, freq=1600
558 01:01:14.888102
559 01:01:14.888226 MIOCK jitter meter ch=0
560 01:01:14.888287
561 01:01:14.891530 1T = (103-19) = 84 dly cells
562 01:01:14.898039 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 744/100 ps
563 01:01:14.901099 vSetVcoreByFreq with vcore:725000, freq=1200
564 01:01:15.001409
565 01:01:15.001524 MIOCK jitter meter ch=0
566 01:01:15.001654
567 01:01:15.004624 1T = (97-19) = 78 dly cells
568 01:01:15.009099 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
569 01:01:15.013095 vSetVcoreByFreq with vcore:725000, freq=800
570 01:01:15.114983
571 01:01:15.115102 MIOCK jitter meter ch=0
572 01:01:15.115164
573 01:01:15.118448 1T = (97-19) = 78 dly cells
574 01:01:15.124695 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
575 01:01:15.127980 vSetVcoreByFreq with vcore:762500, freq=1600
576 01:01:15.131159 vSetVcoreByFreq with vcore:762500, freq=1600
577 01:01:15.131237
578 01:01:15.131297 K DRVP
579 01:01:15.134755 1. OCD DRVP=0 CALOUT=0
580 01:01:15.138228 1. OCD DRVP=1 CALOUT=0
581 01:01:15.138307 1. OCD DRVP=2 CALOUT=0
582 01:01:15.141498 1. OCD DRVP=3 CALOUT=0
583 01:01:15.144850 1. OCD DRVP=4 CALOUT=0
584 01:01:15.144928 1. OCD DRVP=5 CALOUT=0
585 01:01:15.148106 1. OCD DRVP=6 CALOUT=0
586 01:01:15.148184 1. OCD DRVP=7 CALOUT=0
587 01:01:15.150847 1. OCD DRVP=8 CALOUT=1
588 01:01:15.150925
589 01:01:15.154106 1. OCD DRVP calibration OK! DRVP=8
590 01:01:15.154184
591 01:01:15.154244
592 01:01:15.154298
593 01:01:15.154349 K ODTN
594 01:01:15.157412 3. OCD ODTN=0 ,CALOUT=1
595 01:01:15.160751 3. OCD ODTN=1 ,CALOUT=1
596 01:01:15.160830 3. OCD ODTN=2 ,CALOUT=1
597 01:01:15.164087 3. OCD ODTN=3 ,CALOUT=1
598 01:01:15.167899 3. OCD ODTN=4 ,CALOUT=1
599 01:01:15.167978 3. OCD ODTN=5 ,CALOUT=1
600 01:01:15.171221 3. OCD ODTN=6 ,CALOUT=1
601 01:01:15.174602 3. OCD ODTN=7 ,CALOUT=0
602 01:01:15.174681
603 01:01:15.177722 3. OCD ODTN calibration OK! ODTN=7
604 01:01:15.177801
605 01:01:15.181111 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
606 01:01:15.184319 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
607 01:01:15.190916 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
608 01:01:15.190994
609 01:01:15.191054 K DRVP
610 01:01:15.191109 1. OCD DRVP=0 CALOUT=0
611 01:01:15.194110 1. OCD DRVP=1 CALOUT=0
612 01:01:15.197161 1. OCD DRVP=2 CALOUT=0
613 01:01:15.197239 1. OCD DRVP=3 CALOUT=0
614 01:01:15.200784 1. OCD DRVP=4 CALOUT=0
615 01:01:15.203667 1. OCD DRVP=5 CALOUT=0
616 01:01:15.203745 1. OCD DRVP=6 CALOUT=0
617 01:01:15.207261 1. OCD DRVP=7 CALOUT=0
618 01:01:15.207368 1. OCD DRVP=8 CALOUT=0
619 01:01:15.210354 1. OCD DRVP=9 CALOUT=1
620 01:01:15.210461
621 01:01:15.214165 1. OCD DRVP calibration OK! DRVP=9
622 01:01:15.214274
623 01:01:15.214365
624 01:01:15.214453
625 01:01:15.214543 K ODTN
626 01:01:15.216778 3. OCD ODTN=0 ,CALOUT=1
627 01:01:15.220873 3. OCD ODTN=1 ,CALOUT=1
628 01:01:15.220981 3. OCD ODTN=2 ,CALOUT=1
629 01:01:15.223919 3. OCD ODTN=3 ,CALOUT=1
630 01:01:15.227048 3. OCD ODTN=4 ,CALOUT=1
631 01:01:15.227154 3. OCD ODTN=5 ,CALOUT=1
632 01:01:15.230237 3. OCD ODTN=6 ,CALOUT=1
633 01:01:15.233459 3. OCD ODTN=7 ,CALOUT=1
634 01:01:15.233591 3. OCD ODTN=8 ,CALOUT=1
635 01:01:15.237026 3. OCD ODTN=9 ,CALOUT=1
636 01:01:15.240313 3. OCD ODTN=10 ,CALOUT=1
637 01:01:15.240420 3. OCD ODTN=11 ,CALOUT=1
638 01:01:15.243419 3. OCD ODTN=12 ,CALOUT=1
639 01:01:15.246901 3. OCD ODTN=13 ,CALOUT=0
640 01:01:15.247006
641 01:01:15.250442 3. OCD ODTN calibration OK! ODTN=13
642 01:01:15.250545
643 01:01:15.253255 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=13
644 01:01:15.257096 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=13
645 01:01:15.263679 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=13 (After Adjust)
646 01:01:15.263782
647 01:01:15.263868 [DramcInit]
648 01:01:15.266406 AutoRefreshCKEOff AutoREF OFF
649 01:01:15.266506 DDRPhyPLLSetting-CKEOFF
650 01:01:15.269796 DDRPhyPLLSetting-CKEON
651 01:01:15.269897
652 01:01:15.269986 Enable WDQS
653 01:01:15.273353 ==
654 01:01:15.277080 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
655 01:01:15.279772 fsp= 1, odt_onoff= 1, Byte mode= 0
656 01:01:15.279875 ==
657 01:01:15.283575 [Duty_Offset_Calibration]
658 01:01:15.283680
659 01:01:15.286788 ===========================
660 01:01:15.286895 B0:2 B1:2 CA:0
661 01:01:15.308829 ==
662 01:01:15.311535 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
663 01:01:15.314832 fsp= 1, odt_onoff= 1, Byte mode= 0
664 01:01:15.314935 ==
665 01:01:15.318337 [Duty_Offset_Calibration]
666 01:01:15.318437
667 01:01:15.321502 ===========================
668 01:01:15.321643 B0:0 B1:0 CA:-1
669 01:01:15.353897 [ModeRegInit_LP4] CH0 RK0
670 01:01:15.357125 Write Rank0 MR13 =0x18
671 01:01:15.357232 Write Rank0 MR12 =0x5d
672 01:01:15.360827 Write Rank0 MR1 =0x56
673 01:01:15.364222 Write Rank0 MR2 =0x1a
674 01:01:15.364325 Write Rank0 MR11 =0x0
675 01:01:15.367167 Write Rank0 MR22 =0x38
676 01:01:15.367271 Write Rank0 MR14 =0x5d
677 01:01:15.370761 Write Rank0 MR3 =0x30
678 01:01:15.374083 Write Rank0 MR13 =0x58
679 01:01:15.374185 Write Rank0 MR12 =0x5d
680 01:01:15.376979 Write Rank0 MR1 =0x56
681 01:01:15.380309 Write Rank0 MR2 =0x2d
682 01:01:15.380419 Write Rank0 MR11 =0x23
683 01:01:15.383590 Write Rank0 MR22 =0x34
684 01:01:15.383696 Write Rank0 MR14 =0x10
685 01:01:15.387064 Write Rank0 MR3 =0x30
686 01:01:15.390937 Write Rank0 MR13 =0xd8
687 01:01:15.391042 [ModeRegInit_LP4] CH0 RK1
688 01:01:15.393470 Write Rank1 MR13 =0x18
689 01:01:15.396821 Write Rank1 MR12 =0x5d
690 01:01:15.396923 Write Rank1 MR1 =0x56
691 01:01:15.400180 Write Rank1 MR2 =0x1a
692 01:01:15.400283 Write Rank1 MR11 =0x0
693 01:01:15.403666 Write Rank1 MR22 =0x38
694 01:01:15.406821 Write Rank1 MR14 =0x5d
695 01:01:15.406924 Write Rank1 MR3 =0x30
696 01:01:15.410299 Write Rank1 MR13 =0x58
697 01:01:15.413415 Write Rank1 MR12 =0x5d
698 01:01:15.413515 Write Rank1 MR1 =0x56
699 01:01:15.416699 Write Rank1 MR2 =0x2d
700 01:01:15.416797 Write Rank1 MR11 =0x23
701 01:01:15.420186 Write Rank1 MR22 =0x34
702 01:01:15.422815 Write Rank1 MR14 =0x10
703 01:01:15.422917 Write Rank1 MR3 =0x30
704 01:01:15.426541 Write Rank1 MR13 =0xd8
705 01:01:15.429762 [ModeRegInit_LP4] CH1 RK0
706 01:01:15.429865 Write Rank0 MR13 =0x18
707 01:01:15.432860 Write Rank0 MR12 =0x5d
708 01:01:15.432961 Write Rank0 MR1 =0x56
709 01:01:15.436619 Write Rank0 MR2 =0x1a
710 01:01:15.439667 Write Rank0 MR11 =0x0
711 01:01:15.439771 Write Rank0 MR22 =0x38
712 01:01:15.442534 Write Rank0 MR14 =0x5d
713 01:01:15.446020 Write Rank0 MR3 =0x30
714 01:01:15.446126 Write Rank0 MR13 =0x58
715 01:01:15.449796 Write Rank0 MR12 =0x5d
716 01:01:15.449906 Write Rank0 MR1 =0x56
717 01:01:15.452505 Write Rank0 MR2 =0x2d
718 01:01:15.456144 Write Rank0 MR11 =0x23
719 01:01:15.456250 Write Rank0 MR22 =0x34
720 01:01:15.459361 Write Rank0 MR14 =0x10
721 01:01:15.459465 Write Rank0 MR3 =0x30
722 01:01:15.462695 Write Rank0 MR13 =0xd8
723 01:01:15.465959 [ModeRegInit_LP4] CH1 RK1
724 01:01:15.466060 Write Rank1 MR13 =0x18
725 01:01:15.469311 Write Rank1 MR12 =0x5d
726 01:01:15.472385 Write Rank1 MR1 =0x56
727 01:01:15.472486 Write Rank1 MR2 =0x1a
728 01:01:15.475992 Write Rank1 MR11 =0x0
729 01:01:15.476094 Write Rank1 MR22 =0x38
730 01:01:15.478996 Write Rank1 MR14 =0x5d
731 01:01:15.482721 Write Rank1 MR3 =0x30
732 01:01:15.482824 Write Rank1 MR13 =0x58
733 01:01:15.485807 Write Rank1 MR12 =0x5d
734 01:01:15.489315 Write Rank1 MR1 =0x56
735 01:01:15.489419 Write Rank1 MR2 =0x2d
736 01:01:15.492153 Write Rank1 MR11 =0x23
737 01:01:15.492253 Write Rank1 MR22 =0x34
738 01:01:15.495537 Write Rank1 MR14 =0x10
739 01:01:15.498761 Write Rank1 MR3 =0x30
740 01:01:15.498862 Write Rank1 MR13 =0xd8
741 01:01:15.502682 match AC timing 3
742 01:01:15.512096 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
743 01:01:15.512202 DramC Write-DBI off
744 01:01:15.515441 DramC Read-DBI off
745 01:01:15.515539 Write Rank0 MR13 =0x59
746 01:01:15.515624 ==
747 01:01:15.522469 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
748 01:01:15.525167 fsp= 1, odt_onoff= 1, Byte mode= 0
749 01:01:15.525283 ==
750 01:01:15.528466 === u2Vref_new: 0x56 --> 0x2d
751 01:01:15.532591 === u2Vref_new: 0x58 --> 0x38
752 01:01:15.535452 === u2Vref_new: 0x5a --> 0x39
753 01:01:15.538785 === u2Vref_new: 0x5c --> 0x3c
754 01:01:15.542030 === u2Vref_new: 0x5e --> 0x3d
755 01:01:15.542130 === u2Vref_new: 0x60 --> 0xa0
756 01:01:15.545367 [CA 0] Center 34 (6~63) winsize 58
757 01:01:15.548536 [CA 1] Center 35 (8~63) winsize 56
758 01:01:15.552323 [CA 2] Center 30 (2~59) winsize 58
759 01:01:15.555574 [CA 3] Center 25 (-3~53) winsize 57
760 01:01:15.558697 [CA 4] Center 25 (-2~53) winsize 56
761 01:01:15.561786 [CA 5] Center 31 (2~60) winsize 59
762 01:01:15.561885
763 01:01:15.565390 [CATrainingPosCal] consider 1 rank data
764 01:01:15.568820 u2DelayCellTimex100 = 744/100 ps
765 01:01:15.572030 CA0 delay=34 (6~63),Diff = 9 PI (11 cell)
766 01:01:15.575259 CA1 delay=35 (8~63),Diff = 10 PI (13 cell)
767 01:01:15.581497 CA2 delay=30 (2~59),Diff = 5 PI (6 cell)
768 01:01:15.585458 CA3 delay=25 (-3~53),Diff = 0 PI (0 cell)
769 01:01:15.588170 CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)
770 01:01:15.591418 CA5 delay=31 (2~60),Diff = 6 PI (7 cell)
771 01:01:15.591496
772 01:01:15.594748 CA PerBit enable=1, Macro0, CA PI delay=25
773 01:01:15.597866 === u2Vref_new: 0x5e --> 0x3d
774 01:01:15.597942
775 01:01:15.601419 Vref(ca) range 1: 30
776 01:01:15.601496
777 01:01:15.601614 CS Dly= 8 (39-0-32)
778 01:01:15.605016 Write Rank0 MR13 =0xd8
779 01:01:15.605092 Write Rank0 MR13 =0xd8
780 01:01:15.607907 Write Rank0 MR12 =0x5e
781 01:01:15.611310 Write Rank1 MR13 =0x59
782 01:01:15.611387 ==
783 01:01:15.614582 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
784 01:01:15.617867 fsp= 1, odt_onoff= 1, Byte mode= 0
785 01:01:15.617944 ==
786 01:01:15.621595 === u2Vref_new: 0x56 --> 0x2d
787 01:01:15.624765 === u2Vref_new: 0x58 --> 0x38
788 01:01:15.628132 === u2Vref_new: 0x5a --> 0x39
789 01:01:15.631421 === u2Vref_new: 0x5c --> 0x3c
790 01:01:15.634838 === u2Vref_new: 0x5e --> 0x3d
791 01:01:15.637507 === u2Vref_new: 0x60 --> 0xa0
792 01:01:15.641409 [CA 0] Center 35 (8~63) winsize 56
793 01:01:15.644490 [CA 1] Center 35 (8~63) winsize 56
794 01:01:15.647926 [CA 2] Center 31 (2~60) winsize 59
795 01:01:15.651103 [CA 3] Center 26 (-2~54) winsize 57
796 01:01:15.654255 [CA 4] Center 26 (-2~55) winsize 58
797 01:01:15.657520 [CA 5] Center 32 (3~61) winsize 59
798 01:01:15.657642
799 01:01:15.660757 [CATrainingPosCal] consider 2 rank data
800 01:01:15.664192 u2DelayCellTimex100 = 744/100 ps
801 01:01:15.667514 CA0 delay=35 (8~63),Diff = 10 PI (13 cell)
802 01:01:15.670888 CA1 delay=35 (8~63),Diff = 10 PI (13 cell)
803 01:01:15.674218 CA2 delay=30 (2~59),Diff = 5 PI (6 cell)
804 01:01:15.677323 CA3 delay=25 (-2~53),Diff = 0 PI (0 cell)
805 01:01:15.680834 CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)
806 01:01:15.684166 CA5 delay=31 (3~60),Diff = 6 PI (7 cell)
807 01:01:15.684243
808 01:01:15.690464 CA PerBit enable=1, Macro0, CA PI delay=25
809 01:01:15.690541 === u2Vref_new: 0x60 --> 0xa0
810 01:01:15.690601
811 01:01:15.694088 Vref(ca) range 1: 32
812 01:01:15.694165
813 01:01:15.697155 CS Dly= 7 (38-0-32)
814 01:01:15.697260 Write Rank1 MR13 =0xd8
815 01:01:15.700603 Write Rank1 MR13 =0xd8
816 01:01:15.704151 Write Rank1 MR12 =0x60
817 01:01:15.707277 [RankSwap] Rank num 2, (Multi 1), Rank 0
818 01:01:15.707354 Write Rank0 MR2 =0xad
819 01:01:15.710582 [Write Leveling]
820 01:01:15.713823 delay byte0 byte1 byte2 byte3
821 01:01:15.713899
822 01:01:15.713958 10 0 0
823 01:01:15.714016 11 0 0
824 01:01:15.716982 12 0 0
825 01:01:15.717060 13 0 0
826 01:01:15.720322 14 0 0
827 01:01:15.720399 15 0 0
828 01:01:15.723855 16 0 0
829 01:01:15.723933 17 0 0
830 01:01:15.723993 18 0 0
831 01:01:15.726907 19 0 0
832 01:01:15.726984 20 0 0
833 01:01:15.730156 21 0 0
834 01:01:15.730258 22 0 ff
835 01:01:15.733315 23 0 ff
836 01:01:15.733392 24 0 ff
837 01:01:15.733453 25 0 ff
838 01:01:15.736794 26 0 ff
839 01:01:15.736871 27 0 ff
840 01:01:15.740117 28 0 ff
841 01:01:15.740223 29 0 ff
842 01:01:15.743474 30 0 ff
843 01:01:15.743576 31 ff ff
844 01:01:15.746872 32 ff ff
845 01:01:15.746978 33 ff ff
846 01:01:15.749921 34 ff ff
847 01:01:15.750025 35 ff ff
848 01:01:15.750119 36 ff ff
849 01:01:15.753507 37 ff ff
850 01:01:15.756841 pass bytecount = 0xff (0xff: all bytes pass)
851 01:01:15.756946
852 01:01:15.760026 DQS0 dly: 31
853 01:01:15.760125 DQS1 dly: 22
854 01:01:15.763208 Write Rank0 MR2 =0x2d
855 01:01:15.766588 [RankSwap] Rank num 2, (Multi 1), Rank 0
856 01:01:15.766692 Write Rank0 MR1 =0xd6
857 01:01:15.766782 [Gating]
858 01:01:15.769787 ==
859 01:01:15.773026 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
860 01:01:15.776482 fsp= 1, odt_onoff= 1, Byte mode= 0
861 01:01:15.776584 ==
862 01:01:15.779992 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
863 01:01:15.786584 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
864 01:01:15.789734 3 1 8 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
865 01:01:15.792986 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
866 01:01:15.799552 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
867 01:01:15.802828 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
868 01:01:15.806195 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
869 01:01:15.812736 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
870 01:01:15.815921 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
871 01:01:15.819100 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
872 01:01:15.825804 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
873 01:01:15.829145 3 2 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
874 01:01:15.832456 3 2 16 |c0c 1c1b |(11 11)(11 11) |(1 1)(0 0)| 0
875 01:01:15.839159 3 2 20 |3d3d 504 |(11 11)(11 11) |(1 1)(0 0)| 0
876 01:01:15.842385 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
877 01:01:15.845711 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
878 01:01:15.852615 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
879 01:01:15.855694 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
880 01:01:15.858867 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
881 01:01:15.865699 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
882 01:01:15.868808 3 3 16 |707 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
883 01:01:15.872107 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
884 01:01:15.875500 [Byte 0] Lead/lag Transition tap number (1)
885 01:01:15.882194 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
886 01:01:15.885485 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
887 01:01:15.888317 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
888 01:01:15.895447 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
889 01:01:15.898506 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
890 01:01:15.901850 3 4 12 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
891 01:01:15.908512 3 4 16 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
892 01:01:15.911845 3 4 20 |3d3d 1111 |(11 11)(11 11) |(1 1)(1 1)| 0
893 01:01:15.915247 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
894 01:01:15.921484 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
895 01:01:15.924613 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
896 01:01:15.927863 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
897 01:01:15.931474 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
898 01:01:15.937770 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
899 01:01:15.941498 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
900 01:01:15.944740 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
901 01:01:15.950812 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
902 01:01:15.954548 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
903 01:01:15.957562 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
904 01:01:15.964310 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
905 01:01:15.967702 [Byte 0] Lead/lag falling Transition (3, 6, 4)
906 01:01:15.970672 [Byte 1] Lead/lag falling Transition (3, 6, 4)
907 01:01:15.977474 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
908 01:01:15.980766 [Byte 0] Lead/lag Transition tap number (2)
909 01:01:15.984035 [Byte 1] Lead/lag Transition tap number (2)
910 01:01:15.987392 3 6 12 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
911 01:01:15.990976 3 6 16 |1616 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
912 01:01:15.997506 3 6 20 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
913 01:01:16.000918 [Byte 0]First pass (3, 6, 20)
914 01:01:16.004290 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
915 01:01:16.007226 [Byte 1]First pass (3, 6, 24)
916 01:01:16.010531 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
917 01:01:16.013808 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
918 01:01:16.017089 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
919 01:01:16.020455 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
920 01:01:16.027519 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
921 01:01:16.030449 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
922 01:01:16.034058 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
923 01:01:16.037454 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
924 01:01:16.040913 All bytes gating window > 1UI, Early break!
925 01:01:16.043941
926 01:01:16.046925 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 8)
927 01:01:16.047002
928 01:01:16.050185 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
929 01:01:16.050262
930 01:01:16.050321
931 01:01:16.050375
932 01:01:16.053855 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
933 01:01:16.053932
934 01:01:16.056846 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
935 01:01:16.056922
936 01:01:16.056981
937 01:01:16.060118 Write Rank0 MR1 =0x56
938 01:01:16.060194
939 01:01:16.063432 best RODT dly(2T, 0.5T) = (2, 3)
940 01:01:16.063508
941 01:01:16.066577 best RODT dly(2T, 0.5T) = (2, 3)
942 01:01:16.066654 ==
943 01:01:16.069938 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
944 01:01:16.073402 fsp= 1, odt_onoff= 1, Byte mode= 0
945 01:01:16.073479 ==
946 01:01:16.079905 Start DQ dly to find pass range UseTestEngine =0
947 01:01:16.083456 x-axis: bit #, y-axis: DQ dly (-127~63)
948 01:01:16.083535 RX Vref Scan = 0
949 01:01:16.086539 -26, [0] xxxxxxxx xxxxxxxx [MSB]
950 01:01:16.089562 -25, [0] xxxxxxxx xxxxxxxx [MSB]
951 01:01:16.093180 -24, [0] xxxxxxxx xxxxxxxx [MSB]
952 01:01:16.096210 -23, [0] xxxxxxxx xxxxxxxx [MSB]
953 01:01:16.099619 -22, [0] xxxxxxxx xxxxxxxx [MSB]
954 01:01:16.103008 -21, [0] xxxxxxxx xxxxxxxx [MSB]
955 01:01:16.106237 -20, [0] xxxxxxxx xxxxxxxx [MSB]
956 01:01:16.106315 -19, [0] xxxxxxxx xxxxxxxx [MSB]
957 01:01:16.109697 -18, [0] xxxxxxxx xxxxxxxx [MSB]
958 01:01:16.112934 -17, [0] xxxxxxxx xxxxxxxx [MSB]
959 01:01:16.116073 -16, [0] xxxxxxxx xxxxxxxx [MSB]
960 01:01:16.119811 -15, [0] xxxxxxxx xxxxxxxx [MSB]
961 01:01:16.123205 -14, [0] xxxxxxxx xxxxxxxx [MSB]
962 01:01:16.126353 -13, [0] xxxxxxxx xxxxxxxx [MSB]
963 01:01:16.129837 -12, [0] xxxxxxxx xxxxxxxx [MSB]
964 01:01:16.129916 -11, [0] xxxxxxxx xxxxxxxx [MSB]
965 01:01:16.133124 -10, [0] xxxxxxxx xxxxxxxx [MSB]
966 01:01:16.136481 -9, [0] xxxxxxxx xxxxxxxx [MSB]
967 01:01:16.139577 -8, [0] xxxxxxxx xxxxxxxx [MSB]
968 01:01:16.142697 -7, [0] xxxxxxxx xxxxxxxx [MSB]
969 01:01:16.146057 -6, [0] xxxxxxxx xxxxxxxx [MSB]
970 01:01:16.149217 -5, [0] xxxxxxxx xxxxxxxx [MSB]
971 01:01:16.153065 -4, [0] xxxoxxxx xxxxxxxx [MSB]
972 01:01:16.153143 -3, [0] xxxoxxxx xxxxxxxx [MSB]
973 01:01:16.156316 -2, [0] xxxoxxxx oxxxxxxx [MSB]
974 01:01:16.159628 -1, [0] xxxoxxxx oxxxxxxx [MSB]
975 01:01:16.162842 0, [0] xxxoxxxx ooxoxxxx [MSB]
976 01:01:16.165787 1, [0] xxxoxoxx ooxooxxx [MSB]
977 01:01:16.169239 2, [0] xxxoxoox ooxooxxx [MSB]
978 01:01:16.169317 3, [0] xxxoxoox ooxoooxx [MSB]
979 01:01:16.172736 4, [0] xxxoxooo ooxoooox [MSB]
980 01:01:16.175728 5, [0] xoxooooo ooxooooo [MSB]
981 01:01:16.179282 6, [0] xoxooooo ooxooooo [MSB]
982 01:01:16.182644 7, [0] oooooooo ooxooooo [MSB]
983 01:01:16.185808 8, [0] oooooooo ooxooooo [MSB]
984 01:01:16.189129 32, [0] oooxoooo oooooooo [MSB]
985 01:01:16.189207 33, [0] oooxoxoo oooooooo [MSB]
986 01:01:16.192320 34, [0] oooxoxoo oooooooo [MSB]
987 01:01:16.195874 35, [0] oooxoxoo xooooooo [MSB]
988 01:01:16.198888 36, [0] oooxoxoo xxoxxooo [MSB]
989 01:01:16.202320 37, [0] oooxoxxo xxoxxxxo [MSB]
990 01:01:16.205808 38, [0] oooxoxxx xxoxxxxo [MSB]
991 01:01:16.208529 39, [0] xxoxoxxx xxoxxxxo [MSB]
992 01:01:16.208607 40, [0] xxoxoxxx xxoxxxxo [MSB]
993 01:01:16.212283 41, [0] xxxxxxxx xxoxxxxx [MSB]
994 01:01:16.215482 42, [0] xxxxxxxx xxoxxxxx [MSB]
995 01:01:16.218740 43, [0] xxxxxxxx xxxxxxxx [MSB]
996 01:01:16.222217 iDelay=43, Bit 0, Center 22 (7 ~ 38) 32
997 01:01:16.225362 iDelay=43, Bit 1, Center 21 (5 ~ 38) 34
998 01:01:16.228703 iDelay=43, Bit 2, Center 23 (7 ~ 40) 34
999 01:01:16.231902 iDelay=43, Bit 3, Center 13 (-4 ~ 31) 36
1000 01:01:16.235274 iDelay=43, Bit 4, Center 22 (5 ~ 40) 36
1001 01:01:16.241842 iDelay=43, Bit 5, Center 16 (1 ~ 32) 32
1002 01:01:16.244947 iDelay=43, Bit 6, Center 19 (2 ~ 36) 35
1003 01:01:16.248093 iDelay=43, Bit 7, Center 20 (4 ~ 37) 34
1004 01:01:16.251254 iDelay=43, Bit 8, Center 16 (-2 ~ 34) 37
1005 01:01:16.255043 iDelay=43, Bit 9, Center 17 (0 ~ 35) 36
1006 01:01:16.257809 iDelay=43, Bit 10, Center 25 (9 ~ 42) 34
1007 01:01:16.261511 iDelay=43, Bit 11, Center 17 (0 ~ 35) 36
1008 01:01:16.264863 iDelay=43, Bit 12, Center 18 (1 ~ 35) 35
1009 01:01:16.268199 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
1010 01:01:16.271715 iDelay=43, Bit 14, Center 20 (4 ~ 36) 33
1011 01:01:16.274914 iDelay=43, Bit 15, Center 22 (5 ~ 40) 36
1012 01:01:16.277839 ==
1013 01:01:16.281389 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1014 01:01:16.284340 fsp= 1, odt_onoff= 1, Byte mode= 0
1015 01:01:16.284418 ==
1016 01:01:16.284478 DQS Delay:
1017 01:01:16.287840 DQS0 = 0, DQS1 = 0
1018 01:01:16.287917 DQM Delay:
1019 01:01:16.290910 DQM0 = 19, DQM1 = 19
1020 01:01:16.290987 DQ Delay:
1021 01:01:16.294605 DQ0 =22, DQ1 =21, DQ2 =23, DQ3 =13
1022 01:01:16.298145 DQ4 =22, DQ5 =16, DQ6 =19, DQ7 =20
1023 01:01:16.300837 DQ8 =16, DQ9 =17, DQ10 =25, DQ11 =17
1024 01:01:16.304064 DQ12 =18, DQ13 =19, DQ14 =20, DQ15 =22
1025 01:01:16.304141
1026 01:01:16.304199
1027 01:01:16.307246 DramC Write-DBI off
1028 01:01:16.307331 ==
1029 01:01:16.310871 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1030 01:01:16.314021 fsp= 1, odt_onoff= 1, Byte mode= 0
1031 01:01:16.314098 ==
1032 01:01:16.321268 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1033 01:01:16.321350
1034 01:01:16.321410 Begin, DQ Scan Range 918~1174
1035 01:01:16.323643
1036 01:01:16.323719
1037 01:01:16.323777 TX Vref Scan disable
1038 01:01:16.327273 918 |3 4 22|[0] xxxxxxxx xxxxxxxx [MSB]
1039 01:01:16.330776 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1040 01:01:16.333916 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1041 01:01:16.337003 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1042 01:01:16.340999 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1043 01:01:16.347496 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1044 01:01:16.350731 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1045 01:01:16.353853 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1046 01:01:16.357053 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1047 01:01:16.360479 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1048 01:01:16.363511 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1049 01:01:16.366773 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1050 01:01:16.370090 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1051 01:01:16.373389 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1052 01:01:16.376982 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1053 01:01:16.380045 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1054 01:01:16.383321 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1055 01:01:16.386818 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1056 01:01:16.393366 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1057 01:01:16.396615 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1058 01:01:16.399561 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1059 01:01:16.403225 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1060 01:01:16.406495 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1061 01:01:16.409986 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1062 01:01:16.413138 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1063 01:01:16.416322 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1064 01:01:16.419628 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1065 01:01:16.422991 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1066 01:01:16.426424 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1067 01:01:16.429507 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1068 01:01:16.432995 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1069 01:01:16.436111 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1070 01:01:16.442309 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1071 01:01:16.445674 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1072 01:01:16.448961 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1073 01:01:16.452476 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1074 01:01:16.455774 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1075 01:01:16.459055 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1076 01:01:16.462394 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1077 01:01:16.465510 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1078 01:01:16.468980 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1079 01:01:16.471911 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1080 01:01:16.475605 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1081 01:01:16.479007 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1082 01:01:16.481666 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1083 01:01:16.484929 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1084 01:01:16.488329 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1085 01:01:16.494931 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1086 01:01:16.498035 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1087 01:01:16.501886 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1088 01:01:16.504835 968 |3 6 8|[0] xxxxxxxx ooxoxxxx [MSB]
1089 01:01:16.508010 969 |3 6 9|[0] xxxxxxxx ooxooxox [MSB]
1090 01:01:16.511223 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1091 01:01:16.514442 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1092 01:01:16.518373 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1093 01:01:16.521870 973 |3 6 13|[0] xxxxxxxx ooxooooo [MSB]
1094 01:01:16.524724 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1095 01:01:16.528014 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1096 01:01:16.531355 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1097 01:01:16.534632 977 |3 6 17|[0] xxxoxoox oooooooo [MSB]
1098 01:01:16.538008 978 |3 6 18|[0] xoxooooo oooooooo [MSB]
1099 01:01:16.541246 979 |3 6 19|[0] xooooooo oooooooo [MSB]
1100 01:01:16.548581 985 |3 6 25|[0] oooooooo xooxoooo [MSB]
1101 01:01:16.551478 986 |3 6 26|[0] oooooooo xooxoooo [MSB]
1102 01:01:16.555238 987 |3 6 27|[0] oooooooo xooxoooo [MSB]
1103 01:01:16.558245 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1104 01:01:16.561555 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1105 01:01:16.564457 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1106 01:01:16.568147 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1107 01:01:16.571576 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1108 01:01:16.574864 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1109 01:01:16.577788 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1110 01:01:16.581282 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1111 01:01:16.584658 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1112 01:01:16.587853 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1113 01:01:16.591068 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1114 01:01:16.594536 Byte0, DQ PI dly=986, DQM PI dly= 986
1115 01:01:16.601146 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1116 01:01:16.601228
1117 01:01:16.604469 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1118 01:01:16.604547
1119 01:01:16.608078 Byte1, DQ PI dly=977, DQM PI dly= 977
1120 01:01:16.614424 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1121 01:01:16.614502
1122 01:01:16.617378 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1123 01:01:16.617456
1124 01:01:16.617515 ==
1125 01:01:16.624377 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1126 01:01:16.624456 fsp= 1, odt_onoff= 1, Byte mode= 0
1127 01:01:16.627810 ==
1128 01:01:16.630774 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1129 01:01:16.630852
1130 01:01:16.634312 Begin, DQ Scan Range 953~1017
1131 01:01:16.634422 Write Rank0 MR14 =0x0
1132 01:01:16.643894
1133 01:01:16.643976 CH=0, VrefRange= 0, VrefLevel = 0
1134 01:01:16.650515 TX Bit0 (983~995) 13 989, Bit8 (971~981) 11 976,
1135 01:01:16.653847 TX Bit1 (981~993) 13 987, Bit9 (972~982) 11 977,
1136 01:01:16.660550 TX Bit2 (982~994) 13 988, Bit10 (975~987) 13 981,
1137 01:01:16.663149 TX Bit3 (976~990) 15 983, Bit11 (971~981) 11 976,
1138 01:01:16.666542 TX Bit4 (982~991) 10 986, Bit12 (972~982) 11 977,
1139 01:01:16.672963 TX Bit5 (978~990) 13 984, Bit13 (973~982) 10 977,
1140 01:01:16.676809 TX Bit6 (979~991) 13 985, Bit14 (973~985) 13 979,
1141 01:01:16.682816 TX Bit7 (981~991) 11 986, Bit15 (974~988) 15 981,
1142 01:01:16.682899
1143 01:01:16.682959 Write Rank0 MR14 =0x2
1144 01:01:16.692305
1145 01:01:16.692389 CH=0, VrefRange= 0, VrefLevel = 2
1146 01:01:16.699203 TX Bit0 (982~996) 15 989, Bit8 (970~981) 12 975,
1147 01:01:16.702134 TX Bit1 (981~994) 14 987, Bit9 (972~983) 12 977,
1148 01:01:16.709128 TX Bit2 (982~995) 14 988, Bit10 (975~988) 14 981,
1149 01:01:16.712371 TX Bit3 (975~990) 16 982, Bit11 (971~981) 11 976,
1150 01:01:16.715676 TX Bit4 (980~992) 13 986, Bit12 (972~983) 12 977,
1151 01:01:16.722135 TX Bit5 (978~990) 13 984, Bit13 (973~982) 10 977,
1152 01:01:16.725441 TX Bit6 (978~992) 15 985, Bit14 (972~985) 14 978,
1153 01:01:16.728524 TX Bit7 (981~992) 12 986, Bit15 (974~989) 16 981,
1154 01:01:16.731893
1155 01:01:16.731997 Write Rank0 MR14 =0x4
1156 01:01:16.741366
1157 01:01:16.741466 CH=0, VrefRange= 0, VrefLevel = 4
1158 01:01:16.747553 TX Bit0 (982~997) 16 989, Bit8 (969~982) 14 975,
1159 01:01:16.751340 TX Bit1 (980~994) 15 987, Bit9 (971~983) 13 977,
1160 01:01:16.758091 TX Bit2 (981~996) 16 988, Bit10 (975~989) 15 982,
1161 01:01:16.761503 TX Bit3 (975~990) 16 982, Bit11 (970~982) 13 976,
1162 01:01:16.764073 TX Bit4 (980~992) 13 986, Bit12 (972~983) 12 977,
1163 01:01:16.770758 TX Bit5 (977~991) 15 984, Bit13 (972~983) 12 977,
1164 01:01:16.821926 TX Bit6 (978~992) 15 985, Bit14 (972~986) 15 979,
1165 01:01:16.822293 TX Bit7 (980~992) 13 986, Bit15 (974~989) 16 981,
1166 01:01:16.822391
1167 01:01:16.822478 Write Rank0 MR14 =0x6
1168 01:01:16.822562
1169 01:01:16.822646 CH=0, VrefRange= 0, VrefLevel = 6
1170 01:01:16.822731 TX Bit0 (982~998) 17 990, Bit8 (968~982) 15 975,
1171 01:01:16.822814 TX Bit1 (980~996) 17 988, Bit9 (971~984) 14 977,
1172 01:01:16.822896 TX Bit2 (981~997) 17 989, Bit10 (975~989) 15 982,
1173 01:01:16.822992 TX Bit3 (975~991) 17 983, Bit11 (970~982) 13 976,
1174 01:01:16.823274 TX Bit4 (979~993) 15 986, Bit12 (971~984) 14 977,
1175 01:01:16.823557 TX Bit5 (977~991) 15 984, Bit13 (972~983) 12 977,
1176 01:01:16.823651 TX Bit6 (977~993) 17 985, Bit14 (971~987) 17 979,
1177 01:01:16.829395 TX Bit7 (980~993) 14 986, Bit15 (973~990) 18 981,
1178 01:01:16.829498
1179 01:01:16.829627 Write Rank0 MR14 =0x8
1180 01:01:16.839075
1181 01:01:16.839183 CH=0, VrefRange= 0, VrefLevel = 8
1182 01:01:16.845470 TX Bit0 (982~998) 17 990, Bit8 (969~982) 14 975,
1183 01:01:16.848804 TX Bit1 (980~996) 17 988, Bit9 (971~984) 14 977,
1184 01:01:16.855720 TX Bit2 (981~997) 17 989, Bit10 (975~990) 16 982,
1185 01:01:16.858889 TX Bit3 (975~991) 17 983, Bit11 (969~983) 15 976,
1186 01:01:16.862212 TX Bit4 (979~994) 16 986, Bit12 (971~985) 15 978,
1187 01:01:16.868766 TX Bit5 (977~991) 15 984, Bit13 (971~984) 14 977,
1188 01:01:16.872059 TX Bit6 (977~994) 18 985, Bit14 (971~988) 18 979,
1189 01:01:16.878823 TX Bit7 (979~994) 16 986, Bit15 (974~990) 17 982,
1190 01:01:16.878933
1191 01:01:16.879026 Write Rank0 MR14 =0xa
1192 01:01:16.888347
1193 01:01:16.891440 CH=0, VrefRange= 0, VrefLevel = 10
1194 01:01:16.894713 TX Bit0 (981~998) 18 989, Bit8 (968~983) 16 975,
1195 01:01:16.898301 TX Bit1 (979~997) 19 988, Bit9 (970~984) 15 977,
1196 01:01:16.904573 TX Bit2 (981~998) 18 989, Bit10 (974~990) 17 982,
1197 01:01:16.908024 TX Bit3 (975~991) 17 983, Bit11 (969~983) 15 976,
1198 01:01:16.911322 TX Bit4 (978~994) 17 986, Bit12 (970~985) 16 977,
1199 01:01:16.918334 TX Bit5 (977~992) 16 984, Bit13 (970~984) 15 977,
1200 01:01:16.921255 TX Bit6 (977~994) 18 985, Bit14 (971~988) 18 979,
1201 01:01:16.927934 TX Bit7 (978~995) 18 986, Bit15 (974~990) 17 982,
1202 01:01:16.928012
1203 01:01:16.928072 Write Rank0 MR14 =0xc
1204 01:01:16.937868
1205 01:01:16.941061 CH=0, VrefRange= 0, VrefLevel = 12
1206 01:01:16.944329 TX Bit0 (981~999) 19 990, Bit8 (967~983) 17 975,
1207 01:01:16.947462 TX Bit1 (979~998) 20 988, Bit9 (969~986) 18 977,
1208 01:01:16.953830 TX Bit2 (981~998) 18 989, Bit10 (974~991) 18 982,
1209 01:01:16.957024 TX Bit3 (974~992) 19 983, Bit11 (969~984) 16 976,
1210 01:01:16.960318 TX Bit4 (978~996) 19 987, Bit12 (970~986) 17 978,
1211 01:01:16.967055 TX Bit5 (976~992) 17 984, Bit13 (970~985) 16 977,
1212 01:01:16.970692 TX Bit6 (977~995) 19 986, Bit14 (970~989) 20 979,
1213 01:01:16.976806 TX Bit7 (978~996) 19 987, Bit15 (973~991) 19 982,
1214 01:01:16.976884
1215 01:01:16.976944 Write Rank0 MR14 =0xe
1216 01:01:16.986539
1217 01:01:16.989829 CH=0, VrefRange= 0, VrefLevel = 14
1218 01:01:16.993127 TX Bit0 (980~999) 20 989, Bit8 (967~984) 18 975,
1219 01:01:16.997263 TX Bit1 (978~998) 21 988, Bit9 (969~987) 19 978,
1220 01:01:17.003651 TX Bit2 (979~999) 21 989, Bit10 (974~991) 18 982,
1221 01:01:17.006879 TX Bit3 (974~992) 19 983, Bit11 (968~984) 17 976,
1222 01:01:17.009785 TX Bit4 (978~997) 20 987, Bit12 (969~988) 20 978,
1223 01:01:17.016398 TX Bit5 (976~993) 18 984, Bit13 (970~986) 17 978,
1224 01:01:17.019883 TX Bit6 (976~996) 21 986, Bit14 (970~989) 20 979,
1225 01:01:17.026208 TX Bit7 (977~997) 21 987, Bit15 (972~992) 21 982,
1226 01:01:17.026310
1227 01:01:17.026401 Write Rank0 MR14 =0x10
1228 01:01:17.035983
1229 01:01:17.039668 CH=0, VrefRange= 0, VrefLevel = 16
1230 01:01:17.042684 TX Bit0 (980~999) 20 989, Bit8 (967~985) 19 976,
1231 01:01:17.046361 TX Bit1 (978~998) 21 988, Bit9 (969~987) 19 978,
1232 01:01:17.052817 TX Bit2 (978~999) 22 988, Bit10 (973~992) 20 982,
1233 01:01:17.056063 TX Bit3 (974~993) 20 983, Bit11 (968~985) 18 976,
1234 01:01:17.059182 TX Bit4 (978~997) 20 987, Bit12 (969~988) 20 978,
1235 01:01:17.066090 TX Bit5 (976~994) 19 985, Bit13 (969~987) 19 978,
1236 01:01:17.069183 TX Bit6 (976~996) 21 986, Bit14 (969~989) 21 979,
1237 01:01:17.075525 TX Bit7 (978~998) 21 988, Bit15 (972~992) 21 982,
1238 01:01:17.075631
1239 01:01:17.075722 Write Rank0 MR14 =0x12
1240 01:01:17.086047
1241 01:01:17.088802 CH=0, VrefRange= 0, VrefLevel = 18
1242 01:01:17.092093 TX Bit0 (979~1000) 22 989, Bit8 (967~986) 20 976,
1243 01:01:17.095426 TX Bit1 (978~999) 22 988, Bit9 (969~988) 20 978,
1244 01:01:17.101928 TX Bit2 (979~999) 21 989, Bit10 (973~992) 20 982,
1245 01:01:17.105358 TX Bit3 (974~993) 20 983, Bit11 (967~985) 19 976,
1246 01:01:17.108836 TX Bit4 (977~997) 21 987, Bit12 (968~989) 22 978,
1247 01:01:17.115073 TX Bit5 (976~994) 19 985, Bit13 (969~988) 20 978,
1248 01:01:17.118259 TX Bit6 (976~997) 22 986, Bit14 (969~989) 21 979,
1249 01:01:17.124835 TX Bit7 (977~998) 22 987, Bit15 (973~992) 20 982,
1250 01:01:17.124938
1251 01:01:17.125026 Write Rank0 MR14 =0x14
1252 01:01:17.135227
1253 01:01:17.138710 CH=0, VrefRange= 0, VrefLevel = 20
1254 01:01:17.141925 TX Bit0 (978~1000) 23 989, Bit8 (966~987) 22 976,
1255 01:01:17.145423 TX Bit1 (978~999) 22 988, Bit9 (967~988) 22 977,
1256 01:01:17.151930 TX Bit2 (978~999) 22 988, Bit10 (973~994) 22 983,
1257 01:01:17.155177 TX Bit3 (974~993) 20 983, Bit11 (967~986) 20 976,
1258 01:01:17.158093 TX Bit4 (977~998) 22 987, Bit12 (968~989) 22 978,
1259 01:01:17.164760 TX Bit5 (976~995) 20 985, Bit13 (969~988) 20 978,
1260 01:01:17.168080 TX Bit6 (976~998) 23 987, Bit14 (968~990) 23 979,
1261 01:01:17.174718 TX Bit7 (977~998) 22 987, Bit15 (971~993) 23 982,
1262 01:01:17.174819
1263 01:01:17.174906 Write Rank0 MR14 =0x16
1264 01:01:17.184950
1265 01:01:17.188244 CH=0, VrefRange= 0, VrefLevel = 22
1266 01:01:17.191821 TX Bit0 (978~1001) 24 989, Bit8 (966~986) 21 976,
1267 01:01:17.194630 TX Bit1 (977~999) 23 988, Bit9 (968~988) 21 978,
1268 01:01:17.201819 TX Bit2 (978~1000) 23 989, Bit10 (973~993) 21 983,
1269 01:01:17.204753 TX Bit3 (973~994) 22 983, Bit11 (966~988) 23 977,
1270 01:01:17.208047 TX Bit4 (977~999) 23 988, Bit12 (968~989) 22 978,
1271 01:01:17.214953 TX Bit5 (975~996) 22 985, Bit13 (968~989) 22 978,
1272 01:01:17.217550 TX Bit6 (976~998) 23 987, Bit14 (968~990) 23 979,
1273 01:01:17.224592 TX Bit7 (977~999) 23 988, Bit15 (971~993) 23 982,
1274 01:01:17.224671
1275 01:01:17.224731 Write Rank0 MR14 =0x18
1276 01:01:17.234732
1277 01:01:17.238561 CH=0, VrefRange= 0, VrefLevel = 24
1278 01:01:17.241805 TX Bit0 (978~1001) 24 989, Bit8 (966~988) 23 977,
1279 01:01:17.244517 TX Bit1 (977~1000) 24 988, Bit9 (967~989) 23 978,
1280 01:01:17.251120 TX Bit2 (977~1000) 24 988, Bit10 (972~994) 23 983,
1281 01:01:17.254491 TX Bit3 (973~995) 23 984, Bit11 (966~988) 23 977,
1282 01:01:17.257960 TX Bit4 (977~999) 23 988, Bit12 (967~990) 24 978,
1283 01:01:17.264394 TX Bit5 (975~997) 23 986, Bit13 (968~989) 22 978,
1284 01:01:17.268376 TX Bit6 (976~998) 23 987, Bit14 (968~991) 24 979,
1285 01:01:17.274419 TX Bit7 (977~999) 23 988, Bit15 (972~994) 23 983,
1286 01:01:17.274497
1287 01:01:17.274557 Write Rank0 MR14 =0x1a
1288 01:01:17.284845
1289 01:01:17.288046 CH=0, VrefRange= 0, VrefLevel = 26
1290 01:01:17.291399 TX Bit0 (978~1001) 24 989, Bit8 (966~988) 23 977,
1291 01:01:17.294737 TX Bit1 (977~1000) 24 988, Bit9 (967~989) 23 978,
1292 01:01:17.301316 TX Bit2 (977~1001) 25 989, Bit10 (972~995) 24 983,
1293 01:01:17.304929 TX Bit3 (973~995) 23 984, Bit11 (966~989) 24 977,
1294 01:01:17.307755 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1295 01:01:17.314297 TX Bit5 (975~997) 23 986, Bit13 (967~990) 24 978,
1296 01:01:17.317559 TX Bit6 (975~998) 24 986, Bit14 (967~991) 25 979,
1297 01:01:17.324081 TX Bit7 (977~999) 23 988, Bit15 (971~994) 24 982,
1298 01:01:17.324159
1299 01:01:17.324219 Write Rank0 MR14 =0x1c
1300 01:01:17.334799
1301 01:01:17.338502 CH=0, VrefRange= 0, VrefLevel = 28
1302 01:01:17.341507 TX Bit0 (978~1002) 25 990, Bit8 (965~989) 25 977,
1303 01:01:17.344750 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
1304 01:01:17.351433 TX Bit2 (977~1001) 25 989, Bit10 (972~996) 25 984,
1305 01:01:17.354806 TX Bit3 (972~996) 25 984, Bit11 (966~989) 24 977,
1306 01:01:17.361403 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1307 01:01:17.364671 TX Bit5 (975~997) 23 986, Bit13 (967~990) 24 978,
1308 01:01:17.368068 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1309 01:01:17.374410 TX Bit7 (976~1000) 25 988, Bit15 (969~994) 26 981,
1310 01:01:17.374488
1311 01:01:17.374548 Write Rank0 MR14 =0x1e
1312 01:01:17.385034
1313 01:01:17.388295 CH=0, VrefRange= 0, VrefLevel = 30
1314 01:01:17.391785 TX Bit0 (978~1002) 25 990, Bit8 (965~989) 25 977,
1315 01:01:17.394803 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
1316 01:01:17.401590 TX Bit2 (977~1001) 25 989, Bit10 (972~996) 25 984,
1317 01:01:17.405064 TX Bit3 (972~996) 25 984, Bit11 (966~989) 24 977,
1318 01:01:17.407920 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1319 01:01:17.414709 TX Bit5 (975~997) 23 986, Bit13 (967~990) 24 978,
1320 01:01:17.417989 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1321 01:01:17.424547 TX Bit7 (976~1000) 25 988, Bit15 (969~994) 26 981,
1322 01:01:17.424625
1323 01:01:17.424684 Write Rank0 MR14 =0x20
1324 01:01:17.434902
1325 01:01:17.438107 CH=0, VrefRange= 0, VrefLevel = 32
1326 01:01:17.441453 TX Bit0 (978~1002) 25 990, Bit8 (965~989) 25 977,
1327 01:01:17.444555 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
1328 01:01:17.451604 TX Bit2 (977~1001) 25 989, Bit10 (972~996) 25 984,
1329 01:01:17.454741 TX Bit3 (972~996) 25 984, Bit11 (966~989) 24 977,
1330 01:01:17.461403 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1331 01:01:17.464585 TX Bit5 (975~997) 23 986, Bit13 (967~990) 24 978,
1332 01:01:17.468049 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1333 01:01:17.474377 TX Bit7 (976~1000) 25 988, Bit15 (969~994) 26 981,
1334 01:01:17.474455
1335 01:01:17.474515 Write Rank0 MR14 =0x22
1336 01:01:17.485214
1337 01:01:17.488662 CH=0, VrefRange= 0, VrefLevel = 34
1338 01:01:17.491986 TX Bit0 (978~1002) 25 990, Bit8 (965~989) 25 977,
1339 01:01:17.495233 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
1340 01:01:17.501525 TX Bit2 (977~1001) 25 989, Bit10 (972~996) 25 984,
1341 01:01:17.504906 TX Bit3 (972~996) 25 984, Bit11 (966~989) 24 977,
1342 01:01:17.508110 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1343 01:01:17.514932 TX Bit5 (975~997) 23 986, Bit13 (967~990) 24 978,
1344 01:01:17.517909 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1345 01:01:17.524941 TX Bit7 (976~1000) 25 988, Bit15 (969~994) 26 981,
1346 01:01:17.525021
1347 01:01:17.528044 wait MRW command Rank0 MR14 =0x24 fired (1)
1348 01:01:17.528113 Write Rank0 MR14 =0x24
1349 01:01:17.538662
1350 01:01:17.541958 CH=0, VrefRange= 0, VrefLevel = 36
1351 01:01:17.545254 TX Bit0 (978~1002) 25 990, Bit8 (965~989) 25 977,
1352 01:01:17.548587 TX Bit1 (976~1000) 25 988, Bit9 (967~989) 23 978,
1353 01:01:17.555552 TX Bit2 (977~1001) 25 989, Bit10 (972~996) 25 984,
1354 01:01:17.558623 TX Bit3 (972~996) 25 984, Bit11 (966~989) 24 977,
1355 01:01:17.562117 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1356 01:01:17.568463 TX Bit5 (975~997) 23 986, Bit13 (967~990) 24 978,
1357 01:01:17.571910 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1358 01:01:17.578655 TX Bit7 (976~1000) 25 988, Bit15 (969~994) 26 981,
1359 01:01:17.578733
1360 01:01:17.578792
1361 01:01:17.582120 TX Vref found, early break! 360< 373
1362 01:01:17.584689 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
1363 01:01:17.588023 u1DelayCellOfst[0]=7 cells (6 PI)
1364 01:01:17.591467 u1DelayCellOfst[1]=5 cells (4 PI)
1365 01:01:17.595274 u1DelayCellOfst[2]=6 cells (5 PI)
1366 01:01:17.598564 u1DelayCellOfst[3]=0 cells (0 PI)
1367 01:01:17.601802 u1DelayCellOfst[4]=3 cells (3 PI)
1368 01:01:17.605051 u1DelayCellOfst[5]=2 cells (2 PI)
1369 01:01:17.607872 u1DelayCellOfst[6]=3 cells (3 PI)
1370 01:01:17.611596 u1DelayCellOfst[7]=5 cells (4 PI)
1371 01:01:17.614742 Byte0, DQ PI dly=984, DQM PI dly= 987
1372 01:01:17.618013 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1373 01:01:17.618092
1374 01:01:17.621124 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1375 01:01:17.621201
1376 01:01:17.624279 u1DelayCellOfst[8]=0 cells (0 PI)
1377 01:01:17.628048 u1DelayCellOfst[9]=1 cells (1 PI)
1378 01:01:17.631029 u1DelayCellOfst[10]=9 cells (7 PI)
1379 01:01:17.634383 u1DelayCellOfst[11]=0 cells (0 PI)
1380 01:01:17.638008 u1DelayCellOfst[12]=1 cells (1 PI)
1381 01:01:17.640908 u1DelayCellOfst[13]=1 cells (1 PI)
1382 01:01:17.644005 u1DelayCellOfst[14]=2 cells (2 PI)
1383 01:01:17.647325 u1DelayCellOfst[15]=5 cells (4 PI)
1384 01:01:17.650621 Byte1, DQ PI dly=977, DQM PI dly= 980
1385 01:01:17.654052 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1386 01:01:17.654130
1387 01:01:17.657475 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1388 01:01:17.657580
1389 01:01:17.660578 Write Rank0 MR14 =0x1c
1390 01:01:17.660654
1391 01:01:17.663767 Final TX Range 0 Vref 28
1392 01:01:17.663843
1393 01:01:17.670782 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1394 01:01:17.670859
1395 01:01:17.677251 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1396 01:01:17.683886 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1397 01:01:17.690403 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1398 01:01:17.693362 Write Rank0 MR3 =0xb0
1399 01:01:17.693462 DramC Write-DBI on
1400 01:01:17.693552 ==
1401 01:01:17.700478 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1402 01:01:17.703722 fsp= 1, odt_onoff= 1, Byte mode= 0
1403 01:01:17.703800 ==
1404 01:01:17.707257 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1405 01:01:17.707333
1406 01:01:17.710011 Begin, DQ Scan Range 700~764
1407 01:01:17.710087
1408 01:01:17.710145
1409 01:01:17.713278 TX Vref Scan disable
1410 01:01:17.716498 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1411 01:01:17.720324 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1412 01:01:17.723637 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1413 01:01:17.726883 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1414 01:01:17.730091 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1415 01:01:17.733422 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1416 01:01:17.736523 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1417 01:01:17.739797 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1418 01:01:17.742871 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1419 01:01:17.746318 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1420 01:01:17.749939 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1421 01:01:17.753068 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1422 01:01:17.756490 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1423 01:01:17.759827 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1424 01:01:17.766492 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1425 01:01:17.770011 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1426 01:01:17.772855 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1427 01:01:17.776025 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1428 01:01:17.779273 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1429 01:01:17.782686 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1430 01:01:17.789428 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1431 01:01:17.792985 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1432 01:01:17.796106 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1433 01:01:17.799458 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1434 01:01:17.802797 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1435 01:01:17.806037 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1436 01:01:17.809167 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1437 01:01:17.812573 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1438 01:01:17.815702 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1439 01:01:17.818752 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1440 01:01:17.822265 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1441 01:01:17.825456 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
1442 01:01:17.828720 Byte0, DQ PI dly=732, DQM PI dly= 732
1443 01:01:17.835576 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1444 01:01:17.835656
1445 01:01:17.838767 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1446 01:01:17.838846
1447 01:01:17.842225 Byte1, DQ PI dly=722, DQM PI dly= 722
1448 01:01:17.848462 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
1449 01:01:17.848540
1450 01:01:17.851700 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
1451 01:01:17.851777
1452 01:01:17.858543 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1453 01:01:17.865323 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1454 01:01:17.871944 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1455 01:01:17.874709 Write Rank0 MR3 =0x30
1456 01:01:17.874810 DramC Write-DBI off
1457 01:01:17.874896
1458 01:01:17.878548 [DATLAT]
1459 01:01:17.881468 Freq=1600, CH0 RK0, use_rxtx_scan=0
1460 01:01:17.881599
1461 01:01:17.881663 DATLAT Default: 0xf
1462 01:01:17.884946 7, 0xFFFF, sum=0
1463 01:01:17.885049 8, 0xFFFF, sum=0
1464 01:01:17.887805 9, 0xFFFF, sum=0
1465 01:01:17.887908 10, 0xFFFF, sum=0
1466 01:01:17.891394 11, 0xFFFF, sum=0
1467 01:01:17.891474 12, 0xFFFF, sum=0
1468 01:01:17.895006 13, 0xFFFF, sum=0
1469 01:01:17.895084 14, 0x0, sum=1
1470 01:01:17.895145 15, 0x0, sum=2
1471 01:01:17.898485 16, 0x0, sum=3
1472 01:01:17.898560 17, 0x0, sum=4
1473 01:01:17.904252 pattern=2 first_step=14 total pass=5 best_step=16
1474 01:01:17.904351 ==
1475 01:01:17.908411 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1476 01:01:17.911370 fsp= 1, odt_onoff= 1, Byte mode= 0
1477 01:01:17.911472 ==
1478 01:01:17.914778 Start DQ dly to find pass range UseTestEngine =1
1479 01:01:17.920810 x-axis: bit #, y-axis: DQ dly (-127~63)
1480 01:01:17.920890 RX Vref Scan = 1
1481 01:01:18.036389
1482 01:01:18.036522 RX Vref found, early break!
1483 01:01:18.036583
1484 01:01:18.042865 Final RX Vref 11, apply to both rank0 and 1
1485 01:01:18.042944 ==
1486 01:01:18.046135 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1487 01:01:18.049433 fsp= 1, odt_onoff= 1, Byte mode= 0
1488 01:01:18.049510 ==
1489 01:01:18.049581 DQS Delay:
1490 01:01:18.052828 DQS0 = 0, DQS1 = 0
1491 01:01:18.052906 DQM Delay:
1492 01:01:18.055893 DQM0 = 19, DQM1 = 19
1493 01:01:18.055970 DQ Delay:
1494 01:01:18.059267 DQ0 =23, DQ1 =22, DQ2 =23, DQ3 =15
1495 01:01:18.062610 DQ4 =21, DQ5 =16, DQ6 =19, DQ7 =20
1496 01:01:18.065801 DQ8 =16, DQ9 =17, DQ10 =25, DQ11 =16
1497 01:01:18.069115 DQ12 =19, DQ13 =18, DQ14 =19, DQ15 =22
1498 01:01:18.069192
1499 01:01:18.069251
1500 01:01:18.069306
1501 01:01:18.072227 [DramC_TX_OE_Calibration] TA2
1502 01:01:18.076045 Original DQ_B0 (3 6) =30, OEN = 27
1503 01:01:18.078858 Original DQ_B1 (3 6) =30, OEN = 27
1504 01:01:18.081955 23, 0x0, End_B0=23 End_B1=23
1505 01:01:18.082084 24, 0x0, End_B0=24 End_B1=24
1506 01:01:18.085440 25, 0x0, End_B0=25 End_B1=25
1507 01:01:18.088952 26, 0x0, End_B0=26 End_B1=26
1508 01:01:18.092300 27, 0x0, End_B0=27 End_B1=27
1509 01:01:18.095358 28, 0x0, End_B0=28 End_B1=28
1510 01:01:18.095437 29, 0x0, End_B0=29 End_B1=29
1511 01:01:18.098606 30, 0x0, End_B0=30 End_B1=30
1512 01:01:18.101988 31, 0xFFFF, End_B0=30 End_B1=30
1513 01:01:18.108336 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1514 01:01:18.111829 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1515 01:01:18.111908
1516 01:01:18.115119
1517 01:01:18.115196 Write Rank0 MR23 =0x3f
1518 01:01:18.115256 [DQSOSC]
1519 01:01:18.125249 [DQSOSCAuto] RK0, (LSB)MR18= 0xaeae, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps
1520 01:01:18.131695 CH0_RK0: MR19=0x202, MR18=0xAEAE, DQSOSC=459, MR23=63, INC=11, DEC=17
1521 01:01:18.131775 Write Rank0 MR23 =0x3f
1522 01:01:18.135045 [DQSOSC]
1523 01:01:18.141678 [DQSOSCAuto] RK0, (LSB)MR18= 0xadad, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps
1524 01:01:18.145093 CH0 RK0: MR19=202, MR18=ADAD
1525 01:01:18.148175 [RankSwap] Rank num 2, (Multi 1), Rank 1
1526 01:01:18.151443 Write Rank0 MR2 =0xad
1527 01:01:18.151520 [Write Leveling]
1528 01:01:18.154861 delay byte0 byte1 byte2 byte3
1529 01:01:18.154938
1530 01:01:18.154998 10 0 0
1531 01:01:18.158045 11 0 0
1532 01:01:18.158123 12 0 0
1533 01:01:18.161499 13 0 0
1534 01:01:18.161596 14 0 0
1535 01:01:18.164693 15 0 0
1536 01:01:18.164771 16 0 0
1537 01:01:18.164832 17 0 0
1538 01:01:18.167515 18 0 0
1539 01:01:18.167594 19 0 0
1540 01:01:18.170715 20 0 0
1541 01:01:18.170794 21 0 0
1542 01:01:18.174043 22 0 0
1543 01:01:18.174146 23 0 ff
1544 01:01:18.174218 24 0 ff
1545 01:01:18.177249 25 0 ff
1546 01:01:18.177327 26 0 ff
1547 01:01:18.181101 27 0 ff
1548 01:01:18.181179 28 0 ff
1549 01:01:18.184410 29 0 ff
1550 01:01:18.184490 30 0 ff
1551 01:01:18.187485 31 ff ff
1552 01:01:18.187588 32 ff ff
1553 01:01:18.187674 33 ff ff
1554 01:01:18.191010 34 ff ff
1555 01:01:18.191089 35 ff ff
1556 01:01:18.194301 36 ff ff
1557 01:01:18.194380 37 ff ff
1558 01:01:18.200814 pass bytecount = 0xff (0xff: all bytes pass)
1559 01:01:18.200892
1560 01:01:18.200953 DQS0 dly: 31
1561 01:01:18.201008 DQS1 dly: 23
1562 01:01:18.204191 Write Rank0 MR2 =0x2d
1563 01:01:18.207593 [RankSwap] Rank num 2, (Multi 1), Rank 0
1564 01:01:18.210813 Write Rank1 MR1 =0xd6
1565 01:01:18.210890 [Gating]
1566 01:01:18.210951 ==
1567 01:01:18.213776 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1568 01:01:18.217348 fsp= 1, odt_onoff= 1, Byte mode= 0
1569 01:01:18.220931 ==
1570 01:01:18.223731 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1571 01:01:18.227084 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1572 01:01:18.230507 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1573 01:01:18.237176 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1574 01:01:18.240611 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1575 01:01:18.243889 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1576 01:01:18.250598 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1577 01:01:18.253778 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1578 01:01:18.257096 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1579 01:01:18.263528 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1580 01:01:18.266816 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
1581 01:01:18.270239 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
1582 01:01:18.277249 3 2 16 |504 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1583 01:01:18.280458 3 2 20 |3d3d 404 |(11 11)(11 11) |(1 1)(0 0)| 0
1584 01:01:18.283686 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1585 01:01:18.290178 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1586 01:01:18.293496 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1587 01:01:18.296812 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1588 01:01:18.303171 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1589 01:01:18.306446 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1590 01:01:18.309880 3 3 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1591 01:01:18.316500 3 3 20 |1010 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1592 01:01:18.319956 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1593 01:01:18.323098 [Byte 0] Lead/lag Transition tap number (1)
1594 01:01:18.326274 [Byte 1] Lead/lag falling Transition (3, 3, 24)
1595 01:01:18.332836 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1596 01:01:18.335994 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1597 01:01:18.339566 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1598 01:01:18.345751 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1599 01:01:18.349331 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1600 01:01:18.352528 3 4 16 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1601 01:01:18.359025 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1602 01:01:18.362645 3 4 24 |3d3d c0c |(11 11)(11 11) |(1 1)(1 1)| 0
1603 01:01:18.365784 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1604 01:01:18.368920 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1605 01:01:18.375598 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1606 01:01:18.379174 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1607 01:01:18.382107 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1608 01:01:18.389222 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1609 01:01:18.392389 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1610 01:01:18.395392 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1611 01:01:18.401933 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1612 01:01:18.405054 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1613 01:01:18.409055 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1614 01:01:18.415256 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1615 01:01:18.418705 [Byte 0] Lead/lag falling Transition (3, 6, 8)
1616 01:01:18.421840 [Byte 1] Lead/lag falling Transition (3, 6, 8)
1617 01:01:18.428381 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1618 01:01:18.431506 [Byte 0] Lead/lag Transition tap number (2)
1619 01:01:18.434829 3 6 16 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1620 01:01:18.438115 [Byte 1] Lead/lag Transition tap number (3)
1621 01:01:18.444552 3 6 20 |1010 2c2c |(11 11)(11 11) |(0 0)(0 0)| 0
1622 01:01:18.447855 3 6 24 |4646 2222 |(0 0)(11 11) |(0 0)(0 0)| 0
1623 01:01:18.451242 [Byte 0]First pass (3, 6, 24)
1624 01:01:18.454983 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1625 01:01:18.458158 [Byte 1]First pass (3, 6, 28)
1626 01:01:18.461479 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1627 01:01:18.464778 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1628 01:01:18.467946 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1629 01:01:18.474396 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1630 01:01:18.477789 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1631 01:01:18.480975 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1632 01:01:18.484484 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1633 01:01:18.487713 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1634 01:01:18.493898 All bytes gating window > 1UI, Early break!
1635 01:01:18.493976
1636 01:01:18.497543 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
1637 01:01:18.497659
1638 01:01:18.500754 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 14)
1639 01:01:18.500834
1640 01:01:18.500894
1641 01:01:18.500949
1642 01:01:18.503885 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
1643 01:01:18.503975
1644 01:01:18.507307 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
1645 01:01:18.510434
1646 01:01:18.510513
1647 01:01:18.510594 Write Rank1 MR1 =0x56
1648 01:01:18.510657
1649 01:01:18.514134 best RODT dly(2T, 0.5T) = (2, 3)
1650 01:01:18.514226
1651 01:01:18.517179 best RODT dly(2T, 0.5T) = (2, 3)
1652 01:01:18.517255 ==
1653 01:01:18.524100 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1654 01:01:18.527350 fsp= 1, odt_onoff= 1, Byte mode= 0
1655 01:01:18.527428 ==
1656 01:01:18.530084 Start DQ dly to find pass range UseTestEngine =0
1657 01:01:18.533459 x-axis: bit #, y-axis: DQ dly (-127~63)
1658 01:01:18.537254 RX Vref Scan = 0
1659 01:01:18.537331 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1660 01:01:18.539947 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1661 01:01:18.543656 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1662 01:01:18.546791 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1663 01:01:18.550020 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1664 01:01:18.553301 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1665 01:01:18.556584 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1666 01:01:18.559749 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1667 01:01:18.563584 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1668 01:01:18.563664 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1669 01:01:18.566827 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1670 01:01:18.570155 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1671 01:01:18.572787 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1672 01:01:18.576644 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1673 01:01:18.579770 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1674 01:01:18.583072 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1675 01:01:18.586402 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1676 01:01:18.589841 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1677 01:01:18.589920 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1678 01:01:18.593198 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1679 01:01:18.596231 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1680 01:01:18.599749 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1681 01:01:18.602756 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1682 01:01:18.605840 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1683 01:01:18.609790 -2, [0] xxxoxxxx xxxxxxxx [MSB]
1684 01:01:18.609869 -1, [0] xxxoxxxx xxxxxxxx [MSB]
1685 01:01:18.612834 0, [0] xxxoxoxx oxxoxxxx [MSB]
1686 01:01:18.615880 1, [0] xxxoxoox oxxoxxxx [MSB]
1687 01:01:18.619681 2, [0] xxxoxooo oxxoxxxx [MSB]
1688 01:01:18.622531 3, [0] xxxooooo ooxooxxx [MSB]
1689 01:01:18.626006 4, [0] xxxooooo ooxooxxx [MSB]
1690 01:01:18.626084 5, [0] oooooooo ooxoooox [MSB]
1691 01:01:18.629304 6, [0] oooooooo ooxoooox [MSB]
1692 01:01:18.632590 7, [0] oooooooo ooxooooo [MSB]
1693 01:01:18.635593 8, [0] oooooooo ooxooooo [MSB]
1694 01:01:18.639033 9, [0] oooooooo ooxooooo [MSB]
1695 01:01:18.642355 32, [0] oooxoooo oooooooo [MSB]
1696 01:01:18.645437 33, [0] oooxoxoo oooooooo [MSB]
1697 01:01:18.645516 34, [0] oooxoxoo xooooooo [MSB]
1698 01:01:18.648878 35, [0] oooxoxoo xooxoooo [MSB]
1699 01:01:18.652091 36, [0] oooxoxoo xxoxxooo [MSB]
1700 01:01:18.655403 37, [0] oooxoxxx xxoxxxxo [MSB]
1701 01:01:18.658736 38, [0] xooxoxxx xxoxxxxo [MSB]
1702 01:01:18.662200 39, [0] xxoxoxxx xxoxxxxo [MSB]
1703 01:01:18.665609 40, [0] xxxxoxxx xxoxxxxo [MSB]
1704 01:01:18.665688 41, [0] xxxxxxxx xxoxxxxx [MSB]
1705 01:01:18.668691 42, [0] xxxxxxxx xxoxxxxx [MSB]
1706 01:01:18.671746 43, [0] xxxxxxxx xxxxxxxx [MSB]
1707 01:01:18.675022 iDelay=43, Bit 0, Center 21 (5 ~ 37) 33
1708 01:01:18.678299 iDelay=43, Bit 1, Center 21 (5 ~ 38) 34
1709 01:01:18.682207 iDelay=43, Bit 2, Center 22 (5 ~ 39) 35
1710 01:01:18.688631 iDelay=43, Bit 3, Center 14 (-2 ~ 31) 34
1711 01:01:18.692053 iDelay=43, Bit 4, Center 21 (3 ~ 40) 38
1712 01:01:18.695430 iDelay=43, Bit 5, Center 16 (0 ~ 32) 33
1713 01:01:18.698159 iDelay=43, Bit 6, Center 18 (1 ~ 36) 36
1714 01:01:18.701481 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
1715 01:01:18.705219 iDelay=43, Bit 8, Center 16 (0 ~ 33) 34
1716 01:01:18.708378 iDelay=43, Bit 9, Center 19 (3 ~ 35) 33
1717 01:01:18.711702 iDelay=43, Bit 10, Center 26 (10 ~ 42) 33
1718 01:01:18.714919 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
1719 01:01:18.718229 iDelay=43, Bit 12, Center 19 (3 ~ 35) 33
1720 01:01:18.721399 iDelay=43, Bit 13, Center 20 (5 ~ 36) 32
1721 01:01:18.724611 iDelay=43, Bit 14, Center 20 (5 ~ 36) 32
1722 01:01:18.731509 iDelay=43, Bit 15, Center 23 (7 ~ 40) 34
1723 01:01:18.731587 ==
1724 01:01:18.734545 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1725 01:01:18.737590 fsp= 1, odt_onoff= 1, Byte mode= 0
1726 01:01:18.737669 ==
1727 01:01:18.741126 DQS Delay:
1728 01:01:18.741204 DQS0 = 0, DQS1 = 0
1729 01:01:18.741263 DQM Delay:
1730 01:01:18.744106 DQM0 = 19, DQM1 = 20
1731 01:01:18.744183 DQ Delay:
1732 01:01:18.747863 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14
1733 01:01:18.750840 DQ4 =21, DQ5 =16, DQ6 =18, DQ7 =19
1734 01:01:18.754427 DQ8 =16, DQ9 =19, DQ10 =26, DQ11 =17
1735 01:01:18.757379 DQ12 =19, DQ13 =20, DQ14 =20, DQ15 =23
1736 01:01:18.757456
1737 01:01:18.757515
1738 01:01:18.760806 DramC Write-DBI off
1739 01:01:18.760882 ==
1740 01:01:18.763952 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1741 01:01:18.767604 fsp= 1, odt_onoff= 1, Byte mode= 0
1742 01:01:18.767681 ==
1743 01:01:18.773753 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1744 01:01:18.773831
1745 01:01:18.776928 Begin, DQ Scan Range 919~1175
1746 01:01:18.777004
1747 01:01:18.777063
1748 01:01:18.777117 TX Vref Scan disable
1749 01:01:18.780955 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1750 01:01:18.787356 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1751 01:01:18.790540 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1752 01:01:18.793536 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1753 01:01:18.796926 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1754 01:01:18.800179 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1755 01:01:18.803653 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1756 01:01:18.806873 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1757 01:01:18.810303 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1758 01:01:18.813380 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1759 01:01:18.816463 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1760 01:01:18.820173 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1761 01:01:18.823398 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1762 01:01:18.826574 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1763 01:01:18.829787 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1764 01:01:18.836416 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1765 01:01:18.839989 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1766 01:01:18.843087 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1767 01:01:18.846422 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1768 01:01:18.849441 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1769 01:01:18.853385 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1770 01:01:18.856347 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1771 01:01:18.859501 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1772 01:01:18.862828 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1773 01:01:18.866058 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1774 01:01:18.869250 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1775 01:01:18.872807 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1776 01:01:18.875809 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1777 01:01:18.879257 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1778 01:01:18.885902 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1779 01:01:18.889168 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1780 01:01:18.892179 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1781 01:01:18.895289 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1782 01:01:18.899047 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1783 01:01:18.902394 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1784 01:01:18.905821 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1785 01:01:18.908482 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1786 01:01:18.911827 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1787 01:01:18.915315 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1788 01:01:18.919006 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1789 01:01:18.922029 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1790 01:01:18.925139 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1791 01:01:18.928333 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1792 01:01:18.935236 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1793 01:01:18.938642 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1794 01:01:18.941256 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1795 01:01:18.944729 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1796 01:01:18.948170 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1797 01:01:18.951791 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1798 01:01:18.954978 968 |3 6 8|[0] xxxxxxxx oxxxxxxx [MSB]
1799 01:01:18.958183 969 |3 6 9|[0] xxxxxxxx oxxoxxxx [MSB]
1800 01:01:18.961839 970 |3 6 10|[0] xxxxxxxx oxxoooxx [MSB]
1801 01:01:18.965018 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1802 01:01:18.968119 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1803 01:01:18.971289 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1804 01:01:18.974637 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1805 01:01:18.978083 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1806 01:01:18.981310 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1807 01:01:18.984672 977 |3 6 17|[0] xxxoxooo oooooooo [MSB]
1808 01:01:18.990813 978 |3 6 18|[0] xoxooooo oooooooo [MSB]
1809 01:01:18.994595 979 |3 6 19|[0] xoxooooo oooooooo [MSB]
1810 01:01:18.997250 980 |3 6 20|[0] xoxooooo oooooooo [MSB]
1811 01:01:19.000618 989 |3 6 29|[0] oooooooo xooxoooo [MSB]
1812 01:01:19.004267 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1813 01:01:19.007096 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1814 01:01:19.010514 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1815 01:01:19.013786 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1816 01:01:19.020571 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1817 01:01:19.023664 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1818 01:01:19.027017 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1819 01:01:19.030256 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1820 01:01:19.033763 998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]
1821 01:01:19.036876 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1822 01:01:19.040528 Byte0, DQ PI dly=987, DQM PI dly= 987
1823 01:01:19.043471 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
1824 01:01:19.043550
1825 01:01:19.050167 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
1826 01:01:19.050245
1827 01:01:19.053473 Byte1, DQ PI dly=979, DQM PI dly= 979
1828 01:01:19.056567 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1829 01:01:19.056645
1830 01:01:19.060029 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1831 01:01:19.060106
1832 01:01:19.060166 ==
1833 01:01:19.066929 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1834 01:01:19.070315 fsp= 1, odt_onoff= 1, Byte mode= 0
1835 01:01:19.070393 ==
1836 01:01:19.073337 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1837 01:01:19.073414
1838 01:01:19.076820 Begin, DQ Scan Range 955~1019
1839 01:01:19.080088 Write Rank1 MR14 =0x0
1840 01:01:19.087287
1841 01:01:19.087365 CH=0, VrefRange= 0, VrefLevel = 0
1842 01:01:19.093919 TX Bit0 (983~994) 12 988, Bit8 (971~982) 12 976,
1843 01:01:19.096705 TX Bit1 (982~993) 12 987, Bit9 (973~983) 11 978,
1844 01:01:19.103803 TX Bit2 (983~994) 12 988, Bit10 (976~990) 15 983,
1845 01:01:19.106600 TX Bit3 (976~989) 14 982, Bit11 (972~982) 11 977,
1846 01:01:19.110477 TX Bit4 (981~993) 13 987, Bit12 (973~984) 12 978,
1847 01:01:19.116505 TX Bit5 (978~991) 14 984, Bit13 (973~986) 14 979,
1848 01:01:19.120100 TX Bit6 (979~992) 14 985, Bit14 (973~988) 16 980,
1849 01:01:19.126442 TX Bit7 (981~994) 14 987, Bit15 (976~988) 13 982,
1850 01:01:19.126583
1851 01:01:19.126646 Write Rank1 MR14 =0x2
1852 01:01:19.135260
1853 01:01:19.135376 CH=0, VrefRange= 0, VrefLevel = 2
1854 01:01:19.141777 TX Bit0 (983~995) 13 989, Bit8 (971~983) 13 977,
1855 01:01:19.145141 TX Bit1 (981~994) 14 987, Bit9 (973~984) 12 978,
1856 01:01:19.152114 TX Bit2 (983~995) 13 989, Bit10 (976~990) 15 983,
1857 01:01:19.155066 TX Bit3 (976~990) 15 983, Bit11 (972~983) 12 977,
1858 01:01:19.158569 TX Bit4 (981~994) 14 987, Bit12 (973~985) 13 979,
1859 01:01:19.164842 TX Bit5 (978~992) 15 985, Bit13 (973~986) 14 979,
1860 01:01:19.168200 TX Bit6 (978~992) 15 985, Bit14 (973~988) 16 980,
1861 01:01:19.174768 TX Bit7 (980~995) 16 987, Bit15 (976~989) 14 982,
1862 01:01:19.174846
1863 01:01:19.174907 Write Rank1 MR14 =0x4
1864 01:01:19.183961
1865 01:01:19.184038 CH=0, VrefRange= 0, VrefLevel = 4
1866 01:01:19.190599 TX Bit0 (983~996) 14 989, Bit8 (971~983) 13 977,
1867 01:01:19.193956 TX Bit1 (981~995) 15 988, Bit9 (973~985) 13 979,
1868 01:01:19.200448 TX Bit2 (982~997) 16 989, Bit10 (976~991) 16 983,
1869 01:01:19.203778 TX Bit3 (976~991) 16 983, Bit11 (972~983) 12 977,
1870 01:01:19.207062 TX Bit4 (981~995) 15 988, Bit12 (973~986) 14 979,
1871 01:01:19.213472 TX Bit5 (978~992) 15 985, Bit13 (973~987) 15 980,
1872 01:01:19.217207 TX Bit6 (978~993) 16 985, Bit14 (973~989) 17 981,
1873 01:01:19.220520 TX Bit7 (980~995) 16 987, Bit15 (975~989) 15 982,
1874 01:01:19.223980
1875 01:01:19.224057 Write Rank1 MR14 =0x6
1876 01:01:19.232808
1877 01:01:19.232885 CH=0, VrefRange= 0, VrefLevel = 6
1878 01:01:19.238861 TX Bit0 (983~997) 15 990, Bit8 (969~984) 16 976,
1879 01:01:19.242227 TX Bit1 (980~996) 17 988, Bit9 (973~985) 13 979,
1880 01:01:19.248930 TX Bit2 (982~997) 16 989, Bit10 (975~991) 17 983,
1881 01:01:19.252196 TX Bit3 (976~991) 16 983, Bit11 (971~983) 13 977,
1882 01:01:19.255479 TX Bit4 (981~996) 16 988, Bit12 (973~986) 14 979,
1883 01:01:19.261897 TX Bit5 (977~993) 17 985, Bit13 (973~988) 16 980,
1884 01:01:19.265535 TX Bit6 (977~993) 17 985, Bit14 (973~989) 17 981,
1885 01:01:19.271654 TX Bit7 (979~997) 19 988, Bit15 (975~990) 16 982,
1886 01:01:19.271731
1887 01:01:19.271792 Write Rank1 MR14 =0x8
1888 01:01:19.281618
1889 01:01:19.281695 CH=0, VrefRange= 0, VrefLevel = 8
1890 01:01:19.287782 TX Bit0 (982~998) 17 990, Bit8 (969~985) 17 977,
1891 01:01:19.291363 TX Bit1 (980~997) 18 988, Bit9 (972~986) 15 979,
1892 01:01:19.297961 TX Bit2 (982~998) 17 990, Bit10 (974~992) 19 983,
1893 01:01:19.301278 TX Bit3 (975~991) 17 983, Bit11 (971~984) 14 977,
1894 01:01:19.304348 TX Bit4 (979~997) 19 988, Bit12 (972~988) 17 980,
1895 01:01:19.311465 TX Bit5 (977~993) 17 985, Bit13 (972~988) 17 980,
1896 01:01:19.314814 TX Bit6 (977~994) 18 985, Bit14 (972~990) 19 981,
1897 01:01:19.318230 TX Bit7 (979~997) 19 988, Bit15 (975~990) 16 982,
1898 01:01:19.321233
1899 01:01:19.321309 Write Rank1 MR14 =0xa
1900 01:01:19.330492
1901 01:01:19.333943 CH=0, VrefRange= 0, VrefLevel = 10
1902 01:01:19.337124 TX Bit0 (982~998) 17 990, Bit8 (968~985) 18 976,
1903 01:01:19.340390 TX Bit1 (979~998) 20 988, Bit9 (972~987) 16 979,
1904 01:01:19.346859 TX Bit2 (981~999) 19 990, Bit10 (975~993) 19 984,
1905 01:01:19.349988 TX Bit3 (975~992) 18 983, Bit11 (970~985) 16 977,
1906 01:01:19.353245 TX Bit4 (979~997) 19 988, Bit12 (971~988) 18 979,
1907 01:01:19.360019 TX Bit5 (977~994) 18 985, Bit13 (972~989) 18 980,
1908 01:01:19.362963 TX Bit6 (977~995) 19 986, Bit14 (972~990) 19 981,
1909 01:01:19.369732 TX Bit7 (978~998) 21 988, Bit15 (975~991) 17 983,
1910 01:01:19.369810
1911 01:01:19.369870 Write Rank1 MR14 =0xc
1912 01:01:19.379017
1913 01:01:19.382773 CH=0, VrefRange= 0, VrefLevel = 12
1914 01:01:19.385536 TX Bit0 (982~999) 18 990, Bit8 (968~986) 19 977,
1915 01:01:19.389046 TX Bit1 (979~998) 20 988, Bit9 (971~988) 18 979,
1916 01:01:19.396292 TX Bit2 (981~999) 19 990, Bit10 (975~994) 20 984,
1917 01:01:19.399285 TX Bit3 (974~992) 19 983, Bit11 (970~986) 17 978,
1918 01:01:19.402569 TX Bit4 (979~998) 20 988, Bit12 (972~989) 18 980,
1919 01:01:19.409112 TX Bit5 (977~995) 19 986, Bit13 (971~989) 19 980,
1920 01:01:19.412503 TX Bit6 (977~996) 20 986, Bit14 (972~991) 20 981,
1921 01:01:19.415719 TX Bit7 (978~999) 22 988, Bit15 (975~992) 18 983,
1922 01:01:19.419018
1923 01:01:19.419095 Write Rank1 MR14 =0xe
1924 01:01:19.428254
1925 01:01:19.431533 CH=0, VrefRange= 0, VrefLevel = 14
1926 01:01:19.434802 TX Bit0 (981~999) 19 990, Bit8 (968~988) 21 978,
1927 01:01:19.437980 TX Bit1 (979~999) 21 989, Bit9 (971~988) 18 979,
1928 01:01:19.444724 TX Bit2 (981~999) 19 990, Bit10 (975~994) 20 984,
1929 01:01:19.447938 TX Bit3 (975~992) 18 983, Bit11 (969~987) 19 978,
1930 01:01:19.451660 TX Bit4 (978~998) 21 988, Bit12 (971~989) 19 980,
1931 01:01:19.457751 TX Bit5 (976~996) 21 986, Bit13 (971~990) 20 980,
1932 01:01:19.461061 TX Bit6 (977~997) 21 987, Bit14 (972~991) 20 981,
1933 01:01:19.467749 TX Bit7 (978~999) 22 988, Bit15 (974~992) 19 983,
1934 01:01:19.467826
1935 01:01:19.467886 Write Rank1 MR14 =0x10
1936 01:01:19.477692
1937 01:01:19.480795 CH=0, VrefRange= 0, VrefLevel = 16
1938 01:01:19.484427 TX Bit0 (980~1000) 21 990, Bit8 (967~988) 22 977,
1939 01:01:19.487561 TX Bit1 (978~999) 22 988, Bit9 (971~989) 19 980,
1940 01:01:19.494015 TX Bit2 (980~1000) 21 990, Bit10 (974~995) 22 984,
1941 01:01:19.497100 TX Bit3 (974~993) 20 983, Bit11 (969~988) 20 978,
1942 01:01:19.500493 TX Bit4 (978~999) 22 988, Bit12 (971~990) 20 980,
1943 01:01:19.507010 TX Bit5 (976~997) 22 986, Bit13 (971~990) 20 980,
1944 01:01:19.510483 TX Bit6 (976~998) 23 987, Bit14 (971~991) 21 981,
1945 01:01:19.517387 TX Bit7 (978~999) 22 988, Bit15 (974~993) 20 983,
1946 01:01:19.517488
1947 01:01:19.517579 Write Rank1 MR14 =0x12
1948 01:01:19.527270
1949 01:01:19.530515 CH=0, VrefRange= 0, VrefLevel = 18
1950 01:01:19.533747 TX Bit0 (981~1000) 20 990, Bit8 (967~988) 22 977,
1951 01:01:19.537016 TX Bit1 (978~1000) 23 989, Bit9 (970~989) 20 979,
1952 01:01:19.543516 TX Bit2 (980~1000) 21 990, Bit10 (974~995) 22 984,
1953 01:01:19.546763 TX Bit3 (974~993) 20 983, Bit11 (968~988) 21 978,
1954 01:01:19.550112 TX Bit4 (978~999) 22 988, Bit12 (969~990) 22 979,
1955 01:01:19.556564 TX Bit5 (976~997) 22 986, Bit13 (970~990) 21 980,
1956 01:01:19.559823 TX Bit6 (976~998) 23 987, Bit14 (971~992) 22 981,
1957 01:01:19.566432 TX Bit7 (977~1000) 24 988, Bit15 (974~993) 20 983,
1958 01:01:19.566510
1959 01:01:19.566570 Write Rank1 MR14 =0x14
1960 01:01:19.576829
1961 01:01:19.580118 CH=0, VrefRange= 0, VrefLevel = 20
1962 01:01:19.583308 TX Bit0 (980~1000) 21 990, Bit8 (967~989) 23 978,
1963 01:01:19.586638 TX Bit1 (978~1000) 23 989, Bit9 (969~989) 21 979,
1964 01:01:19.593215 TX Bit2 (979~1001) 23 990, Bit10 (974~996) 23 985,
1965 01:01:19.596475 TX Bit3 (974~994) 21 984, Bit11 (968~989) 22 978,
1966 01:01:19.599937 TX Bit4 (977~999) 23 988, Bit12 (969~991) 23 980,
1967 01:01:19.606320 TX Bit5 (976~998) 23 987, Bit13 (969~991) 23 980,
1968 01:01:19.609662 TX Bit6 (976~999) 24 987, Bit14 (971~992) 22 981,
1969 01:01:19.616099 TX Bit7 (977~1000) 24 988, Bit15 (974~994) 21 984,
1970 01:01:19.616176
1971 01:01:19.616236 Write Rank1 MR14 =0x16
1972 01:01:19.626753
1973 01:01:19.629604 CH=0, VrefRange= 0, VrefLevel = 22
1974 01:01:19.632994 TX Bit0 (979~1001) 23 990, Bit8 (967~989) 23 978,
1975 01:01:19.636697 TX Bit1 (977~1000) 24 988, Bit9 (969~990) 22 979,
1976 01:01:19.643362 TX Bit2 (979~1001) 23 990, Bit10 (974~996) 23 985,
1977 01:01:19.646508 TX Bit3 (974~995) 22 984, Bit11 (968~989) 22 978,
1978 01:01:19.653215 TX Bit4 (977~1000) 24 988, Bit12 (969~991) 23 980,
1979 01:01:19.656464 TX Bit5 (976~998) 23 987, Bit13 (969~991) 23 980,
1980 01:01:19.659641 TX Bit6 (976~999) 24 987, Bit14 (970~993) 24 981,
1981 01:01:19.666245 TX Bit7 (977~1001) 25 989, Bit15 (974~995) 22 984,
1982 01:01:19.666323
1983 01:01:19.666383 Write Rank1 MR14 =0x18
1984 01:01:19.676672
1985 01:01:19.679678 CH=0, VrefRange= 0, VrefLevel = 24
1986 01:01:19.682858 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1987 01:01:19.686110 TX Bit1 (977~1000) 24 988, Bit9 (969~990) 22 979,
1988 01:01:19.692614 TX Bit2 (978~1001) 24 989, Bit10 (973~997) 25 985,
1989 01:01:19.696442 TX Bit3 (973~996) 24 984, Bit11 (967~989) 23 978,
1990 01:01:19.699828 TX Bit4 (977~1000) 24 988, Bit12 (969~992) 24 980,
1991 01:01:19.706100 TX Bit5 (976~998) 23 987, Bit13 (969~991) 23 980,
1992 01:01:19.709296 TX Bit6 (976~999) 24 987, Bit14 (969~993) 25 981,
1993 01:01:19.716287 TX Bit7 (977~1001) 25 989, Bit15 (974~996) 23 985,
1994 01:01:19.716390
1995 01:01:19.716451 Write Rank1 MR14 =0x1a
1996 01:01:19.726459
1997 01:01:19.729602 CH=0, VrefRange= 0, VrefLevel = 26
1998 01:01:19.732812 TX Bit0 (979~1002) 24 990, Bit8 (966~989) 24 977,
1999 01:01:19.736409 TX Bit1 (977~1001) 25 989, Bit9 (969~991) 23 980,
2000 01:01:19.742852 TX Bit2 (978~1002) 25 990, Bit10 (973~997) 25 985,
2001 01:01:19.746017 TX Bit3 (973~997) 25 985, Bit11 (967~990) 24 978,
2002 01:01:19.752409 TX Bit4 (977~1000) 24 988, Bit12 (969~991) 23 980,
2003 01:01:19.756006 TX Bit5 (975~999) 25 987, Bit13 (968~991) 24 979,
2004 01:01:19.759047 TX Bit6 (975~999) 25 987, Bit14 (969~992) 24 980,
2005 01:01:19.765465 TX Bit7 (977~1001) 25 989, Bit15 (973~996) 24 984,
2006 01:01:19.765555
2007 01:01:19.765617 Write Rank1 MR14 =0x1c
2008 01:01:19.776685
2009 01:01:19.779977 CH=0, VrefRange= 0, VrefLevel = 28
2010 01:01:19.783261 TX Bit0 (978~1003) 26 990, Bit8 (966~989) 24 977,
2011 01:01:19.786939 TX Bit1 (977~1001) 25 989, Bit9 (969~991) 23 980,
2012 01:01:19.793311 TX Bit2 (978~1002) 25 990, Bit10 (973~997) 25 985,
2013 01:01:19.796571 TX Bit3 (973~997) 25 985, Bit11 (967~990) 24 978,
2014 01:01:19.799847 TX Bit4 (977~1001) 25 989, Bit12 (968~991) 24 979,
2015 01:01:19.806518 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2016 01:01:19.809571 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2017 01:01:19.816121 TX Bit7 (977~1001) 25 989, Bit15 (973~996) 24 984,
2018 01:01:19.816200
2019 01:01:19.816260 Write Rank1 MR14 =0x1e
2020 01:01:19.826760
2021 01:01:19.826843 CH=0, VrefRange= 0, VrefLevel = 30
2022 01:01:19.833273 TX Bit0 (978~1003) 26 990, Bit8 (966~989) 24 977,
2023 01:01:19.837138 TX Bit1 (977~1001) 25 989, Bit9 (969~991) 23 980,
2024 01:01:19.843958 TX Bit2 (978~1002) 25 990, Bit10 (973~997) 25 985,
2025 01:01:19.847051 TX Bit3 (973~997) 25 985, Bit11 (967~990) 24 978,
2026 01:01:19.849973 TX Bit4 (977~1001) 25 989, Bit12 (968~991) 24 979,
2027 01:01:19.856903 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2028 01:01:19.860172 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2029 01:01:19.866202 TX Bit7 (977~1001) 25 989, Bit15 (973~996) 24 984,
2030 01:01:19.866282
2031 01:01:19.866343 Write Rank1 MR14 =0x20
2032 01:01:19.876804
2033 01:01:19.879914 CH=0, VrefRange= 0, VrefLevel = 32
2034 01:01:19.883278 TX Bit0 (978~1003) 26 990, Bit8 (966~989) 24 977,
2035 01:01:19.886673 TX Bit1 (977~1001) 25 989, Bit9 (969~991) 23 980,
2036 01:01:19.893760 TX Bit2 (978~1002) 25 990, Bit10 (973~997) 25 985,
2037 01:01:19.896827 TX Bit3 (973~997) 25 985, Bit11 (967~990) 24 978,
2038 01:01:19.903450 TX Bit4 (977~1001) 25 989, Bit12 (968~991) 24 979,
2039 01:01:19.906156 TX Bit5 (975~999) 25 987, Bit13 (969~991) 23 980,
2040 01:01:19.909988 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2041 01:01:19.916254 TX Bit7 (977~1001) 25 989, Bit15 (973~996) 24 984,
2042 01:01:19.916333
2043 01:01:19.916393
2044 01:01:19.919675 TX Vref found, early break! 369< 372
2045 01:01:19.922868 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2046 01:01:19.926243 u1DelayCellOfst[0]=6 cells (5 PI)
2047 01:01:19.929203 u1DelayCellOfst[1]=5 cells (4 PI)
2048 01:01:19.933300 u1DelayCellOfst[2]=6 cells (5 PI)
2049 01:01:19.935960 u1DelayCellOfst[3]=0 cells (0 PI)
2050 01:01:19.939582 u1DelayCellOfst[4]=5 cells (4 PI)
2051 01:01:19.943017 u1DelayCellOfst[5]=2 cells (2 PI)
2052 01:01:19.946483 u1DelayCellOfst[6]=3 cells (3 PI)
2053 01:01:19.949188 u1DelayCellOfst[7]=5 cells (4 PI)
2054 01:01:19.952389 Byte0, DQ PI dly=985, DQM PI dly= 987
2055 01:01:19.956169 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2056 01:01:19.956247
2057 01:01:19.959536 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2058 01:01:19.959620
2059 01:01:19.962619 u1DelayCellOfst[8]=0 cells (0 PI)
2060 01:01:19.965890 u1DelayCellOfst[9]=3 cells (3 PI)
2061 01:01:19.969088 u1DelayCellOfst[10]=10 cells (8 PI)
2062 01:01:19.972448 u1DelayCellOfst[11]=1 cells (1 PI)
2063 01:01:19.975318 u1DelayCellOfst[12]=2 cells (2 PI)
2064 01:01:19.978701 u1DelayCellOfst[13]=3 cells (3 PI)
2065 01:01:19.981979 u1DelayCellOfst[14]=3 cells (3 PI)
2066 01:01:19.985329 u1DelayCellOfst[15]=9 cells (7 PI)
2067 01:01:19.988608 Byte1, DQ PI dly=977, DQM PI dly= 981
2068 01:01:19.991953 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
2069 01:01:19.992032
2070 01:01:19.998679 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
2071 01:01:19.998758
2072 01:01:19.998818 Write Rank1 MR14 =0x1c
2073 01:01:19.998874
2074 01:01:20.001926 Final TX Range 0 Vref 28
2075 01:01:20.002005
2076 01:01:20.008547 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2077 01:01:20.008626
2078 01:01:20.015167 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2079 01:01:20.021785 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2080 01:01:20.028459 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2081 01:01:20.031453 Write Rank1 MR3 =0xb0
2082 01:01:20.031575 DramC Write-DBI on
2083 01:01:20.035234 ==
2084 01:01:20.038451 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2085 01:01:20.041327 fsp= 1, odt_onoff= 1, Byte mode= 0
2086 01:01:20.041444 ==
2087 01:01:20.044775 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2088 01:01:20.044885
2089 01:01:20.047931 Begin, DQ Scan Range 701~765
2090 01:01:20.048053
2091 01:01:20.048142
2092 01:01:20.051304 TX Vref Scan disable
2093 01:01:20.054649 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2094 01:01:20.058135 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2095 01:01:20.061326 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2096 01:01:20.064970 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2097 01:01:20.068227 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2098 01:01:20.070890 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2099 01:01:20.074232 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2100 01:01:20.077881 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2101 01:01:20.080852 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2102 01:01:20.084617 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2103 01:01:20.087602 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2104 01:01:20.091001 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2105 01:01:20.097312 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2106 01:01:20.101259 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2107 01:01:20.104044 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2108 01:01:20.107271 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2109 01:01:20.110728 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2110 01:01:20.113951 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2111 01:01:20.117344 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2112 01:01:20.120803 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2113 01:01:20.128059 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2114 01:01:20.131402 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2115 01:01:20.134304 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2116 01:01:20.138055 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2117 01:01:20.141124 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2118 01:01:20.144289 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2119 01:01:20.147984 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2120 01:01:20.150852 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2121 01:01:20.154202 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2122 01:01:20.157587 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2123 01:01:20.160985 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2124 01:01:20.164410 747 |2 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
2125 01:01:20.167593 Byte0, DQ PI dly=733, DQM PI dly= 733
2126 01:01:20.174838 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
2127 01:01:20.174960
2128 01:01:20.177354 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
2129 01:01:20.177437
2130 01:01:20.180713 Byte1, DQ PI dly=723, DQM PI dly= 723
2131 01:01:20.184035 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2132 01:01:20.184119
2133 01:01:20.190831 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2134 01:01:20.190919
2135 01:01:20.197206 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2136 01:01:20.204066 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2137 01:01:20.210834 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2138 01:01:20.214175 Write Rank1 MR3 =0x30
2139 01:01:20.214264 DramC Write-DBI off
2140 01:01:20.214325
2141 01:01:20.214381 [DATLAT]
2142 01:01:20.217400 Freq=1600, CH0 RK1, use_rxtx_scan=0
2143 01:01:20.217479
2144 01:01:20.220807 DATLAT Default: 0x10
2145 01:01:20.223903 7, 0xFFFF, sum=0
2146 01:01:20.223982 8, 0xFFFF, sum=0
2147 01:01:20.224042 9, 0xFFFF, sum=0
2148 01:01:20.227119 10, 0xFFFF, sum=0
2149 01:01:20.227198 11, 0xFFFF, sum=0
2150 01:01:20.230535 12, 0xFFFF, sum=0
2151 01:01:20.230613 13, 0xFFFF, sum=0
2152 01:01:20.233462 14, 0x0, sum=1
2153 01:01:20.233542 15, 0x0, sum=2
2154 01:01:20.236770 16, 0x0, sum=3
2155 01:01:20.236848 17, 0x0, sum=4
2156 01:01:20.240103 pattern=2 first_step=14 total pass=5 best_step=16
2157 01:01:20.243609 ==
2158 01:01:20.246874 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2159 01:01:20.250178 fsp= 1, odt_onoff= 1, Byte mode= 0
2160 01:01:20.250258 ==
2161 01:01:20.253316 Start DQ dly to find pass range UseTestEngine =1
2162 01:01:20.256841 x-axis: bit #, y-axis: DQ dly (-127~63)
2163 01:01:20.259793 RX Vref Scan = 0
2164 01:01:20.263404 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2165 01:01:20.266811 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2166 01:01:20.269965 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2167 01:01:20.273131 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2168 01:01:20.273213 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2169 01:01:20.276083 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2170 01:01:20.279859 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2171 01:01:20.283241 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2172 01:01:20.286798 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2173 01:01:20.290154 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2174 01:01:20.293474 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2175 01:01:20.293604 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2176 01:01:20.296738 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2177 01:01:20.299959 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2178 01:01:20.303344 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2179 01:01:20.306665 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2180 01:01:20.309898 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2181 01:01:20.313162 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2182 01:01:20.316412 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2183 01:01:20.316499 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2184 01:01:20.320434 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2185 01:01:20.323274 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2186 01:01:20.326386 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2187 01:01:20.330200 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2188 01:01:20.333446 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2189 01:01:20.336880 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2190 01:01:20.336959 0, [0] xxxoxoxx xxxoxxxx [MSB]
2191 01:01:20.339936 1, [0] xxxoxoox oxxoxxxx [MSB]
2192 01:01:20.342892 2, [0] xxxoxoox oxxoxxxx [MSB]
2193 01:01:20.346136 3, [0] xoxoxoox ooxoooxx [MSB]
2194 01:01:20.349323 4, [0] ooxoxooo ooxoooxx [MSB]
2195 01:01:20.352747 5, [0] oooooooo ooxoooox [MSB]
2196 01:01:20.356356 6, [0] oooooooo ooxooooo [MSB]
2197 01:01:20.356435 7, [0] oooooooo ooxooooo [MSB]
2198 01:01:20.359716 8, [0] oooooooo ooxooooo [MSB]
2199 01:01:20.363585 32, [0] oooxoooo oooooooo [MSB]
2200 01:01:20.366854 33, [0] oooxoxoo oooooooo [MSB]
2201 01:01:20.370103 34, [0] oooxoxoo xooxoooo [MSB]
2202 01:01:20.373265 35, [0] oooxoxoo xooxoooo [MSB]
2203 01:01:20.376965 36, [0] oooxoxxo xxoxoooo [MSB]
2204 01:01:20.379721 37, [0] oooxoxxx xxoxxxxo [MSB]
2205 01:01:20.383410 38, [0] oooxoxxx xxoxxxxo [MSB]
2206 01:01:20.383497 39, [0] xooxoxxx xxoxxxxo [MSB]
2207 01:01:20.386317 40, [0] xxoxxxxx xxoxxxxo [MSB]
2208 01:01:20.390165 41, [0] xxxxxxxx xxoxxxxx [MSB]
2209 01:01:20.392876 42, [0] xxxxxxxx xxoxxxxx [MSB]
2210 01:01:20.396048 43, [0] xxxxxxxx xxxxxxxx [MSB]
2211 01:01:20.399502 iDelay=43, Bit 0, Center 21 (4 ~ 38) 35
2212 01:01:20.402640 iDelay=43, Bit 1, Center 21 (3 ~ 39) 37
2213 01:01:20.406078 iDelay=43, Bit 2, Center 22 (5 ~ 40) 36
2214 01:01:20.409314 iDelay=43, Bit 3, Center 14 (-2 ~ 31) 34
2215 01:01:20.412671 iDelay=43, Bit 4, Center 22 (5 ~ 39) 35
2216 01:01:20.415977 iDelay=43, Bit 5, Center 16 (0 ~ 32) 33
2217 01:01:20.419166 iDelay=43, Bit 6, Center 18 (1 ~ 35) 35
2218 01:01:20.425811 iDelay=43, Bit 7, Center 20 (4 ~ 36) 33
2219 01:01:20.429187 iDelay=43, Bit 8, Center 17 (1 ~ 33) 33
2220 01:01:20.432726 iDelay=43, Bit 9, Center 19 (3 ~ 35) 33
2221 01:01:20.435921 iDelay=43, Bit 10, Center 25 (9 ~ 42) 34
2222 01:01:20.439032 iDelay=43, Bit 11, Center 16 (0 ~ 33) 34
2223 01:01:20.442356 iDelay=43, Bit 12, Center 19 (3 ~ 36) 34
2224 01:01:20.445686 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
2225 01:01:20.449486 iDelay=43, Bit 14, Center 20 (5 ~ 36) 32
2226 01:01:20.452335 iDelay=43, Bit 15, Center 23 (6 ~ 40) 35
2227 01:01:20.452435 ==
2228 01:01:20.459309 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2229 01:01:20.462218 fsp= 1, odt_onoff= 1, Byte mode= 0
2230 01:01:20.462308 ==
2231 01:01:20.462370 DQS Delay:
2232 01:01:20.465425 DQS0 = 0, DQS1 = 0
2233 01:01:20.465506 DQM Delay:
2234 01:01:20.469014 DQM0 = 19, DQM1 = 19
2235 01:01:20.469095 DQ Delay:
2236 01:01:20.472214 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14
2237 01:01:20.475779 DQ4 =22, DQ5 =16, DQ6 =18, DQ7 =20
2238 01:01:20.479118 DQ8 =17, DQ9 =19, DQ10 =25, DQ11 =16
2239 01:01:20.482373 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =23
2240 01:01:20.482458
2241 01:01:20.482519
2242 01:01:20.482573
2243 01:01:20.485478 [DramC_TX_OE_Calibration] TA2
2244 01:01:20.488579 Original DQ_B0 (3 6) =30, OEN = 27
2245 01:01:20.492000 Original DQ_B1 (3 6) =30, OEN = 27
2246 01:01:20.492086 23, 0x0, End_B0=23 End_B1=23
2247 01:01:20.495437 24, 0x0, End_B0=24 End_B1=24
2248 01:01:20.498488 25, 0x0, End_B0=25 End_B1=25
2249 01:01:20.501584 26, 0x0, End_B0=26 End_B1=26
2250 01:01:20.505407 27, 0x0, End_B0=27 End_B1=27
2251 01:01:20.505500 28, 0x0, End_B0=28 End_B1=28
2252 01:01:20.508837 29, 0x0, End_B0=29 End_B1=29
2253 01:01:20.512138 30, 0x0, End_B0=30 End_B1=30
2254 01:01:20.515395 31, 0xFFFF, End_B0=30 End_B1=30
2255 01:01:20.518167 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2256 01:01:20.525282 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2257 01:01:20.525359
2258 01:01:20.525419
2259 01:01:20.528413 Write Rank1 MR23 =0x3f
2260 01:01:20.528490 [DQSOSC]
2261 01:01:20.538460 [DQSOSCAuto] RK1, (LSB)MR18= 0xb1b1, (MSB)MR19= 0x202, tDQSOscB0 = 457 ps tDQSOscB1 = 457 ps
2262 01:01:20.541532 CH0_RK1: MR19=0x202, MR18=0xB1B1, DQSOSC=457, MR23=63, INC=11, DEC=17
2263 01:01:20.544693 Write Rank1 MR23 =0x3f
2264 01:01:20.544771 [DQSOSC]
2265 01:01:20.554345 [DQSOSCAuto] RK1, (LSB)MR18= 0xb2b2, (MSB)MR19= 0x202, tDQSOscB0 = 456 ps tDQSOscB1 = 456 ps
2266 01:01:20.558085 CH0 RK1: MR19=202, MR18=B2B2
2267 01:01:20.561275 [RxdqsGatingPostProcess] freq 1600
2268 01:01:20.564463 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2269 01:01:20.564542 Rank: 0
2270 01:01:20.567730 best DQS0 dly(2T, 0.5T) = (2, 6)
2271 01:01:20.571405 best DQS1 dly(2T, 0.5T) = (2, 6)
2272 01:01:20.574679 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2273 01:01:20.577557 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2274 01:01:20.577670 Rank: 1
2275 01:01:20.581328 best DQS0 dly(2T, 0.5T) = (2, 6)
2276 01:01:20.584616 best DQS1 dly(2T, 0.5T) = (2, 6)
2277 01:01:20.588032 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2278 01:01:20.591287 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2279 01:01:20.597824 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2280 01:01:20.597903 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2281 01:01:20.604369 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2282 01:01:20.607840 Write Rank0 MR13 =0x59
2283 01:01:20.607918 ==
2284 01:01:20.610893 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2285 01:01:20.613840 fsp= 1, odt_onoff= 1, Byte mode= 0
2286 01:01:20.613919 ==
2287 01:01:20.617238 === u2Vref_new: 0x56 --> 0x3a
2288 01:01:20.620729 === u2Vref_new: 0x58 --> 0x58
2289 01:01:20.623674 === u2Vref_new: 0x5a --> 0x5a
2290 01:01:20.627079 === u2Vref_new: 0x5c --> 0x78
2291 01:01:20.630260 === u2Vref_new: 0x5e --> 0x7a
2292 01:01:20.633512 === u2Vref_new: 0x60 --> 0x90
2293 01:01:20.636854 [CA 0] Center 37 (12~63) winsize 52
2294 01:01:20.640346 [CA 1] Center 37 (11~63) winsize 53
2295 01:01:20.643447 [CA 2] Center 35 (7~63) winsize 57
2296 01:01:20.646831 [CA 3] Center 35 (7~63) winsize 57
2297 01:01:20.650225 [CA 4] Center 34 (6~63) winsize 58
2298 01:01:20.653298 [CA 5] Center 28 (-1~57) winsize 59
2299 01:01:20.653375
2300 01:01:20.656981 [CATrainingPosCal] consider 1 rank data
2301 01:01:20.659912 u2DelayCellTimex100 = 744/100 ps
2302 01:01:20.663734 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2303 01:01:20.667076 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2304 01:01:20.670277 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2305 01:01:20.673502 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2306 01:01:20.676818 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2307 01:01:20.680230 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2308 01:01:20.680307
2309 01:01:20.686681 CA PerBit enable=1, Macro0, CA PI delay=28
2310 01:01:20.686774 === u2Vref_new: 0x5c --> 0x78
2311 01:01:20.686836
2312 01:01:20.689670 Vref(ca) range 1: 28
2313 01:01:20.689747
2314 01:01:20.692864 CS Dly= 11 (42-0-32)
2315 01:01:20.692942 Write Rank0 MR13 =0xd8
2316 01:01:20.696137 Write Rank0 MR13 =0xd8
2317 01:01:20.696215 Write Rank0 MR12 =0x5c
2318 01:01:20.700124 Write Rank1 MR13 =0x59
2319 01:01:20.700217 ==
2320 01:01:20.706136 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2321 01:01:20.710049 fsp= 1, odt_onoff= 1, Byte mode= 0
2322 01:01:20.710127 ==
2323 01:01:20.712926 === u2Vref_new: 0x56 --> 0x3a
2324 01:01:20.713003 === u2Vref_new: 0x58 --> 0x58
2325 01:01:20.716657 === u2Vref_new: 0x5a --> 0x5a
2326 01:01:20.719735 === u2Vref_new: 0x5c --> 0x78
2327 01:01:20.723557 === u2Vref_new: 0x5e --> 0x7a
2328 01:01:20.726653 === u2Vref_new: 0x60 --> 0x90
2329 01:01:20.730166 [CA 0] Center 37 (11~63) winsize 53
2330 01:01:20.733210 [CA 1] Center 37 (11~63) winsize 53
2331 01:01:20.736611 [CA 2] Center 34 (6~63) winsize 58
2332 01:01:20.740469 [CA 3] Center 35 (7~63) winsize 57
2333 01:01:20.743000 [CA 4] Center 34 (6~63) winsize 58
2334 01:01:20.746354 [CA 5] Center 28 (-1~57) winsize 59
2335 01:01:20.746431
2336 01:01:20.749696 [CATrainingPosCal] consider 2 rank data
2337 01:01:20.753221 u2DelayCellTimex100 = 744/100 ps
2338 01:01:20.756615 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2339 01:01:20.759831 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2340 01:01:20.762968 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2341 01:01:20.766574 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2342 01:01:20.769520 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2343 01:01:20.776208 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2344 01:01:20.776284
2345 01:01:20.779476 CA PerBit enable=1, Macro0, CA PI delay=28
2346 01:01:20.782748 === u2Vref_new: 0x5c --> 0x78
2347 01:01:20.782848
2348 01:01:20.782933 Vref(ca) range 1: 28
2349 01:01:20.783014
2350 01:01:20.786202 CS Dly= 9 (40-0-32)
2351 01:01:20.789362 Write Rank1 MR13 =0xd8
2352 01:01:20.789461 Write Rank1 MR13 =0xd8
2353 01:01:20.792440 Write Rank1 MR12 =0x5c
2354 01:01:20.795832 [RankSwap] Rank num 2, (Multi 1), Rank 0
2355 01:01:20.799039 Write Rank0 MR2 =0xad
2356 01:01:20.799137 [Write Leveling]
2357 01:01:20.802271 delay byte0 byte1 byte2 byte3
2358 01:01:20.802361
2359 01:01:20.802442 10 0 0
2360 01:01:20.805679 11 0 0
2361 01:01:20.805756 12 0 0
2362 01:01:20.808960 13 0 0
2363 01:01:20.809036 14 0 0
2364 01:01:20.809095 15 0 0
2365 01:01:20.812385 16 0 0
2366 01:01:20.812461 17 0 0
2367 01:01:20.816132 18 0 0
2368 01:01:20.816208 19 0 0
2369 01:01:20.819069 20 0 0
2370 01:01:20.819146 21 0 0
2371 01:01:20.819205 22 0 0
2372 01:01:20.822219 23 0 0
2373 01:01:20.822296 24 0 0
2374 01:01:20.825944 25 0 0
2375 01:01:20.826023 26 0 0
2376 01:01:20.826083 27 0 0
2377 01:01:20.828653 28 0 0
2378 01:01:20.828730 29 0 0
2379 01:01:20.832012 30 0 0
2380 01:01:20.832090 31 0 0
2381 01:01:20.836060 32 0 0
2382 01:01:20.836138 33 0 ff
2383 01:01:20.836198 34 0 ff
2384 01:01:20.839286 35 0 ff
2385 01:01:20.839371 36 ff ff
2386 01:01:20.842337 37 0 ff
2387 01:01:20.842415 38 ff ff
2388 01:01:20.845596 39 ff ff
2389 01:01:20.845676 40 ff ff
2390 01:01:20.848506 41 ff ff
2391 01:01:20.848585 42 ff ff
2392 01:01:20.852071 43 ff ff
2393 01:01:20.852149 44 ff ff
2394 01:01:20.855508 pass bytecount = 0xff (0xff: all bytes pass)
2395 01:01:20.855585
2396 01:01:20.858806 DQS0 dly: 38
2397 01:01:20.858883 DQS1 dly: 33
2398 01:01:20.862082 Write Rank0 MR2 =0x2d
2399 01:01:20.865353 [RankSwap] Rank num 2, (Multi 1), Rank 0
2400 01:01:20.865430 Write Rank0 MR1 =0xd6
2401 01:01:20.868742 [Gating]
2402 01:01:20.868820 ==
2403 01:01:20.872200 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2404 01:01:20.875406 fsp= 1, odt_onoff= 1, Byte mode= 0
2405 01:01:20.875493 ==
2406 01:01:20.882037 3 1 0 |2c2b 909 |(11 11)(11 11) |(1 1)(0 0)| 0
2407 01:01:20.884878 3 1 4 |2c2b 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
2408 01:01:20.888200 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2409 01:01:20.894627 3 1 12 |2c2b 3636 |(11 11)(11 11) |(1 1)(1 1)| 0
2410 01:01:20.897717 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2411 01:01:20.901277 [Byte 0] Lead/lag falling Transition (3, 1, 16)
2412 01:01:20.907725 3 1 20 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 0)| 0
2413 01:01:20.910964 3 1 24 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
2414 01:01:20.914482 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2415 01:01:20.920835 3 2 0 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
2416 01:01:20.924727 [Byte 1] Lead/lag Transition tap number (1)
2417 01:01:20.927431 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2418 01:01:20.930570 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2419 01:01:20.937435 3 2 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2420 01:01:20.941330 3 2 16 |2c2b 3434 |(11 11)(11 11) |(1 0)(0 0)| 0
2421 01:01:20.943784 3 2 20 |2c2b 3434 |(11 11)(11 11) |(1 0)(0 0)| 0
2422 01:01:20.950378 [Byte 0] Lead/lag Transition tap number (10)
2423 01:01:20.953563 3 2 24 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2424 01:01:20.957332 3 2 28 |303 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
2425 01:01:20.960444 3 3 0 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
2426 01:01:20.966873 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2427 01:01:20.970295 3 3 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2428 01:01:20.973472 3 3 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2429 01:01:20.980398 3 3 16 |3534 3c3c |(11 11)(11 11) |(1 1)(1 1)| 0
2430 01:01:20.983674 3 3 20 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
2431 01:01:20.986727 3 3 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2432 01:01:20.993475 3 3 28 |3534 b0a |(11 11)(11 11) |(1 1)(1 1)| 0
2433 01:01:20.996670 3 4 0 |3534 b0a |(11 11)(11 11) |(0 0)(1 1)| 0
2434 01:01:20.999664 [Byte 1] Lead/lag Transition tap number (1)
2435 01:01:21.006547 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2436 01:01:21.009764 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2437 01:01:21.012736 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2438 01:01:21.019778 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2439 01:01:21.023044 3 4 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2440 01:01:21.026352 3 4 24 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2441 01:01:21.029078 3 4 28 |3d3d 504 |(11 11)(11 11) |(1 1)(0 1)| 0
2442 01:01:21.035817 3 5 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2443 01:01:21.039177 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2444 01:01:21.042241 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2445 01:01:21.048916 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2446 01:01:21.052061 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2447 01:01:21.055378 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2448 01:01:21.061735 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2449 01:01:21.065480 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2450 01:01:21.068601 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2451 01:01:21.075229 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2452 01:01:21.078454 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2453 01:01:21.082007 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2454 01:01:21.088458 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2455 01:01:21.091759 [Byte 0] Lead/lag falling Transition (3, 6, 16)
2456 01:01:21.095132 3 6 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2457 01:01:21.101828 [Byte 0] Lead/lag Transition tap number (2)
2458 01:01:21.104383 [Byte 1] Lead/lag falling Transition (3, 6, 20)
2459 01:01:21.108164 3 6 24 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2460 01:01:21.111147 [Byte 1] Lead/lag Transition tap number (2)
2461 01:01:21.117648 3 6 28 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
2462 01:01:21.117743 [Byte 0]First pass (3, 6, 28)
2463 01:01:21.124730 3 7 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2464 01:01:21.128026 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2465 01:01:21.131336 [Byte 1]First pass (3, 7, 4)
2466 01:01:21.134400 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2467 01:01:21.137244 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2468 01:01:21.140756 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2469 01:01:21.147795 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2470 01:01:21.150843 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2471 01:01:21.154108 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2472 01:01:21.157351 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2473 01:01:21.160598 4 0 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2474 01:01:21.167065 All bytes gating window > 1UI, Early break!
2475 01:01:21.167148
2476 01:01:21.170320 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 20)
2477 01:01:21.170398
2478 01:01:21.173517 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 24)
2479 01:01:21.173635
2480 01:01:21.173695
2481 01:01:21.173750
2482 01:01:21.176697 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2483 01:01:21.176775
2484 01:01:21.183167 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 24)
2485 01:01:21.183248
2486 01:01:21.183307
2487 01:01:21.183362 Write Rank0 MR1 =0x56
2488 01:01:21.183416
2489 01:01:21.186423 best RODT dly(2T, 0.5T) = (2, 3)
2490 01:01:21.186501
2491 01:01:21.189751 best RODT dly(2T, 0.5T) = (2, 3)
2492 01:01:21.189828 ==
2493 01:01:21.196565 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2494 01:01:21.199644 fsp= 1, odt_onoff= 1, Byte mode= 0
2495 01:01:21.199722 ==
2496 01:01:21.203230 Start DQ dly to find pass range UseTestEngine =0
2497 01:01:21.206388 x-axis: bit #, y-axis: DQ dly (-127~63)
2498 01:01:21.209763 RX Vref Scan = 0
2499 01:01:21.213015 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2500 01:01:21.213094 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2501 01:01:21.216157 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2502 01:01:21.219370 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2503 01:01:21.222651 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2504 01:01:21.226059 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2505 01:01:21.229436 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2506 01:01:21.232850 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2507 01:01:21.235930 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2508 01:01:21.239313 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2509 01:01:21.242496 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2510 01:01:21.242574 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2511 01:01:21.245653 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2512 01:01:21.248977 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2513 01:01:21.251963 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2514 01:01:21.255286 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2515 01:01:21.258509 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2516 01:01:21.262094 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2517 01:01:21.265423 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2518 01:01:21.265526 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2519 01:01:21.268212 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2520 01:01:21.271542 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2521 01:01:21.274935 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2522 01:01:21.278013 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2523 01:01:21.281671 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2524 01:01:21.285068 -1, [0] xxxxxxxx xxxxxxxo [MSB]
2525 01:01:21.288444 0, [0] xxxxxxxx xoxxxxxo [MSB]
2526 01:01:21.288523 1, [0] xxxoxxxx ooxxxxxo [MSB]
2527 01:01:21.291599 2, [0] xxxoxxxx ooxxxxxo [MSB]
2528 01:01:21.294449 3, [0] xxooxxxx ooxxxxxo [MSB]
2529 01:01:21.297823 4, [0] xoooxxxx oooxxxxo [MSB]
2530 01:01:21.301522 5, [0] xooooxxo ooooxxoo [MSB]
2531 01:01:21.304739 6, [0] xooooxxo oooooooo [MSB]
2532 01:01:21.304818 7, [0] xooooooo oooooooo [MSB]
2533 01:01:21.307848 8, [0] xooooooo oooooooo [MSB]
2534 01:01:21.311149 33, [0] oooxoooo ooooooox [MSB]
2535 01:01:21.314746 34, [0] oooxoooo ooooooox [MSB]
2536 01:01:21.317859 35, [0] oooxoooo xoooooox [MSB]
2537 01:01:21.321310 36, [0] ooxxoooo xxooooox [MSB]
2538 01:01:21.324417 37, [0] ooxxoooo xxooooox [MSB]
2539 01:01:21.324496 38, [0] ooxxooox xxooooox [MSB]
2540 01:01:21.327387 39, [0] xxxxxoox xxooxoox [MSB]
2541 01:01:21.331061 40, [0] xxxxxoox xxxoxoox [MSB]
2542 01:01:21.333784 41, [0] xxxxxxxx xxxxxxxx [MSB]
2543 01:01:21.337588 iDelay=41, Bit 0, Center 23 (9 ~ 38) 30
2544 01:01:21.340832 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
2545 01:01:21.344020 iDelay=41, Bit 2, Center 19 (3 ~ 35) 33
2546 01:01:21.347292 iDelay=41, Bit 3, Center 16 (1 ~ 32) 32
2547 01:01:21.350418 iDelay=41, Bit 4, Center 21 (5 ~ 38) 34
2548 01:01:21.357063 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2549 01:01:21.360358 iDelay=41, Bit 6, Center 23 (7 ~ 40) 34
2550 01:01:21.363751 iDelay=41, Bit 7, Center 21 (5 ~ 37) 33
2551 01:01:21.367127 iDelay=41, Bit 8, Center 17 (1 ~ 34) 34
2552 01:01:21.370036 iDelay=41, Bit 9, Center 17 (0 ~ 35) 36
2553 01:01:21.373763 iDelay=41, Bit 10, Center 21 (4 ~ 39) 36
2554 01:01:21.376997 iDelay=41, Bit 11, Center 22 (5 ~ 40) 36
2555 01:01:21.380346 iDelay=41, Bit 12, Center 22 (6 ~ 38) 33
2556 01:01:21.383811 iDelay=41, Bit 13, Center 23 (6 ~ 40) 35
2557 01:01:21.386738 iDelay=41, Bit 14, Center 22 (5 ~ 40) 36
2558 01:01:21.389643 iDelay=41, Bit 15, Center 14 (-3 ~ 32) 36
2559 01:01:21.393374 ==
2560 01:01:21.396510 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2561 01:01:21.400381 fsp= 1, odt_onoff= 1, Byte mode= 0
2562 01:01:21.400459 ==
2563 01:01:21.400519 DQS Delay:
2564 01:01:21.403195 DQS0 = 0, DQS1 = 0
2565 01:01:21.403272 DQM Delay:
2566 01:01:21.406630 DQM0 = 20, DQM1 = 19
2567 01:01:21.406708 DQ Delay:
2568 01:01:21.409494 DQ0 =23, DQ1 =21, DQ2 =19, DQ3 =16
2569 01:01:21.412968 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =21
2570 01:01:21.415899 DQ8 =17, DQ9 =17, DQ10 =21, DQ11 =22
2571 01:01:21.419243 DQ12 =22, DQ13 =23, DQ14 =22, DQ15 =14
2572 01:01:21.419322
2573 01:01:21.419382
2574 01:01:21.422746 DramC Write-DBI off
2575 01:01:21.422823 ==
2576 01:01:21.426041 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2577 01:01:21.429350 fsp= 1, odt_onoff= 1, Byte mode= 0
2578 01:01:21.429430 ==
2579 01:01:21.435611 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2580 01:01:21.435689
2581 01:01:21.438975 Begin, DQ Scan Range 929~1185
2582 01:01:21.439052
2583 01:01:21.439111
2584 01:01:21.439166 TX Vref Scan disable
2585 01:01:21.442687 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2586 01:01:21.445976 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2587 01:01:21.449131 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2588 01:01:21.455827 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2589 01:01:21.459056 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2590 01:01:21.461793 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2591 01:01:21.465254 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2592 01:01:21.468471 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2593 01:01:21.471841 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2594 01:01:21.475159 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2595 01:01:21.478598 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2596 01:01:21.481818 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2597 01:01:21.484971 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2598 01:01:21.488210 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2599 01:01:21.491708 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2600 01:01:21.497814 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2601 01:01:21.500955 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2602 01:01:21.504494 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2603 01:01:21.507805 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2604 01:01:21.510987 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2605 01:01:21.514095 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2606 01:01:21.518091 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2607 01:01:21.521213 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2608 01:01:21.524688 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2609 01:01:21.527642 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2610 01:01:21.530733 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2611 01:01:21.534029 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2612 01:01:21.537215 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2613 01:01:21.543760 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2614 01:01:21.547410 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2615 01:01:21.550409 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2616 01:01:21.553707 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2617 01:01:21.556786 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2618 01:01:21.560817 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2619 01:01:21.563441 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2620 01:01:21.566832 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2621 01:01:21.570167 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2622 01:01:21.573489 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2623 01:01:21.576789 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2624 01:01:21.580124 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2625 01:01:21.583428 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2626 01:01:21.587035 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2627 01:01:21.589927 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2628 01:01:21.592966 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2629 01:01:21.599637 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2630 01:01:21.602703 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2631 01:01:21.606402 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2632 01:01:21.609462 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2633 01:01:21.612785 977 |3 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2634 01:01:21.616194 978 |3 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2635 01:01:21.619480 979 |3 6 19|[0] xxxxxxxx xxxxxxxx [MSB]
2636 01:01:21.622657 980 |3 6 20|[0] xxxxxxxx oxxxxxxo [MSB]
2637 01:01:21.625737 981 |3 6 21|[0] xxxxxxxx ooxxxxxo [MSB]
2638 01:01:21.629135 982 |3 6 22|[0] xxxxxxxx ooxxxxxo [MSB]
2639 01:01:21.632375 983 |3 6 23|[0] xxxxxxxx ooxxxxxo [MSB]
2640 01:01:21.635712 984 |3 6 24|[0] xxxxxxxx oooxoxxo [MSB]
2641 01:01:21.639126 985 |3 6 25|[0] xxxxxxxx oooooooo [MSB]
2642 01:01:21.646881 995 |3 6 35|[0] oooooooo ooooooox [MSB]
2643 01:01:21.649842 996 |3 6 36|[0] oooooooo ooooooox [MSB]
2644 01:01:21.653306 997 |3 6 37|[0] oooooooo ooooooox [MSB]
2645 01:01:21.656710 998 |3 6 38|[0] oooooooo ooooooox [MSB]
2646 01:01:21.659983 999 |3 6 39|[0] oooooooo oxooooox [MSB]
2647 01:01:21.663008 1000 |3 6 40|[0] oooooooo oxooooox [MSB]
2648 01:01:21.666715 1001 |3 6 41|[0] oooooooo xxxxxxxx [MSB]
2649 01:01:21.669928 1002 |3 6 42|[0] oooooooo xxxxxxxx [MSB]
2650 01:01:21.673214 1003 |3 6 43|[0] oooooooo xxxxxxxx [MSB]
2651 01:01:21.676604 1004 |3 6 44|[0] oooxoooo xxxxxxxx [MSB]
2652 01:01:21.679740 1005 |3 6 45|[0] oooxoooo xxxxxxxx [MSB]
2653 01:01:21.686383 1006 |3 6 46|[0] oooxoooo xxxxxxxx [MSB]
2654 01:01:21.689792 1007 |3 6 47|[0] ooxxoooo xxxxxxxx [MSB]
2655 01:01:21.693090 1008 |3 6 48|[0] ooxxooox xxxxxxxx [MSB]
2656 01:01:21.695776 1009 |3 6 49|[0] xxxxxxxx xxxxxxxx [MSB]
2657 01:01:21.699331 Byte0, DQ PI dly=995, DQM PI dly= 995
2658 01:01:21.702654 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 35)
2659 01:01:21.702732
2660 01:01:21.709402 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 35)
2661 01:01:21.709480
2662 01:01:21.712602 Byte1, DQ PI dly=989, DQM PI dly= 989
2663 01:01:21.715662 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2664 01:01:21.715739
2665 01:01:21.719155 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2666 01:01:21.719233
2667 01:01:21.719292 ==
2668 01:01:21.725539 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2669 01:01:21.729270 fsp= 1, odt_onoff= 1, Byte mode= 0
2670 01:01:21.729348 ==
2671 01:01:21.732555 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2672 01:01:21.732632
2673 01:01:21.735964 Begin, DQ Scan Range 965~1029
2674 01:01:21.738618 Write Rank0 MR14 =0x0
2675 01:01:21.746440
2676 01:01:21.746519 CH=1, VrefRange= 0, VrefLevel = 0
2677 01:01:21.753215 TX Bit0 (989~1006) 18 997, Bit8 (985~994) 10 989,
2678 01:01:21.756440 TX Bit1 (986~1005) 20 995, Bit9 (984~993) 10 988,
2679 01:01:21.762869 TX Bit2 (985~1000) 16 992, Bit10 (986~997) 12 991,
2680 01:01:21.765985 TX Bit3 (985~998) 14 991, Bit11 (987~996) 10 991,
2681 01:01:21.772504 TX Bit4 (989~1004) 16 996, Bit12 (986~997) 12 991,
2682 01:01:21.775622 TX Bit5 (990~1005) 16 997, Bit13 (987~997) 11 992,
2683 01:01:21.779237 TX Bit6 (989~1005) 17 997, Bit14 (986~994) 9 990,
2684 01:01:21.785648 TX Bit7 (988~1002) 15 995, Bit15 (981~989) 9 985,
2685 01:01:21.785726
2686 01:01:21.785785 Write Rank0 MR14 =0x2
2687 01:01:21.795374
2688 01:01:21.795453 CH=1, VrefRange= 0, VrefLevel = 2
2689 01:01:21.802294 TX Bit0 (989~1006) 18 997, Bit8 (984~994) 11 989,
2690 01:01:21.805329 TX Bit1 (986~1005) 20 995, Bit9 (984~994) 11 989,
2691 01:01:21.811775 TX Bit2 (985~1000) 16 992, Bit10 (985~998) 14 991,
2692 01:01:21.814681 TX Bit3 (984~998) 15 991, Bit11 (986~997) 12 991,
2693 01:01:21.821195 TX Bit4 (987~1005) 19 996, Bit12 (986~998) 13 992,
2694 01:01:21.824772 TX Bit5 (990~1006) 17 998, Bit13 (986~998) 13 992,
2695 01:01:21.828003 TX Bit6 (988~1005) 18 996, Bit14 (986~995) 10 990,
2696 01:01:21.834625 TX Bit7 (987~1003) 17 995, Bit15 (980~990) 11 985,
2697 01:01:21.834703
2698 01:01:21.834763 Write Rank0 MR14 =0x4
2699 01:01:21.844292
2700 01:01:21.844368 CH=1, VrefRange= 0, VrefLevel = 4
2701 01:01:21.850900 TX Bit0 (989~1006) 18 997, Bit8 (982~995) 14 988,
2702 01:01:21.854346 TX Bit1 (986~1006) 21 996, Bit9 (983~994) 12 988,
2703 01:01:21.860871 TX Bit2 (985~1002) 18 993, Bit10 (985~1000) 16 992,
2704 01:01:21.864082 TX Bit3 (984~999) 16 991, Bit11 (986~999) 14 992,
2705 01:01:21.870515 TX Bit4 (987~1005) 19 996, Bit12 (986~999) 14 992,
2706 01:01:21.873466 TX Bit5 (989~1006) 18 997, Bit13 (986~999) 14 992,
2707 01:01:21.876851 TX Bit6 (987~1006) 20 996, Bit14 (986~995) 10 990,
2708 01:01:21.883366 TX Bit7 (986~1005) 20 995, Bit15 (980~992) 13 986,
2709 01:01:21.883444
2710 01:01:21.883504 Write Rank0 MR14 =0x6
2711 01:01:21.893349
2712 01:01:21.893426 CH=1, VrefRange= 0, VrefLevel = 6
2713 01:01:21.900263 TX Bit0 (987~1007) 21 997, Bit8 (983~996) 14 989,
2714 01:01:21.903769 TX Bit1 (986~1006) 21 996, Bit9 (983~995) 13 989,
2715 01:01:21.909562 TX Bit2 (985~1003) 19 994, Bit10 (985~1000) 16 992,
2716 01:01:21.913326 TX Bit3 (984~999) 16 991, Bit11 (986~1000) 15 993,
2717 01:01:21.919611 TX Bit4 (986~1006) 21 996, Bit12 (985~1000) 16 992,
2718 01:01:21.922896 TX Bit5 (988~1006) 19 997, Bit13 (986~1000) 15 993,
2719 01:01:21.926623 TX Bit6 (986~1006) 21 996, Bit14 (986~997) 12 991,
2720 01:01:21.933299 TX Bit7 (986~1005) 20 995, Bit15 (980~992) 13 986,
2721 01:01:21.933377
2722 01:01:21.933437 Write Rank0 MR14 =0x8
2723 01:01:21.943131
2724 01:01:21.943208 CH=1, VrefRange= 0, VrefLevel = 8
2725 01:01:21.949292 TX Bit0 (987~1007) 21 997, Bit8 (982~996) 15 989,
2726 01:01:21.952834 TX Bit1 (985~1007) 23 996, Bit9 (982~995) 14 988,
2727 01:01:21.959288 TX Bit2 (985~1003) 19 994, Bit10 (985~1000) 16 992,
2728 01:01:21.962602 TX Bit3 (984~1000) 17 992, Bit11 (986~1000) 15 993,
2729 01:01:21.969362 TX Bit4 (986~1006) 21 996, Bit12 (986~1000) 15 993,
2730 01:01:21.972954 TX Bit5 (987~1007) 21 997, Bit13 (986~1000) 15 993,
2731 01:01:21.976168 TX Bit6 (986~1007) 22 996, Bit14 (986~997) 12 991,
2732 01:01:21.982372 TX Bit7 (986~1006) 21 996, Bit15 (979~993) 15 986,
2733 01:01:21.982449
2734 01:01:21.985567 Write Rank0 MR14 =0xa
2735 01:01:21.992589
2736 01:01:21.995916 CH=1, VrefRange= 0, VrefLevel = 10
2737 01:01:21.999251 TX Bit0 (987~1007) 21 997, Bit8 (982~997) 16 989,
2738 01:01:22.002435 TX Bit1 (986~1007) 22 996, Bit9 (981~996) 16 988,
2739 01:01:22.008760 TX Bit2 (985~1005) 21 995, Bit10 (985~1001) 17 993,
2740 01:01:22.012515 TX Bit3 (984~1001) 18 992, Bit11 (986~1001) 16 993,
2741 01:01:22.018600 TX Bit4 (986~1006) 21 996, Bit12 (985~1001) 17 993,
2742 01:01:22.022468 TX Bit5 (987~1007) 21 997, Bit13 (986~1001) 16 993,
2743 01:01:22.028288 TX Bit6 (986~1007) 22 996, Bit14 (985~998) 14 991,
2744 01:01:22.032019 TX Bit7 (986~1006) 21 996, Bit15 (979~993) 15 986,
2745 01:01:22.032097
2746 01:01:22.035587 Write Rank0 MR14 =0xc
2747 01:01:22.042441
2748 01:01:22.045580 CH=1, VrefRange= 0, VrefLevel = 12
2749 01:01:22.049186 TX Bit0 (986~1008) 23 997, Bit8 (981~998) 18 989,
2750 01:01:22.051908 TX Bit1 (985~1007) 23 996, Bit9 (982~996) 15 989,
2751 01:01:22.058866 TX Bit2 (985~1005) 21 995, Bit10 (985~1001) 17 993,
2752 01:01:22.062735 TX Bit3 (983~1002) 20 992, Bit11 (985~1001) 17 993,
2753 01:01:22.068495 TX Bit4 (986~1007) 22 996, Bit12 (984~1001) 18 992,
2754 01:01:22.071918 TX Bit5 (987~1007) 21 997, Bit13 (986~1001) 16 993,
2755 01:01:22.078448 TX Bit6 (985~1007) 23 996, Bit14 (985~999) 15 992,
2756 01:01:22.081967 TX Bit7 (985~1006) 22 995, Bit15 (978~994) 17 986,
2757 01:01:22.082049
2758 01:01:22.085107 Write Rank0 MR14 =0xe
2759 01:01:22.092401
2760 01:01:22.095714 CH=1, VrefRange= 0, VrefLevel = 14
2761 01:01:22.098963 TX Bit0 (986~1008) 23 997, Bit8 (981~998) 18 989,
2762 01:01:22.102202 TX Bit1 (985~1008) 24 996, Bit9 (981~997) 17 989,
2763 01:01:22.108983 TX Bit2 (984~1006) 23 995, Bit10 (984~1002) 19 993,
2764 01:01:22.112094 TX Bit3 (983~1003) 21 993, Bit11 (985~1002) 18 993,
2765 01:01:22.118564 TX Bit4 (985~1007) 23 996, Bit12 (985~1001) 17 993,
2766 01:01:22.121502 TX Bit5 (986~1008) 23 997, Bit13 (986~1001) 16 993,
2767 01:01:22.128075 TX Bit6 (985~1008) 24 996, Bit14 (984~1000) 17 992,
2768 01:01:22.131775 TX Bit7 (985~1007) 23 996, Bit15 (978~994) 17 986,
2769 01:01:22.131853
2770 01:01:22.134928 Write Rank0 MR14 =0x10
2771 01:01:22.142750
2772 01:01:22.145553 CH=1, VrefRange= 0, VrefLevel = 16
2773 01:01:22.149070 TX Bit0 (987~1009) 23 998, Bit8 (980~999) 20 989,
2774 01:01:22.152084 TX Bit1 (985~1008) 24 996, Bit9 (981~998) 18 989,
2775 01:01:22.158797 TX Bit2 (984~1006) 23 995, Bit10 (984~1002) 19 993,
2776 01:01:22.161840 TX Bit3 (983~1003) 21 993, Bit11 (985~1002) 18 993,
2777 01:01:22.168408 TX Bit4 (985~1007) 23 996, Bit12 (985~1002) 18 993,
2778 01:01:22.171697 TX Bit5 (986~1008) 23 997, Bit13 (985~1002) 18 993,
2779 01:01:22.178710 TX Bit6 (985~1008) 24 996, Bit14 (984~1001) 18 992,
2780 01:01:22.181793 TX Bit7 (985~1007) 23 996, Bit15 (977~995) 19 986,
2781 01:01:22.181871
2782 01:01:22.184820 Write Rank0 MR14 =0x12
2783 01:01:22.192358
2784 01:01:22.195671 CH=1, VrefRange= 0, VrefLevel = 18
2785 01:01:22.199037 TX Bit0 (986~1009) 24 997, Bit8 (980~1000) 21 990,
2786 01:01:22.202364 TX Bit1 (985~1008) 24 996, Bit9 (980~999) 20 989,
2787 01:01:22.209122 TX Bit2 (984~1006) 23 995, Bit10 (983~1002) 20 992,
2788 01:01:22.212386 TX Bit3 (983~1004) 22 993, Bit11 (985~1002) 18 993,
2789 01:01:22.219205 TX Bit4 (985~1008) 24 996, Bit12 (984~1002) 19 993,
2790 01:01:22.222384 TX Bit5 (986~1009) 24 997, Bit13 (985~1002) 18 993,
2791 01:01:22.228855 TX Bit6 (985~1008) 24 996, Bit14 (984~1001) 18 992,
2792 01:01:22.232070 TX Bit7 (985~1007) 23 996, Bit15 (977~995) 19 986,
2793 01:01:22.232148
2794 01:01:22.235255 wait MRW command Rank0 MR14 =0x14 fired (1)
2795 01:01:22.238717 Write Rank0 MR14 =0x14
2796 01:01:22.246865
2797 01:01:22.250097 CH=1, VrefRange= 0, VrefLevel = 20
2798 01:01:22.253295 TX Bit0 (985~1010) 26 997, Bit8 (980~1001) 22 990,
2799 01:01:22.256642 TX Bit1 (985~1009) 25 997, Bit9 (980~1000) 21 990,
2800 01:01:22.263517 TX Bit2 (984~1007) 24 995, Bit10 (983~1003) 21 993,
2801 01:01:22.266816 TX Bit3 (982~1005) 24 993, Bit11 (984~1003) 20 993,
2802 01:01:22.273493 TX Bit4 (985~1008) 24 996, Bit12 (984~1002) 19 993,
2803 01:01:22.276593 TX Bit5 (986~1009) 24 997, Bit13 (985~1002) 18 993,
2804 01:01:22.282836 TX Bit6 (985~1009) 25 997, Bit14 (984~1001) 18 992,
2805 01:01:22.286040 TX Bit7 (985~1007) 23 996, Bit15 (978~995) 18 986,
2806 01:01:22.286118
2807 01:01:22.289666 Write Rank0 MR14 =0x16
2808 01:01:22.297438
2809 01:01:22.300816 CH=1, VrefRange= 0, VrefLevel = 22
2810 01:01:22.304103 TX Bit0 (985~1010) 26 997, Bit8 (979~1001) 23 990,
2811 01:01:22.307557 TX Bit1 (985~1009) 25 997, Bit9 (980~1000) 21 990,
2812 01:01:22.313998 TX Bit2 (983~1007) 25 995, Bit10 (983~1003) 21 993,
2813 01:01:22.317166 TX Bit3 (982~1005) 24 993, Bit11 (984~1003) 20 993,
2814 01:01:22.323609 TX Bit4 (985~1008) 24 996, Bit12 (984~1003) 20 993,
2815 01:01:22.326999 TX Bit5 (985~1010) 26 997, Bit13 (984~1003) 20 993,
2816 01:01:22.333735 TX Bit6 (985~1009) 25 997, Bit14 (983~1002) 20 992,
2817 01:01:22.336743 TX Bit7 (985~1008) 24 996, Bit15 (977~996) 20 986,
2818 01:01:22.336821
2819 01:01:22.339589 Write Rank0 MR14 =0x18
2820 01:01:22.348130
2821 01:01:22.351308 CH=1, VrefRange= 0, VrefLevel = 24
2822 01:01:22.354391 TX Bit0 (985~1010) 26 997, Bit8 (979~1001) 23 990,
2823 01:01:22.357673 TX Bit1 (984~1009) 26 996, Bit9 (979~1000) 22 989,
2824 01:01:22.364162 TX Bit2 (983~1008) 26 995, Bit10 (982~1003) 22 992,
2825 01:01:22.367803 TX Bit3 (982~1006) 25 994, Bit11 (984~1003) 20 993,
2826 01:01:22.373785 TX Bit4 (984~1009) 26 996, Bit12 (983~1003) 21 993,
2827 01:01:22.377221 TX Bit5 (985~1010) 26 997, Bit13 (984~1003) 20 993,
2828 01:01:22.383828 TX Bit6 (985~1009) 25 997, Bit14 (982~1002) 21 992,
2829 01:01:22.386972 TX Bit7 (985~1009) 25 997, Bit15 (977~997) 21 987,
2830 01:01:22.387049
2831 01:01:22.390363 Write Rank0 MR14 =0x1a
2832 01:01:22.398375
2833 01:01:22.401539 CH=1, VrefRange= 0, VrefLevel = 26
2834 01:01:22.404846 TX Bit0 (985~1011) 27 998, Bit8 (978~1001) 24 989,
2835 01:01:22.408544 TX Bit1 (984~1010) 27 997, Bit9 (979~1001) 23 990,
2836 01:01:22.415318 TX Bit2 (983~1008) 26 995, Bit10 (982~1003) 22 992,
2837 01:01:22.418134 TX Bit3 (981~1006) 26 993, Bit11 (984~1004) 21 994,
2838 01:01:22.424913 TX Bit4 (984~1009) 26 996, Bit12 (983~1003) 21 993,
2839 01:01:22.428222 TX Bit5 (986~1011) 26 998, Bit13 (984~1003) 20 993,
2840 01:01:22.434858 TX Bit6 (985~1010) 26 997, Bit14 (983~1002) 20 992,
2841 01:01:22.437443 TX Bit7 (985~1009) 25 997, Bit15 (976~997) 22 986,
2842 01:01:22.437542
2843 01:01:22.440788 Write Rank0 MR14 =0x1c
2844 01:01:22.449172
2845 01:01:22.452978 CH=1, VrefRange= 0, VrefLevel = 28
2846 01:01:22.456091 TX Bit0 (985~1012) 28 998, Bit8 (979~1002) 24 990,
2847 01:01:22.459192 TX Bit1 (984~1010) 27 997, Bit9 (979~1001) 23 990,
2848 01:01:22.465679 TX Bit2 (983~1008) 26 995, Bit10 (981~1003) 23 992,
2849 01:01:22.469084 TX Bit3 (981~1006) 26 993, Bit11 (983~1004) 22 993,
2850 01:01:22.475305 TX Bit4 (984~1010) 27 997, Bit12 (983~1003) 21 993,
2851 01:01:22.478681 TX Bit5 (985~1011) 27 998, Bit13 (984~1004) 21 994,
2852 01:01:22.485311 TX Bit6 (985~1010) 26 997, Bit14 (982~1003) 22 992,
2853 01:01:22.488582 TX Bit7 (985~1010) 26 997, Bit15 (977~998) 22 987,
2854 01:01:22.488659
2855 01:01:22.491855 Write Rank0 MR14 =0x1e
2856 01:01:22.500501
2857 01:01:22.503764 CH=1, VrefRange= 0, VrefLevel = 30
2858 01:01:22.506398 TX Bit0 (985~1012) 28 998, Bit8 (979~1002) 24 990,
2859 01:01:22.509915 TX Bit1 (984~1010) 27 997, Bit9 (979~1001) 23 990,
2860 01:01:22.516341 TX Bit2 (983~1008) 26 995, Bit10 (981~1003) 23 992,
2861 01:01:22.519998 TX Bit3 (981~1006) 26 993, Bit11 (983~1004) 22 993,
2862 01:01:22.526597 TX Bit4 (984~1010) 27 997, Bit12 (983~1003) 21 993,
2863 01:01:22.529770 TX Bit5 (985~1011) 27 998, Bit13 (984~1004) 21 994,
2864 01:01:22.536427 TX Bit6 (985~1010) 26 997, Bit14 (982~1003) 22 992,
2865 01:01:22.539378 TX Bit7 (985~1010) 26 997, Bit15 (977~998) 22 987,
2866 01:01:22.539455
2867 01:01:22.542287 Write Rank0 MR14 =0x20
2868 01:01:22.550713
2869 01:01:22.554403 CH=1, VrefRange= 0, VrefLevel = 32
2870 01:01:22.557241 TX Bit0 (985~1012) 28 998, Bit8 (979~1002) 24 990,
2871 01:01:22.560481 TX Bit1 (984~1010) 27 997, Bit9 (979~1001) 23 990,
2872 01:01:22.567335 TX Bit2 (983~1008) 26 995, Bit10 (981~1003) 23 992,
2873 01:01:22.570948 TX Bit3 (981~1006) 26 993, Bit11 (983~1004) 22 993,
2874 01:01:22.577361 TX Bit4 (984~1010) 27 997, Bit12 (983~1003) 21 993,
2875 01:01:22.580442 TX Bit5 (985~1011) 27 998, Bit13 (984~1004) 21 994,
2876 01:01:22.587081 TX Bit6 (985~1010) 26 997, Bit14 (982~1003) 22 992,
2877 01:01:22.590501 TX Bit7 (985~1010) 26 997, Bit15 (977~998) 22 987,
2878 01:01:22.590586
2879 01:01:22.593817 Write Rank0 MR14 =0x22
2880 01:01:22.601495
2881 01:01:22.604825 CH=1, VrefRange= 0, VrefLevel = 34
2882 01:01:22.608151 TX Bit0 (985~1012) 28 998, Bit8 (979~1002) 24 990,
2883 01:01:22.611503 TX Bit1 (984~1010) 27 997, Bit9 (979~1001) 23 990,
2884 01:01:22.618162 TX Bit2 (983~1008) 26 995, Bit10 (981~1003) 23 992,
2885 01:01:22.621504 TX Bit3 (981~1006) 26 993, Bit11 (983~1004) 22 993,
2886 01:01:22.627900 TX Bit4 (984~1010) 27 997, Bit12 (983~1003) 21 993,
2887 01:01:22.631080 TX Bit5 (985~1011) 27 998, Bit13 (984~1004) 21 994,
2888 01:01:22.637975 TX Bit6 (985~1010) 26 997, Bit14 (982~1003) 22 992,
2889 01:01:22.640539 TX Bit7 (985~1010) 26 997, Bit15 (977~998) 22 987,
2890 01:01:22.640615
2891 01:01:22.643928 Write Rank0 MR14 =0x24
2892 01:01:22.652197
2893 01:01:22.655662 CH=1, VrefRange= 0, VrefLevel = 36
2894 01:01:22.658872 TX Bit0 (985~1012) 28 998, Bit8 (979~1002) 24 990,
2895 01:01:22.661991 TX Bit1 (984~1010) 27 997, Bit9 (979~1001) 23 990,
2896 01:01:22.668780 TX Bit2 (983~1008) 26 995, Bit10 (981~1003) 23 992,
2897 01:01:22.671654 TX Bit3 (981~1006) 26 993, Bit11 (983~1004) 22 993,
2898 01:01:22.678818 TX Bit4 (984~1010) 27 997, Bit12 (983~1003) 21 993,
2899 01:01:22.681481 TX Bit5 (985~1011) 27 998, Bit13 (984~1004) 21 994,
2900 01:01:22.688294 TX Bit6 (985~1010) 26 997, Bit14 (982~1003) 22 992,
2901 01:01:22.692071 TX Bit7 (985~1010) 26 997, Bit15 (977~998) 22 987,
2902 01:01:22.692148
2903 01:01:22.692207
2904 01:01:22.695156 TX Vref found, early break! 366< 371
2905 01:01:22.701509 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2906 01:01:22.701612 u1DelayCellOfst[0]=6 cells (5 PI)
2907 01:01:22.704774 u1DelayCellOfst[1]=5 cells (4 PI)
2908 01:01:22.707766 u1DelayCellOfst[2]=2 cells (2 PI)
2909 01:01:22.711440 u1DelayCellOfst[3]=0 cells (0 PI)
2910 01:01:22.714702 u1DelayCellOfst[4]=5 cells (4 PI)
2911 01:01:22.717953 u1DelayCellOfst[5]=6 cells (5 PI)
2912 01:01:22.721447 u1DelayCellOfst[6]=5 cells (4 PI)
2913 01:01:22.724745 u1DelayCellOfst[7]=5 cells (4 PI)
2914 01:01:22.727447 Byte0, DQ PI dly=993, DQM PI dly= 995
2915 01:01:22.730724 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 33)
2916 01:01:22.730800
2917 01:01:22.737718 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 33)
2918 01:01:22.737794
2919 01:01:22.740707 u1DelayCellOfst[8]=3 cells (3 PI)
2920 01:01:22.740782 u1DelayCellOfst[9]=3 cells (3 PI)
2921 01:01:22.744022 u1DelayCellOfst[10]=6 cells (5 PI)
2922 01:01:22.747414 u1DelayCellOfst[11]=7 cells (6 PI)
2923 01:01:22.750820 u1DelayCellOfst[12]=7 cells (6 PI)
2924 01:01:22.754060 u1DelayCellOfst[13]=9 cells (7 PI)
2925 01:01:22.757236 u1DelayCellOfst[14]=6 cells (5 PI)
2926 01:01:22.760756 u1DelayCellOfst[15]=0 cells (0 PI)
2927 01:01:22.764083 Byte1, DQ PI dly=987, DQM PI dly= 990
2928 01:01:22.767129 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
2929 01:01:22.770553
2930 01:01:22.773804 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
2931 01:01:22.773880
2932 01:01:22.773938 Write Rank0 MR14 =0x1c
2933 01:01:22.777015
2934 01:01:22.777090 Final TX Range 0 Vref 28
2935 01:01:22.777148
2936 01:01:22.783616 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2937 01:01:22.783692
2938 01:01:22.789997 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2939 01:01:22.796550 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2940 01:01:22.806792 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2941 01:01:22.806869 Write Rank0 MR3 =0xb0
2942 01:01:22.809938 DramC Write-DBI on
2943 01:01:22.810013 ==
2944 01:01:22.813053 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2945 01:01:22.816313 fsp= 1, odt_onoff= 1, Byte mode= 0
2946 01:01:22.816390 ==
2947 01:01:22.822855 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2948 01:01:22.822931
2949 01:01:22.822990 Begin, DQ Scan Range 710~774
2950 01:01:22.826335
2951 01:01:22.826411
2952 01:01:22.826469 TX Vref Scan disable
2953 01:01:22.829162 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2954 01:01:22.832527 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2955 01:01:22.835832 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2956 01:01:22.839170 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2957 01:01:22.842599 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2958 01:01:22.849198 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2959 01:01:22.852425 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2960 01:01:22.855711 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2961 01:01:22.858787 718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2962 01:01:22.862125 719 |2 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2963 01:01:22.865528 720 |2 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2964 01:01:22.868948 721 |2 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2965 01:01:22.872239 722 |2 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2966 01:01:22.875350 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2967 01:01:22.878898 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2968 01:01:22.881914 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
2969 01:01:22.885128 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
2970 01:01:22.888368 727 |2 6 23|[0] xxxxxxxx oooooooo [MSB]
2971 01:01:22.895046 728 |2 6 24|[0] xxxxxxxx oooooooo [MSB]
2972 01:01:22.901317 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2973 01:01:22.905030 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2974 01:01:22.908366 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2975 01:01:22.911365 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2976 01:01:22.914716 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
2977 01:01:22.917869 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
2978 01:01:22.921461 753 |2 6 49|[0] oooooooo xxxxxxxx [MSB]
2979 01:01:22.924724 754 |2 6 50|[0] oooooooo xxxxxxxx [MSB]
2980 01:01:22.928005 755 |2 6 51|[0] oooooooo xxxxxxxx [MSB]
2981 01:01:22.931106 756 |2 6 52|[0] oooooooo xxxxxxxx [MSB]
2982 01:01:22.934112 757 |2 6 53|[0] xxxxxxxx xxxxxxxx [MSB]
2983 01:01:22.937460 Byte0, DQ PI dly=742, DQM PI dly= 742
2984 01:01:22.944091 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 38)
2985 01:01:22.944169
2986 01:01:22.947505 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 38)
2987 01:01:22.947583
2988 01:01:22.950796 Byte1, DQ PI dly=734, DQM PI dly= 734
2989 01:01:22.953997 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 30)
2990 01:01:22.954074
2991 01:01:22.960507 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 30)
2992 01:01:22.960585
2993 01:01:22.967438 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2994 01:01:22.974062 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2995 01:01:22.980012 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2996 01:01:22.983821 Write Rank0 MR3 =0x30
2997 01:01:22.983908 DramC Write-DBI off
2998 01:01:22.984002
2999 01:01:22.984065 [DATLAT]
3000 01:01:22.986811 Freq=1600, CH1 RK0, use_rxtx_scan=0
3001 01:01:22.989964
3002 01:01:22.990041 DATLAT Default: 0xf
3003 01:01:22.993218 7, 0xFFFF, sum=0
3004 01:01:22.993295 8, 0xFFFF, sum=0
3005 01:01:22.993355 9, 0xFFFF, sum=0
3006 01:01:22.996560 10, 0xFFFF, sum=0
3007 01:01:22.996638 11, 0xFFFF, sum=0
3008 01:01:22.999845 12, 0xFFFF, sum=0
3009 01:01:22.999923 13, 0xFFFF, sum=0
3010 01:01:23.003171 14, 0x0, sum=1
3011 01:01:23.003248 15, 0x0, sum=2
3012 01:01:23.006596 16, 0x0, sum=3
3013 01:01:23.006673 17, 0x0, sum=4
3014 01:01:23.013122 pattern=2 first_step=14 total pass=5 best_step=16
3015 01:01:23.013212 ==
3016 01:01:23.016160 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3017 01:01:23.019659 fsp= 1, odt_onoff= 1, Byte mode= 0
3018 01:01:23.019734 ==
3019 01:01:23.023187 Start DQ dly to find pass range UseTestEngine =1
3020 01:01:23.029395 x-axis: bit #, y-axis: DQ dly (-127~63)
3021 01:01:23.029500 RX Vref Scan = 1
3022 01:01:23.144257
3023 01:01:23.144370 RX Vref found, early break!
3024 01:01:23.144430
3025 01:01:23.150815 Final RX Vref 11, apply to both rank0 and 1
3026 01:01:23.150892 ==
3027 01:01:23.154654 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3028 01:01:23.157749 fsp= 1, odt_onoff= 1, Byte mode= 0
3029 01:01:23.157826 ==
3030 01:01:23.160715 DQS Delay:
3031 01:01:23.160791 DQS0 = 0, DQS1 = 0
3032 01:01:23.160849 DQM Delay:
3033 01:01:23.164307 DQM0 = 20, DQM1 = 19
3034 01:01:23.164383 DQ Delay:
3035 01:01:23.167171 DQ0 =22, DQ1 =20, DQ2 =19, DQ3 =16
3036 01:01:23.171024 DQ4 =20, DQ5 =22, DQ6 =25, DQ7 =21
3037 01:01:23.173857 DQ8 =17, DQ9 =17, DQ10 =20, DQ11 =21
3038 01:01:23.177127 DQ12 =22, DQ13 =21, DQ14 =22, DQ15 =14
3039 01:01:23.177203
3040 01:01:23.177262
3041 01:01:23.177316
3042 01:01:23.180953 [DramC_TX_OE_Calibration] TA2
3043 01:01:23.183797 Original DQ_B0 (3 6) =30, OEN = 27
3044 01:01:23.186734 Original DQ_B1 (3 6) =30, OEN = 27
3045 01:01:23.190168 23, 0x0, End_B0=23 End_B1=23
3046 01:01:23.193481 24, 0x0, End_B0=24 End_B1=24
3047 01:01:23.193583 25, 0x0, End_B0=25 End_B1=25
3048 01:01:23.196728 26, 0x0, End_B0=26 End_B1=26
3049 01:01:23.199966 27, 0x0, End_B0=27 End_B1=27
3050 01:01:23.203477 28, 0x0, End_B0=28 End_B1=28
3051 01:01:23.206607 29, 0x0, End_B0=29 End_B1=29
3052 01:01:23.206685 30, 0x0, End_B0=30 End_B1=30
3053 01:01:23.210014 31, 0xFFFF, End_B0=30 End_B1=30
3054 01:01:23.216757 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3055 01:01:23.222789 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3056 01:01:23.222866
3057 01:01:23.222925
3058 01:01:23.222979 Write Rank0 MR23 =0x3f
3059 01:01:23.226032 [DQSOSC]
3060 01:01:23.232845 [DQSOSCAuto] RK0, (LSB)MR18= 0xadad, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps
3061 01:01:23.239330 CH1_RK0: MR19=0x202, MR18=0xADAD, DQSOSC=459, MR23=63, INC=11, DEC=17
3062 01:01:23.242539 Write Rank0 MR23 =0x3f
3063 01:01:23.242616 [DQSOSC]
3064 01:01:23.249296 [DQSOSCAuto] RK0, (LSB)MR18= 0xadad, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps
3065 01:01:23.252569 CH1 RK0: MR19=202, MR18=ADAD
3066 01:01:23.255800 [RankSwap] Rank num 2, (Multi 1), Rank 1
3067 01:01:23.258925 Write Rank0 MR2 =0xad
3068 01:01:23.259007 [Write Leveling]
3069 01:01:23.262136 delay byte0 byte1 byte2 byte3
3070 01:01:23.262212
3071 01:01:23.265348 10 0 0
3072 01:01:23.265426 11 0 0
3073 01:01:23.268704 12 0 0
3074 01:01:23.268781 13 0 0
3075 01:01:23.268841 14 0 0
3076 01:01:23.272517 15 0 0
3077 01:01:23.272594 16 0 0
3078 01:01:23.275669 17 0 0
3079 01:01:23.275746 18 0 0
3080 01:01:23.275805 19 0 0
3081 01:01:23.278682 20 0 0
3082 01:01:23.278759 21 0 0
3083 01:01:23.282374 22 0 0
3084 01:01:23.282452 23 0 0
3085 01:01:23.285103 24 0 0
3086 01:01:23.285181 25 0 0
3087 01:01:23.285240 26 0 0
3088 01:01:23.289097 27 0 0
3089 01:01:23.289174 28 0 0
3090 01:01:23.292211 29 0 ff
3091 01:01:23.292289 30 0 ff
3092 01:01:23.295408 31 0 ff
3093 01:01:23.295485 32 0 ff
3094 01:01:23.295546 33 ff ff
3095 01:01:23.298768 34 ff ff
3096 01:01:23.298845 35 ff ff
3097 01:01:23.301780 36 ff ff
3098 01:01:23.301857 37 ff ff
3099 01:01:23.305189 38 ff ff
3100 01:01:23.305267 39 ff ff
3101 01:01:23.311540 pass bytecount = 0xff (0xff: all bytes pass)
3102 01:01:23.311617
3103 01:01:23.311675 DQS0 dly: 33
3104 01:01:23.311730 DQS1 dly: 29
3105 01:01:23.315226 Write Rank0 MR2 =0x2d
3106 01:01:23.317951 [RankSwap] Rank num 2, (Multi 1), Rank 0
3107 01:01:23.321310 Write Rank1 MR1 =0xd6
3108 01:01:23.321387 [Gating]
3109 01:01:23.321447 ==
3110 01:01:23.328009 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3111 01:01:23.328086 fsp= 1, odt_onoff= 1, Byte mode= 0
3112 01:01:23.331394 ==
3113 01:01:23.334735 3 1 0 |2c2b 1312 |(11 11)(11 11) |(1 1)(0 0)| 0
3114 01:01:23.338063 3 1 4 |2c2b 3635 |(11 11)(11 11) |(1 1)(0 0)| 0
3115 01:01:23.340891 3 1 8 |2c2b f0e |(11 11)(11 11) |(1 1)(0 0)| 0
3116 01:01:23.348091 3 1 12 |2c2b 1111 |(11 11)(11 11) |(0 0)(1 1)| 0
3117 01:01:23.351073 3 1 16 |2c2b 1616 |(11 11)(11 11) |(1 0)(0 0)| 0
3118 01:01:23.357368 3 1 20 |2c2b 3434 |(11 11)(10 10) |(1 0)(1 1)| 0
3119 01:01:23.360547 3 1 24 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
3120 01:01:23.363852 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
3121 01:01:23.366889 3 2 0 |2c2b 2a2a |(11 11)(1 1) |(1 0)(0 0)| 0
3122 01:01:23.373529 3 2 4 |2c2b 3433 |(11 11)(11 11) |(1 0)(0 0)| 0
3123 01:01:23.376731 3 2 8 |2c2b a0a |(11 11)(11 11) |(1 0)(0 0)| 0
3124 01:01:23.380122 3 2 12 |2c2b 504 |(11 11)(11 11) |(1 0)(0 0)| 0
3125 01:01:23.386580 3 2 16 |2c2c 3433 |(11 11)(11 11) |(0 0)(1 0)| 0
3126 01:01:23.389828 3 2 20 |404 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
3127 01:01:23.392956 3 2 24 |3534 1c1b |(11 11)(11 11) |(0 0)(1 1)| 0
3128 01:01:23.400034 3 2 28 |3534 3938 |(11 11)(11 11) |(0 0)(1 1)| 0
3129 01:01:23.402971 3 3 0 |3534 3c3c |(11 11)(11 11) |(0 0)(1 1)| 0
3130 01:01:23.406297 3 3 4 |3534 3c3b |(11 11)(11 11) |(0 0)(1 1)| 0
3131 01:01:23.413047 3 3 8 |3534 3939 |(11 11)(11 11) |(0 0)(1 1)| 0
3132 01:01:23.416263 3 3 12 |3534 3a3a |(11 11)(1 1) |(0 0)(1 1)| 0
3133 01:01:23.419467 3 3 16 |3534 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
3134 01:01:23.426182 3 3 20 |3534 3d3d |(11 11)(10 10) |(1 1)(1 1)| 0
3135 01:01:23.429579 [Byte 0] Lead/lag Transition tap number (1)
3136 01:01:23.432892 3 3 24 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
3137 01:01:23.438814 3 3 28 |3534 1716 |(11 11)(11 11) |(0 0)(1 1)| 0
3138 01:01:23.442114 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
3139 01:01:23.445588 [Byte 1] Lead/lag Transition tap number (1)
3140 01:01:23.448769 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3141 01:01:23.455454 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3142 01:01:23.458799 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3143 01:01:23.461913 3 4 16 |2f2e 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3144 01:01:23.468388 3 4 20 |505 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3145 01:01:23.471695 3 4 24 |3d3d 201 |(11 11)(11 11) |(1 1)(0 1)| 0
3146 01:01:23.474788 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3147 01:01:23.481348 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3148 01:01:23.484562 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3149 01:01:23.487696 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3150 01:01:23.494342 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3151 01:01:23.497715 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3152 01:01:23.501018 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3153 01:01:23.507612 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3154 01:01:23.510880 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3155 01:01:23.514405 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3156 01:01:23.520729 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3157 01:01:23.523764 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3158 01:01:23.527161 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3159 01:01:23.533441 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3160 01:01:23.536747 3 6 16 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3161 01:01:23.540433 [Byte 0] Lead/lag Transition tap number (3)
3162 01:01:23.543702 [Byte 1] Lead/lag falling Transition (3, 6, 16)
3163 01:01:23.549758 3 6 20 |606 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3164 01:01:23.553233 3 6 24 |1c1c 202 |(11 11)(11 11) |(0 0)(1 0)| 0
3165 01:01:23.556262 [Byte 1] Lead/lag Transition tap number (3)
3166 01:01:23.562966 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3167 01:01:23.563072 [Byte 0]First pass (3, 6, 28)
3168 01:01:23.566478 [Byte 1]First pass (3, 6, 28)
3169 01:01:23.569772 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3170 01:01:23.575970 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3171 01:01:23.579566 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3172 01:01:23.582594 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3173 01:01:23.586302 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3174 01:01:23.592441 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3175 01:01:23.595652 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3176 01:01:23.598943 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3177 01:01:23.602189 All bytes gating window > 1UI, Early break!
3178 01:01:23.602265
3179 01:01:23.605762 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 14)
3180 01:01:23.605838
3181 01:01:23.612266 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 22)
3182 01:01:23.612344
3183 01:01:23.612404
3184 01:01:23.612458
3185 01:01:23.615681 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
3186 01:01:23.615758
3187 01:01:23.618837 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 22)
3188 01:01:23.618914
3189 01:01:23.618973
3190 01:01:23.621887 Write Rank1 MR1 =0x56
3191 01:01:23.621962
3192 01:01:23.625123 best RODT dly(2T, 0.5T) = (2, 3)
3193 01:01:23.625199
3194 01:01:23.628283 best RODT dly(2T, 0.5T) = (2, 3)
3195 01:01:23.628360 ==
3196 01:01:23.631696 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3197 01:01:23.634852 fsp= 1, odt_onoff= 1, Byte mode= 0
3198 01:01:23.634950 ==
3199 01:01:23.641544 Start DQ dly to find pass range UseTestEngine =0
3200 01:01:23.645008 x-axis: bit #, y-axis: DQ dly (-127~63)
3201 01:01:23.645101 RX Vref Scan = 0
3202 01:01:23.648128 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3203 01:01:23.651480 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3204 01:01:23.654531 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3205 01:01:23.658204 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3206 01:01:23.661471 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3207 01:01:23.664853 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3208 01:01:23.664933 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3209 01:01:23.668376 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3210 01:01:23.670851 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3211 01:01:23.674221 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3212 01:01:23.677558 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3213 01:01:23.681451 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3214 01:01:23.684275 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3215 01:01:23.687470 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3216 01:01:23.690950 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3217 01:01:23.691032 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3218 01:01:23.694268 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3219 01:01:23.697046 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3220 01:01:23.700665 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3221 01:01:23.704037 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3222 01:01:23.707182 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3223 01:01:23.710502 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3224 01:01:23.713846 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3225 01:01:23.713950 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3226 01:01:23.717037 -2, [0] xxxxxxxx xxxxxxxx [MSB]
3227 01:01:23.720530 -1, [0] xxxxxxxx xxxxxxxo [MSB]
3228 01:01:23.723526 0, [0] xxxxxxxx xxxxxxxo [MSB]
3229 01:01:23.726792 1, [0] xxxoxxxx xxxxxxxo [MSB]
3230 01:01:23.730460 2, [0] xxxoxxxx oxxxxxxo [MSB]
3231 01:01:23.733686 3, [0] xoooxxxo ooxxxxxo [MSB]
3232 01:01:23.733768 4, [0] xoooxxxo oooxxxxo [MSB]
3233 01:01:23.736828 5, [0] xooooxxo oooxxxxo [MSB]
3234 01:01:23.740116 6, [0] xooooxoo oooxxxxo [MSB]
3235 01:01:23.743519 32, [0] oooxoooo ooooooox [MSB]
3236 01:01:23.746972 33, [0] oooxoooo ooooooox [MSB]
3237 01:01:23.750077 34, [0] oooxoooo xoooooox [MSB]
3238 01:01:23.753330 35, [0] ooxxoooo xoooooox [MSB]
3239 01:01:23.753409 36, [0] ooxxoooo xxooooox [MSB]
3240 01:01:23.756355 37, [0] xxxxooox xxooooox [MSB]
3241 01:01:23.760124 38, [0] xxxxooox xxooxoox [MSB]
3242 01:01:23.762939 39, [0] xxxxxoox xxxoxoox [MSB]
3243 01:01:23.766416 40, [0] xxxxxoxx xxxoxxxx [MSB]
3244 01:01:23.769672 41, [0] xxxxxxxx xxxxxxxx [MSB]
3245 01:01:23.772854 iDelay=41, Bit 0, Center 21 (7 ~ 36) 30
3246 01:01:23.776390 iDelay=41, Bit 1, Center 19 (3 ~ 36) 34
3247 01:01:23.779695 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3248 01:01:23.783095 iDelay=41, Bit 3, Center 16 (1 ~ 31) 31
3249 01:01:23.785808 iDelay=41, Bit 4, Center 21 (5 ~ 38) 34
3250 01:01:23.788971 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
3251 01:01:23.792510 iDelay=41, Bit 6, Center 22 (6 ~ 39) 34
3252 01:01:23.795691 iDelay=41, Bit 7, Center 19 (3 ~ 36) 34
3253 01:01:23.798971 iDelay=41, Bit 8, Center 17 (2 ~ 33) 32
3254 01:01:23.805837 iDelay=41, Bit 9, Center 19 (3 ~ 35) 33
3255 01:01:23.808817 iDelay=41, Bit 10, Center 21 (4 ~ 38) 35
3256 01:01:23.812392 iDelay=41, Bit 11, Center 23 (7 ~ 40) 34
3257 01:01:23.815551 iDelay=41, Bit 12, Center 22 (7 ~ 37) 31
3258 01:01:23.818963 iDelay=41, Bit 13, Center 23 (7 ~ 39) 33
3259 01:01:23.822175 iDelay=41, Bit 14, Center 23 (7 ~ 39) 33
3260 01:01:23.825485 iDelay=41, Bit 15, Center 15 (-1 ~ 31) 33
3261 01:01:23.825573 ==
3262 01:01:23.832161 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3263 01:01:23.835508 fsp= 1, odt_onoff= 1, Byte mode= 0
3264 01:01:23.835598 ==
3265 01:01:23.835658 DQS Delay:
3266 01:01:23.838466 DQS0 = 0, DQS1 = 0
3267 01:01:23.838543 DQM Delay:
3268 01:01:23.841502 DQM0 = 19, DQM1 = 20
3269 01:01:23.841606 DQ Delay:
3270 01:01:23.844748 DQ0 =21, DQ1 =19, DQ2 =18, DQ3 =16
3271 01:01:23.848580 DQ4 =21, DQ5 =23, DQ6 =22, DQ7 =19
3272 01:01:23.851404 DQ8 =17, DQ9 =19, DQ10 =21, DQ11 =23
3273 01:01:23.854860 DQ12 =22, DQ13 =23, DQ14 =23, DQ15 =15
3274 01:01:23.854939
3275 01:01:23.854998
3276 01:01:23.855053 DramC Write-DBI off
3277 01:01:23.858126 ==
3278 01:01:23.861148 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3279 01:01:23.865319 fsp= 1, odt_onoff= 1, Byte mode= 0
3280 01:01:23.865398 ==
3281 01:01:23.868068 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3282 01:01:23.868147
3283 01:01:23.871783 Begin, DQ Scan Range 925~1181
3284 01:01:23.871863
3285 01:01:23.871922
3286 01:01:23.874295 TX Vref Scan disable
3287 01:01:23.877914 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3288 01:01:23.880877 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3289 01:01:23.884409 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3290 01:01:23.887463 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3291 01:01:23.890827 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3292 01:01:23.894394 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3293 01:01:23.900755 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3294 01:01:23.903833 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3295 01:01:23.907031 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3296 01:01:23.910493 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3297 01:01:23.913493 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3298 01:01:23.917272 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3299 01:01:23.920461 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3300 01:01:23.923530 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3301 01:01:23.926989 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3302 01:01:23.930079 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3303 01:01:23.933127 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3304 01:01:23.936485 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3305 01:01:23.940004 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3306 01:01:23.946990 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3307 01:01:23.950113 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3308 01:01:23.953312 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3309 01:01:23.956804 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3310 01:01:23.959473 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3311 01:01:23.962897 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3312 01:01:23.966698 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3313 01:01:23.969785 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3314 01:01:23.973311 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3315 01:01:23.975789 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3316 01:01:23.979065 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3317 01:01:23.982355 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3318 01:01:23.985742 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3319 01:01:23.992721 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3320 01:01:23.995663 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3321 01:01:23.999228 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3322 01:01:24.002165 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3323 01:01:24.005784 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3324 01:01:24.009422 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3325 01:01:24.012591 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3326 01:01:24.015431 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3327 01:01:24.019186 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3328 01:01:24.021979 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3329 01:01:24.025168 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3330 01:01:24.028621 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3331 01:01:24.031782 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3332 01:01:24.034925 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3333 01:01:24.038147 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3334 01:01:24.041329 972 |3 6 12|[0] xxxxxxxx xxxxxxxo [MSB]
3335 01:01:24.048628 973 |3 6 13|[0] xxxxxxxx xxxxxxxo [MSB]
3336 01:01:24.051745 974 |3 6 14|[0] xxxxxxxx oxxxxxxo [MSB]
3337 01:01:24.054956 975 |3 6 15|[0] xxxxxxxx ooxxxxxo [MSB]
3338 01:01:24.057984 976 |3 6 16|[0] xxxxxxxx ooxxxxxo [MSB]
3339 01:01:24.061295 977 |3 6 17|[0] xxxxxxxx oooxxxxo [MSB]
3340 01:01:24.064644 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
3341 01:01:24.068039 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3342 01:01:24.071120 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3343 01:01:24.074416 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3344 01:01:24.077762 982 |3 6 22|[0] xxxxxxxo oooooooo [MSB]
3345 01:01:24.081172 983 |3 6 23|[0] xooooooo oooooooo [MSB]
3346 01:01:24.088224 992 |3 6 32|[0] oooooooo ooooooox [MSB]
3347 01:01:24.091289 993 |3 6 33|[0] oooooooo oxooooox [MSB]
3348 01:01:24.094614 994 |3 6 34|[0] oooooooo oxooooox [MSB]
3349 01:01:24.098003 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3350 01:01:24.101262 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3351 01:01:24.104646 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3352 01:01:24.107830 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3353 01:01:24.111041 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3354 01:01:24.114574 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3355 01:01:24.117934 1001 |3 6 41|[0] ooxxoooo xxxxxxxx [MSB]
3356 01:01:24.121029 1002 |3 6 42|[0] ooxxoooo xxxxxxxx [MSB]
3357 01:01:24.127354 1003 |3 6 43|[0] ooxxooxx xxxxxxxx [MSB]
3358 01:01:24.130929 1004 |3 6 44|[0] xxxxxxxx xxxxxxxx [MSB]
3359 01:01:24.134203 Byte0, DQ PI dly=991, DQM PI dly= 991
3360 01:01:24.137705 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
3361 01:01:24.137807
3362 01:01:24.141128 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
3363 01:01:24.141208
3364 01:01:24.143799 Byte1, DQ PI dly=983, DQM PI dly= 983
3365 01:01:24.150316 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3366 01:01:24.150417
3367 01:01:24.153718 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3368 01:01:24.153806
3369 01:01:24.153880 ==
3370 01:01:24.160383 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3371 01:01:24.163592 fsp= 1, odt_onoff= 1, Byte mode= 0
3372 01:01:24.163682 ==
3373 01:01:24.166817 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3374 01:01:24.166917
3375 01:01:24.170354 Begin, DQ Scan Range 959~1023
3376 01:01:24.173429 Write Rank1 MR14 =0x0
3377 01:01:24.180015
3378 01:01:24.180121 CH=1, VrefRange= 0, VrefLevel = 0
3379 01:01:24.186805 TX Bit0 (985~999) 15 992, Bit8 (977~991) 15 984,
3380 01:01:24.190252 TX Bit1 (984~998) 15 991, Bit9 (978~987) 10 982,
3381 01:01:24.196343 TX Bit2 (982~996) 15 989, Bit10 (979~992) 14 985,
3382 01:01:24.199995 TX Bit3 (980~992) 13 986, Bit11 (980~992) 13 986,
3383 01:01:24.203134 TX Bit4 (984~998) 15 991, Bit12 (981~992) 12 986,
3384 01:01:24.209942 TX Bit5 (985~998) 14 991, Bit13 (981~993) 13 987,
3385 01:01:24.213022 TX Bit6 (984~998) 15 991, Bit14 (980~992) 13 986,
3386 01:01:24.219682 TX Bit7 (984~998) 15 991, Bit15 (974~984) 11 979,
3387 01:01:24.219778
3388 01:01:24.219839 Write Rank1 MR14 =0x2
3389 01:01:24.228396
3390 01:01:24.228511 CH=1, VrefRange= 0, VrefLevel = 2
3391 01:01:24.235026 TX Bit0 (985~999) 15 992, Bit8 (977~991) 15 984,
3392 01:01:24.238484 TX Bit1 (984~998) 15 991, Bit9 (977~988) 12 982,
3393 01:01:24.244690 TX Bit2 (982~997) 16 989, Bit10 (979~993) 15 986,
3394 01:01:24.248022 TX Bit3 (979~993) 15 986, Bit11 (980~993) 14 986,
3395 01:01:24.251560 TX Bit4 (983~998) 16 990, Bit12 (979~993) 15 986,
3396 01:01:24.258139 TX Bit5 (985~999) 15 992, Bit13 (980~994) 15 987,
3397 01:01:24.261484 TX Bit6 (983~999) 17 991, Bit14 (979~992) 14 985,
3398 01:01:24.267992 TX Bit7 (984~998) 15 991, Bit15 (974~985) 12 979,
3399 01:01:24.268095
3400 01:01:24.268156 Write Rank1 MR14 =0x4
3401 01:01:24.277032
3402 01:01:24.277138 CH=1, VrefRange= 0, VrefLevel = 4
3403 01:01:24.283120 TX Bit0 (985~999) 15 992, Bit8 (977~992) 16 984,
3404 01:01:24.286550 TX Bit1 (983~999) 17 991, Bit9 (977~989) 13 983,
3405 01:01:24.293478 TX Bit2 (982~997) 16 989, Bit10 (979~993) 15 986,
3406 01:01:24.296778 TX Bit3 (979~994) 16 986, Bit11 (979~993) 15 986,
3407 01:01:24.300062 TX Bit4 (983~999) 17 991, Bit12 (980~993) 14 986,
3408 01:01:24.306067 TX Bit5 (984~999) 16 991, Bit13 (980~995) 16 987,
3409 01:01:24.309961 TX Bit6 (983~999) 17 991, Bit14 (979~993) 15 986,
3410 01:01:24.316438 TX Bit7 (984~999) 16 991, Bit15 (973~986) 14 979,
3411 01:01:24.316530
3412 01:01:24.316590 Write Rank1 MR14 =0x6
3413 01:01:24.325486
3414 01:01:24.325635 CH=1, VrefRange= 0, VrefLevel = 6
3415 01:01:24.331669 TX Bit0 (984~1000) 17 992, Bit8 (976~992) 17 984,
3416 01:01:24.335371 TX Bit1 (983~999) 17 991, Bit9 (977~990) 14 983,
3417 01:01:24.341463 TX Bit2 (982~998) 17 990, Bit10 (978~993) 16 985,
3418 01:01:24.344912 TX Bit3 (978~995) 18 986, Bit11 (979~994) 16 986,
3419 01:01:24.348093 TX Bit4 (983~1000) 18 991, Bit12 (979~994) 16 986,
3420 01:01:24.354599 TX Bit5 (984~999) 16 991, Bit13 (979~995) 17 987,
3421 01:01:24.358064 TX Bit6 (983~999) 17 991, Bit14 (979~993) 15 986,
3422 01:01:24.364260 TX Bit7 (984~999) 16 991, Bit15 (972~987) 16 979,
3423 01:01:24.364362
3424 01:01:24.364422 Write Rank1 MR14 =0x8
3425 01:01:24.374021
3426 01:01:24.374125 CH=1, VrefRange= 0, VrefLevel = 8
3427 01:01:24.380438 TX Bit0 (984~1001) 18 992, Bit8 (976~992) 17 984,
3428 01:01:24.384114 TX Bit1 (983~1000) 18 991, Bit9 (976~991) 16 983,
3429 01:01:24.390857 TX Bit2 (981~999) 19 990, Bit10 (978~994) 17 986,
3430 01:01:24.393666 TX Bit3 (978~996) 19 987, Bit11 (979~995) 17 987,
3431 01:01:24.397492 TX Bit4 (983~1000) 18 991, Bit12 (979~995) 17 987,
3432 01:01:24.403311 TX Bit5 (984~1000) 17 992, Bit13 (979~996) 18 987,
3433 01:01:24.406866 TX Bit6 (983~1000) 18 991, Bit14 (979~993) 15 986,
3434 01:01:24.413136 TX Bit7 (984~1000) 17 992, Bit15 (972~988) 17 980,
3435 01:01:24.413233
3436 01:01:24.413292 Write Rank1 MR14 =0xa
3437 01:01:24.423542
3438 01:01:24.426742 CH=1, VrefRange= 0, VrefLevel = 10
3439 01:01:24.430086 TX Bit0 (984~1001) 18 992, Bit8 (975~993) 19 984,
3440 01:01:24.433617 TX Bit1 (983~1001) 19 992, Bit9 (976~991) 16 983,
3441 01:01:24.439794 TX Bit2 (981~999) 19 990, Bit10 (978~995) 18 986,
3442 01:01:24.442744 TX Bit3 (978~997) 20 987, Bit11 (978~996) 19 987,
3443 01:01:24.449395 TX Bit4 (982~1000) 19 991, Bit12 (979~995) 17 987,
3444 01:01:24.452867 TX Bit5 (984~1001) 18 992, Bit13 (979~997) 19 988,
3445 01:01:24.455975 TX Bit6 (982~1001) 20 991, Bit14 (978~994) 17 986,
3446 01:01:24.462370 TX Bit7 (983~1000) 18 991, Bit15 (972~990) 19 981,
3447 01:01:24.462467
3448 01:01:24.462527 Write Rank1 MR14 =0xc
3449 01:01:24.472851
3450 01:01:24.476079 CH=1, VrefRange= 0, VrefLevel = 12
3451 01:01:24.479324 TX Bit0 (984~1002) 19 993, Bit8 (975~993) 19 984,
3452 01:01:24.482616 TX Bit1 (982~1002) 21 992, Bit9 (975~992) 18 983,
3453 01:01:24.488916 TX Bit2 (980~1000) 21 990, Bit10 (977~995) 19 986,
3454 01:01:24.492156 TX Bit3 (977~997) 21 987, Bit11 (978~997) 20 987,
3455 01:01:24.498825 TX Bit4 (982~1001) 20 991, Bit12 (978~995) 18 986,
3456 01:01:24.502266 TX Bit5 (984~1002) 19 993, Bit13 (979~998) 20 988,
3457 01:01:24.505493 TX Bit6 (982~1001) 20 991, Bit14 (978~995) 18 986,
3458 01:01:24.511981 TX Bit7 (983~1001) 19 992, Bit15 (971~991) 21 981,
3459 01:01:24.512077
3460 01:01:24.512138 Write Rank1 MR14 =0xe
3461 01:01:24.522334
3462 01:01:24.525256 CH=1, VrefRange= 0, VrefLevel = 14
3463 01:01:24.528975 TX Bit0 (984~1002) 19 993, Bit8 (975~993) 19 984,
3464 01:01:24.531958 TX Bit1 (982~1002) 21 992, Bit9 (974~992) 19 983,
3465 01:01:24.538824 TX Bit2 (980~1000) 21 990, Bit10 (977~996) 20 986,
3466 01:01:24.541966 TX Bit3 (977~998) 22 987, Bit11 (978~997) 20 987,
3467 01:01:24.548381 TX Bit4 (982~1002) 21 992, Bit12 (978~997) 20 987,
3468 01:01:24.551502 TX Bit5 (984~1002) 19 993, Bit13 (978~998) 21 988,
3469 01:01:24.554854 TX Bit6 (982~1002) 21 992, Bit14 (977~996) 20 986,
3470 01:01:24.561515 TX Bit7 (983~1001) 19 992, Bit15 (971~991) 21 981,
3471 01:01:24.561641
3472 01:01:24.561721 Write Rank1 MR14 =0x10
3473 01:01:24.572581
3474 01:01:24.575076 CH=1, VrefRange= 0, VrefLevel = 16
3475 01:01:24.578932 TX Bit0 (983~1004) 22 993, Bit8 (974~994) 21 984,
3476 01:01:24.581661 TX Bit1 (982~1003) 22 992, Bit9 (974~992) 19 983,
3477 01:01:24.588339 TX Bit2 (979~1000) 22 989, Bit10 (977~997) 21 987,
3478 01:01:24.591767 TX Bit3 (977~998) 22 987, Bit11 (978~998) 21 988,
3479 01:01:24.597943 TX Bit4 (982~1002) 21 992, Bit12 (978~997) 20 987,
3480 01:01:24.601894 TX Bit5 (984~1003) 20 993, Bit13 (978~999) 22 988,
3481 01:01:24.604366 TX Bit6 (982~1002) 21 992, Bit14 (977~997) 21 987,
3482 01:01:24.611053 TX Bit7 (982~1002) 21 992, Bit15 (971~991) 21 981,
3483 01:01:24.611152
3484 01:01:24.614371 Write Rank1 MR14 =0x12
3485 01:01:24.621849
3486 01:01:24.625117 CH=1, VrefRange= 0, VrefLevel = 18
3487 01:01:24.628223 TX Bit0 (983~1004) 22 993, Bit8 (973~994) 22 983,
3488 01:01:24.632116 TX Bit1 (981~1003) 23 992, Bit9 (975~993) 19 984,
3489 01:01:24.638040 TX Bit2 (979~1001) 23 990, Bit10 (977~998) 22 987,
3490 01:01:24.641453 TX Bit3 (977~999) 23 988, Bit11 (978~999) 22 988,
3491 01:01:24.648005 TX Bit4 (981~1003) 23 992, Bit12 (977~998) 22 987,
3492 01:01:24.651399 TX Bit5 (983~1004) 22 993, Bit13 (978~999) 22 988,
3493 01:01:24.654781 TX Bit6 (981~1003) 23 992, Bit14 (977~997) 21 987,
3494 01:01:24.661357 TX Bit7 (982~1003) 22 992, Bit15 (971~992) 22 981,
3495 01:01:24.661461
3496 01:01:24.661581 Write Rank1 MR14 =0x14
3497 01:01:24.671551
3498 01:01:24.675069 CH=1, VrefRange= 0, VrefLevel = 20
3499 01:01:24.678309 TX Bit0 (983~1004) 22 993, Bit8 (973~995) 23 984,
3500 01:01:24.681760 TX Bit1 (981~1004) 24 992, Bit9 (973~993) 21 983,
3501 01:01:24.688033 TX Bit2 (979~1001) 23 990, Bit10 (976~999) 24 987,
3502 01:01:24.691384 TX Bit3 (977~999) 23 988, Bit11 (977~999) 23 988,
3503 01:01:24.698167 TX Bit4 (981~1003) 23 992, Bit12 (978~999) 22 988,
3504 01:01:24.701055 TX Bit5 (983~1004) 22 993, Bit13 (978~999) 22 988,
3505 01:01:24.704789 TX Bit6 (981~1003) 23 992, Bit14 (977~998) 22 987,
3506 01:01:24.711002 TX Bit7 (982~1003) 22 992, Bit15 (971~992) 22 981,
3507 01:01:24.711124
3508 01:01:24.711218 Write Rank1 MR14 =0x16
3509 01:01:24.721494
3510 01:01:24.721656 CH=1, VrefRange= 0, VrefLevel = 22
3511 01:01:24.728324 TX Bit0 (983~1005) 23 994, Bit8 (972~996) 25 984,
3512 01:01:24.731853 TX Bit1 (981~1005) 25 993, Bit9 (973~993) 21 983,
3513 01:01:24.738443 TX Bit2 (978~1002) 25 990, Bit10 (976~999) 24 987,
3514 01:01:24.741729 TX Bit3 (977~999) 23 988, Bit11 (977~999) 23 988,
3515 01:01:24.748427 TX Bit4 (980~1005) 26 992, Bit12 (977~999) 23 988,
3516 01:01:24.751329 TX Bit5 (982~1005) 24 993, Bit13 (978~999) 22 988,
3517 01:01:24.754722 TX Bit6 (980~1004) 25 992, Bit14 (976~998) 23 987,
3518 01:01:24.761157 TX Bit7 (981~1005) 25 993, Bit15 (971~993) 23 982,
3519 01:01:24.761269
3520 01:01:24.761360 Write Rank1 MR14 =0x18
3521 01:01:24.772160
3522 01:01:24.775186 CH=1, VrefRange= 0, VrefLevel = 24
3523 01:01:24.778692 TX Bit0 (983~1006) 24 994, Bit8 (972~997) 26 984,
3524 01:01:24.782277 TX Bit1 (980~1005) 26 992, Bit9 (973~994) 22 983,
3525 01:01:24.789031 TX Bit2 (978~1002) 25 990, Bit10 (976~999) 24 987,
3526 01:01:24.791418 TX Bit3 (976~1000) 25 988, Bit11 (976~1000) 25 988,
3527 01:01:24.798585 TX Bit4 (980~1005) 26 992, Bit12 (977~999) 23 988,
3528 01:01:24.801242 TX Bit5 (982~1005) 24 993, Bit13 (977~1000) 24 988,
3529 01:01:24.804717 TX Bit6 (980~1005) 26 992, Bit14 (977~999) 23 988,
3530 01:01:24.811373 TX Bit7 (981~1005) 25 993, Bit15 (970~993) 24 981,
3531 01:01:24.811469
3532 01:01:24.814577 Write Rank1 MR14 =0x1a
3533 01:01:24.822650
3534 01:01:24.826139 CH=1, VrefRange= 0, VrefLevel = 26
3535 01:01:24.829171 TX Bit0 (983~1006) 24 994, Bit8 (972~996) 25 984,
3536 01:01:24.832380 TX Bit1 (980~1005) 26 992, Bit9 (973~994) 22 983,
3537 01:01:24.838989 TX Bit2 (978~1003) 26 990, Bit10 (975~999) 25 987,
3538 01:01:24.842417 TX Bit3 (976~1000) 25 988, Bit11 (976~999) 24 987,
3539 01:01:24.848597 TX Bit4 (979~1005) 27 992, Bit12 (977~1000) 24 988,
3540 01:01:24.852121 TX Bit5 (982~1006) 25 994, Bit13 (977~1000) 24 988,
3541 01:01:24.855485 TX Bit6 (979~1005) 27 992, Bit14 (976~999) 24 987,
3542 01:01:24.862050 TX Bit7 (981~1005) 25 993, Bit15 (970~993) 24 981,
3543 01:01:24.862151
3544 01:01:24.864626 Write Rank1 MR14 =0x1c
3545 01:01:24.873087
3546 01:01:24.876650 CH=1, VrefRange= 0, VrefLevel = 28
3547 01:01:24.879448 TX Bit0 (982~1006) 25 994, Bit8 (972~996) 25 984,
3548 01:01:24.882741 TX Bit1 (979~1006) 28 992, Bit9 (972~995) 24 983,
3549 01:01:24.889103 TX Bit2 (978~1004) 27 991, Bit10 (975~1000) 26 987,
3550 01:01:24.892571 TX Bit3 (976~1000) 25 988, Bit11 (976~999) 24 987,
3551 01:01:24.898948 TX Bit4 (979~1006) 28 992, Bit12 (976~999) 24 987,
3552 01:01:24.902362 TX Bit5 (981~1006) 26 993, Bit13 (976~1000) 25 988,
3553 01:01:24.905755 TX Bit6 (980~1005) 26 992, Bit14 (975~999) 25 987,
3554 01:01:24.912429 TX Bit7 (980~1006) 27 993, Bit15 (970~993) 24 981,
3555 01:01:24.912531
3556 01:01:24.915875 Write Rank1 MR14 =0x1e
3557 01:01:24.923242
3558 01:01:24.926778 CH=1, VrefRange= 0, VrefLevel = 30
3559 01:01:24.930012 TX Bit0 (982~1006) 25 994, Bit8 (972~996) 25 984,
3560 01:01:24.933097 TX Bit1 (979~1006) 28 992, Bit9 (972~995) 24 983,
3561 01:01:24.939791 TX Bit2 (978~1004) 27 991, Bit10 (975~1000) 26 987,
3562 01:01:24.942849 TX Bit3 (976~1000) 25 988, Bit11 (976~999) 24 987,
3563 01:01:24.949766 TX Bit4 (979~1006) 28 992, Bit12 (976~999) 24 987,
3564 01:01:24.953270 TX Bit5 (981~1006) 26 993, Bit13 (976~1000) 25 988,
3565 01:01:24.956378 TX Bit6 (980~1005) 26 992, Bit14 (975~999) 25 987,
3566 01:01:24.962838 TX Bit7 (980~1006) 27 993, Bit15 (970~993) 24 981,
3567 01:01:24.962945
3568 01:01:24.966017 Write Rank1 MR14 =0x20
3569 01:01:24.973808
3570 01:01:24.977056 CH=1, VrefRange= 0, VrefLevel = 32
3571 01:01:24.980441 TX Bit0 (982~1006) 25 994, Bit8 (972~996) 25 984,
3572 01:01:24.983838 TX Bit1 (979~1006) 28 992, Bit9 (972~995) 24 983,
3573 01:01:24.990374 TX Bit2 (978~1004) 27 991, Bit10 (975~1000) 26 987,
3574 01:01:24.993676 TX Bit3 (976~1000) 25 988, Bit11 (976~999) 24 987,
3575 01:01:25.000245 TX Bit4 (979~1006) 28 992, Bit12 (976~999) 24 987,
3576 01:01:25.003371 TX Bit5 (981~1006) 26 993, Bit13 (976~1000) 25 988,
3577 01:01:25.007049 TX Bit6 (980~1005) 26 992, Bit14 (975~999) 25 987,
3578 01:01:25.013215 TX Bit7 (980~1006) 27 993, Bit15 (970~993) 24 981,
3579 01:01:25.013316
3580 01:01:25.016871 Write Rank1 MR14 =0x22
3581 01:01:25.024645
3582 01:01:25.028016 CH=1, VrefRange= 0, VrefLevel = 34
3583 01:01:25.031117 TX Bit0 (982~1006) 25 994, Bit8 (972~996) 25 984,
3584 01:01:25.034500 TX Bit1 (979~1006) 28 992, Bit9 (972~995) 24 983,
3585 01:01:25.041046 TX Bit2 (978~1004) 27 991, Bit10 (975~1000) 26 987,
3586 01:01:25.044092 TX Bit3 (976~1000) 25 988, Bit11 (976~999) 24 987,
3587 01:01:25.051118 TX Bit4 (979~1006) 28 992, Bit12 (976~999) 24 987,
3588 01:01:25.053926 TX Bit5 (981~1006) 26 993, Bit13 (976~1000) 25 988,
3589 01:01:25.057514 TX Bit6 (980~1005) 26 992, Bit14 (975~999) 25 987,
3590 01:01:25.064200 TX Bit7 (980~1006) 27 993, Bit15 (970~993) 24 981,
3591 01:01:25.064303
3592 01:01:25.066838 Write Rank1 MR14 =0x24
3593 01:01:25.075576
3594 01:01:25.078796 CH=1, VrefRange= 0, VrefLevel = 36
3595 01:01:25.082088 TX Bit0 (982~1006) 25 994, Bit8 (972~996) 25 984,
3596 01:01:25.085389 TX Bit1 (979~1006) 28 992, Bit9 (972~995) 24 983,
3597 01:01:25.091762 TX Bit2 (978~1004) 27 991, Bit10 (975~1000) 26 987,
3598 01:01:25.094986 TX Bit3 (976~1000) 25 988, Bit11 (976~999) 24 987,
3599 01:01:25.101501 TX Bit4 (979~1006) 28 992, Bit12 (976~999) 24 987,
3600 01:01:25.104970 TX Bit5 (981~1006) 26 993, Bit13 (976~1000) 25 988,
3601 01:01:25.108280 TX Bit6 (980~1005) 26 992, Bit14 (975~999) 25 987,
3602 01:01:25.114770 TX Bit7 (980~1006) 27 993, Bit15 (970~993) 24 981,
3603 01:01:25.114877
3604 01:01:25.114940
3605 01:01:25.117902 TX Vref found, early break! 382< 388
3606 01:01:25.121463 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
3607 01:01:25.124789 u1DelayCellOfst[0]=7 cells (6 PI)
3608 01:01:25.127977 u1DelayCellOfst[1]=5 cells (4 PI)
3609 01:01:25.131207 u1DelayCellOfst[2]=3 cells (3 PI)
3610 01:01:25.134610 u1DelayCellOfst[3]=0 cells (0 PI)
3611 01:01:25.137745 u1DelayCellOfst[4]=5 cells (4 PI)
3612 01:01:25.140955 u1DelayCellOfst[5]=6 cells (5 PI)
3613 01:01:25.144326 u1DelayCellOfst[6]=5 cells (4 PI)
3614 01:01:25.147801 u1DelayCellOfst[7]=6 cells (5 PI)
3615 01:01:25.150826 Byte0, DQ PI dly=988, DQM PI dly= 991
3616 01:01:25.153887 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3617 01:01:25.153973
3618 01:01:25.157227 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3619 01:01:25.157331
3620 01:01:25.160325 u1DelayCellOfst[8]=3 cells (3 PI)
3621 01:01:25.163972 u1DelayCellOfst[9]=2 cells (2 PI)
3622 01:01:25.167502 u1DelayCellOfst[10]=7 cells (6 PI)
3623 01:01:25.170735 u1DelayCellOfst[11]=7 cells (6 PI)
3624 01:01:25.173948 u1DelayCellOfst[12]=7 cells (6 PI)
3625 01:01:25.177380 u1DelayCellOfst[13]=9 cells (7 PI)
3626 01:01:25.180635 u1DelayCellOfst[14]=7 cells (6 PI)
3627 01:01:25.183243 u1DelayCellOfst[15]=0 cells (0 PI)
3628 01:01:25.187062 Byte1, DQ PI dly=981, DQM PI dly= 984
3629 01:01:25.190165 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
3630 01:01:25.190265
3631 01:01:25.196793 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
3632 01:01:25.196896
3633 01:01:25.197027 Write Rank1 MR14 =0x1c
3634 01:01:25.197119
3635 01:01:25.200075 Final TX Range 0 Vref 28
3636 01:01:25.200177
3637 01:01:25.206600 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3638 01:01:25.206706
3639 01:01:25.212988 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3640 01:01:25.219514 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3641 01:01:25.226125 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3642 01:01:25.229333 Write Rank1 MR3 =0xb0
3643 01:01:25.232621 DramC Write-DBI on
3644 01:01:25.232701 ==
3645 01:01:25.235900 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3646 01:01:25.239188 fsp= 1, odt_onoff= 1, Byte mode= 0
3647 01:01:25.239270 ==
3648 01:01:25.246122 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3649 01:01:25.246213
3650 01:01:25.246291 Begin, DQ Scan Range 704~768
3651 01:01:25.246363
3652 01:01:25.246431
3653 01:01:25.248854 TX Vref Scan disable
3654 01:01:25.252222 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3655 01:01:25.255838 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3656 01:01:25.258969 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3657 01:01:25.262147 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3658 01:01:25.265419 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3659 01:01:25.268889 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3660 01:01:25.272273 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3661 01:01:25.278623 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3662 01:01:25.282092 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3663 01:01:25.284968 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3664 01:01:25.288548 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3665 01:01:25.291955 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3666 01:01:25.295104 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3667 01:01:25.298281 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3668 01:01:25.301440 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3669 01:01:25.304805 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3670 01:01:25.308290 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3671 01:01:25.311462 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3672 01:01:25.314273 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3673 01:01:25.317710 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3674 01:01:25.327052 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3675 01:01:25.330856 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3676 01:01:25.334057 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3677 01:01:25.337728 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3678 01:01:25.340453 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3679 01:01:25.343895 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3680 01:01:25.347142 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3681 01:01:25.350383 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3682 01:01:25.353740 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3683 01:01:25.357202 752 |2 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
3684 01:01:25.360019 Byte0, DQ PI dly=737, DQM PI dly= 737
3685 01:01:25.366833 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
3686 01:01:25.366958
3687 01:01:25.370140 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
3688 01:01:25.370229
3689 01:01:25.373152 Byte1, DQ PI dly=729, DQM PI dly= 729
3690 01:01:25.376229 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
3691 01:01:25.376310
3692 01:01:25.383144 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
3693 01:01:25.383241
3694 01:01:25.389643 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3695 01:01:25.395962 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3696 01:01:25.402833 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3697 01:01:25.405962 Write Rank1 MR3 =0x30
3698 01:01:25.406094 DramC Write-DBI off
3699 01:01:25.406204
3700 01:01:25.409131 [DATLAT]
3701 01:01:25.409239 Freq=1600, CH1 RK1, use_rxtx_scan=0
3702 01:01:25.412226
3703 01:01:25.412305 DATLAT Default: 0x10
3704 01:01:25.415438 7, 0xFFFF, sum=0
3705 01:01:25.415519 8, 0xFFFF, sum=0
3706 01:01:25.418869 9, 0xFFFF, sum=0
3707 01:01:25.418949 10, 0xFFFF, sum=0
3708 01:01:25.422197 11, 0xFFFF, sum=0
3709 01:01:25.422276 12, 0xFFFF, sum=0
3710 01:01:25.425499 13, 0xFFFF, sum=0
3711 01:01:25.425627 14, 0x0, sum=1
3712 01:01:25.425688 15, 0x0, sum=2
3713 01:01:25.429338 16, 0x0, sum=3
3714 01:01:25.429442 17, 0x0, sum=4
3715 01:01:25.435421 pattern=2 first_step=14 total pass=5 best_step=16
3716 01:01:25.435538 ==
3717 01:01:25.438874 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3718 01:01:25.442207 fsp= 1, odt_onoff= 1, Byte mode= 0
3719 01:01:25.442288 ==
3720 01:01:25.448629 Start DQ dly to find pass range UseTestEngine =1
3721 01:01:25.452036 x-axis: bit #, y-axis: DQ dly (-127~63)
3722 01:01:25.452117 RX Vref Scan = 0
3723 01:01:25.454776 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3724 01:01:25.458094 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3725 01:01:25.461318 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3726 01:01:25.464718 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3727 01:01:25.468087 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3728 01:01:25.468171 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3729 01:01:25.471254 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3730 01:01:25.474617 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3731 01:01:25.478097 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3732 01:01:25.481317 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3733 01:01:25.484394 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3734 01:01:25.487526 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3735 01:01:25.490939 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3736 01:01:25.494186 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3737 01:01:25.497403 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3738 01:01:25.497518 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3739 01:01:25.500724 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3740 01:01:25.504041 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3741 01:01:25.507121 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3742 01:01:25.510920 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3743 01:01:25.513803 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3744 01:01:25.517431 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3745 01:01:25.517553 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3746 01:01:25.520383 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3747 01:01:25.523707 -2, [0] xxxxxxxx xxxxxxxx [MSB]
3748 01:01:25.526948 -1, [0] xxxxxxxx xxxxxxxo [MSB]
3749 01:01:25.530265 0, [0] xxxoxxxx xxxxxxxo [MSB]
3750 01:01:25.533974 1, [0] xxxoxxxx xoxxxxxo [MSB]
3751 01:01:25.537252 2, [0] xoxoxxxx ooxxxxxo [MSB]
3752 01:01:25.537322 3, [0] xooooxxx ooxxxxxo [MSB]
3753 01:01:25.540172 4, [0] xooooxxo oooxxxxo [MSB]
3754 01:01:25.543219 5, [0] xoooooxo oooxxxxo [MSB]
3755 01:01:25.547167 6, [0] ooooooxo ooooxxoo [MSB]
3756 01:01:25.550303 32, [0] oooxoooo ooooooox [MSB]
3757 01:01:25.553748 33, [0] oooxoooo ooooooox [MSB]
3758 01:01:25.557090 34, [0] oooxoooo ooooooox [MSB]
3759 01:01:25.560606 35, [0] ooxxoooo xxooooox [MSB]
3760 01:01:25.563591 36, [0] ooxxoooo xxooooox [MSB]
3761 01:01:25.566796 37, [0] ooxxoooo xxooooox [MSB]
3762 01:01:25.570005 38, [0] oxxxooox xxooooox [MSB]
3763 01:01:25.570088 39, [0] xxxxxoox xxxoxxox [MSB]
3764 01:01:25.573397 40, [0] xxxxxoox xxxxxxxx [MSB]
3765 01:01:25.576752 41, [0] xxxxxxxx xxxxxxxx [MSB]
3766 01:01:25.580000 iDelay=41, Bit 0, Center 22 (6 ~ 38) 33
3767 01:01:25.583591 iDelay=41, Bit 1, Center 19 (2 ~ 37) 36
3768 01:01:25.586279 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3769 01:01:25.589466 iDelay=41, Bit 3, Center 15 (0 ~ 31) 32
3770 01:01:25.596374 iDelay=41, Bit 4, Center 20 (3 ~ 38) 36
3771 01:01:25.599785 iDelay=41, Bit 5, Center 22 (5 ~ 40) 36
3772 01:01:25.602697 iDelay=41, Bit 6, Center 23 (7 ~ 40) 34
3773 01:01:25.606148 iDelay=41, Bit 7, Center 20 (4 ~ 37) 34
3774 01:01:25.609497 iDelay=41, Bit 8, Center 18 (2 ~ 34) 33
3775 01:01:25.612484 iDelay=41, Bit 9, Center 17 (1 ~ 34) 34
3776 01:01:25.615780 iDelay=41, Bit 10, Center 21 (4 ~ 38) 35
3777 01:01:25.619246 iDelay=41, Bit 11, Center 22 (6 ~ 39) 34
3778 01:01:25.622217 iDelay=41, Bit 12, Center 22 (7 ~ 38) 32
3779 01:01:25.626138 iDelay=41, Bit 13, Center 22 (7 ~ 38) 32
3780 01:01:25.629029 iDelay=41, Bit 14, Center 22 (6 ~ 39) 34
3781 01:01:25.635374 iDelay=41, Bit 15, Center 15 (-1 ~ 31) 33
3782 01:01:25.635470 ==
3783 01:01:25.638912 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3784 01:01:25.642249 fsp= 1, odt_onoff= 1, Byte mode= 0
3785 01:01:25.642337 ==
3786 01:01:25.645370 DQS Delay:
3787 01:01:25.645473 DQS0 = 0, DQS1 = 0
3788 01:01:25.645605 DQM Delay:
3789 01:01:25.648602 DQM0 = 19, DQM1 = 19
3790 01:01:25.648680 DQ Delay:
3791 01:01:25.652248 DQ0 =22, DQ1 =19, DQ2 =18, DQ3 =15
3792 01:01:25.655598 DQ4 =20, DQ5 =22, DQ6 =23, DQ7 =20
3793 01:01:25.658365 DQ8 =18, DQ9 =17, DQ10 =21, DQ11 =22
3794 01:01:25.661947 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =15
3795 01:01:25.662028
3796 01:01:25.662108
3797 01:01:25.662183
3798 01:01:25.665406 [DramC_TX_OE_Calibration] TA2
3799 01:01:25.668458 Original DQ_B0 (3 6) =30, OEN = 27
3800 01:01:25.671608 Original DQ_B1 (3 6) =30, OEN = 27
3801 01:01:25.674976 23, 0x0, End_B0=23 End_B1=23
3802 01:01:25.678135 24, 0x0, End_B0=24 End_B1=24
3803 01:01:25.678220 25, 0x0, End_B0=25 End_B1=25
3804 01:01:25.681521 26, 0x0, End_B0=26 End_B1=26
3805 01:01:25.684827 27, 0x0, End_B0=27 End_B1=27
3806 01:01:25.688199 28, 0x0, End_B0=28 End_B1=28
3807 01:01:25.691541 29, 0x0, End_B0=29 End_B1=29
3808 01:01:25.691628 30, 0x0, End_B0=30 End_B1=30
3809 01:01:25.694845 31, 0xFFFF, End_B0=30 End_B1=30
3810 01:01:25.701194 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3811 01:01:25.707930 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3812 01:01:25.708028
3813 01:01:25.708107
3814 01:01:25.708178 Write Rank1 MR23 =0x3f
3815 01:01:25.711117 [DQSOSC]
3816 01:01:25.717266 [DQSOSCAuto] RK1, (LSB)MR18= 0xb1b1, (MSB)MR19= 0x202, tDQSOscB0 = 457 ps tDQSOscB1 = 457 ps
3817 01:01:25.723951 CH1_RK1: MR19=0x202, MR18=0xB1B1, DQSOSC=457, MR23=63, INC=11, DEC=17
3818 01:01:25.727506 Write Rank1 MR23 =0x3f
3819 01:01:25.727593 [DQSOSC]
3820 01:01:25.733760 [DQSOSCAuto] RK1, (LSB)MR18= 0xb3b3, (MSB)MR19= 0x202, tDQSOscB0 = 455 ps tDQSOscB1 = 455 ps
3821 01:01:25.737085 CH1 RK1: MR19=202, MR18=B3B3
3822 01:01:25.739935 [RxdqsGatingPostProcess] freq 1600
3823 01:01:25.746919 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3824 01:01:25.747019 Rank: 0
3825 01:01:25.749944 best DQS0 dly(2T, 0.5T) = (2, 6)
3826 01:01:25.753508 best DQS1 dly(2T, 0.5T) = (2, 6)
3827 01:01:25.756181 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3828 01:01:25.760049 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3829 01:01:25.760140 Rank: 1
3830 01:01:25.763075 best DQS0 dly(2T, 0.5T) = (2, 6)
3831 01:01:25.766348 best DQS1 dly(2T, 0.5T) = (2, 6)
3832 01:01:25.769525 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3833 01:01:25.772830 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3834 01:01:25.776351 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3835 01:01:25.779420 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3836 01:01:25.785851 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3837 01:01:25.785951
3838 01:01:25.786011
3839 01:01:25.789101 [Calibration Summary] Freqency 1600
3840 01:01:25.789180 CH 0, Rank 0
3841 01:01:25.792451 All Pass.
3842 01:01:25.792531
3843 01:01:25.792590 CH 0, Rank 1
3844 01:01:25.792645 All Pass.
3845 01:01:25.792697
3846 01:01:25.796062 CH 1, Rank 0
3847 01:01:25.796142 All Pass.
3848 01:01:25.796201
3849 01:01:25.796256 CH 1, Rank 1
3850 01:01:25.798892 All Pass.
3851 01:01:25.798978
3852 01:01:25.805420 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3853 01:01:25.812320 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3854 01:01:25.818609 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3855 01:01:25.822109 Write Rank0 MR3 =0xb0
3856 01:01:25.828238 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3857 01:01:25.834506 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3858 01:01:25.841609 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3859 01:01:25.844608 Write Rank1 MR3 =0xb0
3860 01:01:25.847948 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3861 01:01:25.858083 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3862 01:01:25.864319 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3863 01:01:25.864422 Write Rank0 MR3 =0xb0
3864 01:01:25.870788 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3865 01:01:25.880483 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3866 01:01:25.887110 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3867 01:01:25.887218 Write Rank1 MR3 =0xb0
3868 01:01:25.890386 DramC Write-DBI on
3869 01:01:25.893690 [GetDramInforAfterCalByMRR] Vendor 6.
3870 01:01:25.896749 [GetDramInforAfterCalByMRR] Revision 505.
3871 01:01:25.896836 MR8 1111
3872 01:01:25.903515 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3873 01:01:25.903620 MR8 1111
3874 01:01:25.906982 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3875 01:01:25.910120 MR8 1111
3876 01:01:25.913113 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3877 01:01:25.913193 MR8 1111
3878 01:01:25.919635 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3879 01:01:25.929778 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3880 01:01:25.929875 Write Rank0 MR13 =0xd0
3881 01:01:25.933048 Write Rank1 MR13 =0xd0
3882 01:01:25.935769 Write Rank0 MR13 =0xd0
3883 01:01:25.935847 Write Rank1 MR13 =0xd0
3884 01:01:25.939028 Save calibration result to emmc
3885 01:01:25.939107
3886 01:01:25.939166
3887 01:01:25.942952 [DramcModeReg_Check] Freq_1600, FSP_1
3888 01:01:25.946501 FSP_1, CH_0, RK0
3889 01:01:25.946584 Write Rank0 MR13 =0xd8
3890 01:01:25.948997 MR12 = 0x5e (global = 0x5e) match
3891 01:01:25.952579 MR14 = 0x1c (global = 0x1c) match
3892 01:01:25.955750 FSP_1, CH_0, RK1
3893 01:01:25.955832 Write Rank1 MR13 =0xd8
3894 01:01:25.958943 MR12 = 0x60 (global = 0x60) match
3895 01:01:25.962530 MR14 = 0x1c (global = 0x1c) match
3896 01:01:25.965524 FSP_1, CH_1, RK0
3897 01:01:25.965670 Write Rank0 MR13 =0xd8
3898 01:01:25.969058 MR12 = 0x5c (global = 0x5c) match
3899 01:01:25.972084 MR14 = 0x1c (global = 0x1c) match
3900 01:01:25.975775 FSP_1, CH_1, RK1
3901 01:01:25.975862 Write Rank1 MR13 =0xd8
3902 01:01:25.978601 MR12 = 0x5c (global = 0x5c) match
3903 01:01:25.981876 MR14 = 0x1c (global = 0x1c) match
3904 01:01:25.981957
3905 01:01:25.988531 [MEM_TEST] 02: After DFS, before run time config
3906 01:01:25.998240 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3907 01:01:25.998349
3908 01:01:25.998429 [TA2_TEST]
3909 01:01:25.998487 === TA2 HW
3910 01:01:26.001874 TA2 PAT: XTALK
3911 01:01:26.005025 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3912 01:01:26.011755 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3913 01:01:26.015102 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3914 01:01:26.021682 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3915 01:01:26.021775
3916 01:01:26.021836
3917 01:01:26.021892 Settings after calibration
3918 01:01:26.021944
3919 01:01:26.024716 [DramcRunTimeConfig]
3920 01:01:26.028277 TransferPLLToSPMControl - MODE SW PHYPLL
3921 01:01:26.031464 TX_TRACKING: ON
3922 01:01:26.031546 RX_TRACKING: ON
3923 01:01:26.031606 HW_GATING: ON
3924 01:01:26.034966 HW_GATING DBG: OFF
3925 01:01:26.035044 ddr_geometry:1
3926 01:01:26.038168 ddr_geometry:1
3927 01:01:26.038247 ddr_geometry:1
3928 01:01:26.041125 ddr_geometry:1
3929 01:01:26.041203 ddr_geometry:1
3930 01:01:26.041262 ddr_geometry:1
3931 01:01:26.044308 ddr_geometry:1
3932 01:01:26.044385 ddr_geometry:1
3933 01:01:26.047735 High Freq DUMMY_READ_FOR_TRACKING: ON
3934 01:01:26.051044 ZQCS_ENABLE_LP4: OFF
3935 01:01:26.054389 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3936 01:01:26.058142 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3937 01:01:26.058226 SPM_CONTROL_AFTERK: ON
3938 01:01:26.060871 IMPEDANCE_TRACKING: ON
3939 01:01:26.064016 TEMP_SENSOR: ON
3940 01:01:26.064097 PER_BANK_REFRESH: ON
3941 01:01:26.067214 HW_SAVE_FOR_SR: ON
3942 01:01:26.070435 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3943 01:01:26.073990 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3944 01:01:26.077522 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3945 01:01:26.077643 Read ODT Tracking: ON
3946 01:01:26.080677 =========================
3947 01:01:26.080756
3948 01:01:26.080816 [TA2_TEST]
3949 01:01:26.083990 === TA2 HW
3950 01:01:26.086966 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3951 01:01:26.093502 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3952 01:01:26.096852 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3953 01:01:26.103287 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3954 01:01:26.103388
3955 01:01:26.106818 [MEM_TEST] 03: After run time config
3956 01:01:26.116974 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3957 01:01:26.119686 [complex_mem_test] start addr:0x40024000, len:131072
3958 01:01:26.323906 1st complex R/W mem test pass
3959 01:01:26.330783 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3960 01:01:26.334020 sync preloader write leveling
3961 01:01:26.337181 sync preloader cbt_mr12
3962 01:01:26.340108 sync preloader cbt_clk_dly
3963 01:01:26.340192 sync preloader cbt_cmd_dly
3964 01:01:26.343568 sync preloader cbt_cs
3965 01:01:26.346875 sync preloader cbt_ca_perbit_delay
3966 01:01:26.350198 sync preloader clk_delay
3967 01:01:26.350279 sync preloader dqs_delay
3968 01:01:26.353439 sync preloader u1Gating2T_Save
3969 01:01:26.356739 sync preloader u1Gating05T_Save
3970 01:01:26.360013 sync preloader u1Gatingfine_tune_Save
3971 01:01:26.363455 sync preloader u1Gatingucpass_count_Save
3972 01:01:26.366730 sync preloader u1TxWindowPerbitVref_Save
3973 01:01:26.370012 sync preloader u1TxCenter_min_Save
3974 01:01:26.373069 sync preloader u1TxCenter_max_Save
3975 01:01:26.376223 sync preloader u1Txwin_center_Save
3976 01:01:26.379881 sync preloader u1Txfirst_pass_Save
3977 01:01:26.382831 sync preloader u1Txlast_pass_Save
3978 01:01:26.386452 sync preloader u1RxDatlat_Save
3979 01:01:26.389641 sync preloader u1RxWinPerbitVref_Save
3980 01:01:26.392860 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3981 01:01:26.396470 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3982 01:01:26.399025 sync preloader delay_cell_unit
3983 01:01:26.406189 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3984 01:01:26.409398 sync preloader write leveling
3985 01:01:26.412645 sync preloader cbt_mr12
3986 01:01:26.412745 sync preloader cbt_clk_dly
3987 01:01:26.415994 sync preloader cbt_cmd_dly
3988 01:01:26.419203 sync preloader cbt_cs
3989 01:01:26.422532 sync preloader cbt_ca_perbit_delay
3990 01:01:26.422639 sync preloader clk_delay
3991 01:01:26.425829 sync preloader dqs_delay
3992 01:01:26.429120 sync preloader u1Gating2T_Save
3993 01:01:26.431980 sync preloader u1Gating05T_Save
3994 01:01:26.435730 sync preloader u1Gatingfine_tune_Save
3995 01:01:26.438551 sync preloader u1Gatingucpass_count_Save
3996 01:01:26.441941 sync preloader u1TxWindowPerbitVref_Save
3997 01:01:26.445833 sync preloader u1TxCenter_min_Save
3998 01:01:26.448954 sync preloader u1TxCenter_max_Save
3999 01:01:26.451794 sync preloader u1Txwin_center_Save
4000 01:01:26.455101 sync preloader u1Txfirst_pass_Save
4001 01:01:26.458537 sync preloader u1Txlast_pass_Save
4002 01:01:26.461785 sync preloader u1RxDatlat_Save
4003 01:01:26.464823 sync preloader u1RxWinPerbitVref_Save
4004 01:01:26.468175 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4005 01:01:26.471568 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4006 01:01:26.474974 sync preloader delay_cell_unit
4007 01:01:26.481359 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4008 01:01:26.484745 sync preloader write leveling
4009 01:01:26.484852 sync preloader cbt_mr12
4010 01:01:26.488179 sync preloader cbt_clk_dly
4011 01:01:26.491246 sync preloader cbt_cmd_dly
4012 01:01:26.494429 sync preloader cbt_cs
4013 01:01:26.494528 sync preloader cbt_ca_perbit_delay
4014 01:01:26.497499 sync preloader clk_delay
4015 01:01:26.501227 sync preloader dqs_delay
4016 01:01:26.504447 sync preloader u1Gating2T_Save
4017 01:01:26.507289 sync preloader u1Gating05T_Save
4018 01:01:26.510683 sync preloader u1Gatingfine_tune_Save
4019 01:01:26.514070 sync preloader u1Gatingucpass_count_Save
4020 01:01:26.517313 sync preloader u1TxWindowPerbitVref_Save
4021 01:01:26.521015 sync preloader u1TxCenter_min_Save
4022 01:01:26.523821 sync preloader u1TxCenter_max_Save
4023 01:01:26.527263 sync preloader u1Txwin_center_Save
4024 01:01:26.530584 sync preloader u1Txfirst_pass_Save
4025 01:01:26.530670 sync preloader u1Txlast_pass_Save
4026 01:01:26.534065 sync preloader u1RxDatlat_Save
4027 01:01:26.537124 sync preloader u1RxWinPerbitVref_Save
4028 01:01:26.543668 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4029 01:01:26.546870 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4030 01:01:26.550037 sync preloader delay_cell_unit
4031 01:01:26.553445 just_for_test_dump_coreboot_params dump all params
4032 01:01:26.557055 dump source = 0x0
4033 01:01:26.557144 dump params frequency:1600
4034 01:01:26.560118 dump params rank number:2
4035 01:01:26.560198
4036 01:01:26.563201 dump params write leveling
4037 01:01:26.566336 write leveling[0][0][0] = 0x1f
4038 01:01:26.569759 write leveling[0][0][1] = 0x16
4039 01:01:26.569841 write leveling[0][1][0] = 0x1f
4040 01:01:26.573314 write leveling[0][1][1] = 0x17
4041 01:01:26.576376 write leveling[1][0][0] = 0x26
4042 01:01:26.579679 write leveling[1][0][1] = 0x21
4043 01:01:26.583108 write leveling[1][1][0] = 0x21
4044 01:01:26.586384 write leveling[1][1][1] = 0x1d
4045 01:01:26.586480 dump params cbt_cs
4046 01:01:26.589742 cbt_cs[0][0] = 0x7
4047 01:01:26.589823 cbt_cs[0][1] = 0x7
4048 01:01:26.593018 cbt_cs[1][0] = 0xa
4049 01:01:26.593097 cbt_cs[1][1] = 0xa
4050 01:01:26.596247 dump params cbt_mr12
4051 01:01:26.596327 cbt_mr12[0][0] = 0x1e
4052 01:01:26.599738 cbt_mr12[0][1] = 0x20
4053 01:01:26.602600 cbt_mr12[1][0] = 0x1c
4054 01:01:26.602682 cbt_mr12[1][1] = 0x1c
4055 01:01:26.605865 dump params tx window
4056 01:01:26.609054 tx_center_min[0][0][0] = 984
4057 01:01:26.609136 tx_center_max[0][0][0] = 990
4058 01:01:26.612379 tx_center_min[0][0][1] = 977
4059 01:01:26.615547 tx_center_max[0][0][1] = 984
4060 01:01:26.618802 tx_center_min[0][1][0] = 985
4061 01:01:26.622592 tx_center_max[0][1][0] = 990
4062 01:01:26.622680 tx_center_min[0][1][1] = 977
4063 01:01:26.625591 tx_center_max[0][1][1] = 985
4064 01:01:26.629179 tx_center_min[1][0][0] = 993
4065 01:01:26.632038 tx_center_max[1][0][0] = 998
4066 01:01:26.635368 tx_center_min[1][0][1] = 987
4067 01:01:26.635449 tx_center_max[1][0][1] = 994
4068 01:01:26.638740 tx_center_min[1][1][0] = 988
4069 01:01:26.641706 tx_center_max[1][1][0] = 994
4070 01:01:26.645030 tx_center_min[1][1][1] = 981
4071 01:01:26.649063 tx_center_max[1][1][1] = 988
4072 01:01:26.649151 dump params tx window
4073 01:01:26.652019 tx_win_center[0][0][0] = 990
4074 01:01:26.654993 tx_first_pass[0][0][0] = 978
4075 01:01:26.658369 tx_last_pass[0][0][0] = 1002
4076 01:01:26.658450 tx_win_center[0][0][1] = 988
4077 01:01:26.661754 tx_first_pass[0][0][1] = 976
4078 01:01:26.664965 tx_last_pass[0][0][1] = 1000
4079 01:01:26.668434 tx_win_center[0][0][2] = 989
4080 01:01:26.671807 tx_first_pass[0][0][2] = 977
4081 01:01:26.671892 tx_last_pass[0][0][2] = 1001
4082 01:01:26.675010 tx_win_center[0][0][3] = 984
4083 01:01:26.678067 tx_first_pass[0][0][3] = 972
4084 01:01:26.681519 tx_last_pass[0][0][3] = 996
4085 01:01:26.685025 tx_win_center[0][0][4] = 987
4086 01:01:26.685196 tx_first_pass[0][0][4] = 976
4087 01:01:26.688349 tx_last_pass[0][0][4] = 999
4088 01:01:26.691399 tx_win_center[0][0][5] = 986
4089 01:01:26.694776 tx_first_pass[0][0][5] = 975
4090 01:01:26.694902 tx_last_pass[0][0][5] = 997
4091 01:01:26.698139 tx_win_center[0][0][6] = 987
4092 01:01:26.701135 tx_first_pass[0][0][6] = 975
4093 01:01:26.704477 tx_last_pass[0][0][6] = 999
4094 01:01:26.707947 tx_win_center[0][0][7] = 988
4095 01:01:26.708029 tx_first_pass[0][0][7] = 976
4096 01:01:26.711336 tx_last_pass[0][0][7] = 1000
4097 01:01:26.714647 tx_win_center[0][0][8] = 977
4098 01:01:26.717823 tx_first_pass[0][0][8] = 965
4099 01:01:26.720455 tx_last_pass[0][0][8] = 989
4100 01:01:26.720533 tx_win_center[0][0][9] = 978
4101 01:01:26.723909 tx_first_pass[0][0][9] = 967
4102 01:01:26.727078 tx_last_pass[0][0][9] = 989
4103 01:01:26.730441 tx_win_center[0][0][10] = 984
4104 01:01:26.733865 tx_first_pass[0][0][10] = 972
4105 01:01:26.733947 tx_last_pass[0][0][10] = 996
4106 01:01:26.737103 tx_win_center[0][0][11] = 977
4107 01:01:26.740403 tx_first_pass[0][0][11] = 966
4108 01:01:26.743643 tx_last_pass[0][0][11] = 989
4109 01:01:26.747220 tx_win_center[0][0][12] = 978
4110 01:01:26.750248 tx_first_pass[0][0][12] = 967
4111 01:01:26.750328 tx_last_pass[0][0][12] = 990
4112 01:01:26.753502 tx_win_center[0][0][13] = 978
4113 01:01:26.756823 tx_first_pass[0][0][13] = 967
4114 01:01:26.760086 tx_last_pass[0][0][13] = 990
4115 01:01:26.763764 tx_win_center[0][0][14] = 979
4116 01:01:26.763848 tx_first_pass[0][0][14] = 967
4117 01:01:26.766365 tx_last_pass[0][0][14] = 991
4118 01:01:26.769604 tx_win_center[0][0][15] = 981
4119 01:01:26.773130 tx_first_pass[0][0][15] = 969
4120 01:01:26.776808 tx_last_pass[0][0][15] = 994
4121 01:01:26.776893 tx_win_center[0][1][0] = 990
4122 01:01:26.779999 tx_first_pass[0][1][0] = 978
4123 01:01:26.782931 tx_last_pass[0][1][0] = 1003
4124 01:01:26.786238 tx_win_center[0][1][1] = 989
4125 01:01:26.789316 tx_first_pass[0][1][1] = 977
4126 01:01:26.789400 tx_last_pass[0][1][1] = 1001
4127 01:01:26.792862 tx_win_center[0][1][2] = 990
4128 01:01:26.796163 tx_first_pass[0][1][2] = 978
4129 01:01:26.799309 tx_last_pass[0][1][2] = 1002
4130 01:01:26.802494 tx_win_center[0][1][3] = 985
4131 01:01:26.802579 tx_first_pass[0][1][3] = 973
4132 01:01:26.805758 tx_last_pass[0][1][3] = 997
4133 01:01:26.809701 tx_win_center[0][1][4] = 989
4134 01:01:26.812259 tx_first_pass[0][1][4] = 977
4135 01:01:26.815825 tx_last_pass[0][1][4] = 1001
4136 01:01:26.815908 tx_win_center[0][1][5] = 987
4137 01:01:26.819010 tx_first_pass[0][1][5] = 975
4138 01:01:26.822378 tx_last_pass[0][1][5] = 999
4139 01:01:26.825701 tx_win_center[0][1][6] = 988
4140 01:01:26.829111 tx_first_pass[0][1][6] = 976
4141 01:01:26.829191 tx_last_pass[0][1][6] = 1000
4142 01:01:26.832382 tx_win_center[0][1][7] = 989
4143 01:01:26.835855 tx_first_pass[0][1][7] = 977
4144 01:01:26.839006 tx_last_pass[0][1][7] = 1001
4145 01:01:26.841746 tx_win_center[0][1][8] = 977
4146 01:01:26.841824 tx_first_pass[0][1][8] = 966
4147 01:01:26.845180 tx_last_pass[0][1][8] = 989
4148 01:01:26.848323 tx_win_center[0][1][9] = 980
4149 01:01:26.851711 tx_first_pass[0][1][9] = 969
4150 01:01:26.851789 tx_last_pass[0][1][9] = 991
4151 01:01:26.854928 tx_win_center[0][1][10] = 985
4152 01:01:26.858260 tx_first_pass[0][1][10] = 973
4153 01:01:26.861701 tx_last_pass[0][1][10] = 997
4154 01:01:26.864969 tx_win_center[0][1][11] = 978
4155 01:01:26.868340 tx_first_pass[0][1][11] = 967
4156 01:01:26.868421 tx_last_pass[0][1][11] = 990
4157 01:01:26.871745 tx_win_center[0][1][12] = 979
4158 01:01:26.875022 tx_first_pass[0][1][12] = 968
4159 01:01:26.878151 tx_last_pass[0][1][12] = 991
4160 01:01:26.881050 tx_win_center[0][1][13] = 980
4161 01:01:26.881129 tx_first_pass[0][1][13] = 969
4162 01:01:26.884579 tx_last_pass[0][1][13] = 991
4163 01:01:26.887724 tx_win_center[0][1][14] = 980
4164 01:01:26.891662 tx_first_pass[0][1][14] = 969
4165 01:01:26.894738 tx_last_pass[0][1][14] = 992
4166 01:01:26.897674 tx_win_center[0][1][15] = 984
4167 01:01:26.897757 tx_first_pass[0][1][15] = 973
4168 01:01:26.900616 tx_last_pass[0][1][15] = 996
4169 01:01:26.904115 tx_win_center[1][0][0] = 998
4170 01:01:26.907373 tx_first_pass[1][0][0] = 985
4171 01:01:26.910612 tx_last_pass[1][0][0] = 1012
4172 01:01:26.910693 tx_win_center[1][0][1] = 997
4173 01:01:26.914062 tx_first_pass[1][0][1] = 984
4174 01:01:26.917282 tx_last_pass[1][0][1] = 1010
4175 01:01:26.920469 tx_win_center[1][0][2] = 995
4176 01:01:26.923912 tx_first_pass[1][0][2] = 983
4177 01:01:26.923993 tx_last_pass[1][0][2] = 1008
4178 01:01:26.927008 tx_win_center[1][0][3] = 993
4179 01:01:26.930656 tx_first_pass[1][0][3] = 981
4180 01:01:26.933817 tx_last_pass[1][0][3] = 1006
4181 01:01:26.933898 tx_win_center[1][0][4] = 997
4182 01:01:26.936875 tx_first_pass[1][0][4] = 984
4183 01:01:26.940138 tx_last_pass[1][0][4] = 1010
4184 01:01:26.943619 tx_win_center[1][0][5] = 998
4185 01:01:26.946716 tx_first_pass[1][0][5] = 985
4186 01:01:26.946796 tx_last_pass[1][0][5] = 1011
4187 01:01:26.950255 tx_win_center[1][0][6] = 997
4188 01:01:26.953566 tx_first_pass[1][0][6] = 985
4189 01:01:26.956866 tx_last_pass[1][0][6] = 1010
4190 01:01:26.960193 tx_win_center[1][0][7] = 997
4191 01:01:26.960271 tx_first_pass[1][0][7] = 985
4192 01:01:26.963502 tx_last_pass[1][0][7] = 1010
4193 01:01:26.966958 tx_win_center[1][0][8] = 990
4194 01:01:26.970190 tx_first_pass[1][0][8] = 979
4195 01:01:26.973443 tx_last_pass[1][0][8] = 1002
4196 01:01:26.973520 tx_win_center[1][0][9] = 990
4197 01:01:26.977026 tx_first_pass[1][0][9] = 979
4198 01:01:26.979554 tx_last_pass[1][0][9] = 1001
4199 01:01:26.982874 tx_win_center[1][0][10] = 992
4200 01:01:26.986090 tx_first_pass[1][0][10] = 981
4201 01:01:26.986169 tx_last_pass[1][0][10] = 1003
4202 01:01:26.989481 tx_win_center[1][0][11] = 993
4203 01:01:26.992780 tx_first_pass[1][0][11] = 983
4204 01:01:26.996160 tx_last_pass[1][0][11] = 1004
4205 01:01:26.999446 tx_win_center[1][0][12] = 993
4206 01:01:27.002799 tx_first_pass[1][0][12] = 983
4207 01:01:27.002881 tx_last_pass[1][0][12] = 1003
4208 01:01:27.005946 tx_win_center[1][0][13] = 994
4209 01:01:27.008899 tx_first_pass[1][0][13] = 984
4210 01:01:27.012526 tx_last_pass[1][0][13] = 1004
4211 01:01:27.015566 tx_win_center[1][0][14] = 992
4212 01:01:27.019212 tx_first_pass[1][0][14] = 982
4213 01:01:27.019294 tx_last_pass[1][0][14] = 1003
4214 01:01:27.022408 tx_win_center[1][0][15] = 987
4215 01:01:27.025037 tx_first_pass[1][0][15] = 977
4216 01:01:27.028365 tx_last_pass[1][0][15] = 998
4217 01:01:27.031673 tx_win_center[1][1][0] = 994
4218 01:01:27.031755 tx_first_pass[1][1][0] = 982
4219 01:01:27.035410 tx_last_pass[1][1][0] = 1006
4220 01:01:27.038619 tx_win_center[1][1][1] = 992
4221 01:01:27.041875 tx_first_pass[1][1][1] = 979
4222 01:01:27.044800 tx_last_pass[1][1][1] = 1006
4223 01:01:27.044879 tx_win_center[1][1][2] = 991
4224 01:01:27.048203 tx_first_pass[1][1][2] = 978
4225 01:01:27.051596 tx_last_pass[1][1][2] = 1004
4226 01:01:27.054605 tx_win_center[1][1][3] = 988
4227 01:01:27.057822 tx_first_pass[1][1][3] = 976
4228 01:01:27.057904 tx_last_pass[1][1][3] = 1000
4229 01:01:27.061495 tx_win_center[1][1][4] = 992
4230 01:01:27.064575 tx_first_pass[1][1][4] = 979
4231 01:01:27.067921 tx_last_pass[1][1][4] = 1006
4232 01:01:27.070830 tx_win_center[1][1][5] = 993
4233 01:01:27.070916 tx_first_pass[1][1][5] = 981
4234 01:01:27.074636 tx_last_pass[1][1][5] = 1006
4235 01:01:27.078021 tx_win_center[1][1][6] = 992
4236 01:01:27.080831 tx_first_pass[1][1][6] = 980
4237 01:01:27.083957 tx_last_pass[1][1][6] = 1005
4238 01:01:27.084037 tx_win_center[1][1][7] = 993
4239 01:01:27.087268 tx_first_pass[1][1][7] = 980
4240 01:01:27.090779 tx_last_pass[1][1][7] = 1006
4241 01:01:27.094149 tx_win_center[1][1][8] = 984
4242 01:01:27.097467 tx_first_pass[1][1][8] = 972
4243 01:01:27.097612 tx_last_pass[1][1][8] = 996
4244 01:01:27.100795 tx_win_center[1][1][9] = 983
4245 01:01:27.103500 tx_first_pass[1][1][9] = 972
4246 01:01:27.106884 tx_last_pass[1][1][9] = 995
4247 01:01:27.110126 tx_win_center[1][1][10] = 987
4248 01:01:27.110208 tx_first_pass[1][1][10] = 975
4249 01:01:27.113432 tx_last_pass[1][1][10] = 1000
4250 01:01:27.116649 tx_win_center[1][1][11] = 987
4251 01:01:27.120107 tx_first_pass[1][1][11] = 976
4252 01:01:27.123479 tx_last_pass[1][1][11] = 999
4253 01:01:27.127061 tx_win_center[1][1][12] = 987
4254 01:01:27.127145 tx_first_pass[1][1][12] = 976
4255 01:01:27.129816 tx_last_pass[1][1][12] = 999
4256 01:01:27.133349 tx_win_center[1][1][13] = 988
4257 01:01:27.136305 tx_first_pass[1][1][13] = 976
4258 01:01:27.139810 tx_last_pass[1][1][13] = 1000
4259 01:01:27.142825 tx_win_center[1][1][14] = 987
4260 01:01:27.142907 tx_first_pass[1][1][14] = 975
4261 01:01:27.146253 tx_last_pass[1][1][14] = 999
4262 01:01:27.150062 tx_win_center[1][1][15] = 981
4263 01:01:27.152972 tx_first_pass[1][1][15] = 970
4264 01:01:27.156256 tx_last_pass[1][1][15] = 993
4265 01:01:27.156337 dump params rx window
4266 01:01:27.159187 rx_firspass[0][0][0] = 6
4267 01:01:27.162264 rx_lastpass[0][0][0] = 38
4268 01:01:27.162342 rx_firspass[0][0][1] = 6
4269 01:01:27.166100 rx_lastpass[0][0][1] = 36
4270 01:01:27.169175 rx_firspass[0][0][2] = 6
4271 01:01:27.169258 rx_lastpass[0][0][2] = 37
4272 01:01:27.172510 rx_firspass[0][0][3] = 0
4273 01:01:27.175527 rx_lastpass[0][0][3] = 29
4274 01:01:27.179247 rx_firspass[0][0][4] = 6
4275 01:01:27.179330 rx_lastpass[0][0][4] = 36
4276 01:01:27.181906 rx_firspass[0][0][5] = 1
4277 01:01:27.185325 rx_lastpass[0][0][5] = 32
4278 01:01:27.185405 rx_firspass[0][0][6] = 5
4279 01:01:27.188676 rx_lastpass[0][0][6] = 33
4280 01:01:27.191753 rx_firspass[0][0][7] = 8
4281 01:01:27.195391 rx_lastpass[0][0][7] = 35
4282 01:01:27.195476 rx_firspass[0][0][8] = 0
4283 01:01:27.198307 rx_lastpass[0][0][8] = 30
4284 01:01:27.201638 rx_firspass[0][0][9] = 1
4285 01:01:27.201725 rx_lastpass[0][0][9] = 31
4286 01:01:27.204816 rx_firspass[0][0][10] = 9
4287 01:01:27.208412 rx_lastpass[0][0][10] = 38
4288 01:01:27.211577 rx_firspass[0][0][11] = 2
4289 01:01:27.211657 rx_lastpass[0][0][11] = 30
4290 01:01:27.214798 rx_firspass[0][0][12] = 2
4291 01:01:27.218359 rx_lastpass[0][0][12] = 32
4292 01:01:27.221975 rx_firspass[0][0][13] = 3
4293 01:01:27.222058 rx_lastpass[0][0][13] = 32
4294 01:01:27.224578 rx_firspass[0][0][14] = 3
4295 01:01:27.227923 rx_lastpass[0][0][14] = 35
4296 01:01:27.231295 rx_firspass[0][0][15] = 7
4297 01:01:27.231376 rx_lastpass[0][0][15] = 36
4298 01:01:27.234626 rx_firspass[0][1][0] = 4
4299 01:01:27.237729 rx_lastpass[0][1][0] = 38
4300 01:01:27.237812 rx_firspass[0][1][1] = 3
4301 01:01:27.240996 rx_lastpass[0][1][1] = 39
4302 01:01:27.244638 rx_firspass[0][1][2] = 5
4303 01:01:27.247997 rx_lastpass[0][1][2] = 40
4304 01:01:27.248080 rx_firspass[0][1][3] = -2
4305 01:01:27.251262 rx_lastpass[0][1][3] = 31
4306 01:01:27.253959 rx_firspass[0][1][4] = 5
4307 01:01:27.254080 rx_lastpass[0][1][4] = 39
4308 01:01:27.257363 rx_firspass[0][1][5] = 0
4309 01:01:27.260301 rx_lastpass[0][1][5] = 32
4310 01:01:27.263792 rx_firspass[0][1][6] = 1
4311 01:01:27.263896 rx_lastpass[0][1][6] = 35
4312 01:01:27.266850 rx_firspass[0][1][7] = 4
4313 01:01:27.270287 rx_lastpass[0][1][7] = 36
4314 01:01:27.270367 rx_firspass[0][1][8] = 1
4315 01:01:27.274006 rx_lastpass[0][1][8] = 33
4316 01:01:27.276965 rx_firspass[0][1][9] = 3
4317 01:01:27.280314 rx_lastpass[0][1][9] = 35
4318 01:01:27.280400 rx_firspass[0][1][10] = 9
4319 01:01:27.283768 rx_lastpass[0][1][10] = 42
4320 01:01:27.287111 rx_firspass[0][1][11] = 0
4321 01:01:27.287193 rx_lastpass[0][1][11] = 33
4322 01:01:27.289712 rx_firspass[0][1][12] = 3
4323 01:01:27.293712 rx_lastpass[0][1][12] = 36
4324 01:01:27.296666 rx_firspass[0][1][13] = 3
4325 01:01:27.296765 rx_lastpass[0][1][13] = 36
4326 01:01:27.300144 rx_firspass[0][1][14] = 5
4327 01:01:27.303298 rx_lastpass[0][1][14] = 36
4328 01:01:27.306610 rx_firspass[0][1][15] = 6
4329 01:01:27.306719 rx_lastpass[0][1][15] = 40
4330 01:01:27.310254 rx_firspass[1][0][0] = 5
4331 01:01:27.313388 rx_lastpass[1][0][0] = 39
4332 01:01:27.313473 rx_firspass[1][0][1] = 4
4333 01:01:27.316367 rx_lastpass[1][0][1] = 36
4334 01:01:27.319976 rx_firspass[1][0][2] = 4
4335 01:01:27.322747 rx_lastpass[1][0][2] = 35
4336 01:01:27.322831 rx_firspass[1][0][3] = -1
4337 01:01:27.326029 rx_lastpass[1][0][3] = 33
4338 01:01:27.329541 rx_firspass[1][0][4] = 5
4339 01:01:27.329670 rx_lastpass[1][0][4] = 35
4340 01:01:27.333114 rx_firspass[1][0][5] = 7
4341 01:01:27.335748 rx_lastpass[1][0][5] = 38
4342 01:01:27.339130 rx_firspass[1][0][6] = 11
4343 01:01:27.339212 rx_lastpass[1][0][6] = 38
4344 01:01:27.342496 rx_firspass[1][0][7] = 6
4345 01:01:27.346231 rx_lastpass[1][0][7] = 36
4346 01:01:27.348714 rx_firspass[1][0][8] = 1
4347 01:01:27.348798 rx_lastpass[1][0][8] = 32
4348 01:01:27.352256 rx_firspass[1][0][9] = 2
4349 01:01:27.355354 rx_lastpass[1][0][9] = 31
4350 01:01:27.355434 rx_firspass[1][0][10] = 6
4351 01:01:27.358599 rx_lastpass[1][0][10] = 35
4352 01:01:27.361983 rx_firspass[1][0][11] = 7
4353 01:01:27.365331 rx_lastpass[1][0][11] = 35
4354 01:01:27.365431 rx_firspass[1][0][12] = 6
4355 01:01:27.368875 rx_lastpass[1][0][12] = 37
4356 01:01:27.371677 rx_firspass[1][0][13] = 7
4357 01:01:27.375027 rx_lastpass[1][0][13] = 35
4358 01:01:27.375141 rx_firspass[1][0][14] = 8
4359 01:01:27.378550 rx_lastpass[1][0][14] = 36
4360 01:01:27.382150 rx_firspass[1][0][15] = 1
4361 01:01:27.382287 rx_lastpass[1][0][15] = 28
4362 01:01:27.385024 rx_firspass[1][1][0] = 6
4363 01:01:27.388044 rx_lastpass[1][1][0] = 38
4364 01:01:27.391896 rx_firspass[1][1][1] = 2
4365 01:01:27.391980 rx_lastpass[1][1][1] = 37
4366 01:01:27.395212 rx_firspass[1][1][2] = 3
4367 01:01:27.398712 rx_lastpass[1][1][2] = 34
4368 01:01:27.398795 rx_firspass[1][1][3] = 0
4369 01:01:27.401184 rx_lastpass[1][1][3] = 31
4370 01:01:27.404514 rx_firspass[1][1][4] = 3
4371 01:01:27.408119 rx_lastpass[1][1][4] = 38
4372 01:01:27.408216 rx_firspass[1][1][5] = 5
4373 01:01:27.411229 rx_lastpass[1][1][5] = 40
4374 01:01:27.414439 rx_firspass[1][1][6] = 7
4375 01:01:27.414521 rx_lastpass[1][1][6] = 40
4376 01:01:27.417977 rx_firspass[1][1][7] = 4
4377 01:01:27.421159 rx_lastpass[1][1][7] = 37
4378 01:01:27.424376 rx_firspass[1][1][8] = 2
4379 01:01:27.424457 rx_lastpass[1][1][8] = 34
4380 01:01:27.428202 rx_firspass[1][1][9] = 1
4381 01:01:27.431012 rx_lastpass[1][1][9] = 34
4382 01:01:27.431093 rx_firspass[1][1][10] = 4
4383 01:01:27.434551 rx_lastpass[1][1][10] = 38
4384 01:01:27.437366 rx_firspass[1][1][11] = 6
4385 01:01:27.441050 rx_lastpass[1][1][11] = 39
4386 01:01:27.441137 rx_firspass[1][1][12] = 7
4387 01:01:27.443842 rx_lastpass[1][1][12] = 38
4388 01:01:27.447182 rx_firspass[1][1][13] = 7
4389 01:01:27.450618 rx_lastpass[1][1][13] = 38
4390 01:01:27.450698 rx_firspass[1][1][14] = 6
4391 01:01:27.454103 rx_lastpass[1][1][14] = 39
4392 01:01:27.457401 rx_firspass[1][1][15] = -1
4393 01:01:27.460819 rx_lastpass[1][1][15] = 31
4394 01:01:27.460902 dump params clk_delay
4395 01:01:27.464013 clk_delay[0] = 1
4396 01:01:27.464093 clk_delay[1] = 0
4397 01:01:27.466744 dump params dqs_delay
4398 01:01:27.466823 dqs_delay[0][0] = 0
4399 01:01:27.470046 dqs_delay[0][1] = 0
4400 01:01:27.470124 dqs_delay[1][0] = -1
4401 01:01:27.473391 dqs_delay[1][1] = 0
4402 01:01:27.476573 dump params delay_cell_unit = 744
4403 01:01:27.476657 dump source = 0x0
4404 01:01:27.480690 dump params frequency:1200
4405 01:01:27.483323 dump params rank number:2
4406 01:01:27.483398
4407 01:01:27.486738 dump params write leveling
4408 01:01:27.486816 write leveling[0][0][0] = 0x0
4409 01:01:27.490240 write leveling[0][0][1] = 0x0
4410 01:01:27.493372 write leveling[0][1][0] = 0x0
4411 01:01:27.496338 write leveling[0][1][1] = 0x0
4412 01:01:27.499925 write leveling[1][0][0] = 0x0
4413 01:01:27.500033 write leveling[1][0][1] = 0x0
4414 01:01:27.503147 write leveling[1][1][0] = 0x0
4415 01:01:27.506367 write leveling[1][1][1] = 0x0
4416 01:01:27.509933 dump params cbt_cs
4417 01:01:27.510026 cbt_cs[0][0] = 0x0
4418 01:01:27.513075 cbt_cs[0][1] = 0x0
4419 01:01:27.513144 cbt_cs[1][0] = 0x0
4420 01:01:27.516224 cbt_cs[1][1] = 0x0
4421 01:01:27.516303 dump params cbt_mr12
4422 01:01:27.519799 cbt_mr12[0][0] = 0x0
4423 01:01:27.519868 cbt_mr12[0][1] = 0x0
4424 01:01:27.523220 cbt_mr12[1][0] = 0x0
4425 01:01:27.526487 cbt_mr12[1][1] = 0x0
4426 01:01:27.526558 dump params tx window
4427 01:01:27.529059 tx_center_min[0][0][0] = 0
4428 01:01:27.532712 tx_center_max[0][0][0] = 0
4429 01:01:27.532793 tx_center_min[0][0][1] = 0
4430 01:01:27.536056 tx_center_max[0][0][1] = 0
4431 01:01:27.539721 tx_center_min[0][1][0] = 0
4432 01:01:27.542250 tx_center_max[0][1][0] = 0
4433 01:01:27.542342 tx_center_min[0][1][1] = 0
4434 01:01:27.545448 tx_center_max[0][1][1] = 0
4435 01:01:27.549228 tx_center_min[1][0][0] = 0
4436 01:01:27.552321 tx_center_max[1][0][0] = 0
4437 01:01:27.552393 tx_center_min[1][0][1] = 0
4438 01:01:27.555693 tx_center_max[1][0][1] = 0
4439 01:01:27.558815 tx_center_min[1][1][0] = 0
4440 01:01:27.562176 tx_center_max[1][1][0] = 0
4441 01:01:27.562252 tx_center_min[1][1][1] = 0
4442 01:01:27.565425 tx_center_max[1][1][1] = 0
4443 01:01:27.568705 dump params tx window
4444 01:01:27.571779 tx_win_center[0][0][0] = 0
4445 01:01:27.571850 tx_first_pass[0][0][0] = 0
4446 01:01:27.575069 tx_last_pass[0][0][0] = 0
4447 01:01:27.578338 tx_win_center[0][0][1] = 0
4448 01:01:27.581799 tx_first_pass[0][0][1] = 0
4449 01:01:27.581902 tx_last_pass[0][0][1] = 0
4450 01:01:27.585183 tx_win_center[0][0][2] = 0
4451 01:01:27.588259 tx_first_pass[0][0][2] = 0
4452 01:01:27.588338 tx_last_pass[0][0][2] = 0
4453 01:01:27.591489 tx_win_center[0][0][3] = 0
4454 01:01:27.594783 tx_first_pass[0][0][3] = 0
4455 01:01:27.598116 tx_last_pass[0][0][3] = 0
4456 01:01:27.598198 tx_win_center[0][0][4] = 0
4457 01:01:27.601237 tx_first_pass[0][0][4] = 0
4458 01:01:27.604816 tx_last_pass[0][0][4] = 0
4459 01:01:27.607925 tx_win_center[0][0][5] = 0
4460 01:01:27.608003 tx_first_pass[0][0][5] = 0
4461 01:01:27.611467 tx_last_pass[0][0][5] = 0
4462 01:01:27.614493 tx_win_center[0][0][6] = 0
4463 01:01:27.617753 tx_first_pass[0][0][6] = 0
4464 01:01:27.617832 tx_last_pass[0][0][6] = 0
4465 01:01:27.621341 tx_win_center[0][0][7] = 0
4466 01:01:27.624285 tx_first_pass[0][0][7] = 0
4467 01:01:27.627446 tx_last_pass[0][0][7] = 0
4468 01:01:27.627555 tx_win_center[0][0][8] = 0
4469 01:01:27.630949 tx_first_pass[0][0][8] = 0
4470 01:01:27.633977 tx_last_pass[0][0][8] = 0
4471 01:01:27.634057 tx_win_center[0][0][9] = 0
4472 01:01:27.637348 tx_first_pass[0][0][9] = 0
4473 01:01:27.640499 tx_last_pass[0][0][9] = 0
4474 01:01:27.643996 tx_win_center[0][0][10] = 0
4475 01:01:27.644074 tx_first_pass[0][0][10] = 0
4476 01:01:27.647331 tx_last_pass[0][0][10] = 0
4477 01:01:27.650708 tx_win_center[0][0][11] = 0
4478 01:01:27.654045 tx_first_pass[0][0][11] = 0
4479 01:01:27.656942 tx_last_pass[0][0][11] = 0
4480 01:01:27.657019 tx_win_center[0][0][12] = 0
4481 01:01:27.660090 tx_first_pass[0][0][12] = 0
4482 01:01:27.663355 tx_last_pass[0][0][12] = 0
4483 01:01:27.667050 tx_win_center[0][0][13] = 0
4484 01:01:27.667129 tx_first_pass[0][0][13] = 0
4485 01:01:27.670021 tx_last_pass[0][0][13] = 0
4486 01:01:27.673339 tx_win_center[0][0][14] = 0
4487 01:01:27.676563 tx_first_pass[0][0][14] = 0
4488 01:01:27.676642 tx_last_pass[0][0][14] = 0
4489 01:01:27.680053 tx_win_center[0][0][15] = 0
4490 01:01:27.683416 tx_first_pass[0][0][15] = 0
4491 01:01:27.686568 tx_last_pass[0][0][15] = 0
4492 01:01:27.686675 tx_win_center[0][1][0] = 0
4493 01:01:27.689973 tx_first_pass[0][1][0] = 0
4494 01:01:27.693320 tx_last_pass[0][1][0] = 0
4495 01:01:27.696659 tx_win_center[0][1][1] = 0
4496 01:01:27.696740 tx_first_pass[0][1][1] = 0
4497 01:01:27.700047 tx_last_pass[0][1][1] = 0
4498 01:01:27.703230 tx_win_center[0][1][2] = 0
4499 01:01:27.706614 tx_first_pass[0][1][2] = 0
4500 01:01:27.706713 tx_last_pass[0][1][2] = 0
4501 01:01:27.710001 tx_win_center[0][1][3] = 0
4502 01:01:27.713256 tx_first_pass[0][1][3] = 0
4503 01:01:27.713369 tx_last_pass[0][1][3] = 0
4504 01:01:27.716373 tx_win_center[0][1][4] = 0
4505 01:01:27.719698 tx_first_pass[0][1][4] = 0
4506 01:01:27.722746 tx_last_pass[0][1][4] = 0
4507 01:01:27.722818 tx_win_center[0][1][5] = 0
4508 01:01:27.725926 tx_first_pass[0][1][5] = 0
4509 01:01:27.729338 tx_last_pass[0][1][5] = 0
4510 01:01:27.732662 tx_win_center[0][1][6] = 0
4511 01:01:27.732743 tx_first_pass[0][1][6] = 0
4512 01:01:27.735733 tx_last_pass[0][1][6] = 0
4513 01:01:27.738987 tx_win_center[0][1][7] = 0
4514 01:01:27.742470 tx_first_pass[0][1][7] = 0
4515 01:01:27.742546 tx_last_pass[0][1][7] = 0
4516 01:01:27.745577 tx_win_center[0][1][8] = 0
4517 01:01:27.748995 tx_first_pass[0][1][8] = 0
4518 01:01:27.749098 tx_last_pass[0][1][8] = 0
4519 01:01:27.752257 tx_win_center[0][1][9] = 0
4520 01:01:27.755745 tx_first_pass[0][1][9] = 0
4521 01:01:27.758547 tx_last_pass[0][1][9] = 0
4522 01:01:27.758626 tx_win_center[0][1][10] = 0
4523 01:01:27.761744 tx_first_pass[0][1][10] = 0
4524 01:01:27.765036 tx_last_pass[0][1][10] = 0
4525 01:01:27.768385 tx_win_center[0][1][11] = 0
4526 01:01:27.771887 tx_first_pass[0][1][11] = 0
4527 01:01:27.771966 tx_last_pass[0][1][11] = 0
4528 01:01:27.774981 tx_win_center[0][1][12] = 0
4529 01:01:27.778251 tx_first_pass[0][1][12] = 0
4530 01:01:27.781654 tx_last_pass[0][1][12] = 0
4531 01:01:27.781733 tx_win_center[0][1][13] = 0
4532 01:01:27.784969 tx_first_pass[0][1][13] = 0
4533 01:01:27.788091 tx_last_pass[0][1][13] = 0
4534 01:01:27.791696 tx_win_center[0][1][14] = 0
4535 01:01:27.791777 tx_first_pass[0][1][14] = 0
4536 01:01:27.795169 tx_last_pass[0][1][14] = 0
4537 01:01:27.798460 tx_win_center[0][1][15] = 0
4538 01:01:27.801235 tx_first_pass[0][1][15] = 0
4539 01:01:27.801339 tx_last_pass[0][1][15] = 0
4540 01:01:27.804907 tx_win_center[1][0][0] = 0
4541 01:01:27.808060 tx_first_pass[1][0][0] = 0
4542 01:01:27.810940 tx_last_pass[1][0][0] = 0
4543 01:01:27.811019 tx_win_center[1][0][1] = 0
4544 01:01:27.814362 tx_first_pass[1][0][1] = 0
4545 01:01:27.818049 tx_last_pass[1][0][1] = 0
4546 01:01:27.821112 tx_win_center[1][0][2] = 0
4547 01:01:27.821191 tx_first_pass[1][0][2] = 0
4548 01:01:27.824421 tx_last_pass[1][0][2] = 0
4549 01:01:27.827600 tx_win_center[1][0][3] = 0
4550 01:01:27.830897 tx_first_pass[1][0][3] = 0
4551 01:01:27.830982 tx_last_pass[1][0][3] = 0
4552 01:01:27.834045 tx_win_center[1][0][4] = 0
4553 01:01:27.837178 tx_first_pass[1][0][4] = 0
4554 01:01:27.837256 tx_last_pass[1][0][4] = 0
4555 01:01:27.840503 tx_win_center[1][0][5] = 0
4556 01:01:27.843949 tx_first_pass[1][0][5] = 0
4557 01:01:27.847158 tx_last_pass[1][0][5] = 0
4558 01:01:27.847236 tx_win_center[1][0][6] = 0
4559 01:01:27.850802 tx_first_pass[1][0][6] = 0
4560 01:01:27.854014 tx_last_pass[1][0][6] = 0
4561 01:01:27.856936 tx_win_center[1][0][7] = 0
4562 01:01:27.857015 tx_first_pass[1][0][7] = 0
4563 01:01:27.860258 tx_last_pass[1][0][7] = 0
4564 01:01:27.863870 tx_win_center[1][0][8] = 0
4565 01:01:27.866937 tx_first_pass[1][0][8] = 0
4566 01:01:27.867018 tx_last_pass[1][0][8] = 0
4567 01:01:27.870213 tx_win_center[1][0][9] = 0
4568 01:01:27.873508 tx_first_pass[1][0][9] = 0
4569 01:01:27.876994 tx_last_pass[1][0][9] = 0
4570 01:01:27.877072 tx_win_center[1][0][10] = 0
4571 01:01:27.880207 tx_first_pass[1][0][10] = 0
4572 01:01:27.883733 tx_last_pass[1][0][10] = 0
4573 01:01:27.886221 tx_win_center[1][0][11] = 0
4574 01:01:27.886300 tx_first_pass[1][0][11] = 0
4575 01:01:27.890090 tx_last_pass[1][0][11] = 0
4576 01:01:27.892784 tx_win_center[1][0][12] = 0
4577 01:01:27.896067 tx_first_pass[1][0][12] = 0
4578 01:01:27.896145 tx_last_pass[1][0][12] = 0
4579 01:01:27.899527 tx_win_center[1][0][13] = 0
4580 01:01:27.902841 tx_first_pass[1][0][13] = 0
4581 01:01:27.905957 tx_last_pass[1][0][13] = 0
4582 01:01:27.906039 tx_win_center[1][0][14] = 0
4583 01:01:27.909888 tx_first_pass[1][0][14] = 0
4584 01:01:27.913036 tx_last_pass[1][0][14] = 0
4585 01:01:27.916035 tx_win_center[1][0][15] = 0
4586 01:01:27.918983 tx_first_pass[1][0][15] = 0
4587 01:01:27.919063 tx_last_pass[1][0][15] = 0
4588 01:01:27.922636 tx_win_center[1][1][0] = 0
4589 01:01:27.925544 tx_first_pass[1][1][0] = 0
4590 01:01:27.925664 tx_last_pass[1][1][0] = 0
4591 01:01:27.929235 tx_win_center[1][1][1] = 0
4592 01:01:27.932242 tx_first_pass[1][1][1] = 0
4593 01:01:27.935683 tx_last_pass[1][1][1] = 0
4594 01:01:27.935762 tx_win_center[1][1][2] = 0
4595 01:01:27.938785 tx_first_pass[1][1][2] = 0
4596 01:01:27.942350 tx_last_pass[1][1][2] = 0
4597 01:01:27.945724 tx_win_center[1][1][3] = 0
4598 01:01:27.945823 tx_first_pass[1][1][3] = 0
4599 01:01:27.948446 tx_last_pass[1][1][3] = 0
4600 01:01:27.952193 tx_win_center[1][1][4] = 0
4601 01:01:27.955538 tx_first_pass[1][1][4] = 0
4602 01:01:27.955623 tx_last_pass[1][1][4] = 0
4603 01:01:27.958659 tx_win_center[1][1][5] = 0
4604 01:01:27.961756 tx_first_pass[1][1][5] = 0
4605 01:01:27.965004 tx_last_pass[1][1][5] = 0
4606 01:01:27.965083 tx_win_center[1][1][6] = 0
4607 01:01:27.968097 tx_first_pass[1][1][6] = 0
4608 01:01:27.972226 tx_last_pass[1][1][6] = 0
4609 01:01:27.972306 tx_win_center[1][1][7] = 0
4610 01:01:27.975159 tx_first_pass[1][1][7] = 0
4611 01:01:27.978506 tx_last_pass[1][1][7] = 0
4612 01:01:27.981939 tx_win_center[1][1][8] = 0
4613 01:01:27.982016 tx_first_pass[1][1][8] = 0
4614 01:01:27.985203 tx_last_pass[1][1][8] = 0
4615 01:01:27.988346 tx_win_center[1][1][9] = 0
4616 01:01:27.991800 tx_first_pass[1][1][9] = 0
4617 01:01:27.991881 tx_last_pass[1][1][9] = 0
4618 01:01:27.995089 tx_win_center[1][1][10] = 0
4619 01:01:27.998384 tx_first_pass[1][1][10] = 0
4620 01:01:28.001109 tx_last_pass[1][1][10] = 0
4621 01:01:28.001188 tx_win_center[1][1][11] = 0
4622 01:01:28.004482 tx_first_pass[1][1][11] = 0
4623 01:01:28.007783 tx_last_pass[1][1][11] = 0
4624 01:01:28.011000 tx_win_center[1][1][12] = 0
4625 01:01:28.011078 tx_first_pass[1][1][12] = 0
4626 01:01:28.014249 tx_last_pass[1][1][12] = 0
4627 01:01:28.017690 tx_win_center[1][1][13] = 0
4628 01:01:28.020951 tx_first_pass[1][1][13] = 0
4629 01:01:28.021029 tx_last_pass[1][1][13] = 0
4630 01:01:28.023957 tx_win_center[1][1][14] = 0
4631 01:01:28.027756 tx_first_pass[1][1][14] = 0
4632 01:01:28.030521 tx_last_pass[1][1][14] = 0
4633 01:01:28.033840 tx_win_center[1][1][15] = 0
4634 01:01:28.033919 tx_first_pass[1][1][15] = 0
4635 01:01:28.037411 tx_last_pass[1][1][15] = 0
4636 01:01:28.040447 dump params rx window
4637 01:01:28.040524 rx_firspass[0][0][0] = 0
4638 01:01:28.043544 rx_lastpass[0][0][0] = 0
4639 01:01:28.047424 rx_firspass[0][0][1] = 0
4640 01:01:28.047503 rx_lastpass[0][0][1] = 0
4641 01:01:28.050581 rx_firspass[0][0][2] = 0
4642 01:01:28.053479 rx_lastpass[0][0][2] = 0
4643 01:01:28.056853 rx_firspass[0][0][3] = 0
4644 01:01:28.056930 rx_lastpass[0][0][3] = 0
4645 01:01:28.060172 rx_firspass[0][0][4] = 0
4646 01:01:28.063472 rx_lastpass[0][0][4] = 0
4647 01:01:28.063551 rx_firspass[0][0][5] = 0
4648 01:01:28.066758 rx_lastpass[0][0][5] = 0
4649 01:01:28.069753 rx_firspass[0][0][6] = 0
4650 01:01:28.069831 rx_lastpass[0][0][6] = 0
4651 01:01:28.073144 rx_firspass[0][0][7] = 0
4652 01:01:28.076496 rx_lastpass[0][0][7] = 0
4653 01:01:28.079987 rx_firspass[0][0][8] = 0
4654 01:01:28.080066 rx_lastpass[0][0][8] = 0
4655 01:01:28.082859 rx_firspass[0][0][9] = 0
4656 01:01:28.086245 rx_lastpass[0][0][9] = 0
4657 01:01:28.086325 rx_firspass[0][0][10] = 0
4658 01:01:28.089420 rx_lastpass[0][0][10] = 0
4659 01:01:28.092954 rx_firspass[0][0][11] = 0
4660 01:01:28.096107 rx_lastpass[0][0][11] = 0
4661 01:01:28.096185 rx_firspass[0][0][12] = 0
4662 01:01:28.099467 rx_lastpass[0][0][12] = 0
4663 01:01:28.102819 rx_firspass[0][0][13] = 0
4664 01:01:28.102899 rx_lastpass[0][0][13] = 0
4665 01:01:28.105479 rx_firspass[0][0][14] = 0
4666 01:01:28.108766 rx_lastpass[0][0][14] = 0
4667 01:01:28.112889 rx_firspass[0][0][15] = 0
4668 01:01:28.112969 rx_lastpass[0][0][15] = 0
4669 01:01:28.115492 rx_firspass[0][1][0] = 0
4670 01:01:28.118956 rx_lastpass[0][1][0] = 0
4671 01:01:28.119059 rx_firspass[0][1][1] = 0
4672 01:01:28.121970 rx_lastpass[0][1][1] = 0
4673 01:01:28.125527 rx_firspass[0][1][2] = 0
4674 01:01:28.128879 rx_lastpass[0][1][2] = 0
4675 01:01:28.128956 rx_firspass[0][1][3] = 0
4676 01:01:28.132013 rx_lastpass[0][1][3] = 0
4677 01:01:28.135175 rx_firspass[0][1][4] = 0
4678 01:01:28.135255 rx_lastpass[0][1][4] = 0
4679 01:01:28.138673 rx_firspass[0][1][5] = 0
4680 01:01:28.141734 rx_lastpass[0][1][5] = 0
4681 01:01:28.141806 rx_firspass[0][1][6] = 0
4682 01:01:28.145051 rx_lastpass[0][1][6] = 0
4683 01:01:28.147903 rx_firspass[0][1][7] = 0
4684 01:01:28.151316 rx_lastpass[0][1][7] = 0
4685 01:01:28.151389 rx_firspass[0][1][8] = 0
4686 01:01:28.154764 rx_lastpass[0][1][8] = 0
4687 01:01:28.158139 rx_firspass[0][1][9] = 0
4688 01:01:28.158209 rx_lastpass[0][1][9] = 0
4689 01:01:28.161587 rx_firspass[0][1][10] = 0
4690 01:01:28.164875 rx_lastpass[0][1][10] = 0
4691 01:01:28.167764 rx_firspass[0][1][11] = 0
4692 01:01:28.167834 rx_lastpass[0][1][11] = 0
4693 01:01:28.171105 rx_firspass[0][1][12] = 0
4694 01:01:28.174252 rx_lastpass[0][1][12] = 0
4695 01:01:28.174319 rx_firspass[0][1][13] = 0
4696 01:01:28.177461 rx_lastpass[0][1][13] = 0
4697 01:01:28.180766 rx_firspass[0][1][14] = 0
4698 01:01:28.184120 rx_lastpass[0][1][14] = 0
4699 01:01:28.184199 rx_firspass[0][1][15] = 0
4700 01:01:28.187576 rx_lastpass[0][1][15] = 0
4701 01:01:28.190740 rx_firspass[1][0][0] = 0
4702 01:01:28.190836 rx_lastpass[1][0][0] = 0
4703 01:01:28.193850 rx_firspass[1][0][1] = 0
4704 01:01:28.197137 rx_lastpass[1][0][1] = 0
4705 01:01:28.200694 rx_firspass[1][0][2] = 0
4706 01:01:28.200770 rx_lastpass[1][0][2] = 0
4707 01:01:28.203628 rx_firspass[1][0][3] = 0
4708 01:01:28.206926 rx_lastpass[1][0][3] = 0
4709 01:01:28.207000 rx_firspass[1][0][4] = 0
4710 01:01:28.210534 rx_lastpass[1][0][4] = 0
4711 01:01:28.214033 rx_firspass[1][0][5] = 0
4712 01:01:28.214110 rx_lastpass[1][0][5] = 0
4713 01:01:28.216922 rx_firspass[1][0][6] = 0
4714 01:01:28.220230 rx_lastpass[1][0][6] = 0
4715 01:01:28.223702 rx_firspass[1][0][7] = 0
4716 01:01:28.223803 rx_lastpass[1][0][7] = 0
4717 01:01:28.227008 rx_firspass[1][0][8] = 0
4718 01:01:28.230323 rx_lastpass[1][0][8] = 0
4719 01:01:28.230418 rx_firspass[1][0][9] = 0
4720 01:01:28.233134 rx_lastpass[1][0][9] = 0
4721 01:01:28.236938 rx_firspass[1][0][10] = 0
4722 01:01:28.237046 rx_lastpass[1][0][10] = 0
4723 01:01:28.240062 rx_firspass[1][0][11] = 0
4724 01:01:28.243319 rx_lastpass[1][0][11] = 0
4725 01:01:28.246833 rx_firspass[1][0][12] = 0
4726 01:01:28.246907 rx_lastpass[1][0][12] = 0
4727 01:01:28.249975 rx_firspass[1][0][13] = 0
4728 01:01:28.253361 rx_lastpass[1][0][13] = 0
4729 01:01:28.253436 rx_firspass[1][0][14] = 0
4730 01:01:28.256254 rx_lastpass[1][0][14] = 0
4731 01:01:28.259409 rx_firspass[1][0][15] = 0
4732 01:01:28.263000 rx_lastpass[1][0][15] = 0
4733 01:01:28.263077 rx_firspass[1][1][0] = 0
4734 01:01:28.266335 rx_lastpass[1][1][0] = 0
4735 01:01:28.268934 rx_firspass[1][1][1] = 0
4736 01:01:28.269027 rx_lastpass[1][1][1] = 0
4737 01:01:28.273086 rx_firspass[1][1][2] = 0
4738 01:01:28.275702 rx_lastpass[1][1][2] = 0
4739 01:01:28.279031 rx_firspass[1][1][3] = 0
4740 01:01:28.279128 rx_lastpass[1][1][3] = 0
4741 01:01:28.283068 rx_firspass[1][1][4] = 0
4742 01:01:28.285576 rx_lastpass[1][1][4] = 0
4743 01:01:28.285655 rx_firspass[1][1][5] = 0
4744 01:01:28.288903 rx_lastpass[1][1][5] = 0
4745 01:01:28.292142 rx_firspass[1][1][6] = 0
4746 01:01:28.292213 rx_lastpass[1][1][6] = 0
4747 01:01:28.295851 rx_firspass[1][1][7] = 0
4748 01:01:28.299079 rx_lastpass[1][1][7] = 0
4749 01:01:28.299155 rx_firspass[1][1][8] = 0
4750 01:01:28.302304 rx_lastpass[1][1][8] = 0
4751 01:01:28.305782 rx_firspass[1][1][9] = 0
4752 01:01:28.309130 rx_lastpass[1][1][9] = 0
4753 01:01:28.309225 rx_firspass[1][1][10] = 0
4754 01:01:28.312257 rx_lastpass[1][1][10] = 0
4755 01:01:28.315224 rx_firspass[1][1][11] = 0
4756 01:01:28.315317 rx_lastpass[1][1][11] = 0
4757 01:01:28.318619 rx_firspass[1][1][12] = 0
4758 01:01:28.321708 rx_lastpass[1][1][12] = 0
4759 01:01:28.324860 rx_firspass[1][1][13] = 0
4760 01:01:28.324954 rx_lastpass[1][1][13] = 0
4761 01:01:28.328411 rx_firspass[1][1][14] = 0
4762 01:01:28.331459 rx_lastpass[1][1][14] = 0
4763 01:01:28.335026 rx_firspass[1][1][15] = 0
4764 01:01:28.335128 rx_lastpass[1][1][15] = 0
4765 01:01:28.338145 dump params clk_delay
4766 01:01:28.338238 clk_delay[0] = 0
4767 01:01:28.341850 clk_delay[1] = 0
4768 01:01:28.341942 dump params dqs_delay
4769 01:01:28.344931 dqs_delay[0][0] = 0
4770 01:01:28.348128 dqs_delay[0][1] = 0
4771 01:01:28.348212 dqs_delay[1][0] = 0
4772 01:01:28.351428 dqs_delay[1][1] = 0
4773 01:01:28.354864 dump params delay_cell_unit = 744
4774 01:01:28.354965 dump source = 0x0
4775 01:01:28.358104 dump params frequency:800
4776 01:01:28.358191 dump params rank number:2
4777 01:01:28.358250
4778 01:01:28.361426 dump params write leveling
4779 01:01:28.364716 write leveling[0][0][0] = 0x0
4780 01:01:28.368227 write leveling[0][0][1] = 0x0
4781 01:01:28.371349 write leveling[0][1][0] = 0x0
4782 01:01:28.374637 write leveling[0][1][1] = 0x0
4783 01:01:28.374743 write leveling[1][0][0] = 0x0
4784 01:01:28.377462 write leveling[1][0][1] = 0x0
4785 01:01:28.380716 write leveling[1][1][0] = 0x0
4786 01:01:28.383941 write leveling[1][1][1] = 0x0
4787 01:01:28.384047 dump params cbt_cs
4788 01:01:28.387628 cbt_cs[0][0] = 0x0
4789 01:01:28.387707 cbt_cs[0][1] = 0x0
4790 01:01:28.390916 cbt_cs[1][0] = 0x0
4791 01:01:28.391049 cbt_cs[1][1] = 0x0
4792 01:01:28.394276 dump params cbt_mr12
4793 01:01:28.397866 cbt_mr12[0][0] = 0x0
4794 01:01:28.397973 cbt_mr12[0][1] = 0x0
4795 01:01:28.400264 cbt_mr12[1][0] = 0x0
4796 01:01:28.400355 cbt_mr12[1][1] = 0x0
4797 01:01:28.403797 dump params tx window
4798 01:01:28.407038 tx_center_min[0][0][0] = 0
4799 01:01:28.407110 tx_center_max[0][0][0] = 0
4800 01:01:28.410391 tx_center_min[0][0][1] = 0
4801 01:01:28.413705 tx_center_max[0][0][1] = 0
4802 01:01:28.417068 tx_center_min[0][1][0] = 0
4803 01:01:28.417165 tx_center_max[0][1][0] = 0
4804 01:01:28.420454 tx_center_min[0][1][1] = 0
4805 01:01:28.423714 tx_center_max[0][1][1] = 0
4806 01:01:28.426722 tx_center_min[1][0][0] = 0
4807 01:01:28.426821 tx_center_max[1][0][0] = 0
4808 01:01:28.429900 tx_center_min[1][0][1] = 0
4809 01:01:28.433137 tx_center_max[1][0][1] = 0
4810 01:01:28.436393 tx_center_min[1][1][0] = 0
4811 01:01:28.436466 tx_center_max[1][1][0] = 0
4812 01:01:28.439697 tx_center_min[1][1][1] = 0
4813 01:01:28.443038 tx_center_max[1][1][1] = 0
4814 01:01:28.446449 dump params tx window
4815 01:01:28.446532 tx_win_center[0][0][0] = 0
4816 01:01:28.449818 tx_first_pass[0][0][0] = 0
4817 01:01:28.452737 tx_last_pass[0][0][0] = 0
4818 01:01:28.452816 tx_win_center[0][0][1] = 0
4819 01:01:28.456029 tx_first_pass[0][0][1] = 0
4820 01:01:28.459303 tx_last_pass[0][0][1] = 0
4821 01:01:28.462709 tx_win_center[0][0][2] = 0
4822 01:01:28.462794 tx_first_pass[0][0][2] = 0
4823 01:01:28.466148 tx_last_pass[0][0][2] = 0
4824 01:01:28.469497 tx_win_center[0][0][3] = 0
4825 01:01:28.472528 tx_first_pass[0][0][3] = 0
4826 01:01:28.472611 tx_last_pass[0][0][3] = 0
4827 01:01:28.476045 tx_win_center[0][0][4] = 0
4828 01:01:28.479495 tx_first_pass[0][0][4] = 0
4829 01:01:28.482427 tx_last_pass[0][0][4] = 0
4830 01:01:28.482510 tx_win_center[0][0][5] = 0
4831 01:01:28.485704 tx_first_pass[0][0][5] = 0
4832 01:01:28.488887 tx_last_pass[0][0][5] = 0
4833 01:01:28.488992 tx_win_center[0][0][6] = 0
4834 01:01:28.492305 tx_first_pass[0][0][6] = 0
4835 01:01:28.495518 tx_last_pass[0][0][6] = 0
4836 01:01:28.498812 tx_win_center[0][0][7] = 0
4837 01:01:28.498895 tx_first_pass[0][0][7] = 0
4838 01:01:28.502273 tx_last_pass[0][0][7] = 0
4839 01:01:28.505715 tx_win_center[0][0][8] = 0
4840 01:01:28.509140 tx_first_pass[0][0][8] = 0
4841 01:01:28.509223 tx_last_pass[0][0][8] = 0
4842 01:01:28.512485 tx_win_center[0][0][9] = 0
4843 01:01:28.515211 tx_first_pass[0][0][9] = 0
4844 01:01:28.518627 tx_last_pass[0][0][9] = 0
4845 01:01:28.518709 tx_win_center[0][0][10] = 0
4846 01:01:28.522199 tx_first_pass[0][0][10] = 0
4847 01:01:28.525355 tx_last_pass[0][0][10] = 0
4848 01:01:28.528896 tx_win_center[0][0][11] = 0
4849 01:01:28.528977 tx_first_pass[0][0][11] = 0
4850 01:01:28.532009 tx_last_pass[0][0][11] = 0
4851 01:01:28.535122 tx_win_center[0][0][12] = 0
4852 01:01:28.538285 tx_first_pass[0][0][12] = 0
4853 01:01:28.538396 tx_last_pass[0][0][12] = 0
4854 01:01:28.541899 tx_win_center[0][0][13] = 0
4855 01:01:28.545207 tx_first_pass[0][0][13] = 0
4856 01:01:28.548089 tx_last_pass[0][0][13] = 0
4857 01:01:28.548169 tx_win_center[0][0][14] = 0
4858 01:01:28.551463 tx_first_pass[0][0][14] = 0
4859 01:01:28.554814 tx_last_pass[0][0][14] = 0
4860 01:01:28.558327 tx_win_center[0][0][15] = 0
4861 01:01:28.561439 tx_first_pass[0][0][15] = 0
4862 01:01:28.561518 tx_last_pass[0][0][15] = 0
4863 01:01:28.564728 tx_win_center[0][1][0] = 0
4864 01:01:28.567932 tx_first_pass[0][1][0] = 0
4865 01:01:28.568012 tx_last_pass[0][1][0] = 0
4866 01:01:28.571586 tx_win_center[0][1][1] = 0
4867 01:01:28.574478 tx_first_pass[0][1][1] = 0
4868 01:01:28.577701 tx_last_pass[0][1][1] = 0
4869 01:01:28.577782 tx_win_center[0][1][2] = 0
4870 01:01:28.581103 tx_first_pass[0][1][2] = 0
4871 01:01:28.584473 tx_last_pass[0][1][2] = 0
4872 01:01:28.587875 tx_win_center[0][1][3] = 0
4873 01:01:28.587982 tx_first_pass[0][1][3] = 0
4874 01:01:28.590764 tx_last_pass[0][1][3] = 0
4875 01:01:28.593765 tx_win_center[0][1][4] = 0
4876 01:01:28.597287 tx_first_pass[0][1][4] = 0
4877 01:01:28.597409 tx_last_pass[0][1][4] = 0
4878 01:01:28.601168 tx_win_center[0][1][5] = 0
4879 01:01:28.603532 tx_first_pass[0][1][5] = 0
4880 01:01:28.606879 tx_last_pass[0][1][5] = 0
4881 01:01:28.606961 tx_win_center[0][1][6] = 0
4882 01:01:28.610673 tx_first_pass[0][1][6] = 0
4883 01:01:28.613525 tx_last_pass[0][1][6] = 0
4884 01:01:28.613630 tx_win_center[0][1][7] = 0
4885 01:01:28.616874 tx_first_pass[0][1][7] = 0
4886 01:01:28.620379 tx_last_pass[0][1][7] = 0
4887 01:01:28.623719 tx_win_center[0][1][8] = 0
4888 01:01:28.623791 tx_first_pass[0][1][8] = 0
4889 01:01:28.627149 tx_last_pass[0][1][8] = 0
4890 01:01:28.629834 tx_win_center[0][1][9] = 0
4891 01:01:28.633408 tx_first_pass[0][1][9] = 0
4892 01:01:28.633478 tx_last_pass[0][1][9] = 0
4893 01:01:28.636630 tx_win_center[0][1][10] = 0
4894 01:01:28.639723 tx_first_pass[0][1][10] = 0
4895 01:01:28.642945 tx_last_pass[0][1][10] = 0
4896 01:01:28.643027 tx_win_center[0][1][11] = 0
4897 01:01:28.646481 tx_first_pass[0][1][11] = 0
4898 01:01:28.649332 tx_last_pass[0][1][11] = 0
4899 01:01:28.652832 tx_win_center[0][1][12] = 0
4900 01:01:28.652913 tx_first_pass[0][1][12] = 0
4901 01:01:28.656727 tx_last_pass[0][1][12] = 0
4902 01:01:28.659455 tx_win_center[0][1][13] = 0
4903 01:01:28.662836 tx_first_pass[0][1][13] = 0
4904 01:01:28.666245 tx_last_pass[0][1][13] = 0
4905 01:01:28.666325 tx_win_center[0][1][14] = 0
4906 01:01:28.669490 tx_first_pass[0][1][14] = 0
4907 01:01:28.672675 tx_last_pass[0][1][14] = 0
4908 01:01:28.675978 tx_win_center[0][1][15] = 0
4909 01:01:28.676059 tx_first_pass[0][1][15] = 0
4910 01:01:28.679617 tx_last_pass[0][1][15] = 0
4911 01:01:28.682448 tx_win_center[1][0][0] = 0
4912 01:01:28.685683 tx_first_pass[1][0][0] = 0
4913 01:01:28.685762 tx_last_pass[1][0][0] = 0
4914 01:01:28.689467 tx_win_center[1][0][1] = 0
4915 01:01:28.692181 tx_first_pass[1][0][1] = 0
4916 01:01:28.695349 tx_last_pass[1][0][1] = 0
4917 01:01:28.695469 tx_win_center[1][0][2] = 0
4918 01:01:28.699134 tx_first_pass[1][0][2] = 0
4919 01:01:28.702118 tx_last_pass[1][0][2] = 0
4920 01:01:28.702201 tx_win_center[1][0][3] = 0
4921 01:01:28.705537 tx_first_pass[1][0][3] = 0
4922 01:01:28.708578 tx_last_pass[1][0][3] = 0
4923 01:01:28.711913 tx_win_center[1][0][4] = 0
4924 01:01:28.712015 tx_first_pass[1][0][4] = 0
4925 01:01:28.715127 tx_last_pass[1][0][4] = 0
4926 01:01:28.718310 tx_win_center[1][0][5] = 0
4927 01:01:28.721528 tx_first_pass[1][0][5] = 0
4928 01:01:28.721645 tx_last_pass[1][0][5] = 0
4929 01:01:28.724929 tx_win_center[1][0][6] = 0
4930 01:01:28.728820 tx_first_pass[1][0][6] = 0
4931 01:01:28.731398 tx_last_pass[1][0][6] = 0
4932 01:01:28.731478 tx_win_center[1][0][7] = 0
4933 01:01:28.734870 tx_first_pass[1][0][7] = 0
4934 01:01:28.738088 tx_last_pass[1][0][7] = 0
4935 01:01:28.738171 tx_win_center[1][0][8] = 0
4936 01:01:28.741415 tx_first_pass[1][0][8] = 0
4937 01:01:28.744803 tx_last_pass[1][0][8] = 0
4938 01:01:28.748157 tx_win_center[1][0][9] = 0
4939 01:01:28.748238 tx_first_pass[1][0][9] = 0
4940 01:01:28.751575 tx_last_pass[1][0][9] = 0
4941 01:01:28.754868 tx_win_center[1][0][10] = 0
4942 01:01:28.757850 tx_first_pass[1][0][10] = 0
4943 01:01:28.757930 tx_last_pass[1][0][10] = 0
4944 01:01:28.761137 tx_win_center[1][0][11] = 0
4945 01:01:28.764751 tx_first_pass[1][0][11] = 0
4946 01:01:28.768121 tx_last_pass[1][0][11] = 0
4947 01:01:28.768203 tx_win_center[1][0][12] = 0
4948 01:01:28.771321 tx_first_pass[1][0][12] = 0
4949 01:01:28.774723 tx_last_pass[1][0][12] = 0
4950 01:01:28.777908 tx_win_center[1][0][13] = 0
4951 01:01:28.781241 tx_first_pass[1][0][13] = 0
4952 01:01:28.781321 tx_last_pass[1][0][13] = 0
4953 01:01:28.784644 tx_win_center[1][0][14] = 0
4954 01:01:28.787823 tx_first_pass[1][0][14] = 0
4955 01:01:28.791173 tx_last_pass[1][0][14] = 0
4956 01:01:28.791252 tx_win_center[1][0][15] = 0
4957 01:01:28.793877 tx_first_pass[1][0][15] = 0
4958 01:01:28.797036 tx_last_pass[1][0][15] = 0
4959 01:01:28.800357 tx_win_center[1][1][0] = 0
4960 01:01:28.800439 tx_first_pass[1][1][0] = 0
4961 01:01:28.803805 tx_last_pass[1][1][0] = 0
4962 01:01:28.807342 tx_win_center[1][1][1] = 0
4963 01:01:28.810304 tx_first_pass[1][1][1] = 0
4964 01:01:28.810383 tx_last_pass[1][1][1] = 0
4965 01:01:28.814194 tx_win_center[1][1][2] = 0
4966 01:01:28.817407 tx_first_pass[1][1][2] = 0
4967 01:01:28.817512 tx_last_pass[1][1][2] = 0
4968 01:01:28.820214 tx_win_center[1][1][3] = 0
4969 01:01:28.823440 tx_first_pass[1][1][3] = 0
4970 01:01:28.826806 tx_last_pass[1][1][3] = 0
4971 01:01:28.826887 tx_win_center[1][1][4] = 0
4972 01:01:28.829884 tx_first_pass[1][1][4] = 0
4973 01:01:28.833684 tx_last_pass[1][1][4] = 0
4974 01:01:28.836558 tx_win_center[1][1][5] = 0
4975 01:01:28.836637 tx_first_pass[1][1][5] = 0
4976 01:01:28.840012 tx_last_pass[1][1][5] = 0
4977 01:01:28.843363 tx_win_center[1][1][6] = 0
4978 01:01:28.846695 tx_first_pass[1][1][6] = 0
4979 01:01:28.846776 tx_last_pass[1][1][6] = 0
4980 01:01:28.849424 tx_win_center[1][1][7] = 0
4981 01:01:28.853094 tx_first_pass[1][1][7] = 0
4982 01:01:28.856359 tx_last_pass[1][1][7] = 0
4983 01:01:28.856440 tx_win_center[1][1][8] = 0
4984 01:01:28.859880 tx_first_pass[1][1][8] = 0
4985 01:01:28.863089 tx_last_pass[1][1][8] = 0
4986 01:01:28.863168 tx_win_center[1][1][9] = 0
4987 01:01:28.866186 tx_first_pass[1][1][9] = 0
4988 01:01:28.869235 tx_last_pass[1][1][9] = 0
4989 01:01:28.872601 tx_win_center[1][1][10] = 0
4990 01:01:28.876006 tx_first_pass[1][1][10] = 0
4991 01:01:28.876089 tx_last_pass[1][1][10] = 0
4992 01:01:28.879129 tx_win_center[1][1][11] = 0
4993 01:01:28.882128 tx_first_pass[1][1][11] = 0
4994 01:01:28.885406 tx_last_pass[1][1][11] = 0
4995 01:01:28.885511 tx_win_center[1][1][12] = 0
4996 01:01:28.888877 tx_first_pass[1][1][12] = 0
4997 01:01:28.892335 tx_last_pass[1][1][12] = 0
4998 01:01:28.895507 tx_win_center[1][1][13] = 0
4999 01:01:28.895588 tx_first_pass[1][1][13] = 0
5000 01:01:28.898929 tx_last_pass[1][1][13] = 0
5001 01:01:28.902073 tx_win_center[1][1][14] = 0
5002 01:01:28.905700 tx_first_pass[1][1][14] = 0
5003 01:01:28.905786 tx_last_pass[1][1][14] = 0
5004 01:01:28.909021 tx_win_center[1][1][15] = 0
5005 01:01:28.912090 tx_first_pass[1][1][15] = 0
5006 01:01:28.915342 tx_last_pass[1][1][15] = 0
5007 01:01:28.915423 dump params rx window
5008 01:01:28.918472 rx_firspass[0][0][0] = 0
5009 01:01:28.921351 rx_lastpass[0][0][0] = 0
5010 01:01:28.921454 rx_firspass[0][0][1] = 0
5011 01:01:28.925122 rx_lastpass[0][0][1] = 0
5012 01:01:28.928213 rx_firspass[0][0][2] = 0
5013 01:01:28.931282 rx_lastpass[0][0][2] = 0
5014 01:01:28.931363 rx_firspass[0][0][3] = 0
5015 01:01:28.935113 rx_lastpass[0][0][3] = 0
5016 01:01:28.937830 rx_firspass[0][0][4] = 0
5017 01:01:28.937909 rx_lastpass[0][0][4] = 0
5018 01:01:28.941131 rx_firspass[0][0][5] = 0
5019 01:01:28.944497 rx_lastpass[0][0][5] = 0
5020 01:01:28.944604 rx_firspass[0][0][6] = 0
5021 01:01:28.947780 rx_lastpass[0][0][6] = 0
5022 01:01:28.950995 rx_firspass[0][0][7] = 0
5023 01:01:28.951077 rx_lastpass[0][0][7] = 0
5024 01:01:28.954146 rx_firspass[0][0][8] = 0
5025 01:01:28.957943 rx_lastpass[0][0][8] = 0
5026 01:01:28.960913 rx_firspass[0][0][9] = 0
5027 01:01:28.960991 rx_lastpass[0][0][9] = 0
5028 01:01:28.964349 rx_firspass[0][0][10] = 0
5029 01:01:28.967790 rx_lastpass[0][0][10] = 0
5030 01:01:28.967906 rx_firspass[0][0][11] = 0
5031 01:01:28.971036 rx_lastpass[0][0][11] = 0
5032 01:01:28.974492 rx_firspass[0][0][12] = 0
5033 01:01:28.977771 rx_lastpass[0][0][12] = 0
5034 01:01:28.977852 rx_firspass[0][0][13] = 0
5035 01:01:28.980711 rx_lastpass[0][0][13] = 0
5036 01:01:28.984164 rx_firspass[0][0][14] = 0
5037 01:01:28.984244 rx_lastpass[0][0][14] = 0
5038 01:01:28.987191 rx_firspass[0][0][15] = 0
5039 01:01:28.990660 rx_lastpass[0][0][15] = 0
5040 01:01:28.993775 rx_firspass[0][1][0] = 0
5041 01:01:28.993949 rx_lastpass[0][1][0] = 0
5042 01:01:28.997053 rx_firspass[0][1][1] = 0
5043 01:01:29.000297 rx_lastpass[0][1][1] = 0
5044 01:01:29.000410 rx_firspass[0][1][2] = 0
5045 01:01:29.003491 rx_lastpass[0][1][2] = 0
5046 01:01:29.006722 rx_firspass[0][1][3] = 0
5047 01:01:29.006802 rx_lastpass[0][1][3] = 0
5048 01:01:29.010026 rx_firspass[0][1][4] = 0
5049 01:01:29.013324 rx_lastpass[0][1][4] = 0
5050 01:01:29.016627 rx_firspass[0][1][5] = 0
5051 01:01:29.016708 rx_lastpass[0][1][5] = 0
5052 01:01:29.019985 rx_firspass[0][1][6] = 0
5053 01:01:29.023161 rx_lastpass[0][1][6] = 0
5054 01:01:29.023240 rx_firspass[0][1][7] = 0
5055 01:01:29.026405 rx_lastpass[0][1][7] = 0
5056 01:01:29.029693 rx_firspass[0][1][8] = 0
5057 01:01:29.029773 rx_lastpass[0][1][8] = 0
5058 01:01:29.033125 rx_firspass[0][1][9] = 0
5059 01:01:29.036568 rx_lastpass[0][1][9] = 0
5060 01:01:29.039665 rx_firspass[0][1][10] = 0
5061 01:01:29.039746 rx_lastpass[0][1][10] = 0
5062 01:01:29.042925 rx_firspass[0][1][11] = 0
5063 01:01:29.046239 rx_lastpass[0][1][11] = 0
5064 01:01:29.046320 rx_firspass[0][1][12] = 0
5065 01:01:29.049477 rx_lastpass[0][1][12] = 0
5066 01:01:29.052780 rx_firspass[0][1][13] = 0
5067 01:01:29.056113 rx_lastpass[0][1][13] = 0
5068 01:01:29.056194 rx_firspass[0][1][14] = 0
5069 01:01:29.059347 rx_lastpass[0][1][14] = 0
5070 01:01:29.062740 rx_firspass[0][1][15] = 0
5071 01:01:29.062818 rx_lastpass[0][1][15] = 0
5072 01:01:29.066053 rx_firspass[1][0][0] = 0
5073 01:01:29.069181 rx_lastpass[1][0][0] = 0
5074 01:01:29.072942 rx_firspass[1][0][1] = 0
5075 01:01:29.073022 rx_lastpass[1][0][1] = 0
5076 01:01:29.075989 rx_firspass[1][0][2] = 0
5077 01:01:29.079234 rx_lastpass[1][0][2] = 0
5078 01:01:29.079329 rx_firspass[1][0][3] = 0
5079 01:01:29.082141 rx_lastpass[1][0][3] = 0
5080 01:01:29.085566 rx_firspass[1][0][4] = 0
5081 01:01:29.085662 rx_lastpass[1][0][4] = 0
5082 01:01:29.089295 rx_firspass[1][0][5] = 0
5083 01:01:29.092012 rx_lastpass[1][0][5] = 0
5084 01:01:29.095841 rx_firspass[1][0][6] = 0
5085 01:01:29.095927 rx_lastpass[1][0][6] = 0
5086 01:01:29.099127 rx_firspass[1][0][7] = 0
5087 01:01:29.102311 rx_lastpass[1][0][7] = 0
5088 01:01:29.102392 rx_firspass[1][0][8] = 0
5089 01:01:29.105660 rx_lastpass[1][0][8] = 0
5090 01:01:29.108930 rx_firspass[1][0][9] = 0
5091 01:01:29.109011 rx_lastpass[1][0][9] = 0
5092 01:01:29.111608 rx_firspass[1][0][10] = 0
5093 01:01:29.115332 rx_lastpass[1][0][10] = 0
5094 01:01:29.118091 rx_firspass[1][0][11] = 0
5095 01:01:29.118180 rx_lastpass[1][0][11] = 0
5096 01:01:29.121446 rx_firspass[1][0][12] = 0
5097 01:01:29.124866 rx_lastpass[1][0][12] = 0
5098 01:01:29.124945 rx_firspass[1][0][13] = 0
5099 01:01:29.128412 rx_lastpass[1][0][13] = 0
5100 01:01:29.131515 rx_firspass[1][0][14] = 0
5101 01:01:29.134986 rx_lastpass[1][0][14] = 0
5102 01:01:29.135067 rx_firspass[1][0][15] = 0
5103 01:01:29.138274 rx_lastpass[1][0][15] = 0
5104 01:01:29.141708 rx_firspass[1][1][0] = 0
5105 01:01:29.144805 rx_lastpass[1][1][0] = 0
5106 01:01:29.144887 rx_firspass[1][1][1] = 0
5107 01:01:29.147886 rx_lastpass[1][1][1] = 0
5108 01:01:29.151003 rx_firspass[1][1][2] = 0
5109 01:01:29.151081 rx_lastpass[1][1][2] = 0
5110 01:01:29.154720 rx_firspass[1][1][3] = 0
5111 01:01:29.158011 rx_lastpass[1][1][3] = 0
5112 01:01:29.158090 rx_firspass[1][1][4] = 0
5113 01:01:29.161270 rx_lastpass[1][1][4] = 0
5114 01:01:29.164147 rx_firspass[1][1][5] = 0
5115 01:01:29.164223 rx_lastpass[1][1][5] = 0
5116 01:01:29.167406 rx_firspass[1][1][6] = 0
5117 01:01:29.170687 rx_lastpass[1][1][6] = 0
5118 01:01:29.173966 rx_firspass[1][1][7] = 0
5119 01:01:29.174045 rx_lastpass[1][1][7] = 0
5120 01:01:29.177211 rx_firspass[1][1][8] = 0
5121 01:01:29.180953 rx_lastpass[1][1][8] = 0
5122 01:01:29.181035 rx_firspass[1][1][9] = 0
5123 01:01:29.184244 rx_lastpass[1][1][9] = 0
5124 01:01:29.187529 rx_firspass[1][1][10] = 0
5125 01:01:29.190710 rx_lastpass[1][1][10] = 0
5126 01:01:29.190791 rx_firspass[1][1][11] = 0
5127 01:01:29.193501 rx_lastpass[1][1][11] = 0
5128 01:01:29.197113 rx_firspass[1][1][12] = 0
5129 01:01:29.197196 rx_lastpass[1][1][12] = 0
5130 01:01:29.200511 rx_firspass[1][1][13] = 0
5131 01:01:29.203814 rx_lastpass[1][1][13] = 0
5132 01:01:29.206831 rx_firspass[1][1][14] = 0
5133 01:01:29.206912 rx_lastpass[1][1][14] = 0
5134 01:01:29.209855 rx_firspass[1][1][15] = 0
5135 01:01:29.213317 rx_lastpass[1][1][15] = 0
5136 01:01:29.213399 dump params clk_delay
5137 01:01:29.216448 clk_delay[0] = 0
5138 01:01:29.216528 clk_delay[1] = 0
5139 01:01:29.220159 dump params dqs_delay
5140 01:01:29.220238 dqs_delay[0][0] = 0
5141 01:01:29.223249 dqs_delay[0][1] = 0
5142 01:01:29.226584 dqs_delay[1][0] = 0
5143 01:01:29.226663 dqs_delay[1][1] = 0
5144 01:01:29.229943 dump params delay_cell_unit = 744
5145 01:01:29.233231 mt_set_emi_preloader end
5146 01:01:29.236395 [mt_mem_init] dram size: 0x100000000, rank number: 2
5147 01:01:29.243094 [complex_mem_test] start addr:0x40000000, len:20480
5148 01:01:29.278119 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5149 01:01:29.284522 [complex_mem_test] start addr:0x80000000, len:20480
5150 01:01:29.320436 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5151 01:01:29.326878 [complex_mem_test] start addr:0xc0000000, len:20480
5152 01:01:29.362972 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5153 01:01:29.369340 [complex_mem_test] start addr:0x56000000, len:8192
5154 01:01:29.386142 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5155 01:01:29.389327 ddr_geometry:1
5156 01:01:29.392476 [complex_mem_test] start addr:0x80000000, len:8192
5157 01:01:29.409794 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5158 01:01:29.413012 dram_init: dram init end (result: 0)
5159 01:01:29.419779 Successfully loaded DRAM blobs and ran DRAM calibration
5160 01:01:29.429544 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5161 01:01:29.429708 CBMEM:
5162 01:01:29.432853 IMD: root @ 00000000fffff000 254 entries.
5163 01:01:29.435977 IMD: root @ 00000000ffffec00 62 entries.
5164 01:01:29.442280 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5165 01:01:29.448965 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5166 01:01:29.452202 in-header: 03 a1 00 00 08 00 00 00
5167 01:01:29.455876 in-data: 84 60 60 10 00 00 00 00
5168 01:01:29.458860 Chrome EC: clear events_b mask to 0x0000000020004000
5169 01:01:29.465765 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5170 01:01:29.484899 in-header: 03 fd 00 00 00 00 00 00
5171 01:01:29.485034 in-data:
5172 01:01:29.485096 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5173 01:01:29.485152 CBFS @ 21000 size 3d4000
5174 01:01:29.485205 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5175 01:01:29.485699 CBFS: Locating 'fallback/ramstage'
5176 01:01:29.489298 CBFS: Found @ offset 10d40 size d563
5177 01:01:29.511696 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5178 01:01:29.523765 Accumulated console time in romstage 13482 ms
5179 01:01:29.523880
5180 01:01:29.523938
5181 01:01:29.533326 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5182 01:01:29.536717 ARM64: Exception handlers installed.
5183 01:01:29.536825 ARM64: Testing exception
5184 01:01:29.540009 ARM64: Done test exception
5185 01:01:29.543303 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5186 01:01:29.546717 Manufacturer: ef
5187 01:01:29.553534 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5188 01:01:29.556627 WARNING: RO_VPD is uninitialized or empty.
5189 01:01:29.559902 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5190 01:01:29.562966 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5191 01:01:29.573429 read SPI 0x550600 0x3a00: 4533 us, 3275 KB/s, 26.200 Mbps
5192 01:01:29.577025 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5193 01:01:29.582995 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5194 01:01:29.583101 Enumerating buses...
5195 01:01:29.589905 Show all devs... Before device enumeration.
5196 01:01:29.590013 Root Device: enabled 1
5197 01:01:29.592781 CPU_CLUSTER: 0: enabled 1
5198 01:01:29.596234 CPU: 00: enabled 1
5199 01:01:29.596324 Compare with tree...
5200 01:01:29.599464 Root Device: enabled 1
5201 01:01:29.599571 CPU_CLUSTER: 0: enabled 1
5202 01:01:29.602985 CPU: 00: enabled 1
5203 01:01:29.606295 Root Device scanning...
5204 01:01:29.609109 root_dev_scan_bus for Root Device
5205 01:01:29.609216 CPU_CLUSTER: 0 enabled
5206 01:01:29.612731 root_dev_scan_bus for Root Device done
5207 01:01:29.619215 scan_bus: scanning of bus Root Device took 10690 usecs
5208 01:01:29.619316 done
5209 01:01:29.622476 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5210 01:01:29.626033 Allocating resources...
5211 01:01:29.629231 Reading resources...
5212 01:01:29.632400 Root Device read_resources bus 0 link: 0
5213 01:01:29.635886 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5214 01:01:29.638818 CPU: 00 missing read_resources
5215 01:01:29.642207 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5216 01:01:29.645686 Root Device read_resources bus 0 link: 0 done
5217 01:01:29.648714 Done reading resources.
5218 01:01:29.652282 Show resources in subtree (Root Device)...After reading.
5219 01:01:29.658610 Root Device child on link 0 CPU_CLUSTER: 0
5220 01:01:29.661656 CPU_CLUSTER: 0 child on link 0 CPU: 00
5221 01:01:29.668392 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5222 01:01:29.671855 CPU: 00
5223 01:01:29.671957 Setting resources...
5224 01:01:29.678399 Root Device assign_resources, bus 0 link: 0
5225 01:01:29.681086 CPU_CLUSTER: 0 missing set_resources
5226 01:01:29.685197 Root Device assign_resources, bus 0 link: 0
5227 01:01:29.685280 Done setting resources.
5228 01:01:29.691287 Show resources in subtree (Root Device)...After assigning values.
5229 01:01:29.694450 Root Device child on link 0 CPU_CLUSTER: 0
5230 01:01:29.697463 CPU_CLUSTER: 0 child on link 0 CPU: 00
5231 01:01:29.707893 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5232 01:01:29.708011 CPU: 00
5233 01:01:29.711047 Done allocating resources.
5234 01:01:29.717738 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5235 01:01:29.717878 Enabling resources...
5236 01:01:29.717939 done.
5237 01:01:29.724302 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5238 01:01:29.724438 Initializing devices...
5239 01:01:29.727608 Root Device init ...
5240 01:01:29.730852 mainboard_init: Starting display init.
5241 01:01:29.734086 ADC[4]: Raw value=75908 ID=0
5242 01:01:29.756316 anx7625_power_on_init: Init interface.
5243 01:01:29.759342 anx7625_disable_pd_protocol: Disabled PD feature.
5244 01:01:29.765856 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5245 01:01:29.812704 anx7625_start_dp_work: Secure OCM version=00
5246 01:01:29.816089 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5247 01:01:29.833327 sp_tx_get_edid_block: EDID Block = 1
5248 01:01:29.950426 Extracted contents:
5249 01:01:29.953799 header: 00 ff ff ff ff ff ff 00
5250 01:01:29.956881 serial number: 06 af 5c 14 00 00 00 00 00 1a
5251 01:01:29.960220 version: 01 04
5252 01:01:29.963605 basic params: 95 1a 0e 78 02
5253 01:01:29.966740 chroma info: 99 85 95 55 56 92 28 22 50 54
5254 01:01:29.970027 established: 00 00 00
5255 01:01:29.976799 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5256 01:01:29.983335 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5257 01:01:29.986626 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5258 01:01:29.993048 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5259 01:01:29.999884 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5260 01:01:30.003193 extensions: 00
5261 01:01:30.003286 checksum: ae
5262 01:01:30.003347
5263 01:01:30.009478 Manufacturer: AUO Model 145c Serial Number 0
5264 01:01:30.009610 Made week 0 of 2016
5265 01:01:30.013269 EDID version: 1.4
5266 01:01:30.013348 Digital display
5267 01:01:30.016540 6 bits per primary color channel
5268 01:01:30.020028 DisplayPort interface
5269 01:01:30.020109 Maximum image size: 26 cm x 14 cm
5270 01:01:30.022751 Gamma: 220%
5271 01:01:30.022828 Check DPMS levels
5272 01:01:30.026128 Supported color formats: RGB 4:4:4
5273 01:01:30.029371 First detailed timing is preferred timing
5274 01:01:30.032714 Established timings supported:
5275 01:01:30.036239 Standard timings supported:
5276 01:01:30.036319 Detailed timings
5277 01:01:30.042406 Hex of detail: ce1d56ea50001a3030204600009010000018
5278 01:01:30.045564 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5279 01:01:30.052462 0556 0586 05a6 0640 hborder 0
5280 01:01:30.055516 0300 0304 030a 031a vborder 0
5281 01:01:30.058805 -hsync -vsync
5282 01:01:30.058886 Did detailed timing
5283 01:01:30.065511 Hex of detail: 0000000f0000000000000000000000000020
5284 01:01:30.068583 Manufacturer-specified data, tag 15
5285 01:01:30.071934 Hex of detail: 000000fe0041554f0a202020202020202020
5286 01:01:30.072015 ASCII string: AUO
5287 01:01:30.078873 Hex of detail: 000000fe004231313658414230312e34200a
5288 01:01:30.082106 ASCII string: B116XAB01.4
5289 01:01:30.082188 Checksum
5290 01:01:30.082247 Checksum: 0xae (valid)
5291 01:01:30.088438 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5292 01:01:30.091843 DSI data_rate: 457800000 bps
5293 01:01:30.098530 anx7625_parse_edid: set default k value to 0x3d for panel
5294 01:01:30.101483 anx7625_parse_edid: pixelclock(76300).
5295 01:01:30.105053 hactive(1366), hsync(32), hfp(48), hbp(154)
5296 01:01:30.108226 vactive(768), vsync(6), vfp(4), vbp(16)
5297 01:01:30.111702 anx7625_dsi_config: config dsi.
5298 01:01:30.118726 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5299 01:01:30.139674 anx7625_dsi_config: success to config DSI
5300 01:01:30.143141 anx7625_dp_start: MIPI phy setup OK.
5301 01:01:30.146346 [SSUSB] Setting up USB HOST controller...
5302 01:01:30.149355 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5303 01:01:30.153188 [SSUSB] phy power-on done.
5304 01:01:30.156694 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5305 01:01:30.160392 in-header: 03 fc 01 00 00 00 00 00
5306 01:01:30.160479 in-data:
5307 01:01:30.167123 handle_proto3_response: EC response with error code: 1
5308 01:01:30.167215 SPM: pcm index = 1
5309 01:01:30.170117 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5310 01:01:30.173430 CBFS @ 21000 size 3d4000
5311 01:01:30.179996 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5312 01:01:30.183077 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5313 01:01:30.186600 CBFS: Found @ offset 1e7c0 size 1026
5314 01:01:30.192913 read SPI 0x3f808 0x1026: 1270 us, 3255 KB/s, 26.040 Mbps
5315 01:01:30.196250 SPM: binary array size = 2988
5316 01:01:30.199307 SPM: version = pcm_allinone_v1.17.2_20180829
5317 01:01:30.202759 SPM binary loaded in 32 msecs
5318 01:01:30.210850 spm_kick_im_to_fetch: ptr = 000000004021eec2
5319 01:01:30.214038 spm_kick_im_to_fetch: len = 2988
5320 01:01:30.214126 SPM: spm_kick_pcm_to_run
5321 01:01:30.217487 SPM: spm_kick_pcm_to_run done
5322 01:01:30.220442 SPM: spm_init done in 52 msecs
5323 01:01:30.223818 Root Device init finished in 494987 usecs
5324 01:01:30.227494 CPU_CLUSTER: 0 init ...
5325 01:01:30.237333 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5326 01:01:30.240784 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5327 01:01:30.244062 CBFS @ 21000 size 3d4000
5328 01:01:30.247181 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5329 01:01:30.250351 CBFS: Locating 'sspm.bin'
5330 01:01:30.253871 CBFS: Found @ offset 208c0 size 41cb
5331 01:01:30.264268 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5332 01:01:30.271730 CPU_CLUSTER: 0 init finished in 42804 usecs
5333 01:01:30.271843 Devices initialized
5334 01:01:30.275241 Show all devs... After init.
5335 01:01:30.278606 Root Device: enabled 1
5336 01:01:30.278687 CPU_CLUSTER: 0: enabled 1
5337 01:01:30.281526 CPU: 00: enabled 1
5338 01:01:30.284747 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5339 01:01:30.291620 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5340 01:01:30.294684 ELOG: NV offset 0x558000 size 0x1000
5341 01:01:30.301263 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5342 01:01:30.304488 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5343 01:01:30.310950 ELOG: Event(17) added with size 13 at 2024-06-16 01:01:30 UTC
5344 01:01:30.314169 out: cmd=0x121: 03 db 21 01 00 00 00 00
5345 01:01:30.317389 in-header: 03 e4 00 00 2c 00 00 00
5346 01:01:30.330814 in-data: c8 4a 00 00 00 00 00 00 02 10 00 00 06 80 00 00 bc c3 00 00 06 80 00 00 5d 2c 02 00 06 80 00 00 fc 0f 01 00 06 80 00 00 4b 4e 02 00
5347 01:01:30.334016 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5348 01:01:30.337151 in-header: 03 19 00 00 08 00 00 00
5349 01:01:30.340562 in-data: a2 e0 47 00 13 00 00 00
5350 01:01:30.343590 Chrome EC: UHEPI supported
5351 01:01:30.350095 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5352 01:01:30.353280 in-header: 03 e1 00 00 08 00 00 00
5353 01:01:30.356943 in-data: 84 20 60 10 00 00 00 00
5354 01:01:30.359906 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5355 01:01:30.366392 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5356 01:01:30.370100 in-header: 03 e1 00 00 08 00 00 00
5357 01:01:30.373807 in-data: 84 20 60 10 00 00 00 00
5358 01:01:30.379759 ELOG: Event(A1) added with size 10 at 2024-06-16 01:01:30 UTC
5359 01:01:30.386464 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5360 01:01:30.389523 ELOG: Event(A0) added with size 9 at 2024-06-16 01:01:30 UTC
5361 01:01:30.392731 elog_add_boot_reason: Logged dev mode boot
5362 01:01:30.396131 Finalize devices...
5363 01:01:30.399296 Devices finalized
5364 01:01:30.402841 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5365 01:01:30.406492 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5366 01:01:30.412790 ELOG: Event(91) added with size 10 at 2024-06-16 01:01:30 UTC
5367 01:01:30.416345 Writing coreboot table at 0xffeda000
5368 01:01:30.419819 0. 0000000000114000-000000000011efff: RAMSTAGE
5369 01:01:30.425745 1. 0000000040000000-000000004023cfff: RAMSTAGE
5370 01:01:30.429215 2. 000000004023d000-00000000545fffff: RAM
5371 01:01:30.432505 3. 0000000054600000-000000005465ffff: BL31
5372 01:01:30.435806 4. 0000000054660000-00000000ffed9fff: RAM
5373 01:01:30.442313 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5374 01:01:30.445352 6. 0000000100000000-000000013fffffff: RAM
5375 01:01:30.448946 Passing 5 GPIOs to payload:
5376 01:01:30.451736 NAME | PORT | POLARITY | VALUE
5377 01:01:30.458637 write protect | 0x00000096 | low | high
5378 01:01:30.461818 EC in RW | 0x000000b1 | high | undefined
5379 01:01:30.464901 EC interrupt | 0x00000097 | low | undefined
5380 01:01:30.472164 TPM interrupt | 0x00000099 | high | undefined
5381 01:01:30.475468 speaker enable | 0x000000af | high | undefined
5382 01:01:30.478579 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5383 01:01:30.481542 in-header: 03 f7 00 00 02 00 00 00
5384 01:01:30.485447 in-data: 04 00
5385 01:01:30.485576 Board ID: 4
5386 01:01:30.488556 ADC[3]: Raw value=213471 ID=1
5387 01:01:30.488659 RAM code: 1
5388 01:01:30.491608 SKU ID: 16
5389 01:01:30.494520 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5390 01:01:30.497813 CBFS @ 21000 size 3d4000
5391 01:01:30.501575 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5392 01:01:30.508223 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum f809
5393 01:01:30.511229 coreboot table: 940 bytes.
5394 01:01:30.514337 IMD ROOT 0. 00000000fffff000 00001000
5395 01:01:30.517756 IMD SMALL 1. 00000000ffffe000 00001000
5396 01:01:30.520817 CONSOLE 2. 00000000fffde000 00020000
5397 01:01:30.524243 FMAP 3. 00000000fffdd000 0000047c
5398 01:01:30.527469 TIME STAMP 4. 00000000fffdc000 00000910
5399 01:01:30.530861 RAMOOPS 5. 00000000ffedc000 00100000
5400 01:01:30.537373 COREBOOT 6. 00000000ffeda000 00002000
5401 01:01:30.537492 IMD small region:
5402 01:01:30.540794 IMD ROOT 0. 00000000ffffec00 00000400
5403 01:01:30.543851 VBOOT WORK 1. 00000000ffffeb00 00000100
5404 01:01:30.550429 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5405 01:01:30.553583 VPD 3. 00000000ffffea60 0000006c
5406 01:01:30.557001 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5407 01:01:30.563816 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5408 01:01:30.567069 in-header: 03 e1 00 00 08 00 00 00
5409 01:01:30.570372 in-data: 84 20 60 10 00 00 00 00
5410 01:01:30.573807 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5411 01:01:30.576728 CBFS @ 21000 size 3d4000
5412 01:01:30.583603 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5413 01:01:30.586638 CBFS: Locating 'fallback/payload'
5414 01:01:30.593572 CBFS: Found @ offset dc040 size 439a0
5415 01:01:30.681484 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5416 01:01:30.684799 Checking segment from ROM address 0x0000000040003a00
5417 01:01:30.691655 Checking segment from ROM address 0x0000000040003a1c
5418 01:01:30.694419 Loading segment from ROM address 0x0000000040003a00
5419 01:01:30.697956 code (compression=0)
5420 01:01:30.707681 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5421 01:01:30.714227 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5422 01:01:30.717432 it's not compressed!
5423 01:01:30.721113 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5424 01:01:30.727081 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5425 01:01:30.736038 Loading segment from ROM address 0x0000000040003a1c
5426 01:01:30.738825 Entry Point 0x0000000080000000
5427 01:01:30.738901 Loaded segments
5428 01:01:30.745508 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5429 01:01:30.748878 Jumping to boot code at 0000000080000000(00000000ffeda000)
5430 01:01:30.758818 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5431 01:01:30.765104 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5432 01:01:30.765184 CBFS @ 21000 size 3d4000
5433 01:01:30.772201 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5434 01:01:30.774938 CBFS: Locating 'fallback/bl31'
5435 01:01:30.778437 CBFS: Found @ offset 36dc0 size 5820
5436 01:01:30.789835 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5437 01:01:30.793131 Checking segment from ROM address 0x0000000040003a00
5438 01:01:30.799389 Checking segment from ROM address 0x0000000040003a1c
5439 01:01:30.802459 Loading segment from ROM address 0x0000000040003a00
5440 01:01:30.806043 code (compression=1)
5441 01:01:30.815719 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5442 01:01:30.822319 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5443 01:01:30.822399 using LZMA
5444 01:01:30.831756 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5445 01:01:30.838356 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5446 01:01:30.841452 Loading segment from ROM address 0x0000000040003a1c
5447 01:01:30.844720 Entry Point 0x0000000054601000
5448 01:01:30.844797 Loaded segments
5449 01:01:30.847994 NOTICE: MT8183 bl31_setup
5450 01:01:30.855815 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5451 01:01:30.858505 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5452 01:01:30.861949 INFO: [DEVAPC] dump DEVAPC registers:
5453 01:01:30.871669 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5454 01:01:30.878736 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5455 01:01:30.888020 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5456 01:01:30.894691 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5457 01:01:30.904402 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5458 01:01:30.911474 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5459 01:01:30.920943 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5460 01:01:30.927337 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5461 01:01:30.937121 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5462 01:01:30.943693 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5463 01:01:30.953372 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5464 01:01:30.959970 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5465 01:01:30.970109 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5466 01:01:30.976654 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5467 01:01:30.982703 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5468 01:01:30.992838 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5469 01:01:30.999170 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5470 01:01:31.006011 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5471 01:01:31.012332 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5472 01:01:31.022344 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5473 01:01:31.028806 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5474 01:01:31.035304 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5475 01:01:31.038511 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5476 01:01:31.041853 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5477 01:01:31.045289 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5478 01:01:31.048489 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5479 01:01:31.051878 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5480 01:01:31.058041 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5481 01:01:31.061256 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5482 01:01:31.064484 WARNING: region 0:
5483 01:01:31.068145 WARNING: apc:0x168, sa:0x0, ea:0xfff
5484 01:01:31.071450 WARNING: region 1:
5485 01:01:31.074710 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5486 01:01:31.074787 WARNING: region 2:
5487 01:01:31.078172 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5488 01:01:31.081182 WARNING: region 3:
5489 01:01:31.084341 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5490 01:01:31.087601 WARNING: region 4:
5491 01:01:31.090726 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5492 01:01:31.090817 WARNING: region 5:
5493 01:01:31.093995 WARNING: apc:0x0, sa:0x0, ea:0x0
5494 01:01:31.097120 WARNING: region 6:
5495 01:01:31.100822 WARNING: apc:0x0, sa:0x0, ea:0x0
5496 01:01:31.100901 WARNING: region 7:
5497 01:01:31.104258 WARNING: apc:0x0, sa:0x0, ea:0x0
5498 01:01:31.110457 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5499 01:01:31.113495 INFO: SPM: enable SPMC mode
5500 01:01:31.117190 NOTICE: spm_boot_init() start
5501 01:01:31.120120 NOTICE: spm_boot_init() end
5502 01:01:31.123568 INFO: BL31: Initializing runtime services
5503 01:01:31.130165 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5504 01:01:31.133239 INFO: BL31: Preparing for EL3 exit to normal world
5505 01:01:31.136937 INFO: Entry point address = 0x80000000
5506 01:01:31.139942 INFO: SPSR = 0x8
5507 01:01:31.161890
5508 01:01:31.161988
5509 01:01:31.162048
5510 01:01:31.162522 end: 2.2.3 depthcharge-start (duration 00:00:23) [common]
5511 01:01:31.162620 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5512 01:01:31.162691 Setting prompt string to ['jacuzzi:']
5513 01:01:31.162765 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5514 01:01:31.164976 Starting depthcharge on Juniper...
5515 01:01:31.165053
5516 01:01:31.168324 vboot_handoff: creating legacy vboot_handoff structure
5517 01:01:31.168401
5518 01:01:31.171549 ec_init(0): CrosEC protocol v3 supported (544, 544)
5519 01:01:31.175244
5520 01:01:31.175319 Wipe memory regions:
5521 01:01:31.175379
5522 01:01:31.178502 [0x00000040000000, 0x00000054600000)
5523 01:01:31.221618
5524 01:01:31.221751 [0x00000054660000, 0x00000080000000)
5525 01:01:31.312804
5526 01:01:31.312929 [0x000000811994a0, 0x000000ffeda000)
5527 01:01:31.572849
5528 01:01:31.572978 [0x00000100000000, 0x00000140000000)
5529 01:01:31.704697
5530 01:01:31.708055 Initializing XHCI USB controller at 0x11200000.
5531 01:01:31.731267
5532 01:01:31.734163 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5533 01:01:31.734246
5534 01:01:31.734305
5535 01:01:31.734571 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5537 01:01:31.834949 jacuzzi: tftpboot 192.168.201.1 14368621/tftp-deploy-sqd68brs/kernel/image.itb 14368621/tftp-deploy-sqd68brs/kernel/cmdline
5538 01:01:31.835165 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5539 01:01:31.835246 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:27)
5540 01:01:31.839276 tftpboot 192.168.201.1 14368621/tftp-deploy-sqd68brs/kernel/image.itp-deploy-sqd68brs/kernel/cmdline
5541 01:01:31.839355
5542 01:01:31.839415 Waiting for link
5543 01:01:32.245418
5544 01:01:32.245625 R8152: Initializing
5545 01:01:32.245692
5546 01:01:32.248391 Version 9 (ocp_data = 6010)
5547 01:01:32.248553
5548 01:01:32.251659 R8152: Done initializing
5549 01:01:32.251900
5550 01:01:32.251991 Adding net device
5551 01:01:32.637370
5552 01:01:32.637666 done.
5553 01:01:32.637774
5554 01:01:32.637833 MAC: 00:e0:4c:72:3d:a6
5555 01:01:32.637911
5556 01:01:32.641006 Sending DHCP discover... done.
5557 01:01:32.641163
5558 01:01:32.644075 Waiting for reply... done.
5559 01:01:32.644175
5560 01:01:32.646852 Sending DHCP request... done.
5561 01:01:32.646992
5562 01:01:32.650363 Waiting for reply... done.
5563 01:01:32.650441
5564 01:01:32.650501 My ip is 192.168.201.20
5565 01:01:32.650556
5566 01:01:32.653907 The DHCP server ip is 192.168.201.1
5567 01:01:32.653985
5568 01:01:32.657133 TFTP server IP predefined by user: 192.168.201.1
5569 01:01:32.660558
5570 01:01:32.663684 Bootfile predefined by user: 14368621/tftp-deploy-sqd68brs/kernel/image.itb
5571 01:01:32.666887
5572 01:01:32.666963 Sending tftp read request... done.
5573 01:01:32.667023
5574 01:01:32.673735 Waiting for the transfer...
5575 01:01:32.673814
5576 01:01:32.935164 00000000 ################################################################
5577 01:01:32.935300
5578 01:01:33.204100 00080000 ################################################################
5579 01:01:33.204234
5580 01:01:33.457424 00100000 ################################################################
5581 01:01:33.457566
5582 01:01:33.744967 00180000 ################################################################
5583 01:01:33.745102
5584 01:01:34.029863 00200000 ################################################################
5585 01:01:34.029998
5586 01:01:34.283984 00280000 ################################################################
5587 01:01:34.284118
5588 01:01:34.546147 00300000 ################################################################
5589 01:01:34.546279
5590 01:01:34.809480 00380000 ################################################################
5591 01:01:34.809649
5592 01:01:35.063508 00400000 ################################################################
5593 01:01:35.063710
5594 01:01:35.345483 00480000 ################################################################
5595 01:01:35.345661
5596 01:01:35.629726 00500000 ################################################################
5597 01:01:35.629853
5598 01:01:35.897151 00580000 ################################################################
5599 01:01:35.897283
5600 01:01:36.151163 00600000 ################################################################
5601 01:01:36.151295
5602 01:01:36.422541 00680000 ################################################################
5603 01:01:36.422667
5604 01:01:36.719199 00700000 ################################################################
5605 01:01:36.719336
5606 01:01:36.995073 00780000 ################################################################
5607 01:01:36.995189
5608 01:01:37.250275 00800000 ################################################################
5609 01:01:37.250391
5610 01:01:37.502372 00880000 ################################################################
5611 01:01:37.502522
5612 01:01:37.760787 00900000 ################################################################
5613 01:01:37.760905
5614 01:01:38.015806 00980000 ################################################################
5615 01:01:38.015922
5616 01:01:38.270897 00a00000 ################################################################
5617 01:01:38.271009
5618 01:01:38.531197 00a80000 ################################################################
5619 01:01:38.531311
5620 01:01:38.803037 00b00000 ################################################################
5621 01:01:38.803150
5622 01:01:39.062105 00b80000 ################################################################
5623 01:01:39.062222
5624 01:01:39.321363 00c00000 ################################################################
5625 01:01:39.321498
5626 01:01:39.576520 00c80000 ################################################################
5627 01:01:39.576636
5628 01:01:39.832401 00d00000 ################################################################
5629 01:01:39.832553
5630 01:01:40.101758 00d80000 ################################################################
5631 01:01:40.101885
5632 01:01:40.367467 00e00000 ################################################################
5633 01:01:40.367589
5634 01:01:40.628816 00e80000 ################################################################
5635 01:01:40.628926
5636 01:01:40.895557 00f00000 ################################################################
5637 01:01:40.895692
5638 01:01:41.174746 00f80000 ################################################################
5639 01:01:41.174873
5640 01:01:41.463096 01000000 ################################################################
5641 01:01:41.463223
5642 01:01:41.752424 01080000 ################################################################
5643 01:01:41.752575
5644 01:01:42.048529 01100000 ################################################################
5645 01:01:42.048655
5646 01:01:42.333466 01180000 ################################################################
5647 01:01:42.333639
5648 01:01:42.624285 01200000 ################################################################
5649 01:01:42.624404
5650 01:01:42.983944 01280000 ################################################################
5651 01:01:42.984582
5652 01:01:43.352997 01300000 ################################################################
5653 01:01:43.353617
5654 01:01:43.736175 01380000 ################################################################
5655 01:01:43.736642
5656 01:01:44.068757 01400000 ################################################################
5657 01:01:44.068884
5658 01:01:44.378759 01480000 ################################################################
5659 01:01:44.378888
5660 01:01:44.679965 01500000 ################################################################
5661 01:01:44.680096
5662 01:01:44.963102 01580000 ################################################################
5663 01:01:44.963230
5664 01:01:45.250428 01600000 ################################################################
5665 01:01:45.250555
5666 01:01:45.537969 01680000 ################################################################
5667 01:01:45.538098
5668 01:01:45.844324 01700000 ################################################################
5669 01:01:45.844452
5670 01:01:46.151399 01780000 ################################################################
5671 01:01:46.151617
5672 01:01:46.508467 01800000 ################################################################
5673 01:01:46.508591
5674 01:01:46.807560 01880000 ################################################################
5675 01:01:46.807679
5676 01:01:47.104782 01900000 ################################################################
5677 01:01:47.104906
5678 01:01:47.403375 01980000 ################################################################
5679 01:01:47.403496
5680 01:01:47.666058 01a00000 ################################################################
5681 01:01:47.666185
5682 01:01:47.933682 01a80000 ################################################################
5683 01:01:47.933805
5684 01:01:48.195203 01b00000 ################################################################
5685 01:01:48.195322
5686 01:01:48.454564 01b80000 ################################################################
5687 01:01:48.454705
5688 01:01:48.731829 01c00000 ################################################################
5689 01:01:48.731953
5690 01:01:49.031571 01c80000 ################################################################
5691 01:01:49.031697
5692 01:01:49.320833 01d00000 ################################################################
5693 01:01:49.320961
5694 01:01:49.607371 01d80000 ################################################################
5695 01:01:49.607497
5696 01:01:49.864024 01e00000 ######################################################### done.
5697 01:01:49.864149
5698 01:01:49.867801 The bootfile was 31922818 bytes long.
5699 01:01:49.867886
5700 01:01:49.870960 Sending tftp read request... done.
5701 01:01:49.871048
5702 01:01:49.871117 Waiting for the transfer...
5703 01:01:49.871180
5704 01:01:49.874430 00000000 # done.
5705 01:01:49.874521
5706 01:01:49.881160 Command line loaded dynamically from TFTP file: 14368621/tftp-deploy-sqd68brs/kernel/cmdline
5707 01:01:49.881325
5708 01:01:49.907112 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14368621/extract-nfsrootfs-1kkixd0n,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5709 01:01:49.907378
5710 01:01:49.910584 Loading FIT.
5711 01:01:49.910811
5712 01:01:49.910986 Image ramdisk-1 has 18738034 bytes.
5713 01:01:49.913896
5714 01:01:49.914120 Image fdt-1 has 57695 bytes.
5715 01:01:49.914295
5716 01:01:49.916903 Image kernel-1 has 13125045 bytes.
5717 01:01:49.917180
5718 01:01:49.927116 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5719 01:01:49.927526
5720 01:01:49.940253 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5721 01:01:49.940730
5722 01:01:49.943663 Choosing best match conf-1 for compat google,juniper-sku16.
5723 01:01:49.948590
5724 01:01:49.952554 Connected to device vid:did:rid of 1ae0:0028:00
5725 01:01:49.959973
5726 01:01:49.963327 tpm_get_response: command 0x17b, return code 0x0
5727 01:01:49.963785
5728 01:01:49.966654 tpm_cleanup: add release locality here.
5729 01:01:49.967043
5730 01:01:49.970070 Shutting down all USB controllers.
5731 01:01:49.970541
5732 01:01:49.972837 Removing current net device
5733 01:01:49.973227
5734 01:01:49.976428 Exiting depthcharge with code 4 at timestamp: 35911324
5735 01:01:49.976822
5736 01:01:49.979477 LZMA decompressing kernel-1 to 0x80193568
5737 01:01:49.983036
5738 01:01:49.986047 LZMA decompressing kernel-1 to 0x40000000
5739 01:01:51.849888
5740 01:01:51.850400 jumping to kernel
5741 01:01:51.852225 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
5742 01:01:51.852739 start: 2.2.5 auto-login-action (timeout 00:04:07) [common]
5743 01:01:51.853111 Setting prompt string to ['Linux version [0-9]']
5744 01:01:51.853457 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5745 01:01:51.853862 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5746 01:01:51.925710
5747 01:01:51.929301 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5748 01:01:51.932851 start: 2.2.5.1 login-action (timeout 00:04:07) [common]
5749 01:01:51.933439 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5750 01:01:51.933863 Setting prompt string to []
5751 01:01:51.934280 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5752 01:01:51.934636 Using line separator: #'\n'#
5753 01:01:51.934939 No login prompt set.
5754 01:01:51.935301 Parsing kernel messages
5755 01:01:51.935627 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5756 01:01:51.936166 [login-action] Waiting for messages, (timeout 00:04:06)
5757 01:01:51.936508 Waiting using forced prompt support (timeout 00:02:03)
5758 01:01:51.951395 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j232339-arm64-gcc-10-defconfig-arm64-chromebook-6v4sp) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Sun Jun 16 00:43:03 UTC 2024
5759 01:01:51.954757 [ 0.000000] random: crng init done
5760 01:01:51.961872 [ 0.000000] Machine model: Google juniper sku16 board
5761 01:01:51.965124 [ 0.000000] efi: UEFI not found.
5762 01:01:51.971305 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5763 01:01:51.981580 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5764 01:01:51.988401 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5765 01:01:51.990857 [ 0.000000] printk: bootconsole [mtk8250] enabled
5766 01:01:52.000561 [ 0.000000] NUMA: No NUMA configuration found
5767 01:01:52.006751 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5768 01:01:52.013801 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5769 01:01:52.014351 [ 0.000000] Zone ranges:
5770 01:01:52.020351 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5771 01:01:52.023661 [ 0.000000] DMA32 empty
5772 01:01:52.030212 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5773 01:01:52.033509 [ 0.000000] Movable zone start for each node
5774 01:01:52.036837 [ 0.000000] Early memory node ranges
5775 01:01:52.043572 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5776 01:01:52.049532 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5777 01:01:52.056517 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5778 01:01:52.063032 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5779 01:01:52.069579 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5780 01:01:52.075486 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5781 01:01:52.093368 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5782 01:01:52.099336 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5783 01:01:52.106277 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5784 01:01:52.109173 [ 0.000000] psci: probing for conduit method from DT.
5785 01:01:52.115720 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5786 01:01:52.118970 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5787 01:01:52.125611 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5788 01:01:52.128788 [ 0.000000] psci: SMC Calling Convention v1.1
5789 01:01:52.135758 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5790 01:01:52.138904 [ 0.000000] Detected VIPT I-cache on CPU0
5791 01:01:52.145092 [ 0.000000] CPU features: detected: GIC system register CPU interface
5792 01:01:52.151774 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5793 01:01:52.158147 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5794 01:01:52.165149 [ 0.000000] CPU features: detected: ARM erratum 845719
5795 01:01:52.168519 [ 0.000000] alternatives: applying boot alternatives
5796 01:01:52.175515 [ 0.000000] Fallback order for Node 0: 0
5797 01:01:52.181471 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5798 01:01:52.184942 [ 0.000000] Policy zone: Normal
5799 01:01:52.210775 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14368621/extract-nfsrootfs-1kkixd0n,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5800 01:01:52.224381 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5801 01:01:52.231350 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5802 01:01:52.241057 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5803 01:01:52.246938 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5804 01:01:52.250069 <6>[ 0.000000] software IO TLB: area num 8.
5805 01:01:52.275984 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5806 01:01:52.333736 <6>[ 0.000000] Memory: 3896772K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 261692K reserved, 32768K cma-reserved)
5807 01:01:52.340411 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5808 01:01:52.346676 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5809 01:01:52.350313 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5810 01:01:52.357032 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5811 01:01:52.363222 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5812 01:01:52.366742 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5813 01:01:52.377121 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5814 01:01:52.383012 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5815 01:01:52.389478 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5816 01:01:52.399876 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5817 01:01:52.402986 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5818 01:01:52.409413 <6>[ 0.000000] GICv3: 640 SPIs implemented
5819 01:01:52.412541 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5820 01:01:52.415933 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5821 01:01:52.422855 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5822 01:01:52.429138 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5823 01:01:52.442298 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5824 01:01:52.452042 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5825 01:01:52.458796 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5826 01:01:52.470687 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5827 01:01:52.484019 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5828 01:01:52.490443 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5829 01:01:52.497585 <6>[ 0.009468] Console: colour dummy device 80x25
5830 01:01:52.501132 <6>[ 0.014515] printk: console [tty1] enabled
5831 01:01:52.513793 <6>[ 0.018901] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5832 01:01:52.517387 <6>[ 0.029365] pid_max: default: 32768 minimum: 301
5833 01:01:52.524303 <6>[ 0.034247] LSM: Security Framework initializing
5834 01:01:52.530694 <6>[ 0.039164] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5835 01:01:52.537005 <6>[ 0.046787] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5836 01:01:52.545021 <4>[ 0.055657] cacheinfo: Unable to detect cache hierarchy for CPU 0
5837 01:01:52.553520 <6>[ 0.062284] cblist_init_generic: Setting adjustable number of callback queues.
5838 01:01:52.560144 <6>[ 0.069730] cblist_init_generic: Setting shift to 3 and lim to 1.
5839 01:01:52.567037 <6>[ 0.076083] cblist_init_generic: Setting adjustable number of callback queues.
5840 01:01:52.573646 <6>[ 0.083527] cblist_init_generic: Setting shift to 3 and lim to 1.
5841 01:01:52.576860 <6>[ 0.089925] rcu: Hierarchical SRCU implementation.
5842 01:01:52.583221 <6>[ 0.094952] rcu: Max phase no-delay instances is 1000.
5843 01:01:52.591211 <6>[ 0.102875] EFI services will not be available.
5844 01:01:52.594439 <6>[ 0.107824] smp: Bringing up secondary CPUs ...
5845 01:01:52.605052 <6>[ 0.113044] Detected VIPT I-cache on CPU1
5846 01:01:52.611640 <4>[ 0.113090] cacheinfo: Unable to detect cache hierarchy for CPU 1
5847 01:01:52.618329 <6>[ 0.113099] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5848 01:01:52.625171 <6>[ 0.113132] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5849 01:01:52.627996 <6>[ 0.113613] Detected VIPT I-cache on CPU2
5850 01:01:52.634358 <4>[ 0.113645] cacheinfo: Unable to detect cache hierarchy for CPU 2
5851 01:01:52.641386 <6>[ 0.113650] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5852 01:01:52.647738 <6>[ 0.113662] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5853 01:01:52.654122 <6>[ 0.114108] Detected VIPT I-cache on CPU3
5854 01:01:52.657875 <4>[ 0.114139] cacheinfo: Unable to detect cache hierarchy for CPU 3
5855 01:01:52.667026 <6>[ 0.114143] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5856 01:01:52.673690 <6>[ 0.114154] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5857 01:01:52.676881 <6>[ 0.114729] CPU features: detected: Spectre-v2
5858 01:01:52.683818 <6>[ 0.114739] CPU features: detected: Spectre-BHB
5859 01:01:52.687171 <6>[ 0.114743] CPU features: detected: ARM erratum 858921
5860 01:01:52.690019 <6>[ 0.114748] Detected VIPT I-cache on CPU4
5861 01:01:52.696593 <4>[ 0.114797] cacheinfo: Unable to detect cache hierarchy for CPU 4
5862 01:01:52.706614 <6>[ 0.114804] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5863 01:01:52.713259 <6>[ 0.114812] arch_timer: Enabling local workaround for ARM erratum 858921
5864 01:01:52.716739 <6>[ 0.114823] arch_timer: CPU4: Trapping CNTVCT access
5865 01:01:52.722833 <6>[ 0.114830] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5866 01:01:52.730024 <6>[ 0.115316] Detected VIPT I-cache on CPU5
5867 01:01:52.736684 <4>[ 0.115356] cacheinfo: Unable to detect cache hierarchy for CPU 5
5868 01:01:52.742780 <6>[ 0.115362] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5869 01:01:52.749220 <6>[ 0.115369] arch_timer: Enabling local workaround for ARM erratum 858921
5870 01:01:52.752566 <6>[ 0.115375] arch_timer: CPU5: Trapping CNTVCT access
5871 01:01:52.762818 <6>[ 0.115380] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5872 01:01:52.765693 <6>[ 0.115816] Detected VIPT I-cache on CPU6
5873 01:01:52.772359 <4>[ 0.115861] cacheinfo: Unable to detect cache hierarchy for CPU 6
5874 01:01:52.779108 <6>[ 0.115867] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5875 01:01:52.785603 <6>[ 0.115875] arch_timer: Enabling local workaround for ARM erratum 858921
5876 01:01:52.792442 <6>[ 0.115881] arch_timer: CPU6: Trapping CNTVCT access
5877 01:01:52.799417 <6>[ 0.115886] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5878 01:01:52.801780 <6>[ 0.116416] Detected VIPT I-cache on CPU7
5879 01:01:52.808408 <4>[ 0.116459] cacheinfo: Unable to detect cache hierarchy for CPU 7
5880 01:01:52.815243 <6>[ 0.116465] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5881 01:01:52.822209 <6>[ 0.116472] arch_timer: Enabling local workaround for ARM erratum 858921
5882 01:01:52.828421 <6>[ 0.116478] arch_timer: CPU7: Trapping CNTVCT access
5883 01:01:52.834714 <6>[ 0.116483] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5884 01:01:52.838252 <6>[ 0.116531] smp: Brought up 1 node, 8 CPUs
5885 01:01:52.845404 <6>[ 0.355434] SMP: Total of 8 processors activated.
5886 01:01:52.848864 <6>[ 0.360369] CPU features: detected: 32-bit EL0 Support
5887 01:01:52.854486 <6>[ 0.365747] CPU features: detected: 32-bit EL1 Support
5888 01:01:52.861133 <6>[ 0.371115] CPU features: detected: CRC32 instructions
5889 01:01:52.864633 <6>[ 0.376540] CPU: All CPU(s) started at EL2
5890 01:01:52.871560 <6>[ 0.380877] alternatives: applying system-wide alternatives
5891 01:01:52.874334 <6>[ 0.388877] devtmpfs: initialized
5892 01:01:52.892519 <6>[ 0.397826] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5893 01:01:52.898812 <6>[ 0.407775] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5894 01:01:52.905283 <6>[ 0.415501] pinctrl core: initialized pinctrl subsystem
5895 01:01:52.908938 <6>[ 0.422596] DMI not present or invalid.
5896 01:01:52.915564 <6>[ 0.426964] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5897 01:01:52.925485 <6>[ 0.433868] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5898 01:01:52.931796 <6>[ 0.441378] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5899 01:01:52.941761 <6>[ 0.449548] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5900 01:01:52.944957 <6>[ 0.457694] audit: initializing netlink subsys (disabled)
5901 01:01:52.954880 <5>[ 0.463375] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
5902 01:01:52.961429 <6>[ 0.464334] thermal_sys: Registered thermal governor 'step_wise'
5903 01:01:52.967922 <6>[ 0.471326] thermal_sys: Registered thermal governor 'power_allocator'
5904 01:01:52.971402 <6>[ 0.477572] cpuidle: using governor menu
5905 01:01:52.977493 <6>[ 0.488517] NET: Registered PF_QIPCRTR protocol family
5906 01:01:52.984619 <6>[ 0.494007] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5907 01:01:52.990909 <6>[ 0.501101] ASID allocator initialised with 32768 entries
5908 01:01:52.994446 <6>[ 0.507872] Serial: AMBA PL011 UART driver
5909 01:01:53.006301 <4>[ 0.518245] Trying to register duplicate clock ID: 113
5910 01:01:53.065082 <6>[ 0.573936] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5911 01:01:53.079215 <6>[ 0.588272] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5912 01:01:53.082443 <6>[ 0.598024] KASLR enabled
5913 01:01:53.097381 <6>[ 0.606024] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5914 01:01:53.103905 <6>[ 0.613028] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5915 01:01:53.109884 <6>[ 0.619506] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5916 01:01:53.116980 <6>[ 0.626497] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5917 01:01:53.123314 <6>[ 0.632971] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5918 01:01:53.129741 <6>[ 0.639961] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5919 01:01:53.136876 <6>[ 0.646436] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5920 01:01:53.143302 <6>[ 0.653426] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5921 01:01:53.146502 <6>[ 0.660993] ACPI: Interpreter disabled.
5922 01:01:53.156857 <6>[ 0.668976] iommu: Default domain type: Translated
5923 01:01:53.163575 <6>[ 0.674083] iommu: DMA domain TLB invalidation policy: strict mode
5924 01:01:53.166840 <5>[ 0.680716] SCSI subsystem initialized
5925 01:01:53.173648 <6>[ 0.685143] usbcore: registered new interface driver usbfs
5926 01:01:53.179908 <6>[ 0.690870] usbcore: registered new interface driver hub
5927 01:01:53.183020 <6>[ 0.696411] usbcore: registered new device driver usb
5928 01:01:53.190951 <6>[ 0.702709] pps_core: LinuxPPS API ver. 1 registered
5929 01:01:53.200703 <6>[ 0.707894] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5930 01:01:53.203738 <6>[ 0.717218] PTP clock support registered
5931 01:01:53.207185 <6>[ 0.721469] EDAC MC: Ver: 3.0.0
5932 01:01:53.215234 <6>[ 0.727102] FPGA manager framework
5933 01:01:53.221690 <6>[ 0.730786] Advanced Linux Sound Architecture Driver Initialized.
5934 01:01:53.224507 <6>[ 0.737536] vgaarb: loaded
5935 01:01:53.231380 <6>[ 0.740660] clocksource: Switched to clocksource arch_sys_counter
5936 01:01:53.234340 <5>[ 0.747091] VFS: Disk quotas dquot_6.6.0
5937 01:01:53.241191 <6>[ 0.751266] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5938 01:01:53.244459 <6>[ 0.758441] pnp: PnP ACPI: disabled
5939 01:01:53.253390 <6>[ 0.765325] NET: Registered PF_INET protocol family
5940 01:01:53.259484 <6>[ 0.770561] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5941 01:01:53.271838 <6>[ 0.780477] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5942 01:01:53.281536 <6>[ 0.789228] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5943 01:01:53.288247 <6>[ 0.797178] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5944 01:01:53.294687 <6>[ 0.805410] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5945 01:01:53.304733 <6>[ 0.813505] TCP: Hash tables configured (established 32768 bind 32768)
5946 01:01:53.311947 <6>[ 0.820333] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5947 01:01:53.317940 <6>[ 0.827303] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5948 01:01:53.324464 <6>[ 0.834783] NET: Registered PF_UNIX/PF_LOCAL protocol family
5949 01:01:53.330954 <6>[ 0.840895] RPC: Registered named UNIX socket transport module.
5950 01:01:53.334118 <6>[ 0.847040] RPC: Registered udp transport module.
5951 01:01:53.340904 <6>[ 0.851965] RPC: Registered tcp transport module.
5952 01:01:53.347252 <6>[ 0.856889] RPC: Registered tcp NFSv4.1 backchannel transport module.
5953 01:01:53.350864 <6>[ 0.863544] PCI: CLS 0 bytes, default 64
5954 01:01:53.353749 <6>[ 0.867795] Unpacking initramfs...
5955 01:01:53.363724 <6>[ 0.871858] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5956 01:01:53.370104 <6>[ 0.880574] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5957 01:01:53.376995 <6>[ 0.889467] kvm [1]: IPA Size Limit: 40 bits
5958 01:01:53.383913 <6>[ 0.895802] kvm [1]: vgic-v2@c420000
5959 01:01:53.386894 <6>[ 0.899627] kvm [1]: GIC system register CPU interface enabled
5960 01:01:53.394257 <6>[ 0.905808] kvm [1]: vgic interrupt IRQ18
5961 01:01:53.397096 <6>[ 0.910173] kvm [1]: Hyp mode initialized successfully
5962 01:01:53.404560 <5>[ 0.916462] Initialise system trusted keyrings
5963 01:01:53.411003 <6>[ 0.921244] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5964 01:01:53.419272 <6>[ 0.931174] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5965 01:01:53.425479 <5>[ 0.937583] NFS: Registering the id_resolver key type
5966 01:01:53.429507 <5>[ 0.942885] Key type id_resolver registered
5967 01:01:53.435774 <5>[ 0.947294] Key type id_legacy registered
5968 01:01:53.442621 <6>[ 0.951590] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5969 01:01:53.448935 <6>[ 0.958506] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5970 01:01:53.455333 <6>[ 0.966230] 9p: Installing v9fs 9p2000 file system support
5971 01:01:53.484132 <5>[ 0.995563] Key type asymmetric registered
5972 01:01:53.486919 <5>[ 0.999899] Asymmetric key parser 'x509' registered
5973 01:01:53.497001 <6>[ 1.005044] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5974 01:01:53.499947 <6>[ 1.012652] io scheduler mq-deadline registered
5975 01:01:53.503341 <6>[ 1.017413] io scheduler kyber registered
5976 01:01:53.526427 <6>[ 1.038091] EINJ: ACPI disabled.
5977 01:01:53.532868 <4>[ 1.041870] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5978 01:01:53.570757 <6>[ 1.082686] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5979 01:01:53.579268 <6>[ 1.091216] printk: console [ttyS0] disabled
5980 01:01:53.607326 <6>[ 1.115862] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5981 01:01:53.613617 <6>[ 1.125334] printk: console [ttyS0] enabled
5982 01:01:53.617027 <6>[ 1.125334] printk: console [ttyS0] enabled
5983 01:01:53.624094 <6>[ 1.134248] printk: bootconsole [mtk8250] disabled
5984 01:01:53.626867 <6>[ 1.134248] printk: bootconsole [mtk8250] disabled
5985 01:01:53.637055 <3>[ 1.144784] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5986 01:01:53.643850 <3>[ 1.153158] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5987 01:01:53.673247 <6>[ 1.181559] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5988 01:01:53.680267 <6>[ 1.191207] serial serial0: tty port ttyS1 registered
5989 01:01:53.686698 <6>[ 1.197790] SuperH (H)SCI(F) driver initialized
5990 01:01:53.689621 <6>[ 1.203285] msm_serial: driver initialized
5991 01:01:53.705762 <6>[ 1.213628] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5992 01:01:53.714801 <6>[ 1.222228] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5993 01:01:53.721618 <6>[ 1.230805] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5994 01:01:53.731220 <6>[ 1.239376] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5995 01:01:53.741204 <6>[ 1.248032] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5996 01:01:53.747777 <6>[ 1.256696] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5997 01:01:53.757928 <6>[ 1.265440] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5998 01:01:53.764009 <6>[ 1.274180] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5999 01:01:53.774427 <6>[ 1.282743] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6000 01:01:53.784324 <6>[ 1.291545] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6001 01:01:53.792195 <4>[ 1.303915] cacheinfo: Unable to detect cache hierarchy for CPU 0
6002 01:01:53.801256 <6>[ 1.313280] loop: module loaded
6003 01:01:53.813789 <6>[ 1.325221] vsim1: Bringing 1800000uV into 2700000-2700000uV
6004 01:01:53.831573 <6>[ 1.343285] megasas: 07.719.03.00-rc1
6005 01:01:53.840474 <6>[ 1.352089] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6006 01:01:53.848743 <6>[ 1.360034] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6007 01:01:53.864857 <6>[ 1.376774] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6008 01:01:53.921831 <6>[ 1.426653] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
6009 01:01:53.981812 <6>[ 1.492912] Freeing initrd memory: 18296K
6010 01:01:53.996523 <4>[ 1.504778] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6011 01:01:54.003549 <4>[ 1.514005] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6012 01:01:54.009504 <4>[ 1.520703] Hardware name: Google juniper sku16 board (DT)
6013 01:01:54.013191 <4>[ 1.526442] Call trace:
6014 01:01:54.016633 <4>[ 1.529142] dump_backtrace.part.0+0xe0/0xf0
6015 01:01:54.020069 <4>[ 1.533678] show_stack+0x18/0x30
6016 01:01:54.022851 <4>[ 1.537250] dump_stack_lvl+0x68/0x84
6017 01:01:54.029877 <4>[ 1.541171] dump_stack+0x18/0x34
6018 01:01:54.033198 <4>[ 1.544741] sysfs_warn_dup+0x64/0x80
6019 01:01:54.036395 <4>[ 1.548663] sysfs_do_create_link_sd+0xf0/0x100
6020 01:01:54.039507 <4>[ 1.553451] sysfs_create_link+0x20/0x40
6021 01:01:54.045868 <4>[ 1.557630] bus_add_device+0x68/0x10c
6022 01:01:54.049902 <4>[ 1.561636] device_add+0x340/0x7ac
6023 01:01:54.053257 <4>[ 1.565379] of_device_add+0x44/0x60
6024 01:01:54.059172 <4>[ 1.569213] of_platform_device_create_pdata+0x90/0x120
6025 01:01:54.062266 <4>[ 1.574694] of_platform_bus_create+0x170/0x370
6026 01:01:54.065498 <4>[ 1.579481] of_platform_populate+0x50/0xfc
6027 01:01:54.072447 <4>[ 1.583920] parse_mtd_partitions+0x1dc/0x510
6028 01:01:54.075617 <4>[ 1.588533] mtd_device_parse_register+0xf8/0x2e0
6029 01:01:54.082618 <4>[ 1.593492] spi_nor_probe+0x21c/0x2f0
6030 01:01:54.085964 <4>[ 1.597498] spi_mem_probe+0x6c/0xb0
6031 01:01:54.089158 <4>[ 1.601330] spi_probe+0x84/0xe4
6032 01:01:54.092369 <4>[ 1.604812] really_probe+0xbc/0x2e0
6033 01:01:54.095764 <4>[ 1.608642] __driver_probe_device+0x78/0x11c
6034 01:01:54.102973 <4>[ 1.613254] driver_probe_device+0xd8/0x160
6035 01:01:54.106372 <4>[ 1.617692] __device_attach_driver+0xb8/0x134
6036 01:01:54.109696 <4>[ 1.622390] bus_for_each_drv+0x78/0xd0
6037 01:01:54.112637 <4>[ 1.626480] __device_attach+0xa8/0x1c0
6038 01:01:54.119229 <4>[ 1.630570] device_initial_probe+0x14/0x20
6039 01:01:54.122430 <4>[ 1.635009] bus_probe_device+0x9c/0xa4
6040 01:01:54.125687 <4>[ 1.639099] device_add+0x3ac/0x7ac
6041 01:01:54.129024 <4>[ 1.642841] __spi_add_device+0x78/0x120
6042 01:01:54.135558 <4>[ 1.647019] spi_add_device+0x40/0x7c
6043 01:01:54.138099 <4>[ 1.650937] spi_register_controller+0x610/0xad0
6044 01:01:54.145279 <4>[ 1.655810] devm_spi_register_controller+0x4c/0xa4
6045 01:01:54.148318 <4>[ 1.660943] mtk_spi_probe+0x3f8/0x650
6046 01:01:54.151670 <4>[ 1.664947] platform_probe+0x68/0xe0
6047 01:01:54.154979 <4>[ 1.668865] really_probe+0xbc/0x2e0
6048 01:01:54.161392 <4>[ 1.672696] __driver_probe_device+0x78/0x11c
6049 01:01:54.164891 <4>[ 1.677307] driver_probe_device+0xd8/0x160
6050 01:01:54.168158 <4>[ 1.681745] __driver_attach+0x94/0x19c
6051 01:01:54.171190 <4>[ 1.685836] bus_for_each_dev+0x70/0xd0
6052 01:01:54.178205 <4>[ 1.689926] driver_attach+0x24/0x30
6053 01:01:54.181506 <4>[ 1.693755] bus_add_driver+0x154/0x20c
6054 01:01:54.184944 <4>[ 1.697846] driver_register+0x78/0x130
6055 01:01:54.191300 <4>[ 1.701937] __platform_driver_register+0x28/0x34
6056 01:01:54.194878 <4>[ 1.706896] mtk_spi_driver_init+0x1c/0x28
6057 01:01:54.198143 <4>[ 1.711250] do_one_initcall+0x50/0x1d0
6058 01:01:54.204689 <4>[ 1.715341] kernel_init_freeable+0x21c/0x288
6059 01:01:54.207891 <4>[ 1.719954] kernel_init+0x24/0x12c
6060 01:01:54.211929 <4>[ 1.723699] ret_from_fork+0x10/0x20
6061 01:01:54.221123 <6>[ 1.732577] tun: Universal TUN/TAP device driver, 1.6
6062 01:01:54.224150 <6>[ 1.738878] thunder_xcv, ver 1.0
6063 01:01:54.230752 <6>[ 1.742393] thunder_bgx, ver 1.0
6064 01:01:54.231208 <6>[ 1.745897] nicpf, ver 1.0
6065 01:01:54.241760 <6>[ 1.750265] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6066 01:01:54.245013 <6>[ 1.757750] hns3: Copyright (c) 2017 Huawei Corporation.
6067 01:01:54.251846 <6>[ 1.763348] hclge is initializing
6068 01:01:54.255259 <6>[ 1.766933] e1000: Intel(R) PRO/1000 Network Driver
6069 01:01:54.261748 <6>[ 1.772068] e1000: Copyright (c) 1999-2006 Intel Corporation.
6070 01:01:54.268029 <6>[ 1.778090] e1000e: Intel(R) PRO/1000 Network Driver
6071 01:01:54.271285 <6>[ 1.783312] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6072 01:01:54.277904 <6>[ 1.789505] igb: Intel(R) Gigabit Ethernet Network Driver
6073 01:01:54.285004 <6>[ 1.795160] igb: Copyright (c) 2007-2014 Intel Corporation.
6074 01:01:54.291177 <6>[ 1.801002] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6075 01:01:54.298544 <6>[ 1.807526] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6076 01:01:54.301490 <6>[ 1.814084] sky2: driver version 1.30
6077 01:01:54.307942 <6>[ 1.819330] usbcore: registered new device driver r8152-cfgselector
6078 01:01:54.314565 <6>[ 1.825875] usbcore: registered new interface driver r8152
6079 01:01:54.321428 <6>[ 1.831703] VFIO - User Level meta-driver version: 0.3
6080 01:01:54.327424 <6>[ 1.839518] mtu3 11201000.usb: uwk - reg:0x420, version:101
6081 01:01:54.337503 <4>[ 1.845396] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6082 01:01:54.341181 <6>[ 1.852674] mtu3 11201000.usb: dr_mode: 1, drd: auto
6083 01:01:54.347651 <6>[ 1.857899] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6084 01:01:54.350865 <6>[ 1.864087] mtu3 11201000.usb: usb3-drd: 0
6085 01:01:54.360913 <6>[ 1.869655] mtu3 11201000.usb: xHCI platform device register success...
6086 01:01:54.368522 <4>[ 1.878287] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6087 01:01:54.374413 <6>[ 1.886228] xhci-mtk 11200000.usb: xHCI Host Controller
6088 01:01:54.384194 <6>[ 1.891736] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6089 01:01:54.387456 <6>[ 1.899476] xhci-mtk 11200000.usb: USB3 root hub has no ports
6090 01:01:54.397477 <6>[ 1.905485] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6091 01:01:54.404049 <6>[ 1.914914] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6092 01:01:54.410450 <6>[ 1.920985] xhci-mtk 11200000.usb: xHCI Host Controller
6093 01:01:54.417668 <6>[ 1.926473] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6094 01:01:54.424239 <6>[ 1.934130] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6095 01:01:54.427513 <6>[ 1.940944] hub 1-0:1.0: USB hub found
6096 01:01:54.434086 <6>[ 1.944973] hub 1-0:1.0: 1 port detected
6097 01:01:54.440462 <6>[ 1.950328] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6098 01:01:54.447320 <6>[ 1.958943] hub 2-0:1.0: USB hub found
6099 01:01:54.453892 <3>[ 1.962973] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6100 01:01:54.460315 <6>[ 1.970858] usbcore: registered new interface driver usb-storage
6101 01:01:54.466808 <6>[ 1.977464] usbcore: registered new device driver onboard-usb-hub
6102 01:01:54.484670 <4>[ 1.992773] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6103 01:01:54.493703 <6>[ 2.005050] mt6397-rtc mt6358-rtc: registered as rtc0
6104 01:01:54.503598 <6>[ 2.010534] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-16T01:01:54 UTC (1718499714)
6105 01:01:54.509639 <6>[ 2.020423] i2c_dev: i2c /dev entries driver
6106 01:01:54.520147 <6>[ 2.026871] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6107 01:01:54.526958 <6>[ 2.035190] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6108 01:01:54.533327 <6>[ 2.044097] i2c 4-0058: Fixed dependency cycle(s) with /panel
6109 01:01:54.539924 <6>[ 2.050128] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6110 01:01:54.549974 <3>[ 2.057581] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6111 01:01:54.566135 <6>[ 2.077482] cpu cpu0: EM: created perf domain
6112 01:01:54.578925 <6>[ 2.082984] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6113 01:01:54.582157 <6>[ 2.094274] cpu cpu4: EM: created perf domain
6114 01:01:54.589346 <6>[ 2.101013] sdhci: Secure Digital Host Controller Interface driver
6115 01:01:54.596410 <6>[ 2.107468] sdhci: Copyright(c) Pierre Ossman
6116 01:01:54.602970 <6>[ 2.112876] Synopsys Designware Multimedia Card Interface Driver
6117 01:01:54.609128 <6>[ 2.113414] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6118 01:01:54.612839 <6>[ 2.119946] sdhci-pltfm: SDHCI platform and OF driver helper
6119 01:01:54.620834 <6>[ 2.132569] ledtrig-cpu: registered to indicate activity on CPUs
6120 01:01:54.629084 <6>[ 2.140278] usbcore: registered new interface driver usbhid
6121 01:01:54.635460 <6>[ 2.146119] usbhid: USB HID core driver
6122 01:01:54.642693 <6>[ 2.150382] spi_master spi2: will run message pump with realtime priority
6123 01:01:54.650187 <4>[ 2.150384] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6124 01:01:54.656425 <4>[ 2.164661] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6125 01:01:54.666440 <6>[ 2.168920] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6126 01:01:54.685240 <6>[ 2.187214] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6127 01:01:54.692388 <4>[ 2.196311] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6128 01:01:54.698728 <6>[ 2.208034] cros-ec-spi spi2.0: Chrome EC device registered
6129 01:01:54.705522 <4>[ 2.215609] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6130 01:01:54.717987 <4>[ 2.226140] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6131 01:01:54.724122 <4>[ 2.235138] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6132 01:01:54.735995 <6>[ 2.244500] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6133 01:01:54.760791 <6>[ 2.272525] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6134 01:01:54.768430 <6>[ 2.280468] mmc0: new HS400 MMC card at address 0001
6135 01:01:54.775660 <6>[ 2.287166] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6136 01:01:54.791545 <6>[ 2.299819] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6137 01:01:54.797654 <6>[ 2.302883] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6138 01:01:54.807719 <6>[ 2.312566] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6139 01:01:54.821025 <6>[ 2.312859] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6140 01:01:54.831306 <6>[ 2.312995] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6141 01:01:54.834550 <6>[ 2.316752] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6142 01:01:54.841018 <6>[ 2.327005] NET: Registered PF_PACKET protocol family
6143 01:01:54.847386 <6>[ 2.338794] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6144 01:01:54.851517 <6>[ 2.347405] 9pnet: Installing 9P2000 support
6145 01:01:54.858359 <6>[ 2.353452] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6146 01:01:54.860770 <5>[ 2.357984] Key type dns_resolver registered
6147 01:01:54.867848 <6>[ 2.379100] registered taskstats version 1
6148 01:01:54.874509 <6>[ 2.380676] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6149 01:01:54.877820 <5>[ 2.383463] Loading compiled-in X.509 certificates
6150 01:01:54.917075 <3>[ 2.425310] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6151 01:01:54.942584 <6>[ 2.447748] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6152 01:01:54.952886 <6>[ 2.461082] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6153 01:01:54.962214 <6>[ 2.469656] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6154 01:01:54.968781 <6>[ 2.478176] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6155 01:01:54.978740 <6>[ 2.486694] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6156 01:01:54.985373 <6>[ 2.495212] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6157 01:01:54.995826 <6>[ 2.503728] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6158 01:01:55.005362 <6>[ 2.512246] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6159 01:01:55.012143 <6>[ 2.521440] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6160 01:01:55.018781 <6>[ 2.528958] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6161 01:01:55.025210 <6>[ 2.536253] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6162 01:01:55.031627 <6>[ 2.540770] hub 1-1:1.0: USB hub found
6163 01:01:55.038700 <6>[ 2.543590] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6164 01:01:55.041315 <6>[ 2.547246] hub 1-1:1.0: 3 ports detected
6165 01:01:55.048329 <6>[ 2.554286] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6166 01:01:55.054676 <6>[ 2.566188] panfrost 13040000.gpu: clock rate = 511999970
6167 01:01:55.064430 <6>[ 2.571889] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6168 01:01:55.074371 <6>[ 2.581941] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6169 01:01:55.081215 <6>[ 2.589946] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6170 01:01:55.093995 <6>[ 2.598379] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6171 01:01:55.100641 <6>[ 2.610457] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6172 01:01:55.111554 <6>[ 2.619633] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6173 01:01:55.121489 <6>[ 2.628479] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6174 01:01:55.130788 <6>[ 2.637627] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6175 01:01:55.137687 <6>[ 2.646755] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6176 01:01:55.147721 <6>[ 2.655882] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6177 01:01:55.157263 <6>[ 2.665183] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6178 01:01:55.167611 <6>[ 2.674482] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6179 01:01:55.177152 <6>[ 2.683956] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6180 01:01:55.186924 <6>[ 2.693429] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6181 01:01:55.196996 <6>[ 2.702556] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6182 01:01:55.267985 <6>[ 2.776054] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6183 01:01:55.278080 <6>[ 2.784920] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6184 01:01:55.288586 <6>[ 2.796690] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6185 01:01:55.336512 <6>[ 2.844698] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6186 01:01:55.997472 <6>[ 3.029024] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6187 01:01:56.007116 <4>[ 3.132377] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6188 01:01:56.013911 <4>[ 3.132397] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6189 01:01:56.020150 <6>[ 3.170446] r8152 1-1.2:1.0 eth0: v1.12.13
6190 01:01:56.027388 <6>[ 3.248693] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6191 01:01:56.034115 <6>[ 3.489101] Console: switching to colour frame buffer device 170x48
6192 01:01:56.040189 <6>[ 3.549742] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6193 01:01:56.061363 <6>[ 3.566590] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6194 01:01:56.078331 <6>[ 3.583268] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6195 01:01:56.084606 <6>[ 3.595420] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6196 01:01:56.094937 <6>[ 3.603417] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6197 01:01:56.105301 <6>[ 3.609108] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6198 01:01:56.124104 <6>[ 3.628793] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6199 01:01:57.282158 <6>[ 4.793575] r8152 1-1.2:1.0 eth0: carrier on
6200 01:02:00.201499 <5>[ 4.816698] Sending DHCP requests .., OK
6201 01:02:00.208343 <6>[ 7.717454] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.20
6202 01:02:00.211501 <6>[ 7.725896] IP-Config: Complete:
6203 01:02:00.224458 <6>[ 7.729467] device=eth0, hwaddr=00:e0:4c:72:3d:a6, ipaddr=192.168.201.20, mask=255.255.255.0, gw=192.168.201.1
6204 01:02:00.234160 <6>[ 7.740368] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4, domain=lava-rack, nis-domain=(none)
6205 01:02:00.246232 <6>[ 7.754654] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6206 01:02:00.255096 <6>[ 7.754666] nameserver0=192.168.201.1
6207 01:02:00.262703 <6>[ 7.774557] clk: Disabling unused clocks
6208 01:02:00.267417 <6>[ 7.782475] ALSA device list:
6209 01:02:00.276887 <6>[ 7.788517] No soundcards found.
6210 01:02:00.286674 <6>[ 7.797564] Freeing unused kernel memory: 8512K
6211 01:02:00.293180 <6>[ 7.804749] Run /init as init process
6212 01:02:00.304272 Loading, please wait...
6213 01:02:00.336078 Starting systemd-udevd version 252.22-1~deb12u1
6214 01:02:00.629627 <6>[ 8.138125] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6215 01:02:00.637271 <3>[ 8.149086] mtk-scp 10500000.scp: invalid resource
6216 01:02:00.647486 <6>[ 8.155207] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6217 01:02:00.657113 <4>[ 8.155536] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6218 01:02:00.667592 <3>[ 8.173375] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6219 01:02:00.673801 <6>[ 8.174783] remoteproc remoteproc0: scp is available
6220 01:02:00.680604 <4>[ 8.175178] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6221 01:02:00.686872 <4>[ 8.175258] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6222 01:02:00.698116 <6>[ 8.175485] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6223 01:02:00.707227 <6>[ 8.178749] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6224 01:02:00.719001 <3>[ 8.184686] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6225 01:02:00.729685 <3>[ 8.184695] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6226 01:02:00.739067 <3>[ 8.184701] elan_i2c 2-0015: Error applying setting, reverse things back
6227 01:02:00.752323 <3>[ 8.187633] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6228 01:02:00.762147 <3>[ 8.188162] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6229 01:02:00.768595 <3>[ 8.188176] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6230 01:02:00.778117 <3>[ 8.188182] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6231 01:02:00.788679 <3>[ 8.188243] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6232 01:02:00.795191 <3>[ 8.188249] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6233 01:02:00.804890 <3>[ 8.188254] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6234 01:02:00.811308 <3>[ 8.188259] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6235 01:02:00.821657 <3>[ 8.188264] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6236 01:02:00.831896 <3>[ 8.188494] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6237 01:02:00.838170 <4>[ 8.190085] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6238 01:02:00.849118 <6>[ 8.190862] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6239 01:02:00.855664 <6>[ 8.197784] mc: Linux media interface: v0.10
6240 01:02:00.859057 <6>[ 8.204637] remoteproc remoteproc0: powering up scp
6241 01:02:00.869293 <5>[ 8.235807] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6242 01:02:00.875695 <4>[ 8.236239] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6243 01:02:00.882215 <6>[ 8.240715] cs_system_cfg: CoreSight Configuration manager initialised
6244 01:02:00.891937 <5>[ 8.258843] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6245 01:02:00.895090 <3>[ 8.268403] remoteproc remoteproc0: request_firmware failed: -2
6246 01:02:00.905462 <5>[ 8.277357] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6247 01:02:00.916054 <6>[ 8.309758] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6248 01:02:00.922467 <4>[ 8.312709] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6249 01:02:00.929127 <6>[ 8.331125] videodev: Linux video capture interface: v2.00
6250 01:02:00.932371 <6>[ 8.331195] Bluetooth: Core ver 2.22
6251 01:02:00.938799 <6>[ 8.331262] NET: Registered PF_BLUETOOTH protocol family
6252 01:02:00.945616 <6>[ 8.331265] Bluetooth: HCI device and connection manager initialized
6253 01:02:00.951807 Begin: Loading e<6>[ 8.331285] Bluetooth: HCI socket layer initialized
6254 01:02:00.956590 ssential drivers ... done.
6255 01:02:00.963325 Begi<6>[ 8.331296] Bluetooth: L2CAP socket layer initialized
6256 01:02:00.969904 n: Running /scripts/init-premoun<6>[ 8.331311] Bluetooth: SCO socket layer initialized
6257 01:02:00.972368 t ... done.
6258 01:02:00.982809 Begin: Mounting roo<6>[ 8.331346] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6259 01:02:00.992264 t file system ... Begin: Running<6>[ 8.331491] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6260 01:02:00.995447 /scripts/nfs-top ... done.
6261 01:02:01.005413 Beg<6>[ 8.331591] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6262 01:02:01.015903 in: Running /scripts/nfs-premoun<6>[ 8.331692] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6263 01:02:01.028711 t ... Waiting up to 60 secs for <6>[ 8.338710] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6264 01:02:01.035210 any ethernet to become available<6>[ 8.338733] cfg80211: failed to load regulatory.db
6265 01:02:01.035711
6266 01:02:01.045406 Device /sys/class/net/eth0 fou<6>[ 8.367746] Bluetooth: HCI UART driver ver 2.3
6267 01:02:01.045951 nd
6268 01:02:01.046297 done.
6269 01:02:01.055322 <6>[ 8.371972] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6270 01:02:01.061639 <6>[ 8.376884] Bluetooth: HCI UART protocol H4 registered
6271 01:02:01.072217 <6>[ 8.385110] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6272 01:02:01.078962 <6>[ 8.385610] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6273 01:02:01.089178 <6>[ 8.385840] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6274 01:02:01.096990 <6>[ 8.386882] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6275 01:02:01.103315 Begin: Waiting u<6>[ 8.393393] Bluetooth: HCI UART protocol LL registered
6276 01:02:01.107290 <6>[ 8.394163] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6277 01:02:01.117430 p to 180 secs fo<6>[ 8.395200] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6278 01:02:01.124090 <6>[ 8.400418] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6279 01:02:01.137052 r any network de<6>[ 8.405213] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6280 01:02:01.147558 vice to become a<6>[ 8.405516] usbcore: registered new interface driver uvcvideo
6281 01:02:01.153618 <6>[ 8.407030] Bluetooth: HCI UART protocol Three-wire (H5) registered
6282 01:02:01.163491 vailable ... don<6>[ 8.426577] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6283 01:02:01.163968 e.
6284 01:02:01.176748 <3>[ 8.431972] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6285 01:02:01.183476 <6>[ 8.431975] Bluetooth: HCI UART protocol Broadcom registered
6286 01:02:01.190850 <6>[ 8.432002] Bluetooth: HCI UART protocol QCA registered
6287 01:02:01.198929 <6>[ 8.432016] Bluetooth: HCI UART protocol Marvell registered
6288 01:02:01.207485 <6>[ 8.432800] Bluetooth: hci0: setting up ROME/QCA6390
6289 01:02:01.218489 <6>[ 8.440538] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6290 01:02:01.228447 <3>[ 8.447149] debugfs: File 'Playback' in directory 'dapm' already present!
6291 01:02:01.242064 <6>[ 8.450410] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6292 01:02:01.247680 <3>[ 8.455628] debugfs: File 'Capture' in directory 'dapm' already present!
6293 01:02:01.261858 <6>[ 8.458550] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6294 01:02:01.271692 <4>[ 8.590683] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6295 01:02:01.274731 <4>[ 8.590683] Fallback method does not support PEC.
6296 01:02:01.282303 <3>[ 8.599687] thermal_sys: Failed to find 'trips' node
6297 01:02:01.292959 <3>[ 8.608120] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6298 01:02:01.302557 <3>[ 8.611773] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6299 01:02:01.312254 <3>[ 8.611779] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6300 01:02:01.319453 <4>[ 8.611782] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6301 01:02:01.327189 <3>[ 8.613014] thermal_sys: Failed to find 'trips' node
6302 01:02:01.337913 <3>[ 8.624682] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6303 01:02:01.347734 <3>[ 8.625349] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6304 01:02:01.353870 <3>[ 8.651855] Bluetooth: hci0: Frame reassembly failed (-84)
6305 01:02:01.363889 <3>[ 8.655382] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6306 01:02:01.373400 <6>[ 8.687235] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6307 01:02:01.380294 <4>[ 8.693107] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6308 01:02:01.427697 <6>[ 8.938000] Bluetooth: hci0: QCA Product ID :0x00000008
6309 01:02:01.457362 <6>[ 8.968849] Bluetooth: hci0: QCA SOC Version :0x00000044
6310 01:02:01.467405 IP-Config: eth0 hardware address<6>[ 8.976427] Bluetooth: hci0: QCA ROM Version :0x00000302
6311 01:02:01.473522 00:e0:4c:72:3d:a6 mtu 1500 DHCP<6>[ 8.985053] Bluetooth: hci0: QCA Patch Version:0x00000111
6312 01:02:01.474067
6313 01:02:01.483556 IP-Config: eth0 complete (dhcp<6>[ 8.993451] Bluetooth: hci0: QCA controller version 0x00440302
6314 01:02:01.486869 from 192.168.201.1):
6315 01:02:01.493803 address:<6>[ 9.002068] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6316 01:02:01.507155 192.168.201.20 broadcast: 192<4>[ 9.011633] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6317 01:02:01.517226 .168.201.255 netmask: 255.255.2<3>[ 9.023674] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6318 01:02:01.517789 55.0
6319 01:02:01.526984 gateway: 192.168.201.1<3>[ 9.034699] Bluetooth: hci0: QCA Failed to download patch (-2)
6320 01:02:01.530352 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6321 01:02:01.536856 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-4
6322 01:02:01.543141 domain : lava-rack
6323 01:02:01.546529 rootserver: 192.168.201.1 rootpath:
6324 01:02:01.549387 filename :
6325 01:02:01.555641 done.
6326 01:02:01.562821 Begin: Running /scripts/nfs-bottom ... done.
6327 01:02:01.580132 Begin: Running /scripts/init-bottom ... done.
6328 01:02:01.788039 <6>[ 9.296287] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6329 01:02:01.873265 <4>[ 9.381415] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6330 01:02:01.892821 <4>[ 9.400816] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6331 01:02:01.908554 <4>[ 9.416771] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6332 01:02:01.918446 <4>[ 9.430435] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6333 01:02:02.990897 <6>[ 10.502524] NET: Registered PF_INET6 protocol family
6334 01:02:03.003117 <6>[ 10.515122] Segment Routing with IPv6
6335 01:02:03.012134 <6>[ 10.523481] In-situ OAM (IOAM) with IPv6
6336 01:02:03.197358 <30>[ 10.682347] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6337 01:02:03.217381 <30>[ 10.729327] systemd[1]: Detected architecture arm64.
6338 01:02:03.229018
6339 01:02:03.232530 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6340 01:02:03.232928
6341 01:02:03.258518 <30>[ 10.770318] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6342 01:02:04.359889 <30>[ 11.868336] systemd[1]: Queued start job for default target graphical.target.
6343 01:02:04.401537 <30>[ 11.910232] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6344 01:02:04.415047 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6345 01:02:04.434706 <30>[ 11.942995] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6346 01:02:04.448396 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6347 01:02:04.467101 <30>[ 11.975192] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6348 01:02:04.481258 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6349 01:02:04.498197 <30>[ 12.006241] systemd[1]: Created slice user.slice - User and Session Slice.
6350 01:02:04.509877 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6351 01:02:04.532403 <30>[ 12.037256] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6352 01:02:04.545266 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6353 01:02:04.568002 <30>[ 12.073086] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6354 01:02:04.580339 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6355 01:02:04.606768 <30>[ 12.105033] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6356 01:02:04.626005 <30>[ 12.134102] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6357 01:02:04.633708 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6358 01:02:04.652784 <30>[ 12.160835] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6359 01:02:04.665510 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6360 01:02:04.685125 <30>[ 12.192917] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6361 01:02:04.699066 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6362 01:02:04.713292 <30>[ 12.224980] systemd[1]: Reached target paths.target - Path Units.
6363 01:02:04.728355 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6364 01:02:04.744557 <30>[ 12.252845] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6365 01:02:04.757018 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6366 01:02:04.772714 <30>[ 12.280814] systemd[1]: Reached target slices.target - Slice Units.
6367 01:02:04.783943 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6368 01:02:04.797763 <30>[ 12.308900] systemd[1]: Reached target swap.target - Swaps.
6369 01:02:04.807978 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6370 01:02:04.828861 <30>[ 12.336913] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6371 01:02:04.842300 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6372 01:02:04.861344 <30>[ 12.369288] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6373 01:02:04.874832 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6374 01:02:04.896037 <30>[ 12.403851] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6375 01:02:04.909112 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6376 01:02:04.926504 <30>[ 12.434794] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6377 01:02:04.940738 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6378 01:02:04.957302 <30>[ 12.465591] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6379 01:02:04.969041 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6380 01:02:04.990648 <30>[ 12.498604] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6381 01:02:05.004279 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6382 01:02:05.024004 <30>[ 12.532318] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6383 01:02:05.037416 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6384 01:02:05.057345 <30>[ 12.565474] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6385 01:02:05.070407 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6386 01:02:05.112996 <30>[ 12.621054] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6387 01:02:05.125118 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6388 01:02:05.146809 <30>[ 12.654617] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6389 01:02:05.160183 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6390 01:02:05.179714 <30>[ 12.688416] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6391 01:02:05.191599 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6392 01:02:05.216165 <30>[ 12.717612] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6393 01:02:05.257900 <30>[ 12.765827] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6394 01:02:05.271434 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6395 01:02:05.293573 <30>[ 12.802225] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6396 01:02:05.308768 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6397 01:02:05.357844 <30>[ 12.865374] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6398 01:02:05.369642 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6399 01:02:05.391160 <30>[ 12.898903] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6400 01:02:05.402471 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6401 01:02:05.427983 <30>[ 12.935560] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6402 01:02:05.444545 Startin<6>[ 12.950715] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6403 01:02:05.447750 g [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6404 01:02:05.497792 <30>[ 13.005721] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6405 01:02:05.510682 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6406 01:02:05.535144 <30>[ 13.042790] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6407 01:02:05.547495 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6408 01:02:05.568325 <6>[ 13.079970] fuse: init (API version 7.37)
6409 01:02:05.574883 <30>[ 13.083185] systemd[1]: Starting systemd-journald.service - Journal Service...
6410 01:02:05.590732 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6411 01:02:05.616901 <30>[ 13.125570] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6412 01:02:05.627844 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6413 01:02:05.651479 <30>[ 13.156954] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6414 01:02:05.662530 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6415 01:02:05.688918 <30>[ 13.197089] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6416 01:02:05.701711 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6417 01:02:05.749068 <30>[ 13.257547] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6418 01:02:05.761344 Startin<3>[ 13.270805] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6419 01:02:05.767962 g [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6420 01:02:05.779391 <3>[ 13.287021] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6421 01:02:05.796871 <30>[ 13.304449] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6422 01:02:05.803221 <3>[ 13.305888] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6423 01:02:05.821272 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File S<3>[ 13.327690] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6424 01:02:05.821706 ystem.
6425 01:02:05.836158 <3>[ 13.344011] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6426 01:02:05.846543 <30>[ 13.353758] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6427 01:02:05.852931 <3>[ 13.359517] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6428 01:02:05.869455 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSI<3>[ 13.379173] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6429 01:02:05.872666 X Message Queue File System.
6430 01:02:05.888005 <3>[ 13.395940] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6431 01:02:05.898606 <30>[ 13.405110] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6432 01:02:05.909481 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6433 01:02:05.925267 <30>[ 13.433406] systemd[1]: Started systemd-journald.service - Journal Service.
6434 01:02:05.934913 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6435 01:02:05.955921 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6436 01:02:05.976326 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6437 01:02:05.995693 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6438 01:02:06.015433 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6439 01:02:06.035243 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6440 01:02:06.059341 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6441 01:02:06.079377 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6442 01:02:06.099127 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6443 01:02:06.122106 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6444 01:02:06.142201 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6445 01:02:06.167190 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6446 01:02:06.204843 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6447 01:02:06.225659 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6448 01:02:06.245665 <4>[ 13.757089] power_supply_show_property: 2 callbacks suppressed
6449 01:02:06.256737 <3>[ 13.757098] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6450 01:02:06.263328 <3>[ 13.772514] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6451 01:02:06.283344 <4>[ 13.772772] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6452 01:02:06.300101 <3>[ 13.772779] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6453 01:02:06.318718 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage..<3>[ 13.826014] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6454 01:02:06.319265 .
6455 01:02:06.335131 <3>[ 13.842970] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6456 01:02:06.352374 <3>[ 13.860739] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6457 01:02:06.372440 <3>[ 13.880675] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6458 01:02:06.393539 Starting [0;1;39msyste<3>[ 13.899915] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6459 01:02:06.396710 md-random-se…ice[0m - Load/Save Random Seed...
6460 01:02:06.410706 <3>[ 13.918670] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6461 01:02:06.426708 <3>[ 13.934514] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6462 01:02:06.442935 Startin<3>[ 13.951382] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6463 01:02:06.449002 g [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6464 01:02:06.467298 <46>[ 13.976225] systemd-journald[320]: Received client request to flush runtime journal.
6465 01:02:06.509842 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6466 01:02:06.791199 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6467 01:02:06.810352 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6468 01:02:06.829721 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6469 01:02:06.851285 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6470 01:02:06.871514 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6471 01:02:07.900055 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6472 01:02:07.921040 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6473 01:02:07.969350 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6474 01:02:08.079843 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6475 01:02:08.101579 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6476 01:02:08.120826 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6477 01:02:08.169385 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6478 01:02:08.196680 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6479 01:02:08.454579 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6480 01:02:08.473248 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6481 01:02:08.556506 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6482 01:02:08.692383 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6483 01:02:08.715539 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6484 01:02:08.788404 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6485 01:02:08.947192 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6486 01:02:08.968301 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6487 01:02:08.984315 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6488 01:02:09.004423 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6489 01:02:09.045067 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6490 01:02:09.067338 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6491 01:02:09.137213 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6492 01:02:09.157186 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6493 01:02:09.177395 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6494 01:02:09.198471 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6495 01:02:09.215491 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6496 01:02:09.237017 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6497 01:02:09.257097 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6498 01:02:09.276935 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6499 01:02:09.301119 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6500 01:02:09.322063 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6501 01:02:09.341012 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6502 01:02:09.358366 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6503 01:02:09.378960 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6504 01:02:09.396379 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6505 01:02:09.414203 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6506 01:02:09.432694 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6507 01:02:09.448359 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6508 01:02:09.485914 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6509 01:02:09.545470 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6510 01:02:09.620965 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6511 01:02:09.650525 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6512 01:02:09.674199 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6513 01:02:09.771418 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6514 01:02:09.815576 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6515 01:02:09.838894 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6516 01:02:09.858573 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6517 01:02:09.910164 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6518 01:02:09.958339 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6519 01:02:09.987512 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6520 01:02:10.010497 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6521 01:02:10.030205 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6522 01:02:10.084128 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6523 01:02:10.138022 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6524 01:02:10.203879
6525 01:02:10.207579 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6526 01:02:10.207659
6527 01:02:10.210470 debian-bookworm-arm64 login: root (automatic login)
6528 01:02:10.210547
6529 01:02:10.428530 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Sun Jun 16 00:43:03 UTC 2024 aarch64
6530 01:02:10.428656
6531 01:02:10.434997 The programs included with the Debian GNU/Linux system are free software;
6532 01:02:10.441712 the exact distribution terms for each program are described in the
6533 01:02:10.444623 individual files in /usr/share/doc/*/copyright.
6534 01:02:10.444699
6535 01:02:10.451935 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6536 01:02:10.455049 permitted by applicable law.
6537 01:02:10.534205 Matched prompt #10: / #
6539 01:02:10.534421 Setting prompt string to ['/ #']
6540 01:02:10.534510 end: 2.2.5.1 login-action (duration 00:00:19) [common]
6542 01:02:10.534688 end: 2.2.5 auto-login-action (duration 00:00:19) [common]
6543 01:02:10.534769 start: 2.2.6 expect-shell-connection (timeout 00:03:48) [common]
6544 01:02:10.534835 Setting prompt string to ['/ #']
6545 01:02:10.534891 Forcing a shell prompt, looking for ['/ #']
6547 01:02:10.585094 / #
6548 01:02:10.585262 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6549 01:02:10.585335 Waiting using forced prompt support (timeout 00:02:30)
6550 01:02:10.590355
6551 01:02:10.590620 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6552 01:02:10.590712 start: 2.2.7 export-device-env (timeout 00:03:48) [common]
6554 01:02:10.691040 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14368621/extract-nfsrootfs-1kkixd0n'
6555 01:02:10.695831 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14368621/extract-nfsrootfs-1kkixd0n'
6557 01:02:10.796340 / # export NFS_SERVER_IP='192.168.201.1'
6558 01:02:10.801607 export NFS_SERVER_IP='192.168.201.1'
6559 01:02:10.801879 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6560 01:02:10.801972 end: 2.2 depthcharge-retry (duration 00:01:12) [common]
6561 01:02:10.802060 end: 2 depthcharge-action (duration 00:01:12) [common]
6562 01:02:10.802144 start: 3 lava-test-retry (timeout 00:30:00) [common]
6563 01:02:10.802226 start: 3.1 lava-test-shell (timeout 00:30:00) [common]
6564 01:02:10.802292 Using namespace: common
6566 01:02:10.902621 / # #
6567 01:02:10.902788 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:30:00)
6568 01:02:10.907771 #
6569 01:02:10.908024 Using /lava-14368621
6571 01:02:11.008306 / # export SHELL=/bin/sh
6572 01:02:11.013350 export SHELL=/bin/sh
6574 01:02:11.113823 / # . /lava-14368621/environment
6575 01:02:11.119462 . /lava-14368621/environment
6577 01:02:11.226010 / # /lava-14368621/bin/lava-test-runner /lava-14368621/0
6578 01:02:11.226182 Test shell timeout: 10s (minimum of the action and connection timeout)
6579 01:02:11.231318 /lava-14368621/bin/lava-test-runner /lava-14368621/0
6580 01:02:11.418803 + export TESTRUN_ID=0_lc-compliance
6581 01:02:11.425688 + cd /lava-14368621/0/tests/0_lc-compliance
6582 01:02:11.425762 + cat uuid
6583 01:02:11.431459 + UUID=14368621_1.6.2.3.1
6584 01:02:11.431535 + set +x
6585 01:02:11.438594 <LAVA_SIGNAL_STARTRUN 0_lc-compliance 14368621_1.6.2.3.1>
6586 01:02:11.438867 Received signal: <STARTRUN> 0_lc-compliance 14368621_1.6.2.3.1
6587 01:02:11.438955 Starting test lava.0_lc-compliance (14368621_1.6.2.3.1)
6588 01:02:11.439060 Skipping test definition patterns.
6589 01:02:11.441785 + /usr/bin/lc-compliance-parser.sh
6590 01:02:13.079037 [0:00:20.502814965] [427] [1;32m INFO [1;37mCamera [1;34mcamera_manager.cpp:284 [0mlibcamera v0.0.0+1-01935edb
6591 01:02:13.085713 Using camera /base/soc/usb@11201000/usb@11200000/hub@1-1.3:1.0-04f2:b567
6592 01:02:13.135393 [0:00:20.560479374] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6593 01:02:13.148488 [==========] Running 120 tests from 1 test suite.
6594 01:02:13.203279 [0:00:20.629164665] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6595 01:02:13.206591 [----------] Global test environment set-up.
6596 01:02:13.256934 [----------] 120 tests from CaptureTests/SingleStream
6597 01:02:13.266303 [0:00:20.694912537] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6598 01:02:13.317805 [ RUN ] CaptureTests/SingleStream.Capture/Raw_1
6599 01:02:13.331839 [0:00:20.759588895] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6600 01:02:13.367578 <LAVA_SIGNAL_TESTSET START CaptureTests/SingleStream>
6601 01:02:13.367850 Received signal: <TESTSET> START CaptureTests/SingleStream
6602 01:02:13.367929 Starting test_set CaptureTests/SingleStream
6603 01:02:13.370798 Camera needs 4 requests, can't test only 1
6604 01:02:13.426958 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6605 01:02:13.480230
6606 01:02:13.546559 [ SKIPPED ] CaptureTests/SingleStream.Capture/Raw_1 (69 ms)
6607 01:02:13.628082 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_1 RESULT=skip>
6608 01:02:13.628366 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_1 RESULT=skip
6610 01:02:13.640600 [ RUN ] CaptureTests/SingleStream.Capture/Raw_2
6611 01:02:13.678586 Camera needs 4 requests, can't test only 2
6612 01:02:13.735575 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6613 01:02:13.788691
6614 01:02:13.854327 [ SKIPPED ] CaptureTests/SingleStream.Capture/Raw_2 (64 ms)
6615 01:02:13.917451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_2 RESULT=skip>
6616 01:02:13.917726 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_2 RESULT=skip
6618 01:02:13.927732 [ RUN ] CaptureTests/SingleStream.Capture/Raw_3
6619 01:02:13.969421 Camera needs 4 requests, can't test only 3
6620 01:02:13.979794 [0:00:21.415076390] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6621 01:02:14.034129 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6622 01:02:14.088741
6623 01:02:14.153149 [ SKIPPED ] CaptureTests/SingleStream.Capture/Raw_3 (64 ms)
6624 01:02:14.216895 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_3 RESULT=skip>
6625 01:02:14.217188 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_3 RESULT=skip
6627 01:02:14.226806 [ RUN ] CaptureTests/SingleStream.Capture/Raw_5
6628 01:02:14.264183 [ OK ] CaptureTests/SingleStream.Capture/Raw_5 (498 ms)
6629 01:02:14.326193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_5 RESULT=pass>
6630 01:02:14.326456 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_5 RESULT=pass
6632 01:02:14.337192 [ RUN ] CaptureTests/SingleStream.Capture/Raw_8
6633 01:02:14.488601 [ OK ] CaptureTests/SingleStream.Capture/Raw_8 (719 ms)
6634 01:02:14.554206 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_8 RESULT=pass>
6635 01:02:14.554487 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_8 RESULT=pass
6637 01:02:14.565889 [ RUN ] CaptureTests/SingleStream.Capture/Raw_13
6638 01:02:14.590424 [0:00:22.034512707] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6639 01:02:15.267367 [ OK ] CaptureTests/SingleStream.Capture/Raw_13 (787 ms)
6640 01:02:15.312027 [0:00:22.764642639] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6641 01:02:15.347435 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_13 RESULT=pass>
6642 01:02:15.347713 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_13 RESULT=pass
6644 01:02:15.360106 [ RUN ] CaptureTests/SingleStream.Capture/Raw_21
6645 01:02:16.712416 [ OK ] CaptureTests/SingleStream.Capture/Raw_21 (1459 ms)
6646 01:02:16.756313 [0:00:24.223486682] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6647 01:02:16.791521 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_21 RESULT=pass>
6648 01:02:16.791784 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_21 RESULT=pass
6650 01:02:16.804986 [ RUN ] CaptureTests/SingleStream.Capture/Raw_34
6651 01:02:20.527298 [ OK ] CaptureTests/SingleStream.Capture/Raw_34 (3841 ms)
6652 01:02:20.571497 [0:00:28.065162507] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6653 01:02:20.597335 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_34 RESULT=pass>
6654 01:02:20.597583 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_34 RESULT=pass
6656 01:02:20.612417 [ RUN ] CaptureTests/SingleStream.Capture/Raw_55
6657 01:02:26.432956 [ OK ] CaptureTests/SingleStream.Capture/Raw_55 (5926 ms)
6658 01:02:26.477616 [0:00:33.991888937] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6659 01:02:26.520880 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_55 RESULT=pass>
6660 01:02:26.521533 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_55 RESULT=pass
6662 01:02:26.538392 [ RUN ] CaptureTests/SingleStream.Capture/Raw_89
6663 01:02:30.321026 <6>[ 37.835309] vaux18: disabling
6664 01:02:30.326122 <6>[ 37.838821] vio28: disabling
6665 01:02:35.729745 [ OK ] CaptureTests/SingleStream.Capture/Raw_89 (9310 ms)
6666 01:02:35.775245 [0:00:43.303256029] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6667 01:02:35.799707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_89 RESULT=pass>
6668 01:02:35.799994 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_89 RESULT=pass
6670 01:02:35.814007 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_1
6671 01:02:35.840833 [0:00:43.368531483] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6672 01:02:35.866348 Camera needs 4 requests, can't test only 1
6673 01:02:35.903343 [0:00:43.431222305] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6674 01:02:35.935156 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6675 01:02:35.966559 [0:00:43.494614825] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6676 01:02:35.998533
6677 01:02:36.073913 [ SKIPPED ] CaptureTests/SingleStream.Capture/StillCapture_1 (65 ms)
6678 01:02:36.141603 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_1 RESULT=skip>
6679 01:02:36.141899 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_1 RESULT=skip
6681 01:02:36.155120 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_2
6682 01:02:36.206023 Camera needs 4 requests, can't test only 2
6683 01:02:36.266760 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6684 01:02:36.328174
6685 01:02:36.401198 [ SKIPPED ] CaptureTests/SingleStream.Capture/StillCapture_2 (63 ms)
6686 01:02:36.476197 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_2 RESULT=skip>
6687 01:02:36.476499 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_2 RESULT=skip
6689 01:02:36.489127 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_3
6690 01:02:36.534241 Camera needs 4 requests, can't test only 3
6691 01:02:36.595800 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6692 01:02:36.653931
6693 01:02:36.721824 [ SKIPPED ] CaptureTests/SingleStream.Capture/StillCapture_3 (63 ms)
6694 01:02:36.790887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_3 RESULT=skip>
6695 01:02:36.791186 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_3 RESULT=skip
6697 01:02:36.803592 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_5
6698 01:02:37.500119 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_5 (1579 ms)
6699 01:02:37.545556 [0:00:45.074637080] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6700 01:02:37.575910 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_5 RESULT=pass>
6701 01:02:37.576206 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_5 RESULT=pass
6703 01:02:37.587719 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_8
6704 01:02:38.719965 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_8 (1220 ms)
6705 01:02:38.767472 [0:00:46.296636999] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6706 01:02:38.783387 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_8 RESULT=pass>
6707 01:02:38.783638 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_8 RESULT=pass
6709 01:02:38.795513 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_13
6710 01:02:40.442569 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_13 (1722 ms)
6711 01:02:40.487804 [0:00:48.017520339] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6712 01:02:40.514660 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_13 RESULT=pass>
6713 01:02:40.514915 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_13 RESULT=pass
6715 01:02:40.527663 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_21
6716 01:02:42.961570 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_21 (2519 ms)
6717 01:02:43.006961 [0:00:50.537819552] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6718 01:02:43.032388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_21 RESULT=pass>
6719 01:02:43.032676 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_21 RESULT=pass
6721 01:02:43.043976 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_34
6722 01:02:46.776688 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_34 (3815 ms)
6723 01:02:46.821277 [0:00:54.352895475] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6724 01:02:46.850577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_34 RESULT=pass>
6725 01:02:46.850877 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_34 RESULT=pass
6727 01:02:46.863797 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_55
6728 01:02:52.681453 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_55 (5905 ms)
6729 01:02:52.730559 [0:01:00.262221309] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6730 01:02:52.760410 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_55 RESULT=pass>
6731 01:02:52.760731 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_55 RESULT=pass
6733 01:02:52.772932 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_89
6734 01:03:01.982749 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_89 (9297 ms)
6735 01:03:02.029829 [0:01:09.562015633] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6736 01:03:02.078545 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_89 RESULT=pass>
6737 01:03:02.079234 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_89 RESULT=pass
6739 01:03:02.097430 [0:01:09.629024749] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6740 01:03:02.100483 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_1
6741 01:03:02.151329 Camera needs 4 requests, can't test only 1
6742 01:03:02.166278 [0:01:09.697886594] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6743 01:03:02.234824 [0:01:09.766469972] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6744 01:03:02.238010 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6745 01:03:02.308568
6746 01:03:02.393892 [ SKIPPED ] CaptureTests/SingleStream.Capture/VideoRecording_1 (68 ms)
6747 01:03:02.481628 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_1 RESULT=skip>
6748 01:03:02.482293 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_1 RESULT=skip
6750 01:03:02.499858 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_2
6751 01:03:02.554514 Camera needs 4 requests, can't test only 2
6752 01:03:02.634645 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6753 01:03:02.716722
6754 01:03:02.799692 [ SKIPPED ] CaptureTests/SingleStream.Capture/VideoRecording_2 (67 ms)
6755 01:03:02.884840 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_2 RESULT=skip>
6756 01:03:02.885543 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_2 RESULT=skip
6758 01:03:02.902655 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_3
6759 01:03:02.953887 Camera needs 4 requests, can't test only 3
6760 01:03:03.027437 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6761 01:03:03.105811
6762 01:03:03.189849 [ SKIPPED ] CaptureTests/SingleStream.Capture/VideoRecording_3 (66 ms)
6763 01:03:03.281543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_3 RESULT=skip>
6764 01:03:03.282271 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_3 RESULT=skip
6766 01:03:03.297656 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_5
6767 01:03:03.749927 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_5 (1563 ms)
6768 01:03:03.795310 [0:01:11.327461562] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6769 01:03:03.840383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_5 RESULT=pass>
6770 01:03:03.841032 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_5 RESULT=pass
6772 01:03:03.856703 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_8
6773 01:03:04.972272 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_8 (1221 ms)
6774 01:03:05.017100 [0:01:12.549157440] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6775 01:03:05.057006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_8 RESULT=pass>
6776 01:03:05.057977 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_8 RESULT=pass
6778 01:03:05.069602 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_13
6779 01:03:06.696257 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_13 (1721 ms)
6780 01:03:06.737759 [0:01:14.269684867] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6781 01:03:06.783707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_13 RESULT=pass>
6782 01:03:06.784487 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_13 RESULT=pass
6784 01:03:06.801250 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_21
6785 01:03:09.212331 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_21 (2515 ms)
6786 01:03:09.254959 [0:01:16.786523531] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6787 01:03:09.291951 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_21 RESULT=pass>
6788 01:03:09.292629 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_21 RESULT=pass
6790 01:03:09.306993 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_34
6791 01:03:13.022501 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_34 (3813 ms)
6792 01:03:13.068127 [0:01:20.599805991] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6793 01:03:13.108937 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_34 RESULT=pass>
6794 01:03:13.109886 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_34 RESULT=pass
6796 01:03:13.124209 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_55
6797 01:03:18.927657 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_55 (5904 ms)
6798 01:03:18.972371 [0:01:26.504082310] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6799 01:03:19.011553 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_55 RESULT=pass>
6800 01:03:19.011807 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_55 RESULT=pass
6802 01:03:19.023984 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_89
6803 01:03:28.224526 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_89 (9294 ms)
6804 01:03:28.267329 [0:01:35.799044000] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6805 01:03:28.289622 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_89 RESULT=pass>
6806 01:03:28.289880 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_89 RESULT=pass
6808 01:03:28.302390 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_1
6809 01:03:28.332522 [0:01:35.864358810] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6810 01:03:28.342613 Camera needs 4 requests, can't test only 1
6811 01:03:28.397117 [0:01:35.928659928] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6812 01:03:28.400077 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6813 01:03:28.461668 [0:01:35.993720507] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6814 01:03:28.461765
6815 01:03:28.523776 [ SKIPPED ] CaptureTests/SingleStream.Capture/Viewfinder_1 (65 ms)
6816 01:03:28.591353 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_1 RESULT=skip>
6817 01:03:28.591625 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_1 RESULT=skip
6819 01:03:28.602798 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_2
6820 01:03:28.638207 Camera needs 4 requests, can't test only 2
6821 01:03:28.699169 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6822 01:03:28.754895
6823 01:03:28.821838 [ SKIPPED ] CaptureTests/SingleStream.Capture/Viewfinder_2 (64 ms)
6824 01:03:28.898564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_2 RESULT=skip>
6825 01:03:28.898837 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_2 RESULT=skip
6827 01:03:28.914537 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_3
6828 01:03:28.957975 Camera needs 4 requests, can't test only 3
6829 01:03:29.024686 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6830 01:03:29.086005
6831 01:03:29.149649 [ SKIPPED ] CaptureTests/SingleStream.Capture/Viewfinder_3 (64 ms)
6832 01:03:29.222084 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_3 RESULT=skip>
6833 01:03:29.222392 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_3 RESULT=skip
6835 01:03:29.233536 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_5
6836 01:03:29.985364 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_5 (1568 ms)
6837 01:03:30.029851 [0:01:37.561686995] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6838 01:03:30.065749 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_5 RESULT=pass>
6839 01:03:30.066008 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_5 RESULT=pass
6841 01:03:30.080363 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_8
6842 01:03:31.208601 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_8 (1222 ms)
6843 01:03:31.252932 [0:01:38.784832709] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6844 01:03:31.281973 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_8 RESULT=pass>
6845 01:03:31.282234 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_8 RESULT=pass
6847 01:03:31.294626 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_13
6848 01:03:32.928023 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_13 (1719 ms)
6849 01:03:32.972657 [0:01:40.504430518] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6850 01:03:33.001431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_13 RESULT=pass>
6851 01:03:33.001693 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_13 RESULT=pass
6853 01:03:33.014118 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_21
6854 01:03:35.446088 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_21 (2518 ms)
6855 01:03:35.490547 [0:01:43.022226389] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6856 01:03:35.520251 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_21 RESULT=pass>
6857 01:03:35.520556 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_21 RESULT=pass
6859 01:03:35.533864 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_34
6860 01:03:39.258915 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_34 (3812 ms)
6861 01:03:39.303164 [0:01:46.834813954] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6862 01:03:39.324965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_34 RESULT=pass>
6863 01:03:39.325222 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_34 RESULT=pass
6865 01:03:39.337753 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_55
6866 01:03:45.162258 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_55 (5903 ms)
6867 01:03:45.207123 [0:01:52.738352469] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6868 01:03:45.241455 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_55 RESULT=pass>
6869 01:03:45.241752 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_55 RESULT=pass
6871 01:03:45.252635 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_89
6872 01:03:54.458481 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_89 (9295 ms)
6873 01:03:54.503351 [0:02:02.034791512] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6874 01:03:54.529785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_89 RESULT=pass>
6875 01:03:54.530036 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_89 RESULT=pass
6877 01:03:54.540772 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_1
6878 01:03:54.564233 [0:02:02.095921052] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6879 01:03:54.582756 Camera needs 4 requests, can't test only 1
6880 01:03:54.628153 [0:02:02.159436437] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6881 01:03:54.648344 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6882 01:03:54.693455 [0:02:02.224521746] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6883 01:03:54.707512
6884 01:03:54.771908 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Raw_1 (61 ms)
6885 01:03:54.842041 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_1 RESULT=skip>
6886 01:03:54.842309 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_1 RESULT=skip
6888 01:03:54.853717 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_2
6889 01:03:54.899173 Camera needs 4 requests, can't test only 2
6890 01:03:54.957908 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6891 01:03:55.017629
6892 01:03:55.086352 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Raw_2 (61 ms)
6893 01:03:55.156567 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_2 RESULT=skip>
6894 01:03:55.156861 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_2 RESULT=skip
6896 01:03:55.169167 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_3
6897 01:03:55.212768 Camera needs 4 requests, can't test only 3
6898 01:03:55.274456 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6899 01:03:55.335146
6900 01:03:55.401560 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Raw_3 (65 ms)
6901 01:03:55.465865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_3 RESULT=skip>
6902 01:03:55.466143 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_3 RESULT=skip
6904 01:03:55.477875 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_5
6905 01:03:57.970320 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_5 (3321 ms)
6906 01:03:58.014836 [0:02:05.545859796] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6907 01:03:58.067188 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_5 RESULT=pass>
6908 01:03:58.067892 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_5 RESULT=pass
6910 01:03:58.084485 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_8
6911 01:04:01.536511 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_8 (3565 ms)
6912 01:04:01.581216 [0:02:09.112358522] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6913 01:04:01.640043 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_8 RESULT=pass>
6914 01:04:01.640784 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_8 RESULT=pass
6916 01:04:01.656604 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_13
6917 01:04:06.602146 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_13 (5066 ms)
6918 01:04:06.647241 [0:02:14.178181242] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6919 01:04:06.702109 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_13 RESULT=pass>
6920 01:04:06.702883 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_13 RESULT=pass
6922 01:04:06.719303 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_21
6923 01:04:14.055399 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_21 (7452 ms)
6924 01:04:14.100592 [0:02:21.630552183] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6925 01:04:14.152671 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_21 RESULT=pass>
6926 01:04:14.153406 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_21 RESULT=pass
6928 01:04:14.170320 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_34
6929 01:04:25.396581 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_34 (11340 ms)
6930 01:04:25.440592 [0:02:32.971138808] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6931 01:04:25.497535 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_34 RESULT=pass>
6932 01:04:25.498278 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_34 RESULT=pass
6934 01:04:25.515068 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_55
6935 01:04:43.017149 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_55 (17617 ms)
6936 01:04:43.058648 [0:02:50.588446734] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6937 01:04:43.112200 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_55 RESULT=pass>
6938 01:04:43.112851 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_55 RESULT=pass
6940 01:04:43.131424 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_89
6941 01:05:10.809781 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_89 (27791 ms)
6942 01:05:10.852397 [0:03:18.381600659] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6943 01:05:10.916238 [0:03:18.445303736] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6944 01:05:10.922484 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_89 RESULT=pass>
6945 01:05:10.923187 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_89 RESULT=pass
6947 01:05:10.930172 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_1
6948 01:05:10.979859 [0:03:18.509345274] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6949 01:05:10.989729 Camera needs 4 requests, can't test only 1
6950 01:05:11.048604 [0:03:18.578173890] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6951 01:05:11.077677 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6952 01:05:11.162001
6953 01:05:11.257262 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_1 (64 ms)
6954 01:05:11.347789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_1 RESULT=skip>
6955 01:05:11.348505 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_1 RESULT=skip
6957 01:05:11.360238 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_2
6958 01:05:11.418092 Camera needs 4 requests, can't test only 2
6959 01:05:11.502439 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6960 01:05:11.579519
6961 01:05:11.665880 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_2 (63 ms)
6962 01:05:11.767157 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_2 RESULT=skip>
6963 01:05:11.767878 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_2 RESULT=skip
6965 01:05:11.779310 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_3
6966 01:05:11.828067 Camera needs 4 requests, can't test only 3
6967 01:05:11.906552 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6968 01:05:11.980582
6969 01:05:12.064203 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_3 (66 ms)
6970 01:05:12.154715 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_3 RESULT=skip>
6971 01:05:12.155453 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_3 RESULT=skip
6973 01:05:12.170380 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_5
6974 01:05:14.321142 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_5 (3317 ms)
6975 01:05:14.362933 [0:03:21.891999659] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6976 01:05:14.405721 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_5 RESULT=pass>
6977 01:05:14.406002 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_5 RESULT=pass
6979 01:05:14.415910 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_8
6980 01:05:17.888142 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_8 (3566 ms)
6981 01:05:17.929929 [0:03:25.459206198] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6982 01:05:17.980349 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_8 RESULT=pass>
6983 01:05:17.981036 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_8 RESULT=pass
6985 01:05:17.995071 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_13
6986 01:05:22.954346 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_13 (5065 ms)
6987 01:05:22.995180 [0:03:30.524695198] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6988 01:05:23.040883 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_13 RESULT=pass>
6989 01:05:23.041619 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_13 RESULT=pass
6991 01:05:23.056103 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_21
6992 01:05:30.407752 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_21 (7452 ms)
6993 01:05:30.449177 [0:03:37.978098275] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6994 01:05:30.507226 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_21 RESULT=pass>
6995 01:05:30.507873 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_21 RESULT=pass
6997 01:05:30.521689 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_34
6998 01:05:41.752664 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_34 (11344 ms)
6999 01:05:41.795917 [0:03:49.324441507] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7000 01:05:41.839049 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_34 RESULT=pass>
7001 01:05:41.839806 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_34 RESULT=pass
7003 01:05:41.849824 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_55
7004 01:05:59.373438 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_55 (17621 ms)
7005 01:05:59.414752 [0:04:06.943235354] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7006 01:05:59.464707 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_55 RESULT=pass>
7007 01:05:59.465418 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_55 RESULT=pass
7009 01:05:59.476864 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_89
7010 01:06:27.167504 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_89 (27793 ms)
7011 01:06:27.209166 [0:04:34.737032279] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7012 01:06:27.271680 [0:04:34.799187894] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7013 01:06:27.278149 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_89 RESULT=pass>
7014 01:06:27.278788 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_89 RESULT=pass
7016 01:06:27.286161 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_1
7017 01:06:27.337068 [0:04:34.864514125] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7018 01:06:27.340062 Camera needs 4 requests, can't test only 1
7019 01:06:27.401020 [0:04:34.928211510] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7020 01:06:27.419868 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7021 01:06:27.493239
7022 01:06:27.575627 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_1 (61 ms)
7023 01:06:27.660374 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_1 RESULT=skip>
7024 01:06:27.661245 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_1 RESULT=skip
7026 01:06:27.674176 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_2
7027 01:06:27.728373 Camera needs 4 requests, can't test only 2
7028 01:06:27.802918 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7029 01:06:27.874725
7030 01:06:27.961345 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_2 (65 ms)
7031 01:06:28.051666 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_2 RESULT=skip>
7032 01:06:28.052374 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_2 RESULT=skip
7034 01:06:28.062696 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_3
7035 01:06:28.109275 Camera needs 4 requests, can't test only 3
7036 01:06:28.181882 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7037 01:06:28.260594
7038 01:06:28.342018 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_3 (62 ms)
7039 01:06:28.427402 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_3 RESULT=skip>
7040 01:06:28.428102 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_3 RESULT=skip
7042 01:06:28.441375 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_5
7043 01:06:30.675551 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_5 (3318 ms)
7044 01:06:30.716897 [0:04:38.244739971] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7045 01:06:30.763702 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_5 RESULT=pass>
7046 01:06:30.764341 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_5 RESULT=pass
7048 01:06:30.776553 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_8
7049 01:06:34.242835 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_8 (3567 ms)
7050 01:06:34.284506 [0:04:41.812177356] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7051 01:06:34.327879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_8 RESULT=pass>
7052 01:06:34.328531 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_8 RESULT=pass
7054 01:06:34.341036 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_13
7055 01:06:39.309290 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_13 (5065 ms)
7056 01:06:39.351255 [0:04:46.878836664] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7057 01:06:39.401059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_13 RESULT=pass>
7058 01:06:39.401759 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_13 RESULT=pass
7060 01:06:39.414280 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_21
7061 01:06:46.763845 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_21 (7454 ms)
7062 01:06:46.805436 [0:04:54.333169280] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7063 01:06:46.848675 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_21 RESULT=pass>
7064 01:06:46.849315 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_21 RESULT=pass
7066 01:06:46.860730 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_34
7067 01:06:58.106199 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_34 (11341 ms)
7068 01:06:58.147207 [0:05:05.674506050] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7069 01:06:58.197874 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_34 RESULT=pass>
7070 01:06:58.198523 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_34 RESULT=pass
7072 01:06:58.210565 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_55
7073 01:07:15.724957 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_55 (17618 ms)
7074 01:07:15.765976 [0:05:23.293330205] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7075 01:07:15.822629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_55 RESULT=pass>
7076 01:07:15.823353 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_55 RESULT=pass
7078 01:07:15.834639 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_89
7079 01:07:43.521830 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_89 (27795 ms)
7080 01:07:43.563360 [0:05:51.089556360] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7081 01:07:43.622339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_89 RESULT=pass>
7082 01:07:43.623017 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_89 RESULT=pass
7084 01:07:43.632275 [0:05:51.153388360] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7085 01:07:43.638046 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_1
7086 01:07:43.681685 Camera needs 4 requests, can't test only 1
7087 01:07:43.691716 [0:05:51.219253283] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7088 01:07:43.760464 [0:05:51.286470668] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7089 01:07:43.763847 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7090 01:07:43.843432
7091 01:07:43.932117 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_1 (62 ms)
7092 01:07:44.018816 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_1 RESULT=skip>
7093 01:07:44.019109 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_1 RESULT=skip
7095 01:07:44.030407 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_2
7096 01:07:44.086786 Camera needs 4 requests, can't test only 2
7097 01:07:44.168455 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7098 01:07:44.245143
7099 01:07:44.333155 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_2 (65 ms)
7100 01:07:44.419772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_2 RESULT=skip>
7101 01:07:44.420459 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_2 RESULT=skip
7103 01:07:44.432359 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_3
7104 01:07:44.485325 Camera needs 4 requests, can't test only 3
7105 01:07:44.562161 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7106 01:07:44.621287
7107 01:07:44.693004 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_3 (65 ms)
7108 01:07:44.776811 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_3 RESULT=skip>
7109 01:07:44.777115 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_3 RESULT=skip
7111 01:07:44.786108 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_5
7112 01:07:47.030724 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_5 (3315 ms)
7113 01:07:47.071902 [0:05:54.598208207] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7114 01:07:47.119958 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_5 RESULT=pass>
7115 01:07:47.120834 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_5 RESULT=pass
7117 01:07:47.130719 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_8
7118 01:07:50.598524 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_8 (3567 ms)
7119 01:07:50.639894 [0:05:58.166082822] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7120 01:07:50.679807 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_8 RESULT=pass>
7121 01:07:50.680068 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_8 RESULT=pass
7123 01:07:50.691307 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_13
7124 01:07:55.663422 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_13 (5065 ms)
7125 01:07:55.704341 [0:06:03.230539053] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7126 01:07:55.762577 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_13 RESULT=pass>
7127 01:07:55.763237 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_13 RESULT=pass
7129 01:07:55.775341 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_21
7130 01:08:03.114660 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_21 (7450 ms)
7131 01:08:03.156282 [0:06:10.681884746] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7132 01:08:03.214162 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_21 RESULT=pass>
7133 01:08:03.214877 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_21 RESULT=pass
7135 01:08:03.231784 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_34
7136 01:08:14.457450 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_34 (11342 ms)
7137 01:08:14.499903 [0:06:22.024916747] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7138 01:08:14.548383 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_34 RESULT=pass>
7139 01:08:14.549068 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_34 RESULT=pass
7141 01:08:14.560714 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_55
7142 01:08:32.072120 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_55 (17613 ms)
7143 01:08:32.113108 [0:06:39.638019902] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7144 01:08:32.171481 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_55 RESULT=pass>
7145 01:08:32.172181 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_55 RESULT=pass
7147 01:08:32.185448 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_89
7148 01:08:59.863577 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_89 (27791 ms)
7149 01:08:59.907087 [0:07:07.431723134] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7150 01:08:59.959018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_89 RESULT=pass>
7151 01:08:59.959703 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_89 RESULT=pass
7153 01:08:59.972142 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_1
7154 01:09:00.389689 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_1 (528 ms)
7155 01:09:00.484676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_1 RESULT=pass>
7156 01:09:00.485382 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_1 RESULT=pass
7158 01:09:00.500968 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_2
7159 01:09:00.655076 [0:07:08.179003211] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7160 01:09:01.236529 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_2 (846 ms)
7161 01:09:01.337743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_2 RESULT=pass>
7162 01:09:01.338493 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_2 RESULT=pass
7164 01:09:01.355493 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_3
7165 01:09:01.401477 [0:07:08.926464442] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7166 01:09:02.081403 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_3 (844 ms)
7167 01:09:02.146752 [0:07:09.671310211] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7168 01:09:02.176221 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_3 RESULT=pass>
7169 01:09:02.176927 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_3 RESULT=pass
7171 01:09:02.192993 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_5
7172 01:09:03.027428 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_5 (946 ms)
7173 01:09:03.071831 [0:07:10.596547211] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7174 01:09:03.122837 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_5 RESULT=pass>
7175 01:09:03.123541 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_5 RESULT=pass
7177 01:09:03.140455 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_8
7178 01:09:04.248874 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_8 (1221 ms)
7179 01:09:04.294759 [0:07:11.818544903] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7180 01:09:04.344496 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_8 RESULT=pass>
7181 01:09:04.345230 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_8 RESULT=pass
7183 01:09:04.359784 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_13
7184 01:09:05.971051 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_13 (1722 ms)
7185 01:09:06.015763 [0:07:13.540590442] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7186 01:09:06.062044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_13 RESULT=pass>
7187 01:09:06.062794 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_13 RESULT=pass
7189 01:09:06.077221 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_21
7190 01:09:08.488556 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_21 (2516 ms)
7191 01:09:08.532286 [0:07:16.057241596] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7192 01:09:08.579504 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_21 RESULT=pass>
7193 01:09:08.580148 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_21 RESULT=pass
7195 01:09:08.594505 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_34
7196 01:09:12.300868 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_34 (3812 ms)
7197 01:09:12.345526 [0:07:19.870157904] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7198 01:09:12.379407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_34 RESULT=pass>
7199 01:09:12.379688 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_34 RESULT=pass
7201 01:09:12.393014 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_55
7202 01:09:18.205079 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_55 (5904 ms)
7203 01:09:18.250325 [0:07:25.775053366] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7204 01:09:18.278469 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_55 RESULT=pass>
7205 01:09:18.278761 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_55 RESULT=pass
7207 01:09:18.290216 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_89
7208 01:09:27.502914 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_89 (9297 ms)
7209 01:09:27.547892 [0:07:35.071847443] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7210 01:09:27.576264 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_89 RESULT=pass>
7211 01:09:27.576522 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_89 RESULT=pass
7213 01:09:27.587439 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_1
7214 01:09:28.031622 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_1 (525 ms)
7215 01:09:28.126338 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_1 RESULT=pass>
7216 01:09:28.127141 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_1 RESULT=pass
7218 01:09:28.140856 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_2
7219 01:09:28.295868 [0:07:35.819217828] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7220 01:09:28.882437 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_2 (850 ms)
7221 01:09:28.979969 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_2 RESULT=pass>
7222 01:09:28.980261 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_2 RESULT=pass
7224 01:09:28.990370 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_3
7225 01:09:29.042938 [0:07:36.567100674] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7226 01:09:29.728018 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_3 (844 ms)
7227 01:09:29.790857 [0:07:37.314978290] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7228 01:09:29.820495 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_3 RESULT=pass>
7229 01:09:29.821152 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_3 RESULT=pass
7231 01:09:29.834904 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_5
7232 01:09:30.674500 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_5 (946 ms)
7233 01:09:30.715399 [0:07:38.238885905] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7234 01:09:30.767458 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_5 RESULT=pass>
7235 01:09:30.768190 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_5 RESULT=pass
7237 01:09:30.781146 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_8
7238 01:09:31.894953 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_8 (1220 ms)
7239 01:09:31.937111 [0:07:39.460707674] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7240 01:09:32.000336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_8 RESULT=pass>
7241 01:09:32.001054 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_8 RESULT=pass
7243 01:09:32.014043 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_13
7244 01:09:33.617834 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_13 (1722 ms)
7245 01:09:33.658165 [0:07:41.182382674] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7246 01:09:33.715454 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_13 RESULT=pass>
7247 01:09:33.715754 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_13 RESULT=pass
7249 01:09:33.727099 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_21
7250 01:09:36.134539 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_21 (2516 ms)
7251 01:09:36.176089 [0:07:43.699687752] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7252 01:09:36.233625 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_21 RESULT=pass>
7253 01:09:36.234306 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_21 RESULT=pass
7255 01:09:36.245891 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_34
7256 01:09:39.947745 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_34 (3813 ms)
7257 01:09:39.989943 [0:07:47.513691675] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7258 01:09:40.046635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_34 RESULT=pass>
7259 01:09:40.046909 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_34 RESULT=pass
7261 01:09:40.057600 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_55
7262 01:09:45.853754 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_55 (5905 ms)
7263 01:09:45.895538 [0:07:53.418951598] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7264 01:09:45.949295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_55 RESULT=pass>
7265 01:09:45.950337 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_55 RESULT=pass
7267 01:09:45.962072 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_89
7268 01:09:55.154402 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_89 (9300 ms)
7269 01:09:55.195980 [0:08:02.719981907] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7270 01:09:55.234630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_89 RESULT=pass>
7271 01:09:55.234910 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_89 RESULT=pass
7273 01:09:55.245506 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_1
7274 01:09:55.682245 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_1 (528 ms)
7275 01:09:55.751018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_1 RESULT=pass>
7276 01:09:55.751309 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_1 RESULT=pass
7278 01:09:55.760407 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_2
7279 01:09:55.947394 [0:08:03.470183368] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7280 01:09:56.535978 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_2 (853 ms)
7281 01:09:56.621960 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_2 RESULT=pass>
7282 01:09:56.622637 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_2 RESULT=pass
7284 01:09:56.633544 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_3
7285 01:09:56.696609 [0:08:04.220284291] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7286 01:09:57.380275 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_3 (844 ms)
7287 01:09:57.444772 [0:08:04.968305137] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7288 01:09:57.475244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_3 RESULT=pass>
7289 01:09:57.475884 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_3 RESULT=pass
7291 01:09:57.488288 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_5
7292 01:09:58.328504 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_5 (948 ms)
7293 01:09:58.369864 [0:08:05.893305599] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7294 01:09:58.404551 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_5 RESULT=pass>
7295 01:09:58.404835 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_5 RESULT=pass
7297 01:09:58.415241 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_8
7298 01:09:59.550117 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_8 (1220 ms)
7299 01:09:59.591813 [0:08:07.115076907] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7300 01:09:59.636343 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_8 RESULT=pass>
7301 01:09:59.637111 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_8 RESULT=pass
7303 01:09:59.648460 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_13
7304 01:10:01.270790 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_13 (1721 ms)
7305 01:10:01.311869 [0:08:08.834929522] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7306 01:10:01.370550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_13 RESULT=pass>
7307 01:10:01.371188 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_13 RESULT=pass
7309 01:10:01.382630 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_21
7310 01:10:03.788182 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_21 (2516 ms)
7311 01:10:03.828282 [0:08:11.351782061] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7312 01:10:03.879503 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_21 RESULT=pass>
7313 01:10:03.880151 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_21 RESULT=pass
7315 01:10:03.891480 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_34
7316 01:10:07.599649 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_34 (3811 ms)
7317 01:10:07.641858 [0:08:15.164655907] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7318 01:10:07.692879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_34 RESULT=pass>
7319 01:10:07.693536 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_34 RESULT=pass
7321 01:10:07.706027 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_55
7322 01:10:13.505053 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_55 (5904 ms)
7323 01:10:13.545906 [0:08:21.068925677] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7324 01:10:13.598059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_55 RESULT=pass>
7325 01:10:13.598771 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_55 RESULT=pass
7327 01:10:13.610079 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_89
7328 01:10:22.801499 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_89 (9296 ms)
7329 01:10:22.843681 [0:08:30.366746985] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7330 01:10:22.883809 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_89 RESULT=pass>
7331 01:10:22.884499 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_89 RESULT=pass
7333 01:10:22.896319 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_1
7334 01:10:23.327757 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_1 (526 ms)
7335 01:10:23.409217 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_1 RESULT=pass
7337 01:10:23.412187 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_1 RESULT=pass>
7338 01:10:23.420944 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_2
7339 01:10:23.590213 [0:08:31.112698831] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7340 01:10:24.177321 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_2 (849 ms)
7341 01:10:24.246856 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_2 RESULT=pass
7343 01:10:24.249681 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_2 RESULT=pass>
7344 01:10:24.258342 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_3
7345 01:10:24.338148 [0:08:31.861013524] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7346 01:10:25.023710 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_3 (845 ms)
7347 01:10:25.086195 [0:08:32.609067985] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7348 01:10:25.110768 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_3 RESULT=pass
7350 01:10:25.114165 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_3 RESULT=pass>
7351 01:10:25.126598 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_5
7352 01:10:25.969143 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_5 (945 ms)
7353 01:10:26.010494 [0:08:33.533456447] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7354 01:10:26.059352 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_5 RESULT=pass
7356 01:10:26.061971 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_5 RESULT=pass>
7357 01:10:26.075701 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_8
7358 01:10:27.190966 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_8 (1221 ms)
7359 01:10:27.233034 [0:08:34.755819062] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7360 01:10:27.293399 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_8 RESULT=pass>
7361 01:10:27.294178 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_8 RESULT=pass
7363 01:10:27.307401 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_13
7364 01:10:28.914220 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_13 (1723 ms)
7365 01:10:28.955043 [0:08:36.477647601] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7366 01:10:29.013536 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_13 RESULT=pass>
7367 01:10:29.014301 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_13 RESULT=pass
7369 01:10:29.028058 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_21
7370 01:10:31.430502 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_21 (2516 ms)
7371 01:10:31.472016 [0:08:38.994781678] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7372 01:10:31.526672 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_21 RESULT=pass
7374 01:10:31.529609 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_21 RESULT=pass>
7375 01:10:31.542082 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_34
7376 01:10:35.244592 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_34 (3814 ms)
7377 01:10:35.287350 [0:08:42.810523140] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7378 01:10:35.318866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_34 RESULT=pass>
7379 01:10:35.319155 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_34 RESULT=pass
7381 01:10:35.327305 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_55
7382 01:10:41.153248 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_55 (5908 ms)
7383 01:10:41.195072 [0:08:48.717503755] [427] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7384 01:10:41.235468 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_55 RESULT=pass
7386 01:10:41.238459 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_55 RESULT=pass>
7387 01:10:41.248600 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_89
7388 01:10:50.451886 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_89 (9297 ms)
7389 01:10:50.521592 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_89 RESULT=pass>
7390 01:10:50.521895 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_89 RESULT=pass
7392 01:10:50.532262 [----------] 120 tests from CaptureTests/SingleStream (517457 ms total)
7393 01:10:50.584336
7394 01:10:50.642053 [----------] Global test environment tear-down
7395 01:10:50.704736 [==========] 120 tests from 1 test suite ran. (517457 ms total)
7396 01:10:50.761449 <LAVA_SIGNAL_TESTSET STOP>
7397 01:10:50.761790 Received signal: <TESTSET> STOP
7398 01:10:50.761866 Closing test_set CaptureTests/SingleStream
7399 01:10:50.764532 + set +x
7400 01:10:50.768260 <LAVA_SIGNAL_ENDRUN 0_lc-compliance 14368621_1.6.2.3.1>
7401 01:10:50.768503 Received signal: <ENDRUN> 0_lc-compliance 14368621_1.6.2.3.1
7402 01:10:50.768580 Ending use of test pattern.
7403 01:10:50.768637 Ending test lava.0_lc-compliance (14368621_1.6.2.3.1), duration 519.33
7405 01:10:50.771277 <LAVA_TEST_RUNNER EXIT>
7406 01:10:50.771518 ok: lava_test_shell seems to have completed
7407 01:10:50.773152 Capture/Raw_1:
result: skip
set: CaptureTests/SingleStream
Capture/Raw_13:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_2:
result: skip
set: CaptureTests/SingleStream
Capture/Raw_21:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_3:
result: skip
set: CaptureTests/SingleStream
Capture/Raw_34:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_5:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_55:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_8:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_89:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_1:
result: skip
set: CaptureTests/SingleStream
Capture/StillCapture_13:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_2:
result: skip
set: CaptureTests/SingleStream
Capture/StillCapture_21:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_3:
result: skip
set: CaptureTests/SingleStream
Capture/StillCapture_34:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_5:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_55:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_8:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_89:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_1:
result: skip
set: CaptureTests/SingleStream
Capture/VideoRecording_13:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_2:
result: skip
set: CaptureTests/SingleStream
Capture/VideoRecording_21:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_3:
result: skip
set: CaptureTests/SingleStream
Capture/VideoRecording_34:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_5:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_55:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_8:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_89:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_1:
result: skip
set: CaptureTests/SingleStream
Capture/Viewfinder_13:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_2:
result: skip
set: CaptureTests/SingleStream
Capture/Viewfinder_21:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_3:
result: skip
set: CaptureTests/SingleStream
Capture/Viewfinder_34:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_5:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_55:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_8:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Raw_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Raw_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Raw_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_89:
result: pass
set: CaptureTests/SingleStream
7408 01:10:50.773338 end: 3.1 lava-test-shell (duration 00:08:40) [common]
7409 01:10:50.773420 end: 3 lava-test-retry (duration 00:08:40) [common]
7410 01:10:50.773502 start: 4 finalize (timeout 00:10:00) [common]
7411 01:10:50.773627 start: 4.1 power-off (timeout 00:00:30) [common]
7412 01:10:50.773762 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=off']
7413 01:10:52.846816 >> Command sent successfully.
7414 01:10:52.849749 Returned 0 in 2 seconds
7415 01:10:52.950086 end: 4.1 power-off (duration 00:00:02) [common]
7417 01:10:52.950370 start: 4.2 read-feedback (timeout 00:09:58) [common]
7418 01:10:52.950595 Listened to connection for namespace 'common' for up to 1s
7419 01:10:53.951568 Finalising connection for namespace 'common'
7420 01:10:53.951723 Disconnecting from shell: Finalise
7421 01:10:53.951800 / #
7422 01:10:54.052050 end: 4.2 read-feedback (duration 00:00:01) [common]
7423 01:10:54.052226 end: 4 finalize (duration 00:00:03) [common]
7424 01:10:54.052336 Cleaning after the job
7425 01:10:54.052475 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/ramdisk
7426 01:10:54.054640 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/kernel
7427 01:10:54.065126 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/dtb
7428 01:10:54.065277 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/nfsrootfs
7429 01:10:54.106116 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368621/tftp-deploy-sqd68brs/modules
7430 01:10:54.111996 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14368621
7431 01:10:54.366300 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14368621
7432 01:10:54.366465 Job finished correctly