Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 48
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 87
1 00:54:45.051940 lava-dispatcher, installed at version: 2024.03
2 00:54:45.052157 start: 0 validate
3 00:54:45.052286 Start time: 2024-06-16 00:54:45.052277+00:00 (UTC)
4 00:54:45.052431 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:54:45.052572 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 00:54:45.307001 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:54:45.307704 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 00:55:19.091588 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:55:19.091768 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 00:55:19.340512 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:55:19.340648 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-24-g0315de64ea248%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 00:55:23.091043 validate duration: 38.04
14 00:55:23.091286 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 00:55:23.091381 start: 1.1 download-retry (timeout 00:10:00) [common]
16 00:55:23.091464 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 00:55:23.091603 Not decompressing ramdisk as can be used compressed.
18 00:55:23.091689 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 00:55:23.091756 saving as /var/lib/lava/dispatcher/tmp/14368567/tftp-deploy-xywynvkf/ramdisk/rootfs.cpio.gz
20 00:55:23.091821 total size: 47897469 (45 MB)
21 00:55:23.342213 progress 0 % (0 MB)
22 00:55:23.361762 progress 5 % (2 MB)
23 00:55:23.381330 progress 10 % (4 MB)
24 00:55:23.401011 progress 15 % (6 MB)
25 00:55:23.413645 progress 20 % (9 MB)
26 00:55:23.425960 progress 25 % (11 MB)
27 00:55:23.438293 progress 30 % (13 MB)
28 00:55:23.450900 progress 35 % (16 MB)
29 00:55:23.463015 progress 40 % (18 MB)
30 00:55:23.475266 progress 45 % (20 MB)
31 00:55:23.487428 progress 50 % (22 MB)
32 00:55:23.499705 progress 55 % (25 MB)
33 00:55:23.512248 progress 60 % (27 MB)
34 00:55:23.524735 progress 65 % (29 MB)
35 00:55:23.536872 progress 70 % (32 MB)
36 00:55:23.549083 progress 75 % (34 MB)
37 00:55:23.561166 progress 80 % (36 MB)
38 00:55:23.573388 progress 85 % (38 MB)
39 00:55:23.585800 progress 90 % (41 MB)
40 00:55:23.597887 progress 95 % (43 MB)
41 00:55:23.609742 progress 100 % (45 MB)
42 00:55:23.609978 45 MB downloaded in 0.52 s (88.16 MB/s)
43 00:55:23.610178 end: 1.1.1 http-download (duration 00:00:01) [common]
45 00:55:23.610402 end: 1.1 download-retry (duration 00:00:01) [common]
46 00:55:23.610484 start: 1.2 download-retry (timeout 00:09:59) [common]
47 00:55:23.610561 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 00:55:23.610721 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 00:55:23.610830 saving as /var/lib/lava/dispatcher/tmp/14368567/tftp-deploy-xywynvkf/kernel/Image
50 00:55:23.610902 total size: 54813184 (52 MB)
51 00:55:23.611005 No compression specified
52 00:55:23.612121 progress 0 % (0 MB)
53 00:55:23.626221 progress 5 % (2 MB)
54 00:55:23.640186 progress 10 % (5 MB)
55 00:55:23.654080 progress 15 % (7 MB)
56 00:55:23.667933 progress 20 % (10 MB)
57 00:55:23.681947 progress 25 % (13 MB)
58 00:55:23.696212 progress 30 % (15 MB)
59 00:55:23.710648 progress 35 % (18 MB)
60 00:55:23.725190 progress 40 % (20 MB)
61 00:55:23.739384 progress 45 % (23 MB)
62 00:55:23.753640 progress 50 % (26 MB)
63 00:55:23.767911 progress 55 % (28 MB)
64 00:55:23.782046 progress 60 % (31 MB)
65 00:55:23.796164 progress 65 % (34 MB)
66 00:55:23.810180 progress 70 % (36 MB)
67 00:55:23.824465 progress 75 % (39 MB)
68 00:55:23.838590 progress 80 % (41 MB)
69 00:55:23.852539 progress 85 % (44 MB)
70 00:55:23.866687 progress 90 % (47 MB)
71 00:55:23.880672 progress 95 % (49 MB)
72 00:55:23.894416 progress 100 % (52 MB)
73 00:55:23.894677 52 MB downloaded in 0.28 s (184.21 MB/s)
74 00:55:23.894839 end: 1.2.1 http-download (duration 00:00:00) [common]
76 00:55:23.895052 end: 1.2 download-retry (duration 00:00:00) [common]
77 00:55:23.895135 start: 1.3 download-retry (timeout 00:09:59) [common]
78 00:55:23.895214 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 00:55:23.895346 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 00:55:23.895412 saving as /var/lib/lava/dispatcher/tmp/14368567/tftp-deploy-xywynvkf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 00:55:23.895468 total size: 57695 (0 MB)
82 00:55:23.895523 No compression specified
83 00:55:23.896583 progress 56 % (0 MB)
84 00:55:23.896850 progress 100 % (0 MB)
85 00:55:23.897046 0 MB downloaded in 0.00 s (34.92 MB/s)
86 00:55:23.897164 end: 1.3.1 http-download (duration 00:00:00) [common]
88 00:55:23.897372 end: 1.3 download-retry (duration 00:00:00) [common]
89 00:55:23.897450 start: 1.4 download-retry (timeout 00:09:59) [common]
90 00:55:23.897528 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 00:55:23.897636 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-24-g0315de64ea248/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 00:55:23.897698 saving as /var/lib/lava/dispatcher/tmp/14368567/tftp-deploy-xywynvkf/modules/modules.tar
93 00:55:23.897752 total size: 8617404 (8 MB)
94 00:55:23.897808 Using unxz to decompress xz
95 00:55:23.899151 progress 0 % (0 MB)
96 00:55:23.918614 progress 5 % (0 MB)
97 00:55:23.946032 progress 10 % (0 MB)
98 00:55:23.974737 progress 15 % (1 MB)
99 00:55:23.999800 progress 20 % (1 MB)
100 00:55:24.024402 progress 25 % (2 MB)
101 00:55:24.048544 progress 30 % (2 MB)
102 00:55:24.075831 progress 35 % (2 MB)
103 00:55:24.101232 progress 40 % (3 MB)
104 00:55:24.125360 progress 45 % (3 MB)
105 00:55:24.150278 progress 50 % (4 MB)
106 00:55:24.175610 progress 55 % (4 MB)
107 00:55:24.200506 progress 60 % (4 MB)
108 00:55:24.225305 progress 65 % (5 MB)
109 00:55:24.252595 progress 70 % (5 MB)
110 00:55:24.277003 progress 75 % (6 MB)
111 00:55:24.303344 progress 80 % (6 MB)
112 00:55:24.327644 progress 85 % (7 MB)
113 00:55:24.352322 progress 90 % (7 MB)
114 00:55:24.377094 progress 95 % (7 MB)
115 00:55:24.401542 progress 100 % (8 MB)
116 00:55:24.407329 8 MB downloaded in 0.51 s (16.13 MB/s)
117 00:55:24.407517 end: 1.4.1 http-download (duration 00:00:01) [common]
119 00:55:24.407761 end: 1.4 download-retry (duration 00:00:01) [common]
120 00:55:24.407858 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 00:55:24.407953 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 00:55:24.408071 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 00:55:24.408183 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 00:55:24.408391 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb
125 00:55:24.408545 makedir: /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin
126 00:55:24.408674 makedir: /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/tests
127 00:55:24.408799 makedir: /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/results
128 00:55:24.408922 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-add-keys
129 00:55:24.409091 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-add-sources
130 00:55:24.409237 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-background-process-start
131 00:55:24.409399 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-background-process-stop
132 00:55:24.409567 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-common-functions
133 00:55:24.409724 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-echo-ipv4
134 00:55:24.409880 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-install-packages
135 00:55:24.410035 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-installed-packages
136 00:55:24.410165 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-os-build
137 00:55:24.410297 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-probe-channel
138 00:55:24.410425 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-probe-ip
139 00:55:24.410557 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-target-ip
140 00:55:24.410710 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-target-mac
141 00:55:24.410863 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-target-storage
142 00:55:24.411020 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-test-case
143 00:55:24.411178 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-test-event
144 00:55:24.411339 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-test-feedback
145 00:55:24.411491 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-test-raise
146 00:55:24.411622 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-test-reference
147 00:55:24.411775 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-test-runner
148 00:55:24.411930 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-test-set
149 00:55:24.412089 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-test-shell
150 00:55:24.412262 Updating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-install-packages (oe)
151 00:55:24.412464 Updating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/bin/lava-installed-packages (oe)
152 00:55:24.412608 Creating /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/environment
153 00:55:24.412733 LAVA metadata
154 00:55:24.412832 - LAVA_JOB_ID=14368567
155 00:55:24.412926 - LAVA_DISPATCHER_IP=192.168.201.1
156 00:55:24.413062 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 00:55:24.413126 skipped lava-vland-overlay
158 00:55:24.413237 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 00:55:24.413348 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 00:55:24.413435 skipped lava-multinode-overlay
161 00:55:24.413544 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 00:55:24.413652 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 00:55:24.413758 Loading test definitions
164 00:55:24.413875 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 00:55:24.413967 Using /lava-14368567 at stage 0
166 00:55:24.414389 uuid=14368567_1.5.2.3.1 testdef=None
167 00:55:24.414507 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 00:55:24.414621 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 00:55:24.415268 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 00:55:24.415521 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 00:55:24.416361 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 00:55:24.416733 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 00:55:24.417436 runner path: /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/0/tests/0_igt-gpu-panfrost test_uuid 14368567_1.5.2.3.1
176 00:55:24.417600 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 00:55:24.417938 Creating lava-test-runner.conf files
179 00:55:24.418038 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14368567/lava-overlay-sj_cazeb/lava-14368567/0 for stage 0
180 00:55:24.418165 - 0_igt-gpu-panfrost
181 00:55:24.418293 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 00:55:24.418406 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 00:55:24.425370 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 00:55:24.425496 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 00:55:24.425616 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 00:55:24.425734 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 00:55:24.425848 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 00:55:26.198527 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:02) [common]
189 00:55:26.198677 start: 1.5.4 extract-modules (timeout 00:09:57) [common]
190 00:55:26.198756 extracting modules file /var/lib/lava/dispatcher/tmp/14368567/tftp-deploy-xywynvkf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14368567/extract-overlay-ramdisk-szm7mznw/ramdisk
191 00:55:26.430408 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 00:55:26.430551 start: 1.5.5 apply-overlay-tftp (timeout 00:09:57) [common]
193 00:55:26.430631 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368567/compress-overlay-1xdjav_j/overlay-1.5.2.4.tar.gz to ramdisk
194 00:55:26.430724 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14368567/compress-overlay-1xdjav_j/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14368567/extract-overlay-ramdisk-szm7mznw/ramdisk
195 00:55:26.438760 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 00:55:26.438882 start: 1.5.6 configure-preseed-file (timeout 00:09:57) [common]
197 00:55:26.438964 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 00:55:26.439044 start: 1.5.7 compress-ramdisk (timeout 00:09:57) [common]
199 00:55:26.439117 Building ramdisk /var/lib/lava/dispatcher/tmp/14368567/extract-overlay-ramdisk-szm7mznw/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14368567/extract-overlay-ramdisk-szm7mznw/ramdisk
200 00:55:27.647793 >> 465988 blocks
201 00:55:34.390391 rename /var/lib/lava/dispatcher/tmp/14368567/extract-overlay-ramdisk-szm7mznw/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14368567/tftp-deploy-xywynvkf/ramdisk/ramdisk.cpio.gz
202 00:55:34.390583 end: 1.5.7 compress-ramdisk (duration 00:00:08) [common]
203 00:55:34.390687 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
204 00:55:34.390787 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
205 00:55:34.390882 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14368567/tftp-deploy-xywynvkf/kernel/Image']
206 00:55:49.459136 Returned 0 in 15 seconds
207 00:55:49.559658 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14368567/tftp-deploy-xywynvkf/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14368567/tftp-deploy-xywynvkf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14368567/tftp-deploy-xywynvkf/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14368567/tftp-deploy-xywynvkf/kernel/image.itb
208 00:55:50.534809 output: FIT description: Kernel Image image with one or more FDT blobs
209 00:55:50.534948 output: Created: Sun Jun 16 01:55:50 2024
210 00:55:50.535041 output: Image 0 (kernel-1)
211 00:55:50.535116 output: Description:
212 00:55:50.535191 output: Created: Sun Jun 16 01:55:50 2024
213 00:55:50.535266 output: Type: Kernel Image
214 00:55:50.535337 output: Compression: lzma compressed
215 00:55:50.535410 output: Data Size: 13125045 Bytes = 12817.43 KiB = 12.52 MiB
216 00:55:50.535501 output: Architecture: AArch64
217 00:55:50.535588 output: OS: Linux
218 00:55:50.535680 output: Load Address: 0x00000000
219 00:55:50.535768 output: Entry Point: 0x00000000
220 00:55:50.535857 output: Hash algo: crc32
221 00:55:50.535945 output: Hash value: f6f06660
222 00:55:50.536031 output: Image 1 (fdt-1)
223 00:55:50.536119 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 00:55:50.536209 output: Created: Sun Jun 16 01:55:50 2024
225 00:55:50.536300 output: Type: Flat Device Tree
226 00:55:50.536393 output: Compression: uncompressed
227 00:55:50.536486 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 00:55:50.536579 output: Architecture: AArch64
229 00:55:50.536672 output: Hash algo: crc32
230 00:55:50.536766 output: Hash value: a9713552
231 00:55:50.536858 output: Image 2 (ramdisk-1)
232 00:55:50.536948 output: Description: unavailable
233 00:55:50.537037 output: Created: Sun Jun 16 01:55:50 2024
234 00:55:50.537123 output: Type: RAMDisk Image
235 00:55:50.537209 output: Compression: uncompressed
236 00:55:50.537294 output: Data Size: 61015581 Bytes = 59585.53 KiB = 58.19 MiB
237 00:55:50.537380 output: Architecture: AArch64
238 00:55:50.537465 output: OS: Linux
239 00:55:50.537549 output: Load Address: unavailable
240 00:55:50.537634 output: Entry Point: unavailable
241 00:55:50.537719 output: Hash algo: crc32
242 00:55:50.537804 output: Hash value: 0799e257
243 00:55:50.537889 output: Default Configuration: 'conf-1'
244 00:55:50.537975 output: Configuration 0 (conf-1)
245 00:55:50.538072 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 00:55:50.538157 output: Kernel: kernel-1
247 00:55:50.538243 output: Init Ramdisk: ramdisk-1
248 00:55:50.538329 output: FDT: fdt-1
249 00:55:50.538415 output: Loadables: kernel-1
250 00:55:50.538495 output:
251 00:55:50.538682 end: 1.5.8.1 prepare-fit (duration 00:00:16) [common]
252 00:55:50.538800 end: 1.5.8 prepare-kernel (duration 00:00:16) [common]
253 00:55:50.538933 end: 1.5 prepare-tftp-overlay (duration 00:00:26) [common]
254 00:55:50.539052 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
255 00:55:50.539152 No LXC device requested
256 00:55:50.539258 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 00:55:50.539368 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
258 00:55:50.539469 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 00:55:50.539563 Checking files for TFTP limit of 4294967296 bytes.
260 00:55:50.540187 end: 1 tftp-deploy (duration 00:00:27) [common]
261 00:55:50.540318 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 00:55:50.540427 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 00:55:50.540534 substitutions:
264 00:55:50.540596 - {DTB}: 14368567/tftp-deploy-xywynvkf/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 00:55:50.540658 - {INITRD}: 14368567/tftp-deploy-xywynvkf/ramdisk/ramdisk.cpio.gz
266 00:55:50.540712 - {KERNEL}: 14368567/tftp-deploy-xywynvkf/kernel/Image
267 00:55:50.540764 - {LAVA_MAC}: None
268 00:55:50.540816 - {PRESEED_CONFIG}: None
269 00:55:50.540867 - {PRESEED_LOCAL}: None
270 00:55:50.540917 - {RAMDISK}: 14368567/tftp-deploy-xywynvkf/ramdisk/ramdisk.cpio.gz
271 00:55:50.540977 - {ROOT_PART}: None
272 00:55:50.541030 - {ROOT}: None
273 00:55:50.541080 - {SERVER_IP}: 192.168.201.1
274 00:55:50.541130 - {TEE}: None
275 00:55:50.541180 Parsed boot commands:
276 00:55:50.541229 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 00:55:50.541387 Parsed boot commands: tftpboot 192.168.201.1 14368567/tftp-deploy-xywynvkf/kernel/image.itb 14368567/tftp-deploy-xywynvkf/kernel/cmdline
278 00:55:50.541470 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 00:55:50.541547 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 00:55:50.541629 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 00:55:50.541733 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 00:55:50.541823 Not connected, no need to disconnect.
283 00:55:50.541925 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 00:55:50.542043 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 00:55:50.542133 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-1'
286 00:55:50.545741 Setting prompt string to ['lava-test: # ']
287 00:55:50.546183 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 00:55:50.546326 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 00:55:50.546456 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 00:55:50.546562 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 00:55:50.546749 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-1']
292 00:56:12.730122 Returned 0 in 22 seconds
293 00:56:12.831049 end: 2.2.2.1 pdu-reboot (duration 00:00:22) [common]
295 00:56:12.832322 end: 2.2.2 reset-device (duration 00:00:22) [common]
296 00:56:12.832845 start: 2.2.3 depthcharge-start (timeout 00:04:38) [common]
297 00:56:12.833328 Setting prompt string to 'Starting depthcharge on Juniper...'
298 00:56:12.833668 Changing prompt to 'Starting depthcharge on Juniper...'
299 00:56:12.834056 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 00:56:12.835864 [Enter `^Ec?' for help]
301 00:56:12.836272 [DL] 00000000 00000000 010701
302 00:56:12.836597
303 00:56:12.836918
304 00:56:12.837228 F0: 102B 0000
305 00:56:12.837523
306 00:56:12.837821 F3: 1006 0033 [0200]
307 00:56:12.838194
308 00:56:12.838510 F3: 4001 00E0 [0200]
309 00:56:12.838832
310 00:56:12.839147 F3: 0000 0000
311 00:56:12.839466
312 00:56:12.839778 V0: 0000 0000 [0001]
313 00:56:12.840085
314 00:56:12.840383 00: 1027 0002
315 00:56:12.840709
316 00:56:12.841004 01: 0000 0000
317 00:56:12.841297
318 00:56:12.841575 BP: 0C00 0251 [0000]
319 00:56:12.841852
320 00:56:12.842145 G0: 1182 0000
321 00:56:12.842398
322 00:56:12.842645 EC: 0004 0000 [0001]
323 00:56:12.842896
324 00:56:12.843145 S7: 0000 0000 [0000]
325 00:56:12.843392
326 00:56:12.843640 CC: 0000 0000 [0001]
327 00:56:12.843887
328 00:56:12.844133 T0: 0000 00DB [000F]
329 00:56:12.844383
330 00:56:12.844629 Jump to BL
331 00:56:12.844879
332 00:56:12.845128
333 00:56:12.845375
334 00:56:12.845637 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 00:56:12.845905 ARM64: Exception handlers installed.
336 00:56:12.846204 ARM64: Testing exception
337 00:56:12.846466 ARM64: Done test exception
338 00:56:12.846719 WDT: Last reset was cold boot
339 00:56:12.847213 SPI0(PAD0) initialized at 992727 Hz
340 00:56:12.847510 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 00:56:12.847774 Manufacturer: ef
342 00:56:12.848034 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 00:56:12.848295 Probing TPM: . done!
344 00:56:12.848547 TPM ready after 0 ms
345 00:56:12.848816 Connected to device vid:did:rid of 1ae0:0028:00
346 00:56:12.849073 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
347 00:56:12.849332 Initialized TPM device CR50 revision 0
348 00:56:12.849586 tlcl_send_startup: Startup return code is 0
349 00:56:12.849839 TPM: setup succeeded
350 00:56:12.850151 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 00:56:12.850416 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 00:56:12.850672 in-header: 03 19 00 00 08 00 00 00
353 00:56:12.850924 in-data: a2 e0 47 00 13 00 00 00
354 00:56:12.851175 Chrome EC: UHEPI supported
355 00:56:12.851427 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 00:56:12.851685 in-header: 03 a1 00 00 08 00 00 00
357 00:56:12.851933 in-data: 84 60 60 10 00 00 00 00
358 00:56:12.852181 Phase 1
359 00:56:12.852433 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 00:56:12.852688 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 00:56:12.852993 VB2:vb2_check_recovery() Recovery was requested manually
362 00:56:12.853260 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 00:56:12.853515 Recovery requested (1009000e)
364 00:56:12.853768 tlcl_extend: response is 0
365 00:56:12.854066 tlcl_extend: response is 0
366 00:56:12.854326
367 00:56:12.854576
368 00:56:12.854827 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 00:56:12.855170 ARM64: Exception handlers installed.
370 00:56:12.855436 ARM64: Testing exception
371 00:56:12.855690 ARM64: Done test exception
372 00:56:12.855942 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x826a, sec=0x2011
373 00:56:12.856198 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 00:56:12.856453 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 00:56:12.856706 [RTC]rtc_get_frequency_meter,134: input=0xf, output=875
376 00:56:12.856959 [RTC]rtc_get_frequency_meter,134: input=0x7, output=742
377 00:56:12.857211 [RTC]rtc_get_frequency_meter,134: input=0xb, output=809
378 00:56:12.857463 [RTC]rtc_get_frequency_meter,134: input=0x9, output=775
379 00:56:12.857718 [RTC]rtc_get_frequency_meter,134: input=0xa, output=792
380 00:56:12.857968 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x826a
381 00:56:12.858265 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
382 00:56:12.858519 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
383 00:56:12.858771 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
384 00:56:12.859027 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
385 00:56:12.859465 in-header: 03 19 00 00 08 00 00 00
386 00:56:12.859754 in-data: a2 e0 47 00 13 00 00 00
387 00:56:12.860056 Chrome EC: UHEPI supported
388 00:56:12.860314 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
389 00:56:12.860570 in-header: 03 a1 00 00 08 00 00 00
390 00:56:12.860823 in-data: 84 60 60 10 00 00 00 00
391 00:56:12.861073 Skip loading cached calibration data
392 00:56:12.861325 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
393 00:56:12.861583 in-header: 03 a1 00 00 08 00 00 00
394 00:56:12.861833 in-data: 84 60 60 10 00 00 00 00
395 00:56:12.862121 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
396 00:56:12.862380 in-header: 03 a1 00 00 08 00 00 00
397 00:56:12.862645 in-data: 84 60 60 10 00 00 00 00
398 00:56:12.862823 ADC[3]: Raw value=216425 ID=1
399 00:56:12.862999 Manufacturer: ef
400 00:56:12.863178 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
401 00:56:12.863359 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
402 00:56:12.863542 CBFS @ 21000 size 3d4000
403 00:56:12.863723 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
404 00:56:12.863904 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
405 00:56:12.864083 CBFS: Found @ offset 3c700 size 44
406 00:56:12.864271 DRAM-K: Full Calibration
407 00:56:12.864451 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
408 00:56:12.864629 CBFS @ 21000 size 3d4000
409 00:56:12.864807 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
410 00:56:12.864986 CBFS: Locating 'fallback/dram'
411 00:56:12.865165 CBFS: Found @ offset 24b00 size 12268
412 00:56:12.865342 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
413 00:56:12.865523 ddr_geometry: 1, config: 0x0
414 00:56:12.865700 header.status = 0x0
415 00:56:12.865879 header.magic = 0x44524d4b (expected: 0x44524d4b)
416 00:56:12.866090 header.version = 0x5 (expected: 0x5)
417 00:56:12.866273 header.size = 0x8f0 (expected: 0x8f0)
418 00:56:12.866450 header.config = 0x0
419 00:56:12.866625 header.flags = 0x0
420 00:56:12.866834 header.checksum = 0x0
421 00:56:12.867329 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
422 00:56:12.867551 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
423 00:56:12.867723 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
424 00:56:12.867860 ddr_geometry:1
425 00:56:12.867994 [EMI] new MDL number = 1
426 00:56:12.868130 dram_cbt_mode_extern: 0
427 00:56:12.868267 dram_cbt_mode [RK0]: 0, [RK1]: 0
428 00:56:12.868413 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
429 00:56:12.868569
430 00:56:12.868703
431 00:56:12.868853 [Bianco] ETT version 0.0.0.1
432 00:56:12.869044 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
433 00:56:12.869252
434 00:56:12.869396 vSetVcoreByFreq with vcore:762500, freq=1600
435 00:56:12.869536
436 00:56:12.869671 [DramcInit]
437 00:56:12.869806 AutoRefreshCKEOff AutoREF OFF
438 00:56:12.869944 DDRPhyPLLSetting-CKEOFF
439 00:56:12.870118 DDRPhyPLLSetting-CKEON
440 00:56:12.870255
441 00:56:12.870409 Enable WDQS
442 00:56:12.870556 [ModeRegInit_LP4] CH0 RK0
443 00:56:12.870694 Write Rank0 MR13 =0x18
444 00:56:12.870830 Write Rank0 MR12 =0x5d
445 00:56:12.870966 Write Rank0 MR1 =0x56
446 00:56:12.871100 Write Rank0 MR2 =0x1a
447 00:56:12.871233 Write Rank0 MR11 =0x0
448 00:56:12.871366 Write Rank0 MR22 =0x38
449 00:56:12.871501 Write Rank0 MR14 =0x5d
450 00:56:12.871636 Write Rank0 MR3 =0x30
451 00:56:12.871770 Write Rank0 MR13 =0x58
452 00:56:12.871904 Write Rank0 MR12 =0x5d
453 00:56:12.872039 Write Rank0 MR1 =0x56
454 00:56:12.872174 Write Rank0 MR2 =0x2d
455 00:56:12.872309 Write Rank0 MR11 =0x23
456 00:56:12.872444 Write Rank0 MR22 =0x34
457 00:56:12.872579 Write Rank0 MR14 =0x10
458 00:56:12.872716 Write Rank0 MR3 =0x30
459 00:56:12.872825 Write Rank0 MR13 =0xd8
460 00:56:12.872932 [ModeRegInit_LP4] CH0 RK1
461 00:56:12.873041 Write Rank1 MR13 =0x18
462 00:56:12.873148 Write Rank1 MR12 =0x5d
463 00:56:12.873256 Write Rank1 MR1 =0x56
464 00:56:12.873364 Write Rank1 MR2 =0x1a
465 00:56:12.873471 Write Rank1 MR11 =0x0
466 00:56:12.873579 Write Rank1 MR22 =0x38
467 00:56:12.873686 Write Rank1 MR14 =0x5d
468 00:56:12.873794 Write Rank1 MR3 =0x30
469 00:56:12.873903 Write Rank1 MR13 =0x58
470 00:56:12.874027 Write Rank1 MR12 =0x5d
471 00:56:12.874138 Write Rank1 MR1 =0x56
472 00:56:12.874247 Write Rank1 MR2 =0x2d
473 00:56:12.874355 Write Rank1 MR11 =0x23
474 00:56:12.874464 Write Rank1 MR22 =0x34
475 00:56:12.874572 Write Rank1 MR14 =0x10
476 00:56:12.874679 Write Rank1 MR3 =0x30
477 00:56:12.874788 Write Rank1 MR13 =0xd8
478 00:56:12.874895 [ModeRegInit_LP4] CH1 RK0
479 00:56:12.875002 Write Rank0 MR13 =0x18
480 00:56:12.875110 Write Rank0 MR12 =0x5d
481 00:56:12.875218 Write Rank0 MR1 =0x56
482 00:56:12.875326 Write Rank0 MR2 =0x1a
483 00:56:12.875434 Write Rank0 MR11 =0x0
484 00:56:12.875541 Write Rank0 MR22 =0x38
485 00:56:12.875650 Write Rank0 MR14 =0x5d
486 00:56:12.875758 Write Rank0 MR3 =0x30
487 00:56:12.875867 Write Rank0 MR13 =0x58
488 00:56:12.875974 Write Rank0 MR12 =0x5d
489 00:56:12.876081 Write Rank0 MR1 =0x56
490 00:56:12.876189 Write Rank0 MR2 =0x2d
491 00:56:12.876296 Write Rank0 MR11 =0x23
492 00:56:12.876403 Write Rank0 MR22 =0x34
493 00:56:12.876511 Write Rank0 MR14 =0x10
494 00:56:12.876618 Write Rank0 MR3 =0x30
495 00:56:12.876726 Write Rank0 MR13 =0xd8
496 00:56:12.876832 [ModeRegInit_LP4] CH1 RK1
497 00:56:12.876939 Write Rank1 MR13 =0x18
498 00:56:12.877047 Write Rank1 MR12 =0x5d
499 00:56:12.877155 Write Rank1 MR1 =0x56
500 00:56:12.877263 Write Rank1 MR2 =0x1a
501 00:56:12.877370 Write Rank1 MR11 =0x0
502 00:56:12.877478 Write Rank1 MR22 =0x38
503 00:56:12.877586 Write Rank1 MR14 =0x5d
504 00:56:12.877697 Write Rank1 MR3 =0x30
505 00:56:12.877789 Write Rank1 MR13 =0x58
506 00:56:12.877879 Write Rank1 MR12 =0x5d
507 00:56:12.877968 Write Rank1 MR1 =0x56
508 00:56:12.878074 Write Rank1 MR2 =0x2d
509 00:56:12.878166 Write Rank1 MR11 =0x23
510 00:56:12.878258 Write Rank1 MR22 =0x34
511 00:56:12.878354 Write Rank1 MR14 =0x10
512 00:56:12.878447 Write Rank1 MR3 =0x30
513 00:56:12.878537 Write Rank1 MR13 =0xd8
514 00:56:12.878627 match AC timing 3
515 00:56:12.878718 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
516 00:56:12.878811 [MiockJmeterHQA]
517 00:56:12.878900 vSetVcoreByFreq with vcore:762500, freq=1600
518 00:56:12.878991
519 00:56:12.879081 MIOCK jitter meter ch=0
520 00:56:12.879172
521 00:56:12.879262 1T = (88-13) = 75 dly cells
522 00:56:12.879357 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 833/100 ps
523 00:56:12.879450 vSetVcoreByFreq with vcore:725000, freq=1200
524 00:56:12.879541
525 00:56:12.879630 MIOCK jitter meter ch=0
526 00:56:12.879721
527 00:56:12.879810 1T = (83-13) = 70 dly cells
528 00:56:12.879901 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 892/100 ps
529 00:56:12.879992 vSetVcoreByFreq with vcore:725000, freq=800
530 00:56:12.880082
531 00:56:12.880171 MIOCK jitter meter ch=0
532 00:56:12.880260
533 00:56:12.880350 1T = (83-13) = 70 dly cells
534 00:56:12.880442 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 892/100 ps
535 00:56:12.880535 vSetVcoreByFreq with vcore:762500, freq=1600
536 00:56:12.880625 vSetVcoreByFreq with vcore:762500, freq=1600
537 00:56:12.880715
538 00:56:12.880806 K DRVP
539 00:56:12.880897 1. OCD DRVP=0 CALOUT=0
540 00:56:12.880991 1. OCD DRVP=1 CALOUT=0
541 00:56:12.881084 1. OCD DRVP=2 CALOUT=0
542 00:56:12.881176 1. OCD DRVP=3 CALOUT=0
543 00:56:12.881268 1. OCD DRVP=4 CALOUT=0
544 00:56:12.881361 1. OCD DRVP=5 CALOUT=0
545 00:56:12.881452 1. OCD DRVP=6 CALOUT=0
546 00:56:12.881544 1. OCD DRVP=7 CALOUT=0
547 00:56:12.881637 1. OCD DRVP=8 CALOUT=0
548 00:56:12.881730 1. OCD DRVP=9 CALOUT=1
549 00:56:12.881823
550 00:56:12.881912 1. OCD DRVP calibration OK! DRVP=9
551 00:56:12.882017
552 00:56:12.882110
553 00:56:12.882199
554 00:56:12.882289 K ODTN
555 00:56:12.882380 3. OCD ODTN=0 ,CALOUT=1
556 00:56:12.882476 3. OCD ODTN=1 ,CALOUT=1
557 00:56:12.882570 3. OCD ODTN=2 ,CALOUT=1
558 00:56:12.882676 3. OCD ODTN=3 ,CALOUT=1
559 00:56:12.882756 3. OCD ODTN=4 ,CALOUT=1
560 00:56:12.882834 3. OCD ODTN=5 ,CALOUT=1
561 00:56:12.882915 3. OCD ODTN=6 ,CALOUT=1
562 00:56:12.883010 3. OCD ODTN=7 ,CALOUT=1
563 00:56:12.883091 3. OCD ODTN=8 ,CALOUT=0
564 00:56:12.883169
565 00:56:12.883247 3. OCD ODTN calibration OK! ODTN=8
566 00:56:12.883327
567 00:56:12.883404 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=8
568 00:56:12.883481 term_option=0, Reg: DRVP=9, DRVN=8, ODTN=15
569 00:56:12.883559 term_option=0, Reg: DRVP=9, DRVN=8, ODTN=15 (After Adjust)
570 00:56:12.883637
571 00:56:12.883713 K DRVP
572 00:56:12.883789 1. OCD DRVP=0 CALOUT=0
573 00:56:12.883868 1. OCD DRVP=1 CALOUT=0
574 00:56:12.883947 1. OCD DRVP=2 CALOUT=0
575 00:56:12.884026 1. OCD DRVP=3 CALOUT=0
576 00:56:12.884106 1. OCD DRVP=4 CALOUT=0
577 00:56:12.884184 1. OCD DRVP=5 CALOUT=0
578 00:56:12.884264 1. OCD DRVP=6 CALOUT=0
579 00:56:12.884343 1. OCD DRVP=7 CALOUT=0
580 00:56:12.884422 1. OCD DRVP=8 CALOUT=0
581 00:56:12.884501 1. OCD DRVP=9 CALOUT=0
582 00:56:12.884582 1. OCD DRVP=10 CALOUT=1
583 00:56:12.884661
584 00:56:12.884738 1. OCD DRVP calibration OK! DRVP=10
585 00:56:12.884818
586 00:56:12.884894
587 00:56:12.884970
588 00:56:12.885046 K ODTN
589 00:56:12.885124 3. OCD ODTN=0 ,CALOUT=1
590 00:56:12.885415 3. OCD ODTN=1 ,CALOUT=1
591 00:56:12.885509 3. OCD ODTN=2 ,CALOUT=1
592 00:56:12.885590 3. OCD ODTN=3 ,CALOUT=1
593 00:56:12.885670 3. OCD ODTN=4 ,CALOUT=1
594 00:56:12.885752 3. OCD ODTN=5 ,CALOUT=1
595 00:56:12.885831 3. OCD ODTN=6 ,CALOUT=1
596 00:56:12.885911 3. OCD ODTN=7 ,CALOUT=1
597 00:56:12.886007 3. OCD ODTN=8 ,CALOUT=1
598 00:56:12.886089 3. OCD ODTN=9 ,CALOUT=1
599 00:56:12.886168 3. OCD ODTN=10 ,CALOUT=1
600 00:56:12.886248 3. OCD ODTN=11 ,CALOUT=1
601 00:56:12.886331 3. OCD ODTN=12 ,CALOUT=1
602 00:56:12.886410 3. OCD ODTN=13 ,CALOUT=1
603 00:56:12.886489 3. OCD ODTN=14 ,CALOUT=1
604 00:56:12.886569 3. OCD ODTN=15 ,CALOUT=0
605 00:56:12.886648
606 00:56:12.886726 3. OCD ODTN calibration OK! ODTN=15
607 00:56:12.886806
608 00:56:12.886883 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
609 00:56:12.886962 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
610 00:56:12.887040 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
611 00:56:12.887119
612 00:56:12.887196 [DramcInit]
613 00:56:12.887272 AutoRefreshCKEOff AutoREF OFF
614 00:56:12.887350 DDRPhyPLLSetting-CKEOFF
615 00:56:12.887427 DDRPhyPLLSetting-CKEON
616 00:56:12.887504
617 00:56:12.887581 Enable WDQS
618 00:56:12.887676 ==
619 00:56:12.887753 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
620 00:56:12.887823 fsp= 1, odt_onoff= 1, Byte mode= 0
621 00:56:12.887892 ==
622 00:56:12.887960 [Duty_Offset_Calibration]
623 00:56:12.888029
624 00:56:12.888098 ===========================
625 00:56:12.888167 B0:0 B1:1 CA:2
626 00:56:12.888235 ==
627 00:56:12.888303 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
628 00:56:12.888373 fsp= 1, odt_onoff= 1, Byte mode= 0
629 00:56:12.888442 ==
630 00:56:12.888511 [Duty_Offset_Calibration]
631 00:56:12.888579
632 00:56:12.888650 ===========================
633 00:56:12.888718 B0:0 B1:1 CA:1
634 00:56:12.888786 [ModeRegInit_LP4] CH0 RK0
635 00:56:12.888855 Write Rank0 MR13 =0x18
636 00:56:12.888923 Write Rank0 MR12 =0x5d
637 00:56:12.888991 Write Rank0 MR1 =0x56
638 00:56:12.889059 Write Rank0 MR2 =0x1a
639 00:56:12.889127 Write Rank0 MR11 =0x0
640 00:56:12.889195 Write Rank0 MR22 =0x38
641 00:56:12.889263 Write Rank0 MR14 =0x5d
642 00:56:12.889332 Write Rank0 MR3 =0x30
643 00:56:12.889399 Write Rank0 MR13 =0x58
644 00:56:12.889467 Write Rank0 MR12 =0x5d
645 00:56:12.889535 Write Rank0 MR1 =0x56
646 00:56:12.889603 Write Rank0 MR2 =0x2d
647 00:56:12.889670 Write Rank0 MR11 =0x23
648 00:56:12.889738 Write Rank0 MR22 =0x34
649 00:56:12.889806 Write Rank0 MR14 =0x10
650 00:56:12.889873 Write Rank0 MR3 =0x30
651 00:56:12.889940 Write Rank0 MR13 =0xd8
652 00:56:12.890018 [ModeRegInit_LP4] CH0 RK1
653 00:56:12.890086 Write Rank1 MR13 =0x18
654 00:56:12.890154 Write Rank1 MR12 =0x5d
655 00:56:12.890221 Write Rank1 MR1 =0x56
656 00:56:12.890288 Write Rank1 MR2 =0x1a
657 00:56:12.890356 Write Rank1 MR11 =0x0
658 00:56:12.890424 Write Rank1 MR22 =0x38
659 00:56:12.890492 Write Rank1 MR14 =0x5d
660 00:56:12.890559 Write Rank1 MR3 =0x30
661 00:56:12.890626 Write Rank1 MR13 =0x58
662 00:56:12.890695 Write Rank1 MR12 =0x5d
663 00:56:12.890762 Write Rank1 MR1 =0x56
664 00:56:12.890830 Write Rank1 MR2 =0x2d
665 00:56:12.890897 Write Rank1 MR11 =0x23
666 00:56:12.890966 Write Rank1 MR22 =0x34
667 00:56:12.891033 Write Rank1 MR14 =0x10
668 00:56:12.891101 Write Rank1 MR3 =0x30
669 00:56:12.891169 Write Rank1 MR13 =0xd8
670 00:56:12.891236 [ModeRegInit_LP4] CH1 RK0
671 00:56:12.891304 Write Rank0 MR13 =0x18
672 00:56:12.891371 Write Rank0 MR12 =0x5d
673 00:56:12.891440 Write Rank0 MR1 =0x56
674 00:56:12.891509 Write Rank0 MR2 =0x1a
675 00:56:12.891577 Write Rank0 MR11 =0x0
676 00:56:12.891644 Write Rank0 MR22 =0x38
677 00:56:12.891712 Write Rank0 MR14 =0x5d
678 00:56:12.891780 Write Rank0 MR3 =0x30
679 00:56:12.891848 Write Rank0 MR13 =0x58
680 00:56:12.891916 Write Rank0 MR12 =0x5d
681 00:56:12.891984 Write Rank0 MR1 =0x56
682 00:56:12.892052 Write Rank0 MR2 =0x2d
683 00:56:12.892120 Write Rank0 MR11 =0x23
684 00:56:12.892187 Write Rank0 MR22 =0x34
685 00:56:12.892255 Write Rank0 MR14 =0x10
686 00:56:12.892323 Write Rank0 MR3 =0x30
687 00:56:12.892391 Write Rank0 MR13 =0xd8
688 00:56:12.892459 [ModeRegInit_LP4] CH1 RK1
689 00:56:12.892526 Write Rank1 MR13 =0x18
690 00:56:12.892595 Write Rank1 MR12 =0x5d
691 00:56:12.892675 Write Rank1 MR1 =0x56
692 00:56:12.892736 Write Rank1 MR2 =0x1a
693 00:56:12.892795 Write Rank1 MR11 =0x0
694 00:56:12.892856 Write Rank1 MR22 =0x38
695 00:56:12.892916 Write Rank1 MR14 =0x5d
696 00:56:12.892976 Write Rank1 MR3 =0x30
697 00:56:12.893036 Write Rank1 MR13 =0x58
698 00:56:12.893095 Write Rank1 MR12 =0x5d
699 00:56:12.893155 Write Rank1 MR1 =0x56
700 00:56:12.893214 Write Rank1 MR2 =0x2d
701 00:56:12.893276 Write Rank1 MR11 =0x23
702 00:56:12.893337 Write Rank1 MR22 =0x34
703 00:56:12.893396 Write Rank1 MR14 =0x10
704 00:56:12.893457 Write Rank1 MR3 =0x30
705 00:56:12.893516 Write Rank1 MR13 =0xd8
706 00:56:12.893577 match AC timing 3
707 00:56:12.893638 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
708 00:56:12.893700 DramC Write-DBI off
709 00:56:12.893761 DramC Read-DBI off
710 00:56:12.893821 Write Rank0 MR13 =0x59
711 00:56:12.893882 ==
712 00:56:12.893943 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
713 00:56:12.894011 fsp= 1, odt_onoff= 1, Byte mode= 0
714 00:56:12.894073 ==
715 00:56:12.894134 === u2Vref_new: 0x56 --> 0x2d
716 00:56:12.894195 === u2Vref_new: 0x58 --> 0x38
717 00:56:12.894256 === u2Vref_new: 0x5a --> 0x39
718 00:56:12.894317 === u2Vref_new: 0x5c --> 0x3c
719 00:56:12.894378 === u2Vref_new: 0x5e --> 0x3d
720 00:56:12.894439 === u2Vref_new: 0x60 --> 0xa0
721 00:56:12.894500 [CA 0] Center 34 (6~63) winsize 58
722 00:56:12.894562 [CA 1] Center 36 (9~63) winsize 55
723 00:56:12.894624 [CA 2] Center 30 (2~59) winsize 58
724 00:56:12.894685 [CA 3] Center 25 (-2~53) winsize 56
725 00:56:12.894746 [CA 4] Center 26 (-2~54) winsize 57
726 00:56:12.894807 [CA 5] Center 31 (2~61) winsize 60
727 00:56:12.894868
728 00:56:12.894927 [CATrainingPosCal] consider 1 rank data
729 00:56:12.894989 u2DelayCellTimex100 = 833/100 ps
730 00:56:12.895050 CA0 delay=34 (6~63),Diff = 9 PI (10 cell)
731 00:56:12.895111 CA1 delay=36 (9~63),Diff = 11 PI (12 cell)
732 00:56:12.895171 CA2 delay=30 (2~59),Diff = 5 PI (5 cell)
733 00:56:12.895232 CA3 delay=25 (-2~53),Diff = 0 PI (0 cell)
734 00:56:12.895293 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
735 00:56:12.895354 CA5 delay=31 (2~61),Diff = 6 PI (7 cell)
736 00:56:12.895415
737 00:56:12.895475 CA PerBit enable=1, Macro0, CA PI delay=25
738 00:56:12.895536 === u2Vref_new: 0x60 --> 0xa0
739 00:56:12.895597
740 00:56:12.895657 Vref(ca) range 1: 32
741 00:56:12.895717
742 00:56:12.895777 CS Dly= 10 (41-0-32)
743 00:56:12.895839 Write Rank0 MR13 =0xd8
744 00:56:12.895899 Write Rank0 MR13 =0xd8
745 00:56:12.895960 Write Rank0 MR12 =0x60
746 00:56:12.896020 Write Rank1 MR13 =0x59
747 00:56:12.896079 ==
748 00:56:12.896140 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
749 00:56:12.896421 fsp= 1, odt_onoff= 1, Byte mode= 0
750 00:56:12.896494 ==
751 00:56:12.896556 === u2Vref_new: 0x56 --> 0x2d
752 00:56:12.896618 === u2Vref_new: 0x58 --> 0x38
753 00:56:12.896679 === u2Vref_new: 0x5a --> 0x39
754 00:56:12.896740 === u2Vref_new: 0x5c --> 0x3c
755 00:56:12.896801 === u2Vref_new: 0x5e --> 0x3d
756 00:56:12.896861 === u2Vref_new: 0x60 --> 0xa0
757 00:56:12.896924 [CA 0] Center 36 (9~63) winsize 55
758 00:56:12.896986 [CA 1] Center 36 (10~63) winsize 54
759 00:56:12.897047 [CA 2] Center 31 (2~60) winsize 59
760 00:56:12.897109 [CA 3] Center 26 (-2~54) winsize 57
761 00:56:12.897170 [CA 4] Center 25 (-2~53) winsize 56
762 00:56:12.897231 [CA 5] Center 31 (1~61) winsize 61
763 00:56:12.897292
764 00:56:12.897353 [CATrainingPosCal] consider 2 rank data
765 00:56:12.897415 u2DelayCellTimex100 = 833/100 ps
766 00:56:12.897476 CA0 delay=36 (9~63),Diff = 11 PI (12 cell)
767 00:56:12.897536 CA1 delay=36 (10~63),Diff = 11 PI (12 cell)
768 00:56:12.897596 CA2 delay=30 (2~59),Diff = 5 PI (5 cell)
769 00:56:12.897669 CA3 delay=25 (-2~53),Diff = 0 PI (0 cell)
770 00:56:12.897724 CA4 delay=25 (-2~53),Diff = 0 PI (0 cell)
771 00:56:12.897779 CA5 delay=31 (2~61),Diff = 6 PI (7 cell)
772 00:56:12.897834
773 00:56:12.897888 CA PerBit enable=1, Macro0, CA PI delay=25
774 00:56:12.897943 === u2Vref_new: 0x5e --> 0x3d
775 00:56:12.898005
776 00:56:12.898060 Vref(ca) range 1: 30
777 00:56:12.898113
778 00:56:12.898168 CS Dly= 7 (38-0-32)
779 00:56:12.898223 Write Rank1 MR13 =0xd8
780 00:56:12.898277 Write Rank1 MR13 =0xd8
781 00:56:12.898331 Write Rank1 MR12 =0x5e
782 00:56:12.898386 [RankSwap] Rank num 2, (Multi 1), Rank 0
783 00:56:12.898440 Write Rank0 MR2 =0xad
784 00:56:12.898494 [Write Leveling]
785 00:56:12.898549 delay byte0 byte1 byte2 byte3
786 00:56:12.898604
787 00:56:12.898658 10 0 0
788 00:56:12.898713 11 0 0
789 00:56:12.898768 12 0 0
790 00:56:12.898823 13 0 0
791 00:56:12.898879 14 0 0
792 00:56:12.898934 15 0 0
793 00:56:12.898989 16 0 0
794 00:56:12.899044 17 0 0
795 00:56:12.899100 18 0 0
796 00:56:12.899154 19 0 0
797 00:56:12.899209 20 0 0
798 00:56:12.899265 21 0 0
799 00:56:12.899321 22 0 0
800 00:56:12.899377 23 0 0
801 00:56:12.899432 24 0 ff
802 00:56:12.899488 25 0 ff
803 00:56:12.899543 26 0 ff
804 00:56:12.899598 27 0 ff
805 00:56:12.899653 28 0 ff
806 00:56:12.899711 29 0 ff
807 00:56:12.899768 30 0 ff
808 00:56:12.899823 31 ff ff
809 00:56:12.899878 32 ff ff
810 00:56:12.899935 33 ff ff
811 00:56:12.899990 34 ff ff
812 00:56:12.900045 35 ff ff
813 00:56:12.900101 36 ff ff
814 00:56:12.900156 37 ff ff
815 00:56:12.900211 pass bytecount = 0xff (0xff: all bytes pass)
816 00:56:12.900265
817 00:56:12.900320 DQS0 dly: 31
818 00:56:12.900375 DQS1 dly: 24
819 00:56:12.900428 Write Rank0 MR2 =0x2d
820 00:56:12.900482 [RankSwap] Rank num 2, (Multi 1), Rank 0
821 00:56:12.900536 Write Rank0 MR1 =0xd6
822 00:56:12.900590 [Gating]
823 00:56:12.900644 ==
824 00:56:12.900699 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
825 00:56:12.900754 fsp= 1, odt_onoff= 1, Byte mode= 0
826 00:56:12.900808 ==
827 00:56:12.900863 3 1 0 |3534 3535 |(11 11)(11 11) |(0 0)(1 1)| 0
828 00:56:12.900919 3 1 4 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
829 00:56:12.900976 3 1 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
830 00:56:12.901031 3 1 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
831 00:56:12.901087 3 1 16 |3534 3636 |(11 11)(11 11) |(1 1)(1 1)| 0
832 00:56:12.901143 3 1 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
833 00:56:12.901199 [Byte 1] Lead/lag Transition tap number (1)
834 00:56:12.901254 3 1 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
835 00:56:12.901310 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
836 00:56:12.901366 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
837 00:56:12.901421 3 2 4 |3534 3434 |(11 11)(11 11) |(0 0)(0 0)| 0
838 00:56:12.901477 3 2 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
839 00:56:12.901533 3 2 12 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
840 00:56:12.901588 3 2 16 |706 201 |(11 11)(11 11) |(1 1)(1 1)| 0
841 00:56:12.901645 3 2 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
842 00:56:12.901701 3 2 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
843 00:56:12.901757 3 2 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
844 00:56:12.901812 3 3 0 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
845 00:56:12.901868 3 3 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
846 00:56:12.901924 3 3 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
847 00:56:12.901983 3 3 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
848 00:56:12.902041 3 3 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
849 00:56:12.902097 3 3 20 |3534 201 |(11 11)(11 11) |(1 1)(1 1)| 0
850 00:56:12.902153 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
851 00:56:12.902209 [Byte 0] Lead/lag Transition tap number (1)
852 00:56:12.902264 [Byte 1] Lead/lag Transition tap number (1)
853 00:56:12.902319 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
854 00:56:12.902375 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
855 00:56:12.902432 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
856 00:56:12.902487 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
857 00:56:12.902543 3 4 12 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
858 00:56:12.902598 3 4 16 |3939 201 |(11 11)(11 11) |(1 1)(1 1)| 0
859 00:56:12.902663 3 4 20 |3d3d 6161 |(11 11)(11 11) |(1 1)(1 1)| 0
860 00:56:12.902714 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 00:56:12.902765 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 00:56:12.902815 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 00:56:12.902867 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 00:56:12.902917 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 00:56:12.902967 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 00:56:12.903017 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 00:56:12.903068 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 00:56:12.903118 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 00:56:12.903170 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 00:56:12.903221 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
871 00:56:12.903271 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
872 00:56:12.903515 [Byte 0] Lead/lag falling Transition (3, 6, 4)
873 00:56:12.903572 [Byte 1] Lead/lag falling Transition (3, 6, 4)
874 00:56:12.903623 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
875 00:56:12.903674 3 6 12 |202 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
876 00:56:12.903726 [Byte 0] Lead/lag Transition tap number (3)
877 00:56:12.903776 3 6 16 |3030 a0a |(1 1)(11 11) |(0 0)(1 0)| 0
878 00:56:12.903828 [Byte 1] Lead/lag Transition tap number (4)
879 00:56:12.903879 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 00:56:12.903931 [Byte 0]First pass (3, 6, 20)
881 00:56:12.903982 [Byte 1]First pass (3, 6, 20)
882 00:56:12.904032 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 00:56:12.904084 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 00:56:12.904135 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 00:56:12.904186 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 00:56:12.904256 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 00:56:12.904309 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 00:56:12.904360 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 00:56:12.904411 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
890 00:56:12.904463 All bytes gating window > 1UI, Early break!
891 00:56:12.904513
892 00:56:12.904562 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
893 00:56:12.904612
894 00:56:12.904663 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 12)
895 00:56:12.904712
896 00:56:12.904762
897 00:56:12.904811
898 00:56:12.904860 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
899 00:56:12.904910
900 00:56:12.904959 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
901 00:56:12.905009
902 00:56:12.905058
903 00:56:12.905106 Write Rank0 MR1 =0x56
904 00:56:12.905156
905 00:56:12.905206 best RODT dly(2T, 0.5T) = (2, 3)
906 00:56:12.905256
907 00:56:12.905305 best RODT dly(2T, 0.5T) = (2, 3)
908 00:56:12.905355 ==
909 00:56:12.905405 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
910 00:56:12.905456 fsp= 1, odt_onoff= 1, Byte mode= 0
911 00:56:12.905506 ==
912 00:56:12.905556 Start DQ dly to find pass range UseTestEngine =0
913 00:56:12.905606 x-axis: bit #, y-axis: DQ dly (-127~63)
914 00:56:12.905656 RX Vref Scan = 0
915 00:56:12.905706 -26, [0] xxxxxxxx xxxxxxxx [MSB]
916 00:56:12.905757 -25, [0] xxxxxxxx xxxxxxxx [MSB]
917 00:56:12.905809 -24, [0] xxxxxxxx xxxxxxxx [MSB]
918 00:56:12.905860 -23, [0] xxxxxxxx xxxxxxxx [MSB]
919 00:56:12.905911 -22, [0] xxxxxxxx xxxxxxxx [MSB]
920 00:56:12.905962 -21, [0] xxxxxxxx xxxxxxxx [MSB]
921 00:56:12.906023 -20, [0] xxxxxxxx xxxxxxxx [MSB]
922 00:56:12.906074 -19, [0] xxxxxxxx xxxxxxxx [MSB]
923 00:56:12.906125 -18, [0] xxxxxxxx xxxxxxxx [MSB]
924 00:56:12.906175 -17, [0] xxxxxxxx xxxxxxxx [MSB]
925 00:56:12.906227 -16, [0] xxxxxxxx xxxxxxxx [MSB]
926 00:56:12.906278 -15, [0] xxxxxxxx xxxxxxxx [MSB]
927 00:56:12.906329 -14, [0] xxxxxxxx xxxxxxxx [MSB]
928 00:56:12.906380 -13, [0] xxxxxxxx xxxxxxxx [MSB]
929 00:56:12.906430 -12, [0] xxxxxxxx xxxxxxxx [MSB]
930 00:56:12.906481 -11, [0] xxxxxxxx xxxxxxxx [MSB]
931 00:56:12.906533 -10, [0] xxxxxxxx xxxxxxxx [MSB]
932 00:56:12.906584 -9, [0] xxxxxxxx xxxxxxxx [MSB]
933 00:56:12.906635 -8, [0] xxxxxxxx xxxxxxxx [MSB]
934 00:56:12.906686 -7, [0] xxxxxxxx xxxxxxxx [MSB]
935 00:56:12.906736 -6, [0] xxxxxxxx xxxxxxxx [MSB]
936 00:56:12.906786 -5, [0] xxxxxxxx xxxxxxxx [MSB]
937 00:56:12.906837 -4, [0] xxxxxxxx xxxxxxxx [MSB]
938 00:56:12.906888 -3, [0] xxxxxxxx xxxxxxxx [MSB]
939 00:56:12.906940 -2, [0] xxxxxxxx xxxxxxxx [MSB]
940 00:56:12.906991 -1, [0] xxxxxxxx xxxxxxxx [MSB]
941 00:56:12.907042 0, [0] xxxxxxxx xxxxxxxx [MSB]
942 00:56:12.907093 1, [0] xxxxxxxx oxxxxxxx [MSB]
943 00:56:12.907144 2, [0] xxxxxxxx oxxxxxxx [MSB]
944 00:56:12.907195 3, [0] xxxoxoxx oxxoxxxx [MSB]
945 00:56:12.907246 4, [0] xxxoxoxx ooxoxxxx [MSB]
946 00:56:12.907298 5, [0] xxxoxoxx ooxoxoox [MSB]
947 00:56:12.907349 6, [0] xxxoxoxx ooxoooox [MSB]
948 00:56:12.907400 7, [0] xxxoxooo ooxooooo [MSB]
949 00:56:12.907451 8, [0] xoxoxooo ooxooooo [MSB]
950 00:56:12.907502 9, [0] ooxoxooo ooxooooo [MSB]
951 00:56:12.907553 31, [0] oooooooo oooooooo [MSB]
952 00:56:12.907604 32, [0] oooxoooo oooooooo [MSB]
953 00:56:12.907668 33, [0] oooxoooo xooooooo [MSB]
954 00:56:12.907718 34, [0] oooxoooo xooooooo [MSB]
955 00:56:12.907768 35, [0] oooxoxoo xooxoooo [MSB]
956 00:56:12.907817 36, [0] oooxoxxo xxoxxooo [MSB]
957 00:56:12.907866 37, [0] oooxoxxo xxoxxoxo [MSB]
958 00:56:12.907915 38, [0] oooxoxxo xxoxxxxo [MSB]
959 00:56:12.907965 39, [0] oxoxoxxx xxoxxxxo [MSB]
960 00:56:12.908015 40, [0] xxoxxxxx xxoxxxxo [MSB]
961 00:56:12.908065 41, [0] xxoxxxxx xxoxxxxx [MSB]
962 00:56:12.908115 42, [0] xxxxxxxx xxxxxxxx [MSB]
963 00:56:12.908165 iDelay=42, Bit 0, Center 24 (9 ~ 39) 31
964 00:56:12.908213 iDelay=42, Bit 1, Center 23 (8 ~ 38) 31
965 00:56:12.908262 iDelay=42, Bit 2, Center 25 (10 ~ 41) 32
966 00:56:12.908311 iDelay=42, Bit 3, Center 17 (3 ~ 31) 29
967 00:56:12.908360 iDelay=42, Bit 4, Center 24 (10 ~ 39) 30
968 00:56:12.908409 iDelay=42, Bit 5, Center 18 (3 ~ 34) 32
969 00:56:12.908457 iDelay=42, Bit 6, Center 21 (7 ~ 35) 29
970 00:56:12.908506 iDelay=42, Bit 7, Center 22 (7 ~ 38) 32
971 00:56:12.908554 iDelay=42, Bit 8, Center 16 (1 ~ 32) 32
972 00:56:12.908603 iDelay=42, Bit 9, Center 19 (4 ~ 35) 32
973 00:56:12.908651 iDelay=42, Bit 10, Center 25 (10 ~ 41) 32
974 00:56:12.908700 iDelay=42, Bit 11, Center 18 (3 ~ 34) 32
975 00:56:12.908750 iDelay=42, Bit 12, Center 20 (6 ~ 35) 30
976 00:56:12.908799 iDelay=42, Bit 13, Center 21 (5 ~ 37) 33
977 00:56:12.908848 iDelay=42, Bit 14, Center 20 (5 ~ 36) 32
978 00:56:12.908897 iDelay=42, Bit 15, Center 23 (7 ~ 40) 34
979 00:56:12.908945 ==
980 00:56:12.908993 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
981 00:56:12.909043 fsp= 1, odt_onoff= 1, Byte mode= 0
982 00:56:12.909091 ==
983 00:56:12.909139 DQS Delay:
984 00:56:12.909187 DQS0 = 0, DQS1 = 0
985 00:56:12.909236 DQM Delay:
986 00:56:12.909285 DQM0 = 21, DQM1 = 20
987 00:56:12.909334 DQ Delay:
988 00:56:12.909382 DQ0 =24, DQ1 =23, DQ2 =25, DQ3 =17
989 00:56:12.909431 DQ4 =24, DQ5 =18, DQ6 =21, DQ7 =22
990 00:56:12.909480 DQ8 =16, DQ9 =19, DQ10 =25, DQ11 =18
991 00:56:12.909529 DQ12 =20, DQ13 =21, DQ14 =20, DQ15 =23
992 00:56:12.909577
993 00:56:12.909626
994 00:56:12.909673 DramC Write-DBI off
995 00:56:12.909720 ==
996 00:56:12.909768 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
997 00:56:12.909817 fsp= 1, odt_onoff= 1, Byte mode= 0
998 00:56:12.909865 ==
999 00:56:12.909913 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1000 00:56:12.909962
1001 00:56:12.910218 Begin, DQ Scan Range 920~1176
1002 00:56:12.910274
1003 00:56:12.910323
1004 00:56:12.910373 TX Vref Scan disable
1005 00:56:12.910423 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1006 00:56:12.910474 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1007 00:56:12.910524 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1008 00:56:12.910575 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1009 00:56:12.910627 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1010 00:56:12.910711 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1011 00:56:12.910794 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1012 00:56:12.910846 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1013 00:56:12.910897 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1014 00:56:12.910948 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1015 00:56:12.910999 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1016 00:56:12.911050 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1017 00:56:12.911101 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1018 00:56:12.911151 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1019 00:56:12.911202 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1020 00:56:12.911251 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1021 00:56:12.911301 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1022 00:56:12.911353 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1023 00:56:12.911404 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1024 00:56:12.911454 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1025 00:56:12.911505 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1026 00:56:12.911555 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1027 00:56:12.911604 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1028 00:56:12.911654 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1029 00:56:12.911704 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1030 00:56:12.911754 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1031 00:56:12.911804 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1032 00:56:12.911854 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1033 00:56:12.911903 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1034 00:56:12.911954 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1035 00:56:12.912004 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1036 00:56:12.912053 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1037 00:56:12.912104 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1038 00:56:12.912154 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1039 00:56:12.912204 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1040 00:56:12.912253 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1041 00:56:12.912303 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1042 00:56:12.912353 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1043 00:56:12.912403 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1044 00:56:12.912452 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1045 00:56:12.912502 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1046 00:56:12.912563 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1047 00:56:12.912652 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1048 00:56:12.912707 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1049 00:56:12.912759 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1050 00:56:12.912810 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1051 00:56:12.912860 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1052 00:56:12.912910 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1053 00:56:12.912960 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1054 00:56:12.913010 969 |3 6 9|[0] xxxxxxxx ooxoooxx [MSB]
1055 00:56:12.913061 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1056 00:56:12.913111 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1057 00:56:12.913161 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1058 00:56:12.913211 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1059 00:56:12.913261 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1060 00:56:12.913311 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1061 00:56:12.913361 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1062 00:56:12.913412 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1063 00:56:12.913462 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
1064 00:56:12.913530 979 |3 6 19|[0] xxxooooo oooooooo [MSB]
1065 00:56:12.913582 988 |3 6 28|[0] oooooooo xooooooo [MSB]
1066 00:56:12.913632 989 |3 6 29|[0] oooooooo xooooooo [MSB]
1067 00:56:12.913682 990 |3 6 30|[0] oooooooo xooxoxoo [MSB]
1068 00:56:12.913742 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1069 00:56:12.913825 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1070 00:56:12.913910 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1071 00:56:12.914014 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1072 00:56:12.914098 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1073 00:56:12.914152 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1074 00:56:12.914203 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1075 00:56:12.914252 998 |3 6 38|[0] oooxxxxx xxxxxxxx [MSB]
1076 00:56:12.914302 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1077 00:56:12.914351 Byte0, DQ PI dly=987, DQM PI dly= 987
1078 00:56:12.914400 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
1079 00:56:12.914451
1080 00:56:12.914499 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
1081 00:56:12.914548
1082 00:56:12.914614 Byte1, DQ PI dly=980, DQM PI dly= 980
1083 00:56:12.914704 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1084 00:56:12.914774
1085 00:56:12.914825 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1086 00:56:12.914876
1087 00:56:12.914924 ==
1088 00:56:12.914973 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1089 00:56:12.915022 fsp= 1, odt_onoff= 1, Byte mode= 0
1090 00:56:12.915072 ==
1091 00:56:12.915120 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1092 00:56:12.915170
1093 00:56:12.915219 Begin, DQ Scan Range 956~1020
1094 00:56:12.915269 Write Rank0 MR14 =0x0
1095 00:56:12.915318
1096 00:56:12.915366 CH=0, VrefRange= 0, VrefLevel = 0
1097 00:56:12.915415 TX Bit0 (983~993) 11 988, Bit8 (971~982) 12 976,
1098 00:56:12.915465 TX Bit1 (981~993) 13 987, Bit9 (973~986) 14 979,
1099 00:56:12.915514 TX Bit2 (982~993) 12 987, Bit10 (978~988) 11 983,
1100 00:56:12.915564 TX Bit3 (978~988) 11 983, Bit11 (972~983) 12 977,
1101 00:56:12.915614 TX Bit4 (980~992) 13 986, Bit12 (972~986) 15 979,
1102 00:56:12.915664 TX Bit5 (980~990) 11 985, Bit13 (973~985) 13 979,
1103 00:56:12.915713 TX Bit6 (980~992) 13 986, Bit14 (974~987) 14 980,
1104 00:56:12.915762 TX Bit7 (980~993) 14 986, Bit15 (979~989) 11 984,
1105 00:56:12.915810
1106 00:56:12.915859 Write Rank0 MR14 =0x2
1107 00:56:12.915907
1108 00:56:12.915955 CH=0, VrefRange= 0, VrefLevel = 2
1109 00:56:12.916003 TX Bit0 (982~994) 13 988, Bit8 (970~983) 14 976,
1110 00:56:12.916244 TX Bit1 (980~994) 15 987, Bit9 (972~987) 16 979,
1111 00:56:12.916302 TX Bit2 (982~994) 13 988, Bit10 (978~989) 12 983,
1112 00:56:12.916352 TX Bit3 (978~989) 12 983, Bit11 (971~984) 14 977,
1113 00:56:12.916402 TX Bit4 (980~993) 14 986, Bit12 (972~987) 16 979,
1114 00:56:12.916450 TX Bit5 (980~991) 12 985, Bit13 (972~985) 14 978,
1115 00:56:12.916500 TX Bit6 (979~992) 14 985, Bit14 (973~988) 16 980,
1116 00:56:12.916549 TX Bit7 (980~993) 14 986, Bit15 (978~990) 13 984,
1117 00:56:12.916598
1118 00:56:12.916647 Write Rank0 MR14 =0x4
1119 00:56:12.916695
1120 00:56:12.916743 CH=0, VrefRange= 0, VrefLevel = 4
1121 00:56:12.916793 TX Bit0 (982~995) 14 988, Bit8 (969~984) 16 976,
1122 00:56:12.916843 TX Bit1 (980~995) 16 987, Bit9 (972~987) 16 979,
1123 00:56:12.916892 TX Bit2 (981~994) 14 987, Bit10 (978~990) 13 984,
1124 00:56:12.916941 TX Bit3 (978~990) 13 984, Bit11 (971~985) 15 978,
1125 00:56:12.916989 TX Bit4 (980~993) 14 986, Bit12 (972~987) 16 979,
1126 00:56:12.917039 TX Bit5 (980~992) 13 986, Bit13 (972~986) 15 979,
1127 00:56:12.917089 TX Bit6 (979~993) 15 986, Bit14 (973~988) 16 980,
1128 00:56:12.917138 TX Bit7 (980~993) 14 986, Bit15 (978~990) 13 984,
1129 00:56:12.917207
1130 00:56:12.917286 Write Rank0 MR14 =0x6
1131 00:56:12.917366
1132 00:56:12.917445 CH=0, VrefRange= 0, VrefLevel = 6
1133 00:56:12.917513 TX Bit0 (982~996) 15 989, Bit8 (969~984) 16 976,
1134 00:56:12.917565 TX Bit1 (980~995) 16 987, Bit9 (972~988) 17 980,
1135 00:56:12.917616 TX Bit2 (981~995) 15 988, Bit10 (976~990) 15 983,
1136 00:56:12.917666 TX Bit3 (978~991) 14 984, Bit11 (970~986) 17 978,
1137 00:56:12.917715 TX Bit4 (980~994) 15 987, Bit12 (971~986) 16 978,
1138 00:56:12.917764 TX Bit5 (980~992) 13 986, Bit13 (972~986) 15 979,
1139 00:56:12.917814 TX Bit6 (979~993) 15 986, Bit14 (973~989) 17 981,
1140 00:56:12.917863 TX Bit7 (980~994) 15 987, Bit15 (977~991) 15 984,
1141 00:56:12.917912
1142 00:56:12.917961 Write Rank0 MR14 =0x8
1143 00:56:12.918057
1144 00:56:12.918107 CH=0, VrefRange= 0, VrefLevel = 8
1145 00:56:12.918157 TX Bit0 (981~996) 16 988, Bit8 (968~985) 18 976,
1146 00:56:12.918207 TX Bit1 (980~996) 17 988, Bit9 (971~988) 18 979,
1147 00:56:12.918256 TX Bit2 (981~995) 15 988, Bit10 (976~991) 16 983,
1148 00:56:12.918305 TX Bit3 (977~991) 15 984, Bit11 (970~986) 17 978,
1149 00:56:12.918355 TX Bit4 (979~994) 16 986, Bit12 (971~988) 18 979,
1150 00:56:12.918404 TX Bit5 (979~993) 15 986, Bit13 (971~988) 18 979,
1151 00:56:12.918453 TX Bit6 (979~993) 15 986, Bit14 (973~990) 18 981,
1152 00:56:12.918502 TX Bit7 (979~994) 16 986, Bit15 (977~991) 15 984,
1153 00:56:12.918551
1154 00:56:12.918599 Write Rank0 MR14 =0xa
1155 00:56:12.918647
1156 00:56:12.918695 CH=0, VrefRange= 0, VrefLevel = 10
1157 00:56:12.918744 TX Bit0 (981~997) 17 989, Bit8 (968~986) 19 977,
1158 00:56:12.918794 TX Bit1 (980~996) 17 988, Bit9 (970~989) 20 979,
1159 00:56:12.918842 TX Bit2 (981~996) 16 988, Bit10 (976~991) 16 983,
1160 00:56:12.918892 TX Bit3 (977~992) 16 984, Bit11 (970~987) 18 978,
1161 00:56:12.918940 TX Bit4 (979~995) 17 987, Bit12 (970~989) 20 979,
1162 00:56:12.918989 TX Bit5 (979~993) 15 986, Bit13 (971~988) 18 979,
1163 00:56:12.919038 TX Bit6 (979~994) 16 986, Bit14 (971~990) 20 980,
1164 00:56:12.919087 TX Bit7 (980~995) 16 987, Bit15 (976~992) 17 984,
1165 00:56:12.919136
1166 00:56:12.919184 Write Rank0 MR14 =0xc
1167 00:56:12.919232
1168 00:56:12.919280 CH=0, VrefRange= 0, VrefLevel = 12
1169 00:56:12.919330 TX Bit0 (981~998) 18 989, Bit8 (968~987) 20 977,
1170 00:56:12.919380 TX Bit1 (980~997) 18 988, Bit9 (970~989) 20 979,
1171 00:56:12.919429 TX Bit2 (980~996) 17 988, Bit10 (975~992) 18 983,
1172 00:56:12.919478 TX Bit3 (977~992) 16 984, Bit11 (969~988) 20 978,
1173 00:56:12.919527 TX Bit4 (979~995) 17 987, Bit12 (970~989) 20 979,
1174 00:56:12.919576 TX Bit5 (979~993) 15 986, Bit13 (970~989) 20 979,
1175 00:56:12.919625 TX Bit6 (979~994) 16 986, Bit14 (972~990) 19 981,
1176 00:56:12.919674 TX Bit7 (980~995) 16 987, Bit15 (976~993) 18 984,
1177 00:56:12.919724
1178 00:56:12.919773 Write Rank0 MR14 =0xe
1179 00:56:12.919821
1180 00:56:12.919870 CH=0, VrefRange= 0, VrefLevel = 14
1181 00:56:12.919919 TX Bit0 (981~999) 19 990, Bit8 (968~987) 20 977,
1182 00:56:12.919968 TX Bit1 (980~998) 19 989, Bit9 (970~989) 20 979,
1183 00:56:12.920018 TX Bit2 (980~998) 19 989, Bit10 (975~992) 18 983,
1184 00:56:12.920067 TX Bit3 (977~992) 16 984, Bit11 (968~988) 21 978,
1185 00:56:12.920116 TX Bit4 (979~996) 18 987, Bit12 (969~990) 22 979,
1186 00:56:12.920165 TX Bit5 (979~994) 16 986, Bit13 (970~989) 20 979,
1187 00:56:12.920214 TX Bit6 (978~995) 18 986, Bit14 (971~991) 21 981,
1188 00:56:12.920263 TX Bit7 (979~996) 18 987, Bit15 (975~993) 19 984,
1189 00:56:12.920312
1190 00:56:12.920361 Write Rank0 MR14 =0x10
1191 00:56:12.920410
1192 00:56:12.920458 CH=0, VrefRange= 0, VrefLevel = 16
1193 00:56:12.920506 TX Bit0 (980~999) 20 989, Bit8 (968~988) 21 978,
1194 00:56:12.920556 TX Bit1 (979~998) 20 988, Bit9 (969~990) 22 979,
1195 00:56:12.920605 TX Bit2 (980~998) 19 989, Bit10 (975~993) 19 984,
1196 00:56:12.920654 TX Bit3 (976~993) 18 984, Bit11 (968~988) 21 978,
1197 00:56:12.920703 TX Bit4 (979~997) 19 988, Bit12 (969~990) 22 979,
1198 00:56:12.920752 TX Bit5 (979~994) 16 986, Bit13 (970~989) 20 979,
1199 00:56:12.920801 TX Bit6 (979~995) 17 987, Bit14 (971~991) 21 981,
1200 00:56:12.920851 TX Bit7 (979~997) 19 988, Bit15 (974~993) 20 983,
1201 00:56:12.920912
1202 00:56:12.920990 Write Rank0 MR14 =0x12
1203 00:56:12.921068
1204 00:56:12.921134 CH=0, VrefRange= 0, VrefLevel = 18
1205 00:56:12.921185 TX Bit0 (980~1000) 21 990, Bit8 (968~988) 21 978,
1206 00:56:12.921236 TX Bit1 (979~999) 21 989, Bit9 (968~990) 23 979,
1207 00:56:12.921286 TX Bit2 (980~999) 20 989, Bit10 (974~994) 21 984,
1208 00:56:12.921335 TX Bit3 (976~993) 18 984, Bit11 (968~989) 22 978,
1209 00:56:12.921385 TX Bit4 (979~998) 20 988, Bit12 (969~990) 22 979,
1210 00:56:12.921626 TX Bit5 (979~995) 17 987, Bit13 (969~990) 22 979,
1211 00:56:12.921683 TX Bit6 (979~996) 18 987, Bit14 (970~991) 22 980,
1212 00:56:12.921734 TX Bit7 (979~998) 20 988, Bit15 (975~994) 20 984,
1213 00:56:12.921783
1214 00:56:12.921832 Write Rank0 MR14 =0x14
1215 00:56:12.921881
1216 00:56:12.921930 CH=0, VrefRange= 0, VrefLevel = 20
1217 00:56:12.921979 TX Bit0 (980~1000) 21 990, Bit8 (967~989) 23 978,
1218 00:56:12.922076 TX Bit1 (979~999) 21 989, Bit9 (969~991) 23 980,
1219 00:56:12.922126 TX Bit2 (980~999) 20 989, Bit10 (974~995) 22 984,
1220 00:56:12.922176 TX Bit3 (975~993) 19 984, Bit11 (968~989) 22 978,
1221 00:56:12.922225 TX Bit4 (979~998) 20 988, Bit12 (968~991) 24 979,
1222 00:56:12.922274 TX Bit5 (978~995) 18 986, Bit13 (969~990) 22 979,
1223 00:56:12.922323 TX Bit6 (978~997) 20 987, Bit14 (970~992) 23 981,
1224 00:56:12.922372 TX Bit7 (979~998) 20 988, Bit15 (974~995) 22 984,
1225 00:56:12.922421
1226 00:56:12.922469 Write Rank0 MR14 =0x16
1227 00:56:12.922518
1228 00:56:12.922567 CH=0, VrefRange= 0, VrefLevel = 22
1229 00:56:12.922615 TX Bit0 (980~1001) 22 990, Bit8 (967~989) 23 978,
1230 00:56:12.922665 TX Bit1 (979~1000) 22 989, Bit9 (968~991) 24 979,
1231 00:56:12.922714 TX Bit2 (979~1000) 22 989, Bit10 (974~995) 22 984,
1232 00:56:12.922763 TX Bit3 (975~994) 20 984, Bit11 (968~990) 23 979,
1233 00:56:12.922811 TX Bit4 (979~998) 20 988, Bit12 (968~991) 24 979,
1234 00:56:12.922860 TX Bit5 (978~995) 18 986, Bit13 (968~991) 24 979,
1235 00:56:12.922909 TX Bit6 (978~997) 20 987, Bit14 (969~993) 25 981,
1236 00:56:12.922958 TX Bit7 (979~999) 21 989, Bit15 (974~996) 23 985,
1237 00:56:12.923006
1238 00:56:12.923055 Write Rank0 MR14 =0x18
1239 00:56:12.923103
1240 00:56:12.923151 CH=0, VrefRange= 0, VrefLevel = 24
1241 00:56:12.923200 TX Bit0 (980~1001) 22 990, Bit8 (967~989) 23 978,
1242 00:56:12.923250 TX Bit1 (979~1000) 22 989, Bit9 (968~991) 24 979,
1243 00:56:12.923298 TX Bit2 (980~1000) 21 990, Bit10 (973~996) 24 984,
1244 00:56:12.923347 TX Bit3 (974~994) 21 984, Bit11 (968~990) 23 979,
1245 00:56:12.923396 TX Bit4 (979~999) 21 989, Bit12 (968~992) 25 980,
1246 00:56:12.923445 TX Bit5 (978~996) 19 987, Bit13 (968~991) 24 979,
1247 00:56:12.923493 TX Bit6 (978~998) 21 988, Bit14 (969~994) 26 981,
1248 00:56:12.923542 TX Bit7 (979~999) 21 989, Bit15 (974~996) 23 985,
1249 00:56:12.923590
1250 00:56:12.923639 Write Rank0 MR14 =0x1a
1251 00:56:12.923688
1252 00:56:12.923768 CH=0, VrefRange= 0, VrefLevel = 26
1253 00:56:12.923854 TX Bit0 (979~1002) 24 990, Bit8 (967~990) 24 978,
1254 00:56:12.923933 TX Bit1 (978~1001) 24 989, Bit9 (968~991) 24 979,
1255 00:56:12.924010 TX Bit2 (979~1001) 23 990, Bit10 (974~996) 23 985,
1256 00:56:12.924063 TX Bit3 (974~994) 21 984, Bit11 (967~990) 24 978,
1257 00:56:12.924113 TX Bit4 (978~1000) 23 989, Bit12 (968~992) 25 980,
1258 00:56:12.924162 TX Bit5 (978~997) 20 987, Bit13 (968~991) 24 979,
1259 00:56:12.924212 TX Bit6 (978~998) 21 988, Bit14 (969~994) 26 981,
1260 00:56:12.924262 TX Bit7 (978~1000) 23 989, Bit15 (973~996) 24 984,
1261 00:56:12.924312
1262 00:56:12.924361 Write Rank0 MR14 =0x1c
1263 00:56:12.924409
1264 00:56:12.924458 CH=0, VrefRange= 0, VrefLevel = 28
1265 00:56:12.924507 TX Bit0 (979~1002) 24 990, Bit8 (966~990) 25 978,
1266 00:56:12.924556 TX Bit1 (979~1001) 23 990, Bit9 (968~991) 24 979,
1267 00:56:12.924605 TX Bit2 (979~1001) 23 990, Bit10 (973~996) 24 984,
1268 00:56:12.924655 TX Bit3 (974~995) 22 984, Bit11 (967~990) 24 978,
1269 00:56:12.924704 TX Bit4 (978~1000) 23 989, Bit12 (968~992) 25 980,
1270 00:56:12.924753 TX Bit5 (977~997) 21 987, Bit13 (968~992) 25 980,
1271 00:56:12.924803 TX Bit6 (978~998) 21 988, Bit14 (969~994) 26 981,
1272 00:56:12.924852 TX Bit7 (978~1000) 23 989, Bit15 (973~996) 24 984,
1273 00:56:12.924900
1274 00:56:12.924948 Write Rank0 MR14 =0x1e
1275 00:56:12.924997
1276 00:56:12.925045 CH=0, VrefRange= 0, VrefLevel = 30
1277 00:56:12.925094 TX Bit0 (979~1003) 25 991, Bit8 (966~989) 24 977,
1278 00:56:12.925144 TX Bit1 (978~1001) 24 989, Bit9 (968~990) 23 979,
1279 00:56:12.925193 TX Bit2 (979~1002) 24 990, Bit10 (973~996) 24 984,
1280 00:56:12.925243 TX Bit3 (973~995) 23 984, Bit11 (967~990) 24 978,
1281 00:56:12.925292 TX Bit4 (978~1001) 24 989, Bit12 (968~992) 25 980,
1282 00:56:12.925342 TX Bit5 (977~997) 21 987, Bit13 (968~992) 25 980,
1283 00:56:12.925391 TX Bit6 (977~999) 23 988, Bit14 (969~993) 25 981,
1284 00:56:12.925440 TX Bit7 (978~1001) 24 989, Bit15 (972~996) 25 984,
1285 00:56:12.925488
1286 00:56:12.925537 Write Rank0 MR14 =0x20
1287 00:56:12.925586
1288 00:56:12.925634 CH=0, VrefRange= 0, VrefLevel = 32
1289 00:56:12.925683 TX Bit0 (979~1003) 25 991, Bit8 (966~989) 24 977,
1290 00:56:12.925732 TX Bit1 (978~1001) 24 989, Bit9 (968~990) 23 979,
1291 00:56:12.925781 TX Bit2 (979~1002) 24 990, Bit10 (973~996) 24 984,
1292 00:56:12.925830 TX Bit3 (973~995) 23 984, Bit11 (967~990) 24 978,
1293 00:56:12.925879 TX Bit4 (978~1001) 24 989, Bit12 (968~992) 25 980,
1294 00:56:12.925928 TX Bit5 (977~997) 21 987, Bit13 (968~992) 25 980,
1295 00:56:12.925976 TX Bit6 (977~999) 23 988, Bit14 (969~993) 25 981,
1296 00:56:12.926069 TX Bit7 (978~1001) 24 989, Bit15 (972~996) 25 984,
1297 00:56:12.926117
1298 00:56:12.926166 Write Rank0 MR14 =0x22
1299 00:56:12.926214
1300 00:56:12.926263 CH=0, VrefRange= 0, VrefLevel = 34
1301 00:56:12.926311 TX Bit0 (979~1003) 25 991, Bit8 (966~989) 24 977,
1302 00:56:12.926360 TX Bit1 (978~1001) 24 989, Bit9 (968~990) 23 979,
1303 00:56:12.926408 TX Bit2 (979~1002) 24 990, Bit10 (973~996) 24 984,
1304 00:56:12.926456 TX Bit3 (973~995) 23 984, Bit11 (967~990) 24 978,
1305 00:56:12.926505 TX Bit4 (978~1001) 24 989, Bit12 (968~992) 25 980,
1306 00:56:12.926554 TX Bit5 (977~997) 21 987, Bit13 (968~992) 25 980,
1307 00:56:12.926603 TX Bit6 (977~999) 23 988, Bit14 (969~993) 25 981,
1308 00:56:12.926652 TX Bit7 (978~1001) 24 989, Bit15 (972~996) 25 984,
1309 00:56:12.926700
1310 00:56:12.926939 Write Rank0 MR14 =0x24
1311 00:56:12.926993
1312 00:56:12.927042 CH=0, VrefRange= 0, VrefLevel = 36
1313 00:56:12.927092 TX Bit0 (979~1003) 25 991, Bit8 (966~989) 24 977,
1314 00:56:12.927142 TX Bit1 (978~1001) 24 989, Bit9 (968~990) 23 979,
1315 00:56:12.927191 TX Bit2 (979~1002) 24 990, Bit10 (973~996) 24 984,
1316 00:56:12.927239 TX Bit3 (973~995) 23 984, Bit11 (967~990) 24 978,
1317 00:56:12.927288 TX Bit4 (978~1001) 24 989, Bit12 (968~992) 25 980,
1318 00:56:12.927337 TX Bit5 (977~997) 21 987, Bit13 (968~992) 25 980,
1319 00:56:12.927385 TX Bit6 (977~999) 23 988, Bit14 (969~993) 25 981,
1320 00:56:12.927434 TX Bit7 (978~1001) 24 989, Bit15 (972~996) 25 984,
1321 00:56:12.927483
1322 00:56:12.927530
1323 00:56:12.927576 TX Vref found, early break! 360< 363
1324 00:56:12.927625 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =833/100 ps
1325 00:56:12.927696 u1DelayCellOfst[0]=8 cells (7 PI)
1326 00:56:12.927777 u1DelayCellOfst[1]=5 cells (5 PI)
1327 00:56:12.927856 u1DelayCellOfst[2]=7 cells (6 PI)
1328 00:56:12.927937 u1DelayCellOfst[3]=0 cells (0 PI)
1329 00:56:12.927996 u1DelayCellOfst[4]=5 cells (5 PI)
1330 00:56:12.928044 u1DelayCellOfst[5]=3 cells (3 PI)
1331 00:56:12.928095 u1DelayCellOfst[6]=4 cells (4 PI)
1332 00:56:12.928143 u1DelayCellOfst[7]=5 cells (5 PI)
1333 00:56:12.928191 Byte0, DQ PI dly=984, DQM PI dly= 987
1334 00:56:12.928239 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1335 00:56:12.928288
1336 00:56:12.928336 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1337 00:56:12.928385
1338 00:56:12.928432 u1DelayCellOfst[8]=0 cells (0 PI)
1339 00:56:12.928481 u1DelayCellOfst[9]=2 cells (2 PI)
1340 00:56:12.928529 u1DelayCellOfst[10]=8 cells (7 PI)
1341 00:56:12.928578 u1DelayCellOfst[11]=1 cells (1 PI)
1342 00:56:12.928625 u1DelayCellOfst[12]=3 cells (3 PI)
1343 00:56:12.928673 u1DelayCellOfst[13]=3 cells (3 PI)
1344 00:56:12.928720 u1DelayCellOfst[14]=4 cells (4 PI)
1345 00:56:12.928769 u1DelayCellOfst[15]=8 cells (7 PI)
1346 00:56:12.928818 Byte1, DQ PI dly=977, DQM PI dly= 980
1347 00:56:12.928866 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1348 00:56:12.928915
1349 00:56:12.928963 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1350 00:56:12.929012
1351 00:56:12.929060 Write Rank0 MR14 =0x1e
1352 00:56:12.929107
1353 00:56:12.929155 Final TX Range 0 Vref 30
1354 00:56:12.929203
1355 00:56:12.929250 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1356 00:56:12.929300
1357 00:56:12.929347 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1358 00:56:12.929396 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1359 00:56:12.929445 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1360 00:56:12.929495 Write Rank0 MR3 =0xb0
1361 00:56:12.929542 DramC Write-DBI on
1362 00:56:12.929590 ==
1363 00:56:12.929638 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1364 00:56:12.929687 fsp= 1, odt_onoff= 1, Byte mode= 0
1365 00:56:12.929735 ==
1366 00:56:12.929784 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1367 00:56:12.929833
1368 00:56:12.929881 Begin, DQ Scan Range 700~764
1369 00:56:12.929929
1370 00:56:12.929976
1371 00:56:12.930071 TX Vref Scan disable
1372 00:56:12.930120 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1373 00:56:12.930169 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1374 00:56:12.930219 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1375 00:56:12.930269 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1376 00:56:12.930318 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1377 00:56:12.930367 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1378 00:56:12.930447 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1379 00:56:12.930534 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1380 00:56:12.930614 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1381 00:56:12.930693 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1382 00:56:12.930746 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1383 00:56:12.930797 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1384 00:56:12.930846 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1385 00:56:12.930896 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1386 00:56:12.930946 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1387 00:56:12.930995 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1388 00:56:12.931045 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1389 00:56:12.931094 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1390 00:56:12.931144 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1391 00:56:12.931193 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1392 00:56:12.931243 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
1393 00:56:12.931292 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
1394 00:56:12.931341 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1395 00:56:12.931390 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1396 00:56:12.931439 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1397 00:56:12.931488 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1398 00:56:12.931537 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1399 00:56:12.931587 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1400 00:56:12.931635 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1401 00:56:12.931684 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1402 00:56:12.931732 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
1403 00:56:12.931781 747 |2 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
1404 00:56:12.931829 Byte0, DQ PI dly=734, DQM PI dly= 734
1405 00:56:12.931878 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 30)
1406 00:56:12.931926
1407 00:56:12.931974 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 30)
1408 00:56:12.932023
1409 00:56:12.932072 Byte1, DQ PI dly=724, DQM PI dly= 724
1410 00:56:12.932120 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
1411 00:56:12.932168
1412 00:56:12.932215 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
1413 00:56:12.932262
1414 00:56:12.932309 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1415 00:56:12.932358 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1416 00:56:12.932407 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1417 00:56:12.932455 Write Rank0 MR3 =0x30
1418 00:56:12.932502 DramC Write-DBI off
1419 00:56:12.932549
1420 00:56:12.932596 [DATLAT]
1421 00:56:12.932643 Freq=1600, CH0 RK0, use_rxtx_scan=0
1422 00:56:12.932691
1423 00:56:12.932739 DATLAT Default: 0xf
1424 00:56:12.932786 7, 0xFFFF, sum=0
1425 00:56:12.932836 8, 0xFFFF, sum=0
1426 00:56:12.932885 9, 0xFFFF, sum=0
1427 00:56:12.932933 10, 0xFFFF, sum=0
1428 00:56:12.932982 11, 0xFFFF, sum=0
1429 00:56:12.933032 12, 0xFFFF, sum=0
1430 00:56:12.933271 13, 0xFFFF, sum=0
1431 00:56:12.933327 14, 0x0, sum=1
1432 00:56:12.933378 15, 0x0, sum=2
1433 00:56:12.933427 16, 0x0, sum=3
1434 00:56:12.933476 17, 0x0, sum=4
1435 00:56:12.933526 pattern=2 first_step=14 total pass=5 best_step=16
1436 00:56:12.933574 ==
1437 00:56:12.933623 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1438 00:56:12.933672 fsp= 1, odt_onoff= 1, Byte mode= 0
1439 00:56:12.933724 ==
1440 00:56:12.933807 Start DQ dly to find pass range UseTestEngine =1
1441 00:56:12.933885 x-axis: bit #, y-axis: DQ dly (-127~63)
1442 00:56:12.933967 RX Vref Scan = 1
1443 00:56:12.934065
1444 00:56:12.934115 RX Vref found, early break!
1445 00:56:12.934164
1446 00:56:12.934213 Final RX Vref 12, apply to both rank0 and 1
1447 00:56:12.934262 ==
1448 00:56:12.934310 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1449 00:56:12.934359 fsp= 1, odt_onoff= 1, Byte mode= 0
1450 00:56:12.934409 ==
1451 00:56:12.934458 DQS Delay:
1452 00:56:12.934506 DQS0 = 0, DQS1 = 0
1453 00:56:12.934553 DQM Delay:
1454 00:56:12.934601 DQM0 = 21, DQM1 = 20
1455 00:56:12.934648 DQ Delay:
1456 00:56:12.934697 DQ0 =23, DQ1 =23, DQ2 =24, DQ3 =17
1457 00:56:12.934746 DQ4 =24, DQ5 =19, DQ6 =20, DQ7 =23
1458 00:56:12.934794 DQ8 =17, DQ9 =18, DQ10 =25, DQ11 =18
1459 00:56:12.934842 DQ12 =20, DQ13 =19, DQ14 =21, DQ15 =23
1460 00:56:12.934890
1461 00:56:12.934938
1462 00:56:12.934985
1463 00:56:12.935032 [DramC_TX_OE_Calibration] TA2
1464 00:56:12.935080 Original DQ_B0 (3 6) =30, OEN = 27
1465 00:56:12.935129 Original DQ_B1 (3 6) =30, OEN = 27
1466 00:56:12.935178 23, 0x0, End_B0=23 End_B1=23
1467 00:56:12.935228 24, 0x0, End_B0=24 End_B1=24
1468 00:56:12.935277 25, 0x0, End_B0=25 End_B1=25
1469 00:56:12.935325 26, 0x0, End_B0=26 End_B1=26
1470 00:56:12.935374 27, 0x0, End_B0=27 End_B1=27
1471 00:56:12.935424 28, 0x0, End_B0=28 End_B1=28
1472 00:56:12.935473 29, 0x0, End_B0=29 End_B1=29
1473 00:56:12.935522 30, 0x0, End_B0=30 End_B1=30
1474 00:56:12.935571 31, 0xFFFF, End_B0=30 End_B1=30
1475 00:56:12.935621 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1476 00:56:12.935669 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1477 00:56:12.935717
1478 00:56:12.935766
1479 00:56:12.935813 Write Rank0 MR23 =0x3f
1480 00:56:12.935860 [DQSOSC]
1481 00:56:12.935908 [DQSOSCAuto] RK0, (LSB)MR18= 0xcbcb, (MSB)MR19= 0x202, tDQSOscB0 = 440 ps tDQSOscB1 = 440 ps
1482 00:56:12.935958 CH0_RK0: MR19=0x202, MR18=0xCBCB, DQSOSC=440, MR23=63, INC=12, DEC=19
1483 00:56:12.936006 Write Rank0 MR23 =0x3f
1484 00:56:12.936053 [DQSOSC]
1485 00:56:12.936101 [DQSOSCAuto] RK0, (LSB)MR18= 0xcdcd, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
1486 00:56:12.936150 CH0 RK0: MR19=202, MR18=CDCD
1487 00:56:12.936198 [RankSwap] Rank num 2, (Multi 1), Rank 1
1488 00:56:12.936246 Write Rank0 MR2 =0xad
1489 00:56:12.936293 [Write Leveling]
1490 00:56:12.936340 delay byte0 byte1 byte2 byte3
1491 00:56:12.936388
1492 00:56:12.936436 10 0 0
1493 00:56:12.936485 11 0 0
1494 00:56:12.936534 12 0 0
1495 00:56:12.936582 13 0 0
1496 00:56:12.936631 14 0 0
1497 00:56:12.936679 15 0 0
1498 00:56:12.936728 16 0 0
1499 00:56:12.936776 17 0 0
1500 00:56:12.936824 18 0 0
1501 00:56:12.936872 19 0 0
1502 00:56:12.936922 20 0 0
1503 00:56:12.936970 21 0 0
1504 00:56:12.937018 22 0 0
1505 00:56:12.937066 23 0 0
1506 00:56:12.937115 24 0 0
1507 00:56:12.937163 25 0 ff
1508 00:56:12.937211 26 0 ff
1509 00:56:12.937260 27 0 ff
1510 00:56:12.937308 28 0 ff
1511 00:56:12.937363 29 0 ff
1512 00:56:12.937448 30 0 ff
1513 00:56:12.937533 31 0 ff
1514 00:56:12.937614 32 0 ff
1515 00:56:12.937682 33 0 ff
1516 00:56:12.937734 34 ff ff
1517 00:56:12.937784 35 ff ff
1518 00:56:12.937833 36 ff ff
1519 00:56:12.937882 37 ff ff
1520 00:56:12.937931 38 ff ff
1521 00:56:12.937986 39 ff ff
1522 00:56:12.938077 40 ff ff
1523 00:56:12.938125 pass bytecount = 0xff (0xff: all bytes pass)
1524 00:56:12.938173
1525 00:56:12.938221 DQS0 dly: 34
1526 00:56:12.938269 DQS1 dly: 25
1527 00:56:12.938317 Write Rank0 MR2 =0x2d
1528 00:56:12.938365 [RankSwap] Rank num 2, (Multi 1), Rank 0
1529 00:56:12.938413 Write Rank1 MR1 =0xd6
1530 00:56:12.938461 [Gating]
1531 00:56:12.938509 ==
1532 00:56:12.938556 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1533 00:56:12.938605 fsp= 1, odt_onoff= 1, Byte mode= 0
1534 00:56:12.938654 ==
1535 00:56:12.938702 3 1 0 |3534 2a29 |(11 11)(11 11) |(0 0)(0 0)| 0
1536 00:56:12.938753 3 1 4 |3534 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
1537 00:56:12.938803 3 1 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1538 00:56:12.938852 3 1 12 |3534 202 |(11 11)(11 11) |(1 1)(0 0)| 0
1539 00:56:12.938902 3 1 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1540 00:56:12.938951 3 1 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1541 00:56:12.939001 3 1 24 |3534 1615 |(11 11)(11 11) |(0 0)(0 0)| 0
1542 00:56:12.939051 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1543 00:56:12.939100 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1544 00:56:12.939149 3 2 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1545 00:56:12.939198 3 2 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
1546 00:56:12.939247 3 2 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1547 00:56:12.939297 3 2 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1548 00:56:12.939346 3 2 20 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1549 00:56:12.939395 3 2 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1550 00:56:12.939444 3 2 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1551 00:56:12.939493 3 3 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1552 00:56:12.939543 [Byte 1] Lead/lag Transition tap number (1)
1553 00:56:12.939592 3 3 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(0 0)| 0
1554 00:56:12.939641 3 3 8 |3d3d 3d3d |(11 11)(10 10) |(1 1)(1 1)| 0
1555 00:56:12.939691 3 3 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 00:56:12.939740 3 3 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1557 00:56:12.939789 3 3 20 |504 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 00:56:12.939838 3 3 24 |807 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1559 00:56:12.939888 [Byte 0] Lead/lag Transition tap number (1)
1560 00:56:12.939936 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1561 00:56:12.939985 [Byte 1] Lead/lag Transition tap number (1)
1562 00:56:12.940033 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1563 00:56:12.940083 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1564 00:56:12.940132 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1565 00:56:12.940180 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
1566 00:56:12.940419 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1567 00:56:12.940475 3 4 20 |3d3d 3534 |(10 10)(11 11) |(1 1)(0 1)| 0
1568 00:56:12.940525 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1569 00:56:12.940575 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1570 00:56:12.940625 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1571 00:56:12.940702 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1572 00:56:12.940826 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1573 00:56:12.940907 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1574 00:56:12.940979 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1575 00:56:12.941031 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1576 00:56:12.941081 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1577 00:56:12.941131 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1578 00:56:12.941180 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1579 00:56:12.941230 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1580 00:56:12.941279 [Byte 0] Lead/lag falling Transition (3, 6, 4)
1581 00:56:12.941327 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1582 00:56:12.941377 [Byte 1] Lead/lag falling Transition (3, 6, 8)
1583 00:56:12.941425 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1584 00:56:12.941475 [Byte 0] Lead/lag Transition tap number (3)
1585 00:56:12.941523 3 6 16 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1586 00:56:12.941572 [Byte 1] Lead/lag Transition tap number (3)
1587 00:56:12.941620 3 6 20 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1588 00:56:12.941669 [Byte 0]First pass (3, 6, 20)
1589 00:56:12.941717 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1590 00:56:12.941766 [Byte 1]First pass (3, 6, 24)
1591 00:56:12.941814 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1592 00:56:12.941863 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1593 00:56:12.941911 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1594 00:56:12.941960 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1595 00:56:12.942051 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1596 00:56:12.942100 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1597 00:56:12.942150 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1598 00:56:12.942200 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1599 00:56:12.942249 All bytes gating window > 1UI, Early break!
1600 00:56:12.942297
1601 00:56:12.942345 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
1602 00:56:12.942393
1603 00:56:12.942440 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 14)
1604 00:56:12.942487
1605 00:56:12.942534
1606 00:56:12.942582
1607 00:56:12.942630 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
1608 00:56:12.942678
1609 00:56:12.942725 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
1610 00:56:12.942773
1611 00:56:12.942820
1612 00:56:12.942867 Write Rank1 MR1 =0x56
1613 00:56:12.942915
1614 00:56:12.942962 best RODT dly(2T, 0.5T) = (2, 3)
1615 00:56:12.943010
1616 00:56:12.943057 best RODT dly(2T, 0.5T) = (2, 3)
1617 00:56:12.943105 ==
1618 00:56:12.943153 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1619 00:56:12.943202 fsp= 1, odt_onoff= 1, Byte mode= 0
1620 00:56:12.943250 ==
1621 00:56:12.943298 Start DQ dly to find pass range UseTestEngine =0
1622 00:56:12.943346 x-axis: bit #, y-axis: DQ dly (-127~63)
1623 00:56:12.943394 RX Vref Scan = 0
1624 00:56:12.943442 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1625 00:56:12.943492 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1626 00:56:12.943541 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1627 00:56:12.943589 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1628 00:56:12.943638 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1629 00:56:12.943687 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1630 00:56:12.943735 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1631 00:56:12.943783 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1632 00:56:12.943832 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1633 00:56:12.943881 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1634 00:56:12.943930 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1635 00:56:12.943980 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1636 00:56:12.944030 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1637 00:56:12.944078 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1638 00:56:12.944127 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1639 00:56:12.944177 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1640 00:56:12.944226 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1641 00:56:12.944275 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1642 00:56:12.944324 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1643 00:56:12.944374 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1644 00:56:12.944423 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1645 00:56:12.944471 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1646 00:56:12.944520 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1647 00:56:12.944569 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1648 00:56:12.944618 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1649 00:56:12.944673 -1, [0] xxxxxxxx xxxxxxxx [MSB]
1650 00:56:12.944759 0, [0] xxxxxxxx xxxxxxxx [MSB]
1651 00:56:12.944844 1, [0] xxxxxxxx xxxxxxxx [MSB]
1652 00:56:12.944925 2, [0] xxxoxxxx xxxxxxxx [MSB]
1653 00:56:12.944994 3, [0] xxxoxoxx oxxoxxxx [MSB]
1654 00:56:12.945045 4, [0] xxxoxoxx oxxoxxxx [MSB]
1655 00:56:12.945095 5, [0] xxxoxoox ooxoxxxx [MSB]
1656 00:56:12.945144 6, [0] xxxoxooo ooxooxxx [MSB]
1657 00:56:12.945193 7, [0] xoxooooo ooxoooox [MSB]
1658 00:56:12.945243 8, [0] xoxooooo ooxoooox [MSB]
1659 00:56:12.945291 9, [0] oooooooo ooxoooox [MSB]
1660 00:56:12.945340 10, [0] oooooooo ooxooooo [MSB]
1661 00:56:12.945389 32, [0] oooooooo oooooooo [MSB]
1662 00:56:12.945439 33, [0] oooxoooo xooooooo [MSB]
1663 00:56:12.945487 34, [0] oooxoooo xooooooo [MSB]
1664 00:56:12.945535 35, [0] oooxoooo xxoxoooo [MSB]
1665 00:56:12.945584 36, [0] oooxooxo xxoxxooo [MSB]
1666 00:56:12.945632 37, [0] oooxoxxo xxoxxxoo [MSB]
1667 00:56:12.945681 38, [0] oooxoxxo xxoxxxxo [MSB]
1668 00:56:12.945730 39, [0] oooxoxxx xxoxxxxo [MSB]
1669 00:56:12.945779 40, [0] oxoxxxxx xxoxxxxo [MSB]
1670 00:56:12.945828 41, [0] oxxxxxxx xxoxxxxx [MSB]
1671 00:56:12.945876 42, [0] xxxxxxxx xxoxxxxx [MSB]
1672 00:56:12.945925 43, [0] xxxxxxxx xxoxxxxx [MSB]
1673 00:56:12.945974 44, [0] xxxxxxxx xxxxxxxx [MSB]
1674 00:56:12.946066 iDelay=44, Bit 0, Center 25 (9 ~ 41) 33
1675 00:56:12.946115 iDelay=44, Bit 1, Center 23 (7 ~ 39) 33
1676 00:56:12.946163 iDelay=44, Bit 2, Center 24 (9 ~ 40) 32
1677 00:56:12.946211 iDelay=44, Bit 3, Center 17 (2 ~ 32) 31
1678 00:56:12.946258 iDelay=44, Bit 4, Center 23 (7 ~ 39) 33
1679 00:56:12.946306 iDelay=44, Bit 5, Center 19 (3 ~ 36) 34
1680 00:56:12.946354 iDelay=44, Bit 6, Center 20 (5 ~ 35) 31
1681 00:56:12.946402 iDelay=44, Bit 7, Center 22 (6 ~ 38) 33
1682 00:56:12.946637 iDelay=44, Bit 8, Center 17 (3 ~ 32) 30
1683 00:56:12.946691 iDelay=44, Bit 9, Center 19 (5 ~ 34) 30
1684 00:56:12.946740 iDelay=44, Bit 10, Center 27 (11 ~ 43) 33
1685 00:56:12.946832 iDelay=44, Bit 11, Center 18 (3 ~ 34) 32
1686 00:56:12.946902 iDelay=44, Bit 12, Center 20 (6 ~ 35) 30
1687 00:56:12.946951 iDelay=44, Bit 13, Center 21 (7 ~ 36) 30
1688 00:56:12.947000 iDelay=44, Bit 14, Center 22 (7 ~ 37) 31
1689 00:56:12.947048 iDelay=44, Bit 15, Center 25 (10 ~ 40) 31
1690 00:56:12.947097 ==
1691 00:56:12.947145 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1692 00:56:12.947194 fsp= 1, odt_onoff= 1, Byte mode= 0
1693 00:56:12.947245 ==
1694 00:56:12.947333 DQS Delay:
1695 00:56:12.947396 DQS0 = 0, DQS1 = 0
1696 00:56:12.947445 DQM Delay:
1697 00:56:12.947493 DQM0 = 21, DQM1 = 21
1698 00:56:12.947542 DQ Delay:
1699 00:56:12.947590 DQ0 =25, DQ1 =23, DQ2 =24, DQ3 =17
1700 00:56:12.947639 DQ4 =23, DQ5 =19, DQ6 =20, DQ7 =22
1701 00:56:12.947687 DQ8 =17, DQ9 =19, DQ10 =27, DQ11 =18
1702 00:56:12.947736 DQ12 =20, DQ13 =21, DQ14 =22, DQ15 =25
1703 00:56:12.947784
1704 00:56:12.947833
1705 00:56:12.947880 DramC Write-DBI off
1706 00:56:12.947928 ==
1707 00:56:12.947977 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1708 00:56:12.948025 fsp= 1, odt_onoff= 1, Byte mode= 0
1709 00:56:12.948074 ==
1710 00:56:12.948123 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1711 00:56:12.948171
1712 00:56:12.948219 Begin, DQ Scan Range 921~1177
1713 00:56:12.948267
1714 00:56:12.948314
1715 00:56:12.948361 TX Vref Scan disable
1716 00:56:12.948409 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1717 00:56:12.948459 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1718 00:56:12.948509 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1719 00:56:12.948558 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1720 00:56:12.948608 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1721 00:56:12.948656 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1722 00:56:12.948706 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1723 00:56:12.948756 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1724 00:56:12.948805 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1725 00:56:12.948854 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1726 00:56:12.948910 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1727 00:56:12.948959 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1728 00:56:12.949008 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1729 00:56:12.949057 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1730 00:56:12.949106 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1731 00:56:12.949155 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1732 00:56:12.949205 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1733 00:56:12.949254 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1734 00:56:12.949303 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1735 00:56:12.949352 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1736 00:56:12.949401 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1737 00:56:12.949449 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1738 00:56:12.949499 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1739 00:56:12.949547 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1740 00:56:12.949596 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1741 00:56:12.949645 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1742 00:56:12.949694 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1743 00:56:12.949743 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1744 00:56:12.949791 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1745 00:56:12.949840 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1746 00:56:12.949890 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1747 00:56:12.949938 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1748 00:56:12.950019 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1749 00:56:12.950085 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1750 00:56:12.950135 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1751 00:56:12.950184 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1752 00:56:12.950233 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1753 00:56:12.950282 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1754 00:56:12.950331 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1755 00:56:12.950380 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1756 00:56:12.950429 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1757 00:56:12.950479 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1758 00:56:12.950528 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1759 00:56:12.950577 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1760 00:56:12.950625 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1761 00:56:12.950674 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1762 00:56:12.950723 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1763 00:56:12.950772 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1764 00:56:12.950821 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1765 00:56:12.950871 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
1766 00:56:12.950920 971 |3 6 11|[0] xxxxxxxx oxxoxxxx [MSB]
1767 00:56:12.950970 972 |3 6 12|[0] xxxxxxxx ooxoxxxx [MSB]
1768 00:56:12.951019 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1769 00:56:12.951068 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1770 00:56:12.951117 975 |3 6 15|[0] xxxxxxxx ooxoooox [MSB]
1771 00:56:12.951167 976 |3 6 16|[0] xxxxxxxx ooooooox [MSB]
1772 00:56:12.951216 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1773 00:56:12.951266 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
1774 00:56:12.951315 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
1775 00:56:12.951364 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
1776 00:56:12.951413 981 |3 6 21|[0] xxxoxoox oooooooo [MSB]
1777 00:56:12.951462 982 |3 6 22|[0] xxxoxoox oooooooo [MSB]
1778 00:56:12.951511 983 |3 6 23|[0] xxxoooox oooooooo [MSB]
1779 00:56:12.951560 984 |3 6 24|[0] xooooooo oooooooo [MSB]
1780 00:56:12.951609 990 |3 6 30|[0] oooooooo xooxoooo [MSB]
1781 00:56:12.951658 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1782 00:56:12.951707 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1783 00:56:12.951756 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1784 00:56:12.951804 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1785 00:56:12.951854 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
1786 00:56:12.951903 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1787 00:56:12.951953 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
1788 00:56:12.952001 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
1789 00:56:12.952051 999 |3 6 39|[0] oooxoxoo xxxxxxxx [MSB]
1790 00:56:12.952099 1000 |3 6 40|[0] oooxoxoo xxxxxxxx [MSB]
1791 00:56:12.952148 1001 |3 6 41|[0] oooxoxoo xxxxxxxx [MSB]
1792 00:56:12.952196 1002 |3 6 42|[0] xxoxxxxx xxxxxxxx [MSB]
1793 00:56:12.952246 1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
1794 00:56:12.952484 Byte0, DQ PI dly=990, DQM PI dly= 990
1795 00:56:12.952540 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
1796 00:56:12.952590
1797 00:56:12.952638 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
1798 00:56:12.952688
1799 00:56:12.952736 Byte1, DQ PI dly=981, DQM PI dly= 981
1800 00:56:12.952786 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1801 00:56:12.952835
1802 00:56:12.952882 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1803 00:56:12.952932
1804 00:56:12.952979 ==
1805 00:56:12.953026 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1806 00:56:12.953075 fsp= 1, odt_onoff= 1, Byte mode= 0
1807 00:56:12.953124 ==
1808 00:56:12.953172 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1809 00:56:12.953220
1810 00:56:12.953268 Begin, DQ Scan Range 957~1021
1811 00:56:12.953316 Write Rank1 MR14 =0x0
1812 00:56:12.953364
1813 00:56:12.953411 CH=0, VrefRange= 0, VrefLevel = 0
1814 00:56:12.953460 TX Bit0 (987~999) 13 993, Bit8 (973~984) 12 978,
1815 00:56:12.953508 TX Bit1 (986~997) 12 991, Bit9 (974~988) 15 981,
1816 00:56:12.953556 TX Bit2 (986~998) 13 992, Bit10 (980~992) 13 986,
1817 00:56:12.953605 TX Bit3 (981~988) 8 984, Bit11 (974~984) 11 979,
1818 00:56:12.953654 TX Bit4 (985~997) 13 991, Bit12 (975~987) 13 981,
1819 00:56:12.953702 TX Bit5 (983~994) 12 988, Bit13 (975~987) 13 981,
1820 00:56:12.953750 TX Bit6 (984~995) 12 989, Bit14 (976~989) 14 982,
1821 00:56:12.953799 TX Bit7 (986~995) 10 990, Bit15 (979~991) 13 985,
1822 00:56:12.953846
1823 00:56:12.953893 Write Rank1 MR14 =0x2
1824 00:56:12.953940
1825 00:56:12.953993 CH=0, VrefRange= 0, VrefLevel = 2
1826 00:56:12.954079 TX Bit0 (986~1000) 15 993, Bit8 (972~985) 14 978,
1827 00:56:12.954129 TX Bit1 (986~997) 12 991, Bit9 (974~988) 15 981,
1828 00:56:12.954177 TX Bit2 (986~999) 14 992, Bit10 (979~994) 16 986,
1829 00:56:12.954226 TX Bit3 (980~991) 12 985, Bit11 (973~985) 13 979,
1830 00:56:12.954275 TX Bit4 (985~998) 14 991, Bit12 (975~988) 14 981,
1831 00:56:12.954323 TX Bit5 (983~994) 12 988, Bit13 (975~988) 14 981,
1832 00:56:12.954372 TX Bit6 (983~995) 13 989, Bit14 (975~989) 15 982,
1833 00:56:12.954420 TX Bit7 (986~996) 11 991, Bit15 (979~992) 14 985,
1834 00:56:12.954468
1835 00:56:12.954515 Write Rank1 MR14 =0x4
1836 00:56:12.954563
1837 00:56:12.954611 CH=0, VrefRange= 0, VrefLevel = 4
1838 00:56:12.954660 TX Bit0 (986~1001) 16 993, Bit8 (972~986) 15 979,
1839 00:56:12.954709 TX Bit1 (986~998) 13 992, Bit9 (974~989) 16 981,
1840 00:56:12.954758 TX Bit2 (986~1000) 15 993, Bit10 (979~994) 16 986,
1841 00:56:12.954807 TX Bit3 (980~992) 13 986, Bit11 (973~986) 14 979,
1842 00:56:12.954855 TX Bit4 (985~999) 15 992, Bit12 (974~988) 15 981,
1843 00:56:12.954903 TX Bit5 (983~995) 13 989, Bit13 (975~989) 15 982,
1844 00:56:12.954951 TX Bit6 (983~996) 14 989, Bit14 (975~990) 16 982,
1845 00:56:12.955000 TX Bit7 (986~997) 12 991, Bit15 (979~993) 15 986,
1846 00:56:12.955048
1847 00:56:12.955095 Write Rank1 MR14 =0x6
1848 00:56:12.955143
1849 00:56:12.955191 CH=0, VrefRange= 0, VrefLevel = 6
1850 00:56:12.955239 TX Bit0 (986~1001) 16 993, Bit8 (971~987) 17 979,
1851 00:56:12.955288 TX Bit1 (985~999) 15 992, Bit9 (973~989) 17 981,
1852 00:56:12.955336 TX Bit2 (986~1000) 15 993, Bit10 (978~995) 18 986,
1853 00:56:12.955385 TX Bit3 (980~993) 14 986, Bit11 (973~987) 15 980,
1854 00:56:12.955435 TX Bit4 (984~1000) 17 992, Bit12 (974~989) 16 981,
1855 00:56:12.955484 TX Bit5 (982~995) 14 988, Bit13 (974~989) 16 981,
1856 00:56:12.955532 TX Bit6 (982~996) 15 989, Bit14 (975~991) 17 983,
1857 00:56:12.955581 TX Bit7 (985~997) 13 991, Bit15 (978~994) 17 986,
1858 00:56:12.955629
1859 00:56:12.955676 Write Rank1 MR14 =0x8
1860 00:56:12.955723
1861 00:56:12.955770 CH=0, VrefRange= 0, VrefLevel = 8
1862 00:56:12.955818 TX Bit0 (986~1002) 17 994, Bit8 (971~987) 17 979,
1863 00:56:12.955867 TX Bit1 (985~1000) 16 992, Bit9 (973~989) 17 981,
1864 00:56:12.955915 TX Bit2 (986~1001) 16 993, Bit10 (978~995) 18 986,
1865 00:56:12.955964 TX Bit3 (980~993) 14 986, Bit11 (972~987) 16 979,
1866 00:56:12.956013 TX Bit4 (984~1000) 17 992, Bit12 (974~989) 16 981,
1867 00:56:12.956061 TX Bit5 (981~996) 16 988, Bit13 (974~989) 16 981,
1868 00:56:12.956109 TX Bit6 (982~998) 17 990, Bit14 (975~991) 17 983,
1869 00:56:12.956157 TX Bit7 (985~998) 14 991, Bit15 (978~995) 18 986,
1870 00:56:12.956205
1871 00:56:12.956252 Write Rank1 MR14 =0xa
1872 00:56:12.956300
1873 00:56:12.956348 CH=0, VrefRange= 0, VrefLevel = 10
1874 00:56:12.956396 TX Bit0 (986~1003) 18 994, Bit8 (970~988) 19 979,
1875 00:56:12.956445 TX Bit1 (984~1001) 18 992, Bit9 (973~990) 18 981,
1876 00:56:12.956494 TX Bit2 (986~1002) 17 994, Bit10 (977~995) 19 986,
1877 00:56:12.956543 TX Bit3 (980~994) 15 987, Bit11 (972~988) 17 980,
1878 00:56:12.956591 TX Bit4 (983~1001) 19 992, Bit12 (974~989) 16 981,
1879 00:56:12.956640 TX Bit5 (981~996) 16 988, Bit13 (974~990) 17 982,
1880 00:56:12.956689 TX Bit6 (981~998) 18 989, Bit14 (974~992) 19 983,
1881 00:56:12.956738 TX Bit7 (985~999) 15 992, Bit15 (977~995) 19 986,
1882 00:56:12.956786
1883 00:56:12.956834 Write Rank1 MR14 =0xc
1884 00:56:12.956882
1885 00:56:12.956929 CH=0, VrefRange= 0, VrefLevel = 12
1886 00:56:12.956977 TX Bit0 (986~1003) 18 994, Bit8 (970~988) 19 979,
1887 00:56:12.957026 TX Bit1 (984~1001) 18 992, Bit9 (973~991) 19 982,
1888 00:56:12.957074 TX Bit2 (985~1002) 18 993, Bit10 (977~996) 20 986,
1889 00:56:12.957122 TX Bit3 (979~994) 16 986, Bit11 (971~988) 18 979,
1890 00:56:12.957171 TX Bit4 (983~1001) 19 992, Bit12 (973~990) 18 981,
1891 00:56:12.957220 TX Bit5 (981~997) 17 989, Bit13 (974~991) 18 982,
1892 00:56:12.957268 TX Bit6 (981~999) 19 990, Bit14 (974~993) 20 983,
1893 00:56:12.957317 TX Bit7 (985~999) 15 992, Bit15 (977~995) 19 986,
1894 00:56:12.957365
1895 00:56:12.957413 Write Rank1 MR14 =0xe
1896 00:56:12.957460
1897 00:56:12.957508 CH=0, VrefRange= 0, VrefLevel = 14
1898 00:56:12.957556 TX Bit0 (985~1004) 20 994, Bit8 (970~988) 19 979,
1899 00:56:12.957604 TX Bit1 (984~1002) 19 993, Bit9 (972~991) 20 981,
1900 00:56:12.957839 TX Bit2 (985~1002) 18 993, Bit10 (977~996) 20 986,
1901 00:56:12.957894 TX Bit3 (979~994) 16 986, Bit11 (971~989) 19 980,
1902 00:56:12.957944 TX Bit4 (983~1002) 20 992, Bit12 (973~990) 18 981,
1903 00:56:12.958029 TX Bit5 (980~997) 18 988, Bit13 (973~991) 19 982,
1904 00:56:12.958094 TX Bit6 (981~1000) 20 990, Bit14 (974~994) 21 984,
1905 00:56:12.958143 TX Bit7 (984~1000) 17 992, Bit15 (976~995) 20 985,
1906 00:56:12.958191
1907 00:56:12.958239 Write Rank1 MR14 =0x10
1908 00:56:12.958287
1909 00:56:12.958334 CH=0, VrefRange= 0, VrefLevel = 16
1910 00:56:12.958383 TX Bit0 (985~1005) 21 995, Bit8 (969~989) 21 979,
1911 00:56:13.111292 TX Bit1 (983~1002) 20 992, Bit9 (971~992) 22 981,
1912 00:56:13.111405 TX Bit2 (985~1003) 19 994, Bit10 (977~996) 20 986,
1913 00:56:13.111466 TX Bit3 (979~995) 17 987, Bit11 (971~989) 19 980,
1914 00:56:13.111522 TX Bit4 (982~1003) 22 992, Bit12 (972~991) 20 981,
1915 00:56:13.111575 TX Bit5 (980~998) 19 989, Bit13 (973~992) 20 982,
1916 00:56:13.111627 TX Bit6 (981~1000) 20 990, Bit14 (973~994) 22 983,
1917 00:56:13.111678 TX Bit7 (984~1001) 18 992, Bit15 (976~996) 21 986,
1918 00:56:13.111727
1919 00:56:13.111797 Write Rank1 MR14 =0x12
1920 00:56:13.111849
1921 00:56:13.111899 CH=0, VrefRange= 0, VrefLevel = 18
1922 00:56:13.111949 TX Bit0 (985~1005) 21 995, Bit8 (969~989) 21 979,
1923 00:56:13.111998 TX Bit1 (983~1003) 21 993, Bit9 (971~992) 22 981,
1924 00:56:13.112048 TX Bit2 (985~1004) 20 994, Bit10 (976~997) 22 986,
1925 00:56:13.112097 TX Bit3 (979~995) 17 987, Bit11 (970~989) 20 979,
1926 00:56:13.112146 TX Bit4 (982~1003) 22 992, Bit12 (973~992) 20 982,
1927 00:56:13.112196 TX Bit5 (980~998) 19 989, Bit13 (972~993) 22 982,
1928 00:56:13.112245 TX Bit6 (980~1001) 22 990, Bit14 (973~995) 23 984,
1929 00:56:13.112293 TX Bit7 (984~1002) 19 993, Bit15 (976~996) 21 986,
1930 00:56:13.112342
1931 00:56:13.112390 Write Rank1 MR14 =0x14
1932 00:56:13.112438
1933 00:56:13.112487 CH=0, VrefRange= 0, VrefLevel = 20
1934 00:56:13.112537 TX Bit0 (985~1006) 22 995, Bit8 (968~990) 23 979,
1935 00:56:13.112587 TX Bit1 (984~1003) 20 993, Bit9 (971~993) 23 982,
1936 00:56:13.112636 TX Bit2 (984~1005) 22 994, Bit10 (976~997) 22 986,
1937 00:56:13.112686 TX Bit3 (979~996) 18 987, Bit11 (969~990) 22 979,
1938 00:56:13.112734 TX Bit4 (982~1004) 23 993, Bit12 (972~993) 22 982,
1939 00:56:13.112783 TX Bit5 (980~999) 20 989, Bit13 (972~993) 22 982,
1940 00:56:13.112832 TX Bit6 (980~1001) 22 990, Bit14 (973~995) 23 984,
1941 00:56:13.112881 TX Bit7 (983~1002) 20 992, Bit15 (976~996) 21 986,
1942 00:56:13.112929
1943 00:56:13.112976 Write Rank1 MR14 =0x16
1944 00:56:13.113024
1945 00:56:13.113071 CH=0, VrefRange= 0, VrefLevel = 22
1946 00:56:13.113118 TX Bit0 (984~1007) 24 995, Bit8 (968~991) 24 979,
1947 00:56:13.113167 TX Bit1 (982~1004) 23 993, Bit9 (970~994) 25 982,
1948 00:56:13.113249 TX Bit2 (984~1006) 23 995, Bit10 (976~997) 22 986,
1949 00:56:13.113324 TX Bit3 (979~996) 18 987, Bit11 (969~990) 22 979,
1950 00:56:13.113376 TX Bit4 (981~1004) 24 992, Bit12 (972~993) 22 982,
1951 00:56:13.113425 TX Bit5 (980~1000) 21 990, Bit13 (972~993) 22 982,
1952 00:56:13.113473 TX Bit6 (980~1002) 23 991, Bit14 (972~995) 24 983,
1953 00:56:13.113522 TX Bit7 (983~1003) 21 993, Bit15 (975~997) 23 986,
1954 00:56:13.113571
1955 00:56:13.113619 Write Rank1 MR14 =0x18
1956 00:56:13.113666
1957 00:56:13.113714 CH=0, VrefRange= 0, VrefLevel = 24
1958 00:56:13.113763 TX Bit0 (984~1007) 24 995, Bit8 (968~991) 24 979,
1959 00:56:13.113812 TX Bit1 (982~1005) 24 993, Bit9 (969~994) 26 981,
1960 00:56:13.113892 TX Bit2 (983~1006) 24 994, Bit10 (975~998) 24 986,
1961 00:56:13.113971 TX Bit3 (979~997) 19 988, Bit11 (969~991) 23 980,
1962 00:56:13.114068 TX Bit4 (981~1005) 25 993, Bit12 (971~994) 24 982,
1963 00:56:13.114118 TX Bit5 (979~1001) 23 990, Bit13 (971~994) 24 982,
1964 00:56:13.114168 TX Bit6 (980~1002) 23 991, Bit14 (972~996) 25 984,
1965 00:56:13.114216 TX Bit7 (982~1004) 23 993, Bit15 (975~997) 23 986,
1966 00:56:13.114265
1967 00:56:13.114316 Write Rank1 MR14 =0x1a
1968 00:56:13.114412
1969 00:56:13.114462 CH=0, VrefRange= 0, VrefLevel = 26
1970 00:56:13.114512 TX Bit0 (983~1007) 25 995, Bit8 (968~992) 25 980,
1971 00:56:13.114562 TX Bit1 (982~1005) 24 993, Bit9 (970~995) 26 982,
1972 00:56:13.114611 TX Bit2 (984~1006) 23 995, Bit10 (975~998) 24 986,
1973 00:56:13.114660 TX Bit3 (978~997) 20 987, Bit11 (969~992) 24 980,
1974 00:56:13.114709 TX Bit4 (981~1005) 25 993, Bit12 (971~995) 25 983,
1975 00:56:13.114758 TX Bit5 (979~1001) 23 990, Bit13 (972~995) 24 983,
1976 00:56:13.114807 TX Bit6 (980~1003) 24 991, Bit14 (971~996) 26 983,
1977 00:56:13.114856 TX Bit7 (982~1004) 23 993, Bit15 (975~997) 23 986,
1978 00:56:13.114905
1979 00:56:13.114953 Write Rank1 MR14 =0x1c
1980 00:56:13.115001
1981 00:56:13.115050 CH=0, VrefRange= 0, VrefLevel = 28
1982 00:56:13.115098 TX Bit0 (983~1008) 26 995, Bit8 (968~992) 25 980,
1983 00:56:13.115148 TX Bit1 (982~1006) 25 994, Bit9 (970~994) 25 982,
1984 00:56:13.115196 TX Bit2 (983~1007) 25 995, Bit10 (975~998) 24 986,
1985 00:56:13.115244 TX Bit3 (978~997) 20 987, Bit11 (969~992) 24 980,
1986 00:56:13.115292 TX Bit4 (981~1006) 26 993, Bit12 (970~995) 26 982,
1987 00:56:13.115373 TX Bit5 (979~1002) 24 990, Bit13 (971~994) 24 982,
1988 00:56:13.115422 TX Bit6 (980~1003) 24 991, Bit14 (972~996) 25 984,
1989 00:56:13.115471 TX Bit7 (982~1005) 24 993, Bit15 (975~997) 23 986,
1990 00:56:13.115564
1991 00:56:13.115651 Write Rank1 MR14 =0x1e
1992 00:56:13.115704
1993 00:56:13.115754 CH=0, VrefRange= 0, VrefLevel = 30
1994 00:56:13.115803 TX Bit0 (983~1008) 26 995, Bit8 (968~992) 25 980,
1995 00:56:13.115853 TX Bit1 (981~1006) 26 993, Bit9 (970~994) 25 982,
1996 00:56:13.115901 TX Bit2 (983~1007) 25 995, Bit10 (975~998) 24 986,
1997 00:56:13.115972 TX Bit3 (978~998) 21 988, Bit11 (968~993) 26 980,
1998 00:56:13.116024 TX Bit4 (981~1006) 26 993, Bit12 (970~995) 26 982,
1999 00:56:13.116270 TX Bit5 (979~1002) 24 990, Bit13 (970~994) 25 982,
2000 00:56:13.116325 TX Bit6 (980~1003) 24 991, Bit14 (971~996) 26 983,
2001 00:56:13.116375 TX Bit7 (982~1005) 24 993, Bit15 (974~998) 25 986,
2002 00:56:13.116423
2003 00:56:13.116472 Write Rank1 MR14 =0x20
2004 00:56:13.116520
2005 00:56:13.116568 CH=0, VrefRange= 0, VrefLevel = 32
2006 00:56:13.116616 TX Bit0 (983~1007) 25 995, Bit8 (968~991) 24 979,
2007 00:56:13.116665 TX Bit1 (982~1005) 24 993, Bit9 (971~993) 23 982,
2008 00:56:13.116714 TX Bit2 (983~1006) 24 994, Bit10 (975~997) 23 986,
2009 00:56:13.116763 TX Bit3 (978~999) 22 988, Bit11 (969~992) 24 980,
2010 00:56:13.116812 TX Bit4 (982~1006) 25 994, Bit12 (971~994) 24 982,
2011 00:56:13.116861 TX Bit5 (979~1002) 24 990, Bit13 (970~994) 25 982,
2012 00:56:13.116909 TX Bit6 (980~1003) 24 991, Bit14 (972~996) 25 984,
2013 00:56:13.116958 TX Bit7 (981~1006) 26 993, Bit15 (974~997) 24 985,
2014 00:56:13.117006
2015 00:56:13.117054 Write Rank1 MR14 =0x22
2016 00:56:13.117102
2017 00:56:13.117150 CH=0, VrefRange= 0, VrefLevel = 34
2018 00:56:13.117199 TX Bit0 (983~1007) 25 995, Bit8 (968~991) 24 979,
2019 00:56:13.117249 TX Bit1 (982~1005) 24 993, Bit9 (971~993) 23 982,
2020 00:56:13.117297 TX Bit2 (983~1006) 24 994, Bit10 (975~997) 23 986,
2021 00:56:13.117346 TX Bit3 (978~999) 22 988, Bit11 (969~992) 24 980,
2022 00:56:13.117395 TX Bit4 (982~1006) 25 994, Bit12 (971~994) 24 982,
2023 00:56:13.117444 TX Bit5 (979~1002) 24 990, Bit13 (970~994) 25 982,
2024 00:56:13.117492 TX Bit6 (980~1003) 24 991, Bit14 (972~996) 25 984,
2025 00:56:13.117541 TX Bit7 (981~1006) 26 993, Bit15 (974~997) 24 985,
2026 00:56:13.117589
2027 00:56:13.117637 Write Rank1 MR14 =0x24
2028 00:56:13.117685
2029 00:56:13.117733 CH=0, VrefRange= 0, VrefLevel = 36
2030 00:56:13.117870 TX Bit0 (983~1007) 25 995, Bit8 (968~991) 24 979,
2031 00:56:13.117952 TX Bit1 (982~1005) 24 993, Bit9 (971~993) 23 982,
2032 00:56:13.118039 TX Bit2 (983~1006) 24 994, Bit10 (975~997) 23 986,
2033 00:56:13.118090 TX Bit3 (978~999) 22 988, Bit11 (969~992) 24 980,
2034 00:56:13.118140 TX Bit4 (982~1006) 25 994, Bit12 (971~994) 24 982,
2035 00:56:13.118190 TX Bit5 (979~1002) 24 990, Bit13 (970~994) 25 982,
2036 00:56:13.118239 TX Bit6 (980~1003) 24 991, Bit14 (972~996) 25 984,
2037 00:56:13.118289 TX Bit7 (981~1006) 26 993, Bit15 (974~997) 24 985,
2038 00:56:13.118339
2039 00:56:13.118387
2040 00:56:13.118436 TX Vref found, early break! 359< 366
2041 00:56:13.118485 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =833/100 ps
2042 00:56:13.118534 u1DelayCellOfst[0]=8 cells (7 PI)
2043 00:56:13.118583 u1DelayCellOfst[1]=5 cells (5 PI)
2044 00:56:13.118632 u1DelayCellOfst[2]=7 cells (6 PI)
2045 00:56:13.118684 u1DelayCellOfst[3]=0 cells (0 PI)
2046 00:56:13.118733 u1DelayCellOfst[4]=7 cells (6 PI)
2047 00:56:13.118783 u1DelayCellOfst[5]=2 cells (2 PI)
2048 00:56:13.118832 u1DelayCellOfst[6]=3 cells (3 PI)
2049 00:56:13.118881 u1DelayCellOfst[7]=5 cells (5 PI)
2050 00:56:13.118929 Byte0, DQ PI dly=988, DQM PI dly= 991
2051 00:56:13.118977 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2052 00:56:13.119026
2053 00:56:13.119074 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2054 00:56:13.119124
2055 00:56:13.119173 u1DelayCellOfst[8]=0 cells (0 PI)
2056 00:56:13.119221 u1DelayCellOfst[9]=3 cells (3 PI)
2057 00:56:13.119270 u1DelayCellOfst[10]=8 cells (7 PI)
2058 00:56:13.119318 u1DelayCellOfst[11]=1 cells (1 PI)
2059 00:56:13.119367 u1DelayCellOfst[12]=3 cells (3 PI)
2060 00:56:13.119437 u1DelayCellOfst[13]=3 cells (3 PI)
2061 00:56:13.119518 u1DelayCellOfst[14]=5 cells (5 PI)
2062 00:56:13.119633 u1DelayCellOfst[15]=7 cells (6 PI)
2063 00:56:13.119684 Byte1, DQ PI dly=979, DQM PI dly= 982
2064 00:56:13.119733 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2065 00:56:13.119783
2066 00:56:13.119832 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2067 00:56:13.119881
2068 00:56:13.119930 Write Rank1 MR14 =0x20
2069 00:56:13.119978
2070 00:56:13.120026 Final TX Range 0 Vref 32
2071 00:56:13.120074
2072 00:56:13.120121 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2073 00:56:13.120171
2074 00:56:13.120220 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2075 00:56:13.120269 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2076 00:56:13.120319 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2077 00:56:13.120368 Write Rank1 MR3 =0xb0
2078 00:56:13.120416 DramC Write-DBI on
2079 00:56:13.120464 ==
2080 00:56:13.120512 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2081 00:56:13.120562 fsp= 1, odt_onoff= 1, Byte mode= 0
2082 00:56:13.120610 ==
2083 00:56:13.120658 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2084 00:56:13.120707
2085 00:56:13.120754 Begin, DQ Scan Range 702~766
2086 00:56:13.120802
2087 00:56:13.120851
2088 00:56:13.120900 TX Vref Scan disable
2089 00:56:13.120967 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2090 00:56:13.121019 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2091 00:56:13.121069 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2092 00:56:13.121120 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2093 00:56:13.121170 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2094 00:56:13.121220 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2095 00:56:13.121269 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2096 00:56:13.121318 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2097 00:56:13.121368 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2098 00:56:13.121418 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2099 00:56:13.121468 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2100 00:56:13.121517 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2101 00:56:13.121567 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2102 00:56:13.121617 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2103 00:56:13.121667 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2104 00:56:13.121717 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2105 00:56:13.121766 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2106 00:56:13.121817 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2107 00:56:13.121866 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2108 00:56:13.121915 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2109 00:56:13.121965 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2110 00:56:13.122057 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2111 00:56:13.122298 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2112 00:56:13.122354 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2113 00:56:13.122405 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2114 00:56:13.122455 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2115 00:56:13.122506 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2116 00:56:13.122555 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2117 00:56:13.122605 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2118 00:56:13.122655 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2119 00:56:13.122705 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2120 00:56:13.122755 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2121 00:56:13.122805 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2122 00:56:13.122854 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
2123 00:56:13.122904 752 |2 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
2124 00:56:13.122954 Byte0, DQ PI dly=738, DQM PI dly= 738
2125 00:56:13.123002 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 34)
2126 00:56:13.123051
2127 00:56:13.123100 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 34)
2128 00:56:13.123149
2129 00:56:13.123197 Byte1, DQ PI dly=727, DQM PI dly= 727
2130 00:56:13.123247 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
2131 00:56:13.123325
2132 00:56:13.123393 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
2133 00:56:13.123443
2134 00:56:13.123493 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2135 00:56:13.123542 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2136 00:56:13.123624 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2137 00:56:13.123690 Write Rank1 MR3 =0x30
2138 00:56:13.123754 DramC Write-DBI off
2139 00:56:13.123802
2140 00:56:13.123849 [DATLAT]
2141 00:56:13.123898 Freq=1600, CH0 RK1, use_rxtx_scan=0
2142 00:56:13.123947
2143 00:56:13.123995 DATLAT Default: 0x10
2144 00:56:13.124044 7, 0xFFFF, sum=0
2145 00:56:13.124094 8, 0xFFFF, sum=0
2146 00:56:13.124143 9, 0xFFFF, sum=0
2147 00:56:13.124192 10, 0xFFFF, sum=0
2148 00:56:13.124242 11, 0xFFFF, sum=0
2149 00:56:13.124291 12, 0xFFFF, sum=0
2150 00:56:13.124341 13, 0xFFFF, sum=0
2151 00:56:13.124434 14, 0x0, sum=1
2152 00:56:13.124488 15, 0x0, sum=2
2153 00:56:13.124538 16, 0x0, sum=3
2154 00:56:13.124588 17, 0x0, sum=4
2155 00:56:13.124637 pattern=2 first_step=14 total pass=5 best_step=16
2156 00:56:13.124686 ==
2157 00:56:13.124735 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2158 00:56:13.124784 fsp= 1, odt_onoff= 1, Byte mode= 0
2159 00:56:13.124832 ==
2160 00:56:13.124881 Start DQ dly to find pass range UseTestEngine =1
2161 00:56:13.124930 x-axis: bit #, y-axis: DQ dly (-127~63)
2162 00:56:13.124979 RX Vref Scan = 0
2163 00:56:13.125027 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2164 00:56:13.125076 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2165 00:56:13.125126 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2166 00:56:13.125176 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2167 00:56:13.125225 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2168 00:56:13.125274 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2169 00:56:13.125324 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2170 00:56:13.125373 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2171 00:56:13.125422 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2172 00:56:13.125472 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2173 00:56:13.125521 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2174 00:56:13.125570 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2175 00:56:13.125619 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2176 00:56:13.125668 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2177 00:56:13.125718 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2178 00:56:13.125767 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2179 00:56:13.125817 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2180 00:56:13.125866 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2181 00:56:13.125915 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2182 00:56:13.125964 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2183 00:56:13.126058 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2184 00:56:13.126109 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2185 00:56:13.126160 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2186 00:56:13.126210 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2187 00:56:13.126259 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2188 00:56:13.126308 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2189 00:56:13.126357 0, [0] xxxxxxxx xxxxxxxx [MSB]
2190 00:56:13.126407 1, [0] xxxoxxxx xxxxxxxx [MSB]
2191 00:56:13.126456 2, [0] xxxoxxxx oxxxxxxx [MSB]
2192 00:56:13.126506 3, [0] xxxoxoxx oxxoxxxx [MSB]
2193 00:56:13.126555 4, [0] xxxoxoox oxxoxxxx [MSB]
2194 00:56:13.126605 5, [0] xxxoxoox ooxoxxxx [MSB]
2195 00:56:13.126654 6, [0] xxxoxoox ooxooxxx [MSB]
2196 00:56:13.126703 7, [0] xxxoxooo ooxooxox [MSB]
2197 00:56:13.126752 8, [0] xoxoxooo ooxoooox [MSB]
2198 00:56:13.126802 9, [0] ooooxooo ooxoooox [MSB]
2199 00:56:13.126884 10, [0] oooooooo ooxooooo [MSB]
2200 00:56:13.126935 11, [0] oooooooo ooxooooo [MSB]
2201 00:56:13.126984 33, [0] oooxoooo xooxoooo [MSB]
2202 00:56:13.127034 34, [0] oooxoooo xooxoooo [MSB]
2203 00:56:13.127083 35, [0] oooxoxoo xxoxoxoo [MSB]
2204 00:56:13.127132 36, [0] oooxoxxo xxoxxxoo [MSB]
2205 00:56:13.127182 37, [0] oooxoxxo xxoxxxoo [MSB]
2206 00:56:13.127232 38, [0] oooxxxxx xxoxxxxo [MSB]
2207 00:56:13.127281 39, [0] oooxxxxx xxoxxxxx [MSB]
2208 00:56:13.127372 40, [0] xxxxxxxx xxoxxxxx [MSB]
2209 00:56:13.127430 41, [0] xxxxxxxx xxoxxxxx [MSB]
2210 00:56:13.127479 42, [0] xxxxxxxx xxxxxxxx [MSB]
2211 00:56:13.127528 iDelay=42, Bit 0, Center 24 (9 ~ 39) 31
2212 00:56:13.127577 iDelay=42, Bit 1, Center 23 (8 ~ 39) 32
2213 00:56:13.127627 iDelay=42, Bit 2, Center 24 (9 ~ 39) 31
2214 00:56:13.127676 iDelay=42, Bit 3, Center 16 (1 ~ 32) 32
2215 00:56:13.127758 iDelay=42, Bit 4, Center 23 (10 ~ 37) 28
2216 00:56:13.127821 iDelay=42, Bit 5, Center 18 (3 ~ 34) 32
2217 00:56:13.127871 iDelay=42, Bit 6, Center 19 (4 ~ 35) 32
2218 00:56:13.127920 iDelay=42, Bit 7, Center 22 (7 ~ 37) 31
2219 00:56:13.127976 iDelay=42, Bit 8, Center 17 (2 ~ 32) 31
2220 00:56:13.128025 iDelay=42, Bit 9, Center 19 (5 ~ 34) 30
2221 00:56:13.128074 iDelay=42, Bit 10, Center 26 (12 ~ 41) 30
2222 00:56:13.128123 iDelay=42, Bit 11, Center 17 (3 ~ 32) 30
2223 00:56:13.128172 iDelay=42, Bit 12, Center 20 (6 ~ 35) 30
2224 00:56:13.128221 iDelay=42, Bit 13, Center 21 (8 ~ 34) 27
2225 00:56:13.128269 iDelay=42, Bit 14, Center 22 (7 ~ 37) 31
2226 00:56:13.128318 iDelay=42, Bit 15, Center 24 (10 ~ 38) 29
2227 00:56:13.128366 ==
2228 00:56:13.128415 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2229 00:56:13.128464 fsp= 1, odt_onoff= 1, Byte mode= 0
2230 00:56:13.128513 ==
2231 00:56:13.128561 DQS Delay:
2232 00:56:13.128610 DQS0 = 0, DQS1 = 0
2233 00:56:13.128658 DQM Delay:
2234 00:56:13.128706 DQM0 = 21, DQM1 = 20
2235 00:56:13.128755 DQ Delay:
2236 00:56:13.128804 DQ0 =24, DQ1 =23, DQ2 =24, DQ3 =16
2237 00:56:13.129040 DQ4 =23, DQ5 =18, DQ6 =19, DQ7 =22
2238 00:56:13.129095 DQ8 =17, DQ9 =19, DQ10 =26, DQ11 =17
2239 00:56:13.129145 DQ12 =20, DQ13 =21, DQ14 =22, DQ15 =24
2240 00:56:13.129193
2241 00:56:13.129242
2242 00:56:13.129290
2243 00:56:13.129338 [DramC_TX_OE_Calibration] TA2
2244 00:56:13.129387 Original DQ_B0 (3 6) =30, OEN = 27
2245 00:56:13.129436 Original DQ_B1 (3 6) =30, OEN = 27
2246 00:56:13.129485 23, 0x0, End_B0=23 End_B1=23
2247 00:56:13.129534 24, 0x0, End_B0=24 End_B1=24
2248 00:56:13.129584 25, 0x0, End_B0=25 End_B1=25
2249 00:56:13.129633 26, 0x0, End_B0=26 End_B1=26
2250 00:56:13.129683 27, 0x0, End_B0=27 End_B1=27
2251 00:56:13.129733 28, 0x0, End_B0=28 End_B1=28
2252 00:56:13.129782 29, 0x0, End_B0=29 End_B1=29
2253 00:56:13.129831 30, 0x0, End_B0=30 End_B1=30
2254 00:56:13.129880 31, 0xFBFF, End_B0=30 End_B1=30
2255 00:56:13.129930 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2256 00:56:13.129979 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2257 00:56:13.130071
2258 00:56:13.130119
2259 00:56:13.130200 Write Rank1 MR23 =0x3f
2260 00:56:13.130249 [DQSOSC]
2261 00:56:13.130297 [DQSOSCAuto] RK1, (LSB)MR18= 0xb9b9, (MSB)MR19= 0x202, tDQSOscB0 = 451 ps tDQSOscB1 = 451 ps
2262 00:56:13.130347 CH0_RK1: MR19=0x202, MR18=0xB9B9, DQSOSC=451, MR23=63, INC=12, DEC=18
2263 00:56:13.130397 Write Rank1 MR23 =0x3f
2264 00:56:13.130444 [DQSOSC]
2265 00:56:13.130492 [DQSOSCAuto] RK1, (LSB)MR18= 0xb9b9, (MSB)MR19= 0x202, tDQSOscB0 = 451 ps tDQSOscB1 = 451 ps
2266 00:56:13.130541 CH0 RK1: MR19=202, MR18=B9B9
2267 00:56:13.130590 [RxdqsGatingPostProcess] freq 1600
2268 00:56:13.130639 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2269 00:56:13.130689 Rank: 0
2270 00:56:13.130738 best DQS0 dly(2T, 0.5T) = (2, 6)
2271 00:56:13.130787 best DQS1 dly(2T, 0.5T) = (2, 6)
2272 00:56:13.130835 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2273 00:56:13.130883 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2274 00:56:13.130931 Rank: 1
2275 00:56:13.130979 best DQS0 dly(2T, 0.5T) = (2, 6)
2276 00:56:13.131028 best DQS1 dly(2T, 0.5T) = (2, 6)
2277 00:56:13.131093 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2278 00:56:13.131170 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2279 00:56:13.131234 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2280 00:56:13.131289 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2281 00:56:13.131339 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2282 00:56:13.131388 Write Rank0 MR13 =0x59
2283 00:56:13.131436 ==
2284 00:56:13.131485 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2285 00:56:13.131535 fsp= 1, odt_onoff= 1, Byte mode= 0
2286 00:56:13.131584 ==
2287 00:56:13.131633 === u2Vref_new: 0x56 --> 0x3a
2288 00:56:13.131682 === u2Vref_new: 0x58 --> 0x58
2289 00:56:13.131731 === u2Vref_new: 0x5a --> 0x5a
2290 00:56:13.131780 === u2Vref_new: 0x5c --> 0x78
2291 00:56:13.131829 === u2Vref_new: 0x5e --> 0x7a
2292 00:56:13.131877 === u2Vref_new: 0x60 --> 0x90
2293 00:56:13.131926 [CA 0] Center 38 (13~63) winsize 51
2294 00:56:13.131999 [CA 1] Center 37 (12~63) winsize 52
2295 00:56:13.132062 [CA 2] Center 34 (6~63) winsize 58
2296 00:56:13.132110 [CA 3] Center 35 (7~63) winsize 57
2297 00:56:13.132159 [CA 4] Center 34 (5~63) winsize 59
2298 00:56:13.132207 [CA 5] Center 29 (0~58) winsize 59
2299 00:56:13.132255
2300 00:56:13.132302 [CATrainingPosCal] consider 1 rank data
2301 00:56:13.132351 u2DelayCellTimex100 = 833/100 ps
2302 00:56:13.132398 CA0 delay=38 (13~63),Diff = 9 PI (10 cell)
2303 00:56:13.132446 CA1 delay=37 (12~63),Diff = 8 PI (9 cell)
2304 00:56:13.132495 CA2 delay=34 (6~63),Diff = 5 PI (5 cell)
2305 00:56:13.132543 CA3 delay=35 (7~63),Diff = 6 PI (7 cell)
2306 00:56:13.132592 CA4 delay=34 (5~63),Diff = 5 PI (5 cell)
2307 00:56:13.132640 CA5 delay=29 (0~58),Diff = 0 PI (0 cell)
2308 00:56:13.132688
2309 00:56:13.132735 CA PerBit enable=1, Macro0, CA PI delay=29
2310 00:56:13.132783 === u2Vref_new: 0x5e --> 0x7a
2311 00:56:13.132832
2312 00:56:13.132880 Vref(ca) range 1: 30
2313 00:56:13.132928
2314 00:56:13.132975 CS Dly= 11 (42-0-32)
2315 00:56:13.133023 Write Rank0 MR13 =0xd8
2316 00:56:13.133071 Write Rank0 MR13 =0xd8
2317 00:56:13.133119 Write Rank0 MR12 =0x5e
2318 00:56:13.133167 Write Rank1 MR13 =0x59
2319 00:56:13.133214 ==
2320 00:56:13.133263 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2321 00:56:13.133311 fsp= 1, odt_onoff= 1, Byte mode= 0
2322 00:56:13.133360 ==
2323 00:56:13.133408 === u2Vref_new: 0x56 --> 0x3a
2324 00:56:13.133455 === u2Vref_new: 0x58 --> 0x58
2325 00:56:13.133503 === u2Vref_new: 0x5a --> 0x5a
2326 00:56:13.133551 === u2Vref_new: 0x5c --> 0x78
2327 00:56:13.133598 === u2Vref_new: 0x5e --> 0x7a
2328 00:56:13.133646 === u2Vref_new: 0x60 --> 0x90
2329 00:56:13.133694 [CA 0] Center 37 (11~63) winsize 53
2330 00:56:13.133742 [CA 1] Center 36 (10~63) winsize 54
2331 00:56:13.133790 [CA 2] Center 34 (5~63) winsize 59
2332 00:56:13.133837 [CA 3] Center 34 (6~63) winsize 58
2333 00:56:13.133885 [CA 4] Center 34 (5~63) winsize 59
2334 00:56:13.133933 [CA 5] Center 27 (-1~56) winsize 58
2335 00:56:13.133989
2336 00:56:13.134074 [CATrainingPosCal] consider 2 rank data
2337 00:56:13.134122 u2DelayCellTimex100 = 833/100 ps
2338 00:56:13.134171 CA0 delay=38 (13~63),Diff = 10 PI (11 cell)
2339 00:56:13.134219 CA1 delay=37 (12~63),Diff = 9 PI (10 cell)
2340 00:56:13.134267 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2341 00:56:13.134315 CA3 delay=35 (7~63),Diff = 7 PI (8 cell)
2342 00:56:13.134363 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2343 00:56:13.134429 CA5 delay=28 (0~56),Diff = 0 PI (0 cell)
2344 00:56:13.134479
2345 00:56:13.134528 CA PerBit enable=1, Macro0, CA PI delay=28
2346 00:56:13.134576 === u2Vref_new: 0x60 --> 0x90
2347 00:56:13.134625
2348 00:56:13.134672 Vref(ca) range 1: 32
2349 00:56:13.134720
2350 00:56:13.134768 CS Dly= 11 (42-0-32)
2351 00:56:13.134815 Write Rank1 MR13 =0xd8
2352 00:56:13.134863 Write Rank1 MR13 =0xd8
2353 00:56:13.134912 Write Rank1 MR12 =0x60
2354 00:56:13.134960 [RankSwap] Rank num 2, (Multi 1), Rank 0
2355 00:56:13.135008 Write Rank0 MR2 =0xad
2356 00:56:13.135056 [Write Leveling]
2357 00:56:13.135104 delay byte0 byte1 byte2 byte3
2358 00:56:13.135162
2359 00:56:13.135216 10 0 0
2360 00:56:13.135266 11 0 0
2361 00:56:13.135315 12 0 0
2362 00:56:13.135364 13 0 0
2363 00:56:13.135412 14 0 0
2364 00:56:13.135460 15 0 0
2365 00:56:13.135508 16 0 0
2366 00:56:13.135557 17 0 0
2367 00:56:13.135605 18 0 0
2368 00:56:13.135654 19 0 0
2369 00:56:13.135703 20 0 0
2370 00:56:13.135751 21 0 0
2371 00:56:13.135799 22 0 0
2372 00:56:13.135848 23 0 0
2373 00:56:13.135897 24 0 0
2374 00:56:13.135946 25 0 0
2375 00:56:13.135994 26 0 0
2376 00:56:13.136042 27 0 0
2377 00:56:13.136090 28 0 0
2378 00:56:13.136139 29 0 0
2379 00:56:13.136375 30 0 0
2380 00:56:13.136430 31 0 0
2381 00:56:13.136480 32 0 0
2382 00:56:13.136529 33 0 ff
2383 00:56:13.136578 34 ff ff
2384 00:56:13.136627 35 ff ff
2385 00:56:13.136675 36 ff ff
2386 00:56:13.136723 37 ff ff
2387 00:56:13.136772 38 ff ff
2388 00:56:13.136821 39 ff ff
2389 00:56:13.136870 40 ff ff
2390 00:56:13.136918 pass bytecount = 0xff (0xff: all bytes pass)
2391 00:56:13.136967
2392 00:56:13.137015 DQS0 dly: 34
2393 00:56:13.137062 DQS1 dly: 33
2394 00:56:13.137109 Write Rank0 MR2 =0x2d
2395 00:56:13.137157 [RankSwap] Rank num 2, (Multi 1), Rank 0
2396 00:56:13.137204 Write Rank0 MR1 =0xd6
2397 00:56:13.137252 [Gating]
2398 00:56:13.137300 ==
2399 00:56:13.137348 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2400 00:56:13.137396 fsp= 1, odt_onoff= 1, Byte mode= 0
2401 00:56:13.137444 ==
2402 00:56:13.137493 3 1 0 |3534 a0a |(11 11)(11 11) |(0 0)(1 1)| 0
2403 00:56:13.137543 3 1 4 |3534 2e2d |(11 11)(11 11) |(0 0)(0 0)| 0
2404 00:56:13.137592 3 1 8 |3534 d0c |(11 11)(11 11) |(0 0)(1 1)| 0
2405 00:56:13.137642 3 1 12 |3534 2c2c |(11 11)(11 11) |(0 0)(1 1)| 0
2406 00:56:13.137710 3 1 16 |3534 b0b |(11 11)(11 11) |(1 1)(1 1)| 0
2407 00:56:13.137791 3 1 20 |3534 2f2f |(11 11)(11 11) |(1 1)(0 0)| 0
2408 00:56:13.137869 3 1 24 |3534 302f |(11 11)(11 11) |(1 1)(1 1)| 0
2409 00:56:13.137960 [Byte 1] Lead/lag falling Transition (3, 1, 24)
2410 00:56:13.143922 3 1 28 |3534 201f |(11 11)(11 11) |(0 1)(1 0)| 0
2411 00:56:13.147381 3 2 0 |3534 2d2d |(11 11)(11 11) |(0 1)(1 0)| 0
2412 00:56:13.150710 3 2 4 |3534 2c2c |(11 11)(11 11) |(0 1)(0 1)| 0
2413 00:56:13.157261 3 2 8 |3534 706 |(11 11)(11 11) |(0 1)(1 0)| 0
2414 00:56:13.160448 3 2 12 |3534 2e2d |(11 11)(11 11) |(0 1)(1 0)| 0
2415 00:56:13.163804 3 2 16 |3534 2d2c |(11 11)(11 11) |(0 1)(1 0)| 0
2416 00:56:13.170624 3 2 20 |b0a 302f |(11 11)(11 11) |(1 1)(1 0)| 0
2417 00:56:13.173743 3 2 24 |3d3d 2f2e |(11 11)(11 1) |(1 1)(1 0)| 0
2418 00:56:13.177482 3 2 28 |3d3d 303 |(11 11)(11 11) |(1 1)(1 1)| 0
2419 00:56:13.180174 [Byte 1] Lead/lag Transition tap number (1)
2420 00:56:13.186870 3 3 0 |3d3d 504 |(11 11)(11 11) |(1 1)(0 0)| 0
2421 00:56:13.190685 3 3 4 |3d3d 3737 |(11 11)(11 11) |(1 1)(1 1)| 0
2422 00:56:13.193562 3 3 8 |3d3d 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
2423 00:56:13.196858 3 3 12 |3d3d 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
2424 00:56:13.203862 3 3 16 |3d3d 1918 |(11 11)(11 11) |(1 1)(0 0)| 0
2425 00:56:13.207044 3 3 20 |3d3d 1111 |(11 11)(11 11) |(1 1)(1 1)| 0
2426 00:56:13.210355 3 3 24 |3333 3736 |(11 11)(11 11) |(1 1)(1 1)| 0
2427 00:56:13.217181 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2428 00:56:13.220441 3 4 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2429 00:56:13.223905 [Byte 0] Lead/lag falling Transition (3, 4, 0)
2430 00:56:13.227338 [Byte 1] Lead/lag falling Transition (3, 4, 0)
2431 00:56:13.233564 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2432 00:56:13.237085 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2433 00:56:13.240477 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2434 00:56:13.247396 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2435 00:56:13.250219 3 4 20 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2436 00:56:13.253637 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2437 00:56:13.260408 3 4 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2438 00:56:13.263502 3 5 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2439 00:56:13.266864 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2440 00:56:13.273889 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2441 00:56:13.277200 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2442 00:56:13.280002 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2443 00:56:13.286759 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2444 00:56:13.290052 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2445 00:56:13.293642 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2446 00:56:13.296873 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2447 00:56:13.303159 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2448 00:56:13.306662 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2449 00:56:13.309788 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2450 00:56:13.316514 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2451 00:56:13.319460 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2452 00:56:13.323205 [Byte 0] Lead/lag Transition tap number (3)
2453 00:56:13.326360 3 6 20 |909 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2454 00:56:13.332930 [Byte 1] Lead/lag falling Transition (3, 6, 20)
2455 00:56:13.336154 3 6 24 |1c1c 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2456 00:56:13.339658 [Byte 1] Lead/lag Transition tap number (2)
2457 00:56:13.346393 3 6 28 |4646 1e1e |(0 0)(11 11) |(0 0)(0 0)| 0
2458 00:56:13.346473 [Byte 0]First pass (3, 6, 28)
2459 00:56:13.352915 3 7 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2460 00:56:13.356054 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2461 00:56:13.359608 [Byte 1]First pass (3, 7, 4)
2462 00:56:13.362938 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2463 00:56:13.366396 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2464 00:56:13.369812 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2465 00:56:13.372858 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2466 00:56:13.379409 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2467 00:56:13.382619 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2468 00:56:13.385887 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2469 00:56:13.389401 4 0 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2470 00:56:13.392906 All bytes gating window > 1UI, Early break!
2471 00:56:13.392982
2472 00:56:13.399279 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 14)
2473 00:56:13.399356
2474 00:56:13.402650 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 24)
2475 00:56:13.402733
2476 00:56:13.402793
2477 00:56:13.402848
2478 00:56:13.405879 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
2479 00:56:13.405987
2480 00:56:13.409116 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 24)
2481 00:56:13.409196
2482 00:56:13.409257
2483 00:56:13.412829 Write Rank0 MR1 =0x56
2484 00:56:13.412930
2485 00:56:13.415651 best RODT dly(2T, 0.5T) = (2, 3)
2486 00:56:13.415728
2487 00:56:13.419258 best RODT dly(2T, 0.5T) = (2, 3)
2488 00:56:13.419335 ==
2489 00:56:13.422339 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2490 00:56:13.425738 fsp= 1, odt_onoff= 1, Byte mode= 0
2491 00:56:13.425815 ==
2492 00:56:13.432343 Start DQ dly to find pass range UseTestEngine =0
2493 00:56:13.435861 x-axis: bit #, y-axis: DQ dly (-127~63)
2494 00:56:13.435970 RX Vref Scan = 0
2495 00:56:13.439362 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2496 00:56:13.442122 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2497 00:56:13.445631 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2498 00:56:13.448933 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2499 00:56:13.452432 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2500 00:56:13.455407 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2501 00:56:13.458797 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2502 00:56:13.458875 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2503 00:56:13.462416 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2504 00:56:13.465604 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2505 00:56:13.469005 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2506 00:56:13.472076 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2507 00:56:13.475267 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2508 00:56:13.478744 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2509 00:56:13.482294 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2510 00:56:13.482371 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2511 00:56:13.485485 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2512 00:56:13.488499 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2513 00:56:13.492439 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2514 00:56:13.495369 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2515 00:56:13.498626 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2516 00:56:13.502063 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2517 00:56:13.502141 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2518 00:56:13.505574 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2519 00:56:13.508702 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2520 00:56:13.511586 -1, [0] xxxxxxxx xxxxxxxo [MSB]
2521 00:56:13.515195 0, [0] xxxxxxxx xxxxxxxo [MSB]
2522 00:56:13.518502 1, [0] xxxxxxxx xxxxxxxo [MSB]
2523 00:56:13.522025 2, [0] xxxxxxxx xxxxxxxo [MSB]
2524 00:56:13.522103 3, [0] xxxoxxxx xoxxxxxo [MSB]
2525 00:56:13.525428 4, [0] xxxoxxxx ooxxxxxo [MSB]
2526 00:56:13.528203 5, [0] xoooxxxo ooxxxxxo [MSB]
2527 00:56:13.531602 6, [0] xoooxxxo ooxxxxxo [MSB]
2528 00:56:13.535190 7, [0] xooooxxo oooxoxoo [MSB]
2529 00:56:13.538167 8, [0] oooooxoo oooooooo [MSB]
2530 00:56:13.538246 31, [0] oooooooo ooooooox [MSB]
2531 00:56:13.541537 32, [0] oooooooo ooooooox [MSB]
2532 00:56:13.544816 33, [0] oooooooo ooooooox [MSB]
2533 00:56:13.548364 34, [0] oooooooo oxooooox [MSB]
2534 00:56:13.551427 35, [0] ooxxoooo xxooooox [MSB]
2535 00:56:13.555139 36, [0] ooxxoooo xxooooox [MSB]
2536 00:56:13.558028 37, [0] ooxxxooo xxxoooox [MSB]
2537 00:56:13.558107 38, [0] ooxxxooo xxxxoxxx [MSB]
2538 00:56:13.561416 39, [0] oxxxxxox xxxxxxxx [MSB]
2539 00:56:13.565082 40, [0] oxxxxxox xxxxxxxx [MSB]
2540 00:56:13.568498 41, [0] xxxxxxxx xxxxxxxx [MSB]
2541 00:56:13.571908 iDelay=41, Bit 0, Center 24 (8 ~ 40) 33
2542 00:56:13.575238 iDelay=41, Bit 1, Center 21 (5 ~ 38) 34
2543 00:56:13.578007 iDelay=41, Bit 2, Center 19 (5 ~ 34) 30
2544 00:56:13.581395 iDelay=41, Bit 3, Center 18 (3 ~ 34) 32
2545 00:56:13.584991 iDelay=41, Bit 4, Center 21 (7 ~ 36) 30
2546 00:56:13.588357 iDelay=41, Bit 5, Center 23 (9 ~ 38) 30
2547 00:56:13.591638 iDelay=41, Bit 6, Center 24 (8 ~ 40) 33
2548 00:56:13.598201 iDelay=41, Bit 7, Center 21 (5 ~ 38) 34
2549 00:56:13.601551 iDelay=41, Bit 8, Center 19 (4 ~ 34) 31
2550 00:56:13.604534 iDelay=41, Bit 9, Center 18 (3 ~ 33) 31
2551 00:56:13.607794 iDelay=41, Bit 10, Center 21 (7 ~ 36) 30
2552 00:56:13.611072 iDelay=41, Bit 11, Center 22 (8 ~ 37) 30
2553 00:56:13.614585 iDelay=41, Bit 12, Center 22 (7 ~ 38) 32
2554 00:56:13.618116 iDelay=41, Bit 13, Center 22 (8 ~ 37) 30
2555 00:56:13.621450 iDelay=41, Bit 14, Center 22 (7 ~ 37) 31
2556 00:56:13.624441 iDelay=41, Bit 15, Center 14 (-1 ~ 30) 32
2557 00:56:13.624518 ==
2558 00:56:13.631163 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2559 00:56:13.634135 fsp= 1, odt_onoff= 1, Byte mode= 0
2560 00:56:13.634212 ==
2561 00:56:13.634273 DQS Delay:
2562 00:56:13.637632 DQS0 = 0, DQS1 = 0
2563 00:56:13.637709 DQM Delay:
2564 00:56:13.640915 DQM0 = 21, DQM1 = 20
2565 00:56:13.640992 DQ Delay:
2566 00:56:13.644343 DQ0 =24, DQ1 =21, DQ2 =19, DQ3 =18
2567 00:56:13.647513 DQ4 =21, DQ5 =23, DQ6 =24, DQ7 =21
2568 00:56:13.651083 DQ8 =19, DQ9 =18, DQ10 =21, DQ11 =22
2569 00:56:13.654328 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
2570 00:56:13.654404
2571 00:56:13.654463
2572 00:56:13.654518 DramC Write-DBI off
2573 00:56:13.657786 ==
2574 00:56:13.661357 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2575 00:56:13.664143 fsp= 1, odt_onoff= 1, Byte mode= 0
2576 00:56:13.664220 ==
2577 00:56:13.667881 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2578 00:56:13.667957
2579 00:56:13.671188 Begin, DQ Scan Range 929~1185
2580 00:56:13.671264
2581 00:56:13.671324
2582 00:56:13.674391 TX Vref Scan disable
2583 00:56:13.677539 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2584 00:56:13.681126 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2585 00:56:13.684493 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2586 00:56:13.687872 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2587 00:56:13.690719 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2588 00:56:13.694265 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2589 00:56:13.697413 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2590 00:56:13.700670 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2591 00:56:13.704477 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2592 00:56:13.710704 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2593 00:56:13.714430 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2594 00:56:13.717369 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2595 00:56:13.720510 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2596 00:56:13.724166 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2597 00:56:13.727152 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2598 00:56:13.730561 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2599 00:56:13.733824 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2600 00:56:13.737308 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2601 00:56:13.740758 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2602 00:56:13.744063 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2603 00:56:13.747139 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2604 00:56:13.750807 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2605 00:56:13.754097 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2606 00:56:13.757098 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2607 00:56:13.760558 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2608 00:56:13.767340 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2609 00:56:13.770550 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2610 00:56:13.773885 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2611 00:56:13.777423 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2612 00:56:13.780719 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2613 00:56:13.783915 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2614 00:56:13.787788 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2615 00:56:13.790617 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2616 00:56:13.793808 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2617 00:56:13.797106 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2618 00:56:13.800469 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2619 00:56:13.803723 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2620 00:56:13.807593 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2621 00:56:13.810717 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2622 00:56:13.814142 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2623 00:56:13.816977 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2624 00:56:13.820800 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2625 00:56:13.823686 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2626 00:56:13.827228 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2627 00:56:13.833844 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2628 00:56:13.837472 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2629 00:56:13.840138 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2630 00:56:13.843668 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2631 00:56:13.846991 977 |3 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2632 00:56:13.850280 978 |3 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2633 00:56:13.853486 979 |3 6 19|[0] xxxxxxxx xxxxxxxx [MSB]
2634 00:56:13.856805 980 |3 6 20|[0] xxxxxxxx xxxxxxxx [MSB]
2635 00:56:13.860692 981 |3 6 21|[0] xxxxxxxx ooxxxxxo [MSB]
2636 00:56:13.863912 982 |3 6 22|[0] xxxxxxxx ooxxxxxo [MSB]
2637 00:56:13.866909 983 |3 6 23|[0] xxxxxxxx oooxoxoo [MSB]
2638 00:56:13.869949 984 |3 6 24|[0] oooooxoo oooooooo [MSB]
2639 00:56:13.877632 996 |3 6 36|[0] oooooooo ooooooox [MSB]
2640 00:56:13.881234 997 |3 6 37|[0] oooooooo ooooooox [MSB]
2641 00:56:13.884111 998 |3 6 38|[0] oooooooo ooooooox [MSB]
2642 00:56:13.887795 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
2643 00:56:13.890716 1000 |3 6 40|[0] oooooooo xxxxxxxx [MSB]
2644 00:56:13.893934 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2645 00:56:13.897583 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2646 00:56:13.901069 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
2647 00:56:13.903957 1004 |3 6 44|[0] ooxxoooo xxxxxxxx [MSB]
2648 00:56:13.907555 1005 |3 6 45|[0] oxxxoooo xxxxxxxx [MSB]
2649 00:56:13.911284 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
2650 00:56:13.914380 Byte0, DQ PI dly=993, DQM PI dly= 993
2651 00:56:13.921389 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 33)
2652 00:56:13.921467
2653 00:56:13.924243 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 33)
2654 00:56:13.924321
2655 00:56:13.927227 Byte1, DQ PI dly=989, DQM PI dly= 989
2656 00:56:13.930584 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2657 00:56:13.930661
2658 00:56:13.937334 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2659 00:56:13.937411
2660 00:56:13.937470 ==
2661 00:56:13.940685 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2662 00:56:13.943939 fsp= 1, odt_onoff= 1, Byte mode= 0
2663 00:56:13.944016 ==
2664 00:56:13.950471 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2665 00:56:13.950548
2666 00:56:13.953961 Begin, DQ Scan Range 965~1029
2667 00:56:13.954058 Write Rank0 MR14 =0x0
2668 00:56:13.961868
2669 00:56:13.961944 CH=1, VrefRange= 0, VrefLevel = 0
2670 00:56:13.968806 TX Bit0 (986~1001) 16 993, Bit8 (983~994) 12 988,
2671 00:56:13.972144 TX Bit1 (985~999) 15 992, Bit9 (983~994) 12 988,
2672 00:56:13.978437 TX Bit2 (984~999) 16 991, Bit10 (985~997) 13 991,
2673 00:56:13.981895 TX Bit3 (981~994) 14 987, Bit11 (985~998) 14 991,
2674 00:56:13.985703 TX Bit4 (985~1000) 16 992, Bit12 (986~998) 13 992,
2675 00:56:13.992369 TX Bit5 (986~1000) 15 993, Bit13 (986~996) 11 991,
2676 00:56:13.995175 TX Bit6 (985~1000) 16 992, Bit14 (985~997) 13 991,
2677 00:56:14.001927 TX Bit7 (984~1000) 17 992, Bit15 (980~991) 12 985,
2678 00:56:14.002041
2679 00:56:14.002101 Write Rank0 MR14 =0x2
2680 00:56:14.009833
2681 00:56:14.009909 CH=1, VrefRange= 0, VrefLevel = 2
2682 00:56:14.016904 TX Bit0 (986~1001) 16 993, Bit8 (983~994) 12 988,
2683 00:56:14.019919 TX Bit1 (985~999) 15 992, Bit9 (983~994) 12 988,
2684 00:56:14.026727 TX Bit2 (984~1000) 17 992, Bit10 (985~998) 14 991,
2685 00:56:14.030123 TX Bit3 (981~994) 14 987, Bit11 (985~999) 15 992,
2686 00:56:14.033537 TX Bit4 (984~1001) 18 992, Bit12 (985~998) 14 991,
2687 00:56:14.039857 TX Bit5 (986~1001) 16 993, Bit13 (986~997) 12 991,
2688 00:56:14.043309 TX Bit6 (985~1001) 17 993, Bit14 (985~999) 15 992,
2689 00:56:14.049857 TX Bit7 (984~1001) 18 992, Bit15 (979~991) 13 985,
2690 00:56:14.049935
2691 00:56:14.050016 Write Rank0 MR14 =0x4
2692 00:56:14.058364
2693 00:56:14.058441 CH=1, VrefRange= 0, VrefLevel = 4
2694 00:56:14.065383 TX Bit0 (986~1003) 18 994, Bit8 (982~995) 14 988,
2695 00:56:14.068371 TX Bit1 (985~1000) 16 992, Bit9 (982~995) 14 988,
2696 00:56:14.074891 TX Bit2 (983~1000) 18 991, Bit10 (985~998) 14 991,
2697 00:56:14.078490 TX Bit3 (980~995) 16 987, Bit11 (985~999) 15 992,
2698 00:56:14.081766 TX Bit4 (984~1001) 18 992, Bit12 (985~999) 15 992,
2699 00:56:14.088290 TX Bit5 (986~1001) 16 993, Bit13 (986~998) 13 992,
2700 00:56:14.091802 TX Bit6 (985~1001) 17 993, Bit14 (985~999) 15 992,
2701 00:56:14.098311 TX Bit7 (984~1001) 18 992, Bit15 (979~992) 14 985,
2702 00:56:14.098387
2703 00:56:14.098448 Write Rank0 MR14 =0x6
2704 00:56:14.106810
2705 00:56:14.106886 CH=1, VrefRange= 0, VrefLevel = 6
2706 00:56:14.113759 TX Bit0 (986~1003) 18 994, Bit8 (982~997) 16 989,
2707 00:56:14.116898 TX Bit1 (984~1001) 18 992, Bit9 (982~995) 14 988,
2708 00:56:14.123589 TX Bit2 (983~1001) 19 992, Bit10 (984~999) 16 991,
2709 00:56:14.127000 TX Bit3 (980~997) 18 988, Bit11 (985~999) 15 992,
2710 00:56:14.130139 TX Bit4 (984~1002) 19 993, Bit12 (985~999) 15 992,
2711 00:56:14.136977 TX Bit5 (986~1002) 17 994, Bit13 (986~999) 14 992,
2712 00:56:14.140527 TX Bit6 (984~1002) 19 993, Bit14 (984~999) 16 991,
2713 00:56:14.147049 TX Bit7 (984~1001) 18 992, Bit15 (978~992) 15 985,
2714 00:56:14.147126
2715 00:56:14.149852 wait MRW command Rank0 MR14 =0x8 fired (1)
2716 00:56:14.149929 Write Rank0 MR14 =0x8
2717 00:56:14.159732
2718 00:56:14.159808 CH=1, VrefRange= 0, VrefLevel = 8
2719 00:56:14.166407 TX Bit0 (985~1004) 20 994, Bit8 (981~997) 17 989,
2720 00:56:14.169667 TX Bit1 (984~1001) 18 992, Bit9 (981~996) 16 988,
2721 00:56:14.175906 TX Bit2 (983~1001) 19 992, Bit10 (984~999) 16 991,
2722 00:56:14.179116 TX Bit3 (979~997) 19 988, Bit11 (985~1000) 16 992,
2723 00:56:14.186011 TX Bit4 (983~1002) 20 992, Bit12 (985~1000) 16 992,
2724 00:56:14.189386 TX Bit5 (986~1003) 18 994, Bit13 (985~999) 15 992,
2725 00:56:14.192559 TX Bit6 (984~1003) 20 993, Bit14 (984~1000) 17 992,
2726 00:56:14.199085 TX Bit7 (984~1002) 19 993, Bit15 (978~993) 16 985,
2727 00:56:14.199163
2728 00:56:14.199223 Write Rank0 MR14 =0xa
2729 00:56:14.208767
2730 00:56:14.212069 CH=1, VrefRange= 0, VrefLevel = 10
2731 00:56:14.215028 TX Bit0 (985~1005) 21 995, Bit8 (981~998) 18 989,
2732 00:56:14.218412 TX Bit1 (984~1002) 19 993, Bit9 (981~997) 17 989,
2733 00:56:14.225384 TX Bit2 (982~1002) 21 992, Bit10 (984~999) 16 991,
2734 00:56:14.228762 TX Bit3 (979~998) 20 988, Bit11 (984~1000) 17 992,
2735 00:56:14.231712 TX Bit4 (983~1003) 21 993, Bit12 (984~1000) 17 992,
2736 00:56:14.238714 TX Bit5 (985~1003) 19 994, Bit13 (985~999) 15 992,
2737 00:56:14.241616 TX Bit6 (984~1003) 20 993, Bit14 (984~1000) 17 992,
2738 00:56:14.248634 TX Bit7 (984~1003) 20 993, Bit15 (977~993) 17 985,
2739 00:56:14.248712
2740 00:56:14.248772 Write Rank0 MR14 =0xc
2741 00:56:14.257794
2742 00:56:14.261220 CH=1, VrefRange= 0, VrefLevel = 12
2743 00:56:14.264705 TX Bit0 (985~1005) 21 995, Bit8 (981~998) 18 989,
2744 00:56:14.267553 TX Bit1 (983~1003) 21 993, Bit9 (981~998) 18 989,
2745 00:56:14.274087 TX Bit2 (982~1002) 21 992, Bit10 (984~1000) 17 992,
2746 00:56:14.277700 TX Bit3 (979~999) 21 989, Bit11 (984~1001) 18 992,
2747 00:56:14.284000 TX Bit4 (983~1003) 21 993, Bit12 (984~1000) 17 992,
2748 00:56:14.287433 TX Bit5 (985~1003) 19 994, Bit13 (985~1000) 16 992,
2749 00:56:14.290632 TX Bit6 (984~1004) 21 994, Bit14 (984~1000) 17 992,
2750 00:56:14.297444 TX Bit7 (983~1003) 21 993, Bit15 (977~994) 18 985,
2751 00:56:14.297521
2752 00:56:14.297581 Write Rank0 MR14 =0xe
2753 00:56:14.307503
2754 00:56:14.310974 CH=1, VrefRange= 0, VrefLevel = 14
2755 00:56:14.313689 TX Bit0 (984~1006) 23 995, Bit8 (979~999) 21 989,
2756 00:56:14.317423 TX Bit1 (983~1003) 21 993, Bit9 (980~998) 19 989,
2757 00:56:14.324225 TX Bit2 (982~1003) 22 992, Bit10 (984~1000) 17 992,
2758 00:56:14.327309 TX Bit3 (979~1000) 22 989, Bit11 (984~1001) 18 992,
2759 00:56:14.333840 TX Bit4 (983~1005) 23 994, Bit12 (984~1000) 17 992,
2760 00:56:14.337401 TX Bit5 (984~1005) 22 994, Bit13 (985~1000) 16 992,
2761 00:56:14.340436 TX Bit6 (984~1005) 22 994, Bit14 (984~1000) 17 992,
2762 00:56:14.346870 TX Bit7 (983~1004) 22 993, Bit15 (977~994) 18 985,
2763 00:56:14.346947
2764 00:56:14.350213 Write Rank0 MR14 =0x10
2765 00:56:14.356972
2766 00:56:14.360195 CH=1, VrefRange= 0, VrefLevel = 16
2767 00:56:14.363653 TX Bit0 (984~1006) 23 995, Bit8 (979~999) 21 989,
2768 00:56:14.367252 TX Bit1 (982~1004) 23 993, Bit9 (980~999) 20 989,
2769 00:56:14.373362 TX Bit2 (981~1004) 24 992, Bit10 (983~1000) 18 991,
2770 00:56:14.376799 TX Bit3 (979~1000) 22 989, Bit11 (984~1002) 19 993,
2771 00:56:14.383510 TX Bit4 (982~1005) 24 993, Bit12 (984~1001) 18 992,
2772 00:56:14.386914 TX Bit5 (985~1006) 22 995, Bit13 (984~1000) 17 992,
2773 00:56:14.389941 TX Bit6 (983~1006) 24 994, Bit14 (983~1001) 19 992,
2774 00:56:14.396965 TX Bit7 (983~1005) 23 994, Bit15 (976~995) 20 985,
2775 00:56:14.397043
2776 00:56:14.400096 Write Rank0 MR14 =0x12
2777 00:56:14.406898
2778 00:56:14.410027 CH=1, VrefRange= 0, VrefLevel = 18
2779 00:56:14.413196 TX Bit0 (985~1006) 22 995, Bit8 (979~999) 21 989,
2780 00:56:14.416602 TX Bit1 (982~1005) 24 993, Bit9 (980~999) 20 989,
2781 00:56:14.423177 TX Bit2 (981~1004) 24 992, Bit10 (983~1001) 19 992,
2782 00:56:14.426631 TX Bit3 (978~1001) 24 989, Bit11 (983~1002) 20 992,
2783 00:56:14.433697 TX Bit4 (982~1006) 25 994, Bit12 (983~1001) 19 992,
2784 00:56:14.436877 TX Bit5 (984~1006) 23 995, Bit13 (984~1001) 18 992,
2785 00:56:14.440362 TX Bit6 (983~1006) 24 994, Bit14 (983~1001) 19 992,
2786 00:56:14.446654 TX Bit7 (982~1005) 24 993, Bit15 (976~996) 21 986,
2787 00:56:14.446732
2788 00:56:14.446792 Write Rank0 MR14 =0x14
2789 00:56:14.456586
2790 00:56:14.459409 CH=1, VrefRange= 0, VrefLevel = 20
2791 00:56:14.463387 TX Bit0 (983~1006) 24 994, Bit8 (979~999) 21 989,
2792 00:56:14.466263 TX Bit1 (982~1005) 24 993, Bit9 (979~999) 21 989,
2793 00:56:14.472890 TX Bit2 (980~1005) 26 992, Bit10 (983~1001) 19 992,
2794 00:56:14.476945 TX Bit3 (978~1001) 24 989, Bit11 (983~1002) 20 992,
2795 00:56:14.482904 TX Bit4 (981~1006) 26 993, Bit12 (983~1002) 20 992,
2796 00:56:14.486407 TX Bit5 (984~1006) 23 995, Bit13 (984~1001) 18 992,
2797 00:56:14.489919 TX Bit6 (983~1006) 24 994, Bit14 (983~1002) 20 992,
2798 00:56:14.496163 TX Bit7 (982~1006) 25 994, Bit15 (976~997) 22 986,
2799 00:56:14.496241
2800 00:56:14.496300 Write Rank0 MR14 =0x16
2801 00:56:14.506346
2802 00:56:14.509648 CH=1, VrefRange= 0, VrefLevel = 22
2803 00:56:14.513089 TX Bit0 (984~1007) 24 995, Bit8 (978~1000) 23 989,
2804 00:56:14.516033 TX Bit1 (982~1005) 24 993, Bit9 (978~999) 22 988,
2805 00:56:14.522612 TX Bit2 (980~1006) 27 993, Bit10 (983~1002) 20 992,
2806 00:56:14.525964 TX Bit3 (978~1001) 24 989, Bit11 (983~1003) 21 993,
2807 00:56:14.532891 TX Bit4 (981~1006) 26 993, Bit12 (983~1002) 20 992,
2808 00:56:14.535934 TX Bit5 (984~1006) 23 995, Bit13 (984~1002) 19 993,
2809 00:56:14.539550 TX Bit6 (983~1006) 24 994, Bit14 (982~1002) 21 992,
2810 00:56:14.546137 TX Bit7 (982~1006) 25 994, Bit15 (975~998) 24 986,
2811 00:56:14.546215
2812 00:56:14.546274 Write Rank0 MR14 =0x18
2813 00:56:14.556347
2814 00:56:14.559699 CH=1, VrefRange= 0, VrefLevel = 24
2815 00:56:14.562548 TX Bit0 (983~1007) 25 995, Bit8 (978~1000) 23 989,
2816 00:56:14.566023 TX Bit1 (981~1006) 26 993, Bit9 (978~1000) 23 989,
2817 00:56:14.573096 TX Bit2 (979~1006) 28 992, Bit10 (982~1002) 21 992,
2818 00:56:14.575985 TX Bit3 (978~1002) 25 990, Bit11 (983~1003) 21 993,
2819 00:56:14.583003 TX Bit4 (981~1007) 27 994, Bit12 (983~1003) 21 993,
2820 00:56:14.586022 TX Bit5 (983~1006) 24 994, Bit13 (983~1002) 20 992,
2821 00:56:14.589405 TX Bit6 (982~1007) 26 994, Bit14 (982~1002) 21 992,
2822 00:56:14.596077 TX Bit7 (981~1006) 26 993, Bit15 (975~998) 24 986,
2823 00:56:14.596154
2824 00:56:14.599063 Write Rank0 MR14 =0x1a
2825 00:56:14.606113
2826 00:56:14.609497 CH=1, VrefRange= 0, VrefLevel = 26
2827 00:56:14.612754 TX Bit0 (983~1007) 25 995, Bit8 (977~1000) 24 988,
2828 00:56:14.616085 TX Bit1 (981~1006) 26 993, Bit9 (977~1000) 24 988,
2829 00:56:14.622562 TX Bit2 (979~1006) 28 992, Bit10 (982~1003) 22 992,
2830 00:56:14.626535 TX Bit3 (978~1002) 25 990, Bit11 (982~1004) 23 993,
2831 00:56:14.633143 TX Bit4 (981~1007) 27 994, Bit12 (983~1004) 22 993,
2832 00:56:14.636322 TX Bit5 (983~1007) 25 995, Bit13 (983~1002) 20 992,
2833 00:56:14.639266 TX Bit6 (982~1007) 26 994, Bit14 (982~1002) 21 992,
2834 00:56:14.646015 TX Bit7 (981~1007) 27 994, Bit15 (974~998) 25 986,
2835 00:56:14.646093
2836 00:56:14.649391 Write Rank0 MR14 =0x1c
2837 00:56:14.656157
2838 00:56:14.659347 CH=1, VrefRange= 0, VrefLevel = 28
2839 00:56:14.662967 TX Bit0 (984~1007) 24 995, Bit8 (977~1001) 25 989,
2840 00:56:14.666584 TX Bit1 (980~1007) 28 993, Bit9 (977~1000) 24 988,
2841 00:56:14.672927 TX Bit2 (979~1006) 28 992, Bit10 (981~1003) 23 992,
2842 00:56:14.676232 TX Bit3 (977~1003) 27 990, Bit11 (982~1004) 23 993,
2843 00:56:14.682721 TX Bit4 (981~1007) 27 994, Bit12 (982~1003) 22 992,
2844 00:56:14.686476 TX Bit5 (983~1007) 25 995, Bit13 (983~1003) 21 993,
2845 00:56:14.689800 TX Bit6 (981~1007) 27 994, Bit14 (981~1003) 23 992,
2846 00:56:14.696617 TX Bit7 (980~1007) 28 993, Bit15 (974~999) 26 986,
2847 00:56:14.696698
2848 00:56:14.696757 Write Rank0 MR14 =0x1e
2849 00:56:14.706400
2850 00:56:14.709783 CH=1, VrefRange= 0, VrefLevel = 30
2851 00:56:14.712718 TX Bit0 (984~1007) 24 995, Bit8 (977~1001) 25 989,
2852 00:56:14.716504 TX Bit1 (980~1007) 28 993, Bit9 (977~1000) 24 988,
2853 00:56:14.722732 TX Bit2 (979~1006) 28 992, Bit10 (981~1003) 23 992,
2854 00:56:14.726526 TX Bit3 (977~1003) 27 990, Bit11 (982~1004) 23 993,
2855 00:56:14.732781 TX Bit4 (981~1007) 27 994, Bit12 (982~1003) 22 992,
2856 00:56:14.736021 TX Bit5 (983~1007) 25 995, Bit13 (983~1003) 21 993,
2857 00:56:14.739861 TX Bit6 (981~1007) 27 994, Bit14 (981~1003) 23 992,
2858 00:56:14.746254 TX Bit7 (980~1007) 28 993, Bit15 (974~999) 26 986,
2859 00:56:14.746332
2860 00:56:14.749162 Write Rank0 MR14 =0x20
2861 00:56:14.756224
2862 00:56:14.760009 CH=1, VrefRange= 0, VrefLevel = 32
2863 00:56:14.762963 TX Bit0 (984~1007) 24 995, Bit8 (977~1001) 25 989,
2864 00:56:14.766199 TX Bit1 (980~1007) 28 993, Bit9 (977~1000) 24 988,
2865 00:56:14.772847 TX Bit2 (979~1006) 28 992, Bit10 (981~1003) 23 992,
2866 00:56:14.776386 TX Bit3 (977~1003) 27 990, Bit11 (982~1004) 23 993,
2867 00:56:14.782930 TX Bit4 (981~1007) 27 994, Bit12 (982~1003) 22 992,
2868 00:56:14.786157 TX Bit5 (983~1007) 25 995, Bit13 (983~1003) 21 993,
2869 00:56:14.789596 TX Bit6 (981~1007) 27 994, Bit14 (981~1003) 23 992,
2870 00:56:14.796022 TX Bit7 (980~1007) 28 993, Bit15 (974~999) 26 986,
2871 00:56:14.796100
2872 00:56:14.799667 Write Rank0 MR14 =0x22
2873 00:56:14.806884
2874 00:56:14.810289 CH=1, VrefRange= 0, VrefLevel = 34
2875 00:56:14.813256 TX Bit0 (984~1007) 24 995, Bit8 (977~1001) 25 989,
2876 00:56:14.816570 TX Bit1 (980~1007) 28 993, Bit9 (977~1000) 24 988,
2877 00:56:14.823485 TX Bit2 (979~1006) 28 992, Bit10 (981~1003) 23 992,
2878 00:56:14.826799 TX Bit3 (977~1003) 27 990, Bit11 (982~1004) 23 993,
2879 00:56:14.833042 TX Bit4 (981~1007) 27 994, Bit12 (982~1003) 22 992,
2880 00:56:14.836852 TX Bit5 (983~1007) 25 995, Bit13 (983~1003) 21 993,
2881 00:56:14.839870 TX Bit6 (981~1007) 27 994, Bit14 (981~1003) 23 992,
2882 00:56:14.846730 TX Bit7 (980~1007) 28 993, Bit15 (974~999) 26 986,
2883 00:56:14.846808
2884 00:56:14.850098 Write Rank0 MR14 =0x24
2885 00:56:14.856977
2886 00:56:14.860151 CH=1, VrefRange= 0, VrefLevel = 36
2887 00:56:14.863170 TX Bit0 (984~1007) 24 995, Bit8 (977~1001) 25 989,
2888 00:56:14.866599 TX Bit1 (980~1007) 28 993, Bit9 (977~1000) 24 988,
2889 00:56:14.873282 TX Bit2 (979~1006) 28 992, Bit10 (981~1003) 23 992,
2890 00:56:14.876898 TX Bit3 (977~1003) 27 990, Bit11 (982~1004) 23 993,
2891 00:56:14.883568 TX Bit4 (981~1007) 27 994, Bit12 (982~1003) 22 992,
2892 00:56:14.886809 TX Bit5 (983~1007) 25 995, Bit13 (983~1003) 21 993,
2893 00:56:14.890248 TX Bit6 (981~1007) 27 994, Bit14 (981~1003) 23 992,
2894 00:56:14.896725 TX Bit7 (980~1007) 28 993, Bit15 (974~999) 26 986,
2895 00:56:14.896803
2896 00:56:14.896862
2897 00:56:14.900108 TX Vref found, early break! 374< 380
2898 00:56:14.903480 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =833/100 ps
2899 00:56:14.906998 u1DelayCellOfst[0]=5 cells (5 PI)
2900 00:56:14.909918 u1DelayCellOfst[1]=3 cells (3 PI)
2901 00:56:14.913736 u1DelayCellOfst[2]=2 cells (2 PI)
2902 00:56:14.916708 u1DelayCellOfst[3]=0 cells (0 PI)
2903 00:56:14.920426 u1DelayCellOfst[4]=4 cells (4 PI)
2904 00:56:14.923470 u1DelayCellOfst[5]=5 cells (5 PI)
2905 00:56:14.926671 u1DelayCellOfst[6]=4 cells (4 PI)
2906 00:56:14.930724 u1DelayCellOfst[7]=3 cells (3 PI)
2907 00:56:14.933528 Byte0, DQ PI dly=990, DQM PI dly= 992
2908 00:56:14.936974 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2909 00:56:14.937052
2910 00:56:14.939916 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2911 00:56:14.939993
2912 00:56:14.943507 u1DelayCellOfst[8]=3 cells (3 PI)
2913 00:56:14.946645 u1DelayCellOfst[9]=2 cells (2 PI)
2914 00:56:14.950013 u1DelayCellOfst[10]=7 cells (6 PI)
2915 00:56:14.953265 u1DelayCellOfst[11]=8 cells (7 PI)
2916 00:56:14.956831 u1DelayCellOfst[12]=7 cells (6 PI)
2917 00:56:14.960050 u1DelayCellOfst[13]=8 cells (7 PI)
2918 00:56:14.963415 u1DelayCellOfst[14]=7 cells (6 PI)
2919 00:56:14.966780 u1DelayCellOfst[15]=0 cells (0 PI)
2920 00:56:14.969802 Byte1, DQ PI dly=986, DQM PI dly= 989
2921 00:56:14.973742 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
2922 00:56:14.973819
2923 00:56:14.976733 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
2924 00:56:14.976810
2925 00:56:14.979938 Write Rank0 MR14 =0x1c
2926 00:56:14.980015
2927 00:56:14.983672 Final TX Range 0 Vref 28
2928 00:56:14.983773
2929 00:56:14.989985 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2930 00:56:14.990093
2931 00:56:14.996352 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2932 00:56:15.002907 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2933 00:56:15.009546 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2934 00:56:15.013028 Write Rank0 MR3 =0xb0
2935 00:56:15.013112 DramC Write-DBI on
2936 00:56:15.013173 ==
2937 00:56:15.019974 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2938 00:56:15.022921 fsp= 1, odt_onoff= 1, Byte mode= 0
2939 00:56:15.022998 ==
2940 00:56:15.026343 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2941 00:56:15.026443
2942 00:56:15.029634 Begin, DQ Scan Range 709~773
2943 00:56:15.029735
2944 00:56:15.029824
2945 00:56:15.033359 TX Vref Scan disable
2946 00:56:15.036666 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2947 00:56:15.039543 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2948 00:56:15.042802 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2949 00:56:15.046198 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2950 00:56:15.049624 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2951 00:56:15.052846 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2952 00:56:15.056312 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2953 00:56:15.059427 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2954 00:56:15.062938 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2955 00:56:15.066141 718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2956 00:56:15.069693 719 |2 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2957 00:56:15.072949 720 |2 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2958 00:56:15.076087 721 |2 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2959 00:56:15.079402 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2960 00:56:15.083100 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2961 00:56:15.085966 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2962 00:56:15.089582 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
2963 00:56:15.095960 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
2964 00:56:15.099356 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2965 00:56:15.106139 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2966 00:56:15.109382 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2967 00:56:15.112447 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2968 00:56:15.116027 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2969 00:56:15.119393 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2970 00:56:15.122779 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
2971 00:56:15.126174 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
2972 00:56:15.129162 753 |2 6 49|[0] xxxxxxxx xxxxxxxx [MSB]
2973 00:56:15.132697 Byte0, DQ PI dly=739, DQM PI dly= 739
2974 00:56:15.135878 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 35)
2975 00:56:15.135955
2976 00:56:15.142459 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 35)
2977 00:56:15.142536
2978 00:56:15.145971 Byte1, DQ PI dly=733, DQM PI dly= 733
2979 00:56:15.148930 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
2980 00:56:15.149019
2981 00:56:15.152165 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
2982 00:56:15.152277
2983 00:56:15.159558 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2984 00:56:15.165604 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2985 00:56:15.175553 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2986 00:56:15.175654 Write Rank0 MR3 =0x30
2987 00:56:15.178951 DramC Write-DBI off
2988 00:56:15.179027
2989 00:56:15.179087 [DATLAT]
2990 00:56:15.182641 Freq=1600, CH1 RK0, use_rxtx_scan=0
2991 00:56:15.182718
2992 00:56:15.185799 DATLAT Default: 0xf
2993 00:56:15.185875 7, 0xFFFF, sum=0
2994 00:56:15.189067 8, 0xFFFF, sum=0
2995 00:56:15.189145 9, 0xFFFF, sum=0
2996 00:56:15.192601 10, 0xFFFF, sum=0
2997 00:56:15.192679 11, 0xFFFF, sum=0
2998 00:56:15.192739 12, 0xFFFF, sum=0
2999 00:56:15.195491 13, 0xFFFF, sum=0
3000 00:56:15.195569 14, 0x0, sum=1
3001 00:56:15.199266 15, 0x0, sum=2
3002 00:56:15.199344 16, 0x0, sum=3
3003 00:56:15.202238 17, 0x0, sum=4
3004 00:56:15.205888 pattern=2 first_step=14 total pass=5 best_step=16
3005 00:56:15.205964 ==
3006 00:56:15.212077 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3007 00:56:15.212154 fsp= 1, odt_onoff= 1, Byte mode= 0
3008 00:56:15.215474 ==
3009 00:56:15.219023 Start DQ dly to find pass range UseTestEngine =1
3010 00:56:15.222158 x-axis: bit #, y-axis: DQ dly (-127~63)
3011 00:56:15.222235 RX Vref Scan = 1
3012 00:56:15.338615
3013 00:56:15.338717 RX Vref found, early break!
3014 00:56:15.338778
3015 00:56:15.345447 Final RX Vref 12, apply to both rank0 and 1
3016 00:56:15.345524 ==
3017 00:56:15.348902 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3018 00:56:15.352329 fsp= 1, odt_onoff= 1, Byte mode= 0
3019 00:56:15.352412 ==
3020 00:56:15.352473 DQS Delay:
3021 00:56:15.354997 DQS0 = 0, DQS1 = 0
3022 00:56:15.355073 DQM Delay:
3023 00:56:15.358707 DQM0 = 21, DQM1 = 19
3024 00:56:15.358783 DQ Delay:
3025 00:56:15.361656 DQ0 =23, DQ1 =21, DQ2 =20, DQ3 =19
3026 00:56:15.364941 DQ4 =21, DQ5 =23, DQ6 =24, DQ7 =22
3027 00:56:15.368606 DQ8 =18, DQ9 =17, DQ10 =21, DQ11 =22
3028 00:56:15.371531 DQ12 =22, DQ13 =22, DQ14 =21, DQ15 =15
3029 00:56:15.371628
3030 00:56:15.371689
3031 00:56:15.371760
3032 00:56:15.374876 [DramC_TX_OE_Calibration] TA2
3033 00:56:15.378311 Original DQ_B0 (3 6) =30, OEN = 27
3034 00:56:15.381751 Original DQ_B1 (3 6) =30, OEN = 27
3035 00:56:15.385174 23, 0x0, End_B0=23 End_B1=23
3036 00:56:15.385252 24, 0x0, End_B0=24 End_B1=24
3037 00:56:15.388493 25, 0x0, End_B0=25 End_B1=25
3038 00:56:15.391587 26, 0x0, End_B0=26 End_B1=26
3039 00:56:15.395033 27, 0x0, End_B0=27 End_B1=27
3040 00:56:15.398393 28, 0x0, End_B0=28 End_B1=28
3041 00:56:15.398471 29, 0x0, End_B0=29 End_B1=29
3042 00:56:15.401608 30, 0x0, End_B0=30 End_B1=30
3043 00:56:15.404924 31, 0xFFFF, End_B0=30 End_B1=30
3044 00:56:15.411561 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3045 00:56:15.414995 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3046 00:56:15.415072
3047 00:56:15.415150
3048 00:56:15.418187 Write Rank0 MR23 =0x3f
3049 00:56:15.418264 [DQSOSC]
3050 00:56:15.428310 [DQSOSCAuto] RK0, (LSB)MR18= 0xbdbd, (MSB)MR19= 0x202, tDQSOscB0 = 449 ps tDQSOscB1 = 449 ps
3051 00:56:15.434676 CH1_RK0: MR19=0x202, MR18=0xBDBD, DQSOSC=449, MR23=63, INC=12, DEC=18
3052 00:56:15.434752 Write Rank0 MR23 =0x3f
3053 00:56:15.434811 [DQSOSC]
3054 00:56:15.444916 [DQSOSCAuto] RK0, (LSB)MR18= 0xbebe, (MSB)MR19= 0x202, tDQSOscB0 = 448 ps tDQSOscB1 = 448 ps
3055 00:56:15.448040 CH1 RK0: MR19=202, MR18=BEBE
3056 00:56:15.451430 [RankSwap] Rank num 2, (Multi 1), Rank 1
3057 00:56:15.451507 Write Rank0 MR2 =0xad
3058 00:56:15.454900 [Write Leveling]
3059 00:56:15.458447 delay byte0 byte1 byte2 byte3
3060 00:56:15.458523
3061 00:56:15.458583 10 0 0
3062 00:56:15.461444 11 0 0
3063 00:56:15.461522 12 0 0
3064 00:56:15.461582 13 0 0
3065 00:56:15.464985 14 0 0
3066 00:56:15.465063 15 0 0
3067 00:56:15.468209 16 0 0
3068 00:56:15.468286 17 0 0
3069 00:56:15.468346 18 0 0
3070 00:56:15.471371 19 0 0
3071 00:56:15.471448 20 0 0
3072 00:56:15.474558 21 0 0
3073 00:56:15.474635 22 0 0
3074 00:56:15.478323 23 0 0
3075 00:56:15.478417 24 0 0
3076 00:56:15.478491 25 0 0
3077 00:56:15.481700 26 0 0
3078 00:56:15.481776 27 0 0
3079 00:56:15.484589 28 0 0
3080 00:56:15.484666 29 0 0
3081 00:56:15.484727 30 0 0
3082 00:56:15.487808 31 0 0
3083 00:56:15.487885 32 0 0
3084 00:56:15.491451 33 0 ff
3085 00:56:15.491529 34 0 ff
3086 00:56:15.494924 35 0 ff
3087 00:56:15.495001 36 0 ff
3088 00:56:15.495061 37 0 ff
3089 00:56:15.498384 38 ff ff
3090 00:56:15.498461 39 ff ff
3091 00:56:15.501582 40 ff ff
3092 00:56:15.501676 41 ff ff
3093 00:56:15.504327 42 ff ff
3094 00:56:15.504404 43 ff ff
3095 00:56:15.507914 44 ff ff
3096 00:56:15.511190 pass bytecount = 0xff (0xff: all bytes pass)
3097 00:56:15.511267
3098 00:56:15.511327 DQS0 dly: 38
3099 00:56:15.514717 DQS1 dly: 33
3100 00:56:15.514793 Write Rank0 MR2 =0x2d
3101 00:56:15.517873 [RankSwap] Rank num 2, (Multi 1), Rank 0
3102 00:56:15.520980 Write Rank1 MR1 =0xd6
3103 00:56:15.521056 [Gating]
3104 00:56:15.521116 ==
3105 00:56:15.527523 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3106 00:56:15.531473 fsp= 1, odt_onoff= 1, Byte mode= 0
3107 00:56:15.531551 ==
3108 00:56:15.534273 3 1 0 |3534 2d2c |(11 11)(11 11) |(0 0)(1 1)| 0
3109 00:56:15.537611 3 1 4 |3534 100 |(11 11)(11 11) |(1 1)(0 0)| 0
3110 00:56:15.544602 3 1 8 |3534 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3111 00:56:15.547758 3 1 12 |3534 b0a |(11 11)(11 11) |(1 1)(1 0)| 0
3112 00:56:15.550859 3 1 16 |3534 1818 |(11 11)(11 11) |(0 1)(1 1)| 0
3113 00:56:15.557241 3 1 20 |3534 3030 |(11 11)(10 10) |(0 1)(1 1)| 0
3114 00:56:15.560586 3 1 24 |3534 2323 |(11 11)(11 11) |(0 1)(0 1)| 0
3115 00:56:15.564026 3 1 28 |3534 f0e |(11 11)(11 11) |(0 1)(1 0)| 0
3116 00:56:15.570922 3 2 0 |3534 303 |(11 11)(11 11) |(0 1)(0 1)| 0
3117 00:56:15.574194 3 2 4 |3534 2f2e |(11 11)(11 11) |(0 1)(1 0)| 0
3118 00:56:15.577367 3 2 8 |3534 3030 |(11 11)(11 11) |(0 1)(1 1)| 0
3119 00:56:15.580598 [Byte 1] Lead/lag falling Transition (3, 2, 8)
3120 00:56:15.587516 3 2 12 |b0a 2f2f |(11 11)(0 0) |(1 1)(1 0)| 0
3121 00:56:15.591029 3 2 16 |403 2f2f |(11 11)(11 11) |(1 1)(0 1)| 0
3122 00:56:15.593822 [Byte 1] Lead/lag Transition tap number (3)
3123 00:56:15.600941 3 2 20 |3d3d 404 |(11 11)(11 11) |(1 1)(0 0)| 0
3124 00:56:15.604307 3 2 24 |3d3d 303 |(11 11)(11 11) |(1 1)(0 0)| 0
3125 00:56:15.607725 3 2 28 |3d3d 3736 |(11 11)(11 11) |(1 1)(0 0)| 0
3126 00:56:15.611025 3 3 0 |3d3d 3939 |(11 11)(10 10) |(1 1)(0 0)| 0
3127 00:56:15.617062 3 3 4 |3d3d 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
3128 00:56:15.620342 3 3 8 |3d3d 3636 |(11 11)(11 11) |(1 1)(1 1)| 0
3129 00:56:15.623826 3 3 12 |3d3d 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
3130 00:56:15.630325 3 3 16 |1211 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3131 00:56:15.633660 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3132 00:56:15.636948 [Byte 0] Lead/lag falling Transition (3, 3, 20)
3133 00:56:15.643791 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3134 00:56:15.647197 [Byte 1] Lead/lag falling Transition (3, 3, 24)
3135 00:56:15.650470 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3136 00:56:15.653647 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3137 00:56:15.660367 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3138 00:56:15.663604 3 4 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3139 00:56:15.666770 3 4 12 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3140 00:56:15.673518 3 4 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3141 00:56:15.676918 3 4 20 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
3142 00:56:15.680601 3 4 24 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3143 00:56:15.687291 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3144 00:56:15.690401 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3145 00:56:15.693499 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3146 00:56:15.699992 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3147 00:56:15.703532 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3148 00:56:15.706815 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3149 00:56:15.713464 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3150 00:56:15.716652 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3151 00:56:15.719987 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3152 00:56:15.726513 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3153 00:56:15.729845 [Byte 0] Lead/lag falling Transition (3, 6, 0)
3154 00:56:15.733251 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3155 00:56:15.736291 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3156 00:56:15.742949 [Byte 0] Lead/lag Transition tap number (3)
3157 00:56:15.746386 [Byte 1] Lead/lag falling Transition (3, 6, 8)
3158 00:56:15.750036 3 6 12 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3159 00:56:15.753200 [Byte 1] Lead/lag Transition tap number (2)
3160 00:56:15.759324 3 6 16 |1a1a 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
3161 00:56:15.762928 3 6 20 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
3162 00:56:15.766263 [Byte 0]First pass (3, 6, 20)
3163 00:56:15.769643 3 6 24 |4646 1414 |(0 0)(1 1) |(0 0)(0 0)| 0
3164 00:56:15.772736 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3165 00:56:15.776522 [Byte 1]First pass (3, 6, 28)
3166 00:56:15.779724 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3167 00:56:15.782933 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3168 00:56:15.789186 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3169 00:56:15.792500 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3170 00:56:15.796100 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3171 00:56:15.799267 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3172 00:56:15.802680 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3173 00:56:15.809401 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3174 00:56:15.812825 All bytes gating window > 1UI, Early break!
3175 00:56:15.812902
3176 00:56:15.816199 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
3177 00:56:15.816275
3178 00:56:15.819395 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 12)
3179 00:56:15.819472
3180 00:56:15.819534
3181 00:56:15.819589
3182 00:56:15.822810 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
3183 00:56:15.822886
3184 00:56:15.829647 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
3185 00:56:15.829724
3186 00:56:15.829783
3187 00:56:15.829838 Write Rank1 MR1 =0x56
3188 00:56:15.829891
3189 00:56:15.832937 best RODT dly(2T, 0.5T) = (2, 3)
3190 00:56:15.833013
3191 00:56:15.836381 best RODT dly(2T, 0.5T) = (2, 3)
3192 00:56:15.836457 ==
3193 00:56:15.842478 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3194 00:56:15.845883 fsp= 1, odt_onoff= 1, Byte mode= 0
3195 00:56:15.845959 ==
3196 00:56:15.849198 Start DQ dly to find pass range UseTestEngine =0
3197 00:56:15.852801 x-axis: bit #, y-axis: DQ dly (-127~63)
3198 00:56:15.855885 RX Vref Scan = 0
3199 00:56:15.855962 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3200 00:56:15.859521 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3201 00:56:15.862746 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3202 00:56:15.865710 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3203 00:56:15.869149 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3204 00:56:15.872557 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3205 00:56:15.876080 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3206 00:56:15.879193 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3207 00:56:15.879271 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3208 00:56:15.882953 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3209 00:56:15.885751 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3210 00:56:15.888962 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3211 00:56:15.892468 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3212 00:56:15.896000 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3213 00:56:15.898954 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3214 00:56:15.902557 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3215 00:56:15.905780 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3216 00:56:15.905858 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3217 00:56:15.908975 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3218 00:56:15.912399 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3219 00:56:15.916126 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3220 00:56:15.919005 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3221 00:56:15.922284 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3222 00:56:15.925648 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3223 00:56:15.925726 -2, [0] xxxxxxxx xxxxxxxx [MSB]
3224 00:56:15.929308 -1, [0] xxxxxxxx xxxxxxxx [MSB]
3225 00:56:15.932166 0, [0] xxxxxxxx xxxxxxxo [MSB]
3226 00:56:15.935921 1, [0] xxxxxxxx xoxxxxxo [MSB]
3227 00:56:15.938969 2, [0] xxxoxxxx ooxxxxxo [MSB]
3228 00:56:15.942146 3, [0] xxxoxxxx ooxxxxxo [MSB]
3229 00:56:15.942225 4, [0] xxooxxxx oooxxxxo [MSB]
3230 00:56:15.945628 5, [0] xxooxxxx oooxoxxo [MSB]
3231 00:56:15.948897 6, [0] xooooxxo oooooooo [MSB]
3232 00:56:15.952110 7, [0] xooooxxo oooooooo [MSB]
3233 00:56:15.955756 31, [0] oooooooo ooooooox [MSB]
3234 00:56:15.958693 32, [0] oooooooo ooooooox [MSB]
3235 00:56:15.958771 33, [0] oooooooo ooooooox [MSB]
3236 00:56:15.962137 34, [0] oooooooo oxooooox [MSB]
3237 00:56:15.965461 35, [0] oooxoooo xxooooox [MSB]
3238 00:56:15.968803 36, [0] ooxxoooo xxooooox [MSB]
3239 00:56:15.972445 37, [0] ooxxoooo xxooooox [MSB]
3240 00:56:15.975633 38, [0] ooxxxooo xxxoooox [MSB]
3241 00:56:15.979072 39, [0] ooxxxoox xxxxxxxx [MSB]
3242 00:56:15.979150 40, [0] oxxxxoox xxxxxxxx [MSB]
3243 00:56:15.982354 41, [0] xxxxxxox xxxxxxxx [MSB]
3244 00:56:15.985322 42, [0] xxxxxxxx xxxxxxxx [MSB]
3245 00:56:15.988836 iDelay=42, Bit 0, Center 24 (8 ~ 40) 33
3246 00:56:15.992157 iDelay=42, Bit 1, Center 22 (6 ~ 39) 34
3247 00:56:15.995510 iDelay=42, Bit 2, Center 19 (4 ~ 35) 32
3248 00:56:15.998567 iDelay=42, Bit 3, Center 18 (2 ~ 34) 33
3249 00:56:16.005410 iDelay=42, Bit 4, Center 21 (6 ~ 37) 32
3250 00:56:16.008444 iDelay=42, Bit 5, Center 24 (8 ~ 40) 33
3251 00:56:16.011822 iDelay=42, Bit 6, Center 24 (8 ~ 41) 34
3252 00:56:16.015127 iDelay=42, Bit 7, Center 22 (6 ~ 38) 33
3253 00:56:16.018770 iDelay=42, Bit 8, Center 18 (2 ~ 34) 33
3254 00:56:16.021597 iDelay=42, Bit 9, Center 17 (1 ~ 33) 33
3255 00:56:16.025202 iDelay=42, Bit 10, Center 20 (4 ~ 37) 34
3256 00:56:16.028669 iDelay=42, Bit 11, Center 22 (6 ~ 38) 33
3257 00:56:16.032163 iDelay=42, Bit 12, Center 21 (5 ~ 38) 34
3258 00:56:16.035475 iDelay=42, Bit 13, Center 22 (6 ~ 38) 33
3259 00:56:16.038527 iDelay=42, Bit 14, Center 22 (6 ~ 38) 33
3260 00:56:16.041724 iDelay=42, Bit 15, Center 15 (0 ~ 30) 31
3261 00:56:16.041826 ==
3262 00:56:16.048532 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3263 00:56:16.052030 fsp= 1, odt_onoff= 1, Byte mode= 0
3264 00:56:16.052106 ==
3265 00:56:16.052166 DQS Delay:
3266 00:56:16.054982 DQS0 = 0, DQS1 = 0
3267 00:56:16.055081 DQM Delay:
3268 00:56:16.058255 DQM0 = 21, DQM1 = 19
3269 00:56:16.058346 DQ Delay:
3270 00:56:16.061880 DQ0 =24, DQ1 =22, DQ2 =19, DQ3 =18
3271 00:56:16.065362 DQ4 =21, DQ5 =24, DQ6 =24, DQ7 =22
3272 00:56:16.068371 DQ8 =18, DQ9 =17, DQ10 =20, DQ11 =22
3273 00:56:16.071772 DQ12 =21, DQ13 =22, DQ14 =22, DQ15 =15
3274 00:56:16.071848
3275 00:56:16.071907
3276 00:56:16.074966 DramC Write-DBI off
3277 00:56:16.075042 ==
3278 00:56:16.078519 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3279 00:56:16.081381 fsp= 1, odt_onoff= 1, Byte mode= 0
3280 00:56:16.081457 ==
3281 00:56:16.085129 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3282 00:56:16.088157
3283 00:56:16.088232 Begin, DQ Scan Range 929~1185
3284 00:56:16.088293
3285 00:56:16.088347
3286 00:56:16.091312 TX Vref Scan disable
3287 00:56:16.095206 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3288 00:56:16.098228 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3289 00:56:16.101605 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3290 00:56:16.105059 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3291 00:56:16.108482 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3292 00:56:16.111241 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3293 00:56:16.114657 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3294 00:56:16.121613 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3295 00:56:16.124938 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3296 00:56:16.128085 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3297 00:56:16.131525 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3298 00:56:16.135006 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3299 00:56:16.137950 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3300 00:56:16.141149 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3301 00:56:16.144791 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3302 00:56:16.147742 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3303 00:56:16.151098 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3304 00:56:16.154575 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3305 00:56:16.157854 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3306 00:56:16.161255 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3307 00:56:16.164789 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3308 00:56:16.167980 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3309 00:56:16.174330 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3310 00:56:16.178005 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3311 00:56:16.181288 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3312 00:56:16.184537 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3313 00:56:16.187451 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3314 00:56:16.190919 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3315 00:56:16.194268 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3316 00:56:16.197703 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3317 00:56:16.200889 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3318 00:56:16.204152 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3319 00:56:16.208005 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3320 00:56:16.210982 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3321 00:56:16.214056 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3322 00:56:16.217545 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3323 00:56:16.220898 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3324 00:56:16.224140 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3325 00:56:16.227622 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3326 00:56:16.230569 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3327 00:56:16.233769 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3328 00:56:16.240690 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3329 00:56:16.244256 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3330 00:56:16.246988 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3331 00:56:16.250527 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3332 00:56:16.254099 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
3333 00:56:16.257063 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
3334 00:56:16.260616 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
3335 00:56:16.263851 977 |3 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
3336 00:56:16.267151 978 |3 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
3337 00:56:16.270737 979 |3 6 19|[0] xxxxxxxx ooxxxxxo [MSB]
3338 00:56:16.273826 980 |3 6 20|[0] xxxxxxxx ooxxxxxo [MSB]
3339 00:56:16.277258 981 |3 6 21|[0] xxxxxxxx oooxxxoo [MSB]
3340 00:56:16.280286 982 |3 6 22|[0] xxxxxxxx ooooxxoo [MSB]
3341 00:56:16.283676 983 |3 6 23|[0] xxxxxxxx oooooooo [MSB]
3342 00:56:16.287088 984 |3 6 24|[0] xxxxxxxo oooooooo [MSB]
3343 00:56:16.295242 995 |3 6 35|[0] oooooooo ooooooox [MSB]
3344 00:56:16.298583 996 |3 6 36|[0] oooooooo ooooooox [MSB]
3345 00:56:16.301693 997 |3 6 37|[0] oooooooo oxooooox [MSB]
3346 00:56:16.305311 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3347 00:56:16.308578 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
3348 00:56:16.312062 1000 |3 6 40|[0] oooooooo xxxxxxxx [MSB]
3349 00:56:16.315236 1001 |3 6 41|[0] oooooooo xxxxxxxx [MSB]
3350 00:56:16.318508 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
3351 00:56:16.321496 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
3352 00:56:16.324915 1004 |3 6 44|[0] oooxoooo xxxxxxxx [MSB]
3353 00:56:16.328146 1005 |3 6 45|[0] ooxxoooo xxxxxxxx [MSB]
3354 00:56:16.331848 1006 |3 6 46|[0] oxxxooox xxxxxxxx [MSB]
3355 00:56:16.338216 1007 |3 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3356 00:56:16.341431 Byte0, DQ PI dly=994, DQM PI dly= 994
3357 00:56:16.345078 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 34)
3358 00:56:16.345155
3359 00:56:16.348176 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 34)
3360 00:56:16.348312
3361 00:56:16.351488 Byte1, DQ PI dly=988, DQM PI dly= 988
3362 00:56:16.358464 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3363 00:56:16.358542
3364 00:56:16.361675 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3365 00:56:16.361779
3366 00:56:16.361865 ==
3367 00:56:16.365098 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3368 00:56:16.368486 fsp= 1, odt_onoff= 1, Byte mode= 0
3369 00:56:16.371809 ==
3370 00:56:16.375353 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3371 00:56:16.375431
3372 00:56:16.378137 Begin, DQ Scan Range 964~1028
3373 00:56:16.378215 Write Rank1 MR14 =0x0
3374 00:56:16.387142
3375 00:56:16.387219 CH=1, VrefRange= 0, VrefLevel = 0
3376 00:56:16.393433 TX Bit0 (987~1000) 14 993, Bit8 (981~992) 12 986,
3377 00:56:16.397025 TX Bit1 (986~999) 14 992, Bit9 (982~992) 11 987,
3378 00:56:16.403493 TX Bit2 (984~999) 16 991, Bit10 (984~994) 11 989,
3379 00:56:16.406907 TX Bit3 (982~995) 14 988, Bit11 (984~997) 14 990,
3380 00:56:16.410492 TX Bit4 (985~1001) 17 993, Bit12 (984~995) 12 989,
3381 00:56:16.416581 TX Bit5 (987~999) 13 993, Bit13 (985~995) 11 990,
3382 00:56:16.420486 TX Bit6 (986~1000) 15 993, Bit14 (984~996) 13 990,
3383 00:56:16.426675 TX Bit7 (986~1000) 15 993, Bit15 (977~990) 14 983,
3384 00:56:16.426768
3385 00:56:16.426859 Write Rank1 MR14 =0x2
3386 00:56:16.435257
3387 00:56:16.435333 CH=1, VrefRange= 0, VrefLevel = 2
3388 00:56:16.441763 TX Bit0 (987~1001) 15 994, Bit8 (980~993) 14 986,
3389 00:56:16.445338 TX Bit1 (986~1000) 15 993, Bit9 (982~992) 11 987,
3390 00:56:16.452091 TX Bit2 (984~999) 16 991, Bit10 (984~996) 13 990,
3391 00:56:16.455157 TX Bit3 (982~996) 15 989, Bit11 (984~998) 15 991,
3392 00:56:16.458640 TX Bit4 (985~1002) 18 993, Bit12 (984~996) 13 990,
3393 00:56:16.464856 TX Bit5 (986~1000) 15 993, Bit13 (985~995) 11 990,
3394 00:56:16.468276 TX Bit6 (986~1001) 16 993, Bit14 (984~996) 13 990,
3395 00:56:16.474894 TX Bit7 (985~1000) 16 992, Bit15 (977~991) 15 984,
3396 00:56:16.474971
3397 00:56:16.475031 Write Rank1 MR14 =0x4
3398 00:56:16.484196
3399 00:56:16.484272 CH=1, VrefRange= 0, VrefLevel = 4
3400 00:56:16.490219 TX Bit0 (986~1002) 17 994, Bit8 (980~993) 14 986,
3401 00:56:16.493671 TX Bit1 (985~1000) 16 992, Bit9 (980~992) 13 986,
3402 00:56:16.500419 TX Bit2 (983~1000) 18 991, Bit10 (983~997) 15 990,
3403 00:56:16.503829 TX Bit3 (981~997) 17 989, Bit11 (984~999) 16 991,
3404 00:56:16.506779 TX Bit4 (985~1003) 19 994, Bit12 (984~998) 15 991,
3405 00:56:16.514112 TX Bit5 (986~1001) 16 993, Bit13 (985~997) 13 991,
3406 00:56:16.516962 TX Bit6 (985~1001) 17 993, Bit14 (983~997) 15 990,
3407 00:56:16.523932 TX Bit7 (985~1001) 17 993, Bit15 (977~991) 15 984,
3408 00:56:16.524009
3409 00:56:16.524069 Write Rank1 MR14 =0x6
3410 00:56:16.532832
3411 00:56:16.532909 CH=1, VrefRange= 0, VrefLevel = 6
3412 00:56:16.539384 TX Bit0 (986~1003) 18 994, Bit8 (979~994) 16 986,
3413 00:56:16.542485 TX Bit1 (985~1001) 17 993, Bit9 (981~993) 13 987,
3414 00:56:16.549286 TX Bit2 (983~1000) 18 991, Bit10 (983~998) 16 990,
3415 00:56:16.552759 TX Bit3 (980~998) 19 989, Bit11 (983~999) 17 991,
3416 00:56:16.555992 TX Bit4 (984~1003) 20 993, Bit12 (984~998) 15 991,
3417 00:56:16.562474 TX Bit5 (986~1002) 17 994, Bit13 (984~998) 15 991,
3418 00:56:16.566138 TX Bit6 (985~1002) 18 993, Bit14 (984~998) 15 991,
3419 00:56:16.572558 TX Bit7 (985~1002) 18 993, Bit15 (976~992) 17 984,
3420 00:56:16.572636
3421 00:56:16.572695 Write Rank1 MR14 =0x8
3422 00:56:16.581410
3423 00:56:16.581489 CH=1, VrefRange= 0, VrefLevel = 8
3424 00:56:16.588152 TX Bit0 (986~1004) 19 995, Bit8 (980~994) 15 987,
3425 00:56:16.591561 TX Bit1 (985~1002) 18 993, Bit9 (979~993) 15 986,
3426 00:56:16.598339 TX Bit2 (982~1001) 20 991, Bit10 (982~998) 17 990,
3427 00:56:16.601753 TX Bit3 (980~999) 20 989, Bit11 (983~999) 17 991,
3428 00:56:16.605336 TX Bit4 (984~1004) 21 994, Bit12 (984~998) 15 991,
3429 00:56:16.611674 TX Bit5 (985~1003) 19 994, Bit13 (984~999) 16 991,
3430 00:56:16.615176 TX Bit6 (985~1003) 19 994, Bit14 (983~998) 16 990,
3431 00:56:16.621138 TX Bit7 (984~1002) 19 993, Bit15 (975~992) 18 983,
3432 00:56:16.621215
3433 00:56:16.621275 Write Rank1 MR14 =0xa
3434 00:56:16.630410
3435 00:56:16.634456 CH=1, VrefRange= 0, VrefLevel = 10
3436 00:56:16.637408 TX Bit0 (986~1005) 20 995, Bit8 (979~995) 17 987,
3437 00:56:16.640661 TX Bit1 (985~1003) 19 994, Bit9 (979~994) 16 986,
3438 00:56:16.647482 TX Bit2 (982~1002) 21 992, Bit10 (982~999) 18 990,
3439 00:56:16.650622 TX Bit3 (979~999) 21 989, Bit11 (983~1000) 18 991,
3440 00:56:16.654116 TX Bit4 (984~1005) 22 994, Bit12 (983~999) 17 991,
3441 00:56:16.660626 TX Bit5 (985~1003) 19 994, Bit13 (984~999) 16 991,
3442 00:56:16.664205 TX Bit6 (984~1004) 21 994, Bit14 (983~999) 17 991,
3443 00:56:16.670664 TX Bit7 (984~1004) 21 994, Bit15 (975~993) 19 984,
3444 00:56:16.670736
3445 00:56:16.670827 Write Rank1 MR14 =0xc
3446 00:56:16.679864
3447 00:56:16.683116 CH=1, VrefRange= 0, VrefLevel = 12
3448 00:56:16.686272 TX Bit0 (985~1005) 21 995, Bit8 (978~996) 19 987,
3449 00:56:16.689533 TX Bit1 (984~1004) 21 994, Bit9 (979~994) 16 986,
3450 00:56:16.696128 TX Bit2 (982~1003) 22 992, Bit10 (981~999) 19 990,
3451 00:56:16.699686 TX Bit3 (980~1000) 21 990, Bit11 (983~1000) 18 991,
3452 00:56:16.706337 TX Bit4 (984~1005) 22 994, Bit12 (983~999) 17 991,
3453 00:56:16.709771 TX Bit5 (985~1004) 20 994, Bit13 (983~999) 17 991,
3454 00:56:16.712803 TX Bit6 (984~1005) 22 994, Bit14 (983~999) 17 991,
3455 00:56:16.719723 TX Bit7 (984~1004) 21 994, Bit15 (975~993) 19 984,
3456 00:56:16.719800
3457 00:56:16.719860 Write Rank1 MR14 =0xe
3458 00:56:16.729322
3459 00:56:16.732297 CH=1, VrefRange= 0, VrefLevel = 14
3460 00:56:16.736283 TX Bit0 (985~1006) 22 995, Bit8 (978~996) 19 987,
3461 00:56:16.739312 TX Bit1 (984~1004) 21 994, Bit9 (978~995) 18 986,
3462 00:56:16.746230 TX Bit2 (981~1004) 24 992, Bit10 (981~999) 19 990,
3463 00:56:16.749531 TX Bit3 (979~1000) 22 989, Bit11 (982~1000) 19 991,
3464 00:56:16.755831 TX Bit4 (983~1006) 24 994, Bit12 (983~1000) 18 991,
3465 00:56:16.759377 TX Bit5 (985~1005) 21 995, Bit13 (983~1000) 18 991,
3466 00:56:16.762569 TX Bit6 (984~1005) 22 994, Bit14 (982~999) 18 990,
3467 00:56:16.768932 TX Bit7 (984~1005) 22 994, Bit15 (975~994) 20 984,
3468 00:56:16.769009
3469 00:56:16.769068 Write Rank1 MR14 =0x10
3470 00:56:16.779449
3471 00:56:16.782217 CH=1, VrefRange= 0, VrefLevel = 16
3472 00:56:16.785823 TX Bit0 (985~1006) 22 995, Bit8 (977~998) 22 987,
3473 00:56:16.789190 TX Bit1 (984~1005) 22 994, Bit9 (978~996) 19 987,
3474 00:56:16.795563 TX Bit2 (981~1005) 25 993, Bit10 (981~999) 19 990,
3475 00:56:16.799218 TX Bit3 (979~1001) 23 990, Bit11 (982~1001) 20 991,
3476 00:56:16.802496 TX Bit4 (983~1006) 24 994, Bit12 (983~1000) 18 991,
3477 00:56:16.808968 TX Bit5 (984~1006) 23 995, Bit13 (983~1000) 18 991,
3478 00:56:16.812412 TX Bit6 (984~1006) 23 995, Bit14 (982~1000) 19 991,
3479 00:56:16.818774 TX Bit7 (984~1005) 22 994, Bit15 (974~994) 21 984,
3480 00:56:16.818874
3481 00:56:16.818935 Write Rank1 MR14 =0x12
3482 00:56:16.828769
3483 00:56:16.832142 CH=1, VrefRange= 0, VrefLevel = 18
3484 00:56:16.835759 TX Bit0 (985~1006) 22 995, Bit8 (977~998) 22 987,
3485 00:56:16.839105 TX Bit1 (984~1005) 22 994, Bit9 (978~997) 20 987,
3486 00:56:16.845486 TX Bit2 (980~1005) 26 992, Bit10 (980~1000) 21 990,
3487 00:56:16.848801 TX Bit3 (979~1002) 24 990, Bit11 (982~1001) 20 991,
3488 00:56:16.855604 TX Bit4 (983~1006) 24 994, Bit12 (983~1000) 18 991,
3489 00:56:16.858800 TX Bit5 (984~1006) 23 995, Bit13 (983~1000) 18 991,
3490 00:56:16.862097 TX Bit6 (983~1006) 24 994, Bit14 (981~1000) 20 990,
3491 00:56:16.868652 TX Bit7 (983~1006) 24 994, Bit15 (974~995) 22 984,
3492 00:56:16.868728
3493 00:56:16.868788 Write Rank1 MR14 =0x14
3494 00:56:16.879118
3495 00:56:16.882239 CH=1, VrefRange= 0, VrefLevel = 20
3496 00:56:16.885327 TX Bit0 (985~1006) 22 995, Bit8 (977~998) 22 987,
3497 00:56:16.889104 TX Bit1 (983~1006) 24 994, Bit9 (977~998) 22 987,
3498 00:56:16.895488 TX Bit2 (980~1005) 26 992, Bit10 (980~1000) 21 990,
3499 00:56:16.899105 TX Bit3 (979~1002) 24 990, Bit11 (981~1001) 21 991,
3500 00:56:16.905624 TX Bit4 (982~1007) 26 994, Bit12 (983~1001) 19 992,
3501 00:56:16.908613 TX Bit5 (984~1006) 23 995, Bit13 (982~1001) 20 991,
3502 00:56:16.912041 TX Bit6 (983~1006) 24 994, Bit14 (981~1000) 20 990,
3503 00:56:16.918838 TX Bit7 (983~1006) 24 994, Bit15 (973~996) 24 984,
3504 00:56:16.918915
3505 00:56:16.921760 Write Rank1 MR14 =0x16
3506 00:56:16.928906
3507 00:56:16.932156 CH=1, VrefRange= 0, VrefLevel = 22
3508 00:56:16.935487 TX Bit0 (984~1007) 24 995, Bit8 (976~999) 24 987,
3509 00:56:16.938821 TX Bit1 (983~1006) 24 994, Bit9 (977~998) 22 987,
3510 00:56:16.945575 TX Bit2 (980~1006) 27 993, Bit10 (979~1000) 22 989,
3511 00:56:16.949137 TX Bit3 (979~1003) 25 991, Bit11 (980~1002) 23 991,
3512 00:56:16.955935 TX Bit4 (982~1007) 26 994, Bit12 (982~1001) 20 991,
3513 00:56:16.958779 TX Bit5 (983~1006) 24 994, Bit13 (982~1001) 20 991,
3514 00:56:16.962173 TX Bit6 (982~1006) 25 994, Bit14 (981~1000) 20 990,
3515 00:56:16.969100 TX Bit7 (983~1006) 24 994, Bit15 (973~996) 24 984,
3516 00:56:16.969177
3517 00:56:16.969236 Write Rank1 MR14 =0x18
3518 00:56:16.979071
3519 00:56:16.982779 CH=1, VrefRange= 0, VrefLevel = 24
3520 00:56:16.985877 TX Bit0 (984~1007) 24 995, Bit8 (976~999) 24 987,
3521 00:56:16.988953 TX Bit1 (983~1006) 24 994, Bit9 (976~998) 23 987,
3522 00:56:16.996002 TX Bit2 (979~1006) 28 992, Bit10 (979~1001) 23 990,
3523 00:56:16.999410 TX Bit3 (978~1003) 26 990, Bit11 (980~1002) 23 991,
3524 00:56:17.005597 TX Bit4 (981~1007) 27 994, Bit12 (982~1001) 20 991,
3525 00:56:17.008890 TX Bit5 (984~1007) 24 995, Bit13 (982~1002) 21 992,
3526 00:56:17.012240 TX Bit6 (982~1007) 26 994, Bit14 (980~1001) 22 990,
3527 00:56:17.019273 TX Bit7 (982~1007) 26 994, Bit15 (972~997) 26 984,
3528 00:56:17.019362
3529 00:56:17.019436 Write Rank1 MR14 =0x1a
3530 00:56:17.029477
3531 00:56:17.032490 CH=1, VrefRange= 0, VrefLevel = 26
3532 00:56:17.035618 TX Bit0 (984~1007) 24 995, Bit8 (976~999) 24 987,
3533 00:56:17.038945 TX Bit1 (983~1007) 25 995, Bit9 (976~999) 24 987,
3534 00:56:17.045738 TX Bit2 (979~1006) 28 992, Bit10 (979~1001) 23 990,
3535 00:56:17.049279 TX Bit3 (978~1004) 27 991, Bit11 (980~1002) 23 991,
3536 00:56:17.056058 TX Bit4 (981~1007) 27 994, Bit12 (981~1002) 22 991,
3537 00:56:17.059080 TX Bit5 (983~1007) 25 995, Bit13 (981~1002) 22 991,
3538 00:56:17.062538 TX Bit6 (982~1007) 26 994, Bit14 (979~1001) 23 990,
3539 00:56:17.068779 TX Bit7 (981~1007) 27 994, Bit15 (972~998) 27 985,
3540 00:56:17.068905
3541 00:56:17.068979 Write Rank1 MR14 =0x1c
3542 00:56:17.079406
3543 00:56:17.082530 CH=1, VrefRange= 0, VrefLevel = 28
3544 00:56:17.085659 TX Bit0 (983~1007) 25 995, Bit8 (976~999) 24 987,
3545 00:56:17.089038 TX Bit1 (982~1007) 26 994, Bit9 (976~999) 24 987,
3546 00:56:17.095686 TX Bit2 (979~1006) 28 992, Bit10 (978~1001) 24 989,
3547 00:56:17.099473 TX Bit3 (978~1005) 28 991, Bit11 (979~1002) 24 990,
3548 00:56:17.105937 TX Bit4 (981~1007) 27 994, Bit12 (981~1002) 22 991,
3549 00:56:17.109479 TX Bit5 (983~1007) 25 995, Bit13 (981~1002) 22 991,
3550 00:56:17.112919 TX Bit6 (981~1007) 27 994, Bit14 (979~1001) 23 990,
3551 00:56:17.118951 TX Bit7 (982~1007) 26 994, Bit15 (972~997) 26 984,
3552 00:56:17.119057
3553 00:56:17.119145 Write Rank1 MR14 =0x1e
3554 00:56:17.129475
3555 00:56:17.132531 CH=1, VrefRange= 0, VrefLevel = 30
3556 00:56:17.135991 TX Bit0 (983~1007) 25 995, Bit8 (976~999) 24 987,
3557 00:56:17.139450 TX Bit1 (982~1007) 26 994, Bit9 (976~999) 24 987,
3558 00:56:17.145711 TX Bit2 (979~1006) 28 992, Bit10 (978~1002) 25 990,
3559 00:56:17.149448 TX Bit3 (978~1004) 27 991, Bit11 (979~1002) 24 990,
3560 00:56:17.155902 TX Bit4 (982~1007) 26 994, Bit12 (980~1002) 23 991,
3561 00:56:17.159328 TX Bit5 (982~1007) 26 994, Bit13 (980~1002) 23 991,
3562 00:56:17.162369 TX Bit6 (981~1007) 27 994, Bit14 (980~1001) 22 990,
3563 00:56:17.169255 TX Bit7 (981~1007) 27 994, Bit15 (972~998) 27 985,
3564 00:56:17.169356
3565 00:56:17.169454 Write Rank1 MR14 =0x20
3566 00:56:17.179447
3567 00:56:17.183077 CH=1, VrefRange= 0, VrefLevel = 32
3568 00:56:17.186409 TX Bit0 (983~1007) 25 995, Bit8 (976~999) 24 987,
3569 00:56:17.189400 TX Bit1 (982~1007) 26 994, Bit9 (976~999) 24 987,
3570 00:56:17.196378 TX Bit2 (979~1006) 28 992, Bit10 (978~1002) 25 990,
3571 00:56:17.199386 TX Bit3 (978~1004) 27 991, Bit11 (979~1002) 24 990,
3572 00:56:17.205802 TX Bit4 (982~1007) 26 994, Bit12 (980~1002) 23 991,
3573 00:56:17.209160 TX Bit5 (982~1007) 26 994, Bit13 (980~1002) 23 991,
3574 00:56:17.212714 TX Bit6 (981~1007) 27 994, Bit14 (980~1001) 22 990,
3575 00:56:17.219158 TX Bit7 (981~1007) 27 994, Bit15 (972~998) 27 985,
3576 00:56:17.219257
3577 00:56:17.222441 Write Rank1 MR14 =0x22
3578 00:56:17.230041
3579 00:56:17.233007 CH=1, VrefRange= 0, VrefLevel = 34
3580 00:56:17.236749 TX Bit0 (983~1007) 25 995, Bit8 (976~999) 24 987,
3581 00:56:17.239767 TX Bit1 (982~1007) 26 994, Bit9 (976~999) 24 987,
3582 00:56:17.246847 TX Bit2 (979~1006) 28 992, Bit10 (978~1002) 25 990,
3583 00:56:17.249618 TX Bit3 (978~1004) 27 991, Bit11 (979~1002) 24 990,
3584 00:56:17.256591 TX Bit4 (982~1007) 26 994, Bit12 (980~1002) 23 991,
3585 00:56:17.259358 TX Bit5 (982~1007) 26 994, Bit13 (980~1002) 23 991,
3586 00:56:17.262755 TX Bit6 (981~1007) 27 994, Bit14 (980~1001) 22 990,
3587 00:56:17.269629 TX Bit7 (981~1007) 27 994, Bit15 (972~998) 27 985,
3588 00:56:17.269734
3589 00:56:17.269821 Write Rank1 MR14 =0x24
3590 00:56:17.279842
3591 00:56:17.283583 CH=1, VrefRange= 0, VrefLevel = 36
3592 00:56:17.286931 TX Bit0 (983~1007) 25 995, Bit8 (976~999) 24 987,
3593 00:56:17.290376 TX Bit1 (982~1007) 26 994, Bit9 (976~999) 24 987,
3594 00:56:17.296712 TX Bit2 (979~1006) 28 992, Bit10 (978~1002) 25 990,
3595 00:56:17.300148 TX Bit3 (978~1004) 27 991, Bit11 (979~1002) 24 990,
3596 00:56:17.307099 TX Bit4 (982~1007) 26 994, Bit12 (980~1002) 23 991,
3597 00:56:17.310074 TX Bit5 (982~1007) 26 994, Bit13 (980~1002) 23 991,
3598 00:56:17.313294 TX Bit6 (981~1007) 27 994, Bit14 (980~1001) 22 990,
3599 00:56:17.320205 TX Bit7 (981~1007) 27 994, Bit15 (972~998) 27 985,
3600 00:56:17.320307
3601 00:56:17.320393 Write Rank1 MR14 =0x26
3602 00:56:17.329915
3603 00:56:17.333216 CH=1, VrefRange= 0, VrefLevel = 38
3604 00:56:17.336996 TX Bit0 (983~1007) 25 995, Bit8 (976~999) 24 987,
3605 00:56:17.340561 TX Bit1 (982~1007) 26 994, Bit9 (976~999) 24 987,
3606 00:56:17.346690 TX Bit2 (979~1006) 28 992, Bit10 (978~1002) 25 990,
3607 00:56:17.349743 TX Bit3 (978~1004) 27 991, Bit11 (979~1002) 24 990,
3608 00:56:17.356559 TX Bit4 (982~1007) 26 994, Bit12 (980~1002) 23 991,
3609 00:56:17.359925 TX Bit5 (982~1007) 26 994, Bit13 (980~1002) 23 991,
3610 00:56:17.363661 TX Bit6 (981~1007) 27 994, Bit14 (980~1001) 22 990,
3611 00:56:17.369690 TX Bit7 (981~1007) 27 994, Bit15 (972~998) 27 985,
3612 00:56:17.369792
3613 00:56:17.369878
3614 00:56:17.373134 TX Vref found, early break! 376< 383
3615 00:56:17.376656 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =833/100 ps
3616 00:56:17.380130 u1DelayCellOfst[0]=4 cells (4 PI)
3617 00:56:17.383493 u1DelayCellOfst[1]=3 cells (3 PI)
3618 00:56:17.386367 u1DelayCellOfst[2]=1 cells (1 PI)
3619 00:56:17.389737 u1DelayCellOfst[3]=0 cells (0 PI)
3620 00:56:17.393562 u1DelayCellOfst[4]=3 cells (3 PI)
3621 00:56:17.396416 u1DelayCellOfst[5]=3 cells (3 PI)
3622 00:56:17.399846 u1DelayCellOfst[6]=3 cells (3 PI)
3623 00:56:17.403110 u1DelayCellOfst[7]=3 cells (3 PI)
3624 00:56:17.406750 Byte0, DQ PI dly=991, DQM PI dly= 993
3625 00:56:17.409695 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
3626 00:56:17.409772
3627 00:56:17.413010 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
3628 00:56:17.413111
3629 00:56:17.416951 u1DelayCellOfst[8]=2 cells (2 PI)
3630 00:56:17.419904 u1DelayCellOfst[9]=2 cells (2 PI)
3631 00:56:17.423053 u1DelayCellOfst[10]=5 cells (5 PI)
3632 00:56:17.426442 u1DelayCellOfst[11]=5 cells (5 PI)
3633 00:56:17.429900 u1DelayCellOfst[12]=7 cells (6 PI)
3634 00:56:17.432880 u1DelayCellOfst[13]=7 cells (6 PI)
3635 00:56:17.436467 u1DelayCellOfst[14]=5 cells (5 PI)
3636 00:56:17.439553 u1DelayCellOfst[15]=0 cells (0 PI)
3637 00:56:17.442707 Byte1, DQ PI dly=985, DQM PI dly= 988
3638 00:56:17.446160 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
3639 00:56:17.446238
3640 00:56:17.449548 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
3641 00:56:17.449625
3642 00:56:17.452807 Write Rank1 MR14 =0x1e
3643 00:56:17.452883
3644 00:56:17.456061 Final TX Range 0 Vref 30
3645 00:56:17.456137
3646 00:56:17.462917 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3647 00:56:17.462998
3648 00:56:17.469766 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3649 00:56:17.476026 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3650 00:56:17.482453 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3651 00:56:17.486078 Write Rank1 MR3 =0xb0
3652 00:56:17.486154 DramC Write-DBI on
3653 00:56:17.486213 ==
3654 00:56:17.492401 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3655 00:56:17.495935 fsp= 1, odt_onoff= 1, Byte mode= 0
3656 00:56:17.496011 ==
3657 00:56:17.499128 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3658 00:56:17.499230
3659 00:56:17.502267 Begin, DQ Scan Range 708~772
3660 00:56:17.502342
3661 00:56:17.502401
3662 00:56:17.505968 TX Vref Scan disable
3663 00:56:17.508743 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3664 00:56:17.512305 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3665 00:56:17.515901 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3666 00:56:17.519133 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3667 00:56:17.522419 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3668 00:56:17.525939 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3669 00:56:17.528886 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3670 00:56:17.532085 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3671 00:56:17.535399 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3672 00:56:17.538803 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3673 00:56:17.542312 718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
3674 00:56:17.545611 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3675 00:56:17.548834 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3676 00:56:17.551772 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3677 00:56:17.558898 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3678 00:56:17.561835 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3679 00:56:17.565846 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3680 00:56:17.568400 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
3681 00:56:17.571648 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
3682 00:56:17.579164 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3683 00:56:17.582416 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3684 00:56:17.585922 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3685 00:56:17.588785 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3686 00:56:17.592310 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3687 00:56:17.595724 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3688 00:56:17.599069 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3689 00:56:17.602105 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
3690 00:56:17.605535 753 |2 6 49|[0] xxxxxxxx xxxxxxxx [MSB]
3691 00:56:17.608984 Byte0, DQ PI dly=739, DQM PI dly= 739
3692 00:56:17.612345 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 35)
3693 00:56:17.612422
3694 00:56:17.618636 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 35)
3695 00:56:17.618714
3696 00:56:17.622555 Byte1, DQ PI dly=731, DQM PI dly= 731
3697 00:56:17.625612 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
3698 00:56:17.625688
3699 00:56:17.628886 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
3700 00:56:17.632480
3701 00:56:17.635856 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3702 00:56:17.645562 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3703 00:56:17.652384 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3704 00:56:17.652461 Write Rank1 MR3 =0x30
3705 00:56:17.655738 DramC Write-DBI off
3706 00:56:17.655851
3707 00:56:17.655909 [DATLAT]
3708 00:56:17.658797 Freq=1600, CH1 RK1, use_rxtx_scan=0
3709 00:56:17.658872
3710 00:56:17.661819 DATLAT Default: 0x10
3711 00:56:17.661918 7, 0xFFFF, sum=0
3712 00:56:17.665526 8, 0xFFFF, sum=0
3713 00:56:17.665602 9, 0xFFFF, sum=0
3714 00:56:17.668594 10, 0xFFFF, sum=0
3715 00:56:17.668671 11, 0xFFFF, sum=0
3716 00:56:17.672191 12, 0xFFFF, sum=0
3717 00:56:17.672285 13, 0xFFFF, sum=0
3718 00:56:17.672360 14, 0x0, sum=1
3719 00:56:17.675219 15, 0x0, sum=2
3720 00:56:17.675298 16, 0x0, sum=3
3721 00:56:17.678570 17, 0x0, sum=4
3722 00:56:17.682220 pattern=2 first_step=14 total pass=5 best_step=16
3723 00:56:17.682300 ==
3724 00:56:17.688546 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3725 00:56:17.691778 fsp= 1, odt_onoff= 1, Byte mode= 0
3726 00:56:17.691855 ==
3727 00:56:17.695216 Start DQ dly to find pass range UseTestEngine =1
3728 00:56:17.698849 x-axis: bit #, y-axis: DQ dly (-127~63)
3729 00:56:17.698925 RX Vref Scan = 0
3730 00:56:17.701705 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3731 00:56:17.705469 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3732 00:56:17.708528 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3733 00:56:17.711804 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3734 00:56:17.715190 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3735 00:56:17.718615 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3736 00:56:17.721804 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3737 00:56:17.725462 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3738 00:56:17.725564 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3739 00:56:17.728262 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3740 00:56:17.731557 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3741 00:56:17.735410 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3742 00:56:17.738284 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3743 00:56:17.741650 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3744 00:56:17.744998 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3745 00:56:17.748258 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3746 00:56:17.748354 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3747 00:56:17.752135 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3748 00:56:17.755017 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3749 00:56:17.758267 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3750 00:56:17.761582 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3751 00:56:17.765392 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3752 00:56:17.768393 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3753 00:56:17.768471 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3754 00:56:17.771863 -2, [0] xxxxxxxx xxxxxxxx [MSB]
3755 00:56:17.775292 -1, [0] xxxxxxxx xxxxxxxx [MSB]
3756 00:56:17.778683 0, [0] xxxxxxxx xxxxxxxx [MSB]
3757 00:56:17.782130 1, [0] xxxxxxxx xxxxxxxx [MSB]
3758 00:56:17.784867 2, [0] xxxxxxxx xxxxxxxo [MSB]
3759 00:56:17.784930 3, [0] xxxoxxxx ooxxxxxo [MSB]
3760 00:56:17.788231 4, [0] xxooxxxx ooxxxxxo [MSB]
3761 00:56:17.791837 5, [0] xxooxxxx ooxxxxxo [MSB]
3762 00:56:17.794845 6, [0] xooooxxx ooxxoxxo [MSB]
3763 00:56:17.798149 7, [0] oooooxxx oooooooo [MSB]
3764 00:56:17.801546 8, [0] ooooooxo oooooooo [MSB]
3765 00:56:17.804856 31, [0] oooooooo ooooooox [MSB]
3766 00:56:17.808430 32, [0] oooooooo ooooooox [MSB]
3767 00:56:17.811411 33, [0] oooooooo oxooooox [MSB]
3768 00:56:17.815149 34, [0] oooooooo xxooooox [MSB]
3769 00:56:17.815222 35, [0] oooxoooo xxooooox [MSB]
3770 00:56:17.818270 36, [0] ooxxoooo xxooooox [MSB]
3771 00:56:17.821429 37, [0] ooxxoooo xxxoxoxx [MSB]
3772 00:56:17.825128 38, [0] ooxxxoox xxxoxxxx [MSB]
3773 00:56:17.828532 39, [0] oxxxxoox xxxxxxxx [MSB]
3774 00:56:17.831787 40, [0] xxxxxxox xxxxxxxx [MSB]
3775 00:56:17.835183 41, [0] xxxxxxxx xxxxxxxx [MSB]
3776 00:56:17.838117 iDelay=41, Bit 0, Center 23 (7 ~ 39) 33
3777 00:56:17.841539 iDelay=41, Bit 1, Center 22 (6 ~ 38) 33
3778 00:56:17.845016 iDelay=41, Bit 2, Center 19 (4 ~ 35) 32
3779 00:56:17.848667 iDelay=41, Bit 3, Center 18 (3 ~ 34) 32
3780 00:56:17.851281 iDelay=41, Bit 4, Center 21 (6 ~ 37) 32
3781 00:56:17.854794 iDelay=41, Bit 5, Center 23 (8 ~ 39) 32
3782 00:56:17.857935 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
3783 00:56:17.861857 iDelay=41, Bit 7, Center 22 (8 ~ 37) 30
3784 00:56:17.864753 iDelay=41, Bit 8, Center 18 (3 ~ 33) 31
3785 00:56:17.867936 iDelay=41, Bit 9, Center 17 (3 ~ 32) 30
3786 00:56:17.871554 iDelay=41, Bit 10, Center 21 (7 ~ 36) 30
3787 00:56:17.874865 iDelay=41, Bit 11, Center 22 (7 ~ 38) 32
3788 00:56:17.881389 iDelay=41, Bit 12, Center 21 (6 ~ 36) 31
3789 00:56:17.884595 iDelay=41, Bit 13, Center 22 (7 ~ 37) 31
3790 00:56:17.887995 iDelay=41, Bit 14, Center 21 (7 ~ 36) 30
3791 00:56:17.891360 iDelay=41, Bit 15, Center 16 (2 ~ 30) 29
3792 00:56:17.891438 ==
3793 00:56:17.895010 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3794 00:56:17.897680 fsp= 1, odt_onoff= 1, Byte mode= 0
3795 00:56:17.897757 ==
3796 00:56:17.901218 DQS Delay:
3797 00:56:17.901294 DQS0 = 0, DQS1 = 0
3798 00:56:17.904359 DQM Delay:
3799 00:56:17.904435 DQM0 = 21, DQM1 = 19
3800 00:56:17.904495 DQ Delay:
3801 00:56:17.907821 DQ0 =23, DQ1 =22, DQ2 =19, DQ3 =18
3802 00:56:17.910921 DQ4 =21, DQ5 =23, DQ6 =24, DQ7 =22
3803 00:56:17.914619 DQ8 =18, DQ9 =17, DQ10 =21, DQ11 =22
3804 00:56:17.917872 DQ12 =21, DQ13 =22, DQ14 =21, DQ15 =16
3805 00:56:17.917951
3806 00:56:17.918023
3807 00:56:17.918084
3808 00:56:17.921114 [DramC_TX_OE_Calibration] TA2
3809 00:56:17.924800 Original DQ_B0 (3 6) =30, OEN = 27
3810 00:56:17.928121 Original DQ_B1 (3 6) =30, OEN = 27
3811 00:56:17.931331 23, 0x0, End_B0=23 End_B1=23
3812 00:56:17.934716 24, 0x0, End_B0=24 End_B1=24
3813 00:56:17.934797 25, 0x0, End_B0=25 End_B1=25
3814 00:56:17.937962 26, 0x0, End_B0=26 End_B1=26
3815 00:56:17.941453 27, 0x0, End_B0=27 End_B1=27
3816 00:56:17.944384 28, 0x0, End_B0=28 End_B1=28
3817 00:56:17.947858 29, 0x0, End_B0=29 End_B1=29
3818 00:56:17.947938 30, 0x0, End_B0=30 End_B1=30
3819 00:56:17.951024 31, 0xFFFF, End_B0=30 End_B1=30
3820 00:56:17.957965 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3821 00:56:17.961562 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3822 00:56:17.961651
3823 00:56:17.964435
3824 00:56:17.964528 Write Rank1 MR23 =0x3f
3825 00:56:17.964618 [DQSOSC]
3826 00:56:17.974656 [DQSOSCAuto] RK1, (LSB)MR18= 0xd4d4, (MSB)MR19= 0x202, tDQSOscB0 = 435 ps tDQSOscB1 = 435 ps
3827 00:56:17.981308 CH1_RK1: MR19=0x202, MR18=0xD4D4, DQSOSC=435, MR23=63, INC=13, DEC=19
3828 00:56:17.981387 Write Rank1 MR23 =0x3f
3829 00:56:17.984546 [DQSOSC]
3830 00:56:17.991343 [DQSOSCAuto] RK1, (LSB)MR18= 0xd3d3, (MSB)MR19= 0x202, tDQSOscB0 = 435 ps tDQSOscB1 = 435 ps
3831 00:56:17.994319 CH1 RK1: MR19=202, MR18=D3D3
3832 00:56:17.997913 [RxdqsGatingPostProcess] freq 1600
3833 00:56:18.000773 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3834 00:56:18.004106 Rank: 0
3835 00:56:18.007431 best DQS0 dly(2T, 0.5T) = (2, 6)
3836 00:56:18.007534 best DQS1 dly(2T, 0.5T) = (2, 6)
3837 00:56:18.010986 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3838 00:56:18.014314 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3839 00:56:18.017284 Rank: 1
3840 00:56:18.021037 best DQS0 dly(2T, 0.5T) = (2, 6)
3841 00:56:18.021168 best DQS1 dly(2T, 0.5T) = (2, 6)
3842 00:56:18.023979 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3843 00:56:18.027296 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3844 00:56:18.034094 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3845 00:56:18.037497 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3846 00:56:18.040975 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3847 00:56:18.041068
3848 00:56:18.041151
3849 00:56:18.043699 [Calibration Summary] Freqency 1600
3850 00:56:18.047150 CH 0, Rank 0
3851 00:56:18.047267 All Pass.
3852 00:56:18.047419
3853 00:56:18.047550 CH 0, Rank 1
3854 00:56:18.050805 All Pass.
3855 00:56:18.050926
3856 00:56:18.051035 CH 1, Rank 0
3857 00:56:18.051146 All Pass.
3858 00:56:18.051252
3859 00:56:18.053725 CH 1, Rank 1
3860 00:56:18.053850 All Pass.
3861 00:56:18.053959
3862 00:56:18.060643 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3863 00:56:18.067070 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3864 00:56:18.073709 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3865 00:56:18.077413 Write Rank0 MR3 =0xb0
3866 00:56:18.083846 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3867 00:56:18.090296 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3868 00:56:18.096968 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3869 00:56:18.100625 Write Rank1 MR3 =0xb0
3870 00:56:18.106974 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3871 00:56:18.114527 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3872 00:56:18.120169 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3873 00:56:18.120247 Write Rank0 MR3 =0xb0
3874 00:56:18.127135 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3875 00:56:18.133473 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3876 00:56:18.143789 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3877 00:56:18.143891 Write Rank1 MR3 =0xb0
3878 00:56:18.146992 DramC Write-DBI on
3879 00:56:18.150341 [GetDramInforAfterCalByMRR] Vendor 6.
3880 00:56:18.153364 [GetDramInforAfterCalByMRR] Revision 505.
3881 00:56:18.153436 MR8 1111
3882 00:56:18.160436 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3883 00:56:18.160532 MR8 1111
3884 00:56:18.163763 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3885 00:56:18.166663 MR8 1111
3886 00:56:18.169908 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3887 00:56:18.170007 MR8 1111
3888 00:56:18.176655 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3889 00:56:18.183598 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3890 00:56:18.186761 Write Rank0 MR13 =0xd0
3891 00:56:18.190094 Write Rank1 MR13 =0xd0
3892 00:56:18.190162 Write Rank0 MR13 =0xd0
3893 00:56:18.193510 Write Rank1 MR13 =0xd0
3894 00:56:18.196856 Save calibration result to emmc
3895 00:56:18.196922
3896 00:56:18.196977
3897 00:56:18.199813 [DramcModeReg_Check] Freq_1600, FSP_1
3898 00:56:18.199902 FSP_1, CH_0, RK0
3899 00:56:18.203194 Write Rank0 MR13 =0xd8
3900 00:56:18.206509 MR12 = 0x60 (global = 0x60) match
3901 00:56:18.209872 MR14 = 0x1e (global = 0x1e) match
3902 00:56:18.209937 FSP_1, CH_0, RK1
3903 00:56:18.213306 Write Rank1 MR13 =0xd8
3904 00:56:18.216304 MR12 = 0x5e (global = 0x5e) match
3905 00:56:18.219698 MR14 = 0x20 (global = 0x20) match
3906 00:56:18.219764 FSP_1, CH_1, RK0
3907 00:56:18.223081 Write Rank0 MR13 =0xd8
3908 00:56:18.226561 MR12 = 0x5e (global = 0x5e) match
3909 00:56:18.230457 MR14 = 0x1c (global = 0x1c) match
3910 00:56:18.230543 FSP_1, CH_1, RK1
3911 00:56:18.233499 Write Rank1 MR13 =0xd8
3912 00:56:18.236944 MR12 = 0x60 (global = 0x60) match
3913 00:56:18.240394 MR14 = 0x1e (global = 0x1e) match
3914 00:56:18.240486
3915 00:56:18.243195 [MEM_TEST] 02: After DFS, before run time config
3916 00:56:18.254954 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3917 00:56:18.255090
3918 00:56:18.255176 [TA2_TEST]
3919 00:56:18.255256 === TA2 HW
3920 00:56:18.258114 TA2 PAT: XTALK
3921 00:56:18.261258 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3922 00:56:18.267943 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3923 00:56:18.271168 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3924 00:56:18.274765 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3925 00:56:18.278170
3926 00:56:18.278260
3927 00:56:18.278350 Settings after calibration
3928 00:56:18.278430
3929 00:56:18.281389 [DramcRunTimeConfig]
3930 00:56:18.284886 TransferPLLToSPMControl - MODE SW PHYPLL
3931 00:56:18.284962 TX_TRACKING: ON
3932 00:56:18.288438 RX_TRACKING: ON
3933 00:56:18.288570 HW_GATING: ON
3934 00:56:18.291588 HW_GATING DBG: OFF
3935 00:56:18.291664 ddr_geometry:1
3936 00:56:18.294928 ddr_geometry:1
3937 00:56:18.295027 ddr_geometry:1
3938 00:56:18.295122 ddr_geometry:1
3939 00:56:18.298744 ddr_geometry:1
3940 00:56:18.298833 ddr_geometry:1
3941 00:56:18.301557 ddr_geometry:1
3942 00:56:18.301632 ddr_geometry:1
3943 00:56:18.305221 High Freq DUMMY_READ_FOR_TRACKING: ON
3944 00:56:18.308050 ZQCS_ENABLE_LP4: OFF
3945 00:56:18.311450 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3946 00:56:18.314780 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3947 00:56:18.314856 SPM_CONTROL_AFTERK: ON
3948 00:56:18.318111 IMPEDANCE_TRACKING: ON
3949 00:56:18.318187 TEMP_SENSOR: ON
3950 00:56:18.321491 PER_BANK_REFRESH: ON
3951 00:56:18.321567 HW_SAVE_FOR_SR: ON
3952 00:56:18.325009 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3953 00:56:18.328632 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3954 00:56:18.331302 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3955 00:56:18.334628 Read ODT Tracking: ON
3956 00:56:18.337938 =========================
3957 00:56:18.338065
3958 00:56:18.338125 [TA2_TEST]
3959 00:56:18.338180 === TA2 HW
3960 00:56:18.344879 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3961 00:56:18.348298 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3962 00:56:18.354743 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3963 00:56:18.358148 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3964 00:56:18.358224
3965 00:56:18.360992 [MEM_TEST] 03: After run time config
3966 00:56:18.372988 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3967 00:56:18.375899 [complex_mem_test] start addr:0x40024000, len:131072
3968 00:56:18.580488 1st complex R/W mem test pass
3969 00:56:18.587233 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3970 00:56:18.590628 sync preloader write leveling
3971 00:56:18.593677 sync preloader cbt_mr12
3972 00:56:18.597090 sync preloader cbt_clk_dly
3973 00:56:18.597166 sync preloader cbt_cmd_dly
3974 00:56:18.600571 sync preloader cbt_cs
3975 00:56:18.603447 sync preloader cbt_ca_perbit_delay
3976 00:56:18.603523 sync preloader clk_delay
3977 00:56:18.607159 sync preloader dqs_delay
3978 00:56:18.610427 sync preloader u1Gating2T_Save
3979 00:56:18.613700 sync preloader u1Gating05T_Save
3980 00:56:18.617443 sync preloader u1Gatingfine_tune_Save
3981 00:56:18.620441 sync preloader u1Gatingucpass_count_Save
3982 00:56:18.623782 sync preloader u1TxWindowPerbitVref_Save
3983 00:56:18.627068 sync preloader u1TxCenter_min_Save
3984 00:56:18.630282 sync preloader u1TxCenter_max_Save
3985 00:56:18.633510 sync preloader u1Txwin_center_Save
3986 00:56:18.636887 sync preloader u1Txfirst_pass_Save
3987 00:56:18.640059 sync preloader u1Txlast_pass_Save
3988 00:56:18.640136 sync preloader u1RxDatlat_Save
3989 00:56:18.643702 sync preloader u1RxWinPerbitVref_Save
3990 00:56:18.650491 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3991 00:56:18.653717 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3992 00:56:18.657141 sync preloader delay_cell_unit
3993 00:56:18.663427 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3994 00:56:18.667036 sync preloader write leveling
3995 00:56:18.667112 sync preloader cbt_mr12
3996 00:56:18.670190 sync preloader cbt_clk_dly
3997 00:56:18.673604 sync preloader cbt_cmd_dly
3998 00:56:18.673680 sync preloader cbt_cs
3999 00:56:18.676930 sync preloader cbt_ca_perbit_delay
4000 00:56:18.680216 sync preloader clk_delay
4001 00:56:18.683398 sync preloader dqs_delay
4002 00:56:18.686959 sync preloader u1Gating2T_Save
4003 00:56:18.687035 sync preloader u1Gating05T_Save
4004 00:56:18.690144 sync preloader u1Gatingfine_tune_Save
4005 00:56:18.693624 sync preloader u1Gatingucpass_count_Save
4006 00:56:18.700022 sync preloader u1TxWindowPerbitVref_Save
4007 00:56:18.700098 sync preloader u1TxCenter_min_Save
4008 00:56:18.703436 sync preloader u1TxCenter_max_Save
4009 00:56:18.706817 sync preloader u1Txwin_center_Save
4010 00:56:18.710142 sync preloader u1Txfirst_pass_Save
4011 00:56:18.713584 sync preloader u1Txlast_pass_Save
4012 00:56:18.716631 sync preloader u1RxDatlat_Save
4013 00:56:18.720107 sync preloader u1RxWinPerbitVref_Save
4014 00:56:18.723444 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4015 00:56:18.726970 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4016 00:56:18.729910 sync preloader delay_cell_unit
4017 00:56:18.736621 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4018 00:56:18.739887 sync preloader write leveling
4019 00:56:18.743519 sync preloader cbt_mr12
4020 00:56:18.746706 sync preloader cbt_clk_dly
4021 00:56:18.746782 sync preloader cbt_cmd_dly
4022 00:56:18.749940 sync preloader cbt_cs
4023 00:56:18.753136 sync preloader cbt_ca_perbit_delay
4024 00:56:18.753212 sync preloader clk_delay
4025 00:56:18.756740 sync preloader dqs_delay
4026 00:56:18.759888 sync preloader u1Gating2T_Save
4027 00:56:18.763157 sync preloader u1Gating05T_Save
4028 00:56:18.766627 sync preloader u1Gatingfine_tune_Save
4029 00:56:18.769576 sync preloader u1Gatingucpass_count_Save
4030 00:56:18.773281 sync preloader u1TxWindowPerbitVref_Save
4031 00:56:18.776639 sync preloader u1TxCenter_min_Save
4032 00:56:18.779728 sync preloader u1TxCenter_max_Save
4033 00:56:18.783129 sync preloader u1Txwin_center_Save
4034 00:56:18.786536 sync preloader u1Txfirst_pass_Save
4035 00:56:18.789406 sync preloader u1Txlast_pass_Save
4036 00:56:18.793211 sync preloader u1RxDatlat_Save
4037 00:56:18.796070 sync preloader u1RxWinPerbitVref_Save
4038 00:56:18.799693 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4039 00:56:18.803261 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4040 00:56:18.806107 sync preloader delay_cell_unit
4041 00:56:18.809804 just_for_test_dump_coreboot_params dump all params
4042 00:56:18.812742 dump source = 0x0
4043 00:56:18.812875 dump params frequency:1600
4044 00:56:18.816244 dump params rank number:2
4045 00:56:18.816319
4046 00:56:18.819433 dump params write leveling
4047 00:56:18.823218 write leveling[0][0][0] = 0x1f
4048 00:56:18.826220 write leveling[0][0][1] = 0x18
4049 00:56:18.826296 write leveling[0][1][0] = 0x22
4050 00:56:18.829621 write leveling[0][1][1] = 0x19
4051 00:56:18.832849 write leveling[1][0][0] = 0x22
4052 00:56:18.836461 write leveling[1][0][1] = 0x21
4053 00:56:18.839404 write leveling[1][1][0] = 0x26
4054 00:56:18.842820 write leveling[1][1][1] = 0x21
4055 00:56:18.842920 dump params cbt_cs
4056 00:56:18.845772 cbt_cs[0][0] = 0x8
4057 00:56:18.845870 cbt_cs[0][1] = 0x8
4058 00:56:18.849177 cbt_cs[1][0] = 0xb
4059 00:56:18.849267 cbt_cs[1][1] = 0xb
4060 00:56:18.852511 dump params cbt_mr12
4061 00:56:18.852578 cbt_mr12[0][0] = 0x20
4062 00:56:18.856037 cbt_mr12[0][1] = 0x1e
4063 00:56:18.859535 cbt_mr12[1][0] = 0x1e
4064 00:56:18.859616 cbt_mr12[1][1] = 0x20
4065 00:56:18.862322 dump params tx window
4066 00:56:18.865989 tx_center_min[0][0][0] = 984
4067 00:56:18.866073 tx_center_max[0][0][0] = 991
4068 00:56:18.869110 tx_center_min[0][0][1] = 977
4069 00:56:18.872662 tx_center_max[0][0][1] = 984
4070 00:56:18.875820 tx_center_min[0][1][0] = 988
4071 00:56:18.875900 tx_center_max[0][1][0] = 995
4072 00:56:18.879105 tx_center_min[0][1][1] = 979
4073 00:56:18.882669 tx_center_max[0][1][1] = 986
4074 00:56:18.885640 tx_center_min[1][0][0] = 990
4075 00:56:18.889332 tx_center_max[1][0][0] = 995
4076 00:56:18.889408 tx_center_min[1][0][1] = 986
4077 00:56:18.892282 tx_center_max[1][0][1] = 993
4078 00:56:18.895687 tx_center_min[1][1][0] = 991
4079 00:56:18.899149 tx_center_max[1][1][0] = 995
4080 00:56:18.902690 tx_center_min[1][1][1] = 985
4081 00:56:18.902766 tx_center_max[1][1][1] = 991
4082 00:56:18.905847 dump params tx window
4083 00:56:18.908985 tx_win_center[0][0][0] = 991
4084 00:56:18.912414 tx_first_pass[0][0][0] = 979
4085 00:56:18.912490 tx_last_pass[0][0][0] = 1003
4086 00:56:18.916077 tx_win_center[0][0][1] = 989
4087 00:56:18.919483 tx_first_pass[0][0][1] = 978
4088 00:56:18.922222 tx_last_pass[0][0][1] = 1001
4089 00:56:18.925852 tx_win_center[0][0][2] = 990
4090 00:56:18.925952 tx_first_pass[0][0][2] = 979
4091 00:56:18.929168 tx_last_pass[0][0][2] = 1002
4092 00:56:18.932767 tx_win_center[0][0][3] = 984
4093 00:56:18.936028 tx_first_pass[0][0][3] = 973
4094 00:56:18.936112 tx_last_pass[0][0][3] = 995
4095 00:56:18.938978 tx_win_center[0][0][4] = 989
4096 00:56:18.942437 tx_first_pass[0][0][4] = 978
4097 00:56:18.945750 tx_last_pass[0][0][4] = 1001
4098 00:56:18.948834 tx_win_center[0][0][5] = 987
4099 00:56:18.948910 tx_first_pass[0][0][5] = 977
4100 00:56:18.952502 tx_last_pass[0][0][5] = 997
4101 00:56:18.955781 tx_win_center[0][0][6] = 988
4102 00:56:18.959242 tx_first_pass[0][0][6] = 977
4103 00:56:18.959319 tx_last_pass[0][0][6] = 999
4104 00:56:18.962817 tx_win_center[0][0][7] = 989
4105 00:56:18.965459 tx_first_pass[0][0][7] = 978
4106 00:56:18.968867 tx_last_pass[0][0][7] = 1001
4107 00:56:18.972173 tx_win_center[0][0][8] = 977
4108 00:56:18.972249 tx_first_pass[0][0][8] = 966
4109 00:56:18.975718 tx_last_pass[0][0][8] = 989
4110 00:56:18.979166 tx_win_center[0][0][9] = 979
4111 00:56:18.982392 tx_first_pass[0][0][9] = 968
4112 00:56:18.982467 tx_last_pass[0][0][9] = 990
4113 00:56:18.985549 tx_win_center[0][0][10] = 984
4114 00:56:18.988958 tx_first_pass[0][0][10] = 973
4115 00:56:18.992274 tx_last_pass[0][0][10] = 996
4116 00:56:18.995792 tx_win_center[0][0][11] = 978
4117 00:56:18.995869 tx_first_pass[0][0][11] = 967
4118 00:56:18.998714 tx_last_pass[0][0][11] = 990
4119 00:56:19.002241 tx_win_center[0][0][12] = 980
4120 00:56:19.005448 tx_first_pass[0][0][12] = 968
4121 00:56:19.008936 tx_last_pass[0][0][12] = 992
4122 00:56:19.012499 tx_win_center[0][0][13] = 980
4123 00:56:19.012602 tx_first_pass[0][0][13] = 968
4124 00:56:19.015685 tx_last_pass[0][0][13] = 992
4125 00:56:19.018639 tx_win_center[0][0][14] = 981
4126 00:56:19.022237 tx_first_pass[0][0][14] = 969
4127 00:56:19.025744 tx_last_pass[0][0][14] = 993
4128 00:56:19.025843 tx_win_center[0][0][15] = 984
4129 00:56:19.029133 tx_first_pass[0][0][15] = 972
4130 00:56:19.032273 tx_last_pass[0][0][15] = 996
4131 00:56:19.035429 tx_win_center[0][1][0] = 995
4132 00:56:19.038924 tx_first_pass[0][1][0] = 983
4133 00:56:19.039000 tx_last_pass[0][1][0] = 1007
4134 00:56:19.042243 tx_win_center[0][1][1] = 993
4135 00:56:19.045006 tx_first_pass[0][1][1] = 982
4136 00:56:19.049055 tx_last_pass[0][1][1] = 1005
4137 00:56:19.049148 tx_win_center[0][1][2] = 994
4138 00:56:19.052000 tx_first_pass[0][1][2] = 983
4139 00:56:19.055627 tx_last_pass[0][1][2] = 1006
4140 00:56:19.058934 tx_win_center[0][1][3] = 988
4141 00:56:19.061828 tx_first_pass[0][1][3] = 978
4142 00:56:19.061920 tx_last_pass[0][1][3] = 999
4143 00:56:19.065794 tx_win_center[0][1][4] = 994
4144 00:56:19.068594 tx_first_pass[0][1][4] = 982
4145 00:56:19.072290 tx_last_pass[0][1][4] = 1006
4146 00:56:19.075396 tx_win_center[0][1][5] = 990
4147 00:56:19.075489 tx_first_pass[0][1][5] = 979
4148 00:56:19.078662 tx_last_pass[0][1][5] = 1002
4149 00:56:19.082390 tx_win_center[0][1][6] = 991
4150 00:56:19.085071 tx_first_pass[0][1][6] = 980
4151 00:56:19.085139 tx_last_pass[0][1][6] = 1003
4152 00:56:19.088524 tx_win_center[0][1][7] = 993
4153 00:56:19.092045 tx_first_pass[0][1][7] = 981
4154 00:56:19.095343 tx_last_pass[0][1][7] = 1006
4155 00:56:19.098896 tx_win_center[0][1][8] = 979
4156 00:56:19.098966 tx_first_pass[0][1][8] = 968
4157 00:56:19.102111 tx_last_pass[0][1][8] = 991
4158 00:56:19.104985 tx_win_center[0][1][9] = 982
4159 00:56:19.108563 tx_first_pass[0][1][9] = 971
4160 00:56:19.108656 tx_last_pass[0][1][9] = 993
4161 00:56:19.111691 tx_win_center[0][1][10] = 986
4162 00:56:19.115315 tx_first_pass[0][1][10] = 975
4163 00:56:19.118294 tx_last_pass[0][1][10] = 997
4164 00:56:19.121940 tx_win_center[0][1][11] = 980
4165 00:56:19.122050 tx_first_pass[0][1][11] = 969
4166 00:56:19.124872 tx_last_pass[0][1][11] = 992
4167 00:56:19.128152 tx_win_center[0][1][12] = 982
4168 00:56:19.131891 tx_first_pass[0][1][12] = 971
4169 00:56:19.135101 tx_last_pass[0][1][12] = 994
4170 00:56:19.135178 tx_win_center[0][1][13] = 982
4171 00:56:19.138227 tx_first_pass[0][1][13] = 970
4172 00:56:19.141585 tx_last_pass[0][1][13] = 994
4173 00:56:19.145023 tx_win_center[0][1][14] = 984
4174 00:56:19.148826 tx_first_pass[0][1][14] = 972
4175 00:56:19.148902 tx_last_pass[0][1][14] = 996
4176 00:56:19.152187 tx_win_center[0][1][15] = 985
4177 00:56:19.155153 tx_first_pass[0][1][15] = 974
4178 00:56:19.158331 tx_last_pass[0][1][15] = 997
4179 00:56:19.161847 tx_win_center[1][0][0] = 995
4180 00:56:19.161941 tx_first_pass[1][0][0] = 984
4181 00:56:19.164806 tx_last_pass[1][0][0] = 1007
4182 00:56:19.168201 tx_win_center[1][0][1] = 993
4183 00:56:19.171664 tx_first_pass[1][0][1] = 980
4184 00:56:19.174992 tx_last_pass[1][0][1] = 1007
4185 00:56:19.175062 tx_win_center[1][0][2] = 992
4186 00:56:19.178249 tx_first_pass[1][0][2] = 979
4187 00:56:19.181698 tx_last_pass[1][0][2] = 1006
4188 00:56:19.185052 tx_win_center[1][0][3] = 990
4189 00:56:19.188355 tx_first_pass[1][0][3] = 977
4190 00:56:19.188431 tx_last_pass[1][0][3] = 1003
4191 00:56:19.191510 tx_win_center[1][0][4] = 994
4192 00:56:19.194889 tx_first_pass[1][0][4] = 981
4193 00:56:19.198202 tx_last_pass[1][0][4] = 1007
4194 00:56:19.198278 tx_win_center[1][0][5] = 995
4195 00:56:19.201492 tx_first_pass[1][0][5] = 983
4196 00:56:19.204950 tx_last_pass[1][0][5] = 1007
4197 00:56:19.208038 tx_win_center[1][0][6] = 994
4198 00:56:19.211378 tx_first_pass[1][0][6] = 981
4199 00:56:19.211454 tx_last_pass[1][0][6] = 1007
4200 00:56:19.214867 tx_win_center[1][0][7] = 993
4201 00:56:19.218140 tx_first_pass[1][0][7] = 980
4202 00:56:19.221732 tx_last_pass[1][0][7] = 1007
4203 00:56:19.224888 tx_win_center[1][0][8] = 989
4204 00:56:19.224964 tx_first_pass[1][0][8] = 977
4205 00:56:19.228431 tx_last_pass[1][0][8] = 1001
4206 00:56:19.231587 tx_win_center[1][0][9] = 988
4207 00:56:19.235004 tx_first_pass[1][0][9] = 977
4208 00:56:19.235109 tx_last_pass[1][0][9] = 1000
4209 00:56:19.238180 tx_win_center[1][0][10] = 992
4210 00:56:19.241309 tx_first_pass[1][0][10] = 981
4211 00:56:19.244800 tx_last_pass[1][0][10] = 1003
4212 00:56:19.248272 tx_win_center[1][0][11] = 993
4213 00:56:19.251777 tx_first_pass[1][0][11] = 982
4214 00:56:19.251869 tx_last_pass[1][0][11] = 1004
4215 00:56:19.255089 tx_win_center[1][0][12] = 992
4216 00:56:19.257916 tx_first_pass[1][0][12] = 982
4217 00:56:19.261262 tx_last_pass[1][0][12] = 1003
4218 00:56:19.264894 tx_win_center[1][0][13] = 993
4219 00:56:19.264980 tx_first_pass[1][0][13] = 983
4220 00:56:19.267846 tx_last_pass[1][0][13] = 1003
4221 00:56:19.271344 tx_win_center[1][0][14] = 992
4222 00:56:19.274783 tx_first_pass[1][0][14] = 981
4223 00:56:19.278016 tx_last_pass[1][0][14] = 1003
4224 00:56:19.278105 tx_win_center[1][0][15] = 986
4225 00:56:19.281343 tx_first_pass[1][0][15] = 974
4226 00:56:19.284716 tx_last_pass[1][0][15] = 999
4227 00:56:19.287776 tx_win_center[1][1][0] = 995
4228 00:56:19.291091 tx_first_pass[1][1][0] = 983
4229 00:56:19.291168 tx_last_pass[1][1][0] = 1007
4230 00:56:19.294806 tx_win_center[1][1][1] = 994
4231 00:56:19.298017 tx_first_pass[1][1][1] = 982
4232 00:56:19.301182 tx_last_pass[1][1][1] = 1007
4233 00:56:19.304419 tx_win_center[1][1][2] = 992
4234 00:56:19.304495 tx_first_pass[1][1][2] = 979
4235 00:56:19.307923 tx_last_pass[1][1][2] = 1006
4236 00:56:19.311205 tx_win_center[1][1][3] = 991
4237 00:56:19.314630 tx_first_pass[1][1][3] = 978
4238 00:56:19.318102 tx_last_pass[1][1][3] = 1004
4239 00:56:19.318179 tx_win_center[1][1][4] = 994
4240 00:56:19.321449 tx_first_pass[1][1][4] = 982
4241 00:56:19.324766 tx_last_pass[1][1][4] = 1007
4242 00:56:19.328010 tx_win_center[1][1][5] = 994
4243 00:56:19.328087 tx_first_pass[1][1][5] = 982
4244 00:56:19.331235 tx_last_pass[1][1][5] = 1007
4245 00:56:19.334549 tx_win_center[1][1][6] = 994
4246 00:56:19.338030 tx_first_pass[1][1][6] = 981
4247 00:56:19.341417 tx_last_pass[1][1][6] = 1007
4248 00:56:19.341493 tx_win_center[1][1][7] = 994
4249 00:56:19.344707 tx_first_pass[1][1][7] = 981
4250 00:56:19.348181 tx_last_pass[1][1][7] = 1007
4251 00:56:19.351532 tx_win_center[1][1][8] = 987
4252 00:56:19.351608 tx_first_pass[1][1][8] = 976
4253 00:56:19.354532 tx_last_pass[1][1][8] = 999
4254 00:56:19.357834 tx_win_center[1][1][9] = 987
4255 00:56:19.361456 tx_first_pass[1][1][9] = 976
4256 00:56:19.364939 tx_last_pass[1][1][9] = 999
4257 00:56:19.365069 tx_win_center[1][1][10] = 990
4258 00:56:19.367715 tx_first_pass[1][1][10] = 978
4259 00:56:19.371092 tx_last_pass[1][1][10] = 1002
4260 00:56:19.374676 tx_win_center[1][1][11] = 990
4261 00:56:19.377744 tx_first_pass[1][1][11] = 979
4262 00:56:19.377819 tx_last_pass[1][1][11] = 1002
4263 00:56:19.380976 tx_win_center[1][1][12] = 991
4264 00:56:19.384195 tx_first_pass[1][1][12] = 980
4265 00:56:19.387541 tx_last_pass[1][1][12] = 1002
4266 00:56:19.390912 tx_win_center[1][1][13] = 991
4267 00:56:19.394386 tx_first_pass[1][1][13] = 980
4268 00:56:19.394461 tx_last_pass[1][1][13] = 1002
4269 00:56:19.397605 tx_win_center[1][1][14] = 990
4270 00:56:19.401082 tx_first_pass[1][1][14] = 980
4271 00:56:19.404489 tx_last_pass[1][1][14] = 1001
4272 00:56:19.407809 tx_win_center[1][1][15] = 985
4273 00:56:19.407886 tx_first_pass[1][1][15] = 972
4274 00:56:19.410808 tx_last_pass[1][1][15] = 998
4275 00:56:19.414158 dump params rx window
4276 00:56:19.417508 rx_firspass[0][0][0] = 9
4277 00:56:19.417584 rx_lastpass[0][0][0] = 37
4278 00:56:19.420785 rx_firspass[0][0][1] = 9
4279 00:56:19.424172 rx_lastpass[0][0][1] = 36
4280 00:56:19.424248 rx_firspass[0][0][2] = 11
4281 00:56:19.427572 rx_lastpass[0][0][2] = 37
4282 00:56:19.430485 rx_firspass[0][0][3] = 3
4283 00:56:19.433948 rx_lastpass[0][0][3] = 32
4284 00:56:19.434061 rx_firspass[0][0][4] = 10
4285 00:56:19.437311 rx_lastpass[0][0][4] = 36
4286 00:56:19.440533 rx_firspass[0][0][5] = 6
4287 00:56:19.440609 rx_lastpass[0][0][5] = 32
4288 00:56:19.444096 rx_firspass[0][0][6] = 7
4289 00:56:19.447126 rx_lastpass[0][0][6] = 35
4290 00:56:19.447201 rx_firspass[0][0][7] = 11
4291 00:56:19.450736 rx_lastpass[0][0][7] = 35
4292 00:56:19.453878 rx_firspass[0][0][8] = 3
4293 00:56:19.457261 rx_lastpass[0][0][8] = 31
4294 00:56:19.457351 rx_firspass[0][0][9] = 6
4295 00:56:19.460501 rx_lastpass[0][0][9] = 32
4296 00:56:19.463946 rx_firspass[0][0][10] = 11
4297 00:56:19.464021 rx_lastpass[0][0][10] = 39
4298 00:56:19.467367 rx_firspass[0][0][11] = 5
4299 00:56:19.470646 rx_lastpass[0][0][11] = 31
4300 00:56:19.474159 rx_firspass[0][0][12] = 6
4301 00:56:19.474235 rx_lastpass[0][0][12] = 34
4302 00:56:19.477163 rx_firspass[0][0][13] = 7
4303 00:56:19.480424 rx_lastpass[0][0][13] = 32
4304 00:56:19.480499 rx_firspass[0][0][14] = 7
4305 00:56:19.483821 rx_lastpass[0][0][14] = 34
4306 00:56:19.487070 rx_firspass[0][0][15] = 10
4307 00:56:19.490311 rx_lastpass[0][0][15] = 36
4308 00:56:19.490386 rx_firspass[0][1][0] = 9
4309 00:56:19.493918 rx_lastpass[0][1][0] = 39
4310 00:56:19.496943 rx_firspass[0][1][1] = 8
4311 00:56:19.500443 rx_lastpass[0][1][1] = 39
4312 00:56:19.500518 rx_firspass[0][1][2] = 9
4313 00:56:19.503585 rx_lastpass[0][1][2] = 39
4314 00:56:19.507434 rx_firspass[0][1][3] = 1
4315 00:56:19.507527 rx_lastpass[0][1][3] = 32
4316 00:56:19.510495 rx_firspass[0][1][4] = 10
4317 00:56:19.513695 rx_lastpass[0][1][4] = 37
4318 00:56:19.513758 rx_firspass[0][1][5] = 3
4319 00:56:19.516978 rx_lastpass[0][1][5] = 34
4320 00:56:19.520481 rx_firspass[0][1][6] = 4
4321 00:56:19.523820 rx_lastpass[0][1][6] = 35
4322 00:56:19.523903 rx_firspass[0][1][7] = 7
4323 00:56:19.527348 rx_lastpass[0][1][7] = 37
4324 00:56:19.530394 rx_firspass[0][1][8] = 2
4325 00:56:19.530469 rx_lastpass[0][1][8] = 32
4326 00:56:19.533581 rx_firspass[0][1][9] = 5
4327 00:56:19.537435 rx_lastpass[0][1][9] = 34
4328 00:56:19.537510 rx_firspass[0][1][10] = 12
4329 00:56:19.540402 rx_lastpass[0][1][10] = 41
4330 00:56:19.543872 rx_firspass[0][1][11] = 3
4331 00:56:19.547207 rx_lastpass[0][1][11] = 32
4332 00:56:19.547281 rx_firspass[0][1][12] = 6
4333 00:56:19.550738 rx_lastpass[0][1][12] = 35
4334 00:56:19.553652 rx_firspass[0][1][13] = 8
4335 00:56:19.557096 rx_lastpass[0][1][13] = 34
4336 00:56:19.557171 rx_firspass[0][1][14] = 7
4337 00:56:19.560375 rx_lastpass[0][1][14] = 37
4338 00:56:19.564183 rx_firspass[0][1][15] = 10
4339 00:56:19.564258 rx_lastpass[0][1][15] = 38
4340 00:56:19.566912 rx_firspass[1][0][0] = 8
4341 00:56:19.570826 rx_lastpass[1][0][0] = 37
4342 00:56:19.573676 rx_firspass[1][0][1] = 7
4343 00:56:19.573766 rx_lastpass[1][0][1] = 35
4344 00:56:19.577284 rx_firspass[1][0][2] = 5
4345 00:56:19.580755 rx_lastpass[1][0][2] = 35
4346 00:56:19.580830 rx_firspass[1][0][3] = 5
4347 00:56:19.583681 rx_lastpass[1][0][3] = 32
4348 00:56:19.587486 rx_firspass[1][0][4] = 7
4349 00:56:19.587561 rx_lastpass[1][0][4] = 36
4350 00:56:19.590798 rx_firspass[1][0][5] = 9
4351 00:56:19.594176 rx_lastpass[1][0][5] = 37
4352 00:56:19.594249 rx_firspass[1][0][6] = 11
4353 00:56:19.597238 rx_lastpass[1][0][6] = 37
4354 00:56:19.600519 rx_firspass[1][0][7] = 9
4355 00:56:19.604075 rx_lastpass[1][0][7] = 36
4356 00:56:19.604150 rx_firspass[1][0][8] = 5
4357 00:56:19.607212 rx_lastpass[1][0][8] = 32
4358 00:56:19.610772 rx_firspass[1][0][9] = 3
4359 00:56:19.610848 rx_lastpass[1][0][9] = 31
4360 00:56:19.613806 rx_firspass[1][0][10] = 6
4361 00:56:19.617115 rx_lastpass[1][0][10] = 36
4362 00:56:19.621263 rx_firspass[1][0][11] = 7
4363 00:56:19.621337 rx_lastpass[1][0][11] = 36
4364 00:56:19.623952 rx_firspass[1][0][12] = 9
4365 00:56:19.627585 rx_lastpass[1][0][12] = 35
4366 00:56:19.627662 rx_firspass[1][0][13] = 8
4367 00:56:19.630417 rx_lastpass[1][0][13] = 36
4368 00:56:19.633959 rx_firspass[1][0][14] = 8
4369 00:56:19.637192 rx_lastpass[1][0][14] = 34
4370 00:56:19.637267 rx_firspass[1][0][15] = 3
4371 00:56:19.640339 rx_lastpass[1][0][15] = 28
4372 00:56:19.644035 rx_firspass[1][1][0] = 7
4373 00:56:19.644111 rx_lastpass[1][1][0] = 39
4374 00:56:19.647151 rx_firspass[1][1][1] = 6
4375 00:56:19.650758 rx_lastpass[1][1][1] = 38
4376 00:56:19.653738 rx_firspass[1][1][2] = 4
4377 00:56:19.653814 rx_lastpass[1][1][2] = 35
4378 00:56:19.657250 rx_firspass[1][1][3] = 3
4379 00:56:19.661032 rx_lastpass[1][1][3] = 34
4380 00:56:19.661108 rx_firspass[1][1][4] = 6
4381 00:56:19.663890 rx_lastpass[1][1][4] = 37
4382 00:56:19.667387 rx_firspass[1][1][5] = 8
4383 00:56:19.667463 rx_lastpass[1][1][5] = 39
4384 00:56:19.670856 rx_firspass[1][1][6] = 9
4385 00:56:19.674124 rx_lastpass[1][1][6] = 40
4386 00:56:19.677144 rx_firspass[1][1][7] = 8
4387 00:56:19.677220 rx_lastpass[1][1][7] = 37
4388 00:56:19.681316 rx_firspass[1][1][8] = 3
4389 00:56:19.684199 rx_lastpass[1][1][8] = 33
4390 00:56:19.684275 rx_firspass[1][1][9] = 3
4391 00:56:19.686979 rx_lastpass[1][1][9] = 32
4392 00:56:19.690652 rx_firspass[1][1][10] = 7
4393 00:56:19.693947 rx_lastpass[1][1][10] = 36
4394 00:56:19.694060 rx_firspass[1][1][11] = 7
4395 00:56:19.697064 rx_lastpass[1][1][11] = 38
4396 00:56:19.700584 rx_firspass[1][1][12] = 6
4397 00:56:19.700661 rx_lastpass[1][1][12] = 36
4398 00:56:19.703979 rx_firspass[1][1][13] = 7
4399 00:56:19.707053 rx_lastpass[1][1][13] = 37
4400 00:56:19.710360 rx_firspass[1][1][14] = 7
4401 00:56:19.710436 rx_lastpass[1][1][14] = 36
4402 00:56:19.713895 rx_firspass[1][1][15] = 2
4403 00:56:19.717434 rx_lastpass[1][1][15] = 30
4404 00:56:19.717510 dump params clk_delay
4405 00:56:19.720396 clk_delay[0] = 0
4406 00:56:19.720472 clk_delay[1] = 0
4407 00:56:19.723923 dump params dqs_delay
4408 00:56:19.723998 dqs_delay[0][0] = 0
4409 00:56:19.727344 dqs_delay[0][1] = 0
4410 00:56:19.730131 dqs_delay[1][0] = 0
4411 00:56:19.730208 dqs_delay[1][1] = 0
4412 00:56:19.733595 dump params delay_cell_unit = 833
4413 00:56:19.733671 dump source = 0x0
4414 00:56:19.736861 dump params frequency:1200
4415 00:56:19.740593 dump params rank number:2
4416 00:56:19.740669
4417 00:56:19.743846 dump params write leveling
4418 00:56:19.747081 write leveling[0][0][0] = 0x0
4419 00:56:19.747157 write leveling[0][0][1] = 0x0
4420 00:56:19.750443 write leveling[0][1][0] = 0x0
4421 00:56:19.753425 write leveling[0][1][1] = 0x0
4422 00:56:19.756791 write leveling[1][0][0] = 0x0
4423 00:56:19.760148 write leveling[1][0][1] = 0x0
4424 00:56:19.760223 write leveling[1][1][0] = 0x0
4425 00:56:19.763537 write leveling[1][1][1] = 0x0
4426 00:56:19.767414 dump params cbt_cs
4427 00:56:19.767513 cbt_cs[0][0] = 0x0
4428 00:56:19.770170 cbt_cs[0][1] = 0x0
4429 00:56:19.770245 cbt_cs[1][0] = 0x0
4430 00:56:19.773572 cbt_cs[1][1] = 0x0
4431 00:56:19.773647 dump params cbt_mr12
4432 00:56:19.777025 cbt_mr12[0][0] = 0x0
4433 00:56:19.777100 cbt_mr12[0][1] = 0x0
4434 00:56:19.780662 cbt_mr12[1][0] = 0x0
4435 00:56:19.784051 cbt_mr12[1][1] = 0x0
4436 00:56:19.784125 dump params tx window
4437 00:56:19.787249 tx_center_min[0][0][0] = 0
4438 00:56:19.790239 tx_center_max[0][0][0] = 0
4439 00:56:19.790316 tx_center_min[0][0][1] = 0
4440 00:56:19.794424 tx_center_max[0][0][1] = 0
4441 00:56:19.796961 tx_center_min[0][1][0] = 0
4442 00:56:19.800227 tx_center_max[0][1][0] = 0
4443 00:56:19.800304 tx_center_min[0][1][1] = 0
4444 00:56:19.803878 tx_center_max[0][1][1] = 0
4445 00:56:19.807371 tx_center_min[1][0][0] = 0
4446 00:56:19.810225 tx_center_max[1][0][0] = 0
4447 00:56:19.810301 tx_center_min[1][0][1] = 0
4448 00:56:19.813450 tx_center_max[1][0][1] = 0
4449 00:56:19.816877 tx_center_min[1][1][0] = 0
4450 00:56:19.820319 tx_center_max[1][1][0] = 0
4451 00:56:19.820395 tx_center_min[1][1][1] = 0
4452 00:56:19.823386 tx_center_max[1][1][1] = 0
4453 00:56:19.827008 dump params tx window
4454 00:56:19.827084 tx_win_center[0][0][0] = 0
4455 00:56:19.830472 tx_first_pass[0][0][0] = 0
4456 00:56:19.833861 tx_last_pass[0][0][0] = 0
4457 00:56:19.833938 tx_win_center[0][0][1] = 0
4458 00:56:19.836806 tx_first_pass[0][0][1] = 0
4459 00:56:19.840148 tx_last_pass[0][0][1] = 0
4460 00:56:19.843711 tx_win_center[0][0][2] = 0
4461 00:56:19.843788 tx_first_pass[0][0][2] = 0
4462 00:56:19.846671 tx_last_pass[0][0][2] = 0
4463 00:56:19.849955 tx_win_center[0][0][3] = 0
4464 00:56:19.853336 tx_first_pass[0][0][3] = 0
4465 00:56:19.853412 tx_last_pass[0][0][3] = 0
4466 00:56:19.856750 tx_win_center[0][0][4] = 0
4467 00:56:19.860283 tx_first_pass[0][0][4] = 0
4468 00:56:19.860359 tx_last_pass[0][0][4] = 0
4469 00:56:19.863047 tx_win_center[0][0][5] = 0
4470 00:56:19.866486 tx_first_pass[0][0][5] = 0
4471 00:56:19.869822 tx_last_pass[0][0][5] = 0
4472 00:56:19.869898 tx_win_center[0][0][6] = 0
4473 00:56:19.873185 tx_first_pass[0][0][6] = 0
4474 00:56:19.876500 tx_last_pass[0][0][6] = 0
4475 00:56:19.879974 tx_win_center[0][0][7] = 0
4476 00:56:19.880050 tx_first_pass[0][0][7] = 0
4477 00:56:19.883227 tx_last_pass[0][0][7] = 0
4478 00:56:19.886697 tx_win_center[0][0][8] = 0
4479 00:56:19.889457 tx_first_pass[0][0][8] = 0
4480 00:56:19.889534 tx_last_pass[0][0][8] = 0
4481 00:56:19.892802 tx_win_center[0][0][9] = 0
4482 00:56:19.896318 tx_first_pass[0][0][9] = 0
4483 00:56:19.896395 tx_last_pass[0][0][9] = 0
4484 00:56:19.899857 tx_win_center[0][0][10] = 0
4485 00:56:19.902956 tx_first_pass[0][0][10] = 0
4486 00:56:19.906431 tx_last_pass[0][0][10] = 0
4487 00:56:19.906507 tx_win_center[0][0][11] = 0
4488 00:56:19.909842 tx_first_pass[0][0][11] = 0
4489 00:56:19.913051 tx_last_pass[0][0][11] = 0
4490 00:56:19.916473 tx_win_center[0][0][12] = 0
4491 00:56:19.916551 tx_first_pass[0][0][12] = 0
4492 00:56:19.919293 tx_last_pass[0][0][12] = 0
4493 00:56:19.922902 tx_win_center[0][0][13] = 0
4494 00:56:19.926446 tx_first_pass[0][0][13] = 0
4495 00:56:19.926523 tx_last_pass[0][0][13] = 0
4496 00:56:19.929443 tx_win_center[0][0][14] = 0
4497 00:56:19.932571 tx_first_pass[0][0][14] = 0
4498 00:56:19.936194 tx_last_pass[0][0][14] = 0
4499 00:56:19.936270 tx_win_center[0][0][15] = 0
4500 00:56:19.939551 tx_first_pass[0][0][15] = 0
4501 00:56:19.943067 tx_last_pass[0][0][15] = 0
4502 00:56:19.946121 tx_win_center[0][1][0] = 0
4503 00:56:19.946197 tx_first_pass[0][1][0] = 0
4504 00:56:19.949196 tx_last_pass[0][1][0] = 0
4505 00:56:19.952593 tx_win_center[0][1][1] = 0
4506 00:56:19.956300 tx_first_pass[0][1][1] = 0
4507 00:56:19.956376 tx_last_pass[0][1][1] = 0
4508 00:56:19.959361 tx_win_center[0][1][2] = 0
4509 00:56:19.962455 tx_first_pass[0][1][2] = 0
4510 00:56:19.966024 tx_last_pass[0][1][2] = 0
4511 00:56:19.966100 tx_win_center[0][1][3] = 0
4512 00:56:19.969166 tx_first_pass[0][1][3] = 0
4513 00:56:19.972639 tx_last_pass[0][1][3] = 0
4514 00:56:19.976196 tx_win_center[0][1][4] = 0
4515 00:56:19.976272 tx_first_pass[0][1][4] = 0
4516 00:56:19.978940 tx_last_pass[0][1][4] = 0
4517 00:56:19.982325 tx_win_center[0][1][5] = 0
4518 00:56:19.982401 tx_first_pass[0][1][5] = 0
4519 00:56:19.985588 tx_last_pass[0][1][5] = 0
4520 00:56:19.988824 tx_win_center[0][1][6] = 0
4521 00:56:19.992269 tx_first_pass[0][1][6] = 0
4522 00:56:19.992345 tx_last_pass[0][1][6] = 0
4523 00:56:19.995395 tx_win_center[0][1][7] = 0
4524 00:56:19.998740 tx_first_pass[0][1][7] = 0
4525 00:56:20.002242 tx_last_pass[0][1][7] = 0
4526 00:56:20.002320 tx_win_center[0][1][8] = 0
4527 00:56:20.005685 tx_first_pass[0][1][8] = 0
4528 00:56:20.008561 tx_last_pass[0][1][8] = 0
4529 00:56:20.008662 tx_win_center[0][1][9] = 0
4530 00:56:20.011987 tx_first_pass[0][1][9] = 0
4531 00:56:20.015882 tx_last_pass[0][1][9] = 0
4532 00:56:20.018992 tx_win_center[0][1][10] = 0
4533 00:56:20.019068 tx_first_pass[0][1][10] = 0
4534 00:56:20.022271 tx_last_pass[0][1][10] = 0
4535 00:56:20.025390 tx_win_center[0][1][11] = 0
4536 00:56:20.028796 tx_first_pass[0][1][11] = 0
4537 00:56:20.028898 tx_last_pass[0][1][11] = 0
4538 00:56:20.032179 tx_win_center[0][1][12] = 0
4539 00:56:20.035373 tx_first_pass[0][1][12] = 0
4540 00:56:20.038524 tx_last_pass[0][1][12] = 0
4541 00:56:20.038601 tx_win_center[0][1][13] = 0
4542 00:56:20.041639 tx_first_pass[0][1][13] = 0
4543 00:56:20.045018 tx_last_pass[0][1][13] = 0
4544 00:56:20.048545 tx_win_center[0][1][14] = 0
4545 00:56:20.048621 tx_first_pass[0][1][14] = 0
4546 00:56:20.052113 tx_last_pass[0][1][14] = 0
4547 00:56:20.055489 tx_win_center[0][1][15] = 0
4548 00:56:20.058518 tx_first_pass[0][1][15] = 0
4549 00:56:20.058618 tx_last_pass[0][1][15] = 0
4550 00:56:20.061786 tx_win_center[1][0][0] = 0
4551 00:56:20.065273 tx_first_pass[1][0][0] = 0
4552 00:56:20.068516 tx_last_pass[1][0][0] = 0
4553 00:56:20.068592 tx_win_center[1][0][1] = 0
4554 00:56:20.072143 tx_first_pass[1][0][1] = 0
4555 00:56:20.075169 tx_last_pass[1][0][1] = 0
4556 00:56:20.078451 tx_win_center[1][0][2] = 0
4557 00:56:20.078528 tx_first_pass[1][0][2] = 0
4558 00:56:20.081791 tx_last_pass[1][0][2] = 0
4559 00:56:20.085087 tx_win_center[1][0][3] = 0
4560 00:56:20.085164 tx_first_pass[1][0][3] = 0
4561 00:56:20.088691 tx_last_pass[1][0][3] = 0
4562 00:56:20.092085 tx_win_center[1][0][4] = 0
4563 00:56:20.095154 tx_first_pass[1][0][4] = 0
4564 00:56:20.095230 tx_last_pass[1][0][4] = 0
4565 00:56:20.098546 tx_win_center[1][0][5] = 0
4566 00:56:20.102047 tx_first_pass[1][0][5] = 0
4567 00:56:20.102128 tx_last_pass[1][0][5] = 0
4568 00:56:20.105308 tx_win_center[1][0][6] = 0
4569 00:56:20.108664 tx_first_pass[1][0][6] = 0
4570 00:56:20.111803 tx_last_pass[1][0][6] = 0
4571 00:56:20.111881 tx_win_center[1][0][7] = 0
4572 00:56:20.115469 tx_first_pass[1][0][7] = 0
4573 00:56:20.118472 tx_last_pass[1][0][7] = 0
4574 00:56:20.122323 tx_win_center[1][0][8] = 0
4575 00:56:20.122402 tx_first_pass[1][0][8] = 0
4576 00:56:20.125157 tx_last_pass[1][0][8] = 0
4577 00:56:20.128917 tx_win_center[1][0][9] = 0
4578 00:56:20.128996 tx_first_pass[1][0][9] = 0
4579 00:56:20.132344 tx_last_pass[1][0][9] = 0
4580 00:56:20.135318 tx_win_center[1][0][10] = 0
4581 00:56:20.138412 tx_first_pass[1][0][10] = 0
4582 00:56:20.138490 tx_last_pass[1][0][10] = 0
4583 00:56:20.141910 tx_win_center[1][0][11] = 0
4584 00:56:20.145333 tx_first_pass[1][0][11] = 0
4585 00:56:20.148421 tx_last_pass[1][0][11] = 0
4586 00:56:20.148497 tx_win_center[1][0][12] = 0
4587 00:56:20.152190 tx_first_pass[1][0][12] = 0
4588 00:56:20.155490 tx_last_pass[1][0][12] = 0
4589 00:56:20.158411 tx_win_center[1][0][13] = 0
4590 00:56:20.158491 tx_first_pass[1][0][13] = 0
4591 00:56:20.161864 tx_last_pass[1][0][13] = 0
4592 00:56:20.165332 tx_win_center[1][0][14] = 0
4593 00:56:20.168250 tx_first_pass[1][0][14] = 0
4594 00:56:20.168329 tx_last_pass[1][0][14] = 0
4595 00:56:20.171714 tx_win_center[1][0][15] = 0
4596 00:56:20.175120 tx_first_pass[1][0][15] = 0
4597 00:56:20.178430 tx_last_pass[1][0][15] = 0
4598 00:56:20.178538 tx_win_center[1][1][0] = 0
4599 00:56:20.182048 tx_first_pass[1][1][0] = 0
4600 00:56:20.185367 tx_last_pass[1][1][0] = 0
4601 00:56:20.188218 tx_win_center[1][1][1] = 0
4602 00:56:20.188297 tx_first_pass[1][1][1] = 0
4603 00:56:20.191632 tx_last_pass[1][1][1] = 0
4604 00:56:20.195032 tx_win_center[1][1][2] = 0
4605 00:56:20.198687 tx_first_pass[1][1][2] = 0
4606 00:56:20.198766 tx_last_pass[1][1][2] = 0
4607 00:56:20.201645 tx_win_center[1][1][3] = 0
4608 00:56:20.204844 tx_first_pass[1][1][3] = 0
4609 00:56:20.204923 tx_last_pass[1][1][3] = 0
4610 00:56:20.208558 tx_win_center[1][1][4] = 0
4611 00:56:20.211814 tx_first_pass[1][1][4] = 0
4612 00:56:20.215242 tx_last_pass[1][1][4] = 0
4613 00:56:20.215321 tx_win_center[1][1][5] = 0
4614 00:56:20.217939 tx_first_pass[1][1][5] = 0
4615 00:56:20.221307 tx_last_pass[1][1][5] = 0
4616 00:56:20.224742 tx_win_center[1][1][6] = 0
4617 00:56:20.224835 tx_first_pass[1][1][6] = 0
4618 00:56:20.227966 tx_last_pass[1][1][6] = 0
4619 00:56:20.231351 tx_win_center[1][1][7] = 0
4620 00:56:20.231428 tx_first_pass[1][1][7] = 0
4621 00:56:20.234951 tx_last_pass[1][1][7] = 0
4622 00:56:20.238263 tx_win_center[1][1][8] = 0
4623 00:56:20.241552 tx_first_pass[1][1][8] = 0
4624 00:56:20.241655 tx_last_pass[1][1][8] = 0
4625 00:56:20.244752 tx_win_center[1][1][9] = 0
4626 00:56:20.248036 tx_first_pass[1][1][9] = 0
4627 00:56:20.251398 tx_last_pass[1][1][9] = 0
4628 00:56:20.251475 tx_win_center[1][1][10] = 0
4629 00:56:20.255137 tx_first_pass[1][1][10] = 0
4630 00:56:20.258152 tx_last_pass[1][1][10] = 0
4631 00:56:20.261175 tx_win_center[1][1][11] = 0
4632 00:56:20.261251 tx_first_pass[1][1][11] = 0
4633 00:56:20.264633 tx_last_pass[1][1][11] = 0
4634 00:56:20.268336 tx_win_center[1][1][12] = 0
4635 00:56:20.271427 tx_first_pass[1][1][12] = 0
4636 00:56:20.271540 tx_last_pass[1][1][12] = 0
4637 00:56:20.274808 tx_win_center[1][1][13] = 0
4638 00:56:20.277672 tx_first_pass[1][1][13] = 0
4639 00:56:20.281230 tx_last_pass[1][1][13] = 0
4640 00:56:20.281307 tx_win_center[1][1][14] = 0
4641 00:56:20.284711 tx_first_pass[1][1][14] = 0
4642 00:56:20.287906 tx_last_pass[1][1][14] = 0
4643 00:56:20.290988 tx_win_center[1][1][15] = 0
4644 00:56:20.291068 tx_first_pass[1][1][15] = 0
4645 00:56:20.294432 tx_last_pass[1][1][15] = 0
4646 00:56:20.297845 dump params rx window
4647 00:56:20.297945 rx_firspass[0][0][0] = 0
4648 00:56:20.301254 rx_lastpass[0][0][0] = 0
4649 00:56:20.304255 rx_firspass[0][0][1] = 0
4650 00:56:20.304329 rx_lastpass[0][0][1] = 0
4651 00:56:20.307512 rx_firspass[0][0][2] = 0
4652 00:56:20.310966 rx_lastpass[0][0][2] = 0
4653 00:56:20.314282 rx_firspass[0][0][3] = 0
4654 00:56:20.314363 rx_lastpass[0][0][3] = 0
4655 00:56:20.317532 rx_firspass[0][0][4] = 0
4656 00:56:20.321005 rx_lastpass[0][0][4] = 0
4657 00:56:20.321084 rx_firspass[0][0][5] = 0
4658 00:56:20.324396 rx_lastpass[0][0][5] = 0
4659 00:56:20.327349 rx_firspass[0][0][6] = 0
4660 00:56:20.327425 rx_lastpass[0][0][6] = 0
4661 00:56:20.331200 rx_firspass[0][0][7] = 0
4662 00:56:20.334007 rx_lastpass[0][0][7] = 0
4663 00:56:20.334114 rx_firspass[0][0][8] = 0
4664 00:56:20.337474 rx_lastpass[0][0][8] = 0
4665 00:56:20.340995 rx_firspass[0][0][9] = 0
4666 00:56:20.341086 rx_lastpass[0][0][9] = 0
4667 00:56:20.344239 rx_firspass[0][0][10] = 0
4668 00:56:20.347461 rx_lastpass[0][0][10] = 0
4669 00:56:20.350749 rx_firspass[0][0][11] = 0
4670 00:56:20.350824 rx_lastpass[0][0][11] = 0
4671 00:56:20.354323 rx_firspass[0][0][12] = 0
4672 00:56:20.357785 rx_lastpass[0][0][12] = 0
4673 00:56:20.357890 rx_firspass[0][0][13] = 0
4674 00:56:20.360525 rx_lastpass[0][0][13] = 0
4675 00:56:20.364506 rx_firspass[0][0][14] = 0
4676 00:56:20.367228 rx_lastpass[0][0][14] = 0
4677 00:56:20.367304 rx_firspass[0][0][15] = 0
4678 00:56:20.370608 rx_lastpass[0][0][15] = 0
4679 00:56:20.373924 rx_firspass[0][1][0] = 0
4680 00:56:20.374019 rx_lastpass[0][1][0] = 0
4681 00:56:20.377375 rx_firspass[0][1][1] = 0
4682 00:56:20.380734 rx_lastpass[0][1][1] = 0
4683 00:56:20.380809 rx_firspass[0][1][2] = 0
4684 00:56:20.384300 rx_lastpass[0][1][2] = 0
4685 00:56:20.387539 rx_firspass[0][1][3] = 0
4686 00:56:20.390955 rx_lastpass[0][1][3] = 0
4687 00:56:20.391030 rx_firspass[0][1][4] = 0
4688 00:56:20.394273 rx_lastpass[0][1][4] = 0
4689 00:56:20.397409 rx_firspass[0][1][5] = 0
4690 00:56:20.397484 rx_lastpass[0][1][5] = 0
4691 00:56:20.400931 rx_firspass[0][1][6] = 0
4692 00:56:20.404224 rx_lastpass[0][1][6] = 0
4693 00:56:20.404299 rx_firspass[0][1][7] = 0
4694 00:56:20.407159 rx_lastpass[0][1][7] = 0
4695 00:56:20.410710 rx_firspass[0][1][8] = 0
4696 00:56:20.410785 rx_lastpass[0][1][8] = 0
4697 00:56:20.414118 rx_firspass[0][1][9] = 0
4698 00:56:20.417564 rx_lastpass[0][1][9] = 0
4699 00:56:20.417640 rx_firspass[0][1][10] = 0
4700 00:56:20.420345 rx_lastpass[0][1][10] = 0
4701 00:56:20.424122 rx_firspass[0][1][11] = 0
4702 00:56:20.427604 rx_lastpass[0][1][11] = 0
4703 00:56:20.427680 rx_firspass[0][1][12] = 0
4704 00:56:20.430992 rx_lastpass[0][1][12] = 0
4705 00:56:20.433828 rx_firspass[0][1][13] = 0
4706 00:56:20.437172 rx_lastpass[0][1][13] = 0
4707 00:56:20.437248 rx_firspass[0][1][14] = 0
4708 00:56:20.440684 rx_lastpass[0][1][14] = 0
4709 00:56:20.443889 rx_firspass[0][1][15] = 0
4710 00:56:20.443964 rx_lastpass[0][1][15] = 0
4711 00:56:20.447031 rx_firspass[1][0][0] = 0
4712 00:56:20.450351 rx_lastpass[1][0][0] = 0
4713 00:56:20.450427 rx_firspass[1][0][1] = 0
4714 00:56:20.453812 rx_lastpass[1][0][1] = 0
4715 00:56:20.457425 rx_firspass[1][0][2] = 0
4716 00:56:20.457501 rx_lastpass[1][0][2] = 0
4717 00:56:20.460418 rx_firspass[1][0][3] = 0
4718 00:56:20.464023 rx_lastpass[1][0][3] = 0
4719 00:56:20.464099 rx_firspass[1][0][4] = 0
4720 00:56:20.466996 rx_lastpass[1][0][4] = 0
4721 00:56:20.470349 rx_firspass[1][0][5] = 0
4722 00:56:20.473655 rx_lastpass[1][0][5] = 0
4723 00:56:20.473731 rx_firspass[1][0][6] = 0
4724 00:56:20.477550 rx_lastpass[1][0][6] = 0
4725 00:56:20.480821 rx_firspass[1][0][7] = 0
4726 00:56:20.480896 rx_lastpass[1][0][7] = 0
4727 00:56:20.484402 rx_firspass[1][0][8] = 0
4728 00:56:20.487084 rx_lastpass[1][0][8] = 0
4729 00:56:20.487160 rx_firspass[1][0][9] = 0
4730 00:56:20.490436 rx_lastpass[1][0][9] = 0
4731 00:56:20.494025 rx_firspass[1][0][10] = 0
4732 00:56:20.494102 rx_lastpass[1][0][10] = 0
4733 00:56:20.497393 rx_firspass[1][0][11] = 0
4734 00:56:20.500706 rx_lastpass[1][0][11] = 0
4735 00:56:20.503899 rx_firspass[1][0][12] = 0
4736 00:56:20.503975 rx_lastpass[1][0][12] = 0
4737 00:56:20.507029 rx_firspass[1][0][13] = 0
4738 00:56:20.510320 rx_lastpass[1][0][13] = 0
4739 00:56:20.510399 rx_firspass[1][0][14] = 0
4740 00:56:20.513872 rx_lastpass[1][0][14] = 0
4741 00:56:20.517257 rx_firspass[1][0][15] = 0
4742 00:56:20.520171 rx_lastpass[1][0][15] = 0
4743 00:56:20.520250 rx_firspass[1][1][0] = 0
4744 00:56:20.523608 rx_lastpass[1][1][0] = 0
4745 00:56:20.526996 rx_firspass[1][1][1] = 0
4746 00:56:20.527075 rx_lastpass[1][1][1] = 0
4747 00:56:20.529973 rx_firspass[1][1][2] = 0
4748 00:56:20.533939 rx_lastpass[1][1][2] = 0
4749 00:56:20.534056 rx_firspass[1][1][3] = 0
4750 00:56:20.536812 rx_lastpass[1][1][3] = 0
4751 00:56:20.540243 rx_firspass[1][1][4] = 0
4752 00:56:20.540321 rx_lastpass[1][1][4] = 0
4753 00:56:20.543696 rx_firspass[1][1][5] = 0
4754 00:56:20.546763 rx_lastpass[1][1][5] = 0
4755 00:56:20.549936 rx_firspass[1][1][6] = 0
4756 00:56:20.550022 rx_lastpass[1][1][6] = 0
4757 00:56:20.553625 rx_firspass[1][1][7] = 0
4758 00:56:20.556919 rx_lastpass[1][1][7] = 0
4759 00:56:20.556997 rx_firspass[1][1][8] = 0
4760 00:56:20.560300 rx_lastpass[1][1][8] = 0
4761 00:56:20.563502 rx_firspass[1][1][9] = 0
4762 00:56:20.563581 rx_lastpass[1][1][9] = 0
4763 00:56:20.566883 rx_firspass[1][1][10] = 0
4764 00:56:20.569886 rx_lastpass[1][1][10] = 0
4765 00:56:20.573384 rx_firspass[1][1][11] = 0
4766 00:56:20.573462 rx_lastpass[1][1][11] = 0
4767 00:56:20.576429 rx_firspass[1][1][12] = 0
4768 00:56:20.580554 rx_lastpass[1][1][12] = 0
4769 00:56:20.580634 rx_firspass[1][1][13] = 0
4770 00:56:20.583057 rx_lastpass[1][1][13] = 0
4771 00:56:20.586406 rx_firspass[1][1][14] = 0
4772 00:56:20.589756 rx_lastpass[1][1][14] = 0
4773 00:56:20.589835 rx_firspass[1][1][15] = 0
4774 00:56:20.593354 rx_lastpass[1][1][15] = 0
4775 00:56:20.596742 dump params clk_delay
4776 00:56:20.596817 clk_delay[0] = 0
4777 00:56:20.600290 clk_delay[1] = 0
4778 00:56:20.600365 dump params dqs_delay
4779 00:56:20.603055 dqs_delay[0][0] = 0
4780 00:56:20.603130 dqs_delay[0][1] = 0
4781 00:56:20.606401 dqs_delay[1][0] = 0
4782 00:56:20.606477 dqs_delay[1][1] = 0
4783 00:56:20.609908 dump params delay_cell_unit = 833
4784 00:56:20.613069 dump source = 0x0
4785 00:56:20.613144 dump params frequency:800
4786 00:56:20.616601 dump params rank number:2
4787 00:56:20.616676
4788 00:56:20.619841 dump params write leveling
4789 00:56:20.623443 write leveling[0][0][0] = 0x0
4790 00:56:20.623519 write leveling[0][0][1] = 0x0
4791 00:56:20.626737 write leveling[0][1][0] = 0x0
4792 00:56:20.629620 write leveling[0][1][1] = 0x0
4793 00:56:20.633379 write leveling[1][0][0] = 0x0
4794 00:56:20.636566 write leveling[1][0][1] = 0x0
4795 00:56:20.639785 write leveling[1][1][0] = 0x0
4796 00:56:20.639860 write leveling[1][1][1] = 0x0
4797 00:56:20.643494 dump params cbt_cs
4798 00:56:20.643569 cbt_cs[0][0] = 0x0
4799 00:56:20.646939 cbt_cs[0][1] = 0x0
4800 00:56:20.647014 cbt_cs[1][0] = 0x0
4801 00:56:20.650249 cbt_cs[1][1] = 0x0
4802 00:56:20.650324 dump params cbt_mr12
4803 00:56:20.653097 cbt_mr12[0][0] = 0x0
4804 00:56:20.656471 cbt_mr12[0][1] = 0x0
4805 00:56:20.656546 cbt_mr12[1][0] = 0x0
4806 00:56:20.660017 cbt_mr12[1][1] = 0x0
4807 00:56:20.660092 dump params tx window
4808 00:56:20.663412 tx_center_min[0][0][0] = 0
4809 00:56:20.666263 tx_center_max[0][0][0] = 0
4810 00:56:20.669729 tx_center_min[0][0][1] = 0
4811 00:56:20.669804 tx_center_max[0][0][1] = 0
4812 00:56:20.673051 tx_center_min[0][1][0] = 0
4813 00:56:20.676414 tx_center_max[0][1][0] = 0
4814 00:56:20.679920 tx_center_min[0][1][1] = 0
4815 00:56:20.679995 tx_center_max[0][1][1] = 0
4816 00:56:20.683059 tx_center_min[1][0][0] = 0
4817 00:56:20.686428 tx_center_max[1][0][0] = 0
4818 00:56:20.686504 tx_center_min[1][0][1] = 0
4819 00:56:20.690031 tx_center_max[1][0][1] = 0
4820 00:56:20.692805 tx_center_min[1][1][0] = 0
4821 00:56:20.696293 tx_center_max[1][1][0] = 0
4822 00:56:20.696369 tx_center_min[1][1][1] = 0
4823 00:56:20.699613 tx_center_max[1][1][1] = 0
4824 00:56:20.703290 dump params tx window
4825 00:56:20.703365 tx_win_center[0][0][0] = 0
4826 00:56:20.706225 tx_first_pass[0][0][0] = 0
4827 00:56:20.709352 tx_last_pass[0][0][0] = 0
4828 00:56:20.712877 tx_win_center[0][0][1] = 0
4829 00:56:20.712956 tx_first_pass[0][0][1] = 0
4830 00:56:20.716340 tx_last_pass[0][0][1] = 0
4831 00:56:20.719731 tx_win_center[0][0][2] = 0
4832 00:56:20.722875 tx_first_pass[0][0][2] = 0
4833 00:56:20.722951 tx_last_pass[0][0][2] = 0
4834 00:56:20.725871 tx_win_center[0][0][3] = 0
4835 00:56:20.729569 tx_first_pass[0][0][3] = 0
4836 00:56:20.732559 tx_last_pass[0][0][3] = 0
4837 00:56:20.732635 tx_win_center[0][0][4] = 0
4838 00:56:20.736011 tx_first_pass[0][0][4] = 0
4839 00:56:20.739670 tx_last_pass[0][0][4] = 0
4840 00:56:20.739746 tx_win_center[0][0][5] = 0
4841 00:56:20.743048 tx_first_pass[0][0][5] = 0
4842 00:56:20.745813 tx_last_pass[0][0][5] = 0
4843 00:56:20.749255 tx_win_center[0][0][6] = 0
4844 00:56:20.749331 tx_first_pass[0][0][6] = 0
4845 00:56:20.752575 tx_last_pass[0][0][6] = 0
4846 00:56:20.756073 tx_win_center[0][0][7] = 0
4847 00:56:20.759615 tx_first_pass[0][0][7] = 0
4848 00:56:20.759690 tx_last_pass[0][0][7] = 0
4849 00:56:20.762399 tx_win_center[0][0][8] = 0
4850 00:56:20.765932 tx_first_pass[0][0][8] = 0
4851 00:56:20.766038 tx_last_pass[0][0][8] = 0
4852 00:56:20.768897 tx_win_center[0][0][9] = 0
4853 00:56:20.772369 tx_first_pass[0][0][9] = 0
4854 00:56:20.776237 tx_last_pass[0][0][9] = 0
4855 00:56:20.776313 tx_win_center[0][0][10] = 0
4856 00:56:20.778942 tx_first_pass[0][0][10] = 0
4857 00:56:20.782427 tx_last_pass[0][0][10] = 0
4858 00:56:20.786030 tx_win_center[0][0][11] = 0
4859 00:56:20.786107 tx_first_pass[0][0][11] = 0
4860 00:56:20.788796 tx_last_pass[0][0][11] = 0
4861 00:56:20.792209 tx_win_center[0][0][12] = 0
4862 00:56:20.795692 tx_first_pass[0][0][12] = 0
4863 00:56:20.795768 tx_last_pass[0][0][12] = 0
4864 00:56:20.799223 tx_win_center[0][0][13] = 0
4865 00:56:20.802555 tx_first_pass[0][0][13] = 0
4866 00:56:20.805466 tx_last_pass[0][0][13] = 0
4867 00:56:20.805542 tx_win_center[0][0][14] = 0
4868 00:56:20.809029 tx_first_pass[0][0][14] = 0
4869 00:56:20.812130 tx_last_pass[0][0][14] = 0
4870 00:56:20.815378 tx_win_center[0][0][15] = 0
4871 00:56:20.815454 tx_first_pass[0][0][15] = 0
4872 00:56:20.818692 tx_last_pass[0][0][15] = 0
4873 00:56:20.822130 tx_win_center[0][1][0] = 0
4874 00:56:20.825503 tx_first_pass[0][1][0] = 0
4875 00:56:20.825579 tx_last_pass[0][1][0] = 0
4876 00:56:20.828836 tx_win_center[0][1][1] = 0
4877 00:56:20.832126 tx_first_pass[0][1][1] = 0
4878 00:56:20.835800 tx_last_pass[0][1][1] = 0
4879 00:56:20.835876 tx_win_center[0][1][2] = 0
4880 00:56:20.838966 tx_first_pass[0][1][2] = 0
4881 00:56:20.842201 tx_last_pass[0][1][2] = 0
4882 00:56:20.842279 tx_win_center[0][1][3] = 0
4883 00:56:20.845573 tx_first_pass[0][1][3] = 0
4884 00:56:20.848677 tx_last_pass[0][1][3] = 0
4885 00:56:20.852217 tx_win_center[0][1][4] = 0
4886 00:56:20.852293 tx_first_pass[0][1][4] = 0
4887 00:56:20.855459 tx_last_pass[0][1][4] = 0
4888 00:56:20.859020 tx_win_center[0][1][5] = 0
4889 00:56:20.862547 tx_first_pass[0][1][5] = 0
4890 00:56:20.862624 tx_last_pass[0][1][5] = 0
4891 00:56:20.865932 tx_win_center[0][1][6] = 0
4892 00:56:20.868804 tx_first_pass[0][1][6] = 0
4893 00:56:20.868879 tx_last_pass[0][1][6] = 0
4894 00:56:20.872148 tx_win_center[0][1][7] = 0
4895 00:56:20.875710 tx_first_pass[0][1][7] = 0
4896 00:56:20.878714 tx_last_pass[0][1][7] = 0
4897 00:56:20.878790 tx_win_center[0][1][8] = 0
4898 00:56:20.882164 tx_first_pass[0][1][8] = 0
4899 00:56:20.885502 tx_last_pass[0][1][8] = 0
4900 00:56:20.885578 tx_win_center[0][1][9] = 0
4901 00:56:20.888864 tx_first_pass[0][1][9] = 0
4902 00:56:20.892413 tx_last_pass[0][1][9] = 0
4903 00:56:20.895689 tx_win_center[0][1][10] = 0
4904 00:56:20.895766 tx_first_pass[0][1][10] = 0
4905 00:56:20.899086 tx_last_pass[0][1][10] = 0
4906 00:56:20.902055 tx_win_center[0][1][11] = 0
4907 00:56:20.905223 tx_first_pass[0][1][11] = 0
4908 00:56:20.905299 tx_last_pass[0][1][11] = 0
4909 00:56:20.908592 tx_win_center[0][1][12] = 0
4910 00:56:20.912298 tx_first_pass[0][1][12] = 0
4911 00:56:20.915722 tx_last_pass[0][1][12] = 0
4912 00:56:20.915797 tx_win_center[0][1][13] = 0
4913 00:56:20.918983 tx_first_pass[0][1][13] = 0
4914 00:56:20.922256 tx_last_pass[0][1][13] = 0
4915 00:56:20.925306 tx_win_center[0][1][14] = 0
4916 00:56:20.925383 tx_first_pass[0][1][14] = 0
4917 00:56:20.929050 tx_last_pass[0][1][14] = 0
4918 00:56:20.931833 tx_win_center[0][1][15] = 0
4919 00:56:20.935420 tx_first_pass[0][1][15] = 0
4920 00:56:20.935496 tx_last_pass[0][1][15] = 0
4921 00:56:20.938963 tx_win_center[1][0][0] = 0
4922 00:56:20.941830 tx_first_pass[1][0][0] = 0
4923 00:56:20.945034 tx_last_pass[1][0][0] = 0
4924 00:56:20.945131 tx_win_center[1][0][1] = 0
4925 00:56:20.948609 tx_first_pass[1][0][1] = 0
4926 00:56:20.951709 tx_last_pass[1][0][1] = 0
4927 00:56:20.955069 tx_win_center[1][0][2] = 0
4928 00:56:20.955144 tx_first_pass[1][0][2] = 0
4929 00:56:20.958667 tx_last_pass[1][0][2] = 0
4930 00:56:20.962172 tx_win_center[1][0][3] = 0
4931 00:56:20.962247 tx_first_pass[1][0][3] = 0
4932 00:56:20.965120 tx_last_pass[1][0][3] = 0
4933 00:56:20.968525 tx_win_center[1][0][4] = 0
4934 00:56:20.972129 tx_first_pass[1][0][4] = 0
4935 00:56:20.972205 tx_last_pass[1][0][4] = 0
4936 00:56:20.975053 tx_win_center[1][0][5] = 0
4937 00:56:20.978568 tx_first_pass[1][0][5] = 0
4938 00:56:20.981995 tx_last_pass[1][0][5] = 0
4939 00:56:20.982103 tx_win_center[1][0][6] = 0
4940 00:56:20.985404 tx_first_pass[1][0][6] = 0
4941 00:56:20.988838 tx_last_pass[1][0][6] = 0
4942 00:56:20.988914 tx_win_center[1][0][7] = 0
4943 00:56:20.991677 tx_first_pass[1][0][7] = 0
4944 00:56:20.995006 tx_last_pass[1][0][7] = 0
4945 00:56:20.998343 tx_win_center[1][0][8] = 0
4946 00:56:20.998419 tx_first_pass[1][0][8] = 0
4947 00:56:21.001894 tx_last_pass[1][0][8] = 0
4948 00:56:21.004796 tx_win_center[1][0][9] = 0
4949 00:56:21.008513 tx_first_pass[1][0][9] = 0
4950 00:56:21.008589 tx_last_pass[1][0][9] = 0
4951 00:56:21.011439 tx_win_center[1][0][10] = 0
4952 00:56:21.014848 tx_first_pass[1][0][10] = 0
4953 00:56:21.018488 tx_last_pass[1][0][10] = 0
4954 00:56:21.018563 tx_win_center[1][0][11] = 0
4955 00:56:21.021291 tx_first_pass[1][0][11] = 0
4956 00:56:21.025300 tx_last_pass[1][0][11] = 0
4957 00:56:21.028144 tx_win_center[1][0][12] = 0
4958 00:56:21.028221 tx_first_pass[1][0][12] = 0
4959 00:56:21.031540 tx_last_pass[1][0][12] = 0
4960 00:56:21.034868 tx_win_center[1][0][13] = 0
4961 00:56:21.038310 tx_first_pass[1][0][13] = 0
4962 00:56:21.038386 tx_last_pass[1][0][13] = 0
4963 00:56:21.041599 tx_win_center[1][0][14] = 0
4964 00:56:21.044705 tx_first_pass[1][0][14] = 0
4965 00:56:21.048060 tx_last_pass[1][0][14] = 0
4966 00:56:21.048136 tx_win_center[1][0][15] = 0
4967 00:56:21.051535 tx_first_pass[1][0][15] = 0
4968 00:56:21.054555 tx_last_pass[1][0][15] = 0
4969 00:56:21.058614 tx_win_center[1][1][0] = 0
4970 00:56:21.058690 tx_first_pass[1][1][0] = 0
4971 00:56:21.061315 tx_last_pass[1][1][0] = 0
4972 00:56:21.064634 tx_win_center[1][1][1] = 0
4973 00:56:21.064725 tx_first_pass[1][1][1] = 0
4974 00:56:21.068047 tx_last_pass[1][1][1] = 0
4975 00:56:21.071491 tx_win_center[1][1][2] = 0
4976 00:56:21.074887 tx_first_pass[1][1][2] = 0
4977 00:56:21.074962 tx_last_pass[1][1][2] = 0
4978 00:56:21.078131 tx_win_center[1][1][3] = 0
4979 00:56:21.081291 tx_first_pass[1][1][3] = 0
4980 00:56:21.084807 tx_last_pass[1][1][3] = 0
4981 00:56:21.084883 tx_win_center[1][1][4] = 0
4982 00:56:21.088184 tx_first_pass[1][1][4] = 0
4983 00:56:21.094392 tx_last_pass[1][1][4] = 0
4984 00:56:21.094483 tx_win_center[1][1][5] = 0
4985 00:56:21.094935 tx_first_pass[1][1][5] = 0
4986 00:56:21.097926 tx_last_pass[1][1][5] = 0
4987 00:56:21.101487 tx_win_center[1][1][6] = 0
4988 00:56:21.101578 tx_first_pass[1][1][6] = 0
4989 00:56:21.104894 tx_last_pass[1][1][6] = 0
4990 00:56:21.108245 tx_win_center[1][1][7] = 0
4991 00:56:21.111759 tx_first_pass[1][1][7] = 0
4992 00:56:21.111855 tx_last_pass[1][1][7] = 0
4993 00:56:21.114624 tx_win_center[1][1][8] = 0
4994 00:56:21.117876 tx_first_pass[1][1][8] = 0
4995 00:56:21.117964 tx_last_pass[1][1][8] = 0
4996 00:56:21.121316 tx_win_center[1][1][9] = 0
4997 00:56:21.124929 tx_first_pass[1][1][9] = 0
4998 00:56:21.128364 tx_last_pass[1][1][9] = 0
4999 00:56:21.128440 tx_win_center[1][1][10] = 0
5000 00:56:21.131068 tx_first_pass[1][1][10] = 0
5001 00:56:21.134500 tx_last_pass[1][1][10] = 0
5002 00:56:21.138119 tx_win_center[1][1][11] = 0
5003 00:56:21.138195 tx_first_pass[1][1][11] = 0
5004 00:56:21.140878 tx_last_pass[1][1][11] = 0
5005 00:56:21.144254 tx_win_center[1][1][12] = 0
5006 00:56:21.147553 tx_first_pass[1][1][12] = 0
5007 00:56:21.147630 tx_last_pass[1][1][12] = 0
5008 00:56:21.150992 tx_win_center[1][1][13] = 0
5009 00:56:21.154499 tx_first_pass[1][1][13] = 0
5010 00:56:21.157779 tx_last_pass[1][1][13] = 0
5011 00:56:21.157849 tx_win_center[1][1][14] = 0
5012 00:56:21.160787 tx_first_pass[1][1][14] = 0
5013 00:56:21.164672 tx_last_pass[1][1][14] = 0
5014 00:56:21.167997 tx_win_center[1][1][15] = 0
5015 00:56:21.168073 tx_first_pass[1][1][15] = 0
5016 00:56:21.170726 tx_last_pass[1][1][15] = 0
5017 00:56:21.174016 dump params rx window
5018 00:56:21.174091 rx_firspass[0][0][0] = 0
5019 00:56:21.177382 rx_lastpass[0][0][0] = 0
5020 00:56:21.180849 rx_firspass[0][0][1] = 0
5021 00:56:21.183911 rx_lastpass[0][0][1] = 0
5022 00:56:21.183987 rx_firspass[0][0][2] = 0
5023 00:56:21.187449 rx_lastpass[0][0][2] = 0
5024 00:56:21.190708 rx_firspass[0][0][3] = 0
5025 00:56:21.190784 rx_lastpass[0][0][3] = 0
5026 00:56:21.193920 rx_firspass[0][0][4] = 0
5027 00:56:21.197582 rx_lastpass[0][0][4] = 0
5028 00:56:21.197700 rx_firspass[0][0][5] = 0
5029 00:56:21.200521 rx_lastpass[0][0][5] = 0
5030 00:56:21.203549 rx_firspass[0][0][6] = 0
5031 00:56:21.207137 rx_lastpass[0][0][6] = 0
5032 00:56:21.207213 rx_firspass[0][0][7] = 0
5033 00:56:21.210996 rx_lastpass[0][0][7] = 0
5034 00:56:21.214383 rx_firspass[0][0][8] = 0
5035 00:56:21.214458 rx_lastpass[0][0][8] = 0
5036 00:56:21.217180 rx_firspass[0][0][9] = 0
5037 00:56:21.220600 rx_lastpass[0][0][9] = 0
5038 00:56:21.220691 rx_firspass[0][0][10] = 0
5039 00:56:21.223957 rx_lastpass[0][0][10] = 0
5040 00:56:21.226716 rx_firspass[0][0][11] = 0
5041 00:56:21.230015 rx_lastpass[0][0][11] = 0
5042 00:56:21.230104 rx_firspass[0][0][12] = 0
5043 00:56:21.233436 rx_lastpass[0][0][12] = 0
5044 00:56:21.236795 rx_firspass[0][0][13] = 0
5045 00:56:21.236887 rx_lastpass[0][0][13] = 0
5046 00:56:21.240402 rx_firspass[0][0][14] = 0
5047 00:56:21.243914 rx_lastpass[0][0][14] = 0
5048 00:56:21.243990 rx_firspass[0][0][15] = 0
5049 00:56:21.246639 rx_lastpass[0][0][15] = 0
5050 00:56:21.249924 rx_firspass[0][1][0] = 0
5051 00:56:21.253664 rx_lastpass[0][1][0] = 0
5052 00:56:21.253740 rx_firspass[0][1][1] = 0
5053 00:56:21.256759 rx_lastpass[0][1][1] = 0
5054 00:56:21.260395 rx_firspass[0][1][2] = 0
5055 00:56:21.260475 rx_lastpass[0][1][2] = 0
5056 00:56:21.263692 rx_firspass[0][1][3] = 0
5057 00:56:21.266785 rx_lastpass[0][1][3] = 0
5058 00:56:21.266861 rx_firspass[0][1][4] = 0
5059 00:56:21.270118 rx_lastpass[0][1][4] = 0
5060 00:56:21.273049 rx_firspass[0][1][5] = 0
5061 00:56:21.276976 rx_lastpass[0][1][5] = 0
5062 00:56:21.277052 rx_firspass[0][1][6] = 0
5063 00:56:21.280419 rx_lastpass[0][1][6] = 0
5064 00:56:21.283183 rx_firspass[0][1][7] = 0
5065 00:56:21.283258 rx_lastpass[0][1][7] = 0
5066 00:56:21.286590 rx_firspass[0][1][8] = 0
5067 00:56:21.290037 rx_lastpass[0][1][8] = 0
5068 00:56:21.290126 rx_firspass[0][1][9] = 0
5069 00:56:21.293419 rx_lastpass[0][1][9] = 0
5070 00:56:21.296861 rx_firspass[0][1][10] = 0
5071 00:56:21.296945 rx_lastpass[0][1][10] = 0
5072 00:56:21.299667 rx_firspass[0][1][11] = 0
5073 00:56:21.303240 rx_lastpass[0][1][11] = 0
5074 00:56:21.306579 rx_firspass[0][1][12] = 0
5075 00:56:21.306655 rx_lastpass[0][1][12] = 0
5076 00:56:21.310126 rx_firspass[0][1][13] = 0
5077 00:56:21.313231 rx_lastpass[0][1][13] = 0
5078 00:56:21.313306 rx_firspass[0][1][14] = 0
5079 00:56:21.316449 rx_lastpass[0][1][14] = 0
5080 00:56:21.319786 rx_firspass[0][1][15] = 0
5081 00:56:21.323327 rx_lastpass[0][1][15] = 0
5082 00:56:21.323402 rx_firspass[1][0][0] = 0
5083 00:56:21.326817 rx_lastpass[1][0][0] = 0
5084 00:56:21.329913 rx_firspass[1][0][1] = 0
5085 00:56:21.330024 rx_lastpass[1][0][1] = 0
5086 00:56:21.333472 rx_firspass[1][0][2] = 0
5087 00:56:21.336768 rx_lastpass[1][0][2] = 0
5088 00:56:21.336844 rx_firspass[1][0][3] = 0
5089 00:56:21.339970 rx_lastpass[1][0][3] = 0
5090 00:56:21.342936 rx_firspass[1][0][4] = 0
5091 00:56:21.343012 rx_lastpass[1][0][4] = 0
5092 00:56:21.346268 rx_firspass[1][0][5] = 0
5093 00:56:21.350217 rx_lastpass[1][0][5] = 0
5094 00:56:21.350293 rx_firspass[1][0][6] = 0
5095 00:56:21.353630 rx_lastpass[1][0][6] = 0
5096 00:56:21.356228 rx_firspass[1][0][7] = 0
5097 00:56:21.359729 rx_lastpass[1][0][7] = 0
5098 00:56:21.359804 rx_firspass[1][0][8] = 0
5099 00:56:21.363116 rx_lastpass[1][0][8] = 0
5100 00:56:21.366415 rx_firspass[1][0][9] = 0
5101 00:56:21.366490 rx_lastpass[1][0][9] = 0
5102 00:56:21.369752 rx_firspass[1][0][10] = 0
5103 00:56:21.372945 rx_lastpass[1][0][10] = 0
5104 00:56:21.373021 rx_firspass[1][0][11] = 0
5105 00:56:21.376246 rx_lastpass[1][0][11] = 0
5106 00:56:21.379540 rx_firspass[1][0][12] = 0
5107 00:56:21.383046 rx_lastpass[1][0][12] = 0
5108 00:56:21.383121 rx_firspass[1][0][13] = 0
5109 00:56:21.386371 rx_lastpass[1][0][13] = 0
5110 00:56:21.389371 rx_firspass[1][0][14] = 0
5111 00:56:21.389447 rx_lastpass[1][0][14] = 0
5112 00:56:21.392847 rx_firspass[1][0][15] = 0
5113 00:56:21.396150 rx_lastpass[1][0][15] = 0
5114 00:56:21.399690 rx_firspass[1][1][0] = 0
5115 00:56:21.399766 rx_lastpass[1][1][0] = 0
5116 00:56:21.403006 rx_firspass[1][1][1] = 0
5117 00:56:21.406491 rx_lastpass[1][1][1] = 0
5118 00:56:21.406567 rx_firspass[1][1][2] = 0
5119 00:56:21.409401 rx_lastpass[1][1][2] = 0
5120 00:56:21.412678 rx_firspass[1][1][3] = 0
5121 00:56:21.412754 rx_lastpass[1][1][3] = 0
5122 00:56:21.416594 rx_firspass[1][1][4] = 0
5123 00:56:21.419541 rx_lastpass[1][1][4] = 0
5124 00:56:21.419617 rx_firspass[1][1][5] = 0
5125 00:56:21.423303 rx_lastpass[1][1][5] = 0
5126 00:56:21.426455 rx_firspass[1][1][6] = 0
5127 00:56:21.426531 rx_lastpass[1][1][6] = 0
5128 00:56:21.429658 rx_firspass[1][1][7] = 0
5129 00:56:21.433132 rx_lastpass[1][1][7] = 0
5130 00:56:21.433207 rx_firspass[1][1][8] = 0
5131 00:56:21.436415 rx_lastpass[1][1][8] = 0
5132 00:56:21.439449 rx_firspass[1][1][9] = 0
5133 00:56:21.442904 rx_lastpass[1][1][9] = 0
5134 00:56:21.442980 rx_firspass[1][1][10] = 0
5135 00:56:21.446073 rx_lastpass[1][1][10] = 0
5136 00:56:21.449641 rx_firspass[1][1][11] = 0
5137 00:56:21.449716 rx_lastpass[1][1][11] = 0
5138 00:56:21.452868 rx_firspass[1][1][12] = 0
5139 00:56:21.456307 rx_lastpass[1][1][12] = 0
5140 00:56:21.459418 rx_firspass[1][1][13] = 0
5141 00:56:21.459494 rx_lastpass[1][1][13] = 0
5142 00:56:21.462698 rx_firspass[1][1][14] = 0
5143 00:56:21.466103 rx_lastpass[1][1][14] = 0
5144 00:56:21.466178 rx_firspass[1][1][15] = 0
5145 00:56:21.469410 rx_lastpass[1][1][15] = 0
5146 00:56:21.472908 dump params clk_delay
5147 00:56:21.472984 clk_delay[0] = 0
5148 00:56:21.476137 clk_delay[1] = 0
5149 00:56:21.476212 dump params dqs_delay
5150 00:56:21.479429 dqs_delay[0][0] = 0
5151 00:56:21.479504 dqs_delay[0][1] = 0
5152 00:56:21.482782 dqs_delay[1][0] = 0
5153 00:56:21.482858 dqs_delay[1][1] = 0
5154 00:56:21.486174 dump params delay_cell_unit = 833
5155 00:56:21.489482 mt_set_emi_preloader end
5156 00:56:21.492968 [mt_mem_init] dram size: 0x100000000, rank number: 2
5157 00:56:21.499591 [complex_mem_test] start addr:0x40000000, len:20480
5158 00:56:21.535854 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5159 00:56:21.541849 [complex_mem_test] start addr:0x80000000, len:20480
5160 00:56:21.577699 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5161 00:56:21.584662 [complex_mem_test] start addr:0xc0000000, len:20480
5162 00:56:21.620235 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5163 00:56:21.627211 [complex_mem_test] start addr:0x56000000, len:8192
5164 00:56:21.643481 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5165 00:56:21.643559 ddr_geometry:1
5166 00:56:21.650215 [complex_mem_test] start addr:0x80000000, len:8192
5167 00:56:21.667228 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5168 00:56:21.670589 dram_init: dram init end (result: 0)
5169 00:56:21.677315 Successfully loaded DRAM blobs and ran DRAM calibration
5170 00:56:21.686849 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5171 00:56:21.686927 CBMEM:
5172 00:56:21.690430 IMD: root @ 00000000fffff000 254 entries.
5173 00:56:21.694202 IMD: root @ 00000000ffffec00 62 entries.
5174 00:56:21.700509 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5175 00:56:21.707175 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5176 00:56:21.710525 in-header: 03 a1 00 00 08 00 00 00
5177 00:56:21.713794 in-data: 84 60 60 10 00 00 00 00
5178 00:56:21.717451 Chrome EC: clear events_b mask to 0x0000000020004000
5179 00:56:21.724274 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5180 00:56:21.727782 in-header: 03 fd 00 00 00 00 00 00
5181 00:56:21.727859 in-data:
5182 00:56:21.734014 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5183 00:56:21.734091 CBFS @ 21000 size 3d4000
5184 00:56:21.741020 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5185 00:56:21.744370 CBFS: Locating 'fallback/ramstage'
5186 00:56:21.747339 CBFS: Found @ offset 10d40 size d563
5187 00:56:21.769031 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5188 00:56:21.781195 Accumulated console time in romstage 13636 ms
5189 00:56:21.781278
5190 00:56:21.781338
5191 00:56:21.791331 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5192 00:56:21.794577 ARM64: Exception handlers installed.
5193 00:56:21.794654 ARM64: Testing exception
5194 00:56:21.798206 ARM64: Done test exception
5195 00:56:21.801417 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5196 00:56:21.804722 Manufacturer: ef
5197 00:56:21.808355 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5198 00:56:21.814760 WARNING: RO_VPD is uninitialized or empty.
5199 00:56:21.818246 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5200 00:56:21.821427 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5201 00:56:21.831005 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5202 00:56:21.834322 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5203 00:56:21.841056 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5204 00:56:21.841132 Enumerating buses...
5205 00:56:21.847326 Show all devs... Before device enumeration.
5206 00:56:21.847401 Root Device: enabled 1
5207 00:56:21.850920 CPU_CLUSTER: 0: enabled 1
5208 00:56:21.850995 CPU: 00: enabled 1
5209 00:56:21.854435 Compare with tree...
5210 00:56:21.857928 Root Device: enabled 1
5211 00:56:21.858028 CPU_CLUSTER: 0: enabled 1
5212 00:56:21.860936 CPU: 00: enabled 1
5213 00:56:21.864178 Root Device scanning...
5214 00:56:21.864269 root_dev_scan_bus for Root Device
5215 00:56:21.867607 CPU_CLUSTER: 0 enabled
5216 00:56:21.870942 root_dev_scan_bus for Root Device done
5217 00:56:21.877619 scan_bus: scanning of bus Root Device took 10690 usecs
5218 00:56:21.877695 done
5219 00:56:21.880845 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5220 00:56:21.884133 Allocating resources...
5221 00:56:21.884208 Reading resources...
5222 00:56:21.887309 Root Device read_resources bus 0 link: 0
5223 00:56:21.894117 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5224 00:56:21.894193 CPU: 00 missing read_resources
5225 00:56:21.900578 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5226 00:56:21.903951 Root Device read_resources bus 0 link: 0 done
5227 00:56:21.907343 Done reading resources.
5228 00:56:21.910695 Show resources in subtree (Root Device)...After reading.
5229 00:56:21.914078 Root Device child on link 0 CPU_CLUSTER: 0
5230 00:56:21.917503 CPU_CLUSTER: 0 child on link 0 CPU: 00
5231 00:56:21.927085 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5232 00:56:21.927185 CPU: 00
5233 00:56:21.930608 Setting resources...
5234 00:56:21.933897 Root Device assign_resources, bus 0 link: 0
5235 00:56:21.937319 CPU_CLUSTER: 0 missing set_resources
5236 00:56:21.940459 Root Device assign_resources, bus 0 link: 0
5237 00:56:21.943864 Done setting resources.
5238 00:56:21.950156 Show resources in subtree (Root Device)...After assigning values.
5239 00:56:21.953430 Root Device child on link 0 CPU_CLUSTER: 0
5240 00:56:21.956667 CPU_CLUSTER: 0 child on link 0 CPU: 00
5241 00:56:21.966640 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5242 00:56:21.966727 CPU: 00
5243 00:56:21.969894 Done allocating resources.
5244 00:56:21.973285 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5245 00:56:21.976860 Enabling resources...
5246 00:56:21.976935 done.
5247 00:56:21.979754 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5248 00:56:21.983367 Initializing devices...
5249 00:56:21.986995 Root Device init ...
5250 00:56:21.990203 mainboard_init: Starting display init.
5251 00:56:21.990280 ADC[4]: Raw value=75944 ID=0
5252 00:56:22.013907 anx7625_power_on_init: Init interface.
5253 00:56:22.017406 anx7625_disable_pd_protocol: Disabled PD feature.
5254 00:56:22.024049 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5255 00:56:22.081142 anx7625_start_dp_work: Secure OCM version=00
5256 00:56:22.083935 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5257 00:56:22.100970 sp_tx_get_edid_block: EDID Block = 1
5258 00:56:22.218534 Extracted contents:
5259 00:56:22.221490 header: 00 ff ff ff ff ff ff 00
5260 00:56:22.225090 serial number: 06 af 5c 14 00 00 00 00 00 1a
5261 00:56:22.228535 version: 01 04
5262 00:56:22.231765 basic params: 95 1a 0e 78 02
5263 00:56:22.235216 chroma info: 99 85 95 55 56 92 28 22 50 54
5264 00:56:22.238152 established: 00 00 00
5265 00:56:22.245303 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5266 00:56:22.248165 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5267 00:56:22.254590 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5268 00:56:22.261275 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5269 00:56:22.268296 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5270 00:56:22.271513 extensions: 00
5271 00:56:22.271577 checksum: ae
5272 00:56:22.271633
5273 00:56:22.275126 Manufacturer: AUO Model 145c Serial Number 0
5274 00:56:22.277772 Made week 0 of 2016
5275 00:56:22.277859 EDID version: 1.4
5276 00:56:22.281302 Digital display
5277 00:56:22.284812 6 bits per primary color channel
5278 00:56:22.284878 DisplayPort interface
5279 00:56:22.288018 Maximum image size: 26 cm x 14 cm
5280 00:56:22.291431 Gamma: 220%
5281 00:56:22.291518 Check DPMS levels
5282 00:56:22.294691 Supported color formats: RGB 4:4:4
5283 00:56:22.297738 First detailed timing is preferred timing
5284 00:56:22.301195 Established timings supported:
5285 00:56:22.304579 Standard timings supported:
5286 00:56:22.304650 Detailed timings
5287 00:56:22.311558 Hex of detail: ce1d56ea50001a3030204600009010000018
5288 00:56:22.314248 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5289 00:56:22.317864 0556 0586 05a6 0640 hborder 0
5290 00:56:22.324526 0300 0304 030a 031a vborder 0
5291 00:56:22.324594 -hsync -vsync
5292 00:56:22.328191 Did detailed timing
5293 00:56:22.331190 Hex of detail: 0000000f0000000000000000000000000020
5294 00:56:22.334924 Manufacturer-specified data, tag 15
5295 00:56:22.340829 Hex of detail: 000000fe0041554f0a202020202020202020
5296 00:56:22.340943 ASCII string: AUO
5297 00:56:22.344490 Hex of detail: 000000fe004231313658414230312e34200a
5298 00:56:22.347772 ASCII string: B116XAB01.4
5299 00:56:22.347865 Checksum
5300 00:56:22.350858 Checksum: 0xae (valid)
5301 00:56:22.357439 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5302 00:56:22.361047 DSI data_rate: 457800000 bps
5303 00:56:22.364378 anx7625_parse_edid: set default k value to 0x3d for panel
5304 00:56:22.367457 anx7625_parse_edid: pixelclock(76300).
5305 00:56:22.374559 hactive(1366), hsync(32), hfp(48), hbp(154)
5306 00:56:22.377743 vactive(768), vsync(6), vfp(4), vbp(16)
5307 00:56:22.380891 anx7625_dsi_config: config dsi.
5308 00:56:22.387290 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5309 00:56:22.407629 anx7625_dsi_config: success to config DSI
5310 00:56:22.410733 anx7625_dp_start: MIPI phy setup OK.
5311 00:56:22.414142 [SSUSB] Setting up USB HOST controller...
5312 00:56:22.417479 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5313 00:56:22.420998 [SSUSB] phy power-on done.
5314 00:56:22.424776 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5315 00:56:22.428425 in-header: 03 fc 01 00 00 00 00 00
5316 00:56:22.428496 in-data:
5317 00:56:22.431274 handle_proto3_response: EC response with error code: 1
5318 00:56:22.434686 SPM: pcm index = 1
5319 00:56:22.438184 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5320 00:56:22.441586 CBFS @ 21000 size 3d4000
5321 00:56:22.447960 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5322 00:56:22.451412 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5323 00:56:22.454682 CBFS: Found @ offset 1e7c0 size 1026
5324 00:56:22.461537 read SPI 0x3f808 0x1026: 1270 us, 3255 KB/s, 26.040 Mbps
5325 00:56:22.464327 SPM: binary array size = 2988
5326 00:56:22.468008 SPM: version = pcm_allinone_v1.17.2_20180829
5327 00:56:22.470822 SPM binary loaded in 32 msecs
5328 00:56:22.478719 spm_kick_im_to_fetch: ptr = 000000004021eec2
5329 00:56:22.482154 spm_kick_im_to_fetch: len = 2988
5330 00:56:22.482221 SPM: spm_kick_pcm_to_run
5331 00:56:22.485775 SPM: spm_kick_pcm_to_run done
5332 00:56:22.489174 SPM: spm_init done in 52 msecs
5333 00:56:22.492116 Root Device init finished in 505262 usecs
5334 00:56:22.495451 CPU_CLUSTER: 0 init ...
5335 00:56:22.505279 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5336 00:56:22.508389 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5337 00:56:22.512106 CBFS @ 21000 size 3d4000
5338 00:56:22.515481 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5339 00:56:22.518398 CBFS: Locating 'sspm.bin'
5340 00:56:22.522147 CBFS: Found @ offset 208c0 size 41cb
5341 00:56:22.531806 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5342 00:56:22.540576 CPU_CLUSTER: 0 init finished in 42799 usecs
5343 00:56:22.540649 Devices initialized
5344 00:56:22.543251 Show all devs... After init.
5345 00:56:22.546555 Root Device: enabled 1
5346 00:56:22.546656 CPU_CLUSTER: 0: enabled 1
5347 00:56:22.550035 CPU: 00: enabled 1
5348 00:56:22.553202 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5349 00:56:22.556534 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5350 00:56:22.559547 ELOG: NV offset 0x558000 size 0x1000
5351 00:56:22.567464 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5352 00:56:22.573978 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5353 00:56:22.577581 ELOG: Event(17) added with size 13 at 2024-06-16 00:56:22 UTC
5354 00:56:22.580961 out: cmd=0x121: 03 db 21 01 00 00 00 00
5355 00:56:22.584306 in-header: 03 5f 00 00 2c 00 00 00
5356 00:56:22.597291 in-data: 22 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 bf 1b 01 00 06 80 00 00 3c 36 02 00 06 80 00 00 d2 15 01 00 06 80 00 00 76 28 06 00
5357 00:56:22.600771 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5358 00:56:22.604432 in-header: 03 19 00 00 08 00 00 00
5359 00:56:22.607376 in-data: a2 e0 47 00 13 00 00 00
5360 00:56:22.610913 Chrome EC: UHEPI supported
5361 00:56:22.617406 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5362 00:56:22.620901 in-header: 03 e1 00 00 08 00 00 00
5363 00:56:22.624540 in-data: 84 20 60 10 00 00 00 00
5364 00:56:22.627549 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5365 00:56:22.634168 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5366 00:56:22.637624 in-header: 03 e1 00 00 08 00 00 00
5367 00:56:22.641062 in-data: 84 20 60 10 00 00 00 00
5368 00:56:22.647912 ELOG: Event(A1) added with size 10 at 2024-06-16 00:56:22 UTC
5369 00:56:22.654356 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5370 00:56:22.657574 ELOG: Event(A0) added with size 9 at 2024-06-16 00:56:22 UTC
5371 00:56:22.664453 elog_add_boot_reason: Logged dev mode boot
5372 00:56:22.664524 Finalize devices...
5373 00:56:22.667165 Devices finalized
5374 00:56:22.670518 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5375 00:56:22.673705 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5376 00:56:22.680472 ELOG: Event(91) added with size 10 at 2024-06-16 00:56:22 UTC
5377 00:56:22.683901 Writing coreboot table at 0xffeda000
5378 00:56:22.687080 0. 0000000000114000-000000000011efff: RAMSTAGE
5379 00:56:22.693778 1. 0000000040000000-000000004023cfff: RAMSTAGE
5380 00:56:22.697013 2. 000000004023d000-00000000545fffff: RAM
5381 00:56:22.700608 3. 0000000054600000-000000005465ffff: BL31
5382 00:56:22.703783 4. 0000000054660000-00000000ffed9fff: RAM
5383 00:56:22.710246 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5384 00:56:22.713738 6. 0000000100000000-000000013fffffff: RAM
5385 00:56:22.717121 Passing 5 GPIOs to payload:
5386 00:56:22.720651 NAME | PORT | POLARITY | VALUE
5387 00:56:22.723915 write protect | 0x00000096 | low | low
5388 00:56:22.730225 EC in RW | 0x000000b1 | high | undefined
5389 00:56:22.733607 EC interrupt | 0x00000097 | low | undefined
5390 00:56:22.740310 TPM interrupt | 0x00000099 | high | undefined
5391 00:56:22.743666 speaker enable | 0x000000af | high | undefined
5392 00:56:22.746881 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5393 00:56:22.750133 in-header: 03 f7 00 00 02 00 00 00
5394 00:56:22.753437 in-data: 04 00
5395 00:56:22.753513 Board ID: 4
5396 00:56:22.756906 ADC[3]: Raw value=216068 ID=1
5397 00:56:22.757005 RAM code: 1
5398 00:56:22.757090 SKU ID: 16
5399 00:56:22.763977 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5400 00:56:22.764054 CBFS @ 21000 size 3d4000
5401 00:56:22.770361 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5402 00:56:22.776830 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum ccd0
5403 00:56:22.779837 coreboot table: 940 bytes.
5404 00:56:22.783219 IMD ROOT 0. 00000000fffff000 00001000
5405 00:56:22.786427 IMD SMALL 1. 00000000ffffe000 00001000
5406 00:56:22.789927 CONSOLE 2. 00000000fffde000 00020000
5407 00:56:22.793188 FMAP 3. 00000000fffdd000 0000047c
5408 00:56:22.796451 TIME STAMP 4. 00000000fffdc000 00000910
5409 00:56:22.800101 RAMOOPS 5. 00000000ffedc000 00100000
5410 00:56:22.803323 COREBOOT 6. 00000000ffeda000 00002000
5411 00:56:22.806490 IMD small region:
5412 00:56:22.810069 IMD ROOT 0. 00000000ffffec00 00000400
5413 00:56:22.813675 VBOOT WORK 1. 00000000ffffeb00 00000100
5414 00:56:22.816435 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5415 00:56:22.819831 VPD 3. 00000000ffffea60 0000006c
5416 00:56:22.826570 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5417 00:56:22.833461 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5418 00:56:22.836794 in-header: 03 e1 00 00 08 00 00 00
5419 00:56:22.839656 in-data: 84 20 60 10 00 00 00 00
5420 00:56:22.842998 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5421 00:56:22.846466 CBFS @ 21000 size 3d4000
5422 00:56:22.849550 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5423 00:56:22.852806 CBFS: Locating 'fallback/payload'
5424 00:56:22.861698 CBFS: Found @ offset dc040 size 439a0
5425 00:56:22.949508 read SPI 0xfd078 0x439a0: 84380 us, 3281 KB/s, 26.248 Mbps
5426 00:56:22.952992 Checking segment from ROM address 0x0000000040003a00
5427 00:56:22.959922 Checking segment from ROM address 0x0000000040003a1c
5428 00:56:22.962647 Loading segment from ROM address 0x0000000040003a00
5429 00:56:22.965957 code (compression=0)
5430 00:56:22.976266 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5431 00:56:22.982671 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5432 00:56:22.985995 it's not compressed!
5433 00:56:22.989675 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5434 00:56:22.995987 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5435 00:56:23.003999 Loading segment from ROM address 0x0000000040003a1c
5436 00:56:23.007263 Entry Point 0x0000000080000000
5437 00:56:23.007339 Loaded segments
5438 00:56:23.013869 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5439 00:56:23.016802 Jumping to boot code at 0000000080000000(00000000ffeda000)
5440 00:56:23.026860 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5441 00:56:23.030667 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5442 00:56:23.033486 CBFS @ 21000 size 3d4000
5443 00:56:23.040510 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5444 00:56:23.043301 CBFS: Locating 'fallback/bl31'
5445 00:56:23.046818 CBFS: Found @ offset 36dc0 size 5820
5446 00:56:23.057735 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5447 00:56:23.061181 Checking segment from ROM address 0x0000000040003a00
5448 00:56:23.067436 Checking segment from ROM address 0x0000000040003a1c
5449 00:56:23.070865 Loading segment from ROM address 0x0000000040003a00
5450 00:56:23.074353 code (compression=1)
5451 00:56:23.080814 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5452 00:56:23.090880 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5453 00:56:23.090958 using LZMA
5454 00:56:23.099284 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5455 00:56:23.106156 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5456 00:56:23.109372 Loading segment from ROM address 0x0000000040003a1c
5457 00:56:23.112616 Entry Point 0x0000000054601000
5458 00:56:23.112691 Loaded segments
5459 00:56:23.115995 NOTICE: MT8183 bl31_setup
5460 00:56:23.123577 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5461 00:56:23.127029 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5462 00:56:23.130037 INFO: [DEVAPC] dump DEVAPC registers:
5463 00:56:23.140140 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5464 00:56:23.146682 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5465 00:56:23.156832 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5466 00:56:23.163059 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5467 00:56:23.173277 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5468 00:56:23.179907 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5469 00:56:23.189449 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5470 00:56:23.195946 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5471 00:56:23.206183 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5472 00:56:23.212589 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5473 00:56:23.219437 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5474 00:56:23.229618 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5475 00:56:23.236313 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5476 00:56:23.246380 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5477 00:56:23.253386 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5478 00:56:23.259511 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5479 00:56:23.266517 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5480 00:56:23.272970 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5481 00:56:23.282509 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5482 00:56:23.289521 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5483 00:56:23.296083 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5484 00:56:23.302896 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5485 00:56:23.305988 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5486 00:56:23.309435 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5487 00:56:23.312488 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5488 00:56:23.316428 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5489 00:56:23.319532 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5490 00:56:23.326297 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5491 00:56:23.329373 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5492 00:56:23.332810 WARNING: region 0:
5493 00:56:23.336407 WARNING: apc:0x168, sa:0x0, ea:0xfff
5494 00:56:23.339180 WARNING: region 1:
5495 00:56:23.342458 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5496 00:56:23.342533 WARNING: region 2:
5497 00:56:23.345887 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5498 00:56:23.349555 WARNING: region 3:
5499 00:56:23.352340 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5500 00:56:23.352417 WARNING: region 4:
5501 00:56:23.359642 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5502 00:56:23.359719 WARNING: region 5:
5503 00:56:23.362917 WARNING: apc:0x0, sa:0x0, ea:0x0
5504 00:56:23.365915 WARNING: region 6:
5505 00:56:23.366049 WARNING: apc:0x0, sa:0x0, ea:0x0
5506 00:56:23.369047 WARNING: region 7:
5507 00:56:23.372569 WARNING: apc:0x0, sa:0x0, ea:0x0
5508 00:56:23.379243 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5509 00:56:23.382104 INFO: SPM: enable SPMC mode
5510 00:56:23.386097 NOTICE: spm_boot_init() start
5511 00:56:23.388985 NOTICE: spm_boot_init() end
5512 00:56:23.392443 INFO: BL31: Initializing runtime services
5513 00:56:23.399156 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5514 00:56:23.402101 INFO: BL31: Preparing for EL3 exit to normal world
5515 00:56:23.405803 INFO: Entry point address = 0x80000000
5516 00:56:23.408968 INFO: SPSR = 0x8
5517 00:56:23.429849
5518 00:56:23.429948
5519 00:56:23.430057
5520 00:56:23.430552 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5521 00:56:23.430652 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5522 00:56:23.430725 Setting prompt string to ['jacuzzi:']
5523 00:56:23.430796 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5524 00:56:23.433414 Starting depthcharge on Juniper...
5525 00:56:23.433490
5526 00:56:23.436345 vboot_handoff: creating legacy vboot_handoff structure
5527 00:56:23.436421
5528 00:56:23.439725 ec_init(0): CrosEC protocol v3 supported (544, 544)
5529 00:56:23.439824
5530 00:56:23.443055 Wipe memory regions:
5531 00:56:23.443131
5532 00:56:23.446629 [0x00000040000000, 0x00000054600000)
5533 00:56:23.488957
5534 00:56:23.489050 [0x00000054660000, 0x00000080000000)
5535 00:56:23.581297
5536 00:56:23.581395 [0x000000811994a0, 0x000000ffeda000)
5537 00:56:23.841540
5538 00:56:23.841648 [0x00000100000000, 0x00000140000000)
5539 00:56:23.974007
5540 00:56:23.976993 Initializing XHCI USB controller at 0x11200000.
5541 00:56:24.000104
5542 00:56:24.003733 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5543 00:56:24.003809
5544 00:56:24.003868
5545 00:56:24.004138 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5547 00:56:24.104479 jacuzzi: tftpboot 192.168.201.1 14368567/tftp-deploy-xywynvkf/kernel/image.itb 14368567/tftp-deploy-xywynvkf/kernel/cmdline
5548 00:56:24.104645 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5549 00:56:24.104721 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5550 00:56:24.109140 tftpboot 192.168.201.1 14368567/tftp-deploy-xywynvkf/kernel/image.ittp-deploy-xywynvkf/kernel/cmdline
5551 00:56:24.109236
5552 00:56:24.109298 Waiting for link
5553 00:56:24.514104
5554 00:56:24.514218 R8152: Initializing
5555 00:56:24.514279
5556 00:56:24.517500 Version 9 (ocp_data = 6010)
5557 00:56:24.517575
5558 00:56:24.520974 R8152: Done initializing
5559 00:56:24.521051
5560 00:56:24.521110 Adding net device
5561 00:56:24.906399
5562 00:56:24.906513 done.
5563 00:56:24.906574
5564 00:56:24.906629 MAC: 00:e0:4c:72:3d:67
5565 00:56:24.906682
5566 00:56:24.909522 Sending DHCP discover... done.
5567 00:56:24.909599
5568 00:56:24.913335 Waiting for reply... done.
5569 00:56:24.913412
5570 00:56:24.916620 Sending DHCP request... done.
5571 00:56:24.916697
5572 00:56:24.920371 Waiting for reply... done.
5573 00:56:24.920454
5574 00:56:24.920514 My ip is 192.168.201.13
5575 00:56:24.920568
5576 00:56:24.923687 The DHCP server ip is 192.168.201.1
5577 00:56:24.923764
5578 00:56:24.930744 TFTP server IP predefined by user: 192.168.201.1
5579 00:56:24.930882
5580 00:56:24.937470 Bootfile predefined by user: 14368567/tftp-deploy-xywynvkf/kernel/image.itb
5581 00:56:24.937547
5582 00:56:24.937606 Sending tftp read request... done.
5583 00:56:24.940429
5584 00:56:24.943862 Waiting for the transfer...
5585 00:56:24.943938
5586 00:56:25.207262 00000000 ################################################################
5587 00:56:25.207369
5588 00:56:25.466886 00080000 ################################################################
5589 00:56:25.466998
5590 00:56:25.724370 00100000 ################################################################
5591 00:56:25.724510
5592 00:56:25.974384 00180000 ################################################################
5593 00:56:25.974523
5594 00:56:26.223615 00200000 ################################################################
5595 00:56:26.223724
5596 00:56:26.474593 00280000 ################################################################
5597 00:56:26.474724
5598 00:56:26.724830 00300000 ################################################################
5599 00:56:26.724942
5600 00:56:26.974213 00380000 ################################################################
5601 00:56:26.974346
5602 00:56:27.224918 00400000 ################################################################
5603 00:56:27.225032
5604 00:56:27.476742 00480000 ################################################################
5605 00:56:27.476883
5606 00:56:27.728658 00500000 ################################################################
5607 00:56:27.728772
5608 00:56:27.980363 00580000 ################################################################
5609 00:56:27.980498
5610 00:56:28.230691 00600000 ################################################################
5611 00:56:28.230799
5612 00:56:28.480511 00680000 ################################################################
5613 00:56:28.480652
5614 00:56:28.732653 00700000 ################################################################
5615 00:56:28.732762
5616 00:56:29.001426 00780000 ################################################################
5617 00:56:29.001541
5618 00:56:29.300520 00800000 ################################################################
5619 00:56:29.300632
5620 00:56:29.600982 00880000 ################################################################
5621 00:56:29.601115
5622 00:56:29.860858 00900000 ################################################################
5623 00:56:29.860967
5624 00:56:30.114164 00980000 ################################################################
5625 00:56:30.114272
5626 00:56:30.386655 00a00000 ################################################################
5627 00:56:30.386769
5628 00:56:30.667321 00a80000 ################################################################
5629 00:56:30.667435
5630 00:56:30.933955 00b00000 ################################################################
5631 00:56:30.934087
5632 00:56:31.190532 00b80000 ################################################################
5633 00:56:31.190642
5634 00:56:31.447409 00c00000 ################################################################
5635 00:56:31.447543
5636 00:56:31.710883 00c80000 ################################################################
5637 00:56:31.710999
5638 00:56:31.964128 00d00000 ################################################################
5639 00:56:31.964269
5640 00:56:32.222013 00d80000 ################################################################
5641 00:56:32.222129
5642 00:56:32.479275 00e00000 ################################################################
5643 00:56:32.479408
5644 00:56:32.735492 00e80000 ################################################################
5645 00:56:32.735621
5646 00:56:32.990721 00f00000 ################################################################
5647 00:56:32.990834
5648 00:56:33.245657 00f80000 ################################################################
5649 00:56:33.245795
5650 00:56:33.503406 01000000 ################################################################
5651 00:56:33.503557
5652 00:56:33.762776 01080000 ################################################################
5653 00:56:33.762892
5654 00:56:34.035088 01100000 ################################################################
5655 00:56:34.035199
5656 00:56:34.290543 01180000 ################################################################
5657 00:56:34.290674
5658 00:56:34.546948 01200000 ################################################################
5659 00:56:34.547061
5660 00:56:34.804768 01280000 ################################################################
5661 00:56:34.804907
5662 00:56:35.069110 01300000 ################################################################
5663 00:56:35.069278
5664 00:56:35.338844 01380000 ################################################################
5665 00:56:35.338960
5666 00:56:35.597073 01400000 ################################################################
5667 00:56:35.597208
5668 00:56:35.863803 01480000 ################################################################
5669 00:56:35.863925
5670 00:56:36.135358 01500000 ################################################################
5671 00:56:36.135504
5672 00:56:36.396157 01580000 ################################################################
5673 00:56:36.396270
5674 00:56:36.657779 01600000 ################################################################
5675 00:56:36.657913
5676 00:56:36.920380 01680000 ################################################################
5677 00:56:36.920515
5678 00:56:37.182651 01700000 ################################################################
5679 00:56:37.182764
5680 00:56:37.439062 01780000 ################################################################
5681 00:56:37.439180
5682 00:56:37.705693 01800000 ################################################################
5683 00:56:37.705827
5684 00:56:37.960291 01880000 ################################################################
5685 00:56:37.960426
5686 00:56:38.220319 01900000 ################################################################
5687 00:56:38.220449
5688 00:56:38.484736 01980000 ################################################################
5689 00:56:38.484870
5690 00:56:38.766874 01a00000 ################################################################
5691 00:56:38.766983
5692 00:56:39.083574 01a80000 ################################################################
5693 00:56:39.084079
5694 00:56:39.450610 01b00000 ################################################################
5695 00:56:39.451047
5696 00:56:39.840491 01b80000 ################################################################
5697 00:56:39.840938
5698 00:56:40.251004 01c00000 ################################################################
5699 00:56:40.251475
5700 00:56:40.589152 01c80000 ################################################################
5701 00:56:40.589624
5702 00:56:40.927948 01d00000 ################################################################
5703 00:56:40.928055
5704 00:56:41.210870 01d80000 ################################################################
5705 00:56:41.210980
5706 00:56:41.492843 01e00000 ################################################################
5707 00:56:41.492966
5708 00:56:41.777623 01e80000 ################################################################
5709 00:56:41.777745
5710 00:56:42.076170 01f00000 ################################################################
5711 00:56:42.076292
5712 00:56:42.384089 01f80000 ################################################################
5713 00:56:42.384335
5714 00:56:42.682679 02000000 ################################################################
5715 00:56:42.682800
5716 00:56:42.942529 02080000 ################################################################
5717 00:56:42.942652
5718 00:56:43.239405 02100000 ################################################################
5719 00:56:43.239518
5720 00:56:43.525271 02180000 ################################################################
5721 00:56:43.525400
5722 00:56:43.806416 02200000 ################################################################
5723 00:56:43.806540
5724 00:56:44.083817 02280000 ################################################################
5725 00:56:44.083944
5726 00:56:44.341337 02300000 ################################################################
5727 00:56:44.341493
5728 00:56:44.611584 02380000 ################################################################
5729 00:56:44.611730
5730 00:56:44.870192 02400000 ################################################################
5731 00:56:44.870316
5732 00:56:45.129340 02480000 ################################################################
5733 00:56:45.129486
5734 00:56:45.385535 02500000 ################################################################
5735 00:56:45.385664
5736 00:56:45.646925 02580000 ################################################################
5737 00:56:45.647048
5738 00:56:45.898698 02600000 ################################################################
5739 00:56:45.898818
5740 00:56:46.152987 02680000 ################################################################
5741 00:56:46.153168
5742 00:56:46.413762 02700000 ################################################################
5743 00:56:46.413878
5744 00:56:46.668828 02780000 ################################################################
5745 00:56:46.668940
5746 00:56:46.928932 02800000 ################################################################
5747 00:56:46.929056
5748 00:56:47.189230 02880000 ################################################################
5749 00:56:47.189343
5750 00:56:47.445904 02900000 ################################################################
5751 00:56:47.446067
5752 00:56:47.704108 02980000 ################################################################
5753 00:56:47.704223
5754 00:56:47.958212 02a00000 ################################################################
5755 00:56:47.958323
5756 00:56:48.215172 02a80000 ################################################################
5757 00:56:48.215296
5758 00:56:48.479983 02b00000 ################################################################
5759 00:56:48.480113
5760 00:56:48.736260 02b80000 ################################################################
5761 00:56:48.736393
5762 00:56:48.991542 02c00000 ################################################################
5763 00:56:48.991671
5764 00:56:49.252189 02c80000 ################################################################
5765 00:56:49.252346
5766 00:56:49.512225 02d00000 ################################################################
5767 00:56:49.512376
5768 00:56:49.779776 02d80000 ################################################################
5769 00:56:49.779888
5770 00:56:50.039470 02e00000 ################################################################
5771 00:56:50.039615
5772 00:56:50.299652 02e80000 ################################################################
5773 00:56:50.299779
5774 00:56:50.556211 02f00000 ################################################################
5775 00:56:50.556345
5776 00:56:50.816350 02f80000 ################################################################
5777 00:56:50.816485
5778 00:56:51.069843 03000000 ################################################################
5779 00:56:51.069954
5780 00:56:51.327810 03080000 ################################################################
5781 00:56:51.327967
5782 00:56:51.583047 03100000 ################################################################
5783 00:56:51.583190
5784 00:56:51.834671 03180000 ################################################################
5785 00:56:51.834782
5786 00:56:52.106090 03200000 ################################################################
5787 00:56:52.106212
5788 00:56:52.362285 03280000 ################################################################
5789 00:56:52.362416
5790 00:56:52.621493 03300000 ################################################################
5791 00:56:52.621634
5792 00:56:52.898963 03380000 ################################################################
5793 00:56:52.899097
5794 00:56:53.157201 03400000 ################################################################
5795 00:56:53.157340
5796 00:56:53.412166 03480000 ################################################################
5797 00:56:53.412300
5798 00:56:53.665967 03500000 ################################################################
5799 00:56:53.666122
5800 00:56:53.930088 03580000 ################################################################
5801 00:56:53.930203
5802 00:56:54.186409 03600000 ################################################################
5803 00:56:54.186520
5804 00:56:54.443359 03680000 ################################################################
5805 00:56:54.443488
5806 00:56:54.697888 03700000 ################################################################
5807 00:56:54.698040
5808 00:56:54.950808 03780000 ################################################################
5809 00:56:54.950924
5810 00:56:55.203925 03800000 ################################################################
5811 00:56:55.204037
5812 00:56:55.465869 03880000 ################################################################
5813 00:56:55.466044
5814 00:56:55.738220 03900000 ################################################################
5815 00:56:55.738341
5816 00:56:56.004113 03980000 ################################################################
5817 00:56:56.004240
5818 00:56:56.269865 03a00000 ################################################################
5819 00:56:56.270051
5820 00:56:56.548087 03a80000 ################################################################
5821 00:56:56.548202
5822 00:56:56.826386 03b00000 ################################################################
5823 00:56:56.826525
5824 00:56:57.095569 03b80000 ################################################################
5825 00:56:57.095699
5826 00:56:57.359601 03c00000 ################################################################
5827 00:56:57.359734
5828 00:56:57.631914 03c80000 ################################################################
5829 00:56:57.632059
5830 00:56:57.886434 03d00000 ################################################################
5831 00:56:57.886544
5832 00:56:58.162261 03d80000 ################################################################
5833 00:56:58.162384
5834 00:56:58.428061 03e00000 ################################################################
5835 00:56:58.428184
5836 00:56:58.690119 03e80000 ################################################################
5837 00:56:58.690240
5838 00:56:58.945866 03f00000 ################################################################
5839 00:56:58.946007
5840 00:56:59.226600 03f80000 ################################################################
5841 00:56:59.226721
5842 00:56:59.519230 04000000 ################################################################
5843 00:56:59.519351
5844 00:56:59.807160 04080000 ################################################################
5845 00:56:59.807281
5846 00:57:00.086517 04100000 ################################################################
5847 00:57:00.086638
5848 00:57:00.345534 04180000 ################################################################
5849 00:57:00.345655
5850 00:57:00.605143 04200000 ################################################################
5851 00:57:00.605265
5852 00:57:00.869301 04280000 ################################################################
5853 00:57:00.869418
5854 00:57:01.138794 04300000 ################################################################
5855 00:57:01.138920
5856 00:57:01.392428 04380000 ################################################################
5857 00:57:01.392544
5858 00:57:01.657261 04400000 ################################################################
5859 00:57:01.657381
5860 00:57:01.914954 04480000 ################################################################
5861 00:57:01.915133
5862 00:57:02.187162 04500000 ################################################################
5863 00:57:02.187282
5864 00:57:02.451814 04580000 ################################################################
5865 00:57:02.451926
5866 00:57:02.708209 04600000 ################################################################
5867 00:57:02.708329
5868 00:57:02.845247 04680000 ################################## done.
5869 00:57:02.845356
5870 00:57:02.848268 The bootfile was 74200366 bytes long.
5871 00:57:02.848345
5872 00:57:02.852213 Sending tftp read request... done.
5873 00:57:02.852291
5874 00:57:02.855044 Waiting for the transfer...
5875 00:57:02.855121
5876 00:57:02.858522 00000000 # done.
5877 00:57:02.858600
5878 00:57:02.865037 Command line loaded dynamically from TFTP file: 14368567/tftp-deploy-xywynvkf/kernel/cmdline
5879 00:57:02.865114
5880 00:57:02.881949 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5881 00:57:02.882122
5882 00:57:02.882209 Loading FIT.
5883 00:57:02.882280
5884 00:57:02.885108 Image ramdisk-1 has 61015581 bytes.
5885 00:57:02.885212
5886 00:57:02.888951 Image fdt-1 has 57695 bytes.
5887 00:57:02.889065
5888 00:57:02.891726 Image kernel-1 has 13125045 bytes.
5889 00:57:02.891844
5890 00:57:02.901907 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5891 00:57:02.902067
5892 00:57:02.911789 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5893 00:57:02.911981
5894 00:57:02.918825 Choosing best match conf-1 for compat google,juniper-sku16.
5895 00:57:02.922661
5896 00:57:02.927792 Connected to device vid:did:rid of 1ae0:0028:00
5897 00:57:02.935492
5898 00:57:02.939330 tpm_get_response: command 0x17b, return code 0x0
5899 00:57:02.939721
5900 00:57:02.942383 tpm_cleanup: add release locality here.
5901 00:57:02.942775
5902 00:57:02.945850 Shutting down all USB controllers.
5903 00:57:02.946258
5904 00:57:02.948902 Removing current net device
5905 00:57:02.949290
5906 00:57:02.952517 Exiting depthcharge with code 4 at timestamp: 56742664
5907 00:57:02.952907
5908 00:57:02.956146 LZMA decompressing kernel-1 to 0x80193568
5909 00:57:02.956542
5910 00:57:02.962253 LZMA decompressing kernel-1 to 0x40000000
5911 00:57:04.827095
5912 00:57:04.827567 jumping to kernel
5913 00:57:04.829745 end: 2.2.4 bootloader-commands (duration 00:00:41) [common]
5914 00:57:04.830273 start: 2.2.5 auto-login-action (timeout 00:03:46) [common]
5915 00:57:04.830679 Setting prompt string to ['Linux version [0-9]']
5916 00:57:04.831036 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5917 00:57:04.831402 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5918 00:57:04.902100
5919 00:57:04.905519 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5920 00:57:04.908988 start: 2.2.5.1 login-action (timeout 00:03:46) [common]
5921 00:57:04.909482 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5922 00:57:04.909894 Setting prompt string to []
5923 00:57:04.910430 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5924 00:57:04.910782 Using line separator: #'\n'#
5925 00:57:04.911154 No login prompt set.
5926 00:57:04.911457 Parsing kernel messages
5927 00:57:04.911809 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5928 00:57:04.912340 [login-action] Waiting for messages, (timeout 00:03:46)
5929 00:57:04.912682 Waiting using forced prompt support (timeout 00:01:53)
5930 00:57:04.928681 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j232339-arm64-gcc-10-defconfig-arm64-chromebook-6v4sp) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Sun Jun 16 00:43:03 UTC 2024
5931 00:57:04.932234 [ 0.000000] random: crng init done
5932 00:57:04.938395 [ 0.000000] Machine model: Google juniper sku16 board
5933 00:57:04.942383 [ 0.000000] efi: UEFI not found.
5934 00:57:04.949143 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5935 00:57:04.955806 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5936 00:57:04.965250 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5937 00:57:04.968996 [ 0.000000] printk: bootconsole [mtk8250] enabled
5938 00:57:04.977144 [ 0.000000] NUMA: No NUMA configuration found
5939 00:57:04.983997 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5940 00:57:04.990505 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5941 00:57:04.990926 [ 0.000000] Zone ranges:
5942 00:57:04.997058 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5943 00:57:04.999911 [ 0.000000] DMA32 empty
5944 00:57:05.006841 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5945 00:57:05.010229 [ 0.000000] Movable zone start for each node
5946 00:57:05.013628 [ 0.000000] Early memory node ranges
5947 00:57:05.019780 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5948 00:57:05.026986 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5949 00:57:05.033275 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5950 00:57:05.039920 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5951 00:57:05.046294 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5952 00:57:05.053071 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5953 00:57:05.069674 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5954 00:57:05.076150 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5955 00:57:05.082628 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5956 00:57:05.085965 [ 0.000000] psci: probing for conduit method from DT.
5957 00:57:05.092375 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5958 00:57:05.096081 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5959 00:57:05.102866 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5960 00:57:05.105883 [ 0.000000] psci: SMC Calling Convention v1.1
5961 00:57:05.112087 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5962 00:57:05.115703 [ 0.000000] Detected VIPT I-cache on CPU0
5963 00:57:05.122794 [ 0.000000] CPU features: detected: GIC system register CPU interface
5964 00:57:05.129029 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5965 00:57:05.135320 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5966 00:57:05.142300 [ 0.000000] CPU features: detected: ARM erratum 845719
5967 00:57:05.145563 [ 0.000000] alternatives: applying boot alternatives
5968 00:57:05.148568 [ 0.000000] Fallback order for Node 0: 0
5969 00:57:05.155656 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5970 00:57:05.158751 [ 0.000000] Policy zone: Normal
5971 00:57:05.178621 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5972 00:57:05.191729 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5973 00:57:05.198493 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5974 00:57:05.208132 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5975 00:57:05.214796 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5976 00:57:05.218386 <6>[ 0.000000] software IO TLB: area num 8.
5977 00:57:05.244391 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5978 00:57:05.302162 <6>[ 0.000000] Memory: 3855492K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 302972K reserved, 32768K cma-reserved)
5979 00:57:05.308662 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5980 00:57:05.315518 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5981 00:57:05.318627 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5982 00:57:05.325159 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5983 00:57:05.332212 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5984 00:57:05.335034 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5985 00:57:05.344919 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5986 00:57:05.351906 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5987 00:57:05.358306 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5988 00:57:05.368514 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5989 00:57:05.371451 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5990 00:57:05.375003 <6>[ 0.000000] GICv3: 640 SPIs implemented
5991 00:57:05.381550 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5992 00:57:05.384685 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5993 00:57:05.391897 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5994 00:57:05.397849 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5995 00:57:05.408013 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5996 00:57:05.421135 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5997 00:57:05.427947 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5998 00:57:05.438966 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5999 00:57:05.452484 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
6000 00:57:05.459009 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
6001 00:57:05.465962 <6>[ 0.009479] Console: colour dummy device 80x25
6002 00:57:05.469010 <6>[ 0.014517] printk: console [tty1] enabled
6003 00:57:05.482493 <6>[ 0.018904] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
6004 00:57:05.485406 <6>[ 0.029368] pid_max: default: 32768 minimum: 301
6005 00:57:05.489182 <6>[ 0.034250] LSM: Security Framework initializing
6006 00:57:05.499175 <6>[ 0.039163] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
6007 00:57:05.505551 <6>[ 0.046787] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
6008 00:57:05.512088 <4>[ 0.055652] cacheinfo: Unable to detect cache hierarchy for CPU 0
6009 00:57:05.522061 <6>[ 0.062279] cblist_init_generic: Setting adjustable number of callback queues.
6010 00:57:05.528610 <6>[ 0.069724] cblist_init_generic: Setting shift to 3 and lim to 1.
6011 00:57:05.535465 <6>[ 0.076078] cblist_init_generic: Setting adjustable number of callback queues.
6012 00:57:05.541928 <6>[ 0.083523] cblist_init_generic: Setting shift to 3 and lim to 1.
6013 00:57:05.545206 <6>[ 0.089922] rcu: Hierarchical SRCU implementation.
6014 00:57:05.551974 <6>[ 0.094948] rcu: Max phase no-delay instances is 1000.
6015 00:57:05.559548 <6>[ 0.102891] EFI services will not be available.
6016 00:57:05.562480 <6>[ 0.107838] smp: Bringing up secondary CPUs ...
6017 00:57:05.572878 <6>[ 0.113065] Detected VIPT I-cache on CPU1
6018 00:57:05.579376 <4>[ 0.113111] cacheinfo: Unable to detect cache hierarchy for CPU 1
6019 00:57:05.586091 <6>[ 0.113120] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
6020 00:57:05.593062 <6>[ 0.113153] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
6021 00:57:05.596000 <6>[ 0.113635] Detected VIPT I-cache on CPU2
6022 00:57:05.602721 <4>[ 0.113667] cacheinfo: Unable to detect cache hierarchy for CPU 2
6023 00:57:05.609442 <6>[ 0.113672] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
6024 00:57:05.616177 <6>[ 0.113684] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
6025 00:57:05.619366 <6>[ 0.114129] Detected VIPT I-cache on CPU3
6026 00:57:05.625672 <4>[ 0.114158] cacheinfo: Unable to detect cache hierarchy for CPU 3
6027 00:57:05.635813 <6>[ 0.114163] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
6028 00:57:05.642608 <6>[ 0.114174] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
6029 00:57:05.645838 <6>[ 0.114751] CPU features: detected: Spectre-v2
6030 00:57:05.649278 <6>[ 0.114761] CPU features: detected: Spectre-BHB
6031 00:57:05.655795 <6>[ 0.114765] CPU features: detected: ARM erratum 858921
6032 00:57:05.659270 <6>[ 0.114770] Detected VIPT I-cache on CPU4
6033 00:57:05.665621 <4>[ 0.114818] cacheinfo: Unable to detect cache hierarchy for CPU 4
6034 00:57:05.672549 <6>[ 0.114825] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
6035 00:57:05.679236 <6>[ 0.114833] arch_timer: Enabling local workaround for ARM erratum 858921
6036 00:57:05.685598 <6>[ 0.114844] arch_timer: CPU4: Trapping CNTVCT access
6037 00:57:05.692391 <6>[ 0.114851] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
6038 00:57:05.695976 <6>[ 0.115337] Detected VIPT I-cache on CPU5
6039 00:57:05.702089 <4>[ 0.115377] cacheinfo: Unable to detect cache hierarchy for CPU 5
6040 00:57:05.708532 <6>[ 0.115383] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
6041 00:57:05.718702 <6>[ 0.115390] arch_timer: Enabling local workaround for ARM erratum 858921
6042 00:57:05.721927 <6>[ 0.115396] arch_timer: CPU5: Trapping CNTVCT access
6043 00:57:05.728396 <6>[ 0.115401] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
6044 00:57:05.731875 <6>[ 0.115837] Detected VIPT I-cache on CPU6
6045 00:57:05.738571 <4>[ 0.115883] cacheinfo: Unable to detect cache hierarchy for CPU 6
6046 00:57:05.748647 <6>[ 0.115889] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6047 00:57:05.755148 <6>[ 0.115896] arch_timer: Enabling local workaround for ARM erratum 858921
6048 00:57:05.758535 <6>[ 0.115902] arch_timer: CPU6: Trapping CNTVCT access
6049 00:57:05.765153 <6>[ 0.115907] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6050 00:57:05.771530 <6>[ 0.116437] Detected VIPT I-cache on CPU7
6051 00:57:05.775347 <4>[ 0.116481] cacheinfo: Unable to detect cache hierarchy for CPU 7
6052 00:57:05.784752 <6>[ 0.116487] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6053 00:57:05.791419 <6>[ 0.116494] arch_timer: Enabling local workaround for ARM erratum 858921
6054 00:57:05.794740 <6>[ 0.116500] arch_timer: CPU7: Trapping CNTVCT access
6055 00:57:05.801765 <6>[ 0.116505] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6056 00:57:05.808360 <6>[ 0.116553] smp: Brought up 1 node, 8 CPUs
6057 00:57:05.811527 <6>[ 0.355454] SMP: Total of 8 processors activated.
6058 00:57:05.818204 <6>[ 0.360388] CPU features: detected: 32-bit EL0 Support
6059 00:57:05.822034 <6>[ 0.365766] CPU features: detected: 32-bit EL1 Support
6060 00:57:05.828278 <6>[ 0.371134] CPU features: detected: CRC32 instructions
6061 00:57:05.831233 <6>[ 0.376559] CPU: All CPU(s) started at EL2
6062 00:57:05.838052 <6>[ 0.380901] alternatives: applying system-wide alternatives
6063 00:57:05.845163 <6>[ 0.388892] devtmpfs: initialized
6064 00:57:05.857381 <6>[ 0.397819] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
6065 00:57:05.867417 <6>[ 0.407768] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6066 00:57:05.870909 <6>[ 0.415494] pinctrl core: initialized pinctrl subsystem
6067 00:57:05.879068 <6>[ 0.422613] DMI not present or invalid.
6068 00:57:05.885828 <6>[ 0.426983] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6069 00:57:05.892669 <6>[ 0.433879] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6070 00:57:05.902240 <6>[ 0.441390] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6071 00:57:05.909122 <6>[ 0.449561] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6072 00:57:05.915625 <6>[ 0.457706] audit: initializing netlink subsys (disabled)
6073 00:57:05.922304 <5>[ 0.463386] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
6074 00:57:05.929188 <6>[ 0.464342] thermal_sys: Registered thermal governor 'step_wise'
6075 00:57:05.935575 <6>[ 0.471337] thermal_sys: Registered thermal governor 'power_allocator'
6076 00:57:05.938539 <6>[ 0.477585] cpuidle: using governor menu
6077 00:57:05.945592 <6>[ 0.488531] NET: Registered PF_QIPCRTR protocol family
6078 00:57:05.952354 <6>[ 0.494009] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6079 00:57:05.958919 <6>[ 0.501102] ASID allocator initialised with 32768 entries
6080 00:57:05.962364 <6>[ 0.507879] Serial: AMBA PL011 UART driver
6081 00:57:05.974790 <4>[ 0.518296] Trying to register duplicate clock ID: 113
6082 00:57:06.033268 <6>[ 0.573923] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6083 00:57:06.047943 <6>[ 0.588298] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6084 00:57:06.051431 <6>[ 0.598049] KASLR enabled
6085 00:57:06.065752 <6>[ 0.606060] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6086 00:57:06.072410 <6>[ 0.613066] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6087 00:57:06.079080 <6>[ 0.619544] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6088 00:57:06.085974 <6>[ 0.626535] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6089 00:57:06.092604 <6>[ 0.633010] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6090 00:57:06.099011 <6>[ 0.640000] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6091 00:57:06.106095 <6>[ 0.646473] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6092 00:57:06.112003 <6>[ 0.653463] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6093 00:57:06.115277 <6>[ 0.661035] ACPI: Interpreter disabled.
6094 00:57:06.125184 <6>[ 0.669012] iommu: Default domain type: Translated
6095 00:57:06.132271 <6>[ 0.674119] iommu: DMA domain TLB invalidation policy: strict mode
6096 00:57:06.135229 <5>[ 0.680752] SCSI subsystem initialized
6097 00:57:06.142047 <6>[ 0.685173] usbcore: registered new interface driver usbfs
6098 00:57:06.148598 <6>[ 0.690898] usbcore: registered new interface driver hub
6099 00:57:06.151880 <6>[ 0.696440] usbcore: registered new device driver usb
6100 00:57:06.159181 <6>[ 0.702744] pps_core: LinuxPPS API ver. 1 registered
6101 00:57:06.169171 <6>[ 0.707929] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6102 00:57:06.172324 <6>[ 0.717254] PTP clock support registered
6103 00:57:06.175619 <6>[ 0.721506] EDAC MC: Ver: 3.0.0
6104 00:57:06.183410 <6>[ 0.727146] FPGA manager framework
6105 00:57:06.186735 <6>[ 0.730831] Advanced Linux Sound Architecture Driver Initialized.
6106 00:57:06.190911 <6>[ 0.737581] vgaarb: loaded
6107 00:57:06.197262 <6>[ 0.740696] clocksource: Switched to clocksource arch_sys_counter
6108 00:57:06.203835 <5>[ 0.747128] VFS: Disk quotas dquot_6.6.0
6109 00:57:06.210625 <6>[ 0.751302] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6110 00:57:06.214042 <6>[ 0.758479] pnp: PnP ACPI: disabled
6111 00:57:06.221653 <6>[ 0.765355] NET: Registered PF_INET protocol family
6112 00:57:06.228091 <6>[ 0.770592] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6113 00:57:06.240253 <6>[ 0.780505] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6114 00:57:06.250180 <6>[ 0.789259] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6115 00:57:06.256520 <6>[ 0.797209] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6116 00:57:06.263815 <6>[ 0.805442] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6117 00:57:06.270678 <6>[ 0.813536] TCP: Hash tables configured (established 32768 bind 32768)
6118 00:57:06.276845 <6>[ 0.820365] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6119 00:57:06.286678 <6>[ 0.827339] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6120 00:57:06.293691 <6>[ 0.834819] NET: Registered PF_UNIX/PF_LOCAL protocol family
6121 00:57:06.297000 <6>[ 0.840937] RPC: Registered named UNIX socket transport module.
6122 00:57:06.303803 <6>[ 0.847083] RPC: Registered udp transport module.
6123 00:57:06.306671 <6>[ 0.852008] RPC: Registered tcp transport module.
6124 00:57:06.313740 <6>[ 0.856930] RPC: Registered tcp NFSv4.1 backchannel transport module.
6125 00:57:06.320217 <6>[ 0.863586] PCI: CLS 0 bytes, default 64
6126 00:57:06.323422 <6>[ 0.867841] Unpacking initramfs...
6127 00:57:06.345826 <6>[ 0.885382] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6128 00:57:06.352359 <6>[ 0.894006] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6129 00:57:06.359385 <6>[ 0.902863] kvm [1]: IPA Size Limit: 40 bits
6130 00:57:06.366164 <6>[ 0.909194] kvm [1]: vgic-v2@c420000
6131 00:57:06.369346 <6>[ 0.913010] kvm [1]: GIC system register CPU interface enabled
6132 00:57:06.381064 <6>[ 0.924752] kvm [1]: vgic interrupt IRQ18
6133 00:57:06.384711 <6>[ 0.929136] kvm [1]: Hyp mode initialized successfully
6134 00:57:06.392396 <5>[ 0.935561] Initialise system trusted keyrings
6135 00:57:06.398759 <6>[ 0.940457] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6136 00:57:06.406660 <6>[ 0.950475] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6137 00:57:06.413678 <5>[ 0.956979] NFS: Registering the id_resolver key type
6138 00:57:06.416538 <5>[ 0.962291] Key type id_resolver registered
6139 00:57:06.423206 <5>[ 0.966710] Key type id_legacy registered
6140 00:57:06.430144 <6>[ 0.971070] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6141 00:57:06.436450 <6>[ 0.978012] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6142 00:57:06.443321 <6>[ 0.985769] 9p: Installing v9fs 9p2000 file system support
6143 00:57:06.470618 <5>[ 1.014341] Key type asymmetric registered
6144 00:57:06.474532 <5>[ 1.018684] Asymmetric key parser 'x509' registered
6145 00:57:06.484438 <6>[ 1.023843] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6146 00:57:06.487171 <6>[ 1.031453] io scheduler mq-deadline registered
6147 00:57:06.490596 <6>[ 1.036210] io scheduler kyber registered
6148 00:57:06.513144 <6>[ 1.056983] EINJ: ACPI disabled.
6149 00:57:06.519827 <4>[ 1.060756] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6150 00:57:06.557856 <6>[ 1.101452] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6151 00:57:06.566140 <6>[ 1.109903] printk: console [ttyS0] disabled
6152 00:57:06.593955 <6>[ 1.134551] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6153 00:57:06.600786 <6>[ 1.144028] printk: console [ttyS0] enabled
6154 00:57:06.604274 <6>[ 1.144028] printk: console [ttyS0] enabled
6155 00:57:06.611133 <6>[ 1.152948] printk: bootconsole [mtk8250] disabled
6156 00:57:06.614139 <6>[ 1.152948] printk: bootconsole [mtk8250] disabled
6157 00:57:06.624112 <3>[ 1.163478] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6158 00:57:06.630300 <3>[ 1.171856] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6159 00:57:06.660290 <6>[ 1.200270] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6160 00:57:06.667003 <6>[ 1.209938] serial serial0: tty port ttyS1 registered
6161 00:57:06.673435 <6>[ 1.216487] SuperH (H)SCI(F) driver initialized
6162 00:57:06.676964 <6>[ 1.221957] msm_serial: driver initialized
6163 00:57:06.692160 <6>[ 1.232281] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6164 00:57:06.701798 <6>[ 1.240881] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6165 00:57:06.708368 <6>[ 1.249461] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6166 00:57:06.718794 <6>[ 1.258034] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6167 00:57:06.728006 <6>[ 1.266688] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6168 00:57:06.734978 <6>[ 1.275353] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6169 00:57:06.745212 <6>[ 1.284093] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6170 00:57:06.751572 <6>[ 1.292837] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6171 00:57:06.761838 <6>[ 1.301404] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6172 00:57:06.771749 <6>[ 1.310210] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6173 00:57:06.778867 <4>[ 1.322647] cacheinfo: Unable to detect cache hierarchy for CPU 0
6174 00:57:06.788569 <6>[ 1.332000] loop: module loaded
6175 00:57:06.800432 <6>[ 1.343891] vsim1: Bringing 1800000uV into 2700000-2700000uV
6176 00:57:06.818049 <6>[ 1.361856] megasas: 07.719.03.00-rc1
6177 00:57:06.827257 <6>[ 1.370670] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6178 00:57:06.840489 <6>[ 1.384084] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6179 00:57:06.857554 <6>[ 1.400915] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6180 00:57:06.914461 <6>[ 1.451029] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6181 00:57:08.362900 <6>[ 2.906243] Freeing initrd memory: 59580K
6182 00:57:08.378236 <4>[ 2.918164] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6183 00:57:08.384710 <4>[ 2.927414] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6184 00:57:08.391211 <4>[ 2.934113] Hardware name: Google juniper sku16 board (DT)
6185 00:57:08.394556 <4>[ 2.939852] Call trace:
6186 00:57:08.397565 <4>[ 2.942552] dump_backtrace.part.0+0xe0/0xf0
6187 00:57:08.400983 <4>[ 2.947089] show_stack+0x18/0x30
6188 00:57:08.404753 <4>[ 2.950661] dump_stack_lvl+0x68/0x84
6189 00:57:08.410997 <4>[ 2.954582] dump_stack+0x18/0x34
6190 00:57:08.414429 <4>[ 2.958152] sysfs_warn_dup+0x64/0x80
6191 00:57:08.417674 <4>[ 2.962073] sysfs_do_create_link_sd+0xf0/0x100
6192 00:57:08.421045 <4>[ 2.966861] sysfs_create_link+0x20/0x40
6193 00:57:08.427549 <4>[ 2.971040] bus_add_device+0x68/0x10c
6194 00:57:08.430650 <4>[ 2.975047] device_add+0x340/0x7ac
6195 00:57:08.434073 <4>[ 2.978790] of_device_add+0x44/0x60
6196 00:57:08.441042 <4>[ 2.982624] of_platform_device_create_pdata+0x90/0x120
6197 00:57:08.443955 <4>[ 2.988105] of_platform_bus_create+0x170/0x370
6198 00:57:08.447685 <4>[ 2.992891] of_platform_populate+0x50/0xfc
6199 00:57:08.454068 <4>[ 2.997331] parse_mtd_partitions+0x1dc/0x510
6200 00:57:08.457704 <4>[ 3.001943] mtd_device_parse_register+0xf8/0x2e0
6201 00:57:08.463653 <4>[ 3.006901] spi_nor_probe+0x21c/0x2f0
6202 00:57:08.466988 <4>[ 3.010907] spi_mem_probe+0x6c/0xb0
6203 00:57:08.470424 <4>[ 3.014739] spi_probe+0x84/0xe4
6204 00:57:08.474044 <4>[ 3.018221] really_probe+0xbc/0x2e0
6205 00:57:08.477415 <4>[ 3.022051] __driver_probe_device+0x78/0x11c
6206 00:57:08.483797 <4>[ 3.026663] driver_probe_device+0xd8/0x160
6207 00:57:08.487319 <4>[ 3.031101] __device_attach_driver+0xb8/0x134
6208 00:57:08.490441 <4>[ 3.035799] bus_for_each_drv+0x78/0xd0
6209 00:57:08.497303 <4>[ 3.039889] __device_attach+0xa8/0x1c0
6210 00:57:08.500397 <4>[ 3.043980] device_initial_probe+0x14/0x20
6211 00:57:08.503689 <4>[ 3.048418] bus_probe_device+0x9c/0xa4
6212 00:57:08.506892 <4>[ 3.052508] device_add+0x3ac/0x7ac
6213 00:57:08.510676 <4>[ 3.056250] __spi_add_device+0x78/0x120
6214 00:57:08.516954 <4>[ 3.060428] spi_add_device+0x40/0x7c
6215 00:57:08.520315 <4>[ 3.064346] spi_register_controller+0x610/0xad0
6216 00:57:08.526969 <4>[ 3.069219] devm_spi_register_controller+0x4c/0xa4
6217 00:57:08.530353 <4>[ 3.074352] mtk_spi_probe+0x3f8/0x650
6218 00:57:08.533534 <4>[ 3.078356] platform_probe+0x68/0xe0
6219 00:57:08.537048 <4>[ 3.082274] really_probe+0xbc/0x2e0
6220 00:57:08.543643 <4>[ 3.086104] __driver_probe_device+0x78/0x11c
6221 00:57:08.547123 <4>[ 3.090715] driver_probe_device+0xd8/0x160
6222 00:57:08.550102 <4>[ 3.095153] __driver_attach+0x94/0x19c
6223 00:57:08.553593 <4>[ 3.099244] bus_for_each_dev+0x70/0xd0
6224 00:57:08.560407 <4>[ 3.103334] driver_attach+0x24/0x30
6225 00:57:08.563674 <4>[ 3.107164] bus_add_driver+0x154/0x20c
6226 00:57:08.567083 <4>[ 3.111254] driver_register+0x78/0x130
6227 00:57:08.570070 <4>[ 3.115345] __platform_driver_register+0x28/0x34
6228 00:57:08.576766 <4>[ 3.120304] mtk_spi_driver_init+0x1c/0x28
6229 00:57:08.579978 <4>[ 3.124658] do_one_initcall+0x50/0x1d0
6230 00:57:08.583504 <4>[ 3.128748] kernel_init_freeable+0x21c/0x288
6231 00:57:08.589859 <4>[ 3.133362] kernel_init+0x24/0x12c
6232 00:57:08.592983 <4>[ 3.137106] ret_from_fork+0x10/0x20
6233 00:57:08.602812 <6>[ 3.146052] tun: Universal TUN/TAP device driver, 1.6
6234 00:57:08.606172 <6>[ 3.152340] thunder_xcv, ver 1.0
6235 00:57:08.609425 <6>[ 3.155863] thunder_bgx, ver 1.0
6236 00:57:08.612954 <6>[ 3.159367] nicpf, ver 1.0
6237 00:57:08.623518 <6>[ 3.163738] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6238 00:57:08.627361 <6>[ 3.171222] hns3: Copyright (c) 2017 Huawei Corporation.
6239 00:57:08.633420 <6>[ 3.176826] hclge is initializing
6240 00:57:08.636927 <6>[ 3.180407] e1000: Intel(R) PRO/1000 Network Driver
6241 00:57:08.643200 <6>[ 3.185543] e1000: Copyright (c) 1999-2006 Intel Corporation.
6242 00:57:08.647045 <6>[ 3.191565] e1000e: Intel(R) PRO/1000 Network Driver
6243 00:57:08.653942 <6>[ 3.196786] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6244 00:57:08.660019 <6>[ 3.202978] igb: Intel(R) Gigabit Ethernet Network Driver
6245 00:57:08.666457 <6>[ 3.208633] igb: Copyright (c) 2007-2014 Intel Corporation.
6246 00:57:08.673111 <6>[ 3.214478] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6247 00:57:08.680178 <6>[ 3.221001] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6248 00:57:08.683549 <6>[ 3.227554] sky2: driver version 1.30
6249 00:57:08.689631 <6>[ 3.232814] usbcore: registered new device driver r8152-cfgselector
6250 00:57:08.696408 <6>[ 3.239356] usbcore: registered new interface driver r8152
6251 00:57:08.703238 <6>[ 3.245181] VFIO - User Level meta-driver version: 0.3
6252 00:57:08.709872 <6>[ 3.252991] mtu3 11201000.usb: uwk - reg:0x420, version:101
6253 00:57:08.716398 <4>[ 3.258868] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6254 00:57:08.722610 <6>[ 3.266140] mtu3 11201000.usb: dr_mode: 1, drd: auto
6255 00:57:08.729338 <6>[ 3.271365] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6256 00:57:08.732670 <6>[ 3.277550] mtu3 11201000.usb: usb3-drd: 0
6257 00:57:08.742814 <6>[ 3.283083] mtu3 11201000.usb: xHCI platform device register success...
6258 00:57:08.749736 <4>[ 3.291709] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6259 00:57:08.756360 <6>[ 3.299649] xhci-mtk 11200000.usb: xHCI Host Controller
6260 00:57:08.762945 <6>[ 3.305155] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6261 00:57:08.769341 <6>[ 3.312879] xhci-mtk 11200000.usb: USB3 root hub has no ports
6262 00:57:08.779573 <6>[ 3.318888] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6263 00:57:08.785934 <6>[ 3.328311] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6264 00:57:08.792435 <6>[ 3.334391] xhci-mtk 11200000.usb: xHCI Host Controller
6265 00:57:08.799442 <6>[ 3.339878] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6266 00:57:08.805968 <6>[ 3.347535] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6267 00:57:08.809138 <6>[ 3.354348] hub 1-0:1.0: USB hub found
6268 00:57:08.812585 <6>[ 3.358378] hub 1-0:1.0: 1 port detected
6269 00:57:08.823237 <6>[ 3.363717] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6270 00:57:08.826643 <6>[ 3.372342] hub 2-0:1.0: USB hub found
6271 00:57:08.837010 <3>[ 3.376369] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6272 00:57:08.843149 <6>[ 3.384262] usbcore: registered new interface driver usb-storage
6273 00:57:08.849904 <6>[ 3.390875] usbcore: registered new device driver onboard-usb-hub
6274 00:57:08.864410 <4>[ 3.404824] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6275 00:57:08.873663 <6>[ 3.417025] mt6397-rtc mt6358-rtc: registered as rtc0
6276 00:57:08.883495 <6>[ 3.422504] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-16T00:57:09 UTC (1718499429)
6277 00:57:08.890035 <6>[ 3.432392] i2c_dev: i2c /dev entries driver
6278 00:57:08.900410 <6>[ 3.438774] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6279 00:57:08.906472 <6>[ 3.447157] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6280 00:57:08.913331 <6>[ 3.456062] i2c 4-0058: Fixed dependency cycle(s) with /panel
6281 00:57:08.919584 <6>[ 3.462135] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6282 00:57:08.929386 <3>[ 3.469611] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6283 00:57:08.946093 <6>[ 3.489568] cpu cpu0: EM: created perf domain
6284 00:57:08.955874 <6>[ 3.495074] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6285 00:57:08.962764 <6>[ 3.506396] cpu cpu4: EM: created perf domain
6286 00:57:08.969469 <6>[ 3.513174] sdhci: Secure Digital Host Controller Interface driver
6287 00:57:08.976587 <6>[ 3.519630] sdhci: Copyright(c) Pierre Ossman
6288 00:57:08.983141 <6>[ 3.525043] Synopsys Designware Multimedia Card Interface Driver
6289 00:57:08.989471 <6>[ 3.525556] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6290 00:57:08.992930 <6>[ 3.532130] sdhci-pltfm: SDHCI platform and OF driver helper
6291 00:57:09.001803 <6>[ 3.545563] ledtrig-cpu: registered to indicate activity on CPUs
6292 00:57:09.010151 <6>[ 3.553340] usbcore: registered new interface driver usbhid
6293 00:57:09.013428 <6>[ 3.559180] usbhid: USB HID core driver
6294 00:57:09.024161 <6>[ 3.563478] spi_master spi2: will run message pump with realtime priority
6295 00:57:09.027562 <4>[ 3.563722] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6296 00:57:09.037882 <4>[ 3.577770] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6297 00:57:09.050829 <6>[ 3.583419] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6298 00:57:09.064035 <6>[ 3.600354] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6299 00:57:09.073973 <4>[ 3.612154] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6300 00:57:09.077402 <6>[ 3.621503] cros-ec-spi spi2.0: Chrome EC device registered
6301 00:57:09.090559 <4>[ 3.630736] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6302 00:57:09.103323 <4>[ 3.643194] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6303 00:57:09.109824 <6>[ 3.645053] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x12c14
6304 00:57:09.116096 <4>[ 3.652451] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6305 00:57:09.119765 <6>[ 3.658735] mmc0: new HS400 MMC card at address 0001
6306 00:57:09.126513 <6>[ 3.670099] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6307 00:57:09.132889 <6>[ 3.672533] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6308 00:57:09.140349 <6>[ 3.683956] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6309 00:57:09.150044 <6>[ 3.693523] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6310 00:57:09.157087 <6>[ 3.700754] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6311 00:57:09.164405 <6>[ 3.707832] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6312 00:57:09.193204 <6>[ 3.729895] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6313 00:57:09.202878 <6>[ 3.742425] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6314 00:57:09.212530 <6>[ 3.745789] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6315 00:57:09.228605 <6>[ 3.765680] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6316 00:57:09.235752 <6>[ 3.778343] NET: Registered PF_PACKET protocol family
6317 00:57:09.238389 <6>[ 3.783810] 9pnet: Installing 9P2000 support
6318 00:57:09.245279 <6>[ 3.784716] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6319 00:57:09.251794 <5>[ 3.788403] Key type dns_resolver registered
6320 00:57:09.255077 <6>[ 3.800249] registered taskstats version 1
6321 00:57:09.262099 <5>[ 3.804621] Loading compiled-in X.509 certificates
6322 00:57:09.327251 <3>[ 3.867850] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6323 00:57:09.360483 <6>[ 3.897078] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6324 00:57:09.371646 <6>[ 3.911424] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6325 00:57:09.381068 <6>[ 3.919996] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6326 00:57:09.387881 <6>[ 3.928773] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6327 00:57:09.397842 <6>[ 3.937454] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6328 00:57:09.401375 <6>[ 3.943785] hub 1-1:1.0: USB hub found
6329 00:57:09.411223 <6>[ 3.946051] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6330 00:57:09.414876 <6>[ 3.950411] hub 1-1:1.0: 3 ports detected
6331 00:57:09.424042 <6>[ 3.958561] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6332 00:57:09.430560 <6>[ 3.971301] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6333 00:57:09.437518 <6>[ 3.980925] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6334 00:57:09.444839 <6>[ 3.988469] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6335 00:57:09.452612 <6>[ 3.995780] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6336 00:57:09.462977 <6>[ 4.003021] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6337 00:57:09.469368 <6>[ 4.010422] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6338 00:57:09.476300 <6>[ 4.018687] panfrost 13040000.gpu: clock rate = 511999970
6339 00:57:09.486055 <6>[ 4.024393] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6340 00:57:09.492966 <6>[ 4.034524] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6341 00:57:09.502901 <6>[ 4.042547] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6342 00:57:09.516033 <6>[ 4.050980] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6343 00:57:09.522440 <6>[ 4.063058] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6344 00:57:09.534047 <6>[ 4.073948] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6345 00:57:09.543745 <6>[ 4.082702] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6346 00:57:09.553617 <6>[ 4.091863] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6347 00:57:09.560247 <6>[ 4.100996] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6348 00:57:09.570055 <6>[ 4.110123] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6349 00:57:09.580134 <6>[ 4.119423] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6350 00:57:09.590182 <6>[ 4.128723] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6351 00:57:09.599905 <6>[ 4.138196] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6352 00:57:09.606779 <6>[ 4.147670] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6353 00:57:09.616444 <6>[ 4.156795] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6354 00:57:09.689918 <6>[ 4.229961] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6355 00:57:09.699825 <6>[ 4.238854] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6356 00:57:09.710949 <6>[ 4.251256] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6357 00:57:09.736654 <6>[ 4.276726] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6358 00:57:10.415404 <6>[ 4.469191] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6359 00:57:10.424992 <4>[ 4.585954] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6360 00:57:10.431872 <4>[ 4.585973] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6361 00:57:10.438301 <6>[ 4.634913] r8152 1-1.2:1.0 eth0: v1.12.13
6362 00:57:10.445178 <6>[ 4.716726] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6363 00:57:10.452212 <6>[ 4.938939] Console: switching to colour frame buffer device 170x48
6364 00:57:10.458465 <6>[ 4.999539] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6365 00:57:10.479874 <6>[ 5.016914] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6366 00:57:10.497058 <6>[ 5.034024] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6367 00:57:10.503778 <6>[ 5.046407] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6368 00:57:10.515369 <6>[ 5.055117] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6369 00:57:10.524704 <6>[ 5.063587] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6370 00:57:10.545767 <6>[ 5.083037] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6371 00:57:11.713343 <6>[ 6.256759] r8152 1-1.2:1.0 eth0: carrier on
6372 00:57:11.748717 <5>[ 6.276709] Sending DHCP requests ., OK
6373 00:57:11.755628 <6>[ 6.296919] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6374 00:57:11.758909 <6>[ 6.305332] IP-Config: Complete:
6375 00:57:11.772200 <6>[ 6.308890] device=eth0, hwaddr=00:e0:4c:72:3d:67, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6376 00:57:11.778858 <6>[ 6.319759] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-1, domain=lava-rack, nis-domain=(none)
6377 00:57:11.793725 <6>[ 6.333980] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6378 00:57:11.801474 <6>[ 6.333991] nameserver0=192.168.201.1
6379 00:57:11.809686 <6>[ 6.353257] clk: Disabling unused clocks
6380 00:57:11.814284 <6>[ 6.361006] ALSA device list:
6381 00:57:11.823332 <6>[ 6.366841] No soundcards found.
6382 00:57:11.831797 <6>[ 6.375495] Freeing unused kernel memory: 8512K
6383 00:57:11.838884 <6>[ 6.382496] Run /init as init process
6384 00:57:11.867611 <6>[ 6.410779] NET: Registered PF_INET6 protocol family
6385 00:57:11.874410 <6>[ 6.417771] Segment Routing with IPv6
6386 00:57:11.877770 <6>[ 6.422388] In-situ OAM (IOAM) with IPv6
6387 00:57:11.923199 <30>[ 6.440382] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6388 00:57:11.932500 <30>[ 6.476069] systemd[1]: Detected architecture arm64.
6389 00:57:11.933053
6390 00:57:11.939321 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6391 00:57:11.939867
6392 00:57:11.953717 <30>[ 6.497130] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6393 00:57:12.090409 <30>[ 6.630693] systemd[1]: Queued start job for default target graphical.target.
6394 00:57:12.118542 <30>[ 6.658593] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6395 00:57:12.128133 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6396 00:57:12.145689 <30>[ 6.685483] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6397 00:57:12.155468 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6398 00:57:12.174073 <30>[ 6.714249] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6399 00:57:12.185383 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6400 00:57:12.201529 <30>[ 6.741406] systemd[1]: Created slice user.slice - User and Session Slice.
6401 00:57:12.210862 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6402 00:57:12.232874 <30>[ 6.769651] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6403 00:57:12.243865 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6404 00:57:12.264048 <30>[ 6.801020] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6405 00:57:12.275639 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6406 00:57:12.302946 <30>[ 6.833022] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6407 00:57:12.319913 <30>[ 6.860219] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6408 00:57:12.327038 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6409 00:57:12.344836 <30>[ 6.884882] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6410 00:57:12.356632 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6411 00:57:12.372780 <30>[ 6.912919] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6412 00:57:12.386815 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6413 00:57:12.401617 <30>[ 6.944995] systemd[1]: Reached target paths.target - Path Units.
6414 00:57:12.416050 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6415 00:57:12.433614 <30>[ 6.973631] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6416 00:57:12.446280 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6417 00:57:12.461608 <30>[ 7.004884] systemd[1]: Reached target slices.target - Slice Units.
6418 00:57:12.476386 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6419 00:57:12.489320 <30>[ 7.032926] systemd[1]: Reached target swap.target - Swaps.
6420 00:57:12.500353 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6421 00:57:12.520525 <30>[ 7.060983] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6422 00:57:12.534532 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6423 00:57:12.553468 <30>[ 7.093515] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6424 00:57:12.567252 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6425 00:57:12.586146 <30>[ 7.126526] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6426 00:57:12.599926 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6427 00:57:12.618133 <30>[ 7.158286] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6428 00:57:12.632510 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6429 00:57:12.649401 <30>[ 7.189480] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6430 00:57:12.661561 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6431 00:57:12.682270 <30>[ 7.222405] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6432 00:57:12.695519 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6433 00:57:12.714476 <30>[ 7.254493] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6434 00:57:12.727866 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6435 00:57:12.777284 <30>[ 7.317227] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6436 00:57:12.788992 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6437 00:57:12.813639 <30>[ 7.353506] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6438 00:57:12.827083 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6439 00:57:12.868895 <30>[ 7.409156] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6440 00:57:12.882372 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6441 00:57:12.907963 <30>[ 7.441583] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6442 00:57:12.931526 <30>[ 7.471675] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6443 00:57:12.943788 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6444 00:57:12.966792 <30>[ 7.506872] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6445 00:57:12.979657 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6446 00:57:13.002691 <30>[ 7.542735] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6447 00:57:13.020572 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod..<6>[ 7.560338] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6448 00:57:13.021079 .
6449 00:57:13.065615 <30>[ 7.605788] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6450 00:57:13.079080 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6451 00:57:13.093327 <30>[ 7.633106] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6452 00:57:13.107245 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6453 00:57:13.149558 <30>[ 7.689790] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6454 00:57:13.161826 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6455 00:57:13.190892 <30>[ 7.730874] systemd[1]: Starting systemd-journald.service - Journal Service...
6456 00:57:13.201541 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6457 00:57:13.220499 <30>[ 7.760560] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6458 00:57:13.230330 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6459 00:57:13.256965 <30>[ 7.793597] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6460 00:57:13.267408 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6461 00:57:13.321802 <30>[ 7.861744] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6462 00:57:13.334423 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6463 00:57:13.357520 <30>[ 7.897640] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6464 00:57:13.368646 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6465 00:57:13.389103 <30>[ 7.928930] systemd[1]: Started systemd-journald.service - Journal Service.
6466 00:57:13.398627 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6467 00:57:13.419544 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6468 00:57:13.438261 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6469 00:57:13.457738 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6470 00:57:13.477883 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6471 00:57:13.499307 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6472 00:57:13.519736 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6473 00:57:13.539892 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6474 00:57:13.559582 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6475 00:57:13.580216 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6476 00:57:13.598875 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6477 00:57:13.618350 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6478 00:57:13.639334 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6479 00:57:13.693781 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6480 00:57:13.718743 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6481 00:57:13.747488 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6482 00:57:13.762254 See 'systemctl status systemd-remount-fs.service' for details.
6483 00:57:13.775419 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6484 00:57:13.795378 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6485 00:57:13.814469 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6486 00:57:13.857654 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6487 00:57:13.874239 <46>[ 8.414384] systemd-journald[205]: Received client request to flush runtime journal.
6488 00:57:13.887058 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6489 00:57:13.908840 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6490 00:57:13.932407 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6491 00:57:13.951760 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6492 00:57:13.970491 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6493 00:57:14.009855 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6494 00:57:14.046489 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6495 00:57:14.065776 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6496 00:57:14.085273 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6497 00:57:14.134060 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6498 00:57:14.158817 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6499 00:57:14.184767 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6500 00:57:14.229973 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6501 00:57:14.252279 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6502 00:57:14.269355 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6503 00:57:14.299848 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6504 00:57:14.323208 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6505 00:57:14.337389 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6506 00:57:14.349525 <46>[ 8.892684] systemd-journald[205]: Time jumped backwards, rotating.
6507 00:57:14.473582 <6>[ 9.013845] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6508 00:57:14.490324 <3>[ 9.027355] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6509 00:57:14.493968 <3>[ 9.027913] mtk-scp 10500000.scp: invalid resource
6510 00:57:14.503843 <3>[ 9.029075] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6511 00:57:14.510336 <3>[ 9.029105] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6512 00:57:14.520379 <3>[ 9.029116] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6513 00:57:14.530493 <4>[ 9.031844] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6514 00:57:14.537198 <3>[ 9.037480] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6515 00:57:14.547464 <6>[ 9.037679] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6516 00:57:14.556838 <6>[ 9.042329] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6517 00:57:14.566949 <6>[ 9.042518] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6518 00:57:14.577221 <3>[ 9.051006] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6519 00:57:14.583401 <3>[ 9.058557] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6520 00:57:14.595301 <3>[ 9.058583] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6521 00:57:14.605949 <3>[ 9.058591] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6522 00:57:14.615708 <3>[ 9.058602] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6523 00:57:14.622762 <3>[ 9.058610] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6524 00:57:14.631905 <3>[ 9.061470] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6525 00:57:14.642090 <3>[ 9.068051] elan_i2c 2-0015: Error applying setting, reverse things back
6526 00:57:14.645656 <6>[ 9.079909] remoteproc remoteproc0: scp is available
6527 00:57:14.651942 <4>[ 9.079935] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6528 00:57:14.663485 <4>[ 9.093432] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6529 00:57:14.673359 <4>[ 9.095798] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6530 00:57:14.687018 <3>[ 9.107065] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6531 00:57:14.693889 <6>[ 9.114178] remoteproc remoteproc0: powering up scp
6532 00:57:14.697406 <6>[ 9.146433] mc: Linux media interface: v0.10
6533 00:57:14.708310 <5>[ 9.147817] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6534 00:57:14.718997 <4>[ 9.154703] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6535 00:57:14.729367 <5>[ 9.162608] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6536 00:57:14.739281 <5>[ 9.163091] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6537 00:57:14.748915 <4>[ 9.163178] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6538 00:57:14.755790 <3>[ 9.171647] remoteproc remoteproc0: request_firmware failed: -2
6539 00:57:14.763488 <6>[ 9.186450] videodev: Linux video capture interface: v2.00
6540 00:57:14.771153 <6>[ 9.189510] cfg80211: failed to load regulatory.db
6541 00:57:14.781332 <6>[ 9.236789] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6542 00:57:14.791645 <6>[ 9.237751] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6543 00:57:14.802114 <6>[ 9.247384] cs_system_cfg: CoreSight Configuration manager initialised
6544 00:57:14.821227 <6>[ 9.364114] Bluetooth: Core ver 2.22
6545 00:57:14.839378 <3>[ 9.376191] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6546 00:57:14.846079 <6>[ 9.376236] NET: Registered PF_BLUETOOTH protocol family
6547 00:57:14.852867 <6>[ 9.382384] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6548 00:57:14.862544 <6>[ 9.388082] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6549 00:57:14.869187 <3>[ 9.390296] debugfs: File 'Playback' in directory 'dapm' already present!
6550 00:57:14.880308 <3>[ 9.390313] debugfs: File 'Capture' in directory 'dapm' already present!
6551 00:57:14.886823 <6>[ 9.393656] Bluetooth: HCI device and connection manager initialized
6552 00:57:14.893314 <6>[ 9.418913] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6553 00:57:14.900049 <6>[ 9.420441] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6554 00:57:14.907092 <6>[ 9.420664] Bluetooth: HCI socket layer initialized
6555 00:57:14.913210 <6>[ 9.420678] Bluetooth: L2CAP socket layer initialized
6556 00:57:14.916701 <6>[ 9.420743] Bluetooth: SCO socket layer initialized
6557 00:57:14.924746 <6>[ 9.433301] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6558 00:57:14.934733 <6>[ 9.450442] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6559 00:57:14.944295 <6>[ 9.453136] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6560 00:57:14.950977 <6>[ 9.454924] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6561 00:57:14.960949 <6>[ 9.454963] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6562 00:57:14.967967 <6>[ 9.455098] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video2 (81,2)
6563 00:57:14.974332 <6>[ 9.455149] usbcore: registered new interface driver uvcvideo
6564 00:57:14.981074 <6>[ 9.460377] Bluetooth: HCI UART driver ver 2.3
6565 00:57:14.984317 <3>[ 9.466691] thermal_sys: Failed to find 'trips' node
6566 00:57:14.990835 <6>[ 9.471777] Bluetooth: HCI UART protocol H4 registered
6567 00:57:15.000928 <6>[ 9.472239] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6568 00:57:15.007365 <6>[ 9.474196] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6569 00:57:15.017334 <6>[ 9.478924] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6570 00:57:15.023915 <3>[ 9.482316] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6571 00:57:15.033931 <6>[ 9.483013] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6572 00:57:15.040821 <6>[ 9.488786] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video3
6573 00:57:15.050574 <6>[ 9.489124] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6574 00:57:15.061519 <6>[ 9.489133] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6575 00:57:15.074858 <6>[ 9.489489] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6576 00:57:15.078080 <6>[ 9.494204] Bluetooth: HCI UART protocol LL registered
6577 00:57:15.088303 <3>[ 9.500900] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6578 00:57:15.098541 <4>[ 9.500904] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6579 00:57:15.101936 <3>[ 9.502168] thermal_sys: Failed to find 'trips' node
6580 00:57:15.108690 <6>[ 9.508857] Bluetooth: HCI UART protocol Three-wire (H5) registered
6581 00:57:15.118221 <3>[ 9.517510] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6582 00:57:15.125066 <3>[ 9.517517] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6583 00:57:15.131118 <6>[ 9.523834] Bluetooth: HCI UART protocol Broadcom registered
6584 00:57:15.141349 <4>[ 9.528202] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6585 00:57:15.147867 <6>[ 9.637819] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6586 00:57:15.154847 <6>[ 9.645092] Bluetooth: HCI UART protocol QCA registered
6587 00:57:15.161507 <6>[ 9.646416] Bluetooth: hci0: setting up ROME/QCA6390
6588 00:57:15.183301 <6>[ 9.722224] Bluetooth: HCI UART protocol Marvell registered
6589 00:57:15.193283 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6590 00:57:15.213526 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6591 00:57:15.224846 <4>[ 9.765004] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6592 00:57:15.231783 <4>[ 9.765004] Fallback method does not support PEC.
6593 00:57:15.242754 [[0;32m OK [0m] Listening on<3>[ 9.783546] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6594 00:57:15.249164 [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6595 00:57:15.270414 <3>[ 9.808816] power_supply sbs-12-000b: driver failed to report `technology' property: -6
6596 00:57:15.293608 <3>[ 9.833326] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6597 00:57:15.303374 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6598 00:57:15.320195 <3>[ 9.863549] Bluetooth: hci0: Frame reassembly failed (-84)
6599 00:57:15.331635 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6600 00:57:15.368211 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6601 00:57:15.382081 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6602 00:57:15.401238 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6603 00:57:15.418390 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6604 00:57:15.437233 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6605 00:57:15.453180 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6606 00:57:15.469713 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6607 00:57:15.479680 <6>[ 10.017586] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6608 00:57:15.493612 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6609 00:57:15.510117 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6610 00:57:15.554529 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6611 00:57:15.565359 <4>[ 10.105516] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6612 00:57:15.581721 <4>[ 10.122036] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6613 00:57:15.595824 Starting [0;1;39msystemd-logind.se…i<4>[ 10.135827] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6614 00:57:15.599244 ce[0m - User Login Management...
6615 00:57:15.606829 <3>[ 10.144867] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6616 00:57:15.613413 <4>[ 10.148728] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6617 00:57:15.623528 <6>[ 10.150514] Bluetooth: hci0: QCA Product ID :0x00000008
6618 00:57:15.629690 <6>[ 10.150525] Bluetooth: hci0: QCA SOC Version :0x00000044
6619 00:57:15.633769 <6>[ 10.150531] Bluetooth: hci0: QCA ROM Version :0x00000302
6620 00:57:15.641211 <6>[ 10.150537] Bluetooth: hci0: QCA Patch Version:0x00000111
6621 00:57:15.647951 <6>[ 10.150546] Bluetooth: hci0: QCA controller version 0x00440302
6622 00:57:15.654222 <6>[ 10.150554] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6623 00:57:15.665214 <4>[ 10.150675] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6624 00:57:15.675089 <3>[ 10.150691] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6625 00:57:15.681795 <3>[ 10.150699] Bluetooth: hci0: QCA Failed to download patch (-2)
6626 00:57:15.691794 <3>[ 10.153591] power_supply sbs-12-000b: driver failed to report `current_avg' property: -5
6627 00:57:15.698430 <3>[ 10.163879] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6628 00:57:15.709491 <3>[ 10.172602] power_supply sbs-12-000b: driver failed to report `capacity_level' property: -6
6629 00:57:15.719596 <3>[ 10.186197] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6630 00:57:15.738576 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status..<3>[ 10.276494] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6631 00:57:15.738990 .
6632 00:57:15.754386 <3>[ 10.293847] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6633 00:57:15.763726 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6634 00:57:15.783154 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6635 00:57:15.816120 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6636 00:57:15.840718 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6637 00:57:15.903093 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6638 00:57:15.942430 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6639 00:57:15.961366 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6640 00:57:15.978517 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6641 00:57:16.000356 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6642 00:57:16.018129 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6643 00:57:16.062888 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6644 00:57:16.094908 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6645 00:57:16.128176
6646 00:57:16.131363 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6647 00:57:16.131755
6648 00:57:16.135080 debian-bookworm-arm64 login: root (automatic login)
6649 00:57:16.135473
6650 00:57:16.151721 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Sun Jun 16 00:43:03 UTC 2024 aarch64
6651 00:57:16.152264
6652 00:57:16.158528 The programs included with the Debian GNU/Linux system are free software;
6653 00:57:16.165302 the exact distribution terms for each program are described in the
6654 00:57:16.168255 individual files in /usr/share/doc/*/copyright.
6655 00:57:16.168645
6656 00:57:16.175079 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6657 00:57:16.178450 permitted by applicable law.
6658 00:57:16.179787 Matched prompt #10: / #
6660 00:57:16.180719 Setting prompt string to ['/ #']
6661 00:57:16.181133 end: 2.2.5.1 login-action (duration 00:00:11) [common]
6663 00:57:16.182088 end: 2.2.5 auto-login-action (duration 00:00:11) [common]
6664 00:57:16.182506 start: 2.2.6 expect-shell-connection (timeout 00:03:34) [common]
6665 00:57:16.182861 Setting prompt string to ['/ #']
6666 00:57:16.183148 Forcing a shell prompt, looking for ['/ #']
6668 00:57:16.233883 / #
6669 00:57:16.234540 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6670 00:57:16.234899 Waiting using forced prompt support (timeout 00:02:30)
6671 00:57:16.240460
6672 00:57:16.241191 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6673 00:57:16.241678 start: 2.2.7 export-device-env (timeout 00:03:34) [common]
6674 00:57:16.242165 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6675 00:57:16.242572 end: 2.2 depthcharge-retry (duration 00:01:26) [common]
6676 00:57:16.242983 end: 2 depthcharge-action (duration 00:01:26) [common]
6677 00:57:16.243397 start: 3 lava-test-retry (timeout 00:08:07) [common]
6678 00:57:16.243814 start: 3.1 lava-test-shell (timeout 00:08:07) [common]
6679 00:57:16.244160 Using namespace: common
6681 00:57:16.345169 / # #
6682 00:57:16.345775 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6683 00:57:16.351355 #
6684 00:57:16.352050 Using /lava-14368567
6686 00:57:16.453058 / # export SHELL=/bin/sh
6687 00:57:16.458956 export SHELL=/bin/sh
6689 00:57:16.560351 / # . /lava-14368567/environment
6690 00:57:16.566347 . /lava-14368567/environment
6692 00:57:16.667757 / # /lava-14368567/bin/lava-test-runner /lava-14368567/0
6693 00:57:16.668414 Test shell timeout: 10s (minimum of the action and connection timeout)
6694 00:57:16.674124 /lava-14368567/bin/lava-test-runner /lava-14368567/0
6695 00:57:16.701925 + export TESTRUN_ID=0_igt-gpu-panfrost
6696 00:57:16.708609 + cd /lava<8>[ 11.248449] <LAVA_SIGNAL_STARTRUN 0_igt-gpu-panfrost 14368567_1.5.2.3.1>
6697 00:57:16.709290 Received signal: <STARTRUN> 0_igt-gpu-panfrost 14368567_1.5.2.3.1
6698 00:57:16.709639 Starting test lava.0_igt-gpu-panfrost (14368567_1.5.2.3.1)
6699 00:57:16.710092 Skipping test definition patterns.
6700 00:57:16.711900 -14368567/0/tests/0_igt-gpu-panfrost
6701 00:57:16.712407 + cat uuid
6702 00:57:16.715185 + UUID=14368567_1.5.2.3.1
6703 00:57:16.715579 + set +x
6704 00:57:16.725343 + IGT_FORCE_DRIVER=panfrost /usr/bin/igt-parser.sh panfrost_gem_new panfrost_get_param panfrost_prime panfrost_submit
6705 00:57:16.734832 <8>[ 11.278050] <LAVA_SIGNAL_TESTSET START panfrost_gem_new>
6706 00:57:16.735536 Received signal: <TESTSET> START panfrost_gem_new
6707 00:57:16.735877 Starting test_set panfrost_gem_new
6708 00:57:16.756716 <6>[ 11.300182] Console: switching to colour dummy device 80x25
6709 00:57:16.763476 <14>[ 11.306595] [IGT] panfrost_gem_new: executing
6710 00:57:16.770092 IGT-Version: 1.2<14>[ 11.311849] [IGT] panfrost_gem_new: starting subtest gem-new-4096
6711 00:57:16.780326 8-ga44ebfe (aarc<14>[ 11.319883] [IGT] panfrost_gem_new: finished subtest gem-new-4096, SUCCESS
6712 00:57:16.786910 h64) (Linux: 6.1<14>[ 11.328806] [IGT] panfrost_gem_new: exiting, ret=0
6713 00:57:16.787330 .92-cip22 aarch64)
6714 00:57:16.793930 Using IGT_SRANDOM=1718499436 for randomisation
6715 00:57:16.797244 Opened device: /dev/dri/card0
6716 00:57:16.797631 Starting subtest: gem-new-4096
6717 00:57:16.803709 [1mSubtest gem-new-4096: SUCCESS (0.000s)[0m
6718 00:57:16.837008 <6>[ 11.362202] Console: switching to colour frame buffer device 170x48
6719 00:57:16.852546 <8>[ 11.392524] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-4096 RESULT=pass>
6720 00:57:16.853363 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-4096 RESULT=pass
6722 00:57:16.872468 <6>[ 11.416020] Console: switching to colour dummy device 80x25
6723 00:57:16.879194 <14>[ 11.421963] [IGT] panfrost_gem_new: executing
6724 00:57:16.885746 IGT-Version: 1.2<14>[ 11.427165] [IGT] panfrost_gem_new: starting subtest gem-new-0
6725 00:57:16.895853 8-ga44ebfe (aarc<14>[ 11.434591] [IGT] panfrost_gem_new: finished subtest gem-new-0, SUCCESS
6726 00:57:16.902634 h64) (Linux: 6.1<14>[ 11.443290] [IGT] panfrost_gem_new: exiting, ret=0
6727 00:57:16.903029 .92-cip22 aarch64)
6728 00:57:16.905567 Using IGT_SRANDOM=1718499436 for randomisation
6729 00:57:16.909100 Opened device: /dev/dri/card0
6730 00:57:16.912507 Starting subtest: gem-new-0
6731 00:57:16.915726 [1mSubtest gem-new-0: SUCCESS (0.000s)[0m
6732 00:57:16.952104 <6>[ 11.478625] Console: switching to colour frame buffer device 170x48
6733 00:57:16.965951 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-0 RESULT=pass
6735 00:57:16.968740 <8>[ 11.508658] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-0 RESULT=pass>
6736 00:57:16.989320 <6>[ 11.532871] Console: switching to colour dummy device 80x25
6737 00:57:16.996111 <14>[ 11.539313] [IGT] panfrost_gem_new: executing
6738 00:57:17.002745 IGT-Version: 1.2<14>[ 11.544606] [IGT] panfrost_gem_new: starting subtest gem-new-zeroed
6739 00:57:17.012395 8-ga44ebfe (aarc<14>[ 11.553790] [IGT] panfrost_gem_new: finished subtest gem-new-zeroed, SUCCESS
6740 00:57:17.019623 h64) (Linux: 6.1<14>[ 11.561539] [IGT] panfrost_gem_new: exiting, ret=0
6741 00:57:17.022630 .92-cip22 aarch64)
6742 00:57:17.025818 Using IGT_SRANDOM=1718499436 for randomisation
6743 00:57:17.029106 Opened device: /dev/dri/card0
6744 00:57:17.032700 Starting subtest: gem-new-zeroed
6745 00:57:17.036047 [1mSubtest gem-new-zeroed: SUCCESS (0.001s)[0m
6746 00:57:17.068603 <6>[ 11.595280] Console: switching to colour frame buffer device 170x48
6747 00:57:17.087129 <8>[ 11.627133] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-zeroed RESULT=pass>
6748 00:57:17.087767 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-zeroed RESULT=pass
6750 00:57:17.093372 <8>[ 11.636746] <LAVA_SIGNAL_TESTSET STOP>
6751 00:57:17.094077 Received signal: <TESTSET> STOP
6752 00:57:17.094405 Closing test_set panfrost_gem_new
6753 00:57:17.129485 <8>[ 11.672816] <LAVA_SIGNAL_TESTSET START panfrost_get_param>
6754 00:57:17.130078 Received signal: <TESTSET> START panfrost_get_param
6755 00:57:17.130408 Starting test_set panfrost_get_param
6756 00:57:17.163568 <6>[ 11.706891] Console: switching to colour dummy device 80x25
6757 00:57:17.169950 <14>[ 11.712887] [IGT] panfrost_get_param: executing
6758 00:57:17.177043 IGT-Version: 1.2<14>[ 11.718798] [IGT] panfrost_get_param: starting subtest base-params
6759 00:57:17.186756 8-ga44ebfe (aarc<14>[ 11.726309] [IGT] panfrost_get_param: finished subtest base-params, SUCCESS
6760 00:57:17.193105 h64) (Linux: 6.1<14>[ 11.735061] [IGT] panfrost_get_param: exiting, ret=0
6761 00:57:17.193574 .92-cip22 aarch64)
6762 00:57:17.199909 Using IGT_SRANDOM=1718499437 for randomisation
6763 00:57:17.200323 Opened device: /dev/dri/card0
6764 00:57:17.203218 Starting subtest: base-params
6765 00:57:17.209865 [1mSubtest base-params: SUCCESS (0.000s)[0m
6766 00:57:17.235022 <6>[ 11.761480] Console: switching to colour frame buffer device 170x48
6767 00:57:17.253411 <8>[ 11.793458] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=base-params RESULT=pass>
6768 00:57:17.254157 Received signal: <TESTCASE> TEST_CASE_ID=base-params RESULT=pass
6770 00:57:17.275171 <6>[ 11.818463] Console: switching to colour dummy device 80x25
6771 00:57:17.282197 <14>[ 11.824592] [IGT] panfrost_get_param: executing
6772 00:57:17.288496 IGT-Version: 1.2<14>[ 11.829819] [IGT] panfrost_get_param: starting subtest get-bad-param
6773 00:57:17.298302 <14>[ 11.837736] [IGT] panfrost_get_param: finished subtest get-bad-param, SUCCESS
6774 00:57:17.304939 8-ga44ebfe (aarc<14>[ 11.845571] [IGT] panfrost_get_param: exiting, ret=0
6775 00:57:17.308601 h64) (Linux: 6.1.92-cip22 aarch64)
6776 00:57:17.311912 Using IGT_SRANDOM=1718499437 for randomisation
6777 00:57:17.314837 Opened device: /dev/dri/card0
6778 00:57:17.317978 Starting subtest: get-bad-param
6779 00:57:17.321703 [1mSubtest get-bad-param: SUCCESS (0.000s)[0m
6780 00:57:17.350527 <6>[ 11.877530] Console: switching to colour frame buffer device 170x48
6781 00:57:17.369534 <8>[ 11.909550] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-param RESULT=pass>
6782 00:57:17.370170 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-param RESULT=pass
6784 00:57:17.391791 <6>[ 11.934993] Console: switching to colour dummy device 80x25
6785 00:57:17.398202 <14>[ 11.941155] [IGT] panfrost_get_param: executing
6786 00:57:17.405259 IGT-Version: 1.2<14>[ 11.946380] [IGT] panfrost_get_param: starting subtest get-bad-padding
6787 00:57:17.415279 <14>[ 11.954466] [IGT] panfrost_get_param: finished subtest get-bad-padding, SUCCESS
6788 00:57:17.421495 8-ga44ebfe (aarc<14>[ 11.962477] [IGT] panfrost_get_param: exiting, ret=0
6789 00:57:17.424669 h64) (Linux: 6.1.92-cip22 aarch64)
6790 00:57:17.428368 Using IGT_SRANDOM=1718499437 for randomisation
6791 00:57:17.431375 Opened device: /dev/dri/card0
6792 00:57:17.434741 Starting subtest: get-bad-padding
6793 00:57:17.437828 [1mSubtest get-bad-padding: SUCCESS (0.000s)[0m
6794 00:57:17.467180 <6>[ 11.994091] Console: switching to colour frame buffer device 170x48
6795 00:57:17.486427 <8>[ 12.026324] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-padding RESULT=pass>
6796 00:57:17.487068 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-padding RESULT=pass
6798 00:57:17.492980 <8>[ 12.036399] <LAVA_SIGNAL_TESTSET STOP>
6799 00:57:17.493645 Received signal: <TESTSET> STOP
6800 00:57:17.494022 Closing test_set panfrost_get_param
6801 00:57:17.531823 <8>[ 12.075386] <LAVA_SIGNAL_TESTSET START panfrost_prime>
6802 00:57:17.532514 Received signal: <TESTSET> START panfrost_prime
6803 00:57:17.532840 Starting test_set panfrost_prime
6804 00:57:17.565470 <6>[ 12.108818] Console: switching to colour dummy device 80x25
6805 00:57:17.572347 <14>[ 12.114934] [IGT] panfrost_prime: executing
6806 00:57:17.578661 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.92-cip22 aarch64)
6807 00:57:17.582154 Using IGT_SRANDOM=1718499437 for randomisation
6808 00:57:17.584991 Opened device: /dev/dri/card0
6809 00:57:17.598907 <14>[ 12.142000] [IGT] panfrost_prime: starting subtest gem-prime-import
6810 00:57:17.602140 Starting subtest: gem-prime-import
6811 00:57:17.618273 (panfrost_prime:358) CRITICAL: Test assertion failure function igt_has_dumb, file ../tests/panfrost_prime.c:<14>[ 12.160020] [IGT] panfrost_prime: finished subtest gem-prime-import, FAIL
6812 00:57:17.621809 44:
6813 00:57:17.625481 (panfrost_p<14>[ 12.168901] [IGT] panfrost_prime: exiting, ret=98
6814 00:57:17.635037 rime:358) CRITICAL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP
6815 00:57:17.641877 (panfrost_prime:358) CRITICAL: Last errno: 9, Bad file descriptor
6816 00:57:17.642315 Stack trace:
6817 00:57:17.645645 #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6818 00:57:17.648888 #1 [<unknown>+0xcb761358]
6819 00:57:17.651836 #2 [<unknown>+0xcb760f2c]
6820 00:57:17.655282 #3 [__libc_init_first+0x80]
6821 00:57:17.655675 #4 [__libc_start_main+0x98]
6822 00:57:17.658558 #5 [<unknown>+0xcb760f70]
6823 00:57:17.662181 Subtest gem-prime-import failed.
6824 00:57:17.665037 **** DEBUG ****
6825 00:57:17.675722 (panfrost_prime:358) CRITICAL: Test assertion failure function igt_has_dumb, file ../tests/panfrost_prime.c:44:
6826 00:57:17.682030 (panfrost_prime:358) CRITICAL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP
6827 00:57:17.688574 (panfr<6>[ 12.213482] Console: switching to colour frame buffer device 170x48
6828 00:57:17.695387 ost_prime:358) CRITICAL: Last errno: 9, Bad file descriptor
6829 00:57:17.698547 (panfrost_prime:358) igt_core-INFO: Stack trace:
6830 00:57:17.705096 Received signal: <TESTCASE> TEST_CASE_ID=gem-prime-import RESULT=fail
6832 00:57:17.708738 (<8>[ 12.246721] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-prime-import RESULT=fail>
6833 00:57:17.714939 panfrost_prime:358) igt_core-INFO: #0 ../lib/i<8>[ 12.258003] <LAVA_SIGNAL_TESTSET STOP>
6834 00:57:17.715666 Received signal: <TESTSET> STOP
6835 00:57:17.715993 Closing test_set panfrost_prime
6836 00:57:17.718202 gt_core.c:1989 __igt_fail_assert()
6837 00:57:17.725042 (panfrost_prime:358) igt_core-INFO: #1 [<unknown>+0xcb761358]
6838 00:57:17.728132 (panfrost_prime:358) igt_core-INFO: #2 [<unknown>+0xcb760f2c]
6839 00:57:17.734810 (panfrost_prime:358) igt_core-INFO: #3 [__libc_init_first+0x80]
6840 00:57:17.741506 (panfrost_prime:358) igt_core-INFO: #4 [__libc_start_main+0x98]
6841 00:57:17.748169 (panfrost_prime:358) igt_core-INFO: #5 [<unknown>+0xcb760f70]
6842 00:57:17.748650 **** END ****
6843 00:57:17.754774 [1mSubtest gem-pr<8>[ 12.298157] <LAVA_SIGNAL_TESTSET START panfrost_submit>
6844 00:57:17.755421 Received signal: <TESTSET> START panfrost_submit
6845 00:57:17.755748 Starting test_set panfrost_submit
6846 00:57:17.758175 ime-import: FAIL (0.011s)[0m
6847 00:57:17.768093 (panfrost_prime:358) drmtest-WARNING: Don't attempt to close standard/invalid file descriptor: -1
6848 00:57:17.779456 <6>[ 12.322962] Console: switching to colour dummy device 80x25
6849 00:57:17.786816 <14>[ 12.329371] [IGT] panfrost_submit: executing
6850 00:57:17.793205 IGT-Version: 1.2<14>[ 12.334528] [IGT] panfrost_submit: starting subtest pan-submit
6851 00:57:17.802683 8-ga44ebfe (aarc<14>[ 12.342835] [IGT] panfrost_submit: finished subtest pan-submit, SUCCESS
6852 00:57:17.809814 h64) (Linux: 6.1<14>[ 12.350421] [IGT] panfrost_submit: exiting, ret=0
6853 00:57:17.810249 .92-cip22 aarch64)
6854 00:57:17.816113 Using IGT_SRANDOM=1718499437 for randomisation
6855 00:57:17.816506 Opened device: /dev/dri/card0
6856 00:57:17.819489 Starting subtest: pan-submit
6857 00:57:17.822825 [1mSubtest pan-submit: SUCCESS (0.001s)[0m
6858 00:57:17.850058 <6>[ 12.376719] Console: switching to colour frame buffer device 170x48
6859 00:57:17.865195 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit RESULT=pass
6861 00:57:17.868556 <8>[ 12.408488] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit RESULT=pass>
6862 00:57:17.903402 <6>[ 12.446189] Console: switching to colour dummy device 80x25
6863 00:57:17.909665 <14>[ 12.452390] [IGT] panfrost_submit: executing
6864 00:57:17.915906 IGT-Version: 1.2<14>[ 12.457813] [IGT] panfrost_submit: starting subtest pan-submit-error-no-jc
6865 00:57:17.926289 8-ga44ebfe (aarc<14>[ 12.465805] [IGT] panfrost_submit: finished subtest pan-submit-error-no-jc, SUCCESS
6866 00:57:17.932785 h64) (Linux: 6.1<14>[ 12.475570] [IGT] panfrost_submit: exiting, ret=0
6867 00:57:17.936002 .92-cip22 aarch64)
6868 00:57:17.939346 Using IGT_SRANDOM=1718499437 for randomisation
6869 00:57:17.942521 Opened device: /dev/dri/card0
6870 00:57:17.945742 Starting subtest: pan-submit-error-no-jc
6871 00:57:17.949115 [1mSubtest pan-submit-error-no-jc: SUCCESS (0.000s)[0m
6872 00:57:17.982747 <6>[ 12.509238] Console: switching to colour frame buffer device 170x48
6873 00:57:18.001391 <8>[ 12.541189] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass>
6874 00:57:18.002121 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass
6876 00:57:18.022700 <6>[ 12.566283] Console: switching to colour dummy device 80x25
6877 00:57:18.029719 <14>[ 12.572225] [IGT] panfrost_submit: executing
6878 00:57:18.036176 IGT-Version: 1.2<14>[ 12.577162] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-in-syncs
6879 00:57:18.049629 8-ga44ebfe (aarc<14>[ 12.586546] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-in-syncs, SUCCESS
6880 00:57:18.052884 h64) (Linux: 6.1<14>[ 12.596643] [IGT] panfrost_submit: exiting, ret=0
6881 00:57:18.056712 .92-cip22 aarch64)
6882 00:57:18.059437 Using IGT_SRANDOM=1718499438 for randomisation
6883 00:57:18.062993 Opened device: /dev/dri/card0
6884 00:57:18.066044 Starting subtest: pan-submit-error-bad-in-syncs
6885 00:57:18.073062 [1mSubtest pan-submit-error-bad-in-syncs: SUCCESS (0.000s)[0m
6886 00:57:18.098644 <6>[ 12.625634] Console: switching to colour frame buffer device 170x48
6887 00:57:18.117436 <8>[ 12.657183] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass>
6888 00:57:18.118179 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass
6890 00:57:18.141036 <6>[ 12.684044] Console: switching to colour dummy device 80x25
6891 00:57:18.147546 <14>[ 12.690506] [IGT] panfrost_submit: executing
6892 00:57:18.157108 IGT-Version: 1.2<14>[ 12.695685] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-bo-handles
6893 00:57:18.167443 8-ga44ebfe (aarc<14>[ 12.705352] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-bo-handles, SUCCESS
6894 00:57:18.174219 h64) (Linux: 6.1<14>[ 12.715841] [IGT] panfrost_submit: exiting, ret=0
6895 00:57:18.174612 .92-cip22 aarch64)
6896 00:57:18.180600 Using IGT_SRANDOM=1718499438 for randomisation
6897 00:57:18.181146 Opened device: /dev/dri/card0
6898 00:57:18.187248 Starting subtest: pan-submit-error-bad-bo-handles
6899 00:57:18.194225 [1mSubtest pan-submit-error-bad-bo-handles: SUCCESS (0.000s)[0m
6900 00:57:18.215635 <6>[ 12.742026] Console: switching to colour frame buffer device 170x48
6901 00:57:18.233677 <8>[ 12.774025] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass>
6902 00:57:18.234431 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass
6904 00:57:18.258287 <6>[ 12.801539] Console: switching to colour dummy device 80x25
6905 00:57:18.264876 <14>[ 12.807828] [IGT] panfrost_submit: executing
6906 00:57:18.274776 IGT-Version: 1.2<14>[ 12.813000] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-requirements
6907 00:57:18.284753 8-ga44ebfe (aarc<14>[ 12.822817] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-requirements, SUCCESS
6908 00:57:18.291320 h64) (Linux: 6.1<14>[ 12.833308] [IGT] panfrost_submit: exiting, ret=0
6909 00:57:18.291785 .92-cip22 aarch64)
6910 00:57:18.298218 Using IGT_SRANDOM=1718499438 for randomisation
6911 00:57:18.301171 Opened device: /dev/dri/card0
6912 00:57:18.304476 Starting subtest: pan-submit-error-bad-requirements
6913 00:57:18.311132 [1mSubtest pan-submit-error-bad-requirements: SUCCESS (0.000s)[0m
6914 00:57:18.350789 <6>[ 12.875108] Console: switching to colour frame buffer device 170x48
6915 00:57:18.367636 <8>[ 12.907608] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass>
6916 00:57:18.368302 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass
6918 00:57:18.389500 <6>[ 12.933124] Console: switching to colour dummy device 80x25
6919 00:57:18.396629 <14>[ 12.939055] [IGT] panfrost_submit: executing
6920 00:57:18.406449 IGT-Version: 1.2<14>[ 12.944190] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-out-sync
6921 00:57:18.416117 8-ga44ebfe (aarc<14>[ 12.953468] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-out-sync, SUCCESS
6922 00:57:18.422935 h64) (Linux: 6.1<14>[ 12.963675] [IGT] panfrost_submit: exiting, ret=0
6923 00:57:18.423329 .92-cip22 aarch64)
6924 00:57:18.426326 Using IGT_SRANDOM=1718499438 for randomisation
6925 00:57:18.429385 Opened device: /dev/dri/card0
6926 00:57:18.437331 Starting subtest: pan-submit-error-bad-out-sync
6927 00:57:18.440005 [1mSubtest pan-submit-error-bad-out-sync: SUCCESS (0.000s)[0m
6928 00:57:18.465045 <6>[ 12.991200] Console: switching to colour frame buffer device 170x48
6929 00:57:18.482260 <8>[ 13.022400] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass>
6930 00:57:18.482901 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass
6932 00:57:18.506397 <6>[ 13.049297] Console: switching to colour dummy device 80x25
6933 00:57:18.512608 <14>[ 13.055702] [IGT] panfrost_submit: executing
6934 00:57:18.519657 IGT-Version: 1.2<14>[ 13.060883] [IGT] panfrost_submit: starting subtest pan-reset
6935 00:57:18.525737 8-ga44ebfe (aarch64) (Linux: 6.1.92-cip22 aarch64)
6936 00:57:18.529063 Using IGT_SRANDOM=1718499438 for randomisation
6937 00:57:18.532474 Opened device: /dev/dri/card0
6938 00:57:18.532869 Starting subtest: pan-reset
6939 00:57:19.039394 <3>[ 13.573138] panfrost 13040000.gpu: gpu sched timeout, js=1, config=0x7300, status=0x8, head=0x2000000, tail=0x2000040, sched_job=00000000c1197448
6940 00:57:19.050796 [1mSubtest pan-<14>[ 13.591190] [IGT] panfrost_submit: finished subtest pan-reset, SUCCESS
6941 00:57:19.057886 reset: SUCCESS (<14>[ 13.599593] [IGT] panfrost_submit: exiting, ret=0
6942 00:57:19.058313 0.523s)[0m
6943 00:57:19.118619 <6>[ 13.644504] Console: switching to colour frame buffer device 170x48
6944 00:57:19.134867 Received signal: <TESTCASE> TEST_CASE_ID=pan-reset RESULT=pass
6946 00:57:19.137504 <8>[ 13.677648] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-reset RESULT=pass>
6947 00:57:19.159110 <6>[ 13.702252] Console: switching to colour dummy device 80x25
6948 00:57:19.165624 <14>[ 13.708309] [IGT] panfrost_submit: executing
6949 00:57:19.172041 IGT-Version: 1.2<14>[ 13.713392] [IGT] panfrost_submit: starting subtest pan-submit-and-close
6950 00:57:19.182128 8-ga44ebfe (aarc<14>[ 13.722058] [IGT] panfrost_submit: finished subtest pan-submit-and-close, SUCCESS
6951 00:57:19.188467 h64) (Linux: 6.1<14>[ 13.730933] [IGT] panfrost_submit: exiting, ret=0
6952 00:57:19.192281 .92-cip22 aarch64)
6953 00:57:19.195619 Using IGT_SRANDOM=1718499439 for randomisation
6954 00:57:19.198761 Opened device: /dev/dri/card0
6955 00:57:19.202290 Starting subtest: pan-submit-and-close
6956 00:57:19.205452 [1mSubtest pan-submit-and-close: SUCCESS (0.000s)[0m
6957 00:57:19.245928 <6>[ 13.772422] Console: switching to colour frame buffer device 170x48
6958 00:57:19.264753 <8>[ 13.804499] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-and-close RESULT=pass>
6959 00:57:19.265393 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-and-close RESULT=pass
6961 00:57:19.288596 <6>[ 13.831358] Console: switching to colour dummy device 80x25
6962 00:57:19.294527 <14>[ 13.837615] [IGT] panfrost_submit: executing
6963 00:57:19.301488 IGT-Version: 1.2<14>[ 13.842780] [IGT] panfrost_submit: starting subtest pan-unhandled-pagefault
6964 00:57:19.311143 8-ga44ebfe (aarc<3>[ 13.851954] panfrost 13040000.gpu: Unhandled Page fault in AS0 at VA 0x0000DEADBEEF0000
6965 00:57:19.314727 <3>[ 13.851954] Reason: TODO
6966 00:57:19.317762 <3>[ 13.851954] raw fault status: 0x7C1003C0
6967 00:57:19.324595 <3>[ 13.851954] decoded fault status: SLAVE FAULT
6968 00:57:19.327555 <3>[ 13.851954] exception type 0xC0: TRANSLATION_FAULT_0
6969 00:57:19.334558 <3>[ 13.851954] access type 0x3: WRITE
6970 00:57:19.334954 <3>[ 13.851954] source id 0x7C10
6971 00:57:19.347789 h64) (Linux: 6.1<3>[ 13.884585] panfrost 13040000.gpu: js fault, js=1, status=JOB_BUS_FAULT, head=0x2000000, tail=0x2000000
6972 00:57:19.357759 .92-cip22 aarch6<14>[ 13.896218] [IGT] panfrost_submit: finished subtest pan-unhandled-pagefault, SUCCESS
6973 00:57:19.358197 4)
6974 00:57:19.364256 Using IGT_SR<14>[ 13.905324] [IGT] panfrost_submit: exiting, ret=0
6975 00:57:19.367690 ANDOM=1718499439 for randomisation
6976 00:57:19.368081 Opened device: /dev/dri/card0
6977 00:57:19.374391 Starting subtest: pan-unhandled-pagefault
6978 00:57:19.377676 [1mSubtest pan-unhandled-pagefault: SUCCESS (0.045s)[0m
6979 00:57:19.415791 <6>[ 13.942073] Console: switching to colour frame buffer device 170x48
6980 00:57:19.435257 <8>[ 13.975255] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-unhandled-pagefault RESULT=pass>
6981 00:57:19.435980 Received signal: <TESTCASE> TEST_CASE_ID=pan-unhandled-pagefault RESULT=pass
6983 00:57:19.442721 <8>[ 13.986052] <LAVA_SIGNAL_TESTSET STOP>
6984 00:57:19.443403 Received signal: <TESTSET> STOP
6985 00:57:19.443760 Closing test_set panfrost_submit
6986 00:57:19.449400 + <8>[ 13.991392] <LAVA_SIGNAL_ENDRUN 0_igt-gpu-panfrost 14368567_1.5.2.3.1>
6987 00:57:19.449803 set +x
6988 00:57:19.450391 Received signal: <ENDRUN> 0_igt-gpu-panfrost 14368567_1.5.2.3.1
6989 00:57:19.450754 Ending use of test pattern.
6990 00:57:19.451036 Ending test lava.0_igt-gpu-panfrost (14368567_1.5.2.3.1), duration 2.74
6992 00:57:19.453091 <LAVA_TEST_RUNNER EXIT>
6993 00:57:19.453705 ok: lava_test_shell seems to have completed
6994 00:57:19.455207 base-params:
result: pass
set: panfrost_get_param
gem-new-0:
result: pass
set: panfrost_gem_new
gem-new-4096:
result: pass
set: panfrost_gem_new
gem-new-zeroed:
result: pass
set: panfrost_gem_new
gem-prime-import:
result: fail
set: panfrost_prime
get-bad-padding:
result: pass
set: panfrost_get_param
get-bad-param:
result: pass
set: panfrost_get_param
pan-reset:
result: pass
set: panfrost_submit
pan-submit:
result: pass
set: panfrost_submit
pan-submit-and-close:
result: pass
set: panfrost_submit
pan-submit-error-bad-bo-handles:
result: pass
set: panfrost_submit
pan-submit-error-bad-in-syncs:
result: pass
set: panfrost_submit
pan-submit-error-bad-out-sync:
result: pass
set: panfrost_submit
pan-submit-error-bad-requirements:
result: pass
set: panfrost_submit
pan-submit-error-no-jc:
result: pass
set: panfrost_submit
pan-unhandled-pagefault:
result: pass
set: panfrost_submit
6995 00:57:19.455677 end: 3.1 lava-test-shell (duration 00:00:03) [common]
6996 00:57:19.456080 end: 3 lava-test-retry (duration 00:00:03) [common]
6997 00:57:19.456492 start: 4 finalize (timeout 00:08:04) [common]
6998 00:57:19.456910 start: 4.1 power-off (timeout 00:00:30) [common]
6999 00:57:19.457631 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-1', '--port=1', '--command=off']
7000 00:57:20.582801 >> Command sent successfully.
7001 00:57:20.596470 Returned 0 in 1 seconds
7002 00:57:20.697701 end: 4.1 power-off (duration 00:00:01) [common]
7004 00:57:20.699061 start: 4.2 read-feedback (timeout 00:08:02) [common]
7005 00:57:20.700130 Listened to connection for namespace 'common' for up to 1s
7006 00:57:21.700839 Finalising connection for namespace 'common'
7007 00:57:21.701425 Disconnecting from shell: Finalise
7008 00:57:21.701803 / #
7009 00:57:21.802650 end: 4.2 read-feedback (duration 00:00:01) [common]
7010 00:57:21.803243 end: 4 finalize (duration 00:00:02) [common]
7011 00:57:21.803803 Cleaning after the job
7012 00:57:21.804296 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368567/tftp-deploy-xywynvkf/ramdisk
7013 00:57:21.813961 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368567/tftp-deploy-xywynvkf/kernel
7014 00:57:21.828901 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368567/tftp-deploy-xywynvkf/dtb
7015 00:57:21.829101 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14368567/tftp-deploy-xywynvkf/modules
7016 00:57:21.835119 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14368567
7017 00:57:21.939688 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14368567
7018 00:57:21.939846 Job finished correctly