Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 35
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 86
1 16:28:43.011662 lava-dispatcher, installed at version: 2024.03
2 16:28:43.011887 start: 0 validate
3 16:28:43.012003 Start time: 2024-06-17 16:28:43.011996+00:00 (UTC)
4 16:28:43.012135 Using caching service: 'http://localhost/cache/?uri=%s'
5 16:28:43.012274 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 16:28:43.280231 Using caching service: 'http://localhost/cache/?uri=%s'
7 16:28:43.280933 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-32-g0d904242fc145%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 16:29:12.288970 Using caching service: 'http://localhost/cache/?uri=%s'
9 16:29:12.289191 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-32-g0d904242fc145%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 16:29:12.545871 Using caching service: 'http://localhost/cache/?uri=%s'
11 16:29:12.546054 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-32-g0d904242fc145%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 16:29:14.803656 validate duration: 31.79
14 16:29:14.803990 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 16:29:14.804126 start: 1.1 download-retry (timeout 00:10:00) [common]
16 16:29:14.804242 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 16:29:14.804414 Not decompressing ramdisk as can be used compressed.
18 16:29:14.804535 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 16:29:14.804627 saving as /var/lib/lava/dispatcher/tmp/14396126/tftp-deploy-j1tboocy/ramdisk/rootfs.cpio.gz
20 16:29:14.804722 total size: 8181887 (7 MB)
21 16:29:15.060408 progress 0 % (0 MB)
22 16:29:15.062720 progress 5 % (0 MB)
23 16:29:15.064831 progress 10 % (0 MB)
24 16:29:15.067183 progress 15 % (1 MB)
25 16:29:15.069182 progress 20 % (1 MB)
26 16:29:15.071464 progress 25 % (1 MB)
27 16:29:15.073509 progress 30 % (2 MB)
28 16:29:15.075712 progress 35 % (2 MB)
29 16:29:15.077790 progress 40 % (3 MB)
30 16:29:15.080123 progress 45 % (3 MB)
31 16:29:15.082303 progress 50 % (3 MB)
32 16:29:15.084547 progress 55 % (4 MB)
33 16:29:15.086650 progress 60 % (4 MB)
34 16:29:15.088793 progress 65 % (5 MB)
35 16:29:15.091026 progress 70 % (5 MB)
36 16:29:15.093180 progress 75 % (5 MB)
37 16:29:15.095197 progress 80 % (6 MB)
38 16:29:15.097387 progress 85 % (6 MB)
39 16:29:15.099463 progress 90 % (7 MB)
40 16:29:15.101689 progress 95 % (7 MB)
41 16:29:15.103669 progress 100 % (7 MB)
42 16:29:15.103877 7 MB downloaded in 0.30 s (26.08 MB/s)
43 16:29:15.104108 end: 1.1.1 http-download (duration 00:00:00) [common]
45 16:29:15.104350 end: 1.1 download-retry (duration 00:00:00) [common]
46 16:29:15.104430 start: 1.2 download-retry (timeout 00:10:00) [common]
47 16:29:15.104506 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 16:29:15.104621 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 16:29:15.104684 saving as /var/lib/lava/dispatcher/tmp/14396126/tftp-deploy-j1tboocy/kernel/Image
50 16:29:15.104737 total size: 54813184 (52 MB)
51 16:29:15.104791 No compression specified
52 16:29:15.105850 progress 0 % (0 MB)
53 16:29:15.120482 progress 5 % (2 MB)
54 16:29:15.134422 progress 10 % (5 MB)
55 16:29:15.148007 progress 15 % (7 MB)
56 16:29:15.162528 progress 20 % (10 MB)
57 16:29:15.176772 progress 25 % (13 MB)
58 16:29:15.192376 progress 30 % (15 MB)
59 16:29:15.206393 progress 35 % (18 MB)
60 16:29:15.220726 progress 40 % (20 MB)
61 16:29:15.234845 progress 45 % (23 MB)
62 16:29:15.249494 progress 50 % (26 MB)
63 16:29:15.264592 progress 55 % (28 MB)
64 16:29:15.279256 progress 60 % (31 MB)
65 16:29:15.293998 progress 65 % (34 MB)
66 16:29:15.308873 progress 70 % (36 MB)
67 16:29:15.323404 progress 75 % (39 MB)
68 16:29:15.337964 progress 80 % (41 MB)
69 16:29:15.352172 progress 85 % (44 MB)
70 16:29:15.366997 progress 90 % (47 MB)
71 16:29:15.381437 progress 95 % (49 MB)
72 16:29:15.399003 progress 100 % (52 MB)
73 16:29:15.399258 52 MB downloaded in 0.29 s (177.49 MB/s)
74 16:29:15.399417 end: 1.2.1 http-download (duration 00:00:00) [common]
76 16:29:15.399634 end: 1.2 download-retry (duration 00:00:00) [common]
77 16:29:15.399721 start: 1.3 download-retry (timeout 00:09:59) [common]
78 16:29:15.399800 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 16:29:15.399923 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 16:29:15.399989 saving as /var/lib/lava/dispatcher/tmp/14396126/tftp-deploy-j1tboocy/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 16:29:15.400044 total size: 57695 (0 MB)
82 16:29:15.400098 No compression specified
83 16:29:15.401165 progress 56 % (0 MB)
84 16:29:15.401471 progress 100 % (0 MB)
85 16:29:15.401715 0 MB downloaded in 0.00 s (32.99 MB/s)
86 16:29:15.401847 end: 1.3.1 http-download (duration 00:00:00) [common]
88 16:29:15.402117 end: 1.3 download-retry (duration 00:00:00) [common]
89 16:29:15.402199 start: 1.4 download-retry (timeout 00:09:59) [common]
90 16:29:15.402277 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 16:29:15.402398 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 16:29:15.402466 saving as /var/lib/lava/dispatcher/tmp/14396126/tftp-deploy-j1tboocy/modules/modules.tar
93 16:29:15.402522 total size: 8628772 (8 MB)
94 16:29:15.402602 Using unxz to decompress xz
95 16:29:15.404103 progress 0 % (0 MB)
96 16:29:15.425465 progress 5 % (0 MB)
97 16:29:15.449819 progress 10 % (0 MB)
98 16:29:15.475502 progress 15 % (1 MB)
99 16:29:15.506522 progress 20 % (1 MB)
100 16:29:15.532646 progress 25 % (2 MB)
101 16:29:15.557780 progress 30 % (2 MB)
102 16:29:15.584934 progress 35 % (2 MB)
103 16:29:15.615768 progress 40 % (3 MB)
104 16:29:15.651046 progress 45 % (3 MB)
105 16:29:15.682065 progress 50 % (4 MB)
106 16:29:15.707517 progress 55 % (4 MB)
107 16:29:15.733577 progress 60 % (4 MB)
108 16:29:15.761328 progress 65 % (5 MB)
109 16:29:15.788485 progress 70 % (5 MB)
110 16:29:15.814133 progress 75 % (6 MB)
111 16:29:15.839926 progress 80 % (6 MB)
112 16:29:15.869697 progress 85 % (7 MB)
113 16:29:15.897762 progress 90 % (7 MB)
114 16:29:15.924487 progress 95 % (7 MB)
115 16:29:15.951590 progress 100 % (8 MB)
116 16:29:15.957135 8 MB downloaded in 0.55 s (14.84 MB/s)
117 16:29:15.957359 end: 1.4.1 http-download (duration 00:00:01) [common]
119 16:29:15.957747 end: 1.4 download-retry (duration 00:00:01) [common]
120 16:29:15.957867 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 16:29:15.957985 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 16:29:15.958094 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 16:29:15.958213 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 16:29:15.958421 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe
125 16:29:15.958579 makedir: /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin
126 16:29:15.958706 makedir: /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/tests
127 16:29:15.958831 makedir: /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/results
128 16:29:15.958954 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-add-keys
129 16:29:15.959137 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-add-sources
130 16:29:15.959292 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-background-process-start
131 16:29:15.959457 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-background-process-stop
132 16:29:15.959617 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-common-functions
133 16:29:15.959778 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-echo-ipv4
134 16:29:15.959994 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-install-packages
135 16:29:15.960203 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-installed-packages
136 16:29:15.960361 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-os-build
137 16:29:15.960510 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-probe-channel
138 16:29:15.960663 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-probe-ip
139 16:29:15.960810 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-target-ip
140 16:29:15.960956 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-target-mac
141 16:29:15.961099 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-target-storage
142 16:29:15.961249 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-test-case
143 16:29:15.961403 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-test-event
144 16:29:15.961555 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-test-feedback
145 16:29:15.961757 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-test-raise
146 16:29:15.961918 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-test-reference
147 16:29:15.962062 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-test-runner
148 16:29:15.962209 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-test-set
149 16:29:15.962350 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-test-shell
150 16:29:15.962494 Updating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-install-packages (oe)
151 16:29:15.962665 Updating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/bin/lava-installed-packages (oe)
152 16:29:15.962809 Creating /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/environment
153 16:29:15.962922 LAVA metadata
154 16:29:15.963015 - LAVA_JOB_ID=14396126
155 16:29:15.963100 - LAVA_DISPATCHER_IP=192.168.201.1
156 16:29:15.963236 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 16:29:15.963320 skipped lava-vland-overlay
158 16:29:15.963427 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 16:29:15.963528 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 16:29:15.963608 skipped lava-multinode-overlay
161 16:29:15.963703 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 16:29:15.963806 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 16:29:15.963898 Loading test definitions
164 16:29:15.964010 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 16:29:15.964099 Using /lava-14396126 at stage 0
166 16:29:15.964515 uuid=14396126_1.5.2.3.1 testdef=None
167 16:29:15.964621 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 16:29:15.964699 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 16:29:15.965258 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 16:29:15.965622 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 16:29:15.966659 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 16:29:15.966933 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 16:29:15.967664 runner path: /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/0/tests/0_dmesg test_uuid 14396126_1.5.2.3.1
176 16:29:15.967813 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 16:29:15.968133 Creating lava-test-runner.conf files
179 16:29:15.968221 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14396126/lava-overlay-j50vaohe/lava-14396126/0 for stage 0
180 16:29:15.968332 - 0_dmesg
181 16:29:15.968454 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 16:29:15.968560 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 16:29:15.977611 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 16:29:15.977751 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 16:29:15.977865 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 16:29:15.977974 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 16:29:15.978080 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 16:29:16.235890 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
189 16:29:16.236049 start: 1.5.4 extract-modules (timeout 00:09:59) [common]
190 16:29:16.236160 extracting modules file /var/lib/lava/dispatcher/tmp/14396126/tftp-deploy-j1tboocy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14396126/extract-overlay-ramdisk-wzk31io4/ramdisk
191 16:29:16.482292 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 16:29:16.482425 start: 1.5.5 apply-overlay-tftp (timeout 00:09:58) [common]
193 16:29:16.482511 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14396126/compress-overlay-owa1ske1/overlay-1.5.2.4.tar.gz to ramdisk
194 16:29:16.482574 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14396126/compress-overlay-owa1ske1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14396126/extract-overlay-ramdisk-wzk31io4/ramdisk
195 16:29:16.489416 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 16:29:16.489592 start: 1.5.6 configure-preseed-file (timeout 00:09:58) [common]
197 16:29:16.489685 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 16:29:16.489764 start: 1.5.7 compress-ramdisk (timeout 00:09:58) [common]
199 16:29:16.489833 Building ramdisk /var/lib/lava/dispatcher/tmp/14396126/extract-overlay-ramdisk-wzk31io4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14396126/extract-overlay-ramdisk-wzk31io4/ramdisk
200 16:29:16.976876 >> 145247 blocks
201 16:29:19.480079 rename /var/lib/lava/dispatcher/tmp/14396126/extract-overlay-ramdisk-wzk31io4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14396126/tftp-deploy-j1tboocy/ramdisk/ramdisk.cpio.gz
202 16:29:19.480284 end: 1.5.7 compress-ramdisk (duration 00:00:03) [common]
203 16:29:19.480420 start: 1.5.8 prepare-kernel (timeout 00:09:55) [common]
204 16:29:19.480521 start: 1.5.8.1 prepare-fit (timeout 00:09:55) [common]
205 16:29:19.480603 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14396126/tftp-deploy-j1tboocy/kernel/Image']
206 16:29:35.195694 Returned 0 in 15 seconds
207 16:29:35.296272 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14396126/tftp-deploy-j1tboocy/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14396126/tftp-deploy-j1tboocy/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14396126/tftp-deploy-j1tboocy/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14396126/tftp-deploy-j1tboocy/kernel/image.itb
208 16:29:35.892729 output: FIT description: Kernel Image image with one or more FDT blobs
209 16:29:35.892939 output: Created: Mon Jun 17 17:29:35 2024
210 16:29:35.893077 output: Image 0 (kernel-1)
211 16:29:35.893209 output: Description:
212 16:29:35.893340 output: Created: Mon Jun 17 17:29:35 2024
213 16:29:35.893471 output: Type: Kernel Image
214 16:29:35.893610 output: Compression: lzma compressed
215 16:29:35.893740 output: Data Size: 13128753 Bytes = 12821.05 KiB = 12.52 MiB
216 16:29:35.893864 output: Architecture: AArch64
217 16:29:35.893984 output: OS: Linux
218 16:29:35.894105 output: Load Address: 0x00000000
219 16:29:35.894228 output: Entry Point: 0x00000000
220 16:29:35.894347 output: Hash algo: crc32
221 16:29:35.894468 output: Hash value: 106ffd6f
222 16:29:35.894591 output: Image 1 (fdt-1)
223 16:29:35.894715 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 16:29:35.894846 output: Created: Mon Jun 17 17:29:35 2024
225 16:29:35.894976 output: Type: Flat Device Tree
226 16:29:35.895105 output: Compression: uncompressed
227 16:29:35.895230 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 16:29:35.895354 output: Architecture: AArch64
229 16:29:35.895480 output: Hash algo: crc32
230 16:29:35.895607 output: Hash value: a9713552
231 16:29:35.895727 output: Image 2 (ramdisk-1)
232 16:29:35.895845 output: Description: unavailable
233 16:29:35.895962 output: Created: Mon Jun 17 17:29:35 2024
234 16:29:35.896080 output: Type: RAMDisk Image
235 16:29:35.896198 output: Compression: uncompressed
236 16:29:35.896316 output: Data Size: 21374673 Bytes = 20873.70 KiB = 20.38 MiB
237 16:29:35.896434 output: Architecture: AArch64
238 16:29:35.896552 output: OS: Linux
239 16:29:35.896668 output: Load Address: unavailable
240 16:29:35.896782 output: Entry Point: unavailable
241 16:29:35.896902 output: Hash algo: crc32
242 16:29:35.897021 output: Hash value: 62005343
243 16:29:35.897138 output: Default Configuration: 'conf-1'
244 16:29:35.897257 output: Configuration 0 (conf-1)
245 16:29:35.897376 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 16:29:35.897494 output: Kernel: kernel-1
247 16:29:35.897609 output: Init Ramdisk: ramdisk-1
248 16:29:35.897722 output: FDT: fdt-1
249 16:29:35.897837 output: Loadables: kernel-1
250 16:29:35.897956 output:
251 16:29:35.898220 end: 1.5.8.1 prepare-fit (duration 00:00:16) [common]
252 16:29:35.898388 end: 1.5.8 prepare-kernel (duration 00:00:16) [common]
253 16:29:35.898573 end: 1.5 prepare-tftp-overlay (duration 00:00:20) [common]
254 16:29:35.898739 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:39) [common]
255 16:29:35.898883 No LXC device requested
256 16:29:35.899045 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 16:29:35.899210 start: 1.7 deploy-device-env (timeout 00:09:39) [common]
258 16:29:35.899364 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 16:29:35.899498 Checking files for TFTP limit of 4294967296 bytes.
260 16:29:35.900368 end: 1 tftp-deploy (duration 00:00:21) [common]
261 16:29:35.900558 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 16:29:35.900731 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 16:29:35.900948 substitutions:
264 16:29:35.901079 - {DTB}: 14396126/tftp-deploy-j1tboocy/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 16:29:35.901213 - {INITRD}: 14396126/tftp-deploy-j1tboocy/ramdisk/ramdisk.cpio.gz
266 16:29:35.901339 - {KERNEL}: 14396126/tftp-deploy-j1tboocy/kernel/Image
267 16:29:35.901463 - {LAVA_MAC}: None
268 16:29:35.901593 - {PRESEED_CONFIG}: None
269 16:29:35.901715 - {PRESEED_LOCAL}: None
270 16:29:35.901837 - {RAMDISK}: 14396126/tftp-deploy-j1tboocy/ramdisk/ramdisk.cpio.gz
271 16:29:35.901972 - {ROOT_PART}: None
272 16:29:35.902101 - {ROOT}: None
273 16:29:35.902223 - {SERVER_IP}: 192.168.201.1
274 16:29:35.902345 - {TEE}: None
275 16:29:35.902471 Parsed boot commands:
276 16:29:35.902589 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 16:29:35.902857 Parsed boot commands: tftpboot 192.168.201.1 14396126/tftp-deploy-j1tboocy/kernel/image.itb 14396126/tftp-deploy-j1tboocy/kernel/cmdline
278 16:29:35.903025 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 16:29:35.903187 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 16:29:35.903360 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 16:29:35.903525 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 16:29:35.903667 Not connected, no need to disconnect.
283 16:29:35.903819 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 16:29:35.903976 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 16:29:35.904113 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-4'
286 16:29:35.908246 Setting prompt string to ['lava-test: # ']
287 16:29:35.908587 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 16:29:35.908691 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 16:29:35.908787 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 16:29:35.908871 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 16:29:35.909066 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=reboot']
292 16:29:45.042820 >> Command sent successfully.
293 16:29:45.046139 Returned 0 in 9 seconds
294 16:29:45.146522 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
296 16:29:45.146848 end: 2.2.2 reset-device (duration 00:00:09) [common]
297 16:29:45.146972 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
298 16:29:45.147092 Setting prompt string to 'Starting depthcharge on Juniper...'
299 16:29:45.147157 Changing prompt to 'Starting depthcharge on Juniper...'
300 16:29:45.147249 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
301 16:29:45.147782 [Enter `^Ec?' for help]
302 16:29:46.814131 [DL] 00000000 00000000 010701
303 16:29:46.819331
304 16:29:46.819461
305 16:29:46.819527 F0: 102B 0000
306 16:29:46.819590
307 16:29:46.819647 F3: 1006 0033 [0200]
308 16:29:46.822361
309 16:29:46.822447 F3: 4001 00E0 [0200]
310 16:29:46.822507
311 16:29:46.822564 F3: 0000 0000
312 16:29:46.825502
313 16:29:46.825654 V0: 0000 0000 [0001]
314 16:29:46.825743
315 16:29:46.825829 00: 1027 0002
316 16:29:46.825912
317 16:29:46.828778 01: 0000 0000
318 16:29:46.828877
319 16:29:46.828957 BP: 0C00 0251 [0000]
320 16:29:46.829045
321 16:29:46.832075 G0: 1182 0000
322 16:29:46.832180
323 16:29:46.832260 EC: 0004 0000 [0001]
324 16:29:46.832338
325 16:29:46.835267 S7: 0000 0000 [0000]
326 16:29:46.835364
327 16:29:46.838653 CC: 0000 0000 [0001]
328 16:29:46.838785
329 16:29:46.838871 T0: 0000 00DB [000F]
330 16:29:46.838952
331 16:29:46.839031 Jump to BL
332 16:29:46.839112
333 16:29:46.875077
334 16:29:46.875235
335 16:29:46.881810 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
336 16:29:46.884628 ARM64: Exception handlers installed.
337 16:29:46.888024 ARM64: Testing exception
338 16:29:46.891471 ARM64: Done test exception
339 16:29:46.895072 WDT: Last reset was cold boot
340 16:29:46.898575 SPI0(PAD0) initialized at 992727 Hz
341 16:29:46.902177 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
342 16:29:46.902282 Manufacturer: ef
343 16:29:46.908959 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
344 16:29:46.921985 Probing TPM: . done!
345 16:29:46.922129 TPM ready after 0 ms
346 16:29:46.928263 Connected to device vid:did:rid of 1ae0:0028:00
347 16:29:46.934838 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
348 16:29:46.973979 Initialized TPM device CR50 revision 0
349 16:29:46.986373 tlcl_send_startup: Startup return code is 0
350 16:29:46.986532 TPM: setup succeeded
351 16:29:46.995218 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
352 16:29:46.998690 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
353 16:29:47.002243 in-header: 03 19 00 00 08 00 00 00
354 16:29:47.005047 in-data: a2 e0 47 00 13 00 00 00
355 16:29:47.008531 Chrome EC: UHEPI supported
356 16:29:47.015043 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
357 16:29:47.018311 in-header: 03 a1 00 00 08 00 00 00
358 16:29:47.021574 in-data: 84 60 60 10 00 00 00 00
359 16:29:47.021705 Phase 1
360 16:29:47.025039 FMAP: area GBB found @ 3f5000 (12032 bytes)
361 16:29:47.031335 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
362 16:29:47.038424 VB2:vb2_check_recovery() Recovery was requested manually
363 16:29:47.041932 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
364 16:29:47.048407 Recovery requested (1009000e)
365 16:29:47.056809 tlcl_extend: response is 0
366 16:29:47.062003 tlcl_extend: response is 0
367 16:29:47.087316
368 16:29:47.087455
369 16:29:47.093467 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
370 16:29:47.096967 ARM64: Exception handlers installed.
371 16:29:47.100298 ARM64: Testing exception
372 16:29:47.103654 ARM64: Done test exception
373 16:29:47.118945 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x9a6d, sec=0x203a
374 16:29:47.125242 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
375 16:29:47.128540 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
376 16:29:47.137242 [RTC]rtc_get_frequency_meter,134: input=0xf, output=823
377 16:29:47.144042 [RTC]rtc_get_frequency_meter,134: input=0x7, output=697
378 16:29:47.150948 [RTC]rtc_get_frequency_meter,134: input=0xb, output=760
379 16:29:47.157943 [RTC]rtc_get_frequency_meter,134: input=0xd, output=792
380 16:29:47.164205 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x9a6d
381 16:29:47.167645 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
382 16:29:47.170983 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
383 16:29:47.177501 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
384 16:29:47.180953 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
385 16:29:47.184185 in-header: 03 19 00 00 08 00 00 00
386 16:29:47.187601 in-data: a2 e0 47 00 13 00 00 00
387 16:29:47.187709 Chrome EC: UHEPI supported
388 16:29:47.194060 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
389 16:29:47.197460 in-header: 03 a1 00 00 08 00 00 00
390 16:29:47.200978 in-data: 84 60 60 10 00 00 00 00
391 16:29:47.203885 Skip loading cached calibration data
392 16:29:47.210804 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
393 16:29:47.214104 in-header: 03 a1 00 00 08 00 00 00
394 16:29:47.217454 in-data: 84 60 60 10 00 00 00 00
395 16:29:47.223763 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
396 16:29:47.227253 in-header: 03 a1 00 00 08 00 00 00
397 16:29:47.230695 in-data: 84 60 60 10 00 00 00 00
398 16:29:47.234005 ADC[3]: Raw value=213827 ID=1
399 16:29:47.234103 Manufacturer: ef
400 16:29:47.240171 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
401 16:29:47.243545 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
402 16:29:47.246928 CBFS @ 21000 size 3d4000
403 16:29:47.254011 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
404 16:29:47.256900 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
405 16:29:47.259814 CBFS: Found @ offset 3c700 size 44
406 16:29:47.263143 DRAM-K: Full Calibration
407 16:29:47.266961 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
408 16:29:47.270121 CBFS @ 21000 size 3d4000
409 16:29:47.273737 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
410 16:29:47.276470 CBFS: Locating 'fallback/dram'
411 16:29:47.279809 CBFS: Found @ offset 24b00 size 12268
412 16:29:47.308777 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
413 16:29:47.312562 ddr_geometry: 1, config: 0x0
414 16:29:47.316005 header.status = 0x0
415 16:29:47.318951 header.magic = 0x44524d4b (expected: 0x44524d4b)
416 16:29:47.322280 header.version = 0x5 (expected: 0x5)
417 16:29:47.325635 header.size = 0x8f0 (expected: 0x8f0)
418 16:29:47.325766 header.config = 0x0
419 16:29:47.328973 header.flags = 0x0
420 16:29:47.332409 header.checksum = 0x0
421 16:29:47.338590 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
422 16:29:47.341828 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
423 16:29:47.348740 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
424 16:29:47.348854 ddr_geometry:1
425 16:29:47.351493 [EMI] new MDL number = 1
426 16:29:47.351581 dram_cbt_mode_extern: 0
427 16:29:47.354957 dram_cbt_mode [RK0]: 0, [RK1]: 0
428 16:29:47.361669 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
429 16:29:47.361808
430 16:29:47.361901
431 16:29:47.364720 [Bianco] ETT version 0.0.0.1
432 16:29:47.368228 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
433 16:29:47.368336
434 16:29:47.371628 vSetVcoreByFreq with vcore:762500, freq=1600
435 16:29:47.371714
436 16:29:47.374969 [DramcInit]
437 16:29:47.378103 AutoRefreshCKEOff AutoREF OFF
438 16:29:47.378221 DDRPhyPLLSetting-CKEOFF
439 16:29:47.381494 DDRPhyPLLSetting-CKEON
440 16:29:47.381604
441 16:29:47.381666 Enable WDQS
442 16:29:47.386022 [ModeRegInit_LP4] CH0 RK0
443 16:29:47.389298 Write Rank0 MR13 =0x18
444 16:29:47.389409 Write Rank0 MR12 =0x5d
445 16:29:47.392970 Write Rank0 MR1 =0x56
446 16:29:47.396494 Write Rank0 MR2 =0x1a
447 16:29:47.396585 Write Rank0 MR11 =0x0
448 16:29:47.399224 Write Rank0 MR22 =0x38
449 16:29:47.402542 Write Rank0 MR14 =0x5d
450 16:29:47.402646 Write Rank0 MR3 =0x30
451 16:29:47.406378 Write Rank0 MR13 =0x58
452 16:29:47.406471 Write Rank0 MR12 =0x5d
453 16:29:47.409047 Write Rank0 MR1 =0x56
454 16:29:47.412591 Write Rank0 MR2 =0x2d
455 16:29:47.412686 Write Rank0 MR11 =0x23
456 16:29:47.416113 Write Rank0 MR22 =0x34
457 16:29:47.416200 Write Rank0 MR14 =0x10
458 16:29:47.419020 Write Rank0 MR3 =0x30
459 16:29:47.422611 Write Rank0 MR13 =0xd8
460 16:29:47.422708 [ModeRegInit_LP4] CH0 RK1
461 16:29:47.426020 Write Rank1 MR13 =0x18
462 16:29:47.428971 Write Rank1 MR12 =0x5d
463 16:29:47.429063 Write Rank1 MR1 =0x56
464 16:29:47.432294 Write Rank1 MR2 =0x1a
465 16:29:47.432383 Write Rank1 MR11 =0x0
466 16:29:47.435492 Write Rank1 MR22 =0x38
467 16:29:47.438828 Write Rank1 MR14 =0x5d
468 16:29:47.438922 Write Rank1 MR3 =0x30
469 16:29:47.442360 Write Rank1 MR13 =0x58
470 16:29:47.445758 Write Rank1 MR12 =0x5d
471 16:29:47.445853 Write Rank1 MR1 =0x56
472 16:29:47.448435 Write Rank1 MR2 =0x2d
473 16:29:47.448527 Write Rank1 MR11 =0x23
474 16:29:47.451875 Write Rank1 MR22 =0x34
475 16:29:47.455533 Write Rank1 MR14 =0x10
476 16:29:47.455636 Write Rank1 MR3 =0x30
477 16:29:47.458973 Write Rank1 MR13 =0xd8
478 16:29:47.461836 [ModeRegInit_LP4] CH1 RK0
479 16:29:47.461927 Write Rank0 MR13 =0x18
480 16:29:47.465294 Write Rank0 MR12 =0x5d
481 16:29:47.465408 Write Rank0 MR1 =0x56
482 16:29:47.468885 Write Rank0 MR2 =0x1a
483 16:29:47.471784 Write Rank0 MR11 =0x0
484 16:29:47.471871 Write Rank0 MR22 =0x38
485 16:29:47.475236 Write Rank0 MR14 =0x5d
486 16:29:47.475320 Write Rank0 MR3 =0x30
487 16:29:47.478661 Write Rank0 MR13 =0x58
488 16:29:47.482167 Write Rank0 MR12 =0x5d
489 16:29:47.482259 Write Rank0 MR1 =0x56
490 16:29:47.484760 Write Rank0 MR2 =0x2d
491 16:29:47.488262 Write Rank0 MR11 =0x23
492 16:29:47.488356 Write Rank0 MR22 =0x34
493 16:29:47.491501 Write Rank0 MR14 =0x10
494 16:29:47.491583 Write Rank0 MR3 =0x30
495 16:29:47.494810 Write Rank0 MR13 =0xd8
496 16:29:47.498163 [ModeRegInit_LP4] CH1 RK1
497 16:29:47.498260 Write Rank1 MR13 =0x18
498 16:29:47.501390 Write Rank1 MR12 =0x5d
499 16:29:47.504854 Write Rank1 MR1 =0x56
500 16:29:47.504980 Write Rank1 MR2 =0x1a
501 16:29:47.507889 Write Rank1 MR11 =0x0
502 16:29:47.511132 Write Rank1 MR22 =0x38
503 16:29:47.511246 Write Rank1 MR14 =0x5d
504 16:29:47.514346 Write Rank1 MR3 =0x30
505 16:29:47.514454 Write Rank1 MR13 =0x58
506 16:29:47.517474 Write Rank1 MR12 =0x5d
507 16:29:47.520932 Write Rank1 MR1 =0x56
508 16:29:47.521039 Write Rank1 MR2 =0x2d
509 16:29:47.524510 Write Rank1 MR11 =0x23
510 16:29:47.524625 Write Rank1 MR22 =0x34
511 16:29:47.527406 Write Rank1 MR14 =0x10
512 16:29:47.530933 Write Rank1 MR3 =0x30
513 16:29:47.531025 Write Rank1 MR13 =0xd8
514 16:29:47.534390 match AC timing 3
515 16:29:47.544100 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
516 16:29:47.544248 [MiockJmeterHQA]
517 16:29:47.547574 vSetVcoreByFreq with vcore:762500, freq=1600
518 16:29:47.654492
519 16:29:47.654620 MIOCK jitter meter ch=0
520 16:29:47.654688
521 16:29:47.657286 1T = (102-19) = 83 dly cells
522 16:29:47.664060 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 753/100 ps
523 16:29:47.667347 vSetVcoreByFreq with vcore:725000, freq=1200
524 16:29:47.768019
525 16:29:47.768176 MIOCK jitter meter ch=0
526 16:29:47.768272
527 16:29:47.770797 1T = (97-18) = 79 dly cells
528 16:29:47.777346 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
529 16:29:47.780713 vSetVcoreByFreq with vcore:725000, freq=800
530 16:29:47.881336
531 16:29:47.881498 MIOCK jitter meter ch=0
532 16:29:47.881598
533 16:29:47.884069 1T = (97-18) = 79 dly cells
534 16:29:47.891207 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 791/100 ps
535 16:29:47.893935 vSetVcoreByFreq with vcore:762500, freq=1600
536 16:29:47.897208 vSetVcoreByFreq with vcore:762500, freq=1600
537 16:29:47.897321
538 16:29:47.897413 K DRVP
539 16:29:47.900653 1. OCD DRVP=0 CALOUT=0
540 16:29:47.904142 1. OCD DRVP=1 CALOUT=0
541 16:29:47.904261 1. OCD DRVP=2 CALOUT=0
542 16:29:47.907731 1. OCD DRVP=3 CALOUT=0
543 16:29:47.910584 1. OCD DRVP=4 CALOUT=0
544 16:29:47.910689 1. OCD DRVP=5 CALOUT=0
545 16:29:47.914052 1. OCD DRVP=6 CALOUT=0
546 16:29:47.914155 1. OCD DRVP=7 CALOUT=0
547 16:29:47.917395 1. OCD DRVP=8 CALOUT=1
548 16:29:47.917499
549 16:29:47.920746 1. OCD DRVP calibration OK! DRVP=8
550 16:29:47.920850
551 16:29:47.920948
552 16:29:47.921034
553 16:29:47.921117 K ODTN
554 16:29:47.923916 3. OCD ODTN=0 ,CALOUT=1
555 16:29:47.927129 3. OCD ODTN=1 ,CALOUT=1
556 16:29:47.927236 3. OCD ODTN=2 ,CALOUT=1
557 16:29:47.930275 3. OCD ODTN=3 ,CALOUT=1
558 16:29:47.933452 3. OCD ODTN=4 ,CALOUT=1
559 16:29:47.933578 3. OCD ODTN=5 ,CALOUT=1
560 16:29:47.936754 3. OCD ODTN=6 ,CALOUT=1
561 16:29:47.940588 3. OCD ODTN=7 ,CALOUT=0
562 16:29:47.940695
563 16:29:47.944053 3. OCD ODTN calibration OK! ODTN=7
564 16:29:47.944140
565 16:29:47.946885 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
566 16:29:47.950358 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
567 16:29:47.956912 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
568 16:29:47.957058
569 16:29:47.957153 K DRVP
570 16:29:47.957243 1. OCD DRVP=0 CALOUT=0
571 16:29:47.960118 1. OCD DRVP=1 CALOUT=0
572 16:29:47.963386 1. OCD DRVP=2 CALOUT=0
573 16:29:47.963495 1. OCD DRVP=3 CALOUT=0
574 16:29:47.966667 1. OCD DRVP=4 CALOUT=0
575 16:29:47.970137 1. OCD DRVP=5 CALOUT=0
576 16:29:47.970252 1. OCD DRVP=6 CALOUT=0
577 16:29:47.973569 1. OCD DRVP=7 CALOUT=0
578 16:29:47.973684 1. OCD DRVP=8 CALOUT=0
579 16:29:47.976344 1. OCD DRVP=9 CALOUT=1
580 16:29:47.976451
581 16:29:47.979893 1. OCD DRVP calibration OK! DRVP=9
582 16:29:47.980009
583 16:29:47.980097
584 16:29:47.980179
585 16:29:47.980262 K ODTN
586 16:29:47.983431 3. OCD ODTN=0 ,CALOUT=1
587 16:29:47.986917 3. OCD ODTN=1 ,CALOUT=1
588 16:29:47.987023 3. OCD ODTN=2 ,CALOUT=1
589 16:29:47.989787 3. OCD ODTN=3 ,CALOUT=1
590 16:29:47.993222 3. OCD ODTN=4 ,CALOUT=1
591 16:29:47.993334 3. OCD ODTN=5 ,CALOUT=1
592 16:29:47.996871 3. OCD ODTN=6 ,CALOUT=1
593 16:29:47.999605 3. OCD ODTN=7 ,CALOUT=1
594 16:29:47.999714 3. OCD ODTN=8 ,CALOUT=1
595 16:29:48.002958 3. OCD ODTN=9 ,CALOUT=1
596 16:29:48.006248 3. OCD ODTN=10 ,CALOUT=1
597 16:29:48.006353 3. OCD ODTN=11 ,CALOUT=1
598 16:29:48.009339 3. OCD ODTN=12 ,CALOUT=1
599 16:29:48.012887 3. OCD ODTN=13 ,CALOUT=1
600 16:29:48.013009 3. OCD ODTN=14 ,CALOUT=0
601 16:29:48.013101
602 16:29:48.016316 3. OCD ODTN calibration OK! ODTN=14
603 16:29:48.019165
604 16:29:48.022710 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=14
605 16:29:48.026111 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=14
606 16:29:48.029623 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=14 (After Adjust)
607 16:29:48.029748
608 16:29:48.032285 [DramcInit]
609 16:29:48.035560 AutoRefreshCKEOff AutoREF OFF
610 16:29:48.035666 DDRPhyPLLSetting-CKEOFF
611 16:29:48.038936 DDRPhyPLLSetting-CKEON
612 16:29:48.039036
613 16:29:48.039119 Enable WDQS
614 16:29:48.039201 ==
615 16:29:48.045751 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
616 16:29:48.048936 fsp= 1, odt_onoff= 1, Byte mode= 0
617 16:29:48.049051 ==
618 16:29:48.052112 [Duty_Offset_Calibration]
619 16:29:48.052213
620 16:29:48.052275 ===========================
621 16:29:48.055913 B0:2 B1:2 CA:1
622 16:29:48.076931 ==
623 16:29:48.080018 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
624 16:29:48.083387 fsp= 1, odt_onoff= 1, Byte mode= 0
625 16:29:48.083490 ==
626 16:29:48.086934 [Duty_Offset_Calibration]
627 16:29:48.087022
628 16:29:48.089678 ===========================
629 16:29:48.089762 B0:0 B1:0 CA:0
630 16:29:48.122492 [ModeRegInit_LP4] CH0 RK0
631 16:29:48.125942 Write Rank0 MR13 =0x18
632 16:29:48.126050 Write Rank0 MR12 =0x5d
633 16:29:48.129316 Write Rank0 MR1 =0x56
634 16:29:48.132082 Write Rank0 MR2 =0x1a
635 16:29:48.132177 Write Rank0 MR11 =0x0
636 16:29:48.135492 Write Rank0 MR22 =0x38
637 16:29:48.138978 Write Rank0 MR14 =0x5d
638 16:29:48.139086 Write Rank0 MR3 =0x30
639 16:29:48.142302 Write Rank0 MR13 =0x58
640 16:29:48.142397 Write Rank0 MR12 =0x5d
641 16:29:48.145634 Write Rank0 MR1 =0x56
642 16:29:48.148961 Write Rank0 MR2 =0x2d
643 16:29:48.149059 Write Rank0 MR11 =0x23
644 16:29:48.152370 Write Rank0 MR22 =0x34
645 16:29:48.155090 Write Rank0 MR14 =0x10
646 16:29:48.155185 Write Rank0 MR3 =0x30
647 16:29:48.158571 Write Rank0 MR13 =0xd8
648 16:29:48.158668 [ModeRegInit_LP4] CH0 RK1
649 16:29:48.161891 Write Rank1 MR13 =0x18
650 16:29:48.165140 Write Rank1 MR12 =0x5d
651 16:29:48.165233 Write Rank1 MR1 =0x56
652 16:29:48.168384 Write Rank1 MR2 =0x1a
653 16:29:48.171800 Write Rank1 MR11 =0x0
654 16:29:48.171900 Write Rank1 MR22 =0x38
655 16:29:48.175141 Write Rank1 MR14 =0x5d
656 16:29:48.175229 Write Rank1 MR3 =0x30
657 16:29:48.177966 Write Rank1 MR13 =0x58
658 16:29:48.181462 Write Rank1 MR12 =0x5d
659 16:29:48.181605 Write Rank1 MR1 =0x56
660 16:29:48.184919 Write Rank1 MR2 =0x2d
661 16:29:48.187718 Write Rank1 MR11 =0x23
662 16:29:48.187805 Write Rank1 MR22 =0x34
663 16:29:48.190930 Write Rank1 MR14 =0x10
664 16:29:48.191021 Write Rank1 MR3 =0x30
665 16:29:48.194994 Write Rank1 MR13 =0xd8
666 16:29:48.198062 [ModeRegInit_LP4] CH1 RK0
667 16:29:48.198168 Write Rank0 MR13 =0x18
668 16:29:48.201366 Write Rank0 MR12 =0x5d
669 16:29:48.204193 Write Rank0 MR1 =0x56
670 16:29:48.204295 Write Rank0 MR2 =0x1a
671 16:29:48.207791 Write Rank0 MR11 =0x0
672 16:29:48.207898 Write Rank0 MR22 =0x38
673 16:29:48.211174 Write Rank0 MR14 =0x5d
674 16:29:48.213993 Write Rank0 MR3 =0x30
675 16:29:48.214100 Write Rank0 MR13 =0x58
676 16:29:48.217497 Write Rank0 MR12 =0x5d
677 16:29:48.221290 Write Rank0 MR1 =0x56
678 16:29:48.221404 Write Rank0 MR2 =0x2d
679 16:29:48.224064 Write Rank0 MR11 =0x23
680 16:29:48.224151 Write Rank0 MR22 =0x34
681 16:29:48.227626 Write Rank0 MR14 =0x10
682 16:29:48.231127 Write Rank0 MR3 =0x30
683 16:29:48.231245 Write Rank0 MR13 =0xd8
684 16:29:48.233826 [ModeRegInit_LP4] CH1 RK1
685 16:29:48.237544 Write Rank1 MR13 =0x18
686 16:29:48.237726 Write Rank1 MR12 =0x5d
687 16:29:48.240970 Write Rank1 MR1 =0x56
688 16:29:48.241105 Write Rank1 MR2 =0x1a
689 16:29:48.244005 Write Rank1 MR11 =0x0
690 16:29:48.247293 Write Rank1 MR22 =0x38
691 16:29:48.247402 Write Rank1 MR14 =0x5d
692 16:29:48.250681 Write Rank1 MR3 =0x30
693 16:29:48.250788 Write Rank1 MR13 =0x58
694 16:29:48.254247 Write Rank1 MR12 =0x5d
695 16:29:48.256950 Write Rank1 MR1 =0x56
696 16:29:48.257053 Write Rank1 MR2 =0x2d
697 16:29:48.260546 Write Rank1 MR11 =0x23
698 16:29:48.264164 Write Rank1 MR22 =0x34
699 16:29:48.264292 Write Rank1 MR14 =0x10
700 16:29:48.266877 Write Rank1 MR3 =0x30
701 16:29:48.266980 Write Rank1 MR13 =0xd8
702 16:29:48.270302 match AC timing 3
703 16:29:48.280065 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
704 16:29:48.280226 DramC Write-DBI off
705 16:29:48.283213 DramC Read-DBI off
706 16:29:48.283358 Write Rank0 MR13 =0x59
707 16:29:48.286767 ==
708 16:29:48.290386 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
709 16:29:48.293847 fsp= 1, odt_onoff= 1, Byte mode= 0
710 16:29:48.293967 ==
711 16:29:48.296313 === u2Vref_new: 0x56 --> 0x2d
712 16:29:48.299834 === u2Vref_new: 0x58 --> 0x38
713 16:29:48.303217 === u2Vref_new: 0x5a --> 0x39
714 16:29:48.306552 === u2Vref_new: 0x5c --> 0x3c
715 16:29:48.310060 === u2Vref_new: 0x5e --> 0x3d
716 16:29:48.312930 === u2Vref_new: 0x60 --> 0xa0
717 16:29:48.316196 [CA 0] Center 34 (6~63) winsize 58
718 16:29:48.319844 [CA 1] Center 35 (8~63) winsize 56
719 16:29:48.322703 [CA 2] Center 30 (1~59) winsize 59
720 16:29:48.326235 [CA 3] Center 25 (-3~53) winsize 57
721 16:29:48.329732 [CA 4] Center 26 (-2~54) winsize 57
722 16:29:48.329832 [CA 5] Center 31 (2~60) winsize 59
723 16:29:48.332404
724 16:29:48.336057 [CATrainingPosCal] consider 1 rank data
725 16:29:48.339031 u2DelayCellTimex100 = 753/100 ps
726 16:29:48.342557 CA0 delay=34 (6~63),Diff = 9 PI (11 cell)
727 16:29:48.346005 CA1 delay=35 (8~63),Diff = 10 PI (12 cell)
728 16:29:48.349093 CA2 delay=30 (1~59),Diff = 5 PI (6 cell)
729 16:29:48.352239 CA3 delay=25 (-3~53),Diff = 0 PI (0 cell)
730 16:29:48.355574 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
731 16:29:48.358718 CA5 delay=31 (2~60),Diff = 6 PI (7 cell)
732 16:29:48.358836
733 16:29:48.362359 CA PerBit enable=1, Macro0, CA PI delay=25
734 16:29:48.365438 === u2Vref_new: 0x5e --> 0x3d
735 16:29:48.365569
736 16:29:48.369389 Vref(ca) range 1: 30
737 16:29:48.369512
738 16:29:48.371966 CS Dly= 7 (38-0-32)
739 16:29:48.372068 Write Rank0 MR13 =0xd8
740 16:29:48.375795 Write Rank0 MR13 =0xd8
741 16:29:48.375906 Write Rank0 MR12 =0x5e
742 16:29:48.379165 Write Rank1 MR13 =0x59
743 16:29:48.379273 ==
744 16:29:48.385204 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
745 16:29:48.388561 fsp= 1, odt_onoff= 1, Byte mode= 0
746 16:29:48.388678 ==
747 16:29:48.388775 === u2Vref_new: 0x56 --> 0x2d
748 16:29:48.392515 === u2Vref_new: 0x58 --> 0x38
749 16:29:48.395422 === u2Vref_new: 0x5a --> 0x39
750 16:29:48.398830 === u2Vref_new: 0x5c --> 0x3c
751 16:29:48.402234 === u2Vref_new: 0x5e --> 0x3d
752 16:29:48.405873 === u2Vref_new: 0x60 --> 0xa0
753 16:29:48.409236 [CA 0] Center 35 (8~63) winsize 56
754 16:29:48.411924 [CA 1] Center 35 (7~63) winsize 57
755 16:29:48.415219 [CA 2] Center 31 (2~60) winsize 59
756 16:29:48.418656 [CA 3] Center 26 (-2~54) winsize 57
757 16:29:48.422224 [CA 4] Center 26 (-2~54) winsize 57
758 16:29:48.425749 [CA 5] Center 32 (3~61) winsize 59
759 16:29:48.425840
760 16:29:48.428518 [CATrainingPosCal] consider 2 rank data
761 16:29:48.432159 u2DelayCellTimex100 = 753/100 ps
762 16:29:48.434909 CA0 delay=35 (8~63),Diff = 10 PI (12 cell)
763 16:29:48.438511 CA1 delay=35 (8~63),Diff = 10 PI (12 cell)
764 16:29:48.442111 CA2 delay=30 (2~59),Diff = 5 PI (6 cell)
765 16:29:48.444877 CA3 delay=25 (-2~53),Diff = 0 PI (0 cell)
766 16:29:48.451959 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
767 16:29:48.454921 CA5 delay=31 (3~60),Diff = 6 PI (7 cell)
768 16:29:48.455029
769 16:29:48.458345 CA PerBit enable=1, Macro0, CA PI delay=25
770 16:29:48.461843 === u2Vref_new: 0x5e --> 0x3d
771 16:29:48.461941
772 16:29:48.462004 Vref(ca) range 1: 30
773 16:29:48.462061
774 16:29:48.464666 CS Dly= 7 (38-0-32)
775 16:29:48.468088 Write Rank1 MR13 =0xd8
776 16:29:48.468179 Write Rank1 MR13 =0xd8
777 16:29:48.471357 Write Rank1 MR12 =0x5e
778 16:29:48.474689 [RankSwap] Rank num 2, (Multi 1), Rank 0
779 16:29:48.474788 Write Rank0 MR2 =0xad
780 16:29:48.477952 [Write Leveling]
781 16:29:48.481730 delay byte0 byte1 byte2 byte3
782 16:29:48.481825
783 16:29:48.481928 10 0 0
784 16:29:48.484878 11 0 0
785 16:29:48.484967 12 0 0
786 16:29:48.487920 13 0 0
787 16:29:48.488012 14 0 0
788 16:29:48.488075 15 0 0
789 16:29:48.490912 16 0 0
790 16:29:48.491000 17 0 0
791 16:29:48.494644 18 0 0
792 16:29:48.494738 19 0 0
793 16:29:48.497786 20 0 0
794 16:29:48.497874 21 0 ff
795 16:29:48.497936 22 0 0
796 16:29:48.501062 23 0 ff
797 16:29:48.501174 24 0 ff
798 16:29:48.504524 25 0 ff
799 16:29:48.504614 26 0 ff
800 16:29:48.507471 27 0 ff
801 16:29:48.507556 28 0 ff
802 16:29:48.507618 29 0 ff
803 16:29:48.510958 30 0 ff
804 16:29:48.511057 31 ff ff
805 16:29:48.514375 32 ff ff
806 16:29:48.514489 33 ff ff
807 16:29:48.517639 34 ff ff
808 16:29:48.517715 35 ff ff
809 16:29:48.520882 36 ff ff
810 16:29:48.520955 37 ff ff
811 16:29:48.524093 pass bytecount = 0xff (0xff: all bytes pass)
812 16:29:48.524201
813 16:29:48.527329 DQS0 dly: 31
814 16:29:48.527416 DQS1 dly: 23
815 16:29:48.530994 Write Rank0 MR2 =0x2d
816 16:29:48.534503 [RankSwap] Rank num 2, (Multi 1), Rank 0
817 16:29:48.537298 Write Rank0 MR1 =0xd6
818 16:29:48.537383 [Gating]
819 16:29:48.537444 ==
820 16:29:48.540781 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
821 16:29:48.544268 fsp= 1, odt_onoff= 1, Byte mode= 0
822 16:29:48.544375 ==
823 16:29:48.550730 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
824 16:29:48.554194 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
825 16:29:48.557581 3 1 8 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
826 16:29:48.563866 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
827 16:29:48.567317 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
828 16:29:48.571010 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
829 16:29:48.577039 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
830 16:29:48.580698 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
831 16:29:48.583576 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
832 16:29:48.590639 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
833 16:29:48.593998 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
834 16:29:48.596667 3 2 12 |201 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
835 16:29:48.603940 3 2 16 |3838 2c2c |(11 11)(11 0) |(1 1)(0 0)| 0
836 16:29:48.606438 3 2 20 |3d3d 302 |(11 11)(11 11) |(1 1)(0 0)| 0
837 16:29:48.610347 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
838 16:29:48.613737 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
839 16:29:48.620285 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
840 16:29:48.623382 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
841 16:29:48.626536 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
842 16:29:48.632890 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
843 16:29:48.636353 3 3 16 |201 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
844 16:29:48.639951 3 3 20 |3231 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
845 16:29:48.646699 [Byte 1] Lead/lag falling Transition (3, 3, 20)
846 16:29:48.649889 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
847 16:29:48.652791 [Byte 0] Lead/lag Transition tap number (1)
848 16:29:48.660009 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
849 16:29:48.662873 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
850 16:29:48.666415 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
851 16:29:48.669149 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
852 16:29:48.676252 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
853 16:29:48.679603 3 4 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
854 16:29:48.683085 3 4 20 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
855 16:29:48.689286 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
856 16:29:48.692819 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
857 16:29:48.695668 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
858 16:29:48.702655 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 16:29:48.706057 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 16:29:48.709363 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 16:29:48.715349 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 16:29:48.718801 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 16:29:48.722148 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 16:29:48.728630 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 16:29:48.732115 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 16:29:48.735495 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 16:29:48.742218 [Byte 0] Lead/lag falling Transition (3, 6, 4)
868 16:29:48.745055 [Byte 1] Lead/lag falling Transition (3, 6, 4)
869 16:29:48.748616 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
870 16:29:48.751834 [Byte 0] Lead/lag Transition tap number (2)
871 16:29:48.758858 3 6 12 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
872 16:29:48.761907 [Byte 1] Lead/lag Transition tap number (3)
873 16:29:48.776819 3 6 16 |2424 3e3d |(11 1)(11 11) |(0 0)(0 0)| 0
874 16:29:48.776953 3 6 20 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
875 16:29:48.777016 [Byte 0]First pass (3, 6, 20)
876 16:29:48.777073 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
877 16:29:48.778504 [Byte 1]First pass (3, 6, 24)
878 16:29:48.781740 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
879 16:29:48.788398 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 16:29:48.791234 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 16:29:48.794766 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 16:29:48.798286 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 16:29:48.800990 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 16:29:48.807925 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 16:29:48.811337 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 16:29:48.814742 All bytes gating window > 1UI, Early break!
887 16:29:48.814840
888 16:29:48.818130 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 8)
889 16:29:48.818213
890 16:29:48.821427 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
891 16:29:48.821508
892 16:29:48.821607
893 16:29:48.821663
894 16:29:48.827871 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
895 16:29:48.827996
896 16:29:48.831283 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
897 16:29:48.831378
898 16:29:48.831438
899 16:29:48.834046 Write Rank0 MR1 =0x56
900 16:29:48.834129
901 16:29:48.837430 best RODT dly(2T, 0.5T) = (2, 3)
902 16:29:48.837524
903 16:29:48.837637 best RODT dly(2T, 0.5T) = (2, 3)
904 16:29:48.840790 ==
905 16:29:48.844060 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
906 16:29:48.847312 fsp= 1, odt_onoff= 1, Byte mode= 0
907 16:29:48.847403 ==
908 16:29:48.850678 Start DQ dly to find pass range UseTestEngine =0
909 16:29:48.857036 x-axis: bit #, y-axis: DQ dly (-127~63)
910 16:29:48.857147 RX Vref Scan = 0
911 16:29:48.860432 -26, [0] xxxxxxxx xxxxxxxx [MSB]
912 16:29:48.863931 -25, [0] xxxxxxxx xxxxxxxx [MSB]
913 16:29:48.867287 -24, [0] xxxxxxxx xxxxxxxx [MSB]
914 16:29:48.870583 -23, [0] xxxxxxxx xxxxxxxx [MSB]
915 16:29:48.870789 -22, [0] xxxxxxxx xxxxxxxx [MSB]
916 16:29:48.874042 -21, [0] xxxxxxxx xxxxxxxx [MSB]
917 16:29:48.877453 -20, [0] xxxxxxxx xxxxxxxx [MSB]
918 16:29:48.880178 -19, [0] xxxxxxxx xxxxxxxx [MSB]
919 16:29:48.883926 -18, [0] xxxxxxxx xxxxxxxx [MSB]
920 16:29:48.887152 -17, [0] xxxxxxxx xxxxxxxx [MSB]
921 16:29:48.890541 -16, [0] xxxxxxxx xxxxxxxx [MSB]
922 16:29:48.893334 -15, [0] xxxxxxxx xxxxxxxx [MSB]
923 16:29:48.896630 -14, [0] xxxxxxxx xxxxxxxx [MSB]
924 16:29:48.896795 -13, [0] xxxxxxxx xxxxxxxx [MSB]
925 16:29:48.900772 -12, [0] xxxxxxxx xxxxxxxx [MSB]
926 16:29:48.903335 -11, [0] xxxxxxxx xxxxxxxx [MSB]
927 16:29:48.906817 -10, [0] xxxxxxxx xxxxxxxx [MSB]
928 16:29:48.910429 -9, [0] xxxxxxxx xxxxxxxx [MSB]
929 16:29:48.913201 -8, [0] xxxxxxxx xxxxxxxx [MSB]
930 16:29:48.916546 -7, [0] xxxxxxxx xxxxxxxx [MSB]
931 16:29:48.920096 -6, [0] xxxxxxxx xxxxxxxx [MSB]
932 16:29:48.920225 -5, [0] xxxxxxxx xxxxxxxx [MSB]
933 16:29:48.923514 -4, [0] xxxoxxxx xxxxxxxx [MSB]
934 16:29:48.926419 -3, [0] xxxoxxxx xxxxxxxx [MSB]
935 16:29:48.929970 -2, [0] xxxoxxxx oxxxxxxx [MSB]
936 16:29:48.933250 -1, [0] xxxoxxxx oxxxxxxx [MSB]
937 16:29:48.936512 0, [0] xxxoxxxx ooxoxxxx [MSB]
938 16:29:48.936631 1, [0] xxxoxoox ooxooxxx [MSB]
939 16:29:48.939757 2, [0] xxxoxoox ooxoooxx [MSB]
940 16:29:48.943373 3, [0] xxxoxoox ooxoooox [MSB]
941 16:29:48.946149 4, [0] xxxoxooo ooxoooox [MSB]
942 16:29:48.949466 5, [0] xooooooo ooxooooo [MSB]
943 16:29:48.952880 6, [0] xooooooo ooxooooo [MSB]
944 16:29:48.952999 7, [0] oooooooo ooxooooo [MSB]
945 16:29:48.956447 33, [0] oooxoooo oooooooo [MSB]
946 16:29:48.959979 34, [0] oooxoxoo xooooooo [MSB]
947 16:29:48.962777 35, [0] oooxoxoo xooxoooo [MSB]
948 16:29:48.966416 36, [0] oooxoxoo xxoxoooo [MSB]
949 16:29:48.969839 37, [0] oooxoxoo xxoxxooo [MSB]
950 16:29:48.972752 38, [0] oooxoxxx xxoxxxxo [MSB]
951 16:29:48.976264 39, [0] oooxoxxx xxoxxxxo [MSB]
952 16:29:48.976416 40, [0] xxoxoxxx xxoxxxxo [MSB]
953 16:29:48.979716 41, [0] xxxxxxxx xxoxxxxx [MSB]
954 16:29:48.982421 42, [0] xxxxxxxx xxoxxxxx [MSB]
955 16:29:48.986064 43, [0] xxxxxxxx xxxxxxxx [MSB]
956 16:29:48.989600 iDelay=43, Bit 0, Center 23 (7 ~ 39) 33
957 16:29:48.992424 iDelay=43, Bit 1, Center 22 (5 ~ 39) 35
958 16:29:48.996118 iDelay=43, Bit 2, Center 22 (5 ~ 40) 36
959 16:29:48.998907 iDelay=43, Bit 3, Center 14 (-4 ~ 32) 37
960 16:29:49.002181 iDelay=43, Bit 4, Center 22 (5 ~ 40) 36
961 16:29:49.009262 iDelay=43, Bit 5, Center 17 (1 ~ 33) 33
962 16:29:49.011914 iDelay=43, Bit 6, Center 19 (1 ~ 37) 37
963 16:29:49.015846 iDelay=43, Bit 7, Center 20 (4 ~ 37) 34
964 16:29:49.018816 iDelay=43, Bit 8, Center 15 (-2 ~ 33) 36
965 16:29:49.021748 iDelay=43, Bit 9, Center 17 (0 ~ 35) 36
966 16:29:49.025167 iDelay=43, Bit 10, Center 25 (8 ~ 42) 35
967 16:29:49.028614 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
968 16:29:49.032151 iDelay=43, Bit 12, Center 18 (1 ~ 36) 36
969 16:29:49.035052 iDelay=43, Bit 13, Center 19 (2 ~ 37) 36
970 16:29:49.038515 iDelay=43, Bit 14, Center 20 (3 ~ 37) 35
971 16:29:49.042049 iDelay=43, Bit 15, Center 22 (5 ~ 40) 36
972 16:29:49.044908 ==
973 16:29:49.048304 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
974 16:29:49.051656 fsp= 1, odt_onoff= 1, Byte mode= 0
975 16:29:49.051783 ==
976 16:29:49.051848 DQS Delay:
977 16:29:49.055034 DQS0 = 0, DQS1 = 0
978 16:29:49.055158 DQM Delay:
979 16:29:49.058140 DQM0 = 19, DQM1 = 19
980 16:29:49.058247 DQ Delay:
981 16:29:49.061640 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =14
982 16:29:49.064929 DQ4 =22, DQ5 =17, DQ6 =19, DQ7 =20
983 16:29:49.068081 DQ8 =15, DQ9 =17, DQ10 =25, DQ11 =17
984 16:29:49.071374 DQ12 =18, DQ13 =19, DQ14 =20, DQ15 =22
985 16:29:49.071503
986 16:29:49.071566
987 16:29:49.074766 DramC Write-DBI off
988 16:29:49.074873 ==
989 16:29:49.078272 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
990 16:29:49.081103 fsp= 1, odt_onoff= 1, Byte mode= 0
991 16:29:49.081199 ==
992 16:29:49.088242 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
993 16:29:49.088367
994 16:29:49.088433 Begin, DQ Scan Range 919~1175
995 16:29:49.088491
996 16:29:49.091099
997 16:29:49.091184 TX Vref Scan disable
998 16:29:49.094649 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
999 16:29:49.098156 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1000 16:29:49.100977 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1001 16:29:49.104526 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1002 16:29:49.110744 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1003 16:29:49.114145 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1004 16:29:49.117686 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1005 16:29:49.121274 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1006 16:29:49.124098 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1007 16:29:49.127626 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1008 16:29:49.131111 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1009 16:29:49.134499 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1010 16:29:49.137292 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1011 16:29:49.140555 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1012 16:29:49.144599 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1013 16:29:49.147774 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1014 16:29:49.150660 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1015 16:29:49.154206 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1016 16:29:49.160341 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1017 16:29:49.163883 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1018 16:29:49.167152 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1019 16:29:49.170508 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1020 16:29:49.173792 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1021 16:29:49.177210 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1022 16:29:49.180330 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1023 16:29:49.183357 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1024 16:29:49.186485 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1025 16:29:49.189707 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1026 16:29:49.193290 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1027 16:29:49.196973 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1028 16:29:49.199784 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1029 16:29:49.203277 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1030 16:29:49.209707 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1031 16:29:49.213250 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1032 16:29:49.216084 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1033 16:29:49.219601 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1034 16:29:49.223033 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1035 16:29:49.225866 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1036 16:29:49.229348 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1037 16:29:49.232750 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1038 16:29:49.236181 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1039 16:29:49.239011 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1040 16:29:49.242466 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1041 16:29:49.246077 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1042 16:29:49.249537 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1043 16:29:49.252312 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1044 16:29:49.255725 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1045 16:29:49.262399 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1046 16:29:49.265564 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1047 16:29:49.268718 968 |3 6 8|[0] xxxxxxxx oxxxxxxx [MSB]
1048 16:29:49.272333 969 |3 6 9|[0] xxxxxxxx oxxoxxxx [MSB]
1049 16:29:49.275565 970 |3 6 10|[0] xxxxxxxx ooxooxxx [MSB]
1050 16:29:49.279202 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1051 16:29:49.282281 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1052 16:29:49.285826 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1053 16:29:49.288616 974 |3 6 14|[0] xxxxxxxx ooxooooo [MSB]
1054 16:29:49.291914 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1055 16:29:49.295089 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1056 16:29:49.298362 977 |3 6 17|[0] xxxoooox oooooooo [MSB]
1057 16:29:49.301972 978 |3 6 18|[0] xoxooooo oooooooo [MSB]
1058 16:29:49.305213 979 |3 6 19|[0] xooooooo oooooooo [MSB]
1059 16:29:49.312885 987 |3 6 27|[0] oooooooo xooxoooo [MSB]
1060 16:29:49.315728 988 |3 6 28|[0] oooooooo xooxoooo [MSB]
1061 16:29:49.319380 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1062 16:29:49.322273 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1063 16:29:49.325473 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1064 16:29:49.328945 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1065 16:29:49.332299 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1066 16:29:49.335833 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1067 16:29:49.338580 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1068 16:29:49.341829 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1069 16:29:49.345445 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1070 16:29:49.349042 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1071 16:29:49.351873 Byte0, DQ PI dly=986, DQM PI dly= 986
1072 16:29:49.358888 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1073 16:29:49.359053
1074 16:29:49.361796 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1075 16:29:49.361891
1076 16:29:49.365304 Byte1, DQ PI dly=979, DQM PI dly= 979
1077 16:29:49.368193 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1078 16:29:49.371536
1079 16:29:49.374997 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1080 16:29:49.375093
1081 16:29:49.375155 ==
1082 16:29:49.378370 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1083 16:29:49.381711 fsp= 1, odt_onoff= 1, Byte mode= 0
1084 16:29:49.385043 ==
1085 16:29:49.388351 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1086 16:29:49.388447
1087 16:29:49.391548 Begin, DQ Scan Range 955~1019
1088 16:29:49.391633 Write Rank0 MR14 =0x0
1089 16:29:49.400199
1090 16:29:49.400318 CH=0, VrefRange= 0, VrefLevel = 0
1091 16:29:49.406911 TX Bit0 (983~995) 13 989, Bit8 (972~981) 10 976,
1092 16:29:49.410119 TX Bit1 (981~993) 13 987, Bit9 (973~983) 11 978,
1093 16:29:49.416674 TX Bit2 (982~994) 13 988, Bit10 (977~989) 13 983,
1094 16:29:49.419979 TX Bit3 (976~990) 15 983, Bit11 (973~982) 10 977,
1095 16:29:49.423870 TX Bit4 (981~991) 11 986, Bit12 (973~983) 11 978,
1096 16:29:49.430125 TX Bit5 (979~990) 12 984, Bit13 (974~983) 10 978,
1097 16:29:49.433446 TX Bit6 (979~991) 13 985, Bit14 (974~987) 14 980,
1098 16:29:49.436824 TX Bit7 (981~991) 11 986, Bit15 (975~990) 16 982,
1099 16:29:49.439705
1100 16:29:49.439819 Write Rank0 MR14 =0x2
1101 16:29:49.448787
1102 16:29:49.448934 CH=0, VrefRange= 0, VrefLevel = 2
1103 16:29:49.455306 TX Bit0 (983~996) 14 989, Bit8 (972~982) 11 977,
1104 16:29:49.458722 TX Bit1 (981~994) 14 987, Bit9 (973~984) 12 978,
1105 16:29:49.465172 TX Bit2 (982~995) 14 988, Bit10 (976~989) 14 982,
1106 16:29:49.468731 TX Bit3 (976~990) 15 983, Bit11 (972~982) 11 977,
1107 16:29:49.471593 TX Bit4 (981~992) 12 986, Bit12 (973~984) 12 978,
1108 16:29:49.478253 TX Bit5 (977~990) 14 983, Bit13 (973~983) 11 978,
1109 16:29:49.481832 TX Bit6 (979~992) 14 985, Bit14 (973~987) 15 980,
1110 16:29:49.487889 TX Bit7 (980~992) 13 986, Bit15 (975~990) 16 982,
1111 16:29:49.488005
1112 16:29:49.488069 Write Rank0 MR14 =0x4
1113 16:29:49.497143
1114 16:29:49.497262 CH=0, VrefRange= 0, VrefLevel = 4
1115 16:29:49.503902 TX Bit0 (982~997) 16 989, Bit8 (970~982) 13 976,
1116 16:29:49.507111 TX Bit1 (980~995) 16 987, Bit9 (973~985) 13 979,
1117 16:29:49.513593 TX Bit2 (981~995) 15 988, Bit10 (976~990) 15 983,
1118 16:29:49.517204 TX Bit3 (975~990) 16 982, Bit11 (972~983) 12 977,
1119 16:29:49.520175 TX Bit4 (980~992) 13 986, Bit12 (973~985) 13 979,
1120 16:29:49.526962 TX Bit5 (977~991) 15 984, Bit13 (973~984) 12 978,
1121 16:29:49.530184 TX Bit6 (978~992) 15 985, Bit14 (973~988) 16 980,
1122 16:29:49.536770 TX Bit7 (980~992) 13 986, Bit15 (975~990) 16 982,
1123 16:29:49.536881
1124 16:29:49.536943 Write Rank0 MR14 =0x6
1125 16:29:49.545958
1126 16:29:49.546076 CH=0, VrefRange= 0, VrefLevel = 6
1127 16:29:49.552543 TX Bit0 (982~998) 17 990, Bit8 (971~983) 13 977,
1128 16:29:49.603594 TX Bit1 (979~995) 17 987, Bit9 (972~986) 15 979,
1129 16:29:49.603928 TX Bit2 (981~997) 17 989, Bit10 (976~990) 15 983,
1130 16:29:49.604029 TX Bit3 (975~991) 17 983, Bit11 (972~983) 12 977,
1131 16:29:49.604121 TX Bit4 (979~993) 15 986, Bit12 (972~986) 15 979,
1132 16:29:49.604211 TX Bit5 (977~991) 15 984, Bit13 (973~985) 13 979,
1133 16:29:49.604305 TX Bit6 (977~992) 16 984, Bit14 (973~989) 17 981,
1134 16:29:49.604390 TX Bit7 (979~993) 15 986, Bit15 (974~991) 18 982,
1135 16:29:49.604469
1136 16:29:49.604585 Write Rank0 MR14 =0x8
1137 16:29:49.604661
1138 16:29:49.604738 CH=0, VrefRange= 0, VrefLevel = 8
1139 16:29:49.604816 TX Bit0 (981~998) 18 989, Bit8 (970~984) 15 977,
1140 16:29:49.604895 TX Bit1 (979~996) 18 987, Bit9 (972~986) 15 979,
1141 16:29:49.616188 TX Bit2 (981~998) 18 989, Bit10 (975~991) 17 983,
1142 16:29:49.616489 TX Bit3 (975~991) 17 983, Bit11 (971~984) 14 977,
1143 16:29:49.619461 TX Bit4 (979~994) 16 986, Bit12 (972~987) 16 979,
1144 16:29:49.622843 TX Bit5 (977~992) 16 984, Bit13 (973~985) 13 979,
1145 16:29:49.629716 TX Bit6 (978~993) 16 985, Bit14 (973~989) 17 981,
1146 16:29:49.632686 TX Bit7 (979~994) 16 986, Bit15 (974~991) 18 982,
1147 16:29:49.632819
1148 16:29:49.635734 Write Rank0 MR14 =0xa
1149 16:29:49.643705
1150 16:29:49.647122 CH=0, VrefRange= 0, VrefLevel = 10
1151 16:29:49.650505 TX Bit0 (981~998) 18 989, Bit8 (969~984) 16 976,
1152 16:29:49.653105 TX Bit1 (979~997) 19 988, Bit9 (972~987) 16 979,
1153 16:29:49.659889 TX Bit2 (980~998) 19 989, Bit10 (975~991) 17 983,
1154 16:29:49.663261 TX Bit3 (975~991) 17 983, Bit11 (971~984) 14 977,
1155 16:29:49.666683 TX Bit4 (978~995) 18 986, Bit12 (972~988) 17 980,
1156 16:29:49.673120 TX Bit5 (977~992) 16 984, Bit13 (972~986) 15 979,
1157 16:29:49.676746 TX Bit6 (977~994) 18 985, Bit14 (972~989) 18 980,
1158 16:29:49.683137 TX Bit7 (978~995) 18 986, Bit15 (974~992) 19 983,
1159 16:29:49.683230
1160 16:29:49.683334 Write Rank0 MR14 =0xc
1161 16:29:49.692308
1162 16:29:49.695856 CH=0, VrefRange= 0, VrefLevel = 12
1163 16:29:49.699248 TX Bit0 (980~999) 20 989, Bit8 (969~985) 17 977,
1164 16:29:49.702120 TX Bit1 (980~998) 19 989, Bit9 (972~988) 17 980,
1165 16:29:49.708573 TX Bit2 (980~998) 19 989, Bit10 (975~992) 18 983,
1166 16:29:49.712103 TX Bit3 (974~992) 19 983, Bit11 (970~985) 16 977,
1167 16:29:49.715602 TX Bit4 (978~996) 19 987, Bit12 (971~988) 18 979,
1168 16:29:49.722063 TX Bit5 (977~992) 16 984, Bit13 (972~987) 16 979,
1169 16:29:49.725416 TX Bit6 (977~995) 19 986, Bit14 (972~990) 19 981,
1170 16:29:49.731859 TX Bit7 (978~995) 18 986, Bit15 (974~993) 20 983,
1171 16:29:49.731953
1172 16:29:49.732014 Write Rank0 MR14 =0xe
1173 16:29:49.741415
1174 16:29:49.744673 CH=0, VrefRange= 0, VrefLevel = 14
1175 16:29:49.747917 TX Bit0 (980~999) 20 989, Bit8 (969~986) 18 977,
1176 16:29:49.751042 TX Bit1 (978~998) 21 988, Bit9 (971~988) 18 979,
1177 16:29:49.757811 TX Bit2 (979~999) 21 989, Bit10 (974~993) 20 983,
1178 16:29:49.761264 TX Bit3 (974~992) 19 983, Bit11 (970~986) 17 978,
1179 16:29:49.764031 TX Bit4 (977~996) 20 986, Bit12 (970~989) 20 979,
1180 16:29:49.770930 TX Bit5 (976~993) 18 984, Bit13 (971~988) 18 979,
1181 16:29:49.774315 TX Bit6 (976~995) 20 985, Bit14 (972~990) 19 981,
1182 16:29:49.780620 TX Bit7 (978~997) 20 987, Bit15 (974~993) 20 983,
1183 16:29:49.780709
1184 16:29:49.780770 Write Rank0 MR14 =0x10
1185 16:29:49.790392
1186 16:29:49.793427 CH=0, VrefRange= 0, VrefLevel = 16
1187 16:29:49.797116 TX Bit0 (979~999) 21 989, Bit8 (968~987) 20 977,
1188 16:29:49.800092 TX Bit1 (978~998) 21 988, Bit9 (970~989) 20 979,
1189 16:29:49.807112 TX Bit2 (979~999) 21 989, Bit10 (974~993) 20 983,
1190 16:29:49.809865 TX Bit3 (974~992) 19 983, Bit11 (969~987) 19 978,
1191 16:29:49.813322 TX Bit4 (977~997) 21 987, Bit12 (970~989) 20 979,
1192 16:29:49.820318 TX Bit5 (976~994) 19 985, Bit13 (971~988) 18 979,
1193 16:29:49.823256 TX Bit6 (976~997) 22 986, Bit14 (971~990) 20 980,
1194 16:29:49.830178 TX Bit7 (978~997) 20 987, Bit15 (974~994) 21 984,
1195 16:29:49.830270
1196 16:29:49.830331 Write Rank0 MR14 =0x12
1197 16:29:49.839310
1198 16:29:49.842674 CH=0, VrefRange= 0, VrefLevel = 18
1199 16:29:49.846155 TX Bit0 (979~999) 21 989, Bit8 (967~988) 22 977,
1200 16:29:49.849171 TX Bit1 (978~999) 22 988, Bit9 (970~989) 20 979,
1201 16:29:49.855816 TX Bit2 (978~999) 22 988, Bit10 (974~994) 21 984,
1202 16:29:49.859153 TX Bit3 (974~993) 20 983, Bit11 (969~988) 20 978,
1203 16:29:49.862265 TX Bit4 (977~998) 22 987, Bit12 (970~990) 21 980,
1204 16:29:49.868798 TX Bit5 (976~995) 20 985, Bit13 (971~989) 19 980,
1205 16:29:49.872329 TX Bit6 (976~997) 22 986, Bit14 (970~991) 22 980,
1206 16:29:49.878839 TX Bit7 (977~998) 22 987, Bit15 (974~994) 21 984,
1207 16:29:49.879034
1208 16:29:49.879123 Write Rank0 MR14 =0x14
1209 16:29:49.888867
1210 16:29:49.891944 CH=0, VrefRange= 0, VrefLevel = 20
1211 16:29:49.895282 TX Bit0 (978~1000) 23 989, Bit8 (967~988) 22 977,
1212 16:29:49.898905 TX Bit1 (977~999) 23 988, Bit9 (969~989) 21 979,
1213 16:29:49.905708 TX Bit2 (978~999) 22 988, Bit10 (974~995) 22 984,
1214 16:29:49.908799 TX Bit3 (973~993) 21 983, Bit11 (968~988) 21 978,
1215 16:29:49.912197 TX Bit4 (977~998) 22 987, Bit12 (970~990) 21 980,
1216 16:29:49.918792 TX Bit5 (976~996) 21 986, Bit13 (970~990) 21 980,
1217 16:29:49.921809 TX Bit6 (976~997) 22 986, Bit14 (970~991) 22 980,
1218 16:29:49.925156 TX Bit7 (977~998) 22 987, Bit15 (973~995) 23 984,
1219 16:29:49.928047
1220 16:29:49.928159 Write Rank0 MR14 =0x16
1221 16:29:49.938062
1222 16:29:49.941455 CH=0, VrefRange= 0, VrefLevel = 22
1223 16:29:49.944350 TX Bit0 (979~1000) 22 989, Bit8 (967~988) 22 977,
1224 16:29:49.947872 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
1225 16:29:49.954204 TX Bit2 (978~1000) 23 989, Bit10 (974~996) 23 985,
1226 16:29:49.957949 TX Bit3 (973~994) 22 983, Bit11 (968~988) 21 978,
1227 16:29:49.960851 TX Bit4 (977~998) 22 987, Bit12 (969~991) 23 980,
1228 16:29:49.967442 TX Bit5 (975~996) 22 985, Bit13 (970~990) 21 980,
1229 16:29:49.971242 TX Bit6 (976~998) 23 987, Bit14 (970~992) 23 981,
1230 16:29:49.977439 TX Bit7 (977~998) 22 987, Bit15 (972~995) 24 983,
1231 16:29:49.977568
1232 16:29:49.977635 Write Rank0 MR14 =0x18
1233 16:29:49.987892
1234 16:29:49.990609 CH=0, VrefRange= 0, VrefLevel = 24
1235 16:29:49.994100 TX Bit0 (978~1001) 24 989, Bit8 (967~989) 23 978,
1236 16:29:49.997792 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
1237 16:29:50.003829 TX Bit2 (977~1000) 24 988, Bit10 (973~996) 24 984,
1238 16:29:50.007752 TX Bit3 (973~994) 22 983, Bit11 (967~989) 23 978,
1239 16:29:50.010350 TX Bit4 (977~999) 23 988, Bit12 (969~991) 23 980,
1240 16:29:50.017046 TX Bit5 (975~997) 23 986, Bit13 (969~990) 22 979,
1241 16:29:50.020668 TX Bit6 (976~998) 23 987, Bit14 (969~992) 24 980,
1242 16:29:50.026896 TX Bit7 (977~999) 23 988, Bit15 (973~995) 23 984,
1243 16:29:50.027001
1244 16:29:50.027082 Write Rank0 MR14 =0x1a
1245 16:29:50.036942
1246 16:29:50.040425 CH=0, VrefRange= 0, VrefLevel = 26
1247 16:29:50.043713 TX Bit0 (978~1001) 24 989, Bit8 (966~989) 24 977,
1248 16:29:50.047010 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1249 16:29:50.053534 TX Bit2 (977~1001) 25 989, Bit10 (973~997) 25 985,
1250 16:29:50.056944 TX Bit3 (973~995) 23 984, Bit11 (967~989) 23 978,
1251 16:29:50.060386 TX Bit4 (976~999) 24 987, Bit12 (968~991) 24 979,
1252 16:29:50.066708 TX Bit5 (975~997) 23 986, Bit13 (969~991) 23 980,
1253 16:29:50.070225 TX Bit6 (975~998) 24 986, Bit14 (969~993) 25 981,
1254 16:29:50.076660 TX Bit7 (976~999) 24 987, Bit15 (973~996) 24 984,
1255 16:29:50.076792
1256 16:29:50.076881 Write Rank0 MR14 =0x1c
1257 16:29:50.086964
1258 16:29:50.090095 CH=0, VrefRange= 0, VrefLevel = 28
1259 16:29:50.093397 TX Bit0 (977~1002) 26 989, Bit8 (966~989) 24 977,
1260 16:29:50.096905 TX Bit1 (976~1001) 26 988, Bit9 (968~991) 24 979,
1261 16:29:50.103321 TX Bit2 (977~1001) 25 989, Bit10 (973~997) 25 985,
1262 16:29:50.106931 TX Bit3 (972~996) 25 984, Bit11 (967~990) 24 978,
1263 16:29:50.113076 TX Bit4 (976~999) 24 987, Bit12 (968~991) 24 979,
1264 16:29:50.116314 TX Bit5 (975~998) 24 986, Bit13 (969~991) 23 980,
1265 16:29:50.119670 TX Bit6 (975~999) 25 987, Bit14 (968~993) 26 980,
1266 16:29:50.126090 TX Bit7 (976~999) 24 987, Bit15 (973~996) 24 984,
1267 16:29:50.126199
1268 16:29:50.126263 Write Rank0 MR14 =0x1e
1269 16:29:50.136860
1270 16:29:50.139676 CH=0, VrefRange= 0, VrefLevel = 30
1271 16:29:50.143307 TX Bit0 (977~1002) 26 989, Bit8 (966~989) 24 977,
1272 16:29:50.146559 TX Bit1 (977~1000) 24 988, Bit9 (968~990) 23 979,
1273 16:29:50.153158 TX Bit2 (977~1001) 25 989, Bit10 (973~997) 25 985,
1274 16:29:50.156269 TX Bit3 (972~996) 25 984, Bit11 (967~990) 24 978,
1275 16:29:50.160002 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
1276 16:29:50.166446 TX Bit5 (975~998) 24 986, Bit13 (968~991) 24 979,
1277 16:29:50.169800 TX Bit6 (975~999) 25 987, Bit14 (969~993) 25 981,
1278 16:29:50.176244 TX Bit7 (976~1000) 25 988, Bit15 (971~996) 26 983,
1279 16:29:50.176357
1280 16:29:50.176421 Write Rank0 MR14 =0x20
1281 16:29:50.186652
1282 16:29:50.189995 CH=0, VrefRange= 0, VrefLevel = 32
1283 16:29:50.193244 TX Bit0 (977~1002) 26 989, Bit8 (966~989) 24 977,
1284 16:29:50.196575 TX Bit1 (977~1000) 24 988, Bit9 (968~990) 23 979,
1285 16:29:50.203170 TX Bit2 (977~1001) 25 989, Bit10 (973~997) 25 985,
1286 16:29:50.206336 TX Bit3 (972~996) 25 984, Bit11 (967~990) 24 978,
1287 16:29:50.209968 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
1288 16:29:50.216206 TX Bit5 (975~998) 24 986, Bit13 (968~991) 24 979,
1289 16:29:50.219917 TX Bit6 (975~999) 25 987, Bit14 (969~993) 25 981,
1290 16:29:50.226116 TX Bit7 (976~1000) 25 988, Bit15 (971~996) 26 983,
1291 16:29:50.226221
1292 16:29:50.226293 Write Rank0 MR14 =0x22
1293 16:29:50.236373
1294 16:29:50.239312 CH=0, VrefRange= 0, VrefLevel = 34
1295 16:29:50.243180 TX Bit0 (977~1002) 26 989, Bit8 (966~989) 24 977,
1296 16:29:50.246623 TX Bit1 (977~1000) 24 988, Bit9 (968~990) 23 979,
1297 16:29:50.252600 TX Bit2 (977~1001) 25 989, Bit10 (973~997) 25 985,
1298 16:29:50.256228 TX Bit3 (972~996) 25 984, Bit11 (967~990) 24 978,
1299 16:29:50.259850 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
1300 16:29:50.266052 TX Bit5 (975~998) 24 986, Bit13 (968~991) 24 979,
1301 16:29:50.269484 TX Bit6 (975~999) 25 987, Bit14 (969~993) 25 981,
1302 16:29:50.275942 TX Bit7 (976~1000) 25 988, Bit15 (971~996) 26 983,
1303 16:29:50.276046
1304 16:29:50.276111 Write Rank0 MR14 =0x24
1305 16:29:50.286323
1306 16:29:50.289247 CH=0, VrefRange= 0, VrefLevel = 36
1307 16:29:50.292886 TX Bit0 (977~1002) 26 989, Bit8 (966~989) 24 977,
1308 16:29:50.295775 TX Bit1 (977~1000) 24 988, Bit9 (968~990) 23 979,
1309 16:29:50.302485 TX Bit2 (977~1001) 25 989, Bit10 (973~997) 25 985,
1310 16:29:50.306097 TX Bit3 (972~996) 25 984, Bit11 (967~990) 24 978,
1311 16:29:50.312674 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
1312 16:29:50.316221 TX Bit5 (975~998) 24 986, Bit13 (968~991) 24 979,
1313 16:29:50.319215 TX Bit6 (975~999) 25 987, Bit14 (969~993) 25 981,
1314 16:29:50.325868 TX Bit7 (976~1000) 25 988, Bit15 (971~996) 26 983,
1315 16:29:50.325976
1316 16:29:50.326039
1317 16:29:50.329253 TX Vref found, early break! 365< 374
1318 16:29:50.332046 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
1319 16:29:50.335552 u1DelayCellOfst[0]=6 cells (5 PI)
1320 16:29:50.339130 u1DelayCellOfst[1]=5 cells (4 PI)
1321 16:29:50.341959 u1DelayCellOfst[2]=6 cells (5 PI)
1322 16:29:50.345570 u1DelayCellOfst[3]=0 cells (0 PI)
1323 16:29:50.348372 u1DelayCellOfst[4]=5 cells (4 PI)
1324 16:29:50.351915 u1DelayCellOfst[5]=2 cells (2 PI)
1325 16:29:50.355283 u1DelayCellOfst[6]=3 cells (3 PI)
1326 16:29:50.358265 u1DelayCellOfst[7]=5 cells (4 PI)
1327 16:29:50.361755 Byte0, DQ PI dly=984, DQM PI dly= 986
1328 16:29:50.365184 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1329 16:29:50.365277
1330 16:29:50.368591 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1331 16:29:50.368679
1332 16:29:50.371504 u1DelayCellOfst[8]=0 cells (0 PI)
1333 16:29:50.374911 u1DelayCellOfst[9]=2 cells (2 PI)
1334 16:29:50.378326 u1DelayCellOfst[10]=10 cells (8 PI)
1335 16:29:50.381911 u1DelayCellOfst[11]=1 cells (1 PI)
1336 16:29:50.384842 u1DelayCellOfst[12]=2 cells (2 PI)
1337 16:29:50.388425 u1DelayCellOfst[13]=2 cells (2 PI)
1338 16:29:50.391243 u1DelayCellOfst[14]=5 cells (4 PI)
1339 16:29:50.395087 u1DelayCellOfst[15]=7 cells (6 PI)
1340 16:29:50.398099 Byte1, DQ PI dly=977, DQM PI dly= 981
1341 16:29:50.401741 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1342 16:29:50.401924
1343 16:29:50.405246 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1344 16:29:50.407894
1345 16:29:50.408018 Write Rank0 MR14 =0x1e
1346 16:29:50.408108
1347 16:29:50.411376 Final TX Range 0 Vref 30
1348 16:29:50.411496
1349 16:29:50.418047 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1350 16:29:50.418192
1351 16:29:50.425158 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1352 16:29:50.431460 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1353 16:29:50.438210 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1354 16:29:50.441200 Write Rank0 MR3 =0xb0
1355 16:29:50.441314 DramC Write-DBI on
1356 16:29:50.441400 ==
1357 16:29:50.447757 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1358 16:29:50.450912 fsp= 1, odt_onoff= 1, Byte mode= 0
1359 16:29:50.451049 ==
1360 16:29:50.454382 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1361 16:29:50.454499
1362 16:29:50.457510 Begin, DQ Scan Range 701~765
1363 16:29:50.457620
1364 16:29:50.457680
1365 16:29:50.461103 TX Vref Scan disable
1366 16:29:50.463988 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1367 16:29:50.467495 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1368 16:29:50.471025 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1369 16:29:50.473894 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1370 16:29:50.477370 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1371 16:29:50.481073 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1372 16:29:50.483958 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1373 16:29:50.487425 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1374 16:29:50.490906 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1375 16:29:50.493743 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1376 16:29:50.497314 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1377 16:29:50.500136 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1378 16:29:50.503550 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1379 16:29:50.510479 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1380 16:29:50.513355 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1381 16:29:50.516802 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1382 16:29:50.520441 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1383 16:29:50.523123 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1384 16:29:50.526631 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1385 16:29:50.533906 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1386 16:29:50.536877 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1387 16:29:50.540334 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1388 16:29:50.543798 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1389 16:29:50.547176 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1390 16:29:50.550022 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1391 16:29:50.553452 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1392 16:29:50.556979 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1393 16:29:50.560327 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1394 16:29:50.563949 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1395 16:29:50.566938 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1396 16:29:50.570136 Byte0, DQ PI dly=732, DQM PI dly= 732
1397 16:29:50.576432 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1398 16:29:50.576561
1399 16:29:50.579857 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1400 16:29:50.579963
1401 16:29:50.582943 Byte1, DQ PI dly=723, DQM PI dly= 723
1402 16:29:50.586301 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
1403 16:29:50.586410
1404 16:29:50.592698 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
1405 16:29:50.592822
1406 16:29:50.599575 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1407 16:29:50.606165 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1408 16:29:50.613076 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1409 16:29:50.616058 Write Rank0 MR3 =0x30
1410 16:29:50.616167 DramC Write-DBI off
1411 16:29:50.616229
1412 16:29:50.616285 [DATLAT]
1413 16:29:50.619407 Freq=1600, CH0 RK0, use_rxtx_scan=0
1414 16:29:50.619513
1415 16:29:50.623024 DATLAT Default: 0xf
1416 16:29:50.623138 7, 0xFFFF, sum=0
1417 16:29:50.626345 8, 0xFFFF, sum=0
1418 16:29:50.626453 9, 0xFFFF, sum=0
1419 16:29:50.629007 10, 0xFFFF, sum=0
1420 16:29:50.629107 11, 0xFFFF, sum=0
1421 16:29:50.632331 12, 0xFFFF, sum=0
1422 16:29:50.632444 13, 0xFFFF, sum=0
1423 16:29:50.635967 14, 0x0, sum=1
1424 16:29:50.636091 15, 0x0, sum=2
1425 16:29:50.639489 16, 0x0, sum=3
1426 16:29:50.639599 17, 0x0, sum=4
1427 16:29:50.642578 pattern=2 first_step=14 total pass=5 best_step=16
1428 16:29:50.645385 ==
1429 16:29:50.648903 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1430 16:29:50.652329 fsp= 1, odt_onoff= 1, Byte mode= 0
1431 16:29:50.652443 ==
1432 16:29:50.655820 Start DQ dly to find pass range UseTestEngine =1
1433 16:29:50.659412 x-axis: bit #, y-axis: DQ dly (-127~63)
1434 16:29:50.661897 RX Vref Scan = 1
1435 16:29:50.769528
1436 16:29:50.769687 RX Vref found, early break!
1437 16:29:50.769751
1438 16:29:50.775913 Final RX Vref 11, apply to both rank0 and 1
1439 16:29:50.776012 ==
1440 16:29:50.779547 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1441 16:29:50.782297 fsp= 1, odt_onoff= 1, Byte mode= 0
1442 16:29:50.782381 ==
1443 16:29:50.782466 DQS Delay:
1444 16:29:50.785935 DQS0 = 0, DQS1 = 0
1445 16:29:50.786021 DQM Delay:
1446 16:29:50.789387 DQM0 = 19, DQM1 = 18
1447 16:29:50.789493 DQ Delay:
1448 16:29:50.792256 DQ0 =23, DQ1 =21, DQ2 =23, DQ3 =15
1449 16:29:50.795627 DQ4 =21, DQ5 =16, DQ6 =19, DQ7 =21
1450 16:29:50.799080 DQ8 =15, DQ9 =17, DQ10 =24, DQ11 =16
1451 16:29:50.802929 DQ12 =18, DQ13 =18, DQ14 =20, DQ15 =22
1452 16:29:50.803022
1453 16:29:50.803082
1454 16:29:50.803136
1455 16:29:50.805393 [DramC_TX_OE_Calibration] TA2
1456 16:29:50.808848 Original DQ_B0 (3 6) =30, OEN = 27
1457 16:29:50.812459 Original DQ_B1 (3 6) =30, OEN = 27
1458 16:29:50.815330 23, 0x0, End_B0=23 End_B1=23
1459 16:29:50.815425 24, 0x0, End_B0=24 End_B1=24
1460 16:29:50.818791 25, 0x0, End_B0=25 End_B1=25
1461 16:29:50.822375 26, 0x0, End_B0=26 End_B1=26
1462 16:29:50.825220 27, 0x0, End_B0=27 End_B1=27
1463 16:29:50.828675 28, 0x0, End_B0=28 End_B1=28
1464 16:29:50.828766 29, 0x0, End_B0=29 End_B1=29
1465 16:29:50.832156 30, 0x0, End_B0=30 End_B1=30
1466 16:29:50.835527 31, 0xFFFF, End_B0=30 End_B1=30
1467 16:29:50.842045 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1468 16:29:50.845158 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1469 16:29:50.848376
1470 16:29:50.848464
1471 16:29:50.848523 Write Rank0 MR23 =0x3f
1472 16:29:50.848578 [DQSOSC]
1473 16:29:50.857944 [DQSOSCAuto] RK0, (LSB)MR18= 0xafaf, (MSB)MR19= 0x202, tDQSOscB0 = 458 ps tDQSOscB1 = 458 ps
1474 16:29:50.864710 CH0_RK0: MR19=0x202, MR18=0xAFAF, DQSOSC=458, MR23=63, INC=11, DEC=17
1475 16:29:50.864822 Write Rank0 MR23 =0x3f
1476 16:29:50.868098 [DQSOSC]
1477 16:29:50.889235 [DQSOSCAuto] RK0, (LSB)MR18= 0xaeae, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps
1478 16:29:50.889385 CH0 RK0: MR19=202, MR18=AEAE
1479 16:29:50.889465 [RankSwap] Rank num 2, (Multi 1), Rank 1
1480 16:29:50.889523 Write Rank0 MR2 =0xad
1481 16:29:50.889609 [Write Leveling]
1482 16:29:50.889662 delay byte0 byte1 byte2 byte3
1483 16:29:50.889713
1484 16:29:50.889763 10 0 0
1485 16:29:50.890987 11 0 0
1486 16:29:50.891064 12 0 0
1487 16:29:50.894605 13 0 0
1488 16:29:50.894686 14 0 0
1489 16:29:50.898147 15 0 0
1490 16:29:50.898242 16 0 0
1491 16:29:50.898304 17 0 0
1492 16:29:50.900804 18 0 0
1493 16:29:50.900889 19 0 0
1494 16:29:50.904427 20 0 0
1495 16:29:50.904511 21 0 0
1496 16:29:50.904571 22 0 ff
1497 16:29:50.907985 23 0 ff
1498 16:29:50.908065 24 0 ff
1499 16:29:50.911311 25 0 ff
1500 16:29:50.911392 26 0 ff
1501 16:29:50.914173 27 0 ff
1502 16:29:50.914261 28 0 ff
1503 16:29:50.917575 29 0 ff
1504 16:29:50.917687 30 0 ff
1505 16:29:50.917816 31 ff ff
1506 16:29:50.920866 32 ff ff
1507 16:29:50.920975 33 ff ff
1508 16:29:50.924326 34 ff ff
1509 16:29:50.924431 35 ff ff
1510 16:29:50.927875 36 ff ff
1511 16:29:50.928005 37 ff ff
1512 16:29:50.933812 pass bytecount = 0xff (0xff: all bytes pass)
1513 16:29:50.933971
1514 16:29:50.934068 DQS0 dly: 31
1515 16:29:50.934162 DQS1 dly: 22
1516 16:29:50.937345 Write Rank0 MR2 =0x2d
1517 16:29:50.940354 [RankSwap] Rank num 2, (Multi 1), Rank 0
1518 16:29:50.943807 Write Rank1 MR1 =0xd6
1519 16:29:50.943906 [Gating]
1520 16:29:50.943996 ==
1521 16:29:50.950758 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1522 16:29:50.950859 fsp= 1, odt_onoff= 1, Byte mode= 0
1523 16:29:50.953648 ==
1524 16:29:50.957316 3 1 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1525 16:29:50.960046 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1526 16:29:50.966908 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1527 16:29:50.970420 3 1 12 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1528 16:29:50.973941 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1529 16:29:50.976762 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1530 16:29:50.983030 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1531 16:29:50.986468 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1532 16:29:50.989894 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1533 16:29:50.996569 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
1534 16:29:50.999909 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
1535 16:29:51.002882 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
1536 16:29:51.010136 3 2 16 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1537 16:29:51.012915 3 2 20 |3131 909 |(11 11)(11 11) |(1 1)(0 0)| 0
1538 16:29:51.016105 3 2 24 |3d3d 1110 |(11 11)(11 11) |(1 1)(0 0)| 0
1539 16:29:51.023282 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1540 16:29:51.026390 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1541 16:29:51.029259 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1542 16:29:51.036282 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1543 16:29:51.039789 3 3 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1544 16:29:51.042495 3 3 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1545 16:29:51.049518 3 3 20 |201 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1546 16:29:51.052220 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1547 16:29:51.055755 [Byte 0] Lead/lag Transition tap number (1)
1548 16:29:51.059262 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1549 16:29:51.065524 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1550 16:29:51.069113 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1551 16:29:51.071937 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1552 16:29:51.078873 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1553 16:29:51.082258 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1554 16:29:51.085132 3 4 20 |3d3d 807 |(11 11)(11 11) |(1 1)(1 1)| 0
1555 16:29:51.091666 3 4 24 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0
1556 16:29:51.095265 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1557 16:29:51.098758 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 16:29:51.105099 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 16:29:51.108356 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 16:29:51.111754 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 16:29:51.118723 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 16:29:51.121431 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1563 16:29:51.124647 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1564 16:29:51.131425 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1565 16:29:51.134606 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1566 16:29:51.137870 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1567 16:29:51.144728 [Byte 0] Lead/lag falling Transition (3, 6, 4)
1568 16:29:51.148013 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1569 16:29:51.151123 [Byte 1] Lead/lag falling Transition (3, 6, 8)
1570 16:29:51.154651 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1571 16:29:51.160931 [Byte 0] Lead/lag Transition tap number (3)
1572 16:29:51.164280 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1573 16:29:51.167861 [Byte 1] Lead/lag Transition tap number (3)
1574 16:29:51.171198 3 6 20 |404 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
1575 16:29:51.177477 3 6 24 |4646 808 |(0 0)(11 11) |(0 0)(0 0)| 0
1576 16:29:51.177645 [Byte 0]First pass (3, 6, 24)
1577 16:29:51.184110 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1578 16:29:51.184206 [Byte 1]First pass (3, 6, 28)
1579 16:29:51.190967 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1580 16:29:51.193737 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1581 16:29:51.197434 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1582 16:29:51.201061 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1583 16:29:51.206900 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1584 16:29:51.210504 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1585 16:29:51.213992 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1586 16:29:51.216782 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1587 16:29:51.220208 All bytes gating window > 1UI, Early break!
1588 16:29:51.220300
1589 16:29:51.226794 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
1590 16:29:51.226887
1591 16:29:51.230383 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 14)
1592 16:29:51.230486
1593 16:29:51.230573
1594 16:29:51.230654
1595 16:29:51.233814 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
1596 16:29:51.233894
1597 16:29:51.237035 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 14)
1598 16:29:51.237116
1599 16:29:51.237175
1600 16:29:51.240351 Write Rank1 MR1 =0x56
1601 16:29:51.240430
1602 16:29:51.243203 best RODT dly(2T, 0.5T) = (2, 3)
1603 16:29:51.243283
1604 16:29:51.246681 best RODT dly(2T, 0.5T) = (2, 3)
1605 16:29:51.246760 ==
1606 16:29:51.250157 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1607 16:29:51.253179 fsp= 1, odt_onoff= 1, Byte mode= 0
1608 16:29:51.256595 ==
1609 16:29:51.259859 Start DQ dly to find pass range UseTestEngine =0
1610 16:29:51.262985 x-axis: bit #, y-axis: DQ dly (-127~63)
1611 16:29:51.263068 RX Vref Scan = 0
1612 16:29:51.266019 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1613 16:29:51.269301 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1614 16:29:51.272969 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1615 16:29:51.276016 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1616 16:29:51.279488 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1617 16:29:51.282754 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1618 16:29:51.286066 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1619 16:29:51.289490 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1620 16:29:51.289598 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1621 16:29:51.292320 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1622 16:29:51.295703 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1623 16:29:51.299143 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1624 16:29:51.302117 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1625 16:29:51.305754 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1626 16:29:51.309333 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1627 16:29:51.312052 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1628 16:29:51.315577 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1629 16:29:51.315659 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1630 16:29:51.319161 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1631 16:29:51.321921 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1632 16:29:51.325169 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1633 16:29:51.328363 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1634 16:29:51.331939 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1635 16:29:51.335510 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1636 16:29:51.338886 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1637 16:29:51.339004 -1, [0] xxxoxxxx xxxxxxxx [MSB]
1638 16:29:51.341750 0, [0] xxxoxoxx xxxoxxxx [MSB]
1639 16:29:51.345154 1, [0] xxxoxoox oxxoxxxx [MSB]
1640 16:29:51.348343 2, [0] xxxoxooo oxxoxxxx [MSB]
1641 16:29:51.351672 3, [0] xxxooooo ooxoxxxx [MSB]
1642 16:29:51.355121 4, [0] ooxooooo ooxoooxx [MSB]
1643 16:29:51.355230 5, [0] oooooooo ooxoooox [MSB]
1644 16:29:51.358715 6, [0] oooooooo ooxoooox [MSB]
1645 16:29:51.361418 7, [0] oooooooo ooxooooo [MSB]
1646 16:29:51.365006 8, [0] oooooooo ooxooooo [MSB]
1647 16:29:51.368660 9, [0] oooooooo ooxooooo [MSB]
1648 16:29:51.371489 32, [0] oooxoooo oooooooo [MSB]
1649 16:29:51.371593 33, [0] oooxoooo oooooooo [MSB]
1650 16:29:51.374848 34, [0] oooxoxoo xooooooo [MSB]
1651 16:29:51.378177 35, [0] oooxoxoo xooxoooo [MSB]
1652 16:29:51.381409 36, [0] oooxoxoo xxoxxooo [MSB]
1653 16:29:51.384686 37, [0] oooxoxxx xxoxxxxo [MSB]
1654 16:29:51.387897 38, [0] oooxoxxx xxoxxxxo [MSB]
1655 16:29:51.391233 39, [0] xxoxoxxx xxoxxxxo [MSB]
1656 16:29:51.391349 40, [0] xxxxoxxx xxoxxxxo [MSB]
1657 16:29:51.394483 41, [0] xxxxxxxx xxoxxxxx [MSB]
1658 16:29:51.398178 42, [0] xxxxxxxx xxoxxxxx [MSB]
1659 16:29:51.401233 43, [0] xxxxxxxx xxxxxxxx [MSB]
1660 16:29:51.404871 iDelay=43, Bit 0, Center 21 (4 ~ 38) 35
1661 16:29:51.407973 iDelay=43, Bit 1, Center 21 (4 ~ 38) 35
1662 16:29:51.411195 iDelay=43, Bit 2, Center 22 (5 ~ 39) 35
1663 16:29:51.414610 iDelay=43, Bit 3, Center 15 (-1 ~ 31) 33
1664 16:29:51.421004 iDelay=43, Bit 4, Center 21 (3 ~ 40) 38
1665 16:29:51.423942 iDelay=43, Bit 5, Center 16 (0 ~ 33) 34
1666 16:29:51.427425 iDelay=43, Bit 6, Center 18 (1 ~ 36) 36
1667 16:29:51.430962 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
1668 16:29:51.434284 iDelay=43, Bit 8, Center 17 (1 ~ 33) 33
1669 16:29:51.437555 iDelay=43, Bit 9, Center 19 (3 ~ 35) 33
1670 16:29:51.440544 iDelay=43, Bit 10, Center 26 (10 ~ 42) 33
1671 16:29:51.444183 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
1672 16:29:51.446926 iDelay=43, Bit 12, Center 19 (4 ~ 35) 32
1673 16:29:51.450368 iDelay=43, Bit 13, Center 20 (4 ~ 36) 33
1674 16:29:51.453894 iDelay=43, Bit 14, Center 20 (5 ~ 36) 32
1675 16:29:51.460434 iDelay=43, Bit 15, Center 23 (7 ~ 40) 34
1676 16:29:51.460550 ==
1677 16:29:51.463989 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1678 16:29:51.466738 fsp= 1, odt_onoff= 1, Byte mode= 0
1679 16:29:51.466817 ==
1680 16:29:51.466875 DQS Delay:
1681 16:29:51.470449 DQS0 = 0, DQS1 = 0
1682 16:29:51.470547 DQM Delay:
1683 16:29:51.473889 DQM0 = 19, DQM1 = 20
1684 16:29:51.473972 DQ Delay:
1685 16:29:51.476767 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =15
1686 16:29:51.480205 DQ4 =21, DQ5 =16, DQ6 =18, DQ7 =19
1687 16:29:51.483804 DQ8 =17, DQ9 =19, DQ10 =26, DQ11 =17
1688 16:29:51.486486 DQ12 =19, DQ13 =20, DQ14 =20, DQ15 =23
1689 16:29:51.486569
1690 16:29:51.486631
1691 16:29:51.489942 DramC Write-DBI off
1692 16:29:51.490025 ==
1693 16:29:51.493290 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1694 16:29:51.496589 fsp= 1, odt_onoff= 1, Byte mode= 0
1695 16:29:51.496668 ==
1696 16:29:51.503043 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1697 16:29:51.503127
1698 16:29:51.506475 Begin, DQ Scan Range 918~1174
1699 16:29:51.506548
1700 16:29:51.506607
1701 16:29:51.506661 TX Vref Scan disable
1702 16:29:51.509925 918 |3 4 22|[0] xxxxxxxx xxxxxxxx [MSB]
1703 16:29:51.513295 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1704 16:29:51.516390 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1705 16:29:51.520055 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1706 16:29:51.526480 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1707 16:29:51.529478 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1708 16:29:51.533185 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1709 16:29:51.536028 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1710 16:29:51.539490 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1711 16:29:51.542829 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1712 16:29:51.546101 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1713 16:29:51.549492 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1714 16:29:51.552872 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1715 16:29:51.556322 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1716 16:29:51.559853 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1717 16:29:51.562748 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1718 16:29:51.566089 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1719 16:29:51.569184 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1720 16:29:51.576274 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1721 16:29:51.579224 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1722 16:29:51.582500 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1723 16:29:51.586135 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1724 16:29:51.588964 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1725 16:29:51.592300 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1726 16:29:51.595751 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1727 16:29:51.599181 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1728 16:29:51.601896 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1729 16:29:51.605470 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1730 16:29:51.609081 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1731 16:29:51.611986 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1732 16:29:51.615565 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1733 16:29:51.618414 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1734 16:29:51.625668 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1735 16:29:51.628298 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1736 16:29:51.631701 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1737 16:29:51.635230 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1738 16:29:51.638523 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1739 16:29:51.641919 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1740 16:29:51.644964 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1741 16:29:51.648590 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1742 16:29:51.651480 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1743 16:29:51.655059 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1744 16:29:51.658446 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1745 16:29:51.661378 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1746 16:29:51.664844 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1747 16:29:51.668231 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1748 16:29:51.671446 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1749 16:29:51.675050 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1750 16:29:51.681357 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1751 16:29:51.684551 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1752 16:29:51.687959 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1753 16:29:51.691537 969 |3 6 9|[0] xxxxxxxx oxxoooxx [MSB]
1754 16:29:51.694334 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1755 16:29:51.697654 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1756 16:29:51.701227 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1757 16:29:51.704577 973 |3 6 13|[0] xxxxxxxx ooooooox [MSB]
1758 16:29:51.708046 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1759 16:29:51.710976 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1760 16:29:51.714481 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1761 16:29:51.717390 977 |3 6 17|[0] xxxoxooo oooooooo [MSB]
1762 16:29:51.721012 978 |3 6 18|[0] xxxooooo oooooooo [MSB]
1763 16:29:51.724412 979 |3 6 19|[0] xoxooooo oooooooo [MSB]
1764 16:29:51.727323 980 |3 6 20|[0] ooxooooo oooooooo [MSB]
1765 16:29:51.735170 986 |3 6 26|[0] oooooooo oooxoooo [MSB]
1766 16:29:51.737958 987 |3 6 27|[0] oooooooo xooxoooo [MSB]
1767 16:29:51.741419 988 |3 6 28|[0] oooooooo xooxoooo [MSB]
1768 16:29:51.744889 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1769 16:29:51.747753 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1770 16:29:51.751274 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1771 16:29:51.754812 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1772 16:29:51.758062 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1773 16:29:51.761013 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1774 16:29:51.764219 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1775 16:29:51.767604 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1776 16:29:51.770801 997 |3 6 37|[0] oooxoxoo xxxxxxxx [MSB]
1777 16:29:51.774169 998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]
1778 16:29:51.780698 999 |3 6 39|[0] oooxoxxo xxxxxxxx [MSB]
1779 16:29:51.783816 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1780 16:29:51.787314 Byte0, DQ PI dly=987, DQM PI dly= 987
1781 16:29:51.790819 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
1782 16:29:51.790899
1783 16:29:51.794176 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
1784 16:29:51.794302
1785 16:29:51.797322 Byte1, DQ PI dly=978, DQM PI dly= 978
1786 16:29:51.803737 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1787 16:29:51.803819
1788 16:29:51.807310 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1789 16:29:51.807394
1790 16:29:51.807455 ==
1791 16:29:51.813602 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1792 16:29:51.816704 fsp= 1, odt_onoff= 1, Byte mode= 0
1793 16:29:51.816787 ==
1794 16:29:51.820277 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1795 16:29:51.820377
1796 16:29:51.823767 Begin, DQ Scan Range 954~1018
1797 16:29:51.823844 Write Rank1 MR14 =0x0
1798 16:29:51.833505
1799 16:29:51.833640 CH=0, VrefRange= 0, VrefLevel = 0
1800 16:29:51.839841 TX Bit0 (983~994) 12 988, Bit8 (969~982) 14 975,
1801 16:29:51.843201 TX Bit1 (981~993) 13 987, Bit9 (972~982) 11 977,
1802 16:29:51.850168 TX Bit2 (983~994) 12 988, Bit10 (975~989) 15 982,
1803 16:29:51.853094 TX Bit3 (977~990) 14 983, Bit11 (971~981) 11 976,
1804 16:29:51.856583 TX Bit4 (982~993) 12 987, Bit12 (973~983) 11 978,
1805 16:29:51.863505 TX Bit5 (979~991) 13 985, Bit13 (972~984) 13 978,
1806 16:29:51.866837 TX Bit6 (978~992) 15 985, Bit14 (973~985) 13 979,
1807 16:29:51.873110 TX Bit7 (981~993) 13 987, Bit15 (975~986) 12 980,
1808 16:29:51.873191
1809 16:29:51.873250 Write Rank1 MR14 =0x2
1810 16:29:51.882138
1811 16:29:51.882253 CH=0, VrefRange= 0, VrefLevel = 2
1812 16:29:51.888564 TX Bit0 (983~996) 14 989, Bit8 (969~982) 14 975,
1813 16:29:51.892176 TX Bit1 (981~994) 14 987, Bit9 (972~983) 12 977,
1814 16:29:51.898376 TX Bit2 (983~996) 14 989, Bit10 (975~989) 15 982,
1815 16:29:51.901792 TX Bit3 (976~990) 15 983, Bit11 (971~981) 11 976,
1816 16:29:51.905109 TX Bit4 (981~994) 14 987, Bit12 (972~983) 12 977,
1817 16:29:51.911815 TX Bit5 (978~991) 14 984, Bit13 (972~984) 13 978,
1818 16:29:51.914970 TX Bit6 (978~992) 15 985, Bit14 (972~986) 15 979,
1819 16:29:51.918132 TX Bit7 (979~995) 17 987, Bit15 (975~987) 13 981,
1820 16:29:51.921408
1821 16:29:51.921507 Write Rank1 MR14 =0x4
1822 16:29:51.930871
1823 16:29:51.930985 CH=0, VrefRange= 0, VrefLevel = 4
1824 16:29:51.937170 TX Bit0 (983~997) 15 990, Bit8 (968~982) 15 975,
1825 16:29:51.941025 TX Bit1 (981~995) 15 988, Bit9 (972~983) 12 977,
1826 16:29:51.947159 TX Bit2 (983~996) 14 989, Bit10 (975~989) 15 982,
1827 16:29:51.950521 TX Bit3 (976~990) 15 983, Bit11 (970~982) 13 976,
1828 16:29:51.954253 TX Bit4 (980~995) 16 987, Bit12 (971~984) 14 977,
1829 16:29:51.960676 TX Bit5 (978~992) 15 985, Bit13 (971~985) 15 978,
1830 16:29:51.964319 TX Bit6 (978~993) 16 985, Bit14 (972~987) 16 979,
1831 16:29:51.967148 TX Bit7 (979~996) 18 987, Bit15 (975~988) 14 981,
1832 16:29:51.970595
1833 16:29:51.970693 Write Rank1 MR14 =0x6
1834 16:29:51.980107
1835 16:29:51.980240 CH=0, VrefRange= 0, VrefLevel = 6
1836 16:29:51.986112 TX Bit0 (983~997) 15 990, Bit8 (968~983) 16 975,
1837 16:29:51.989868 TX Bit1 (980~997) 18 988, Bit9 (972~984) 13 978,
1838 16:29:51.996283 TX Bit2 (982~998) 17 990, Bit10 (975~990) 16 982,
1839 16:29:51.999765 TX Bit3 (976~991) 16 983, Bit11 (970~982) 13 976,
1840 16:29:52.003287 TX Bit4 (980~997) 18 988, Bit12 (971~985) 15 978,
1841 16:29:52.009198 TX Bit5 (977~992) 16 984, Bit13 (971~986) 16 978,
1842 16:29:52.012973 TX Bit6 (977~994) 18 985, Bit14 (972~988) 17 980,
1843 16:29:52.015982 TX Bit7 (979~997) 19 988, Bit15 (974~989) 16 981,
1844 16:29:52.019736
1845 16:29:52.019845 Write Rank1 MR14 =0x8
1846 16:29:52.028429
1847 16:29:52.028542 CH=0, VrefRange= 0, VrefLevel = 8
1848 16:29:52.035458 TX Bit0 (982~998) 17 990, Bit8 (967~983) 17 975,
1849 16:29:52.038214 TX Bit1 (980~997) 18 988, Bit9 (971~985) 15 978,
1850 16:29:52.045000 TX Bit2 (982~998) 17 990, Bit10 (974~990) 17 982,
1851 16:29:52.048353 TX Bit3 (975~991) 17 983, Bit11 (969~983) 15 976,
1852 16:29:52.051714 TX Bit4 (979~997) 19 988, Bit12 (971~985) 15 978,
1853 16:29:52.058169 TX Bit5 (977~993) 17 985, Bit13 (971~987) 17 979,
1854 16:29:52.061760 TX Bit6 (977~994) 18 985, Bit14 (971~989) 19 980,
1855 16:29:52.068073 TX Bit7 (979~998) 20 988, Bit15 (974~989) 16 981,
1856 16:29:52.068202
1857 16:29:52.068301 Write Rank1 MR14 =0xa
1858 16:29:52.077580
1859 16:29:52.081439 CH=0, VrefRange= 0, VrefLevel = 10
1860 16:29:52.084238 TX Bit0 (982~998) 17 990, Bit8 (967~984) 18 975,
1861 16:29:52.087582 TX Bit1 (979~998) 20 988, Bit9 (970~985) 16 977,
1862 16:29:52.094350 TX Bit2 (981~999) 19 990, Bit10 (974~991) 18 982,
1863 16:29:52.097831 TX Bit3 (975~992) 18 983, Bit11 (968~984) 17 976,
1864 16:29:52.100761 TX Bit4 (979~998) 20 988, Bit12 (970~986) 17 978,
1865 16:29:52.107549 TX Bit5 (977~994) 18 985, Bit13 (970~988) 19 979,
1866 16:29:52.110993 TX Bit6 (977~996) 20 986, Bit14 (971~989) 19 980,
1867 16:29:52.117410 TX Bit7 (978~998) 21 988, Bit15 (974~990) 17 982,
1868 16:29:52.117529
1869 16:29:52.117609 Write Rank1 MR14 =0xc
1870 16:29:52.126865
1871 16:29:52.130355 CH=0, VrefRange= 0, VrefLevel = 12
1872 16:29:52.133308 TX Bit0 (982~999) 18 990, Bit8 (967~985) 19 976,
1873 16:29:52.136918 TX Bit1 (980~998) 19 989, Bit9 (970~986) 17 978,
1874 16:29:52.143353 TX Bit2 (981~999) 19 990, Bit10 (974~992) 19 983,
1875 16:29:52.146963 TX Bit3 (975~992) 18 983, Bit11 (968~984) 17 976,
1876 16:29:52.150299 TX Bit4 (978~998) 21 988, Bit12 (970~987) 18 978,
1877 16:29:52.156389 TX Bit5 (977~995) 19 986, Bit13 (970~988) 19 979,
1878 16:29:52.159985 TX Bit6 (977~997) 21 987, Bit14 (970~990) 21 980,
1879 16:29:52.166345 TX Bit7 (978~999) 22 988, Bit15 (974~990) 17 982,
1880 16:29:52.166453
1881 16:29:52.166514 Write Rank1 MR14 =0xe
1882 16:29:52.176564
1883 16:29:52.179159 CH=0, VrefRange= 0, VrefLevel = 14
1884 16:29:52.183168 TX Bit0 (981~999) 19 990, Bit8 (967~985) 19 976,
1885 16:29:52.186339 TX Bit1 (979~999) 21 989, Bit9 (969~986) 18 977,
1886 16:29:52.192790 TX Bit2 (980~999) 20 989, Bit10 (974~992) 19 983,
1887 16:29:52.195900 TX Bit3 (975~992) 18 983, Bit11 (968~984) 17 976,
1888 16:29:52.199173 TX Bit4 (978~998) 21 988, Bit12 (969~988) 20 978,
1889 16:29:52.205842 TX Bit5 (976~996) 21 986, Bit13 (969~989) 21 979,
1890 16:29:52.209229 TX Bit6 (977~998) 22 987, Bit14 (970~990) 21 980,
1891 16:29:52.215786 TX Bit7 (978~999) 22 988, Bit15 (974~991) 18 982,
1892 16:29:52.215916
1893 16:29:52.215982 Write Rank1 MR14 =0x10
1894 16:29:52.225201
1895 16:29:52.228886 CH=0, VrefRange= 0, VrefLevel = 16
1896 16:29:52.231859 TX Bit0 (981~999) 19 990, Bit8 (967~985) 19 976,
1897 16:29:52.235492 TX Bit1 (978~999) 22 988, Bit9 (969~987) 19 978,
1898 16:29:52.242124 TX Bit2 (980~999) 20 989, Bit10 (974~992) 19 983,
1899 16:29:52.245039 TX Bit3 (975~993) 19 984, Bit11 (967~985) 19 976,
1900 16:29:52.248558 TX Bit4 (978~999) 22 988, Bit12 (968~989) 22 978,
1901 16:29:52.254939 TX Bit5 (976~996) 21 986, Bit13 (969~989) 21 979,
1902 16:29:52.258469 TX Bit6 (976~998) 23 987, Bit14 (969~990) 22 979,
1903 16:29:52.264643 TX Bit7 (978~999) 22 988, Bit15 (974~991) 18 982,
1904 16:29:52.264750
1905 16:29:52.264812 Write Rank1 MR14 =0x12
1906 16:29:52.274698
1907 16:29:52.278191 CH=0, VrefRange= 0, VrefLevel = 18
1908 16:29:52.281792 TX Bit0 (980~1000) 21 990, Bit8 (966~986) 21 976,
1909 16:29:52.284648 TX Bit1 (978~1000) 23 989, Bit9 (969~988) 20 978,
1910 16:29:52.291693 TX Bit2 (980~1000) 21 990, Bit10 (973~993) 21 983,
1911 16:29:52.294706 TX Bit3 (974~993) 20 983, Bit11 (967~986) 20 976,
1912 16:29:52.298142 TX Bit4 (978~999) 22 988, Bit12 (968~989) 22 978,
1913 16:29:52.304421 TX Bit5 (976~997) 22 986, Bit13 (968~989) 22 978,
1914 16:29:52.307739 TX Bit6 (976~998) 23 987, Bit14 (969~991) 23 980,
1915 16:29:52.314762 TX Bit7 (977~1000) 24 988, Bit15 (973~991) 19 982,
1916 16:29:52.314863
1917 16:29:52.314925 Write Rank1 MR14 =0x14
1918 16:29:52.324811
1919 16:29:52.328047 CH=0, VrefRange= 0, VrefLevel = 20
1920 16:29:52.331452 TX Bit0 (980~1000) 21 990, Bit8 (966~988) 23 977,
1921 16:29:52.334676 TX Bit1 (977~1000) 24 988, Bit9 (968~989) 22 978,
1922 16:29:52.341523 TX Bit2 (979~1000) 22 989, Bit10 (973~994) 22 983,
1923 16:29:52.344608 TX Bit3 (974~994) 21 984, Bit11 (967~988) 22 977,
1924 16:29:52.347589 TX Bit4 (977~999) 23 988, Bit12 (968~989) 22 978,
1925 16:29:52.354473 TX Bit5 (976~997) 22 986, Bit13 (968~990) 23 979,
1926 16:29:52.357866 TX Bit6 (976~999) 24 987, Bit14 (969~991) 23 980,
1927 16:29:52.364328 TX Bit7 (977~1000) 24 988, Bit15 (973~992) 20 982,
1928 16:29:52.364463
1929 16:29:52.364566 Write Rank1 MR14 =0x16
1930 16:29:52.374898
1931 16:29:52.378234 CH=0, VrefRange= 0, VrefLevel = 22
1932 16:29:52.381062 TX Bit0 (979~1001) 23 990, Bit8 (966~988) 23 977,
1933 16:29:52.384550 TX Bit1 (977~1000) 24 988, Bit9 (968~989) 22 978,
1934 16:29:52.391240 TX Bit2 (979~1001) 23 990, Bit10 (973~994) 22 983,
1935 16:29:52.394093 TX Bit3 (973~994) 22 983, Bit11 (967~988) 22 977,
1936 16:29:52.400601 TX Bit4 (977~999) 23 988, Bit12 (968~990) 23 979,
1937 16:29:52.404117 TX Bit5 (976~998) 23 987, Bit13 (968~990) 23 979,
1938 16:29:52.407727 TX Bit6 (976~999) 24 987, Bit14 (969~991) 23 980,
1939 16:29:52.414158 TX Bit7 (977~1001) 25 989, Bit15 (973~993) 21 983,
1940 16:29:52.414271
1941 16:29:52.414333 Write Rank1 MR14 =0x18
1942 16:29:52.424720
1943 16:29:52.427841 CH=0, VrefRange= 0, VrefLevel = 24
1944 16:29:52.431275 TX Bit0 (979~1001) 23 990, Bit8 (966~988) 23 977,
1945 16:29:52.434941 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1946 16:29:52.441187 TX Bit2 (979~1001) 23 990, Bit10 (973~996) 24 984,
1947 16:29:52.444721 TX Bit3 (973~995) 23 984, Bit11 (966~988) 23 977,
1948 16:29:52.447646 TX Bit4 (977~1000) 24 988, Bit12 (968~990) 23 979,
1949 16:29:52.454213 TX Bit5 (975~998) 24 986, Bit13 (967~990) 24 978,
1950 16:29:52.457421 TX Bit6 (976~999) 24 987, Bit14 (968~991) 24 979,
1951 16:29:52.464260 TX Bit7 (977~1001) 25 989, Bit15 (973~994) 22 983,
1952 16:29:52.464395
1953 16:29:52.464492 Write Rank1 MR14 =0x1a
1954 16:29:52.474663
1955 16:29:52.478220 CH=0, VrefRange= 0, VrefLevel = 26
1956 16:29:52.481542 TX Bit0 (979~1002) 24 990, Bit8 (965~988) 24 976,
1957 16:29:52.484879 TX Bit1 (977~1001) 25 989, Bit9 (968~989) 22 978,
1958 16:29:52.491480 TX Bit2 (979~1002) 24 990, Bit10 (973~995) 23 984,
1959 16:29:52.495003 TX Bit3 (973~997) 25 985, Bit11 (966~989) 24 977,
1960 16:29:52.501420 TX Bit4 (977~1001) 25 989, Bit12 (967~990) 24 978,
1961 16:29:52.504328 TX Bit5 (975~999) 25 987, Bit13 (967~990) 24 978,
1962 16:29:52.507970 TX Bit6 (976~1000) 25 988, Bit14 (967~991) 25 979,
1963 16:29:52.514216 TX Bit7 (977~1001) 25 989, Bit15 (972~993) 22 982,
1964 16:29:52.514319
1965 16:29:52.514414 Write Rank1 MR14 =0x1c
1966 16:29:52.524883
1967 16:29:52.528216 CH=0, VrefRange= 0, VrefLevel = 28
1968 16:29:52.531940 TX Bit0 (979~1002) 24 990, Bit8 (965~988) 24 976,
1969 16:29:52.535302 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1970 16:29:52.541836 TX Bit2 (978~1002) 25 990, Bit10 (972~996) 25 984,
1971 16:29:52.544745 TX Bit3 (973~997) 25 985, Bit11 (966~989) 24 977,
1972 16:29:52.548089 TX Bit4 (977~1001) 25 989, Bit12 (967~990) 24 978,
1973 16:29:52.554443 TX Bit5 (975~999) 25 987, Bit13 (967~989) 23 978,
1974 16:29:52.558019 TX Bit6 (976~999) 24 987, Bit14 (967~991) 25 979,
1975 16:29:52.564884 TX Bit7 (977~1001) 25 989, Bit15 (971~994) 24 982,
1976 16:29:52.564992
1977 16:29:52.565058 Write Rank1 MR14 =0x1e
1978 16:29:52.575407
1979 16:29:52.578484 CH=0, VrefRange= 0, VrefLevel = 30
1980 16:29:52.582153 TX Bit0 (979~1002) 24 990, Bit8 (965~988) 24 976,
1981 16:29:52.585247 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1982 16:29:52.592101 TX Bit2 (978~1002) 25 990, Bit10 (972~996) 25 984,
1983 16:29:52.595343 TX Bit3 (973~997) 25 985, Bit11 (966~989) 24 977,
1984 16:29:52.598660 TX Bit4 (977~1001) 25 989, Bit12 (967~990) 24 978,
1985 16:29:52.605303 TX Bit5 (975~999) 25 987, Bit13 (967~989) 23 978,
1986 16:29:52.608192 TX Bit6 (976~999) 24 987, Bit14 (967~991) 25 979,
1987 16:29:52.615339 TX Bit7 (977~1001) 25 989, Bit15 (971~994) 24 982,
1988 16:29:52.615482
1989 16:29:52.615546 Write Rank1 MR14 =0x20
1990 16:29:52.626057
1991 16:29:52.629059 CH=0, VrefRange= 0, VrefLevel = 32
1992 16:29:52.632568 TX Bit0 (979~1002) 24 990, Bit8 (965~988) 24 976,
1993 16:29:52.635275 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
1994 16:29:52.642584 TX Bit2 (978~1002) 25 990, Bit10 (972~996) 25 984,
1995 16:29:52.645976 TX Bit3 (973~997) 25 985, Bit11 (966~989) 24 977,
1996 16:29:52.649297 TX Bit4 (977~1001) 25 989, Bit12 (967~990) 24 978,
1997 16:29:52.655531 TX Bit5 (975~999) 25 987, Bit13 (967~989) 23 978,
1998 16:29:52.658887 TX Bit6 (976~999) 24 987, Bit14 (967~991) 25 979,
1999 16:29:52.665850 TX Bit7 (977~1001) 25 989, Bit15 (971~994) 24 982,
2000 16:29:52.665969
2001 16:29:52.666038 Write Rank1 MR14 =0x22
2002 16:29:52.675925
2003 16:29:52.679388 CH=0, VrefRange= 0, VrefLevel = 34
2004 16:29:52.682344 TX Bit0 (979~1002) 24 990, Bit8 (965~988) 24 976,
2005 16:29:52.685814 TX Bit1 (977~1001) 25 989, Bit9 (967~989) 23 978,
2006 16:29:52.692161 TX Bit2 (978~1002) 25 990, Bit10 (972~996) 25 984,
2007 16:29:52.695508 TX Bit3 (973~997) 25 985, Bit11 (966~989) 24 977,
2008 16:29:52.698856 TX Bit4 (977~1001) 25 989, Bit12 (967~990) 24 978,
2009 16:29:52.705479 TX Bit5 (975~999) 25 987, Bit13 (967~989) 23 978,
2010 16:29:52.708744 TX Bit6 (976~999) 24 987, Bit14 (967~991) 25 979,
2011 16:29:52.715586 TX Bit7 (977~1001) 25 989, Bit15 (971~994) 24 982,
2012 16:29:52.715744
2013 16:29:52.715860
2014 16:29:52.718733 TX Vref found, early break! 363< 370
2015 16:29:52.721975 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2016 16:29:52.725450 u1DelayCellOfst[0]=6 cells (5 PI)
2017 16:29:52.728850 u1DelayCellOfst[1]=5 cells (4 PI)
2018 16:29:52.731806 u1DelayCellOfst[2]=6 cells (5 PI)
2019 16:29:52.735317 u1DelayCellOfst[3]=0 cells (0 PI)
2020 16:29:52.738329 u1DelayCellOfst[4]=5 cells (4 PI)
2021 16:29:52.741936 u1DelayCellOfst[5]=2 cells (2 PI)
2022 16:29:52.745534 u1DelayCellOfst[6]=2 cells (2 PI)
2023 16:29:52.748390 u1DelayCellOfst[7]=5 cells (4 PI)
2024 16:29:52.751965 Byte0, DQ PI dly=985, DQM PI dly= 987
2025 16:29:52.754939 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2026 16:29:52.755042
2027 16:29:52.758304 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2028 16:29:52.758403
2029 16:29:52.761589 u1DelayCellOfst[8]=0 cells (0 PI)
2030 16:29:52.764943 u1DelayCellOfst[9]=2 cells (2 PI)
2031 16:29:52.768170 u1DelayCellOfst[10]=10 cells (8 PI)
2032 16:29:52.771464 u1DelayCellOfst[11]=1 cells (1 PI)
2033 16:29:52.774919 u1DelayCellOfst[12]=2 cells (2 PI)
2034 16:29:52.777946 u1DelayCellOfst[13]=2 cells (2 PI)
2035 16:29:52.781406 u1DelayCellOfst[14]=3 cells (3 PI)
2036 16:29:52.784991 u1DelayCellOfst[15]=7 cells (6 PI)
2037 16:29:52.787891 Byte1, DQ PI dly=976, DQM PI dly= 980
2038 16:29:52.791320 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2039 16:29:52.791448
2040 16:29:52.794803 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2041 16:29:52.794886
2042 16:29:52.798083 Write Rank1 MR14 =0x1c
2043 16:29:52.798187
2044 16:29:52.800944 Final TX Range 0 Vref 28
2045 16:29:52.801039
2046 16:29:52.807935 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2047 16:29:52.808029
2048 16:29:52.814389 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2049 16:29:52.821241 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2050 16:29:52.827839 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2051 16:29:52.830881 wait MRW command Rank1 MR3 =0xb0 fired (1)
2052 16:29:52.834195 Write Rank1 MR3 =0xb0
2053 16:29:52.834283 DramC Write-DBI on
2054 16:29:52.837519 ==
2055 16:29:52.840750 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2056 16:29:52.844087 fsp= 1, odt_onoff= 1, Byte mode= 0
2057 16:29:52.844177 ==
2058 16:29:52.847209 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2059 16:29:52.847294
2060 16:29:52.850578 Begin, DQ Scan Range 700~764
2061 16:29:52.850662
2062 16:29:52.850722
2063 16:29:52.854152 TX Vref Scan disable
2064 16:29:52.856963 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2065 16:29:52.860722 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2066 16:29:52.863700 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2067 16:29:52.867104 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2068 16:29:52.870535 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2069 16:29:52.873353 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2070 16:29:52.876808 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2071 16:29:52.880715 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2072 16:29:52.883930 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2073 16:29:52.887352 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2074 16:29:52.890290 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2075 16:29:52.893897 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2076 16:29:52.897437 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2077 16:29:52.900774 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2078 16:29:52.906888 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2079 16:29:52.910420 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2080 16:29:52.913922 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2081 16:29:52.916690 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2082 16:29:52.920323 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2083 16:29:52.923313 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2084 16:29:52.926877 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2085 16:29:52.934039 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
2086 16:29:52.937536 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2087 16:29:52.940400 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2088 16:29:52.943694 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2089 16:29:52.947327 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2090 16:29:52.950247 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2091 16:29:52.953437 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2092 16:29:52.956951 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2093 16:29:52.960424 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2094 16:29:52.963714 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2095 16:29:52.967267 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2096 16:29:52.970092 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2097 16:29:52.973643 747 |2 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
2098 16:29:52.976536 Byte0, DQ PI dly=733, DQM PI dly= 733
2099 16:29:52.983859 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
2100 16:29:52.983955
2101 16:29:52.987328 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
2102 16:29:52.987418
2103 16:29:52.990417 Byte1, DQ PI dly=722, DQM PI dly= 722
2104 16:29:52.993705 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2105 16:29:52.996814
2106 16:29:53.000181 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2107 16:29:53.000302
2108 16:29:53.006649 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2109 16:29:53.012950 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2110 16:29:53.019830 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2111 16:29:53.023296 Write Rank1 MR3 =0x30
2112 16:29:53.023393 DramC Write-DBI off
2113 16:29:53.023455
2114 16:29:53.026286 [DATLAT]
2115 16:29:53.029795 Freq=1600, CH0 RK1, use_rxtx_scan=0
2116 16:29:53.029892
2117 16:29:53.029953 DATLAT Default: 0x10
2118 16:29:53.033338 7, 0xFFFF, sum=0
2119 16:29:53.033450 8, 0xFFFF, sum=0
2120 16:29:53.036015 9, 0xFFFF, sum=0
2121 16:29:53.036116 10, 0xFFFF, sum=0
2122 16:29:53.039554 11, 0xFFFF, sum=0
2123 16:29:53.039637 12, 0xFFFF, sum=0
2124 16:29:53.043195 13, 0xFFFF, sum=0
2125 16:29:53.043295 14, 0x0, sum=1
2126 16:29:53.043382 15, 0x0, sum=2
2127 16:29:53.046116 16, 0x0, sum=3
2128 16:29:53.046244 17, 0x0, sum=4
2129 16:29:53.053000 pattern=2 first_step=14 total pass=5 best_step=16
2130 16:29:53.053124 ==
2131 16:29:53.056599 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2132 16:29:53.059328 fsp= 1, odt_onoff= 1, Byte mode= 0
2133 16:29:53.059430 ==
2134 16:29:53.065763 Start DQ dly to find pass range UseTestEngine =1
2135 16:29:53.069105 x-axis: bit #, y-axis: DQ dly (-127~63)
2136 16:29:53.069217 RX Vref Scan = 0
2137 16:29:53.072470 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2138 16:29:53.075826 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2139 16:29:53.079100 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2140 16:29:53.082583 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2141 16:29:53.082701 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2142 16:29:53.086117 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2143 16:29:53.088843 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2144 16:29:53.092457 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2145 16:29:53.095441 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2146 16:29:53.098967 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2147 16:29:53.102229 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2148 16:29:53.105193 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2149 16:29:53.108491 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2150 16:29:53.111830 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2151 16:29:53.111949 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2152 16:29:53.115321 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2153 16:29:53.118995 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2154 16:29:53.121805 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2155 16:29:53.125338 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2156 16:29:53.128768 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2157 16:29:53.132147 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2158 16:29:53.132249 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2159 16:29:53.135025 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2160 16:29:53.138441 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2161 16:29:53.142043 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2162 16:29:53.144971 -1, [0] xxxoxxxx xxxxxxxx [MSB]
2163 16:29:53.148668 0, [0] xxxoxoxx oxxoxxxx [MSB]
2164 16:29:53.151445 1, [0] xxxoxoox oxxoxxxx [MSB]
2165 16:29:53.151536 2, [0] xxxoxoox oxxoxxxx [MSB]
2166 16:29:53.154988 3, [0] xxxoxoox ooxoooxx [MSB]
2167 16:29:53.158529 4, [0] xoxoxoox ooxoooxx [MSB]
2168 16:29:53.161406 5, [0] oooooooo ooxoooox [MSB]
2169 16:29:53.164857 6, [0] oooooooo ooxooooo [MSB]
2170 16:29:53.168420 7, [0] oooooooo ooxooooo [MSB]
2171 16:29:53.168509 8, [0] oooooooo ooxooooo [MSB]
2172 16:29:53.173508 32, [0] oooxoooo oooooooo [MSB]
2173 16:29:53.176432 33, [0] oooxoxoo oooooooo [MSB]
2174 16:29:53.179898 34, [0] oooxoxoo xooooooo [MSB]
2175 16:29:53.183098 35, [0] oooxoxoo xooxoooo [MSB]
2176 16:29:53.186424 36, [0] oooxoxxo xxoxoooo [MSB]
2177 16:29:53.189799 37, [0] oooxoxxo xxoxxxoo [MSB]
2178 16:29:53.192646 38, [0] oooxoxxx xxoxxxxo [MSB]
2179 16:29:53.192740 39, [0] xooxxxxx xxoxxxxo [MSB]
2180 16:29:53.196360 40, [0] xxoxxxxx xxoxxxxo [MSB]
2181 16:29:53.199408 41, [0] xxxxxxxx xxoxxxxx [MSB]
2182 16:29:53.202983 42, [0] xxxxxxxx xxoxxxxx [MSB]
2183 16:29:53.205864 43, [0] xxxxxxxx xxxxxxxx [MSB]
2184 16:29:53.209289 iDelay=43, Bit 0, Center 21 (5 ~ 38) 34
2185 16:29:53.212556 iDelay=43, Bit 1, Center 21 (4 ~ 39) 36
2186 16:29:53.216002 iDelay=43, Bit 2, Center 22 (5 ~ 40) 36
2187 16:29:53.219133 iDelay=43, Bit 3, Center 14 (-2 ~ 31) 34
2188 16:29:53.222444 iDelay=43, Bit 4, Center 21 (5 ~ 38) 34
2189 16:29:53.225958 iDelay=43, Bit 5, Center 16 (0 ~ 32) 33
2190 16:29:53.228732 iDelay=43, Bit 6, Center 18 (1 ~ 35) 35
2191 16:29:53.235388 iDelay=43, Bit 7, Center 21 (5 ~ 37) 33
2192 16:29:53.238814 iDelay=43, Bit 8, Center 16 (0 ~ 33) 34
2193 16:29:53.242189 iDelay=43, Bit 9, Center 19 (3 ~ 35) 33
2194 16:29:53.245391 iDelay=43, Bit 10, Center 25 (9 ~ 42) 34
2195 16:29:53.248993 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
2196 16:29:53.251737 iDelay=43, Bit 12, Center 19 (3 ~ 36) 34
2197 16:29:53.255311 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
2198 16:29:53.258801 iDelay=43, Bit 14, Center 21 (5 ~ 37) 33
2199 16:29:53.262290 iDelay=43, Bit 15, Center 23 (6 ~ 40) 35
2200 16:29:53.262403 ==
2201 16:29:53.268283 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2202 16:29:53.271879 fsp= 1, odt_onoff= 1, Byte mode= 0
2203 16:29:53.272014 ==
2204 16:29:53.272105 DQS Delay:
2205 16:29:53.274872 DQS0 = 0, DQS1 = 0
2206 16:29:53.274990 DQM Delay:
2207 16:29:53.278417 DQM0 = 19, DQM1 = 19
2208 16:29:53.278496 DQ Delay:
2209 16:29:53.281328 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14
2210 16:29:53.285004 DQ4 =21, DQ5 =16, DQ6 =18, DQ7 =21
2211 16:29:53.287912 DQ8 =16, DQ9 =19, DQ10 =25, DQ11 =17
2212 16:29:53.291284 DQ12 =19, DQ13 =19, DQ14 =21, DQ15 =23
2213 16:29:53.291387
2214 16:29:53.291473
2215 16:29:53.291559
2216 16:29:53.294653 [DramC_TX_OE_Calibration] TA2
2217 16:29:53.298050 Original DQ_B0 (3 6) =30, OEN = 27
2218 16:29:53.301484 Original DQ_B1 (3 6) =30, OEN = 27
2219 16:29:53.304417 23, 0x0, End_B0=23 End_B1=23
2220 16:29:53.304507 24, 0x0, End_B0=24 End_B1=24
2221 16:29:53.308108 25, 0x0, End_B0=25 End_B1=25
2222 16:29:53.310916 26, 0x0, End_B0=26 End_B1=26
2223 16:29:53.314464 27, 0x0, End_B0=27 End_B1=27
2224 16:29:53.314548 28, 0x0, End_B0=28 End_B1=28
2225 16:29:53.317937 29, 0x0, End_B0=29 End_B1=29
2226 16:29:53.320840 30, 0x0, End_B0=30 End_B1=30
2227 16:29:53.324428 31, 0xFFFF, End_B0=30 End_B1=30
2228 16:29:53.331093 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2229 16:29:53.334512 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2230 16:29:53.334627
2231 16:29:53.334716
2232 16:29:53.337255 Write Rank1 MR23 =0x3f
2233 16:29:53.337353 [DQSOSC]
2234 16:29:53.347560 [DQSOSCAuto] RK1, (LSB)MR18= 0xb1b1, (MSB)MR19= 0x202, tDQSOscB0 = 457 ps tDQSOscB1 = 457 ps
2235 16:29:53.354338 CH0_RK1: MR19=0x202, MR18=0xB1B1, DQSOSC=457, MR23=63, INC=11, DEC=17
2236 16:29:53.354441 Write Rank1 MR23 =0x3f
2237 16:29:53.354505 [DQSOSC]
2238 16:29:53.363708 [DQSOSCAuto] RK1, (LSB)MR18= 0xb2b2, (MSB)MR19= 0x202, tDQSOscB0 = 456 ps tDQSOscB1 = 456 ps
2239 16:29:53.367233 CH0 RK1: MR19=202, MR18=B2B2
2240 16:29:53.370532 [RxdqsGatingPostProcess] freq 1600
2241 16:29:53.374020 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2242 16:29:53.376706 Rank: 0
2243 16:29:53.376788 best DQS0 dly(2T, 0.5T) = (2, 6)
2244 16:29:53.380285 best DQS1 dly(2T, 0.5T) = (2, 6)
2245 16:29:53.383862 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2246 16:29:53.387256 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2247 16:29:53.387348 Rank: 1
2248 16:29:53.390130 best DQS0 dly(2T, 0.5T) = (2, 6)
2249 16:29:53.393880 best DQS1 dly(2T, 0.5T) = (2, 6)
2250 16:29:53.396677 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2251 16:29:53.399852 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2252 16:29:53.406360 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2253 16:29:53.409825 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2254 16:29:53.413129 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2255 16:29:53.416814 Write Rank0 MR13 =0x59
2256 16:29:53.416892 ==
2257 16:29:53.419702 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2258 16:29:53.423374 fsp= 1, odt_onoff= 1, Byte mode= 0
2259 16:29:53.423458 ==
2260 16:29:53.426256 === u2Vref_new: 0x56 --> 0x3a
2261 16:29:53.429846 === u2Vref_new: 0x58 --> 0x58
2262 16:29:53.432624 === u2Vref_new: 0x5a --> 0x5a
2263 16:29:53.435914 === u2Vref_new: 0x5c --> 0x78
2264 16:29:53.439214 === u2Vref_new: 0x5e --> 0x7a
2265 16:29:53.442655 === u2Vref_new: 0x60 --> 0x90
2266 16:29:53.446173 [CA 0] Center 37 (12~63) winsize 52
2267 16:29:53.449531 [CA 1] Center 36 (10~63) winsize 54
2268 16:29:53.452377 [CA 2] Center 34 (5~63) winsize 59
2269 16:29:53.456171 [CA 3] Center 35 (8~63) winsize 56
2270 16:29:53.459513 [CA 4] Center 34 (5~63) winsize 59
2271 16:29:53.462212 [CA 5] Center 28 (0~57) winsize 58
2272 16:29:53.462291
2273 16:29:53.465765 [CATrainingPosCal] consider 1 rank data
2274 16:29:53.469072 u2DelayCellTimex100 = 753/100 ps
2275 16:29:53.472858 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2276 16:29:53.475550 CA1 delay=36 (10~63),Diff = 8 PI (10 cell)
2277 16:29:53.479253 CA2 delay=34 (5~63),Diff = 6 PI (7 cell)
2278 16:29:53.482026 CA3 delay=35 (8~63),Diff = 7 PI (9 cell)
2279 16:29:53.485558 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2280 16:29:53.491921 CA5 delay=28 (0~57),Diff = 0 PI (0 cell)
2281 16:29:53.492022
2282 16:29:53.495731 CA PerBit enable=1, Macro0, CA PI delay=28
2283 16:29:53.498556 === u2Vref_new: 0x5e --> 0x7a
2284 16:29:53.498637
2285 16:29:53.498700 Vref(ca) range 1: 30
2286 16:29:53.498756
2287 16:29:53.502271 CS Dly= 11 (42-0-32)
2288 16:29:53.502350 Write Rank0 MR13 =0xd8
2289 16:29:53.505131 Write Rank0 MR13 =0xd8
2290 16:29:53.508153 Write Rank0 MR12 =0x5e
2291 16:29:53.508235 Write Rank1 MR13 =0x59
2292 16:29:53.508296 ==
2293 16:29:53.514768 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2294 16:29:53.518149 fsp= 1, odt_onoff= 1, Byte mode= 0
2295 16:29:53.518243 ==
2296 16:29:53.521538 === u2Vref_new: 0x56 --> 0x3a
2297 16:29:53.524721 === u2Vref_new: 0x58 --> 0x58
2298 16:29:53.528067 === u2Vref_new: 0x5a --> 0x5a
2299 16:29:53.530975 === u2Vref_new: 0x5c --> 0x78
2300 16:29:53.534501 === u2Vref_new: 0x5e --> 0x7a
2301 16:29:53.537463 === u2Vref_new: 0x60 --> 0x90
2302 16:29:53.541110 [CA 0] Center 37 (11~63) winsize 53
2303 16:29:53.544677 [CA 1] Center 37 (11~63) winsize 53
2304 16:29:53.547768 [CA 2] Center 35 (7~63) winsize 57
2305 16:29:53.551148 [CA 3] Center 34 (6~63) winsize 58
2306 16:29:53.551243 [CA 4] Center 34 (5~63) winsize 59
2307 16:29:53.554016 [CA 5] Center 27 (-1~56) winsize 58
2308 16:29:53.557416
2309 16:29:53.560942 [CATrainingPosCal] consider 2 rank data
2310 16:29:53.561061 u2DelayCellTimex100 = 753/100 ps
2311 16:29:53.567115 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2312 16:29:53.570495 CA1 delay=37 (11~63),Diff = 9 PI (11 cell)
2313 16:29:53.573674 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2314 16:29:53.577139 CA3 delay=35 (8~63),Diff = 7 PI (9 cell)
2315 16:29:53.580605 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2316 16:29:53.583354 CA5 delay=28 (0~56),Diff = 0 PI (0 cell)
2317 16:29:53.583433
2318 16:29:53.586938 CA PerBit enable=1, Macro0, CA PI delay=28
2319 16:29:53.590287 === u2Vref_new: 0x5c --> 0x78
2320 16:29:53.590378
2321 16:29:53.593626 Vref(ca) range 1: 28
2322 16:29:53.593702
2323 16:29:53.596416 CS Dly= 9 (40-0-32)
2324 16:29:53.596485 Write Rank1 MR13 =0xd8
2325 16:29:53.599929 Write Rank1 MR13 =0xd8
2326 16:29:53.600010 Write Rank1 MR12 =0x5c
2327 16:29:53.606430 [RankSwap] Rank num 2, (Multi 1), Rank 0
2328 16:29:53.606511 Write Rank0 MR2 =0xad
2329 16:29:53.610031 [Write Leveling]
2330 16:29:53.612885 delay byte0 byte1 byte2 byte3
2331 16:29:53.612961
2332 16:29:53.613020 10 0 0
2333 16:29:53.613078 11 0 0
2334 16:29:53.616715 12 0 0
2335 16:29:53.616809 13 0 0
2336 16:29:53.619532 14 0 0
2337 16:29:53.619604 15 0 0
2338 16:29:53.622941 16 0 0
2339 16:29:53.623015 17 0 0
2340 16:29:53.623074 18 0 0
2341 16:29:53.626442 19 0 0
2342 16:29:53.626538 20 0 0
2343 16:29:53.629145 21 0 0
2344 16:29:53.629222 22 0 0
2345 16:29:53.629280 23 0 0
2346 16:29:53.633063 24 0 0
2347 16:29:53.633135 25 0 0
2348 16:29:53.635760 26 0 0
2349 16:29:53.635829 27 0 0
2350 16:29:53.639648 28 0 0
2351 16:29:53.639749 29 0 0
2352 16:29:53.639837 30 0 0
2353 16:29:53.642676 31 0 0
2354 16:29:53.642751 32 0 0
2355 16:29:53.645987 33 0 ff
2356 16:29:53.646061 34 0 ff
2357 16:29:53.649479 35 ff ff
2358 16:29:53.649587 36 ff ff
2359 16:29:53.652360 37 ff ff
2360 16:29:53.652432 38 ff ff
2361 16:29:53.652517 39 ff ff
2362 16:29:53.655748 40 ff ff
2363 16:29:53.655825 41 ff ff
2364 16:29:53.662132 pass bytecount = 0xff (0xff: all bytes pass)
2365 16:29:53.662218
2366 16:29:53.662279 DQS0 dly: 35
2367 16:29:53.662380 DQS1 dly: 33
2368 16:29:53.665755 Write Rank0 MR2 =0x2d
2369 16:29:53.669252 [RankSwap] Rank num 2, (Multi 1), Rank 0
2370 16:29:53.671891 Write Rank0 MR1 =0xd6
2371 16:29:53.671986 [Gating]
2372 16:29:53.672081 ==
2373 16:29:53.678839 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2374 16:29:53.682217 fsp= 1, odt_onoff= 1, Byte mode= 0
2375 16:29:53.682303 ==
2376 16:29:53.685712 3 1 0 |2c2b 302 |(11 11)(11 1) |(1 1)(0 0)| 0
2377 16:29:53.688516 3 1 4 |2c2b 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
2378 16:29:53.695233 3 1 8 |2c2b 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2379 16:29:53.698636 3 1 12 |2c2b 3535 |(11 11)(11 11) |(1 1)(1 1)| 0
2380 16:29:53.701530 3 1 16 |2c2b 1414 |(11 11)(11 11) |(1 1)(1 1)| 0
2381 16:29:53.708120 3 1 20 |2c2b 3131 |(11 11)(11 11) |(1 1)(0 0)| 0
2382 16:29:53.711728 [Byte 0] Lead/lag falling Transition (3, 1, 20)
2383 16:29:53.715307 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2384 16:29:53.721820 3 1 28 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
2385 16:29:53.724713 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2386 16:29:53.728235 [Byte 1] Lead/lag Transition tap number (1)
2387 16:29:53.731067 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2388 16:29:53.737526 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2389 16:29:53.741167 3 2 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2390 16:29:53.744015 3 2 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2391 16:29:53.750524 3 2 20 |2c2b 3433 |(11 11)(11 11) |(1 0)(0 1)| 0
2392 16:29:53.753920 [Byte 0] Lead/lag Transition tap number (9)
2393 16:29:53.757750 3 2 24 |303 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2394 16:29:53.760386 3 2 28 |2424 b0a |(11 11)(11 11) |(0 0)(1 1)| 0
2395 16:29:53.767383 3 3 0 |3534 100f |(11 11)(11 11) |(0 0)(1 1)| 0
2396 16:29:53.770420 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2397 16:29:53.773423 3 3 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2398 16:29:53.780455 3 3 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2399 16:29:53.783713 [Byte 1] Lead/lag Transition tap number (1)
2400 16:29:53.787141 3 3 16 |3534 3d3c |(11 11)(11 11) |(0 0)(0 0)| 0
2401 16:29:53.793223 3 3 20 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2402 16:29:53.796923 3 3 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2403 16:29:53.800033 3 3 28 |3534 707 |(11 11)(11 11) |(0 0)(1 1)| 0
2404 16:29:53.806780 3 4 0 |3534 100f |(11 11)(11 11) |(0 0)(1 1)| 0
2405 16:29:53.809929 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2406 16:29:53.812884 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2407 16:29:53.819430 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2408 16:29:53.823091 3 4 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2409 16:29:53.825946 3 4 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2410 16:29:53.833004 3 4 24 |c0c 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2411 16:29:53.835851 3 4 28 |3d3d 2625 |(11 11)(11 11) |(1 1)(1 1)| 0
2412 16:29:53.839337 3 5 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2413 16:29:53.845646 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2414 16:29:53.849319 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2415 16:29:53.852742 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2416 16:29:53.855555 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2417 16:29:53.862116 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2418 16:29:53.865645 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2419 16:29:53.872175 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2420 16:29:53.875380 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2421 16:29:53.878873 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2422 16:29:53.881648 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2423 16:29:53.888480 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2424 16:29:53.892291 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2425 16:29:53.894787 [Byte 0] Lead/lag falling Transition (3, 6, 16)
2426 16:29:53.901739 3 6 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2427 16:29:53.905147 [Byte 0] Lead/lag Transition tap number (2)
2428 16:29:53.908352 [Byte 1] Lead/lag falling Transition (3, 6, 20)
2429 16:29:53.914437 3 6 24 |605 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2430 16:29:53.918253 3 6 28 |1212 202 |(11 11)(11 11) |(0 0)(1 0)| 0
2431 16:29:53.921438 [Byte 1] Lead/lag Transition tap number (3)
2432 16:29:53.924810 3 7 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2433 16:29:53.928127 [Byte 0]First pass (3, 7, 0)
2434 16:29:53.931302 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2435 16:29:53.934129 [Byte 1]First pass (3, 7, 4)
2436 16:29:53.937659 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2437 16:29:53.944115 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2438 16:29:53.947752 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2439 16:29:53.950461 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2440 16:29:53.953942 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2441 16:29:53.957509 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2442 16:29:53.964109 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2443 16:29:53.966971 4 0 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2444 16:29:53.970594 All bytes gating window > 1UI, Early break!
2445 16:29:53.970683
2446 16:29:53.973430 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 20)
2447 16:29:53.973533
2448 16:29:53.976948 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 26)
2449 16:29:53.977045
2450 16:29:53.980569
2451 16:29:53.980673
2452 16:29:53.983318 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2453 16:29:53.983400
2454 16:29:53.986925 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 26)
2455 16:29:53.987012
2456 16:29:53.987088
2457 16:29:53.989731 Write Rank0 MR1 =0x56
2458 16:29:53.989803
2459 16:29:53.993328 best RODT dly(2T, 0.5T) = (2, 3)
2460 16:29:53.993399
2461 16:29:53.996982 best RODT dly(2T, 0.5T) = (2, 3)
2462 16:29:53.997088 ==
2463 16:29:53.999832 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2464 16:29:54.003211 fsp= 1, odt_onoff= 1, Byte mode= 0
2465 16:29:54.003281 ==
2466 16:29:54.010210 Start DQ dly to find pass range UseTestEngine =0
2467 16:29:54.012892 x-axis: bit #, y-axis: DQ dly (-127~63)
2468 16:29:54.012974 RX Vref Scan = 0
2469 16:29:54.016336 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2470 16:29:54.019185 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2471 16:29:54.022452 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2472 16:29:54.025741 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2473 16:29:54.028990 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2474 16:29:54.029098 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2475 16:29:54.032676 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2476 16:29:54.035799 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2477 16:29:54.039023 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2478 16:29:54.042145 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2479 16:29:54.045805 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2480 16:29:54.048915 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2481 16:29:54.052372 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2482 16:29:54.055224 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2483 16:29:54.058829 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2484 16:29:54.058911 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2485 16:29:54.061860 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2486 16:29:54.065338 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2487 16:29:54.068880 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2488 16:29:54.072351 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2489 16:29:54.075134 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2490 16:29:54.078699 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2491 16:29:54.078818 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2492 16:29:54.081542 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2493 16:29:54.085388 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2494 16:29:54.088141 -1, [0] xxxxxxxx xxxxxxxo [MSB]
2495 16:29:54.091782 0, [0] xxxxxxxx xoxxxxxo [MSB]
2496 16:29:54.095101 1, [0] xxxoxxxx ooxxxxxo [MSB]
2497 16:29:54.098443 2, [0] xxxoxxxx ooxxxxxo [MSB]
2498 16:29:54.098556 3, [0] xxooxxxx ooxxxxxo [MSB]
2499 16:29:54.101349 4, [0] xoooxxxx oooxxxxo [MSB]
2500 16:29:54.104975 5, [0] xooooxxo ooooxoxo [MSB]
2501 16:29:54.107833 6, [0] xooooxxo oooooooo [MSB]
2502 16:29:54.111183 7, [0] xooooooo oooooooo [MSB]
2503 16:29:54.114721 33, [0] oooxoooo ooooooox [MSB]
2504 16:29:54.117961 34, [0] oooxoooo ooooooox [MSB]
2505 16:29:54.118081 35, [0] oooxoooo xoooooox [MSB]
2506 16:29:54.121279 36, [0] oooxoooo xxooooox [MSB]
2507 16:29:54.124811 37, [0] ooxxoooo xxooooox [MSB]
2508 16:29:54.127428 38, [0] ooxxoooo xxooooox [MSB]
2509 16:29:54.131034 39, [0] xxxxxoox xxooxoox [MSB]
2510 16:29:54.134546 40, [0] xxxxxoox xxxoxoox [MSB]
2511 16:29:54.138024 41, [0] xxxxxxxx xxxxxxxx [MSB]
2512 16:29:54.140774 iDelay=41, Bit 0, Center 23 (8 ~ 38) 31
2513 16:29:54.144045 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
2514 16:29:54.147286 iDelay=41, Bit 2, Center 19 (3 ~ 36) 34
2515 16:29:54.150609 iDelay=41, Bit 3, Center 16 (1 ~ 32) 32
2516 16:29:54.153975 iDelay=41, Bit 4, Center 21 (5 ~ 38) 34
2517 16:29:54.157098 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2518 16:29:54.160824 iDelay=41, Bit 6, Center 23 (7 ~ 40) 34
2519 16:29:54.163808 iDelay=41, Bit 7, Center 21 (5 ~ 38) 34
2520 16:29:54.167335 iDelay=41, Bit 8, Center 17 (1 ~ 34) 34
2521 16:29:54.170202 iDelay=41, Bit 9, Center 17 (0 ~ 35) 36
2522 16:29:54.177023 iDelay=41, Bit 10, Center 21 (4 ~ 39) 36
2523 16:29:54.180460 iDelay=41, Bit 11, Center 22 (5 ~ 40) 36
2524 16:29:54.183302 iDelay=41, Bit 12, Center 22 (6 ~ 38) 33
2525 16:29:54.186841 iDelay=41, Bit 13, Center 22 (5 ~ 40) 36
2526 16:29:54.190298 iDelay=41, Bit 14, Center 23 (6 ~ 40) 35
2527 16:29:54.193652 iDelay=41, Bit 15, Center 14 (-3 ~ 32) 36
2528 16:29:54.193814 ==
2529 16:29:54.199963 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2530 16:29:54.202914 fsp= 1, odt_onoff= 1, Byte mode= 0
2531 16:29:54.203081 ==
2532 16:29:54.203179 DQS Delay:
2533 16:29:54.206158 DQS0 = 0, DQS1 = 0
2534 16:29:54.206297 DQM Delay:
2535 16:29:54.209870 DQM0 = 20, DQM1 = 19
2536 16:29:54.210020 DQ Delay:
2537 16:29:54.212644 DQ0 =23, DQ1 =21, DQ2 =19, DQ3 =16
2538 16:29:54.216159 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =21
2539 16:29:54.219721 DQ8 =17, DQ9 =17, DQ10 =21, DQ11 =22
2540 16:29:54.222560 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =14
2541 16:29:54.222666
2542 16:29:54.222753
2543 16:29:54.222836 DramC Write-DBI off
2544 16:29:54.226179 ==
2545 16:29:54.229393 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2546 16:29:54.232885 fsp= 1, odt_onoff= 1, Byte mode= 0
2547 16:29:54.232988 ==
2548 16:29:54.235742 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2549 16:29:54.235872
2550 16:29:54.239288 Begin, DQ Scan Range 929~1185
2551 16:29:54.239490
2552 16:29:54.239584
2553 16:29:54.242024 TX Vref Scan disable
2554 16:29:54.245299 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2555 16:29:54.248763 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2556 16:29:54.252159 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2557 16:29:54.255359 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2558 16:29:54.258704 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2559 16:29:54.262213 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2560 16:29:54.268722 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2561 16:29:54.271989 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2562 16:29:54.275240 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2563 16:29:54.278447 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2564 16:29:54.281432 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2565 16:29:54.284894 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2566 16:29:54.287707 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2567 16:29:54.291295 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2568 16:29:54.294830 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2569 16:29:54.297461 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2570 16:29:54.301043 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2571 16:29:54.304532 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2572 16:29:54.308072 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2573 16:29:54.314323 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2574 16:29:54.317884 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2575 16:29:54.320682 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2576 16:29:54.324179 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2577 16:29:54.327581 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2578 16:29:54.331078 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2579 16:29:54.334318 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2580 16:29:54.337074 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2581 16:29:54.340441 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2582 16:29:54.343856 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2583 16:29:54.347217 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2584 16:29:54.350886 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2585 16:29:54.353733 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2586 16:29:54.357170 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2587 16:29:54.363709 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2588 16:29:54.366813 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2589 16:29:54.370402 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2590 16:29:54.373821 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2591 16:29:54.376547 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2592 16:29:54.380224 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2593 16:29:54.383012 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2594 16:29:54.386400 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2595 16:29:54.389679 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2596 16:29:54.392873 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2597 16:29:54.396611 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2598 16:29:54.399597 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2599 16:29:54.402815 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2600 16:29:54.406058 975 |3 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2601 16:29:54.409561 976 |3 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2602 16:29:54.413146 977 |3 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2603 16:29:54.419256 978 |3 6 18|[0] xxxxxxxx xxxxxxxx [MSB]
2604 16:29:54.422540 979 |3 6 19|[0] xxxxxxxx xxxxxxxo [MSB]
2605 16:29:54.426180 980 |3 6 20|[0] xxxxxxxx oxxxxxxo [MSB]
2606 16:29:54.429065 981 |3 6 21|[0] xxxxxxxx ooxxxxxo [MSB]
2607 16:29:54.432776 982 |3 6 22|[0] xxxxxxxx ooxxxxxo [MSB]
2608 16:29:54.436199 983 |3 6 23|[0] xxxxxxxx oooxxxxo [MSB]
2609 16:29:54.439003 984 |3 6 24|[0] xooooxoo oooxoxoo [MSB]
2610 16:29:54.445957 996 |3 6 36|[0] oooooooo ooooooox [MSB]
2611 16:29:54.449347 997 |3 6 37|[0] oooooooo ooooooox [MSB]
2612 16:29:54.452573 998 |3 6 38|[0] oooooooo ooooooox [MSB]
2613 16:29:54.455778 999 |3 6 39|[0] oooooooo ooooooox [MSB]
2614 16:29:54.459365 1000 |3 6 40|[0] oooooooo oxooooox [MSB]
2615 16:29:54.462245 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2616 16:29:54.465801 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2617 16:29:54.468552 1003 |3 6 43|[0] oooxoooo xxxxxxxx [MSB]
2618 16:29:54.471926 1004 |3 6 44|[0] oooxoooo xxxxxxxx [MSB]
2619 16:29:54.475125 1005 |3 6 45|[0] ooxxoooo xxxxxxxx [MSB]
2620 16:29:54.481973 1006 |3 6 46|[0] ooxxooox xxxxxxxx [MSB]
2621 16:29:54.485421 1007 |3 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2622 16:29:54.488284 Byte0, DQ PI dly=993, DQM PI dly= 993
2623 16:29:54.491951 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 33)
2624 16:29:54.492046
2625 16:29:54.494843 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 33)
2626 16:29:54.494916
2627 16:29:54.498463 Byte1, DQ PI dly=989, DQM PI dly= 989
2628 16:29:54.504975 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2629 16:29:54.505076
2630 16:29:54.508267 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2631 16:29:54.508367
2632 16:29:54.508437 ==
2633 16:29:54.514646 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2634 16:29:54.517564 fsp= 1, odt_onoff= 1, Byte mode= 0
2635 16:29:54.517660 ==
2636 16:29:54.521115 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2637 16:29:54.521208
2638 16:29:54.524265 Begin, DQ Scan Range 965~1029
2639 16:29:54.527620 Write Rank0 MR14 =0x0
2640 16:29:54.534348
2641 16:29:54.534447 CH=1, VrefRange= 0, VrefLevel = 0
2642 16:29:54.540460 TX Bit0 (986~1003) 18 994, Bit8 (983~994) 12 988,
2643 16:29:54.544192 TX Bit1 (985~1002) 18 993, Bit9 (983~993) 11 988,
2644 16:29:54.550686 TX Bit2 (984~998) 15 991, Bit10 (985~998) 14 991,
2645 16:29:54.554055 TX Bit3 (984~995) 12 989, Bit11 (987~997) 11 992,
2646 16:29:54.557035 TX Bit4 (986~1001) 16 993, Bit12 (986~996) 11 991,
2647 16:29:54.563838 TX Bit5 (986~1002) 17 994, Bit13 (987~997) 11 992,
2648 16:29:54.567026 TX Bit6 (986~1002) 17 994, Bit14 (986~994) 9 990,
2649 16:29:54.573481 TX Bit7 (986~1000) 15 993, Bit15 (980~990) 11 985,
2650 16:29:54.573610
2651 16:29:54.573673 Write Rank0 MR14 =0x2
2652 16:29:54.582492
2653 16:29:54.582609 CH=1, VrefRange= 0, VrefLevel = 2
2654 16:29:54.589108 TX Bit0 (986~1004) 19 995, Bit8 (983~994) 12 988,
2655 16:29:54.592315 TX Bit1 (985~1002) 18 993, Bit9 (984~994) 11 989,
2656 16:29:54.599346 TX Bit2 (984~998) 15 991, Bit10 (985~999) 15 992,
2657 16:29:54.602250 TX Bit3 (983~996) 14 989, Bit11 (987~998) 12 992,
2658 16:29:54.605800 TX Bit4 (985~1002) 18 993, Bit12 (986~997) 12 991,
2659 16:29:54.612140 TX Bit5 (986~1003) 18 994, Bit13 (986~999) 14 992,
2660 16:29:54.615473 TX Bit6 (985~1002) 18 993, Bit14 (985~995) 11 990,
2661 16:29:54.621811 TX Bit7 (985~1001) 17 993, Bit15 (979~991) 13 985,
2662 16:29:54.621894
2663 16:29:54.621953 Write Rank0 MR14 =0x4
2664 16:29:54.631164
2665 16:29:54.631262 CH=1, VrefRange= 0, VrefLevel = 4
2666 16:29:54.638124 TX Bit0 (986~1005) 20 995, Bit8 (982~995) 14 988,
2667 16:29:54.641268 TX Bit1 (985~1003) 19 994, Bit9 (982~994) 13 988,
2668 16:29:54.647494 TX Bit2 (984~999) 16 991, Bit10 (984~1000) 17 992,
2669 16:29:54.651052 TX Bit3 (983~997) 15 990, Bit11 (986~999) 14 992,
2670 16:29:54.654075 TX Bit4 (985~1003) 19 994, Bit12 (985~999) 15 992,
2671 16:29:54.660871 TX Bit5 (986~1004) 19 995, Bit13 (986~999) 14 992,
2672 16:29:54.664349 TX Bit6 (985~1004) 20 994, Bit14 (985~996) 12 990,
2673 16:29:54.670656 TX Bit7 (985~1001) 17 993, Bit15 (979~992) 14 985,
2674 16:29:54.670767
2675 16:29:54.670831 Write Rank0 MR14 =0x6
2676 16:29:54.680522
2677 16:29:54.680646 CH=1, VrefRange= 0, VrefLevel = 6
2678 16:29:54.686736 TX Bit0 (986~1005) 20 995, Bit8 (981~996) 16 988,
2679 16:29:54.690135 TX Bit1 (985~1004) 20 994, Bit9 (982~995) 14 988,
2680 16:29:54.696380 TX Bit2 (984~1000) 17 992, Bit10 (985~1000) 16 992,
2681 16:29:54.699754 TX Bit3 (983~998) 16 990, Bit11 (986~1000) 15 993,
2682 16:29:54.706705 TX Bit4 (985~1003) 19 994, Bit12 (985~1000) 16 992,
2683 16:29:54.709533 TX Bit5 (986~1005) 20 995, Bit13 (986~1000) 15 993,
2684 16:29:54.713178 TX Bit6 (985~1004) 20 994, Bit14 (985~997) 13 991,
2685 16:29:54.719483 TX Bit7 (985~1002) 18 993, Bit15 (979~993) 15 986,
2686 16:29:54.719650
2687 16:29:54.723182 Write Rank0 MR14 =0x8
2688 16:29:54.729331
2689 16:29:54.729421 CH=1, VrefRange= 0, VrefLevel = 8
2690 16:29:54.736253 TX Bit0 (986~1006) 21 996, Bit8 (981~997) 17 989,
2691 16:29:54.739800 TX Bit1 (984~1005) 22 994, Bit9 (982~996) 15 989,
2692 16:29:54.746142 TX Bit2 (983~1001) 19 992, Bit10 (984~1001) 18 992,
2693 16:29:54.749531 TX Bit3 (982~999) 18 990, Bit11 (985~1000) 16 992,
2694 16:29:54.755801 TX Bit4 (985~1005) 21 995, Bit12 (985~1000) 16 992,
2695 16:29:54.759197 TX Bit5 (986~1005) 20 995, Bit13 (986~1000) 15 993,
2696 16:29:54.762641 TX Bit6 (985~1005) 21 995, Bit14 (985~998) 14 991,
2697 16:29:54.769006 TX Bit7 (985~1003) 19 994, Bit15 (978~993) 16 985,
2698 16:29:54.769110
2699 16:29:54.772005 Write Rank0 MR14 =0xa
2700 16:29:54.778779
2701 16:29:54.782202 CH=1, VrefRange= 0, VrefLevel = 10
2702 16:29:54.785528 TX Bit0 (986~1006) 21 996, Bit8 (980~998) 19 989,
2703 16:29:54.788859 TX Bit1 (984~1005) 22 994, Bit9 (981~996) 16 988,
2704 16:29:54.795053 TX Bit2 (984~1002) 19 993, Bit10 (984~1001) 18 992,
2705 16:29:54.798794 TX Bit3 (982~999) 18 990, Bit11 (986~1001) 16 993,
2706 16:29:54.805123 TX Bit4 (984~1005) 22 994, Bit12 (985~1001) 17 993,
2707 16:29:54.808899 TX Bit5 (985~1005) 21 995, Bit13 (986~1001) 16 993,
2708 16:29:54.811418 TX Bit6 (985~1005) 21 995, Bit14 (984~999) 16 991,
2709 16:29:54.818289 TX Bit7 (985~1004) 20 994, Bit15 (978~993) 16 985,
2710 16:29:54.818418
2711 16:29:54.821955 Write Rank0 MR14 =0xc
2712 16:29:54.828325
2713 16:29:54.831841 CH=1, VrefRange= 0, VrefLevel = 12
2714 16:29:54.835369 TX Bit0 (985~1007) 23 996, Bit8 (980~998) 19 989,
2715 16:29:54.838290 TX Bit1 (984~1006) 23 995, Bit9 (981~997) 17 989,
2716 16:29:54.845231 TX Bit2 (983~1003) 21 993, Bit10 (984~1001) 18 992,
2717 16:29:54.848184 TX Bit3 (981~1000) 20 990, Bit11 (985~1001) 17 993,
2718 16:29:54.855057 TX Bit4 (984~1006) 23 995, Bit12 (985~1001) 17 993,
2719 16:29:54.858541 TX Bit5 (985~1006) 22 995, Bit13 (985~1001) 17 993,
2720 16:29:54.864927 TX Bit6 (985~1006) 22 995, Bit14 (984~1000) 17 992,
2721 16:29:54.867742 TX Bit7 (985~1005) 21 995, Bit15 (978~994) 17 986,
2722 16:29:54.867857
2723 16:29:54.871322 Write Rank0 MR14 =0xe
2724 16:29:54.878331
2725 16:29:54.881490 CH=1, VrefRange= 0, VrefLevel = 14
2726 16:29:54.884976 TX Bit0 (985~1007) 23 996, Bit8 (980~999) 20 989,
2727 16:29:54.888048 TX Bit1 (984~1006) 23 995, Bit9 (980~998) 19 989,
2728 16:29:54.894396 TX Bit2 (983~1003) 21 993, Bit10 (983~1002) 20 992,
2729 16:29:54.897630 TX Bit3 (981~1000) 20 990, Bit11 (984~1002) 19 993,
2730 16:29:54.904447 TX Bit4 (984~1005) 22 994, Bit12 (984~1002) 19 993,
2731 16:29:54.907815 TX Bit5 (985~1006) 22 995, Bit13 (985~1001) 17 993,
2732 16:29:54.914129 TX Bit6 (985~1006) 22 995, Bit14 (984~1000) 17 992,
2733 16:29:54.917827 TX Bit7 (985~1005) 21 995, Bit15 (978~994) 17 986,
2734 16:29:54.917926
2735 16:29:54.920698 Write Rank0 MR14 =0x10
2736 16:29:54.928210
2737 16:29:54.931423 CH=1, VrefRange= 0, VrefLevel = 16
2738 16:29:54.934502 TX Bit0 (985~1007) 23 996, Bit8 (980~1000) 21 990,
2739 16:29:54.937974 TX Bit1 (984~1006) 23 995, Bit9 (980~999) 20 989,
2740 16:29:54.944260 TX Bit2 (982~1004) 23 993, Bit10 (984~1002) 19 993,
2741 16:29:54.947790 TX Bit3 (980~1001) 22 990, Bit11 (985~1002) 18 993,
2742 16:29:54.954315 TX Bit4 (984~1006) 23 995, Bit12 (984~1002) 19 993,
2743 16:29:54.957841 TX Bit5 (985~1006) 22 995, Bit13 (985~1002) 18 993,
2744 16:29:54.964053 TX Bit6 (985~1006) 22 995, Bit14 (983~1001) 19 992,
2745 16:29:54.967492 TX Bit7 (984~1005) 22 994, Bit15 (978~995) 18 986,
2746 16:29:54.967574
2747 16:29:54.971037 wait MRW command Rank0 MR14 =0x12 fired (1)
2748 16:29:54.974024 Write Rank0 MR14 =0x12
2749 16:29:54.982090
2750 16:29:54.985047 CH=1, VrefRange= 0, VrefLevel = 18
2751 16:29:54.988726 TX Bit0 (985~1007) 23 996, Bit8 (979~1000) 22 989,
2752 16:29:54.992209 TX Bit1 (984~1006) 23 995, Bit9 (980~1000) 21 990,
2753 16:29:54.998351 TX Bit2 (982~1005) 24 993, Bit10 (982~1002) 21 992,
2754 16:29:55.001744 TX Bit3 (980~1001) 22 990, Bit11 (984~1002) 19 993,
2755 16:29:55.008356 TX Bit4 (984~1006) 23 995, Bit12 (983~1002) 20 992,
2756 16:29:55.011827 TX Bit5 (985~1006) 22 995, Bit13 (985~1002) 18 993,
2757 16:29:55.017742 TX Bit6 (984~1006) 23 995, Bit14 (983~1001) 19 992,
2758 16:29:55.021119 TX Bit7 (984~1005) 22 994, Bit15 (977~995) 19 986,
2759 16:29:55.021246
2760 16:29:55.024627 Write Rank0 MR14 =0x14
2761 16:29:55.032292
2762 16:29:55.035196 CH=1, VrefRange= 0, VrefLevel = 20
2763 16:29:55.038637 TX Bit0 (985~1008) 24 996, Bit8 (979~1001) 23 990,
2764 16:29:55.041919 TX Bit1 (984~1007) 24 995, Bit9 (980~1000) 21 990,
2765 16:29:55.048486 TX Bit2 (982~1005) 24 993, Bit10 (982~1003) 22 992,
2766 16:29:55.052156 TX Bit3 (980~1002) 23 991, Bit11 (984~1003) 20 993,
2767 16:29:55.058069 TX Bit4 (984~1007) 24 995, Bit12 (983~1003) 21 993,
2768 16:29:55.061560 TX Bit5 (985~1007) 23 996, Bit13 (984~1002) 19 993,
2769 16:29:55.068000 TX Bit6 (984~1007) 24 995, Bit14 (983~1002) 20 992,
2770 16:29:55.071438 TX Bit7 (984~1006) 23 995, Bit15 (977~996) 20 986,
2771 16:29:55.071514
2772 16:29:55.075064 Write Rank0 MR14 =0x16
2773 16:29:55.082329
2774 16:29:55.085837 CH=1, VrefRange= 0, VrefLevel = 22
2775 16:29:55.088729 TX Bit0 (984~1008) 25 996, Bit8 (978~1001) 24 989,
2776 16:29:55.092289 TX Bit1 (984~1007) 24 995, Bit9 (979~1001) 23 990,
2777 16:29:55.098834 TX Bit2 (981~1006) 26 993, Bit10 (982~1003) 22 992,
2778 16:29:55.102360 TX Bit3 (979~1002) 24 990, Bit11 (983~1003) 21 993,
2779 16:29:55.108550 TX Bit4 (984~1007) 24 995, Bit12 (984~1003) 20 993,
2780 16:29:55.112059 TX Bit5 (985~1007) 23 996, Bit13 (984~1003) 20 993,
2781 16:29:55.118068 TX Bit6 (984~1007) 24 995, Bit14 (983~1002) 20 992,
2782 16:29:55.121429 TX Bit7 (984~1006) 23 995, Bit15 (977~997) 21 987,
2783 16:29:55.121509
2784 16:29:55.124782 Write Rank0 MR14 =0x18
2785 16:29:55.132633
2786 16:29:55.136005 CH=1, VrefRange= 0, VrefLevel = 24
2787 16:29:55.138969 TX Bit0 (984~1009) 26 996, Bit8 (978~1001) 24 989,
2788 16:29:55.142533 TX Bit1 (983~1007) 25 995, Bit9 (978~1001) 24 989,
2789 16:29:55.148891 TX Bit2 (981~1006) 26 993, Bit10 (981~1003) 23 992,
2790 16:29:55.152366 TX Bit3 (979~1004) 26 991, Bit11 (983~1003) 21 993,
2791 16:29:55.159126 TX Bit4 (983~1007) 25 995, Bit12 (983~1003) 21 993,
2792 16:29:55.162336 TX Bit5 (984~1008) 25 996, Bit13 (984~1003) 20 993,
2793 16:29:55.168539 TX Bit6 (984~1007) 24 995, Bit14 (983~1002) 20 992,
2794 16:29:55.172223 TX Bit7 (984~1006) 23 995, Bit15 (976~998) 23 987,
2795 16:29:55.172306
2796 16:29:55.175265 Write Rank0 MR14 =0x1a
2797 16:29:55.183098
2798 16:29:55.186646 CH=1, VrefRange= 0, VrefLevel = 26
2799 16:29:55.190199 TX Bit0 (984~1009) 26 996, Bit8 (979~1001) 23 990,
2800 16:29:55.193077 TX Bit1 (983~1008) 26 995, Bit9 (978~1001) 24 989,
2801 16:29:55.199546 TX Bit2 (981~1006) 26 993, Bit10 (981~1004) 24 992,
2802 16:29:55.203033 TX Bit3 (979~1004) 26 991, Bit11 (982~1004) 23 993,
2803 16:29:55.209296 TX Bit4 (983~1007) 25 995, Bit12 (983~1004) 22 993,
2804 16:29:55.212677 TX Bit5 (984~1008) 25 996, Bit13 (983~1004) 22 993,
2805 16:29:55.219152 TX Bit6 (984~1008) 25 996, Bit14 (983~1003) 21 993,
2806 16:29:55.222465 TX Bit7 (983~1007) 25 995, Bit15 (976~998) 23 987,
2807 16:29:55.222545
2808 16:29:55.225813 Write Rank0 MR14 =0x1c
2809 16:29:55.233346
2810 16:29:55.236784 CH=1, VrefRange= 0, VrefLevel = 28
2811 16:29:55.240205 TX Bit0 (984~1009) 26 996, Bit8 (978~1001) 24 989,
2812 16:29:55.243541 TX Bit1 (983~1008) 26 995, Bit9 (978~1001) 24 989,
2813 16:29:55.250028 TX Bit2 (982~1006) 25 994, Bit10 (982~1003) 22 992,
2814 16:29:55.252880 TX Bit3 (978~1005) 28 991, Bit11 (982~1004) 23 993,
2815 16:29:55.259443 TX Bit4 (983~1008) 26 995, Bit12 (983~1004) 22 993,
2816 16:29:55.262949 TX Bit5 (984~1009) 26 996, Bit13 (983~1004) 22 993,
2817 16:29:55.269587 TX Bit6 (983~1008) 26 995, Bit14 (982~1003) 22 992,
2818 16:29:55.272481 TX Bit7 (983~1007) 25 995, Bit15 (976~999) 24 987,
2819 16:29:55.272561
2820 16:29:55.276120 Write Rank0 MR14 =0x1e
2821 16:29:55.283443
2822 16:29:55.286842 CH=1, VrefRange= 0, VrefLevel = 30
2823 16:29:55.290173 TX Bit0 (984~1009) 26 996, Bit8 (978~1001) 24 989,
2824 16:29:55.293506 TX Bit1 (983~1008) 26 995, Bit9 (978~1001) 24 989,
2825 16:29:55.300286 TX Bit2 (982~1006) 25 994, Bit10 (982~1003) 22 992,
2826 16:29:55.303154 TX Bit3 (978~1005) 28 991, Bit11 (982~1004) 23 993,
2827 16:29:55.309724 TX Bit4 (983~1008) 26 995, Bit12 (983~1004) 22 993,
2828 16:29:55.313397 TX Bit5 (984~1009) 26 996, Bit13 (983~1004) 22 993,
2829 16:29:55.319387 TX Bit6 (983~1008) 26 995, Bit14 (982~1003) 22 992,
2830 16:29:55.323117 TX Bit7 (983~1007) 25 995, Bit15 (976~999) 24 987,
2831 16:29:55.323196
2832 16:29:55.325917 Write Rank0 MR14 =0x20
2833 16:29:55.334199
2834 16:29:55.337435 CH=1, VrefRange= 0, VrefLevel = 32
2835 16:29:55.340767 TX Bit0 (984~1009) 26 996, Bit8 (978~1001) 24 989,
2836 16:29:55.343605 TX Bit1 (983~1008) 26 995, Bit9 (978~1001) 24 989,
2837 16:29:55.350430 TX Bit2 (982~1006) 25 994, Bit10 (982~1003) 22 992,
2838 16:29:55.353810 TX Bit3 (978~1005) 28 991, Bit11 (982~1004) 23 993,
2839 16:29:55.360266 TX Bit4 (983~1008) 26 995, Bit12 (983~1004) 22 993,
2840 16:29:55.363708 TX Bit5 (984~1009) 26 996, Bit13 (983~1004) 22 993,
2841 16:29:55.369998 TX Bit6 (983~1008) 26 995, Bit14 (982~1003) 22 992,
2842 16:29:55.373585 TX Bit7 (983~1007) 25 995, Bit15 (976~999) 24 987,
2843 16:29:55.373665
2844 16:29:55.376285 Write Rank0 MR14 =0x22
2845 16:29:55.383953
2846 16:29:55.387392 CH=1, VrefRange= 0, VrefLevel = 34
2847 16:29:55.390903 TX Bit0 (984~1009) 26 996, Bit8 (978~1001) 24 989,
2848 16:29:55.394397 TX Bit1 (983~1008) 26 995, Bit9 (978~1001) 24 989,
2849 16:29:55.400791 TX Bit2 (982~1006) 25 994, Bit10 (982~1003) 22 992,
2850 16:29:55.404090 TX Bit3 (978~1005) 28 991, Bit11 (982~1004) 23 993,
2851 16:29:55.410771 TX Bit4 (983~1008) 26 995, Bit12 (983~1004) 22 993,
2852 16:29:55.413495 TX Bit5 (984~1009) 26 996, Bit13 (983~1004) 22 993,
2853 16:29:55.420517 TX Bit6 (983~1008) 26 995, Bit14 (982~1003) 22 992,
2854 16:29:55.423956 TX Bit7 (983~1007) 25 995, Bit15 (976~999) 24 987,
2855 16:29:55.424038
2856 16:29:55.426699 Write Rank0 MR14 =0x24
2857 16:29:55.434450
2858 16:29:55.437981 CH=1, VrefRange= 0, VrefLevel = 36
2859 16:29:55.440800 TX Bit0 (984~1009) 26 996, Bit8 (978~1001) 24 989,
2860 16:29:55.444226 TX Bit1 (983~1008) 26 995, Bit9 (978~1001) 24 989,
2861 16:29:55.450991 TX Bit2 (982~1006) 25 994, Bit10 (982~1003) 22 992,
2862 16:29:55.453939 TX Bit3 (978~1005) 28 991, Bit11 (982~1004) 23 993,
2863 16:29:55.460774 TX Bit4 (983~1008) 26 995, Bit12 (983~1004) 22 993,
2864 16:29:55.464090 TX Bit5 (984~1009) 26 996, Bit13 (983~1004) 22 993,
2865 16:29:55.470645 TX Bit6 (983~1008) 26 995, Bit14 (982~1003) 22 992,
2866 16:29:55.473538 TX Bit7 (983~1007) 25 995, Bit15 (976~999) 24 987,
2867 16:29:55.473656
2868 16:29:55.473732
2869 16:29:55.476973 TX Vref found, early break! 362< 371
2870 16:29:55.483322 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2871 16:29:55.483403 u1DelayCellOfst[0]=6 cells (5 PI)
2872 16:29:55.486756 u1DelayCellOfst[1]=5 cells (4 PI)
2873 16:29:55.490295 u1DelayCellOfst[2]=3 cells (3 PI)
2874 16:29:55.493724 u1DelayCellOfst[3]=0 cells (0 PI)
2875 16:29:55.496548 u1DelayCellOfst[4]=5 cells (4 PI)
2876 16:29:55.500069 u1DelayCellOfst[5]=6 cells (5 PI)
2877 16:29:55.503554 u1DelayCellOfst[6]=5 cells (4 PI)
2878 16:29:55.507117 u1DelayCellOfst[7]=5 cells (4 PI)
2879 16:29:55.509909 Byte0, DQ PI dly=991, DQM PI dly= 993
2880 16:29:55.513421 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
2881 16:29:55.513499
2882 16:29:55.519747 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
2883 16:29:55.519827
2884 16:29:55.522988 u1DelayCellOfst[8]=2 cells (2 PI)
2885 16:29:55.523065 u1DelayCellOfst[9]=2 cells (2 PI)
2886 16:29:55.526684 u1DelayCellOfst[10]=6 cells (5 PI)
2887 16:29:55.529341 u1DelayCellOfst[11]=7 cells (6 PI)
2888 16:29:55.532843 u1DelayCellOfst[12]=7 cells (6 PI)
2889 16:29:55.536305 u1DelayCellOfst[13]=7 cells (6 PI)
2890 16:29:55.539752 u1DelayCellOfst[14]=6 cells (5 PI)
2891 16:29:55.542697 u1DelayCellOfst[15]=0 cells (0 PI)
2892 16:29:55.545883 Byte1, DQ PI dly=987, DQM PI dly= 990
2893 16:29:55.552894 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
2894 16:29:55.553006
2895 16:29:55.555655 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
2896 16:29:55.555734
2897 16:29:55.558880 Write Rank0 MR14 =0x1c
2898 16:29:55.558982
2899 16:29:55.559120 Final TX Range 0 Vref 28
2900 16:29:55.559205
2901 16:29:55.565962 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2902 16:29:55.566042
2903 16:29:55.572135 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2904 16:29:55.579157 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2905 16:29:55.588741 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2906 16:29:55.588837 Write Rank0 MR3 =0xb0
2907 16:29:55.591698 DramC Write-DBI on
2908 16:29:55.591785 ==
2909 16:29:55.595177 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2910 16:29:55.598019 fsp= 1, odt_onoff= 1, Byte mode= 0
2911 16:29:55.598115 ==
2912 16:29:55.604979 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2913 16:29:55.605061
2914 16:29:55.607789 Begin, DQ Scan Range 710~774
2915 16:29:55.607909
2916 16:29:55.607986
2917 16:29:55.608059 TX Vref Scan disable
2918 16:29:55.611330 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2919 16:29:55.614288 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2920 16:29:55.617913 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2921 16:29:55.624403 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2922 16:29:55.627974 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2923 16:29:55.630782 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2924 16:29:55.634128 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2925 16:29:55.637397 717 |2 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
2926 16:29:55.640691 718 |2 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
2927 16:29:55.644086 719 |2 6 15|[0] xxxxxxxx xxxxxxxx [MSB]
2928 16:29:55.647372 720 |2 6 16|[0] xxxxxxxx xxxxxxxx [MSB]
2929 16:29:55.650477 721 |2 6 17|[0] xxxxxxxx xxxxxxxx [MSB]
2930 16:29:55.654026 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2931 16:29:55.657477 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2932 16:29:55.660310 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
2933 16:29:55.663715 725 |2 6 21|[0] xxxxxxxx oooooooo [MSB]
2934 16:29:55.670030 726 |2 6 22|[0] xxxxxxxx oooooooo [MSB]
2935 16:29:55.673460 727 |2 6 23|[0] xxxxxxxx oooooooo [MSB]
2936 16:29:55.680430 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2937 16:29:55.683885 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2938 16:29:55.686605 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2939 16:29:55.689874 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2940 16:29:55.693282 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
2941 16:29:55.696802 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
2942 16:29:55.700367 753 |2 6 49|[0] oooooooo xxxxxxxx [MSB]
2943 16:29:55.702981 754 |2 6 50|[0] xxxxxxxx xxxxxxxx [MSB]
2944 16:29:55.706323 Byte0, DQ PI dly=740, DQM PI dly= 740
2945 16:29:55.712644 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 36)
2946 16:29:55.712724
2947 16:29:55.716293 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 36)
2948 16:29:55.716371
2949 16:29:55.719718 Byte1, DQ PI dly=734, DQM PI dly= 734
2950 16:29:55.722571 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 30)
2951 16:29:55.722648
2952 16:29:55.729620 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 30)
2953 16:29:55.729703
2954 16:29:55.736300 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2955 16:29:55.742594 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2956 16:29:55.748678 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2957 16:29:55.752158 Write Rank0 MR3 =0x30
2958 16:29:55.752242 DramC Write-DBI off
2959 16:29:55.752302
2960 16:29:55.752356 [DATLAT]
2961 16:29:55.755607 Freq=1600, CH1 RK0, use_rxtx_scan=0
2962 16:29:55.755711
2963 16:29:55.758736 DATLAT Default: 0xf
2964 16:29:55.758813 7, 0xFFFF, sum=0
2965 16:29:55.762020 8, 0xFFFF, sum=0
2966 16:29:55.762098 9, 0xFFFF, sum=0
2967 16:29:55.765267 10, 0xFFFF, sum=0
2968 16:29:55.765345 11, 0xFFFF, sum=0
2969 16:29:55.768376 12, 0xFFFF, sum=0
2970 16:29:55.768455 13, 0xFFFF, sum=0
2971 16:29:55.771797 14, 0x0, sum=1
2972 16:29:55.771877 15, 0x0, sum=2
2973 16:29:55.775035 16, 0x0, sum=3
2974 16:29:55.775113 17, 0x0, sum=4
2975 16:29:55.778514 pattern=2 first_step=14 total pass=5 best_step=16
2976 16:29:55.782073 ==
2977 16:29:55.784862 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2978 16:29:55.788291 fsp= 1, odt_onoff= 1, Byte mode= 0
2979 16:29:55.788370 ==
2980 16:29:55.791732 Start DQ dly to find pass range UseTestEngine =1
2981 16:29:55.795282 x-axis: bit #, y-axis: DQ dly (-127~63)
2982 16:29:55.797948 RX Vref Scan = 1
2983 16:29:55.905303
2984 16:29:55.905420 RX Vref found, early break!
2985 16:29:55.905524
2986 16:29:55.912219 Final RX Vref 11, apply to both rank0 and 1
2987 16:29:55.912300 ==
2988 16:29:55.914882 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2989 16:29:55.918171 fsp= 1, odt_onoff= 1, Byte mode= 0
2990 16:29:55.918250 ==
2991 16:29:55.921525 DQS Delay:
2992 16:29:55.921626 DQS0 = 0, DQS1 = 0
2993 16:29:55.921686 DQM Delay:
2994 16:29:55.924822 DQM0 = 20, DQM1 = 19
2995 16:29:55.924899 DQ Delay:
2996 16:29:55.928355 DQ0 =22, DQ1 =20, DQ2 =19, DQ3 =16
2997 16:29:55.931287 DQ4 =20, DQ5 =22, DQ6 =24, DQ7 =21
2998 16:29:55.934933 DQ8 =17, DQ9 =17, DQ10 =20, DQ11 =21
2999 16:29:55.938353 DQ12 =22, DQ13 =21, DQ14 =22, DQ15 =14
3000 16:29:55.938431
3001 16:29:55.938491
3002 16:29:55.938545
3003 16:29:55.941241 [DramC_TX_OE_Calibration] TA2
3004 16:29:55.944961 Original DQ_B0 (3 6) =30, OEN = 27
3005 16:29:55.947783 Original DQ_B1 (3 6) =30, OEN = 27
3006 16:29:55.951473 23, 0x0, End_B0=23 End_B1=23
3007 16:29:55.954299 24, 0x0, End_B0=24 End_B1=24
3008 16:29:55.954431 25, 0x0, End_B0=25 End_B1=25
3009 16:29:55.957841 26, 0x0, End_B0=26 End_B1=26
3010 16:29:55.961165 27, 0x0, End_B0=27 End_B1=27
3011 16:29:55.964130 28, 0x0, End_B0=28 End_B1=28
3012 16:29:55.967695 29, 0x0, End_B0=29 End_B1=29
3013 16:29:55.967858 30, 0x0, End_B0=30 End_B1=30
3014 16:29:55.971178 31, 0xFFFF, End_B0=30 End_B1=30
3015 16:29:55.977377 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3016 16:29:55.983749 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3017 16:29:55.983837
3018 16:29:55.983897
3019 16:29:55.983952 Write Rank0 MR23 =0x3f
3020 16:29:55.987370 [DQSOSC]
3021 16:29:55.993752 [DQSOSCAuto] RK0, (LSB)MR18= 0xaeae, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps
3022 16:29:56.000087 CH1_RK0: MR19=0x202, MR18=0xAEAE, DQSOSC=459, MR23=63, INC=11, DEC=17
3023 16:29:56.000185 Write Rank0 MR23 =0x3f
3024 16:29:56.003506 [DQSOSC]
3025 16:29:56.010462 [DQSOSCAuto] RK0, (LSB)MR18= 0xadad, (MSB)MR19= 0x202, tDQSOscB0 = 459 ps tDQSOscB1 = 459 ps
3026 16:29:56.013727 CH1 RK0: MR19=202, MR18=ADAD
3027 16:29:56.016943 [RankSwap] Rank num 2, (Multi 1), Rank 1
3028 16:29:56.020166 Write Rank0 MR2 =0xad
3029 16:29:56.020301 [Write Leveling]
3030 16:29:56.023547 delay byte0 byte1 byte2 byte3
3031 16:29:56.023665
3032 16:29:56.027097 10 0 0
3033 16:29:56.027216 11 0 0
3034 16:29:56.027342 12 0 0
3035 16:29:56.030211 13 0 0
3036 16:29:56.030333 14 0 0
3037 16:29:56.033396 15 0 0
3038 16:29:56.033512 16 0 0
3039 16:29:56.036666 17 0 0
3040 16:29:56.036778 18 0 0
3041 16:29:56.036875 19 0 0
3042 16:29:56.039979 20 0 0
3043 16:29:56.040118 21 0 0
3044 16:29:56.043271 22 0 0
3045 16:29:56.043429 23 0 0
3046 16:29:56.043537 24 0 0
3047 16:29:56.046774 25 0 0
3048 16:29:56.046904 26 0 0
3049 16:29:56.049601 27 0 ff
3050 16:29:56.049721 28 0 ff
3051 16:29:56.053265 29 0 ff
3052 16:29:56.053376 30 0 0
3053 16:29:56.056108 31 0 ff
3054 16:29:56.056226 32 0 ff
3055 16:29:56.056327 33 0 ff
3056 16:29:56.059660 34 ff ff
3057 16:29:56.059778 35 ff ff
3058 16:29:56.063080 36 ff ff
3059 16:29:56.063203 37 ff ff
3060 16:29:56.065780 38 ff ff
3061 16:29:56.065900 39 ff ff
3062 16:29:56.069313 40 ff ff
3063 16:29:56.073001 pass bytecount = 0xff (0xff: all bytes pass)
3064 16:29:56.073125
3065 16:29:56.073261 DQS0 dly: 34
3066 16:29:56.075789 DQS1 dly: 31
3067 16:29:56.075895 Write Rank0 MR2 =0x2d
3068 16:29:56.079379 [RankSwap] Rank num 2, (Multi 1), Rank 0
3069 16:29:56.082177 Write Rank1 MR1 =0xd6
3070 16:29:56.082290 [Gating]
3071 16:29:56.082401 ==
3072 16:29:56.089284 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3073 16:29:56.092126 fsp= 1, odt_onoff= 1, Byte mode= 0
3074 16:29:56.092241 ==
3075 16:29:56.095747 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3076 16:29:56.102177 3 1 4 |2c2b 1717 |(11 11)(1 1) |(1 1)(1 1)| 0
3077 16:29:56.105605 3 1 8 |2c2b 3535 |(11 11)(11 11) |(1 1)(1 1)| 0
3078 16:29:56.108993 3 1 12 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3079 16:29:56.115494 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
3080 16:29:56.118677 3 1 20 |2c2b 2322 |(11 11)(11 11) |(1 0)(1 1)| 0
3081 16:29:56.121903 3 1 24 |2c2b 504 |(11 11)(11 11) |(1 0)(1 1)| 0
3082 16:29:56.128211 3 1 28 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 0)| 0
3083 16:29:56.131557 3 2 0 |2c2b 1817 |(11 11)(11 11) |(1 0)(0 0)| 0
3084 16:29:56.134800 3 2 4 |2c2b 3535 |(11 11)(0 0) |(1 0)(0 0)| 0
3085 16:29:56.138440 3 2 8 |2c2b 2020 |(11 11)(11 11) |(1 0)(0 0)| 0
3086 16:29:56.144940 3 2 12 |2c2b 3434 |(11 11)(11 11) |(1 0)(0 0)| 0
3087 16:29:56.148178 3 2 16 |1716 3534 |(11 1)(11 11) |(0 0)(0 0)| 0
3088 16:29:56.151476 3 2 20 |201 201 |(11 11)(11 11) |(0 0)(0 1)| 0
3089 16:29:56.157798 3 2 24 |3534 807 |(11 11)(11 11) |(0 0)(1 1)| 0
3090 16:29:56.160900 3 2 28 |3534 201f |(11 11)(11 11) |(0 0)(1 1)| 0
3091 16:29:56.164518 3 3 0 |3534 3c3c |(11 11)(11 11) |(0 0)(1 1)| 0
3092 16:29:56.170587 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3093 16:29:56.173898 3 3 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3094 16:29:56.177463 3 3 12 |3534 3d3d |(11 11)(0 0) |(0 0)(1 1)| 0
3095 16:29:56.183944 3 3 16 |3534 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
3096 16:29:56.187277 3 3 20 |3534 3c3b |(11 11)(11 11) |(1 1)(1 1)| 0
3097 16:29:56.190590 [Byte 0] Lead/lag Transition tap number (1)
3098 16:29:56.194255 3 3 24 |3534 202 |(11 11)(11 11) |(0 0)(1 1)| 0
3099 16:29:56.200498 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
3100 16:29:56.203426 [Byte 1] Lead/lag Transition tap number (1)
3101 16:29:56.207107 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3102 16:29:56.213673 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3103 16:29:56.217249 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3104 16:29:56.219898 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3105 16:29:56.226920 3 4 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3106 16:29:56.229800 3 4 20 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3107 16:29:56.233069 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3108 16:29:56.236317 3 4 28 |3d3d 3d3d |(11 11)(10 10) |(1 1)(1 1)| 0
3109 16:29:56.242919 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3110 16:29:56.246519 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3111 16:29:56.249987 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3112 16:29:56.256261 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3113 16:29:56.259700 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3114 16:29:56.263242 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3115 16:29:56.269532 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3116 16:29:56.272974 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3117 16:29:56.276134 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3118 16:29:56.282730 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3119 16:29:56.286162 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3120 16:29:56.289001 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3121 16:29:56.295962 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3122 16:29:56.299043 [Byte 0] Lead/lag Transition tap number (2)
3123 16:29:56.301938 [Byte 1] Lead/lag falling Transition (3, 6, 12)
3124 16:29:56.305461 3 6 16 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3125 16:29:56.311814 [Byte 1] Lead/lag Transition tap number (2)
3126 16:29:56.315360 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
3127 16:29:56.318420 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3128 16:29:56.321978 [Byte 0]First pass (3, 6, 24)
3129 16:29:56.324824 3 6 28 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
3130 16:29:56.331789 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3131 16:29:56.331864 [Byte 1]First pass (3, 7, 0)
3132 16:29:56.338083 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3133 16:29:56.341622 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3134 16:29:56.344631 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3135 16:29:56.347964 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3136 16:29:56.351214 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3137 16:29:56.357885 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3138 16:29:56.361145 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3139 16:29:56.365094 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3140 16:29:56.368109 All bytes gating window > 1UI, Early break!
3141 16:29:56.368218
3142 16:29:56.371109 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
3143 16:29:56.374702
3144 16:29:56.377501 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 16)
3145 16:29:56.377628
3146 16:29:56.377688
3147 16:29:56.377743
3148 16:29:56.381082 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
3149 16:29:56.381158
3150 16:29:56.383992 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
3151 16:29:56.384069
3152 16:29:56.384129
3153 16:29:56.387366 Write Rank1 MR1 =0x56
3154 16:29:56.387442
3155 16:29:56.390671 best RODT dly(2T, 0.5T) = (2, 3)
3156 16:29:56.390750
3157 16:29:56.393840 best RODT dly(2T, 0.5T) = (2, 3)
3158 16:29:56.393917 ==
3159 16:29:56.396958 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3160 16:29:56.400786 fsp= 1, odt_onoff= 1, Byte mode= 0
3161 16:29:56.400865 ==
3162 16:29:56.406995 Start DQ dly to find pass range UseTestEngine =0
3163 16:29:56.410615 x-axis: bit #, y-axis: DQ dly (-127~63)
3164 16:29:56.410692 RX Vref Scan = 0
3165 16:29:56.413499 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3166 16:29:56.417099 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3167 16:29:56.419921 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3168 16:29:56.423525 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3169 16:29:56.426412 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3170 16:29:56.429971 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3171 16:29:56.433690 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3172 16:29:56.433768 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3173 16:29:56.436342 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3174 16:29:56.439759 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3175 16:29:56.443304 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3176 16:29:56.446086 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3177 16:29:56.449741 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3178 16:29:56.452665 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3179 16:29:56.456196 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3180 16:29:56.459603 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3181 16:29:56.462422 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3182 16:29:56.462507 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3183 16:29:56.465900 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3184 16:29:56.469296 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3185 16:29:56.472534 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3186 16:29:56.475807 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3187 16:29:56.479158 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3188 16:29:56.482529 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3189 16:29:56.485288 -2, [0] xxxxxxxx xxxxxxxx [MSB]
3190 16:29:56.485360 -1, [0] xxxxxxxx xxxxxxxo [MSB]
3191 16:29:56.488909 0, [0] xxxxxxxx xxxxxxxo [MSB]
3192 16:29:56.492535 1, [0] xxxoxxxx xxxxxxxo [MSB]
3193 16:29:56.495319 2, [0] xxxoxxxx ooxxxxxo [MSB]
3194 16:29:56.498902 3, [0] xxooxxxo ooxxxxxo [MSB]
3195 16:29:56.502319 4, [0] xooooxxo oooxxxxo [MSB]
3196 16:29:56.502395 5, [0] xooooxxo oooxxxxo [MSB]
3197 16:29:56.505019 6, [0] xooooxoo oooxxxxo [MSB]
3198 16:29:56.508257 32, [0] oooxoooo ooooooox [MSB]
3199 16:29:56.511624 33, [0] oooxoooo ooooooox [MSB]
3200 16:29:56.514891 34, [0] oooxoooo xoooooox [MSB]
3201 16:29:56.518280 35, [0] ooxxoooo xoooooox [MSB]
3202 16:29:56.521703 36, [0] ooxxoooo xxooooox [MSB]
3203 16:29:56.524635 37, [0] ooxxoooo xxooooox [MSB]
3204 16:29:56.524700 38, [0] xxxxooox xxooxoox [MSB]
3205 16:29:56.528103 39, [0] xxxxxoox xxxoxoox [MSB]
3206 16:29:56.531085 40, [0] xxxxxoox xxxoxxox [MSB]
3207 16:29:56.534730 41, [0] xxxxxxxx xxxxxxxx [MSB]
3208 16:29:56.537571 iDelay=41, Bit 0, Center 22 (7 ~ 37) 31
3209 16:29:56.541138 iDelay=41, Bit 1, Center 20 (4 ~ 37) 34
3210 16:29:56.543983 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3211 16:29:56.547349 iDelay=41, Bit 3, Center 16 (1 ~ 31) 31
3212 16:29:56.551032 iDelay=41, Bit 4, Center 21 (4 ~ 38) 35
3213 16:29:56.557564 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
3214 16:29:56.560476 iDelay=41, Bit 6, Center 23 (6 ~ 40) 35
3215 16:29:56.563991 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
3216 16:29:56.567148 iDelay=41, Bit 8, Center 17 (2 ~ 33) 32
3217 16:29:56.570730 iDelay=41, Bit 9, Center 18 (2 ~ 35) 34
3218 16:29:56.573750 iDelay=41, Bit 10, Center 21 (4 ~ 38) 35
3219 16:29:56.577211 iDelay=41, Bit 11, Center 23 (7 ~ 40) 34
3220 16:29:56.580621 iDelay=41, Bit 12, Center 22 (7 ~ 37) 31
3221 16:29:56.583820 iDelay=41, Bit 13, Center 23 (7 ~ 39) 33
3222 16:29:56.586991 iDelay=41, Bit 14, Center 23 (7 ~ 40) 34
3223 16:29:56.593540 iDelay=41, Bit 15, Center 15 (-1 ~ 31) 33
3224 16:29:56.593665 ==
3225 16:29:56.596856 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3226 16:29:56.600163 fsp= 1, odt_onoff= 1, Byte mode= 0
3227 16:29:56.600261 ==
3228 16:29:56.602944 DQS Delay:
3229 16:29:56.603067 DQS0 = 0, DQS1 = 0
3230 16:29:56.603131 DQM Delay:
3231 16:29:56.606477 DQM0 = 20, DQM1 = 20
3232 16:29:56.606570 DQ Delay:
3233 16:29:56.609985 DQ0 =22, DQ1 =20, DQ2 =18, DQ3 =16
3234 16:29:56.613385 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
3235 16:29:56.616281 DQ8 =17, DQ9 =18, DQ10 =21, DQ11 =23
3236 16:29:56.619094 DQ12 =22, DQ13 =23, DQ14 =23, DQ15 =15
3237 16:29:56.619193
3238 16:29:56.619277
3239 16:29:56.622683 DramC Write-DBI off
3240 16:29:56.622760 ==
3241 16:29:56.626179 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3242 16:29:56.629395 fsp= 1, odt_onoff= 1, Byte mode= 0
3243 16:29:56.632186 ==
3244 16:29:56.635628 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3245 16:29:56.635707
3246 16:29:56.639235 Begin, DQ Scan Range 927~1183
3247 16:29:56.639312
3248 16:29:56.639371
3249 16:29:56.639458 TX Vref Scan disable
3250 16:29:56.642729 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3251 16:29:56.649056 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3252 16:29:56.652501 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3253 16:29:56.655816 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3254 16:29:56.658663 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3255 16:29:56.662056 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3256 16:29:56.665635 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3257 16:29:56.668606 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3258 16:29:56.672152 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3259 16:29:56.674881 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3260 16:29:56.678111 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3261 16:29:56.681569 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3262 16:29:56.685114 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3263 16:29:56.688561 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3264 16:29:56.694641 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3265 16:29:56.697891 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3266 16:29:56.701144 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3267 16:29:56.704484 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3268 16:29:56.707760 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3269 16:29:56.711065 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3270 16:29:56.714470 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3271 16:29:56.717575 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3272 16:29:56.720846 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3273 16:29:56.724478 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3274 16:29:56.727483 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3275 16:29:56.731059 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3276 16:29:56.734494 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3277 16:29:56.741073 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3278 16:29:56.743936 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3279 16:29:56.747619 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3280 16:29:56.750509 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3281 16:29:56.754187 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3282 16:29:56.756999 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3283 16:29:56.760514 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3284 16:29:56.763871 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3285 16:29:56.767318 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3286 16:29:56.770099 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3287 16:29:56.773405 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3288 16:29:56.776945 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3289 16:29:56.780220 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3290 16:29:56.783632 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3291 16:29:56.787064 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3292 16:29:56.789909 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3293 16:29:56.793535 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3294 16:29:56.799796 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3295 16:29:56.803209 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3296 16:29:56.806740 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3297 16:29:56.809567 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
3298 16:29:56.813162 975 |3 6 15|[0] xxxxxxxx xxxxxxxo [MSB]
3299 16:29:56.816659 976 |3 6 16|[0] xxxxxxxx ooxxxxxo [MSB]
3300 16:29:56.819434 977 |3 6 17|[0] xxxxxxxx ooxxxxxo [MSB]
3301 16:29:56.822687 978 |3 6 18|[0] xxxxxxxx oooxxxxo [MSB]
3302 16:29:56.826053 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3303 16:29:56.829439 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3304 16:29:56.832707 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3305 16:29:56.835847 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
3306 16:29:56.839205 983 |3 6 23|[0] xooooxoo oooooooo [MSB]
3307 16:29:56.847640 994 |3 6 34|[0] oooooooo ooooooox [MSB]
3308 16:29:56.850941 995 |3 6 35|[0] oooooooo oxooooox [MSB]
3309 16:29:56.853777 996 |3 6 36|[0] oooooooo xxooooox [MSB]
3310 16:29:56.857382 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3311 16:29:56.860173 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3312 16:29:56.863849 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
3313 16:29:56.867302 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3314 16:29:56.870129 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3315 16:29:56.873657 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
3316 16:29:56.877075 1003 |3 6 43|[0] ooxxoooo xxxxxxxx [MSB]
3317 16:29:56.880214 1004 |3 6 44|[0] ooxxooox xxxxxxxx [MSB]
3318 16:29:56.886666 1005 |3 6 45|[0] xxxxxxxx xxxxxxxx [MSB]
3319 16:29:56.890164 Byte0, DQ PI dly=992, DQM PI dly= 992
3320 16:29:56.893487 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
3321 16:29:56.893608
3322 16:29:56.896295 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
3323 16:29:56.896358
3324 16:29:56.899935 Byte1, DQ PI dly=985, DQM PI dly= 985
3325 16:29:56.906167 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
3326 16:29:56.906243
3327 16:29:56.909766 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
3328 16:29:56.909843
3329 16:29:56.909912 ==
3330 16:29:56.916619 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3331 16:29:56.920107 fsp= 1, odt_onoff= 1, Byte mode= 0
3332 16:29:56.920205 ==
3333 16:29:56.922859 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3334 16:29:56.922934
3335 16:29:56.926287 Begin, DQ Scan Range 961~1025
3336 16:29:56.926384 Write Rank1 MR14 =0x0
3337 16:29:56.935276
3338 16:29:56.935351 CH=1, VrefRange= 0, VrefLevel = 0
3339 16:29:56.942315 TX Bit0 (985~999) 15 992, Bit8 (979~992) 14 985,
3340 16:29:56.945874 TX Bit1 (985~998) 14 991, Bit9 (979~989) 11 984,
3341 16:29:56.951998 TX Bit2 (983~997) 15 990, Bit10 (980~994) 15 987,
3342 16:29:56.955530 TX Bit3 (981~994) 14 987, Bit11 (982~994) 13 988,
3343 16:29:56.958958 TX Bit4 (984~999) 16 991, Bit12 (982~993) 12 987,
3344 16:29:56.964875 TX Bit5 (985~999) 15 992, Bit13 (983~994) 12 988,
3345 16:29:56.968526 TX Bit6 (984~999) 16 991, Bit14 (981~993) 13 987,
3346 16:29:56.975076 TX Bit7 (985~999) 15 992, Bit15 (976~985) 10 980,
3347 16:29:56.975177
3348 16:29:56.975240 Write Rank1 MR14 =0x2
3349 16:29:56.984102
3350 16:29:56.984176 CH=1, VrefRange= 0, VrefLevel = 2
3351 16:29:56.990545 TX Bit0 (985~1000) 16 992, Bit8 (978~992) 15 985,
3352 16:29:56.993317 TX Bit1 (984~999) 16 991, Bit9 (978~990) 13 984,
3353 16:29:57.000028 TX Bit2 (983~998) 16 990, Bit10 (980~994) 15 987,
3354 16:29:57.003686 TX Bit3 (980~995) 16 987, Bit11 (981~994) 14 987,
3355 16:29:57.006419 TX Bit4 (984~999) 16 991, Bit12 (981~994) 14 987,
3356 16:29:57.013451 TX Bit5 (985~1000) 16 992, Bit13 (982~995) 14 988,
3357 16:29:57.016271 TX Bit6 (984~1000) 17 992, Bit14 (981~994) 14 987,
3358 16:29:57.022872 TX Bit7 (985~1000) 16 992, Bit15 (976~986) 11 981,
3359 16:29:57.022949
3360 16:29:57.023008 Write Rank1 MR14 =0x4
3361 16:29:57.032040
3362 16:29:57.032121 CH=1, VrefRange= 0, VrefLevel = 4
3363 16:29:57.038688 TX Bit0 (985~1001) 17 993, Bit8 (977~993) 17 985,
3364 16:29:57.042147 TX Bit1 (984~1000) 17 992, Bit9 (978~991) 14 984,
3365 16:29:57.049012 TX Bit2 (982~998) 17 990, Bit10 (979~995) 17 987,
3366 16:29:57.051876 TX Bit3 (980~996) 17 988, Bit11 (981~995) 15 988,
3367 16:29:57.055329 TX Bit4 (984~1000) 17 992, Bit12 (980~995) 16 987,
3368 16:29:57.061676 TX Bit5 (985~1000) 16 992, Bit13 (982~996) 15 989,
3369 16:29:57.065340 TX Bit6 (984~1000) 17 992, Bit14 (981~994) 14 987,
3370 16:29:57.071498 TX Bit7 (984~1000) 17 992, Bit15 (974~987) 14 980,
3371 16:29:57.071614
3372 16:29:57.071714 Write Rank1 MR14 =0x6
3373 16:29:57.081072
3374 16:29:57.081203 CH=1, VrefRange= 0, VrefLevel = 6
3375 16:29:57.087894 TX Bit0 (985~1001) 17 993, Bit8 (977~993) 17 985,
3376 16:29:57.091379 TX Bit1 (984~1000) 17 992, Bit9 (978~991) 14 984,
3377 16:29:57.097862 TX Bit2 (982~999) 18 990, Bit10 (979~995) 17 987,
3378 16:29:57.100691 TX Bit3 (979~997) 19 988, Bit11 (980~996) 17 988,
3379 16:29:57.104377 TX Bit4 (984~1001) 18 992, Bit12 (980~995) 16 987,
3380 16:29:57.110801 TX Bit5 (985~1001) 17 993, Bit13 (981~997) 17 989,
3381 16:29:57.114274 TX Bit6 (984~1001) 18 992, Bit14 (980~995) 16 987,
3382 16:29:57.120992 TX Bit7 (984~1001) 18 992, Bit15 (974~989) 16 981,
3383 16:29:57.121083
3384 16:29:57.121145 Write Rank1 MR14 =0x8
3385 16:29:57.130028
3386 16:29:57.130107 CH=1, VrefRange= 0, VrefLevel = 8
3387 16:29:57.136583 TX Bit0 (985~1002) 18 993, Bit8 (977~993) 17 985,
3388 16:29:57.140115 TX Bit1 (984~1001) 18 992, Bit9 (977~992) 16 984,
3389 16:29:57.146778 TX Bit2 (982~999) 18 990, Bit10 (979~996) 18 987,
3390 16:29:57.150522 TX Bit3 (979~997) 19 988, Bit11 (980~996) 17 988,
3391 16:29:57.153261 TX Bit4 (983~1001) 19 992, Bit12 (980~996) 17 988,
3392 16:29:57.159688 TX Bit5 (985~1002) 18 993, Bit13 (980~998) 19 989,
3393 16:29:57.163320 TX Bit6 (983~1002) 20 992, Bit14 (981~996) 16 988,
3394 16:29:57.169887 TX Bit7 (984~1001) 18 992, Bit15 (973~989) 17 981,
3395 16:29:57.170004
3396 16:29:57.170071 Write Rank1 MR14 =0xa
3397 16:29:57.179400
3398 16:29:57.182324 CH=1, VrefRange= 0, VrefLevel = 10
3399 16:29:57.185835 TX Bit0 (984~1002) 19 993, Bit8 (977~994) 18 985,
3400 16:29:57.189215 TX Bit1 (983~1002) 20 992, Bit9 (977~992) 16 984,
3401 16:29:57.195861 TX Bit2 (981~1000) 20 990, Bit10 (979~997) 19 988,
3402 16:29:57.199327 TX Bit3 (979~998) 20 988, Bit11 (980~998) 19 989,
3403 16:29:57.205859 TX Bit4 (983~1002) 20 992, Bit12 (980~997) 18 988,
3404 16:29:57.208731 TX Bit5 (984~1002) 19 993, Bit13 (980~999) 20 989,
3405 16:29:57.212287 TX Bit6 (983~1002) 20 992, Bit14 (980~996) 17 988,
3406 16:29:57.218571 TX Bit7 (984~1002) 19 993, Bit15 (973~991) 19 982,
3407 16:29:57.218698
3408 16:29:57.218767 Write Rank1 MR14 =0xc
3409 16:29:57.228691
3410 16:29:57.232195 CH=1, VrefRange= 0, VrefLevel = 12
3411 16:29:57.235609 TX Bit0 (984~1004) 21 994, Bit8 (976~994) 19 985,
3412 16:29:57.238408 TX Bit1 (983~1003) 21 993, Bit9 (976~993) 18 984,
3413 16:29:57.245067 TX Bit2 (981~1001) 21 991, Bit10 (978~998) 21 988,
3414 16:29:57.248251 TX Bit3 (978~998) 21 988, Bit11 (979~999) 21 989,
3415 16:29:57.255235 TX Bit4 (983~1003) 21 993, Bit12 (979~998) 20 988,
3416 16:29:57.258112 TX Bit5 (984~1004) 21 994, Bit13 (980~999) 20 989,
3417 16:29:57.261733 TX Bit6 (983~1003) 21 993, Bit14 (979~997) 19 988,
3418 16:29:57.268292 TX Bit7 (984~1002) 19 993, Bit15 (973~992) 20 982,
3419 16:29:57.268401
3420 16:29:57.268462 Write Rank1 MR14 =0xe
3421 16:29:57.278416
3422 16:29:57.281289 CH=1, VrefRange= 0, VrefLevel = 14
3423 16:29:57.284800 TX Bit0 (984~1004) 21 994, Bit8 (976~994) 19 985,
3424 16:29:57.288365 TX Bit1 (983~1003) 21 993, Bit9 (976~993) 18 984,
3425 16:29:57.294947 TX Bit2 (981~1001) 21 991, Bit10 (978~998) 21 988,
3426 16:29:57.297524 TX Bit3 (978~998) 21 988, Bit11 (979~999) 21 989,
3427 16:29:57.304713 TX Bit4 (983~1003) 21 993, Bit12 (979~998) 20 988,
3428 16:29:57.307533 TX Bit5 (984~1004) 21 994, Bit13 (980~999) 20 989,
3429 16:29:57.310844 TX Bit6 (983~1003) 21 993, Bit14 (979~997) 19 988,
3430 16:29:57.317886 TX Bit7 (984~1002) 19 993, Bit15 (973~992) 20 982,
3431 16:29:57.317966
3432 16:29:57.318027 Write Rank1 MR14 =0x10
3433 16:29:57.328253
3434 16:29:57.331130 CH=1, VrefRange= 0, VrefLevel = 16
3435 16:29:57.334603 TX Bit0 (984~1004) 21 994, Bit8 (976~994) 19 985,
3436 16:29:57.338163 TX Bit1 (983~1003) 21 993, Bit9 (976~993) 18 984,
3437 16:29:57.344007 TX Bit2 (981~1001) 21 991, Bit10 (978~998) 21 988,
3438 16:29:57.347410 TX Bit3 (978~998) 21 988, Bit11 (979~999) 21 989,
3439 16:29:57.354203 TX Bit4 (983~1003) 21 993, Bit12 (979~998) 20 988,
3440 16:29:57.357533 TX Bit5 (984~1004) 21 994, Bit13 (980~999) 20 989,
3441 16:29:57.360903 TX Bit6 (983~1003) 21 993, Bit14 (979~997) 19 988,
3442 16:29:57.367025 TX Bit7 (984~1002) 19 993, Bit15 (973~992) 20 982,
3443 16:29:57.367105
3444 16:29:57.367166 Write Rank1 MR14 =0x12
3445 16:29:57.377879
3446 16:29:57.381034 CH=1, VrefRange= 0, VrefLevel = 18
3447 16:29:57.384588 TX Bit0 (984~1005) 22 994, Bit8 (975~996) 22 985,
3448 16:29:57.387663 TX Bit1 (982~1005) 24 993, Bit9 (975~994) 20 984,
3449 16:29:57.394437 TX Bit2 (980~1002) 23 991, Bit10 (978~1000) 23 989,
3450 16:29:57.397205 TX Bit3 (978~1000) 23 989, Bit11 (978~1000) 23 989,
3451 16:29:57.404261 TX Bit4 (982~1005) 24 993, Bit12 (978~999) 22 988,
3452 16:29:57.407085 TX Bit5 (984~1005) 22 994, Bit13 (979~1000) 22 989,
3453 16:29:57.410605 TX Bit6 (983~1005) 23 994, Bit14 (979~999) 21 989,
3454 16:29:57.416969 TX Bit7 (983~1005) 23 994, Bit15 (972~993) 22 982,
3455 16:29:57.417048
3456 16:29:57.420414 Write Rank1 MR14 =0x14
3457 16:29:57.427766
3458 16:29:57.431284 CH=1, VrefRange= 0, VrefLevel = 20
3459 16:29:57.434783 TX Bit0 (984~1005) 22 994, Bit8 (975~996) 22 985,
3460 16:29:57.438065 TX Bit1 (982~1005) 24 993, Bit9 (975~994) 20 984,
3461 16:29:57.444516 TX Bit2 (979~1003) 25 991, Bit10 (977~1000) 24 988,
3462 16:29:57.447464 TX Bit3 (978~1000) 23 989, Bit11 (978~1000) 23 989,
3463 16:29:57.454497 TX Bit4 (982~1005) 24 993, Bit12 (978~1000) 23 989,
3464 16:29:57.457441 TX Bit5 (984~1006) 23 995, Bit13 (979~1000) 22 989,
3465 16:29:57.463899 TX Bit6 (982~1005) 24 993, Bit14 (979~1000) 22 989,
3466 16:29:57.467511 TX Bit7 (983~1005) 23 994, Bit15 (971~993) 23 982,
3467 16:29:57.467591
3468 16:29:57.470768 Write Rank1 MR14 =0x16
3469 16:29:57.478576
3470 16:29:57.481896 CH=1, VrefRange= 0, VrefLevel = 22
3471 16:29:57.484617 TX Bit0 (984~1006) 23 995, Bit8 (974~997) 24 985,
3472 16:29:57.488193 TX Bit1 (982~1006) 25 994, Bit9 (975~994) 20 984,
3473 16:29:57.494762 TX Bit2 (979~1004) 26 991, Bit10 (977~1000) 24 988,
3474 16:29:57.497723 TX Bit3 (977~1000) 24 988, Bit11 (978~1000) 23 989,
3475 16:29:57.504417 TX Bit4 (982~1006) 25 994, Bit12 (978~1000) 23 989,
3476 16:29:57.508160 TX Bit5 (983~1006) 24 994, Bit13 (978~1001) 24 989,
3477 16:29:57.514292 TX Bit6 (982~1005) 24 993, Bit14 (978~1000) 23 989,
3478 16:29:57.517645 TX Bit7 (982~1005) 24 993, Bit15 (971~994) 24 982,
3479 16:29:57.517721
3480 16:29:57.521002 Write Rank1 MR14 =0x18
3481 16:29:57.528727
3482 16:29:57.532078 CH=1, VrefRange= 0, VrefLevel = 24
3483 16:29:57.535347 TX Bit0 (984~1006) 23 995, Bit8 (974~998) 25 986,
3484 16:29:57.538967 TX Bit1 (981~1006) 26 993, Bit9 (974~995) 22 984,
3485 16:29:57.545113 TX Bit2 (979~1004) 26 991, Bit10 (977~1000) 24 988,
3486 16:29:57.548811 TX Bit3 (977~1001) 25 989, Bit11 (978~1000) 23 989,
3487 16:29:57.554857 TX Bit4 (981~1006) 26 993, Bit12 (978~1000) 23 989,
3488 16:29:57.558304 TX Bit5 (983~1006) 24 994, Bit13 (978~1001) 24 989,
3489 16:29:57.561882 TX Bit6 (981~1006) 26 993, Bit14 (978~1000) 23 989,
3490 16:29:57.568432 TX Bit7 (983~1006) 24 994, Bit15 (971~994) 24 982,
3491 16:29:57.568509
3492 16:29:57.571363 Write Rank1 MR14 =0x1a
3493 16:29:57.579439
3494 16:29:57.582266 CH=1, VrefRange= 0, VrefLevel = 26
3495 16:29:57.585735 TX Bit0 (984~1006) 23 995, Bit8 (974~998) 25 986,
3496 16:29:57.589164 TX Bit1 (981~1006) 26 993, Bit9 (974~995) 22 984,
3497 16:29:57.595722 TX Bit2 (979~1004) 26 991, Bit10 (977~1000) 24 988,
3498 16:29:57.598800 TX Bit3 (977~1001) 25 989, Bit11 (978~1000) 23 989,
3499 16:29:57.605478 TX Bit4 (981~1006) 26 993, Bit12 (978~1000) 23 989,
3500 16:29:57.608445 TX Bit5 (983~1006) 24 994, Bit13 (978~1001) 24 989,
3501 16:29:57.615079 TX Bit6 (981~1006) 26 993, Bit14 (978~1000) 23 989,
3502 16:29:57.618788 TX Bit7 (983~1006) 24 994, Bit15 (971~994) 24 982,
3503 16:29:57.618864
3504 16:29:57.621569 Write Rank1 MR14 =0x1c
3505 16:29:57.629850
3506 16:29:57.633245 CH=1, VrefRange= 0, VrefLevel = 28
3507 16:29:57.636092 TX Bit0 (983~1007) 25 995, Bit8 (973~999) 27 986,
3508 16:29:57.639551 TX Bit1 (981~1006) 26 993, Bit9 (974~996) 23 985,
3509 16:29:57.645902 TX Bit2 (978~1005) 28 991, Bit10 (976~1001) 26 988,
3510 16:29:57.649414 TX Bit3 (977~1002) 26 989, Bit11 (977~1001) 25 989,
3511 16:29:57.656187 TX Bit4 (981~1006) 26 993, Bit12 (977~1001) 25 989,
3512 16:29:57.658972 TX Bit5 (982~1006) 25 994, Bit13 (977~1001) 25 989,
3513 16:29:57.666167 TX Bit6 (981~1006) 26 993, Bit14 (977~1000) 24 988,
3514 16:29:57.669058 TX Bit7 (981~1006) 26 993, Bit15 (971~995) 25 983,
3515 16:29:57.669159
3516 16:29:57.672319 Write Rank1 MR14 =0x1e
3517 16:29:57.680268
3518 16:29:57.683920 CH=1, VrefRange= 0, VrefLevel = 30
3519 16:29:57.686926 TX Bit0 (983~1007) 25 995, Bit8 (974~999) 26 986,
3520 16:29:57.690594 TX Bit1 (981~1006) 26 993, Bit9 (973~996) 24 984,
3521 16:29:57.697000 TX Bit2 (978~1005) 28 991, Bit10 (976~1001) 26 988,
3522 16:29:57.699916 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3523 16:29:57.706789 TX Bit4 (981~1006) 26 993, Bit12 (977~1001) 25 989,
3524 16:29:57.709438 TX Bit5 (982~1007) 26 994, Bit13 (978~1001) 24 989,
3525 16:29:57.716664 TX Bit6 (981~1006) 26 993, Bit14 (977~1001) 25 989,
3526 16:29:57.719869 TX Bit7 (980~1007) 28 993, Bit15 (970~995) 26 982,
3527 16:29:57.719950
3528 16:29:57.722727 Write Rank1 MR14 =0x20
3529 16:29:57.730563
3530 16:29:57.734024 CH=1, VrefRange= 0, VrefLevel = 32
3531 16:29:57.737328 TX Bit0 (983~1007) 25 995, Bit8 (974~999) 26 986,
3532 16:29:57.740872 TX Bit1 (981~1006) 26 993, Bit9 (973~996) 24 984,
3533 16:29:57.747236 TX Bit2 (978~1005) 28 991, Bit10 (976~1001) 26 988,
3534 16:29:57.750721 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3535 16:29:57.756895 TX Bit4 (981~1006) 26 993, Bit12 (977~1001) 25 989,
3536 16:29:57.760309 TX Bit5 (982~1007) 26 994, Bit13 (978~1001) 24 989,
3537 16:29:57.766934 TX Bit6 (981~1006) 26 993, Bit14 (977~1001) 25 989,
3538 16:29:57.770401 TX Bit7 (980~1007) 28 993, Bit15 (970~995) 26 982,
3539 16:29:57.770498
3540 16:29:57.773372 Write Rank1 MR14 =0x22
3541 16:29:57.781806
3542 16:29:57.784938 CH=1, VrefRange= 0, VrefLevel = 34
3543 16:29:57.787903 TX Bit0 (983~1007) 25 995, Bit8 (974~999) 26 986,
3544 16:29:57.791583 TX Bit1 (981~1006) 26 993, Bit9 (973~996) 24 984,
3545 16:29:57.798093 TX Bit2 (978~1005) 28 991, Bit10 (976~1001) 26 988,
3546 16:29:57.800940 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3547 16:29:57.808097 TX Bit4 (981~1006) 26 993, Bit12 (977~1001) 25 989,
3548 16:29:57.810921 TX Bit5 (982~1007) 26 994, Bit13 (978~1001) 24 989,
3549 16:29:57.817443 TX Bit6 (981~1006) 26 993, Bit14 (977~1001) 25 989,
3550 16:29:57.820981 TX Bit7 (980~1007) 28 993, Bit15 (970~995) 26 982,
3551 16:29:57.821077
3552 16:29:57.823721 Write Rank1 MR14 =0x24
3553 16:29:57.832187
3554 16:29:57.834981 CH=1, VrefRange= 0, VrefLevel = 36
3555 16:29:57.838305 TX Bit0 (983~1007) 25 995, Bit8 (974~999) 26 986,
3556 16:29:57.841890 TX Bit1 (981~1006) 26 993, Bit9 (973~996) 24 984,
3557 16:29:57.848309 TX Bit2 (978~1005) 28 991, Bit10 (976~1001) 26 988,
3558 16:29:57.851775 TX Bit3 (977~1001) 25 989, Bit11 (977~1000) 24 988,
3559 16:29:57.858002 TX Bit4 (981~1006) 26 993, Bit12 (977~1001) 25 989,
3560 16:29:57.861404 TX Bit5 (982~1007) 26 994, Bit13 (978~1001) 24 989,
3561 16:29:57.867769 TX Bit6 (981~1006) 26 993, Bit14 (977~1001) 25 989,
3562 16:29:57.871135 TX Bit7 (980~1007) 28 993, Bit15 (970~995) 26 982,
3563 16:29:57.871212
3564 16:29:57.871271
3565 16:29:57.874507 TX Vref found, early break! 384< 389
3566 16:29:57.881153 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
3567 16:29:57.881230 u1DelayCellOfst[0]=7 cells (6 PI)
3568 16:29:57.884593 u1DelayCellOfst[1]=5 cells (4 PI)
3569 16:29:57.887476 u1DelayCellOfst[2]=2 cells (2 PI)
3570 16:29:57.891041 u1DelayCellOfst[3]=0 cells (0 PI)
3571 16:29:57.893963 u1DelayCellOfst[4]=5 cells (4 PI)
3572 16:29:57.897463 u1DelayCellOfst[5]=6 cells (5 PI)
3573 16:29:57.901060 u1DelayCellOfst[6]=5 cells (4 PI)
3574 16:29:57.903958 u1DelayCellOfst[7]=5 cells (4 PI)
3575 16:29:57.907523 Byte0, DQ PI dly=989, DQM PI dly= 992
3576 16:29:57.910431 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3577 16:29:57.910501
3578 16:29:57.917127 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3579 16:29:57.917204
3580 16:29:57.920627 u1DelayCellOfst[8]=5 cells (4 PI)
3581 16:29:57.920702 u1DelayCellOfst[9]=2 cells (2 PI)
3582 16:29:57.923539 u1DelayCellOfst[10]=7 cells (6 PI)
3583 16:29:57.927108 u1DelayCellOfst[11]=7 cells (6 PI)
3584 16:29:57.930690 u1DelayCellOfst[12]=9 cells (7 PI)
3585 16:29:57.933492 u1DelayCellOfst[13]=9 cells (7 PI)
3586 16:29:57.936889 u1DelayCellOfst[14]=9 cells (7 PI)
3587 16:29:57.940121 u1DelayCellOfst[15]=0 cells (0 PI)
3588 16:29:57.943334 Byte1, DQ PI dly=982, DQM PI dly= 985
3589 16:29:57.949969 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3590 16:29:57.950045
3591 16:29:57.953311 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3592 16:29:57.953388
3593 16:29:57.956940 Write Rank1 MR14 =0x1e
3594 16:29:57.957015
3595 16:29:57.957074 Final TX Range 0 Vref 30
3596 16:29:57.957129
3597 16:29:57.962992 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3598 16:29:57.963068
3599 16:29:57.969791 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3600 16:29:57.976362 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3601 16:29:57.986094 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3602 16:29:57.986175 Write Rank1 MR3 =0xb0
3603 16:29:57.989166 DramC Write-DBI on
3604 16:29:57.989241 ==
3605 16:29:57.992464 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3606 16:29:57.995892 fsp= 1, odt_onoff= 1, Byte mode= 0
3607 16:29:57.995968 ==
3608 16:29:58.002507 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3609 16:29:58.002654
3610 16:29:58.005399 Begin, DQ Scan Range 705~769
3611 16:29:58.005509
3612 16:29:58.005635
3613 16:29:58.005695 TX Vref Scan disable
3614 16:29:58.009050 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3615 16:29:58.011944 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3616 16:29:58.015495 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3617 16:29:58.022009 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3618 16:29:58.024800 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3619 16:29:58.028411 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3620 16:29:58.031316 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3621 16:29:58.035039 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3622 16:29:58.037994 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3623 16:29:58.041756 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3624 16:29:58.044694 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3625 16:29:58.048309 716 |2 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3626 16:29:58.051041 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3627 16:29:58.054368 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3628 16:29:58.057691 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3629 16:29:58.061390 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3630 16:29:58.064097 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3631 16:29:58.067510 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3632 16:29:58.074496 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3633 16:29:58.077214 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3634 16:29:58.084449 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3635 16:29:58.087765 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3636 16:29:58.091122 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3637 16:29:58.094355 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3638 16:29:58.097912 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3639 16:29:58.100559 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3640 16:29:58.103857 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3641 16:29:58.107192 752 |2 6 48|[0] oooooooo xxxxxxxx [MSB]
3642 16:29:58.110318 753 |2 6 49|[0] xxxxxxxx xxxxxxxx [MSB]
3643 16:29:58.113742 Byte0, DQ PI dly=738, DQM PI dly= 738
3644 16:29:58.120225 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 34)
3645 16:29:58.120356
3646 16:29:58.123793 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 34)
3647 16:29:58.123896
3648 16:29:58.126667 Byte1, DQ PI dly=730, DQM PI dly= 730
3649 16:29:58.130210 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
3650 16:29:58.130311
3651 16:29:58.136806 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
3652 16:29:58.136906
3653 16:29:58.143148 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3654 16:29:58.149654 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3655 16:29:58.156301 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3656 16:29:58.159859 Write Rank1 MR3 =0x30
3657 16:29:58.159954 DramC Write-DBI off
3658 16:29:58.160043
3659 16:29:58.160129 [DATLAT]
3660 16:29:58.163297 Freq=1600, CH1 RK1, use_rxtx_scan=0
3661 16:29:58.163402
3662 16:29:58.166197 DATLAT Default: 0x10
3663 16:29:58.169958 7, 0xFFFF, sum=0
3664 16:29:58.170039 8, 0xFFFF, sum=0
3665 16:29:58.170101 9, 0xFFFF, sum=0
3666 16:29:58.173157 10, 0xFFFF, sum=0
3667 16:29:58.173237 11, 0xFFFF, sum=0
3668 16:29:58.175862 12, 0xFFFF, sum=0
3669 16:29:58.175941 13, 0xFFFF, sum=0
3670 16:29:58.179127 14, 0x0, sum=1
3671 16:29:58.179206 15, 0x0, sum=2
3672 16:29:58.182455 16, 0x0, sum=3
3673 16:29:58.182535 17, 0x0, sum=4
3674 16:29:58.185955 pattern=2 first_step=14 total pass=5 best_step=16
3675 16:29:58.189406 ==
3676 16:29:58.192358 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3677 16:29:58.195861 fsp= 1, odt_onoff= 1, Byte mode= 0
3678 16:29:58.195942 ==
3679 16:29:58.199306 Start DQ dly to find pass range UseTestEngine =1
3680 16:29:58.205736 x-axis: bit #, y-axis: DQ dly (-127~63)
3681 16:29:58.205810 RX Vref Scan = 0
3682 16:29:58.209079 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3683 16:29:58.212408 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3684 16:29:58.215766 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3685 16:29:58.218613 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3686 16:29:58.218706 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3687 16:29:58.221802 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3688 16:29:58.225014 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3689 16:29:58.228966 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3690 16:29:58.231853 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3691 16:29:58.234917 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3692 16:29:58.238427 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3693 16:29:58.242116 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3694 16:29:58.245099 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3695 16:29:58.248699 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3696 16:29:58.248799 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3697 16:29:58.251630 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3698 16:29:58.254512 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3699 16:29:58.258108 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3700 16:29:58.260993 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3701 16:29:58.264559 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3702 16:29:58.267894 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3703 16:29:58.270801 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3704 16:29:58.270890 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3705 16:29:58.274311 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3706 16:29:58.277411 -2, [0] xxxxxxxx xxxxxxxx [MSB]
3707 16:29:58.280973 -1, [0] xxxxxxxx xxxxxxxo [MSB]
3708 16:29:58.284522 0, [0] xxxoxxxx xxxxxxxo [MSB]
3709 16:29:58.287402 1, [0] xxxoxxxx xoxxxxxo [MSB]
3710 16:29:58.290743 2, [0] xoxoxxxx ooxxxxxo [MSB]
3711 16:29:58.290845 3, [0] xooooxxx ooxxxxxo [MSB]
3712 16:29:58.294006 4, [0] xooooxxx oooxxxxo [MSB]
3713 16:29:58.297255 5, [0] xoooooxo oooxxxxo [MSB]
3714 16:29:58.300505 6, [0] ooooooxo ooooxxoo [MSB]
3715 16:29:58.303774 32, [0] oooooooo ooooooox [MSB]
3716 16:29:58.307642 33, [0] oooxoooo ooooooox [MSB]
3717 16:29:58.310620 34, [0] oooxoooo xoooooox [MSB]
3718 16:29:58.313641 35, [0] ooxxoooo xxooooox [MSB]
3719 16:29:58.317196 36, [0] ooxxoooo xxooooox [MSB]
3720 16:29:58.320617 37, [0] ooxxoooo xxooooox [MSB]
3721 16:29:58.323978 38, [0] oxxxooox xxooooox [MSB]
3722 16:29:58.324076 39, [0] xxxxxoox xxxoxoox [MSB]
3723 16:29:58.327275 40, [0] xxxxxoox xxxxxxxx [MSB]
3724 16:29:58.330547 41, [0] xxxxxxxx xxxxxxxx [MSB]
3725 16:29:58.333927 iDelay=41, Bit 0, Center 22 (6 ~ 38) 33
3726 16:29:58.337142 iDelay=41, Bit 1, Center 19 (2 ~ 37) 36
3727 16:29:58.340742 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3728 16:29:58.343171 iDelay=41, Bit 3, Center 16 (0 ~ 32) 33
3729 16:29:58.350171 iDelay=41, Bit 4, Center 20 (3 ~ 38) 36
3730 16:29:58.353061 iDelay=41, Bit 5, Center 22 (5 ~ 40) 36
3731 16:29:58.356786 iDelay=41, Bit 6, Center 23 (7 ~ 40) 34
3732 16:29:58.359781 iDelay=41, Bit 7, Center 21 (5 ~ 37) 33
3733 16:29:58.362769 iDelay=41, Bit 8, Center 17 (2 ~ 33) 32
3734 16:29:58.366284 iDelay=41, Bit 9, Center 17 (1 ~ 34) 34
3735 16:29:58.369898 iDelay=41, Bit 10, Center 21 (4 ~ 38) 35
3736 16:29:58.372728 iDelay=41, Bit 11, Center 22 (6 ~ 39) 34
3737 16:29:58.376199 iDelay=41, Bit 12, Center 22 (7 ~ 38) 32
3738 16:29:58.379202 iDelay=41, Bit 13, Center 23 (7 ~ 39) 33
3739 16:29:58.382841 iDelay=41, Bit 14, Center 22 (6 ~ 39) 34
3740 16:29:58.389319 iDelay=41, Bit 15, Center 15 (-1 ~ 31) 33
3741 16:29:58.389402 ==
3742 16:29:58.392258 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3743 16:29:58.395855 fsp= 1, odt_onoff= 1, Byte mode= 0
3744 16:29:58.395957 ==
3745 16:29:58.399400 DQS Delay:
3746 16:29:58.399476 DQS0 = 0, DQS1 = 0
3747 16:29:58.399537 DQM Delay:
3748 16:29:58.402160 DQM0 = 20, DQM1 = 19
3749 16:29:58.402256 DQ Delay:
3750 16:29:58.405510 DQ0 =22, DQ1 =19, DQ2 =18, DQ3 =16
3751 16:29:58.409011 DQ4 =20, DQ5 =22, DQ6 =23, DQ7 =21
3752 16:29:58.412401 DQ8 =17, DQ9 =17, DQ10 =21, DQ11 =22
3753 16:29:58.415657 DQ12 =22, DQ13 =23, DQ14 =22, DQ15 =15
3754 16:29:58.415723
3755 16:29:58.415779
3756 16:29:58.415832
3757 16:29:58.419056 [DramC_TX_OE_Calibration] TA2
3758 16:29:58.421713 Original DQ_B0 (3 6) =30, OEN = 27
3759 16:29:58.425184 Original DQ_B1 (3 6) =30, OEN = 27
3760 16:29:58.428558 23, 0x0, End_B0=23 End_B1=23
3761 16:29:58.432151 24, 0x0, End_B0=24 End_B1=24
3762 16:29:58.432246 25, 0x0, End_B0=25 End_B1=25
3763 16:29:58.435004 26, 0x0, End_B0=26 End_B1=26
3764 16:29:58.438457 27, 0x0, End_B0=27 End_B1=27
3765 16:29:58.442023 28, 0x0, End_B0=28 End_B1=28
3766 16:29:58.444945 29, 0x0, End_B0=29 End_B1=29
3767 16:29:58.445051 30, 0x0, End_B0=30 End_B1=30
3768 16:29:58.448454 31, 0xFFFF, End_B0=30 End_B1=30
3769 16:29:58.454685 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3770 16:29:58.461681 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3771 16:29:58.461760
3772 16:29:58.461822
3773 16:29:58.461878 Write Rank1 MR23 =0x3f
3774 16:29:58.464784 [DQSOSC]
3775 16:29:58.471260 [DQSOSCAuto] RK1, (LSB)MR18= 0xb4b4, (MSB)MR19= 0x202, tDQSOscB0 = 455 ps tDQSOscB1 = 455 ps
3776 16:29:58.477490 CH1_RK1: MR19=0x202, MR18=0xB4B4, DQSOSC=455, MR23=63, INC=11, DEC=17
3777 16:29:58.481180 Write Rank1 MR23 =0x3f
3778 16:29:58.481282 [DQSOSC]
3779 16:29:58.487671 [DQSOSCAuto] RK1, (LSB)MR18= 0xb3b3, (MSB)MR19= 0x202, tDQSOscB0 = 455 ps tDQSOscB1 = 455 ps
3780 16:29:58.490598 CH1 RK1: MR19=202, MR18=B3B3
3781 16:29:58.494132 [RxdqsGatingPostProcess] freq 1600
3782 16:29:58.500573 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3783 16:29:58.500673 Rank: 0
3784 16:29:58.504166 best DQS0 dly(2T, 0.5T) = (2, 6)
3785 16:29:58.507043 best DQS1 dly(2T, 0.5T) = (2, 6)
3786 16:29:58.510770 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3787 16:29:58.513730 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3788 16:29:58.513826 Rank: 1
3789 16:29:58.517254 best DQS0 dly(2T, 0.5T) = (2, 6)
3790 16:29:58.519990 best DQS1 dly(2T, 0.5T) = (2, 6)
3791 16:29:58.523510 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3792 16:29:58.526954 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3793 16:29:58.530276 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3794 16:29:58.533516 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3795 16:29:58.539860 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3796 16:29:58.539980
3797 16:29:58.540043
3798 16:29:58.543120 [Calibration Summary] Freqency 1600
3799 16:29:58.543199 CH 0, Rank 0
3800 16:29:58.543260 All Pass.
3801 16:29:58.543315
3802 16:29:58.546729 CH 0, Rank 1
3803 16:29:58.546807 All Pass.
3804 16:29:58.546867
3805 16:29:58.549957 CH 1, Rank 0
3806 16:29:58.550037 All Pass.
3807 16:29:58.550098
3808 16:29:58.550154 CH 1, Rank 1
3809 16:29:58.553410 All Pass.
3810 16:29:58.553512
3811 16:29:58.559333 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3812 16:29:58.565917 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3813 16:29:58.572713 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3814 16:29:58.572798 Write Rank0 MR3 =0xb0
3815 16:29:58.579034 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3816 16:29:58.589115 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3817 16:29:58.596175 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3818 16:29:58.596307 Write Rank1 MR3 =0xb0
3819 16:29:58.602638 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3820 16:29:58.609246 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3821 16:29:58.618624 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3822 16:29:58.618748 Write Rank0 MR3 =0xb0
3823 16:29:58.625289 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3824 16:29:58.631637 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3825 16:29:58.638859 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3826 16:29:58.641860 Write Rank1 MR3 =0xb0
3827 16:29:58.645297 DramC Write-DBI on
3828 16:29:58.648687 [GetDramInforAfterCalByMRR] Vendor 6.
3829 16:29:58.651429 [GetDramInforAfterCalByMRR] Revision 505.
3830 16:29:58.651550 MR8 1111
3831 16:29:58.654860 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3832 16:29:58.658038 MR8 1111
3833 16:29:58.661141 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3834 16:29:58.661260 MR8 1111
3835 16:29:58.667951 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3836 16:29:58.668095 MR8 1111
3837 16:29:58.674419 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3838 16:29:58.680837 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3839 16:29:58.684176 Write Rank0 MR13 =0xd0
3840 16:29:58.687614 Write Rank1 MR13 =0xd0
3841 16:29:58.687703 Write Rank0 MR13 =0xd0
3842 16:29:58.690502 Write Rank1 MR13 =0xd0
3843 16:29:58.693975 Save calibration result to emmc
3844 16:29:58.694057
3845 16:29:58.694119
3846 16:29:58.697363 [DramcModeReg_Check] Freq_1600, FSP_1
3847 16:29:58.697460 FSP_1, CH_0, RK0
3848 16:29:58.700786 Write Rank0 MR13 =0xd8
3849 16:29:58.703491 MR12 = 0x5e (global = 0x5e) match
3850 16:29:58.707307 MR14 = 0x1e (global = 0x1e) match
3851 16:29:58.707413 FSP_1, CH_0, RK1
3852 16:29:58.710217 Write Rank1 MR13 =0xd8
3853 16:29:58.713859 MR12 = 0x5e (global = 0x5e) match
3854 16:29:58.716694 MR14 = 0x1c (global = 0x1c) match
3855 16:29:58.720262 FSP_1, CH_1, RK0
3856 16:29:58.720340 Write Rank0 MR13 =0xd8
3857 16:29:58.723291 MR12 = 0x5e (global = 0x5e) match
3858 16:29:58.726908 MR14 = 0x1c (global = 0x1c) match
3859 16:29:58.729794 FSP_1, CH_1, RK1
3860 16:29:58.729873 Write Rank1 MR13 =0xd8
3861 16:29:58.733403 MR12 = 0x5c (global = 0x5c) match
3862 16:29:58.736315 MR14 = 0x1e (global = 0x1e) match
3863 16:29:58.736395
3864 16:29:58.742725 [MEM_TEST] 02: After DFS, before run time config
3865 16:29:58.749869 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3866 16:29:58.749948
3867 16:29:58.752831 [TA2_TEST]
3868 16:29:58.752909 === TA2 HW
3869 16:29:58.756250 TA2 PAT: XTALK
3870 16:29:58.759700 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3871 16:29:58.762637 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3872 16:29:58.769083 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3873 16:29:58.772482 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3874 16:29:58.772561
3875 16:29:58.775922
3876 16:29:58.775998 Settings after calibration
3877 16:29:58.776058
3878 16:29:58.779347 [DramcRunTimeConfig]
3879 16:29:58.782512 TransferPLLToSPMControl - MODE SW PHYPLL
3880 16:29:58.782591 TX_TRACKING: ON
3881 16:29:58.785237 RX_TRACKING: ON
3882 16:29:58.785350 HW_GATING: ON
3883 16:29:58.788558 HW_GATING DBG: OFF
3884 16:29:58.788635 ddr_geometry:1
3885 16:29:58.792770 ddr_geometry:1
3886 16:29:58.792870 ddr_geometry:1
3887 16:29:58.792954 ddr_geometry:1
3888 16:29:58.795125 ddr_geometry:1
3889 16:29:58.795201 ddr_geometry:1
3890 16:29:58.798643 ddr_geometry:1
3891 16:29:58.798735 ddr_geometry:1
3892 16:29:58.801736 High Freq DUMMY_READ_FOR_TRACKING: ON
3893 16:29:58.805487 ZQCS_ENABLE_LP4: OFF
3894 16:29:58.808756 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3895 16:29:58.811819 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3896 16:29:58.811896 SPM_CONTROL_AFTERK: ON
3897 16:29:58.814992 IMPEDANCE_TRACKING: ON
3898 16:29:58.815086 TEMP_SENSOR: ON
3899 16:29:58.818451 PER_BANK_REFRESH: ON
3900 16:29:58.821709 HW_SAVE_FOR_SR: ON
3901 16:29:58.824957 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3902 16:29:58.825033 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3903 16:29:58.831258 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3904 16:29:58.831340 Read ODT Tracking: ON
3905 16:29:58.834956 =========================
3906 16:29:58.835025
3907 16:29:58.835089 [TA2_TEST]
3908 16:29:58.837806 === TA2 HW
3909 16:29:58.841384 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3910 16:29:58.848002 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3911 16:29:58.850983 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3912 16:29:58.854632 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3913 16:29:58.857530
3914 16:29:58.861188 [MEM_TEST] 03: After run time config
3915 16:29:58.867690 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3916 16:29:58.874069 [complex_mem_test] start addr:0x40024000, len:131072
3917 16:29:59.077432 1st complex R/W mem test pass
3918 16:29:59.084294 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3919 16:29:59.087381 sync preloader write leveling
3920 16:29:59.090866 sync preloader cbt_mr12
3921 16:29:59.093968 sync preloader cbt_clk_dly
3922 16:29:59.094043 sync preloader cbt_cmd_dly
3923 16:29:59.097269 sync preloader cbt_cs
3924 16:29:59.100817 sync preloader cbt_ca_perbit_delay
3925 16:29:59.104311 sync preloader clk_delay
3926 16:29:59.104413 sync preloader dqs_delay
3927 16:29:59.107175 sync preloader u1Gating2T_Save
3928 16:29:59.110702 sync preloader u1Gating05T_Save
3929 16:29:59.113687 sync preloader u1Gatingfine_tune_Save
3930 16:29:59.116655 sync preloader u1Gatingucpass_count_Save
3931 16:29:59.120064 sync preloader u1TxWindowPerbitVref_Save
3932 16:29:59.123724 sync preloader u1TxCenter_min_Save
3933 16:29:59.126659 sync preloader u1TxCenter_max_Save
3934 16:29:59.130180 sync preloader u1Txwin_center_Save
3935 16:29:59.133118 sync preloader u1Txfirst_pass_Save
3936 16:29:59.136623 sync preloader u1Txlast_pass_Save
3937 16:29:59.140197 sync preloader u1RxDatlat_Save
3938 16:29:59.142993 sync preloader u1RxWinPerbitVref_Save
3939 16:29:59.146525 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3940 16:29:59.150217 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3941 16:29:59.152983 sync preloader delay_cell_unit
3942 16:29:59.159486 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3943 16:29:59.163082 sync preloader write leveling
3944 16:29:59.166089 sync preloader cbt_mr12
3945 16:29:59.166166 sync preloader cbt_clk_dly
3946 16:29:59.169532 sync preloader cbt_cmd_dly
3947 16:29:59.172489 sync preloader cbt_cs
3948 16:29:59.176143 sync preloader cbt_ca_perbit_delay
3949 16:29:59.176220 sync preloader clk_delay
3950 16:29:59.179614 sync preloader dqs_delay
3951 16:29:59.182304 sync preloader u1Gating2T_Save
3952 16:29:59.185829 sync preloader u1Gating05T_Save
3953 16:29:59.189303 sync preloader u1Gatingfine_tune_Save
3954 16:29:59.192721 sync preloader u1Gatingucpass_count_Save
3955 16:29:59.195531 sync preloader u1TxWindowPerbitVref_Save
3956 16:29:59.199234 sync preloader u1TxCenter_min_Save
3957 16:29:59.202574 sync preloader u1TxCenter_max_Save
3958 16:29:59.205919 sync preloader u1Txwin_center_Save
3959 16:29:59.209131 sync preloader u1Txfirst_pass_Save
3960 16:29:59.212106 sync preloader u1Txlast_pass_Save
3961 16:29:59.215367 sync preloader u1RxDatlat_Save
3962 16:29:59.218587 sync preloader u1RxWinPerbitVref_Save
3963 16:29:59.221765 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3964 16:29:59.224870 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3965 16:29:59.228185 sync preloader delay_cell_unit
3966 16:29:59.234734 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3967 16:29:59.238232 sync preloader write leveling
3968 16:29:59.238333 sync preloader cbt_mr12
3969 16:29:59.241523 sync preloader cbt_clk_dly
3970 16:29:59.244532 sync preloader cbt_cmd_dly
3971 16:29:59.248289 sync preloader cbt_cs
3972 16:29:59.248365 sync preloader cbt_ca_perbit_delay
3973 16:29:59.251279 sync preloader clk_delay
3974 16:29:59.254876 sync preloader dqs_delay
3975 16:29:59.257694 sync preloader u1Gating2T_Save
3976 16:29:59.261260 sync preloader u1Gating05T_Save
3977 16:29:59.264802 sync preloader u1Gatingfine_tune_Save
3978 16:29:59.267743 sync preloader u1Gatingucpass_count_Save
3979 16:29:59.271425 sync preloader u1TxWindowPerbitVref_Save
3980 16:29:59.274315 sync preloader u1TxCenter_min_Save
3981 16:29:59.277910 sync preloader u1TxCenter_max_Save
3982 16:29:59.280920 sync preloader u1Txwin_center_Save
3983 16:29:59.284376 sync preloader u1Txfirst_pass_Save
3984 16:29:59.287369 sync preloader u1Txlast_pass_Save
3985 16:29:59.287446 sync preloader u1RxDatlat_Save
3986 16:29:59.290342 sync preloader u1RxWinPerbitVref_Save
3987 16:29:59.297278 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3988 16:29:59.300210 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3989 16:29:59.303865 sync preloader delay_cell_unit
3990 16:29:59.306856 just_for_test_dump_coreboot_params dump all params
3991 16:29:59.310533 dump source = 0x0
3992 16:29:59.310644 dump params frequency:1600
3993 16:29:59.313453 dump params rank number:2
3994 16:29:59.313562
3995 16:29:59.317202 dump params write leveling
3996 16:29:59.320034 write leveling[0][0][0] = 0x1f
3997 16:29:59.322924 write leveling[0][0][1] = 0x17
3998 16:29:59.323017 write leveling[0][1][0] = 0x1f
3999 16:29:59.326407 write leveling[0][1][1] = 0x16
4000 16:29:59.329879 write leveling[1][0][0] = 0x23
4001 16:29:59.333198 write leveling[1][0][1] = 0x21
4002 16:29:59.336473 write leveling[1][1][0] = 0x22
4003 16:29:59.339735 write leveling[1][1][1] = 0x1f
4004 16:29:59.339810 dump params cbt_cs
4005 16:29:59.342769 cbt_cs[0][0] = 0x7
4006 16:29:59.342868 cbt_cs[0][1] = 0x7
4007 16:29:59.345995 cbt_cs[1][0] = 0xa
4008 16:29:59.346087 cbt_cs[1][1] = 0xa
4009 16:29:59.349324 dump params cbt_mr12
4010 16:29:59.349416 cbt_mr12[0][0] = 0x1e
4011 16:29:59.352432 cbt_mr12[0][1] = 0x1e
4012 16:29:59.355857 cbt_mr12[1][0] = 0x1e
4013 16:29:59.355933 cbt_mr12[1][1] = 0x1c
4014 16:29:59.359333 dump params tx window
4015 16:29:59.362889 tx_center_min[0][0][0] = 984
4016 16:29:59.365859 tx_center_max[0][0][0] = 989
4017 16:29:59.365935 tx_center_min[0][0][1] = 977
4018 16:29:59.369374 tx_center_max[0][0][1] = 985
4019 16:29:59.372516 tx_center_min[0][1][0] = 985
4020 16:29:59.375314 tx_center_max[0][1][0] = 990
4021 16:29:59.378951 tx_center_min[0][1][1] = 976
4022 16:29:59.379027 tx_center_max[0][1][1] = 984
4023 16:29:59.382019 tx_center_min[1][0][0] = 991
4024 16:29:59.385579 tx_center_max[1][0][0] = 996
4025 16:29:59.389230 tx_center_min[1][0][1] = 987
4026 16:29:59.392100 tx_center_max[1][0][1] = 993
4027 16:29:59.392176 tx_center_min[1][1][0] = 989
4028 16:29:59.395694 tx_center_max[1][1][0] = 995
4029 16:29:59.398541 tx_center_min[1][1][1] = 982
4030 16:29:59.401746 tx_center_max[1][1][1] = 989
4031 16:29:59.401848 dump params tx window
4032 16:29:59.405349 tx_win_center[0][0][0] = 989
4033 16:29:59.408240 tx_first_pass[0][0][0] = 977
4034 16:29:59.411917 tx_last_pass[0][0][0] = 1002
4035 16:29:59.414768 tx_win_center[0][0][1] = 988
4036 16:29:59.414845 tx_first_pass[0][0][1] = 977
4037 16:29:59.418204 tx_last_pass[0][0][1] = 1000
4038 16:29:59.421578 tx_win_center[0][0][2] = 989
4039 16:29:59.425099 tx_first_pass[0][0][2] = 977
4040 16:29:59.427817 tx_last_pass[0][0][2] = 1001
4041 16:29:59.427933 tx_win_center[0][0][3] = 984
4042 16:29:59.431336 tx_first_pass[0][0][3] = 972
4043 16:29:59.434898 tx_last_pass[0][0][3] = 996
4044 16:29:59.437900 tx_win_center[0][0][4] = 988
4045 16:29:59.437979 tx_first_pass[0][0][4] = 976
4046 16:29:59.441302 tx_last_pass[0][0][4] = 1000
4047 16:29:59.444918 tx_win_center[0][0][5] = 986
4048 16:29:59.447784 tx_first_pass[0][0][5] = 975
4049 16:29:59.451323 tx_last_pass[0][0][5] = 998
4050 16:29:59.451399 tx_win_center[0][0][6] = 987
4051 16:29:59.454214 tx_first_pass[0][0][6] = 975
4052 16:29:59.457749 tx_last_pass[0][0][6] = 999
4053 16:29:59.460976 tx_win_center[0][0][7] = 988
4054 16:29:59.464288 tx_first_pass[0][0][7] = 976
4055 16:29:59.464365 tx_last_pass[0][0][7] = 1000
4056 16:29:59.467498 tx_win_center[0][0][8] = 977
4057 16:29:59.470694 tx_first_pass[0][0][8] = 966
4058 16:29:59.473858 tx_last_pass[0][0][8] = 989
4059 16:29:59.477282 tx_win_center[0][0][9] = 979
4060 16:29:59.477359 tx_first_pass[0][0][9] = 968
4061 16:29:59.480244 tx_last_pass[0][0][9] = 990
4062 16:29:59.483797 tx_win_center[0][0][10] = 985
4063 16:29:59.487344 tx_first_pass[0][0][10] = 973
4064 16:29:59.490290 tx_last_pass[0][0][10] = 997
4065 16:29:59.490383 tx_win_center[0][0][11] = 978
4066 16:29:59.493922 tx_first_pass[0][0][11] = 967
4067 16:29:59.496662 tx_last_pass[0][0][11] = 990
4068 16:29:59.500264 tx_win_center[0][0][12] = 979
4069 16:29:59.503221 tx_first_pass[0][0][12] = 968
4070 16:29:59.503297 tx_last_pass[0][0][12] = 991
4071 16:29:59.506735 tx_win_center[0][0][13] = 979
4072 16:29:59.509800 tx_first_pass[0][0][13] = 968
4073 16:29:59.513222 tx_last_pass[0][0][13] = 991
4074 16:29:59.516920 tx_win_center[0][0][14] = 981
4075 16:29:59.519801 tx_first_pass[0][0][14] = 969
4076 16:29:59.519877 tx_last_pass[0][0][14] = 993
4077 16:29:59.522824 tx_win_center[0][0][15] = 983
4078 16:29:59.526306 tx_first_pass[0][0][15] = 971
4079 16:29:59.529946 tx_last_pass[0][0][15] = 996
4080 16:29:59.532640 tx_win_center[0][1][0] = 990
4081 16:29:59.532715 tx_first_pass[0][1][0] = 979
4082 16:29:59.536110 tx_last_pass[0][1][0] = 1002
4083 16:29:59.539331 tx_win_center[0][1][1] = 989
4084 16:29:59.542737 tx_first_pass[0][1][1] = 977
4085 16:29:59.546149 tx_last_pass[0][1][1] = 1001
4086 16:29:59.546225 tx_win_center[0][1][2] = 990
4087 16:29:59.549409 tx_first_pass[0][1][2] = 978
4088 16:29:59.552339 tx_last_pass[0][1][2] = 1002
4089 16:29:59.556080 tx_win_center[0][1][3] = 985
4090 16:29:59.558990 tx_first_pass[0][1][3] = 973
4091 16:29:59.559089 tx_last_pass[0][1][3] = 997
4092 16:29:59.562617 tx_win_center[0][1][4] = 989
4093 16:29:59.565499 tx_first_pass[0][1][4] = 977
4094 16:29:59.569150 tx_last_pass[0][1][4] = 1001
4095 16:29:59.572119 tx_win_center[0][1][5] = 987
4096 16:29:59.572195 tx_first_pass[0][1][5] = 975
4097 16:29:59.575726 tx_last_pass[0][1][5] = 999
4098 16:29:59.578579 tx_win_center[0][1][6] = 987
4099 16:29:59.582001 tx_first_pass[0][1][6] = 976
4100 16:29:59.582129 tx_last_pass[0][1][6] = 999
4101 16:29:59.584929 tx_win_center[0][1][7] = 989
4102 16:29:59.588301 tx_first_pass[0][1][7] = 977
4103 16:29:59.591754 tx_last_pass[0][1][7] = 1001
4104 16:29:59.595112 tx_win_center[0][1][8] = 976
4105 16:29:59.595202 tx_first_pass[0][1][8] = 965
4106 16:29:59.598146 tx_last_pass[0][1][8] = 988
4107 16:29:59.601335 tx_win_center[0][1][9] = 978
4108 16:29:59.604718 tx_first_pass[0][1][9] = 967
4109 16:29:59.608251 tx_last_pass[0][1][9] = 989
4110 16:29:59.608345 tx_win_center[0][1][10] = 984
4111 16:29:59.611867 tx_first_pass[0][1][10] = 972
4112 16:29:59.614920 tx_last_pass[0][1][10] = 996
4113 16:29:59.618391 tx_win_center[0][1][11] = 977
4114 16:29:59.621202 tx_first_pass[0][1][11] = 966
4115 16:29:59.621301 tx_last_pass[0][1][11] = 989
4116 16:29:59.624777 tx_win_center[0][1][12] = 978
4117 16:29:59.627829 tx_first_pass[0][1][12] = 967
4118 16:29:59.631376 tx_last_pass[0][1][12] = 990
4119 16:29:59.634423 tx_win_center[0][1][13] = 978
4120 16:29:59.638119 tx_first_pass[0][1][13] = 967
4121 16:29:59.638233 tx_last_pass[0][1][13] = 989
4122 16:29:59.640893 tx_win_center[0][1][14] = 979
4123 16:29:59.644512 tx_first_pass[0][1][14] = 967
4124 16:29:59.647421 tx_last_pass[0][1][14] = 991
4125 16:29:59.651089 tx_win_center[0][1][15] = 982
4126 16:29:59.651189 tx_first_pass[0][1][15] = 971
4127 16:29:59.653980 tx_last_pass[0][1][15] = 994
4128 16:29:59.657391 tx_win_center[1][0][0] = 996
4129 16:29:59.660798 tx_first_pass[1][0][0] = 984
4130 16:29:59.664122 tx_last_pass[1][0][0] = 1009
4131 16:29:59.664201 tx_win_center[1][0][1] = 995
4132 16:29:59.667348 tx_first_pass[1][0][1] = 983
4133 16:29:59.670613 tx_last_pass[1][0][1] = 1008
4134 16:29:59.673446 tx_win_center[1][0][2] = 994
4135 16:29:59.677068 tx_first_pass[1][0][2] = 982
4136 16:29:59.677182 tx_last_pass[1][0][2] = 1006
4137 16:29:59.680679 tx_win_center[1][0][3] = 991
4138 16:29:59.683369 tx_first_pass[1][0][3] = 978
4139 16:29:59.686984 tx_last_pass[1][0][3] = 1005
4140 16:29:59.689909 tx_win_center[1][0][4] = 995
4141 16:29:59.690004 tx_first_pass[1][0][4] = 983
4142 16:29:59.693430 tx_last_pass[1][0][4] = 1008
4143 16:29:59.697048 tx_win_center[1][0][5] = 996
4144 16:29:59.699869 tx_first_pass[1][0][5] = 984
4145 16:29:59.703411 tx_last_pass[1][0][5] = 1009
4146 16:29:59.703490 tx_win_center[1][0][6] = 995
4147 16:29:59.706749 tx_first_pass[1][0][6] = 983
4148 16:29:59.710088 tx_last_pass[1][0][6] = 1008
4149 16:29:59.713188 tx_win_center[1][0][7] = 995
4150 16:29:59.716511 tx_first_pass[1][0][7] = 983
4151 16:29:59.716609 tx_last_pass[1][0][7] = 1007
4152 16:29:59.719952 tx_win_center[1][0][8] = 989
4153 16:29:59.722712 tx_first_pass[1][0][8] = 978
4154 16:29:59.726126 tx_last_pass[1][0][8] = 1001
4155 16:29:59.729460 tx_win_center[1][0][9] = 989
4156 16:29:59.729568 tx_first_pass[1][0][9] = 978
4157 16:29:59.732770 tx_last_pass[1][0][9] = 1001
4158 16:29:59.735924 tx_win_center[1][0][10] = 992
4159 16:29:59.739358 tx_first_pass[1][0][10] = 982
4160 16:29:59.742389 tx_last_pass[1][0][10] = 1003
4161 16:29:59.742467 tx_win_center[1][0][11] = 993
4162 16:29:59.745961 tx_first_pass[1][0][11] = 982
4163 16:29:59.749570 tx_last_pass[1][0][11] = 1004
4164 16:29:59.752296 tx_win_center[1][0][12] = 993
4165 16:29:59.755892 tx_first_pass[1][0][12] = 983
4166 16:29:59.758792 tx_last_pass[1][0][12] = 1004
4167 16:29:59.758870 tx_win_center[1][0][13] = 993
4168 16:29:59.762384 tx_first_pass[1][0][13] = 983
4169 16:29:59.765474 tx_last_pass[1][0][13] = 1004
4170 16:29:59.769077 tx_win_center[1][0][14] = 992
4171 16:29:59.772015 tx_first_pass[1][0][14] = 982
4172 16:29:59.775158 tx_last_pass[1][0][14] = 1003
4173 16:29:59.775228 tx_win_center[1][0][15] = 987
4174 16:29:59.778529 tx_first_pass[1][0][15] = 976
4175 16:29:59.781648 tx_last_pass[1][0][15] = 999
4176 16:29:59.784975 tx_win_center[1][1][0] = 995
4177 16:29:59.788338 tx_first_pass[1][1][0] = 983
4178 16:29:59.788440 tx_last_pass[1][1][0] = 1007
4179 16:29:59.791673 tx_win_center[1][1][1] = 993
4180 16:29:59.795387 tx_first_pass[1][1][1] = 981
4181 16:29:59.798313 tx_last_pass[1][1][1] = 1006
4182 16:29:59.801783 tx_win_center[1][1][2] = 991
4183 16:29:59.801867 tx_first_pass[1][1][2] = 978
4184 16:29:59.804677 tx_last_pass[1][1][2] = 1005
4185 16:29:59.808283 tx_win_center[1][1][3] = 989
4186 16:29:59.811211 tx_first_pass[1][1][3] = 977
4187 16:29:59.815002 tx_last_pass[1][1][3] = 1001
4188 16:29:59.815099 tx_win_center[1][1][4] = 993
4189 16:29:59.817970 tx_first_pass[1][1][4] = 981
4190 16:29:59.821410 tx_last_pass[1][1][4] = 1006
4191 16:29:59.824777 tx_win_center[1][1][5] = 994
4192 16:29:59.828019 tx_first_pass[1][1][5] = 982
4193 16:29:59.828124 tx_last_pass[1][1][5] = 1007
4194 16:29:59.830695 tx_win_center[1][1][6] = 993
4195 16:29:59.834497 tx_first_pass[1][1][6] = 981
4196 16:29:59.837300 tx_last_pass[1][1][6] = 1006
4197 16:29:59.840872 tx_win_center[1][1][7] = 993
4198 16:29:59.840975 tx_first_pass[1][1][7] = 980
4199 16:29:59.844304 tx_last_pass[1][1][7] = 1007
4200 16:29:59.847707 tx_win_center[1][1][8] = 986
4201 16:29:59.850442 tx_first_pass[1][1][8] = 974
4202 16:29:59.853726 tx_last_pass[1][1][8] = 999
4203 16:29:59.853814 tx_win_center[1][1][9] = 984
4204 16:29:59.856936 tx_first_pass[1][1][9] = 973
4205 16:29:59.860873 tx_last_pass[1][1][9] = 996
4206 16:29:59.863800 tx_win_center[1][1][10] = 988
4207 16:29:59.867365 tx_first_pass[1][1][10] = 976
4208 16:29:59.867463 tx_last_pass[1][1][10] = 1001
4209 16:29:59.870413 tx_win_center[1][1][11] = 988
4210 16:29:59.873383 tx_first_pass[1][1][11] = 977
4211 16:29:59.876952 tx_last_pass[1][1][11] = 1000
4212 16:29:59.879915 tx_win_center[1][1][12] = 989
4213 16:29:59.880015 tx_first_pass[1][1][12] = 977
4214 16:29:59.883501 tx_last_pass[1][1][12] = 1001
4215 16:29:59.886937 tx_win_center[1][1][13] = 989
4216 16:29:59.890293 tx_first_pass[1][1][13] = 978
4217 16:29:59.893063 tx_last_pass[1][1][13] = 1001
4218 16:29:59.896425 tx_win_center[1][1][14] = 989
4219 16:29:59.896529 tx_first_pass[1][1][14] = 977
4220 16:29:59.899727 tx_last_pass[1][1][14] = 1001
4221 16:29:59.903149 tx_win_center[1][1][15] = 982
4222 16:29:59.906551 tx_first_pass[1][1][15] = 970
4223 16:29:59.909460 tx_last_pass[1][1][15] = 995
4224 16:29:59.909570 dump params rx window
4225 16:29:59.913116 rx_firspass[0][0][0] = 5
4226 16:29:59.916045 rx_lastpass[0][0][0] = 39
4227 16:29:59.916145 rx_firspass[0][0][1] = 6
4228 16:29:59.919669 rx_lastpass[0][0][1] = 36
4229 16:29:59.922598 rx_firspass[0][0][2] = 7
4230 16:29:59.926056 rx_lastpass[0][0][2] = 37
4231 16:29:59.926161 rx_firspass[0][0][3] = -1
4232 16:29:59.928946 rx_lastpass[0][0][3] = 30
4233 16:29:59.932399 rx_firspass[0][0][4] = 5
4234 16:29:59.932509 rx_lastpass[0][0][4] = 36
4235 16:29:59.935805 rx_firspass[0][0][5] = 1
4236 16:29:59.939196 rx_lastpass[0][0][5] = 33
4237 16:29:59.942570 rx_firspass[0][0][6] = 4
4238 16:29:59.942686 rx_lastpass[0][0][6] = 33
4239 16:29:59.945353 rx_firspass[0][0][7] = 7
4240 16:29:59.949092 rx_lastpass[0][0][7] = 36
4241 16:29:59.949204 rx_firspass[0][0][8] = 0
4242 16:29:59.952582 rx_lastpass[0][0][8] = 30
4243 16:29:59.955471 rx_firspass[0][0][9] = 1
4244 16:29:59.958486 rx_lastpass[0][0][9] = 32
4245 16:29:59.958584 rx_firspass[0][0][10] = 9
4246 16:29:59.961934 rx_lastpass[0][0][10] = 39
4247 16:29:59.965377 rx_firspass[0][0][11] = 2
4248 16:29:59.965473 rx_lastpass[0][0][11] = 30
4249 16:29:59.968896 rx_firspass[0][0][12] = 1
4250 16:29:59.971550 rx_lastpass[0][0][12] = 33
4251 16:29:59.974868 rx_firspass[0][0][13] = 3
4252 16:29:59.974973 rx_lastpass[0][0][13] = 33
4253 16:29:59.978425 rx_firspass[0][0][14] = 3
4254 16:29:59.982021 rx_lastpass[0][0][14] = 36
4255 16:29:59.984937 rx_firspass[0][0][15] = 7
4256 16:29:59.985033 rx_lastpass[0][0][15] = 37
4257 16:29:59.987888 rx_firspass[0][1][0] = 5
4258 16:29:59.991671 rx_lastpass[0][1][0] = 38
4259 16:29:59.991785 rx_firspass[0][1][1] = 4
4260 16:29:59.995237 rx_lastpass[0][1][1] = 39
4261 16:29:59.997887 rx_firspass[0][1][2] = 5
4262 16:30:00.001611 rx_lastpass[0][1][2] = 40
4263 16:30:00.001707 rx_firspass[0][1][3] = -2
4264 16:30:00.004306 rx_lastpass[0][1][3] = 31
4265 16:30:00.008361 rx_firspass[0][1][4] = 5
4266 16:30:00.008439 rx_lastpass[0][1][4] = 38
4267 16:30:00.011126 rx_firspass[0][1][5] = 0
4268 16:30:00.014493 rx_lastpass[0][1][5] = 32
4269 16:30:00.018033 rx_firspass[0][1][6] = 1
4270 16:30:00.018110 rx_lastpass[0][1][6] = 35
4271 16:30:00.020935 rx_firspass[0][1][7] = 5
4272 16:30:00.024605 rx_lastpass[0][1][7] = 37
4273 16:30:00.024682 rx_firspass[0][1][8] = 0
4274 16:30:00.027491 rx_lastpass[0][1][8] = 33
4275 16:30:00.031151 rx_firspass[0][1][9] = 3
4276 16:30:00.034566 rx_lastpass[0][1][9] = 35
4277 16:30:00.034644 rx_firspass[0][1][10] = 9
4278 16:30:00.037680 rx_lastpass[0][1][10] = 42
4279 16:30:00.041021 rx_firspass[0][1][11] = 0
4280 16:30:00.043738 rx_lastpass[0][1][11] = 34
4281 16:30:00.043817 rx_firspass[0][1][12] = 3
4282 16:30:00.047279 rx_lastpass[0][1][12] = 36
4283 16:30:00.050770 rx_firspass[0][1][13] = 3
4284 16:30:00.050847 rx_lastpass[0][1][13] = 36
4285 16:30:00.053694 rx_firspass[0][1][14] = 5
4286 16:30:00.057286 rx_lastpass[0][1][14] = 37
4287 16:30:00.060051 rx_firspass[0][1][15] = 6
4288 16:30:00.060129 rx_lastpass[0][1][15] = 40
4289 16:30:00.063619 rx_firspass[1][0][0] = 5
4290 16:30:00.067383 rx_lastpass[1][0][0] = 39
4291 16:30:00.070350 rx_firspass[1][0][1] = 3
4292 16:30:00.070427 rx_lastpass[1][0][1] = 36
4293 16:30:00.073324 rx_firspass[1][0][2] = 5
4294 16:30:00.076431 rx_lastpass[1][0][2] = 36
4295 16:30:00.076533 rx_firspass[1][0][3] = -1
4296 16:30:00.079752 rx_lastpass[1][0][3] = 34
4297 16:30:00.083295 rx_firspass[1][0][4] = 5
4298 16:30:00.086794 rx_lastpass[1][0][4] = 36
4299 16:30:00.086867 rx_firspass[1][0][5] = 6
4300 16:30:00.090156 rx_lastpass[1][0][5] = 38
4301 16:30:00.093335 rx_firspass[1][0][6] = 10
4302 16:30:00.093402 rx_lastpass[1][0][6] = 39
4303 16:30:00.096482 rx_firspass[1][0][7] = 5
4304 16:30:00.099280 rx_lastpass[1][0][7] = 37
4305 16:30:00.103084 rx_firspass[1][0][8] = 0
4306 16:30:00.103178 rx_lastpass[1][0][8] = 33
4307 16:30:00.106159 rx_firspass[1][0][9] = 2
4308 16:30:00.109664 rx_lastpass[1][0][9] = 32
4309 16:30:00.109744 rx_firspass[1][0][10] = 5
4310 16:30:00.112866 rx_lastpass[1][0][10] = 36
4311 16:30:00.116171 rx_firspass[1][0][11] = 7
4312 16:30:00.119593 rx_lastpass[1][0][11] = 36
4313 16:30:00.119667 rx_firspass[1][0][12] = 5
4314 16:30:00.122344 rx_lastpass[1][0][12] = 38
4315 16:30:00.125842 rx_firspass[1][0][13] = 7
4316 16:30:00.129230 rx_lastpass[1][0][13] = 36
4317 16:30:00.129309 rx_firspass[1][0][14] = 7
4318 16:30:00.132677 rx_lastpass[1][0][14] = 37
4319 16:30:00.135609 rx_firspass[1][0][15] = 0
4320 16:30:00.139168 rx_lastpass[1][0][15] = 29
4321 16:30:00.139248 rx_firspass[1][1][0] = 6
4322 16:30:00.142002 rx_lastpass[1][1][0] = 38
4323 16:30:00.145523 rx_firspass[1][1][1] = 2
4324 16:30:00.145610 rx_lastpass[1][1][1] = 37
4325 16:30:00.148967 rx_firspass[1][1][2] = 3
4326 16:30:00.151972 rx_lastpass[1][1][2] = 34
4327 16:30:00.152069 rx_firspass[1][1][3] = 0
4328 16:30:00.155202 rx_lastpass[1][1][3] = 32
4329 16:30:00.158719 rx_firspass[1][1][4] = 3
4330 16:30:00.162107 rx_lastpass[1][1][4] = 38
4331 16:30:00.162195 rx_firspass[1][1][5] = 5
4332 16:30:00.164990 rx_lastpass[1][1][5] = 40
4333 16:30:00.168520 rx_firspass[1][1][6] = 7
4334 16:30:00.168608 rx_lastpass[1][1][6] = 40
4335 16:30:00.171522 rx_firspass[1][1][7] = 5
4336 16:30:00.175136 rx_lastpass[1][1][7] = 37
4337 16:30:00.177984 rx_firspass[1][1][8] = 2
4338 16:30:00.178060 rx_lastpass[1][1][8] = 33
4339 16:30:00.181537 rx_firspass[1][1][9] = 1
4340 16:30:00.184483 rx_lastpass[1][1][9] = 34
4341 16:30:00.184572 rx_firspass[1][1][10] = 4
4342 16:30:00.188203 rx_lastpass[1][1][10] = 38
4343 16:30:00.191215 rx_firspass[1][1][11] = 6
4344 16:30:00.194923 rx_lastpass[1][1][11] = 39
4345 16:30:00.194997 rx_firspass[1][1][12] = 7
4346 16:30:00.197723 rx_lastpass[1][1][12] = 38
4347 16:30:00.201373 rx_firspass[1][1][13] = 7
4348 16:30:00.204394 rx_lastpass[1][1][13] = 39
4349 16:30:00.204468 rx_firspass[1][1][14] = 6
4350 16:30:00.207641 rx_lastpass[1][1][14] = 39
4351 16:30:00.211027 rx_firspass[1][1][15] = -1
4352 16:30:00.214550 rx_lastpass[1][1][15] = 31
4353 16:30:00.214622 dump params clk_delay
4354 16:30:00.217368 clk_delay[0] = 1
4355 16:30:00.217437 clk_delay[1] = 0
4356 16:30:00.220828 dump params dqs_delay
4357 16:30:00.220892 dqs_delay[0][0] = 0
4358 16:30:00.224147 dqs_delay[0][1] = 0
4359 16:30:00.224213 dqs_delay[1][0] = -1
4360 16:30:00.227111 dqs_delay[1][1] = 0
4361 16:30:00.230896 dump params delay_cell_unit = 753
4362 16:30:00.230965 dump source = 0x0
4363 16:30:00.233956 dump params frequency:1200
4364 16:30:00.237084 dump params rank number:2
4365 16:30:00.237152
4366 16:30:00.240441 dump params write leveling
4367 16:30:00.240516 write leveling[0][0][0] = 0x0
4368 16:30:00.243748 write leveling[0][0][1] = 0x0
4369 16:30:00.247088 write leveling[0][1][0] = 0x0
4370 16:30:00.250334 write leveling[0][1][1] = 0x0
4371 16:30:00.253785 write leveling[1][0][0] = 0x0
4372 16:30:00.256807 write leveling[1][0][1] = 0x0
4373 16:30:00.256888 write leveling[1][1][0] = 0x0
4374 16:30:00.260362 write leveling[1][1][1] = 0x0
4375 16:30:00.263986 dump params cbt_cs
4376 16:30:00.264061 cbt_cs[0][0] = 0x0
4377 16:30:00.266834 cbt_cs[0][1] = 0x0
4378 16:30:00.266909 cbt_cs[1][0] = 0x0
4379 16:30:00.270273 cbt_cs[1][1] = 0x0
4380 16:30:00.270348 dump params cbt_mr12
4381 16:30:00.273815 cbt_mr12[0][0] = 0x0
4382 16:30:00.276622 cbt_mr12[0][1] = 0x0
4383 16:30:00.276698 cbt_mr12[1][0] = 0x0
4384 16:30:00.280286 cbt_mr12[1][1] = 0x0
4385 16:30:00.280362 dump params tx window
4386 16:30:00.283154 tx_center_min[0][0][0] = 0
4387 16:30:00.286858 tx_center_max[0][0][0] = 0
4388 16:30:00.289806 tx_center_min[0][0][1] = 0
4389 16:30:00.289886 tx_center_max[0][0][1] = 0
4390 16:30:00.293368 tx_center_min[0][1][0] = 0
4391 16:30:00.296345 tx_center_max[0][1][0] = 0
4392 16:30:00.299869 tx_center_min[0][1][1] = 0
4393 16:30:00.299939 tx_center_max[0][1][1] = 0
4394 16:30:00.302967 tx_center_min[1][0][0] = 0
4395 16:30:00.306371 tx_center_max[1][0][0] = 0
4396 16:30:00.309209 tx_center_min[1][0][1] = 0
4397 16:30:00.309274 tx_center_max[1][0][1] = 0
4398 16:30:00.312584 tx_center_min[1][1][0] = 0
4399 16:30:00.316132 tx_center_max[1][1][0] = 0
4400 16:30:00.319012 tx_center_min[1][1][1] = 0
4401 16:30:00.319106 tx_center_max[1][1][1] = 0
4402 16:30:00.322725 dump params tx window
4403 16:30:00.325626 tx_win_center[0][0][0] = 0
4404 16:30:00.325693 tx_first_pass[0][0][0] = 0
4405 16:30:00.329110 tx_last_pass[0][0][0] = 0
4406 16:30:00.331991 tx_win_center[0][0][1] = 0
4407 16:30:00.335569 tx_first_pass[0][0][1] = 0
4408 16:30:00.335644 tx_last_pass[0][0][1] = 0
4409 16:30:00.339159 tx_win_center[0][0][2] = 0
4410 16:30:00.342480 tx_first_pass[0][0][2] = 0
4411 16:30:00.345061 tx_last_pass[0][0][2] = 0
4412 16:30:00.345127 tx_win_center[0][0][3] = 0
4413 16:30:00.348839 tx_first_pass[0][0][3] = 0
4414 16:30:00.352157 tx_last_pass[0][0][3] = 0
4415 16:30:00.352224 tx_win_center[0][0][4] = 0
4416 16:30:00.355304 tx_first_pass[0][0][4] = 0
4417 16:30:00.358431 tx_last_pass[0][0][4] = 0
4418 16:30:00.361583 tx_win_center[0][0][5] = 0
4419 16:30:00.361647 tx_first_pass[0][0][5] = 0
4420 16:30:00.364723 tx_last_pass[0][0][5] = 0
4421 16:30:00.368523 tx_win_center[0][0][6] = 0
4422 16:30:00.371733 tx_first_pass[0][0][6] = 0
4423 16:30:00.371809 tx_last_pass[0][0][6] = 0
4424 16:30:00.374965 tx_win_center[0][0][7] = 0
4425 16:30:00.378403 tx_first_pass[0][0][7] = 0
4426 16:30:00.381140 tx_last_pass[0][0][7] = 0
4427 16:30:00.381215 tx_win_center[0][0][8] = 0
4428 16:30:00.384601 tx_first_pass[0][0][8] = 0
4429 16:30:00.388233 tx_last_pass[0][0][8] = 0
4430 16:30:00.391024 tx_win_center[0][0][9] = 0
4431 16:30:00.391099 tx_first_pass[0][0][9] = 0
4432 16:30:00.394677 tx_last_pass[0][0][9] = 0
4433 16:30:00.397601 tx_win_center[0][0][10] = 0
4434 16:30:00.401379 tx_first_pass[0][0][10] = 0
4435 16:30:00.401455 tx_last_pass[0][0][10] = 0
4436 16:30:00.404379 tx_win_center[0][0][11] = 0
4437 16:30:00.407821 tx_first_pass[0][0][11] = 0
4438 16:30:00.410710 tx_last_pass[0][0][11] = 0
4439 16:30:00.410785 tx_win_center[0][0][12] = 0
4440 16:30:00.414381 tx_first_pass[0][0][12] = 0
4441 16:30:00.417107 tx_last_pass[0][0][12] = 0
4442 16:30:00.420551 tx_win_center[0][0][13] = 0
4443 16:30:00.420626 tx_first_pass[0][0][13] = 0
4444 16:30:00.423940 tx_last_pass[0][0][13] = 0
4445 16:30:00.427673 tx_win_center[0][0][14] = 0
4446 16:30:00.430474 tx_first_pass[0][0][14] = 0
4447 16:30:00.430550 tx_last_pass[0][0][14] = 0
4448 16:30:00.434131 tx_win_center[0][0][15] = 0
4449 16:30:00.437030 tx_first_pass[0][0][15] = 0
4450 16:30:00.440664 tx_last_pass[0][0][15] = 0
4451 16:30:00.440740 tx_win_center[0][1][0] = 0
4452 16:30:00.443445 tx_first_pass[0][1][0] = 0
4453 16:30:00.446962 tx_last_pass[0][1][0] = 0
4454 16:30:00.450005 tx_win_center[0][1][1] = 0
4455 16:30:00.450080 tx_first_pass[0][1][1] = 0
4456 16:30:00.453580 tx_last_pass[0][1][1] = 0
4457 16:30:00.457036 tx_win_center[0][1][2] = 0
4458 16:30:00.460173 tx_first_pass[0][1][2] = 0
4459 16:30:00.460249 tx_last_pass[0][1][2] = 0
4460 16:30:00.463613 tx_win_center[0][1][3] = 0
4461 16:30:00.466248 tx_first_pass[0][1][3] = 0
4462 16:30:00.469701 tx_last_pass[0][1][3] = 0
4463 16:30:00.469777 tx_win_center[0][1][4] = 0
4464 16:30:00.473229 tx_first_pass[0][1][4] = 0
4465 16:30:00.476595 tx_last_pass[0][1][4] = 0
4466 16:30:00.479297 tx_win_center[0][1][5] = 0
4467 16:30:00.479397 tx_first_pass[0][1][5] = 0
4468 16:30:00.482806 tx_last_pass[0][1][5] = 0
4469 16:30:00.486181 tx_win_center[0][1][6] = 0
4470 16:30:00.489380 tx_first_pass[0][1][6] = 0
4471 16:30:00.489480 tx_last_pass[0][1][6] = 0
4472 16:30:00.492729 tx_win_center[0][1][7] = 0
4473 16:30:00.496062 tx_first_pass[0][1][7] = 0
4474 16:30:00.496162 tx_last_pass[0][1][7] = 0
4475 16:30:00.499325 tx_win_center[0][1][8] = 0
4476 16:30:00.502884 tx_first_pass[0][1][8] = 0
4477 16:30:00.505797 tx_last_pass[0][1][8] = 0
4478 16:30:00.505866 tx_win_center[0][1][9] = 0
4479 16:30:00.509337 tx_first_pass[0][1][9] = 0
4480 16:30:00.512257 tx_last_pass[0][1][9] = 0
4481 16:30:00.516065 tx_win_center[0][1][10] = 0
4482 16:30:00.516133 tx_first_pass[0][1][10] = 0
4483 16:30:00.518929 tx_last_pass[0][1][10] = 0
4484 16:30:00.522531 tx_win_center[0][1][11] = 0
4485 16:30:00.525488 tx_first_pass[0][1][11] = 0
4486 16:30:00.525561 tx_last_pass[0][1][11] = 0
4487 16:30:00.529037 tx_win_center[0][1][12] = 0
4488 16:30:00.531837 tx_first_pass[0][1][12] = 0
4489 16:30:00.535386 tx_last_pass[0][1][12] = 0
4490 16:30:00.535455 tx_win_center[0][1][13] = 0
4491 16:30:00.538310 tx_first_pass[0][1][13] = 0
4492 16:30:00.541948 tx_last_pass[0][1][13] = 0
4493 16:30:00.545427 tx_win_center[0][1][14] = 0
4494 16:30:00.548314 tx_first_pass[0][1][14] = 0
4495 16:30:00.548389 tx_last_pass[0][1][14] = 0
4496 16:30:00.551942 tx_win_center[0][1][15] = 0
4497 16:30:00.554852 tx_first_pass[0][1][15] = 0
4498 16:30:00.558550 tx_last_pass[0][1][15] = 0
4499 16:30:00.558653 tx_win_center[1][0][0] = 0
4500 16:30:00.561336 tx_first_pass[1][0][0] = 0
4501 16:30:00.564866 tx_last_pass[1][0][0] = 0
4502 16:30:00.568423 tx_win_center[1][0][1] = 0
4503 16:30:00.568539 tx_first_pass[1][0][1] = 0
4504 16:30:00.571238 tx_last_pass[1][0][1] = 0
4505 16:30:00.574609 tx_win_center[1][0][2] = 0
4506 16:30:00.574696 tx_first_pass[1][0][2] = 0
4507 16:30:00.577780 tx_last_pass[1][0][2] = 0
4508 16:30:00.581183 tx_win_center[1][0][3] = 0
4509 16:30:00.584774 tx_first_pass[1][0][3] = 0
4510 16:30:00.584841 tx_last_pass[1][0][3] = 0
4511 16:30:00.587567 tx_win_center[1][0][4] = 0
4512 16:30:00.591203 tx_first_pass[1][0][4] = 0
4513 16:30:00.593980 tx_last_pass[1][0][4] = 0
4514 16:30:00.594046 tx_win_center[1][0][5] = 0
4515 16:30:00.597475 tx_first_pass[1][0][5] = 0
4516 16:30:00.600827 tx_last_pass[1][0][5] = 0
4517 16:30:00.604242 tx_win_center[1][0][6] = 0
4518 16:30:00.604308 tx_first_pass[1][0][6] = 0
4519 16:30:00.607658 tx_last_pass[1][0][6] = 0
4520 16:30:00.610967 tx_win_center[1][0][7] = 0
4521 16:30:00.614263 tx_first_pass[1][0][7] = 0
4522 16:30:00.614344 tx_last_pass[1][0][7] = 0
4523 16:30:00.616985 tx_win_center[1][0][8] = 0
4524 16:30:00.620574 tx_first_pass[1][0][8] = 0
4525 16:30:00.620650 tx_last_pass[1][0][8] = 0
4526 16:30:00.623528 tx_win_center[1][0][9] = 0
4527 16:30:00.627193 tx_first_pass[1][0][9] = 0
4528 16:30:00.630061 tx_last_pass[1][0][9] = 0
4529 16:30:00.630153 tx_win_center[1][0][10] = 0
4530 16:30:00.633826 tx_first_pass[1][0][10] = 0
4531 16:30:00.636579 tx_last_pass[1][0][10] = 0
4532 16:30:00.640201 tx_win_center[1][0][11] = 0
4533 16:30:00.643182 tx_first_pass[1][0][11] = 0
4534 16:30:00.643255 tx_last_pass[1][0][11] = 0
4535 16:30:00.646899 tx_win_center[1][0][12] = 0
4536 16:30:00.649842 tx_first_pass[1][0][12] = 0
4537 16:30:00.653236 tx_last_pass[1][0][12] = 0
4538 16:30:00.653336 tx_win_center[1][0][13] = 0
4539 16:30:00.656309 tx_first_pass[1][0][13] = 0
4540 16:30:00.659940 tx_last_pass[1][0][13] = 0
4541 16:30:00.662958 tx_win_center[1][0][14] = 0
4542 16:30:00.663051 tx_first_pass[1][0][14] = 0
4543 16:30:00.666557 tx_last_pass[1][0][14] = 0
4544 16:30:00.669350 tx_win_center[1][0][15] = 0
4545 16:30:00.672979 tx_first_pass[1][0][15] = 0
4546 16:30:00.673073 tx_last_pass[1][0][15] = 0
4547 16:30:00.676492 tx_win_center[1][1][0] = 0
4548 16:30:00.679971 tx_first_pass[1][1][0] = 0
4549 16:30:00.682554 tx_last_pass[1][1][0] = 0
4550 16:30:00.682643 tx_win_center[1][1][1] = 0
4551 16:30:00.686414 tx_first_pass[1][1][1] = 0
4552 16:30:00.689779 tx_last_pass[1][1][1] = 0
4553 16:30:00.692950 tx_win_center[1][1][2] = 0
4554 16:30:00.693040 tx_first_pass[1][1][2] = 0
4555 16:30:00.695895 tx_last_pass[1][1][2] = 0
4556 16:30:00.699529 tx_win_center[1][1][3] = 0
4557 16:30:00.699599 tx_first_pass[1][1][3] = 0
4558 16:30:00.702298 tx_last_pass[1][1][3] = 0
4559 16:30:00.705758 tx_win_center[1][1][4] = 0
4560 16:30:00.709304 tx_first_pass[1][1][4] = 0
4561 16:30:00.709371 tx_last_pass[1][1][4] = 0
4562 16:30:00.712164 tx_win_center[1][1][5] = 0
4563 16:30:00.715701 tx_first_pass[1][1][5] = 0
4564 16:30:00.719235 tx_last_pass[1][1][5] = 0
4565 16:30:00.719301 tx_win_center[1][1][6] = 0
4566 16:30:00.722482 tx_first_pass[1][1][6] = 0
4567 16:30:00.725652 tx_last_pass[1][1][6] = 0
4568 16:30:00.728860 tx_win_center[1][1][7] = 0
4569 16:30:00.728930 tx_first_pass[1][1][7] = 0
4570 16:30:00.731723 tx_last_pass[1][1][7] = 0
4571 16:30:00.735374 tx_win_center[1][1][8] = 0
4572 16:30:00.738415 tx_first_pass[1][1][8] = 0
4573 16:30:00.738497 tx_last_pass[1][1][8] = 0
4574 16:30:00.741908 tx_win_center[1][1][9] = 0
4575 16:30:00.745360 tx_first_pass[1][1][9] = 0
4576 16:30:00.745430 tx_last_pass[1][1][9] = 0
4577 16:30:00.748157 tx_win_center[1][1][10] = 0
4578 16:30:00.751971 tx_first_pass[1][1][10] = 0
4579 16:30:00.754824 tx_last_pass[1][1][10] = 0
4580 16:30:00.754891 tx_win_center[1][1][11] = 0
4581 16:30:00.758460 tx_first_pass[1][1][11] = 0
4582 16:30:00.761359 tx_last_pass[1][1][11] = 0
4583 16:30:00.765052 tx_win_center[1][1][12] = 0
4584 16:30:00.768088 tx_first_pass[1][1][12] = 0
4585 16:30:00.768164 tx_last_pass[1][1][12] = 0
4586 16:30:00.771683 tx_win_center[1][1][13] = 0
4587 16:30:00.774643 tx_first_pass[1][1][13] = 0
4588 16:30:00.778088 tx_last_pass[1][1][13] = 0
4589 16:30:00.778157 tx_win_center[1][1][14] = 0
4590 16:30:00.781151 tx_first_pass[1][1][14] = 0
4591 16:30:00.784711 tx_last_pass[1][1][14] = 0
4592 16:30:00.787513 tx_win_center[1][1][15] = 0
4593 16:30:00.787580 tx_first_pass[1][1][15] = 0
4594 16:30:00.791012 tx_last_pass[1][1][15] = 0
4595 16:30:00.794434 dump params rx window
4596 16:30:00.794503 rx_firspass[0][0][0] = 0
4597 16:30:00.797787 rx_lastpass[0][0][0] = 0
4598 16:30:00.801086 rx_firspass[0][0][1] = 0
4599 16:30:00.804214 rx_lastpass[0][0][1] = 0
4600 16:30:00.804283 rx_firspass[0][0][2] = 0
4601 16:30:00.807431 rx_lastpass[0][0][2] = 0
4602 16:30:00.810558 rx_firspass[0][0][3] = 0
4603 16:30:00.810627 rx_lastpass[0][0][3] = 0
4604 16:30:00.813758 rx_firspass[0][0][4] = 0
4605 16:30:00.817054 rx_lastpass[0][0][4] = 0
4606 16:30:00.817125 rx_firspass[0][0][5] = 0
4607 16:30:00.820420 rx_lastpass[0][0][5] = 0
4608 16:30:00.823950 rx_firspass[0][0][6] = 0
4609 16:30:00.826788 rx_lastpass[0][0][6] = 0
4610 16:30:00.826856 rx_firspass[0][0][7] = 0
4611 16:30:00.830161 rx_lastpass[0][0][7] = 0
4612 16:30:00.833519 rx_firspass[0][0][8] = 0
4613 16:30:00.833619 rx_lastpass[0][0][8] = 0
4614 16:30:00.837001 rx_firspass[0][0][9] = 0
4615 16:30:00.840115 rx_lastpass[0][0][9] = 0
4616 16:30:00.840187 rx_firspass[0][0][10] = 0
4617 16:30:00.843497 rx_lastpass[0][0][10] = 0
4618 16:30:00.846468 rx_firspass[0][0][11] = 0
4619 16:30:00.849879 rx_lastpass[0][0][11] = 0
4620 16:30:00.849991 rx_firspass[0][0][12] = 0
4621 16:30:00.853736 rx_lastpass[0][0][12] = 0
4622 16:30:00.856552 rx_firspass[0][0][13] = 0
4623 16:30:00.856624 rx_lastpass[0][0][13] = 0
4624 16:30:00.860164 rx_firspass[0][0][14] = 0
4625 16:30:00.862996 rx_lastpass[0][0][14] = 0
4626 16:30:00.866645 rx_firspass[0][0][15] = 0
4627 16:30:00.866759 rx_lastpass[0][0][15] = 0
4628 16:30:00.869536 rx_firspass[0][1][0] = 0
4629 16:30:00.873176 rx_lastpass[0][1][0] = 0
4630 16:30:00.873248 rx_firspass[0][1][1] = 0
4631 16:30:00.876873 rx_lastpass[0][1][1] = 0
4632 16:30:00.879769 rx_firspass[0][1][2] = 0
4633 16:30:00.879839 rx_lastpass[0][1][2] = 0
4634 16:30:00.883243 rx_firspass[0][1][3] = 0
4635 16:30:00.886167 rx_lastpass[0][1][3] = 0
4636 16:30:00.889565 rx_firspass[0][1][4] = 0
4637 16:30:00.889675 rx_lastpass[0][1][4] = 0
4638 16:30:00.893337 rx_firspass[0][1][5] = 0
4639 16:30:00.896056 rx_lastpass[0][1][5] = 0
4640 16:30:00.896128 rx_firspass[0][1][6] = 0
4641 16:30:00.899641 rx_lastpass[0][1][6] = 0
4642 16:30:00.902495 rx_firspass[0][1][7] = 0
4643 16:30:00.902578 rx_lastpass[0][1][7] = 0
4644 16:30:00.906100 rx_firspass[0][1][8] = 0
4645 16:30:00.908967 rx_lastpass[0][1][8] = 0
4646 16:30:00.912496 rx_firspass[0][1][9] = 0
4647 16:30:00.912579 rx_lastpass[0][1][9] = 0
4648 16:30:00.915858 rx_firspass[0][1][10] = 0
4649 16:30:00.918993 rx_lastpass[0][1][10] = 0
4650 16:30:00.919089 rx_firspass[0][1][11] = 0
4651 16:30:00.922370 rx_lastpass[0][1][11] = 0
4652 16:30:00.925696 rx_firspass[0][1][12] = 0
4653 16:30:00.928841 rx_lastpass[0][1][12] = 0
4654 16:30:00.928910 rx_firspass[0][1][13] = 0
4655 16:30:00.931949 rx_lastpass[0][1][13] = 0
4656 16:30:00.935176 rx_firspass[0][1][14] = 0
4657 16:30:00.935244 rx_lastpass[0][1][14] = 0
4658 16:30:00.938671 rx_firspass[0][1][15] = 0
4659 16:30:00.942150 rx_lastpass[0][1][15] = 0
4660 16:30:00.944786 rx_firspass[1][0][0] = 0
4661 16:30:00.944855 rx_lastpass[1][0][0] = 0
4662 16:30:00.948731 rx_firspass[1][0][1] = 0
4663 16:30:00.951418 rx_lastpass[1][0][1] = 0
4664 16:30:00.951498 rx_firspass[1][0][2] = 0
4665 16:30:00.954704 rx_lastpass[1][0][2] = 0
4666 16:30:00.957950 rx_firspass[1][0][3] = 0
4667 16:30:00.961280 rx_lastpass[1][0][3] = 0
4668 16:30:00.961371 rx_firspass[1][0][4] = 0
4669 16:30:00.964904 rx_lastpass[1][0][4] = 0
4670 16:30:00.967807 rx_firspass[1][0][5] = 0
4671 16:30:00.967875 rx_lastpass[1][0][5] = 0
4672 16:30:00.971386 rx_firspass[1][0][6] = 0
4673 16:30:00.974908 rx_lastpass[1][0][6] = 0
4674 16:30:00.975021 rx_firspass[1][0][7] = 0
4675 16:30:00.977933 rx_lastpass[1][0][7] = 0
4676 16:30:00.980763 rx_firspass[1][0][8] = 0
4677 16:30:00.984347 rx_lastpass[1][0][8] = 0
4678 16:30:00.984444 rx_firspass[1][0][9] = 0
4679 16:30:00.987885 rx_lastpass[1][0][9] = 0
4680 16:30:00.990735 rx_firspass[1][0][10] = 0
4681 16:30:00.990803 rx_lastpass[1][0][10] = 0
4682 16:30:00.993839 rx_firspass[1][0][11] = 0
4683 16:30:00.997317 rx_lastpass[1][0][11] = 0
4684 16:30:01.001027 rx_firspass[1][0][12] = 0
4685 16:30:01.001096 rx_lastpass[1][0][12] = 0
4686 16:30:01.003850 rx_firspass[1][0][13] = 0
4687 16:30:01.007329 rx_lastpass[1][0][13] = 0
4688 16:30:01.007396 rx_firspass[1][0][14] = 0
4689 16:30:01.010851 rx_lastpass[1][0][14] = 0
4690 16:30:01.013740 rx_firspass[1][0][15] = 0
4691 16:30:01.017338 rx_lastpass[1][0][15] = 0
4692 16:30:01.017413 rx_firspass[1][1][0] = 0
4693 16:30:01.020180 rx_lastpass[1][1][0] = 0
4694 16:30:01.023833 rx_firspass[1][1][1] = 0
4695 16:30:01.023901 rx_lastpass[1][1][1] = 0
4696 16:30:01.026556 rx_firspass[1][1][2] = 0
4697 16:30:01.030209 rx_lastpass[1][1][2] = 0
4698 16:30:01.033068 rx_firspass[1][1][3] = 0
4699 16:30:01.033137 rx_lastpass[1][1][3] = 0
4700 16:30:01.036416 rx_firspass[1][1][4] = 0
4701 16:30:01.039777 rx_lastpass[1][1][4] = 0
4702 16:30:01.039845 rx_firspass[1][1][5] = 0
4703 16:30:01.043460 rx_lastpass[1][1][5] = 0
4704 16:30:01.046773 rx_firspass[1][1][6] = 0
4705 16:30:01.046843 rx_lastpass[1][1][6] = 0
4706 16:30:01.050070 rx_firspass[1][1][7] = 0
4707 16:30:01.052700 rx_lastpass[1][1][7] = 0
4708 16:30:01.052771 rx_firspass[1][1][8] = 0
4709 16:30:01.056080 rx_lastpass[1][1][8] = 0
4710 16:30:01.059687 rx_firspass[1][1][9] = 0
4711 16:30:01.062428 rx_lastpass[1][1][9] = 0
4712 16:30:01.062502 rx_firspass[1][1][10] = 0
4713 16:30:01.066051 rx_lastpass[1][1][10] = 0
4714 16:30:01.069244 rx_firspass[1][1][11] = 0
4715 16:30:01.069312 rx_lastpass[1][1][11] = 0
4716 16:30:01.072766 rx_firspass[1][1][12] = 0
4717 16:30:01.075959 rx_lastpass[1][1][12] = 0
4718 16:30:01.079115 rx_firspass[1][1][13] = 0
4719 16:30:01.079186 rx_lastpass[1][1][13] = 0
4720 16:30:01.082549 rx_firspass[1][1][14] = 0
4721 16:30:01.086131 rx_lastpass[1][1][14] = 0
4722 16:30:01.088987 rx_firspass[1][1][15] = 0
4723 16:30:01.089057 rx_lastpass[1][1][15] = 0
4724 16:30:01.092604 dump params clk_delay
4725 16:30:01.092669 clk_delay[0] = 0
4726 16:30:01.095418 clk_delay[1] = 0
4727 16:30:01.095482 dump params dqs_delay
4728 16:30:01.099075 dqs_delay[0][0] = 0
4729 16:30:01.099152 dqs_delay[0][1] = 0
4730 16:30:01.102129 dqs_delay[1][0] = 0
4731 16:30:01.105809 dqs_delay[1][1] = 0
4732 16:30:01.108718 dump params delay_cell_unit = 753
4733 16:30:01.108800 dump source = 0x0
4734 16:30:01.112303 dump params frequency:800
4735 16:30:01.112376 dump params rank number:2
4736 16:30:01.112433
4737 16:30:01.115374 dump params write leveling
4738 16:30:01.119058 write leveling[0][0][0] = 0x0
4739 16:30:01.121963 write leveling[0][0][1] = 0x0
4740 16:30:01.124890 write leveling[0][1][0] = 0x0
4741 16:30:01.128590 write leveling[0][1][1] = 0x0
4742 16:30:01.128668 write leveling[1][0][0] = 0x0
4743 16:30:01.132008 write leveling[1][0][1] = 0x0
4744 16:30:01.135009 write leveling[1][1][0] = 0x0
4745 16:30:01.138776 write leveling[1][1][1] = 0x0
4746 16:30:01.138852 dump params cbt_cs
4747 16:30:01.141709 cbt_cs[0][0] = 0x0
4748 16:30:01.141784 cbt_cs[0][1] = 0x0
4749 16:30:01.145267 cbt_cs[1][0] = 0x0
4750 16:30:01.145342 cbt_cs[1][1] = 0x0
4751 16:30:01.148033 dump params cbt_mr12
4752 16:30:01.151564 cbt_mr12[0][0] = 0x0
4753 16:30:01.151640 cbt_mr12[0][1] = 0x0
4754 16:30:01.154438 cbt_mr12[1][0] = 0x0
4755 16:30:01.154514 cbt_mr12[1][1] = 0x0
4756 16:30:01.157860 dump params tx window
4757 16:30:01.161256 tx_center_min[0][0][0] = 0
4758 16:30:01.161331 tx_center_max[0][0][0] = 0
4759 16:30:01.164515 tx_center_min[0][0][1] = 0
4760 16:30:01.167841 tx_center_max[0][0][1] = 0
4761 16:30:01.171329 tx_center_min[0][1][0] = 0
4762 16:30:01.171405 tx_center_max[0][1][0] = 0
4763 16:30:01.174092 tx_center_min[0][1][1] = 0
4764 16:30:01.177485 tx_center_max[0][1][1] = 0
4765 16:30:01.181049 tx_center_min[1][0][0] = 0
4766 16:30:01.181126 tx_center_max[1][0][0] = 0
4767 16:30:01.183843 tx_center_min[1][0][1] = 0
4768 16:30:01.187143 tx_center_max[1][0][1] = 0
4769 16:30:01.190424 tx_center_min[1][1][0] = 0
4770 16:30:01.190527 tx_center_max[1][1][0] = 0
4771 16:30:01.194219 tx_center_min[1][1][1] = 0
4772 16:30:01.197332 tx_center_max[1][1][1] = 0
4773 16:30:01.197407 dump params tx window
4774 16:30:01.200639 tx_win_center[0][0][0] = 0
4775 16:30:01.204498 tx_first_pass[0][0][0] = 0
4776 16:30:01.207076 tx_last_pass[0][0][0] = 0
4777 16:30:01.207151 tx_win_center[0][0][1] = 0
4778 16:30:01.210595 tx_first_pass[0][0][1] = 0
4779 16:30:01.213405 tx_last_pass[0][0][1] = 0
4780 16:30:01.217055 tx_win_center[0][0][2] = 0
4781 16:30:01.217124 tx_first_pass[0][0][2] = 0
4782 16:30:01.220689 tx_last_pass[0][0][2] = 0
4783 16:30:01.223631 tx_win_center[0][0][3] = 0
4784 16:30:01.227108 tx_first_pass[0][0][3] = 0
4785 16:30:01.227173 tx_last_pass[0][0][3] = 0
4786 16:30:01.230045 tx_win_center[0][0][4] = 0
4787 16:30:01.233487 tx_first_pass[0][0][4] = 0
4788 16:30:01.233580 tx_last_pass[0][0][4] = 0
4789 16:30:01.237043 tx_win_center[0][0][5] = 0
4790 16:30:01.240328 tx_first_pass[0][0][5] = 0
4791 16:30:01.243246 tx_last_pass[0][0][5] = 0
4792 16:30:01.243310 tx_win_center[0][0][6] = 0
4793 16:30:01.246850 tx_first_pass[0][0][6] = 0
4794 16:30:01.249891 tx_last_pass[0][0][6] = 0
4795 16:30:01.253372 tx_win_center[0][0][7] = 0
4796 16:30:01.253448 tx_first_pass[0][0][7] = 0
4797 16:30:01.256189 tx_last_pass[0][0][7] = 0
4798 16:30:01.259758 tx_win_center[0][0][8] = 0
4799 16:30:01.262743 tx_first_pass[0][0][8] = 0
4800 16:30:01.262820 tx_last_pass[0][0][8] = 0
4801 16:30:01.266284 tx_win_center[0][0][9] = 0
4802 16:30:01.269876 tx_first_pass[0][0][9] = 0
4803 16:30:01.272521 tx_last_pass[0][0][9] = 0
4804 16:30:01.272598 tx_win_center[0][0][10] = 0
4805 16:30:01.276004 tx_first_pass[0][0][10] = 0
4806 16:30:01.279305 tx_last_pass[0][0][10] = 0
4807 16:30:01.282762 tx_win_center[0][0][11] = 0
4808 16:30:01.282839 tx_first_pass[0][0][11] = 0
4809 16:30:01.286203 tx_last_pass[0][0][11] = 0
4810 16:30:01.289063 tx_win_center[0][0][12] = 0
4811 16:30:01.292697 tx_first_pass[0][0][12] = 0
4812 16:30:01.292774 tx_last_pass[0][0][12] = 0
4813 16:30:01.295565 tx_win_center[0][0][13] = 0
4814 16:30:01.299311 tx_first_pass[0][0][13] = 0
4815 16:30:01.302151 tx_last_pass[0][0][13] = 0
4816 16:30:01.302228 tx_win_center[0][0][14] = 0
4817 16:30:01.305798 tx_first_pass[0][0][14] = 0
4818 16:30:01.309113 tx_last_pass[0][0][14] = 0
4819 16:30:01.312230 tx_win_center[0][0][15] = 0
4820 16:30:01.315183 tx_first_pass[0][0][15] = 0
4821 16:30:01.315259 tx_last_pass[0][0][15] = 0
4822 16:30:01.318896 tx_win_center[0][1][0] = 0
4823 16:30:01.321814 tx_first_pass[0][1][0] = 0
4824 16:30:01.321935 tx_last_pass[0][1][0] = 0
4825 16:30:01.325365 tx_win_center[0][1][1] = 0
4826 16:30:01.328241 tx_first_pass[0][1][1] = 0
4827 16:30:01.331794 tx_last_pass[0][1][1] = 0
4828 16:30:01.331863 tx_win_center[0][1][2] = 0
4829 16:30:01.334725 tx_first_pass[0][1][2] = 0
4830 16:30:01.338452 tx_last_pass[0][1][2] = 0
4831 16:30:01.341249 tx_win_center[0][1][3] = 0
4832 16:30:01.341314 tx_first_pass[0][1][3] = 0
4833 16:30:01.344866 tx_last_pass[0][1][3] = 0
4834 16:30:01.348312 tx_win_center[0][1][4] = 0
4835 16:30:01.351217 tx_first_pass[0][1][4] = 0
4836 16:30:01.351284 tx_last_pass[0][1][4] = 0
4837 16:30:01.354757 tx_win_center[0][1][5] = 0
4838 16:30:01.358178 tx_first_pass[0][1][5] = 0
4839 16:30:01.358243 tx_last_pass[0][1][5] = 0
4840 16:30:01.361537 tx_win_center[0][1][6] = 0
4841 16:30:01.364820 tx_first_pass[0][1][6] = 0
4842 16:30:01.367746 tx_last_pass[0][1][6] = 0
4843 16:30:01.367825 tx_win_center[0][1][7] = 0
4844 16:30:01.371215 tx_first_pass[0][1][7] = 0
4845 16:30:01.374170 tx_last_pass[0][1][7] = 0
4846 16:30:01.377743 tx_win_center[0][1][8] = 0
4847 16:30:01.377825 tx_first_pass[0][1][8] = 0
4848 16:30:01.381217 tx_last_pass[0][1][8] = 0
4849 16:30:01.383951 tx_win_center[0][1][9] = 0
4850 16:30:01.387533 tx_first_pass[0][1][9] = 0
4851 16:30:01.387607 tx_last_pass[0][1][9] = 0
4852 16:30:01.390807 tx_win_center[0][1][10] = 0
4853 16:30:01.394336 tx_first_pass[0][1][10] = 0
4854 16:30:01.397031 tx_last_pass[0][1][10] = 0
4855 16:30:01.397104 tx_win_center[0][1][11] = 0
4856 16:30:01.400590 tx_first_pass[0][1][11] = 0
4857 16:30:01.404174 tx_last_pass[0][1][11] = 0
4858 16:30:01.407044 tx_win_center[0][1][12] = 0
4859 16:30:01.407185 tx_first_pass[0][1][12] = 0
4860 16:30:01.410038 tx_last_pass[0][1][12] = 0
4861 16:30:01.413675 tx_win_center[0][1][13] = 0
4862 16:30:01.416670 tx_first_pass[0][1][13] = 0
4863 16:30:01.416781 tx_last_pass[0][1][13] = 0
4864 16:30:01.420308 tx_win_center[0][1][14] = 0
4865 16:30:01.423727 tx_first_pass[0][1][14] = 0
4866 16:30:01.426534 tx_last_pass[0][1][14] = 0
4867 16:30:01.429755 tx_win_center[0][1][15] = 0
4868 16:30:01.429865 tx_first_pass[0][1][15] = 0
4869 16:30:01.433028 tx_last_pass[0][1][15] = 0
4870 16:30:01.436434 tx_win_center[1][0][0] = 0
4871 16:30:01.439509 tx_first_pass[1][0][0] = 0
4872 16:30:01.439600 tx_last_pass[1][0][0] = 0
4873 16:30:01.443300 tx_win_center[1][0][1] = 0
4874 16:30:01.446201 tx_first_pass[1][0][1] = 0
4875 16:30:01.446296 tx_last_pass[1][0][1] = 0
4876 16:30:01.449745 tx_win_center[1][0][2] = 0
4877 16:30:01.453403 tx_first_pass[1][0][2] = 0
4878 16:30:01.456284 tx_last_pass[1][0][2] = 0
4879 16:30:01.456380 tx_win_center[1][0][3] = 0
4880 16:30:01.459324 tx_first_pass[1][0][3] = 0
4881 16:30:01.463050 tx_last_pass[1][0][3] = 0
4882 16:30:01.465934 tx_win_center[1][0][4] = 0
4883 16:30:01.466037 tx_first_pass[1][0][4] = 0
4884 16:30:01.469381 tx_last_pass[1][0][4] = 0
4885 16:30:01.472575 tx_win_center[1][0][5] = 0
4886 16:30:01.475819 tx_first_pass[1][0][5] = 0
4887 16:30:01.475925 tx_last_pass[1][0][5] = 0
4888 16:30:01.479345 tx_win_center[1][0][6] = 0
4889 16:30:01.482295 tx_first_pass[1][0][6] = 0
4890 16:30:01.486006 tx_last_pass[1][0][6] = 0
4891 16:30:01.486108 tx_win_center[1][0][7] = 0
4892 16:30:01.488852 tx_first_pass[1][0][7] = 0
4893 16:30:01.492535 tx_last_pass[1][0][7] = 0
4894 16:30:01.492631 tx_win_center[1][0][8] = 0
4895 16:30:01.495305 tx_first_pass[1][0][8] = 0
4896 16:30:01.499129 tx_last_pass[1][0][8] = 0
4897 16:30:01.502000 tx_win_center[1][0][9] = 0
4898 16:30:01.502092 tx_first_pass[1][0][9] = 0
4899 16:30:01.505465 tx_last_pass[1][0][9] = 0
4900 16:30:01.509077 tx_win_center[1][0][10] = 0
4901 16:30:01.511955 tx_first_pass[1][0][10] = 0
4902 16:30:01.512049 tx_last_pass[1][0][10] = 0
4903 16:30:01.514947 tx_win_center[1][0][11] = 0
4904 16:30:01.518700 tx_first_pass[1][0][11] = 0
4905 16:30:01.521595 tx_last_pass[1][0][11] = 0
4906 16:30:01.521666 tx_win_center[1][0][12] = 0
4907 16:30:01.525077 tx_first_pass[1][0][12] = 0
4908 16:30:01.527966 tx_last_pass[1][0][12] = 0
4909 16:30:01.531607 tx_win_center[1][0][13] = 0
4910 16:30:01.535265 tx_first_pass[1][0][13] = 0
4911 16:30:01.535358 tx_last_pass[1][0][13] = 0
4912 16:30:01.538023 tx_win_center[1][0][14] = 0
4913 16:30:01.541636 tx_first_pass[1][0][14] = 0
4914 16:30:01.544532 tx_last_pass[1][0][14] = 0
4915 16:30:01.544599 tx_win_center[1][0][15] = 0
4916 16:30:01.548057 tx_first_pass[1][0][15] = 0
4917 16:30:01.551486 tx_last_pass[1][0][15] = 0
4918 16:30:01.554831 tx_win_center[1][1][0] = 0
4919 16:30:01.554906 tx_first_pass[1][1][0] = 0
4920 16:30:01.557494 tx_last_pass[1][1][0] = 0
4921 16:30:01.561375 tx_win_center[1][1][1] = 0
4922 16:30:01.564496 tx_first_pass[1][1][1] = 0
4923 16:30:01.564602 tx_last_pass[1][1][1] = 0
4924 16:30:01.568007 tx_win_center[1][1][2] = 0
4925 16:30:01.570921 tx_first_pass[1][1][2] = 0
4926 16:30:01.574583 tx_last_pass[1][1][2] = 0
4927 16:30:01.574685 tx_win_center[1][1][3] = 0
4928 16:30:01.577347 tx_first_pass[1][1][3] = 0
4929 16:30:01.580460 tx_last_pass[1][1][3] = 0
4930 16:30:01.580560 tx_win_center[1][1][4] = 0
4931 16:30:01.583923 tx_first_pass[1][1][4] = 0
4932 16:30:01.587284 tx_last_pass[1][1][4] = 0
4933 16:30:01.590900 tx_win_center[1][1][5] = 0
4934 16:30:01.590976 tx_first_pass[1][1][5] = 0
4935 16:30:01.593648 tx_last_pass[1][1][5] = 0
4936 16:30:01.597229 tx_win_center[1][1][6] = 0
4937 16:30:01.600105 tx_first_pass[1][1][6] = 0
4938 16:30:01.600198 tx_last_pass[1][1][6] = 0
4939 16:30:01.603653 tx_win_center[1][1][7] = 0
4940 16:30:01.607148 tx_first_pass[1][1][7] = 0
4941 16:30:01.610021 tx_last_pass[1][1][7] = 0
4942 16:30:01.610088 tx_win_center[1][1][8] = 0
4943 16:30:01.613794 tx_first_pass[1][1][8] = 0
4944 16:30:01.616472 tx_last_pass[1][1][8] = 0
4945 16:30:01.616548 tx_win_center[1][1][9] = 0
4946 16:30:01.620178 tx_first_pass[1][1][9] = 0
4947 16:30:01.623258 tx_last_pass[1][1][9] = 0
4948 16:30:01.626887 tx_win_center[1][1][10] = 0
4949 16:30:01.629770 tx_first_pass[1][1][10] = 0
4950 16:30:01.629837 tx_last_pass[1][1][10] = 0
4951 16:30:01.633339 tx_win_center[1][1][11] = 0
4952 16:30:01.636304 tx_first_pass[1][1][11] = 0
4953 16:30:01.639939 tx_last_pass[1][1][11] = 0
4954 16:30:01.640004 tx_win_center[1][1][12] = 0
4955 16:30:01.643502 tx_first_pass[1][1][12] = 0
4956 16:30:01.646506 tx_last_pass[1][1][12] = 0
4957 16:30:01.650282 tx_win_center[1][1][13] = 0
4958 16:30:01.650349 tx_first_pass[1][1][13] = 0
4959 16:30:01.653010 tx_last_pass[1][1][13] = 0
4960 16:30:01.656632 tx_win_center[1][1][14] = 0
4961 16:30:01.659400 tx_first_pass[1][1][14] = 0
4962 16:30:01.659476 tx_last_pass[1][1][14] = 0
4963 16:30:01.662977 tx_win_center[1][1][15] = 0
4964 16:30:01.666371 tx_first_pass[1][1][15] = 0
4965 16:30:01.669292 tx_last_pass[1][1][15] = 0
4966 16:30:01.669368 dump params rx window
4967 16:30:01.672581 rx_firspass[0][0][0] = 0
4968 16:30:01.675940 rx_lastpass[0][0][0] = 0
4969 16:30:01.676015 rx_firspass[0][0][1] = 0
4970 16:30:01.679259 rx_lastpass[0][0][1] = 0
4971 16:30:01.682529 rx_firspass[0][0][2] = 0
4972 16:30:01.682605 rx_lastpass[0][0][2] = 0
4973 16:30:01.685706 rx_firspass[0][0][3] = 0
4974 16:30:01.689238 rx_lastpass[0][0][3] = 0
4975 16:30:01.691982 rx_firspass[0][0][4] = 0
4976 16:30:01.692057 rx_lastpass[0][0][4] = 0
4977 16:30:01.695885 rx_firspass[0][0][5] = 0
4978 16:30:01.698497 rx_lastpass[0][0][5] = 0
4979 16:30:01.698573 rx_firspass[0][0][6] = 0
4980 16:30:01.701936 rx_lastpass[0][0][6] = 0
4981 16:30:01.705375 rx_firspass[0][0][7] = 0
4982 16:30:01.705451 rx_lastpass[0][0][7] = 0
4983 16:30:01.708847 rx_firspass[0][0][8] = 0
4984 16:30:01.711702 rx_lastpass[0][0][8] = 0
4985 16:30:01.715198 rx_firspass[0][0][9] = 0
4986 16:30:01.715281 rx_lastpass[0][0][9] = 0
4987 16:30:01.718712 rx_firspass[0][0][10] = 0
4988 16:30:01.721454 rx_lastpass[0][0][10] = 0
4989 16:30:01.721529 rx_firspass[0][0][11] = 0
4990 16:30:01.724952 rx_lastpass[0][0][11] = 0
4991 16:30:01.727960 rx_firspass[0][0][12] = 0
4992 16:30:01.731600 rx_lastpass[0][0][12] = 0
4993 16:30:01.731675 rx_firspass[0][0][13] = 0
4994 16:30:01.734641 rx_lastpass[0][0][13] = 0
4995 16:30:01.738201 rx_firspass[0][0][14] = 0
4996 16:30:01.738276 rx_lastpass[0][0][14] = 0
4997 16:30:01.741153 rx_firspass[0][0][15] = 0
4998 16:30:01.744832 rx_lastpass[0][0][15] = 0
4999 16:30:01.747916 rx_firspass[0][1][0] = 0
5000 16:30:01.747992 rx_lastpass[0][1][0] = 0
5001 16:30:01.751286 rx_firspass[0][1][1] = 0
5002 16:30:01.754191 rx_lastpass[0][1][1] = 0
5003 16:30:01.754269 rx_firspass[0][1][2] = 0
5004 16:30:01.757844 rx_lastpass[0][1][2] = 0
5005 16:30:01.760678 rx_firspass[0][1][3] = 0
5006 16:30:01.760794 rx_lastpass[0][1][3] = 0
5007 16:30:01.764485 rx_firspass[0][1][4] = 0
5008 16:30:01.767405 rx_lastpass[0][1][4] = 0
5009 16:30:01.770673 rx_firspass[0][1][5] = 0
5010 16:30:01.770804 rx_lastpass[0][1][5] = 0
5011 16:30:01.774324 rx_firspass[0][1][6] = 0
5012 16:30:01.777235 rx_lastpass[0][1][6] = 0
5013 16:30:01.777411 rx_firspass[0][1][7] = 0
5014 16:30:01.780761 rx_lastpass[0][1][7] = 0
5015 16:30:01.784160 rx_firspass[0][1][8] = 0
5016 16:30:01.784256 rx_lastpass[0][1][8] = 0
5017 16:30:01.786903 rx_firspass[0][1][9] = 0
5018 16:30:01.790444 rx_lastpass[0][1][9] = 0
5019 16:30:01.793828 rx_firspass[0][1][10] = 0
5020 16:30:01.793906 rx_lastpass[0][1][10] = 0
5021 16:30:01.797247 rx_firspass[0][1][11] = 0
5022 16:30:01.800520 rx_lastpass[0][1][11] = 0
5023 16:30:01.800590 rx_firspass[0][1][12] = 0
5024 16:30:01.803073 rx_lastpass[0][1][12] = 0
5025 16:30:01.806455 rx_firspass[0][1][13] = 0
5026 16:30:01.810408 rx_lastpass[0][1][13] = 0
5027 16:30:01.810542 rx_firspass[0][1][14] = 0
5028 16:30:01.813511 rx_lastpass[0][1][14] = 0
5029 16:30:01.816583 rx_firspass[0][1][15] = 0
5030 16:30:01.819779 rx_lastpass[0][1][15] = 0
5031 16:30:01.819879 rx_firspass[1][0][0] = 0
5032 16:30:01.823188 rx_lastpass[1][0][0] = 0
5033 16:30:01.826657 rx_firspass[1][0][1] = 0
5034 16:30:01.826755 rx_lastpass[1][0][1] = 0
5035 16:30:01.829393 rx_firspass[1][0][2] = 0
5036 16:30:01.832909 rx_lastpass[1][0][2] = 0
5037 16:30:01.833004 rx_firspass[1][0][3] = 0
5038 16:30:01.836248 rx_lastpass[1][0][3] = 0
5039 16:30:01.839817 rx_firspass[1][0][4] = 0
5040 16:30:01.842576 rx_lastpass[1][0][4] = 0
5041 16:30:01.842670 rx_firspass[1][0][5] = 0
5042 16:30:01.846237 rx_lastpass[1][0][5] = 0
5043 16:30:01.849071 rx_firspass[1][0][6] = 0
5044 16:30:01.849143 rx_lastpass[1][0][6] = 0
5045 16:30:01.852743 rx_firspass[1][0][7] = 0
5046 16:30:01.856250 rx_lastpass[1][0][7] = 0
5047 16:30:01.856320 rx_firspass[1][0][8] = 0
5048 16:30:01.859022 rx_lastpass[1][0][8] = 0
5049 16:30:01.862670 rx_firspass[1][0][9] = 0
5050 16:30:01.862762 rx_lastpass[1][0][9] = 0
5051 16:30:01.865657 rx_firspass[1][0][10] = 0
5052 16:30:01.869233 rx_lastpass[1][0][10] = 0
5053 16:30:01.872173 rx_firspass[1][0][11] = 0
5054 16:30:01.872269 rx_lastpass[1][0][11] = 0
5055 16:30:01.875702 rx_firspass[1][0][12] = 0
5056 16:30:01.878893 rx_lastpass[1][0][12] = 0
5057 16:30:01.882460 rx_firspass[1][0][13] = 0
5058 16:30:01.882608 rx_lastpass[1][0][13] = 0
5059 16:30:01.885368 rx_firspass[1][0][14] = 0
5060 16:30:01.888761 rx_lastpass[1][0][14] = 0
5061 16:30:01.888873 rx_firspass[1][0][15] = 0
5062 16:30:01.892261 rx_lastpass[1][0][15] = 0
5063 16:30:01.895092 rx_firspass[1][1][0] = 0
5064 16:30:01.898889 rx_lastpass[1][1][0] = 0
5065 16:30:01.899074 rx_firspass[1][1][1] = 0
5066 16:30:01.901783 rx_lastpass[1][1][1] = 0
5067 16:30:01.905373 rx_firspass[1][1][2] = 0
5068 16:30:01.905478 rx_lastpass[1][1][2] = 0
5069 16:30:01.908124 rx_firspass[1][1][3] = 0
5070 16:30:01.911652 rx_lastpass[1][1][3] = 0
5071 16:30:01.911766 rx_firspass[1][1][4] = 0
5072 16:30:01.914965 rx_lastpass[1][1][4] = 0
5073 16:30:01.918466 rx_firspass[1][1][5] = 0
5074 16:30:01.921346 rx_lastpass[1][1][5] = 0
5075 16:30:01.921447 rx_firspass[1][1][6] = 0
5076 16:30:01.924957 rx_lastpass[1][1][6] = 0
5077 16:30:01.928316 rx_firspass[1][1][7] = 0
5078 16:30:01.928429 rx_lastpass[1][1][7] = 0
5079 16:30:01.931110 rx_firspass[1][1][8] = 0
5080 16:30:01.934700 rx_lastpass[1][1][8] = 0
5081 16:30:01.934792 rx_firspass[1][1][9] = 0
5082 16:30:01.938128 rx_lastpass[1][1][9] = 0
5083 16:30:01.940811 rx_firspass[1][1][10] = 0
5084 16:30:01.944220 rx_lastpass[1][1][10] = 0
5085 16:30:01.944311 rx_firspass[1][1][11] = 0
5086 16:30:01.947743 rx_lastpass[1][1][11] = 0
5087 16:30:01.951042 rx_firspass[1][1][12] = 0
5088 16:30:01.951179 rx_lastpass[1][1][12] = 0
5089 16:30:01.953848 rx_firspass[1][1][13] = 0
5090 16:30:01.957476 rx_lastpass[1][1][13] = 0
5091 16:30:01.960464 rx_firspass[1][1][14] = 0
5092 16:30:01.960559 rx_lastpass[1][1][14] = 0
5093 16:30:01.964056 rx_firspass[1][1][15] = 0
5094 16:30:01.967174 rx_lastpass[1][1][15] = 0
5095 16:30:01.967247 dump params clk_delay
5096 16:30:01.970984 clk_delay[0] = 0
5097 16:30:01.971070 clk_delay[1] = 0
5098 16:30:01.973921 dump params dqs_delay
5099 16:30:01.974017 dqs_delay[0][0] = 0
5100 16:30:01.976834 dqs_delay[0][1] = 0
5101 16:30:01.980664 dqs_delay[1][0] = 0
5102 16:30:01.980737 dqs_delay[1][1] = 0
5103 16:30:01.983493 dump params delay_cell_unit = 753
5104 16:30:01.986933 mt_set_emi_preloader end
5105 16:30:01.989986 [mt_mem_init] dram size: 0x100000000, rank number: 2
5106 16:30:01.996531 [complex_mem_test] start addr:0x40000000, len:20480
5107 16:30:02.032081 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5108 16:30:02.038777 [complex_mem_test] start addr:0x80000000, len:20480
5109 16:30:02.074122 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5110 16:30:02.080642 [complex_mem_test] start addr:0xc0000000, len:20480
5111 16:30:02.116961 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5112 16:30:02.123420 [complex_mem_test] start addr:0x56000000, len:8192
5113 16:30:02.139933 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5114 16:30:02.143299 ddr_geometry:1
5115 16:30:02.146287 [complex_mem_test] start addr:0x80000000, len:8192
5116 16:30:02.163902 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5117 16:30:02.166630 dram_init: dram init end (result: 0)
5118 16:30:02.173874 Successfully loaded DRAM blobs and ran DRAM calibration
5119 16:30:02.183678 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5120 16:30:02.183783 CBMEM:
5121 16:30:02.186303 IMD: root @ 00000000fffff000 254 entries.
5122 16:30:02.190021 IMD: root @ 00000000ffffec00 62 entries.
5123 16:30:02.196513 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5124 16:30:02.203209 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5125 16:30:02.206075 in-header: 03 a1 00 00 08 00 00 00
5126 16:30:02.209686 in-data: 84 60 60 10 00 00 00 00
5127 16:30:02.212703 Chrome EC: clear events_b mask to 0x0000000020004000
5128 16:30:02.219321 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5129 16:30:02.223709 in-header: 03 fd 00 00 00 00 00 00
5130 16:30:02.226684 in-data:
5131 16:30:02.230362 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5132 16:30:02.233272 CBFS @ 21000 size 3d4000
5133 16:30:02.237013 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5134 16:30:02.239923 CBFS: Locating 'fallback/ramstage'
5135 16:30:02.243493 CBFS: Found @ offset 10d40 size d563
5136 16:30:02.265587 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5137 16:30:02.277673 Accumulated console time in romstage 13474 ms
5138 16:30:02.277750
5139 16:30:02.277810
5140 16:30:02.287397 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5141 16:30:02.291008 ARM64: Exception handlers installed.
5142 16:30:02.291079 ARM64: Testing exception
5143 16:30:02.294487 ARM64: Done test exception
5144 16:30:02.297669 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5145 16:30:02.300424 Manufacturer: ef
5146 16:30:02.307188 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5147 16:30:02.310515 WARNING: RO_VPD is uninitialized or empty.
5148 16:30:02.313822 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5149 16:30:02.317352 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5150 16:30:02.327609 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5151 16:30:02.330364 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5152 16:30:02.336878 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5153 16:30:02.336960 Enumerating buses...
5154 16:30:02.344014 Show all devs... Before device enumeration.
5155 16:30:02.344110 Root Device: enabled 1
5156 16:30:02.346937 CPU_CLUSTER: 0: enabled 1
5157 16:30:02.347006 CPU: 00: enabled 1
5158 16:30:02.350526 Compare with tree...
5159 16:30:02.353427 Root Device: enabled 1
5160 16:30:02.353516 CPU_CLUSTER: 0: enabled 1
5161 16:30:02.357101 CPU: 00: enabled 1
5162 16:30:02.359902 Root Device scanning...
5163 16:30:02.363576 root_dev_scan_bus for Root Device
5164 16:30:02.363647 CPU_CLUSTER: 0 enabled
5165 16:30:02.366441 root_dev_scan_bus for Root Device done
5166 16:30:02.373260 scan_bus: scanning of bus Root Device took 10689 usecs
5167 16:30:02.373361 done
5168 16:30:02.376904 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5169 16:30:02.379626 Allocating resources...
5170 16:30:02.383059 Reading resources...
5171 16:30:02.386324 Root Device read_resources bus 0 link: 0
5172 16:30:02.389521 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5173 16:30:02.393032 CPU: 00 missing read_resources
5174 16:30:02.396721 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5175 16:30:02.399485 Root Device read_resources bus 0 link: 0 done
5176 16:30:02.403231 Done reading resources.
5177 16:30:02.406518 Show resources in subtree (Root Device)...After reading.
5178 16:30:02.412769 Root Device child on link 0 CPU_CLUSTER: 0
5179 16:30:02.416309 CPU_CLUSTER: 0 child on link 0 CPU: 00
5180 16:30:02.422460 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5181 16:30:02.425740 CPU: 00
5182 16:30:02.425812 Setting resources...
5183 16:30:02.429063 Root Device assign_resources, bus 0 link: 0
5184 16:30:02.432383 CPU_CLUSTER: 0 missing set_resources
5185 16:30:02.438919 Root Device assign_resources, bus 0 link: 0
5186 16:30:02.439008 Done setting resources.
5187 16:30:02.445376 Show resources in subtree (Root Device)...After assigning values.
5188 16:30:02.449078 Root Device child on link 0 CPU_CLUSTER: 0
5189 16:30:02.451899 CPU_CLUSTER: 0 child on link 0 CPU: 00
5190 16:30:02.462150 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5191 16:30:02.462256 CPU: 00
5192 16:30:02.465167 Done allocating resources.
5193 16:30:02.471909 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5194 16:30:02.472010 Enabling resources...
5195 16:30:02.472095 done.
5196 16:30:02.478523 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5197 16:30:02.478606 Initializing devices...
5198 16:30:02.481339 Root Device init ...
5199 16:30:02.484908 mainboard_init: Starting display init.
5200 16:30:02.487863 ADC[4]: Raw value=75552 ID=0
5201 16:30:02.510317 anx7625_power_on_init: Init interface.
5202 16:30:02.513263 anx7625_disable_pd_protocol: Disabled PD feature.
5203 16:30:02.520168 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5204 16:30:02.566512 anx7625_start_dp_work: Secure OCM version=00
5205 16:30:02.570263 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5206 16:30:02.587459 sp_tx_get_edid_block: EDID Block = 1
5207 16:30:02.704524 Extracted contents:
5208 16:30:02.708071 header: 00 ff ff ff ff ff ff 00
5209 16:30:02.711011 serial number: 06 af 5c 14 00 00 00 00 00 1a
5210 16:30:02.714652 version: 01 04
5211 16:30:02.717473 basic params: 95 1a 0e 78 02
5212 16:30:02.721175 chroma info: 99 85 95 55 56 92 28 22 50 54
5213 16:30:02.724479 established: 00 00 00
5214 16:30:02.731111 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5215 16:30:02.737134 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5216 16:30:02.740521 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5217 16:30:02.747169 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5218 16:30:02.753560 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5219 16:30:02.757064 extensions: 00
5220 16:30:02.757140 checksum: ae
5221 16:30:02.757199
5222 16:30:02.763465 Manufacturer: AUO Model 145c Serial Number 0
5223 16:30:02.763542 Made week 0 of 2016
5224 16:30:02.766971 EDID version: 1.4
5225 16:30:02.767070 Digital display
5226 16:30:02.770403 6 bits per primary color channel
5227 16:30:02.773806 DisplayPort interface
5228 16:30:02.773908 Maximum image size: 26 cm x 14 cm
5229 16:30:02.776583 Gamma: 220%
5230 16:30:02.776700 Check DPMS levels
5231 16:30:02.780116 Supported color formats: RGB 4:4:4
5232 16:30:02.783026 First detailed timing is preferred timing
5233 16:30:02.786637 Established timings supported:
5234 16:30:02.789678 Standard timings supported:
5235 16:30:02.789760 Detailed timings
5236 16:30:02.796825 Hex of detail: ce1d56ea50001a3030204600009010000018
5237 16:30:02.799764 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5238 16:30:02.806076 0556 0586 05a6 0640 hborder 0
5239 16:30:02.809339 0300 0304 030a 031a vborder 0
5240 16:30:02.812952 -hsync -vsync
5241 16:30:02.813058 Did detailed timing
5242 16:30:02.819478 Hex of detail: 0000000f0000000000000000000000000020
5243 16:30:02.822374 Manufacturer-specified data, tag 15
5244 16:30:02.825989 Hex of detail: 000000fe0041554f0a202020202020202020
5245 16:30:02.826066 ASCII string: AUO
5246 16:30:02.832790 Hex of detail: 000000fe004231313658414230312e34200a
5247 16:30:02.836234 ASCII string: B116XAB01.4
5248 16:30:02.836323 Checksum
5249 16:30:02.836385 Checksum: 0xae (valid)
5250 16:30:02.842232 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5251 16:30:02.845976 DSI data_rate: 457800000 bps
5252 16:30:02.852471 anx7625_parse_edid: set default k value to 0x3d for panel
5253 16:30:02.855943 anx7625_parse_edid: pixelclock(76300).
5254 16:30:02.858983 hactive(1366), hsync(32), hfp(48), hbp(154)
5255 16:30:02.862414 vactive(768), vsync(6), vfp(4), vbp(16)
5256 16:30:02.865423 anx7625_dsi_config: config dsi.
5257 16:30:02.872920 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5258 16:30:02.893851 anx7625_dsi_config: success to config DSI
5259 16:30:02.897251 anx7625_dp_start: MIPI phy setup OK.
5260 16:30:02.900645 [SSUSB] Setting up USB HOST controller...
5261 16:30:02.903420 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5262 16:30:02.907180 [SSUSB] phy power-on done.
5263 16:30:02.910669 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5264 16:30:02.914168 in-header: 03 fc 01 00 00 00 00 00
5265 16:30:02.914288 in-data:
5266 16:30:02.920371 handle_proto3_response: EC response with error code: 1
5267 16:30:02.920460 SPM: pcm index = 1
5268 16:30:02.924081 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5269 16:30:02.927087 CBFS @ 21000 size 3d4000
5270 16:30:02.933795 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5271 16:30:02.936828 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5272 16:30:02.940497 CBFS: Found @ offset 1e7c0 size 1026
5273 16:30:02.947382 read SPI 0x3f808 0x1026: 1272 us, 3250 KB/s, 26.000 Mbps
5274 16:30:02.950361 SPM: binary array size = 2988
5275 16:30:02.953379 SPM: version = pcm_allinone_v1.17.2_20180829
5276 16:30:02.957020 SPM binary loaded in 32 msecs
5277 16:30:02.965210 spm_kick_im_to_fetch: ptr = 000000004021eec2
5278 16:30:02.968120 spm_kick_im_to_fetch: len = 2988
5279 16:30:02.968234 SPM: spm_kick_pcm_to_run
5280 16:30:02.971782 SPM: spm_kick_pcm_to_run done
5281 16:30:02.974603 SPM: spm_init done in 52 msecs
5282 16:30:02.978273 Root Device init finished in 495003 usecs
5283 16:30:02.981073 CPU_CLUSTER: 0 init ...
5284 16:30:02.991291 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5285 16:30:02.994106 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5286 16:30:02.997672 CBFS @ 21000 size 3d4000
5287 16:30:03.001065 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5288 16:30:03.004423 CBFS: Locating 'sspm.bin'
5289 16:30:03.007689 CBFS: Found @ offset 208c0 size 41cb
5290 16:30:03.017977 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5291 16:30:03.026154 CPU_CLUSTER: 0 init finished in 42803 usecs
5292 16:30:03.026255 Devices initialized
5293 16:30:03.029383 Show all devs... After init.
5294 16:30:03.032621 Root Device: enabled 1
5295 16:30:03.032702 CPU_CLUSTER: 0: enabled 1
5296 16:30:03.035993 CPU: 00: enabled 1
5297 16:30:03.038992 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5298 16:30:03.045572 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5299 16:30:03.049126 ELOG: NV offset 0x558000 size 0x1000
5300 16:30:03.051757 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5301 16:30:03.059015 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5302 16:30:03.065442 ELOG: Event(17) added with size 13 at 2024-06-17 16:30:02 UTC
5303 16:30:03.068485 out: cmd=0x121: 03 db 21 01 00 00 00 00
5304 16:30:03.072081 in-header: 03 a2 00 00 2c 00 00 00
5305 16:30:03.084925 in-data: 72 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 9f ec 04 00 06 80 00 00 6a fa 00 00 06 80 00 00 72 b9 12 00 06 80 00 00 ab 57 16 00
5306 16:30:03.088567 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5307 16:30:03.091418 in-header: 03 19 00 00 08 00 00 00
5308 16:30:03.094788 in-data: a2 e0 47 00 13 00 00 00
5309 16:30:03.094863 Chrome EC: UHEPI supported
5310 16:30:03.104594 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5311 16:30:03.108184 in-header: 03 e1 00 00 08 00 00 00
5312 16:30:03.108256 in-data: 84 20 60 10 00 00 00 00
5313 16:30:03.114543 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5314 16:30:03.121409 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5315 16:30:03.124352 in-header: 03 e1 00 00 08 00 00 00
5316 16:30:03.127896 in-data: 84 20 60 10 00 00 00 00
5317 16:30:03.130864 ELOG: Event(A1) added with size 10 at 2024-06-17 16:30:02 UTC
5318 16:30:03.137485 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5319 16:30:03.144341 ELOG: Event(A0) added with size 9 at 2024-06-17 16:30:02 UTC
5320 16:30:03.147411 elog_add_boot_reason: Logged dev mode boot
5321 16:30:03.150942 Finalize devices...
5322 16:30:03.151033 Devices finalized
5323 16:30:03.157472 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5324 16:30:03.160876 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5325 16:30:03.167272 ELOG: Event(91) added with size 10 at 2024-06-17 16:30:02 UTC
5326 16:30:03.170183 Writing coreboot table at 0xffeda000
5327 16:30:03.173753 0. 0000000000114000-000000000011efff: RAMSTAGE
5328 16:30:03.179998 1. 0000000040000000-000000004023cfff: RAMSTAGE
5329 16:30:03.183658 2. 000000004023d000-00000000545fffff: RAM
5330 16:30:03.186483 3. 0000000054600000-000000005465ffff: BL31
5331 16:30:03.190233 4. 0000000054660000-00000000ffed9fff: RAM
5332 16:30:03.196635 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5333 16:30:03.200183 6. 0000000100000000-000000013fffffff: RAM
5334 16:30:03.203090 Passing 5 GPIOs to payload:
5335 16:30:03.206665 NAME | PORT | POLARITY | VALUE
5336 16:30:03.210139 write protect | 0x00000096 | low | high
5337 16:30:03.216628 EC in RW | 0x000000b1 | high | undefined
5338 16:30:03.219481 EC interrupt | 0x00000097 | low | undefined
5339 16:30:03.225979 TPM interrupt | 0x00000099 | high | undefined
5340 16:30:03.229371 speaker enable | 0x000000af | high | undefined
5341 16:30:03.232881 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5342 16:30:03.235734 in-header: 03 f7 00 00 02 00 00 00
5343 16:30:03.239246 in-data: 04 00
5344 16:30:03.239334 Board ID: 4
5345 16:30:03.242845 ADC[3]: Raw value=213114 ID=1
5346 16:30:03.242930 RAM code: 1
5347 16:30:03.243011 SKU ID: 16
5348 16:30:03.249228 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5349 16:30:03.249320 CBFS @ 21000 size 3d4000
5350 16:30:03.255556 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5351 16:30:03.262054 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 56de
5352 16:30:03.265413 coreboot table: 940 bytes.
5353 16:30:03.268711 IMD ROOT 0. 00000000fffff000 00001000
5354 16:30:03.272334 IMD SMALL 1. 00000000ffffe000 00001000
5355 16:30:03.275323 CONSOLE 2. 00000000fffde000 00020000
5356 16:30:03.278838 FMAP 3. 00000000fffdd000 0000047c
5357 16:30:03.281952 TIME STAMP 4. 00000000fffdc000 00000910
5358 16:30:03.285256 RAMOOPS 5. 00000000ffedc000 00100000
5359 16:30:03.288886 COREBOOT 6. 00000000ffeda000 00002000
5360 16:30:03.291754 IMD small region:
5361 16:30:03.295312 IMD ROOT 0. 00000000ffffec00 00000400
5362 16:30:03.298300 VBOOT WORK 1. 00000000ffffeb00 00000100
5363 16:30:03.302003 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5364 16:30:03.308512 VPD 3. 00000000ffffea60 0000006c
5365 16:30:03.311417 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5366 16:30:03.318371 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5367 16:30:03.321261 in-header: 03 e1 00 00 08 00 00 00
5368 16:30:03.324296 in-data: 84 20 60 10 00 00 00 00
5369 16:30:03.327999 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5370 16:30:03.331605 CBFS @ 21000 size 3d4000
5371 16:30:03.338150 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5372 16:30:03.338227 CBFS: Locating 'fallback/payload'
5373 16:30:03.347350 CBFS: Found @ offset dc040 size 439a0
5374 16:30:03.435095 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5375 16:30:03.438627 Checking segment from ROM address 0x0000000040003a00
5376 16:30:03.445284 Checking segment from ROM address 0x0000000040003a1c
5377 16:30:03.448829 Loading segment from ROM address 0x0000000040003a00
5378 16:30:03.451699 code (compression=0)
5379 16:30:03.461469 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5380 16:30:03.467792 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5381 16:30:03.471329 it's not compressed!
5382 16:30:03.474299 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5383 16:30:03.480988 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5384 16:30:03.489801 Loading segment from ROM address 0x0000000040003a1c
5385 16:30:03.492842 Entry Point 0x0000000080000000
5386 16:30:03.492937 Loaded segments
5387 16:30:03.499366 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5388 16:30:03.503095 Jumping to boot code at 0000000080000000(00000000ffeda000)
5389 16:30:03.512462 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5390 16:30:03.519133 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5391 16:30:03.519235 CBFS @ 21000 size 3d4000
5392 16:30:03.525867 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5393 16:30:03.529109 CBFS: Locating 'fallback/bl31'
5394 16:30:03.532197 CBFS: Found @ offset 36dc0 size 5820
5395 16:30:03.543574 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5396 16:30:03.547074 Checking segment from ROM address 0x0000000040003a00
5397 16:30:03.553617 Checking segment from ROM address 0x0000000040003a1c
5398 16:30:03.557123 Loading segment from ROM address 0x0000000040003a00
5399 16:30:03.560013 code (compression=1)
5400 16:30:03.570075 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5401 16:30:03.576337 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5402 16:30:03.576417 using LZMA
5403 16:30:03.585110 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5404 16:30:03.591916 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5405 16:30:03.595631 Loading segment from ROM address 0x0000000040003a1c
5406 16:30:03.598525 Entry Point 0x0000000054601000
5407 16:30:03.598610 Loaded segments
5408 16:30:03.601664 NOTICE: MT8183 bl31_setup
5409 16:30:03.609056 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5410 16:30:03.612713 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5411 16:30:03.616148 INFO: [DEVAPC] dump DEVAPC registers:
5412 16:30:03.625863 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5413 16:30:03.632261 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5414 16:30:03.642070 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5415 16:30:03.648799 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5416 16:30:03.658552 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5417 16:30:03.665006 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5418 16:30:03.674840 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5419 16:30:03.681186 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5420 16:30:03.691456 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5421 16:30:03.697932 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5422 16:30:03.708130 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5423 16:30:03.714852 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5424 16:30:03.724269 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5425 16:30:03.730926 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5426 16:30:03.738008 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5427 16:30:03.743794 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5428 16:30:03.754002 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5429 16:30:03.760709 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5430 16:30:03.767219 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5431 16:30:03.773755 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5432 16:30:03.783138 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5433 16:30:03.790259 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5434 16:30:03.793085 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5435 16:30:03.796779 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5436 16:30:03.799618 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5437 16:30:03.803025 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5438 16:30:03.806420 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5439 16:30:03.812886 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5440 16:30:03.816020 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5441 16:30:03.819462 WARNING: region 0:
5442 16:30:03.822751 WARNING: apc:0x168, sa:0x0, ea:0xfff
5443 16:30:03.822820 WARNING: region 1:
5444 16:30:03.825665 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5445 16:30:03.829166 WARNING: region 2:
5446 16:30:03.832342 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5447 16:30:03.835710 WARNING: region 3:
5448 16:30:03.839659 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5449 16:30:03.839739 WARNING: region 4:
5450 16:30:03.842650 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5451 16:30:03.845472 WARNING: region 5:
5452 16:30:03.849056 WARNING: apc:0x0, sa:0x0, ea:0x0
5453 16:30:03.849128 WARNING: region 6:
5454 16:30:03.852730 WARNING: apc:0x0, sa:0x0, ea:0x0
5455 16:30:03.855623 WARNING: region 7:
5456 16:30:03.858621 WARNING: apc:0x0, sa:0x0, ea:0x0
5457 16:30:03.865223 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5458 16:30:03.868893 INFO: SPM: enable SPMC mode
5459 16:30:03.871745 NOTICE: spm_boot_init() start
5460 16:30:03.871817 NOTICE: spm_boot_init() end
5461 16:30:03.878246 INFO: BL31: Initializing runtime services
5462 16:30:03.881825 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5463 16:30:03.888367 INFO: BL31: Preparing for EL3 exit to normal world
5464 16:30:03.892029 INFO: Entry point address = 0x80000000
5465 16:30:03.894905 INFO: SPSR = 0x8
5466 16:30:03.915534
5467 16:30:03.915631
5468 16:30:03.915716
5469 16:30:03.916326 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
5470 16:30:03.916448 start: 2.2.4 bootloader-commands (timeout 00:04:32) [common]
5471 16:30:03.916558 Setting prompt string to ['jacuzzi:']
5472 16:30:03.916660 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:32)
5473 16:30:03.918666 Starting depthcharge on Juniper...
5474 16:30:03.918739
5475 16:30:03.922367 vboot_handoff: creating legacy vboot_handoff structure
5476 16:30:03.922438
5477 16:30:03.925195 ec_init(0): CrosEC protocol v3 supported (544, 544)
5478 16:30:03.928937
5479 16:30:03.929008 Wipe memory regions:
5480 16:30:03.929082
5481 16:30:03.931937 [0x00000040000000, 0x00000054600000)
5482 16:30:03.974866
5483 16:30:03.974957 [0x00000054660000, 0x00000080000000)
5484 16:30:04.066727
5485 16:30:04.066841 [0x000000811994a0, 0x000000ffeda000)
5486 16:30:04.326506
5487 16:30:04.326638 [0x00000100000000, 0x00000140000000)
5488 16:30:04.459511
5489 16:30:04.462144 Initializing XHCI USB controller at 0x11200000.
5490 16:30:04.485254
5491 16:30:04.489015 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5492 16:30:04.489097
5493 16:30:04.489158
5494 16:30:04.489450 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5496 16:30:04.589798 jacuzzi: tftpboot 192.168.201.1 14396126/tftp-deploy-j1tboocy/kernel/image.itb 14396126/tftp-deploy-j1tboocy/kernel/cmdline
5497 16:30:04.589994 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5498 16:30:04.590078 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:31)
5499 16:30:04.595003 tftpboot 192.168.201.1 14396126/tftp-deploy-j1tboocy/kernel/image.itbtp-deploy-j1tboocy/kernel/cmdline
5500 16:30:04.595108
5501 16:30:04.595196 Waiting for link
5502 16:30:04.999669
5503 16:30:04.999783 R8152: Initializing
5504 16:30:04.999846
5505 16:30:05.002615 Version 9 (ocp_data = 6010)
5506 16:30:05.002685
5507 16:30:05.006297 R8152: Done initializing
5508 16:30:05.006375
5509 16:30:05.006436 Adding net device
5510 16:30:05.391855
5511 16:30:05.391990 done.
5512 16:30:05.392077
5513 16:30:05.392160 MAC: 00:e0:4c:72:3d:a6
5514 16:30:05.392242
5515 16:30:05.395492 Sending DHCP discover... done.
5516 16:30:05.395605
5517 16:30:05.398578 Waiting for reply... done.
5518 16:30:05.398658
5519 16:30:05.401396 Sending DHCP request... done.
5520 16:30:05.401474
5521 16:30:05.401534 Waiting for reply... done.
5522 16:30:05.401602
5523 16:30:05.404936 My ip is 192.168.201.20
5524 16:30:05.405013
5525 16:30:05.408529 The DHCP server ip is 192.168.201.1
5526 16:30:05.408631
5527 16:30:05.411429 TFTP server IP predefined by user: 192.168.201.1
5528 16:30:05.411517
5529 16:30:05.417990 Bootfile predefined by user: 14396126/tftp-deploy-j1tboocy/kernel/image.itb
5530 16:30:05.418071
5531 16:30:05.421715 Sending tftp read request... done.
5532 16:30:05.421793
5533 16:30:05.424649 Waiting for the transfer...
5534 16:30:05.424757
5535 16:30:05.681786 00000000 ################################################################
5536 16:30:05.681927
5537 16:30:05.930737 00080000 ################################################################
5538 16:30:05.930877
5539 16:30:06.179663 00100000 ################################################################
5540 16:30:06.179777
5541 16:30:06.474275 00180000 ################################################################
5542 16:30:06.474422
5543 16:30:06.773803 00200000 ################################################################
5544 16:30:06.773925
5545 16:30:07.023682 00280000 ################################################################
5546 16:30:07.023839
5547 16:30:07.271841 00300000 ################################################################
5548 16:30:07.271961
5549 16:30:07.519699 00380000 ################################################################
5550 16:30:07.519810
5551 16:30:07.766996 00400000 ################################################################
5552 16:30:07.767136
5553 16:30:08.007475 00480000 ################################################################
5554 16:30:08.007622
5555 16:30:08.249261 00500000 ################################################################
5556 16:30:08.249425
5557 16:30:08.501453 00580000 ################################################################
5558 16:30:08.501604
5559 16:30:08.759922 00600000 ################################################################
5560 16:30:08.760034
5561 16:30:09.016026 00680000 ################################################################
5562 16:30:09.016140
5563 16:30:09.274341 00700000 ################################################################
5564 16:30:09.274487
5565 16:30:09.532550 00780000 ################################################################
5566 16:30:09.532691
5567 16:30:09.788258 00800000 ################################################################
5568 16:30:09.788374
5569 16:30:10.033794 00880000 ################################################################
5570 16:30:10.033931
5571 16:30:10.282631 00900000 ################################################################
5572 16:30:10.282771
5573 16:30:10.530472 00980000 ################################################################
5574 16:30:10.530588
5575 16:30:10.777656 00a00000 ################################################################
5576 16:30:10.777800
5577 16:30:11.026730 00a80000 ################################################################
5578 16:30:11.026847
5579 16:30:11.276034 00b00000 ################################################################
5580 16:30:11.276196
5581 16:30:11.524179 00b80000 ################################################################
5582 16:30:11.524293
5583 16:30:11.778988 00c00000 ################################################################
5584 16:30:11.779130
5585 16:30:12.037156 00c80000 ################################################################
5586 16:30:12.037297
5587 16:30:12.295656 00d00000 ################################################################
5588 16:30:12.295785
5589 16:30:12.547228 00d80000 ################################################################
5590 16:30:12.547346
5591 16:30:12.797920 00e00000 ################################################################
5592 16:30:12.798039
5593 16:30:13.056771 00e80000 ################################################################
5594 16:30:13.056892
5595 16:30:13.308912 00f00000 ################################################################
5596 16:30:13.309058
5597 16:30:13.556603 00f80000 ################################################################
5598 16:30:13.556754
5599 16:30:13.813952 01000000 ################################################################
5600 16:30:13.814071
5601 16:30:14.076952 01080000 ################################################################
5602 16:30:14.077103
5603 16:30:14.341630 01100000 ################################################################
5604 16:30:14.341798
5605 16:30:14.606271 01180000 ################################################################
5606 16:30:14.606391
5607 16:30:14.849987 01200000 ################################################################
5608 16:30:14.850132
5609 16:30:15.106356 01280000 ################################################################
5610 16:30:15.106501
5611 16:30:15.352902 01300000 ################################################################
5612 16:30:15.353020
5613 16:30:15.609433 01380000 ################################################################
5614 16:30:15.609592
5615 16:30:15.902647 01400000 ################################################################
5616 16:30:15.902793
5617 16:30:16.175295 01480000 ################################################################
5618 16:30:16.175437
5619 16:30:16.479922 01500000 ################################################################
5620 16:30:16.480066
5621 16:30:16.759754 01580000 ################################################################
5622 16:30:16.759864
5623 16:30:17.046942 01600000 ################################################################
5624 16:30:17.047056
5625 16:30:17.321218 01680000 ################################################################
5626 16:30:17.321335
5627 16:30:17.597126 01700000 ################################################################
5628 16:30:17.597263
5629 16:30:17.856497 01780000 ################################################################
5630 16:30:17.856639
5631 16:30:18.121943 01800000 ################################################################
5632 16:30:18.122089
5633 16:30:18.385735 01880000 ################################################################
5634 16:30:18.385859
5635 16:30:18.646092 01900000 ################################################################
5636 16:30:18.646242
5637 16:30:18.923067 01980000 ################################################################
5638 16:30:18.923202
5639 16:30:19.181063 01a00000 ################################################################
5640 16:30:19.181201
5641 16:30:19.461380 01a80000 ################################################################
5642 16:30:19.461497
5643 16:30:19.752153 01b00000 ################################################################
5644 16:30:19.752273
5645 16:30:20.007410 01b80000 ################################################################
5646 16:30:20.007587
5647 16:30:20.285627 01c00000 ################################################################
5648 16:30:20.285750
5649 16:30:20.545869 01c80000 ################################################################
5650 16:30:20.546010
5651 16:30:20.808586 01d00000 ################################################################
5652 16:30:20.808700
5653 16:30:21.075625 01d80000 ################################################################
5654 16:30:21.075770
5655 16:30:21.343813 01e00000 ################################################################
5656 16:30:21.343942
5657 16:30:21.631052 01e80000 ################################################################
5658 16:30:21.631168
5659 16:30:21.906291 01f00000 ################################################################
5660 16:30:21.906406
5661 16:30:22.171319 01f80000 ################################################################
5662 16:30:22.171436
5663 16:30:22.454752 02000000 ################################################################
5664 16:30:22.454878
5665 16:30:22.721934 02080000 ############################################################ done.
5666 16:30:22.722058
5667 16:30:22.725469 The bootfile was 34563166 bytes long.
5668 16:30:22.725609
5669 16:30:22.729135 Sending tftp read request... done.
5670 16:30:22.729262
5671 16:30:22.732184 Waiting for the transfer...
5672 16:30:22.732300
5673 16:30:22.732392 00000000 # done.
5674 16:30:22.732484
5675 16:30:22.741628 Command line loaded dynamically from TFTP file: 14396126/tftp-deploy-j1tboocy/kernel/cmdline
5676 16:30:22.741756
5677 16:30:22.758406 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5678 16:30:22.758537
5679 16:30:22.758623 Loading FIT.
5680 16:30:22.758682
5681 16:30:22.761779 Image ramdisk-1 has 21374673 bytes.
5682 16:30:22.761885
5683 16:30:22.765256 Image fdt-1 has 57695 bytes.
5684 16:30:22.765358
5685 16:30:22.767991 Image kernel-1 has 13128753 bytes.
5686 16:30:22.768094
5687 16:30:22.774647 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5688 16:30:22.774761
5689 16:30:22.787793 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5690 16:30:22.787909
5691 16:30:22.794457 Choosing best match conf-1 for compat google,juniper-sku16.
5692 16:30:22.794537
5693 16:30:22.802478 Connected to device vid:did:rid of 1ae0:0028:00
5694 16:30:22.809124
5695 16:30:22.812501 tpm_get_response: command 0x17b, return code 0x0
5696 16:30:22.812603
5697 16:30:22.815475 tpm_cleanup: add release locality here.
5698 16:30:22.815548
5699 16:30:22.818700 Shutting down all USB controllers.
5700 16:30:22.818777
5701 16:30:22.822506 Removing current net device
5702 16:30:22.822591
5703 16:30:22.825765 Exiting depthcharge with code 4 at timestamp: 35973807
5704 16:30:22.825838
5705 16:30:22.832376 LZMA decompressing kernel-1 to 0x80193568
5706 16:30:22.832452
5707 16:30:22.835332 LZMA decompressing kernel-1 to 0x40000000
5708 16:30:24.700092
5709 16:30:24.700209 jumping to kernel
5710 16:30:24.700890 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
5711 16:30:24.700987 start: 2.2.5 auto-login-action (timeout 00:04:11) [common]
5712 16:30:24.701057 Setting prompt string to ['Linux version [0-9]']
5713 16:30:24.701121 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5714 16:30:24.701186 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5715 16:30:24.775046
5716 16:30:24.778632 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5717 16:30:24.781935 start: 2.2.5.1 login-action (timeout 00:04:11) [common]
5718 16:30:24.782034 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5719 16:30:24.782106 Setting prompt string to []
5720 16:30:24.782184 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5721 16:30:24.782251 Using line separator: #'\n'#
5722 16:30:24.782307 No login prompt set.
5723 16:30:24.782370 Parsing kernel messages
5724 16:30:24.782422 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5725 16:30:24.782522 [login-action] Waiting for messages, (timeout 00:04:11)
5726 16:30:24.782585 Waiting using forced prompt support (timeout 00:02:06)
5727 16:30:24.801046 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j234605-arm64-gcc-10-defconfig-arm64-chromebook-rs2lc) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Mon Jun 17 16:16:56 UTC 2024
5728 16:30:24.804645 [ 0.000000] random: crng init done
5729 16:30:24.811398 [ 0.000000] Machine model: Google juniper sku16 board
5730 16:30:24.814471 [ 0.000000] efi: UEFI not found.
5731 16:30:24.821077 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5732 16:30:24.830758 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5733 16:30:24.837391 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5734 16:30:24.840961 [ 0.000000] printk: bootconsole [mtk8250] enabled
5735 16:30:24.849961 [ 0.000000] NUMA: No NUMA configuration found
5736 16:30:24.856433 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5737 16:30:24.863350 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5738 16:30:24.863451 [ 0.000000] Zone ranges:
5739 16:30:24.869701 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5740 16:30:24.873149 [ 0.000000] DMA32 empty
5741 16:30:24.879723 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5742 16:30:24.882657 [ 0.000000] Movable zone start for each node
5743 16:30:24.886184 [ 0.000000] Early memory node ranges
5744 16:30:24.892959 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5745 16:30:24.899418 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5746 16:30:24.906000 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5747 16:30:24.912297 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5748 16:30:24.918929 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5749 16:30:24.925517 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5750 16:30:24.942421 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5751 16:30:24.948648 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5752 16:30:24.955153 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5753 16:30:24.958886 [ 0.000000] psci: probing for conduit method from DT.
5754 16:30:24.965274 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5755 16:30:24.968859 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5756 16:30:24.975188 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5757 16:30:24.978764 [ 0.000000] psci: SMC Calling Convention v1.1
5758 16:30:24.984723 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5759 16:30:24.987960 [ 0.000000] Detected VIPT I-cache on CPU0
5760 16:30:24.994604 [ 0.000000] CPU features: detected: GIC system register CPU interface
5761 16:30:25.001358 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5762 16:30:25.007785 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5763 16:30:25.014890 [ 0.000000] CPU features: detected: ARM erratum 845719
5764 16:30:25.017653 [ 0.000000] alternatives: applying boot alternatives
5765 16:30:25.024289 [ 0.000000] Fallback order for Node 0: 0
5766 16:30:25.030926 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5767 16:30:25.034162 [ 0.000000] Policy zone: Normal
5768 16:30:25.050544 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5769 16:30:25.063621 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5770 16:30:25.073845 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5771 16:30:25.080420 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5772 16:30:25.087065 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5773 16:30:25.089920 <6>[ 0.000000] software IO TLB: area num 8.
5774 16:30:25.116629 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5775 16:30:25.175005 <6>[ 0.000000] Memory: 3894204K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 264260K reserved, 32768K cma-reserved)
5776 16:30:25.181412 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5777 16:30:25.188101 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5778 16:30:25.191117 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5779 16:30:25.197566 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5780 16:30:25.204618 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5781 16:30:25.210968 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5782 16:30:25.217665 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5783 16:30:25.224041 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5784 16:30:25.230352 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5785 16:30:25.240830 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5786 16:30:25.243918 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5787 16:30:25.250625 <6>[ 0.000000] GICv3: 640 SPIs implemented
5788 16:30:25.253354 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5789 16:30:25.259835 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5790 16:30:25.263110 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5791 16:30:25.270362 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5792 16:30:25.283269 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5793 16:30:25.293475 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5794 16:30:25.302901 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5795 16:30:25.312284 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5796 16:30:25.325360 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5797 16:30:25.332051 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5798 16:30:25.338538 <6>[ 0.009477] Console: colour dummy device 80x25
5799 16:30:25.342213 <6>[ 0.014517] printk: console [tty1] enabled
5800 16:30:25.354946 <6>[ 0.018903] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5801 16:30:25.358536 <6>[ 0.029367] pid_max: default: 32768 minimum: 301
5802 16:30:25.361458 <6>[ 0.034248] LSM: Security Framework initializing
5803 16:30:25.371402 <6>[ 0.039166] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5804 16:30:25.378506 <6>[ 0.046790] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5805 16:30:25.384828 <4>[ 0.055655] cacheinfo: Unable to detect cache hierarchy for CPU 0
5806 16:30:25.394682 <6>[ 0.062284] cblist_init_generic: Setting adjustable number of callback queues.
5807 16:30:25.401285 <6>[ 0.069730] cblist_init_generic: Setting shift to 3 and lim to 1.
5808 16:30:25.407884 <6>[ 0.076083] cblist_init_generic: Setting adjustable number of callback queues.
5809 16:30:25.414452 <6>[ 0.083528] cblist_init_generic: Setting shift to 3 and lim to 1.
5810 16:30:25.417914 <6>[ 0.089926] rcu: Hierarchical SRCU implementation.
5811 16:30:25.424403 <6>[ 0.094952] rcu: Max phase no-delay instances is 1000.
5812 16:30:25.431811 <6>[ 0.102880] EFI services will not be available.
5813 16:30:25.435381 <6>[ 0.107829] smp: Bringing up secondary CPUs ...
5814 16:30:25.446095 <6>[ 0.113110] Detected VIPT I-cache on CPU1
5815 16:30:25.452821 <4>[ 0.113156] cacheinfo: Unable to detect cache hierarchy for CPU 1
5816 16:30:25.459060 <6>[ 0.113165] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5817 16:30:25.465541 <6>[ 0.113197] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5818 16:30:25.469248 <6>[ 0.113681] Detected VIPT I-cache on CPU2
5819 16:30:25.475676 <4>[ 0.113714] cacheinfo: Unable to detect cache hierarchy for CPU 2
5820 16:30:25.482118 <6>[ 0.113719] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5821 16:30:25.488498 <6>[ 0.113732] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5822 16:30:25.495669 <6>[ 0.114175] Detected VIPT I-cache on CPU3
5823 16:30:25.501951 <4>[ 0.114206] cacheinfo: Unable to detect cache hierarchy for CPU 3
5824 16:30:25.508462 <6>[ 0.114210] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5825 16:30:25.514856 <6>[ 0.114222] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5826 16:30:25.518614 <6>[ 0.114796] CPU features: detected: Spectre-v2
5827 16:30:25.524911 <6>[ 0.114806] CPU features: detected: Spectre-BHB
5828 16:30:25.528417 <6>[ 0.114810] CPU features: detected: ARM erratum 858921
5829 16:30:25.534390 <6>[ 0.114815] Detected VIPT I-cache on CPU4
5830 16:30:25.541071 <4>[ 0.114862] cacheinfo: Unable to detect cache hierarchy for CPU 4
5831 16:30:25.547778 <6>[ 0.114869] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5832 16:30:25.554444 <6>[ 0.114877] arch_timer: Enabling local workaround for ARM erratum 858921
5833 16:30:25.557427 <6>[ 0.114888] arch_timer: CPU4: Trapping CNTVCT access
5834 16:30:25.563902 <6>[ 0.114895] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5835 16:30:25.570570 <6>[ 0.115382] Detected VIPT I-cache on CPU5
5836 16:30:25.576725 <4>[ 0.115422] cacheinfo: Unable to detect cache hierarchy for CPU 5
5837 16:30:25.583278 <6>[ 0.115428] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5838 16:30:25.589885 <6>[ 0.115435] arch_timer: Enabling local workaround for ARM erratum 858921
5839 16:30:25.596578 <6>[ 0.115441] arch_timer: CPU5: Trapping CNTVCT access
5840 16:30:25.603257 <6>[ 0.115446] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5841 16:30:25.606351 <6>[ 0.115883] Detected VIPT I-cache on CPU6
5842 16:30:25.613387 <4>[ 0.115927] cacheinfo: Unable to detect cache hierarchy for CPU 6
5843 16:30:25.619707 <6>[ 0.115934] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5844 16:30:25.626006 <6>[ 0.115941] arch_timer: Enabling local workaround for ARM erratum 858921
5845 16:30:25.632446 <6>[ 0.115947] arch_timer: CPU6: Trapping CNTVCT access
5846 16:30:25.638911 <6>[ 0.115952] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5847 16:30:25.642608 <6>[ 0.116483] Detected VIPT I-cache on CPU7
5848 16:30:25.649197 <4>[ 0.116527] cacheinfo: Unable to detect cache hierarchy for CPU 7
5849 16:30:25.655854 <6>[ 0.116533] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5850 16:30:25.662540 <6>[ 0.116540] arch_timer: Enabling local workaround for ARM erratum 858921
5851 16:30:25.669089 <6>[ 0.116546] arch_timer: CPU7: Trapping CNTVCT access
5852 16:30:25.675732 <6>[ 0.116552] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5853 16:30:25.678696 <6>[ 0.116615] smp: Brought up 1 node, 8 CPUs
5854 16:30:25.685422 <6>[ 0.355484] SMP: Total of 8 processors activated.
5855 16:30:25.688882 <6>[ 0.360420] CPU features: detected: 32-bit EL0 Support
5856 16:30:25.695093 <6>[ 0.365789] CPU features: detected: 32-bit EL1 Support
5857 16:30:25.701594 <6>[ 0.371155] CPU features: detected: CRC32 instructions
5858 16:30:25.704970 <6>[ 0.376582] CPU: All CPU(s) started at EL2
5859 16:30:25.711690 <6>[ 0.380920] alternatives: applying system-wide alternatives
5860 16:30:25.718034 <6>[ 0.389078] devtmpfs: initialized
5861 16:30:25.730631 <6>[ 0.398026] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5862 16:30:25.740515 <6>[ 0.407975] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5863 16:30:25.746634 <6>[ 0.415702] pinctrl core: initialized pinctrl subsystem
5864 16:30:25.750207 <6>[ 0.422819] DMI not present or invalid.
5865 16:30:25.756951 <6>[ 0.427187] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5866 16:30:25.766909 <6>[ 0.434085] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5867 16:30:25.773392 <6>[ 0.441614] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5868 16:30:25.782955 <6>[ 0.449864] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5869 16:30:25.786762 <6>[ 0.458040] audit: initializing netlink subsys (disabled)
5870 16:30:25.795996 <5>[ 0.463745] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5871 16:30:25.803179 <6>[ 0.464722] thermal_sys: Registered thermal governor 'step_wise'
5872 16:30:25.809745 <6>[ 0.471710] thermal_sys: Registered thermal governor 'power_allocator'
5873 16:30:25.813026 <6>[ 0.478007] cpuidle: using governor menu
5874 16:30:25.819247 <6>[ 0.488970] NET: Registered PF_QIPCRTR protocol family
5875 16:30:25.825927 <6>[ 0.494454] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5876 16:30:25.832135 <6>[ 0.501550] ASID allocator initialised with 32768 entries
5877 16:30:25.835531 <6>[ 0.508321] Serial: AMBA PL011 UART driver
5878 16:30:25.847878 <4>[ 0.518731] Trying to register duplicate clock ID: 113
5879 16:30:25.907630 <6>[ 0.575159] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5880 16:30:25.922405 <6>[ 0.589527] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5881 16:30:25.925137 <6>[ 0.599280] KASLR enabled
5882 16:30:25.939714 <6>[ 0.607256] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5883 16:30:25.946356 <6>[ 0.614257] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5884 16:30:25.952841 <6>[ 0.620734] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5885 16:30:25.959234 <6>[ 0.627724] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5886 16:30:25.966175 <6>[ 0.634197] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5887 16:30:25.972414 <6>[ 0.641187] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5888 16:30:25.978922 <6>[ 0.647661] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5889 16:30:25.985524 <6>[ 0.654650] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5890 16:30:25.989501 <6>[ 0.662190] ACPI: Interpreter disabled.
5891 16:30:25.999643 <6>[ 0.670226] iommu: Default domain type: Translated
5892 16:30:26.006044 <6>[ 0.675388] iommu: DMA domain TLB invalidation policy: strict mode
5893 16:30:26.009158 <5>[ 0.682014] SCSI subsystem initialized
5894 16:30:26.015718 <6>[ 0.686464] usbcore: registered new interface driver usbfs
5895 16:30:26.022424 <6>[ 0.692193] usbcore: registered new interface driver hub
5896 16:30:26.025891 <6>[ 0.697736] usbcore: registered new device driver usb
5897 16:30:26.033265 <6>[ 0.704060] pps_core: LinuxPPS API ver. 1 registered
5898 16:30:26.043276 <6>[ 0.709246] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5899 16:30:26.046650 <6>[ 0.718570] PTP clock support registered
5900 16:30:26.049408 <6>[ 0.722823] EDAC MC: Ver: 3.0.0
5901 16:30:26.058009 <6>[ 0.728482] FPGA manager framework
5902 16:30:26.064179 <6>[ 0.732161] Advanced Linux Sound Architecture Driver Initialized.
5903 16:30:26.068113 <6>[ 0.738900] vgaarb: loaded
5904 16:30:26.073751 <6>[ 0.742023] clocksource: Switched to clocksource arch_sys_counter
5905 16:30:26.077394 <5>[ 0.748455] VFS: Disk quotas dquot_6.6.0
5906 16:30:26.084032 <6>[ 0.752629] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5907 16:30:26.087484 <6>[ 0.759803] pnp: PnP ACPI: disabled
5908 16:30:26.096096 <6>[ 0.766672] NET: Registered PF_INET protocol family
5909 16:30:26.102735 <6>[ 0.771895] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5910 16:30:26.114074 <6>[ 0.781805] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5911 16:30:26.124413 <6>[ 0.790559] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5912 16:30:26.130830 <6>[ 0.798510] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5913 16:30:26.137350 <6>[ 0.806740] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5914 16:30:26.147188 <6>[ 0.814833] TCP: Hash tables configured (established 32768 bind 32768)
5915 16:30:26.153761 <6>[ 0.821660] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5916 16:30:26.160826 <6>[ 0.828631] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5917 16:30:26.167237 <6>[ 0.836110] NET: Registered PF_UNIX/PF_LOCAL protocol family
5918 16:30:26.173755 <6>[ 0.842223] RPC: Registered named UNIX socket transport module.
5919 16:30:26.176729 <6>[ 0.848368] RPC: Registered udp transport module.
5920 16:30:26.183159 <6>[ 0.853292] RPC: Registered tcp transport module.
5921 16:30:26.189748 <6>[ 0.858215] RPC: Registered tcp NFSv4.1 backchannel transport module.
5922 16:30:26.193391 <6>[ 0.864867] PCI: CLS 0 bytes, default 64
5923 16:30:26.196825 <6>[ 0.869120] Unpacking initramfs...
5924 16:30:26.206589 <6>[ 0.873139] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5925 16:30:26.213341 <6>[ 0.881842] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5926 16:30:26.219727 <6>[ 0.890740] kvm [1]: IPA Size Limit: 40 bits
5927 16:30:26.226318 <6>[ 0.897075] kvm [1]: vgic-v2@c420000
5928 16:30:26.230001 <6>[ 0.900897] kvm [1]: GIC system register CPU interface enabled
5929 16:30:26.236524 <6>[ 0.907077] kvm [1]: vgic interrupt IRQ18
5930 16:30:26.239548 <6>[ 0.911439] kvm [1]: Hyp mode initialized successfully
5931 16:30:26.246978 <5>[ 0.917737] Initialise system trusted keyrings
5932 16:30:26.253724 <6>[ 0.922502] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5933 16:30:26.261665 <6>[ 0.932450] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5934 16:30:26.268623 <5>[ 0.938844] NFS: Registering the id_resolver key type
5935 16:30:26.271380 <5>[ 0.944143] Key type id_resolver registered
5936 16:30:26.278302 <5>[ 0.948554] Key type id_legacy registered
5937 16:30:26.284864 <6>[ 0.952846] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5938 16:30:26.291203 <6>[ 0.959759] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5939 16:30:26.297533 <6>[ 0.967485] 9p: Installing v9fs 9p2000 file system support
5940 16:30:26.325401 <5>[ 0.996063] Key type asymmetric registered
5941 16:30:26.328900 <5>[ 1.000397] Asymmetric key parser 'x509' registered
5942 16:30:26.338240 <6>[ 1.005548] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5943 16:30:26.342024 <6>[ 1.013159] io scheduler mq-deadline registered
5944 16:30:26.345057 <6>[ 1.017913] io scheduler kyber registered
5945 16:30:26.368290 <6>[ 1.038669] EINJ: ACPI disabled.
5946 16:30:26.374215 <4>[ 1.042418] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5947 16:30:26.412248 <6>[ 1.083346] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5948 16:30:26.421049 <6>[ 1.091850] printk: console [ttyS0] disabled
5949 16:30:26.449396 <6>[ 1.116491] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5950 16:30:26.456098 <6>[ 1.125955] printk: console [ttyS0] enabled
5951 16:30:26.459045 <6>[ 1.125955] printk: console [ttyS0] enabled
5952 16:30:26.465808 <6>[ 1.134865] printk: bootconsole [mtk8250] disabled
5953 16:30:26.468844 <6>[ 1.134865] printk: bootconsole [mtk8250] disabled
5954 16:30:26.478746 <3>[ 1.145399] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5955 16:30:26.485147 <3>[ 1.153773] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5956 16:30:26.514518 <6>[ 1.182168] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5957 16:30:26.521545 <6>[ 1.191804] serial serial0: tty port ttyS1 registered
5958 16:30:26.527856 <6>[ 1.198395] SuperH (H)SCI(F) driver initialized
5959 16:30:26.531398 <6>[ 1.203900] msm_serial: driver initialized
5960 16:30:26.546739 <6>[ 1.214276] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5961 16:30:26.556914 <6>[ 1.222868] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5962 16:30:26.563607 <6>[ 1.231440] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5963 16:30:26.573337 <6>[ 1.240004] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5964 16:30:26.582863 <6>[ 1.248656] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5965 16:30:26.589283 <6>[ 1.257316] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5966 16:30:26.599697 <6>[ 1.266057] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5967 16:30:26.605744 <6>[ 1.274795] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5968 16:30:26.616016 <6>[ 1.283360] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5969 16:30:26.626005 <6>[ 1.292156] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5970 16:30:26.633702 <4>[ 1.304587] cacheinfo: Unable to detect cache hierarchy for CPU 0
5971 16:30:26.643025 <6>[ 1.313887] loop: module loaded
5972 16:30:26.654712 <6>[ 1.325844] vsim1: Bringing 1800000uV into 2700000-2700000uV
5973 16:30:26.672622 <6>[ 1.343797] megasas: 07.719.03.00-rc1
5974 16:30:26.681893 <6>[ 1.352633] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5975 16:30:26.694921 <6>[ 1.365402] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5976 16:30:26.711734 <6>[ 1.382200] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5977 16:30:26.768088 <6>[ 1.432189] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5978 16:30:26.906455 <6>[ 1.577108] Freeing initrd memory: 20868K
5979 16:30:26.925304 <4>[ 1.592936] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5980 16:30:26.931908 <4>[ 1.602166] CPU: 5 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
5981 16:30:26.938977 <4>[ 1.608864] Hardware name: Google juniper sku16 board (DT)
5982 16:30:26.941774 <4>[ 1.614604] Call trace:
5983 16:30:26.945567 <4>[ 1.617304] dump_backtrace.part.0+0xe0/0xf0
5984 16:30:26.949037 <4>[ 1.621841] show_stack+0x18/0x30
5985 16:30:26.955339 <4>[ 1.625413] dump_stack_lvl+0x68/0x84
5986 16:30:26.958826 <4>[ 1.629334] dump_stack+0x18/0x34
5987 16:30:26.961646 <4>[ 1.632904] sysfs_warn_dup+0x64/0x80
5988 16:30:26.965082 <4>[ 1.636826] sysfs_do_create_link_sd+0xf0/0x100
5989 16:30:26.971580 <4>[ 1.641614] sysfs_create_link+0x20/0x40
5990 16:30:26.975248 <4>[ 1.645793] bus_add_device+0x68/0x10c
5991 16:30:26.978157 <4>[ 1.649799] device_add+0x340/0x7ac
5992 16:30:26.981721 <4>[ 1.653542] of_device_add+0x44/0x60
5993 16:30:26.988156 <4>[ 1.657376] of_platform_device_create_pdata+0x90/0x120
5994 16:30:26.991471 <4>[ 1.662858] of_platform_bus_create+0x170/0x370
5995 16:30:26.995066 <4>[ 1.667644] of_platform_populate+0x50/0xfc
5996 16:30:27.001128 <4>[ 1.672084] parse_mtd_partitions+0x1dc/0x510
5997 16:30:27.004583 <4>[ 1.676697] mtd_device_parse_register+0xf8/0x2e0
5998 16:30:27.011320 <4>[ 1.681655] spi_nor_probe+0x21c/0x2f0
5999 16:30:27.014686 <4>[ 1.685662] spi_mem_probe+0x6c/0xb0
6000 16:30:27.018292 <4>[ 1.689494] spi_probe+0x84/0xe4
6001 16:30:27.021276 <4>[ 1.692976] really_probe+0xbc/0x2e0
6002 16:30:27.024942 <4>[ 1.696807] __driver_probe_device+0x78/0x11c
6003 16:30:27.031682 <4>[ 1.701419] driver_probe_device+0xd8/0x160
6004 16:30:27.034582 <4>[ 1.705857] __device_attach_driver+0xb8/0x134
6005 16:30:27.038182 <4>[ 1.710556] bus_for_each_drv+0x78/0xd0
6006 16:30:27.044821 <4>[ 1.714646] __device_attach+0xa8/0x1c0
6007 16:30:27.047815 <4>[ 1.718736] device_initial_probe+0x14/0x20
6008 16:30:27.051321 <4>[ 1.723174] bus_probe_device+0x9c/0xa4
6009 16:30:27.054284 <4>[ 1.727264] device_add+0x3ac/0x7ac
6010 16:30:27.061372 <4>[ 1.731007] __spi_add_device+0x78/0x120
6011 16:30:27.064369 <4>[ 1.735185] spi_add_device+0x40/0x7c
6012 16:30:27.068152 <4>[ 1.739103] spi_register_controller+0x610/0xad0
6013 16:30:27.074526 <4>[ 1.743976] devm_spi_register_controller+0x4c/0xa4
6014 16:30:27.077337 <4>[ 1.749109] mtk_spi_probe+0x3f8/0x650
6015 16:30:27.080774 <4>[ 1.753114] platform_probe+0x68/0xe0
6016 16:30:27.084303 <4>[ 1.757032] really_probe+0xbc/0x2e0
6017 16:30:27.091031 <4>[ 1.760862] __driver_probe_device+0x78/0x11c
6018 16:30:27.094035 <4>[ 1.765474] driver_probe_device+0xd8/0x160
6019 16:30:27.097637 <4>[ 1.769911] __driver_attach+0x94/0x19c
6020 16:30:27.101137 <4>[ 1.774002] bus_for_each_dev+0x70/0xd0
6021 16:30:27.107712 <4>[ 1.778092] driver_attach+0x24/0x30
6022 16:30:27.110536 <4>[ 1.781922] bus_add_driver+0x154/0x20c
6023 16:30:27.114118 <4>[ 1.786012] driver_register+0x78/0x130
6024 16:30:27.120422 <4>[ 1.790103] __platform_driver_register+0x28/0x34
6025 16:30:27.123848 <4>[ 1.795062] mtk_spi_driver_init+0x1c/0x28
6026 16:30:27.127359 <4>[ 1.799416] do_one_initcall+0x50/0x1d0
6027 16:30:27.133820 <4>[ 1.803506] kernel_init_freeable+0x21c/0x288
6028 16:30:27.137447 <4>[ 1.808119] kernel_init+0x24/0x12c
6029 16:30:27.140385 <4>[ 1.811864] ret_from_fork+0x10/0x20
6030 16:30:27.150500 <6>[ 1.820781] tun: Universal TUN/TAP device driver, 1.6
6031 16:30:27.153435 <6>[ 1.827075] thunder_xcv, ver 1.0
6032 16:30:27.160178 <6>[ 1.830592] thunder_bgx, ver 1.0
6033 16:30:27.160253 <6>[ 1.834098] nicpf, ver 1.0
6034 16:30:27.170997 <6>[ 1.838484] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6035 16:30:27.174280 <6>[ 1.845967] hns3: Copyright (c) 2017 Huawei Corporation.
6036 16:30:27.180932 <6>[ 1.851564] hclge is initializing
6037 16:30:27.183968 <6>[ 1.855154] e1000: Intel(R) PRO/1000 Network Driver
6038 16:30:27.190800 <6>[ 1.860289] e1000: Copyright (c) 1999-2006 Intel Corporation.
6039 16:30:27.194199 <6>[ 1.866311] e1000e: Intel(R) PRO/1000 Network Driver
6040 16:30:27.200668 <6>[ 1.871534] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6041 16:30:27.207353 <6>[ 1.877729] igb: Intel(R) Gigabit Ethernet Network Driver
6042 16:30:27.213732 <6>[ 1.883385] igb: Copyright (c) 2007-2014 Intel Corporation.
6043 16:30:27.220975 <6>[ 1.889229] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6044 16:30:27.227144 <6>[ 1.895778] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6045 16:30:27.230607 <6>[ 1.902353] sky2: driver version 1.30
6046 16:30:27.236974 <6>[ 1.907613] usbcore: registered new device driver r8152-cfgselector
6047 16:30:27.243701 <6>[ 1.914158] usbcore: registered new interface driver r8152
6048 16:30:27.250070 <6>[ 1.919996] VFIO - User Level meta-driver version: 0.3
6049 16:30:27.257319 <6>[ 1.927889] mtu3 11201000.usb: uwk - reg:0x420, version:101
6050 16:30:27.263852 <4>[ 1.933761] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6051 16:30:27.270677 <6>[ 1.941036] mtu3 11201000.usb: dr_mode: 1, drd: auto
6052 16:30:27.277028 <6>[ 1.946262] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6053 16:30:27.280598 <6>[ 1.952449] mtu3 11201000.usb: usb3-drd: 0
6054 16:30:27.290324 <6>[ 1.957988] mtu3 11201000.usb: xHCI platform device register success...
6055 16:30:27.297045 <4>[ 1.966667] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6056 16:30:27.303841 <6>[ 1.974627] xhci-mtk 11200000.usb: xHCI Host Controller
6057 16:30:27.310445 <6>[ 1.980136] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6058 16:30:27.316810 <6>[ 1.987856] xhci-mtk 11200000.usb: USB3 root hub has no ports
6059 16:30:27.326978 <6>[ 1.993864] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6060 16:30:27.333551 <6>[ 2.003290] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6061 16:30:27.340539 <6>[ 2.009361] xhci-mtk 11200000.usb: xHCI Host Controller
6062 16:30:27.346920 <6>[ 2.014851] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6063 16:30:27.353365 <6>[ 2.022512] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6064 16:30:27.356794 <6>[ 2.029328] hub 1-0:1.0: USB hub found
6065 16:30:27.363033 <6>[ 2.033356] hub 1-0:1.0: 1 port detected
6066 16:30:27.369681 <6>[ 2.038703] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6067 16:30:27.376389 <6>[ 2.047326] hub 2-0:1.0: USB hub found
6068 16:30:27.382976 <3>[ 2.051373] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6069 16:30:27.389514 <6>[ 2.059277] usbcore: registered new interface driver usb-storage
6070 16:30:27.396256 <6>[ 2.065862] usbcore: registered new device driver onboard-usb-hub
6071 16:30:27.406727 <4>[ 2.074121] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6072 16:30:27.416062 <6>[ 2.086411] mt6397-rtc mt6358-rtc: registered as rtc0
6073 16:30:27.425241 <6>[ 2.091889] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-17T16:30:27 UTC (1718641827)
6074 16:30:27.432343 <6>[ 2.101780] i2c_dev: i2c /dev entries driver
6075 16:30:27.442168 <6>[ 2.108219] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6076 16:30:27.448428 <6>[ 2.116537] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6077 16:30:27.455101 <6>[ 2.125440] i2c 4-0058: Fixed dependency cycle(s) with /panel
6078 16:30:27.461784 <6>[ 2.131476] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6079 16:30:27.471659 <3>[ 2.138940] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6080 16:30:27.488008 <6>[ 2.158834] cpu cpu0: EM: created perf domain
6081 16:30:27.501563 <6>[ 2.164309] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6082 16:30:27.504583 <6>[ 2.175585] cpu cpu4: EM: created perf domain
6083 16:30:27.511740 <6>[ 2.182308] sdhci: Secure Digital Host Controller Interface driver
6084 16:30:27.518175 <6>[ 2.188760] sdhci: Copyright(c) Pierre Ossman
6085 16:30:27.524844 <6>[ 2.194162] Synopsys Designware Multimedia Card Interface Driver
6086 16:30:27.531166 <6>[ 2.194672] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6087 16:30:27.534874 <6>[ 2.201318] sdhci-pltfm: SDHCI platform and OF driver helper
6088 16:30:27.543660 <6>[ 2.214447] ledtrig-cpu: registered to indicate activity on CPUs
6089 16:30:27.551740 <6>[ 2.222207] usbcore: registered new interface driver usbhid
6090 16:30:27.558305 <6>[ 2.228046] usbhid: USB HID core driver
6091 16:30:27.566022 <6>[ 2.232385] spi_master spi2: will run message pump with realtime priority
6092 16:30:27.573068 <4>[ 2.232498] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6093 16:30:27.579371 <4>[ 2.246736] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6094 16:30:27.592051 <6>[ 2.253323] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6095 16:30:27.609366 <6>[ 2.269830] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6096 16:30:27.616130 <4>[ 2.277109] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6097 16:30:27.622073 <6>[ 2.291014] cros-ec-spi spi2.0: Chrome EC device registered
6098 16:30:27.628974 <4>[ 2.297717] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6099 16:30:27.641323 <4>[ 2.308822] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6100 16:30:27.648382 <4>[ 2.317796] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6101 16:30:27.660459 <6>[ 2.327730] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6102 16:30:27.704996 <6>[ 2.375706] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6103 16:30:27.712646 <6>[ 2.383218] mmc0: new HS400 MMC card at address 0001
6104 16:30:27.722306 <6>[ 2.388981] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6105 16:30:27.725924 <6>[ 2.390105] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6106 16:30:27.739218 <6>[ 2.398063] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6107 16:30:27.748868 <6>[ 2.415280] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6108 16:30:27.755780 <6>[ 2.418306] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6109 16:30:27.765566 <6>[ 2.418380] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6110 16:30:27.772166 <6>[ 2.419726] NET: Registered PF_PACKET protocol family
6111 16:30:27.775730 <6>[ 2.419831] 9pnet: Installing 9P2000 support
6112 16:30:27.781798 <5>[ 2.419875] Key type dns_resolver registered
6113 16:30:27.785242 <6>[ 2.420524] registered taskstats version 1
6114 16:30:27.788257 <5>[ 2.420541] Loading compiled-in X.509 certificates
6115 16:30:27.798175 <6>[ 2.454041] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6116 16:30:27.801579 <6>[ 2.460040] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6117 16:30:27.809059 <6>[ 2.480019] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6118 16:30:27.816574 <6>[ 2.487159] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6119 16:30:27.835320 <3>[ 2.503126] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6120 16:30:27.867376 <6>[ 2.531520] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6121 16:30:27.878034 <6>[ 2.545135] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6122 16:30:27.887343 <6>[ 2.553720] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6123 16:30:27.894476 <6>[ 2.562246] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6124 16:30:27.904615 <6>[ 2.570768] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6125 16:30:27.910927 <6>[ 2.579288] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6126 16:30:27.920918 <6>[ 2.587829] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6127 16:30:27.930334 <6>[ 2.596364] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6128 16:30:27.937062 <6>[ 2.605598] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6129 16:30:27.944022 <6>[ 2.613136] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6130 16:30:27.950592 <6>[ 2.620430] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6131 16:30:27.960201 <6>[ 2.627731] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6132 16:30:27.966818 <6>[ 2.635198] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6133 16:30:27.969776 <6>[ 2.643112] hub 1-1:1.0: USB hub found
6134 16:30:27.976922 <6>[ 2.647525] hub 1-1:1.0: 3 ports detected
6135 16:30:27.983648 <6>[ 2.652250] panfrost 13040000.gpu: clock rate = 511999970
6136 16:30:27.993450 <6>[ 2.657930] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6137 16:30:27.999768 <6>[ 2.667986] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6138 16:30:28.010091 <6>[ 2.675996] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6139 16:30:28.019956 <6>[ 2.684437] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6140 16:30:28.025805 <6>[ 2.696516] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6141 16:30:28.039396 <6>[ 2.706732] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6142 16:30:28.049200 <6>[ 2.715630] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6143 16:30:28.059247 <6>[ 2.724780] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6144 16:30:28.068813 <6>[ 2.733908] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6145 16:30:28.075484 <6>[ 2.743037] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6146 16:30:28.085583 <6>[ 2.752340] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6147 16:30:28.094835 <6>[ 2.761641] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6148 16:30:28.104876 <6>[ 2.771114] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6149 16:30:28.114973 <6>[ 2.780590] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6150 16:30:28.124984 <6>[ 2.789717] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6151 16:30:28.194261 <6>[ 2.861552] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6152 16:30:28.204083 <6>[ 2.870432] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6153 16:30:28.214815 <6>[ 2.882352] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6154 16:30:28.290813 <6>[ 2.958057] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6155 16:30:28.913397 <6>[ 3.142367] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6156 16:30:28.923069 <4>[ 3.245703] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6157 16:30:28.929833 <4>[ 3.245723] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6158 16:30:28.936246 <6>[ 3.283007] r8152 1-1.2:1.0 eth0: v1.12.13
6159 16:30:28.943031 <6>[ 3.362053] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6160 16:30:28.949933 <6>[ 3.564117] Console: switching to colour frame buffer device 170x48
6161 16:30:28.956429 <6>[ 3.624891] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6162 16:30:28.976876 <6>[ 3.641234] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6163 16:30:28.994472 <6>[ 3.658480] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6164 16:30:29.004384 <6>[ 3.671031] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6165 16:30:29.011025 <6>[ 3.679336] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6166 16:30:29.020911 <6>[ 3.686359] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6167 16:30:29.041003 <6>[ 3.705106] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6168 16:30:30.211857 <6>[ 4.882514] r8152 1-1.2:1.0 eth0: carrier on
6169 16:30:33.168114 <5>[ 4.910058] Sending DHCP requests .., OK
6170 16:30:33.174056 <6>[ 7.842538] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.20
6171 16:30:33.177797 <6>[ 7.850971] IP-Config: Complete:
6172 16:30:33.190695 <6>[ 7.854542] device=eth0, hwaddr=00:e0:4c:72:3d:a6, ipaddr=192.168.201.20, mask=255.255.255.0, gw=192.168.201.1
6173 16:30:33.200469 <6>[ 7.865442] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4, domain=lava-rack, nis-domain=(none)
6174 16:30:33.212369 <6>[ 7.879721] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6175 16:30:33.220431 <6>[ 7.879732] nameserver0=192.168.201.1
6176 16:30:33.228636 <6>[ 7.899508] clk: Disabling unused clocks
6177 16:30:33.233755 <6>[ 7.907445] ALSA device list:
6178 16:30:33.243024 <6>[ 7.913481] No soundcards found.
6179 16:30:33.252253 <6>[ 7.922673] Freeing unused kernel memory: 8512K
6180 16:30:33.259581 <6>[ 7.929835] Run /init as init process
6181 16:30:33.298723 Starting syslogd: OK
6182 16:30:33.302463 Starting klogd: OK
6183 16:30:33.311068 Running sysctl: OK
6184 16:30:33.321263 Populating /dev using udev: <30>[ 7.991096] udevd[206]: starting version 3.2.9
6185 16:30:33.329216 <27>[ 7.999952] udevd[206]: specified user 'tss' unknown
6186 16:30:33.336198 <27>[ 8.006642] udevd[206]: specified group 'tss' unknown
6187 16:30:33.343334 <30>[ 8.014108] udevd[207]: starting eudev-3.2.9
6188 16:30:33.368981 <27>[ 8.039198] udevd[207]: specified user 'tss' unknown
6189 16:30:33.374759 <27>[ 8.045351] udevd[207]: specified group 'tss' unknown
6190 16:30:33.481463 <3>[ 8.151902] mtk-scp 10500000.scp: invalid resource
6191 16:30:33.488102 <3>[ 8.154761] thermal_sys: Failed to find 'trips' node
6192 16:30:33.494955 <6>[ 8.157088] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6193 16:30:33.500733 <3>[ 8.162217] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6194 16:30:33.510983 <6>[ 8.170775] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6195 16:30:33.513910 <6>[ 8.170946] remoteproc remoteproc0: scp is available
6196 16:30:33.524617 <4>[ 8.171563] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6197 16:30:33.531901 <6>[ 8.171572] remoteproc remoteproc0: powering up scp
6198 16:30:33.541369 <4>[ 8.171586] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6199 16:30:33.548768 <3>[ 8.171590] remoteproc remoteproc0: request_firmware failed: -2
6200 16:30:33.558363 <3>[ 8.178974] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6201 16:30:33.565374 <4>[ 8.219778] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6202 16:30:33.571960 <4>[ 8.225413] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6203 16:30:33.581756 <3>[ 8.227472] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6204 16:30:33.592067 <3>[ 8.227477] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6205 16:30:33.602113 <3>[ 8.227481] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6206 16:30:33.608541 <3>[ 8.227484] elan_i2c 2-0015: Error applying setting, reverse things back
6207 16:30:33.618742 <4>[ 8.233970] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6208 16:30:33.621595 <3>[ 8.242654] thermal_sys: Failed to find 'trips' node
6209 16:30:33.631901 <3>[ 8.278874] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6210 16:30:33.638622 <5>[ 8.279617] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6211 16:30:33.645186 <6>[ 8.284810] mc: Linux media interface: v0.10
6212 16:30:33.651747 <3>[ 8.285389] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6213 16:30:33.657669 <3>[ 8.285400] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6214 16:30:33.667737 <4>[ 8.285404] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6215 16:30:33.678047 <4>[ 8.287583] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6216 16:30:33.688408 <3>[ 8.292852] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6217 16:30:33.698126 <6>[ 8.298547] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6218 16:30:33.704417 <5>[ 8.306189] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6219 16:30:33.714734 <5>[ 8.306679] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6220 16:30:33.720835 <3>[ 8.306782] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6221 16:30:33.732165 <3>[ 8.306915] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6222 16:30:33.742321 <3>[ 8.306925] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6223 16:30:33.751905 <3>[ 8.306934] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6224 16:30:33.762081 <3>[ 8.306945] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6225 16:30:33.772543 <3>[ 8.306953] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6226 16:30:33.782350 <3>[ 8.306995] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6227 16:30:33.796020 <6>[ 8.316288] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6228 16:30:33.806288 <6>[ 8.318538] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6229 16:30:33.815684 <4>[ 8.319173] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6230 16:30:33.828873 <3>[ 8.326927] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6231 16:30:33.835655 <6>[ 8.335400] cfg80211: failed to load regulatory.db
6232 16:30:33.845835 <6>[ 8.352984] cs_system_cfg: CoreSight Configuration manager initialised
6233 16:30:33.852249 <6>[ 8.363801] videodev: Linux video capture interface: v2.00
6234 16:30:33.862331 <6>[ 8.383160] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6235 16:30:33.908851 <6>[ 8.575874] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6236 16:30:33.919917 <6>[ 8.587226] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6237 16:30:33.922878 <6>[ 8.589314] Bluetooth: Core ver 2.22
6238 16:30:33.930164 <6>[ 8.595675] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6239 16:30:33.936741 <6>[ 8.599059] NET: Registered PF_BLUETOOTH protocol family
6240 16:30:33.949494 <3>[ 8.599588] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6241 16:30:33.956233 <3>[ 8.600304] debugfs: File 'Playback' in directory 'dapm' already present!
6242 16:30:33.962802 <3>[ 8.600313] debugfs: File 'Capture' in directory 'dapm' already present!
6243 16:30:33.968973 <6>[ 8.601244] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6244 16:30:33.982841 <6>[ 8.602005] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6245 16:30:33.989561 <6>[ 8.607301] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6246 16:30:33.996797 <6>[ 8.608919] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6247 16:30:34.002747 <6>[ 8.611168] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6248 16:30:34.010744 <6>[ 8.612527] Bluetooth: HCI device and connection manager initialized
6249 16:30:34.017519 <6>[ 8.612544] Bluetooth: HCI socket layer initialized
6250 16:30:34.020526 <6>[ 8.612549] Bluetooth: L2CAP socket layer initialized
6251 16:30:34.027119 <6>[ 8.612562] Bluetooth: SCO socket layer initialized
6252 16:30:34.033608 <6>[ 8.613204] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6253 16:30:34.043870 <6>[ 8.620255] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6254 16:30:34.051237 <6>[ 8.620682] usbcore: registered new interface driver uvcvideo
6255 16:30:34.058109 <6>[ 8.647463] Bluetooth: HCI UART driver ver 2.3
6256 16:30:34.067692 <6>[ 8.658062] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6257 16:30:34.074530 <6>[ 8.658490] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video3 (81,3)
6258 16:30:34.081514 <6>[ 8.665723] Bluetooth: HCI UART protocol H4 registered
6259 16:30:34.091041 <6>[ 8.680069] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6260 16:30:34.097591 <6>[ 8.680809] Bluetooth: HCI UART protocol LL registered
6261 16:30:34.103882 <6>[ 8.687466] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6262 16:30:34.114168 <6>[ 8.691969] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6263 16:30:34.124457 <6>[ 8.691983] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6264 16:30:34.134798 <6>[ 8.692330] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6265 16:30:34.141784 <6>[ 8.692529] Bluetooth: HCI UART protocol Three-wire (H5) registered
6266 16:30:34.151690 <6>[ 8.698024] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6267 16:30:34.155261 <6>[ 8.703266] Bluetooth: HCI UART protocol Broadcom registered
6268 16:30:34.165732 <4>[ 8.800052] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6269 16:30:34.169555 <4>[ 8.800052] Fallback method does not support PEC.
6270 16:30:34.175853 <6>[ 8.800171] Bluetooth: HCI UART protocol QCA registered
6271 16:30:34.182301 <6>[ 8.801341] Bluetooth: hci0: setting up ROME/QCA6390
6272 16:30:34.191812 <3>[ 8.813838] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6273 16:30:34.198349 <6>[ 8.817968] Bluetooth: HCI UART protocol Marvell registered
6274 16:30:34.208515 <3>[ 8.831845] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6275 16:30:34.215834 <6>[ 8.840102] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6276 16:30:34.250996 done
6277 16:30:34.259849 Saving random seed: OK
6278 16:30:34.273224 Starting network: ip: RTNETLINK answers: File exists
6279 16:30:34.276907 FAIL
6280 16:30:34.320919 Starting dropbear sshd: <6>[ 8.991208] NET: Registered PF_INET6 protocol family
6281 16:30:34.329202 <6>[ 8.999394] Segment Routing with IPv6
6282 16:30:34.335348 <6>[ 9.005384] In-situ OAM (IOAM) with IPv6
6283 16:30:34.342288 <3>[ 9.012816] Bluetooth: hci0: Frame reassembly failed (-84)
6284 16:30:34.342405 OK
6285 16:30:34.354675 /bin/sh: can't access tty; job control turned off
6286 16:30:34.355272 Matched prompt #10: / #
6288 16:30:34.355540 Setting prompt string to ['/ #']
6289 16:30:34.355670 end: 2.2.5.1 login-action (duration 00:00:10) [common]
6291 16:30:34.355995 end: 2.2.5 auto-login-action (duration 00:00:10) [common]
6292 16:30:34.356122 start: 2.2.6 expect-shell-connection (timeout 00:04:02) [common]
6293 16:30:34.356224 Setting prompt string to ['/ #']
6294 16:30:34.356312 Forcing a shell prompt, looking for ['/ #']
6296 16:30:34.406563 / #
6297 16:30:34.406785 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6298 16:30:34.406904 Waiting using forced prompt support (timeout 00:02:30)
6299 16:30:34.411917
6300 16:30:34.412215 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6301 16:30:34.412338 start: 2.2.7 export-device-env (timeout 00:04:01) [common]
6302 16:30:34.412464 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6303 16:30:34.412589 end: 2.2 depthcharge-retry (duration 00:00:59) [common]
6304 16:30:34.412701 end: 2 depthcharge-action (duration 00:00:59) [common]
6305 16:30:34.412810 start: 3 lava-test-retry (timeout 00:01:00) [common]
6306 16:30:34.412927 start: 3.1 lava-test-shell (timeout 00:01:00) [common]
6307 16:30:34.413025 Using namespace: common
6309 16:30:34.513378 / # #
6310 16:30:34.513568 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:01:00)
6311 16:30:34.518595 #
6312 16:30:34.518884 Using /lava-14396126
6314 16:30:34.619216 / # export SHELL=/bin/sh
6315 16:30:34.619429 export SHELL=/bin/sh<6>[ 9.262225] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6316 16:30:34.619518 <6>[ 9.287910] Bluetooth: hci0: QCA Product ID :0x00000008
6317 16:30:34.665624 <6>[ 9.295722] Bluetooth: hci0: QCA SOC Version :0x00000044
6318 16:30:34.665760 <6>[ 9.304152] Bluetooth: hci0: QCA ROM Version :0x00000302
6319 16:30:34.666035 <6>[ 9.313028] Bluetooth: hci0: QCA Patch Version:0x00000111
6320 16:30:34.666133
6321 16:30:34.666221 / # <6>[ 9.321542] Bluetooth: hci0: QCA controller version 0x00440302
6322 16:30:34.666307 <6>[ 9.330317] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6324 16:30:34.766853 <4>[ 9.339414] bluetooth hci0: Direct firmwa. /lava-14396126/environment
6325 16:30:34.767078 re load for qca/rampatch_00440302.bin failed with error -2
6326 16:30:34.767191 <3>[ 9.350716] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6327 16:30:34.767292 <3>[ 9.360737] Bluetooth: hci0: QCA Failed to download patch (-2)
6328 16:30:34.767388 . /lava-14396126/environment<4>[ 9.421226] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6329 16:30:34.809620 <4>[ 9.438609] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6330 16:30:34.809759
6331 16:30:34.809851 / # <4>[ 9.454437] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6333 16:30:34.910361 /lava-14396126/bin/lava-test-runner /lava-14396126/0
6334 16:30:34.910561 Test shell timeout: 10s (minimum of the action and connection timeout)
6335 16:30:34.910864 <4>[ 9.467530] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6336 16:30:34.915147 /lava-14396126/bin/lava-test-runner /lava-14396126/0
6337 16:30:34.936430 + export 'TESTRUN_ID=0_dmesg'
6338 16:30:34.946552 + cd /lava-143961<8>[ 9.612979] <LAVA_SIGNAL_STARTRUN 0_dmesg 14396126_1.5.2.3.1>
6339 16:30:34.946672 26/0/tests/0_dmesg
6340 16:30:34.946771 + cat uuid
6341 16:30:34.947039 Received signal: <STARTRUN> 0_dmesg 14396126_1.5.2.3.1
6342 16:30:34.947133 Starting test lava.0_dmesg (14396126_1.5.2.3.1)
6343 16:30:34.947248 Skipping test definition patterns.
6344 16:30:34.949593 + UUID=14396126_1.5.2.3.1
6345 16:30:34.949674 + set +x
6346 16:30:34.956230 + KERNELCI_LAVA=y /bin/sh /opt/kernelci/dmesg.sh
6347 16:30:34.970298 <8>[ 9.637262] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0>
6348 16:30:34.970558 Received signal: <TESTCASE> TEST_CASE_ID=crit RESULT=pass UNITS=lines MEASUREMENT=0
6350 16:30:34.998409 <8>[ 9.665457] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0>
6351 16:30:34.998727 Received signal: <TESTCASE> TEST_CASE_ID=alert RESULT=pass UNITS=lines MEASUREMENT=0
6353 16:30:35.025337 <8>[ 9.692395] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0>
6354 16:30:35.025644 Received signal: <TESTCASE> TEST_CASE_ID=emerg RESULT=pass UNITS=lines MEASUREMENT=0
6356 16:30:35.032824 <8>[ 9.703615] <LAVA_SIGNAL_ENDRUN 0_dmesg 14396126_1.5.2.3.1>
6357 16:30:35.033082 Received signal: <ENDRUN> 0_dmesg 14396126_1.5.2.3.1
6358 16:30:35.033165 Ending use of test pattern.
6359 16:30:35.033257 Ending test lava.0_dmesg (14396126_1.5.2.3.1), duration 0.09
6361 16:30:35.036405 + set +x
6362 16:30:35.039368 <LAVA_TEST_RUNNER EXIT>
6363 16:30:35.039631 ok: lava_test_shell seems to have completed
6364 16:30:35.039784 alert: pass
crit: pass
emerg: pass
6365 16:30:35.039904 end: 3.1 lava-test-shell (duration 00:00:01) [common]
6366 16:30:35.040018 end: 3 lava-test-retry (duration 00:00:01) [common]
6367 16:30:35.040137 start: 4 finalize (timeout 00:08:40) [common]
6368 16:30:35.040248 start: 4.1 power-off (timeout 00:00:30) [common]
6369 16:30:35.040514 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-4', '--port=1', '--command=off']
6370 16:30:37.118319 >> Command sent successfully.
6371 16:30:37.122413 Returned 0 in 2 seconds
6372 16:30:37.222756 end: 4.1 power-off (duration 00:00:02) [common]
6374 16:30:37.223045 start: 4.2 read-feedback (timeout 00:08:38) [common]
6375 16:30:37.223294 Listened to connection for namespace 'common' for up to 1s
6376 16:30:38.224222 Finalising connection for namespace 'common'
6377 16:30:38.224371 Disconnecting from shell: Finalise
6378 16:30:38.224448 / #
6379 16:30:38.324682 end: 4.2 read-feedback (duration 00:00:01) [common]
6380 16:30:38.324840 end: 4 finalize (duration 00:00:03) [common]
6381 16:30:38.324960 Cleaning after the job
6382 16:30:38.325056 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396126/tftp-deploy-j1tboocy/ramdisk
6383 16:30:38.327651 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396126/tftp-deploy-j1tboocy/kernel
6384 16:30:38.335571 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396126/tftp-deploy-j1tboocy/dtb
6385 16:30:38.335806 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396126/tftp-deploy-j1tboocy/modules
6386 16:30:38.341847 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14396126
6387 16:30:38.383598 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14396126
6388 16:30:38.383760 Job finished correctly