Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 51
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 90
1 16:29:52.431519 lava-dispatcher, installed at version: 2024.03
2 16:29:52.431748 start: 0 validate
3 16:29:52.431895 Start time: 2024-06-17 16:29:52.431886+00:00 (UTC)
4 16:29:52.432032 Using caching service: 'http://localhost/cache/?uri=%s'
5 16:29:52.432177 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 16:29:52.697957 Using caching service: 'http://localhost/cache/?uri=%s'
7 16:29:52.698155 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-32-g0d904242fc145%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 16:30:07.959356 Using caching service: 'http://localhost/cache/?uri=%s'
9 16:30:07.959564 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-32-g0d904242fc145%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 16:30:08.218645 Using caching service: 'http://localhost/cache/?uri=%s'
11 16:30:08.218869 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 16:30:08.739176 Using caching service: 'http://localhost/cache/?uri=%s'
13 16:30:08.739427 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-32-g0d904242fc145%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 16:30:11.248863 validate duration: 18.82
16 16:30:11.249268 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 16:30:11.249420 start: 1.1 download-retry (timeout 00:10:00) [common]
18 16:30:11.249560 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 16:30:11.249745 Not decompressing ramdisk as can be used compressed.
20 16:30:11.249879 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 16:30:11.249987 saving as /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/ramdisk/initrd.cpio.gz
22 16:30:11.250093 total size: 5628169 (5 MB)
23 16:30:11.516525 progress 0 % (0 MB)
24 16:30:11.519164 progress 5 % (0 MB)
25 16:30:11.520973 progress 10 % (0 MB)
26 16:30:11.522518 progress 15 % (0 MB)
27 16:30:11.524315 progress 20 % (1 MB)
28 16:30:11.525986 progress 25 % (1 MB)
29 16:30:11.527837 progress 30 % (1 MB)
30 16:30:11.529662 progress 35 % (1 MB)
31 16:30:11.531359 progress 40 % (2 MB)
32 16:30:11.533211 progress 45 % (2 MB)
33 16:30:11.534852 progress 50 % (2 MB)
34 16:30:11.536669 progress 55 % (2 MB)
35 16:30:11.538463 progress 60 % (3 MB)
36 16:30:11.540091 progress 65 % (3 MB)
37 16:30:11.541941 progress 70 % (3 MB)
38 16:30:11.543597 progress 75 % (4 MB)
39 16:30:11.545470 progress 80 % (4 MB)
40 16:30:11.547141 progress 85 % (4 MB)
41 16:30:11.549039 progress 90 % (4 MB)
42 16:30:11.550861 progress 95 % (5 MB)
43 16:30:11.552562 progress 100 % (5 MB)
44 16:30:11.552831 5 MB downloaded in 0.30 s (17.73 MB/s)
45 16:30:11.553066 end: 1.1.1 http-download (duration 00:00:00) [common]
47 16:30:11.553492 end: 1.1 download-retry (duration 00:00:00) [common]
48 16:30:11.553637 start: 1.2 download-retry (timeout 00:10:00) [common]
49 16:30:11.553766 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 16:30:11.553961 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 16:30:11.554084 saving as /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/kernel/Image
52 16:30:11.554188 total size: 54813184 (52 MB)
53 16:30:11.554291 No compression specified
54 16:30:11.555678 progress 0 % (0 MB)
55 16:30:11.572370 progress 5 % (2 MB)
56 16:30:11.589463 progress 10 % (5 MB)
57 16:30:11.605724 progress 15 % (7 MB)
58 16:30:11.622508 progress 20 % (10 MB)
59 16:30:11.638807 progress 25 % (13 MB)
60 16:30:11.655000 progress 30 % (15 MB)
61 16:30:11.671792 progress 35 % (18 MB)
62 16:30:11.687829 progress 40 % (20 MB)
63 16:30:11.703633 progress 45 % (23 MB)
64 16:30:11.719748 progress 50 % (26 MB)
65 16:30:11.736783 progress 55 % (28 MB)
66 16:30:11.754548 progress 60 % (31 MB)
67 16:30:11.771933 progress 65 % (34 MB)
68 16:30:11.788776 progress 70 % (36 MB)
69 16:30:11.805533 progress 75 % (39 MB)
70 16:30:11.823231 progress 80 % (41 MB)
71 16:30:11.839727 progress 85 % (44 MB)
72 16:30:11.856052 progress 90 % (47 MB)
73 16:30:11.874473 progress 95 % (49 MB)
74 16:30:11.890939 progress 100 % (52 MB)
75 16:30:11.891255 52 MB downloaded in 0.34 s (155.09 MB/s)
76 16:30:11.891436 end: 1.2.1 http-download (duration 00:00:00) [common]
78 16:30:11.891727 end: 1.2 download-retry (duration 00:00:00) [common]
79 16:30:11.891828 start: 1.3 download-retry (timeout 00:09:59) [common]
80 16:30:11.891924 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 16:30:11.892077 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 16:30:11.892163 saving as /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 16:30:11.892256 total size: 57695 (0 MB)
84 16:30:11.892327 No compression specified
85 16:30:11.893610 progress 56 % (0 MB)
86 16:30:11.893934 progress 100 % (0 MB)
87 16:30:11.894161 0 MB downloaded in 0.00 s (28.92 MB/s)
88 16:30:11.894324 end: 1.3.1 http-download (duration 00:00:00) [common]
90 16:30:11.894583 end: 1.3 download-retry (duration 00:00:00) [common]
91 16:30:11.894679 start: 1.4 download-retry (timeout 00:09:59) [common]
92 16:30:11.894801 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 16:30:11.894959 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 16:30:11.895077 saving as /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/nfsrootfs/full.rootfs.tar
95 16:30:11.895181 total size: 120894716 (115 MB)
96 16:30:11.895299 Using unxz to decompress xz
97 16:30:11.901661 progress 0 % (0 MB)
98 16:30:12.284098 progress 5 % (5 MB)
99 16:30:12.679477 progress 10 % (11 MB)
100 16:30:13.068733 progress 15 % (17 MB)
101 16:30:13.431935 progress 20 % (23 MB)
102 16:30:13.758425 progress 25 % (28 MB)
103 16:30:14.166345 progress 30 % (34 MB)
104 16:30:14.544560 progress 35 % (40 MB)
105 16:30:14.734703 progress 40 % (46 MB)
106 16:30:14.936424 progress 45 % (51 MB)
107 16:30:15.287002 progress 50 % (57 MB)
108 16:30:15.713041 progress 55 % (63 MB)
109 16:30:16.101481 progress 60 % (69 MB)
110 16:30:16.479928 progress 65 % (74 MB)
111 16:30:16.871326 progress 70 % (80 MB)
112 16:30:17.284018 progress 75 % (86 MB)
113 16:30:17.676833 progress 80 % (92 MB)
114 16:30:18.070750 progress 85 % (98 MB)
115 16:30:18.471653 progress 90 % (103 MB)
116 16:30:18.840952 progress 95 % (109 MB)
117 16:30:19.244790 progress 100 % (115 MB)
118 16:30:19.250895 115 MB downloaded in 7.36 s (15.67 MB/s)
119 16:30:19.251244 end: 1.4.1 http-download (duration 00:00:07) [common]
121 16:30:19.251626 end: 1.4 download-retry (duration 00:00:07) [common]
122 16:30:19.251730 start: 1.5 download-retry (timeout 00:09:52) [common]
123 16:30:19.251829 start: 1.5.1 http-download (timeout 00:09:52) [common]
124 16:30:19.252008 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 16:30:19.252090 saving as /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/modules/modules.tar
126 16:30:19.252166 total size: 8628772 (8 MB)
127 16:30:19.252241 Using unxz to decompress xz
128 16:30:19.518277 progress 0 % (0 MB)
129 16:30:19.541863 progress 5 % (0 MB)
130 16:30:19.568880 progress 10 % (0 MB)
131 16:30:19.595791 progress 15 % (1 MB)
132 16:30:19.623881 progress 20 % (1 MB)
133 16:30:19.652416 progress 25 % (2 MB)
134 16:30:19.679076 progress 30 % (2 MB)
135 16:30:19.708834 progress 35 % (2 MB)
136 16:30:19.736822 progress 40 % (3 MB)
137 16:30:19.764784 progress 45 % (3 MB)
138 16:30:19.793573 progress 50 % (4 MB)
139 16:30:19.820988 progress 55 % (4 MB)
140 16:30:19.848715 progress 60 % (4 MB)
141 16:30:19.879906 progress 65 % (5 MB)
142 16:30:19.908574 progress 70 % (5 MB)
143 16:30:19.936287 progress 75 % (6 MB)
144 16:30:19.963193 progress 80 % (6 MB)
145 16:30:19.994198 progress 85 % (7 MB)
146 16:30:20.025911 progress 90 % (7 MB)
147 16:30:20.055451 progress 95 % (7 MB)
148 16:30:20.083759 progress 100 % (8 MB)
149 16:30:20.089652 8 MB downloaded in 0.84 s (9.83 MB/s)
150 16:30:20.090020 end: 1.5.1 http-download (duration 00:00:01) [common]
152 16:30:20.090502 end: 1.5 download-retry (duration 00:00:01) [common]
153 16:30:20.090621 start: 1.6 prepare-tftp-overlay (timeout 00:09:51) [common]
154 16:30:20.090733 start: 1.6.1 extract-nfsrootfs (timeout 00:09:51) [common]
155 16:30:24.502176 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14396111/extract-nfsrootfs-gi_tnf6b
156 16:30:24.502380 end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
157 16:30:24.502498 start: 1.6.2 lava-overlay (timeout 00:09:47) [common]
158 16:30:24.502690 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7
159 16:30:24.502839 makedir: /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin
160 16:30:24.502956 makedir: /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/tests
161 16:30:24.503069 makedir: /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/results
162 16:30:24.503183 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-add-keys
163 16:30:24.503345 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-add-sources
164 16:30:24.503501 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-background-process-start
165 16:30:24.503646 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-background-process-stop
166 16:30:24.503787 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-common-functions
167 16:30:24.503930 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-echo-ipv4
168 16:30:24.504071 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-install-packages
169 16:30:24.504211 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-installed-packages
170 16:30:24.504350 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-os-build
171 16:30:24.504491 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-probe-channel
172 16:30:24.504633 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-probe-ip
173 16:30:24.504772 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-target-ip
174 16:30:24.504910 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-target-mac
175 16:30:24.505048 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-target-storage
176 16:30:24.505187 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-test-case
177 16:30:24.505325 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-test-event
178 16:30:24.505467 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-test-feedback
179 16:30:24.505605 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-test-raise
180 16:30:24.505743 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-test-reference
181 16:30:24.505881 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-test-runner
182 16:30:24.506017 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-test-set
183 16:30:24.506161 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-test-shell
184 16:30:24.506308 Updating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-add-keys (debian)
185 16:30:24.507512 Updating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-add-sources (debian)
186 16:30:24.507995 Updating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-install-packages (debian)
187 16:30:24.508351 Updating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-installed-packages (debian)
188 16:30:24.508723 Updating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/bin/lava-os-build (debian)
189 16:30:24.509034 Creating /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/environment
190 16:30:24.509157 LAVA metadata
191 16:30:24.509234 - LAVA_JOB_ID=14396111
192 16:30:24.509304 - LAVA_DISPATCHER_IP=192.168.201.1
193 16:30:24.509433 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:47) [common]
194 16:30:24.509512 skipped lava-vland-overlay
195 16:30:24.509596 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 16:30:24.509684 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:47) [common]
197 16:30:24.509751 skipped lava-multinode-overlay
198 16:30:24.509832 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 16:30:24.509919 start: 1.6.2.3 test-definition (timeout 00:09:47) [common]
200 16:30:24.510011 Loading test definitions
201 16:30:24.510127 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:47) [common]
202 16:30:24.510207 Using /lava-14396111 at stage 0
203 16:30:24.510528 uuid=14396111_1.6.2.3.1 testdef=None
204 16:30:24.510644 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 16:30:24.510741 start: 1.6.2.3.2 test-overlay (timeout 00:09:47) [common]
206 16:30:24.511255 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 16:30:24.511557 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:47) [common]
209 16:30:24.512194 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 16:30:24.512502 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
212 16:30:24.513129 runner path: /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/0/tests/0_timesync-off test_uuid 14396111_1.6.2.3.1
213 16:30:24.513304 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 16:30:24.513573 start: 1.6.2.3.5 git-repo-action (timeout 00:09:47) [common]
216 16:30:24.513655 Using /lava-14396111 at stage 0
217 16:30:24.513763 Fetching tests from https://github.com/kernelci/test-definitions.git
218 16:30:24.513858 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/0/tests/1_kselftest-arm64'
219 16:30:27.061629 Running '/usr/bin/git checkout kernelci.org
220 16:30:27.136447 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/0/tests/1_kselftest-arm64/automated/linux/kselftest/kselftest.yaml
221 16:30:27.137312 uuid=14396111_1.6.2.3.5 testdef=None
222 16:30:27.137500 end: 1.6.2.3.5 git-repo-action (duration 00:00:03) [common]
224 16:30:27.137858 start: 1.6.2.3.6 test-overlay (timeout 00:09:44) [common]
225 16:30:27.138819 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 16:30:27.139082 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:44) [common]
228 16:30:27.140192 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 16:30:27.140465 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:44) [common]
231 16:30:27.141529 runner path: /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/0/tests/1_kselftest-arm64 test_uuid 14396111_1.6.2.3.5
232 16:30:27.141641 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 16:30:27.141737 BRANCH='cip-gitlab'
234 16:30:27.141837 SKIPFILE='/dev/null'
235 16:30:27.141936 SKIP_INSTALL='True'
236 16:30:27.142031 TESTPROG_URL='http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz'
237 16:30:27.142128 TST_CASENAME=''
238 16:30:27.142229 TST_CMDFILES='arm64'
239 16:30:27.142447 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 16:30:27.142845 Creating lava-test-runner.conf files
242 16:30:27.142953 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14396111/lava-overlay-tkv3trz7/lava-14396111/0 for stage 0
243 16:30:27.143093 - 0_timesync-off
244 16:30:27.143202 - 1_kselftest-arm64
245 16:30:27.143346 end: 1.6.2.3 test-definition (duration 00:00:03) [common]
246 16:30:27.143479 start: 1.6.2.4 compress-overlay (timeout 00:09:44) [common]
247 16:30:35.670704 end: 1.6.2.4 compress-overlay (duration 00:00:09) [common]
248 16:30:35.670891 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
249 16:30:35.671014 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 16:30:35.671146 end: 1.6.2 lava-overlay (duration 00:00:11) [common]
251 16:30:35.671264 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
252 16:30:35.859981 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 16:30:35.860427 start: 1.6.4 extract-modules (timeout 00:09:35) [common]
254 16:30:35.860569 extracting modules file /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14396111/extract-nfsrootfs-gi_tnf6b
255 16:30:36.102144 extracting modules file /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14396111/extract-overlay-ramdisk-c0u1w_kp/ramdisk
256 16:30:36.342402 end: 1.6.4 extract-modules (duration 00:00:00) [common]
257 16:30:36.342592 start: 1.6.5 apply-overlay-tftp (timeout 00:09:35) [common]
258 16:30:36.342704 [common] Applying overlay to NFS
259 16:30:36.342782 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14396111/compress-overlay-annipack/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14396111/extract-nfsrootfs-gi_tnf6b
260 16:30:37.369386 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 16:30:37.369564 start: 1.6.6 configure-preseed-file (timeout 00:09:34) [common]
262 16:30:37.369675 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 16:30:37.369772 start: 1.6.7 compress-ramdisk (timeout 00:09:34) [common]
264 16:30:37.369863 Building ramdisk /var/lib/lava/dispatcher/tmp/14396111/extract-overlay-ramdisk-c0u1w_kp/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14396111/extract-overlay-ramdisk-c0u1w_kp/ramdisk
265 16:30:37.718696 >> 130466 blocks
266 16:30:39.999538 rename /var/lib/lava/dispatcher/tmp/14396111/extract-overlay-ramdisk-c0u1w_kp/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/ramdisk/ramdisk.cpio.gz
267 16:30:40.000124 end: 1.6.7 compress-ramdisk (duration 00:00:03) [common]
268 16:30:40.000314 start: 1.6.8 prepare-kernel (timeout 00:09:31) [common]
269 16:30:40.000477 start: 1.6.8.1 prepare-fit (timeout 00:09:31) [common]
270 16:30:40.000634 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/kernel/Image']
271 16:30:54.539195 Returned 0 in 14 seconds
272 16:30:54.639892 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/kernel/image.itb
273 16:30:55.039480 output: FIT description: Kernel Image image with one or more FDT blobs
274 16:30:55.039884 output: Created: Mon Jun 17 17:30:54 2024
275 16:30:55.039968 output: Image 0 (kernel-1)
276 16:30:55.040039 output: Description:
277 16:30:55.040110 output: Created: Mon Jun 17 17:30:54 2024
278 16:30:55.040179 output: Type: Kernel Image
279 16:30:55.040246 output: Compression: lzma compressed
280 16:30:55.040310 output: Data Size: 13128753 Bytes = 12821.05 KiB = 12.52 MiB
281 16:30:55.040374 output: Architecture: AArch64
282 16:30:55.040440 output: OS: Linux
283 16:30:55.040503 output: Load Address: 0x00000000
284 16:30:55.040570 output: Entry Point: 0x00000000
285 16:30:55.040637 output: Hash algo: crc32
286 16:30:55.040698 output: Hash value: 106ffd6f
287 16:30:55.040762 output: Image 1 (fdt-1)
288 16:30:55.040825 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 16:30:55.040888 output: Created: Mon Jun 17 17:30:54 2024
290 16:30:55.040949 output: Type: Flat Device Tree
291 16:30:55.041008 output: Compression: uncompressed
292 16:30:55.041068 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 16:30:55.041126 output: Architecture: AArch64
294 16:30:55.041185 output: Hash algo: crc32
295 16:30:55.041243 output: Hash value: a9713552
296 16:30:55.041302 output: Image 2 (ramdisk-1)
297 16:30:55.041361 output: Description: unavailable
298 16:30:55.041419 output: Created: Mon Jun 17 17:30:54 2024
299 16:30:55.041479 output: Type: RAMDisk Image
300 16:30:55.041537 output: Compression: Unknown Compression
301 16:30:55.041595 output: Data Size: 18744500 Bytes = 18305.18 KiB = 17.88 MiB
302 16:30:55.041654 output: Architecture: AArch64
303 16:30:55.041713 output: OS: Linux
304 16:30:55.041771 output: Load Address: unavailable
305 16:30:55.041829 output: Entry Point: unavailable
306 16:30:55.041888 output: Hash algo: crc32
307 16:30:55.041946 output: Hash value: 22e907ef
308 16:30:55.042005 output: Default Configuration: 'conf-1'
309 16:30:55.042064 output: Configuration 0 (conf-1)
310 16:30:55.042123 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 16:30:55.042181 output: Kernel: kernel-1
312 16:30:55.042239 output: Init Ramdisk: ramdisk-1
313 16:30:55.042298 output: FDT: fdt-1
314 16:30:55.042357 output: Loadables: kernel-1
315 16:30:55.042415 output:
316 16:30:55.042635 end: 1.6.8.1 prepare-fit (duration 00:00:15) [common]
317 16:30:55.042741 end: 1.6.8 prepare-kernel (duration 00:00:15) [common]
318 16:30:55.042865 end: 1.6 prepare-tftp-overlay (duration 00:00:35) [common]
319 16:30:55.042969 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:16) [common]
320 16:30:55.043054 No LXC device requested
321 16:30:55.043141 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 16:30:55.043238 start: 1.8 deploy-device-env (timeout 00:09:16) [common]
323 16:30:55.043325 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 16:30:55.043408 Checking files for TFTP limit of 4294967296 bytes.
325 16:30:55.043960 end: 1 tftp-deploy (duration 00:00:44) [common]
326 16:30:55.044075 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 16:30:55.044182 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 16:30:55.044321 substitutions:
329 16:30:55.044397 - {DTB}: 14396111/tftp-deploy-kbn0hmiy/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 16:30:55.044471 - {INITRD}: 14396111/tftp-deploy-kbn0hmiy/ramdisk/ramdisk.cpio.gz
331 16:30:55.044538 - {KERNEL}: 14396111/tftp-deploy-kbn0hmiy/kernel/Image
332 16:30:55.044602 - {LAVA_MAC}: None
333 16:30:55.044665 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14396111/extract-nfsrootfs-gi_tnf6b
334 16:30:55.044727 - {NFS_SERVER_IP}: 192.168.201.1
335 16:30:55.044787 - {PRESEED_CONFIG}: None
336 16:30:55.044848 - {PRESEED_LOCAL}: None
337 16:30:55.044908 - {RAMDISK}: 14396111/tftp-deploy-kbn0hmiy/ramdisk/ramdisk.cpio.gz
338 16:30:55.044970 - {ROOT_PART}: None
339 16:30:55.045031 - {ROOT}: None
340 16:30:55.045091 - {SERVER_IP}: 192.168.201.1
341 16:30:55.045150 - {TEE}: None
342 16:30:55.045210 Parsed boot commands:
343 16:30:55.045270 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 16:30:55.045463 Parsed boot commands: tftpboot 192.168.201.1 14396111/tftp-deploy-kbn0hmiy/kernel/image.itb 14396111/tftp-deploy-kbn0hmiy/kernel/cmdline
345 16:30:55.045564 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 16:30:55.045661 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 16:30:55.045761 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 16:30:55.045860 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 16:30:55.045943 Not connected, no need to disconnect.
350 16:30:55.046025 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 16:30:55.046115 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 16:30:55.046190 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
353 16:30:55.049937 Setting prompt string to ['lava-test: # ']
354 16:30:55.050420 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 16:30:55.050584 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 16:30:55.050729 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 16:30:55.050866 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 16:30:55.051196 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-0']
359 16:31:18.291085 Returned 0 in 23 seconds
360 16:31:18.391823 end: 2.2.2.1 pdu-reboot (duration 00:00:23) [common]
362 16:31:18.392182 end: 2.2.2 reset-device (duration 00:00:23) [common]
363 16:31:18.392316 start: 2.2.3 depthcharge-start (timeout 00:04:37) [common]
364 16:31:18.392417 Setting prompt string to 'Starting depthcharge on Juniper...'
365 16:31:18.392493 Changing prompt to 'Starting depthcharge on Juniper...'
366 16:31:18.392569 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
367 16:31:18.393003 [Enter `^Ec?' for help]
368 16:31:18.393093 [DL] 00000000 00000000 010701
369 16:31:18.393170
370 16:31:18.393240
371 16:31:18.393309 F0: 102B 0000
372 16:31:18.393378
373 16:31:18.393444 F3: 1006 0033 [0200]
374 16:31:18.393513
375 16:31:18.393574 F3: 4001 00E0 [0200]
376 16:31:18.393635
377 16:31:18.393699 F3: 0000 0000
378 16:31:18.393760
379 16:31:18.393821 V0: 0000 0000 [0001]
380 16:31:18.393881
381 16:31:18.393940 00: 1027 0002
382 16:31:18.394004
383 16:31:18.394064 01: 0000 0000
384 16:31:18.394125
385 16:31:18.394184 BP: 0C00 0251 [0000]
386 16:31:18.394244
387 16:31:18.394303 G0: 1182 0000
388 16:31:18.394361
389 16:31:18.394421 EC: 0004 0000 [0001]
390 16:31:18.394480
391 16:31:18.394539 S7: 0000 0000 [0000]
392 16:31:18.394598
393 16:31:18.394657 CC: 0000 0000 [0001]
394 16:31:18.394715
395 16:31:18.394774 T0: 0000 00DB [000F]
396 16:31:18.394833
397 16:31:18.394921 Jump to BL
398 16:31:18.394983
399 16:31:18.395060
400 16:31:18.395121
401 16:31:18.395181 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
402 16:31:18.395274 ARM64: Exception handlers installed.
403 16:31:18.395369 ARM64: Testing exception
404 16:31:18.395459 ARM64: Done test exception
405 16:31:18.395521 WDT: Last reset was cold boot
406 16:31:18.395581 SPI0(PAD0) initialized at 992727 Hz
407 16:31:18.395642 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
408 16:31:18.395703 Manufacturer: ef
409 16:31:18.395763 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
410 16:31:18.395824 Probing TPM: . done!
411 16:31:18.395883 TPM ready after 0 ms
412 16:31:18.395943 Connected to device vid:did:rid of 1ae0:0028:00
413 16:31:18.396003 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
414 16:31:18.396064 Initialized TPM device CR50 revision 0
415 16:31:18.396124 tlcl_send_startup: Startup return code is 0
416 16:31:18.396184 TPM: setup succeeded
417 16:31:18.396244 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
418 16:31:18.396303 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
419 16:31:18.396363 in-header: 03 19 00 00 08 00 00 00
420 16:31:18.396422 in-data: a2 e0 47 00 13 00 00 00
421 16:31:18.396482 Chrome EC: UHEPI supported
422 16:31:18.396564 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
423 16:31:18.396627 in-header: 03 a1 00 00 08 00 00 00
424 16:31:18.396688 in-data: 84 60 60 10 00 00 00 00
425 16:31:18.396748 Phase 1
426 16:31:18.396807 FMAP: area GBB found @ 3f5000 (12032 bytes)
427 16:31:18.396867 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
428 16:31:18.396927 VB2:vb2_check_recovery() Recovery was requested manually
429 16:31:18.396987 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
430 16:31:18.397046 Recovery requested (1009000e)
431 16:31:18.397106 tlcl_extend: response is 0
432 16:31:18.397165 tlcl_extend: response is 0
433 16:31:18.397224
434 16:31:18.397282
435 16:31:18.397341 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
436 16:31:18.397401 ARM64: Exception handlers installed.
437 16:31:18.397460 ARM64: Testing exception
438 16:31:18.397519 ARM64: Done test exception
439 16:31:18.397577 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2010
440 16:31:18.397637 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
441 16:31:18.397696 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
442 16:31:18.397756 [RTC]rtc_get_frequency_meter,134: input=0xf, output=916
443 16:31:18.397816 [RTC]rtc_get_frequency_meter,134: input=0x7, output=779
444 16:31:18.397876 [RTC]rtc_get_frequency_meter,134: input=0xb, output=846
445 16:31:18.397935 [RTC]rtc_get_frequency_meter,134: input=0x9, output=812
446 16:31:18.397994 [RTC]rtc_get_frequency_meter,134: input=0x8, output=795
447 16:31:18.398053 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
448 16:31:18.398112 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
449 16:31:18.398171 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
450 16:31:18.398230 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
451 16:31:18.398290 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
452 16:31:18.398349 in-header: 03 19 00 00 08 00 00 00
453 16:31:18.398408 in-data: a2 e0 47 00 13 00 00 00
454 16:31:18.398467 Chrome EC: UHEPI supported
455 16:31:18.398527 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
456 16:31:18.398587 in-header: 03 a1 00 00 08 00 00 00
457 16:31:18.398646 in-data: 84 60 60 10 00 00 00 00
458 16:31:18.398705 Skip loading cached calibration data
459 16:31:18.398764 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
460 16:31:18.398825 in-header: 03 a1 00 00 08 00 00 00
461 16:31:18.398884 in-data: 84 60 60 10 00 00 00 00
462 16:31:18.398943 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
463 16:31:18.399002 in-header: 03 a1 00 00 08 00 00 00
464 16:31:18.399061 in-data: 84 60 60 10 00 00 00 00
465 16:31:18.399120 ADC[3]: Raw value=216216 ID=1
466 16:31:18.399179 Manufacturer: ef
467 16:31:18.399238 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
468 16:31:18.399297 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
469 16:31:18.399357 CBFS @ 21000 size 3d4000
470 16:31:18.399425 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
471 16:31:18.399487 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
472 16:31:18.399546 CBFS: Found @ offset 3c700 size 44
473 16:31:18.399606 DRAM-K: Full Calibration
474 16:31:18.399666 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
475 16:31:18.399725 CBFS @ 21000 size 3d4000
476 16:31:18.399784 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
477 16:31:18.399844 CBFS: Locating 'fallback/dram'
478 16:31:18.399903 CBFS: Found @ offset 24b00 size 12268
479 16:31:18.399963 read SPI 0x45b44 0x1224c: 22775 us, 3263 KB/s, 26.104 Mbps
480 16:31:18.400023 ddr_geometry: 1, config: 0x0
481 16:31:18.400082 header.status = 0x0
482 16:31:18.400141 header.magic = 0x44524d4b (expected: 0x44524d4b)
483 16:31:18.400200 header.version = 0x5 (expected: 0x5)
484 16:31:18.400260 header.size = 0x8f0 (expected: 0x8f0)
485 16:31:18.400319 header.config = 0x0
486 16:31:18.400377 header.flags = 0x0
487 16:31:18.400435 header.checksum = 0x0
488 16:31:18.400692 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
489 16:31:18.400760 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
490 16:31:18.400822 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
491 16:31:18.400892 ddr_geometry:1
492 16:31:18.400962 [EMI] new MDL number = 1
493 16:31:18.401022 dram_cbt_mode_extern: 0
494 16:31:18.401081 dram_cbt_mode [RK0]: 0, [RK1]: 0
495 16:31:18.401141 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
496 16:31:18.401201
497 16:31:18.401260
498 16:31:18.401319 [Bianco] ETT version 0.0.0.1
499 16:31:18.401378 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
500 16:31:18.401438
501 16:31:18.401498 vSetVcoreByFreq with vcore:762500, freq=1600
502 16:31:18.401559
503 16:31:18.401618 [DramcInit]
504 16:31:18.401677 AutoRefreshCKEOff AutoREF OFF
505 16:31:18.401736 DDRPhyPLLSetting-CKEOFF
506 16:31:18.401794 DDRPhyPLLSetting-CKEON
507 16:31:18.401853
508 16:31:18.401911 Enable WDQS
509 16:31:18.401969 [ModeRegInit_LP4] CH0 RK0
510 16:31:18.402028 Write Rank0 MR13 =0x18
511 16:31:18.402087 Write Rank0 MR12 =0x5d
512 16:31:18.402145 Write Rank0 MR1 =0x56
513 16:31:18.402204 Write Rank0 MR2 =0x1a
514 16:31:18.402263 Write Rank0 MR11 =0x0
515 16:31:18.402322 Write Rank0 MR22 =0x38
516 16:31:18.402380 Write Rank0 MR14 =0x5d
517 16:31:18.402439 Write Rank0 MR3 =0x30
518 16:31:18.402497 Write Rank0 MR13 =0x58
519 16:31:18.402555 Write Rank0 MR12 =0x5d
520 16:31:18.402613 Write Rank0 MR1 =0x56
521 16:31:18.402671 Write Rank0 MR2 =0x2d
522 16:31:18.402730 Write Rank0 MR11 =0x23
523 16:31:18.402788 Write Rank0 MR22 =0x34
524 16:31:18.402847 Write Rank0 MR14 =0x10
525 16:31:18.402905 Write Rank0 MR3 =0x30
526 16:31:18.402963 Write Rank0 MR13 =0xd8
527 16:31:18.403021 [ModeRegInit_LP4] CH0 RK1
528 16:31:18.403080 Write Rank1 MR13 =0x18
529 16:31:18.403138 Write Rank1 MR12 =0x5d
530 16:31:18.403196 Write Rank1 MR1 =0x56
531 16:31:18.403255 Write Rank1 MR2 =0x1a
532 16:31:18.403313 Write Rank1 MR11 =0x0
533 16:31:18.403371 Write Rank1 MR22 =0x38
534 16:31:18.403442 Write Rank1 MR14 =0x5d
535 16:31:18.403501 Write Rank1 MR3 =0x30
536 16:31:18.403560 Write Rank1 MR13 =0x58
537 16:31:18.403619 Write Rank1 MR12 =0x5d
538 16:31:18.403678 Write Rank1 MR1 =0x56
539 16:31:18.403737 Write Rank1 MR2 =0x2d
540 16:31:18.403795 Write Rank1 MR11 =0x23
541 16:31:18.403854 Write Rank1 MR22 =0x34
542 16:31:18.403912 Write Rank1 MR14 =0x10
543 16:31:18.403971 Write Rank1 MR3 =0x30
544 16:31:18.404029 Write Rank1 MR13 =0xd8
545 16:31:18.404088 [ModeRegInit_LP4] CH1 RK0
546 16:31:18.404147 Write Rank0 MR13 =0x18
547 16:31:18.404205 Write Rank0 MR12 =0x5d
548 16:31:18.404264 Write Rank0 MR1 =0x56
549 16:31:18.404322 Write Rank0 MR2 =0x1a
550 16:31:18.404380 Write Rank0 MR11 =0x0
551 16:31:18.404439 Write Rank0 MR22 =0x38
552 16:31:18.404498 Write Rank0 MR14 =0x5d
553 16:31:18.404556 Write Rank0 MR3 =0x30
554 16:31:18.404615 Write Rank0 MR13 =0x58
555 16:31:18.404673 Write Rank0 MR12 =0x5d
556 16:31:18.404732 Write Rank0 MR1 =0x56
557 16:31:18.404790 Write Rank0 MR2 =0x2d
558 16:31:18.404849 Write Rank0 MR11 =0x23
559 16:31:18.404908 Write Rank0 MR22 =0x34
560 16:31:18.404966 Write Rank0 MR14 =0x10
561 16:31:18.405024 Write Rank0 MR3 =0x30
562 16:31:18.405082 Write Rank0 MR13 =0xd8
563 16:31:18.405141 [ModeRegInit_LP4] CH1 RK1
564 16:31:18.405200 Write Rank1 MR13 =0x18
565 16:31:18.405278 Write Rank1 MR12 =0x5d
566 16:31:18.405340 Write Rank1 MR1 =0x56
567 16:31:18.405399 Write Rank1 MR2 =0x1a
568 16:31:18.405458 Write Rank1 MR11 =0x0
569 16:31:18.405517 Write Rank1 MR22 =0x38
570 16:31:18.405575 Write Rank1 MR14 =0x5d
571 16:31:18.405634 Write Rank1 MR3 =0x30
572 16:31:18.405693 Write Rank1 MR13 =0x58
573 16:31:18.405751 Write Rank1 MR12 =0x5d
574 16:31:18.405809 Write Rank1 MR1 =0x56
575 16:31:18.405868 Write Rank1 MR2 =0x2d
576 16:31:18.405926 Write Rank1 MR11 =0x23
577 16:31:18.405985 Write Rank1 MR22 =0x34
578 16:31:18.406043 Write Rank1 MR14 =0x10
579 16:31:18.406102 Write Rank1 MR3 =0x30
580 16:31:18.406160 Write Rank1 MR13 =0xd8
581 16:31:18.406218 match AC timing 3
582 16:31:18.406277 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
583 16:31:18.406338 [MiockJmeterHQA]
584 16:31:18.406397 vSetVcoreByFreq with vcore:762500, freq=1600
585 16:31:18.406456
586 16:31:18.406515 MIOCK jitter meter ch=0
587 16:31:18.406574
588 16:31:18.406652 1T = (102-17) = 85 dly cells
589 16:31:18.406716 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
590 16:31:18.406782 vSetVcoreByFreq with vcore:725000, freq=1200
591 16:31:18.406879
592 16:31:18.406943 MIOCK jitter meter ch=0
593 16:31:18.407004
594 16:31:18.407064 1T = (96-16) = 80 dly cells
595 16:31:18.407125 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
596 16:31:18.407186 vSetVcoreByFreq with vcore:725000, freq=800
597 16:31:18.407246
598 16:31:18.407305 MIOCK jitter meter ch=0
599 16:31:18.407364
600 16:31:18.407433 1T = (96-16) = 80 dly cells
601 16:31:18.407496 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
602 16:31:18.407556 vSetVcoreByFreq with vcore:762500, freq=1600
603 16:31:18.407616 vSetVcoreByFreq with vcore:762500, freq=1600
604 16:31:18.407676
605 16:31:18.407735 K DRVP
606 16:31:18.407794 1. OCD DRVP=0 CALOUT=0
607 16:31:18.407854 1. OCD DRVP=1 CALOUT=0
608 16:31:18.407914 1. OCD DRVP=2 CALOUT=0
609 16:31:18.407975 1. OCD DRVP=3 CALOUT=0
610 16:31:18.408035 1. OCD DRVP=4 CALOUT=0
611 16:31:18.408095 1. OCD DRVP=5 CALOUT=0
612 16:31:18.408155 1. OCD DRVP=6 CALOUT=0
613 16:31:18.408215 1. OCD DRVP=7 CALOUT=0
614 16:31:18.408276 1. OCD DRVP=8 CALOUT=0
615 16:31:18.408336 1. OCD DRVP=9 CALOUT=1
616 16:31:18.408396
617 16:31:18.408455 1. OCD DRVP calibration OK! DRVP=9
618 16:31:18.408516
619 16:31:18.408575
620 16:31:18.408634
621 16:31:18.408693 K ODTN
622 16:31:18.408751 3. OCD ODTN=0 ,CALOUT=1
623 16:31:18.408815 3. OCD ODTN=1 ,CALOUT=1
624 16:31:18.408876 3. OCD ODTN=2 ,CALOUT=1
625 16:31:18.408936 3. OCD ODTN=3 ,CALOUT=1
626 16:31:18.409019 3. OCD ODTN=4 ,CALOUT=1
627 16:31:18.409082 3. OCD ODTN=5 ,CALOUT=1
628 16:31:18.409143 3. OCD ODTN=6 ,CALOUT=1
629 16:31:18.409204 3. OCD ODTN=7 ,CALOUT=0
630 16:31:18.409264
631 16:31:18.409324 3. OCD ODTN calibration OK! ODTN=7
632 16:31:18.409384
633 16:31:18.409443 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
634 16:31:18.409503 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
635 16:31:18.409564 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
636 16:31:18.409624
637 16:31:18.409683 K DRVP
638 16:31:18.409742 1. OCD DRVP=0 CALOUT=0
639 16:31:18.409803 1. OCD DRVP=1 CALOUT=0
640 16:31:18.409862 1. OCD DRVP=2 CALOUT=0
641 16:31:18.409923 1. OCD DRVP=3 CALOUT=0
642 16:31:18.409983 1. OCD DRVP=4 CALOUT=0
643 16:31:18.410043 1. OCD DRVP=5 CALOUT=0
644 16:31:18.410103 1. OCD DRVP=6 CALOUT=0
645 16:31:18.410163 1. OCD DRVP=7 CALOUT=0
646 16:31:18.410223 1. OCD DRVP=8 CALOUT=0
647 16:31:18.410283 1. OCD DRVP=9 CALOUT=0
648 16:31:18.410343 1. OCD DRVP=10 CALOUT=0
649 16:31:18.410403 1. OCD DRVP=11 CALOUT=1
650 16:31:18.410463
651 16:31:18.410527 1. OCD DRVP calibration OK! DRVP=11
652 16:31:18.410604
653 16:31:18.410665
654 16:31:18.410724
655 16:31:18.410784 K ODTN
656 16:31:18.410843 3. OCD ODTN=0 ,CALOUT=1
657 16:31:18.411099 3. OCD ODTN=1 ,CALOUT=1
658 16:31:18.411171 3. OCD ODTN=2 ,CALOUT=1
659 16:31:18.411234 3. OCD ODTN=3 ,CALOUT=1
660 16:31:18.411296 3. OCD ODTN=4 ,CALOUT=1
661 16:31:18.411356 3. OCD ODTN=5 ,CALOUT=1
662 16:31:18.411429 3. OCD ODTN=6 ,CALOUT=1
663 16:31:18.411492 3. OCD ODTN=7 ,CALOUT=1
664 16:31:18.411553 3. OCD ODTN=8 ,CALOUT=1
665 16:31:18.411614 3. OCD ODTN=9 ,CALOUT=1
666 16:31:18.411674 3. OCD ODTN=10 ,CALOUT=1
667 16:31:18.411735 3. OCD ODTN=11 ,CALOUT=1
668 16:31:18.411796 3. OCD ODTN=12 ,CALOUT=1
669 16:31:18.411856 3. OCD ODTN=13 ,CALOUT=1
670 16:31:18.411916 3. OCD ODTN=14 ,CALOUT=1
671 16:31:18.411976 3. OCD ODTN=15 ,CALOUT=0
672 16:31:18.412036
673 16:31:18.412095 3. OCD ODTN calibration OK! ODTN=15
674 16:31:18.412156
675 16:31:18.412215 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
676 16:31:18.412275 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
677 16:31:18.412335 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
678 16:31:18.412395
679 16:31:18.412453 [DramcInit]
680 16:31:18.412512 AutoRefreshCKEOff AutoREF OFF
681 16:31:18.412571 DDRPhyPLLSetting-CKEOFF
682 16:31:18.412630 DDRPhyPLLSetting-CKEON
683 16:31:18.412689
684 16:31:18.412748 Enable WDQS
685 16:31:18.412807 ==
686 16:31:18.412866 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
687 16:31:18.412925 fsp= 1, odt_onoff= 1, Byte mode= 0
688 16:31:18.412985 ==
689 16:31:18.413044 [Duty_Offset_Calibration]
690 16:31:18.413103
691 16:31:18.413162 ===========================
692 16:31:18.413221 B0:1 B1:1 CA:1
693 16:31:18.413295 ==
694 16:31:18.413359 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
695 16:31:18.413419 fsp= 1, odt_onoff= 1, Byte mode= 0
696 16:31:18.413478 ==
697 16:31:18.413538 [Duty_Offset_Calibration]
698 16:31:18.413597
699 16:31:18.413656 ===========================
700 16:31:18.413716 B0:1 B1:0 CA:2
701 16:31:18.413776 [ModeRegInit_LP4] CH0 RK0
702 16:31:18.413835 Write Rank0 MR13 =0x18
703 16:31:18.413894 Write Rank0 MR12 =0x5d
704 16:31:18.413953 Write Rank0 MR1 =0x56
705 16:31:18.414012 Write Rank0 MR2 =0x1a
706 16:31:18.414070 Write Rank0 MR11 =0x0
707 16:31:18.414129 Write Rank0 MR22 =0x38
708 16:31:18.414188 Write Rank0 MR14 =0x5d
709 16:31:18.414247 Write Rank0 MR3 =0x30
710 16:31:18.414305 Write Rank0 MR13 =0x58
711 16:31:18.414364 Write Rank0 MR12 =0x5d
712 16:31:18.414423 Write Rank0 MR1 =0x56
713 16:31:18.414482 Write Rank0 MR2 =0x2d
714 16:31:18.414541 Write Rank0 MR11 =0x23
715 16:31:18.414600 Write Rank0 MR22 =0x34
716 16:31:18.414658 Write Rank0 MR14 =0x10
717 16:31:18.414716 Write Rank0 MR3 =0x30
718 16:31:18.414775 Write Rank0 MR13 =0xd8
719 16:31:18.414833 [ModeRegInit_LP4] CH0 RK1
720 16:31:18.414892 Write Rank1 MR13 =0x18
721 16:31:18.414950 Write Rank1 MR12 =0x5d
722 16:31:18.415008 Write Rank1 MR1 =0x56
723 16:31:18.415067 Write Rank1 MR2 =0x1a
724 16:31:18.415127 Write Rank1 MR11 =0x0
725 16:31:18.415186 Write Rank1 MR22 =0x38
726 16:31:18.415244 Write Rank1 MR14 =0x5d
727 16:31:18.415302 Write Rank1 MR3 =0x30
728 16:31:18.415361 Write Rank1 MR13 =0x58
729 16:31:18.415428 Write Rank1 MR12 =0x5d
730 16:31:18.415489 Write Rank1 MR1 =0x56
731 16:31:18.415547 Write Rank1 MR2 =0x2d
732 16:31:18.415606 Write Rank1 MR11 =0x23
733 16:31:18.415665 Write Rank1 MR22 =0x34
734 16:31:18.415723 Write Rank1 MR14 =0x10
735 16:31:18.415781 Write Rank1 MR3 =0x30
736 16:31:18.415863 Write Rank1 MR13 =0xd8
737 16:31:18.415923 [ModeRegInit_LP4] CH1 RK0
738 16:31:18.415981 Write Rank0 MR13 =0x18
739 16:31:18.416041 Write Rank0 MR12 =0x5d
740 16:31:18.416100 Write Rank0 MR1 =0x56
741 16:31:18.416159 Write Rank0 MR2 =0x1a
742 16:31:18.416217 Write Rank0 MR11 =0x0
743 16:31:18.416276 Write Rank0 MR22 =0x38
744 16:31:18.416335 Write Rank0 MR14 =0x5d
745 16:31:18.416397 Write Rank0 MR3 =0x30
746 16:31:18.416457 Write Rank0 MR13 =0x58
747 16:31:18.416516 Write Rank0 MR12 =0x5d
748 16:31:18.416574 Write Rank0 MR1 =0x56
749 16:31:18.416633 Write Rank0 MR2 =0x2d
750 16:31:18.416691 Write Rank0 MR11 =0x23
751 16:31:18.416750 Write Rank0 MR22 =0x34
752 16:31:18.416809 Write Rank0 MR14 =0x10
753 16:31:18.416867 Write Rank0 MR3 =0x30
754 16:31:18.416926 Write Rank0 MR13 =0xd8
755 16:31:18.416985 [ModeRegInit_LP4] CH1 RK1
756 16:31:18.417044 Write Rank1 MR13 =0x18
757 16:31:18.417102 Write Rank1 MR12 =0x5d
758 16:31:18.417161 Write Rank1 MR1 =0x56
759 16:31:18.417220 Write Rank1 MR2 =0x1a
760 16:31:18.417279 Write Rank1 MR11 =0x0
761 16:31:18.417337 Write Rank1 MR22 =0x38
762 16:31:18.417396 Write Rank1 MR14 =0x5d
763 16:31:18.417455 Write Rank1 MR3 =0x30
764 16:31:18.417534 Write Rank1 MR13 =0x58
765 16:31:18.417595 Write Rank1 MR12 =0x5d
766 16:31:18.417655 Write Rank1 MR1 =0x56
767 16:31:18.417714 Write Rank1 MR2 =0x2d
768 16:31:18.417772 Write Rank1 MR11 =0x23
769 16:31:18.417855 Write Rank1 MR22 =0x34
770 16:31:18.417916 Write Rank1 MR14 =0x10
771 16:31:18.417982 Write Rank1 MR3 =0x30
772 16:31:18.418060 Write Rank1 MR13 =0xd8
773 16:31:18.418121 match AC timing 3
774 16:31:18.418181 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
775 16:31:18.418242 DramC Write-DBI off
776 16:31:18.418318 DramC Read-DBI off
777 16:31:18.418406 Write Rank0 MR13 =0x59
778 16:31:18.418467 ==
779 16:31:18.418527 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
780 16:31:18.418587 fsp= 1, odt_onoff= 1, Byte mode= 0
781 16:31:18.418647 ==
782 16:31:18.418706 === u2Vref_new: 0x56 --> 0x2d
783 16:31:18.418766 === u2Vref_new: 0x58 --> 0x38
784 16:31:18.418825 === u2Vref_new: 0x5a --> 0x39
785 16:31:18.418885 === u2Vref_new: 0x5c --> 0x3c
786 16:31:18.418944 === u2Vref_new: 0x5e --> 0x3d
787 16:31:18.419004 === u2Vref_new: 0x60 --> 0xa0
788 16:31:18.419064 [CA 0] Center 34 (6~63) winsize 58
789 16:31:18.419123 [CA 1] Center 36 (10~63) winsize 54
790 16:31:18.419183 [CA 2] Center 29 (0~58) winsize 59
791 16:31:18.419241 [CA 3] Center 24 (-3~52) winsize 56
792 16:31:18.419300 [CA 4] Center 25 (-3~54) winsize 58
793 16:31:18.419359 [CA 5] Center 30 (0~60) winsize 61
794 16:31:18.419439
795 16:31:18.419500 [CATrainingPosCal] consider 1 rank data
796 16:31:18.419559 u2DelayCellTimex100 = 735/100 ps
797 16:31:18.419619 CA0 delay=34 (6~63),Diff = 10 PI (13 cell)
798 16:31:18.419679 CA1 delay=36 (10~63),Diff = 12 PI (15 cell)
799 16:31:18.419738 CA2 delay=29 (0~58),Diff = 5 PI (6 cell)
800 16:31:18.419798 CA3 delay=24 (-3~52),Diff = 0 PI (0 cell)
801 16:31:18.419882 CA4 delay=25 (-3~54),Diff = 1 PI (1 cell)
802 16:31:18.419958 CA5 delay=30 (0~60),Diff = 6 PI (7 cell)
803 16:31:18.420049
804 16:31:18.420113 CA PerBit enable=1, Macro0, CA PI delay=24
805 16:31:18.420174 === u2Vref_new: 0x5e --> 0x3d
806 16:31:18.420235
807 16:31:18.420295 Vref(ca) range 1: 30
808 16:31:18.420355
809 16:31:18.420414 CS Dly= 9 (40-0-32)
810 16:31:18.420474 Write Rank0 MR13 =0xd8
811 16:31:18.420533 Write Rank0 MR13 =0xd8
812 16:31:18.420592 Write Rank0 MR12 =0x5e
813 16:31:18.420651 Write Rank1 MR13 =0x59
814 16:31:18.420710 ==
815 16:31:18.420770 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
816 16:31:18.421048 fsp= 1, odt_onoff= 1, Byte mode= 0
817 16:31:18.421115 ==
818 16:31:18.421176 === u2Vref_new: 0x56 --> 0x2d
819 16:31:18.421236 === u2Vref_new: 0x58 --> 0x38
820 16:31:18.421296 === u2Vref_new: 0x5a --> 0x39
821 16:31:18.421356 === u2Vref_new: 0x5c --> 0x3c
822 16:31:18.421416 === u2Vref_new: 0x5e --> 0x3d
823 16:31:18.421476 === u2Vref_new: 0x60 --> 0xa0
824 16:31:18.421535 [CA 0] Center 35 (8~63) winsize 56
825 16:31:18.421595 [CA 1] Center 36 (9~63) winsize 55
826 16:31:18.421654 [CA 2] Center 31 (3~60) winsize 58
827 16:31:18.421729 [CA 3] Center 26 (-2~54) winsize 57
828 16:31:18.421793 [CA 4] Center 26 (-2~55) winsize 58
829 16:31:18.421853 [CA 5] Center 32 (3~61) winsize 59
830 16:31:18.421912
831 16:31:18.421971 [CATrainingPosCal] consider 2 rank data
832 16:31:18.422031 u2DelayCellTimex100 = 735/100 ps
833 16:31:18.422091 CA0 delay=35 (8~63),Diff = 10 PI (13 cell)
834 16:31:18.422150 CA1 delay=36 (10~63),Diff = 11 PI (14 cell)
835 16:31:18.422210 CA2 delay=30 (3~58),Diff = 5 PI (6 cell)
836 16:31:18.422270 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
837 16:31:18.422329 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
838 16:31:18.422388 CA5 delay=31 (3~60),Diff = 6 PI (7 cell)
839 16:31:18.422447
840 16:31:18.422506 CA PerBit enable=1, Macro0, CA PI delay=25
841 16:31:18.422566 === u2Vref_new: 0x60 --> 0xa0
842 16:31:18.422625
843 16:31:18.422683 Vref(ca) range 1: 32
844 16:31:18.422742
845 16:31:18.422801 CS Dly= 8 (39-0-32)
846 16:31:18.422860 Write Rank1 MR13 =0xd8
847 16:31:18.422918 Write Rank1 MR13 =0xd8
848 16:31:18.422977 Write Rank1 MR12 =0x60
849 16:31:18.423035 [RankSwap] Rank num 2, (Multi 1), Rank 0
850 16:31:18.423095 Write Rank0 MR2 =0xad
851 16:31:18.423153 [Write Leveling]
852 16:31:18.423212 delay byte0 byte1 byte2 byte3
853 16:31:18.423272
854 16:31:18.423330 10 0 0
855 16:31:18.423390 11 0 0
856 16:31:18.423465 12 0 0
857 16:31:18.423526 13 0 0
858 16:31:18.423586 14 0 0
859 16:31:18.423646 15 0 0
860 16:31:18.423706 16 0 0
861 16:31:18.423766 17 0 0
862 16:31:18.423826 18 0 0
863 16:31:18.423886 19 0 0
864 16:31:18.423946 20 0 0
865 16:31:18.424005 21 0 0
866 16:31:18.424064 22 0 0
867 16:31:18.424124 23 0 ff
868 16:31:18.424184 24 0 ff
869 16:31:18.424244 25 0 ff
870 16:31:18.424304 26 0 ff
871 16:31:18.424364 27 0 ff
872 16:31:18.424423 28 0 ff
873 16:31:18.424482 29 0 ff
874 16:31:18.424542 30 0 ff
875 16:31:18.424602 31 ff ff
876 16:31:18.424662 32 0 ff
877 16:31:18.424722 33 ff ff
878 16:31:18.424782 34 ff ff
879 16:31:18.424841 35 ff ff
880 16:31:18.424901 36 ff ff
881 16:31:18.424960 37 ff ff
882 16:31:18.425020 38 ff ff
883 16:31:18.425079 39 ff ff
884 16:31:18.425139 pass bytecount = 0xff (0xff: all bytes pass)
885 16:31:18.425198
886 16:31:18.425257 DQS0 dly: 33
887 16:31:18.425315 DQS1 dly: 23
888 16:31:18.425374 Write Rank0 MR2 =0x2d
889 16:31:18.425433 [RankSwap] Rank num 2, (Multi 1), Rank 0
890 16:31:18.425493 Write Rank0 MR1 =0xd6
891 16:31:18.425551 [Gating]
892 16:31:18.425609 ==
893 16:31:18.425668 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
894 16:31:18.425729 fsp= 1, odt_onoff= 1, Byte mode= 0
895 16:31:18.425788 ==
896 16:31:18.425847 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
897 16:31:18.425909 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
898 16:31:18.425970 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
899 16:31:18.426030 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
900 16:31:18.426091 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
901 16:31:18.426151 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
902 16:31:18.426211 3 1 24 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
903 16:31:18.426271 3 1 28 |807 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
904 16:31:18.426332 3 2 0 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
905 16:31:18.426392 3 2 4 |3534 403 |(11 11)(11 11) |(0 0)(1 1)| 0
906 16:31:18.426453 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
907 16:31:18.426513 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
908 16:31:18.426574 3 2 16 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
909 16:31:18.426634 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
910 16:31:18.426707 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
911 16:31:18.426774 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
912 16:31:18.426840 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
913 16:31:18.426901 3 3 4 |3534 201 |(11 11)(11 11) |(0 0)(1 1)| 0
914 16:31:18.426961 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
915 16:31:18.427022 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
916 16:31:18.427082 [Byte 1] Lead/lag falling Transition (3, 3, 12)
917 16:31:18.427141 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
918 16:31:18.427201 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
919 16:31:18.427262 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
920 16:31:18.427322 3 3 28 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
921 16:31:18.427382 3 4 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
922 16:31:18.427453 3 4 4 |3d3d 908 |(11 11)(11 11) |(1 1)(1 1)| 0
923 16:31:18.427514 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
924 16:31:18.427574 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
925 16:31:18.427635 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
926 16:31:18.427695 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
927 16:31:18.427755 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 16:31:18.427815 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 16:31:18.427886 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 16:31:18.427950 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 16:31:18.428011 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 16:31:18.428071 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 16:31:18.428132 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 16:31:18.428192 [Byte 0] Lead/lag falling Transition (3, 5, 16)
935 16:31:18.428252 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
936 16:31:18.428312 [Byte 0] Lead/lag Transition tap number (2)
937 16:31:18.428371 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
938 16:31:18.428431 [Byte 1] Lead/lag falling Transition (3, 5, 24)
939 16:31:18.428490 3 5 28 |808 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
940 16:31:18.428750 [Byte 1] Lead/lag Transition tap number (2)
941 16:31:18.428817 3 6 0 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
942 16:31:18.428879 [Byte 0]First pass (3, 6, 0)
943 16:31:18.428939 3 6 4 |4646 808 |(0 0)(11 11) |(0 0)(0 0)| 0
944 16:31:18.429001 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
945 16:31:18.429061 [Byte 1]First pass (3, 6, 8)
946 16:31:18.429121 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
947 16:31:18.429182 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
948 16:31:18.429242 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 16:31:18.429304 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
950 16:31:18.429364 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 16:31:18.429424 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 16:31:18.429484 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 16:31:18.429585 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 16:31:18.429649 All bytes gating window > 1UI, Early break!
955 16:31:18.429712
956 16:31:18.429824 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
957 16:31:18.429943
958 16:31:18.430057 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
959 16:31:18.430153
960 16:31:18.430245
961 16:31:18.430336
962 16:31:18.430429 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
963 16:31:18.430520
964 16:31:18.430613 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
965 16:31:18.430704
966 16:31:18.430797
967 16:31:18.430880 Write Rank0 MR1 =0x56
968 16:31:18.430943
969 16:31:18.431002 best RODT dly(2T, 0.5T) = (2, 2)
970 16:31:18.431062
971 16:31:18.431121 best RODT dly(2T, 0.5T) = (2, 2)
972 16:31:18.431180 ==
973 16:31:18.431239 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
974 16:31:18.431299 fsp= 1, odt_onoff= 1, Byte mode= 0
975 16:31:18.431358 ==
976 16:31:18.431428 Start DQ dly to find pass range UseTestEngine =0
977 16:31:18.431489 x-axis: bit #, y-axis: DQ dly (-127~63)
978 16:31:18.431549 RX Vref Scan = 0
979 16:31:18.431608 -26, [0] xxxxxxxx xxxxxxxx [MSB]
980 16:31:18.431672 -25, [0] xxxxxxxx xxxxxxxx [MSB]
981 16:31:18.431732 -24, [0] xxxxxxxx xxxxxxxx [MSB]
982 16:31:18.431792 -23, [0] xxxxxxxx xxxxxxxx [MSB]
983 16:31:18.431852 -22, [0] xxxxxxxx xxxxxxxx [MSB]
984 16:31:18.431912 -21, [0] xxxxxxxx xxxxxxxx [MSB]
985 16:31:18.431973 -20, [0] xxxxxxxx xxxxxxxx [MSB]
986 16:31:18.432033 -19, [0] xxxxxxxx xxxxxxxx [MSB]
987 16:31:18.432094 -18, [0] xxxxxxxx xxxxxxxx [MSB]
988 16:31:18.432153 -17, [0] xxxxxxxx xxxxxxxx [MSB]
989 16:31:18.432214 -16, [0] xxxxxxxx xxxxxxxx [MSB]
990 16:31:18.432274 -15, [0] xxxxxxxx xxxxxxxx [MSB]
991 16:31:18.432334 -14, [0] xxxxxxxx xxxxxxxx [MSB]
992 16:31:18.432393 -13, [0] xxxxxxxx xxxxxxxx [MSB]
993 16:31:18.432453 -12, [0] xxxxxxxx xxxxxxxx [MSB]
994 16:31:18.432513 -11, [0] xxxxxxxx xxxxxxxx [MSB]
995 16:31:18.432572 -10, [0] xxxxxxxx xxxxxxxx [MSB]
996 16:31:18.432632 -9, [0] xxxxxxxx xxxxxxxx [MSB]
997 16:31:18.432692 -8, [0] xxxxxxxx xxxxxxxx [MSB]
998 16:31:18.432752 -7, [0] xxxxxxxx xxxxxxxx [MSB]
999 16:31:18.432812 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1000 16:31:18.432872 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1001 16:31:18.432931 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1002 16:31:18.432990 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1003 16:31:18.433049 -2, [0] xxxoxxxx oxxxxxxx [MSB]
1004 16:31:18.433108 -1, [0] xxxoxxxx ooxxxxxx [MSB]
1005 16:31:18.433168 0, [0] xxxoxoxx ooxoxoxx [MSB]
1006 16:31:18.433228 1, [0] xxxoxoox ooxoxoxx [MSB]
1007 16:31:18.433288 2, [0] xxxoxoox ooxoooxx [MSB]
1008 16:31:18.433348 3, [0] xxxoxoox ooxoooxx [MSB]
1009 16:31:18.433408 4, [0] xxxoxoox ooxoooox [MSB]
1010 16:31:18.433467 5, [0] xooooooo ooxooooo [MSB]
1011 16:31:18.433527 6, [0] xooooooo ooxooooo [MSB]
1012 16:31:18.433589 7, [0] oooooooo ooxooooo [MSB]
1013 16:31:18.433649 8, [0] oooooooo ooxooooo [MSB]
1014 16:31:18.433710 32, [0] oooxoooo oooooooo [MSB]
1015 16:31:18.433770 33, [0] oooxoooo xooooooo [MSB]
1016 16:31:18.433829 34, [0] oooxoooo xooooooo [MSB]
1017 16:31:18.433888 35, [0] oooxoooo xooooooo [MSB]
1018 16:31:18.433947 36, [0] oooxoxoo xooxoooo [MSB]
1019 16:31:18.434007 37, [0] oooxoxxx xxoxoooo [MSB]
1020 16:31:18.434066 38, [0] oooxoxxx xxoxxoxo [MSB]
1021 16:31:18.434126 39, [0] oooxoxxx xxoxxxxo [MSB]
1022 16:31:18.434186 40, [0] xxoxxxxx xxoxxxxo [MSB]
1023 16:31:18.434245 41, [0] xxxxxxxx xxoxxxxo [MSB]
1024 16:31:18.434305 42, [0] xxxxxxxx xxoxxxxx [MSB]
1025 16:31:18.434371 43, [0] xxxxxxxx xxoxxxxx [MSB]
1026 16:31:18.434434 44, [0] xxxxxxxx xxxxxxxx [MSB]
1027 16:31:18.434517 iDelay=44, Bit 0, Center 23 (7 ~ 39) 33
1028 16:31:18.434579 iDelay=44, Bit 1, Center 22 (5 ~ 39) 35
1029 16:31:18.434638 iDelay=44, Bit 2, Center 22 (5 ~ 40) 36
1030 16:31:18.434696 iDelay=44, Bit 3, Center 14 (-2 ~ 31) 34
1031 16:31:18.434754 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
1032 16:31:18.434812 iDelay=44, Bit 5, Center 17 (0 ~ 35) 36
1033 16:31:18.434870 iDelay=44, Bit 6, Center 18 (1 ~ 36) 36
1034 16:31:18.434928 iDelay=44, Bit 7, Center 20 (5 ~ 36) 32
1035 16:31:18.434986 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
1036 16:31:18.435044 iDelay=44, Bit 9, Center 17 (-1 ~ 36) 38
1037 16:31:18.435101 iDelay=44, Bit 10, Center 26 (9 ~ 43) 35
1038 16:31:18.435159 iDelay=44, Bit 11, Center 17 (0 ~ 35) 36
1039 16:31:18.435217 iDelay=44, Bit 12, Center 19 (2 ~ 37) 36
1040 16:31:18.435275 iDelay=44, Bit 13, Center 19 (0 ~ 38) 39
1041 16:31:18.435333 iDelay=44, Bit 14, Center 20 (4 ~ 37) 34
1042 16:31:18.435391 iDelay=44, Bit 15, Center 23 (5 ~ 41) 37
1043 16:31:18.435470 ==
1044 16:31:18.435539 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1045 16:31:18.435599 fsp= 1, odt_onoff= 1, Byte mode= 0
1046 16:31:18.435658 ==
1047 16:31:18.435716 DQS Delay:
1048 16:31:18.435774 DQS0 = 0, DQS1 = 0
1049 16:31:18.435834 DQM Delay:
1050 16:31:18.435895 DQM0 = 19, DQM1 = 19
1051 16:31:18.435957 DQ Delay:
1052 16:31:18.436016 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =14
1053 16:31:18.436074 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =20
1054 16:31:18.436136 DQ8 =15, DQ9 =17, DQ10 =26, DQ11 =17
1055 16:31:18.436198 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =23
1056 16:31:18.436256
1057 16:31:18.436313
1058 16:31:18.436379 DramC Write-DBI off
1059 16:31:18.436438 ==
1060 16:31:18.436496 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1061 16:31:18.436554 fsp= 1, odt_onoff= 1, Byte mode= 0
1062 16:31:18.436612 ==
1063 16:31:18.436670 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1064 16:31:18.436727
1065 16:31:18.436799 Begin, DQ Scan Range 919~1175
1066 16:31:18.436859
1067 16:31:18.436916
1068 16:31:18.436974 TX Vref Scan disable
1069 16:31:18.437032 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1070 16:31:18.437092 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1071 16:31:18.437152 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1072 16:31:18.437423 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1073 16:31:18.437494 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1074 16:31:18.437556 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1075 16:31:18.437630 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1076 16:31:18.437704 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1077 16:31:18.437821 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1078 16:31:18.437927 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1079 16:31:18.438025 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1080 16:31:18.438090 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1081 16:31:18.438189 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1082 16:31:18.438253 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1083 16:31:18.438314 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1084 16:31:18.438374 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1085 16:31:18.438444 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1086 16:31:18.438505 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1087 16:31:18.438564 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1088 16:31:18.438626 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1089 16:31:18.438696 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1090 16:31:18.438756 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1091 16:31:18.438815 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1092 16:31:18.438875 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1093 16:31:18.438945 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1094 16:31:18.439005 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1095 16:31:18.439063 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1096 16:31:18.439123 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1097 16:31:18.439219 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1098 16:31:18.439313 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1099 16:31:18.439430 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1100 16:31:18.439499 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1101 16:31:18.439560 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1102 16:31:18.439620 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1103 16:31:18.439716 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1104 16:31:18.439810 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1105 16:31:18.439907 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1106 16:31:18.439986 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1107 16:31:18.440047 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1108 16:31:18.440106 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1109 16:31:18.440183 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1110 16:31:18.440243 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1111 16:31:18.440303 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1112 16:31:18.440364 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1113 16:31:18.440429 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1114 16:31:18.440488 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1115 16:31:18.440548 965 |3 6 5|[0] xxxxxxxx oxxoxxxx [MSB]
1116 16:31:18.440613 966 |3 6 6|[0] xxxxxxxx oxxoxxxx [MSB]
1117 16:31:18.440674 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1118 16:31:18.440733 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1119 16:31:18.440792 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1120 16:31:18.440851 970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]
1121 16:31:18.440910 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1122 16:31:18.440969 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1123 16:31:18.441028 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1124 16:31:18.441115 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1125 16:31:18.441186 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1126 16:31:18.441247 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1127 16:31:18.441307 977 |3 6 17|[0] xooooooo oooooooo [MSB]
1128 16:31:18.441387 984 |3 6 24|[0] oooooooo xooooooo [MSB]
1129 16:31:18.441448 985 |3 6 25|[0] oooooooo xooxoooo [MSB]
1130 16:31:18.441508 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1131 16:31:18.441567 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1132 16:31:18.441626 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1133 16:31:18.441685 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1134 16:31:18.441745 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1135 16:31:18.441804 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1136 16:31:18.441863 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1137 16:31:18.441922 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1138 16:31:18.441980 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1139 16:31:18.442039 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1140 16:31:18.442097 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1141 16:31:18.442156 997 |3 6 37|[0] oooxoxxx xxxxxxxx [MSB]
1142 16:31:18.442214 998 |3 6 38|[0] oooxoxxx xxxxxxxx [MSB]
1143 16:31:18.442273 999 |3 6 39|[0] oxoxxxxx xxxxxxxx [MSB]
1144 16:31:18.442332 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1145 16:31:18.442391 Byte0, DQ PI dly=986, DQM PI dly= 986
1146 16:31:18.442449 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1147 16:31:18.442508
1148 16:31:18.442565 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1149 16:31:18.442624
1150 16:31:18.442681 Byte1, DQ PI dly=976, DQM PI dly= 976
1151 16:31:18.442739 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1152 16:31:18.442797
1153 16:31:18.442855 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1154 16:31:18.442913
1155 16:31:18.442970 ==
1156 16:31:18.443028 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1157 16:31:18.443087 fsp= 1, odt_onoff= 1, Byte mode= 0
1158 16:31:18.443144 ==
1159 16:31:18.443202 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1160 16:31:18.443259
1161 16:31:18.443317 Begin, DQ Scan Range 952~1016
1162 16:31:18.443374 Write Rank0 MR14 =0x0
1163 16:31:18.443442
1164 16:31:18.443501 CH=0, VrefRange= 0, VrefLevel = 0
1165 16:31:18.443559 TX Bit0 (980~994) 15 987, Bit8 (966~976) 11 971,
1166 16:31:18.443618 TX Bit1 (978~993) 16 985, Bit9 (968~982) 15 975,
1167 16:31:18.443676 TX Bit2 (979~994) 16 986, Bit10 (974~985) 12 979,
1168 16:31:18.443734 TX Bit3 (975~987) 13 981, Bit11 (967~979) 13 973,
1169 16:31:18.443792 TX Bit4 (979~992) 14 985, Bit12 (969~982) 14 975,
1170 16:31:18.443851 TX Bit5 (977~991) 15 984, Bit13 (969~983) 15 976,
1171 16:31:18.443930 TX Bit6 (978~991) 14 984, Bit14 (968~983) 16 975,
1172 16:31:18.443990 TX Bit7 (979~992) 14 985, Bit15 (974~984) 11 979,
1173 16:31:18.444048
1174 16:31:18.444107 Write Rank0 MR14 =0x2
1175 16:31:18.444165
1176 16:31:18.444222 CH=0, VrefRange= 0, VrefLevel = 2
1177 16:31:18.444281 TX Bit0 (980~995) 16 987, Bit8 (966~977) 12 971,
1178 16:31:18.444340 TX Bit1 (978~993) 16 985, Bit9 (968~983) 16 975,
1179 16:31:18.444619 TX Bit2 (979~995) 17 987, Bit10 (974~986) 13 980,
1180 16:31:18.444687 TX Bit3 (976~988) 13 982, Bit11 (967~981) 15 974,
1181 16:31:18.444747 TX Bit4 (978~993) 16 985, Bit12 (969~983) 15 976,
1182 16:31:18.444806 TX Bit5 (977~992) 16 984, Bit13 (968~983) 16 975,
1183 16:31:18.444874 TX Bit6 (978~991) 14 984, Bit14 (968~984) 17 976,
1184 16:31:18.444933 TX Bit7 (979~993) 15 986, Bit15 (974~985) 12 979,
1185 16:31:18.444992
1186 16:31:18.445053 Write Rank0 MR14 =0x4
1187 16:31:18.445114
1188 16:31:18.445172 CH=0, VrefRange= 0, VrefLevel = 4
1189 16:31:18.445231 TX Bit0 (979~995) 17 987, Bit8 (966~979) 14 972,
1190 16:31:18.445295 TX Bit1 (978~994) 17 986, Bit9 (968~983) 16 975,
1191 16:31:18.445389 TX Bit2 (979~995) 17 987, Bit10 (973~986) 14 979,
1192 16:31:18.445481 TX Bit3 (975~990) 16 982, Bit11 (967~982) 16 974,
1193 16:31:18.445567 TX Bit4 (978~993) 16 985, Bit12 (969~983) 15 976,
1194 16:31:18.445629 TX Bit5 (977~992) 16 984, Bit13 (968~983) 16 975,
1195 16:31:18.445688 TX Bit6 (977~992) 16 984, Bit14 (968~984) 17 976,
1196 16:31:18.445747 TX Bit7 (978~993) 16 985, Bit15 (973~985) 13 979,
1197 16:31:18.445808
1198 16:31:18.445900 Write Rank0 MR14 =0x6
1199 16:31:18.445990
1200 16:31:18.446076 CH=0, VrefRange= 0, VrefLevel = 6
1201 16:31:18.446137 TX Bit0 (979~997) 19 988, Bit8 (966~980) 15 973,
1202 16:31:18.446196 TX Bit1 (978~995) 18 986, Bit9 (967~983) 17 975,
1203 16:31:18.446254 TX Bit2 (979~997) 19 988, Bit10 (973~988) 16 980,
1204 16:31:18.446317 TX Bit3 (975~990) 16 982, Bit11 (967~982) 16 974,
1205 16:31:18.446377 TX Bit4 (978~993) 16 985, Bit12 (968~983) 16 975,
1206 16:31:18.446436 TX Bit5 (976~993) 18 984, Bit13 (968~984) 17 976,
1207 16:31:18.446494 TX Bit6 (977~993) 17 985, Bit14 (968~985) 18 976,
1208 16:31:18.446590 TX Bit7 (978~994) 17 986, Bit15 (972~987) 16 979,
1209 16:31:18.446680
1210 16:31:18.446774 Write Rank0 MR14 =0x8
1211 16:31:18.446871
1212 16:31:18.446934 CH=0, VrefRange= 0, VrefLevel = 8
1213 16:31:18.446993 TX Bit0 (979~997) 19 988, Bit8 (965~981) 17 973,
1214 16:31:18.447052 TX Bit1 (978~996) 19 987, Bit9 (967~984) 18 975,
1215 16:31:18.447110 TX Bit2 (979~997) 19 988, Bit10 (972~989) 18 980,
1216 16:31:18.447168 TX Bit3 (974~991) 18 982, Bit11 (966~983) 18 974,
1217 16:31:18.447226 TX Bit4 (978~994) 17 986, Bit12 (968~984) 17 976,
1218 16:31:18.447284 TX Bit5 (976~993) 18 984, Bit13 (968~984) 17 976,
1219 16:31:18.447342 TX Bit6 (977~993) 17 985, Bit14 (967~985) 19 976,
1220 16:31:18.447400 TX Bit7 (978~994) 17 986, Bit15 (972~987) 16 979,
1221 16:31:18.447468
1222 16:31:18.447526 Write Rank0 MR14 =0xa
1223 16:31:18.447584
1224 16:31:18.447641 CH=0, VrefRange= 0, VrefLevel = 10
1225 16:31:18.447699 TX Bit0 (978~998) 21 988, Bit8 (965~982) 18 973,
1226 16:31:18.447757 TX Bit1 (978~996) 19 987, Bit9 (967~984) 18 975,
1227 16:31:18.447815 TX Bit2 (978~998) 21 988, Bit10 (971~989) 19 980,
1228 16:31:18.447873 TX Bit3 (974~991) 18 982, Bit11 (966~983) 18 974,
1229 16:31:18.447931 TX Bit4 (977~995) 19 986, Bit12 (968~984) 17 976,
1230 16:31:18.448005 TX Bit5 (976~994) 19 985, Bit13 (967~985) 19 976,
1231 16:31:18.448066 TX Bit6 (977~994) 18 985, Bit14 (967~985) 19 976,
1232 16:31:18.448125 TX Bit7 (978~995) 18 986, Bit15 (971~988) 18 979,
1233 16:31:18.448209
1234 16:31:18.448301 Write Rank0 MR14 =0xc
1235 16:31:18.448391
1236 16:31:18.448481 CH=0, VrefRange= 0, VrefLevel = 12
1237 16:31:18.448572 TX Bit0 (978~998) 21 988, Bit8 (965~982) 18 973,
1238 16:31:18.448664 TX Bit1 (977~997) 21 987, Bit9 (967~985) 19 976,
1239 16:31:18.448755 TX Bit2 (978~998) 21 988, Bit10 (971~990) 20 980,
1240 16:31:18.448847 TX Bit3 (973~992) 20 982, Bit11 (966~984) 19 975,
1241 16:31:18.448939 TX Bit4 (977~995) 19 986, Bit12 (968~985) 18 976,
1242 16:31:18.449030 TX Bit5 (976~994) 19 985, Bit13 (967~985) 19 976,
1243 16:31:18.449122 TX Bit6 (976~994) 19 985, Bit14 (967~986) 20 976,
1244 16:31:18.449213 TX Bit7 (978~996) 19 987, Bit15 (970~989) 20 979,
1245 16:31:18.449309
1246 16:31:18.449372 Write Rank0 MR14 =0xe
1247 16:31:18.449430
1248 16:31:18.449489 CH=0, VrefRange= 0, VrefLevel = 14
1249 16:31:18.449547 TX Bit0 (978~999) 22 988, Bit8 (965~982) 18 973,
1250 16:31:18.449606 TX Bit1 (977~997) 21 987, Bit9 (967~985) 19 976,
1251 16:31:18.449665 TX Bit2 (978~999) 22 988, Bit10 (970~990) 21 980,
1252 16:31:18.449724 TX Bit3 (973~992) 20 982, Bit11 (966~984) 19 975,
1253 16:31:18.449783 TX Bit4 (977~996) 20 986, Bit12 (968~985) 18 976,
1254 16:31:18.449841 TX Bit5 (976~995) 20 985, Bit13 (967~985) 19 976,
1255 16:31:18.449900 TX Bit6 (976~995) 20 985, Bit14 (967~986) 20 976,
1256 16:31:18.449958 TX Bit7 (978~996) 19 987, Bit15 (970~990) 21 980,
1257 16:31:18.450017
1258 16:31:18.450096 Write Rank0 MR14 =0x10
1259 16:31:18.450156
1260 16:31:18.450214 CH=0, VrefRange= 0, VrefLevel = 16
1261 16:31:18.450272 TX Bit0 (978~999) 22 988, Bit8 (964~983) 20 973,
1262 16:31:18.450332 TX Bit1 (977~998) 22 987, Bit9 (967~985) 19 976,
1263 16:31:18.450390 TX Bit2 (978~999) 22 988, Bit10 (970~990) 21 980,
1264 16:31:18.450448 TX Bit3 (973~992) 20 982, Bit11 (965~984) 20 974,
1265 16:31:18.450509 TX Bit4 (977~998) 22 987, Bit12 (967~986) 20 976,
1266 16:31:18.450568 TX Bit5 (975~995) 21 985, Bit13 (967~986) 20 976,
1267 16:31:18.450627 TX Bit6 (976~996) 21 986, Bit14 (966~987) 22 976,
1268 16:31:18.450685 TX Bit7 (977~997) 21 987, Bit15 (970~990) 21 980,
1269 16:31:18.450743
1270 16:31:18.450800 Write Rank0 MR14 =0x12
1271 16:31:18.450858
1272 16:31:18.450916 CH=0, VrefRange= 0, VrefLevel = 18
1273 16:31:18.450973 TX Bit0 (978~1000) 23 989, Bit8 (964~983) 20 973,
1274 16:31:18.451032 TX Bit1 (977~999) 23 988, Bit9 (966~986) 21 976,
1275 16:31:18.451090 TX Bit2 (977~1000) 24 988, Bit10 (970~991) 22 980,
1276 16:31:18.451149 TX Bit3 (973~993) 21 983, Bit11 (965~985) 21 975,
1277 16:31:18.451208 TX Bit4 (977~998) 22 987, Bit12 (967~986) 20 976,
1278 16:31:18.451266 TX Bit5 (975~996) 22 985, Bit13 (967~986) 20 976,
1279 16:31:18.451528 TX Bit6 (976~997) 22 986, Bit14 (966~988) 23 977,
1280 16:31:18.451596 TX Bit7 (977~997) 21 987, Bit15 (969~990) 22 979,
1281 16:31:18.451656
1282 16:31:18.451715 Write Rank0 MR14 =0x14
1283 16:31:18.451773
1284 16:31:18.451831 CH=0, VrefRange= 0, VrefLevel = 20
1285 16:31:18.451889 TX Bit0 (977~1000) 24 988, Bit8 (963~984) 22 973,
1286 16:31:18.451948 TX Bit1 (977~999) 23 988, Bit9 (966~987) 22 976,
1287 16:31:18.452007 TX Bit2 (977~1000) 24 988, Bit10 (969~991) 23 980,
1288 16:31:18.452065 TX Bit3 (972~993) 22 982, Bit11 (965~985) 21 975,
1289 16:31:18.452159 TX Bit4 (977~998) 22 987, Bit12 (967~987) 21 977,
1290 16:31:18.452270 TX Bit5 (975~996) 22 985, Bit13 (967~987) 21 977,
1291 16:31:18.452357 TX Bit6 (975~997) 23 986, Bit14 (966~989) 24 977,
1292 16:31:18.452429 TX Bit7 (977~999) 23 988, Bit15 (969~990) 22 979,
1293 16:31:18.452489
1294 16:31:18.452572 Write Rank0 MR14 =0x16
1295 16:31:18.452644
1296 16:31:18.452766 CH=0, VrefRange= 0, VrefLevel = 22
1297 16:31:18.452874 TX Bit0 (977~1000) 24 988, Bit8 (963~984) 22 973,
1298 16:31:18.452968 TX Bit1 (977~999) 23 988, Bit9 (966~987) 22 976,
1299 16:31:18.453064 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1300 16:31:18.453157 TX Bit3 (971~993) 23 982, Bit11 (965~986) 22 975,
1301 16:31:18.453249 TX Bit4 (976~999) 24 987, Bit12 (967~988) 22 977,
1302 16:31:18.453341 TX Bit5 (974~996) 23 985, Bit13 (966~988) 23 977,
1303 16:31:18.453433 TX Bit6 (975~998) 24 986, Bit14 (966~990) 25 978,
1304 16:31:18.453525 TX Bit7 (977~999) 23 988, Bit15 (969~990) 22 979,
1305 16:31:18.453615
1306 16:31:18.453705 Write Rank0 MR14 =0x18
1307 16:31:18.453795
1308 16:31:18.453885 CH=0, VrefRange= 0, VrefLevel = 24
1309 16:31:18.453977 TX Bit0 (977~1000) 24 988, Bit8 (962~985) 24 973,
1310 16:31:18.454068 TX Bit1 (976~1000) 25 988, Bit9 (966~988) 23 977,
1311 16:31:18.454160 TX Bit2 (977~1000) 24 988, Bit10 (968~992) 25 980,
1312 16:31:18.454251 TX Bit3 (971~994) 24 982, Bit11 (964~986) 23 975,
1313 16:31:18.454343 TX Bit4 (976~999) 24 987, Bit12 (967~989) 23 978,
1314 16:31:18.454434 TX Bit5 (974~998) 25 986, Bit13 (966~989) 24 977,
1315 16:31:18.454526 TX Bit6 (975~998) 24 986, Bit14 (966~990) 25 978,
1316 16:31:18.454617 TX Bit7 (977~999) 23 988, Bit15 (969~991) 23 980,
1317 16:31:18.454707
1318 16:31:18.454797 Write Rank0 MR14 =0x1a
1319 16:31:18.454887
1320 16:31:18.454977 CH=0, VrefRange= 0, VrefLevel = 26
1321 16:31:18.455068 TX Bit0 (977~1001) 25 989, Bit8 (962~985) 24 973,
1322 16:31:18.455160 TX Bit1 (976~1000) 25 988, Bit9 (965~988) 24 976,
1323 16:31:18.455252 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1324 16:31:18.455344 TX Bit3 (970~994) 25 982, Bit11 (964~986) 23 975,
1325 16:31:18.455445 TX Bit4 (976~999) 24 987, Bit12 (966~989) 24 977,
1326 16:31:18.455539 TX Bit5 (974~998) 25 986, Bit13 (966~989) 24 977,
1327 16:31:18.455631 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1328 16:31:18.455722 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1329 16:31:18.455815
1330 16:31:18.455906 Write Rank0 MR14 =0x1c
1331 16:31:18.455995
1332 16:31:18.456085 CH=0, VrefRange= 0, VrefLevel = 28
1333 16:31:18.456177 TX Bit0 (977~1001) 25 989, Bit8 (962~986) 25 974,
1334 16:31:18.456268 TX Bit1 (976~1000) 25 988, Bit9 (965~988) 24 976,
1335 16:31:18.456360 TX Bit2 (976~1001) 26 988, Bit10 (968~992) 25 980,
1336 16:31:18.456452 TX Bit3 (970~995) 26 982, Bit11 (964~987) 24 975,
1337 16:31:18.456543 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1338 16:31:18.456635 TX Bit5 (974~998) 25 986, Bit13 (966~989) 24 977,
1339 16:31:18.456697 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1340 16:31:18.456757 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1341 16:31:18.456816
1342 16:31:18.456874 Write Rank0 MR14 =0x1e
1343 16:31:18.456932
1344 16:31:18.456989 CH=0, VrefRange= 0, VrefLevel = 30
1345 16:31:18.457048 TX Bit0 (977~1001) 25 989, Bit8 (962~986) 25 974,
1346 16:31:18.457105 TX Bit1 (976~1000) 25 988, Bit9 (965~988) 24 976,
1347 16:31:18.457163 TX Bit2 (976~1001) 26 988, Bit10 (968~992) 25 980,
1348 16:31:18.457226 TX Bit3 (970~995) 26 982, Bit11 (964~987) 24 975,
1349 16:31:18.457300 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1350 16:31:18.457364 TX Bit5 (974~998) 25 986, Bit13 (966~989) 24 977,
1351 16:31:18.457424 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1352 16:31:18.457483 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1353 16:31:18.457541
1354 16:31:18.457598 Write Rank0 MR14 =0x20
1355 16:31:18.457656
1356 16:31:18.457714 CH=0, VrefRange= 0, VrefLevel = 32
1357 16:31:18.457772 TX Bit0 (977~1001) 25 989, Bit8 (962~986) 25 974,
1358 16:31:18.457831 TX Bit1 (976~1000) 25 988, Bit9 (965~988) 24 976,
1359 16:31:18.457889 TX Bit2 (976~1001) 26 988, Bit10 (968~992) 25 980,
1360 16:31:18.457948 TX Bit3 (970~995) 26 982, Bit11 (964~987) 24 975,
1361 16:31:18.458006 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1362 16:31:18.458064 TX Bit5 (974~998) 25 986, Bit13 (966~989) 24 977,
1363 16:31:18.458122 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1364 16:31:18.458179 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1365 16:31:18.458237
1366 16:31:18.458294 Write Rank0 MR14 =0x22
1367 16:31:18.458350
1368 16:31:18.458406 CH=0, VrefRange= 0, VrefLevel = 34
1369 16:31:18.458463 TX Bit0 (977~1001) 25 989, Bit8 (962~986) 25 974,
1370 16:31:18.458521 TX Bit1 (976~1000) 25 988, Bit9 (965~988) 24 976,
1371 16:31:18.458578 TX Bit2 (976~1001) 26 988, Bit10 (968~992) 25 980,
1372 16:31:18.458636 TX Bit3 (970~995) 26 982, Bit11 (964~987) 24 975,
1373 16:31:18.458693 TX Bit4 (976~1000) 25 988, Bit12 (966~990) 25 978,
1374 16:31:18.458750 TX Bit5 (974~998) 25 986, Bit13 (966~989) 24 977,
1375 16:31:18.458807 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1376 16:31:18.458865 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1377 16:31:18.458922
1378 16:31:18.458979
1379 16:31:18.459036 TX Vref found, early break! 376< 379
1380 16:31:18.459295 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1381 16:31:18.459360 u1DelayCellOfst[0]=9 cells (7 PI)
1382 16:31:18.459429 u1DelayCellOfst[1]=7 cells (6 PI)
1383 16:31:18.459489 u1DelayCellOfst[2]=7 cells (6 PI)
1384 16:31:18.459547 u1DelayCellOfst[3]=0 cells (0 PI)
1385 16:31:18.459604 u1DelayCellOfst[4]=7 cells (6 PI)
1386 16:31:18.459662 u1DelayCellOfst[5]=5 cells (4 PI)
1387 16:31:18.459718 u1DelayCellOfst[6]=6 cells (5 PI)
1388 16:31:18.459776 u1DelayCellOfst[7]=7 cells (6 PI)
1389 16:31:18.459833 Byte0, DQ PI dly=982, DQM PI dly= 985
1390 16:31:18.459892 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1391 16:31:18.459950
1392 16:31:18.460008 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1393 16:31:18.460066
1394 16:31:18.460123 u1DelayCellOfst[8]=0 cells (0 PI)
1395 16:31:18.460181 u1DelayCellOfst[9]=2 cells (2 PI)
1396 16:31:18.460237 u1DelayCellOfst[10]=7 cells (6 PI)
1397 16:31:18.460294 u1DelayCellOfst[11]=1 cells (1 PI)
1398 16:31:18.460351 u1DelayCellOfst[12]=5 cells (4 PI)
1399 16:31:18.460409 u1DelayCellOfst[13]=3 cells (3 PI)
1400 16:31:18.460467 u1DelayCellOfst[14]=5 cells (4 PI)
1401 16:31:18.460523 u1DelayCellOfst[15]=7 cells (6 PI)
1402 16:31:18.460580 Byte1, DQ PI dly=974, DQM PI dly= 977
1403 16:31:18.460638 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
1404 16:31:18.460695
1405 16:31:18.460753 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
1406 16:31:18.460811
1407 16:31:18.460868 Write Rank0 MR14 =0x1c
1408 16:31:18.460925
1409 16:31:18.460982 Final TX Range 0 Vref 28
1410 16:31:18.461039
1411 16:31:18.461096 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1412 16:31:18.461154
1413 16:31:18.461210 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1414 16:31:18.461268 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1415 16:31:18.461326 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1416 16:31:18.461384 Write Rank0 MR3 =0xb0
1417 16:31:18.461441 DramC Write-DBI on
1418 16:31:18.461498 ==
1419 16:31:18.461556 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1420 16:31:18.461628 fsp= 1, odt_onoff= 1, Byte mode= 0
1421 16:31:18.461691 ==
1422 16:31:18.461750 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1423 16:31:18.461808
1424 16:31:18.461865 Begin, DQ Scan Range 697~761
1425 16:31:18.461923
1426 16:31:18.461980
1427 16:31:18.462037 TX Vref Scan disable
1428 16:31:18.462094 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1429 16:31:18.462153 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1430 16:31:18.462212 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1431 16:31:18.462271 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1432 16:31:18.462330 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1433 16:31:18.462389 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1434 16:31:18.462448 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1435 16:31:18.462507 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1436 16:31:18.462567 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1437 16:31:18.462625 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1438 16:31:18.462685 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1439 16:31:18.462744 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1440 16:31:18.462802 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1441 16:31:18.462861 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1442 16:31:18.462920 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1443 16:31:18.462978 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1444 16:31:18.463036 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1445 16:31:18.463095 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1446 16:31:18.463153 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1447 16:31:18.463211 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1448 16:31:18.463269 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1449 16:31:18.463328 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1450 16:31:18.463386 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1451 16:31:18.463455 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1452 16:31:18.463515 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1453 16:31:18.463573 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1454 16:31:18.463632 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1455 16:31:18.463690 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1456 16:31:18.463749 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1457 16:31:18.463808 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1458 16:31:18.463867 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1459 16:31:18.463925 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1460 16:31:18.463983 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1461 16:31:18.464046 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1462 16:31:18.464137 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1463 16:31:18.464219 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1464 16:31:18.464290 Byte0, DQ PI dly=732, DQM PI dly= 732
1465 16:31:18.464351 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1466 16:31:18.464411
1467 16:31:18.464468 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1468 16:31:18.464526
1469 16:31:18.464583 Byte1, DQ PI dly=720, DQM PI dly= 720
1470 16:31:18.464641 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 16)
1471 16:31:18.464699
1472 16:31:18.464757 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 16)
1473 16:31:18.464814
1474 16:31:18.464871 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1475 16:31:18.464931 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1476 16:31:18.464989 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1477 16:31:18.465046 Write Rank0 MR3 =0x30
1478 16:31:18.465103 DramC Write-DBI off
1479 16:31:18.465161
1480 16:31:18.465218 [DATLAT]
1481 16:31:18.465283 Freq=1600, CH0 RK0, use_rxtx_scan=0
1482 16:31:18.465352
1483 16:31:18.465410 DATLAT Default: 0xf
1484 16:31:18.465467 7, 0xFFFF, sum=0
1485 16:31:18.465526 8, 0xFFFF, sum=0
1486 16:31:18.465584 9, 0xFFFF, sum=0
1487 16:31:18.465642 10, 0xFFFF, sum=0
1488 16:31:18.465701 11, 0xFFFF, sum=0
1489 16:31:18.465759 12, 0xFFFF, sum=0
1490 16:31:18.465817 13, 0xFFFF, sum=0
1491 16:31:18.465875 14, 0x0, sum=1
1492 16:31:18.465934 15, 0x0, sum=2
1493 16:31:18.465992 16, 0x0, sum=3
1494 16:31:18.466050 17, 0x0, sum=4
1495 16:31:18.466108 pattern=2 first_step=14 total pass=5 best_step=16
1496 16:31:18.466166 ==
1497 16:31:18.466223 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1498 16:31:18.466281 fsp= 1, odt_onoff= 1, Byte mode= 0
1499 16:31:18.466339 ==
1500 16:31:18.466395 Start DQ dly to find pass range UseTestEngine =1
1501 16:31:18.466453 x-axis: bit #, y-axis: DQ dly (-127~63)
1502 16:31:18.466510 RX Vref Scan = 1
1503 16:31:18.466567
1504 16:31:18.466832 RX Vref found, early break!
1505 16:31:18.466901
1506 16:31:18.466959 Final RX Vref 12, apply to both rank0 and 1
1507 16:31:18.467018 ==
1508 16:31:18.467075 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1509 16:31:18.467132 fsp= 1, odt_onoff= 1, Byte mode= 0
1510 16:31:18.467190 ==
1511 16:31:18.467247 DQS Delay:
1512 16:31:18.467305 DQS0 = 0, DQS1 = 0
1513 16:31:18.467362 DQM Delay:
1514 16:31:18.467429 DQM0 = 19, DQM1 = 18
1515 16:31:18.467488 DQ Delay:
1516 16:31:18.467546 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15
1517 16:31:18.467604 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
1518 16:31:18.467661 DQ8 =14, DQ9 =16, DQ10 =25, DQ11 =16
1519 16:31:18.467719 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1520 16:31:18.467776
1521 16:31:18.467833
1522 16:31:18.467889
1523 16:31:18.467945 [DramC_TX_OE_Calibration] TA2
1524 16:31:18.468002 Original DQ_B0 (3 6) =30, OEN = 27
1525 16:31:18.468059 Original DQ_B1 (3 6) =30, OEN = 27
1526 16:31:18.468117 23, 0x0, End_B0=23 End_B1=23
1527 16:31:18.468175 24, 0x0, End_B0=24 End_B1=24
1528 16:31:18.468233 25, 0x0, End_B0=25 End_B1=25
1529 16:31:18.468290 26, 0x0, End_B0=26 End_B1=26
1530 16:31:18.468348 27, 0x0, End_B0=27 End_B1=27
1531 16:31:18.468405 28, 0x0, End_B0=28 End_B1=28
1532 16:31:18.468463 29, 0x0, End_B0=29 End_B1=29
1533 16:31:18.468520 30, 0x0, End_B0=30 End_B1=30
1534 16:31:18.468579 31, 0xFFFF, End_B0=30 End_B1=30
1535 16:31:18.468637 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1536 16:31:18.468695 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1537 16:31:18.468753
1538 16:31:18.468809
1539 16:31:18.468865 Write Rank0 MR23 =0x3f
1540 16:31:18.468922 [DQSOSC]
1541 16:31:18.468979 [DQSOSCAuto] RK0, (LSB)MR18= 0x1212, (MSB)MR19= 0x303, tDQSOscB0 = 400 ps tDQSOscB1 = 400 ps
1542 16:31:18.469038 CH0_RK0: MR19=0x303, MR18=0x1212, DQSOSC=400, MR23=63, INC=15, DEC=23
1543 16:31:18.469095 Write Rank0 MR23 =0x3f
1544 16:31:18.469151 [DQSOSC]
1545 16:31:18.469208 [DQSOSCAuto] RK0, (LSB)MR18= 0x1010, (MSB)MR19= 0x303, tDQSOscB0 = 401 ps tDQSOscB1 = 401 ps
1546 16:31:18.469265 CH0 RK0: MR19=303, MR18=1010
1547 16:31:18.469321 [RankSwap] Rank num 2, (Multi 1), Rank 1
1548 16:31:18.469378 Write Rank0 MR2 =0xad
1549 16:31:18.469455 [Write Leveling]
1550 16:31:18.469516 delay byte0 byte1 byte2 byte3
1551 16:31:18.469574
1552 16:31:18.469631 10 0 0
1553 16:31:18.469690 11 0 0
1554 16:31:18.469748 12 0 0
1555 16:31:18.469807 13 0 0
1556 16:31:18.469864 14 0 0
1557 16:31:18.469922 15 0 0
1558 16:31:18.469981 16 0 0
1559 16:31:18.470040 17 0 0
1560 16:31:18.470099 18 0 0
1561 16:31:18.470157 19 0 0
1562 16:31:18.470215 20 0 0
1563 16:31:18.470272 21 0 0
1564 16:31:18.470330 22 0 0
1565 16:31:18.470388 23 0 0
1566 16:31:18.470446 24 0 ff
1567 16:31:18.470503 25 0 ff
1568 16:31:18.470561 26 ff ff
1569 16:31:18.470618 27 ff ff
1570 16:31:18.470676 28 ff ff
1571 16:31:18.470733 29 ff ff
1572 16:31:18.470791 30 ff ff
1573 16:31:18.470848 31 ff ff
1574 16:31:18.470906 32 ff ff
1575 16:31:18.470964 pass bytecount = 0xff (0xff: all bytes pass)
1576 16:31:18.471022
1577 16:31:18.471078 DQS0 dly: 26
1578 16:31:18.471136 DQS1 dly: 24
1579 16:31:18.471192 Write Rank0 MR2 =0x2d
1580 16:31:18.471249 [RankSwap] Rank num 2, (Multi 1), Rank 0
1581 16:31:18.471306 Write Rank1 MR1 =0xd6
1582 16:31:18.471363 [Gating]
1583 16:31:18.471430 ==
1584 16:31:18.471490 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1585 16:31:18.471548 fsp= 1, odt_onoff= 1, Byte mode= 0
1586 16:31:18.471606 ==
1587 16:31:18.471663 3 1 0 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1588 16:31:18.471722 3 1 4 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1589 16:31:18.471781 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1590 16:31:18.471843 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1591 16:31:18.471902 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1592 16:31:18.471961 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1593 16:31:18.472019 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1594 16:31:18.472077 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1595 16:31:18.472134 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1596 16:31:18.472192 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1597 16:31:18.472250 3 2 8 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1598 16:31:18.472309 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1599 16:31:18.472368 3 2 16 |3534 3d3d |(11 11)(10 11) |(0 0)(1 1)| 0
1600 16:31:18.472427 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1601 16:31:18.472485 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1602 16:31:18.472543 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1603 16:31:18.472601 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1604 16:31:18.472659 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1605 16:31:18.472717 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1606 16:31:18.472775 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1607 16:31:18.472832 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1608 16:31:18.472890 3 3 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1609 16:31:18.472948 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1610 16:31:18.473006 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1611 16:31:18.473064 [Byte 1] Lead/lag falling Transition (3, 3, 28)
1612 16:31:18.473121 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1613 16:31:18.473179 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1614 16:31:18.473237 3 4 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1615 16:31:18.473295 3 4 12 |707 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1616 16:31:18.473353 3 4 16 |3d3d 2221 |(11 11)(11 11) |(1 1)(1 1)| 0
1617 16:31:18.473411 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1618 16:31:18.473470 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1619 16:31:18.473528 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1620 16:31:18.473586 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1621 16:31:18.473644 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1622 16:31:18.473702 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1623 16:31:18.473782 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1624 16:31:18.473844 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1625 16:31:18.473903 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1626 16:31:18.473962 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1627 16:31:18.474224 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1628 16:31:18.474305 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1629 16:31:18.474374 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1630 16:31:18.474434 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1631 16:31:18.474494 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1632 16:31:18.474552 3 6 8 |403 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1633 16:31:18.474613 [Byte 0] Lead/lag Transition tap number (3)
1634 16:31:18.474671 [Byte 1] Lead/lag Transition tap number (2)
1635 16:31:18.474729 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
1636 16:31:18.474788 [Byte 0]First pass (3, 6, 12)
1637 16:31:18.474846 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1638 16:31:18.474904 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1639 16:31:18.474963 [Byte 1]First pass (3, 6, 20)
1640 16:31:18.475020 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1641 16:31:18.475078 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1642 16:31:18.475137 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1643 16:31:18.475195 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1644 16:31:18.475254 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1645 16:31:18.475312 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1646 16:31:18.475370 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1647 16:31:18.475440 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1648 16:31:18.475500 All bytes gating window > 1UI, Early break!
1649 16:31:18.475585
1650 16:31:18.475677 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
1651 16:31:18.475767
1652 16:31:18.475857 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1653 16:31:18.475968
1654 16:31:18.476060
1655 16:31:18.476149
1656 16:31:18.476238 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1657 16:31:18.476328
1658 16:31:18.476417 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1659 16:31:18.476506
1660 16:31:18.476595
1661 16:31:18.476684 Write Rank1 MR1 =0x56
1662 16:31:18.476773
1663 16:31:18.476862 best RODT dly(2T, 0.5T) = (2, 3)
1664 16:31:18.476951
1665 16:31:18.477041 best RODT dly(2T, 0.5T) = (2, 3)
1666 16:31:18.477130 ==
1667 16:31:18.477220 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1668 16:31:18.477310 fsp= 1, odt_onoff= 1, Byte mode= 0
1669 16:31:18.477400 ==
1670 16:31:18.477490 Start DQ dly to find pass range UseTestEngine =0
1671 16:31:18.477580 x-axis: bit #, y-axis: DQ dly (-127~63)
1672 16:31:18.477670 RX Vref Scan = 0
1673 16:31:18.477760 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1674 16:31:18.477853 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1675 16:31:18.477945 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1676 16:31:18.478037 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1677 16:31:18.478129 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1678 16:31:18.478221 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1679 16:31:18.478312 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1680 16:31:18.478404 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1681 16:31:18.478495 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1682 16:31:18.478587 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1683 16:31:18.478678 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1684 16:31:18.478770 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1685 16:31:18.478862 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1686 16:31:18.478953 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1687 16:31:18.479044 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1688 16:31:18.479136 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1689 16:31:18.479227 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1690 16:31:18.479319 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1691 16:31:18.479416 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1692 16:31:18.479479 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1693 16:31:18.479539 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1694 16:31:18.479597 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1695 16:31:18.479656 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1696 16:31:18.479714 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1697 16:31:18.479772 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1698 16:31:18.479830 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1699 16:31:18.479889 0, [0] xxxoxoxx ooxoxxxx [MSB]
1700 16:31:18.479954 1, [0] xxxoxoxx ooxoooxx [MSB]
1701 16:31:18.480014 2, [0] xxxoxoox ooxoooxx [MSB]
1702 16:31:18.480072 3, [0] xoxooooo ooxoooox [MSB]
1703 16:31:18.480131 4, [0] xoxooooo ooxoooox [MSB]
1704 16:31:18.480189 5, [0] oooooooo ooxooooo [MSB]
1705 16:31:18.480247 6, [0] oooooooo ooxooooo [MSB]
1706 16:31:18.480305 33, [0] oooooooo xooooooo [MSB]
1707 16:31:18.480363 34, [0] oooooooo xooooooo [MSB]
1708 16:31:18.480421 35, [0] oooxoooo xooooooo [MSB]
1709 16:31:18.480480 36, [0] oooxoooo xooxoooo [MSB]
1710 16:31:18.480538 37, [0] oooxoxoo xxoxoxoo [MSB]
1711 16:31:18.480596 38, [0] oooxoxoo xxoxoxxo [MSB]
1712 16:31:18.480655 39, [0] oooxoxox xxoxxxxo [MSB]
1713 16:31:18.480714 40, [0] oooxoxxx xxoxxxxo [MSB]
1714 16:31:18.480772 41, [0] oxxxoxxx xxoxxxxx [MSB]
1715 16:31:18.480830 42, [0] oxxxxxxx xxoxxxxx [MSB]
1716 16:31:18.480888 43, [0] xxxxxxxx xxoxxxxx [MSB]
1717 16:31:18.480946 44, [0] xxxxxxxx xxoxxxxx [MSB]
1718 16:31:18.481004 45, [0] xxxxxxxx xxxxxxxx [MSB]
1719 16:31:18.481062 iDelay=45, Bit 0, Center 23 (5 ~ 42) 38
1720 16:31:18.481119 iDelay=45, Bit 1, Center 21 (3 ~ 40) 38
1721 16:31:18.481177 iDelay=45, Bit 2, Center 22 (5 ~ 40) 36
1722 16:31:18.481234 iDelay=45, Bit 3, Center 16 (-2 ~ 34) 37
1723 16:31:18.481292 iDelay=45, Bit 4, Center 22 (3 ~ 41) 39
1724 16:31:18.481349 iDelay=45, Bit 5, Center 18 (0 ~ 36) 37
1725 16:31:18.481407 iDelay=45, Bit 6, Center 20 (2 ~ 39) 38
1726 16:31:18.481464 iDelay=45, Bit 7, Center 20 (3 ~ 38) 36
1727 16:31:18.481521 iDelay=45, Bit 8, Center 15 (-2 ~ 32) 35
1728 16:31:18.481579 iDelay=45, Bit 9, Center 18 (0 ~ 36) 37
1729 16:31:18.481636 iDelay=45, Bit 10, Center 25 (7 ~ 44) 38
1730 16:31:18.481693 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1731 16:31:18.481750 iDelay=45, Bit 12, Center 19 (1 ~ 38) 38
1732 16:31:18.481807 iDelay=45, Bit 13, Center 18 (1 ~ 36) 36
1733 16:31:18.481864 iDelay=45, Bit 14, Center 20 (3 ~ 37) 35
1734 16:31:18.481922 iDelay=45, Bit 15, Center 22 (5 ~ 40) 36
1735 16:31:18.481979 ==
1736 16:31:18.482036 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1737 16:31:18.482093 fsp= 1, odt_onoff= 1, Byte mode= 0
1738 16:31:18.482151 ==
1739 16:31:18.482208 DQS Delay:
1740 16:31:18.482265 DQS0 = 0, DQS1 = 0
1741 16:31:18.482321 DQM Delay:
1742 16:31:18.482378 DQM0 = 20, DQM1 = 19
1743 16:31:18.482434 DQ Delay:
1744 16:31:18.482492 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =16
1745 16:31:18.482549 DQ4 =22, DQ5 =18, DQ6 =20, DQ7 =20
1746 16:31:18.482606 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
1747 16:31:18.482663 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1748 16:31:18.482719
1749 16:31:18.482776
1750 16:31:18.482832 DramC Write-DBI off
1751 16:31:18.482888 ==
1752 16:31:18.482946 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1753 16:31:18.483212 fsp= 1, odt_onoff= 1, Byte mode= 0
1754 16:31:18.483309 ==
1755 16:31:18.483423 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1756 16:31:18.483490
1757 16:31:18.483547 Begin, DQ Scan Range 920~1176
1758 16:31:18.483606
1759 16:31:18.483663
1760 16:31:18.483720 TX Vref Scan disable
1761 16:31:18.483778 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1762 16:31:18.483843 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1763 16:31:18.483910 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1764 16:31:18.483970 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1765 16:31:18.484029 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1766 16:31:18.484087 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1767 16:31:18.484145 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1768 16:31:18.484203 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1769 16:31:18.484261 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1770 16:31:18.484320 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1771 16:31:18.484378 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1772 16:31:18.484437 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1773 16:31:18.484495 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1774 16:31:18.484553 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1775 16:31:18.484611 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1776 16:31:18.484669 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1777 16:31:18.484728 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1778 16:31:18.484786 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1779 16:31:18.484844 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1780 16:31:18.484902 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1781 16:31:18.484960 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1782 16:31:18.485019 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1783 16:31:18.485077 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1784 16:31:18.485135 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1785 16:31:18.485193 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1786 16:31:18.485252 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1787 16:31:18.485310 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1788 16:31:18.485375 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1789 16:31:18.485443 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1790 16:31:18.485512 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1791 16:31:18.485579 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1792 16:31:18.485645 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1793 16:31:18.485711 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1794 16:31:18.485777 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1795 16:31:18.485843 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1796 16:31:18.485909 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1797 16:31:18.485973 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1798 16:31:18.486039 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1799 16:31:18.486104 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1800 16:31:18.486169 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1801 16:31:18.486235 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1802 16:31:18.486299 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1803 16:31:18.486364 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1804 16:31:18.486429 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1805 16:31:18.486493 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1806 16:31:18.486558 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1807 16:31:18.486623 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1808 16:31:18.486687 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1809 16:31:18.486752 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1810 16:31:18.486817 969 |3 6 9|[0] xxxxxxxx ooxooxxx [MSB]
1811 16:31:18.486881 970 |3 6 10|[0] xxxxxxxx ooxooxox [MSB]
1812 16:31:18.486947 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1813 16:31:18.487011 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1814 16:31:18.487077 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1815 16:31:18.487148 974 |3 6 14|[0] xoxooooo ooxooooo [MSB]
1816 16:31:18.487270 975 |3 6 15|[0] xoxooooo oooooooo [MSB]
1817 16:31:18.487376 988 |3 6 28|[0] oooooooo xooxoooo [MSB]
1818 16:31:18.487464 989 |3 6 29|[0] oooxoooo xxxxxxxx [MSB]
1819 16:31:18.487526 990 |3 6 30|[0] oooxoooo xxxxxxxx [MSB]
1820 16:31:18.487586 991 |3 6 31|[0] oooxoooo xxxxxxxx [MSB]
1821 16:31:18.487646 992 |3 6 32|[0] xxxxxxxx xxxxxxxx [MSB]
1822 16:31:18.487705 Byte0, DQ PI dly=982, DQM PI dly= 982
1823 16:31:18.487764 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1824 16:31:18.487822
1825 16:31:18.487879 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1826 16:31:18.487937
1827 16:31:18.487996 Byte1, DQ PI dly=979, DQM PI dly= 979
1828 16:31:18.488054 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1829 16:31:18.488111
1830 16:31:18.488168 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1831 16:31:18.488226
1832 16:31:18.488283 ==
1833 16:31:18.488340 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1834 16:31:18.488398 fsp= 1, odt_onoff= 1, Byte mode= 0
1835 16:31:18.488455 ==
1836 16:31:18.488512 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1837 16:31:18.488569
1838 16:31:18.488626 Begin, DQ Scan Range 955~1019
1839 16:31:18.488684 Write Rank1 MR14 =0x0
1840 16:31:18.488741
1841 16:31:18.488797 CH=0, VrefRange= 0, VrefLevel = 0
1842 16:31:18.488854 TX Bit0 (977~991) 15 984, Bit8 (969~982) 14 975,
1843 16:31:18.488913 TX Bit1 (976~988) 13 982, Bit9 (971~985) 15 978,
1844 16:31:18.488970 TX Bit2 (977~989) 13 983, Bit10 (977~989) 13 983,
1845 16:31:18.489027 TX Bit3 (971~982) 12 976, Bit11 (971~983) 13 977,
1846 16:31:18.489085 TX Bit4 (976~989) 14 982, Bit12 (973~985) 13 979,
1847 16:31:18.489142 TX Bit5 (973~985) 13 979, Bit13 (975~983) 9 979,
1848 16:31:18.489200 TX Bit6 (975~986) 12 980, Bit14 (974~985) 12 979,
1849 16:31:18.489257 TX Bit7 (975~989) 15 982, Bit15 (975~989) 15 982,
1850 16:31:18.489314
1851 16:31:18.489371 Write Rank1 MR14 =0x2
1852 16:31:18.489427
1853 16:31:18.489484 CH=0, VrefRange= 0, VrefLevel = 2
1854 16:31:18.489540 TX Bit0 (977~991) 15 984, Bit8 (969~982) 14 975,
1855 16:31:18.489597 TX Bit1 (976~989) 14 982, Bit9 (971~985) 15 978,
1856 16:31:18.489655 TX Bit2 (977~990) 14 983, Bit10 (976~990) 15 983,
1857 16:31:18.489712 TX Bit3 (970~983) 14 976, Bit11 (970~983) 14 976,
1858 16:31:18.489769 TX Bit4 (976~989) 14 982, Bit12 (973~986) 14 979,
1859 16:31:18.489827 TX Bit5 (973~986) 14 979, Bit13 (974~984) 11 979,
1860 16:31:18.489884 TX Bit6 (974~988) 15 981, Bit14 (974~986) 13 980,
1861 16:31:18.489941 TX Bit7 (975~990) 16 982, Bit15 (976~990) 15 983,
1862 16:31:18.489998
1863 16:31:18.490054 Write Rank1 MR14 =0x4
1864 16:31:18.490111
1865 16:31:18.490372 CH=0, VrefRange= 0, VrefLevel = 4
1866 16:31:18.490442 TX Bit0 (977~992) 16 984, Bit8 (969~983) 15 976,
1867 16:31:18.490502 TX Bit1 (976~990) 15 983, Bit9 (971~986) 16 978,
1868 16:31:18.490561 TX Bit2 (977~991) 15 984, Bit10 (976~990) 15 983,
1869 16:31:18.490619 TX Bit3 (970~984) 15 977, Bit11 (969~984) 16 976,
1870 16:31:18.490677 TX Bit4 (975~990) 16 982, Bit12 (973~986) 14 979,
1871 16:31:18.490735 TX Bit5 (972~987) 16 979, Bit13 (974~984) 11 979,
1872 16:31:18.490792 TX Bit6 (974~989) 16 981, Bit14 (974~987) 14 980,
1873 16:31:18.490850 TX Bit7 (975~990) 16 982, Bit15 (975~990) 16 982,
1874 16:31:18.490907
1875 16:31:18.490964 Write Rank1 MR14 =0x6
1876 16:31:18.491021
1877 16:31:18.491078 CH=0, VrefRange= 0, VrefLevel = 6
1878 16:31:18.491136 TX Bit0 (977~992) 16 984, Bit8 (968~984) 17 976,
1879 16:31:18.491194 TX Bit1 (976~990) 15 983, Bit9 (970~986) 17 978,
1880 16:31:18.491251 TX Bit2 (977~991) 15 984, Bit10 (976~991) 16 983,
1881 16:31:18.491309 TX Bit3 (970~985) 16 977, Bit11 (969~984) 16 976,
1882 16:31:18.491367 TX Bit4 (975~991) 17 983, Bit12 (972~987) 16 979,
1883 16:31:18.491434 TX Bit5 (972~987) 16 979, Bit13 (973~985) 13 979,
1884 16:31:18.491493 TX Bit6 (973~989) 17 981, Bit14 (972~988) 17 980,
1885 16:31:18.491550 TX Bit7 (975~991) 17 983, Bit15 (976~991) 16 983,
1886 16:31:18.491608
1887 16:31:18.491664 Write Rank1 MR14 =0x8
1888 16:31:18.491720
1889 16:31:18.491777 CH=0, VrefRange= 0, VrefLevel = 8
1890 16:31:18.491834 TX Bit0 (976~993) 18 984, Bit8 (968~984) 17 976,
1891 16:31:18.491891 TX Bit1 (976~991) 16 983, Bit9 (970~987) 18 978,
1892 16:31:18.491949 TX Bit2 (977~991) 15 984, Bit10 (976~991) 16 983,
1893 16:31:18.492007 TX Bit3 (969~985) 17 977, Bit11 (969~984) 16 976,
1894 16:31:18.492064 TX Bit4 (975~991) 17 983, Bit12 (971~988) 18 979,
1895 16:31:18.492121 TX Bit5 (971~988) 18 979, Bit13 (973~985) 13 979,
1896 16:31:18.492179 TX Bit6 (973~990) 18 981, Bit14 (973~989) 17 981,
1897 16:31:18.492236 TX Bit7 (974~991) 18 982, Bit15 (975~991) 17 983,
1898 16:31:18.492293
1899 16:31:18.492350 Write Rank1 MR14 =0xa
1900 16:31:18.492406
1901 16:31:18.492463 CH=0, VrefRange= 0, VrefLevel = 10
1902 16:31:18.492520 TX Bit0 (976~993) 18 984, Bit8 (968~985) 18 976,
1903 16:31:18.492579 TX Bit1 (975~991) 17 983, Bit9 (969~988) 20 978,
1904 16:31:18.492636 TX Bit2 (976~992) 17 984, Bit10 (976~992) 17 984,
1905 16:31:18.492693 TX Bit3 (969~986) 18 977, Bit11 (969~985) 17 977,
1906 16:31:18.492751 TX Bit4 (974~991) 18 982, Bit12 (971~989) 19 980,
1907 16:31:18.492809 TX Bit5 (971~989) 19 980, Bit13 (972~986) 15 979,
1908 16:31:18.492865 TX Bit6 (972~991) 20 981, Bit14 (972~989) 18 980,
1909 16:31:18.492922 TX Bit7 (974~991) 18 982, Bit15 (975~992) 18 983,
1910 16:31:18.492980
1911 16:31:18.493037 Write Rank1 MR14 =0xc
1912 16:31:18.493094
1913 16:31:18.493150 CH=0, VrefRange= 0, VrefLevel = 12
1914 16:31:18.493207 TX Bit0 (976~994) 19 985, Bit8 (968~985) 18 976,
1915 16:31:18.493264 TX Bit1 (975~992) 18 983, Bit9 (969~989) 21 979,
1916 16:31:18.493322 TX Bit2 (976~992) 17 984, Bit10 (975~992) 18 983,
1917 16:31:18.493380 TX Bit3 (969~986) 18 977, Bit11 (968~985) 18 976,
1918 16:31:18.493438 TX Bit4 (974~992) 19 983, Bit12 (970~989) 20 979,
1919 16:31:18.493495 TX Bit5 (971~990) 20 980, Bit13 (972~987) 16 979,
1920 16:31:18.493552 TX Bit6 (972~991) 20 981, Bit14 (971~990) 20 980,
1921 16:31:18.493608 TX Bit7 (974~992) 19 983, Bit15 (974~992) 19 983,
1922 16:31:18.493666
1923 16:31:18.493722 Write Rank1 MR14 =0xe
1924 16:31:18.493779
1925 16:31:18.493835 CH=0, VrefRange= 0, VrefLevel = 14
1926 16:31:18.493892 TX Bit0 (976~994) 19 985, Bit8 (968~986) 19 977,
1927 16:31:18.493950 TX Bit1 (975~992) 18 983, Bit9 (969~989) 21 979,
1928 16:31:18.494007 TX Bit2 (976~993) 18 984, Bit10 (975~993) 19 984,
1929 16:31:18.494064 TX Bit3 (969~988) 20 978, Bit11 (968~987) 20 977,
1930 16:31:18.494121 TX Bit4 (974~992) 19 983, Bit12 (970~990) 21 980,
1931 16:31:18.494178 TX Bit5 (970~990) 21 980, Bit13 (971~988) 18 979,
1932 16:31:18.494235 TX Bit6 (971~991) 21 981, Bit14 (970~990) 21 980,
1933 16:31:18.494292 TX Bit7 (973~992) 20 982, Bit15 (974~993) 20 983,
1934 16:31:18.494349
1935 16:31:18.494406 Write Rank1 MR14 =0x10
1936 16:31:18.494462
1937 16:31:18.494519 CH=0, VrefRange= 0, VrefLevel = 16
1938 16:31:18.494576 TX Bit0 (975~995) 21 985, Bit8 (967~986) 20 976,
1939 16:31:18.494635 TX Bit1 (974~993) 20 983, Bit9 (969~990) 22 979,
1940 16:31:18.494693 TX Bit2 (976~993) 18 984, Bit10 (975~993) 19 984,
1941 16:31:18.494750 TX Bit3 (968~988) 21 978, Bit11 (968~988) 21 978,
1942 16:31:18.494807 TX Bit4 (973~993) 21 983, Bit12 (970~990) 21 980,
1943 16:31:18.494865 TX Bit5 (970~991) 22 980, Bit13 (971~989) 19 980,
1944 16:31:18.494922 TX Bit6 (971~992) 22 981, Bit14 (970~990) 21 980,
1945 16:31:18.494979 TX Bit7 (973~993) 21 983, Bit15 (974~993) 20 983,
1946 16:31:18.495036
1947 16:31:18.495092 Write Rank1 MR14 =0x12
1948 16:31:18.495149
1949 16:31:18.495205 CH=0, VrefRange= 0, VrefLevel = 18
1950 16:31:18.495262 TX Bit0 (976~995) 20 985, Bit8 (967~987) 21 977,
1951 16:31:18.495319 TX Bit1 (974~993) 20 983, Bit9 (969~990) 22 979,
1952 16:31:18.495376 TX Bit2 (976~994) 19 985, Bit10 (974~993) 20 983,
1953 16:31:18.495445 TX Bit3 (968~988) 21 978, Bit11 (968~988) 21 978,
1954 16:31:18.495504 TX Bit4 (973~993) 21 983, Bit12 (969~990) 22 979,
1955 16:31:18.495561 TX Bit5 (970~991) 22 980, Bit13 (971~989) 19 980,
1956 16:31:18.495619 TX Bit6 (971~992) 22 981, Bit14 (970~991) 22 980,
1957 16:31:18.495676 TX Bit7 (972~993) 22 982, Bit15 (973~993) 21 983,
1958 16:31:18.495733
1959 16:31:18.495790 Write Rank1 MR14 =0x14
1960 16:31:18.495847
1961 16:31:18.495903 CH=0, VrefRange= 0, VrefLevel = 20
1962 16:31:18.495961 TX Bit0 (975~996) 22 985, Bit8 (967~989) 23 978,
1963 16:31:18.496018 TX Bit1 (973~993) 21 983, Bit9 (968~990) 23 979,
1964 16:31:18.496075 TX Bit2 (976~994) 19 985, Bit10 (975~995) 21 985,
1965 16:31:18.496329 TX Bit3 (968~990) 23 979, Bit11 (968~989) 22 978,
1966 16:31:18.496394 TX Bit4 (972~994) 23 983, Bit12 (969~991) 23 980,
1967 16:31:18.496452 TX Bit5 (970~991) 22 980, Bit13 (970~989) 20 979,
1968 16:31:18.496511 TX Bit6 (970~992) 23 981, Bit14 (969~991) 23 980,
1969 16:31:18.496569 TX Bit7 (972~994) 23 983, Bit15 (974~994) 21 984,
1970 16:31:18.496632
1971 16:31:18.496696 Write Rank1 MR14 =0x16
1972 16:31:18.496754
1973 16:31:18.496811 CH=0, VrefRange= 0, VrefLevel = 22
1974 16:31:18.496869 TX Bit0 (975~996) 22 985, Bit8 (967~989) 23 978,
1975 16:31:18.669550 TX Bit1 (973~994) 22 983, Bit9 (968~991) 24 979,
1976 16:31:18.669740 TX Bit2 (975~995) 21 985, Bit10 (974~995) 22 984,
1977 16:31:18.669854 TX Bit3 (968~990) 23 979, Bit11 (967~989) 23 978,
1978 16:31:18.669974 TX Bit4 (972~994) 23 983, Bit12 (969~991) 23 980,
1979 16:31:18.670080 TX Bit5 (969~991) 23 980, Bit13 (970~990) 21 980,
1980 16:31:18.670193 TX Bit6 (970~993) 24 981, Bit14 (969~991) 23 980,
1981 16:31:18.670300 TX Bit7 (971~994) 24 982, Bit15 (974~994) 21 984,
1982 16:31:18.670396
1983 16:31:18.670493 Write Rank1 MR14 =0x18
1984 16:31:18.670596
1985 16:31:18.670694 CH=0, VrefRange= 0, VrefLevel = 24
1986 16:31:18.670796 TX Bit0 (975~997) 23 986, Bit8 (967~990) 24 978,
1987 16:31:18.670891 TX Bit1 (973~995) 23 984, Bit9 (968~991) 24 979,
1988 16:31:18.670988 TX Bit2 (975~996) 22 985, Bit10 (974~995) 22 984,
1989 16:31:18.671089 TX Bit3 (967~990) 24 978, Bit11 (967~990) 24 978,
1990 16:31:18.671187 TX Bit4 (972~995) 24 983, Bit12 (969~991) 23 980,
1991 16:31:18.671288 TX Bit5 (969~992) 24 980, Bit13 (969~990) 22 979,
1992 16:31:18.671384 TX Bit6 (970~993) 24 981, Bit14 (969~991) 23 980,
1993 16:31:18.671493 TX Bit7 (971~995) 25 983, Bit15 (973~995) 23 984,
1994 16:31:18.671598
1995 16:31:18.671696 Write Rank1 MR14 =0x1a
1996 16:31:18.671791
1997 16:31:18.671888 CH=0, VrefRange= 0, VrefLevel = 26
1998 16:31:18.671991 TX Bit0 (975~997) 23 986, Bit8 (966~990) 25 978,
1999 16:31:18.672086 TX Bit1 (972~995) 24 983, Bit9 (968~991) 24 979,
2000 16:31:18.672180 TX Bit2 (975~996) 22 985, Bit10 (973~996) 24 984,
2001 16:31:18.672281 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
2002 16:31:18.672378 TX Bit4 (971~995) 25 983, Bit12 (969~992) 24 980,
2003 16:31:18.672479 TX Bit5 (969~992) 24 980, Bit13 (969~990) 22 979,
2004 16:31:18.672575 TX Bit6 (970~994) 25 982, Bit14 (969~992) 24 980,
2005 16:31:18.672668 TX Bit7 (971~995) 25 983, Bit15 (972~995) 24 983,
2006 16:31:18.672768
2007 16:31:18.672863 Write Rank1 MR14 =0x1c
2008 16:31:18.672953
2009 16:31:18.673057 CH=0, VrefRange= 0, VrefLevel = 28
2010 16:31:18.673150 TX Bit0 (973~998) 26 985, Bit8 (966~990) 25 978,
2011 16:31:18.673241 TX Bit1 (972~995) 24 983, Bit9 (968~991) 24 979,
2012 16:31:18.673345 TX Bit2 (974~997) 24 985, Bit10 (973~997) 25 985,
2013 16:31:18.673437 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
2014 16:31:18.673539 TX Bit4 (971~995) 25 983, Bit12 (968~992) 25 980,
2015 16:31:18.673632 TX Bit5 (969~992) 24 980, Bit13 (969~991) 23 980,
2016 16:31:18.673723 TX Bit6 (970~994) 25 982, Bit14 (969~992) 24 980,
2017 16:31:18.673826 TX Bit7 (970~996) 27 983, Bit15 (972~996) 25 984,
2018 16:31:18.673917
2019 16:31:18.674006 Write Rank1 MR14 =0x1e
2020 16:31:18.674110
2021 16:31:18.674201 CH=0, VrefRange= 0, VrefLevel = 30
2022 16:31:18.674292 TX Bit0 (974~998) 25 986, Bit8 (966~990) 25 978,
2023 16:31:18.674387 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
2024 16:31:18.674484 TX Bit2 (974~997) 24 985, Bit10 (973~997) 25 985,
2025 16:31:18.674575 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
2026 16:31:18.674668 TX Bit4 (970~996) 27 983, Bit12 (968~992) 25 980,
2027 16:31:18.674730 TX Bit5 (969~993) 25 981, Bit13 (969~991) 23 980,
2028 16:31:18.674789 TX Bit6 (970~994) 25 982, Bit14 (968~993) 26 980,
2029 16:31:18.674847 TX Bit7 (970~996) 27 983, Bit15 (971~996) 26 983,
2030 16:31:18.674928
2031 16:31:18.675018 Write Rank1 MR14 =0x20
2032 16:31:18.675108
2033 16:31:18.675206 CH=0, VrefRange= 0, VrefLevel = 32
2034 16:31:18.675298 TX Bit0 (973~998) 26 985, Bit8 (966~990) 25 978,
2035 16:31:18.675398 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
2036 16:31:18.675475 TX Bit2 (974~998) 25 986, Bit10 (973~998) 26 985,
2037 16:31:18.675552 TX Bit3 (967~991) 25 979, Bit11 (966~990) 25 978,
2038 16:31:18.675617 TX Bit4 (971~996) 26 983, Bit12 (968~992) 25 980,
2039 16:31:18.675690 TX Bit5 (969~993) 25 981, Bit13 (969~992) 24 980,
2040 16:31:18.675753 TX Bit6 (969~995) 27 982, Bit14 (968~992) 25 980,
2041 16:31:18.675812 TX Bit7 (971~996) 26 983, Bit15 (971~995) 25 983,
2042 16:31:18.675902
2043 16:31:18.676004 Write Rank1 MR14 =0x22
2044 16:31:18.676095
2045 16:31:18.676198 CH=0, VrefRange= 0, VrefLevel = 34
2046 16:31:18.676291 TX Bit0 (973~998) 26 985, Bit8 (966~990) 25 978,
2047 16:31:18.676387 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
2048 16:31:18.676480 TX Bit2 (974~998) 25 986, Bit10 (973~998) 26 985,
2049 16:31:18.676580 TX Bit3 (967~991) 25 979, Bit11 (966~990) 25 978,
2050 16:31:18.676678 TX Bit4 (971~996) 26 983, Bit12 (968~992) 25 980,
2051 16:31:18.676779 TX Bit5 (969~993) 25 981, Bit13 (969~992) 24 980,
2052 16:31:18.676879 TX Bit6 (969~995) 27 982, Bit14 (968~992) 25 980,
2053 16:31:18.676972 TX Bit7 (971~996) 26 983, Bit15 (971~995) 25 983,
2054 16:31:18.677072
2055 16:31:18.677166 Write Rank1 MR14 =0x24
2056 16:31:18.677260
2057 16:31:18.677360 CH=0, VrefRange= 0, VrefLevel = 36
2058 16:31:18.677452 TX Bit0 (973~998) 26 985, Bit8 (966~990) 25 978,
2059 16:31:18.677554 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
2060 16:31:18.677650 TX Bit2 (974~998) 25 986, Bit10 (973~998) 26 985,
2061 16:31:18.677742 TX Bit3 (967~991) 25 979, Bit11 (966~990) 25 978,
2062 16:31:18.677846 TX Bit4 (971~996) 26 983, Bit12 (968~992) 25 980,
2063 16:31:18.677939 TX Bit5 (969~993) 25 981, Bit13 (969~992) 24 980,
2064 16:31:18.678042 TX Bit6 (969~995) 27 982, Bit14 (968~992) 25 980,
2065 16:31:18.678355 TX Bit7 (971~996) 26 983, Bit15 (971~995) 25 983,
2066 16:31:18.678462
2067 16:31:18.678541 Write Rank1 MR14 =0x26
2068 16:31:18.678602
2069 16:31:18.678660 CH=0, VrefRange= 0, VrefLevel = 38
2070 16:31:18.678720 TX Bit0 (973~998) 26 985, Bit8 (966~990) 25 978,
2071 16:31:18.678824 TX Bit1 (972~996) 25 984, Bit9 (968~991) 24 979,
2072 16:31:18.678917 TX Bit2 (974~998) 25 986, Bit10 (973~998) 26 985,
2073 16:31:18.679023 TX Bit3 (967~991) 25 979, Bit11 (966~990) 25 978,
2074 16:31:18.679115 TX Bit4 (971~996) 26 983, Bit12 (968~992) 25 980,
2075 16:31:18.679217 TX Bit5 (969~993) 25 981, Bit13 (969~992) 24 980,
2076 16:31:18.679313 TX Bit6 (969~995) 27 982, Bit14 (968~992) 25 980,
2077 16:31:18.679413 TX Bit7 (971~996) 26 983, Bit15 (971~995) 25 983,
2078 16:31:18.679498
2079 16:31:18.679559
2080 16:31:18.679617 TX Vref found, early break! 375< 383
2081 16:31:18.679718 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2082 16:31:18.679809 u1DelayCellOfst[0]=7 cells (6 PI)
2083 16:31:18.679900 u1DelayCellOfst[1]=6 cells (5 PI)
2084 16:31:18.680000 u1DelayCellOfst[2]=9 cells (7 PI)
2085 16:31:18.680091 u1DelayCellOfst[3]=0 cells (0 PI)
2086 16:31:18.680194 u1DelayCellOfst[4]=5 cells (4 PI)
2087 16:31:18.680285 u1DelayCellOfst[5]=2 cells (2 PI)
2088 16:31:18.680382 u1DelayCellOfst[6]=3 cells (3 PI)
2089 16:31:18.680489 u1DelayCellOfst[7]=5 cells (4 PI)
2090 16:31:18.680584 Byte0, DQ PI dly=979, DQM PI dly= 982
2091 16:31:18.680676 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2092 16:31:18.680776
2093 16:31:18.680872 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2094 16:31:18.680964
2095 16:31:18.681066 u1DelayCellOfst[8]=0 cells (0 PI)
2096 16:31:18.681158 u1DelayCellOfst[9]=1 cells (1 PI)
2097 16:31:18.681248 u1DelayCellOfst[10]=9 cells (7 PI)
2098 16:31:18.681351 u1DelayCellOfst[11]=0 cells (0 PI)
2099 16:31:18.681443 u1DelayCellOfst[12]=2 cells (2 PI)
2100 16:31:18.681544 u1DelayCellOfst[13]=2 cells (2 PI)
2101 16:31:18.681637 u1DelayCellOfst[14]=2 cells (2 PI)
2102 16:31:18.681727 u1DelayCellOfst[15]=6 cells (5 PI)
2103 16:31:18.681830 Byte1, DQ PI dly=978, DQM PI dly= 981
2104 16:31:18.681922 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2105 16:31:18.682023
2106 16:31:18.682116 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2107 16:31:18.682206
2108 16:31:18.682308 Write Rank1 MR14 =0x20
2109 16:31:18.682400
2110 16:31:18.682490 Final TX Range 0 Vref 32
2111 16:31:18.682552
2112 16:31:18.682627 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2113 16:31:18.682687
2114 16:31:18.682758 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2115 16:31:18.682855 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2116 16:31:18.682948 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2117 16:31:18.683055 Write Rank1 MR3 =0xb0
2118 16:31:18.683154 DramC Write-DBI on
2119 16:31:18.683249 ==
2120 16:31:18.683373 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2121 16:31:18.683474 fsp= 1, odt_onoff= 1, Byte mode= 0
2122 16:31:18.683579 ==
2123 16:31:18.683671 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2124 16:31:18.683774
2125 16:31:18.683868 Begin, DQ Scan Range 701~765
2126 16:31:18.683961
2127 16:31:18.684061
2128 16:31:18.684152 TX Vref Scan disable
2129 16:31:18.684243 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2130 16:31:18.684347 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2131 16:31:18.684451 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2132 16:31:18.684555 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2133 16:31:18.684650 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2134 16:31:18.684744 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2135 16:31:18.684847 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2136 16:31:18.684941 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2137 16:31:18.685034 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2138 16:31:18.685128 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2139 16:31:18.685231 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2140 16:31:18.685325 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2141 16:31:18.685426 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2142 16:31:18.685521 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2143 16:31:18.685615 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2144 16:31:18.685718 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2145 16:31:18.685812 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2146 16:31:18.685913 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2147 16:31:18.686008 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2148 16:31:18.686101 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2149 16:31:18.686203 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2150 16:31:18.686297 Byte0, DQ PI dly=728, DQM PI dly= 728
2151 16:31:18.686396 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2152 16:31:18.686488
2153 16:31:18.686579 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2154 16:31:18.686670
2155 16:31:18.686766 Byte1, DQ PI dly=723, DQM PI dly= 723
2156 16:31:18.686860 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2157 16:31:18.686950
2158 16:31:18.687048 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2159 16:31:18.687140
2160 16:31:18.687232 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2161 16:31:18.687332 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2162 16:31:18.687434 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2163 16:31:18.687497 Write Rank1 MR3 =0x30
2164 16:31:18.687555 DramC Write-DBI off
2165 16:31:18.687613
2166 16:31:18.687694 [DATLAT]
2167 16:31:18.687754 Freq=1600, CH0 RK1, use_rxtx_scan=0
2168 16:31:18.687813
2169 16:31:18.687870 DATLAT Default: 0x10
2170 16:31:18.687940 7, 0xFFFF, sum=0
2171 16:31:18.688005 8, 0xFFFF, sum=0
2172 16:31:18.688064 9, 0xFFFF, sum=0
2173 16:31:18.688123 10, 0xFFFF, sum=0
2174 16:31:18.688182 11, 0xFFFF, sum=0
2175 16:31:18.688259 12, 0xFFFF, sum=0
2176 16:31:18.688320 13, 0xFFFF, sum=0
2177 16:31:18.688378 14, 0x0, sum=1
2178 16:31:18.688456 15, 0x0, sum=2
2179 16:31:18.688517 16, 0x0, sum=3
2180 16:31:18.688575 17, 0x0, sum=4
2181 16:31:18.688655 pattern=2 first_step=14 total pass=5 best_step=16
2182 16:31:18.688754 ==
2183 16:31:18.688846 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2184 16:31:18.688947 fsp= 1, odt_onoff= 1, Byte mode= 0
2185 16:31:18.689038 ==
2186 16:31:18.689129 Start DQ dly to find pass range UseTestEngine =1
2187 16:31:18.689229 x-axis: bit #, y-axis: DQ dly (-127~63)
2188 16:31:18.689320 RX Vref Scan = 0
2189 16:31:18.689419 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2190 16:31:18.689721 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2191 16:31:18.689822 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2192 16:31:18.689916 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2193 16:31:18.690010 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2194 16:31:18.690113 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2195 16:31:18.690206 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2196 16:31:18.690308 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2197 16:31:18.690403 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2198 16:31:18.690496 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2199 16:31:18.690574 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2200 16:31:18.690634 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2201 16:31:18.690694 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2202 16:31:18.690753 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2203 16:31:18.690856 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2204 16:31:18.690949 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2205 16:31:18.691051 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2206 16:31:18.691145 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2207 16:31:18.691237 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2208 16:31:18.691338 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2209 16:31:18.691440 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2210 16:31:18.691535 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2211 16:31:18.691609 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2212 16:31:18.691670 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2213 16:31:18.691729 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2214 16:31:18.691788 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2215 16:31:18.691865 0, [0] xxxoxxxx oxxoxxxx [MSB]
2216 16:31:18.691926 1, [0] xxxoxoxx ooxooxxx [MSB]
2217 16:31:18.691985 2, [0] xxxoxoxx ooxoooxx [MSB]
2218 16:31:18.692044 3, [0] xxxoxooo ooxoooox [MSB]
2219 16:31:18.692103 4, [0] xxxoxooo ooxoooox [MSB]
2220 16:31:18.692181 5, [0] xoxooooo ooxoooox [MSB]
2221 16:31:18.692242 6, [0] oooooooo ooxooooo [MSB]
2222 16:31:18.692301 33, [0] oooooooo xooooooo [MSB]
2223 16:31:18.692360 34, [0] oooxoooo xooooooo [MSB]
2224 16:31:18.692438 35, [0] oooxoxoo xooxoooo [MSB]
2225 16:31:18.692500 36, [0] oooxoxoo xooxoxoo [MSB]
2226 16:31:18.692559 37, [0] oooxoxoo xxoxoxoo [MSB]
2227 16:31:18.692619 38, [0] oooxoxxo xxoxxxxo [MSB]
2228 16:31:18.692720 39, [0] oxxxoxxx xxoxxxxo [MSB]
2229 16:31:18.692813 40, [0] oxxxxxxx xxoxxxxx [MSB]
2230 16:31:18.692906 41, [0] xxxxxxxx xxoxxxxx [MSB]
2231 16:31:18.693003 42, [0] xxxxxxxx xxoxxxxx [MSB]
2232 16:31:18.693101 43, [0] xxxxxxxx xxoxxxxx [MSB]
2233 16:31:18.693204 44, [0] xxxxxxxx xxxxxxxx [MSB]
2234 16:31:18.693309 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
2235 16:31:18.693401 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2236 16:31:18.693492 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2237 16:31:18.693592 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2238 16:31:18.693683 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
2239 16:31:18.693774 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2240 16:31:18.693865 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2241 16:31:18.693964 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2242 16:31:18.694055 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
2243 16:31:18.694154 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2244 16:31:18.694247 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2245 16:31:18.694338 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2246 16:31:18.694433 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2247 16:31:18.694494 iDelay=44, Bit 13, Center 18 (2 ~ 35) 34
2248 16:31:18.694574 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
2249 16:31:18.694635 iDelay=44, Bit 15, Center 22 (6 ~ 39) 34
2250 16:31:18.694693 ==
2251 16:31:18.694751 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2252 16:31:18.694811 fsp= 1, odt_onoff= 1, Byte mode= 0
2253 16:31:18.694921 ==
2254 16:31:18.695013 DQS Delay:
2255 16:31:18.695103 DQS0 = 0, DQS1 = 0
2256 16:31:18.695202 DQM Delay:
2257 16:31:18.695294 DQM0 = 20, DQM1 = 19
2258 16:31:18.695385 DQ Delay:
2259 16:31:18.695469 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15
2260 16:31:18.695530 DQ4 =22, DQ5 =17, DQ6 =20, DQ7 =20
2261 16:31:18.695589 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
2262 16:31:18.695652 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
2263 16:31:18.695721
2264 16:31:18.695779
2265 16:31:18.695836
2266 16:31:18.695905 [DramC_TX_OE_Calibration] TA2
2267 16:31:18.695966 Original DQ_B0 (3 6) =30, OEN = 27
2268 16:31:18.696025 Original DQ_B1 (3 6) =30, OEN = 27
2269 16:31:18.696083 23, 0x0, End_B0=23 End_B1=23
2270 16:31:18.696175 24, 0x0, End_B0=24 End_B1=24
2271 16:31:18.696436 25, 0x0, End_B0=25 End_B1=25
2272 16:31:18.696505 26, 0x0, End_B0=26 End_B1=26
2273 16:31:18.699355 27, 0x0, End_B0=27 End_B1=27
2274 16:31:18.703193 28, 0x0, End_B0=28 End_B1=28
2275 16:31:18.706076 29, 0x0, End_B0=29 End_B1=29
2276 16:31:18.706208 30, 0x0, End_B0=30 End_B1=30
2277 16:31:18.709732 31, 0xFFFF, End_B0=30 End_B1=30
2278 16:31:18.715938 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2279 16:31:18.723100 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2280 16:31:18.723206
2281 16:31:18.723284
2282 16:31:18.723352 Write Rank1 MR23 =0x3f
2283 16:31:18.725945 [DQSOSC]
2284 16:31:18.733147 [DQSOSCAuto] RK1, (LSB)MR18= 0xdada, (MSB)MR19= 0x202, tDQSOscB0 = 431 ps tDQSOscB1 = 431 ps
2285 16:31:18.739264 CH0_RK1: MR19=0x202, MR18=0xDADA, DQSOSC=431, MR23=63, INC=13, DEC=19
2286 16:31:18.739387 Write Rank1 MR23 =0x3f
2287 16:31:18.743089 [DQSOSC]
2288 16:31:18.749717 [DQSOSCAuto] RK1, (LSB)MR18= 0xd7d7, (MSB)MR19= 0x202, tDQSOscB0 = 433 ps tDQSOscB1 = 433 ps
2289 16:31:18.752925 CH0 RK1: MR19=202, MR18=D7D7
2290 16:31:18.756061 [RxdqsGatingPostProcess] freq 1600
2291 16:31:18.759755 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2292 16:31:18.762934 Rank: 0
2293 16:31:18.765891 best DQS0 dly(2T, 0.5T) = (2, 5)
2294 16:31:18.765986 best DQS1 dly(2T, 0.5T) = (2, 5)
2295 16:31:18.769832 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2296 16:31:18.772921 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2297 16:31:18.776046 Rank: 1
2298 16:31:18.776137 best DQS0 dly(2T, 0.5T) = (2, 6)
2299 16:31:18.779775 best DQS1 dly(2T, 0.5T) = (2, 6)
2300 16:31:18.782828 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2301 16:31:18.786380 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2302 16:31:18.793128 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2303 16:31:18.796184 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2304 16:31:18.799856 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2305 16:31:18.803036 Write Rank0 MR13 =0x59
2306 16:31:18.803242 ==
2307 16:31:18.806178 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2308 16:31:18.809791 fsp= 1, odt_onoff= 1, Byte mode= 0
2309 16:31:18.810029 ==
2310 16:31:18.813458 === u2Vref_new: 0x56 --> 0x3a
2311 16:31:18.816411 === u2Vref_new: 0x58 --> 0x58
2312 16:31:18.819558 === u2Vref_new: 0x5a --> 0x5a
2313 16:31:18.823348 === u2Vref_new: 0x5c --> 0x78
2314 16:31:18.826277 === u2Vref_new: 0x5e --> 0x7a
2315 16:31:18.829919 === u2Vref_new: 0x60 --> 0x90
2316 16:31:18.833081 [CA 0] Center 38 (13~63) winsize 51
2317 16:31:18.836673 [CA 1] Center 37 (12~63) winsize 52
2318 16:31:18.839609 [CA 2] Center 34 (6~63) winsize 58
2319 16:31:18.843027 [CA 3] Center 34 (6~63) winsize 58
2320 16:31:18.846593 [CA 4] Center 34 (6~63) winsize 58
2321 16:31:18.846688 [CA 5] Center 28 (-2~58) winsize 61
2322 16:31:18.849936
2323 16:31:18.853258 [CATrainingPosCal] consider 1 rank data
2324 16:31:18.853353 u2DelayCellTimex100 = 735/100 ps
2325 16:31:18.859962 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2326 16:31:18.863307 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2327 16:31:18.866364 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2328 16:31:18.869930 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2329 16:31:18.873559 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2330 16:31:18.876635 CA5 delay=28 (-2~58),Diff = 0 PI (0 cell)
2331 16:31:18.876738
2332 16:31:18.880230 CA PerBit enable=1, Macro0, CA PI delay=28
2333 16:31:18.883348 === u2Vref_new: 0x60 --> 0x90
2334 16:31:18.883456
2335 16:31:18.886416 Vref(ca) range 1: 32
2336 16:31:18.886525
2337 16:31:18.886598 CS Dly= 12 (43-0-32)
2338 16:31:18.890187 Write Rank0 MR13 =0xd8
2339 16:31:18.893299 Write Rank0 MR13 =0xd8
2340 16:31:18.893402 Write Rank0 MR12 =0x60
2341 16:31:18.896778 Write Rank1 MR13 =0x59
2342 16:31:18.896869 ==
2343 16:31:18.900171 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2344 16:31:18.903515 fsp= 1, odt_onoff= 1, Byte mode= 0
2345 16:31:18.903611 ==
2346 16:31:18.906906 === u2Vref_new: 0x56 --> 0x3a
2347 16:31:18.909767 === u2Vref_new: 0x58 --> 0x58
2348 16:31:18.913548 === u2Vref_new: 0x5a --> 0x5a
2349 16:31:18.916583 === u2Vref_new: 0x5c --> 0x78
2350 16:31:18.920412 === u2Vref_new: 0x5e --> 0x7a
2351 16:31:18.923393 === u2Vref_new: 0x60 --> 0x90
2352 16:31:18.926516 [CA 0] Center 38 (13~63) winsize 51
2353 16:31:18.929871 [CA 1] Center 38 (13~63) winsize 51
2354 16:31:18.933521 [CA 2] Center 35 (7~63) winsize 57
2355 16:31:18.936569 [CA 3] Center 34 (6~63) winsize 58
2356 16:31:18.940360 [CA 4] Center 35 (7~63) winsize 57
2357 16:31:18.943446 [CA 5] Center 28 (-2~58) winsize 61
2358 16:31:18.943526
2359 16:31:18.946916 [CATrainingPosCal] consider 2 rank data
2360 16:31:18.950040 u2DelayCellTimex100 = 735/100 ps
2361 16:31:18.953750 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2362 16:31:18.956775 CA1 delay=38 (13~63),Diff = 10 PI (13 cell)
2363 16:31:18.960390 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2364 16:31:18.963737 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2365 16:31:18.966826 CA4 delay=35 (7~63),Diff = 7 PI (9 cell)
2366 16:31:18.970315 CA5 delay=28 (-2~58),Diff = 0 PI (0 cell)
2367 16:31:18.970393
2368 16:31:18.973638 CA PerBit enable=1, Macro0, CA PI delay=28
2369 16:31:18.976946 === u2Vref_new: 0x60 --> 0x90
2370 16:31:18.977027
2371 16:31:18.980039 Vref(ca) range 1: 32
2372 16:31:18.980119
2373 16:31:18.983778 CS Dly= 11 (42-0-32)
2374 16:31:18.983861 Write Rank1 MR13 =0xd8
2375 16:31:18.987131 Write Rank1 MR13 =0xd8
2376 16:31:18.987243 Write Rank1 MR12 =0x60
2377 16:31:18.990223 [RankSwap] Rank num 2, (Multi 1), Rank 0
2378 16:31:18.993882 Write Rank0 MR2 =0xad
2379 16:31:18.993961 [Write Leveling]
2380 16:31:18.996967 delay byte0 byte1 byte2 byte3
2381 16:31:18.997044
2382 16:31:19.000730 10 0 0
2383 16:31:19.000809 11 0 0
2384 16:31:19.003731 12 0 0
2385 16:31:19.003808 13 0 0
2386 16:31:19.007223 14 0 0
2387 16:31:19.007335 15 0 0
2388 16:31:19.007443 16 0 0
2389 16:31:19.010058 17 0 0
2390 16:31:19.010135 18 0 0
2391 16:31:19.013471 19 0 0
2392 16:31:19.013549 20 0 0
2393 16:31:19.013615 21 0 0
2394 16:31:19.016886 22 0 0
2395 16:31:19.016971 23 0 0
2396 16:31:19.020367 24 0 0
2397 16:31:19.020460 25 0 ff
2398 16:31:19.023501 26 0 ff
2399 16:31:19.023584 27 0 ff
2400 16:31:19.023653 28 0 ff
2401 16:31:19.027194 29 0 ff
2402 16:31:19.027305 30 0 ff
2403 16:31:19.030361 31 0 ff
2404 16:31:19.030443 32 0 ff
2405 16:31:19.033429 33 0 ff
2406 16:31:19.033510 34 ff ff
2407 16:31:19.037058 35 ff ff
2408 16:31:19.037136 36 ff ff
2409 16:31:19.037206 37 ff ff
2410 16:31:19.040251 38 ff ff
2411 16:31:19.040330 39 ff ff
2412 16:31:19.043922 40 ff ff
2413 16:31:19.047046 pass bytecount = 0xff (0xff: all bytes pass)
2414 16:31:19.047153
2415 16:31:19.047256 DQS0 dly: 34
2416 16:31:19.050554 DQS1 dly: 25
2417 16:31:19.050656 Write Rank0 MR2 =0x2d
2418 16:31:19.057098 [RankSwap] Rank num 2, (Multi 1), Rank 0
2419 16:31:19.057247 Write Rank0 MR1 =0xd6
2420 16:31:19.057351 [Gating]
2421 16:31:19.057455 ==
2422 16:31:19.063833 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2423 16:31:19.066947 fsp= 1, odt_onoff= 1, Byte mode= 0
2424 16:31:19.067096 ==
2425 16:31:19.070459 3 1 0 |3535 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2426 16:31:19.077277 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2427 16:31:19.080278 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2428 16:31:19.083469 3 1 12 |3535 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2429 16:31:19.090649 3 1 16 |3535 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2430 16:31:19.093473 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2431 16:31:19.096979 [Byte 1] Lead/lag falling Transition (3, 1, 20)
2432 16:31:19.100291 3 1 24 |3535 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2433 16:31:19.106959 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2434 16:31:19.110072 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2435 16:31:19.113757 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2436 16:31:19.120276 3 2 8 |2e2d 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2437 16:31:19.123438 3 2 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2438 16:31:19.126951 3 2 16 |504 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2439 16:31:19.133553 3 2 20 |1a1a 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2440 16:31:19.137341 [Byte 1] Lead/lag Transition tap number (9)
2441 16:31:19.140383 3 2 24 |3d3d c0b |(11 11)(11 11) |(1 1)(0 0)| 0
2442 16:31:19.144013 3 2 28 |3d3d 909 |(11 11)(11 11) |(1 1)(0 0)| 0
2443 16:31:19.150916 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2444 16:31:19.153931 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2445 16:31:19.157592 3 3 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2446 16:31:19.160552 3 3 12 |1211 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2447 16:31:19.167156 3 3 16 |3d3c 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2448 16:31:19.170880 3 3 20 |a09 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2449 16:31:19.173695 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2450 16:31:19.180525 [Byte 0] Lead/lag falling Transition (3, 3, 24)
2451 16:31:19.183715 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2452 16:31:19.187335 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2453 16:31:19.190439 [Byte 1] Lead/lag Transition tap number (1)
2454 16:31:19.197035 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2455 16:31:19.200132 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2456 16:31:19.203696 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2457 16:31:19.210018 3 4 16 |1110 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2458 16:31:19.213493 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2459 16:31:19.216902 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2460 16:31:19.223738 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2461 16:31:19.226702 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2462 16:31:19.230262 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2463 16:31:19.236702 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2464 16:31:19.240355 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2465 16:31:19.243490 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2466 16:31:19.247291 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2467 16:31:19.253441 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2468 16:31:19.257295 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2469 16:31:19.260397 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2470 16:31:19.267318 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2471 16:31:19.270515 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2472 16:31:19.273547 [Byte 0] Lead/lag Transition tap number (1)
2473 16:31:19.277066 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2474 16:31:19.283794 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2475 16:31:19.286704 [Byte 1] Lead/lag falling Transition (3, 6, 16)
2476 16:31:19.290446 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2477 16:31:19.297178 [Byte 1] Lead/lag Transition tap number (2)
2478 16:31:19.300227 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2479 16:31:19.303977 [Byte 0]First pass (3, 6, 24)
2480 16:31:19.306940 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2481 16:31:19.310001 [Byte 1]First pass (3, 6, 28)
2482 16:31:19.313628 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2483 16:31:19.316890 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2484 16:31:19.320378 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2485 16:31:19.323325 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2486 16:31:19.330230 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2487 16:31:19.333273 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2488 16:31:19.336971 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2489 16:31:19.339936 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2490 16:31:19.343508 All bytes gating window > 1UI, Early break!
2491 16:31:19.343592
2492 16:31:19.349832 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
2493 16:31:19.349919
2494 16:31:19.353614 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
2495 16:31:19.353706
2496 16:31:19.353778
2497 16:31:19.353845
2498 16:31:19.356683 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
2499 16:31:19.356759
2500 16:31:19.359911 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2501 16:31:19.359990
2502 16:31:19.360061
2503 16:31:19.363596 Write Rank0 MR1 =0x56
2504 16:31:19.363677
2505 16:31:19.366710 best RODT dly(2T, 0.5T) = (2, 3)
2506 16:31:19.366788
2507 16:31:19.370330 best RODT dly(2T, 0.5T) = (2, 3)
2508 16:31:19.370410 ==
2509 16:31:19.373363 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2510 16:31:19.376839 fsp= 1, odt_onoff= 1, Byte mode= 0
2511 16:31:19.376920 ==
2512 16:31:19.383129 Start DQ dly to find pass range UseTestEngine =0
2513 16:31:19.386861 x-axis: bit #, y-axis: DQ dly (-127~63)
2514 16:31:19.386941 RX Vref Scan = 0
2515 16:31:19.390002 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2516 16:31:19.393124 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2517 16:31:19.396874 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2518 16:31:19.400178 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2519 16:31:19.403336 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2520 16:31:19.406872 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2521 16:31:19.406959 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2522 16:31:19.409885 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2523 16:31:19.413107 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2524 16:31:19.416531 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2525 16:31:19.420137 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2526 16:31:19.423215 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2527 16:31:19.426837 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2528 16:31:19.429928 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2529 16:31:19.430012 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2530 16:31:19.433522 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2531 16:31:19.436517 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2532 16:31:19.440128 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2533 16:31:19.443503 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2534 16:31:19.446851 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2535 16:31:19.449871 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2536 16:31:19.449987 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2537 16:31:19.453521 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2538 16:31:19.456711 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2539 16:31:19.460233 -2, [0] xxxoxxxx xoxxxxxo [MSB]
2540 16:31:19.463325 -1, [0] xxxoxxxx xoxxxxxo [MSB]
2541 16:31:19.466397 0, [0] xxxoxxxx ooxxxxxo [MSB]
2542 16:31:19.470071 1, [0] xxooxxxx ooxxxxxo [MSB]
2543 16:31:19.470158 2, [0] xxooxxxx ooxxxxxo [MSB]
2544 16:31:19.473139 3, [0] oxooxxxo oooxxxxo [MSB]
2545 16:31:19.476782 4, [0] oooooxxo ooooooxo [MSB]
2546 16:31:19.479838 5, [0] oooooxoo ooooooxo [MSB]
2547 16:31:19.483373 32, [0] oooooooo ooooooox [MSB]
2548 16:31:19.486273 33, [0] oooooooo ooooooox [MSB]
2549 16:31:19.486354 34, [0] oooooooo ooooooox [MSB]
2550 16:31:19.489768 35, [0] oooxoooo xoooooox [MSB]
2551 16:31:19.492947 36, [0] oooxoooo xxooooox [MSB]
2552 16:31:19.496699 37, [0] ooxxoooo xxooooox [MSB]
2553 16:31:19.499816 38, [0] ooxxoooo xxooooox [MSB]
2554 16:31:19.503352 39, [0] ooxxooox xxooooox [MSB]
2555 16:31:19.506540 40, [0] oxxxxoox xxxoooox [MSB]
2556 16:31:19.506625 41, [0] oxxxxoox xxxxxxox [MSB]
2557 16:31:19.510227 42, [0] xxxxxxxx xxxxxxxx [MSB]
2558 16:31:19.513321 iDelay=42, Bit 0, Center 22 (3 ~ 41) 39
2559 16:31:19.516341 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
2560 16:31:19.519894 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
2561 16:31:19.526589 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
2562 16:31:19.529666 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
2563 16:31:19.533375 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
2564 16:31:19.536603 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
2565 16:31:19.539627 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
2566 16:31:19.542755 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
2567 16:31:19.546474 iDelay=42, Bit 9, Center 16 (-2 ~ 35) 38
2568 16:31:19.549461 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
2569 16:31:19.552938 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
2570 16:31:19.556413 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
2571 16:31:19.559335 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
2572 16:31:19.562930 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
2573 16:31:19.569248 iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36
2574 16:31:19.569334 ==
2575 16:31:19.572846 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2576 16:31:19.575880 fsp= 1, odt_onoff= 1, Byte mode= 0
2577 16:31:19.575967 ==
2578 16:31:19.579445 DQS Delay:
2579 16:31:19.579527 DQS0 = 0, DQS1 = 0
2580 16:31:19.579601 DQM Delay:
2581 16:31:19.582552 DQM0 = 20, DQM1 = 19
2582 16:31:19.582629 DQ Delay:
2583 16:31:19.585709 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
2584 16:31:19.589404 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
2585 16:31:19.592350 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
2586 16:31:19.595711 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =13
2587 16:31:19.595810
2588 16:31:19.595898
2589 16:31:19.599207 DramC Write-DBI off
2590 16:31:19.599321 ==
2591 16:31:19.602294 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2592 16:31:19.605953 fsp= 1, odt_onoff= 1, Byte mode= 0
2593 16:31:19.606099 ==
2594 16:31:19.612720 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2595 16:31:19.612818
2596 16:31:19.615914 Begin, DQ Scan Range 921~1177
2597 16:31:19.616102
2598 16:31:19.616192
2599 16:31:19.616261 TX Vref Scan disable
2600 16:31:19.618951 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2601 16:31:19.622024 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2602 16:31:19.625607 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2603 16:31:19.632473 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2604 16:31:19.635485 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2605 16:31:19.639091 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2606 16:31:19.642061 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2607 16:31:19.645792 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2608 16:31:19.648819 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2609 16:31:19.652490 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2610 16:31:19.655570 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2611 16:31:19.659022 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2612 16:31:19.662085 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2613 16:31:19.665780 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2614 16:31:19.668888 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2615 16:31:19.672448 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2616 16:31:19.675290 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2617 16:31:19.678778 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2618 16:31:19.682172 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2619 16:31:19.688753 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2620 16:31:19.691930 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2621 16:31:19.695452 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2622 16:31:19.698431 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2623 16:31:19.702145 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2624 16:31:19.705493 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2625 16:31:19.708484 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2626 16:31:19.712135 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2627 16:31:19.715175 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2628 16:31:19.718774 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2629 16:31:19.721744 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2630 16:31:19.725430 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2631 16:31:19.728475 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2632 16:31:19.732027 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2633 16:31:19.735213 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2634 16:31:19.741888 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2635 16:31:19.744779 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2636 16:31:19.748499 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2637 16:31:19.751593 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2638 16:31:19.755336 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2639 16:31:19.758541 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2640 16:31:19.761529 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2641 16:31:19.764916 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2642 16:31:19.768647 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2643 16:31:19.771562 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2644 16:31:19.774701 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2645 16:31:19.778481 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2646 16:31:19.781697 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2647 16:31:19.784644 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2648 16:31:19.788202 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2649 16:31:19.791824 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2650 16:31:19.795144 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
2651 16:31:19.797867 972 |3 6 12|[0] xxxxxxxx ooxxxxxo [MSB]
2652 16:31:19.801318 973 |3 6 13|[0] xxxxxxxx ooxxxxoo [MSB]
2653 16:31:19.807942 974 |3 6 14|[0] xxxxxxxx oooxoxoo [MSB]
2654 16:31:19.811494 975 |3 6 15|[0] xxxxxxxx oooooxoo [MSB]
2655 16:31:19.814495 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2656 16:31:19.818138 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2657 16:31:19.821319 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2658 16:31:19.825048 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2659 16:31:19.828136 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2660 16:31:19.831192 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
2661 16:31:19.834785 982 |3 6 22|[0] xooooxoo oooooooo [MSB]
2662 16:31:19.837871 987 |3 6 27|[0] oooooooo ooooooox [MSB]
2663 16:31:19.841611 988 |3 6 28|[0] oooooooo ooooooox [MSB]
2664 16:31:19.844896 989 |3 6 29|[0] oooooooo oxooooox [MSB]
2665 16:31:19.848267 990 |3 6 30|[0] oooooooo oxooooox [MSB]
2666 16:31:19.854784 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2667 16:31:19.857822 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2668 16:31:19.861549 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2669 16:31:19.864562 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2670 16:31:19.868343 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2671 16:31:19.871466 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2672 16:31:19.874522 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2673 16:31:19.878190 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2674 16:31:19.881240 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
2675 16:31:19.884291 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2676 16:31:19.887867 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2677 16:31:19.890952 1002 |3 6 42|[0] ooxxooox xxxxxxxx [MSB]
2678 16:31:19.894720 1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
2679 16:31:19.897726 Byte0, DQ PI dly=991, DQM PI dly= 991
2680 16:31:19.904155 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
2681 16:31:19.904251
2682 16:31:19.907639 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
2683 16:31:19.907772
2684 16:31:19.911070 Byte1, DQ PI dly=980, DQM PI dly= 980
2685 16:31:19.914300 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2686 16:31:19.917816
2687 16:31:19.920652 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2688 16:31:19.920771
2689 16:31:19.920887 ==
2690 16:31:19.924176 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2691 16:31:19.927837 fsp= 1, odt_onoff= 1, Byte mode= 0
2692 16:31:19.927932 ==
2693 16:31:19.933902 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2694 16:31:19.934015
2695 16:31:19.937505 Begin, DQ Scan Range 956~1020
2696 16:31:19.937589 Write Rank0 MR14 =0x0
2697 16:31:19.946640
2698 16:31:19.946737 CH=1, VrefRange= 0, VrefLevel = 0
2699 16:31:19.953514 TX Bit0 (984~1000) 17 992, Bit8 (974~985) 12 979,
2700 16:31:19.957210 TX Bit1 (984~998) 15 991, Bit9 (975~984) 10 979,
2701 16:31:19.963764 TX Bit2 (982~997) 16 989, Bit10 (976~987) 12 981,
2702 16:31:19.966916 TX Bit3 (981~993) 13 987, Bit11 (978~988) 11 983,
2703 16:31:19.969962 TX Bit4 (984~999) 16 991, Bit12 (977~988) 12 982,
2704 16:31:19.976707 TX Bit5 (985~999) 15 992, Bit13 (978~988) 11 983,
2705 16:31:19.980378 TX Bit6 (984~998) 15 991, Bit14 (976~988) 13 982,
2706 16:31:19.983265 TX Bit7 (984~998) 15 991, Bit15 (971~981) 11 976,
2707 16:31:19.986992
2708 16:31:19.987111 Write Rank0 MR14 =0x2
2709 16:31:19.996125
2710 16:31:19.996245 CH=1, VrefRange= 0, VrefLevel = 2
2711 16:31:20.002798 TX Bit0 (984~1001) 18 992, Bit8 (974~985) 12 979,
2712 16:31:20.005832 TX Bit1 (984~998) 15 991, Bit9 (975~984) 10 979,
2713 16:31:20.012974 TX Bit2 (982~998) 17 990, Bit10 (976~988) 13 982,
2714 16:31:20.015942 TX Bit3 (980~994) 15 987, Bit11 (977~989) 13 983,
2715 16:31:20.019521 TX Bit4 (984~999) 16 991, Bit12 (976~989) 14 982,
2716 16:31:20.025687 TX Bit5 (985~999) 15 992, Bit13 (977~989) 13 983,
2717 16:31:20.029378 TX Bit6 (984~999) 16 991, Bit14 (976~988) 13 982,
2718 16:31:20.032687 TX Bit7 (984~998) 15 991, Bit15 (970~982) 13 976,
2719 16:31:20.035639
2720 16:31:20.035725 Write Rank0 MR14 =0x4
2721 16:31:20.045473
2722 16:31:20.045600 CH=1, VrefRange= 0, VrefLevel = 4
2723 16:31:20.051733 TX Bit0 (985~1001) 17 993, Bit8 (973~985) 13 979,
2724 16:31:20.055229 TX Bit1 (983~998) 16 990, Bit9 (973~985) 13 979,
2725 16:31:20.061983 TX Bit2 (982~998) 17 990, Bit10 (976~988) 13 982,
2726 16:31:20.064928 TX Bit3 (980~995) 16 987, Bit11 (977~991) 15 984,
2727 16:31:20.068627 TX Bit4 (983~999) 17 991, Bit12 (976~990) 15 983,
2728 16:31:20.075288 TX Bit5 (985~1000) 16 992, Bit13 (977~991) 15 984,
2729 16:31:20.078440 TX Bit6 (984~999) 16 991, Bit14 (976~989) 14 982,
2730 16:31:20.081535 TX Bit7 (983~999) 17 991, Bit15 (970~984) 15 977,
2731 16:31:20.085252
2732 16:31:20.085372 Write Rank0 MR14 =0x6
2733 16:31:20.094747
2734 16:31:20.094862 CH=1, VrefRange= 0, VrefLevel = 6
2735 16:31:20.100856 TX Bit0 (984~1002) 19 993, Bit8 (973~986) 14 979,
2736 16:31:20.104646 TX Bit1 (983~999) 17 991, Bit9 (973~985) 13 979,
2737 16:31:20.111130 TX Bit2 (982~999) 18 990, Bit10 (975~989) 15 982,
2738 16:31:20.114763 TX Bit3 (979~996) 18 987, Bit11 (976~991) 16 983,
2739 16:31:20.117883 TX Bit4 (983~1000) 18 991, Bit12 (976~991) 16 983,
2740 16:31:20.124707 TX Bit5 (985~1000) 16 992, Bit13 (977~991) 15 984,
2741 16:31:20.127759 TX Bit6 (984~999) 16 991, Bit14 (975~990) 16 982,
2742 16:31:20.131397 TX Bit7 (984~999) 16 991, Bit15 (970~984) 15 977,
2743 16:31:20.134260
2744 16:31:20.134341 Write Rank0 MR14 =0x8
2745 16:31:20.144295
2746 16:31:20.144413 CH=1, VrefRange= 0, VrefLevel = 8
2747 16:31:20.150376 TX Bit0 (984~1002) 19 993, Bit8 (972~987) 16 979,
2748 16:31:20.153993 TX Bit1 (982~1000) 19 991, Bit9 (972~986) 15 979,
2749 16:31:20.160445 TX Bit2 (981~999) 19 990, Bit10 (975~990) 16 982,
2750 16:31:20.164339 TX Bit3 (979~997) 19 988, Bit11 (976~991) 16 983,
2751 16:31:20.167444 TX Bit4 (983~1000) 18 991, Bit12 (976~992) 17 984,
2752 16:31:20.173740 TX Bit5 (984~1001) 18 992, Bit13 (977~992) 16 984,
2753 16:31:20.177397 TX Bit6 (983~1000) 18 991, Bit14 (976~992) 17 984,
2754 16:31:20.183619 TX Bit7 (983~999) 17 991, Bit15 (969~985) 17 977,
2755 16:31:20.183754
2756 16:31:20.183861 Write Rank0 MR14 =0xa
2757 16:31:20.194088
2758 16:31:20.197034 CH=1, VrefRange= 0, VrefLevel = 10
2759 16:31:20.200679 TX Bit0 (984~1002) 19 993, Bit8 (972~987) 16 979,
2760 16:31:20.203733 TX Bit1 (982~1000) 19 991, Bit9 (972~986) 15 979,
2761 16:31:20.210674 TX Bit2 (981~999) 19 990, Bit10 (975~990) 16 982,
2762 16:31:20.213714 TX Bit3 (979~997) 19 988, Bit11 (976~991) 16 983,
2763 16:31:20.217347 TX Bit4 (983~1000) 18 991, Bit12 (976~992) 17 984,
2764 16:31:20.223673 TX Bit5 (984~1001) 18 992, Bit13 (977~992) 16 984,
2765 16:31:20.226777 TX Bit6 (983~1000) 18 991, Bit14 (976~992) 17 984,
2766 16:31:20.233624 TX Bit7 (983~999) 17 991, Bit15 (969~985) 17 977,
2767 16:31:20.233718
2768 16:31:20.233790 Write Rank0 MR14 =0xc
2769 16:31:20.244019
2770 16:31:20.244141 CH=1, VrefRange= 0, VrefLevel = 12
2771 16:31:20.250547 TX Bit0 (983~1004) 22 993, Bit8 (971~988) 18 979,
2772 16:31:20.253673 TX Bit1 (982~1001) 20 991, Bit9 (972~987) 16 979,
2773 16:31:20.260594 TX Bit2 (980~1000) 21 990, Bit10 (975~992) 18 983,
2774 16:31:20.263826 TX Bit3 (978~998) 21 988, Bit11 (975~992) 18 983,
2775 16:31:20.267048 TX Bit4 (982~1002) 21 992, Bit12 (975~993) 19 984,
2776 16:31:20.273942 TX Bit5 (984~1002) 19 993, Bit13 (976~992) 17 984,
2777 16:31:20.276925 TX Bit6 (983~1001) 19 992, Bit14 (974~992) 19 983,
2778 16:31:20.283578 TX Bit7 (983~1000) 18 991, Bit15 (969~985) 17 977,
2779 16:31:20.283671
2780 16:31:20.283743 Write Rank0 MR14 =0xe
2781 16:31:20.293968
2782 16:31:20.297118 CH=1, VrefRange= 0, VrefLevel = 14
2783 16:31:20.300730 TX Bit0 (983~1004) 22 993, Bit8 (971~989) 19 980,
2784 16:31:20.303744 TX Bit1 (981~1001) 21 991, Bit9 (972~988) 17 980,
2785 16:31:20.310855 TX Bit2 (979~1000) 22 989, Bit10 (974~992) 19 983,
2786 16:31:20.314026 TX Bit3 (978~998) 21 988, Bit11 (975~992) 18 983,
2787 16:31:20.317110 TX Bit4 (982~1002) 21 992, Bit12 (975~993) 19 984,
2788 16:31:20.323777 TX Bit5 (984~1003) 20 993, Bit13 (976~993) 18 984,
2789 16:31:20.326880 TX Bit6 (982~1002) 21 992, Bit14 (974~993) 20 983,
2790 16:31:20.333643 TX Bit7 (982~1001) 20 991, Bit15 (969~986) 18 977,
2791 16:31:20.333736
2792 16:31:20.333808 Write Rank0 MR14 =0x10
2793 16:31:20.344549
2794 16:31:20.347586 CH=1, VrefRange= 0, VrefLevel = 16
2795 16:31:20.350878 TX Bit0 (983~1005) 23 994, Bit8 (971~989) 19 980,
2796 16:31:20.354184 TX Bit1 (981~1002) 22 991, Bit9 (971~988) 18 979,
2797 16:31:20.360904 TX Bit2 (979~1001) 23 990, Bit10 (974~992) 19 983,
2798 16:31:20.364555 TX Bit3 (978~999) 22 988, Bit11 (975~993) 19 984,
2799 16:31:20.367581 TX Bit4 (981~1002) 22 991, Bit12 (974~993) 20 983,
2800 16:31:20.374095 TX Bit5 (983~1003) 21 993, Bit13 (976~993) 18 984,
2801 16:31:20.377626 TX Bit6 (982~1002) 21 992, Bit14 (974~993) 20 983,
2802 16:31:20.384263 TX Bit7 (982~1001) 20 991, Bit15 (969~986) 18 977,
2803 16:31:20.384358
2804 16:31:20.384431 Write Rank0 MR14 =0x12
2805 16:31:20.394826
2806 16:31:20.398539 CH=1, VrefRange= 0, VrefLevel = 18
2807 16:31:20.401598 TX Bit0 (982~1005) 24 993, Bit8 (971~991) 21 981,
2808 16:31:20.404745 TX Bit1 (981~1002) 22 991, Bit9 (971~989) 19 980,
2809 16:31:20.411473 TX Bit2 (979~1002) 24 990, Bit10 (973~993) 21 983,
2810 16:31:20.414456 TX Bit3 (978~998) 21 988, Bit11 (975~993) 19 984,
2811 16:31:20.418201 TX Bit4 (981~1003) 23 992, Bit12 (974~994) 21 984,
2812 16:31:20.424417 TX Bit5 (983~1003) 21 993, Bit13 (976~993) 18 984,
2813 16:31:20.428048 TX Bit6 (981~1003) 23 992, Bit14 (974~993) 20 983,
2814 16:31:20.434531 TX Bit7 (982~1002) 21 992, Bit15 (968~987) 20 977,
2815 16:31:20.434623
2816 16:31:20.434697 Write Rank0 MR14 =0x14
2817 16:31:20.445520
2818 16:31:20.445611 CH=1, VrefRange= 0, VrefLevel = 20
2819 16:31:20.452158 TX Bit0 (982~1006) 25 994, Bit8 (970~991) 22 980,
2820 16:31:20.455854 TX Bit1 (980~1003) 24 991, Bit9 (971~989) 19 980,
2821 16:31:20.462370 TX Bit2 (979~1002) 24 990, Bit10 (973~993) 21 983,
2822 16:31:20.465629 TX Bit3 (978~999) 22 988, Bit11 (974~994) 21 984,
2823 16:31:20.468589 TX Bit4 (981~1004) 24 992, Bit12 (973~994) 22 983,
2824 16:31:20.475367 TX Bit5 (983~1004) 22 993, Bit13 (975~994) 20 984,
2825 16:31:20.478631 TX Bit6 (981~1003) 23 992, Bit14 (974~994) 21 984,
2826 16:31:20.485354 TX Bit7 (981~1002) 22 991, Bit15 (968~988) 21 978,
2827 16:31:20.485446
2828 16:31:20.485519 Write Rank0 MR14 =0x16
2829 16:31:20.496113
2830 16:31:20.499725 CH=1, VrefRange= 0, VrefLevel = 22
2831 16:31:20.502871 TX Bit0 (981~1006) 26 993, Bit8 (970~991) 22 980,
2832 16:31:20.506121 TX Bit1 (980~1003) 24 991, Bit9 (970~991) 22 980,
2833 16:31:20.512639 TX Bit2 (978~1003) 26 990, Bit10 (972~994) 23 983,
2834 16:31:20.515929 TX Bit3 (977~1000) 24 988, Bit11 (974~993) 20 983,
2835 16:31:20.519333 TX Bit4 (980~1004) 25 992, Bit12 (973~994) 22 983,
2836 16:31:20.526144 TX Bit5 (983~1005) 23 994, Bit13 (975~994) 20 984,
2837 16:31:20.529203 TX Bit6 (981~1004) 24 992, Bit14 (973~994) 22 983,
2838 16:31:20.535972 TX Bit7 (980~1003) 24 991, Bit15 (968~988) 21 978,
2839 16:31:20.536065
2840 16:31:20.536138 Write Rank0 MR14 =0x18
2841 16:31:20.546600
2842 16:31:20.550253 CH=1, VrefRange= 0, VrefLevel = 24
2843 16:31:20.553194 TX Bit0 (982~1006) 25 994, Bit8 (970~992) 23 981,
2844 16:31:20.556835 TX Bit1 (980~1004) 25 992, Bit9 (970~991) 22 980,
2845 16:31:20.563524 TX Bit2 (978~1003) 26 990, Bit10 (972~994) 23 983,
2846 16:31:20.566529 TX Bit3 (977~1000) 24 988, Bit11 (973~994) 22 983,
2847 16:31:20.570126 TX Bit4 (979~1005) 27 992, Bit12 (972~995) 24 983,
2848 16:31:20.576739 TX Bit5 (982~1006) 25 994, Bit13 (975~994) 20 984,
2849 16:31:20.580221 TX Bit6 (981~1005) 25 993, Bit14 (972~995) 24 983,
2850 16:31:20.586507 TX Bit7 (980~1004) 25 992, Bit15 (968~989) 22 978,
2851 16:31:20.586598
2852 16:31:20.590253 wait MRW command Rank0 MR14 =0x1a fired (1)
2853 16:31:20.590345 Write Rank0 MR14 =0x1a
2854 16:31:20.601359
2855 16:31:20.604905 CH=1, VrefRange= 0, VrefLevel = 26
2856 16:31:20.608026 TX Bit0 (981~1007) 27 994, Bit8 (970~992) 23 981,
2857 16:31:20.611718 TX Bit1 (979~1005) 27 992, Bit9 (969~991) 23 980,
2858 16:31:20.618161 TX Bit2 (978~1003) 26 990, Bit10 (971~994) 24 982,
2859 16:31:20.621773 TX Bit3 (977~1000) 24 988, Bit11 (973~995) 23 984,
2860 16:31:20.624707 TX Bit4 (979~1005) 27 992, Bit12 (972~995) 24 983,
2861 16:31:20.631394 TX Bit5 (982~1006) 25 994, Bit13 (975~995) 21 985,
2862 16:31:20.634904 TX Bit6 (979~1005) 27 992, Bit14 (972~995) 24 983,
2863 16:31:20.641523 TX Bit7 (980~1004) 25 992, Bit15 (967~990) 24 978,
2864 16:31:20.641620
2865 16:31:20.641714 Write Rank0 MR14 =0x1c
2866 16:31:20.652107
2867 16:31:20.655742 CH=1, VrefRange= 0, VrefLevel = 28
2868 16:31:20.658766 TX Bit0 (981~1007) 27 994, Bit8 (970~992) 23 981,
2869 16:31:20.662424 TX Bit1 (979~1005) 27 992, Bit9 (970~991) 22 980,
2870 16:31:20.669074 TX Bit2 (978~1003) 26 990, Bit10 (971~994) 24 982,
2871 16:31:20.672173 TX Bit3 (977~1001) 25 989, Bit11 (972~995) 24 983,
2872 16:31:20.675268 TX Bit4 (979~1006) 28 992, Bit12 (971~996) 26 983,
2873 16:31:20.682174 TX Bit5 (982~1006) 25 994, Bit13 (974~995) 22 984,
2874 16:31:20.685497 TX Bit6 (979~1005) 27 992, Bit14 (971~995) 25 983,
2875 16:31:20.691906 TX Bit7 (980~1005) 26 992, Bit15 (967~990) 24 978,
2876 16:31:20.692009
2877 16:31:20.692124 Write Rank0 MR14 =0x1e
2878 16:31:20.702893
2879 16:31:20.706638 CH=1, VrefRange= 0, VrefLevel = 30
2880 16:31:20.709691 TX Bit0 (980~1007) 28 993, Bit8 (969~993) 25 981,
2881 16:31:20.713278 TX Bit1 (978~1006) 29 992, Bit9 (970~992) 23 981,
2882 16:31:20.719923 TX Bit2 (978~1003) 26 990, Bit10 (971~994) 24 982,
2883 16:31:20.723349 TX Bit3 (977~1001) 25 989, Bit11 (972~996) 25 984,
2884 16:31:20.726422 TX Bit4 (980~1006) 27 993, Bit12 (972~995) 24 983,
2885 16:31:20.733132 TX Bit5 (981~1006) 26 993, Bit13 (973~996) 24 984,
2886 16:31:20.740971 TX Bit6 (979~1006) 28 992, Bit14 (972~994) 23 983,
2887 16:31:20.742807 TX Bit7 (979~1006) 28 992, Bit15 (967~988) 22 977,
2888 16:31:20.742898
2889 16:31:20.742969 Write Rank0 MR14 =0x20
2890 16:31:20.753989
2891 16:31:20.757225 CH=1, VrefRange= 0, VrefLevel = 32
2892 16:31:20.760975 TX Bit0 (982~1007) 26 994, Bit8 (969~993) 25 981,
2893 16:31:20.764052 TX Bit1 (979~1006) 28 992, Bit9 (970~992) 23 981,
2894 16:31:20.770789 TX Bit2 (978~1003) 26 990, Bit10 (971~994) 24 982,
2895 16:31:20.773953 TX Bit3 (977~1000) 24 988, Bit11 (971~995) 25 983,
2896 16:31:20.777730 TX Bit4 (980~1006) 27 993, Bit12 (972~994) 23 983,
2897 16:31:20.783894 TX Bit5 (981~1007) 27 994, Bit13 (973~995) 23 984,
2898 16:31:20.787483 TX Bit6 (979~1006) 28 992, Bit14 (972~994) 23 983,
2899 16:31:20.794159 TX Bit7 (979~1006) 28 992, Bit15 (967~989) 23 978,
2900 16:31:20.794255
2901 16:31:20.794350 Write Rank0 MR14 =0x22
2902 16:31:20.805003
2903 16:31:20.805098 CH=1, VrefRange= 0, VrefLevel = 34
2904 16:31:20.811258 TX Bit0 (982~1007) 26 994, Bit8 (969~993) 25 981,
2905 16:31:20.814847 TX Bit1 (979~1006) 28 992, Bit9 (970~992) 23 981,
2906 16:31:20.821126 TX Bit2 (978~1003) 26 990, Bit10 (971~994) 24 982,
2907 16:31:20.824752 TX Bit3 (977~1000) 24 988, Bit11 (971~995) 25 983,
2908 16:31:20.827813 TX Bit4 (980~1006) 27 993, Bit12 (972~994) 23 983,
2909 16:31:20.834406 TX Bit5 (981~1007) 27 994, Bit13 (973~995) 23 984,
2910 16:31:20.838155 TX Bit6 (979~1006) 28 992, Bit14 (972~994) 23 983,
2911 16:31:20.844251 TX Bit7 (979~1006) 28 992, Bit15 (967~989) 23 978,
2912 16:31:20.844346
2913 16:31:20.844440 Write Rank0 MR14 =0x24
2914 16:31:20.855199
2915 16:31:20.858981 CH=1, VrefRange= 0, VrefLevel = 36
2916 16:31:20.862393 TX Bit0 (982~1007) 26 994, Bit8 (969~993) 25 981,
2917 16:31:20.865562 TX Bit1 (979~1006) 28 992, Bit9 (970~992) 23 981,
2918 16:31:20.872364 TX Bit2 (978~1003) 26 990, Bit10 (971~994) 24 982,
2919 16:31:20.875396 TX Bit3 (977~1000) 24 988, Bit11 (971~995) 25 983,
2920 16:31:20.878572 TX Bit4 (980~1006) 27 993, Bit12 (972~994) 23 983,
2921 16:31:20.885410 TX Bit5 (981~1007) 27 994, Bit13 (973~995) 23 984,
2922 16:31:20.889108 TX Bit6 (979~1006) 28 992, Bit14 (972~994) 23 983,
2923 16:31:20.895160 TX Bit7 (979~1006) 28 992, Bit15 (967~989) 23 978,
2924 16:31:20.895251
2925 16:31:20.895322 Write Rank0 MR14 =0x26
2926 16:31:20.906027
2927 16:31:20.909486 CH=1, VrefRange= 0, VrefLevel = 38
2928 16:31:20.912887 TX Bit0 (982~1007) 26 994, Bit8 (969~993) 25 981,
2929 16:31:20.915856 TX Bit1 (979~1006) 28 992, Bit9 (970~992) 23 981,
2930 16:31:20.922988 TX Bit2 (978~1003) 26 990, Bit10 (971~994) 24 982,
2931 16:31:20.925999 TX Bit3 (977~1000) 24 988, Bit11 (971~995) 25 983,
2932 16:31:20.932743 TX Bit4 (980~1006) 27 993, Bit12 (972~994) 23 983,
2933 16:31:20.935770 TX Bit5 (981~1007) 27 994, Bit13 (973~995) 23 984,
2934 16:31:20.938921 TX Bit6 (979~1006) 28 992, Bit14 (972~994) 23 983,
2935 16:31:20.945677 TX Bit7 (979~1006) 28 992, Bit15 (967~989) 23 978,
2936 16:31:20.945768
2937 16:31:20.945838
2938 16:31:20.949437 TX Vref found, early break! 381< 382
2939 16:31:20.952619 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2940 16:31:20.955678 u1DelayCellOfst[0]=7 cells (6 PI)
2941 16:31:20.958738 u1DelayCellOfst[1]=5 cells (4 PI)
2942 16:31:20.962366 u1DelayCellOfst[2]=2 cells (2 PI)
2943 16:31:20.965781 u1DelayCellOfst[3]=0 cells (0 PI)
2944 16:31:20.968746 u1DelayCellOfst[4]=6 cells (5 PI)
2945 16:31:20.972248 u1DelayCellOfst[5]=7 cells (6 PI)
2946 16:31:20.975258 u1DelayCellOfst[6]=5 cells (4 PI)
2947 16:31:20.978932 u1DelayCellOfst[7]=5 cells (4 PI)
2948 16:31:20.982026 Byte0, DQ PI dly=988, DQM PI dly= 991
2949 16:31:20.985655 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2950 16:31:20.985747
2951 16:31:20.988717 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2952 16:31:20.988808
2953 16:31:20.992174 u1DelayCellOfst[8]=3 cells (3 PI)
2954 16:31:20.995197 u1DelayCellOfst[9]=3 cells (3 PI)
2955 16:31:20.998724 u1DelayCellOfst[10]=5 cells (4 PI)
2956 16:31:21.001650 u1DelayCellOfst[11]=6 cells (5 PI)
2957 16:31:21.005312 u1DelayCellOfst[12]=6 cells (5 PI)
2958 16:31:21.008431 u1DelayCellOfst[13]=7 cells (6 PI)
2959 16:31:21.012108 u1DelayCellOfst[14]=6 cells (5 PI)
2960 16:31:21.015173 u1DelayCellOfst[15]=0 cells (0 PI)
2961 16:31:21.018642 Byte1, DQ PI dly=978, DQM PI dly= 981
2962 16:31:21.021931 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2963 16:31:21.022023
2964 16:31:21.025205 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2965 16:31:21.025296
2966 16:31:21.028500 Write Rank0 MR14 =0x20
2967 16:31:21.028590
2968 16:31:21.031559 Final TX Range 0 Vref 32
2969 16:31:21.031650
2970 16:31:21.038728 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2971 16:31:21.038819
2972 16:31:21.045422 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2973 16:31:21.051604 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2974 16:31:21.058306 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2975 16:31:21.062093 Write Rank0 MR3 =0xb0
2976 16:31:21.062184 DramC Write-DBI on
2977 16:31:21.062255 ==
2978 16:31:21.068199 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2979 16:31:21.071876 fsp= 1, odt_onoff= 1, Byte mode= 0
2980 16:31:21.071967 ==
2981 16:31:21.075026 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2982 16:31:21.075116
2983 16:31:21.078619 Begin, DQ Scan Range 701~765
2984 16:31:21.078710
2985 16:31:21.078780
2986 16:31:21.081581 TX Vref Scan disable
2987 16:31:21.085036 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2988 16:31:21.088264 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2989 16:31:21.091577 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2990 16:31:21.095155 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2991 16:31:21.098205 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2992 16:31:21.101830 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2993 16:31:21.104767 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2994 16:31:21.108391 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2995 16:31:21.111372 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2996 16:31:21.115143 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2997 16:31:21.118224 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2998 16:31:21.121260 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2999 16:31:21.124866 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3000 16:31:21.127939 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3001 16:31:21.131427 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3002 16:31:21.134882 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3003 16:31:21.137943 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3004 16:31:21.141301 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3005 16:31:21.147977 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3006 16:31:21.151511 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3007 16:31:21.154443 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3008 16:31:21.158105 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3009 16:31:21.161207 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3010 16:31:21.167923 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3011 16:31:21.170918 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3012 16:31:21.174686 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3013 16:31:21.177637 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3014 16:31:21.181264 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3015 16:31:21.184279 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3016 16:31:21.187373 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3017 16:31:21.190980 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3018 16:31:21.193999 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3019 16:31:21.197463 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3020 16:31:21.200901 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3021 16:31:21.204233 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3022 16:31:21.207359 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3023 16:31:21.210752 751 |2 6 47|[0] oooooooo xxxxxxxx [MSB]
3024 16:31:21.214367 752 |2 6 48|[0] xxxxxxxx xxxxxxxx [MSB]
3025 16:31:21.221178 Byte0, DQ PI dly=737, DQM PI dly= 737
3026 16:31:21.224299 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
3027 16:31:21.224389
3028 16:31:21.227391 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
3029 16:31:21.227491
3030 16:31:21.230556 Byte1, DQ PI dly=725, DQM PI dly= 725
3031 16:31:21.237326 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
3032 16:31:21.237416
3033 16:31:21.240407 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
3034 16:31:21.240497
3035 16:31:21.247835 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3036 16:31:21.253903 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3037 16:31:21.260665 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3038 16:31:21.263998 Write Rank0 MR3 =0x30
3039 16:31:21.264087 DramC Write-DBI off
3040 16:31:21.264158
3041 16:31:21.267445 [DATLAT]
3042 16:31:21.267535 Freq=1600, CH1 RK0, use_rxtx_scan=0
3043 16:31:21.270584
3044 16:31:21.270673 DATLAT Default: 0xf
3045 16:31:21.274157 7, 0xFFFF, sum=0
3046 16:31:21.274248 8, 0xFFFF, sum=0
3047 16:31:21.274320 9, 0xFFFF, sum=0
3048 16:31:21.277086 10, 0xFFFF, sum=0
3049 16:31:21.277176 11, 0xFFFF, sum=0
3050 16:31:21.280902 12, 0xFFFF, sum=0
3051 16:31:21.280993 13, 0xFFFF, sum=0
3052 16:31:21.283868 14, 0x0, sum=1
3053 16:31:21.283959 15, 0x0, sum=2
3054 16:31:21.287536 16, 0x0, sum=3
3055 16:31:21.287676 17, 0x0, sum=4
3056 16:31:21.290530 pattern=2 first_step=14 total pass=5 best_step=16
3057 16:31:21.293757 ==
3058 16:31:21.296960 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3059 16:31:21.300657 fsp= 1, odt_onoff= 1, Byte mode= 0
3060 16:31:21.300747 ==
3061 16:31:21.303734 Start DQ dly to find pass range UseTestEngine =1
3062 16:31:21.307342 x-axis: bit #, y-axis: DQ dly (-127~63)
3063 16:31:21.310368 RX Vref Scan = 1
3064 16:31:21.417630
3065 16:31:21.417759 RX Vref found, early break!
3066 16:31:21.417831
3067 16:31:21.423978 Final RX Vref 11, apply to both rank0 and 1
3068 16:31:21.424070 ==
3069 16:31:21.427752 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3070 16:31:21.430774 fsp= 1, odt_onoff= 1, Byte mode= 0
3071 16:31:21.430864 ==
3072 16:31:21.430936 DQS Delay:
3073 16:31:21.434368 DQS0 = 0, DQS1 = 0
3074 16:31:21.434458 DQM Delay:
3075 16:31:21.437694 DQM0 = 20, DQM1 = 19
3076 16:31:21.437828 DQ Delay:
3077 16:31:21.441088 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16
3078 16:31:21.444427 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =21
3079 16:31:21.447505 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3080 16:31:21.451239 DQ12 =22, DQ13 =21, DQ14 =23, DQ15 =13
3081 16:31:21.451351
3082 16:31:21.451460
3083 16:31:21.451530
3084 16:31:21.454128 [DramC_TX_OE_Calibration] TA2
3085 16:31:21.457748 Original DQ_B0 (3 6) =30, OEN = 27
3086 16:31:21.460878 Original DQ_B1 (3 6) =30, OEN = 27
3087 16:31:21.463990 23, 0x0, End_B0=23 End_B1=23
3088 16:31:21.464080 24, 0x0, End_B0=24 End_B1=24
3089 16:31:21.467645 25, 0x0, End_B0=25 End_B1=25
3090 16:31:21.470751 26, 0x0, End_B0=26 End_B1=26
3091 16:31:21.473803 27, 0x0, End_B0=27 End_B1=27
3092 16:31:21.473888 28, 0x0, End_B0=28 End_B1=28
3093 16:31:21.477475 29, 0x0, End_B0=29 End_B1=29
3094 16:31:21.480510 30, 0x0, End_B0=30 End_B1=30
3095 16:31:21.484369 31, 0xFFFF, End_B0=30 End_B1=30
3096 16:31:21.490648 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3097 16:31:21.494084 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3098 16:31:21.494176
3099 16:31:21.494246
3100 16:31:21.497135 Write Rank0 MR23 =0x3f
3101 16:31:21.497257 [DQSOSC]
3102 16:31:21.506976 [DQSOSCAuto] RK0, (LSB)MR18= 0xbcbc, (MSB)MR19= 0x202, tDQSOscB0 = 450 ps tDQSOscB1 = 450 ps
3103 16:31:21.510692 CH1_RK0: MR19=0x202, MR18=0xBCBC, DQSOSC=450, MR23=63, INC=12, DEC=18
3104 16:31:21.513827 Write Rank0 MR23 =0x3f
3105 16:31:21.513908 [DQSOSC]
3106 16:31:21.523917 [DQSOSCAuto] RK0, (LSB)MR18= 0xc1c1, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
3107 16:31:21.527300 CH1 RK0: MR19=202, MR18=C1C1
3108 16:31:21.530315 [RankSwap] Rank num 2, (Multi 1), Rank 1
3109 16:31:21.530436 Write Rank0 MR2 =0xad
3110 16:31:21.533476 [Write Leveling]
3111 16:31:21.537212 delay byte0 byte1 byte2 byte3
3112 16:31:21.537291
3113 16:31:21.537366 10 0 0
3114 16:31:21.540269 11 0 0
3115 16:31:21.540345 12 0 0
3116 16:31:21.540418 13 0 0
3117 16:31:21.543739 14 0 0
3118 16:31:21.543841 15 0 0
3119 16:31:21.546753 16 0 0
3120 16:31:21.546835 17 0 0
3121 16:31:21.546904 18 0 0
3122 16:31:21.550274 19 0 0
3123 16:31:21.550359 20 0 0
3124 16:31:21.553696 21 0 0
3125 16:31:21.553788 22 0 0
3126 16:31:21.557073 23 0 0
3127 16:31:21.557159 24 0 ff
3128 16:31:21.557237 25 0 ff
3129 16:31:21.560518 26 0 ff
3130 16:31:21.560605 27 0 ff
3131 16:31:21.563348 28 0 ff
3132 16:31:21.563456 29 0 ff
3133 16:31:21.567013 30 0 ff
3134 16:31:21.567095 31 0 ff
3135 16:31:21.570522 32 0 ff
3136 16:31:21.570601 33 0 ff
3137 16:31:21.570668 34 ff ff
3138 16:31:21.573730 35 ff ff
3139 16:31:21.573821 36 ff ff
3140 16:31:21.576656 37 ff ff
3141 16:31:21.576826 38 ff ff
3142 16:31:21.580237 39 ff ff
3143 16:31:21.580344 40 ff ff
3144 16:31:21.583791 pass bytecount = 0xff (0xff: all bytes pass)
3145 16:31:21.583897
3146 16:31:21.587036 DQS0 dly: 34
3147 16:31:21.587137 DQS1 dly: 24
3148 16:31:21.589836 Write Rank0 MR2 =0x2d
3149 16:31:21.593405 [RankSwap] Rank num 2, (Multi 1), Rank 0
3150 16:31:21.596686 Write Rank1 MR1 =0xd6
3151 16:31:21.596819 [Gating]
3152 16:31:21.596941 ==
3153 16:31:21.599922 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3154 16:31:21.603187 fsp= 1, odt_onoff= 1, Byte mode= 0
3155 16:31:21.603388 ==
3156 16:31:21.609749 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3157 16:31:21.613528 3 1 4 |100f 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3158 16:31:21.616708 3 1 8 |3231 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3159 16:31:21.623359 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3160 16:31:21.626613 3 1 16 |2020 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3161 16:31:21.630295 3 1 20 |1111 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3162 16:31:21.636808 3 1 24 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3163 16:31:21.639959 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3164 16:31:21.643689 3 2 0 |3434 2c2b |(10 10)(11 11) |(0 1)(1 0)| 0
3165 16:31:21.646577 3 2 4 |3434 2c2b |(11 0)(11 11) |(1 1)(1 0)| 0
3166 16:31:21.653438 3 2 8 |3c3b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3167 16:31:21.656644 3 2 12 |3d3c 1818 |(11 11)(11 11) |(1 1)(0 0)| 0
3168 16:31:21.660214 3 2 16 |3c3b 303 |(11 11)(11 11) |(1 1)(0 0)| 0
3169 16:31:21.666914 [Byte 0] Lead/lag Transition tap number (1)
3170 16:31:21.670052 3 2 20 |3d3d 3534 |(0 0)(11 11) |(0 0)(0 0)| 0
3171 16:31:21.673429 3 2 24 |908 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
3172 16:31:21.676722 3 2 28 |3b3b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3173 16:31:21.683278 3 3 0 |3b3b 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
3174 16:31:21.686081 3 3 4 |3939 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3175 16:31:21.689908 3 3 8 |706 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3176 16:31:21.696064 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3177 16:31:21.699832 [Byte 0] Lead/lag falling Transition (3, 3, 12)
3178 16:31:21.702886 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3179 16:31:21.709894 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3180 16:31:21.713145 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3181 16:31:21.716181 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3182 16:31:21.722712 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3183 16:31:21.726303 3 4 4 |2928 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3184 16:31:21.729369 3 4 8 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3185 16:31:21.736050 3 4 12 |3d3d 1716 |(11 11)(11 11) |(1 1)(1 1)| 0
3186 16:31:21.739033 3 4 16 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3187 16:31:21.742874 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3188 16:31:21.745673 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3189 16:31:21.752626 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3190 16:31:21.755659 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3191 16:31:21.758786 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3192 16:31:21.765844 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3193 16:31:21.769433 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3194 16:31:21.772416 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3195 16:31:21.779105 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3196 16:31:21.782056 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3197 16:31:21.785645 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3198 16:31:21.791980 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3199 16:31:21.795803 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3200 16:31:21.798549 [Byte 0] Lead/lag Transition tap number (3)
3201 16:31:21.802160 3 6 4 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3202 16:31:21.809076 [Byte 1] Lead/lag falling Transition (3, 6, 4)
3203 16:31:21.812206 3 6 8 |1818 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3204 16:31:21.815262 [Byte 1] Lead/lag Transition tap number (2)
3205 16:31:21.818822 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
3206 16:31:21.822340 [Byte 0]First pass (3, 6, 12)
3207 16:31:21.825242 3 6 16 |4646 808 |(0 0)(11 11) |(0 0)(0 0)| 0
3208 16:31:21.832152 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3209 16:31:21.832808 [Byte 1]First pass (3, 6, 20)
3210 16:31:21.838600 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3211 16:31:21.842270 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3212 16:31:21.845218 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3213 16:31:21.848340 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3214 16:31:21.852092 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3215 16:31:21.858671 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3216 16:31:21.862067 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3217 16:31:21.865262 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3218 16:31:21.868336 All bytes gating window > 1UI, Early break!
3219 16:31:21.868791
3220 16:31:21.872113 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 30)
3221 16:31:21.872564
3222 16:31:21.878688 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
3223 16:31:21.879111
3224 16:31:21.879485
3225 16:31:21.879806
3226 16:31:21.881830 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
3227 16:31:21.882251
3228 16:31:21.885321 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
3229 16:31:21.886111
3230 16:31:21.886774
3231 16:31:21.888244 Write Rank1 MR1 =0x56
3232 16:31:21.888936
3233 16:31:21.891482 best RODT dly(2T, 0.5T) = (2, 2)
3234 16:31:21.891979
3235 16:31:21.895228 best RODT dly(2T, 0.5T) = (2, 3)
3236 16:31:21.895663 ==
3237 16:31:21.898247 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3238 16:31:21.901752 fsp= 1, odt_onoff= 1, Byte mode= 0
3239 16:31:21.901966 ==
3240 16:31:21.907918 Start DQ dly to find pass range UseTestEngine =0
3241 16:31:21.911387 x-axis: bit #, y-axis: DQ dly (-127~63)
3242 16:31:21.911555 RX Vref Scan = 0
3243 16:31:21.915035 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3244 16:31:21.918212 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3245 16:31:21.921331 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3246 16:31:21.924831 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3247 16:31:21.927983 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3248 16:31:21.928098 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3249 16:31:21.931144 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3250 16:31:21.934848 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3251 16:31:21.938367 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3252 16:31:21.941649 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3253 16:31:21.944886 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3254 16:31:21.948146 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3255 16:31:21.951233 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3256 16:31:21.951325 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3257 16:31:21.954356 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3258 16:31:21.957721 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3259 16:31:21.961406 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3260 16:31:21.964851 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3261 16:31:21.968094 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3262 16:31:21.971193 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3263 16:31:21.971285 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3264 16:31:21.974284 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3265 16:31:21.978016 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3266 16:31:21.981134 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3267 16:31:21.984447 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3268 16:31:21.988160 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3269 16:31:21.991165 0, [0] xxxoxxxx xoxxxxxo [MSB]
3270 16:31:21.991257 1, [0] xxooxxxx ooxxxxxo [MSB]
3271 16:31:21.994582 2, [0] xxooxxxo oooxxxxo [MSB]
3272 16:31:21.997703 3, [0] xxoooxxo oooxxxxo [MSB]
3273 16:31:22.000888 4, [0] oxoooxoo oooxoxxo [MSB]
3274 16:31:22.004599 5, [0] oooooooo ooooooxo [MSB]
3275 16:31:22.007606 32, [0] oooooooo ooooooox [MSB]
3276 16:31:22.007699 33, [0] oooooooo ooooooox [MSB]
3277 16:31:22.011225 34, [0] oooooooo ooooooox [MSB]
3278 16:31:22.014156 35, [0] oooxoooo xxooooox [MSB]
3279 16:31:22.017632 36, [0] oooxoooo xxooooox [MSB]
3280 16:31:22.021199 37, [0] ooxxoooo xxooooox [MSB]
3281 16:31:22.024464 38, [0] ooxxoooo xxooooox [MSB]
3282 16:31:22.028144 39, [0] oxxxooox xxooooox [MSB]
3283 16:31:22.028240 40, [0] oxxxxoox xxxoooox [MSB]
3284 16:31:22.031150 41, [0] oxxxxoox xxxxxxox [MSB]
3285 16:31:22.034202 42, [0] xxxxxxxx xxxxxxxx [MSB]
3286 16:31:22.037877 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
3287 16:31:22.041045 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3288 16:31:22.044742 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
3289 16:31:22.047823 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3290 16:31:22.051313 iDelay=42, Bit 4, Center 21 (3 ~ 39) 37
3291 16:31:22.057957 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3292 16:31:22.060909 iDelay=42, Bit 6, Center 22 (4 ~ 41) 38
3293 16:31:22.064315 iDelay=42, Bit 7, Center 20 (2 ~ 38) 37
3294 16:31:22.067716 iDelay=42, Bit 8, Center 17 (1 ~ 34) 34
3295 16:31:22.071045 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
3296 16:31:22.074396 iDelay=42, Bit 10, Center 20 (2 ~ 39) 38
3297 16:31:22.077421 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3298 16:31:22.081175 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3299 16:31:22.084204 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
3300 16:31:22.087305 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
3301 16:31:22.091033 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3302 16:31:22.094096 ==
3303 16:31:22.097725 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3304 16:31:22.100619 fsp= 1, odt_onoff= 1, Byte mode= 0
3305 16:31:22.100714 ==
3306 16:31:22.100810 DQS Delay:
3307 16:31:22.104339 DQS0 = 0, DQS1 = 0
3308 16:31:22.104420 DQM Delay:
3309 16:31:22.107447 DQM0 = 20, DQM1 = 19
3310 16:31:22.107541 DQ Delay:
3311 16:31:22.111050 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3312 16:31:22.114151 DQ4 =21, DQ5 =23, DQ6 =22, DQ7 =20
3313 16:31:22.117222 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3314 16:31:22.120740 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =14
3315 16:31:22.120834
3316 16:31:22.120928
3317 16:31:22.123695 DramC Write-DBI off
3318 16:31:22.123789 ==
3319 16:31:22.127347 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3320 16:31:22.130454 fsp= 1, odt_onoff= 1, Byte mode= 0
3321 16:31:22.130547 ==
3322 16:31:22.133950 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3323 16:31:22.137022
3324 16:31:22.137116 Begin, DQ Scan Range 920~1176
3325 16:31:22.137210
3326 16:31:22.137299
3327 16:31:22.140646 TX Vref Scan disable
3328 16:31:22.144342 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
3329 16:31:22.147506 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3330 16:31:22.150413 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3331 16:31:22.153790 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3332 16:31:22.157485 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3333 16:31:22.160554 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3334 16:31:22.163725 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3335 16:31:22.170351 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3336 16:31:22.173707 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3337 16:31:22.177163 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3338 16:31:22.180610 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3339 16:31:22.183427 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3340 16:31:22.186805 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3341 16:31:22.190501 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3342 16:31:22.193553 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3343 16:31:22.197211 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3344 16:31:22.200350 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3345 16:31:22.203439 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3346 16:31:22.207091 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3347 16:31:22.210077 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3348 16:31:22.213155 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3349 16:31:22.219996 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3350 16:31:22.223142 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3351 16:31:22.226720 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3352 16:31:22.230247 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3353 16:31:22.233303 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3354 16:31:22.236747 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3355 16:31:22.239672 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3356 16:31:22.243170 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3357 16:31:22.246231 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3358 16:31:22.249984 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3359 16:31:22.253168 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3360 16:31:22.256233 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3361 16:31:22.259648 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3362 16:31:22.263103 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3363 16:31:22.269845 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3364 16:31:22.272932 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3365 16:31:22.276243 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3366 16:31:22.279735 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3367 16:31:22.282615 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3368 16:31:22.286095 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3369 16:31:22.289465 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3370 16:31:22.292713 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3371 16:31:22.296001 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3372 16:31:22.299260 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3373 16:31:22.302845 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3374 16:31:22.305941 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3375 16:31:22.309471 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3376 16:31:22.312350 968 |3 6 8|[0] xxxxxxxx oxxxxxxo [MSB]
3377 16:31:22.316048 969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]
3378 16:31:22.319215 970 |3 6 10|[0] xxxxxxxx oooxxooo [MSB]
3379 16:31:22.322248 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3380 16:31:22.325961 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3381 16:31:22.329123 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3382 16:31:22.335660 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3383 16:31:22.339345 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3384 16:31:22.342340 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3385 16:31:22.345836 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3386 16:31:22.348809 978 |3 6 18|[0] xooooxxx oooooooo [MSB]
3387 16:31:22.352587 979 |3 6 19|[0] ooooooox oooooooo [MSB]
3388 16:31:22.355670 985 |3 6 25|[0] oooooooo ooooooox [MSB]
3389 16:31:22.358731 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3390 16:31:22.362279 987 |3 6 27|[0] oooooooo ooooooox [MSB]
3391 16:31:22.365847 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
3392 16:31:22.368930 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
3393 16:31:22.372130 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3394 16:31:22.378821 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3395 16:31:22.382468 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3396 16:31:22.385520 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3397 16:31:22.388744 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3398 16:31:22.392238 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3399 16:31:22.395893 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3400 16:31:22.398860 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3401 16:31:22.402569 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3402 16:31:22.405559 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3403 16:31:22.408904 1000 |3 6 40|[0] ooxxooox xxxxxxxx [MSB]
3404 16:31:22.412310 1001 |3 6 41|[0] oxxxxoxx xxxxxxxx [MSB]
3405 16:31:22.415799 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
3406 16:31:22.418841 Byte0, DQ PI dly=988, DQM PI dly= 988
3407 16:31:22.425590 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3408 16:31:22.425682
3409 16:31:22.428764 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3410 16:31:22.428856
3411 16:31:22.432526 Byte1, DQ PI dly=977, DQM PI dly= 977
3412 16:31:22.435648 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3413 16:31:22.435739
3414 16:31:22.442364 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3415 16:31:22.442456
3416 16:31:22.442528 ==
3417 16:31:22.445404 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3418 16:31:22.448967 fsp= 1, odt_onoff= 1, Byte mode= 0
3419 16:31:22.449058 ==
3420 16:31:22.455399 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3421 16:31:22.455500
3422 16:31:22.455572 Begin, DQ Scan Range 953~1017
3423 16:31:22.458526 Write Rank1 MR14 =0x0
3424 16:31:22.467781
3425 16:31:22.467872 CH=1, VrefRange= 0, VrefLevel = 0
3426 16:31:22.474385 TX Bit0 (982~998) 17 990, Bit8 (970~984) 15 977,
3427 16:31:22.478065 TX Bit1 (981~996) 16 988, Bit9 (970~984) 15 977,
3428 16:31:22.484764 TX Bit2 (979~993) 15 986, Bit10 (974~985) 12 979,
3429 16:31:22.487841 TX Bit3 (978~990) 13 984, Bit11 (974~986) 13 980,
3430 16:31:22.490939 TX Bit4 (981~995) 15 988, Bit12 (974~984) 11 979,
3431 16:31:22.497654 TX Bit5 (983~998) 16 990, Bit13 (975~986) 12 980,
3432 16:31:22.501304 TX Bit6 (982~997) 16 989, Bit14 (973~984) 12 978,
3433 16:31:22.504306 TX Bit7 (984~994) 11 989, Bit15 (968~978) 11 973,
3434 16:31:22.504398
3435 16:31:22.507424 Write Rank1 MR14 =0x2
3436 16:31:22.516962
3437 16:31:22.517048 CH=1, VrefRange= 0, VrefLevel = 2
3438 16:31:22.523912 TX Bit0 (982~998) 17 990, Bit8 (970~984) 15 977,
3439 16:31:22.526939 TX Bit1 (980~997) 18 988, Bit9 (970~984) 15 977,
3440 16:31:22.533691 TX Bit2 (979~995) 17 987, Bit10 (972~985) 14 978,
3441 16:31:22.536714 TX Bit3 (978~991) 14 984, Bit11 (974~986) 13 980,
3442 16:31:22.540401 TX Bit4 (980~997) 18 988, Bit12 (974~985) 12 979,
3443 16:31:22.546923 TX Bit5 (982~998) 17 990, Bit13 (974~987) 14 980,
3444 16:31:22.550480 TX Bit6 (982~997) 16 989, Bit14 (973~985) 13 979,
3445 16:31:22.553550 TX Bit7 (983~995) 13 989, Bit15 (968~979) 12 973,
3446 16:31:22.553631
3447 16:31:22.557116 Write Rank1 MR14 =0x4
3448 16:31:22.566024
3449 16:31:22.566117 CH=1, VrefRange= 0, VrefLevel = 4
3450 16:31:22.573161 TX Bit0 (982~999) 18 990, Bit8 (969~984) 16 976,
3451 16:31:22.576234 TX Bit1 (980~998) 19 989, Bit9 (970~984) 15 977,
3452 16:31:22.583210 TX Bit2 (979~995) 17 987, Bit10 (972~986) 15 979,
3453 16:31:22.586404 TX Bit3 (978~992) 15 985, Bit11 (973~987) 15 980,
3454 16:31:22.589491 TX Bit4 (980~998) 19 989, Bit12 (972~986) 15 979,
3455 16:31:22.596187 TX Bit5 (982~999) 18 990, Bit13 (974~988) 15 981,
3456 16:31:22.599312 TX Bit6 (981~998) 18 989, Bit14 (974~985) 12 979,
3457 16:31:22.602914 TX Bit7 (983~995) 13 989, Bit15 (967~980) 14 973,
3458 16:31:22.603006
3459 16:31:22.605855 Write Rank1 MR14 =0x6
3460 16:31:22.615783
3461 16:31:22.615874 CH=1, VrefRange= 0, VrefLevel = 6
3462 16:31:22.622254 TX Bit0 (981~999) 19 990, Bit8 (969~985) 17 977,
3463 16:31:22.625396 TX Bit1 (980~998) 19 989, Bit9 (970~985) 16 977,
3464 16:31:22.631901 TX Bit2 (978~996) 19 987, Bit10 (972~986) 15 979,
3465 16:31:22.635339 TX Bit3 (978~993) 16 985, Bit11 (972~988) 17 980,
3466 16:31:22.638889 TX Bit4 (980~998) 19 989, Bit12 (972~986) 15 979,
3467 16:31:22.644957 TX Bit5 (982~999) 18 990, Bit13 (972~988) 17 980,
3468 16:31:22.648575 TX Bit6 (980~999) 20 989, Bit14 (973~986) 14 979,
3469 16:31:22.651640 TX Bit7 (982~997) 16 989, Bit15 (967~981) 15 974,
3470 16:31:22.655309
3471 16:31:22.658286 wait MRW command Rank1 MR14 =0x8 fired (1)
3472 16:31:22.658378 Write Rank1 MR14 =0x8
3473 16:31:22.668948
3474 16:31:22.669039 CH=1, VrefRange= 0, VrefLevel = 8
3475 16:31:22.675443 TX Bit0 (981~1000) 20 990, Bit8 (969~985) 17 977,
3476 16:31:22.678451 TX Bit1 (979~998) 20 988, Bit9 (969~985) 17 977,
3477 16:31:22.685337 TX Bit2 (978~997) 20 987, Bit10 (972~987) 16 979,
3478 16:31:22.688459 TX Bit3 (977~993) 17 985, Bit11 (973~989) 17 981,
3479 16:31:22.692204 TX Bit4 (979~998) 20 988, Bit12 (972~987) 16 979,
3480 16:31:22.698390 TX Bit5 (981~999) 19 990, Bit13 (973~989) 17 981,
3481 16:31:22.702077 TX Bit6 (980~999) 20 989, Bit14 (971~987) 17 979,
3482 16:31:22.708210 TX Bit7 (982~998) 17 990, Bit15 (967~983) 17 975,
3483 16:31:22.708302
3484 16:31:22.708375 Write Rank1 MR14 =0xa
3485 16:31:22.718363
3486 16:31:22.721659 CH=1, VrefRange= 0, VrefLevel = 10
3487 16:31:22.725092 TX Bit0 (980~1000) 21 990, Bit8 (969~986) 18 977,
3488 16:31:22.728334 TX Bit1 (980~999) 20 989, Bit9 (969~985) 17 977,
3489 16:31:22.735069 TX Bit2 (978~998) 21 988, Bit10 (971~987) 17 979,
3490 16:31:22.738185 TX Bit3 (978~994) 17 986, Bit11 (972~989) 18 980,
3491 16:31:22.741255 TX Bit4 (979~999) 21 989, Bit12 (971~988) 18 979,
3492 16:31:22.747832 TX Bit5 (980~1000) 21 990, Bit13 (972~990) 19 981,
3493 16:31:22.751335 TX Bit6 (980~999) 20 989, Bit14 (971~987) 17 979,
3494 16:31:22.757787 TX Bit7 (981~998) 18 989, Bit15 (967~983) 17 975,
3495 16:31:22.757888
3496 16:31:22.757961 Write Rank1 MR14 =0xc
3497 16:31:22.768144
3498 16:31:22.771226 CH=1, VrefRange= 0, VrefLevel = 12
3499 16:31:22.774742 TX Bit0 (980~1001) 22 990, Bit8 (969~986) 18 977,
3500 16:31:22.778231 TX Bit1 (979~999) 21 989, Bit9 (969~986) 18 977,
3501 16:31:22.784464 TX Bit2 (978~998) 21 988, Bit10 (970~988) 19 979,
3502 16:31:22.787956 TX Bit3 (977~994) 18 985, Bit11 (972~990) 19 981,
3503 16:31:22.791107 TX Bit4 (978~999) 22 988, Bit12 (971~989) 19 980,
3504 16:31:22.797978 TX Bit5 (980~1000) 21 990, Bit13 (972~991) 20 981,
3505 16:31:22.801151 TX Bit6 (979~1000) 22 989, Bit14 (971~988) 18 979,
3506 16:31:22.808076 TX Bit7 (980~999) 20 989, Bit15 (966~984) 19 975,
3507 16:31:22.808169
3508 16:31:22.808241 Write Rank1 MR14 =0xe
3509 16:31:22.817977
3510 16:31:22.821581 CH=1, VrefRange= 0, VrefLevel = 14
3511 16:31:22.824541 TX Bit0 (980~1001) 22 990, Bit8 (968~987) 20 977,
3512 16:31:22.828161 TX Bit1 (979~1000) 22 989, Bit9 (969~986) 18 977,
3513 16:31:22.834735 TX Bit2 (977~998) 22 987, Bit10 (971~989) 19 980,
3514 16:31:22.837701 TX Bit3 (976~995) 20 985, Bit11 (971~991) 21 981,
3515 16:31:22.841118 TX Bit4 (978~999) 22 988, Bit12 (971~990) 20 980,
3516 16:31:22.847847 TX Bit5 (980~1001) 22 990, Bit13 (971~991) 21 981,
3517 16:31:22.850906 TX Bit6 (979~1000) 22 989, Bit14 (971~989) 19 980,
3518 16:31:22.857562 TX Bit7 (980~999) 20 989, Bit15 (966~984) 19 975,
3519 16:31:22.857695
3520 16:31:22.857800 Write Rank1 MR14 =0x10
3521 16:31:22.868306
3522 16:31:22.871355 CH=1, VrefRange= 0, VrefLevel = 16
3523 16:31:22.874553 TX Bit0 (980~1002) 23 991, Bit8 (968~987) 20 977,
3524 16:31:22.878372 TX Bit1 (979~1000) 22 989, Bit9 (968~986) 19 977,
3525 16:31:22.884618 TX Bit2 (977~999) 23 988, Bit10 (970~989) 20 979,
3526 16:31:22.887973 TX Bit3 (976~997) 22 986, Bit11 (971~991) 21 981,
3527 16:31:22.891606 TX Bit4 (978~1000) 23 989, Bit12 (970~990) 21 980,
3528 16:31:22.898198 TX Bit5 (979~1001) 23 990, Bit13 (971~991) 21 981,
3529 16:31:22.901525 TX Bit6 (978~1000) 23 989, Bit14 (970~990) 21 980,
3530 16:31:22.907820 TX Bit7 (980~999) 20 989, Bit15 (965~984) 20 974,
3531 16:31:22.907912
3532 16:31:22.907984 Write Rank1 MR14 =0x12
3533 16:31:22.918685
3534 16:31:22.921739 CH=1, VrefRange= 0, VrefLevel = 18
3535 16:31:22.924980 TX Bit0 (979~1002) 24 990, Bit8 (968~988) 21 978,
3536 16:31:22.928407 TX Bit1 (978~1000) 23 989, Bit9 (968~987) 20 977,
3537 16:31:22.935313 TX Bit2 (977~999) 23 988, Bit10 (970~990) 21 980,
3538 16:31:22.938444 TX Bit3 (976~997) 22 986, Bit11 (970~991) 22 980,
3539 16:31:22.941676 TX Bit4 (978~1000) 23 989, Bit12 (970~991) 22 980,
3540 16:31:22.948363 TX Bit5 (979~1002) 24 990, Bit13 (970~992) 23 981,
3541 16:31:22.951746 TX Bit6 (978~1000) 23 989, Bit14 (970~990) 21 980,
3542 16:31:22.958648 TX Bit7 (979~999) 21 989, Bit15 (965~985) 21 975,
3543 16:31:22.958740
3544 16:31:22.961984 wait MRW command Rank1 MR14 =0x14 fired (1)
3545 16:31:22.962075 Write Rank1 MR14 =0x14
3546 16:31:22.972850
3547 16:31:22.976335 CH=1, VrefRange= 0, VrefLevel = 20
3548 16:31:22.979233 TX Bit0 (979~1002) 24 990, Bit8 (968~989) 22 978,
3549 16:31:22.982888 TX Bit1 (978~1001) 24 989, Bit9 (968~988) 21 978,
3550 16:31:22.989525 TX Bit2 (977~999) 23 988, Bit10 (969~991) 23 980,
3551 16:31:22.992834 TX Bit3 (976~997) 22 986, Bit11 (970~992) 23 981,
3552 16:31:22.995831 TX Bit4 (978~1001) 24 989, Bit12 (970~991) 22 980,
3553 16:31:23.002456 TX Bit5 (979~1002) 24 990, Bit13 (970~992) 23 981,
3554 16:31:23.006056 TX Bit6 (978~1001) 24 989, Bit14 (970~991) 22 980,
3555 16:31:23.012544 TX Bit7 (979~1000) 22 989, Bit15 (965~985) 21 975,
3556 16:31:23.012673
3557 16:31:23.012754 Write Rank1 MR14 =0x16
3558 16:31:23.023314
3559 16:31:23.026397 CH=1, VrefRange= 0, VrefLevel = 22
3560 16:31:23.030125 TX Bit0 (978~1003) 26 990, Bit8 (968~989) 22 978,
3561 16:31:23.033171 TX Bit1 (978~1001) 24 989, Bit9 (968~989) 22 978,
3562 16:31:23.040221 TX Bit2 (977~1000) 24 988, Bit10 (969~991) 23 980,
3563 16:31:23.043348 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3564 16:31:23.046624 TX Bit4 (978~1001) 24 989, Bit12 (970~991) 22 980,
3565 16:31:23.053336 TX Bit5 (979~1003) 25 991, Bit13 (970~992) 23 981,
3566 16:31:23.056630 TX Bit6 (978~1002) 25 990, Bit14 (970~991) 22 980,
3567 16:31:23.063293 TX Bit7 (979~1000) 22 989, Bit15 (965~986) 22 975,
3568 16:31:23.063426
3569 16:31:23.063523 Write Rank1 MR14 =0x18
3570 16:31:23.074389
3571 16:31:23.074480 CH=1, VrefRange= 0, VrefLevel = 24
3572 16:31:23.080676 TX Bit0 (978~1004) 27 991, Bit8 (967~990) 24 978,
3573 16:31:23.084204 TX Bit1 (978~1002) 25 990, Bit9 (968~989) 22 978,
3574 16:31:23.091123 TX Bit2 (977~1000) 24 988, Bit10 (969~991) 23 980,
3575 16:31:23.094410 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3576 16:31:23.097477 TX Bit4 (978~1002) 25 990, Bit12 (970~992) 23 981,
3577 16:31:23.104160 TX Bit5 (978~1004) 27 991, Bit13 (970~992) 23 981,
3578 16:31:23.107658 TX Bit6 (978~1002) 25 990, Bit14 (970~991) 22 980,
3579 16:31:23.113886 TX Bit7 (979~1001) 23 990, Bit15 (965~986) 22 975,
3580 16:31:23.114006
3581 16:31:23.114110 Write Rank1 MR14 =0x1a
3582 16:31:23.125266
3583 16:31:23.128357 CH=1, VrefRange= 0, VrefLevel = 26
3584 16:31:23.131416 TX Bit0 (978~1004) 27 991, Bit8 (967~991) 25 979,
3585 16:31:23.135215 TX Bit1 (978~1002) 25 990, Bit9 (967~990) 24 978,
3586 16:31:23.141945 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
3587 16:31:23.145051 TX Bit3 (975~998) 24 986, Bit11 (969~992) 24 980,
3588 16:31:23.148044 TX Bit4 (978~1002) 25 990, Bit12 (970~992) 23 981,
3589 16:31:23.154848 TX Bit5 (978~1004) 27 991, Bit13 (970~992) 23 981,
3590 16:31:23.157962 TX Bit6 (978~1003) 26 990, Bit14 (969~992) 24 980,
3591 16:31:23.164782 TX Bit7 (979~1001) 23 990, Bit15 (963~987) 25 975,
3592 16:31:23.164875
3593 16:31:23.164947 Write Rank1 MR14 =0x1c
3594 16:31:23.175991
3595 16:31:23.179013 CH=1, VrefRange= 0, VrefLevel = 28
3596 16:31:23.182722 TX Bit0 (978~1004) 27 991, Bit8 (967~991) 25 979,
3597 16:31:23.185766 TX Bit1 (977~1003) 27 990, Bit9 (967~990) 24 978,
3598 16:31:23.192670 TX Bit2 (976~1001) 26 988, Bit10 (969~992) 24 980,
3599 16:31:23.195884 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3600 16:31:23.199054 TX Bit4 (978~1003) 26 990, Bit12 (969~992) 24 980,
3601 16:31:23.205707 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3602 16:31:23.209155 TX Bit6 (978~1003) 26 990, Bit14 (969~992) 24 980,
3603 16:31:23.215699 TX Bit7 (978~1002) 25 990, Bit15 (963~987) 25 975,
3604 16:31:23.215808
3605 16:31:23.215883 Write Rank1 MR14 =0x1e
3606 16:31:23.226927
3607 16:31:23.230345 CH=1, VrefRange= 0, VrefLevel = 30
3608 16:31:23.233874 TX Bit0 (978~1005) 28 991, Bit8 (966~990) 25 978,
3609 16:31:23.236851 TX Bit1 (977~1003) 27 990, Bit9 (967~990) 24 978,
3610 16:31:23.243596 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3611 16:31:23.246774 TX Bit3 (974~999) 26 986, Bit11 (969~993) 25 981,
3612 16:31:23.249919 TX Bit4 (978~1003) 26 990, Bit12 (969~993) 25 981,
3613 16:31:23.256832 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3614 16:31:23.260040 TX Bit6 (978~1004) 27 991, Bit14 (969~993) 25 981,
3615 16:31:23.266885 TX Bit7 (978~1002) 25 990, Bit15 (962~987) 26 974,
3616 16:31:23.266977
3617 16:31:23.267048 Write Rank1 MR14 =0x20
3618 16:31:23.278019
3619 16:31:23.278111 CH=1, VrefRange= 0, VrefLevel = 32
3620 16:31:23.284443 TX Bit0 (978~1005) 28 991, Bit8 (966~990) 25 978,
3621 16:31:23.287575 TX Bit1 (977~1003) 27 990, Bit9 (967~990) 24 978,
3622 16:31:23.294590 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3623 16:31:23.297792 TX Bit3 (974~999) 26 986, Bit11 (969~993) 25 981,
3624 16:31:23.300890 TX Bit4 (978~1003) 26 990, Bit12 (969~993) 25 981,
3625 16:31:23.307831 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3626 16:31:23.310936 TX Bit6 (978~1004) 27 991, Bit14 (969~993) 25 981,
3627 16:31:23.317707 TX Bit7 (978~1002) 25 990, Bit15 (962~987) 26 974,
3628 16:31:23.317834
3629 16:31:23.317943 Write Rank1 MR14 =0x22
3630 16:31:23.328618
3631 16:31:23.332135 CH=1, VrefRange= 0, VrefLevel = 34
3632 16:31:23.335115 TX Bit0 (978~1005) 28 991, Bit8 (966~990) 25 978,
3633 16:31:23.338699 TX Bit1 (977~1003) 27 990, Bit9 (967~990) 24 978,
3634 16:31:23.345038 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3635 16:31:23.348557 TX Bit3 (974~999) 26 986, Bit11 (969~993) 25 981,
3636 16:31:23.352207 TX Bit4 (978~1003) 26 990, Bit12 (969~993) 25 981,
3637 16:31:23.358438 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3638 16:31:23.362158 TX Bit6 (978~1004) 27 991, Bit14 (969~993) 25 981,
3639 16:31:23.368628 TX Bit7 (978~1002) 25 990, Bit15 (962~987) 26 974,
3640 16:31:23.368713
3641 16:31:23.368782 Write Rank1 MR14 =0x24
3642 16:31:23.379603
3643 16:31:23.382673 CH=1, VrefRange= 0, VrefLevel = 36
3644 16:31:23.385750 TX Bit0 (978~1005) 28 991, Bit8 (966~990) 25 978,
3645 16:31:23.389224 TX Bit1 (977~1003) 27 990, Bit9 (967~990) 24 978,
3646 16:31:23.396056 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3647 16:31:23.399174 TX Bit3 (974~999) 26 986, Bit11 (969~993) 25 981,
3648 16:31:23.402725 TX Bit4 (978~1003) 26 990, Bit12 (969~993) 25 981,
3649 16:31:23.409364 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3650 16:31:23.412531 TX Bit6 (978~1004) 27 991, Bit14 (969~993) 25 981,
3651 16:31:23.419361 TX Bit7 (978~1002) 25 990, Bit15 (962~987) 26 974,
3652 16:31:23.419452
3653 16:31:23.419521
3654 16:31:23.422362 TX Vref found, early break! 384< 388
3655 16:31:23.426036 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3656 16:31:23.429134 u1DelayCellOfst[0]=6 cells (5 PI)
3657 16:31:23.432729 u1DelayCellOfst[1]=5 cells (4 PI)
3658 16:31:23.435736 u1DelayCellOfst[2]=3 cells (3 PI)
3659 16:31:23.439245 u1DelayCellOfst[3]=0 cells (0 PI)
3660 16:31:23.442742 u1DelayCellOfst[4]=5 cells (4 PI)
3661 16:31:23.445798 u1DelayCellOfst[5]=6 cells (5 PI)
3662 16:31:23.449228 u1DelayCellOfst[6]=6 cells (5 PI)
3663 16:31:23.449319 u1DelayCellOfst[7]=5 cells (4 PI)
3664 16:31:23.452350 Byte0, DQ PI dly=986, DQM PI dly= 988
3665 16:31:23.459440 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3666 16:31:23.459533
3667 16:31:23.462738 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3668 16:31:23.462830
3669 16:31:23.465962 u1DelayCellOfst[8]=5 cells (4 PI)
3670 16:31:23.469509 u1DelayCellOfst[9]=5 cells (4 PI)
3671 16:31:23.472544 u1DelayCellOfst[10]=7 cells (6 PI)
3672 16:31:23.475623 u1DelayCellOfst[11]=9 cells (7 PI)
3673 16:31:23.479220 u1DelayCellOfst[12]=9 cells (7 PI)
3674 16:31:23.482438 u1DelayCellOfst[13]=9 cells (7 PI)
3675 16:31:23.485637 u1DelayCellOfst[14]=9 cells (7 PI)
3676 16:31:23.489426 u1DelayCellOfst[15]=0 cells (0 PI)
3677 16:31:23.492649 Byte1, DQ PI dly=974, DQM PI dly= 977
3678 16:31:23.495662 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 14)
3679 16:31:23.495755
3680 16:31:23.499155 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 14)
3681 16:31:23.499247
3682 16:31:23.502520 Write Rank1 MR14 =0x1e
3683 16:31:23.502612
3684 16:31:23.505673 Final TX Range 0 Vref 30
3685 16:31:23.505766
3686 16:31:23.512542 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3687 16:31:23.512635
3688 16:31:23.518908 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3689 16:31:23.525856 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3690 16:31:23.532032 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3691 16:31:23.532124 Write Rank1 MR3 =0xb0
3692 16:31:23.535269 DramC Write-DBI on
3693 16:31:23.535360 ==
3694 16:31:23.542212 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3695 16:31:23.542304 fsp= 1, odt_onoff= 1, Byte mode= 0
3696 16:31:23.545133 ==
3697 16:31:23.548684 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3698 16:31:23.548776
3699 16:31:23.551772 Begin, DQ Scan Range 697~761
3700 16:31:23.551863
3701 16:31:23.551935
3702 16:31:23.552002 TX Vref Scan disable
3703 16:31:23.555248 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3704 16:31:23.562189 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3705 16:31:23.565380 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3706 16:31:23.568316 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3707 16:31:23.572100 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3708 16:31:23.575059 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3709 16:31:23.578532 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3710 16:31:23.581821 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3711 16:31:23.585448 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3712 16:31:23.588289 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3713 16:31:23.592084 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3714 16:31:23.595270 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3715 16:31:23.598398 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3716 16:31:23.601512 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3717 16:31:23.605100 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3718 16:31:23.608507 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3719 16:31:23.611665 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3720 16:31:23.615324 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3721 16:31:23.618544 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3722 16:31:23.621732 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3723 16:31:23.624919 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3724 16:31:23.631624 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3725 16:31:23.634632 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3726 16:31:23.638323 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3727 16:31:23.641507 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3728 16:31:23.644707 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3729 16:31:23.651622 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3730 16:31:23.654756 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3731 16:31:23.658312 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3732 16:31:23.661809 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3733 16:31:23.664595 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3734 16:31:23.668331 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3735 16:31:23.671554 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3736 16:31:23.674661 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3737 16:31:23.677928 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3738 16:31:23.681170 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3739 16:31:23.684847 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3740 16:31:23.687956 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3741 16:31:23.691717 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3742 16:31:23.694541 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3743 16:31:23.698093 Byte0, DQ PI dly=735, DQM PI dly= 735
3744 16:31:23.704574 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
3745 16:31:23.704666
3746 16:31:23.708299 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
3747 16:31:23.708391
3748 16:31:23.711337 Byte1, DQ PI dly=723, DQM PI dly= 723
3749 16:31:23.714868 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3750 16:31:23.714980
3751 16:31:23.721576 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3752 16:31:23.721668
3753 16:31:23.727619 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3754 16:31:23.734628 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3755 16:31:23.740931 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3756 16:31:23.744780 Write Rank1 MR3 =0x30
3757 16:31:23.744871 DramC Write-DBI off
3758 16:31:23.744942
3759 16:31:23.745007 [DATLAT]
3760 16:31:23.748014 Freq=1600, CH1 RK1, use_rxtx_scan=0
3761 16:31:23.748105
3762 16:31:23.751111 DATLAT Default: 0x10
3763 16:31:23.751212 7, 0xFFFF, sum=0
3764 16:31:23.754853 8, 0xFFFF, sum=0
3765 16:31:23.754945 9, 0xFFFF, sum=0
3766 16:31:23.758163 10, 0xFFFF, sum=0
3767 16:31:23.758255 11, 0xFFFF, sum=0
3768 16:31:23.761143 12, 0xFFFF, sum=0
3769 16:31:23.761235 13, 0xFFFF, sum=0
3770 16:31:23.764278 14, 0x0, sum=1
3771 16:31:23.764369 15, 0x0, sum=2
3772 16:31:23.767936 16, 0x0, sum=3
3773 16:31:23.768035 17, 0x0, sum=4
3774 16:31:23.770934 pattern=2 first_step=14 total pass=5 best_step=16
3775 16:31:23.774359 ==
3776 16:31:23.777940 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3777 16:31:23.780987 fsp= 1, odt_onoff= 1, Byte mode= 0
3778 16:31:23.781098 ==
3779 16:31:23.784784 Start DQ dly to find pass range UseTestEngine =1
3780 16:31:23.787792 x-axis: bit #, y-axis: DQ dly (-127~63)
3781 16:31:23.790910 RX Vref Scan = 0
3782 16:31:23.794171 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3783 16:31:23.797904 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3784 16:31:23.798004 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3785 16:31:23.801030 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3786 16:31:23.804077 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3787 16:31:23.807564 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3788 16:31:23.811144 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3789 16:31:23.814065 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3790 16:31:23.817333 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3791 16:31:23.820570 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3792 16:31:23.824361 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3793 16:31:23.824480 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3794 16:31:23.827392 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3795 16:31:23.830792 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3796 16:31:23.834285 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3797 16:31:23.837296 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3798 16:31:23.841074 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3799 16:31:23.844069 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3800 16:31:23.847779 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3801 16:31:23.847903 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3802 16:31:23.851012 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3803 16:31:23.854111 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3804 16:31:23.857219 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3805 16:31:23.861169 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3806 16:31:23.864342 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3807 16:31:23.867284 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3808 16:31:23.867416 0, [0] xxooxxxx ooxxxxxo [MSB]
3809 16:31:23.871147 1, [0] xxooxxxx ooxxxxxo [MSB]
3810 16:31:23.874084 2, [0] xxooxxxx ooxxxxxo [MSB]
3811 16:31:23.877433 3, [0] oxooxxxo oooxxxxo [MSB]
3812 16:31:23.880981 4, [0] oooooxxo ooooooxo [MSB]
3813 16:31:23.884064 32, [0] oooooooo ooooooox [MSB]
3814 16:31:23.887436 33, [0] oooooooo ooooooox [MSB]
3815 16:31:23.890888 34, [0] oooooooo ooooooox [MSB]
3816 16:31:23.894075 35, [0] oooxoooo oxooooox [MSB]
3817 16:31:23.897162 36, [0] oooxoooo xxooooox [MSB]
3818 16:31:23.897256 37, [0] ooxxoooo xxooooox [MSB]
3819 16:31:23.900365 38, [0] ooxxoooo xxooooox [MSB]
3820 16:31:23.904376 39, [0] ooxxooox xxxoooox [MSB]
3821 16:31:23.907357 40, [0] oxxxxoox xxxoooox [MSB]
3822 16:31:23.910977 41, [0] xxxxxxox xxxxxxxx [MSB]
3823 16:31:23.913985 42, [0] xxxxxxxx xxxxxxxx [MSB]
3824 16:31:23.917574 iDelay=42, Bit 0, Center 21 (3 ~ 40) 38
3825 16:31:23.920740 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
3826 16:31:23.923791 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3827 16:31:23.927359 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3828 16:31:23.930581 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3829 16:31:23.934055 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3830 16:31:23.937373 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3831 16:31:23.940596 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3832 16:31:23.943888 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
3833 16:31:23.947422 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3834 16:31:23.950865 iDelay=42, Bit 10, Center 20 (3 ~ 38) 36
3835 16:31:23.957208 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3836 16:31:23.960371 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3837 16:31:23.964266 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
3838 16:31:23.967316 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3839 16:31:23.970606 iDelay=42, Bit 15, Center 13 (-4 ~ 31) 36
3840 16:31:23.970698 ==
3841 16:31:23.977049 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3842 16:31:23.977170 fsp= 1, odt_onoff= 1, Byte mode= 0
3843 16:31:23.980725 ==
3844 16:31:23.980845 DQS Delay:
3845 16:31:23.980954 DQS0 = 0, DQS1 = 0
3846 16:31:23.983982 DQM Delay:
3847 16:31:23.984106 DQM0 = 20, DQM1 = 19
3848 16:31:23.987134 DQ Delay:
3849 16:31:23.987247 DQ0 =21, DQ1 =21, DQ2 =18, DQ3 =16
3850 16:31:23.990757 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3851 16:31:23.993848 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3852 16:31:23.997177 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =13
3853 16:31:24.000652
3854 16:31:24.000784
3855 16:31:24.000907
3856 16:31:24.001016 [DramC_TX_OE_Calibration] TA2
3857 16:31:24.003934 Original DQ_B0 (3 6) =30, OEN = 27
3858 16:31:24.007012 Original DQ_B1 (3 6) =30, OEN = 27
3859 16:31:24.010137 23, 0x0, End_B0=23 End_B1=23
3860 16:31:24.013805 24, 0x0, End_B0=24 End_B1=24
3861 16:31:24.017026 25, 0x0, End_B0=25 End_B1=25
3862 16:31:24.017138 26, 0x0, End_B0=26 End_B1=26
3863 16:31:24.020137 27, 0x0, End_B0=27 End_B1=27
3864 16:31:24.023261 28, 0x0, End_B0=28 End_B1=28
3865 16:31:24.026450 29, 0x0, End_B0=29 End_B1=29
3866 16:31:24.030199 30, 0x0, End_B0=30 End_B1=30
3867 16:31:24.030325 31, 0xFFFF, End_B0=30 End_B1=30
3868 16:31:24.037175 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3869 16:31:24.043469 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3870 16:31:24.043584
3871 16:31:24.043663
3872 16:31:24.046612 Write Rank1 MR23 =0x3f
3873 16:31:24.046705 [DQSOSC]
3874 16:31:24.053240 [DQSOSCAuto] RK1, (LSB)MR18= 0xcbcb, (MSB)MR19= 0x202, tDQSOscB0 = 440 ps tDQSOscB1 = 440 ps
3875 16:31:24.059681 CH1_RK1: MR19=0x202, MR18=0xCBCB, DQSOSC=440, MR23=63, INC=12, DEC=19
3876 16:31:24.063228 Write Rank1 MR23 =0x3f
3877 16:31:24.063347 [DQSOSC]
3878 16:31:24.070025 [DQSOSCAuto] RK1, (LSB)MR18= 0xcfcf, (MSB)MR19= 0x202, tDQSOscB0 = 438 ps tDQSOscB1 = 438 ps
3879 16:31:24.073130 CH1 RK1: MR19=202, MR18=CFCF
3880 16:31:24.076727 [RxdqsGatingPostProcess] freq 1600
3881 16:31:24.083138 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3882 16:31:24.083260 Rank: 0
3883 16:31:24.086204 best DQS0 dly(2T, 0.5T) = (2, 6)
3884 16:31:24.089887 best DQS1 dly(2T, 0.5T) = (2, 6)
3885 16:31:24.093144 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3886 16:31:24.096320 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3887 16:31:24.096447 Rank: 1
3888 16:31:24.099361 best DQS0 dly(2T, 0.5T) = (2, 5)
3889 16:31:24.103189 best DQS1 dly(2T, 0.5T) = (2, 6)
3890 16:31:24.106335 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3891 16:31:24.109789 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3892 16:31:24.112733 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3893 16:31:24.115985 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3894 16:31:24.122850 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3895 16:31:24.122976
3896 16:31:24.123080
3897 16:31:24.126609 [Calibration Summary] Freqency 1600
3898 16:31:24.126729 CH 0, Rank 0
3899 16:31:24.126818 All Pass.
3900 16:31:24.126896
3901 16:31:24.129667 CH 0, Rank 1
3902 16:31:24.129785 All Pass.
3903 16:31:24.129895
3904 16:31:24.130005 CH 1, Rank 0
3905 16:31:24.132602 All Pass.
3906 16:31:24.132719
3907 16:31:24.132827 CH 1, Rank 1
3908 16:31:24.132935 All Pass.
3909 16:31:24.133036
3910 16:31:24.139615 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3911 16:31:24.146045 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3912 16:31:24.156285 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3913 16:31:24.156406 Write Rank0 MR3 =0xb0
3914 16:31:24.162539 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3915 16:31:24.169283 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3916 16:31:24.175793 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3917 16:31:24.179139 Write Rank1 MR3 =0xb0
3918 16:31:24.185571 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3919 16:31:24.192526 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3920 16:31:24.198793 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3921 16:31:24.202009 Write Rank0 MR3 =0xb0
3922 16:31:24.208761 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3923 16:31:24.215615 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3924 16:31:24.221843 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3925 16:31:24.225344 Write Rank1 MR3 =0xb0
3926 16:31:24.225433 DramC Write-DBI on
3927 16:31:24.228968 [GetDramInforAfterCalByMRR] Vendor 6.
3928 16:31:24.232149 [GetDramInforAfterCalByMRR] Revision 505.
3929 16:31:24.235599 MR8 1111
3930 16:31:24.239105 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3931 16:31:24.239196 MR8 1111
3932 16:31:24.245368 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3933 16:31:24.245463 MR8 1111
3934 16:31:24.248477 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3935 16:31:24.252332 MR8 1111
3936 16:31:24.255433 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3937 16:31:24.265500 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3938 16:31:24.265590 Write Rank0 MR13 =0xd0
3939 16:31:24.268606 Write Rank1 MR13 =0xd0
3940 16:31:24.271695 Write Rank0 MR13 =0xd0
3941 16:31:24.271771 Write Rank1 MR13 =0xd0
3942 16:31:24.275523 Save calibration result to emmc
3943 16:31:24.275614
3944 16:31:24.275686
3945 16:31:24.278582 [DramcModeReg_Check] Freq_1600, FSP_1
3946 16:31:24.281729 FSP_1, CH_0, RK0
3947 16:31:24.281819 Write Rank0 MR13 =0xd8
3948 16:31:24.285537 MR12 = 0x5e (global = 0x5e) match
3949 16:31:24.288634 MR14 = 0x1c (global = 0x1c) match
3950 16:31:24.291638 FSP_1, CH_0, RK1
3951 16:31:24.291725 Write Rank1 MR13 =0xd8
3952 16:31:24.295236 MR12 = 0x60 (global = 0x60) match
3953 16:31:24.298632 MR14 = 0x20 (global = 0x20) match
3954 16:31:24.301558 FSP_1, CH_1, RK0
3955 16:31:24.301649 Write Rank0 MR13 =0xd8
3956 16:31:24.305039 MR12 = 0x60 (global = 0x60) match
3957 16:31:24.308320 MR14 = 0x20 (global = 0x20) match
3958 16:31:24.311590 FSP_1, CH_1, RK1
3959 16:31:24.311680 Write Rank1 MR13 =0xd8
3960 16:31:24.314725 MR12 = 0x60 (global = 0x60) match
3961 16:31:24.318101 MR14 = 0x1e (global = 0x1e) match
3962 16:31:24.318192
3963 16:31:24.325059 [MEM_TEST] 02: After DFS, before run time config
3964 16:31:24.334966 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3965 16:31:24.335059
3966 16:31:24.335132 [TA2_TEST]
3967 16:31:24.335198 === TA2 HW
3968 16:31:24.338007 TA2 PAT: XTALK
3969 16:31:24.341398 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3970 16:31:24.344927 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3971 16:31:24.351854 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3972 16:31:24.354889 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3973 16:31:24.355011
3974 16:31:24.355114
3975 16:31:24.358023 Settings after calibration
3976 16:31:24.358140
3977 16:31:24.361779 [DramcRunTimeConfig]
3978 16:31:24.364970 TransferPLLToSPMControl - MODE SW PHYPLL
3979 16:31:24.365083 TX_TRACKING: ON
3980 16:31:24.368309 RX_TRACKING: ON
3981 16:31:24.368401 HW_GATING: ON
3982 16:31:24.371514 HW_GATING DBG: OFF
3983 16:31:24.371628 ddr_geometry:1
3984 16:31:24.374721 ddr_geometry:1
3985 16:31:24.374811 ddr_geometry:1
3986 16:31:24.374883 ddr_geometry:1
3987 16:31:24.377915 ddr_geometry:1
3988 16:31:24.378005 ddr_geometry:1
3989 16:31:24.381543 ddr_geometry:1
3990 16:31:24.381633 ddr_geometry:1
3991 16:31:24.384701 High Freq DUMMY_READ_FOR_TRACKING: ON
3992 16:31:24.388354 ZQCS_ENABLE_LP4: OFF
3993 16:31:24.391413 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3994 16:31:24.394665 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3995 16:31:24.394755 SPM_CONTROL_AFTERK: ON
3996 16:31:24.398309 IMPEDANCE_TRACKING: ON
3997 16:31:24.398399 TEMP_SENSOR: ON
3998 16:31:24.401382 PER_BANK_REFRESH: ON
3999 16:31:24.401472 HW_SAVE_FOR_SR: ON
4000 16:31:24.404900 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
4001 16:31:24.408081 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
4002 16:31:24.411598 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
4003 16:31:24.414613 Read ODT Tracking: ON
4004 16:31:24.418272 =========================
4005 16:31:24.418362
4006 16:31:24.418434 [TA2_TEST]
4007 16:31:24.418500 === TA2 HW
4008 16:31:24.424866 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
4009 16:31:24.428209 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
4010 16:31:24.434727 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
4011 16:31:24.438208 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
4012 16:31:24.438328
4013 16:31:24.441411 [MEM_TEST] 03: After run time config
4014 16:31:24.452511 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
4015 16:31:24.455610 [complex_mem_test] start addr:0x40024000, len:131072
4016 16:31:24.659739 1st complex R/W mem test pass
4017 16:31:24.666891 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
4018 16:31:24.670015 sync preloader write leveling
4019 16:31:24.673194 sync preloader cbt_mr12
4020 16:31:24.676719 sync preloader cbt_clk_dly
4021 16:31:24.676811 sync preloader cbt_cmd_dly
4022 16:31:24.679727 sync preloader cbt_cs
4023 16:31:24.683359 sync preloader cbt_ca_perbit_delay
4024 16:31:24.686419 sync preloader clk_delay
4025 16:31:24.686511 sync preloader dqs_delay
4026 16:31:24.689443 sync preloader u1Gating2T_Save
4027 16:31:24.693221 sync preloader u1Gating05T_Save
4028 16:31:24.696303 sync preloader u1Gatingfine_tune_Save
4029 16:31:24.699893 sync preloader u1Gatingucpass_count_Save
4030 16:31:24.703027 sync preloader u1TxWindowPerbitVref_Save
4031 16:31:24.706066 sync preloader u1TxCenter_min_Save
4032 16:31:24.709837 sync preloader u1TxCenter_max_Save
4033 16:31:24.712735 sync preloader u1Txwin_center_Save
4034 16:31:24.716436 sync preloader u1Txfirst_pass_Save
4035 16:31:24.719673 sync preloader u1Txlast_pass_Save
4036 16:31:24.722853 sync preloader u1RxDatlat_Save
4037 16:31:24.726145 sync preloader u1RxWinPerbitVref_Save
4038 16:31:24.729843 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4039 16:31:24.732865 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4040 16:31:24.735959 sync preloader delay_cell_unit
4041 16:31:24.742795 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4042 16:31:24.746466 sync preloader write leveling
4043 16:31:24.746558 sync preloader cbt_mr12
4044 16:31:24.749497 sync preloader cbt_clk_dly
4045 16:31:24.752663 sync preloader cbt_cmd_dly
4046 16:31:24.752754 sync preloader cbt_cs
4047 16:31:24.756323 sync preloader cbt_ca_perbit_delay
4048 16:31:24.759293 sync preloader clk_delay
4049 16:31:24.762846 sync preloader dqs_delay
4050 16:31:24.766219 sync preloader u1Gating2T_Save
4051 16:31:24.766310 sync preloader u1Gating05T_Save
4052 16:31:24.769212 sync preloader u1Gatingfine_tune_Save
4053 16:31:24.775821 sync preloader u1Gatingucpass_count_Save
4054 16:31:24.779267 sync preloader u1TxWindowPerbitVref_Save
4055 16:31:24.782677 sync preloader u1TxCenter_min_Save
4056 16:31:24.782768 sync preloader u1TxCenter_max_Save
4057 16:31:24.786028 sync preloader u1Txwin_center_Save
4058 16:31:24.789383 sync preloader u1Txfirst_pass_Save
4059 16:31:24.792743 sync preloader u1Txlast_pass_Save
4060 16:31:24.796100 sync preloader u1RxDatlat_Save
4061 16:31:24.799495 sync preloader u1RxWinPerbitVref_Save
4062 16:31:24.802720 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4063 16:31:24.809296 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4064 16:31:24.809389 sync preloader delay_cell_unit
4065 16:31:24.816248 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4066 16:31:24.819426 sync preloader write leveling
4067 16:31:24.822533 sync preloader cbt_mr12
4068 16:31:24.825656 sync preloader cbt_clk_dly
4069 16:31:24.825748 sync preloader cbt_cmd_dly
4070 16:31:24.829360 sync preloader cbt_cs
4071 16:31:24.832636 sync preloader cbt_ca_perbit_delay
4072 16:31:24.832728 sync preloader clk_delay
4073 16:31:24.836229 sync preloader dqs_delay
4074 16:31:24.839344 sync preloader u1Gating2T_Save
4075 16:31:24.842347 sync preloader u1Gating05T_Save
4076 16:31:24.845851 sync preloader u1Gatingfine_tune_Save
4077 16:31:24.848942 sync preloader u1Gatingucpass_count_Save
4078 16:31:24.852622 sync preloader u1TxWindowPerbitVref_Save
4079 16:31:24.855726 sync preloader u1TxCenter_min_Save
4080 16:31:24.859575 sync preloader u1TxCenter_max_Save
4081 16:31:24.862649 sync preloader u1Txwin_center_Save
4082 16:31:24.865738 sync preloader u1Txfirst_pass_Save
4083 16:31:24.869276 sync preloader u1Txlast_pass_Save
4084 16:31:24.872275 sync preloader u1RxDatlat_Save
4085 16:31:24.875819 sync preloader u1RxWinPerbitVref_Save
4086 16:31:24.879261 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4087 16:31:24.882419 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4088 16:31:24.886194 sync preloader delay_cell_unit
4089 16:31:24.889068 just_for_test_dump_coreboot_params dump all params
4090 16:31:24.892685 dump source = 0x0
4091 16:31:24.892774 dump params frequency:1600
4092 16:31:24.895826 dump params rank number:2
4093 16:31:24.895946
4094 16:31:24.899409 dump params write leveling
4095 16:31:24.902443 write leveling[0][0][0] = 0x21
4096 16:31:24.906021 write leveling[0][0][1] = 0x17
4097 16:31:24.906145 write leveling[0][1][0] = 0x1a
4098 16:31:24.909417 write leveling[0][1][1] = 0x18
4099 16:31:24.912711 write leveling[1][0][0] = 0x22
4100 16:31:24.916548 write leveling[1][0][1] = 0x19
4101 16:31:24.919264 write leveling[1][1][0] = 0x22
4102 16:31:24.919384 write leveling[1][1][1] = 0x18
4103 16:31:24.922347 dump params cbt_cs
4104 16:31:24.925943 cbt_cs[0][0] = 0x8
4105 16:31:24.926034 cbt_cs[0][1] = 0x8
4106 16:31:24.929040 cbt_cs[1][0] = 0xb
4107 16:31:24.929130 cbt_cs[1][1] = 0xb
4108 16:31:24.932800 dump params cbt_mr12
4109 16:31:24.932891 cbt_mr12[0][0] = 0x1e
4110 16:31:24.935891 cbt_mr12[0][1] = 0x20
4111 16:31:24.935992 cbt_mr12[1][0] = 0x20
4112 16:31:24.939014 cbt_mr12[1][1] = 0x20
4113 16:31:24.942680 dump params tx window
4114 16:31:24.942799 tx_center_min[0][0][0] = 982
4115 16:31:24.945768 tx_center_max[0][0][0] = 989
4116 16:31:24.949377 tx_center_min[0][0][1] = 974
4117 16:31:24.952360 tx_center_max[0][0][1] = 980
4118 16:31:24.955754 tx_center_min[0][1][0] = 979
4119 16:31:24.955874 tx_center_max[0][1][0] = 986
4120 16:31:24.958906 tx_center_min[0][1][1] = 978
4121 16:31:24.961993 tx_center_max[0][1][1] = 985
4122 16:31:24.965714 tx_center_min[1][0][0] = 988
4123 16:31:24.969016 tx_center_max[1][0][0] = 994
4124 16:31:24.969132 tx_center_min[1][0][1] = 978
4125 16:31:24.972145 tx_center_max[1][0][1] = 984
4126 16:31:24.975255 tx_center_min[1][1][0] = 986
4127 16:31:24.979014 tx_center_max[1][1][0] = 991
4128 16:31:24.982067 tx_center_min[1][1][1] = 974
4129 16:31:24.982182 tx_center_max[1][1][1] = 981
4130 16:31:24.985434 dump params tx window
4131 16:31:24.988880 tx_win_center[0][0][0] = 989
4132 16:31:24.992536 tx_first_pass[0][0][0] = 977
4133 16:31:24.992632 tx_last_pass[0][0][0] = 1001
4134 16:31:24.995456 tx_win_center[0][0][1] = 988
4135 16:31:24.999053 tx_first_pass[0][0][1] = 976
4136 16:31:25.002207 tx_last_pass[0][0][1] = 1000
4137 16:31:25.002301 tx_win_center[0][0][2] = 988
4138 16:31:25.005380 tx_first_pass[0][0][2] = 976
4139 16:31:25.008881 tx_last_pass[0][0][2] = 1001
4140 16:31:25.012069 tx_win_center[0][0][3] = 982
4141 16:31:25.015712 tx_first_pass[0][0][3] = 970
4142 16:31:25.015807 tx_last_pass[0][0][3] = 995
4143 16:31:25.018616 tx_win_center[0][0][4] = 988
4144 16:31:25.022307 tx_first_pass[0][0][4] = 976
4145 16:31:25.025763 tx_last_pass[0][0][4] = 1000
4146 16:31:25.025858 tx_win_center[0][0][5] = 986
4147 16:31:25.028672 tx_first_pass[0][0][5] = 974
4148 16:31:25.032098 tx_last_pass[0][0][5] = 998
4149 16:31:25.035582 tx_win_center[0][0][6] = 987
4150 16:31:25.038754 tx_first_pass[0][0][6] = 975
4151 16:31:25.038849 tx_last_pass[0][0][6] = 999
4152 16:31:25.041802 tx_win_center[0][0][7] = 988
4153 16:31:25.045480 tx_first_pass[0][0][7] = 976
4154 16:31:25.048557 tx_last_pass[0][0][7] = 1000
4155 16:31:25.048651 tx_win_center[0][0][8] = 974
4156 16:31:25.052231 tx_first_pass[0][0][8] = 962
4157 16:31:25.055297 tx_last_pass[0][0][8] = 986
4158 16:31:25.058876 tx_win_center[0][0][9] = 976
4159 16:31:25.062267 tx_first_pass[0][0][9] = 965
4160 16:31:25.062362 tx_last_pass[0][0][9] = 988
4161 16:31:25.065304 tx_win_center[0][0][10] = 980
4162 16:31:25.068974 tx_first_pass[0][0][10] = 968
4163 16:31:25.071969 tx_last_pass[0][0][10] = 992
4164 16:31:25.075582 tx_win_center[0][0][11] = 975
4165 16:31:25.075676 tx_first_pass[0][0][11] = 964
4166 16:31:25.078611 tx_last_pass[0][0][11] = 987
4167 16:31:25.082317 tx_win_center[0][0][12] = 978
4168 16:31:25.085316 tx_first_pass[0][0][12] = 966
4169 16:31:25.088379 tx_last_pass[0][0][12] = 990
4170 16:31:25.088475 tx_win_center[0][0][13] = 977
4171 16:31:25.092059 tx_first_pass[0][0][13] = 966
4172 16:31:25.095028 tx_last_pass[0][0][13] = 989
4173 16:31:25.098523 tx_win_center[0][0][14] = 978
4174 16:31:25.101948 tx_first_pass[0][0][14] = 966
4175 16:31:25.102042 tx_last_pass[0][0][14] = 990
4176 16:31:25.105242 tx_win_center[0][0][15] = 980
4177 16:31:25.108523 tx_first_pass[0][0][15] = 968
4178 16:31:25.111594 tx_last_pass[0][0][15] = 992
4179 16:31:25.115281 tx_win_center[0][1][0] = 985
4180 16:31:25.115376 tx_first_pass[0][1][0] = 973
4181 16:31:25.118381 tx_last_pass[0][1][0] = 998
4182 16:31:25.121471 tx_win_center[0][1][1] = 984
4183 16:31:25.125119 tx_first_pass[0][1][1] = 972
4184 16:31:25.128220 tx_last_pass[0][1][1] = 996
4185 16:31:25.128314 tx_win_center[0][1][2] = 986
4186 16:31:25.131877 tx_first_pass[0][1][2] = 974
4187 16:31:25.134944 tx_last_pass[0][1][2] = 998
4188 16:31:25.138527 tx_win_center[0][1][3] = 979
4189 16:31:25.138622 tx_first_pass[0][1][3] = 967
4190 16:31:25.141473 tx_last_pass[0][1][3] = 991
4191 16:31:25.144910 tx_win_center[0][1][4] = 983
4192 16:31:25.148241 tx_first_pass[0][1][4] = 971
4193 16:31:25.151706 tx_last_pass[0][1][4] = 996
4194 16:31:25.151801 tx_win_center[0][1][5] = 981
4195 16:31:25.154774 tx_first_pass[0][1][5] = 969
4196 16:31:25.158396 tx_last_pass[0][1][5] = 993
4197 16:31:25.161531 tx_win_center[0][1][6] = 982
4198 16:31:25.161626 tx_first_pass[0][1][6] = 969
4199 16:31:25.164582 tx_last_pass[0][1][6] = 995
4200 16:31:25.168062 tx_win_center[0][1][7] = 983
4201 16:31:25.171709 tx_first_pass[0][1][7] = 971
4202 16:31:25.174774 tx_last_pass[0][1][7] = 996
4203 16:31:25.174868 tx_win_center[0][1][8] = 978
4204 16:31:25.177875 tx_first_pass[0][1][8] = 966
4205 16:31:25.181683 tx_last_pass[0][1][8] = 990
4206 16:31:25.184718 tx_win_center[0][1][9] = 979
4207 16:31:25.184814 tx_first_pass[0][1][9] = 968
4208 16:31:25.187873 tx_last_pass[0][1][9] = 991
4209 16:31:25.191616 tx_win_center[0][1][10] = 985
4210 16:31:25.194691 tx_first_pass[0][1][10] = 973
4211 16:31:25.198389 tx_last_pass[0][1][10] = 998
4212 16:31:25.198484 tx_win_center[0][1][11] = 978
4213 16:31:25.201334 tx_first_pass[0][1][11] = 966
4214 16:31:25.204964 tx_last_pass[0][1][11] = 990
4215 16:31:25.208053 tx_win_center[0][1][12] = 980
4216 16:31:25.211151 tx_first_pass[0][1][12] = 968
4217 16:31:25.211246 tx_last_pass[0][1][12] = 992
4218 16:31:25.214634 tx_win_center[0][1][13] = 980
4219 16:31:25.217949 tx_first_pass[0][1][13] = 969
4220 16:31:25.221320 tx_last_pass[0][1][13] = 992
4221 16:31:25.224451 tx_win_center[0][1][14] = 980
4222 16:31:25.228067 tx_first_pass[0][1][14] = 968
4223 16:31:25.228163 tx_last_pass[0][1][14] = 992
4224 16:31:25.231061 tx_win_center[0][1][15] = 983
4225 16:31:25.234789 tx_first_pass[0][1][15] = 971
4226 16:31:25.237829 tx_last_pass[0][1][15] = 995
4227 16:31:25.241015 tx_win_center[1][0][0] = 994
4228 16:31:25.241110 tx_first_pass[1][0][0] = 982
4229 16:31:25.244614 tx_last_pass[1][0][0] = 1007
4230 16:31:25.248068 tx_win_center[1][0][1] = 992
4231 16:31:25.251116 tx_first_pass[1][0][1] = 979
4232 16:31:25.251217 tx_last_pass[1][0][1] = 1006
4233 16:31:25.254448 tx_win_center[1][0][2] = 990
4234 16:31:25.257808 tx_first_pass[1][0][2] = 978
4235 16:31:25.260837 tx_last_pass[1][0][2] = 1003
4236 16:31:25.264597 tx_win_center[1][0][3] = 988
4237 16:31:25.264693 tx_first_pass[1][0][3] = 977
4238 16:31:25.267610 tx_last_pass[1][0][3] = 1000
4239 16:31:25.271365 tx_win_center[1][0][4] = 993
4240 16:31:25.274320 tx_first_pass[1][0][4] = 980
4241 16:31:25.277878 tx_last_pass[1][0][4] = 1006
4242 16:31:25.277973 tx_win_center[1][0][5] = 994
4243 16:31:25.281070 tx_first_pass[1][0][5] = 981
4244 16:31:25.284157 tx_last_pass[1][0][5] = 1007
4245 16:31:25.287822 tx_win_center[1][0][6] = 992
4246 16:31:25.287916 tx_first_pass[1][0][6] = 979
4247 16:31:25.291410 tx_last_pass[1][0][6] = 1006
4248 16:31:25.294580 tx_win_center[1][0][7] = 992
4249 16:31:25.297598 tx_first_pass[1][0][7] = 979
4250 16:31:25.301251 tx_last_pass[1][0][7] = 1006
4251 16:31:25.301345 tx_win_center[1][0][8] = 981
4252 16:31:25.304243 tx_first_pass[1][0][8] = 969
4253 16:31:25.307324 tx_last_pass[1][0][8] = 993
4254 16:31:25.311190 tx_win_center[1][0][9] = 981
4255 16:31:25.314340 tx_first_pass[1][0][9] = 970
4256 16:31:25.314435 tx_last_pass[1][0][9] = 992
4257 16:31:25.317503 tx_win_center[1][0][10] = 982
4258 16:31:25.320614 tx_first_pass[1][0][10] = 971
4259 16:31:25.324339 tx_last_pass[1][0][10] = 994
4260 16:31:25.327396 tx_win_center[1][0][11] = 983
4261 16:31:25.327503 tx_first_pass[1][0][11] = 971
4262 16:31:25.331226 tx_last_pass[1][0][11] = 995
4263 16:31:25.334443 tx_win_center[1][0][12] = 983
4264 16:31:25.337611 tx_first_pass[1][0][12] = 972
4265 16:31:25.340946 tx_last_pass[1][0][12] = 994
4266 16:31:25.341041 tx_win_center[1][0][13] = 984
4267 16:31:25.344213 tx_first_pass[1][0][13] = 973
4268 16:31:25.347288 tx_last_pass[1][0][13] = 995
4269 16:31:25.350884 tx_win_center[1][0][14] = 983
4270 16:31:25.353998 tx_first_pass[1][0][14] = 972
4271 16:31:25.354093 tx_last_pass[1][0][14] = 994
4272 16:31:25.357629 tx_win_center[1][0][15] = 978
4273 16:31:25.360638 tx_first_pass[1][0][15] = 967
4274 16:31:25.364263 tx_last_pass[1][0][15] = 989
4275 16:31:25.367311 tx_win_center[1][1][0] = 991
4276 16:31:25.367396 tx_first_pass[1][1][0] = 978
4277 16:31:25.371051 tx_last_pass[1][1][0] = 1005
4278 16:31:25.374090 tx_win_center[1][1][1] = 990
4279 16:31:25.377837 tx_first_pass[1][1][1] = 977
4280 16:31:25.377942 tx_last_pass[1][1][1] = 1003
4281 16:31:25.380682 tx_win_center[1][1][2] = 989
4282 16:31:25.384281 tx_first_pass[1][1][2] = 977
4283 16:31:25.387579 tx_last_pass[1][1][2] = 1001
4284 16:31:25.390689 tx_win_center[1][1][3] = 986
4285 16:31:25.390784 tx_first_pass[1][1][3] = 974
4286 16:31:25.394454 tx_last_pass[1][1][3] = 999
4287 16:31:25.397549 tx_win_center[1][1][4] = 990
4288 16:31:25.400710 tx_first_pass[1][1][4] = 978
4289 16:31:25.400805 tx_last_pass[1][1][4] = 1003
4290 16:31:25.403995 tx_win_center[1][1][5] = 991
4291 16:31:25.407238 tx_first_pass[1][1][5] = 978
4292 16:31:25.411043 tx_last_pass[1][1][5] = 1004
4293 16:31:25.414300 tx_win_center[1][1][6] = 991
4294 16:31:25.414394 tx_first_pass[1][1][6] = 978
4295 16:31:25.417325 tx_last_pass[1][1][6] = 1004
4296 16:31:25.421143 tx_win_center[1][1][7] = 990
4297 16:31:25.424446 tx_first_pass[1][1][7] = 978
4298 16:31:25.427536 tx_last_pass[1][1][7] = 1002
4299 16:31:25.427631 tx_win_center[1][1][8] = 978
4300 16:31:25.430474 tx_first_pass[1][1][8] = 966
4301 16:31:25.434346 tx_last_pass[1][1][8] = 990
4302 16:31:25.437537 tx_win_center[1][1][9] = 978
4303 16:31:25.437632 tx_first_pass[1][1][9] = 967
4304 16:31:25.440697 tx_last_pass[1][1][9] = 990
4305 16:31:25.444378 tx_win_center[1][1][10] = 980
4306 16:31:25.447371 tx_first_pass[1][1][10] = 969
4307 16:31:25.450770 tx_last_pass[1][1][10] = 992
4308 16:31:25.450871 tx_win_center[1][1][11] = 981
4309 16:31:25.454075 tx_first_pass[1][1][11] = 969
4310 16:31:25.457362 tx_last_pass[1][1][11] = 993
4311 16:31:25.460865 tx_win_center[1][1][12] = 981
4312 16:31:25.463764 tx_first_pass[1][1][12] = 969
4313 16:31:25.463857 tx_last_pass[1][1][12] = 993
4314 16:31:25.467130 tx_win_center[1][1][13] = 981
4315 16:31:25.470937 tx_first_pass[1][1][13] = 970
4316 16:31:25.473879 tx_last_pass[1][1][13] = 993
4317 16:31:25.476818 tx_win_center[1][1][14] = 981
4318 16:31:25.480211 tx_first_pass[1][1][14] = 969
4319 16:31:25.480303 tx_last_pass[1][1][14] = 993
4320 16:31:25.484073 tx_win_center[1][1][15] = 974
4321 16:31:25.487112 tx_first_pass[1][1][15] = 962
4322 16:31:25.490868 tx_last_pass[1][1][15] = 987
4323 16:31:25.490958 dump params rx window
4324 16:31:25.494021 rx_firspass[0][0][0] = 5
4325 16:31:25.497144 rx_lastpass[0][0][0] = 38
4326 16:31:25.497263 rx_firspass[0][0][1] = 5
4327 16:31:25.500326 rx_lastpass[0][0][1] = 36
4328 16:31:25.503438 rx_firspass[0][0][2] = 6
4329 16:31:25.507438 rx_lastpass[0][0][2] = 36
4330 16:31:25.507529 rx_firspass[0][0][3] = -2
4331 16:31:25.510612 rx_lastpass[0][0][3] = 31
4332 16:31:25.513670 rx_firspass[0][0][4] = 5
4333 16:31:25.513761 rx_lastpass[0][0][4] = 37
4334 16:31:25.517378 rx_firspass[0][0][5] = 2
4335 16:31:25.520410 rx_lastpass[0][0][5] = 32
4336 16:31:25.520501 rx_firspass[0][0][6] = 3
4337 16:31:25.523601 rx_lastpass[0][0][6] = 34
4338 16:31:25.526895 rx_firspass[0][0][7] = 5
4339 16:31:25.530631 rx_lastpass[0][0][7] = 36
4340 16:31:25.530721 rx_firspass[0][0][8] = -3
4341 16:31:25.533749 rx_lastpass[0][0][8] = 33
4342 16:31:25.536934 rx_firspass[0][0][9] = 0
4343 16:31:25.537025 rx_lastpass[0][0][9] = 33
4344 16:31:25.540150 rx_firspass[0][0][10] = 7
4345 16:31:25.543928 rx_lastpass[0][0][10] = 41
4346 16:31:25.546822 rx_firspass[0][0][11] = 1
4347 16:31:25.546913 rx_lastpass[0][0][11] = 32
4348 16:31:25.550498 rx_firspass[0][0][12] = 2
4349 16:31:25.553795 rx_lastpass[0][0][12] = 36
4350 16:31:25.553886 rx_firspass[0][0][13] = 3
4351 16:31:25.556723 rx_lastpass[0][0][13] = 34
4352 16:31:25.560388 rx_firspass[0][0][14] = 2
4353 16:31:25.563198 rx_lastpass[0][0][14] = 37
4354 16:31:25.563289 rx_firspass[0][0][15] = 5
4355 16:31:25.566703 rx_lastpass[0][0][15] = 37
4356 16:31:25.570408 rx_firspass[0][1][0] = 6
4357 16:31:25.570499 rx_lastpass[0][1][0] = 40
4358 16:31:25.573426 rx_firspass[0][1][1] = 5
4359 16:31:25.577016 rx_lastpass[0][1][1] = 38
4360 16:31:25.580306 rx_firspass[0][1][2] = 6
4361 16:31:25.580403 rx_lastpass[0][1][2] = 38
4362 16:31:25.583199 rx_firspass[0][1][3] = -2
4363 16:31:25.587118 rx_lastpass[0][1][3] = 33
4364 16:31:25.587208 rx_firspass[0][1][4] = 5
4365 16:31:25.589898 rx_lastpass[0][1][4] = 39
4366 16:31:25.593553 rx_firspass[0][1][5] = 1
4367 16:31:25.596727 rx_lastpass[0][1][5] = 34
4368 16:31:25.596818 rx_firspass[0][1][6] = 3
4369 16:31:25.600210 rx_lastpass[0][1][6] = 37
4370 16:31:25.603627 rx_firspass[0][1][7] = 3
4371 16:31:25.603718 rx_lastpass[0][1][7] = 38
4372 16:31:25.606769 rx_firspass[0][1][8] = -2
4373 16:31:25.609848 rx_lastpass[0][1][8] = 32
4374 16:31:25.609938 rx_firspass[0][1][9] = 1
4375 16:31:25.613705 rx_lastpass[0][1][9] = 36
4376 16:31:25.616756 rx_firspass[0][1][10] = 7
4377 16:31:25.620393 rx_lastpass[0][1][10] = 43
4378 16:31:25.620482 rx_firspass[0][1][11] = -2
4379 16:31:25.623548 rx_lastpass[0][1][11] = 34
4380 16:31:25.626562 rx_firspass[0][1][12] = 1
4381 16:31:25.626653 rx_lastpass[0][1][12] = 37
4382 16:31:25.630338 rx_firspass[0][1][13] = 2
4383 16:31:25.633593 rx_lastpass[0][1][13] = 35
4384 16:31:25.636651 rx_firspass[0][1][14] = 3
4385 16:31:25.636740 rx_lastpass[0][1][14] = 37
4386 16:31:25.640484 rx_firspass[0][1][15] = 6
4387 16:31:25.643503 rx_lastpass[0][1][15] = 39
4388 16:31:25.643594 rx_firspass[1][0][0] = 5
4389 16:31:25.646592 rx_lastpass[1][0][0] = 38
4390 16:31:25.650436 rx_firspass[1][0][1] = 5
4391 16:31:25.653522 rx_lastpass[1][0][1] = 38
4392 16:31:25.653612 rx_firspass[1][0][2] = 2
4393 16:31:25.656570 rx_lastpass[1][0][2] = 35
4394 16:31:25.660403 rx_firspass[1][0][3] = 0
4395 16:31:25.660493 rx_lastpass[1][0][3] = 33
4396 16:31:25.663319 rx_firspass[1][0][4] = 5
4397 16:31:25.667157 rx_lastpass[1][0][4] = 38
4398 16:31:25.667276 rx_firspass[1][0][5] = 7
4399 16:31:25.670210 rx_lastpass[1][0][5] = 39
4400 16:31:25.673582 rx_firspass[1][0][6] = 7
4401 16:31:25.676789 rx_lastpass[1][0][6] = 40
4402 16:31:25.676883 rx_firspass[1][0][7] = 5
4403 16:31:25.679841 rx_lastpass[1][0][7] = 38
4404 16:31:25.683632 rx_firspass[1][0][8] = 1
4405 16:31:25.683729 rx_lastpass[1][0][8] = 33
4406 16:31:25.686611 rx_firspass[1][0][9] = 0
4407 16:31:25.690306 rx_lastpass[1][0][9] = 32
4408 16:31:25.693344 rx_firspass[1][0][10] = 5
4409 16:31:25.693437 rx_lastpass[1][0][10] = 35
4410 16:31:25.696888 rx_firspass[1][0][11] = 5
4411 16:31:25.699807 rx_lastpass[1][0][11] = 38
4412 16:31:25.699897 rx_firspass[1][0][12] = 6
4413 16:31:25.703033 rx_lastpass[1][0][12] = 38
4414 16:31:25.706549 rx_firspass[1][0][13] = 6
4415 16:31:25.709875 rx_lastpass[1][0][13] = 37
4416 16:31:25.709992 rx_firspass[1][0][14] = 6
4417 16:31:25.713165 rx_lastpass[1][0][14] = 38
4418 16:31:25.716363 rx_firspass[1][0][15] = -3
4419 16:31:25.720079 rx_lastpass[1][0][15] = 30
4420 16:31:25.720200 rx_firspass[1][1][0] = 3
4421 16:31:25.723228 rx_lastpass[1][1][0] = 40
4422 16:31:25.726314 rx_firspass[1][1][1] = 4
4423 16:31:25.726430 rx_lastpass[1][1][1] = 39
4424 16:31:25.729900 rx_firspass[1][1][2] = 0
4425 16:31:25.733103 rx_lastpass[1][1][2] = 36
4426 16:31:25.733225 rx_firspass[1][1][3] = -2
4427 16:31:25.739855 rx_lastpass[1][1][3] = 34
4428 16:31:25.739948 rx_firspass[1][1][4] = 4
4429 16:31:25.743140 rx_lastpass[1][1][4] = 39
4430 16:31:25.743246 rx_firspass[1][1][5] = 5
4431 16:31:25.746358 rx_lastpass[1][1][5] = 40
4432 16:31:25.749515 rx_firspass[1][1][6] = 5
4433 16:31:25.749633 rx_lastpass[1][1][6] = 41
4434 16:31:25.753225 rx_firspass[1][1][7] = 3
4435 16:31:25.756359 rx_lastpass[1][1][7] = 38
4436 16:31:25.756450 rx_firspass[1][1][8] = 0
4437 16:31:25.759392 rx_lastpass[1][1][8] = 35
4438 16:31:25.763255 rx_firspass[1][1][9] = -1
4439 16:31:25.766283 rx_lastpass[1][1][9] = 34
4440 16:31:25.766394 rx_firspass[1][1][10] = 3
4441 16:31:25.769521 rx_lastpass[1][1][10] = 38
4442 16:31:25.773147 rx_firspass[1][1][11] = 4
4443 16:31:25.776118 rx_lastpass[1][1][11] = 40
4444 16:31:25.776237 rx_firspass[1][1][12] = 4
4445 16:31:25.779724 rx_lastpass[1][1][12] = 40
4446 16:31:25.782611 rx_firspass[1][1][13] = 4
4447 16:31:25.782735 rx_lastpass[1][1][13] = 40
4448 16:31:25.786385 rx_firspass[1][1][14] = 5
4449 16:31:25.789476 rx_lastpass[1][1][14] = 40
4450 16:31:25.792638 rx_firspass[1][1][15] = -4
4451 16:31:25.792734 rx_lastpass[1][1][15] = 31
4452 16:31:25.796346 dump params clk_delay
4453 16:31:25.796466 clk_delay[0] = 1
4454 16:31:25.799596 clk_delay[1] = 0
4455 16:31:25.799686 dump params dqs_delay
4456 16:31:25.802748 dqs_delay[0][0] = -2
4457 16:31:25.806500 dqs_delay[0][1] = 0
4458 16:31:25.806591 dqs_delay[1][0] = 0
4459 16:31:25.809604 dqs_delay[1][1] = 0
4460 16:31:25.812620 dump params delay_cell_unit = 735
4461 16:31:25.812710 dump source = 0x0
4462 16:31:25.816221 dump params frequency:1200
4463 16:31:25.819147 dump params rank number:2
4464 16:31:25.819238
4465 16:31:25.819311 dump params write leveling
4466 16:31:25.822659 write leveling[0][0][0] = 0x0
4467 16:31:25.825853 write leveling[0][0][1] = 0x0
4468 16:31:25.829341 write leveling[0][1][0] = 0x0
4469 16:31:25.832633 write leveling[0][1][1] = 0x0
4470 16:31:25.832724 write leveling[1][0][0] = 0x0
4471 16:31:25.836262 write leveling[1][0][1] = 0x0
4472 16:31:25.839769 write leveling[1][1][0] = 0x0
4473 16:31:25.842698 write leveling[1][1][1] = 0x0
4474 16:31:25.842778 dump params cbt_cs
4475 16:31:25.846426 cbt_cs[0][0] = 0x0
4476 16:31:25.846517 cbt_cs[0][1] = 0x0
4477 16:31:25.849487 cbt_cs[1][0] = 0x0
4478 16:31:25.849578 cbt_cs[1][1] = 0x0
4479 16:31:25.853091 dump params cbt_mr12
4480 16:31:25.853182 cbt_mr12[0][0] = 0x0
4481 16:31:25.856246 cbt_mr12[0][1] = 0x0
4482 16:31:25.859307 cbt_mr12[1][0] = 0x0
4483 16:31:25.859433 cbt_mr12[1][1] = 0x0
4484 16:31:25.863115 dump params tx window
4485 16:31:25.866199 tx_center_min[0][0][0] = 0
4486 16:31:25.866289 tx_center_max[0][0][0] = 0
4487 16:31:25.869398 tx_center_min[0][0][1] = 0
4488 16:31:25.872342 tx_center_max[0][0][1] = 0
4489 16:31:25.875942 tx_center_min[0][1][0] = 0
4490 16:31:25.876032 tx_center_max[0][1][0] = 0
4491 16:31:25.879123 tx_center_min[0][1][1] = 0
4492 16:31:25.882802 tx_center_max[0][1][1] = 0
4493 16:31:25.882912 tx_center_min[1][0][0] = 0
4494 16:31:25.885841 tx_center_max[1][0][0] = 0
4495 16:31:25.889229 tx_center_min[1][0][1] = 0
4496 16:31:25.892680 tx_center_max[1][0][1] = 0
4497 16:31:25.892770 tx_center_min[1][1][0] = 0
4498 16:31:25.895771 tx_center_max[1][1][0] = 0
4499 16:31:25.898858 tx_center_min[1][1][1] = 0
4500 16:31:25.902704 tx_center_max[1][1][1] = 0
4501 16:31:25.902786 dump params tx window
4502 16:31:25.905922 tx_win_center[0][0][0] = 0
4503 16:31:25.909195 tx_first_pass[0][0][0] = 0
4504 16:31:25.909285 tx_last_pass[0][0][0] = 0
4505 16:31:25.912185 tx_win_center[0][0][1] = 0
4506 16:31:25.915892 tx_first_pass[0][0][1] = 0
4507 16:31:25.919002 tx_last_pass[0][0][1] = 0
4508 16:31:25.919122 tx_win_center[0][0][2] = 0
4509 16:31:25.922090 tx_first_pass[0][0][2] = 0
4510 16:31:25.925790 tx_last_pass[0][0][2] = 0
4511 16:31:25.928924 tx_win_center[0][0][3] = 0
4512 16:31:25.929015 tx_first_pass[0][0][3] = 0
4513 16:31:25.932303 tx_last_pass[0][0][3] = 0
4514 16:31:25.935230 tx_win_center[0][0][4] = 0
4515 16:31:25.938789 tx_first_pass[0][0][4] = 0
4516 16:31:25.938880 tx_last_pass[0][0][4] = 0
4517 16:31:25.941911 tx_win_center[0][0][5] = 0
4518 16:31:25.945150 tx_first_pass[0][0][5] = 0
4519 16:31:25.945241 tx_last_pass[0][0][5] = 0
4520 16:31:25.948560 tx_win_center[0][0][6] = 0
4521 16:31:25.952008 tx_first_pass[0][0][6] = 0
4522 16:31:25.955356 tx_last_pass[0][0][6] = 0
4523 16:31:25.955456 tx_win_center[0][0][7] = 0
4524 16:31:25.958895 tx_first_pass[0][0][7] = 0
4525 16:31:25.962062 tx_last_pass[0][0][7] = 0
4526 16:31:25.965147 tx_win_center[0][0][8] = 0
4527 16:31:25.965276 tx_first_pass[0][0][8] = 0
4528 16:31:25.968837 tx_last_pass[0][0][8] = 0
4529 16:31:25.971992 tx_win_center[0][0][9] = 0
4530 16:31:25.972119 tx_first_pass[0][0][9] = 0
4531 16:31:25.975085 tx_last_pass[0][0][9] = 0
4532 16:31:25.978756 tx_win_center[0][0][10] = 0
4533 16:31:25.982016 tx_first_pass[0][0][10] = 0
4534 16:31:25.982127 tx_last_pass[0][0][10] = 0
4535 16:31:25.985286 tx_win_center[0][0][11] = 0
4536 16:31:25.988464 tx_first_pass[0][0][11] = 0
4537 16:31:25.992265 tx_last_pass[0][0][11] = 0
4538 16:31:25.992348 tx_win_center[0][0][12] = 0
4539 16:31:25.995083 tx_first_pass[0][0][12] = 0
4540 16:31:25.998446 tx_last_pass[0][0][12] = 0
4541 16:31:26.001866 tx_win_center[0][0][13] = 0
4542 16:31:26.001981 tx_first_pass[0][0][13] = 0
4543 16:31:26.004833 tx_last_pass[0][0][13] = 0
4544 16:31:26.008658 tx_win_center[0][0][14] = 0
4545 16:31:26.011799 tx_first_pass[0][0][14] = 0
4546 16:31:26.011885 tx_last_pass[0][0][14] = 0
4547 16:31:26.014949 tx_win_center[0][0][15] = 0
4548 16:31:26.018111 tx_first_pass[0][0][15] = 0
4549 16:31:26.021907 tx_last_pass[0][0][15] = 0
4550 16:31:26.022002 tx_win_center[0][1][0] = 0
4551 16:31:26.024948 tx_first_pass[0][1][0] = 0
4552 16:31:26.028631 tx_last_pass[0][1][0] = 0
4553 16:31:26.031884 tx_win_center[0][1][1] = 0
4554 16:31:26.031961 tx_first_pass[0][1][1] = 0
4555 16:31:26.034908 tx_last_pass[0][1][1] = 0
4556 16:31:26.038430 tx_win_center[0][1][2] = 0
4557 16:31:26.038513 tx_first_pass[0][1][2] = 0
4558 16:31:26.041585 tx_last_pass[0][1][2] = 0
4559 16:31:26.044875 tx_win_center[0][1][3] = 0
4560 16:31:26.048638 tx_first_pass[0][1][3] = 0
4561 16:31:26.048729 tx_last_pass[0][1][3] = 0
4562 16:31:26.051801 tx_win_center[0][1][4] = 0
4563 16:31:26.055347 tx_first_pass[0][1][4] = 0
4564 16:31:26.058260 tx_last_pass[0][1][4] = 0
4565 16:31:26.058349 tx_win_center[0][1][5] = 0
4566 16:31:26.061919 tx_first_pass[0][1][5] = 0
4567 16:31:26.064670 tx_last_pass[0][1][5] = 0
4568 16:31:26.064760 tx_win_center[0][1][6] = 0
4569 16:31:26.068058 tx_first_pass[0][1][6] = 0
4570 16:31:26.071422 tx_last_pass[0][1][6] = 0
4571 16:31:26.074898 tx_win_center[0][1][7] = 0
4572 16:31:26.074984 tx_first_pass[0][1][7] = 0
4573 16:31:26.078514 tx_last_pass[0][1][7] = 0
4574 16:31:26.081663 tx_win_center[0][1][8] = 0
4575 16:31:26.084729 tx_first_pass[0][1][8] = 0
4576 16:31:26.084821 tx_last_pass[0][1][8] = 0
4577 16:31:26.088610 tx_win_center[0][1][9] = 0
4578 16:31:26.091795 tx_first_pass[0][1][9] = 0
4579 16:31:26.091886 tx_last_pass[0][1][9] = 0
4580 16:31:26.094758 tx_win_center[0][1][10] = 0
4581 16:31:26.098554 tx_first_pass[0][1][10] = 0
4582 16:31:26.101600 tx_last_pass[0][1][10] = 0
4583 16:31:26.101692 tx_win_center[0][1][11] = 0
4584 16:31:26.105170 tx_first_pass[0][1][11] = 0
4585 16:31:26.108261 tx_last_pass[0][1][11] = 0
4586 16:31:26.111813 tx_win_center[0][1][12] = 0
4587 16:31:26.111905 tx_first_pass[0][1][12] = 0
4588 16:31:26.114867 tx_last_pass[0][1][12] = 0
4589 16:31:26.118656 tx_win_center[0][1][13] = 0
4590 16:31:26.121783 tx_first_pass[0][1][13] = 0
4591 16:31:26.121876 tx_last_pass[0][1][13] = 0
4592 16:31:26.124865 tx_win_center[0][1][14] = 0
4593 16:31:26.128630 tx_first_pass[0][1][14] = 0
4594 16:31:26.131825 tx_last_pass[0][1][14] = 0
4595 16:31:26.131917 tx_win_center[0][1][15] = 0
4596 16:31:26.134979 tx_first_pass[0][1][15] = 0
4597 16:31:26.137993 tx_last_pass[0][1][15] = 0
4598 16:31:26.141585 tx_win_center[1][0][0] = 0
4599 16:31:26.141669 tx_first_pass[1][0][0] = 0
4600 16:31:26.144780 tx_last_pass[1][0][0] = 0
4601 16:31:26.147997 tx_win_center[1][0][1] = 0
4602 16:31:26.151571 tx_first_pass[1][0][1] = 0
4603 16:31:26.151653 tx_last_pass[1][0][1] = 0
4604 16:31:26.154683 tx_win_center[1][0][2] = 0
4605 16:31:26.158357 tx_first_pass[1][0][2] = 0
4606 16:31:26.158437 tx_last_pass[1][0][2] = 0
4607 16:31:26.161501 tx_win_center[1][0][3] = 0
4608 16:31:26.164499 tx_first_pass[1][0][3] = 0
4609 16:31:26.168141 tx_last_pass[1][0][3] = 0
4610 16:31:26.168233 tx_win_center[1][0][4] = 0
4611 16:31:26.171204 tx_first_pass[1][0][4] = 0
4612 16:31:26.174893 tx_last_pass[1][0][4] = 0
4613 16:31:26.178110 tx_win_center[1][0][5] = 0
4614 16:31:26.178201 tx_first_pass[1][0][5] = 0
4615 16:31:26.181601 tx_last_pass[1][0][5] = 0
4616 16:31:26.184395 tx_win_center[1][0][6] = 0
4617 16:31:26.187985 tx_first_pass[1][0][6] = 0
4618 16:31:26.188076 tx_last_pass[1][0][6] = 0
4619 16:31:26.191293 tx_win_center[1][0][7] = 0
4620 16:31:26.194537 tx_first_pass[1][0][7] = 0
4621 16:31:26.194629 tx_last_pass[1][0][7] = 0
4622 16:31:26.197694 tx_win_center[1][0][8] = 0
4623 16:31:26.200891 tx_first_pass[1][0][8] = 0
4624 16:31:26.204770 tx_last_pass[1][0][8] = 0
4625 16:31:26.204885 tx_win_center[1][0][9] = 0
4626 16:31:26.207798 tx_first_pass[1][0][9] = 0
4627 16:31:26.211437 tx_last_pass[1][0][9] = 0
4628 16:31:26.214543 tx_win_center[1][0][10] = 0
4629 16:31:26.214664 tx_first_pass[1][0][10] = 0
4630 16:31:26.218048 tx_last_pass[1][0][10] = 0
4631 16:31:26.221093 tx_win_center[1][0][11] = 0
4632 16:31:26.224684 tx_first_pass[1][0][11] = 0
4633 16:31:26.224776 tx_last_pass[1][0][11] = 0
4634 16:31:26.227930 tx_win_center[1][0][12] = 0
4635 16:31:26.230932 tx_first_pass[1][0][12] = 0
4636 16:31:26.234711 tx_last_pass[1][0][12] = 0
4637 16:31:26.234803 tx_win_center[1][0][13] = 0
4638 16:31:26.237882 tx_first_pass[1][0][13] = 0
4639 16:31:26.241140 tx_last_pass[1][0][13] = 0
4640 16:31:26.244405 tx_win_center[1][0][14] = 0
4641 16:31:26.244497 tx_first_pass[1][0][14] = 0
4642 16:31:26.247899 tx_last_pass[1][0][14] = 0
4643 16:31:26.250918 tx_win_center[1][0][15] = 0
4644 16:31:26.254082 tx_first_pass[1][0][15] = 0
4645 16:31:26.254174 tx_last_pass[1][0][15] = 0
4646 16:31:26.257816 tx_win_center[1][1][0] = 0
4647 16:31:26.261473 tx_first_pass[1][1][0] = 0
4648 16:31:26.261565 tx_last_pass[1][1][0] = 0
4649 16:31:26.264509 tx_win_center[1][1][1] = 0
4650 16:31:26.268063 tx_first_pass[1][1][1] = 0
4651 16:31:26.271137 tx_last_pass[1][1][1] = 0
4652 16:31:26.271228 tx_win_center[1][1][2] = 0
4653 16:31:26.274229 tx_first_pass[1][1][2] = 0
4654 16:31:26.277928 tx_last_pass[1][1][2] = 0
4655 16:31:26.280901 tx_win_center[1][1][3] = 0
4656 16:31:26.280993 tx_first_pass[1][1][3] = 0
4657 16:31:26.284493 tx_last_pass[1][1][3] = 0
4658 16:31:26.288081 tx_win_center[1][1][4] = 0
4659 16:31:26.288172 tx_first_pass[1][1][4] = 0
4660 16:31:26.290968 tx_last_pass[1][1][4] = 0
4661 16:31:26.294399 tx_win_center[1][1][5] = 0
4662 16:31:26.297854 tx_first_pass[1][1][5] = 0
4663 16:31:26.297945 tx_last_pass[1][1][5] = 0
4664 16:31:26.301151 tx_win_center[1][1][6] = 0
4665 16:31:26.304152 tx_first_pass[1][1][6] = 0
4666 16:31:26.307380 tx_last_pass[1][1][6] = 0
4667 16:31:26.307481 tx_win_center[1][1][7] = 0
4668 16:31:26.311216 tx_first_pass[1][1][7] = 0
4669 16:31:26.314244 tx_last_pass[1][1][7] = 0
4670 16:31:26.314336 tx_win_center[1][1][8] = 0
4671 16:31:26.317437 tx_first_pass[1][1][8] = 0
4672 16:31:26.320862 tx_last_pass[1][1][8] = 0
4673 16:31:26.324307 tx_win_center[1][1][9] = 0
4674 16:31:26.324398 tx_first_pass[1][1][9] = 0
4675 16:31:26.327073 tx_last_pass[1][1][9] = 0
4676 16:31:26.331047 tx_win_center[1][1][10] = 0
4677 16:31:26.334074 tx_first_pass[1][1][10] = 0
4678 16:31:26.334165 tx_last_pass[1][1][10] = 0
4679 16:31:26.337196 tx_win_center[1][1][11] = 0
4680 16:31:26.340919 tx_first_pass[1][1][11] = 0
4681 16:31:26.344067 tx_last_pass[1][1][11] = 0
4682 16:31:26.344159 tx_win_center[1][1][12] = 0
4683 16:31:26.347104 tx_first_pass[1][1][12] = 0
4684 16:31:26.350545 tx_last_pass[1][1][12] = 0
4685 16:31:26.353622 tx_win_center[1][1][13] = 0
4686 16:31:26.353713 tx_first_pass[1][1][13] = 0
4687 16:31:26.357439 tx_last_pass[1][1][13] = 0
4688 16:31:26.360484 tx_win_center[1][1][14] = 0
4689 16:31:26.363473 tx_first_pass[1][1][14] = 0
4690 16:31:26.363592 tx_last_pass[1][1][14] = 0
4691 16:31:26.366566 tx_win_center[1][1][15] = 0
4692 16:31:26.370206 tx_first_pass[1][1][15] = 0
4693 16:31:26.373608 tx_last_pass[1][1][15] = 0
4694 16:31:26.373699 dump params rx window
4695 16:31:26.376518 rx_firspass[0][0][0] = 0
4696 16:31:26.380244 rx_lastpass[0][0][0] = 0
4697 16:31:26.380336 rx_firspass[0][0][1] = 0
4698 16:31:26.383249 rx_lastpass[0][0][1] = 0
4699 16:31:26.386914 rx_firspass[0][0][2] = 0
4700 16:31:26.387006 rx_lastpass[0][0][2] = 0
4701 16:31:26.390435 rx_firspass[0][0][3] = 0
4702 16:31:26.393521 rx_lastpass[0][0][3] = 0
4703 16:31:26.393612 rx_firspass[0][0][4] = 0
4704 16:31:26.397169 rx_lastpass[0][0][4] = 0
4705 16:31:26.400282 rx_firspass[0][0][5] = 0
4706 16:31:26.403307 rx_lastpass[0][0][5] = 0
4707 16:31:26.403397 rx_firspass[0][0][6] = 0
4708 16:31:26.406878 rx_lastpass[0][0][6] = 0
4709 16:31:26.410352 rx_firspass[0][0][7] = 0
4710 16:31:26.410444 rx_lastpass[0][0][7] = 0
4711 16:31:26.413704 rx_firspass[0][0][8] = 0
4712 16:31:26.416610 rx_lastpass[0][0][8] = 0
4713 16:31:26.416701 rx_firspass[0][0][9] = 0
4714 16:31:26.420429 rx_lastpass[0][0][9] = 0
4715 16:31:26.423328 rx_firspass[0][0][10] = 0
4716 16:31:26.423429 rx_lastpass[0][0][10] = 0
4717 16:31:26.427080 rx_firspass[0][0][11] = 0
4718 16:31:26.430098 rx_lastpass[0][0][11] = 0
4719 16:31:26.433647 rx_firspass[0][0][12] = 0
4720 16:31:26.433738 rx_lastpass[0][0][12] = 0
4721 16:31:26.436921 rx_firspass[0][0][13] = 0
4722 16:31:26.440231 rx_lastpass[0][0][13] = 0
4723 16:31:26.440322 rx_firspass[0][0][14] = 0
4724 16:31:26.443507 rx_lastpass[0][0][14] = 0
4725 16:31:26.446495 rx_firspass[0][0][15] = 0
4726 16:31:26.450204 rx_lastpass[0][0][15] = 0
4727 16:31:26.450295 rx_firspass[0][1][0] = 0
4728 16:31:26.453216 rx_lastpass[0][1][0] = 0
4729 16:31:26.456616 rx_firspass[0][1][1] = 0
4730 16:31:26.456707 rx_lastpass[0][1][1] = 0
4731 16:31:26.459732 rx_firspass[0][1][2] = 0
4732 16:31:26.463467 rx_lastpass[0][1][2] = 0
4733 16:31:26.463588 rx_firspass[0][1][3] = 0
4734 16:31:26.466485 rx_lastpass[0][1][3] = 0
4735 16:31:26.470143 rx_firspass[0][1][4] = 0
4736 16:31:26.470234 rx_lastpass[0][1][4] = 0
4737 16:31:26.473274 rx_firspass[0][1][5] = 0
4738 16:31:26.476866 rx_lastpass[0][1][5] = 0
4739 16:31:26.479712 rx_firspass[0][1][6] = 0
4740 16:31:26.479804 rx_lastpass[0][1][6] = 0
4741 16:31:26.483356 rx_firspass[0][1][7] = 0
4742 16:31:26.486512 rx_lastpass[0][1][7] = 0
4743 16:31:26.486603 rx_firspass[0][1][8] = 0
4744 16:31:26.489526 rx_lastpass[0][1][8] = 0
4745 16:31:26.493051 rx_firspass[0][1][9] = 0
4746 16:31:26.493142 rx_lastpass[0][1][9] = 0
4747 16:31:26.496754 rx_firspass[0][1][10] = 0
4748 16:31:26.499786 rx_lastpass[0][1][10] = 0
4749 16:31:26.503011 rx_firspass[0][1][11] = 0
4750 16:31:26.503102 rx_lastpass[0][1][11] = 0
4751 16:31:26.506124 rx_firspass[0][1][12] = 0
4752 16:31:26.509914 rx_lastpass[0][1][12] = 0
4753 16:31:26.510006 rx_firspass[0][1][13] = 0
4754 16:31:26.512936 rx_lastpass[0][1][13] = 0
4755 16:31:26.516630 rx_firspass[0][1][14] = 0
4756 16:31:26.519383 rx_lastpass[0][1][14] = 0
4757 16:31:26.519482 rx_firspass[0][1][15] = 0
4758 16:31:26.523015 rx_lastpass[0][1][15] = 0
4759 16:31:26.526427 rx_firspass[1][0][0] = 0
4760 16:31:26.526517 rx_lastpass[1][0][0] = 0
4761 16:31:26.529708 rx_firspass[1][0][1] = 0
4762 16:31:26.533073 rx_lastpass[1][0][1] = 0
4763 16:31:26.533164 rx_firspass[1][0][2] = 0
4764 16:31:26.536129 rx_lastpass[1][0][2] = 0
4765 16:31:26.539887 rx_firspass[1][0][3] = 0
4766 16:31:26.539978 rx_lastpass[1][0][3] = 0
4767 16:31:26.542852 rx_firspass[1][0][4] = 0
4768 16:31:26.546199 rx_lastpass[1][0][4] = 0
4769 16:31:26.549565 rx_firspass[1][0][5] = 0
4770 16:31:26.549657 rx_lastpass[1][0][5] = 0
4771 16:31:26.552945 rx_firspass[1][0][6] = 0
4772 16:31:26.556399 rx_lastpass[1][0][6] = 0
4773 16:31:26.556490 rx_firspass[1][0][7] = 0
4774 16:31:26.559326 rx_lastpass[1][0][7] = 0
4775 16:31:26.562854 rx_firspass[1][0][8] = 0
4776 16:31:26.562945 rx_lastpass[1][0][8] = 0
4777 16:31:26.565960 rx_firspass[1][0][9] = 0
4778 16:31:26.569698 rx_lastpass[1][0][9] = 0
4779 16:31:26.569789 rx_firspass[1][0][10] = 0
4780 16:31:26.572739 rx_lastpass[1][0][10] = 0
4781 16:31:26.575944 rx_firspass[1][0][11] = 0
4782 16:31:26.579524 rx_lastpass[1][0][11] = 0
4783 16:31:26.579616 rx_firspass[1][0][12] = 0
4784 16:31:26.582567 rx_lastpass[1][0][12] = 0
4785 16:31:26.586093 rx_firspass[1][0][13] = 0
4786 16:31:26.586184 rx_lastpass[1][0][13] = 0
4787 16:31:26.589245 rx_firspass[1][0][14] = 0
4788 16:31:26.592886 rx_lastpass[1][0][14] = 0
4789 16:31:26.595945 rx_firspass[1][0][15] = 0
4790 16:31:26.596036 rx_lastpass[1][0][15] = 0
4791 16:31:26.599042 rx_firspass[1][1][0] = 0
4792 16:31:26.602788 rx_lastpass[1][1][0] = 0
4793 16:31:26.602879 rx_firspass[1][1][1] = 0
4794 16:31:26.605926 rx_lastpass[1][1][1] = 0
4795 16:31:26.608971 rx_firspass[1][1][2] = 0
4796 16:31:26.609063 rx_lastpass[1][1][2] = 0
4797 16:31:26.612640 rx_firspass[1][1][3] = 0
4798 16:31:26.615715 rx_lastpass[1][1][3] = 0
4799 16:31:26.619526 rx_firspass[1][1][4] = 0
4800 16:31:26.619618 rx_lastpass[1][1][4] = 0
4801 16:31:26.622584 rx_firspass[1][1][5] = 0
4802 16:31:26.625671 rx_lastpass[1][1][5] = 0
4803 16:31:26.625762 rx_firspass[1][1][6] = 0
4804 16:31:26.629210 rx_lastpass[1][1][6] = 0
4805 16:31:26.632291 rx_firspass[1][1][7] = 0
4806 16:31:26.632382 rx_lastpass[1][1][7] = 0
4807 16:31:26.635905 rx_firspass[1][1][8] = 0
4808 16:31:26.639017 rx_lastpass[1][1][8] = 0
4809 16:31:26.639108 rx_firspass[1][1][9] = 0
4810 16:31:26.642256 rx_lastpass[1][1][9] = 0
4811 16:31:26.645644 rx_firspass[1][1][10] = 0
4812 16:31:26.645735 rx_lastpass[1][1][10] = 0
4813 16:31:26.649082 rx_firspass[1][1][11] = 0
4814 16:31:26.652795 rx_lastpass[1][1][11] = 0
4815 16:31:26.655829 rx_firspass[1][1][12] = 0
4816 16:31:26.655919 rx_lastpass[1][1][12] = 0
4817 16:31:26.659414 rx_firspass[1][1][13] = 0
4818 16:31:26.662295 rx_lastpass[1][1][13] = 0
4819 16:31:26.662386 rx_firspass[1][1][14] = 0
4820 16:31:26.665634 rx_lastpass[1][1][14] = 0
4821 16:31:26.669375 rx_firspass[1][1][15] = 0
4822 16:31:26.672564 rx_lastpass[1][1][15] = 0
4823 16:31:26.672656 dump params clk_delay
4824 16:31:26.675595 clk_delay[0] = 0
4825 16:31:26.675687 clk_delay[1] = 0
4826 16:31:26.679360 dump params dqs_delay
4827 16:31:26.679461 dqs_delay[0][0] = 0
4828 16:31:26.682371 dqs_delay[0][1] = 0
4829 16:31:26.682462 dqs_delay[1][0] = 0
4830 16:31:26.685504 dqs_delay[1][1] = 0
4831 16:31:26.688978 dump params delay_cell_unit = 735
4832 16:31:26.689070 dump source = 0x0
4833 16:31:26.692728 dump params frequency:800
4834 16:31:26.695659 dump params rank number:2
4835 16:31:26.695750
4836 16:31:26.695822 dump params write leveling
4837 16:31:26.699367 write leveling[0][0][0] = 0x0
4838 16:31:26.702459 write leveling[0][0][1] = 0x0
4839 16:31:26.705510 write leveling[0][1][0] = 0x0
4840 16:31:26.708942 write leveling[0][1][1] = 0x0
4841 16:31:26.712091 write leveling[1][0][0] = 0x0
4842 16:31:26.712182 write leveling[1][0][1] = 0x0
4843 16:31:26.715790 write leveling[1][1][0] = 0x0
4844 16:31:26.718986 write leveling[1][1][1] = 0x0
4845 16:31:26.719077 dump params cbt_cs
4846 16:31:26.722117 cbt_cs[0][0] = 0x0
4847 16:31:26.725776 cbt_cs[0][1] = 0x0
4848 16:31:26.725868 cbt_cs[1][0] = 0x0
4849 16:31:26.728759 cbt_cs[1][1] = 0x0
4850 16:31:26.728851 dump params cbt_mr12
4851 16:31:26.732412 cbt_mr12[0][0] = 0x0
4852 16:31:26.732503 cbt_mr12[0][1] = 0x0
4853 16:31:26.735458 cbt_mr12[1][0] = 0x0
4854 16:31:26.735550 cbt_mr12[1][1] = 0x0
4855 16:31:26.738685 dump params tx window
4856 16:31:26.742412 tx_center_min[0][0][0] = 0
4857 16:31:26.742504 tx_center_max[0][0][0] = 0
4858 16:31:26.745196 tx_center_min[0][0][1] = 0
4859 16:31:26.748726 tx_center_max[0][0][1] = 0
4860 16:31:26.752046 tx_center_min[0][1][0] = 0
4861 16:31:26.752139 tx_center_max[0][1][0] = 0
4862 16:31:26.755507 tx_center_min[0][1][1] = 0
4863 16:31:26.758770 tx_center_max[0][1][1] = 0
4864 16:31:26.761848 tx_center_min[1][0][0] = 0
4865 16:31:26.761943 tx_center_max[1][0][0] = 0
4866 16:31:26.765362 tx_center_min[1][0][1] = 0
4867 16:31:26.768963 tx_center_max[1][0][1] = 0
4868 16:31:26.771956 tx_center_min[1][1][0] = 0
4869 16:31:26.772048 tx_center_max[1][1][0] = 0
4870 16:31:26.775417 tx_center_min[1][1][1] = 0
4871 16:31:26.778688 tx_center_max[1][1][1] = 0
4872 16:31:26.778780 dump params tx window
4873 16:31:26.781928 tx_win_center[0][0][0] = 0
4874 16:31:26.785340 tx_first_pass[0][0][0] = 0
4875 16:31:26.788558 tx_last_pass[0][0][0] = 0
4876 16:31:26.788649 tx_win_center[0][0][1] = 0
4877 16:31:26.792167 tx_first_pass[0][0][1] = 0
4878 16:31:26.795134 tx_last_pass[0][0][1] = 0
4879 16:31:26.795226 tx_win_center[0][0][2] = 0
4880 16:31:26.798704 tx_first_pass[0][0][2] = 0
4881 16:31:26.801919 tx_last_pass[0][0][2] = 0
4882 16:31:26.805134 tx_win_center[0][0][3] = 0
4883 16:31:26.805226 tx_first_pass[0][0][3] = 0
4884 16:31:26.808748 tx_last_pass[0][0][3] = 0
4885 16:31:26.811800 tx_win_center[0][0][4] = 0
4886 16:31:26.815443 tx_first_pass[0][0][4] = 0
4887 16:31:26.815535 tx_last_pass[0][0][4] = 0
4888 16:31:26.818476 tx_win_center[0][0][5] = 0
4889 16:31:26.821591 tx_first_pass[0][0][5] = 0
4890 16:31:26.825347 tx_last_pass[0][0][5] = 0
4891 16:31:26.825438 tx_win_center[0][0][6] = 0
4892 16:31:26.828428 tx_first_pass[0][0][6] = 0
4893 16:31:26.832072 tx_last_pass[0][0][6] = 0
4894 16:31:26.832163 tx_win_center[0][0][7] = 0
4895 16:31:26.835124 tx_first_pass[0][0][7] = 0
4896 16:31:26.838196 tx_last_pass[0][0][7] = 0
4897 16:31:26.841404 tx_win_center[0][0][8] = 0
4898 16:31:26.841514 tx_first_pass[0][0][8] = 0
4899 16:31:26.845154 tx_last_pass[0][0][8] = 0
4900 16:31:26.848241 tx_win_center[0][0][9] = 0
4901 16:31:26.851352 tx_first_pass[0][0][9] = 0
4902 16:31:26.851453 tx_last_pass[0][0][9] = 0
4903 16:31:26.854512 tx_win_center[0][0][10] = 0
4904 16:31:26.858164 tx_first_pass[0][0][10] = 0
4905 16:31:26.861378 tx_last_pass[0][0][10] = 0
4906 16:31:26.861470 tx_win_center[0][0][11] = 0
4907 16:31:26.864838 tx_first_pass[0][0][11] = 0
4908 16:31:26.868207 tx_last_pass[0][0][11] = 0
4909 16:31:26.871053 tx_win_center[0][0][12] = 0
4910 16:31:26.871144 tx_first_pass[0][0][12] = 0
4911 16:31:26.874737 tx_last_pass[0][0][12] = 0
4912 16:31:26.878026 tx_win_center[0][0][13] = 0
4913 16:31:26.881056 tx_first_pass[0][0][13] = 0
4914 16:31:26.881148 tx_last_pass[0][0][13] = 0
4915 16:31:26.884798 tx_win_center[0][0][14] = 0
4916 16:31:26.887684 tx_first_pass[0][0][14] = 0
4917 16:31:26.891254 tx_last_pass[0][0][14] = 0
4918 16:31:26.891375 tx_win_center[0][0][15] = 0
4919 16:31:26.894615 tx_first_pass[0][0][15] = 0
4920 16:31:26.897862 tx_last_pass[0][0][15] = 0
4921 16:31:26.901107 tx_win_center[0][1][0] = 0
4922 16:31:26.901199 tx_first_pass[0][1][0] = 0
4923 16:31:26.904649 tx_last_pass[0][1][0] = 0
4924 16:31:26.907439 tx_win_center[0][1][1] = 0
4925 16:31:26.910916 tx_first_pass[0][1][1] = 0
4926 16:31:26.911007 tx_last_pass[0][1][1] = 0
4927 16:31:26.914776 tx_win_center[0][1][2] = 0
4928 16:31:26.917922 tx_first_pass[0][1][2] = 0
4929 16:31:26.918013 tx_last_pass[0][1][2] = 0
4930 16:31:26.921094 tx_win_center[0][1][3] = 0
4931 16:31:26.924238 tx_first_pass[0][1][3] = 0
4932 16:31:26.927872 tx_last_pass[0][1][3] = 0
4933 16:31:26.927963 tx_win_center[0][1][4] = 0
4934 16:31:26.930991 tx_first_pass[0][1][4] = 0
4935 16:31:26.934058 tx_last_pass[0][1][4] = 0
4936 16:31:26.937470 tx_win_center[0][1][5] = 0
4937 16:31:26.937561 tx_first_pass[0][1][5] = 0
4938 16:31:26.940527 tx_last_pass[0][1][5] = 0
4939 16:31:26.944303 tx_win_center[0][1][6] = 0
4940 16:31:26.944394 tx_first_pass[0][1][6] = 0
4941 16:31:26.947362 tx_last_pass[0][1][6] = 0
4942 16:31:26.950575 tx_win_center[0][1][7] = 0
4943 16:31:26.954280 tx_first_pass[0][1][7] = 0
4944 16:31:26.954402 tx_last_pass[0][1][7] = 0
4945 16:31:26.957314 tx_win_center[0][1][8] = 0
4946 16:31:26.960868 tx_first_pass[0][1][8] = 0
4947 16:31:26.963965 tx_last_pass[0][1][8] = 0
4948 16:31:26.964097 tx_win_center[0][1][9] = 0
4949 16:31:26.967074 tx_first_pass[0][1][9] = 0
4950 16:31:26.970770 tx_last_pass[0][1][9] = 0
4951 16:31:26.970892 tx_win_center[0][1][10] = 0
4952 16:31:26.973888 tx_first_pass[0][1][10] = 0
4953 16:31:26.977416 tx_last_pass[0][1][10] = 0
4954 16:31:26.980495 tx_win_center[0][1][11] = 0
4955 16:31:26.983940 tx_first_pass[0][1][11] = 0
4956 16:31:26.984081 tx_last_pass[0][1][11] = 0
4957 16:31:26.987234 tx_win_center[0][1][12] = 0
4958 16:31:26.990824 tx_first_pass[0][1][12] = 0
4959 16:31:26.990916 tx_last_pass[0][1][12] = 0
4960 16:31:26.994212 tx_win_center[0][1][13] = 0
4961 16:31:26.997557 tx_first_pass[0][1][13] = 0
4962 16:31:27.000458 tx_last_pass[0][1][13] = 0
4963 16:31:27.000549 tx_win_center[0][1][14] = 0
4964 16:31:27.003923 tx_first_pass[0][1][14] = 0
4965 16:31:27.007525 tx_last_pass[0][1][14] = 0
4966 16:31:27.010951 tx_win_center[0][1][15] = 0
4967 16:31:27.014083 tx_first_pass[0][1][15] = 0
4968 16:31:27.014175 tx_last_pass[0][1][15] = 0
4969 16:31:27.017677 tx_win_center[1][0][0] = 0
4970 16:31:27.020466 tx_first_pass[1][0][0] = 0
4971 16:31:27.020557 tx_last_pass[1][0][0] = 0
4972 16:31:27.023890 tx_win_center[1][0][1] = 0
4973 16:31:27.027363 tx_first_pass[1][0][1] = 0
4974 16:31:27.030433 tx_last_pass[1][0][1] = 0
4975 16:31:27.030525 tx_win_center[1][0][2] = 0
4976 16:31:27.033611 tx_first_pass[1][0][2] = 0
4977 16:31:27.037234 tx_last_pass[1][0][2] = 0
4978 16:31:27.040306 tx_win_center[1][0][3] = 0
4979 16:31:27.040398 tx_first_pass[1][0][3] = 0
4980 16:31:27.043943 tx_last_pass[1][0][3] = 0
4981 16:31:27.046975 tx_win_center[1][0][4] = 0
4982 16:31:27.047067 tx_first_pass[1][0][4] = 0
4983 16:31:27.050794 tx_last_pass[1][0][4] = 0
4984 16:31:27.053915 tx_win_center[1][0][5] = 0
4985 16:31:27.056990 tx_first_pass[1][0][5] = 0
4986 16:31:27.057081 tx_last_pass[1][0][5] = 0
4987 16:31:27.060711 tx_win_center[1][0][6] = 0
4988 16:31:27.063707 tx_first_pass[1][0][6] = 0
4989 16:31:27.063798 tx_last_pass[1][0][6] = 0
4990 16:31:27.067351 tx_win_center[1][0][7] = 0
4991 16:31:27.070444 tx_first_pass[1][0][7] = 0
4992 16:31:27.073503 tx_last_pass[1][0][7] = 0
4993 16:31:27.073595 tx_win_center[1][0][8] = 0
4994 16:31:27.077120 tx_first_pass[1][0][8] = 0
4995 16:31:27.080243 tx_last_pass[1][0][8] = 0
4996 16:31:27.084038 tx_win_center[1][0][9] = 0
4997 16:31:27.084129 tx_first_pass[1][0][9] = 0
4998 16:31:27.087069 tx_last_pass[1][0][9] = 0
4999 16:31:27.090085 tx_win_center[1][0][10] = 0
5000 16:31:27.093741 tx_first_pass[1][0][10] = 0
5001 16:31:27.093833 tx_last_pass[1][0][10] = 0
5002 16:31:27.096800 tx_win_center[1][0][11] = 0
5003 16:31:27.100293 tx_first_pass[1][0][11] = 0
5004 16:31:27.103828 tx_last_pass[1][0][11] = 0
5005 16:31:27.103920 tx_win_center[1][0][12] = 0
5006 16:31:27.107184 tx_first_pass[1][0][12] = 0
5007 16:31:27.110472 tx_last_pass[1][0][12] = 0
5008 16:31:27.113825 tx_win_center[1][0][13] = 0
5009 16:31:27.113917 tx_first_pass[1][0][13] = 0
5010 16:31:27.116949 tx_last_pass[1][0][13] = 0
5011 16:31:27.120575 tx_win_center[1][0][14] = 0
5012 16:31:27.123420 tx_first_pass[1][0][14] = 0
5013 16:31:27.123512 tx_last_pass[1][0][14] = 0
5014 16:31:27.127021 tx_win_center[1][0][15] = 0
5015 16:31:27.130573 tx_first_pass[1][0][15] = 0
5016 16:31:27.133393 tx_last_pass[1][0][15] = 0
5017 16:31:27.133484 tx_win_center[1][1][0] = 0
5018 16:31:27.136822 tx_first_pass[1][1][0] = 0
5019 16:31:27.140486 tx_last_pass[1][1][0] = 0
5020 16:31:27.140578 tx_win_center[1][1][1] = 0
5021 16:31:27.143382 tx_first_pass[1][1][1] = 0
5022 16:31:27.147132 tx_last_pass[1][1][1] = 0
5023 16:31:27.150141 tx_win_center[1][1][2] = 0
5024 16:31:27.150232 tx_first_pass[1][1][2] = 0
5025 16:31:27.153720 tx_last_pass[1][1][2] = 0
5026 16:31:27.156777 tx_win_center[1][1][3] = 0
5027 16:31:27.160460 tx_first_pass[1][1][3] = 0
5028 16:31:27.160552 tx_last_pass[1][1][3] = 0
5029 16:31:27.163551 tx_win_center[1][1][4] = 0
5030 16:31:27.166640 tx_first_pass[1][1][4] = 0
5031 16:31:27.166731 tx_last_pass[1][1][4] = 0
5032 16:31:27.170178 tx_win_center[1][1][5] = 0
5033 16:31:27.173338 tx_first_pass[1][1][5] = 0
5034 16:31:27.177131 tx_last_pass[1][1][5] = 0
5035 16:31:27.177223 tx_win_center[1][1][6] = 0
5036 16:31:27.180203 tx_first_pass[1][1][6] = 0
5037 16:31:27.183286 tx_last_pass[1][1][6] = 0
5038 16:31:27.187050 tx_win_center[1][1][7] = 0
5039 16:31:27.187142 tx_first_pass[1][1][7] = 0
5040 16:31:27.190170 tx_last_pass[1][1][7] = 0
5041 16:31:27.193175 tx_win_center[1][1][8] = 0
5042 16:31:27.193266 tx_first_pass[1][1][8] = 0
5043 16:31:27.196676 tx_last_pass[1][1][8] = 0
5044 16:31:27.199820 tx_win_center[1][1][9] = 0
5045 16:31:27.203535 tx_first_pass[1][1][9] = 0
5046 16:31:27.203626 tx_last_pass[1][1][9] = 0
5047 16:31:27.206635 tx_win_center[1][1][10] = 0
5048 16:31:27.210298 tx_first_pass[1][1][10] = 0
5049 16:31:27.213384 tx_last_pass[1][1][10] = 0
5050 16:31:27.213475 tx_win_center[1][1][11] = 0
5051 16:31:27.216881 tx_first_pass[1][1][11] = 0
5052 16:31:27.219909 tx_last_pass[1][1][11] = 0
5053 16:31:27.223533 tx_win_center[1][1][12] = 0
5054 16:31:27.223624 tx_first_pass[1][1][12] = 0
5055 16:31:27.226677 tx_last_pass[1][1][12] = 0
5056 16:31:27.229926 tx_win_center[1][1][13] = 0
5057 16:31:27.233253 tx_first_pass[1][1][13] = 0
5058 16:31:27.233345 tx_last_pass[1][1][13] = 0
5059 16:31:27.236863 tx_win_center[1][1][14] = 0
5060 16:31:27.239944 tx_first_pass[1][1][14] = 0
5061 16:31:27.243417 tx_last_pass[1][1][14] = 0
5062 16:31:27.243509 tx_win_center[1][1][15] = 0
5063 16:31:27.246549 tx_first_pass[1][1][15] = 0
5064 16:31:27.249655 tx_last_pass[1][1][15] = 0
5065 16:31:27.249747 dump params rx window
5066 16:31:27.253048 rx_firspass[0][0][0] = 0
5067 16:31:27.256349 rx_lastpass[0][0][0] = 0
5068 16:31:27.259703 rx_firspass[0][0][1] = 0
5069 16:31:27.259836 rx_lastpass[0][0][1] = 0
5070 16:31:27.262979 rx_firspass[0][0][2] = 0
5071 16:31:27.266571 rx_lastpass[0][0][2] = 0
5072 16:31:27.266685 rx_firspass[0][0][3] = 0
5073 16:31:27.269720 rx_lastpass[0][0][3] = 0
5074 16:31:27.273295 rx_firspass[0][0][4] = 0
5075 16:31:27.273385 rx_lastpass[0][0][4] = 0
5076 16:31:27.276435 rx_firspass[0][0][5] = 0
5077 16:31:27.279621 rx_lastpass[0][0][5] = 0
5078 16:31:27.279711 rx_firspass[0][0][6] = 0
5079 16:31:27.283193 rx_lastpass[0][0][6] = 0
5080 16:31:27.286358 rx_firspass[0][0][7] = 0
5081 16:31:27.286448 rx_lastpass[0][0][7] = 0
5082 16:31:27.290088 rx_firspass[0][0][8] = 0
5083 16:31:27.293228 rx_lastpass[0][0][8] = 0
5084 16:31:27.296248 rx_firspass[0][0][9] = 0
5085 16:31:27.296337 rx_lastpass[0][0][9] = 0
5086 16:31:27.299711 rx_firspass[0][0][10] = 0
5087 16:31:27.302774 rx_lastpass[0][0][10] = 0
5088 16:31:27.302864 rx_firspass[0][0][11] = 0
5089 16:31:27.306492 rx_lastpass[0][0][11] = 0
5090 16:31:27.309463 rx_firspass[0][0][12] = 0
5091 16:31:27.313147 rx_lastpass[0][0][12] = 0
5092 16:31:27.313238 rx_firspass[0][0][13] = 0
5093 16:31:27.316322 rx_lastpass[0][0][13] = 0
5094 16:31:27.319355 rx_firspass[0][0][14] = 0
5095 16:31:27.319456 rx_lastpass[0][0][14] = 0
5096 16:31:27.323139 rx_firspass[0][0][15] = 0
5097 16:31:27.326241 rx_lastpass[0][0][15] = 0
5098 16:31:27.326332 rx_firspass[0][1][0] = 0
5099 16:31:27.329893 rx_lastpass[0][1][0] = 0
5100 16:31:27.332923 rx_firspass[0][1][1] = 0
5101 16:31:27.336267 rx_lastpass[0][1][1] = 0
5102 16:31:27.336357 rx_firspass[0][1][2] = 0
5103 16:31:27.339746 rx_lastpass[0][1][2] = 0
5104 16:31:27.342735 rx_firspass[0][1][3] = 0
5105 16:31:27.342826 rx_lastpass[0][1][3] = 0
5106 16:31:27.346428 rx_firspass[0][1][4] = 0
5107 16:31:27.349398 rx_lastpass[0][1][4] = 0
5108 16:31:27.349488 rx_firspass[0][1][5] = 0
5109 16:31:27.352784 rx_lastpass[0][1][5] = 0
5110 16:31:27.356310 rx_firspass[0][1][6] = 0
5111 16:31:27.356402 rx_lastpass[0][1][6] = 0
5112 16:31:27.359656 rx_firspass[0][1][7] = 0
5113 16:31:27.362937 rx_lastpass[0][1][7] = 0
5114 16:31:27.363028 rx_firspass[0][1][8] = 0
5115 16:31:27.366278 rx_lastpass[0][1][8] = 0
5116 16:31:27.369520 rx_firspass[0][1][9] = 0
5117 16:31:27.369611 rx_lastpass[0][1][9] = 0
5118 16:31:27.373071 rx_firspass[0][1][10] = 0
5119 16:31:27.376012 rx_lastpass[0][1][10] = 0
5120 16:31:27.379378 rx_firspass[0][1][11] = 0
5121 16:31:27.379479 rx_lastpass[0][1][11] = 0
5122 16:31:27.382661 rx_firspass[0][1][12] = 0
5123 16:31:27.385962 rx_lastpass[0][1][12] = 0
5124 16:31:27.386053 rx_firspass[0][1][13] = 0
5125 16:31:27.389676 rx_lastpass[0][1][13] = 0
5126 16:31:27.392762 rx_firspass[0][1][14] = 0
5127 16:31:27.395833 rx_lastpass[0][1][14] = 0
5128 16:31:27.395930 rx_firspass[0][1][15] = 0
5129 16:31:27.399468 rx_lastpass[0][1][15] = 0
5130 16:31:27.402389 rx_firspass[1][0][0] = 0
5131 16:31:27.402481 rx_lastpass[1][0][0] = 0
5132 16:31:27.406090 rx_firspass[1][0][1] = 0
5133 16:31:27.409235 rx_lastpass[1][0][1] = 0
5134 16:31:27.409326 rx_firspass[1][0][2] = 0
5135 16:31:27.412739 rx_lastpass[1][0][2] = 0
5136 16:31:27.415804 rx_firspass[1][0][3] = 0
5137 16:31:27.419471 rx_lastpass[1][0][3] = 0
5138 16:31:27.419563 rx_firspass[1][0][4] = 0
5139 16:31:27.422495 rx_lastpass[1][0][4] = 0
5140 16:31:27.426145 rx_firspass[1][0][5] = 0
5141 16:31:27.426236 rx_lastpass[1][0][5] = 0
5142 16:31:27.429227 rx_firspass[1][0][6] = 0
5143 16:31:27.432285 rx_lastpass[1][0][6] = 0
5144 16:31:27.432376 rx_firspass[1][0][7] = 0
5145 16:31:27.435942 rx_lastpass[1][0][7] = 0
5146 16:31:27.438936 rx_firspass[1][0][8] = 0
5147 16:31:27.439027 rx_lastpass[1][0][8] = 0
5148 16:31:27.442478 rx_firspass[1][0][9] = 0
5149 16:31:27.445888 rx_lastpass[1][0][9] = 0
5150 16:31:27.448757 rx_firspass[1][0][10] = 0
5151 16:31:27.448848 rx_lastpass[1][0][10] = 0
5152 16:31:27.452059 rx_firspass[1][0][11] = 0
5153 16:31:27.455719 rx_lastpass[1][0][11] = 0
5154 16:31:27.455811 rx_firspass[1][0][12] = 0
5155 16:31:27.459195 rx_lastpass[1][0][12] = 0
5156 16:31:27.462682 rx_firspass[1][0][13] = 0
5157 16:31:27.465736 rx_lastpass[1][0][13] = 0
5158 16:31:27.465828 rx_firspass[1][0][14] = 0
5159 16:31:27.468737 rx_lastpass[1][0][14] = 0
5160 16:31:27.472494 rx_firspass[1][0][15] = 0
5161 16:31:27.472585 rx_lastpass[1][0][15] = 0
5162 16:31:27.475363 rx_firspass[1][1][0] = 0
5163 16:31:27.478721 rx_lastpass[1][1][0] = 0
5164 16:31:27.482048 rx_firspass[1][1][1] = 0
5165 16:31:27.482140 rx_lastpass[1][1][1] = 0
5166 16:31:27.485173 rx_firspass[1][1][2] = 0
5167 16:31:27.488803 rx_lastpass[1][1][2] = 0
5168 16:31:27.488894 rx_firspass[1][1][3] = 0
5169 16:31:27.492165 rx_lastpass[1][1][3] = 0
5170 16:31:27.495466 rx_firspass[1][1][4] = 0
5171 16:31:27.495557 rx_lastpass[1][1][4] = 0
5172 16:31:27.498892 rx_firspass[1][1][5] = 0
5173 16:31:27.502026 rx_lastpass[1][1][5] = 0
5174 16:31:27.502122 rx_firspass[1][1][6] = 0
5175 16:31:27.505636 rx_lastpass[1][1][6] = 0
5176 16:31:27.508715 rx_firspass[1][1][7] = 0
5177 16:31:27.508820 rx_lastpass[1][1][7] = 0
5178 16:31:27.512384 rx_firspass[1][1][8] = 0
5179 16:31:27.515470 rx_lastpass[1][1][8] = 0
5180 16:31:27.515561 rx_firspass[1][1][9] = 0
5181 16:31:27.518584 rx_lastpass[1][1][9] = 0
5182 16:31:27.522203 rx_firspass[1][1][10] = 0
5183 16:31:27.525359 rx_lastpass[1][1][10] = 0
5184 16:31:27.525456 rx_firspass[1][1][11] = 0
5185 16:31:27.529070 rx_lastpass[1][1][11] = 0
5186 16:31:27.532057 rx_firspass[1][1][12] = 0
5187 16:31:27.532149 rx_lastpass[1][1][12] = 0
5188 16:31:27.535163 rx_firspass[1][1][13] = 0
5189 16:31:27.538907 rx_lastpass[1][1][13] = 0
5190 16:31:27.542061 rx_firspass[1][1][14] = 0
5191 16:31:27.542152 rx_lastpass[1][1][14] = 0
5192 16:31:27.545745 rx_firspass[1][1][15] = 0
5193 16:31:27.548860 rx_lastpass[1][1][15] = 0
5194 16:31:27.548950 dump params clk_delay
5195 16:31:27.551913 clk_delay[0] = 0
5196 16:31:27.552005 clk_delay[1] = 0
5197 16:31:27.555361 dump params dqs_delay
5198 16:31:27.555462 dqs_delay[0][0] = 0
5199 16:31:27.558407 dqs_delay[0][1] = 0
5200 16:31:27.558497 dqs_delay[1][0] = 0
5201 16:31:27.561751 dqs_delay[1][1] = 0
5202 16:31:27.565120 dump params delay_cell_unit = 735
5203 16:31:27.568540 mt_set_emi_preloader end
5204 16:31:27.572029 [mt_mem_init] dram size: 0x100000000, rank number: 2
5205 16:31:27.575142 [complex_mem_test] start addr:0x40000000, len:20480
5206 16:31:27.613238 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5207 16:31:27.620184 [complex_mem_test] start addr:0x80000000, len:20480
5208 16:31:27.655584 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5209 16:31:27.662220 [complex_mem_test] start addr:0xc0000000, len:20480
5210 16:31:27.698234 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5211 16:31:27.704421 [complex_mem_test] start addr:0x56000000, len:8192
5212 16:31:27.721249 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5213 16:31:27.721343 ddr_geometry:1
5214 16:31:27.728107 [complex_mem_test] start addr:0x80000000, len:8192
5215 16:31:27.745080 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5216 16:31:27.748224 dram_init: dram init end (result: 0)
5217 16:31:27.754895 Successfully loaded DRAM blobs and ran DRAM calibration
5218 16:31:27.764676 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5219 16:31:27.764770 CBMEM:
5220 16:31:27.768232 IMD: root @ 00000000fffff000 254 entries.
5221 16:31:27.771263 IMD: root @ 00000000ffffec00 62 entries.
5222 16:31:27.777941 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5223 16:31:27.784510 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5224 16:31:27.787860 in-header: 03 a1 00 00 08 00 00 00
5225 16:31:27.791337 in-data: 84 60 60 10 00 00 00 00
5226 16:31:27.794985 Chrome EC: clear events_b mask to 0x0000000020004000
5227 16:31:27.802412 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5228 16:31:27.805519 in-header: 03 fd 00 00 00 00 00 00
5229 16:31:27.805610 in-data:
5230 16:31:27.812436 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5231 16:31:27.812529 CBFS @ 21000 size 3d4000
5232 16:31:27.818827 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5233 16:31:27.822325 CBFS: Locating 'fallback/ramstage'
5234 16:31:27.825170 CBFS: Found @ offset 10d40 size d563
5235 16:31:27.847084 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5236 16:31:27.858707 Accumulated console time in romstage 13562 ms
5237 16:31:27.858799
5238 16:31:27.858871
5239 16:31:27.869140 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5240 16:31:27.872226 ARM64: Exception handlers installed.
5241 16:31:27.872318 ARM64: Testing exception
5242 16:31:27.875240 ARM64: Done test exception
5243 16:31:27.879054 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5244 16:31:27.882133 Manufacturer: ef
5245 16:31:27.885186 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5246 16:31:27.892294 WARNING: RO_VPD is uninitialized or empty.
5247 16:31:27.895300 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5248 16:31:27.898745 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5249 16:31:27.908797 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5250 16:31:27.911746 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5251 16:31:27.918368 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5252 16:31:27.918461 Enumerating buses...
5253 16:31:27.925388 Show all devs... Before device enumeration.
5254 16:31:27.925480 Root Device: enabled 1
5255 16:31:27.928356 CPU_CLUSTER: 0: enabled 1
5256 16:31:27.928447 CPU: 00: enabled 1
5257 16:31:27.931711 Compare with tree...
5258 16:31:27.934923 Root Device: enabled 1
5259 16:31:27.935015 CPU_CLUSTER: 0: enabled 1
5260 16:31:27.938254 CPU: 00: enabled 1
5261 16:31:27.941827 Root Device scanning...
5262 16:31:27.941919 root_dev_scan_bus for Root Device
5263 16:31:27.945384 CPU_CLUSTER: 0 enabled
5264 16:31:27.948519 root_dev_scan_bus for Root Device done
5265 16:31:27.955253 scan_bus: scanning of bus Root Device took 10691 usecs
5266 16:31:27.955345 done
5267 16:31:27.958307 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5268 16:31:27.961877 Allocating resources...
5269 16:31:27.961968 Reading resources...
5270 16:31:27.964982 Root Device read_resources bus 0 link: 0
5271 16:31:27.971716 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5272 16:31:27.971808 CPU: 00 missing read_resources
5273 16:31:27.978384 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5274 16:31:27.981480 Root Device read_resources bus 0 link: 0 done
5275 16:31:27.984544 Done reading resources.
5276 16:31:27.988300 Show resources in subtree (Root Device)...After reading.
5277 16:31:27.991343 Root Device child on link 0 CPU_CLUSTER: 0
5278 16:31:27.995081 CPU_CLUSTER: 0 child on link 0 CPU: 00
5279 16:31:28.004525 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5280 16:31:28.004647 CPU: 00
5281 16:31:28.008123 Setting resources...
5282 16:31:28.011123 Root Device assign_resources, bus 0 link: 0
5283 16:31:28.014858 CPU_CLUSTER: 0 missing set_resources
5284 16:31:28.017846 Root Device assign_resources, bus 0 link: 0
5285 16:31:28.021517 Done setting resources.
5286 16:31:28.028158 Show resources in subtree (Root Device)...After assigning values.
5287 16:31:28.031776 Root Device child on link 0 CPU_CLUSTER: 0
5288 16:31:28.034988 CPU_CLUSTER: 0 child on link 0 CPU: 00
5289 16:31:28.045077 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5290 16:31:28.045168 CPU: 00
5291 16:31:28.047870 Done allocating resources.
5292 16:31:28.051646 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5293 16:31:28.054661 Enabling resources...
5294 16:31:28.054751 done.
5295 16:31:28.057818 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5296 16:31:28.061296 Initializing devices...
5297 16:31:28.061387 Root Device init ...
5298 16:31:28.064860 mainboard_init: Starting display init.
5299 16:31:28.067988 ADC[4]: Raw value=75746 ID=0
5300 16:31:28.091288 anx7625_power_on_init: Init interface.
5301 16:31:28.094958 anx7625_disable_pd_protocol: Disabled PD feature.
5302 16:31:28.101057 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5303 16:31:28.147978 anx7625_start_dp_work: Secure OCM version=00
5304 16:31:28.151604 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5305 16:31:28.168437 sp_tx_get_edid_block: EDID Block = 1
5306 16:31:28.285527 Extracted contents:
5307 16:31:28.288900 header: 00 ff ff ff ff ff ff 00
5308 16:31:28.292540 serial number: 06 af 5c 14 00 00 00 00 00 1a
5309 16:31:28.295382 version: 01 04
5310 16:31:28.299202 basic params: 95 1a 0e 78 02
5311 16:31:28.302354 chroma info: 99 85 95 55 56 92 28 22 50 54
5312 16:31:28.305502 established: 00 00 00
5313 16:31:28.312167 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5314 16:31:28.315691 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5315 16:31:28.322418 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5316 16:31:28.328960 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5317 16:31:28.335768 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5318 16:31:28.339308 extensions: 00
5319 16:31:28.339399 checksum: ae
5320 16:31:28.339479
5321 16:31:28.342474 Manufacturer: AUO Model 145c Serial Number 0
5322 16:31:28.345495 Made week 0 of 2016
5323 16:31:28.345587 EDID version: 1.4
5324 16:31:28.349190 Digital display
5325 16:31:28.352237 6 bits per primary color channel
5326 16:31:28.352330 DisplayPort interface
5327 16:31:28.355743 Maximum image size: 26 cm x 14 cm
5328 16:31:28.359211 Gamma: 220%
5329 16:31:28.359303 Check DPMS levels
5330 16:31:28.362404 Supported color formats: RGB 4:4:4
5331 16:31:28.365407 First detailed timing is preferred timing
5332 16:31:28.369190 Established timings supported:
5333 16:31:28.372335 Standard timings supported:
5334 16:31:28.372426 Detailed timings
5335 16:31:28.375475 Hex of detail: ce1d56ea50001a3030204600009010000018
5336 16:31:28.382184 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5337 16:31:28.385830 0556 0586 05a6 0640 hborder 0
5338 16:31:28.388637 0300 0304 030a 031a vborder 0
5339 16:31:28.392251 -hsync -vsync
5340 16:31:28.395735 Did detailed timing
5341 16:31:28.398827 Hex of detail: 0000000f0000000000000000000000000020
5342 16:31:28.402472 Manufacturer-specified data, tag 15
5343 16:31:28.405427 Hex of detail: 000000fe0041554f0a202020202020202020
5344 16:31:28.408861 ASCII string: AUO
5345 16:31:28.412263 Hex of detail: 000000fe004231313658414230312e34200a
5346 16:31:28.415667 ASCII string: B116XAB01.4
5347 16:31:28.415758 Checksum
5348 16:31:28.419007 Checksum: 0xae (valid)
5349 16:31:28.425918 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5350 16:31:28.426011 DSI data_rate: 457800000 bps
5351 16:31:28.432810 anx7625_parse_edid: set default k value to 0x3d for panel
5352 16:31:28.435685 anx7625_parse_edid: pixelclock(76300).
5353 16:31:28.439495 hactive(1366), hsync(32), hfp(48), hbp(154)
5354 16:31:28.442532 vactive(768), vsync(6), vfp(4), vbp(16)
5355 16:31:28.446270 anx7625_dsi_config: config dsi.
5356 16:31:28.454264 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5357 16:31:28.474809 anx7625_dsi_config: success to config DSI
5358 16:31:28.478495 anx7625_dp_start: MIPI phy setup OK.
5359 16:31:28.481573 [SSUSB] Setting up USB HOST controller...
5360 16:31:28.484659 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5361 16:31:28.488245 [SSUSB] phy power-on done.
5362 16:31:28.491829 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5363 16:31:28.495252 in-header: 03 fc 01 00 00 00 00 00
5364 16:31:28.495344 in-data:
5365 16:31:28.498865 handle_proto3_response: EC response with error code: 1
5366 16:31:28.501858 SPM: pcm index = 1
5367 16:31:28.505654 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5368 16:31:28.508846 CBFS @ 21000 size 3d4000
5369 16:31:28.515415 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5370 16:31:28.518899 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5371 16:31:28.522447 CBFS: Found @ offset 1e7c0 size 1026
5372 16:31:28.529140 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5373 16:31:28.532094 SPM: binary array size = 2988
5374 16:31:28.535402 SPM: version = pcm_allinone_v1.17.2_20180829
5375 16:31:28.538685 SPM binary loaded in 32 msecs
5376 16:31:28.545956 spm_kick_im_to_fetch: ptr = 000000004021eec2
5377 16:31:28.549066 spm_kick_im_to_fetch: len = 2988
5378 16:31:28.549147 SPM: spm_kick_pcm_to_run
5379 16:31:28.552738 SPM: spm_kick_pcm_to_run done
5380 16:31:28.555906 SPM: spm_init done in 52 msecs
5381 16:31:28.559489 Root Device init finished in 494991 usecs
5382 16:31:28.562545 CPU_CLUSTER: 0 init ...
5383 16:31:28.572466 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5384 16:31:28.575828 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5385 16:31:28.579521 CBFS @ 21000 size 3d4000
5386 16:31:28.582546 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5387 16:31:28.585655 CBFS: Locating 'sspm.bin'
5388 16:31:28.589380 CBFS: Found @ offset 208c0 size 41cb
5389 16:31:28.599198 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5390 16:31:28.607087 CPU_CLUSTER: 0 init finished in 42800 usecs
5391 16:31:28.607207 Devices initialized
5392 16:31:28.610682 Show all devs... After init.
5393 16:31:28.613807 Root Device: enabled 1
5394 16:31:28.613898 CPU_CLUSTER: 0: enabled 1
5395 16:31:28.617037 CPU: 00: enabled 1
5396 16:31:28.620693 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5397 16:31:28.623571 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5398 16:31:28.627088 ELOG: NV offset 0x558000 size 0x1000
5399 16:31:28.634429 read SPI 0x558000 0x1000: 1258 us, 3255 KB/s, 26.040 Mbps
5400 16:31:28.641232 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5401 16:31:28.644735 ELOG: Event(17) added with size 13 at 2024-06-17 16:30:30 UTC
5402 16:31:28.648175 out: cmd=0x121: 03 db 21 01 00 00 00 00
5403 16:31:28.651350 in-header: 03 63 00 00 2c 00 00 00
5404 16:31:28.664833 in-data: 28 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 76 25 08 00 06 80 00 00 08 62 0c 00 06 80 00 00 9e c3 07 00 06 80 00 00 e2 5f 0f 00
5405 16:31:28.668483 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5406 16:31:28.671643 in-header: 03 19 00 00 08 00 00 00
5407 16:31:28.674747 in-data: a2 e0 47 00 13 00 00 00
5408 16:31:28.678416 Chrome EC: UHEPI supported
5409 16:31:28.684710 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5410 16:31:28.688380 in-header: 03 e1 00 00 08 00 00 00
5411 16:31:28.691505 in-data: 84 20 60 10 00 00 00 00
5412 16:31:28.694626 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5413 16:31:28.701308 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5414 16:31:28.704998 in-header: 03 e1 00 00 08 00 00 00
5415 16:31:28.707983 in-data: 84 20 60 10 00 00 00 00
5416 16:31:28.714900 ELOG: Event(A1) added with size 10 at 2024-06-17 16:30:30 UTC
5417 16:31:28.721258 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5418 16:31:28.724894 ELOG: Event(A0) added with size 9 at 2024-06-17 16:30:30 UTC
5419 16:31:28.727837 elog_add_boot_reason: Logged dev mode boot
5420 16:31:28.731307 Finalize devices...
5421 16:31:28.734387 Devices finalized
5422 16:31:28.738109 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5423 16:31:28.741233 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5424 16:31:28.748052 ELOG: Event(91) added with size 10 at 2024-06-17 16:30:30 UTC
5425 16:31:28.751102 Writing coreboot table at 0xffeda000
5426 16:31:28.754863 0. 0000000000114000-000000000011efff: RAMSTAGE
5427 16:31:28.761140 1. 0000000040000000-000000004023cfff: RAMSTAGE
5428 16:31:28.764659 2. 000000004023d000-00000000545fffff: RAM
5429 16:31:28.767639 3. 0000000054600000-000000005465ffff: BL31
5430 16:31:28.771300 4. 0000000054660000-00000000ffed9fff: RAM
5431 16:31:28.778162 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5432 16:31:28.781237 6. 0000000100000000-000000013fffffff: RAM
5433 16:31:28.781329 Passing 5 GPIOs to payload:
5434 16:31:28.788049 NAME | PORT | POLARITY | VALUE
5435 16:31:28.791309 write protect | 0x00000096 | low | low
5436 16:31:28.797893 EC in RW | 0x000000b1 | high | undefined
5437 16:31:28.800918 EC interrupt | 0x00000097 | low | undefined
5438 16:31:28.807730 TPM interrupt | 0x00000099 | high | undefined
5439 16:31:28.810805 speaker enable | 0x000000af | high | undefined
5440 16:31:28.814559 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5441 16:31:28.817689 in-header: 03 f7 00 00 02 00 00 00
5442 16:31:28.817781 in-data: 04 00
5443 16:31:28.820646 Board ID: 4
5444 16:31:28.824471 ADC[3]: Raw value=215860 ID=1
5445 16:31:28.824563 RAM code: 1
5446 16:31:28.824636 SKU ID: 16
5447 16:31:28.830711 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5448 16:31:28.830803 CBFS @ 21000 size 3d4000
5449 16:31:28.837254 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5450 16:31:28.843912 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum dfc6
5451 16:31:28.844004 coreboot table: 940 bytes.
5452 16:31:28.850714 IMD ROOT 0. 00000000fffff000 00001000
5453 16:31:28.854482 IMD SMALL 1. 00000000ffffe000 00001000
5454 16:31:28.857553 CONSOLE 2. 00000000fffde000 00020000
5455 16:31:28.860677 FMAP 3. 00000000fffdd000 0000047c
5456 16:31:28.864231 TIME STAMP 4. 00000000fffdc000 00000910
5457 16:31:28.867260 RAMOOPS 5. 00000000ffedc000 00100000
5458 16:31:28.871017 COREBOOT 6. 00000000ffeda000 00002000
5459 16:31:28.874052 IMD small region:
5460 16:31:28.877638 IMD ROOT 0. 00000000ffffec00 00000400
5461 16:31:28.880621 VBOOT WORK 1. 00000000ffffeb00 00000100
5462 16:31:28.884179 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5463 16:31:28.887411 VPD 3. 00000000ffffea60 0000006c
5464 16:31:28.893759 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5465 16:31:28.900611 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5466 16:31:28.904270 in-header: 03 e1 00 00 08 00 00 00
5467 16:31:28.904362 in-data: 84 20 60 10 00 00 00 00
5468 16:31:28.910440 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5469 16:31:28.910532 CBFS @ 21000 size 3d4000
5470 16:31:28.917371 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5471 16:31:28.920452 CBFS: Locating 'fallback/payload'
5472 16:31:28.928851 CBFS: Found @ offset dc040 size 439a0
5473 16:31:29.016634 read SPI 0xfd078 0x439a0: 84384 us, 3281 KB/s, 26.248 Mbps
5474 16:31:29.020357 Checking segment from ROM address 0x0000000040003a00
5475 16:31:29.026553 Checking segment from ROM address 0x0000000040003a1c
5476 16:31:29.030173 Loading segment from ROM address 0x0000000040003a00
5477 16:31:29.033214 code (compression=0)
5478 16:31:29.043206 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5479 16:31:29.050233 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5480 16:31:29.053088 it's not compressed!
5481 16:31:29.056718 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5482 16:31:29.062928 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5483 16:31:29.071148 Loading segment from ROM address 0x0000000040003a1c
5484 16:31:29.074135 Entry Point 0x0000000080000000
5485 16:31:29.074228 Loaded segments
5486 16:31:29.081269 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5487 16:31:29.084338 Jumping to boot code at 0000000080000000(00000000ffeda000)
5488 16:31:29.094135 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5489 16:31:29.097685 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5490 16:31:29.100804 CBFS @ 21000 size 3d4000
5491 16:31:29.107552 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5492 16:31:29.110517 CBFS: Locating 'fallback/bl31'
5493 16:31:29.113693 CBFS: Found @ offset 36dc0 size 5820
5494 16:31:29.124605 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5495 16:31:29.128413 Checking segment from ROM address 0x0000000040003a00
5496 16:31:29.134614 Checking segment from ROM address 0x0000000040003a1c
5497 16:31:29.138375 Loading segment from ROM address 0x0000000040003a00
5498 16:31:29.141443 code (compression=1)
5499 16:31:29.147985 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5500 16:31:29.158312 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5501 16:31:29.158405 using LZMA
5502 16:31:29.166780 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5503 16:31:29.173539 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5504 16:31:29.176958 Loading segment from ROM address 0x0000000040003a1c
5505 16:31:29.179852 Entry Point 0x0000000054601000
5506 16:31:29.179943 Loaded segments
5507 16:31:29.183534 NOTICE: MT8183 bl31_setup
5508 16:31:29.190232 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5509 16:31:29.193849 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5510 16:31:29.196927 INFO: [DEVAPC] dump DEVAPC registers:
5511 16:31:29.206940 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5512 16:31:29.213863 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5513 16:31:29.223509 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5514 16:31:29.230286 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5515 16:31:29.240027 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5516 16:31:29.246715 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5517 16:31:29.256698 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5518 16:31:29.263286 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5519 16:31:29.270347 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5520 16:31:29.280013 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5521 16:31:29.286603 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5522 16:31:29.296838 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5523 16:31:29.303065 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5524 16:31:29.313043 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5525 16:31:29.319854 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5526 16:31:29.326444 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5527 16:31:29.333104 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5528 16:31:29.339905 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5529 16:31:29.349706 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5530 16:31:29.356452 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5531 16:31:29.363283 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5532 16:31:29.369345 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5533 16:31:29.373102 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5534 16:31:29.376157 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5535 16:31:29.379793 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5536 16:31:29.382842 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5537 16:31:29.385954 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5538 16:31:29.393138 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5539 16:31:29.399340 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5540 16:31:29.399438 WARNING: region 0:
5541 16:31:29.402750 WARNING: apc:0x168, sa:0x0, ea:0xfff
5542 16:31:29.406177 WARNING: region 1:
5543 16:31:29.409807 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5544 16:31:29.409899 WARNING: region 2:
5545 16:31:29.413087 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5546 16:31:29.416099 WARNING: region 3:
5547 16:31:29.419186 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5548 16:31:29.422831 WARNING: region 4:
5549 16:31:29.425996 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5550 16:31:29.426088 WARNING: region 5:
5551 16:31:29.429572 WARNING: apc:0x0, sa:0x0, ea:0x0
5552 16:31:29.432525 WARNING: region 6:
5553 16:31:29.436225 WARNING: apc:0x0, sa:0x0, ea:0x0
5554 16:31:29.436315 WARNING: region 7:
5555 16:31:29.439382 WARNING: apc:0x0, sa:0x0, ea:0x0
5556 16:31:29.446237 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5557 16:31:29.449334 INFO: SPM: enable SPMC mode
5558 16:31:29.452806 NOTICE: spm_boot_init() start
5559 16:31:29.455758 NOTICE: spm_boot_init() end
5560 16:31:29.459261 INFO: BL31: Initializing runtime services
5561 16:31:29.465617 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5562 16:31:29.469060 INFO: BL31: Preparing for EL3 exit to normal world
5563 16:31:29.472431 INFO: Entry point address = 0x80000000
5564 16:31:29.475378 INFO: SPSR = 0x8
5565 16:31:29.496831
5566 16:31:29.496922
5567 16:31:29.496993
5568 16:31:29.497479 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5569 16:31:29.497589 start: 2.2.4 bootloader-commands (timeout 00:04:26) [common]
5570 16:31:29.497677 Setting prompt string to ['jacuzzi:']
5571 16:31:29.497770 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:26)
5572 16:31:29.500508 Starting depthcharge on Juniper...
5573 16:31:29.500598
5574 16:31:29.503453 vboot_handoff: creating legacy vboot_handoff structure
5575 16:31:29.503544
5576 16:31:29.506890 ec_init(0): CrosEC protocol v3 supported (544, 544)
5577 16:31:29.506980
5578 16:31:29.510368 Wipe memory regions:
5579 16:31:29.510458
5580 16:31:29.513742 [0x00000040000000, 0x00000054600000)
5581 16:31:29.556426
5582 16:31:29.556528 [0x00000054660000, 0x00000080000000)
5583 16:31:29.648085
5584 16:31:29.648214 [0x000000811994a0, 0x000000ffeda000)
5585 16:31:29.907781
5586 16:31:29.907937 [0x00000100000000, 0x00000140000000)
5587 16:31:30.041013
5588 16:31:30.044419 Initializing XHCI USB controller at 0x11200000.
5589 16:31:30.067271
5590 16:31:30.070217 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5591 16:31:30.070311
5592 16:31:30.070383
5593 16:31:30.070683 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5595 16:31:30.171057 jacuzzi: tftpboot 192.168.201.1 14396111/tftp-deploy-kbn0hmiy/kernel/image.itb 14396111/tftp-deploy-kbn0hmiy/kernel/cmdline
5596 16:31:30.171217 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5597 16:31:30.171307 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:25)
5598 16:31:30.175614 tftpboot 192.168.201.1 14396111/tftp-deploy-kbn0hmiy/kernel/image.ittp-deploy-kbn0hmiy/kernel/cmdline
5599 16:31:30.175707
5600 16:31:30.175778 Waiting for link
5601 16:31:30.581893
5602 16:31:30.582409 R8152: Initializing
5603 16:31:30.582746
5604 16:31:30.584802 Version 9 (ocp_data = 6010)
5605 16:31:30.585305
5606 16:31:30.587774 R8152: Done initializing
5607 16:31:30.588255
5608 16:31:30.588697 Adding net device
5609 16:31:30.973828
5610 16:31:30.973995 done.
5611 16:31:30.974070
5612 16:31:30.974138 MAC: 00:e0:4c:68:0b:b9
5613 16:31:30.974203
5614 16:31:30.976729 Sending DHCP discover... done.
5615 16:31:30.976823
5616 16:31:30.980015 Waiting for reply... done.
5617 16:31:30.980106
5618 16:31:30.983169 Sending DHCP request... done.
5619 16:31:30.983259
5620 16:31:30.983331 Waiting for reply... done.
5621 16:31:30.983398
5622 16:31:30.986542 My ip is 192.168.201.13
5623 16:31:30.986633
5624 16:31:30.990117 The DHCP server ip is 192.168.201.1
5625 16:31:30.990207
5626 16:31:30.993721 TFTP server IP predefined by user: 192.168.201.1
5627 16:31:30.993811
5628 16:31:30.999824 Bootfile predefined by user: 14396111/tftp-deploy-kbn0hmiy/kernel/image.itb
5629 16:31:30.999915
5630 16:31:31.003525 Sending tftp read request... done.
5631 16:31:31.003615
5632 16:31:31.006405 Waiting for the transfer...
5633 16:31:31.006495
5634 16:31:31.285780 00000000 ################################################################
5635 16:31:31.285940
5636 16:31:31.555442 00080000 ################################################################
5637 16:31:31.555596
5638 16:31:31.814414 00100000 ################################################################
5639 16:31:31.814570
5640 16:31:32.081712 00180000 ################################################################
5641 16:31:32.081873
5642 16:31:32.346417 00200000 ################################################################
5643 16:31:32.346580
5644 16:31:32.609020 00280000 ################################################################
5645 16:31:32.609216
5646 16:31:32.874234 00300000 ################################################################
5647 16:31:32.874394
5648 16:31:33.144150 00380000 ################################################################
5649 16:31:33.144297
5650 16:31:33.390901 00400000 ################################################################
5651 16:31:33.391061
5652 16:31:33.636983 00480000 ################################################################
5653 16:31:33.637144
5654 16:31:33.883862 00500000 ################################################################
5655 16:31:33.884017
5656 16:31:34.131745 00580000 ################################################################
5657 16:31:34.131909
5658 16:31:34.386558 00600000 ################################################################
5659 16:31:34.386726
5660 16:31:34.635195 00680000 ################################################################
5661 16:31:34.635345
5662 16:31:34.895587 00700000 ################################################################
5663 16:31:34.895750
5664 16:31:35.141690 00780000 ################################################################
5665 16:31:35.141852
5666 16:31:35.390494 00800000 ################################################################
5667 16:31:35.390653
5668 16:31:35.636421 00880000 ################################################################
5669 16:31:35.636581
5670 16:31:35.882778 00900000 ################################################################
5671 16:31:35.882934
5672 16:31:36.129152 00980000 ################################################################
5673 16:31:36.129316
5674 16:31:36.379184 00a00000 ################################################################
5675 16:31:36.379343
5676 16:31:36.632998 00a80000 ################################################################
5677 16:31:36.633157
5678 16:31:36.878748 00b00000 ################################################################
5679 16:31:36.878905
5680 16:31:37.124720 00b80000 ################################################################
5681 16:31:37.124880
5682 16:31:37.376673 00c00000 ################################################################
5683 16:31:37.376835
5684 16:31:37.647839 00c80000 ################################################################
5685 16:31:37.647999
5686 16:31:37.914040 00d00000 ################################################################
5687 16:31:37.914200
5688 16:31:38.202513 00d80000 ################################################################
5689 16:31:38.202677
5690 16:31:38.490907 00e00000 ################################################################
5691 16:31:38.491120
5692 16:31:38.760598 00e80000 ################################################################
5693 16:31:38.760757
5694 16:31:39.033069 00f00000 ################################################################
5695 16:31:39.033226
5696 16:31:39.289968 00f80000 ################################################################
5697 16:31:39.290127
5698 16:31:39.546877 01000000 ################################################################
5699 16:31:39.547018
5700 16:31:39.794093 01080000 ################################################################
5701 16:31:39.794236
5702 16:31:40.051992 01100000 ################################################################
5703 16:31:40.052163
5704 16:31:40.302514 01180000 ################################################################
5705 16:31:40.302667
5706 16:31:40.553754 01200000 ################################################################
5707 16:31:40.553899
5708 16:31:40.799676 01280000 ################################################################
5709 16:31:40.799838
5710 16:31:41.046736 01300000 ################################################################
5711 16:31:41.046894
5712 16:31:41.295231 01380000 ################################################################
5713 16:31:41.295395
5714 16:31:41.560149 01400000 ################################################################
5715 16:31:41.560309
5716 16:31:41.813604 01480000 ################################################################
5717 16:31:41.813767
5718 16:31:42.070100 01500000 ################################################################
5719 16:31:42.070266
5720 16:31:42.331678 01580000 ################################################################
5721 16:31:42.331832
5722 16:31:42.595324 01600000 ################################################################
5723 16:31:42.595501
5724 16:31:42.856373 01680000 ################################################################
5725 16:31:42.856527
5726 16:31:43.110262 01700000 ################################################################
5727 16:31:43.110416
5728 16:31:43.365655 01780000 ################################################################
5729 16:31:43.365841
5730 16:31:43.619210 01800000 ################################################################
5731 16:31:43.619358
5732 16:31:43.877625 01880000 ################################################################
5733 16:31:43.877788
5734 16:31:44.156533 01900000 ################################################################
5735 16:31:44.156691
5736 16:31:44.420248 01980000 ################################################################
5737 16:31:44.420395
5738 16:31:44.671491 01a00000 ################################################################
5739 16:31:44.671646
5740 16:31:44.920776 01a80000 ################################################################
5741 16:31:44.920941
5742 16:31:45.183538 01b00000 ################################################################
5743 16:31:45.183696
5744 16:31:45.461041 01b80000 ################################################################
5745 16:31:45.461195
5746 16:31:45.728967 01c00000 ################################################################
5747 16:31:45.729126
5748 16:31:45.979746 01c80000 ################################################################
5749 16:31:45.979912
5750 16:31:46.228550 01d00000 ################################################################
5751 16:31:46.228697
5752 16:31:46.480096 01d80000 ################################################################
5753 16:31:46.480245
5754 16:31:46.706485 01e00000 ########################################################### done.
5755 16:31:46.706667
5756 16:31:46.710148 The bootfile was 31932998 bytes long.
5757 16:31:46.710289
5758 16:31:46.713464 Sending tftp read request... done.
5759 16:31:46.713604
5760 16:31:46.713717 Waiting for the transfer...
5761 16:31:46.716549
5762 16:31:46.716649 00000000 # done.
5763 16:31:46.716738
5764 16:31:46.722838 Command line loaded dynamically from TFTP file: 14396111/tftp-deploy-kbn0hmiy/kernel/cmdline
5765 16:31:46.722954
5766 16:31:46.749514 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14396111/extract-nfsrootfs-gi_tnf6b,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5767 16:31:46.749642
5768 16:31:46.749769 Loading FIT.
5769 16:31:46.753289
5770 16:31:46.753413 Image ramdisk-1 has 18744500 bytes.
5771 16:31:46.753535
5772 16:31:46.756382 Image fdt-1 has 57695 bytes.
5773 16:31:46.756513
5774 16:31:46.760000 Image kernel-1 has 13128753 bytes.
5775 16:31:46.760126
5776 16:31:46.769500 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5777 16:31:46.769589
5778 16:31:46.779548 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5779 16:31:46.779685
5780 16:31:46.785939 Choosing best match conf-1 for compat google,juniper-sku16.
5781 16:31:46.790192
5782 16:31:46.795217 Connected to device vid:did:rid of 1ae0:0028:00
5783 16:31:46.803257
5784 16:31:46.806722 tpm_get_response: command 0x17b, return code 0x0
5785 16:31:46.806816
5786 16:31:46.810168 tpm_cleanup: add release locality here.
5787 16:31:46.810258
5788 16:31:46.813608 Shutting down all USB controllers.
5789 16:31:46.813727
5790 16:31:46.816990 Removing current net device
5791 16:31:46.817080
5792 16:31:46.819937 Exiting depthcharge with code 4 at timestamp: 34520545
5793 16:31:46.820028
5794 16:31:46.823736 LZMA decompressing kernel-1 to 0x80193568
5795 16:31:46.823827
5796 16:31:46.826841 LZMA decompressing kernel-1 to 0x40000000
5797 16:31:48.694433
5798 16:31:48.694604 jumping to kernel
5799 16:31:48.695112 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
5800 16:31:48.695225 start: 2.2.5 auto-login-action (timeout 00:04:06) [common]
5801 16:31:48.695322 Setting prompt string to ['Linux version [0-9]']
5802 16:31:48.695399 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5803 16:31:48.695491 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5804 16:31:48.769539
5805 16:31:48.773093 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5806 16:31:48.776346 start: 2.2.5.1 login-action (timeout 00:04:06) [common]
5807 16:31:48.776452 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5808 16:31:48.776542 Setting prompt string to []
5809 16:31:48.776626 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5810 16:31:48.776714 Using line separator: #'\n'#
5811 16:31:48.776798 No login prompt set.
5812 16:31:48.776904 Parsing kernel messages
5813 16:31:48.776968 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5814 16:31:48.777090 [login-action] Waiting for messages, (timeout 00:04:06)
5815 16:31:48.777164 Waiting using forced prompt support (timeout 00:02:03)
5816 16:31:48.795939 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j234605-arm64-gcc-10-defconfig-arm64-chromebook-rs2lc) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Mon Jun 17 16:16:56 UTC 2024
5817 16:31:48.799442 [ 0.000000] random: crng init done
5818 16:31:48.806316 [ 0.000000] Machine model: Google juniper sku16 board
5819 16:31:48.809387 [ 0.000000] efi: UEFI not found.
5820 16:31:48.816205 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5821 16:31:48.826179 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5822 16:31:48.832962 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5823 16:31:48.836071 [ 0.000000] printk: bootconsole [mtk8250] enabled
5824 16:31:48.844487 [ 0.000000] NUMA: No NUMA configuration found
5825 16:31:48.851304 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5826 16:31:48.857744 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5827 16:31:48.857860 [ 0.000000] Zone ranges:
5828 16:31:48.864636 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5829 16:31:48.867622 [ 0.000000] DMA32 empty
5830 16:31:48.874326 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5831 16:31:48.878002 [ 0.000000] Movable zone start for each node
5832 16:31:48.881147 [ 0.000000] Early memory node ranges
5833 16:31:48.887692 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5834 16:31:48.894385 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5835 16:31:48.901234 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5836 16:31:48.907759 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5837 16:31:48.914044 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5838 16:31:48.920824 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5839 16:31:48.936774 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5840 16:31:48.943585 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5841 16:31:48.950245 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5842 16:31:48.954003 [ 0.000000] psci: probing for conduit method from DT.
5843 16:31:48.960576 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5844 16:31:48.963380 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5845 16:31:48.970352 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5846 16:31:48.973424 [ 0.000000] psci: SMC Calling Convention v1.1
5847 16:31:48.980063 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5848 16:31:48.983543 [ 0.000000] Detected VIPT I-cache on CPU0
5849 16:31:48.990031 [ 0.000000] CPU features: detected: GIC system register CPU interface
5850 16:31:48.996629 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5851 16:31:49.003607 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5852 16:31:49.009677 [ 0.000000] CPU features: detected: ARM erratum 845719
5853 16:31:49.013297 [ 0.000000] alternatives: applying boot alternatives
5854 16:31:49.016738 [ 0.000000] Fallback order for Node 0: 0
5855 16:31:49.023007 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5856 16:31:49.026222 [ 0.000000] Policy zone: Normal
5857 16:31:49.052909 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14396111/extract-nfsrootfs-gi_tnf6b,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5858 16:31:49.066389 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5859 16:31:49.076346 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5860 16:31:49.082774 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5861 16:31:49.089381 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5862 16:31:49.096224 <6>[ 0.000000] software IO TLB: area num 8.
5863 16:31:49.120183 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5864 16:31:49.178432 <6>[ 0.000000] Memory: 3896768K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 261696K reserved, 32768K cma-reserved)
5865 16:31:49.184982 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5866 16:31:49.191702 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5867 16:31:49.194804 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5868 16:31:49.201552 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5869 16:31:49.208115 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5870 16:31:49.211484 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5871 16:31:49.221445 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5872 16:31:49.228175 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5873 16:31:49.231964 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5874 16:31:49.243518 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5875 16:31:49.249933 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5876 16:31:49.253711 <6>[ 0.000000] GICv3: 640 SPIs implemented
5877 16:31:49.257180 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5878 16:31:49.263717 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5879 16:31:49.266846 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5880 16:31:49.273586 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5881 16:31:49.286593 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5882 16:31:49.296302 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5883 16:31:49.303081 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5884 16:31:49.315348 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5885 16:31:49.328820 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5886 16:31:49.335217 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5887 16:31:49.341917 <6>[ 0.009468] Console: colour dummy device 80x25
5888 16:31:49.345613 <6>[ 0.014513] printk: console [tty1] enabled
5889 16:31:49.355386 <6>[ 0.018902] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5890 16:31:49.361743 <6>[ 0.029366] pid_max: default: 32768 minimum: 301
5891 16:31:49.365655 <6>[ 0.034247] LSM: Security Framework initializing
5892 16:31:49.375094 <6>[ 0.039162] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5893 16:31:49.381844 <6>[ 0.046785] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5894 16:31:49.388668 <4>[ 0.055659] cacheinfo: Unable to detect cache hierarchy for CPU 0
5895 16:31:49.398552 <6>[ 0.062285] cblist_init_generic: Setting adjustable number of callback queues.
5896 16:31:49.405253 <6>[ 0.069731] cblist_init_generic: Setting shift to 3 and lim to 1.
5897 16:31:49.411564 <6>[ 0.076085] cblist_init_generic: Setting adjustable number of callback queues.
5898 16:31:49.418217 <6>[ 0.083529] cblist_init_generic: Setting shift to 3 and lim to 1.
5899 16:31:49.421318 <6>[ 0.089927] rcu: Hierarchical SRCU implementation.
5900 16:31:49.428193 <6>[ 0.094953] rcu: Max phase no-delay instances is 1000.
5901 16:31:49.435729 <6>[ 0.102875] EFI services will not be available.
5902 16:31:49.438588 <6>[ 0.107823] smp: Bringing up secondary CPUs ...
5903 16:31:49.449356 <6>[ 0.113055] Detected VIPT I-cache on CPU1
5904 16:31:49.455948 <4>[ 0.113101] cacheinfo: Unable to detect cache hierarchy for CPU 1
5905 16:31:49.462137 <6>[ 0.113109] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5906 16:31:49.469101 <6>[ 0.113140] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5907 16:31:49.472590 <6>[ 0.113625] Detected VIPT I-cache on CPU2
5908 16:31:49.478871 <4>[ 0.113657] cacheinfo: Unable to detect cache hierarchy for CPU 2
5909 16:31:49.485596 <6>[ 0.113662] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5910 16:31:49.492262 <6>[ 0.113674] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5911 16:31:49.495936 <6>[ 0.114120] Detected VIPT I-cache on CPU3
5912 16:31:49.502134 <4>[ 0.114151] cacheinfo: Unable to detect cache hierarchy for CPU 3
5913 16:31:49.512024 <6>[ 0.114156] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5914 16:31:49.518626 <6>[ 0.114166] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5915 16:31:49.522205 <6>[ 0.114741] CPU features: detected: Spectre-v2
5916 16:31:49.525269 <6>[ 0.114750] CPU features: detected: Spectre-BHB
5917 16:31:49.532097 <6>[ 0.114754] CPU features: detected: ARM erratum 858921
5918 16:31:49.535225 <6>[ 0.114760] Detected VIPT I-cache on CPU4
5919 16:31:49.541805 <4>[ 0.114807] cacheinfo: Unable to detect cache hierarchy for CPU 4
5920 16:31:49.548463 <6>[ 0.114815] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5921 16:31:49.558545 <6>[ 0.114823] arch_timer: Enabling local workaround for ARM erratum 858921
5922 16:31:49.561774 <6>[ 0.114834] arch_timer: CPU4: Trapping CNTVCT access
5923 16:31:49.568366 <6>[ 0.114842] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5924 16:31:49.572031 <6>[ 0.115327] Detected VIPT I-cache on CPU5
5925 16:31:49.578743 <4>[ 0.115367] cacheinfo: Unable to detect cache hierarchy for CPU 5
5926 16:31:49.585215 <6>[ 0.115373] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5927 16:31:49.595113 <6>[ 0.115380] arch_timer: Enabling local workaround for ARM erratum 858921
5928 16:31:49.598304 <6>[ 0.115386] arch_timer: CPU5: Trapping CNTVCT access
5929 16:31:49.604731 <6>[ 0.115391] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5930 16:31:49.608406 <6>[ 0.115827] Detected VIPT I-cache on CPU6
5931 16:31:49.614649 <4>[ 0.115873] cacheinfo: Unable to detect cache hierarchy for CPU 6
5932 16:31:49.624846 <6>[ 0.115879] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5933 16:31:49.631655 <6>[ 0.115887] arch_timer: Enabling local workaround for ARM erratum 858921
5934 16:31:49.634610 <6>[ 0.115893] arch_timer: CPU6: Trapping CNTVCT access
5935 16:31:49.641429 <6>[ 0.115898] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5936 16:31:49.645039 <6>[ 0.116428] Detected VIPT I-cache on CPU7
5937 16:31:49.651283 <4>[ 0.116470] cacheinfo: Unable to detect cache hierarchy for CPU 7
5938 16:31:49.661063 <6>[ 0.116477] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5939 16:31:49.667723 <6>[ 0.116484] arch_timer: Enabling local workaround for ARM erratum 858921
5940 16:31:49.671195 <6>[ 0.116490] arch_timer: CPU7: Trapping CNTVCT access
5941 16:31:49.677707 <6>[ 0.116495] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5942 16:31:49.684526 <6>[ 0.116543] smp: Brought up 1 node, 8 CPUs
5943 16:31:49.688033 <6>[ 0.355445] SMP: Total of 8 processors activated.
5944 16:31:49.694865 <6>[ 0.360380] CPU features: detected: 32-bit EL0 Support
5945 16:31:49.698058 <6>[ 0.365759] CPU features: detected: 32-bit EL1 Support
5946 16:31:49.704595 <6>[ 0.371127] CPU features: detected: CRC32 instructions
5947 16:31:49.708014 <6>[ 0.376551] CPU: All CPU(s) started at EL2
5948 16:31:49.714360 <6>[ 0.380890] alternatives: applying system-wide alternatives
5949 16:31:49.721936 <6>[ 0.389083] devtmpfs: initialized
5950 16:31:49.733757 <6>[ 0.398030] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5951 16:31:49.744063 <6>[ 0.407980] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5952 16:31:49.747057 <6>[ 0.415708] pinctrl core: initialized pinctrl subsystem
5953 16:31:49.755389 <6>[ 0.422817] DMI not present or invalid.
5954 16:31:49.762158 <6>[ 0.427190] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5955 16:31:49.769062 <6>[ 0.434092] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5956 16:31:49.778359 <6>[ 0.441605] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5957 16:31:49.785419 <6>[ 0.449776] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5958 16:31:49.792030 <6>[ 0.457922] audit: initializing netlink subsys (disabled)
5959 16:31:49.798657 <5>[ 0.463605] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
5960 16:31:49.805205 <6>[ 0.464570] thermal_sys: Registered thermal governor 'step_wise'
5961 16:31:49.811972 <6>[ 0.471556] thermal_sys: Registered thermal governor 'power_allocator'
5962 16:31:49.814918 <6>[ 0.477802] cpuidle: using governor menu
5963 16:31:49.821572 <6>[ 0.488749] NET: Registered PF_QIPCRTR protocol family
5964 16:31:49.828232 <6>[ 0.494238] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5965 16:31:49.834835 <6>[ 0.501332] ASID allocator initialised with 32768 entries
5966 16:31:49.841251 <6>[ 0.508107] Serial: AMBA PL011 UART driver
5967 16:31:49.850991 <4>[ 0.518507] Trying to register duplicate clock ID: 113
5968 16:31:49.910165 <6>[ 0.574498] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5969 16:31:49.924593 <6>[ 0.588845] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5970 16:31:49.928138 <6>[ 0.598590] KASLR enabled
5971 16:31:49.942416 <6>[ 0.606593] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5972 16:31:49.949143 <6>[ 0.613597] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5973 16:31:49.956120 <6>[ 0.620074] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5974 16:31:49.962156 <6>[ 0.627065] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5975 16:31:49.968961 <6>[ 0.633539] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5976 16:31:49.975515 <6>[ 0.640530] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5977 16:31:49.982354 <6>[ 0.647003] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5978 16:31:49.989296 <6>[ 0.653993] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5979 16:31:49.992244 <6>[ 0.661560] ACPI: Interpreter disabled.
5980 16:31:50.002127 <6>[ 0.669545] iommu: Default domain type: Translated
5981 16:31:50.009116 <6>[ 0.674653] iommu: DMA domain TLB invalidation policy: strict mode
5982 16:31:50.011918 <5>[ 0.681287] SCSI subsystem initialized
5983 16:31:50.018752 <6>[ 0.685719] usbcore: registered new interface driver usbfs
5984 16:31:50.025507 <6>[ 0.691447] usbcore: registered new interface driver hub
5985 16:31:50.028616 <6>[ 0.696989] usbcore: registered new device driver usb
5986 16:31:50.036090 <6>[ 0.703293] pps_core: LinuxPPS API ver. 1 registered
5987 16:31:50.045597 <6>[ 0.708478] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5988 16:31:50.048862 <6>[ 0.717802] PTP clock support registered
5989 16:31:50.052494 <6>[ 0.722055] EDAC MC: Ver: 3.0.0
5990 16:31:50.060684 <6>[ 0.727687] FPGA manager framework
5991 16:31:50.063722 <6>[ 0.731370] Advanced Linux Sound Architecture Driver Initialized.
5992 16:31:50.067461 <6>[ 0.738120] vgaarb: loaded
5993 16:31:50.074195 <6>[ 0.741248] clocksource: Switched to clocksource arch_sys_counter
5994 16:31:50.080943 <5>[ 0.747678] VFS: Disk quotas dquot_6.6.0
5995 16:31:50.087152 <6>[ 0.751851] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5996 16:31:50.090799 <6>[ 0.759029] pnp: PnP ACPI: disabled
5997 16:31:50.098723 <6>[ 0.765923] NET: Registered PF_INET protocol family
5998 16:31:50.104980 <6>[ 0.771157] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5999 16:31:50.117338 <6>[ 0.781074] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6000 16:31:50.124009 <6>[ 0.789826] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6001 16:31:50.133771 <6>[ 0.797776] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6002 16:31:50.140157 <6>[ 0.806007] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6003 16:31:50.147035 <6>[ 0.814100] TCP: Hash tables configured (established 32768 bind 32768)
6004 16:31:50.157088 <6>[ 0.820927] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6005 16:31:50.163560 <6>[ 0.827901] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6006 16:31:50.169979 <6>[ 0.835382] NET: Registered PF_UNIX/PF_LOCAL protocol family
6007 16:31:50.177125 <6>[ 0.841511] RPC: Registered named UNIX socket transport module.
6008 16:31:50.180068 <6>[ 0.847658] RPC: Registered udp transport module.
6009 16:31:50.183494 <6>[ 0.852583] RPC: Registered tcp transport module.
6010 16:31:50.190164 <6>[ 0.857506] RPC: Registered tcp NFSv4.1 backchannel transport module.
6011 16:31:50.197047 <6>[ 0.864162] PCI: CLS 0 bytes, default 64
6012 16:31:50.200184 <6>[ 0.868445] Unpacking initramfs...
6013 16:31:50.206630 <6>[ 0.872220] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6014 16:31:50.216663 <6>[ 0.880846] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6015 16:31:50.223419 <6>[ 0.889698] kvm [1]: IPA Size Limit: 40 bits
6016 16:31:50.227030 <6>[ 0.896019] kvm [1]: vgic-v2@c420000
6017 16:31:50.233176 <6>[ 0.899835] kvm [1]: GIC system register CPU interface enabled
6018 16:31:50.236955 <6>[ 0.906009] kvm [1]: vgic interrupt IRQ18
6019 16:31:50.243427 <6>[ 0.910364] kvm [1]: Hyp mode initialized successfully
6020 16:31:50.249803 <5>[ 0.916620] Initialise system trusted keyrings
6021 16:31:50.256689 <6>[ 0.921459] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6022 16:31:50.264089 <6>[ 0.931406] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6023 16:31:50.270896 <5>[ 0.937886] NFS: Registering the id_resolver key type
6024 16:31:50.274283 <5>[ 0.943200] Key type id_resolver registered
6025 16:31:50.280927 <5>[ 0.947613] Key type id_legacy registered
6026 16:31:50.287059 <6>[ 0.951926] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6027 16:31:50.294192 <6>[ 0.958844] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6028 16:31:50.300589 <6>[ 0.966653] 9p: Installing v9fs 9p2000 file system support
6029 16:31:50.327065 <5>[ 0.994790] Key type asymmetric registered
6030 16:31:50.330639 <5>[ 0.999134] Asymmetric key parser 'x509' registered
6031 16:31:50.340628 <6>[ 1.004288] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6032 16:31:50.344107 <6>[ 1.011900] io scheduler mq-deadline registered
6033 16:31:50.347205 <6>[ 1.016659] io scheduler kyber registered
6034 16:31:50.369995 <6>[ 1.037325] EINJ: ACPI disabled.
6035 16:31:50.376497 <4>[ 1.041092] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6036 16:31:50.414996 <6>[ 1.081976] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6037 16:31:50.422793 <6>[ 1.090479] printk: console [ttyS0] disabled
6038 16:31:50.450807 <6>[ 1.115128] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6039 16:31:50.457558 <6>[ 1.124602] printk: console [ttyS0] enabled
6040 16:31:50.461339 <6>[ 1.124602] printk: console [ttyS0] enabled
6041 16:31:50.467584 <6>[ 1.133521] printk: bootconsole [mtk8250] disabled
6042 16:31:50.471169 <6>[ 1.133521] printk: bootconsole [mtk8250] disabled
6043 16:31:50.481073 <3>[ 1.144056] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6044 16:31:50.487909 <3>[ 1.152440] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6045 16:31:50.516847 <6>[ 1.180849] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6046 16:31:50.523297 <6>[ 1.190500] serial serial0: tty port ttyS1 registered
6047 16:31:50.530346 <6>[ 1.197069] SuperH (H)SCI(F) driver initialized
6048 16:31:50.533458 <6>[ 1.202584] msm_serial: driver initialized
6049 16:31:50.549015 <6>[ 1.212920] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6050 16:31:50.559059 <6>[ 1.221522] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6051 16:31:50.565214 <6>[ 1.230097] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6052 16:31:50.575648 <6>[ 1.238663] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6053 16:31:50.581929 <6>[ 1.247317] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6054 16:31:50.592191 <6>[ 1.255979] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6055 16:31:50.601887 <6>[ 1.264717] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6056 16:31:50.608321 <6>[ 1.273454] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6057 16:31:50.618805 <6>[ 1.282020] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6058 16:31:50.628406 <6>[ 1.290819] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6059 16:31:50.635978 <4>[ 1.303202] cacheinfo: Unable to detect cache hierarchy for CPU 0
6060 16:31:50.645129 <6>[ 1.312549] loop: module loaded
6061 16:31:50.656785 <6>[ 1.324477] vsim1: Bringing 1800000uV into 2700000-2700000uV
6062 16:31:50.674995 <6>[ 1.342498] megasas: 07.719.03.00-rc1
6063 16:31:50.684116 <6>[ 1.351369] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6064 16:31:50.697528 <6>[ 1.364644] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6065 16:31:50.713991 <6>[ 1.381328] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6066 16:31:50.771081 <6>[ 1.431705] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6067 16:31:50.812595 <6>[ 1.479808] Freeing initrd memory: 18300K
6068 16:31:50.828008 <4>[ 1.491649] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6069 16:31:50.834269 <4>[ 1.500879] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6070 16:31:50.840939 <4>[ 1.507578] Hardware name: Google juniper sku16 board (DT)
6071 16:31:50.844359 <4>[ 1.513317] Call trace:
6072 16:31:50.847640 <4>[ 1.516017] dump_backtrace.part.0+0xe0/0xf0
6073 16:31:50.851264 <4>[ 1.520554] show_stack+0x18/0x30
6074 16:31:50.854799 <4>[ 1.524126] dump_stack_lvl+0x68/0x84
6075 16:31:50.857737 <4>[ 1.528047] dump_stack+0x18/0x34
6076 16:31:50.864814 <4>[ 1.531617] sysfs_warn_dup+0x64/0x80
6077 16:31:50.868024 <4>[ 1.535539] sysfs_do_create_link_sd+0xf0/0x100
6078 16:31:50.871234 <4>[ 1.540326] sysfs_create_link+0x20/0x40
6079 16:31:50.874755 <4>[ 1.544506] bus_add_device+0x68/0x10c
6080 16:31:50.881556 <4>[ 1.548512] device_add+0x340/0x7ac
6081 16:31:50.884966 <4>[ 1.552255] of_device_add+0x44/0x60
6082 16:31:50.888287 <4>[ 1.556090] of_platform_device_create_pdata+0x90/0x120
6083 16:31:50.894610 <4>[ 1.561571] of_platform_bus_create+0x170/0x370
6084 16:31:50.898200 <4>[ 1.566358] of_platform_populate+0x50/0xfc
6085 16:31:50.901312 <4>[ 1.570797] parse_mtd_partitions+0x1dc/0x510
6086 16:31:50.908167 <4>[ 1.575410] mtd_device_parse_register+0xf8/0x2e0
6087 16:31:50.911928 <4>[ 1.580369] spi_nor_probe+0x21c/0x2f0
6088 16:31:50.915038 <4>[ 1.584375] spi_mem_probe+0x6c/0xb0
6089 16:31:50.918058 <4>[ 1.588208] spi_probe+0x84/0xe4
6090 16:31:50.921743 <4>[ 1.591689] really_probe+0xbc/0x2e0
6091 16:31:50.928022 <4>[ 1.595519] __driver_probe_device+0x78/0x11c
6092 16:31:50.931699 <4>[ 1.600131] driver_probe_device+0xd8/0x160
6093 16:31:50.937894 <4>[ 1.604569] __device_attach_driver+0xb8/0x134
6094 16:31:50.941627 <4>[ 1.609268] bus_for_each_drv+0x78/0xd0
6095 16:31:50.944735 <4>[ 1.613358] __device_attach+0xa8/0x1c0
6096 16:31:50.947766 <4>[ 1.617448] device_initial_probe+0x14/0x20
6097 16:31:50.954818 <4>[ 1.621886] bus_probe_device+0x9c/0xa4
6098 16:31:50.958274 <4>[ 1.625976] device_add+0x3ac/0x7ac
6099 16:31:50.961136 <4>[ 1.629719] __spi_add_device+0x78/0x120
6100 16:31:50.964621 <4>[ 1.633897] spi_add_device+0x40/0x7c
6101 16:31:50.970880 <4>[ 1.637815] spi_register_controller+0x610/0xad0
6102 16:31:50.974621 <4>[ 1.642687] devm_spi_register_controller+0x4c/0xa4
6103 16:31:50.981384 <4>[ 1.647821] mtk_spi_probe+0x3f8/0x650
6104 16:31:50.984315 <4>[ 1.651825] platform_probe+0x68/0xe0
6105 16:31:50.987766 <4>[ 1.655744] really_probe+0xbc/0x2e0
6106 16:31:50.991257 <4>[ 1.659574] __driver_probe_device+0x78/0x11c
6107 16:31:50.997732 <4>[ 1.664185] driver_probe_device+0xd8/0x160
6108 16:31:51.000960 <4>[ 1.668622] __driver_attach+0x94/0x19c
6109 16:31:51.004078 <4>[ 1.672713] bus_for_each_dev+0x70/0xd0
6110 16:31:51.007799 <4>[ 1.676803] driver_attach+0x24/0x30
6111 16:31:51.011015 <4>[ 1.680633] bus_add_driver+0x154/0x20c
6112 16:31:51.017593 <4>[ 1.684724] driver_register+0x78/0x130
6113 16:31:51.021199 <4>[ 1.688815] __platform_driver_register+0x28/0x34
6114 16:31:51.024300 <4>[ 1.693774] mtk_spi_driver_init+0x1c/0x28
6115 16:31:51.031015 <4>[ 1.698128] do_one_initcall+0x50/0x1d0
6116 16:31:51.034022 <4>[ 1.702218] kernel_init_freeable+0x21c/0x288
6117 16:31:51.037117 <4>[ 1.706832] kernel_init+0x24/0x12c
6118 16:31:51.040877 <4>[ 1.710577] ret_from_fork+0x10/0x20
6119 16:31:51.052047 <6>[ 1.719503] tun: Universal TUN/TAP device driver, 1.6
6120 16:31:51.055856 <6>[ 1.725807] thunder_xcv, ver 1.0
6121 16:31:51.058873 <6>[ 1.729320] thunder_bgx, ver 1.0
6122 16:31:51.062241 <6>[ 1.732817] nicpf, ver 1.0
6123 16:31:51.073222 <6>[ 1.737185] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6124 16:31:51.076251 <6>[ 1.744669] hns3: Copyright (c) 2017 Huawei Corporation.
6125 16:31:51.079966 <6>[ 1.750265] hclge is initializing
6126 16:31:51.086603 <6>[ 1.753849] e1000: Intel(R) PRO/1000 Network Driver
6127 16:31:51.093269 <6>[ 1.758984] e1000: Copyright (c) 1999-2006 Intel Corporation.
6128 16:31:51.096844 <6>[ 1.765008] e1000e: Intel(R) PRO/1000 Network Driver
6129 16:31:51.103220 <6>[ 1.770229] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6130 16:31:51.109922 <6>[ 1.776422] igb: Intel(R) Gigabit Ethernet Network Driver
6131 16:31:51.116849 <6>[ 1.782077] igb: Copyright (c) 2007-2014 Intel Corporation.
6132 16:31:51.123198 <6>[ 1.787922] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6133 16:31:51.129943 <6>[ 1.794445] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6134 16:31:51.133272 <6>[ 1.800999] sky2: driver version 1.30
6135 16:31:51.139840 <6>[ 1.806254] usbcore: registered new device driver r8152-cfgselector
6136 16:31:51.146605 <6>[ 1.812799] usbcore: registered new interface driver r8152
6137 16:31:51.152839 <6>[ 1.818630] VFIO - User Level meta-driver version: 0.3
6138 16:31:51.159779 <6>[ 1.826429] mtu3 11201000.usb: uwk - reg:0x420, version:101
6139 16:31:51.166576 <4>[ 1.832302] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6140 16:31:51.173089 <6>[ 1.839579] mtu3 11201000.usb: dr_mode: 1, drd: auto
6141 16:31:51.180044 <6>[ 1.844805] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6142 16:31:51.183206 <6>[ 1.850990] mtu3 11201000.usb: usb3-drd: 0
6143 16:31:51.190079 <6>[ 1.856543] mtu3 11201000.usb: xHCI platform device register success...
6144 16:31:51.201196 <4>[ 1.865173] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6145 16:31:51.204806 <6>[ 1.873119] xhci-mtk 11200000.usb: xHCI Host Controller
6146 16:31:51.214749 <6>[ 1.878623] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6147 16:31:51.221442 <6>[ 1.886341] xhci-mtk 11200000.usb: USB3 root hub has no ports
6148 16:31:51.228078 <6>[ 1.892349] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6149 16:31:51.234642 <6>[ 1.901793] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6150 16:31:51.241120 <6>[ 1.907872] xhci-mtk 11200000.usb: xHCI Host Controller
6151 16:31:51.247812 <6>[ 1.913361] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6152 16:31:51.254588 <6>[ 1.921018] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6153 16:31:51.258411 <6>[ 1.927833] hub 1-0:1.0: USB hub found
6154 16:31:51.264575 <6>[ 1.931862] hub 1-0:1.0: 1 port detected
6155 16:31:51.274625 <6>[ 1.937210] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6156 16:31:51.278069 <6>[ 1.945827] hub 2-0:1.0: USB hub found
6157 16:31:51.284707 <3>[ 1.949857] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6158 16:31:51.291318 <6>[ 1.957735] usbcore: registered new interface driver usb-storage
6159 16:31:51.298165 <6>[ 1.964315] usbcore: registered new device driver onboard-usb-hub
6160 16:31:51.309240 <4>[ 1.973365] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6161 16:31:51.318596 <6>[ 1.985594] mt6397-rtc mt6358-rtc: registered as rtc0
6162 16:31:51.328718 <6>[ 1.991074] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-17T16:30:53 UTC (1718641853)
6163 16:31:51.331748 <6>[ 2.000952] i2c_dev: i2c /dev entries driver
6164 16:31:51.343586 <6>[ 2.007390] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6165 16:31:51.353551 <6>[ 2.015734] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6166 16:31:51.357010 <6>[ 2.024641] i2c 4-0058: Fixed dependency cycle(s) with /panel
6167 16:31:51.366476 <6>[ 2.030672] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6168 16:31:51.373450 <3>[ 2.038126] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6169 16:31:51.390423 <6>[ 2.058013] cpu cpu0: EM: created perf domain
6170 16:31:51.400653 <6>[ 2.063492] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6171 16:31:51.407420 <6>[ 2.074778] cpu cpu4: EM: created perf domain
6172 16:31:51.414631 <6>[ 2.081910] sdhci: Secure Digital Host Controller Interface driver
6173 16:31:51.421431 <6>[ 2.088369] sdhci: Copyright(c) Pierre Ossman
6174 16:31:51.428153 <6>[ 2.093750] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6175 16:31:51.434760 <6>[ 2.093839] Synopsys Designware Multimedia Card Interface Driver
6176 16:31:51.440894 <6>[ 2.106321] sdhci-pltfm: SDHCI platform and OF driver helper
6177 16:31:51.447553 <6>[ 2.114265] ledtrig-cpu: registered to indicate activity on CPUs
6178 16:31:51.454952 <6>[ 2.121979] usbcore: registered new interface driver usbhid
6179 16:31:51.458104 <6>[ 2.127820] usbhid: USB HID core driver
6180 16:31:51.469297 <6>[ 2.132135] spi_master spi2: will run message pump with realtime priority
6181 16:31:51.472579 <4>[ 2.132279] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6182 16:31:51.479612 <4>[ 2.146513] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6183 16:31:51.493334 <6>[ 2.151184] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6184 16:31:51.512227 <6>[ 2.169267] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6185 16:31:51.518977 <4>[ 2.179690] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6186 16:31:51.522291 <6>[ 2.183787] cros-ec-spi spi2.0: Chrome EC device registered
6187 16:31:51.535103 <4>[ 2.198997] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6188 16:31:51.546092 <4>[ 2.210243] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6189 16:31:51.552887 <4>[ 2.219218] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6190 16:31:51.560668 <6>[ 2.228003] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6191 16:31:51.569330 <6>[ 2.236492] mmc0: new HS400 MMC card at address 0001
6192 16:31:51.576114 <6>[ 2.243182] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6193 16:31:51.582860 <6>[ 2.246223] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6194 16:31:51.589410 <6>[ 2.254419] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6195 16:31:51.595736 <6>[ 2.259080] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6196 16:31:51.602806 <6>[ 2.261958] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6197 16:31:51.612507 <6>[ 2.273219] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6198 16:31:51.619334 <6>[ 2.276204] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6199 16:31:51.622379 <6>[ 2.286902] NET: Registered PF_PACKET protocol family
6200 16:31:51.629657 <6>[ 2.291907] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6201 16:31:51.635944 <6>[ 2.296172] 9pnet: Installing 9P2000 support
6202 16:31:51.646212 <6>[ 2.300255] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6203 16:31:51.656083 <6>[ 2.300560] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6204 16:31:51.662531 <5>[ 2.329171] Key type dns_resolver registered
6205 16:31:51.666196 <6>[ 2.334002] registered taskstats version 1
6206 16:31:51.672922 <5>[ 2.338367] Loading compiled-in X.509 certificates
6207 16:31:51.688892 <6>[ 2.353283] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6208 16:31:51.717154 <3>[ 2.381208] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6209 16:31:51.741682 <6>[ 2.402274] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6210 16:31:51.752028 <6>[ 2.415331] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6211 16:31:51.761699 <6>[ 2.423881] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6212 16:31:51.768469 <6>[ 2.432437] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6213 16:31:51.778271 <6>[ 2.440959] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6214 16:31:51.785091 <6>[ 2.449481] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6215 16:31:51.794798 <6>[ 2.458001] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6216 16:31:51.801115 <6>[ 2.466521] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6217 16:31:51.808619 <6>[ 2.475625] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6218 16:31:51.815814 <6>[ 2.482992] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6219 16:31:51.822772 <6>[ 2.490210] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6220 16:31:51.833411 <6>[ 2.497380] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6221 16:31:51.840074 <6>[ 2.504699] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6222 16:31:51.846637 <6>[ 2.512881] panfrost 13040000.gpu: clock rate = 511999970
6223 16:31:51.856722 <6>[ 2.518629] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6224 16:31:51.860040 <6>[ 2.529024] hub 1-1:1.0: USB hub found
6225 16:31:51.869740 <6>[ 2.529279] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6226 16:31:51.872810 <6>[ 2.533611] hub 1-1:1.0: 3 ports detected
6227 16:31:51.883358 <6>[ 2.541022] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6228 16:31:51.893109 <6>[ 2.541026] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6229 16:31:51.899296 <6>[ 2.565799] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6230 16:31:51.912502 <6>[ 2.576638] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6231 16:31:51.922766 <6>[ 2.585589] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6232 16:31:51.932364 <6>[ 2.594736] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6233 16:31:51.939190 <6>[ 2.603864] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6234 16:31:51.948891 <6>[ 2.612991] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6235 16:31:51.959182 <6>[ 2.622292] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6236 16:31:51.968793 <6>[ 2.631592] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6237 16:31:51.978682 <6>[ 2.641066] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6238 16:31:51.988699 <6>[ 2.650538] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6239 16:31:51.995363 <6>[ 2.659665] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6240 16:31:52.068933 <6>[ 2.732834] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6241 16:31:52.079024 <6>[ 2.741711] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6242 16:31:52.089832 <6>[ 2.753687] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6243 16:31:52.169370 <6>[ 2.833394] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6244 16:31:52.794308 <6>[ 3.021533] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6245 16:31:52.804061 <4>[ 3.138466] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6246 16:31:52.811088 <4>[ 3.138486] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6247 16:31:52.817597 <6>[ 3.174758] r8152 1-1.2:1.0 eth0: v1.12.13
6248 16:31:52.823700 <6>[ 3.253275] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6249 16:31:52.831046 <6>[ 3.441603] Console: switching to colour frame buffer device 170x48
6250 16:31:52.837183 <6>[ 3.502251] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6251 16:31:52.858076 <6>[ 3.518720] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6252 16:31:52.875083 <6>[ 3.535520] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6253 16:31:52.884872 <6>[ 3.548678] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6254 16:31:52.891465 <6>[ 3.556876] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6255 16:31:52.904551 <6>[ 3.560812] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6256 16:31:52.919248 <6>[ 3.580044] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6257 16:31:54.114224 <6>[ 4.781331] r8152 1-1.2:1.0 eth0: carrier on
6258 16:31:56.806107 <5>[ 4.801265] Sending DHCP requests .., OK
6259 16:31:56.812744 <6>[ 7.477600] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6260 16:31:56.815893 <6>[ 7.486031] IP-Config: Complete:
6261 16:31:56.829113 <6>[ 7.489602] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6262 16:31:56.839320 <6>[ 7.500504] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6263 16:31:56.850576 <6>[ 7.514782] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6264 16:31:56.859363 <6>[ 7.514793] nameserver0=192.168.201.1
6265 16:31:56.867207 <6>[ 7.534521] clk: Disabling unused clocks
6266 16:31:56.872142 <6>[ 7.542492] ALSA device list:
6267 16:31:56.880944 <6>[ 7.548516] No soundcards found.
6268 16:31:56.890128 <6>[ 7.557579] Freeing unused kernel memory: 8512K
6269 16:31:56.897267 <6>[ 7.564725] Run /init as init process
6270 16:31:56.909295 Loading, please wait...
6271 16:31:56.943963 Starting systemd-udevd version 252.22-1~deb12u1
6272 16:31:57.247372 <3>[ 7.914867] mtk-scp 10500000.scp: invalid resource
6273 16:31:57.257937 <6>[ 7.921970] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6274 16:31:57.270058 <6>[ 7.933587] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6275 16:31:57.273075 <6>[ 7.935550] remoteproc remoteproc0: scp is available
6276 16:31:57.279572 <3>[ 7.935842] thermal_sys: Failed to find 'trips' node
6277 16:31:57.286256 <3>[ 7.935847] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6278 16:31:57.296655 <3>[ 7.935853] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6279 16:31:57.302677 <4>[ 7.935856] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6280 16:31:57.309607 <3>[ 7.937188] thermal_sys: Failed to find 'trips' node
6281 16:31:57.316154 <3>[ 7.937194] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6282 16:31:57.325957 <3>[ 7.937201] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6283 16:31:57.332575 <4>[ 7.937204] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6284 16:31:57.342458 <6>[ 7.939919] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6285 16:31:57.352452 <4>[ 7.946648] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6286 16:31:57.363509 <4>[ 7.947652] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6287 16:31:57.376809 <6>[ 7.961581] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6288 16:31:57.383505 <5>[ 7.966666] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6289 16:31:57.387059 <6>[ 7.968725] remoteproc remoteproc0: powering up scp
6290 16:31:57.402116 <3>[ 7.977333] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6291 16:31:57.411992 <6>[ 7.981199] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6292 16:31:57.418850 <5>[ 7.981279] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6293 16:31:57.428869 <4>[ 7.981420] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6294 16:31:57.439193 <5>[ 7.981704] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6295 16:31:57.448584 <4>[ 7.981750] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6296 16:31:57.455558 <6>[ 7.981757] cfg80211: failed to load regulatory.db
6297 16:31:57.465524 <3>[ 7.988727] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6298 16:31:57.472771 <3>[ 7.997152] remoteproc remoteproc0: request_firmware failed: -2
6299 16:31:57.486023 <3>[ 8.000819] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6300 16:31:57.492383 <4>[ 8.003514] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6301 16:31:57.499238 <4>[ 8.003654] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6302 16:31:57.512227 <3>[ 8.004769] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6303 16:31:57.515914 <6>[ 8.045061] mc: Linux media interface: v0.10
6304 16:31:57.522020 <3>[ 8.047646] elan_i2c 2-0015: Error applying setting, reverse things back
6305 16:31:57.528977 <6>[ 8.063022] cs_system_cfg: CoreSight Configuration manager initialised
6306 16:31:57.539039 <3>[ 8.073180] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6307 16:31:57.545116 <6>[ 8.074029] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6308 16:31:57.555013 <6>[ 8.138058] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6309 16:31:57.565028 <3>[ 8.138261] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6310 16:31:57.568601 <6>[ 8.158083] videodev: Linux video capture interface: v2.00
6311 16:31:57.578306 <3>[ 8.165100] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6312 16:31:57.585045 <6>[ 8.165253] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6313 16:31:57.594930 <6>[ 8.165402] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6314 16:31:57.601309 <6>[ 8.165472] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6315 16:31:57.611124 <6>[ 8.165580] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6316 16:31:57.617908 <6>[ 8.172435] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6317 16:31:57.627555 <3>[ 8.183379] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6318 16:31:57.631315 <6>[ 8.183766] Bluetooth: Core ver 2.22
6319 16:31:57.634329 <6>[ 8.183815] NET: Registered PF_BLUETOOTH protocol family
6320 16:31:57.641423 <6>[ 8.183817] Bluetooth: HCI device and connection manager initialized
6321 16:31:57.649048 <6>[ 8.183831] Bluetooth: HCI socket layer initialized
6322 16:31:57.655375 <6>[ 8.183835] Bluetooth: L2CAP socket layer initialized
6323 16:31:57.661976 <6>[ 8.183843] Bluetooth: SCO socket layer initialized
6324 16:31:57.669375 <6>[ 8.187906] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6325 16:31:57.679777 <3>[ 8.194916] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6326 16:31:57.686368 <6>[ 8.202035] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6327 16:31:57.696033 <3>[ 8.210256] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6328 16:31:57.706075 <6>[ 8.218042] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6329 16:31:57.716266 <3>[ 8.218451] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6330 16:31:57.726295 <3>[ 8.220184] debugfs: File 'Playback' in directory 'dapm' already present!
6331 16:31:57.733118 <3>[ 8.220207] debugfs: File 'Capture' in directory 'dapm' already present!
6332 16:31:57.742905 <6>[ 8.222594] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6333 16:31:57.749976 <6>[ 8.227554] Bluetooth: HCI UART driver ver 2.3
6334 16:31:57.760127 <3>[ 8.227600] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6335 16:31:57.766652 <3>[ 8.227613] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6336 16:31:57.777215 <3>[ 8.227811] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6337 16:31:57.784067 <6>[ 8.237303] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6338 16:31:57.790349 <6>[ 8.237320] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6339 16:31:57.800540 <6>[ 8.237675] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6340 16:31:57.803626 <6>[ 8.241468] Bluetooth: HCI UART protocol H4 registered
6341 16:31:57.810251 Begin: Loading e<6>[ 8.241511] Bluetooth: HCI UART protocol LL registered
6342 16:31:57.820010 ssential drivers<6>[ 8.242000] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6343 16:31:57.820109 ... done.
6344 16:31:57.830237 Begi<6>[ 8.242854] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6345 16:31:57.839931 n: Running /scri<6>[ 8.262988] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6346 16:31:57.846659 pts/init-premoun<6>[ 8.266552] Bluetooth: HCI UART protocol Three-wire (H5) registered
6347 16:31:57.849732 t ... done.
6348 16:31:57.863178 Begin: Mounting roo<6>[ 8.271252] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6349 16:31:57.869724 t file system ... Begin: Running<6>[ 8.271612] usbcore: registered new interface driver uvcvideo
6350 16:31:57.873290 /scripts/nfs-top ... done.
6351 16:31:57.883030 Beg<6>[ 8.274451] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6352 16:31:57.889681 in: Running /scripts/nfs-premoun<6>[ 8.282674] Bluetooth: HCI UART protocol Broadcom registered
6353 16:31:57.906119 t ... Waiting up to 60 secs for <6>[ 8.290338] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6354 16:31:57.912880 any ethernet to become available<6>[ 8.298786] Bluetooth: HCI UART protocol QCA registered
6355 16:31:57.912982
6356 16:31:57.922830 Device /sys/class/net/eth0 fou<6>[ 8.300203] Bluetooth: hci0: setting up ROME/QCA6390
6357 16:31:57.922926 nd
6358 16:31:57.922999 done.
6359 16:31:57.933261 Begin: Waiting up to <6>[ 8.450720] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6360 16:31:57.940457 180 secs for any network device <6>[ 8.456806] Bluetooth: HCI UART protocol Marvell registered
6361 16:31:57.943610 to become available ... done.
6362 16:31:57.953528 <4>[ 8.467390] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6363 16:31:57.956481 <4>[ 8.467390] Fallback method does not support PEC.
6364 16:31:57.963906 <3>[ 8.512434] Bluetooth: hci0: Frame reassembly failed (-84)
6365 16:31:58.044070 <3>[ 8.707403] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6366 16:31:58.059336 <3>[ 8.723077] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6367 16:31:58.082977 IP-Config: eth0 hardware address 00:e0:4c:68:0b:b9 mtu 1500 DHCP
6368 16:31:58.089649 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6369 16:31:58.096192 address: 192.168.201.13 broadcast: 192.168.201.255 netmask: 255.255.255.0
6370 16:31:58.102813 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6371 16:31:58.109259 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-0
6372 16:31:58.115724 domain : lava-rack
6373 16:31:58.119191 rootserver: 192.168.201.1 rootpath:
6374 16:31:58.122152 filename :
6375 16:31:58.135317 <6>[ 8.799346] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6376 16:31:58.145168 <6>[ 8.812422] Bluetooth: hci0: QCA Product ID :0x00000008
6377 16:31:58.153818 <6>[ 8.820838] Bluetooth: hci0: QCA SOC Version :0x00000044
6378 16:31:58.162941 <6>[ 8.830053] Bluetooth: hci0: QCA ROM Version :0x00000302
6379 16:31:58.171911 <6>[ 8.839225] Bluetooth: hci0: QCA Patch Version:0x00000111
6380 16:31:58.180769 <6>[ 8.848048] Bluetooth: hci0: QCA controller version 0x00440302
6381 16:31:58.192729 <6>[ 8.856834] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6382 16:31:58.203084 <4>[ 8.866069] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6383 16:31:58.213298 <4>[ 8.877038] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6384 16:31:58.219948 <3>[ 8.877432] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6385 16:31:58.232273 <4>[ 8.895192] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6386 16:31:58.238600 <3>[ 8.895977] Bluetooth: hci0: QCA Failed to download patch (-2)
6387 16:31:58.245424 <4>[ 8.907490] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6388 16:31:58.253281 <4>[ 8.920744] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6389 16:31:58.306093 done.
6390 16:31:58.313760 Begin: Running /scripts/nfs-bottom ... done.
6391 16:31:58.324779 Begin: Running /scripts/init-bottom ... done.
6392 16:31:59.651512 <6>[ 10.318508] NET: Registered PF_INET6 protocol family
6393 16:31:59.663962 <6>[ 10.331080] Segment Routing with IPv6
6394 16:31:59.670887 <6>[ 10.337697] In-situ OAM (IOAM) with IPv6
6395 16:31:59.847270 <30>[ 10.487696] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6396 16:31:59.867664 <30>[ 10.534752] systemd[1]: Detected architecture arm64.
6397 16:31:59.878378
6398 16:31:59.881498 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6399 16:31:59.881591
6400 16:31:59.903145 <30>[ 10.570564] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6401 16:32:00.909987 <30>[ 11.573807] systemd[1]: Queued start job for default target graphical.target.
6402 16:32:00.954278 <30>[ 11.618268] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6403 16:32:00.966700 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6404 16:32:00.987807 <30>[ 11.651661] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6405 16:32:01.001125 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6406 16:32:01.020232 <30>[ 11.683798] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6407 16:32:01.034057 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6408 16:32:01.054702 <30>[ 11.718835] systemd[1]: Created slice user.slice - User and Session Slice.
6409 16:32:01.067073 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6410 16:32:01.089211 <30>[ 11.749849] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6411 16:32:01.102397 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6412 16:32:01.124980 <30>[ 11.785681] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6413 16:32:01.137857 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6414 16:32:01.163999 <30>[ 11.817630] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6415 16:32:01.182960 <30>[ 11.846936] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6416 16:32:01.190984 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6417 16:32:01.209525 <30>[ 11.873450] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6418 16:32:01.222744 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6419 16:32:01.241641 <30>[ 11.905492] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6420 16:32:01.255617 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6421 16:32:01.270384 <30>[ 11.937533] systemd[1]: Reached target paths.target - Path Units.
6422 16:32:01.284655 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6423 16:32:01.301750 <30>[ 11.965456] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6424 16:32:01.313878 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6425 16:32:01.326125 <30>[ 11.993419] systemd[1]: Reached target slices.target - Slice Units.
6426 16:32:01.341249 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6427 16:32:01.354360 <30>[ 12.021465] systemd[1]: Reached target swap.target - Swaps.
6428 16:32:01.364881 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6429 16:32:01.385750 <30>[ 12.049500] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6430 16:32:01.398959 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6431 16:32:01.418294 <30>[ 12.081838] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6432 16:32:01.431965 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6433 16:32:01.452901 <30>[ 12.116423] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6434 16:32:01.466042 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6435 16:32:01.483163 <30>[ 12.147038] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6436 16:32:01.497791 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6437 16:32:01.514195 <30>[ 12.178172] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6438 16:32:01.526294 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6439 16:32:01.547601 <30>[ 12.211160] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6440 16:32:01.560830 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6441 16:32:01.580690 <30>[ 12.244492] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6442 16:32:01.594217 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6443 16:32:01.610244 <30>[ 12.274022] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6444 16:32:01.623426 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6445 16:32:01.662022 <30>[ 12.326042] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6446 16:32:01.673122 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6447 16:32:01.694300 <30>[ 12.358012] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6448 16:32:01.705175 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6449 16:32:01.726328 <30>[ 12.390253] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6450 16:32:01.737866 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6451 16:32:01.761148 <30>[ 12.418296] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6452 16:32:01.783387 <30>[ 12.447322] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6453 16:32:01.795239 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6454 16:32:01.834593 <30>[ 12.498235] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6455 16:32:01.846119 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6456 16:32:01.866273 <30>[ 12.529780] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6457 16:32:01.876794 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6458 16:32:01.898673 <30>[ 12.562337] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6459 16:32:01.912212 Startin<6>[ 12.573896] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6460 16:32:01.915973 g [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6461 16:32:01.982840 <30>[ 12.646684] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6462 16:32:01.997528 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6463 16:32:02.020536 <30>[ 12.684309] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6464 16:32:02.033577 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6465 16:32:02.054870 <30>[ 12.718713] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6466 16:32:02.066418 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6467 16:32:02.075638 <6>[ 12.742824] fuse: init (API version 7.37)
6468 16:32:02.090850 <30>[ 12.754561] systemd[1]: Starting systemd-journald.service - Journal Service...
6469 16:32:02.102618 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6470 16:32:02.130387 <30>[ 12.794018] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6471 16:32:02.140894 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6472 16:32:02.202011 <30>[ 12.862450] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6473 16:32:02.213997 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6474 16:32:02.233608 <30>[ 12.897638] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6475 16:32:02.246359 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6476 16:32:02.265150 <30>[ 12.928914] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6477 16:32:02.274713 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6478 16:32:02.292306 <3>[ 12.955491] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6479 16:32:02.306711 <3>[ 12.970397] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6480 16:32:02.313337 <30>[ 12.973705] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6481 16:32:02.330998 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - H<3>[ 12.994912] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6482 16:32:02.334384 uge Pages File System.
6483 16:32:02.348644 <3>[ 13.012138] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6484 16:32:02.358953 <30>[ 13.021401] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6485 16:32:02.373322 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSI<3>[ 13.037065] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6486 16:32:02.376011 X Message Queue File System.
6487 16:32:02.390655 <3>[ 13.054458] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6488 16:32:02.401685 <30>[ 13.063417] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6489 16:32:02.408477 <3>[ 13.070029] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6490 16:32:02.428373 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug <3>[ 13.091337] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6491 16:32:02.428520 File System.
6492 16:32:02.448017 <30>[ 13.110510] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6493 16:32:02.459544 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6494 16:32:02.478635 <30>[ 13.142702] systemd[1]: Started systemd-journald.service - Journal Service.
6495 16:32:02.490491 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6496 16:32:02.511274 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6497 16:32:02.536748 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6498 16:32:02.560344 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6499 16:32:02.580305 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6500 16:32:02.600859 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6501 16:32:02.624488 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6502 16:32:02.647727 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6503 16:32:02.671138 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6504 16:32:02.695140 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6505 16:32:02.720711 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6506 16:32:02.754749 <4>[ 13.411859] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6507 16:32:02.766011 <3>[ 13.429626] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6508 16:32:02.794415 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6509 16:32:02.819870 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6510 16:32:02.842162 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6511 16:32:02.864903 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6512 16:32:02.899821 Starting [0;1;39msyste<46>[ 13.562698] systemd-journald[317]: Received client request to flush runtime journal.
6513 16:32:02.903393 md-sysctl.se…ce[0m - Apply Kernel Variables...
6514 16:32:02.933199 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6515 16:32:03.228963 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6516 16:32:03.248523 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6517 16:32:03.267530 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6518 16:32:03.289023 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6519 16:32:03.672319 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6520 16:32:04.037546 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6521 16:32:04.079534 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6522 16:32:04.378809 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6523 16:32:04.481076 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6524 16:32:04.498686 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6525 16:32:04.518433 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6526 16:32:04.570823 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6527 16:32:04.598780 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6528 16:32:04.847031 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6529 16:32:04.902535 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6530 16:32:04.941448 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6531 16:32:04.984602 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6532 16:32:05.146101 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6533 16:32:05.162540 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6534 16:32:05.171654 <4>[ 15.836907] power_supply_show_property: 4 callbacks suppressed
6535 16:32:05.179468 <3>[ 15.836916] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6536 16:32:05.186580 <3>[ 15.839406] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6537 16:32:05.197968 <3>[ 15.848851] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6538 16:32:05.220631 <3>[ 15.883881] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6539 16:32:05.235209 <3>[ 15.898470] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6540 16:32:05.250540 <3>[ 15.913720] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6541 16:32:05.264808 <3>[ 15.928763] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6542 16:32:05.280690 <3>[ 15.943765] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6543 16:32:05.297015 <3>[ 15.960566] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6544 16:32:05.312373 <3>[ 15.975393] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6545 16:32:05.506891 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6546 16:32:05.526295 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6547 16:32:05.546318 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6548 16:32:05.602489 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6549 16:32:05.628355 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6550 16:32:05.650270 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6551 16:32:05.724073 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6552 16:32:05.747957 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6553 16:32:05.771901 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6554 16:32:05.790355 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6555 16:32:05.842985 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6556 16:32:05.863099 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6557 16:32:05.888371 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6558 16:32:05.914082 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6559 16:32:05.937324 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6560 16:32:05.956620 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6561 16:32:05.977573 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6562 16:32:05.996652 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6563 16:32:06.021687 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6564 16:32:06.047080 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6565 16:32:06.066723 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6566 16:32:06.089515 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6567 16:32:06.110427 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6568 16:32:06.130040 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6569 16:32:06.150393 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6570 16:32:06.169916 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6571 16:32:06.185906 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6572 16:32:06.202378 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6573 16:32:06.263098 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6574 16:32:06.283064 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6575 16:32:06.323696 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6576 16:32:06.394895 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6577 16:32:06.420449 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6578 16:32:06.439591 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6579 16:32:06.461639 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6580 16:32:06.478713 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6581 16:32:06.597186 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6582 16:32:06.651955 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6583 16:32:06.704134 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6584 16:32:06.723215 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6585 16:32:06.740418 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6586 16:32:06.784419 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6587 16:32:06.806664 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6588 16:32:06.828600 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6589 16:32:06.847968 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6590 16:32:06.892416 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6591 16:32:06.945965 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6592 16:32:07.034694
6593 16:32:07.037719 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6594 16:32:07.037812
6595 16:32:07.040856 debian-bookworm-arm64 login: root (automatic login)
6596 16:32:07.040946
6597 16:32:07.316131 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Mon Jun 17 16:16:56 UTC 2024 aarch64
6598 16:32:07.316327
6599 16:32:07.322781 The programs included with the Debian GNU/Linux system are free software;
6600 16:32:07.328947 the exact distribution terms for each program are described in the
6601 16:32:07.332584 individual files in /usr/share/doc/*/copyright.
6602 16:32:07.332711
6603 16:32:07.339387 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6604 16:32:07.342524 permitted by applicable law.
6605 16:32:08.460530 Matched prompt #10: / #
6607 16:32:08.461160 Setting prompt string to ['/ #']
6608 16:32:08.461405 end: 2.2.5.1 login-action (duration 00:00:20) [common]
6610 16:32:08.461985 end: 2.2.5 auto-login-action (duration 00:00:20) [common]
6611 16:32:08.462222 start: 2.2.6 expect-shell-connection (timeout 00:03:47) [common]
6612 16:32:08.462450 Setting prompt string to ['/ #']
6613 16:32:08.462620 Forcing a shell prompt, looking for ['/ #']
6615 16:32:08.513144 / #
6616 16:32:08.513731 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6617 16:32:08.514270 Waiting using forced prompt support (timeout 00:02:30)
6618 16:32:08.519314
6619 16:32:08.520085 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6620 16:32:08.520734 start: 2.2.7 export-device-env (timeout 00:03:47) [common]
6622 16:32:08.622132 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14396111/extract-nfsrootfs-gi_tnf6b'
6623 16:32:08.628736 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14396111/extract-nfsrootfs-gi_tnf6b'
6625 16:32:08.730319 / # export NFS_SERVER_IP='192.168.201.1'
6626 16:32:08.737274 export NFS_SERVER_IP='192.168.201.1'
6627 16:32:08.738192 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6628 16:32:08.738880 end: 2.2 depthcharge-retry (duration 00:01:14) [common]
6629 16:32:08.739593 end: 2 depthcharge-action (duration 00:01:14) [common]
6630 16:32:08.740287 start: 3 lava-test-retry (timeout 00:08:03) [common]
6631 16:32:08.740953 start: 3.1 lava-test-shell (timeout 00:08:03) [common]
6632 16:32:08.741384 Using namespace: common
6634 16:32:08.842685 / # #
6635 16:32:08.843435 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6636 16:32:08.849012 #
6637 16:32:08.849891 Using /lava-14396111
6639 16:32:08.951021 / # export SHELL=/bin/bash
6640 16:32:08.956894 export SHELL=/bin/bash
6642 16:32:09.058542 / # . /lava-14396111/environment
6643 16:32:09.064663 . /lava-14396111/environment
6645 16:32:09.171869 / # /lava-14396111/bin/lava-test-runner /lava-14396111/0
6646 16:32:09.172347 Test shell timeout: 10s (minimum of the action and connection timeout)
6647 16:32:09.178106 /lava-14396111/bin/lava-test-runner /lava-14396111/0
6648 16:32:09.432632 + export TESTRUN_ID=0_timesync-off
6649 16:32:09.436164 + TESTRUN_ID=0_timesync-off
6650 16:32:09.439386 + cd /lava-14396111/0/tests/0_timesync-off
6651 16:32:09.442536 ++ cat uuid
6652 16:32:09.448277 + UUID=14396111_1.6.2.3.1
6653 16:32:09.448694 + set +x
6654 16:32:09.454928 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14396111_1.6.2.3.1>
6655 16:32:09.455618 Received signal: <STARTRUN> 0_timesync-off 14396111_1.6.2.3.1
6656 16:32:09.455996 Starting test lava.0_timesync-off (14396111_1.6.2.3.1)
6657 16:32:09.456417 Skipping test definition patterns.
6658 16:32:09.458181 + systemctl stop systemd-timesyncd
6659 16:32:09.545128 + set +x
6660 16:32:09.548069 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14396111_1.6.2.3.1>
6661 16:32:09.548746 Received signal: <ENDRUN> 0_timesync-off 14396111_1.6.2.3.1
6662 16:32:09.549158 Ending use of test pattern.
6663 16:32:09.549474 Ending test lava.0_timesync-off (14396111_1.6.2.3.1), duration 0.09
6665 16:32:09.617416 + export TESTRUN_ID=1_kselftest-arm64
6666 16:32:09.617821 + TESTRUN_ID=1_kselftest-arm64
6667 16:32:09.623834 + cd /lava-14396111/0/tests/1_kselftest-arm64
6668 16:32:09.624224 ++ cat uuid
6669 16:32:09.627154 + UUID=14396111_1.6.2.3.5
6670 16:32:09.627557 + set +x
6671 16:32:09.633544 <LAVA_SIGNAL_STARTRUN 1_kselftest-arm64 14396111_1.6.2.3.5>
6672 16:32:09.634202 Received signal: <STARTRUN> 1_kselftest-arm64 14396111_1.6.2.3.5
6673 16:32:09.634549 Starting test lava.1_kselftest-arm64 (14396111_1.6.2.3.5)
6674 16:32:09.634929 Skipping test definition patterns.
6675 16:32:09.637114 + cd ./automated/linux/kselftest/
6676 16:32:09.667103 + ./kselftest.sh -c arm64 -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip-gitlab -e '' -p /opt/kselftests/mainline/ -n 1 -i 1
6677 16:32:09.699313 INFO: install_deps skipped
6678 16:32:10.202779 --2024-06-17 16:31:12-- http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/kselftest.tar.xz
6679 16:32:10.239547 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6680 16:32:10.367504 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6681 16:32:10.495301 HTTP request sent, awaiting response... 200 OK
6682 16:32:10.498432 Length: 1650228 (1.6M) [application/octet-stream]
6683 16:32:10.501715 Saving to: 'kselftest_armhf.tar.gz'
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6685 16:32:10.501983
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6690 16:32:11.897570 kselftest_armhf.tar 59%[==========> ] 957.05K 834KB/s
6691 16:32:12.045627 kselftest_armhf.tar 80%[===============> ] 1.26M 919KB/s
6692 16:32:12.052512 kselftest_armhf.tar 100%[===================>] 1.57M 1.02MB/s in 1.6s
6693 16:32:12.052607
6694 16:32:12.198006 2024-06-17 16:31:14 (1.02 MB/s) - 'kselftest_armhf.tar.gz' saved [1650228/1650228]
6695 16:32:12.198187
6696 16:32:17.906173 skiplist:
6697 16:32:17.909651 ========================================
6698 16:32:17.912887 ========================================
6699 16:32:17.952747 arm64:tags_test
6700 16:32:17.955928 arm64:run_tags_test.sh
6701 16:32:17.956016 arm64:fake_sigreturn_bad_magic
6702 16:32:17.959092 arm64:fake_sigreturn_bad_size
6703 16:32:17.962108 arm64:fake_sigreturn_bad_size_for_magic0
6704 16:32:17.965964 arm64:fake_sigreturn_duplicated_fpsimd
6705 16:32:17.969133 arm64:fake_sigreturn_misaligned_sp
6706 16:32:17.972229 arm64:fake_sigreturn_missing_fpsimd
6707 16:32:17.975418 arm64:fake_sigreturn_sme_change_vl
6708 16:32:17.978662 arm64:fake_sigreturn_sve_change_vl
6709 16:32:17.982333 arm64:mangle_pstate_invalid_compat_toggle
6710 16:32:17.985482 arm64:mangle_pstate_invalid_daif_bits
6711 16:32:17.988672 arm64:mangle_pstate_invalid_mode_el1h
6712 16:32:17.991768 arm64:mangle_pstate_invalid_mode_el1t
6713 16:32:17.995363 arm64:mangle_pstate_invalid_mode_el2h
6714 16:32:17.998533 arm64:mangle_pstate_invalid_mode_el2t
6715 16:32:18.002245 arm64:mangle_pstate_invalid_mode_el3h
6716 16:32:18.005312 arm64:mangle_pstate_invalid_mode_el3t
6717 16:32:18.008507 arm64:sme_trap_no_sm
6718 16:32:18.012270 arm64:sme_trap_non_streaming
6719 16:32:18.012351 arm64:sme_trap_za
6720 16:32:18.015271 arm64:sme_vl
6721 16:32:18.015382 arm64:ssve_regs
6722 16:32:18.018845 arm64:sve_regs
6723 16:32:18.018926 arm64:sve_vl
6724 16:32:18.018993 arm64:za_no_regs
6725 16:32:18.021835 arm64:za_regs
6726 16:32:18.021921 arm64:pac
6727 16:32:18.021990 arm64:fp-stress
6728 16:32:18.025453 arm64:sve-ptrace
6729 16:32:18.028415 arm64:sve-probe-vls
6730 16:32:18.028502 arm64:vec-syscfg
6731 16:32:18.028572 arm64:za-fork
6732 16:32:18.032185 arm64:za-ptrace
6733 16:32:18.032267 arm64:check_buffer_fill
6734 16:32:18.035233 arm64:check_child_memory
6735 16:32:18.038436 arm64:check_gcr_el1_cswitch
6736 16:32:18.041553 arm64:check_ksm_options
6737 16:32:18.041633 arm64:check_mmap_options
6738 16:32:18.044826 arm64:check_prctl
6739 16:32:18.048410 arm64:check_tags_inclusion
6740 16:32:18.048486 arm64:check_user_mem
6741 16:32:18.048553 arm64:btitest
6742 16:32:18.052050 arm64:nobtitest
6743 16:32:18.052129 arm64:hwcap
6744 16:32:18.054972 arm64:ptrace
6745 16:32:18.055046 arm64:syscall-abi
6746 16:32:18.058017 arm64:tpidr2
6747 16:32:18.061930 ============== Tests to run ===============
6748 16:32:18.062016 arm64:tags_test
6749 16:32:18.064994 arm64:run_tags_test.sh
6750 16:32:18.068158 arm64:fake_sigreturn_bad_magic
6751 16:32:18.068236 arm64:fake_sigreturn_bad_size
6752 16:32:18.074978 arm64:fake_sigreturn_bad_size_for_magic0
6753 16:32:18.077933 arm64:fake_sigreturn_duplicated_fpsimd
6754 16:32:18.081657 arm64:fake_sigreturn_misaligned_sp
6755 16:32:18.081772 arm64:fake_sigreturn_missing_fpsimd
6756 16:32:18.084719 arm64:fake_sigreturn_sme_change_vl
6757 16:32:18.087839 arm64:fake_sigreturn_sve_change_vl
6758 16:32:18.091435 arm64:mangle_pstate_invalid_compat_toggle
6759 16:32:18.098131 arm64:mangle_pstate_invalid_daif_bits
6760 16:32:18.101118 arm64:mangle_pstate_invalid_mode_el1h
6761 16:32:18.104428 arm64:mangle_pstate_invalid_mode_el1t
6762 16:32:18.108226 arm64:mangle_pstate_invalid_mode_el2h
6763 16:32:18.111269 arm64:mangle_pstate_invalid_mode_el2t
6764 16:32:18.114474 arm64:mangle_pstate_invalid_mode_el3h
6765 16:32:18.118174 arm64:mangle_pstate_invalid_mode_el3t
6766 16:32:18.118294 arm64:sme_trap_no_sm
6767 16:32:18.121165 arm64:sme_trap_non_streaming
6768 16:32:18.124374 arm64:sme_trap_za
6769 16:32:18.124494 arm64:sme_vl
6770 16:32:18.124596 arm64:ssve_regs
6771 16:32:18.128045 arm64:sve_regs
6772 16:32:18.128135 arm64:sve_vl
6773 16:32:18.131085 arm64:za_no_regs
6774 16:32:18.131175 arm64:za_regs
6775 16:32:18.131247 arm64:pac
6776 16:32:18.134523 arm64:fp-stress
6777 16:32:18.134637 arm64:sve-ptrace
6778 16:32:18.137931 arm64:sve-probe-vls
6779 16:32:18.138061 arm64:vec-syscfg
6780 16:32:18.141300 arm64:za-fork
6781 16:32:18.141390 arm64:za-ptrace
6782 16:32:18.144151 arm64:check_buffer_fill
6783 16:32:18.144242 arm64:check_child_memory
6784 16:32:18.147961 arm64:check_gcr_el1_cswitch
6785 16:32:18.151055 arm64:check_ksm_options
6786 16:32:18.154612 arm64:check_mmap_options
6787 16:32:18.154702 arm64:check_prctl
6788 16:32:18.157804 arm64:check_tags_inclusion
6789 16:32:18.157904 arm64:check_user_mem
6790 16:32:18.160675 arm64:btitest
6791 16:32:18.160765 arm64:nobtitest
6792 16:32:18.160849 arm64:hwcap
6793 16:32:18.164038 arm64:ptrace
6794 16:32:18.164160 arm64:syscall-abi
6795 16:32:18.167768 arm64:tpidr2
6796 16:32:18.170971 ===========End Tests to run ===============
6797 16:32:18.171062 shardfile-arm64 pass
6798 16:32:18.362402 <12>[ 29.028903] kselftest: Running tests in arm64
6799 16:32:18.371851 TAP version 13
6800 16:32:18.385997 1..48
6801 16:32:18.402743 # selftests: arm64: tags_test
6802 16:32:18.858083 ok 1 selftests: arm64: tags_test
6803 16:32:18.878505 # selftests: arm64: run_tags_test.sh
6804 16:32:18.939913 # --------------------
6805 16:32:18.943511 # running tags test
6806 16:32:18.943623 # --------------------
6807 16:32:18.946523 # [PASS]
6808 16:32:18.949709 ok 2 selftests: arm64: run_tags_test.sh
6809 16:32:18.964529 # selftests: arm64: fake_sigreturn_bad_magic
6810 16:32:19.046733 # Registered handlers for all signals.
6811 16:32:19.046902 # Detected MINSTKSIGSZ:4720
6812 16:32:19.049559 # Testcase initialized.
6813 16:32:19.053180 # uc context validated.
6814 16:32:19.056255 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6815 16:32:19.059999 # Handled SIG_COPYCTX
6816 16:32:19.060105 # Available space:3568
6817 16:32:19.066088 # Using badly built context - ERR: BAD MAGIC !
6818 16:32:19.072801 # SIG_OK -- SP:0xFFFFD3B32220 si_addr@:0xffffd3b32220 si_code:2 token@:0xffffd3b30fc0 offset:-4704
6819 16:32:19.076393 # ==>> completed. PASS(1)
6820 16:32:19.082767 # # FAKE_SIGRETURN_BAD_MAGIC :: Trigger a sigreturn with a sigframe with a bad magic
6821 16:32:19.089580 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFD3B30FC0
6822 16:32:19.096259 ok 3 selftests: arm64: fake_sigreturn_bad_magic
6823 16:32:19.099195 # selftests: arm64: fake_sigreturn_bad_size
6824 16:32:19.137210 # Registered handlers for all signals.
6825 16:32:19.137355 # Detected MINSTKSIGSZ:4720
6826 16:32:19.140273 # Testcase initialized.
6827 16:32:19.143812 # uc context validated.
6828 16:32:19.146856 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6829 16:32:19.150043 # Handled SIG_COPYCTX
6830 16:32:19.150175 # Available space:3568
6831 16:32:19.153776 # uc context validated.
6832 16:32:19.160340 # Using badly built context - ERR: Bad size for esr_context
6833 16:32:19.167075 # SIG_OK -- SP:0xFFFFF817D990 si_addr@:0xfffff817d990 si_code:2 token@:0xfffff817c730 offset:-4704
6834 16:32:19.169953 # ==>> completed. PASS(1)
6835 16:32:19.176770 # # FAKE_SIGRETURN_BAD_SIZE :: Triggers a sigreturn with a overrun __reserved area
6836 16:32:19.183606 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFF817C730
6837 16:32:19.189925 ok 4 selftests: arm64: fake_sigreturn_bad_size
6838 16:32:19.193083 # selftests: arm64: fake_sigreturn_bad_size_for_magic0
6839 16:32:19.223964 # Registered handlers for all signals.
6840 16:32:19.224117 # Detected MINSTKSIGSZ:4720
6841 16:32:19.227803 # Testcase initialized.
6842 16:32:19.230715 # uc context validated.
6843 16:32:19.233578 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6844 16:32:19.237079 # Handled SIG_COPYCTX
6845 16:32:19.237177 # Available space:3568
6846 16:32:19.243659 # Using badly built context - ERR: Bad size for terminator
6847 16:32:19.253743 # SIG_OK -- SP:0xFFFFFD264DD0 si_addr@:0xfffffd264dd0 si_code:2 token@:0xfffffd263b70 offset:-4704
6848 16:32:19.253891 # ==>> completed. PASS(1)
6849 16:32:19.263546 # # FAKE_SIGRETURN_BAD_SIZE_FOR_TERMINATOR :: Trigger a sigreturn using non-zero size terminator
6850 16:32:19.270219 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFFD263B70
6851 16:32:19.273848 ok 5 selftests: arm64: fake_sigreturn_bad_size_for_magic0
6852 16:32:19.279957 # selftests: arm64: fake_sigreturn_duplicated_fpsimd
6853 16:32:19.316905 # Registered handlers for all signals.
6854 16:32:19.317060 # Detected MINSTKSIGSZ:4720
6855 16:32:19.319848 # Testcase initialized.
6856 16:32:19.323335 # uc context validated.
6857 16:32:19.326411 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6858 16:32:19.330015 # Handled SIG_COPYCTX
6859 16:32:19.330110 # Available space:3568
6860 16:32:19.336325 # Using badly built context - ERR: Multiple FPSIMD_MAGIC
6861 16:32:19.346423 # SIG_OK -- SP:0xFFFFEF6EA550 si_addr@:0xffffef6ea550 si_code:2 token@:0xffffef6e92f0 offset:-4704
6862 16:32:19.346585 # ==>> completed. PASS(1)
6863 16:32:19.356513 # # FAKE_SIGRETURN_DUPLICATED_FPSIMD :: Triggers a sigreturn including two fpsimd_context
6864 16:32:19.362606 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFEF6E92F0
6865 16:32:19.366398 ok 6 selftests: arm64: fake_sigreturn_duplicated_fpsimd
6866 16:32:19.369349 # selftests: arm64: fake_sigreturn_misaligned_sp
6867 16:32:19.418062 # Registered handlers for all signals.
6868 16:32:19.418243 # Detected MINSTKSIGSZ:4720
6869 16:32:19.421886 # Testcase initialized.
6870 16:32:19.425049 # uc context validated.
6871 16:32:19.428199 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6872 16:32:19.431262 # Handled SIG_COPYCTX
6873 16:32:19.437913 # SIG_OK -- SP:0xFFFFEAE8D103 si_addr@:0xffffeae8d103 si_code:2 token@:0xffffeae8d103 offset:0
6874 16:32:19.441495 # ==>> completed. PASS(1)
6875 16:32:19.447803 # # FAKE_SIGRETURN_MISALIGNED_SP :: Triggers a sigreturn with a misaligned sigframe
6876 16:32:19.454907 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFEAE8D103
6877 16:32:19.461266 ok 7 selftests: arm64: fake_sigreturn_misaligned_sp
6878 16:32:19.464664 # selftests: arm64: fake_sigreturn_missing_fpsimd
6879 16:32:19.510262 # Registered handlers for all signals.
6880 16:32:19.510425 # Detected MINSTKSIGSZ:4720
6881 16:32:19.514003 # Testcase initialized.
6882 16:32:19.517242 # uc context validated.
6883 16:32:19.520116 # 4560 byte GOOD CONTEXT grabbed from sig_copyctx handler
6884 16:32:19.523903 # Handled SIG_COPYCTX
6885 16:32:19.526953 # Mangling template header. Spare space:4096
6886 16:32:19.530531 # Using badly built context - ERR: Missing FPSIMD
6887 16:32:19.540632 # SIG_OK -- SP:0xFFFFE03BADF0 si_addr@:0xffffe03badf0 si_code:2 token@:0xffffe03b9b90 offset:-4704
6888 16:32:19.543796 # ==>> completed. PASS(1)
6889 16:32:19.550095 # # FAKE_SIGRETURN_MISSING_FPSIMD :: Triggers a sigreturn with a missing fpsimd_context
6890 16:32:19.556955 # Calling sigreturn with fake sigframe sized:4688 at SP @FFFFE03B9B90
6891 16:32:19.560292 ok 8 selftests: arm64: fake_sigreturn_missing_fpsimd
6892 16:32:19.566529 # selftests: arm64: fake_sigreturn_sme_change_vl
6893 16:32:19.599042 # Registered handlers for all signals.
6894 16:32:19.599197 # Detected MINSTKSIGSZ:4720
6895 16:32:19.602234 # ==>> completed. SKIP.
6896 16:32:19.608959 # # FAKE_SIGRETURN_SSVE_CHANGE :: Attempt to change Streaming SVE VL
6897 16:32:19.612631 ok 9 selftests: arm64: fake_sigreturn_sme_change_vl # SKIP
6898 16:32:19.622495 # selftests: arm64: fake_sigreturn_sve_change_vl
6899 16:32:19.676178 # Registered handlers for all signals.
6900 16:32:19.676363 # Detected MINSTKSIGSZ:4720
6901 16:32:19.679819 # ==>> completed. SKIP.
6902 16:32:19.686403 # # FAKE_SIGRETURN_SVE_CHANGE :: Attempt to change SVE VL
6903 16:32:19.689115 ok 10 selftests: arm64: fake_sigreturn_sve_change_vl # SKIP
6904 16:32:19.698037 # selftests: arm64: mangle_pstate_invalid_compat_toggle
6905 16:32:19.767037 # Registered handlers for all signals.
6906 16:32:19.767195 # Detected MINSTKSIGSZ:4720
6907 16:32:19.770762 # Testcase initialized.
6908 16:32:19.773745 # uc context validated.
6909 16:32:19.773839 # Handled SIG_TRIG
6910 16:32:19.783682 # SIG_OK -- SP:0xFFFFD7DF0370 si_addr@:0xffffd7df0370 si_code:2 token@:(nil) offset:-281474303460208
6911 16:32:19.786804 # ==>> completed. PASS(1)
6912 16:32:19.793377 # # MANGLE_PSTATE_INVALID_STATE_TOGGLE :: Mangling uc_mcontext with INVALID STATE_TOGGLE
6913 16:32:19.800111 ok 11 selftests: arm64: mangle_pstate_invalid_compat_toggle
6914 16:32:19.803797 # selftests: arm64: mangle_pstate_invalid_daif_bits
6915 16:32:19.867627 # Registered handlers for all signals.
6916 16:32:19.867813 # Detected MINSTKSIGSZ:4720
6917 16:32:19.870718 # Testcase initialized.
6918 16:32:19.873778 # uc context validated.
6919 16:32:19.873874 # Handled SIG_TRIG
6920 16:32:19.883956 # SIG_OK -- SP:0xFFFFC9D64A00 si_addr@:0xffffc9d64a00 si_code:2 token@:(nil) offset:-281474068007424
6921 16:32:19.887019 # ==>> completed. PASS(1)
6922 16:32:19.894139 # # MANGLE_PSTATE_INVALID_DAIF_BITS :: Mangling uc_mcontext with INVALID DAIF_BITS
6923 16:32:19.896972 ok 12 selftests: arm64: mangle_pstate_invalid_daif_bits
6924 16:32:19.903535 # selftests: arm64: mangle_pstate_invalid_mode_el1h
6925 16:32:19.952983 # Registered handlers for all signals.
6926 16:32:19.953140 # Detected MINSTKSIGSZ:4720
6927 16:32:19.956091 # Testcase initialized.
6928 16:32:19.959250 # uc context validated.
6929 16:32:19.959371 # Handled SIG_TRIG
6930 16:32:19.969118 # SIG_OK -- SP:0xFFFFDD1DFE10 si_addr@:0xffffdd1dfe10 si_code:2 token@:(nil) offset:-281474391473680
6931 16:32:19.972185 # ==>> completed. PASS(1)
6932 16:32:19.979029 # # MANGLE_PSTATE_INVALID_MODE_EL1h :: Mangling uc_mcontext INVALID MODE EL1h
6933 16:32:19.982650 ok 13 selftests: arm64: mangle_pstate_invalid_mode_el1h
6934 16:32:19.989172 # selftests: arm64: mangle_pstate_invalid_mode_el1t
6935 16:32:20.060058 # Registered handlers for all signals.
6936 16:32:20.060199 # Detected MINSTKSIGSZ:4720
6937 16:32:20.063837 # Testcase initialized.
6938 16:32:20.066966 # uc context validated.
6939 16:32:20.067086 # Handled SIG_TRIG
6940 16:32:20.076724 # SIG_OK -- SP:0xFFFFC77F8870 si_addr@:0xffffc77f8870 si_code:2 token@:(nil) offset:-281474028767344
6941 16:32:20.079836 # ==>> completed. PASS(1)
6942 16:32:20.086769 # # MANGLE_PSTATE_INVALID_MODE_EL1t :: Mangling uc_mcontext INVALID MODE EL1t
6943 16:32:20.089796 ok 14 selftests: arm64: mangle_pstate_invalid_mode_el1t
6944 16:32:20.096352 # selftests: arm64: mangle_pstate_invalid_mode_el2h
6945 16:32:20.144286 # Registered handlers for all signals.
6946 16:32:20.144447 # Detected MINSTKSIGSZ:4720
6947 16:32:20.147881 # Testcase initialized.
6948 16:32:20.150974 # uc context validated.
6949 16:32:20.151092 # Handled SIG_TRIG
6950 16:32:20.160983 # SIG_OK -- SP:0xFFFFEE3B7010 si_addr@:0xffffee3b7010 si_code:2 token@:(nil) offset:-281474678616080
6951 16:32:20.164680 # ==>> completed. PASS(1)
6952 16:32:20.170972 # # MANGLE_PSTATE_INVALID_MODE_EL2h :: Mangling uc_mcontext INVALID MODE EL2h
6953 16:32:20.174616 ok 15 selftests: arm64: mangle_pstate_invalid_mode_el2h
6954 16:32:20.180793 # selftests: arm64: mangle_pstate_invalid_mode_el2t
6955 16:32:20.216939 # Registered handlers for all signals.
6956 16:32:20.217136 # Detected MINSTKSIGSZ:4720
6957 16:32:20.220344 # Testcase initialized.
6958 16:32:20.223886 # uc context validated.
6959 16:32:20.224049 # Handled SIG_TRIG
6960 16:32:20.233962 # SIG_OK -- SP:0xFFFFCAFA37F0 si_addr@:0xffffcafa37f0 si_code:2 token@:(nil) offset:-281474087139312
6961 16:32:20.237379 # ==>> completed. PASS(1)
6962 16:32:20.243933 # # MANGLE_PSTATE_INVALID_MODE_EL2t :: Mangling uc_mcontext INVALID MODE EL2t
6963 16:32:20.246790 ok 16 selftests: arm64: mangle_pstate_invalid_mode_el2t
6964 16:32:20.253672 # selftests: arm64: mangle_pstate_invalid_mode_el3h
6965 16:32:20.293548 # Registered handlers for all signals.
6966 16:32:20.293683 # Detected MINSTKSIGSZ:4720
6967 16:32:20.297251 # Testcase initialized.
6968 16:32:20.300430 # uc context validated.
6969 16:32:20.300521 # Handled SIG_TRIG
6970 16:32:20.310108 # SIG_OK -- SP:0xFFFFD7199D80 si_addr@:0xffffd7199d80 si_code:2 token@:(nil) offset:-281474290523520
6971 16:32:20.313826 # ==>> completed. PASS(1)
6972 16:32:20.319994 # # MANGLE_PSTATE_INVALID_MODE_EL3h :: Mangling uc_mcontext INVALID MODE EL3h
6973 16:32:20.323782 ok 17 selftests: arm64: mangle_pstate_invalid_mode_el3h
6974 16:32:20.330034 # selftests: arm64: mangle_pstate_invalid_mode_el3t
6975 16:32:20.384862 # Registered handlers for all signals.
6976 16:32:20.385046 # Detected MINSTKSIGSZ:4720
6977 16:32:20.387933 # Testcase initialized.
6978 16:32:20.391593 # uc context validated.
6979 16:32:20.391683 # Handled SIG_TRIG
6980 16:32:20.401350 # SIG_OK -- SP:0xFFFFDCE22F60 si_addr@:0xffffdce22f60 si_code:2 token@:(nil) offset:-281474387554144
6981 16:32:20.404444 # ==>> completed. PASS(1)
6982 16:32:20.411164 # # MANGLE_PSTATE_INVALID_MODE_EL3t :: Mangling uc_mcontext INVALID MODE EL3t
6983 16:32:20.414838 ok 18 selftests: arm64: mangle_pstate_invalid_mode_el3t
6984 16:32:20.418044 # selftests: arm64: sme_trap_no_sm
6985 16:32:20.520912 # Registered handlers for all signals.
6986 16:32:20.521084 # Detected MINSTKSIGSZ:4720
6987 16:32:20.524117 # ==>> completed. SKIP.
6988 16:32:20.533867 # # SME trap without SM :: Check that we get a SIGILL if we use streaming mode without enabling it
6989 16:32:20.537737 ok 19 selftests: arm64: sme_trap_no_sm # SKIP
6990 16:32:20.545580 # selftests: arm64: sme_trap_non_streaming
6991 16:32:20.608054 # Registered handlers for all signals.
6992 16:32:20.608238 # Detected MINSTKSIGSZ:4720
6993 16:32:20.611108 # ==>> completed. SKIP.
6994 16:32:20.620931 # # SME SM trap unsupported instruction :: Check that we get a SIGILL if we use an unsupported instruction in streaming mode
6995 16:32:20.627793 ok 20 selftests: arm64: sme_trap_non_streaming # SKIP
6996 16:32:20.630916 # selftests: arm64: sme_trap_za
6997 16:32:20.711853 # Registered handlers for all signals.
6998 16:32:20.712009 # Detected MINSTKSIGSZ:4720
6999 16:32:20.714957 # Testcase initialized.
7000 16:32:20.724708 # SIG_OK -- SP:0xFFFFC9DB6990 si_addr@:0xaaaab6bd2510 si_code:1 token@:(nil) offset:-187650187011344
7001 16:32:20.724835 # ==>> completed. PASS(1)
7002 16:32:20.734595 # # SME ZA trap :: Check that we get a SIGILL if we access ZA without enabling
7003 16:32:20.737751 ok 21 selftests: arm64: sme_trap_za
7004 16:32:20.737839 # selftests: arm64: sme_vl
7005 16:32:20.781124 # Registered handlers for all signals.
7006 16:32:20.781273 # Detected MINSTKSIGSZ:4720
7007 16:32:20.784600 # ==>> completed. SKIP.
7008 16:32:20.791170 # # SME VL :: Check that we get the right SME VL reported
7009 16:32:20.794065 ok 22 selftests: arm64: sme_vl # SKIP
7010 16:32:20.797541 # selftests: arm64: ssve_regs
7011 16:32:20.855188 # Registered handlers for all signals.
7012 16:32:20.855366 # Detected MINSTKSIGSZ:4720
7013 16:32:20.858884 # ==>> completed. SKIP.
7014 16:32:20.865173 # # Streaming SVE registers :: Check that we get the right Streaming SVE registers reported
7015 16:32:20.871884 ok 23 selftests: arm64: ssve_regs # SKIP
7016 16:32:20.871979 # selftests: arm64: sve_regs
7017 16:32:20.939683 # Registered handlers for all signals.
7018 16:32:20.939824 # Detected MINSTKSIGSZ:4720
7019 16:32:20.942800 # ==>> completed. SKIP.
7020 16:32:20.949620 # # SVE registers :: Check that we get the right SVE registers reported
7021 16:32:20.952912 ok 24 selftests: arm64: sve_regs # SKIP
7022 16:32:20.956551 # selftests: arm64: sve_vl
7023 16:32:21.038876 # Registered handlers for all signals.
7024 16:32:21.039029 # Detected MINSTKSIGSZ:4720
7025 16:32:21.042233 # ==>> completed. SKIP.
7026 16:32:21.048906 # # SVE VL :: Check that we get the right SVE VL reported
7027 16:32:21.052113 ok 25 selftests: arm64: sve_vl # SKIP
7028 16:32:21.056573 # selftests: arm64: za_no_regs
7029 16:32:21.124178 # Registered handlers for all signals.
7030 16:32:21.124334 # Detected MINSTKSIGSZ:4720
7031 16:32:21.127100 # ==>> completed. SKIP.
7032 16:32:21.133532 # # ZA registers - ZA disabled :: Check ZA context with ZA disabled
7033 16:32:21.136920 ok 26 selftests: arm64: za_no_regs # SKIP
7034 16:32:21.142441 # selftests: arm64: za_regs
7035 16:32:21.216886 # Registered handlers for all signals.
7036 16:32:21.217039 # Detected MINSTKSIGSZ:4720
7037 16:32:21.219984 # ==>> completed. SKIP.
7038 16:32:21.226826 # # ZA register :: Check that we get the right ZA registers reported
7039 16:32:21.229893 ok 27 selftests: arm64: za_regs # SKIP
7040 16:32:21.233469 # selftests: arm64: pac
7041 16:32:21.297087 # TAP version 13
7042 16:32:21.297247 # 1..7
7043 16:32:21.300103 # # Starting 7 tests from 1 test cases.
7044 16:32:21.303860 # # RUN global.corrupt_pac ...
7045 16:32:21.306942 # # SKIP PAUTH not enabled
7046 16:32:21.310102 # # OK global.corrupt_pac
7047 16:32:21.313562 # ok 1 # SKIP PAUTH not enabled
7048 16:32:21.320330 # # RUN global.pac_instructions_not_nop ...
7049 16:32:21.323334 # # SKIP PAUTH not enabled
7050 16:32:21.326853 # # OK global.pac_instructions_not_nop
7051 16:32:21.330143 # ok 2 # SKIP PAUTH not enabled
7052 16:32:21.336832 # # RUN global.pac_instructions_not_nop_generic ...
7053 16:32:21.339908 # # SKIP Generic PAUTH not enabled
7054 16:32:21.346491 # # OK global.pac_instructions_not_nop_generic
7055 16:32:21.349566 # ok 3 # SKIP Generic PAUTH not enabled
7056 16:32:21.353231 # # RUN global.single_thread_different_keys ...
7057 16:32:21.356316 # # SKIP PAUTH not enabled
7058 16:32:21.362758 # # OK global.single_thread_different_keys
7059 16:32:21.366442 # ok 4 # SKIP PAUTH not enabled
7060 16:32:21.369446 # # RUN global.exec_changed_keys ...
7061 16:32:21.372962 # # SKIP PAUTH not enabled
7062 16:32:21.376506 # # OK global.exec_changed_keys
7063 16:32:21.379599 # ok 5 # SKIP PAUTH not enabled
7064 16:32:21.382782 # # RUN global.context_switch_keep_keys ...
7065 16:32:21.386477 # # SKIP PAUTH not enabled
7066 16:32:21.393173 # # OK global.context_switch_keep_keys
7067 16:32:21.393266 # ok 6 # SKIP PAUTH not enabled
7068 16:32:21.399808 # # RUN global.context_switch_keep_keys_generic ...
7069 16:32:21.402972 # # SKIP Generic PAUTH not enabled
7070 16:32:21.409761 # # OK global.context_switch_keep_keys_generic
7071 16:32:21.412802 # ok 7 # SKIP Generic PAUTH not enabled
7072 16:32:21.416497 # # PASSED: 7 / 7 tests passed.
7073 16:32:21.419570 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:7 error:0
7074 16:32:21.422797 ok 28 selftests: arm64: pac
7075 16:32:21.425812 # selftests: arm64: fp-stress
7076 16:32:27.323900 <6>[ 37.993525] vaux18: disabling
7077 16:32:27.329414 <6>[ 37.999104] vio28: disabling
7078 16:32:31.363835 # TAP version 13
7079 16:32:31.363977 # 1..16
7080 16:32:31.367016 # # 8 CPUs, 0 SVE VLs, 0 SME VLs
7081 16:32:31.370137 # # Will run for 10s
7082 16:32:31.370227 # # Started FPSIMD-0-0
7083 16:32:31.373195 # # Started FPSIMD-0-1
7084 16:32:31.377103 # # Started FPSIMD-1-0
7085 16:32:31.377196 # # Started FPSIMD-1-1
7086 16:32:31.380052 # # Started FPSIMD-2-0
7087 16:32:31.380144 # # Started FPSIMD-2-1
7088 16:32:31.383128 # # Started FPSIMD-3-0
7089 16:32:31.386680 # # Started FPSIMD-3-1
7090 16:32:31.386772 # # Started FPSIMD-4-0
7091 16:32:31.390321 # # Started FPSIMD-4-1
7092 16:32:31.393401 # # Started FPSIMD-5-0
7093 16:32:31.393493 # # Started FPSIMD-5-1
7094 16:32:31.396462 # # Started FPSIMD-6-0
7095 16:32:31.400015 # # Started FPSIMD-6-1
7096 16:32:31.400106 # # Started FPSIMD-7-0
7097 16:32:31.403127 # # Started FPSIMD-7-1
7098 16:32:31.406637 # # FPSIMD-1-0: Vector length: 128 bits
7099 16:32:31.409776 # # FPSIMD-1-0: PID: 1188
7100 16:32:31.413170 # # FPSIMD-1-1: Vector length: 128 bits
7101 16:32:31.413279 # # FPSIMD-1-1: PID: 1189
7102 16:32:31.416342 # # FPSIMD-2-1: Vector length: 128 bits
7103 16:32:31.419636 # # FPSIMD-2-1: PID: 1191
7104 16:32:31.422836 # # FPSIMD-0-0: Vector length: 128 bits
7105 16:32:31.426709 # # FPSIMD-0-1: Vector length: 128 bits
7106 16:32:31.429930 # # FPSIMD-0-1: PID: 1187
7107 16:32:31.433330 # # FPSIMD-0-0: PID: 1186
7108 16:32:31.436209 # # FPSIMD-2-0: Vector length: 128 bits
7109 16:32:31.439486 # # FPSIMD-2-0: PID: 1190
7110 16:32:31.442954 # # FPSIMD-3-0: Vector length: 128 bits
7111 16:32:31.443073 # # FPSIMD-3-0: PID: 1192
7112 16:32:31.446622 # # FPSIMD-5-1: Vector length: 128 bits
7113 16:32:31.449777 # # FPSIMD-5-1: PID: 1197
7114 16:32:31.452841 # # FPSIMD-5-0: Vector length: 128 bits
7115 16:32:31.456350 # # FPSIMD-5-0: PID: 1196
7116 16:32:31.459390 # # FPSIMD-7-0: Vector length: 128 bits
7117 16:32:31.462564 # # FPSIMD-7-0: PID: 1200
7118 16:32:31.466394 # # FPSIMD-4-0: Vector length: 128 bits
7119 16:32:31.466506 # # FPSIMD-4-0: PID: 1194
7120 16:32:31.469526 # # FPSIMD-6-0: Vector length: 128 bits
7121 16:32:31.472770 # # FPSIMD-6-0: PID: 1198
7122 16:32:31.476194 # # FPSIMD-4-1: Vector length: 128 bits
7123 16:32:31.479364 # # FPSIMD-4-1: PID: 1195
7124 16:32:31.482545 # # FPSIMD-7-1: Vector length: 128 bits
7125 16:32:31.486274 # # FPSIMD-7-1: PID: 1201
7126 16:32:31.489232 # # FPSIMD-6-1: Vector length: 128 bits
7127 16:32:31.492955 # # FPSIMD-6-1: PID: 1199
7128 16:32:31.496074 # # FPSIMD-3-1: Vector length: 128 bits
7129 16:32:31.496157 # # FPSIMD-3-1: PID: 1193
7130 16:32:31.499802 # # Finishing up...
7131 16:32:31.506362 # # FPSIMD-2-0: Terminated by signal 15, no error, iterations=1043623, signals=10
7132 16:32:31.512971 # # FPSIMD-3-1: Terminated by signal 15, no error, iterations=741426, signals=10
7133 16:32:31.519374 # # FPSIMD-3-0: Terminated by signal 15, no error, iterations=717454, signals=10
7134 16:32:31.525818 # # FPSIMD-4-0: Terminated by signal 15, no error, iterations=741167, signals=10
7135 16:32:31.535863 # # FPSIMD-5-0: Terminated by signal 15, no error, iterations=789583, signals=10
7136 16:32:31.542807 # # FPSIMD-6-0: Terminated by signal 15, no error, iterations=812432, signals=10
7137 16:32:31.549530 # # FPSIMD-2-1: Terminated by signal 15, no error, iterations=780055, signals=10
7138 16:32:31.549621 # ok 1 FPSIMD-0-0
7139 16:32:31.552328 # ok 2 FPSIMD-0-1
7140 16:32:31.552419 # ok 3 FPSIMD-1-0
7141 16:32:31.555721 # ok 4 FPSIMD-1-1
7142 16:32:31.555812 # ok 5 FPSIMD-2-0
7143 16:32:31.559178 # ok 6 FPSIMD-2-1
7144 16:32:31.559269 # ok 7 FPSIMD-3-0
7145 16:32:31.562179 # ok 8 FPSIMD-3-1
7146 16:32:31.562270 # ok 9 FPSIMD-4-0
7147 16:32:31.565770 # ok 10 FPSIMD-4-1
7148 16:32:31.565861 # ok 11 FPSIMD-5-0
7149 16:32:31.569197 # ok 12 FPSIMD-5-1
7150 16:32:31.572443 # ok 13 FPSIMD-6-0
7151 16:32:31.572564 # ok 14 FPSIMD-6-1
7152 16:32:31.575849 # ok 15 FPSIMD-7-0
7153 16:32:31.575937 # ok 16 FPSIMD-7-1
7154 16:32:31.582411 # # FPSIMD-0-0: Terminated by signal 15, no error, iterations=832584, signals=9
7155 16:32:31.588697 # # FPSIMD-1-0: Terminated by signal 15, no error, iterations=805185, signals=10
7156 16:32:31.598990 # # FPSIMD-0-1: Terminated by signal 15, no error, iterations=733685, signals=10
7157 16:32:31.605826 # # FPSIMD-6-1: Terminated by signal 15, no error, iterations=840729, signals=10
7158 16:32:31.611911 # # FPSIMD-4-1: Terminated by signal 15, no error, iterations=695832, signals=10
7159 16:32:31.618515 # # FPSIMD-7-1: Terminated by signal 15, no error, iterations=797473, signals=10
7160 16:32:31.625642 # # FPSIMD-1-1: Terminated by signal 15, no error, iterations=751974, signals=9
7161 16:32:31.631891 # # FPSIMD-5-1: Terminated by signal 15, no error, iterations=774371, signals=10
7162 16:32:31.638735 # # FPSIMD-7-0: Terminated by signal 15, no error, iterations=746258, signals=10
7163 16:32:31.645006 # # Totals: pass:16 fail:0 xfail:0 xpass:0 skip:0 error:0
7164 16:32:31.648854 ok 29 selftests: arm64: fp-stress
7165 16:32:31.652178 # selftests: arm64: sve-ptrace
7166 16:32:31.652270 # TAP version 13
7167 16:32:31.655410 # 1..4104
7168 16:32:31.655495 # ok 2 # SKIP SVE not available
7169 16:32:31.662058 # # Planned tests != run tests (4104 != 1)
7170 16:32:31.665078 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0
7171 16:32:31.668598 ok 30 selftests: arm64: sve-ptrace # SKIP
7172 16:32:31.672069 # selftests: arm64: sve-probe-vls
7173 16:32:31.674937 # TAP version 13
7174 16:32:31.675043 # 1..2
7175 16:32:31.678664 # ok 2 # SKIP SVE not available
7176 16:32:31.681728 # # Planned tests != run tests (2 != 1)
7177 16:32:31.684883 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0
7178 16:32:31.691846 ok 31 selftests: arm64: sve-probe-vls # SKIP
7179 16:32:31.691933 # selftests: arm64: vec-syscfg
7180 16:32:31.694960 # TAP version 13
7181 16:32:31.695072 # 1..20
7182 16:32:31.698593 # ok 1 # SKIP SVE not supported
7183 16:32:31.701771 # ok 2 # SKIP SVE not supported
7184 16:32:31.705238 # ok 3 # SKIP SVE not supported
7185 16:32:31.705352 # ok 4 # SKIP SVE not supported
7186 16:32:31.708172 # ok 5 # SKIP SVE not supported
7187 16:32:31.711656 # ok 6 # SKIP SVE not supported
7188 16:32:31.714699 # ok 7 # SKIP SVE not supported
7189 16:32:31.718442 # ok 8 # SKIP SVE not supported
7190 16:32:31.721535 # ok 9 # SKIP SVE not supported
7191 16:32:31.725222 # ok 10 # SKIP SVE not supported
7192 16:32:31.728484 # ok 11 # SKIP SME not supported
7193 16:32:31.731610 # ok 12 # SKIP SME not supported
7194 16:32:31.731722 # ok 13 # SKIP SME not supported
7195 16:32:31.734699 # ok 14 # SKIP SME not supported
7196 16:32:31.738381 # ok 15 # SKIP SME not supported
7197 16:32:31.741545 # ok 16 # SKIP SME not supported
7198 16:32:31.744792 # ok 17 # SKIP SME not supported
7199 16:32:31.747977 # ok 18 # SKIP SME not supported
7200 16:32:31.751789 # ok 19 # SKIP SME not supported
7201 16:32:31.755024 # ok 20 # SKIP SME not supported
7202 16:32:31.758145 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:20 error:0
7203 16:32:31.761313 ok 32 selftests: arm64: vec-syscfg
7204 16:32:31.765018 # selftests: arm64: za-fork
7205 16:32:31.765109 # TAP version 13
7206 16:32:31.768116 # 1..1
7207 16:32:31.768205 # # PID: 1278
7208 16:32:31.771274 # # SME support not present
7209 16:32:31.771364 # ok 0 skipped
7210 16:32:31.778017 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0
7211 16:32:31.781496 ok 33 selftests: arm64: za-fork
7212 16:32:31.781596 # selftests: arm64: za-ptrace
7213 16:32:31.844252 # TAP version 13
7214 16:32:31.844367 # 1..1
7215 16:32:31.847454 # ok 2 # SKIP SME not available
7216 16:32:31.854474 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:1 error:0
7217 16:32:31.857522 ok 34 selftests: arm64: za-ptrace # SKIP
7218 16:32:31.871159 # selftests: arm64: check_buffer_fill
7219 16:32:31.955097 # # SKIP: MTE features unavailable
7220 16:32:31.963857 ok 35 selftests: arm64: check_buffer_fill # SKIP
7221 16:32:31.980976 # selftests: arm64: check_child_memory
7222 16:32:32.053946 # # SKIP: MTE features unavailable
7223 16:32:32.064640 ok 36 selftests: arm64: check_child_memory # SKIP
7224 16:32:32.079713 # selftests: arm64: check_gcr_el1_cswitch
7225 16:32:32.144850 # # SKIP: MTE features unavailable
7226 16:32:32.153608 ok 37 selftests: arm64: check_gcr_el1_cswitch # SKIP
7227 16:32:32.167809 # selftests: arm64: check_ksm_options
7228 16:32:32.219589 # # SKIP: MTE features unavailable
7229 16:32:32.228089 ok 38 selftests: arm64: check_ksm_options # SKIP
7230 16:32:32.243830 # selftests: arm64: check_mmap_options
7231 16:32:32.308113 # # SKIP: MTE features unavailable
7232 16:32:32.316779 ok 39 selftests: arm64: check_mmap_options # SKIP
7233 16:32:32.329223 # selftests: arm64: check_prctl
7234 16:32:32.408440 # TAP version 13
7235 16:32:32.408564 # 1..5
7236 16:32:32.411544 # ok 1 check_basic_read
7237 16:32:32.411665 # ok 2 NONE
7238 16:32:32.415390 # ok 3 # SKIP SYNC
7239 16:32:32.415491 # ok 4 # SKIP ASYNC
7240 16:32:32.418447 # ok 5 # SKIP SYNC+ASYNC
7241 16:32:32.421562 # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:3 error:0
7242 16:32:32.424776 ok 40 selftests: arm64: check_prctl
7243 16:32:32.432774 # selftests: arm64: check_tags_inclusion
7244 16:32:32.493459 # # SKIP: MTE features unavailable
7245 16:32:32.500931 ok 41 selftests: arm64: check_tags_inclusion # SKIP
7246 16:32:32.513762 # selftests: arm64: check_user_mem
7247 16:32:32.589245 # # SKIP: MTE features unavailable
7248 16:32:32.598626 ok 42 selftests: arm64: check_user_mem # SKIP
7249 16:32:32.610017 # selftests: arm64: btitest
7250 16:32:32.658599 # TAP version 13
7251 16:32:32.658706 # 1..18
7252 16:32:32.661774 # # HWCAP_PACA not present
7253 16:32:32.664891 # # HWCAP2_BTI not present
7254 16:32:32.668248 # # Test binary built for BTI
7255 16:32:32.671820 # ok 1 nohint_func/call_using_br_x0 # SKIP
7256 16:32:32.674896 # ok 1 nohint_func/call_using_br_x16 # SKIP
7257 16:32:32.678525 # ok 1 nohint_func/call_using_blr # SKIP
7258 16:32:32.681886 # ok 1 bti_none_func/call_using_br_x0 # SKIP
7259 16:32:32.684765 # ok 1 bti_none_func/call_using_br_x16 # SKIP
7260 16:32:32.691349 # ok 1 bti_none_func/call_using_blr # SKIP
7261 16:32:32.695118 # ok 1 bti_c_func/call_using_br_x0 # SKIP
7262 16:32:32.698085 # ok 1 bti_c_func/call_using_br_x16 # SKIP
7263 16:32:32.701316 # ok 1 bti_c_func/call_using_blr # SKIP
7264 16:32:32.704493 # ok 1 bti_j_func/call_using_br_x0 # SKIP
7265 16:32:32.708164 # ok 1 bti_j_func/call_using_br_x16 # SKIP
7266 16:32:32.711438 # ok 1 bti_j_func/call_using_blr # SKIP
7267 16:32:32.714658 # ok 1 bti_jc_func/call_using_br_x0 # SKIP
7268 16:32:32.721705 # ok 1 bti_jc_func/call_using_br_x16 # SKIP
7269 16:32:32.724779 # ok 1 bti_jc_func/call_using_blr # SKIP
7270 16:32:32.727906 # ok 1 paciasp_func/call_using_br_x0 # SKIP
7271 16:32:32.731614 # ok 1 paciasp_func/call_using_br_x16 # SKIP
7272 16:32:32.734808 # ok 1 paciasp_func/call_using_blr # SKIP
7273 16:32:32.741139 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:18 error:0
7274 16:32:32.744815 # # WARNING - EXPECTED TEST COUNT WRONG
7275 16:32:32.747970 ok 43 selftests: arm64: btitest
7276 16:32:32.751176 # selftests: arm64: nobtitest
7277 16:32:32.751273 # TAP version 13
7278 16:32:32.751388 # 1..18
7279 16:32:32.754764 # # HWCAP_PACA not present
7280 16:32:32.757674 # # HWCAP2_BTI not present
7281 16:32:32.761451 # # Test binary not built for BTI
7282 16:32:32.764789 # ok 1 nohint_func/call_using_br_x0 # SKIP
7283 16:32:32.767961 # ok 1 nohint_func/call_using_br_x16 # SKIP
7284 16:32:32.771112 # ok 1 nohint_func/call_using_blr # SKIP
7285 16:32:32.774764 # ok 1 bti_none_func/call_using_br_x0 # SKIP
7286 16:32:32.781360 # ok 1 bti_none_func/call_using_br_x16 # SKIP
7287 16:32:32.784466 # ok 1 bti_none_func/call_using_blr # SKIP
7288 16:32:32.787883 # ok 1 bti_c_func/call_using_br_x0 # SKIP
7289 16:32:32.791247 # ok 1 bti_c_func/call_using_br_x16 # SKIP
7290 16:32:32.794216 # ok 1 bti_c_func/call_using_blr # SKIP
7291 16:32:32.797611 # ok 1 bti_j_func/call_using_br_x0 # SKIP
7292 16:32:32.800936 # ok 1 bti_j_func/call_using_br_x16 # SKIP
7293 16:32:32.804414 # ok 1 bti_j_func/call_using_blr # SKIP
7294 16:32:32.810680 # ok 1 bti_jc_func/call_using_br_x0 # SKIP
7295 16:32:32.814530 # ok 1 bti_jc_func/call_using_br_x16 # SKIP
7296 16:32:32.817856 # ok 1 bti_jc_func/call_using_blr # SKIP
7297 16:32:32.820993 # ok 1 paciasp_func/call_using_br_x0 # SKIP
7298 16:32:32.824250 # ok 1 paciasp_func/call_using_br_x16 # SKIP
7299 16:32:32.827541 # ok 1 paciasp_func/call_using_blr # SKIP
7300 16:32:32.833936 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:18 error:0
7301 16:32:32.837785 # # WARNING - EXPECTED TEST COUNT WRONG
7302 16:32:32.841041 ok 44 selftests: arm64: nobtitest
7303 16:32:32.844192 # selftests: arm64: hwcap
7304 16:32:32.844312 # TAP version 13
7305 16:32:32.844416 # 1..28
7306 16:32:32.847458 # ok 1 cpuinfo_match_RNG
7307 16:32:32.850713 # # SIGILL reported for RNG
7308 16:32:32.853939 # ok 2 # SKIP sigill_RNG
7309 16:32:32.854030 # ok 3 cpuinfo_match_SME
7310 16:32:32.857162 # ok 4 sigill_SME
7311 16:32:32.857253 # ok 5 cpuinfo_match_SVE
7312 16:32:32.861140 # ok 6 sigill_SVE
7313 16:32:32.864077 # ok 7 cpuinfo_match_SVE 2
7314 16:32:32.864169 # # SIGILL reported for SVE 2
7315 16:32:32.867298 # ok 8 # SKIP sigill_SVE 2
7316 16:32:32.870550 # ok 9 cpuinfo_match_SVE AES
7317 16:32:32.873858 # # SIGILL reported for SVE AES
7318 16:32:32.877544 # ok 10 # SKIP sigill_SVE AES
7319 16:32:32.877651 # ok 11 cpuinfo_match_SVE2 PMULL
7320 16:32:32.880493 # # SIGILL reported for SVE2 PMULL
7321 16:32:32.884475 # ok 12 # SKIP sigill_SVE2 PMULL
7322 16:32:32.887314 # ok 13 cpuinfo_match_SVE2 BITPERM
7323 16:32:32.891023 # # SIGILL reported for SVE2 BITPERM
7324 16:32:32.894149 # ok 14 # SKIP sigill_SVE2 BITPERM
7325 16:32:32.897348 # ok 15 cpuinfo_match_SVE2 SHA3
7326 16:32:32.900560 # # SIGILL reported for SVE2 SHA3
7327 16:32:32.904248 # ok 16 # SKIP sigill_SVE2 SHA3
7328 16:32:32.907088 # ok 17 cpuinfo_match_SVE2 SM4
7329 16:32:32.910464 # # SIGILL reported for SVE2 SM4
7330 16:32:32.910556 # ok 18 # SKIP sigill_SVE2 SM4
7331 16:32:32.913810 # ok 19 cpuinfo_match_SVE2 I8MM
7332 16:32:32.917084 # # SIGILL reported for SVE2 I8MM
7333 16:32:32.920572 # ok 20 # SKIP sigill_SVE2 I8MM
7334 16:32:32.924112 # ok 21 cpuinfo_match_SVE2 F32MM
7335 16:32:32.927348 # # SIGILL reported for SVE2 F32MM
7336 16:32:32.930426 # ok 22 # SKIP sigill_SVE2 F32MM
7337 16:32:32.933637 # ok 23 cpuinfo_match_SVE2 F64MM
7338 16:32:32.937272 # # SIGILL reported for SVE2 F64MM
7339 16:32:32.940430 # ok 24 # SKIP sigill_SVE2 F64MM
7340 16:32:32.940521 # ok 25 cpuinfo_match_SVE2 BF16
7341 16:32:32.943468 # # SIGILL reported for SVE2 BF16
7342 16:32:32.946744 # ok 26 # SKIP sigill_SVE2 BF16
7343 16:32:32.949965 # ok 27 cpuinfo_match_SVE2 EBF16
7344 16:32:32.953524 # ok 28 # SKIP sigill_SVE2 EBF16
7345 16:32:32.959941 # # Totals: pass:16 fail:0 xfail:0 xpass:0 skip:12 error:0
7346 16:32:32.960033 ok 45 selftests: arm64: hwcap
7347 16:32:32.963101 # selftests: arm64: ptrace
7348 16:32:32.966816 # TAP version 13
7349 16:32:32.966908 # 1..7
7350 16:32:32.970086 # # Parent is 1520, child is 1521
7351 16:32:32.970176 # ok 1 read_tpidr_one
7352 16:32:32.973325 # ok 2 write_tpidr_one
7353 16:32:32.976440 # ok 3 verify_tpidr_one
7354 16:32:32.976531 # ok 4 count_tpidrs
7355 16:32:32.980229 # ok 5 tpidr2_write
7356 16:32:32.980320 # ok 6 tpidr2_read
7357 16:32:32.983271 # ok 7 write_tpidr_only
7358 16:32:32.986489 # # Totals: pass:7 fail:0 xfail:0 xpass:0 skip:0 error:0
7359 16:32:32.990343 ok 46 selftests: arm64: ptrace
7360 16:32:32.993455 # selftests: arm64: syscall-abi
7361 16:32:33.003194 # TAP version 13
7362 16:32:33.003285 # 1..2
7363 16:32:33.006341 # ok 1 getpid() FPSIMD
7364 16:32:33.009485 # ok 2 sched_yield() FPSIMD
7365 16:32:33.012764 # # Totals: pass:2 fail:0 xfail:0 xpass:0 skip:0 error:0
7366 16:32:33.016426 ok 47 selftests: arm64: syscall-abi
7367 16:32:33.021334 # selftests: arm64: tpidr2
7368 16:32:33.093279 # TAP version 13
7369 16:32:33.093393 # 1..5
7370 16:32:33.096500 # # PID: 1557
7371 16:32:33.096591 # # SME support not present
7372 16:32:33.099740 # ok 0 skipped, TPIDR2 not supported
7373 16:32:33.103310 # ok 1 skipped, TPIDR2 not supported
7374 16:32:33.106252 # ok 2 skipped, TPIDR2 not supported
7375 16:32:33.109748 # ok 3 skipped, TPIDR2 not supported
7376 16:32:33.113011 # ok 4 skipped, TPIDR2 not supported
7377 16:32:33.119375 # # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:5 error:0
7378 16:32:33.123186 ok 48 selftests: arm64: tpidr2
7379 16:32:34.681769 arm64_tags_test pass
7380 16:32:34.685159 arm64_run_tags_test_sh pass
7381 16:32:34.687975 arm64_fake_sigreturn_bad_magic pass
7382 16:32:34.691504 arm64_fake_sigreturn_bad_size pass
7383 16:32:34.694630 arm64_fake_sigreturn_bad_size_for_magic0 pass
7384 16:32:34.698358 arm64_fake_sigreturn_duplicated_fpsimd pass
7385 16:32:34.701533 arm64_fake_sigreturn_misaligned_sp pass
7386 16:32:34.705301 arm64_fake_sigreturn_missing_fpsimd pass
7387 16:32:34.707878 arm64_fake_sigreturn_sme_change_vl skip
7388 16:32:34.711542 arm64_fake_sigreturn_sve_change_vl skip
7389 16:32:34.717985 arm64_mangle_pstate_invalid_compat_toggle pass
7390 16:32:34.721711 arm64_mangle_pstate_invalid_daif_bits pass
7391 16:32:34.724756 arm64_mangle_pstate_invalid_mode_el1h pass
7392 16:32:34.727805 arm64_mangle_pstate_invalid_mode_el1t pass
7393 16:32:34.731623 arm64_mangle_pstate_invalid_mode_el2h pass
7394 16:32:34.734818 arm64_mangle_pstate_invalid_mode_el2t pass
7395 16:32:34.741249 arm64_mangle_pstate_invalid_mode_el3h pass
7396 16:32:34.744999 arm64_mangle_pstate_invalid_mode_el3t pass
7397 16:32:34.745091 arm64_sme_trap_no_sm skip
7398 16:32:34.747983 arm64_sme_trap_non_streaming skip
7399 16:32:34.751152 arm64_sme_trap_za pass
7400 16:32:34.754757 arm64_sme_vl skip
7401 16:32:34.754848 arm64_ssve_regs skip
7402 16:32:34.758210 arm64_sve_regs skip
7403 16:32:34.758301 arm64_sve_vl skip
7404 16:32:34.761191 arm64_za_no_regs skip
7405 16:32:34.761283 arm64_za_regs skip
7406 16:32:34.764482 arm64_pac_PAUTH_not_enabled skip
7407 16:32:34.767706 arm64_pac_PAUTH_not_enabled_dup2 skip
7408 16:32:34.774599 arm64_pac_Generic_PAUTH_not_enabled skip
7409 16:32:34.777675 arm64_pac_PAUTH_not_enabled_dup3 skip
7410 16:32:34.781291 arm64_pac_PAUTH_not_enabled_dup4 skip
7411 16:32:34.784345 arm64_pac_PAUTH_not_enabled_dup5 skip
7412 16:32:34.787719 arm64_pac_Generic_PAUTH_not_enabled_dup2 skip
7413 16:32:34.787836 arm64_pac pass
7414 16:32:34.791325 arm64_fp-stress_FPSIMD-0-0 pass
7415 16:32:34.794464 arm64_fp-stress_FPSIMD-0-1 pass
7416 16:32:34.797994 arm64_fp-stress_FPSIMD-1-0 pass
7417 16:32:34.801477 arm64_fp-stress_FPSIMD-1-1 pass
7418 16:32:34.804430 arm64_fp-stress_FPSIMD-2-0 pass
7419 16:32:34.807868 arm64_fp-stress_FPSIMD-2-1 pass
7420 16:32:34.811014 arm64_fp-stress_FPSIMD-3-0 pass
7421 16:32:34.814240 arm64_fp-stress_FPSIMD-3-1 pass
7422 16:32:34.817982 arm64_fp-stress_FPSIMD-4-0 pass
7423 16:32:34.821005 arm64_fp-stress_FPSIMD-4-1 pass
7424 16:32:34.824171 arm64_fp-stress_FPSIMD-5-0 pass
7425 16:32:34.827270 arm64_fp-stress_FPSIMD-5-1 pass
7426 16:32:34.831057 arm64_fp-stress_FPSIMD-6-0 pass
7427 16:32:34.834297 arm64_fp-stress_FPSIMD-6-1 pass
7428 16:32:34.834388 arm64_fp-stress_FPSIMD-7-0 pass
7429 16:32:34.837475 arm64_fp-stress_FPSIMD-7-1 pass
7430 16:32:34.840697 arm64_fp-stress pass
7431 16:32:34.844348 arm64_sve-ptrace_SVE_not_available skip
7432 16:32:34.847519 arm64_sve-ptrace skip
7433 16:32:34.851187 arm64_sve-probe-vls_SVE_not_available skip
7434 16:32:34.851279 arm64_sve-probe-vls skip
7435 16:32:34.854260 arm64_vec-syscfg_SVE_not_supported skip
7436 16:32:34.861164 arm64_vec-syscfg_SVE_not_supported_dup2 skip
7437 16:32:34.864165 arm64_vec-syscfg_SVE_not_supported_dup3 skip
7438 16:32:34.867226 arm64_vec-syscfg_SVE_not_supported_dup4 skip
7439 16:32:34.870956 arm64_vec-syscfg_SVE_not_supported_dup5 skip
7440 16:32:34.874050 arm64_vec-syscfg_SVE_not_supported_dup6 skip
7441 16:32:34.880408 arm64_vec-syscfg_SVE_not_supported_dup7 skip
7442 16:32:34.884108 arm64_vec-syscfg_SVE_not_supported_dup8 skip
7443 16:32:34.887203 arm64_vec-syscfg_SVE_not_supported_dup9 skip
7444 16:32:34.890922 arm64_vec-syscfg_SVE_not_supported_dup10 skip
7445 16:32:34.893847 arm64_vec-syscfg_SME_not_supported skip
7446 16:32:34.900396 arm64_vec-syscfg_SME_not_supported_dup2 skip
7447 16:32:34.904149 arm64_vec-syscfg_SME_not_supported_dup3 skip
7448 16:32:34.907425 arm64_vec-syscfg_SME_not_supported_dup4 skip
7449 16:32:34.910539 arm64_vec-syscfg_SME_not_supported_dup5 skip
7450 16:32:34.914289 arm64_vec-syscfg_SME_not_supported_dup6 skip
7451 16:32:34.920158 arm64_vec-syscfg_SME_not_supported_dup7 skip
7452 16:32:34.923691 arm64_vec-syscfg_SME_not_supported_dup8 skip
7453 16:32:34.927171 arm64_vec-syscfg_SME_not_supported_dup9 skip
7454 16:32:34.930121 arm64_vec-syscfg_SME_not_supported_dup10 skip
7455 16:32:34.933766 arm64_vec-syscfg pass
7456 16:32:34.936826 arm64_za-fork_skipped pass
7457 16:32:34.936953 arm64_za-fork pass
7458 16:32:34.940031 arm64_za-ptrace_SME_not_available skip
7459 16:32:34.943952 arm64_za-ptrace skip
7460 16:32:34.944043 arm64_check_buffer_fill skip
7461 16:32:34.947078 arm64_check_child_memory skip
7462 16:32:34.950245 arm64_check_gcr_el1_cswitch skip
7463 16:32:34.953390 arm64_check_ksm_options skip
7464 16:32:34.957029 arm64_check_mmap_options skip
7465 16:32:34.960146 arm64_check_prctl_check_basic_read pass
7466 16:32:34.963325 arm64_check_prctl_NONE pass
7467 16:32:34.963446 arm64_check_prctl_SYNC skip
7468 16:32:34.966954 arm64_check_prctl_ASYNC skip
7469 16:32:34.969961 arm64_check_prctl_SYNC_ASYNC skip
7470 16:32:34.973447 arm64_check_prctl pass
7471 16:32:34.976426 arm64_check_tags_inclusion skip
7472 16:32:34.976518 arm64_check_user_mem skip
7473 16:32:34.983348 arm64_btitest_nohint_func_call_using_br_x0 skip
7474 16:32:34.986374 arm64_btitest_nohint_func_call_using_br_x16 skip
7475 16:32:34.990042 arm64_btitest_nohint_func_call_using_blr skip
7476 16:32:34.996374 arm64_btitest_bti_none_func_call_using_br_x0 skip
7477 16:32:34.999417 arm64_btitest_bti_none_func_call_using_br_x16 skip
7478 16:32:35.003229 arm64_btitest_bti_none_func_call_using_blr skip
7479 16:32:35.006252 arm64_btitest_bti_c_func_call_using_br_x0 skip
7480 16:32:35.013036 arm64_btitest_bti_c_func_call_using_br_x16 skip
7481 16:32:35.016207 arm64_btitest_bti_c_func_call_using_blr skip
7482 16:32:35.019496 arm64_btitest_bti_j_func_call_using_br_x0 skip
7483 16:32:35.022637 arm64_btitest_bti_j_func_call_using_br_x16 skip
7484 16:32:35.029084 arm64_btitest_bti_j_func_call_using_blr skip
7485 16:32:35.032562 arm64_btitest_bti_jc_func_call_using_br_x0 skip
7486 16:32:35.036055 arm64_btitest_bti_jc_func_call_using_br_x16 skip
7487 16:32:35.039493 arm64_btitest_bti_jc_func_call_using_blr skip
7488 16:32:35.046053 arm64_btitest_paciasp_func_call_using_br_x0 skip
7489 16:32:35.049104 arm64_btitest_paciasp_func_call_using_br_x16 skip
7490 16:32:35.052449 arm64_btitest_paciasp_func_call_using_blr skip
7491 16:32:35.056138 arm64_btitest pass
7492 16:32:35.059312 arm64_nobtitest_nohint_func_call_using_br_x0 skip
7493 16:32:35.066050 arm64_nobtitest_nohint_func_call_using_br_x16 skip
7494 16:32:35.069232 arm64_nobtitest_nohint_func_call_using_blr skip
7495 16:32:35.072357 arm64_nobtitest_bti_none_func_call_using_br_x0 skip
7496 16:32:35.079202 arm64_nobtitest_bti_none_func_call_using_br_x16 skip
7497 16:32:35.082296 arm64_nobtitest_bti_none_func_call_using_blr skip
7498 16:32:35.085798 arm64_nobtitest_bti_c_func_call_using_br_x0 skip
7499 16:32:35.092181 arm64_nobtitest_bti_c_func_call_using_br_x16 skip
7500 16:32:35.095327 arm64_nobtitest_bti_c_func_call_using_blr skip
7501 16:32:35.099077 arm64_nobtitest_bti_j_func_call_using_br_x0 skip
7502 16:32:35.105459 arm64_nobtitest_bti_j_func_call_using_br_x16 skip
7503 16:32:35.108706 arm64_nobtitest_bti_j_func_call_using_blr skip
7504 16:32:35.112431 arm64_nobtitest_bti_jc_func_call_using_br_x0 skip
7505 16:32:35.118753 arm64_nobtitest_bti_jc_func_call_using_br_x16 skip
7506 16:32:35.122219 arm64_nobtitest_bti_jc_func_call_using_blr skip
7507 16:32:35.125477 arm64_nobtitest_paciasp_func_call_using_br_x0 skip
7508 16:32:35.131830 arm64_nobtitest_paciasp_func_call_using_br_x16 skip
7509 16:32:35.135638 arm64_nobtitest_paciasp_func_call_using_blr skip
7510 16:32:35.135730 arm64_nobtitest pass
7511 16:32:35.138660 arm64_hwcap_cpuinfo_match_RNG pass
7512 16:32:35.142379 arm64_hwcap_sigill_RNG skip
7513 16:32:35.145460 arm64_hwcap_cpuinfo_match_SME pass
7514 16:32:35.148548 arm64_hwcap_sigill_SME pass
7515 16:32:35.152181 arm64_hwcap_cpuinfo_match_SVE pass
7516 16:32:35.155142 arm64_hwcap_sigill_SVE pass
7517 16:32:35.158588 arm64_hwcap_cpuinfo_match_SVE_2 pass
7518 16:32:35.158680 arm64_hwcap_sigill_SVE_2 skip
7519 16:32:35.162276 arm64_hwcap_cpuinfo_match_SVE_AES pass
7520 16:32:35.165467 arm64_hwcap_sigill_SVE_AES skip
7521 16:32:35.168731 arm64_hwcap_cpuinfo_match_SVE2_PMULL pass
7522 16:32:35.171996 arm64_hwcap_sigill_SVE2_PMULL skip
7523 16:32:35.178879 arm64_hwcap_cpuinfo_match_SVE2_BITPERM pass
7524 16:32:35.182122 arm64_hwcap_sigill_SVE2_BITPERM skip
7525 16:32:35.185359 arm64_hwcap_cpuinfo_match_SVE2_SHA3 pass
7526 16:32:35.188334 arm64_hwcap_sigill_SVE2_SHA3 skip
7527 16:32:35.191837 arm64_hwcap_cpuinfo_match_SVE2_SM4 pass
7528 16:32:35.195423 arm64_hwcap_sigill_SVE2_SM4 skip
7529 16:32:35.198615 arm64_hwcap_cpuinfo_match_SVE2_I8MM pass
7530 16:32:35.201727 arm64_hwcap_sigill_SVE2_I8MM skip
7531 16:32:35.205463 arm64_hwcap_cpuinfo_match_SVE2_F32MM pass
7532 16:32:35.208732 arm64_hwcap_sigill_SVE2_F32MM skip
7533 16:32:35.211840 arm64_hwcap_cpuinfo_match_SVE2_F64MM pass
7534 16:32:35.215016 arm64_hwcap_sigill_SVE2_F64MM skip
7535 16:32:35.218819 arm64_hwcap_cpuinfo_match_SVE2_BF16 pass
7536 16:32:35.221884 arm64_hwcap_sigill_SVE2_BF16 skip
7537 16:32:35.225004 arm64_hwcap_cpuinfo_match_SVE2_EBF16 pass
7538 16:32:35.228533 arm64_hwcap_sigill_SVE2_EBF16 skip
7539 16:32:35.228624 arm64_hwcap pass
7540 16:32:35.231523 arm64_ptrace_read_tpidr_one pass
7541 16:32:35.234766 arm64_ptrace_write_tpidr_one pass
7542 16:32:35.238075 arm64_ptrace_verify_tpidr_one pass
7543 16:32:35.241910 arm64_ptrace_count_tpidrs pass
7544 16:32:35.244909 arm64_ptrace_tpidr2_write pass
7545 16:32:35.245035 arm64_ptrace_tpidr2_read pass
7546 16:32:35.247916 arm64_ptrace_write_tpidr_only pass
7547 16:32:35.251539 arm64_ptrace pass
7548 16:32:35.254766 arm64_syscall-abi_getpid_FPSIMD pass
7549 16:32:35.258232 arm64_syscall-abi_sched_yield_FPSIMD pass
7550 16:32:35.261276 arm64_syscall-abi pass
7551 16:32:35.264936 arm64_tpidr2_skipped_TPIDR2_not_supported pass
7552 16:32:35.267963 arm64_tpidr2_skipped_TPIDR2_not_supported_dup2 pass
7553 16:32:35.274251 arm64_tpidr2_skipped_TPIDR2_not_supported_dup3 pass
7554 16:32:35.277980 arm64_tpidr2_skipped_TPIDR2_not_supported_dup4 pass
7555 16:32:35.284226 arm64_tpidr2_skipped_TPIDR2_not_supported_dup5 pass
7556 16:32:35.284319 arm64_tpidr2 pass
7557 16:32:35.287455 + ../../utils/send-to-lava.sh ./output/result.txt
7558 16:32:35.294320 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-arm64 RESULT=pass>
7559 16:32:35.294613 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-arm64 RESULT=pass
7561 16:32:35.300893 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tags_test RESULT=pass>
7562 16:32:35.301161 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tags_test RESULT=pass
7564 16:32:35.307446 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass>
7565 16:32:35.307712 Received signal: <TESTCASE> TEST_CASE_ID=arm64_run_tags_test_sh RESULT=pass
7567 16:32:35.314572 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass>
7568 16:32:35.314838 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_magic RESULT=pass
7570 16:32:35.320965 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass>
7571 16:32:35.321230 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size RESULT=pass
7573 16:32:35.327307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass>
7574 16:32:35.327573 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_bad_size_for_magic0 RESULT=pass
7576 16:32:35.334040 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass>
7577 16:32:35.334305 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_duplicated_fpsimd RESULT=pass
7579 16:32:35.377785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass>
7580 16:32:35.378058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_misaligned_sp RESULT=pass
7582 16:32:35.422116 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass>
7583 16:32:35.422400 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_missing_fpsimd RESULT=pass
7585 16:32:35.469271 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=skip>
7586 16:32:35.469553 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sme_change_vl RESULT=skip
7588 16:32:35.512782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=skip>
7589 16:32:35.513058 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fake_sigreturn_sve_change_vl RESULT=skip
7591 16:32:35.553358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass>
7592 16:32:35.553629 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_compat_toggle RESULT=pass
7594 16:32:35.591752 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass>
7595 16:32:35.592065 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_daif_bits RESULT=pass
7597 16:32:35.630093 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass>
7598 16:32:35.630368 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1h RESULT=pass
7600 16:32:35.672693 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass>
7601 16:32:35.672970 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el1t RESULT=pass
7603 16:32:35.713557 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass>
7604 16:32:35.713837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2h RESULT=pass
7606 16:32:35.753570 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass>
7607 16:32:35.753844 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el2t RESULT=pass
7609 16:32:35.797153 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass>
7610 16:32:35.797443 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3h RESULT=pass
7612 16:32:35.836195 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass>
7613 16:32:35.836477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_mangle_pstate_invalid_mode_el3t RESULT=pass
7615 16:32:35.872638 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=skip>
7616 16:32:35.872923 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_no_sm RESULT=skip
7618 16:32:35.916102 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip>
7619 16:32:35.916395 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_non_streaming RESULT=skip
7621 16:32:35.951699 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_trap_za RESULT=pass>
7622 16:32:35.951968 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_trap_za RESULT=pass
7624 16:32:35.991339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sme_vl RESULT=skip>
7625 16:32:35.991624 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sme_vl RESULT=skip
7627 16:32:36.031882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ssve_regs RESULT=skip>
7628 16:32:36.032156 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ssve_regs RESULT=skip
7630 16:32:36.074703 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_regs RESULT=skip>
7631 16:32:36.074976 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_regs RESULT=skip
7633 16:32:36.117751 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve_vl RESULT=skip>
7634 16:32:36.118036 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve_vl RESULT=skip
7636 16:32:36.160822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_no_regs RESULT=skip>
7637 16:32:36.161130 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_no_regs RESULT=skip
7639 16:32:36.202436 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za_regs RESULT=skip>
7640 16:32:36.202725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za_regs RESULT=skip
7642 16:32:36.246900 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled RESULT=skip
7644 16:32:36.249881 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled RESULT=skip>
7645 16:32:36.295909 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup2 RESULT=skip>
7646 16:32:36.296197 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup2 RESULT=skip
7648 16:32:36.338812 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled RESULT=skip>
7649 16:32:36.339096 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled RESULT=skip
7651 16:32:36.380968 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup3 RESULT=skip>
7652 16:32:36.381239 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup3 RESULT=skip
7654 16:32:36.421613 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup4 RESULT=skip>
7655 16:32:36.421899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup4 RESULT=skip
7657 16:32:36.461278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup5 RESULT=skip>
7658 16:32:36.461552 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_PAUTH_not_enabled_dup5 RESULT=skip
7660 16:32:36.499026 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled_dup2 RESULT=skip>
7661 16:32:36.499340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac_Generic_PAUTH_not_enabled_dup2 RESULT=skip
7663 16:32:36.542690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_pac RESULT=pass>
7664 16:32:36.542969 Received signal: <TESTCASE> TEST_CASE_ID=arm64_pac RESULT=pass
7666 16:32:36.590031 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass>
7667 16:32:36.590356 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-0 RESULT=pass
7669 16:32:36.633815 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-1 RESULT=pass>
7670 16:32:36.634103 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-0-1 RESULT=pass
7672 16:32:36.674167 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-0 RESULT=pass>
7673 16:32:36.674441 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-0 RESULT=pass
7675 16:32:36.714865 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-1 RESULT=pass>
7676 16:32:36.715140 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-1-1 RESULT=pass
7678 16:32:36.760318 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-0 RESULT=pass>
7679 16:32:36.760594 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-0 RESULT=pass
7681 16:32:36.801864 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-1 RESULT=pass>
7682 16:32:36.802178 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-2-1 RESULT=pass
7684 16:32:36.846225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-0 RESULT=pass>
7685 16:32:36.846504 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-0 RESULT=pass
7687 16:32:36.887327 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-1 RESULT=pass>
7688 16:32:36.887653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-3-1 RESULT=pass
7690 16:32:36.931692 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-0 RESULT=pass>
7691 16:32:36.931988 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-0 RESULT=pass
7693 16:32:36.974431 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-1 RESULT=pass>
7694 16:32:36.974706 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-4-1 RESULT=pass
7696 16:32:37.017294 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-0 RESULT=pass>
7697 16:32:37.017577 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-0 RESULT=pass
7699 16:32:37.059517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-1 RESULT=pass>
7700 16:32:37.059795 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-5-1 RESULT=pass
7702 16:32:37.097743 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-0 RESULT=pass>
7703 16:32:37.098019 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-0 RESULT=pass
7705 16:32:37.145489 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-1 RESULT=pass>
7706 16:32:37.145774 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-6-1 RESULT=pass
7708 16:32:37.186834 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-0 RESULT=pass>
7709 16:32:37.187112 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-0 RESULT=pass
7711 16:32:37.225061 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-1 RESULT=pass>
7712 16:32:37.225345 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress_FPSIMD-7-1 RESULT=pass
7714 16:32:37.266161 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_fp-stress RESULT=pass>
7715 16:32:37.266434 Received signal: <TESTCASE> TEST_CASE_ID=arm64_fp-stress RESULT=pass
7717 16:32:37.315125 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace_SVE_not_available RESULT=skip>
7718 16:32:37.315420 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace_SVE_not_available RESULT=skip
7720 16:32:37.348987 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-ptrace RESULT=skip>
7721 16:32:37.349262 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-ptrace RESULT=skip
7723 16:32:37.397580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls_SVE_not_available RESULT=skip>
7724 16:32:37.397863 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls_SVE_not_available RESULT=skip
7726 16:32:37.437756 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_sve-probe-vls RESULT=skip>
7727 16:32:37.438044 Received signal: <TESTCASE> TEST_CASE_ID=arm64_sve-probe-vls RESULT=skip
7729 16:32:37.482064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported RESULT=skip>
7730 16:32:37.482340 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported RESULT=skip
7732 16:32:37.525163 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup2 RESULT=skip>
7733 16:32:37.525450 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup2 RESULT=skip
7735 16:32:37.566156 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup3 RESULT=skip>
7736 16:32:37.566429 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup3 RESULT=skip
7738 16:32:37.610013 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup4 RESULT=skip>
7739 16:32:37.610295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup4 RESULT=skip
7741 16:32:37.648004 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup5 RESULT=skip>
7742 16:32:37.648287 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup5 RESULT=skip
7744 16:32:37.686943 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup6 RESULT=skip>
7745 16:32:37.687214 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup6 RESULT=skip
7747 16:32:37.733763 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup7 RESULT=skip>
7748 16:32:37.734046 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup7 RESULT=skip
7750 16:32:37.775947 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup8 RESULT=skip>
7751 16:32:37.776224 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup8 RESULT=skip
7753 16:32:37.817717 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup9 RESULT=skip>
7754 16:32:37.817994 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup9 RESULT=skip
7756 16:32:37.858872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup10 RESULT=skip>
7757 16:32:37.859147 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SVE_not_supported_dup10 RESULT=skip
7759 16:32:37.901926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported RESULT=skip>
7760 16:32:37.902215 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported RESULT=skip
7762 16:32:37.943543 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup2 RESULT=skip>
7763 16:32:37.943873 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup2 RESULT=skip
7765 16:32:37.986359 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup3 RESULT=skip>
7766 16:32:37.986642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup3 RESULT=skip
7768 16:32:38.025028 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup4 RESULT=skip>
7769 16:32:38.025315 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup4 RESULT=skip
7771 16:32:38.070464 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup5 RESULT=skip>
7772 16:32:38.070740 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup5 RESULT=skip
7774 16:32:38.116879 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup6 RESULT=skip>
7775 16:32:38.117160 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup6 RESULT=skip
7777 16:32:38.161619 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup7 RESULT=skip>
7778 16:32:38.161899 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup7 RESULT=skip
7780 16:32:38.203890 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup8 RESULT=skip>
7781 16:32:38.204181 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup8 RESULT=skip
7783 16:32:38.247608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup9 RESULT=skip>
7784 16:32:38.247884 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup9 RESULT=skip
7786 16:32:38.293223 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup10 RESULT=skip>
7787 16:32:38.293508 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg_SME_not_supported_dup10 RESULT=skip
7789 16:32:38.337098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_vec-syscfg RESULT=pass>
7790 16:32:38.337379 Received signal: <TESTCASE> TEST_CASE_ID=arm64_vec-syscfg RESULT=pass
7792 16:32:38.383423 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork_skipped RESULT=pass>
7793 16:32:38.383699 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork_skipped RESULT=pass
7795 16:32:38.428317 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-fork RESULT=pass>
7796 16:32:38.428666 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-fork RESULT=pass
7798 16:32:38.473210 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace_SME_not_available RESULT=skip>
7799 16:32:38.473506 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace_SME_not_available RESULT=skip
7801 16:32:38.508653 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_za-ptrace RESULT=skip>
7802 16:32:38.508943 Received signal: <TESTCASE> TEST_CASE_ID=arm64_za-ptrace RESULT=skip
7804 16:32:38.554278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_buffer_fill RESULT=skip>
7805 16:32:38.554572 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_buffer_fill RESULT=skip
7807 16:32:38.593059 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_child_memory RESULT=skip>
7808 16:32:38.593376 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_child_memory RESULT=skip
7810 16:32:38.630816 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=skip
7812 16:32:38.633778 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_gcr_el1_cswitch RESULT=skip>
7813 16:32:38.669649 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_ksm_options RESULT=skip>
7814 16:32:38.669964 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_ksm_options RESULT=skip
7816 16:32:38.710662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_mmap_options RESULT=skip>
7817 16:32:38.710953 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_mmap_options RESULT=skip
7819 16:32:38.753580 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass>
7820 16:32:38.753870 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_check_basic_read RESULT=pass
7822 16:32:38.792938 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass>
7823 16:32:38.793220 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_NONE RESULT=pass
7825 16:32:38.833174 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=skip>
7826 16:32:38.833457 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC RESULT=skip
7828 16:32:38.872385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=skip>
7829 16:32:38.872662 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_ASYNC RESULT=skip
7831 16:32:38.912546 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=skip
7833 16:32:38.915465 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl_SYNC_ASYNC RESULT=skip>
7834 16:32:38.952564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_prctl RESULT=pass>
7835 16:32:38.952837 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_prctl RESULT=pass
7837 16:32:38.997416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_tags_inclusion RESULT=skip>
7838 16:32:38.997725 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_tags_inclusion RESULT=skip
7840 16:32:39.037006 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_check_user_mem RESULT=skip>
7841 16:32:39.037300 Received signal: <TESTCASE> TEST_CASE_ID=arm64_check_user_mem RESULT=skip
7843 16:32:39.077828 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=skip>
7844 16:32:39.078102 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x0 RESULT=skip
7846 16:32:39.121142 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=skip>
7847 16:32:39.121439 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_br_x16 RESULT=skip
7849 16:32:39.161239 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=skip>
7850 16:32:39.161518 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_nohint_func_call_using_blr RESULT=skip
7852 16:32:39.201196 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=skip>
7853 16:32:39.201482 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x0 RESULT=skip
7855 16:32:39.241358 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=skip>
7856 16:32:39.241643 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_br_x16 RESULT=skip
7858 16:32:39.281420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=skip>
7859 16:32:39.281700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_none_func_call_using_blr RESULT=skip
7861 16:32:39.322176 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=skip>
7862 16:32:39.322470 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x0 RESULT=skip
7864 16:32:39.361016 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=skip>
7865 16:32:39.361295 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_br_x16 RESULT=skip
7867 16:32:39.401539 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=skip>
7868 16:32:39.401819 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_c_func_call_using_blr RESULT=skip
7870 16:32:39.445676 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=skip>
7871 16:32:39.445961 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x0 RESULT=skip
7873 16:32:39.486098 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=skip>
7874 16:32:39.486399 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_br_x16 RESULT=skip
7876 16:32:39.525714 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=skip>
7877 16:32:39.526021 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_j_func_call_using_blr RESULT=skip
7879 16:32:39.566426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=skip>
7880 16:32:39.566700 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x0 RESULT=skip
7882 16:32:39.605183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=skip>
7883 16:32:39.605464 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_br_x16 RESULT=skip
7885 16:32:39.644822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=skip>
7886 16:32:39.645105 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_bti_jc_func_call_using_blr RESULT=skip
7888 16:32:39.686939 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=skip>
7889 16:32:39.687219 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x0 RESULT=skip
7891 16:32:39.728611 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=skip>
7892 16:32:39.728903 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_br_x16 RESULT=skip
7894 16:32:39.765739 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=skip>
7895 16:32:39.766013 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest_paciasp_func_call_using_blr RESULT=skip
7897 16:32:39.799858 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_btitest RESULT=pass>
7898 16:32:39.800136 Received signal: <TESTCASE> TEST_CASE_ID=arm64_btitest RESULT=pass
7900 16:32:39.842451 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=skip>
7901 16:32:39.842752 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x0 RESULT=skip
7903 16:32:39.883107 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=skip>
7904 16:32:39.883421 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_br_x16 RESULT=skip
7906 16:32:39.925990 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=skip>
7907 16:32:39.926282 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_nohint_func_call_using_blr RESULT=skip
7909 16:32:39.970074 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=skip>
7910 16:32:39.970348 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x0 RESULT=skip
7912 16:32:40.013506 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=skip>
7913 16:32:40.013794 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_br_x16 RESULT=skip
7915 16:32:40.054336 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=skip>
7916 16:32:40.054687 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_none_func_call_using_blr RESULT=skip
7918 16:32:40.093615 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=skip>
7919 16:32:40.093893 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x0 RESULT=skip
7921 16:32:40.131817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=skip>
7922 16:32:40.132099 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_br_x16 RESULT=skip
7924 16:32:40.170894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=skip>
7925 16:32:40.171170 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_c_func_call_using_blr RESULT=skip
7927 16:32:40.213733 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=skip>
7928 16:32:40.214015 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x0 RESULT=skip
7930 16:32:40.255597 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=skip>
7931 16:32:40.255954 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_br_x16 RESULT=skip
7933 16:32:40.294270 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=skip>
7934 16:32:40.294680 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_j_func_call_using_blr RESULT=skip
7936 16:32:40.337034 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=skip>
7937 16:32:40.337950 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x0 RESULT=skip
7939 16:32:40.384569 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=skip>
7940 16:32:40.385174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_br_x16 RESULT=skip
7942 16:32:40.424530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=skip>
7943 16:32:40.424832 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_bti_jc_func_call_using_blr RESULT=skip
7945 16:32:40.466075 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=skip>
7946 16:32:40.466375 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x0 RESULT=skip
7948 16:32:40.504192 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=skip>
7949 16:32:40.504477 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_br_x16 RESULT=skip
7951 16:32:40.539650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=skip>
7952 16:32:40.539931 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest_paciasp_func_call_using_blr RESULT=skip
7954 16:32:40.582177 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_nobtitest RESULT=pass>
7955 16:32:40.582461 Received signal: <TESTCASE> TEST_CASE_ID=arm64_nobtitest RESULT=pass
7957 16:32:40.625350 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass>
7958 16:32:40.625642 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_RNG RESULT=pass
7960 16:32:40.662345 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=skip>
7961 16:32:40.662625 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_RNG RESULT=skip
7963 16:32:40.706054 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass>
7964 16:32:40.706366 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SME RESULT=pass
7966 16:32:40.742530 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass>
7967 16:32:40.742809 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SME RESULT=pass
7969 16:32:40.787010 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass
7971 16:32:40.789848 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE RESULT=pass>
7972 16:32:40.826758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass>
7973 16:32:40.827054 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE RESULT=pass
7975 16:32:40.871999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass>
7976 16:32:40.872292 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_2 RESULT=pass
7978 16:32:40.911225 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=skip>
7979 16:32:40.911541 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_2 RESULT=skip
7981 16:32:40.955077 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass>
7982 16:32:40.955389 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE_AES RESULT=pass
7984 16:32:40.995381 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=skip>
7985 16:32:40.995667 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE_AES RESULT=skip
7987 16:32:41.041832 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass>
7988 16:32:41.042141 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_PMULL RESULT=pass
7990 16:32:41.082750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=skip>
7991 16:32:41.083041 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_PMULL RESULT=skip
7993 16:32:41.125995 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass>
7994 16:32:41.126298 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BITPERM RESULT=pass
7996 16:32:41.164407 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=skip>
7997 16:32:41.164697 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BITPERM RESULT=skip
7999 16:32:41.206201 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass>
8000 16:32:41.206519 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SHA3 RESULT=pass
8002 16:32:41.244920 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=skip
8004 16:32:41.247669 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SHA3 RESULT=skip>
8005 16:32:41.287991 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass>
8006 16:32:41.288306 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_SM4 RESULT=pass
8008 16:32:41.320804 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=skip
8010 16:32:41.323899 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_SM4 RESULT=skip>
8011 16:32:41.363411 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass>
8012 16:32:41.363696 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_I8MM RESULT=pass
8014 16:32:41.400580 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=skip
8016 16:32:41.403953 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_I8MM RESULT=skip>
8017 16:32:41.444944 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass>
8018 16:32:41.445251 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F32MM RESULT=pass
8020 16:32:41.484894 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=skip>
8021 16:32:41.485204 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F32MM RESULT=skip
8023 16:32:41.526962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass>
8024 16:32:41.527285 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_F64MM RESULT=pass
8026 16:32:41.562644 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=skip>
8027 16:32:41.562939 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_F64MM RESULT=skip
8029 16:32:41.607662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass>
8030 16:32:41.607982 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_BF16 RESULT=pass
8032 16:32:41.648017 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=skip
8034 16:32:41.651018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_BF16 RESULT=skip>
8035 16:32:41.692371 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass>
8036 16:32:41.692657 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_cpuinfo_match_SVE2_EBF16 RESULT=pass
8038 16:32:41.733761 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip>
8039 16:32:41.734067 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap_sigill_SVE2_EBF16 RESULT=skip
8041 16:32:41.772115 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_hwcap RESULT=pass>
8042 16:32:41.772386 Received signal: <TESTCASE> TEST_CASE_ID=arm64_hwcap RESULT=pass
8044 16:32:41.808432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass>
8045 16:32:41.808735 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_read_tpidr_one RESULT=pass
8047 16:32:41.848529 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass
8049 16:32:41.851582 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_one RESULT=pass>
8050 16:32:41.891158 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass
8052 16:32:41.893866 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_verify_tpidr_one RESULT=pass>
8053 16:32:41.931896 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass>
8054 16:32:41.932176 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_count_tpidrs RESULT=pass
8056 16:32:41.977331 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass>
8057 16:32:41.977605 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_write RESULT=pass
8059 16:32:42.022352 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass>
8060 16:32:42.022653 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_tpidr2_read RESULT=pass
8062 16:32:42.069914 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass>
8063 16:32:42.070199 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace_write_tpidr_only RESULT=pass
8065 16:32:42.109275 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_ptrace RESULT=pass>
8066 16:32:42.109561 Received signal: <TESTCASE> TEST_CASE_ID=arm64_ptrace RESULT=pass
8068 16:32:42.150214 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass>
8069 16:32:42.150551 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_getpid_FPSIMD RESULT=pass
8071 16:32:42.188705 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass>
8072 16:32:42.189008 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi_sched_yield_FPSIMD RESULT=pass
8074 16:32:42.224488 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_syscall-abi RESULT=pass>
8075 16:32:42.224805 Received signal: <TESTCASE> TEST_CASE_ID=arm64_syscall-abi RESULT=pass
8077 16:32:42.272655 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported RESULT=pass>
8078 16:32:42.272963 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported RESULT=pass
8080 16:32:42.311307 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup2 RESULT=pass>
8081 16:32:42.311618 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup2 RESULT=pass
8083 16:32:42.351887 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup3 RESULT=pass>
8084 16:32:42.352174 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup3 RESULT=pass
8086 16:32:42.393872 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup4 RESULT=pass>
8087 16:32:42.394195 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup4 RESULT=pass
8089 16:32:42.436550 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup5 RESULT=pass>
8090 16:32:42.436868 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2_skipped_TPIDR2_not_supported_dup5 RESULT=pass
8092 16:32:42.478538 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=arm64_tpidr2 RESULT=pass>
8093 16:32:42.478641 + set +x
8094 16:32:42.478888 Received signal: <TESTCASE> TEST_CASE_ID=arm64_tpidr2 RESULT=pass
8096 16:32:42.484761 <LAVA_SIGNAL_ENDRUN 1_kselftest-arm64 14396111_1.6.2.3.5>
8097 16:32:42.485060 Received signal: <ENDRUN> 1_kselftest-arm64 14396111_1.6.2.3.5
8098 16:32:42.485176 Ending use of test pattern.
8099 16:32:42.485277 Ending test lava.1_kselftest-arm64 (14396111_1.6.2.3.5), duration 32.85
8101 16:32:42.488033 <LAVA_TEST_RUNNER EXIT>
8102 16:32:42.488298 ok: lava_test_shell seems to have completed
8103 16:32:42.489502 arm64_btitest: pass
arm64_btitest_bti_c_func_call_using_blr: skip
arm64_btitest_bti_c_func_call_using_br_x0: skip
arm64_btitest_bti_c_func_call_using_br_x16: skip
arm64_btitest_bti_j_func_call_using_blr: skip
arm64_btitest_bti_j_func_call_using_br_x0: skip
arm64_btitest_bti_j_func_call_using_br_x16: skip
arm64_btitest_bti_jc_func_call_using_blr: skip
arm64_btitest_bti_jc_func_call_using_br_x0: skip
arm64_btitest_bti_jc_func_call_using_br_x16: skip
arm64_btitest_bti_none_func_call_using_blr: skip
arm64_btitest_bti_none_func_call_using_br_x0: skip
arm64_btitest_bti_none_func_call_using_br_x16: skip
arm64_btitest_nohint_func_call_using_blr: skip
arm64_btitest_nohint_func_call_using_br_x0: skip
arm64_btitest_nohint_func_call_using_br_x16: skip
arm64_btitest_paciasp_func_call_using_blr: skip
arm64_btitest_paciasp_func_call_using_br_x0: skip
arm64_btitest_paciasp_func_call_using_br_x16: skip
arm64_check_buffer_fill: skip
arm64_check_child_memory: skip
arm64_check_gcr_el1_cswitch: skip
arm64_check_ksm_options: skip
arm64_check_mmap_options: skip
arm64_check_prctl: pass
arm64_check_prctl_ASYNC: skip
arm64_check_prctl_NONE: pass
arm64_check_prctl_SYNC: skip
arm64_check_prctl_SYNC_ASYNC: skip
arm64_check_prctl_check_basic_read: pass
arm64_check_tags_inclusion: skip
arm64_check_user_mem: skip
arm64_fake_sigreturn_bad_magic: pass
arm64_fake_sigreturn_bad_size: pass
arm64_fake_sigreturn_bad_size_for_magic0: pass
arm64_fake_sigreturn_duplicated_fpsimd: pass
arm64_fake_sigreturn_misaligned_sp: pass
arm64_fake_sigreturn_missing_fpsimd: pass
arm64_fake_sigreturn_sme_change_vl: skip
arm64_fake_sigreturn_sve_change_vl: skip
arm64_fp-stress: pass
arm64_fp-stress_FPSIMD-0-0: pass
arm64_fp-stress_FPSIMD-0-1: pass
arm64_fp-stress_FPSIMD-1-0: pass
arm64_fp-stress_FPSIMD-1-1: pass
arm64_fp-stress_FPSIMD-2-0: pass
arm64_fp-stress_FPSIMD-2-1: pass
arm64_fp-stress_FPSIMD-3-0: pass
arm64_fp-stress_FPSIMD-3-1: pass
arm64_fp-stress_FPSIMD-4-0: pass
arm64_fp-stress_FPSIMD-4-1: pass
arm64_fp-stress_FPSIMD-5-0: pass
arm64_fp-stress_FPSIMD-5-1: pass
arm64_fp-stress_FPSIMD-6-0: pass
arm64_fp-stress_FPSIMD-6-1: pass
arm64_fp-stress_FPSIMD-7-0: pass
arm64_fp-stress_FPSIMD-7-1: pass
arm64_hwcap: pass
arm64_hwcap_cpuinfo_match_RNG: pass
arm64_hwcap_cpuinfo_match_SME: pass
arm64_hwcap_cpuinfo_match_SVE: pass
arm64_hwcap_cpuinfo_match_SVE2_BF16: pass
arm64_hwcap_cpuinfo_match_SVE2_BITPERM: pass
arm64_hwcap_cpuinfo_match_SVE2_EBF16: pass
arm64_hwcap_cpuinfo_match_SVE2_F32MM: pass
arm64_hwcap_cpuinfo_match_SVE2_F64MM: pass
arm64_hwcap_cpuinfo_match_SVE2_I8MM: pass
arm64_hwcap_cpuinfo_match_SVE2_PMULL: pass
arm64_hwcap_cpuinfo_match_SVE2_SHA3: pass
arm64_hwcap_cpuinfo_match_SVE2_SM4: pass
arm64_hwcap_cpuinfo_match_SVE_2: pass
arm64_hwcap_cpuinfo_match_SVE_AES: pass
arm64_hwcap_sigill_RNG: skip
arm64_hwcap_sigill_SME: pass
arm64_hwcap_sigill_SVE: pass
arm64_hwcap_sigill_SVE2_BF16: skip
arm64_hwcap_sigill_SVE2_BITPERM: skip
arm64_hwcap_sigill_SVE2_EBF16: skip
arm64_hwcap_sigill_SVE2_F32MM: skip
arm64_hwcap_sigill_SVE2_F64MM: skip
arm64_hwcap_sigill_SVE2_I8MM: skip
arm64_hwcap_sigill_SVE2_PMULL: skip
arm64_hwcap_sigill_SVE2_SHA3: skip
arm64_hwcap_sigill_SVE2_SM4: skip
arm64_hwcap_sigill_SVE_2: skip
arm64_hwcap_sigill_SVE_AES: skip
arm64_mangle_pstate_invalid_compat_toggle: pass
arm64_mangle_pstate_invalid_daif_bits: pass
arm64_mangle_pstate_invalid_mode_el1h: pass
arm64_mangle_pstate_invalid_mode_el1t: pass
arm64_mangle_pstate_invalid_mode_el2h: pass
arm64_mangle_pstate_invalid_mode_el2t: pass
arm64_mangle_pstate_invalid_mode_el3h: pass
arm64_mangle_pstate_invalid_mode_el3t: pass
arm64_nobtitest: pass
arm64_nobtitest_bti_c_func_call_using_blr: skip
arm64_nobtitest_bti_c_func_call_using_br_x0: skip
arm64_nobtitest_bti_c_func_call_using_br_x16: skip
arm64_nobtitest_bti_j_func_call_using_blr: skip
arm64_nobtitest_bti_j_func_call_using_br_x0: skip
arm64_nobtitest_bti_j_func_call_using_br_x16: skip
arm64_nobtitest_bti_jc_func_call_using_blr: skip
arm64_nobtitest_bti_jc_func_call_using_br_x0: skip
arm64_nobtitest_bti_jc_func_call_using_br_x16: skip
arm64_nobtitest_bti_none_func_call_using_blr: skip
arm64_nobtitest_bti_none_func_call_using_br_x0: skip
arm64_nobtitest_bti_none_func_call_using_br_x16: skip
arm64_nobtitest_nohint_func_call_using_blr: skip
arm64_nobtitest_nohint_func_call_using_br_x0: skip
arm64_nobtitest_nohint_func_call_using_br_x16: skip
arm64_nobtitest_paciasp_func_call_using_blr: skip
arm64_nobtitest_paciasp_func_call_using_br_x0: skip
arm64_nobtitest_paciasp_func_call_using_br_x16: skip
arm64_pac: pass
arm64_pac_Generic_PAUTH_not_enabled: skip
arm64_pac_Generic_PAUTH_not_enabled_dup2: skip
arm64_pac_PAUTH_not_enabled: skip
arm64_pac_PAUTH_not_enabled_dup2: skip
arm64_pac_PAUTH_not_enabled_dup3: skip
arm64_pac_PAUTH_not_enabled_dup4: skip
arm64_pac_PAUTH_not_enabled_dup5: skip
arm64_ptrace: pass
arm64_ptrace_count_tpidrs: pass
arm64_ptrace_read_tpidr_one: pass
arm64_ptrace_tpidr2_read: pass
arm64_ptrace_tpidr2_write: pass
arm64_ptrace_verify_tpidr_one: pass
arm64_ptrace_write_tpidr_one: pass
arm64_ptrace_write_tpidr_only: pass
arm64_run_tags_test_sh: pass
arm64_sme_trap_no_sm: skip
arm64_sme_trap_non_streaming: skip
arm64_sme_trap_za: pass
arm64_sme_vl: skip
arm64_ssve_regs: skip
arm64_sve-probe-vls: skip
arm64_sve-probe-vls_SVE_not_available: skip
arm64_sve-ptrace: skip
arm64_sve-ptrace_SVE_not_available: skip
arm64_sve_regs: skip
arm64_sve_vl: skip
arm64_syscall-abi: pass
arm64_syscall-abi_getpid_FPSIMD: pass
arm64_syscall-abi_sched_yield_FPSIMD: pass
arm64_tags_test: pass
arm64_tpidr2: pass
arm64_tpidr2_skipped_TPIDR2_not_supported: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup2: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup3: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup4: pass
arm64_tpidr2_skipped_TPIDR2_not_supported_dup5: pass
arm64_vec-syscfg: pass
arm64_vec-syscfg_SME_not_supported: skip
arm64_vec-syscfg_SME_not_supported_dup10: skip
arm64_vec-syscfg_SME_not_supported_dup2: skip
arm64_vec-syscfg_SME_not_supported_dup3: skip
arm64_vec-syscfg_SME_not_supported_dup4: skip
arm64_vec-syscfg_SME_not_supported_dup5: skip
arm64_vec-syscfg_SME_not_supported_dup6: skip
arm64_vec-syscfg_SME_not_supported_dup7: skip
arm64_vec-syscfg_SME_not_supported_dup8: skip
arm64_vec-syscfg_SME_not_supported_dup9: skip
arm64_vec-syscfg_SVE_not_supported: skip
arm64_vec-syscfg_SVE_not_supported_dup10: skip
arm64_vec-syscfg_SVE_not_supported_dup2: skip
arm64_vec-syscfg_SVE_not_supported_dup3: skip
arm64_vec-syscfg_SVE_not_supported_dup4: skip
arm64_vec-syscfg_SVE_not_supported_dup5: skip
arm64_vec-syscfg_SVE_not_supported_dup6: skip
arm64_vec-syscfg_SVE_not_supported_dup7: skip
arm64_vec-syscfg_SVE_not_supported_dup8: skip
arm64_vec-syscfg_SVE_not_supported_dup9: skip
arm64_za-fork: pass
arm64_za-fork_skipped: pass
arm64_za-ptrace: skip
arm64_za-ptrace_SME_not_available: skip
arm64_za_no_regs: skip
arm64_za_regs: skip
shardfile-arm64: pass
8104 16:32:42.489675 end: 3.1 lava-test-shell (duration 00:00:34) [common]
8105 16:32:42.489774 end: 3 lava-test-retry (duration 00:00:34) [common]
8106 16:32:42.489873 start: 4 finalize (timeout 00:07:29) [common]
8107 16:32:42.489974 start: 4.1 power-off (timeout 00:00:30) [common]
8108 16:32:42.490155 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
8109 16:32:43.884908 >> Command sent successfully.
8110 16:32:43.888085 Returned 0 in 1 seconds
8111 16:32:43.988959 end: 4.1 power-off (duration 00:00:01) [common]
8113 16:32:43.990374 start: 4.2 read-feedback (timeout 00:07:27) [common]
8114 16:32:43.991783 Listened to connection for namespace 'common' for up to 1s
8115 16:32:44.991524 Finalising connection for namespace 'common'
8116 16:32:44.991766 Disconnecting from shell: Finalise
8117 16:32:44.991891 / #
8118 16:32:45.092288 end: 4.2 read-feedback (duration 00:00:01) [common]
8119 16:32:45.092502 end: 4 finalize (duration 00:00:03) [common]
8120 16:32:45.092632 Cleaning after the job
8121 16:32:45.092748 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/ramdisk
8122 16:32:45.094910 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/kernel
8123 16:32:45.105587 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/dtb
8124 16:32:45.105813 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/nfsrootfs
8125 16:32:45.169438 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396111/tftp-deploy-kbn0hmiy/modules
8126 16:32:45.174971 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14396111
8127 16:32:45.795261 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14396111
8128 16:32:45.795445 Job finished correctly