Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 48
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 90
1 16:33:32.774283 lava-dispatcher, installed at version: 2024.03
2 16:33:32.774549 start: 0 validate
3 16:33:32.774718 Start time: 2024-06-17 16:33:32.774704+00:00 (UTC)
4 16:33:32.774875 Using caching service: 'http://localhost/cache/?uri=%s'
5 16:33:32.775016 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-libcamera%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 16:33:33.046962 Using caching service: 'http://localhost/cache/?uri=%s'
7 16:33:33.047225 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-32-g0d904242fc145%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 16:33:33.303979 Using caching service: 'http://localhost/cache/?uri=%s'
9 16:33:33.304233 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-32-g0d904242fc145%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 16:33:33.568300 Using caching service: 'http://localhost/cache/?uri=%s'
11 16:33:33.568495 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-libcamera%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 16:33:33.824825 Using caching service: 'http://localhost/cache/?uri=%s'
13 16:33:33.825015 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-32-g0d904242fc145%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
14 16:33:34.090040 validate duration: 1.32
16 16:33:34.090363 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 16:33:34.090474 start: 1.1 download-retry (timeout 00:10:00) [common]
18 16:33:34.090571 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 16:33:34.090718 Not decompressing ramdisk as can be used compressed.
20 16:33:34.090813 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-libcamera/20240313.0/arm64/initrd.cpio.gz
21 16:33:34.090886 saving as /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/ramdisk/initrd.cpio.gz
22 16:33:34.090957 total size: 5628151 (5 MB)
23 16:33:34.093754 progress 0 % (0 MB)
24 16:33:34.095604 progress 5 % (0 MB)
25 16:33:34.097388 progress 10 % (0 MB)
26 16:33:34.099209 progress 15 % (0 MB)
27 16:33:34.101081 progress 20 % (1 MB)
28 16:33:34.102872 progress 25 % (1 MB)
29 16:33:34.104760 progress 30 % (1 MB)
30 16:33:34.106696 progress 35 % (1 MB)
31 16:33:34.108398 progress 40 % (2 MB)
32 16:33:34.110321 progress 45 % (2 MB)
33 16:33:34.111965 progress 50 % (2 MB)
34 16:33:34.113697 progress 55 % (2 MB)
35 16:33:34.115488 progress 60 % (3 MB)
36 16:33:34.117048 progress 65 % (3 MB)
37 16:33:34.118791 progress 70 % (3 MB)
38 16:33:34.120343 progress 75 % (4 MB)
39 16:33:34.122132 progress 80 % (4 MB)
40 16:33:34.123684 progress 85 % (4 MB)
41 16:33:34.125412 progress 90 % (4 MB)
42 16:33:34.127197 progress 95 % (5 MB)
43 16:33:34.128771 progress 100 % (5 MB)
44 16:33:34.129009 5 MB downloaded in 0.04 s (141.06 MB/s)
45 16:33:34.129185 end: 1.1.1 http-download (duration 00:00:00) [common]
47 16:33:34.129451 end: 1.1 download-retry (duration 00:00:00) [common]
48 16:33:34.129559 start: 1.2 download-retry (timeout 00:10:00) [common]
49 16:33:34.129657 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 16:33:34.129813 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
51 16:33:34.129892 saving as /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/kernel/Image
52 16:33:34.129964 total size: 54813184 (52 MB)
53 16:33:34.130033 No compression specified
54 16:33:34.131379 progress 0 % (0 MB)
55 16:33:34.148017 progress 5 % (2 MB)
56 16:33:34.163816 progress 10 % (5 MB)
57 16:33:34.179583 progress 15 % (7 MB)
58 16:33:34.195636 progress 20 % (10 MB)
59 16:33:34.211978 progress 25 % (13 MB)
60 16:33:34.228277 progress 30 % (15 MB)
61 16:33:34.244967 progress 35 % (18 MB)
62 16:33:34.261784 progress 40 % (20 MB)
63 16:33:34.277846 progress 45 % (23 MB)
64 16:33:34.294481 progress 50 % (26 MB)
65 16:33:34.310623 progress 55 % (28 MB)
66 16:33:34.327826 progress 60 % (31 MB)
67 16:33:34.343866 progress 65 % (34 MB)
68 16:33:34.359740 progress 70 % (36 MB)
69 16:33:34.376695 progress 75 % (39 MB)
70 16:33:34.394320 progress 80 % (41 MB)
71 16:33:34.411200 progress 85 % (44 MB)
72 16:33:34.427110 progress 90 % (47 MB)
73 16:33:34.442994 progress 95 % (49 MB)
74 16:33:34.458571 progress 100 % (52 MB)
75 16:33:34.458913 52 MB downloaded in 0.33 s (158.91 MB/s)
76 16:33:34.459089 end: 1.2.1 http-download (duration 00:00:00) [common]
78 16:33:34.459359 end: 1.2 download-retry (duration 00:00:00) [common]
79 16:33:34.459472 start: 1.3 download-retry (timeout 00:10:00) [common]
80 16:33:34.459570 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 16:33:34.459743 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 16:33:34.459844 saving as /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 16:33:34.459915 total size: 57695 (0 MB)
84 16:33:34.459984 No compression specified
85 16:33:34.461268 progress 56 % (0 MB)
86 16:33:34.461644 progress 100 % (0 MB)
87 16:33:34.461941 0 MB downloaded in 0.00 s (27.21 MB/s)
88 16:33:34.462089 end: 1.3.1 http-download (duration 00:00:00) [common]
90 16:33:34.462343 end: 1.3 download-retry (duration 00:00:00) [common]
91 16:33:34.462439 start: 1.4 download-retry (timeout 00:10:00) [common]
92 16:33:34.462533 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 16:33:34.462666 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-libcamera/20240313.0/arm64/full.rootfs.tar.xz
94 16:33:34.462741 saving as /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/nfsrootfs/full.rootfs.tar
95 16:33:34.462809 total size: 69067788 (65 MB)
96 16:33:34.462877 Using unxz to decompress xz
97 16:33:34.469068 progress 0 % (0 MB)
98 16:33:34.690646 progress 5 % (3 MB)
99 16:33:34.929860 progress 10 % (6 MB)
100 16:33:35.174043 progress 15 % (9 MB)
101 16:33:35.363112 progress 20 % (13 MB)
102 16:33:35.568494 progress 25 % (16 MB)
103 16:33:35.804751 progress 30 % (19 MB)
104 16:33:35.943011 progress 35 % (23 MB)
105 16:33:36.057356 progress 40 % (26 MB)
106 16:33:36.300363 progress 45 % (29 MB)
107 16:33:36.554523 progress 50 % (32 MB)
108 16:33:36.798828 progress 55 % (36 MB)
109 16:33:37.070120 progress 60 % (39 MB)
110 16:33:37.303572 progress 65 % (42 MB)
111 16:33:37.538124 progress 70 % (46 MB)
112 16:33:37.772060 progress 75 % (49 MB)
113 16:33:38.021164 progress 80 % (52 MB)
114 16:33:38.228569 progress 85 % (56 MB)
115 16:33:38.482150 progress 90 % (59 MB)
116 16:33:38.713919 progress 95 % (62 MB)
117 16:33:38.942101 progress 100 % (65 MB)
118 16:33:38.948856 65 MB downloaded in 4.49 s (14.68 MB/s)
119 16:33:38.949205 end: 1.4.1 http-download (duration 00:00:04) [common]
121 16:33:38.949667 end: 1.4 download-retry (duration 00:00:04) [common]
122 16:33:38.949788 start: 1.5 download-retry (timeout 00:09:55) [common]
123 16:33:38.949888 start: 1.5.1 http-download (timeout 00:09:55) [common]
124 16:33:38.950050 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
125 16:33:38.950130 saving as /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/modules/modules.tar
126 16:33:38.950199 total size: 8628772 (8 MB)
127 16:33:38.950300 Using unxz to decompress xz
128 16:33:38.955109 progress 0 % (0 MB)
129 16:33:38.978897 progress 5 % (0 MB)
130 16:33:39.006288 progress 10 % (0 MB)
131 16:33:39.033088 progress 15 % (1 MB)
132 16:33:39.060256 progress 20 % (1 MB)
133 16:33:39.088409 progress 25 % (2 MB)
134 16:33:39.115343 progress 30 % (2 MB)
135 16:33:39.145458 progress 35 % (2 MB)
136 16:33:39.173614 progress 40 % (3 MB)
137 16:33:39.201371 progress 45 % (3 MB)
138 16:33:39.231273 progress 50 % (4 MB)
139 16:33:39.259086 progress 55 % (4 MB)
140 16:33:39.287370 progress 60 % (4 MB)
141 16:33:39.318802 progress 65 % (5 MB)
142 16:33:39.346795 progress 70 % (5 MB)
143 16:33:39.373528 progress 75 % (6 MB)
144 16:33:39.400381 progress 80 % (6 MB)
145 16:33:39.432343 progress 85 % (7 MB)
146 16:33:39.465027 progress 90 % (7 MB)
147 16:33:39.494819 progress 95 % (7 MB)
148 16:33:39.525031 progress 100 % (8 MB)
149 16:33:39.531108 8 MB downloaded in 0.58 s (14.17 MB/s)
150 16:33:39.531497 end: 1.5.1 http-download (duration 00:00:01) [common]
152 16:33:39.531971 end: 1.5 download-retry (duration 00:00:01) [common]
153 16:33:39.532122 start: 1.6 prepare-tftp-overlay (timeout 00:09:55) [common]
154 16:33:39.532289 start: 1.6.1 extract-nfsrootfs (timeout 00:09:55) [common]
155 16:33:41.498659 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14396124/extract-nfsrootfs-mhvcz92t
156 16:33:41.498859 end: 1.6.1 extract-nfsrootfs (duration 00:00:02) [common]
157 16:33:41.498974 start: 1.6.2 lava-overlay (timeout 00:09:53) [common]
158 16:33:41.499163 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj
159 16:33:41.499330 makedir: /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin
160 16:33:41.499465 makedir: /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/tests
161 16:33:41.499595 makedir: /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/results
162 16:33:41.499721 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-add-keys
163 16:33:41.499896 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-add-sources
164 16:33:41.500059 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-background-process-start
165 16:33:41.500224 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-background-process-stop
166 16:33:41.500413 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-common-functions
167 16:33:41.500602 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-echo-ipv4
168 16:33:41.500793 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-install-packages
169 16:33:41.500977 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-installed-packages
170 16:33:41.501132 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-os-build
171 16:33:41.501292 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-probe-channel
172 16:33:41.501448 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-probe-ip
173 16:33:41.501606 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-target-ip
174 16:33:41.501767 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-target-mac
175 16:33:41.501951 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-target-storage
176 16:33:41.502113 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-test-case
177 16:33:41.502302 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-test-event
178 16:33:41.502484 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-test-feedback
179 16:33:41.502641 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-test-raise
180 16:33:41.502799 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-test-reference
181 16:33:41.502956 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-test-runner
182 16:33:41.503113 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-test-set
183 16:33:41.503274 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-test-shell
184 16:33:41.503648 Updating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-install-packages (oe)
185 16:33:41.503837 Updating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/bin/lava-installed-packages (oe)
186 16:33:41.503988 Creating /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/environment
187 16:33:41.504113 LAVA metadata
188 16:33:41.504194 - LAVA_JOB_ID=14396124
189 16:33:41.504307 - LAVA_DISPATCHER_IP=192.168.201.1
190 16:33:41.504469 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:53) [common]
191 16:33:41.504576 skipped lava-vland-overlay
192 16:33:41.504715 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
193 16:33:41.504850 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:53) [common]
194 16:33:41.504955 skipped lava-multinode-overlay
195 16:33:41.505084 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
196 16:33:41.505222 start: 1.6.2.3 test-definition (timeout 00:09:53) [common]
197 16:33:41.505345 Loading test definitions
198 16:33:41.505491 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:53) [common]
199 16:33:41.505609 Using /lava-14396124 at stage 0
200 16:33:41.506067 uuid=14396124_1.6.2.3.1 testdef=None
201 16:33:41.506204 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
202 16:33:41.506343 start: 1.6.2.3.2 test-overlay (timeout 00:09:53) [common]
203 16:33:41.507110 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
205 16:33:41.507501 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:53) [common]
206 16:33:41.508187 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
208 16:33:41.508470 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:53) [common]
209 16:33:41.509126 runner path: /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/0/tests/0_lc-compliance test_uuid 14396124_1.6.2.3.1
210 16:33:41.509312 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
212 16:33:41.509560 Creating lava-test-runner.conf files
213 16:33:41.509672 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14396124/lava-overlay-7x62pitj/lava-14396124/0 for stage 0
214 16:33:41.509819 - 0_lc-compliance
215 16:33:41.509970 end: 1.6.2.3 test-definition (duration 00:00:00) [common]
216 16:33:41.510107 start: 1.6.2.4 compress-overlay (timeout 00:09:53) [common]
217 16:33:41.517862 end: 1.6.2.4 compress-overlay (duration 00:00:00) [common]
218 16:33:41.518013 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:53) [common]
219 16:33:41.518131 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
220 16:33:41.518246 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
221 16:33:41.518357 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:53) [common]
222 16:33:41.708264 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
223 16:33:41.708761 start: 1.6.4 extract-modules (timeout 00:09:52) [common]
224 16:33:41.708940 extracting modules file /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14396124/extract-nfsrootfs-mhvcz92t
225 16:33:41.974048 extracting modules file /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14396124/extract-overlay-ramdisk-bcf1wi1w/ramdisk
226 16:33:42.224275 end: 1.6.4 extract-modules (duration 00:00:01) [common]
227 16:33:42.224458 start: 1.6.5 apply-overlay-tftp (timeout 00:09:52) [common]
228 16:33:42.224559 [common] Applying overlay to NFS
229 16:33:42.224637 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14396124/compress-overlay-7y8xrzfh/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14396124/extract-nfsrootfs-mhvcz92t
230 16:33:42.232054 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
231 16:33:42.232189 start: 1.6.6 configure-preseed-file (timeout 00:09:52) [common]
232 16:33:42.232285 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
233 16:33:42.232381 start: 1.6.7 compress-ramdisk (timeout 00:09:52) [common]
234 16:33:42.232472 Building ramdisk /var/lib/lava/dispatcher/tmp/14396124/extract-overlay-ramdisk-bcf1wi1w/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14396124/extract-overlay-ramdisk-bcf1wi1w/ramdisk
235 16:33:42.586856 >> 130466 blocks
236 16:33:44.879438 rename /var/lib/lava/dispatcher/tmp/14396124/extract-overlay-ramdisk-bcf1wi1w/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/ramdisk/ramdisk.cpio.gz
237 16:33:44.880121 end: 1.6.7 compress-ramdisk (duration 00:00:03) [common]
238 16:33:44.880383 start: 1.6.8 prepare-kernel (timeout 00:09:49) [common]
239 16:33:44.880593 start: 1.6.8.1 prepare-fit (timeout 00:09:49) [common]
240 16:33:44.880787 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/kernel/Image']
241 16:34:00.236606 Returned 0 in 15 seconds
242 16:34:00.337266 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/kernel/image.itb
243 16:34:00.737585 output: FIT description: Kernel Image image with one or more FDT blobs
244 16:34:00.738009 output: Created: Mon Jun 17 17:34:00 2024
245 16:34:00.738132 output: Image 0 (kernel-1)
246 16:34:00.738239 output: Description:
247 16:34:00.738344 output: Created: Mon Jun 17 17:34:00 2024
248 16:34:00.738447 output: Type: Kernel Image
249 16:34:00.738544 output: Compression: lzma compressed
250 16:34:00.738649 output: Data Size: 13128753 Bytes = 12821.05 KiB = 12.52 MiB
251 16:34:00.738748 output: Architecture: AArch64
252 16:34:00.738850 output: OS: Linux
253 16:34:00.738950 output: Load Address: 0x00000000
254 16:34:00.739053 output: Entry Point: 0x00000000
255 16:34:00.739160 output: Hash algo: crc32
256 16:34:00.739261 output: Hash value: 106ffd6f
257 16:34:00.739358 output: Image 1 (fdt-1)
258 16:34:00.739450 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
259 16:34:00.739516 output: Created: Mon Jun 17 17:34:00 2024
260 16:34:00.739580 output: Type: Flat Device Tree
261 16:34:00.739639 output: Compression: uncompressed
262 16:34:00.739699 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
263 16:34:00.739758 output: Architecture: AArch64
264 16:34:00.739816 output: Hash algo: crc32
265 16:34:00.739875 output: Hash value: a9713552
266 16:34:00.739933 output: Image 2 (ramdisk-1)
267 16:34:00.739991 output: Description: unavailable
268 16:34:00.740049 output: Created: Mon Jun 17 17:34:00 2024
269 16:34:00.740108 output: Type: RAMDisk Image
270 16:34:00.740165 output: Compression: Unknown Compression
271 16:34:00.740223 output: Data Size: 18743340 Bytes = 18304.04 KiB = 17.88 MiB
272 16:34:00.740282 output: Architecture: AArch64
273 16:34:00.740340 output: OS: Linux
274 16:34:00.740397 output: Load Address: unavailable
275 16:34:00.740455 output: Entry Point: unavailable
276 16:34:00.740513 output: Hash algo: crc32
277 16:34:00.740571 output: Hash value: bea97808
278 16:34:00.740629 output: Default Configuration: 'conf-1'
279 16:34:00.740687 output: Configuration 0 (conf-1)
280 16:34:00.740745 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
281 16:34:00.740803 output: Kernel: kernel-1
282 16:34:00.740861 output: Init Ramdisk: ramdisk-1
283 16:34:00.740919 output: FDT: fdt-1
284 16:34:00.740977 output: Loadables: kernel-1
285 16:34:00.741035 output:
286 16:34:00.741265 end: 1.6.8.1 prepare-fit (duration 00:00:16) [common]
287 16:34:00.741375 end: 1.6.8 prepare-kernel (duration 00:00:16) [common]
288 16:34:00.741493 end: 1.6 prepare-tftp-overlay (duration 00:00:21) [common]
289 16:34:00.741596 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:33) [common]
290 16:34:00.741683 No LXC device requested
291 16:34:00.741771 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
292 16:34:00.741867 start: 1.8 deploy-device-env (timeout 00:09:33) [common]
293 16:34:00.741952 end: 1.8 deploy-device-env (duration 00:00:00) [common]
294 16:34:00.742029 Checking files for TFTP limit of 4294967296 bytes.
295 16:34:00.742620 end: 1 tftp-deploy (duration 00:00:27) [common]
296 16:34:00.742740 start: 2 depthcharge-action (timeout 00:05:00) [common]
297 16:34:00.742860 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
298 16:34:00.743005 substitutions:
299 16:34:00.743114 - {DTB}: 14396124/tftp-deploy-c85998ow/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
300 16:34:00.743216 - {INITRD}: 14396124/tftp-deploy-c85998ow/ramdisk/ramdisk.cpio.gz
301 16:34:00.743324 - {KERNEL}: 14396124/tftp-deploy-c85998ow/kernel/Image
302 16:34:00.743430 - {LAVA_MAC}: None
303 16:34:00.743529 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14396124/extract-nfsrootfs-mhvcz92t
304 16:34:00.743602 - {NFS_SERVER_IP}: 192.168.201.1
305 16:34:00.743664 - {PRESEED_CONFIG}: None
306 16:34:00.743725 - {PRESEED_LOCAL}: None
307 16:34:00.743788 - {RAMDISK}: 14396124/tftp-deploy-c85998ow/ramdisk/ramdisk.cpio.gz
308 16:34:00.743861 - {ROOT_PART}: None
309 16:34:00.743922 - {ROOT}: None
310 16:34:00.743981 - {SERVER_IP}: 192.168.201.1
311 16:34:00.744053 - {TEE}: None
312 16:34:00.744116 Parsed boot commands:
313 16:34:00.744178 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
314 16:34:00.744389 Parsed boot commands: tftpboot 192.168.201.1 14396124/tftp-deploy-c85998ow/kernel/image.itb 14396124/tftp-deploy-c85998ow/kernel/cmdline
315 16:34:00.744491 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
316 16:34:00.744600 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
317 16:34:00.744706 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
318 16:34:00.744806 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
319 16:34:00.744899 Not connected, no need to disconnect.
320 16:34:00.744983 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
321 16:34:00.745073 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
322 16:34:00.745167 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
323 16:34:00.749374 Setting prompt string to ['lava-test: # ']
324 16:34:00.749826 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
325 16:34:00.749996 end: 2.2.1 reset-connection (duration 00:00:00) [common]
326 16:34:00.750145 start: 2.2.2 reset-device (timeout 00:05:00) [common]
327 16:34:00.750285 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
328 16:34:00.750629 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-0']
329 16:34:24.959469 Returned 0 in 24 seconds
330 16:34:25.060788 end: 2.2.2.1 pdu-reboot (duration 00:00:24) [common]
332 16:34:25.062015 end: 2.2.2 reset-device (duration 00:00:24) [common]
333 16:34:25.062456 start: 2.2.3 depthcharge-start (timeout 00:04:36) [common]
334 16:34:25.062834 Setting prompt string to 'Starting depthcharge on Juniper...'
335 16:34:25.063132 Changing prompt to 'Starting depthcharge on Juniper...'
336 16:34:25.063501 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
337 16:34:25.065126 [Enter `^Ec?' for help]
338 16:34:25.065482 [DL] 00000000 00000000 010701
339 16:34:25.065773
340 16:34:25.066054
341 16:34:25.066322 F0: 102B 0000
342 16:34:25.066588
343 16:34:25.066851 F3: 1006 0033 [0200]
344 16:34:25.067112
345 16:34:25.067369 F3: 4001 00E0 [0200]
346 16:34:25.067666
347 16:34:25.067914 F3: 0000 0000
348 16:34:25.068159
349 16:34:25.068399 V0: 0000 0000 [0001]
350 16:34:25.068640
351 16:34:25.068877 00: 1027 0002
352 16:34:25.069134
353 16:34:25.069374 01: 0000 0000
354 16:34:25.069617
355 16:34:25.069853 BP: 0C00 0251 [0000]
356 16:34:25.070091
357 16:34:25.070330 G0: 1182 0000
358 16:34:25.070566
359 16:34:25.070802 EC: 0004 0000 [0001]
360 16:34:25.071041
361 16:34:25.071276 S7: 0000 0000 [0000]
362 16:34:25.071553
363 16:34:25.071793 CC: 0000 0000 [0001]
364 16:34:25.072031
365 16:34:25.072268 T0: 0000 00DB [000F]
366 16:34:25.072506
367 16:34:25.072776 Jump to BL
368 16:34:25.073023
369 16:34:25.073260
370 16:34:25.073494
371 16:34:25.073731 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
372 16:34:25.073985 ARM64: Exception handlers installed.
373 16:34:25.074235 ARM64: Testing exception
374 16:34:25.074472 ARM64: Done test exception
375 16:34:25.074708 WDT: Last reset was cold boot
376 16:34:25.074944 SPI0(PAD0) initialized at 992727 Hz
377 16:34:25.075184 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
378 16:34:25.075454 Manufacturer: ef
379 16:34:25.075711 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
380 16:34:25.075951 Probing TPM: . done!
381 16:34:25.076187 TPM ready after 0 ms
382 16:34:25.076426 Connected to device vid:did:rid of 1ae0:0028:00
383 16:34:25.076665 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
384 16:34:25.077058 Initialized TPM device CR50 revision 0
385 16:34:25.077374 tlcl_send_startup: Startup return code is 0
386 16:34:25.077624 TPM: setup succeeded
387 16:34:25.077867 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
388 16:34:25.078105 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
389 16:34:25.078349 in-header: 03 19 00 00 08 00 00 00
390 16:34:25.078586 in-data: a2 e0 47 00 13 00 00 00
391 16:34:25.078822 Chrome EC: UHEPI supported
392 16:34:25.079062 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
393 16:34:25.079303 in-header: 03 a1 00 00 08 00 00 00
394 16:34:25.079598 in-data: 84 60 60 10 00 00 00 00
395 16:34:25.079843 Phase 1
396 16:34:25.080081 FMAP: area GBB found @ 3f5000 (12032 bytes)
397 16:34:25.080324 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
398 16:34:25.080564 VB2:vb2_check_recovery() Recovery was requested manually
399 16:34:25.080805 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
400 16:34:25.081047 Recovery requested (1009000e)
401 16:34:25.081286 tlcl_extend: response is 0
402 16:34:25.081525 tlcl_extend: response is 0
403 16:34:25.081762
404 16:34:25.081997
405 16:34:25.082236 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
406 16:34:25.082482 ARM64: Exception handlers installed.
407 16:34:25.082722 ARM64: Testing exception
408 16:34:25.082959 ARM64: Done test exception
409 16:34:25.083196 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2010
410 16:34:25.083456 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
411 16:34:25.083700 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
412 16:34:25.083939 [RTC]rtc_get_frequency_meter,134: input=0xf, output=914
413 16:34:25.084179 [RTC]rtc_get_frequency_meter,134: input=0x7, output=778
414 16:34:25.084416 [RTC]rtc_get_frequency_meter,134: input=0xb, output=847
415 16:34:25.084651 [RTC]rtc_get_frequency_meter,134: input=0x9, output=812
416 16:34:25.084888 [RTC]rtc_get_frequency_meter,134: input=0x8, output=797
417 16:34:25.085123 [RTC]rtc_get_frequency_meter,134: input=0x7, output=778
418 16:34:25.085359 [RTC]rtc_get_frequency_meter,134: input=0x8, output=794
419 16:34:25.085594 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
420 16:34:25.085833 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
421 16:34:25.086070 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
422 16:34:25.086305 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
423 16:34:25.086542 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
424 16:34:25.086782 in-header: 03 19 00 00 08 00 00 00
425 16:34:25.087019 in-data: a2 e0 47 00 13 00 00 00
426 16:34:25.087256 Chrome EC: UHEPI supported
427 16:34:25.087560 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
428 16:34:25.087771 in-header: 03 a1 00 00 08 00 00 00
429 16:34:25.087942 in-data: 84 60 60 10 00 00 00 00
430 16:34:25.088109 Skip loading cached calibration data
431 16:34:25.088279 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
432 16:34:25.088454 in-header: 03 a1 00 00 08 00 00 00
433 16:34:25.088623 in-data: 84 60 60 10 00 00 00 00
434 16:34:25.088825 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
435 16:34:25.089000 in-header: 03 a1 00 00 08 00 00 00
436 16:34:25.089169 in-data: 84 60 60 10 00 00 00 00
437 16:34:25.089338 ADC[3]: Raw value=216571 ID=1
438 16:34:25.089507 Manufacturer: ef
439 16:34:25.089677 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
440 16:34:25.089848 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
441 16:34:25.090017 CBFS @ 21000 size 3d4000
442 16:34:25.090187 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
443 16:34:25.090357 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
444 16:34:25.090527 CBFS: Found @ offset 3c700 size 44
445 16:34:25.090693 DRAM-K: Full Calibration
446 16:34:25.090862 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
447 16:34:25.091036 CBFS @ 21000 size 3d4000
448 16:34:25.091205 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
449 16:34:25.091373 CBFS: Locating 'fallback/dram'
450 16:34:25.091574 CBFS: Found @ offset 24b00 size 12268
451 16:34:25.091745 read SPI 0x45b44 0x1224c: 22775 us, 3263 KB/s, 26.104 Mbps
452 16:34:25.091917 ddr_geometry: 1, config: 0x0
453 16:34:25.092093 header.status = 0x0
454 16:34:25.092264 header.magic = 0x44524d4b (expected: 0x44524d4b)
455 16:34:25.092435 header.version = 0x5 (expected: 0x5)
456 16:34:25.092859 header.size = 0x8f0 (expected: 0x8f0)
457 16:34:25.093006 header.config = 0x0
458 16:34:25.093140 header.flags = 0x0
459 16:34:25.093273 header.checksum = 0x0
460 16:34:25.093406 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
461 16:34:25.093541 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
462 16:34:25.093675 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
463 16:34:25.093808 ddr_geometry:1
464 16:34:25.093939 [EMI] new MDL number = 1
465 16:34:25.094070 dram_cbt_mode_extern: 0
466 16:34:25.094201 dram_cbt_mode [RK0]: 0, [RK1]: 0
467 16:34:25.094406 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
468 16:34:25.094627
469 16:34:25.094768
470 16:34:25.094902 [Bianco] ETT version 0.0.0.1
471 16:34:25.095036 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
472 16:34:25.095172
473 16:34:25.095305 vSetVcoreByFreq with vcore:762500, freq=1600
474 16:34:25.095476
475 16:34:25.095614 [DramcInit]
476 16:34:25.095748 AutoRefreshCKEOff AutoREF OFF
477 16:34:25.095883 DDRPhyPLLSetting-CKEOFF
478 16:34:25.096015 DDRPhyPLLSetting-CKEON
479 16:34:25.096147
480 16:34:25.096279 Enable WDQS
481 16:34:25.096410 [ModeRegInit_LP4] CH0 RK0
482 16:34:25.096543 Write Rank0 MR13 =0x18
483 16:34:25.096675 Write Rank0 MR12 =0x5d
484 16:34:25.096807 Write Rank0 MR1 =0x56
485 16:34:25.096939 Write Rank0 MR2 =0x1a
486 16:34:25.097070 Write Rank0 MR11 =0x0
487 16:34:25.097201 Write Rank0 MR22 =0x38
488 16:34:25.097332 Write Rank0 MR14 =0x5d
489 16:34:25.097464 Write Rank0 MR3 =0x30
490 16:34:25.097595 Write Rank0 MR13 =0x58
491 16:34:25.097722 Write Rank0 MR12 =0x5d
492 16:34:25.097831 Write Rank0 MR1 =0x56
493 16:34:25.097940 Write Rank0 MR2 =0x2d
494 16:34:25.098048 Write Rank0 MR11 =0x23
495 16:34:25.098155 Write Rank0 MR22 =0x34
496 16:34:25.098263 Write Rank0 MR14 =0x10
497 16:34:25.098371 Write Rank0 MR3 =0x30
498 16:34:25.098478 Write Rank0 MR13 =0xd8
499 16:34:25.098584 [ModeRegInit_LP4] CH0 RK1
500 16:34:25.098691 Write Rank1 MR13 =0x18
501 16:34:25.098798 Write Rank1 MR12 =0x5d
502 16:34:25.098905 Write Rank1 MR1 =0x56
503 16:34:25.099011 Write Rank1 MR2 =0x1a
504 16:34:25.099119 Write Rank1 MR11 =0x0
505 16:34:25.099225 Write Rank1 MR22 =0x38
506 16:34:25.099332 Write Rank1 MR14 =0x5d
507 16:34:25.099451 Write Rank1 MR3 =0x30
508 16:34:25.099561 Write Rank1 MR13 =0x58
509 16:34:25.099668 Write Rank1 MR12 =0x5d
510 16:34:25.099776 Write Rank1 MR1 =0x56
511 16:34:25.099883 Write Rank1 MR2 =0x2d
512 16:34:25.099991 Write Rank1 MR11 =0x23
513 16:34:25.100098 Write Rank1 MR22 =0x34
514 16:34:25.100205 Write Rank1 MR14 =0x10
515 16:34:25.100312 Write Rank1 MR3 =0x30
516 16:34:25.100420 Write Rank1 MR13 =0xd8
517 16:34:25.100528 [ModeRegInit_LP4] CH1 RK0
518 16:34:25.100635 Write Rank0 MR13 =0x18
519 16:34:25.100741 Write Rank0 MR12 =0x5d
520 16:34:25.100850 Write Rank0 MR1 =0x56
521 16:34:25.100957 Write Rank0 MR2 =0x1a
522 16:34:25.101065 Write Rank0 MR11 =0x0
523 16:34:25.101172 Write Rank0 MR22 =0x38
524 16:34:25.101279 Write Rank0 MR14 =0x5d
525 16:34:25.101386 Write Rank0 MR3 =0x30
526 16:34:25.101495 Write Rank0 MR13 =0x58
527 16:34:25.101602 Write Rank0 MR12 =0x5d
528 16:34:25.101710 Write Rank0 MR1 =0x56
529 16:34:25.101817 Write Rank0 MR2 =0x2d
530 16:34:25.101924 Write Rank0 MR11 =0x23
531 16:34:25.102029 Write Rank0 MR22 =0x34
532 16:34:25.102138 Write Rank0 MR14 =0x10
533 16:34:25.102245 Write Rank0 MR3 =0x30
534 16:34:25.102353 Write Rank0 MR13 =0xd8
535 16:34:25.102459 [ModeRegInit_LP4] CH1 RK1
536 16:34:25.102567 Write Rank1 MR13 =0x18
537 16:34:25.102679 Write Rank1 MR12 =0x5d
538 16:34:25.102769 Write Rank1 MR1 =0x56
539 16:34:25.102859 Write Rank1 MR2 =0x1a
540 16:34:25.102950 Write Rank1 MR11 =0x0
541 16:34:25.103040 Write Rank1 MR22 =0x38
542 16:34:25.103131 Write Rank1 MR14 =0x5d
543 16:34:25.103220 Write Rank1 MR3 =0x30
544 16:34:25.103310 Write Rank1 MR13 =0x58
545 16:34:25.103400 Write Rank1 MR12 =0x5d
546 16:34:25.103505 Write Rank1 MR1 =0x56
547 16:34:25.103597 Write Rank1 MR2 =0x2d
548 16:34:25.103688 Write Rank1 MR11 =0x23
549 16:34:25.103780 Write Rank1 MR22 =0x34
550 16:34:25.103871 Write Rank1 MR14 =0x10
551 16:34:25.103961 Write Rank1 MR3 =0x30
552 16:34:25.104051 Write Rank1 MR13 =0xd8
553 16:34:25.104142 match AC timing 3
554 16:34:25.104234 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
555 16:34:25.104327 [MiockJmeterHQA]
556 16:34:25.104418 vSetVcoreByFreq with vcore:762500, freq=1600
557 16:34:25.104511
558 16:34:25.104602 MIOCK jitter meter ch=0
559 16:34:25.104692
560 16:34:25.104783 1T = (102-17) = 85 dly cells
561 16:34:25.104876 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
562 16:34:25.104970 vSetVcoreByFreq with vcore:725000, freq=1200
563 16:34:25.105061
564 16:34:25.105152 MIOCK jitter meter ch=0
565 16:34:25.105244
566 16:34:25.105335 1T = (96-16) = 80 dly cells
567 16:34:25.105428 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
568 16:34:25.105520 vSetVcoreByFreq with vcore:725000, freq=800
569 16:34:25.105612
570 16:34:25.105703 MIOCK jitter meter ch=0
571 16:34:25.105793
572 16:34:25.105884 1T = (96-16) = 80 dly cells
573 16:34:25.105978 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
574 16:34:25.106071 vSetVcoreByFreq with vcore:762500, freq=1600
575 16:34:25.106163 vSetVcoreByFreq with vcore:762500, freq=1600
576 16:34:25.106254
577 16:34:25.106345 K DRVP
578 16:34:25.106436 1. OCD DRVP=0 CALOUT=0
579 16:34:25.106530 1. OCD DRVP=1 CALOUT=0
580 16:34:25.106624 1. OCD DRVP=2 CALOUT=0
581 16:34:25.106717 1. OCD DRVP=3 CALOUT=0
582 16:34:25.106809 1. OCD DRVP=4 CALOUT=0
583 16:34:25.106902 1. OCD DRVP=5 CALOUT=0
584 16:34:25.106996 1. OCD DRVP=6 CALOUT=0
585 16:34:25.107089 1. OCD DRVP=7 CALOUT=0
586 16:34:25.107182 1. OCD DRVP=8 CALOUT=0
587 16:34:25.107276 1. OCD DRVP=9 CALOUT=1
588 16:34:25.107369
589 16:34:25.107480 1. OCD DRVP calibration OK! DRVP=9
590 16:34:25.107577
591 16:34:25.107675
592 16:34:25.107754
593 16:34:25.107833 K ODTN
594 16:34:25.107913 3. OCD ODTN=0 ,CALOUT=1
595 16:34:25.107998 3. OCD ODTN=1 ,CALOUT=1
596 16:34:25.108080 3. OCD ODTN=2 ,CALOUT=1
597 16:34:25.108161 3. OCD ODTN=3 ,CALOUT=1
598 16:34:25.108242 3. OCD ODTN=4 ,CALOUT=1
599 16:34:25.108323 3. OCD ODTN=5 ,CALOUT=1
600 16:34:25.108403 3. OCD ODTN=6 ,CALOUT=1
601 16:34:25.108484 3. OCD ODTN=7 ,CALOUT=0
602 16:34:25.108565
603 16:34:25.108644 3. OCD ODTN calibration OK! ODTN=7
604 16:34:25.108724
605 16:34:25.108803 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
606 16:34:25.108884 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
607 16:34:25.108964 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
608 16:34:25.109044
609 16:34:25.109124 K DRVP
610 16:34:25.109203 1. OCD DRVP=0 CALOUT=0
611 16:34:25.109285 1. OCD DRVP=1 CALOUT=0
612 16:34:25.109367 1. OCD DRVP=2 CALOUT=0
613 16:34:25.109448 1. OCD DRVP=3 CALOUT=0
614 16:34:25.109529 1. OCD DRVP=4 CALOUT=0
615 16:34:25.109609 1. OCD DRVP=5 CALOUT=0
616 16:34:25.109690 1. OCD DRVP=6 CALOUT=0
617 16:34:25.109771 1. OCD DRVP=7 CALOUT=0
618 16:34:25.109851 1. OCD DRVP=8 CALOUT=0
619 16:34:25.109931 1. OCD DRVP=9 CALOUT=0
620 16:34:25.110219 1. OCD DRVP=10 CALOUT=0
621 16:34:25.110325 1. OCD DRVP=11 CALOUT=1
622 16:34:25.110491
623 16:34:25.110651 1. OCD DRVP calibration OK! DRVP=11
624 16:34:25.110818
625 16:34:25.110960
626 16:34:25.111071
627 16:34:25.111153 K ODTN
628 16:34:25.111234 3. OCD ODTN=0 ,CALOUT=1
629 16:34:25.111317 3. OCD ODTN=1 ,CALOUT=1
630 16:34:25.111398 3. OCD ODTN=2 ,CALOUT=1
631 16:34:25.111496 3. OCD ODTN=3 ,CALOUT=1
632 16:34:25.111579 3. OCD ODTN=4 ,CALOUT=1
633 16:34:25.111661 3. OCD ODTN=5 ,CALOUT=1
634 16:34:25.111741 3. OCD ODTN=6 ,CALOUT=1
635 16:34:25.111822 3. OCD ODTN=7 ,CALOUT=1
636 16:34:25.111904 3. OCD ODTN=8 ,CALOUT=1
637 16:34:25.111984 3. OCD ODTN=9 ,CALOUT=1
638 16:34:25.112065 3. OCD ODTN=10 ,CALOUT=1
639 16:34:25.112160 3. OCD ODTN=11 ,CALOUT=1
640 16:34:25.112289 3. OCD ODTN=12 ,CALOUT=1
641 16:34:25.112415 3. OCD ODTN=13 ,CALOUT=1
642 16:34:25.112547 3. OCD ODTN=14 ,CALOUT=1
643 16:34:25.112679 3. OCD ODTN=15 ,CALOUT=0
644 16:34:25.112790
645 16:34:25.112898 3. OCD ODTN calibration OK! ODTN=15
646 16:34:25.113009
647 16:34:25.113118 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
648 16:34:25.113229 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
649 16:34:25.113340 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
650 16:34:25.113449
651 16:34:25.113557 [DramcInit]
652 16:34:25.113668 AutoRefreshCKEOff AutoREF OFF
653 16:34:25.113760 DDRPhyPLLSetting-CKEOFF
654 16:34:25.113852 DDRPhyPLLSetting-CKEON
655 16:34:25.113944
656 16:34:25.114036 Enable WDQS
657 16:34:25.114127 ==
658 16:34:25.114221 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
659 16:34:25.114315 fsp= 1, odt_onoff= 1, Byte mode= 0
660 16:34:25.114407 ==
661 16:34:25.114500 [Duty_Offset_Calibration]
662 16:34:25.114592
663 16:34:25.114684 ===========================
664 16:34:25.114776 B0:1 B1:1 CA:1
665 16:34:25.114869 ==
666 16:34:25.114940 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
667 16:34:25.115002 fsp= 1, odt_onoff= 1, Byte mode= 0
668 16:34:25.115062 ==
669 16:34:25.115132 [Duty_Offset_Calibration]
670 16:34:25.115228
671 16:34:25.115327 ===========================
672 16:34:25.115429 B0:1 B1:0 CA:2
673 16:34:25.115499 [ModeRegInit_LP4] CH0 RK0
674 16:34:25.115561 Write Rank0 MR13 =0x18
675 16:34:25.115621 Write Rank0 MR12 =0x5d
676 16:34:25.115681 Write Rank0 MR1 =0x56
677 16:34:25.115741 Write Rank0 MR2 =0x1a
678 16:34:25.115800 Write Rank0 MR11 =0x0
679 16:34:25.115860 Write Rank0 MR22 =0x38
680 16:34:25.115920 Write Rank0 MR14 =0x5d
681 16:34:25.115979 Write Rank0 MR3 =0x30
682 16:34:25.116038 Write Rank0 MR13 =0x58
683 16:34:25.116097 Write Rank0 MR12 =0x5d
684 16:34:25.116157 Write Rank0 MR1 =0x56
685 16:34:25.116216 Write Rank0 MR2 =0x2d
686 16:34:25.116275 Write Rank0 MR11 =0x23
687 16:34:25.116335 Write Rank0 MR22 =0x34
688 16:34:25.116395 Write Rank0 MR14 =0x10
689 16:34:25.116454 Write Rank0 MR3 =0x30
690 16:34:25.116513 Write Rank0 MR13 =0xd8
691 16:34:25.116573 [ModeRegInit_LP4] CH0 RK1
692 16:34:25.116633 Write Rank1 MR13 =0x18
693 16:34:25.116692 Write Rank1 MR12 =0x5d
694 16:34:25.116752 Write Rank1 MR1 =0x56
695 16:34:25.116811 Write Rank1 MR2 =0x1a
696 16:34:25.116871 Write Rank1 MR11 =0x0
697 16:34:25.116930 Write Rank1 MR22 =0x38
698 16:34:25.116996 Write Rank1 MR14 =0x5d
699 16:34:25.117062 Write Rank1 MR3 =0x30
700 16:34:25.117123 Write Rank1 MR13 =0x58
701 16:34:25.117182 Write Rank1 MR12 =0x5d
702 16:34:25.117241 Write Rank1 MR1 =0x56
703 16:34:25.117301 Write Rank1 MR2 =0x2d
704 16:34:25.117361 Write Rank1 MR11 =0x23
705 16:34:25.117419 Write Rank1 MR22 =0x34
706 16:34:25.117478 Write Rank1 MR14 =0x10
707 16:34:25.117538 Write Rank1 MR3 =0x30
708 16:34:25.117597 Write Rank1 MR13 =0xd8
709 16:34:25.117656 [ModeRegInit_LP4] CH1 RK0
710 16:34:25.117715 Write Rank0 MR13 =0x18
711 16:34:25.117775 Write Rank0 MR12 =0x5d
712 16:34:25.117834 Write Rank0 MR1 =0x56
713 16:34:25.117894 Write Rank0 MR2 =0x1a
714 16:34:25.117952 Write Rank0 MR11 =0x0
715 16:34:25.118012 Write Rank0 MR22 =0x38
716 16:34:25.118071 Write Rank0 MR14 =0x5d
717 16:34:25.118131 Write Rank0 MR3 =0x30
718 16:34:25.118190 Write Rank0 MR13 =0x58
719 16:34:25.118256 Write Rank0 MR12 =0x5d
720 16:34:25.118320 Write Rank0 MR1 =0x56
721 16:34:25.118381 Write Rank0 MR2 =0x2d
722 16:34:25.118440 Write Rank0 MR11 =0x23
723 16:34:25.118500 Write Rank0 MR22 =0x34
724 16:34:25.118560 Write Rank0 MR14 =0x10
725 16:34:25.118624 Write Rank0 MR3 =0x30
726 16:34:25.118684 Write Rank0 MR13 =0xd8
727 16:34:25.118745 [ModeRegInit_LP4] CH1 RK1
728 16:34:25.118804 Write Rank1 MR13 =0x18
729 16:34:25.118863 Write Rank1 MR12 =0x5d
730 16:34:25.118922 Write Rank1 MR1 =0x56
731 16:34:25.118982 Write Rank1 MR2 =0x1a
732 16:34:25.119041 Write Rank1 MR11 =0x0
733 16:34:25.119101 Write Rank1 MR22 =0x38
734 16:34:25.119160 Write Rank1 MR14 =0x5d
735 16:34:25.119220 Write Rank1 MR3 =0x30
736 16:34:25.119279 Write Rank1 MR13 =0x58
737 16:34:25.119338 Write Rank1 MR12 =0x5d
738 16:34:25.119398 Write Rank1 MR1 =0x56
739 16:34:25.119465 Write Rank1 MR2 =0x2d
740 16:34:25.119524 Write Rank1 MR11 =0x23
741 16:34:25.119584 Write Rank1 MR22 =0x34
742 16:34:25.119644 Write Rank1 MR14 =0x10
743 16:34:25.119703 Write Rank1 MR3 =0x30
744 16:34:25.119762 Write Rank1 MR13 =0xd8
745 16:34:25.119822 match AC timing 3
746 16:34:25.119882 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
747 16:34:25.119943 DramC Write-DBI off
748 16:34:25.120003 DramC Read-DBI off
749 16:34:25.120063 Write Rank0 MR13 =0x59
750 16:34:25.120122 ==
751 16:34:25.120182 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
752 16:34:25.120243 fsp= 1, odt_onoff= 1, Byte mode= 0
753 16:34:25.120303 ==
754 16:34:25.120362 === u2Vref_new: 0x56 --> 0x2d
755 16:34:25.120423 === u2Vref_new: 0x58 --> 0x38
756 16:34:25.120489 === u2Vref_new: 0x5a --> 0x39
757 16:34:25.120550 === u2Vref_new: 0x5c --> 0x3c
758 16:34:25.120610 === u2Vref_new: 0x5e --> 0x3d
759 16:34:25.120671 === u2Vref_new: 0x60 --> 0xa0
760 16:34:25.120740 [CA 0] Center 34 (6~63) winsize 58
761 16:34:25.120802 [CA 1] Center 36 (9~63) winsize 55
762 16:34:25.120862 [CA 2] Center 29 (0~58) winsize 59
763 16:34:25.120922 [CA 3] Center 24 (-3~52) winsize 56
764 16:34:25.120982 [CA 4] Center 25 (-3~54) winsize 58
765 16:34:25.121042 [CA 5] Center 30 (0~60) winsize 61
766 16:34:25.121102
767 16:34:25.121162 [CATrainingPosCal] consider 1 rank data
768 16:34:25.121222 u2DelayCellTimex100 = 735/100 ps
769 16:34:25.121282 CA0 delay=34 (6~63),Diff = 10 PI (13 cell)
770 16:34:25.121342 CA1 delay=36 (9~63),Diff = 12 PI (15 cell)
771 16:34:25.121402 CA2 delay=29 (0~58),Diff = 5 PI (6 cell)
772 16:34:25.121462 CA3 delay=24 (-3~52),Diff = 0 PI (0 cell)
773 16:34:25.121522 CA4 delay=25 (-3~54),Diff = 1 PI (1 cell)
774 16:34:25.121582 CA5 delay=30 (0~60),Diff = 6 PI (7 cell)
775 16:34:25.121643
776 16:34:25.121703 CA PerBit enable=1, Macro0, CA PI delay=24
777 16:34:25.121763 === u2Vref_new: 0x5e --> 0x3d
778 16:34:25.121823
779 16:34:25.121883 Vref(ca) range 1: 30
780 16:34:25.121943
781 16:34:25.122003 CS Dly= 9 (40-0-32)
782 16:34:25.122063 Write Rank0 MR13 =0xd8
783 16:34:25.122122 Write Rank0 MR13 =0xd8
784 16:34:25.122182 Write Rank0 MR12 =0x5e
785 16:34:25.122453 Write Rank1 MR13 =0x59
786 16:34:25.122563 ==
787 16:34:25.122685 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
788 16:34:25.122805 fsp= 1, odt_onoff= 1, Byte mode= 0
789 16:34:25.122924 ==
790 16:34:25.123035 === u2Vref_new: 0x56 --> 0x2d
791 16:34:25.123139 === u2Vref_new: 0x58 --> 0x38
792 16:34:25.123234 === u2Vref_new: 0x5a --> 0x39
793 16:34:25.123327 === u2Vref_new: 0x5c --> 0x3c
794 16:34:25.123430 === u2Vref_new: 0x5e --> 0x3d
795 16:34:25.123525 === u2Vref_new: 0x60 --> 0xa0
796 16:34:25.123621 [CA 0] Center 36 (10~63) winsize 54
797 16:34:25.123714 [CA 1] Center 36 (9~63) winsize 55
798 16:34:25.123777 [CA 2] Center 31 (2~60) winsize 59
799 16:34:25.123838 [CA 3] Center 25 (-3~53) winsize 57
800 16:34:25.123897 [CA 4] Center 25 (-3~54) winsize 58
801 16:34:25.123957 [CA 5] Center 31 (2~61) winsize 60
802 16:34:25.124021
803 16:34:25.124081 [CATrainingPosCal] consider 2 rank data
804 16:34:25.124141 u2DelayCellTimex100 = 735/100 ps
805 16:34:25.124201 CA0 delay=36 (10~63),Diff = 12 PI (15 cell)
806 16:34:25.124261 CA1 delay=36 (9~63),Diff = 12 PI (15 cell)
807 16:34:25.124321 CA2 delay=30 (2~58),Diff = 6 PI (7 cell)
808 16:34:25.124380 CA3 delay=24 (-3~52),Diff = 0 PI (0 cell)
809 16:34:25.124440 CA4 delay=25 (-3~54),Diff = 1 PI (1 cell)
810 16:34:25.124500 CA5 delay=31 (2~60),Diff = 7 PI (9 cell)
811 16:34:25.124560
812 16:34:25.124619 CA PerBit enable=1, Macro0, CA PI delay=24
813 16:34:25.124679 === u2Vref_new: 0x5a --> 0x39
814 16:34:25.124739
815 16:34:25.124799 Vref(ca) range 1: 26
816 16:34:25.124858
817 16:34:25.124917 CS Dly= 7 (38-0-32)
818 16:34:25.124977 Write Rank1 MR13 =0xd8
819 16:34:25.125037 Write Rank1 MR13 =0xd8
820 16:34:25.125097 Write Rank1 MR12 =0x5a
821 16:34:25.125157 [RankSwap] Rank num 2, (Multi 1), Rank 0
822 16:34:25.125217 Write Rank0 MR2 =0xad
823 16:34:25.125277 [Write Leveling]
824 16:34:25.125336 delay byte0 byte1 byte2 byte3
825 16:34:25.125396
826 16:34:25.125455 10 0 0
827 16:34:25.125516 11 0 0
828 16:34:25.125577 12 0 0
829 16:34:25.125646 13 0 0
830 16:34:25.125710 14 0 0
831 16:34:25.125771 15 0 0
832 16:34:25.125832 16 0 0
833 16:34:25.125899 17 0 0
834 16:34:25.125966 18 0 0
835 16:34:25.126027 19 0 0
836 16:34:25.126088 20 0 0
837 16:34:25.126149 21 0 0
838 16:34:25.126210 22 0 0
839 16:34:25.126271 23 0 ff
840 16:34:25.126332 24 0 ff
841 16:34:25.126392 25 0 ff
842 16:34:25.126453 26 0 ff
843 16:34:25.126513 27 0 ff
844 16:34:25.126574 28 0 ff
845 16:34:25.126634 29 0 ff
846 16:34:25.126694 30 0 ff
847 16:34:25.126755 31 0 ff
848 16:34:25.126816 32 0 ff
849 16:34:25.126876 33 ff ff
850 16:34:25.126936 34 ff ff
851 16:34:25.126996 35 ff ff
852 16:34:25.127057 36 ff ff
853 16:34:25.127117 37 ff ff
854 16:34:25.127178 38 ff ff
855 16:34:25.127238 39 ff ff
856 16:34:25.127298 pass bytecount = 0xff (0xff: all bytes pass)
857 16:34:25.127359
858 16:34:25.127432 DQS0 dly: 33
859 16:34:25.127494 DQS1 dly: 23
860 16:34:25.127553 Write Rank0 MR2 =0x2d
861 16:34:25.127613 [RankSwap] Rank num 2, (Multi 1), Rank 0
862 16:34:25.127673 Write Rank0 MR1 =0xd6
863 16:34:25.127732 [Gating]
864 16:34:25.127791 ==
865 16:34:25.127851 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
866 16:34:25.127912 fsp= 1, odt_onoff= 1, Byte mode= 0
867 16:34:25.127972 ==
868 16:34:25.128031 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
869 16:34:25.128093 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
870 16:34:25.128154 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
871 16:34:25.128215 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
872 16:34:25.128276 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
873 16:34:25.128337 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
874 16:34:25.128398 3 1 24 |404 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
875 16:34:25.128459 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
876 16:34:25.128520 3 2 0 |3534 807 |(11 11)(11 11) |(0 0)(1 1)| 0
877 16:34:25.128582 3 2 4 |3534 908 |(11 11)(11 11) |(0 0)(1 1)| 0
878 16:34:25.128643 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
879 16:34:25.128709 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
880 16:34:25.128771 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
881 16:34:25.128831 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
882 16:34:25.128891 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
883 16:34:25.128953 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
884 16:34:25.129014 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
885 16:34:25.129074 3 3 4 |3534 777f |(11 11)(11 11) |(0 0)(1 1)| 0
886 16:34:25.129134 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
887 16:34:25.129195 [Byte 1] Lead/lag falling Transition (3, 3, 8)
888 16:34:25.129255 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
889 16:34:25.129316 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
890 16:34:25.129377 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
891 16:34:25.129438 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
892 16:34:25.129498 3 3 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
893 16:34:25.129560 3 4 0 |3d3d 1110 |(11 11)(11 11) |(1 1)(1 1)| 0
894 16:34:25.129620 3 4 4 |3d3d 2121 |(11 11)(11 11) |(1 1)(1 1)| 0
895 16:34:25.129681 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
896 16:34:25.129742 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
897 16:34:25.129803 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
898 16:34:25.129864 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
899 16:34:25.129924 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
900 16:34:25.129985 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
901 16:34:25.130045 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
902 16:34:25.130106 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
903 16:34:25.130166 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
904 16:34:25.130227 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
905 16:34:25.130288 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
906 16:34:25.130349 [Byte 0] Lead/lag falling Transition (3, 5, 16)
907 16:34:25.130409 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
908 16:34:25.130471 [Byte 0] Lead/lag Transition tap number (2)
909 16:34:25.130530 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
910 16:34:25.130791 [Byte 1] Lead/lag falling Transition (3, 5, 24)
911 16:34:25.130905 3 5 28 |4646 3d3d |(0 0)(11 11) |(0 0)(1 0)| 0
912 16:34:25.131029 [Byte 0]First pass (3, 5, 28)
913 16:34:25.131149 [Byte 1] Lead/lag Transition tap number (2)
914 16:34:25.131268 3 6 0 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
915 16:34:25.131375 3 6 4 |4646 1818 |(0 0)(11 11) |(0 0)(0 0)| 0
916 16:34:25.131473 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
917 16:34:25.131539 [Byte 1]First pass (3, 6, 8)
918 16:34:25.131601 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
919 16:34:25.131664 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
920 16:34:25.131726 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
921 16:34:25.131790 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
922 16:34:25.131851 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
923 16:34:25.131912 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
924 16:34:25.131973 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
925 16:34:25.132033 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
926 16:34:25.132094 All bytes gating window > 1UI, Early break!
927 16:34:25.132154
928 16:34:25.132214 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
929 16:34:25.132278
930 16:34:25.132340 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
931 16:34:25.132400
932 16:34:25.132460
933 16:34:25.132519
934 16:34:25.132578 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
935 16:34:25.132638
936 16:34:25.132699 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
937 16:34:25.132758
938 16:34:25.132817
939 16:34:25.132881 wait MRW command Rank0 MR1 =0x56 fired (1)
940 16:34:25.132942 Write Rank0 MR1 =0x56
941 16:34:25.133002
942 16:34:25.133061 best RODT dly(2T, 0.5T) = (2, 2)
943 16:34:25.133120
944 16:34:25.133180 best RODT dly(2T, 0.5T) = (2, 2)
945 16:34:25.133239 ==
946 16:34:25.133299 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
947 16:34:25.133359 fsp= 1, odt_onoff= 1, Byte mode= 0
948 16:34:25.133420 ==
949 16:34:25.133479 Start DQ dly to find pass range UseTestEngine =0
950 16:34:25.133539 x-axis: bit #, y-axis: DQ dly (-127~63)
951 16:34:25.133599 RX Vref Scan = 0
952 16:34:25.133658 -26, [0] xxxxxxxx xxxxxxxx [MSB]
953 16:34:25.133723 -25, [0] xxxxxxxx xxxxxxxx [MSB]
954 16:34:25.133822 -24, [0] xxxxxxxx xxxxxxxx [MSB]
955 16:34:25.133918 -23, [0] xxxxxxxx xxxxxxxx [MSB]
956 16:34:25.134013 -22, [0] xxxxxxxx xxxxxxxx [MSB]
957 16:34:25.134088 -21, [0] xxxxxxxx xxxxxxxx [MSB]
958 16:34:25.134150 -20, [0] xxxxxxxx xxxxxxxx [MSB]
959 16:34:25.134211 -19, [0] xxxxxxxx xxxxxxxx [MSB]
960 16:34:25.134272 -18, [0] xxxxxxxx xxxxxxxx [MSB]
961 16:34:25.134338 -17, [0] xxxxxxxx xxxxxxxx [MSB]
962 16:34:25.134405 -16, [0] xxxxxxxx xxxxxxxx [MSB]
963 16:34:25.134467 -15, [0] xxxxxxxx xxxxxxxx [MSB]
964 16:34:25.134528 -14, [0] xxxxxxxx xxxxxxxx [MSB]
965 16:34:25.134588 -13, [0] xxxxxxxx xxxxxxxx [MSB]
966 16:34:25.134649 -12, [0] xxxxxxxx xxxxxxxx [MSB]
967 16:34:25.134710 -11, [0] xxxxxxxx xxxxxxxx [MSB]
968 16:34:25.134771 -10, [0] xxxxxxxx xxxxxxxx [MSB]
969 16:34:25.134831 -9, [0] xxxxxxxx xxxxxxxx [MSB]
970 16:34:25.134892 -8, [0] xxxxxxxx xxxxxxxx [MSB]
971 16:34:25.134953 -7, [0] xxxxxxxx xxxxxxxx [MSB]
972 16:34:25.135013 -6, [0] xxxxxxxx xxxxxxxx [MSB]
973 16:34:25.135088 -5, [0] xxxxxxxx xxxxxxxx [MSB]
974 16:34:25.135151 -4, [0] xxxxxxxx xxxxxxxx [MSB]
975 16:34:25.135213 -3, [0] xxxxxxxx xxxxxxxx [MSB]
976 16:34:25.135274 -2, [0] xxxoxxxx oxxxxxxx [MSB]
977 16:34:25.135335 -1, [0] xxxoxxxx oxxxxxxx [MSB]
978 16:34:25.135423 0, [0] xxxoxxxx ooxoxxxx [MSB]
979 16:34:25.135488 1, [0] xxxoxoox ooxoooxx [MSB]
980 16:34:25.135550 2, [0] xxxoxoox ooxoooxx [MSB]
981 16:34:25.135610 3, [0] xxxoxoox ooxoooox [MSB]
982 16:34:25.135671 4, [0] xxxoxoox ooxoooox [MSB]
983 16:34:25.135732 5, [0] xooooooo ooxooooo [MSB]
984 16:34:25.135793 6, [0] xooooooo ooxooooo [MSB]
985 16:34:25.135855 7, [0] oooooooo ooxooooo [MSB]
986 16:34:25.135915 8, [0] oooooooo ooxooooo [MSB]
987 16:34:25.135977 32, [0] oooxoooo oooooooo [MSB]
988 16:34:25.136038 33, [0] oooxoooo xooooooo [MSB]
989 16:34:25.136098 34, [0] oooxoooo xooooooo [MSB]
990 16:34:25.136159 35, [0] oooxoooo xooooooo [MSB]
991 16:34:25.136220 36, [0] oooxoxox xooxoooo [MSB]
992 16:34:25.136281 37, [0] oooxoxxx xxoxoooo [MSB]
993 16:34:25.136342 38, [0] oooxoxxx xxoxxoxo [MSB]
994 16:34:25.136403 39, [0] oooxxxxx xxoxxxxo [MSB]
995 16:34:25.136463 40, [0] xxoxxxxx xxoxxxxo [MSB]
996 16:34:25.136524 41, [0] xxxxxxxx xxoxxxxo [MSB]
997 16:34:25.136585 42, [0] xxxxxxxx xxoxxxxx [MSB]
998 16:34:25.136646 43, [0] xxxxxxxx xxoxxxxx [MSB]
999 16:34:25.136706 44, [0] xxxxxxxx xxxxxxxx [MSB]
1000 16:34:25.136767 iDelay=44, Bit 0, Center 23 (7 ~ 39) 33
1001 16:34:25.136827 iDelay=44, Bit 1, Center 22 (5 ~ 39) 35
1002 16:34:25.136887 iDelay=44, Bit 2, Center 22 (5 ~ 40) 36
1003 16:34:25.136947 iDelay=44, Bit 3, Center 14 (-2 ~ 31) 34
1004 16:34:25.137014 iDelay=44, Bit 4, Center 21 (5 ~ 38) 34
1005 16:34:25.137079 iDelay=44, Bit 5, Center 18 (1 ~ 35) 35
1006 16:34:25.137140 iDelay=44, Bit 6, Center 18 (1 ~ 36) 36
1007 16:34:25.137200 iDelay=44, Bit 7, Center 20 (5 ~ 35) 31
1008 16:34:25.137260 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
1009 16:34:25.137320 iDelay=44, Bit 9, Center 18 (0 ~ 36) 37
1010 16:34:25.137380 iDelay=44, Bit 10, Center 26 (9 ~ 43) 35
1011 16:34:25.137439 iDelay=44, Bit 11, Center 17 (0 ~ 35) 36
1012 16:34:25.137499 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
1013 16:34:25.137558 iDelay=44, Bit 13, Center 19 (1 ~ 38) 38
1014 16:34:25.137618 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
1015 16:34:25.137677 iDelay=44, Bit 15, Center 23 (5 ~ 41) 37
1016 16:34:25.137737 ==
1017 16:34:25.137798 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1018 16:34:25.137860 fsp= 1, odt_onoff= 1, Byte mode= 0
1019 16:34:25.137921 ==
1020 16:34:25.137981 DQS Delay:
1021 16:34:25.138040 DQS0 = 0, DQS1 = 0
1022 16:34:25.138101 DQM Delay:
1023 16:34:25.138161 DQM0 = 19, DQM1 = 19
1024 16:34:25.138221 DQ Delay:
1025 16:34:25.138288 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =14
1026 16:34:25.138354 DQ4 =21, DQ5 =18, DQ6 =18, DQ7 =20
1027 16:34:25.138416 DQ8 =15, DQ9 =18, DQ10 =26, DQ11 =17
1028 16:34:25.138477 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =23
1029 16:34:25.138536
1030 16:34:25.138596
1031 16:34:25.138655 DramC Write-DBI off
1032 16:34:25.138715 ==
1033 16:34:25.138774 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1034 16:34:25.138834 fsp= 1, odt_onoff= 1, Byte mode= 0
1035 16:34:25.138894 ==
1036 16:34:25.138954 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1037 16:34:25.139014
1038 16:34:25.139073 Begin, DQ Scan Range 919~1175
1039 16:34:25.139132
1040 16:34:25.139198
1041 16:34:25.139453 TX Vref Scan disable
1042 16:34:25.139523 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1043 16:34:25.139587 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1044 16:34:25.139649 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1045 16:34:25.139711 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1046 16:34:25.139773 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1047 16:34:25.139833 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1048 16:34:25.139894 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1049 16:34:25.139955 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1050 16:34:25.140016 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1051 16:34:25.140076 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1052 16:34:25.140137 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1053 16:34:25.140197 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1054 16:34:25.140258 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1055 16:34:25.140319 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1056 16:34:25.140380 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1057 16:34:25.140440 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1058 16:34:25.140500 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1059 16:34:25.140561 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1060 16:34:25.140622 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1061 16:34:25.140682 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1062 16:34:25.140743 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1063 16:34:25.140803 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1064 16:34:25.140864 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1065 16:34:25.140924 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1066 16:34:25.140984 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1067 16:34:25.141045 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1068 16:34:25.141105 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1069 16:34:25.141165 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1070 16:34:25.141225 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1071 16:34:25.141286 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1072 16:34:25.141347 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1073 16:34:25.141422 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1074 16:34:25.141486 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1075 16:34:25.141547 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1076 16:34:25.141608 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1077 16:34:25.141669 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1078 16:34:25.141729 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1079 16:34:25.141790 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1080 16:34:25.141850 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1081 16:34:25.141911 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1082 16:34:25.141972 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1083 16:34:25.142033 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1084 16:34:25.142094 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1085 16:34:25.142155 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1086 16:34:25.142216 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1087 16:34:25.142276 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1088 16:34:25.142337 965 |3 6 5|[0] xxxxxxxx oxxoxxxx [MSB]
1089 16:34:25.142397 966 |3 6 6|[0] xxxxxxxx oxxoxxxx [MSB]
1090 16:34:25.142458 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1091 16:34:25.142518 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1092 16:34:25.142579 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1093 16:34:25.142639 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
1094 16:34:25.142700 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1095 16:34:25.142761 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1096 16:34:25.142822 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1097 16:34:25.142883 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1098 16:34:25.142943 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1099 16:34:25.143016 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1100 16:34:25.143078 984 |3 6 24|[0] oooooooo xooooooo [MSB]
1101 16:34:25.143138 985 |3 6 25|[0] oooooooo xooxoooo [MSB]
1102 16:34:25.143198 986 |3 6 26|[0] oooooooo xxxxxxxx [MSB]
1103 16:34:25.143259 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1104 16:34:25.143319 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1105 16:34:25.143383 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1106 16:34:25.143463 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1107 16:34:25.143525 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1108 16:34:25.143587 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1109 16:34:25.143648 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1110 16:34:25.143709 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1111 16:34:25.143770 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1112 16:34:25.143831 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1113 16:34:25.143892 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1114 16:34:25.143953 998 |3 6 38|[0] oooxxxxx xxxxxxxx [MSB]
1115 16:34:25.144014 999 |3 6 39|[0] xxoxxxxx xxxxxxxx [MSB]
1116 16:34:25.144075 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1117 16:34:25.144135 Byte0, DQ PI dly=986, DQM PI dly= 986
1118 16:34:25.144195 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1119 16:34:25.144255
1120 16:34:25.144316 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1121 16:34:25.144376
1122 16:34:25.144436 Byte1, DQ PI dly=975, DQM PI dly= 975
1123 16:34:25.144496 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1124 16:34:25.144556
1125 16:34:25.144635 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1126 16:34:25.144699
1127 16:34:25.144759 ==
1128 16:34:25.144819 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1129 16:34:25.144879 fsp= 1, odt_onoff= 1, Byte mode= 0
1130 16:34:25.144940 ==
1131 16:34:25.145021 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1132 16:34:25.145112
1133 16:34:25.145190 Begin, DQ Scan Range 951~1015
1134 16:34:25.145250 Write Rank0 MR14 =0x0
1135 16:34:25.145310
1136 16:34:25.145370 CH=0, VrefRange= 0, VrefLevel = 0
1137 16:34:25.145430 TX Bit0 (980~994) 15 987, Bit8 (967~977) 11 972,
1138 16:34:25.145491 TX Bit1 (978~993) 16 985, Bit9 (968~982) 15 975,
1139 16:34:25.145552 TX Bit2 (980~994) 15 987, Bit10 (975~985) 11 980,
1140 16:34:25.145611 TX Bit3 (976~987) 12 981, Bit11 (967~979) 13 973,
1141 16:34:25.145672 TX Bit4 (978~992) 15 985, Bit12 (969~982) 14 975,
1142 16:34:25.145732 TX Bit5 (977~991) 15 984, Bit13 (969~983) 15 976,
1143 16:34:25.145791 TX Bit6 (978~991) 14 984, Bit14 (968~983) 16 975,
1144 16:34:25.145851 TX Bit7 (979~992) 14 985, Bit15 (973~984) 12 978,
1145 16:34:25.145911
1146 16:34:25.145974 Write Rank0 MR14 =0x2
1147 16:34:25.146034
1148 16:34:25.146296 CH=0, VrefRange= 0, VrefLevel = 2
1149 16:34:25.146394 TX Bit0 (979~995) 17 987, Bit8 (966~977) 12 971,
1150 16:34:25.146512 TX Bit1 (978~993) 16 985, Bit9 (968~983) 16 975,
1151 16:34:25.146629 TX Bit2 (979~995) 17 987, Bit10 (974~986) 13 980,
1152 16:34:25.146747 TX Bit3 (976~987) 12 981, Bit11 (967~981) 15 974,
1153 16:34:25.146867 TX Bit4 (978~993) 16 985, Bit12 (969~983) 15 976,
1154 16:34:25.146985 TX Bit5 (976~991) 16 983, Bit13 (969~983) 15 976,
1155 16:34:25.147105 TX Bit6 (978~992) 15 985, Bit14 (968~984) 17 976,
1156 16:34:25.147223 TX Bit7 (978~992) 15 985, Bit15 (973~985) 13 979,
1157 16:34:25.147341
1158 16:34:25.147456 Write Rank0 MR14 =0x4
1159 16:34:25.147520
1160 16:34:25.147583 CH=0, VrefRange= 0, VrefLevel = 4
1161 16:34:25.147645 TX Bit0 (979~996) 18 987, Bit8 (966~978) 13 972,
1162 16:34:25.147705 TX Bit1 (978~994) 17 986, Bit9 (968~983) 16 975,
1163 16:34:25.147766 TX Bit2 (979~995) 17 987, Bit10 (973~987) 15 980,
1164 16:34:25.147826 TX Bit3 (975~989) 15 982, Bit11 (967~982) 16 974,
1165 16:34:25.147886 TX Bit4 (978~993) 16 985, Bit12 (969~983) 15 976,
1166 16:34:25.147945 TX Bit5 (976~992) 17 984, Bit13 (968~983) 16 975,
1167 16:34:25.148005 TX Bit6 (977~993) 17 985, Bit14 (968~984) 17 976,
1168 16:34:25.148064 TX Bit7 (978~993) 16 985, Bit15 (973~986) 14 979,
1169 16:34:25.148125
1170 16:34:25.148184 Write Rank0 MR14 =0x6
1171 16:34:25.148244
1172 16:34:25.148303 CH=0, VrefRange= 0, VrefLevel = 6
1173 16:34:25.148363 TX Bit0 (978~997) 20 987, Bit8 (966~979) 14 972,
1174 16:34:25.148423 TX Bit1 (978~995) 18 986, Bit9 (967~984) 18 975,
1175 16:34:25.148483 TX Bit2 (978~996) 19 987, Bit10 (973~987) 15 980,
1176 16:34:25.148543 TX Bit3 (975~990) 16 982, Bit11 (967~982) 16 974,
1177 16:34:25.148603 TX Bit4 (978~994) 17 986, Bit12 (968~984) 17 976,
1178 16:34:25.148663 TX Bit5 (976~993) 18 984, Bit13 (968~984) 17 976,
1179 16:34:25.148731 TX Bit6 (977~993) 17 985, Bit14 (968~984) 17 976,
1180 16:34:25.148792 TX Bit7 (978~994) 17 986, Bit15 (972~986) 15 979,
1181 16:34:25.148852
1182 16:34:25.148912 Write Rank0 MR14 =0x8
1183 16:34:25.148972
1184 16:34:25.149032 CH=0, VrefRange= 0, VrefLevel = 8
1185 16:34:25.149095 TX Bit0 (978~998) 21 988, Bit8 (965~981) 17 973,
1186 16:34:25.149155 TX Bit1 (977~996) 20 986, Bit9 (967~984) 18 975,
1187 16:34:25.149216 TX Bit2 (978~997) 20 987, Bit10 (972~989) 18 980,
1188 16:34:25.149276 TX Bit3 (974~991) 18 982, Bit11 (966~983) 18 974,
1189 16:34:25.149336 TX Bit4 (978~994) 17 986, Bit12 (968~984) 17 976,
1190 16:34:25.149395 TX Bit5 (976~993) 18 984, Bit13 (968~984) 17 976,
1191 16:34:25.149454 TX Bit6 (977~993) 17 985, Bit14 (967~985) 19 976,
1192 16:34:25.149515 TX Bit7 (978~994) 17 986, Bit15 (972~987) 16 979,
1193 16:34:25.149574
1194 16:34:25.149634 Write Rank0 MR14 =0xa
1195 16:34:25.149693
1196 16:34:25.149753 CH=0, VrefRange= 0, VrefLevel = 10
1197 16:34:25.149812 TX Bit0 (978~998) 21 988, Bit8 (965~982) 18 973,
1198 16:34:25.149872 TX Bit1 (978~996) 19 987, Bit9 (967~984) 18 975,
1199 16:34:25.149932 TX Bit2 (978~998) 21 988, Bit10 (972~990) 19 981,
1200 16:34:25.149992 TX Bit3 (974~991) 18 982, Bit11 (966~983) 18 974,
1201 16:34:25.150051 TX Bit4 (977~995) 19 986, Bit12 (968~984) 17 976,
1202 16:34:25.150118 TX Bit5 (975~993) 19 984, Bit13 (968~985) 18 976,
1203 16:34:25.150185 TX Bit6 (977~994) 18 985, Bit14 (967~985) 19 976,
1204 16:34:25.150246 TX Bit7 (978~995) 18 986, Bit15 (971~989) 19 980,
1205 16:34:25.150305
1206 16:34:25.150365 Write Rank0 MR14 =0xc
1207 16:34:25.150425
1208 16:34:25.150485 CH=0, VrefRange= 0, VrefLevel = 12
1209 16:34:25.150545 TX Bit0 (978~998) 21 988, Bit8 (965~982) 18 973,
1210 16:34:25.150605 TX Bit1 (977~997) 21 987, Bit9 (967~985) 19 976,
1211 16:34:25.150665 TX Bit2 (978~998) 21 988, Bit10 (972~990) 19 981,
1212 16:34:25.150726 TX Bit3 (974~992) 19 983, Bit11 (966~984) 19 975,
1213 16:34:25.150786 TX Bit4 (977~996) 20 986, Bit12 (968~985) 18 976,
1214 16:34:25.150846 TX Bit5 (975~994) 20 984, Bit13 (967~985) 19 976,
1215 16:34:25.150906 TX Bit6 (977~994) 18 985, Bit14 (967~986) 20 976,
1216 16:34:25.150966 TX Bit7 (977~995) 19 986, Bit15 (971~989) 19 980,
1217 16:34:25.151026
1218 16:34:25.151085 Write Rank0 MR14 =0xe
1219 16:34:25.151144
1220 16:34:25.151204 CH=0, VrefRange= 0, VrefLevel = 14
1221 16:34:25.151264 TX Bit0 (978~999) 22 988, Bit8 (965~983) 19 974,
1222 16:34:25.151324 TX Bit1 (977~998) 22 987, Bit9 (967~985) 19 976,
1223 16:34:25.151384 TX Bit2 (977~999) 23 988, Bit10 (971~990) 20 980,
1224 16:34:25.151463 TX Bit3 (973~992) 20 982, Bit11 (966~984) 19 975,
1225 16:34:25.151525 TX Bit4 (977~996) 20 986, Bit12 (968~985) 18 976,
1226 16:34:25.151585 TX Bit5 (975~994) 20 984, Bit13 (967~985) 19 976,
1227 16:34:25.151645 TX Bit6 (976~994) 19 985, Bit14 (967~986) 20 976,
1228 16:34:25.151706 TX Bit7 (977~996) 20 986, Bit15 (971~990) 20 980,
1229 16:34:25.151766
1230 16:34:25.151825 Write Rank0 MR14 =0x10
1231 16:34:25.151884
1232 16:34:25.151948 CH=0, VrefRange= 0, VrefLevel = 16
1233 16:34:25.152016 TX Bit0 (977~999) 23 988, Bit8 (965~983) 19 974,
1234 16:34:25.152078 TX Bit1 (977~999) 23 988, Bit9 (966~985) 20 975,
1235 16:34:25.152138 TX Bit2 (977~999) 23 988, Bit10 (972~990) 19 981,
1236 16:34:25.152198 TX Bit3 (973~993) 21 983, Bit11 (965~984) 20 974,
1237 16:34:25.152258 TX Bit4 (977~997) 21 987, Bit12 (967~986) 20 976,
1238 16:34:25.152318 TX Bit5 (974~995) 22 984, Bit13 (967~986) 20 976,
1239 16:34:25.152385 TX Bit6 (976~996) 21 986, Bit14 (967~987) 21 977,
1240 16:34:25.152445 TX Bit7 (977~996) 20 986, Bit15 (970~990) 21 980,
1241 16:34:25.152505
1242 16:34:25.152565 Write Rank0 MR14 =0x12
1243 16:34:25.152624
1244 16:34:25.152684 CH=0, VrefRange= 0, VrefLevel = 18
1245 16:34:25.152744 TX Bit0 (977~999) 23 988, Bit8 (964~983) 20 973,
1246 16:34:25.152804 TX Bit1 (977~999) 23 988, Bit9 (966~986) 21 976,
1247 16:34:25.152864 TX Bit2 (978~999) 22 988, Bit10 (970~991) 22 980,
1248 16:34:25.153139 TX Bit3 (973~993) 21 983, Bit11 (965~985) 21 975,
1249 16:34:25.153219 TX Bit4 (977~998) 22 987, Bit12 (967~986) 20 976,
1250 16:34:25.153282 TX Bit5 (974~996) 23 985, Bit13 (967~986) 20 976,
1251 16:34:25.153343 TX Bit6 (976~996) 21 986, Bit14 (966~988) 23 977,
1252 16:34:25.153404 TX Bit7 (977~998) 22 987, Bit15 (970~990) 21 980,
1253 16:34:25.153464
1254 16:34:25.153524 Write Rank0 MR14 =0x14
1255 16:34:25.153584
1256 16:34:25.153644 CH=0, VrefRange= 0, VrefLevel = 20
1257 16:34:25.153705 TX Bit0 (977~1000) 24 988, Bit8 (964~984) 21 974,
1258 16:34:25.153765 TX Bit1 (976~999) 24 987, Bit9 (966~987) 22 976,
1259 16:34:25.153825 TX Bit2 (977~1000) 24 988, Bit10 (970~991) 22 980,
1260 16:34:25.153885 TX Bit3 (972~993) 22 982, Bit11 (965~985) 21 975,
1261 16:34:25.153945 TX Bit4 (976~999) 24 987, Bit12 (967~987) 21 977,
1262 16:34:25.154005 TX Bit5 (974~996) 23 985, Bit13 (967~987) 21 977,
1263 16:34:25.154066 TX Bit6 (976~997) 22 986, Bit14 (966~989) 24 977,
1264 16:34:25.154126 TX Bit7 (977~999) 23 988, Bit15 (969~991) 23 980,
1265 16:34:25.154186
1266 16:34:25.154245 Write Rank0 MR14 =0x16
1267 16:34:25.154305
1268 16:34:25.154364 CH=0, VrefRange= 0, VrefLevel = 22
1269 16:34:25.154424 TX Bit0 (977~1000) 24 988, Bit8 (963~984) 22 973,
1270 16:34:25.154484 TX Bit1 (976~1000) 25 988, Bit9 (966~988) 23 977,
1271 16:34:25.154544 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1272 16:34:25.154604 TX Bit3 (971~993) 23 982, Bit11 (965~986) 22 975,
1273 16:34:25.154664 TX Bit4 (976~999) 24 987, Bit12 (967~988) 22 977,
1274 16:34:25.154724 TX Bit5 (973~997) 25 985, Bit13 (966~988) 23 977,
1275 16:34:25.154784 TX Bit6 (975~998) 24 986, Bit14 (966~989) 24 977,
1276 16:34:25.154844 TX Bit7 (977~999) 23 988, Bit15 (969~991) 23 980,
1277 16:34:25.154903
1278 16:34:25.154963 Write Rank0 MR14 =0x18
1279 16:34:25.155022
1280 16:34:25.155082 CH=0, VrefRange= 0, VrefLevel = 24
1281 16:34:25.155142 TX Bit0 (977~1000) 24 988, Bit8 (963~985) 23 974,
1282 16:34:25.155202 TX Bit1 (976~1000) 25 988, Bit9 (966~988) 23 977,
1283 16:34:25.155261 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1284 16:34:25.155321 TX Bit3 (971~994) 24 982, Bit11 (964~986) 23 975,
1285 16:34:25.155381 TX Bit4 (976~999) 24 987, Bit12 (967~989) 23 978,
1286 16:34:25.155458 TX Bit5 (974~998) 25 986, Bit13 (966~989) 24 977,
1287 16:34:25.155520 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1288 16:34:25.155580 TX Bit7 (976~999) 24 987, Bit15 (969~991) 23 980,
1289 16:34:25.155640
1290 16:34:25.155700 Write Rank0 MR14 =0x1a
1291 16:34:25.155759
1292 16:34:25.155819 CH=0, VrefRange= 0, VrefLevel = 26
1293 16:34:25.155879 TX Bit0 (977~1001) 25 989, Bit8 (962~985) 24 973,
1294 16:34:25.155939 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1295 16:34:25.155999 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1296 16:34:25.156060 TX Bit3 (970~994) 25 982, Bit11 (964~987) 24 975,
1297 16:34:25.156120 TX Bit4 (976~999) 24 987, Bit12 (966~989) 24 977,
1298 16:34:25.156180 TX Bit5 (972~998) 27 985, Bit13 (966~989) 24 977,
1299 16:34:25.156241 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1300 16:34:25.156301 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1301 16:34:25.156362
1302 16:34:25.156421 Write Rank0 MR14 =0x1c
1303 16:34:25.156480
1304 16:34:25.156539 CH=0, VrefRange= 0, VrefLevel = 28
1305 16:34:25.156599 TX Bit0 (977~1001) 25 989, Bit8 (962~985) 24 973,
1306 16:34:25.156659 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1307 16:34:25.156719 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1308 16:34:25.156779 TX Bit3 (970~994) 25 982, Bit11 (964~987) 24 975,
1309 16:34:25.156839 TX Bit4 (976~999) 24 987, Bit12 (966~989) 24 977,
1310 16:34:25.156898 TX Bit5 (972~998) 27 985, Bit13 (966~989) 24 977,
1311 16:34:25.156974 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1312 16:34:25.157035 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1313 16:34:25.157095
1314 16:34:25.157154 Write Rank0 MR14 =0x1e
1315 16:34:25.157214
1316 16:34:25.157274 CH=0, VrefRange= 0, VrefLevel = 30
1317 16:34:25.157334 TX Bit0 (977~1001) 25 989, Bit8 (962~985) 24 973,
1318 16:34:25.157394 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1319 16:34:25.157454 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1320 16:34:25.157514 TX Bit3 (970~994) 25 982, Bit11 (964~987) 24 975,
1321 16:34:25.157574 TX Bit4 (976~999) 24 987, Bit12 (966~989) 24 977,
1322 16:34:25.157633 TX Bit5 (972~998) 27 985, Bit13 (966~989) 24 977,
1323 16:34:25.157693 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1324 16:34:25.157753 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1325 16:34:25.157812
1326 16:34:25.157871 Write Rank0 MR14 =0x20
1327 16:34:25.157930
1328 16:34:25.157990 CH=0, VrefRange= 0, VrefLevel = 32
1329 16:34:25.158049 TX Bit0 (977~1001) 25 989, Bit8 (962~985) 24 973,
1330 16:34:25.158109 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1331 16:34:25.158169 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1332 16:34:25.158228 TX Bit3 (970~994) 25 982, Bit11 (964~987) 24 975,
1333 16:34:25.158287 TX Bit4 (976~999) 24 987, Bit12 (966~989) 24 977,
1334 16:34:25.158346 TX Bit5 (972~998) 27 985, Bit13 (966~989) 24 977,
1335 16:34:25.158406 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1336 16:34:25.158465 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1337 16:34:25.158524
1338 16:34:25.158582 Write Rank0 MR14 =0x22
1339 16:34:25.158641
1340 16:34:25.158699 CH=0, VrefRange= 0, VrefLevel = 34
1341 16:34:25.158758 TX Bit0 (977~1001) 25 989, Bit8 (962~985) 24 973,
1342 16:34:25.158818 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1343 16:34:25.158876 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1344 16:34:25.158936 TX Bit3 (970~994) 25 982, Bit11 (964~987) 24 975,
1345 16:34:25.158995 TX Bit4 (976~999) 24 987, Bit12 (966~989) 24 977,
1346 16:34:25.159054 TX Bit5 (972~998) 27 985, Bit13 (966~989) 24 977,
1347 16:34:25.159113 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1348 16:34:25.159384 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1349 16:34:25.159512
1350 16:34:25.159631 Write Rank0 MR14 =0x24
1351 16:34:25.159747
1352 16:34:25.159865 CH=0, VrefRange= 0, VrefLevel = 36
1353 16:34:25.159975 TX Bit0 (977~1001) 25 989, Bit8 (962~985) 24 973,
1354 16:34:25.160078 TX Bit1 (976~1000) 25 988, Bit9 (966~989) 24 977,
1355 16:34:25.160173 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
1356 16:34:25.160265 TX Bit3 (970~994) 25 982, Bit11 (964~987) 24 975,
1357 16:34:25.160343 TX Bit4 (976~999) 24 987, Bit12 (966~989) 24 977,
1358 16:34:25.160408 TX Bit5 (972~998) 27 985, Bit13 (966~989) 24 977,
1359 16:34:25.160470 TX Bit6 (975~999) 25 987, Bit14 (966~990) 25 978,
1360 16:34:25.160530 TX Bit7 (976~1000) 25 988, Bit15 (968~992) 25 980,
1361 16:34:25.160590
1362 16:34:25.160649
1363 16:34:25.160709 TX Vref found, early break! 368< 374
1364 16:34:25.160768 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1365 16:34:25.160828 u1DelayCellOfst[0]=9 cells (7 PI)
1366 16:34:25.160887 u1DelayCellOfst[1]=7 cells (6 PI)
1367 16:34:25.160949 u1DelayCellOfst[2]=7 cells (6 PI)
1368 16:34:25.161008 u1DelayCellOfst[3]=0 cells (0 PI)
1369 16:34:25.161067 u1DelayCellOfst[4]=6 cells (5 PI)
1370 16:34:25.161125 u1DelayCellOfst[5]=3 cells (3 PI)
1371 16:34:25.161184 u1DelayCellOfst[6]=6 cells (5 PI)
1372 16:34:25.161243 u1DelayCellOfst[7]=7 cells (6 PI)
1373 16:34:25.161302 Byte0, DQ PI dly=982, DQM PI dly= 985
1374 16:34:25.161361 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1375 16:34:25.161421
1376 16:34:25.161481 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1377 16:34:25.161541
1378 16:34:25.161600 u1DelayCellOfst[8]=0 cells (0 PI)
1379 16:34:25.161659 u1DelayCellOfst[9]=5 cells (4 PI)
1380 16:34:25.161718 u1DelayCellOfst[10]=9 cells (7 PI)
1381 16:34:25.161777 u1DelayCellOfst[11]=2 cells (2 PI)
1382 16:34:25.161836 u1DelayCellOfst[12]=5 cells (4 PI)
1383 16:34:25.161895 u1DelayCellOfst[13]=5 cells (4 PI)
1384 16:34:25.161954 u1DelayCellOfst[14]=6 cells (5 PI)
1385 16:34:25.162012 u1DelayCellOfst[15]=9 cells (7 PI)
1386 16:34:25.162071 Byte1, DQ PI dly=973, DQM PI dly= 976
1387 16:34:25.162131 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 13)
1388 16:34:25.162190
1389 16:34:25.162249 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 13)
1390 16:34:25.162314
1391 16:34:25.162374 Write Rank0 MR14 =0x1a
1392 16:34:25.162432
1393 16:34:25.162491 Final TX Range 0 Vref 26
1394 16:34:25.162551
1395 16:34:25.162610 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1396 16:34:25.162670
1397 16:34:25.162729 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1398 16:34:25.162790 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1399 16:34:25.162853 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1400 16:34:25.162914 Write Rank0 MR3 =0xb0
1401 16:34:25.162972 DramC Write-DBI on
1402 16:34:25.163031 ==
1403 16:34:25.163092 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1404 16:34:25.163152 fsp= 1, odt_onoff= 1, Byte mode= 0
1405 16:34:25.163211 ==
1406 16:34:25.163272 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1407 16:34:25.163331
1408 16:34:25.163390 Begin, DQ Scan Range 696~760
1409 16:34:25.163465
1410 16:34:25.163529
1411 16:34:25.163593 TX Vref Scan disable
1412 16:34:25.163653 696 |2 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1413 16:34:25.163714 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1414 16:34:25.163775 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1415 16:34:25.163836 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1416 16:34:25.163896 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1417 16:34:25.163956 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1418 16:34:25.164016 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1419 16:34:25.164076 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1420 16:34:25.164136 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1421 16:34:25.164196 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1422 16:34:25.164256 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1423 16:34:25.164315 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1424 16:34:25.164375 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1425 16:34:25.164436 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1426 16:34:25.164495 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1427 16:34:25.164555 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1428 16:34:25.164615 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1429 16:34:25.164674 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1430 16:34:25.164734 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1431 16:34:25.164793 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1432 16:34:25.164853 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1433 16:34:25.164913 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1434 16:34:25.164973 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1435 16:34:25.165033 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1436 16:34:25.165093 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1437 16:34:25.165154 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1438 16:34:25.165214 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1439 16:34:25.165275 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1440 16:34:25.165335 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1441 16:34:25.165395 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1442 16:34:25.165455 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1443 16:34:25.165515 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1444 16:34:25.165577 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1445 16:34:25.165637 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1446 16:34:25.165697 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1447 16:34:25.165763 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1448 16:34:25.165825 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1449 16:34:25.165885 Byte0, DQ PI dly=732, DQM PI dly= 732
1450 16:34:25.165945 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1451 16:34:25.166005
1452 16:34:25.166065 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1453 16:34:25.166125
1454 16:34:25.166184 Byte1, DQ PI dly=721, DQM PI dly= 721
1455 16:34:25.166243 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
1456 16:34:25.166303
1457 16:34:25.166362 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
1458 16:34:25.166421
1459 16:34:25.166480 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1460 16:34:25.166540 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1461 16:34:25.166812 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1462 16:34:25.166916 Write Rank0 MR3 =0x30
1463 16:34:25.167033 DramC Write-DBI off
1464 16:34:25.167141
1465 16:34:25.167241 [DATLAT]
1466 16:34:25.167312 Freq=1600, CH0 RK0, use_rxtx_scan=0
1467 16:34:25.167373
1468 16:34:25.167464 DATLAT Default: 0xf
1469 16:34:25.167556 7, 0xFFFF, sum=0
1470 16:34:25.167649 8, 0xFFFF, sum=0
1471 16:34:25.167743 9, 0xFFFF, sum=0
1472 16:34:25.167836 10, 0xFFFF, sum=0
1473 16:34:25.167929 11, 0xFFFF, sum=0
1474 16:34:25.168022 12, 0xFFFF, sum=0
1475 16:34:25.168114 13, 0xFFFF, sum=0
1476 16:34:25.168207 14, 0x0, sum=1
1477 16:34:25.168300 15, 0x0, sum=2
1478 16:34:25.168393 16, 0x0, sum=3
1479 16:34:25.168485 17, 0x0, sum=4
1480 16:34:25.168579 pattern=2 first_step=14 total pass=5 best_step=16
1481 16:34:25.168669 ==
1482 16:34:25.168761 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1483 16:34:25.168853 fsp= 1, odt_onoff= 1, Byte mode= 0
1484 16:34:25.168945 ==
1485 16:34:25.169037 Start DQ dly to find pass range UseTestEngine =1
1486 16:34:25.169129 x-axis: bit #, y-axis: DQ dly (-127~63)
1487 16:34:25.169220 RX Vref Scan = 1
1488 16:34:25.169310
1489 16:34:25.169400 RX Vref found, early break!
1490 16:34:25.169491
1491 16:34:25.169581 Final RX Vref 12, apply to both rank0 and 1
1492 16:34:25.169673 ==
1493 16:34:25.169764 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1494 16:34:25.169856 fsp= 1, odt_onoff= 1, Byte mode= 0
1495 16:34:25.169947 ==
1496 16:34:25.170037 DQS Delay:
1497 16:34:25.170128 DQS0 = 0, DQS1 = 0
1498 16:34:25.170218 DQM Delay:
1499 16:34:25.170308 DQM0 = 19, DQM1 = 18
1500 16:34:25.170398 DQ Delay:
1501 16:34:25.170489 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15
1502 16:34:25.170580 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
1503 16:34:25.170670 DQ8 =14, DQ9 =17, DQ10 =25, DQ11 =16
1504 16:34:25.170762 DQ12 =18, DQ13 =18, DQ14 =20, DQ15 =21
1505 16:34:25.170851
1506 16:34:25.170941
1507 16:34:25.171031
1508 16:34:25.171121 [DramC_TX_OE_Calibration] TA2
1509 16:34:25.171212 Original DQ_B0 (3 6) =30, OEN = 27
1510 16:34:25.171304 Original DQ_B1 (3 6) =30, OEN = 27
1511 16:34:25.171395 23, 0x0, End_B0=23 End_B1=23
1512 16:34:25.171498 24, 0x0, End_B0=24 End_B1=24
1513 16:34:25.171591 25, 0x0, End_B0=25 End_B1=25
1514 16:34:25.171684 26, 0x0, End_B0=26 End_B1=26
1515 16:34:25.171778 27, 0x0, End_B0=27 End_B1=27
1516 16:34:25.171871 28, 0x0, End_B0=28 End_B1=28
1517 16:34:25.171964 29, 0x0, End_B0=29 End_B1=29
1518 16:34:25.172057 30, 0x0, End_B0=30 End_B1=30
1519 16:34:25.172150 31, 0xFBFF, End_B0=30 End_B1=30
1520 16:34:25.172244 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1521 16:34:25.172336 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1522 16:34:25.172427
1523 16:34:25.172516
1524 16:34:25.172606 Write Rank0 MR23 =0x3f
1525 16:34:25.172697 [DQSOSC]
1526 16:34:25.172791 [DQSOSCAuto] RK0, (LSB)MR18= 0xf0f, (MSB)MR19= 0x303, tDQSOscB0 = 402 ps tDQSOscB1 = 402 ps
1527 16:34:25.172884 CH0_RK0: MR19=0x303, MR18=0xF0F, DQSOSC=402, MR23=63, INC=15, DEC=22
1528 16:34:25.172976 Write Rank0 MR23 =0x3f
1529 16:34:25.173066 [DQSOSC]
1530 16:34:25.173158 [DQSOSCAuto] RK0, (LSB)MR18= 0xf0f, (MSB)MR19= 0x303, tDQSOscB0 = 402 ps tDQSOscB1 = 402 ps
1531 16:34:25.173250 CH0 RK0: MR19=303, MR18=F0F
1532 16:34:25.173341 [RankSwap] Rank num 2, (Multi 1), Rank 1
1533 16:34:25.173431 Write Rank0 MR2 =0xad
1534 16:34:25.173522 [Write Leveling]
1535 16:34:25.173613 delay byte0 byte1 byte2 byte3
1536 16:34:25.173703
1537 16:34:25.173793 10 0 0
1538 16:34:25.173887 11 0 0
1539 16:34:25.173979 12 0 0
1540 16:34:25.174072 13 0 0
1541 16:34:25.174165 14 0 0
1542 16:34:25.174258 15 0 0
1543 16:34:25.174350 16 0 0
1544 16:34:25.174443 17 0 0
1545 16:34:25.174536 18 0 0
1546 16:34:25.174629 19 0 0
1547 16:34:25.174722 20 0 0
1548 16:34:25.174814 21 0 0
1549 16:34:25.174907 22 0 0
1550 16:34:25.175000 23 0 0
1551 16:34:25.175093 24 0 ff
1552 16:34:25.175186 25 ff ff
1553 16:34:25.175279 26 ff ff
1554 16:34:25.175371 27 ff ff
1555 16:34:25.175460 28 ff ff
1556 16:34:25.175523 29 ff ff
1557 16:34:25.175583 30 ff ff
1558 16:34:25.175644 31 ff ff
1559 16:34:25.175704 pass bytecount = 0xff (0xff: all bytes pass)
1560 16:34:25.175764
1561 16:34:25.175824 DQS0 dly: 25
1562 16:34:25.175883 DQS1 dly: 24
1563 16:34:25.175942 Write Rank0 MR2 =0x2d
1564 16:34:25.176001 [RankSwap] Rank num 2, (Multi 1), Rank 0
1565 16:34:25.176060 Write Rank1 MR1 =0xd6
1566 16:34:25.176119 [Gating]
1567 16:34:25.176178 ==
1568 16:34:25.176237 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1569 16:34:25.176298 fsp= 1, odt_onoff= 1, Byte mode= 0
1570 16:34:25.176358 ==
1571 16:34:25.176417 3 1 0 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1572 16:34:25.176478 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
1573 16:34:25.176539 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1574 16:34:25.176599 3 1 12 |2c2c 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1575 16:34:25.176659 3 1 16 |2c2c 3534 |(0 0)(11 11) |(1 0)(1 1)| 0
1576 16:34:25.176720 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1577 16:34:25.176779 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1578 16:34:25.176839 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1579 16:34:25.176899 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1580 16:34:25.176959 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1581 16:34:25.177019 3 2 8 |2c2c 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1582 16:34:25.177084 3 2 12 |1d1c 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1583 16:34:25.177156 3 2 16 |3534 707 |(11 11)(11 11) |(0 0)(1 1)| 0
1584 16:34:25.177217 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1585 16:34:25.177277 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1586 16:34:25.177338 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1587 16:34:25.177398 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1588 16:34:25.177458 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1589 16:34:25.177518 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1590 16:34:25.177578 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1591 16:34:25.177638 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1592 16:34:25.177699 3 3 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1593 16:34:25.177759 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1594 16:34:25.177819 [Byte 1] Lead/lag falling Transition (3, 3, 24)
1595 16:34:25.177877 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1596 16:34:25.177938 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1597 16:34:25.177998 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1598 16:34:25.178057 3 4 8 |2322 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1599 16:34:25.178336 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1600 16:34:25.178435 3 4 16 |3d3d 1f1e |(11 11)(11 11) |(1 1)(1 1)| 0
1601 16:34:25.178532 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1602 16:34:25.178627 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1603 16:34:25.178723 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1604 16:34:25.178818 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1605 16:34:25.178912 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1606 16:34:25.179006 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1607 16:34:25.179100 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1608 16:34:25.179194 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1609 16:34:25.179287 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1610 16:34:25.179381 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1611 16:34:25.179493 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1612 16:34:25.179588 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1613 16:34:25.179682 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1614 16:34:25.179774 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1615 16:34:25.179868 [Byte 0] Lead/lag Transition tap number (2)
1616 16:34:25.179959 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1617 16:34:25.180051 3 6 8 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1618 16:34:25.180145 [Byte 1] Lead/lag Transition tap number (2)
1619 16:34:25.180236 3 6 12 |4646 3e3d |(10 10)(11 11) |(0 0)(0 0)| 0
1620 16:34:25.180330 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1621 16:34:25.180424 [Byte 0]First pass (3, 6, 16)
1622 16:34:25.180516 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1623 16:34:25.180609 [Byte 1]First pass (3, 6, 20)
1624 16:34:25.180701 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1625 16:34:25.180799 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1626 16:34:25.180906 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1627 16:34:25.180972 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1628 16:34:25.181033 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1629 16:34:25.181116 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1630 16:34:25.181180 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1631 16:34:25.181242 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1632 16:34:25.181303 All bytes gating window > 1UI, Early break!
1633 16:34:25.181362
1634 16:34:25.181422 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1635 16:34:25.181482
1636 16:34:25.181540 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1637 16:34:25.181599
1638 16:34:25.181658
1639 16:34:25.181718
1640 16:34:25.181777 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1641 16:34:25.181837
1642 16:34:25.181895 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1643 16:34:25.181954
1644 16:34:25.182013
1645 16:34:25.182071 Write Rank1 MR1 =0x56
1646 16:34:25.182130
1647 16:34:25.182188 best RODT dly(2T, 0.5T) = (2, 3)
1648 16:34:25.182247
1649 16:34:25.182306 best RODT dly(2T, 0.5T) = (2, 3)
1650 16:34:25.182363 ==
1651 16:34:25.182423 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1652 16:34:25.182482 fsp= 1, odt_onoff= 1, Byte mode= 0
1653 16:34:25.182541 ==
1654 16:34:25.182601 Start DQ dly to find pass range UseTestEngine =0
1655 16:34:25.182660 x-axis: bit #, y-axis: DQ dly (-127~63)
1656 16:34:25.182720 RX Vref Scan = 0
1657 16:34:25.182778 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1658 16:34:25.182840 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1659 16:34:25.182900 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1660 16:34:25.182961 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1661 16:34:25.183021 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1662 16:34:25.183095 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1663 16:34:25.183157 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1664 16:34:25.183217 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1665 16:34:25.183277 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1666 16:34:25.183336 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1667 16:34:25.183397 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1668 16:34:25.183473 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1669 16:34:25.183534 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1670 16:34:25.183594 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1671 16:34:25.183654 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1672 16:34:25.183714 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1673 16:34:25.183773 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1674 16:34:25.183833 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1675 16:34:25.183893 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1676 16:34:25.183953 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1677 16:34:25.184013 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1678 16:34:25.184073 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1679 16:34:25.184134 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1680 16:34:25.184194 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1681 16:34:25.184254 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1682 16:34:25.184313 -1, [0] xxxxxxxx oxxoxxxx [MSB]
1683 16:34:25.184373 0, [0] xxxoxoxx oxxoxxxx [MSB]
1684 16:34:25.184435 1, [0] xxxoxoxx ooxooxxx [MSB]
1685 16:34:25.184495 2, [0] xxxoxooo ooxoooxx [MSB]
1686 16:34:25.184554 3, [0] xoxooooo ooxoooox [MSB]
1687 16:34:25.184615 4, [0] oooooooo ooxoooox [MSB]
1688 16:34:25.184675 5, [0] oooooooo ooxooooo [MSB]
1689 16:34:25.184734 6, [0] oooooooo ooxooooo [MSB]
1690 16:34:25.184794 34, [0] oooooooo xooooooo [MSB]
1691 16:34:25.184853 35, [0] oooxoooo xooooooo [MSB]
1692 16:34:25.184913 36, [0] oooxoooo xooxoooo [MSB]
1693 16:34:25.184973 37, [0] oooxoxoo xxoxoxoo [MSB]
1694 16:34:25.185033 38, [0] oooxoxoo xxoxoxxo [MSB]
1695 16:34:25.185105 39, [0] oooxoxox xxoxxxxo [MSB]
1696 16:34:25.185203 40, [0] oooxoxxx xxoxxxxo [MSB]
1697 16:34:25.185290 41, [0] oxxxoxxx xxoxxxxx [MSB]
1698 16:34:25.185352 42, [0] oxxxxxxx xxoxxxxx [MSB]
1699 16:34:25.185412 43, [0] xxxxxxxx xxoxxxxx [MSB]
1700 16:34:25.185472 44, [0] xxxxxxxx xxoxxxxx [MSB]
1701 16:34:25.185532 45, [0] xxxxxxxx xxxxxxxx [MSB]
1702 16:34:25.185593 iDelay=45, Bit 0, Center 23 (4 ~ 42) 39
1703 16:34:25.185652 iDelay=45, Bit 1, Center 21 (3 ~ 40) 38
1704 16:34:25.185712 iDelay=45, Bit 2, Center 22 (4 ~ 40) 37
1705 16:34:25.185771 iDelay=45, Bit 3, Center 17 (0 ~ 34) 35
1706 16:34:25.185830 iDelay=45, Bit 4, Center 22 (3 ~ 41) 39
1707 16:34:25.185888 iDelay=45, Bit 5, Center 18 (0 ~ 36) 37
1708 16:34:25.185948 iDelay=45, Bit 6, Center 20 (2 ~ 39) 38
1709 16:34:25.186007 iDelay=45, Bit 7, Center 20 (2 ~ 38) 37
1710 16:34:25.186066 iDelay=45, Bit 8, Center 15 (-2 ~ 33) 36
1711 16:34:25.186125 iDelay=45, Bit 9, Center 18 (1 ~ 36) 36
1712 16:34:25.186183 iDelay=45, Bit 10, Center 25 (7 ~ 44) 38
1713 16:34:25.186243 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1714 16:34:25.186523 iDelay=45, Bit 12, Center 19 (1 ~ 38) 38
1715 16:34:25.186590 iDelay=45, Bit 13, Center 19 (2 ~ 36) 35
1716 16:34:25.186650 iDelay=45, Bit 14, Center 20 (3 ~ 37) 35
1717 16:34:25.186709 iDelay=45, Bit 15, Center 22 (5 ~ 40) 36
1718 16:34:25.186770 ==
1719 16:34:25.186830 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1720 16:34:25.186891 fsp= 1, odt_onoff= 1, Byte mode= 0
1721 16:34:25.186951 ==
1722 16:34:25.187011 DQS Delay:
1723 16:34:25.187070 DQS0 = 0, DQS1 = 0
1724 16:34:25.187131 DQM Delay:
1725 16:34:25.187190 DQM0 = 20, DQM1 = 19
1726 16:34:25.187249 DQ Delay:
1727 16:34:25.187308 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =17
1728 16:34:25.187367 DQ4 =22, DQ5 =18, DQ6 =20, DQ7 =20
1729 16:34:25.187449 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
1730 16:34:25.187511 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =22
1731 16:34:25.187570
1732 16:34:25.187630
1733 16:34:25.187688 DramC Write-DBI off
1734 16:34:25.187747 ==
1735 16:34:25.187807 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1736 16:34:25.187867 fsp= 1, odt_onoff= 1, Byte mode= 0
1737 16:34:25.187927 ==
1738 16:34:25.187986 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1739 16:34:25.188046
1740 16:34:25.188105 Begin, DQ Scan Range 920~1176
1741 16:34:25.188164
1742 16:34:25.188224
1743 16:34:25.188283 TX Vref Scan disable
1744 16:34:25.188343 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1745 16:34:25.188405 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1746 16:34:25.188468 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1747 16:34:25.188529 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1748 16:34:25.188590 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1749 16:34:25.188651 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1750 16:34:25.188710 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1751 16:34:25.188774 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1752 16:34:25.188850 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1753 16:34:25.188911 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1754 16:34:25.188971 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1755 16:34:25.189031 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1756 16:34:25.189092 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1757 16:34:25.189152 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1758 16:34:25.189212 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1759 16:34:25.189274 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1760 16:34:25.189334 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1761 16:34:25.189394 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1762 16:34:25.189455 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1763 16:34:25.189514 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1764 16:34:25.189575 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1765 16:34:25.189635 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1766 16:34:25.189694 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1767 16:34:25.189754 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1768 16:34:25.189814 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1769 16:34:25.189874 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1770 16:34:25.189934 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1771 16:34:25.189994 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1772 16:34:25.190054 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1773 16:34:25.190113 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1774 16:34:25.190173 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1775 16:34:25.190233 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1776 16:34:25.190293 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1777 16:34:25.190352 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1778 16:34:25.190412 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1779 16:34:25.190472 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1780 16:34:25.190532 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1781 16:34:25.190591 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1782 16:34:25.190651 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1783 16:34:25.190710 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1784 16:34:25.190769 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1785 16:34:25.190828 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1786 16:34:25.190888 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1787 16:34:25.190948 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1788 16:34:25.191008 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1789 16:34:25.191068 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1790 16:34:25.191128 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1791 16:34:25.191188 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1792 16:34:25.191248 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1793 16:34:25.191308 969 |3 6 9|[0] xxxxxxxx ooxoxxxx [MSB]
1794 16:34:25.191368 970 |3 6 10|[0] xxxxxxxx ooxooxox [MSB]
1795 16:34:25.191444 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1796 16:34:25.191507 972 |3 6 12|[0] xxxooooo ooxoooox [MSB]
1797 16:34:25.191568 973 |3 6 13|[0] xoxooooo ooxoooox [MSB]
1798 16:34:25.191628 974 |3 6 14|[0] xoxooooo ooxooooo [MSB]
1799 16:34:25.191688 987 |3 6 27|[0] oooooooo xooooooo [MSB]
1800 16:34:25.191749 988 |3 6 28|[0] oooxoooo xxxxxxxx [MSB]
1801 16:34:25.191810 989 |3 6 29|[0] oooxoooo xxxxxxxx [MSB]
1802 16:34:25.191870 990 |3 6 30|[0] oooxoooo xxxxxxxx [MSB]
1803 16:34:25.191931 991 |3 6 31|[0] oooxoxoo xxxxxxxx [MSB]
1804 16:34:25.192010 992 |3 6 32|[0] xxxxxxxx xxxxxxxx [MSB]
1805 16:34:25.192096 Byte0, DQ PI dly=981, DQM PI dly= 981
1806 16:34:25.192157 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1807 16:34:25.192223
1808 16:34:25.192327 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1809 16:34:25.192442
1810 16:34:25.192527 Byte1, DQ PI dly=979, DQM PI dly= 979
1811 16:34:25.192590 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1812 16:34:25.192651
1813 16:34:25.192711 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1814 16:34:25.192771
1815 16:34:25.192831 ==
1816 16:34:25.192891 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1817 16:34:25.192951 fsp= 1, odt_onoff= 1, Byte mode= 0
1818 16:34:25.193010 ==
1819 16:34:25.193070 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1820 16:34:25.193130
1821 16:34:25.193188 Begin, DQ Scan Range 955~1019
1822 16:34:25.193247 Write Rank1 MR14 =0x0
1823 16:34:25.193306
1824 16:34:25.193365 CH=0, VrefRange= 0, VrefLevel = 0
1825 16:34:25.193425 TX Bit0 (977~990) 14 983, Bit8 (970~982) 13 976,
1826 16:34:25.193485 TX Bit1 (976~985) 10 980, Bit9 (971~985) 15 978,
1827 16:34:25.193544 TX Bit2 (976~988) 13 982, Bit10 (977~989) 13 983,
1828 16:34:25.193603 TX Bit3 (970~982) 13 976, Bit11 (971~983) 13 977,
1829 16:34:25.193662 TX Bit4 (975~987) 13 981, Bit12 (973~985) 13 979,
1830 16:34:25.193721 TX Bit5 (972~984) 13 978, Bit13 (975~983) 9 979,
1831 16:34:25.194003 TX Bit6 (974~986) 13 980, Bit14 (974~986) 13 980,
1832 16:34:25.194071 TX Bit7 (974~987) 14 980, Bit15 (976~989) 14 982,
1833 16:34:25.194149
1834 16:34:25.194210 Write Rank1 MR14 =0x2
1835 16:34:25.194269
1836 16:34:25.194328 CH=0, VrefRange= 0, VrefLevel = 2
1837 16:34:25.194388 TX Bit0 (976~991) 16 983, Bit8 (969~983) 15 976,
1838 16:34:25.194491 TX Bit1 (975~986) 12 980, Bit9 (971~985) 15 978,
1839 16:34:25.194585 TX Bit2 (976~989) 14 982, Bit10 (977~990) 14 983,
1840 16:34:25.194678 TX Bit3 (969~983) 15 976, Bit11 (970~983) 14 976,
1841 16:34:25.194771 TX Bit4 (974~988) 15 981, Bit12 (973~985) 13 979,
1842 16:34:25.194863 TX Bit5 (972~985) 14 978, Bit13 (974~983) 10 978,
1843 16:34:25.194955 TX Bit6 (973~987) 15 980, Bit14 (974~986) 13 980,
1844 16:34:25.195047 TX Bit7 (974~987) 14 980, Bit15 (976~990) 15 983,
1845 16:34:25.195138
1846 16:34:25.195229 Write Rank1 MR14 =0x4
1847 16:34:25.195319
1848 16:34:25.195424 CH=0, VrefRange= 0, VrefLevel = 4
1849 16:34:25.195491 TX Bit0 (976~991) 16 983, Bit8 (969~983) 15 976,
1850 16:34:25.195552 TX Bit1 (975~987) 13 981, Bit9 (971~986) 16 978,
1851 16:34:25.195640 TX Bit2 (976~989) 14 982, Bit10 (976~990) 15 983,
1852 16:34:25.195728 TX Bit3 (969~984) 16 976, Bit11 (970~984) 15 977,
1853 16:34:25.195790 TX Bit4 (974~990) 17 982, Bit12 (972~986) 15 979,
1854 16:34:25.195849 TX Bit5 (971~986) 16 978, Bit13 (974~984) 11 979,
1855 16:34:25.195932 TX Bit6 (972~987) 16 979, Bit14 (973~987) 15 980,
1856 16:34:25.196039 TX Bit7 (974~988) 15 981, Bit15 (975~990) 16 982,
1857 16:34:25.196170
1858 16:34:25.196241 Write Rank1 MR14 =0x6
1859 16:34:25.196307
1860 16:34:25.196377 CH=0, VrefRange= 0, VrefLevel = 6
1861 16:34:25.196453 TX Bit0 (976~991) 16 983, Bit8 (968~984) 17 976,
1862 16:34:25.196523 TX Bit1 (975~988) 14 981, Bit9 (970~987) 18 978,
1863 16:34:25.196618 TX Bit2 (976~991) 16 983, Bit10 (976~991) 16 983,
1864 16:34:25.196680 TX Bit3 (969~984) 16 976, Bit11 (969~984) 16 976,
1865 16:34:25.196742 TX Bit4 (974~990) 17 982, Bit12 (972~987) 16 979,
1866 16:34:25.196804 TX Bit5 (970~987) 18 978, Bit13 (974~985) 12 979,
1867 16:34:25.196864 TX Bit6 (972~989) 18 980, Bit14 (973~987) 15 980,
1868 16:34:25.196923 TX Bit7 (973~990) 18 981, Bit15 (975~991) 17 983,
1869 16:34:25.196992
1870 16:34:25.197052 wait MRW command Rank1 MR14 =0x8 fired (1)
1871 16:34:25.197123 Write Rank1 MR14 =0x8
1872 16:34:25.197190
1873 16:34:25.197286 CH=0, VrefRange= 0, VrefLevel = 8
1874 16:34:25.197378 TX Bit0 (975~992) 18 983, Bit8 (968~984) 17 976,
1875 16:34:25.197475 TX Bit1 (974~989) 16 981, Bit9 (970~987) 18 978,
1876 16:34:25.197568 TX Bit2 (976~991) 16 983, Bit10 (976~991) 16 983,
1877 16:34:25.197660 TX Bit3 (969~985) 17 977, Bit11 (969~984) 16 976,
1878 16:34:25.197756 TX Bit4 (974~991) 18 982, Bit12 (972~988) 17 980,
1879 16:34:25.197848 TX Bit5 (970~987) 18 978, Bit13 (973~985) 13 979,
1880 16:34:25.197940 TX Bit6 (972~990) 19 981, Bit14 (972~989) 18 980,
1881 16:34:25.198036 TX Bit7 (973~991) 19 982, Bit15 (975~991) 17 983,
1882 16:34:25.198133
1883 16:34:25.198223 Write Rank1 MR14 =0xa
1884 16:34:25.198314
1885 16:34:25.198405 CH=0, VrefRange= 0, VrefLevel = 10
1886 16:34:25.198497 TX Bit0 (975~992) 18 983, Bit8 (968~985) 18 976,
1887 16:34:25.198563 TX Bit1 (974~991) 18 982, Bit9 (969~988) 20 978,
1888 16:34:25.198623 TX Bit2 (975~991) 17 983, Bit10 (975~992) 18 983,
1889 16:34:25.198693 TX Bit3 (968~985) 18 976, Bit11 (968~985) 18 976,
1890 16:34:25.198782 TX Bit4 (974~991) 18 982, Bit12 (971~989) 19 980,
1891 16:34:25.198881 TX Bit5 (970~987) 18 978, Bit13 (972~986) 15 979,
1892 16:34:25.198979 TX Bit6 (971~990) 20 980, Bit14 (972~989) 18 980,
1893 16:34:25.199072 TX Bit7 (973~991) 19 982, Bit15 (975~992) 18 983,
1894 16:34:25.199173
1895 16:34:25.199265 Write Rank1 MR14 =0xc
1896 16:34:25.199355
1897 16:34:25.199452 CH=0, VrefRange= 0, VrefLevel = 12
1898 16:34:25.199515 TX Bit0 (975~992) 18 983, Bit8 (968~985) 18 976,
1899 16:34:25.199593 TX Bit1 (974~991) 18 982, Bit9 (969~989) 21 979,
1900 16:34:25.199657 TX Bit2 (975~992) 18 983, Bit10 (975~992) 18 983,
1901 16:34:25.199717 TX Bit3 (968~986) 19 977, Bit11 (968~986) 19 977,
1902 16:34:25.199777 TX Bit4 (973~991) 19 982, Bit12 (970~989) 20 979,
1903 16:34:25.199837 TX Bit5 (970~989) 20 979, Bit13 (972~987) 16 979,
1904 16:34:25.199897 TX Bit6 (971~990) 20 980, Bit14 (971~990) 20 980,
1905 16:34:25.199963 TX Bit7 (972~991) 20 981, Bit15 (975~992) 18 983,
1906 16:34:25.200025
1907 16:34:25.200084 Write Rank1 MR14 =0xe
1908 16:34:25.200143
1909 16:34:25.200202 CH=0, VrefRange= 0, VrefLevel = 14
1910 16:34:25.200262 TX Bit0 (975~993) 19 984, Bit8 (968~986) 19 977,
1911 16:34:25.200332 TX Bit1 (973~991) 19 982, Bit9 (969~989) 21 979,
1912 16:34:25.200392 TX Bit2 (975~992) 18 983, Bit10 (975~993) 19 984,
1913 16:34:25.200452 TX Bit3 (968~987) 20 977, Bit11 (968~987) 20 977,
1914 16:34:25.200512 TX Bit4 (972~992) 21 982, Bit12 (970~990) 21 980,
1915 16:34:25.200571 TX Bit5 (970~990) 21 980, Bit13 (971~988) 18 979,
1916 16:34:25.200631 TX Bit6 (970~991) 22 980, Bit14 (970~990) 21 980,
1917 16:34:25.200690 TX Bit7 (972~991) 20 981, Bit15 (974~992) 19 983,
1918 16:34:25.200749
1919 16:34:25.200807 Write Rank1 MR14 =0x10
1920 16:34:25.200866
1921 16:34:25.200924 CH=0, VrefRange= 0, VrefLevel = 16
1922 16:34:25.200993 TX Bit0 (975~993) 19 984, Bit8 (968~987) 20 977,
1923 16:34:25.201053 TX Bit1 (973~992) 20 982, Bit9 (969~990) 22 979,
1924 16:34:25.201112 TX Bit2 (975~992) 18 983, Bit10 (975~993) 19 984,
1925 16:34:25.201172 TX Bit3 (968~987) 20 977, Bit11 (968~988) 21 978,
1926 16:34:25.201233 TX Bit4 (972~992) 21 982, Bit12 (970~990) 21 980,
1927 16:34:25.201293 TX Bit5 (969~990) 22 979, Bit13 (970~989) 20 979,
1928 16:34:25.201352 TX Bit6 (970~991) 22 980, Bit14 (970~990) 21 980,
1929 16:34:25.201411 TX Bit7 (971~992) 22 981, Bit15 (974~993) 20 983,
1930 16:34:25.201474
1931 16:34:25.201574 Write Rank1 MR14 =0x12
1932 16:34:25.201665
1933 16:34:25.201756 CH=0, VrefRange= 0, VrefLevel = 18
1934 16:34:25.202071 TX Bit0 (974~993) 20 983, Bit8 (967~987) 21 977,
1935 16:34:25.202177 TX Bit1 (973~992) 20 982, Bit9 (968~990) 23 979,
1936 16:34:25.202272 TX Bit2 (974~993) 20 983, Bit10 (974~994) 21 984,
1937 16:34:25.202373 TX Bit3 (968~988) 21 978, Bit11 (968~988) 21 978,
1938 16:34:25.202468 TX Bit4 (972~992) 21 982, Bit12 (969~990) 22 979,
1939 16:34:25.202560 TX Bit5 (969~990) 22 979, Bit13 (971~989) 19 980,
1940 16:34:25.202653 TX Bit6 (970~991) 22 980, Bit14 (970~991) 22 980,
1941 16:34:25.202746 TX Bit7 (971~992) 22 981, Bit15 (973~994) 22 983,
1942 16:34:25.368454
1943 16:34:25.368635 Write Rank1 MR14 =0x14
1944 16:34:25.368713
1945 16:34:25.368781 CH=0, VrefRange= 0, VrefLevel = 20
1946 16:34:25.368846 TX Bit0 (974~994) 21 984, Bit8 (967~987) 21 977,
1947 16:34:25.368910 TX Bit1 (972~992) 21 982, Bit9 (968~990) 23 979,
1948 16:34:25.368973 TX Bit2 (975~993) 19 984, Bit10 (974~994) 21 984,
1949 16:34:25.369035 TX Bit3 (967~988) 22 977, Bit11 (968~988) 21 978,
1950 16:34:25.369095 TX Bit4 (971~992) 22 981, Bit12 (969~991) 23 980,
1951 16:34:25.369156 TX Bit5 (969~991) 23 980, Bit13 (970~990) 21 980,
1952 16:34:25.369216 TX Bit6 (970~992) 23 981, Bit14 (969~991) 23 980,
1953 16:34:25.369275 TX Bit7 (971~993) 23 982, Bit15 (973~994) 22 983,
1954 16:34:25.369335
1955 16:34:25.369456 Write Rank1 MR14 =0x16
1956 16:34:25.369564
1957 16:34:25.369681 CH=0, VrefRange= 0, VrefLevel = 22
1958 16:34:25.369794 TX Bit0 (974~994) 21 984, Bit8 (967~989) 23 978,
1959 16:34:25.369911 TX Bit1 (973~992) 20 982, Bit9 (968~991) 24 979,
1960 16:34:25.370021 TX Bit2 (974~993) 20 983, Bit10 (974~995) 22 984,
1961 16:34:25.370140 TX Bit3 (967~989) 23 978, Bit11 (968~989) 22 978,
1962 16:34:25.370272 TX Bit4 (971~993) 23 982, Bit12 (969~991) 23 980,
1963 16:34:25.370398 TX Bit5 (969~991) 23 980, Bit13 (970~990) 21 980,
1964 16:34:25.370522 TX Bit6 (969~992) 24 980, Bit14 (969~991) 23 980,
1965 16:34:25.370661 TX Bit7 (970~993) 24 981, Bit15 (974~995) 22 984,
1966 16:34:25.370771
1967 16:34:25.370871 Write Rank1 MR14 =0x18
1968 16:34:25.370982
1969 16:34:25.371101 CH=0, VrefRange= 0, VrefLevel = 24
1970 16:34:25.371217 TX Bit0 (974~995) 22 984, Bit8 (967~990) 24 978,
1971 16:34:25.371325 TX Bit1 (971~993) 23 982, Bit9 (968~991) 24 979,
1972 16:34:25.371443 TX Bit2 (974~994) 21 984, Bit10 (974~995) 22 984,
1973 16:34:25.371550 TX Bit3 (967~990) 24 978, Bit11 (967~990) 24 978,
1974 16:34:25.371662 TX Bit4 (970~993) 24 981, Bit12 (969~991) 23 980,
1975 16:34:25.371770 TX Bit5 (969~991) 23 980, Bit13 (969~990) 22 979,
1976 16:34:25.371874 TX Bit6 (969~993) 25 981, Bit14 (969~992) 24 980,
1977 16:34:25.371975 TX Bit7 (970~993) 24 981, Bit15 (973~995) 23 984,
1978 16:34:25.372073
1979 16:34:25.372171 Write Rank1 MR14 =0x1a
1980 16:34:25.372269
1981 16:34:25.372383 CH=0, VrefRange= 0, VrefLevel = 26
1982 16:34:25.372506 TX Bit0 (974~995) 22 984, Bit8 (966~990) 25 978,
1983 16:34:25.372632 TX Bit1 (971~994) 24 982, Bit9 (968~991) 24 979,
1984 16:34:25.372760 TX Bit2 (973~995) 23 984, Bit10 (973~996) 24 984,
1985 16:34:25.372881 TX Bit3 (967~990) 24 978, Bit11 (967~990) 24 978,
1986 16:34:25.373005 TX Bit4 (970~993) 24 981, Bit12 (969~992) 24 980,
1987 16:34:25.373122 TX Bit5 (969~991) 23 980, Bit13 (969~990) 22 979,
1988 16:34:25.373253 TX Bit6 (969~992) 24 980, Bit14 (969~992) 24 980,
1989 16:34:25.373387 TX Bit7 (970~994) 25 982, Bit15 (972~995) 24 983,
1990 16:34:25.373517
1991 16:34:25.373613 Write Rank1 MR14 =0x1c
1992 16:34:25.373712
1993 16:34:25.373800 CH=0, VrefRange= 0, VrefLevel = 28
1994 16:34:25.373906 TX Bit0 (973~996) 24 984, Bit8 (967~990) 24 978,
1995 16:34:25.374026 TX Bit1 (971~994) 24 982, Bit9 (968~991) 24 979,
1996 16:34:25.374137 TX Bit2 (973~995) 23 984, Bit10 (973~996) 24 984,
1997 16:34:25.374249 TX Bit3 (967~991) 25 979, Bit11 (967~990) 24 978,
1998 16:34:25.374379 TX Bit4 (969~994) 26 981, Bit12 (969~992) 24 980,
1999 16:34:25.374490 TX Bit5 (968~992) 25 980, Bit13 (969~991) 23 980,
2000 16:34:25.374597 TX Bit6 (969~993) 25 981, Bit14 (969~993) 25 981,
2001 16:34:25.374703 TX Bit7 (970~994) 25 982, Bit15 (972~996) 25 984,
2002 16:34:25.374799
2003 16:34:25.374891 Write Rank1 MR14 =0x1e
2004 16:34:25.374989
2005 16:34:25.375101 CH=0, VrefRange= 0, VrefLevel = 30
2006 16:34:25.375200 TX Bit0 (972~996) 25 984, Bit8 (966~990) 25 978,
2007 16:34:25.375297 TX Bit1 (971~994) 24 982, Bit9 (968~991) 24 979,
2008 16:34:25.375390 TX Bit2 (973~995) 23 984, Bit10 (973~997) 25 985,
2009 16:34:25.375466 TX Bit3 (966~991) 26 978, Bit11 (967~990) 24 978,
2010 16:34:25.375551 TX Bit4 (970~994) 25 982, Bit12 (968~992) 25 980,
2011 16:34:25.375629 TX Bit5 (968~992) 25 980, Bit13 (969~991) 23 980,
2012 16:34:25.375694 TX Bit6 (969~993) 25 981, Bit14 (968~993) 26 980,
2013 16:34:25.375755 TX Bit7 (970~994) 25 982, Bit15 (971~996) 26 983,
2014 16:34:25.375814
2015 16:34:25.375873 Write Rank1 MR14 =0x20
2016 16:34:25.375935
2017 16:34:25.375995 CH=0, VrefRange= 0, VrefLevel = 32
2018 16:34:25.376053 TX Bit0 (972~997) 26 984, Bit8 (967~990) 24 978,
2019 16:34:25.376113 TX Bit1 (971~995) 25 983, Bit9 (968~991) 24 979,
2020 16:34:25.376171 TX Bit2 (972~996) 25 984, Bit10 (972~997) 26 984,
2021 16:34:25.376231 TX Bit3 (966~991) 26 978, Bit11 (967~991) 25 979,
2022 16:34:25.376290 TX Bit4 (970~995) 26 982, Bit12 (968~992) 25 980,
2023 16:34:25.376350 TX Bit5 (968~992) 25 980, Bit13 (968~991) 24 979,
2024 16:34:25.376409 TX Bit6 (968~993) 26 980, Bit14 (968~992) 25 980,
2025 16:34:25.376470 TX Bit7 (970~995) 26 982, Bit15 (971~995) 25 983,
2026 16:34:25.376569
2027 16:34:25.376670 Write Rank1 MR14 =0x22
2028 16:34:25.376754
2029 16:34:25.376817 CH=0, VrefRange= 0, VrefLevel = 34
2030 16:34:25.376877 TX Bit0 (972~997) 26 984, Bit8 (967~990) 24 978,
2031 16:34:25.376939 TX Bit1 (971~995) 25 983, Bit9 (968~991) 24 979,
2032 16:34:25.377000 TX Bit2 (972~996) 25 984, Bit10 (972~997) 26 984,
2033 16:34:25.377060 TX Bit3 (966~991) 26 978, Bit11 (967~991) 25 979,
2034 16:34:25.377332 TX Bit4 (970~995) 26 982, Bit12 (968~992) 25 980,
2035 16:34:25.377398 TX Bit5 (968~992) 25 980, Bit13 (968~991) 24 979,
2036 16:34:25.377458 TX Bit6 (968~993) 26 980, Bit14 (968~992) 25 980,
2037 16:34:25.377519 TX Bit7 (970~995) 26 982, Bit15 (971~995) 25 983,
2038 16:34:25.377590
2039 16:34:25.377689 Write Rank1 MR14 =0x24
2040 16:34:25.377777
2041 16:34:25.377840 CH=0, VrefRange= 0, VrefLevel = 36
2042 16:34:25.377901 TX Bit0 (972~997) 26 984, Bit8 (967~990) 24 978,
2043 16:34:25.377961 TX Bit1 (971~995) 25 983, Bit9 (968~991) 24 979,
2044 16:34:25.378033 TX Bit2 (972~996) 25 984, Bit10 (972~997) 26 984,
2045 16:34:25.378133 TX Bit3 (966~991) 26 978, Bit11 (967~991) 25 979,
2046 16:34:25.378219 TX Bit4 (970~995) 26 982, Bit12 (968~992) 25 980,
2047 16:34:25.378282 TX Bit5 (968~992) 25 980, Bit13 (968~991) 24 979,
2048 16:34:25.378341 TX Bit6 (968~993) 26 980, Bit14 (968~992) 25 980,
2049 16:34:25.378401 TX Bit7 (970~995) 26 982, Bit15 (971~995) 25 983,
2050 16:34:25.378459
2051 16:34:25.378519 Write Rank1 MR14 =0x26
2052 16:34:25.378578
2053 16:34:25.378636 CH=0, VrefRange= 0, VrefLevel = 38
2054 16:34:25.378695 TX Bit0 (972~997) 26 984, Bit8 (967~990) 24 978,
2055 16:34:25.378755 TX Bit1 (971~995) 25 983, Bit9 (968~991) 24 979,
2056 16:34:25.378813 TX Bit2 (972~996) 25 984, Bit10 (972~997) 26 984,
2057 16:34:25.378872 TX Bit3 (966~991) 26 978, Bit11 (967~991) 25 979,
2058 16:34:25.378930 TX Bit4 (970~995) 26 982, Bit12 (968~992) 25 980,
2059 16:34:25.378988 TX Bit5 (968~992) 25 980, Bit13 (968~991) 24 979,
2060 16:34:25.379047 TX Bit6 (968~993) 26 980, Bit14 (968~992) 25 980,
2061 16:34:25.379105 TX Bit7 (970~995) 26 982, Bit15 (971~995) 25 983,
2062 16:34:25.379164
2063 16:34:25.379222
2064 16:34:25.379279 TX Vref found, early break! 375< 382
2065 16:34:25.379337 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2066 16:34:25.379397 u1DelayCellOfst[0]=7 cells (6 PI)
2067 16:34:25.379469 u1DelayCellOfst[1]=6 cells (5 PI)
2068 16:34:25.379528 u1DelayCellOfst[2]=7 cells (6 PI)
2069 16:34:25.379587 u1DelayCellOfst[3]=0 cells (0 PI)
2070 16:34:25.379645 u1DelayCellOfst[4]=5 cells (4 PI)
2071 16:34:25.379703 u1DelayCellOfst[5]=2 cells (2 PI)
2072 16:34:25.379761 u1DelayCellOfst[6]=2 cells (2 PI)
2073 16:34:25.379818 u1DelayCellOfst[7]=5 cells (4 PI)
2074 16:34:25.379876 Byte0, DQ PI dly=978, DQM PI dly= 981
2075 16:34:25.379935 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2076 16:34:25.379995
2077 16:34:25.380053 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2078 16:34:25.380111
2079 16:34:25.380169 u1DelayCellOfst[8]=0 cells (0 PI)
2080 16:34:25.380227 u1DelayCellOfst[9]=1 cells (1 PI)
2081 16:34:25.380285 u1DelayCellOfst[10]=7 cells (6 PI)
2082 16:34:25.380343 u1DelayCellOfst[11]=1 cells (1 PI)
2083 16:34:25.380401 u1DelayCellOfst[12]=2 cells (2 PI)
2084 16:34:25.380459 u1DelayCellOfst[13]=1 cells (1 PI)
2085 16:34:25.380516 u1DelayCellOfst[14]=2 cells (2 PI)
2086 16:34:25.380574 u1DelayCellOfst[15]=6 cells (5 PI)
2087 16:34:25.380632 Byte1, DQ PI dly=978, DQM PI dly= 981
2088 16:34:25.380690 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2089 16:34:25.380748
2090 16:34:25.380806 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2091 16:34:25.380865
2092 16:34:25.380923 Write Rank1 MR14 =0x20
2093 16:34:25.380981
2094 16:34:25.381039 Final TX Range 0 Vref 32
2095 16:34:25.381096
2096 16:34:25.381154 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2097 16:34:25.381213
2098 16:34:25.381271 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2099 16:34:25.381332 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2100 16:34:25.381391 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2101 16:34:25.381451 Write Rank1 MR3 =0xb0
2102 16:34:25.381510 DramC Write-DBI on
2103 16:34:25.381567 ==
2104 16:34:25.381626 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2105 16:34:25.381693 fsp= 1, odt_onoff= 1, Byte mode= 0
2106 16:34:25.381779 ==
2107 16:34:25.381839 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2108 16:34:25.381899
2109 16:34:25.381958 Begin, DQ Scan Range 701~765
2110 16:34:25.382017
2111 16:34:25.382075
2112 16:34:25.382132 TX Vref Scan disable
2113 16:34:25.382192 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2114 16:34:25.382252 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2115 16:34:25.382311 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2116 16:34:25.382371 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2117 16:34:25.382430 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2118 16:34:25.382489 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2119 16:34:25.382548 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2120 16:34:25.382608 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2121 16:34:25.382668 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2122 16:34:25.382727 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2123 16:34:25.382786 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2124 16:34:25.382846 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2125 16:34:25.382905 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2126 16:34:25.382964 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2127 16:34:25.383024 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2128 16:34:25.383083 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2129 16:34:25.383143 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2130 16:34:25.383202 740 |2 6 36|[0] xxxxxxxx xxxxxxxx [MSB]
2131 16:34:25.383261 Byte0, DQ PI dly=726, DQM PI dly= 726
2132 16:34:25.383320 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 22)
2133 16:34:25.383378
2134 16:34:25.383452 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 22)
2135 16:34:25.383512
2136 16:34:25.383569 Byte1, DQ PI dly=723, DQM PI dly= 723
2137 16:34:25.383628 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2138 16:34:25.383686
2139 16:34:25.383744 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2140 16:34:25.383802
2141 16:34:25.383860 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2142 16:34:25.383919 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2143 16:34:25.383978 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2144 16:34:25.384037 Write Rank1 MR3 =0x30
2145 16:34:25.384095 DramC Write-DBI off
2146 16:34:25.384153
2147 16:34:25.384210 [DATLAT]
2148 16:34:25.384268 Freq=1600, CH0 RK1, use_rxtx_scan=0
2149 16:34:25.384327
2150 16:34:25.384587 DATLAT Default: 0x10
2151 16:34:25.384655 7, 0xFFFF, sum=0
2152 16:34:25.384716 8, 0xFFFF, sum=0
2153 16:34:25.384808 9, 0xFFFF, sum=0
2154 16:34:25.384872 10, 0xFFFF, sum=0
2155 16:34:25.384932 11, 0xFFFF, sum=0
2156 16:34:25.384992 12, 0xFFFF, sum=0
2157 16:34:25.385051 13, 0xFFFF, sum=0
2158 16:34:25.385111 14, 0x0, sum=1
2159 16:34:25.385169 15, 0x0, sum=2
2160 16:34:25.385228 16, 0x0, sum=3
2161 16:34:25.385286 17, 0x0, sum=4
2162 16:34:25.385345 pattern=2 first_step=14 total pass=5 best_step=16
2163 16:34:25.385403 ==
2164 16:34:25.385462 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2165 16:34:25.385520 fsp= 1, odt_onoff= 1, Byte mode= 0
2166 16:34:25.385579 ==
2167 16:34:25.385637 Start DQ dly to find pass range UseTestEngine =1
2168 16:34:25.385695 x-axis: bit #, y-axis: DQ dly (-127~63)
2169 16:34:25.385755 RX Vref Scan = 0
2170 16:34:25.385813 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2171 16:34:25.385873 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2172 16:34:25.385933 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2173 16:34:25.385992 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2174 16:34:25.386051 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2175 16:34:25.386110 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2176 16:34:25.386168 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2177 16:34:25.386227 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2178 16:34:25.386286 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2179 16:34:25.386344 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2180 16:34:25.386403 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2181 16:34:25.386463 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2182 16:34:25.386521 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2183 16:34:25.386580 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2184 16:34:25.386638 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2185 16:34:25.386696 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2186 16:34:25.386756 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2187 16:34:25.386815 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2188 16:34:25.386874 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2189 16:34:25.386933 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2190 16:34:25.386992 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2191 16:34:25.387052 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2192 16:34:25.387111 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2193 16:34:25.387170 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2194 16:34:25.387229 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2195 16:34:25.387288 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2196 16:34:25.387347 0, [0] xxxoxxxx oxxoxxxx [MSB]
2197 16:34:25.387416 1, [0] xxxoxoxx ooxooxxx [MSB]
2198 16:34:25.387479 2, [0] xxxoxoxx ooxoooxx [MSB]
2199 16:34:25.387537 3, [0] xxxoxooo ooxoooox [MSB]
2200 16:34:25.387597 4, [0] xxxoxooo ooxoooox [MSB]
2201 16:34:25.387655 5, [0] ooxooooo ooxoooox [MSB]
2202 16:34:25.387715 6, [0] oooooooo ooxooooo [MSB]
2203 16:34:25.387773 33, [0] oooooooo xooooooo [MSB]
2204 16:34:25.387833 34, [0] oooxoooo xooooooo [MSB]
2205 16:34:25.387891 35, [0] oooxoxoo xooxoooo [MSB]
2206 16:34:25.387950 36, [0] oooxoxoo xooxoxoo [MSB]
2207 16:34:25.388008 37, [0] oooxoxoo xxoxoxoo [MSB]
2208 16:34:25.388067 38, [0] oooxoxxo xxoxxxxo [MSB]
2209 16:34:25.388126 39, [0] oxxxoxxx xxoxxxxo [MSB]
2210 16:34:25.388185 40, [0] oxxxxxxx xxoxxxxx [MSB]
2211 16:34:25.388243 41, [0] xxxxxxxx xxoxxxxx [MSB]
2212 16:34:25.388302 42, [0] xxxxxxxx xxoxxxxx [MSB]
2213 16:34:25.388395 43, [0] xxxxxxxx xxoxxxxx [MSB]
2214 16:34:25.388457 44, [0] xxxxxxxx xxxxxxxx [MSB]
2215 16:34:25.388517 iDelay=44, Bit 0, Center 22 (5 ~ 40) 36
2216 16:34:25.388575 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2217 16:34:25.388633 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2218 16:34:25.388691 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2219 16:34:25.388750 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
2220 16:34:25.388808 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2221 16:34:25.388867 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2222 16:34:25.388925 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2223 16:34:25.388983 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
2224 16:34:25.389041 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2225 16:34:25.389099 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2226 16:34:25.389157 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2227 16:34:25.389215 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2228 16:34:25.389273 iDelay=44, Bit 13, Center 18 (2 ~ 35) 34
2229 16:34:25.389331 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
2230 16:34:25.389389 iDelay=44, Bit 15, Center 22 (6 ~ 39) 34
2231 16:34:25.389447 ==
2232 16:34:25.389505 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2233 16:34:25.389564 fsp= 1, odt_onoff= 1, Byte mode= 0
2234 16:34:25.389622 ==
2235 16:34:25.389681 DQS Delay:
2236 16:34:25.389739 DQS0 = 0, DQS1 = 0
2237 16:34:25.389798 DQM Delay:
2238 16:34:25.389856 DQM0 = 19, DQM1 = 19
2239 16:34:25.389914 DQ Delay:
2240 16:34:25.389972 DQ0 =22, DQ1 =21, DQ2 =22, DQ3 =15
2241 16:34:25.390031 DQ4 =22, DQ5 =17, DQ6 =20, DQ7 =20
2242 16:34:25.390089 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
2243 16:34:25.390162 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
2244 16:34:25.390225
2245 16:34:25.390284
2246 16:34:25.390342
2247 16:34:25.390399 [DramC_TX_OE_Calibration] TA2
2248 16:34:25.391887 Original DQ_B0 (3 6) =30, OEN = 27
2249 16:34:25.395222 Original DQ_B1 (3 6) =30, OEN = 27
2250 16:34:25.398743 23, 0x0, End_B0=23 End_B1=23
2251 16:34:25.401562 24, 0x0, End_B0=24 End_B1=24
2252 16:34:25.401653 25, 0x0, End_B0=25 End_B1=25
2253 16:34:25.405055 26, 0x0, End_B0=26 End_B1=26
2254 16:34:25.408433 27, 0x0, End_B0=27 End_B1=27
2255 16:34:25.411630 28, 0x0, End_B0=28 End_B1=28
2256 16:34:25.414722 29, 0x0, End_B0=29 End_B1=29
2257 16:34:25.414813 30, 0x0, End_B0=30 End_B1=30
2258 16:34:25.418086 31, 0xFFFF, End_B0=30 End_B1=30
2259 16:34:25.425073 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2260 16:34:25.428596 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2261 16:34:25.431569
2262 16:34:25.431687
2263 16:34:25.431762 Write Rank1 MR23 =0x3f
2264 16:34:25.431829 [DQSOSC]
2265 16:34:25.441426 [DQSOSCAuto] RK1, (LSB)MR18= 0xd6d6, (MSB)MR19= 0x202, tDQSOscB0 = 433 ps tDQSOscB1 = 433 ps
2266 16:34:25.448198 CH0_RK1: MR19=0x202, MR18=0xD6D6, DQSOSC=433, MR23=63, INC=13, DEC=19
2267 16:34:25.448347 Write Rank1 MR23 =0x3f
2268 16:34:25.452017 [DQSOSC]
2269 16:34:25.458555 [DQSOSCAuto] RK1, (LSB)MR18= 0xd6d6, (MSB)MR19= 0x202, tDQSOscB0 = 433 ps tDQSOscB1 = 433 ps
2270 16:34:25.461702 CH0 RK1: MR19=202, MR18=D6D6
2271 16:34:25.465244 [RxdqsGatingPostProcess] freq 1600
2272 16:34:25.468374 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2273 16:34:25.472147 Rank: 0
2274 16:34:25.472278 best DQS0 dly(2T, 0.5T) = (2, 5)
2275 16:34:25.475166 best DQS1 dly(2T, 0.5T) = (2, 5)
2276 16:34:25.478746 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2277 16:34:25.481766 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2278 16:34:25.485115 Rank: 1
2279 16:34:25.485223 best DQS0 dly(2T, 0.5T) = (2, 6)
2280 16:34:25.488184 best DQS1 dly(2T, 0.5T) = (2, 6)
2281 16:34:25.491792 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2282 16:34:25.495352 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2283 16:34:25.501675 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2284 16:34:25.504823 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2285 16:34:25.508536 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2286 16:34:25.511762 Write Rank0 MR13 =0x59
2287 16:34:25.511861 ==
2288 16:34:25.514851 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2289 16:34:25.518292 fsp= 1, odt_onoff= 1, Byte mode= 0
2290 16:34:25.518409 ==
2291 16:34:25.521675 === u2Vref_new: 0x56 --> 0x3a
2292 16:34:25.525393 === u2Vref_new: 0x58 --> 0x58
2293 16:34:25.528778 === u2Vref_new: 0x5a --> 0x5a
2294 16:34:25.531838 === u2Vref_new: 0x5c --> 0x78
2295 16:34:25.535028 === u2Vref_new: 0x5e --> 0x7a
2296 16:34:25.538084 === u2Vref_new: 0x60 --> 0x90
2297 16:34:25.541630 [CA 0] Center 38 (13~63) winsize 51
2298 16:34:25.544870 [CA 1] Center 37 (12~63) winsize 52
2299 16:34:25.548328 [CA 2] Center 34 (6~63) winsize 58
2300 16:34:25.551569 [CA 3] Center 34 (6~63) winsize 58
2301 16:34:25.555248 [CA 4] Center 34 (6~63) winsize 58
2302 16:34:25.558483 [CA 5] Center 28 (-2~59) winsize 62
2303 16:34:25.558574
2304 16:34:25.561960 [CATrainingPosCal] consider 1 rank data
2305 16:34:25.565086 u2DelayCellTimex100 = 735/100 ps
2306 16:34:25.568177 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2307 16:34:25.571334 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2308 16:34:25.575197 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2309 16:34:25.578356 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2310 16:34:25.581848 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2311 16:34:25.584958 CA5 delay=28 (-2~59),Diff = 0 PI (0 cell)
2312 16:34:25.585105
2313 16:34:25.588397 CA PerBit enable=1, Macro0, CA PI delay=28
2314 16:34:25.591429 === u2Vref_new: 0x60 --> 0x90
2315 16:34:25.591587
2316 16:34:25.595179 Vref(ca) range 1: 32
2317 16:34:25.595290
2318 16:34:25.595390 CS Dly= 11 (42-0-32)
2319 16:34:25.598300 Write Rank0 MR13 =0xd8
2320 16:34:25.601884 Write Rank0 MR13 =0xd8
2321 16:34:25.601975 Write Rank0 MR12 =0x60
2322 16:34:25.605426 Write Rank1 MR13 =0x59
2323 16:34:25.605516 ==
2324 16:34:25.611855 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2325 16:34:25.611946 fsp= 1, odt_onoff= 1, Byte mode= 0
2326 16:34:25.615020 ==
2327 16:34:25.615110 === u2Vref_new: 0x56 --> 0x3a
2328 16:34:25.618721 === u2Vref_new: 0x58 --> 0x58
2329 16:34:25.621901 === u2Vref_new: 0x5a --> 0x5a
2330 16:34:25.625003 === u2Vref_new: 0x5c --> 0x78
2331 16:34:25.628630 === u2Vref_new: 0x5e --> 0x7a
2332 16:34:25.632058 === u2Vref_new: 0x60 --> 0x90
2333 16:34:25.634986 [CA 0] Center 37 (12~63) winsize 52
2334 16:34:25.638783 [CA 1] Center 37 (12~63) winsize 52
2335 16:34:25.641787 [CA 2] Center 35 (7~63) winsize 57
2336 16:34:25.644995 [CA 3] Center 34 (6~63) winsize 58
2337 16:34:25.648242 [CA 4] Center 34 (6~63) winsize 58
2338 16:34:25.651914 [CA 5] Center 27 (-2~57) winsize 60
2339 16:34:25.652002
2340 16:34:25.655274 [CATrainingPosCal] consider 2 rank data
2341 16:34:25.658793 u2DelayCellTimex100 = 735/100 ps
2342 16:34:25.661930 CA0 delay=38 (13~63),Diff = 11 PI (14 cell)
2343 16:34:25.665254 CA1 delay=37 (12~63),Diff = 10 PI (13 cell)
2344 16:34:25.668648 CA2 delay=35 (7~63),Diff = 8 PI (10 cell)
2345 16:34:25.672011 CA3 delay=34 (6~63),Diff = 7 PI (9 cell)
2346 16:34:25.674939 CA4 delay=34 (6~63),Diff = 7 PI (9 cell)
2347 16:34:25.678670 CA5 delay=27 (-2~57),Diff = 0 PI (0 cell)
2348 16:34:25.678780
2349 16:34:25.685538 CA PerBit enable=1, Macro0, CA PI delay=27
2350 16:34:25.685634 === u2Vref_new: 0x5e --> 0x7a
2351 16:34:25.685710
2352 16:34:25.688731 Vref(ca) range 1: 30
2353 16:34:25.688835
2354 16:34:25.691695 CS Dly= 11 (42-0-32)
2355 16:34:25.691799 Write Rank1 MR13 =0xd8
2356 16:34:25.694947 Write Rank1 MR13 =0xd8
2357 16:34:25.698740 Write Rank1 MR12 =0x5e
2358 16:34:25.701593 [RankSwap] Rank num 2, (Multi 1), Rank 0
2359 16:34:25.701720 Write Rank0 MR2 =0xad
2360 16:34:25.705379 [Write Leveling]
2361 16:34:25.708749 delay byte0 byte1 byte2 byte3
2362 16:34:25.708837
2363 16:34:25.708906 10 0 0
2364 16:34:25.708973 11 0 0
2365 16:34:25.711667 12 0 0
2366 16:34:25.711757 13 0 0
2367 16:34:25.714811 14 0 0
2368 16:34:25.714901 15 0 0
2369 16:34:25.718568 16 0 0
2370 16:34:25.718658 17 0 0
2371 16:34:25.718729 18 0 0
2372 16:34:25.721634 19 0 0
2373 16:34:25.721726 20 0 0
2374 16:34:25.725543 21 0 0
2375 16:34:25.725634 22 0 0
2376 16:34:25.725705 23 0 0
2377 16:34:25.728679 24 0 ff
2378 16:34:25.728769 25 0 ff
2379 16:34:25.731839 26 0 ff
2380 16:34:25.731928 27 0 ff
2381 16:34:25.735429 28 0 ff
2382 16:34:25.735520 29 0 ff
2383 16:34:25.735591 30 0 ff
2384 16:34:25.738745 31 0 ff
2385 16:34:25.738835 32 0 ff
2386 16:34:25.741787 33 ff ff
2387 16:34:25.741876 34 ff ff
2388 16:34:25.745644 35 ff ff
2389 16:34:25.745734 36 ff ff
2390 16:34:25.748671 37 ff ff
2391 16:34:25.748761 38 ff ff
2392 16:34:25.752422 39 ff ff
2393 16:34:25.755498 pass bytecount = 0xff (0xff: all bytes pass)
2394 16:34:25.755586
2395 16:34:25.755656 DQS0 dly: 33
2396 16:34:25.759039 DQS1 dly: 24
2397 16:34:25.759155 Write Rank0 MR2 =0x2d
2398 16:34:25.761944 [RankSwap] Rank num 2, (Multi 1), Rank 0
2399 16:34:25.765436 Write Rank0 MR1 =0xd6
2400 16:34:25.765524 [Gating]
2401 16:34:25.765595 ==
2402 16:34:25.771874 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2403 16:34:25.775370 fsp= 1, odt_onoff= 1, Byte mode= 0
2404 16:34:25.775488 ==
2405 16:34:25.778763 3 1 0 |3535 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2406 16:34:25.782376 3 1 4 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2407 16:34:25.788639 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2408 16:34:25.792106 3 1 12 |2221 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2409 16:34:25.795701 3 1 16 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2410 16:34:25.802110 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2411 16:34:25.805748 3 1 24 |3535 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2412 16:34:25.809083 3 1 28 |3535 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2413 16:34:25.812001 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2414 16:34:25.819183 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2415 16:34:25.822242 3 2 8 |3434 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2416 16:34:25.825899 3 2 12 |3434 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2417 16:34:25.832708 3 2 16 |3535 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2418 16:34:25.835754 3 2 20 |e0e 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2419 16:34:25.838869 3 2 24 |3d3d 201 |(11 11)(11 11) |(1 1)(0 0)| 0
2420 16:34:25.845525 3 2 28 |3e3d 1b1b |(11 11)(11 11) |(1 1)(0 0)| 0
2421 16:34:25.848990 3 3 0 |202 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2422 16:34:25.852444 3 3 4 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2423 16:34:25.856205 3 3 8 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2424 16:34:25.862398 3 3 12 |1716 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2425 16:34:25.865992 3 3 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2426 16:34:25.869400 3 3 20 |201 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2427 16:34:25.876276 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2428 16:34:25.879244 [Byte 0] Lead/lag falling Transition (3, 3, 24)
2429 16:34:25.882805 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2430 16:34:25.886419 [Byte 1] Lead/lag Transition tap number (1)
2431 16:34:25.893082 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2432 16:34:25.895903 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2433 16:34:25.899201 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2434 16:34:25.906273 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2435 16:34:25.909605 3 4 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2436 16:34:25.912757 3 4 20 |908 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2437 16:34:25.916174 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2438 16:34:25.922983 3 4 28 |3d3d 707 |(11 11)(11 11) |(1 1)(1 1)| 0
2439 16:34:25.926281 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2440 16:34:25.929806 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2441 16:34:25.936061 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2442 16:34:25.939779 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2443 16:34:25.942697 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2444 16:34:25.949648 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2445 16:34:25.952767 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2446 16:34:25.956149 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2447 16:34:25.962571 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2448 16:34:25.965796 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2449 16:34:25.969514 [Byte 0] Lead/lag falling Transition (3, 6, 4)
2450 16:34:25.972433 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2451 16:34:25.979336 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2452 16:34:25.982915 [Byte 0] Lead/lag Transition tap number (3)
2453 16:34:25.985727 3 6 16 |2726 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2454 16:34:25.989337 [Byte 1] Lead/lag falling Transition (3, 6, 16)
2455 16:34:25.996141 3 6 20 |3636 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2456 16:34:25.999716 [Byte 1] Lead/lag Transition tap number (2)
2457 16:34:26.002714 3 6 24 |4646 3c3b |(0 0)(11 11) |(0 0)(0 0)| 0
2458 16:34:26.006495 [Byte 0]First pass (3, 6, 24)
2459 16:34:26.009288 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2460 16:34:26.013162 [Byte 1]First pass (3, 6, 28)
2461 16:34:26.015759 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2462 16:34:26.019247 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2463 16:34:26.026046 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2464 16:34:26.029217 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2465 16:34:26.032456 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2466 16:34:26.036049 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2467 16:34:26.039181 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2468 16:34:26.046079 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2469 16:34:26.049011 All bytes gating window > 1UI, Early break!
2470 16:34:26.049423
2471 16:34:26.052129 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
2472 16:34:26.052540
2473 16:34:26.055929 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
2474 16:34:26.056379
2475 16:34:26.056705
2476 16:34:26.057009
2477 16:34:26.062628 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
2478 16:34:26.063093
2479 16:34:26.065462 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2480 16:34:26.065935
2481 16:34:26.066328
2482 16:34:26.066646 Write Rank0 MR1 =0x56
2483 16:34:26.068907
2484 16:34:26.069321 best RODT dly(2T, 0.5T) = (2, 3)
2485 16:34:26.069728
2486 16:34:26.072512 best RODT dly(2T, 0.5T) = (2, 3)
2487 16:34:26.072971 ==
2488 16:34:26.078880 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2489 16:34:26.082629 fsp= 1, odt_onoff= 1, Byte mode= 0
2490 16:34:26.083110 ==
2491 16:34:26.085817 Start DQ dly to find pass range UseTestEngine =0
2492 16:34:26.088903 x-axis: bit #, y-axis: DQ dly (-127~63)
2493 16:34:26.092227 RX Vref Scan = 0
2494 16:34:26.095946 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2495 16:34:26.096367 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2496 16:34:26.098862 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2497 16:34:26.102785 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2498 16:34:26.105774 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2499 16:34:26.109111 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2500 16:34:26.112499 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2501 16:34:26.115662 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2502 16:34:26.119381 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2503 16:34:26.119838 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2504 16:34:26.122247 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2505 16:34:26.125739 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2506 16:34:26.129087 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2507 16:34:26.132544 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2508 16:34:26.136005 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2509 16:34:26.138832 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2510 16:34:26.142702 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2511 16:34:26.143315 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2512 16:34:26.145795 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2513 16:34:26.148897 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2514 16:34:26.152653 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2515 16:34:26.155625 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2516 16:34:26.158963 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2517 16:34:26.162572 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2518 16:34:26.163041 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2519 16:34:26.165619 -1, [0] xxxoxxxx xoxxxxxo [MSB]
2520 16:34:26.169167 0, [0] xxxoxxxx xoxxxxxo [MSB]
2521 16:34:26.172629 1, [0] xxooxxxx ooxxxxxo [MSB]
2522 16:34:26.175645 2, [0] xxooxxxx oooxxxxo [MSB]
2523 16:34:26.178801 3, [0] xxooxxxo oooxxxxo [MSB]
2524 16:34:26.179220 4, [0] oxooxxxo oooxxxxo [MSB]
2525 16:34:26.182368 5, [0] oooooxoo ooooooxo [MSB]
2526 16:34:26.185654 6, [0] oooooooo ooooooxo [MSB]
2527 16:34:26.189388 31, [0] oooooooo ooooooox [MSB]
2528 16:34:26.192389 32, [0] oooooooo ooooooox [MSB]
2529 16:34:26.196020 33, [0] oooooooo ooooooox [MSB]
2530 16:34:26.198860 34, [0] oooooooo ooooooox [MSB]
2531 16:34:26.199286 35, [0] oooxoooo xxooooox [MSB]
2532 16:34:26.202150 36, [0] oooxoooo xxooooox [MSB]
2533 16:34:26.205786 37, [0] ooxxoooo xxooooox [MSB]
2534 16:34:26.208824 38, [0] ooxxoooo xxooooox [MSB]
2535 16:34:26.212380 39, [0] ooxxxoox xxooooox [MSB]
2536 16:34:26.215927 40, [0] oxxxxoox xxxoooox [MSB]
2537 16:34:26.218818 41, [0] xxxxxoox xxxxxxox [MSB]
2538 16:34:26.219303 42, [0] xxxxxxxx xxxxxxxx [MSB]
2539 16:34:26.222266 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
2540 16:34:26.229078 iDelay=42, Bit 1, Center 22 (5 ~ 39) 35
2541 16:34:26.232658 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
2542 16:34:26.235470 iDelay=42, Bit 3, Center 16 (-1 ~ 34) 36
2543 16:34:26.238829 iDelay=42, Bit 4, Center 21 (5 ~ 38) 34
2544 16:34:26.241844 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
2545 16:34:26.245713 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
2546 16:34:26.248565 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
2547 16:34:26.251727 iDelay=42, Bit 8, Center 17 (1 ~ 34) 34
2548 16:34:26.255383 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
2549 16:34:26.258651 iDelay=42, Bit 10, Center 20 (2 ~ 39) 38
2550 16:34:26.261757 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
2551 16:34:26.265556 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
2552 16:34:26.268723 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
2553 16:34:26.271802 iDelay=42, Bit 14, Center 24 (7 ~ 41) 35
2554 16:34:26.278888 iDelay=42, Bit 15, Center 13 (-3 ~ 30) 34
2555 16:34:26.279002 ==
2556 16:34:26.281896 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2557 16:34:26.285485 fsp= 1, odt_onoff= 1, Byte mode= 0
2558 16:34:26.285620 ==
2559 16:34:26.288718 DQS Delay:
2560 16:34:26.288842 DQS0 = 0, DQS1 = 0
2561 16:34:26.288942 DQM Delay:
2562 16:34:26.291776 DQM0 = 20, DQM1 = 19
2563 16:34:26.291899 DQ Delay:
2564 16:34:26.295565 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16
2565 16:34:26.298606 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
2566 16:34:26.302119 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
2567 16:34:26.305326 DQ12 =22, DQ13 =22, DQ14 =24, DQ15 =13
2568 16:34:26.305503
2569 16:34:26.305644
2570 16:34:26.308426 DramC Write-DBI off
2571 16:34:26.308634 ==
2572 16:34:26.312001 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2573 16:34:26.315349 fsp= 1, odt_onoff= 1, Byte mode= 0
2574 16:34:26.315632 ==
2575 16:34:26.322420 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2576 16:34:26.322823
2577 16:34:26.323236 Begin, DQ Scan Range 920~1176
2578 16:34:26.325444
2579 16:34:26.325898
2580 16:34:26.326228 TX Vref Scan disable
2581 16:34:26.329209 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
2582 16:34:26.332038 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2583 16:34:26.335399 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2584 16:34:26.339070 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2585 16:34:26.342226 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2586 16:34:26.348733 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2587 16:34:26.352110 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2588 16:34:26.355540 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2589 16:34:26.358684 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2590 16:34:26.362337 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2591 16:34:26.365398 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2592 16:34:26.369159 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2593 16:34:26.372328 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2594 16:34:26.375383 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2595 16:34:26.378499 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2596 16:34:26.382133 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2597 16:34:26.385503 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2598 16:34:26.388786 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2599 16:34:26.392091 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2600 16:34:26.395521 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2601 16:34:26.401793 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2602 16:34:26.405628 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2603 16:34:26.408657 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2604 16:34:26.411907 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2605 16:34:26.415049 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2606 16:34:26.418706 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2607 16:34:26.421565 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2608 16:34:26.425557 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2609 16:34:26.428698 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2610 16:34:26.432077 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2611 16:34:26.435063 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2612 16:34:26.438651 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2613 16:34:26.441648 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2614 16:34:26.445160 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2615 16:34:26.448607 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2616 16:34:26.452190 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2617 16:34:26.458766 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2618 16:34:26.461778 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2619 16:34:26.465159 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2620 16:34:26.468145 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2621 16:34:26.471839 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2622 16:34:26.475041 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2623 16:34:26.478286 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2624 16:34:26.481890 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2625 16:34:26.485150 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2626 16:34:26.488142 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2627 16:34:26.492011 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2628 16:34:26.494972 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2629 16:34:26.498421 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2630 16:34:26.501437 969 |3 6 9|[0] xxxxxxxx xxxxxxxo [MSB]
2631 16:34:26.504654 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2632 16:34:26.508297 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
2633 16:34:26.511281 972 |3 6 12|[0] xxxxxxxx oooxxxoo [MSB]
2634 16:34:26.514984 973 |3 6 13|[0] xxxxxxxx oooooxoo [MSB]
2635 16:34:26.518134 974 |3 6 14|[0] xxxxxxxx oooooxoo [MSB]
2636 16:34:26.521583 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2637 16:34:26.528382 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2638 16:34:26.531399 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2639 16:34:26.534724 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2640 16:34:26.538168 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2641 16:34:26.541633 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2642 16:34:26.544688 981 |3 6 21|[0] xooooxoo oooooooo [MSB]
2643 16:34:26.548338 982 |3 6 22|[0] oooooxoo oooooooo [MSB]
2644 16:34:26.551675 986 |3 6 26|[0] oooooooo ooooooox [MSB]
2645 16:34:26.554718 987 |3 6 27|[0] oooooooo ooooooox [MSB]
2646 16:34:26.557949 988 |3 6 28|[0] oooooooo oxooooox [MSB]
2647 16:34:26.561343 989 |3 6 29|[0] oooooooo xxooooox [MSB]
2648 16:34:26.564827 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
2649 16:34:26.567981 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2650 16:34:26.574427 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2651 16:34:26.578122 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2652 16:34:26.581249 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2653 16:34:26.584485 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2654 16:34:26.588026 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2655 16:34:26.591040 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2656 16:34:26.594734 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2657 16:34:26.597857 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2658 16:34:26.601005 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2659 16:34:26.604250 1001 |3 6 41|[0] ooxxoooo xxxxxxxx [MSB]
2660 16:34:26.607957 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2661 16:34:26.611059 Byte0, DQ PI dly=990, DQM PI dly= 990
2662 16:34:26.617759 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2663 16:34:26.618236
2664 16:34:26.620773 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2665 16:34:26.621139
2666 16:34:26.624482 Byte1, DQ PI dly=979, DQM PI dly= 979
2667 16:34:26.627630 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2668 16:34:26.628059
2669 16:34:26.634447 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2670 16:34:26.634917
2671 16:34:26.635260 ==
2672 16:34:26.637578 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2673 16:34:26.641285 fsp= 1, odt_onoff= 1, Byte mode= 0
2674 16:34:26.641701 ==
2675 16:34:26.647878 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2676 16:34:26.648322
2677 16:34:26.648723 Begin, DQ Scan Range 955~1019
2678 16:34:26.650682 Write Rank0 MR14 =0x0
2679 16:34:26.659958
2680 16:34:26.660386 CH=1, VrefRange= 0, VrefLevel = 0
2681 16:34:26.666718 TX Bit0 (984~999) 16 991, Bit8 (973~984) 12 978,
2682 16:34:26.669818 TX Bit1 (983~997) 15 990, Bit9 (975~983) 9 979,
2683 16:34:26.675978 TX Bit2 (982~996) 15 989, Bit10 (975~986) 12 980,
2684 16:34:26.679629 TX Bit3 (979~992) 14 985, Bit11 (977~987) 11 982,
2685 16:34:26.683248 TX Bit4 (983~998) 16 990, Bit12 (975~987) 13 981,
2686 16:34:26.689314 TX Bit5 (985~998) 14 991, Bit13 (977~988) 12 982,
2687 16:34:26.693024 TX Bit6 (984~998) 15 991, Bit14 (975~986) 12 980,
2688 16:34:26.696097 TX Bit7 (984~996) 13 990, Bit15 (969~979) 11 974,
2689 16:34:26.696517
2690 16:34:26.699266 Write Rank0 MR14 =0x2
2691 16:34:26.708791
2692 16:34:26.709344 CH=1, VrefRange= 0, VrefLevel = 2
2693 16:34:26.715654 TX Bit0 (983~1000) 18 991, Bit8 (973~984) 12 978,
2694 16:34:26.718602 TX Bit1 (983~997) 15 990, Bit9 (972~984) 13 978,
2695 16:34:26.724981 TX Bit2 (981~996) 16 988, Bit10 (976~987) 12 981,
2696 16:34:26.728614 TX Bit3 (979~993) 15 986, Bit11 (976~988) 13 982,
2697 16:34:26.731669 TX Bit4 (982~998) 17 990, Bit12 (975~988) 14 981,
2698 16:34:26.738045 TX Bit5 (984~999) 16 991, Bit13 (977~989) 13 983,
2699 16:34:26.741752 TX Bit6 (983~998) 16 990, Bit14 (975~987) 13 981,
2700 16:34:26.744933 TX Bit7 (983~997) 15 990, Bit15 (969~980) 12 974,
2701 16:34:26.747951
2702 16:34:26.748247 Write Rank0 MR14 =0x4
2703 16:34:26.757343
2704 16:34:26.761022 CH=1, VrefRange= 0, VrefLevel = 4
2705 16:34:26.763934 TX Bit0 (984~1000) 17 992, Bit8 (971~985) 15 978,
2706 16:34:26.767717 TX Bit1 (982~998) 17 990, Bit9 (973~984) 12 978,
2707 16:34:26.773874 TX Bit2 (980~997) 18 988, Bit10 (975~987) 13 981,
2708 16:34:26.777299 TX Bit3 (978~993) 16 985, Bit11 (975~989) 15 982,
2709 16:34:26.780601 TX Bit4 (982~999) 18 990, Bit12 (975~989) 15 982,
2710 16:34:26.787472 TX Bit5 (984~999) 16 991, Bit13 (976~989) 14 982,
2711 16:34:26.790489 TX Bit6 (983~998) 16 990, Bit14 (974~988) 15 981,
2712 16:34:26.797265 TX Bit7 (982~998) 17 990, Bit15 (968~982) 15 975,
2713 16:34:26.797799
2714 16:34:26.798141 Write Rank0 MR14 =0x6
2715 16:34:26.807154
2716 16:34:26.807646 CH=1, VrefRange= 0, VrefLevel = 6
2717 16:34:26.813870 TX Bit0 (983~1001) 19 992, Bit8 (971~985) 15 978,
2718 16:34:26.816966 TX Bit1 (982~998) 17 990, Bit9 (972~984) 13 978,
2719 16:34:26.823862 TX Bit2 (980~998) 19 989, Bit10 (975~989) 15 982,
2720 16:34:26.826957 TX Bit3 (978~994) 17 986, Bit11 (975~990) 16 982,
2721 16:34:26.830057 TX Bit4 (982~999) 18 990, Bit12 (975~990) 16 982,
2722 16:34:26.836977 TX Bit5 (984~999) 16 991, Bit13 (976~990) 15 983,
2723 16:34:26.840316 TX Bit6 (983~999) 17 991, Bit14 (974~988) 15 981,
2724 16:34:26.843747 TX Bit7 (983~998) 16 990, Bit15 (968~983) 16 975,
2725 16:34:26.846915
2726 16:34:26.847375 Write Rank0 MR14 =0x8
2727 16:34:26.856204
2728 16:34:26.856642 CH=1, VrefRange= 0, VrefLevel = 8
2729 16:34:26.863356 TX Bit0 (983~1001) 19 992, Bit8 (971~986) 16 978,
2730 16:34:26.866451 TX Bit1 (981~999) 19 990, Bit9 (971~985) 15 978,
2731 16:34:26.873248 TX Bit2 (980~998) 19 989, Bit10 (974~989) 16 981,
2732 16:34:26.876366 TX Bit3 (978~995) 18 986, Bit11 (974~990) 17 982,
2733 16:34:26.879978 TX Bit4 (982~1000) 19 991, Bit12 (975~991) 17 983,
2734 16:34:26.886065 TX Bit5 (984~1000) 17 992, Bit13 (976~990) 15 983,
2735 16:34:26.889761 TX Bit6 (982~999) 18 990, Bit14 (974~990) 17 982,
2736 16:34:26.895975 TX Bit7 (982~999) 18 990, Bit15 (968~983) 16 975,
2737 16:34:26.896269
2738 16:34:26.896499 Write Rank0 MR14 =0xa
2739 16:34:26.906049
2740 16:34:26.906381 CH=1, VrefRange= 0, VrefLevel = 10
2741 16:34:26.912347 TX Bit0 (983~1002) 20 992, Bit8 (971~986) 16 978,
2742 16:34:26.915986 TX Bit1 (981~999) 19 990, Bit9 (971~985) 15 978,
2743 16:34:26.922563 TX Bit2 (979~999) 21 989, Bit10 (974~990) 17 982,
2744 16:34:26.925761 TX Bit3 (978~996) 19 987, Bit11 (974~991) 18 982,
2745 16:34:26.928758 TX Bit4 (981~1000) 20 990, Bit12 (974~991) 18 982,
2746 16:34:26.935871 TX Bit5 (983~1000) 18 991, Bit13 (976~991) 16 983,
2747 16:34:26.939025 TX Bit6 (982~1000) 19 991, Bit14 (973~991) 19 982,
2748 16:34:26.945791 TX Bit7 (982~999) 18 990, Bit15 (968~984) 17 976,
2749 16:34:26.946168
2750 16:34:26.946462 Write Rank0 MR14 =0xc
2751 16:34:26.955639
2752 16:34:26.959040 CH=1, VrefRange= 0, VrefLevel = 12
2753 16:34:26.962130 TX Bit0 (982~1002) 21 992, Bit8 (970~987) 18 978,
2754 16:34:26.965773 TX Bit1 (981~1000) 20 990, Bit9 (970~986) 17 978,
2755 16:34:26.972631 TX Bit2 (979~999) 21 989, Bit10 (973~991) 19 982,
2756 16:34:26.975486 TX Bit3 (978~996) 19 987, Bit11 (974~991) 18 982,
2757 16:34:26.978796 TX Bit4 (981~1000) 20 990, Bit12 (974~992) 19 983,
2758 16:34:26.985454 TX Bit5 (983~1001) 19 992, Bit13 (975~991) 17 983,
2759 16:34:26.988718 TX Bit6 (981~1000) 20 990, Bit14 (973~991) 19 982,
2760 16:34:26.995020 TX Bit7 (981~1000) 20 990, Bit15 (968~984) 17 976,
2761 16:34:26.995119
2762 16:34:26.995196 Write Rank0 MR14 =0xe
2763 16:34:27.005543
2764 16:34:27.008712 CH=1, VrefRange= 0, VrefLevel = 14
2765 16:34:27.012339 TX Bit0 (982~1003) 22 992, Bit8 (970~988) 19 979,
2766 16:34:27.015686 TX Bit1 (980~1000) 21 990, Bit9 (970~986) 17 978,
2767 16:34:27.022143 TX Bit2 (978~1000) 23 989, Bit10 (973~991) 19 982,
2768 16:34:27.025269 TX Bit3 (977~997) 21 987, Bit11 (975~991) 17 983,
2769 16:34:27.029107 TX Bit4 (981~1001) 21 991, Bit12 (973~992) 20 982,
2770 16:34:27.035365 TX Bit5 (983~1001) 19 992, Bit13 (975~992) 18 983,
2771 16:34:27.039150 TX Bit6 (981~1001) 21 991, Bit14 (972~992) 21 982,
2772 16:34:27.046074 TX Bit7 (981~1000) 20 990, Bit15 (968~985) 18 976,
2773 16:34:27.046540
2774 16:34:27.046948 Write Rank0 MR14 =0x10
2775 16:34:27.056352
2776 16:34:27.059350 CH=1, VrefRange= 0, VrefLevel = 16
2777 16:34:27.062823 TX Bit0 (982~1003) 22 992, Bit8 (970~989) 20 979,
2778 16:34:27.066119 TX Bit1 (980~1001) 22 990, Bit9 (970~987) 18 978,
2779 16:34:27.072825 TX Bit2 (978~1000) 23 989, Bit10 (972~991) 20 981,
2780 16:34:27.076094 TX Bit3 (977~998) 22 987, Bit11 (974~992) 19 983,
2781 16:34:27.079862 TX Bit4 (980~1001) 22 990, Bit12 (972~992) 21 982,
2782 16:34:27.086322 TX Bit5 (983~1002) 20 992, Bit13 (974~992) 19 983,
2783 16:34:27.089513 TX Bit6 (980~1001) 22 990, Bit14 (972~992) 21 982,
2784 16:34:27.095695 TX Bit7 (981~1001) 21 991, Bit15 (967~985) 19 976,
2785 16:34:27.096116
2786 16:34:27.096479 Write Rank0 MR14 =0x12
2787 16:34:27.106575
2788 16:34:27.109680 CH=1, VrefRange= 0, VrefLevel = 18
2789 16:34:27.112774 TX Bit0 (982~1004) 23 993, Bit8 (970~989) 20 979,
2790 16:34:27.116452 TX Bit1 (979~1001) 23 990, Bit9 (970~987) 18 978,
2791 16:34:27.123079 TX Bit2 (978~1001) 24 989, Bit10 (972~992) 21 982,
2792 16:34:27.126643 TX Bit3 (977~998) 22 987, Bit11 (973~992) 20 982,
2793 16:34:27.129608 TX Bit4 (979~1002) 24 990, Bit12 (971~993) 23 982,
2794 16:34:27.136542 TX Bit5 (982~1002) 21 992, Bit13 (975~992) 18 983,
2795 16:34:27.139521 TX Bit6 (980~1001) 22 990, Bit14 (971~992) 22 981,
2796 16:34:27.146245 TX Bit7 (980~1001) 22 990, Bit15 (967~985) 19 976,
2797 16:34:27.146727
2798 16:34:27.147122 Write Rank0 MR14 =0x14
2799 16:34:27.156805
2800 16:34:27.157236 CH=1, VrefRange= 0, VrefLevel = 20
2801 16:34:27.163393 TX Bit0 (981~1004) 24 992, Bit8 (970~990) 21 980,
2802 16:34:27.167082 TX Bit1 (979~1001) 23 990, Bit9 (970~988) 19 979,
2803 16:34:27.173492 TX Bit2 (978~1001) 24 989, Bit10 (972~992) 21 982,
2804 16:34:27.177040 TX Bit3 (977~999) 23 988, Bit11 (972~992) 21 982,
2805 16:34:27.180240 TX Bit4 (979~1003) 25 991, Bit12 (972~993) 22 982,
2806 16:34:27.186882 TX Bit5 (982~1003) 22 992, Bit13 (974~992) 19 983,
2807 16:34:27.190320 TX Bit6 (979~1002) 24 990, Bit14 (971~993) 23 982,
2808 16:34:27.197005 TX Bit7 (980~1001) 22 990, Bit15 (967~986) 20 976,
2809 16:34:27.197580
2810 16:34:27.198086 Write Rank0 MR14 =0x16
2811 16:34:27.207480
2812 16:34:27.210514 CH=1, VrefRange= 0, VrefLevel = 22
2813 16:34:27.214352 TX Bit0 (981~1005) 25 993, Bit8 (969~991) 23 980,
2814 16:34:27.217477 TX Bit1 (979~1002) 24 990, Bit9 (970~989) 20 979,
2815 16:34:27.224220 TX Bit2 (978~1001) 24 989, Bit10 (971~992) 22 981,
2816 16:34:27.227301 TX Bit3 (977~999) 23 988, Bit11 (972~993) 22 982,
2817 16:34:27.231063 TX Bit4 (979~1003) 25 991, Bit12 (972~994) 23 983,
2818 16:34:27.237543 TX Bit5 (982~1003) 22 992, Bit13 (974~993) 20 983,
2819 16:34:27.240828 TX Bit6 (979~1002) 24 990, Bit14 (971~993) 23 982,
2820 16:34:27.247516 TX Bit7 (980~1001) 22 990, Bit15 (966~986) 21 976,
2821 16:34:27.248114
2822 16:34:27.248703 Write Rank0 MR14 =0x18
2823 16:34:27.257798
2824 16:34:27.261600 CH=1, VrefRange= 0, VrefLevel = 24
2825 16:34:27.264621 TX Bit0 (980~1005) 26 992, Bit8 (969~991) 23 980,
2826 16:34:27.268266 TX Bit1 (978~1002) 25 990, Bit9 (969~990) 22 979,
2827 16:34:27.274718 TX Bit2 (978~1002) 25 990, Bit10 (971~993) 23 982,
2828 16:34:27.277892 TX Bit3 (977~999) 23 988, Bit11 (972~993) 22 982,
2829 16:34:27.281563 TX Bit4 (979~1003) 25 991, Bit12 (971~994) 24 982,
2830 16:34:27.288092 TX Bit5 (981~1004) 24 992, Bit13 (974~993) 20 983,
2831 16:34:27.291337 TX Bit6 (979~1003) 25 991, Bit14 (971~993) 23 982,
2832 16:34:27.298200 TX Bit7 (980~1002) 23 991, Bit15 (966~987) 22 976,
2833 16:34:27.298773
2834 16:34:27.299129 Write Rank0 MR14 =0x1a
2835 16:34:27.308817
2836 16:34:27.311999 CH=1, VrefRange= 0, VrefLevel = 26
2837 16:34:27.315762 TX Bit0 (980~1006) 27 993, Bit8 (969~991) 23 980,
2838 16:34:27.319005 TX Bit1 (978~1003) 26 990, Bit9 (969~990) 22 979,
2839 16:34:27.325687 TX Bit2 (977~1002) 26 989, Bit10 (971~993) 23 982,
2840 16:34:27.328836 TX Bit3 (976~1000) 25 988, Bit11 (971~993) 23 982,
2841 16:34:27.332012 TX Bit4 (978~1004) 27 991, Bit12 (971~994) 24 982,
2842 16:34:27.338891 TX Bit5 (981~1004) 24 992, Bit13 (973~994) 22 983,
2843 16:34:27.342043 TX Bit6 (979~1004) 26 991, Bit14 (971~993) 23 982,
2844 16:34:27.348564 TX Bit7 (979~1003) 25 991, Bit15 (966~988) 23 977,
2845 16:34:27.348984
2846 16:34:27.349337 Write Rank0 MR14 =0x1c
2847 16:34:27.359911
2848 16:34:27.360359 CH=1, VrefRange= 0, VrefLevel = 28
2849 16:34:27.366236 TX Bit0 (980~1006) 27 993, Bit8 (969~992) 24 980,
2850 16:34:27.369952 TX Bit1 (978~1003) 26 990, Bit9 (969~990) 22 979,
2851 16:34:27.376342 TX Bit2 (977~1002) 26 989, Bit10 (970~994) 25 982,
2852 16:34:27.379549 TX Bit3 (976~1000) 25 988, Bit11 (971~994) 24 982,
2853 16:34:27.382904 TX Bit4 (978~1004) 27 991, Bit12 (971~994) 24 982,
2854 16:34:27.389902 TX Bit5 (980~1005) 26 992, Bit13 (972~994) 23 983,
2855 16:34:27.392917 TX Bit6 (979~1004) 26 991, Bit14 (971~994) 24 982,
2856 16:34:27.399433 TX Bit7 (979~1003) 25 991, Bit15 (966~988) 23 977,
2857 16:34:27.399879
2858 16:34:27.400234 Write Rank0 MR14 =0x1e
2859 16:34:27.410435
2860 16:34:27.413916 CH=1, VrefRange= 0, VrefLevel = 30
2861 16:34:27.417093 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2862 16:34:27.420828 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
2863 16:34:27.426913 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2864 16:34:27.430825 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2865 16:34:27.433937 TX Bit4 (979~1005) 27 992, Bit12 (971~994) 24 982,
2866 16:34:27.440087 TX Bit5 (980~1005) 26 992, Bit13 (972~994) 23 983,
2867 16:34:27.443800 TX Bit6 (978~1004) 27 991, Bit14 (970~994) 25 982,
2868 16:34:27.450092 TX Bit7 (978~1003) 26 990, Bit15 (966~988) 23 977,
2869 16:34:27.450513
2870 16:34:27.450873 Write Rank0 MR14 =0x20
2871 16:34:27.461289
2872 16:34:27.464952 CH=1, VrefRange= 0, VrefLevel = 32
2873 16:34:27.468069 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2874 16:34:27.471179 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
2875 16:34:27.477802 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2876 16:34:27.480946 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2877 16:34:27.484559 TX Bit4 (979~1005) 27 992, Bit12 (971~994) 24 982,
2878 16:34:27.491484 TX Bit5 (980~1005) 26 992, Bit13 (972~994) 23 983,
2879 16:34:27.495004 TX Bit6 (978~1004) 27 991, Bit14 (970~994) 25 982,
2880 16:34:27.501235 TX Bit7 (978~1003) 26 990, Bit15 (966~988) 23 977,
2881 16:34:27.501857
2882 16:34:27.502222 Write Rank0 MR14 =0x22
2883 16:34:27.512227
2884 16:34:27.515562 CH=1, VrefRange= 0, VrefLevel = 34
2885 16:34:27.518767 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2886 16:34:27.522163 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
2887 16:34:27.528866 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2888 16:34:27.531882 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2889 16:34:27.535258 TX Bit4 (979~1005) 27 992, Bit12 (971~994) 24 982,
2890 16:34:27.541936 TX Bit5 (980~1005) 26 992, Bit13 (972~994) 23 983,
2891 16:34:27.544924 TX Bit6 (978~1004) 27 991, Bit14 (970~994) 25 982,
2892 16:34:27.551963 TX Bit7 (978~1003) 26 990, Bit15 (966~988) 23 977,
2893 16:34:27.552403
2894 16:34:27.552738 Write Rank0 MR14 =0x24
2895 16:34:27.562805
2896 16:34:27.566387 CH=1, VrefRange= 0, VrefLevel = 36
2897 16:34:27.569399 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2898 16:34:27.573153 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
2899 16:34:27.579840 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2900 16:34:27.583014 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2901 16:34:27.586122 TX Bit4 (979~1005) 27 992, Bit12 (971~994) 24 982,
2902 16:34:27.592965 TX Bit5 (980~1005) 26 992, Bit13 (972~994) 23 983,
2903 16:34:27.596060 TX Bit6 (978~1004) 27 991, Bit14 (970~994) 25 982,
2904 16:34:27.602661 TX Bit7 (978~1003) 26 990, Bit15 (966~988) 23 977,
2905 16:34:27.603097
2906 16:34:27.603571 Write Rank0 MR14 =0x26
2907 16:34:27.613753
2908 16:34:27.617077 CH=1, VrefRange= 0, VrefLevel = 38
2909 16:34:27.620669 TX Bit0 (979~1006) 28 992, Bit8 (968~992) 25 980,
2910 16:34:27.623903 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
2911 16:34:27.630665 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2912 16:34:27.633879 TX Bit3 (976~1000) 25 988, Bit11 (970~994) 25 982,
2913 16:34:27.636901 TX Bit4 (979~1005) 27 992, Bit12 (971~994) 24 982,
2914 16:34:27.643579 TX Bit5 (980~1005) 26 992, Bit13 (972~994) 23 983,
2915 16:34:27.647333 TX Bit6 (978~1004) 27 991, Bit14 (970~994) 25 982,
2916 16:34:27.653633 TX Bit7 (978~1003) 26 990, Bit15 (966~988) 23 977,
2917 16:34:27.654071
2918 16:34:27.654428
2919 16:34:27.657349 TX Vref found, early break! 375< 382
2920 16:34:27.660376 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2921 16:34:27.663884 u1DelayCellOfst[0]=5 cells (4 PI)
2922 16:34:27.666986 u1DelayCellOfst[1]=2 cells (2 PI)
2923 16:34:27.670573 u1DelayCellOfst[2]=1 cells (1 PI)
2924 16:34:27.673587 u1DelayCellOfst[3]=0 cells (0 PI)
2925 16:34:27.677305 u1DelayCellOfst[4]=5 cells (4 PI)
2926 16:34:27.680360 u1DelayCellOfst[5]=5 cells (4 PI)
2927 16:34:27.683898 u1DelayCellOfst[6]=3 cells (3 PI)
2928 16:34:27.684312 u1DelayCellOfst[7]=2 cells (2 PI)
2929 16:34:27.687010 Byte0, DQ PI dly=988, DQM PI dly= 990
2930 16:34:27.693816 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2931 16:34:27.694364
2932 16:34:27.696874 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2933 16:34:27.697313
2934 16:34:27.700612 u1DelayCellOfst[8]=3 cells (3 PI)
2935 16:34:27.703594 u1DelayCellOfst[9]=3 cells (3 PI)
2936 16:34:27.706868 u1DelayCellOfst[10]=5 cells (4 PI)
2937 16:34:27.709940 u1DelayCellOfst[11]=6 cells (5 PI)
2938 16:34:27.713146 u1DelayCellOfst[12]=6 cells (5 PI)
2939 16:34:27.716819 u1DelayCellOfst[13]=7 cells (6 PI)
2940 16:34:27.719833 u1DelayCellOfst[14]=6 cells (5 PI)
2941 16:34:27.723624 u1DelayCellOfst[15]=0 cells (0 PI)
2942 16:34:27.726694 Byte1, DQ PI dly=977, DQM PI dly= 980
2943 16:34:27.730028 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
2944 16:34:27.730449
2945 16:34:27.733271 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
2946 16:34:27.733740
2947 16:34:27.736387 Write Rank0 MR14 =0x1e
2948 16:34:27.736833
2949 16:34:27.739812 Final TX Range 0 Vref 30
2950 16:34:27.740284
2951 16:34:27.746689 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2952 16:34:27.747126
2953 16:34:27.752925 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2954 16:34:27.759996 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2955 16:34:27.766275 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2956 16:34:27.769707 Write Rank0 MR3 =0xb0
2957 16:34:27.770206 DramC Write-DBI on
2958 16:34:27.770533 ==
2959 16:34:27.776249 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2960 16:34:27.779388 fsp= 1, odt_onoff= 1, Byte mode= 0
2961 16:34:27.779997 ==
2962 16:34:27.783128 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2963 16:34:27.783739
2964 16:34:27.786246 Begin, DQ Scan Range 700~764
2965 16:34:27.786890
2966 16:34:27.787449
2967 16:34:27.787845 TX Vref Scan disable
2968 16:34:27.792755 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2969 16:34:27.796506 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2970 16:34:27.799592 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2971 16:34:27.803182 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2972 16:34:27.806323 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2973 16:34:27.809383 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2974 16:34:27.813119 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2975 16:34:27.816252 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2976 16:34:27.819324 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2977 16:34:27.823090 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2978 16:34:27.826061 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2979 16:34:27.829754 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2980 16:34:27.832780 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2981 16:34:27.836455 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2982 16:34:27.839763 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2983 16:34:27.842575 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2984 16:34:27.846290 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2985 16:34:27.849393 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2986 16:34:27.852967 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2987 16:34:27.856513 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2988 16:34:27.863019 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2989 16:34:27.866010 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2990 16:34:27.869184 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2991 16:34:27.872863 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2992 16:34:27.876246 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2993 16:34:27.879436 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2994 16:34:27.885851 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2995 16:34:27.889051 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2996 16:34:27.892786 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2997 16:34:27.895835 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2998 16:34:27.899664 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2999 16:34:27.902706 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3000 16:34:27.905788 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3001 16:34:27.909637 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3002 16:34:27.912759 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3003 16:34:27.915900 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3004 16:34:27.918879 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3005 16:34:27.922693 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3006 16:34:27.925762 Byte0, DQ PI dly=736, DQM PI dly= 736
3007 16:34:27.932692 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
3008 16:34:27.933111
3009 16:34:27.935702 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
3010 16:34:27.936144
3011 16:34:27.939508 Byte1, DQ PI dly=724, DQM PI dly= 724
3012 16:34:27.942505 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
3013 16:34:27.942939
3014 16:34:27.949529 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
3015 16:34:27.949979
3016 16:34:27.955676 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3017 16:34:27.962266 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3018 16:34:27.969032 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3019 16:34:27.969592 Write Rank0 MR3 =0x30
3020 16:34:27.972151 DramC Write-DBI off
3021 16:34:27.972693
3022 16:34:27.973206 [DATLAT]
3023 16:34:27.975520 Freq=1600, CH1 RK0, use_rxtx_scan=0
3024 16:34:27.976050
3025 16:34:27.978828 DATLAT Default: 0xf
3026 16:34:27.979379 7, 0xFFFF, sum=0
3027 16:34:27.982605 8, 0xFFFF, sum=0
3028 16:34:27.983041 9, 0xFFFF, sum=0
3029 16:34:27.985696 10, 0xFFFF, sum=0
3030 16:34:27.986249 11, 0xFFFF, sum=0
3031 16:34:27.989135 12, 0xFFFF, sum=0
3032 16:34:27.989633 13, 0xFFFF, sum=0
3033 16:34:27.992571 14, 0x0, sum=1
3034 16:34:27.993001 15, 0x0, sum=2
3035 16:34:27.993342 16, 0x0, sum=3
3036 16:34:27.995939 17, 0x0, sum=4
3037 16:34:27.999560 pattern=2 first_step=14 total pass=5 best_step=16
3038 16:34:27.999979 ==
3039 16:34:28.006029 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3040 16:34:28.009215 fsp= 1, odt_onoff= 1, Byte mode= 0
3041 16:34:28.009747 ==
3042 16:34:28.012848 Start DQ dly to find pass range UseTestEngine =1
3043 16:34:28.015951 x-axis: bit #, y-axis: DQ dly (-127~63)
3044 16:34:28.019148 RX Vref Scan = 1
3045 16:34:28.125009
3046 16:34:28.125289 RX Vref found, early break!
3047 16:34:28.125473
3048 16:34:28.131896 Final RX Vref 11, apply to both rank0 and 1
3049 16:34:28.132123 ==
3050 16:34:28.135124 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3051 16:34:28.138503 fsp= 1, odt_onoff= 1, Byte mode= 0
3052 16:34:28.138839 ==
3053 16:34:28.139036 DQS Delay:
3054 16:34:28.141468 DQS0 = 0, DQS1 = 0
3055 16:34:28.141691 DQM Delay:
3056 16:34:28.145137 DQM0 = 21, DQM1 = 19
3057 16:34:28.145411 DQ Delay:
3058 16:34:28.148220 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =17
3059 16:34:28.152049 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =21
3060 16:34:28.155252 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3061 16:34:28.158324 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =14
3062 16:34:28.158765
3063 16:34:28.159180
3064 16:34:28.159544
3065 16:34:28.162004 [DramC_TX_OE_Calibration] TA2
3066 16:34:28.165492 Original DQ_B0 (3 6) =30, OEN = 27
3067 16:34:28.168033 Original DQ_B1 (3 6) =30, OEN = 27
3068 16:34:28.171369 23, 0x0, End_B0=23 End_B1=23
3069 16:34:28.171821 24, 0x0, End_B0=24 End_B1=24
3070 16:34:28.174804 25, 0x0, End_B0=25 End_B1=25
3071 16:34:28.178259 26, 0x0, End_B0=26 End_B1=26
3072 16:34:28.181651 27, 0x0, End_B0=27 End_B1=27
3073 16:34:28.182129 28, 0x0, End_B0=28 End_B1=28
3074 16:34:28.185052 29, 0x0, End_B0=29 End_B1=29
3075 16:34:28.188137 30, 0x0, End_B0=30 End_B1=30
3076 16:34:28.191863 31, 0xFFFF, End_B0=30 End_B1=30
3077 16:34:28.198752 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3078 16:34:28.201823 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3079 16:34:28.202253
3080 16:34:28.202684
3081 16:34:28.204944 Write Rank0 MR23 =0x3f
3082 16:34:28.205487 [DQSOSC]
3083 16:34:28.214816 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
3084 16:34:28.221129 CH1_RK0: MR19=0x202, MR18=0xC0C0, DQSOSC=447, MR23=63, INC=12, DEC=18
3085 16:34:28.221544 Write Rank0 MR23 =0x3f
3086 16:34:28.221869 [DQSOSC]
3087 16:34:28.231515 [DQSOSCAuto] RK0, (LSB)MR18= 0xbebe, (MSB)MR19= 0x202, tDQSOscB0 = 448 ps tDQSOscB1 = 448 ps
3088 16:34:28.234951 CH1 RK0: MR19=202, MR18=BEBE
3089 16:34:28.238141 [RankSwap] Rank num 2, (Multi 1), Rank 1
3090 16:34:28.238574 Write Rank0 MR2 =0xad
3091 16:34:28.241296 [Write Leveling]
3092 16:34:28.244480 delay byte0 byte1 byte2 byte3
3093 16:34:28.244891
3094 16:34:28.245215 10 0 0
3095 16:34:28.248113 11 0 0
3096 16:34:28.248562 12 0 0
3097 16:34:28.249060 13 0 0
3098 16:34:28.251221 14 0 0
3099 16:34:28.251692 15 0 0
3100 16:34:28.254991 16 0 0
3101 16:34:28.255564 17 0 0
3102 16:34:28.258155 18 0 0
3103 16:34:28.258746 19 0 0
3104 16:34:28.259155 20 0 0
3105 16:34:28.261557 21 0 0
3106 16:34:28.262004 22 0 0
3107 16:34:28.265086 23 0 0
3108 16:34:28.265601 24 0 ff
3109 16:34:28.265936 25 0 ff
3110 16:34:28.268010 26 0 ff
3111 16:34:28.268427 27 0 ff
3112 16:34:28.271168 28 0 ff
3113 16:34:28.271625 29 0 ff
3114 16:34:28.274284 30 0 ff
3115 16:34:28.274736 31 0 ff
3116 16:34:28.278213 32 0 ff
3117 16:34:28.278879 33 0 ff
3118 16:34:28.279226 34 ff ff
3119 16:34:28.281085 35 ff ff
3120 16:34:28.281500 36 ff ff
3121 16:34:28.284612 37 ff ff
3122 16:34:28.285032 38 ff ff
3123 16:34:28.287590 39 ff ff
3124 16:34:28.288006 40 ff ff
3125 16:34:28.294379 pass bytecount = 0xff (0xff: all bytes pass)
3126 16:34:28.294807
3127 16:34:28.295236 DQS0 dly: 34
3128 16:34:28.295699 DQS1 dly: 24
3129 16:34:28.297898 Write Rank0 MR2 =0x2d
3130 16:34:28.300977 [RankSwap] Rank num 2, (Multi 1), Rank 0
3131 16:34:28.304274 Write Rank1 MR1 =0xd6
3132 16:34:28.304729 [Gating]
3133 16:34:28.305246 ==
3134 16:34:28.307820 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3135 16:34:28.311038 fsp= 1, odt_onoff= 1, Byte mode= 0
3136 16:34:28.311612 ==
3137 16:34:28.317731 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3138 16:34:28.320787 3 1 4 |3535 2c2b |(10 10)(11 11) |(1 1)(0 0)| 0
3139 16:34:28.324033 3 1 8 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3140 16:34:28.331096 3 1 12 |1312 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3141 16:34:28.333912 3 1 16 |3433 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3142 16:34:28.337715 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3143 16:34:28.343995 3 1 24 |3434 2c2b |(0 0)(11 11) |(0 1)(1 0)| 0
3144 16:34:28.347216 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3145 16:34:28.350817 3 2 0 |3434 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3146 16:34:28.357364 3 2 4 |1e1e 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3147 16:34:28.360567 3 2 8 |201 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3148 16:34:28.363649 3 2 12 |3d3c 201 |(11 11)(11 11) |(1 1)(0 0)| 0
3149 16:34:28.367370 3 2 16 |3d3d 303 |(11 11)(11 11) |(1 1)(0 0)| 0
3150 16:34:28.374081 3 2 20 |3b3b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3151 16:34:28.377065 3 2 24 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3152 16:34:28.380788 3 2 28 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3153 16:34:28.387244 3 3 0 |3c3b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3154 16:34:28.390441 3 3 4 |1a1a 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3155 16:34:28.393481 3 3 8 |403 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3156 16:34:28.400395 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3157 16:34:28.403672 [Byte 0] Lead/lag falling Transition (3, 3, 12)
3158 16:34:28.406621 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3159 16:34:28.410293 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3160 16:34:28.417123 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3161 16:34:28.420494 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3162 16:34:28.423558 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3163 16:34:28.430428 3 4 4 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3164 16:34:28.433260 3 4 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3165 16:34:28.436641 3 4 12 |3d3d 2625 |(11 11)(11 11) |(1 1)(1 1)| 0
3166 16:34:28.443444 3 4 16 |3d3d 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
3167 16:34:28.447107 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3168 16:34:28.450917 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3169 16:34:28.457151 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3170 16:34:28.460406 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3171 16:34:28.463808 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3172 16:34:28.467521 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3173 16:34:28.473980 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3174 16:34:28.477288 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3175 16:34:28.480392 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3176 16:34:28.487124 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3177 16:34:28.490181 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3178 16:34:28.493576 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3179 16:34:28.497060 [Byte 0] Lead/lag Transition tap number (2)
3180 16:34:28.503091 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3181 16:34:28.506719 3 6 4 |202 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3182 16:34:28.510299 [Byte 1] Lead/lag falling Transition (3, 6, 4)
3183 16:34:28.516666 3 6 8 |4646 3d3d |(1 0)(11 11) |(0 0)(1 0)| 0
3184 16:34:28.520031 [Byte 1] Lead/lag Transition tap number (2)
3185 16:34:28.523198 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
3186 16:34:28.526776 [Byte 0]First pass (3, 6, 12)
3187 16:34:28.529782 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3188 16:34:28.533467 [Byte 1]First pass (3, 6, 16)
3189 16:34:28.536601 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3190 16:34:28.540111 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3191 16:34:28.546227 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3192 16:34:28.549690 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3193 16:34:28.553476 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3194 16:34:28.556573 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3195 16:34:28.559546 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3196 16:34:28.566322 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3197 16:34:28.569819 All bytes gating window > 1UI, Early break!
3198 16:34:28.569995
3199 16:34:28.572863 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 28)
3200 16:34:28.573078
3201 16:34:28.576484 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
3202 16:34:28.576744
3203 16:34:28.576942
3204 16:34:28.577126
3205 16:34:28.579507 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
3206 16:34:28.579859
3207 16:34:28.586440 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
3208 16:34:28.586847
3209 16:34:28.587170
3210 16:34:28.587521 Write Rank1 MR1 =0x56
3211 16:34:28.587828
3212 16:34:28.589774 best RODT dly(2T, 0.5T) = (2, 2)
3213 16:34:28.590329
3214 16:34:28.593508 best RODT dly(2T, 0.5T) = (2, 3)
3215 16:34:28.594013 ==
3216 16:34:28.599762 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3217 16:34:28.602743 fsp= 1, odt_onoff= 1, Byte mode= 0
3218 16:34:28.603181 ==
3219 16:34:28.606251 Start DQ dly to find pass range UseTestEngine =0
3220 16:34:28.609463 x-axis: bit #, y-axis: DQ dly (-127~63)
3221 16:34:28.613181 RX Vref Scan = 0
3222 16:34:28.613591 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3223 16:34:28.616103 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3224 16:34:28.619697 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3225 16:34:28.622657 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3226 16:34:28.626227 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3227 16:34:28.629774 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3228 16:34:28.632608 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3229 16:34:28.636375 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3230 16:34:28.636793 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3231 16:34:28.639550 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3232 16:34:28.642999 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3233 16:34:28.646057 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3234 16:34:28.649669 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3235 16:34:28.652840 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3236 16:34:28.656127 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3237 16:34:28.659544 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3238 16:34:28.663014 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3239 16:34:28.663466 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3240 16:34:28.666285 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3241 16:34:28.669493 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3242 16:34:28.673043 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3243 16:34:28.675987 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3244 16:34:28.679622 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3245 16:34:28.683052 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3246 16:34:28.683571 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3247 16:34:28.686061 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3248 16:34:28.689059 0, [0] xxxoxxxx xoxxxxxo [MSB]
3249 16:34:28.692773 1, [0] xxooxxxx ooxxxxxo [MSB]
3250 16:34:28.696004 2, [0] xxooxxxx ooxxxxxo [MSB]
3251 16:34:28.699228 3, [0] xxooxxxo oooxxxxo [MSB]
3252 16:34:28.699697 4, [0] oxoooxxo oooxxxxo [MSB]
3253 16:34:28.702884 6, [0] oooooooo ooooooxo [MSB]
3254 16:34:28.705968 32, [0] oooooooo ooooooox [MSB]
3255 16:34:28.709664 33, [0] oooooooo ooooooox [MSB]
3256 16:34:28.712680 34, [0] oooooooo ooooooox [MSB]
3257 16:34:28.716407 35, [0] oooxoooo oxooooox [MSB]
3258 16:34:28.716835 36, [0] oooxoooo xxooooox [MSB]
3259 16:34:28.719765 37, [0] ooxxoooo xxooooox [MSB]
3260 16:34:28.722734 38, [0] ooxxoooo xxooooox [MSB]
3261 16:34:28.726339 39, [0] oxxxxoox xxooooox [MSB]
3262 16:34:28.729231 40, [0] oxxxxoox xxxoooox [MSB]
3263 16:34:28.733114 41, [0] oxxxxoox xxxxxxox [MSB]
3264 16:34:28.735724 42, [0] xxxxxxxx xxxxxxxx [MSB]
3265 16:34:28.739346 iDelay=42, Bit 0, Center 22 (4 ~ 41) 38
3266 16:34:28.742783 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3267 16:34:28.745954 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
3268 16:34:28.749418 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3269 16:34:28.752739 iDelay=42, Bit 4, Center 21 (4 ~ 38) 35
3270 16:34:28.755811 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3271 16:34:28.759027 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3272 16:34:28.762795 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3273 16:34:28.765707 iDelay=42, Bit 8, Center 18 (1 ~ 35) 35
3274 16:34:28.769274 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
3275 16:34:28.772607 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3276 16:34:28.776087 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3277 16:34:28.782259 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3278 16:34:28.785902 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
3279 16:34:28.789439 iDelay=42, Bit 14, Center 24 (7 ~ 41) 35
3280 16:34:28.792531 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3281 16:34:28.792832 ==
3282 16:34:28.795905 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3283 16:34:28.798919 fsp= 1, odt_onoff= 1, Byte mode= 0
3284 16:34:28.799217 ==
3285 16:34:28.802985 DQS Delay:
3286 16:34:28.803380 DQS0 = 0, DQS1 = 0
3287 16:34:28.806145 DQM Delay:
3288 16:34:28.806552 DQM0 = 20, DQM1 = 19
3289 16:34:28.806824 DQ Delay:
3290 16:34:28.809217 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3291 16:34:28.812973 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
3292 16:34:28.815962 DQ8 =18, DQ9 =16, DQ10 =21, DQ11 =22
3293 16:34:28.819570 DQ12 =22, DQ13 =22, DQ14 =24, DQ15 =14
3294 16:34:28.820001
3295 16:34:28.820330
3296 16:34:28.822784 DramC Write-DBI off
3297 16:34:28.823198 ==
3298 16:34:28.829330 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3299 16:34:28.829751 fsp= 1, odt_onoff= 1, Byte mode= 0
3300 16:34:28.832432 ==
3301 16:34:28.835983 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3302 16:34:28.836412
3303 16:34:28.839377 Begin, DQ Scan Range 920~1176
3304 16:34:28.839829
3305 16:34:28.840159
3306 16:34:28.840466 TX Vref Scan disable
3307 16:34:28.842492 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
3308 16:34:28.846037 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3309 16:34:28.852762 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3310 16:34:28.856405 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3311 16:34:28.859221 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3312 16:34:28.862902 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3313 16:34:28.866610 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3314 16:34:28.869522 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3315 16:34:28.873171 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3316 16:34:28.876285 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3317 16:34:28.879271 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3318 16:34:28.883015 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3319 16:34:28.886026 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3320 16:34:28.889241 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3321 16:34:28.892746 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3322 16:34:28.895572 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3323 16:34:28.899334 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3324 16:34:28.902461 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3325 16:34:28.908931 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3326 16:34:28.911923 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3327 16:34:28.915600 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3328 16:34:28.919087 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3329 16:34:28.922531 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3330 16:34:28.925421 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3331 16:34:28.929099 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3332 16:34:28.932229 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3333 16:34:28.935336 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3334 16:34:28.939066 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3335 16:34:28.942045 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3336 16:34:28.945653 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3337 16:34:28.948800 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3338 16:34:28.951765 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3339 16:34:28.955452 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3340 16:34:28.962004 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3341 16:34:28.965522 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3342 16:34:28.968662 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3343 16:34:28.971724 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3344 16:34:28.975288 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3345 16:34:28.978389 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3346 16:34:28.981997 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3347 16:34:28.984984 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3348 16:34:28.988669 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3349 16:34:28.991682 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3350 16:34:28.995575 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3351 16:34:28.998440 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3352 16:34:29.001995 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3353 16:34:29.005300 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3354 16:34:29.008754 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3355 16:34:29.011710 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3356 16:34:29.014950 969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]
3357 16:34:29.018474 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
3358 16:34:29.022010 971 |3 6 11|[0] xxxxxxxx oooooxoo [MSB]
3359 16:34:29.030154 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3360 16:34:29.031834 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3361 16:34:29.034935 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3362 16:34:29.038769 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3363 16:34:29.041876 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3364 16:34:29.045062 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3365 16:34:29.048423 978 |3 6 18|[0] xxoooxxx oooooooo [MSB]
3366 16:34:29.051860 979 |3 6 19|[0] xoooooox oooooooo [MSB]
3367 16:34:29.054939 985 |3 6 25|[0] oooooooo ooooooox [MSB]
3368 16:34:29.058677 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3369 16:34:29.061688 987 |3 6 27|[0] oooooooo ooooooox [MSB]
3370 16:34:29.065294 988 |3 6 28|[0] oooooooo xxooooox [MSB]
3371 16:34:29.071764 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
3372 16:34:29.075285 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3373 16:34:29.078249 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3374 16:34:29.082150 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3375 16:34:29.084985 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3376 16:34:29.088529 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3377 16:34:29.091600 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3378 16:34:29.095108 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3379 16:34:29.098669 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
3380 16:34:29.101801 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3381 16:34:29.104848 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3382 16:34:29.108345 1000 |3 6 40|[0] ooxxxoox xxxxxxxx [MSB]
3383 16:34:29.111547 1001 |3 6 41|[0] oxxxxoxx xxxxxxxx [MSB]
3384 16:34:29.114772 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
3385 16:34:29.118404 Byte0, DQ PI dly=988, DQM PI dly= 988
3386 16:34:29.124764 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3387 16:34:29.125186
3388 16:34:29.128117 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3389 16:34:29.128711
3390 16:34:29.131740 Byte1, DQ PI dly=977, DQM PI dly= 977
3391 16:34:29.134986 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3392 16:34:29.135557
3393 16:34:29.141320 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3394 16:34:29.141795
3395 16:34:29.142139 ==
3396 16:34:29.145081 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3397 16:34:29.148170 fsp= 1, odt_onoff= 1, Byte mode= 0
3398 16:34:29.148734 ==
3399 16:34:29.154902 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3400 16:34:29.155350
3401 16:34:29.158363 Begin, DQ Scan Range 953~1017
3402 16:34:29.158805 Write Rank1 MR14 =0x0
3403 16:34:29.167493
3404 16:34:29.167968 CH=1, VrefRange= 0, VrefLevel = 0
3405 16:34:29.174159 TX Bit0 (982~998) 17 990, Bit8 (970~984) 15 977,
3406 16:34:29.177016 TX Bit1 (981~996) 16 988, Bit9 (970~984) 15 977,
3407 16:34:29.184012 TX Bit2 (979~993) 15 986, Bit10 (974~985) 12 979,
3408 16:34:29.187459 TX Bit3 (978~990) 13 984, Bit11 (975~986) 12 980,
3409 16:34:29.190527 TX Bit4 (981~995) 15 988, Bit12 (976~985) 10 980,
3410 16:34:29.197331 TX Bit5 (982~998) 17 990, Bit13 (975~987) 13 981,
3411 16:34:29.200952 TX Bit6 (982~996) 15 989, Bit14 (975~984) 10 979,
3412 16:34:29.204061 TX Bit7 (984~994) 11 989, Bit15 (969~978) 10 973,
3413 16:34:29.204179
3414 16:34:29.207214 Write Rank1 MR14 =0x2
3415 16:34:29.216942
3416 16:34:29.217198 CH=1, VrefRange= 0, VrefLevel = 2
3417 16:34:29.223474 TX Bit0 (982~998) 17 990, Bit8 (970~984) 15 977,
3418 16:34:29.226671 TX Bit1 (981~997) 17 989, Bit9 (970~984) 15 977,
3419 16:34:29.233510 TX Bit2 (978~995) 18 986, Bit10 (974~985) 12 979,
3420 16:34:29.236621 TX Bit3 (978~991) 14 984, Bit11 (974~987) 14 980,
3421 16:34:29.240046 TX Bit4 (980~997) 18 988, Bit12 (975~986) 12 980,
3422 16:34:29.247008 TX Bit5 (982~998) 17 990, Bit13 (975~988) 14 981,
3423 16:34:29.250203 TX Bit6 (981~997) 17 989, Bit14 (974~985) 12 979,
3424 16:34:29.253312 TX Bit7 (983~995) 13 989, Bit15 (969~979) 11 974,
3425 16:34:29.253817
3426 16:34:29.256726 Write Rank1 MR14 =0x4
3427 16:34:29.266154
3428 16:34:29.266838 CH=1, VrefRange= 0, VrefLevel = 4
3429 16:34:29.272162 TX Bit0 (982~998) 17 990, Bit8 (969~984) 16 976,
3430 16:34:29.275767 TX Bit1 (980~997) 18 988, Bit9 (970~984) 15 977,
3431 16:34:29.282608 TX Bit2 (978~995) 18 986, Bit10 (974~986) 13 980,
3432 16:34:29.285692 TX Bit3 (978~991) 14 984, Bit11 (974~988) 15 981,
3433 16:34:29.288949 TX Bit4 (980~997) 18 988, Bit12 (974~986) 13 980,
3434 16:34:29.295974 TX Bit5 (982~998) 17 990, Bit13 (974~988) 15 981,
3435 16:34:29.299269 TX Bit6 (980~998) 19 989, Bit14 (974~986) 13 980,
3436 16:34:29.302197 TX Bit7 (983~996) 14 989, Bit15 (968~980) 13 974,
3437 16:34:29.302639
3438 16:34:29.305766 Write Rank1 MR14 =0x6
3439 16:34:29.314846
3440 16:34:29.315266 CH=1, VrefRange= 0, VrefLevel = 6
3441 16:34:29.321628 TX Bit0 (981~999) 19 990, Bit8 (969~985) 17 977,
3442 16:34:29.325509 TX Bit1 (980~998) 19 989, Bit9 (970~985) 16 977,
3443 16:34:29.331600 TX Bit2 (978~997) 20 987, Bit10 (973~987) 15 980,
3444 16:34:29.335132 TX Bit3 (977~992) 16 984, Bit11 (974~989) 16 981,
3445 16:34:29.339049 TX Bit4 (980~997) 18 988, Bit12 (974~987) 14 980,
3446 16:34:29.345318 TX Bit5 (981~999) 19 990, Bit13 (974~989) 16 981,
3447 16:34:29.348225 TX Bit6 (980~998) 19 989, Bit14 (973~986) 14 979,
3448 16:34:29.351477 TX Bit7 (983~997) 15 990, Bit15 (967~981) 15 974,
3449 16:34:29.351893
3450 16:34:29.355057 Write Rank1 MR14 =0x8
3451 16:34:29.364644
3452 16:34:29.365174 CH=1, VrefRange= 0, VrefLevel = 8
3453 16:34:29.371246 TX Bit0 (981~1000) 20 990, Bit8 (969~985) 17 977,
3454 16:34:29.374600 TX Bit1 (979~998) 20 988, Bit9 (970~985) 16 977,
3455 16:34:29.381331 TX Bit2 (978~997) 20 987, Bit10 (972~987) 16 979,
3456 16:34:29.384437 TX Bit3 (977~993) 17 985, Bit11 (973~990) 18 981,
3457 16:34:29.387960 TX Bit4 (979~998) 20 988, Bit12 (972~988) 17 980,
3458 16:34:29.394568 TX Bit5 (981~1000) 20 990, Bit13 (973~990) 18 981,
3459 16:34:29.397690 TX Bit6 (980~999) 20 989, Bit14 (973~987) 15 980,
3460 16:34:29.403921 TX Bit7 (982~997) 16 989, Bit15 (967~982) 16 974,
3461 16:34:29.404363
3462 16:34:29.404735 Write Rank1 MR14 =0xa
3463 16:34:29.414219
3464 16:34:29.417323 CH=1, VrefRange= 0, VrefLevel = 10
3465 16:34:29.421010 TX Bit0 (981~1000) 20 990, Bit8 (969~986) 18 977,
3466 16:34:29.424288 TX Bit1 (979~999) 21 989, Bit9 (970~985) 16 977,
3467 16:34:29.431042 TX Bit2 (978~997) 20 987, Bit10 (972~988) 17 980,
3468 16:34:29.434085 TX Bit3 (977~994) 18 985, Bit11 (973~990) 18 981,
3469 16:34:29.437280 TX Bit4 (979~999) 21 989, Bit12 (972~989) 18 980,
3470 16:34:29.443952 TX Bit5 (980~1000) 21 990, Bit13 (973~991) 19 982,
3471 16:34:29.447554 TX Bit6 (979~999) 21 989, Bit14 (972~988) 17 980,
3472 16:34:29.454188 TX Bit7 (981~998) 18 989, Bit15 (967~983) 17 975,
3473 16:34:29.454607
3474 16:34:29.454934 Write Rank1 MR14 =0xc
3475 16:34:29.464239
3476 16:34:29.467386 CH=1, VrefRange= 0, VrefLevel = 12
3477 16:34:29.470558 TX Bit0 (980~1001) 22 990, Bit8 (969~986) 18 977,
3478 16:34:29.473703 TX Bit1 (979~999) 21 989, Bit9 (969~986) 18 977,
3479 16:34:29.480389 TX Bit2 (977~998) 22 987, Bit10 (971~989) 19 980,
3480 16:34:29.484027 TX Bit3 (977~994) 18 985, Bit11 (971~990) 20 980,
3481 16:34:29.487083 TX Bit4 (978~999) 22 988, Bit12 (972~990) 19 981,
3482 16:34:29.493693 TX Bit5 (980~1000) 21 990, Bit13 (972~991) 20 981,
3483 16:34:29.497400 TX Bit6 (980~1000) 21 990, Bit14 (972~989) 18 980,
3484 16:34:29.503532 TX Bit7 (980~998) 19 989, Bit15 (967~984) 18 975,
3485 16:34:29.503975
3486 16:34:29.504341 Write Rank1 MR14 =0xe
3487 16:34:29.513818
3488 16:34:29.517198 CH=1, VrefRange= 0, VrefLevel = 14
3489 16:34:29.520426 TX Bit0 (980~1001) 22 990, Bit8 (969~987) 19 978,
3490 16:34:29.523520 TX Bit1 (979~1000) 22 989, Bit9 (969~986) 18 977,
3491 16:34:29.530679 TX Bit2 (978~998) 21 988, Bit10 (970~990) 21 980,
3492 16:34:29.533941 TX Bit3 (977~995) 19 986, Bit11 (971~991) 21 981,
3493 16:34:29.537138 TX Bit4 (978~999) 22 988, Bit12 (972~990) 19 981,
3494 16:34:29.543682 TX Bit5 (980~1001) 22 990, Bit13 (971~991) 21 981,
3495 16:34:29.546890 TX Bit6 (979~1000) 22 989, Bit14 (972~990) 19 981,
3496 16:34:29.553651 TX Bit7 (980~999) 20 989, Bit15 (967~984) 18 975,
3497 16:34:29.554223
3498 16:34:29.554657 Write Rank1 MR14 =0x10
3499 16:34:29.564207
3500 16:34:29.567507 CH=1, VrefRange= 0, VrefLevel = 16
3501 16:34:29.570747 TX Bit0 (980~1001) 22 990, Bit8 (968~987) 20 977,
3502 16:34:29.573770 TX Bit1 (978~1000) 23 989, Bit9 (969~987) 19 978,
3503 16:34:29.580543 TX Bit2 (978~999) 22 988, Bit10 (971~990) 20 980,
3504 16:34:29.584042 TX Bit3 (977~996) 20 986, Bit11 (971~991) 21 981,
3505 16:34:29.587063 TX Bit4 (978~1000) 23 989, Bit12 (971~991) 21 981,
3506 16:34:29.594014 TX Bit5 (979~1001) 23 990, Bit13 (972~991) 20 981,
3507 16:34:29.597571 TX Bit6 (979~1000) 22 989, Bit14 (971~990) 20 980,
3508 16:34:29.603788 TX Bit7 (980~999) 20 989, Bit15 (966~984) 19 975,
3509 16:34:29.604403
3510 16:34:29.604939 Write Rank1 MR14 =0x12
3511 16:34:29.614344
3512 16:34:29.617794 CH=1, VrefRange= 0, VrefLevel = 18
3513 16:34:29.620900 TX Bit0 (979~1002) 24 990, Bit8 (968~988) 21 978,
3514 16:34:29.624553 TX Bit1 (978~1000) 23 989, Bit9 (969~987) 19 978,
3515 16:34:29.631028 TX Bit2 (977~999) 23 988, Bit10 (970~991) 22 980,
3516 16:34:29.634524 TX Bit3 (976~997) 22 986, Bit11 (971~991) 21 981,
3517 16:34:29.637297 TX Bit4 (978~1000) 23 989, Bit12 (971~991) 21 981,
3518 16:34:29.644018 TX Bit5 (979~1002) 24 990, Bit13 (971~992) 22 981,
3519 16:34:29.647319 TX Bit6 (979~1001) 23 990, Bit14 (971~991) 21 981,
3520 16:34:29.654137 TX Bit7 (980~1000) 21 990, Bit15 (966~985) 20 975,
3521 16:34:29.654574
3522 16:34:29.655009 Write Rank1 MR14 =0x14
3523 16:34:29.664944
3524 16:34:29.668004 CH=1, VrefRange= 0, VrefLevel = 20
3525 16:34:29.671802 TX Bit0 (979~1003) 25 991, Bit8 (968~989) 22 978,
3526 16:34:29.674570 TX Bit1 (978~1001) 24 989, Bit9 (969~989) 21 979,
3527 16:34:29.681421 TX Bit2 (977~999) 23 988, Bit10 (970~991) 22 980,
3528 16:34:29.685019 TX Bit3 (976~997) 22 986, Bit11 (971~992) 22 981,
3529 16:34:29.687771 TX Bit4 (978~1001) 24 989, Bit12 (970~991) 22 980,
3530 16:34:29.694296 TX Bit5 (979~1002) 24 990, Bit13 (971~992) 22 981,
3531 16:34:29.698006 TX Bit6 (978~1001) 24 989, Bit14 (970~991) 22 980,
3532 16:34:29.704440 TX Bit7 (979~1000) 22 989, Bit15 (966~985) 20 975,
3533 16:34:29.704569
3534 16:34:29.704668 Write Rank1 MR14 =0x16
3535 16:34:29.715360
3536 16:34:29.718655 CH=1, VrefRange= 0, VrefLevel = 22
3537 16:34:29.721567 TX Bit0 (979~1003) 25 991, Bit8 (968~990) 23 979,
3538 16:34:29.725261 TX Bit1 (978~1001) 24 989, Bit9 (968~989) 22 978,
3539 16:34:29.731989 TX Bit2 (977~1000) 24 988, Bit10 (970~991) 22 980,
3540 16:34:29.734905 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3541 16:34:29.738701 TX Bit4 (978~1001) 24 989, Bit12 (970~992) 23 981,
3542 16:34:29.745252 TX Bit5 (978~1003) 26 990, Bit13 (971~993) 23 982,
3543 16:34:29.748698 TX Bit6 (978~1002) 25 990, Bit14 (970~991) 22 980,
3544 16:34:29.754775 TX Bit7 (979~1000) 22 989, Bit15 (965~985) 21 975,
3545 16:34:29.754874
3546 16:34:29.754976 Write Rank1 MR14 =0x18
3547 16:34:29.765955
3548 16:34:29.768940 CH=1, VrefRange= 0, VrefLevel = 24
3549 16:34:29.772518 TX Bit0 (978~1003) 26 990, Bit8 (967~990) 24 978,
3550 16:34:29.775543 TX Bit1 (978~1002) 25 990, Bit9 (969~990) 22 979,
3551 16:34:29.782566 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
3552 16:34:29.785831 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3553 16:34:29.788858 TX Bit4 (977~1002) 26 989, Bit12 (971~992) 22 981,
3554 16:34:29.795268 TX Bit5 (978~1003) 26 990, Bit13 (971~993) 23 982,
3555 16:34:29.798817 TX Bit6 (978~1002) 25 990, Bit14 (970~992) 23 981,
3556 16:34:29.805531 TX Bit7 (978~1001) 24 989, Bit15 (965~986) 22 975,
3557 16:34:29.805628
3558 16:34:29.805702 Write Rank1 MR14 =0x1a
3559 16:34:29.816511
3560 16:34:29.819536 CH=1, VrefRange= 0, VrefLevel = 26
3561 16:34:29.823274 TX Bit0 (978~1004) 27 991, Bit8 (968~991) 24 979,
3562 16:34:29.826266 TX Bit1 (978~1002) 25 990, Bit9 (968~990) 23 979,
3563 16:34:29.832889 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
3564 16:34:29.836489 TX Bit3 (975~998) 24 986, Bit11 (970~993) 24 981,
3565 16:34:29.839939 TX Bit4 (978~1002) 25 990, Bit12 (970~992) 23 981,
3566 16:34:29.846763 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3567 16:34:29.849910 TX Bit6 (978~1003) 26 990, Bit14 (970~992) 23 981,
3568 16:34:29.856742 TX Bit7 (978~1001) 24 989, Bit15 (964~986) 23 975,
3569 16:34:29.856830
3570 16:34:29.856909 Write Rank1 MR14 =0x1c
3571 16:34:29.867821
3572 16:34:29.870848 CH=1, VrefRange= 0, VrefLevel = 28
3573 16:34:29.873996 TX Bit0 (978~1005) 28 991, Bit8 (967~991) 25 979,
3574 16:34:29.877772 TX Bit1 (977~1003) 27 990, Bit9 (968~990) 23 979,
3575 16:34:29.884413 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3576 16:34:29.887313 TX Bit3 (975~998) 24 986, Bit11 (969~993) 25 981,
3577 16:34:29.891031 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3578 16:34:29.897823 TX Bit5 (978~1005) 28 991, Bit13 (970~993) 24 981,
3579 16:34:29.900818 TX Bit6 (977~1003) 27 990, Bit14 (969~992) 24 980,
3580 16:34:29.907251 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3581 16:34:29.907408
3582 16:34:29.907508 Write Rank1 MR14 =0x1e
3583 16:34:29.918933
3584 16:34:29.922115 CH=1, VrefRange= 0, VrefLevel = 30
3585 16:34:29.925235 TX Bit0 (979~1005) 27 992, Bit8 (967~991) 25 979,
3586 16:34:29.928483 TX Bit1 (977~1003) 27 990, Bit9 (968~990) 23 979,
3587 16:34:29.935503 TX Bit2 (976~1001) 26 988, Bit10 (969~992) 24 980,
3588 16:34:29.938655 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3589 16:34:29.942248 TX Bit4 (977~1003) 27 990, Bit12 (970~993) 24 981,
3590 16:34:29.948651 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3591 16:34:29.951716 TX Bit6 (978~1003) 26 990, Bit14 (969~992) 24 980,
3592 16:34:29.958573 TX Bit7 (978~1003) 26 990, Bit15 (964~987) 24 975,
3593 16:34:29.958850
3594 16:34:29.959067 Write Rank1 MR14 =0x20
3595 16:34:29.969630
3596 16:34:29.969986 CH=1, VrefRange= 0, VrefLevel = 32
3597 16:34:29.976609 TX Bit0 (978~1005) 28 991, Bit8 (968~990) 23 979,
3598 16:34:29.979833 TX Bit1 (978~1002) 25 990, Bit9 (967~990) 24 978,
3599 16:34:29.986276 TX Bit2 (976~1001) 26 988, Bit10 (969~993) 25 981,
3600 16:34:29.990022 TX Bit3 (974~999) 26 986, Bit11 (969~993) 25 981,
3601 16:34:29.993150 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3602 16:34:29.999567 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3603 16:34:30.003401 TX Bit6 (977~1004) 28 990, Bit14 (969~993) 25 981,
3604 16:34:30.009814 TX Bit7 (978~1002) 25 990, Bit15 (963~987) 25 975,
3605 16:34:30.010278
3606 16:34:30.010608 Write Rank1 MR14 =0x22
3607 16:34:30.021264
3608 16:34:30.024191 CH=1, VrefRange= 0, VrefLevel = 34
3609 16:34:30.027859 TX Bit0 (978~1005) 28 991, Bit8 (968~990) 23 979,
3610 16:34:30.030937 TX Bit1 (978~1002) 25 990, Bit9 (967~990) 24 978,
3611 16:34:30.037716 TX Bit2 (976~1001) 26 988, Bit10 (969~993) 25 981,
3612 16:34:30.040671 TX Bit3 (974~999) 26 986, Bit11 (969~993) 25 981,
3613 16:34:30.044490 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3614 16:34:30.051247 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3615 16:34:30.054181 TX Bit6 (977~1004) 28 990, Bit14 (969~993) 25 981,
3616 16:34:30.060807 TX Bit7 (978~1002) 25 990, Bit15 (963~987) 25 975,
3617 16:34:30.061380
3618 16:34:30.061877 Write Rank1 MR14 =0x24
3619 16:34:30.071507
3620 16:34:30.074830 CH=1, VrefRange= 0, VrefLevel = 36
3621 16:34:30.078135 TX Bit0 (978~1005) 28 991, Bit8 (968~990) 23 979,
3622 16:34:30.081774 TX Bit1 (978~1002) 25 990, Bit9 (967~990) 24 978,
3623 16:34:30.088146 TX Bit2 (976~1001) 26 988, Bit10 (969~993) 25 981,
3624 16:34:30.091494 TX Bit3 (974~999) 26 986, Bit11 (969~993) 25 981,
3625 16:34:30.094564 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3626 16:34:30.101443 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3627 16:34:30.104557 TX Bit6 (977~1004) 28 990, Bit14 (969~993) 25 981,
3628 16:34:30.111467 TX Bit7 (978~1002) 25 990, Bit15 (963~987) 25 975,
3629 16:34:30.111687
3630 16:34:30.111859 Write Rank1 MR14 =0x26
3631 16:34:30.122121
3632 16:34:30.125849 CH=1, VrefRange= 0, VrefLevel = 38
3633 16:34:30.128922 TX Bit0 (978~1005) 28 991, Bit8 (968~990) 23 979,
3634 16:34:30.132321 TX Bit1 (978~1002) 25 990, Bit9 (967~990) 24 978,
3635 16:34:30.139151 TX Bit2 (976~1001) 26 988, Bit10 (969~993) 25 981,
3636 16:34:30.142187 TX Bit3 (974~999) 26 986, Bit11 (969~993) 25 981,
3637 16:34:30.145781 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3638 16:34:30.152440 TX Bit5 (979~1005) 27 992, Bit13 (970~993) 24 981,
3639 16:34:30.155604 TX Bit6 (977~1004) 28 990, Bit14 (969~993) 25 981,
3640 16:34:30.162010 TX Bit7 (978~1002) 25 990, Bit15 (963~987) 25 975,
3641 16:34:30.162632
3642 16:34:30.163006
3643 16:34:30.165486 TX Vref found, early break! 377< 385
3644 16:34:30.168566 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3645 16:34:30.172437 u1DelayCellOfst[0]=6 cells (5 PI)
3646 16:34:30.175287 u1DelayCellOfst[1]=5 cells (4 PI)
3647 16:34:30.178434 u1DelayCellOfst[2]=2 cells (2 PI)
3648 16:34:30.181632 u1DelayCellOfst[3]=0 cells (0 PI)
3649 16:34:30.185400 u1DelayCellOfst[4]=5 cells (4 PI)
3650 16:34:30.188434 u1DelayCellOfst[5]=7 cells (6 PI)
3651 16:34:30.191631 u1DelayCellOfst[6]=5 cells (4 PI)
3652 16:34:30.192255 u1DelayCellOfst[7]=5 cells (4 PI)
3653 16:34:30.198636 Byte0, DQ PI dly=986, DQM PI dly= 989
3654 16:34:30.201858 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3655 16:34:30.202186
3656 16:34:30.204873 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3657 16:34:30.205126
3658 16:34:30.208080 u1DelayCellOfst[8]=5 cells (4 PI)
3659 16:34:30.211542 u1DelayCellOfst[9]=3 cells (3 PI)
3660 16:34:30.215115 u1DelayCellOfst[10]=7 cells (6 PI)
3661 16:34:30.218091 u1DelayCellOfst[11]=7 cells (6 PI)
3662 16:34:30.221864 u1DelayCellOfst[12]=7 cells (6 PI)
3663 16:34:30.225010 u1DelayCellOfst[13]=7 cells (6 PI)
3664 16:34:30.228318 u1DelayCellOfst[14]=7 cells (6 PI)
3665 16:34:30.231385 u1DelayCellOfst[15]=0 cells (0 PI)
3666 16:34:30.234563 Byte1, DQ PI dly=975, DQM PI dly= 978
3667 16:34:30.238134 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
3668 16:34:30.238246
3669 16:34:30.241126 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
3670 16:34:30.241213
3671 16:34:30.244626 Write Rank1 MR14 =0x20
3672 16:34:30.244708
3673 16:34:30.248237 Final TX Range 0 Vref 32
3674 16:34:30.248351
3675 16:34:30.254351 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3676 16:34:30.254437
3677 16:34:30.261145 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3678 16:34:30.267683 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3679 16:34:30.274580 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3680 16:34:30.274668 Write Rank1 MR3 =0xb0
3681 16:34:30.277849 DramC Write-DBI on
3682 16:34:30.277942 ==
3683 16:34:30.284898 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3684 16:34:30.288071 fsp= 1, odt_onoff= 1, Byte mode= 0
3685 16:34:30.288176 ==
3686 16:34:30.291230 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3687 16:34:30.291373
3688 16:34:30.294455 Begin, DQ Scan Range 698~762
3689 16:34:30.294604
3690 16:34:30.294740
3691 16:34:30.294872 TX Vref Scan disable
3692 16:34:30.298161 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3693 16:34:30.304071 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3694 16:34:30.307942 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3695 16:34:30.310929 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3696 16:34:30.314343 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3697 16:34:30.317803 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3698 16:34:30.321056 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3699 16:34:30.324119 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3700 16:34:30.327728 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3701 16:34:30.330987 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3702 16:34:30.334241 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3703 16:34:30.337555 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3704 16:34:30.341215 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3705 16:34:30.344690 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3706 16:34:30.347645 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3707 16:34:30.351277 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3708 16:34:30.354177 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3709 16:34:30.357433 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3710 16:34:30.361238 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3711 16:34:30.364319 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3712 16:34:30.367905 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3713 16:34:30.374406 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3714 16:34:30.377424 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3715 16:34:30.380678 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3716 16:34:30.384248 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3717 16:34:30.387282 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3718 16:34:30.394085 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3719 16:34:30.397821 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3720 16:34:30.401044 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3721 16:34:30.404051 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3722 16:34:30.407758 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3723 16:34:30.411008 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3724 16:34:30.414129 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3725 16:34:30.417922 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3726 16:34:30.421027 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3727 16:34:30.424130 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3728 16:34:30.427681 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3729 16:34:30.431212 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3730 16:34:30.434439 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3731 16:34:30.437720 Byte0, DQ PI dly=735, DQM PI dly= 735
3732 16:34:30.444196 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
3733 16:34:30.444324
3734 16:34:30.447468 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
3735 16:34:30.447596
3736 16:34:30.450841 Byte1, DQ PI dly=723, DQM PI dly= 723
3737 16:34:30.454126 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3738 16:34:30.454241
3739 16:34:30.460462 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3740 16:34:30.460593
3741 16:34:30.467139 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3742 16:34:30.473853 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3743 16:34:30.480395 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3744 16:34:30.480533 Write Rank1 MR3 =0x30
3745 16:34:30.483599 DramC Write-DBI off
3746 16:34:30.483709
3747 16:34:30.483816 [DATLAT]
3748 16:34:30.487297 Freq=1600, CH1 RK1, use_rxtx_scan=0
3749 16:34:30.487423
3750 16:34:30.490473 DATLAT Default: 0x10
3751 16:34:30.490587 7, 0xFFFF, sum=0
3752 16:34:30.493558 8, 0xFFFF, sum=0
3753 16:34:30.493686 9, 0xFFFF, sum=0
3754 16:34:30.497334 10, 0xFFFF, sum=0
3755 16:34:30.497456 11, 0xFFFF, sum=0
3756 16:34:30.500467 12, 0xFFFF, sum=0
3757 16:34:30.500598 13, 0xFFFF, sum=0
3758 16:34:30.504017 14, 0x0, sum=1
3759 16:34:30.504143 15, 0x0, sum=2
3760 16:34:30.507175 16, 0x0, sum=3
3761 16:34:30.507302 17, 0x0, sum=4
3762 16:34:30.510296 pattern=2 first_step=14 total pass=5 best_step=16
3763 16:34:30.510417 ==
3764 16:34:30.517004 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3765 16:34:30.520193 fsp= 1, odt_onoff= 1, Byte mode= 0
3766 16:34:30.520280 ==
3767 16:34:30.523861 Start DQ dly to find pass range UseTestEngine =1
3768 16:34:30.526814 x-axis: bit #, y-axis: DQ dly (-127~63)
3769 16:34:30.530552 RX Vref Scan = 0
3770 16:34:30.533427 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3771 16:34:30.537188 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3772 16:34:30.537300 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3773 16:34:30.540105 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3774 16:34:30.543412 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3775 16:34:30.546666 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3776 16:34:30.550227 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3777 16:34:30.553365 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3778 16:34:30.557027 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3779 16:34:30.560071 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3780 16:34:30.560163 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3781 16:34:30.563515 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3782 16:34:30.566950 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3783 16:34:30.570342 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3784 16:34:30.573878 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3785 16:34:30.576690 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3786 16:34:30.580499 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3787 16:34:30.583715 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3788 16:34:30.583849 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3789 16:34:30.586699 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3790 16:34:30.590247 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3791 16:34:30.593791 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3792 16:34:30.596816 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3793 16:34:30.599996 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3794 16:34:30.603812 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3795 16:34:30.603935 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3796 16:34:30.606876 0, [0] xxxoxxxx ooxxxxxo [MSB]
3797 16:34:30.609927 1, [0] xxooxxxx ooxxxxxo [MSB]
3798 16:34:30.613719 2, [0] xxooxxxx ooxxxxxo [MSB]
3799 16:34:30.616881 3, [0] xxooxxxo ooxxxxxo [MSB]
3800 16:34:30.620325 4, [0] oooooxxo oooxooxo [MSB]
3801 16:34:30.623581 32, [0] oooooooo ooooooox [MSB]
3802 16:34:30.626652 33, [0] oooooooo ooooooox [MSB]
3803 16:34:30.630294 34, [0] oooooooo ooooooox [MSB]
3804 16:34:30.633349 35, [0] oooxoooo oxooooox [MSB]
3805 16:34:30.633488 36, [0] oooxoooo xxooooox [MSB]
3806 16:34:30.636902 37, [0] ooxxoooo xxooooox [MSB]
3807 16:34:30.640030 38, [0] ooxxoooo xxooooox [MSB]
3808 16:34:30.643238 39, [0] ooxxooox xxxoooox [MSB]
3809 16:34:30.646466 40, [0] oxxxxoox xxxoooox [MSB]
3810 16:34:30.649919 41, [0] xxxxxxox xxxxxxxx [MSB]
3811 16:34:30.653372 42, [0] xxxxxxxx xxxxxxxx [MSB]
3812 16:34:30.656746 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
3813 16:34:30.660268 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
3814 16:34:30.663198 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
3815 16:34:30.666994 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3816 16:34:30.670015 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3817 16:34:30.673467 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3818 16:34:30.676502 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3819 16:34:30.680061 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3820 16:34:30.683226 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
3821 16:34:30.686303 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3822 16:34:30.689916 iDelay=42, Bit 10, Center 21 (4 ~ 38) 35
3823 16:34:30.696921 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3824 16:34:30.700037 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3825 16:34:30.702877 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
3826 16:34:30.706075 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3827 16:34:30.709555 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3828 16:34:30.709667 ==
3829 16:34:30.715926 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3830 16:34:30.716021 fsp= 1, odt_onoff= 1, Byte mode= 0
3831 16:34:30.719574 ==
3832 16:34:30.719660 DQS Delay:
3833 16:34:30.719730 DQS0 = 0, DQS1 = 0
3834 16:34:30.722558 DQM Delay:
3835 16:34:30.722667 DQM0 = 20, DQM1 = 19
3836 16:34:30.726285 DQ Delay:
3837 16:34:30.729384 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3838 16:34:30.729506 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3839 16:34:30.732506 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3840 16:34:30.736072 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
3841 16:34:30.739130
3842 16:34:30.739243
3843 16:34:30.739342
3844 16:34:30.739453 [DramC_TX_OE_Calibration] TA2
3845 16:34:30.742823 Original DQ_B0 (3 6) =30, OEN = 27
3846 16:34:30.745983 Original DQ_B1 (3 6) =30, OEN = 27
3847 16:34:30.749216 23, 0x0, End_B0=23 End_B1=23
3848 16:34:30.752489 24, 0x0, End_B0=24 End_B1=24
3849 16:34:30.756188 25, 0x0, End_B0=25 End_B1=25
3850 16:34:30.756277 26, 0x0, End_B0=26 End_B1=26
3851 16:34:30.759418 27, 0x0, End_B0=27 End_B1=27
3852 16:34:30.763020 28, 0x0, End_B0=28 End_B1=28
3853 16:34:30.765868 29, 0x0, End_B0=29 End_B1=29
3854 16:34:30.765981 30, 0x0, End_B0=30 End_B1=30
3855 16:34:30.769209 31, 0xFFFF, End_B0=30 End_B1=30
3856 16:34:30.775770 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3857 16:34:30.782526 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3858 16:34:30.782648
3859 16:34:30.782753
3860 16:34:30.782856 Write Rank1 MR23 =0x3f
3861 16:34:30.785766 [DQSOSC]
3862 16:34:30.792724 [DQSOSCAuto] RK1, (LSB)MR18= 0xcccc, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
3863 16:34:30.799098 CH1_RK1: MR19=0x202, MR18=0xCCCC, DQSOSC=439, MR23=63, INC=12, DEC=19
3864 16:34:30.802549 Write Rank1 MR23 =0x3f
3865 16:34:30.802632 [DQSOSC]
3866 16:34:30.809477 [DQSOSCAuto] RK1, (LSB)MR18= 0xcbcb, (MSB)MR19= 0x202, tDQSOscB0 = 440 ps tDQSOscB1 = 440 ps
3867 16:34:30.812386 CH1 RK1: MR19=202, MR18=CBCB
3868 16:34:30.815901 [RxdqsGatingPostProcess] freq 1600
3869 16:34:30.822333 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3870 16:34:30.822447 Rank: 0
3871 16:34:30.826065 best DQS0 dly(2T, 0.5T) = (2, 6)
3872 16:34:30.829050 best DQS1 dly(2T, 0.5T) = (2, 6)
3873 16:34:30.832141 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3874 16:34:30.835897 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3875 16:34:30.836017 Rank: 1
3876 16:34:30.838950 best DQS0 dly(2T, 0.5T) = (2, 5)
3877 16:34:30.842610 best DQS1 dly(2T, 0.5T) = (2, 6)
3878 16:34:30.845861 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3879 16:34:30.848915 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3880 16:34:30.852173 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3881 16:34:30.855298 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3882 16:34:30.859086 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3883 16:34:30.859200
3884 16:34:30.862263
3885 16:34:30.862383 [Calibration Summary] Freqency 1600
3886 16:34:30.865333 CH 0, Rank 0
3887 16:34:30.865452 All Pass.
3888 16:34:30.865553
3889 16:34:30.869073 CH 0, Rank 1
3890 16:34:30.869181 All Pass.
3891 16:34:30.869291
3892 16:34:30.869388 CH 1, Rank 0
3893 16:34:30.872105 All Pass.
3894 16:34:30.872198
3895 16:34:30.872268 CH 1, Rank 1
3896 16:34:30.872360 All Pass.
3897 16:34:30.872456
3898 16:34:30.878861 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3899 16:34:30.885632 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3900 16:34:30.892375 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3901 16:34:30.895416 Write Rank0 MR3 =0xb0
3902 16:34:30.902307 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3903 16:34:30.909006 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3904 16:34:30.915676 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3905 16:34:30.918664 Write Rank1 MR3 =0xb0
3906 16:34:30.925699 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3907 16:34:30.932389 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3908 16:34:30.938516 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3909 16:34:30.941956 Write Rank0 MR3 =0xb0
3910 16:34:30.945122 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3911 16:34:30.955160 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3912 16:34:30.961787 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3913 16:34:30.961915 Write Rank1 MR3 =0xb0
3914 16:34:30.965512 DramC Write-DBI on
3915 16:34:30.968642 [GetDramInforAfterCalByMRR] Vendor 6.
3916 16:34:30.971796 [GetDramInforAfterCalByMRR] Revision 505.
3917 16:34:30.971907 MR8 1111
3918 16:34:30.978500 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3919 16:34:30.978629 MR8 1111
3920 16:34:30.982284 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3921 16:34:30.985300 MR8 1111
3922 16:34:30.988889 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3923 16:34:30.989019 MR8 1111
3924 16:34:30.995623 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3925 16:34:31.002461 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3926 16:34:31.005355 Write Rank0 MR13 =0xd0
3927 16:34:31.008818 Write Rank1 MR13 =0xd0
3928 16:34:31.008946 Write Rank0 MR13 =0xd0
3929 16:34:31.012217 Write Rank1 MR13 =0xd0
3930 16:34:31.015389 Save calibration result to emmc
3931 16:34:31.015495
3932 16:34:31.015568
3933 16:34:31.018503 [DramcModeReg_Check] Freq_1600, FSP_1
3934 16:34:31.018622 FSP_1, CH_0, RK0
3935 16:34:31.022201 Write Rank0 MR13 =0xd8
3936 16:34:31.025446 MR12 = 0x5e (global = 0x5e) match
3937 16:34:31.029000 MR14 = 0x1a (global = 0x1a) match
3938 16:34:31.029108 FSP_1, CH_0, RK1
3939 16:34:31.032109 Write Rank1 MR13 =0xd8
3940 16:34:31.035263 MR12 = 0x5a (global = 0x5a) match
3941 16:34:31.038722 MR14 = 0x20 (global = 0x20) match
3942 16:34:31.038839 FSP_1, CH_1, RK0
3943 16:34:31.041782 Write Rank0 MR13 =0xd8
3944 16:34:31.045369 MR12 = 0x60 (global = 0x60) match
3945 16:34:31.048810 MR14 = 0x1e (global = 0x1e) match
3946 16:34:31.048935 FSP_1, CH_1, RK1
3947 16:34:31.052341 Write Rank1 MR13 =0xd8
3948 16:34:31.055592 MR12 = 0x5e (global = 0x5e) match
3949 16:34:31.058737 MR14 = 0x20 (global = 0x20) match
3950 16:34:31.058849
3951 16:34:31.061768 [MEM_TEST] 02: After DFS, before run time config
3952 16:34:31.073466 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3953 16:34:31.073570
3954 16:34:31.073642 [TA2_TEST]
3955 16:34:31.073709 === TA2 HW
3956 16:34:31.077324 TA2 PAT: XTALK
3957 16:34:31.080354 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3958 16:34:31.087240 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3959 16:34:31.090377 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3960 16:34:31.093416 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3961 16:34:31.097170
3962 16:34:31.097291
3963 16:34:31.097408 Settings after calibration
3964 16:34:31.097519
3965 16:34:31.100344 [DramcRunTimeConfig]
3966 16:34:31.103983 TransferPLLToSPMControl - MODE SW PHYPLL
3967 16:34:31.104075 TX_TRACKING: ON
3968 16:34:31.107169 RX_TRACKING: ON
3969 16:34:31.107255 HW_GATING: ON
3970 16:34:31.110108 HW_GATING DBG: OFF
3971 16:34:31.110240 ddr_geometry:1
3972 16:34:31.113770 ddr_geometry:1
3973 16:34:31.113891 ddr_geometry:1
3974 16:34:31.114002 ddr_geometry:1
3975 16:34:31.116898 ddr_geometry:1
3976 16:34:31.117013 ddr_geometry:1
3977 16:34:31.120183 ddr_geometry:1
3978 16:34:31.120306 ddr_geometry:1
3979 16:34:31.123957 High Freq DUMMY_READ_FOR_TRACKING: ON
3980 16:34:31.126881 ZQCS_ENABLE_LP4: OFF
3981 16:34:31.130369 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3982 16:34:31.133816 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3983 16:34:31.133938 SPM_CONTROL_AFTERK: ON
3984 16:34:31.136751 IMPEDANCE_TRACKING: ON
3985 16:34:31.136869 TEMP_SENSOR: ON
3986 16:34:31.140313 PER_BANK_REFRESH: ON
3987 16:34:31.140395 HW_SAVE_FOR_SR: ON
3988 16:34:31.143795 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3989 16:34:31.146918 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3990 16:34:31.150130 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3991 16:34:31.153728 Read ODT Tracking: ON
3992 16:34:31.156782 =========================
3993 16:34:31.156893
3994 16:34:31.157003 [TA2_TEST]
3995 16:34:31.157113 === TA2 HW
3996 16:34:31.163685 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3997 16:34:31.166890 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3998 16:34:31.173445 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3999 16:34:31.176980 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
4000 16:34:31.177107
4001 16:34:31.180085 [MEM_TEST] 03: After run time config
4002 16:34:31.191948 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
4003 16:34:31.194982 [complex_mem_test] start addr:0x40024000, len:131072
4004 16:34:31.399021 1st complex R/W mem test pass
4005 16:34:31.405576 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
4006 16:34:31.409321 sync preloader write leveling
4007 16:34:31.412469 sync preloader cbt_mr12
4008 16:34:31.415808 sync preloader cbt_clk_dly
4009 16:34:31.415903 sync preloader cbt_cmd_dly
4010 16:34:31.418651 sync preloader cbt_cs
4011 16:34:31.422276 sync preloader cbt_ca_perbit_delay
4012 16:34:31.422394 sync preloader clk_delay
4013 16:34:31.425632 sync preloader dqs_delay
4014 16:34:31.428548 sync preloader u1Gating2T_Save
4015 16:34:31.432349 sync preloader u1Gating05T_Save
4016 16:34:31.435450 sync preloader u1Gatingfine_tune_Save
4017 16:34:31.438523 sync preloader u1Gatingucpass_count_Save
4018 16:34:31.442308 sync preloader u1TxWindowPerbitVref_Save
4019 16:34:31.445268 sync preloader u1TxCenter_min_Save
4020 16:34:31.448947 sync preloader u1TxCenter_max_Save
4021 16:34:31.452093 sync preloader u1Txwin_center_Save
4022 16:34:31.455273 sync preloader u1Txfirst_pass_Save
4023 16:34:31.459049 sync preloader u1Txlast_pass_Save
4024 16:34:31.459165 sync preloader u1RxDatlat_Save
4025 16:34:31.462116 sync preloader u1RxWinPerbitVref_Save
4026 16:34:31.468802 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4027 16:34:31.471935 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4028 16:34:31.475743 sync preloader delay_cell_unit
4029 16:34:31.482253 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4030 16:34:31.485313 sync preloader write leveling
4031 16:34:31.485440 sync preloader cbt_mr12
4032 16:34:31.488945 sync preloader cbt_clk_dly
4033 16:34:31.491954 sync preloader cbt_cmd_dly
4034 16:34:31.492074 sync preloader cbt_cs
4035 16:34:31.495791 sync preloader cbt_ca_perbit_delay
4036 16:34:31.498826 sync preloader clk_delay
4037 16:34:31.502389 sync preloader dqs_delay
4038 16:34:31.502500 sync preloader u1Gating2T_Save
4039 16:34:31.505561 sync preloader u1Gating05T_Save
4040 16:34:31.508662 sync preloader u1Gatingfine_tune_Save
4041 16:34:31.512265 sync preloader u1Gatingucpass_count_Save
4042 16:34:31.515786 sync preloader u1TxWindowPerbitVref_Save
4043 16:34:31.519061 sync preloader u1TxCenter_min_Save
4044 16:34:31.521999 sync preloader u1TxCenter_max_Save
4045 16:34:31.525665 sync preloader u1Txwin_center_Save
4046 16:34:31.529160 sync preloader u1Txfirst_pass_Save
4047 16:34:31.532113 sync preloader u1Txlast_pass_Save
4048 16:34:31.535451 sync preloader u1RxDatlat_Save
4049 16:34:31.538903 sync preloader u1RxWinPerbitVref_Save
4050 16:34:31.541914 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4051 16:34:31.545437 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4052 16:34:31.548461 sync preloader delay_cell_unit
4053 16:34:31.555486 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4054 16:34:31.558607 sync preloader write leveling
4055 16:34:31.562226 sync preloader cbt_mr12
4056 16:34:31.562343 sync preloader cbt_clk_dly
4057 16:34:31.565370 sync preloader cbt_cmd_dly
4058 16:34:31.569031 sync preloader cbt_cs
4059 16:34:31.572273 sync preloader cbt_ca_perbit_delay
4060 16:34:31.572389 sync preloader clk_delay
4061 16:34:31.575391 sync preloader dqs_delay
4062 16:34:31.578559 sync preloader u1Gating2T_Save
4063 16:34:31.582129 sync preloader u1Gating05T_Save
4064 16:34:31.585090 sync preloader u1Gatingfine_tune_Save
4065 16:34:31.588854 sync preloader u1Gatingucpass_count_Save
4066 16:34:31.591978 sync preloader u1TxWindowPerbitVref_Save
4067 16:34:31.595535 sync preloader u1TxCenter_min_Save
4068 16:34:31.598552 sync preloader u1TxCenter_max_Save
4069 16:34:31.602204 sync preloader u1Txwin_center_Save
4070 16:34:31.605260 sync preloader u1Txfirst_pass_Save
4071 16:34:31.608444 sync preloader u1Txlast_pass_Save
4072 16:34:31.608529 sync preloader u1RxDatlat_Save
4073 16:34:31.611688 sync preloader u1RxWinPerbitVref_Save
4074 16:34:31.618380 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4075 16:34:31.621597 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4076 16:34:31.624945 sync preloader delay_cell_unit
4077 16:34:31.628435 just_for_test_dump_coreboot_params dump all params
4078 16:34:31.631676 dump source = 0x0
4079 16:34:31.631763 dump params frequency:1600
4080 16:34:31.635168 dump params rank number:2
4081 16:34:31.635290
4082 16:34:31.638479 dump params write leveling
4083 16:34:31.641726 write leveling[0][0][0] = 0x21
4084 16:34:31.641844 write leveling[0][0][1] = 0x17
4085 16:34:31.645084 write leveling[0][1][0] = 0x19
4086 16:34:31.648433 write leveling[0][1][1] = 0x18
4087 16:34:31.651776 write leveling[1][0][0] = 0x21
4088 16:34:31.655148 write leveling[1][0][1] = 0x18
4089 16:34:31.658091 write leveling[1][1][0] = 0x22
4090 16:34:31.658194 write leveling[1][1][1] = 0x18
4091 16:34:31.661840 dump params cbt_cs
4092 16:34:31.664825 cbt_cs[0][0] = 0x8
4093 16:34:31.664904 cbt_cs[0][1] = 0x8
4094 16:34:31.668019 cbt_cs[1][0] = 0xb
4095 16:34:31.668098 cbt_cs[1][1] = 0xb
4096 16:34:31.671828 dump params cbt_mr12
4097 16:34:31.671918 cbt_mr12[0][0] = 0x1e
4098 16:34:31.674921 cbt_mr12[0][1] = 0x1a
4099 16:34:31.675011 cbt_mr12[1][0] = 0x20
4100 16:34:31.678040 cbt_mr12[1][1] = 0x1e
4101 16:34:31.681705 dump params tx window
4102 16:34:31.681794 tx_center_min[0][0][0] = 982
4103 16:34:31.684770 tx_center_max[0][0][0] = 989
4104 16:34:31.687948 tx_center_min[0][0][1] = 973
4105 16:34:31.691112 tx_center_max[0][0][1] = 980
4106 16:34:31.694803 tx_center_min[0][1][0] = 978
4107 16:34:31.694898 tx_center_max[0][1][0] = 984
4108 16:34:31.697817 tx_center_min[0][1][1] = 978
4109 16:34:31.701463 tx_center_max[0][1][1] = 984
4110 16:34:31.704376 tx_center_min[1][0][0] = 988
4111 16:34:31.708149 tx_center_max[1][0][0] = 992
4112 16:34:31.708235 tx_center_min[1][0][1] = 977
4113 16:34:31.711286 tx_center_max[1][0][1] = 983
4114 16:34:31.714937 tx_center_min[1][1][0] = 986
4115 16:34:31.717870 tx_center_max[1][1][0] = 992
4116 16:34:31.721079 tx_center_min[1][1][1] = 975
4117 16:34:31.721161 tx_center_max[1][1][1] = 981
4118 16:34:31.724270 dump params tx window
4119 16:34:31.727961 tx_win_center[0][0][0] = 989
4120 16:34:31.730975 tx_first_pass[0][0][0] = 977
4121 16:34:31.731101 tx_last_pass[0][0][0] = 1001
4122 16:34:31.734349 tx_win_center[0][0][1] = 988
4123 16:34:31.738156 tx_first_pass[0][0][1] = 976
4124 16:34:31.741186 tx_last_pass[0][0][1] = 1000
4125 16:34:31.741315 tx_win_center[0][0][2] = 988
4126 16:34:31.744772 tx_first_pass[0][0][2] = 977
4127 16:34:31.747689 tx_last_pass[0][0][2] = 1000
4128 16:34:31.751144 tx_win_center[0][0][3] = 982
4129 16:34:31.754749 tx_first_pass[0][0][3] = 970
4130 16:34:31.754870 tx_last_pass[0][0][3] = 994
4131 16:34:31.757825 tx_win_center[0][0][4] = 987
4132 16:34:31.761367 tx_first_pass[0][0][4] = 976
4133 16:34:31.764775 tx_last_pass[0][0][4] = 999
4134 16:34:31.764896 tx_win_center[0][0][5] = 985
4135 16:34:31.768104 tx_first_pass[0][0][5] = 972
4136 16:34:31.771568 tx_last_pass[0][0][5] = 998
4137 16:34:31.774287 tx_win_center[0][0][6] = 987
4138 16:34:31.777991 tx_first_pass[0][0][6] = 975
4139 16:34:31.778084 tx_last_pass[0][0][6] = 999
4140 16:34:31.780950 tx_win_center[0][0][7] = 988
4141 16:34:31.784499 tx_first_pass[0][0][7] = 976
4142 16:34:31.788251 tx_last_pass[0][0][7] = 1000
4143 16:34:31.788342 tx_win_center[0][0][8] = 973
4144 16:34:31.791371 tx_first_pass[0][0][8] = 962
4145 16:34:31.794425 tx_last_pass[0][0][8] = 985
4146 16:34:31.798023 tx_win_center[0][0][9] = 977
4147 16:34:31.801178 tx_first_pass[0][0][9] = 966
4148 16:34:31.801270 tx_last_pass[0][0][9] = 989
4149 16:34:31.804819 tx_win_center[0][0][10] = 980
4150 16:34:31.807852 tx_first_pass[0][0][10] = 969
4151 16:34:31.810917 tx_last_pass[0][0][10] = 992
4152 16:34:31.814659 tx_win_center[0][0][11] = 975
4153 16:34:31.814774 tx_first_pass[0][0][11] = 964
4154 16:34:31.817767 tx_last_pass[0][0][11] = 987
4155 16:34:31.821513 tx_win_center[0][0][12] = 977
4156 16:34:31.824576 tx_first_pass[0][0][12] = 966
4157 16:34:31.824684 tx_last_pass[0][0][12] = 989
4158 16:34:31.828214 tx_win_center[0][0][13] = 977
4159 16:34:31.831374 tx_first_pass[0][0][13] = 966
4160 16:34:31.834426 tx_last_pass[0][0][13] = 989
4161 16:34:31.838109 tx_win_center[0][0][14] = 978
4162 16:34:31.841544 tx_first_pass[0][0][14] = 966
4163 16:34:31.841732 tx_last_pass[0][0][14] = 990
4164 16:34:31.844843 tx_win_center[0][0][15] = 980
4165 16:34:31.847884 tx_first_pass[0][0][15] = 968
4166 16:34:31.851492 tx_last_pass[0][0][15] = 992
4167 16:34:31.854795 tx_win_center[0][1][0] = 984
4168 16:34:31.855018 tx_first_pass[0][1][0] = 972
4169 16:34:31.857946 tx_last_pass[0][1][0] = 997
4170 16:34:31.861554 tx_win_center[0][1][1] = 983
4171 16:34:31.864702 tx_first_pass[0][1][1] = 971
4172 16:34:31.865122 tx_last_pass[0][1][1] = 995
4173 16:34:31.868389 tx_win_center[0][1][2] = 984
4174 16:34:31.871488 tx_first_pass[0][1][2] = 972
4175 16:34:31.874907 tx_last_pass[0][1][2] = 996
4176 16:34:31.878149 tx_win_center[0][1][3] = 978
4177 16:34:31.878644 tx_first_pass[0][1][3] = 966
4178 16:34:31.881685 tx_last_pass[0][1][3] = 991
4179 16:34:31.884635 tx_win_center[0][1][4] = 982
4180 16:34:31.887941 tx_first_pass[0][1][4] = 970
4181 16:34:31.888420 tx_last_pass[0][1][4] = 995
4182 16:34:31.891160 tx_win_center[0][1][5] = 980
4183 16:34:31.894551 tx_first_pass[0][1][5] = 968
4184 16:34:31.898288 tx_last_pass[0][1][5] = 992
4185 16:34:31.898757 tx_win_center[0][1][6] = 980
4186 16:34:31.901419 tx_first_pass[0][1][6] = 968
4187 16:34:31.904499 tx_last_pass[0][1][6] = 993
4188 16:34:31.908038 tx_win_center[0][1][7] = 982
4189 16:34:31.911659 tx_first_pass[0][1][7] = 970
4190 16:34:31.912055 tx_last_pass[0][1][7] = 995
4191 16:34:31.914623 tx_win_center[0][1][8] = 978
4192 16:34:31.918478 tx_first_pass[0][1][8] = 967
4193 16:34:31.921600 tx_last_pass[0][1][8] = 990
4194 16:34:31.922066 tx_win_center[0][1][9] = 979
4195 16:34:31.925264 tx_first_pass[0][1][9] = 968
4196 16:34:31.928423 tx_last_pass[0][1][9] = 991
4197 16:34:31.931455 tx_win_center[0][1][10] = 984
4198 16:34:31.935130 tx_first_pass[0][1][10] = 972
4199 16:34:31.935706 tx_last_pass[0][1][10] = 997
4200 16:34:31.938290 tx_win_center[0][1][11] = 979
4201 16:34:31.941436 tx_first_pass[0][1][11] = 967
4202 16:34:31.944934 tx_last_pass[0][1][11] = 991
4203 16:34:31.948514 tx_win_center[0][1][12] = 980
4204 16:34:31.948866 tx_first_pass[0][1][12] = 968
4205 16:34:31.951347 tx_last_pass[0][1][12] = 992
4206 16:34:31.954939 tx_win_center[0][1][13] = 979
4207 16:34:31.957951 tx_first_pass[0][1][13] = 968
4208 16:34:31.961639 tx_last_pass[0][1][13] = 991
4209 16:34:31.962331 tx_win_center[0][1][14] = 980
4210 16:34:31.964833 tx_first_pass[0][1][14] = 968
4211 16:34:31.968278 tx_last_pass[0][1][14] = 992
4212 16:34:31.971578 tx_win_center[0][1][15] = 983
4213 16:34:31.974295 tx_first_pass[0][1][15] = 971
4214 16:34:31.974884 tx_last_pass[0][1][15] = 995
4215 16:34:31.977782 tx_win_center[1][0][0] = 992
4216 16:34:31.981633 tx_first_pass[1][0][0] = 979
4217 16:34:31.984487 tx_last_pass[1][0][0] = 1006
4218 16:34:31.988081 tx_win_center[1][0][1] = 990
4219 16:34:31.988477 tx_first_pass[1][0][1] = 978
4220 16:34:31.991943 tx_last_pass[1][0][1] = 1003
4221 16:34:31.994709 tx_win_center[1][0][2] = 989
4222 16:34:31.998206 tx_first_pass[1][0][2] = 977
4223 16:34:32.001133 tx_last_pass[1][0][2] = 1002
4224 16:34:32.001601 tx_win_center[1][0][3] = 988
4225 16:34:32.004664 tx_first_pass[1][0][3] = 976
4226 16:34:32.008082 tx_last_pass[1][0][3] = 1000
4227 16:34:32.011355 tx_win_center[1][0][4] = 992
4228 16:34:32.011826 tx_first_pass[1][0][4] = 979
4229 16:34:32.014866 tx_last_pass[1][0][4] = 1005
4230 16:34:32.017743 tx_win_center[1][0][5] = 992
4231 16:34:32.021546 tx_first_pass[1][0][5] = 980
4232 16:34:32.024630 tx_last_pass[1][0][5] = 1005
4233 16:34:32.025325 tx_win_center[1][0][6] = 991
4234 16:34:32.028288 tx_first_pass[1][0][6] = 978
4235 16:34:32.031326 tx_last_pass[1][0][6] = 1004
4236 16:34:32.034490 tx_win_center[1][0][7] = 990
4237 16:34:32.034864 tx_first_pass[1][0][7] = 978
4238 16:34:32.038224 tx_last_pass[1][0][7] = 1003
4239 16:34:32.041491 tx_win_center[1][0][8] = 980
4240 16:34:32.044519 tx_first_pass[1][0][8] = 968
4241 16:34:32.048096 tx_last_pass[1][0][8] = 992
4242 16:34:32.048450 tx_win_center[1][0][9] = 980
4243 16:34:32.051142 tx_first_pass[1][0][9] = 969
4244 16:34:32.054660 tx_last_pass[1][0][9] = 991
4245 16:34:32.058138 tx_win_center[1][0][10] = 981
4246 16:34:32.061247 tx_first_pass[1][0][10] = 970
4247 16:34:32.061609 tx_last_pass[1][0][10] = 993
4248 16:34:32.064529 tx_win_center[1][0][11] = 982
4249 16:34:32.067672 tx_first_pass[1][0][11] = 970
4250 16:34:32.071388 tx_last_pass[1][0][11] = 994
4251 16:34:32.074397 tx_win_center[1][0][12] = 982
4252 16:34:32.074754 tx_first_pass[1][0][12] = 971
4253 16:34:32.077995 tx_last_pass[1][0][12] = 994
4254 16:34:32.080896 tx_win_center[1][0][13] = 983
4255 16:34:32.084561 tx_first_pass[1][0][13] = 972
4256 16:34:32.087606 tx_last_pass[1][0][13] = 994
4257 16:34:32.087965 tx_win_center[1][0][14] = 982
4258 16:34:32.091282 tx_first_pass[1][0][14] = 970
4259 16:34:32.094142 tx_last_pass[1][0][14] = 994
4260 16:34:32.097733 tx_win_center[1][0][15] = 977
4261 16:34:32.100772 tx_first_pass[1][0][15] = 966
4262 16:34:32.100864 tx_last_pass[1][0][15] = 988
4263 16:34:32.104201 tx_win_center[1][1][0] = 991
4264 16:34:32.107300 tx_first_pass[1][1][0] = 978
4265 16:34:32.110969 tx_last_pass[1][1][0] = 1005
4266 16:34:32.114166 tx_win_center[1][1][1] = 990
4267 16:34:32.114258 tx_first_pass[1][1][1] = 978
4268 16:34:32.117196 tx_last_pass[1][1][1] = 1002
4269 16:34:32.120612 tx_win_center[1][1][2] = 988
4270 16:34:32.124130 tx_first_pass[1][1][2] = 976
4271 16:34:32.127501 tx_last_pass[1][1][2] = 1001
4272 16:34:32.127593 tx_win_center[1][1][3] = 986
4273 16:34:32.130702 tx_first_pass[1][1][3] = 974
4274 16:34:32.133673 tx_last_pass[1][1][3] = 999
4275 16:34:32.137540 tx_win_center[1][1][4] = 990
4276 16:34:32.137649 tx_first_pass[1][1][4] = 978
4277 16:34:32.140773 tx_last_pass[1][1][4] = 1003
4278 16:34:32.143881 tx_win_center[1][1][5] = 992
4279 16:34:32.147097 tx_first_pass[1][1][5] = 979
4280 16:34:32.150197 tx_last_pass[1][1][5] = 1005
4281 16:34:32.150319 tx_win_center[1][1][6] = 990
4282 16:34:32.154101 tx_first_pass[1][1][6] = 977
4283 16:34:32.157127 tx_last_pass[1][1][6] = 1004
4284 16:34:32.160415 tx_win_center[1][1][7] = 990
4285 16:34:32.163635 tx_first_pass[1][1][7] = 978
4286 16:34:32.163749 tx_last_pass[1][1][7] = 1002
4287 16:34:32.167252 tx_win_center[1][1][8] = 979
4288 16:34:32.170427 tx_first_pass[1][1][8] = 968
4289 16:34:32.173597 tx_last_pass[1][1][8] = 990
4290 16:34:32.173696 tx_win_center[1][1][9] = 978
4291 16:34:32.177265 tx_first_pass[1][1][9] = 967
4292 16:34:32.180523 tx_last_pass[1][1][9] = 990
4293 16:34:32.183297 tx_win_center[1][1][10] = 981
4294 16:34:32.187130 tx_first_pass[1][1][10] = 969
4295 16:34:32.187283 tx_last_pass[1][1][10] = 993
4296 16:34:32.190137 tx_win_center[1][1][11] = 981
4297 16:34:32.193339 tx_first_pass[1][1][11] = 969
4298 16:34:32.197195 tx_last_pass[1][1][11] = 993
4299 16:34:32.200191 tx_win_center[1][1][12] = 981
4300 16:34:32.200391 tx_first_pass[1][1][12] = 970
4301 16:34:32.203815 tx_last_pass[1][1][12] = 993
4302 16:34:32.206720 tx_win_center[1][1][13] = 981
4303 16:34:32.210423 tx_first_pass[1][1][13] = 970
4304 16:34:32.213795 tx_last_pass[1][1][13] = 993
4305 16:34:32.216688 tx_win_center[1][1][14] = 981
4306 16:34:32.216987 tx_first_pass[1][1][14] = 969
4307 16:34:32.220686 tx_last_pass[1][1][14] = 993
4308 16:34:32.223694 tx_win_center[1][1][15] = 975
4309 16:34:32.226735 tx_first_pass[1][1][15] = 963
4310 16:34:32.230641 tx_last_pass[1][1][15] = 987
4311 16:34:32.231224 dump params rx window
4312 16:34:32.233451 rx_firspass[0][0][0] = 4
4313 16:34:32.236885 rx_lastpass[0][0][0] = 38
4314 16:34:32.237336 rx_firspass[0][0][1] = 5
4315 16:34:32.240306 rx_lastpass[0][0][1] = 37
4316 16:34:32.243524 rx_firspass[0][0][2] = 6
4317 16:34:32.244102 rx_lastpass[0][0][2] = 36
4318 16:34:32.246983 rx_firspass[0][0][3] = -2
4319 16:34:32.250260 rx_lastpass[0][0][3] = 31
4320 16:34:32.250753 rx_firspass[0][0][4] = 5
4321 16:34:32.253518 rx_lastpass[0][0][4] = 37
4322 16:34:32.257233 rx_firspass[0][0][5] = 1
4323 16:34:32.260302 rx_lastpass[0][0][5] = 32
4324 16:34:32.260764 rx_firspass[0][0][6] = 3
4325 16:34:32.263366 rx_lastpass[0][0][6] = 34
4326 16:34:32.266852 rx_firspass[0][0][7] = 5
4327 16:34:32.267317 rx_lastpass[0][0][7] = 36
4328 16:34:32.270265 rx_firspass[0][0][8] = -3
4329 16:34:32.273576 rx_lastpass[0][0][8] = 33
4330 16:34:32.274134 rx_firspass[0][0][9] = 0
4331 16:34:32.277083 rx_lastpass[0][0][9] = 33
4332 16:34:32.280031 rx_firspass[0][0][10] = 8
4333 16:34:32.283554 rx_lastpass[0][0][10] = 41
4334 16:34:32.284050 rx_firspass[0][0][11] = 1
4335 16:34:32.286448 rx_lastpass[0][0][11] = 32
4336 16:34:32.289923 rx_firspass[0][0][12] = 2
4337 16:34:32.293379 rx_lastpass[0][0][12] = 37
4338 16:34:32.293941 rx_firspass[0][0][13] = 3
4339 16:34:32.296264 rx_lastpass[0][0][13] = 33
4340 16:34:32.299951 rx_firspass[0][0][14] = 2
4341 16:34:32.302754 rx_lastpass[0][0][14] = 37
4342 16:34:32.303104 rx_firspass[0][0][15] = 5
4343 16:34:32.306494 rx_lastpass[0][0][15] = 37
4344 16:34:32.309541 rx_firspass[0][1][0] = 5
4345 16:34:32.309839 rx_lastpass[0][1][0] = 40
4346 16:34:32.313391 rx_firspass[0][1][1] = 5
4347 16:34:32.316125 rx_lastpass[0][1][1] = 38
4348 16:34:32.316343 rx_firspass[0][1][2] = 6
4349 16:34:32.319386 rx_lastpass[0][1][2] = 38
4350 16:34:32.323053 rx_firspass[0][1][3] = -2
4351 16:34:32.326189 rx_lastpass[0][1][3] = 33
4352 16:34:32.326406 rx_firspass[0][1][4] = 5
4353 16:34:32.329273 rx_lastpass[0][1][4] = 39
4354 16:34:32.333117 rx_firspass[0][1][5] = 1
4355 16:34:32.333334 rx_lastpass[0][1][5] = 34
4356 16:34:32.336090 rx_firspass[0][1][6] = 3
4357 16:34:32.339710 rx_lastpass[0][1][6] = 37
4358 16:34:32.339971 rx_firspass[0][1][7] = 3
4359 16:34:32.342887 rx_lastpass[0][1][7] = 38
4360 16:34:32.346093 rx_firspass[0][1][8] = -2
4361 16:34:32.349637 rx_lastpass[0][1][8] = 32
4362 16:34:32.349930 rx_firspass[0][1][9] = 1
4363 16:34:32.353080 rx_lastpass[0][1][9] = 36
4364 16:34:32.356576 rx_firspass[0][1][10] = 7
4365 16:34:32.356796 rx_lastpass[0][1][10] = 43
4366 16:34:32.359354 rx_firspass[0][1][11] = -2
4367 16:34:32.363153 rx_lastpass[0][1][11] = 34
4368 16:34:32.366132 rx_firspass[0][1][12] = 1
4369 16:34:32.366424 rx_lastpass[0][1][12] = 37
4370 16:34:32.369787 rx_firspass[0][1][13] = 2
4371 16:34:32.372992 rx_lastpass[0][1][13] = 35
4372 16:34:32.376035 rx_firspass[0][1][14] = 3
4373 16:34:32.376298 rx_lastpass[0][1][14] = 37
4374 16:34:32.379525 rx_firspass[0][1][15] = 6
4375 16:34:32.382591 rx_lastpass[0][1][15] = 39
4376 16:34:32.382824 rx_firspass[1][0][0] = 5
4377 16:34:32.386120 rx_lastpass[1][0][0] = 39
4378 16:34:32.389645 rx_firspass[1][0][1] = 5
4379 16:34:32.392729 rx_lastpass[1][0][1] = 39
4380 16:34:32.392949 rx_firspass[1][0][2] = 2
4381 16:34:32.396305 rx_lastpass[1][0][2] = 36
4382 16:34:32.399320 rx_firspass[1][0][3] = -1
4383 16:34:32.399598 rx_lastpass[1][0][3] = 33
4384 16:34:32.402910 rx_firspass[1][0][4] = 5
4385 16:34:32.405925 rx_lastpass[1][0][4] = 38
4386 16:34:32.406222 rx_firspass[1][0][5] = 7
4387 16:34:32.409009 rx_lastpass[1][0][5] = 39
4388 16:34:32.412743 rx_firspass[1][0][6] = 7
4389 16:34:32.415886 rx_lastpass[1][0][6] = 40
4390 16:34:32.416143 rx_firspass[1][0][7] = 4
4391 16:34:32.419368 rx_lastpass[1][0][7] = 38
4392 16:34:32.422276 rx_firspass[1][0][8] = 1
4393 16:34:32.422615 rx_lastpass[1][0][8] = 34
4394 16:34:32.425701 rx_firspass[1][0][9] = 0
4395 16:34:32.429103 rx_lastpass[1][0][9] = 32
4396 16:34:32.432646 rx_firspass[1][0][10] = 5
4397 16:34:32.432953 rx_lastpass[1][0][10] = 35
4398 16:34:32.435777 rx_firspass[1][0][11] = 5
4399 16:34:32.438858 rx_lastpass[1][0][11] = 38
4400 16:34:32.439230 rx_firspass[1][0][12] = 6
4401 16:34:32.442537 rx_lastpass[1][0][12] = 38
4402 16:34:32.445770 rx_firspass[1][0][13] = 5
4403 16:34:32.448913 rx_lastpass[1][0][13] = 37
4404 16:34:32.449147 rx_firspass[1][0][14] = 7
4405 16:34:32.452617 rx_lastpass[1][0][14] = 38
4406 16:34:32.455775 rx_firspass[1][0][15] = -3
4407 16:34:32.458876 rx_lastpass[1][0][15] = 30
4408 16:34:32.459093 rx_firspass[1][1][0] = 4
4409 16:34:32.462247 rx_lastpass[1][1][0] = 40
4410 16:34:32.465787 rx_firspass[1][1][1] = 4
4411 16:34:32.466006 rx_lastpass[1][1][1] = 39
4412 16:34:32.468689 rx_firspass[1][1][2] = 1
4413 16:34:32.472438 rx_lastpass[1][1][2] = 36
4414 16:34:32.475491 rx_firspass[1][1][3] = -2
4415 16:34:32.475710 rx_lastpass[1][1][3] = 34
4416 16:34:32.478790 rx_firspass[1][1][4] = 4
4417 16:34:32.482424 rx_lastpass[1][1][4] = 39
4418 16:34:32.482738 rx_firspass[1][1][5] = 5
4419 16:34:32.485402 rx_lastpass[1][1][5] = 40
4420 16:34:32.489055 rx_firspass[1][1][6] = 5
4421 16:34:32.489272 rx_lastpass[1][1][6] = 41
4422 16:34:32.492051 rx_firspass[1][1][7] = 3
4423 16:34:32.495435 rx_lastpass[1][1][7] = 38
4424 16:34:32.495714 rx_firspass[1][1][8] = 0
4425 16:34:32.498648 rx_lastpass[1][1][8] = 35
4426 16:34:32.502133 rx_firspass[1][1][9] = -1
4427 16:34:32.505419 rx_lastpass[1][1][9] = 34
4428 16:34:32.505692 rx_firspass[1][1][10] = 4
4429 16:34:32.509148 rx_lastpass[1][1][10] = 38
4430 16:34:32.512025 rx_firspass[1][1][11] = 5
4431 16:34:32.515468 rx_lastpass[1][1][11] = 40
4432 16:34:32.515887 rx_firspass[1][1][12] = 4
4433 16:34:32.518905 rx_lastpass[1][1][12] = 40
4434 16:34:32.522232 rx_firspass[1][1][13] = 4
4435 16:34:32.522652 rx_lastpass[1][1][13] = 40
4436 16:34:32.525879 rx_firspass[1][1][14] = 5
4437 16:34:32.528841 rx_lastpass[1][1][14] = 40
4438 16:34:32.532008 rx_firspass[1][1][15] = -3
4439 16:34:32.532357 rx_lastpass[1][1][15] = 31
4440 16:34:32.535558 dump params clk_delay
4441 16:34:32.535930 clk_delay[0] = 1
4442 16:34:32.539108 clk_delay[1] = 0
4443 16:34:32.539685 dump params dqs_delay
4444 16:34:32.541846 dqs_delay[0][0] = -2
4445 16:34:32.545551 dqs_delay[0][1] = 0
4446 16:34:32.545901 dqs_delay[1][0] = 0
4447 16:34:32.548644 dqs_delay[1][1] = 0
4448 16:34:32.551855 dump params delay_cell_unit = 735
4449 16:34:32.552266 dump source = 0x0
4450 16:34:32.555652 dump params frequency:1200
4451 16:34:32.558537 dump params rank number:2
4452 16:34:32.558888
4453 16:34:32.559159 dump params write leveling
4454 16:34:32.562222 write leveling[0][0][0] = 0x0
4455 16:34:32.565480 write leveling[0][0][1] = 0x0
4456 16:34:32.569030 write leveling[0][1][0] = 0x0
4457 16:34:32.572495 write leveling[0][1][1] = 0x0
4458 16:34:32.572856 write leveling[1][0][0] = 0x0
4459 16:34:32.575245 write leveling[1][0][1] = 0x0
4460 16:34:32.578863 write leveling[1][1][0] = 0x0
4461 16:34:32.581922 write leveling[1][1][1] = 0x0
4462 16:34:32.582285 dump params cbt_cs
4463 16:34:32.585663 cbt_cs[0][0] = 0x0
4464 16:34:32.586041 cbt_cs[0][1] = 0x0
4465 16:34:32.588696 cbt_cs[1][0] = 0x0
4466 16:34:32.589214 cbt_cs[1][1] = 0x0
4467 16:34:32.592561 dump params cbt_mr12
4468 16:34:32.592905 cbt_mr12[0][0] = 0x0
4469 16:34:32.595325 cbt_mr12[0][1] = 0x0
4470 16:34:32.598414 cbt_mr12[1][0] = 0x0
4471 16:34:32.598814 cbt_mr12[1][1] = 0x0
4472 16:34:32.602088 dump params tx window
4473 16:34:32.605924 tx_center_min[0][0][0] = 0
4474 16:34:32.606472 tx_center_max[0][0][0] = 0
4475 16:34:32.608775 tx_center_min[0][0][1] = 0
4476 16:34:32.612272 tx_center_max[0][0][1] = 0
4477 16:34:32.612761 tx_center_min[0][1][0] = 0
4478 16:34:32.615102 tx_center_max[0][1][0] = 0
4479 16:34:32.618600 tx_center_min[0][1][1] = 0
4480 16:34:32.622015 tx_center_max[0][1][1] = 0
4481 16:34:32.622496 tx_center_min[1][0][0] = 0
4482 16:34:32.625057 tx_center_max[1][0][0] = 0
4483 16:34:32.628746 tx_center_min[1][0][1] = 0
4484 16:34:32.631793 tx_center_max[1][0][1] = 0
4485 16:34:32.632171 tx_center_min[1][1][0] = 0
4486 16:34:32.635327 tx_center_max[1][1][0] = 0
4487 16:34:32.638509 tx_center_min[1][1][1] = 0
4488 16:34:32.641961 tx_center_max[1][1][1] = 0
4489 16:34:32.642432 dump params tx window
4490 16:34:32.644905 tx_win_center[0][0][0] = 0
4491 16:34:32.648366 tx_first_pass[0][0][0] = 0
4492 16:34:32.648873 tx_last_pass[0][0][0] = 0
4493 16:34:32.651802 tx_win_center[0][0][1] = 0
4494 16:34:32.655435 tx_first_pass[0][0][1] = 0
4495 16:34:32.658522 tx_last_pass[0][0][1] = 0
4496 16:34:32.658897 tx_win_center[0][0][2] = 0
4497 16:34:32.661696 tx_first_pass[0][0][2] = 0
4498 16:34:32.664833 tx_last_pass[0][0][2] = 0
4499 16:34:32.665300 tx_win_center[0][0][3] = 0
4500 16:34:32.668696 tx_first_pass[0][0][3] = 0
4501 16:34:32.671717 tx_last_pass[0][0][3] = 0
4502 16:34:32.675218 tx_win_center[0][0][4] = 0
4503 16:34:32.675674 tx_first_pass[0][0][4] = 0
4504 16:34:32.678131 tx_last_pass[0][0][4] = 0
4505 16:34:32.681738 tx_win_center[0][0][5] = 0
4506 16:34:32.685411 tx_first_pass[0][0][5] = 0
4507 16:34:32.685993 tx_last_pass[0][0][5] = 0
4508 16:34:32.688617 tx_win_center[0][0][6] = 0
4509 16:34:32.691839 tx_first_pass[0][0][6] = 0
4510 16:34:32.692329 tx_last_pass[0][0][6] = 0
4511 16:34:32.694872 tx_win_center[0][0][7] = 0
4512 16:34:32.698027 tx_first_pass[0][0][7] = 0
4513 16:34:32.701786 tx_last_pass[0][0][7] = 0
4514 16:34:32.702291 tx_win_center[0][0][8] = 0
4515 16:34:32.705058 tx_first_pass[0][0][8] = 0
4516 16:34:32.708101 tx_last_pass[0][0][8] = 0
4517 16:34:32.711750 tx_win_center[0][0][9] = 0
4518 16:34:32.712592 tx_first_pass[0][0][9] = 0
4519 16:34:32.715021 tx_last_pass[0][0][9] = 0
4520 16:34:32.718141 tx_win_center[0][0][10] = 0
4521 16:34:32.721521 tx_first_pass[0][0][10] = 0
4522 16:34:32.722017 tx_last_pass[0][0][10] = 0
4523 16:34:32.725043 tx_win_center[0][0][11] = 0
4524 16:34:32.728420 tx_first_pass[0][0][11] = 0
4525 16:34:32.731702 tx_last_pass[0][0][11] = 0
4526 16:34:32.732228 tx_win_center[0][0][12] = 0
4527 16:34:32.734640 tx_first_pass[0][0][12] = 0
4528 16:34:32.738090 tx_last_pass[0][0][12] = 0
4529 16:34:32.741123 tx_win_center[0][0][13] = 0
4530 16:34:32.741698 tx_first_pass[0][0][13] = 0
4531 16:34:32.745151 tx_last_pass[0][0][13] = 0
4532 16:34:32.748282 tx_win_center[0][0][14] = 0
4533 16:34:32.751772 tx_first_pass[0][0][14] = 0
4534 16:34:32.752164 tx_last_pass[0][0][14] = 0
4535 16:34:32.754755 tx_win_center[0][0][15] = 0
4536 16:34:32.758300 tx_first_pass[0][0][15] = 0
4537 16:34:32.758708 tx_last_pass[0][0][15] = 0
4538 16:34:32.761351 tx_win_center[0][1][0] = 0
4539 16:34:32.765099 tx_first_pass[0][1][0] = 0
4540 16:34:32.768384 tx_last_pass[0][1][0] = 0
4541 16:34:32.768768 tx_win_center[0][1][1] = 0
4542 16:34:32.771655 tx_first_pass[0][1][1] = 0
4543 16:34:32.774734 tx_last_pass[0][1][1] = 0
4544 16:34:32.778496 tx_win_center[0][1][2] = 0
4545 16:34:32.778932 tx_first_pass[0][1][2] = 0
4546 16:34:32.781553 tx_last_pass[0][1][2] = 0
4547 16:34:32.785185 tx_win_center[0][1][3] = 0
4548 16:34:32.785573 tx_first_pass[0][1][3] = 0
4549 16:34:32.788353 tx_last_pass[0][1][3] = 0
4550 16:34:32.791911 tx_win_center[0][1][4] = 0
4551 16:34:32.795239 tx_first_pass[0][1][4] = 0
4552 16:34:32.795784 tx_last_pass[0][1][4] = 0
4553 16:34:32.798147 tx_win_center[0][1][5] = 0
4554 16:34:32.801793 tx_first_pass[0][1][5] = 0
4555 16:34:32.804954 tx_last_pass[0][1][5] = 0
4556 16:34:32.805496 tx_win_center[0][1][6] = 0
4557 16:34:32.807923 tx_first_pass[0][1][6] = 0
4558 16:34:32.811821 tx_last_pass[0][1][6] = 0
4559 16:34:32.812199 tx_win_center[0][1][7] = 0
4560 16:34:32.814534 tx_first_pass[0][1][7] = 0
4561 16:34:32.818255 tx_last_pass[0][1][7] = 0
4562 16:34:32.821384 tx_win_center[0][1][8] = 0
4563 16:34:32.821643 tx_first_pass[0][1][8] = 0
4564 16:34:32.824966 tx_last_pass[0][1][8] = 0
4565 16:34:32.828170 tx_win_center[0][1][9] = 0
4566 16:34:32.831350 tx_first_pass[0][1][9] = 0
4567 16:34:32.831782 tx_last_pass[0][1][9] = 0
4568 16:34:32.834859 tx_win_center[0][1][10] = 0
4569 16:34:32.838105 tx_first_pass[0][1][10] = 0
4570 16:34:32.841129 tx_last_pass[0][1][10] = 0
4571 16:34:32.841384 tx_win_center[0][1][11] = 0
4572 16:34:32.844499 tx_first_pass[0][1][11] = 0
4573 16:34:32.848140 tx_last_pass[0][1][11] = 0
4574 16:34:32.851216 tx_win_center[0][1][12] = 0
4575 16:34:32.851621 tx_first_pass[0][1][12] = 0
4576 16:34:32.854222 tx_last_pass[0][1][12] = 0
4577 16:34:32.858113 tx_win_center[0][1][13] = 0
4578 16:34:32.860955 tx_first_pass[0][1][13] = 0
4579 16:34:32.861341 tx_last_pass[0][1][13] = 0
4580 16:34:32.864525 tx_win_center[0][1][14] = 0
4581 16:34:32.868135 tx_first_pass[0][1][14] = 0
4582 16:34:32.871230 tx_last_pass[0][1][14] = 0
4583 16:34:32.871512 tx_win_center[0][1][15] = 0
4584 16:34:32.874746 tx_first_pass[0][1][15] = 0
4585 16:34:32.877871 tx_last_pass[0][1][15] = 0
4586 16:34:32.880985 tx_win_center[1][0][0] = 0
4587 16:34:32.881245 tx_first_pass[1][0][0] = 0
4588 16:34:32.884569 tx_last_pass[1][0][0] = 0
4589 16:34:32.887476 tx_win_center[1][0][1] = 0
4590 16:34:32.887762 tx_first_pass[1][0][1] = 0
4591 16:34:32.891314 tx_last_pass[1][0][1] = 0
4592 16:34:32.894412 tx_win_center[1][0][2] = 0
4593 16:34:32.897481 tx_first_pass[1][0][2] = 0
4594 16:34:32.897737 tx_last_pass[1][0][2] = 0
4595 16:34:32.901012 tx_win_center[1][0][3] = 0
4596 16:34:32.904396 tx_first_pass[1][0][3] = 0
4597 16:34:32.907475 tx_last_pass[1][0][3] = 0
4598 16:34:32.907668 tx_win_center[1][0][4] = 0
4599 16:34:32.910633 tx_first_pass[1][0][4] = 0
4600 16:34:32.914318 tx_last_pass[1][0][4] = 0
4601 16:34:32.914493 tx_win_center[1][0][5] = 0
4602 16:34:32.917342 tx_first_pass[1][0][5] = 0
4603 16:34:32.920881 tx_last_pass[1][0][5] = 0
4604 16:34:32.924058 tx_win_center[1][0][6] = 0
4605 16:34:32.924161 tx_first_pass[1][0][6] = 0
4606 16:34:32.927133 tx_last_pass[1][0][6] = 0
4607 16:34:32.930756 tx_win_center[1][0][7] = 0
4608 16:34:32.933846 tx_first_pass[1][0][7] = 0
4609 16:34:32.933951 tx_last_pass[1][0][7] = 0
4610 16:34:32.937033 tx_win_center[1][0][8] = 0
4611 16:34:32.940862 tx_first_pass[1][0][8] = 0
4612 16:34:32.940984 tx_last_pass[1][0][8] = 0
4613 16:34:32.943838 tx_win_center[1][0][9] = 0
4614 16:34:32.946908 tx_first_pass[1][0][9] = 0
4615 16:34:32.950271 tx_last_pass[1][0][9] = 0
4616 16:34:32.950368 tx_win_center[1][0][10] = 0
4617 16:34:32.953517 tx_first_pass[1][0][10] = 0
4618 16:34:32.956882 tx_last_pass[1][0][10] = 0
4619 16:34:32.960614 tx_win_center[1][0][11] = 0
4620 16:34:32.960757 tx_first_pass[1][0][11] = 0
4621 16:34:32.963805 tx_last_pass[1][0][11] = 0
4622 16:34:32.966788 tx_win_center[1][0][12] = 0
4623 16:34:32.970362 tx_first_pass[1][0][12] = 0
4624 16:34:32.970467 tx_last_pass[1][0][12] = 0
4625 16:34:32.974024 tx_win_center[1][0][13] = 0
4626 16:34:32.977191 tx_first_pass[1][0][13] = 0
4627 16:34:32.980321 tx_last_pass[1][0][13] = 0
4628 16:34:32.980426 tx_win_center[1][0][14] = 0
4629 16:34:32.983416 tx_first_pass[1][0][14] = 0
4630 16:34:32.987165 tx_last_pass[1][0][14] = 0
4631 16:34:32.990077 tx_win_center[1][0][15] = 0
4632 16:34:32.993749 tx_first_pass[1][0][15] = 0
4633 16:34:32.993866 tx_last_pass[1][0][15] = 0
4634 16:34:32.996825 tx_win_center[1][1][0] = 0
4635 16:34:32.999987 tx_first_pass[1][1][0] = 0
4636 16:34:33.000112 tx_last_pass[1][1][0] = 0
4637 16:34:33.003800 tx_win_center[1][1][1] = 0
4638 16:34:33.006872 tx_first_pass[1][1][1] = 0
4639 16:34:33.010289 tx_last_pass[1][1][1] = 0
4640 16:34:33.010430 tx_win_center[1][1][2] = 0
4641 16:34:33.013275 tx_first_pass[1][1][2] = 0
4642 16:34:33.016873 tx_last_pass[1][1][2] = 0
4643 16:34:33.020027 tx_win_center[1][1][3] = 0
4644 16:34:33.020152 tx_first_pass[1][1][3] = 0
4645 16:34:33.023635 tx_last_pass[1][1][3] = 0
4646 16:34:33.026816 tx_win_center[1][1][4] = 0
4647 16:34:33.026911 tx_first_pass[1][1][4] = 0
4648 16:34:33.029689 tx_last_pass[1][1][4] = 0
4649 16:34:33.033429 tx_win_center[1][1][5] = 0
4650 16:34:33.036452 tx_first_pass[1][1][5] = 0
4651 16:34:33.036594 tx_last_pass[1][1][5] = 0
4652 16:34:33.040380 tx_win_center[1][1][6] = 0
4653 16:34:33.043350 tx_first_pass[1][1][6] = 0
4654 16:34:33.043494 tx_last_pass[1][1][6] = 0
4655 16:34:33.046428 tx_win_center[1][1][7] = 0
4656 16:34:33.050174 tx_first_pass[1][1][7] = 0
4657 16:34:33.053450 tx_last_pass[1][1][7] = 0
4658 16:34:33.053583 tx_win_center[1][1][8] = 0
4659 16:34:33.056946 tx_first_pass[1][1][8] = 0
4660 16:34:33.059892 tx_last_pass[1][1][8] = 0
4661 16:34:33.063105 tx_win_center[1][1][9] = 0
4662 16:34:33.063219 tx_first_pass[1][1][9] = 0
4663 16:34:33.066352 tx_last_pass[1][1][9] = 0
4664 16:34:33.069770 tx_win_center[1][1][10] = 0
4665 16:34:33.073467 tx_first_pass[1][1][10] = 0
4666 16:34:33.073606 tx_last_pass[1][1][10] = 0
4667 16:34:33.076417 tx_win_center[1][1][11] = 0
4668 16:34:33.079891 tx_first_pass[1][1][11] = 0
4669 16:34:33.083455 tx_last_pass[1][1][11] = 0
4670 16:34:33.083582 tx_win_center[1][1][12] = 0
4671 16:34:33.086785 tx_first_pass[1][1][12] = 0
4672 16:34:33.089834 tx_last_pass[1][1][12] = 0
4673 16:34:33.093541 tx_win_center[1][1][13] = 0
4674 16:34:33.093661 tx_first_pass[1][1][13] = 0
4675 16:34:33.096591 tx_last_pass[1][1][13] = 0
4676 16:34:33.099625 tx_win_center[1][1][14] = 0
4677 16:34:33.103162 tx_first_pass[1][1][14] = 0
4678 16:34:33.103320 tx_last_pass[1][1][14] = 0
4679 16:34:33.106157 tx_win_center[1][1][15] = 0
4680 16:34:33.109842 tx_first_pass[1][1][15] = 0
4681 16:34:33.112953 tx_last_pass[1][1][15] = 0
4682 16:34:33.113106 dump params rx window
4683 16:34:33.116619 rx_firspass[0][0][0] = 0
4684 16:34:33.119736 rx_lastpass[0][0][0] = 0
4685 16:34:33.119864 rx_firspass[0][0][1] = 0
4686 16:34:33.123269 rx_lastpass[0][0][1] = 0
4687 16:34:33.126366 rx_firspass[0][0][2] = 0
4688 16:34:33.126526 rx_lastpass[0][0][2] = 0
4689 16:34:33.129923 rx_firspass[0][0][3] = 0
4690 16:34:33.133185 rx_lastpass[0][0][3] = 0
4691 16:34:33.133355 rx_firspass[0][0][4] = 0
4692 16:34:33.136297 rx_lastpass[0][0][4] = 0
4693 16:34:33.140011 rx_firspass[0][0][5] = 0
4694 16:34:33.140160 rx_lastpass[0][0][5] = 0
4695 16:34:33.143192 rx_firspass[0][0][6] = 0
4696 16:34:33.146312 rx_lastpass[0][0][6] = 0
4697 16:34:33.146464 rx_firspass[0][0][7] = 0
4698 16:34:33.149535 rx_lastpass[0][0][7] = 0
4699 16:34:33.152800 rx_firspass[0][0][8] = 0
4700 16:34:33.156568 rx_lastpass[0][0][8] = 0
4701 16:34:33.156729 rx_firspass[0][0][9] = 0
4702 16:34:33.159649 rx_lastpass[0][0][9] = 0
4703 16:34:33.162737 rx_firspass[0][0][10] = 0
4704 16:34:33.162889 rx_lastpass[0][0][10] = 0
4705 16:34:33.166418 rx_firspass[0][0][11] = 0
4706 16:34:33.169378 rx_lastpass[0][0][11] = 0
4707 16:34:33.169522 rx_firspass[0][0][12] = 0
4708 16:34:33.172713 rx_lastpass[0][0][12] = 0
4709 16:34:33.176408 rx_firspass[0][0][13] = 0
4710 16:34:33.179331 rx_lastpass[0][0][13] = 0
4711 16:34:33.179468 rx_firspass[0][0][14] = 0
4712 16:34:33.182837 rx_lastpass[0][0][14] = 0
4713 16:34:33.185922 rx_firspass[0][0][15] = 0
4714 16:34:33.186093 rx_lastpass[0][0][15] = 0
4715 16:34:33.189395 rx_firspass[0][1][0] = 0
4716 16:34:33.192959 rx_lastpass[0][1][0] = 0
4717 16:34:33.195931 rx_firspass[0][1][1] = 0
4718 16:34:33.196089 rx_lastpass[0][1][1] = 0
4719 16:34:33.199105 rx_firspass[0][1][2] = 0
4720 16:34:33.202514 rx_lastpass[0][1][2] = 0
4721 16:34:33.202677 rx_firspass[0][1][3] = 0
4722 16:34:33.205950 rx_lastpass[0][1][3] = 0
4723 16:34:33.209017 rx_firspass[0][1][4] = 0
4724 16:34:33.209146 rx_lastpass[0][1][4] = 0
4725 16:34:33.212702 rx_firspass[0][1][5] = 0
4726 16:34:33.215823 rx_lastpass[0][1][5] = 0
4727 16:34:33.215916 rx_firspass[0][1][6] = 0
4728 16:34:33.218819 rx_lastpass[0][1][6] = 0
4729 16:34:33.222541 rx_firspass[0][1][7] = 0
4730 16:34:33.225570 rx_lastpass[0][1][7] = 0
4731 16:34:33.225697 rx_firspass[0][1][8] = 0
4732 16:34:33.229226 rx_lastpass[0][1][8] = 0
4733 16:34:33.232127 rx_firspass[0][1][9] = 0
4734 16:34:33.232253 rx_lastpass[0][1][9] = 0
4735 16:34:33.235726 rx_firspass[0][1][10] = 0
4736 16:34:33.239454 rx_lastpass[0][1][10] = 0
4737 16:34:33.239555 rx_firspass[0][1][11] = 0
4738 16:34:33.242507 rx_lastpass[0][1][11] = 0
4739 16:34:33.245510 rx_firspass[0][1][12] = 0
4740 16:34:33.249294 rx_lastpass[0][1][12] = 0
4741 16:34:33.249408 rx_firspass[0][1][13] = 0
4742 16:34:33.252472 rx_lastpass[0][1][13] = 0
4743 16:34:33.255593 rx_firspass[0][1][14] = 0
4744 16:34:33.255705 rx_lastpass[0][1][14] = 0
4745 16:34:33.259353 rx_firspass[0][1][15] = 0
4746 16:34:33.262484 rx_lastpass[0][1][15] = 0
4747 16:34:33.262584 rx_firspass[1][0][0] = 0
4748 16:34:33.265589 rx_lastpass[1][0][0] = 0
4749 16:34:33.269384 rx_firspass[1][0][1] = 0
4750 16:34:33.272452 rx_lastpass[1][0][1] = 0
4751 16:34:33.272533 rx_firspass[1][0][2] = 0
4752 16:34:33.276092 rx_lastpass[1][0][2] = 0
4753 16:34:33.278970 rx_firspass[1][0][3] = 0
4754 16:34:33.279061 rx_lastpass[1][0][3] = 0
4755 16:34:33.282387 rx_firspass[1][0][4] = 0
4756 16:34:33.285504 rx_lastpass[1][0][4] = 0
4757 16:34:33.285594 rx_firspass[1][0][5] = 0
4758 16:34:33.289127 rx_lastpass[1][0][5] = 0
4759 16:34:33.292027 rx_firspass[1][0][6] = 0
4760 16:34:33.292116 rx_lastpass[1][0][6] = 0
4761 16:34:33.295526 rx_firspass[1][0][7] = 0
4762 16:34:33.299036 rx_lastpass[1][0][7] = 0
4763 16:34:33.302229 rx_firspass[1][0][8] = 0
4764 16:34:33.302319 rx_lastpass[1][0][8] = 0
4765 16:34:33.305576 rx_firspass[1][0][9] = 0
4766 16:34:33.308923 rx_lastpass[1][0][9] = 0
4767 16:34:33.309014 rx_firspass[1][0][10] = 0
4768 16:34:33.312494 rx_lastpass[1][0][10] = 0
4769 16:34:33.315504 rx_firspass[1][0][11] = 0
4770 16:34:33.315596 rx_lastpass[1][0][11] = 0
4771 16:34:33.318720 rx_firspass[1][0][12] = 0
4772 16:34:33.322374 rx_lastpass[1][0][12] = 0
4773 16:34:33.325433 rx_firspass[1][0][13] = 0
4774 16:34:33.325554 rx_lastpass[1][0][13] = 0
4775 16:34:33.328556 rx_firspass[1][0][14] = 0
4776 16:34:33.332346 rx_lastpass[1][0][14] = 0
4777 16:34:33.332439 rx_firspass[1][0][15] = 0
4778 16:34:33.335280 rx_lastpass[1][0][15] = 0
4779 16:34:33.338639 rx_firspass[1][1][0] = 0
4780 16:34:33.341911 rx_lastpass[1][1][0] = 0
4781 16:34:33.342005 rx_firspass[1][1][1] = 0
4782 16:34:33.345334 rx_lastpass[1][1][1] = 0
4783 16:34:33.348493 rx_firspass[1][1][2] = 0
4784 16:34:33.348584 rx_lastpass[1][1][2] = 0
4785 16:34:33.351602 rx_firspass[1][1][3] = 0
4786 16:34:33.355291 rx_lastpass[1][1][3] = 0
4787 16:34:33.355425 rx_firspass[1][1][4] = 0
4788 16:34:33.358421 rx_lastpass[1][1][4] = 0
4789 16:34:33.361613 rx_firspass[1][1][5] = 0
4790 16:34:33.361704 rx_lastpass[1][1][5] = 0
4791 16:34:33.365343 rx_firspass[1][1][6] = 0
4792 16:34:33.368480 rx_lastpass[1][1][6] = 0
4793 16:34:33.368576 rx_firspass[1][1][7] = 0
4794 16:34:33.371654 rx_lastpass[1][1][7] = 0
4795 16:34:33.374901 rx_firspass[1][1][8] = 0
4796 16:34:33.378492 rx_lastpass[1][1][8] = 0
4797 16:34:33.378612 rx_firspass[1][1][9] = 0
4798 16:34:33.381742 rx_lastpass[1][1][9] = 0
4799 16:34:33.385286 rx_firspass[1][1][10] = 0
4800 16:34:33.385408 rx_lastpass[1][1][10] = 0
4801 16:34:33.388675 rx_firspass[1][1][11] = 0
4802 16:34:33.391756 rx_lastpass[1][1][11] = 0
4803 16:34:33.391867 rx_firspass[1][1][12] = 0
4804 16:34:33.394953 rx_lastpass[1][1][12] = 0
4805 16:34:33.398389 rx_firspass[1][1][13] = 0
4806 16:34:33.401665 rx_lastpass[1][1][13] = 0
4807 16:34:33.401765 rx_firspass[1][1][14] = 0
4808 16:34:33.404887 rx_lastpass[1][1][14] = 0
4809 16:34:33.408420 rx_firspass[1][1][15] = 0
4810 16:34:33.408504 rx_lastpass[1][1][15] = 0
4811 16:34:33.411471 dump params clk_delay
4812 16:34:33.414784 clk_delay[0] = 0
4813 16:34:33.414874 clk_delay[1] = 0
4814 16:34:33.418125 dump params dqs_delay
4815 16:34:33.418211 dqs_delay[0][0] = 0
4816 16:34:33.421482 dqs_delay[0][1] = 0
4817 16:34:33.421568 dqs_delay[1][0] = 0
4818 16:34:33.424798 dqs_delay[1][1] = 0
4819 16:34:33.428375 dump params delay_cell_unit = 735
4820 16:34:33.428467 dump source = 0x0
4821 16:34:33.431646 dump params frequency:800
4822 16:34:33.434756 dump params rank number:2
4823 16:34:33.434866
4824 16:34:33.434978 dump params write leveling
4825 16:34:33.438480 write leveling[0][0][0] = 0x0
4826 16:34:33.441868 write leveling[0][0][1] = 0x0
4827 16:34:33.444779 write leveling[0][1][0] = 0x0
4828 16:34:33.448124 write leveling[0][1][1] = 0x0
4829 16:34:33.448255 write leveling[1][0][0] = 0x0
4830 16:34:33.451535 write leveling[1][0][1] = 0x0
4831 16:34:33.454731 write leveling[1][1][0] = 0x0
4832 16:34:33.458266 write leveling[1][1][1] = 0x0
4833 16:34:33.458390 dump params cbt_cs
4834 16:34:33.461353 cbt_cs[0][0] = 0x0
4835 16:34:33.461474 cbt_cs[0][1] = 0x0
4836 16:34:33.465183 cbt_cs[1][0] = 0x0
4837 16:34:33.465276 cbt_cs[1][1] = 0x0
4838 16:34:33.468241 dump params cbt_mr12
4839 16:34:33.471413 cbt_mr12[0][0] = 0x0
4840 16:34:33.471511 cbt_mr12[0][1] = 0x0
4841 16:34:33.474763 cbt_mr12[1][0] = 0x0
4842 16:34:33.474858 cbt_mr12[1][1] = 0x0
4843 16:34:33.478451 dump params tx window
4844 16:34:33.481584 tx_center_min[0][0][0] = 0
4845 16:34:33.481677 tx_center_max[0][0][0] = 0
4846 16:34:33.484656 tx_center_min[0][0][1] = 0
4847 16:34:33.488441 tx_center_max[0][0][1] = 0
4848 16:34:33.491484 tx_center_min[0][1][0] = 0
4849 16:34:33.491575 tx_center_max[0][1][0] = 0
4850 16:34:33.495015 tx_center_min[0][1][1] = 0
4851 16:34:33.498053 tx_center_max[0][1][1] = 0
4852 16:34:33.498175 tx_center_min[1][0][0] = 0
4853 16:34:33.502010 tx_center_max[1][0][0] = 0
4854 16:34:33.505102 tx_center_min[1][0][1] = 0
4855 16:34:33.508212 tx_center_max[1][0][1] = 0
4856 16:34:33.508337 tx_center_min[1][1][0] = 0
4857 16:34:33.511303 tx_center_max[1][1][0] = 0
4858 16:34:33.515185 tx_center_min[1][1][1] = 0
4859 16:34:33.518320 tx_center_max[1][1][1] = 0
4860 16:34:33.518442 dump params tx window
4861 16:34:33.521343 tx_win_center[0][0][0] = 0
4862 16:34:33.524999 tx_first_pass[0][0][0] = 0
4863 16:34:33.525097 tx_last_pass[0][0][0] = 0
4864 16:34:33.528085 tx_win_center[0][0][1] = 0
4865 16:34:33.531397 tx_first_pass[0][0][1] = 0
4866 16:34:33.534837 tx_last_pass[0][0][1] = 0
4867 16:34:33.534958 tx_win_center[0][0][2] = 0
4868 16:34:33.538283 tx_first_pass[0][0][2] = 0
4869 16:34:33.541379 tx_last_pass[0][0][2] = 0
4870 16:34:33.541511 tx_win_center[0][0][3] = 0
4871 16:34:33.544903 tx_first_pass[0][0][3] = 0
4872 16:34:33.548271 tx_last_pass[0][0][3] = 0
4873 16:34:33.551435 tx_win_center[0][0][4] = 0
4874 16:34:33.551528 tx_first_pass[0][0][4] = 0
4875 16:34:33.554561 tx_last_pass[0][0][4] = 0
4876 16:34:33.558125 tx_win_center[0][0][5] = 0
4877 16:34:33.561571 tx_first_pass[0][0][5] = 0
4878 16:34:33.561691 tx_last_pass[0][0][5] = 0
4879 16:34:33.564609 tx_win_center[0][0][6] = 0
4880 16:34:33.568279 tx_first_pass[0][0][6] = 0
4881 16:34:33.568404 tx_last_pass[0][0][6] = 0
4882 16:34:33.571389 tx_win_center[0][0][7] = 0
4883 16:34:33.574676 tx_first_pass[0][0][7] = 0
4884 16:34:33.577898 tx_last_pass[0][0][7] = 0
4885 16:34:33.578025 tx_win_center[0][0][8] = 0
4886 16:34:33.581189 tx_first_pass[0][0][8] = 0
4887 16:34:33.584975 tx_last_pass[0][0][8] = 0
4888 16:34:33.588226 tx_win_center[0][0][9] = 0
4889 16:34:33.588318 tx_first_pass[0][0][9] = 0
4890 16:34:33.591319 tx_last_pass[0][0][9] = 0
4891 16:34:33.594467 tx_win_center[0][0][10] = 0
4892 16:34:33.598413 tx_first_pass[0][0][10] = 0
4893 16:34:33.598508 tx_last_pass[0][0][10] = 0
4894 16:34:33.601464 tx_win_center[0][0][11] = 0
4895 16:34:33.604579 tx_first_pass[0][0][11] = 0
4896 16:34:33.604711 tx_last_pass[0][0][11] = 0
4897 16:34:33.608219 tx_win_center[0][0][12] = 0
4898 16:34:33.611278 tx_first_pass[0][0][12] = 0
4899 16:34:33.614380 tx_last_pass[0][0][12] = 0
4900 16:34:33.617686 tx_win_center[0][0][13] = 0
4901 16:34:33.617798 tx_first_pass[0][0][13] = 0
4902 16:34:33.621512 tx_last_pass[0][0][13] = 0
4903 16:34:33.624684 tx_win_center[0][0][14] = 0
4904 16:34:33.627738 tx_first_pass[0][0][14] = 0
4905 16:34:33.627835 tx_last_pass[0][0][14] = 0
4906 16:34:33.630935 tx_win_center[0][0][15] = 0
4907 16:34:33.634213 tx_first_pass[0][0][15] = 0
4908 16:34:33.637859 tx_last_pass[0][0][15] = 0
4909 16:34:33.637971 tx_win_center[0][1][0] = 0
4910 16:34:33.641098 tx_first_pass[0][1][0] = 0
4911 16:34:33.644690 tx_last_pass[0][1][0] = 0
4912 16:34:33.644820 tx_win_center[0][1][1] = 0
4913 16:34:33.647755 tx_first_pass[0][1][1] = 0
4914 16:34:33.651197 tx_last_pass[0][1][1] = 0
4915 16:34:33.654523 tx_win_center[0][1][2] = 0
4916 16:34:33.654650 tx_first_pass[0][1][2] = 0
4917 16:34:33.657788 tx_last_pass[0][1][2] = 0
4918 16:34:33.660900 tx_win_center[0][1][3] = 0
4919 16:34:33.664263 tx_first_pass[0][1][3] = 0
4920 16:34:33.664397 tx_last_pass[0][1][3] = 0
4921 16:34:33.667724 tx_win_center[0][1][4] = 0
4922 16:34:33.671273 tx_first_pass[0][1][4] = 0
4923 16:34:33.671402 tx_last_pass[0][1][4] = 0
4924 16:34:33.674374 tx_win_center[0][1][5] = 0
4925 16:34:33.677607 tx_first_pass[0][1][5] = 0
4926 16:34:33.680742 tx_last_pass[0][1][5] = 0
4927 16:34:33.680871 tx_win_center[0][1][6] = 0
4928 16:34:33.684381 tx_first_pass[0][1][6] = 0
4929 16:34:33.687555 tx_last_pass[0][1][6] = 0
4930 16:34:33.690789 tx_win_center[0][1][7] = 0
4931 16:34:33.690928 tx_first_pass[0][1][7] = 0
4932 16:34:33.694232 tx_last_pass[0][1][7] = 0
4933 16:34:33.697467 tx_win_center[0][1][8] = 0
4934 16:34:33.697587 tx_first_pass[0][1][8] = 0
4935 16:34:33.701288 tx_last_pass[0][1][8] = 0
4936 16:34:33.704461 tx_win_center[0][1][9] = 0
4937 16:34:33.707446 tx_first_pass[0][1][9] = 0
4938 16:34:33.707553 tx_last_pass[0][1][9] = 0
4939 16:34:33.711186 tx_win_center[0][1][10] = 0
4940 16:34:33.714222 tx_first_pass[0][1][10] = 0
4941 16:34:33.717780 tx_last_pass[0][1][10] = 0
4942 16:34:33.717910 tx_win_center[0][1][11] = 0
4943 16:34:33.721038 tx_first_pass[0][1][11] = 0
4944 16:34:33.724123 tx_last_pass[0][1][11] = 0
4945 16:34:33.727903 tx_win_center[0][1][12] = 0
4946 16:34:33.728032 tx_first_pass[0][1][12] = 0
4947 16:34:33.731018 tx_last_pass[0][1][12] = 0
4948 16:34:33.734316 tx_win_center[0][1][13] = 0
4949 16:34:33.737440 tx_first_pass[0][1][13] = 0
4950 16:34:33.737558 tx_last_pass[0][1][13] = 0
4951 16:34:33.740619 tx_win_center[0][1][14] = 0
4952 16:34:33.744286 tx_first_pass[0][1][14] = 0
4953 16:34:33.747273 tx_last_pass[0][1][14] = 0
4954 16:34:33.747386 tx_win_center[0][1][15] = 0
4955 16:34:33.750865 tx_first_pass[0][1][15] = 0
4956 16:34:33.753941 tx_last_pass[0][1][15] = 0
4957 16:34:33.757547 tx_win_center[1][0][0] = 0
4958 16:34:33.757677 tx_first_pass[1][0][0] = 0
4959 16:34:33.760784 tx_last_pass[1][0][0] = 0
4960 16:34:33.764205 tx_win_center[1][0][1] = 0
4961 16:34:33.767187 tx_first_pass[1][0][1] = 0
4962 16:34:33.767310 tx_last_pass[1][0][1] = 0
4963 16:34:33.770325 tx_win_center[1][0][2] = 0
4964 16:34:33.773710 tx_first_pass[1][0][2] = 0
4965 16:34:33.773828 tx_last_pass[1][0][2] = 0
4966 16:34:33.776907 tx_win_center[1][0][3] = 0
4967 16:34:33.780629 tx_first_pass[1][0][3] = 0
4968 16:34:33.783713 tx_last_pass[1][0][3] = 0
4969 16:34:33.783835 tx_win_center[1][0][4] = 0
4970 16:34:33.787450 tx_first_pass[1][0][4] = 0
4971 16:34:33.790754 tx_last_pass[1][0][4] = 0
4972 16:34:33.793848 tx_win_center[1][0][5] = 0
4973 16:34:33.793961 tx_first_pass[1][0][5] = 0
4974 16:34:33.797047 tx_last_pass[1][0][5] = 0
4975 16:34:33.800357 tx_win_center[1][0][6] = 0
4976 16:34:33.800478 tx_first_pass[1][0][6] = 0
4977 16:34:33.804264 tx_last_pass[1][0][6] = 0
4978 16:34:33.807431 tx_win_center[1][0][7] = 0
4979 16:34:33.810588 tx_first_pass[1][0][7] = 0
4980 16:34:33.810710 tx_last_pass[1][0][7] = 0
4981 16:34:33.813700 tx_win_center[1][0][8] = 0
4982 16:34:33.816827 tx_first_pass[1][0][8] = 0
4983 16:34:33.816948 tx_last_pass[1][0][8] = 0
4984 16:34:33.820536 tx_win_center[1][0][9] = 0
4985 16:34:33.823508 tx_first_pass[1][0][9] = 0
4986 16:34:33.827086 tx_last_pass[1][0][9] = 0
4987 16:34:33.827185 tx_win_center[1][0][10] = 0
4988 16:34:33.830665 tx_first_pass[1][0][10] = 0
4989 16:34:33.833809 tx_last_pass[1][0][10] = 0
4990 16:34:33.837037 tx_win_center[1][0][11] = 0
4991 16:34:33.837160 tx_first_pass[1][0][11] = 0
4992 16:34:33.840129 tx_last_pass[1][0][11] = 0
4993 16:34:33.843918 tx_win_center[1][0][12] = 0
4994 16:34:33.847150 tx_first_pass[1][0][12] = 0
4995 16:34:33.847271 tx_last_pass[1][0][12] = 0
4996 16:34:33.850358 tx_win_center[1][0][13] = 0
4997 16:34:33.853979 tx_first_pass[1][0][13] = 0
4998 16:34:33.856948 tx_last_pass[1][0][13] = 0
4999 16:34:33.857067 tx_win_center[1][0][14] = 0
5000 16:34:33.860465 tx_first_pass[1][0][14] = 0
5001 16:34:33.863468 tx_last_pass[1][0][14] = 0
5002 16:34:33.866788 tx_win_center[1][0][15] = 0
5003 16:34:33.866905 tx_first_pass[1][0][15] = 0
5004 16:34:33.870510 tx_last_pass[1][0][15] = 0
5005 16:34:33.873564 tx_win_center[1][1][0] = 0
5006 16:34:33.876776 tx_first_pass[1][1][0] = 0
5007 16:34:33.876870 tx_last_pass[1][1][0] = 0
5008 16:34:33.880403 tx_win_center[1][1][1] = 0
5009 16:34:33.883440 tx_first_pass[1][1][1] = 0
5010 16:34:33.886920 tx_last_pass[1][1][1] = 0
5011 16:34:33.887013 tx_win_center[1][1][2] = 0
5012 16:34:33.890363 tx_first_pass[1][1][2] = 0
5013 16:34:33.893292 tx_last_pass[1][1][2] = 0
5014 16:34:33.896581 tx_win_center[1][1][3] = 0
5015 16:34:33.896674 tx_first_pass[1][1][3] = 0
5016 16:34:33.900434 tx_last_pass[1][1][3] = 0
5017 16:34:33.903534 tx_win_center[1][1][4] = 0
5018 16:34:33.903620 tx_first_pass[1][1][4] = 0
5019 16:34:33.906851 tx_last_pass[1][1][4] = 0
5020 16:34:33.910154 tx_win_center[1][1][5] = 0
5021 16:34:33.913249 tx_first_pass[1][1][5] = 0
5022 16:34:33.913366 tx_last_pass[1][1][5] = 0
5023 16:34:33.916448 tx_win_center[1][1][6] = 0
5024 16:34:33.919805 tx_first_pass[1][1][6] = 0
5025 16:34:33.919893 tx_last_pass[1][1][6] = 0
5026 16:34:33.923068 tx_win_center[1][1][7] = 0
5027 16:34:33.926874 tx_first_pass[1][1][7] = 0
5028 16:34:33.929986 tx_last_pass[1][1][7] = 0
5029 16:34:33.930142 tx_win_center[1][1][8] = 0
5030 16:34:33.933672 tx_first_pass[1][1][8] = 0
5031 16:34:33.936538 tx_last_pass[1][1][8] = 0
5032 16:34:33.940369 tx_win_center[1][1][9] = 0
5033 16:34:33.940490 tx_first_pass[1][1][9] = 0
5034 16:34:33.943722 tx_last_pass[1][1][9] = 0
5035 16:34:33.946886 tx_win_center[1][1][10] = 0
5036 16:34:33.950105 tx_first_pass[1][1][10] = 0
5037 16:34:33.950228 tx_last_pass[1][1][10] = 0
5038 16:34:33.953307 tx_win_center[1][1][11] = 0
5039 16:34:33.956880 tx_first_pass[1][1][11] = 0
5040 16:34:33.960263 tx_last_pass[1][1][11] = 0
5041 16:34:33.960383 tx_win_center[1][1][12] = 0
5042 16:34:33.963441 tx_first_pass[1][1][12] = 0
5043 16:34:33.966283 tx_last_pass[1][1][12] = 0
5044 16:34:33.969854 tx_win_center[1][1][13] = 0
5045 16:34:33.969977 tx_first_pass[1][1][13] = 0
5046 16:34:33.972904 tx_last_pass[1][1][13] = 0
5047 16:34:33.976434 tx_win_center[1][1][14] = 0
5048 16:34:33.979670 tx_first_pass[1][1][14] = 0
5049 16:34:33.979807 tx_last_pass[1][1][14] = 0
5050 16:34:33.983170 tx_win_center[1][1][15] = 0
5051 16:34:33.986218 tx_first_pass[1][1][15] = 0
5052 16:34:33.990052 tx_last_pass[1][1][15] = 0
5053 16:34:33.990137 dump params rx window
5054 16:34:33.993197 rx_firspass[0][0][0] = 0
5055 16:34:33.996325 rx_lastpass[0][0][0] = 0
5056 16:34:33.996414 rx_firspass[0][0][1] = 0
5057 16:34:33.999861 rx_lastpass[0][0][1] = 0
5058 16:34:34.003328 rx_firspass[0][0][2] = 0
5059 16:34:34.003428 rx_lastpass[0][0][2] = 0
5060 16:34:34.006693 rx_firspass[0][0][3] = 0
5061 16:34:34.009847 rx_lastpass[0][0][3] = 0
5062 16:34:34.009939 rx_firspass[0][0][4] = 0
5063 16:34:34.013627 rx_lastpass[0][0][4] = 0
5064 16:34:34.016804 rx_firspass[0][0][5] = 0
5065 16:34:34.016894 rx_lastpass[0][0][5] = 0
5066 16:34:34.019872 rx_firspass[0][0][6] = 0
5067 16:34:34.023056 rx_lastpass[0][0][6] = 0
5068 16:34:34.023154 rx_firspass[0][0][7] = 0
5069 16:34:34.026677 rx_lastpass[0][0][7] = 0
5070 16:34:34.029847 rx_firspass[0][0][8] = 0
5071 16:34:34.029977 rx_lastpass[0][0][8] = 0
5072 16:34:34.033495 rx_firspass[0][0][9] = 0
5073 16:34:34.036489 rx_lastpass[0][0][9] = 0
5074 16:34:34.039891 rx_firspass[0][0][10] = 0
5075 16:34:34.040019 rx_lastpass[0][0][10] = 0
5076 16:34:34.043239 rx_firspass[0][0][11] = 0
5077 16:34:34.046176 rx_lastpass[0][0][11] = 0
5078 16:34:34.046293 rx_firspass[0][0][12] = 0
5079 16:34:34.049885 rx_lastpass[0][0][12] = 0
5080 16:34:34.052945 rx_firspass[0][0][13] = 0
5081 16:34:34.056060 rx_lastpass[0][0][13] = 0
5082 16:34:34.056186 rx_firspass[0][0][14] = 0
5083 16:34:34.059695 rx_lastpass[0][0][14] = 0
5084 16:34:34.062741 rx_firspass[0][0][15] = 0
5085 16:34:34.062836 rx_lastpass[0][0][15] = 0
5086 16:34:34.066494 rx_firspass[0][1][0] = 0
5087 16:34:34.069577 rx_lastpass[0][1][0] = 0
5088 16:34:34.069691 rx_firspass[0][1][1] = 0
5089 16:34:34.073174 rx_lastpass[0][1][1] = 0
5090 16:34:34.076274 rx_firspass[0][1][2] = 0
5091 16:34:34.079781 rx_lastpass[0][1][2] = 0
5092 16:34:34.079883 rx_firspass[0][1][3] = 0
5093 16:34:34.083202 rx_lastpass[0][1][3] = 0
5094 16:34:34.085971 rx_firspass[0][1][4] = 0
5095 16:34:34.086088 rx_lastpass[0][1][4] = 0
5096 16:34:34.089407 rx_firspass[0][1][5] = 0
5097 16:34:34.092844 rx_lastpass[0][1][5] = 0
5098 16:34:34.092977 rx_firspass[0][1][6] = 0
5099 16:34:34.096090 rx_lastpass[0][1][6] = 0
5100 16:34:34.099791 rx_firspass[0][1][7] = 0
5101 16:34:34.099934 rx_lastpass[0][1][7] = 0
5102 16:34:34.102881 rx_firspass[0][1][8] = 0
5103 16:34:34.105939 rx_lastpass[0][1][8] = 0
5104 16:34:34.109527 rx_firspass[0][1][9] = 0
5105 16:34:34.109615 rx_lastpass[0][1][9] = 0
5106 16:34:34.112550 rx_firspass[0][1][10] = 0
5107 16:34:34.116177 rx_lastpass[0][1][10] = 0
5108 16:34:34.116274 rx_firspass[0][1][11] = 0
5109 16:34:34.119482 rx_lastpass[0][1][11] = 0
5110 16:34:34.122696 rx_firspass[0][1][12] = 0
5111 16:34:34.125742 rx_lastpass[0][1][12] = 0
5112 16:34:34.125841 rx_firspass[0][1][13] = 0
5113 16:34:34.129432 rx_lastpass[0][1][13] = 0
5114 16:34:34.132516 rx_firspass[0][1][14] = 0
5115 16:34:34.132635 rx_lastpass[0][1][14] = 0
5116 16:34:34.135680 rx_firspass[0][1][15] = 0
5117 16:34:34.139219 rx_lastpass[0][1][15] = 0
5118 16:34:34.139311 rx_firspass[1][0][0] = 0
5119 16:34:34.142715 rx_lastpass[1][0][0] = 0
5120 16:34:34.146154 rx_firspass[1][0][1] = 0
5121 16:34:34.149181 rx_lastpass[1][0][1] = 0
5122 16:34:34.149271 rx_firspass[1][0][2] = 0
5123 16:34:34.152764 rx_lastpass[1][0][2] = 0
5124 16:34:34.155851 rx_firspass[1][0][3] = 0
5125 16:34:34.155942 rx_lastpass[1][0][3] = 0
5126 16:34:34.158929 rx_firspass[1][0][4] = 0
5127 16:34:34.162097 rx_lastpass[1][0][4] = 0
5128 16:34:34.162186 rx_firspass[1][0][5] = 0
5129 16:34:34.165759 rx_lastpass[1][0][5] = 0
5130 16:34:34.169004 rx_firspass[1][0][6] = 0
5131 16:34:34.169095 rx_lastpass[1][0][6] = 0
5132 16:34:34.172460 rx_firspass[1][0][7] = 0
5133 16:34:34.175567 rx_lastpass[1][0][7] = 0
5134 16:34:34.178850 rx_firspass[1][0][8] = 0
5135 16:34:34.178942 rx_lastpass[1][0][8] = 0
5136 16:34:34.182206 rx_firspass[1][0][9] = 0
5137 16:34:34.185343 rx_lastpass[1][0][9] = 0
5138 16:34:34.185462 rx_firspass[1][0][10] = 0
5139 16:34:34.189158 rx_lastpass[1][0][10] = 0
5140 16:34:34.192198 rx_firspass[1][0][11] = 0
5141 16:34:34.192320 rx_lastpass[1][0][11] = 0
5142 16:34:34.195260 rx_firspass[1][0][12] = 0
5143 16:34:34.198884 rx_lastpass[1][0][12] = 0
5144 16:34:34.201893 rx_firspass[1][0][13] = 0
5145 16:34:34.202023 rx_lastpass[1][0][13] = 0
5146 16:34:34.205229 rx_firspass[1][0][14] = 0
5147 16:34:34.208505 rx_lastpass[1][0][14] = 0
5148 16:34:34.208598 rx_firspass[1][0][15] = 0
5149 16:34:34.211830 rx_lastpass[1][0][15] = 0
5150 16:34:34.215665 rx_firspass[1][1][0] = 0
5151 16:34:34.218701 rx_lastpass[1][1][0] = 0
5152 16:34:34.218792 rx_firspass[1][1][1] = 0
5153 16:34:34.222322 rx_lastpass[1][1][1] = 0
5154 16:34:34.225248 rx_firspass[1][1][2] = 0
5155 16:34:34.225371 rx_lastpass[1][1][2] = 0
5156 16:34:34.228706 rx_firspass[1][1][3] = 0
5157 16:34:34.232382 rx_lastpass[1][1][3] = 0
5158 16:34:34.232499 rx_firspass[1][1][4] = 0
5159 16:34:34.235373 rx_lastpass[1][1][4] = 0
5160 16:34:34.238476 rx_firspass[1][1][5] = 0
5161 16:34:34.238558 rx_lastpass[1][1][5] = 0
5162 16:34:34.242320 rx_firspass[1][1][6] = 0
5163 16:34:34.245515 rx_lastpass[1][1][6] = 0
5164 16:34:34.245632 rx_firspass[1][1][7] = 0
5165 16:34:34.248559 rx_lastpass[1][1][7] = 0
5166 16:34:34.252237 rx_firspass[1][1][8] = 0
5167 16:34:34.252365 rx_lastpass[1][1][8] = 0
5168 16:34:34.255297 rx_firspass[1][1][9] = 0
5169 16:34:34.258754 rx_lastpass[1][1][9] = 0
5170 16:34:34.262282 rx_firspass[1][1][10] = 0
5171 16:34:34.262394 rx_lastpass[1][1][10] = 0
5172 16:34:34.265444 rx_firspass[1][1][11] = 0
5173 16:34:34.268669 rx_lastpass[1][1][11] = 0
5174 16:34:34.268749 rx_firspass[1][1][12] = 0
5175 16:34:34.271998 rx_lastpass[1][1][12] = 0
5176 16:34:34.275754 rx_firspass[1][1][13] = 0
5177 16:34:34.278537 rx_lastpass[1][1][13] = 0
5178 16:34:34.278624 rx_firspass[1][1][14] = 0
5179 16:34:34.281895 rx_lastpass[1][1][14] = 0
5180 16:34:34.285559 rx_firspass[1][1][15] = 0
5181 16:34:34.285674 rx_lastpass[1][1][15] = 0
5182 16:34:34.288664 dump params clk_delay
5183 16:34:34.288782 clk_delay[0] = 0
5184 16:34:34.291739 clk_delay[1] = 0
5185 16:34:34.295548 dump params dqs_delay
5186 16:34:34.295638 dqs_delay[0][0] = 0
5187 16:34:34.298687 dqs_delay[0][1] = 0
5188 16:34:34.298795 dqs_delay[1][0] = 0
5189 16:34:34.301753 dqs_delay[1][1] = 0
5190 16:34:34.305023 dump params delay_cell_unit = 735
5191 16:34:34.305138 mt_set_emi_preloader end
5192 16:34:34.311849 [mt_mem_init] dram size: 0x100000000, rank number: 2
5193 16:34:34.315423 [complex_mem_test] start addr:0x40000000, len:20480
5194 16:34:34.352394 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5195 16:34:34.358853 [complex_mem_test] start addr:0x80000000, len:20480
5196 16:34:34.394742 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5197 16:34:34.401318 [complex_mem_test] start addr:0xc0000000, len:20480
5198 16:34:34.436709 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5199 16:34:34.443125 [complex_mem_test] start addr:0x56000000, len:8192
5200 16:34:34.459853 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5201 16:34:34.459949 ddr_geometry:1
5202 16:34:34.466458 [complex_mem_test] start addr:0x80000000, len:8192
5203 16:34:34.483752 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5204 16:34:34.487373 dram_init: dram init end (result: 0)
5205 16:34:34.493722 Successfully loaded DRAM blobs and ran DRAM calibration
5206 16:34:34.503828 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5207 16:34:34.503933 CBMEM:
5208 16:34:34.506978 IMD: root @ 00000000fffff000 254 entries.
5209 16:34:34.510599 IMD: root @ 00000000ffffec00 62 entries.
5210 16:34:34.516976 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5211 16:34:34.523447 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5212 16:34:34.527162 in-header: 03 a1 00 00 08 00 00 00
5213 16:34:34.530744 in-data: 84 60 60 10 00 00 00 00
5214 16:34:34.533644 Chrome EC: clear events_b mask to 0x0000000020004000
5215 16:34:34.541214 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5216 16:34:34.544438 in-header: 03 fd 00 00 00 00 00 00
5217 16:34:34.544541 in-data:
5218 16:34:34.550791 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5219 16:34:34.550890 CBFS @ 21000 size 3d4000
5220 16:34:34.557884 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5221 16:34:34.561015 CBFS: Locating 'fallback/ramstage'
5222 16:34:34.563994 CBFS: Found @ offset 10d40 size d563
5223 16:34:34.585924 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5224 16:34:34.597602 Accumulated console time in romstage 13630 ms
5225 16:34:34.597768
5226 16:34:34.597874
5227 16:34:34.608071 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5228 16:34:34.611256 ARM64: Exception handlers installed.
5229 16:34:34.611399 ARM64: Testing exception
5230 16:34:34.614259 ARM64: Done test exception
5231 16:34:34.618006 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5232 16:34:34.621092 Manufacturer: ef
5233 16:34:34.624367 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5234 16:34:34.631325 WARNING: RO_VPD is uninitialized or empty.
5235 16:34:34.634457 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5236 16:34:34.638051 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5237 16:34:34.647554 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5238 16:34:34.650593 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5239 16:34:34.657499 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5240 16:34:34.657623 Enumerating buses...
5241 16:34:34.664300 Show all devs... Before device enumeration.
5242 16:34:34.664446 Root Device: enabled 1
5243 16:34:34.667547 CPU_CLUSTER: 0: enabled 1
5244 16:34:34.667664 CPU: 00: enabled 1
5245 16:34:34.670615 Compare with tree...
5246 16:34:34.674310 Root Device: enabled 1
5247 16:34:34.674451 CPU_CLUSTER: 0: enabled 1
5248 16:34:34.677328 CPU: 00: enabled 1
5249 16:34:34.680760 Root Device scanning...
5250 16:34:34.680855 root_dev_scan_bus for Root Device
5251 16:34:34.683688 CPU_CLUSTER: 0 enabled
5252 16:34:34.686980 root_dev_scan_bus for Root Device done
5253 16:34:34.693827 scan_bus: scanning of bus Root Device took 10689 usecs
5254 16:34:34.693931 done
5255 16:34:34.696943 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5256 16:34:34.700278 Allocating resources...
5257 16:34:34.700401 Reading resources...
5258 16:34:34.707215 Root Device read_resources bus 0 link: 0
5259 16:34:34.710352 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5260 16:34:34.713573 CPU: 00 missing read_resources
5261 16:34:34.717310 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5262 16:34:34.720488 Root Device read_resources bus 0 link: 0 done
5263 16:34:34.724041 Done reading resources.
5264 16:34:34.727040 Show resources in subtree (Root Device)...After reading.
5265 16:34:34.730166 Root Device child on link 0 CPU_CLUSTER: 0
5266 16:34:34.733807 CPU_CLUSTER: 0 child on link 0 CPU: 00
5267 16:34:34.743784 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5268 16:34:34.743899 CPU: 00
5269 16:34:34.747379 Setting resources...
5270 16:34:34.750222 Root Device assign_resources, bus 0 link: 0
5271 16:34:34.753617 CPU_CLUSTER: 0 missing set_resources
5272 16:34:34.757278 Root Device assign_resources, bus 0 link: 0
5273 16:34:34.760384 Done setting resources.
5274 16:34:34.767182 Show resources in subtree (Root Device)...After assigning values.
5275 16:34:34.770111 Root Device child on link 0 CPU_CLUSTER: 0
5276 16:34:34.773868 CPU_CLUSTER: 0 child on link 0 CPU: 00
5277 16:34:34.783704 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5278 16:34:34.783831 CPU: 00
5279 16:34:34.786814 Done allocating resources.
5280 16:34:34.790520 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5281 16:34:34.793581 Enabling resources...
5282 16:34:34.793676 done.
5283 16:34:34.797172 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5284 16:34:34.800050 Initializing devices...
5285 16:34:34.800140 Root Device init ...
5286 16:34:34.803629 mainboard_init: Starting display init.
5287 16:34:34.806544 ADC[4]: Raw value=76102 ID=0
5288 16:34:34.830079 anx7625_power_on_init: Init interface.
5289 16:34:34.833618 anx7625_disable_pd_protocol: Disabled PD feature.
5290 16:34:34.840398 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5291 16:34:34.887149 anx7625_start_dp_work: Secure OCM version=00
5292 16:34:34.890281 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5293 16:34:34.907180 sp_tx_get_edid_block: EDID Block = 1
5294 16:34:35.024868 Extracted contents:
5295 16:34:35.027744 header: 00 ff ff ff ff ff ff 00
5296 16:34:35.031120 serial number: 06 af 5c 14 00 00 00 00 00 1a
5297 16:34:35.034866 version: 01 04
5298 16:34:35.038054 basic params: 95 1a 0e 78 02
5299 16:34:35.041245 chroma info: 99 85 95 55 56 92 28 22 50 54
5300 16:34:35.044293 established: 00 00 00
5301 16:34:35.051149 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5302 16:34:35.054166 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5303 16:34:35.061311 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5304 16:34:35.067418 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5305 16:34:35.074087 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5306 16:34:35.077613 extensions: 00
5307 16:34:35.077756 checksum: ae
5308 16:34:35.077861
5309 16:34:35.080805 Manufacturer: AUO Model 145c Serial Number 0
5310 16:34:35.084196 Made week 0 of 2016
5311 16:34:35.084354 EDID version: 1.4
5312 16:34:35.087703 Digital display
5313 16:34:35.090923 6 bits per primary color channel
5314 16:34:35.091053 DisplayPort interface
5315 16:34:35.094699 Maximum image size: 26 cm x 14 cm
5316 16:34:35.097807 Gamma: 220%
5317 16:34:35.097944 Check DPMS levels
5318 16:34:35.101103 Supported color formats: RGB 4:4:4
5319 16:34:35.104105 First detailed timing is preferred timing
5320 16:34:35.107713 Established timings supported:
5321 16:34:35.110667 Standard timings supported:
5322 16:34:35.110774 Detailed timings
5323 16:34:35.117352 Hex of detail: ce1d56ea50001a3030204600009010000018
5324 16:34:35.121096 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5325 16:34:35.124242 0556 0586 05a6 0640 hborder 0
5326 16:34:35.127292 0300 0304 030a 031a vborder 0
5327 16:34:35.130564 -hsync -vsync
5328 16:34:35.134441 Did detailed timing
5329 16:34:35.137645 Hex of detail: 0000000f0000000000000000000000000020
5330 16:34:35.140773 Manufacturer-specified data, tag 15
5331 16:34:35.147310 Hex of detail: 000000fe0041554f0a202020202020202020
5332 16:34:35.147459 ASCII string: AUO
5333 16:34:35.150398 Hex of detail: 000000fe004231313658414230312e34200a
5334 16:34:35.153997 ASCII string: B116XAB01.4
5335 16:34:35.154120 Checksum
5336 16:34:35.157115 Checksum: 0xae (valid)
5337 16:34:35.163959 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5338 16:34:35.166931 DSI data_rate: 457800000 bps
5339 16:34:35.170409 anx7625_parse_edid: set default k value to 0x3d for panel
5340 16:34:35.173661 anx7625_parse_edid: pixelclock(76300).
5341 16:34:35.180468 hactive(1366), hsync(32), hfp(48), hbp(154)
5342 16:34:35.183539 vactive(768), vsync(6), vfp(4), vbp(16)
5343 16:34:35.186612 anx7625_dsi_config: config dsi.
5344 16:34:35.193522 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5345 16:34:35.213928 anx7625_dsi_config: success to config DSI
5346 16:34:35.217116 anx7625_dp_start: MIPI phy setup OK.
5347 16:34:35.220687 [SSUSB] Setting up USB HOST controller...
5348 16:34:35.223760 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5349 16:34:35.227445 [SSUSB] phy power-on done.
5350 16:34:35.231180 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5351 16:34:35.234271 in-header: 03 fc 01 00 00 00 00 00
5352 16:34:35.234356 in-data:
5353 16:34:35.241113 handle_proto3_response: EC response with error code: 1
5354 16:34:35.241228 SPM: pcm index = 1
5355 16:34:35.244054 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5356 16:34:35.247799 CBFS @ 21000 size 3d4000
5357 16:34:35.254462 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5358 16:34:35.257313 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5359 16:34:35.260898 CBFS: Found @ offset 1e7c0 size 1026
5360 16:34:35.267855 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5361 16:34:35.270924 SPM: binary array size = 2988
5362 16:34:35.274045 SPM: version = pcm_allinone_v1.17.2_20180829
5363 16:34:35.277705 SPM binary loaded in 32 msecs
5364 16:34:35.284843 spm_kick_im_to_fetch: ptr = 000000004021eec2
5365 16:34:35.288200 spm_kick_im_to_fetch: len = 2988
5366 16:34:35.288326 SPM: spm_kick_pcm_to_run
5367 16:34:35.291488 SPM: spm_kick_pcm_to_run done
5368 16:34:35.295208 SPM: spm_init done in 52 msecs
5369 16:34:35.298085 Root Device init finished in 494984 usecs
5370 16:34:35.301593 CPU_CLUSTER: 0 init ...
5371 16:34:35.311625 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5372 16:34:35.315104 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5373 16:34:35.318103 CBFS @ 21000 size 3d4000
5374 16:34:35.321810 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5375 16:34:35.324917 CBFS: Locating 'sspm.bin'
5376 16:34:35.328386 CBFS: Found @ offset 208c0 size 41cb
5377 16:34:35.338079 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5378 16:34:35.346051 CPU_CLUSTER: 0 init finished in 42802 usecs
5379 16:34:35.346186 Devices initialized
5380 16:34:35.349654 Show all devs... After init.
5381 16:34:35.352790 Root Device: enabled 1
5382 16:34:35.352905 CPU_CLUSTER: 0: enabled 1
5383 16:34:35.355802 CPU: 00: enabled 1
5384 16:34:35.359434 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5385 16:34:35.362902 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5386 16:34:35.366075 ELOG: NV offset 0x558000 size 0x1000
5387 16:34:35.373420 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5388 16:34:35.380208 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5389 16:34:35.383310 ELOG: Event(17) added with size 13 at 2024-06-17 16:33:37 UTC
5390 16:34:35.387116 out: cmd=0x121: 03 db 21 01 00 00 00 00
5391 16:34:35.390738 in-header: 03 24 00 00 2c 00 00 00
5392 16:34:35.403960 in-data: 7e 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 9e c3 07 00 06 80 00 00 e2 5f 0f 00 06 80 00 00 bb 6d 01 00 06 80 00 00 3c 9b 02 00
5393 16:34:35.407028 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5394 16:34:35.410338 in-header: 03 19 00 00 08 00 00 00
5395 16:34:35.413669 in-data: a2 e0 47 00 13 00 00 00
5396 16:34:35.417111 Chrome EC: UHEPI supported
5397 16:34:35.423639 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5398 16:34:35.426755 in-header: 03 e1 00 00 08 00 00 00
5399 16:34:35.430325 in-data: 84 20 60 10 00 00 00 00
5400 16:34:35.433279 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5401 16:34:35.440050 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5402 16:34:35.443751 in-header: 03 e1 00 00 08 00 00 00
5403 16:34:35.446893 in-data: 84 20 60 10 00 00 00 00
5404 16:34:35.453576 ELOG: Event(A1) added with size 10 at 2024-06-17 16:33:37 UTC
5405 16:34:35.460361 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5406 16:34:35.463480 ELOG: Event(A0) added with size 9 at 2024-06-17 16:33:37 UTC
5407 16:34:35.470089 elog_add_boot_reason: Logged dev mode boot
5408 16:34:35.470235 Finalize devices...
5409 16:34:35.473203 Devices finalized
5410 16:34:35.476918 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5411 16:34:35.480000 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5412 16:34:35.486345 ELOG: Event(91) added with size 10 at 2024-06-17 16:33:37 UTC
5413 16:34:35.490186 Writing coreboot table at 0xffeda000
5414 16:34:35.493082 0. 0000000000114000-000000000011efff: RAMSTAGE
5415 16:34:35.499817 1. 0000000040000000-000000004023cfff: RAMSTAGE
5416 16:34:35.503566 2. 000000004023d000-00000000545fffff: RAM
5417 16:34:35.506660 3. 0000000054600000-000000005465ffff: BL31
5418 16:34:35.509669 4. 0000000054660000-00000000ffed9fff: RAM
5419 16:34:35.516609 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5420 16:34:35.519650 6. 0000000100000000-000000013fffffff: RAM
5421 16:34:35.522890 Passing 5 GPIOs to payload:
5422 16:34:35.526378 NAME | PORT | POLARITY | VALUE
5423 16:34:35.529908 write protect | 0x00000096 | low | low
5424 16:34:35.536721 EC in RW | 0x000000b1 | high | undefined
5425 16:34:35.539700 EC interrupt | 0x00000097 | low | undefined
5426 16:34:35.546132 TPM interrupt | 0x00000099 | high | undefined
5427 16:34:35.549458 speaker enable | 0x000000af | high | undefined
5428 16:34:35.553276 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5429 16:34:35.556209 in-header: 03 f7 00 00 02 00 00 00
5430 16:34:35.559863 in-data: 04 00
5431 16:34:35.559954 Board ID: 4
5432 16:34:35.562821 ADC[3]: Raw value=215504 ID=1
5433 16:34:35.562944 RAM code: 1
5434 16:34:35.563051 SKU ID: 16
5435 16:34:35.569587 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5436 16:34:35.569714 CBFS @ 21000 size 3d4000
5437 16:34:35.576376 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5438 16:34:35.582654 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum dfc6
5439 16:34:35.586582 coreboot table: 940 bytes.
5440 16:34:35.589633 IMD ROOT 0. 00000000fffff000 00001000
5441 16:34:35.592640 IMD SMALL 1. 00000000ffffe000 00001000
5442 16:34:35.596329 CONSOLE 2. 00000000fffde000 00020000
5443 16:34:35.599276 FMAP 3. 00000000fffdd000 0000047c
5444 16:34:35.602997 TIME STAMP 4. 00000000fffdc000 00000910
5445 16:34:35.606011 RAMOOPS 5. 00000000ffedc000 00100000
5446 16:34:35.609188 COREBOOT 6. 00000000ffeda000 00002000
5447 16:34:35.613014 IMD small region:
5448 16:34:35.616150 IMD ROOT 0. 00000000ffffec00 00000400
5449 16:34:35.619179 VBOOT WORK 1. 00000000ffffeb00 00000100
5450 16:34:35.622563 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5451 16:34:35.626335 VPD 3. 00000000ffffea60 0000006c
5452 16:34:35.632607 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5453 16:34:35.639312 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5454 16:34:35.642816 in-header: 03 e1 00 00 08 00 00 00
5455 16:34:35.646224 in-data: 84 20 60 10 00 00 00 00
5456 16:34:35.649202 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5457 16:34:35.652599 CBFS @ 21000 size 3d4000
5458 16:34:35.655931 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5459 16:34:35.659368 CBFS: Locating 'fallback/payload'
5460 16:34:35.664676 CBFS: Found @ offset dc040 size 439a0
5461 16:34:35.756036 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5462 16:34:35.759129 Checking segment from ROM address 0x0000000040003a00
5463 16:34:35.765347 Checking segment from ROM address 0x0000000040003a1c
5464 16:34:35.768926 Loading segment from ROM address 0x0000000040003a00
5465 16:34:35.772330 code (compression=0)
5466 16:34:35.781986 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5467 16:34:35.788625 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5468 16:34:35.792380 it's not compressed!
5469 16:34:35.795439 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5470 16:34:35.802279 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5471 16:34:35.809906 Loading segment from ROM address 0x0000000040003a1c
5472 16:34:35.813538 Entry Point 0x0000000080000000
5473 16:34:35.813655 Loaded segments
5474 16:34:35.819904 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5475 16:34:35.823562 Jumping to boot code at 0000000080000000(00000000ffeda000)
5476 16:34:35.833487 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5477 16:34:35.836457 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5478 16:34:35.839986 CBFS @ 21000 size 3d4000
5479 16:34:35.846590 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5480 16:34:35.846686 CBFS: Locating 'fallback/bl31'
5481 16:34:35.850081 CBFS: Found @ offset 36dc0 size 5820
5482 16:34:35.863956 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5483 16:34:35.867169 Checking segment from ROM address 0x0000000040003a00
5484 16:34:35.873765 Checking segment from ROM address 0x0000000040003a1c
5485 16:34:35.876778 Loading segment from ROM address 0x0000000040003a00
5486 16:34:35.880564 code (compression=1)
5487 16:34:35.886811 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5488 16:34:35.896763 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5489 16:34:35.896870 using LZMA
5490 16:34:35.905706 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5491 16:34:35.912132 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5492 16:34:35.915302 Loading segment from ROM address 0x0000000040003a1c
5493 16:34:35.918991 Entry Point 0x0000000054601000
5494 16:34:35.919073 Loaded segments
5495 16:34:35.922104 NOTICE: MT8183 bl31_setup
5496 16:34:35.929526 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5497 16:34:35.932579 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5498 16:34:35.936284 INFO: [DEVAPC] dump DEVAPC registers:
5499 16:34:35.945932 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5500 16:34:35.952925 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5501 16:34:35.959661 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5502 16:34:35.969398 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5503 16:34:35.979164 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5504 16:34:35.985895 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5505 16:34:35.996362 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5506 16:34:36.002678 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5507 16:34:36.009559 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5508 16:34:36.019147 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5509 16:34:36.025883 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5510 16:34:36.035707 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5511 16:34:36.042448 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5512 16:34:36.049306 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5513 16:34:36.059134 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5514 16:34:36.065433 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5515 16:34:36.072555 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5516 16:34:36.078662 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5517 16:34:36.088679 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5518 16:34:36.095511 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5519 16:34:36.102273 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5520 16:34:36.108482 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5521 16:34:36.112250 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5522 16:34:36.115393 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5523 16:34:36.118514 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5524 16:34:36.122195 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5525 16:34:36.125108 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5526 16:34:36.131870 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5527 16:34:36.138678 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5528 16:34:36.138808 WARNING: region 0:
5529 16:34:36.141744 WARNING: apc:0x168, sa:0x0, ea:0xfff
5530 16:34:36.145461 WARNING: region 1:
5531 16:34:36.148632 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5532 16:34:36.148749 WARNING: region 2:
5533 16:34:36.151764 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5534 16:34:36.155492 WARNING: region 3:
5535 16:34:36.158537 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5536 16:34:36.161558 WARNING: region 4:
5537 16:34:36.165018 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5538 16:34:36.165139 WARNING: region 5:
5539 16:34:36.168621 WARNING: apc:0x0, sa:0x0, ea:0x0
5540 16:34:36.171432 WARNING: region 6:
5541 16:34:36.174772 WARNING: apc:0x0, sa:0x0, ea:0x0
5542 16:34:36.174889 WARNING: region 7:
5543 16:34:36.178105 WARNING: apc:0x0, sa:0x0, ea:0x0
5544 16:34:36.184764 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5545 16:34:36.188391 INFO: SPM: enable SPMC mode
5546 16:34:36.192000 NOTICE: spm_boot_init() start
5547 16:34:36.194853 NOTICE: spm_boot_init() end
5548 16:34:36.198452 INFO: BL31: Initializing runtime services
5549 16:34:36.204549 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5550 16:34:36.208256 INFO: BL31: Preparing for EL3 exit to normal world
5551 16:34:36.211296 INFO: Entry point address = 0x80000000
5552 16:34:36.215010 INFO: SPSR = 0x8
5553 16:34:36.236134
5554 16:34:36.236298
5555 16:34:36.236406
5556 16:34:36.236973 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5557 16:34:36.237128 start: 2.2.4 bootloader-commands (timeout 00:04:25) [common]
5558 16:34:36.237255 Setting prompt string to ['jacuzzi:']
5559 16:34:36.237383 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:25)
5560 16:34:36.239123 Starting depthcharge on Juniper...
5561 16:34:36.239243
5562 16:34:36.242685 vboot_handoff: creating legacy vboot_handoff structure
5563 16:34:36.242804
5564 16:34:36.246004 ec_init(0): CrosEC protocol v3 supported (544, 544)
5565 16:34:36.246121
5566 16:34:36.249294 Wipe memory regions:
5567 16:34:36.249410
5568 16:34:36.252269 [0x00000040000000, 0x00000054600000)
5569 16:34:36.295547
5570 16:34:36.295722 [0x00000054660000, 0x00000080000000)
5571 16:34:36.387107
5572 16:34:36.387283 [0x000000811994a0, 0x000000ffeda000)
5573 16:34:36.646738
5574 16:34:36.646922 [0x00000100000000, 0x00000140000000)
5575 16:34:36.779520
5576 16:34:36.783133 Initializing XHCI USB controller at 0x11200000.
5577 16:34:36.806377
5578 16:34:36.809307 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5579 16:34:36.809400
5580 16:34:36.809472
5581 16:34:36.809770 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5583 16:34:36.910099 jacuzzi: tftpboot 192.168.201.1 14396124/tftp-deploy-c85998ow/kernel/image.itb 14396124/tftp-deploy-c85998ow/kernel/cmdline
5584 16:34:36.910273 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5585 16:34:36.910370 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:24)
5586 16:34:36.914515 tftpboot 192.168.201.1 14396124/tftp-deploy-c85998ow/kernel/image.ittp-deploy-c85998ow/kernel/cmdline
5587 16:34:36.914607
5588 16:34:36.914677 Waiting for link
5589 16:34:37.320351
5590 16:34:37.320497 R8152: Initializing
5591 16:34:37.320575
5592 16:34:37.323679 Version 9 (ocp_data = 6010)
5593 16:34:37.323773
5594 16:34:37.326668 R8152: Done initializing
5595 16:34:37.326760
5596 16:34:37.326831 Adding net device
5597 16:34:37.712573
5598 16:34:37.712738 done.
5599 16:34:37.712820
5600 16:34:37.712888 MAC: 00:e0:4c:68:0b:b9
5601 16:34:37.712953
5602 16:34:37.715550 Sending DHCP discover... done.
5603 16:34:37.715667
5604 16:34:37.719183 Waiting for reply... done.
5605 16:34:37.719309
5606 16:34:37.721909 Sending DHCP request... done.
5607 16:34:37.722030
5608 16:34:37.722134 Waiting for reply... done.
5609 16:34:37.722233
5610 16:34:37.725869 My ip is 192.168.201.13
5611 16:34:37.725971
5612 16:34:37.728985 The DHCP server ip is 192.168.201.1
5613 16:34:37.729234
5614 16:34:37.731984 TFTP server IP predefined by user: 192.168.201.1
5615 16:34:37.732197
5616 16:34:37.738719 Bootfile predefined by user: 14396124/tftp-deploy-c85998ow/kernel/image.itb
5617 16:34:37.739006
5618 16:34:37.742151 Sending tftp read request... done.
5619 16:34:37.742385
5620 16:34:37.745655 Waiting for the transfer...
5621 16:34:37.745905
5622 16:34:38.029241 00000000 ################################################################
5623 16:34:38.029405
5624 16:34:38.308942 00080000 ################################################################
5625 16:34:38.309103
5626 16:34:38.582370 00100000 ################################################################
5627 16:34:38.582541
5628 16:34:38.851414 00180000 ################################################################
5629 16:34:38.851595
5630 16:34:39.125962 00200000 ################################################################
5631 16:34:39.126145
5632 16:34:39.386667 00280000 ################################################################
5633 16:34:39.386931
5634 16:34:39.652096 00300000 ################################################################
5635 16:34:39.652256
5636 16:34:39.908965 00380000 ################################################################
5637 16:34:39.909107
5638 16:34:40.164425 00400000 ################################################################
5639 16:34:40.164608
5640 16:34:40.426890 00480000 ################################################################
5641 16:34:40.427043
5642 16:34:40.685066 00500000 ################################################################
5643 16:34:40.685207
5644 16:34:40.949593 00580000 ################################################################
5645 16:34:40.949775
5646 16:34:41.214431 00600000 ################################################################
5647 16:34:41.214621
5648 16:34:41.467083 00680000 ################################################################
5649 16:34:41.467274
5650 16:34:41.719582 00700000 ################################################################
5651 16:34:41.719754
5652 16:34:42.010557 00780000 ################################################################
5653 16:34:42.010734
5654 16:34:42.290509 00800000 ################################################################
5655 16:34:42.290656
5656 16:34:42.611781 00880000 ################################################################
5657 16:34:42.611922
5658 16:34:42.874929 00900000 ################################################################
5659 16:34:42.875082
5660 16:34:43.142640 00980000 ################################################################
5661 16:34:43.142804
5662 16:34:43.408918 00a00000 ################################################################
5663 16:34:43.409058
5664 16:34:43.658957 00a80000 ################################################################
5665 16:34:43.659104
5666 16:34:43.903692 00b00000 ################################################################
5667 16:34:43.903834
5668 16:34:44.151468 00b80000 ################################################################
5669 16:34:44.151655
5670 16:34:44.405827 00c00000 ################################################################
5671 16:34:44.406068
5672 16:34:44.666146 00c80000 ################################################################
5673 16:34:44.666306
5674 16:34:44.915449 00d00000 ################################################################
5675 16:34:44.915623
5676 16:34:45.166701 00d80000 ################################################################
5677 16:34:45.166853
5678 16:34:45.418335 00e00000 ################################################################
5679 16:34:45.418529
5680 16:34:45.673100 00e80000 ################################################################
5681 16:34:45.673243
5682 16:34:45.937729 00f00000 ################################################################
5683 16:34:45.937898
5684 16:34:46.201064 00f80000 ################################################################
5685 16:34:46.201258
5686 16:34:46.469295 01000000 ################################################################
5687 16:34:46.469481
5688 16:34:46.727839 01080000 ################################################################
5689 16:34:46.728045
5690 16:34:46.994394 01100000 ################################################################
5691 16:34:46.994569
5692 16:34:47.264749 01180000 ################################################################
5693 16:34:47.264895
5694 16:34:47.516802 01200000 ################################################################
5695 16:34:47.516951
5696 16:34:47.771848 01280000 ################################################################
5697 16:34:47.772000
5698 16:34:48.022472 01300000 ################################################################
5699 16:34:48.022654
5700 16:34:48.271431 01380000 ################################################################
5701 16:34:48.271590
5702 16:34:48.530469 01400000 ################################################################
5703 16:34:48.530645
5704 16:34:48.798168 01480000 ################################################################
5705 16:34:48.798352
5706 16:34:49.078063 01500000 ################################################################
5707 16:34:49.078262
5708 16:34:49.341584 01580000 ################################################################
5709 16:34:49.341751
5710 16:34:49.600385 01600000 ################################################################
5711 16:34:49.600526
5712 16:34:49.857852 01680000 ################################################################
5713 16:34:49.858012
5714 16:34:50.117215 01700000 ################################################################
5715 16:34:50.117406
5716 16:34:50.369115 01780000 ################################################################
5717 16:34:50.369292
5718 16:34:50.646469 01800000 ################################################################
5719 16:34:50.646669
5720 16:34:50.906733 01880000 ################################################################
5721 16:34:50.906873
5722 16:34:51.160749 01900000 ################################################################
5723 16:34:51.160911
5724 16:34:51.419349 01980000 ################################################################
5725 16:34:51.419522
5726 16:34:51.678269 01a00000 ################################################################
5727 16:34:51.678432
5728 16:34:51.935604 01a80000 ################################################################
5729 16:34:51.935770
5730 16:34:52.194549 01b00000 ################################################################
5731 16:34:52.194718
5732 16:34:52.444873 01b80000 ################################################################
5733 16:34:52.445031
5734 16:34:52.695760 01c00000 ################################################################
5735 16:34:52.695913
5736 16:34:52.945791 01c80000 ################################################################
5737 16:34:52.945941
5738 16:34:53.196278 01d00000 ################################################################
5739 16:34:53.196480
5740 16:34:53.445319 01d80000 ################################################################
5741 16:34:53.445513
5742 16:34:53.683258 01e00000 ########################################################## done.
5743 16:34:53.683457
5744 16:34:53.686186 The bootfile was 31931838 bytes long.
5745 16:34:53.686318
5746 16:34:53.689449 Sending tftp read request... done.
5747 16:34:53.689544
5748 16:34:53.689622 Waiting for the transfer...
5749 16:34:53.689728
5750 16:34:53.693117 00000000 # done.
5751 16:34:53.693216
5752 16:34:53.699260 Command line loaded dynamically from TFTP file: 14396124/tftp-deploy-c85998ow/kernel/cmdline
5753 16:34:53.699362
5754 16:34:53.726064 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14396124/extract-nfsrootfs-mhvcz92t,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5755 16:34:53.726227
5756 16:34:53.726340 Loading FIT.
5757 16:34:53.726450
5758 16:34:53.729229 Image ramdisk-1 has 18743340 bytes.
5759 16:34:53.729331
5760 16:34:53.732383 Image fdt-1 has 57695 bytes.
5761 16:34:53.732478
5762 16:34:53.736272 Image kernel-1 has 13128753 bytes.
5763 16:34:53.736394
5764 16:34:53.745974 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5765 16:34:53.746103
5766 16:34:53.755732 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5767 16:34:53.755866
5768 16:34:53.762203 Choosing best match conf-1 for compat google,juniper-sku16.
5769 16:34:53.766486
5770 16:34:53.771401 Connected to device vid:did:rid of 1ae0:0028:00
5771 16:34:53.779268
5772 16:34:53.782615 tpm_get_response: command 0x17b, return code 0x0
5773 16:34:53.782708
5774 16:34:53.786200 tpm_cleanup: add release locality here.
5775 16:34:53.786316
5776 16:34:53.789421 Shutting down all USB controllers.
5777 16:34:53.789513
5778 16:34:53.792572 Removing current net device
5779 16:34:53.792664
5780 16:34:53.796351 Exiting depthcharge with code 4 at timestamp: 34844973
5781 16:34:53.796444
5782 16:34:53.799326 LZMA decompressing kernel-1 to 0x80193568
5783 16:34:53.802523
5784 16:34:53.806129 LZMA decompressing kernel-1 to 0x40000000
5785 16:34:55.670591
5786 16:34:55.670743 jumping to kernel
5787 16:34:55.671230 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
5788 16:34:55.671342 start: 2.2.5 auto-login-action (timeout 00:04:05) [common]
5789 16:34:55.671436 Setting prompt string to ['Linux version [0-9]']
5790 16:34:55.671513 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5791 16:34:55.671588 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5792 16:34:55.746083
5793 16:34:55.749127 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5794 16:34:55.752406 start: 2.2.5.1 login-action (timeout 00:04:05) [common]
5795 16:34:55.752516 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5796 16:34:55.752598 Setting prompt string to []
5797 16:34:55.752705 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5798 16:34:55.752785 Using line separator: #'\n'#
5799 16:34:55.752849 No login prompt set.
5800 16:34:55.752917 Parsing kernel messages
5801 16:34:55.752977 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5802 16:34:55.753091 [login-action] Waiting for messages, (timeout 00:04:05)
5803 16:34:55.753163 Waiting using forced prompt support (timeout 00:02:02)
5804 16:34:55.772589 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j234605-arm64-gcc-10-defconfig-arm64-chromebook-rs2lc) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Mon Jun 17 16:16:56 UTC 2024
5805 16:34:55.775794 [ 0.000000] random: crng init done
5806 16:34:55.782093 [ 0.000000] Machine model: Google juniper sku16 board
5807 16:34:55.785149 [ 0.000000] efi: UEFI not found.
5808 16:34:55.792178 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5809 16:34:55.801829 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5810 16:34:55.808678 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5811 16:34:55.811550 [ 0.000000] printk: bootconsole [mtk8250] enabled
5812 16:34:55.820681 [ 0.000000] NUMA: No NUMA configuration found
5813 16:34:55.827673 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5814 16:34:55.834308 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5815 16:34:55.834399 [ 0.000000] Zone ranges:
5816 16:34:55.841217 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5817 16:34:55.844158 [ 0.000000] DMA32 empty
5818 16:34:55.851077 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5819 16:34:55.854192 [ 0.000000] Movable zone start for each node
5820 16:34:55.857206 [ 0.000000] Early memory node ranges
5821 16:34:55.864011 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5822 16:34:55.870491 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5823 16:34:55.877193 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5824 16:34:55.884145 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5825 16:34:55.891087 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5826 16:34:55.897053 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5827 16:34:55.913315 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5828 16:34:55.920090 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5829 16:34:55.926308 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5830 16:34:55.929692 [ 0.000000] psci: probing for conduit method from DT.
5831 16:34:55.936485 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5832 16:34:55.939590 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5833 16:34:55.946614 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5834 16:34:55.949656 [ 0.000000] psci: SMC Calling Convention v1.1
5835 16:34:55.956285 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5836 16:34:55.959748 [ 0.000000] Detected VIPT I-cache on CPU0
5837 16:34:55.966481 [ 0.000000] CPU features: detected: GIC system register CPU interface
5838 16:34:55.973117 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5839 16:34:55.979686 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5840 16:34:55.986267 [ 0.000000] CPU features: detected: ARM erratum 845719
5841 16:34:55.989801 [ 0.000000] alternatives: applying boot alternatives
5842 16:34:55.992664 [ 0.000000] Fallback order for Node 0: 0
5843 16:34:55.999304 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5844 16:34:56.002948 [ 0.000000] Policy zone: Normal
5845 16:34:56.029206 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14396124/extract-nfsrootfs-mhvcz92t,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5846 16:34:56.042489 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5847 16:34:56.052535 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5848 16:34:56.059099 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5849 16:34:56.066043 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5850 16:34:56.072266 <6>[ 0.000000] software IO TLB: area num 8.
5851 16:34:56.096352 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5852 16:34:56.154718 <6>[ 0.000000] Memory: 3896768K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 261696K reserved, 32768K cma-reserved)
5853 16:34:56.161232 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5854 16:34:56.167818 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5855 16:34:56.171463 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5856 16:34:56.178132 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5857 16:34:56.184353 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5858 16:34:56.188037 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5859 16:34:56.197813 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5860 16:34:56.204663 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5861 16:34:56.208049 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5862 16:34:56.219515 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5863 16:34:56.226254 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5864 16:34:56.230012 <6>[ 0.000000] GICv3: 640 SPIs implemented
5865 16:34:56.233031 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5866 16:34:56.239276 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5867 16:34:56.242792 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5868 16:34:56.249241 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5869 16:34:56.262849 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5870 16:34:56.272478 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5871 16:34:56.282188 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5872 16:34:56.291319 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5873 16:34:56.304853 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5874 16:34:56.311716 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5875 16:34:56.318205 <6>[ 0.009469] Console: colour dummy device 80x25
5876 16:34:56.321655 <6>[ 0.014517] printk: console [tty1] enabled
5877 16:34:56.334912 <6>[ 0.018907] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5878 16:34:56.338070 <6>[ 0.029372] pid_max: default: 32768 minimum: 301
5879 16:34:56.341819 <6>[ 0.034254] LSM: Security Framework initializing
5880 16:34:56.351598 <6>[ 0.039169] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5881 16:34:56.358075 <6>[ 0.046792] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5882 16:34:56.364771 <4>[ 0.055667] cacheinfo: Unable to detect cache hierarchy for CPU 0
5883 16:34:56.374649 <6>[ 0.062293] cblist_init_generic: Setting adjustable number of callback queues.
5884 16:34:56.381149 <6>[ 0.069738] cblist_init_generic: Setting shift to 3 and lim to 1.
5885 16:34:56.387971 <6>[ 0.076091] cblist_init_generic: Setting adjustable number of callback queues.
5886 16:34:56.394762 <6>[ 0.083536] cblist_init_generic: Setting shift to 3 and lim to 1.
5887 16:34:56.398307 <6>[ 0.089934] rcu: Hierarchical SRCU implementation.
5888 16:34:56.404709 <6>[ 0.094960] rcu: Max phase no-delay instances is 1000.
5889 16:34:56.411553 <6>[ 0.102890] EFI services will not be available.
5890 16:34:56.415288 <6>[ 0.107840] smp: Bringing up secondary CPUs ...
5891 16:34:56.425653 <6>[ 0.113079] Detected VIPT I-cache on CPU1
5892 16:34:56.431805 <4>[ 0.113125] cacheinfo: Unable to detect cache hierarchy for CPU 1
5893 16:34:56.439027 <6>[ 0.113133] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5894 16:34:56.445234 <6>[ 0.113165] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5895 16:34:56.448333 <6>[ 0.113647] Detected VIPT I-cache on CPU2
5896 16:34:56.455098 <4>[ 0.113680] cacheinfo: Unable to detect cache hierarchy for CPU 2
5897 16:34:56.461646 <6>[ 0.113685] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5898 16:34:56.468324 <6>[ 0.113697] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5899 16:34:56.475081 <6>[ 0.114143] Detected VIPT I-cache on CPU3
5900 16:34:56.478160 <4>[ 0.114172] cacheinfo: Unable to detect cache hierarchy for CPU 3
5901 16:34:56.488776 <6>[ 0.114177] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5902 16:34:56.495064 <6>[ 0.114188] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5903 16:34:56.498323 <6>[ 0.114764] CPU features: detected: Spectre-v2
5904 16:34:56.501709 <6>[ 0.114774] CPU features: detected: Spectre-BHB
5905 16:34:56.507970 <6>[ 0.114778] CPU features: detected: ARM erratum 858921
5906 16:34:56.511741 <6>[ 0.114783] Detected VIPT I-cache on CPU4
5907 16:34:56.518271 <4>[ 0.114831] cacheinfo: Unable to detect cache hierarchy for CPU 4
5908 16:34:56.524374 <6>[ 0.114839] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5909 16:34:56.534851 <6>[ 0.114847] arch_timer: Enabling local workaround for ARM erratum 858921
5910 16:34:56.537653 <6>[ 0.114857] arch_timer: CPU4: Trapping CNTVCT access
5911 16:34:56.544300 <6>[ 0.114865] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5912 16:34:56.547799 <6>[ 0.115350] Detected VIPT I-cache on CPU5
5913 16:34:56.554088 <4>[ 0.115393] cacheinfo: Unable to detect cache hierarchy for CPU 5
5914 16:34:56.563931 <6>[ 0.115398] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5915 16:34:56.570843 <6>[ 0.115405] arch_timer: Enabling local workaround for ARM erratum 858921
5916 16:34:56.573986 <6>[ 0.115411] arch_timer: CPU5: Trapping CNTVCT access
5917 16:34:56.580800 <6>[ 0.115416] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5918 16:34:56.587562 <6>[ 0.115850] Detected VIPT I-cache on CPU6
5919 16:34:56.590634 <4>[ 0.115895] cacheinfo: Unable to detect cache hierarchy for CPU 6
5920 16:34:56.601110 <6>[ 0.115901] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5921 16:34:56.607079 <6>[ 0.115909] arch_timer: Enabling local workaround for ARM erratum 858921
5922 16:34:56.610749 <6>[ 0.115915] arch_timer: CPU6: Trapping CNTVCT access
5923 16:34:56.617266 <6>[ 0.115920] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5924 16:34:56.623639 <6>[ 0.116450] Detected VIPT I-cache on CPU7
5925 16:34:56.630454 <4>[ 0.116492] cacheinfo: Unable to detect cache hierarchy for CPU 7
5926 16:34:56.637058 <6>[ 0.116499] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5927 16:34:56.643717 <6>[ 0.116506] arch_timer: Enabling local workaround for ARM erratum 858921
5928 16:34:56.647463 <6>[ 0.116512] arch_timer: CPU7: Trapping CNTVCT access
5929 16:34:56.653769 <6>[ 0.116518] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5930 16:34:56.660445 <6>[ 0.116565] smp: Brought up 1 node, 8 CPUs
5931 16:34:56.663651 <6>[ 0.355465] SMP: Total of 8 processors activated.
5932 16:34:56.670493 <6>[ 0.360399] CPU features: detected: 32-bit EL0 Support
5933 16:34:56.673605 <6>[ 0.365778] CPU features: detected: 32-bit EL1 Support
5934 16:34:56.680414 <6>[ 0.371146] CPU features: detected: CRC32 instructions
5935 16:34:56.684055 <6>[ 0.376570] CPU: All CPU(s) started at EL2
5936 16:34:56.690151 <6>[ 0.380909] alternatives: applying system-wide alternatives
5937 16:34:56.697607 <6>[ 0.388899] devtmpfs: initialized
5938 16:34:56.709872 <6>[ 0.397852] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5939 16:34:56.720178 <6>[ 0.407802] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5940 16:34:56.723394 <6>[ 0.415530] pinctrl core: initialized pinctrl subsystem
5941 16:34:56.731333 <6>[ 0.422638] DMI not present or invalid.
5942 16:34:56.738406 <6>[ 0.427010] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5943 16:34:56.744713 <6>[ 0.433914] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5944 16:34:56.754753 <6>[ 0.441445] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5945 16:34:56.761457 <6>[ 0.449696] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5946 16:34:56.768216 <6>[ 0.457874] audit: initializing netlink subsys (disabled)
5947 16:34:56.774890 <5>[ 0.463578] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
5948 16:34:56.781662 <6>[ 0.464559] thermal_sys: Registered thermal governor 'step_wise'
5949 16:34:56.788351 <6>[ 0.471546] thermal_sys: Registered thermal governor 'power_allocator'
5950 16:34:56.791393 <6>[ 0.477843] cpuidle: using governor menu
5951 16:34:56.798126 <6>[ 0.488805] NET: Registered PF_QIPCRTR protocol family
5952 16:34:56.804783 <6>[ 0.494301] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5953 16:34:56.811124 <6>[ 0.501397] ASID allocator initialised with 32768 entries
5954 16:34:56.817668 <6>[ 0.508168] Serial: AMBA PL011 UART driver
5955 16:34:56.827323 <4>[ 0.518562] Trying to register duplicate clock ID: 113
5956 16:34:56.886794 <6>[ 0.574966] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5957 16:34:56.901548 <6>[ 0.589310] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5958 16:34:56.904614 <6>[ 0.599064] KASLR enabled
5959 16:34:56.918989 <6>[ 0.607068] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5960 16:34:56.925810 <6>[ 0.614071] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5961 16:34:56.932400 <6>[ 0.620548] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5962 16:34:56.939059 <6>[ 0.627539] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5963 16:34:56.946052 <6>[ 0.634012] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5964 16:34:56.952271 <6>[ 0.641002] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5965 16:34:56.958976 <6>[ 0.647476] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5966 16:34:56.965757 <6>[ 0.654466] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5967 16:34:56.968815 <6>[ 0.662036] ACPI: Interpreter disabled.
5968 16:34:56.978878 <6>[ 0.670023] iommu: Default domain type: Translated
5969 16:34:56.985152 <6>[ 0.675129] iommu: DMA domain TLB invalidation policy: strict mode
5970 16:34:56.988968 <5>[ 0.681761] SCSI subsystem initialized
5971 16:34:56.995397 <6>[ 0.686176] usbcore: registered new interface driver usbfs
5972 16:34:57.001855 <6>[ 0.691902] usbcore: registered new interface driver hub
5973 16:34:57.004983 <6>[ 0.697444] usbcore: registered new device driver usb
5974 16:34:57.012430 <6>[ 0.703743] pps_core: LinuxPPS API ver. 1 registered
5975 16:34:57.022593 <6>[ 0.708929] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5976 16:34:57.025622 <6>[ 0.718253] PTP clock support registered
5977 16:34:57.029275 <6>[ 0.722507] EDAC MC: Ver: 3.0.0
5978 16:34:57.037023 <6>[ 0.728136] FPGA manager framework
5979 16:34:57.043426 <6>[ 0.731821] Advanced Linux Sound Architecture Driver Initialized.
5980 16:34:57.046533 <6>[ 0.738578] vgaarb: loaded
5981 16:34:57.053560 <6>[ 0.741707] clocksource: Switched to clocksource arch_sys_counter
5982 16:34:57.056795 <5>[ 0.748135] VFS: Disk quotas dquot_6.6.0
5983 16:34:57.063166 <6>[ 0.752310] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5984 16:34:57.066333 <6>[ 0.759483] pnp: PnP ACPI: disabled
5985 16:34:57.075008 <6>[ 0.766347] NET: Registered PF_INET protocol family
5986 16:34:57.081796 <6>[ 0.771570] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5987 16:34:57.093725 <6>[ 0.781466] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5988 16:34:57.100412 <6>[ 0.790218] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5989 16:34:57.110318 <6>[ 0.798169] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5990 16:34:57.116966 <6>[ 0.806403] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5991 16:34:57.123859 <6>[ 0.814497] TCP: Hash tables configured (established 32768 bind 32768)
5992 16:34:57.133257 <6>[ 0.821324] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5993 16:34:57.140473 <6>[ 0.828296] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5994 16:34:57.146634 <6>[ 0.835773] NET: Registered PF_UNIX/PF_LOCAL protocol family
5995 16:34:57.153215 <6>[ 0.841894] RPC: Registered named UNIX socket transport module.
5996 16:34:57.156805 <6>[ 0.848038] RPC: Registered udp transport module.
5997 16:34:57.159994 <6>[ 0.852962] RPC: Registered tcp transport module.
5998 16:34:57.166768 <6>[ 0.857885] RPC: Registered tcp NFSv4.1 backchannel transport module.
5999 16:34:57.173168 <6>[ 0.864537] PCI: CLS 0 bytes, default 64
6000 16:34:57.176884 <6>[ 0.868819] Unpacking initramfs...
6001 16:34:57.190360 <6>[ 0.878268] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6002 16:34:57.200164 <6>[ 0.886890] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6003 16:34:57.203259 <6>[ 0.895740] kvm [1]: IPA Size Limit: 40 bits
6004 16:34:57.210587 <6>[ 0.902072] kvm [1]: vgic-v2@c420000
6005 16:34:57.214143 <6>[ 0.905887] kvm [1]: GIC system register CPU interface enabled
6006 16:34:57.220753 <6>[ 0.912060] kvm [1]: vgic interrupt IRQ18
6007 16:34:57.224477 <6>[ 0.916423] kvm [1]: Hyp mode initialized successfully
6008 16:34:57.231336 <5>[ 0.922696] Initialise system trusted keyrings
6009 16:34:57.237939 <6>[ 0.927528] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6010 16:34:57.246317 <6>[ 0.937456] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6011 16:34:57.253118 <5>[ 0.943909] NFS: Registering the id_resolver key type
6012 16:34:57.256564 <5>[ 0.949228] Key type id_resolver registered
6013 16:34:57.263025 <5>[ 0.953641] Key type id_legacy registered
6014 16:34:57.269817 <6>[ 0.957958] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6015 16:34:57.276552 <6>[ 0.964881] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6016 16:34:57.282920 <6>[ 0.972674] 9p: Installing v9fs 9p2000 file system support
6017 16:34:57.310711 <5>[ 1.001591] Key type asymmetric registered
6018 16:34:57.313856 <5>[ 1.005936] Asymmetric key parser 'x509' registered
6019 16:34:57.323513 <6>[ 1.011100] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6020 16:34:57.327356 <6>[ 1.018714] io scheduler mq-deadline registered
6021 16:34:57.330478 <6>[ 1.023469] io scheduler kyber registered
6022 16:34:57.353040 <6>[ 1.044280] EINJ: ACPI disabled.
6023 16:34:57.359477 <4>[ 1.048041] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6024 16:34:57.397623 <6>[ 1.088891] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6025 16:34:57.406240 <6>[ 1.097405] printk: console [ttyS0] disabled
6026 16:34:57.434402 <6>[ 1.122058] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6027 16:34:57.440741 <6>[ 1.131540] printk: console [ttyS0] enabled
6028 16:34:57.444453 <6>[ 1.131540] printk: console [ttyS0] enabled
6029 16:34:57.451119 <6>[ 1.140457] printk: bootconsole [mtk8250] disabled
6030 16:34:57.454242 <6>[ 1.140457] printk: bootconsole [mtk8250] disabled
6031 16:34:57.464365 <3>[ 1.150997] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6032 16:34:57.470876 <3>[ 1.159383] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6033 16:34:57.499673 <6>[ 1.187794] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6034 16:34:57.506350 <6>[ 1.197452] serial serial0: tty port ttyS1 registered
6035 16:34:57.513155 <6>[ 1.204025] SuperH (H)SCI(F) driver initialized
6036 16:34:57.516429 <6>[ 1.209541] msm_serial: driver initialized
6037 16:34:57.532448 <6>[ 1.219906] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6038 16:34:57.542094 <6>[ 1.228506] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6039 16:34:57.548855 <6>[ 1.237080] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6040 16:34:57.558639 <6>[ 1.245652] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6041 16:34:57.565074 <6>[ 1.254308] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6042 16:34:57.575335 <6>[ 1.262967] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6043 16:34:57.585332 <6>[ 1.271705] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6044 16:34:57.592052 <6>[ 1.280441] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6045 16:34:57.602209 <6>[ 1.289006] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6046 16:34:57.611803 <6>[ 1.297812] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6047 16:34:57.619009 <4>[ 1.310208] cacheinfo: Unable to detect cache hierarchy for CPU 0
6048 16:34:57.625138 <6>[ 1.319612] loop: module loaded
6049 16:34:57.640290 <6>[ 1.331563] vsim1: Bringing 1800000uV into 2700000-2700000uV
6050 16:34:57.658383 <6>[ 1.349726] megasas: 07.719.03.00-rc1
6051 16:34:57.667750 <6>[ 1.358639] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6052 16:34:57.681980 <6>[ 1.373105] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6053 16:34:57.699034 <6>[ 1.389753] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6054 16:34:57.755375 <6>[ 1.440020] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6055 16:34:57.788142 <6>[ 1.479321] Freeing initrd memory: 18300K
6056 16:34:57.803075 <4>[ 1.491170] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6057 16:34:57.809952 <4>[ 1.500399] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6058 16:34:57.816568 <4>[ 1.507097] Hardware name: Google juniper sku16 board (DT)
6059 16:34:57.820047 <4>[ 1.512836] Call trace:
6060 16:34:57.823242 <4>[ 1.515537] dump_backtrace.part.0+0xe0/0xf0
6061 16:34:57.826709 <4>[ 1.520073] show_stack+0x18/0x30
6062 16:34:57.830173 <4>[ 1.523645] dump_stack_lvl+0x68/0x84
6063 16:34:57.833579 <4>[ 1.527566] dump_stack+0x18/0x34
6064 16:34:57.839773 <4>[ 1.531136] sysfs_warn_dup+0x64/0x80
6065 16:34:57.843092 <4>[ 1.535058] sysfs_do_create_link_sd+0xf0/0x100
6066 16:34:57.846921 <4>[ 1.539845] sysfs_create_link+0x20/0x40
6067 16:34:57.853110 <4>[ 1.544025] bus_add_device+0x68/0x10c
6068 16:34:57.856848 <4>[ 1.548030] device_add+0x340/0x7ac
6069 16:34:57.860122 <4>[ 1.551774] of_device_add+0x44/0x60
6070 16:34:57.863203 <4>[ 1.555608] of_platform_device_create_pdata+0x90/0x120
6071 16:34:57.870081 <4>[ 1.561089] of_platform_bus_create+0x170/0x370
6072 16:34:57.873262 <4>[ 1.565876] of_platform_populate+0x50/0xfc
6073 16:34:57.880227 <4>[ 1.570315] parse_mtd_partitions+0x1dc/0x510
6074 16:34:57.883346 <4>[ 1.574928] mtd_device_parse_register+0xf8/0x2e0
6075 16:34:57.887143 <4>[ 1.579887] spi_nor_probe+0x21c/0x2f0
6076 16:34:57.890321 <4>[ 1.583893] spi_mem_probe+0x6c/0xb0
6077 16:34:57.893318 <4>[ 1.587726] spi_probe+0x84/0xe4
6078 16:34:57.900089 <4>[ 1.591208] really_probe+0xbc/0x2e0
6079 16:34:57.903307 <4>[ 1.595038] __driver_probe_device+0x78/0x11c
6080 16:34:57.906453 <4>[ 1.599650] driver_probe_device+0xd8/0x160
6081 16:34:57.913133 <4>[ 1.604088] __device_attach_driver+0xb8/0x134
6082 16:34:57.917027 <4>[ 1.608787] bus_for_each_drv+0x78/0xd0
6083 16:34:57.920207 <4>[ 1.612877] __device_attach+0xa8/0x1c0
6084 16:34:57.926558 <4>[ 1.616968] device_initial_probe+0x14/0x20
6085 16:34:57.930261 <4>[ 1.621406] bus_probe_device+0x9c/0xa4
6086 16:34:57.933819 <4>[ 1.625496] device_add+0x3ac/0x7ac
6087 16:34:57.936658 <4>[ 1.629238] __spi_add_device+0x78/0x120
6088 16:34:57.939981 <4>[ 1.633417] spi_add_device+0x40/0x7c
6089 16:34:57.946869 <4>[ 1.637334] spi_register_controller+0x610/0xad0
6090 16:34:57.949853 <4>[ 1.642207] devm_spi_register_controller+0x4c/0xa4
6091 16:34:57.956783 <4>[ 1.647340] mtk_spi_probe+0x3f8/0x650
6092 16:34:57.960315 <4>[ 1.651344] platform_probe+0x68/0xe0
6093 16:34:57.963564 <4>[ 1.655262] really_probe+0xbc/0x2e0
6094 16:34:57.966727 <4>[ 1.659092] __driver_probe_device+0x78/0x11c
6095 16:34:57.973810 <4>[ 1.663703] driver_probe_device+0xd8/0x160
6096 16:34:57.976722 <4>[ 1.668141] __driver_attach+0x94/0x19c
6097 16:34:57.979983 <4>[ 1.672232] bus_for_each_dev+0x70/0xd0
6098 16:34:57.983712 <4>[ 1.676322] driver_attach+0x24/0x30
6099 16:34:57.986615 <4>[ 1.680151] bus_add_driver+0x154/0x20c
6100 16:34:57.993656 <4>[ 1.684242] driver_register+0x78/0x130
6101 16:34:57.996737 <4>[ 1.688333] __platform_driver_register+0x28/0x34
6102 16:34:57.999756 <4>[ 1.693292] mtk_spi_driver_init+0x1c/0x28
6103 16:34:58.006890 <4>[ 1.697646] do_one_initcall+0x50/0x1d0
6104 16:34:58.010037 <4>[ 1.701736] kernel_init_freeable+0x21c/0x288
6105 16:34:58.013160 <4>[ 1.706350] kernel_init+0x24/0x12c
6106 16:34:58.016708 <4>[ 1.710095] ret_from_fork+0x10/0x20
6107 16:34:58.028285 <6>[ 1.718997] tun: Universal TUN/TAP device driver, 1.6
6108 16:34:58.031376 <6>[ 1.725279] thunder_xcv, ver 1.0
6109 16:34:58.034310 <6>[ 1.728793] thunder_bgx, ver 1.0
6110 16:34:58.038206 <6>[ 1.732300] nicpf, ver 1.0
6111 16:34:58.048985 <6>[ 1.736673] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6112 16:34:58.051898 <6>[ 1.744158] hns3: Copyright (c) 2017 Huawei Corporation.
6113 16:34:58.058696 <6>[ 1.749756] hclge is initializing
6114 16:34:58.062182 <6>[ 1.753338] e1000: Intel(R) PRO/1000 Network Driver
6115 16:34:58.068639 <6>[ 1.758473] e1000: Copyright (c) 1999-2006 Intel Corporation.
6116 16:34:58.072064 <6>[ 1.764494] e1000e: Intel(R) PRO/1000 Network Driver
6117 16:34:58.078816 <6>[ 1.769714] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6118 16:34:58.085723 <6>[ 1.775909] igb: Intel(R) Gigabit Ethernet Network Driver
6119 16:34:58.092199 <6>[ 1.781564] igb: Copyright (c) 2007-2014 Intel Corporation.
6120 16:34:58.099220 <6>[ 1.787407] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6121 16:34:58.105270 <6>[ 1.793930] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6122 16:34:58.109096 <6>[ 1.800481] sky2: driver version 1.30
6123 16:34:58.115769 <6>[ 1.805741] usbcore: registered new device driver r8152-cfgselector
6124 16:34:58.122257 <6>[ 1.812282] usbcore: registered new interface driver r8152
6125 16:34:58.128646 <6>[ 1.818110] VFIO - User Level meta-driver version: 0.3
6126 16:34:58.135362 <6>[ 1.825928] mtu3 11201000.usb: uwk - reg:0x420, version:101
6127 16:34:58.142453 <4>[ 1.831799] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6128 16:34:58.148831 <6>[ 1.839073] mtu3 11201000.usb: dr_mode: 1, drd: auto
6129 16:34:58.155686 <6>[ 1.844299] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6130 16:34:58.158783 <6>[ 1.850484] mtu3 11201000.usb: usb3-drd: 0
6131 16:34:58.165411 <6>[ 1.856049] mtu3 11201000.usb: xHCI platform device register success...
6132 16:34:58.177043 <4>[ 1.864730] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6133 16:34:58.180510 <6>[ 1.872670] xhci-mtk 11200000.usb: xHCI Host Controller
6134 16:34:58.190805 <6>[ 1.878184] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6135 16:34:58.196850 <6>[ 1.885905] xhci-mtk 11200000.usb: USB3 root hub has no ports
6136 16:34:58.203824 <6>[ 1.891913] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6137 16:34:58.210187 <6>[ 1.901337] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6138 16:34:58.216846 <6>[ 1.907411] xhci-mtk 11200000.usb: xHCI Host Controller
6139 16:34:58.223739 <6>[ 1.912900] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6140 16:34:58.230405 <6>[ 1.920557] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6141 16:34:58.233631 <6>[ 1.927377] hub 1-0:1.0: USB hub found
6142 16:34:58.240680 <6>[ 1.931408] hub 1-0:1.0: 1 port detected
6143 16:34:58.250497 <6>[ 1.936757] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6144 16:34:58.253816 <6>[ 1.945372] hub 2-0:1.0: USB hub found
6145 16:34:58.260209 <3>[ 1.949400] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6146 16:34:58.267324 <6>[ 1.957278] usbcore: registered new interface driver usb-storage
6147 16:34:58.273901 <6>[ 1.963893] usbcore: registered new device driver onboard-usb-hub
6148 16:34:58.290170 <4>[ 1.977804] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6149 16:34:58.299012 <6>[ 1.990082] mt6397-rtc mt6358-rtc: registered as rtc0
6150 16:34:58.309164 <6>[ 1.995560] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-17T16:34:00 UTC (1718642040)
6151 16:34:58.312357 <6>[ 2.005451] i2c_dev: i2c /dev entries driver
6152 16:34:58.324378 <6>[ 2.011859] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6153 16:34:58.334734 <6>[ 2.020178] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6154 16:34:58.337821 <6>[ 2.029081] i2c 4-0058: Fixed dependency cycle(s) with /panel
6155 16:34:58.347504 <6>[ 2.035113] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6156 16:34:58.354528 <3>[ 2.042588] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6157 16:34:58.372027 <6>[ 2.062457] cpu cpu0: EM: created perf domain
6158 16:34:58.384705 <6>[ 2.067982] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6159 16:34:58.388457 <6>[ 2.079268] cpu cpu4: EM: created perf domain
6160 16:34:58.395458 <6>[ 2.086380] sdhci: Secure Digital Host Controller Interface driver
6161 16:34:58.402282 <6>[ 2.092835] sdhci: Copyright(c) Pierre Ossman
6162 16:34:58.408513 <6>[ 2.098254] Synopsys Designware Multimedia Card Interface Driver
6163 16:34:58.415686 <6>[ 2.098792] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6164 16:34:58.418494 <6>[ 2.105326] sdhci-pltfm: SDHCI platform and OF driver helper
6165 16:34:58.427194 <6>[ 2.118162] ledtrig-cpu: registered to indicate activity on CPUs
6166 16:34:58.434861 <6>[ 2.125917] usbcore: registered new interface driver usbhid
6167 16:34:58.438618 <6>[ 2.131753] usbhid: USB HID core driver
6168 16:34:58.449135 <6>[ 2.136039] spi_master spi2: will run message pump with realtime priority
6169 16:34:58.452888 <4>[ 2.136301] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6170 16:34:58.463599 <4>[ 2.150379] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6171 16:34:58.473071 <6>[ 2.155787] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6172 16:34:58.492762 <6>[ 2.173575] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6173 16:34:58.499660 <4>[ 2.184442] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6174 16:34:58.502624 <6>[ 2.188687] cros-ec-spi spi2.0: Chrome EC device registered
6175 16:34:58.515318 <4>[ 2.202900] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6176 16:34:58.527349 <4>[ 2.214955] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6177 16:34:58.534171 <4>[ 2.223894] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6178 16:34:58.540467 <6>[ 2.225080] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6179 16:34:58.547151 <6>[ 2.237085] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6180 16:34:58.554062 <6>[ 2.238460] mmc0: new HS400 MMC card at address 0001
6181 16:34:58.557293 <6>[ 2.250020] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6182 16:34:58.568460 <6>[ 2.259240] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6183 16:34:58.581075 <6>[ 2.268356] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6184 16:34:58.587337 <6>[ 2.268541] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6185 16:34:58.597365 <6>[ 2.281225] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6186 16:34:58.603724 <6>[ 2.283715] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6187 16:34:58.607581 <6>[ 2.294770] NET: Registered PF_PACKET protocol family
6188 16:34:58.621098 <6>[ 2.297789] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6189 16:34:58.630606 <6>[ 2.298090] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6190 16:34:58.637372 <6>[ 2.299266] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6191 16:34:58.640798 <6>[ 2.303912] 9pnet: Installing 9P2000 support
6192 16:34:58.644297 <5>[ 2.336830] Key type dns_resolver registered
6193 16:34:58.651197 <6>[ 2.342039] registered taskstats version 1
6194 16:34:58.654296 <5>[ 2.346407] Loading compiled-in X.509 certificates
6195 16:34:58.670068 <6>[ 2.357796] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6196 16:34:58.712853 <3>[ 2.400700] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6197 16:34:58.745439 <6>[ 2.430159] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6198 16:34:58.757041 <6>[ 2.444468] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6199 16:34:58.766432 <6>[ 2.453046] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6200 16:34:58.773121 <6>[ 2.461775] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6201 16:34:58.783093 <6>[ 2.470393] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6202 16:34:58.790091 <6>[ 2.478949] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6203 16:34:58.799593 <6>[ 2.487549] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6204 16:34:58.809886 <6>[ 2.496156] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6205 16:34:58.816417 <6>[ 2.505343] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6206 16:34:58.823225 <6>[ 2.512661] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6207 16:34:58.829299 <6>[ 2.519776] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6208 16:34:58.836399 <6>[ 2.526946] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6209 16:34:58.843228 <6>[ 2.534270] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6210 16:34:58.851107 <6>[ 2.542068] hub 1-1:1.0: USB hub found
6211 16:34:58.854358 <6>[ 2.546471] hub 1-1:1.0: 3 ports detected
6212 16:34:58.861325 <6>[ 2.550984] panfrost 13040000.gpu: clock rate = 511999970
6213 16:34:58.871192 <6>[ 2.556658] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6214 16:34:58.877771 <6>[ 2.566718] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6215 16:34:58.887660 <6>[ 2.574732] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6216 16:34:58.900599 <6>[ 2.583166] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6217 16:34:58.907030 <6>[ 2.595243] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6218 16:34:58.919278 <6>[ 2.607202] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6219 16:34:58.929319 <6>[ 2.616135] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6220 16:34:58.939088 <6>[ 2.625284] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6221 16:34:58.945724 <6>[ 2.634412] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6222 16:34:58.956014 <6>[ 2.643539] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6223 16:34:58.965909 <6>[ 2.652838] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6224 16:34:58.975889 <6>[ 2.662137] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6225 16:34:58.985471 <6>[ 2.671611] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6226 16:34:58.995886 <6>[ 2.681084] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6227 16:34:59.002128 <6>[ 2.690212] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6228 16:34:59.075362 <6>[ 2.762941] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6229 16:34:59.085171 <6>[ 2.771833] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6230 16:34:59.095490 <6>[ 2.783615] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6231 16:34:59.165908 <6>[ 2.853737] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6232 16:34:59.793024 <6>[ 3.046020] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6233 16:34:59.802921 <4>[ 3.163025] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6234 16:34:59.809905 <4>[ 3.163043] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6235 16:34:59.815879 <6>[ 3.199221] r8152 1-1.2:1.0 eth0: v1.12.13
6236 16:34:59.822959 <6>[ 3.277736] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6237 16:34:59.829783 <6>[ 3.463955] Console: switching to colour frame buffer device 170x48
6238 16:34:59.835895 <6>[ 3.524603] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6239 16:34:59.857829 <6>[ 3.541869] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6240 16:34:59.875319 <6>[ 3.559197] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6241 16:34:59.882133 <6>[ 3.571763] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6242 16:34:59.892639 <6>[ 3.580200] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6243 16:34:59.902616 <6>[ 3.587751] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6244 16:34:59.922873 <6>[ 3.606846] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6245 16:35:01.087529 <6>[ 4.778626] r8152 1-1.2:1.0 eth0: carrier on
6246 16:35:03.402679 <5>[ 4.801724] Sending DHCP requests .., OK
6247 16:35:03.409416 <6>[ 7.098105] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6248 16:35:03.412645 <6>[ 7.106572] IP-Config: Complete:
6249 16:35:03.426077 <6>[ 7.110148] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6250 16:35:03.435924 <6>[ 7.121113] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6251 16:35:03.447592 <6>[ 7.135413] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6252 16:35:03.455978 <6>[ 7.135423] nameserver0=192.168.201.1
6253 16:35:03.464269 <6>[ 7.155281] clk: Disabling unused clocks
6254 16:35:03.469218 <6>[ 7.163239] ALSA device list:
6255 16:35:03.478479 <6>[ 7.169280] No soundcards found.
6256 16:35:03.487534 <6>[ 7.178268] Freeing unused kernel memory: 8512K
6257 16:35:03.494130 <6>[ 7.185324] Run /init as init process
6258 16:35:03.507208 Loading, please wait...
6259 16:35:03.542388 Starting systemd-udevd version 252.22-1~deb12u1
6260 16:35:03.844265 <6>[ 7.532147] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6261 16:35:03.853820 <3>[ 7.544823] thermal_sys: Failed to find 'trips' node
6262 16:35:03.864425 <3>[ 7.552020] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6263 16:35:03.867586 <3>[ 7.556995] mtk-scp 10500000.scp: invalid resource
6264 16:35:03.877976 <3>[ 7.559381] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6265 16:35:03.887727 <3>[ 7.564894] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6266 16:35:03.894320 <6>[ 7.566740] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6267 16:35:03.900847 <4>[ 7.572869] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6268 16:35:03.907369 <3>[ 7.582852] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6269 16:35:03.920994 <3>[ 7.582859] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6270 16:35:03.927649 <3>[ 7.582864] elan_i2c 2-0015: Error applying setting, reverse things back
6271 16:35:03.930477 <6>[ 7.593155] remoteproc remoteproc0: scp is available
6272 16:35:03.937229 <3>[ 7.596107] thermal_sys: Failed to find 'trips' node
6273 16:35:03.943938 <3>[ 7.596116] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6274 16:35:03.954113 <3>[ 7.596125] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6275 16:35:03.960687 <4>[ 7.596130] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6276 16:35:03.970648 <4>[ 7.600031] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6277 16:35:03.980523 <4>[ 7.604939] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6278 16:35:03.993776 <6>[ 7.616845] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6279 16:35:04.000359 <4>[ 7.617829] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6280 16:35:04.004149 <6>[ 7.622738] remoteproc remoteproc0: powering up scp
6281 16:35:04.014938 <4>[ 7.622772] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6282 16:35:04.021670 <4>[ 7.623290] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6283 16:35:04.035948 <6>[ 7.633884] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6284 16:35:04.042690 <3>[ 7.633916] remoteproc remoteproc0: request_firmware failed: -2
6285 16:35:04.053235 <3>[ 7.634203] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6286 16:35:04.063928 <3>[ 7.634224] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6287 16:35:04.074397 <3>[ 7.634233] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6288 16:35:04.081237 <6>[ 7.643713] mc: Linux media interface: v0.10
6289 16:35:04.094518 <3>[ 7.643971] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6290 16:35:04.105320 <3>[ 7.660273] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6291 16:35:04.115359 <6>[ 7.681138] cs_system_cfg: CoreSight Configuration manager initialised
6292 16:35:04.125800 <3>[ 7.688508] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6293 16:35:04.129440 <6>[ 7.701446] videodev: Linux video capture interface: v2.00
6294 16:35:04.139274 <3>[ 7.703028] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6295 16:35:04.145644 <6>[ 7.703062] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6296 16:35:04.155351 <6>[ 7.810035] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6297 16:35:04.165767 <3>[ 7.811691] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6298 16:35:04.172417 <6>[ 7.826362] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6299 16:35:04.182367 <3>[ 7.827177] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6300 16:35:04.188697 <6>[ 7.835361] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6301 16:35:04.198494 <3>[ 7.842958] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6302 16:35:04.205526 <5>[ 7.848658] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6303 16:35:04.214937 <6>[ 7.852323] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6304 16:35:04.222324 <5>[ 7.869200] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6305 16:35:04.228658 <6>[ 7.869614] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6306 16:35:04.231754 <6>[ 7.870751] Bluetooth: Core ver 2.22
6307 16:35:04.238563 <6>[ 7.870807] NET: Registered PF_BLUETOOTH protocol family
6308 16:35:04.245062 <6>[ 7.870810] Bluetooth: HCI device and connection manager initialized
6309 16:35:04.251733 <6>[ 7.870824] Bluetooth: HCI socket layer initialized
6310 16:35:04.258500 <6>[ 7.870828] Bluetooth: L2CAP socket layer initialized
6311 16:35:04.261433 <6>[ 7.870835] Bluetooth: SCO socket layer initialized
6312 16:35:04.272287 <5>[ 7.878785] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6313 16:35:04.282122 <6>[ 7.885982] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6314 16:35:04.291964 <3>[ 7.886383] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6315 16:35:04.302440 <6>[ 7.886776] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6316 16:35:04.308673 <6>[ 7.886842] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6317 16:35:04.315298 <3>[ 7.887359] debugfs: File 'Playback' in directory 'dapm' already present!
6318 16:35:04.322277 <3>[ 7.887371] debugfs: File 'Capture' in directory 'dapm' already present!
6319 16:35:04.332242 <6>[ 7.887617] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6320 16:35:04.338816 <6>[ 7.887921] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6321 16:35:04.345815 <6>[ 7.888278] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6322 16:35:04.356083 <6>[ 7.888885] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6323 16:35:04.365856 <4>[ 7.894535] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6324 16:35:04.375604 <6>[ 7.907433] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6325 16:35:04.386171 <6>[ 7.910306] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6326 16:35:04.393010 <6>[ 7.910330] cfg80211: failed to load regulatory.db
6327 16:35:04.399149 <6>[ 7.910462] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6328 16:35:04.405842 <6>[ 7.917390] Bluetooth: HCI UART driver ver 2.3
6329 16:35:04.412659 <6>[ 7.917608] usbcore: registered new interface driver uvcvideo
6330 16:35:04.419386 <6>[ 7.925260] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6331 16:35:04.426700 <6>[ 7.928920] Bluetooth: HCI UART protocol H4 registered
6332 16:35:04.433130 <6>[ 7.928963] Bluetooth: HCI UART protocol LL registered
6333 16:35:04.443391 <6>[ 8.006595] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6334 16:35:04.450110 <6>[ 8.011289] Bluetooth: HCI UART protocol Three-wire (H5) registered
6335 16:35:04.459814 <6>[ 8.018259] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6336 16:35:04.467085 <6>[ 8.027239] Bluetooth: HCI UART protocol Broadcom registered
6337 16:35:04.477503 <6>[ 8.033835] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6338 16:35:04.480964 <6>[ 8.041038] Bluetooth: HCI UART protocol QCA registered
6339 16:35:04.488700 <6>[ 8.042000] Bluetooth: hci0: setting up ROME/QCA6390
6340 16:35:04.498493 <4>[ 8.155033] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6341 16:35:04.501613 <4>[ 8.155033] Fallback method does not support PEC.
6342 16:35:04.511368 Begin: Loading e<6>[ 8.155845] Bluetooth: HCI UART protocol Marvell registered
6343 16:35:04.521302 ssential drivers<3>[ 8.164078] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6344 16:35:04.521394 ... done.
6345 16:35:04.528721 Begin: Running /scri<6>[ 8.217433] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6346 16:35:04.538549 pts/init-premoun<3>[ 8.224361] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6347 16:35:04.542036 t ... done.
6348 16:35:04.548805 Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
6349 16:35:04.555203 Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
6350 16:35:04.558307 Device /sys/class/net/eth0 found
6351 16:35:04.561721 done.
6352 16:35:04.564756 <3>[ 8.256605] Bluetooth: hci0: Frame reassembly failed (-84)
6353 16:35:04.623714 Begin: Waiting up to 180 secs for any network device to become available ... done.
6354 16:35:04.682774 IP-Config: eth0 hardware address 00:e0:4c:68:0b:b9 mtu 1500 DHCP
6355 16:35:04.689634 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6356 16:35:04.696291 address: 192.168.201.13 broadcast: 192.168.201.255 netmask: 255.255.255.0
6357 16:35:04.702926 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6358 16:35:04.709559 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-0
6359 16:35:04.715809 domain : lava-rack
6360 16:35:04.718899 rootserver: 192.168.201.1 rootpath:
6361 16:35:04.719003 filename :
6362 16:35:04.831631 <6>[ 8.522681] Bluetooth: hci0: QCA Product ID :0x00000008
6363 16:35:04.842060 <6>[ 8.533250] Bluetooth: hci0: QCA SOC Version :0x00000044
6364 16:35:04.852547 <6>[ 8.543630] Bluetooth: hci0: QCA ROM Version :0x00000302
6365 16:35:04.862742 <6>[ 8.553969] Bluetooth: hci0: QCA Patch Version:0x00000111
6366 16:35:04.873191 <6>[ 8.564248] Bluetooth: hci0: QCA controller version 0x00440302
6367 16:35:04.886807 <6>[ 8.574255] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6368 16:35:04.886938 done.
6369 16:35:04.896992 <4>[ 8.584292] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6370 16:35:04.903613 Begin: Running /scripts/nfs-bottom ... done.
6371 16:35:04.909870 Be<3>[ 8.596631] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6372 16:35:04.919608 gin: Running /scripts/init-bottom ... <3>[ 8.609480] Bluetooth: hci0: QCA Failed to download patch (-2)
6373 16:35:04.919702 done.
6374 16:35:04.944284 <6>[ 8.631591] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6375 16:35:05.043217 <4>[ 8.730842] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6376 16:35:05.062162 <4>[ 8.749948] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6377 16:35:05.075359 <4>[ 8.763048] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6378 16:35:05.085416 <4>[ 8.776345] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6379 16:35:06.263835 <6>[ 9.954694] NET: Registered PF_INET6 protocol family
6380 16:35:06.275601 <6>[ 9.966855] Segment Routing with IPv6
6381 16:35:06.284190 <6>[ 9.975291] In-situ OAM (IOAM) with IPv6
6382 16:35:06.458391 <30>[ 10.122941] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6383 16:35:06.479184 <30>[ 10.169953] systemd[1]: Detected architecture arm64.
6384 16:35:06.490909
6385 16:35:06.493924 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6386 16:35:06.494039
6387 16:35:06.520169 <30>[ 10.211163] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6388 16:35:07.577193 <30>[ 11.264624] systemd[1]: Queued start job for default target graphical.target.
6389 16:35:07.615598 <30>[ 11.303267] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6390 16:35:07.628669 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6391 16:35:07.648535 <30>[ 11.335976] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6392 16:35:07.661690 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6393 16:35:07.680765 <30>[ 11.368097] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6394 16:35:07.694982 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6395 16:35:07.712108 <30>[ 11.399288] systemd[1]: Created slice user.slice - User and Session Slice.
6396 16:35:07.723398 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6397 16:35:07.745954 <30>[ 11.430300] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6398 16:35:07.758813 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6399 16:35:07.781749 <30>[ 11.466133] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6400 16:35:07.794108 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6401 16:35:07.820769 <30>[ 11.498080] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6402 16:35:07.839664 <30>[ 11.527190] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6403 16:35:07.847418 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6404 16:35:07.866143 <30>[ 11.553899] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6405 16:35:07.878945 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6406 16:35:07.898623 <30>[ 11.585949] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6407 16:35:07.912254 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6408 16:35:07.926997 <30>[ 11.617992] systemd[1]: Reached target paths.target - Path Units.
6409 16:35:07.941348 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6410 16:35:07.958527 <30>[ 11.645887] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6411 16:35:07.971138 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6412 16:35:07.982875 <30>[ 11.673877] systemd[1]: Reached target slices.target - Slice Units.
6413 16:35:07.997535 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6414 16:35:08.011251 <30>[ 11.701915] systemd[1]: Reached target swap.target - Swaps.
6415 16:35:08.021776 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6416 16:35:08.042191 <30>[ 11.729958] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6417 16:35:08.055612 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6418 16:35:08.074951 <30>[ 11.762307] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6419 16:35:08.088683 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6420 16:35:08.109451 <30>[ 11.796750] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6421 16:35:08.122308 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6422 16:35:08.139813 <30>[ 11.827545] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6423 16:35:08.153855 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6424 16:35:08.171129 <30>[ 11.858631] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6425 16:35:08.183334 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6426 16:35:08.204593 <30>[ 11.891653] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6427 16:35:08.217550 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6428 16:35:08.237476 <30>[ 11.924990] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6429 16:35:08.250562 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6430 16:35:08.267133 <30>[ 11.954500] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6431 16:35:08.280447 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6432 16:35:08.330949 <30>[ 12.018377] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6433 16:35:08.343204 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6434 16:35:08.368073 <30>[ 12.055810] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6435 16:35:08.381396 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6436 16:35:08.403493 <30>[ 12.090913] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6437 16:35:08.415640 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6438 16:35:08.441917 <30>[ 12.122933] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6439 16:35:08.483081 <30>[ 12.170534] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6440 16:35:08.495650 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6441 16:35:08.521177 <30>[ 12.208750] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6442 16:35:08.532595 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6443 16:35:08.560205 <30>[ 12.247875] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6444 16:35:08.573411 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6445 16:35:08.596048 <30>[ 12.283611] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6446 16:35:08.611514 Starting [0;1;39mmodprobe@drm.service<6>[ 12.298978] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6447 16:35:08.614702 [0m - Load Kernel Module drm...
6448 16:35:08.679588 <30>[ 12.367028] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6449 16:35:08.694212 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6450 16:35:08.721047 <30>[ 12.408566] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6451 16:35:08.734963 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6452 16:35:08.758931 <30>[ 12.446687] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6453 16:35:08.767859 Startin<6>[ 12.458630] fuse: init (API version 7.37)
6454 16:35:08.774360 g [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6455 16:35:08.819445 <30>[ 12.506996] systemd[1]: Starting systemd-journald.service - Journal Service...
6456 16:35:08.832229 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6457 16:35:08.857520 <30>[ 12.544858] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6458 16:35:08.868651 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6459 16:35:08.894752 <30>[ 12.578882] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6460 16:35:08.905646 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6461 16:35:08.926520 <30>[ 12.613982] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6462 16:35:08.939768 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6463 16:35:08.961528 <30>[ 12.649107] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6464 16:35:08.971279 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6465 16:35:08.996744 <30>[ 12.683161] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6466 16:35:09.002768 <3>[ 12.685567] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6467 16:35:09.021133 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File S<3>[ 12.706994] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6468 16:35:09.021238 ystem.
6469 16:35:09.038388 <3>[ 12.725395] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6470 16:35:09.045532 <30>[ 12.734891] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6471 16:35:09.055848 <3>[ 12.740380] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6472 16:35:09.067271 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6473 16:35:09.073810 <3>[ 12.761216] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6474 16:35:09.085003 <30>[ 12.770481] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6475 16:35:09.094742 <3>[ 12.780031] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6476 16:35:09.104910 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6477 16:35:09.124189 <30>[ 12.810861] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6478 16:35:09.133601 <3>[ 12.817294] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6479 16:35:09.152725 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static D<3>[ 12.838027] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6480 16:35:09.152858 evice Nodes.
6481 16:35:09.175394 <30>[ 12.863199] systemd[1]: modprobe@configfs.service: Deactivated successfully.
6482 16:35:09.186168 <30>[ 12.873947] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
6483 16:35:09.197715 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6484 16:35:09.219171 <30>[ 12.906880] systemd[1]: Started systemd-journald.service - Journal Service.
6485 16:35:09.231188 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6486 16:35:09.255250 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6487 16:35:09.277217 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6488 16:35:09.300045 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6489 16:35:09.319441 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6490 16:35:09.340131 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6491 16:35:09.359355 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6492 16:35:09.379555 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6493 16:35:09.399320 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6494 16:35:09.418850 <4>[ 13.099132] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6495 16:35:09.429464 <3>[ 13.116891] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6496 16:35:09.436025 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6497 16:35:09.483495 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6498 16:35:09.508457 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6499 16:35:09.530587 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6500 16:35:09.550732 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6501 16:35:09.573512 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6502 16:35:09.585978 <46>[ 13.273388] systemd-journald[324]: Received client request to flush runtime journal.
6503 16:35:09.600030 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6504 16:35:09.892508 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6505 16:35:09.916289 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6506 16:35:09.935151 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6507 16:35:09.956895 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6508 16:35:10.347083 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6509 16:35:10.687585 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6510 16:35:10.751245 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6511 16:35:11.024524 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6512 16:35:11.106559 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6513 16:35:11.123276 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6514 16:35:11.142543 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6515 16:35:11.191336 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6516 16:35:11.216000 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6517 16:35:11.436344 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6518 16:35:11.455450 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6519 16:35:11.534755 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6520 16:35:11.696024 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6521 16:35:11.718286 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6522 16:35:11.741024 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6523 16:35:11.747922 <4>[ 15.437839] power_supply_show_property: 4 callbacks suppressed
6524 16:35:11.758909 <3>[ 15.437853] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6525 16:35:11.767321 <3>[ 15.455525] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6526 16:35:11.777093 <3>[ 15.458214] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6527 16:35:11.796480 <3>[ 15.483504] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6528 16:35:11.811064 <3>[ 15.498676] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6529 16:35:11.826427 <3>[ 15.513720] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6530 16:35:11.841985 <3>[ 15.528979] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6531 16:35:11.857016 <3>[ 15.544064] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6532 16:35:11.871785 <3>[ 15.558934] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6533 16:35:11.886407 <3>[ 15.573639] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6534 16:35:11.904294 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6535 16:35:11.922302 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6536 16:35:11.942675 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6537 16:35:11.959252 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6538 16:35:11.995232 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6539 16:35:12.068379 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6540 16:35:12.102846 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6541 16:35:12.122601 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6542 16:35:12.144360 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6543 16:35:12.168296 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6544 16:35:12.190689 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6545 16:35:12.205098 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6546 16:35:12.223504 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6547 16:35:12.243289 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6548 16:35:12.258309 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6549 16:35:12.280146 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6550 16:35:12.327965 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6551 16:35:12.346946 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6552 16:35:12.365623 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6553 16:35:12.385570 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6554 16:35:12.402582 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6555 16:35:12.420515 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6556 16:35:12.438620 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6557 16:35:12.454573 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6558 16:35:12.504131 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6559 16:35:12.560611 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6560 16:35:12.656433 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6561 16:35:12.684137 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6562 16:35:12.854555 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6563 16:35:12.903543 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6564 16:35:12.946051 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6565 16:35:12.979047 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6566 16:35:12.997666 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6567 16:35:13.021952 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6568 16:35:13.042106 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6569 16:35:13.067508 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6570 16:35:13.092563 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6571 16:35:13.138333 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6572 16:35:13.185793 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6573 16:35:13.273749
6574 16:35:13.277440 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6575 16:35:13.277540
6576 16:35:13.280421 debian-bookworm-arm64 login: root (automatic login)
6577 16:35:13.280512
6578 16:35:13.499123 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Mon Jun 17 16:16:56 UTC 2024 aarch64
6579 16:35:13.499263
6580 16:35:13.505812 The programs included with the Debian GNU/Linux system are free software;
6581 16:35:13.512357 the exact distribution terms for each program are described in the
6582 16:35:13.515828 individual files in /usr/share/doc/*/copyright.
6583 16:35:13.515935
6584 16:35:13.522545 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6585 16:35:13.525452 permitted by applicable law.
6586 16:35:13.592801 Matched prompt #10: / #
6588 16:35:13.593194 Setting prompt string to ['/ #']
6589 16:35:13.593343 end: 2.2.5.1 login-action (duration 00:00:18) [common]
6591 16:35:13.593692 end: 2.2.5 auto-login-action (duration 00:00:18) [common]
6592 16:35:13.593827 start: 2.2.6 expect-shell-connection (timeout 00:03:47) [common]
6593 16:35:13.593941 Setting prompt string to ['/ #']
6594 16:35:13.594040 Forcing a shell prompt, looking for ['/ #']
6596 16:35:13.644314 / #
6597 16:35:13.644507 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6598 16:35:13.644631 Waiting using forced prompt support (timeout 00:02:30)
6599 16:35:13.649028
6600 16:35:13.649349 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6601 16:35:13.649503 start: 2.2.7 export-device-env (timeout 00:03:47) [common]
6603 16:35:13.749875 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14396124/extract-nfsrootfs-mhvcz92t'
6604 16:35:13.754645 export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14396124/extract-nfsrootfs-mhvcz92t'
6606 16:35:13.855213 / # export NFS_SERVER_IP='192.168.201.1'
6607 16:35:13.860538 export NFS_SERVER_IP='192.168.201.1'
6608 16:35:13.860836 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6609 16:35:13.860984 end: 2.2 depthcharge-retry (duration 00:01:13) [common]
6610 16:35:13.861117 end: 2 depthcharge-action (duration 00:01:13) [common]
6611 16:35:13.861255 start: 3 lava-test-retry (timeout 00:30:00) [common]
6612 16:35:13.861356 start: 3.1 lava-test-shell (timeout 00:30:00) [common]
6613 16:35:13.861439 Using namespace: common
6615 16:35:13.961779 / # #
6616 16:35:13.961953 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:30:00)
6617 16:35:13.966795 #
6618 16:35:13.967083 Using /lava-14396124
6620 16:35:14.067418 / # export SHELL=/bin/sh
6621 16:35:14.072220 export SHELL=/bin/sh
6623 16:35:14.172784 / # . /lava-14396124/environment
6624 16:35:14.177271 . /lava-14396124/environment
6626 16:35:14.283094 / # /lava-14396124/bin/lava-test-runner /lava-14396124/0
6627 16:35:14.283250 Test shell timeout: 10s (minimum of the action and connection timeout)
6628 16:35:14.287941 /lava-14396124/bin/lava-test-runner /lava-14396124/0
6629 16:35:14.476375 + export TESTRUN_ID=0_lc-compliance
6630 16:35:14.483135 + cd /lava-14396124/0/tests/0_lc-compliance
6631 16:35:14.483259 + cat uuid
6632 16:35:14.486688 + UUID=14396124_1.6.2.3.1
6633 16:35:14.486782 + set +x
6634 16:35:14.492901 <LAVA_SIGNAL_STARTRUN 0_lc-compliance 14396124_1.6.2.3.1>
6635 16:35:14.493226 Received signal: <STARTRUN> 0_lc-compliance 14396124_1.6.2.3.1
6636 16:35:14.493348 Starting test lava.0_lc-compliance (14396124_1.6.2.3.1)
6637 16:35:14.493491 Skipping test definition patterns.
6638 16:35:14.496396 + /usr/bin/lc-compliance-parser.sh
6639 16:35:16.135375 [0:00:19.641415189] [431] [1;32m INFO [1;37mCamera [1;34mcamera_manager.cpp:284 [0mlibcamera v0.0.0+1-01935edb
6640 16:35:16.141594 Using camera /base/soc/usb@11201000/usb@11200000/hub@1-1.3:1.0-04f2:b567
6641 16:35:16.191107 [0:00:19.696945363] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6642 16:35:16.194211 [==========] Running 120 tests from 1 test suite.
6643 16:35:16.246670 [----------] Global test environment set-up.
6644 16:35:16.256792 [0:00:19.763104652] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6645 16:35:16.296886 [----------] 120 tests from CaptureTests/SingleStream
6646 16:35:16.321564 [0:00:19.826297259] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6647 16:35:16.348414 [ RUN ] CaptureTests/SingleStream.Capture/Raw_1
6648 16:35:16.387881 [0:00:19.892152199] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6649 16:35:16.391223 <LAVA_SIGNAL_TESTSET START CaptureTests/SingleStream>
6650 16:35:16.391544 Received signal: <TESTSET> START CaptureTests/SingleStream
6651 16:35:16.391671 Starting test_set CaptureTests/SingleStream
6652 16:35:16.394516 Camera needs 4 requests, can't test only 1
6653 16:35:16.442235 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6654 16:35:16.497618
6655 16:35:16.551496 [ SKIPPED ] CaptureTests/SingleStream.Capture/Raw_1 (67 ms)
6656 16:35:16.616418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_1 RESULT=skip>
6657 16:35:16.616779 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_1 RESULT=skip
6659 16:35:16.627116 [ RUN ] CaptureTests/SingleStream.Capture/Raw_2
6660 16:35:16.665846 Camera needs 4 requests, can't test only 2
6661 16:35:16.721493 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6662 16:35:16.769831
6663 16:35:16.826757 [ SKIPPED ] CaptureTests/SingleStream.Capture/Raw_2 (60 ms)
6664 16:35:16.887996 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_2 RESULT=skip>
6665 16:35:16.888372 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_2 RESULT=skip
6667 16:35:16.899307 [ RUN ] CaptureTests/SingleStream.Capture/Raw_3
6668 16:35:16.937346 Camera needs 4 requests, can't test only 3
6669 16:35:16.988883 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6670 16:35:17.019328 [0:00:20.518586029] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6671 16:35:17.046851
6672 16:35:17.101744 [ SKIPPED ] CaptureTests/SingleStream.Capture/Raw_3 (65 ms)
6673 16:35:17.163019 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_3 RESULT=skip>
6674 16:35:17.163377 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_3 RESULT=skip
6676 16:35:17.173759 [ RUN ] CaptureTests/SingleStream.Capture/Raw_5
6677 16:35:17.212683 [ OK ] CaptureTests/SingleStream.Capture/Raw_5 (485 ms)
6678 16:35:17.274757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_5 RESULT=pass>
6679 16:35:17.275116 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_5 RESULT=pass
6681 16:35:17.285282 [ RUN ] CaptureTests/SingleStream.Capture/Raw_8
6682 16:35:17.532552 [ OK ] CaptureTests/SingleStream.Capture/Raw_8 (696 ms)
6683 16:35:17.604278 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_8 RESULT=pass>
6684 16:35:17.604645 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_8 RESULT=pass
6686 16:35:17.614294 [0:00:21.111697552] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6687 16:35:17.621048 [ RUN ] CaptureTests/SingleStream.Capture/Raw_13
6688 16:35:18.292885 [ OK ] CaptureTests/SingleStream.Capture/Raw_13 (755 ms)
6689 16:35:18.337130 [0:00:21.827197846] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6690 16:35:18.364419 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_13 RESULT=pass>
6691 16:35:18.364748 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_13 RESULT=pass
6693 16:35:18.377998 [ RUN ] CaptureTests/SingleStream.Capture/Raw_21
6694 16:35:19.731706 [ OK ] CaptureTests/SingleStream.Capture/Raw_21 (1430 ms)
6695 16:35:19.776774 [0:00:23.258268133] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6696 16:35:19.801088 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_21 RESULT=pass>
6697 16:35:19.801477 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_21 RESULT=pass
6699 16:35:19.813010 [ RUN ] CaptureTests/SingleStream.Capture/Raw_34
6700 16:35:23.545413 [ OK ] CaptureTests/SingleStream.Capture/Raw_34 (3797 ms)
6701 16:35:23.591431 [0:00:27.056779148] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6702 16:35:23.613514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_34 RESULT=pass>
6703 16:35:23.613849 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_34 RESULT=pass
6705 16:35:23.622621 [ RUN ] CaptureTests/SingleStream.Capture/Raw_55
6706 16:35:29.450531 [ OK ] CaptureTests/SingleStream.Capture/Raw_55 (5891 ms)
6707 16:35:29.495393 [0:00:32.947304800] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6708 16:35:29.516388 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_55 RESULT=pass>
6709 16:35:29.516715 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_55 RESULT=pass
6711 16:35:29.530050 [ RUN ] CaptureTests/SingleStream.Capture/Raw_89
6712 16:35:34.396681 <6>[ 38.089583] vaux18: disabling
6713 16:35:34.399910 <6>[ 38.093372] vio28: disabling
6714 16:35:38.745289 [ OK ] CaptureTests/SingleStream.Capture/Raw_89 (9286 ms)
6715 16:35:38.790361 [0:00:42.234469858] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6716 16:35:38.819997 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Raw_89 RESULT=pass>
6717 16:35:38.820319 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Raw_89 RESULT=pass
6719 16:35:38.833305 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_1
6720 16:35:38.855175 [0:00:42.299117735] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6721 16:35:38.877826 Camera needs 4 requests, can't test only 1
6722 16:35:38.919388 [0:00:42.363624645] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6723 16:35:38.936058 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6724 16:35:38.984010 [0:00:42.427997223] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6725 16:35:38.990222
6726 16:35:39.054803 [ SKIPPED ] CaptureTests/SingleStream.Capture/StillCapture_1 (63 ms)
6727 16:35:39.120070 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_1 RESULT=skip>
6728 16:35:39.120397 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_1 RESULT=skip
6730 16:35:39.132778 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_2
6731 16:35:39.175881 Camera needs 4 requests, can't test only 2
6732 16:35:39.237856 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6733 16:35:39.295195
6734 16:35:39.351920 [ SKIPPED ] CaptureTests/SingleStream.Capture/StillCapture_2 (63 ms)
6735 16:35:39.417007 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_2 RESULT=skip>
6736 16:35:39.417315 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_2 RESULT=skip
6738 16:35:39.430498 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_3
6739 16:35:39.466872 Camera needs 4 requests, can't test only 3
6740 16:35:39.530452 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6741 16:35:39.589216
6742 16:35:39.646675 [ SKIPPED ] CaptureTests/SingleStream.Capture/StillCapture_3 (65 ms)
6743 16:35:39.710750 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_3 RESULT=skip>
6744 16:35:39.711082 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_3 RESULT=skip
6746 16:35:39.722775 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_5
6747 16:35:40.497667 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_5 (1557 ms)
6748 16:35:40.542279 [0:00:43.985834119] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6749 16:35:40.565954 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_5 RESULT=pass>
6750 16:35:40.566299 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_5 RESULT=pass
6752 16:35:40.578872 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_8
6753 16:35:41.717966 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_8 (1220 ms)
6754 16:35:41.762494 [0:00:45.205754808] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6755 16:35:41.783929 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_8 RESULT=pass>
6756 16:35:41.784238 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_8 RESULT=pass
6758 16:35:41.795381 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_13
6759 16:35:43.438259 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_13 (1719 ms)
6760 16:35:43.483355 [0:00:46.925823644] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6761 16:35:43.512607 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_13 RESULT=pass>
6762 16:35:43.512947 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_13 RESULT=pass
6764 16:35:43.525717 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_21
6765 16:35:45.957043 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_21 (2517 ms)
6766 16:35:46.001646 [0:00:49.443605857] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6767 16:35:46.024169 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_21 RESULT=pass>
6768 16:35:46.024473 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_21 RESULT=pass
6770 16:35:46.037227 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_34
6771 16:35:49.768353 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_34 (3810 ms)
6772 16:35:49.813631 [0:00:53.254842033] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6773 16:35:49.866635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_34 RESULT=pass>
6774 16:35:49.866977 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_34 RESULT=pass
6776 16:35:49.879800 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_55
6777 16:35:55.673768 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_55 (5905 ms)
6778 16:35:55.719675 [0:00:59.160042228] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6779 16:35:55.749614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_55 RESULT=pass>
6780 16:35:55.749979 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_55 RESULT=pass
6782 16:35:55.760778 [ RUN ] CaptureTests/SingleStream.Capture/StillCapture_89
6783 16:36:04.973312 [ OK ] CaptureTests/SingleStream.Capture/StillCapture_89 (9298 ms)
6784 16:36:05.018270 [0:01:08.458615373] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6785 16:36:05.045170 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/StillCapture_89 RESULT=pass>
6786 16:36:05.045463 Received signal: <TESTCASE> TEST_CASE_ID=Capture/StillCapture_89 RESULT=pass
6788 16:36:05.056861 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_1
6789 16:36:05.081746 [0:01:08.522053992] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6790 16:36:05.101394 Camera needs 4 requests, can't test only 1
6791 16:36:05.147484 [0:01:08.587790198] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6792 16:36:05.162972 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6793 16:36:05.214490 [0:01:08.654765543] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6794 16:36:05.221267
6795 16:36:05.291628 [ SKIPPED ] CaptureTests/SingleStream.Capture/VideoRecording_1 (62 ms)
6796 16:36:05.369285 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_1 RESULT=skip>
6797 16:36:05.369621 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_1 RESULT=skip
6799 16:36:05.383139 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_2
6800 16:36:05.426720 Camera needs 4 requests, can't test only 2
6801 16:36:05.481857 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6802 16:36:05.533335
6803 16:36:05.591885 [ SKIPPED ] CaptureTests/SingleStream.Capture/VideoRecording_2 (65 ms)
6804 16:36:05.654514 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_2 RESULT=skip>
6805 16:36:05.654861 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_2 RESULT=skip
6807 16:36:05.667305 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_3
6808 16:36:05.709540 Camera needs 4 requests, can't test only 3
6809 16:36:05.767962 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6810 16:36:05.822441
6811 16:36:05.877397 [ SKIPPED ] CaptureTests/SingleStream.Capture/VideoRecording_3 (66 ms)
6812 16:36:05.944069 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_3 RESULT=skip>
6813 16:36:05.944413 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_3 RESULT=skip
6815 16:36:05.959657 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_5
6816 16:36:06.724222 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_5 (1555 ms)
6817 16:36:06.769323 [0:01:10.209534742] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6818 16:36:06.788330 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_5 RESULT=pass>
6819 16:36:06.788640 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_5 RESULT=pass
6821 16:36:06.800777 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_8
6822 16:36:07.945826 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_8 (1221 ms)
6823 16:36:07.992077 [0:01:11.431933862] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6824 16:36:08.015119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_8 RESULT=pass>
6825 16:36:08.015432 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_8 RESULT=pass
6827 16:36:08.028134 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_13
6828 16:36:09.670307 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_13 (1721 ms)
6829 16:36:09.711330 [0:01:13.151579057] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6830 16:36:09.736782 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_13 RESULT=pass>
6831 16:36:09.737075 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_13 RESULT=pass
6833 16:36:09.748445 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_21
6834 16:36:12.184737 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_21 (2514 ms)
6835 16:36:12.226094 [0:01:15.666333594] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6836 16:36:12.249857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_21 RESULT=pass>
6837 16:36:12.250170 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_21 RESULT=pass
6839 16:36:12.260908 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_34
6840 16:36:15.997782 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_34 (3812 ms)
6841 16:36:16.039210 [0:01:19.479096481] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6842 16:36:16.057772 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_34 RESULT=pass>
6843 16:36:16.058094 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_34 RESULT=pass
6845 16:36:16.068570 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_55
6846 16:36:21.898356 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_55 (5903 ms)
6847 16:36:21.942932 [0:01:25.383131679] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6848 16:36:21.964420 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_55 RESULT=pass>
6849 16:36:21.964740 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_55 RESULT=pass
6851 16:36:21.975769 [ RUN ] CaptureTests/SingleStream.Capture/VideoRecording_89
6852 16:36:31.198806 [ OK ] CaptureTests/SingleStream.Capture/VideoRecording_89 (9296 ms)
6853 16:36:31.240709 [0:01:34.680539608] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6854 16:36:31.269215 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/VideoRecording_89 RESULT=pass>
6855 16:36:31.269507 Received signal: <TESTCASE> TEST_CASE_ID=Capture/VideoRecording_89 RESULT=pass
6857 16:36:31.282786 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_1
6858 16:36:31.304841 [0:01:34.744351430] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6859 16:36:31.328535 Camera needs 4 requests, can't test only 1
6860 16:36:31.367881 [0:01:34.807558022] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6861 16:36:31.392874 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6862 16:36:31.432651 [0:01:34.872378921] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6863 16:36:31.439277
6864 16:36:31.499893 [ SKIPPED ] CaptureTests/SingleStream.Capture/Viewfinder_1 (63 ms)
6865 16:36:31.562491 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_1 RESULT=skip>
6866 16:36:31.562814 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_1 RESULT=skip
6868 16:36:31.576140 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_2
6869 16:36:31.623269 Camera needs 4 requests, can't test only 2
6870 16:36:31.676525 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6871 16:36:31.730416
6872 16:36:31.789360 [ SKIPPED ] CaptureTests/SingleStream.Capture/Viewfinder_2 (64 ms)
6873 16:36:31.852747 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_2 RESULT=skip>
6874 16:36:31.853063 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_2 RESULT=skip
6876 16:36:31.864053 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_3
6877 16:36:31.903119 Camera needs 4 requests, can't test only 3
6878 16:36:31.953895 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6879 16:36:32.005532
6880 16:36:32.063514 [ SKIPPED ] CaptureTests/SingleStream.Capture/Viewfinder_3 (63 ms)
6881 16:36:32.125661 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_3 RESULT=skip>
6882 16:36:32.125973 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_3 RESULT=skip
6884 16:36:32.137621 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_5
6885 16:36:32.947568 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_5 (1560 ms)
6886 16:36:32.992340 [0:01:36.432113543] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6887 16:36:33.009639 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_5 RESULT=pass>
6888 16:36:33.009922 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_5 RESULT=pass
6890 16:36:33.021014 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_8
6891 16:36:34.167572 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_8 (1219 ms)
6892 16:36:34.212468 [0:01:37.651962049] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6893 16:36:34.241442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_8 RESULT=pass>
6894 16:36:34.241762 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_8 RESULT=pass
6896 16:36:34.252743 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_13
6897 16:36:35.888757 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_13 (1720 ms)
6898 16:36:35.933645 [0:01:39.372944111] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6899 16:36:35.957179 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_13 RESULT=pass>
6900 16:36:35.957501 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_13 RESULT=pass
6902 16:36:35.968439 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_21
6903 16:36:38.406620 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_21 (2517 ms)
6904 16:36:38.451513 [0:01:41.891327521] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6905 16:36:38.476044 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_21 RESULT=pass>
6906 16:36:38.476380 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_21 RESULT=pass
6908 16:36:38.486146 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_34
6909 16:36:42.219677 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_34 (3813 ms)
6910 16:36:42.264516 [0:01:45.703851774] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6911 16:36:42.283180 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_34 RESULT=pass>
6912 16:36:42.283494 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_34 RESULT=pass
6914 16:36:42.293259 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_55
6915 16:36:48.124026 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_55 (5904 ms)
6916 16:36:48.168811 [0:01:51.607840798] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6917 16:36:48.191148 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_55 RESULT=pass>
6918 16:36:48.191441 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_55 RESULT=pass
6920 16:36:48.202489 [ RUN ] CaptureTests/SingleStream.Capture/Viewfinder_89
6921 16:36:57.421448 [ OK ] CaptureTests/SingleStream.Capture/Viewfinder_89 (9297 ms)
6922 16:36:57.466363 [0:02:00.905330278] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6923 16:36:57.488089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Capture/Viewfinder_89 RESULT=pass>
6924 16:36:57.488379 Received signal: <TESTCASE> TEST_CASE_ID=Capture/Viewfinder_89 RESULT=pass
6926 16:36:57.500928 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_1
6927 16:36:57.528513 [0:02:00.967867431] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6928 16:36:57.540364 Camera needs 4 requests, can't test only 1
6929 16:36:57.593495 [0:02:01.032202199] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6930 16:36:57.596854 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6931 16:36:57.644019
6932 16:36:57.658474 [0:02:01.097615891] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6933 16:36:57.703018 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Raw_1 (62 ms)
6934 16:36:57.764068 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_1 RESULT=skip>
6935 16:36:57.764368 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_1 RESULT=skip
6937 16:36:57.776146 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_2
6938 16:36:57.816499 Camera needs 4 requests, can't test only 2
6939 16:36:57.879345 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6940 16:36:57.927181
6941 16:36:57.985129 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Raw_2 (64 ms)
6942 16:36:58.047861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_2 RESULT=skip>
6943 16:36:58.048193 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_2 RESULT=skip
6945 16:36:58.058852 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_3
6946 16:36:58.101015 Camera needs 4 requests, can't test only 3
6947 16:36:58.161211 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
6948 16:36:58.214902
6949 16:36:58.279746 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Raw_3 (64 ms)
6950 16:36:58.345295 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_3 RESULT=skip>
6951 16:36:58.345611 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_3 RESULT=skip
6953 16:36:58.356936 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_5
6954 16:37:00.915690 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_5 (3302 ms)
6955 16:37:00.960613 [0:02:04.399544399] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6956 16:37:00.977542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_5 RESULT=pass>
6957 16:37:00.977870 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_5 RESULT=pass
6959 16:37:00.987011 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_8
6960 16:37:04.481626 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_8 (3565 ms)
6961 16:37:04.526501 [0:02:07.965294610] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6962 16:37:04.548478 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_8 RESULT=pass>
6963 16:37:04.548817 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_8 RESULT=pass
6965 16:37:04.560522 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_13
6966 16:37:09.548231 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_13 (5066 ms)
6967 16:37:09.592592 [0:02:13.031106132] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6968 16:37:09.613379 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_13 RESULT=pass>
6969 16:37:09.613726 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_13 RESULT=pass
6971 16:37:09.626300 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_21
6972 16:37:17.001268 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_21 (7452 ms)
6973 16:37:17.045766 [0:02:20.484151891] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6974 16:37:17.067730 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_21 RESULT=pass>
6975 16:37:17.068047 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_21 RESULT=pass
6977 16:37:17.081353 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_34
6978 16:37:28.342292 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_34 (11340 ms)
6979 16:37:28.386936 [0:02:31.824902040] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6980 16:37:28.401962 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_34 RESULT=pass>
6981 16:37:28.402259 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_34 RESULT=pass
6983 16:37:28.413450 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_55
6984 16:37:45.959289 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_55 (17616 ms)
6985 16:37:46.003419 [0:02:49.441497886] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6986 16:37:46.029601 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_55 RESULT=pass>
6987 16:37:46.029921 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_55 RESULT=pass
6989 16:37:46.041197 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Raw_89
6990 16:38:13.748245 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Raw_89 (27787 ms)
6991 16:38:13.792442 [0:03:17.229488965] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6992 16:38:13.839621 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Raw_89 RESULT=pass>
6993 16:38:13.840296 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Raw_89 RESULT=pass
6995 16:38:13.853721 [0:03:17.290627734] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6996 16:38:13.860024 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_1
6997 16:38:13.896483 Camera needs 4 requests, can't test only 1
6998 16:38:13.917360 [0:03:17.353949426] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
6999 16:38:13.980412 [0:03:17.417152888] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7000 16:38:13.983615 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7001 16:38:14.042679
7002 16:38:14.123771 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_1 (61 ms)
7003 16:38:14.195629 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_1 RESULT=skip>
7004 16:38:14.196512 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_1 RESULT=skip
7006 16:38:14.208484 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_2
7007 16:38:14.254402 Camera needs 4 requests, can't test only 2
7008 16:38:14.315829 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7009 16:38:14.369666
7010 16:38:14.444987 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_2 (62 ms)
7011 16:38:14.518729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_2 RESULT=skip>
7012 16:38:14.519084 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_2 RESULT=skip
7014 16:38:14.527208 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_3
7015 16:38:14.567297 Camera needs 4 requests, can't test only 3
7016 16:38:14.623009 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7017 16:38:14.671020
7018 16:38:14.732736 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_3 (63 ms)
7019 16:38:14.796119 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_3 RESULT=skip>
7020 16:38:14.796437 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_3 RESULT=skip
7022 16:38:14.803316 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_5
7023 16:38:17.246168 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_5 (3307 ms)
7024 16:38:17.287850 [0:03:20.724764657] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7025 16:38:17.328650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_5 RESULT=pass>
7026 16:38:17.329572 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_5 RESULT=pass
7028 16:38:17.340571 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_8
7029 16:38:20.811040 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_8 (3565 ms)
7030 16:38:20.852638 [0:03:24.289797196] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7031 16:38:20.886308 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_8 RESULT=pass>
7032 16:38:20.887176 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_8 RESULT=pass
7034 16:38:20.897082 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_13
7035 16:38:25.876891 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_13 (5064 ms)
7036 16:38:25.919032 [0:03:29.355309965] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7037 16:38:25.958753 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_13 RESULT=pass>
7038 16:38:25.959123 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_13 RESULT=pass
7040 16:38:25.966690 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_21
7041 16:38:33.327614 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_21 (7450 ms)
7042 16:38:33.368912 [0:03:36.805429120] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7043 16:38:33.386940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_21 RESULT=pass>
7044 16:38:33.387259 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_21 RESULT=pass
7046 16:38:33.394700 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_34
7047 16:38:44.668123 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_34 (11340 ms)
7048 16:38:44.708527 [0:03:48.145317505] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7049 16:38:44.732599 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_34 RESULT=pass>
7050 16:38:44.732910 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_34 RESULT=pass
7052 16:38:44.741658 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_55
7053 16:39:02.279302 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_55 (17610 ms)
7054 16:39:02.320024 [0:04:05.756312429] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7055 16:39:02.339501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_55 RESULT=pass>
7056 16:39:02.339821 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_55 RESULT=pass
7058 16:39:02.348168 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_89
7059 16:39:30.066666 [ OK ] CaptureTests/SingleStream.CaptureStartStop/StillCapture_89 (27786 ms)
7060 16:39:30.107843 [0:04:33.543282661] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7061 16:39:30.137911 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/StillCapture_89 RESULT=pass>
7062 16:39:30.138202 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/StillCapture_89 RESULT=pass
7064 16:39:30.146856 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_1
7065 16:39:30.170665 [0:04:33.606165200] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7066 16:39:30.190704 Camera needs 4 requests, can't test only 1
7067 16:39:30.234161 [0:04:33.669438123] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7068 16:39:30.251038 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7069 16:39:30.301417 [0:04:33.737116123] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7070 16:39:30.308890
7071 16:39:30.376966 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_1 (62 ms)
7072 16:39:30.450421 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_1 RESULT=skip>
7073 16:39:30.450761 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_1 RESULT=skip
7075 16:39:30.458850 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_2
7076 16:39:30.499359 Camera needs 4 requests, can't test only 2
7077 16:39:30.557048 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7078 16:39:30.607256
7079 16:39:30.663418 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_2 (63 ms)
7080 16:39:30.728497 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_2 RESULT=skip>
7081 16:39:30.728823 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_2 RESULT=skip
7083 16:39:30.738337 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_3
7084 16:39:30.776648 Camera needs 4 requests, can't test only 3
7085 16:39:30.833264 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7086 16:39:30.886838
7087 16:39:30.943986 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_3 (65 ms)
7088 16:39:31.005616 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_3 RESULT=skip>
7089 16:39:31.005953 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_3 RESULT=skip
7091 16:39:31.014731 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_5
7092 16:39:33.563822 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_5 (3305 ms)
7093 16:39:33.604980 [0:04:37.040580969] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7094 16:39:33.634254 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_5 RESULT=pass>
7095 16:39:33.634589 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_5 RESULT=pass
7097 16:39:33.642725 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_8
7098 16:39:37.131323 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_8 (3567 ms)
7099 16:39:37.173193 [0:04:40.608541585] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7100 16:39:37.210729 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_8 RESULT=pass>
7101 16:39:37.211077 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_8 RESULT=pass
7103 16:39:37.225723 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_13
7104 16:39:42.192404 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_13 (5060 ms)
7105 16:39:42.233186 [0:04:45.668257816] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7106 16:39:42.264440 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_13 RESULT=pass>
7107 16:39:42.264884 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_13 RESULT=pass
7109 16:39:42.276164 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_21
7110 16:39:49.641531 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_21 (7449 ms)
7111 16:39:49.688123 [0:04:53.123111047] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7112 16:39:49.727797 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_21 RESULT=pass>
7113 16:39:49.728116 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_21 RESULT=pass
7115 16:39:49.737248 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_34
7116 16:40:00.984302 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_34 (11339 ms)
7117 16:40:01.029148 [0:05:04.463921663] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7118 16:40:01.062869 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_34 RESULT=pass>
7119 16:40:01.063185 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_34 RESULT=pass
7121 16:40:01.072668 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_55
7122 16:40:18.602131 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_55 (17615 ms)
7123 16:40:18.643433 [0:05:22.077921280] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7124 16:40:18.668762 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_55 RESULT=pass>
7125 16:40:18.669113 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_55 RESULT=pass
7127 16:40:18.677673 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_89
7128 16:40:46.391664 [ OK ] CaptureTests/SingleStream.CaptureStartStop/VideoRecording_89 (27788 ms)
7129 16:40:46.432834 [0:05:49.866462743] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7130 16:40:46.461339 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/VideoRecording_89 RESULT=pass>
7131 16:40:46.461648 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/VideoRecording_89 RESULT=pass
7133 16:40:46.470763 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_1
7134 16:40:46.497284 [0:05:49.931164128] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7135 16:40:46.512364 Camera needs 4 requests, can't test only 1
7136 16:40:46.564698 [0:05:49.998543743] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7137 16:40:46.567779 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7138 16:40:46.627225 [0:05:50.060952358] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7139 16:40:46.627359
7140 16:40:46.691949 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_1 (62 ms)
7141 16:40:46.759822 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_1 RESULT=skip>
7142 16:40:46.760140 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_1 RESULT=skip
7144 16:40:46.768993 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_2
7145 16:40:46.810793 Camera needs 4 requests, can't test only 2
7146 16:40:46.871015 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7147 16:40:46.929128
7148 16:40:46.996166 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_2 (67 ms)
7149 16:40:47.061686 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_2 RESULT=skip>
7150 16:40:47.062022 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_2 RESULT=skip
7152 16:40:47.070158 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_3
7153 16:40:47.109563 Camera needs 4 requests, can't test only 3
7154 16:40:47.164994 ../src/apps/lc-compliance/simple_capture.cpp:91: Skipped
7155 16:40:47.215615
7156 16:40:47.276517 [ SKIPPED ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_3 (64 ms)
7157 16:40:47.350315 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_3 RESULT=skip>
7158 16:40:47.350636 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_3 RESULT=skip
7160 16:40:47.359719 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_5
7161 16:40:49.888014 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_5 (3301 ms)
7162 16:40:49.930833 [0:05:53.364221359] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7163 16:40:49.956052 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_5 RESULT=pass>
7164 16:40:49.956348 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_5 RESULT=pass
7166 16:40:49.964826 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_8
7167 16:40:53.449396 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_8 (3561 ms)
7168 16:40:53.490922 [0:05:56.924201128] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7169 16:40:53.519534 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_8 RESULT=pass>
7170 16:40:53.519877 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_8 RESULT=pass
7172 16:40:53.527144 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_13
7173 16:40:58.512942 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_13 (5063 ms)
7174 16:40:58.554551 [0:06:01.987577051] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7175 16:40:58.591563 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_13 RESULT=pass>
7176 16:40:58.591886 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_13 RESULT=pass
7178 16:40:58.602276 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_21
7179 16:41:05.965544 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_21 (7451 ms)
7180 16:41:06.006303 [0:06:09.439538590] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7181 16:41:06.038058 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_21 RESULT=pass>
7182 16:41:06.038423 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_21 RESULT=pass
7184 16:41:06.047731 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_34
7185 16:41:17.306059 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_34 (11339 ms)
7186 16:41:17.346901 [0:06:20.779820437] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7187 16:41:17.386998 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_34 RESULT=pass>
7188 16:41:17.387335 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_34 RESULT=pass
7190 16:41:17.399177 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_55
7191 16:41:34.923689 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_55 (17617 ms)
7192 16:41:34.964954 [0:06:38.397399823] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7193 16:41:34.998630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_55 RESULT=pass>
7194 16:41:34.998922 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_55 RESULT=pass
7196 16:41:35.007578 [ RUN ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_89
7197 16:42:02.717971 [ OK ] CaptureTests/SingleStream.CaptureStartStop/Viewfinder_89 (27793 ms)
7198 16:42:02.760111 [0:07:06.191627594] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7199 16:42:02.799542 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CaptureStartStop/Viewfinder_89 RESULT=pass>
7200 16:42:02.799844 Received signal: <TESTCASE> TEST_CASE_ID=CaptureStartStop/Viewfinder_89 RESULT=pass
7202 16:42:02.810845 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_1
7203 16:42:03.240185 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_1 (525 ms)
7204 16:42:03.316005 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_1 RESULT=pass>
7205 16:42:03.316364 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_1 RESULT=pass
7207 16:42:03.329685 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_2
7208 16:42:03.489819 [0:07:06.921786286] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7209 16:42:04.072365 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_2 (831 ms)
7210 16:42:04.138198 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_2 RESULT=pass>
7211 16:42:04.138543 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_2 RESULT=pass
7213 16:42:04.149763 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_3
7214 16:42:04.223300 [0:07:07.655210978] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7215 16:42:04.904024 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_3 (831 ms)
7216 16:42:04.957102 [0:07:08.388793594] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7217 16:42:04.971583 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_3 RESULT=pass>
7218 16:42:04.971868 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_3 RESULT=pass
7220 16:42:04.985834 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_5
7221 16:42:05.837658 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_5 (932 ms)
7222 16:42:05.882607 [0:07:09.314259902] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7223 16:42:05.924788 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_5 RESULT=pass>
7224 16:42:05.925492 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_5 RESULT=pass
7226 16:42:05.942394 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_8
7227 16:42:07.060137 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_8 (1222 ms)
7228 16:42:07.105104 [0:07:10.536616671] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7229 16:42:07.143926 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_8 RESULT=pass>
7230 16:42:07.144219 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_8 RESULT=pass
7232 16:42:07.157808 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_13
7233 16:42:08.784244 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_13 (1723 ms)
7234 16:42:08.828543 [0:07:12.259892132] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7235 16:42:08.862193 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_13 RESULT=pass>
7236 16:42:08.862477 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_13 RESULT=pass
7238 16:42:08.873272 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_21
7239 16:42:11.301257 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_21 (2516 ms)
7240 16:42:11.346256 [0:07:14.777500902] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7241 16:42:11.396690 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_21 RESULT=pass>
7242 16:42:11.397398 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_21 RESULT=pass
7244 16:42:11.411064 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_34
7245 16:42:15.115511 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_34 (3815 ms)
7246 16:42:15.161435 [0:07:18.592715825] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7247 16:42:15.194108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_34 RESULT=pass>
7248 16:42:15.194427 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_34 RESULT=pass
7250 16:42:15.205760 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_55
7251 16:42:21.022473 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_55 (5906 ms)
7252 16:42:21.067082 [0:07:24.498107595] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7253 16:42:21.104128 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_55 RESULT=pass>
7254 16:42:21.104423 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_55 RESULT=pass
7256 16:42:21.116735 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Raw_89
7257 16:42:30.321166 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Raw_89 (9298 ms)
7258 16:42:30.365899 [0:07:33.796541518] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7259 16:42:30.403942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Raw_89 RESULT=pass>
7260 16:42:30.404244 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Raw_89 RESULT=pass
7262 16:42:30.417130 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_1
7263 16:42:30.850616 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_1 (526 ms)
7264 16:42:30.920662 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_1 RESULT=pass>
7265 16:42:30.921475 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_1 RESULT=pass
7267 16:42:30.931082 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_2
7268 16:42:31.096646 [0:07:34.527003749] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7269 16:42:31.685095 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_2 (834 ms)
7270 16:42:31.761986 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_2 RESULT=pass>
7271 16:42:31.762320 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_2 RESULT=pass
7273 16:42:31.772213 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_3
7274 16:42:31.830312 [0:07:35.260787749] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7275 16:42:32.514175 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_3 (828 ms)
7276 16:42:32.564150 [0:07:35.994863903] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7277 16:42:32.589804 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_3 RESULT=pass>
7278 16:42:32.590134 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_3 RESULT=pass
7280 16:42:32.598646 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_5
7281 16:42:33.448042 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_5 (934 ms)
7282 16:42:33.489556 [0:07:36.920389134] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7283 16:42:33.546921 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_5 RESULT=pass>
7284 16:42:33.547626 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_5 RESULT=pass
7286 16:42:33.562169 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_8
7287 16:42:34.669078 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_8 (1220 ms)
7288 16:42:34.710830 [0:07:38.141349596] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7289 16:42:34.757209 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_8 RESULT=pass>
7290 16:42:34.757903 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_8 RESULT=pass
7292 16:42:34.769379 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_13
7293 16:42:36.390034 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_13 (1720 ms)
7294 16:42:36.433648 [0:07:39.864849673] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7295 16:42:36.454861 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_13 RESULT=pass>
7296 16:42:36.455202 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_13 RESULT=pass
7298 16:42:36.463068 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_21
7299 16:42:38.909760 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_21 (2517 ms)
7300 16:42:38.950570 [0:07:42.381306596] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7301 16:42:38.970477 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_21 RESULT=pass>
7302 16:42:38.970775 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_21 RESULT=pass
7304 16:42:38.978412 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_34
7305 16:42:42.721497 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_34 (3811 ms)
7306 16:42:42.764131 [0:07:46.195057442] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7307 16:42:42.791882 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_34 RESULT=pass>
7308 16:42:42.792265 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_34 RESULT=pass
7310 16:42:42.800561 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_55
7311 16:42:48.630824 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_55 (5909 ms)
7312 16:42:48.673126 [0:07:52.103738981] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7313 16:42:48.701291 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_55 RESULT=pass>
7314 16:42:48.701599 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_55 RESULT=pass
7316 16:42:48.711224 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_89
7317 16:42:57.927679 [ OK ] CaptureTests/SingleStream.UnbalancedStop/StillCapture_89 (9296 ms)
7318 16:42:57.969121 [0:08:01.399839058] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7319 16:42:57.995635 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/StillCapture_89 RESULT=pass>
7320 16:42:57.995916 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/StillCapture_89 RESULT=pass
7322 16:42:58.003648 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_1
7323 16:42:58.452761 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_1 (523 ms)
7324 16:42:58.512618 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_1 RESULT=pass>
7325 16:42:58.512927 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_1 RESULT=pass
7327 16:42:58.522206 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_2
7328 16:42:58.699141 [0:08:02.129513366] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7329 16:42:59.284279 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_2 (831 ms)
7330 16:42:59.348501 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_2 RESULT=pass>
7331 16:42:59.348810 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_2 RESULT=pass
7333 16:42:59.355938 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_3
7334 16:42:59.433673 [0:08:02.864198597] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7335 16:43:00.120406 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_3 (836 ms)
7336 16:43:00.167729 [0:08:03.598033059] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7337 16:43:00.191764 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_3 RESULT=pass>
7338 16:43:00.192067 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_3 RESULT=pass
7340 16:43:00.201491 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_5
7341 16:43:01.050502 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_5 (927 ms)
7342 16:43:01.092693 [0:08:04.522771828] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7343 16:43:01.113203 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_5 RESULT=pass>
7344 16:43:01.113488 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_5 RESULT=pass
7346 16:43:01.121963 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_8
7347 16:43:02.269827 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_8 (1219 ms)
7348 16:43:02.311758 [0:08:05.742208290] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7349 16:43:02.345127 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_8 RESULT=pass>
7350 16:43:02.345417 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_8 RESULT=pass
7352 16:43:02.353521 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_13
7353 16:43:03.990840 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_13 (1720 ms)
7354 16:43:04.032561 [0:08:07.462772520] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7355 16:43:04.062940 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_13 RESULT=pass>
7356 16:43:04.063279 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_13 RESULT=pass
7358 16:43:04.071574 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_21
7359 16:43:06.507098 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_21 (2515 ms)
7360 16:43:06.547993 [0:08:09.978563213] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7361 16:43:06.573138 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_21 RESULT=pass>
7362 16:43:06.573429 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_21 RESULT=pass
7364 16:43:06.582271 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_34
7365 16:43:10.319034 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_34 (3811 ms)
7366 16:43:10.360067 [0:08:13.790231367] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7367 16:43:10.388242 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_34 RESULT=pass>
7368 16:43:10.388560 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_34 RESULT=pass
7370 16:43:10.395725 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_55
7371 16:43:16.222988 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_55 (5903 ms)
7372 16:43:16.264049 [0:08:19.693804060] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7373 16:43:16.290269 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_55 RESULT=pass>
7374 16:43:16.290580 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_55 RESULT=pass
7376 16:43:16.299756 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_89
7377 16:43:25.518073 [ OK ] CaptureTests/SingleStream.UnbalancedStop/VideoRecording_89 (9294 ms)
7378 16:43:25.559861 [0:08:28.989440060] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7379 16:43:25.607288 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/VideoRecording_89 RESULT=pass>
7380 16:43:25.607991 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/VideoRecording_89 RESULT=pass
7382 16:43:25.618720 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_1
7383 16:43:26.042473 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_1 (524 ms)
7384 16:43:26.124370 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_1 RESULT=pass
7386 16:43:26.127133 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_1 RESULT=pass>
7387 16:43:26.136936 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_2
7388 16:43:26.290607 [0:08:29.719987829] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7389 16:43:26.875396 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_2 (832 ms)
7390 16:43:26.950510 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_2 RESULT=pass>
7391 16:43:26.950810 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_2 RESULT=pass
7393 16:43:26.961545 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_3
7394 16:43:27.023617 [0:08:30.452351753] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7395 16:43:27.708820 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_3 (833 ms)
7396 16:43:27.755769 [0:08:31.184834753] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7397 16:43:27.789859 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_3 RESULT=pass
7399 16:43:27.792670 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_3 RESULT=pass>
7400 16:43:27.804007 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_5
7401 16:43:28.637589 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_5 (929 ms)
7402 16:43:28.679357 [0:08:32.109139214] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7403 16:43:28.705353 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_5 RESULT=pass
7405 16:43:28.708626 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_5 RESULT=pass>
7406 16:43:28.718235 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_8
7407 16:43:29.858144 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_8 (1219 ms)
7408 16:43:29.899823 [0:08:33.328722983] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7409 16:43:29.933723 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_8 RESULT=pass
7411 16:43:29.937100 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_8 RESULT=pass>
7412 16:43:29.946880 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_13
7413 16:43:31.580841 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_13 (1722 ms)
7414 16:43:31.621874 [0:08:35.051666060] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7415 16:43:31.646123 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_13 RESULT=pass
7417 16:43:31.648843 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_13 RESULT=pass>
7418 16:43:31.657206 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_21
7419 16:43:34.098224 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_21 (2517 ms)
7420 16:43:34.140124 [0:08:37.569483214] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7421 16:43:34.159677 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_21 RESULT=pass
7423 16:43:34.162498 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_21 RESULT=pass>
7424 16:43:34.171291 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_34
7425 16:43:37.911419 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_34 (3812 ms)
7426 16:43:37.952555 [0:08:41.381852676] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7427 16:43:37.984123 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_34 RESULT=pass
7429 16:43:37.986617 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_34 RESULT=pass>
7430 16:43:37.998417 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_55
7431 16:43:43.815853 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_55 (5903 ms)
7432 16:43:43.856079 [0:08:47.285656984] [431] [1;32m INFO [1;37mCamera [1;34mcamera.cpp:1183 [0mconfiguring streams: (0) 1280x720-MJPEG
7433 16:43:43.882645 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_55 RESULT=pass
7435 16:43:43.886033 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_55 RESULT=pass>
7436 16:43:43.893692 [ RUN ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_89
7437 16:43:53.114003 [ OK ] CaptureTests/SingleStream.UnbalancedStop/Viewfinder_89 (9297 ms)
7438 16:43:53.189306 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=UnbalancedStop/Viewfinder_89 RESULT=pass>
7439 16:43:53.189612 Received signal: <TESTCASE> TEST_CASE_ID=UnbalancedStop/Viewfinder_89 RESULT=pass
7441 16:43:53.200428 [----------] 120 tests from CaptureTests/SingleStream (516887 ms total)
7442 16:43:53.260054
7443 16:43:53.324399 [----------] Global test environment tear-down
7444 16:43:53.382562 [==========] 120 tests from 1 test suite ran. (516887 ms total)
7445 16:43:53.455654 <LAVA_SIGNAL_TESTSET STOP>
7446 16:43:53.456290 Received signal: <TESTSET> STOP
7447 16:43:53.456665 Closing test_set CaptureTests/SingleStream
7448 16:43:53.458698 + set +x
7449 16:43:53.462114 <LAVA_SIGNAL_ENDRUN 0_lc-compliance 14396124_1.6.2.3.1>
7450 16:43:53.462699 Received signal: <ENDRUN> 0_lc-compliance 14396124_1.6.2.3.1
7451 16:43:53.463086 Ending use of test pattern.
7452 16:43:53.463364 Ending test lava.0_lc-compliance (14396124_1.6.2.3.1), duration 518.97
7454 16:43:53.465170 <LAVA_TEST_RUNNER EXIT>
7455 16:43:53.465745 ok: lava_test_shell seems to have completed
7456 16:43:53.473624 Capture/Raw_1:
result: skip
set: CaptureTests/SingleStream
Capture/Raw_13:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_2:
result: skip
set: CaptureTests/SingleStream
Capture/Raw_21:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_3:
result: skip
set: CaptureTests/SingleStream
Capture/Raw_34:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_5:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_55:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_8:
result: pass
set: CaptureTests/SingleStream
Capture/Raw_89:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_1:
result: skip
set: CaptureTests/SingleStream
Capture/StillCapture_13:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_2:
result: skip
set: CaptureTests/SingleStream
Capture/StillCapture_21:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_3:
result: skip
set: CaptureTests/SingleStream
Capture/StillCapture_34:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_5:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_55:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_8:
result: pass
set: CaptureTests/SingleStream
Capture/StillCapture_89:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_1:
result: skip
set: CaptureTests/SingleStream
Capture/VideoRecording_13:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_2:
result: skip
set: CaptureTests/SingleStream
Capture/VideoRecording_21:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_3:
result: skip
set: CaptureTests/SingleStream
Capture/VideoRecording_34:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_5:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_55:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_8:
result: pass
set: CaptureTests/SingleStream
Capture/VideoRecording_89:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_1:
result: skip
set: CaptureTests/SingleStream
Capture/Viewfinder_13:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_2:
result: skip
set: CaptureTests/SingleStream
Capture/Viewfinder_21:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_3:
result: skip
set: CaptureTests/SingleStream
Capture/Viewfinder_34:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_5:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_55:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_8:
result: pass
set: CaptureTests/SingleStream
Capture/Viewfinder_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Raw_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Raw_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Raw_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Raw_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/StillCapture_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/VideoRecording_89:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_1:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_13:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_2:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_21:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_3:
result: skip
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_34:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_5:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_55:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_8:
result: pass
set: CaptureTests/SingleStream
CaptureStartStop/Viewfinder_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Raw_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/StillCapture_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/VideoRecording_89:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_1:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_13:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_2:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_21:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_3:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_34:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_5:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_55:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_8:
result: pass
set: CaptureTests/SingleStream
UnbalancedStop/Viewfinder_89:
result: pass
set: CaptureTests/SingleStream
7457 16:43:53.474360 end: 3.1 lava-test-shell (duration 00:08:40) [common]
7458 16:43:53.474746 end: 3 lava-test-retry (duration 00:08:40) [common]
7459 16:43:53.475113 start: 4 finalize (timeout 00:10:00) [common]
7460 16:43:53.475509 start: 4.1 power-off (timeout 00:00:30) [common]
7461 16:43:53.476156 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
7462 16:43:54.890744 >> Command sent successfully.
7463 16:43:54.901030 Returned 0 in 1 seconds
7464 16:43:55.002247 end: 4.1 power-off (duration 00:00:02) [common]
7466 16:43:55.003516 start: 4.2 read-feedback (timeout 00:09:58) [common]
7467 16:43:55.004624 Listened to connection for namespace 'common' for up to 1s
7468 16:43:56.005152 Finalising connection for namespace 'common'
7469 16:43:56.005338 Disconnecting from shell: Finalise
7470 16:43:56.005436 / #
7471 16:43:56.105790 end: 4.2 read-feedback (duration 00:00:01) [common]
7472 16:43:56.105976 end: 4 finalize (duration 00:00:03) [common]
7473 16:43:56.106106 Cleaning after the job
7474 16:43:56.106213 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/ramdisk
7475 16:43:56.108517 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/kernel
7476 16:43:56.119945 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/dtb
7477 16:43:56.120150 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/nfsrootfs
7478 16:43:56.164468 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396124/tftp-deploy-c85998ow/modules
7479 16:43:56.170601 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14396124
7480 16:43:56.456238 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14396124
7481 16:43:56.456424 Job finished correctly