Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 3
- Kernel Errors: 45
- Boot result: FAIL
- Warnings: 1
- Kernel Warnings: 133
1 17:49:55.292160 lava-dispatcher, installed at version: 2024.03
2 17:49:55.292373 start: 0 validate
3 17:49:55.292518 Start time: 2024-06-17 17:49:55.292509+00:00 (UTC)
4 17:49:55.292655 Using caching service: 'http://localhost/cache/?uri=%s'
5 17:49:55.292794 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 17:49:55.567678 Using caching service: 'http://localhost/cache/?uri=%s'
7 17:49:55.568370 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-32-g0d904242fc145%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 17:49:55.839967 Using caching service: 'http://localhost/cache/?uri=%s'
9 17:49:55.840853 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-32-g0d904242fc145%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 17:49:56.108722 Using caching service: 'http://localhost/cache/?uri=%s'
11 17:49:56.109483 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-32-g0d904242fc145%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 17:49:56.385348 validate duration: 1.09
14 17:49:56.386596 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 17:49:56.387160 start: 1.1 download-retry (timeout 00:10:00) [common]
16 17:49:56.387694 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 17:49:56.388256 Not decompressing ramdisk as can be used compressed.
18 17:49:56.388703 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/rootfs.cpio.gz
19 17:49:56.389222 saving as /var/lib/lava/dispatcher/tmp/14396189/tftp-deploy-rzu53s7n/ramdisk/rootfs.cpio.gz
20 17:49:56.389607 total size: 95552279 (91 MB)
21 17:49:56.394346 progress 0 % (0 MB)
22 17:49:56.445070 progress 5 % (4 MB)
23 17:49:56.471913 progress 10 % (9 MB)
24 17:49:56.499056 progress 15 % (13 MB)
25 17:49:56.526247 progress 20 % (18 MB)
26 17:49:56.553164 progress 25 % (22 MB)
27 17:49:56.579911 progress 30 % (27 MB)
28 17:49:56.607493 progress 35 % (31 MB)
29 17:49:56.634696 progress 40 % (36 MB)
30 17:49:56.661597 progress 45 % (41 MB)
31 17:49:56.688467 progress 50 % (45 MB)
32 17:49:56.715104 progress 55 % (50 MB)
33 17:49:56.743512 progress 60 % (54 MB)
34 17:49:56.771128 progress 65 % (59 MB)
35 17:49:56.797960 progress 70 % (63 MB)
36 17:49:56.824704 progress 75 % (68 MB)
37 17:49:56.851652 progress 80 % (72 MB)
38 17:49:56.878718 progress 85 % (77 MB)
39 17:49:56.905579 progress 90 % (82 MB)
40 17:49:56.932298 progress 95 % (86 MB)
41 17:49:56.958802 progress 100 % (91 MB)
42 17:49:56.958965 91 MB downloaded in 0.57 s (160.04 MB/s)
43 17:49:56.959144 end: 1.1.1 http-download (duration 00:00:01) [common]
45 17:49:56.959429 end: 1.1 download-retry (duration 00:00:01) [common]
46 17:49:56.959528 start: 1.2 download-retry (timeout 00:09:59) [common]
47 17:49:56.959621 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 17:49:56.959816 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 17:49:56.959900 saving as /var/lib/lava/dispatcher/tmp/14396189/tftp-deploy-rzu53s7n/kernel/Image
50 17:49:56.959971 total size: 54813184 (52 MB)
51 17:49:56.960041 No compression specified
52 17:49:56.961282 progress 0 % (0 MB)
53 17:49:56.976662 progress 5 % (2 MB)
54 17:49:56.992014 progress 10 % (5 MB)
55 17:49:57.007269 progress 15 % (7 MB)
56 17:49:57.022623 progress 20 % (10 MB)
57 17:49:57.038191 progress 25 % (13 MB)
58 17:49:57.053428 progress 30 % (15 MB)
59 17:49:57.068876 progress 35 % (18 MB)
60 17:49:57.084385 progress 40 % (20 MB)
61 17:49:57.099626 progress 45 % (23 MB)
62 17:49:57.115263 progress 50 % (26 MB)
63 17:49:57.130757 progress 55 % (28 MB)
64 17:49:57.145982 progress 60 % (31 MB)
65 17:49:57.161342 progress 65 % (34 MB)
66 17:49:57.176583 progress 70 % (36 MB)
67 17:49:57.192245 progress 75 % (39 MB)
68 17:49:57.207699 progress 80 % (41 MB)
69 17:49:57.222916 progress 85 % (44 MB)
70 17:49:57.238404 progress 90 % (47 MB)
71 17:49:57.253749 progress 95 % (49 MB)
72 17:49:57.268937 progress 100 % (52 MB)
73 17:49:57.269198 52 MB downloaded in 0.31 s (169.05 MB/s)
74 17:49:57.269364 end: 1.2.1 http-download (duration 00:00:00) [common]
76 17:49:57.269620 end: 1.2 download-retry (duration 00:00:00) [common]
77 17:49:57.269716 start: 1.3 download-retry (timeout 00:09:59) [common]
78 17:49:57.269811 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 17:49:57.269958 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 17:49:57.270043 saving as /var/lib/lava/dispatcher/tmp/14396189/tftp-deploy-rzu53s7n/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 17:49:57.270112 total size: 57695 (0 MB)
82 17:49:57.270181 No compression specified
83 17:49:57.271401 progress 56 % (0 MB)
84 17:49:57.271713 progress 100 % (0 MB)
85 17:49:57.271938 0 MB downloaded in 0.00 s (30.19 MB/s)
86 17:49:57.272071 end: 1.3.1 http-download (duration 00:00:00) [common]
88 17:49:57.272317 end: 1.3 download-retry (duration 00:00:00) [common]
89 17:49:57.272410 start: 1.4 download-retry (timeout 00:09:59) [common]
90 17:49:57.272500 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 17:49:57.272620 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 17:49:57.272695 saving as /var/lib/lava/dispatcher/tmp/14396189/tftp-deploy-rzu53s7n/modules/modules.tar
93 17:49:57.272761 total size: 8628772 (8 MB)
94 17:49:57.272829 Using unxz to decompress xz
95 17:49:57.277166 progress 0 % (0 MB)
96 17:49:57.300522 progress 5 % (0 MB)
97 17:49:57.327475 progress 10 % (0 MB)
98 17:49:57.353655 progress 15 % (1 MB)
99 17:49:57.380311 progress 20 % (1 MB)
100 17:49:57.407827 progress 25 % (2 MB)
101 17:49:57.434342 progress 30 % (2 MB)
102 17:49:57.463299 progress 35 % (2 MB)
103 17:49:57.491829 progress 40 % (3 MB)
104 17:49:57.520387 progress 45 % (3 MB)
105 17:49:57.549328 progress 50 % (4 MB)
106 17:49:57.576276 progress 55 % (4 MB)
107 17:49:57.603623 progress 60 % (4 MB)
108 17:49:57.633839 progress 65 % (5 MB)
109 17:49:57.660941 progress 70 % (5 MB)
110 17:49:57.686756 progress 75 % (6 MB)
111 17:49:57.712897 progress 80 % (6 MB)
112 17:49:57.745098 progress 85 % (7 MB)
113 17:49:57.777254 progress 90 % (7 MB)
114 17:49:57.806837 progress 95 % (7 MB)
115 17:49:57.835963 progress 100 % (8 MB)
116 17:49:57.841671 8 MB downloaded in 0.57 s (14.46 MB/s)
117 17:49:57.841942 end: 1.4.1 http-download (duration 00:00:01) [common]
119 17:49:57.842236 end: 1.4 download-retry (duration 00:00:01) [common]
120 17:49:57.842341 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 17:49:57.842447 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 17:49:57.842539 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 17:49:57.842639 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 17:49:57.842892 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq
125 17:49:57.843042 makedir: /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin
126 17:49:57.843160 makedir: /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/tests
127 17:49:57.843270 makedir: /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/results
128 17:49:57.843422 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-add-keys
129 17:49:57.843625 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-add-sources
130 17:49:57.843771 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-background-process-start
131 17:49:57.843919 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-background-process-stop
132 17:49:57.844060 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-common-functions
133 17:49:57.844199 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-echo-ipv4
134 17:49:57.844337 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-install-packages
135 17:49:57.844479 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-installed-packages
136 17:49:57.844620 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-os-build
137 17:49:57.844760 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-probe-channel
138 17:49:57.844903 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-probe-ip
139 17:49:57.845043 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-target-ip
140 17:49:57.845180 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-target-mac
141 17:49:57.845318 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-target-storage
142 17:49:57.845461 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-test-case
143 17:49:57.845598 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-test-event
144 17:49:57.845736 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-test-feedback
145 17:49:57.845874 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-test-raise
146 17:49:57.846011 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-test-reference
147 17:49:57.846148 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-test-runner
148 17:49:57.846285 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-test-set
149 17:49:57.846426 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-test-shell
150 17:49:57.846567 Updating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-install-packages (oe)
151 17:49:57.846733 Updating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/bin/lava-installed-packages (oe)
152 17:49:57.846868 Creating /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/environment
153 17:49:57.846978 LAVA metadata
154 17:49:57.847062 - LAVA_JOB_ID=14396189
155 17:49:57.847133 - LAVA_DISPATCHER_IP=192.168.201.1
156 17:49:57.847246 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 17:49:57.847322 skipped lava-vland-overlay
158 17:49:57.847424 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 17:49:57.847518 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 17:49:57.847598 skipped lava-multinode-overlay
161 17:49:57.847679 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 17:49:57.847773 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 17:49:57.847854 Loading test definitions
164 17:49:57.847955 start: 1.5.2.3.1 git-repo-action (timeout 00:09:59) [common]
165 17:49:57.848038 Using /lava-14396189 at stage 0
166 17:49:57.848147 Fetching tests from https://github.com/kernelci/kernelci-core
167 17:49:57.848247 Running '/usr/bin/git clone -b kernelci.org --depth=1 https://github.com/kernelci/kernelci-core /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/0/tests/0_sleep'
168 17:49:58.481081 Removing '.git' directory in /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/0/tests/0_sleep
169 17:49:58.482601 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/0/tests/0_sleep/config/lava/sleep/sleep.yaml
170 17:49:58.483182 uuid=14396189_1.5.2.3.1 testdef=None
171 17:49:58.483379 end: 1.5.2.3.1 git-repo-action (duration 00:00:01) [common]
173 17:49:58.483800 start: 1.5.2.3.2 test-overlay (timeout 00:09:58) [common]
174 17:49:58.484663 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
176 17:49:58.484921 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:58) [common]
177 17:49:58.485841 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
179 17:49:58.486267 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:58) [common]
180 17:49:58.487359 runner path: /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/0/tests/0_sleep test_uuid 14396189_1.5.2.3.1
181 17:49:58.487482 sleep_params='mem freeze'
182 17:49:58.487645 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
184 17:49:58.487879 Creating lava-test-runner.conf files
185 17:49:58.487951 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14396189/lava-overlay-wvzoi9xq/lava-14396189/0 for stage 0
186 17:49:58.488053 - 0_sleep
187 17:49:58.488169 end: 1.5.2.3 test-definition (duration 00:00:01) [common]
188 17:49:58.488265 start: 1.5.2.4 compress-overlay (timeout 00:09:58) [common]
189 17:49:58.648892 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
190 17:49:58.649052 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:58) [common]
191 17:49:58.649155 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
192 17:49:58.649261 end: 1.5.2 lava-overlay (duration 00:00:01) [common]
193 17:49:58.649359 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:58) [common]
194 17:50:01.909318 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:03) [common]
195 17:50:01.909732 start: 1.5.4 extract-modules (timeout 00:09:54) [common]
196 17:50:01.909853 extracting modules file /var/lib/lava/dispatcher/tmp/14396189/tftp-deploy-rzu53s7n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14396189/extract-overlay-ramdisk-luyrsayh/ramdisk
197 17:50:02.157477 end: 1.5.4 extract-modules (duration 00:00:00) [common]
198 17:50:02.157669 start: 1.5.5 apply-overlay-tftp (timeout 00:09:54) [common]
199 17:50:02.157774 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14396189/compress-overlay-483habek/overlay-1.5.2.4.tar.gz to ramdisk
200 17:50:02.157859 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14396189/compress-overlay-483habek/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14396189/extract-overlay-ramdisk-luyrsayh/ramdisk
201 17:50:02.275078 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
202 17:50:02.275249 start: 1.5.6 configure-preseed-file (timeout 00:09:54) [common]
203 17:50:02.275356 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
204 17:50:02.275492 start: 1.5.7 compress-ramdisk (timeout 00:09:54) [common]
205 17:50:02.275583 Building ramdisk /var/lib/lava/dispatcher/tmp/14396189/extract-overlay-ramdisk-luyrsayh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14396189/extract-overlay-ramdisk-luyrsayh/ramdisk
206 17:50:04.082265 >> 675374 blocks
207 17:50:16.721732 rename /var/lib/lava/dispatcher/tmp/14396189/extract-overlay-ramdisk-luyrsayh/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14396189/tftp-deploy-rzu53s7n/ramdisk/ramdisk.cpio.gz
208 17:50:16.722269 end: 1.5.7 compress-ramdisk (duration 00:00:14) [common]
209 17:50:16.722455 start: 1.5.8 prepare-kernel (timeout 00:09:40) [common]
210 17:50:16.722601 start: 1.5.8.1 prepare-fit (timeout 00:09:40) [common]
211 17:50:16.722754 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14396189/tftp-deploy-rzu53s7n/kernel/Image']
212 17:50:31.170127 Returned 0 in 14 seconds
213 17:50:31.270959 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14396189/tftp-deploy-rzu53s7n/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14396189/tftp-deploy-rzu53s7n/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14396189/tftp-deploy-rzu53s7n/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14396189/tftp-deploy-rzu53s7n/kernel/image.itb
214 17:50:32.829752 output: FIT description: Kernel Image image with one or more FDT blobs
215 17:50:32.830152 output: Created: Mon Jun 17 18:50:32 2024
216 17:50:32.830233 output: Image 0 (kernel-1)
217 17:50:32.830308 output: Description:
218 17:50:32.830377 output: Created: Mon Jun 17 18:50:32 2024
219 17:50:32.830446 output: Type: Kernel Image
220 17:50:32.830512 output: Compression: lzma compressed
221 17:50:32.830576 output: Data Size: 13128753 Bytes = 12821.05 KiB = 12.52 MiB
222 17:50:32.830640 output: Architecture: AArch64
223 17:50:32.830704 output: OS: Linux
224 17:50:32.830770 output: Load Address: 0x00000000
225 17:50:32.830838 output: Entry Point: 0x00000000
226 17:50:32.830903 output: Hash algo: crc32
227 17:50:32.830968 output: Hash value: 106ffd6f
228 17:50:32.831027 output: Image 1 (fdt-1)
229 17:50:32.831089 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
230 17:50:32.831150 output: Created: Mon Jun 17 18:50:32 2024
231 17:50:32.831213 output: Type: Flat Device Tree
232 17:50:32.831271 output: Compression: uncompressed
233 17:50:32.831329 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
234 17:50:32.831387 output: Architecture: AArch64
235 17:50:32.831489 output: Hash algo: crc32
236 17:50:32.831599 output: Hash value: a9713552
237 17:50:32.831671 output: Image 2 (ramdisk-1)
238 17:50:32.831731 output: Description: unavailable
239 17:50:32.831791 output: Created: Mon Jun 17 18:50:32 2024
240 17:50:32.831851 output: Type: RAMDisk Image
241 17:50:32.831909 output: Compression: Unknown Compression
242 17:50:32.831968 output: Data Size: 108991827 Bytes = 106437.33 KiB = 103.94 MiB
243 17:50:32.832026 output: Architecture: AArch64
244 17:50:32.832085 output: OS: Linux
245 17:50:32.832143 output: Load Address: unavailable
246 17:50:32.832201 output: Entry Point: unavailable
247 17:50:32.832260 output: Hash algo: crc32
248 17:50:32.832318 output: Hash value: 53d86853
249 17:50:32.832376 output: Default Configuration: 'conf-1'
250 17:50:32.832433 output: Configuration 0 (conf-1)
251 17:50:32.832491 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
252 17:50:32.832550 output: Kernel: kernel-1
253 17:50:32.832608 output: Init Ramdisk: ramdisk-1
254 17:50:32.832666 output: FDT: fdt-1
255 17:50:32.832724 output: Loadables: kernel-1
256 17:50:32.832781 output:
257 17:50:32.833008 end: 1.5.8.1 prepare-fit (duration 00:00:16) [common]
258 17:50:32.833105 end: 1.5.8 prepare-kernel (duration 00:00:16) [common]
259 17:50:32.833219 end: 1.5 prepare-tftp-overlay (duration 00:00:35) [common]
260 17:50:32.833318 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:24) [common]
261 17:50:32.833403 No LXC device requested
262 17:50:32.833489 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
263 17:50:32.833577 start: 1.7 deploy-device-env (timeout 00:09:24) [common]
264 17:50:32.833665 end: 1.7 deploy-device-env (duration 00:00:00) [common]
265 17:50:32.833741 Checking files for TFTP limit of 4294967296 bytes.
266 17:50:32.834282 end: 1 tftp-deploy (duration 00:00:36) [common]
267 17:50:32.834401 start: 2 depthcharge-action (timeout 00:05:00) [common]
268 17:50:32.834529 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
269 17:50:32.834687 substitutions:
270 17:50:32.834793 - {DTB}: 14396189/tftp-deploy-rzu53s7n/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
271 17:50:32.834877 - {INITRD}: 14396189/tftp-deploy-rzu53s7n/ramdisk/ramdisk.cpio.gz
272 17:50:32.834958 - {KERNEL}: 14396189/tftp-deploy-rzu53s7n/kernel/Image
273 17:50:32.835049 - {LAVA_MAC}: None
274 17:50:32.835154 - {PRESEED_CONFIG}: None
275 17:50:32.835260 - {PRESEED_LOCAL}: None
276 17:50:32.835365 - {RAMDISK}: 14396189/tftp-deploy-rzu53s7n/ramdisk/ramdisk.cpio.gz
277 17:50:32.835477 - {ROOT_PART}: None
278 17:50:32.835583 - {ROOT}: None
279 17:50:32.835686 - {SERVER_IP}: 192.168.201.1
280 17:50:32.835789 - {TEE}: None
281 17:50:32.835892 Parsed boot commands:
282 17:50:32.835995 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
283 17:50:32.836263 Parsed boot commands: tftpboot 192.168.201.1 14396189/tftp-deploy-rzu53s7n/kernel/image.itb 14396189/tftp-deploy-rzu53s7n/kernel/cmdline
284 17:50:32.836409 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
285 17:50:32.836550 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
286 17:50:32.836708 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
287 17:50:32.836849 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
288 17:50:32.836965 Not connected, no need to disconnect.
289 17:50:32.837091 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
290 17:50:32.837224 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
291 17:50:32.837343 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
292 17:50:32.841676 Setting prompt string to ['lava-test: # ']
293 17:50:32.842155 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
294 17:50:32.842324 end: 2.2.1 reset-connection (duration 00:00:00) [common]
295 17:50:32.842506 start: 2.2.2 reset-device (timeout 00:05:00) [common]
296 17:50:32.842667 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
297 17:50:32.843001 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-0']
298 17:50:43.267277 Returned 0 in 10 seconds
299 17:50:43.367960 end: 2.2.2.1 pdu-reboot (duration 00:00:11) [common]
301 17:50:43.368329 end: 2.2.2 reset-device (duration 00:00:11) [common]
302 17:50:43.368440 start: 2.2.3 depthcharge-start (timeout 00:04:49) [common]
303 17:50:43.368537 Setting prompt string to 'Starting depthcharge on Juniper...'
304 17:50:43.368617 Changing prompt to 'Starting depthcharge on Juniper...'
305 17:50:43.368692 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
306 17:50:43.369139 [Enter `^Ec?' for help]
307 17:50:43.369270 [DL] 00000000 00000000 010701
308 17:50:43.369400
309 17:50:43.369526
310 17:50:43.369633 F0: 102B 0000
311 17:50:43.369733
312 17:50:43.369833 F3: 1006 0033 [0200]
313 17:50:43.369934
314 17:50:43.370035 F3: 4001 00E0 [0200]
315 17:50:43.370130
316 17:50:43.370224 F3: 0000 0000
317 17:50:43.370318
318 17:50:43.370412 V0: 0000 0000 [0001]
319 17:50:43.370504
320 17:50:43.370596 00: 1027 0002
321 17:50:43.370694
322 17:50:43.370786 01: 0000 0000
323 17:50:43.370881
324 17:50:43.370973 BP: 0C00 0251 [0000]
325 17:50:43.371066
326 17:50:43.371161 G0: 1182 0000
327 17:50:43.371254
328 17:50:43.371347 EC: 0004 0000 [0001]
329 17:50:43.371442
330 17:50:43.371505 S7: 0000 0000 [0000]
331 17:50:43.371564
332 17:50:43.371624 CC: 0000 0000 [0001]
333 17:50:43.371683
334 17:50:43.371743 T0: 0000 00DB [000F]
335 17:50:43.371803
336 17:50:43.371862 Jump to BL
337 17:50:43.371921
338 17:50:43.371981
339 17:50:43.372040
340 17:50:43.372099 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
341 17:50:43.372162 ARM64: Exception handlers installed.
342 17:50:43.372221 ARM64: Testing exception
343 17:50:43.372280 ARM64: Done test exception
344 17:50:43.372339 WDT: Last reset was cold boot
345 17:50:43.372398 SPI0(PAD0) initialized at 992727 Hz
346 17:50:43.372457 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
347 17:50:43.372516 Manufacturer: ef
348 17:50:43.372576 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
349 17:50:43.372635 Probing TPM: . done!
350 17:50:43.372695 TPM ready after 0 ms
351 17:50:43.372754 Connected to device vid:did:rid of 1ae0:0028:00
352 17:50:43.372813 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
353 17:50:43.372874 Initialized TPM device CR50 revision 0
354 17:50:43.372933 tlcl_send_startup: Startup return code is 0
355 17:50:43.372993 TPM: setup succeeded
356 17:50:43.373052 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
357 17:50:43.373144 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
358 17:50:43.373211 in-header: 03 19 00 00 08 00 00 00
359 17:50:43.373272 in-data: a2 e0 47 00 13 00 00 00
360 17:50:43.373333 Chrome EC: UHEPI supported
361 17:50:43.373393 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
362 17:50:43.373454 in-header: 03 a1 00 00 08 00 00 00
363 17:50:43.373513 in-data: 84 60 60 10 00 00 00 00
364 17:50:43.373572 Phase 1
365 17:50:43.373632 FMAP: area GBB found @ 3f5000 (12032 bytes)
366 17:50:43.373693 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
367 17:50:43.373754 VB2:vb2_check_recovery() Recovery was requested manually
368 17:50:43.373815 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
369 17:50:43.373875 Recovery requested (1009000e)
370 17:50:43.373935 tlcl_extend: response is 0
371 17:50:43.373997 tlcl_extend: response is 0
372 17:50:43.374079
373 17:50:43.374149
374 17:50:43.374210 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
375 17:50:43.374271 ARM64: Exception handlers installed.
376 17:50:43.374330 ARM64: Testing exception
377 17:50:43.374391 ARM64: Done test exception
378 17:50:43.374451 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2010
379 17:50:43.374511 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
380 17:50:43.374571 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
381 17:50:43.374631 [RTC]rtc_get_frequency_meter,134: input=0xf, output=914
382 17:50:43.374690 [RTC]rtc_get_frequency_meter,134: input=0x7, output=778
383 17:50:43.374750 [RTC]rtc_get_frequency_meter,134: input=0xb, output=846
384 17:50:43.374809 [RTC]rtc_get_frequency_meter,134: input=0x9, output=812
385 17:50:43.374868 [RTC]rtc_get_frequency_meter,134: input=0x8, output=795
386 17:50:43.374928 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
387 17:50:43.374987 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
388 17:50:43.375047 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
389 17:50:43.375106 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
390 17:50:43.375165 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
391 17:50:43.375225 in-header: 03 19 00 00 08 00 00 00
392 17:50:43.375284 in-data: a2 e0 47 00 13 00 00 00
393 17:50:43.375343 Chrome EC: UHEPI supported
394 17:50:43.375407 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
395 17:50:43.375473 in-header: 03 a1 00 00 08 00 00 00
396 17:50:43.375533 in-data: 84 60 60 10 00 00 00 00
397 17:50:43.375592 Skip loading cached calibration data
398 17:50:43.375652 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
399 17:50:43.375716 in-header: 03 a1 00 00 08 00 00 00
400 17:50:43.375776 in-data: 84 60 60 10 00 00 00 00
401 17:50:43.375834 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
402 17:50:43.375895 in-header: 03 a1 00 00 08 00 00 00
403 17:50:43.375953 in-data: 84 60 60 10 00 00 00 00
404 17:50:43.376012 ADC[3]: Raw value=215860 ID=1
405 17:50:43.376071 Manufacturer: ef
406 17:50:43.376130 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
407 17:50:43.376190 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
408 17:50:43.376250 CBFS @ 21000 size 3d4000
409 17:50:43.376309 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
410 17:50:43.376369 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
411 17:50:43.376428 CBFS: Found @ offset 3c700 size 44
412 17:50:43.376487 DRAM-K: Full Calibration
413 17:50:43.376546 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
414 17:50:43.376606 CBFS @ 21000 size 3d4000
415 17:50:43.376665 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
416 17:50:43.376724 CBFS: Locating 'fallback/dram'
417 17:50:43.376783 CBFS: Found @ offset 24b00 size 12268
418 17:50:43.376842 read SPI 0x45b44 0x1224c: 22775 us, 3263 KB/s, 26.104 Mbps
419 17:50:43.376902 ddr_geometry: 1, config: 0x0
420 17:50:43.376961 header.status = 0x0
421 17:50:43.377020 header.magic = 0x44524d4b (expected: 0x44524d4b)
422 17:50:43.377079 header.version = 0x5 (expected: 0x5)
423 17:50:43.377138 header.size = 0x8f0 (expected: 0x8f0)
424 17:50:43.377197 header.config = 0x0
425 17:50:43.377256 header.flags = 0x0
426 17:50:43.377314 header.checksum = 0x0
427 17:50:43.377569 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
428 17:50:43.377686 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
429 17:50:43.377806 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
430 17:50:43.377910 ddr_geometry:1
431 17:50:43.377999 [EMI] new MDL number = 1
432 17:50:43.378061 dram_cbt_mode_extern: 0
433 17:50:43.378122 dram_cbt_mode [RK0]: 0, [RK1]: 0
434 17:50:43.378182 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
435 17:50:43.378242
436 17:50:43.378301
437 17:50:43.378360 [Bianco] ETT version 0.0.0.1
438 17:50:43.378419 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
439 17:50:43.378479
440 17:50:43.378537 vSetVcoreByFreq with vcore:762500, freq=1600
441 17:50:43.378599
442 17:50:43.378658 [DramcInit]
443 17:50:43.378717 AutoRefreshCKEOff AutoREF OFF
444 17:50:43.378776 DDRPhyPLLSetting-CKEOFF
445 17:50:43.378835 DDRPhyPLLSetting-CKEON
446 17:50:43.378894
447 17:50:43.378953 Enable WDQS
448 17:50:43.379012 [ModeRegInit_LP4] CH0 RK0
449 17:50:43.379071 Write Rank0 MR13 =0x18
450 17:50:43.379130 Write Rank0 MR12 =0x5d
451 17:50:43.379189 Write Rank0 MR1 =0x56
452 17:50:43.379247 Write Rank0 MR2 =0x1a
453 17:50:43.379305 Write Rank0 MR11 =0x0
454 17:50:43.379364 Write Rank0 MR22 =0x38
455 17:50:43.379433 Write Rank0 MR14 =0x5d
456 17:50:43.379493 Write Rank0 MR3 =0x30
457 17:50:43.379552 Write Rank0 MR13 =0x58
458 17:50:43.379611 Write Rank0 MR12 =0x5d
459 17:50:43.379670 Write Rank0 MR1 =0x56
460 17:50:43.379728 Write Rank0 MR2 =0x2d
461 17:50:43.379786 Write Rank0 MR11 =0x23
462 17:50:43.379845 Write Rank0 MR22 =0x34
463 17:50:43.379903 Write Rank0 MR14 =0x10
464 17:50:43.379962 Write Rank0 MR3 =0x30
465 17:50:43.380020 Write Rank0 MR13 =0xd8
466 17:50:43.380082 [ModeRegInit_LP4] CH0 RK1
467 17:50:43.380141 Write Rank1 MR13 =0x18
468 17:50:43.380199 Write Rank1 MR12 =0x5d
469 17:50:43.380258 Write Rank1 MR1 =0x56
470 17:50:43.380316 Write Rank1 MR2 =0x1a
471 17:50:43.380375 Write Rank1 MR11 =0x0
472 17:50:43.380433 Write Rank1 MR22 =0x38
473 17:50:43.380491 Write Rank1 MR14 =0x5d
474 17:50:43.380550 Write Rank1 MR3 =0x30
475 17:50:43.380609 Write Rank1 MR13 =0x58
476 17:50:43.380667 Write Rank1 MR12 =0x5d
477 17:50:43.380726 Write Rank1 MR1 =0x56
478 17:50:43.380785 Write Rank1 MR2 =0x2d
479 17:50:43.380843 Write Rank1 MR11 =0x23
480 17:50:43.380902 Write Rank1 MR22 =0x34
481 17:50:43.380960 Write Rank1 MR14 =0x10
482 17:50:43.381019 Write Rank1 MR3 =0x30
483 17:50:43.381078 Write Rank1 MR13 =0xd8
484 17:50:43.381137 [ModeRegInit_LP4] CH1 RK0
485 17:50:43.381195 Write Rank0 MR13 =0x18
486 17:50:43.381255 Write Rank0 MR12 =0x5d
487 17:50:43.381313 Write Rank0 MR1 =0x56
488 17:50:43.381372 Write Rank0 MR2 =0x1a
489 17:50:43.381430 Write Rank0 MR11 =0x0
490 17:50:43.381489 Write Rank0 MR22 =0x38
491 17:50:43.381547 Write Rank0 MR14 =0x5d
492 17:50:43.381605 Write Rank0 MR3 =0x30
493 17:50:43.381664 Write Rank0 MR13 =0x58
494 17:50:43.381722 Write Rank0 MR12 =0x5d
495 17:50:43.381781 Write Rank0 MR1 =0x56
496 17:50:43.381839 Write Rank0 MR2 =0x2d
497 17:50:43.381897 Write Rank0 MR11 =0x23
498 17:50:43.381956 Write Rank0 MR22 =0x34
499 17:50:43.382014 Write Rank0 MR14 =0x10
500 17:50:43.382073 Write Rank0 MR3 =0x30
501 17:50:43.382131 Write Rank0 MR13 =0xd8
502 17:50:43.382190 [ModeRegInit_LP4] CH1 RK1
503 17:50:43.382248 Write Rank1 MR13 =0x18
504 17:50:43.382306 Write Rank1 MR12 =0x5d
505 17:50:43.382364 Write Rank1 MR1 =0x56
506 17:50:43.382423 Write Rank1 MR2 =0x1a
507 17:50:43.382481 Write Rank1 MR11 =0x0
508 17:50:43.382540 Write Rank1 MR22 =0x38
509 17:50:43.382598 Write Rank1 MR14 =0x5d
510 17:50:43.382657 Write Rank1 MR3 =0x30
511 17:50:43.382715 Write Rank1 MR13 =0x58
512 17:50:43.382774 Write Rank1 MR12 =0x5d
513 17:50:43.382833 Write Rank1 MR1 =0x56
514 17:50:43.382891 Write Rank1 MR2 =0x2d
515 17:50:43.382950 Write Rank1 MR11 =0x23
516 17:50:43.383009 Write Rank1 MR22 =0x34
517 17:50:43.383068 Write Rank1 MR14 =0x10
518 17:50:43.383127 Write Rank1 MR3 =0x30
519 17:50:43.383185 Write Rank1 MR13 =0xd8
520 17:50:43.383243 match AC timing 3
521 17:50:43.383302 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
522 17:50:43.383363 [MiockJmeterHQA]
523 17:50:43.383431 vSetVcoreByFreq with vcore:762500, freq=1600
524 17:50:43.383493
525 17:50:43.383552 MIOCK jitter meter ch=0
526 17:50:43.383612
527 17:50:43.383671 1T = (102-17) = 85 dly cells
528 17:50:43.383732 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
529 17:50:43.383792 vSetVcoreByFreq with vcore:725000, freq=1200
530 17:50:43.383852
531 17:50:43.383911 MIOCK jitter meter ch=0
532 17:50:43.383969
533 17:50:43.384029 1T = (97-17) = 80 dly cells
534 17:50:43.384090 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
535 17:50:43.384151 vSetVcoreByFreq with vcore:725000, freq=800
536 17:50:43.384210
537 17:50:43.384270 MIOCK jitter meter ch=0
538 17:50:43.384330
539 17:50:43.384388 1T = (97-17) = 80 dly cells
540 17:50:43.384449 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
541 17:50:43.384508 vSetVcoreByFreq with vcore:762500, freq=1600
542 17:50:43.384567 vSetVcoreByFreq with vcore:762500, freq=1600
543 17:50:43.384625
544 17:50:43.384684 K DRVP
545 17:50:43.384742 1. OCD DRVP=0 CALOUT=0
546 17:50:43.384803 1. OCD DRVP=1 CALOUT=0
547 17:50:43.384863 1. OCD DRVP=2 CALOUT=0
548 17:50:43.384924 1. OCD DRVP=3 CALOUT=0
549 17:50:43.384984 1. OCD DRVP=4 CALOUT=0
550 17:50:43.385044 1. OCD DRVP=5 CALOUT=0
551 17:50:43.385104 1. OCD DRVP=6 CALOUT=0
552 17:50:43.385164 1. OCD DRVP=7 CALOUT=0
553 17:50:43.385224 1. OCD DRVP=8 CALOUT=0
554 17:50:43.385284 1. OCD DRVP=9 CALOUT=1
555 17:50:43.385344
556 17:50:43.385402 1. OCD DRVP calibration OK! DRVP=9
557 17:50:43.385462
558 17:50:43.385521
559 17:50:43.385580
560 17:50:43.385638 K ODTN
561 17:50:43.385697 3. OCD ODTN=0 ,CALOUT=1
562 17:50:43.385760 3. OCD ODTN=1 ,CALOUT=1
563 17:50:43.385820 3. OCD ODTN=2 ,CALOUT=1
564 17:50:43.385880 3. OCD ODTN=3 ,CALOUT=1
565 17:50:43.385940 3. OCD ODTN=4 ,CALOUT=1
566 17:50:43.386000 3. OCD ODTN=5 ,CALOUT=1
567 17:50:43.386060 3. OCD ODTN=6 ,CALOUT=1
568 17:50:43.386120 3. OCD ODTN=7 ,CALOUT=0
569 17:50:43.386180
570 17:50:43.386238 3. OCD ODTN calibration OK! ODTN=7
571 17:50:43.386298
572 17:50:43.386356 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
573 17:50:43.386416 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
574 17:50:43.386475 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
575 17:50:43.386535
576 17:50:43.386594 K DRVP
577 17:50:43.386653 1. OCD DRVP=0 CALOUT=0
578 17:50:43.386714 1. OCD DRVP=1 CALOUT=0
579 17:50:43.386774 1. OCD DRVP=2 CALOUT=0
580 17:50:43.386835 1. OCD DRVP=3 CALOUT=0
581 17:50:43.386895 1. OCD DRVP=4 CALOUT=0
582 17:50:43.386955 1. OCD DRVP=5 CALOUT=0
583 17:50:43.387016 1. OCD DRVP=6 CALOUT=0
584 17:50:43.387076 1. OCD DRVP=7 CALOUT=0
585 17:50:43.387136 1. OCD DRVP=8 CALOUT=0
586 17:50:43.387197 1. OCD DRVP=9 CALOUT=0
587 17:50:43.387257 1. OCD DRVP=10 CALOUT=0
588 17:50:43.387317 1. OCD DRVP=11 CALOUT=1
589 17:50:43.387377
590 17:50:43.387446 1. OCD DRVP calibration OK! DRVP=11
591 17:50:43.387507
592 17:50:43.387566
593 17:50:43.387625
594 17:50:43.387684 K ODTN
595 17:50:43.387743 3. OCD ODTN=0 ,CALOUT=1
596 17:50:43.387997 3. OCD ODTN=1 ,CALOUT=1
597 17:50:43.388070 3. OCD ODTN=2 ,CALOUT=1
598 17:50:43.388132 3. OCD ODTN=3 ,CALOUT=1
599 17:50:43.388193 3. OCD ODTN=4 ,CALOUT=1
600 17:50:43.388254 3. OCD ODTN=5 ,CALOUT=1
601 17:50:43.388314 3. OCD ODTN=6 ,CALOUT=1
602 17:50:43.388374 3. OCD ODTN=7 ,CALOUT=1
603 17:50:43.388434 3. OCD ODTN=8 ,CALOUT=1
604 17:50:43.388495 3. OCD ODTN=9 ,CALOUT=1
605 17:50:43.388555 3. OCD ODTN=10 ,CALOUT=1
606 17:50:43.388615 3. OCD ODTN=11 ,CALOUT=1
607 17:50:43.388676 3. OCD ODTN=12 ,CALOUT=1
608 17:50:43.388736 3. OCD ODTN=13 ,CALOUT=1
609 17:50:43.388797 3. OCD ODTN=14 ,CALOUT=1
610 17:50:43.388857 3. OCD ODTN=15 ,CALOUT=0
611 17:50:43.388917
612 17:50:43.388977 3. OCD ODTN calibration OK! ODTN=15
613 17:50:43.389037
614 17:50:43.389096 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
615 17:50:43.389156 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
616 17:50:43.389216 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
617 17:50:43.389275
618 17:50:43.389334 [DramcInit]
619 17:50:43.389394 AutoRefreshCKEOff AutoREF OFF
620 17:50:43.389453 DDRPhyPLLSetting-CKEOFF
621 17:50:43.389512 DDRPhyPLLSetting-CKEON
622 17:50:43.389571
623 17:50:43.389630 Enable WDQS
624 17:50:43.389688 ==
625 17:50:43.389747 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
626 17:50:43.389807 fsp= 1, odt_onoff= 1, Byte mode= 0
627 17:50:43.389866 ==
628 17:50:43.389925 [Duty_Offset_Calibration]
629 17:50:43.389984
630 17:50:43.390042 ===========================
631 17:50:43.390101 B0:1 B1:1 CA:1
632 17:50:43.390159 ==
633 17:50:43.390218 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
634 17:50:43.390277 fsp= 1, odt_onoff= 1, Byte mode= 0
635 17:50:43.390337 ==
636 17:50:43.390396 [Duty_Offset_Calibration]
637 17:50:43.390455
638 17:50:43.390514 ===========================
639 17:50:43.390573 B0:1 B1:0 CA:2
640 17:50:43.390631 [ModeRegInit_LP4] CH0 RK0
641 17:50:43.390690 Write Rank0 MR13 =0x18
642 17:50:43.390749 Write Rank0 MR12 =0x5d
643 17:50:43.390807 Write Rank0 MR1 =0x56
644 17:50:43.390866 Write Rank0 MR2 =0x1a
645 17:50:43.390925 Write Rank0 MR11 =0x0
646 17:50:43.390983 Write Rank0 MR22 =0x38
647 17:50:43.391041 Write Rank0 MR14 =0x5d
648 17:50:43.391100 Write Rank0 MR3 =0x30
649 17:50:43.391162 Write Rank0 MR13 =0x58
650 17:50:43.391257 Write Rank0 MR12 =0x5d
651 17:50:43.391349 Write Rank0 MR1 =0x56
652 17:50:43.391447 Write Rank0 MR2 =0x2d
653 17:50:43.391509 Write Rank0 MR11 =0x23
654 17:50:43.391569 Write Rank0 MR22 =0x34
655 17:50:43.391628 Write Rank0 MR14 =0x10
656 17:50:43.391687 Write Rank0 MR3 =0x30
657 17:50:43.391746 Write Rank0 MR13 =0xd8
658 17:50:43.391805 [ModeRegInit_LP4] CH0 RK1
659 17:50:43.391864 Write Rank1 MR13 =0x18
660 17:50:43.391923 Write Rank1 MR12 =0x5d
661 17:50:43.391981 Write Rank1 MR1 =0x56
662 17:50:43.392040 Write Rank1 MR2 =0x1a
663 17:50:43.392098 Write Rank1 MR11 =0x0
664 17:50:43.392157 Write Rank1 MR22 =0x38
665 17:50:43.392215 Write Rank1 MR14 =0x5d
666 17:50:43.392274 Write Rank1 MR3 =0x30
667 17:50:43.392332 Write Rank1 MR13 =0x58
668 17:50:43.392391 Write Rank1 MR12 =0x5d
669 17:50:43.392450 Write Rank1 MR1 =0x56
670 17:50:43.392509 Write Rank1 MR2 =0x2d
671 17:50:43.392568 Write Rank1 MR11 =0x23
672 17:50:43.392627 Write Rank1 MR22 =0x34
673 17:50:43.392685 Write Rank1 MR14 =0x10
674 17:50:43.392744 Write Rank1 MR3 =0x30
675 17:50:43.392802 Write Rank1 MR13 =0xd8
676 17:50:43.392861 [ModeRegInit_LP4] CH1 RK0
677 17:50:43.392920 Write Rank0 MR13 =0x18
678 17:50:43.392978 Write Rank0 MR12 =0x5d
679 17:50:43.393037 Write Rank0 MR1 =0x56
680 17:50:43.393096 Write Rank0 MR2 =0x1a
681 17:50:43.393154 Write Rank0 MR11 =0x0
682 17:50:43.393213 Write Rank0 MR22 =0x38
683 17:50:43.393271 Write Rank0 MR14 =0x5d
684 17:50:43.393330 Write Rank0 MR3 =0x30
685 17:50:43.393388 Write Rank0 MR13 =0x58
686 17:50:43.393447 Write Rank0 MR12 =0x5d
687 17:50:43.393505 Write Rank0 MR1 =0x56
688 17:50:43.393564 Write Rank0 MR2 =0x2d
689 17:50:43.393622 Write Rank0 MR11 =0x23
690 17:50:43.393682 Write Rank0 MR22 =0x34
691 17:50:43.393740 Write Rank0 MR14 =0x10
692 17:50:43.393799 Write Rank0 MR3 =0x30
693 17:50:43.393858 Write Rank0 MR13 =0xd8
694 17:50:43.393917 [ModeRegInit_LP4] CH1 RK1
695 17:50:43.393976 Write Rank1 MR13 =0x18
696 17:50:43.394035 Write Rank1 MR12 =0x5d
697 17:50:43.394099 Write Rank1 MR1 =0x56
698 17:50:43.394160 Write Rank1 MR2 =0x1a
699 17:50:43.394220 Write Rank1 MR11 =0x0
700 17:50:43.394279 Write Rank1 MR22 =0x38
701 17:50:43.394338 Write Rank1 MR14 =0x5d
702 17:50:43.394397 Write Rank1 MR3 =0x30
703 17:50:43.394457 Write Rank1 MR13 =0x58
704 17:50:43.394516 Write Rank1 MR12 =0x5d
705 17:50:43.394575 Write Rank1 MR1 =0x56
706 17:50:43.394634 Write Rank1 MR2 =0x2d
707 17:50:43.394693 Write Rank1 MR11 =0x23
708 17:50:43.394752 Write Rank1 MR22 =0x34
709 17:50:43.394811 Write Rank1 MR14 =0x10
710 17:50:43.394869 Write Rank1 MR3 =0x30
711 17:50:43.394928 Write Rank1 MR13 =0xd8
712 17:50:43.394986 match AC timing 3
713 17:50:43.395045 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
714 17:50:43.395105 DramC Write-DBI off
715 17:50:43.395164 DramC Read-DBI off
716 17:50:43.395223 Write Rank0 MR13 =0x59
717 17:50:43.395282 ==
718 17:50:43.395341 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
719 17:50:43.395401 fsp= 1, odt_onoff= 1, Byte mode= 0
720 17:50:43.395470 ==
721 17:50:43.395530 === u2Vref_new: 0x56 --> 0x2d
722 17:50:43.395590 === u2Vref_new: 0x58 --> 0x38
723 17:50:43.395649 === u2Vref_new: 0x5a --> 0x39
724 17:50:43.395708 === u2Vref_new: 0x5c --> 0x3c
725 17:50:43.395768 === u2Vref_new: 0x5e --> 0x3d
726 17:50:43.395827 === u2Vref_new: 0x60 --> 0xa0
727 17:50:43.395886 [CA 0] Center 34 (6~63) winsize 58
728 17:50:43.395946 [CA 1] Center 36 (9~63) winsize 55
729 17:50:43.396005 [CA 2] Center 29 (0~59) winsize 60
730 17:50:43.396065 [CA 3] Center 25 (-2~52) winsize 55
731 17:50:43.396124 [CA 4] Center 26 (-2~54) winsize 57
732 17:50:43.396183 [CA 5] Center 30 (0~60) winsize 61
733 17:50:43.396242
734 17:50:43.396300 [CATrainingPosCal] consider 1 rank data
735 17:50:43.396360 u2DelayCellTimex100 = 735/100 ps
736 17:50:43.396419 CA0 delay=34 (6~63),Diff = 9 PI (11 cell)
737 17:50:43.396479 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
738 17:50:43.396539 CA2 delay=29 (0~59),Diff = 4 PI (5 cell)
739 17:50:43.396598 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
740 17:50:43.396658 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
741 17:50:43.396717 CA5 delay=30 (0~60),Diff = 5 PI (6 cell)
742 17:50:43.396776
743 17:50:43.396836 CA PerBit enable=1, Macro0, CA PI delay=25
744 17:50:43.396895 === u2Vref_new: 0x60 --> 0xa0
745 17:50:43.396955
746 17:50:43.397014 Vref(ca) range 1: 32
747 17:50:43.397073
748 17:50:43.397132 CS Dly= 10 (41-0-32)
749 17:50:43.397191 Write Rank0 MR13 =0xd8
750 17:50:43.397250 Write Rank0 MR13 =0xd8
751 17:50:43.397310 Write Rank0 MR12 =0x60
752 17:50:43.397368 Write Rank1 MR13 =0x59
753 17:50:43.397426 ==
754 17:50:43.397485 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
755 17:50:43.397764 fsp= 1, odt_onoff= 1, Byte mode= 0
756 17:50:43.397874 ==
757 17:50:43.397996 === u2Vref_new: 0x56 --> 0x2d
758 17:50:43.398117 === u2Vref_new: 0x58 --> 0x38
759 17:50:43.398238 === u2Vref_new: 0x5a --> 0x39
760 17:50:43.398342 === u2Vref_new: 0x5c --> 0x3c
761 17:50:43.398439 === u2Vref_new: 0x5e --> 0x3d
762 17:50:43.398533 === u2Vref_new: 0x60 --> 0xa0
763 17:50:43.398627 [CA 0] Center 35 (8~63) winsize 56
764 17:50:43.398720 [CA 1] Center 36 (9~63) winsize 55
765 17:50:43.398814 [CA 2] Center 31 (3~60) winsize 58
766 17:50:43.398907 [CA 3] Center 26 (-2~54) winsize 57
767 17:50:43.399000 [CA 4] Center 26 (-2~55) winsize 58
768 17:50:43.399093 [CA 5] Center 32 (3~61) winsize 59
769 17:50:43.399185
770 17:50:43.399278 [CATrainingPosCal] consider 2 rank data
771 17:50:43.399371 u2DelayCellTimex100 = 735/100 ps
772 17:50:43.399456 CA0 delay=35 (8~63),Diff = 10 PI (13 cell)
773 17:50:43.399518 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
774 17:50:43.399577 CA2 delay=31 (3~59),Diff = 6 PI (7 cell)
775 17:50:43.399638 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
776 17:50:43.399698 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
777 17:50:43.399757 CA5 delay=31 (3~60),Diff = 6 PI (7 cell)
778 17:50:43.399817
779 17:50:43.399876 CA PerBit enable=1, Macro0, CA PI delay=25
780 17:50:43.399936 === u2Vref_new: 0x60 --> 0xa0
781 17:50:43.399995
782 17:50:43.400055 Vref(ca) range 1: 32
783 17:50:43.400114
784 17:50:43.400173 CS Dly= 8 (39-0-32)
785 17:50:43.400232 Write Rank1 MR13 =0xd8
786 17:50:43.400290 Write Rank1 MR13 =0xd8
787 17:50:43.400361 Write Rank1 MR12 =0x60
788 17:50:43.400427 [RankSwap] Rank num 2, (Multi 1), Rank 0
789 17:50:43.400489 Write Rank0 MR2 =0xad
790 17:50:43.400555 [Write Leveling]
791 17:50:43.400615 delay byte0 byte1 byte2 byte3
792 17:50:43.400675
793 17:50:43.400733 10 0 0
794 17:50:43.400794 11 0 0
795 17:50:43.400853 12 0 0
796 17:50:43.400914 13 0 0
797 17:50:43.400974 14 0 0
798 17:50:43.401035 15 0 0
799 17:50:43.401095 16 0 0
800 17:50:43.401154 17 0 0
801 17:50:43.401221 18 0 0
802 17:50:43.401281 19 0 0
803 17:50:43.401341 20 0 0
804 17:50:43.401401 21 0 0
805 17:50:43.401461 22 0 0
806 17:50:43.401521 23 0 0
807 17:50:43.401581 24 0 ff
808 17:50:43.401641 25 0 ff
809 17:50:43.401701 26 0 ff
810 17:50:43.401762 27 0 ff
811 17:50:43.401822 28 0 ff
812 17:50:43.401882 29 0 ff
813 17:50:43.401942 30 0 ff
814 17:50:43.402001 31 0 ff
815 17:50:43.402060 32 0 ff
816 17:50:43.402120 33 ff ff
817 17:50:43.402180 34 ff ff
818 17:50:43.402240 35 ff ff
819 17:50:43.402300 36 ff ff
820 17:50:43.402360 37 ff ff
821 17:50:43.402420 38 ff ff
822 17:50:43.402480 39 ff ff
823 17:50:43.402540 pass bytecount = 0xff (0xff: all bytes pass)
824 17:50:43.402600
825 17:50:43.402659 DQS0 dly: 33
826 17:50:43.402718 DQS1 dly: 24
827 17:50:43.402777 Write Rank0 MR2 =0x2d
828 17:50:43.402835 [RankSwap] Rank num 2, (Multi 1), Rank 0
829 17:50:43.402895 Write Rank0 MR1 =0xd6
830 17:50:43.402953 [Gating]
831 17:50:43.403012 ==
832 17:50:43.403071 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
833 17:50:43.403131 fsp= 1, odt_onoff= 1, Byte mode= 0
834 17:50:43.403190 ==
835 17:50:43.403249 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
836 17:50:43.403310 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
837 17:50:43.403370 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
838 17:50:43.403442 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
839 17:50:43.403504 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
840 17:50:43.403565 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
841 17:50:43.403625 3 1 24 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
842 17:50:43.403686 3 1 28 |504 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
843 17:50:43.403746 3 2 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
844 17:50:43.403806 3 2 4 |3534 c0c |(11 11)(11 11) |(0 0)(1 1)| 0
845 17:50:43.403867 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
846 17:50:43.403927 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
847 17:50:43.403989 3 2 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
848 17:50:43.404049 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
849 17:50:43.404113 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
850 17:50:43.404176 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
851 17:50:43.404236 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
852 17:50:43.404295 3 3 4 |3534 403 |(11 11)(11 11) |(0 0)(1 1)| 0
853 17:50:43.404355 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
854 17:50:43.404416 [Byte 1] Lead/lag falling Transition (3, 3, 8)
855 17:50:43.404475 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
856 17:50:43.404536 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
857 17:50:43.404596 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
858 17:50:43.404656 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
859 17:50:43.404717 3 3 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
860 17:50:43.404777 3 4 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
861 17:50:43.404837 3 4 4 |3d3d 706 |(11 11)(11 11) |(1 1)(1 1)| 0
862 17:50:43.404898 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 17:50:43.404958 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 17:50:43.405017 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 17:50:43.405078 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 17:50:43.405138 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 17:50:43.405198 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 17:50:43.405258 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 17:50:43.405319 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 17:50:43.405379 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
871 17:50:43.405439 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
872 17:50:43.405499 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
873 17:50:43.405560 [Byte 0] Lead/lag falling Transition (3, 5, 16)
874 17:50:43.405619 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
875 17:50:43.405680 [Byte 0] Lead/lag Transition tap number (2)
876 17:50:43.405739 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
877 17:50:43.405800 [Byte 1] Lead/lag falling Transition (3, 5, 24)
878 17:50:43.405860 3 5 28 |808 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
879 17:50:43.406120 3 6 0 |4646 3333 |(0 0)(11 11) |(0 0)(1 0)| 0
880 17:50:43.406226 [Byte 0]First pass (3, 6, 0)
881 17:50:43.406348 [Byte 1] Lead/lag Transition tap number (3)
882 17:50:43.406469 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
883 17:50:43.406593 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 17:50:43.406706 [Byte 1]First pass (3, 6, 8)
885 17:50:43.406805 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 17:50:43.406902 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 17:50:43.406983 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 17:50:43.407046 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 17:50:43.407108 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
890 17:50:43.407169 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
891 17:50:43.407230 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
892 17:50:43.407290 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
893 17:50:43.407351 All bytes gating window > 1UI, Early break!
894 17:50:43.407425
895 17:50:43.407525 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
896 17:50:43.407614
897 17:50:43.407699 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
898 17:50:43.407761
899 17:50:43.407820
900 17:50:43.407884
901 17:50:43.407945 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
902 17:50:43.408005
903 17:50:43.408064 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
904 17:50:43.408123
905 17:50:43.408182
906 17:50:43.408241 Write Rank0 MR1 =0x56
907 17:50:43.408300
908 17:50:43.408366 best RODT dly(2T, 0.5T) = (2, 2)
909 17:50:43.408426
910 17:50:43.408485 best RODT dly(2T, 0.5T) = (2, 2)
911 17:50:43.408545 ==
912 17:50:43.408604 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
913 17:50:43.408663 fsp= 1, odt_onoff= 1, Byte mode= 0
914 17:50:43.408723 ==
915 17:50:43.408787 Start DQ dly to find pass range UseTestEngine =0
916 17:50:43.408849 x-axis: bit #, y-axis: DQ dly (-127~63)
917 17:50:43.408909 RX Vref Scan = 0
918 17:50:43.408968 -26, [0] xxxxxxxx xxxxxxxx [MSB]
919 17:50:43.409029 -25, [0] xxxxxxxx xxxxxxxx [MSB]
920 17:50:43.409090 -24, [0] xxxxxxxx xxxxxxxx [MSB]
921 17:50:43.409150 -23, [0] xxxxxxxx xxxxxxxx [MSB]
922 17:50:43.409211 -22, [0] xxxxxxxx xxxxxxxx [MSB]
923 17:50:43.409300 -21, [0] xxxxxxxx xxxxxxxx [MSB]
924 17:50:43.409397 -20, [0] xxxxxxxx xxxxxxxx [MSB]
925 17:50:43.409485 -19, [0] xxxxxxxx xxxxxxxx [MSB]
926 17:50:43.409564 -18, [0] xxxxxxxx xxxxxxxx [MSB]
927 17:50:43.409627 -17, [0] xxxxxxxx xxxxxxxx [MSB]
928 17:50:43.409692 -16, [0] xxxxxxxx xxxxxxxx [MSB]
929 17:50:43.409755 -15, [0] xxxxxxxx xxxxxxxx [MSB]
930 17:50:43.409816 -14, [0] xxxxxxxx xxxxxxxx [MSB]
931 17:50:43.409876 -13, [0] xxxxxxxx xxxxxxxx [MSB]
932 17:50:43.409937 -12, [0] xxxxxxxx xxxxxxxx [MSB]
933 17:50:43.409998 -11, [0] xxxxxxxx xxxxxxxx [MSB]
934 17:50:43.410058 -10, [0] xxxxxxxx xxxxxxxx [MSB]
935 17:50:43.410119 -9, [0] xxxxxxxx xxxxxxxx [MSB]
936 17:50:43.410187 -8, [0] xxxxxxxx xxxxxxxx [MSB]
937 17:50:43.410248 -7, [0] xxxxxxxx xxxxxxxx [MSB]
938 17:50:43.410308 -6, [0] xxxxxxxx xxxxxxxx [MSB]
939 17:50:43.410369 -5, [0] xxxxxxxx xxxxxxxx [MSB]
940 17:50:43.410430 -4, [0] xxxxxxxx xxxxxxxx [MSB]
941 17:50:43.410494 -3, [0] xxxxxxxx xxxxxxxx [MSB]
942 17:50:43.410555 -2, [0] xxxoxxxx oxxxxxxx [MSB]
943 17:50:43.410623 -1, [0] xxxoxxxx oxxxxxxx [MSB]
944 17:50:43.410685 0, [0] xxxoxoxx ooxoxoxx [MSB]
945 17:50:43.410746 1, [0] xxxoxoox ooxoxoxx [MSB]
946 17:50:43.410808 2, [0] xxxoxoox ooxoooxx [MSB]
947 17:50:43.410868 3, [0] xxxoxoox ooxoooxx [MSB]
948 17:50:43.410928 4, [0] xoooxooo ooxooooo [MSB]
949 17:50:43.410988 5, [0] xooooooo ooxooooo [MSB]
950 17:50:43.411048 6, [0] oooooooo ooxooooo [MSB]
951 17:50:43.411151 7, [0] oooooooo ooxooooo [MSB]
952 17:50:43.411242 32, [0] oooxoooo oooooooo [MSB]
953 17:50:43.411331 33, [0] oooxoooo xooooooo [MSB]
954 17:50:43.411432 34, [0] oooxoooo xooooooo [MSB]
955 17:50:43.411496 35, [0] oooxoooo xooooooo [MSB]
956 17:50:43.411584 36, [0] oooxoxoo xooxoooo [MSB]
957 17:50:43.411680 37, [0] oooxoxxx xxoxxooo [MSB]
958 17:50:43.411776 38, [0] oooxoxxx xxoxxoxo [MSB]
959 17:50:43.411871 39, [0] oooxxxxx xxoxxxxo [MSB]
960 17:50:43.411967 40, [0] xooxxxxx xxoxxxxo [MSB]
961 17:50:43.412041 41, [0] xxxxxxxx xxoxxxxo [MSB]
962 17:50:43.412103 42, [0] xxxxxxxx xxoxxxxx [MSB]
963 17:50:43.412163 43, [0] xxxxxxxx xxoxxxxx [MSB]
964 17:50:43.412223 44, [0] xxxxxxxx xxxxxxxx [MSB]
965 17:50:43.412283 iDelay=44, Bit 0, Center 22 (6 ~ 39) 34
966 17:50:43.412342 iDelay=44, Bit 1, Center 22 (4 ~ 40) 37
967 17:50:43.412402 iDelay=44, Bit 2, Center 22 (4 ~ 40) 37
968 17:50:43.412473 iDelay=44, Bit 3, Center 14 (-2 ~ 31) 34
969 17:50:43.412568 iDelay=44, Bit 4, Center 21 (5 ~ 38) 34
970 17:50:43.412662 iDelay=44, Bit 5, Center 17 (0 ~ 35) 36
971 17:50:43.412725 iDelay=44, Bit 6, Center 18 (1 ~ 36) 36
972 17:50:43.412785 iDelay=44, Bit 7, Center 20 (4 ~ 36) 33
973 17:50:43.412845 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
974 17:50:43.412905 iDelay=44, Bit 9, Center 18 (0 ~ 36) 37
975 17:50:43.413006 iDelay=44, Bit 10, Center 25 (8 ~ 43) 36
976 17:50:43.413094 iDelay=44, Bit 11, Center 17 (0 ~ 35) 36
977 17:50:43.413182 iDelay=44, Bit 12, Center 19 (2 ~ 36) 35
978 17:50:43.413243 iDelay=44, Bit 13, Center 19 (0 ~ 38) 39
979 17:50:43.413303 iDelay=44, Bit 14, Center 20 (4 ~ 37) 34
980 17:50:43.413365 iDelay=44, Bit 15, Center 22 (4 ~ 41) 38
981 17:50:43.413428 ==
982 17:50:43.413488 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
983 17:50:43.413549 fsp= 1, odt_onoff= 1, Byte mode= 0
984 17:50:43.413608 ==
985 17:50:43.413668 DQS Delay:
986 17:50:43.413727 DQS0 = 0, DQS1 = 0
987 17:50:43.413787 DQM Delay:
988 17:50:43.413852 DQM0 = 19, DQM1 = 19
989 17:50:43.413912 DQ Delay:
990 17:50:43.413972 DQ0 =22, DQ1 =22, DQ2 =22, DQ3 =14
991 17:50:43.414031 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
992 17:50:43.414090 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =17
993 17:50:43.414149 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =22
994 17:50:43.414209
995 17:50:43.414267
996 17:50:43.414334 DramC Write-DBI off
997 17:50:43.414393 ==
998 17:50:43.414453 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
999 17:50:43.414512 fsp= 1, odt_onoff= 1, Byte mode= 0
1000 17:50:43.414575 ==
1001 17:50:43.414640 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1002 17:50:43.414700
1003 17:50:43.414772 Begin, DQ Scan Range 920~1176
1004 17:50:43.414867
1005 17:50:43.414953
1006 17:50:43.415035 TX Vref Scan disable
1007 17:50:43.415096 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1008 17:50:43.415158 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1009 17:50:43.415219 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1010 17:50:43.415319 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1011 17:50:43.415625 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1012 17:50:43.415731 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1013 17:50:43.415832 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1014 17:50:43.415928 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1015 17:50:43.416024 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1016 17:50:43.416120 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1017 17:50:43.416216 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1018 17:50:43.416312 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1019 17:50:43.416379 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1020 17:50:43.416442 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1021 17:50:43.416503 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1022 17:50:43.416564 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1023 17:50:43.416625 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1024 17:50:43.416687 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1025 17:50:43.416770 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1026 17:50:43.416876 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1027 17:50:43.416969 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1028 17:50:43.417055 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1029 17:50:43.417117 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1030 17:50:43.417178 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1031 17:50:43.417246 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1032 17:50:43.417308 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1033 17:50:43.417368 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1034 17:50:43.417428 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1035 17:50:43.417488 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1036 17:50:43.417547 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1037 17:50:43.417607 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1038 17:50:43.417672 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1039 17:50:43.417734 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1040 17:50:43.417795 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1041 17:50:43.417854 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1042 17:50:43.417915 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1043 17:50:43.417974 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1044 17:50:43.418034 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1045 17:50:43.418098 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1046 17:50:43.418161 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1047 17:50:43.418220 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1048 17:50:43.418280 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1049 17:50:43.418340 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1050 17:50:43.418399 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1051 17:50:43.418458 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1052 17:50:43.418519 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1053 17:50:43.418622 966 |3 6 6|[0] xxxxxxxx oxxxxxxx [MSB]
1054 17:50:43.418713 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1055 17:50:43.418801 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1056 17:50:43.418867 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1057 17:50:43.418927 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1058 17:50:43.418988 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1059 17:50:43.419058 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1060 17:50:43.419119 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1061 17:50:43.419179 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1062 17:50:43.419239 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1063 17:50:43.419299 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1064 17:50:43.419360 977 |3 6 17|[0] xoooooox oooooooo [MSB]
1065 17:50:43.419430 985 |3 6 25|[0] oooooooo xooooooo [MSB]
1066 17:50:43.419497 986 |3 6 26|[0] oooooooo xooooooo [MSB]
1067 17:50:43.419559 987 |3 6 27|[0] oooooooo xooxoooo [MSB]
1068 17:50:43.419622 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1069 17:50:43.419682 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1070 17:50:43.419743 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1071 17:50:43.419802 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1072 17:50:43.419863 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1073 17:50:43.419927 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1074 17:50:43.419989 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1075 17:50:43.420049 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1076 17:50:43.420110 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1077 17:50:43.420170 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1078 17:50:43.420229 998 |3 6 38|[0] oooxoxxx xxxxxxxx [MSB]
1079 17:50:43.420289 999 |3 6 39|[0] oxxxxxxx xxxxxxxx [MSB]
1080 17:50:43.420349 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1081 17:50:43.420409 Byte0, DQ PI dly=986, DQM PI dly= 986
1082 17:50:43.420487 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1083 17:50:43.420585
1084 17:50:43.420670 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1085 17:50:43.420750
1086 17:50:43.420811 Byte1, DQ PI dly=977, DQM PI dly= 977
1087 17:50:43.420870 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
1088 17:50:43.420930
1089 17:50:43.420994 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
1090 17:50:43.421056
1091 17:50:43.421115 ==
1092 17:50:43.421174 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1093 17:50:43.421235 fsp= 1, odt_onoff= 1, Byte mode= 0
1094 17:50:43.421294 ==
1095 17:50:43.421354 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1096 17:50:43.421413
1097 17:50:43.421472 Begin, DQ Scan Range 953~1017
1098 17:50:43.421539 Write Rank0 MR14 =0x0
1099 17:50:43.421598
1100 17:50:43.421657 CH=0, VrefRange= 0, VrefLevel = 0
1101 17:50:43.421716 TX Bit0 (980~994) 15 987, Bit8 (968~978) 11 973,
1102 17:50:43.421776 TX Bit1 (978~993) 16 985, Bit9 (969~984) 16 976,
1103 17:50:43.421835 TX Bit2 (979~994) 16 986, Bit10 (975~987) 13 981,
1104 17:50:43.421895 TX Bit3 (976~987) 12 981, Bit11 (968~982) 15 975,
1105 17:50:43.421954 TX Bit4 (979~992) 14 985, Bit12 (971~983) 13 977,
1106 17:50:43.422020 TX Bit5 (977~991) 15 984, Bit13 (970~983) 14 976,
1107 17:50:43.422080 TX Bit6 (978~991) 14 984, Bit14 (969~984) 16 976,
1108 17:50:43.422139 TX Bit7 (980~992) 13 986, Bit15 (975~986) 12 980,
1109 17:50:43.422198
1110 17:50:43.422257 Write Rank0 MR14 =0x2
1111 17:50:43.422316
1112 17:50:43.422375 CH=0, VrefRange= 0, VrefLevel = 2
1113 17:50:43.422435 TX Bit0 (980~995) 16 987, Bit8 (967~979) 13 973,
1114 17:50:43.422494 TX Bit1 (978~993) 16 985, Bit9 (969~984) 16 976,
1115 17:50:43.422587 TX Bit2 (980~995) 16 987, Bit10 (975~988) 14 981,
1116 17:50:43.422676 TX Bit3 (976~988) 13 982, Bit11 (968~982) 15 975,
1117 17:50:43.422963 TX Bit4 (979~993) 15 986, Bit12 (970~984) 15 977,
1118 17:50:43.423031 TX Bit5 (977~992) 16 984, Bit13 (969~984) 16 976,
1119 17:50:43.423091 TX Bit6 (978~992) 15 985, Bit14 (969~985) 17 977,
1120 17:50:43.423150 TX Bit7 (979~993) 15 986, Bit15 (974~986) 13 980,
1121 17:50:43.423209
1122 17:50:43.423295 Write Rank0 MR14 =0x4
1123 17:50:43.423388
1124 17:50:43.423465 CH=0, VrefRange= 0, VrefLevel = 4
1125 17:50:43.423526 TX Bit0 (979~996) 18 987, Bit8 (967~981) 15 974,
1126 17:50:43.423587 TX Bit1 (978~994) 17 986, Bit9 (969~984) 16 976,
1127 17:50:43.423647 TX Bit2 (980~995) 16 987, Bit10 (974~989) 16 981,
1128 17:50:43.423706 TX Bit3 (975~990) 16 982, Bit11 (968~983) 16 975,
1129 17:50:43.423766 TX Bit4 (978~993) 16 985, Bit12 (970~984) 15 977,
1130 17:50:43.423825 TX Bit5 (977~992) 16 984, Bit13 (969~984) 16 976,
1131 17:50:43.423883 TX Bit6 (977~992) 16 984, Bit14 (969~985) 17 977,
1132 17:50:43.423942 TX Bit7 (978~993) 16 985, Bit15 (974~988) 15 981,
1133 17:50:43.424001
1134 17:50:43.424060 Write Rank0 MR14 =0x6
1135 17:50:43.424118
1136 17:50:43.424176 CH=0, VrefRange= 0, VrefLevel = 6
1137 17:50:43.424240 TX Bit0 (979~997) 19 988, Bit8 (967~982) 16 974,
1138 17:50:43.424303 TX Bit1 (978~995) 18 986, Bit9 (968~985) 18 976,
1139 17:50:43.424362 TX Bit2 (979~996) 18 987, Bit10 (974~990) 17 982,
1140 17:50:43.424422 TX Bit3 (975~990) 16 982, Bit11 (968~983) 16 975,
1141 17:50:43.424482 TX Bit4 (978~994) 17 986, Bit12 (969~985) 17 977,
1142 17:50:43.424541 TX Bit5 (976~993) 18 984, Bit13 (969~985) 17 977,
1143 17:50:43.424600 TX Bit6 (977~993) 17 985, Bit14 (968~986) 19 977,
1144 17:50:43.424659 TX Bit7 (978~993) 16 985, Bit15 (973~989) 17 981,
1145 17:50:43.424723
1146 17:50:43.424784 Write Rank0 MR14 =0x8
1147 17:50:43.424843
1148 17:50:43.424901 CH=0, VrefRange= 0, VrefLevel = 8
1149 17:50:43.424960 TX Bit0 (978~997) 20 987, Bit8 (967~982) 16 974,
1150 17:50:43.425019 TX Bit1 (977~996) 20 986, Bit9 (968~985) 18 976,
1151 17:50:43.425079 TX Bit2 (979~997) 19 988, Bit10 (974~990) 17 982,
1152 17:50:43.425138 TX Bit3 (975~991) 17 983, Bit11 (967~984) 18 975,
1153 17:50:43.425202 TX Bit4 (978~994) 17 986, Bit12 (969~985) 17 977,
1154 17:50:43.425305 TX Bit5 (976~993) 18 984, Bit13 (969~985) 17 977,
1155 17:50:43.425394 TX Bit6 (977~993) 17 985, Bit14 (969~986) 18 977,
1156 17:50:43.425482 TX Bit7 (978~994) 17 986, Bit15 (973~990) 18 981,
1157 17:50:43.425543
1158 17:50:43.425602 Write Rank0 MR14 =0xa
1159 17:50:43.425666
1160 17:50:43.425726 CH=0, VrefRange= 0, VrefLevel = 10
1161 17:50:43.425786 TX Bit0 (979~998) 20 988, Bit8 (966~983) 18 974,
1162 17:50:43.425846 TX Bit1 (977~996) 20 986, Bit9 (968~986) 19 977,
1163 17:50:43.425904 TX Bit2 (978~998) 21 988, Bit10 (973~990) 18 981,
1164 17:50:43.425964 TX Bit3 (974~991) 18 982, Bit11 (967~984) 18 975,
1165 17:50:43.426022 TX Bit4 (978~995) 18 986, Bit12 (969~985) 17 977,
1166 17:50:43.426082 TX Bit5 (976~994) 19 985, Bit13 (969~986) 18 977,
1167 17:50:43.426141 TX Bit6 (977~994) 18 985, Bit14 (968~987) 20 977,
1168 17:50:43.426208 TX Bit7 (978~995) 18 986, Bit15 (973~990) 18 981,
1169 17:50:43.426268
1170 17:50:43.426327 Write Rank0 MR14 =0xc
1171 17:50:43.426385
1172 17:50:43.426445 CH=0, VrefRange= 0, VrefLevel = 12
1173 17:50:43.426504 TX Bit0 (979~999) 21 989, Bit8 (966~983) 18 974,
1174 17:50:43.426563 TX Bit1 (977~996) 20 986, Bit9 (968~987) 20 977,
1175 17:50:43.426622 TX Bit2 (978~999) 22 988, Bit10 (973~991) 19 982,
1176 17:50:43.426689 TX Bit3 (973~992) 20 982, Bit11 (967~985) 19 976,
1177 17:50:43.426749 TX Bit4 (977~996) 20 986, Bit12 (969~987) 19 978,
1178 17:50:43.426809 TX Bit5 (976~994) 19 985, Bit13 (969~987) 19 978,
1179 17:50:43.426868 TX Bit6 (977~995) 19 986, Bit14 (968~988) 21 978,
1180 17:50:43.426927 TX Bit7 (978~995) 18 986, Bit15 (973~990) 18 981,
1181 17:50:43.426986
1182 17:50:43.427045 Write Rank0 MR14 =0xe
1183 17:50:43.427104
1184 17:50:43.427203 CH=0, VrefRange= 0, VrefLevel = 14
1185 17:50:43.427292 TX Bit0 (978~999) 22 988, Bit8 (966~984) 19 975,
1186 17:50:43.427379 TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977,
1187 17:50:43.427461 TX Bit2 (977~999) 23 988, Bit10 (972~991) 20 981,
1188 17:50:43.427522 TX Bit3 (973~992) 20 982, Bit11 (967~985) 19 976,
1189 17:50:43.427585 TX Bit4 (977~996) 20 986, Bit12 (968~987) 20 977,
1190 17:50:43.427646 TX Bit5 (976~994) 19 985, Bit13 (968~987) 20 977,
1191 17:50:43.427706 TX Bit6 (976~995) 20 985, Bit14 (968~988) 21 978,
1192 17:50:43.427765 TX Bit7 (977~996) 20 986, Bit15 (971~990) 20 980,
1193 17:50:43.427824
1194 17:50:43.427883 Write Rank0 MR14 =0x10
1195 17:50:43.427942
1196 17:50:43.428001 CH=0, VrefRange= 0, VrefLevel = 16
1197 17:50:43.428068 TX Bit0 (978~999) 22 988, Bit8 (966~984) 19 975,
1198 17:50:43.428128 TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977,
1199 17:50:43.428188 TX Bit2 (978~999) 22 988, Bit10 (972~992) 21 982,
1200 17:50:43.428247 TX Bit3 (973~992) 20 982, Bit11 (967~986) 20 976,
1201 17:50:43.428306 TX Bit4 (977~997) 21 987, Bit12 (968~987) 20 977,
1202 17:50:43.428365 TX Bit5 (975~995) 21 985, Bit13 (968~987) 20 977,
1203 17:50:43.428424 TX Bit6 (976~996) 21 986, Bit14 (968~989) 22 978,
1204 17:50:43.428483 TX Bit7 (977~997) 21 987, Bit15 (971~991) 21 981,
1205 17:50:43.428548
1206 17:50:43.428607 Write Rank0 MR14 =0x12
1207 17:50:43.428667
1208 17:50:43.428725 CH=0, VrefRange= 0, VrefLevel = 18
1209 17:50:43.428784 TX Bit0 (977~1000) 24 988, Bit8 (965~985) 21 975,
1210 17:50:43.428843 TX Bit1 (977~999) 23 988, Bit9 (967~988) 22 977,
1211 17:50:43.428903 TX Bit2 (978~999) 22 988, Bit10 (971~992) 22 981,
1212 17:50:43.428962 TX Bit3 (972~993) 22 982, Bit11 (966~986) 21 976,
1213 17:50:43.429022 TX Bit4 (977~998) 22 987, Bit12 (968~988) 21 978,
1214 17:50:43.429080 TX Bit5 (975~995) 21 985, Bit13 (968~988) 21 978,
1215 17:50:43.429178 TX Bit6 (976~996) 21 986, Bit14 (967~990) 24 978,
1216 17:50:43.429267 TX Bit7 (977~998) 22 987, Bit15 (971~991) 21 981,
1217 17:50:43.429353
1218 17:50:43.429619 Write Rank0 MR14 =0x14
1219 17:50:43.429687
1220 17:50:43.429747 CH=0, VrefRange= 0, VrefLevel = 20
1221 17:50:43.429807 TX Bit0 (978~1000) 23 989, Bit8 (965~985) 21 975,
1222 17:50:43.429869 TX Bit1 (977~999) 23 988, Bit9 (967~989) 23 978,
1223 17:50:43.429929 TX Bit2 (978~999) 22 988, Bit10 (971~992) 22 981,
1224 17:50:43.429989 TX Bit3 (972~993) 22 982, Bit11 (966~987) 22 976,
1225 17:50:43.430048 TX Bit4 (977~998) 22 987, Bit12 (968~989) 22 978,
1226 17:50:43.430107 TX Bit5 (975~996) 22 985, Bit13 (968~989) 22 978,
1227 17:50:43.430171 TX Bit6 (975~997) 23 986, Bit14 (967~990) 24 978,
1228 17:50:43.430232 TX Bit7 (977~998) 22 987, Bit15 (970~992) 23 981,
1229 17:50:43.430291
1230 17:50:43.430350 Write Rank0 MR14 =0x16
1231 17:50:43.430409
1232 17:50:43.430468 CH=0, VrefRange= 0, VrefLevel = 22
1233 17:50:43.430528 TX Bit0 (977~1000) 24 988, Bit8 (964~985) 22 974,
1234 17:50:43.430587 TX Bit1 (977~999) 23 988, Bit9 (967~990) 24 978,
1235 17:50:43.430651 TX Bit2 (977~1000) 24 988, Bit10 (971~993) 23 982,
1236 17:50:43.430732 TX Bit3 (971~994) 24 982, Bit11 (966~988) 23 977,
1237 17:50:43.430798 TX Bit4 (976~999) 24 987, Bit12 (968~990) 23 979,
1238 17:50:43.430858 TX Bit5 (975~996) 22 985, Bit13 (967~990) 24 978,
1239 17:50:43.430918 TX Bit6 (975~998) 24 986, Bit14 (967~990) 24 978,
1240 17:50:43.430978 TX Bit7 (977~999) 23 988, Bit15 (971~992) 22 981,
1241 17:50:43.431037
1242 17:50:43.431096 Write Rank0 MR14 =0x18
1243 17:50:43.431169
1244 17:50:43.431263 CH=0, VrefRange= 0, VrefLevel = 24
1245 17:50:43.431350 TX Bit0 (977~1000) 24 988, Bit8 (963~986) 24 974,
1246 17:50:43.431448 TX Bit1 (976~999) 24 987, Bit9 (967~990) 24 978,
1247 17:50:43.431543 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1248 17:50:43.431633 TX Bit3 (971~994) 24 982, Bit11 (966~988) 23 977,
1249 17:50:43.431696 TX Bit4 (976~999) 24 987, Bit12 (968~990) 23 979,
1250 17:50:43.431756 TX Bit5 (974~997) 24 985, Bit13 (967~990) 24 978,
1251 17:50:43.431815 TX Bit6 (975~998) 24 986, Bit14 (967~991) 25 979,
1252 17:50:43.431875 TX Bit7 (977~999) 23 988, Bit15 (970~992) 23 981,
1253 17:50:43.431934
1254 17:50:43.431993 Write Rank0 MR14 =0x1a
1255 17:50:43.432052
1256 17:50:43.432119 CH=0, VrefRange= 0, VrefLevel = 26
1257 17:50:43.432179 TX Bit0 (977~1001) 25 989, Bit8 (964~987) 24 975,
1258 17:50:43.432238 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1259 17:50:43.432298 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1260 17:50:43.432358 TX Bit3 (970~994) 25 982, Bit11 (965~989) 25 977,
1261 17:50:43.432417 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1262 17:50:43.432476 TX Bit5 (974~997) 24 985, Bit13 (967~990) 24 978,
1263 17:50:43.432535 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1264 17:50:43.432601 TX Bit7 (977~999) 23 988, Bit15 (969~992) 24 980,
1265 17:50:43.432661
1266 17:50:43.432723 Write Rank0 MR14 =0x1c
1267 17:50:43.432783
1268 17:50:43.432842 CH=0, VrefRange= 0, VrefLevel = 28
1269 17:50:43.432901 TX Bit0 (977~1001) 25 989, Bit8 (963~988) 26 975,
1270 17:50:43.432960 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
1271 17:50:43.433026 TX Bit2 (977~1001) 25 989, Bit10 (969~994) 26 981,
1272 17:50:43.433128 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1273 17:50:43.433217 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1274 17:50:43.433303 TX Bit5 (974~998) 25 986, Bit13 (967~990) 24 978,
1275 17:50:43.433364 TX Bit6 (974~999) 26 986, Bit14 (967~991) 25 979,
1276 17:50:43.433423 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1277 17:50:43.433488
1278 17:50:43.433548 Write Rank0 MR14 =0x1e
1279 17:50:43.433607
1280 17:50:43.433665 CH=0, VrefRange= 0, VrefLevel = 30
1281 17:50:43.433725 TX Bit0 (977~1001) 25 989, Bit8 (963~988) 26 975,
1282 17:50:43.433784 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
1283 17:50:43.433843 TX Bit2 (977~1001) 25 989, Bit10 (969~994) 26 981,
1284 17:50:43.433903 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1285 17:50:43.433969 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1286 17:50:43.434029 TX Bit5 (974~998) 25 986, Bit13 (967~990) 24 978,
1287 17:50:43.434088 TX Bit6 (974~999) 26 986, Bit14 (967~991) 25 979,
1288 17:50:43.434147 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1289 17:50:43.434206
1290 17:50:43.434265 Write Rank0 MR14 =0x20
1291 17:50:43.434323
1292 17:50:43.434388 CH=0, VrefRange= 0, VrefLevel = 32
1293 17:50:43.434449 TX Bit0 (977~1001) 25 989, Bit8 (963~988) 26 975,
1294 17:50:43.434508 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
1295 17:50:43.434567 TX Bit2 (977~1001) 25 989, Bit10 (969~994) 26 981,
1296 17:50:43.434627 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1297 17:50:43.434686 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1298 17:50:43.434745 TX Bit5 (974~998) 25 986, Bit13 (967~990) 24 978,
1299 17:50:43.434823 TX Bit6 (974~999) 26 986, Bit14 (967~991) 25 979,
1300 17:50:43.434924 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1301 17:50:43.435013
1302 17:50:43.435099 Write Rank0 MR14 =0x22
1303 17:50:43.435166
1304 17:50:43.435225 CH=0, VrefRange= 0, VrefLevel = 34
1305 17:50:43.435284 TX Bit0 (977~1001) 25 989, Bit8 (963~988) 26 975,
1306 17:50:43.435378 TX Bit1 (976~1000) 25 988, Bit9 (966~990) 25 978,
1307 17:50:43.435457 TX Bit2 (977~1001) 25 989, Bit10 (969~994) 26 981,
1308 17:50:43.435518 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1309 17:50:43.435577 TX Bit4 (976~1000) 25 988, Bit12 (967~990) 24 978,
1310 17:50:43.435636 TX Bit5 (974~998) 25 986, Bit13 (967~990) 24 978,
1311 17:50:43.435695 TX Bit6 (974~999) 26 986, Bit14 (967~991) 25 979,
1312 17:50:43.435758 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1313 17:50:43.435824
1314 17:50:43.435883
1315 17:50:43.435941 TX Vref found, early break! 380< 381
1316 17:50:43.436000 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1317 17:50:43.436059 u1DelayCellOfst[0]=9 cells (7 PI)
1318 17:50:43.436117 u1DelayCellOfst[1]=7 cells (6 PI)
1319 17:50:43.436375 u1DelayCellOfst[2]=9 cells (7 PI)
1320 17:50:43.436444 u1DelayCellOfst[3]=0 cells (0 PI)
1321 17:50:43.436503 u1DelayCellOfst[4]=7 cells (6 PI)
1322 17:50:43.436563 u1DelayCellOfst[5]=5 cells (4 PI)
1323 17:50:43.436621 u1DelayCellOfst[6]=5 cells (4 PI)
1324 17:50:43.436680 u1DelayCellOfst[7]=7 cells (6 PI)
1325 17:50:43.436738 Byte0, DQ PI dly=982, DQM PI dly= 985
1326 17:50:43.436831 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1327 17:50:43.436924
1328 17:50:43.437009 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1329 17:50:43.437086
1330 17:50:43.437146 u1DelayCellOfst[8]=0 cells (0 PI)
1331 17:50:43.437205 u1DelayCellOfst[9]=3 cells (3 PI)
1332 17:50:43.437263 u1DelayCellOfst[10]=7 cells (6 PI)
1333 17:50:43.437325 u1DelayCellOfst[11]=2 cells (2 PI)
1334 17:50:43.437386 u1DelayCellOfst[12]=3 cells (3 PI)
1335 17:50:43.437444 u1DelayCellOfst[13]=3 cells (3 PI)
1336 17:50:43.437502 u1DelayCellOfst[14]=5 cells (4 PI)
1337 17:50:43.437561 u1DelayCellOfst[15]=7 cells (6 PI)
1338 17:50:43.437620 Byte1, DQ PI dly=975, DQM PI dly= 978
1339 17:50:43.437679 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1340 17:50:43.437737
1341 17:50:43.437795 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1342 17:50:43.437855
1343 17:50:43.437921 Write Rank0 MR14 =0x1c
1344 17:50:43.437980
1345 17:50:43.438039 Final TX Range 0 Vref 28
1346 17:50:43.438098
1347 17:50:43.438156 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1348 17:50:43.438215
1349 17:50:43.438273 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1350 17:50:43.438332 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1351 17:50:43.438391 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1352 17:50:43.438455 Write Rank0 MR3 =0xb0
1353 17:50:43.438514 DramC Write-DBI on
1354 17:50:43.438572 ==
1355 17:50:43.438631 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1356 17:50:43.438690 fsp= 1, odt_onoff= 1, Byte mode= 0
1357 17:50:43.438749 ==
1358 17:50:43.438809 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1359 17:50:43.438868
1360 17:50:43.438926 Begin, DQ Scan Range 698~762
1361 17:50:43.438984
1362 17:50:43.439054
1363 17:50:43.439148 TX Vref Scan disable
1364 17:50:43.439235 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1365 17:50:43.439325 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1366 17:50:43.439427 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1367 17:50:43.439491 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1368 17:50:43.439557 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1369 17:50:43.439618 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1370 17:50:43.439678 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1371 17:50:43.439738 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1372 17:50:43.439797 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1373 17:50:43.439858 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1374 17:50:43.439917 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1375 17:50:43.439977 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1376 17:50:43.440054 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1377 17:50:43.440134 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1378 17:50:43.440198 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1379 17:50:43.440259 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1380 17:50:43.440319 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1381 17:50:43.440378 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1382 17:50:43.440447 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1383 17:50:43.440543 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1384 17:50:43.440637 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1385 17:50:43.440736 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1386 17:50:43.440841 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1387 17:50:43.440941 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1388 17:50:43.441041 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1389 17:50:43.441150 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1390 17:50:43.441246 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1391 17:50:43.441341 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1392 17:50:43.441436 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1393 17:50:43.441531 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1394 17:50:43.441625 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1395 17:50:43.441720 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1396 17:50:43.441814 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1397 17:50:43.441909 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1398 17:50:43.442003 Byte0, DQ PI dly=732, DQM PI dly= 732
1399 17:50:43.442095 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1400 17:50:43.442187
1401 17:50:43.442279 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1402 17:50:43.442371
1403 17:50:43.442466 Byte1, DQ PI dly=722, DQM PI dly= 722
1404 17:50:43.442558 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
1405 17:50:43.442650
1406 17:50:43.442741 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
1407 17:50:43.442833
1408 17:50:43.442925 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1409 17:50:43.443018 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1410 17:50:43.443111 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1411 17:50:43.443203 Write Rank0 MR3 =0x30
1412 17:50:43.443294 DramC Write-DBI off
1413 17:50:43.443384
1414 17:50:43.443461 [DATLAT]
1415 17:50:43.443520 Freq=1600, CH0 RK0, use_rxtx_scan=0
1416 17:50:43.443580
1417 17:50:43.443639 DATLAT Default: 0xf
1418 17:50:43.443698 7, 0xFFFF, sum=0
1419 17:50:43.443758 8, 0xFFFF, sum=0
1420 17:50:43.443817 9, 0xFFFF, sum=0
1421 17:50:43.443877 10, 0xFFFF, sum=0
1422 17:50:43.443937 11, 0xFFFF, sum=0
1423 17:50:43.443997 12, 0xFFFF, sum=0
1424 17:50:43.444056 13, 0xFFFF, sum=0
1425 17:50:43.444115 14, 0x0, sum=1
1426 17:50:43.444174 15, 0x0, sum=2
1427 17:50:43.444232 16, 0x0, sum=3
1428 17:50:43.444291 17, 0x0, sum=4
1429 17:50:43.444350 pattern=2 first_step=14 total pass=5 best_step=16
1430 17:50:43.444409 ==
1431 17:50:43.444468 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1432 17:50:43.444527 fsp= 1, odt_onoff= 1, Byte mode= 0
1433 17:50:43.444586 ==
1434 17:50:43.444645 Start DQ dly to find pass range UseTestEngine =1
1435 17:50:43.444704 x-axis: bit #, y-axis: DQ dly (-127~63)
1436 17:50:43.444762 RX Vref Scan = 1
1437 17:50:43.444820
1438 17:50:43.444879 RX Vref found, early break!
1439 17:50:43.444946
1440 17:50:43.445006 Final RX Vref 12, apply to both rank0 and 1
1441 17:50:43.445066 ==
1442 17:50:43.445125 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1443 17:50:43.445183 fsp= 1, odt_onoff= 1, Byte mode= 0
1444 17:50:43.445241 ==
1445 17:50:43.445300 DQS Delay:
1446 17:50:43.445358 DQS0 = 0, DQS1 = 0
1447 17:50:43.445423 DQM Delay:
1448 17:50:43.445683 DQM0 = 19, DQM1 = 18
1449 17:50:43.445750 DQ Delay:
1450 17:50:43.445810 DQ0 =23, DQ1 =21, DQ2 =21, DQ3 =15
1451 17:50:43.445877 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =20
1452 17:50:43.445937 DQ8 =14, DQ9 =16, DQ10 =25, DQ11 =16
1453 17:50:43.445997 DQ12 =18, DQ13 =18, DQ14 =20, DQ15 =22
1454 17:50:43.446056
1455 17:50:43.446114
1456 17:50:43.446172
1457 17:50:43.446230 [DramC_TX_OE_Calibration] TA2
1458 17:50:43.446290 Original DQ_B0 (3 6) =30, OEN = 27
1459 17:50:43.446371 Original DQ_B1 (3 6) =30, OEN = 27
1460 17:50:43.446464 23, 0x0, End_B0=23 End_B1=23
1461 17:50:43.446551 24, 0x0, End_B0=24 End_B1=24
1462 17:50:43.446630 25, 0x0, End_B0=25 End_B1=25
1463 17:50:43.446691 26, 0x0, End_B0=26 End_B1=26
1464 17:50:43.446750 27, 0x0, End_B0=27 End_B1=27
1465 17:50:43.446819 28, 0x0, End_B0=28 End_B1=28
1466 17:50:43.446879 29, 0x0, End_B0=29 End_B1=29
1467 17:50:43.446938 30, 0x0, End_B0=30 End_B1=30
1468 17:50:43.446998 31, 0xFFFF, End_B0=30 End_B1=30
1469 17:50:43.447057 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1470 17:50:43.447116 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1471 17:50:43.447175
1472 17:50:43.447233
1473 17:50:43.447325 Write Rank0 MR23 =0x3f
1474 17:50:43.447423 [DQSOSC]
1475 17:50:43.447486 [DQSOSCAuto] RK0, (LSB)MR18= 0x1010, (MSB)MR19= 0x303, tDQSOscB0 = 401 ps tDQSOscB1 = 401 ps
1476 17:50:43.447547 CH0_RK0: MR19=0x303, MR18=0x1010, DQSOSC=401, MR23=63, INC=15, DEC=22
1477 17:50:43.447607 Write Rank0 MR23 =0x3f
1478 17:50:43.447665 [DQSOSC]
1479 17:50:43.447726 [DQSOSCAuto] RK0, (LSB)MR18= 0x1010, (MSB)MR19= 0x303, tDQSOscB0 = 401 ps tDQSOscB1 = 401 ps
1480 17:50:43.447790 CH0 RK0: MR19=303, MR18=1010
1481 17:50:43.447849 [RankSwap] Rank num 2, (Multi 1), Rank 1
1482 17:50:43.447907 Write Rank0 MR2 =0xad
1483 17:50:43.447965 [Write Leveling]
1484 17:50:43.448023 delay byte0 byte1 byte2 byte3
1485 17:50:43.448081
1486 17:50:43.448138 10 0 0
1487 17:50:43.448218 11 0 0
1488 17:50:43.448320 12 0 0
1489 17:50:43.448410 13 0 0
1490 17:50:43.448494 14 0 0
1491 17:50:43.448555 15 0 0
1492 17:50:43.448615 16 0 0
1493 17:50:43.448674 17 0 0
1494 17:50:43.448740 18 0 0
1495 17:50:43.448800 19 0 0
1496 17:50:43.448860 20 0 0
1497 17:50:43.448919 21 0 0
1498 17:50:43.449002 22 0 0
1499 17:50:43.449100 23 0 0
1500 17:50:43.449194 24 0 0
1501 17:50:43.449291 25 0 ff
1502 17:50:43.449395 26 0 ff
1503 17:50:43.449484 27 ff ff
1504 17:50:43.449547 28 ff ff
1505 17:50:43.449608 29 ff ff
1506 17:50:43.449668 30 ff ff
1507 17:50:43.449727 31 ff ff
1508 17:50:43.449792 32 ff ff
1509 17:50:43.449853 33 ff ff
1510 17:50:43.449913 pass bytecount = 0xff (0xff: all bytes pass)
1511 17:50:43.449972
1512 17:50:43.450032 DQS0 dly: 27
1513 17:50:43.450090 DQS1 dly: 25
1514 17:50:43.450149 Write Rank0 MR2 =0x2d
1515 17:50:43.450208 [RankSwap] Rank num 2, (Multi 1), Rank 0
1516 17:50:43.450293 Write Rank1 MR1 =0xd6
1517 17:50:43.450385 [Gating]
1518 17:50:43.450471 ==
1519 17:50:43.450550 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1520 17:50:43.450610 fsp= 1, odt_onoff= 1, Byte mode= 0
1521 17:50:43.450669 ==
1522 17:50:43.450737 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1523 17:50:43.450798 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
1524 17:50:43.450859 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
1525 17:50:43.450919 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1526 17:50:43.450979 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1527 17:50:43.451038 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1528 17:50:43.451097 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1529 17:50:43.451156 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1530 17:50:43.451232 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1531 17:50:43.451327 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1532 17:50:43.451425 3 2 8 |2222 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1533 17:50:43.451489 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1534 17:50:43.451550 3 2 16 |3534 1c1b |(11 11)(11 11) |(0 0)(1 1)| 0
1535 17:50:43.451610 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1536 17:50:43.451670 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1537 17:50:43.451730 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1538 17:50:43.451797 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1539 17:50:43.451859 3 3 4 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1540 17:50:43.451918 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1541 17:50:43.451978 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1542 17:50:43.452037 3 3 16 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1543 17:50:43.452097 [Byte 0] Lead/lag Transition tap number (1)
1544 17:50:43.452155 3 3 20 |3534 202 |(11 11)(11 11) |(0 0)(1 1)| 0
1545 17:50:43.452214 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1546 17:50:43.452290 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1547 17:50:43.452385 [Byte 1] Lead/lag falling Transition (3, 3, 28)
1548 17:50:43.452471 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1549 17:50:43.452553 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1550 17:50:43.452614 3 4 8 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1551 17:50:43.452673 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1552 17:50:43.452733 3 4 16 |3d3d 1a1a |(11 11)(11 11) |(1 1)(1 1)| 0
1553 17:50:43.452801 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1554 17:50:43.452862 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1555 17:50:43.452921 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 17:50:43.452981 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1557 17:50:43.453040 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1558 17:50:43.453099 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1559 17:50:43.453159 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 17:50:43.453218 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 17:50:43.453282 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 17:50:43.453343 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1563 17:50:43.453402 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1564 17:50:43.453461 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1565 17:50:43.453520 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1566 17:50:43.453783 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1567 17:50:43.453852 [Byte 0] Lead/lag Transition tap number (2)
1568 17:50:43.453914 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1569 17:50:43.453973 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1570 17:50:43.454033 [Byte 1] Lead/lag Transition tap number (2)
1571 17:50:43.454092 3 6 12 |4646 3d3d |(0 0)(11 11) |(0 0)(0 0)| 0
1572 17:50:43.454152 [Byte 0]First pass (3, 6, 12)
1573 17:50:43.454212 3 6 16 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
1574 17:50:43.454286 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1575 17:50:43.454381 [Byte 1]First pass (3, 6, 20)
1576 17:50:43.454467 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1577 17:50:43.454551 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1578 17:50:43.454612 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1579 17:50:43.454670 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1580 17:50:43.454730 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1581 17:50:43.454795 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1582 17:50:43.454856 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1583 17:50:43.454915 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1584 17:50:43.454975 All bytes gating window > 1UI, Early break!
1585 17:50:43.455034
1586 17:50:43.455092 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1587 17:50:43.455151
1588 17:50:43.455209 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1589 17:50:43.455268
1590 17:50:43.455358
1591 17:50:43.455450
1592 17:50:43.455511 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1593 17:50:43.455570
1594 17:50:43.455628 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1595 17:50:43.455687
1596 17:50:43.455745
1597 17:50:43.455806 Write Rank1 MR1 =0x56
1598 17:50:43.455867
1599 17:50:43.455924 best RODT dly(2T, 0.5T) = (2, 3)
1600 17:50:43.455982
1601 17:50:43.456040 best RODT dly(2T, 0.5T) = (2, 3)
1602 17:50:43.456098 ==
1603 17:50:43.456156 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1604 17:50:43.456214 fsp= 1, odt_onoff= 1, Byte mode= 0
1605 17:50:43.456273 ==
1606 17:50:43.456376 Start DQ dly to find pass range UseTestEngine =0
1607 17:50:43.456465 x-axis: bit #, y-axis: DQ dly (-127~63)
1608 17:50:43.456552 RX Vref Scan = 0
1609 17:50:43.456616 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1610 17:50:43.456677 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1611 17:50:43.456737 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1612 17:50:43.456807 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1613 17:50:43.456873 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1614 17:50:43.456934 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1615 17:50:43.456995 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1616 17:50:43.457055 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1617 17:50:43.457114 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1618 17:50:43.457173 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1619 17:50:43.457234 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1620 17:50:43.457297 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1621 17:50:43.457357 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1622 17:50:43.457416 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1623 17:50:43.457475 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1624 17:50:43.457534 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1625 17:50:43.457593 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1626 17:50:43.457652 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1627 17:50:43.457711 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1628 17:50:43.457778 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1629 17:50:43.457838 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1630 17:50:43.457897 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1631 17:50:43.457956 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1632 17:50:43.458015 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1633 17:50:43.458074 -2, [0] xxxxxxxx oxxxxxxx [MSB]
1634 17:50:43.458133 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1635 17:50:43.458193 0, [0] xxxoxoxx oxxoxxxx [MSB]
1636 17:50:43.458253 1, [0] xxxoxoox ooxoooxx [MSB]
1637 17:50:43.458312 2, [0] xxxoxoox ooxoooxx [MSB]
1638 17:50:43.458399 3, [0] xoxooooo ooxoooox [MSB]
1639 17:50:43.458492 4, [0] xooooooo ooxoooox [MSB]
1640 17:50:43.458578 5, [0] oooooooo ooxooooo [MSB]
1641 17:50:43.458655 6, [0] oooooooo ooxooooo [MSB]
1642 17:50:43.458715 34, [0] oooxoooo xooooooo [MSB]
1643 17:50:43.458775 35, [0] oooxoooo xooooooo [MSB]
1644 17:50:43.458841 36, [0] oooxoooo xooxoooo [MSB]
1645 17:50:43.458901 37, [0] oooxoxoo xxoxoxoo [MSB]
1646 17:50:43.458961 38, [0] oooxoxoo xxoxxxxo [MSB]
1647 17:50:43.459020 39, [0] oooxoxxx xxoxxxxo [MSB]
1648 17:50:43.459079 40, [0] oooxoxxx xxoxxxxo [MSB]
1649 17:50:43.459139 41, [0] oxxxoxxx xxoxxxxx [MSB]
1650 17:50:43.459197 42, [0] oxxxxxxx xxoxxxxx [MSB]
1651 17:50:43.459256 43, [0] xxxxxxxx xxoxxxxx [MSB]
1652 17:50:43.459315 44, [0] xxxxxxxx xxoxxxxx [MSB]
1653 17:50:43.459399 45, [0] xxxxxxxx xxxxxxxx [MSB]
1654 17:50:43.459474 iDelay=45, Bit 0, Center 23 (5 ~ 42) 38
1655 17:50:43.459534 iDelay=45, Bit 1, Center 21 (3 ~ 40) 38
1656 17:50:43.459593 iDelay=45, Bit 2, Center 22 (4 ~ 40) 37
1657 17:50:43.459651 iDelay=45, Bit 3, Center 16 (-1 ~ 33) 35
1658 17:50:43.459709 iDelay=45, Bit 4, Center 22 (3 ~ 41) 39
1659 17:50:43.459767 iDelay=45, Bit 5, Center 18 (0 ~ 36) 37
1660 17:50:43.459825 iDelay=45, Bit 6, Center 19 (1 ~ 38) 38
1661 17:50:43.459883 iDelay=45, Bit 7, Center 20 (3 ~ 38) 36
1662 17:50:43.459947 iDelay=45, Bit 8, Center 15 (-2 ~ 33) 36
1663 17:50:43.460005 iDelay=45, Bit 9, Center 18 (1 ~ 36) 36
1664 17:50:43.460064 iDelay=45, Bit 10, Center 25 (7 ~ 44) 38
1665 17:50:43.460122 iDelay=45, Bit 11, Center 17 (-1 ~ 35) 37
1666 17:50:43.460179 iDelay=45, Bit 12, Center 19 (1 ~ 37) 37
1667 17:50:43.460237 iDelay=45, Bit 13, Center 18 (1 ~ 36) 36
1668 17:50:43.460295 iDelay=45, Bit 14, Center 20 (3 ~ 37) 35
1669 17:50:43.460353 iDelay=45, Bit 15, Center 22 (5 ~ 40) 36
1670 17:50:43.460411 ==
1671 17:50:43.460469 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1672 17:50:43.460531 fsp= 1, odt_onoff= 1, Byte mode= 0
1673 17:50:43.460617 ==
1674 17:50:43.460711 DQS Delay:
1675 17:50:43.460796 DQS0 = 0, DQS1 = 0
1676 17:50:43.460869 DQM Delay:
1677 17:50:43.460936 DQM0 = 20, DQM1 = 19
1678 17:50:43.461008 DQ Delay:
1679 17:50:43.461094 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =16
1680 17:50:43.461205 DQ4 =22, DQ5 =18, DQ6 =19, DQ7 =20
1681 17:50:43.461299 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =17
1682 17:50:43.461392 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1683 17:50:43.461483
1684 17:50:43.461577
1685 17:50:43.461668 DramC Write-DBI off
1686 17:50:43.461759 ==
1687 17:50:43.461851 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1688 17:50:43.461944 fsp= 1, odt_onoff= 1, Byte mode= 0
1689 17:50:43.462038 ==
1690 17:50:43.462130 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1691 17:50:43.462221
1692 17:50:43.462312 Begin, DQ Scan Range 921~1177
1693 17:50:43.462403
1694 17:50:43.462503
1695 17:50:43.462591 TX Vref Scan disable
1696 17:50:43.462677 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1697 17:50:43.462943 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1698 17:50:43.463014 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1699 17:50:43.463076 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1700 17:50:43.463136 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1701 17:50:43.463196 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1702 17:50:43.463256 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1703 17:50:43.463317 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1704 17:50:43.463399 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1705 17:50:43.463482 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1706 17:50:43.463543 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1707 17:50:43.463603 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1708 17:50:43.463663 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1709 17:50:43.463726 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1710 17:50:43.463786 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1711 17:50:43.463851 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1712 17:50:43.463912 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1713 17:50:43.463971 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1714 17:50:43.464044 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1715 17:50:43.464105 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1716 17:50:43.464165 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1717 17:50:43.464223 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1718 17:50:43.464283 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1719 17:50:43.464387 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1720 17:50:43.464476 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1721 17:50:43.464563 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1722 17:50:43.464662 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1723 17:50:43.464757 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1724 17:50:43.464855 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1725 17:50:43.464950 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1726 17:50:43.465044 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1727 17:50:43.465138 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1728 17:50:43.465232 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1729 17:50:43.465307 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1730 17:50:43.465369 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1731 17:50:43.465429 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1732 17:50:43.465489 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1733 17:50:43.465549 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1734 17:50:43.465609 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1735 17:50:43.465668 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1736 17:50:43.465733 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1737 17:50:43.465829 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1738 17:50:43.465924 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1739 17:50:43.466018 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1740 17:50:43.466111 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1741 17:50:43.466212 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1742 17:50:43.466314 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1743 17:50:43.466403 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1744 17:50:43.466488 969 |3 6 9|[0] xxxxxxxx oxxoxxxx [MSB]
1745 17:50:43.466550 970 |3 6 10|[0] xxxxxxxx ooxoxxxx [MSB]
1746 17:50:43.466610 971 |3 6 11|[0] xxxxxxxx ooxooxox [MSB]
1747 17:50:43.466674 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1748 17:50:43.466736 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1749 17:50:43.466796 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1750 17:50:43.466856 975 |3 6 15|[0] xoxooooo ooxooooo [MSB]
1751 17:50:43.466915 976 |3 6 16|[0] ooxooooo oooooooo [MSB]
1752 17:50:43.466976 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1753 17:50:43.467036 991 |3 6 31|[0] oooxoooo xxxxxxxx [MSB]
1754 17:50:43.467094 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1755 17:50:43.467159 993 |3 6 33|[0] xxxxxxxx xxxxxxxx [MSB]
1756 17:50:43.467254 Byte0, DQ PI dly=983, DQM PI dly= 983
1757 17:50:43.467346 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
1758 17:50:43.467439
1759 17:50:43.467501 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
1760 17:50:43.467560
1761 17:50:43.467619 Byte1, DQ PI dly=980, DQM PI dly= 980
1762 17:50:43.467684 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1763 17:50:43.467744
1764 17:50:43.467803 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1765 17:50:43.467862
1766 17:50:43.467921 ==
1767 17:50:43.467980 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1768 17:50:43.468040 fsp= 1, odt_onoff= 1, Byte mode= 0
1769 17:50:43.468102 ==
1770 17:50:43.468202 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1771 17:50:43.468289
1772 17:50:43.468376 Begin, DQ Scan Range 956~1020
1773 17:50:43.468436 Write Rank1 MR14 =0x0
1774 17:50:43.468495
1775 17:50:43.468559 CH=0, VrefRange= 0, VrefLevel = 0
1776 17:50:43.468620 TX Bit0 (978~991) 14 984, Bit8 (970~983) 14 976,
1777 17:50:43.468679 TX Bit1 (977~988) 12 982, Bit9 (972~986) 15 979,
1778 17:50:43.468739 TX Bit2 (978~990) 13 984, Bit10 (978~990) 13 984,
1779 17:50:43.468798 TX Bit3 (972~983) 12 977, Bit11 (972~983) 12 977,
1780 17:50:43.468857 TX Bit4 (977~990) 14 983, Bit12 (974~986) 13 980,
1781 17:50:43.468915 TX Bit5 (975~986) 12 980, Bit13 (976~983) 8 979,
1782 17:50:43.468973 TX Bit6 (976~988) 13 982, Bit14 (975~987) 13 981,
1783 17:50:43.469041 TX Bit7 (976~990) 15 983, Bit15 (976~990) 15 983,
1784 17:50:43.469100
1785 17:50:43.469158 Write Rank1 MR14 =0x2
1786 17:50:43.469216
1787 17:50:43.469274 CH=0, VrefRange= 0, VrefLevel = 2
1788 17:50:43.469333 TX Bit0 (978~992) 15 985, Bit8 (970~984) 15 977,
1789 17:50:43.469392 TX Bit1 (977~990) 14 983, Bit9 (972~986) 15 979,
1790 17:50:43.469451 TX Bit2 (978~991) 14 984, Bit10 (978~990) 13 984,
1791 17:50:43.469544 TX Bit3 (971~984) 14 977, Bit11 (971~984) 14 977,
1792 17:50:43.469637 TX Bit4 (977~990) 14 983, Bit12 (974~987) 14 980,
1793 17:50:43.469729 TX Bit5 (974~987) 14 980, Bit13 (975~984) 10 979,
1794 17:50:43.469821 TX Bit6 (975~990) 16 982, Bit14 (975~987) 13 981,
1795 17:50:43.469914 TX Bit7 (976~991) 16 983, Bit15 (976~990) 15 983,
1796 17:50:43.470013
1797 17:50:43.470103 Write Rank1 MR14 =0x4
1798 17:50:43.470188
1799 17:50:43.470281 CH=0, VrefRange= 0, VrefLevel = 4
1800 17:50:43.470374 TX Bit0 (977~992) 16 984, Bit8 (970~984) 15 977,
1801 17:50:43.470466 TX Bit1 (977~991) 15 984, Bit9 (972~988) 17 980,
1802 17:50:43.470554 TX Bit2 (978~991) 14 984, Bit10 (977~991) 15 984,
1803 17:50:43.470814 TX Bit3 (971~984) 14 977, Bit11 (970~985) 16 977,
1804 17:50:43.470881 TX Bit4 (976~991) 16 983, Bit12 (973~988) 16 980,
1805 17:50:43.470943 TX Bit5 (973~988) 16 980, Bit13 (975~985) 11 980,
1806 17:50:43.471003 TX Bit6 (975~990) 16 982, Bit14 (974~989) 16 981,
1807 17:50:43.471062 TX Bit7 (976~991) 16 983, Bit15 (976~991) 16 983,
1808 17:50:43.471130
1809 17:50:43.471222 Write Rank1 MR14 =0x6
1810 17:50:43.471313
1811 17:50:43.471415 CH=0, VrefRange= 0, VrefLevel = 6
1812 17:50:43.471481 TX Bit0 (977~993) 17 985, Bit8 (969~985) 17 977,
1813 17:50:43.471541 TX Bit1 (977~991) 15 984, Bit9 (971~989) 19 980,
1814 17:50:43.471601 TX Bit2 (978~992) 15 985, Bit10 (977~992) 16 984,
1815 17:50:43.471660 TX Bit3 (970~985) 16 977, Bit11 (971~986) 16 978,
1816 17:50:43.471724 TX Bit4 (976~991) 16 983, Bit12 (973~989) 17 981,
1817 17:50:43.471785 TX Bit5 (973~989) 17 981, Bit13 (974~986) 13 980,
1818 17:50:43.471844 TX Bit6 (975~990) 16 982, Bit14 (974~989) 16 981,
1819 17:50:43.471903 TX Bit7 (976~991) 16 983, Bit15 (976~991) 16 983,
1820 17:50:43.471961
1821 17:50:43.472019 Write Rank1 MR14 =0x8
1822 17:50:43.472077
1823 17:50:43.472136 CH=0, VrefRange= 0, VrefLevel = 8
1824 17:50:43.472194 TX Bit0 (977~993) 17 985, Bit8 (969~986) 18 977,
1825 17:50:43.472253 TX Bit1 (977~991) 15 984, Bit9 (971~989) 19 980,
1826 17:50:43.472353 TX Bit2 (978~992) 15 985, Bit10 (976~992) 17 984,
1827 17:50:43.472443 TX Bit3 (970~986) 17 978, Bit11 (970~986) 17 978,
1828 17:50:43.472529 TX Bit4 (976~992) 17 984, Bit12 (972~989) 18 980,
1829 17:50:43.472600 TX Bit5 (972~990) 19 981, Bit13 (974~988) 15 981,
1830 17:50:43.472660 TX Bit6 (974~991) 18 982, Bit14 (973~990) 18 981,
1831 17:50:43.472719 TX Bit7 (975~992) 18 983, Bit15 (976~992) 17 984,
1832 17:50:43.472783
1833 17:50:43.472842 Write Rank1 MR14 =0xa
1834 17:50:43.472901
1835 17:50:43.472959 CH=0, VrefRange= 0, VrefLevel = 10
1836 17:50:43.473018 TX Bit0 (977~994) 18 985, Bit8 (969~986) 18 977,
1837 17:50:43.473076 TX Bit1 (976~992) 17 984, Bit9 (971~989) 19 980,
1838 17:50:43.473135 TX Bit2 (977~992) 16 984, Bit10 (976~993) 18 984,
1839 17:50:43.473193 TX Bit3 (970~987) 18 978, Bit11 (970~987) 18 978,
1840 17:50:43.473258 TX Bit4 (975~992) 18 983, Bit12 (972~990) 19 981,
1841 17:50:43.473318 TX Bit5 (972~990) 19 981, Bit13 (973~988) 16 980,
1842 17:50:43.473377 TX Bit6 (974~991) 18 982, Bit14 (973~990) 18 981,
1843 17:50:43.473436 TX Bit7 (975~992) 18 983, Bit15 (975~993) 19 984,
1844 17:50:43.473495
1845 17:50:43.473552 Write Rank1 MR14 =0xc
1846 17:50:43.473610
1847 17:50:43.473667 CH=0, VrefRange= 0, VrefLevel = 12
1848 17:50:43.473734 TX Bit0 (977~995) 19 986, Bit8 (969~987) 19 978,
1849 17:50:43.473793 TX Bit1 (976~992) 17 984, Bit9 (970~990) 21 980,
1850 17:50:43.473852 TX Bit2 (977~993) 17 985, Bit10 (976~994) 19 985,
1851 17:50:43.473910 TX Bit3 (970~988) 19 979, Bit11 (969~988) 20 978,
1852 17:50:43.473969 TX Bit4 (975~993) 19 984, Bit12 (972~990) 19 981,
1853 17:50:43.474027 TX Bit5 (971~991) 21 981, Bit13 (973~989) 17 981,
1854 17:50:43.474086 TX Bit6 (973~991) 19 982, Bit14 (972~990) 19 981,
1855 17:50:43.474144 TX Bit7 (975~993) 19 984, Bit15 (975~993) 19 984,
1856 17:50:43.474202
1857 17:50:43.474267 Write Rank1 MR14 =0xe
1858 17:50:43.474364
1859 17:50:43.474450 CH=0, VrefRange= 0, VrefLevel = 14
1860 17:50:43.474536 TX Bit0 (977~995) 19 986, Bit8 (969~988) 20 978,
1861 17:50:43.474596 TX Bit1 (976~993) 18 984, Bit9 (970~990) 21 980,
1862 17:50:43.474655 TX Bit2 (977~994) 18 985, Bit10 (976~994) 19 985,
1863 17:50:43.474714 TX Bit3 (970~989) 20 979, Bit11 (969~989) 21 979,
1864 17:50:43.474773 TX Bit4 (975~993) 19 984, Bit12 (971~990) 20 980,
1865 17:50:43.474837 TX Bit5 (971~991) 21 981, Bit13 (973~990) 18 981,
1866 17:50:43.474897 TX Bit6 (973~992) 20 982, Bit14 (971~991) 21 981,
1867 17:50:43.474955 TX Bit7 (974~993) 20 983, Bit15 (975~994) 20 984,
1868 17:50:43.475014
1869 17:50:43.475071 Write Rank1 MR14 =0x10
1870 17:50:43.475130
1871 17:50:43.475188 CH=0, VrefRange= 0, VrefLevel = 16
1872 17:50:43.475246 TX Bit0 (976~996) 21 986, Bit8 (968~989) 22 978,
1873 17:50:43.475305 TX Bit1 (975~993) 19 984, Bit9 (969~990) 22 979,
1874 17:50:43.475375 TX Bit2 (977~994) 18 985, Bit10 (976~995) 20 985,
1875 17:50:43.475455 TX Bit3 (969~990) 22 979, Bit11 (969~989) 21 979,
1876 17:50:43.475515 TX Bit4 (975~993) 19 984, Bit12 (971~991) 21 981,
1877 17:50:43.475575 TX Bit5 (971~991) 21 981, Bit13 (972~990) 19 981,
1878 17:50:43.475634 TX Bit6 (972~992) 21 982, Bit14 (971~991) 21 981,
1879 17:50:43.475692 TX Bit7 (974~994) 21 984, Bit15 (975~995) 21 985,
1880 17:50:43.475751
1881 17:50:43.475808 Write Rank1 MR14 =0x12
1882 17:50:43.475866
1883 17:50:43.475931 CH=0, VrefRange= 0, VrefLevel = 18
1884 17:50:43.475990 TX Bit0 (976~996) 21 986, Bit8 (968~989) 22 978,
1885 17:50:43.476049 TX Bit1 (975~994) 20 984, Bit9 (970~991) 22 980,
1886 17:50:43.476107 TX Bit2 (977~995) 19 986, Bit10 (975~996) 22 985,
1887 17:50:43.476166 TX Bit3 (969~990) 22 979, Bit11 (969~989) 21 979,
1888 17:50:43.476225 TX Bit4 (974~994) 21 984, Bit12 (970~991) 22 980,
1889 17:50:43.476283 TX Bit5 (970~992) 23 981, Bit13 (972~990) 19 981,
1890 17:50:43.476341 TX Bit6 (972~993) 22 982, Bit14 (971~992) 22 981,
1891 17:50:43.476437 TX Bit7 (973~994) 22 983, Bit15 (975~996) 22 985,
1892 17:50:43.476526
1893 17:50:43.476611 Write Rank1 MR14 =0x14
1894 17:50:43.476677
1895 17:50:43.476736 CH=0, VrefRange= 0, VrefLevel = 20
1896 17:50:43.476795 TX Bit0 (976~997) 22 986, Bit8 (968~989) 22 978,
1897 17:50:43.476854 TX Bit1 (975~994) 20 984, Bit9 (969~991) 23 980,
1898 17:50:43.476921 TX Bit2 (976~996) 21 986, Bit10 (975~997) 23 986,
1899 17:50:43.476980 TX Bit3 (969~990) 22 979, Bit11 (969~990) 22 979,
1900 17:50:43.477038 TX Bit4 (974~995) 22 984, Bit12 (970~991) 22 980,
1901 17:50:43.477097 TX Bit5 (970~992) 23 981, Bit13 (971~990) 20 980,
1902 17:50:43.477156 TX Bit6 (971~993) 23 982, Bit14 (970~992) 23 981,
1903 17:50:43.477412 TX Bit7 (973~995) 23 984, Bit15 (975~996) 22 985,
1904 17:50:43.477483
1905 17:50:43.477544 Write Rank1 MR14 =0x16
1906 17:50:43.477607
1907 17:50:43.477665 CH=0, VrefRange= 0, VrefLevel = 22
1908 17:50:43.477724 TX Bit0 (976~998) 23 987, Bit8 (968~990) 23 979,
1909 17:50:43.477783 TX Bit1 (974~995) 22 984, Bit9 (969~992) 24 980,
1910 17:50:43.477841 TX Bit2 (976~996) 21 986, Bit10 (975~997) 23 986,
1911 17:50:43.477900 TX Bit3 (969~991) 23 980, Bit11 (969~990) 22 979,
1912 17:50:43.477959 TX Bit4 (973~995) 23 984, Bit12 (970~992) 23 981,
1913 17:50:43.688276 TX Bit5 (970~992) 23 981, Bit13 (971~991) 21 981,
1914 17:50:43.688414 TX Bit6 (971~994) 24 982, Bit14 (970~992) 23 981,
1915 17:50:43.688488 TX Bit7 (972~995) 24 983, Bit15 (974~997) 24 985,
1916 17:50:43.688555
1917 17:50:43.688619 Write Rank1 MR14 =0x18
1918 17:50:43.688683
1919 17:50:43.688745 CH=0, VrefRange= 0, VrefLevel = 24
1920 17:50:43.688807 TX Bit0 (976~998) 23 987, Bit8 (968~990) 23 979,
1921 17:50:43.688868 TX Bit1 (974~996) 23 985, Bit9 (969~992) 24 980,
1922 17:50:43.688934 TX Bit2 (976~997) 22 986, Bit10 (975~997) 23 986,
1923 17:50:43.689022 TX Bit3 (968~991) 24 979, Bit11 (968~990) 23 979,
1924 17:50:43.689085 TX Bit4 (973~996) 24 984, Bit12 (969~992) 24 980,
1925 17:50:43.689146 TX Bit5 (970~992) 23 981, Bit13 (971~991) 21 981,
1926 17:50:43.689206 TX Bit6 (971~994) 24 982, Bit14 (970~993) 24 981,
1927 17:50:43.689266 TX Bit7 (972~996) 25 984, Bit15 (973~997) 25 985,
1928 17:50:43.689325
1929 17:50:43.689384 Write Rank1 MR14 =0x1a
1930 17:50:43.689443
1931 17:50:43.689501 CH=0, VrefRange= 0, VrefLevel = 26
1932 17:50:43.689560 TX Bit0 (975~998) 24 986, Bit8 (968~990) 23 979,
1933 17:50:43.689619 TX Bit1 (974~997) 24 985, Bit9 (969~992) 24 980,
1934 17:50:43.689677 TX Bit2 (976~998) 23 987, Bit10 (974~998) 25 986,
1935 17:50:43.689737 TX Bit3 (968~991) 24 979, Bit11 (968~991) 24 979,
1936 17:50:43.689796 TX Bit4 (972~997) 26 984, Bit12 (969~993) 25 981,
1937 17:50:43.689855 TX Bit5 (970~993) 24 981, Bit13 (970~992) 23 981,
1938 17:50:43.689914 TX Bit6 (971~995) 25 983, Bit14 (970~994) 25 982,
1939 17:50:43.689973 TX Bit7 (972~997) 26 984, Bit15 (973~997) 25 985,
1940 17:50:43.690031
1941 17:50:43.690088 Write Rank1 MR14 =0x1c
1942 17:50:43.690147
1943 17:50:43.690205 CH=0, VrefRange= 0, VrefLevel = 28
1944 17:50:43.690264 TX Bit0 (975~998) 24 986, Bit8 (967~991) 25 979,
1945 17:50:43.690324 TX Bit1 (973~997) 25 985, Bit9 (969~992) 24 980,
1946 17:50:43.690383 TX Bit2 (975~998) 24 986, Bit10 (974~998) 25 986,
1947 17:50:43.690441 TX Bit3 (968~991) 24 979, Bit11 (968~991) 24 979,
1948 17:50:43.690500 TX Bit4 (972~997) 26 984, Bit12 (969~993) 25 981,
1949 17:50:43.690559 TX Bit5 (970~993) 24 981, Bit13 (970~992) 23 981,
1950 17:50:43.690617 TX Bit6 (970~995) 26 982, Bit14 (969~994) 26 981,
1951 17:50:43.690676 TX Bit7 (972~997) 26 984, Bit15 (972~998) 27 985,
1952 17:50:43.690734
1953 17:50:43.690792 Write Rank1 MR14 =0x1e
1954 17:50:43.690851
1955 17:50:43.690909 CH=0, VrefRange= 0, VrefLevel = 30
1956 17:50:43.690968 TX Bit0 (975~999) 25 987, Bit8 (967~991) 25 979,
1957 17:50:43.691026 TX Bit1 (973~997) 25 985, Bit9 (969~992) 24 980,
1958 17:50:43.691085 TX Bit2 (975~998) 24 986, Bit10 (974~998) 25 986,
1959 17:50:43.691144 TX Bit3 (968~992) 25 980, Bit11 (968~991) 24 979,
1960 17:50:43.691202 TX Bit4 (972~998) 27 985, Bit12 (969~993) 25 981,
1961 17:50:43.691260 TX Bit5 (969~994) 26 981, Bit13 (970~992) 23 981,
1962 17:50:43.691319 TX Bit6 (970~996) 27 983, Bit14 (969~994) 26 981,
1963 17:50:43.691378 TX Bit7 (971~998) 28 984, Bit15 (972~997) 26 984,
1964 17:50:43.691448
1965 17:50:43.691507 Write Rank1 MR14 =0x20
1966 17:50:43.691565
1967 17:50:43.691623 CH=0, VrefRange= 0, VrefLevel = 32
1968 17:50:43.691682 TX Bit0 (974~999) 26 986, Bit8 (967~991) 25 979,
1969 17:50:43.691739 TX Bit1 (973~998) 26 985, Bit9 (969~991) 23 980,
1970 17:50:43.691798 TX Bit2 (975~998) 24 986, Bit10 (973~998) 26 985,
1971 17:50:43.691856 TX Bit3 (968~992) 25 980, Bit11 (968~991) 24 979,
1972 17:50:43.691914 TX Bit4 (972~998) 27 985, Bit12 (969~993) 25 981,
1973 17:50:43.692003 TX Bit5 (969~994) 26 981, Bit13 (969~993) 25 981,
1974 17:50:43.692067 TX Bit6 (970~996) 27 983, Bit14 (969~994) 26 981,
1975 17:50:43.692126 TX Bit7 (972~998) 27 985, Bit15 (972~997) 26 984,
1976 17:50:43.692185
1977 17:50:43.692243 Write Rank1 MR14 =0x22
1978 17:50:43.692301
1979 17:50:43.692359 CH=0, VrefRange= 0, VrefLevel = 34
1980 17:50:43.692417 TX Bit0 (974~999) 26 986, Bit8 (967~991) 25 979,
1981 17:50:43.692475 TX Bit1 (973~998) 26 985, Bit9 (969~991) 23 980,
1982 17:50:43.692534 TX Bit2 (975~998) 24 986, Bit10 (973~998) 26 985,
1983 17:50:43.692593 TX Bit3 (968~992) 25 980, Bit11 (968~991) 24 979,
1984 17:50:43.692651 TX Bit4 (972~998) 27 985, Bit12 (969~993) 25 981,
1985 17:50:43.692710 TX Bit5 (969~994) 26 981, Bit13 (969~993) 25 981,
1986 17:50:43.692768 TX Bit6 (970~996) 27 983, Bit14 (969~994) 26 981,
1987 17:50:43.692827 TX Bit7 (972~998) 27 985, Bit15 (972~997) 26 984,
1988 17:50:43.692885
1989 17:50:43.692942 Write Rank1 MR14 =0x24
1990 17:50:43.693000
1991 17:50:43.693057 CH=0, VrefRange= 0, VrefLevel = 36
1992 17:50:43.693116 TX Bit0 (974~999) 26 986, Bit8 (967~991) 25 979,
1993 17:50:43.693174 TX Bit1 (973~998) 26 985, Bit9 (969~991) 23 980,
1994 17:50:43.693232 TX Bit2 (975~998) 24 986, Bit10 (973~998) 26 985,
1995 17:50:43.693290 TX Bit3 (968~992) 25 980, Bit11 (968~991) 24 979,
1996 17:50:43.693349 TX Bit4 (972~998) 27 985, Bit12 (969~993) 25 981,
1997 17:50:43.693407 TX Bit5 (969~994) 26 981, Bit13 (969~993) 25 981,
1998 17:50:43.693465 TX Bit6 (970~996) 27 983, Bit14 (969~994) 26 981,
1999 17:50:43.693523 TX Bit7 (972~998) 27 985, Bit15 (972~997) 26 984,
2000 17:50:43.693581
2001 17:50:43.693639 Write Rank1 MR14 =0x26
2002 17:50:43.693697
2003 17:50:43.693755 CH=0, VrefRange= 0, VrefLevel = 38
2004 17:50:43.693813 TX Bit0 (974~999) 26 986, Bit8 (967~991) 25 979,
2005 17:50:43.694083 TX Bit1 (973~998) 26 985, Bit9 (969~991) 23 980,
2006 17:50:43.694153 TX Bit2 (975~998) 24 986, Bit10 (973~998) 26 985,
2007 17:50:43.694213 TX Bit3 (968~992) 25 980, Bit11 (968~991) 24 979,
2008 17:50:43.694272 TX Bit4 (972~998) 27 985, Bit12 (969~993) 25 981,
2009 17:50:43.694331 TX Bit5 (969~994) 26 981, Bit13 (969~993) 25 981,
2010 17:50:43.694389 TX Bit6 (970~996) 27 983, Bit14 (969~994) 26 981,
2011 17:50:43.694448 TX Bit7 (972~998) 27 985, Bit15 (972~997) 26 984,
2012 17:50:43.694507
2013 17:50:43.694565
2014 17:50:43.694623 TX Vref found, early break! 377< 387
2015 17:50:43.694683 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2016 17:50:43.694742 u1DelayCellOfst[0]=7 cells (6 PI)
2017 17:50:43.694800 u1DelayCellOfst[1]=6 cells (5 PI)
2018 17:50:43.694859 u1DelayCellOfst[2]=7 cells (6 PI)
2019 17:50:43.694917 u1DelayCellOfst[3]=0 cells (0 PI)
2020 17:50:43.694975 u1DelayCellOfst[4]=6 cells (5 PI)
2021 17:50:43.695032 u1DelayCellOfst[5]=1 cells (1 PI)
2022 17:50:43.695091 u1DelayCellOfst[6]=3 cells (3 PI)
2023 17:50:43.695149 u1DelayCellOfst[7]=6 cells (5 PI)
2024 17:50:43.695207 Byte0, DQ PI dly=980, DQM PI dly= 983
2025 17:50:43.695266 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2026 17:50:43.695325
2027 17:50:43.695393 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2028 17:50:43.695508
2029 17:50:43.695604 u1DelayCellOfst[8]=0 cells (0 PI)
2030 17:50:43.695679 u1DelayCellOfst[9]=1 cells (1 PI)
2031 17:50:43.695740 u1DelayCellOfst[10]=7 cells (6 PI)
2032 17:50:43.695799 u1DelayCellOfst[11]=0 cells (0 PI)
2033 17:50:43.695859 u1DelayCellOfst[12]=2 cells (2 PI)
2034 17:50:43.695917 u1DelayCellOfst[13]=2 cells (2 PI)
2035 17:50:43.695976 u1DelayCellOfst[14]=2 cells (2 PI)
2036 17:50:43.696035 u1DelayCellOfst[15]=6 cells (5 PI)
2037 17:50:43.696094 Byte1, DQ PI dly=979, DQM PI dly= 982
2038 17:50:43.696153 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2039 17:50:43.696213
2040 17:50:43.696271 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2041 17:50:43.696331
2042 17:50:43.696390 Write Rank1 MR14 =0x20
2043 17:50:43.696449
2044 17:50:43.696506 Final TX Range 0 Vref 32
2045 17:50:43.696565
2046 17:50:43.696624 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2047 17:50:43.696683
2048 17:50:43.696741 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2049 17:50:43.696801 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2050 17:50:43.696860 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2051 17:50:43.696919 wait MRW command Rank1 MR3 =0xb0 fired (1)
2052 17:50:43.696978 Write Rank1 MR3 =0xb0
2053 17:50:43.697036 DramC Write-DBI on
2054 17:50:43.697094 ==
2055 17:50:43.697154 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2056 17:50:43.697212 fsp= 1, odt_onoff= 1, Byte mode= 0
2057 17:50:43.697272 ==
2058 17:50:43.697330 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2059 17:50:43.697389
2060 17:50:43.697447 Begin, DQ Scan Range 702~766
2061 17:50:43.697506
2062 17:50:43.697564
2063 17:50:43.697623 TX Vref Scan disable
2064 17:50:43.697681 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2065 17:50:43.697741 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2066 17:50:43.697802 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2067 17:50:43.697862 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2068 17:50:43.697921 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2069 17:50:43.697981 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2070 17:50:43.698041 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2071 17:50:43.698101 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2072 17:50:43.698161 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2073 17:50:43.698221 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2074 17:50:43.698280 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2075 17:50:43.698339 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2076 17:50:43.698399 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2077 17:50:43.698458 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2078 17:50:43.698518 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2079 17:50:43.698577 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2080 17:50:43.698637 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2081 17:50:43.698697 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2082 17:50:43.698757 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2083 17:50:43.698816 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2084 17:50:43.698876 Byte0, DQ PI dly=728, DQM PI dly= 728
2085 17:50:43.698935 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2086 17:50:43.699027
2087 17:50:43.699088 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2088 17:50:43.699148
2089 17:50:43.699207 Byte1, DQ PI dly=724, DQM PI dly= 724
2090 17:50:43.699267 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2091 17:50:43.699326
2092 17:50:43.699385 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2093 17:50:43.699456
2094 17:50:43.699515 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2095 17:50:43.699575 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2096 17:50:43.699635 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2097 17:50:43.699694 Write Rank1 MR3 =0x30
2098 17:50:43.699753 DramC Write-DBI off
2099 17:50:43.699811
2100 17:50:43.699869 [DATLAT]
2101 17:50:43.699928 Freq=1600, CH0 RK1, use_rxtx_scan=0
2102 17:50:43.699987
2103 17:50:43.700046 DATLAT Default: 0x10
2104 17:50:43.700105 7, 0xFFFF, sum=0
2105 17:50:43.700165 8, 0xFFFF, sum=0
2106 17:50:43.700224 9, 0xFFFF, sum=0
2107 17:50:43.700284 10, 0xFFFF, sum=0
2108 17:50:43.700344 11, 0xFFFF, sum=0
2109 17:50:43.700403 12, 0xFFFF, sum=0
2110 17:50:43.700462 13, 0xFFFF, sum=0
2111 17:50:43.700521 14, 0x0, sum=1
2112 17:50:43.700581 15, 0x0, sum=2
2113 17:50:43.700640 16, 0x0, sum=3
2114 17:50:43.700699 17, 0x0, sum=4
2115 17:50:43.700758 pattern=2 first_step=14 total pass=5 best_step=16
2116 17:50:43.700831 ==
2117 17:50:43.700891 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2118 17:50:43.700951 fsp= 1, odt_onoff= 1, Byte mode= 0
2119 17:50:43.701010 ==
2120 17:50:43.701069 Start DQ dly to find pass range UseTestEngine =1
2121 17:50:43.701128 x-axis: bit #, y-axis: DQ dly (-127~63)
2122 17:50:43.701188 RX Vref Scan = 0
2123 17:50:43.701278 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2124 17:50:43.701342 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2125 17:50:43.701402 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2126 17:50:43.701462 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2127 17:50:43.701522 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2128 17:50:43.701582 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2129 17:50:43.701642 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2130 17:50:43.701897 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2131 17:50:43.701996 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2132 17:50:43.702062 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2133 17:50:43.702124 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2134 17:50:43.702184 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2135 17:50:43.702244 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2136 17:50:43.702304 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2137 17:50:43.702364 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2138 17:50:43.702424 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2139 17:50:43.702484 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2140 17:50:43.702543 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2141 17:50:43.702603 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2142 17:50:43.702663 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2143 17:50:43.702723 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2144 17:50:43.702783 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2145 17:50:43.702842 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2146 17:50:43.702902 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2147 17:50:43.702961 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2148 17:50:43.703034 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2149 17:50:43.705672 0, [0] xxxoxxxx oxxoxxxx [MSB]
2150 17:50:43.705746 1, [0] xxxoxoxx ooxooxxx [MSB]
2151 17:50:43.709174 2, [0] xxxoxoxx ooxoooxx [MSB]
2152 17:50:43.712617 3, [0] xxxoxooo ooxoooox [MSB]
2153 17:50:43.715544 4, [0] xxxoxooo ooxoooox [MSB]
2154 17:50:43.719115 5, [0] ooxooooo ooxoooox [MSB]
2155 17:50:43.719207 6, [0] oooooooo ooxooooo [MSB]
2156 17:50:43.724546 33, [0] oooooooo xooooooo [MSB]
2157 17:50:43.727539 34, [0] oooxoooo xooooooo [MSB]
2158 17:50:43.731126 35, [0] oooxoxoo xooxoooo [MSB]
2159 17:50:43.734358 36, [0] oooxoxoo xooxoxoo [MSB]
2160 17:50:43.737983 37, [0] oooxoxoo xxoxoxoo [MSB]
2161 17:50:43.741021 38, [0] oooxoxxx xxoxxxxo [MSB]
2162 17:50:43.741122 39, [0] oxxxoxxx xxoxxxxo [MSB]
2163 17:50:43.744545 40, [0] oxxxxxxx xxoxxxxx [MSB]
2164 17:50:43.747702 41, [0] xxxxxxxx xxoxxxxx [MSB]
2165 17:50:43.751298 42, [0] xxxxxxxx xxoxxxxx [MSB]
2166 17:50:43.754492 43, [0] xxxxxxxx xxoxxxxx [MSB]
2167 17:50:43.758081 44, [0] xxxxxxxx xxxxxxxx [MSB]
2168 17:50:43.761182 iDelay=44, Bit 0, Center 22 (5 ~ 40) 36
2169 17:50:43.764729 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2170 17:50:43.767677 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2171 17:50:43.771214 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2172 17:50:43.774597 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
2173 17:50:43.777793 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2174 17:50:43.780858 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2175 17:50:43.784628 iDelay=44, Bit 7, Center 20 (3 ~ 37) 35
2176 17:50:43.787766 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
2177 17:50:43.791180 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2178 17:50:43.794738 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2179 17:50:43.801434 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2180 17:50:43.804336 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2181 17:50:43.807982 iDelay=44, Bit 13, Center 18 (2 ~ 35) 34
2182 17:50:43.811486 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
2183 17:50:43.814358 iDelay=44, Bit 15, Center 22 (6 ~ 39) 34
2184 17:50:43.814488 ==
2185 17:50:43.817959 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2186 17:50:43.821482 fsp= 1, odt_onoff= 1, Byte mode= 0
2187 17:50:43.821575 ==
2188 17:50:43.824496 DQS Delay:
2189 17:50:43.824586 DQS0 = 0, DQS1 = 0
2190 17:50:43.828221 DQM Delay:
2191 17:50:43.828312 DQM0 = 19, DQM1 = 19
2192 17:50:43.828383 DQ Delay:
2193 17:50:43.831281 DQ0 =22, DQ1 =21, DQ2 =22, DQ3 =15
2194 17:50:43.834863 DQ4 =22, DQ5 =17, DQ6 =20, DQ7 =20
2195 17:50:43.837697 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
2196 17:50:43.841166 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
2197 17:50:43.841258
2198 17:50:43.841330
2199 17:50:43.841396
2200 17:50:43.844715 [DramC_TX_OE_Calibration] TA2
2201 17:50:43.847761 Original DQ_B0 (3 6) =30, OEN = 27
2202 17:50:43.851293 Original DQ_B1 (3 6) =30, OEN = 27
2203 17:50:43.854648 23, 0x0, End_B0=23 End_B1=23
2204 17:50:43.858120 24, 0x0, End_B0=24 End_B1=24
2205 17:50:43.858214 25, 0x0, End_B0=25 End_B1=25
2206 17:50:43.861373 26, 0x0, End_B0=26 End_B1=26
2207 17:50:43.864697 27, 0x0, End_B0=27 End_B1=27
2208 17:50:43.867869 28, 0x0, End_B0=28 End_B1=28
2209 17:50:43.871285 29, 0x0, End_B0=29 End_B1=29
2210 17:50:43.871379 30, 0x0, End_B0=30 End_B1=30
2211 17:50:43.874491 31, 0xFFFF, End_B0=30 End_B1=30
2212 17:50:43.881134 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2213 17:50:43.884565 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2214 17:50:43.888311
2215 17:50:43.888403
2216 17:50:43.888476 Write Rank1 MR23 =0x3f
2217 17:50:43.888546 [DQSOSC]
2218 17:50:43.897997 [DQSOSCAuto] RK1, (LSB)MR18= 0xd7d7, (MSB)MR19= 0x202, tDQSOscB0 = 433 ps tDQSOscB1 = 433 ps
2219 17:50:43.904686 CH0_RK1: MR19=0x202, MR18=0xD7D7, DQSOSC=433, MR23=63, INC=13, DEC=19
2220 17:50:43.904783 Write Rank1 MR23 =0x3f
2221 17:50:43.908283 [DQSOSC]
2222 17:50:43.914950 [DQSOSCAuto] RK1, (LSB)MR18= 0xd7d7, (MSB)MR19= 0x202, tDQSOscB0 = 433 ps tDQSOscB1 = 433 ps
2223 17:50:43.918514 CH0 RK1: MR19=202, MR18=D7D7
2224 17:50:43.921858 [RxdqsGatingPostProcess] freq 1600
2225 17:50:43.924869 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2226 17:50:43.928490 Rank: 0
2227 17:50:43.928583 best DQS0 dly(2T, 0.5T) = (2, 5)
2228 17:50:43.932004 best DQS1 dly(2T, 0.5T) = (2, 5)
2229 17:50:43.934992 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2230 17:50:43.938580 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2231 17:50:43.938673 Rank: 1
2232 17:50:43.941356 best DQS0 dly(2T, 0.5T) = (2, 6)
2233 17:50:43.944877 best DQS1 dly(2T, 0.5T) = (2, 6)
2234 17:50:43.948499 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2235 17:50:43.951446 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2236 17:50:43.958296 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2237 17:50:43.961844 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2238 17:50:43.964800 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2239 17:50:43.968354 Write Rank0 MR13 =0x59
2240 17:50:43.968447 ==
2241 17:50:43.971459 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2242 17:50:43.975025 fsp= 1, odt_onoff= 1, Byte mode= 0
2243 17:50:43.975119 ==
2244 17:50:43.978384 === u2Vref_new: 0x56 --> 0x3a
2245 17:50:43.981625 === u2Vref_new: 0x58 --> 0x58
2246 17:50:43.984823 === u2Vref_new: 0x5a --> 0x5a
2247 17:50:43.988531 === u2Vref_new: 0x5c --> 0x78
2248 17:50:43.991675 === u2Vref_new: 0x5e --> 0x7a
2249 17:50:43.995173 === u2Vref_new: 0x60 --> 0x90
2250 17:50:43.998333 [CA 0] Center 38 (13~63) winsize 51
2251 17:50:44.001696 [CA 1] Center 37 (12~63) winsize 52
2252 17:50:44.004993 [CA 2] Center 34 (6~63) winsize 58
2253 17:50:44.008464 [CA 3] Center 34 (6~63) winsize 58
2254 17:50:44.008557 [CA 4] Center 34 (6~63) winsize 58
2255 17:50:44.011817 [CA 5] Center 28 (-2~59) winsize 62
2256 17:50:44.011909
2257 17:50:44.015520 [CATrainingPosCal] consider 1 rank data
2258 17:50:44.018828 u2DelayCellTimex100 = 735/100 ps
2259 17:50:44.025226 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2260 17:50:44.028753 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2261 17:50:44.031793 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2262 17:50:44.035413 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2263 17:50:44.038326 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2264 17:50:44.041937 CA5 delay=28 (-2~59),Diff = 0 PI (0 cell)
2265 17:50:44.042031
2266 17:50:44.045476 CA PerBit enable=1, Macro0, CA PI delay=28
2267 17:50:44.048869 === u2Vref_new: 0x60 --> 0x90
2268 17:50:44.048963
2269 17:50:44.051916 Vref(ca) range 1: 32
2270 17:50:44.052009
2271 17:50:44.052083 CS Dly= 11 (42-0-32)
2272 17:50:44.055553 Write Rank0 MR13 =0xd8
2273 17:50:44.058647 Write Rank0 MR13 =0xd8
2274 17:50:44.058740 Write Rank0 MR12 =0x60
2275 17:50:44.062095 Write Rank1 MR13 =0x59
2276 17:50:44.062188 ==
2277 17:50:44.065557 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2278 17:50:44.068565 fsp= 1, odt_onoff= 1, Byte mode= 0
2279 17:50:44.068658 ==
2280 17:50:44.072204 === u2Vref_new: 0x56 --> 0x3a
2281 17:50:44.075181 === u2Vref_new: 0x58 --> 0x58
2282 17:50:44.078779 === u2Vref_new: 0x5a --> 0x5a
2283 17:50:44.081803 === u2Vref_new: 0x5c --> 0x78
2284 17:50:44.085169 === u2Vref_new: 0x5e --> 0x7a
2285 17:50:44.088635 === u2Vref_new: 0x60 --> 0x90
2286 17:50:44.092132 [CA 0] Center 37 (12~63) winsize 52
2287 17:50:44.095461 [CA 1] Center 37 (12~63) winsize 52
2288 17:50:44.098482 [CA 2] Center 35 (7~63) winsize 57
2289 17:50:44.101968 [CA 3] Center 34 (6~63) winsize 58
2290 17:50:44.105533 [CA 4] Center 35 (7~63) winsize 57
2291 17:50:44.108573 [CA 5] Center 27 (-3~58) winsize 62
2292 17:50:44.108666
2293 17:50:44.112194 [CATrainingPosCal] consider 2 rank data
2294 17:50:44.115341 u2DelayCellTimex100 = 735/100 ps
2295 17:50:44.118817 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2296 17:50:44.122063 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2297 17:50:44.125168 CA2 delay=35 (7~63),Diff = 7 PI (9 cell)
2298 17:50:44.128581 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2299 17:50:44.132351 CA4 delay=35 (7~63),Diff = 7 PI (9 cell)
2300 17:50:44.135292 CA5 delay=28 (-2~58),Diff = 0 PI (0 cell)
2301 17:50:44.135385
2302 17:50:44.138969 CA PerBit enable=1, Macro0, CA PI delay=28
2303 17:50:44.142014 === u2Vref_new: 0x60 --> 0x90
2304 17:50:44.142107
2305 17:50:44.145505 Vref(ca) range 1: 32
2306 17:50:44.145597
2307 17:50:44.145670 CS Dly= 12 (43-0-32)
2308 17:50:44.149101 Write Rank1 MR13 =0xd8
2309 17:50:44.151958 Write Rank1 MR13 =0xd8
2310 17:50:44.152053 Write Rank1 MR12 =0x60
2311 17:50:44.155515 [RankSwap] Rank num 2, (Multi 1), Rank 0
2312 17:50:44.159071 Write Rank0 MR2 =0xad
2313 17:50:44.159192 [Write Leveling]
2314 17:50:44.162007 delay byte0 byte1 byte2 byte3
2315 17:50:44.162100
2316 17:50:44.165444 10 0 0
2317 17:50:44.165539 11 0 0
2318 17:50:44.168963 12 0 0
2319 17:50:44.169057 13 0 0
2320 17:50:44.169133 14 0 0
2321 17:50:44.171935 15 0 0
2322 17:50:44.172028 16 0 0
2323 17:50:44.175490 17 0 0
2324 17:50:44.175584 18 0 0
2325 17:50:44.178587 19 0 0
2326 17:50:44.178680 20 0 0
2327 17:50:44.178754 21 0 0
2328 17:50:44.182240 22 0 0
2329 17:50:44.182334 23 0 0
2330 17:50:44.185244 24 0 ff
2331 17:50:44.185338 25 0 ff
2332 17:50:44.188763 26 0 ff
2333 17:50:44.188857 27 0 ff
2334 17:50:44.188931 28 0 ff
2335 17:50:44.192109 29 0 ff
2336 17:50:44.192202 30 0 ff
2337 17:50:44.195752 31 0 ff
2338 17:50:44.195846 32 0 ff
2339 17:50:44.198668 33 ff ff
2340 17:50:44.198761 34 ff ff
2341 17:50:44.202196 35 ff ff
2342 17:50:44.202290 36 ff ff
2343 17:50:44.205520 37 ff ff
2344 17:50:44.205613 38 ff ff
2345 17:50:44.205690 39 ff ff
2346 17:50:44.212121 pass bytecount = 0xff (0xff: all bytes pass)
2347 17:50:44.212213
2348 17:50:44.212286 DQS0 dly: 33
2349 17:50:44.212354 DQS1 dly: 24
2350 17:50:44.215664 Write Rank0 MR2 =0x2d
2351 17:50:44.219068 [RankSwap] Rank num 2, (Multi 1), Rank 0
2352 17:50:44.222490 Write Rank0 MR1 =0xd6
2353 17:50:44.222581 [Gating]
2354 17:50:44.222654 ==
2355 17:50:44.225848 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2356 17:50:44.228814 fsp= 1, odt_onoff= 1, Byte mode= 0
2357 17:50:44.232207 ==
2358 17:50:44.235601 3 1 0 |2423 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2359 17:50:44.238834 3 1 4 |1e1d 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2360 17:50:44.242150 3 1 8 |706 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2361 17:50:44.248858 3 1 12 |2b2a 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2362 17:50:44.251958 3 1 16 |3635 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2363 17:50:44.255716 3 1 20 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2364 17:50:44.262247 [Byte 0] Lead/lag falling Transition (3, 1, 20)
2365 17:50:44.265360 3 1 24 |3535 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2366 17:50:44.269004 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2367 17:50:44.275230 3 2 0 |100 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2368 17:50:44.278835 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2369 17:50:44.281862 3 2 8 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2370 17:50:44.285500 3 2 12 |3434 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2371 17:50:44.292044 3 2 16 |2020 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2372 17:50:44.294946 3 2 20 |707 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2373 17:50:44.298502 3 2 24 |3d3d d0c |(11 11)(11 11) |(1 1)(0 0)| 0
2374 17:50:44.304832 3 2 28 |1413 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2375 17:50:44.308281 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2376 17:50:44.311708 3 3 4 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2377 17:50:44.318421 3 3 8 |1b1b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2378 17:50:44.321987 3 3 12 |e0e 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2379 17:50:44.324964 3 3 16 |3d3c 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2380 17:50:44.331845 3 3 20 |1413 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2381 17:50:44.334737 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2382 17:50:44.338168 [Byte 0] Lead/lag falling Transition (3, 3, 24)
2383 17:50:44.344964 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2384 17:50:44.348102 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2385 17:50:44.351613 [Byte 1] Lead/lag Transition tap number (1)
2386 17:50:44.355080 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2387 17:50:44.361583 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2388 17:50:44.364741 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2389 17:50:44.368406 3 4 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2390 17:50:44.374714 3 4 20 |2121 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2391 17:50:44.378154 3 4 24 |3d3d 504 |(11 11)(11 11) |(1 1)(1 1)| 0
2392 17:50:44.381619 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2393 17:50:44.384633 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2394 17:50:44.391178 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2395 17:50:44.394889 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2396 17:50:44.398284 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2397 17:50:44.404688 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2398 17:50:44.408151 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2399 17:50:44.411112 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2400 17:50:44.418011 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2401 17:50:44.421058 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2402 17:50:44.424748 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2403 17:50:44.431241 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2404 17:50:44.434310 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2405 17:50:44.437759 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2406 17:50:44.441278 [Byte 0] Lead/lag Transition tap number (2)
2407 17:50:44.447339 3 6 16 |1211 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2408 17:50:44.451173 [Byte 1] Lead/lag falling Transition (3, 6, 16)
2409 17:50:44.454077 3 6 20 |2424 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2410 17:50:44.461205 3 6 24 |4646 d0c |(0 0)(11 11) |(0 0)(1 0)| 0
2411 17:50:44.461300 [Byte 0]First pass (3, 6, 24)
2412 17:50:44.464680 [Byte 1] Lead/lag Transition tap number (3)
2413 17:50:44.471166 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2414 17:50:44.474514 [Byte 1]First pass (3, 6, 28)
2415 17:50:44.477704 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2416 17:50:44.480748 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2417 17:50:44.484541 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2418 17:50:44.487690 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2419 17:50:44.494486 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2420 17:50:44.497384 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2421 17:50:44.500893 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2422 17:50:44.504260 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2423 17:50:44.507859 All bytes gating window > 1UI, Early break!
2424 17:50:44.507952
2425 17:50:44.514195 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
2426 17:50:44.514289
2427 17:50:44.517738 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 22)
2428 17:50:44.517832
2429 17:50:44.517906
2430 17:50:44.517974
2431 17:50:44.520691 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
2432 17:50:44.520784
2433 17:50:44.524251 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 22)
2434 17:50:44.524344
2435 17:50:44.524418
2436 17:50:44.527271 Write Rank0 MR1 =0x56
2437 17:50:44.527363
2438 17:50:44.530746 best RODT dly(2T, 0.5T) = (2, 3)
2439 17:50:44.530839
2440 17:50:44.534288 best RODT dly(2T, 0.5T) = (2, 3)
2441 17:50:44.534380 ==
2442 17:50:44.537382 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2443 17:50:44.540877 fsp= 1, odt_onoff= 1, Byte mode= 0
2444 17:50:44.540970 ==
2445 17:50:44.547419 Start DQ dly to find pass range UseTestEngine =0
2446 17:50:44.550251 x-axis: bit #, y-axis: DQ dly (-127~63)
2447 17:50:44.550344 RX Vref Scan = 0
2448 17:50:44.553586 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2449 17:50:44.557005 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2450 17:50:44.560304 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2451 17:50:44.563732 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2452 17:50:44.567105 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2453 17:50:44.570552 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2454 17:50:44.570646 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2455 17:50:44.573582 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2456 17:50:44.577256 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2457 17:50:44.580354 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2458 17:50:44.583885 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2459 17:50:44.586771 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2460 17:50:44.590269 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2461 17:50:44.593657 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2462 17:50:44.593751 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2463 17:50:44.596921 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2464 17:50:44.600050 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2465 17:50:44.603711 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2466 17:50:44.606774 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2467 17:50:44.610159 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2468 17:50:44.613778 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2469 17:50:44.616616 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2470 17:50:44.616711 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2471 17:50:44.620122 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2472 17:50:44.623716 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2473 17:50:44.626550 -1, [0] xxxoxxxx xoxxxxxo [MSB]
2474 17:50:44.630063 0, [0] xxxoxxxx ooxxxxxo [MSB]
2475 17:50:44.633666 1, [0] xxooxxxx ooxxxxxo [MSB]
2476 17:50:44.633763 2, [0] xxooxxxx ooxxxxxo [MSB]
2477 17:50:44.636744 3, [0] xxooxxxx oooxxxxo [MSB]
2478 17:50:44.640364 4, [0] oxooxxxo oooxxxxo [MSB]
2479 17:50:44.643338 5, [0] oooooxxo ooooooxo [MSB]
2480 17:50:44.646953 6, [0] oooooooo ooooooxo [MSB]
2481 17:50:44.649956 31, [0] oooooooo ooooooox [MSB]
2482 17:50:44.653456 32, [0] oooooooo ooooooox [MSB]
2483 17:50:44.653550 33, [0] oooooooo ooooooox [MSB]
2484 17:50:44.656468 34, [0] oooooooo ooooooox [MSB]
2485 17:50:44.659803 35, [0] oooxoooo xxooooox [MSB]
2486 17:50:44.663204 36, [0] oooxoooo xxooooox [MSB]
2487 17:50:44.666712 37, [0] ooxxoooo xxooooox [MSB]
2488 17:50:44.669925 38, [0] ooxxoooo xxooooox [MSB]
2489 17:50:44.673333 39, [0] ooxxooox xxooooox [MSB]
2490 17:50:44.673428 40, [0] oxxxxoox xxxoooox [MSB]
2491 17:50:44.676880 41, [0] xxxxxoox xxxxxxox [MSB]
2492 17:50:44.679987 42, [0] xxxxxxxx xxxxxxxx [MSB]
2493 17:50:44.683534 iDelay=42, Bit 0, Center 22 (4 ~ 40) 37
2494 17:50:44.686572 iDelay=42, Bit 1, Center 22 (5 ~ 39) 35
2495 17:50:44.690008 iDelay=42, Bit 2, Center 18 (1 ~ 36) 36
2496 17:50:44.693517 iDelay=42, Bit 3, Center 16 (-1 ~ 34) 36
2497 17:50:44.696463 iDelay=42, Bit 4, Center 22 (5 ~ 39) 35
2498 17:50:44.703180 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
2499 17:50:44.706466 iDelay=42, Bit 6, Center 23 (6 ~ 41) 36
2500 17:50:44.709762 iDelay=42, Bit 7, Center 21 (4 ~ 38) 35
2501 17:50:44.713053 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
2502 17:50:44.716736 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
2503 17:50:44.719800 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
2504 17:50:44.723307 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
2505 17:50:44.726261 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
2506 17:50:44.730044 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
2507 17:50:44.733314 iDelay=42, Bit 14, Center 24 (7 ~ 41) 35
2508 17:50:44.736613 iDelay=42, Bit 15, Center 13 (-4 ~ 30) 35
2509 17:50:44.736706 ==
2510 17:50:44.743313 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2511 17:50:44.746513 fsp= 1, odt_onoff= 1, Byte mode= 0
2512 17:50:44.746608 ==
2513 17:50:44.746723 DQS Delay:
2514 17:50:44.750000 DQS0 = 0, DQS1 = 0
2515 17:50:44.750093 DQM Delay:
2516 17:50:44.752928 DQM0 = 20, DQM1 = 19
2517 17:50:44.753021 DQ Delay:
2518 17:50:44.756512 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16
2519 17:50:44.759530 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =21
2520 17:50:44.763087 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
2521 17:50:44.766558 DQ12 =22, DQ13 =22, DQ14 =24, DQ15 =13
2522 17:50:44.766651
2523 17:50:44.766725
2524 17:50:44.766795 DramC Write-DBI off
2525 17:50:44.769859 ==
2526 17:50:44.773311 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2527 17:50:44.776665 fsp= 1, odt_onoff= 1, Byte mode= 0
2528 17:50:44.776758 ==
2529 17:50:44.779681 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2530 17:50:44.779796
2531 17:50:44.782833 Begin, DQ Scan Range 920~1176
2532 17:50:44.782926
2533 17:50:44.783000
2534 17:50:44.786499 TX Vref Scan disable
2535 17:50:44.790093 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
2536 17:50:44.793088 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2537 17:50:44.796490 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2538 17:50:44.799453 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2539 17:50:44.803099 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2540 17:50:44.806106 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2541 17:50:44.809612 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2542 17:50:44.812974 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2543 17:50:44.816647 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2544 17:50:44.819580 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2545 17:50:44.826556 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2546 17:50:44.829418 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2547 17:50:44.832836 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2548 17:50:44.836165 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2549 17:50:44.839786 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2550 17:50:44.842757 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2551 17:50:44.846152 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2552 17:50:44.849733 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2553 17:50:44.852750 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2554 17:50:44.855974 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2555 17:50:44.859399 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2556 17:50:44.863044 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2557 17:50:44.865989 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2558 17:50:44.869637 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2559 17:50:44.872612 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2560 17:50:44.879478 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2561 17:50:44.882946 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2562 17:50:44.886360 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2563 17:50:44.889640 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2564 17:50:44.892602 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2565 17:50:44.896140 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2566 17:50:44.899625 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2567 17:50:44.902543 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2568 17:50:44.906259 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2569 17:50:44.909283 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2570 17:50:44.912836 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2571 17:50:44.916200 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2572 17:50:44.919134 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2573 17:50:44.922738 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2574 17:50:44.925765 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2575 17:50:44.929293 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2576 17:50:44.935620 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2577 17:50:44.939163 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2578 17:50:44.942690 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2579 17:50:44.945758 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2580 17:50:44.949159 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2581 17:50:44.952645 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2582 17:50:44.955898 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2583 17:50:44.959030 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2584 17:50:44.962524 969 |3 6 9|[0] xxxxxxxx xxxxxxxo [MSB]
2585 17:50:44.965981 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2586 17:50:44.969058 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
2587 17:50:44.972440 972 |3 6 12|[0] xxxxxxxx oooxoxoo [MSB]
2588 17:50:44.975959 973 |3 6 13|[0] xxxxxxxx oooxoxoo [MSB]
2589 17:50:44.979601 974 |3 6 14|[0] xxxxxxxx oooooxoo [MSB]
2590 17:50:44.982475 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2591 17:50:44.985799 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2592 17:50:44.989324 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2593 17:50:44.992781 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2594 17:50:44.995498 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2595 17:50:44.998858 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2596 17:50:45.005770 981 |3 6 21|[0] xooooxoo oooooooo [MSB]
2597 17:50:45.008771 982 |3 6 22|[0] oooooxoo oooooooo [MSB]
2598 17:50:45.012381 986 |3 6 26|[0] oooooooo ooooooox [MSB]
2599 17:50:45.015354 987 |3 6 27|[0] oooooooo ooooooox [MSB]
2600 17:50:45.018945 988 |3 6 28|[0] oooooooo oxooooox [MSB]
2601 17:50:45.022306 989 |3 6 29|[0] oooooooo xxooooox [MSB]
2602 17:50:45.025320 990 |3 6 30|[0] oooooooo xxooooox [MSB]
2603 17:50:45.028969 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2604 17:50:45.032551 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2605 17:50:45.035541 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2606 17:50:45.038877 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2607 17:50:45.042320 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2608 17:50:45.045328 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2609 17:50:45.052248 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2610 17:50:45.055234 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2611 17:50:45.059003 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2612 17:50:45.062009 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2613 17:50:45.065469 1001 |3 6 41|[0] ooxxoooo xxxxxxxx [MSB]
2614 17:50:45.068918 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2615 17:50:45.071765 Byte0, DQ PI dly=990, DQM PI dly= 990
2616 17:50:45.075101 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2617 17:50:45.075196
2618 17:50:45.082082 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2619 17:50:45.082176
2620 17:50:45.085436 Byte1, DQ PI dly=979, DQM PI dly= 979
2621 17:50:45.088661 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2622 17:50:45.088754
2623 17:50:45.092050 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2624 17:50:45.092144
2625 17:50:45.092218 ==
2626 17:50:45.098701 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2627 17:50:45.102058 fsp= 1, odt_onoff= 1, Byte mode= 0
2628 17:50:45.102152 ==
2629 17:50:45.104848 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2630 17:50:45.104941
2631 17:50:45.108133 Begin, DQ Scan Range 955~1019
2632 17:50:45.111522 Write Rank0 MR14 =0x0
2633 17:50:45.119887
2634 17:50:45.119979 CH=1, VrefRange= 0, VrefLevel = 0
2635 17:50:45.126824 TX Bit0 (984~1000) 17 992, Bit8 (974~984) 11 979,
2636 17:50:45.129771 TX Bit1 (983~996) 14 989, Bit9 (975~983) 9 979,
2637 17:50:45.136884 TX Bit2 (981~996) 16 988, Bit10 (976~986) 11 981,
2638 17:50:45.139877 TX Bit3 (980~992) 13 986, Bit11 (976~987) 12 981,
2639 17:50:45.143267 TX Bit4 (983~997) 15 990, Bit12 (976~987) 12 981,
2640 17:50:45.149676 TX Bit5 (985~998) 14 991, Bit13 (977~987) 11 982,
2641 17:50:45.153326 TX Bit6 (984~998) 15 991, Bit14 (975~986) 12 980,
2642 17:50:45.156371 TX Bit7 (984~996) 13 990, Bit15 (969~979) 11 974,
2643 17:50:45.156465
2644 17:50:45.159525 Write Rank0 MR14 =0x2
2645 17:50:45.168613
2646 17:50:45.168706 CH=1, VrefRange= 0, VrefLevel = 2
2647 17:50:45.175636 TX Bit0 (984~1000) 17 992, Bit8 (973~984) 12 978,
2648 17:50:45.179181 TX Bit1 (983~997) 15 990, Bit9 (973~983) 11 978,
2649 17:50:45.185550 TX Bit2 (981~996) 16 988, Bit10 (976~987) 12 981,
2650 17:50:45.189376 TX Bit3 (979~993) 15 986, Bit11 (975~988) 14 981,
2651 17:50:45.192627 TX Bit4 (983~998) 16 990, Bit12 (975~988) 14 981,
2652 17:50:45.198996 TX Bit5 (984~999) 16 991, Bit13 (977~989) 13 983,
2653 17:50:45.202621 TX Bit6 (983~998) 16 990, Bit14 (975~987) 13 981,
2654 17:50:45.205557 TX Bit7 (983~997) 15 990, Bit15 (969~980) 12 974,
2655 17:50:45.205651
2656 17:50:45.209188 Write Rank0 MR14 =0x4
2657 17:50:45.218252
2658 17:50:45.218351 CH=1, VrefRange= 0, VrefLevel = 4
2659 17:50:45.225005 TX Bit0 (984~1001) 18 992, Bit8 (972~985) 14 978,
2660 17:50:45.227946 TX Bit1 (982~998) 17 990, Bit9 (972~984) 13 978,
2661 17:50:45.234942 TX Bit2 (981~998) 18 989, Bit10 (975~987) 13 981,
2662 17:50:45.237875 TX Bit3 (979~993) 15 986, Bit11 (976~988) 13 982,
2663 17:50:45.241483 TX Bit4 (982~999) 18 990, Bit12 (975~989) 15 982,
2664 17:50:45.247880 TX Bit5 (984~999) 16 991, Bit13 (976~989) 14 982,
2665 17:50:45.251447 TX Bit6 (983~998) 16 990, Bit14 (974~988) 15 981,
2666 17:50:45.255077 TX Bit7 (983~998) 16 990, Bit15 (969~982) 14 975,
2667 17:50:45.255171
2668 17:50:45.258127 Write Rank0 MR14 =0x6
2669 17:50:45.267069
2670 17:50:45.267162 CH=1, VrefRange= 0, VrefLevel = 6
2671 17:50:45.273749 TX Bit0 (984~1000) 17 992, Bit8 (972~985) 14 978,
2672 17:50:45.277185 TX Bit1 (982~998) 17 990, Bit9 (972~984) 13 978,
2673 17:50:45.283524 TX Bit2 (980~998) 19 989, Bit10 (974~988) 15 981,
2674 17:50:45.287114 TX Bit3 (978~994) 17 986, Bit11 (976~990) 15 983,
2675 17:50:45.290766 TX Bit4 (982~999) 18 990, Bit12 (975~990) 16 982,
2676 17:50:45.297215 TX Bit5 (984~999) 16 991, Bit13 (976~990) 15 983,
2677 17:50:45.300095 TX Bit6 (983~999) 17 991, Bit14 (974~988) 15 981,
2678 17:50:45.303742 TX Bit7 (983~998) 16 990, Bit15 (968~983) 16 975,
2679 17:50:45.307236
2680 17:50:45.307328 Write Rank0 MR14 =0x8
2681 17:50:45.316587
2682 17:50:45.316680 CH=1, VrefRange= 0, VrefLevel = 8
2683 17:50:45.323136 TX Bit0 (983~1001) 19 992, Bit8 (971~986) 16 978,
2684 17:50:45.326342 TX Bit1 (982~999) 18 990, Bit9 (972~985) 14 978,
2685 17:50:45.333171 TX Bit2 (979~998) 20 988, Bit10 (974~989) 16 981,
2686 17:50:45.336292 TX Bit3 (978~995) 18 986, Bit11 (975~990) 16 982,
2687 17:50:45.339540 TX Bit4 (982~1000) 19 991, Bit12 (975~991) 17 983,
2688 17:50:45.346230 TX Bit5 (984~1000) 17 992, Bit13 (976~991) 16 983,
2689 17:50:45.349773 TX Bit6 (982~999) 18 990, Bit14 (974~989) 16 981,
2690 17:50:45.356472 TX Bit7 (982~999) 18 990, Bit15 (968~983) 16 975,
2691 17:50:45.356568
2692 17:50:45.356643 Write Rank0 MR14 =0xa
2693 17:50:45.366133
2694 17:50:45.369784 CH=1, VrefRange= 0, VrefLevel = 10
2695 17:50:45.372721 TX Bit0 (983~1002) 20 992, Bit8 (970~986) 17 978,
2696 17:50:45.376310 TX Bit1 (981~999) 19 990, Bit9 (971~985) 15 978,
2697 17:50:45.382957 TX Bit2 (979~999) 21 989, Bit10 (974~991) 18 982,
2698 17:50:45.386243 TX Bit3 (978~996) 19 987, Bit11 (975~991) 17 983,
2699 17:50:45.389753 TX Bit4 (981~1000) 20 990, Bit12 (974~991) 18 982,
2700 17:50:45.396296 TX Bit5 (984~1000) 17 992, Bit13 (976~991) 16 983,
2701 17:50:45.399757 TX Bit6 (982~1000) 19 991, Bit14 (973~991) 19 982,
2702 17:50:45.402704 TX Bit7 (982~999) 18 990, Bit15 (968~984) 17 976,
2703 17:50:45.406123
2704 17:50:45.406214 Write Rank0 MR14 =0xc
2705 17:50:45.416227
2706 17:50:45.416319 CH=1, VrefRange= 0, VrefLevel = 12
2707 17:50:45.422903 TX Bit0 (982~1002) 21 992, Bit8 (970~987) 18 978,
2708 17:50:45.426024 TX Bit1 (981~1000) 20 990, Bit9 (971~986) 16 978,
2709 17:50:45.432579 TX Bit2 (978~999) 22 988, Bit10 (973~991) 19 982,
2710 17:50:45.435562 TX Bit3 (977~996) 20 986, Bit11 (975~991) 17 983,
2711 17:50:45.439399 TX Bit4 (981~1001) 21 991, Bit12 (973~992) 20 982,
2712 17:50:45.445821 TX Bit5 (983~1001) 19 992, Bit13 (975~992) 18 983,
2713 17:50:45.449022 TX Bit6 (982~1000) 19 991, Bit14 (973~991) 19 982,
2714 17:50:45.455781 TX Bit7 (982~1000) 19 991, Bit15 (968~984) 17 976,
2715 17:50:45.455879
2716 17:50:45.455954 Write Rank0 MR14 =0xe
2717 17:50:45.465899
2718 17:50:45.469543 CH=1, VrefRange= 0, VrefLevel = 14
2719 17:50:45.472845 TX Bit0 (982~1003) 22 992, Bit8 (970~987) 18 978,
2720 17:50:45.475768 TX Bit1 (980~1000) 21 990, Bit9 (970~986) 17 978,
2721 17:50:45.482861 TX Bit2 (978~1000) 23 989, Bit10 (973~991) 19 982,
2722 17:50:45.485837 TX Bit3 (977~997) 21 987, Bit11 (974~991) 18 982,
2723 17:50:45.489523 TX Bit4 (980~1001) 22 990, Bit12 (973~992) 20 982,
2724 17:50:45.496058 TX Bit5 (983~1001) 19 992, Bit13 (975~992) 18 983,
2725 17:50:45.499113 TX Bit6 (981~1001) 21 991, Bit14 (972~992) 21 982,
2726 17:50:45.505664 TX Bit7 (981~1000) 20 990, Bit15 (967~985) 19 976,
2727 17:50:45.505758
2728 17:50:45.505832 Write Rank0 MR14 =0x10
2729 17:50:45.516563
2730 17:50:45.519547 CH=1, VrefRange= 0, VrefLevel = 16
2731 17:50:45.523119 TX Bit0 (983~1003) 21 993, Bit8 (970~989) 20 979,
2732 17:50:45.525980 TX Bit1 (980~1001) 22 990, Bit9 (970~987) 18 978,
2733 17:50:45.532828 TX Bit2 (978~1000) 23 989, Bit10 (972~991) 20 981,
2734 17:50:45.536506 TX Bit3 (977~998) 22 987, Bit11 (973~992) 20 982,
2735 17:50:45.539619 TX Bit4 (980~1001) 22 990, Bit12 (973~993) 21 983,
2736 17:50:45.546129 TX Bit5 (983~1002) 20 992, Bit13 (975~992) 18 983,
2737 17:50:45.549466 TX Bit6 (981~1001) 21 991, Bit14 (972~992) 21 982,
2738 17:50:45.556149 TX Bit7 (980~1001) 22 990, Bit15 (967~985) 19 976,
2739 17:50:45.556244
2740 17:50:45.556317 Write Rank0 MR14 =0x12
2741 17:50:45.566732
2742 17:50:45.566825 CH=1, VrefRange= 0, VrefLevel = 18
2743 17:50:45.573320 TX Bit0 (981~1004) 24 992, Bit8 (969~989) 21 979,
2744 17:50:45.577052 TX Bit1 (979~1001) 23 990, Bit9 (969~987) 19 978,
2745 17:50:45.583529 TX Bit2 (978~1001) 24 989, Bit10 (971~992) 22 981,
2746 17:50:45.586743 TX Bit3 (977~998) 22 987, Bit11 (973~992) 20 982,
2747 17:50:45.590209 TX Bit4 (979~1002) 24 990, Bit12 (972~993) 22 982,
2748 17:50:45.596652 TX Bit5 (982~1003) 22 992, Bit13 (974~992) 19 983,
2749 17:50:45.599696 TX Bit6 (980~1002) 23 991, Bit14 (972~992) 21 982,
2750 17:50:45.607022 TX Bit7 (981~1001) 21 991, Bit15 (967~985) 19 976,
2751 17:50:45.607118
2752 17:50:45.607193 Write Rank0 MR14 =0x14
2753 17:50:45.617588
2754 17:50:45.620650 CH=1, VrefRange= 0, VrefLevel = 20
2755 17:50:45.623655 TX Bit0 (981~1004) 24 992, Bit8 (970~990) 21 980,
2756 17:50:45.627310 TX Bit1 (979~1001) 23 990, Bit9 (970~988) 19 979,
2757 17:50:45.633741 TX Bit2 (978~1001) 24 989, Bit10 (971~992) 22 981,
2758 17:50:45.637098 TX Bit3 (977~998) 22 987, Bit11 (972~993) 22 982,
2759 17:50:45.640498 TX Bit4 (979~1002) 24 990, Bit12 (972~993) 22 982,
2760 17:50:45.647087 TX Bit5 (982~1003) 22 992, Bit13 (973~993) 21 983,
2761 17:50:45.650675 TX Bit6 (980~1002) 23 991, Bit14 (971~993) 23 982,
2762 17:50:45.657193 TX Bit7 (980~1001) 22 990, Bit15 (967~986) 20 976,
2763 17:50:45.657289
2764 17:50:45.657364 Write Rank0 MR14 =0x16
2765 17:50:45.667843
2766 17:50:45.671240 CH=1, VrefRange= 0, VrefLevel = 22
2767 17:50:45.674768 TX Bit0 (981~1005) 25 993, Bit8 (969~991) 23 980,
2768 17:50:45.677701 TX Bit1 (979~1002) 24 990, Bit9 (970~989) 20 979,
2769 17:50:45.684769 TX Bit2 (977~1001) 25 989, Bit10 (972~993) 22 982,
2770 17:50:45.687886 TX Bit3 (977~999) 23 988, Bit11 (971~993) 23 982,
2771 17:50:45.691081 TX Bit4 (979~1003) 25 991, Bit12 (971~993) 23 982,
2772 17:50:45.697591 TX Bit5 (982~1004) 23 993, Bit13 (975~993) 19 984,
2773 17:50:45.701110 TX Bit6 (979~1002) 24 990, Bit14 (971~993) 23 982,
2774 17:50:45.707549 TX Bit7 (980~1002) 23 991, Bit15 (966~986) 21 976,
2775 17:50:45.707645
2776 17:50:45.707718 Write Rank0 MR14 =0x18
2777 17:50:45.718285
2778 17:50:45.721915 CH=1, VrefRange= 0, VrefLevel = 24
2779 17:50:45.724858 TX Bit0 (981~1005) 25 993, Bit8 (969~991) 23 980,
2780 17:50:45.728485 TX Bit1 (978~1002) 25 990, Bit9 (969~990) 22 979,
2781 17:50:45.735031 TX Bit2 (977~1001) 25 989, Bit10 (970~993) 24 981,
2782 17:50:45.738507 TX Bit3 (977~999) 23 988, Bit11 (971~993) 23 982,
2783 17:50:45.741474 TX Bit4 (979~1004) 26 991, Bit12 (971~994) 24 982,
2784 17:50:45.748286 TX Bit5 (981~1004) 24 992, Bit13 (974~993) 20 983,
2785 17:50:45.751859 TX Bit6 (979~1003) 25 991, Bit14 (970~993) 24 981,
2786 17:50:45.758310 TX Bit7 (979~1002) 24 990, Bit15 (966~987) 22 976,
2787 17:50:45.758410
2788 17:50:45.758484 Write Rank0 MR14 =0x1a
2789 17:50:45.769130
2790 17:50:45.772798 CH=1, VrefRange= 0, VrefLevel = 26
2791 17:50:45.775760 TX Bit0 (979~1006) 28 992, Bit8 (969~991) 23 980,
2792 17:50:45.779026 TX Bit1 (979~1003) 25 991, Bit9 (969~990) 22 979,
2793 17:50:45.786136 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2794 17:50:45.789112 TX Bit3 (976~1000) 25 988, Bit11 (971~994) 24 982,
2795 17:50:45.792482 TX Bit4 (978~1004) 27 991, Bit12 (971~994) 24 982,
2796 17:50:45.799238 TX Bit5 (980~1005) 26 992, Bit13 (974~993) 20 983,
2797 17:50:45.802721 TX Bit6 (979~1003) 25 991, Bit14 (970~993) 24 981,
2798 17:50:45.808909 TX Bit7 (979~1003) 25 991, Bit15 (966~988) 23 977,
2799 17:50:45.809005
2800 17:50:45.809078 Write Rank0 MR14 =0x1c
2801 17:50:45.820344
2802 17:50:45.823750 CH=1, VrefRange= 0, VrefLevel = 28
2803 17:50:45.826733 TX Bit0 (979~1006) 28 992, Bit8 (969~991) 23 980,
2804 17:50:45.829768 TX Bit1 (978~1003) 26 990, Bit9 (969~991) 23 980,
2805 17:50:45.836388 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2806 17:50:45.839947 TX Bit3 (976~1000) 25 988, Bit11 (971~994) 24 982,
2807 17:50:45.843365 TX Bit4 (978~1005) 28 991, Bit12 (971~994) 24 982,
2808 17:50:45.849736 TX Bit5 (980~1005) 26 992, Bit13 (973~994) 22 983,
2809 17:50:45.853222 TX Bit6 (979~1004) 26 991, Bit14 (970~994) 25 982,
2810 17:50:45.859798 TX Bit7 (979~1003) 25 991, Bit15 (966~988) 23 977,
2811 17:50:45.859897
2812 17:50:45.859970 Write Rank0 MR14 =0x1e
2813 17:50:45.870804
2814 17:50:45.870904 CH=1, VrefRange= 0, VrefLevel = 30
2815 17:50:45.877948 TX Bit0 (979~1006) 28 992, Bit8 (969~992) 24 980,
2816 17:50:45.880876 TX Bit1 (978~1005) 28 991, Bit9 (969~991) 23 980,
2817 17:50:45.887847 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2818 17:50:45.890761 TX Bit3 (976~1000) 25 988, Bit11 (971~994) 24 982,
2819 17:50:45.894290 TX Bit4 (978~1005) 28 991, Bit12 (971~994) 24 982,
2820 17:50:45.900764 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2821 17:50:45.904064 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2822 17:50:45.910454 TX Bit7 (978~1004) 27 991, Bit15 (965~988) 24 976,
2823 17:50:45.910552
2824 17:50:45.910626 Write Rank0 MR14 =0x20
2825 17:50:45.921999
2826 17:50:45.924916 CH=1, VrefRange= 0, VrefLevel = 32
2827 17:50:45.928295 TX Bit0 (979~1006) 28 992, Bit8 (969~992) 24 980,
2828 17:50:45.931447 TX Bit1 (978~1005) 28 991, Bit9 (969~991) 23 980,
2829 17:50:45.938166 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2830 17:50:45.941694 TX Bit3 (976~1000) 25 988, Bit11 (971~994) 24 982,
2831 17:50:45.945215 TX Bit4 (978~1005) 28 991, Bit12 (971~994) 24 982,
2832 17:50:45.951689 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2833 17:50:45.954644 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2834 17:50:45.961644 TX Bit7 (978~1004) 27 991, Bit15 (965~988) 24 976,
2835 17:50:45.961742
2836 17:50:45.961817 Write Rank0 MR14 =0x22
2837 17:50:45.972648
2838 17:50:45.975590 CH=1, VrefRange= 0, VrefLevel = 34
2839 17:50:45.979282 TX Bit0 (979~1006) 28 992, Bit8 (969~992) 24 980,
2840 17:50:45.982329 TX Bit1 (978~1005) 28 991, Bit9 (969~991) 23 980,
2841 17:50:45.989215 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2842 17:50:45.992623 TX Bit3 (976~1000) 25 988, Bit11 (971~994) 24 982,
2843 17:50:45.995645 TX Bit4 (978~1005) 28 991, Bit12 (971~994) 24 982,
2844 17:50:46.002585 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2845 17:50:46.005820 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2846 17:50:46.012104 TX Bit7 (978~1004) 27 991, Bit15 (965~988) 24 976,
2847 17:50:46.012200
2848 17:50:46.012274 Write Rank0 MR14 =0x24
2849 17:50:46.023529
2850 17:50:46.026980 CH=1, VrefRange= 0, VrefLevel = 36
2851 17:50:46.029898 TX Bit0 (979~1006) 28 992, Bit8 (969~992) 24 980,
2852 17:50:46.033424 TX Bit1 (978~1005) 28 991, Bit9 (969~991) 23 980,
2853 17:50:46.040024 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2854 17:50:46.043421 TX Bit3 (976~1000) 25 988, Bit11 (971~994) 24 982,
2855 17:50:46.049997 TX Bit4 (978~1005) 28 991, Bit12 (971~994) 24 982,
2856 17:50:46.052998 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2857 17:50:46.056620 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2858 17:50:46.063418 TX Bit7 (978~1004) 27 991, Bit15 (965~988) 24 976,
2859 17:50:46.063515
2860 17:50:46.063590 Write Rank0 MR14 =0x26
2861 17:50:46.074434
2862 17:50:46.074530 CH=1, VrefRange= 0, VrefLevel = 38
2863 17:50:46.081059 TX Bit0 (979~1006) 28 992, Bit8 (969~992) 24 980,
2864 17:50:46.084691 TX Bit1 (978~1005) 28 991, Bit9 (969~991) 23 980,
2865 17:50:46.091222 TX Bit2 (977~1002) 26 989, Bit10 (970~993) 24 981,
2866 17:50:46.094270 TX Bit3 (976~1000) 25 988, Bit11 (971~994) 24 982,
2867 17:50:46.097801 TX Bit4 (978~1005) 28 991, Bit12 (971~994) 24 982,
2868 17:50:46.104648 TX Bit5 (980~1006) 27 993, Bit13 (972~994) 23 983,
2869 17:50:46.107630 TX Bit6 (978~1005) 28 991, Bit14 (970~993) 24 981,
2870 17:50:46.114285 TX Bit7 (978~1004) 27 991, Bit15 (965~988) 24 976,
2871 17:50:46.114381
2872 17:50:46.114455
2873 17:50:46.117587 TX Vref found, early break! 375< 386
2874 17:50:46.120899 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2875 17:50:46.124251 u1DelayCellOfst[0]=5 cells (4 PI)
2876 17:50:46.127206 u1DelayCellOfst[1]=3 cells (3 PI)
2877 17:50:46.130565 u1DelayCellOfst[2]=1 cells (1 PI)
2878 17:50:46.134173 u1DelayCellOfst[3]=0 cells (0 PI)
2879 17:50:46.137143 u1DelayCellOfst[4]=3 cells (3 PI)
2880 17:50:46.140741 u1DelayCellOfst[5]=6 cells (5 PI)
2881 17:50:46.144219 u1DelayCellOfst[6]=3 cells (3 PI)
2882 17:50:46.144313 u1DelayCellOfst[7]=3 cells (3 PI)
2883 17:50:46.147669 Byte0, DQ PI dly=988, DQM PI dly= 990
2884 17:50:46.153879 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
2885 17:50:46.153974
2886 17:50:46.157417 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
2887 17:50:46.157512
2888 17:50:46.160412 u1DelayCellOfst[8]=5 cells (4 PI)
2889 17:50:46.164121 u1DelayCellOfst[9]=5 cells (4 PI)
2890 17:50:46.166975 u1DelayCellOfst[10]=6 cells (5 PI)
2891 17:50:46.170244 u1DelayCellOfst[11]=7 cells (6 PI)
2892 17:50:46.173639 u1DelayCellOfst[12]=7 cells (6 PI)
2893 17:50:46.177018 u1DelayCellOfst[13]=9 cells (7 PI)
2894 17:50:46.180504 u1DelayCellOfst[14]=6 cells (5 PI)
2895 17:50:46.183529 u1DelayCellOfst[15]=0 cells (0 PI)
2896 17:50:46.187182 Byte1, DQ PI dly=976, DQM PI dly= 979
2897 17:50:46.190235 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
2898 17:50:46.190333
2899 17:50:46.193917 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
2900 17:50:46.194012
2901 17:50:46.196925 Write Rank0 MR14 =0x1e
2902 17:50:46.197019
2903 17:50:46.200017 Final TX Range 0 Vref 30
2904 17:50:46.200110
2905 17:50:46.206875 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2906 17:50:46.206969
2907 17:50:46.213513 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2908 17:50:46.220258 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2909 17:50:46.226799 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2910 17:50:46.230048 Write Rank0 MR3 =0xb0
2911 17:50:46.230141 DramC Write-DBI on
2912 17:50:46.230215 ==
2913 17:50:46.236872 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2914 17:50:46.239975 fsp= 1, odt_onoff= 1, Byte mode= 0
2915 17:50:46.240067 ==
2916 17:50:46.243593 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2917 17:50:46.243689
2918 17:50:46.246478 Begin, DQ Scan Range 699~763
2919 17:50:46.246568
2920 17:50:46.246641
2921 17:50:46.249999 TX Vref Scan disable
2922 17:50:46.252972 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2923 17:50:46.256351 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2924 17:50:46.259618 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2925 17:50:46.263100 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2926 17:50:46.266734 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2927 17:50:46.269752 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2928 17:50:46.273317 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2929 17:50:46.276731 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2930 17:50:46.279558 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2931 17:50:46.283287 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2932 17:50:46.286588 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2933 17:50:46.289599 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2934 17:50:46.293155 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2935 17:50:46.296682 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2936 17:50:46.299698 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2937 17:50:46.302859 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2938 17:50:46.306387 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2939 17:50:46.309850 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2940 17:50:46.312775 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2941 17:50:46.319912 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2942 17:50:46.322772 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2943 17:50:46.326058 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2944 17:50:46.329351 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2945 17:50:46.332670 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2946 17:50:46.339329 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2947 17:50:46.342729 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2948 17:50:46.346265 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2949 17:50:46.349342 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2950 17:50:46.352861 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2951 17:50:46.355826 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2952 17:50:46.359416 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2953 17:50:46.362897 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2954 17:50:46.365759 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2955 17:50:46.369044 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2956 17:50:46.372475 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2957 17:50:46.375998 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2958 17:50:46.379075 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2959 17:50:46.382787 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2960 17:50:46.386250 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2961 17:50:46.389104 Byte0, DQ PI dly=736, DQM PI dly= 736
2962 17:50:46.396003 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 32)
2963 17:50:46.396095
2964 17:50:46.399536 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 32)
2965 17:50:46.399629
2966 17:50:46.402464 Byte1, DQ PI dly=724, DQM PI dly= 724
2967 17:50:46.406003 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2968 17:50:46.409111
2969 17:50:46.412669 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2970 17:50:46.412761
2971 17:50:46.418959 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2972 17:50:46.425996 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2973 17:50:46.432585 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2974 17:50:46.435898 Write Rank0 MR3 =0x30
2975 17:50:46.435990 DramC Write-DBI off
2976 17:50:46.436063
2977 17:50:46.439126 [DATLAT]
2978 17:50:46.439217 Freq=1600, CH1 RK0, use_rxtx_scan=0
2979 17:50:46.442188
2980 17:50:46.442277 DATLAT Default: 0xf
2981 17:50:46.445752 7, 0xFFFF, sum=0
2982 17:50:46.445846 8, 0xFFFF, sum=0
2983 17:50:46.445921 9, 0xFFFF, sum=0
2984 17:50:46.449004 10, 0xFFFF, sum=0
2985 17:50:46.449097 11, 0xFFFF, sum=0
2986 17:50:46.452564 12, 0xFFFF, sum=0
2987 17:50:46.452657 13, 0xFFFF, sum=0
2988 17:50:46.455499 14, 0x0, sum=1
2989 17:50:46.455590 15, 0x0, sum=2
2990 17:50:46.458897 16, 0x0, sum=3
2991 17:50:46.458989 17, 0x0, sum=4
2992 17:50:46.461915 pattern=2 first_step=14 total pass=5 best_step=16
2993 17:50:46.465571 ==
2994 17:50:46.468542 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2995 17:50:46.472082 fsp= 1, odt_onoff= 1, Byte mode= 0
2996 17:50:46.472174 ==
2997 17:50:46.475538 Start DQ dly to find pass range UseTestEngine =1
2998 17:50:46.478746 x-axis: bit #, y-axis: DQ dly (-127~63)
2999 17:50:46.481924 RX Vref Scan = 1
3000 17:50:46.589231
3001 17:50:46.589384 RX Vref found, early break!
3002 17:50:46.589460
3003 17:50:46.596026 Final RX Vref 11, apply to both rank0 and 1
3004 17:50:46.596119 ==
3005 17:50:46.599591 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3006 17:50:46.602709 fsp= 1, odt_onoff= 1, Byte mode= 0
3007 17:50:46.602801 ==
3008 17:50:46.602874 DQS Delay:
3009 17:50:46.606192 DQS0 = 0, DQS1 = 0
3010 17:50:46.606284 DQM Delay:
3011 17:50:46.609029 DQM0 = 20, DQM1 = 19
3012 17:50:46.609121 DQ Delay:
3013 17:50:46.612815 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16
3014 17:50:46.615687 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =21
3015 17:50:46.619320 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3016 17:50:46.622413 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =13
3017 17:50:46.622505
3018 17:50:46.622577
3019 17:50:46.622644
3020 17:50:46.626069 [DramC_TX_OE_Calibration] TA2
3021 17:50:46.629101 Original DQ_B0 (3 6) =30, OEN = 27
3022 17:50:46.632722 Original DQ_B1 (3 6) =30, OEN = 27
3023 17:50:46.635450 23, 0x0, End_B0=23 End_B1=23
3024 17:50:46.635594 24, 0x0, End_B0=24 End_B1=24
3025 17:50:46.639093 25, 0x0, End_B0=25 End_B1=25
3026 17:50:46.642617 26, 0x0, End_B0=26 End_B1=26
3027 17:50:46.645592 27, 0x0, End_B0=27 End_B1=27
3028 17:50:46.648927 28, 0x0, End_B0=28 End_B1=28
3029 17:50:46.649022 29, 0x0, End_B0=29 End_B1=29
3030 17:50:46.652123 30, 0x0, End_B0=30 End_B1=30
3031 17:50:46.655374 31, 0xFFFF, End_B0=30 End_B1=30
3032 17:50:46.662260 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3033 17:50:46.665686 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3034 17:50:46.665780
3035 17:50:46.665853
3036 17:50:46.669040 Write Rank0 MR23 =0x3f
3037 17:50:46.669134 [DQSOSC]
3038 17:50:46.678706 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
3039 17:50:46.685355 CH1_RK0: MR19=0x202, MR18=0xC0C0, DQSOSC=447, MR23=63, INC=12, DEC=18
3040 17:50:46.685459 Write Rank0 MR23 =0x3f
3041 17:50:46.685534 [DQSOSC]
3042 17:50:46.695534 [DQSOSCAuto] RK0, (LSB)MR18= 0xbebe, (MSB)MR19= 0x202, tDQSOscB0 = 448 ps tDQSOscB1 = 448 ps
3043 17:50:46.698737 CH1 RK0: MR19=202, MR18=BEBE
3044 17:50:46.702313 [RankSwap] Rank num 2, (Multi 1), Rank 1
3045 17:50:46.702406 Write Rank0 MR2 =0xad
3046 17:50:46.705384 [Write Leveling]
3047 17:50:46.708693 delay byte0 byte1 byte2 byte3
3048 17:50:46.708790
3049 17:50:46.708863 10 0 0
3050 17:50:46.712270 11 0 0
3051 17:50:46.712362 12 0 0
3052 17:50:46.712437 13 0 0
3053 17:50:46.715098 14 0 0
3054 17:50:46.715191 15 0 0
3055 17:50:46.718945 16 0 0
3056 17:50:46.719037 17 0 0
3057 17:50:46.719110 18 0 0
3058 17:50:46.721671 19 0 0
3059 17:50:46.721763 20 0 0
3060 17:50:46.725150 21 0 0
3061 17:50:46.725243 22 0 0
3062 17:50:46.728362 23 0 0
3063 17:50:46.728485 24 0 ff
3064 17:50:46.728592 25 0 ff
3065 17:50:46.731788 26 0 ff
3066 17:50:46.731881 27 0 ff
3067 17:50:46.735370 28 0 ff
3068 17:50:46.735478 29 0 ff
3069 17:50:46.738319 30 0 ff
3070 17:50:46.738441 31 0 ff
3071 17:50:46.741708 32 0 ff
3072 17:50:46.741800 33 0 ff
3073 17:50:46.741874 34 ff ff
3074 17:50:46.745288 35 ff ff
3075 17:50:46.745380 36 ff ff
3076 17:50:46.748680 37 ff ff
3077 17:50:46.748772 38 ff ff
3078 17:50:46.751687 39 ff ff
3079 17:50:46.751809 40 ff ff
3080 17:50:46.758581 pass bytecount = 0xff (0xff: all bytes pass)
3081 17:50:46.758674
3082 17:50:46.758747 DQS0 dly: 34
3083 17:50:46.758813 DQS1 dly: 24
3084 17:50:46.761738 Write Rank0 MR2 =0x2d
3085 17:50:46.764763 [RankSwap] Rank num 2, (Multi 1), Rank 0
3086 17:50:46.768488 Write Rank1 MR1 =0xd6
3087 17:50:46.768578 [Gating]
3088 17:50:46.768651 ==
3089 17:50:46.771848 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3090 17:50:46.775088 fsp= 1, odt_onoff= 1, Byte mode= 0
3091 17:50:46.775208 ==
3092 17:50:46.781798 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3093 17:50:46.784717 3 1 4 |3535 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3094 17:50:46.788332 3 1 8 |3535 2c2b |(0 0)(11 11) |(1 1)(1 0)| 0
3095 17:50:46.794840 3 1 12 |3535 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3096 17:50:46.798370 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3097 17:50:46.801744 3 1 20 |3434 2c2b |(0 0)(11 11) |(0 1)(1 0)| 0
3098 17:50:46.807926 3 1 24 |3434 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3099 17:50:46.811519 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3100 17:50:46.815021 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3101 17:50:46.818052 3 2 4 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3102 17:50:46.824842 3 2 8 |2121 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3103 17:50:46.828323 3 2 12 |3d3d 2c2c |(11 11)(11 0) |(1 1)(0 0)| 0
3104 17:50:46.831769 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3105 17:50:46.838219 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3106 17:50:46.841827 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3107 17:50:46.844745 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3108 17:50:46.851364 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3109 17:50:46.854979 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3110 17:50:46.857979 3 3 8 |504 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3111 17:50:46.861618 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3112 17:50:46.867928 [Byte 0] Lead/lag falling Transition (3, 3, 12)
3113 17:50:46.871614 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3114 17:50:46.874806 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3115 17:50:46.881331 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3116 17:50:46.884713 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3117 17:50:46.888468 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3118 17:50:46.894870 3 4 4 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3119 17:50:46.897873 3 4 8 |1515 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3120 17:50:46.901489 3 4 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3121 17:50:46.907998 3 4 16 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
3122 17:50:46.911518 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3123 17:50:46.914731 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3124 17:50:46.921174 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3125 17:50:46.924722 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3126 17:50:46.927527 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3127 17:50:46.931104 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3128 17:50:46.937534 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3129 17:50:46.940746 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3130 17:50:46.944442 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3131 17:50:46.950802 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3132 17:50:46.954112 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3133 17:50:46.957412 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3134 17:50:46.964035 [Byte 0] Lead/lag Transition tap number (2)
3135 17:50:46.967687 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3136 17:50:46.970634 [Byte 1] Lead/lag falling Transition (3, 6, 0)
3137 17:50:46.974175 3 6 4 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3138 17:50:46.980761 3 6 8 |1e1e 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3139 17:50:46.983986 [Byte 1] Lead/lag Transition tap number (3)
3140 17:50:46.987367 3 6 12 |4646 3e3d |(0 0)(11 11) |(0 0)(0 0)| 0
3141 17:50:46.990520 [Byte 0]First pass (3, 6, 12)
3142 17:50:46.993919 3 6 16 |4646 e0e |(0 0)(11 11) |(0 0)(0 0)| 0
3143 17:50:46.997283 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3144 17:50:47.000762 [Byte 1]First pass (3, 6, 20)
3145 17:50:47.004172 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3146 17:50:47.010612 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3147 17:50:47.014221 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3148 17:50:47.017127 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3149 17:50:47.020545 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3150 17:50:47.024181 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3151 17:50:47.030655 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3152 17:50:47.034076 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3153 17:50:47.037161 All bytes gating window > 1UI, Early break!
3154 17:50:47.037258
3155 17:50:47.040480 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 28)
3156 17:50:47.040571
3157 17:50:47.044002 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 6)
3158 17:50:47.044093
3159 17:50:47.044165
3160 17:50:47.044232
3161 17:50:47.050296 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
3162 17:50:47.050387
3163 17:50:47.053870 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
3164 17:50:47.053961
3165 17:50:47.054032
3166 17:50:47.056878 Write Rank1 MR1 =0x56
3167 17:50:47.056969
3168 17:50:47.057042 best RODT dly(2T, 0.5T) = (2, 2)
3169 17:50:47.060482
3170 17:50:47.060573 best RODT dly(2T, 0.5T) = (2, 3)
3171 17:50:47.063702 ==
3172 17:50:47.067049 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3173 17:50:47.070131 fsp= 1, odt_onoff= 1, Byte mode= 0
3174 17:50:47.070222 ==
3175 17:50:47.073802 Start DQ dly to find pass range UseTestEngine =0
3176 17:50:47.076818 x-axis: bit #, y-axis: DQ dly (-127~63)
3177 17:50:47.080494 RX Vref Scan = 0
3178 17:50:47.083825 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3179 17:50:47.087138 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3180 17:50:47.090172 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3181 17:50:47.090265 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3182 17:50:47.093588 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3183 17:50:47.097134 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3184 17:50:47.100032 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3185 17:50:47.103410 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3186 17:50:47.106797 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3187 17:50:47.110296 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3188 17:50:47.113684 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3189 17:50:47.113776 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3190 17:50:47.116806 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3191 17:50:47.119989 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3192 17:50:47.123735 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3193 17:50:47.126662 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3194 17:50:47.130105 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3195 17:50:47.133645 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3196 17:50:47.136993 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3197 17:50:47.137086 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3198 17:50:47.139953 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3199 17:50:47.143497 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3200 17:50:47.146948 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3201 17:50:47.149755 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3202 17:50:47.153094 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3203 17:50:47.156788 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3204 17:50:47.156882 0, [0] xxooxxxx ooxxxxxo [MSB]
3205 17:50:47.159781 1, [0] xxooxxxx ooxxxxxo [MSB]
3206 17:50:47.163383 2, [0] xxooxxxo ooxxxxxo [MSB]
3207 17:50:47.166522 3, [0] oxoooxxo oooxxxxo [MSB]
3208 17:50:47.170004 4, [0] oxoooxxo oooxxxxo [MSB]
3209 17:50:47.173261 5, [0] oooooxoo ooooooxo [MSB]
3210 17:50:47.173355 32, [0] oooooooo ooooooox [MSB]
3211 17:50:47.176644 33, [0] oooooooo ooooooox [MSB]
3212 17:50:47.179670 34, [0] oooooooo ooooooox [MSB]
3213 17:50:47.183326 35, [0] oooxoooo xxooooox [MSB]
3214 17:50:47.186244 36, [0] oooxoooo xxooooox [MSB]
3215 17:50:47.189668 37, [0] ooxxoooo xxooooox [MSB]
3216 17:50:47.193034 38, [0] ooxxoooo xxooooox [MSB]
3217 17:50:47.193127 39, [0] oxxxxoox xxooooox [MSB]
3218 17:50:47.196465 40, [0] oxxxxoox xxxoooox [MSB]
3219 17:50:47.199561 41, [0] oxxxxoox xxxxxxox [MSB]
3220 17:50:47.202818 42, [0] xxxxxxxx xxxxxxxx [MSB]
3221 17:50:47.206258 iDelay=42, Bit 0, Center 22 (3 ~ 41) 39
3222 17:50:47.209836 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3223 17:50:47.213099 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3224 17:50:47.216361 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3225 17:50:47.219670 iDelay=42, Bit 4, Center 20 (3 ~ 38) 36
3226 17:50:47.223215 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
3227 17:50:47.229446 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3228 17:50:47.232725 iDelay=42, Bit 7, Center 20 (2 ~ 38) 37
3229 17:50:47.236282 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
3230 17:50:47.239784 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
3231 17:50:47.242569 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3232 17:50:47.246083 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3233 17:50:47.249677 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3234 17:50:47.252666 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
3235 17:50:47.256031 iDelay=42, Bit 14, Center 23 (6 ~ 41) 36
3236 17:50:47.259439 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3237 17:50:47.259533 ==
3238 17:50:47.266115 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3239 17:50:47.269143 fsp= 1, odt_onoff= 1, Byte mode= 0
3240 17:50:47.269235 ==
3241 17:50:47.269308 DQS Delay:
3242 17:50:47.272719 DQS0 = 0, DQS1 = 0
3243 17:50:47.272809 DQM Delay:
3244 17:50:47.275763 DQM0 = 20, DQM1 = 19
3245 17:50:47.275854 DQ Delay:
3246 17:50:47.279115 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3247 17:50:47.282586 DQ4 =20, DQ5 =23, DQ6 =23, DQ7 =20
3248 17:50:47.285883 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3249 17:50:47.289484 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =14
3250 17:50:47.289579
3251 17:50:47.289659
3252 17:50:47.289727 DramC Write-DBI off
3253 17:50:47.292745 ==
3254 17:50:47.296115 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3255 17:50:47.299059 fsp= 1, odt_onoff= 1, Byte mode= 0
3256 17:50:47.299150 ==
3257 17:50:47.302628 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3258 17:50:47.302720
3259 17:50:47.306217 Begin, DQ Scan Range 920~1176
3260 17:50:47.306336
3261 17:50:47.306439
3262 17:50:47.309276 TX Vref Scan disable
3263 17:50:47.312878 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
3264 17:50:47.315829 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3265 17:50:47.319492 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3266 17:50:47.322840 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3267 17:50:47.325642 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3268 17:50:47.329289 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3269 17:50:47.332533 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3270 17:50:47.335951 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3271 17:50:47.339287 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3272 17:50:47.345779 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3273 17:50:47.349182 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3274 17:50:47.352826 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3275 17:50:47.355870 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3276 17:50:47.359422 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3277 17:50:47.362379 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3278 17:50:47.365676 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3279 17:50:47.369315 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3280 17:50:47.372400 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3281 17:50:47.375509 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3282 17:50:47.379023 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3283 17:50:47.382546 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3284 17:50:47.385380 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3285 17:50:47.388873 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3286 17:50:47.392342 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3287 17:50:47.399092 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3288 17:50:47.402637 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3289 17:50:47.405497 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3290 17:50:47.408912 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3291 17:50:47.412526 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3292 17:50:47.415593 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3293 17:50:47.419048 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3294 17:50:47.422133 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3295 17:50:47.425686 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3296 17:50:47.428777 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3297 17:50:47.432171 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3298 17:50:47.435307 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3299 17:50:47.438650 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3300 17:50:47.441869 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3301 17:50:47.445205 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3302 17:50:47.448503 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3303 17:50:47.455260 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3304 17:50:47.458572 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3305 17:50:47.461644 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3306 17:50:47.465267 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3307 17:50:47.468605 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3308 17:50:47.471971 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3309 17:50:47.474925 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3310 17:50:47.478595 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3311 17:50:47.481536 968 |3 6 8|[0] xxxxxxxx oxxxxxxo [MSB]
3312 17:50:47.485150 969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]
3313 17:50:47.488547 970 |3 6 10|[0] xxxxxxxx oooxxxxo [MSB]
3314 17:50:47.491599 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3315 17:50:47.494596 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3316 17:50:47.497894 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3317 17:50:47.501706 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3318 17:50:47.505068 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3319 17:50:47.508069 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3320 17:50:47.511614 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3321 17:50:47.518068 978 |3 6 18|[0] xxoooxxx oooooooo [MSB]
3322 17:50:47.521643 979 |3 6 19|[0] ooooooox oooooooo [MSB]
3323 17:50:47.524636 985 |3 6 25|[0] oooooooo ooooooox [MSB]
3324 17:50:47.528266 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3325 17:50:47.531376 987 |3 6 27|[0] oooooooo ooooooox [MSB]
3326 17:50:47.534989 988 |3 6 28|[0] oooooooo oxooooox [MSB]
3327 17:50:47.538002 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
3328 17:50:47.541321 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3329 17:50:47.544749 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3330 17:50:47.548345 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3331 17:50:47.551196 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3332 17:50:47.554786 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3333 17:50:47.561180 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3334 17:50:47.564872 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3335 17:50:47.568003 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
3336 17:50:47.571534 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3337 17:50:47.574847 999 |3 6 39|[0] ooxxoooo xxxxxxxx [MSB]
3338 17:50:47.578063 1000 |3 6 40|[0] ooxxooox xxxxxxxx [MSB]
3339 17:50:47.581716 1001 |3 6 41|[0] oxxxxoxx xxxxxxxx [MSB]
3340 17:50:47.584712 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
3341 17:50:47.587775 Byte0, DQ PI dly=988, DQM PI dly= 988
3342 17:50:47.591349 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3343 17:50:47.591448
3344 17:50:47.597765 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3345 17:50:47.597856
3346 17:50:47.601281 Byte1, DQ PI dly=977, DQM PI dly= 977
3347 17:50:47.604739 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3348 17:50:47.604830
3349 17:50:47.608019 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3350 17:50:47.608123
3351 17:50:47.611104 ==
3352 17:50:47.614314 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3353 17:50:47.617820 fsp= 1, odt_onoff= 1, Byte mode= 0
3354 17:50:47.617910 ==
3355 17:50:47.621252 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3356 17:50:47.621343
3357 17:50:47.624749 Begin, DQ Scan Range 953~1017
3358 17:50:47.627750 Write Rank1 MR14 =0x0
3359 17:50:47.636097
3360 17:50:47.636190 CH=1, VrefRange= 0, VrefLevel = 0
3361 17:50:47.642889 TX Bit0 (982~998) 17 990, Bit8 (970~984) 15 977,
3362 17:50:47.645922 TX Bit1 (982~997) 16 989, Bit9 (971~984) 14 977,
3363 17:50:47.652894 TX Bit2 (980~994) 15 987, Bit10 (974~985) 12 979,
3364 17:50:47.655899 TX Bit3 (978~990) 13 984, Bit11 (975~986) 12 980,
3365 17:50:47.659515 TX Bit4 (981~996) 16 988, Bit12 (975~985) 11 980,
3366 17:50:47.666050 TX Bit5 (983~998) 16 990, Bit13 (975~987) 13 981,
3367 17:50:47.669094 TX Bit6 (982~997) 16 989, Bit14 (975~984) 10 979,
3368 17:50:47.672702 TX Bit7 (983~994) 12 988, Bit15 (968~978) 11 973,
3369 17:50:47.672793
3370 17:50:47.676119 Write Rank1 MR14 =0x2
3371 17:50:47.685147
3372 17:50:47.685237 CH=1, VrefRange= 0, VrefLevel = 2
3373 17:50:47.691789 TX Bit0 (983~998) 16 990, Bit8 (970~984) 15 977,
3374 17:50:47.695359 TX Bit1 (981~997) 17 989, Bit9 (970~984) 15 977,
3375 17:50:47.701730 TX Bit2 (979~994) 16 986, Bit10 (974~985) 12 979,
3376 17:50:47.705348 TX Bit3 (978~991) 14 984, Bit11 (975~987) 13 981,
3377 17:50:47.708902 TX Bit4 (980~997) 18 988, Bit12 (975~985) 11 980,
3378 17:50:47.715253 TX Bit5 (982~998) 17 990, Bit13 (974~988) 15 981,
3379 17:50:47.718467 TX Bit6 (981~997) 17 989, Bit14 (975~985) 11 980,
3380 17:50:47.721521 TX Bit7 (983~995) 13 989, Bit15 (968~978) 11 973,
3381 17:50:47.721613
3382 17:50:47.728093 wait MRW command Rank1 MR14 =0x4 fired (1)
3383 17:50:47.728189 Write Rank1 MR14 =0x4
3384 17:50:47.738361
3385 17:50:47.738451 CH=1, VrefRange= 0, VrefLevel = 4
3386 17:50:47.744972 TX Bit0 (982~999) 18 990, Bit8 (969~984) 16 976,
3387 17:50:47.748504 TX Bit1 (980~998) 19 989, Bit9 (970~984) 15 977,
3388 17:50:47.754631 TX Bit2 (979~995) 17 987, Bit10 (973~986) 14 979,
3389 17:50:47.758155 TX Bit3 (978~991) 14 984, Bit11 (974~988) 15 981,
3390 17:50:47.761941 TX Bit4 (980~997) 18 988, Bit12 (974~986) 13 980,
3391 17:50:47.767976 TX Bit5 (982~999) 18 990, Bit13 (975~989) 15 982,
3392 17:50:47.771623 TX Bit6 (980~998) 19 989, Bit14 (975~986) 12 980,
3393 17:50:47.775196 TX Bit7 (983~996) 14 989, Bit15 (968~980) 13 974,
3394 17:50:47.775287
3395 17:50:47.781814 wait MRW command Rank1 MR14 =0x6 fired (1)
3396 17:50:47.781906 Write Rank1 MR14 =0x6
3397 17:50:47.791575
3398 17:50:47.791665 CH=1, VrefRange= 0, VrefLevel = 6
3399 17:50:47.798173 TX Bit0 (982~999) 18 990, Bit8 (969~985) 17 977,
3400 17:50:47.801193 TX Bit1 (980~998) 19 989, Bit9 (970~985) 16 977,
3401 17:50:47.807995 TX Bit2 (978~996) 19 987, Bit10 (972~987) 16 979,
3402 17:50:47.811561 TX Bit3 (978~992) 15 985, Bit11 (974~988) 15 981,
3403 17:50:47.814605 TX Bit4 (979~998) 20 988, Bit12 (974~987) 14 980,
3404 17:50:47.821169 TX Bit5 (982~999) 18 990, Bit13 (974~990) 17 982,
3405 17:50:47.824575 TX Bit6 (980~998) 19 989, Bit14 (973~987) 15 980,
3406 17:50:47.827922 TX Bit7 (983~997) 15 990, Bit15 (968~981) 14 974,
3407 17:50:47.828014
3408 17:50:47.831073 Write Rank1 MR14 =0x8
3409 17:50:47.840926
3410 17:50:47.841017 CH=1, VrefRange= 0, VrefLevel = 8
3411 17:50:47.847598 TX Bit0 (980~999) 20 989, Bit8 (969~985) 17 977,
3412 17:50:47.850554 TX Bit1 (980~998) 19 989, Bit9 (970~985) 16 977,
3413 17:50:47.857377 TX Bit2 (978~997) 20 987, Bit10 (972~988) 17 980,
3414 17:50:47.860320 TX Bit3 (977~993) 17 985, Bit11 (973~989) 17 981,
3415 17:50:47.863787 TX Bit4 (979~998) 20 988, Bit12 (973~988) 16 980,
3416 17:50:47.870270 TX Bit5 (981~1000) 20 990, Bit13 (973~990) 18 981,
3417 17:50:47.873866 TX Bit6 (979~999) 21 989, Bit14 (972~987) 16 979,
3418 17:50:47.876923 TX Bit7 (981~998) 18 989, Bit15 (967~982) 16 974,
3419 17:50:47.880576
3420 17:50:47.880666 Write Rank1 MR14 =0xa
3421 17:50:47.890034
3422 17:50:47.893578 CH=1, VrefRange= 0, VrefLevel = 10
3423 17:50:47.897102 TX Bit0 (980~1000) 21 990, Bit8 (969~986) 18 977,
3424 17:50:47.900056 TX Bit1 (979~999) 21 989, Bit9 (970~986) 17 978,
3425 17:50:47.906639 TX Bit2 (978~998) 21 988, Bit10 (972~988) 17 980,
3426 17:50:47.910439 TX Bit3 (977~994) 18 985, Bit11 (973~990) 18 981,
3427 17:50:47.913639 TX Bit4 (979~998) 20 988, Bit12 (973~989) 17 981,
3428 17:50:47.920306 TX Bit5 (980~1000) 21 990, Bit13 (972~991) 20 981,
3429 17:50:47.923829 TX Bit6 (979~999) 21 989, Bit14 (973~988) 16 980,
3430 17:50:47.926841 TX Bit7 (982~998) 17 990, Bit15 (968~983) 16 975,
3431 17:50:47.929913
3432 17:50:47.930002 Write Rank1 MR14 =0xc
3433 17:50:47.940267
3434 17:50:47.943147 CH=1, VrefRange= 0, VrefLevel = 12
3435 17:50:47.946722 TX Bit0 (980~1001) 22 990, Bit8 (969~986) 18 977,
3436 17:50:47.950075 TX Bit1 (979~999) 21 989, Bit9 (969~986) 18 977,
3437 17:50:47.956742 TX Bit2 (978~998) 21 988, Bit10 (971~989) 19 980,
3438 17:50:47.960173 TX Bit3 (977~994) 18 985, Bit11 (972~990) 19 981,
3439 17:50:47.963187 TX Bit4 (979~999) 21 989, Bit12 (972~989) 18 980,
3440 17:50:47.969657 TX Bit5 (980~1001) 22 990, Bit13 (972~991) 20 981,
3441 17:50:47.973207 TX Bit6 (979~999) 21 989, Bit14 (972~989) 18 980,
3442 17:50:47.979762 TX Bit7 (980~998) 19 989, Bit15 (967~984) 18 975,
3443 17:50:47.979854
3444 17:50:47.979926 Write Rank1 MR14 =0xe
3445 17:50:47.990125
3446 17:50:47.993130 CH=1, VrefRange= 0, VrefLevel = 14
3447 17:50:47.996695 TX Bit0 (980~1001) 22 990, Bit8 (968~987) 20 977,
3448 17:50:47.999624 TX Bit1 (979~1000) 22 989, Bit9 (969~986) 18 977,
3449 17:50:48.006906 TX Bit2 (978~998) 21 988, Bit10 (971~990) 20 980,
3450 17:50:48.009638 TX Bit3 (977~995) 19 986, Bit11 (972~991) 20 981,
3451 17:50:48.013322 TX Bit4 (978~999) 22 988, Bit12 (972~990) 19 981,
3452 17:50:48.019800 TX Bit5 (980~1001) 22 990, Bit13 (972~991) 20 981,
3453 17:50:48.022792 TX Bit6 (979~1000) 22 989, Bit14 (972~990) 19 981,
3454 17:50:48.029525 TX Bit7 (980~999) 20 989, Bit15 (967~984) 18 975,
3455 17:50:48.029619
3456 17:50:48.029693 Write Rank1 MR14 =0x10
3457 17:50:48.040025
3458 17:50:48.043025 CH=1, VrefRange= 0, VrefLevel = 16
3459 17:50:48.046664 TX Bit0 (980~1001) 22 990, Bit8 (968~987) 20 977,
3460 17:50:48.050175 TX Bit1 (978~1000) 23 989, Bit9 (968~987) 20 977,
3461 17:50:48.056574 TX Bit2 (978~998) 21 988, Bit10 (970~990) 21 980,
3462 17:50:48.060033 TX Bit3 (976~996) 21 986, Bit11 (971~991) 21 981,
3463 17:50:48.063039 TX Bit4 (978~1000) 23 989, Bit12 (972~991) 20 981,
3464 17:50:48.069781 TX Bit5 (979~1001) 23 990, Bit13 (972~992) 21 982,
3465 17:50:48.073543 TX Bit6 (979~1000) 22 989, Bit14 (971~990) 20 980,
3466 17:50:48.079970 TX Bit7 (980~999) 20 989, Bit15 (966~984) 19 975,
3467 17:50:48.080065
3468 17:50:48.080139 Write Rank1 MR14 =0x12
3469 17:50:48.090216
3470 17:50:48.093852 CH=1, VrefRange= 0, VrefLevel = 18
3471 17:50:48.096803 TX Bit0 (979~1002) 24 990, Bit8 (968~988) 21 978,
3472 17:50:48.100394 TX Bit1 (978~1000) 23 989, Bit9 (969~988) 20 978,
3473 17:50:48.106800 TX Bit2 (977~999) 23 988, Bit10 (970~991) 22 980,
3474 17:50:48.110348 TX Bit3 (976~997) 22 986, Bit11 (971~991) 21 981,
3475 17:50:48.114010 TX Bit4 (978~1000) 23 989, Bit12 (971~991) 21 981,
3476 17:50:48.119877 TX Bit5 (979~1002) 24 990, Bit13 (971~992) 22 981,
3477 17:50:48.123645 TX Bit6 (978~1001) 24 989, Bit14 (970~991) 22 980,
3478 17:50:48.130324 TX Bit7 (980~1000) 21 990, Bit15 (966~985) 20 975,
3479 17:50:48.130450
3480 17:50:48.130554 Write Rank1 MR14 =0x14
3481 17:50:48.141172
3482 17:50:48.144334 CH=1, VrefRange= 0, VrefLevel = 20
3483 17:50:48.147413 TX Bit0 (979~1003) 25 991, Bit8 (968~989) 22 978,
3484 17:50:48.151139 TX Bit1 (979~1001) 23 990, Bit9 (968~989) 22 978,
3485 17:50:48.157332 TX Bit2 (977~999) 23 988, Bit10 (970~991) 22 980,
3486 17:50:48.160801 TX Bit3 (976~997) 22 986, Bit11 (971~992) 22 981,
3487 17:50:48.164408 TX Bit4 (978~1001) 24 989, Bit12 (971~991) 21 981,
3488 17:50:48.170735 TX Bit5 (979~1002) 24 990, Bit13 (971~992) 22 981,
3489 17:50:48.174541 TX Bit6 (978~1001) 24 989, Bit14 (970~991) 22 980,
3490 17:50:48.181147 TX Bit7 (979~1000) 22 989, Bit15 (966~985) 20 975,
3491 17:50:48.181241
3492 17:50:48.181314 Write Rank1 MR14 =0x16
3493 17:50:48.191718
3494 17:50:48.194773 CH=1, VrefRange= 0, VrefLevel = 22
3495 17:50:48.198541 TX Bit0 (979~1003) 25 991, Bit8 (968~989) 22 978,
3496 17:50:48.201490 TX Bit1 (978~1001) 24 989, Bit9 (969~989) 21 979,
3497 17:50:48.208438 TX Bit2 (977~999) 23 988, Bit10 (970~991) 22 980,
3498 17:50:48.211265 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3499 17:50:48.214909 TX Bit4 (978~1001) 24 989, Bit12 (970~992) 23 981,
3500 17:50:48.221567 TX Bit5 (978~1003) 26 990, Bit13 (971~992) 22 981,
3501 17:50:48.224533 TX Bit6 (978~1002) 25 990, Bit14 (970~991) 22 980,
3502 17:50:48.231172 TX Bit7 (979~1001) 23 990, Bit15 (966~985) 20 975,
3503 17:50:48.231264
3504 17:50:48.231336 Write Rank1 MR14 =0x18
3505 17:50:48.242272
3506 17:50:48.245779 CH=1, VrefRange= 0, VrefLevel = 24
3507 17:50:48.248718 TX Bit0 (978~1004) 27 991, Bit8 (968~990) 23 979,
3508 17:50:48.252251 TX Bit1 (978~1002) 25 990, Bit9 (969~990) 22 979,
3509 17:50:48.258779 TX Bit2 (977~1000) 24 988, Bit10 (970~992) 23 981,
3510 17:50:48.262274 TX Bit3 (975~998) 24 986, Bit11 (970~993) 24 981,
3511 17:50:48.265266 TX Bit4 (978~1002) 25 990, Bit12 (970~992) 23 981,
3512 17:50:48.272254 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3513 17:50:48.275295 TX Bit6 (978~1002) 25 990, Bit14 (970~992) 23 981,
3514 17:50:48.282238 TX Bit7 (979~1001) 23 990, Bit15 (965~986) 22 975,
3515 17:50:48.282454
3516 17:50:48.282612 Write Rank1 MR14 =0x1a
3517 17:50:48.293377
3518 17:50:48.296696 CH=1, VrefRange= 0, VrefLevel = 26
3519 17:50:48.299617 TX Bit0 (978~1004) 27 991, Bit8 (968~991) 24 979,
3520 17:50:48.303100 TX Bit1 (977~1002) 26 989, Bit9 (968~991) 24 979,
3521 17:50:48.309561 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
3522 17:50:48.312863 TX Bit3 (975~999) 25 987, Bit11 (970~992) 23 981,
3523 17:50:48.316179 TX Bit4 (978~1002) 25 990, Bit12 (970~992) 23 981,
3524 17:50:48.323303 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3525 17:50:48.326321 TX Bit6 (978~1003) 26 990, Bit14 (970~992) 23 981,
3526 17:50:48.333012 TX Bit7 (979~1002) 24 990, Bit15 (965~986) 22 975,
3527 17:50:48.333118
3528 17:50:48.333193 Write Rank1 MR14 =0x1c
3529 17:50:48.344306
3530 17:50:48.347161 CH=1, VrefRange= 0, VrefLevel = 28
3531 17:50:48.350840 TX Bit0 (978~1005) 28 991, Bit8 (968~991) 24 979,
3532 17:50:48.353897 TX Bit1 (977~1003) 27 990, Bit9 (968~991) 24 979,
3533 17:50:48.360936 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3534 17:50:48.363947 TX Bit3 (975~998) 24 986, Bit11 (970~993) 24 981,
3535 17:50:48.367428 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3536 17:50:48.373829 TX Bit5 (978~1005) 28 991, Bit13 (970~993) 24 981,
3537 17:50:48.377700 TX Bit6 (978~1003) 26 990, Bit14 (969~992) 24 980,
3538 17:50:48.384251 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3539 17:50:48.384343
3540 17:50:48.384416 Write Rank1 MR14 =0x1e
3541 17:50:48.395378
3542 17:50:48.398546 CH=1, VrefRange= 0, VrefLevel = 30
3543 17:50:48.401651 TX Bit0 (978~1005) 28 991, Bit8 (968~991) 24 979,
3544 17:50:48.405289 TX Bit1 (977~1003) 27 990, Bit9 (968~991) 24 979,
3545 17:50:48.411641 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3546 17:50:48.415249 TX Bit3 (975~998) 24 986, Bit11 (970~993) 24 981,
3547 17:50:48.418160 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3548 17:50:48.425244 TX Bit5 (978~1005) 28 991, Bit13 (970~993) 24 981,
3549 17:50:48.428339 TX Bit6 (978~1003) 26 990, Bit14 (969~992) 24 980,
3550 17:50:48.435002 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3551 17:50:48.435126
3552 17:50:48.435230 Write Rank1 MR14 =0x20
3553 17:50:48.445880
3554 17:50:48.449215 CH=1, VrefRange= 0, VrefLevel = 32
3555 17:50:48.452772 TX Bit0 (978~1005) 28 991, Bit8 (968~991) 24 979,
3556 17:50:48.455751 TX Bit1 (977~1003) 27 990, Bit9 (968~991) 24 979,
3557 17:50:48.462926 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3558 17:50:48.465913 TX Bit3 (975~998) 24 986, Bit11 (970~993) 24 981,
3559 17:50:48.469654 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3560 17:50:48.476192 TX Bit5 (978~1005) 28 991, Bit13 (970~993) 24 981,
3561 17:50:48.479164 TX Bit6 (978~1003) 26 990, Bit14 (969~992) 24 980,
3562 17:50:48.485916 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3563 17:50:48.486009
3564 17:50:48.486082 Write Rank1 MR14 =0x22
3565 17:50:48.497132
3566 17:50:48.500737 CH=1, VrefRange= 0, VrefLevel = 34
3567 17:50:48.503835 TX Bit0 (978~1005) 28 991, Bit8 (968~991) 24 979,
3568 17:50:48.507036 TX Bit1 (977~1003) 27 990, Bit9 (968~991) 24 979,
3569 17:50:48.514011 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3570 17:50:48.517070 TX Bit3 (975~998) 24 986, Bit11 (970~993) 24 981,
3571 17:50:48.520652 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3572 17:50:48.526944 TX Bit5 (978~1005) 28 991, Bit13 (970~993) 24 981,
3573 17:50:48.530485 TX Bit6 (978~1003) 26 990, Bit14 (969~992) 24 980,
3574 17:50:48.537016 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3575 17:50:48.537110
3576 17:50:48.537186 Write Rank1 MR14 =0x24
3577 17:50:48.548347
3578 17:50:48.551572 CH=1, VrefRange= 0, VrefLevel = 36
3579 17:50:48.554893 TX Bit0 (978~1005) 28 991, Bit8 (968~991) 24 979,
3580 17:50:48.557957 TX Bit1 (977~1003) 27 990, Bit9 (968~991) 24 979,
3581 17:50:48.564509 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3582 17:50:48.568125 TX Bit3 (975~998) 24 986, Bit11 (970~993) 24 981,
3583 17:50:48.571099 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3584 17:50:48.577763 TX Bit5 (978~1005) 28 991, Bit13 (970~993) 24 981,
3585 17:50:48.581404 TX Bit6 (978~1003) 26 990, Bit14 (969~992) 24 980,
3586 17:50:48.588198 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3587 17:50:48.588291
3588 17:50:48.588364 Write Rank1 MR14 =0x26
3589 17:50:48.598959
3590 17:50:48.602257 CH=1, VrefRange= 0, VrefLevel = 38
3591 17:50:48.605822 TX Bit0 (978~1005) 28 991, Bit8 (968~991) 24 979,
3592 17:50:48.608866 TX Bit1 (977~1003) 27 990, Bit9 (968~991) 24 979,
3593 17:50:48.615576 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3594 17:50:48.618823 TX Bit3 (975~998) 24 986, Bit11 (970~993) 24 981,
3595 17:50:48.622031 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3596 17:50:48.628888 TX Bit5 (978~1005) 28 991, Bit13 (970~993) 24 981,
3597 17:50:48.632325 TX Bit6 (978~1003) 26 990, Bit14 (969~992) 24 980,
3598 17:50:48.638782 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3599 17:50:48.638874
3600 17:50:48.638952
3601 17:50:48.642240 TX Vref found, early break! 379< 380
3602 17:50:48.645596 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3603 17:50:48.649041 u1DelayCellOfst[0]=6 cells (5 PI)
3604 17:50:48.652254 u1DelayCellOfst[1]=5 cells (4 PI)
3605 17:50:48.655267 u1DelayCellOfst[2]=3 cells (3 PI)
3606 17:50:48.658494 u1DelayCellOfst[3]=0 cells (0 PI)
3607 17:50:48.662083 u1DelayCellOfst[4]=5 cells (4 PI)
3608 17:50:48.665744 u1DelayCellOfst[5]=6 cells (5 PI)
3609 17:50:48.665837 u1DelayCellOfst[6]=5 cells (4 PI)
3610 17:50:48.668785 u1DelayCellOfst[7]=5 cells (4 PI)
3611 17:50:48.672412 Byte0, DQ PI dly=986, DQM PI dly= 988
3612 17:50:48.679027 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3613 17:50:48.679149
3614 17:50:48.682044 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3615 17:50:48.682136
3616 17:50:48.685656 u1DelayCellOfst[8]=5 cells (4 PI)
3617 17:50:48.688655 u1DelayCellOfst[9]=5 cells (4 PI)
3618 17:50:48.692200 u1DelayCellOfst[10]=6 cells (5 PI)
3619 17:50:48.695267 u1DelayCellOfst[11]=7 cells (6 PI)
3620 17:50:48.698867 u1DelayCellOfst[12]=7 cells (6 PI)
3621 17:50:48.701835 u1DelayCellOfst[13]=7 cells (6 PI)
3622 17:50:48.705386 u1DelayCellOfst[14]=6 cells (5 PI)
3623 17:50:48.708858 u1DelayCellOfst[15]=0 cells (0 PI)
3624 17:50:48.712209 Byte1, DQ PI dly=975, DQM PI dly= 978
3625 17:50:48.715219 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
3626 17:50:48.715311
3627 17:50:48.718288 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
3628 17:50:48.718380
3629 17:50:48.721963 Write Rank1 MR14 =0x1c
3630 17:50:48.722054
3631 17:50:48.725235 Final TX Range 0 Vref 28
3632 17:50:48.725327
3633 17:50:48.731743 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3634 17:50:48.731838
3635 17:50:48.738419 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3636 17:50:48.745064 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3637 17:50:48.752066 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3638 17:50:48.755234 wait MRW command Rank1 MR3 =0xb0 fired (1)
3639 17:50:48.758235 Write Rank1 MR3 =0xb0
3640 17:50:48.758328 DramC Write-DBI on
3641 17:50:48.758401 ==
3642 17:50:48.765196 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3643 17:50:48.768459 fsp= 1, odt_onoff= 1, Byte mode= 0
3644 17:50:48.768560 ==
3645 17:50:48.771432 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3646 17:50:48.771526
3647 17:50:48.775078 Begin, DQ Scan Range 698~762
3648 17:50:48.775170
3649 17:50:48.775242
3650 17:50:48.778281 TX Vref Scan disable
3651 17:50:48.781349 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3652 17:50:48.784934 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3653 17:50:48.788554 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3654 17:50:48.791495 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3655 17:50:48.795094 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3656 17:50:48.798095 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3657 17:50:48.801725 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3658 17:50:48.804722 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3659 17:50:48.808312 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3660 17:50:48.811315 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3661 17:50:48.814892 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3662 17:50:48.818309 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3663 17:50:48.821179 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3664 17:50:48.824793 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3665 17:50:48.828396 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3666 17:50:48.831240 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3667 17:50:48.834791 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3668 17:50:48.838175 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3669 17:50:48.841264 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3670 17:50:48.848001 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3671 17:50:48.851325 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3672 17:50:48.854819 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3673 17:50:48.857935 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3674 17:50:48.861440 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3675 17:50:48.868190 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3676 17:50:48.871261 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3677 17:50:48.874359 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3678 17:50:48.877856 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3679 17:50:48.881216 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3680 17:50:48.884637 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3681 17:50:48.887614 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3682 17:50:48.891063 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3683 17:50:48.894121 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3684 17:50:48.898045 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3685 17:50:48.901066 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3686 17:50:48.904694 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3687 17:50:48.907663 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3688 17:50:48.911184 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3689 17:50:48.914887 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3690 17:50:48.918040 Byte0, DQ PI dly=735, DQM PI dly= 735
3691 17:50:48.924818 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
3692 17:50:48.924943
3693 17:50:48.928218 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
3694 17:50:48.928312
3695 17:50:48.931236 Byte1, DQ PI dly=723, DQM PI dly= 723
3696 17:50:48.934725 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3697 17:50:48.934817
3698 17:50:48.941160 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3699 17:50:48.941272
3700 17:50:48.948010 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3701 17:50:48.954799 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3702 17:50:48.961484 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3703 17:50:48.964397 Write Rank1 MR3 =0x30
3704 17:50:48.964513 DramC Write-DBI off
3705 17:50:48.964587
3706 17:50:48.964654 [DATLAT]
3707 17:50:48.967818 Freq=1600, CH1 RK1, use_rxtx_scan=0
3708 17:50:48.967915
3709 17:50:48.971238 DATLAT Default: 0x10
3710 17:50:48.971363 7, 0xFFFF, sum=0
3711 17:50:48.974605 8, 0xFFFF, sum=0
3712 17:50:48.974700 9, 0xFFFF, sum=0
3713 17:50:48.978078 10, 0xFFFF, sum=0
3714 17:50:48.978183 11, 0xFFFF, sum=0
3715 17:50:48.981065 12, 0xFFFF, sum=0
3716 17:50:48.981159 13, 0xFFFF, sum=0
3717 17:50:48.984630 14, 0x0, sum=1
3718 17:50:48.984724 15, 0x0, sum=2
3719 17:50:48.988054 16, 0x0, sum=3
3720 17:50:48.988150 17, 0x0, sum=4
3721 17:50:48.991039 pattern=2 first_step=14 total pass=5 best_step=16
3722 17:50:48.991133 ==
3723 17:50:48.997957 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3724 17:50:49.001290 fsp= 1, odt_onoff= 1, Byte mode= 0
3725 17:50:49.001399 ==
3726 17:50:49.004849 Start DQ dly to find pass range UseTestEngine =1
3727 17:50:49.007987 x-axis: bit #, y-axis: DQ dly (-127~63)
3728 17:50:49.011153 RX Vref Scan = 0
3729 17:50:49.014629 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3730 17:50:49.014725 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3731 17:50:49.017642 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3732 17:50:49.021188 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3733 17:50:49.024717 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3734 17:50:49.027708 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3735 17:50:49.031047 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3736 17:50:49.034620 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3737 17:50:49.037445 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3738 17:50:49.040777 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3739 17:50:49.040871 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3740 17:50:49.044319 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3741 17:50:49.047939 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3742 17:50:49.050839 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3743 17:50:49.054233 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3744 17:50:49.057635 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3745 17:50:49.060935 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3746 17:50:49.064420 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3747 17:50:49.064514 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3748 17:50:49.067495 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3749 17:50:49.071071 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3750 17:50:49.074603 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3751 17:50:49.077541 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3752 17:50:49.081103 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3753 17:50:49.084505 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3754 17:50:49.084611 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3755 17:50:49.087876 0, [0] xxooxxxx ooxxxxxo [MSB]
3756 17:50:49.090821 1, [0] xxooxxxx ooxxxxxo [MSB]
3757 17:50:49.094429 2, [0] xxooxxxx ooxxxxxo [MSB]
3758 17:50:49.097458 3, [0] oxooxxxo oooxxxxo [MSB]
3759 17:50:49.101176 4, [0] oooooxxo ooooooxo [MSB]
3760 17:50:49.101305 5, [0] ooooooxo oooooooo [MSB]
3761 17:50:49.105940 32, [0] oooooooo ooooooox [MSB]
3762 17:50:49.109225 33, [0] oooooooo ooooooox [MSB]
3763 17:50:49.112775 34, [0] oooooooo ooooooox [MSB]
3764 17:50:49.116160 35, [0] oooxoooo xxooooox [MSB]
3765 17:50:49.119414 36, [0] oooxoooo xxooooox [MSB]
3766 17:50:49.122866 37, [0] ooxxoooo xxooooox [MSB]
3767 17:50:49.123009 38, [0] ooxxoooo xxooooox [MSB]
3768 17:50:49.125913 39, [0] ooxxooox xxooooox [MSB]
3769 17:50:49.129094 40, [0] oxxxxoox xxxoooox [MSB]
3770 17:50:49.132692 41, [0] xxxxxxox xxxxxxxx [MSB]
3771 17:50:49.136145 42, [0] xxxxxxxx xxxxxxxx [MSB]
3772 17:50:49.139558 iDelay=42, Bit 0, Center 21 (3 ~ 40) 38
3773 17:50:49.142490 iDelay=42, Bit 1, Center 21 (4 ~ 39) 36
3774 17:50:49.145811 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3775 17:50:49.149359 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3776 17:50:49.152354 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3777 17:50:49.155799 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3778 17:50:49.159321 iDelay=42, Bit 6, Center 23 (6 ~ 41) 36
3779 17:50:49.162718 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3780 17:50:49.169171 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
3781 17:50:49.172685 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
3782 17:50:49.175673 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3783 17:50:49.179170 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3784 17:50:49.182626 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3785 17:50:49.185541 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
3786 17:50:49.188920 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3787 17:50:49.192345 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3788 17:50:49.192455 ==
3789 17:50:49.198858 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3790 17:50:49.202471 fsp= 1, odt_onoff= 1, Byte mode= 0
3791 17:50:49.202578 ==
3792 17:50:49.202676 DQS Delay:
3793 17:50:49.205378 DQS0 = 0, DQS1 = 0
3794 17:50:49.205477 DQM Delay:
3795 17:50:49.208891 DQM0 = 20, DQM1 = 19
3796 17:50:49.208993 DQ Delay:
3797 17:50:49.212322 DQ0 =21, DQ1 =21, DQ2 =18, DQ3 =16
3798 17:50:49.215315 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3799 17:50:49.218941 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3800 17:50:49.221963 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
3801 17:50:49.222053
3802 17:50:49.222145
3803 17:50:49.222237
3804 17:50:49.225328 [DramC_TX_OE_Calibration] TA2
3805 17:50:49.229028 Original DQ_B0 (3 6) =30, OEN = 27
3806 17:50:49.232302 Original DQ_B1 (3 6) =30, OEN = 27
3807 17:50:49.232398 23, 0x0, End_B0=23 End_B1=23
3808 17:50:49.235525 24, 0x0, End_B0=24 End_B1=24
3809 17:50:49.238941 25, 0x0, End_B0=25 End_B1=25
3810 17:50:49.242298 26, 0x0, End_B0=26 End_B1=26
3811 17:50:49.242395 27, 0x0, End_B0=27 End_B1=27
3812 17:50:49.245002 28, 0x0, End_B0=28 End_B1=28
3813 17:50:49.248462 29, 0x0, End_B0=29 End_B1=29
3814 17:50:49.252115 30, 0x0, End_B0=30 End_B1=30
3815 17:50:49.255111 31, 0xFFFF, End_B0=30 End_B1=30
3816 17:50:49.258667 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3817 17:50:49.265063 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3818 17:50:49.265168
3819 17:50:49.265265
3820 17:50:49.268694 Write Rank1 MR23 =0x3f
3821 17:50:49.268790 [DQSOSC]
3822 17:50:49.275093 [DQSOSCAuto] RK1, (LSB)MR18= 0xcccc, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
3823 17:50:49.282100 CH1_RK1: MR19=0x202, MR18=0xCCCC, DQSOSC=439, MR23=63, INC=12, DEC=19
3824 17:50:49.285456 Write Rank1 MR23 =0x3f
3825 17:50:49.285554 [DQSOSC]
3826 17:50:49.295342 [DQSOSCAuto] RK1, (LSB)MR18= 0xcaca, (MSB)MR19= 0x202, tDQSOscB0 = 441 ps tDQSOscB1 = 441 ps
3827 17:50:49.295481 CH1 RK1: MR19=202, MR18=CACA
3828 17:50:49.298837 [RxdqsGatingPostProcess] freq 1600
3829 17:50:49.305324 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3830 17:50:49.305459 Rank: 0
3831 17:50:49.308954 best DQS0 dly(2T, 0.5T) = (2, 6)
3832 17:50:49.312055 best DQS1 dly(2T, 0.5T) = (2, 6)
3833 17:50:49.315593 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3834 17:50:49.318562 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3835 17:50:49.318668 Rank: 1
3836 17:50:49.322167 best DQS0 dly(2T, 0.5T) = (2, 5)
3837 17:50:49.325247 best DQS1 dly(2T, 0.5T) = (2, 6)
3838 17:50:49.328736 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3839 17:50:49.332319 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3840 17:50:49.335288 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3841 17:50:49.338864 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3842 17:50:49.345260 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3843 17:50:49.345397
3844 17:50:49.345503
3845 17:50:49.348568 [Calibration Summary] Freqency 1600
3846 17:50:49.348670 CH 0, Rank 0
3847 17:50:49.348768 All Pass.
3848 17:50:49.348859
3849 17:50:49.352023 CH 0, Rank 1
3850 17:50:49.352123 All Pass.
3851 17:50:49.352220
3852 17:50:49.352311 CH 1, Rank 0
3853 17:50:49.355089 All Pass.
3854 17:50:49.355185
3855 17:50:49.355299 CH 1, Rank 1
3856 17:50:49.355417 All Pass.
3857 17:50:49.355505
3858 17:50:49.361843 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3859 17:50:49.371348 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3860 17:50:49.377962 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3861 17:50:49.378059 Write Rank0 MR3 =0xb0
3862 17:50:49.384865 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3863 17:50:49.391282 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3864 17:50:49.401464 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3865 17:50:49.401570 Write Rank1 MR3 =0xb0
3866 17:50:49.407878 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3867 17:50:49.414503 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3868 17:50:49.420969 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3869 17:50:49.424578 Write Rank0 MR3 =0xb0
3870 17:50:49.431070 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3871 17:50:49.438032 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3872 17:50:49.444498 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3873 17:50:49.447548 Write Rank1 MR3 =0xb0
3874 17:50:49.447670 DramC Write-DBI on
3875 17:50:49.451201 [GetDramInforAfterCalByMRR] Vendor 6.
3876 17:50:49.454481 [GetDramInforAfterCalByMRR] Revision 505.
3877 17:50:49.458115 MR8 1111
3878 17:50:49.460864 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3879 17:50:49.460974 MR8 1111
3880 17:50:49.467741 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3881 17:50:49.467870 MR8 1111
3882 17:50:49.471011 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3883 17:50:49.474743 MR8 1111
3884 17:50:49.477752 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3885 17:50:49.487872 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3886 17:50:49.488007 Write Rank0 MR13 =0xd0
3887 17:50:49.491454 Write Rank1 MR13 =0xd0
3888 17:50:49.494537 Write Rank0 MR13 =0xd0
3889 17:50:49.494628 Write Rank1 MR13 =0xd0
3890 17:50:49.498046 Save calibration result to emmc
3891 17:50:49.498138
3892 17:50:49.498210
3893 17:50:49.501233 [DramcModeReg_Check] Freq_1600, FSP_1
3894 17:50:49.504531 FSP_1, CH_0, RK0
3895 17:50:49.504623 Write Rank0 MR13 =0xd8
3896 17:50:49.507718 MR12 = 0x60 (global = 0x60) match
3897 17:50:49.510929 MR14 = 0x1c (global = 0x1c) match
3898 17:50:49.514378 FSP_1, CH_0, RK1
3899 17:50:49.514470 Write Rank1 MR13 =0xd8
3900 17:50:49.517929 MR12 = 0x60 (global = 0x60) match
3901 17:50:49.520969 MR14 = 0x20 (global = 0x20) match
3902 17:50:49.524388 FSP_1, CH_1, RK0
3903 17:50:49.524485 Write Rank0 MR13 =0xd8
3904 17:50:49.527976 MR12 = 0x60 (global = 0x60) match
3905 17:50:49.530934 MR14 = 0x1e (global = 0x1e) match
3906 17:50:49.534566 FSP_1, CH_1, RK1
3907 17:50:49.534658 Write Rank1 MR13 =0xd8
3908 17:50:49.537937 MR12 = 0x60 (global = 0x60) match
3909 17:50:49.540863 MR14 = 0x1c (global = 0x1c) match
3910 17:50:49.540955
3911 17:50:49.547912 [MEM_TEST] 02: After DFS, before run time config
3912 17:50:49.554497 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3913 17:50:49.554621
3914 17:50:49.557517 [TA2_TEST]
3915 17:50:49.557608 === TA2 HW
3916 17:50:49.560911 TA2 PAT: XTALK
3917 17:50:49.564046 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3918 17:50:49.567714 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3919 17:50:49.574597 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3920 17:50:49.577539 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3921 17:50:49.577630
3922 17:50:49.577702
3923 17:50:49.580710 Settings after calibration
3924 17:50:49.580802
3925 17:50:49.584309 [DramcRunTimeConfig]
3926 17:50:49.587351 TransferPLLToSPMControl - MODE SW PHYPLL
3927 17:50:49.587465 TX_TRACKING: ON
3928 17:50:49.590930 RX_TRACKING: ON
3929 17:50:49.591021 HW_GATING: ON
3930 17:50:49.594444 HW_GATING DBG: OFF
3931 17:50:49.594535 ddr_geometry:1
3932 17:50:49.597392 ddr_geometry:1
3933 17:50:49.597483 ddr_geometry:1
3934 17:50:49.597554 ddr_geometry:1
3935 17:50:49.601226 ddr_geometry:1
3936 17:50:49.601316 ddr_geometry:1
3937 17:50:49.603968 ddr_geometry:1
3938 17:50:49.604058 ddr_geometry:1
3939 17:50:49.607389 High Freq DUMMY_READ_FOR_TRACKING: ON
3940 17:50:49.611038 ZQCS_ENABLE_LP4: OFF
3941 17:50:49.614371 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3942 17:50:49.614465 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3943 17:50:49.617557 SPM_CONTROL_AFTERK: ON
3944 17:50:49.620679 IMPEDANCE_TRACKING: ON
3945 17:50:49.620769 TEMP_SENSOR: ON
3946 17:50:49.624365 PER_BANK_REFRESH: ON
3947 17:50:49.624455 HW_SAVE_FOR_SR: ON
3948 17:50:49.627205 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3949 17:50:49.630672 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3950 17:50:49.633707 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3951 17:50:49.637275 Read ODT Tracking: ON
3952 17:50:49.640798 =========================
3953 17:50:49.640890
3954 17:50:49.640969 [TA2_TEST]
3955 17:50:49.641037 === TA2 HW
3956 17:50:49.647098 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3957 17:50:49.650774 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3958 17:50:49.657211 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3959 17:50:49.660625 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3960 17:50:49.660750
3961 17:50:49.663642 [MEM_TEST] 03: After run time config
3962 17:50:49.674842 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3963 17:50:49.678412 [complex_mem_test] start addr:0x40024000, len:131072
3964 17:50:49.882593 1st complex R/W mem test pass
3965 17:50:49.889156 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3966 17:50:49.892590 sync preloader write leveling
3967 17:50:49.896093 sync preloader cbt_mr12
3968 17:50:49.899526 sync preloader cbt_clk_dly
3969 17:50:49.899623 sync preloader cbt_cmd_dly
3970 17:50:49.902414 sync preloader cbt_cs
3971 17:50:49.905950 sync preloader cbt_ca_perbit_delay
3972 17:50:49.906075 sync preloader clk_delay
3973 17:50:49.908950 sync preloader dqs_delay
3974 17:50:49.912537 sync preloader u1Gating2T_Save
3975 17:50:49.915926 sync preloader u1Gating05T_Save
3976 17:50:49.919219 sync preloader u1Gatingfine_tune_Save
3977 17:50:49.922349 sync preloader u1Gatingucpass_count_Save
3978 17:50:49.925956 sync preloader u1TxWindowPerbitVref_Save
3979 17:50:49.929020 sync preloader u1TxCenter_min_Save
3980 17:50:49.932619 sync preloader u1TxCenter_max_Save
3981 17:50:49.935612 sync preloader u1Txwin_center_Save
3982 17:50:49.939172 sync preloader u1Txfirst_pass_Save
3983 17:50:49.942578 sync preloader u1Txlast_pass_Save
3984 17:50:49.945394 sync preloader u1RxDatlat_Save
3985 17:50:49.948863 sync preloader u1RxWinPerbitVref_Save
3986 17:50:49.952169 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3987 17:50:49.955617 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3988 17:50:49.958821 sync preloader delay_cell_unit
3989 17:50:49.965784 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3990 17:50:49.968763 sync preloader write leveling
3991 17:50:49.968857 sync preloader cbt_mr12
3992 17:50:49.971860 sync preloader cbt_clk_dly
3993 17:50:49.975398 sync preloader cbt_cmd_dly
3994 17:50:49.975500 sync preloader cbt_cs
3995 17:50:49.978522 sync preloader cbt_ca_perbit_delay
3996 17:50:49.982141 sync preloader clk_delay
3997 17:50:49.985521 sync preloader dqs_delay
3998 17:50:49.988541 sync preloader u1Gating2T_Save
3999 17:50:49.988633 sync preloader u1Gating05T_Save
4000 17:50:49.992201 sync preloader u1Gatingfine_tune_Save
4001 17:50:49.995536 sync preloader u1Gatingucpass_count_Save
4002 17:50:50.001856 sync preloader u1TxWindowPerbitVref_Save
4003 17:50:50.005262 sync preloader u1TxCenter_min_Save
4004 17:50:50.005356 sync preloader u1TxCenter_max_Save
4005 17:50:50.008961 sync preloader u1Txwin_center_Save
4006 17:50:50.011863 sync preloader u1Txfirst_pass_Save
4007 17:50:50.015425 sync preloader u1Txlast_pass_Save
4008 17:50:50.018466 sync preloader u1RxDatlat_Save
4009 17:50:50.022023 sync preloader u1RxWinPerbitVref_Save
4010 17:50:50.025125 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4011 17:50:50.031980 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4012 17:50:50.032085 sync preloader delay_cell_unit
4013 17:50:50.038175 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4014 17:50:50.042018 sync preloader write leveling
4015 17:50:50.045247 sync preloader cbt_mr12
4016 17:50:50.048187 sync preloader cbt_clk_dly
4017 17:50:50.048281 sync preloader cbt_cmd_dly
4018 17:50:50.051743 sync preloader cbt_cs
4019 17:50:50.055302 sync preloader cbt_ca_perbit_delay
4020 17:50:50.058156 sync preloader clk_delay
4021 17:50:50.058247 sync preloader dqs_delay
4022 17:50:50.061401 sync preloader u1Gating2T_Save
4023 17:50:50.064757 sync preloader u1Gating05T_Save
4024 17:50:50.068526 sync preloader u1Gatingfine_tune_Save
4025 17:50:50.071881 sync preloader u1Gatingucpass_count_Save
4026 17:50:50.074930 sync preloader u1TxWindowPerbitVref_Save
4027 17:50:50.077993 sync preloader u1TxCenter_min_Save
4028 17:50:50.081602 sync preloader u1TxCenter_max_Save
4029 17:50:50.084643 sync preloader u1Txwin_center_Save
4030 17:50:50.088141 sync preloader u1Txfirst_pass_Save
4031 17:50:50.091521 sync preloader u1Txlast_pass_Save
4032 17:50:50.094902 sync preloader u1RxDatlat_Save
4033 17:50:50.098486 sync preloader u1RxWinPerbitVref_Save
4034 17:50:50.101782 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4035 17:50:50.104811 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4036 17:50:50.108128 sync preloader delay_cell_unit
4037 17:50:50.111507 just_for_test_dump_coreboot_params dump all params
4038 17:50:50.115114 dump source = 0x0
4039 17:50:50.115205 dump params frequency:1600
4040 17:50:50.118253 dump params rank number:2
4041 17:50:50.118344
4042 17:50:50.121577 dump params write leveling
4043 17:50:50.124595 write leveling[0][0][0] = 0x21
4044 17:50:50.128282 write leveling[0][0][1] = 0x18
4045 17:50:50.128372 write leveling[0][1][0] = 0x1b
4046 17:50:50.131298 write leveling[0][1][1] = 0x19
4047 17:50:50.134725 write leveling[1][0][0] = 0x21
4048 17:50:50.138414 write leveling[1][0][1] = 0x18
4049 17:50:50.141514 write leveling[1][1][0] = 0x22
4050 17:50:50.144792 write leveling[1][1][1] = 0x18
4051 17:50:50.144886 dump params cbt_cs
4052 17:50:50.148016 cbt_cs[0][0] = 0x9
4053 17:50:50.148108 cbt_cs[0][1] = 0x9
4054 17:50:50.151255 cbt_cs[1][0] = 0xb
4055 17:50:50.151376 cbt_cs[1][1] = 0xb
4056 17:50:50.154416 dump params cbt_mr12
4057 17:50:50.154504 cbt_mr12[0][0] = 0x20
4058 17:50:50.157940 cbt_mr12[0][1] = 0x20
4059 17:50:50.161392 cbt_mr12[1][0] = 0x20
4060 17:50:50.161522 cbt_mr12[1][1] = 0x20
4061 17:50:50.164540 dump params tx window
4062 17:50:50.168130 tx_center_min[0][0][0] = 982
4063 17:50:50.168229 tx_center_max[0][0][0] = 989
4064 17:50:50.171082 tx_center_min[0][0][1] = 975
4065 17:50:50.174381 tx_center_max[0][0][1] = 981
4066 17:50:50.178120 tx_center_min[0][1][0] = 980
4067 17:50:50.181021 tx_center_max[0][1][0] = 986
4068 17:50:50.181138 tx_center_min[0][1][1] = 979
4069 17:50:50.184630 tx_center_max[0][1][1] = 985
4070 17:50:50.188173 tx_center_min[1][0][0] = 988
4071 17:50:50.191118 tx_center_max[1][0][0] = 993
4072 17:50:50.191210 tx_center_min[1][0][1] = 976
4073 17:50:50.194745 tx_center_max[1][0][1] = 983
4074 17:50:50.198110 tx_center_min[1][1][0] = 986
4075 17:50:50.201052 tx_center_max[1][1][0] = 991
4076 17:50:50.204526 tx_center_min[1][1][1] = 975
4077 17:50:50.204617 tx_center_max[1][1][1] = 981
4078 17:50:50.208117 dump params tx window
4079 17:50:50.211043 tx_win_center[0][0][0] = 989
4080 17:50:50.214442 tx_first_pass[0][0][0] = 977
4081 17:50:50.214533 tx_last_pass[0][0][0] = 1001
4082 17:50:50.218055 tx_win_center[0][0][1] = 988
4083 17:50:50.221069 tx_first_pass[0][0][1] = 976
4084 17:50:50.224146 tx_last_pass[0][0][1] = 1000
4085 17:50:50.227652 tx_win_center[0][0][2] = 989
4086 17:50:50.227758 tx_first_pass[0][0][2] = 977
4087 17:50:50.231222 tx_last_pass[0][0][2] = 1001
4088 17:50:50.234370 tx_win_center[0][0][3] = 982
4089 17:50:50.237944 tx_first_pass[0][0][3] = 970
4090 17:50:50.238159 tx_last_pass[0][0][3] = 995
4091 17:50:50.241341 tx_win_center[0][0][4] = 988
4092 17:50:50.244359 tx_first_pass[0][0][4] = 976
4093 17:50:50.247833 tx_last_pass[0][0][4] = 1000
4094 17:50:50.251490 tx_win_center[0][0][5] = 986
4095 17:50:50.251845 tx_first_pass[0][0][5] = 974
4096 17:50:50.254333 tx_last_pass[0][0][5] = 998
4097 17:50:50.257949 tx_win_center[0][0][6] = 986
4098 17:50:50.260712 tx_first_pass[0][0][6] = 974
4099 17:50:50.264560 tx_last_pass[0][0][6] = 999
4100 17:50:50.264918 tx_win_center[0][0][7] = 988
4101 17:50:50.267732 tx_first_pass[0][0][7] = 976
4102 17:50:50.271177 tx_last_pass[0][0][7] = 1000
4103 17:50:50.274189 tx_win_center[0][0][8] = 975
4104 17:50:50.277815 tx_first_pass[0][0][8] = 963
4105 17:50:50.278218 tx_last_pass[0][0][8] = 988
4106 17:50:50.280856 tx_win_center[0][0][9] = 978
4107 17:50:50.284272 tx_first_pass[0][0][9] = 966
4108 17:50:50.287619 tx_last_pass[0][0][9] = 990
4109 17:50:50.288044 tx_win_center[0][0][10] = 981
4110 17:50:50.290740 tx_first_pass[0][0][10] = 969
4111 17:50:50.294089 tx_last_pass[0][0][10] = 994
4112 17:50:50.296920 tx_win_center[0][0][11] = 977
4113 17:50:50.300544 tx_first_pass[0][0][11] = 965
4114 17:50:50.300907 tx_last_pass[0][0][11] = 989
4115 17:50:50.304053 tx_win_center[0][0][12] = 978
4116 17:50:50.306929 tx_first_pass[0][0][12] = 967
4117 17:50:50.310257 tx_last_pass[0][0][12] = 990
4118 17:50:50.313538 tx_win_center[0][0][13] = 978
4119 17:50:50.316912 tx_first_pass[0][0][13] = 967
4120 17:50:50.317078 tx_last_pass[0][0][13] = 990
4121 17:50:50.320427 tx_win_center[0][0][14] = 979
4122 17:50:50.323418 tx_first_pass[0][0][14] = 967
4123 17:50:50.327028 tx_last_pass[0][0][14] = 991
4124 17:50:50.330078 tx_win_center[0][0][15] = 981
4125 17:50:50.330192 tx_first_pass[0][0][15] = 969
4126 17:50:50.332997 tx_last_pass[0][0][15] = 993
4127 17:50:50.336681 tx_win_center[0][1][0] = 986
4128 17:50:50.340222 tx_first_pass[0][1][0] = 974
4129 17:50:50.343214 tx_last_pass[0][1][0] = 999
4130 17:50:50.343306 tx_win_center[0][1][1] = 985
4131 17:50:50.346573 tx_first_pass[0][1][1] = 973
4132 17:50:50.350147 tx_last_pass[0][1][1] = 998
4133 17:50:50.352976 tx_win_center[0][1][2] = 986
4134 17:50:50.353067 tx_first_pass[0][1][2] = 975
4135 17:50:50.356618 tx_last_pass[0][1][2] = 998
4136 17:50:50.359616 tx_win_center[0][1][3] = 980
4137 17:50:50.363225 tx_first_pass[0][1][3] = 968
4138 17:50:50.366878 tx_last_pass[0][1][3] = 992
4139 17:50:50.366970 tx_win_center[0][1][4] = 985
4140 17:50:50.369824 tx_first_pass[0][1][4] = 972
4141 17:50:50.373030 tx_last_pass[0][1][4] = 998
4142 17:50:50.376744 tx_win_center[0][1][5] = 981
4143 17:50:50.376836 tx_first_pass[0][1][5] = 969
4144 17:50:50.379627 tx_last_pass[0][1][5] = 994
4145 17:50:50.382980 tx_win_center[0][1][6] = 983
4146 17:50:50.386599 tx_first_pass[0][1][6] = 970
4147 17:50:50.389648 tx_last_pass[0][1][6] = 996
4148 17:50:50.389741 tx_win_center[0][1][7] = 985
4149 17:50:50.392950 tx_first_pass[0][1][7] = 972
4150 17:50:50.396569 tx_last_pass[0][1][7] = 998
4151 17:50:50.399979 tx_win_center[0][1][8] = 979
4152 17:50:50.400071 tx_first_pass[0][1][8] = 967
4153 17:50:50.402852 tx_last_pass[0][1][8] = 991
4154 17:50:50.406133 tx_win_center[0][1][9] = 980
4155 17:50:50.409697 tx_first_pass[0][1][9] = 969
4156 17:50:50.413219 tx_last_pass[0][1][9] = 991
4157 17:50:50.413311 tx_win_center[0][1][10] = 985
4158 17:50:50.416147 tx_first_pass[0][1][10] = 973
4159 17:50:50.419737 tx_last_pass[0][1][10] = 998
4160 17:50:50.422958 tx_win_center[0][1][11] = 979
4161 17:50:50.426353 tx_first_pass[0][1][11] = 968
4162 17:50:50.426445 tx_last_pass[0][1][11] = 991
4163 17:50:50.429927 tx_win_center[0][1][12] = 981
4164 17:50:50.432969 tx_first_pass[0][1][12] = 969
4165 17:50:50.436596 tx_last_pass[0][1][12] = 993
4166 17:50:50.439582 tx_win_center[0][1][13] = 981
4167 17:50:50.439675 tx_first_pass[0][1][13] = 969
4168 17:50:50.443097 tx_last_pass[0][1][13] = 993
4169 17:50:50.446029 tx_win_center[0][1][14] = 981
4170 17:50:50.449382 tx_first_pass[0][1][14] = 969
4171 17:50:50.452734 tx_last_pass[0][1][14] = 994
4172 17:50:50.452826 tx_win_center[0][1][15] = 984
4173 17:50:50.456099 tx_first_pass[0][1][15] = 972
4174 17:50:50.459523 tx_last_pass[0][1][15] = 997
4175 17:50:50.462587 tx_win_center[1][0][0] = 992
4176 17:50:50.466146 tx_first_pass[1][0][0] = 979
4177 17:50:50.466239 tx_last_pass[1][0][0] = 1006
4178 17:50:50.469736 tx_win_center[1][0][1] = 991
4179 17:50:50.472873 tx_first_pass[1][0][1] = 978
4180 17:50:50.476323 tx_last_pass[1][0][1] = 1005
4181 17:50:50.476416 tx_win_center[1][0][2] = 989
4182 17:50:50.479784 tx_first_pass[1][0][2] = 977
4183 17:50:50.483116 tx_last_pass[1][0][2] = 1002
4184 17:50:50.486226 tx_win_center[1][0][3] = 988
4185 17:50:50.489480 tx_first_pass[1][0][3] = 976
4186 17:50:50.489572 tx_last_pass[1][0][3] = 1000
4187 17:50:50.492794 tx_win_center[1][0][4] = 991
4188 17:50:50.496169 tx_first_pass[1][0][4] = 978
4189 17:50:50.499423 tx_last_pass[1][0][4] = 1005
4190 17:50:50.502496 tx_win_center[1][0][5] = 993
4191 17:50:50.502589 tx_first_pass[1][0][5] = 980
4192 17:50:50.506043 tx_last_pass[1][0][5] = 1006
4193 17:50:50.509549 tx_win_center[1][0][6] = 991
4194 17:50:50.512816 tx_first_pass[1][0][6] = 978
4195 17:50:50.515865 tx_last_pass[1][0][6] = 1005
4196 17:50:50.515958 tx_win_center[1][0][7] = 991
4197 17:50:50.519339 tx_first_pass[1][0][7] = 978
4198 17:50:50.522825 tx_last_pass[1][0][7] = 1004
4199 17:50:50.526178 tx_win_center[1][0][8] = 980
4200 17:50:50.526302 tx_first_pass[1][0][8] = 969
4201 17:50:50.529490 tx_last_pass[1][0][8] = 992
4202 17:50:50.532870 tx_win_center[1][0][9] = 980
4203 17:50:50.536017 tx_first_pass[1][0][9] = 969
4204 17:50:50.539509 tx_last_pass[1][0][9] = 991
4205 17:50:50.539602 tx_win_center[1][0][10] = 981
4206 17:50:50.542470 tx_first_pass[1][0][10] = 970
4207 17:50:50.546034 tx_last_pass[1][0][10] = 993
4208 17:50:50.549023 tx_win_center[1][0][11] = 982
4209 17:50:50.552648 tx_first_pass[1][0][11] = 971
4210 17:50:50.552740 tx_last_pass[1][0][11] = 994
4211 17:50:50.555585 tx_win_center[1][0][12] = 982
4212 17:50:50.558994 tx_first_pass[1][0][12] = 971
4213 17:50:50.562225 tx_last_pass[1][0][12] = 994
4214 17:50:50.565633 tx_win_center[1][0][13] = 983
4215 17:50:50.565727 tx_first_pass[1][0][13] = 972
4216 17:50:50.569128 tx_last_pass[1][0][13] = 994
4217 17:50:50.572670 tx_win_center[1][0][14] = 981
4218 17:50:50.575744 tx_first_pass[1][0][14] = 970
4219 17:50:50.579244 tx_last_pass[1][0][14] = 993
4220 17:50:50.579366 tx_win_center[1][0][15] = 976
4221 17:50:50.582302 tx_first_pass[1][0][15] = 965
4222 17:50:50.585957 tx_last_pass[1][0][15] = 988
4223 17:50:50.588867 tx_win_center[1][1][0] = 991
4224 17:50:50.592210 tx_first_pass[1][1][0] = 978
4225 17:50:50.592302 tx_last_pass[1][1][0] = 1005
4226 17:50:50.595674 tx_win_center[1][1][1] = 990
4227 17:50:50.599261 tx_first_pass[1][1][1] = 977
4228 17:50:50.602663 tx_last_pass[1][1][1] = 1003
4229 17:50:50.605856 tx_win_center[1][1][2] = 989
4230 17:50:50.605948 tx_first_pass[1][1][2] = 977
4231 17:50:50.608868 tx_last_pass[1][1][2] = 1001
4232 17:50:50.612484 tx_win_center[1][1][3] = 986
4233 17:50:50.615927 tx_first_pass[1][1][3] = 975
4234 17:50:50.616020 tx_last_pass[1][1][3] = 998
4235 17:50:50.618863 tx_win_center[1][1][4] = 990
4236 17:50:50.622286 tx_first_pass[1][1][4] = 978
4237 17:50:50.625837 tx_last_pass[1][1][4] = 1003
4238 17:50:50.628837 tx_win_center[1][1][5] = 991
4239 17:50:50.628930 tx_first_pass[1][1][5] = 978
4240 17:50:50.632287 tx_last_pass[1][1][5] = 1005
4241 17:50:50.635750 tx_win_center[1][1][6] = 990
4242 17:50:50.639344 tx_first_pass[1][1][6] = 978
4243 17:50:50.639445 tx_last_pass[1][1][6] = 1003
4244 17:50:50.642141 tx_win_center[1][1][7] = 990
4245 17:50:50.645842 tx_first_pass[1][1][7] = 978
4246 17:50:50.648793 tx_last_pass[1][1][7] = 1002
4247 17:50:50.652448 tx_win_center[1][1][8] = 979
4248 17:50:50.652541 tx_first_pass[1][1][8] = 968
4249 17:50:50.655446 tx_last_pass[1][1][8] = 991
4250 17:50:50.659084 tx_win_center[1][1][9] = 979
4251 17:50:50.662054 tx_first_pass[1][1][9] = 968
4252 17:50:50.665654 tx_last_pass[1][1][9] = 991
4253 17:50:50.665746 tx_win_center[1][1][10] = 980
4254 17:50:50.669015 tx_first_pass[1][1][10] = 969
4255 17:50:50.672154 tx_last_pass[1][1][10] = 992
4256 17:50:50.675522 tx_win_center[1][1][11] = 981
4257 17:50:50.678886 tx_first_pass[1][1][11] = 970
4258 17:50:50.678979 tx_last_pass[1][1][11] = 993
4259 17:50:50.681826 tx_win_center[1][1][12] = 981
4260 17:50:50.685452 tx_first_pass[1][1][12] = 970
4261 17:50:50.688507 tx_last_pass[1][1][12] = 993
4262 17:50:50.692252 tx_win_center[1][1][13] = 981
4263 17:50:50.692345 tx_first_pass[1][1][13] = 970
4264 17:50:50.695053 tx_last_pass[1][1][13] = 993
4265 17:50:50.698346 tx_win_center[1][1][14] = 980
4266 17:50:50.701885 tx_first_pass[1][1][14] = 969
4267 17:50:50.705328 tx_last_pass[1][1][14] = 992
4268 17:50:50.705422 tx_win_center[1][1][15] = 975
4269 17:50:50.708351 tx_first_pass[1][1][15] = 964
4270 17:50:50.711635 tx_last_pass[1][1][15] = 987
4271 17:50:50.715089 dump params rx window
4272 17:50:50.715181 rx_firspass[0][0][0] = 5
4273 17:50:50.718502 rx_lastpass[0][0][0] = 38
4274 17:50:50.722014 rx_firspass[0][0][1] = 5
4275 17:50:50.722106 rx_lastpass[0][0][1] = 36
4276 17:50:50.725389 rx_firspass[0][0][2] = 6
4277 17:50:50.728300 rx_lastpass[0][0][2] = 36
4278 17:50:50.731926 rx_firspass[0][0][3] = -2
4279 17:50:50.732029 rx_lastpass[0][0][3] = 31
4280 17:50:50.734974 rx_firspass[0][0][4] = 4
4281 17:50:50.738216 rx_lastpass[0][0][4] = 37
4282 17:50:50.738345 rx_firspass[0][0][5] = 1
4283 17:50:50.741612 rx_lastpass[0][0][5] = 32
4284 17:50:50.745220 rx_firspass[0][0][6] = 3
4285 17:50:50.745312 rx_lastpass[0][0][6] = 34
4286 17:50:50.748678 rx_firspass[0][0][7] = 5
4287 17:50:50.752017 rx_lastpass[0][0][7] = 36
4288 17:50:50.755339 rx_firspass[0][0][8] = -4
4289 17:50:50.755441 rx_lastpass[0][0][8] = 33
4290 17:50:50.758300 rx_firspass[0][0][9] = 0
4291 17:50:50.761330 rx_lastpass[0][0][9] = 33
4292 17:50:50.761423 rx_firspass[0][0][10] = 8
4293 17:50:50.764888 rx_lastpass[0][0][10] = 41
4294 17:50:50.768459 rx_firspass[0][0][11] = 1
4295 17:50:50.771332 rx_lastpass[0][0][11] = 33
4296 17:50:50.771433 rx_firspass[0][0][12] = 2
4297 17:50:50.774981 rx_lastpass[0][0][12] = 37
4298 17:50:50.778365 rx_firspass[0][0][13] = 3
4299 17:50:50.781780 rx_lastpass[0][0][13] = 34
4300 17:50:50.781873 rx_firspass[0][0][14] = 2
4301 17:50:50.785027 rx_lastpass[0][0][14] = 37
4302 17:50:50.788311 rx_firspass[0][0][15] = 5
4303 17:50:50.788403 rx_lastpass[0][0][15] = 37
4304 17:50:50.791354 rx_firspass[0][1][0] = 5
4305 17:50:50.794925 rx_lastpass[0][1][0] = 40
4306 17:50:50.797915 rx_firspass[0][1][1] = 5
4307 17:50:50.798006 rx_lastpass[0][1][1] = 38
4308 17:50:50.801463 rx_firspass[0][1][2] = 6
4309 17:50:50.804663 rx_lastpass[0][1][2] = 38
4310 17:50:50.804754 rx_firspass[0][1][3] = -2
4311 17:50:50.808087 rx_lastpass[0][1][3] = 33
4312 17:50:50.811588 rx_firspass[0][1][4] = 5
4313 17:50:50.814475 rx_lastpass[0][1][4] = 39
4314 17:50:50.814567 rx_firspass[0][1][5] = 1
4315 17:50:50.817881 rx_lastpass[0][1][5] = 34
4316 17:50:50.821485 rx_firspass[0][1][6] = 3
4317 17:50:50.821576 rx_lastpass[0][1][6] = 37
4318 17:50:50.824779 rx_firspass[0][1][7] = 3
4319 17:50:50.828081 rx_lastpass[0][1][7] = 37
4320 17:50:50.828172 rx_firspass[0][1][8] = -2
4321 17:50:50.831397 rx_lastpass[0][1][8] = 32
4322 17:50:50.834749 rx_firspass[0][1][9] = 1
4323 17:50:50.837898 rx_lastpass[0][1][9] = 36
4324 17:50:50.837998 rx_firspass[0][1][10] = 7
4325 17:50:50.841551 rx_lastpass[0][1][10] = 43
4326 17:50:50.844793 rx_firspass[0][1][11] = -2
4327 17:50:50.844885 rx_lastpass[0][1][11] = 34
4328 17:50:50.847759 rx_firspass[0][1][12] = 1
4329 17:50:50.851324 rx_lastpass[0][1][12] = 37
4330 17:50:50.854656 rx_firspass[0][1][13] = 2
4331 17:50:50.854747 rx_lastpass[0][1][13] = 35
4332 17:50:50.857724 rx_firspass[0][1][14] = 3
4333 17:50:50.861150 rx_lastpass[0][1][14] = 37
4334 17:50:50.864797 rx_firspass[0][1][15] = 6
4335 17:50:50.864888 rx_lastpass[0][1][15] = 39
4336 17:50:50.867779 rx_firspass[1][0][0] = 5
4337 17:50:50.871394 rx_lastpass[1][0][0] = 39
4338 17:50:50.871493 rx_firspass[1][0][1] = 4
4339 17:50:50.874330 rx_lastpass[1][0][1] = 39
4340 17:50:50.878154 rx_firspass[1][0][2] = 2
4341 17:50:50.878245 rx_lastpass[1][0][2] = 36
4342 17:50:50.881171 rx_firspass[1][0][3] = 0
4343 17:50:50.884668 rx_lastpass[1][0][3] = 34
4344 17:50:50.887702 rx_firspass[1][0][4] = 5
4345 17:50:50.887794 rx_lastpass[1][0][4] = 38
4346 17:50:50.891151 rx_firspass[1][0][5] = 7
4347 17:50:50.894534 rx_lastpass[1][0][5] = 39
4348 17:50:50.894626 rx_firspass[1][0][6] = 6
4349 17:50:50.898101 rx_lastpass[1][0][6] = 40
4350 17:50:50.901122 rx_firspass[1][0][7] = 4
4351 17:50:50.901213 rx_lastpass[1][0][7] = 38
4352 17:50:50.904762 rx_firspass[1][0][8] = 0
4353 17:50:50.907547 rx_lastpass[1][0][8] = 33
4354 17:50:50.911038 rx_firspass[1][0][9] = 0
4355 17:50:50.911130 rx_lastpass[1][0][9] = 32
4356 17:50:50.914517 rx_firspass[1][0][10] = 5
4357 17:50:50.917963 rx_lastpass[1][0][10] = 35
4358 17:50:50.918055 rx_firspass[1][0][11] = 5
4359 17:50:50.921560 rx_lastpass[1][0][11] = 38
4360 17:50:50.924449 rx_firspass[1][0][12] = 5
4361 17:50:50.927428 rx_lastpass[1][0][12] = 38
4362 17:50:50.927519 rx_firspass[1][0][13] = 5
4363 17:50:50.930962 rx_lastpass[1][0][13] = 37
4364 17:50:50.934255 rx_firspass[1][0][14] = 6
4365 17:50:50.934346 rx_lastpass[1][0][14] = 38
4366 17:50:50.937615 rx_firspass[1][0][15] = -4
4367 17:50:50.941210 rx_lastpass[1][0][15] = 30
4368 17:50:50.944457 rx_firspass[1][1][0] = 3
4369 17:50:50.944549 rx_lastpass[1][1][0] = 40
4370 17:50:50.947786 rx_firspass[1][1][1] = 4
4371 17:50:50.951350 rx_lastpass[1][1][1] = 39
4372 17:50:50.951454 rx_firspass[1][1][2] = 0
4373 17:50:50.954450 rx_lastpass[1][1][2] = 36
4374 17:50:50.957956 rx_firspass[1][1][3] = -2
4375 17:50:50.961307 rx_lastpass[1][1][3] = 34
4376 17:50:50.961397 rx_firspass[1][1][4] = 4
4377 17:50:50.964215 rx_lastpass[1][1][4] = 39
4378 17:50:50.967734 rx_firspass[1][1][5] = 5
4379 17:50:50.967825 rx_lastpass[1][1][5] = 40
4380 17:50:50.970717 rx_firspass[1][1][6] = 6
4381 17:50:50.974351 rx_lastpass[1][1][6] = 41
4382 17:50:50.977372 rx_firspass[1][1][7] = 3
4383 17:50:50.977462 rx_lastpass[1][1][7] = 38
4384 17:50:50.981007 rx_firspass[1][1][8] = 0
4385 17:50:50.984001 rx_lastpass[1][1][8] = 34
4386 17:50:50.984096 rx_firspass[1][1][9] = -2
4387 17:50:50.987544 rx_lastpass[1][1][9] = 34
4388 17:50:50.990960 rx_firspass[1][1][10] = 3
4389 17:50:50.993884 rx_lastpass[1][1][10] = 39
4390 17:50:50.993974 rx_firspass[1][1][11] = 4
4391 17:50:50.997274 rx_lastpass[1][1][11] = 40
4392 17:50:51.000776 rx_firspass[1][1][12] = 4
4393 17:50:51.000867 rx_lastpass[1][1][12] = 40
4394 17:50:51.004359 rx_firspass[1][1][13] = 4
4395 17:50:51.007378 rx_lastpass[1][1][13] = 40
4396 17:50:51.010986 rx_firspass[1][1][14] = 5
4397 17:50:51.011076 rx_lastpass[1][1][14] = 40
4398 17:50:51.014375 rx_firspass[1][1][15] = -3
4399 17:50:51.017750 rx_lastpass[1][1][15] = 31
4400 17:50:51.017841 dump params clk_delay
4401 17:50:51.020636 clk_delay[0] = 1
4402 17:50:51.020726 clk_delay[1] = 0
4403 17:50:51.023884 dump params dqs_delay
4404 17:50:51.027300 dqs_delay[0][0] = -2
4405 17:50:51.027392 dqs_delay[0][1] = 0
4406 17:50:51.030959 dqs_delay[1][0] = 0
4407 17:50:51.031050 dqs_delay[1][1] = 0
4408 17:50:51.033940 dump params delay_cell_unit = 735
4409 17:50:51.037633 dump source = 0x0
4410 17:50:51.037724 dump params frequency:1200
4411 17:50:51.040463 dump params rank number:2
4412 17:50:51.040554
4413 17:50:51.043944 dump params write leveling
4414 17:50:51.047184 write leveling[0][0][0] = 0x0
4415 17:50:51.047277 write leveling[0][0][1] = 0x0
4416 17:50:51.050651 write leveling[0][1][0] = 0x0
4417 17:50:51.054148 write leveling[0][1][1] = 0x0
4418 17:50:51.057054 write leveling[1][0][0] = 0x0
4419 17:50:51.060751 write leveling[1][0][1] = 0x0
4420 17:50:51.060844 write leveling[1][1][0] = 0x0
4421 17:50:51.063889 write leveling[1][1][1] = 0x0
4422 17:50:51.067205 dump params cbt_cs
4423 17:50:51.067297 cbt_cs[0][0] = 0x0
4424 17:50:51.070618 cbt_cs[0][1] = 0x0
4425 17:50:51.070711 cbt_cs[1][0] = 0x0
4426 17:50:51.074137 cbt_cs[1][1] = 0x0
4427 17:50:51.074229 dump params cbt_mr12
4428 17:50:51.077158 cbt_mr12[0][0] = 0x0
4429 17:50:51.080799 cbt_mr12[0][1] = 0x0
4430 17:50:51.080891 cbt_mr12[1][0] = 0x0
4431 17:50:51.083706 cbt_mr12[1][1] = 0x0
4432 17:50:51.083798 dump params tx window
4433 17:50:51.087239 tx_center_min[0][0][0] = 0
4434 17:50:51.090310 tx_center_max[0][0][0] = 0
4435 17:50:51.090402 tx_center_min[0][0][1] = 0
4436 17:50:51.093886 tx_center_max[0][0][1] = 0
4437 17:50:51.097405 tx_center_min[0][1][0] = 0
4438 17:50:51.100274 tx_center_max[0][1][0] = 0
4439 17:50:51.100366 tx_center_min[0][1][1] = 0
4440 17:50:51.103751 tx_center_max[0][1][1] = 0
4441 17:50:51.107298 tx_center_min[1][0][0] = 0
4442 17:50:51.110363 tx_center_max[1][0][0] = 0
4443 17:50:51.110454 tx_center_min[1][0][1] = 0
4444 17:50:51.113880 tx_center_max[1][0][1] = 0
4445 17:50:51.116837 tx_center_min[1][1][0] = 0
4446 17:50:51.120490 tx_center_max[1][1][0] = 0
4447 17:50:51.120582 tx_center_min[1][1][1] = 0
4448 17:50:51.123814 tx_center_max[1][1][1] = 0
4449 17:50:51.127271 dump params tx window
4450 17:50:51.127362 tx_win_center[0][0][0] = 0
4451 17:50:51.130610 tx_first_pass[0][0][0] = 0
4452 17:50:51.133343 tx_last_pass[0][0][0] = 0
4453 17:50:51.136929 tx_win_center[0][0][1] = 0
4454 17:50:51.137020 tx_first_pass[0][0][1] = 0
4455 17:50:51.140003 tx_last_pass[0][0][1] = 0
4456 17:50:51.143530 tx_win_center[0][0][2] = 0
4457 17:50:51.146618 tx_first_pass[0][0][2] = 0
4458 17:50:51.146710 tx_last_pass[0][0][2] = 0
4459 17:50:51.150246 tx_win_center[0][0][3] = 0
4460 17:50:51.153741 tx_first_pass[0][0][3] = 0
4461 17:50:51.153832 tx_last_pass[0][0][3] = 0
4462 17:50:51.156723 tx_win_center[0][0][4] = 0
4463 17:50:51.160179 tx_first_pass[0][0][4] = 0
4464 17:50:51.163423 tx_last_pass[0][0][4] = 0
4465 17:50:51.163531 tx_win_center[0][0][5] = 0
4466 17:50:51.166714 tx_first_pass[0][0][5] = 0
4467 17:50:51.169986 tx_last_pass[0][0][5] = 0
4468 17:50:51.173142 tx_win_center[0][0][6] = 0
4469 17:50:51.173234 tx_first_pass[0][0][6] = 0
4470 17:50:51.176216 tx_last_pass[0][0][6] = 0
4471 17:50:51.179833 tx_win_center[0][0][7] = 0
4472 17:50:51.183373 tx_first_pass[0][0][7] = 0
4473 17:50:51.183480 tx_last_pass[0][0][7] = 0
4474 17:50:51.186271 tx_win_center[0][0][8] = 0
4475 17:50:51.189714 tx_first_pass[0][0][8] = 0
4476 17:50:51.189848 tx_last_pass[0][0][8] = 0
4477 17:50:51.192728 tx_win_center[0][0][9] = 0
4478 17:50:51.196501 tx_first_pass[0][0][9] = 0
4479 17:50:51.199813 tx_last_pass[0][0][9] = 0
4480 17:50:51.199905 tx_win_center[0][0][10] = 0
4481 17:50:51.202729 tx_first_pass[0][0][10] = 0
4482 17:50:51.206155 tx_last_pass[0][0][10] = 0
4483 17:50:51.209869 tx_win_center[0][0][11] = 0
4484 17:50:51.209962 tx_first_pass[0][0][11] = 0
4485 17:50:51.212851 tx_last_pass[0][0][11] = 0
4486 17:50:51.215963 tx_win_center[0][0][12] = 0
4487 17:50:51.219487 tx_first_pass[0][0][12] = 0
4488 17:50:51.219579 tx_last_pass[0][0][12] = 0
4489 17:50:51.223060 tx_win_center[0][0][13] = 0
4490 17:50:51.226074 tx_first_pass[0][0][13] = 0
4491 17:50:51.229577 tx_last_pass[0][0][13] = 0
4492 17:50:51.229669 tx_win_center[0][0][14] = 0
4493 17:50:51.233026 tx_first_pass[0][0][14] = 0
4494 17:50:51.236361 tx_last_pass[0][0][14] = 0
4495 17:50:51.239277 tx_win_center[0][0][15] = 0
4496 17:50:51.239398 tx_first_pass[0][0][15] = 0
4497 17:50:51.242828 tx_last_pass[0][0][15] = 0
4498 17:50:51.245850 tx_win_center[0][1][0] = 0
4499 17:50:51.249490 tx_first_pass[0][1][0] = 0
4500 17:50:51.249581 tx_last_pass[0][1][0] = 0
4501 17:50:51.252589 tx_win_center[0][1][1] = 0
4502 17:50:51.255986 tx_first_pass[0][1][1] = 0
4503 17:50:51.259539 tx_last_pass[0][1][1] = 0
4504 17:50:51.259630 tx_win_center[0][1][2] = 0
4505 17:50:51.262443 tx_first_pass[0][1][2] = 0
4506 17:50:51.266015 tx_last_pass[0][1][2] = 0
4507 17:50:51.266107 tx_win_center[0][1][3] = 0
4508 17:50:51.269518 tx_first_pass[0][1][3] = 0
4509 17:50:51.272853 tx_last_pass[0][1][3] = 0
4510 17:50:51.275862 tx_win_center[0][1][4] = 0
4511 17:50:51.275953 tx_first_pass[0][1][4] = 0
4512 17:50:51.279282 tx_last_pass[0][1][4] = 0
4513 17:50:51.282531 tx_win_center[0][1][5] = 0
4514 17:50:51.285703 tx_first_pass[0][1][5] = 0
4515 17:50:51.285798 tx_last_pass[0][1][5] = 0
4516 17:50:51.288895 tx_win_center[0][1][6] = 0
4517 17:50:51.292254 tx_first_pass[0][1][6] = 0
4518 17:50:51.292347 tx_last_pass[0][1][6] = 0
4519 17:50:51.295587 tx_win_center[0][1][7] = 0
4520 17:50:51.299155 tx_first_pass[0][1][7] = 0
4521 17:50:51.302172 tx_last_pass[0][1][7] = 0
4522 17:50:51.302263 tx_win_center[0][1][8] = 0
4523 17:50:51.305548 tx_first_pass[0][1][8] = 0
4524 17:50:51.309025 tx_last_pass[0][1][8] = 0
4525 17:50:51.312607 tx_win_center[0][1][9] = 0
4526 17:50:51.312699 tx_first_pass[0][1][9] = 0
4527 17:50:51.315512 tx_last_pass[0][1][9] = 0
4528 17:50:51.319145 tx_win_center[0][1][10] = 0
4529 17:50:51.319266 tx_first_pass[0][1][10] = 0
4530 17:50:51.322111 tx_last_pass[0][1][10] = 0
4531 17:50:51.325731 tx_win_center[0][1][11] = 0
4532 17:50:51.329245 tx_first_pass[0][1][11] = 0
4533 17:50:51.329336 tx_last_pass[0][1][11] = 0
4534 17:50:51.332111 tx_win_center[0][1][12] = 0
4535 17:50:51.335678 tx_first_pass[0][1][12] = 0
4536 17:50:51.339091 tx_last_pass[0][1][12] = 0
4537 17:50:51.339183 tx_win_center[0][1][13] = 0
4538 17:50:51.342360 tx_first_pass[0][1][13] = 0
4539 17:50:51.345777 tx_last_pass[0][1][13] = 0
4540 17:50:51.348741 tx_win_center[0][1][14] = 0
4541 17:50:51.352268 tx_first_pass[0][1][14] = 0
4542 17:50:51.352360 tx_last_pass[0][1][14] = 0
4543 17:50:51.355954 tx_win_center[0][1][15] = 0
4544 17:50:51.358856 tx_first_pass[0][1][15] = 0
4545 17:50:51.362278 tx_last_pass[0][1][15] = 0
4546 17:50:51.362370 tx_win_center[1][0][0] = 0
4547 17:50:51.365797 tx_first_pass[1][0][0] = 0
4548 17:50:51.368849 tx_last_pass[1][0][0] = 0
4549 17:50:51.368940 tx_win_center[1][0][1] = 0
4550 17:50:51.372448 tx_first_pass[1][0][1] = 0
4551 17:50:51.375263 tx_last_pass[1][0][1] = 0
4552 17:50:51.378800 tx_win_center[1][0][2] = 0
4553 17:50:51.378891 tx_first_pass[1][0][2] = 0
4554 17:50:51.381843 tx_last_pass[1][0][2] = 0
4555 17:50:51.385359 tx_win_center[1][0][3] = 0
4556 17:50:51.388724 tx_first_pass[1][0][3] = 0
4557 17:50:51.388815 tx_last_pass[1][0][3] = 0
4558 17:50:51.392184 tx_win_center[1][0][4] = 0
4559 17:50:51.395415 tx_first_pass[1][0][4] = 0
4560 17:50:51.395507 tx_last_pass[1][0][4] = 0
4561 17:50:51.398455 tx_win_center[1][0][5] = 0
4562 17:50:51.402039 tx_first_pass[1][0][5] = 0
4563 17:50:51.404910 tx_last_pass[1][0][5] = 0
4564 17:50:51.405001 tx_win_center[1][0][6] = 0
4565 17:50:51.408544 tx_first_pass[1][0][6] = 0
4566 17:50:51.411742 tx_last_pass[1][0][6] = 0
4567 17:50:51.415188 tx_win_center[1][0][7] = 0
4568 17:50:51.415309 tx_first_pass[1][0][7] = 0
4569 17:50:51.418470 tx_last_pass[1][0][7] = 0
4570 17:50:51.421824 tx_win_center[1][0][8] = 0
4571 17:50:51.424693 tx_first_pass[1][0][8] = 0
4572 17:50:51.424815 tx_last_pass[1][0][8] = 0
4573 17:50:51.428214 tx_win_center[1][0][9] = 0
4574 17:50:51.431923 tx_first_pass[1][0][9] = 0
4575 17:50:51.432015 tx_last_pass[1][0][9] = 0
4576 17:50:51.435173 tx_win_center[1][0][10] = 0
4577 17:50:51.438263 tx_first_pass[1][0][10] = 0
4578 17:50:51.441851 tx_last_pass[1][0][10] = 0
4579 17:50:51.441943 tx_win_center[1][0][11] = 0
4580 17:50:51.445275 tx_first_pass[1][0][11] = 0
4581 17:50:51.448703 tx_last_pass[1][0][11] = 0
4582 17:50:51.451637 tx_win_center[1][0][12] = 0
4583 17:50:51.451729 tx_first_pass[1][0][12] = 0
4584 17:50:51.455199 tx_last_pass[1][0][12] = 0
4585 17:50:51.458128 tx_win_center[1][0][13] = 0
4586 17:50:51.461710 tx_first_pass[1][0][13] = 0
4587 17:50:51.461801 tx_last_pass[1][0][13] = 0
4588 17:50:51.465307 tx_win_center[1][0][14] = 0
4589 17:50:51.468137 tx_first_pass[1][0][14] = 0
4590 17:50:51.471742 tx_last_pass[1][0][14] = 0
4591 17:50:51.471834 tx_win_center[1][0][15] = 0
4592 17:50:51.474736 tx_first_pass[1][0][15] = 0
4593 17:50:51.478269 tx_last_pass[1][0][15] = 0
4594 17:50:51.481741 tx_win_center[1][1][0] = 0
4595 17:50:51.481832 tx_first_pass[1][1][0] = 0
4596 17:50:51.485005 tx_last_pass[1][1][0] = 0
4597 17:50:51.487937 tx_win_center[1][1][1] = 0
4598 17:50:51.491423 tx_first_pass[1][1][1] = 0
4599 17:50:51.491514 tx_last_pass[1][1][1] = 0
4600 17:50:51.494890 tx_win_center[1][1][2] = 0
4601 17:50:51.498364 tx_first_pass[1][1][2] = 0
4602 17:50:51.498455 tx_last_pass[1][1][2] = 0
4603 17:50:51.501266 tx_win_center[1][1][3] = 0
4604 17:50:51.504866 tx_first_pass[1][1][3] = 0
4605 17:50:51.507886 tx_last_pass[1][1][3] = 0
4606 17:50:51.507977 tx_win_center[1][1][4] = 0
4607 17:50:51.511435 tx_first_pass[1][1][4] = 0
4608 17:50:51.514948 tx_last_pass[1][1][4] = 0
4609 17:50:51.518682 tx_win_center[1][1][5] = 0
4610 17:50:51.518777 tx_first_pass[1][1][5] = 0
4611 17:50:51.521577 tx_last_pass[1][1][5] = 0
4612 17:50:51.525051 tx_win_center[1][1][6] = 0
4613 17:50:51.525145 tx_first_pass[1][1][6] = 0
4614 17:50:51.528371 tx_last_pass[1][1][6] = 0
4615 17:50:51.531558 tx_win_center[1][1][7] = 0
4616 17:50:51.534630 tx_first_pass[1][1][7] = 0
4617 17:50:51.534725 tx_last_pass[1][1][7] = 0
4618 17:50:51.537785 tx_win_center[1][1][8] = 0
4619 17:50:51.541485 tx_first_pass[1][1][8] = 0
4620 17:50:51.541579 tx_last_pass[1][1][8] = 0
4621 17:50:51.544780 tx_win_center[1][1][9] = 0
4622 17:50:51.548092 tx_first_pass[1][1][9] = 0
4623 17:50:51.551287 tx_last_pass[1][1][9] = 0
4624 17:50:51.551409 tx_win_center[1][1][10] = 0
4625 17:50:51.554490 tx_first_pass[1][1][10] = 0
4626 17:50:51.558387 tx_last_pass[1][1][10] = 0
4627 17:50:51.561389 tx_win_center[1][1][11] = 0
4628 17:50:51.561484 tx_first_pass[1][1][11] = 0
4629 17:50:51.564914 tx_last_pass[1][1][11] = 0
4630 17:50:51.567823 tx_win_center[1][1][12] = 0
4631 17:50:51.571282 tx_first_pass[1][1][12] = 0
4632 17:50:51.571374 tx_last_pass[1][1][12] = 0
4633 17:50:51.574295 tx_win_center[1][1][13] = 0
4634 17:50:51.577927 tx_first_pass[1][1][13] = 0
4635 17:50:51.581478 tx_last_pass[1][1][13] = 0
4636 17:50:51.581569 tx_win_center[1][1][14] = 0
4637 17:50:51.584491 tx_first_pass[1][1][14] = 0
4638 17:50:51.588107 tx_last_pass[1][1][14] = 0
4639 17:50:51.590990 tx_win_center[1][1][15] = 0
4640 17:50:51.594153 tx_first_pass[1][1][15] = 0
4641 17:50:51.594245 tx_last_pass[1][1][15] = 0
4642 17:50:51.597559 dump params rx window
4643 17:50:51.601105 rx_firspass[0][0][0] = 0
4644 17:50:51.601197 rx_lastpass[0][0][0] = 0
4645 17:50:51.604526 rx_firspass[0][0][1] = 0
4646 17:50:51.607322 rx_lastpass[0][0][1] = 0
4647 17:50:51.607445 rx_firspass[0][0][2] = 0
4648 17:50:51.610929 rx_lastpass[0][0][2] = 0
4649 17:50:51.614064 rx_firspass[0][0][3] = 0
4650 17:50:51.614155 rx_lastpass[0][0][3] = 0
4651 17:50:51.617551 rx_firspass[0][0][4] = 0
4652 17:50:51.621092 rx_lastpass[0][0][4] = 0
4653 17:50:51.621183 rx_firspass[0][0][5] = 0
4654 17:50:51.624068 rx_lastpass[0][0][5] = 0
4655 17:50:51.627744 rx_firspass[0][0][6] = 0
4656 17:50:51.627838 rx_lastpass[0][0][6] = 0
4657 17:50:51.630771 rx_firspass[0][0][7] = 0
4658 17:50:51.634452 rx_lastpass[0][0][7] = 0
4659 17:50:51.637331 rx_firspass[0][0][8] = 0
4660 17:50:51.637425 rx_lastpass[0][0][8] = 0
4661 17:50:51.640758 rx_firspass[0][0][9] = 0
4662 17:50:51.644234 rx_lastpass[0][0][9] = 0
4663 17:50:51.644328 rx_firspass[0][0][10] = 0
4664 17:50:51.647772 rx_lastpass[0][0][10] = 0
4665 17:50:51.650635 rx_firspass[0][0][11] = 0
4666 17:50:51.650730 rx_lastpass[0][0][11] = 0
4667 17:50:51.654000 rx_firspass[0][0][12] = 0
4668 17:50:51.657746 rx_lastpass[0][0][12] = 0
4669 17:50:51.660798 rx_firspass[0][0][13] = 0
4670 17:50:51.660891 rx_lastpass[0][0][13] = 0
4671 17:50:51.664122 rx_firspass[0][0][14] = 0
4672 17:50:51.667347 rx_lastpass[0][0][14] = 0
4673 17:50:51.667455 rx_firspass[0][0][15] = 0
4674 17:50:51.670648 rx_lastpass[0][0][15] = 0
4675 17:50:51.674164 rx_firspass[0][1][0] = 0
4676 17:50:51.677240 rx_lastpass[0][1][0] = 0
4677 17:50:51.677334 rx_firspass[0][1][1] = 0
4678 17:50:51.680675 rx_lastpass[0][1][1] = 0
4679 17:50:51.684324 rx_firspass[0][1][2] = 0
4680 17:50:51.684419 rx_lastpass[0][1][2] = 0
4681 17:50:51.687322 rx_firspass[0][1][3] = 0
4682 17:50:51.690982 rx_lastpass[0][1][3] = 0
4683 17:50:51.691076 rx_firspass[0][1][4] = 0
4684 17:50:51.693974 rx_lastpass[0][1][4] = 0
4685 17:50:51.697448 rx_firspass[0][1][5] = 0
4686 17:50:51.697542 rx_lastpass[0][1][5] = 0
4687 17:50:51.700804 rx_firspass[0][1][6] = 0
4688 17:50:51.703923 rx_lastpass[0][1][6] = 0
4689 17:50:51.704017 rx_firspass[0][1][7] = 0
4690 17:50:51.707036 rx_lastpass[0][1][7] = 0
4691 17:50:51.710525 rx_firspass[0][1][8] = 0
4692 17:50:51.714114 rx_lastpass[0][1][8] = 0
4693 17:50:51.714208 rx_firspass[0][1][9] = 0
4694 17:50:51.717128 rx_lastpass[0][1][9] = 0
4695 17:50:51.720730 rx_firspass[0][1][10] = 0
4696 17:50:51.720824 rx_lastpass[0][1][10] = 0
4697 17:50:51.723590 rx_firspass[0][1][11] = 0
4698 17:50:51.727209 rx_lastpass[0][1][11] = 0
4699 17:50:51.730187 rx_firspass[0][1][12] = 0
4700 17:50:51.730281 rx_lastpass[0][1][12] = 0
4701 17:50:51.733672 rx_firspass[0][1][13] = 0
4702 17:50:51.737281 rx_lastpass[0][1][13] = 0
4703 17:50:51.737376 rx_firspass[0][1][14] = 0
4704 17:50:51.740231 rx_lastpass[0][1][14] = 0
4705 17:50:51.743798 rx_firspass[0][1][15] = 0
4706 17:50:51.747306 rx_lastpass[0][1][15] = 0
4707 17:50:51.747400 rx_firspass[1][0][0] = 0
4708 17:50:51.750303 rx_lastpass[1][0][0] = 0
4709 17:50:51.753733 rx_firspass[1][0][1] = 0
4710 17:50:51.753827 rx_lastpass[1][0][1] = 0
4711 17:50:51.756768 rx_firspass[1][0][2] = 0
4712 17:50:51.760325 rx_lastpass[1][0][2] = 0
4713 17:50:51.760420 rx_firspass[1][0][3] = 0
4714 17:50:51.763331 rx_lastpass[1][0][3] = 0
4715 17:50:51.766882 rx_firspass[1][0][4] = 0
4716 17:50:51.766977 rx_lastpass[1][0][4] = 0
4717 17:50:51.770336 rx_firspass[1][0][5] = 0
4718 17:50:51.773648 rx_lastpass[1][0][5] = 0
4719 17:50:51.773743 rx_firspass[1][0][6] = 0
4720 17:50:51.776949 rx_lastpass[1][0][6] = 0
4721 17:50:51.780179 rx_firspass[1][0][7] = 0
4722 17:50:51.783352 rx_lastpass[1][0][7] = 0
4723 17:50:51.783453 rx_firspass[1][0][8] = 0
4724 17:50:51.786710 rx_lastpass[1][0][8] = 0
4725 17:50:51.790506 rx_firspass[1][0][9] = 0
4726 17:50:51.790600 rx_lastpass[1][0][9] = 0
4727 17:50:51.793273 rx_firspass[1][0][10] = 0
4728 17:50:51.796537 rx_lastpass[1][0][10] = 0
4729 17:50:51.796631 rx_firspass[1][0][11] = 0
4730 17:50:51.799970 rx_lastpass[1][0][11] = 0
4731 17:50:51.803343 rx_firspass[1][0][12] = 0
4732 17:50:51.806854 rx_lastpass[1][0][12] = 0
4733 17:50:51.806948 rx_firspass[1][0][13] = 0
4734 17:50:51.810234 rx_lastpass[1][0][13] = 0
4735 17:50:51.813585 rx_firspass[1][0][14] = 0
4736 17:50:51.813680 rx_lastpass[1][0][14] = 0
4737 17:50:51.816708 rx_firspass[1][0][15] = 0
4738 17:50:51.820300 rx_lastpass[1][0][15] = 0
4739 17:50:51.823337 rx_firspass[1][1][0] = 0
4740 17:50:51.823440 rx_lastpass[1][1][0] = 0
4741 17:50:51.826683 rx_firspass[1][1][1] = 0
4742 17:50:51.829777 rx_lastpass[1][1][1] = 0
4743 17:50:51.829871 rx_firspass[1][1][2] = 0
4744 17:50:51.833304 rx_lastpass[1][1][2] = 0
4745 17:50:51.836977 rx_firspass[1][1][3] = 0
4746 17:50:51.837071 rx_lastpass[1][1][3] = 0
4747 17:50:51.840027 rx_firspass[1][1][4] = 0
4748 17:50:51.843063 rx_lastpass[1][1][4] = 0
4749 17:50:51.843157 rx_firspass[1][1][5] = 0
4750 17:50:51.846686 rx_lastpass[1][1][5] = 0
4751 17:50:51.850249 rx_firspass[1][1][6] = 0
4752 17:50:51.850343 rx_lastpass[1][1][6] = 0
4753 17:50:51.853201 rx_firspass[1][1][7] = 0
4754 17:50:51.856677 rx_lastpass[1][1][7] = 0
4755 17:50:51.859679 rx_firspass[1][1][8] = 0
4756 17:50:51.859773 rx_lastpass[1][1][8] = 0
4757 17:50:51.863223 rx_firspass[1][1][9] = 0
4758 17:50:51.866836 rx_lastpass[1][1][9] = 0
4759 17:50:51.866931 rx_firspass[1][1][10] = 0
4760 17:50:51.869791 rx_lastpass[1][1][10] = 0
4761 17:50:51.873391 rx_firspass[1][1][11] = 0
4762 17:50:51.873486 rx_lastpass[1][1][11] = 0
4763 17:50:51.876355 rx_firspass[1][1][12] = 0
4764 17:50:51.879752 rx_lastpass[1][1][12] = 0
4765 17:50:51.883227 rx_firspass[1][1][13] = 0
4766 17:50:51.883321 rx_lastpass[1][1][13] = 0
4767 17:50:51.886303 rx_firspass[1][1][14] = 0
4768 17:50:51.889952 rx_lastpass[1][1][14] = 0
4769 17:50:51.890047 rx_firspass[1][1][15] = 0
4770 17:50:51.892907 rx_lastpass[1][1][15] = 0
4771 17:50:51.896482 dump params clk_delay
4772 17:50:51.896577 clk_delay[0] = 0
4773 17:50:51.899804 clk_delay[1] = 0
4774 17:50:51.899898 dump params dqs_delay
4775 17:50:51.903281 dqs_delay[0][0] = 0
4776 17:50:51.903375 dqs_delay[0][1] = 0
4777 17:50:51.906123 dqs_delay[1][0] = 0
4778 17:50:51.906217 dqs_delay[1][1] = 0
4779 17:50:51.909814 dump params delay_cell_unit = 735
4780 17:50:51.913007 dump source = 0x0
4781 17:50:51.916614 dump params frequency:800
4782 17:50:51.916708 dump params rank number:2
4783 17:50:51.916803
4784 17:50:51.919694 dump params write leveling
4785 17:50:51.922885 write leveling[0][0][0] = 0x0
4786 17:50:51.926257 write leveling[0][0][1] = 0x0
4787 17:50:51.926351 write leveling[0][1][0] = 0x0
4788 17:50:51.929589 write leveling[0][1][1] = 0x0
4789 17:50:51.933328 write leveling[1][0][0] = 0x0
4790 17:50:51.936563 write leveling[1][0][1] = 0x0
4791 17:50:51.939583 write leveling[1][1][0] = 0x0
4792 17:50:51.939677 write leveling[1][1][1] = 0x0
4793 17:50:51.943093 dump params cbt_cs
4794 17:50:51.946663 cbt_cs[0][0] = 0x0
4795 17:50:51.946757 cbt_cs[0][1] = 0x0
4796 17:50:51.949689 cbt_cs[1][0] = 0x0
4797 17:50:51.949784 cbt_cs[1][1] = 0x0
4798 17:50:51.953136 dump params cbt_mr12
4799 17:50:51.953230 cbt_mr12[0][0] = 0x0
4800 17:50:51.956750 cbt_mr12[0][1] = 0x0
4801 17:50:51.956844 cbt_mr12[1][0] = 0x0
4802 17:50:51.959597 cbt_mr12[1][1] = 0x0
4803 17:50:51.959690 dump params tx window
4804 17:50:51.963075 tx_center_min[0][0][0] = 0
4805 17:50:51.966732 tx_center_max[0][0][0] = 0
4806 17:50:51.969756 tx_center_min[0][0][1] = 0
4807 17:50:51.969851 tx_center_max[0][0][1] = 0
4808 17:50:51.972824 tx_center_min[0][1][0] = 0
4809 17:50:51.976364 tx_center_max[0][1][0] = 0
4810 17:50:51.979937 tx_center_min[0][1][1] = 0
4811 17:50:51.980031 tx_center_max[0][1][1] = 0
4812 17:50:51.982903 tx_center_min[1][0][0] = 0
4813 17:50:51.986426 tx_center_max[1][0][0] = 0
4814 17:50:51.990041 tx_center_min[1][0][1] = 0
4815 17:50:51.990136 tx_center_max[1][0][1] = 0
4816 17:50:51.993167 tx_center_min[1][1][0] = 0
4817 17:50:51.996521 tx_center_max[1][1][0] = 0
4818 17:50:52.000084 tx_center_min[1][1][1] = 0
4819 17:50:52.000179 tx_center_max[1][1][1] = 0
4820 17:50:52.002868 dump params tx window
4821 17:50:52.006385 tx_win_center[0][0][0] = 0
4822 17:50:52.006485 tx_first_pass[0][0][0] = 0
4823 17:50:52.009416 tx_last_pass[0][0][0] = 0
4824 17:50:52.013114 tx_win_center[0][0][1] = 0
4825 17:50:52.016603 tx_first_pass[0][0][1] = 0
4826 17:50:52.016754 tx_last_pass[0][0][1] = 0
4827 17:50:52.019379 tx_win_center[0][0][2] = 0
4828 17:50:52.022820 tx_first_pass[0][0][2] = 0
4829 17:50:52.022956 tx_last_pass[0][0][2] = 0
4830 17:50:52.026070 tx_win_center[0][0][3] = 0
4831 17:50:52.029415 tx_first_pass[0][0][3] = 0
4832 17:50:52.033371 tx_last_pass[0][0][3] = 0
4833 17:50:52.033531 tx_win_center[0][0][4] = 0
4834 17:50:52.036349 tx_first_pass[0][0][4] = 0
4835 17:50:52.039334 tx_last_pass[0][0][4] = 0
4836 17:50:52.039527 tx_win_center[0][0][5] = 0
4837 17:50:52.042851 tx_first_pass[0][0][5] = 0
4838 17:50:52.046377 tx_last_pass[0][0][5] = 0
4839 17:50:52.049535 tx_win_center[0][0][6] = 0
4840 17:50:52.049694 tx_first_pass[0][0][6] = 0
4841 17:50:52.052910 tx_last_pass[0][0][6] = 0
4842 17:50:52.056514 tx_win_center[0][0][7] = 0
4843 17:50:52.059285 tx_first_pass[0][0][7] = 0
4844 17:50:52.059415 tx_last_pass[0][0][7] = 0
4845 17:50:52.062948 tx_win_center[0][0][8] = 0
4846 17:50:52.065891 tx_first_pass[0][0][8] = 0
4847 17:50:52.065985 tx_last_pass[0][0][8] = 0
4848 17:50:52.069574 tx_win_center[0][0][9] = 0
4849 17:50:52.072627 tx_first_pass[0][0][9] = 0
4850 17:50:52.076191 tx_last_pass[0][0][9] = 0
4851 17:50:52.076283 tx_win_center[0][0][10] = 0
4852 17:50:52.079235 tx_first_pass[0][0][10] = 0
4853 17:50:52.082891 tx_last_pass[0][0][10] = 0
4854 17:50:52.085842 tx_win_center[0][0][11] = 0
4855 17:50:52.085952 tx_first_pass[0][0][11] = 0
4856 17:50:52.089316 tx_last_pass[0][0][11] = 0
4857 17:50:52.092913 tx_win_center[0][0][12] = 0
4858 17:50:52.095999 tx_first_pass[0][0][12] = 0
4859 17:50:52.096158 tx_last_pass[0][0][12] = 0
4860 17:50:52.099591 tx_win_center[0][0][13] = 0
4861 17:50:52.102699 tx_first_pass[0][0][13] = 0
4862 17:50:52.106321 tx_last_pass[0][0][13] = 0
4863 17:50:52.106435 tx_win_center[0][0][14] = 0
4864 17:50:52.109103 tx_first_pass[0][0][14] = 0
4865 17:50:52.112714 tx_last_pass[0][0][14] = 0
4866 17:50:52.115703 tx_win_center[0][0][15] = 0
4867 17:50:52.115801 tx_first_pass[0][0][15] = 0
4868 17:50:52.119437 tx_last_pass[0][0][15] = 0
4869 17:50:52.122476 tx_win_center[0][1][0] = 0
4870 17:50:52.126033 tx_first_pass[0][1][0] = 0
4871 17:50:52.126130 tx_last_pass[0][1][0] = 0
4872 17:50:52.129537 tx_win_center[0][1][1] = 0
4873 17:50:52.132338 tx_first_pass[0][1][1] = 0
4874 17:50:52.135646 tx_last_pass[0][1][1] = 0
4875 17:50:52.135746 tx_win_center[0][1][2] = 0
4876 17:50:52.139176 tx_first_pass[0][1][2] = 0
4877 17:50:52.142205 tx_last_pass[0][1][2] = 0
4878 17:50:52.145820 tx_win_center[0][1][3] = 0
4879 17:50:52.145915 tx_first_pass[0][1][3] = 0
4880 17:50:52.149202 tx_last_pass[0][1][3] = 0
4881 17:50:52.152451 tx_win_center[0][1][4] = 0
4882 17:50:52.152550 tx_first_pass[0][1][4] = 0
4883 17:50:52.155821 tx_last_pass[0][1][4] = 0
4884 17:50:52.158984 tx_win_center[0][1][5] = 0
4885 17:50:52.162206 tx_first_pass[0][1][5] = 0
4886 17:50:52.162301 tx_last_pass[0][1][5] = 0
4887 17:50:52.165600 tx_win_center[0][1][6] = 0
4888 17:50:52.169003 tx_first_pass[0][1][6] = 0
4889 17:50:52.169123 tx_last_pass[0][1][6] = 0
4890 17:50:52.172437 tx_win_center[0][1][7] = 0
4891 17:50:52.175519 tx_first_pass[0][1][7] = 0
4892 17:50:52.179060 tx_last_pass[0][1][7] = 0
4893 17:50:52.179184 tx_win_center[0][1][8] = 0
4894 17:50:52.182507 tx_first_pass[0][1][8] = 0
4895 17:50:52.185564 tx_last_pass[0][1][8] = 0
4896 17:50:52.189209 tx_win_center[0][1][9] = 0
4897 17:50:52.189308 tx_first_pass[0][1][9] = 0
4898 17:50:52.192064 tx_last_pass[0][1][9] = 0
4899 17:50:52.195642 tx_win_center[0][1][10] = 0
4900 17:50:52.198711 tx_first_pass[0][1][10] = 0
4901 17:50:52.198811 tx_last_pass[0][1][10] = 0
4902 17:50:52.202219 tx_win_center[0][1][11] = 0
4903 17:50:52.205858 tx_first_pass[0][1][11] = 0
4904 17:50:52.208847 tx_last_pass[0][1][11] = 0
4905 17:50:52.208947 tx_win_center[0][1][12] = 0
4906 17:50:52.212284 tx_first_pass[0][1][12] = 0
4907 17:50:52.215850 tx_last_pass[0][1][12] = 0
4908 17:50:52.218937 tx_win_center[0][1][13] = 0
4909 17:50:52.219042 tx_first_pass[0][1][13] = 0
4910 17:50:52.222005 tx_last_pass[0][1][13] = 0
4911 17:50:52.225655 tx_win_center[0][1][14] = 0
4912 17:50:52.228796 tx_first_pass[0][1][14] = 0
4913 17:50:52.228927 tx_last_pass[0][1][14] = 0
4914 17:50:52.232350 tx_win_center[0][1][15] = 0
4915 17:50:52.235248 tx_first_pass[0][1][15] = 0
4916 17:50:52.238819 tx_last_pass[0][1][15] = 0
4917 17:50:52.238912 tx_win_center[1][0][0] = 0
4918 17:50:52.242377 tx_first_pass[1][0][0] = 0
4919 17:50:52.245187 tx_last_pass[1][0][0] = 0
4920 17:50:52.245279 tx_win_center[1][0][1] = 0
4921 17:50:52.248443 tx_first_pass[1][0][1] = 0
4922 17:50:52.251935 tx_last_pass[1][0][1] = 0
4923 17:50:52.255238 tx_win_center[1][0][2] = 0
4924 17:50:52.255331 tx_first_pass[1][0][2] = 0
4925 17:50:52.258439 tx_last_pass[1][0][2] = 0
4926 17:50:52.262241 tx_win_center[1][0][3] = 0
4927 17:50:52.265180 tx_first_pass[1][0][3] = 0
4928 17:50:52.265333 tx_last_pass[1][0][3] = 0
4929 17:50:52.269159 tx_win_center[1][0][4] = 0
4930 17:50:52.271771 tx_first_pass[1][0][4] = 0
4931 17:50:52.271915 tx_last_pass[1][0][4] = 0
4932 17:50:52.275471 tx_win_center[1][0][5] = 0
4933 17:50:52.278982 tx_first_pass[1][0][5] = 0
4934 17:50:52.282317 tx_last_pass[1][0][5] = 0
4935 17:50:52.282504 tx_win_center[1][0][6] = 0
4936 17:50:52.285606 tx_first_pass[1][0][6] = 0
4937 17:50:52.288819 tx_last_pass[1][0][6] = 0
4938 17:50:52.292240 tx_win_center[1][0][7] = 0
4939 17:50:52.292438 tx_first_pass[1][0][7] = 0
4940 17:50:52.295684 tx_last_pass[1][0][7] = 0
4941 17:50:52.298874 tx_win_center[1][0][8] = 0
4942 17:50:52.299080 tx_first_pass[1][0][8] = 0
4943 17:50:52.302254 tx_last_pass[1][0][8] = 0
4944 17:50:52.305508 tx_win_center[1][0][9] = 0
4945 17:50:52.308915 tx_first_pass[1][0][9] = 0
4946 17:50:52.309182 tx_last_pass[1][0][9] = 0
4947 17:50:52.311953 tx_win_center[1][0][10] = 0
4948 17:50:52.315531 tx_first_pass[1][0][10] = 0
4949 17:50:52.318482 tx_last_pass[1][0][10] = 0
4950 17:50:52.318757 tx_win_center[1][0][11] = 0
4951 17:50:52.322263 tx_first_pass[1][0][11] = 0
4952 17:50:52.325312 tx_last_pass[1][0][11] = 0
4953 17:50:52.328972 tx_win_center[1][0][12] = 0
4954 17:50:52.329332 tx_first_pass[1][0][12] = 0
4955 17:50:52.332058 tx_last_pass[1][0][12] = 0
4956 17:50:52.335515 tx_win_center[1][0][13] = 0
4957 17:50:52.339250 tx_first_pass[1][0][13] = 0
4958 17:50:52.339673 tx_last_pass[1][0][13] = 0
4959 17:50:52.342415 tx_win_center[1][0][14] = 0
4960 17:50:52.345257 tx_first_pass[1][0][14] = 0
4961 17:50:52.348921 tx_last_pass[1][0][14] = 0
4962 17:50:52.349282 tx_win_center[1][0][15] = 0
4963 17:50:52.352075 tx_first_pass[1][0][15] = 0
4964 17:50:52.355695 tx_last_pass[1][0][15] = 0
4965 17:50:52.358799 tx_win_center[1][1][0] = 0
4966 17:50:52.359294 tx_first_pass[1][1][0] = 0
4967 17:50:52.362182 tx_last_pass[1][1][0] = 0
4968 17:50:52.365626 tx_win_center[1][1][1] = 0
4969 17:50:52.368920 tx_first_pass[1][1][1] = 0
4970 17:50:52.369455 tx_last_pass[1][1][1] = 0
4971 17:50:52.371989 tx_win_center[1][1][2] = 0
4972 17:50:52.375579 tx_first_pass[1][1][2] = 0
4973 17:50:52.375968 tx_last_pass[1][1][2] = 0
4974 17:50:52.378476 tx_win_center[1][1][3] = 0
4975 17:50:52.382244 tx_first_pass[1][1][3] = 0
4976 17:50:52.385896 tx_last_pass[1][1][3] = 0
4977 17:50:52.386395 tx_win_center[1][1][4] = 0
4978 17:50:52.388821 tx_first_pass[1][1][4] = 0
4979 17:50:52.392362 tx_last_pass[1][1][4] = 0
4980 17:50:52.392868 tx_win_center[1][1][5] = 0
4981 17:50:52.395274 tx_first_pass[1][1][5] = 0
4982 17:50:52.398688 tx_last_pass[1][1][5] = 0
4983 17:50:52.401843 tx_win_center[1][1][6] = 0
4984 17:50:52.402234 tx_first_pass[1][1][6] = 0
4985 17:50:52.405249 tx_last_pass[1][1][6] = 0
4986 17:50:52.408569 tx_win_center[1][1][7] = 0
4987 17:50:52.412372 tx_first_pass[1][1][7] = 0
4988 17:50:52.412897 tx_last_pass[1][1][7] = 0
4989 17:50:52.415625 tx_win_center[1][1][8] = 0
4990 17:50:52.418769 tx_first_pass[1][1][8] = 0
4991 17:50:52.419187 tx_last_pass[1][1][8] = 0
4992 17:50:52.421927 tx_win_center[1][1][9] = 0
4993 17:50:52.425168 tx_first_pass[1][1][9] = 0
4994 17:50:52.428969 tx_last_pass[1][1][9] = 0
4995 17:50:52.429490 tx_win_center[1][1][10] = 0
4996 17:50:52.432265 tx_first_pass[1][1][10] = 0
4997 17:50:52.435401 tx_last_pass[1][1][10] = 0
4998 17:50:52.438797 tx_win_center[1][1][11] = 0
4999 17:50:52.439261 tx_first_pass[1][1][11] = 0
5000 17:50:52.442040 tx_last_pass[1][1][11] = 0
5001 17:50:52.445920 tx_win_center[1][1][12] = 0
5002 17:50:52.448886 tx_first_pass[1][1][12] = 0
5003 17:50:52.449279 tx_last_pass[1][1][12] = 0
5004 17:50:52.451892 tx_win_center[1][1][13] = 0
5005 17:50:52.455877 tx_first_pass[1][1][13] = 0
5006 17:50:52.458820 tx_last_pass[1][1][13] = 0
5007 17:50:52.459344 tx_win_center[1][1][14] = 0
5008 17:50:52.462214 tx_first_pass[1][1][14] = 0
5009 17:50:52.465006 tx_last_pass[1][1][14] = 0
5010 17:50:52.468499 tx_win_center[1][1][15] = 0
5011 17:50:52.468884 tx_first_pass[1][1][15] = 0
5012 17:50:52.471718 tx_last_pass[1][1][15] = 0
5013 17:50:52.474825 dump params rx window
5014 17:50:52.475248 rx_firspass[0][0][0] = 0
5015 17:50:52.478469 rx_lastpass[0][0][0] = 0
5016 17:50:52.482022 rx_firspass[0][0][1] = 0
5017 17:50:52.485425 rx_lastpass[0][0][1] = 0
5018 17:50:52.485824 rx_firspass[0][0][2] = 0
5019 17:50:52.488494 rx_lastpass[0][0][2] = 0
5020 17:50:52.491538 rx_firspass[0][0][3] = 0
5021 17:50:52.491921 rx_lastpass[0][0][3] = 0
5022 17:50:52.495270 rx_firspass[0][0][4] = 0
5023 17:50:52.498451 rx_lastpass[0][0][4] = 0
5024 17:50:52.498939 rx_firspass[0][0][5] = 0
5025 17:50:52.502007 rx_lastpass[0][0][5] = 0
5026 17:50:52.504934 rx_firspass[0][0][6] = 0
5027 17:50:52.505426 rx_lastpass[0][0][6] = 0
5028 17:50:52.508003 rx_firspass[0][0][7] = 0
5029 17:50:52.512045 rx_lastpass[0][0][7] = 0
5030 17:50:52.514703 rx_firspass[0][0][8] = 0
5031 17:50:52.515093 rx_lastpass[0][0][8] = 0
5032 17:50:52.518579 rx_firspass[0][0][9] = 0
5033 17:50:52.521530 rx_lastpass[0][0][9] = 0
5034 17:50:52.522026 rx_firspass[0][0][10] = 0
5035 17:50:52.524557 rx_lastpass[0][0][10] = 0
5036 17:50:52.528270 rx_firspass[0][0][11] = 0
5037 17:50:52.528654 rx_lastpass[0][0][11] = 0
5038 17:50:52.531502 rx_firspass[0][0][12] = 0
5039 17:50:52.534673 rx_lastpass[0][0][12] = 0
5040 17:50:52.538183 rx_firspass[0][0][13] = 0
5041 17:50:52.538678 rx_lastpass[0][0][13] = 0
5042 17:50:52.541778 rx_firspass[0][0][14] = 0
5043 17:50:52.544742 rx_lastpass[0][0][14] = 0
5044 17:50:52.545131 rx_firspass[0][0][15] = 0
5045 17:50:52.547876 rx_lastpass[0][0][15] = 0
5046 17:50:52.551597 rx_firspass[0][1][0] = 0
5047 17:50:52.554778 rx_lastpass[0][1][0] = 0
5048 17:50:52.555266 rx_firspass[0][1][1] = 0
5049 17:50:52.558405 rx_lastpass[0][1][1] = 0
5050 17:50:52.561209 rx_firspass[0][1][2] = 0
5051 17:50:52.561596 rx_lastpass[0][1][2] = 0
5052 17:50:52.565000 rx_firspass[0][1][3] = 0
5053 17:50:52.567695 rx_lastpass[0][1][3] = 0
5054 17:50:52.568080 rx_firspass[0][1][4] = 0
5055 17:50:52.571357 rx_lastpass[0][1][4] = 0
5056 17:50:52.574747 rx_firspass[0][1][5] = 0
5057 17:50:52.575133 rx_lastpass[0][1][5] = 0
5058 17:50:52.577986 rx_firspass[0][1][6] = 0
5059 17:50:52.581331 rx_lastpass[0][1][6] = 0
5060 17:50:52.581718 rx_firspass[0][1][7] = 0
5061 17:50:52.584630 rx_lastpass[0][1][7] = 0
5062 17:50:52.588075 rx_firspass[0][1][8] = 0
5063 17:50:52.588431 rx_lastpass[0][1][8] = 0
5064 17:50:52.591600 rx_firspass[0][1][9] = 0
5065 17:50:52.594981 rx_lastpass[0][1][9] = 0
5066 17:50:52.597756 rx_firspass[0][1][10] = 0
5067 17:50:52.598114 rx_lastpass[0][1][10] = 0
5068 17:50:52.601508 rx_firspass[0][1][11] = 0
5069 17:50:52.604694 rx_lastpass[0][1][11] = 0
5070 17:50:52.605157 rx_firspass[0][1][12] = 0
5071 17:50:52.608083 rx_lastpass[0][1][12] = 0
5072 17:50:52.611259 rx_firspass[0][1][13] = 0
5073 17:50:52.614566 rx_lastpass[0][1][13] = 0
5074 17:50:52.614930 rx_firspass[0][1][14] = 0
5075 17:50:52.618288 rx_lastpass[0][1][14] = 0
5076 17:50:52.621579 rx_firspass[0][1][15] = 0
5077 17:50:52.622058 rx_lastpass[0][1][15] = 0
5078 17:50:52.624725 rx_firspass[1][0][0] = 0
5079 17:50:52.627744 rx_lastpass[1][0][0] = 0
5080 17:50:52.628135 rx_firspass[1][0][1] = 0
5081 17:50:52.631464 rx_lastpass[1][0][1] = 0
5082 17:50:52.634630 rx_firspass[1][0][2] = 0
5083 17:50:52.638510 rx_lastpass[1][0][2] = 0
5084 17:50:52.638978 rx_firspass[1][0][3] = 0
5085 17:50:52.641266 rx_lastpass[1][0][3] = 0
5086 17:50:52.644724 rx_firspass[1][0][4] = 0
5087 17:50:52.645113 rx_lastpass[1][0][4] = 0
5088 17:50:52.648163 rx_firspass[1][0][5] = 0
5089 17:50:52.651349 rx_lastpass[1][0][5] = 0
5090 17:50:52.651770 rx_firspass[1][0][6] = 0
5091 17:50:52.655156 rx_lastpass[1][0][6] = 0
5092 17:50:52.658001 rx_firspass[1][0][7] = 0
5093 17:50:52.658393 rx_lastpass[1][0][7] = 0
5094 17:50:52.661216 rx_firspass[1][0][8] = 0
5095 17:50:52.664572 rx_lastpass[1][0][8] = 0
5096 17:50:52.665112 rx_firspass[1][0][9] = 0
5097 17:50:52.667709 rx_lastpass[1][0][9] = 0
5098 17:50:52.670845 rx_firspass[1][0][10] = 0
5099 17:50:52.674701 rx_lastpass[1][0][10] = 0
5100 17:50:52.675203 rx_firspass[1][0][11] = 0
5101 17:50:52.678265 rx_lastpass[1][0][11] = 0
5102 17:50:52.681354 rx_firspass[1][0][12] = 0
5103 17:50:52.681746 rx_lastpass[1][0][12] = 0
5104 17:50:52.684424 rx_firspass[1][0][13] = 0
5105 17:50:52.687922 rx_lastpass[1][0][13] = 0
5106 17:50:52.690810 rx_firspass[1][0][14] = 0
5107 17:50:52.691196 rx_lastpass[1][0][14] = 0
5108 17:50:52.694683 rx_firspass[1][0][15] = 0
5109 17:50:52.697674 rx_lastpass[1][0][15] = 0
5110 17:50:52.698058 rx_firspass[1][1][0] = 0
5111 17:50:52.701509 rx_lastpass[1][1][0] = 0
5112 17:50:52.704303 rx_firspass[1][1][1] = 0
5113 17:50:52.704698 rx_lastpass[1][1][1] = 0
5114 17:50:52.707464 rx_firspass[1][1][2] = 0
5115 17:50:52.711133 rx_lastpass[1][1][2] = 0
5116 17:50:52.714471 rx_firspass[1][1][3] = 0
5117 17:50:52.714863 rx_lastpass[1][1][3] = 0
5118 17:50:52.717645 rx_firspass[1][1][4] = 0
5119 17:50:52.721142 rx_lastpass[1][1][4] = 0
5120 17:50:52.721687 rx_firspass[1][1][5] = 0
5121 17:50:52.724465 rx_lastpass[1][1][5] = 0
5122 17:50:52.727684 rx_firspass[1][1][6] = 0
5123 17:50:52.728181 rx_lastpass[1][1][6] = 0
5124 17:50:52.731071 rx_firspass[1][1][7] = 0
5125 17:50:52.734049 rx_lastpass[1][1][7] = 0
5126 17:50:52.734436 rx_firspass[1][1][8] = 0
5127 17:50:52.737784 rx_lastpass[1][1][8] = 0
5128 17:50:52.741138 rx_firspass[1][1][9] = 0
5129 17:50:52.741652 rx_lastpass[1][1][9] = 0
5130 17:50:52.744318 rx_firspass[1][1][10] = 0
5131 17:50:52.747279 rx_lastpass[1][1][10] = 0
5132 17:50:52.750877 rx_firspass[1][1][11] = 0
5133 17:50:52.751377 rx_lastpass[1][1][11] = 0
5134 17:50:52.754267 rx_firspass[1][1][12] = 0
5135 17:50:52.757580 rx_lastpass[1][1][12] = 0
5136 17:50:52.758000 rx_firspass[1][1][13] = 0
5137 17:50:52.760447 rx_lastpass[1][1][13] = 0
5138 17:50:52.764302 rx_firspass[1][1][14] = 0
5139 17:50:52.767190 rx_lastpass[1][1][14] = 0
5140 17:50:52.767617 rx_firspass[1][1][15] = 0
5141 17:50:52.770649 rx_lastpass[1][1][15] = 0
5142 17:50:52.774428 dump params clk_delay
5143 17:50:52.774925 clk_delay[0] = 0
5144 17:50:52.777340 clk_delay[1] = 0
5145 17:50:52.777809 dump params dqs_delay
5146 17:50:52.780809 dqs_delay[0][0] = 0
5147 17:50:52.781192 dqs_delay[0][1] = 0
5148 17:50:52.783797 dqs_delay[1][0] = 0
5149 17:50:52.784180 dqs_delay[1][1] = 0
5150 17:50:52.787600 dump params delay_cell_unit = 735
5151 17:50:52.791078 mt_set_emi_preloader end
5152 17:50:52.794361 [mt_mem_init] dram size: 0x100000000, rank number: 2
5153 17:50:52.800316 [complex_mem_test] start addr:0x40000000, len:20480
5154 17:50:52.836473 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5155 17:50:52.843000 [complex_mem_test] start addr:0x80000000, len:20480
5156 17:50:52.878794 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5157 17:50:52.885108 [complex_mem_test] start addr:0xc0000000, len:20480
5158 17:50:52.920957 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5159 17:50:52.926994 [complex_mem_test] start addr:0x56000000, len:8192
5160 17:50:52.943942 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5161 17:50:52.944342 ddr_geometry:1
5162 17:50:52.950341 [complex_mem_test] start addr:0x80000000, len:8192
5163 17:50:52.967895 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5164 17:50:52.971506 dram_init: dram init end (result: 0)
5165 17:50:52.977833 Successfully loaded DRAM blobs and ran DRAM calibration
5166 17:50:52.987349 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5167 17:50:52.987617 CBMEM:
5168 17:50:52.990467 IMD: root @ 00000000fffff000 254 entries.
5169 17:50:52.994005 IMD: root @ 00000000ffffec00 62 entries.
5170 17:50:53.000392 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5171 17:50:53.007264 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5172 17:50:53.010613 in-header: 03 a1 00 00 08 00 00 00
5173 17:50:53.013739 in-data: 84 60 60 10 00 00 00 00
5174 17:50:53.017638 Chrome EC: clear events_b mask to 0x0000000020004000
5175 17:50:53.024140 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5176 17:50:53.027894 in-header: 03 fd 00 00 00 00 00 00
5177 17:50:53.028063 in-data:
5178 17:50:53.034415 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5179 17:50:53.037463 CBFS @ 21000 size 3d4000
5180 17:50:53.041356 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5181 17:50:53.044700 CBFS: Locating 'fallback/ramstage'
5182 17:50:53.047603 CBFS: Found @ offset 10d40 size d563
5183 17:50:53.069867 read SPI 0x31d94 0xd547: 16672 us, 3274 KB/s, 26.192 Mbps
5184 17:50:53.082191 Accumulated console time in romstage 13593 ms
5185 17:50:53.082571
5186 17:50:53.082805
5187 17:50:53.091815 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5188 17:50:53.095569 ARM64: Exception handlers installed.
5189 17:50:53.096098 ARM64: Testing exception
5190 17:50:53.098528 ARM64: Done test exception
5191 17:50:53.102223 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5192 17:50:53.105248 Manufacturer: ef
5193 17:50:53.108782 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5194 17:50:53.115196 WARNING: RO_VPD is uninitialized or empty.
5195 17:50:53.118519 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5196 17:50:53.121706 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5197 17:50:53.131394 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5198 17:50:53.134971 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5199 17:50:53.141121 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5200 17:50:53.141401 Enumerating buses...
5201 17:50:53.147727 Show all devs... Before device enumeration.
5202 17:50:53.147903 Root Device: enabled 1
5203 17:50:53.151143 CPU_CLUSTER: 0: enabled 1
5204 17:50:53.151316 CPU: 00: enabled 1
5205 17:50:53.154501 Compare with tree...
5206 17:50:53.157388 Root Device: enabled 1
5207 17:50:53.157554 CPU_CLUSTER: 0: enabled 1
5208 17:50:53.160853 CPU: 00: enabled 1
5209 17:50:53.164229 Root Device scanning...
5210 17:50:53.164342 root_dev_scan_bus for Root Device
5211 17:50:53.167576 CPU_CLUSTER: 0 enabled
5212 17:50:53.170942 root_dev_scan_bus for Root Device done
5213 17:50:53.177206 scan_bus: scanning of bus Root Device took 10689 usecs
5214 17:50:53.177331 done
5215 17:50:53.180927 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5216 17:50:53.184002 Allocating resources...
5217 17:50:53.184094 Reading resources...
5218 17:50:53.187518 Root Device read_resources bus 0 link: 0
5219 17:50:53.194143 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5220 17:50:53.194259 CPU: 00 missing read_resources
5221 17:50:53.200800 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5222 17:50:53.203898 Root Device read_resources bus 0 link: 0 done
5223 17:50:53.207402 Done reading resources.
5224 17:50:53.210964 Show resources in subtree (Root Device)...After reading.
5225 17:50:53.214431 Root Device child on link 0 CPU_CLUSTER: 0
5226 17:50:53.217538 CPU_CLUSTER: 0 child on link 0 CPU: 00
5227 17:50:53.226965 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5228 17:50:53.227060 CPU: 00
5229 17:50:53.230433 Setting resources...
5230 17:50:53.233810 Root Device assign_resources, bus 0 link: 0
5231 17:50:53.237521 CPU_CLUSTER: 0 missing set_resources
5232 17:50:53.240832 Root Device assign_resources, bus 0 link: 0
5233 17:50:53.243753 Done setting resources.
5234 17:50:53.250553 Show resources in subtree (Root Device)...After assigning values.
5235 17:50:53.253916 Root Device child on link 0 CPU_CLUSTER: 0
5236 17:50:53.257080 CPU_CLUSTER: 0 child on link 0 CPU: 00
5237 17:50:53.267216 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5238 17:50:53.267653 CPU: 00
5239 17:50:53.270692 Done allocating resources.
5240 17:50:53.273880 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5241 17:50:53.277227 Enabling resources...
5242 17:50:53.277583 done.
5243 17:50:53.280575 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5244 17:50:53.283905 Initializing devices...
5245 17:50:53.284230 Root Device init ...
5246 17:50:53.290554 mainboard_init: Starting display init.
5247 17:50:53.290883 ADC[4]: Raw value=75746 ID=0
5248 17:50:53.314099 anx7625_power_on_init: Init interface.
5249 17:50:53.317853 anx7625_disable_pd_protocol: Disabled PD feature.
5250 17:50:53.323924 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5251 17:50:53.371233 anx7625_start_dp_work: Secure OCM version=00
5252 17:50:53.374117 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5253 17:50:53.391305 sp_tx_get_edid_block: EDID Block = 1
5254 17:50:53.508642 Extracted contents:
5255 17:50:53.512361 header: 00 ff ff ff ff ff ff 00
5256 17:50:53.515521 serial number: 06 af 5c 14 00 00 00 00 00 1a
5257 17:50:53.518736 version: 01 04
5258 17:50:53.522413 basic params: 95 1a 0e 78 02
5259 17:50:53.525134 chroma info: 99 85 95 55 56 92 28 22 50 54
5260 17:50:53.528681 established: 00 00 00
5261 17:50:53.535337 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5262 17:50:53.538656 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5263 17:50:53.545358 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5264 17:50:53.552208 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5265 17:50:53.558111 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5266 17:50:53.561850 extensions: 00
5267 17:50:53.562266 checksum: ae
5268 17:50:53.562599
5269 17:50:53.565165 Manufacturer: AUO Model 145c Serial Number 0
5270 17:50:53.568480 Made week 0 of 2016
5271 17:50:53.568900 EDID version: 1.4
5272 17:50:53.571522 Digital display
5273 17:50:53.575357 6 bits per primary color channel
5274 17:50:53.575950 DisplayPort interface
5275 17:50:53.578447 Maximum image size: 26 cm x 14 cm
5276 17:50:53.581871 Gamma: 220%
5277 17:50:53.582396 Check DPMS levels
5278 17:50:53.584928 Supported color formats: RGB 4:4:4
5279 17:50:53.588433 First detailed timing is preferred timing
5280 17:50:53.591724 Established timings supported:
5281 17:50:53.594877 Standard timings supported:
5282 17:50:53.595288 Detailed timings
5283 17:50:53.602090 Hex of detail: ce1d56ea50001a3030204600009010000018
5284 17:50:53.604692 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5285 17:50:53.608258 0556 0586 05a6 0640 hborder 0
5286 17:50:53.611871 0300 0304 030a 031a vborder 0
5287 17:50:53.615244 -hsync -vsync
5288 17:50:53.618580 Did detailed timing
5289 17:50:53.621604 Hex of detail: 0000000f0000000000000000000000000020
5290 17:50:53.624666 Manufacturer-specified data, tag 15
5291 17:50:53.631755 Hex of detail: 000000fe0041554f0a202020202020202020
5292 17:50:53.632295 ASCII string: AUO
5293 17:50:53.634651 Hex of detail: 000000fe004231313658414230312e34200a
5294 17:50:53.638080 ASCII string: B116XAB01.4
5295 17:50:53.638499 Checksum
5296 17:50:53.641303 Checksum: 0xae (valid)
5297 17:50:53.648359 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5298 17:50:53.648896 DSI data_rate: 457800000 bps
5299 17:50:53.655873 anx7625_parse_edid: set default k value to 0x3d for panel
5300 17:50:53.658736 anx7625_parse_edid: pixelclock(76300).
5301 17:50:53.662313 hactive(1366), hsync(32), hfp(48), hbp(154)
5302 17:50:53.665771 vactive(768), vsync(6), vfp(4), vbp(16)
5303 17:50:53.668787 anx7625_dsi_config: config dsi.
5304 17:50:53.676831 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5305 17:50:53.697728 anx7625_dsi_config: success to config DSI
5306 17:50:53.701535 anx7625_dp_start: MIPI phy setup OK.
5307 17:50:53.704970 [SSUSB] Setting up USB HOST controller...
5308 17:50:53.707850 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5309 17:50:53.711133 [SSUSB] phy power-on done.
5310 17:50:53.715151 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5311 17:50:53.718631 in-header: 03 fc 01 00 00 00 00 00
5312 17:50:53.719166 in-data:
5313 17:50:53.721944 handle_proto3_response: EC response with error code: 1
5314 17:50:53.725115 SPM: pcm index = 1
5315 17:50:53.728423 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5316 17:50:53.732037 CBFS @ 21000 size 3d4000
5317 17:50:53.738721 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5318 17:50:53.741974 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5319 17:50:53.745219 CBFS: Found @ offset 1e7c0 size 1026
5320 17:50:53.751997 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5321 17:50:53.755218 SPM: binary array size = 2988
5322 17:50:53.758880 SPM: version = pcm_allinone_v1.17.2_20180829
5323 17:50:53.761672 SPM binary loaded in 32 msecs
5324 17:50:53.769072 spm_kick_im_to_fetch: ptr = 000000004021eec2
5325 17:50:53.772887 spm_kick_im_to_fetch: len = 2988
5326 17:50:53.773439 SPM: spm_kick_pcm_to_run
5327 17:50:53.776013 SPM: spm_kick_pcm_to_run done
5328 17:50:53.779217 SPM: spm_init done in 52 msecs
5329 17:50:53.782619 Root Device init finished in 494995 usecs
5330 17:50:53.786087 CPU_CLUSTER: 0 init ...
5331 17:50:53.793115 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5332 17:50:53.799655 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5333 17:50:53.802949 CBFS @ 21000 size 3d4000
5334 17:50:53.806051 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5335 17:50:53.809303 CBFS: Locating 'sspm.bin'
5336 17:50:53.812238 CBFS: Found @ offset 208c0 size 41cb
5337 17:50:53.822265 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5338 17:50:53.830261 CPU_CLUSTER: 0 init finished in 42802 usecs
5339 17:50:53.830682 Devices initialized
5340 17:50:53.833599 Show all devs... After init.
5341 17:50:53.836901 Root Device: enabled 1
5342 17:50:53.837317 CPU_CLUSTER: 0: enabled 1
5343 17:50:53.840132 CPU: 00: enabled 1
5344 17:50:53.843656 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5345 17:50:53.846660 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5346 17:50:53.849869 ELOG: NV offset 0x558000 size 0x1000
5347 17:50:53.857572 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5348 17:50:53.864190 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5349 17:50:53.867587 ELOG: Event(17) added with size 13 at 2024-06-17 17:49:55 UTC
5350 17:50:53.871447 out: cmd=0x121: 03 db 21 01 00 00 00 00
5351 17:50:53.874797 in-header: 03 2d 00 00 2c 00 00 00
5352 17:50:53.888291 in-data: 1c 4c 00 00 00 00 00 00 02 10 00 00 06 80 00 00 8e f8 00 00 06 80 00 00 15 0e 01 00 06 80 00 00 39 b6 13 00 06 80 00 00 7f d3 14 00
5353 17:50:53.891121 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5354 17:50:53.895035 in-header: 03 19 00 00 08 00 00 00
5355 17:50:53.898210 in-data: a2 e0 47 00 13 00 00 00
5356 17:50:53.900997 Chrome EC: UHEPI supported
5357 17:50:53.907994 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5358 17:50:53.911176 in-header: 03 e1 00 00 08 00 00 00
5359 17:50:53.914844 in-data: 84 20 60 10 00 00 00 00
5360 17:50:53.917929 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5361 17:50:53.924552 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5362 17:50:53.927956 in-header: 03 e1 00 00 08 00 00 00
5363 17:50:53.931328 in-data: 84 20 60 10 00 00 00 00
5364 17:50:53.937746 ELOG: Event(A1) added with size 10 at 2024-06-17 17:49:55 UTC
5365 17:50:53.944357 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5366 17:50:53.947969 ELOG: Event(A0) added with size 9 at 2024-06-17 17:49:55 UTC
5367 17:50:53.954880 elog_add_boot_reason: Logged dev mode boot
5368 17:50:53.955481 Finalize devices...
5369 17:50:53.957715 Devices finalized
5370 17:50:53.961028 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5371 17:50:53.964651 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5372 17:50:53.971053 ELOG: Event(91) added with size 10 at 2024-06-17 17:49:55 UTC
5373 17:50:53.974196 Writing coreboot table at 0xffeda000
5374 17:50:53.977592 0. 0000000000114000-000000000011efff: RAMSTAGE
5375 17:50:53.984696 1. 0000000040000000-000000004023cfff: RAMSTAGE
5376 17:50:53.987502 2. 000000004023d000-00000000545fffff: RAM
5377 17:50:53.990958 3. 0000000054600000-000000005465ffff: BL31
5378 17:50:53.994239 4. 0000000054660000-00000000ffed9fff: RAM
5379 17:50:54.000613 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5380 17:50:54.004315 6. 0000000100000000-000000013fffffff: RAM
5381 17:50:54.007565 Passing 5 GPIOs to payload:
5382 17:50:54.010877 NAME | PORT | POLARITY | VALUE
5383 17:50:54.013880 write protect | 0x00000096 | low | low
5384 17:50:54.021136 EC in RW | 0x000000b1 | high | undefined
5385 17:50:54.024452 EC interrupt | 0x00000097 | low | undefined
5386 17:50:54.030969 TPM interrupt | 0x00000099 | high | undefined
5387 17:50:54.034009 speaker enable | 0x000000af | high | undefined
5388 17:50:54.037456 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5389 17:50:54.040340 in-header: 03 f7 00 00 02 00 00 00
5390 17:50:54.040771 in-data: 04 00
5391 17:50:54.043930 Board ID: 4
5392 17:50:54.047509 ADC[3]: Raw value=215149 ID=1
5393 17:50:54.047929 RAM code: 1
5394 17:50:54.048309 SKU ID: 16
5395 17:50:54.054033 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5396 17:50:54.054663 CBFS @ 21000 size 3d4000
5397 17:50:54.060668 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5398 17:50:54.066949 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 7803
5399 17:50:54.067463 coreboot table: 940 bytes.
5400 17:50:54.074042 IMD ROOT 0. 00000000fffff000 00001000
5401 17:50:54.077246 IMD SMALL 1. 00000000ffffe000 00001000
5402 17:50:54.080325 CONSOLE 2. 00000000fffde000 00020000
5403 17:50:54.083874 FMAP 3. 00000000fffdd000 0000047c
5404 17:50:54.087546 TIME STAMP 4. 00000000fffdc000 00000910
5405 17:50:54.090335 RAMOOPS 5. 00000000ffedc000 00100000
5406 17:50:54.093587 COREBOOT 6. 00000000ffeda000 00002000
5407 17:50:54.096958 IMD small region:
5408 17:50:54.100452 IMD ROOT 0. 00000000ffffec00 00000400
5409 17:50:54.103814 VBOOT WORK 1. 00000000ffffeb00 00000100
5410 17:50:54.107195 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5411 17:50:54.110373 VPD 3. 00000000ffffea60 0000006c
5412 17:50:54.116766 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5413 17:50:54.123399 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5414 17:50:54.126860 in-header: 03 e1 00 00 08 00 00 00
5415 17:50:54.127283 in-data: 84 20 60 10 00 00 00 00
5416 17:50:54.133301 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5417 17:50:54.133755 CBFS @ 21000 size 3d4000
5418 17:50:54.139979 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5419 17:50:54.143541 CBFS: Locating 'fallback/payload'
5420 17:50:54.148763 CBFS: Found @ offset dc040 size 439a0
5421 17:50:54.239705 read SPI 0xfd078 0x439a0: 84424 us, 3279 KB/s, 26.232 Mbps
5422 17:50:54.242668 Checking segment from ROM address 0x0000000040003a00
5423 17:50:54.249185 Checking segment from ROM address 0x0000000040003a1c
5424 17:50:54.252464 Loading segment from ROM address 0x0000000040003a00
5425 17:50:54.256011 code (compression=0)
5426 17:50:54.265748 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5427 17:50:54.272633 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5428 17:50:54.275573 it's not compressed!
5429 17:50:54.279126 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5430 17:50:54.285536 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5431 17:50:54.293797 Loading segment from ROM address 0x0000000040003a1c
5432 17:50:54.296756 Entry Point 0x0000000080000000
5433 17:50:54.296847 Loaded segments
5434 17:50:54.303231 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5435 17:50:54.306584 Jumping to boot code at 0000000080000000(00000000ffeda000)
5436 17:50:54.317183 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5437 17:50:54.320099 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5438 17:50:54.323656 CBFS @ 21000 size 3d4000
5439 17:50:54.330068 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5440 17:50:54.333203 CBFS: Locating 'fallback/bl31'
5441 17:50:54.336386 CBFS: Found @ offset 36dc0 size 5820
5442 17:50:54.347565 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5443 17:50:54.350550 Checking segment from ROM address 0x0000000040003a00
5444 17:50:54.357690 Checking segment from ROM address 0x0000000040003a1c
5445 17:50:54.360595 Loading segment from ROM address 0x0000000040003a00
5446 17:50:54.364226 code (compression=1)
5447 17:50:54.370484 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5448 17:50:54.380425 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5449 17:50:54.380522 using LZMA
5450 17:50:54.389167 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5451 17:50:54.395699 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5452 17:50:54.399185 Loading segment from ROM address 0x0000000040003a1c
5453 17:50:54.402119 Entry Point 0x0000000054601000
5454 17:50:54.402219 Loaded segments
5455 17:50:54.405615 NOTICE: MT8183 bl31_setup
5456 17:50:54.413397 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5457 17:50:54.416194 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5458 17:50:54.419731 INFO: [DEVAPC] dump DEVAPC registers:
5459 17:50:54.429978 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5460 17:50:54.436198 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5461 17:50:54.446427 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5462 17:50:54.452941 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5463 17:50:54.462995 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5464 17:50:54.469471 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5465 17:50:54.479779 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5466 17:50:54.486157 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5467 17:50:54.495761 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5468 17:50:54.502753 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5469 17:50:54.509294 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5470 17:50:54.519071 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5471 17:50:54.525936 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5472 17:50:54.535639 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5473 17:50:54.542279 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5474 17:50:54.549018 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5475 17:50:54.555605 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5476 17:50:54.562585 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5477 17:50:54.572295 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5478 17:50:54.578916 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5479 17:50:54.585433 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5480 17:50:54.592387 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5481 17:50:54.595873 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5482 17:50:54.598883 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5483 17:50:54.602341 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5484 17:50:54.605427 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5485 17:50:54.608874 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5486 17:50:54.615285 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5487 17:50:54.621891 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5488 17:50:54.621984 WARNING: region 0:
5489 17:50:54.625200 WARNING: apc:0x168, sa:0x0, ea:0xfff
5490 17:50:54.629035 WARNING: region 1:
5491 17:50:54.632251 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5492 17:50:54.632345 WARNING: region 2:
5493 17:50:54.635265 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5494 17:50:54.638831 WARNING: region 3:
5495 17:50:54.641950 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5496 17:50:54.645515 WARNING: region 4:
5497 17:50:54.648694 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5498 17:50:54.648786 WARNING: region 5:
5499 17:50:54.651715 WARNING: apc:0x0, sa:0x0, ea:0x0
5500 17:50:54.655382 WARNING: region 6:
5501 17:50:54.658410 WARNING: apc:0x0, sa:0x0, ea:0x0
5502 17:50:54.658502 WARNING: region 7:
5503 17:50:54.662019 WARNING: apc:0x0, sa:0x0, ea:0x0
5504 17:50:54.668515 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5505 17:50:54.671799 INFO: SPM: enable SPMC mode
5506 17:50:54.675134 NOTICE: spm_boot_init() start
5507 17:50:54.678602 NOTICE: spm_boot_init() end
5508 17:50:54.681961 INFO: BL31: Initializing runtime services
5509 17:50:54.688626 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5510 17:50:54.691576 INFO: BL31: Preparing for EL3 exit to normal world
5511 17:50:54.695318 INFO: Entry point address = 0x80000000
5512 17:50:54.698482 INFO: SPSR = 0x8
5513 17:50:54.719494
5514 17:50:54.719584
5515 17:50:54.719662
5516 17:50:54.720128 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5517 17:50:54.720243 start: 2.2.4 bootloader-commands (timeout 00:04:38) [common]
5518 17:50:54.720342 Setting prompt string to ['jacuzzi:']
5519 17:50:54.720435 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:38)
5520 17:50:54.723132 Starting depthcharge on Juniper...
5521 17:50:54.723216
5522 17:50:54.726013 vboot_handoff: creating legacy vboot_handoff structure
5523 17:50:54.726100
5524 17:50:54.729490 ec_init(0): CrosEC protocol v3 supported (544, 544)
5525 17:50:54.729573
5526 17:50:54.732876 Wipe memory regions:
5527 17:50:54.732965
5528 17:50:54.735938 [0x00000040000000, 0x00000054600000)
5529 17:50:54.779153
5530 17:50:54.779252 [0x00000054660000, 0x00000080000000)
5531 17:50:54.870743
5532 17:50:54.870867 [0x000000811994a0, 0x000000ffeda000)
5533 17:50:55.130620
5534 17:50:55.130775 [0x00000100000000, 0x00000140000000)
5535 17:50:55.262859
5536 17:50:55.266378 Initializing XHCI USB controller at 0x11200000.
5537 17:50:55.289383
5538 17:50:55.292510 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5539 17:50:55.292600
5540 17:50:55.292673
5541 17:50:55.292981 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5543 17:50:55.393293 jacuzzi: tftpboot 192.168.201.1 14396189/tftp-deploy-rzu53s7n/kernel/image.itb 14396189/tftp-deploy-rzu53s7n/kernel/cmdline
5544 17:50:55.393447 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5545 17:50:55.393566 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:37)
5546 17:50:55.397567 tftpboot 192.168.201.1 14396189/tftp-deploy-rzu53s7n/kernel/image.ittp-deploy-rzu53s7n/kernel/cmdline
5547 17:50:55.397692
5548 17:50:55.397812 Waiting for link
5549 17:50:55.803605
5550 17:50:55.803773 R8152: Initializing
5551 17:50:55.803855
5552 17:50:55.806679 Version 9 (ocp_data = 6010)
5553 17:50:55.806772
5554 17:50:55.809811 R8152: Done initializing
5555 17:50:55.809906
5556 17:50:55.809978 Adding net device
5557 17:50:56.196083
5558 17:50:56.196233 done.
5559 17:50:56.196318
5560 17:50:56.196388 MAC: 00:e0:4c:68:0b:b9
5561 17:50:56.196457
5562 17:50:56.199117 Sending DHCP discover... done.
5563 17:50:56.199199
5564 17:50:56.202955 Waiting for reply... done.
5565 17:50:56.203037
5566 17:50:56.205635 Sending DHCP request... done.
5567 17:50:56.205718
5568 17:50:56.210915 Waiting for reply... done.
5569 17:50:56.211000
5570 17:50:56.211078 My ip is 192.168.201.13
5571 17:50:56.211147
5572 17:50:56.214477 The DHCP server ip is 192.168.201.1
5573 17:50:56.214559
5574 17:50:56.220957 TFTP server IP predefined by user: 192.168.201.1
5575 17:50:56.221054
5576 17:50:56.227586 Bootfile predefined by user: 14396189/tftp-deploy-rzu53s7n/kernel/image.itb
5577 17:50:56.227672
5578 17:50:56.227751 Sending tftp read request... done.
5579 17:50:56.230717
5580 17:50:56.234295 Waiting for the transfer...
5581 17:50:56.234383
5582 17:50:56.499109 00000000 ################################################################
5583 17:50:56.499250
5584 17:50:56.758474 00080000 ################################################################
5585 17:50:56.758615
5586 17:50:57.018875 00100000 ################################################################
5587 17:50:57.019022
5588 17:50:57.277709 00180000 ################################################################
5589 17:50:57.277856
5590 17:50:57.539023 00200000 ################################################################
5591 17:50:57.539216
5592 17:50:57.801145 00280000 ################################################################
5593 17:50:57.801294
5594 17:50:58.069326 00300000 ################################################################
5595 17:50:58.069478
5596 17:50:58.334028 00380000 ################################################################
5597 17:50:58.334175
5598 17:50:58.602206 00400000 ################################################################
5599 17:50:58.602388
5600 17:50:58.854980 00480000 ################################################################
5601 17:50:58.855123
5602 17:50:59.113166 00500000 ################################################################
5603 17:50:59.113358
5604 17:50:59.363656 00580000 ################################################################
5605 17:50:59.363831
5606 17:50:59.636596 00600000 ################################################################
5607 17:50:59.636773
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5609 17:50:59.894230
5610 17:51:00.176873 00700000 ################################################################
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6033 17:51:55.715439
6034 17:51:55.974087 07100000 ################################################################
6035 17:51:55.974283
6036 17:51:56.234638 07180000 ################################################################
6037 17:51:56.234847
6038 17:51:56.497125 07200000 ################################################################
6039 17:51:56.497273
6040 17:51:56.743593 07280000 ################################################################
6041 17:51:56.743755
6042 17:51:56.990741 07300000 ################################################################
6043 17:51:56.990900
6044 17:51:57.238773 07380000 ################################################################
6045 17:51:57.238923
6046 17:51:57.486251 07400000 ################################################################
6047 17:51:57.486413
6048 17:51:57.494679 07480000 ### done.
6049 17:51:57.494774
6050 17:51:57.497834 The bootfile was 122180326 bytes long.
6051 17:51:57.497927
6052 17:51:57.501270 Sending tftp read request... done.
6053 17:51:57.501364
6054 17:51:57.504165 Waiting for the transfer...
6055 17:51:57.504263
6056 17:51:57.507547 00000000 # done.
6057 17:51:57.507641
6058 17:51:57.514132 Command line loaded dynamically from TFTP file: 14396189/tftp-deploy-rzu53s7n/kernel/cmdline
6059 17:51:57.514225
6060 17:51:57.530996 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
6061 17:51:57.531095
6062 17:51:57.534105 Loading FIT.
6063 17:51:57.534196
6064 17:51:57.537079 Image ramdisk-1 has 108991827 bytes.
6065 17:51:57.537171
6066 17:51:57.537244 Image fdt-1 has 57695 bytes.
6067 17:51:57.537310
6068 17:51:57.540641 Image kernel-1 has 13128753 bytes.
6069 17:51:57.540733
6070 17:51:57.550116 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
6071 17:51:57.550210
6072 17:51:57.563324 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
6073 17:51:57.563449
6074 17:51:57.566956 Choosing best match conf-1 for compat google,juniper-sku16.
6075 17:51:57.572198
6076 17:51:57.576741 Connected to device vid:did:rid of 1ae0:0028:00
6077 17:51:57.584457
6078 17:51:57.587780 tpm_get_response: command 0x17b, return code 0x0
6079 17:51:57.587873
6080 17:51:57.591284 tpm_cleanup: add release locality here.
6081 17:51:57.591413
6082 17:51:57.594310 Shutting down all USB controllers.
6083 17:51:57.594403
6084 17:51:57.597974 Removing current net device
6085 17:51:57.598066
6086 17:51:57.601447 Exiting depthcharge with code 4 at timestamp: 80122953
6087 17:51:57.601540
6088 17:51:57.604731 LZMA decompressing kernel-1 to 0x80193568
6089 17:51:57.604822
6090 17:51:57.611330 LZMA decompressing kernel-1 to 0x40000000
6091 17:51:59.476067
6092 17:51:59.476216 jumping to kernel
6093 17:51:59.476837 end: 2.2.4 bootloader-commands (duration 00:01:05) [common]
6094 17:51:59.476965 start: 2.2.5 auto-login-action (timeout 00:03:33) [common]
6095 17:51:59.477053 Setting prompt string to ['Linux version [0-9]']
6096 17:51:59.477130 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
6097 17:51:59.477205 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
6098 17:51:59.551559
6099 17:51:59.554902 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
6100 17:51:59.558596 start: 2.2.5.1 login-action (timeout 00:03:33) [common]
6101 17:51:59.559201 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
6102 17:51:59.559634 Setting prompt string to []
6103 17:51:59.560029 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
6104 17:51:59.560397 Using line separator: #'\n'#
6105 17:51:59.560701 No login prompt set.
6106 17:51:59.561021 Parsing kernel messages
6107 17:51:59.561308 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
6108 17:51:59.562115 [login-action] Waiting for messages, (timeout 00:03:33)
6109 17:51:59.562646 Waiting using forced prompt support (timeout 00:01:47)
6110 17:51:59.578220 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j234605-arm64-gcc-10-defconfig-arm64-chromebook-rs2lc) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Mon Jun 17 16:16:56 UTC 2024
6111 17:51:59.581324 [ 0.000000] random: crng init done
6112 17:51:59.587822 [ 0.000000] Machine model: Google juniper sku16 board
6113 17:51:59.591257 [ 0.000000] efi: UEFI not found.
6114 17:51:59.598004 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
6115 17:51:59.604786 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
6116 17:51:59.614641 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
6117 17:51:59.618144 [ 0.000000] printk: bootconsole [mtk8250] enabled
6118 17:51:59.626613 [ 0.000000] NUMA: No NUMA configuration found
6119 17:51:59.632938 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
6120 17:51:59.639709 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
6121 17:51:59.639897 [ 0.000000] Zone ranges:
6122 17:51:59.646500 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
6123 17:51:59.649823 [ 0.000000] DMA32 empty
6124 17:51:59.656285 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
6125 17:51:59.659972 [ 0.000000] Movable zone start for each node
6126 17:51:59.663022 [ 0.000000] Early memory node ranges
6127 17:51:59.669674 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
6128 17:51:59.676210 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
6129 17:51:59.682753 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
6130 17:51:59.689443 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
6131 17:51:59.696397 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
6132 17:51:59.702872 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
6133 17:51:59.719015 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
6134 17:51:59.725496 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
6135 17:51:59.732020 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
6136 17:51:59.735102 [ 0.000000] psci: probing for conduit method from DT.
6137 17:51:59.742090 [ 0.000000] psci: PSCIv1.1 detected in firmware.
6138 17:51:59.745463 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
6139 17:51:59.752020 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
6140 17:51:59.755155 [ 0.000000] psci: SMC Calling Convention v1.1
6141 17:51:59.762013 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
6142 17:51:59.765472 [ 0.000000] Detected VIPT I-cache on CPU0
6143 17:51:59.772124 [ 0.000000] CPU features: detected: GIC system register CPU interface
6144 17:51:59.778513 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
6145 17:51:59.785446 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
6146 17:51:59.791547 [ 0.000000] CPU features: detected: ARM erratum 845719
6147 17:51:59.795258 [ 0.000000] alternatives: applying boot alternatives
6148 17:51:59.798840 [ 0.000000] Fallback order for Node 0: 0
6149 17:51:59.805168 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
6150 17:51:59.808793 [ 0.000000] Policy zone: Normal
6151 17:51:59.828832 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
6152 17:51:59.841974 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
6153 17:51:59.848643 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
6154 17:51:59.858240 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
6155 17:51:59.864418 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
6156 17:51:59.868127 <6>[ 0.000000] software IO TLB: area num 8.
6157 17:51:59.893204 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
6158 17:51:59.951090 <6>[ 0.000000] Memory: 3808640K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 349824K reserved, 32768K cma-reserved)
6159 17:51:59.957631 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
6160 17:51:59.964591 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
6161 17:51:59.967617 <6>[ 0.000000] rcu: RCU event tracing is enabled.
6162 17:51:59.974341 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
6163 17:51:59.980743 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
6164 17:51:59.984461 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
6165 17:51:59.994392 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
6166 17:52:00.001024 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
6167 17:52:00.007189 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
6168 17:52:00.017287 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
6169 17:52:00.020877 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
6170 17:52:00.027136 <6>[ 0.000000] GICv3: 640 SPIs implemented
6171 17:52:00.030629 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
6172 17:52:00.034369 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
6173 17:52:00.041069 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
6174 17:52:00.047476 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
6175 17:52:00.057147 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
6176 17:52:00.070409 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
6177 17:52:00.076899 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
6178 17:52:00.087911 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
6179 17:52:00.101611 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
6180 17:52:00.108095 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
6181 17:52:00.115157 <6>[ 0.009483] Console: colour dummy device 80x25
6182 17:52:00.118191 <6>[ 0.014522] printk: console [tty1] enabled
6183 17:52:00.128231 <6>[ 0.018910] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
6184 17:52:00.135162 <6>[ 0.029375] pid_max: default: 32768 minimum: 301
6185 17:52:00.138563 <6>[ 0.034255] LSM: Security Framework initializing
6186 17:52:00.148086 <6>[ 0.039172] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
6187 17:52:00.154757 <6>[ 0.046796] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
6188 17:52:00.161352 <4>[ 0.055674] cacheinfo: Unable to detect cache hierarchy for CPU 0
6189 17:52:00.171899 <6>[ 0.062302] cblist_init_generic: Setting adjustable number of callback queues.
6190 17:52:00.174915 <6>[ 0.069748] cblist_init_generic: Setting shift to 3 and lim to 1.
6191 17:52:00.185015 <6>[ 0.076101] cblist_init_generic: Setting adjustable number of callback queues.
6192 17:52:00.191702 <6>[ 0.083546] cblist_init_generic: Setting shift to 3 and lim to 1.
6193 17:52:00.194485 <6>[ 0.089945] rcu: Hierarchical SRCU implementation.
6194 17:52:00.201478 <6>[ 0.094971] rcu: Max phase no-delay instances is 1000.
6195 17:52:00.208116 <6>[ 0.102907] EFI services will not be available.
6196 17:52:00.211388 <6>[ 0.107856] smp: Bringing up secondary CPUs ...
6197 17:52:00.222462 <6>[ 0.113163] Detected VIPT I-cache on CPU1
6198 17:52:00.228813 <4>[ 0.113209] cacheinfo: Unable to detect cache hierarchy for CPU 1
6199 17:52:00.235507 <6>[ 0.113218] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
6200 17:52:00.242082 <6>[ 0.113251] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
6201 17:52:00.245702 <6>[ 0.113731] Detected VIPT I-cache on CPU2
6202 17:52:00.252408 <4>[ 0.113765] cacheinfo: Unable to detect cache hierarchy for CPU 2
6203 17:52:00.258604 <6>[ 0.113770] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
6204 17:52:00.265287 <6>[ 0.113782] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
6205 17:52:00.268872 <6>[ 0.114227] Detected VIPT I-cache on CPU3
6206 17:52:00.275276 <4>[ 0.114257] cacheinfo: Unable to detect cache hierarchy for CPU 3
6207 17:52:00.282430 <6>[ 0.114262] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
6208 17:52:00.288884 <6>[ 0.114273] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
6209 17:52:00.295684 <6>[ 0.114848] CPU features: detected: Spectre-v2
6210 17:52:00.299140 <6>[ 0.114858] CPU features: detected: Spectre-BHB
6211 17:52:00.305267 <6>[ 0.114862] CPU features: detected: ARM erratum 858921
6212 17:52:00.308867 <6>[ 0.114867] Detected VIPT I-cache on CPU4
6213 17:52:00.315233 <4>[ 0.114915] cacheinfo: Unable to detect cache hierarchy for CPU 4
6214 17:52:00.321850 <6>[ 0.114923] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
6215 17:52:00.328820 <6>[ 0.114931] arch_timer: Enabling local workaround for ARM erratum 858921
6216 17:52:00.335152 <6>[ 0.114941] arch_timer: CPU4: Trapping CNTVCT access
6217 17:52:00.342088 <6>[ 0.114949] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
6218 17:52:00.345425 <6>[ 0.115435] Detected VIPT I-cache on CPU5
6219 17:52:00.352031 <4>[ 0.115475] cacheinfo: Unable to detect cache hierarchy for CPU 5
6220 17:52:00.358693 <6>[ 0.115481] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
6221 17:52:00.365321 <6>[ 0.115487] arch_timer: Enabling local workaround for ARM erratum 858921
6222 17:52:00.371932 <6>[ 0.115494] arch_timer: CPU5: Trapping CNTVCT access
6223 17:52:00.378637 <6>[ 0.115499] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
6224 17:52:00.381493 <6>[ 0.115935] Detected VIPT I-cache on CPU6
6225 17:52:00.388524 <4>[ 0.115980] cacheinfo: Unable to detect cache hierarchy for CPU 6
6226 17:52:00.395067 <6>[ 0.115986] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6227 17:52:00.401701 <6>[ 0.115993] arch_timer: Enabling local workaround for ARM erratum 858921
6228 17:52:00.408350 <6>[ 0.115999] arch_timer: CPU6: Trapping CNTVCT access
6229 17:52:00.414876 <6>[ 0.116004] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6230 17:52:00.418655 <6>[ 0.116535] Detected VIPT I-cache on CPU7
6231 17:52:00.425270 <4>[ 0.116580] cacheinfo: Unable to detect cache hierarchy for CPU 7
6232 17:52:00.431664 <6>[ 0.116586] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6233 17:52:00.438465 <6>[ 0.116593] arch_timer: Enabling local workaround for ARM erratum 858921
6234 17:52:00.445376 <6>[ 0.116599] arch_timer: CPU7: Trapping CNTVCT access
6235 17:52:00.451379 <6>[ 0.116604] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6236 17:52:00.455252 <6>[ 0.116679] smp: Brought up 1 node, 8 CPUs
6237 17:52:00.461608 <6>[ 0.355545] SMP: Total of 8 processors activated.
6238 17:52:00.464800 <6>[ 0.360481] CPU features: detected: 32-bit EL0 Support
6239 17:52:00.471951 <6>[ 0.365852] CPU features: detected: 32-bit EL1 Support
6240 17:52:00.478164 <6>[ 0.371218] CPU features: detected: CRC32 instructions
6241 17:52:00.481652 <6>[ 0.376644] CPU: All CPU(s) started at EL2
6242 17:52:00.488222 <6>[ 0.380983] alternatives: applying system-wide alternatives
6243 17:52:00.491716 <6>[ 0.388996] devtmpfs: initialized
6244 17:52:00.506996 <6>[ 0.397937] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
6245 17:52:00.516710 <6>[ 0.407886] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6246 17:52:00.519921 <6>[ 0.415613] pinctrl core: initialized pinctrl subsystem
6247 17:52:00.528317 <6>[ 0.422715] DMI not present or invalid.
6248 17:52:00.535089 <6>[ 0.427087] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6249 17:52:00.541519 <6>[ 0.433987] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6250 17:52:00.551359 <6>[ 0.441520] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6251 17:52:00.557973 <6>[ 0.449771] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6252 17:52:00.564730 <6>[ 0.457950] audit: initializing netlink subsys (disabled)
6253 17:52:00.571192 <5>[ 0.463655] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
6254 17:52:00.577815 <6>[ 0.464643] thermal_sys: Registered thermal governor 'step_wise'
6255 17:52:00.584279 <6>[ 0.471621] thermal_sys: Registered thermal governor 'power_allocator'
6256 17:52:00.587588 <6>[ 0.477920] cpuidle: using governor menu
6257 17:52:00.594350 <6>[ 0.488882] NET: Registered PF_QIPCRTR protocol family
6258 17:52:00.601296 <6>[ 0.494367] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6259 17:52:00.607492 <6>[ 0.501464] ASID allocator initialised with 32768 entries
6260 17:52:00.614462 <6>[ 0.508228] Serial: AMBA PL011 UART driver
6261 17:52:00.624035 <4>[ 0.518651] Trying to register duplicate clock ID: 113
6262 17:52:00.683814 <6>[ 0.574968] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6263 17:52:00.698081 <6>[ 0.589335] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6264 17:52:00.701247 <6>[ 0.599084] KASLR enabled
6265 17:52:00.715544 <6>[ 0.607083] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6266 17:52:00.722411 <6>[ 0.614086] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6267 17:52:00.728869 <6>[ 0.620562] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6268 17:52:00.735994 <6>[ 0.627552] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6269 17:52:00.742256 <6>[ 0.634027] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6270 17:52:00.749089 <6>[ 0.641017] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6271 17:52:00.755859 <6>[ 0.647491] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6272 17:52:00.762375 <6>[ 0.654480] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6273 17:52:00.765717 <6>[ 0.662052] ACPI: Interpreter disabled.
6274 17:52:00.775578 <6>[ 0.670049] iommu: Default domain type: Translated
6275 17:52:00.781858 <6>[ 0.675156] iommu: DMA domain TLB invalidation policy: strict mode
6276 17:52:00.785620 <5>[ 0.681790] SCSI subsystem initialized
6277 17:52:00.792483 <6>[ 0.686204] usbcore: registered new interface driver usbfs
6278 17:52:00.798519 <6>[ 0.691932] usbcore: registered new interface driver hub
6279 17:52:00.801704 <6>[ 0.697474] usbcore: registered new device driver usb
6280 17:52:00.809086 <6>[ 0.703781] pps_core: LinuxPPS API ver. 1 registered
6281 17:52:00.819541 <6>[ 0.708966] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6282 17:52:00.822615 <6>[ 0.718291] PTP clock support registered
6283 17:52:00.825875 <6>[ 0.722545] EDAC MC: Ver: 3.0.0
6284 17:52:00.833432 <6>[ 0.728186] FPGA manager framework
6285 17:52:00.840425 <6>[ 0.731868] Advanced Linux Sound Architecture Driver Initialized.
6286 17:52:00.843318 <6>[ 0.738620] vgaarb: loaded
6287 17:52:00.850240 <6>[ 0.741740] clocksource: Switched to clocksource arch_sys_counter
6288 17:52:00.853303 <5>[ 0.748169] VFS: Disk quotas dquot_6.6.0
6289 17:52:00.860054 <6>[ 0.752344] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6290 17:52:00.863174 <6>[ 0.759516] pnp: PnP ACPI: disabled
6291 17:52:00.872191 <6>[ 0.766386] NET: Registered PF_INET protocol family
6292 17:52:00.878583 <6>[ 0.771608] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6293 17:52:00.890007 <6>[ 0.781514] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6294 17:52:00.900062 <6>[ 0.790267] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6295 17:52:00.906867 <6>[ 0.798217] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6296 17:52:00.913599 <6>[ 0.806452] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6297 17:52:00.920342 <6>[ 0.814547] TCP: Hash tables configured (established 32768 bind 32768)
6298 17:52:00.929980 <6>[ 0.821374] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6299 17:52:00.936983 <6>[ 0.828345] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6300 17:52:00.943565 <6>[ 0.835827] NET: Registered PF_UNIX/PF_LOCAL protocol family
6301 17:52:00.950488 <6>[ 0.841951] RPC: Registered named UNIX socket transport module.
6302 17:52:00.953472 <6>[ 0.848095] RPC: Registered udp transport module.
6303 17:52:00.956560 <6>[ 0.853020] RPC: Registered tcp transport module.
6304 17:52:00.966476 <6>[ 0.857943] RPC: Registered tcp NFSv4.1 backchannel transport module.
6305 17:52:00.969711 <6>[ 0.864596] PCI: CLS 0 bytes, default 64
6306 17:52:00.973092 <6>[ 0.868878] Unpacking initramfs...
6307 17:52:00.986995 <6>[ 0.878286] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6308 17:52:00.996937 <6>[ 0.886907] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6309 17:52:01.000160 <6>[ 0.895761] kvm [1]: IPA Size Limit: 40 bits
6310 17:52:01.007520 <6>[ 0.902093] kvm [1]: vgic-v2@c420000
6311 17:52:01.010550 <6>[ 0.905909] kvm [1]: GIC system register CPU interface enabled
6312 17:52:01.017946 <6>[ 0.912088] kvm [1]: vgic interrupt IRQ18
6313 17:52:01.021108 <6>[ 0.916455] kvm [1]: Hyp mode initialized successfully
6314 17:52:01.027815 <5>[ 0.922727] Initialise system trusted keyrings
6315 17:52:01.034487 <6>[ 0.927569] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6316 17:52:01.042970 <6>[ 0.937442] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6317 17:52:01.049465 <5>[ 0.943949] NFS: Registering the id_resolver key type
6318 17:52:01.052544 <5>[ 0.949258] Key type id_resolver registered
6319 17:52:01.059358 <5>[ 0.953671] Key type id_legacy registered
6320 17:52:01.066004 <6>[ 0.957982] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6321 17:52:01.072377 <6>[ 0.964905] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6322 17:52:01.079226 <6>[ 0.972680] 9p: Installing v9fs 9p2000 file system support
6323 17:52:01.106967 <5>[ 1.001567] Key type asymmetric registered
6324 17:52:01.110207 <5>[ 1.005914] Asymmetric key parser 'x509' registered
6325 17:52:01.120551 <6>[ 1.011076] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6326 17:52:01.123491 <6>[ 1.018688] io scheduler mq-deadline registered
6327 17:52:01.126553 <6>[ 1.023450] io scheduler kyber registered
6328 17:52:01.149921 <6>[ 1.044250] EINJ: ACPI disabled.
6329 17:52:01.156293 <4>[ 1.048034] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6330 17:52:01.194526 <6>[ 1.089013] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6331 17:52:01.203051 <6>[ 1.097534] printk: console [ttyS0] disabled
6332 17:52:01.231203 <6>[ 1.122196] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6333 17:52:01.237505 <6>[ 1.131676] printk: console [ttyS0] enabled
6334 17:52:01.241049 <6>[ 1.131676] printk: console [ttyS0] enabled
6335 17:52:01.247369 <6>[ 1.140596] printk: bootconsole [mtk8250] disabled
6336 17:52:01.251138 <6>[ 1.140596] printk: bootconsole [mtk8250] disabled
6337 17:52:01.260706 <3>[ 1.151131] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6338 17:52:01.267579 <3>[ 1.159517] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6339 17:52:01.296550 <6>[ 1.187921] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6340 17:52:01.303427 <6>[ 1.197591] serial serial0: tty port ttyS1 registered
6341 17:52:01.309999 <6>[ 1.204191] SuperH (H)SCI(F) driver initialized
6342 17:52:01.313446 <6>[ 1.209691] msm_serial: driver initialized
6343 17:52:01.329008 <6>[ 1.220066] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6344 17:52:01.338605 <6>[ 1.228666] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6345 17:52:01.345508 <6>[ 1.237239] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6346 17:52:01.355097 <6>[ 1.245810] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6347 17:52:01.365039 <6>[ 1.254467] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6348 17:52:01.371877 <6>[ 1.263128] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6349 17:52:01.381885 <6>[ 1.271870] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6350 17:52:01.388063 <6>[ 1.280609] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6351 17:52:01.398273 <6>[ 1.289180] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6352 17:52:01.408015 <6>[ 1.297980] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6353 17:52:01.416064 <4>[ 1.310405] cacheinfo: Unable to detect cache hierarchy for CPU 0
6354 17:52:01.421907 <6>[ 1.319816] loop: module loaded
6355 17:52:01.437303 <6>[ 1.331762] vsim1: Bringing 1800000uV into 2700000-2700000uV
6356 17:52:01.455136 <6>[ 1.349636] megasas: 07.719.03.00-rc1
6357 17:52:01.463779 <6>[ 1.358344] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6358 17:52:01.474396 <6>[ 1.369131] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6359 17:52:01.491208 <6>[ 1.385887] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6360 17:52:01.548104 <6>[ 1.436186] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6361 17:52:04.420783 <6>[ 4.315384] Freeing initrd memory: 106432K
6362 17:52:04.436350 <4>[ 4.327438] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6363 17:52:04.443106 <4>[ 4.336687] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6364 17:52:04.449822 <4>[ 4.343387] Hardware name: Google juniper sku16 board (DT)
6365 17:52:04.453017 <4>[ 4.349126] Call trace:
6366 17:52:04.456028 <4>[ 4.351826] dump_backtrace.part.0+0xe0/0xf0
6367 17:52:04.459654 <4>[ 4.356363] show_stack+0x18/0x30
6368 17:52:04.462715 <4>[ 4.359935] dump_stack_lvl+0x68/0x84
6369 17:52:04.469537 <4>[ 4.363855] dump_stack+0x18/0x34
6370 17:52:04.473075 <4>[ 4.367425] sysfs_warn_dup+0x64/0x80
6371 17:52:04.475871 <4>[ 4.371347] sysfs_do_create_link_sd+0xf0/0x100
6372 17:52:04.479528 <4>[ 4.376134] sysfs_create_link+0x20/0x40
6373 17:52:04.486115 <4>[ 4.380313] bus_add_device+0x68/0x10c
6374 17:52:04.489408 <4>[ 4.384319] device_add+0x340/0x7ac
6375 17:52:04.493019 <4>[ 4.388063] of_device_add+0x44/0x60
6376 17:52:04.499309 <4>[ 4.391897] of_platform_device_create_pdata+0x90/0x120
6377 17:52:04.502406 <4>[ 4.397378] of_platform_bus_create+0x170/0x370
6378 17:52:04.505982 <4>[ 4.402164] of_platform_populate+0x50/0xfc
6379 17:52:04.512566 <4>[ 4.406604] parse_mtd_partitions+0x1dc/0x510
6380 17:52:04.516317 <4>[ 4.411217] mtd_device_parse_register+0xf8/0x2e0
6381 17:52:04.519140 <4>[ 4.416175] spi_nor_probe+0x21c/0x2f0
6382 17:52:04.525728 <4>[ 4.420182] spi_mem_probe+0x6c/0xb0
6383 17:52:04.529248 <4>[ 4.424014] spi_probe+0x84/0xe4
6384 17:52:04.532879 <4>[ 4.427496] really_probe+0xbc/0x2e0
6385 17:52:04.536067 <4>[ 4.431326] __driver_probe_device+0x78/0x11c
6386 17:52:04.539203 <4>[ 4.435938] driver_probe_device+0xd8/0x160
6387 17:52:04.546072 <4>[ 4.440375] __device_attach_driver+0xb8/0x134
6388 17:52:04.549112 <4>[ 4.445074] bus_for_each_drv+0x78/0xd0
6389 17:52:04.552796 <4>[ 4.449164] __device_attach+0xa8/0x1c0
6390 17:52:04.559038 <4>[ 4.453254] device_initial_probe+0x14/0x20
6391 17:52:04.562237 <4>[ 4.457693] bus_probe_device+0x9c/0xa4
6392 17:52:04.566037 <4>[ 4.461783] device_add+0x3ac/0x7ac
6393 17:52:04.569123 <4>[ 4.465525] __spi_add_device+0x78/0x120
6394 17:52:04.575877 <4>[ 4.469703] spi_add_device+0x40/0x7c
6395 17:52:04.578894 <4>[ 4.473621] spi_register_controller+0x610/0xad0
6396 17:52:04.585386 <4>[ 4.478494] devm_spi_register_controller+0x4c/0xa4
6397 17:52:04.588817 <4>[ 4.483627] mtk_spi_probe+0x3f8/0x650
6398 17:52:04.592120 <4>[ 4.487631] platform_probe+0x68/0xe0
6399 17:52:04.595821 <4>[ 4.491549] really_probe+0xbc/0x2e0
6400 17:52:04.598887 <4>[ 4.495379] __driver_probe_device+0x78/0x11c
6401 17:52:04.605766 <4>[ 4.499990] driver_probe_device+0xd8/0x160
6402 17:52:04.608784 <4>[ 4.504428] __driver_attach+0x94/0x19c
6403 17:52:04.612318 <4>[ 4.508518] bus_for_each_dev+0x70/0xd0
6404 17:52:04.615396 <4>[ 4.512608] driver_attach+0x24/0x30
6405 17:52:04.622295 <4>[ 4.516438] bus_add_driver+0x154/0x20c
6406 17:52:04.625272 <4>[ 4.520528] driver_register+0x78/0x130
6407 17:52:04.628563 <4>[ 4.524619] __platform_driver_register+0x28/0x34
6408 17:52:04.635226 <4>[ 4.529578] mtk_spi_driver_init+0x1c/0x28
6409 17:52:04.638868 <4>[ 4.533933] do_one_initcall+0x50/0x1d0
6410 17:52:04.641928 <4>[ 4.538023] kernel_init_freeable+0x21c/0x288
6411 17:52:04.645401 <4>[ 4.542636] kernel_init+0x24/0x12c
6412 17:52:04.651648 <4>[ 4.546381] ret_from_fork+0x10/0x20
6413 17:52:04.660717 <6>[ 4.555300] tun: Universal TUN/TAP device driver, 1.6
6414 17:52:04.664033 <6>[ 4.561596] thunder_xcv, ver 1.0
6415 17:52:04.670579 <6>[ 4.565119] thunder_bgx, ver 1.0
6416 17:52:04.670711 <6>[ 4.568623] nicpf, ver 1.0
6417 17:52:04.681696 <6>[ 4.573002] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6418 17:52:04.685335 <6>[ 4.580486] hns3: Copyright (c) 2017 Huawei Corporation.
6419 17:52:04.691701 <6>[ 4.586089] hclge is initializing
6420 17:52:04.695284 <6>[ 4.589669] e1000: Intel(R) PRO/1000 Network Driver
6421 17:52:04.701467 <6>[ 4.594805] e1000: Copyright (c) 1999-2006 Intel Corporation.
6422 17:52:04.705212 <6>[ 4.600826] e1000e: Intel(R) PRO/1000 Network Driver
6423 17:52:04.711890 <6>[ 4.606047] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6424 17:52:04.718656 <6>[ 4.612239] igb: Intel(R) Gigabit Ethernet Network Driver
6425 17:52:04.724848 <6>[ 4.617895] igb: Copyright (c) 2007-2014 Intel Corporation.
6426 17:52:04.731846 <6>[ 4.623738] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6427 17:52:04.738556 <6>[ 4.630262] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6428 17:52:04.741352 <6>[ 4.636814] sky2: driver version 1.30
6429 17:52:04.748086 <6>[ 4.642070] usbcore: registered new device driver r8152-cfgselector
6430 17:52:04.754840 <6>[ 4.648612] usbcore: registered new interface driver r8152
6431 17:52:04.761570 <6>[ 4.654451] VFIO - User Level meta-driver version: 0.3
6432 17:52:04.767917 <6>[ 4.662244] mtu3 11201000.usb: uwk - reg:0x420, version:101
6433 17:52:04.774947 <4>[ 4.668117] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6434 17:52:04.781025 <6>[ 4.675391] mtu3 11201000.usb: dr_mode: 1, drd: auto
6435 17:52:04.788243 <6>[ 4.680616] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6436 17:52:04.791337 <6>[ 4.686803] mtu3 11201000.usb: usb3-drd: 0
6437 17:52:04.801193 <6>[ 4.692339] mtu3 11201000.usb: xHCI platform device register success...
6438 17:52:04.807510 <4>[ 4.700975] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6439 17:52:04.814811 <6>[ 4.708921] xhci-mtk 11200000.usb: xHCI Host Controller
6440 17:52:04.821475 <6>[ 4.714425] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6441 17:52:04.827955 <6>[ 4.722147] xhci-mtk 11200000.usb: USB3 root hub has no ports
6442 17:52:04.837652 <6>[ 4.728156] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6443 17:52:04.844162 <6>[ 4.737580] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6444 17:52:04.851378 <6>[ 4.743664] xhci-mtk 11200000.usb: xHCI Host Controller
6445 17:52:04.857366 <6>[ 4.749154] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6446 17:52:04.864433 <6>[ 4.756811] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6447 17:52:04.867491 <6>[ 4.763671] hub 1-0:1.0: USB hub found
6448 17:52:04.870652 <6>[ 4.767702] hub 1-0:1.0: 1 port detected
6449 17:52:04.881988 <6>[ 4.773044] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6450 17:52:04.885013 <6>[ 4.781671] hub 2-0:1.0: USB hub found
6451 17:52:04.894968 <3>[ 4.785700] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6452 17:52:04.901782 <6>[ 4.793589] usbcore: registered new interface driver usb-storage
6453 17:52:04.908956 <6>[ 4.800196] usbcore: registered new device driver onboard-usb-hub
6454 17:52:04.922619 <4>[ 4.813838] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6455 17:52:04.931542 <6>[ 4.826098] mt6397-rtc mt6358-rtc: registered as rtc0
6456 17:52:04.941346 <6>[ 4.831575] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-17T17:51:06 UTC (1718646666)
6457 17:52:04.948302 <6>[ 4.841467] i2c_dev: i2c /dev entries driver
6458 17:52:04.957762 <6>[ 4.847858] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6459 17:52:04.964859 <6>[ 4.856242] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6460 17:52:04.971329 <6>[ 4.865147] i2c 4-0058: Fixed dependency cycle(s) with /panel
6461 17:52:04.977914 <6>[ 4.871215] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6462 17:52:04.988089 <3>[ 4.878686] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6463 17:52:05.003928 <6>[ 4.898635] cpu cpu0: EM: created perf domain
6464 17:52:05.014122 <6>[ 4.904130] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6465 17:52:05.020930 <6>[ 4.915417] cpu cpu4: EM: created perf domain
6466 17:52:05.028431 <6>[ 4.922551] sdhci: Secure Digital Host Controller Interface driver
6467 17:52:05.034738 <6>[ 4.929004] sdhci: Copyright(c) Pierre Ossman
6468 17:52:05.041251 <6>[ 4.934405] Synopsys Designware Multimedia Card Interface Driver
6469 17:52:05.048477 <6>[ 4.934919] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6470 17:52:05.051374 <6>[ 4.941479] sdhci-pltfm: SDHCI platform and OF driver helper
6471 17:52:05.059351 <6>[ 4.954035] ledtrig-cpu: registered to indicate activity on CPUs
6472 17:52:05.067694 <6>[ 4.961766] usbcore: registered new interface driver usbhid
6473 17:52:05.070648 <6>[ 4.967602] usbhid: USB HID core driver
6474 17:52:05.081670 <6>[ 4.971909] spi_master spi2: will run message pump with realtime priority
6475 17:52:05.085320 <4>[ 4.972078] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6476 17:52:05.095744 <4>[ 4.986295] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6477 17:52:05.105591 <6>[ 4.992012] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6478 17:52:05.124671 <6>[ 5.009065] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6479 17:52:05.131304 <4>[ 5.019703] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6480 17:52:05.134726 <6>[ 5.024203] cros-ec-spi spi2.0: Chrome EC device registered
6481 17:52:05.147925 <4>[ 5.039177] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6482 17:52:05.160436 <4>[ 5.051484] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6483 17:52:05.167203 <4>[ 5.060471] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6484 17:52:05.200231 <6>[ 5.090895] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6485 17:52:05.203267 <6>[ 5.096979] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6486 17:52:05.211045 <6>[ 5.105481] mmc0: new HS400 MMC card at address 0001
6487 17:52:05.221322 <6>[ 5.109241] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6488 17:52:05.224444 <6>[ 5.111620] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6489 17:52:05.234070 <6>[ 5.123744] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6490 17:52:05.248824 <6>[ 5.136079] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6491 17:52:05.254936 <6>[ 5.136843] NET: Registered PF_PACKET protocol family
6492 17:52:05.258469 <6>[ 5.153964] 9pnet: Installing 9P2000 support
6493 17:52:05.268593 <6>[ 5.154056] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6494 17:52:05.275179 <5>[ 5.158548] Key type dns_resolver registered
6495 17:52:05.278342 <6>[ 5.161780] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6496 17:52:05.285087 <6>[ 5.164756] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6497 17:52:05.288178 <6>[ 5.166332] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6498 17:52:05.294743 <6>[ 5.167409] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6499 17:52:05.301290 <6>[ 5.185753] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6500 17:52:05.308036 <6>[ 5.189836] registered taskstats version 1
6501 17:52:05.311698 <5>[ 5.206946] Loading compiled-in X.509 certificates
6502 17:52:05.360073 <3>[ 5.251239] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6503 17:52:05.392305 <6>[ 5.279997] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6504 17:52:05.403105 <6>[ 5.294182] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6505 17:52:05.412835 <6>[ 5.302745] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6506 17:52:05.419537 <6>[ 5.311430] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6507 17:52:05.429450 <6>[ 5.320004] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6508 17:52:05.436136 <6>[ 5.328525] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6509 17:52:05.446342 <6>[ 5.337044] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6510 17:52:05.449837 <6>[ 5.344575] hub 1-1:1.0: USB hub found
6511 17:52:05.459678 <6>[ 5.345558] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6512 17:52:05.462638 <6>[ 5.349933] hub 1-1:1.0: 3 ports detected
6513 17:52:05.469336 <6>[ 5.358845] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6514 17:52:05.475853 <6>[ 5.369901] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6515 17:52:05.483068 <6>[ 5.377259] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6516 17:52:05.493890 <6>[ 5.384555] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6517 17:52:05.500423 <6>[ 5.392003] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6518 17:52:05.507067 <6>[ 5.400404] panfrost 13040000.gpu: clock rate = 511999970
6519 17:52:05.516971 <6>[ 5.406101] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6520 17:52:05.526772 <6>[ 5.416181] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6521 17:52:05.533085 <6>[ 5.424189] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6522 17:52:05.546529 <6>[ 5.432621] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6523 17:52:05.552860 <6>[ 5.444698] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6524 17:52:05.563110 <6>[ 5.453977] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6525 17:52:05.573047 <6>[ 5.462722] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6526 17:52:05.582591 <6>[ 5.471869] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6527 17:52:05.589302 <6>[ 5.480998] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6528 17:52:05.599162 <6>[ 5.490125] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6529 17:52:05.609305 <6>[ 5.499425] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6530 17:52:05.619290 <6>[ 5.508727] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6531 17:52:05.629405 <6>[ 5.518200] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6532 17:52:05.635850 <6>[ 5.527676] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6533 17:52:05.645663 <6>[ 5.536803] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6534 17:52:05.717987 <6>[ 5.609221] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6535 17:52:05.728033 <6>[ 5.618125] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6536 17:52:05.738134 <6>[ 5.629355] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6537 17:52:05.758608 <6>[ 5.649768] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6538 17:52:06.448212 <6>[ 5.833987] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6539 17:52:06.458270 <4>[ 5.937959] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6540 17:52:06.464882 <4>[ 5.937971] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6541 17:52:06.471433 <6>[ 5.938339] r8152 1-1.2:1.0 eth0: v1.12.13
6542 17:52:06.477980 <6>[ 6.018011] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6543 17:52:06.484604 <6>[ 6.322599] Console: switching to colour frame buffer device 170x48
6544 17:52:06.491095 <6>[ 6.383376] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6545 17:52:06.512975 <6>[ 6.400522] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6546 17:52:06.530258 <6>[ 6.417690] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6547 17:52:06.536915 <6>[ 6.430168] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6548 17:52:06.547576 <6>[ 6.438471] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6549 17:52:06.557742 <6>[ 6.445445] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6550 17:52:06.576955 <6>[ 6.464569] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6551 17:52:07.672372 <6>[ 7.566632] r8152 1-1.2:1.0 eth0: carrier on
6552 17:52:10.103457 <5>[ 7.597771] Sending DHCP requests .., OK
6553 17:52:10.110147 <6>[ 10.002091] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6554 17:52:10.113554 <6>[ 10.010534] IP-Config: Complete:
6555 17:52:10.126443 <6>[ 10.014101] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6556 17:52:10.136283 <6>[ 10.025007] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6557 17:52:10.148367 <6>[ 10.039310] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6558 17:52:10.156851 <6>[ 10.039322] nameserver0=192.168.201.1
6559 17:52:10.164895 <6>[ 10.059106] clk: Disabling unused clocks
6560 17:52:10.169601 <6>[ 10.067104] ALSA device list:
6561 17:52:10.178663 <6>[ 10.073145] No soundcards found.
6562 17:52:10.187812 <6>[ 10.082298] Freeing unused kernel memory: 8512K
6563 17:52:10.195112 <6>[ 10.089459] Run /init as init process
6564 17:52:10.224433 <6>[ 10.118592] NET: Registered PF_INET6 protocol family
6565 17:52:10.231157 <6>[ 10.125662] Segment Routing with IPv6
6566 17:52:10.234382 <6>[ 10.130312] In-situ OAM (IOAM) with IPv6
6567 17:52:10.276616 <30>[ 10.144513] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6568 17:52:10.287970 <30>[ 10.182357] systemd[1]: Detected architecture arm64.
6569 17:52:10.288089
6570 17:52:10.294234 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6571 17:52:10.294363
6572 17:52:10.307371 <30>[ 10.201983] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6573 17:52:10.442813 <30>[ 10.334148] systemd[1]: Queued start job for default target graphical.target.
6574 17:52:10.484239 <30>[ 10.375377] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6575 17:52:10.494462 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6576 17:52:10.512202 <30>[ 10.403030] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6577 17:52:10.522158 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6578 17:52:10.540272 <30>[ 10.431248] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6579 17:52:10.551536 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6580 17:52:10.567337 <30>[ 10.458470] systemd[1]: Created slice user.slice - User and Session Slice.
6581 17:52:10.577644 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6582 17:52:10.598759 <30>[ 10.486279] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6583 17:52:10.608191 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6584 17:52:10.631046 <30>[ 10.518584] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6585 17:52:10.641998 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6586 17:52:10.668934 <30>[ 10.550014] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6587 17:52:10.685543 <30>[ 10.576564] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6588 17:52:10.692474 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6589 17:52:10.711014 <30>[ 10.601948] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6590 17:52:10.723280 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6591 17:52:10.739506 <30>[ 10.630505] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6592 17:52:10.753789 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6593 17:52:10.767653 <30>[ 10.662167] systemd[1]: Reached target paths.target - Path Units.
6594 17:52:10.782222 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6595 17:52:10.798629 <30>[ 10.689955] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6596 17:52:10.811303 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6597 17:52:10.823395 <30>[ 10.717924] systemd[1]: Reached target slices.target - Slice Units.
6598 17:52:10.837954 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6599 17:52:10.851329 <30>[ 10.745960] systemd[1]: Reached target swap.target - Swaps.
6600 17:52:10.862050 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6601 17:52:10.882834 <30>[ 10.774008] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6602 17:52:10.896329 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6603 17:52:10.915307 <30>[ 10.806479] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6604 17:52:10.929337 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6605 17:52:10.949255 <30>[ 10.840474] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6606 17:52:10.963233 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6607 17:52:10.980694 <30>[ 10.871652] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6608 17:52:10.994661 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6609 17:52:11.011455 <30>[ 10.902494] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6610 17:52:11.023803 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6611 17:52:11.044490 <30>[ 10.935704] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6612 17:52:11.057775 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6613 17:52:11.075275 <30>[ 10.966446] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6614 17:52:11.088164 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6615 17:52:11.131096 <30>[ 11.022203] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6616 17:52:11.143762 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6617 17:52:11.168079 <30>[ 11.059276] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6618 17:52:11.179331 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6619 17:52:11.199951 <30>[ 11.091247] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6620 17:52:11.211046 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6621 17:52:11.234095 <30>[ 11.118816] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6622 17:52:11.256121 <30>[ 11.147328] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6623 17:52:11.267431 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6624 17:52:11.285979 <30>[ 11.177117] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6625 17:52:11.297542 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6626 17:52:11.340043 <30>[ 11.230912] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6627 17:52:11.351560 <6>[ 11.240493] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6628 17:52:11.362345 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6629 17:52:11.384888 <30>[ 11.276020] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6630 17:52:11.395758 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6631 17:52:11.421523 <30>[ 11.312442] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6632 17:52:11.435475 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6633 17:52:11.483797 <30>[ 11.375056] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6634 17:52:11.495494 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6635 17:52:11.520894 <30>[ 11.411999] systemd[1]: Starting systemd-journald.service - Journal Service...
6636 17:52:11.531278 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6637 17:52:11.550967 <30>[ 11.441831] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6638 17:52:11.560651 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6639 17:52:11.587590 <30>[ 11.474985] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6640 17:52:11.599941 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6641 17:52:11.620021 <30>[ 11.511131] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6642 17:52:11.634870 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6643 17:52:11.657555 <30>[ 11.548433] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6644 17:52:11.667816 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6645 17:52:11.697595 <30>[ 11.588296] systemd[1]: Started systemd-journald.service - Journal Service.
6646 17:52:11.704119 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6647 17:52:11.729422 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6648 17:52:11.747709 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6649 17:52:11.767431 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6650 17:52:11.784603 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6651 17:52:11.805751 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6652 17:52:11.825709 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6653 17:52:11.849949 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6654 17:52:11.873793 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6655 17:52:11.893490 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6656 17:52:11.912910 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6657 17:52:11.932607 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6658 17:52:11.953802 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6659 17:52:11.968220 See 'systemctl status systemd-remount-fs.service' for details.
6660 17:52:11.990229 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6661 17:52:12.048094 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6662 17:52:12.077336 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6663 17:52:12.089465 <46>[ 11.980574] systemd-journald[207]: Received client request to flush runtime journal.
6664 17:52:12.103759 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6665 17:52:12.152334 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6666 17:52:12.175637 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6667 17:52:12.211640 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6668 17:52:12.232360 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6669 17:52:12.256434 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6670 17:52:12.280805 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6671 17:52:12.300806 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6672 17:52:12.320378 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6673 17:52:12.364182 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6674 17:52:12.403274 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6675 17:52:12.420169 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6676 17:52:12.439126 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6677 17:52:12.476004 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6678 17:52:12.500869 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6679 17:52:12.524080 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6680 17:52:12.549466 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6681 17:52:12.576517 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6682 17:52:12.595865 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6683 17:52:12.625899 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6684 17:52:12.644283 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6685 17:52:12.671775 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6686 17:52:12.792517 <6>[ 12.683717] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6687 17:52:12.808719 <4>[ 12.699614] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6688 17:52:12.823436 <6>[ 12.711379] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6689 17:52:12.827306 <3>[ 12.711656] mtk-scp 10500000.scp: invalid resource
6690 17:52:12.837053 <3>[ 12.720431] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6691 17:52:12.843602 <3>[ 12.720446] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6692 17:52:12.853465 <3>[ 12.720452] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6693 17:52:12.860422 <3>[ 12.723514] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6694 17:52:12.874992 <6>[ 12.726668] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6695 17:52:12.881378 <6>[ 12.726719] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6696 17:52:12.891684 <3>[ 12.727618] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6697 17:52:12.898226 <3>[ 12.727629] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6698 17:52:12.913204 <3>[ 12.727637] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6699 17:52:12.922563 <3>[ 12.727645] elan_i2c 2-0015: Error applying setting, reverse things back
6700 17:52:12.932761 <3>[ 12.735022] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6701 17:52:12.942482 <3>[ 12.735040] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6702 17:52:12.952328 <3>[ 12.735050] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6703 17:52:12.962899 <3>[ 12.735059] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6704 17:52:12.969187 <6>[ 12.749103] remoteproc remoteproc0: scp is available
6705 17:52:12.975782 <4>[ 12.762574] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6706 17:52:12.982608 <4>[ 12.762766] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6707 17:52:12.992552 <3>[ 12.773609] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6708 17:52:12.998835 <6>[ 12.781175] remoteproc remoteproc0: powering up scp
6709 17:52:13.009293 <4>[ 12.782239] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6710 17:52:13.015964 <6>[ 12.861075] mc: Linux media interface: v0.10
6711 17:52:13.026214 <4>[ 12.862199] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6712 17:52:13.039043 <3>[ 12.868343] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6713 17:52:13.045686 <3>[ 12.874714] remoteproc remoteproc0: request_firmware failed: -2
6714 17:52:13.056125 <6>[ 12.931776] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6715 17:52:13.073606 <6>[ 12.966771] videodev: Linux video capture interface: v2.00
6716 17:52:13.108269 <3>[ 12.995724] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6717 17:52:13.118599 <6>[ 13.009513] cs_system_cfg: CoreSight Configuration manager initialised
6718 17:52:13.125263 <3>[ 13.012123] debugfs: File 'Playback' in directory 'dapm' already present!
6719 17:52:13.136020 <3>[ 13.026934] debugfs: File 'Capture' in directory 'dapm' already present!
6720 17:52:13.151187 <6>[ 13.042032] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6721 17:52:13.174196 <6>[ 13.064933] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6722 17:52:13.187785 <6>[ 13.078605] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6723 17:52:13.197378 <6>[ 13.078692] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6724 17:52:13.204220 <6>[ 13.086858] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6725 17:52:13.220765 <6>[ 13.111853] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6726 17:52:13.230838 <6>[ 13.112327] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6727 17:52:13.240580 <6>[ 13.120173] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6728 17:52:13.247349 <5>[ 13.134017] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6729 17:52:13.254004 <6>[ 13.138892] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6730 17:52:13.266976 <5>[ 13.157861] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6731 17:52:13.283631 <5>[ 13.174877] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6732 17:52:13.295148 <4>[ 13.185858] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6733 17:52:13.302597 <6>[ 13.197094] cfg80211: failed to load regulatory.db
6734 17:52:13.315736 <6>[ 13.206558] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6735 17:52:13.325504 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6736 17:52:13.338044 <3>[ 13.232540] thermal_sys: Failed to find 'trips' node
6737 17:52:13.350471 <3>[ 13.241310] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6738 17:52:13.363831 [[0;32m OK [0m] Reached target [0;1;39mtime<3>[ 13.252587] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6739 17:52:13.366738 -set.target[0m - System Time Set.
6740 17:52:13.373126 <4>[ 13.265013] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6741 17:52:13.387266 <3>[ 13.281360] thermal_sys: Failed to find 'trips' node
6742 17:52:13.397294 <3>[ 13.288463] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6743 17:52:13.407251 <3>[ 13.297491] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6744 17:52:13.416924 <4>[ 13.307568] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6745 17:52:13.459865 <4>[ 13.350559] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6746 17:52:13.466146 <4>[ 13.350559] Fallback method does not support PEC.
6747 17:52:13.485140 <3>[ 13.375880] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6748 17:52:13.495872 <6>[ 13.392698] Bluetooth: Core ver 2.22
6749 17:52:13.508510 <3>[ 13.398061] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6750 17:52:13.520026 <6>[ 13.414368] NET: Registered PF_BLUETOOTH protocol family
6751 17:52:13.531046 <6>[ 13.425616] Bluetooth: HCI device and connection manager initialized
6752 17:52:13.543244 <6>[ 13.437239] Bluetooth: HCI socket layer initialized
6753 17:52:13.551196 <6>[ 13.445150] Bluetooth: L2CAP socket layer initialized
6754 17:52:13.557841 <3>[ 13.446218] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6755 17:52:13.564869 <6>[ 13.450551] Bluetooth: SCO socket layer initialized
6756 17:52:13.575250 <3>[ 13.464594] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6757 17:52:13.601742 <46>[ 13.479765] systemd-journald[207]: Data hash table of /var/log/journal/6cfa758ce87d4acd800e1258fdce5dda/system.journal has a fill level at 75.0 (1536 of 2047 items, 524288 file size, 341 bytes per hash table item), suggesting rotation.
6758 17:52:13.619965 <46>[ 13.503997] systemd-journald[207]: /var/log/journal/6cfa758ce87d4acd800e1258fdce5dda/system.journal: Journal header limits reached or header out-of-date, rotating.
6759 17:52:13.622857 <6>[ 13.506788] Bluetooth: HCI UART driver ver 2.3
6760 17:52:13.631778 <6>[ 13.525851] Bluetooth: HCI UART protocol H4 registered
6761 17:52:13.641941 Startin<3>[ 13.531896] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6762 17:52:13.648747 g [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6763 17:52:13.695635 <6>[ 13.586697] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6764 17:52:13.706786 <6>[ 13.601102] Bluetooth: HCI UART protocol LL registered
6765 17:52:13.716453 <6>[ 13.602926] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6766 17:52:13.733797 <6>[ 13.625132] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6767 17:52:13.750596 <6>[ 13.638203] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6768 17:52:13.757012 <6>[ 13.638689] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6769 17:52:13.777690 <6>[ 13.640060] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6770 17:52:13.785748 <6>[ 13.667968] Bluetooth: HCI UART protocol Three-wire (H5) registered
6771 17:52:13.800586 <6>[ 13.694948] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6772 17:52:13.856199 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6773 17:52:13.862700 <6>[ 13.755732] Bluetooth: HCI UART protocol Broadcom registered
6774 17:52:13.880245 <6>[ 13.774275] Bluetooth: HCI UART protocol QCA registered
6775 17:52:13.892575 <6>[ 13.786765] Bluetooth: HCI UART protocol Marvell registered
6776 17:52:13.913791 <6>[ 13.801535] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6777 17:52:13.927402 <6>[ 13.815439] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6778 17:52:13.940623 <6>[ 13.835104] Bluetooth: hci0: setting up ROME/QCA6390
6779 17:52:13.978688 <3>[ 13.869614] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6780 17:52:14.003905 <6>[ 13.893072] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video2 (81,2)
6781 17:52:14.010306 <3>[ 13.897533] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6782 17:52:14.030934 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6783 17:52:14.038810 <6>[ 13.933098] usbcore: registered new interface driver uvcvideo
6784 17:52:14.056544 [[0;32m OK [0m] Started [0;1;39msystemd-rfk<3>[ 13.946425] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6785 17:52:14.066427 ill.ser…- Load<3>[ 13.946854] power_supply sbs-12-000b: driver failed to report `technology' property: -6
6786 17:52:14.069934 /Save RF Kill Switch Status.
6787 17:52:14.079974 <3>[ 13.969775] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6788 17:52:14.093049 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6789 17:52:14.142138 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6790 17:52:14.156119 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6791 17:52:14.162721 <3>[ 14.056887] Bluetooth: hci0: Frame reassembly failed (-84)
6792 17:52:14.177489 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6793 17:52:14.196398 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6794 17:52:14.215302 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6795 17:52:14.231196 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6796 17:52:14.247659 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6797 17:52:14.263321 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6798 17:52:14.279467 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6799 17:52:14.324759 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6800 17:52:14.356028 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6801 17:52:14.365870 <6>[ 14.254817] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6802 17:52:14.384580 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6803 17:52:14.404497 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6804 17:52:14.437438 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6805 17:52:14.452212 <4>[ 14.343118] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6806 17:52:14.459205 <6>[ 14.353607] Bluetooth: hci0: QCA Product ID :0x00000008
6807 17:52:14.469135 <6>[ 14.362974] Bluetooth: hci0: QCA SOC Version :0x00000044
6808 17:52:14.475522 <4>[ 14.364066] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6809 17:52:14.482216 <6>[ 14.368813] Bluetooth: hci0: QCA ROM Version :0x00000302
6810 17:52:14.492276 <4>[ 14.379277] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6811 17:52:14.495299 <6>[ 14.381797] Bluetooth: hci0: QCA Patch Version:0x00000111
6812 17:52:14.501603 <4>[ 14.390157] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6813 17:52:14.508365 <6>[ 14.395325] Bluetooth: hci0: QCA controller version 0x00440302
6814 17:52:14.519069 <6>[ 14.407533] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6815 17:52:14.529053 <4>[ 14.417119] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6816 17:52:14.539541 <3>[ 14.428404] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6817 17:52:14.560803 <3>[ 14.455195] Bluetooth: hci0: QCA Failed to download patch (-2)
6818 17:52:14.572485 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6819 17:52:14.620312 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6820 17:52:14.627079 <3>[ 14.520597] Bluetooth: hci0: Frame reassembly failed (-84)
6821 17:52:14.633197 <4>[ 14.520633] Bluetooth: hci0: Received unexpected HCI Event 0x00
6822 17:52:14.639953 <3>[ 14.526400] Bluetooth: hci0: Frame reassembly failed (-84)
6823 17:52:14.660792 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6824 17:52:14.692172 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6825 17:52:14.714252 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6826 17:52:14.732476 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6827 17:52:14.776524 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6828 17:52:14.809643 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6829 17:52:14.883159
6830 17:52:14.886516 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6831 17:52:14.886819
6832 17:52:14.889457 debian-bookworm-arm64 login: root (automatic login)
6833 17:52:14.889686
6834 17:52:14.910370 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Mon Jun 17 16:16:56 UTC 2024 aarch64
6835 17:52:14.910568
6836 17:52:14.916798 The programs included with the Debian GNU/Linux system are free software;
6837 17:52:14.924595 the exact distribution terms for each program are described in the
6838 17:52:14.927647 individual files in /usr/share/doc/*/copyright.
6839 17:52:14.927830
6840 17:52:14.934298 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6841 17:52:14.937560 permitted by applicable law.
6842 17:52:14.938221 Matched prompt #10: / #
6844 17:52:14.938656 Setting prompt string to ['/ #']
6845 17:52:14.938846 end: 2.2.5.1 login-action (duration 00:00:15) [common]
6847 17:52:14.939267 end: 2.2.5 auto-login-action (duration 00:00:15) [common]
6848 17:52:14.939463 start: 2.2.6 expect-shell-connection (timeout 00:03:18) [common]
6849 17:52:14.939618 Setting prompt string to ['/ #']
6850 17:52:14.939751 Forcing a shell prompt, looking for ['/ #']
6852 17:52:14.990153 / #
6853 17:52:14.990670 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6854 17:52:14.991041 Waiting using forced prompt support (timeout 00:02:30)
6855 17:52:14.996999
6856 17:52:14.997817 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6857 17:52:14.998369 start: 2.2.7 export-device-env (timeout 00:03:18) [common]
6858 17:52:14.998840 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6859 17:52:14.999334 end: 2.2 depthcharge-retry (duration 00:01:42) [common]
6860 17:52:14.999821 end: 2 depthcharge-action (duration 00:01:42) [common]
6861 17:52:15.000316 start: 3 lava-test-retry (timeout 00:05:00) [common]
6862 17:52:15.000748 start: 3.1 lava-test-shell (timeout 00:05:00) [common]
6863 17:52:15.001119 Using namespace: common
6865 17:52:15.102041 / # #
6866 17:52:15.102332 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:05:00)
6867 17:52:15.108170 #
6868 17:52:15.108636 Using /lava-14396189
6870 17:52:15.209202 / # export SHELL=/bin/sh
6871 17:52:15.215023 export SHELL=/bin/sh
6873 17:52:15.315686 / # . /lava-14396189/environment
6874 17:52:15.320989 . /lava-14396189/environment
6876 17:52:15.421568 / # /lava-14396189/bin/lava-test-runner /lava-14396189/0
6877 17:52:15.421734 Test shell timeout: 10s (minimum of the action and connection timeout)
6878 17:52:15.426503 /lava-14396189/bin/lava-test-runner /lava-14396189/0
6879 17:52:15.452693 + export TESTRUN_ID=0_sleep
6880 17:52:15.456189 + cd /lava-14396189/0/tests/0_sleep
6881 17:52:15.459151 + cat uuid
6882 17:52:15.459244 + UUID=14396189_1.5.2.3.1
6883 17:52:15.462811 + set +x
6884 17:52:15.466237 <LAVA_SIGNAL_STARTRUN 0_sleep 14396189_1.5.2.3.1>
6885 17:52:15.466512 Received signal: <STARTRUN> 0_sleep 14396189_1.5.2.3.1
6886 17:52:15.466599 Starting test lava.0_sleep (14396189_1.5.2.3.1)
6887 17:52:15.466696 Skipping test definition patterns.
6888 17:52:15.469230 + ./config/lava/sleep/sleep.sh mem freeze
6889 17:52:15.475789 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc-exist RESULT=pass>
6890 17:52:15.476052 Received signal: <TESTCASE> TEST_CASE_ID=rtc-exist RESULT=pass
6892 17:52:15.479305 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc-wakeup-enabled RESULT=pass>
6893 17:52:15.479594 Received signal: <TESTCASE> TEST_CASE_ID=rtc-wakeup-enabled RESULT=pass
6895 17:52:15.482945 rtcwake: assuming RTC uses UTC ...
6896 17:52:15.489149 rtcwake: wakeup from "mem" using rtc0 at Mon Jun 17 17:51:23 2024
6897 17:52:15.496384 <6>[ 15.390550] PM: suspend entry (deep)
6898 17:52:15.499984 <6>[ 15.394577] Filesystems sync: 0.000 seconds
6899 17:52:15.506332 <6>[ 15.399679] Freezing user space processes
6900 17:52:15.512793 <6>[ 15.405636] Freezing user space processes completed (elapsed 0.001 seconds)
6901 17:52:15.516010 <6>[ 15.412940] OOM killer disabled.
6902 17:52:15.522675 <6>[ 15.416465] Freezing remaining freezable tasks
6903 17:52:15.529278 <6>[ 15.422513] Freezing remaining freezable tasks completed (elapsed 0.001 seconds)
6904 17:52:15.539497 <6>[ 15.430246] printk: Suspending console(s) (use no_console_suspend to debug)
6905 17:52:21.769525 <6>[ 15.563228] Disabling non-boot CPUs ...
6906 17:52:21.772981 <6>[ 15.564980] psci: CPU1 killed (polled 0 ms)
6907 17:52:21.776123 <6>[ 15.567102] psci: CPU2 killed (polled 0 ms)
6908 17:52:21.782701 <6>[ 15.569001] psci: CPU3 killed (polled 0 ms)
6909 17:52:21.786325 <6>[ 15.570886] psci: CPU4 killed (polled 0 ms)
6910 17:52:21.793064 <6>[ 15.572637] psci: CPU5 killed (polled 0 ms)
6911 17:52:21.796121 <6>[ 15.573834] psci: CPU6 killed (polled 4 ms)
6912 17:52:21.799728 <6>[ 15.575527] psci: CPU7 killed (polled 0 ms)
6913 17:52:21.802816 <6>[ 15.576013] Enabling non-boot CPUs ...
6914 17:52:21.809761 <6>[ 15.576423] Detected VIPT I-cache on CPU1
6915 17:52:21.816270 <4>[ 15.576486] cacheinfo: Unable to detect cache hierarchy for CPU 1
6916 17:52:21.822885 <6>[ 15.576502] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
6917 17:52:21.830087 <6>[ 15.576559] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
6918 17:52:21.832705 <6>[ 15.577083] CPU1 is up
6919 17:52:21.836644 <6>[ 15.577379] Detected VIPT I-cache on CPU2
6920 17:52:21.842971 <4>[ 15.577406] cacheinfo: Unable to detect cache hierarchy for CPU 2
6921 17:52:21.849618 <6>[ 15.577413] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
6922 17:52:21.856282 <6>[ 15.577434] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
6923 17:52:21.859714 <6>[ 15.577730] CPU2 is up
6924 17:52:21.862606 <6>[ 15.578079] Detected VIPT I-cache on CPU3
6925 17:52:21.869723 <4>[ 15.578106] cacheinfo: Unable to detect cache hierarchy for CPU 3
6926 17:52:21.879647 <6>[ 15.578113] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
6927 17:52:21.886050 <6>[ 15.578135] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
6928 17:52:21.886144 <6>[ 15.578453] CPU3 is up
6929 17:52:21.892668 <6>[ 15.578899] Detected VIPT I-cache on CPU4
6930 17:52:21.899842 <4>[ 15.578934] cacheinfo: Unable to detect cache hierarchy for CPU 4
6931 17:52:21.906471 <6>[ 15.578943] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
6932 17:52:21.912817 <6>[ 15.578968] arch_timer: CPU4: Trapping CNTVCT access
6933 17:52:21.919368 <6>[ 15.578981] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
6934 17:52:21.919482 <6>[ 15.579396] CPU4 is up
6935 17:52:21.926170 <6>[ 15.579681] Detected VIPT I-cache on CPU5
6936 17:52:21.933058 <4>[ 15.579712] cacheinfo: Unable to detect cache hierarchy for CPU 5
6937 17:52:21.939366 <6>[ 15.579717] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
6938 17:52:21.946109 <6>[ 15.579730] arch_timer: CPU5: Trapping CNTVCT access
6939 17:52:21.952665 <6>[ 15.579736] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
6940 17:52:21.952762 <6>[ 15.580018] CPU5 is up
6941 17:52:21.959087 <6>[ 15.580381] Detected VIPT I-cache on CPU6
6942 17:52:21.965931 <4>[ 15.580411] cacheinfo: Unable to detect cache hierarchy for CPU 6
6943 17:52:21.972698 <6>[ 15.580417] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6944 17:52:21.980058 <6>[ 15.580430] arch_timer: CPU6: Trapping CNTVCT access
6945 17:52:21.990227 <6>[ 15.580436] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6946 17:52:21.993608 <6>[ 15.580719] CPU6 is up
6947 17:52:21.996641 <6>[ 15.581081] Detected VIPT I-cache on CPU7
6948 17:52:22.004690 <4>[ 15.581111] cacheinfo: Unable to detect cache hierarchy for CPU 7
6949 17:52:22.015916 <6>[ 15.581117] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6950 17:52:22.022667 <6>[ 15.581130] arch_timer: CPU7: Trapping CNTVCT access
6951 17:52:22.028719 <6>[ 15.581136] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6952 17:52:22.033018 <6>[ 15.581440] CPU7 is up
6953 17:52:22.040240 <3>[ 15.583342] Failed to prepare clk '(null)': -13
6954 17:52:22.046708 <3>[ 15.583424] Failed to prepare clk '(null)': -13
6955 17:52:22.053533 <4>[ 15.695792] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6956 17:52:22.063763 <4>[ 15.705325] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6957 17:52:22.073813 <4>[ 15.711585] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6958 17:52:22.080763 <4>[ 15.712446] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6959 17:52:22.087209 <6>[ 15.858363] r8152 1-1.2:1.0 eth0: carrier on
6960 17:52:22.093560 <3>[ 16.549872] Bluetooth: hci0: command 0x1002 tx timeout
6961 17:52:22.100479 <3>[ 16.549885] Bluetooth: hci0: Opcode 0x1002 failed: -110
6962 17:52:22.108092 <6>[ 16.773167] OOM killer enabled.
6963 17:52:22.111416 <6>[ 16.778279] Restarting tasks ... done.
6964 17:52:22.118780 <5>[ 16.783587] random: crng reseeded on system resumption
6965 17:52:22.121759 <6>[ 16.789941] PM: suspend exit
6966 17:52:22.135432 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtcwake-mem-1 RESULT=pass>
6967 17:52:22.135778 Received signal: <TESTCASE> TEST_CASE_ID=rtcwake-mem-1 RESULT=pass
6969 17:52:22.138161 rtcwake: assuming RTC uses UTC ...
6970 17:52:22.144575 rtcwake: wakeup from "mem" using rtc0 at Mon Jun 17 17:51:30 2024
6971 17:52:22.159659 <6>[ 16.824814] PM: suspend entry (deep)
6972 17:52:22.166485 <6>[ 16.831332] Filesystems sync: 0.000 seconds
6973 17:52:22.173689 <6>[ 16.838874] Freezing user space processes
6974 17:52:22.186083 <6>[ 16.847644] Freezing user space processes completed (elapsed 0.002 seconds)
6975 17:52:22.189398 <6>[ 16.857091] OOM killer disabled.
6976 17:52:22.197804 <6>[ 16.862769] Freezing remaining freezable tasks
6977 17:52:23.120742 <6>[ 17.782428] Freezing remaining freezable tasks completed (elapsed 0.912 seconds)
6978 17:52:23.132229 <6>[ 17.793832] printk: Suspending console(s) (use no_console_suspend to debug)
6979 17:52:28.765572 <6>[ 19.945937] Disabling non-boot CPUs ...
6980 17:52:28.773300 <6>[ 19.948278] psci: CPU1 killed (polled 0 ms)
6981 17:52:28.781551 <6>[ 19.950592] psci: CPU2 killed (polled 0 ms)
6982 17:52:28.789507 <6>[ 19.952754] psci: CPU3 killed (polled 0 ms)
6983 17:52:28.797737 <6>[ 19.954837] psci: CPU4 killed (polled 4 ms)
6984 17:52:28.805307 <6>[ 19.956551] psci: CPU5 killed (polled 0 ms)
6985 17:52:28.812277 <6>[ 19.958373] psci: CPU6 killed (polled 0 ms)
6986 17:52:28.819205 <6>[ 19.960280] psci: CPU7 killed (polled 0 ms)
6987 17:52:28.825921 <6>[ 19.960690] Enabling non-boot CPUs ...
6988 17:52:28.829033 <6>[ 19.961209] Detected VIPT I-cache on CPU1
6989 17:52:28.836993 <4>[ 19.961297] cacheinfo: Unable to detect cache hierarchy for CPU 1
6990 17:52:28.848525 <6>[ 19.961319] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
6991 17:52:28.854946 <6>[ 19.961401] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
6992 17:52:28.857941 <6>[ 19.962171] CPU1 is up
6993 17:52:28.865398 <6>[ 19.962550] Detected VIPT I-cache on CPU2
6994 17:52:28.872351 <4>[ 19.962590] cacheinfo: Unable to detect cache hierarchy for CPU 2
6995 17:52:28.882854 <6>[ 19.962601] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
6996 17:52:28.889995 <6>[ 19.962637] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
6997 17:52:28.893008 <6>[ 19.963067] CPU2 is up
6998 17:52:28.896009 <6>[ 19.963453] Detected VIPT I-cache on CPU3
6999 17:52:28.902853 <4>[ 19.963494] cacheinfo: Unable to detect cache hierarchy for CPU 3
7000 17:52:28.913331 <6>[ 19.963505] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
7001 17:52:28.919911 <6>[ 19.963540] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
7002 17:52:28.923632 <6>[ 19.963988] CPU3 is up
7003 17:52:28.926901 <6>[ 19.964493] Detected VIPT I-cache on CPU4
7004 17:52:28.933449 <4>[ 19.964557] cacheinfo: Unable to detect cache hierarchy for CPU 4
7005 17:52:28.943261 <6>[ 19.964575] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
7006 17:52:28.947037 <6>[ 19.964622] arch_timer: CPU4: Trapping CNTVCT access
7007 17:52:28.956939 <6>[ 19.964644] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
7008 17:52:28.957033 <6>[ 19.965360] CPU4 is up
7009 17:52:28.963913 <6>[ 19.965756] Detected VIPT I-cache on CPU5
7010 17:52:28.970674 <4>[ 19.965790] cacheinfo: Unable to detect cache hierarchy for CPU 5
7011 17:52:28.977080 <6>[ 19.965800] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
7012 17:52:28.984159 <6>[ 19.965822] arch_timer: CPU5: Trapping CNTVCT access
7013 17:52:28.990941 <6>[ 19.965832] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
7014 17:52:28.994316 <6>[ 19.966264] CPU5 is up
7015 17:52:29.000414 <6>[ 19.966657] Detected VIPT I-cache on CPU6
7016 17:52:29.007069 <4>[ 19.966708] cacheinfo: Unable to detect cache hierarchy for CPU 6
7017 17:52:29.013808 <6>[ 19.966718] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
7018 17:52:29.020279 <6>[ 19.966742] arch_timer: CPU6: Trapping CNTVCT access
7019 17:52:29.027132 <6>[ 19.966752] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
7020 17:52:29.030139 <6>[ 19.967221] CPU6 is up
7021 17:52:29.033709 <6>[ 19.967557] Detected VIPT I-cache on CPU7
7022 17:52:29.040562 <4>[ 19.967607] cacheinfo: Unable to detect cache hierarchy for CPU 7
7023 17:52:29.050732 <6>[ 19.967617] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
7024 17:52:29.053736 <6>[ 19.967639] arch_timer: CPU7: Trapping CNTVCT access
7025 17:52:29.064021 <6>[ 19.967648] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
7026 17:52:29.067393 <6>[ 19.968146] CPU7 is up
7027 17:52:29.074163 <4>[ 20.092674] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
7028 17:52:29.080301 <4>[ 20.104015] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
7029 17:52:29.090361 <4>[ 20.108535] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
7030 17:52:29.096934 <4>[ 20.109446] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
7031 17:52:29.100454 <6>[ 20.270274] r8152 1-1.2:1.0 eth0: carrier on
7032 17:52:29.103416 <6>[ 21.155681] OOM killer enabled.
7033 17:52:29.110986 <6>[ 21.159660] Restarting tasks ... done.
7034 17:52:29.117347 <5>[ 21.164839] random: crng reseeded on system resumption
7035 17:52:29.120731 <6>[ 21.171223] PM: suspend exit
7036 17:52:29.130945 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtcwake-mem-2 RESULT=pass>
7037 17:52:29.131226 Received signal: <TESTCASE> TEST_CASE_ID=rtcwake-mem-2 RESULT=pass
7039 17:52:29.134569 rtcwake: assuming RTC uses UTC ...
7040 17:52:29.140768 rtcwake: wakeup from "mem" using rtc0 at Mon Jun 17 17:51:37 2024
7041 17:52:29.154342 <6>[ 21.203692] PM: suspend entry (deep)
7042 17:52:29.161141 <6>[ 21.209486] Filesystems sync: 0.000 seconds
7043 17:52:29.167797 <6>[ 21.216356] Freezing user space processes
7044 17:52:29.177765 <6>[ 21.223861] Freezing user space processes completed (elapsed 0.001 seconds)
7045 17:52:29.181465 <6>[ 21.232896] OOM killer disabled.
7046 17:52:29.188914 <6>[ 21.238169] Freezing remaining freezable tasks
7047 17:52:30.116284 <6>[ 22.162030] Freezing remaining freezable tasks completed (elapsed 0.917 seconds)
7048 17:52:30.127962 <6>[ 22.173549] printk: Suspending console(s) (use no_console_suspend to debug)
7049 17:52:35.753928 <6>[ 24.308342] Disabling non-boot CPUs ...
7050 17:52:35.761512 <6>[ 24.310591] psci: CPU1 killed (polled 0 ms)
7051 17:52:35.770070 <6>[ 24.312538] psci: CPU2 killed (polled 4 ms)
7052 17:52:35.778161 <6>[ 24.314800] psci: CPU3 killed (polled 0 ms)
7053 17:52:35.786201 <6>[ 24.316415] psci: CPU4 killed (polled 4 ms)
7054 17:52:35.793797 <6>[ 24.318257] psci: CPU5 killed (polled 0 ms)
7055 17:52:35.801088 <6>[ 24.320092] psci: CPU6 killed (polled 0 ms)
7056 17:52:35.807814 <6>[ 24.322035] psci: CPU7 killed (polled 0 ms)
7057 17:52:35.814060 <6>[ 24.322578] Enabling non-boot CPUs ...
7058 17:52:35.817506 <6>[ 24.323106] Detected VIPT I-cache on CPU1
7059 17:52:35.825830 <4>[ 24.323192] cacheinfo: Unable to detect cache hierarchy for CPU 1
7060 17:52:35.837491 <6>[ 24.323214] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
7061 17:52:35.843574 <6>[ 24.323296] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
7062 17:52:35.847328 <6>[ 24.324061] CPU1 is up
7063 17:52:35.854905 <6>[ 24.324447] Detected VIPT I-cache on CPU2
7064 17:52:35.861107 <4>[ 24.324489] cacheinfo: Unable to detect cache hierarchy for CPU 2
7065 17:52:35.871524 <6>[ 24.324500] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
7066 17:52:35.878153 <6>[ 24.324536] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
7067 17:52:35.882313 <6>[ 24.324955] CPU2 is up
7068 17:52:35.889216 <6>[ 24.325350] Detected VIPT I-cache on CPU3
7069 17:52:35.895731 <4>[ 24.325391] cacheinfo: Unable to detect cache hierarchy for CPU 3
7070 17:52:35.902748 <6>[ 24.325403] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
7071 17:52:35.909352 <6>[ 24.325437] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
7072 17:52:35.912909 <6>[ 24.325876] CPU3 is up
7073 17:52:35.919322 <6>[ 24.326390] Detected VIPT I-cache on CPU4
7074 17:52:35.925970 <4>[ 24.326456] cacheinfo: Unable to detect cache hierarchy for CPU 4
7075 17:52:35.932378 <6>[ 24.326474] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
7076 17:52:35.939077 <6>[ 24.326521] arch_timer: CPU4: Trapping CNTVCT access
7077 17:52:35.945635 <6>[ 24.326544] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
7078 17:52:35.949368 <6>[ 24.327257] CPU4 is up
7079 17:52:35.955910 <6>[ 24.327654] Detected VIPT I-cache on CPU5
7080 17:52:35.962511 <4>[ 24.327689] cacheinfo: Unable to detect cache hierarchy for CPU 5
7081 17:52:35.968949 <6>[ 24.327699] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
7082 17:52:35.975384 <6>[ 24.327721] arch_timer: CPU5: Trapping CNTVCT access
7083 17:52:35.982180 <6>[ 24.327731] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
7084 17:52:35.985391 <6>[ 24.328164] CPU5 is up
7085 17:52:35.988555 <6>[ 24.328555] Detected VIPT I-cache on CPU6
7086 17:52:35.995736 <4>[ 24.328605] cacheinfo: Unable to detect cache hierarchy for CPU 6
7087 17:52:36.005683 <6>[ 24.328614] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
7088 17:52:36.009025 <6>[ 24.328637] arch_timer: CPU6: Trapping CNTVCT access
7089 17:52:36.018983 <6>[ 24.328647] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
7090 17:52:36.022574 <6>[ 24.329102] CPU6 is up
7091 17:52:36.025638 <6>[ 24.329454] Detected VIPT I-cache on CPU7
7092 17:52:36.032378 <4>[ 24.329504] cacheinfo: Unable to detect cache hierarchy for CPU 7
7093 17:52:36.039347 <6>[ 24.329514] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
7094 17:52:36.046372 <6>[ 24.329536] arch_timer: CPU7: Trapping CNTVCT access
7095 17:52:36.052990 <6>[ 24.329546] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
7096 17:52:36.056031 <6>[ 24.330033] CPU7 is up
7097 17:52:36.062603 <4>[ 24.456175] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
7098 17:52:36.072835 <4>[ 24.466345] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
7099 17:52:36.079268 <4>[ 24.470854] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
7100 17:52:36.086128 <4>[ 24.471765] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
7101 17:52:36.092334 <6>[ 24.617099] r8152 1-1.2:1.0 eth0: carrier on
7102 17:52:36.096094 <6>[ 25.508134] OOM killer enabled.
7103 17:52:36.102360 <6>[ 25.512115] Restarting tasks ... done.
7104 17:52:36.105583 <5>[ 25.517278] random: crng reseeded on system resumption
7105 17:52:36.109706 <6>[ 25.523889] PM: suspend exit
7106 17:52:36.122080 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtcwake-mem-3 RESULT=pass>
7107 17:52:36.122770 Received signal: <TESTCASE> TEST_CASE_ID=rtcwake-mem-3 RESULT=pass
7109 17:52:36.125352 rtcwake: assuming RTC uses UTC ...
7110 17:52:36.131984 rtcwake: wakeup from "mem" using rtc0 at Mon Jun 17 17:51:44 2024
7111 17:52:36.144928 <6>[ 25.555713] PM: suspend entry (deep)
7112 17:52:36.148483 <6>[ 25.560806] Filesystems sync: 0.000 seconds
7113 17:52:36.155833 <6>[ 25.566614] Freezing user space processes
7114 17:52:36.166036 <6>[ 25.572816] Freezing user space processes completed (elapsed 0.001 seconds)
7115 17:52:36.169499 <6>[ 25.581945] OOM killer disabled.
7116 17:52:36.176605 <6>[ 25.587141] Freezing remaining freezable tasks
7117 17:52:37.112231 <6>[ 26.519481] Freezing remaining freezable tasks completed (elapsed 0.925 seconds)
7118 17:52:37.123570 <6>[ 26.530988] printk: Suspending console(s) (use no_console_suspend to debug)
7119 17:52:42.778851 <6>[ 28.676613] Disabling non-boot CPUs ...
7120 17:52:42.787105 <6>[ 28.678158] psci: CPU1 killed (polled 4 ms)
7121 17:52:42.794788 <6>[ 28.680427] psci: CPU2 killed (polled 0 ms)
7122 17:52:42.803280 <6>[ 28.682335] psci: CPU3 killed (polled 4 ms)
7123 17:52:42.811156 <6>[ 28.684568] psci: CPU4 killed (polled 0 ms)
7124 17:52:42.818623 <6>[ 28.686195] psci: CPU5 killed (polled 4 ms)
7125 17:52:42.826018 <6>[ 28.688159] psci: CPU6 killed (polled 0 ms)
7126 17:52:42.832521 <6>[ 28.690004] psci: CPU7 killed (polled 0 ms)
7127 17:52:42.839336 <6>[ 28.690700] Enabling non-boot CPUs ...
7128 17:52:42.843014 <6>[ 28.691258] Detected VIPT I-cache on CPU1
7129 17:52:42.850836 <4>[ 28.691345] cacheinfo: Unable to detect cache hierarchy for CPU 1
7130 17:52:42.862134 <6>[ 28.691367] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
7131 17:52:42.868877 <6>[ 28.691448] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
7132 17:52:42.872424 <6>[ 28.692213] CPU1 is up
7133 17:52:42.880083 <6>[ 28.692597] Detected VIPT I-cache on CPU2
7134 17:52:42.886604 <4>[ 28.692639] cacheinfo: Unable to detect cache hierarchy for CPU 2
7135 17:52:42.897451 <6>[ 28.692650] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
7136 17:52:42.903527 <6>[ 28.692685] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
7137 17:52:42.907296 <6>[ 28.693075] CPU2 is up
7138 17:52:42.910330 <6>[ 28.693401] Detected VIPT I-cache on CPU3
7139 17:52:42.917419 <4>[ 28.693442] cacheinfo: Unable to detect cache hierarchy for CPU 3
7140 17:52:42.927684 <6>[ 28.693454] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
7141 17:52:42.934037 <6>[ 28.693489] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
7142 17:52:42.937490 <6>[ 28.693967] CPU3 is up
7143 17:52:42.941127 <6>[ 28.694441] Detected VIPT I-cache on CPU4
7144 17:52:42.947744 <4>[ 28.694506] cacheinfo: Unable to detect cache hierarchy for CPU 4
7145 17:52:42.958093 <6>[ 28.694525] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
7146 17:52:42.961229 <6>[ 28.694571] arch_timer: CPU4: Trapping CNTVCT access
7147 17:52:42.971714 <6>[ 28.694595] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
7148 17:52:42.971813 <6>[ 28.695302] CPU4 is up
7149 17:52:42.978842 <6>[ 28.695705] Detected VIPT I-cache on CPU5
7150 17:52:42.985535 <4>[ 28.695740] cacheinfo: Unable to detect cache hierarchy for CPU 5
7151 17:52:42.992024 <6>[ 28.695749] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
7152 17:52:42.998697 <6>[ 28.695771] arch_timer: CPU5: Trapping CNTVCT access
7153 17:52:43.005375 <6>[ 28.695782] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
7154 17:52:43.009134 <6>[ 28.696222] CPU5 is up
7155 17:52:43.015229 <6>[ 28.696606] Detected VIPT I-cache on CPU6
7156 17:52:43.021700 <4>[ 28.696656] cacheinfo: Unable to detect cache hierarchy for CPU 6
7157 17:52:43.028384 <6>[ 28.696666] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
7158 17:52:43.035072 <6>[ 28.696689] arch_timer: CPU6: Trapping CNTVCT access
7159 17:52:43.041894 <6>[ 28.696699] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
7160 17:52:43.045218 <6>[ 28.697161] CPU6 is up
7161 17:52:43.048603 <6>[ 28.697505] Detected VIPT I-cache on CPU7
7162 17:52:43.055151 <4>[ 28.697553] cacheinfo: Unable to detect cache hierarchy for CPU 7
7163 17:52:43.065227 <6>[ 28.697563] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
7164 17:52:43.068115 <6>[ 28.697586] arch_timer: CPU7: Trapping CNTVCT access
7165 17:52:43.078534 <6>[ 28.697596] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
7166 17:52:43.082192 <6>[ 28.698094] CPU7 is up
7167 17:52:43.088267 <4>[ 28.810661] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
7168 17:52:43.095016 <4>[ 28.818101] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
7169 17:52:43.104948 <4>[ 28.821351] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
7170 17:52:43.111965 <4>[ 28.822011] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
7171 17:52:43.114928 <6>[ 29.011168] r8152 1-1.2:1.0 eth0: carrier on
7172 17:52:43.117964 <6>[ 29.899921] OOM killer enabled.
7173 17:52:43.125787 <6>[ 29.903901] Restarting tasks ... done.
7174 17:52:43.132032 <5>[ 29.908978] random: crng reseeded on system resumption
7175 17:52:43.135642 <6>[ 29.915394] PM: suspend exit
7176 17:52:43.145244 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtcwake-mem-4 RESULT=pass>
7177 17:52:43.145522 Received signal: <TESTCASE> TEST_CASE_ID=rtcwake-mem-4 RESULT=pass
7179 17:52:43.148740 rtcwake: assuming RTC uses UTC ...
7180 17:52:43.155094 rtcwake: wakeup from "mem" using rtc0 at Mon Jun 17 17:51:51 2024
7181 17:52:43.168428 <6>[ 29.947185] PM: suspend entry (deep)
7182 17:52:43.175130 <6>[ 29.953480] Filesystems sync: 0.000 seconds
7183 17:52:43.182453 <6>[ 29.961231] Freezing user space processes
7184 17:52:43.193370 <6>[ 29.968997] Freezing user space processes completed (elapsed 0.001 seconds)
7185 17:52:43.196972 <6>[ 29.977988] OOM killer disabled.
7186 17:52:43.205271 <6>[ 29.983946] Freezing remaining freezable tasks
7187 17:52:44.132720 <6>[ 30.908537] Freezing remaining freezable tasks completed (elapsed 0.917 seconds)
7188 17:52:44.144519 <6>[ 30.920033] printk: Suspending console(s) (use no_console_suspend to debug)
7189 17:57:15.001021 Marking unfinished test run as failed
7192 17:57:15.002595 end: 3.1 lava-test-shell (duration 00:05:00) [common]
7194 17:57:15.003580 lava-test-retry failed: 1 of 1 attempts. 'lava-test-shell timed out after 300 seconds'
7196 17:57:15.004365 end: 3 lava-test-retry (duration 00:05:00) [common]
7198 17:57:15.005505 Cleaning after the job
7199 17:57:15.005925 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396189/tftp-deploy-rzu53s7n/ramdisk
7200 17:57:15.045829 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396189/tftp-deploy-rzu53s7n/kernel
7201 17:57:15.073365 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396189/tftp-deploy-rzu53s7n/dtb
7202 17:57:15.073610 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396189/tftp-deploy-rzu53s7n/modules
7203 17:57:15.079697 start: 4.1 power-off (timeout 00:00:30) [common]
7204 17:57:15.079892 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
7205 17:57:15.302585 >> Command sent successfully.
7206 17:57:15.312569 Returned 0 in 0 seconds
7207 17:57:15.413960 end: 4.1 power-off (duration 00:00:00) [common]
7209 17:57:15.415607 start: 4.2 read-feedback (timeout 00:10:00) [common]
7210 17:57:15.416898 Listened to connection for namespace 'common' for up to 1s
7211 17:57:16.417375 Finalising connection for namespace 'common'
7212 17:57:16.418038 Disconnecting from shell: Finalise
7213 17:57:16.519227 end: 4.2 read-feedback (duration 00:00:01) [common]
7214 17:57:16.519931 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14396189
7215 17:57:16.695379 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14396189
7216 17:57:16.695822 TestError: A test failed to run, look at the error message.