Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 1
- Kernel Errors: 45
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 88
1 16:33:15.882032 lava-dispatcher, installed at version: 2024.03
2 16:33:15.882249 start: 0 validate
3 16:33:15.882409 Start time: 2024-06-17 16:33:15.882400+00:00 (UTC)
4 16:33:15.882546 Using caching service: 'http://localhost/cache/?uri=%s'
5 16:33:15.882691 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-v4l2%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 16:33:16.151500 Using caching service: 'http://localhost/cache/?uri=%s'
7 16:33:16.151682 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-32-g0d904242fc145%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fkernel%2FImage exists
8 16:33:16.414482 Using caching service: 'http://localhost/cache/?uri=%s'
9 16:33:16.414663 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-32-g0d904242fc145%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 16:33:16.680114 Using caching service: 'http://localhost/cache/?uri=%s'
11 16:33:16.680288 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.92-cip22-32-g0d904242fc145%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 16:33:16.946221 validate duration: 1.06
14 16:33:16.946653 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 16:33:16.946830 start: 1.1 download-retry (timeout 00:10:00) [common]
16 16:33:16.946946 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 16:33:16.947093 Not decompressing ramdisk as can be used compressed.
18 16:33:16.947187 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-v4l2/20240313.0/arm64/rootfs.cpio.gz
19 16:33:16.947269 saving as /var/lib/lava/dispatcher/tmp/14396128/tftp-deploy-myoln7kc/ramdisk/rootfs.cpio.gz
20 16:33:16.947346 total size: 28105535 (26 MB)
21 16:33:16.953026 progress 0 % (0 MB)
22 16:33:16.961322 progress 5 % (1 MB)
23 16:33:16.969603 progress 10 % (2 MB)
24 16:33:16.977945 progress 15 % (4 MB)
25 16:33:16.986351 progress 20 % (5 MB)
26 16:33:16.994981 progress 25 % (6 MB)
27 16:33:17.003420 progress 30 % (8 MB)
28 16:33:17.011787 progress 35 % (9 MB)
29 16:33:17.019958 progress 40 % (10 MB)
30 16:33:17.028263 progress 45 % (12 MB)
31 16:33:17.036559 progress 50 % (13 MB)
32 16:33:17.044996 progress 55 % (14 MB)
33 16:33:17.053383 progress 60 % (16 MB)
34 16:33:17.061869 progress 65 % (17 MB)
35 16:33:17.070352 progress 70 % (18 MB)
36 16:33:17.078788 progress 75 % (20 MB)
37 16:33:17.087179 progress 80 % (21 MB)
38 16:33:17.095458 progress 85 % (22 MB)
39 16:33:17.103296 progress 90 % (24 MB)
40 16:33:17.111472 progress 95 % (25 MB)
41 16:33:17.119552 progress 100 % (26 MB)
42 16:33:17.119794 26 MB downloaded in 0.17 s (155.43 MB/s)
43 16:33:17.119968 end: 1.1.1 http-download (duration 00:00:00) [common]
45 16:33:17.120371 end: 1.1 download-retry (duration 00:00:00) [common]
46 16:33:17.120514 start: 1.2 download-retry (timeout 00:10:00) [common]
47 16:33:17.120615 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 16:33:17.120770 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/kernel/Image
49 16:33:17.120848 saving as /var/lib/lava/dispatcher/tmp/14396128/tftp-deploy-myoln7kc/kernel/Image
50 16:33:17.120915 total size: 54813184 (52 MB)
51 16:33:17.120984 No compression specified
52 16:33:17.122236 progress 0 % (0 MB)
53 16:33:17.138410 progress 5 % (2 MB)
54 16:33:17.154921 progress 10 % (5 MB)
55 16:33:17.171373 progress 15 % (7 MB)
56 16:33:17.187518 progress 20 % (10 MB)
57 16:33:17.203816 progress 25 % (13 MB)
58 16:33:17.219807 progress 30 % (15 MB)
59 16:33:17.236390 progress 35 % (18 MB)
60 16:33:17.253034 progress 40 % (20 MB)
61 16:33:17.268936 progress 45 % (23 MB)
62 16:33:17.285327 progress 50 % (26 MB)
63 16:33:17.302088 progress 55 % (28 MB)
64 16:33:17.318565 progress 60 % (31 MB)
65 16:33:17.335156 progress 65 % (34 MB)
66 16:33:17.351430 progress 70 % (36 MB)
67 16:33:17.367765 progress 75 % (39 MB)
68 16:33:17.384127 progress 80 % (41 MB)
69 16:33:17.400740 progress 85 % (44 MB)
70 16:33:17.417132 progress 90 % (47 MB)
71 16:33:17.432977 progress 95 % (49 MB)
72 16:33:17.448679 progress 100 % (52 MB)
73 16:33:17.448969 52 MB downloaded in 0.33 s (159.35 MB/s)
74 16:33:17.449155 end: 1.2.1 http-download (duration 00:00:00) [common]
76 16:33:17.449535 end: 1.2 download-retry (duration 00:00:00) [common]
77 16:33:17.449639 start: 1.3 download-retry (timeout 00:09:59) [common]
78 16:33:17.449734 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 16:33:17.449903 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 16:33:17.450017 saving as /var/lib/lava/dispatcher/tmp/14396128/tftp-deploy-myoln7kc/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 16:33:17.450126 total size: 57695 (0 MB)
82 16:33:17.450227 No compression specified
83 16:33:17.451749 progress 56 % (0 MB)
84 16:33:17.452091 progress 100 % (0 MB)
85 16:33:17.452346 0 MB downloaded in 0.00 s (24.82 MB/s)
86 16:33:17.452538 end: 1.3.1 http-download (duration 00:00:00) [common]
88 16:33:17.452940 end: 1.3 download-retry (duration 00:00:00) [common]
89 16:33:17.453059 start: 1.4 download-retry (timeout 00:09:59) [common]
90 16:33:17.453196 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 16:33:17.453358 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.92-cip22-32-g0d904242fc145/arm64/defconfig+arm64-chromebook/gcc-10/modules.tar.xz
92 16:33:17.453471 saving as /var/lib/lava/dispatcher/tmp/14396128/tftp-deploy-myoln7kc/modules/modules.tar
93 16:33:17.453544 total size: 8628772 (8 MB)
94 16:33:17.453613 Using unxz to decompress xz
95 16:33:17.458384 progress 0 % (0 MB)
96 16:33:17.482111 progress 5 % (0 MB)
97 16:33:17.509987 progress 10 % (0 MB)
98 16:33:17.536937 progress 15 % (1 MB)
99 16:33:17.564267 progress 20 % (1 MB)
100 16:33:17.593294 progress 25 % (2 MB)
101 16:33:17.620435 progress 30 % (2 MB)
102 16:33:17.650182 progress 35 % (2 MB)
103 16:33:17.678335 progress 40 % (3 MB)
104 16:33:17.706779 progress 45 % (3 MB)
105 16:33:17.737062 progress 50 % (4 MB)
106 16:33:17.765463 progress 55 % (4 MB)
107 16:33:17.795272 progress 60 % (4 MB)
108 16:33:17.828230 progress 65 % (5 MB)
109 16:33:17.856603 progress 70 % (5 MB)
110 16:33:17.883257 progress 75 % (6 MB)
111 16:33:17.910422 progress 80 % (6 MB)
112 16:33:17.943519 progress 85 % (7 MB)
113 16:33:17.976756 progress 90 % (7 MB)
114 16:33:18.007446 progress 95 % (7 MB)
115 16:33:18.037794 progress 100 % (8 MB)
116 16:33:18.043984 8 MB downloaded in 0.59 s (13.94 MB/s)
117 16:33:18.044255 end: 1.4.1 http-download (duration 00:00:01) [common]
119 16:33:18.044550 end: 1.4 download-retry (duration 00:00:01) [common]
120 16:33:18.044657 start: 1.5 prepare-tftp-overlay (timeout 00:09:59) [common]
121 16:33:18.044762 start: 1.5.1 extract-nfsrootfs (timeout 00:09:59) [common]
122 16:33:18.044852 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 16:33:18.044950 start: 1.5.2 lava-overlay (timeout 00:09:59) [common]
124 16:33:18.045223 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri
125 16:33:18.045381 makedir: /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin
126 16:33:18.045512 makedir: /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/tests
127 16:33:18.045629 makedir: /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/results
128 16:33:18.045762 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-add-keys
129 16:33:18.045927 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-add-sources
130 16:33:18.046102 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-background-process-start
131 16:33:18.046291 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-background-process-stop
132 16:33:18.046449 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-common-functions
133 16:33:18.046605 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-echo-ipv4
134 16:33:18.046748 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-install-packages
135 16:33:18.046890 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-installed-packages
136 16:33:18.047030 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-os-build
137 16:33:18.047172 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-probe-channel
138 16:33:18.047318 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-probe-ip
139 16:33:18.047459 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-target-ip
140 16:33:18.047599 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-target-mac
141 16:33:18.047737 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-target-storage
142 16:33:18.047893 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-test-case
143 16:33:18.048033 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-test-event
144 16:33:18.048177 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-test-feedback
145 16:33:18.048316 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-test-raise
146 16:33:18.048453 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-test-reference
147 16:33:18.048592 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-test-runner
148 16:33:18.048753 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-test-set
149 16:33:18.048902 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-test-shell
150 16:33:18.049048 Updating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-install-packages (oe)
151 16:33:18.049219 Updating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/bin/lava-installed-packages (oe)
152 16:33:18.049357 Creating /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/environment
153 16:33:18.049477 LAVA metadata
154 16:33:18.049563 - LAVA_JOB_ID=14396128
155 16:33:18.049634 - LAVA_DISPATCHER_IP=192.168.201.1
156 16:33:18.049751 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:59) [common]
157 16:33:18.049827 skipped lava-vland-overlay
158 16:33:18.049910 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 16:33:18.050002 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
160 16:33:18.050085 skipped lava-multinode-overlay
161 16:33:18.050168 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 16:33:18.050263 start: 1.5.2.3 test-definition (timeout 00:09:59) [common]
163 16:33:18.050350 Loading test definitions
164 16:33:18.050454 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:59) [common]
165 16:33:18.050551 Using /lava-14396128 at stage 0
166 16:33:18.050943 uuid=14396128_1.5.2.3.1 testdef=None
167 16:33:18.051044 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 16:33:18.051141 start: 1.5.2.3.2 test-overlay (timeout 00:09:59) [common]
169 16:33:18.051712 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 16:33:18.051983 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:59) [common]
172 16:33:18.052690 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 16:33:18.052949 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
175 16:33:18.053630 runner path: /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/0/tests/0_v4l2-compliance-uvc test_uuid 14396128_1.5.2.3.1
176 16:33:18.053811 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 16:33:18.054040 Creating lava-test-runner.conf files
179 16:33:18.054112 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14396128/lava-overlay-9ubl3iri/lava-14396128/0 for stage 0
180 16:33:18.054215 - 0_v4l2-compliance-uvc
181 16:33:18.054323 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 16:33:18.054418 start: 1.5.2.4 compress-overlay (timeout 00:09:59) [common]
183 16:33:18.062570 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 16:33:18.062710 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
185 16:33:18.062811 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 16:33:18.062907 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 16:33:18.063001 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
188 16:33:19.073574 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 16:33:19.073980 start: 1.5.4 extract-modules (timeout 00:09:58) [common]
190 16:33:19.074106 extracting modules file /var/lib/lava/dispatcher/tmp/14396128/tftp-deploy-myoln7kc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14396128/extract-overlay-ramdisk-t08k0khm/ramdisk
191 16:33:19.364206 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 16:33:19.364403 start: 1.5.5 apply-overlay-tftp (timeout 00:09:58) [common]
193 16:33:19.364520 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14396128/compress-overlay-gdd6n05i/overlay-1.5.2.4.tar.gz to ramdisk
194 16:33:19.364605 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14396128/compress-overlay-gdd6n05i/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14396128/extract-overlay-ramdisk-t08k0khm/ramdisk
195 16:33:19.372193 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 16:33:19.372357 start: 1.5.6 configure-preseed-file (timeout 00:09:58) [common]
197 16:33:19.372466 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 16:33:19.372573 start: 1.5.7 compress-ramdisk (timeout 00:09:58) [common]
199 16:33:19.372667 Building ramdisk /var/lib/lava/dispatcher/tmp/14396128/extract-overlay-ramdisk-t08k0khm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14396128/extract-overlay-ramdisk-t08k0khm/ramdisk
200 16:33:20.220126 >> 276012 blocks
201 16:33:24.826275 rename /var/lib/lava/dispatcher/tmp/14396128/extract-overlay-ramdisk-t08k0khm/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14396128/tftp-deploy-myoln7kc/ramdisk/ramdisk.cpio.gz
202 16:33:24.826827 end: 1.5.7 compress-ramdisk (duration 00:00:05) [common]
203 16:33:24.827060 start: 1.5.8 prepare-kernel (timeout 00:09:52) [common]
204 16:33:24.827232 start: 1.5.8.1 prepare-fit (timeout 00:09:52) [common]
205 16:33:24.827433 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14396128/tftp-deploy-myoln7kc/kernel/Image']
206 16:33:40.380387 Returned 0 in 15 seconds
207 16:33:40.481011 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14396128/tftp-deploy-myoln7kc/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14396128/tftp-deploy-myoln7kc/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14396128/tftp-deploy-myoln7kc/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14396128/tftp-deploy-myoln7kc/kernel/image.itb
208 16:33:41.177181 output: FIT description: Kernel Image image with one or more FDT blobs
209 16:33:41.177578 output: Created: Mon Jun 17 17:33:41 2024
210 16:33:41.177693 output: Image 0 (kernel-1)
211 16:33:41.177789 output: Description:
212 16:33:41.177878 output: Created: Mon Jun 17 17:33:41 2024
213 16:33:41.177972 output: Type: Kernel Image
214 16:33:41.178063 output: Compression: lzma compressed
215 16:33:41.178174 output: Data Size: 13128753 Bytes = 12821.05 KiB = 12.52 MiB
216 16:33:41.178283 output: Architecture: AArch64
217 16:33:41.178394 output: OS: Linux
218 16:33:41.178503 output: Load Address: 0x00000000
219 16:33:41.178613 output: Entry Point: 0x00000000
220 16:33:41.178720 output: Hash algo: crc32
221 16:33:41.178828 output: Hash value: 106ffd6f
222 16:33:41.178937 output: Image 1 (fdt-1)
223 16:33:41.179045 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 16:33:41.179149 output: Created: Mon Jun 17 17:33:41 2024
225 16:33:41.179253 output: Type: Flat Device Tree
226 16:33:41.179355 output: Compression: uncompressed
227 16:33:41.179457 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 16:33:41.179560 output: Architecture: AArch64
229 16:33:41.179661 output: Hash algo: crc32
230 16:33:41.179763 output: Hash value: a9713552
231 16:33:41.179873 output: Image 2 (ramdisk-1)
232 16:33:41.179984 output: Description: unavailable
233 16:33:41.180081 output: Created: Mon Jun 17 17:33:41 2024
234 16:33:41.180175 output: Type: RAMDisk Image
235 16:33:41.180269 output: Compression: Unknown Compression
236 16:33:41.180361 output: Data Size: 41223153 Bytes = 40256.99 KiB = 39.31 MiB
237 16:33:41.180454 output: Architecture: AArch64
238 16:33:41.180546 output: OS: Linux
239 16:33:41.180637 output: Load Address: unavailable
240 16:33:41.180729 output: Entry Point: unavailable
241 16:33:41.180821 output: Hash algo: crc32
242 16:33:41.180912 output: Hash value: 6707030c
243 16:33:41.181003 output: Default Configuration: 'conf-1'
244 16:33:41.181095 output: Configuration 0 (conf-1)
245 16:33:41.181186 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 16:33:41.181277 output: Kernel: kernel-1
247 16:33:41.181369 output: Init Ramdisk: ramdisk-1
248 16:33:41.181468 output: FDT: fdt-1
249 16:33:41.181561 output: Loadables: kernel-1
250 16:33:41.181652 output:
251 16:33:41.181916 end: 1.5.8.1 prepare-fit (duration 00:00:16) [common]
252 16:33:41.182058 end: 1.5.8 prepare-kernel (duration 00:00:16) [common]
253 16:33:41.182206 end: 1.5 prepare-tftp-overlay (duration 00:00:23) [common]
254 16:33:41.182354 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:36) [common]
255 16:33:41.182490 No LXC device requested
256 16:33:41.182627 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 16:33:41.182748 start: 1.7 deploy-device-env (timeout 00:09:36) [common]
258 16:33:41.182881 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 16:33:41.182999 Checking files for TFTP limit of 4294967296 bytes.
260 16:33:41.183596 end: 1 tftp-deploy (duration 00:00:24) [common]
261 16:33:41.183724 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 16:33:41.183844 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 16:33:41.184043 substitutions:
264 16:33:41.184153 - {DTB}: 14396128/tftp-deploy-myoln7kc/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 16:33:41.184269 - {INITRD}: 14396128/tftp-deploy-myoln7kc/ramdisk/ramdisk.cpio.gz
266 16:33:41.184382 - {KERNEL}: 14396128/tftp-deploy-myoln7kc/kernel/Image
267 16:33:41.184490 - {LAVA_MAC}: None
268 16:33:41.184599 - {PRESEED_CONFIG}: None
269 16:33:41.184708 - {PRESEED_LOCAL}: None
270 16:33:41.184816 - {RAMDISK}: 14396128/tftp-deploy-myoln7kc/ramdisk/ramdisk.cpio.gz
271 16:33:41.184924 - {ROOT_PART}: None
272 16:33:41.185031 - {ROOT}: None
273 16:33:41.185137 - {SERVER_IP}: 192.168.201.1
274 16:33:41.185244 - {TEE}: None
275 16:33:41.185350 Parsed boot commands:
276 16:33:41.185475 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 16:33:41.185693 Parsed boot commands: tftpboot 192.168.201.1 14396128/tftp-deploy-myoln7kc/kernel/image.itb 14396128/tftp-deploy-myoln7kc/kernel/cmdline
278 16:33:41.185800 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 16:33:41.185917 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 16:33:41.186032 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 16:33:41.186128 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 16:33:41.186210 Not connected, no need to disconnect.
283 16:33:41.186293 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 16:33:41.186381 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 16:33:41.186460 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-2'
286 16:33:41.190529 Setting prompt string to ['lava-test: # ']
287 16:33:41.190972 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 16:33:41.191094 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 16:33:41.191207 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 16:33:41.191324 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 16:33:41.191577 Calling: ['/usr/local/bin/chromebook-reboot.sh', 'mt8183-kukui-jacuzzi-juniper-sku16-cbg-2']
292 16:34:04.053229 Returned 0 in 22 seconds
293 16:34:04.154272 end: 2.2.2.1 pdu-reboot (duration 00:00:23) [common]
295 16:34:04.154623 end: 2.2.2 reset-device (duration 00:00:23) [common]
296 16:34:04.154735 start: 2.2.3 depthcharge-start (timeout 00:04:37) [common]
297 16:34:04.154834 Setting prompt string to 'Starting depthcharge on Juniper...'
298 16:34:04.154911 Changing prompt to 'Starting depthcharge on Juniper...'
299 16:34:04.154986 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
300 16:34:04.155447 [Enter `^Ec?' for help]
301 16:34:04.155539 [DL] 00000000 00000000 010701
302 16:34:04.155611
303 16:34:04.155678
304 16:34:04.155747 F0: 102B 0000
305 16:34:04.155814
306 16:34:04.155884 F3: 1006 0033 [0200]
307 16:34:04.155950
308 16:34:04.156017 F3: 4001 00E0 [0200]
309 16:34:04.156082
310 16:34:04.156144 F3: 0000 0000
311 16:34:04.156206
312 16:34:04.156267 V0: 0000 0000 [0001]
313 16:34:04.156327
314 16:34:04.156387 00: 1027 0002
315 16:34:04.156451
316 16:34:04.156512 01: 0000 0000
317 16:34:04.156573
318 16:34:04.156633 BP: 0C00 0251 [0000]
319 16:34:04.156695
320 16:34:04.156755 G0: 1182 0000
321 16:34:04.156815
322 16:34:04.156875 EC: 0004 0000 [0001]
323 16:34:04.156935
324 16:34:04.156995 S7: 0000 0000 [0000]
325 16:34:04.157055
326 16:34:04.157114 CC: 0000 0000 [0001]
327 16:34:04.157175
328 16:34:04.157235 T0: 0000 00DB [000F]
329 16:34:04.157295
330 16:34:04.157355 Jump to BL
331 16:34:04.157415
332 16:34:04.157497
333 16:34:04.157557
334 16:34:04.157617 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
335 16:34:04.157682 ARM64: Exception handlers installed.
336 16:34:04.157743 ARM64: Testing exception
337 16:34:04.157803 ARM64: Done test exception
338 16:34:04.157864 WDT: Last reset was cold boot
339 16:34:04.157924 SPI0(PAD0) initialized at 992727 Hz
340 16:34:04.157985 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
341 16:34:04.158046 Manufacturer: ef
342 16:34:04.158130 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
343 16:34:04.158195 Probing TPM: . done!
344 16:34:04.158256 TPM ready after 0 ms
345 16:34:04.158316 Connected to device vid:did:rid of 1ae0:0028:00
346 16:34:04.158378 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-afa1dd1
347 16:34:04.158439 Initialized TPM device CR50 revision 0
348 16:34:04.158500 tlcl_send_startup: Startup return code is 0
349 16:34:04.158560 TPM: setup succeeded
350 16:34:04.158621 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
351 16:34:04.158681 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
352 16:34:04.158742 in-header: 03 19 00 00 08 00 00 00
353 16:34:04.158802 in-data: a2 e0 47 00 13 00 00 00
354 16:34:04.158862 Chrome EC: UHEPI supported
355 16:34:04.158922 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
356 16:34:04.158983 in-header: 03 a1 00 00 08 00 00 00
357 16:34:04.159043 in-data: 84 60 60 10 00 00 00 00
358 16:34:04.159103 Phase 1
359 16:34:04.159162 FMAP: area GBB found @ 3f5000 (12032 bytes)
360 16:34:04.159223 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
361 16:34:04.159283 VB2:vb2_check_recovery() Recovery was requested manually
362 16:34:04.159344 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
363 16:34:04.159404 Recovery requested (1009000e)
364 16:34:04.159464 tlcl_extend: response is 0
365 16:34:04.159524 tlcl_extend: response is 0
366 16:34:04.159584
367 16:34:04.159643
368 16:34:04.159702 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
369 16:34:04.159763 ARM64: Exception handlers installed.
370 16:34:04.159824 ARM64: Testing exception
371 16:34:04.159883 ARM64: Done test exception
372 16:34:04.159943 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x926b, sec=0x2014
373 16:34:04.160003 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
374 16:34:04.160062 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
375 16:34:04.160123 [RTC]rtc_get_frequency_meter,134: input=0xf, output=862
376 16:34:04.160183 [RTC]rtc_get_frequency_meter,134: input=0x7, output=734
377 16:34:04.160242 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
378 16:34:04.160302 [RTC]rtc_get_frequency_meter,134: input=0x9, output=765
379 16:34:04.160362 [RTC]rtc_get_frequency_meter,134: input=0xa, output=781
380 16:34:04.160422 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
381 16:34:04.160482 [RTC]rtc_get_frequency_meter,134: input=0xb, output=798
382 16:34:04.160542 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x926b
383 16:34:04.160602 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
384 16:34:04.160662 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
385 16:34:04.160723 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
386 16:34:04.160783 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
387 16:34:04.160843 in-header: 03 19 00 00 08 00 00 00
388 16:34:04.160904 in-data: a2 e0 47 00 13 00 00 00
389 16:34:04.160964 Chrome EC: UHEPI supported
390 16:34:04.161024 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
391 16:34:04.161084 in-header: 03 a1 00 00 08 00 00 00
392 16:34:04.161144 in-data: 84 60 60 10 00 00 00 00
393 16:34:04.161204 Skip loading cached calibration data
394 16:34:04.161264 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
395 16:34:04.161324 in-header: 03 a1 00 00 08 00 00 00
396 16:34:04.161384 in-data: 84 60 60 10 00 00 00 00
397 16:34:04.161462 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
398 16:34:04.161559 in-header: 03 a1 00 00 08 00 00 00
399 16:34:04.161665 in-data: 84 60 60 10 00 00 00 00
400 16:34:04.161765 ADC[3]: Raw value=215760 ID=1
401 16:34:04.161844 Manufacturer: ef
402 16:34:04.161907 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
403 16:34:04.161969 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
404 16:34:04.162030 CBFS @ 21000 size 3d4000
405 16:34:04.162091 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
406 16:34:04.162152 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
407 16:34:04.162212 CBFS: Found @ offset 3c700 size 44
408 16:34:04.162273 DRAM-K: Full Calibration
409 16:34:04.162333 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
410 16:34:04.162393 CBFS @ 21000 size 3d4000
411 16:34:04.162452 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
412 16:34:04.162513 CBFS: Locating 'fallback/dram'
413 16:34:04.162573 CBFS: Found @ offset 24b00 size 12268
414 16:34:04.162633 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
415 16:34:04.162694 ddr_geometry: 1, config: 0x0
416 16:34:04.162755 header.status = 0x0
417 16:34:04.162814 header.magic = 0x44524d4b (expected: 0x44524d4b)
418 16:34:04.162874 header.version = 0x5 (expected: 0x5)
419 16:34:04.163135 header.size = 0x8f0 (expected: 0x8f0)
420 16:34:04.163205 header.config = 0x0
421 16:34:04.163267 header.flags = 0x0
422 16:34:04.163327 header.checksum = 0x0
423 16:34:04.163388 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
424 16:34:04.163449 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
425 16:34:04.163510 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
426 16:34:04.163571 ddr_geometry:1
427 16:34:04.163631 [EMI] new MDL number = 1
428 16:34:04.163691 dram_cbt_mode_extern: 0
429 16:34:04.163751 dram_cbt_mode [RK0]: 0, [RK1]: 0
430 16:34:04.163811 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
431 16:34:04.163872
432 16:34:04.163932
433 16:34:04.163992 [Bianco] ETT version 0.0.0.1
434 16:34:04.164052 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
435 16:34:04.164113
436 16:34:04.164172 vSetVcoreByFreq with vcore:762500, freq=1600
437 16:34:04.164235
438 16:34:04.164294 [DramcInit]
439 16:34:04.164354 AutoRefreshCKEOff AutoREF OFF
440 16:34:04.164414 DDRPhyPLLSetting-CKEOFF
441 16:34:04.164473 DDRPhyPLLSetting-CKEON
442 16:34:04.164533
443 16:34:04.164592 Enable WDQS
444 16:34:04.164651 [ModeRegInit_LP4] CH0 RK0
445 16:34:04.164721 Write Rank0 MR13 =0x18
446 16:34:04.164785 Write Rank0 MR12 =0x5d
447 16:34:04.164844 Write Rank0 MR1 =0x56
448 16:34:04.164930 Write Rank0 MR2 =0x1a
449 16:34:04.164992 Write Rank0 MR11 =0x0
450 16:34:04.165052 Write Rank0 MR22 =0x38
451 16:34:04.165112 Write Rank0 MR14 =0x5d
452 16:34:04.165171 Write Rank0 MR3 =0x30
453 16:34:04.165231 Write Rank0 MR13 =0x58
454 16:34:04.165291 Write Rank0 MR12 =0x5d
455 16:34:04.165350 Write Rank0 MR1 =0x56
456 16:34:04.165410 Write Rank0 MR2 =0x2d
457 16:34:04.165487 Write Rank0 MR11 =0x23
458 16:34:04.165547 Write Rank0 MR22 =0x34
459 16:34:04.165606 Write Rank0 MR14 =0x10
460 16:34:04.165666 Write Rank0 MR3 =0x30
461 16:34:04.165725 Write Rank0 MR13 =0xd8
462 16:34:04.165785 [ModeRegInit_LP4] CH0 RK1
463 16:34:04.165844 Write Rank1 MR13 =0x18
464 16:34:04.165903 Write Rank1 MR12 =0x5d
465 16:34:04.165963 Write Rank1 MR1 =0x56
466 16:34:04.166022 Write Rank1 MR2 =0x1a
467 16:34:04.166081 Write Rank1 MR11 =0x0
468 16:34:04.166140 Write Rank1 MR22 =0x38
469 16:34:04.166199 Write Rank1 MR14 =0x5d
470 16:34:04.166258 Write Rank1 MR3 =0x30
471 16:34:04.166317 Write Rank1 MR13 =0x58
472 16:34:04.166376 Write Rank1 MR12 =0x5d
473 16:34:04.166451 Write Rank1 MR1 =0x56
474 16:34:04.166513 Write Rank1 MR2 =0x2d
475 16:34:04.166572 Write Rank1 MR11 =0x23
476 16:34:04.166632 Write Rank1 MR22 =0x34
477 16:34:04.166692 Write Rank1 MR14 =0x10
478 16:34:04.166751 Write Rank1 MR3 =0x30
479 16:34:04.166810 Write Rank1 MR13 =0xd8
480 16:34:04.166870 [ModeRegInit_LP4] CH1 RK0
481 16:34:04.166929 Write Rank0 MR13 =0x18
482 16:34:04.166989 Write Rank0 MR12 =0x5d
483 16:34:04.167048 Write Rank0 MR1 =0x56
484 16:34:04.167107 Write Rank0 MR2 =0x1a
485 16:34:04.167166 Write Rank0 MR11 =0x0
486 16:34:04.167225 Write Rank0 MR22 =0x38
487 16:34:04.167285 Write Rank0 MR14 =0x5d
488 16:34:04.167344 Write Rank0 MR3 =0x30
489 16:34:04.167403 Write Rank0 MR13 =0x58
490 16:34:04.167462 Write Rank0 MR12 =0x5d
491 16:34:04.167521 Write Rank0 MR1 =0x56
492 16:34:04.167580 Write Rank0 MR2 =0x2d
493 16:34:04.167640 Write Rank0 MR11 =0x23
494 16:34:04.167699 Write Rank0 MR22 =0x34
495 16:34:04.167758 Write Rank0 MR14 =0x10
496 16:34:04.167817 Write Rank0 MR3 =0x30
497 16:34:04.167876 Write Rank0 MR13 =0xd8
498 16:34:04.167936 [ModeRegInit_LP4] CH1 RK1
499 16:34:04.167995 Write Rank1 MR13 =0x18
500 16:34:04.168054 Write Rank1 MR12 =0x5d
501 16:34:04.168113 Write Rank1 MR1 =0x56
502 16:34:04.168172 Write Rank1 MR2 =0x1a
503 16:34:04.168231 Write Rank1 MR11 =0x0
504 16:34:04.168291 Write Rank1 MR22 =0x38
505 16:34:04.168350 Write Rank1 MR14 =0x5d
506 16:34:04.168435 Write Rank1 MR3 =0x30
507 16:34:04.168497 Write Rank1 MR13 =0x58
508 16:34:04.168556 Write Rank1 MR12 =0x5d
509 16:34:04.168616 Write Rank1 MR1 =0x56
510 16:34:04.168682 Write Rank1 MR2 =0x2d
511 16:34:04.168761 Write Rank1 MR11 =0x23
512 16:34:04.168862 Write Rank1 MR22 =0x34
513 16:34:04.168927 Write Rank1 MR14 =0x10
514 16:34:04.168987 Write Rank1 MR3 =0x30
515 16:34:04.169048 Write Rank1 MR13 =0xd8
516 16:34:04.169108 match AC timing 3
517 16:34:04.169168 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
518 16:34:04.169229 [MiockJmeterHQA]
519 16:34:04.169289 vSetVcoreByFreq with vcore:762500, freq=1600
520 16:34:04.169349
521 16:34:04.169409 MIOCK jitter meter ch=0
522 16:34:04.169482
523 16:34:04.169543 1T = (101-17) = 84 dly cells
524 16:34:04.169605 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 744/100 ps
525 16:34:04.169666 vSetVcoreByFreq with vcore:725000, freq=1200
526 16:34:04.169726
527 16:34:04.169786 MIOCK jitter meter ch=0
528 16:34:04.169845
529 16:34:04.169904 1T = (96-16) = 80 dly cells
530 16:34:04.169965 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
531 16:34:04.170026 vSetVcoreByFreq with vcore:725000, freq=800
532 16:34:04.170086
533 16:34:04.170145 MIOCK jitter meter ch=0
534 16:34:04.170205
535 16:34:04.170263 1T = (96-16) = 80 dly cells
536 16:34:04.170324 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
537 16:34:04.170384 vSetVcoreByFreq with vcore:762500, freq=1600
538 16:34:04.170444 vSetVcoreByFreq with vcore:762500, freq=1600
539 16:34:04.170504
540 16:34:04.170562 K DRVP
541 16:34:04.170622 1. OCD DRVP=0 CALOUT=0
542 16:34:04.170683 1. OCD DRVP=1 CALOUT=0
543 16:34:04.170744 1. OCD DRVP=2 CALOUT=0
544 16:34:04.170804 1. OCD DRVP=3 CALOUT=0
545 16:34:04.170864 1. OCD DRVP=4 CALOUT=0
546 16:34:04.170924 1. OCD DRVP=5 CALOUT=0
547 16:34:04.170984 1. OCD DRVP=6 CALOUT=0
548 16:34:04.171044 1. OCD DRVP=7 CALOUT=0
549 16:34:04.171105 1. OCD DRVP=8 CALOUT=1
550 16:34:04.171166
551 16:34:04.171225 1. OCD DRVP calibration OK! DRVP=8
552 16:34:04.171287
553 16:34:04.171346
554 16:34:04.171405
555 16:34:04.171464 K ODTN
556 16:34:04.171530 3. OCD ODTN=0 ,CALOUT=1
557 16:34:04.171610 3. OCD ODTN=1 ,CALOUT=1
558 16:34:04.171672 3. OCD ODTN=2 ,CALOUT=1
559 16:34:04.171733 3. OCD ODTN=3 ,CALOUT=1
560 16:34:04.171793 3. OCD ODTN=4 ,CALOUT=1
561 16:34:04.171853 3. OCD ODTN=5 ,CALOUT=1
562 16:34:04.171913 3. OCD ODTN=6 ,CALOUT=1
563 16:34:04.171974 3. OCD ODTN=7 ,CALOUT=0
564 16:34:04.172034
565 16:34:04.172093 3. OCD ODTN calibration OK! ODTN=7
566 16:34:04.172155
567 16:34:04.172214 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
568 16:34:04.172274 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
569 16:34:04.172334 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
570 16:34:04.172395
571 16:34:04.172454 K DRVP
572 16:34:04.172514 1. OCD DRVP=0 CALOUT=0
573 16:34:04.172574 1. OCD DRVP=1 CALOUT=0
574 16:34:04.172634 1. OCD DRVP=2 CALOUT=0
575 16:34:04.172695 1. OCD DRVP=3 CALOUT=0
576 16:34:04.172755 1. OCD DRVP=4 CALOUT=0
577 16:34:04.172816 1. OCD DRVP=5 CALOUT=0
578 16:34:04.172876 1. OCD DRVP=6 CALOUT=0
579 16:34:04.172936 1. OCD DRVP=7 CALOUT=0
580 16:34:04.172996 1. OCD DRVP=8 CALOUT=0
581 16:34:04.173057 1. OCD DRVP=9 CALOUT=0
582 16:34:04.173117 1. OCD DRVP=10 CALOUT=1
583 16:34:04.173178
584 16:34:04.173449 1. OCD DRVP calibration OK! DRVP=10
585 16:34:04.173522
586 16:34:04.173585
587 16:34:04.173646
588 16:34:04.173706 K ODTN
589 16:34:04.173766 3. OCD ODTN=0 ,CALOUT=1
590 16:34:04.173844 3. OCD ODTN=1 ,CALOUT=1
591 16:34:04.173914 3. OCD ODTN=2 ,CALOUT=1
592 16:34:04.173976 3. OCD ODTN=3 ,CALOUT=1
593 16:34:04.174038 3. OCD ODTN=4 ,CALOUT=1
594 16:34:04.174099 3. OCD ODTN=5 ,CALOUT=1
595 16:34:04.174161 3. OCD ODTN=6 ,CALOUT=1
596 16:34:04.174222 3. OCD ODTN=7 ,CALOUT=1
597 16:34:04.174283 3. OCD ODTN=8 ,CALOUT=1
598 16:34:04.174344 3. OCD ODTN=9 ,CALOUT=1
599 16:34:04.174405 3. OCD ODTN=10 ,CALOUT=1
600 16:34:04.174466 3. OCD ODTN=11 ,CALOUT=1
601 16:34:04.174527 3. OCD ODTN=12 ,CALOUT=1
602 16:34:04.174622 3. OCD ODTN=13 ,CALOUT=1
603 16:34:04.174689 3. OCD ODTN=14 ,CALOUT=1
604 16:34:04.174750 3. OCD ODTN=15 ,CALOUT=0
605 16:34:04.174812
606 16:34:04.174872 3. OCD ODTN calibration OK! ODTN=15
607 16:34:04.174934
608 16:34:04.175006 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
609 16:34:04.175077 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
610 16:34:04.175139 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
611 16:34:04.175201
612 16:34:04.175261 [DramcInit]
613 16:34:04.175321 AutoRefreshCKEOff AutoREF OFF
614 16:34:04.175381 DDRPhyPLLSetting-CKEOFF
615 16:34:04.175442 DDRPhyPLLSetting-CKEON
616 16:34:04.175502
617 16:34:04.175564 Enable WDQS
618 16:34:04.175624 ==
619 16:34:04.175684 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
620 16:34:04.175745 fsp= 1, odt_onoff= 1, Byte mode= 0
621 16:34:04.175806 ==
622 16:34:04.175866 [Duty_Offset_Calibration]
623 16:34:04.175926
624 16:34:04.175985 ===========================
625 16:34:04.176045 B0:1 B1:-1 CA:0
626 16:34:04.176105 ==
627 16:34:04.176165 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
628 16:34:04.176225 fsp= 1, odt_onoff= 1, Byte mode= 0
629 16:34:04.176286 ==
630 16:34:04.176346 [Duty_Offset_Calibration]
631 16:34:04.176405
632 16:34:04.176465 ===========================
633 16:34:04.176525 B0:0 B1:0 CA:0
634 16:34:04.176585 [ModeRegInit_LP4] CH0 RK0
635 16:34:04.176644 Write Rank0 MR13 =0x18
636 16:34:04.176704 Write Rank0 MR12 =0x5d
637 16:34:04.176764 Write Rank0 MR1 =0x56
638 16:34:04.176824 Write Rank0 MR2 =0x1a
639 16:34:04.176883 Write Rank0 MR11 =0x0
640 16:34:04.176942 Write Rank0 MR22 =0x38
641 16:34:04.177002 Write Rank0 MR14 =0x5d
642 16:34:04.177070 Write Rank0 MR3 =0x30
643 16:34:04.177170 Write Rank0 MR13 =0x58
644 16:34:04.177263 Write Rank0 MR12 =0x5d
645 16:34:04.177356 Write Rank0 MR1 =0x56
646 16:34:04.177464 Write Rank0 MR2 =0x2d
647 16:34:04.177529 Write Rank0 MR11 =0x23
648 16:34:04.177589 Write Rank0 MR22 =0x34
649 16:34:04.177649 Write Rank0 MR14 =0x10
650 16:34:04.177709 Write Rank0 MR3 =0x30
651 16:34:04.177784 Write Rank0 MR13 =0xd8
652 16:34:04.177856 [ModeRegInit_LP4] CH0 RK1
653 16:34:04.177916 Write Rank1 MR13 =0x18
654 16:34:04.177976 Write Rank1 MR12 =0x5d
655 16:34:04.178036 Write Rank1 MR1 =0x56
656 16:34:04.178096 Write Rank1 MR2 =0x1a
657 16:34:04.178155 Write Rank1 MR11 =0x0
658 16:34:04.178215 Write Rank1 MR22 =0x38
659 16:34:04.178274 Write Rank1 MR14 =0x5d
660 16:34:04.178358 Write Rank1 MR3 =0x30
661 16:34:04.178419 Write Rank1 MR13 =0x58
662 16:34:04.178479 Write Rank1 MR12 =0x5d
663 16:34:04.178539 Write Rank1 MR1 =0x56
664 16:34:04.178598 Write Rank1 MR2 =0x2d
665 16:34:04.178658 Write Rank1 MR11 =0x23
666 16:34:04.178717 Write Rank1 MR22 =0x34
667 16:34:04.178777 Write Rank1 MR14 =0x10
668 16:34:04.178836 Write Rank1 MR3 =0x30
669 16:34:04.178896 Write Rank1 MR13 =0xd8
670 16:34:04.178956 [ModeRegInit_LP4] CH1 RK0
671 16:34:04.179015 Write Rank0 MR13 =0x18
672 16:34:04.179074 Write Rank0 MR12 =0x5d
673 16:34:04.179133 Write Rank0 MR1 =0x56
674 16:34:04.179192 Write Rank0 MR2 =0x1a
675 16:34:04.179251 Write Rank0 MR11 =0x0
676 16:34:04.179310 Write Rank0 MR22 =0x38
677 16:34:04.179369 Write Rank0 MR14 =0x5d
678 16:34:04.179428 Write Rank0 MR3 =0x30
679 16:34:04.179487 Write Rank0 MR13 =0x58
680 16:34:04.179546 Write Rank0 MR12 =0x5d
681 16:34:04.179605 Write Rank0 MR1 =0x56
682 16:34:04.179665 Write Rank0 MR2 =0x2d
683 16:34:04.179724 Write Rank0 MR11 =0x23
684 16:34:04.179783 Write Rank0 MR22 =0x34
685 16:34:04.179842 Write Rank0 MR14 =0x10
686 16:34:04.179901 Write Rank0 MR3 =0x30
687 16:34:04.179961 Write Rank0 MR13 =0xd8
688 16:34:04.180019 [ModeRegInit_LP4] CH1 RK1
689 16:34:04.180078 Write Rank1 MR13 =0x18
690 16:34:04.180137 Write Rank1 MR12 =0x5d
691 16:34:04.180196 Write Rank1 MR1 =0x56
692 16:34:04.180255 Write Rank1 MR2 =0x1a
693 16:34:04.180314 Write Rank1 MR11 =0x0
694 16:34:04.180374 Write Rank1 MR22 =0x38
695 16:34:04.180433 Write Rank1 MR14 =0x5d
696 16:34:04.180492 Write Rank1 MR3 =0x30
697 16:34:04.180551 Write Rank1 MR13 =0x58
698 16:34:04.180610 Write Rank1 MR12 =0x5d
699 16:34:04.180691 Write Rank1 MR1 =0x56
700 16:34:04.180755 Write Rank1 MR2 =0x2d
701 16:34:04.180815 Write Rank1 MR11 =0x23
702 16:34:04.180875 Write Rank1 MR22 =0x34
703 16:34:04.180934 Write Rank1 MR14 =0x10
704 16:34:04.180993 Write Rank1 MR3 =0x30
705 16:34:04.181053 Write Rank1 MR13 =0xd8
706 16:34:04.181112 match AC timing 3
707 16:34:04.181172 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
708 16:34:04.181234 DramC Write-DBI off
709 16:34:04.181293 DramC Read-DBI off
710 16:34:04.181357 Write Rank0 MR13 =0x59
711 16:34:04.181468 ==
712 16:34:04.181533 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
713 16:34:04.181599 fsp= 1, odt_onoff= 1, Byte mode= 0
714 16:34:04.181661 ==
715 16:34:04.181721 === u2Vref_new: 0x56 --> 0x2d
716 16:34:04.181782 === u2Vref_new: 0x58 --> 0x38
717 16:34:04.181855 === u2Vref_new: 0x5a --> 0x39
718 16:34:04.181954 === u2Vref_new: 0x5c --> 0x3c
719 16:34:04.182048 === u2Vref_new: 0x5e --> 0x3d
720 16:34:04.182144 === u2Vref_new: 0x60 --> 0xa0
721 16:34:04.182208 [CA 0] Center 34 (6~63) winsize 58
722 16:34:04.182269 [CA 1] Center 35 (7~63) winsize 57
723 16:34:04.182329 [CA 2] Center 28 (-1~58) winsize 60
724 16:34:04.182389 [CA 3] Center 24 (-4~52) winsize 57
725 16:34:04.182449 [CA 4] Center 25 (-3~53) winsize 57
726 16:34:04.182509 [CA 5] Center 30 (1~59) winsize 59
727 16:34:04.182569
728 16:34:04.182629 [CATrainingPosCal] consider 1 rank data
729 16:34:04.182689 u2DelayCellTimex100 = 744/100 ps
730 16:34:04.182749 CA0 delay=34 (6~63),Diff = 10 PI (13 cell)
731 16:34:04.182809 CA1 delay=35 (7~63),Diff = 11 PI (14 cell)
732 16:34:04.182869 CA2 delay=28 (-1~58),Diff = 4 PI (5 cell)
733 16:34:04.182929 CA3 delay=24 (-4~52),Diff = 0 PI (0 cell)
734 16:34:04.182988 CA4 delay=25 (-3~53),Diff = 1 PI (1 cell)
735 16:34:04.183048 CA5 delay=30 (1~59),Diff = 6 PI (7 cell)
736 16:34:04.183107
737 16:34:04.183166 CA PerBit enable=1, Macro0, CA PI delay=24
738 16:34:04.183227 === u2Vref_new: 0x5c --> 0x3c
739 16:34:04.183287
740 16:34:04.183346 Vref(ca) range 1: 28
741 16:34:04.183410
742 16:34:04.183490 CS Dly= 8 (39-0-32)
743 16:34:04.183551 Write Rank0 MR13 =0xd8
744 16:34:04.183612 Write Rank0 MR13 =0xd8
745 16:34:04.183672 Write Rank0 MR12 =0x5c
746 16:34:04.183732 Write Rank1 MR13 =0x59
747 16:34:04.183791 ==
748 16:34:04.184081 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
749 16:34:04.184152 fsp= 1, odt_onoff= 1, Byte mode= 0
750 16:34:04.184216 ==
751 16:34:04.184278 === u2Vref_new: 0x56 --> 0x2d
752 16:34:04.184340 === u2Vref_new: 0x58 --> 0x38
753 16:34:04.184400 === u2Vref_new: 0x5a --> 0x39
754 16:34:04.184460 === u2Vref_new: 0x5c --> 0x3c
755 16:34:04.184520 === u2Vref_new: 0x5e --> 0x3d
756 16:34:04.184596 === u2Vref_new: 0x60 --> 0xa0
757 16:34:04.184668 [CA 0] Center 35 (8~63) winsize 56
758 16:34:04.184729 [CA 1] Center 35 (7~63) winsize 57
759 16:34:04.184790 [CA 2] Center 28 (-1~58) winsize 60
760 16:34:04.184850 [CA 3] Center 23 (-5~51) winsize 57
761 16:34:04.184910 [CA 4] Center 23 (-5~52) winsize 58
762 16:34:04.184971 [CA 5] Center 29 (0~59) winsize 60
763 16:34:04.185048
764 16:34:04.185112 [CATrainingPosCal] consider 2 rank data
765 16:34:04.185173 u2DelayCellTimex100 = 744/100 ps
766 16:34:04.185234 CA0 delay=35 (8~63),Diff = 12 PI (15 cell)
767 16:34:04.185295 CA1 delay=35 (7~63),Diff = 12 PI (15 cell)
768 16:34:04.185355 CA2 delay=28 (-1~58),Diff = 5 PI (6 cell)
769 16:34:04.185415 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
770 16:34:04.185494 CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)
771 16:34:04.185556 CA5 delay=30 (1~59),Diff = 7 PI (9 cell)
772 16:34:04.185616
773 16:34:04.185676 CA PerBit enable=1, Macro0, CA PI delay=23
774 16:34:04.185737 === u2Vref_new: 0x5e --> 0x3d
775 16:34:04.185797
776 16:34:04.185857 Vref(ca) range 1: 30
777 16:34:04.185917
778 16:34:04.185976 CS Dly= 5 (36-0-32)
779 16:34:04.186036 Write Rank1 MR13 =0xd8
780 16:34:04.186096 Write Rank1 MR13 =0xd8
781 16:34:04.186155 Write Rank1 MR12 =0x5e
782 16:34:04.186215 [RankSwap] Rank num 2, (Multi 1), Rank 0
783 16:34:04.186275 Write Rank0 MR2 =0xad
784 16:34:04.186335 [Write Leveling]
785 16:34:04.186395 delay byte0 byte1 byte2 byte3
786 16:34:04.186455
787 16:34:04.186515 10 0 0
788 16:34:04.186576 11 0 0
789 16:34:04.186637 12 0 0
790 16:34:04.186698 13 0 0
791 16:34:04.186767 14 0 0
792 16:34:04.186852 15 0 0
793 16:34:04.186914 16 0 0
794 16:34:04.186975 17 0 0
795 16:34:04.187036 18 0 0
796 16:34:04.187124 19 0 0
797 16:34:04.187188 20 0 0
798 16:34:04.187249 21 0 0
799 16:34:04.187310 22 0 0
800 16:34:04.187370 23 0 0
801 16:34:04.187430 24 0 0
802 16:34:04.187491 25 0 0
803 16:34:04.187552 26 0 0
804 16:34:04.187612 27 0 0
805 16:34:04.187672 28 0 ff
806 16:34:04.187733 29 0 ff
807 16:34:04.187813 30 0 ff
808 16:34:04.187881 31 ff ff
809 16:34:04.187943 32 0 ff
810 16:34:04.188004 33 ff ff
811 16:34:04.188065 34 ff ff
812 16:34:04.188126 35 ff ff
813 16:34:04.188187 36 ff ff
814 16:34:04.188274 37 ff ff
815 16:34:04.188338 38 ff ff
816 16:34:04.188399 39 ff ff
817 16:34:04.188460 pass bytecount = 0xff (0xff: all bytes pass)
818 16:34:04.188520
819 16:34:04.188580 DQS0 dly: 33
820 16:34:04.188640 DQS1 dly: 28
821 16:34:04.188700 Write Rank0 MR2 =0x2d
822 16:34:04.188761 [RankSwap] Rank num 2, (Multi 1), Rank 0
823 16:34:04.188821 Write Rank0 MR1 =0xd6
824 16:34:04.188881 [Gating]
825 16:34:04.188941 ==
826 16:34:04.189001 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
827 16:34:04.189062 fsp= 1, odt_onoff= 1, Byte mode= 0
828 16:34:04.189122 ==
829 16:34:04.189182 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
830 16:34:04.189244 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
831 16:34:04.189306 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
832 16:34:04.189367 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
833 16:34:04.189433 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
834 16:34:04.189498 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
835 16:34:04.189559 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
836 16:34:04.189620 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
837 16:34:04.189681 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
838 16:34:04.189742 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
839 16:34:04.189802 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
840 16:34:04.189863 3 2 12 |1b1b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
841 16:34:04.189925 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
842 16:34:04.189985 3 2 20 |3534 1d1c |(11 11)(11 11) |(0 0)(0 0)| 0
843 16:34:04.190046 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
844 16:34:04.190124 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
845 16:34:04.190190 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
846 16:34:04.190252 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
847 16:34:04.190314 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
848 16:34:04.190375 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
849 16:34:04.190437 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
850 16:34:04.190498 [Byte 0] Lead/lag Transition tap number (1)
851 16:34:04.190559 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
852 16:34:04.190621 [Byte 1] Lead/lag falling Transition (3, 3, 20)
853 16:34:04.190681 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
854 16:34:04.190743 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
855 16:34:04.190835 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
856 16:34:04.190899 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
857 16:34:04.190961 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
858 16:34:04.191023 3 4 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
859 16:34:04.191083 3 4 16 |e0d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
860 16:34:04.191144 3 4 20 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
861 16:34:04.191205 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 16:34:04.191299 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 16:34:04.191363 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 16:34:04.191425 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 16:34:04.191486 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 16:34:04.191548 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 16:34:04.191610 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 16:34:04.191676 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 16:34:04.191754 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 16:34:04.191817 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
871 16:34:04.191878 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
872 16:34:04.192150 [Byte 0] Lead/lag falling Transition (3, 6, 0)
873 16:34:04.192219 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
874 16:34:04.192283 [Byte 1] Lead/lag falling Transition (3, 6, 4)
875 16:34:04.192345 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
876 16:34:04.192409 [Byte 0] Lead/lag Transition tap number (3)
877 16:34:04.192470 3 6 12 |605 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
878 16:34:04.192532 [Byte 1] Lead/lag Transition tap number (3)
879 16:34:04.192592 3 6 16 |4646 3a3a |(0 0)(11 11) |(0 0)(0 0)| 0
880 16:34:04.192654 [Byte 0]First pass (3, 6, 16)
881 16:34:04.192714 3 6 20 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
882 16:34:04.192776 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 16:34:04.192837 [Byte 1]First pass (3, 6, 24)
884 16:34:04.192897 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 16:34:04.192960 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 16:34:04.193021 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 16:34:04.193083 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 16:34:04.193144 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 16:34:04.193205 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
890 16:34:04.193267 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
891 16:34:04.193328 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
892 16:34:04.193444 All bytes gating window > 1UI, Early break!
893 16:34:04.193514
894 16:34:04.193576 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
895 16:34:04.193641
896 16:34:04.193700 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
897 16:34:04.193761
898 16:34:04.193820
899 16:34:04.193879
900 16:34:04.193938 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
901 16:34:04.193998
902 16:34:04.194058 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
903 16:34:04.194118
904 16:34:04.194177
905 16:34:04.194237 Write Rank0 MR1 =0x56
906 16:34:04.194297
907 16:34:04.194356 best RODT dly(2T, 0.5T) = (2, 3)
908 16:34:04.194416
909 16:34:04.194489 best RODT dly(2T, 0.5T) = (2, 3)
910 16:34:04.194563 ==
911 16:34:04.194624 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
912 16:34:04.194686 fsp= 1, odt_onoff= 1, Byte mode= 0
913 16:34:04.194747 ==
914 16:34:04.194807 Start DQ dly to find pass range UseTestEngine =0
915 16:34:04.194867 x-axis: bit #, y-axis: DQ dly (-127~63)
916 16:34:04.194941 RX Vref Scan = 0
917 16:34:04.195009 -26, [0] xxxxxxxx xxxxxxxx [MSB]
918 16:34:04.195075 -25, [0] xxxxxxxx xxxxxxxx [MSB]
919 16:34:04.195146 -24, [0] xxxxxxxx xxxxxxxx [MSB]
920 16:34:04.195227 -23, [0] xxxxxxxx xxxxxxxx [MSB]
921 16:34:04.195290 -22, [0] xxxxxxxx xxxxxxxx [MSB]
922 16:34:04.195351 -21, [0] xxxxxxxx xxxxxxxx [MSB]
923 16:34:04.195412 -20, [0] xxxxxxxx xxxxxxxx [MSB]
924 16:34:04.195473 -19, [0] xxxxxxxx xxxxxxxx [MSB]
925 16:34:04.195534 -18, [0] xxxxxxxx xxxxxxxx [MSB]
926 16:34:04.195595 -17, [0] xxxxxxxx xxxxxxxx [MSB]
927 16:34:04.195656 -16, [0] xxxxxxxx xxxxxxxx [MSB]
928 16:34:04.195717 -15, [0] xxxxxxxx xxxxxxxx [MSB]
929 16:34:04.195778 -14, [0] xxxxxxxx xxxxxxxx [MSB]
930 16:34:04.195838 -13, [0] xxxxxxxx xxxxxxxx [MSB]
931 16:34:04.195899 -12, [0] xxxxxxxx xxxxxxxx [MSB]
932 16:34:04.195960 -11, [0] xxxxxxxx xxxxxxxx [MSB]
933 16:34:04.196021 -10, [0] xxxxxxxx xxxxxxxx [MSB]
934 16:34:04.196083 -9, [0] xxxxxxxx xxxxxxxx [MSB]
935 16:34:04.196144 -8, [0] xxxxxxxx xxxxxxxx [MSB]
936 16:34:04.196205 -7, [0] xxxxxxxx xxxxxxxx [MSB]
937 16:34:04.196266 -6, [0] xxxxxxxx xxxxxxxx [MSB]
938 16:34:04.196327 -5, [0] xxxxxxxx xxxxxxxx [MSB]
939 16:34:04.196388 -4, [0] xxxxxxxx xxxxxxxx [MSB]
940 16:34:04.196449 -3, [0] xxxxxxxx oxxxxxxx [MSB]
941 16:34:04.196510 -2, [0] xxxoxxxx oxxoxxxx [MSB]
942 16:34:04.196571 -1, [0] xxxoxxxx oxxoxoxx [MSB]
943 16:34:04.196636 0, [0] xxxoxxxx ooxoxoxx [MSB]
944 16:34:04.196698 1, [0] xxxoxoxx ooxoooox [MSB]
945 16:34:04.196759 2, [0] xxxoxoox ooxoooox [MSB]
946 16:34:04.196821 3, [0] xxxoxoox ooxoooox [MSB]
947 16:34:04.196881 4, [0] xxxoxoox ooxoooox [MSB]
948 16:34:04.196942 5, [0] xxxooooo ooxooooo [MSB]
949 16:34:04.197003 6, [0] xxoooooo ooxooooo [MSB]
950 16:34:04.197090 32, [0] oooxoooo oooooooo [MSB]
951 16:34:04.197154 33, [0] oooxoooo xooooooo [MSB]
952 16:34:04.197216 34, [0] oooxoooo xooxoooo [MSB]
953 16:34:04.197276 35, [0] oooxoooo xxoxoooo [MSB]
954 16:34:04.197375 36, [0] oooxoxoo xxoxxoxo [MSB]
955 16:34:04.197478 37, [0] oooxoxxx xxoxxxxo [MSB]
956 16:34:04.197541 38, [0] oooxoxxx xxoxxxxo [MSB]
957 16:34:04.197603 39, [0] oooxoxxx xxoxxxxx [MSB]
958 16:34:04.197664 40, [0] oooxoxxx xxoxxxxx [MSB]
959 16:34:04.197726 41, [0] xxxxxxxx xxoxxxxx [MSB]
960 16:34:04.197804 42, [0] xxxxxxxx xxxxxxxx [MSB]
961 16:34:04.197890 iDelay=42, Bit 0, Center 23 (7 ~ 40) 34
962 16:34:04.197964 iDelay=42, Bit 1, Center 23 (7 ~ 40) 34
963 16:34:04.198025 iDelay=42, Bit 2, Center 23 (6 ~ 40) 35
964 16:34:04.198085 iDelay=42, Bit 3, Center 14 (-2 ~ 31) 34
965 16:34:04.198146 iDelay=42, Bit 4, Center 22 (5 ~ 40) 36
966 16:34:04.198207 iDelay=42, Bit 5, Center 18 (1 ~ 35) 35
967 16:34:04.198295 iDelay=42, Bit 6, Center 19 (2 ~ 36) 35
968 16:34:04.198357 iDelay=42, Bit 7, Center 20 (5 ~ 36) 32
969 16:34:04.198417 iDelay=42, Bit 8, Center 14 (-3 ~ 32) 36
970 16:34:04.198502 iDelay=42, Bit 9, Center 17 (0 ~ 34) 35
971 16:34:04.198565 iDelay=42, Bit 10, Center 24 (7 ~ 41) 35
972 16:34:04.198626 iDelay=42, Bit 11, Center 15 (-2 ~ 33) 36
973 16:34:04.198687 iDelay=42, Bit 12, Center 18 (1 ~ 35) 35
974 16:34:04.198747 iDelay=42, Bit 13, Center 17 (-1 ~ 36) 38
975 16:34:04.198807 iDelay=42, Bit 14, Center 18 (1 ~ 35) 35
976 16:34:04.198868 iDelay=42, Bit 15, Center 21 (5 ~ 38) 34
977 16:34:04.198927 ==
978 16:34:04.198988 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
979 16:34:04.199049 fsp= 1, odt_onoff= 1, Byte mode= 0
980 16:34:04.199110 ==
981 16:34:04.199171 DQS Delay:
982 16:34:04.199231 DQS0 = 0, DQS1 = 0
983 16:34:04.199290 DQM Delay:
984 16:34:04.199349 DQM0 = 20, DQM1 = 18
985 16:34:04.199409 DQ Delay:
986 16:34:04.199468 DQ0 =23, DQ1 =23, DQ2 =23, DQ3 =14
987 16:34:04.199529 DQ4 =22, DQ5 =18, DQ6 =19, DQ7 =20
988 16:34:04.199589 DQ8 =14, DQ9 =17, DQ10 =24, DQ11 =15
989 16:34:04.199649 DQ12 =18, DQ13 =17, DQ14 =18, DQ15 =21
990 16:34:04.199709
991 16:34:04.199769
992 16:34:04.199829 DramC Write-DBI off
993 16:34:04.199889 ==
994 16:34:04.199989 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
995 16:34:04.200052 fsp= 1, odt_onoff= 1, Byte mode= 0
996 16:34:04.200113 ==
997 16:34:04.200174 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
998 16:34:04.200234
999 16:34:04.200507 Begin, DQ Scan Range 924~1180
1000 16:34:04.200579
1001 16:34:04.200640
1002 16:34:04.200701 TX Vref Scan disable
1003 16:34:04.200762 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1004 16:34:04.200825 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1005 16:34:04.200887 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1006 16:34:04.200949 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1007 16:34:04.201010 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1008 16:34:04.201086 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1009 16:34:04.201161 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1010 16:34:04.201223 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1011 16:34:04.201285 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1012 16:34:04.201346 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1013 16:34:04.201460 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1014 16:34:04.201527 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1015 16:34:04.201590 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1016 16:34:04.201652 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1017 16:34:04.201714 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1018 16:34:04.201776 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1019 16:34:04.201838 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1020 16:34:04.201914 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1021 16:34:04.201988 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1022 16:34:04.202051 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1023 16:34:04.202112 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1024 16:34:04.202174 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1025 16:34:04.202242 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1026 16:34:04.202307 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1027 16:34:04.202369 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1028 16:34:04.202431 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1029 16:34:04.202523 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1030 16:34:04.202585 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1031 16:34:04.202646 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1032 16:34:04.202708 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1033 16:34:04.202768 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1034 16:34:04.202829 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1035 16:34:04.202923 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1036 16:34:04.202987 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1037 16:34:04.203049 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1038 16:34:04.203109 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1039 16:34:04.203170 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1040 16:34:04.203231 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1041 16:34:04.203292 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1042 16:34:04.203353 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1043 16:34:04.203414 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1044 16:34:04.203474 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1045 16:34:04.203535 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1046 16:34:04.203597 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1047 16:34:04.203657 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1048 16:34:04.203718 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1049 16:34:04.203779 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
1050 16:34:04.203840 971 |3 6 11|[0] xxxxxxxx ooxoxxxx [MSB]
1051 16:34:04.203900 972 |3 6 12|[0] xxxxxxxx ooxoxxxx [MSB]
1052 16:34:04.203960 973 |3 6 13|[0] xxxxxxxx ooxoooxx [MSB]
1053 16:34:04.204021 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1054 16:34:04.204082 975 |3 6 15|[0] xxxxxxxx ooxoooox [MSB]
1055 16:34:04.204143 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1056 16:34:04.204203 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1057 16:34:04.204264 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
1058 16:34:04.204324 979 |3 6 19|[0] xxxoxoox oooooooo [MSB]
1059 16:34:04.204406 980 |3 6 20|[0] xxxooooo oooooooo [MSB]
1060 16:34:04.204470 981 |3 6 21|[0] xoxooooo oooooooo [MSB]
1061 16:34:04.204531 982 |3 6 22|[0] xooooooo oooooooo [MSB]
1062 16:34:04.204592 991 |3 6 31|[0] oooooooo oooxoooo [MSB]
1063 16:34:04.204653 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1064 16:34:04.204714 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1065 16:34:04.204774 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1066 16:34:04.204835 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
1067 16:34:04.204896 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1068 16:34:04.204957 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
1069 16:34:04.205018 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
1070 16:34:04.205104 999 |3 6 39|[0] oooxoxoo xxxxxxxx [MSB]
1071 16:34:04.205167 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1072 16:34:04.205229 Byte0, DQ PI dly=989, DQM PI dly= 989
1073 16:34:04.205289 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
1074 16:34:04.205351
1075 16:34:04.205410 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
1076 16:34:04.205486
1077 16:34:04.205546 Byte1, DQ PI dly=981, DQM PI dly= 981
1078 16:34:04.205607 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1079 16:34:04.205667
1080 16:34:04.205726 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1081 16:34:04.205787
1082 16:34:04.205846 ==
1083 16:34:04.205905 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1084 16:34:04.205965 fsp= 1, odt_onoff= 1, Byte mode= 0
1085 16:34:04.206024 ==
1086 16:34:04.206083 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1087 16:34:04.206142
1088 16:34:04.206202 Begin, DQ Scan Range 957~1021
1089 16:34:04.206261 Write Rank0 MR14 =0x0
1090 16:34:04.206320
1091 16:34:04.206379 CH=0, VrefRange= 0, VrefLevel = 0
1092 16:34:04.206439 TX Bit0 (985~996) 12 990, Bit8 (972~986) 15 979,
1093 16:34:04.206499 TX Bit1 (984~996) 13 990, Bit9 (974~988) 15 981,
1094 16:34:04.206559 TX Bit2 (985~997) 13 991, Bit10 (979~992) 14 985,
1095 16:34:04.206619 TX Bit3 (978~992) 15 985, Bit11 (973~985) 13 979,
1096 16:34:04.206679 TX Bit4 (983~994) 12 988, Bit12 (976~985) 10 980,
1097 16:34:04.206739 TX Bit5 (980~993) 14 986, Bit13 (976~986) 11 981,
1098 16:34:04.206798 TX Bit6 (981~993) 13 987, Bit14 (977~990) 14 983,
1099 16:34:04.206858 TX Bit7 (984~995) 12 989, Bit15 (977~992) 16 984,
1100 16:34:04.206918
1101 16:34:04.206977 Write Rank0 MR14 =0x2
1102 16:34:04.207036
1103 16:34:04.207094 CH=0, VrefRange= 0, VrefLevel = 2
1104 16:34:04.207154 TX Bit0 (984~997) 14 990, Bit8 (971~987) 17 979,
1105 16:34:04.207213 TX Bit1 (983~997) 15 990, Bit9 (974~989) 16 981,
1106 16:34:04.207273 TX Bit2 (984~998) 15 991, Bit10 (978~992) 15 985,
1107 16:34:04.207332 TX Bit3 (978~992) 15 985, Bit11 (972~986) 15 979,
1108 16:34:04.207602 TX Bit4 (983~995) 13 989, Bit12 (975~987) 13 981,
1109 16:34:04.207669 TX Bit5 (979~993) 15 986, Bit13 (976~987) 12 981,
1110 16:34:04.207732 TX Bit6 (980~994) 15 987, Bit14 (976~990) 15 983,
1111 16:34:04.207793 TX Bit7 (983~996) 14 989, Bit15 (978~993) 16 985,
1112 16:34:04.207854
1113 16:34:04.207912 Write Rank0 MR14 =0x4
1114 16:34:04.207972
1115 16:34:04.208043 CH=0, VrefRange= 0, VrefLevel = 4
1116 16:34:04.208113 TX Bit0 (984~998) 15 991, Bit8 (970~988) 19 979,
1117 16:34:04.208174 TX Bit1 (983~998) 16 990, Bit9 (973~989) 17 981,
1118 16:34:04.208234 TX Bit2 (984~999) 16 991, Bit10 (977~993) 17 985,
1119 16:34:04.208295 TX Bit3 (978~992) 15 985, Bit11 (972~987) 16 979,
1120 16:34:04.208355 TX Bit4 (982~996) 15 989, Bit12 (975~989) 15 982,
1121 16:34:04.208414 TX Bit5 (979~994) 16 986, Bit13 (975~988) 14 981,
1122 16:34:04.208474 TX Bit6 (980~994) 15 987, Bit14 (976~990) 15 983,
1123 16:34:04.208534 TX Bit7 (982~997) 16 989, Bit15 (977~994) 18 985,
1124 16:34:04.208594
1125 16:34:04.208653 Write Rank0 MR14 =0x6
1126 16:34:04.208713
1127 16:34:04.208772 CH=0, VrefRange= 0, VrefLevel = 6
1128 16:34:04.208832 TX Bit0 (984~999) 16 991, Bit8 (970~989) 20 979,
1129 16:34:04.208893 TX Bit1 (982~999) 18 990, Bit9 (973~990) 18 981,
1130 16:34:04.208952 TX Bit2 (984~999) 16 991, Bit10 (977~995) 19 986,
1131 16:34:04.209012 TX Bit3 (977~993) 17 985, Bit11 (972~988) 17 980,
1132 16:34:04.209072 TX Bit4 (982~996) 15 989, Bit12 (975~989) 15 982,
1133 16:34:04.209131 TX Bit5 (979~995) 17 987, Bit13 (975~989) 15 982,
1134 16:34:04.209190 TX Bit6 (980~995) 16 987, Bit14 (975~991) 17 983,
1135 16:34:04.209250 TX Bit7 (983~998) 16 990, Bit15 (977~995) 19 986,
1136 16:34:04.209309
1137 16:34:04.209368 Write Rank0 MR14 =0x8
1138 16:34:04.209426
1139 16:34:04.209498 CH=0, VrefRange= 0, VrefLevel = 8
1140 16:34:04.209557 TX Bit0 (984~999) 16 991, Bit8 (970~989) 20 979,
1141 16:34:04.209618 TX Bit1 (982~999) 18 990, Bit9 (972~990) 19 981,
1142 16:34:04.209678 TX Bit2 (983~999) 17 991, Bit10 (977~996) 20 986,
1143 16:34:04.209738 TX Bit3 (977~993) 17 985, Bit11 (971~988) 18 979,
1144 16:34:04.209798 TX Bit4 (982~998) 17 990, Bit12 (974~989) 16 981,
1145 16:34:04.209857 TX Bit5 (978~995) 18 986, Bit13 (974~989) 16 981,
1146 16:34:04.209917 TX Bit6 (979~996) 18 987, Bit14 (976~992) 17 984,
1147 16:34:04.209977 TX Bit7 (982~999) 18 990, Bit15 (977~996) 20 986,
1148 16:34:04.210036
1149 16:34:04.210096 Write Rank0 MR14 =0xa
1150 16:34:04.210154
1151 16:34:04.210213 CH=0, VrefRange= 0, VrefLevel = 10
1152 16:34:04.210273 TX Bit0 (984~1000) 17 992, Bit8 (970~990) 21 980,
1153 16:34:04.210333 TX Bit1 (981~1000) 20 990, Bit9 (972~990) 19 981,
1154 16:34:04.210392 TX Bit2 (983~1000) 18 991, Bit10 (977~996) 20 986,
1155 16:34:04.210451 TX Bit3 (977~994) 18 985, Bit11 (971~989) 19 980,
1156 16:34:04.210511 TX Bit4 (982~998) 17 990, Bit12 (974~990) 17 982,
1157 16:34:04.210571 TX Bit5 (978~996) 19 987, Bit13 (974~989) 16 981,
1158 16:34:04.210630 TX Bit6 (978~997) 20 987, Bit14 (974~992) 19 983,
1159 16:34:04.210690 TX Bit7 (981~999) 19 990, Bit15 (977~996) 20 986,
1160 16:34:04.210749
1161 16:34:04.210807 Write Rank0 MR14 =0xc
1162 16:34:04.210866
1163 16:34:04.210924 CH=0, VrefRange= 0, VrefLevel = 12
1164 16:34:04.210993 TX Bit0 (983~1000) 18 991, Bit8 (969~990) 22 979,
1165 16:34:04.211055 TX Bit1 (981~1000) 20 990, Bit9 (971~991) 21 981,
1166 16:34:04.211115 TX Bit2 (983~1000) 18 991, Bit10 (977~997) 21 987,
1167 16:34:04.211175 TX Bit3 (977~994) 18 985, Bit11 (970~989) 20 979,
1168 16:34:04.211235 TX Bit4 (981~999) 19 990, Bit12 (973~990) 18 981,
1169 16:34:04.211294 TX Bit5 (978~997) 20 987, Bit13 (974~990) 17 982,
1170 16:34:04.211354 TX Bit6 (978~998) 21 988, Bit14 (974~993) 20 983,
1171 16:34:04.211413 TX Bit7 (981~1000) 20 990, Bit15 (976~997) 22 986,
1172 16:34:04.211473
1173 16:34:04.211532 Write Rank0 MR14 =0xe
1174 16:34:04.211592
1175 16:34:04.211650 CH=0, VrefRange= 0, VrefLevel = 14
1176 16:34:04.211710 TX Bit0 (983~1000) 18 991, Bit8 (969~990) 22 979,
1177 16:34:04.211771 TX Bit1 (981~1000) 20 990, Bit9 (972~991) 20 981,
1178 16:34:04.211831 TX Bit2 (983~1001) 19 992, Bit10 (976~997) 22 986,
1179 16:34:04.211890 TX Bit3 (976~994) 19 985, Bit11 (970~990) 21 980,
1180 16:34:04.211950 TX Bit4 (980~999) 20 989, Bit12 (973~990) 18 981,
1181 16:34:04.212009 TX Bit5 (978~998) 21 988, Bit13 (973~990) 18 981,
1182 16:34:04.212069 TX Bit6 (978~999) 22 988, Bit14 (973~993) 21 983,
1183 16:34:04.212128 TX Bit7 (980~1000) 21 990, Bit15 (976~997) 22 986,
1184 16:34:04.212188
1185 16:34:04.212247 Write Rank0 MR14 =0x10
1186 16:34:04.212306
1187 16:34:04.212365 CH=0, VrefRange= 0, VrefLevel = 16
1188 16:34:04.212424 TX Bit0 (983~1001) 19 992, Bit8 (969~991) 23 980,
1189 16:34:04.212484 TX Bit1 (980~1001) 22 990, Bit9 (971~992) 22 981,
1190 16:34:04.212544 TX Bit2 (982~1001) 20 991, Bit10 (976~998) 23 987,
1191 16:34:04.212604 TX Bit3 (976~995) 20 985, Bit11 (970~990) 21 980,
1192 16:34:04.212663 TX Bit4 (979~1000) 22 989, Bit12 (973~991) 19 982,
1193 16:34:04.212723 TX Bit5 (978~998) 21 988, Bit13 (973~991) 19 982,
1194 16:34:04.212782 TX Bit6 (978~1000) 23 989, Bit14 (973~994) 22 983,
1195 16:34:04.212842 TX Bit7 (980~1001) 22 990, Bit15 (976~997) 22 986,
1196 16:34:04.212901
1197 16:34:04.212961 Write Rank0 MR14 =0x12
1198 16:34:04.213021
1199 16:34:04.213081 CH=0, VrefRange= 0, VrefLevel = 18
1200 16:34:04.213141 TX Bit0 (983~1001) 19 992, Bit8 (969~991) 23 980,
1201 16:34:04.213202 TX Bit1 (980~1001) 22 990, Bit9 (970~992) 23 981,
1202 16:34:04.213308 TX Bit2 (982~1001) 20 991, Bit10 (976~998) 23 987,
1203 16:34:04.213415 TX Bit3 (976~996) 21 986, Bit11 (970~990) 21 980,
1204 16:34:04.213495 TX Bit4 (979~1000) 22 989, Bit12 (972~991) 20 981,
1205 16:34:04.213557 TX Bit5 (978~998) 21 988, Bit13 (973~991) 19 982,
1206 16:34:04.213618 TX Bit6 (978~1000) 23 989, Bit14 (973~995) 23 984,
1207 16:34:04.213887 TX Bit7 (980~1001) 22 990, Bit15 (975~997) 23 986,
1208 16:34:04.213955
1209 16:34:04.214017 Write Rank0 MR14 =0x14
1210 16:34:04.214077
1211 16:34:04.214137 CH=0, VrefRange= 0, VrefLevel = 20
1212 16:34:04.214197 TX Bit0 (983~1002) 20 992, Bit8 (969~992) 24 980,
1213 16:34:04.214257 TX Bit1 (980~1001) 22 990, Bit9 (970~993) 24 981,
1214 16:34:04.214317 TX Bit2 (981~1002) 22 991, Bit10 (976~998) 23 987,
1215 16:34:04.214377 TX Bit3 (976~996) 21 986, Bit11 (969~991) 23 980,
1216 16:34:04.214437 TX Bit4 (979~1000) 22 989, Bit12 (972~992) 21 982,
1217 16:34:04.214497 TX Bit5 (977~999) 23 988, Bit13 (972~992) 21 982,
1218 16:34:04.214557 TX Bit6 (978~1000) 23 989, Bit14 (973~995) 23 984,
1219 16:34:04.214617 TX Bit7 (979~1001) 23 990, Bit15 (975~998) 24 986,
1220 16:34:04.214676
1221 16:34:04.214735 Write Rank0 MR14 =0x16
1222 16:34:04.214795
1223 16:34:04.214854 CH=0, VrefRange= 0, VrefLevel = 22
1224 16:34:04.214914 TX Bit0 (982~1002) 21 992, Bit8 (968~992) 25 980,
1225 16:34:04.215000 TX Bit1 (979~1002) 24 990, Bit9 (970~993) 24 981,
1226 16:34:04.215063 TX Bit2 (981~1002) 22 991, Bit10 (976~998) 23 987,
1227 16:34:04.215124 TX Bit3 (976~997) 22 986, Bit11 (969~991) 23 980,
1228 16:34:04.215184 TX Bit4 (979~1001) 23 990, Bit12 (971~992) 22 981,
1229 16:34:04.215244 TX Bit5 (977~999) 23 988, Bit13 (971~992) 22 981,
1230 16:34:04.215304 TX Bit6 (978~1001) 24 989, Bit14 (972~996) 25 984,
1231 16:34:04.215364 TX Bit7 (979~1002) 24 990, Bit15 (975~998) 24 986,
1232 16:34:04.215424
1233 16:34:04.215483 Write Rank0 MR14 =0x18
1234 16:34:04.215542
1235 16:34:04.215601 CH=0, VrefRange= 0, VrefLevel = 24
1236 16:34:04.215661 TX Bit0 (982~1003) 22 992, Bit8 (968~992) 25 980,
1237 16:34:04.215721 TX Bit1 (979~1002) 24 990, Bit9 (970~993) 24 981,
1238 16:34:04.215781 TX Bit2 (980~1003) 24 991, Bit10 (975~999) 25 987,
1239 16:34:04.215841 TX Bit3 (976~998) 23 987, Bit11 (969~992) 24 980,
1240 16:34:04.215901 TX Bit4 (978~1001) 24 989, Bit12 (971~993) 23 982,
1241 16:34:04.215960 TX Bit5 (977~1000) 24 988, Bit13 (972~992) 21 982,
1242 16:34:04.216020 TX Bit6 (978~1001) 24 989, Bit14 (972~996) 25 984,
1243 16:34:04.216080 TX Bit7 (979~1002) 24 990, Bit15 (975~998) 24 986,
1244 16:34:04.216139
1245 16:34:04.216198 Write Rank0 MR14 =0x1a
1246 16:34:04.216258
1247 16:34:04.216317 CH=0, VrefRange= 0, VrefLevel = 26
1248 16:34:04.216376 TX Bit0 (980~1003) 24 991, Bit8 (968~992) 25 980,
1249 16:34:04.216435 TX Bit1 (979~1003) 25 991, Bit9 (969~994) 26 981,
1250 16:34:04.216495 TX Bit2 (980~1003) 24 991, Bit10 (975~999) 25 987,
1251 16:34:04.216555 TX Bit3 (975~998) 24 986, Bit11 (969~992) 24 980,
1252 16:34:04.216614 TX Bit4 (978~1002) 25 990, Bit12 (970~994) 25 982,
1253 16:34:04.216674 TX Bit5 (977~1000) 24 988, Bit13 (971~994) 24 982,
1254 16:34:04.216733 TX Bit6 (977~1001) 25 989, Bit14 (972~997) 26 984,
1255 16:34:04.216792 TX Bit7 (979~1003) 25 991, Bit15 (974~999) 26 986,
1256 16:34:04.216851
1257 16:34:04.216910 Write Rank0 MR14 =0x1c
1258 16:34:04.216969
1259 16:34:04.217028 CH=0, VrefRange= 0, VrefLevel = 28
1260 16:34:04.217088 TX Bit0 (980~1003) 24 991, Bit8 (968~991) 24 979,
1261 16:34:04.217148 TX Bit1 (979~1003) 25 991, Bit9 (969~994) 26 981,
1262 16:34:04.217208 TX Bit2 (979~1004) 26 991, Bit10 (975~999) 25 987,
1263 16:34:04.217268 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
1264 16:34:04.217327 TX Bit4 (978~1002) 25 990, Bit12 (970~994) 25 982,
1265 16:34:04.217388 TX Bit5 (977~1000) 24 988, Bit13 (970~994) 25 982,
1266 16:34:04.217457 TX Bit6 (978~1001) 24 989, Bit14 (971~997) 27 984,
1267 16:34:04.217519 TX Bit7 (978~1003) 26 990, Bit15 (974~999) 26 986,
1268 16:34:04.217578
1269 16:34:04.217638 Write Rank0 MR14 =0x1e
1270 16:34:04.217697
1271 16:34:04.217756 CH=0, VrefRange= 0, VrefLevel = 30
1272 16:34:04.217815 TX Bit0 (980~1005) 26 992, Bit8 (968~991) 24 979,
1273 16:34:04.217875 TX Bit1 (979~1003) 25 991, Bit9 (969~994) 26 981,
1274 16:34:04.217935 TX Bit2 (980~1005) 26 992, Bit10 (975~999) 25 987,
1275 16:34:04.217994 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
1276 16:34:04.218054 TX Bit4 (978~1003) 26 990, Bit12 (970~995) 26 982,
1277 16:34:04.218113 TX Bit5 (977~1000) 24 988, Bit13 (970~995) 26 982,
1278 16:34:04.218173 TX Bit6 (978~1001) 24 989, Bit14 (970~997) 28 983,
1279 16:34:04.218233 TX Bit7 (978~1004) 27 991, Bit15 (974~999) 26 986,
1280 16:34:04.218292
1281 16:34:04.218351 Write Rank0 MR14 =0x20
1282 16:34:04.218410
1283 16:34:04.218493 CH=0, VrefRange= 0, VrefLevel = 32
1284 16:34:04.218556 TX Bit0 (980~1005) 26 992, Bit8 (968~991) 24 979,
1285 16:34:04.218617 TX Bit1 (979~1003) 25 991, Bit9 (969~994) 26 981,
1286 16:34:04.218678 TX Bit2 (980~1005) 26 992, Bit10 (975~999) 25 987,
1287 16:34:04.218738 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
1288 16:34:04.218797 TX Bit4 (978~1003) 26 990, Bit12 (970~995) 26 982,
1289 16:34:04.218857 TX Bit5 (977~1000) 24 988, Bit13 (970~995) 26 982,
1290 16:34:04.218917 TX Bit6 (978~1001) 24 989, Bit14 (970~997) 28 983,
1291 16:34:04.218999 TX Bit7 (978~1004) 27 991, Bit15 (974~999) 26 986,
1292 16:34:04.219091
1293 16:34:04.219163 Write Rank0 MR14 =0x22
1294 16:34:04.219223
1295 16:34:04.219282 CH=0, VrefRange= 0, VrefLevel = 34
1296 16:34:04.219342 TX Bit0 (980~1005) 26 992, Bit8 (968~991) 24 979,
1297 16:34:04.219402 TX Bit1 (979~1003) 25 991, Bit9 (969~994) 26 981,
1298 16:34:04.219461 TX Bit2 (980~1005) 26 992, Bit10 (975~999) 25 987,
1299 16:34:04.219520 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
1300 16:34:04.219579 TX Bit4 (978~1003) 26 990, Bit12 (970~995) 26 982,
1301 16:34:04.219638 TX Bit5 (977~1000) 24 988, Bit13 (970~995) 26 982,
1302 16:34:04.219698 TX Bit6 (978~1001) 24 989, Bit14 (970~997) 28 983,
1303 16:34:04.219757 TX Bit7 (978~1004) 27 991, Bit15 (974~999) 26 986,
1304 16:34:04.219816
1305 16:34:04.219874
1306 16:34:04.219933 TX Vref found, early break! 387< 388
1307 16:34:04.219992 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
1308 16:34:04.220261 u1DelayCellOfst[0]=6 cells (5 PI)
1309 16:34:04.220332 u1DelayCellOfst[1]=5 cells (4 PI)
1310 16:34:04.220392 u1DelayCellOfst[2]=6 cells (5 PI)
1311 16:34:04.220451 u1DelayCellOfst[3]=0 cells (0 PI)
1312 16:34:04.220510 u1DelayCellOfst[4]=3 cells (3 PI)
1313 16:34:04.220569 u1DelayCellOfst[5]=1 cells (1 PI)
1314 16:34:04.220627 u1DelayCellOfst[6]=2 cells (2 PI)
1315 16:34:04.220686 u1DelayCellOfst[7]=5 cells (4 PI)
1316 16:34:04.220745 Byte0, DQ PI dly=987, DQM PI dly= 989
1317 16:34:04.220805 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
1318 16:34:04.220864
1319 16:34:04.220922 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
1320 16:34:04.220982
1321 16:34:04.221040 u1DelayCellOfst[8]=0 cells (0 PI)
1322 16:34:04.221100 u1DelayCellOfst[9]=2 cells (2 PI)
1323 16:34:04.221158 u1DelayCellOfst[10]=10 cells (8 PI)
1324 16:34:04.221217 u1DelayCellOfst[11]=2 cells (2 PI)
1325 16:34:04.221276 u1DelayCellOfst[12]=3 cells (3 PI)
1326 16:34:04.221335 u1DelayCellOfst[13]=3 cells (3 PI)
1327 16:34:04.221394 u1DelayCellOfst[14]=5 cells (4 PI)
1328 16:34:04.221468 u1DelayCellOfst[15]=9 cells (7 PI)
1329 16:34:04.221552 Byte1, DQ PI dly=979, DQM PI dly= 983
1330 16:34:04.221615 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1331 16:34:04.221675
1332 16:34:04.221735 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1333 16:34:04.221796
1334 16:34:04.221854 Write Rank0 MR14 =0x1e
1335 16:34:04.221914
1336 16:34:04.221972 Final TX Range 0 Vref 30
1337 16:34:04.222031
1338 16:34:04.222089 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1339 16:34:04.222148
1340 16:34:04.222206 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1341 16:34:04.222265 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1342 16:34:04.222324 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1343 16:34:04.222382 Write Rank0 MR3 =0xb0
1344 16:34:04.222441 DramC Write-DBI on
1345 16:34:04.222498 ==
1346 16:34:04.222558 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1347 16:34:04.222617 fsp= 1, odt_onoff= 1, Byte mode= 0
1348 16:34:04.222675 ==
1349 16:34:04.222733 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1350 16:34:04.222792
1351 16:34:04.222850 Begin, DQ Scan Range 703~767
1352 16:34:04.222913
1353 16:34:04.222980
1354 16:34:04.223039 TX Vref Scan disable
1355 16:34:04.223098 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1356 16:34:04.223159 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1357 16:34:04.223219 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1358 16:34:04.223279 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1359 16:34:04.223339 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1360 16:34:04.223399 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1361 16:34:04.223459 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1362 16:34:04.223519 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1363 16:34:04.223579 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1364 16:34:04.223638 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1365 16:34:04.223698 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1366 16:34:04.223758 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1367 16:34:04.223819 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1368 16:34:04.223878 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1369 16:34:04.223938 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1370 16:34:04.223997 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1371 16:34:04.224058 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1372 16:34:04.224118 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
1373 16:34:04.224178 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
1374 16:34:04.224238 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1375 16:34:04.224297 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1376 16:34:04.224357 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1377 16:34:04.224416 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1378 16:34:04.224475 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1379 16:34:04.224535 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
1380 16:34:04.224595 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
1381 16:34:04.224655 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
1382 16:34:04.224715 749 |2 6 45|[0] xxxxxxxx xxxxxxxx [MSB]
1383 16:34:04.224774 Byte0, DQ PI dly=735, DQM PI dly= 735
1384 16:34:04.224833 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
1385 16:34:04.224892
1386 16:34:04.224951 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
1387 16:34:04.225011
1388 16:34:04.225069 Byte1, DQ PI dly=726, DQM PI dly= 726
1389 16:34:04.225128 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 22)
1390 16:34:04.225206
1391 16:34:04.225269 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 22)
1392 16:34:04.225329
1393 16:34:04.225388 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1394 16:34:04.225459 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1395 16:34:04.225521 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1396 16:34:04.225580 Write Rank0 MR3 =0x30
1397 16:34:04.225639 DramC Write-DBI off
1398 16:34:04.225698
1399 16:34:04.225756 [DATLAT]
1400 16:34:04.225815 Freq=1600, CH0 RK0, use_rxtx_scan=0
1401 16:34:04.225873
1402 16:34:04.225931 DATLAT Default: 0xf
1403 16:34:04.225989 7, 0xFFFF, sum=0
1404 16:34:04.226048 8, 0xFFFF, sum=0
1405 16:34:04.226108 9, 0xFFFF, sum=0
1406 16:34:04.226168 10, 0xFFFF, sum=0
1407 16:34:04.226227 11, 0xFFFF, sum=0
1408 16:34:04.226286 12, 0xFFFF, sum=0
1409 16:34:04.226346 13, 0xFFFF, sum=0
1410 16:34:04.226406 14, 0x0, sum=1
1411 16:34:04.226466 15, 0x0, sum=2
1412 16:34:04.226525 16, 0x0, sum=3
1413 16:34:04.226585 17, 0x0, sum=4
1414 16:34:04.226643 pattern=2 first_step=14 total pass=5 best_step=16
1415 16:34:04.226702 ==
1416 16:34:04.226761 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1417 16:34:04.226820 fsp= 1, odt_onoff= 1, Byte mode= 0
1418 16:34:04.226880 ==
1419 16:34:04.226938 Start DQ dly to find pass range UseTestEngine =1
1420 16:34:04.226997 x-axis: bit #, y-axis: DQ dly (-127~63)
1421 16:34:04.227056 RX Vref Scan = 1
1422 16:34:04.227115
1423 16:34:04.227173 RX Vref found, early break!
1424 16:34:04.227231
1425 16:34:04.227289 Final RX Vref 11, apply to both rank0 and 1
1426 16:34:04.227348 ==
1427 16:34:04.227406 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1428 16:34:04.227465 fsp= 1, odt_onoff= 1, Byte mode= 0
1429 16:34:04.227523 ==
1430 16:34:04.227581 DQS Delay:
1431 16:34:04.227640 DQS0 = 0, DQS1 = 0
1432 16:34:04.227698 DQM Delay:
1433 16:34:04.227756 DQM0 = 19, DQM1 = 17
1434 16:34:04.227814 DQ Delay:
1435 16:34:04.227872 DQ0 =22, DQ1 =22, DQ2 =23, DQ3 =14
1436 16:34:04.227931 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =20
1437 16:34:04.227990 DQ8 =13, DQ9 =17, DQ10 =23, DQ11 =15
1438 16:34:04.228049 DQ12 =17, DQ13 =16, DQ14 =18, DQ15 =20
1439 16:34:04.228107
1440 16:34:04.228377
1441 16:34:04.228444
1442 16:34:04.228549 [DramC_TX_OE_Calibration] TA2
1443 16:34:04.228628 Original DQ_B0 (3 6) =30, OEN = 27
1444 16:34:04.228690 Original DQ_B1 (3 6) =30, OEN = 27
1445 16:34:04.228750 23, 0x0, End_B0=23 End_B1=23
1446 16:34:04.228811 24, 0x0, End_B0=24 End_B1=24
1447 16:34:04.228871 25, 0x0, End_B0=25 End_B1=25
1448 16:34:04.228942 26, 0x0, End_B0=26 End_B1=26
1449 16:34:04.229011 27, 0x0, End_B0=27 End_B1=27
1450 16:34:04.229072 28, 0x0, End_B0=28 End_B1=28
1451 16:34:04.229132 29, 0x0, End_B0=29 End_B1=29
1452 16:34:04.229192 30, 0x0, End_B0=30 End_B1=30
1453 16:34:04.229253 31, 0xFFFF, End_B0=30 End_B1=30
1454 16:34:04.229314 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1455 16:34:04.229374 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1456 16:34:04.229443
1457 16:34:04.229504
1458 16:34:04.229562 Write Rank0 MR23 =0x3f
1459 16:34:04.229621 [DQSOSC]
1460 16:34:04.229680 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
1461 16:34:04.229740 CH0_RK0: MR19=0x202, MR18=0xC0C0, DQSOSC=447, MR23=63, INC=12, DEC=18
1462 16:34:04.229800 Write Rank0 MR23 =0x3f
1463 16:34:04.229858 [DQSOSC]
1464 16:34:04.229917 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
1465 16:34:04.229976 CH0 RK0: MR19=202, MR18=C0C0
1466 16:34:04.230035 [RankSwap] Rank num 2, (Multi 1), Rank 1
1467 16:34:04.230094 Write Rank0 MR2 =0xad
1468 16:34:04.230152 [Write Leveling]
1469 16:34:04.230210 delay byte0 byte1 byte2 byte3
1470 16:34:04.230269
1471 16:34:04.230326 10 0 0
1472 16:34:04.230386 11 0 0
1473 16:34:04.230446 12 0 0
1474 16:34:04.230505 13 0 0
1475 16:34:04.230563 14 0 0
1476 16:34:04.230622 15 0 0
1477 16:34:04.230682 16 0 0
1478 16:34:04.230741 17 0 0
1479 16:34:04.230800 18 0 0
1480 16:34:04.230858 19 0 0
1481 16:34:04.230917 20 0 0
1482 16:34:04.230976 21 0 0
1483 16:34:04.231035 22 0 0
1484 16:34:04.231096 23 0 0
1485 16:34:04.231187 24 0 0
1486 16:34:04.231247 25 0 ff
1487 16:34:04.231307 26 0 0
1488 16:34:04.231367 27 0 ff
1489 16:34:04.231427 28 0 ff
1490 16:34:04.231485 29 ff ff
1491 16:34:04.231545 30 ff ff
1492 16:34:04.231606 31 ff ff
1493 16:34:04.231665 32 ff ff
1494 16:34:04.231748 33 ff ff
1495 16:34:04.231812 34 ff ff
1496 16:34:04.231873 35 ff ff
1497 16:34:04.231933 pass bytecount = 0xff (0xff: all bytes pass)
1498 16:34:04.231992
1499 16:34:04.232051 DQS0 dly: 29
1500 16:34:04.232110 DQS1 dly: 27
1501 16:34:04.232168 Write Rank0 MR2 =0x2d
1502 16:34:04.232227 [RankSwap] Rank num 2, (Multi 1), Rank 0
1503 16:34:04.232287 Write Rank1 MR1 =0xd6
1504 16:34:04.232345 [Gating]
1505 16:34:04.232402 ==
1506 16:34:04.232461 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1507 16:34:04.232520 fsp= 1, odt_onoff= 1, Byte mode= 0
1508 16:34:04.232579 ==
1509 16:34:04.232638 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1510 16:34:04.232698 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1511 16:34:04.232758 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1512 16:34:04.232818 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1513 16:34:04.232879 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
1514 16:34:04.232938 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1515 16:34:04.232999 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1516 16:34:04.233059 [Byte 0] Lead/lag falling Transition (3, 1, 24)
1517 16:34:04.233117 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1518 16:34:04.233177 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1519 16:34:04.233236 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1520 16:34:04.233296 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1521 16:34:04.233356 3 2 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1522 16:34:04.233416 3 2 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1523 16:34:04.233496 [Byte 0] Lead/lag Transition tap number (7)
1524 16:34:04.233556 3 2 20 |2c2c 2c2b |(11 0)(11 11) |(0 0)(1 0)| 0
1525 16:34:04.233616 3 2 24 |1212 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1526 16:34:04.233677 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1527 16:34:04.233737 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1528 16:34:04.233797 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1529 16:34:04.233857 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1530 16:34:04.233917 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1531 16:34:04.233977 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1532 16:34:04.234036 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1533 16:34:04.234098 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1534 16:34:04.234158 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1535 16:34:04.234218 [Byte 1] Lead/lag falling Transition (3, 3, 28)
1536 16:34:04.234277 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1537 16:34:04.234337 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1538 16:34:04.234397 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1539 16:34:04.234457 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1540 16:34:04.234517 3 4 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1541 16:34:04.234577 3 4 20 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1542 16:34:04.234637 3 4 24 |707 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1543 16:34:04.234696 3 4 28 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1544 16:34:04.234756 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1545 16:34:04.234816 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1546 16:34:04.234877 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1547 16:34:04.234941 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1548 16:34:04.235021 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1549 16:34:04.235082 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1550 16:34:04.235142 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1551 16:34:04.235202 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1552 16:34:04.235262 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1553 16:34:04.235321 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1554 16:34:04.235381 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1555 16:34:04.235440 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1556 16:34:04.235712 [Byte 0] Lead/lag falling Transition (3, 6, 12)
1557 16:34:04.235779 [Byte 1] Lead/lag falling Transition (3, 6, 12)
1558 16:34:04.235839 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1559 16:34:04.235900 [Byte 0] Lead/lag Transition tap number (2)
1560 16:34:04.235960 3 6 20 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1561 16:34:04.236020 [Byte 1] Lead/lag Transition tap number (3)
1562 16:34:04.236079 3 6 24 |2424 202 |(11 11)(11 11) |(0 0)(0 0)| 0
1563 16:34:04.236139 3 6 28 |4646 a0a |(0 0)(11 11) |(0 0)(0 0)| 0
1564 16:34:04.236199 [Byte 0]First pass (3, 6, 28)
1565 16:34:04.236258 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1566 16:34:04.236319 [Byte 1]First pass (3, 7, 0)
1567 16:34:04.236379 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1568 16:34:04.236439 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1569 16:34:04.236499 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1570 16:34:04.236559 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1571 16:34:04.236618 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1572 16:34:04.236678 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1573 16:34:04.236737 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1574 16:34:04.236796 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1575 16:34:04.236855 All bytes gating window > 1UI, Early break!
1576 16:34:04.236915
1577 16:34:04.236997 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 16)
1578 16:34:04.237062
1579 16:34:04.237120 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
1580 16:34:04.237179
1581 16:34:04.237237
1582 16:34:04.237294
1583 16:34:04.237351 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
1584 16:34:04.237410
1585 16:34:04.237485 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
1586 16:34:04.237546
1587 16:34:04.237604
1588 16:34:04.237662 Write Rank1 MR1 =0x56
1589 16:34:04.237721
1590 16:34:04.237779 best RODT dly(2T, 0.5T) = (2, 3)
1591 16:34:04.237837
1592 16:34:04.237895 best RODT dly(2T, 0.5T) = (2, 3)
1593 16:34:04.237953 ==
1594 16:34:04.238012 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1595 16:34:04.238071 fsp= 1, odt_onoff= 1, Byte mode= 0
1596 16:34:04.238130 ==
1597 16:34:04.238189 Start DQ dly to find pass range UseTestEngine =0
1598 16:34:04.238256 x-axis: bit #, y-axis: DQ dly (-127~63)
1599 16:34:04.238332 RX Vref Scan = 0
1600 16:34:04.238392 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1601 16:34:04.238453 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1602 16:34:04.238514 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1603 16:34:04.238574 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1604 16:34:04.238633 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1605 16:34:04.238693 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1606 16:34:04.238752 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1607 16:34:04.238812 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1608 16:34:04.238872 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1609 16:34:04.238932 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1610 16:34:04.238992 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1611 16:34:04.239052 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1612 16:34:04.239111 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1613 16:34:04.239170 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1614 16:34:04.239229 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1615 16:34:04.239288 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1616 16:34:04.239348 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1617 16:34:04.239407 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1618 16:34:04.239467 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1619 16:34:04.239526 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1620 16:34:04.239585 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1621 16:34:04.239645 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1622 16:34:04.239739 -4, [0] xxxoxxxx oxxxxxxx [MSB]
1623 16:34:04.239800 -3, [0] xxxoxxxx ooxoxxxx [MSB]
1624 16:34:04.239859 -2, [0] xxxoxoxx ooxoooxx [MSB]
1625 16:34:04.239919 -1, [0] xxxoxoxx ooxoooxx [MSB]
1626 16:34:04.239978 0, [0] xxxoxoox ooxoooox [MSB]
1627 16:34:04.240038 1, [0] xxxoxoox ooxoooox [MSB]
1628 16:34:04.240098 2, [0] xxxooooo ooxoooox [MSB]
1629 16:34:04.240157 3, [0] oxxooooo ooxooooo [MSB]
1630 16:34:04.240236 4, [0] oooooooo ooxooooo [MSB]
1631 16:34:04.240303 32, [0] oooxoooo oooooooo [MSB]
1632 16:34:04.240363 33, [0] oooxoooo oooooooo [MSB]
1633 16:34:04.240422 34, [0] oooxoooo xooxoooo [MSB]
1634 16:34:04.240481 35, [0] oooxoooo xxoxoooo [MSB]
1635 16:34:04.240541 36, [0] oooxoxoo xxoxxooo [MSB]
1636 16:34:04.240600 37, [0] oooxoxxx xxoxxxxo [MSB]
1637 16:34:04.240659 38, [0] oooxoxxx xxoxxxxo [MSB]
1638 16:34:04.240718 39, [0] oooxoxxx xxoxxxxx [MSB]
1639 16:34:04.240792 40, [0] xoxxxxxx xxoxxxxx [MSB]
1640 16:34:04.240864 41, [0] xxxxxxxx xxoxxxxx [MSB]
1641 16:34:04.240923 42, [0] xxxxxxxx xxoxxxxx [MSB]
1642 16:34:04.240983 43, [0] xxxxxxxx xxxxxxxx [MSB]
1643 16:34:04.241042 iDelay=43, Bit 0, Center 21 (3 ~ 39) 37
1644 16:34:04.241101 iDelay=43, Bit 1, Center 22 (4 ~ 40) 37
1645 16:34:04.241160 iDelay=43, Bit 2, Center 21 (4 ~ 39) 36
1646 16:34:04.241218 iDelay=43, Bit 3, Center 13 (-4 ~ 31) 36
1647 16:34:04.241278 iDelay=43, Bit 4, Center 20 (2 ~ 39) 38
1648 16:34:04.241337 iDelay=43, Bit 5, Center 16 (-2 ~ 35) 38
1649 16:34:04.241395 iDelay=43, Bit 6, Center 18 (0 ~ 36) 37
1650 16:34:04.241472 iDelay=43, Bit 7, Center 19 (2 ~ 36) 35
1651 16:34:04.241533 iDelay=43, Bit 8, Center 14 (-4 ~ 33) 38
1652 16:34:04.241592 iDelay=43, Bit 9, Center 15 (-3 ~ 34) 38
1653 16:34:04.241650 iDelay=43, Bit 10, Center 23 (5 ~ 42) 38
1654 16:34:04.241709 iDelay=43, Bit 11, Center 15 (-3 ~ 33) 37
1655 16:34:04.241767 iDelay=43, Bit 12, Center 16 (-2 ~ 35) 38
1656 16:34:04.241826 iDelay=43, Bit 13, Center 17 (-2 ~ 36) 39
1657 16:34:04.241884 iDelay=43, Bit 14, Center 18 (0 ~ 36) 37
1658 16:34:04.241943 iDelay=43, Bit 15, Center 20 (3 ~ 38) 36
1659 16:34:04.242011 ==
1660 16:34:04.242083 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1661 16:34:04.242143 fsp= 1, odt_onoff= 1, Byte mode= 0
1662 16:34:04.242202 ==
1663 16:34:04.242260 DQS Delay:
1664 16:34:04.242318 DQS0 = 0, DQS1 = 0
1665 16:34:04.242377 DQM Delay:
1666 16:34:04.242435 DQM0 = 18, DQM1 = 17
1667 16:34:04.242524 DQ Delay:
1668 16:34:04.242584 DQ0 =21, DQ1 =22, DQ2 =21, DQ3 =13
1669 16:34:04.242642 DQ4 =20, DQ5 =16, DQ6 =18, DQ7 =19
1670 16:34:04.242700 DQ8 =14, DQ9 =15, DQ10 =23, DQ11 =15
1671 16:34:04.242760 DQ12 =16, DQ13 =17, DQ14 =18, DQ15 =20
1672 16:34:04.242819
1673 16:34:04.242877
1674 16:34:04.242934 DramC Write-DBI off
1675 16:34:04.242993 ==
1676 16:34:04.243052 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1677 16:34:04.243111 fsp= 1, odt_onoff= 1, Byte mode= 0
1678 16:34:04.243170 ==
1679 16:34:04.243228 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1680 16:34:04.243287
1681 16:34:04.243345 Begin, DQ Scan Range 923~1179
1682 16:34:04.243430
1683 16:34:04.243490
1684 16:34:04.243549 TX Vref Scan disable
1685 16:34:04.243608 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1686 16:34:04.243886 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1687 16:34:04.243958 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1688 16:34:04.244021 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1689 16:34:04.244081 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1690 16:34:04.244141 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1691 16:34:04.244202 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1692 16:34:04.244263 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1693 16:34:04.244323 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1694 16:34:04.244383 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1695 16:34:04.244442 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1696 16:34:04.244502 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1697 16:34:04.244562 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1698 16:34:04.244621 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1699 16:34:04.244681 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1700 16:34:04.244741 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1701 16:34:04.244801 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1702 16:34:04.244861 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1703 16:34:04.244921 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1704 16:34:04.244980 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1705 16:34:04.245040 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1706 16:34:04.245103 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1707 16:34:04.245190 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1708 16:34:04.245251 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1709 16:34:04.245310 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1710 16:34:04.245370 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1711 16:34:04.245442 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1712 16:34:04.245505 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1713 16:34:04.245565 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1714 16:34:04.245624 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1715 16:34:04.245684 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1716 16:34:04.245744 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1717 16:34:04.245804 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1718 16:34:04.245863 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1719 16:34:04.245923 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1720 16:34:04.245983 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1721 16:34:04.246042 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1722 16:34:04.246101 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1723 16:34:04.246160 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1724 16:34:04.246220 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1725 16:34:04.246280 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1726 16:34:04.246340 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1727 16:34:04.246400 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1728 16:34:04.246459 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1729 16:34:04.246519 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1730 16:34:04.246578 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1731 16:34:04.246638 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1732 16:34:04.246697 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
1733 16:34:04.246757 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
1734 16:34:04.246817 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
1735 16:34:04.246876 973 |3 6 13|[0] xxxxxxxx oxxoxxxx [MSB]
1736 16:34:04.246936 974 |3 6 14|[0] xxxxxxxx ooxooxxx [MSB]
1737 16:34:04.246995 975 |3 6 15|[0] xxxxxxxx ooxoooox [MSB]
1738 16:34:04.247055 976 |3 6 16|[0] xxxxxxxx ooxoooox [MSB]
1739 16:34:04.247114 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1740 16:34:04.247174 978 |3 6 18|[0] xoxooooo oooooooo [MSB]
1741 16:34:04.247234 991 |3 6 31|[0] oooooooo oooxoooo [MSB]
1742 16:34:04.247293 992 |3 6 32|[0] oooooooo xxoxoooo [MSB]
1743 16:34:04.247352 993 |3 6 33|[0] oooooooo xxoxxooo [MSB]
1744 16:34:04.247412 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1745 16:34:04.247471 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1746 16:34:04.247530 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1747 16:34:04.247590 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1748 16:34:04.247650 998 |3 6 38|[0] xoxxxxxx xxxxxxxx [MSB]
1749 16:34:04.247743 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1750 16:34:04.247808 Byte0, DQ PI dly=986, DQM PI dly= 986
1751 16:34:04.247867 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1752 16:34:04.247927
1753 16:34:04.247986 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1754 16:34:04.248046
1755 16:34:04.248104 Byte1, DQ PI dly=983, DQM PI dly= 983
1756 16:34:04.248163 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
1757 16:34:04.248222
1758 16:34:04.248281 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
1759 16:34:04.248340
1760 16:34:04.248398 ==
1761 16:34:04.248456 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1762 16:34:04.248516 fsp= 1, odt_onoff= 1, Byte mode= 0
1763 16:34:04.248595 ==
1764 16:34:04.248702 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1765 16:34:04.248767
1766 16:34:04.248826 Begin, DQ Scan Range 959~1023
1767 16:34:04.248886 Write Rank1 MR14 =0x0
1768 16:34:04.248943
1769 16:34:04.249001 CH=0, VrefRange= 0, VrefLevel = 0
1770 16:34:04.249060 TX Bit0 (982~992) 11 987, Bit8 (974~988) 15 981,
1771 16:34:04.249120 TX Bit1 (980~993) 14 986, Bit9 (976~988) 13 982,
1772 16:34:04.249180 TX Bit2 (982~992) 11 987, Bit10 (981~994) 14 987,
1773 16:34:04.249239 TX Bit3 (976~990) 15 983, Bit11 (976~984) 9 980,
1774 16:34:04.249298 TX Bit4 (979~992) 14 985, Bit12 (977~988) 12 982,
1775 16:34:04.249358 TX Bit5 (978~989) 12 983, Bit13 (977~989) 13 983,
1776 16:34:04.249417 TX Bit6 (979~991) 13 985, Bit14 (977~992) 16 984,
1777 16:34:04.249485 TX Bit7 (979~993) 15 986, Bit15 (980~994) 15 987,
1778 16:34:04.249544
1779 16:34:04.249603 Write Rank1 MR14 =0x2
1780 16:34:04.249665
1781 16:34:04.249723 CH=0, VrefRange= 0, VrefLevel = 2
1782 16:34:04.249782 TX Bit0 (981~993) 13 987, Bit8 (974~988) 15 981,
1783 16:34:04.249841 TX Bit1 (979~993) 15 986, Bit9 (976~989) 14 982,
1784 16:34:04.249900 TX Bit2 (981~992) 12 986, Bit10 (981~995) 15 988,
1785 16:34:04.249958 TX Bit3 (976~990) 15 983, Bit11 (976~986) 11 981,
1786 16:34:04.250017 TX Bit4 (979~993) 15 986, Bit12 (977~989) 13 983,
1787 16:34:04.250076 TX Bit5 (978~990) 13 984, Bit13 (976~989) 14 982,
1788 16:34:04.250135 TX Bit6 (978~992) 15 985, Bit14 (977~993) 17 985,
1789 16:34:04.250193 TX Bit7 (979~993) 15 986, Bit15 (980~994) 15 987,
1790 16:34:04.250252
1791 16:34:04.250310 Write Rank1 MR14 =0x4
1792 16:34:04.250369
1793 16:34:04.250641 CH=0, VrefRange= 0, VrefLevel = 4
1794 16:34:04.250708 TX Bit0 (981~994) 14 987, Bit8 (973~989) 17 981,
1795 16:34:04.250769 TX Bit1 (979~995) 17 987, Bit9 (976~989) 14 982,
1796 16:34:04.250831 TX Bit2 (981~993) 13 987, Bit10 (981~996) 16 988,
1797 16:34:04.250924 TX Bit3 (975~991) 17 983, Bit11 (975~987) 13 981,
1798 16:34:04.250985 TX Bit4 (979~994) 16 986, Bit12 (976~989) 14 982,
1799 16:34:04.251046 TX Bit5 (978~991) 14 984, Bit13 (976~990) 15 983,
1800 16:34:04.251105 TX Bit6 (978~992) 15 985, Bit14 (976~994) 19 985,
1801 16:34:04.251164 TX Bit7 (979~994) 16 986, Bit15 (979~995) 17 987,
1802 16:34:04.251223
1803 16:34:04.251281 Write Rank1 MR14 =0x6
1804 16:34:04.251339
1805 16:34:04.251397 CH=0, VrefRange= 0, VrefLevel = 6
1806 16:34:04.251456 TX Bit0 (980~995) 16 987, Bit8 (973~989) 17 981,
1807 16:34:04.251515 TX Bit1 (979~995) 17 987, Bit9 (976~990) 15 983,
1808 16:34:04.251574 TX Bit2 (980~994) 15 987, Bit10 (980~996) 17 988,
1809 16:34:04.251644 TX Bit3 (975~991) 17 983, Bit11 (975~988) 14 981,
1810 16:34:04.251749 TX Bit4 (979~994) 16 986, Bit12 (976~990) 15 983,
1811 16:34:04.251811 TX Bit5 (978~991) 14 984, Bit13 (976~990) 15 983,
1812 16:34:04.251875 TX Bit6 (978~993) 16 985, Bit14 (976~994) 19 985,
1813 16:34:04.251964 TX Bit7 (979~995) 17 987, Bit15 (978~996) 19 987,
1814 16:34:04.252051
1815 16:34:04.252144 Write Rank1 MR14 =0x8
1816 16:34:04.252239
1817 16:34:04.252333 CH=0, VrefRange= 0, VrefLevel = 8
1818 16:34:04.252427 TX Bit0 (980~996) 17 988, Bit8 (972~989) 18 980,
1819 16:34:04.252519 TX Bit1 (979~996) 18 987, Bit9 (975~990) 16 982,
1820 16:34:04.252609 TX Bit2 (980~995) 16 987, Bit10 (979~997) 19 988,
1821 16:34:04.252674 TX Bit3 (974~991) 18 982, Bit11 (975~989) 15 982,
1822 16:34:04.252737 TX Bit4 (979~995) 17 987, Bit12 (976~990) 15 983,
1823 16:34:04.252799 TX Bit5 (977~991) 15 984, Bit13 (976~991) 16 983,
1824 16:34:04.252860 TX Bit6 (978~993) 16 985, Bit14 (975~996) 22 985,
1825 16:34:04.252920 TX Bit7 (978~996) 19 987, Bit15 (978~997) 20 987,
1826 16:34:04.252979
1827 16:34:04.253038 Write Rank1 MR14 =0xa
1828 16:34:04.253097
1829 16:34:04.253155 CH=0, VrefRange= 0, VrefLevel = 10
1830 16:34:04.253215 TX Bit0 (980~997) 18 988, Bit8 (972~990) 19 981,
1831 16:34:04.253274 TX Bit1 (978~997) 20 987, Bit9 (975~991) 17 983,
1832 16:34:04.253337 TX Bit2 (980~996) 17 988, Bit10 (979~997) 19 988,
1833 16:34:04.253396 TX Bit3 (974~991) 18 982, Bit11 (974~989) 16 981,
1834 16:34:04.253482 TX Bit4 (979~996) 18 987, Bit12 (976~991) 16 983,
1835 16:34:04.253544 TX Bit5 (977~992) 16 984, Bit13 (975~991) 17 983,
1836 16:34:04.253604 TX Bit6 (978~994) 17 986, Bit14 (976~996) 21 986,
1837 16:34:04.253663 TX Bit7 (978~997) 20 987, Bit15 (977~997) 21 987,
1838 16:34:04.253722
1839 16:34:04.253780 Write Rank1 MR14 =0xc
1840 16:34:04.253839
1841 16:34:04.253897 CH=0, VrefRange= 0, VrefLevel = 12
1842 16:34:04.253956 TX Bit0 (979~998) 20 988, Bit8 (971~990) 20 980,
1843 16:34:04.254016 TX Bit1 (978~998) 21 988, Bit9 (974~991) 18 982,
1844 16:34:04.254075 TX Bit2 (980~997) 18 988, Bit10 (979~997) 19 988,
1845 16:34:04.254134 TX Bit3 (974~992) 19 983, Bit11 (974~990) 17 982,
1846 16:34:04.254193 TX Bit4 (978~997) 20 987, Bit12 (975~991) 17 983,
1847 16:34:04.254252 TX Bit5 (977~993) 17 985, Bit13 (975~992) 18 983,
1848 16:34:04.254312 TX Bit6 (978~994) 17 986, Bit14 (975~996) 22 985,
1849 16:34:04.254371 TX Bit7 (978~997) 20 987, Bit15 (978~997) 20 987,
1850 16:34:04.254430
1851 16:34:04.254489 Write Rank1 MR14 =0xe
1852 16:34:04.254561
1853 16:34:04.254621 CH=0, VrefRange= 0, VrefLevel = 14
1854 16:34:04.254681 TX Bit0 (979~998) 20 988, Bit8 (971~990) 20 980,
1855 16:34:04.254741 TX Bit1 (978~998) 21 988, Bit9 (974~991) 18 982,
1856 16:34:04.254800 TX Bit2 (980~997) 18 988, Bit10 (979~997) 19 988,
1857 16:34:04.254860 TX Bit3 (974~992) 19 983, Bit11 (974~990) 17 982,
1858 16:34:04.254918 TX Bit4 (978~997) 20 987, Bit12 (975~991) 17 983,
1859 16:34:04.254978 TX Bit5 (977~993) 17 985, Bit13 (975~992) 18 983,
1860 16:34:04.255037 TX Bit6 (978~994) 17 986, Bit14 (975~996) 22 985,
1861 16:34:04.255096 TX Bit7 (978~997) 20 987, Bit15 (978~997) 20 987,
1862 16:34:04.255154
1863 16:34:04.255213 Write Rank1 MR14 =0x10
1864 16:34:04.255271
1865 16:34:04.255329 CH=0, VrefRange= 0, VrefLevel = 16
1866 16:34:04.255389 TX Bit0 (979~999) 21 989, Bit8 (971~991) 21 981,
1867 16:34:04.255448 TX Bit1 (978~999) 22 988, Bit9 (975~992) 18 983,
1868 16:34:04.255507 TX Bit2 (979~998) 20 988, Bit10 (978~998) 21 988,
1869 16:34:04.255566 TX Bit3 (972~992) 21 982, Bit11 (973~990) 18 981,
1870 16:34:04.255624 TX Bit4 (978~998) 21 988, Bit12 (975~992) 18 983,
1871 16:34:04.255685 TX Bit5 (976~994) 19 985, Bit13 (975~993) 19 984,
1872 16:34:04.255744 TX Bit6 (977~996) 20 986, Bit14 (975~997) 23 986,
1873 16:34:04.255802 TX Bit7 (978~999) 22 988, Bit15 (977~998) 22 987,
1874 16:34:04.255861
1875 16:34:04.255919 Write Rank1 MR14 =0x12
1876 16:34:04.255978
1877 16:34:04.256036 CH=0, VrefRange= 0, VrefLevel = 18
1878 16:34:04.256094 TX Bit0 (979~999) 21 989, Bit8 (970~991) 22 980,
1879 16:34:04.256153 TX Bit1 (978~999) 22 988, Bit9 (974~993) 20 983,
1880 16:34:04.256211 TX Bit2 (979~999) 21 989, Bit10 (978~998) 21 988,
1881 16:34:04.256270 TX Bit3 (972~993) 22 982, Bit11 (972~991) 20 981,
1882 16:34:04.256329 TX Bit4 (978~999) 22 988, Bit12 (974~993) 20 983,
1883 16:34:04.256387 TX Bit5 (976~994) 19 985, Bit13 (974~994) 21 984,
1884 16:34:04.256447 TX Bit6 (977~997) 21 987, Bit14 (975~997) 23 986,
1885 16:34:04.256506 TX Bit7 (978~999) 22 988, Bit15 (977~998) 22 987,
1886 16:34:04.256565
1887 16:34:04.256622 Write Rank1 MR14 =0x14
1888 16:34:04.256681
1889 16:34:04.256739 CH=0, VrefRange= 0, VrefLevel = 20
1890 16:34:04.256797 TX Bit0 (979~999) 21 989, Bit8 (970~992) 23 981,
1891 16:34:04.256857 TX Bit1 (978~999) 22 988, Bit9 (973~993) 21 983,
1892 16:34:04.256916 TX Bit2 (979~999) 21 989, Bit10 (977~999) 23 988,
1893 16:34:04.257202 TX Bit3 (972~993) 22 982, Bit11 (972~991) 20 981,
1894 16:34:04.257271 TX Bit4 (978~999) 22 988, Bit12 (974~993) 20 983,
1895 16:34:04.257332 TX Bit5 (976~995) 20 985, Bit13 (974~995) 22 984,
1896 16:34:04.257392 TX Bit6 (977~998) 22 987, Bit14 (974~997) 24 985,
1897 16:34:04.257477 TX Bit7 (978~999) 22 988, Bit15 (977~999) 23 988,
1898 16:34:04.257539
1899 16:34:04.257597 Write Rank1 MR14 =0x16
1900 16:34:04.257657
1901 16:34:04.257716 CH=0, VrefRange= 0, VrefLevel = 22
1902 16:34:04.257775 TX Bit0 (978~1000) 23 989, Bit8 (970~993) 24 981,
1903 16:34:04.257834 TX Bit1 (978~1000) 23 989, Bit9 (973~994) 22 983,
1904 16:34:04.257893 TX Bit2 (979~999) 21 989, Bit10 (977~999) 23 988,
1905 16:34:04.257953 TX Bit3 (971~994) 24 982, Bit11 (972~992) 21 982,
1906 16:34:04.258011 TX Bit4 (978~999) 22 988, Bit12 (973~994) 22 983,
1907 16:34:04.417333 TX Bit5 (975~995) 21 985, Bit13 (974~996) 23 985,
1908 16:34:04.417492 TX Bit6 (977~998) 22 987, Bit14 (974~998) 25 986,
1909 16:34:04.417568 TX Bit7 (978~1000) 23 989, Bit15 (976~999) 24 987,
1910 16:34:04.417636
1911 16:34:04.417700 Write Rank1 MR14 =0x18
1912 16:34:04.417763
1913 16:34:04.417825 CH=0, VrefRange= 0, VrefLevel = 24
1914 16:34:04.417888 TX Bit0 (978~1000) 23 989, Bit8 (969~994) 26 981,
1915 16:34:04.417949 TX Bit1 (977~1000) 24 988, Bit9 (973~994) 22 983,
1916 16:34:04.418010 TX Bit2 (979~1000) 22 989, Bit10 (977~1000) 24 988,
1917 16:34:04.418070 TX Bit3 (971~994) 24 982, Bit11 (971~993) 23 982,
1918 16:34:04.418130 TX Bit4 (977~1000) 24 988, Bit12 (973~995) 23 984,
1919 16:34:04.418189 TX Bit5 (975~997) 23 986, Bit13 (973~996) 24 984,
1920 16:34:04.418249 TX Bit6 (977~998) 22 987, Bit14 (973~998) 26 985,
1921 16:34:04.418309 TX Bit7 (977~1000) 24 988, Bit15 (977~999) 23 988,
1922 16:34:04.418369
1923 16:34:04.418428 Write Rank1 MR14 =0x1a
1924 16:34:04.418488
1925 16:34:04.418546 CH=0, VrefRange= 0, VrefLevel = 26
1926 16:34:04.418606 TX Bit0 (978~1001) 24 989, Bit8 (969~995) 27 982,
1927 16:34:04.418664 TX Bit1 (977~1001) 25 989, Bit9 (972~996) 25 984,
1928 16:34:04.418723 TX Bit2 (978~1000) 23 989, Bit10 (976~1001) 26 988,
1929 16:34:04.418782 TX Bit3 (971~995) 25 983, Bit11 (971~994) 24 982,
1930 16:34:04.418841 TX Bit4 (977~1000) 24 988, Bit12 (973~996) 24 984,
1931 16:34:04.418900 TX Bit5 (975~997) 23 986, Bit13 (972~997) 26 984,
1932 16:34:04.418959 TX Bit6 (976~999) 24 987, Bit14 (974~998) 25 986,
1933 16:34:04.419018 TX Bit7 (977~1001) 25 989, Bit15 (976~1000) 25 988,
1934 16:34:04.419077
1935 16:34:04.419135 Write Rank1 MR14 =0x1c
1936 16:34:04.419193
1937 16:34:04.419251 CH=0, VrefRange= 0, VrefLevel = 28
1938 16:34:04.419310 TX Bit0 (978~1001) 24 989, Bit8 (969~996) 28 982,
1939 16:34:04.419369 TX Bit1 (978~1001) 24 989, Bit9 (972~996) 25 984,
1940 16:34:04.419428 TX Bit2 (978~1001) 24 989, Bit10 (977~1001) 25 989,
1941 16:34:04.419487 TX Bit3 (971~995) 25 983, Bit11 (971~994) 24 982,
1942 16:34:04.419546 TX Bit4 (977~1000) 24 988, Bit12 (972~997) 26 984,
1943 16:34:04.419605 TX Bit5 (975~998) 24 986, Bit13 (972~997) 26 984,
1944 16:34:04.419664 TX Bit6 (976~999) 24 987, Bit14 (972~998) 27 985,
1945 16:34:04.419722 TX Bit7 (977~1001) 25 989, Bit15 (976~1000) 25 988,
1946 16:34:04.419781
1947 16:34:04.419839 Write Rank1 MR14 =0x1e
1948 16:34:04.419897
1949 16:34:04.419955 CH=0, VrefRange= 0, VrefLevel = 30
1950 16:34:04.420014 TX Bit0 (978~1002) 25 990, Bit8 (969~995) 27 982,
1951 16:34:04.420073 TX Bit1 (978~1001) 24 989, Bit9 (972~996) 25 984,
1952 16:34:04.420132 TX Bit2 (978~1001) 24 989, Bit10 (976~1001) 26 988,
1953 16:34:04.420191 TX Bit3 (971~995) 25 983, Bit11 (970~995) 26 982,
1954 16:34:04.420249 TX Bit4 (977~1001) 25 989, Bit12 (972~996) 25 984,
1955 16:34:04.420309 TX Bit5 (974~998) 25 986, Bit13 (972~997) 26 984,
1956 16:34:04.420368 TX Bit6 (976~999) 24 987, Bit14 (973~998) 26 985,
1957 16:34:04.420426 TX Bit7 (977~1001) 25 989, Bit15 (976~1000) 25 988,
1958 16:34:04.420485
1959 16:34:04.420544 Write Rank1 MR14 =0x20
1960 16:34:04.420601
1961 16:34:04.420659 CH=0, VrefRange= 0, VrefLevel = 32
1962 16:34:04.420718 TX Bit0 (978~1002) 25 990, Bit8 (969~995) 27 982,
1963 16:34:04.420782 TX Bit1 (978~1001) 24 989, Bit9 (972~996) 25 984,
1964 16:34:04.420842 TX Bit2 (978~1001) 24 989, Bit10 (976~1001) 26 988,
1965 16:34:04.420905 TX Bit3 (971~995) 25 983, Bit11 (970~995) 26 982,
1966 16:34:04.420966 TX Bit4 (977~1001) 25 989, Bit12 (972~996) 25 984,
1967 16:34:04.421025 TX Bit5 (974~998) 25 986, Bit13 (972~997) 26 984,
1968 16:34:04.421084 TX Bit6 (976~999) 24 987, Bit14 (973~998) 26 985,
1969 16:34:04.421143 TX Bit7 (977~1001) 25 989, Bit15 (976~1000) 25 988,
1970 16:34:04.421206
1971 16:34:04.421267 Write Rank1 MR14 =0x22
1972 16:34:04.421349
1973 16:34:04.421416 CH=0, VrefRange= 0, VrefLevel = 34
1974 16:34:04.421530 TX Bit0 (978~1002) 25 990, Bit8 (969~995) 27 982,
1975 16:34:04.421594 TX Bit1 (978~1001) 24 989, Bit9 (972~996) 25 984,
1976 16:34:04.421660 TX Bit2 (978~1001) 24 989, Bit10 (976~1001) 26 988,
1977 16:34:04.421721 TX Bit3 (971~995) 25 983, Bit11 (970~995) 26 982,
1978 16:34:04.421781 TX Bit4 (977~1001) 25 989, Bit12 (972~996) 25 984,
1979 16:34:04.421860 TX Bit5 (974~998) 25 986, Bit13 (972~997) 26 984,
1980 16:34:04.421924 TX Bit6 (976~999) 24 987, Bit14 (973~998) 26 985,
1981 16:34:04.421983 TX Bit7 (977~1001) 25 989, Bit15 (976~1000) 25 988,
1982 16:34:04.422043
1983 16:34:04.422101 Write Rank1 MR14 =0x24
1984 16:34:04.422160
1985 16:34:04.422218 CH=0, VrefRange= 0, VrefLevel = 36
1986 16:34:04.422277 TX Bit0 (978~1002) 25 990, Bit8 (969~995) 27 982,
1987 16:34:04.422337 TX Bit1 (978~1001) 24 989, Bit9 (972~996) 25 984,
1988 16:34:04.422397 TX Bit2 (978~1001) 24 989, Bit10 (976~1001) 26 988,
1989 16:34:04.422456 TX Bit3 (971~995) 25 983, Bit11 (970~995) 26 982,
1990 16:34:04.422515 TX Bit4 (977~1001) 25 989, Bit12 (972~996) 25 984,
1991 16:34:04.422575 TX Bit5 (974~998) 25 986, Bit13 (972~997) 26 984,
1992 16:34:04.422851 TX Bit6 (976~999) 24 987, Bit14 (973~998) 26 985,
1993 16:34:04.422953 TX Bit7 (977~1001) 25 989, Bit15 (976~1000) 25 988,
1994 16:34:04.423046
1995 16:34:04.423136
1996 16:34:04.423227 TX Vref found, early break! 375< 382
1997 16:34:04.423320 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
1998 16:34:04.423412 u1DelayCellOfst[0]=9 cells (7 PI)
1999 16:34:04.423504 u1DelayCellOfst[1]=7 cells (6 PI)
2000 16:34:04.423595 u1DelayCellOfst[2]=7 cells (6 PI)
2001 16:34:04.423687 u1DelayCellOfst[3]=0 cells (0 PI)
2002 16:34:04.423778 u1DelayCellOfst[4]=7 cells (6 PI)
2003 16:34:04.423868 u1DelayCellOfst[5]=3 cells (3 PI)
2004 16:34:04.423959 u1DelayCellOfst[6]=5 cells (4 PI)
2005 16:34:04.424050 u1DelayCellOfst[7]=7 cells (6 PI)
2006 16:34:04.424141 Byte0, DQ PI dly=983, DQM PI dly= 986
2007 16:34:04.424233 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2008 16:34:04.424324
2009 16:34:04.424415 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2010 16:34:04.424507
2011 16:34:04.424598 u1DelayCellOfst[8]=0 cells (0 PI)
2012 16:34:04.424689 u1DelayCellOfst[9]=2 cells (2 PI)
2013 16:34:04.424784 u1DelayCellOfst[10]=7 cells (6 PI)
2014 16:34:04.424876 u1DelayCellOfst[11]=0 cells (0 PI)
2015 16:34:04.424975 u1DelayCellOfst[12]=2 cells (2 PI)
2016 16:34:04.425070 u1DelayCellOfst[13]=2 cells (2 PI)
2017 16:34:04.425134 u1DelayCellOfst[14]=3 cells (3 PI)
2018 16:34:04.425202 u1DelayCellOfst[15]=7 cells (6 PI)
2019 16:34:04.425267 Byte1, DQ PI dly=982, DQM PI dly= 985
2020 16:34:04.425329 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
2021 16:34:04.425418
2022 16:34:04.425502 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
2023 16:34:04.425564
2024 16:34:04.425624 Write Rank1 MR14 =0x1e
2025 16:34:04.425684
2026 16:34:04.425743 Final TX Range 0 Vref 30
2027 16:34:04.425803
2028 16:34:04.425862 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2029 16:34:04.425923
2030 16:34:04.425981 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2031 16:34:04.426041 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2032 16:34:04.426101 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2033 16:34:04.426162 Write Rank1 MR3 =0xb0
2034 16:34:04.426220 DramC Write-DBI on
2035 16:34:04.426287 ==
2036 16:34:04.426352 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2037 16:34:04.426414 fsp= 1, odt_onoff= 1, Byte mode= 0
2038 16:34:04.426474 ==
2039 16:34:04.426534 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2040 16:34:04.426594
2041 16:34:04.426653 Begin, DQ Scan Range 705~769
2042 16:34:04.426712
2043 16:34:04.426771
2044 16:34:04.426830 TX Vref Scan disable
2045 16:34:04.426889 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2046 16:34:04.426951 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2047 16:34:04.427011 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2048 16:34:04.427072 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2049 16:34:04.427132 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2050 16:34:04.427193 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2051 16:34:04.427253 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2052 16:34:04.427314 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2053 16:34:04.427374 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2054 16:34:04.427434 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2055 16:34:04.427495 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2056 16:34:04.427555 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2057 16:34:04.427616 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2058 16:34:04.427676 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2059 16:34:04.427737 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2060 16:34:04.427797 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2061 16:34:04.427857 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2062 16:34:04.427918 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2063 16:34:04.427978 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2064 16:34:04.428043 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2065 16:34:04.428110 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
2066 16:34:04.428197 Byte0, DQ PI dly=733, DQM PI dly= 733
2067 16:34:04.428259 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
2068 16:34:04.428322
2069 16:34:04.428401 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
2070 16:34:04.428472
2071 16:34:04.428533 Byte1, DQ PI dly=728, DQM PI dly= 728
2072 16:34:04.428592 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2073 16:34:04.428653
2074 16:34:04.428713 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2075 16:34:04.428786
2076 16:34:04.428851 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2077 16:34:04.428911 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2078 16:34:04.428982 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2079 16:34:04.429045 Write Rank1 MR3 =0x30
2080 16:34:04.429105 DramC Write-DBI off
2081 16:34:04.429164
2082 16:34:04.429223 [DATLAT]
2083 16:34:04.429290 Freq=1600, CH0 RK1, use_rxtx_scan=0
2084 16:34:04.429386
2085 16:34:04.429486 DATLAT Default: 0x10
2086 16:34:04.429565 7, 0xFFFF, sum=0
2087 16:34:04.429670 8, 0xFFFF, sum=0
2088 16:34:04.429740 9, 0xFFFF, sum=0
2089 16:34:04.429803 10, 0xFFFF, sum=0
2090 16:34:04.429864 11, 0xFFFF, sum=0
2091 16:34:04.429925 12, 0xFFFF, sum=0
2092 16:34:04.429989 13, 0xFFFF, sum=0
2093 16:34:04.430053 14, 0x0, sum=1
2094 16:34:04.430117 15, 0x0, sum=2
2095 16:34:04.430182 16, 0x0, sum=3
2096 16:34:04.430247 17, 0x0, sum=4
2097 16:34:04.430307 pattern=2 first_step=14 total pass=5 best_step=16
2098 16:34:04.430367 ==
2099 16:34:04.430427 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2100 16:34:04.430490 fsp= 1, odt_onoff= 1, Byte mode= 0
2101 16:34:04.430553 ==
2102 16:34:04.430616 Start DQ dly to find pass range UseTestEngine =1
2103 16:34:04.430680 x-axis: bit #, y-axis: DQ dly (-127~63)
2104 16:34:04.430743 RX Vref Scan = 0
2105 16:34:04.430802 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2106 16:34:04.430864 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2107 16:34:04.430924 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2108 16:34:04.430984 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2109 16:34:04.431045 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2110 16:34:04.431105 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2111 16:34:04.431165 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2112 16:34:04.431232 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2113 16:34:04.431297 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2114 16:34:04.431358 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2115 16:34:04.431419 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2116 16:34:04.431483 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2117 16:34:04.431546 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2118 16:34:04.431611 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2119 16:34:04.431880 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2120 16:34:04.431949 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2121 16:34:04.432012 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2122 16:34:04.432074 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2123 16:34:04.432135 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2124 16:34:04.432195 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2125 16:34:04.432255 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2126 16:34:04.432317 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2127 16:34:04.432377 -4, [0] xxxxxxxx oxxxxxxx [MSB]
2128 16:34:04.432438 -3, [0] xxxxxxxx oxxxxxxx [MSB]
2129 16:34:04.432499 -2, [0] xxxoxxxx ooxoxxxx [MSB]
2130 16:34:04.432559 -1, [0] xxxoxoxx ooxoxoxx [MSB]
2131 16:34:04.432619 0, [0] xxxoxoxx ooxoooxx [MSB]
2132 16:34:04.432680 1, [0] xxxoxoox ooxoooox [MSB]
2133 16:34:04.432740 2, [0] xxxoxoox ooxoooox [MSB]
2134 16:34:04.432804 3, [0] xxxooooo ooxooooo [MSB]
2135 16:34:04.432868 4, [0] ooxooooo ooxooooo [MSB]
2136 16:34:04.432934 5, [0] oooooooo ooxooooo [MSB]
2137 16:34:04.432995 6, [0] oooooooo ooxooooo [MSB]
2138 16:34:04.433056 32, [0] oooxoooo oooooooo [MSB]
2139 16:34:04.433116 33, [0] oooxoooo xooxoooo [MSB]
2140 16:34:04.433176 34, [0] oooxoooo xooxoxoo [MSB]
2141 16:34:04.433237 35, [0] oooxoxoo xxoxxxoo [MSB]
2142 16:34:04.433297 36, [0] oooxoxxo xxoxxxoo [MSB]
2143 16:34:04.433357 37, [0] oooxoxxo xxoxxxxo [MSB]
2144 16:34:04.433417 38, [0] oooxoxxx xxoxxxxo [MSB]
2145 16:34:04.433496 39, [0] xxoxxxxx xxoxxxxx [MSB]
2146 16:34:04.433557 40, [0] xxoxxxxx xxxxxxxx [MSB]
2147 16:34:04.433617 41, [0] xxxxxxxx xxxxxxxx [MSB]
2148 16:34:04.433678 iDelay=41, Bit 0, Center 21 (4 ~ 38) 35
2149 16:34:04.433738 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
2150 16:34:04.433797 iDelay=41, Bit 2, Center 22 (5 ~ 40) 36
2151 16:34:04.433856 iDelay=41, Bit 3, Center 14 (-2 ~ 31) 34
2152 16:34:04.433916 iDelay=41, Bit 4, Center 20 (3 ~ 38) 36
2153 16:34:04.433975 iDelay=41, Bit 5, Center 16 (-1 ~ 34) 36
2154 16:34:04.434034 iDelay=41, Bit 6, Center 18 (1 ~ 35) 35
2155 16:34:04.434093 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
2156 16:34:04.434152 iDelay=41, Bit 8, Center 14 (-4 ~ 32) 37
2157 16:34:04.434212 iDelay=41, Bit 9, Center 16 (-2 ~ 34) 37
2158 16:34:04.434271 iDelay=41, Bit 10, Center 23 (7 ~ 39) 33
2159 16:34:04.434330 iDelay=41, Bit 11, Center 15 (-2 ~ 32) 35
2160 16:34:04.434389 iDelay=41, Bit 12, Center 17 (0 ~ 34) 35
2161 16:34:04.434448 iDelay=41, Bit 13, Center 16 (-1 ~ 33) 35
2162 16:34:04.434508 iDelay=41, Bit 14, Center 18 (1 ~ 36) 36
2163 16:34:04.434566 iDelay=41, Bit 15, Center 20 (3 ~ 38) 36
2164 16:34:04.434625 ==
2165 16:34:04.434685 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2166 16:34:04.434753 fsp= 1, odt_onoff= 1, Byte mode= 0
2167 16:34:04.434816 ==
2168 16:34:04.434878 DQS Delay:
2169 16:34:04.434937 DQS0 = 0, DQS1 = 0
2170 16:34:04.435000 DQM Delay:
2171 16:34:04.435061 DQM0 = 19, DQM1 = 17
2172 16:34:04.435120 DQ Delay:
2173 16:34:04.435185 DQ0 =21, DQ1 =21, DQ2 =22, DQ3 =14
2174 16:34:04.435245 DQ4 =20, DQ5 =16, DQ6 =18, DQ7 =20
2175 16:34:04.435305 DQ8 =14, DQ9 =16, DQ10 =23, DQ11 =15
2176 16:34:04.435364 DQ12 =17, DQ13 =16, DQ14 =18, DQ15 =20
2177 16:34:04.435423
2178 16:34:04.435482
2179 16:34:04.435540
2180 16:34:04.435599 [DramC_TX_OE_Calibration] TA2
2181 16:34:04.435658 Original DQ_B0 (3 6) =30, OEN = 27
2182 16:34:04.435717 Original DQ_B1 (3 6) =30, OEN = 27
2183 16:34:04.435776 23, 0x0, End_B0=23 End_B1=23
2184 16:34:04.435836 24, 0x0, End_B0=24 End_B1=24
2185 16:34:04.435896 25, 0x0, End_B0=25 End_B1=25
2186 16:34:04.435971 26, 0x0, End_B0=26 End_B1=26
2187 16:34:04.436040 27, 0x0, End_B0=27 End_B1=27
2188 16:34:04.436105 28, 0x0, End_B0=28 End_B1=28
2189 16:34:04.436166 29, 0x0, End_B0=29 End_B1=29
2190 16:34:04.436226 30, 0x0, End_B0=30 End_B1=30
2191 16:34:04.436287 31, 0xFFFF, End_B0=30 End_B1=30
2192 16:34:04.436347 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2193 16:34:04.436408 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2194 16:34:04.436490
2195 16:34:04.436569
2196 16:34:04.436634 Write Rank1 MR23 =0x3f
2197 16:34:04.436694 [DQSOSC]
2198 16:34:04.436773 [DQSOSCAuto] RK1, (LSB)MR18= 0xa7a7, (MSB)MR19= 0x202, tDQSOscB0 = 463 ps tDQSOscB1 = 463 ps
2199 16:34:04.439298 CH0_RK1: MR19=0x202, MR18=0xA7A7, DQSOSC=463, MR23=63, INC=11, DEC=17
2200 16:34:04.442954 Write Rank1 MR23 =0x3f
2201 16:34:04.443054 [DQSOSC]
2202 16:34:04.449365 [DQSOSCAuto] RK1, (LSB)MR18= 0xa5a5, (MSB)MR19= 0x202, tDQSOscB0 = 465 ps tDQSOscB1 = 465 ps
2203 16:34:04.452524 CH0 RK1: MR19=202, MR18=A5A5
2204 16:34:04.455914 [RxdqsGatingPostProcess] freq 1600
2205 16:34:04.462119 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2206 16:34:04.462284 Rank: 0
2207 16:34:04.465514 best DQS0 dly(2T, 0.5T) = (2, 6)
2208 16:34:04.468778 best DQS1 dly(2T, 0.5T) = (2, 6)
2209 16:34:04.472006 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2210 16:34:04.475280 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2211 16:34:04.475416 Rank: 1
2212 16:34:04.478875 best DQS0 dly(2T, 0.5T) = (2, 6)
2213 16:34:04.482122 best DQS1 dly(2T, 0.5T) = (2, 6)
2214 16:34:04.485136 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2215 16:34:04.488670 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2216 16:34:04.491909 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2217 16:34:04.495192 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2218 16:34:04.501482 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2219 16:34:04.501643 Write Rank0 MR13 =0x59
2220 16:34:04.501761 ==
2221 16:34:04.508206 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2222 16:34:04.511367 fsp= 1, odt_onoff= 1, Byte mode= 0
2223 16:34:04.511513 ==
2224 16:34:04.514649 === u2Vref_new: 0x56 --> 0x3a
2225 16:34:04.517841 === u2Vref_new: 0x58 --> 0x58
2226 16:34:04.521087 === u2Vref_new: 0x5a --> 0x5a
2227 16:34:04.524471 === u2Vref_new: 0x5c --> 0x78
2228 16:34:04.524617 === u2Vref_new: 0x5e --> 0x7a
2229 16:34:04.528096 === u2Vref_new: 0x60 --> 0x90
2230 16:34:04.531334 [CA 0] Center 37 (12~63) winsize 52
2231 16:34:04.534502 [CA 1] Center 37 (12~63) winsize 52
2232 16:34:04.538028 [CA 2] Center 34 (5~63) winsize 59
2233 16:34:04.541267 [CA 3] Center 34 (6~63) winsize 58
2234 16:34:04.544524 [CA 4] Center 34 (5~63) winsize 59
2235 16:34:04.547778 [CA 5] Center 28 (-1~58) winsize 60
2236 16:34:04.547929
2237 16:34:04.551081 [CATrainingPosCal] consider 1 rank data
2238 16:34:04.554333 u2DelayCellTimex100 = 744/100 ps
2239 16:34:04.557422 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2240 16:34:04.563890 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2241 16:34:04.567298 CA2 delay=34 (5~63),Diff = 6 PI (7 cell)
2242 16:34:04.570412 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2243 16:34:04.573955 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2244 16:34:04.577230 CA5 delay=28 (-1~58),Diff = 0 PI (0 cell)
2245 16:34:04.577369
2246 16:34:04.580377 CA PerBit enable=1, Macro0, CA PI delay=28
2247 16:34:04.583718 === u2Vref_new: 0x5e --> 0x7a
2248 16:34:04.583858
2249 16:34:04.587046 Vref(ca) range 1: 30
2250 16:34:04.587180
2251 16:34:04.587293 CS Dly= 11 (42-0-32)
2252 16:34:04.590379 Write Rank0 MR13 =0xd8
2253 16:34:04.593710 Write Rank0 MR13 =0xd8
2254 16:34:04.593840 Write Rank0 MR12 =0x5e
2255 16:34:04.596948 Write Rank1 MR13 =0x59
2256 16:34:04.597073 ==
2257 16:34:04.600242 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2258 16:34:04.603457 fsp= 1, odt_onoff= 1, Byte mode= 0
2259 16:34:04.606555 ==
2260 16:34:04.606686 === u2Vref_new: 0x56 --> 0x3a
2261 16:34:04.609748 === u2Vref_new: 0x58 --> 0x58
2262 16:34:04.613002 === u2Vref_new: 0x5a --> 0x5a
2263 16:34:04.616530 === u2Vref_new: 0x5c --> 0x78
2264 16:34:04.619806 === u2Vref_new: 0x5e --> 0x7a
2265 16:34:04.622692 === u2Vref_new: 0x60 --> 0x90
2266 16:34:04.626000 [CA 0] Center 37 (11~63) winsize 53
2267 16:34:04.629460 [CA 1] Center 37 (12~63) winsize 52
2268 16:34:04.632783 [CA 2] Center 34 (5~63) winsize 59
2269 16:34:04.636087 [CA 3] Center 35 (7~63) winsize 57
2270 16:34:04.639132 [CA 4] Center 33 (4~63) winsize 60
2271 16:34:04.642672 [CA 5] Center 28 (-1~57) winsize 59
2272 16:34:04.642815
2273 16:34:04.645603 [CATrainingPosCal] consider 2 rank data
2274 16:34:04.649060 u2DelayCellTimex100 = 744/100 ps
2275 16:34:04.652502 CA0 delay=37 (12~63),Diff = 9 PI (11 cell)
2276 16:34:04.655450 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2277 16:34:04.658851 CA2 delay=34 (5~63),Diff = 6 PI (7 cell)
2278 16:34:04.665424 CA3 delay=35 (7~63),Diff = 7 PI (9 cell)
2279 16:34:04.668754 CA4 delay=34 (5~63),Diff = 6 PI (7 cell)
2280 16:34:04.672071 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2281 16:34:04.672246
2282 16:34:04.675433 CA PerBit enable=1, Macro0, CA PI delay=28
2283 16:34:04.678439 === u2Vref_new: 0x5c --> 0x78
2284 16:34:04.678613
2285 16:34:04.678725 Vref(ca) range 1: 28
2286 16:34:04.678827
2287 16:34:04.681977 CS Dly= 11 (42-0-32)
2288 16:34:04.685199 Write Rank1 MR13 =0xd8
2289 16:34:04.685364 Write Rank1 MR13 =0xd8
2290 16:34:04.688514 Write Rank1 MR12 =0x5c
2291 16:34:04.691756 [RankSwap] Rank num 2, (Multi 1), Rank 0
2292 16:34:04.695058 Write Rank0 MR2 =0xad
2293 16:34:04.695247 [Write Leveling]
2294 16:34:04.698129 delay byte0 byte1 byte2 byte3
2295 16:34:04.698287
2296 16:34:04.701392 10 0 0
2297 16:34:04.701535 11 0 0
2298 16:34:04.701645 12 0 0
2299 16:34:04.704595 13 0 0
2300 16:34:04.704725 14 0 0
2301 16:34:04.708161 15 0 0
2302 16:34:04.708288 16 0 0
2303 16:34:04.708395 17 0 0
2304 16:34:04.711270 18 0 0
2305 16:34:04.711392 19 0 0
2306 16:34:04.714401 20 0 0
2307 16:34:04.714525 21 0 0
2308 16:34:04.717742 22 0 0
2309 16:34:04.717844 23 0 0
2310 16:34:04.717919 24 0 0
2311 16:34:04.720945 25 0 0
2312 16:34:04.721128 26 0 ff
2313 16:34:04.724206 27 0 ff
2314 16:34:04.724351 28 0 ff
2315 16:34:04.727940 29 0 ff
2316 16:34:04.728049 30 0 ff
2317 16:34:04.731099 31 0 ff
2318 16:34:04.731207 32 0 ff
2319 16:34:04.731283 33 ff ff
2320 16:34:04.734361 34 ff ff
2321 16:34:04.734471 35 ff ff
2322 16:34:04.737649 36 ff ff
2323 16:34:04.737754 37 ff ff
2324 16:34:04.740915 38 ff ff
2325 16:34:04.741031 39 ff ff
2326 16:34:04.747316 pass bytecount = 0xff (0xff: all bytes pass)
2327 16:34:04.747444
2328 16:34:04.747525 DQS0 dly: 33
2329 16:34:04.747595 DQS1 dly: 26
2330 16:34:04.750766 Write Rank0 MR2 =0x2d
2331 16:34:04.753901 [RankSwap] Rank num 2, (Multi 1), Rank 0
2332 16:34:04.757351 Write Rank0 MR1 =0xd6
2333 16:34:04.757498 [Gating]
2334 16:34:04.757574 ==
2335 16:34:04.763836 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2336 16:34:04.763992 fsp= 1, odt_onoff= 1, Byte mode= 0
2337 16:34:04.766973 ==
2338 16:34:04.770313 3 1 0 |2c2b 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
2339 16:34:04.773461 3 1 4 |2c2b 1312 |(11 11)(11 11) |(1 1)(1 1)| 0
2340 16:34:04.780128 3 1 8 |2c2b 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
2341 16:34:04.783501 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2342 16:34:04.786488 3 1 16 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 0)| 0
2343 16:34:04.793046 3 1 20 |2c2b 3636 |(11 11)(11 11) |(1 0)(1 1)| 0
2344 16:34:04.796606 3 1 24 |2c2b 3130 |(11 11)(11 11) |(1 0)(1 0)| 0
2345 16:34:04.799843 3 1 28 |2c2b 3231 |(11 11)(11 11) |(1 0)(1 1)| 0
2346 16:34:04.806111 [Byte 1] Lead/lag falling Transition (3, 1, 28)
2347 16:34:04.809549 3 2 0 |2c2b 2423 |(11 11)(11 11) |(1 0)(0 1)| 0
2348 16:34:04.813012 3 2 4 |2c2b 3635 |(11 11)(11 11) |(1 0)(0 1)| 0
2349 16:34:04.816133 3 2 8 |2c2b 3433 |(11 11)(11 11) |(1 0)(1 1)| 0
2350 16:34:04.822529 [Byte 1] Lead/lag falling Transition (3, 2, 8)
2351 16:34:04.825853 3 2 12 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2352 16:34:04.828992 3 2 16 |303 3434 |(11 11)(11 11) |(0 0)(0 1)| 0
2353 16:34:04.835910 3 2 20 |3534 606 |(11 11)(11 1) |(0 0)(0 1)| 0
2354 16:34:04.839192 3 2 24 |3534 908 |(11 11)(11 11) |(0 0)(1 1)| 0
2355 16:34:04.842295 3 2 28 |3534 3e3d |(11 11)(11 11) |(0 0)(1 1)| 0
2356 16:34:04.848779 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2357 16:34:04.852057 3 3 4 |3534 f0f |(11 11)(11 11) |(0 0)(1 1)| 0
2358 16:34:04.855253 3 3 8 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
2359 16:34:04.861904 3 3 12 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2360 16:34:04.865170 [Byte 1] Lead/lag Transition tap number (1)
2361 16:34:04.868240 3 3 16 |3534 3b3a |(11 11)(11 11) |(1 1)(0 0)| 0
2362 16:34:04.871841 3 3 20 |3534 3434 |(11 11)(11 11) |(1 1)(1 1)| 0
2363 16:34:04.878441 [Byte 0] Lead/lag falling Transition (3, 3, 20)
2364 16:34:04.881731 3 3 24 |3534 0 |(11 11)(11 11) |(0 1)(1 1)| 0
2365 16:34:04.885048 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2366 16:34:04.891374 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2367 16:34:04.894538 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2368 16:34:04.897808 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2369 16:34:04.904313 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2370 16:34:04.907985 3 4 16 |403 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2371 16:34:04.910842 3 4 20 |707 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2372 16:34:04.917586 3 4 24 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0
2373 16:34:04.920690 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2374 16:34:04.924077 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2375 16:34:04.930655 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2376 16:34:04.933788 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2377 16:34:04.937163 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2378 16:34:04.943704 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2379 16:34:04.947075 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2380 16:34:04.950291 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2381 16:34:04.956984 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2382 16:34:04.960261 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2383 16:34:04.963423 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2384 16:34:04.966574 [Byte 0] Lead/lag falling Transition (3, 6, 4)
2385 16:34:04.973067 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2386 16:34:04.976363 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2387 16:34:04.979618 [Byte 0] Lead/lag Transition tap number (3)
2388 16:34:04.986177 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2389 16:34:04.989446 [Byte 1] Lead/lag Transition tap number (1)
2390 16:34:04.992804 3 6 20 |4646 3a3a |(0 0)(11 11) |(0 0)(0 0)| 0
2391 16:34:04.995966 [Byte 0]First pass (3, 6, 20)
2392 16:34:04.999570 3 6 24 |4646 606 |(0 0)(11 11) |(0 0)(0 0)| 0
2393 16:34:05.002588 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2394 16:34:05.005733 [Byte 1]First pass (3, 6, 28)
2395 16:34:05.008990 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2396 16:34:05.015894 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2397 16:34:05.019143 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2398 16:34:05.022383 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2399 16:34:05.025581 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2400 16:34:05.032779 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2401 16:34:05.035645 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2402 16:34:05.038649 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2403 16:34:05.041874 All bytes gating window > 1UI, Early break!
2404 16:34:05.041979
2405 16:34:05.045213 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
2406 16:34:05.045310
2407 16:34:05.051954 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
2408 16:34:05.052076
2409 16:34:05.052151
2410 16:34:05.052218
2411 16:34:05.055178 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
2412 16:34:05.055274
2413 16:34:05.058504 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
2414 16:34:05.058598
2415 16:34:05.058671
2416 16:34:05.061811 Write Rank0 MR1 =0x56
2417 16:34:05.061906
2418 16:34:05.065063 best RODT dly(2T, 0.5T) = (2, 3)
2419 16:34:05.065156
2420 16:34:05.068113 best RODT dly(2T, 0.5T) = (2, 3)
2421 16:34:05.068209 ==
2422 16:34:05.071333 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2423 16:34:05.074586 fsp= 1, odt_onoff= 1, Byte mode= 0
2424 16:34:05.074691 ==
2425 16:34:05.081351 Start DQ dly to find pass range UseTestEngine =0
2426 16:34:05.084611 x-axis: bit #, y-axis: DQ dly (-127~63)
2427 16:34:05.084752 RX Vref Scan = 0
2428 16:34:05.087930 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2429 16:34:05.091068 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2430 16:34:05.094548 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2431 16:34:05.097847 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2432 16:34:05.101081 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2433 16:34:05.104360 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2434 16:34:05.107466 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2435 16:34:05.107586 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2436 16:34:05.110689 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2437 16:34:05.114198 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2438 16:34:05.117350 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2439 16:34:05.120684 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2440 16:34:05.124047 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2441 16:34:05.127215 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2442 16:34:05.130460 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2443 16:34:05.133600 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2444 16:34:05.133707 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2445 16:34:05.136751 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2446 16:34:05.140044 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2447 16:34:05.143664 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2448 16:34:05.146937 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2449 16:34:05.149913 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2450 16:34:05.153302 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2451 16:34:05.156435 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2452 16:34:05.156538 -2, [0] xxxxxxxx xoxxxxxo [MSB]
2453 16:34:05.159866 -1, [0] xxxoxxxx ooxxxxxo [MSB]
2454 16:34:05.163049 0, [0] xxxoxxxx ooxxxxxo [MSB]
2455 16:34:05.166240 1, [0] xxxoxxxx ooxxxxxo [MSB]
2456 16:34:05.169416 2, [0] xxooxxxx ooxxxxxo [MSB]
2457 16:34:05.172705 3, [0] xxooxxxo ooooxxxo [MSB]
2458 16:34:05.176232 4, [0] xxooxxxo ooooxxxo [MSB]
2459 16:34:05.176336 5, [0] xooooxxo oooooooo [MSB]
2460 16:34:05.179456 6, [0] oooooxoo oooooooo [MSB]
2461 16:34:05.182806 7, [0] oooooxoo oooooooo [MSB]
2462 16:34:05.185939 32, [0] oooooooo ooooooox [MSB]
2463 16:34:05.189179 33, [0] oooooooo ooooooox [MSB]
2464 16:34:05.192467 34, [0] oooooooo ooooooox [MSB]
2465 16:34:05.195913 35, [0] ooxooooo oxooooox [MSB]
2466 16:34:05.196018 36, [0] ooxxoooo oxooooox [MSB]
2467 16:34:05.199178 37, [0] ooxxoooo xxooooox [MSB]
2468 16:34:05.202343 38, [0] ooxxoooo xxooooox [MSB]
2469 16:34:05.205701 39, [0] oxxxooox xxxxxoox [MSB]
2470 16:34:05.208784 40, [0] oxxxxoox xxxxxoox [MSB]
2471 16:34:05.212026 41, [0] xxxxxoxx xxxxxxxx [MSB]
2472 16:34:05.215288 42, [0] xxxxxoxx xxxxxxxx [MSB]
2473 16:34:05.218838 43, [0] xxxxxxxx xxxxxxxx [MSB]
2474 16:34:05.221872 iDelay=43, Bit 0, Center 23 (6 ~ 40) 35
2475 16:34:05.225091 iDelay=43, Bit 1, Center 21 (5 ~ 38) 34
2476 16:34:05.228353 iDelay=43, Bit 2, Center 18 (2 ~ 34) 33
2477 16:34:05.231630 iDelay=43, Bit 3, Center 17 (-1 ~ 35) 37
2478 16:34:05.235271 iDelay=43, Bit 4, Center 22 (5 ~ 39) 35
2479 16:34:05.238416 iDelay=43, Bit 5, Center 25 (8 ~ 42) 35
2480 16:34:05.241567 iDelay=43, Bit 6, Center 23 (6 ~ 40) 35
2481 16:34:05.244757 iDelay=43, Bit 7, Center 20 (3 ~ 38) 36
2482 16:34:05.248056 iDelay=43, Bit 8, Center 17 (-1 ~ 36) 38
2483 16:34:05.251325 iDelay=43, Bit 9, Center 16 (-2 ~ 34) 37
2484 16:34:05.254544 iDelay=43, Bit 10, Center 20 (3 ~ 38) 36
2485 16:34:05.261404 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
2486 16:34:05.264301 iDelay=43, Bit 12, Center 21 (5 ~ 38) 34
2487 16:34:05.267902 iDelay=43, Bit 13, Center 22 (5 ~ 40) 36
2488 16:34:05.271202 iDelay=43, Bit 14, Center 22 (5 ~ 40) 36
2489 16:34:05.274420 iDelay=43, Bit 15, Center 13 (-4 ~ 31) 36
2490 16:34:05.274534 ==
2491 16:34:05.280764 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2492 16:34:05.284261 fsp= 1, odt_onoff= 1, Byte mode= 0
2493 16:34:05.284411 ==
2494 16:34:05.284495 DQS Delay:
2495 16:34:05.287351 DQS0 = 0, DQS1 = 0
2496 16:34:05.287479 DQM Delay:
2497 16:34:05.287560 DQM0 = 21, DQM1 = 18
2498 16:34:05.290597 DQ Delay:
2499 16:34:05.294182 DQ0 =23, DQ1 =21, DQ2 =18, DQ3 =17
2500 16:34:05.297362 DQ4 =22, DQ5 =25, DQ6 =23, DQ7 =20
2501 16:34:05.300827 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =20
2502 16:34:05.303785 DQ12 =21, DQ13 =22, DQ14 =22, DQ15 =13
2503 16:34:05.303925
2504 16:34:05.304005
2505 16:34:05.304073 DramC Write-DBI off
2506 16:34:05.304140 ==
2507 16:34:05.310388 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2508 16:34:05.313409 fsp= 1, odt_onoff= 1, Byte mode= 0
2509 16:34:05.313573 ==
2510 16:34:05.316720 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2511 16:34:05.316874
2512 16:34:05.320053 Begin, DQ Scan Range 922~1178
2513 16:34:05.320169
2514 16:34:05.320270
2515 16:34:05.323385 TX Vref Scan disable
2516 16:34:05.326899 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2517 16:34:05.330156 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2518 16:34:05.333378 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2519 16:34:05.336736 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2520 16:34:05.339950 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2521 16:34:05.343081 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2522 16:34:05.346479 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2523 16:34:05.353062 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2524 16:34:05.355884 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2525 16:34:05.359520 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2526 16:34:05.362758 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2527 16:34:05.365948 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2528 16:34:05.369026 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2529 16:34:05.372351 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2530 16:34:05.375589 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2531 16:34:05.378947 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2532 16:34:05.382162 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2533 16:34:05.385418 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2534 16:34:05.388740 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2535 16:34:05.391935 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2536 16:34:05.398762 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2537 16:34:05.401748 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2538 16:34:05.405336 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2539 16:34:05.408299 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2540 16:34:05.411751 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2541 16:34:05.414991 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2542 16:34:05.418149 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2543 16:34:05.421560 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2544 16:34:05.424969 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2545 16:34:05.427906 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2546 16:34:05.431473 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2547 16:34:05.434849 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2548 16:34:05.437908 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2549 16:34:05.444647 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2550 16:34:05.447778 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2551 16:34:05.451013 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2552 16:34:05.454327 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2553 16:34:05.457750 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2554 16:34:05.460705 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2555 16:34:05.463970 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2556 16:34:05.467469 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2557 16:34:05.470821 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2558 16:34:05.473984 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2559 16:34:05.477212 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2560 16:34:05.480303 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2561 16:34:05.483927 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2562 16:34:05.487293 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2563 16:34:05.490279 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2564 16:34:05.493698 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2565 16:34:05.500039 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2566 16:34:05.503293 972 |3 6 12|[0] xxxxxxxx ooxxxxxo [MSB]
2567 16:34:05.506625 973 |3 6 13|[0] xxxxxxxx ooxxxxxo [MSB]
2568 16:34:05.510017 974 |3 6 14|[0] xxxxxxxx oooxxxxo [MSB]
2569 16:34:05.513337 975 |3 6 15|[0] xxxxxxxx oooxoxxo [MSB]
2570 16:34:05.516642 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2571 16:34:05.519838 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2572 16:34:05.522958 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2573 16:34:05.526242 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2574 16:34:05.529439 980 |3 6 20|[0] xxoooxxx oooooooo [MSB]
2575 16:34:05.532702 981 |3 6 21|[0] xooooxoo oooooooo [MSB]
2576 16:34:05.539894 987 |3 6 27|[0] oooooooo ooooooox [MSB]
2577 16:34:05.542836 988 |3 6 28|[0] oooooooo ooooooox [MSB]
2578 16:34:05.546448 989 |3 6 29|[0] oooooooo ooooooox [MSB]
2579 16:34:05.549454 990 |3 6 30|[0] oooooooo ooooooox [MSB]
2580 16:34:05.553015 991 |3 6 31|[0] oooooooo oxooooox [MSB]
2581 16:34:05.556193 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2582 16:34:05.559265 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2583 16:34:05.562775 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2584 16:34:05.566121 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2585 16:34:05.569287 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2586 16:34:05.572517 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2587 16:34:05.575987 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
2588 16:34:05.582298 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2589 16:34:05.585788 1000 |3 6 40|[0] ooxxoooo xxxxxxxx [MSB]
2590 16:34:05.588845 1001 |3 6 41|[0] ooxxoooo xxxxxxxx [MSB]
2591 16:34:05.592144 1002 |3 6 42|[0] oxxxxoxx xxxxxxxx [MSB]
2592 16:34:05.595647 1003 |3 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
2593 16:34:05.598916 Byte0, DQ PI dly=990, DQM PI dly= 990
2594 16:34:05.602178 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 30)
2595 16:34:05.602325
2596 16:34:05.608738 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 30)
2597 16:34:05.608889
2598 16:34:05.611741 Byte1, DQ PI dly=981, DQM PI dly= 981
2599 16:34:05.615026 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
2600 16:34:05.615174
2601 16:34:05.618281 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
2602 16:34:05.618385
2603 16:34:05.621681 ==
2604 16:34:05.624987 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2605 16:34:05.628277 fsp= 1, odt_onoff= 1, Byte mode= 0
2606 16:34:05.628414 ==
2607 16:34:05.631528 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2608 16:34:05.631675
2609 16:34:05.634876 Begin, DQ Scan Range 957~1021
2610 16:34:05.638091 Write Rank0 MR14 =0x0
2611 16:34:05.646038
2612 16:34:05.649299 CH=1, VrefRange= 0, VrefLevel = 0
2613 16:34:05.652425 TX Bit0 (984~998) 15 991, Bit8 (974~987) 14 980,
2614 16:34:05.655528 TX Bit1 (982~998) 17 990, Bit9 (975~985) 11 980,
2615 16:34:05.662413 TX Bit2 (981~996) 16 988, Bit10 (976~990) 15 983,
2616 16:34:05.665578 TX Bit3 (978~992) 15 985, Bit11 (978~990) 13 984,
2617 16:34:05.668580 TX Bit4 (982~997) 16 989, Bit12 (977~990) 14 983,
2618 16:34:05.675399 TX Bit5 (984~998) 15 991, Bit13 (978~991) 14 984,
2619 16:34:05.678813 TX Bit6 (984~997) 14 990, Bit14 (977~990) 14 983,
2620 16:34:05.685273 TX Bit7 (984~997) 14 990, Bit15 (972~982) 11 977,
2621 16:34:05.685413
2622 16:34:05.685556 Write Rank0 MR14 =0x2
2623 16:34:05.694640
2624 16:34:05.694771 CH=1, VrefRange= 0, VrefLevel = 2
2625 16:34:05.700951 TX Bit0 (985~999) 15 992, Bit8 (974~988) 15 981,
2626 16:34:05.704295 TX Bit1 (982~998) 17 990, Bit9 (974~986) 13 980,
2627 16:34:05.710937 TX Bit2 (980~996) 17 988, Bit10 (976~991) 16 983,
2628 16:34:05.714251 TX Bit3 (977~993) 17 985, Bit11 (978~990) 13 984,
2629 16:34:05.717531 TX Bit4 (982~998) 17 990, Bit12 (977~991) 15 984,
2630 16:34:05.723767 TX Bit5 (984~999) 16 991, Bit13 (977~991) 15 984,
2631 16:34:05.727041 TX Bit6 (984~998) 15 991, Bit14 (977~990) 14 983,
2632 16:34:05.733654 TX Bit7 (984~998) 15 991, Bit15 (972~983) 12 977,
2633 16:34:05.733796
2634 16:34:05.733876 Write Rank0 MR14 =0x4
2635 16:34:05.743065
2636 16:34:05.743231 CH=1, VrefRange= 0, VrefLevel = 4
2637 16:34:05.749427 TX Bit0 (984~999) 16 991, Bit8 (974~989) 16 981,
2638 16:34:05.752798 TX Bit1 (982~999) 18 990, Bit9 (974~986) 13 980,
2639 16:34:05.759506 TX Bit2 (980~997) 18 988, Bit10 (976~991) 16 983,
2640 16:34:05.762804 TX Bit3 (977~994) 18 985, Bit11 (977~991) 15 984,
2641 16:34:05.766039 TX Bit4 (982~998) 17 990, Bit12 (977~991) 15 984,
2642 16:34:05.772440 TX Bit5 (984~999) 16 991, Bit13 (977~991) 15 984,
2643 16:34:05.775663 TX Bit6 (983~998) 16 990, Bit14 (977~991) 15 984,
2644 16:34:05.782314 TX Bit7 (983~998) 16 990, Bit15 (971~983) 13 977,
2645 16:34:05.782474
2646 16:34:05.782559 Write Rank0 MR14 =0x6
2647 16:34:05.791703
2648 16:34:05.791881 CH=1, VrefRange= 0, VrefLevel = 6
2649 16:34:05.798291 TX Bit0 (984~1000) 17 992, Bit8 (973~990) 18 981,
2650 16:34:05.801363 TX Bit1 (982~999) 18 990, Bit9 (973~987) 15 980,
2651 16:34:05.807949 TX Bit2 (980~997) 18 988, Bit10 (975~991) 17 983,
2652 16:34:05.811325 TX Bit3 (977~995) 19 986, Bit11 (977~991) 15 984,
2653 16:34:05.814686 TX Bit4 (981~998) 18 989, Bit12 (977~991) 15 984,
2654 16:34:05.820874 TX Bit5 (984~999) 16 991, Bit13 (977~992) 16 984,
2655 16:34:05.824224 TX Bit6 (982~999) 18 990, Bit14 (977~991) 15 984,
2656 16:34:05.830811 TX Bit7 (983~999) 17 991, Bit15 (970~984) 15 977,
2657 16:34:05.830933
2658 16:34:05.831012 Write Rank0 MR14 =0x8
2659 16:34:05.840619
2660 16:34:05.840740 CH=1, VrefRange= 0, VrefLevel = 8
2661 16:34:05.847067 TX Bit0 (984~1000) 17 992, Bit8 (972~990) 19 981,
2662 16:34:05.850339 TX Bit1 (982~1000) 19 991, Bit9 (973~987) 15 980,
2663 16:34:05.856813 TX Bit2 (980~998) 19 989, Bit10 (975~992) 18 983,
2664 16:34:05.859905 TX Bit3 (977~996) 20 986, Bit11 (977~992) 16 984,
2665 16:34:05.863591 TX Bit4 (981~999) 19 990, Bit12 (976~992) 17 984,
2666 16:34:05.869841 TX Bit5 (984~1000) 17 992, Bit13 (977~992) 16 984,
2667 16:34:05.873365 TX Bit6 (982~999) 18 990, Bit14 (977~991) 15 984,
2668 16:34:05.879891 TX Bit7 (982~999) 18 990, Bit15 (970~984) 15 977,
2669 16:34:05.880053
2670 16:34:05.880169 Write Rank0 MR14 =0xa
2671 16:34:05.889570
2672 16:34:05.892963 CH=1, VrefRange= 0, VrefLevel = 10
2673 16:34:05.896259 TX Bit0 (984~1001) 18 992, Bit8 (972~991) 20 981,
2674 16:34:05.899580 TX Bit1 (981~1000) 20 990, Bit9 (972~989) 18 980,
2675 16:34:05.906227 TX Bit2 (979~998) 20 988, Bit10 (975~992) 18 983,
2676 16:34:05.909362 TX Bit3 (977~996) 20 986, Bit11 (976~992) 17 984,
2677 16:34:05.916011 TX Bit4 (981~1000) 20 990, Bit12 (976~992) 17 984,
2678 16:34:05.919029 TX Bit5 (983~1000) 18 991, Bit13 (976~993) 18 984,
2679 16:34:05.922322 TX Bit6 (982~999) 18 990, Bit14 (976~992) 17 984,
2680 16:34:05.928828 TX Bit7 (982~999) 18 990, Bit15 (970~985) 16 977,
2681 16:34:05.928969
2682 16:34:05.929044 Write Rank0 MR14 =0xc
2683 16:34:05.939060
2684 16:34:05.942315 CH=1, VrefRange= 0, VrefLevel = 12
2685 16:34:05.945185 TX Bit0 (983~1001) 19 992, Bit8 (971~991) 21 981,
2686 16:34:05.948922 TX Bit1 (981~1000) 20 990, Bit9 (971~989) 19 980,
2687 16:34:05.955329 TX Bit2 (978~998) 21 988, Bit10 (974~993) 20 983,
2688 16:34:05.958400 TX Bit3 (977~997) 21 987, Bit11 (976~993) 18 984,
2689 16:34:05.965089 TX Bit4 (980~1000) 21 990, Bit12 (976~992) 17 984,
2690 16:34:05.968262 TX Bit5 (983~1001) 19 992, Bit13 (976~993) 18 984,
2691 16:34:05.971520 TX Bit6 (982~1000) 19 991, Bit14 (976~992) 17 984,
2692 16:34:05.978160 TX Bit7 (982~1000) 19 991, Bit15 (970~986) 17 978,
2693 16:34:05.978305
2694 16:34:05.978384 Write Rank0 MR14 =0xe
2695 16:34:05.988460
2696 16:34:05.991727 CH=1, VrefRange= 0, VrefLevel = 14
2697 16:34:05.994855 TX Bit0 (983~1002) 20 992, Bit8 (971~991) 21 981,
2698 16:34:05.998537 TX Bit1 (981~1001) 21 991, Bit9 (971~990) 20 980,
2699 16:34:06.005080 TX Bit2 (978~999) 22 988, Bit10 (974~993) 20 983,
2700 16:34:06.008393 TX Bit3 (977~997) 21 987, Bit11 (976~993) 18 984,
2701 16:34:06.014783 TX Bit4 (980~1000) 21 990, Bit12 (976~993) 18 984,
2702 16:34:06.018152 TX Bit5 (983~1001) 19 992, Bit13 (976~994) 19 985,
2703 16:34:06.021273 TX Bit6 (982~1001) 20 991, Bit14 (976~993) 18 984,
2704 16:34:06.027756 TX Bit7 (981~1000) 20 990, Bit15 (969~986) 18 977,
2705 16:34:06.027900
2706 16:34:06.027981 Write Rank0 MR14 =0x10
2707 16:34:06.038316
2708 16:34:06.041517 CH=1, VrefRange= 0, VrefLevel = 16
2709 16:34:06.044988 TX Bit0 (983~1002) 20 992, Bit8 (971~991) 21 981,
2710 16:34:06.048205 TX Bit1 (980~1002) 23 991, Bit9 (971~990) 20 980,
2711 16:34:06.054753 TX Bit2 (978~999) 22 988, Bit10 (973~993) 21 983,
2712 16:34:06.057734 TX Bit3 (977~998) 22 987, Bit11 (976~994) 19 985,
2713 16:34:06.064509 TX Bit4 (979~1001) 23 990, Bit12 (975~994) 20 984,
2714 16:34:06.067856 TX Bit5 (983~1002) 20 992, Bit13 (975~994) 20 984,
2715 16:34:06.071193 TX Bit6 (980~1001) 22 990, Bit14 (975~993) 19 984,
2716 16:34:06.077589 TX Bit7 (981~1001) 21 991, Bit15 (969~987) 19 978,
2717 16:34:06.077718
2718 16:34:06.077794 Write Rank0 MR14 =0x12
2719 16:34:06.088428
2720 16:34:06.091380 CH=1, VrefRange= 0, VrefLevel = 18
2721 16:34:06.094776 TX Bit0 (982~1003) 22 992, Bit8 (970~992) 23 981,
2722 16:34:06.098071 TX Bit1 (980~1002) 23 991, Bit9 (971~990) 20 980,
2723 16:34:06.104777 TX Bit2 (978~1000) 23 989, Bit10 (973~994) 22 983,
2724 16:34:06.107862 TX Bit3 (976~998) 23 987, Bit11 (975~994) 20 984,
2725 16:34:06.114460 TX Bit4 (979~1001) 23 990, Bit12 (975~994) 20 984,
2726 16:34:06.117594 TX Bit5 (982~1002) 21 992, Bit13 (975~995) 21 985,
2727 16:34:06.120897 TX Bit6 (980~1002) 23 991, Bit14 (975~993) 19 984,
2728 16:34:06.127477 TX Bit7 (980~1001) 22 990, Bit15 (969~988) 20 978,
2729 16:34:06.127603
2730 16:34:06.127679 Write Rank0 MR14 =0x14
2731 16:34:06.138501
2732 16:34:06.141402 CH=1, VrefRange= 0, VrefLevel = 20
2733 16:34:06.145108 TX Bit0 (982~1004) 23 993, Bit8 (970~992) 23 981,
2734 16:34:06.148272 TX Bit1 (979~1003) 25 991, Bit9 (970~991) 22 980,
2735 16:34:06.154674 TX Bit2 (978~1000) 23 989, Bit10 (973~994) 22 983,
2736 16:34:06.157886 TX Bit3 (976~998) 23 987, Bit11 (975~995) 21 985,
2737 16:34:06.164454 TX Bit4 (978~1002) 25 990, Bit12 (975~994) 20 984,
2738 16:34:06.167557 TX Bit5 (981~1003) 23 992, Bit13 (975~995) 21 985,
2739 16:34:06.170941 TX Bit6 (980~1002) 23 991, Bit14 (975~994) 20 984,
2740 16:34:06.177400 TX Bit7 (980~1001) 22 990, Bit15 (968~988) 21 978,
2741 16:34:06.177533
2742 16:34:06.180578 Write Rank0 MR14 =0x16
2743 16:34:06.188468
2744 16:34:06.191727 CH=1, VrefRange= 0, VrefLevel = 22
2745 16:34:06.195005 TX Bit0 (982~1004) 23 993, Bit8 (970~992) 23 981,
2746 16:34:06.198192 TX Bit1 (979~1003) 25 991, Bit9 (970~991) 22 980,
2747 16:34:06.204647 TX Bit2 (977~1000) 24 988, Bit10 (972~994) 23 983,
2748 16:34:06.208149 TX Bit3 (976~998) 23 987, Bit11 (975~995) 21 985,
2749 16:34:06.214583 TX Bit4 (978~1002) 25 990, Bit12 (975~995) 21 985,
2750 16:34:06.217953 TX Bit5 (982~1003) 22 992, Bit13 (975~995) 21 985,
2751 16:34:06.221079 TX Bit6 (980~1003) 24 991, Bit14 (975~995) 21 985,
2752 16:34:06.227573 TX Bit7 (980~1002) 23 991, Bit15 (969~989) 21 979,
2753 16:34:06.227696
2754 16:34:06.227770 Write Rank0 MR14 =0x18
2755 16:34:06.238854
2756 16:34:06.242162 CH=1, VrefRange= 0, VrefLevel = 24
2757 16:34:06.245048 TX Bit0 (981~1005) 25 993, Bit8 (970~993) 24 981,
2758 16:34:06.248477 TX Bit1 (979~1004) 26 991, Bit9 (970~991) 22 980,
2759 16:34:06.254894 TX Bit2 (977~1001) 25 989, Bit10 (972~995) 24 983,
2760 16:34:06.258219 TX Bit3 (976~999) 24 987, Bit11 (974~996) 23 985,
2761 16:34:06.264632 TX Bit4 (978~1003) 26 990, Bit12 (974~995) 22 984,
2762 16:34:06.268015 TX Bit5 (981~1004) 24 992, Bit13 (975~996) 22 985,
2763 16:34:06.271176 TX Bit6 (979~1003) 25 991, Bit14 (974~995) 22 984,
2764 16:34:06.277785 TX Bit7 (979~1003) 25 991, Bit15 (968~990) 23 979,
2765 16:34:06.277903
2766 16:34:06.280857 Write Rank0 MR14 =0x1a
2767 16:34:06.289104
2768 16:34:06.292254 CH=1, VrefRange= 0, VrefLevel = 26
2769 16:34:06.295464 TX Bit0 (981~1005) 25 993, Bit8 (970~993) 24 981,
2770 16:34:06.298805 TX Bit1 (978~1003) 26 990, Bit9 (970~991) 22 980,
2771 16:34:06.305370 TX Bit2 (977~1001) 25 989, Bit10 (972~996) 25 984,
2772 16:34:06.308590 TX Bit3 (975~999) 25 987, Bit11 (974~996) 23 985,
2773 16:34:06.315218 TX Bit4 (978~1003) 26 990, Bit12 (974~997) 24 985,
2774 16:34:06.318540 TX Bit5 (981~1005) 25 993, Bit13 (974~997) 24 985,
2775 16:34:06.321892 TX Bit6 (979~1003) 25 991, Bit14 (974~996) 23 985,
2776 16:34:06.328280 TX Bit7 (979~1003) 25 991, Bit15 (968~990) 23 979,
2777 16:34:06.328436
2778 16:34:06.328541 Write Rank0 MR14 =0x1c
2779 16:34:06.339436
2780 16:34:06.342622 CH=1, VrefRange= 0, VrefLevel = 28
2781 16:34:06.345845 TX Bit0 (980~1005) 26 992, Bit8 (970~993) 24 981,
2782 16:34:06.349199 TX Bit1 (978~1005) 28 991, Bit9 (969~992) 24 980,
2783 16:34:06.355532 TX Bit2 (977~1002) 26 989, Bit10 (971~997) 27 984,
2784 16:34:06.358897 TX Bit3 (975~999) 25 987, Bit11 (973~997) 25 985,
2785 16:34:06.365329 TX Bit4 (978~1004) 27 991, Bit12 (973~997) 25 985,
2786 16:34:06.368897 TX Bit5 (980~1005) 26 992, Bit13 (974~997) 24 985,
2787 16:34:06.371850 TX Bit6 (979~1005) 27 992, Bit14 (974~996) 23 985,
2788 16:34:06.378361 TX Bit7 (979~1004) 26 991, Bit15 (967~990) 24 978,
2789 16:34:06.378479
2790 16:34:06.378555 Write Rank0 MR14 =0x1e
2791 16:34:06.389775
2792 16:34:06.393044 CH=1, VrefRange= 0, VrefLevel = 30
2793 16:34:06.396097 TX Bit0 (980~1006) 27 993, Bit8 (969~993) 25 981,
2794 16:34:06.399445 TX Bit1 (978~1004) 27 991, Bit9 (969~992) 24 980,
2795 16:34:06.405826 TX Bit2 (977~1002) 26 989, Bit10 (972~997) 26 984,
2796 16:34:06.408985 TX Bit3 (975~999) 25 987, Bit11 (973~998) 26 985,
2797 16:34:06.415815 TX Bit4 (978~1004) 27 991, Bit12 (973~997) 25 985,
2798 16:34:06.419039 TX Bit5 (980~1005) 26 992, Bit13 (973~998) 26 985,
2799 16:34:06.422133 TX Bit6 (979~1005) 27 992, Bit14 (974~997) 24 985,
2800 16:34:06.429006 TX Bit7 (978~1004) 27 991, Bit15 (968~991) 24 979,
2801 16:34:06.429138
2802 16:34:06.432008 Write Rank0 MR14 =0x20
2803 16:34:06.439983
2804 16:34:06.443270 CH=1, VrefRange= 0, VrefLevel = 32
2805 16:34:06.446548 TX Bit0 (979~1006) 28 992, Bit8 (970~993) 24 981,
2806 16:34:06.449882 TX Bit1 (978~1005) 28 991, Bit9 (969~992) 24 980,
2807 16:34:06.456645 TX Bit2 (977~1002) 26 989, Bit10 (973~997) 25 985,
2808 16:34:06.459955 TX Bit3 (975~999) 25 987, Bit11 (973~998) 26 985,
2809 16:34:06.466141 TX Bit4 (979~1004) 26 991, Bit12 (972~997) 26 984,
2810 16:34:06.469794 TX Bit5 (979~1005) 27 992, Bit13 (974~997) 24 985,
2811 16:34:06.473065 TX Bit6 (978~1005) 28 991, Bit14 (973~997) 25 985,
2812 16:34:06.479512 TX Bit7 (978~1004) 27 991, Bit15 (967~991) 25 979,
2813 16:34:06.479651
2814 16:34:06.479730 Write Rank0 MR14 =0x22
2815 16:34:06.490639
2816 16:34:06.493775 CH=1, VrefRange= 0, VrefLevel = 34
2817 16:34:06.496959 TX Bit0 (979~1006) 28 992, Bit8 (970~993) 24 981,
2818 16:34:06.500418 TX Bit1 (978~1005) 28 991, Bit9 (969~992) 24 980,
2819 16:34:06.507102 TX Bit2 (977~1002) 26 989, Bit10 (973~997) 25 985,
2820 16:34:06.510250 TX Bit3 (975~999) 25 987, Bit11 (973~998) 26 985,
2821 16:34:06.516910 TX Bit4 (979~1004) 26 991, Bit12 (972~997) 26 984,
2822 16:34:06.519820 TX Bit5 (979~1005) 27 992, Bit13 (974~997) 24 985,
2823 16:34:06.523142 TX Bit6 (978~1005) 28 991, Bit14 (973~997) 25 985,
2824 16:34:06.529833 TX Bit7 (978~1004) 27 991, Bit15 (967~991) 25 979,
2825 16:34:06.529964
2826 16:34:06.530045 Write Rank0 MR14 =0x24
2827 16:34:06.540763
2828 16:34:06.543809 CH=1, VrefRange= 0, VrefLevel = 36
2829 16:34:06.547162 TX Bit0 (979~1006) 28 992, Bit8 (970~993) 24 981,
2830 16:34:06.550466 TX Bit1 (978~1005) 28 991, Bit9 (969~992) 24 980,
2831 16:34:06.557061 TX Bit2 (977~1002) 26 989, Bit10 (973~997) 25 985,
2832 16:34:06.560371 TX Bit3 (975~999) 25 987, Bit11 (973~998) 26 985,
2833 16:34:06.566984 TX Bit4 (979~1004) 26 991, Bit12 (972~997) 26 984,
2834 16:34:06.570191 TX Bit5 (979~1005) 27 992, Bit13 (974~997) 24 985,
2835 16:34:06.573424 TX Bit6 (978~1005) 28 991, Bit14 (973~997) 25 985,
2836 16:34:06.580002 TX Bit7 (978~1004) 27 991, Bit15 (967~991) 25 979,
2837 16:34:06.580131
2838 16:34:06.583321 Write Rank0 MR14 =0x26
2839 16:34:06.591017
2840 16:34:06.594106 CH=1, VrefRange= 0, VrefLevel = 38
2841 16:34:06.597398 TX Bit0 (979~1006) 28 992, Bit8 (970~993) 24 981,
2842 16:34:06.600780 TX Bit1 (978~1005) 28 991, Bit9 (969~992) 24 980,
2843 16:34:06.607450 TX Bit2 (977~1002) 26 989, Bit10 (973~997) 25 985,
2844 16:34:06.610865 TX Bit3 (975~999) 25 987, Bit11 (973~998) 26 985,
2845 16:34:06.617235 TX Bit4 (979~1004) 26 991, Bit12 (972~997) 26 984,
2846 16:34:06.620321 TX Bit5 (979~1005) 27 992, Bit13 (974~997) 24 985,
2847 16:34:06.623757 TX Bit6 (978~1005) 28 991, Bit14 (973~997) 25 985,
2848 16:34:06.630366 TX Bit7 (978~1004) 27 991, Bit15 (967~991) 25 979,
2849 16:34:06.630545
2850 16:34:06.630653
2851 16:34:06.633354 TX Vref found, early break! 382< 393
2852 16:34:06.636857 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
2853 16:34:06.640079 u1DelayCellOfst[0]=6 cells (5 PI)
2854 16:34:06.643226 u1DelayCellOfst[1]=5 cells (4 PI)
2855 16:34:06.646654 u1DelayCellOfst[2]=2 cells (2 PI)
2856 16:34:06.649995 u1DelayCellOfst[3]=0 cells (0 PI)
2857 16:34:06.653214 u1DelayCellOfst[4]=5 cells (4 PI)
2858 16:34:06.656296 u1DelayCellOfst[5]=6 cells (5 PI)
2859 16:34:06.659674 u1DelayCellOfst[6]=5 cells (4 PI)
2860 16:34:06.663025 u1DelayCellOfst[7]=5 cells (4 PI)
2861 16:34:06.666371 Byte0, DQ PI dly=987, DQM PI dly= 989
2862 16:34:06.669591 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 27)
2863 16:34:06.669728
2864 16:34:06.672782 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 27)
2865 16:34:06.675995
2866 16:34:06.676143 u1DelayCellOfst[8]=2 cells (2 PI)
2867 16:34:06.679410 u1DelayCellOfst[9]=1 cells (1 PI)
2868 16:34:06.682710 u1DelayCellOfst[10]=7 cells (6 PI)
2869 16:34:06.685943 u1DelayCellOfst[11]=7 cells (6 PI)
2870 16:34:06.689118 u1DelayCellOfst[12]=6 cells (5 PI)
2871 16:34:06.692436 u1DelayCellOfst[13]=7 cells (6 PI)
2872 16:34:06.695687 u1DelayCellOfst[14]=7 cells (6 PI)
2873 16:34:06.698821 u1DelayCellOfst[15]=0 cells (0 PI)
2874 16:34:06.702170 Byte1, DQ PI dly=979, DQM PI dly= 982
2875 16:34:06.705400 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2876 16:34:06.705557
2877 16:34:06.711826 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2878 16:34:06.711992
2879 16:34:06.712117 Write Rank0 MR14 =0x20
2880 16:34:06.715346
2881 16:34:06.715477 Final TX Range 0 Vref 32
2882 16:34:06.715600
2883 16:34:06.721958 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2884 16:34:06.722116
2885 16:34:06.728169 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2886 16:34:06.734854 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2887 16:34:06.744698 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2888 16:34:06.744847 Write Rank0 MR3 =0xb0
2889 16:34:06.747950 DramC Write-DBI on
2890 16:34:06.748082 ==
2891 16:34:06.751300 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2892 16:34:06.754706 fsp= 1, odt_onoff= 1, Byte mode= 0
2893 16:34:06.754822 ==
2894 16:34:06.760985 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2895 16:34:06.761111
2896 16:34:06.761187 Begin, DQ Scan Range 702~766
2897 16:34:06.764211
2898 16:34:06.764308
2899 16:34:06.764381 TX Vref Scan disable
2900 16:34:06.767840 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2901 16:34:06.771155 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2902 16:34:06.774215 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2903 16:34:06.777349 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2904 16:34:06.780772 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2905 16:34:06.787386 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2906 16:34:06.790484 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2907 16:34:06.793898 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2908 16:34:06.797033 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2909 16:34:06.800395 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2910 16:34:06.803432 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2911 16:34:06.806687 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2912 16:34:06.810317 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2913 16:34:06.813461 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2914 16:34:06.816387 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2915 16:34:06.819775 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2916 16:34:06.823061 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2917 16:34:06.826244 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2918 16:34:06.829824 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2919 16:34:06.836038 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2920 16:34:06.839346 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2921 16:34:06.842525 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2922 16:34:06.849348 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2923 16:34:06.852493 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2924 16:34:06.855749 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2925 16:34:06.859056 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2926 16:34:06.862254 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2927 16:34:06.865537 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2928 16:34:06.868773 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2929 16:34:06.872334 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2930 16:34:06.875549 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2931 16:34:06.878724 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2932 16:34:06.881990 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
2933 16:34:06.885156 Byte0, DQ PI dly=735, DQM PI dly= 735
2934 16:34:06.891754 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
2935 16:34:06.891888
2936 16:34:06.895204 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
2937 16:34:06.895325
2938 16:34:06.898351 Byte1, DQ PI dly=725, DQM PI dly= 725
2939 16:34:06.901690 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
2940 16:34:06.905035
2941 16:34:06.908063 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
2942 16:34:06.908163
2943 16:34:06.914689 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2944 16:34:06.921127 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2945 16:34:06.927889 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2946 16:34:06.931102 Write Rank0 MR3 =0x30
2947 16:34:06.931225 DramC Write-DBI off
2948 16:34:06.931301
2949 16:34:06.934360 [DATLAT]
2950 16:34:06.937741 Freq=1600, CH1 RK0, use_rxtx_scan=0
2951 16:34:06.937853
2952 16:34:06.937929 DATLAT Default: 0xf
2953 16:34:06.940981 7, 0xFFFF, sum=0
2954 16:34:06.941080 8, 0xFFFF, sum=0
2955 16:34:06.944261 9, 0xFFFF, sum=0
2956 16:34:06.944364 10, 0xFFFF, sum=0
2957 16:34:06.947572 11, 0xFFFF, sum=0
2958 16:34:06.947672 12, 0xFFFF, sum=0
2959 16:34:06.950925 13, 0xFFFF, sum=0
2960 16:34:06.951029 14, 0x0, sum=1
2961 16:34:06.951105 15, 0x0, sum=2
2962 16:34:06.954136 16, 0x0, sum=3
2963 16:34:06.954247 17, 0x0, sum=4
2964 16:34:06.960789 pattern=2 first_step=14 total pass=5 best_step=16
2965 16:34:06.960919 ==
2966 16:34:06.964000 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2967 16:34:06.967225 fsp= 1, odt_onoff= 1, Byte mode= 0
2968 16:34:06.967328 ==
2969 16:34:06.973449 Start DQ dly to find pass range UseTestEngine =1
2970 16:34:06.976706 x-axis: bit #, y-axis: DQ dly (-127~63)
2971 16:34:06.976837 RX Vref Scan = 1
2972 16:34:07.085124
2973 16:34:07.085289 RX Vref found, early break!
2974 16:34:07.085368
2975 16:34:07.091448 Final RX Vref 11, apply to both rank0 and 1
2976 16:34:07.091567 ==
2977 16:34:07.094605 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2978 16:34:07.097945 fsp= 1, odt_onoff= 1, Byte mode= 0
2979 16:34:07.098051 ==
2980 16:34:07.101210 DQS Delay:
2981 16:34:07.101309 DQS0 = 0, DQS1 = 0
2982 16:34:07.101384 DQM Delay:
2983 16:34:07.104628 DQM0 = 20, DQM1 = 18
2984 16:34:07.104720 DQ Delay:
2985 16:34:07.107881 DQ0 =21, DQ1 =21, DQ2 =18, DQ3 =16
2986 16:34:07.110838 DQ4 =20, DQ5 =23, DQ6 =23, DQ7 =20
2987 16:34:07.114167 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =20
2988 16:34:07.117379 DQ12 =21, DQ13 =21, DQ14 =21, DQ15 =13
2989 16:34:07.117484
2990 16:34:07.117557
2991 16:34:07.117624
2992 16:34:07.120714 [DramC_TX_OE_Calibration] TA2
2993 16:34:07.124055 Original DQ_B0 (3 6) =30, OEN = 27
2994 16:34:07.127216 Original DQ_B1 (3 6) =30, OEN = 27
2995 16:34:07.130492 23, 0x0, End_B0=23 End_B1=23
2996 16:34:07.133759 24, 0x0, End_B0=24 End_B1=24
2997 16:34:07.133854 25, 0x0, End_B0=25 End_B1=25
2998 16:34:07.137320 26, 0x0, End_B0=26 End_B1=26
2999 16:34:07.140492 27, 0x0, End_B0=27 End_B1=27
3000 16:34:07.143842 28, 0x0, End_B0=28 End_B1=28
3001 16:34:07.147144 29, 0x0, End_B0=29 End_B1=29
3002 16:34:07.147240 30, 0x0, End_B0=30 End_B1=30
3003 16:34:07.150213 31, 0xFFFF, End_B0=30 End_B1=30
3004 16:34:07.156839 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3005 16:34:07.163496 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3006 16:34:07.163605
3007 16:34:07.163698
3008 16:34:07.163789 Write Rank0 MR23 =0x3f
3009 16:34:07.166862 [DQSOSC]
3010 16:34:07.173304 [DQSOSCAuto] RK0, (LSB)MR18= 0xb6b6, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3011 16:34:07.179982 CH1_RK0: MR19=0x202, MR18=0xB6B6, DQSOSC=453, MR23=63, INC=11, DEC=17
3012 16:34:07.182877 Write Rank0 MR23 =0x3f
3013 16:34:07.182974 [DQSOSC]
3014 16:34:07.189747 [DQSOSCAuto] RK0, (LSB)MR18= 0xb6b6, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3015 16:34:07.192879 CH1 RK0: MR19=202, MR18=B6B6
3016 16:34:07.196182 [RankSwap] Rank num 2, (Multi 1), Rank 1
3017 16:34:07.199457 Write Rank0 MR2 =0xad
3018 16:34:07.199561 [Write Leveling]
3019 16:34:07.202613 delay byte0 byte1 byte2 byte3
3020 16:34:07.202708
3021 16:34:07.205980 10 0 0
3022 16:34:07.206063 11 0 0
3023 16:34:07.209220 12 0 0
3024 16:34:07.209335 13 0 0
3025 16:34:07.209444 14 0 0
3026 16:34:07.212609 15 0 0
3027 16:34:07.212689 16 0 0
3028 16:34:07.215819 17 0 0
3029 16:34:07.215897 18 0 0
3030 16:34:07.215964 19 0 0
3031 16:34:07.219141 20 0 0
3032 16:34:07.219267 21 0 0
3033 16:34:07.222396 22 0 0
3034 16:34:07.222494 23 0 0
3035 16:34:07.225653 24 0 0
3036 16:34:07.225754 25 0 0
3037 16:34:07.225829 26 0 0
3038 16:34:07.228870 27 0 ff
3039 16:34:07.228961 28 0 0
3040 16:34:07.231977 29 0 0
3041 16:34:07.232068 30 0 ff
3042 16:34:07.235350 31 0 ff
3043 16:34:07.235441 32 0 ff
3044 16:34:07.235515 33 0 ff
3045 16:34:07.238874 34 0 ff
3046 16:34:07.238966 35 ff ff
3047 16:34:07.242133 36 ff ff
3048 16:34:07.242236 37 ff ff
3049 16:34:07.245100 38 ff ff
3050 16:34:07.245193 39 ff ff
3051 16:34:07.248504 40 ff ff
3052 16:34:07.248626 41 ff ff
3053 16:34:07.251978 pass bytecount = 0xff (0xff: all bytes pass)
3054 16:34:07.254883
3055 16:34:07.254974 DQS0 dly: 35
3056 16:34:07.255045 DQS1 dly: 30
3057 16:34:07.258385 Write Rank0 MR2 =0x2d
3058 16:34:07.261647 [RankSwap] Rank num 2, (Multi 1), Rank 0
3059 16:34:07.264860 Write Rank1 MR1 =0xd6
3060 16:34:07.264949 [Gating]
3061 16:34:07.265038 ==
3062 16:34:07.268140 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3063 16:34:07.271388 fsp= 1, odt_onoff= 1, Byte mode= 0
3064 16:34:07.274531 ==
3065 16:34:07.277926 3 1 0 |2c2b 3636 |(11 11)(0 0) |(1 1)(0 0)| 0
3066 16:34:07.281195 3 1 4 |2c2b 3635 |(11 11)(11 11) |(1 1)(0 0)| 0
3067 16:34:07.284625 3 1 8 |2c2b 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
3068 16:34:07.291222 3 1 12 |2c2b 3635 |(11 11)(11 11) |(0 0)(1 1)| 0
3069 16:34:07.294499 3 1 16 |2c2b 3736 |(11 11)(11 11) |(1 0)(0 0)| 0
3070 16:34:07.297695 3 1 20 |2c2b 3636 |(11 11)(11 11) |(1 0)(0 0)| 0
3071 16:34:07.304066 3 1 24 |2c2b 3635 |(11 11)(11 11) |(1 0)(1 1)| 0
3072 16:34:07.307629 3 1 28 |2c2b 3636 |(11 11)(0 0) |(1 0)(1 1)| 0
3073 16:34:07.310929 3 2 0 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 1)| 0
3074 16:34:07.317159 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3075 16:34:07.320562 3 2 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 0)| 0
3076 16:34:07.323865 3 2 12 |2c2b 3433 |(11 11)(11 11) |(1 0)(0 1)| 0
3077 16:34:07.330488 3 2 16 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
3078 16:34:07.333519 3 2 20 |302 3434 |(11 1)(11 11) |(0 0)(0 1)| 0
3079 16:34:07.336796 3 2 24 |3534 3434 |(11 11)(11 10) |(0 0)(1 1)| 0
3080 16:34:07.343596 3 2 28 |3534 3c3b |(11 11)(11 11) |(0 0)(1 1)| 0
3081 16:34:07.346908 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3082 16:34:07.350188 3 3 4 |3534 2827 |(11 11)(11 11) |(0 0)(1 1)| 0
3083 16:34:07.356527 3 3 8 |3534 3d3c |(11 11)(11 11) |(0 0)(1 1)| 0
3084 16:34:07.360000 3 3 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3085 16:34:07.363181 3 3 16 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
3086 16:34:07.369898 3 3 20 |3534 3c3b |(11 11)(11 11) |(1 1)(1 1)| 0
3087 16:34:07.372956 [Byte 0] Lead/lag falling Transition (3, 3, 20)
3088 16:34:07.376041 3 3 24 |3534 3d3c |(11 11)(11 11) |(0 1)(1 1)| 0
3089 16:34:07.382907 3 3 28 |3534 807 |(11 11)(11 11) |(0 1)(1 1)| 0
3090 16:34:07.386231 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3091 16:34:07.389373 [Byte 1] Lead/lag falling Transition (3, 4, 0)
3092 16:34:07.392574 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3093 16:34:07.399192 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3094 16:34:07.402419 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3095 16:34:07.405616 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3096 16:34:07.412128 3 4 20 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3097 16:34:07.415382 3 4 24 |3d3d 807 |(11 11)(11 11) |(1 1)(1 1)| 0
3098 16:34:07.418628 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3099 16:34:07.425179 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3100 16:34:07.428434 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3101 16:34:07.431867 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3102 16:34:07.438347 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3103 16:34:07.441556 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3104 16:34:07.445176 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3105 16:34:07.451350 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3106 16:34:07.454942 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3107 16:34:07.458215 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3108 16:34:07.464574 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3109 16:34:07.467778 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3110 16:34:07.471213 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3111 16:34:07.477896 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3112 16:34:07.480937 [Byte 0] Lead/lag Transition tap number (2)
3113 16:34:07.484149 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3114 16:34:07.490712 [Byte 1] Lead/lag falling Transition (3, 6, 16)
3115 16:34:07.493925 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3116 16:34:07.497197 [Byte 1] Lead/lag Transition tap number (2)
3117 16:34:07.500469 3 6 24 |4646 909 |(0 0)(11 11) |(0 0)(0 0)| 0
3118 16:34:07.503833 [Byte 0]First pass (3, 6, 24)
3119 16:34:07.507122 3 6 28 |4646 3434 |(0 0)(11 11) |(0 0)(0 0)| 0
3120 16:34:07.513427 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3121 16:34:07.513608 [Byte 1]First pass (3, 7, 0)
3122 16:34:07.519910 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3123 16:34:07.523272 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3124 16:34:07.526817 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3125 16:34:07.529948 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3126 16:34:07.536634 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3127 16:34:07.539900 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3128 16:34:07.543011 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3129 16:34:07.546284 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3130 16:34:07.549399 All bytes gating window > 1UI, Early break!
3131 16:34:07.549544
3132 16:34:07.556158 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
3133 16:34:07.556310
3134 16:34:07.559558 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
3135 16:34:07.559677
3136 16:34:07.559763
3137 16:34:07.559833
3138 16:34:07.562417 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
3139 16:34:07.562525
3140 16:34:07.565778 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
3141 16:34:07.565906
3142 16:34:07.566005
3143 16:34:07.569223 Write Rank1 MR1 =0x56
3144 16:34:07.569369
3145 16:34:07.572340 best RODT dly(2T, 0.5T) = (2, 3)
3146 16:34:07.572466
3147 16:34:07.575769 best RODT dly(2T, 0.5T) = (2, 3)
3148 16:34:07.575873 ==
3149 16:34:07.582451 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3150 16:34:07.582585 fsp= 1, odt_onoff= 1, Byte mode= 0
3151 16:34:07.585664 ==
3152 16:34:07.588694 Start DQ dly to find pass range UseTestEngine =0
3153 16:34:07.592233 x-axis: bit #, y-axis: DQ dly (-127~63)
3154 16:34:07.592333 RX Vref Scan = 0
3155 16:34:07.595333 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3156 16:34:07.598607 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3157 16:34:07.601758 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3158 16:34:07.605243 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3159 16:34:07.608577 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3160 16:34:07.611758 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3161 16:34:07.614963 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3162 16:34:07.618267 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3163 16:34:07.618367 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3164 16:34:07.621439 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3165 16:34:07.624725 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3166 16:34:07.627942 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3167 16:34:07.631225 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3168 16:34:07.634538 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3169 16:34:07.637907 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3170 16:34:07.641215 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3171 16:34:07.644561 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3172 16:34:07.647838 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3173 16:34:07.647952 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3174 16:34:07.651003 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3175 16:34:07.654083 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3176 16:34:07.657450 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3177 16:34:07.660776 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3178 16:34:07.664086 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3179 16:34:07.667464 -2, [0] xxxxxxxx xxxxxxxo [MSB]
3180 16:34:07.667610 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3181 16:34:07.670736 0, [0] xxxoxxxx ooxxxxxo [MSB]
3182 16:34:07.673798 1, [0] xxxoxxxx ooxxxxxo [MSB]
3183 16:34:07.677284 2, [0] xxxoxxxx ooxxoxxo [MSB]
3184 16:34:07.680511 3, [0] oxoooxxo oooxooxo [MSB]
3185 16:34:07.683826 4, [0] oooooxxo oooooooo [MSB]
3186 16:34:07.686976 5, [0] oooooxoo oooooooo [MSB]
3187 16:34:07.687092 32, [0] oooooooo ooooooox [MSB]
3188 16:34:07.690321 33, [0] oooooooo ooooooox [MSB]
3189 16:34:07.693524 34, [0] oooooooo oxooooox [MSB]
3190 16:34:07.696793 35, [0] ooxxoooo oxooooox [MSB]
3191 16:34:07.700075 36, [0] ooxxoooo xxooooox [MSB]
3192 16:34:07.703344 37, [0] ooxxoooo xxooooox [MSB]
3193 16:34:07.706523 38, [0] ooxxoooo xxooooox [MSB]
3194 16:34:07.709808 39, [0] oxxxooox xxooooox [MSB]
3195 16:34:07.709992 40, [0] oxxxooox xxxxooox [MSB]
3196 16:34:07.713208 41, [0] xxxxxoxx xxxxxoox [MSB]
3197 16:34:07.716233 42, [0] xxxxxoxx xxxxxoxx [MSB]
3198 16:34:07.719922 43, [0] xxxxxxxx xxxxxxxx [MSB]
3199 16:34:07.722961 iDelay=43, Bit 0, Center 21 (3 ~ 40) 38
3200 16:34:07.726131 iDelay=43, Bit 1, Center 21 (4 ~ 38) 35
3201 16:34:07.729708 iDelay=43, Bit 2, Center 18 (3 ~ 34) 32
3202 16:34:07.732994 iDelay=43, Bit 3, Center 16 (-1 ~ 34) 36
3203 16:34:07.735922 iDelay=43, Bit 4, Center 21 (3 ~ 40) 38
3204 16:34:07.742518 iDelay=43, Bit 5, Center 24 (6 ~ 42) 37
3205 16:34:07.745817 iDelay=43, Bit 6, Center 22 (5 ~ 40) 36
3206 16:34:07.749148 iDelay=43, Bit 7, Center 20 (3 ~ 38) 36
3207 16:34:07.752512 iDelay=43, Bit 8, Center 17 (-1 ~ 35) 37
3208 16:34:07.755804 iDelay=43, Bit 9, Center 16 (-1 ~ 33) 35
3209 16:34:07.759011 iDelay=43, Bit 10, Center 21 (3 ~ 39) 37
3210 16:34:07.762365 iDelay=43, Bit 11, Center 21 (4 ~ 39) 36
3211 16:34:07.765518 iDelay=43, Bit 12, Center 21 (2 ~ 40) 39
3212 16:34:07.768770 iDelay=43, Bit 13, Center 22 (3 ~ 42) 40
3213 16:34:07.771922 iDelay=43, Bit 14, Center 22 (4 ~ 41) 38
3214 16:34:07.778431 iDelay=43, Bit 15, Center 13 (-4 ~ 31) 36
3215 16:34:07.778540 ==
3216 16:34:07.781633 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3217 16:34:07.785145 fsp= 1, odt_onoff= 1, Byte mode= 0
3218 16:34:07.785275 ==
3219 16:34:07.788375 DQS Delay:
3220 16:34:07.788461 DQS0 = 0, DQS1 = 0
3221 16:34:07.788540 DQM Delay:
3222 16:34:07.791740 DQM0 = 20, DQM1 = 19
3223 16:34:07.791828 DQ Delay:
3224 16:34:07.794957 DQ0 =21, DQ1 =21, DQ2 =18, DQ3 =16
3225 16:34:07.798080 DQ4 =21, DQ5 =24, DQ6 =22, DQ7 =20
3226 16:34:07.801378 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =21
3227 16:34:07.804835 DQ12 =21, DQ13 =22, DQ14 =22, DQ15 =13
3228 16:34:07.804958
3229 16:34:07.805038
3230 16:34:07.808149 DramC Write-DBI off
3231 16:34:07.808268 ==
3232 16:34:07.811454 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3233 16:34:07.814771 fsp= 1, odt_onoff= 1, Byte mode= 0
3234 16:34:07.814896 ==
3235 16:34:07.821076 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3236 16:34:07.821192
3237 16:34:07.824414 Begin, DQ Scan Range 926~1182
3238 16:34:07.824533
3239 16:34:07.824649
3240 16:34:07.824778 TX Vref Scan disable
3241 16:34:07.827641 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3242 16:34:07.834275 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3243 16:34:07.837570 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3244 16:34:07.840865 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3245 16:34:07.844060 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3246 16:34:07.847263 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3247 16:34:07.850532 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3248 16:34:07.853846 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3249 16:34:07.857116 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3250 16:34:07.860336 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3251 16:34:07.863592 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3252 16:34:07.866812 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3253 16:34:07.870167 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3254 16:34:07.873351 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3255 16:34:07.879886 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3256 16:34:07.883210 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3257 16:34:07.886520 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3258 16:34:07.889912 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3259 16:34:07.893127 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3260 16:34:07.896444 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3261 16:34:07.899813 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3262 16:34:07.903009 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3263 16:34:07.906399 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3264 16:34:07.909413 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3265 16:34:07.913017 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3266 16:34:07.915894 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3267 16:34:07.919500 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3268 16:34:07.926109 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3269 16:34:07.929324 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3270 16:34:07.932546 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3271 16:34:07.935598 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3272 16:34:07.939115 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3273 16:34:07.942288 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3274 16:34:07.945780 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3275 16:34:07.948900 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3276 16:34:07.952011 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3277 16:34:07.955383 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3278 16:34:07.958642 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3279 16:34:07.961880 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3280 16:34:07.965174 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3281 16:34:07.968540 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3282 16:34:07.971413 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3283 16:34:07.978005 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3284 16:34:07.981219 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3285 16:34:07.984533 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3286 16:34:07.988146 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3287 16:34:07.991324 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3288 16:34:07.994535 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3289 16:34:07.997824 974 |3 6 14|[0] xxxxxxxx xxxxxxxx [MSB]
3290 16:34:08.001075 975 |3 6 15|[0] xxxxxxxx xoxxxxxo [MSB]
3291 16:34:08.004239 976 |3 6 16|[0] xxxxxxxx xoxxxxxo [MSB]
3292 16:34:08.007424 977 |3 6 17|[0] xxxxxxxx oooxxxoo [MSB]
3293 16:34:08.011048 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
3294 16:34:08.014260 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3295 16:34:08.017393 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3296 16:34:08.023946 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3297 16:34:08.027263 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
3298 16:34:08.030635 983 |3 6 23|[0] xooooxoo oooooooo [MSB]
3299 16:34:08.033986 992 |3 6 32|[0] oooooooo ooooooox [MSB]
3300 16:34:08.037059 993 |3 6 33|[0] oooooooo oxooooox [MSB]
3301 16:34:08.040167 994 |3 6 34|[0] oooooooo xxooooox [MSB]
3302 16:34:08.043558 995 |3 6 35|[0] oooooooo xxooooox [MSB]
3303 16:34:08.050132 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3304 16:34:08.053378 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3305 16:34:08.056830 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3306 16:34:08.060052 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3307 16:34:08.063251 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3308 16:34:08.066481 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3309 16:34:08.069788 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
3310 16:34:08.072914 1003 |3 6 43|[0] ooxxoooo xxxxxxxx [MSB]
3311 16:34:08.076532 1004 |3 6 44|[0] ooxxooox xxxxxxxx [MSB]
3312 16:34:08.079570 1005 |3 6 45|[0] ooxxooox xxxxxxxx [MSB]
3313 16:34:08.082965 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3314 16:34:08.089293 Byte0, DQ PI dly=992, DQM PI dly= 992
3315 16:34:08.092739 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 32)
3316 16:34:08.092832
3317 16:34:08.095895 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 32)
3318 16:34:08.096015
3319 16:34:08.099271 Byte1, DQ PI dly=984, DQM PI dly= 984
3320 16:34:08.105823 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
3321 16:34:08.105952
3322 16:34:08.109098 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
3323 16:34:08.109208
3324 16:34:08.109315 ==
3325 16:34:08.115592 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3326 16:34:08.118986 fsp= 1, odt_onoff= 1, Byte mode= 0
3327 16:34:08.119076 ==
3328 16:34:08.122248 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3329 16:34:08.122340
3330 16:34:08.125296 Begin, DQ Scan Range 960~1024
3331 16:34:08.125403 Write Rank1 MR14 =0x0
3332 16:34:08.135328
3333 16:34:08.135443 CH=1, VrefRange= 0, VrefLevel = 0
3334 16:34:08.141762 TX Bit0 (985~1001) 17 993, Bit8 (978~989) 12 983,
3335 16:34:08.145234 TX Bit1 (985~999) 15 992, Bit9 (977~989) 13 983,
3336 16:34:08.151812 TX Bit2 (984~997) 14 990, Bit10 (979~994) 16 986,
3337 16:34:08.154792 TX Bit3 (980~993) 14 986, Bit11 (981~994) 14 987,
3338 16:34:08.158151 TX Bit4 (984~999) 16 991, Bit12 (981~991) 11 986,
3339 16:34:08.164613 TX Bit5 (985~1001) 17 993, Bit13 (982~994) 13 988,
3340 16:34:08.167858 TX Bit6 (985~999) 15 992, Bit14 (981~992) 12 986,
3341 16:34:08.174396 TX Bit7 (985~998) 14 991, Bit15 (975~985) 11 980,
3342 16:34:08.174494
3343 16:34:08.174567 Write Rank1 MR14 =0x2
3344 16:34:08.183989
3345 16:34:08.184096 CH=1, VrefRange= 0, VrefLevel = 2
3346 16:34:08.190685 TX Bit0 (985~1002) 18 993, Bit8 (979~990) 12 984,
3347 16:34:08.193813 TX Bit1 (984~1000) 17 992, Bit9 (977~990) 14 983,
3348 16:34:08.200188 TX Bit2 (983~998) 16 990, Bit10 (978~995) 18 986,
3349 16:34:08.203917 TX Bit3 (981~994) 14 987, Bit11 (980~994) 15 987,
3350 16:34:08.207195 TX Bit4 (984~1000) 17 992, Bit12 (981~991) 11 986,
3351 16:34:08.213542 TX Bit5 (985~1002) 18 993, Bit13 (981~995) 15 988,
3352 16:34:08.217010 TX Bit6 (985~1000) 16 992, Bit14 (980~992) 13 986,
3353 16:34:08.223293 TX Bit7 (985~998) 14 991, Bit15 (975~986) 12 980,
3354 16:34:08.223395
3355 16:34:08.223493 Write Rank1 MR14 =0x4
3356 16:34:08.233194
3357 16:34:08.233300 CH=1, VrefRange= 0, VrefLevel = 4
3358 16:34:08.239895 TX Bit0 (985~1003) 19 994, Bit8 (978~990) 13 984,
3359 16:34:08.243313 TX Bit1 (984~1000) 17 992, Bit9 (977~990) 14 983,
3360 16:34:08.249505 TX Bit2 (983~998) 16 990, Bit10 (978~996) 19 987,
3361 16:34:08.252939 TX Bit3 (980~995) 16 987, Bit11 (979~995) 17 987,
3362 16:34:08.256140 TX Bit4 (984~1001) 18 992, Bit12 (981~992) 12 986,
3363 16:34:08.262850 TX Bit5 (985~1002) 18 993, Bit13 (980~996) 17 988,
3364 16:34:08.265844 TX Bit6 (984~1001) 18 992, Bit14 (979~993) 15 986,
3365 16:34:08.272403 TX Bit7 (984~999) 16 991, Bit15 (974~988) 15 981,
3366 16:34:08.272523
3367 16:34:08.275840 wait MRW command Rank1 MR14 =0x6 fired (1)
3368 16:34:08.279090 Write Rank1 MR14 =0x6
3369 16:34:08.286440
3370 16:34:08.286553 CH=1, VrefRange= 0, VrefLevel = 6
3371 16:34:08.293050 TX Bit0 (985~1004) 20 994, Bit8 (978~991) 14 984,
3372 16:34:08.296128 TX Bit1 (984~1001) 18 992, Bit9 (976~990) 15 983,
3373 16:34:08.302977 TX Bit2 (982~999) 18 990, Bit10 (978~997) 20 987,
3374 16:34:08.306241 TX Bit3 (979~996) 18 987, Bit11 (979~996) 18 987,
3375 16:34:08.309247 TX Bit4 (983~1001) 19 992, Bit12 (981~993) 13 987,
3376 16:34:08.315794 TX Bit5 (985~1003) 19 994, Bit13 (980~996) 17 988,
3377 16:34:08.319397 TX Bit6 (984~1001) 18 992, Bit14 (978~994) 17 986,
3378 16:34:08.325743 TX Bit7 (984~999) 16 991, Bit15 (973~989) 17 981,
3379 16:34:08.325850
3380 16:34:08.325925 Write Rank1 MR14 =0x8
3381 16:34:08.335970
3382 16:34:08.336085 CH=1, VrefRange= 0, VrefLevel = 8
3383 16:34:08.342469 TX Bit0 (985~1004) 20 994, Bit8 (978~991) 14 984,
3384 16:34:08.345738 TX Bit1 (984~1002) 19 993, Bit9 (976~991) 16 983,
3385 16:34:08.352128 TX Bit2 (983~999) 17 991, Bit10 (977~997) 21 987,
3386 16:34:08.355463 TX Bit3 (979~997) 19 988, Bit11 (978~997) 20 987,
3387 16:34:08.358883 TX Bit4 (983~1002) 20 992, Bit12 (979~993) 15 986,
3388 16:34:08.365289 TX Bit5 (985~1004) 20 994, Bit13 (980~997) 18 988,
3389 16:34:08.368512 TX Bit6 (984~1002) 19 993, Bit14 (978~994) 17 986,
3390 16:34:08.375321 TX Bit7 (984~1000) 17 992, Bit15 (973~990) 18 981,
3391 16:34:08.375428
3392 16:34:08.375519 Write Rank1 MR14 =0xa
3393 16:34:08.385306
3394 16:34:08.388583 CH=1, VrefRange= 0, VrefLevel = 10
3395 16:34:08.391857 TX Bit0 (984~1005) 22 994, Bit8 (977~992) 16 984,
3396 16:34:08.395145 TX Bit1 (983~1003) 21 993, Bit9 (976~991) 16 983,
3397 16:34:08.402032 TX Bit2 (982~1000) 19 991, Bit10 (977~998) 22 987,
3398 16:34:08.404914 TX Bit3 (979~997) 19 988, Bit11 (979~998) 20 988,
3399 16:34:08.411414 TX Bit4 (983~1003) 21 993, Bit12 (979~994) 16 986,
3400 16:34:08.414763 TX Bit5 (985~1004) 20 994, Bit13 (979~998) 20 988,
3401 16:34:08.417931 TX Bit6 (984~1003) 20 993, Bit14 (978~995) 18 986,
3402 16:34:08.424630 TX Bit7 (984~1001) 18 992, Bit15 (972~990) 19 981,
3403 16:34:08.424733
3404 16:34:08.424810 Write Rank1 MR14 =0xc
3405 16:34:08.435118
3406 16:34:08.438261 CH=1, VrefRange= 0, VrefLevel = 12
3407 16:34:08.441857 TX Bit0 (984~1005) 22 994, Bit8 (977~992) 16 984,
3408 16:34:08.445176 TX Bit1 (983~1003) 21 993, Bit9 (976~991) 16 983,
3409 16:34:08.451597 TX Bit2 (981~1000) 20 990, Bit10 (977~998) 22 987,
3410 16:34:08.454964 TX Bit3 (978~998) 21 988, Bit11 (978~998) 21 988,
3411 16:34:08.461229 TX Bit4 (983~1004) 22 993, Bit12 (979~995) 17 987,
3412 16:34:08.464538 TX Bit5 (984~1005) 22 994, Bit13 (978~998) 21 988,
3413 16:34:08.467882 TX Bit6 (984~1004) 21 994, Bit14 (978~996) 19 987,
3414 16:34:08.474306 TX Bit7 (984~1002) 19 993, Bit15 (972~990) 19 981,
3415 16:34:08.474408
3416 16:34:08.474481 Write Rank1 MR14 =0xe
3417 16:34:08.484936
3418 16:34:08.488262 CH=1, VrefRange= 0, VrefLevel = 14
3419 16:34:08.491507 TX Bit0 (984~1005) 22 994, Bit8 (976~992) 17 984,
3420 16:34:08.494765 TX Bit1 (983~1004) 22 993, Bit9 (975~992) 18 983,
3421 16:34:08.501332 TX Bit2 (980~1001) 22 990, Bit10 (977~999) 23 988,
3422 16:34:08.504584 TX Bit3 (978~998) 21 988, Bit11 (978~999) 22 988,
3423 16:34:08.511284 TX Bit4 (982~1004) 23 993, Bit12 (978~996) 19 987,
3424 16:34:08.514444 TX Bit5 (984~1005) 22 994, Bit13 (978~999) 22 988,
3425 16:34:08.517636 TX Bit6 (983~1005) 23 994, Bit14 (977~997) 21 987,
3426 16:34:08.524344 TX Bit7 (984~1002) 19 993, Bit15 (971~991) 21 981,
3427 16:34:08.524472
3428 16:34:08.524574 Write Rank1 MR14 =0x10
3429 16:34:08.535211
3430 16:34:08.538274 CH=1, VrefRange= 0, VrefLevel = 16
3431 16:34:08.541453 TX Bit0 (984~1006) 23 995, Bit8 (976~993) 18 984,
3432 16:34:08.544933 TX Bit1 (983~1004) 22 993, Bit9 (975~992) 18 983,
3433 16:34:08.551480 TX Bit2 (980~1002) 23 991, Bit10 (977~999) 23 988,
3434 16:34:08.554435 TX Bit3 (978~998) 21 988, Bit11 (978~999) 22 988,
3435 16:34:08.561085 TX Bit4 (982~1005) 24 993, Bit12 (978~997) 20 987,
3436 16:34:08.564531 TX Bit5 (984~1005) 22 994, Bit13 (978~999) 22 988,
3437 16:34:08.567531 TX Bit6 (983~1005) 23 994, Bit14 (977~998) 22 987,
3438 16:34:08.574363 TX Bit7 (983~1004) 22 993, Bit15 (972~991) 20 981,
3439 16:34:08.574470
3440 16:34:08.577264 Write Rank1 MR14 =0x12
3441 16:34:08.584884
3442 16:34:08.588119 CH=1, VrefRange= 0, VrefLevel = 18
3443 16:34:08.591766 TX Bit0 (984~1006) 23 995, Bit8 (976~993) 18 984,
3444 16:34:08.595017 TX Bit1 (983~1005) 23 994, Bit9 (975~993) 19 984,
3445 16:34:08.601528 TX Bit2 (980~1002) 23 991, Bit10 (976~999) 24 987,
3446 16:34:08.604761 TX Bit3 (978~999) 22 988, Bit11 (977~999) 23 988,
3447 16:34:08.611287 TX Bit4 (982~1005) 24 993, Bit12 (978~998) 21 988,
3448 16:34:08.614557 TX Bit5 (984~1005) 22 994, Bit13 (978~999) 22 988,
3449 16:34:08.617825 TX Bit6 (983~1005) 23 994, Bit14 (977~998) 22 987,
3450 16:34:08.624201 TX Bit7 (983~1004) 22 993, Bit15 (970~991) 22 980,
3451 16:34:08.624308
3452 16:34:08.627556 Write Rank1 MR14 =0x14
3453 16:34:08.634984
3454 16:34:08.638353 CH=1, VrefRange= 0, VrefLevel = 20
3455 16:34:08.641537 TX Bit0 (984~1006) 23 995, Bit8 (976~994) 19 985,
3456 16:34:08.644714 TX Bit1 (982~1005) 24 993, Bit9 (975~993) 19 984,
3457 16:34:08.651350 TX Bit2 (979~1004) 26 991, Bit10 (976~999) 24 987,
3458 16:34:08.654538 TX Bit3 (977~999) 23 988, Bit11 (977~999) 23 988,
3459 16:34:08.661006 TX Bit4 (982~1005) 24 993, Bit12 (978~998) 21 988,
3460 16:34:08.664464 TX Bit5 (983~1006) 24 994, Bit13 (978~999) 22 988,
3461 16:34:08.667823 TX Bit6 (982~1005) 24 993, Bit14 (977~998) 22 987,
3462 16:34:08.674386 TX Bit7 (983~1005) 23 994, Bit15 (971~992) 22 981,
3463 16:34:08.674517
3464 16:34:08.677442 Write Rank1 MR14 =0x16
3465 16:34:08.685253
3466 16:34:08.688359 CH=1, VrefRange= 0, VrefLevel = 22
3467 16:34:08.691713 TX Bit0 (984~1006) 23 995, Bit8 (975~995) 21 985,
3468 16:34:08.694785 TX Bit1 (982~1005) 24 993, Bit9 (974~994) 21 984,
3469 16:34:08.701340 TX Bit2 (979~1004) 26 991, Bit10 (976~1000) 25 988,
3470 16:34:08.704763 TX Bit3 (978~1000) 23 989, Bit11 (977~1000) 24 988,
3471 16:34:08.711089 TX Bit4 (981~1006) 26 993, Bit12 (977~999) 23 988,
3472 16:34:08.714665 TX Bit5 (983~1006) 24 994, Bit13 (977~1000) 24 988,
3473 16:34:08.721143 TX Bit6 (982~1005) 24 993, Bit14 (977~999) 23 988,
3474 16:34:08.724523 TX Bit7 (983~1005) 23 994, Bit15 (970~992) 23 981,
3475 16:34:08.724648
3476 16:34:08.727330 Write Rank1 MR14 =0x18
3477 16:34:08.735534
3478 16:34:08.738866 CH=1, VrefRange= 0, VrefLevel = 24
3479 16:34:08.742245 TX Bit0 (983~1006) 24 994, Bit8 (975~996) 22 985,
3480 16:34:08.745167 TX Bit1 (981~1006) 26 993, Bit9 (974~995) 22 984,
3481 16:34:08.751696 TX Bit2 (979~1004) 26 991, Bit10 (976~1000) 25 988,
3482 16:34:08.755351 TX Bit3 (977~1000) 24 988, Bit11 (977~1000) 24 988,
3483 16:34:08.761882 TX Bit4 (981~1006) 26 993, Bit12 (977~999) 23 988,
3484 16:34:08.764846 TX Bit5 (983~1006) 24 994, Bit13 (977~1000) 24 988,
3485 16:34:08.768189 TX Bit6 (982~1006) 25 994, Bit14 (976~999) 24 987,
3486 16:34:08.774628 TX Bit7 (982~1005) 24 993, Bit15 (970~992) 23 981,
3487 16:34:08.774727
3488 16:34:08.777963 Write Rank1 MR14 =0x1a
3489 16:34:08.785945
3490 16:34:08.789176 CH=1, VrefRange= 0, VrefLevel = 26
3491 16:34:08.792741 TX Bit0 (983~1007) 25 995, Bit8 (974~996) 23 985,
3492 16:34:08.795878 TX Bit1 (982~1006) 25 994, Bit9 (973~995) 23 984,
3493 16:34:08.802477 TX Bit2 (978~1005) 28 991, Bit10 (976~1000) 25 988,
3494 16:34:08.805469 TX Bit3 (977~1001) 25 989, Bit11 (976~1000) 25 988,
3495 16:34:08.811974 TX Bit4 (980~1006) 27 993, Bit12 (977~999) 23 988,
3496 16:34:08.815387 TX Bit5 (983~1006) 24 994, Bit13 (977~1000) 24 988,
3497 16:34:08.821877 TX Bit6 (982~1006) 25 994, Bit14 (976~999) 24 987,
3498 16:34:08.825126 TX Bit7 (981~1005) 25 993, Bit15 (970~993) 24 981,
3499 16:34:08.825215
3500 16:34:08.828328 Write Rank1 MR14 =0x1c
3501 16:34:08.836504
3502 16:34:08.839928 CH=1, VrefRange= 0, VrefLevel = 28
3503 16:34:08.843111 TX Bit0 (982~1007) 26 994, Bit8 (974~997) 24 985,
3504 16:34:08.846430 TX Bit1 (981~1006) 26 993, Bit9 (973~996) 24 984,
3505 16:34:08.852782 TX Bit2 (979~1005) 27 992, Bit10 (976~1000) 25 988,
3506 16:34:08.856071 TX Bit3 (977~1001) 25 989, Bit11 (976~1000) 25 988,
3507 16:34:08.862643 TX Bit4 (980~1006) 27 993, Bit12 (977~999) 23 988,
3508 16:34:08.865851 TX Bit5 (982~1006) 25 994, Bit13 (977~1000) 24 988,
3509 16:34:08.872589 TX Bit6 (981~1006) 26 993, Bit14 (976~999) 24 987,
3510 16:34:08.875826 TX Bit7 (981~1006) 26 993, Bit15 (970~993) 24 981,
3511 16:34:08.875938
3512 16:34:08.878986 Write Rank1 MR14 =0x1e
3513 16:34:08.887120
3514 16:34:08.890388 CH=1, VrefRange= 0, VrefLevel = 30
3515 16:34:08.893499 TX Bit0 (982~1007) 26 994, Bit8 (974~997) 24 985,
3516 16:34:08.896708 TX Bit1 (981~1006) 26 993, Bit9 (972~997) 26 984,
3517 16:34:08.903186 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3518 16:34:08.906543 TX Bit3 (977~1001) 25 989, Bit11 (976~1000) 25 988,
3519 16:34:08.913087 TX Bit4 (980~1006) 27 993, Bit12 (976~1000) 25 988,
3520 16:34:08.916359 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
3521 16:34:08.922902 TX Bit6 (980~1006) 27 993, Bit14 (977~999) 23 988,
3522 16:34:08.926063 TX Bit7 (980~1006) 27 993, Bit15 (970~994) 25 982,
3523 16:34:08.926175
3524 16:34:08.929355 Write Rank1 MR14 =0x20
3525 16:34:08.937425
3526 16:34:08.940928 CH=1, VrefRange= 0, VrefLevel = 32
3527 16:34:08.944354 TX Bit0 (982~1007) 26 994, Bit8 (974~997) 24 985,
3528 16:34:08.949620 TX Bit1 (981~1006) 26 993, Bit9 (972~997) 26 984,
3529 16:34:08.953975 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3530 16:34:08.957152 TX Bit3 (977~1001) 25 989, Bit11 (976~1000) 25 988,
3531 16:34:08.963837 TX Bit4 (980~1006) 27 993, Bit12 (976~1000) 25 988,
3532 16:34:08.967243 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
3533 16:34:08.970491 TX Bit6 (980~1006) 27 993, Bit14 (977~999) 23 988,
3534 16:34:08.976959 TX Bit7 (980~1006) 27 993, Bit15 (970~994) 25 982,
3535 16:34:08.977082
3536 16:34:08.980139 Write Rank1 MR14 =0x22
3537 16:34:08.988280
3538 16:34:08.991479 CH=1, VrefRange= 0, VrefLevel = 34
3539 16:34:08.994685 TX Bit0 (982~1007) 26 994, Bit8 (974~997) 24 985,
3540 16:34:08.998139 TX Bit1 (981~1006) 26 993, Bit9 (972~997) 26 984,
3541 16:34:09.004422 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3542 16:34:09.007647 TX Bit3 (977~1001) 25 989, Bit11 (976~1000) 25 988,
3543 16:34:09.014306 TX Bit4 (980~1006) 27 993, Bit12 (976~1000) 25 988,
3544 16:34:09.017635 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
3545 16:34:09.020799 TX Bit6 (980~1006) 27 993, Bit14 (977~999) 23 988,
3546 16:34:09.027297 TX Bit7 (980~1006) 27 993, Bit15 (970~994) 25 982,
3547 16:34:09.027403
3548 16:34:09.030439 Write Rank1 MR14 =0x24
3549 16:34:09.038782
3550 16:34:09.041927 CH=1, VrefRange= 0, VrefLevel = 36
3551 16:34:09.045248 TX Bit0 (982~1007) 26 994, Bit8 (974~997) 24 985,
3552 16:34:09.048395 TX Bit1 (981~1006) 26 993, Bit9 (972~997) 26 984,
3553 16:34:09.055010 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3554 16:34:09.058159 TX Bit3 (977~1001) 25 989, Bit11 (976~1000) 25 988,
3555 16:34:09.064984 TX Bit4 (980~1006) 27 993, Bit12 (976~1000) 25 988,
3556 16:34:09.068220 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
3557 16:34:09.071449 TX Bit6 (980~1006) 27 993, Bit14 (977~999) 23 988,
3558 16:34:09.078151 TX Bit7 (980~1006) 27 993, Bit15 (970~994) 25 982,
3559 16:34:09.078296
3560 16:34:09.080996 Write Rank1 MR14 =0x26
3561 16:34:09.089186
3562 16:34:09.092437 CH=1, VrefRange= 0, VrefLevel = 38
3563 16:34:09.095382 TX Bit0 (982~1007) 26 994, Bit8 (974~997) 24 985,
3564 16:34:09.098745 TX Bit1 (981~1006) 26 993, Bit9 (972~997) 26 984,
3565 16:34:09.105403 TX Bit2 (978~1005) 28 991, Bit10 (976~999) 24 987,
3566 16:34:09.108554 TX Bit3 (977~1001) 25 989, Bit11 (976~1000) 25 988,
3567 16:34:09.115244 TX Bit4 (980~1006) 27 993, Bit12 (976~1000) 25 988,
3568 16:34:09.118535 TX Bit5 (982~1007) 26 994, Bit13 (977~1000) 24 988,
3569 16:34:09.125042 TX Bit6 (980~1006) 27 993, Bit14 (977~999) 23 988,
3570 16:34:09.128169 TX Bit7 (980~1006) 27 993, Bit15 (970~994) 25 982,
3571 16:34:09.128293
3572 16:34:09.128386
3573 16:34:09.131419 TX Vref found, early break! 373< 387
3574 16:34:09.134711 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =744/100 ps
3575 16:34:09.138007 u1DelayCellOfst[0]=6 cells (5 PI)
3576 16:34:09.141326 u1DelayCellOfst[1]=5 cells (4 PI)
3577 16:34:09.144540 u1DelayCellOfst[2]=2 cells (2 PI)
3578 16:34:09.147699 u1DelayCellOfst[3]=0 cells (0 PI)
3579 16:34:09.151031 u1DelayCellOfst[4]=5 cells (4 PI)
3580 16:34:09.154336 u1DelayCellOfst[5]=6 cells (5 PI)
3581 16:34:09.157657 u1DelayCellOfst[6]=5 cells (4 PI)
3582 16:34:09.160658 u1DelayCellOfst[7]=5 cells (4 PI)
3583 16:34:09.164156 Byte0, DQ PI dly=989, DQM PI dly= 991
3584 16:34:09.167355 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
3585 16:34:09.167479
3586 16:34:09.173803 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
3587 16:34:09.173938
3588 16:34:09.177128 u1DelayCellOfst[8]=3 cells (3 PI)
3589 16:34:09.180298 u1DelayCellOfst[9]=2 cells (2 PI)
3590 16:34:09.180410 u1DelayCellOfst[10]=6 cells (5 PI)
3591 16:34:09.183863 u1DelayCellOfst[11]=7 cells (6 PI)
3592 16:34:09.187087 u1DelayCellOfst[12]=7 cells (6 PI)
3593 16:34:09.190353 u1DelayCellOfst[13]=7 cells (6 PI)
3594 16:34:09.193681 u1DelayCellOfst[14]=7 cells (6 PI)
3595 16:34:09.196871 u1DelayCellOfst[15]=0 cells (0 PI)
3596 16:34:09.200107 Byte1, DQ PI dly=982, DQM PI dly= 985
3597 16:34:09.206679 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3598 16:34:09.206808
3599 16:34:09.209824 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3600 16:34:09.209943
3601 16:34:09.213140 Write Rank1 MR14 =0x1e
3602 16:34:09.213259
3603 16:34:09.213365 Final TX Range 0 Vref 30
3604 16:34:09.213468
3605 16:34:09.219688 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3606 16:34:09.219811
3607 16:34:09.226204 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3608 16:34:09.236167 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3609 16:34:09.242930 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3610 16:34:09.243065 Write Rank1 MR3 =0xb0
3611 16:34:09.245798 DramC Write-DBI on
3612 16:34:09.245915 ==
3613 16:34:09.249004 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3614 16:34:09.252646 fsp= 1, odt_onoff= 1, Byte mode= 0
3615 16:34:09.252763 ==
3616 16:34:09.259042 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3617 16:34:09.259171
3618 16:34:09.262229 Begin, DQ Scan Range 705~769
3619 16:34:09.262344
3620 16:34:09.262425
3621 16:34:09.262492 TX Vref Scan disable
3622 16:34:09.265524 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3623 16:34:09.268860 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3624 16:34:09.272130 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3625 16:34:09.278625 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3626 16:34:09.282083 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3627 16:34:09.285233 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3628 16:34:09.288687 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3629 16:34:09.291854 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3630 16:34:09.294964 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3631 16:34:09.298336 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3632 16:34:09.301530 715 |2 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3633 16:34:09.304874 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3634 16:34:09.308155 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3635 16:34:09.311402 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3636 16:34:09.314722 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3637 16:34:09.318069 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3638 16:34:09.321488 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3639 16:34:09.324766 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3640 16:34:09.331195 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3641 16:34:09.334368 724 |2 6 20|[0] xxxxxxxx oooooooo [MSB]
3642 16:34:09.341178 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3643 16:34:09.344397 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3644 16:34:09.347638 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3645 16:34:09.350654 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3646 16:34:09.353873 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3647 16:34:09.357260 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3648 16:34:09.360603 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3649 16:34:09.363768 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3650 16:34:09.367168 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3651 16:34:09.370406 Byte0, DQ PI dly=737, DQM PI dly= 737
3652 16:34:09.376890 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
3653 16:34:09.376990
3654 16:34:09.380452 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
3655 16:34:09.380539
3656 16:34:09.383622 Byte1, DQ PI dly=729, DQM PI dly= 729
3657 16:34:09.386954 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
3658 16:34:09.387043
3659 16:34:09.393344 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
3660 16:34:09.393467
3661 16:34:09.399747 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3662 16:34:09.406419 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3663 16:34:09.412917 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3664 16:34:09.416069 Write Rank1 MR3 =0x30
3665 16:34:09.416174 DramC Write-DBI off
3666 16:34:09.416249
3667 16:34:09.419241 [DATLAT]
3668 16:34:09.419335 Freq=1600, CH1 RK1, use_rxtx_scan=0
3669 16:34:09.422926
3670 16:34:09.423016 DATLAT Default: 0x10
3671 16:34:09.425805 7, 0xFFFF, sum=0
3672 16:34:09.425895 8, 0xFFFF, sum=0
3673 16:34:09.429138 9, 0xFFFF, sum=0
3674 16:34:09.429239 10, 0xFFFF, sum=0
3675 16:34:09.432692 11, 0xFFFF, sum=0
3676 16:34:09.432791 12, 0xFFFF, sum=0
3677 16:34:09.435814 13, 0xFFFF, sum=0
3678 16:34:09.435909 14, 0x0, sum=1
3679 16:34:09.435980 15, 0x0, sum=2
3680 16:34:09.439066 16, 0x0, sum=3
3681 16:34:09.439163 17, 0x0, sum=4
3682 16:34:09.445736 pattern=2 first_step=14 total pass=5 best_step=16
3683 16:34:09.445845 ==
3684 16:34:09.449044 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3685 16:34:09.452349 fsp= 1, odt_onoff= 1, Byte mode= 0
3686 16:34:09.452452 ==
3687 16:34:09.458846 Start DQ dly to find pass range UseTestEngine =1
3688 16:34:09.462086 x-axis: bit #, y-axis: DQ dly (-127~63)
3689 16:34:09.462190 RX Vref Scan = 0
3690 16:34:09.465370 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3691 16:34:09.468324 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3692 16:34:09.471799 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3693 16:34:09.475028 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3694 16:34:09.478222 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3695 16:34:09.478332 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3696 16:34:09.481845 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3697 16:34:09.485017 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3698 16:34:09.488326 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3699 16:34:09.491482 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3700 16:34:09.494636 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3701 16:34:09.497834 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3702 16:34:09.501455 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3703 16:34:09.504337 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3704 16:34:09.507620 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3705 16:34:09.507718 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3706 16:34:09.511044 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3707 16:34:09.514280 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3708 16:34:09.517797 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3709 16:34:09.520874 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3710 16:34:09.524142 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3711 16:34:09.527394 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3712 16:34:09.530642 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3713 16:34:09.530736 -3, [0] xxxxxxxx xoxxxxxo [MSB]
3714 16:34:09.533963 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3715 16:34:09.537148 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3716 16:34:09.540721 0, [0] xxxoxxxx ooxxxxxo [MSB]
3717 16:34:09.543699 1, [0] xxxoxxxx ooxxxxxo [MSB]
3718 16:34:09.547212 2, [0] xxxoxxxx ooxxxxxo [MSB]
3719 16:34:09.547311 3, [0] xxooxxxo ooooooxo [MSB]
3720 16:34:09.550204 4, [0] oooooxxo oooooooo [MSB]
3721 16:34:09.553618 5, [0] oooooxxo oooooooo [MSB]
3722 16:34:09.558158 32, [0] oooooooo ooooooox [MSB]
3723 16:34:09.561060 33, [0] oooooooo ooooooox [MSB]
3724 16:34:09.564318 34, [0] oooxoooo oxooooox [MSB]
3725 16:34:09.567702 35, [0] ooxxoooo oxooooox [MSB]
3726 16:34:09.570820 36, [0] ooxxoooo xxooooox [MSB]
3727 16:34:09.574129 37, [0] ooxxoooo xxooooox [MSB]
3728 16:34:09.577388 38, [0] ooxxoooo xxooxoox [MSB]
3729 16:34:09.577503 39, [0] oxxxooox xxxxxoox [MSB]
3730 16:34:09.580654 40, [0] oxxxxoox xxxxxxox [MSB]
3731 16:34:09.584017 41, [0] xxxxxxxx xxxxxxxx [MSB]
3732 16:34:09.587244 iDelay=41, Bit 0, Center 22 (4 ~ 40) 37
3733 16:34:09.590827 iDelay=41, Bit 1, Center 21 (4 ~ 38) 35
3734 16:34:09.593769 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3735 16:34:09.600611 iDelay=41, Bit 3, Center 15 (-2 ~ 33) 36
3736 16:34:09.603915 iDelay=41, Bit 4, Center 21 (4 ~ 39) 36
3737 16:34:09.607243 iDelay=41, Bit 5, Center 23 (6 ~ 40) 35
3738 16:34:09.610424 iDelay=41, Bit 6, Center 23 (6 ~ 40) 35
3739 16:34:09.613713 iDelay=41, Bit 7, Center 20 (3 ~ 38) 36
3740 16:34:09.616871 iDelay=41, Bit 8, Center 17 (-1 ~ 35) 37
3741 16:34:09.620222 iDelay=41, Bit 9, Center 15 (-3 ~ 33) 37
3742 16:34:09.623206 iDelay=41, Bit 10, Center 20 (3 ~ 38) 36
3743 16:34:09.626669 iDelay=41, Bit 11, Center 20 (3 ~ 38) 36
3744 16:34:09.629929 iDelay=41, Bit 12, Center 20 (3 ~ 37) 35
3745 16:34:09.633055 iDelay=41, Bit 13, Center 21 (3 ~ 39) 37
3746 16:34:09.639695 iDelay=41, Bit 14, Center 22 (4 ~ 40) 37
3747 16:34:09.643167 iDelay=41, Bit 15, Center 13 (-4 ~ 31) 36
3748 16:34:09.643268 ==
3749 16:34:09.646289 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3750 16:34:09.649450 fsp= 1, odt_onoff= 1, Byte mode= 0
3751 16:34:09.649547 ==
3752 16:34:09.653043 DQS Delay:
3753 16:34:09.653137 DQS0 = 0, DQS1 = 0
3754 16:34:09.656248 DQM Delay:
3755 16:34:09.656341 DQM0 = 20, DQM1 = 18
3756 16:34:09.656436 DQ Delay:
3757 16:34:09.659423 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =15
3758 16:34:09.662731 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
3759 16:34:09.666261 DQ8 =17, DQ9 =15, DQ10 =20, DQ11 =20
3760 16:34:09.669099 DQ12 =20, DQ13 =21, DQ14 =22, DQ15 =13
3761 16:34:09.669231
3762 16:34:09.669342
3763 16:34:09.672695
3764 16:34:09.672789 [DramC_TX_OE_Calibration] TA2
3765 16:34:09.675675 Original DQ_B0 (3 6) =30, OEN = 27
3766 16:34:09.679256 Original DQ_B1 (3 6) =30, OEN = 27
3767 16:34:09.682247 23, 0x0, End_B0=23 End_B1=23
3768 16:34:09.685457 24, 0x0, End_B0=24 End_B1=24
3769 16:34:09.689153 25, 0x0, End_B0=25 End_B1=25
3770 16:34:09.689251 26, 0x0, End_B0=26 End_B1=26
3771 16:34:09.692231 27, 0x0, End_B0=27 End_B1=27
3772 16:34:09.695505 28, 0x0, End_B0=28 End_B1=28
3773 16:34:09.698651 29, 0x0, End_B0=29 End_B1=29
3774 16:34:09.702150 30, 0x0, End_B0=30 End_B1=30
3775 16:34:09.702246 31, 0xFFFF, End_B0=30 End_B1=30
3776 16:34:09.708400 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3777 16:34:09.715121 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3778 16:34:09.715222
3779 16:34:09.715293
3780 16:34:09.718636 Write Rank1 MR23 =0x3f
3781 16:34:09.718729 [DQSOSC]
3782 16:34:09.725112 [DQSOSCAuto] RK1, (LSB)MR18= 0xb7b7, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3783 16:34:09.731567 CH1_RK1: MR19=0x202, MR18=0xB7B7, DQSOSC=453, MR23=63, INC=11, DEC=17
3784 16:34:09.734918 Write Rank1 MR23 =0x3f
3785 16:34:09.735015 [DQSOSC]
3786 16:34:09.741249 [DQSOSCAuto] RK1, (LSB)MR18= 0xb8b8, (MSB)MR19= 0x202, tDQSOscB0 = 452 ps tDQSOscB1 = 452 ps
3787 16:34:09.744442 CH1 RK1: MR19=202, MR18=B8B8
3788 16:34:09.747954 [RxdqsGatingPostProcess] freq 1600
3789 16:34:09.754464 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3790 16:34:09.754560 Rank: 0
3791 16:34:09.757421 best DQS0 dly(2T, 0.5T) = (2, 6)
3792 16:34:09.760740 best DQS1 dly(2T, 0.5T) = (2, 6)
3793 16:34:09.764265 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3794 16:34:09.767402 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3795 16:34:09.767493 Rank: 1
3796 16:34:09.770851 best DQS0 dly(2T, 0.5T) = (2, 6)
3797 16:34:09.773959 best DQS1 dly(2T, 0.5T) = (2, 6)
3798 16:34:09.777425 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3799 16:34:09.780684 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3800 16:34:09.783988 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3801 16:34:09.787059 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3802 16:34:09.793516 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3803 16:34:09.793614
3804 16:34:09.793687
3805 16:34:09.797057 [Calibration Summary] Freqency 1600
3806 16:34:09.797173 CH 0, Rank 0
3807 16:34:09.800220 All Pass.
3808 16:34:09.800332
3809 16:34:09.800436 CH 0, Rank 1
3810 16:34:09.800532 All Pass.
3811 16:34:09.800641
3812 16:34:09.803462 CH 1, Rank 0
3813 16:34:09.803539 All Pass.
3814 16:34:09.803604
3815 16:34:09.803666 CH 1, Rank 1
3816 16:34:09.806682 All Pass.
3817 16:34:09.806757
3818 16:34:09.813302 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3819 16:34:09.819881 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3820 16:34:09.826333 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3821 16:34:09.829554 Write Rank0 MR3 =0xb0
3822 16:34:09.836212 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3823 16:34:09.842869 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3824 16:34:09.849561 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3825 16:34:09.849661 Write Rank1 MR3 =0xb0
3826 16:34:09.856053 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3827 16:34:09.865975 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3828 16:34:09.872296 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3829 16:34:09.872399 Write Rank0 MR3 =0xb0
3830 16:34:09.878810 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3831 16:34:09.885296 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3832 16:34:09.895022 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3833 16:34:09.895130 Write Rank1 MR3 =0xb0
3834 16:34:09.898250 DramC Write-DBI on
3835 16:34:09.901785 [GetDramInforAfterCalByMRR] Vendor 6.
3836 16:34:09.904846 [GetDramInforAfterCalByMRR] Revision 505.
3837 16:34:09.904941 MR8 1111
3838 16:34:09.911435 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3839 16:34:09.911536 MR8 1111
3840 16:34:09.914963 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3841 16:34:09.918020 MR8 1111
3842 16:34:09.921349 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3843 16:34:09.921486 MR8 1111
3844 16:34:09.927809 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3845 16:34:09.937818 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3846 16:34:09.937922 Write Rank0 MR13 =0xd0
3847 16:34:09.941092 Write Rank1 MR13 =0xd0
3848 16:34:09.941182 Write Rank0 MR13 =0xd0
3849 16:34:09.944269 Write Rank1 MR13 =0xd0
3850 16:34:09.947572 Save calibration result to emmc
3851 16:34:09.947690
3852 16:34:09.947791
3853 16:34:09.950735 [DramcModeReg_Check] Freq_1600, FSP_1
3854 16:34:09.954142 FSP_1, CH_0, RK0
3855 16:34:09.954259 Write Rank0 MR13 =0xd8
3856 16:34:09.957438 MR12 = 0x5c (global = 0x5c) match
3857 16:34:09.960755 MR14 = 0x1e (global = 0x1e) match
3858 16:34:09.963717 FSP_1, CH_0, RK1
3859 16:34:09.963814 Write Rank1 MR13 =0xd8
3860 16:34:09.966977 MR12 = 0x5e (global = 0x5e) match
3861 16:34:09.970361 MR14 = 0x1e (global = 0x1e) match
3862 16:34:09.973786 FSP_1, CH_1, RK0
3863 16:34:09.973886 Write Rank0 MR13 =0xd8
3864 16:34:09.977044 MR12 = 0x5e (global = 0x5e) match
3865 16:34:09.980241 MR14 = 0x20 (global = 0x20) match
3866 16:34:09.983707 FSP_1, CH_1, RK1
3867 16:34:09.983805 Write Rank1 MR13 =0xd8
3868 16:34:09.986921 MR12 = 0x5c (global = 0x5c) match
3869 16:34:09.990138 MR14 = 0x1e (global = 0x1e) match
3870 16:34:09.990241
3871 16:34:09.996520 [MEM_TEST] 02: After DFS, before run time config
3872 16:34:10.006396 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3873 16:34:10.006518
3874 16:34:10.006620 [TA2_TEST]
3875 16:34:10.006711 === TA2 HW
3876 16:34:10.009843 TA2 PAT: XTALK
3877 16:34:10.012817 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3878 16:34:10.019506 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3879 16:34:10.022662 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3880 16:34:10.029114 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3881 16:34:10.029227
3882 16:34:10.029308
3883 16:34:10.029375 Settings after calibration
3884 16:34:10.029451
3885 16:34:10.032624 [DramcRunTimeConfig]
3886 16:34:10.035879 TransferPLLToSPMControl - MODE SW PHYPLL
3887 16:34:10.039107 TX_TRACKING: ON
3888 16:34:10.039193 RX_TRACKING: ON
3889 16:34:10.039263 HW_GATING: ON
3890 16:34:10.042382 HW_GATING DBG: OFF
3891 16:34:10.042473 ddr_geometry:1
3892 16:34:10.045842 ddr_geometry:1
3893 16:34:10.045927 ddr_geometry:1
3894 16:34:10.048803 ddr_geometry:1
3895 16:34:10.048885 ddr_geometry:1
3896 16:34:10.052073 ddr_geometry:1
3897 16:34:10.052191 ddr_geometry:1
3898 16:34:10.052272 ddr_geometry:1
3899 16:34:10.055286 High Freq DUMMY_READ_FOR_TRACKING: ON
3900 16:34:10.058721 ZQCS_ENABLE_LP4: OFF
3901 16:34:10.062036 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3902 16:34:10.065269 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3903 16:34:10.068670 SPM_CONTROL_AFTERK: ON
3904 16:34:10.068756 IMPEDANCE_TRACKING: ON
3905 16:34:10.071902 TEMP_SENSOR: ON
3906 16:34:10.071993 PER_BANK_REFRESH: ON
3907 16:34:10.075212 HW_SAVE_FOR_SR: ON
3908 16:34:10.078478 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3909 16:34:10.081809 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3910 16:34:10.085008 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3911 16:34:10.085148 Read ODT Tracking: ON
3912 16:34:10.088180 =========================
3913 16:34:10.088266
3914 16:34:10.088336 [TA2_TEST]
3915 16:34:10.091445 === TA2 HW
3916 16:34:10.094619 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3917 16:34:10.101444 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3918 16:34:10.104745 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3919 16:34:10.111260 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3920 16:34:10.111371
3921 16:34:10.114347 [MEM_TEST] 03: After run time config
3922 16:34:10.124227 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3923 16:34:10.127439 [complex_mem_test] start addr:0x40024000, len:131072
3924 16:34:10.331921 1st complex R/W mem test pass
3925 16:34:10.338419 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3926 16:34:10.341731 sync preloader write leveling
3927 16:34:10.345041 sync preloader cbt_mr12
3928 16:34:10.348278 sync preloader cbt_clk_dly
3929 16:34:10.348373 sync preloader cbt_cmd_dly
3930 16:34:10.351644 sync preloader cbt_cs
3931 16:34:10.354752 sync preloader cbt_ca_perbit_delay
3932 16:34:10.357957 sync preloader clk_delay
3933 16:34:10.358072 sync preloader dqs_delay
3934 16:34:10.361154 sync preloader u1Gating2T_Save
3935 16:34:10.364635 sync preloader u1Gating05T_Save
3936 16:34:10.367642 sync preloader u1Gatingfine_tune_Save
3937 16:34:10.371040 sync preloader u1Gatingucpass_count_Save
3938 16:34:10.374316 sync preloader u1TxWindowPerbitVref_Save
3939 16:34:10.377621 sync preloader u1TxCenter_min_Save
3940 16:34:10.380792 sync preloader u1TxCenter_max_Save
3941 16:34:10.384116 sync preloader u1Txwin_center_Save
3942 16:34:10.387451 sync preloader u1Txfirst_pass_Save
3943 16:34:10.390851 sync preloader u1Txlast_pass_Save
3944 16:34:10.394129 sync preloader u1RxDatlat_Save
3945 16:34:10.397313 sync preloader u1RxWinPerbitVref_Save
3946 16:34:10.400597 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3947 16:34:10.403749 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3948 16:34:10.406788 sync preloader delay_cell_unit
3949 16:34:10.413472 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3950 16:34:10.416705 sync preloader write leveling
3951 16:34:10.420039 sync preloader cbt_mr12
3952 16:34:10.420154 sync preloader cbt_clk_dly
3953 16:34:10.423195 sync preloader cbt_cmd_dly
3954 16:34:10.426514 sync preloader cbt_cs
3955 16:34:10.429808 sync preloader cbt_ca_perbit_delay
3956 16:34:10.429922 sync preloader clk_delay
3957 16:34:10.433178 sync preloader dqs_delay
3958 16:34:10.436354 sync preloader u1Gating2T_Save
3959 16:34:10.439690 sync preloader u1Gating05T_Save
3960 16:34:10.442944 sync preloader u1Gatingfine_tune_Save
3961 16:34:10.446223 sync preloader u1Gatingucpass_count_Save
3962 16:34:10.449763 sync preloader u1TxWindowPerbitVref_Save
3963 16:34:10.452802 sync preloader u1TxCenter_min_Save
3964 16:34:10.456008 sync preloader u1TxCenter_max_Save
3965 16:34:10.459215 sync preloader u1Txwin_center_Save
3966 16:34:10.462772 sync preloader u1Txfirst_pass_Save
3967 16:34:10.465845 sync preloader u1Txlast_pass_Save
3968 16:34:10.469070 sync preloader u1RxDatlat_Save
3969 16:34:10.472591 sync preloader u1RxWinPerbitVref_Save
3970 16:34:10.475847 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3971 16:34:10.479022 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3972 16:34:10.482422 sync preloader delay_cell_unit
3973 16:34:10.489052 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3974 16:34:10.492205 sync preloader write leveling
3975 16:34:10.495445 sync preloader cbt_mr12
3976 16:34:10.495561 sync preloader cbt_clk_dly
3977 16:34:10.498820 sync preloader cbt_cmd_dly
3978 16:34:10.502040 sync preloader cbt_cs
3979 16:34:10.505291 sync preloader cbt_ca_perbit_delay
3980 16:34:10.505411 sync preloader clk_delay
3981 16:34:10.508445 sync preloader dqs_delay
3982 16:34:10.511646 sync preloader u1Gating2T_Save
3983 16:34:10.514859 sync preloader u1Gating05T_Save
3984 16:34:10.518118 sync preloader u1Gatingfine_tune_Save
3985 16:34:10.521742 sync preloader u1Gatingucpass_count_Save
3986 16:34:10.524921 sync preloader u1TxWindowPerbitVref_Save
3987 16:34:10.527997 sync preloader u1TxCenter_min_Save
3988 16:34:10.531338 sync preloader u1TxCenter_max_Save
3989 16:34:10.534714 sync preloader u1Txwin_center_Save
3990 16:34:10.538018 sync preloader u1Txfirst_pass_Save
3991 16:34:10.541385 sync preloader u1Txlast_pass_Save
3992 16:34:10.541497 sync preloader u1RxDatlat_Save
3993 16:34:10.544306 sync preloader u1RxWinPerbitVref_Save
3994 16:34:10.551072 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3995 16:34:10.554368 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3996 16:34:10.557623 sync preloader delay_cell_unit
3997 16:34:10.560776 just_for_test_dump_coreboot_params dump all params
3998 16:34:10.564254 dump source = 0x0
3999 16:34:10.564379 dump params frequency:1600
4000 16:34:10.567284 dump params rank number:2
4001 16:34:10.567404
4002 16:34:10.570622 dump params write leveling
4003 16:34:10.574131 write leveling[0][0][0] = 0x21
4004 16:34:10.577189 write leveling[0][0][1] = 0x1c
4005 16:34:10.577311 write leveling[0][1][0] = 0x1d
4006 16:34:10.580349 write leveling[0][1][1] = 0x1b
4007 16:34:10.583919 write leveling[1][0][0] = 0x21
4008 16:34:10.586972 write leveling[1][0][1] = 0x1a
4009 16:34:10.590496 write leveling[1][1][0] = 0x23
4010 16:34:10.593579 write leveling[1][1][1] = 0x1e
4011 16:34:10.593684 dump params cbt_cs
4012 16:34:10.597019 cbt_cs[0][0] = 0x6
4013 16:34:10.597133 cbt_cs[0][1] = 0x6
4014 16:34:10.600151 cbt_cs[1][0] = 0xb
4015 16:34:10.600274 cbt_cs[1][1] = 0xb
4016 16:34:10.603705 dump params cbt_mr12
4017 16:34:10.603823 cbt_mr12[0][0] = 0x1c
4018 16:34:10.606742 cbt_mr12[0][1] = 0x1e
4019 16:34:10.610270 cbt_mr12[1][0] = 0x1e
4020 16:34:10.610384 cbt_mr12[1][1] = 0x1c
4021 16:34:10.613542 dump params tx window
4022 16:34:10.616650 tx_center_min[0][0][0] = 987
4023 16:34:10.619867 tx_center_max[0][0][0] = 992
4024 16:34:10.619981 tx_center_min[0][0][1] = 979
4025 16:34:10.623153 tx_center_max[0][0][1] = 987
4026 16:34:10.626458 tx_center_min[0][1][0] = 983
4027 16:34:10.629585 tx_center_max[0][1][0] = 990
4028 16:34:10.632802 tx_center_min[0][1][1] = 982
4029 16:34:10.632921 tx_center_max[0][1][1] = 988
4030 16:34:10.636398 tx_center_min[1][0][0] = 987
4031 16:34:10.639689 tx_center_max[1][0][0] = 992
4032 16:34:10.642686 tx_center_min[1][0][1] = 979
4033 16:34:10.646053 tx_center_max[1][0][1] = 985
4034 16:34:10.646170 tx_center_min[1][1][0] = 989
4035 16:34:10.649321 tx_center_max[1][1][0] = 994
4036 16:34:10.652781 tx_center_min[1][1][1] = 982
4037 16:34:10.655767 tx_center_max[1][1][1] = 988
4038 16:34:10.655888 dump params tx window
4039 16:34:10.659431 tx_win_center[0][0][0] = 992
4040 16:34:10.662768 tx_first_pass[0][0][0] = 980
4041 16:34:10.665719 tx_last_pass[0][0][0] = 1005
4042 16:34:10.669078 tx_win_center[0][0][1] = 991
4043 16:34:10.669191 tx_first_pass[0][0][1] = 979
4044 16:34:10.672388 tx_last_pass[0][0][1] = 1003
4045 16:34:10.675683 tx_win_center[0][0][2] = 992
4046 16:34:10.679049 tx_first_pass[0][0][2] = 980
4047 16:34:10.682203 tx_last_pass[0][0][2] = 1005
4048 16:34:10.682315 tx_win_center[0][0][3] = 987
4049 16:34:10.685289 tx_first_pass[0][0][3] = 975
4050 16:34:10.688768 tx_last_pass[0][0][3] = 999
4051 16:34:10.691996 tx_win_center[0][0][4] = 990
4052 16:34:10.695063 tx_first_pass[0][0][4] = 978
4053 16:34:10.695186 tx_last_pass[0][0][4] = 1003
4054 16:34:10.698501 tx_win_center[0][0][5] = 988
4055 16:34:10.701791 tx_first_pass[0][0][5] = 977
4056 16:34:10.704988 tx_last_pass[0][0][5] = 1000
4057 16:34:10.708098 tx_win_center[0][0][6] = 989
4058 16:34:10.708186 tx_first_pass[0][0][6] = 978
4059 16:34:10.711423 tx_last_pass[0][0][6] = 1001
4060 16:34:10.714753 tx_win_center[0][0][7] = 991
4061 16:34:10.717769 tx_first_pass[0][0][7] = 978
4062 16:34:10.721316 tx_last_pass[0][0][7] = 1004
4063 16:34:10.721441 tx_win_center[0][0][8] = 979
4064 16:34:10.724500 tx_first_pass[0][0][8] = 968
4065 16:34:10.727925 tx_last_pass[0][0][8] = 991
4066 16:34:10.731136 tx_win_center[0][0][9] = 981
4067 16:34:10.734264 tx_first_pass[0][0][9] = 969
4068 16:34:10.734356 tx_last_pass[0][0][9] = 994
4069 16:34:10.737562 tx_win_center[0][0][10] = 987
4070 16:34:10.740894 tx_first_pass[0][0][10] = 975
4071 16:34:10.744190 tx_last_pass[0][0][10] = 999
4072 16:34:10.747486 tx_win_center[0][0][11] = 981
4073 16:34:10.747614 tx_first_pass[0][0][11] = 969
4074 16:34:10.750779 tx_last_pass[0][0][11] = 993
4075 16:34:10.754114 tx_win_center[0][0][12] = 982
4076 16:34:10.757403 tx_first_pass[0][0][12] = 970
4077 16:34:10.760666 tx_last_pass[0][0][12] = 995
4078 16:34:10.760760 tx_win_center[0][0][13] = 982
4079 16:34:10.763547 tx_first_pass[0][0][13] = 970
4080 16:34:10.766848 tx_last_pass[0][0][13] = 995
4081 16:34:10.770515 tx_win_center[0][0][14] = 983
4082 16:34:10.773869 tx_first_pass[0][0][14] = 970
4083 16:34:10.777064 tx_last_pass[0][0][14] = 997
4084 16:34:10.777174 tx_win_center[0][0][15] = 986
4085 16:34:10.780046 tx_first_pass[0][0][15] = 974
4086 16:34:10.783400 tx_last_pass[0][0][15] = 999
4087 16:34:10.786649 tx_win_center[0][1][0] = 990
4088 16:34:10.790070 tx_first_pass[0][1][0] = 978
4089 16:34:10.790154 tx_last_pass[0][1][0] = 1002
4090 16:34:10.793318 tx_win_center[0][1][1] = 989
4091 16:34:10.796669 tx_first_pass[0][1][1] = 978
4092 16:34:10.799887 tx_last_pass[0][1][1] = 1001
4093 16:34:10.802943 tx_win_center[0][1][2] = 989
4094 16:34:10.803034 tx_first_pass[0][1][2] = 978
4095 16:34:10.806473 tx_last_pass[0][1][2] = 1001
4096 16:34:10.809409 tx_win_center[0][1][3] = 983
4097 16:34:10.812991 tx_first_pass[0][1][3] = 971
4098 16:34:10.816304 tx_last_pass[0][1][3] = 995
4099 16:34:10.816420 tx_win_center[0][1][4] = 989
4100 16:34:10.819533 tx_first_pass[0][1][4] = 977
4101 16:34:10.822835 tx_last_pass[0][1][4] = 1001
4102 16:34:10.826005 tx_win_center[0][1][5] = 986
4103 16:34:10.829414 tx_first_pass[0][1][5] = 974
4104 16:34:10.829539 tx_last_pass[0][1][5] = 998
4105 16:34:10.832743 tx_win_center[0][1][6] = 987
4106 16:34:10.835819 tx_first_pass[0][1][6] = 976
4107 16:34:10.839230 tx_last_pass[0][1][6] = 999
4108 16:34:10.839359 tx_win_center[0][1][7] = 989
4109 16:34:10.842513 tx_first_pass[0][1][7] = 977
4110 16:34:10.845618 tx_last_pass[0][1][7] = 1001
4111 16:34:10.848793 tx_win_center[0][1][8] = 982
4112 16:34:10.852373 tx_first_pass[0][1][8] = 969
4113 16:34:10.852503 tx_last_pass[0][1][8] = 995
4114 16:34:10.855608 tx_win_center[0][1][9] = 984
4115 16:34:10.858715 tx_first_pass[0][1][9] = 972
4116 16:34:10.862060 tx_last_pass[0][1][9] = 996
4117 16:34:10.865292 tx_win_center[0][1][10] = 988
4118 16:34:10.865411 tx_first_pass[0][1][10] = 976
4119 16:34:10.868468 tx_last_pass[0][1][10] = 1001
4120 16:34:10.871851 tx_win_center[0][1][11] = 982
4121 16:34:10.875068 tx_first_pass[0][1][11] = 970
4122 16:34:10.878307 tx_last_pass[0][1][11] = 995
4123 16:34:10.881622 tx_win_center[0][1][12] = 984
4124 16:34:10.881705 tx_first_pass[0][1][12] = 972
4125 16:34:10.884893 tx_last_pass[0][1][12] = 996
4126 16:34:10.888042 tx_win_center[0][1][13] = 984
4127 16:34:10.891372 tx_first_pass[0][1][13] = 972
4128 16:34:10.894626 tx_last_pass[0][1][13] = 997
4129 16:34:10.894710 tx_win_center[0][1][14] = 985
4130 16:34:10.897850 tx_first_pass[0][1][14] = 973
4131 16:34:10.901113 tx_last_pass[0][1][14] = 998
4132 16:34:10.904436 tx_win_center[0][1][15] = 988
4133 16:34:10.907595 tx_first_pass[0][1][15] = 976
4134 16:34:10.910863 tx_last_pass[0][1][15] = 1000
4135 16:34:10.910953 tx_win_center[1][0][0] = 992
4136 16:34:10.914214 tx_first_pass[1][0][0] = 979
4137 16:34:10.917498 tx_last_pass[1][0][0] = 1006
4138 16:34:10.920738 tx_win_center[1][0][1] = 991
4139 16:34:10.924047 tx_first_pass[1][0][1] = 978
4140 16:34:10.924133 tx_last_pass[1][0][1] = 1005
4141 16:34:10.927377 tx_win_center[1][0][2] = 989
4142 16:34:10.930564 tx_first_pass[1][0][2] = 977
4143 16:34:10.934016 tx_last_pass[1][0][2] = 1002
4144 16:34:10.937218 tx_win_center[1][0][3] = 987
4145 16:34:10.937346 tx_first_pass[1][0][3] = 975
4146 16:34:10.940315 tx_last_pass[1][0][3] = 999
4147 16:34:10.943638 tx_win_center[1][0][4] = 991
4148 16:34:10.947101 tx_first_pass[1][0][4] = 979
4149 16:34:10.947207 tx_last_pass[1][0][4] = 1004
4150 16:34:10.950240 tx_win_center[1][0][5] = 992
4151 16:34:10.953749 tx_first_pass[1][0][5] = 979
4152 16:34:10.957053 tx_last_pass[1][0][5] = 1005
4153 16:34:10.960000 tx_win_center[1][0][6] = 991
4154 16:34:10.960137 tx_first_pass[1][0][6] = 978
4155 16:34:10.963519 tx_last_pass[1][0][6] = 1005
4156 16:34:10.966679 tx_win_center[1][0][7] = 991
4157 16:34:10.970181 tx_first_pass[1][0][7] = 978
4158 16:34:10.973012 tx_last_pass[1][0][7] = 1004
4159 16:34:10.973134 tx_win_center[1][0][8] = 981
4160 16:34:10.976482 tx_first_pass[1][0][8] = 970
4161 16:34:10.979763 tx_last_pass[1][0][8] = 993
4162 16:34:10.983098 tx_win_center[1][0][9] = 980
4163 16:34:10.986545 tx_first_pass[1][0][9] = 969
4164 16:34:10.986640 tx_last_pass[1][0][9] = 992
4165 16:34:10.989877 tx_win_center[1][0][10] = 985
4166 16:34:10.993094 tx_first_pass[1][0][10] = 973
4167 16:34:10.995985 tx_last_pass[1][0][10] = 997
4168 16:34:10.999698 tx_win_center[1][0][11] = 985
4169 16:34:11.002913 tx_first_pass[1][0][11] = 973
4170 16:34:11.003014 tx_last_pass[1][0][11] = 998
4171 16:34:11.006066 tx_win_center[1][0][12] = 984
4172 16:34:11.009345 tx_first_pass[1][0][12] = 972
4173 16:34:11.012760 tx_last_pass[1][0][12] = 997
4174 16:34:11.015662 tx_win_center[1][0][13] = 985
4175 16:34:11.015753 tx_first_pass[1][0][13] = 974
4176 16:34:11.018987 tx_last_pass[1][0][13] = 997
4177 16:34:11.022315 tx_win_center[1][0][14] = 985
4178 16:34:11.025655 tx_first_pass[1][0][14] = 973
4179 16:34:11.028988 tx_last_pass[1][0][14] = 997
4180 16:34:11.029108 tx_win_center[1][0][15] = 979
4181 16:34:11.032251 tx_first_pass[1][0][15] = 967
4182 16:34:11.035449 tx_last_pass[1][0][15] = 991
4183 16:34:11.038684 tx_win_center[1][1][0] = 994
4184 16:34:11.042017 tx_first_pass[1][1][0] = 982
4185 16:34:11.042150 tx_last_pass[1][1][0] = 1007
4186 16:34:11.045453 tx_win_center[1][1][1] = 993
4187 16:34:11.048621 tx_first_pass[1][1][1] = 981
4188 16:34:11.051795 tx_last_pass[1][1][1] = 1006
4189 16:34:11.054930 tx_win_center[1][1][2] = 991
4190 16:34:11.058412 tx_first_pass[1][1][2] = 978
4191 16:34:11.058534 tx_last_pass[1][1][2] = 1005
4192 16:34:11.061398 tx_win_center[1][1][3] = 989
4193 16:34:11.064662 tx_first_pass[1][1][3] = 977
4194 16:34:11.068236 tx_last_pass[1][1][3] = 1001
4195 16:34:11.071362 tx_win_center[1][1][4] = 993
4196 16:34:11.071449 tx_first_pass[1][1][4] = 980
4197 16:34:11.074473 tx_last_pass[1][1][4] = 1006
4198 16:34:11.077862 tx_win_center[1][1][5] = 994
4199 16:34:11.081265 tx_first_pass[1][1][5] = 982
4200 16:34:11.084287 tx_last_pass[1][1][5] = 1007
4201 16:34:11.084409 tx_win_center[1][1][6] = 993
4202 16:34:11.087700 tx_first_pass[1][1][6] = 980
4203 16:34:11.091023 tx_last_pass[1][1][6] = 1006
4204 16:34:11.094123 tx_win_center[1][1][7] = 993
4205 16:34:11.097443 tx_first_pass[1][1][7] = 980
4206 16:34:11.097531 tx_last_pass[1][1][7] = 1006
4207 16:34:11.100827 tx_win_center[1][1][8] = 985
4208 16:34:11.104078 tx_first_pass[1][1][8] = 974
4209 16:34:11.107315 tx_last_pass[1][1][8] = 997
4210 16:34:11.107404 tx_win_center[1][1][9] = 984
4211 16:34:11.110556 tx_first_pass[1][1][9] = 972
4212 16:34:11.113834 tx_last_pass[1][1][9] = 997
4213 16:34:11.117080 tx_win_center[1][1][10] = 987
4214 16:34:11.120343 tx_first_pass[1][1][10] = 976
4215 16:34:11.120427 tx_last_pass[1][1][10] = 999
4216 16:34:11.123645 tx_win_center[1][1][11] = 988
4217 16:34:11.126921 tx_first_pass[1][1][11] = 976
4218 16:34:11.130309 tx_last_pass[1][1][11] = 1000
4219 16:34:11.133326 tx_win_center[1][1][12] = 988
4220 16:34:11.136624 tx_first_pass[1][1][12] = 976
4221 16:34:11.136718 tx_last_pass[1][1][12] = 1000
4222 16:34:11.139940 tx_win_center[1][1][13] = 988
4223 16:34:11.143190 tx_first_pass[1][1][13] = 977
4224 16:34:11.146710 tx_last_pass[1][1][13] = 1000
4225 16:34:11.149866 tx_win_center[1][1][14] = 988
4226 16:34:11.152983 tx_first_pass[1][1][14] = 977
4227 16:34:11.153076 tx_last_pass[1][1][14] = 999
4228 16:34:11.156671 tx_win_center[1][1][15] = 982
4229 16:34:11.159555 tx_first_pass[1][1][15] = 970
4230 16:34:11.163027 tx_last_pass[1][1][15] = 994
4231 16:34:11.163123 dump params rx window
4232 16:34:11.166385 rx_firspass[0][0][0] = 7
4233 16:34:11.169614 rx_lastpass[0][0][0] = 36
4234 16:34:11.172731 rx_firspass[0][0][1] = 8
4235 16:34:11.172823 rx_lastpass[0][0][1] = 36
4236 16:34:11.175915 rx_firspass[0][0][2] = 5
4237 16:34:11.179413 rx_lastpass[0][0][2] = 39
4238 16:34:11.179506 rx_firspass[0][0][3] = -3
4239 16:34:11.182673 rx_lastpass[0][0][3] = 30
4240 16:34:11.185785 rx_firspass[0][0][4] = 6
4241 16:34:11.189260 rx_lastpass[0][0][4] = 36
4242 16:34:11.189373 rx_firspass[0][0][5] = 3
4243 16:34:11.192302 rx_lastpass[0][0][5] = 33
4244 16:34:11.195837 rx_firspass[0][0][6] = 3
4245 16:34:11.195929 rx_lastpass[0][0][6] = 33
4246 16:34:11.199028 rx_firspass[0][0][7] = 4
4247 16:34:11.202130 rx_lastpass[0][0][7] = 36
4248 16:34:11.205649 rx_firspass[0][0][8] = -2
4249 16:34:11.205743 rx_lastpass[0][0][8] = 30
4250 16:34:11.208672 rx_firspass[0][0][9] = 2
4251 16:34:11.212066 rx_lastpass[0][0][9] = 32
4252 16:34:11.212158 rx_firspass[0][0][10] = 9
4253 16:34:11.215431 rx_lastpass[0][0][10] = 37
4254 16:34:11.218729 rx_firspass[0][0][11] = 0
4255 16:34:11.222018 rx_lastpass[0][0][11] = 30
4256 16:34:11.222111 rx_firspass[0][0][12] = 3
4257 16:34:11.225285 rx_lastpass[0][0][12] = 31
4258 16:34:11.228643 rx_firspass[0][0][13] = 1
4259 16:34:11.231936 rx_lastpass[0][0][13] = 31
4260 16:34:11.232058 rx_firspass[0][0][14] = 0
4261 16:34:11.234812 rx_lastpass[0][0][14] = 35
4262 16:34:11.238388 rx_firspass[0][0][15] = 4
4263 16:34:11.241363 rx_lastpass[0][0][15] = 36
4264 16:34:11.241481 rx_firspass[0][1][0] = 4
4265 16:34:11.244644 rx_lastpass[0][1][0] = 38
4266 16:34:11.247915 rx_firspass[0][1][1] = 4
4267 16:34:11.248006 rx_lastpass[0][1][1] = 38
4268 16:34:11.251639 rx_firspass[0][1][2] = 5
4269 16:34:11.254822 rx_lastpass[0][1][2] = 40
4270 16:34:11.254919 rx_firspass[0][1][3] = -2
4271 16:34:11.257876 rx_lastpass[0][1][3] = 31
4272 16:34:11.260977 rx_firspass[0][1][4] = 3
4273 16:34:11.264352 rx_lastpass[0][1][4] = 38
4274 16:34:11.264483 rx_firspass[0][1][5] = -1
4275 16:34:11.267735 rx_lastpass[0][1][5] = 34
4276 16:34:11.271082 rx_firspass[0][1][6] = 1
4277 16:34:11.274376 rx_lastpass[0][1][6] = 35
4278 16:34:11.274470 rx_firspass[0][1][7] = 3
4279 16:34:11.277423 rx_lastpass[0][1][7] = 37
4280 16:34:11.280974 rx_firspass[0][1][8] = -4
4281 16:34:11.281067 rx_lastpass[0][1][8] = 32
4282 16:34:11.284216 rx_firspass[0][1][9] = -2
4283 16:34:11.287315 rx_lastpass[0][1][9] = 34
4284 16:34:11.290633 rx_firspass[0][1][10] = 7
4285 16:34:11.290726 rx_lastpass[0][1][10] = 39
4286 16:34:11.293918 rx_firspass[0][1][11] = -2
4287 16:34:11.297283 rx_lastpass[0][1][11] = 32
4288 16:34:11.300408 rx_firspass[0][1][12] = 0
4289 16:34:11.300502 rx_lastpass[0][1][12] = 34
4290 16:34:11.303833 rx_firspass[0][1][13] = -1
4291 16:34:11.306790 rx_lastpass[0][1][13] = 33
4292 16:34:11.306882 rx_firspass[0][1][14] = 1
4293 16:34:11.310390 rx_lastpass[0][1][14] = 36
4294 16:34:11.313408 rx_firspass[0][1][15] = 3
4295 16:34:11.316854 rx_lastpass[0][1][15] = 38
4296 16:34:11.317001 rx_firspass[1][0][0] = 6
4297 16:34:11.320168 rx_lastpass[1][0][0] = 36
4298 16:34:11.323473 rx_firspass[1][0][1] = 5
4299 16:34:11.326774 rx_lastpass[1][0][1] = 37
4300 16:34:11.326859 rx_firspass[1][0][2] = 1
4301 16:34:11.330067 rx_lastpass[1][0][2] = 34
4302 16:34:11.333311 rx_firspass[1][0][3] = 0
4303 16:34:11.333391 rx_lastpass[1][0][3] = 31
4304 16:34:11.336683 rx_firspass[1][0][4] = 5
4305 16:34:11.339649 rx_lastpass[1][0][4] = 35
4306 16:34:11.342868 rx_firspass[1][0][5] = 9
4307 16:34:11.342956 rx_lastpass[1][0][5] = 38
4308 16:34:11.346447 rx_firspass[1][0][6] = 6
4309 16:34:11.349681 rx_lastpass[1][0][6] = 38
4310 16:34:11.349763 rx_firspass[1][0][7] = 5
4311 16:34:11.353050 rx_lastpass[1][0][7] = 34
4312 16:34:11.356256 rx_firspass[1][0][8] = 0
4313 16:34:11.359540 rx_lastpass[1][0][8] = 33
4314 16:34:11.359660 rx_firspass[1][0][9] = 0
4315 16:34:11.362726 rx_lastpass[1][0][9] = 31
4316 16:34:11.365963 rx_firspass[1][0][10] = 3
4317 16:34:11.366049 rx_lastpass[1][0][10] = 36
4318 16:34:11.369275 rx_firspass[1][0][11] = 4
4319 16:34:11.372726 rx_lastpass[1][0][11] = 36
4320 16:34:11.376061 rx_firspass[1][0][12] = 6
4321 16:34:11.376174 rx_lastpass[1][0][12] = 34
4322 16:34:11.379171 rx_firspass[1][0][13] = 6
4323 16:34:11.382438 rx_lastpass[1][0][13] = 35
4324 16:34:11.385706 rx_firspass[1][0][14] = 5
4325 16:34:11.385789 rx_lastpass[1][0][14] = 36
4326 16:34:11.388893 rx_firspass[1][0][15] = -4
4327 16:34:11.392328 rx_lastpass[1][0][15] = 29
4328 16:34:11.392419 rx_firspass[1][1][0] = 4
4329 16:34:11.395352 rx_lastpass[1][1][0] = 40
4330 16:34:11.398674 rx_firspass[1][1][1] = 4
4331 16:34:11.402112 rx_lastpass[1][1][1] = 38
4332 16:34:11.402203 rx_firspass[1][1][2] = 3
4333 16:34:11.405243 rx_lastpass[1][1][2] = 34
4334 16:34:11.408488 rx_firspass[1][1][3] = -2
4335 16:34:11.411982 rx_lastpass[1][1][3] = 33
4336 16:34:11.412075 rx_firspass[1][1][4] = 4
4337 16:34:11.415158 rx_lastpass[1][1][4] = 39
4338 16:34:11.418347 rx_firspass[1][1][5] = 6
4339 16:34:11.418444 rx_lastpass[1][1][5] = 40
4340 16:34:11.421526 rx_firspass[1][1][6] = 6
4341 16:34:11.424723 rx_lastpass[1][1][6] = 40
4342 16:34:11.424814 rx_firspass[1][1][7] = 3
4343 16:34:11.428065 rx_lastpass[1][1][7] = 38
4344 16:34:11.431322 rx_firspass[1][1][8] = -1
4345 16:34:11.434659 rx_lastpass[1][1][8] = 35
4346 16:34:11.434777 rx_firspass[1][1][9] = -3
4347 16:34:11.438153 rx_lastpass[1][1][9] = 33
4348 16:34:11.441446 rx_firspass[1][1][10] = 3
4349 16:34:11.444763 rx_lastpass[1][1][10] = 38
4350 16:34:11.444854 rx_firspass[1][1][11] = 3
4351 16:34:11.447686 rx_lastpass[1][1][11] = 38
4352 16:34:11.450979 rx_firspass[1][1][12] = 3
4353 16:34:11.454323 rx_lastpass[1][1][12] = 37
4354 16:34:11.454414 rx_firspass[1][1][13] = 3
4355 16:34:11.457666 rx_lastpass[1][1][13] = 39
4356 16:34:11.460868 rx_firspass[1][1][14] = 4
4357 16:34:11.460959 rx_lastpass[1][1][14] = 40
4358 16:34:11.464116 rx_firspass[1][1][15] = -4
4359 16:34:11.467446 rx_lastpass[1][1][15] = 31
4360 16:34:11.470851 dump params clk_delay
4361 16:34:11.471014 clk_delay[0] = -1
4362 16:34:11.473980 clk_delay[1] = 0
4363 16:34:11.474130 dump params dqs_delay
4364 16:34:11.477449 dqs_delay[0][0] = 0
4365 16:34:11.477588 dqs_delay[0][1] = 0
4366 16:34:11.480585 dqs_delay[1][0] = 0
4367 16:34:11.480682 dqs_delay[1][1] = -1
4368 16:34:11.483854 dump params delay_cell_unit = 744
4369 16:34:11.486896 dump source = 0x0
4370 16:34:11.490436 dump params frequency:1200
4371 16:34:11.490530 dump params rank number:2
4372 16:34:11.490602
4373 16:34:11.493874 dump params write leveling
4374 16:34:11.497020 write leveling[0][0][0] = 0x0
4375 16:34:11.500030 write leveling[0][0][1] = 0x0
4376 16:34:11.503666 write leveling[0][1][0] = 0x0
4377 16:34:11.503764 write leveling[0][1][1] = 0x0
4378 16:34:11.506814 write leveling[1][0][0] = 0x0
4379 16:34:11.509971 write leveling[1][0][1] = 0x0
4380 16:34:11.513163 write leveling[1][1][0] = 0x0
4381 16:34:11.516678 write leveling[1][1][1] = 0x0
4382 16:34:11.516776 dump params cbt_cs
4383 16:34:11.519573 cbt_cs[0][0] = 0x0
4384 16:34:11.519696 cbt_cs[0][1] = 0x0
4385 16:34:11.523107 cbt_cs[1][0] = 0x0
4386 16:34:11.523224 cbt_cs[1][1] = 0x0
4387 16:34:11.526429 dump params cbt_mr12
4388 16:34:11.526528 cbt_mr12[0][0] = 0x0
4389 16:34:11.529683 cbt_mr12[0][1] = 0x0
4390 16:34:11.532857 cbt_mr12[1][0] = 0x0
4391 16:34:11.532977 cbt_mr12[1][1] = 0x0
4392 16:34:11.536061 dump params tx window
4393 16:34:11.536180 tx_center_min[0][0][0] = 0
4394 16:34:11.539684 tx_center_max[0][0][0] = 0
4395 16:34:11.542936 tx_center_min[0][0][1] = 0
4396 16:34:11.545812 tx_center_max[0][0][1] = 0
4397 16:34:11.545903 tx_center_min[0][1][0] = 0
4398 16:34:11.549383 tx_center_max[0][1][0] = 0
4399 16:34:11.552737 tx_center_min[0][1][1] = 0
4400 16:34:11.556068 tx_center_max[0][1][1] = 0
4401 16:34:11.556150 tx_center_min[1][0][0] = 0
4402 16:34:11.558961 tx_center_max[1][0][0] = 0
4403 16:34:11.562246 tx_center_min[1][0][1] = 0
4404 16:34:11.565647 tx_center_max[1][0][1] = 0
4405 16:34:11.565754 tx_center_min[1][1][0] = 0
4406 16:34:11.569095 tx_center_max[1][1][0] = 0
4407 16:34:11.572034 tx_center_min[1][1][1] = 0
4408 16:34:11.575362 tx_center_max[1][1][1] = 0
4409 16:34:11.575444 dump params tx window
4410 16:34:11.578667 tx_win_center[0][0][0] = 0
4411 16:34:11.582116 tx_first_pass[0][0][0] = 0
4412 16:34:11.585311 tx_last_pass[0][0][0] = 0
4413 16:34:11.585439 tx_win_center[0][0][1] = 0
4414 16:34:11.588462 tx_first_pass[0][0][1] = 0
4415 16:34:11.591847 tx_last_pass[0][0][1] = 0
4416 16:34:11.591969 tx_win_center[0][0][2] = 0
4417 16:34:11.595233 tx_first_pass[0][0][2] = 0
4418 16:34:11.598564 tx_last_pass[0][0][2] = 0
4419 16:34:11.601823 tx_win_center[0][0][3] = 0
4420 16:34:11.601955 tx_first_pass[0][0][3] = 0
4421 16:34:11.605050 tx_last_pass[0][0][3] = 0
4422 16:34:11.608058 tx_win_center[0][0][4] = 0
4423 16:34:11.611390 tx_first_pass[0][0][4] = 0
4424 16:34:11.611525 tx_last_pass[0][0][4] = 0
4425 16:34:11.614497 tx_win_center[0][0][5] = 0
4426 16:34:11.618093 tx_first_pass[0][0][5] = 0
4427 16:34:11.621399 tx_last_pass[0][0][5] = 0
4428 16:34:11.621600 tx_win_center[0][0][6] = 0
4429 16:34:11.624653 tx_first_pass[0][0][6] = 0
4430 16:34:11.627739 tx_last_pass[0][0][6] = 0
4431 16:34:11.630949 tx_win_center[0][0][7] = 0
4432 16:34:11.631140 tx_first_pass[0][0][7] = 0
4433 16:34:11.634497 tx_last_pass[0][0][7] = 0
4434 16:34:11.637358 tx_win_center[0][0][8] = 0
4435 16:34:11.640789 tx_first_pass[0][0][8] = 0
4436 16:34:11.640876 tx_last_pass[0][0][8] = 0
4437 16:34:11.644036 tx_win_center[0][0][9] = 0
4438 16:34:11.647171 tx_first_pass[0][0][9] = 0
4439 16:34:11.647258 tx_last_pass[0][0][9] = 0
4440 16:34:11.650415 tx_win_center[0][0][10] = 0
4441 16:34:11.653761 tx_first_pass[0][0][10] = 0
4442 16:34:11.657329 tx_last_pass[0][0][10] = 0
4443 16:34:11.660319 tx_win_center[0][0][11] = 0
4444 16:34:11.660428 tx_first_pass[0][0][11] = 0
4445 16:34:11.663689 tx_last_pass[0][0][11] = 0
4446 16:34:11.666979 tx_win_center[0][0][12] = 0
4447 16:34:11.670191 tx_first_pass[0][0][12] = 0
4448 16:34:11.670302 tx_last_pass[0][0][12] = 0
4449 16:34:11.673727 tx_win_center[0][0][13] = 0
4450 16:34:11.676908 tx_first_pass[0][0][13] = 0
4451 16:34:11.680122 tx_last_pass[0][0][13] = 0
4452 16:34:11.680265 tx_win_center[0][0][14] = 0
4453 16:34:11.683148 tx_first_pass[0][0][14] = 0
4454 16:34:11.686466 tx_last_pass[0][0][14] = 0
4455 16:34:11.689752 tx_win_center[0][0][15] = 0
4456 16:34:11.693087 tx_first_pass[0][0][15] = 0
4457 16:34:11.693203 tx_last_pass[0][0][15] = 0
4458 16:34:11.696395 tx_win_center[0][1][0] = 0
4459 16:34:11.699712 tx_first_pass[0][1][0] = 0
4460 16:34:11.699817 tx_last_pass[0][1][0] = 0
4461 16:34:11.702835 tx_win_center[0][1][1] = 0
4462 16:34:11.706375 tx_first_pass[0][1][1] = 0
4463 16:34:11.709351 tx_last_pass[0][1][1] = 0
4464 16:34:11.709477 tx_win_center[0][1][2] = 0
4465 16:34:11.712586 tx_first_pass[0][1][2] = 0
4466 16:34:11.715731 tx_last_pass[0][1][2] = 0
4467 16:34:11.719242 tx_win_center[0][1][3] = 0
4468 16:34:11.719374 tx_first_pass[0][1][3] = 0
4469 16:34:11.722502 tx_last_pass[0][1][3] = 0
4470 16:34:11.725712 tx_win_center[0][1][4] = 0
4471 16:34:11.728973 tx_first_pass[0][1][4] = 0
4472 16:34:11.729065 tx_last_pass[0][1][4] = 0
4473 16:34:11.732162 tx_win_center[0][1][5] = 0
4474 16:34:11.735479 tx_first_pass[0][1][5] = 0
4475 16:34:11.738756 tx_last_pass[0][1][5] = 0
4476 16:34:11.738864 tx_win_center[0][1][6] = 0
4477 16:34:11.742246 tx_first_pass[0][1][6] = 0
4478 16:34:11.745295 tx_last_pass[0][1][6] = 0
4479 16:34:11.745455 tx_win_center[0][1][7] = 0
4480 16:34:11.748700 tx_first_pass[0][1][7] = 0
4481 16:34:11.751767 tx_last_pass[0][1][7] = 0
4482 16:34:11.755139 tx_win_center[0][1][8] = 0
4483 16:34:11.755260 tx_first_pass[0][1][8] = 0
4484 16:34:11.758474 tx_last_pass[0][1][8] = 0
4485 16:34:11.761673 tx_win_center[0][1][9] = 0
4486 16:34:11.765178 tx_first_pass[0][1][9] = 0
4487 16:34:11.765301 tx_last_pass[0][1][9] = 0
4488 16:34:11.768137 tx_win_center[0][1][10] = 0
4489 16:34:11.771491 tx_first_pass[0][1][10] = 0
4490 16:34:11.774814 tx_last_pass[0][1][10] = 0
4491 16:34:11.774906 tx_win_center[0][1][11] = 0
4492 16:34:11.777999 tx_first_pass[0][1][11] = 0
4493 16:34:11.781287 tx_last_pass[0][1][11] = 0
4494 16:34:11.784643 tx_win_center[0][1][12] = 0
4495 16:34:11.787901 tx_first_pass[0][1][12] = 0
4496 16:34:11.788006 tx_last_pass[0][1][12] = 0
4497 16:34:11.791189 tx_win_center[0][1][13] = 0
4498 16:34:11.794673 tx_first_pass[0][1][13] = 0
4499 16:34:11.797652 tx_last_pass[0][1][13] = 0
4500 16:34:11.797747 tx_win_center[0][1][14] = 0
4501 16:34:11.801066 tx_first_pass[0][1][14] = 0
4502 16:34:11.804336 tx_last_pass[0][1][14] = 0
4503 16:34:11.807637 tx_win_center[0][1][15] = 0
4504 16:34:11.807733 tx_first_pass[0][1][15] = 0
4505 16:34:11.810942 tx_last_pass[0][1][15] = 0
4506 16:34:11.814168 tx_win_center[1][0][0] = 0
4507 16:34:11.817311 tx_first_pass[1][0][0] = 0
4508 16:34:11.817442 tx_last_pass[1][0][0] = 0
4509 16:34:11.820500 tx_win_center[1][0][1] = 0
4510 16:34:11.823702 tx_first_pass[1][0][1] = 0
4511 16:34:11.827200 tx_last_pass[1][0][1] = 0
4512 16:34:11.827305 tx_win_center[1][0][2] = 0
4513 16:34:11.830316 tx_first_pass[1][0][2] = 0
4514 16:34:11.833808 tx_last_pass[1][0][2] = 0
4515 16:34:11.837005 tx_win_center[1][0][3] = 0
4516 16:34:11.837122 tx_first_pass[1][0][3] = 0
4517 16:34:11.840247 tx_last_pass[1][0][3] = 0
4518 16:34:11.843489 tx_win_center[1][0][4] = 0
4519 16:34:11.843579 tx_first_pass[1][0][4] = 0
4520 16:34:11.846649 tx_last_pass[1][0][4] = 0
4521 16:34:11.850079 tx_win_center[1][0][5] = 0
4522 16:34:11.853305 tx_first_pass[1][0][5] = 0
4523 16:34:11.853422 tx_last_pass[1][0][5] = 0
4524 16:34:11.856641 tx_win_center[1][0][6] = 0
4525 16:34:11.859809 tx_first_pass[1][0][6] = 0
4526 16:34:11.863047 tx_last_pass[1][0][6] = 0
4527 16:34:11.863138 tx_win_center[1][0][7] = 0
4528 16:34:11.866382 tx_first_pass[1][0][7] = 0
4529 16:34:11.869892 tx_last_pass[1][0][7] = 0
4530 16:34:11.873028 tx_win_center[1][0][8] = 0
4531 16:34:11.873140 tx_first_pass[1][0][8] = 0
4532 16:34:11.876367 tx_last_pass[1][0][8] = 0
4533 16:34:11.879650 tx_win_center[1][0][9] = 0
4534 16:34:11.882923 tx_first_pass[1][0][9] = 0
4535 16:34:11.883039 tx_last_pass[1][0][9] = 0
4536 16:34:11.886220 tx_win_center[1][0][10] = 0
4537 16:34:11.889202 tx_first_pass[1][0][10] = 0
4538 16:34:11.892519 tx_last_pass[1][0][10] = 0
4539 16:34:11.892603 tx_win_center[1][0][11] = 0
4540 16:34:11.895852 tx_first_pass[1][0][11] = 0
4541 16:34:11.899242 tx_last_pass[1][0][11] = 0
4542 16:34:11.902483 tx_win_center[1][0][12] = 0
4543 16:34:11.902569 tx_first_pass[1][0][12] = 0
4544 16:34:11.905817 tx_last_pass[1][0][12] = 0
4545 16:34:11.909071 tx_win_center[1][0][13] = 0
4546 16:34:11.912368 tx_first_pass[1][0][13] = 0
4547 16:34:11.912451 tx_last_pass[1][0][13] = 0
4548 16:34:11.915464 tx_win_center[1][0][14] = 0
4549 16:34:11.918751 tx_first_pass[1][0][14] = 0
4550 16:34:11.921987 tx_last_pass[1][0][14] = 0
4551 16:34:11.922075 tx_win_center[1][0][15] = 0
4552 16:34:11.925232 tx_first_pass[1][0][15] = 0
4553 16:34:11.928475 tx_last_pass[1][0][15] = 0
4554 16:34:11.932123 tx_win_center[1][1][0] = 0
4555 16:34:11.932238 tx_first_pass[1][1][0] = 0
4556 16:34:11.935124 tx_last_pass[1][1][0] = 0
4557 16:34:11.938375 tx_win_center[1][1][1] = 0
4558 16:34:11.941691 tx_first_pass[1][1][1] = 0
4559 16:34:11.941777 tx_last_pass[1][1][1] = 0
4560 16:34:11.945153 tx_win_center[1][1][2] = 0
4561 16:34:11.948420 tx_first_pass[1][1][2] = 0
4562 16:34:11.951661 tx_last_pass[1][1][2] = 0
4563 16:34:11.951774 tx_win_center[1][1][3] = 0
4564 16:34:11.954892 tx_first_pass[1][1][3] = 0
4565 16:34:11.958074 tx_last_pass[1][1][3] = 0
4566 16:34:11.961350 tx_win_center[1][1][4] = 0
4567 16:34:11.961474 tx_first_pass[1][1][4] = 0
4568 16:34:11.964741 tx_last_pass[1][1][4] = 0
4569 16:34:11.967980 tx_win_center[1][1][5] = 0
4570 16:34:11.971106 tx_first_pass[1][1][5] = 0
4571 16:34:11.971224 tx_last_pass[1][1][5] = 0
4572 16:34:11.974314 tx_win_center[1][1][6] = 0
4573 16:34:11.977900 tx_first_pass[1][1][6] = 0
4574 16:34:11.977983 tx_last_pass[1][1][6] = 0
4575 16:34:11.980833 tx_win_center[1][1][7] = 0
4576 16:34:11.984338 tx_first_pass[1][1][7] = 0
4577 16:34:11.987556 tx_last_pass[1][1][7] = 0
4578 16:34:11.987647 tx_win_center[1][1][8] = 0
4579 16:34:11.991039 tx_first_pass[1][1][8] = 0
4580 16:34:11.994014 tx_last_pass[1][1][8] = 0
4581 16:34:11.997369 tx_win_center[1][1][9] = 0
4582 16:34:11.997486 tx_first_pass[1][1][9] = 0
4583 16:34:12.000655 tx_last_pass[1][1][9] = 0
4584 16:34:12.004020 tx_win_center[1][1][10] = 0
4585 16:34:12.007287 tx_first_pass[1][1][10] = 0
4586 16:34:12.007385 tx_last_pass[1][1][10] = 0
4587 16:34:12.010497 tx_win_center[1][1][11] = 0
4588 16:34:12.013689 tx_first_pass[1][1][11] = 0
4589 16:34:12.016905 tx_last_pass[1][1][11] = 0
4590 16:34:12.016986 tx_win_center[1][1][12] = 0
4591 16:34:12.020111 tx_first_pass[1][1][12] = 0
4592 16:34:12.023450 tx_last_pass[1][1][12] = 0
4593 16:34:12.026636 tx_win_center[1][1][13] = 0
4594 16:34:12.030083 tx_first_pass[1][1][13] = 0
4595 16:34:12.030163 tx_last_pass[1][1][13] = 0
4596 16:34:12.033279 tx_win_center[1][1][14] = 0
4597 16:34:12.036486 tx_first_pass[1][1][14] = 0
4598 16:34:12.039840 tx_last_pass[1][1][14] = 0
4599 16:34:12.039920 tx_win_center[1][1][15] = 0
4600 16:34:12.043186 tx_first_pass[1][1][15] = 0
4601 16:34:12.046354 tx_last_pass[1][1][15] = 0
4602 16:34:12.046438 dump params rx window
4603 16:34:12.049607 rx_firspass[0][0][0] = 0
4604 16:34:12.052855 rx_lastpass[0][0][0] = 0
4605 16:34:12.056240 rx_firspass[0][0][1] = 0
4606 16:34:12.056354 rx_lastpass[0][0][1] = 0
4607 16:34:12.059604 rx_firspass[0][0][2] = 0
4608 16:34:12.062872 rx_lastpass[0][0][2] = 0
4609 16:34:12.062959 rx_firspass[0][0][3] = 0
4610 16:34:12.066132 rx_lastpass[0][0][3] = 0
4611 16:34:12.069339 rx_firspass[0][0][4] = 0
4612 16:34:12.069462 rx_lastpass[0][0][4] = 0
4613 16:34:12.072691 rx_firspass[0][0][5] = 0
4614 16:34:12.075945 rx_lastpass[0][0][5] = 0
4615 16:34:12.079125 rx_firspass[0][0][6] = 0
4616 16:34:12.079204 rx_lastpass[0][0][6] = 0
4617 16:34:12.082501 rx_firspass[0][0][7] = 0
4618 16:34:12.085540 rx_lastpass[0][0][7] = 0
4619 16:34:12.085619 rx_firspass[0][0][8] = 0
4620 16:34:12.089015 rx_lastpass[0][0][8] = 0
4621 16:34:12.092420 rx_firspass[0][0][9] = 0
4622 16:34:12.092504 rx_lastpass[0][0][9] = 0
4623 16:34:12.095475 rx_firspass[0][0][10] = 0
4624 16:34:12.099012 rx_lastpass[0][0][10] = 0
4625 16:34:12.102258 rx_firspass[0][0][11] = 0
4626 16:34:12.102339 rx_lastpass[0][0][11] = 0
4627 16:34:12.105206 rx_firspass[0][0][12] = 0
4628 16:34:12.108477 rx_lastpass[0][0][12] = 0
4629 16:34:12.108557 rx_firspass[0][0][13] = 0
4630 16:34:12.111819 rx_lastpass[0][0][13] = 0
4631 16:34:12.115153 rx_firspass[0][0][14] = 0
4632 16:34:12.118274 rx_lastpass[0][0][14] = 0
4633 16:34:12.118361 rx_firspass[0][0][15] = 0
4634 16:34:12.121452 rx_lastpass[0][0][15] = 0
4635 16:34:12.124782 rx_firspass[0][1][0] = 0
4636 16:34:12.124904 rx_lastpass[0][1][0] = 0
4637 16:34:12.128064 rx_firspass[0][1][1] = 0
4638 16:34:12.131614 rx_lastpass[0][1][1] = 0
4639 16:34:12.134751 rx_firspass[0][1][2] = 0
4640 16:34:12.134830 rx_lastpass[0][1][2] = 0
4641 16:34:12.138154 rx_firspass[0][1][3] = 0
4642 16:34:12.141366 rx_lastpass[0][1][3] = 0
4643 16:34:12.141490 rx_firspass[0][1][4] = 0
4644 16:34:12.144641 rx_lastpass[0][1][4] = 0
4645 16:34:12.148055 rx_firspass[0][1][5] = 0
4646 16:34:12.148163 rx_lastpass[0][1][5] = 0
4647 16:34:12.151229 rx_firspass[0][1][6] = 0
4648 16:34:12.154570 rx_lastpass[0][1][6] = 0
4649 16:34:12.157892 rx_firspass[0][1][7] = 0
4650 16:34:12.157973 rx_lastpass[0][1][7] = 0
4651 16:34:12.161001 rx_firspass[0][1][8] = 0
4652 16:34:12.164186 rx_lastpass[0][1][8] = 0
4653 16:34:12.164279 rx_firspass[0][1][9] = 0
4654 16:34:12.167731 rx_lastpass[0][1][9] = 0
4655 16:34:12.170979 rx_firspass[0][1][10] = 0
4656 16:34:12.171063 rx_lastpass[0][1][10] = 0
4657 16:34:12.174117 rx_firspass[0][1][11] = 0
4658 16:34:12.177300 rx_lastpass[0][1][11] = 0
4659 16:34:12.180728 rx_firspass[0][1][12] = 0
4660 16:34:12.180815 rx_lastpass[0][1][12] = 0
4661 16:34:12.183990 rx_firspass[0][1][13] = 0
4662 16:34:12.187205 rx_lastpass[0][1][13] = 0
4663 16:34:12.190501 rx_firspass[0][1][14] = 0
4664 16:34:12.190606 rx_lastpass[0][1][14] = 0
4665 16:34:12.193693 rx_firspass[0][1][15] = 0
4666 16:34:12.197161 rx_lastpass[0][1][15] = 0
4667 16:34:12.197244 rx_firspass[1][0][0] = 0
4668 16:34:12.200394 rx_lastpass[1][0][0] = 0
4669 16:34:12.203660 rx_firspass[1][0][1] = 0
4670 16:34:12.206791 rx_lastpass[1][0][1] = 0
4671 16:34:12.206899 rx_firspass[1][0][2] = 0
4672 16:34:12.210029 rx_lastpass[1][0][2] = 0
4673 16:34:12.213307 rx_firspass[1][0][3] = 0
4674 16:34:12.213419 rx_lastpass[1][0][3] = 0
4675 16:34:12.216650 rx_firspass[1][0][4] = 0
4676 16:34:12.220056 rx_lastpass[1][0][4] = 0
4677 16:34:12.220137 rx_firspass[1][0][5] = 0
4678 16:34:12.223278 rx_lastpass[1][0][5] = 0
4679 16:34:12.226457 rx_firspass[1][0][6] = 0
4680 16:34:12.226542 rx_lastpass[1][0][6] = 0
4681 16:34:12.229679 rx_firspass[1][0][7] = 0
4682 16:34:12.233012 rx_lastpass[1][0][7] = 0
4683 16:34:12.236441 rx_firspass[1][0][8] = 0
4684 16:34:12.236516 rx_lastpass[1][0][8] = 0
4685 16:34:12.239703 rx_firspass[1][0][9] = 0
4686 16:34:12.242848 rx_lastpass[1][0][9] = 0
4687 16:34:12.242934 rx_firspass[1][0][10] = 0
4688 16:34:12.245998 rx_lastpass[1][0][10] = 0
4689 16:34:12.249262 rx_firspass[1][0][11] = 0
4690 16:34:12.252869 rx_lastpass[1][0][11] = 0
4691 16:34:12.252973 rx_firspass[1][0][12] = 0
4692 16:34:12.256037 rx_lastpass[1][0][12] = 0
4693 16:34:12.259287 rx_firspass[1][0][13] = 0
4694 16:34:12.259375 rx_lastpass[1][0][13] = 0
4695 16:34:12.262714 rx_firspass[1][0][14] = 0
4696 16:34:12.265899 rx_lastpass[1][0][14] = 0
4697 16:34:12.268900 rx_firspass[1][0][15] = 0
4698 16:34:12.269004 rx_lastpass[1][0][15] = 0
4699 16:34:12.272401 rx_firspass[1][1][0] = 0
4700 16:34:12.275704 rx_lastpass[1][1][0] = 0
4701 16:34:12.275782 rx_firspass[1][1][1] = 0
4702 16:34:12.278738 rx_lastpass[1][1][1] = 0
4703 16:34:12.282127 rx_firspass[1][1][2] = 0
4704 16:34:12.285418 rx_lastpass[1][1][2] = 0
4705 16:34:12.285516 rx_firspass[1][1][3] = 0
4706 16:34:12.288700 rx_lastpass[1][1][3] = 0
4707 16:34:12.291829 rx_firspass[1][1][4] = 0
4708 16:34:12.291949 rx_lastpass[1][1][4] = 0
4709 16:34:12.295140 rx_firspass[1][1][5] = 0
4710 16:34:12.298357 rx_lastpass[1][1][5] = 0
4711 16:34:12.298435 rx_firspass[1][1][6] = 0
4712 16:34:12.301663 rx_lastpass[1][1][6] = 0
4713 16:34:12.305069 rx_firspass[1][1][7] = 0
4714 16:34:12.308273 rx_lastpass[1][1][7] = 0
4715 16:34:12.308359 rx_firspass[1][1][8] = 0
4716 16:34:12.311862 rx_lastpass[1][1][8] = 0
4717 16:34:12.315021 rx_firspass[1][1][9] = 0
4718 16:34:12.315106 rx_lastpass[1][1][9] = 0
4719 16:34:12.318100 rx_firspass[1][1][10] = 0
4720 16:34:12.321670 rx_lastpass[1][1][10] = 0
4721 16:34:12.321783 rx_firspass[1][1][11] = 0
4722 16:34:12.324664 rx_lastpass[1][1][11] = 0
4723 16:34:12.328022 rx_firspass[1][1][12] = 0
4724 16:34:12.331316 rx_lastpass[1][1][12] = 0
4725 16:34:12.331400 rx_firspass[1][1][13] = 0
4726 16:34:12.334665 rx_lastpass[1][1][13] = 0
4727 16:34:12.337923 rx_firspass[1][1][14] = 0
4728 16:34:12.341219 rx_lastpass[1][1][14] = 0
4729 16:34:12.341328 rx_firspass[1][1][15] = 0
4730 16:34:12.344471 rx_lastpass[1][1][15] = 0
4731 16:34:12.347482 dump params clk_delay
4732 16:34:12.347581 clk_delay[0] = 0
4733 16:34:12.350936 clk_delay[1] = 0
4734 16:34:12.351019 dump params dqs_delay
4735 16:34:12.354085 dqs_delay[0][0] = 0
4736 16:34:12.354171 dqs_delay[0][1] = 0
4737 16:34:12.357293 dqs_delay[1][0] = 0
4738 16:34:12.357415 dqs_delay[1][1] = 0
4739 16:34:12.360801 dump params delay_cell_unit = 744
4740 16:34:12.363925 dump source = 0x0
4741 16:34:12.364017 dump params frequency:800
4742 16:34:12.367266 dump params rank number:2
4743 16:34:12.367348
4744 16:34:12.370527 dump params write leveling
4745 16:34:12.373677 write leveling[0][0][0] = 0x0
4746 16:34:12.377226 write leveling[0][0][1] = 0x0
4747 16:34:12.377342 write leveling[0][1][0] = 0x0
4748 16:34:12.380424 write leveling[0][1][1] = 0x0
4749 16:34:12.383785 write leveling[1][0][0] = 0x0
4750 16:34:12.386806 write leveling[1][0][1] = 0x0
4751 16:34:12.390053 write leveling[1][1][0] = 0x0
4752 16:34:12.393235 write leveling[1][1][1] = 0x0
4753 16:34:12.393348 dump params cbt_cs
4754 16:34:12.396739 cbt_cs[0][0] = 0x0
4755 16:34:12.396852 cbt_cs[0][1] = 0x0
4756 16:34:12.399881 cbt_cs[1][0] = 0x0
4757 16:34:12.399997 cbt_cs[1][1] = 0x0
4758 16:34:12.403197 dump params cbt_mr12
4759 16:34:12.403342 cbt_mr12[0][0] = 0x0
4760 16:34:12.406627 cbt_mr12[0][1] = 0x0
4761 16:34:12.406741 cbt_mr12[1][0] = 0x0
4762 16:34:12.410081 cbt_mr12[1][1] = 0x0
4763 16:34:12.413306 dump params tx window
4764 16:34:12.413415 tx_center_min[0][0][0] = 0
4765 16:34:12.416482 tx_center_max[0][0][0] = 0
4766 16:34:12.419708 tx_center_min[0][0][1] = 0
4767 16:34:12.422845 tx_center_max[0][0][1] = 0
4768 16:34:12.422958 tx_center_min[0][1][0] = 0
4769 16:34:12.426102 tx_center_max[0][1][0] = 0
4770 16:34:12.429649 tx_center_min[0][1][1] = 0
4771 16:34:12.432798 tx_center_max[0][1][1] = 0
4772 16:34:12.432913 tx_center_min[1][0][0] = 0
4773 16:34:12.436010 tx_center_max[1][0][0] = 0
4774 16:34:12.439252 tx_center_min[1][0][1] = 0
4775 16:34:12.442539 tx_center_max[1][0][1] = 0
4776 16:34:12.442662 tx_center_min[1][1][0] = 0
4777 16:34:12.445858 tx_center_max[1][1][0] = 0
4778 16:34:12.449228 tx_center_min[1][1][1] = 0
4779 16:34:12.452497 tx_center_max[1][1][1] = 0
4780 16:34:12.452579 dump params tx window
4781 16:34:12.455719 tx_win_center[0][0][0] = 0
4782 16:34:12.458758 tx_first_pass[0][0][0] = 0
4783 16:34:12.458850 tx_last_pass[0][0][0] = 0
4784 16:34:12.462186 tx_win_center[0][0][1] = 0
4785 16:34:12.465657 tx_first_pass[0][0][1] = 0
4786 16:34:12.468831 tx_last_pass[0][0][1] = 0
4787 16:34:12.468925 tx_win_center[0][0][2] = 0
4788 16:34:12.472057 tx_first_pass[0][0][2] = 0
4789 16:34:12.475428 tx_last_pass[0][0][2] = 0
4790 16:34:12.478652 tx_win_center[0][0][3] = 0
4791 16:34:12.478769 tx_first_pass[0][0][3] = 0
4792 16:34:12.481914 tx_last_pass[0][0][3] = 0
4793 16:34:12.485182 tx_win_center[0][0][4] = 0
4794 16:34:12.488488 tx_first_pass[0][0][4] = 0
4795 16:34:12.488578 tx_last_pass[0][0][4] = 0
4796 16:34:12.491693 tx_win_center[0][0][5] = 0
4797 16:34:12.494955 tx_first_pass[0][0][5] = 0
4798 16:34:12.498193 tx_last_pass[0][0][5] = 0
4799 16:34:12.498278 tx_win_center[0][0][6] = 0
4800 16:34:12.501424 tx_first_pass[0][0][6] = 0
4801 16:34:12.504921 tx_last_pass[0][0][6] = 0
4802 16:34:12.505003 tx_win_center[0][0][7] = 0
4803 16:34:12.507847 tx_first_pass[0][0][7] = 0
4804 16:34:12.511161 tx_last_pass[0][0][7] = 0
4805 16:34:12.514386 tx_win_center[0][0][8] = 0
4806 16:34:12.514472 tx_first_pass[0][0][8] = 0
4807 16:34:12.517720 tx_last_pass[0][0][8] = 0
4808 16:34:12.521082 tx_win_center[0][0][9] = 0
4809 16:34:12.524427 tx_first_pass[0][0][9] = 0
4810 16:34:12.524515 tx_last_pass[0][0][9] = 0
4811 16:34:12.527626 tx_win_center[0][0][10] = 0
4812 16:34:12.530785 tx_first_pass[0][0][10] = 0
4813 16:34:12.534254 tx_last_pass[0][0][10] = 0
4814 16:34:12.534336 tx_win_center[0][0][11] = 0
4815 16:34:12.537554 tx_first_pass[0][0][11] = 0
4816 16:34:12.540638 tx_last_pass[0][0][11] = 0
4817 16:34:12.544073 tx_win_center[0][0][12] = 0
4818 16:34:12.547440 tx_first_pass[0][0][12] = 0
4819 16:34:12.547523 tx_last_pass[0][0][12] = 0
4820 16:34:12.550357 tx_win_center[0][0][13] = 0
4821 16:34:12.553755 tx_first_pass[0][0][13] = 0
4822 16:34:12.557128 tx_last_pass[0][0][13] = 0
4823 16:34:12.557237 tx_win_center[0][0][14] = 0
4824 16:34:12.560462 tx_first_pass[0][0][14] = 0
4825 16:34:12.563832 tx_last_pass[0][0][14] = 0
4826 16:34:12.567012 tx_win_center[0][0][15] = 0
4827 16:34:12.567132 tx_first_pass[0][0][15] = 0
4828 16:34:12.570075 tx_last_pass[0][0][15] = 0
4829 16:34:12.573269 tx_win_center[0][1][0] = 0
4830 16:34:12.576797 tx_first_pass[0][1][0] = 0
4831 16:34:12.576914 tx_last_pass[0][1][0] = 0
4832 16:34:12.579956 tx_win_center[0][1][1] = 0
4833 16:34:12.583351 tx_first_pass[0][1][1] = 0
4834 16:34:12.586628 tx_last_pass[0][1][1] = 0
4835 16:34:12.586710 tx_win_center[0][1][2] = 0
4836 16:34:12.589963 tx_first_pass[0][1][2] = 0
4837 16:34:12.593297 tx_last_pass[0][1][2] = 0
4838 16:34:12.593406 tx_win_center[0][1][3] = 0
4839 16:34:12.596329 tx_first_pass[0][1][3] = 0
4840 16:34:12.599701 tx_last_pass[0][1][3] = 0
4841 16:34:12.603003 tx_win_center[0][1][4] = 0
4842 16:34:12.603085 tx_first_pass[0][1][4] = 0
4843 16:34:12.606297 tx_last_pass[0][1][4] = 0
4844 16:34:12.609614 tx_win_center[0][1][5] = 0
4845 16:34:12.612814 tx_first_pass[0][1][5] = 0
4846 16:34:12.612965 tx_last_pass[0][1][5] = 0
4847 16:34:12.616146 tx_win_center[0][1][6] = 0
4848 16:34:12.619305 tx_first_pass[0][1][6] = 0
4849 16:34:12.622826 tx_last_pass[0][1][6] = 0
4850 16:34:12.622982 tx_win_center[0][1][7] = 0
4851 16:34:12.625958 tx_first_pass[0][1][7] = 0
4852 16:34:12.629144 tx_last_pass[0][1][7] = 0
4853 16:34:12.634369 tx_win_center[0][1][8] = 0
4854 16:34:12.634575 tx_first_pass[0][1][8] = 0
4855 16:34:12.635488 tx_last_pass[0][1][8] = 0
4856 16:34:12.639188 tx_win_center[0][1][9] = 0
4857 16:34:12.642191 tx_first_pass[0][1][9] = 0
4858 16:34:12.642339 tx_last_pass[0][1][9] = 0
4859 16:34:12.645599 tx_win_center[0][1][10] = 0
4860 16:34:12.648675 tx_first_pass[0][1][10] = 0
4861 16:34:12.652272 tx_last_pass[0][1][10] = 0
4862 16:34:12.652457 tx_win_center[0][1][11] = 0
4863 16:34:12.655250 tx_first_pass[0][1][11] = 0
4864 16:34:12.658480 tx_last_pass[0][1][11] = 0
4865 16:34:12.661742 tx_win_center[0][1][12] = 0
4866 16:34:12.661895 tx_first_pass[0][1][12] = 0
4867 16:34:12.665022 tx_last_pass[0][1][12] = 0
4868 16:34:12.668702 tx_win_center[0][1][13] = 0
4869 16:34:12.671535 tx_first_pass[0][1][13] = 0
4870 16:34:12.671657 tx_last_pass[0][1][13] = 0
4871 16:34:12.675083 tx_win_center[0][1][14] = 0
4872 16:34:12.678275 tx_first_pass[0][1][14] = 0
4873 16:34:12.681521 tx_last_pass[0][1][14] = 0
4874 16:34:12.681633 tx_win_center[0][1][15] = 0
4875 16:34:12.684756 tx_first_pass[0][1][15] = 0
4876 16:34:12.688327 tx_last_pass[0][1][15] = 0
4877 16:34:12.691268 tx_win_center[1][0][0] = 0
4878 16:34:12.691373 tx_first_pass[1][0][0] = 0
4879 16:34:12.694655 tx_last_pass[1][0][0] = 0
4880 16:34:12.697984 tx_win_center[1][0][1] = 0
4881 16:34:12.701198 tx_first_pass[1][0][1] = 0
4882 16:34:12.701365 tx_last_pass[1][0][1] = 0
4883 16:34:12.704452 tx_win_center[1][0][2] = 0
4884 16:34:12.707794 tx_first_pass[1][0][2] = 0
4885 16:34:12.711146 tx_last_pass[1][0][2] = 0
4886 16:34:12.711312 tx_win_center[1][0][3] = 0
4887 16:34:12.714380 tx_first_pass[1][0][3] = 0
4888 16:34:12.717592 tx_last_pass[1][0][3] = 0
4889 16:34:12.720926 tx_win_center[1][0][4] = 0
4890 16:34:12.721125 tx_first_pass[1][0][4] = 0
4891 16:34:12.723971 tx_last_pass[1][0][4] = 0
4892 16:34:12.727559 tx_win_center[1][0][5] = 0
4893 16:34:12.730918 tx_first_pass[1][0][5] = 0
4894 16:34:12.731245 tx_last_pass[1][0][5] = 0
4895 16:34:12.733942 tx_win_center[1][0][6] = 0
4896 16:34:12.737255 tx_first_pass[1][0][6] = 0
4897 16:34:12.737576 tx_last_pass[1][0][6] = 0
4898 16:34:12.740521 tx_win_center[1][0][7] = 0
4899 16:34:12.743806 tx_first_pass[1][0][7] = 0
4900 16:34:12.747326 tx_last_pass[1][0][7] = 0
4901 16:34:12.747580 tx_win_center[1][0][8] = 0
4902 16:34:12.750460 tx_first_pass[1][0][8] = 0
4903 16:34:12.753737 tx_last_pass[1][0][8] = 0
4904 16:34:12.757109 tx_win_center[1][0][9] = 0
4905 16:34:12.757286 tx_first_pass[1][0][9] = 0
4906 16:34:12.760033 tx_last_pass[1][0][9] = 0
4907 16:34:12.763298 tx_win_center[1][0][10] = 0
4908 16:34:12.766734 tx_first_pass[1][0][10] = 0
4909 16:34:12.766908 tx_last_pass[1][0][10] = 0
4910 16:34:12.770032 tx_win_center[1][0][11] = 0
4911 16:34:12.773220 tx_first_pass[1][0][11] = 0
4912 16:34:12.776456 tx_last_pass[1][0][11] = 0
4913 16:34:12.776598 tx_win_center[1][0][12] = 0
4914 16:34:12.779706 tx_first_pass[1][0][12] = 0
4915 16:34:12.783131 tx_last_pass[1][0][12] = 0
4916 16:34:12.786491 tx_win_center[1][0][13] = 0
4917 16:34:12.786636 tx_first_pass[1][0][13] = 0
4918 16:34:12.789665 tx_last_pass[1][0][13] = 0
4919 16:34:12.792880 tx_win_center[1][0][14] = 0
4920 16:34:12.796081 tx_first_pass[1][0][14] = 0
4921 16:34:12.799219 tx_last_pass[1][0][14] = 0
4922 16:34:12.799323 tx_win_center[1][0][15] = 0
4923 16:34:12.802590 tx_first_pass[1][0][15] = 0
4924 16:34:12.805900 tx_last_pass[1][0][15] = 0
4925 16:34:12.809359 tx_win_center[1][1][0] = 0
4926 16:34:12.809513 tx_first_pass[1][1][0] = 0
4927 16:34:12.812645 tx_last_pass[1][1][0] = 0
4928 16:34:12.815832 tx_win_center[1][1][1] = 0
4929 16:34:12.819130 tx_first_pass[1][1][1] = 0
4930 16:34:12.819272 tx_last_pass[1][1][1] = 0
4931 16:34:12.822263 tx_win_center[1][1][2] = 0
4932 16:34:12.825543 tx_first_pass[1][1][2] = 0
4933 16:34:12.825680 tx_last_pass[1][1][2] = 0
4934 16:34:12.828827 tx_win_center[1][1][3] = 0
4935 16:34:12.832082 tx_first_pass[1][1][3] = 0
4936 16:34:12.835309 tx_last_pass[1][1][3] = 0
4937 16:34:12.835450 tx_win_center[1][1][4] = 0
4938 16:34:12.838860 tx_first_pass[1][1][4] = 0
4939 16:34:12.842025 tx_last_pass[1][1][4] = 0
4940 16:34:12.845090 tx_win_center[1][1][5] = 0
4941 16:34:12.845241 tx_first_pass[1][1][5] = 0
4942 16:34:12.848628 tx_last_pass[1][1][5] = 0
4943 16:34:12.851628 tx_win_center[1][1][6] = 0
4944 16:34:12.854827 tx_first_pass[1][1][6] = 0
4945 16:34:12.854978 tx_last_pass[1][1][6] = 0
4946 16:34:12.858277 tx_win_center[1][1][7] = 0
4947 16:34:12.861464 tx_first_pass[1][1][7] = 0
4948 16:34:12.861607 tx_last_pass[1][1][7] = 0
4949 16:34:12.864681 tx_win_center[1][1][8] = 0
4950 16:34:12.868069 tx_first_pass[1][1][8] = 0
4951 16:34:12.871393 tx_last_pass[1][1][8] = 0
4952 16:34:12.871543 tx_win_center[1][1][9] = 0
4953 16:34:12.874802 tx_first_pass[1][1][9] = 0
4954 16:34:12.878084 tx_last_pass[1][1][9] = 0
4955 16:34:12.881403 tx_win_center[1][1][10] = 0
4956 16:34:12.881563 tx_first_pass[1][1][10] = 0
4957 16:34:12.884713 tx_last_pass[1][1][10] = 0
4958 16:34:12.887861 tx_win_center[1][1][11] = 0
4959 16:34:12.890949 tx_first_pass[1][1][11] = 0
4960 16:34:12.891110 tx_last_pass[1][1][11] = 0
4961 16:34:12.894136 tx_win_center[1][1][12] = 0
4962 16:34:12.897454 tx_first_pass[1][1][12] = 0
4963 16:34:12.900751 tx_last_pass[1][1][12] = 0
4964 16:34:12.904091 tx_win_center[1][1][13] = 0
4965 16:34:12.904232 tx_first_pass[1][1][13] = 0
4966 16:34:12.907283 tx_last_pass[1][1][13] = 0
4967 16:34:12.910885 tx_win_center[1][1][14] = 0
4968 16:34:12.913928 tx_first_pass[1][1][14] = 0
4969 16:34:12.914033 tx_last_pass[1][1][14] = 0
4970 16:34:12.917333 tx_win_center[1][1][15] = 0
4971 16:34:12.920654 tx_first_pass[1][1][15] = 0
4972 16:34:12.923800 tx_last_pass[1][1][15] = 0
4973 16:34:12.923886 dump params rx window
4974 16:34:12.927062 rx_firspass[0][0][0] = 0
4975 16:34:12.930040 rx_lastpass[0][0][0] = 0
4976 16:34:12.930124 rx_firspass[0][0][1] = 0
4977 16:34:12.933459 rx_lastpass[0][0][1] = 0
4978 16:34:12.936797 rx_firspass[0][0][2] = 0
4979 16:34:12.936882 rx_lastpass[0][0][2] = 0
4980 16:34:12.940046 rx_firspass[0][0][3] = 0
4981 16:34:12.943382 rx_lastpass[0][0][3] = 0
4982 16:34:12.946581 rx_firspass[0][0][4] = 0
4983 16:34:12.946665 rx_lastpass[0][0][4] = 0
4984 16:34:12.949947 rx_firspass[0][0][5] = 0
4985 16:34:12.953190 rx_lastpass[0][0][5] = 0
4986 16:34:12.953275 rx_firspass[0][0][6] = 0
4987 16:34:12.956363 rx_lastpass[0][0][6] = 0
4988 16:34:12.959462 rx_firspass[0][0][7] = 0
4989 16:34:12.959544 rx_lastpass[0][0][7] = 0
4990 16:34:12.963036 rx_firspass[0][0][8] = 0
4991 16:34:12.966115 rx_lastpass[0][0][8] = 0
4992 16:34:12.969358 rx_firspass[0][0][9] = 0
4993 16:34:12.969479 rx_lastpass[0][0][9] = 0
4994 16:34:12.972810 rx_firspass[0][0][10] = 0
4995 16:34:12.976082 rx_lastpass[0][0][10] = 0
4996 16:34:12.976195 rx_firspass[0][0][11] = 0
4997 16:34:12.979301 rx_lastpass[0][0][11] = 0
4998 16:34:12.982664 rx_firspass[0][0][12] = 0
4999 16:34:12.985841 rx_lastpass[0][0][12] = 0
5000 16:34:12.985951 rx_firspass[0][0][13] = 0
5001 16:34:12.989024 rx_lastpass[0][0][13] = 0
5002 16:34:12.992138 rx_firspass[0][0][14] = 0
5003 16:34:12.995603 rx_lastpass[0][0][14] = 0
5004 16:34:12.995694 rx_firspass[0][0][15] = 0
5005 16:34:12.998838 rx_lastpass[0][0][15] = 0
5006 16:34:13.002124 rx_firspass[0][1][0] = 0
5007 16:34:13.002209 rx_lastpass[0][1][0] = 0
5008 16:34:13.005371 rx_firspass[0][1][1] = 0
5009 16:34:13.008688 rx_lastpass[0][1][1] = 0
5010 16:34:13.008773 rx_firspass[0][1][2] = 0
5011 16:34:13.011863 rx_lastpass[0][1][2] = 0
5012 16:34:13.015089 rx_firspass[0][1][3] = 0
5013 16:34:13.018681 rx_lastpass[0][1][3] = 0
5014 16:34:13.018775 rx_firspass[0][1][4] = 0
5015 16:34:13.021595 rx_lastpass[0][1][4] = 0
5016 16:34:13.025078 rx_firspass[0][1][5] = 0
5017 16:34:13.025170 rx_lastpass[0][1][5] = 0
5018 16:34:13.028226 rx_firspass[0][1][6] = 0
5019 16:34:13.031390 rx_lastpass[0][1][6] = 0
5020 16:34:13.031484 rx_firspass[0][1][7] = 0
5021 16:34:13.034604 rx_lastpass[0][1][7] = 0
5022 16:34:13.038004 rx_firspass[0][1][8] = 0
5023 16:34:13.041329 rx_lastpass[0][1][8] = 0
5024 16:34:13.041465 rx_firspass[0][1][9] = 0
5025 16:34:13.044596 rx_lastpass[0][1][9] = 0
5026 16:34:13.047920 rx_firspass[0][1][10] = 0
5027 16:34:13.048005 rx_lastpass[0][1][10] = 0
5028 16:34:13.051180 rx_firspass[0][1][11] = 0
5029 16:34:13.054339 rx_lastpass[0][1][11] = 0
5030 16:34:13.057847 rx_firspass[0][1][12] = 0
5031 16:34:13.057939 rx_lastpass[0][1][12] = 0
5032 16:34:13.060782 rx_firspass[0][1][13] = 0
5033 16:34:13.064457 rx_lastpass[0][1][13] = 0
5034 16:34:13.064548 rx_firspass[0][1][14] = 0
5035 16:34:13.067644 rx_lastpass[0][1][14] = 0
5036 16:34:13.070851 rx_firspass[0][1][15] = 0
5037 16:34:13.074084 rx_lastpass[0][1][15] = 0
5038 16:34:13.074174 rx_firspass[1][0][0] = 0
5039 16:34:13.077195 rx_lastpass[1][0][0] = 0
5040 16:34:13.080661 rx_firspass[1][0][1] = 0
5041 16:34:13.080751 rx_lastpass[1][0][1] = 0
5042 16:34:13.083854 rx_firspass[1][0][2] = 0
5043 16:34:13.087372 rx_lastpass[1][0][2] = 0
5044 16:34:13.087470 rx_firspass[1][0][3] = 0
5045 16:34:13.090390 rx_lastpass[1][0][3] = 0
5046 16:34:13.093688 rx_firspass[1][0][4] = 0
5047 16:34:13.096869 rx_lastpass[1][0][4] = 0
5048 16:34:13.096985 rx_firspass[1][0][5] = 0
5049 16:34:13.100356 rx_lastpass[1][0][5] = 0
5050 16:34:13.103631 rx_firspass[1][0][6] = 0
5051 16:34:13.103721 rx_lastpass[1][0][6] = 0
5052 16:34:13.106945 rx_firspass[1][0][7] = 0
5053 16:34:13.110222 rx_lastpass[1][0][7] = 0
5054 16:34:13.110345 rx_firspass[1][0][8] = 0
5055 16:34:13.113501 rx_lastpass[1][0][8] = 0
5056 16:34:13.116507 rx_firspass[1][0][9] = 0
5057 16:34:13.119894 rx_lastpass[1][0][9] = 0
5058 16:34:13.120009 rx_firspass[1][0][10] = 0
5059 16:34:13.123288 rx_lastpass[1][0][10] = 0
5060 16:34:13.126664 rx_firspass[1][0][11] = 0
5061 16:34:13.126754 rx_lastpass[1][0][11] = 0
5062 16:34:13.129628 rx_firspass[1][0][12] = 0
5063 16:34:13.132902 rx_lastpass[1][0][12] = 0
5064 16:34:13.136164 rx_firspass[1][0][13] = 0
5065 16:34:13.136312 rx_lastpass[1][0][13] = 0
5066 16:34:13.139538 rx_firspass[1][0][14] = 0
5067 16:34:13.142853 rx_lastpass[1][0][14] = 0
5068 16:34:13.146168 rx_firspass[1][0][15] = 0
5069 16:34:13.146264 rx_lastpass[1][0][15] = 0
5070 16:34:13.149143 rx_firspass[1][1][0] = 0
5071 16:34:13.152476 rx_lastpass[1][1][0] = 0
5072 16:34:13.152563 rx_firspass[1][1][1] = 0
5073 16:34:13.155875 rx_lastpass[1][1][1] = 0
5074 16:34:13.159121 rx_firspass[1][1][2] = 0
5075 16:34:13.159214 rx_lastpass[1][1][2] = 0
5076 16:34:13.162409 rx_firspass[1][1][3] = 0
5077 16:34:13.165652 rx_lastpass[1][1][3] = 0
5078 16:34:13.168960 rx_firspass[1][1][4] = 0
5079 16:34:13.169044 rx_lastpass[1][1][4] = 0
5080 16:34:13.172097 rx_firspass[1][1][5] = 0
5081 16:34:13.175420 rx_lastpass[1][1][5] = 0
5082 16:34:13.175544 rx_firspass[1][1][6] = 0
5083 16:34:13.178733 rx_lastpass[1][1][6] = 0
5084 16:34:13.181951 rx_firspass[1][1][7] = 0
5085 16:34:13.182037 rx_lastpass[1][1][7] = 0
5086 16:34:13.185299 rx_firspass[1][1][8] = 0
5087 16:34:13.188860 rx_lastpass[1][1][8] = 0
5088 16:34:13.188946 rx_firspass[1][1][9] = 0
5089 16:34:13.192061 rx_lastpass[1][1][9] = 0
5090 16:34:13.195150 rx_firspass[1][1][10] = 0
5091 16:34:13.198646 rx_lastpass[1][1][10] = 0
5092 16:34:13.198734 rx_firspass[1][1][11] = 0
5093 16:34:13.201854 rx_lastpass[1][1][11] = 0
5094 16:34:13.205028 rx_firspass[1][1][12] = 0
5095 16:34:13.208392 rx_lastpass[1][1][12] = 0
5096 16:34:13.208491 rx_firspass[1][1][13] = 0
5097 16:34:13.211658 rx_lastpass[1][1][13] = 0
5098 16:34:13.215021 rx_firspass[1][1][14] = 0
5099 16:34:13.215130 rx_lastpass[1][1][14] = 0
5100 16:34:13.218255 rx_firspass[1][1][15] = 0
5101 16:34:13.221301 rx_lastpass[1][1][15] = 0
5102 16:34:13.221413 dump params clk_delay
5103 16:34:13.224692 clk_delay[0] = 0
5104 16:34:13.224783 clk_delay[1] = 0
5105 16:34:13.227987 dump params dqs_delay
5106 16:34:13.231180 dqs_delay[0][0] = 0
5107 16:34:13.231294 dqs_delay[0][1] = 0
5108 16:34:13.234492 dqs_delay[1][0] = 0
5109 16:34:13.234575 dqs_delay[1][1] = 0
5110 16:34:13.237774 dump params delay_cell_unit = 744
5111 16:34:13.241035 mt_set_emi_preloader end
5112 16:34:13.244625 [mt_mem_init] dram size: 0x100000000, rank number: 2
5113 16:34:13.251103 [complex_mem_test] start addr:0x40000000, len:20480
5114 16:34:13.286647 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5115 16:34:13.293088 [complex_mem_test] start addr:0x80000000, len:20480
5116 16:34:13.328788 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5117 16:34:13.335023 [complex_mem_test] start addr:0xc0000000, len:20480
5118 16:34:13.371128 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5119 16:34:13.377620 [complex_mem_test] start addr:0x56000000, len:8192
5120 16:34:13.394210 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5121 16:34:13.397760 ddr_geometry:1
5122 16:34:13.400933 [complex_mem_test] start addr:0x80000000, len:8192
5123 16:34:13.418024 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5124 16:34:13.421266 dram_init: dram init end (result: 0)
5125 16:34:13.427910 Successfully loaded DRAM blobs and ran DRAM calibration
5126 16:34:13.437783 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5127 16:34:13.437880 CBMEM:
5128 16:34:13.441091 IMD: root @ 00000000fffff000 254 entries.
5129 16:34:13.444300 IMD: root @ 00000000ffffec00 62 entries.
5130 16:34:13.450838 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5131 16:34:13.457659 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5132 16:34:13.460808 in-header: 03 a1 00 00 08 00 00 00
5133 16:34:13.464174 in-data: 84 60 60 10 00 00 00 00
5134 16:34:13.467464 Chrome EC: clear events_b mask to 0x0000000020004000
5135 16:34:13.473682 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5136 16:34:13.477826 in-header: 03 fd 00 00 00 00 00 00
5137 16:34:13.480939 in-data:
5138 16:34:13.484327 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5139 16:34:13.487675 CBFS @ 21000 size 3d4000
5140 16:34:13.490758 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5141 16:34:13.494176 CBFS: Locating 'fallback/ramstage'
5142 16:34:13.497192 CBFS: Found @ offset 10d40 size d563
5143 16:34:13.519904 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5144 16:34:13.532202 Accumulated console time in romstage 13508 ms
5145 16:34:13.532302
5146 16:34:13.532374
5147 16:34:13.541828 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5148 16:34:13.545083 ARM64: Exception handlers installed.
5149 16:34:13.545190 ARM64: Testing exception
5150 16:34:13.548652 ARM64: Done test exception
5151 16:34:13.551671 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5152 16:34:13.555008 Manufacturer: ef
5153 16:34:13.561359 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5154 16:34:13.564743 WARNING: RO_VPD is uninitialized or empty.
5155 16:34:13.567894 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5156 16:34:13.571139 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5157 16:34:13.581720 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5158 16:34:13.584922 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5159 16:34:13.591787 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5160 16:34:13.591893 Enumerating buses...
5161 16:34:13.598252 Show all devs... Before device enumeration.
5162 16:34:13.598354 Root Device: enabled 1
5163 16:34:13.601452 CPU_CLUSTER: 0: enabled 1
5164 16:34:13.604755 CPU: 00: enabled 1
5165 16:34:13.604850 Compare with tree...
5166 16:34:13.607903 Root Device: enabled 1
5167 16:34:13.607994 CPU_CLUSTER: 0: enabled 1
5168 16:34:13.611272 CPU: 00: enabled 1
5169 16:34:13.614441 Root Device scanning...
5170 16:34:13.617627 root_dev_scan_bus for Root Device
5171 16:34:13.617719 CPU_CLUSTER: 0 enabled
5172 16:34:13.621026 root_dev_scan_bus for Root Device done
5173 16:34:13.627723 scan_bus: scanning of bus Root Device took 10689 usecs
5174 16:34:13.627819 done
5175 16:34:13.630982 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5176 16:34:13.634309 Allocating resources...
5177 16:34:13.637702 Reading resources...
5178 16:34:13.640646 Root Device read_resources bus 0 link: 0
5179 16:34:13.643898 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5180 16:34:13.647278 CPU: 00 missing read_resources
5181 16:34:13.650447 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5182 16:34:13.653827 Root Device read_resources bus 0 link: 0 done
5183 16:34:13.657107 Done reading resources.
5184 16:34:13.660612 Show resources in subtree (Root Device)...After reading.
5185 16:34:13.667083 Root Device child on link 0 CPU_CLUSTER: 0
5186 16:34:13.670017 CPU_CLUSTER: 0 child on link 0 CPU: 00
5187 16:34:13.676742 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5188 16:34:13.679942 CPU: 00
5189 16:34:13.680033 Setting resources...
5190 16:34:13.686447 Root Device assign_resources, bus 0 link: 0
5191 16:34:13.690039 CPU_CLUSTER: 0 missing set_resources
5192 16:34:13.693233 Root Device assign_resources, bus 0 link: 0
5193 16:34:13.693353 Done setting resources.
5194 16:34:13.699779 Show resources in subtree (Root Device)...After assigning values.
5195 16:34:13.703044 Root Device child on link 0 CPU_CLUSTER: 0
5196 16:34:13.706290 CPU_CLUSTER: 0 child on link 0 CPU: 00
5197 16:34:13.716118 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5198 16:34:13.716215 CPU: 00
5199 16:34:13.719508 Done allocating resources.
5200 16:34:13.725995 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5201 16:34:13.726088 Enabling resources...
5202 16:34:13.726160 done.
5203 16:34:13.732332 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5204 16:34:13.732423 Initializing devices...
5205 16:34:13.735910 Root Device init ...
5206 16:34:13.738977 mainboard_init: Starting display init.
5207 16:34:13.742036 ADC[4]: Raw value=76192 ID=0
5208 16:34:13.764410 anx7625_power_on_init: Init interface.
5209 16:34:13.767759 anx7625_disable_pd_protocol: Disabled PD feature.
5210 16:34:13.774099 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5211 16:34:13.831775 anx7625_start_dp_work: Secure OCM version=00
5212 16:34:13.834704 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5213 16:34:13.851984 sp_tx_get_edid_block: EDID Block = 1
5214 16:34:13.969108 Extracted contents:
5215 16:34:13.972657 header: 00 ff ff ff ff ff ff 00
5216 16:34:13.975655 serial number: 06 af 5c 14 00 00 00 00 00 1a
5217 16:34:13.979053 version: 01 04
5218 16:34:13.982161 basic params: 95 1a 0e 78 02
5219 16:34:13.985790 chroma info: 99 85 95 55 56 92 28 22 50 54
5220 16:34:13.988972 established: 00 00 00
5221 16:34:13.995381 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5222 16:34:14.001877 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5223 16:34:14.005148 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5224 16:34:14.011933 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5225 16:34:14.018302 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5226 16:34:14.021650 extensions: 00
5227 16:34:14.021745 checksum: ae
5228 16:34:14.021818
5229 16:34:14.028027 Manufacturer: AUO Model 145c Serial Number 0
5230 16:34:14.028120 Made week 0 of 2016
5231 16:34:14.031513 EDID version: 1.4
5232 16:34:14.031605 Digital display
5233 16:34:14.034835 6 bits per primary color channel
5234 16:34:14.038081 DisplayPort interface
5235 16:34:14.041426 Maximum image size: 26 cm x 14 cm
5236 16:34:14.041528 Gamma: 220%
5237 16:34:14.041602 Check DPMS levels
5238 16:34:14.044763 Supported color formats: RGB 4:4:4
5239 16:34:14.047784 First detailed timing is preferred timing
5240 16:34:14.051209 Established timings supported:
5241 16:34:14.054554 Standard timings supported:
5242 16:34:14.057863 Detailed timings
5243 16:34:14.060805 Hex of detail: ce1d56ea50001a3030204600009010000018
5244 16:34:14.064159 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5245 16:34:14.070950 0556 0586 05a6 0640 hborder 0
5246 16:34:14.074111 0300 0304 030a 031a vborder 0
5247 16:34:14.077412 -hsync -vsync
5248 16:34:14.077514 Did detailed timing
5249 16:34:14.084094 Hex of detail: 0000000f0000000000000000000000000020
5250 16:34:14.086993 Manufacturer-specified data, tag 15
5251 16:34:14.090586 Hex of detail: 000000fe0041554f0a202020202020202020
5252 16:34:14.093782 ASCII string: AUO
5253 16:34:14.096975 Hex of detail: 000000fe004231313658414230312e34200a
5254 16:34:14.100206 ASCII string: B116XAB01.4
5255 16:34:14.100302 Checksum
5256 16:34:14.103460 Checksum: 0xae (valid)
5257 16:34:14.106874 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5258 16:34:14.110156 DSI data_rate: 457800000 bps
5259 16:34:14.116615 anx7625_parse_edid: set default k value to 0x3d for panel
5260 16:34:14.119813 anx7625_parse_edid: pixelclock(76300).
5261 16:34:14.123079 hactive(1366), hsync(32), hfp(48), hbp(154)
5262 16:34:14.126466 vactive(768), vsync(6), vfp(4), vbp(16)
5263 16:34:14.129700 anx7625_dsi_config: config dsi.
5264 16:34:14.137653 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5265 16:34:14.158520 anx7625_dsi_config: success to config DSI
5266 16:34:14.161365 anx7625_dp_start: MIPI phy setup OK.
5267 16:34:14.164704 [SSUSB] Setting up USB HOST controller...
5268 16:34:14.168061 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5269 16:34:14.171386 [SSUSB] phy power-on done.
5270 16:34:14.174912 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5271 16:34:14.178478 in-header: 03 fc 01 00 00 00 00 00
5272 16:34:14.178574 in-data:
5273 16:34:14.184692 handle_proto3_response: EC response with error code: 1
5274 16:34:14.184787 SPM: pcm index = 1
5275 16:34:14.191422 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5276 16:34:14.191521 CBFS @ 21000 size 3d4000
5277 16:34:14.197839 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5278 16:34:14.201056 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5279 16:34:14.204253 CBFS: Found @ offset 1e7c0 size 1026
5280 16:34:14.211230 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5281 16:34:14.214386 SPM: binary array size = 2988
5282 16:34:14.218226 SPM: version = pcm_allinone_v1.17.2_20180829
5283 16:34:14.220830 SPM binary loaded in 32 msecs
5284 16:34:14.229448 spm_kick_im_to_fetch: ptr = 000000004021eec2
5285 16:34:14.232657 spm_kick_im_to_fetch: len = 2988
5286 16:34:14.232753 SPM: spm_kick_pcm_to_run
5287 16:34:14.236295 SPM: spm_kick_pcm_to_run done
5288 16:34:14.239545 SPM: spm_init done in 52 msecs
5289 16:34:14.242517 Root Device init finished in 505263 usecs
5290 16:34:14.246015 CPU_CLUSTER: 0 init ...
5291 16:34:14.255629 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5292 16:34:14.258873 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5293 16:34:14.262261 CBFS @ 21000 size 3d4000
5294 16:34:14.265458 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5295 16:34:14.268851 CBFS: Locating 'sspm.bin'
5296 16:34:14.272011 CBFS: Found @ offset 208c0 size 41cb
5297 16:34:14.282769 read SPI 0x418f8 0x41cb: 5141 us, 3276 KB/s, 26.208 Mbps
5298 16:34:14.290466 CPU_CLUSTER: 0 init finished in 42804 usecs
5299 16:34:14.290566 Devices initialized
5300 16:34:14.293944 Show all devs... After init.
5301 16:34:14.297311 Root Device: enabled 1
5302 16:34:14.297403 CPU_CLUSTER: 0: enabled 1
5303 16:34:14.300434 CPU: 00: enabled 1
5304 16:34:14.303620 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5305 16:34:14.310398 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5306 16:34:14.313648 ELOG: NV offset 0x558000 size 0x1000
5307 16:34:14.316763 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5308 16:34:14.323453 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5309 16:34:14.330089 ELOG: Event(17) added with size 13 at 2024-06-17 16:34:14 UTC
5310 16:34:14.333137 out: cmd=0x121: 03 db 21 01 00 00 00 00
5311 16:34:14.336593 in-header: 03 cb 00 00 2c 00 00 00
5312 16:34:14.349649 in-data: d5 4a 00 00 00 00 00 00 02 10 00 00 06 80 00 00 59 85 07 00 06 80 00 00 fd eb 0f 00 06 80 00 00 84 fa 00 00 06 80 00 00 21 40 02 00
5313 16:34:14.352692 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5314 16:34:14.356038 in-header: 03 19 00 00 08 00 00 00
5315 16:34:14.359318 in-data: a2 e0 47 00 13 00 00 00
5316 16:34:14.362675 Chrome EC: UHEPI supported
5317 16:34:14.369219 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5318 16:34:14.372499 in-header: 03 e1 00 00 08 00 00 00
5319 16:34:14.375761 in-data: 84 20 60 10 00 00 00 00
5320 16:34:14.379058 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5321 16:34:14.385363 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5322 16:34:14.388691 in-header: 03 e1 00 00 08 00 00 00
5323 16:34:14.391961 in-data: 84 20 60 10 00 00 00 00
5324 16:34:14.398498 ELOG: Event(A1) added with size 10 at 2024-06-17 16:34:14 UTC
5325 16:34:14.405077 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5326 16:34:14.408312 ELOG: Event(A0) added with size 9 at 2024-06-17 16:34:14 UTC
5327 16:34:14.411498 elog_add_boot_reason: Logged dev mode boot
5328 16:34:14.414957 Finalize devices...
5329 16:34:14.418183 Devices finalized
5330 16:34:14.421379 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5331 16:34:14.424636 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5332 16:34:14.431258 ELOG: Event(91) added with size 10 at 2024-06-17 16:34:14 UTC
5333 16:34:14.434406 Writing coreboot table at 0xffeda000
5334 16:34:14.437761 0. 0000000000114000-000000000011efff: RAMSTAGE
5335 16:34:14.444214 1. 0000000040000000-000000004023cfff: RAMSTAGE
5336 16:34:14.447461 2. 000000004023d000-00000000545fffff: RAM
5337 16:34:14.450668 3. 0000000054600000-000000005465ffff: BL31
5338 16:34:14.454188 4. 0000000054660000-00000000ffed9fff: RAM
5339 16:34:14.460432 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5340 16:34:14.463838 6. 0000000100000000-000000013fffffff: RAM
5341 16:34:14.466974 Passing 5 GPIOs to payload:
5342 16:34:14.470269 NAME | PORT | POLARITY | VALUE
5343 16:34:14.477034 write protect | 0x00000096 | low | high
5344 16:34:14.480185 EC in RW | 0x000000b1 | high | undefined
5345 16:34:14.483656 EC interrupt | 0x00000097 | low | undefined
5346 16:34:14.489924 TPM interrupt | 0x00000099 | high | undefined
5347 16:34:14.493214 speaker enable | 0x000000af | high | undefined
5348 16:34:14.496467 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5349 16:34:14.499762 in-header: 03 f7 00 00 02 00 00 00
5350 16:34:14.503133 in-data: 04 00
5351 16:34:14.503252 Board ID: 4
5352 16:34:14.506479 ADC[3]: Raw value=215404 ID=1
5353 16:34:14.506570 RAM code: 1
5354 16:34:14.509661 SKU ID: 16
5355 16:34:14.512946 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5356 16:34:14.516175 CBFS @ 21000 size 3d4000
5357 16:34:14.519596 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5358 16:34:14.525903 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum a0fc
5359 16:34:14.529367 coreboot table: 940 bytes.
5360 16:34:14.532487 IMD ROOT 0. 00000000fffff000 00001000
5361 16:34:14.535850 IMD SMALL 1. 00000000ffffe000 00001000
5362 16:34:14.538938 CONSOLE 2. 00000000fffde000 00020000
5363 16:34:14.542310 FMAP 3. 00000000fffdd000 0000047c
5364 16:34:14.548820 TIME STAMP 4. 00000000fffdc000 00000910
5365 16:34:14.552077 RAMOOPS 5. 00000000ffedc000 00100000
5366 16:34:14.555378 COREBOOT 6. 00000000ffeda000 00002000
5367 16:34:14.555475 IMD small region:
5368 16:34:14.558667 IMD ROOT 0. 00000000ffffec00 00000400
5369 16:34:14.565062 VBOOT WORK 1. 00000000ffffeb00 00000100
5370 16:34:14.568415 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5371 16:34:14.571637 VPD 3. 00000000ffffea60 0000006c
5372 16:34:14.575007 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5373 16:34:14.581623 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5374 16:34:14.584998 in-header: 03 e1 00 00 08 00 00 00
5375 16:34:14.588087 in-data: 84 20 60 10 00 00 00 00
5376 16:34:14.594621 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5377 16:34:14.594724 CBFS @ 21000 size 3d4000
5378 16:34:14.601112 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5379 16:34:14.604367 CBFS: Locating 'fallback/payload'
5380 16:34:14.612242 CBFS: Found @ offset dc040 size 439a0
5381 16:34:14.700165 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5382 16:34:14.703338 Checking segment from ROM address 0x0000000040003a00
5383 16:34:14.709874 Checking segment from ROM address 0x0000000040003a1c
5384 16:34:14.713094 Loading segment from ROM address 0x0000000040003a00
5385 16:34:14.716433 code (compression=0)
5386 16:34:14.726387 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5387 16:34:14.732984 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5388 16:34:14.735975 it's not compressed!
5389 16:34:14.739249 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5390 16:34:14.745926 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5391 16:34:14.754222 Loading segment from ROM address 0x0000000040003a1c
5392 16:34:14.757599 Entry Point 0x0000000080000000
5393 16:34:14.757735 Loaded segments
5394 16:34:14.764339 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5395 16:34:14.767631 Jumping to boot code at 0000000080000000(00000000ffeda000)
5396 16:34:14.777437 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5397 16:34:14.783772 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5398 16:34:14.783860 CBFS @ 21000 size 3d4000
5399 16:34:14.790262 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5400 16:34:14.793615 CBFS: Locating 'fallback/bl31'
5401 16:34:14.796725 CBFS: Found @ offset 36dc0 size 5820
5402 16:34:14.808192 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5403 16:34:14.811477 Checking segment from ROM address 0x0000000040003a00
5404 16:34:14.818147 Checking segment from ROM address 0x0000000040003a1c
5405 16:34:14.821260 Loading segment from ROM address 0x0000000040003a00
5406 16:34:14.824663 code (compression=1)
5407 16:34:14.834370 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5408 16:34:14.840824 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5409 16:34:14.840938 using LZMA
5410 16:34:14.850387 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5411 16:34:14.856768 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5412 16:34:14.859960 Loading segment from ROM address 0x0000000040003a1c
5413 16:34:14.863383 Entry Point 0x0000000054601000
5414 16:34:14.863477 Loaded segments
5415 16:34:14.866230 NOTICE: MT8183 bl31_setup
5416 16:34:14.873989 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5417 16:34:14.877191 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5418 16:34:14.880484 INFO: [DEVAPC] dump DEVAPC registers:
5419 16:34:14.890253 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5420 16:34:14.896818 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5421 16:34:14.906618 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5422 16:34:14.912819 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5423 16:34:14.922851 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5424 16:34:14.929265 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5425 16:34:14.938951 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5426 16:34:14.945665 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5427 16:34:14.955423 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5428 16:34:14.962139 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5429 16:34:14.971849 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5430 16:34:14.981669 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5431 16:34:14.988294 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5432 16:34:14.994484 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5433 16:34:15.001099 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5434 16:34:15.011029 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5435 16:34:15.017396 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5436 16:34:15.024033 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5437 16:34:15.030799 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5438 16:34:15.040432 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5439 16:34:15.046751 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5440 16:34:15.053604 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5441 16:34:15.056745 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5442 16:34:15.060045 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5443 16:34:15.063489 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5444 16:34:15.066577 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5445 16:34:15.070072 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5446 16:34:15.076769 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5447 16:34:15.083260 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5448 16:34:15.083369 WARNING: region 0:
5449 16:34:15.086378 WARNING: apc:0x168, sa:0x0, ea:0xfff
5450 16:34:15.089784 WARNING: region 1:
5451 16:34:15.092940 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5452 16:34:15.093050 WARNING: region 2:
5453 16:34:15.096217 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5454 16:34:15.099611 WARNING: region 3:
5455 16:34:15.102895 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5456 16:34:15.106214 WARNING: region 4:
5457 16:34:15.109058 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5458 16:34:15.109156 WARNING: region 5:
5459 16:34:15.112609 WARNING: apc:0x0, sa:0x0, ea:0x0
5460 16:34:15.115975 WARNING: region 6:
5461 16:34:15.118965 WARNING: apc:0x0, sa:0x0, ea:0x0
5462 16:34:15.119048 WARNING: region 7:
5463 16:34:15.122227 WARNING: apc:0x0, sa:0x0, ea:0x0
5464 16:34:15.128889 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5465 16:34:15.132065 INFO: SPM: enable SPMC mode
5466 16:34:15.135345 NOTICE: spm_boot_init() start
5467 16:34:15.138900 NOTICE: spm_boot_init() end
5468 16:34:15.142004 INFO: BL31: Initializing runtime services
5469 16:34:15.148557 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5470 16:34:15.152015 INFO: BL31: Preparing for EL3 exit to normal world
5471 16:34:15.155391 INFO: Entry point address = 0x80000000
5472 16:34:15.158417 INFO: SPSR = 0x8
5473 16:34:15.180639
5474 16:34:15.180737
5475 16:34:15.180819
5476 16:34:15.181294 end: 2.2.3 depthcharge-start (duration 00:00:11) [common]
5477 16:34:15.181413 start: 2.2.4 bootloader-commands (timeout 00:04:26) [common]
5478 16:34:15.181520 Setting prompt string to ['jacuzzi:']
5479 16:34:15.181610 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:26)
5480 16:34:15.183998 Starting depthcharge on Juniper...
5481 16:34:15.184083
5482 16:34:15.186934 vboot_handoff: creating legacy vboot_handoff structure
5483 16:34:15.187017
5484 16:34:15.190069 ec_init(0): CrosEC protocol v3 supported (544, 544)
5485 16:34:15.193634
5486 16:34:15.193728 Wipe memory regions:
5487 16:34:15.193800
5488 16:34:15.196833 [0x00000040000000, 0x00000054600000)
5489 16:34:15.239929
5490 16:34:15.240035 [0x00000054660000, 0x00000080000000)
5491 16:34:15.331152
5492 16:34:15.334016 [0x000000811994a0, 0x000000ffeda000)
5493 16:34:15.590420
5494 16:34:15.590572 [0x00000100000000, 0x00000140000000)
5495 16:34:15.722985
5496 16:34:15.726069 Initializing XHCI USB controller at 0x11200000.
5497 16:34:15.748969
5498 16:34:15.752141 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5499 16:34:15.752256
5500 16:34:15.752331
5501 16:34:15.752636 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5503 16:34:15.853002 jacuzzi: tftpboot 192.168.201.1 14396128/tftp-deploy-myoln7kc/kernel/image.itb 14396128/tftp-deploy-myoln7kc/kernel/cmdline
5504 16:34:15.853173 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5505 16:34:15.853309 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:25)
5506 16:34:15.857281 tftpboot 192.168.201.1 14396128/tftp-deploy-myoln7kc/kernel/image.tp-deploy-myoln7kc/kernel/cmdline
5507 16:34:15.857383
5508 16:34:15.857468 Waiting for link
5509 16:34:16.262887
5510 16:34:16.263031 R8152: Initializing
5511 16:34:16.263107
5512 16:34:16.266180 Version 9 (ocp_data = 6010)
5513 16:34:16.266272
5514 16:34:16.269407 R8152: Done initializing
5515 16:34:16.269514
5516 16:34:16.269601 Adding net device
5517 16:34:16.655050
5518 16:34:16.655195 done.
5519 16:34:16.655271
5520 16:34:16.655339 MAC: 00:e0:4c:78:85:cb
5521 16:34:16.655407
5522 16:34:16.658130 Sending DHCP discover... done.
5523 16:34:16.658222
5524 16:34:16.661720 Waiting for reply... done.
5525 16:34:16.661812
5526 16:34:16.664615 Sending DHCP request... done.
5527 16:34:16.664708
5528 16:34:16.669990 Waiting for reply... done.
5529 16:34:16.670113
5530 16:34:16.670216 My ip is 192.168.201.22
5531 16:34:16.670316
5532 16:34:16.673002 The DHCP server ip is 192.168.201.1
5533 16:34:16.673095
5534 16:34:16.679840 TFTP server IP predefined by user: 192.168.201.1
5535 16:34:16.679961
5536 16:34:16.686071 Bootfile predefined by user: 14396128/tftp-deploy-myoln7kc/kernel/image.itb
5537 16:34:16.686163
5538 16:34:16.689668 Sending tftp read request... done.
5539 16:34:16.689766
5540 16:34:16.693200 Waiting for the transfer...
5541 16:34:16.693292
5542 16:34:16.946530 00000000 ################################################################
5543 16:34:16.946678
5544 16:34:17.194744 00080000 ################################################################
5545 16:34:17.194916
5546 16:34:17.443314 00100000 ################################################################
5547 16:34:17.443462
5548 16:34:17.692693 00180000 ################################################################
5549 16:34:17.692830
5550 16:34:17.952680 00200000 ################################################################
5551 16:34:17.952835
5552 16:34:18.232583 00280000 ################################################################
5553 16:34:18.232727
5554 16:34:18.495775 00300000 ################################################################
5555 16:34:18.495959
5556 16:34:18.749326 00380000 ################################################################
5557 16:34:18.749515
5558 16:34:19.002605 00400000 ################################################################
5559 16:34:19.002808
5560 16:34:19.254362 00480000 ################################################################
5561 16:34:19.254521
5562 16:34:19.505401 00500000 ################################################################
5563 16:34:19.505564
5564 16:34:19.756915 00580000 ################################################################
5565 16:34:19.757070
5566 16:34:20.007349 00600000 ################################################################
5567 16:34:20.007506
5568 16:34:20.263824 00680000 ################################################################
5569 16:34:20.264013
5570 16:34:20.523246 00700000 ################################################################
5571 16:34:20.523438
5572 16:34:20.784960 00780000 ################################################################
5573 16:34:20.785119
5574 16:34:21.033739 00800000 ################################################################
5575 16:34:21.033941
5576 16:34:21.292216 00880000 ################################################################
5577 16:34:21.292373
5578 16:34:21.542249 00900000 ################################################################
5579 16:34:21.542409
5580 16:34:21.793476 00980000 ################################################################
5581 16:34:21.793637
5582 16:34:22.042698 00a00000 ################################################################
5583 16:34:22.042854
5584 16:34:22.300637 00a80000 ################################################################
5585 16:34:22.300795
5586 16:34:22.552269 00b00000 ################################################################
5587 16:34:22.552447
5588 16:34:22.802772 00b80000 ################################################################
5589 16:34:22.802965
5590 16:34:23.055967 00c00000 ################################################################
5591 16:34:23.056125
5592 16:34:23.306495 00c80000 ################################################################
5593 16:34:23.306655
5594 16:34:23.557155 00d00000 ################################################################
5595 16:34:23.557328
5596 16:34:23.810545 00d80000 ################################################################
5597 16:34:23.810706
5598 16:34:24.063933 00e00000 ################################################################
5599 16:34:24.064128
5600 16:34:24.316600 00e80000 ################################################################
5601 16:34:24.316804
5602 16:34:24.567657 00f00000 ################################################################
5603 16:34:24.567847
5604 16:34:24.820566 00f80000 ################################################################
5605 16:34:24.820732
5606 16:34:25.073512 01000000 ################################################################
5607 16:34:25.073694
5608 16:34:25.328160 01080000 ################################################################
5609 16:34:25.328303
5610 16:34:25.582842 01100000 ################################################################
5611 16:34:25.583018
5612 16:34:25.838708 01180000 ################################################################
5613 16:34:25.838892
5614 16:34:26.098522 01200000 ################################################################
5615 16:34:26.098666
5616 16:34:26.356725 01280000 ################################################################
5617 16:34:26.356876
5618 16:34:26.618298 01300000 ################################################################
5619 16:34:26.618450
5620 16:34:26.879490 01380000 ################################################################
5621 16:34:26.879672
5622 16:34:27.138253 01400000 ################################################################
5623 16:34:27.138391
5624 16:34:27.395544 01480000 ################################################################
5625 16:34:27.395732
5626 16:34:27.658192 01500000 ################################################################
5627 16:34:27.658375
5628 16:34:27.916068 01580000 ################################################################
5629 16:34:27.916266
5630 16:34:28.172793 01600000 ################################################################
5631 16:34:28.172998
5632 16:34:28.424637 01680000 ################################################################
5633 16:34:28.424801
5634 16:34:28.684596 01700000 ################################################################
5635 16:34:28.684773
5636 16:34:28.945663 01780000 ################################################################
5637 16:34:28.945822
5638 16:34:29.206753 01800000 ################################################################
5639 16:34:29.206900
5640 16:34:29.465955 01880000 ################################################################
5641 16:34:29.466111
5642 16:34:29.722012 01900000 ################################################################
5643 16:34:29.722158
5644 16:34:29.985997 01980000 ################################################################
5645 16:34:29.986146
5646 16:34:30.245048 01a00000 ################################################################
5647 16:34:30.245252
5648 16:34:30.504173 01a80000 ################################################################
5649 16:34:30.504361
5650 16:34:30.769741 01b00000 ################################################################
5651 16:34:30.769961
5652 16:34:31.032978 01b80000 ################################################################
5653 16:34:31.033128
5654 16:34:31.294366 01c00000 ################################################################
5655 16:34:31.294516
5656 16:34:31.550879 01c80000 ################################################################
5657 16:34:31.551031
5658 16:34:31.819003 01d00000 ################################################################
5659 16:34:31.819195
5660 16:34:32.081779 01d80000 ################################################################
5661 16:34:32.081928
5662 16:34:32.342331 01e00000 ################################################################
5663 16:34:32.342497
5664 16:34:32.599847 01e80000 ################################################################
5665 16:34:32.600013
5666 16:34:32.859828 01f00000 ################################################################
5667 16:34:32.860012
5668 16:34:33.116436 01f80000 ################################################################
5669 16:34:33.116624
5670 16:34:33.381054 02000000 ################################################################
5671 16:34:33.381246
5672 16:34:33.647438 02080000 ################################################################
5673 16:34:33.647635
5674 16:34:33.910449 02100000 ################################################################
5675 16:34:33.910641
5676 16:34:34.170562 02180000 ################################################################
5677 16:34:34.170719
5678 16:34:34.425738 02200000 ################################################################
5679 16:34:34.425886
5680 16:34:34.691448 02280000 ################################################################
5681 16:34:34.691589
5682 16:34:34.966412 02300000 ################################################################
5683 16:34:34.966557
5684 16:34:35.241462 02380000 ################################################################
5685 16:34:35.241640
5686 16:34:35.503066 02400000 ################################################################
5687 16:34:35.503251
5688 16:34:35.764121 02480000 ################################################################
5689 16:34:35.764314
5690 16:34:36.025744 02500000 ################################################################
5691 16:34:36.025901
5692 16:34:36.290232 02580000 ################################################################
5693 16:34:36.290381
5694 16:34:36.555995 02600000 ################################################################
5695 16:34:36.556174
5696 16:34:36.824195 02680000 ################################################################
5697 16:34:36.824375
5698 16:34:37.088471 02700000 ################################################################
5699 16:34:37.088628
5700 16:34:37.352734 02780000 ################################################################
5701 16:34:37.352877
5702 16:34:37.610675 02800000 ################################################################
5703 16:34:37.610815
5704 16:34:37.868415 02880000 ################################################################
5705 16:34:37.868573
5706 16:34:38.128281 02900000 ################################################################
5707 16:34:38.128470
5708 16:34:38.394620 02980000 ################################################################
5709 16:34:38.394768
5710 16:34:38.659408 02a00000 ################################################################
5711 16:34:38.659583
5712 16:34:38.924663 02a80000 ################################################################
5713 16:34:38.924833
5714 16:34:39.190058 02b00000 ################################################################
5715 16:34:39.190204
5716 16:34:39.455077 02b80000 ################################################################
5717 16:34:39.455226
5718 16:34:39.712419 02c00000 ################################################################
5719 16:34:39.712617
5720 16:34:39.974167 02c80000 ################################################################
5721 16:34:39.974348
5722 16:34:40.232235 02d00000 ################################################################
5723 16:34:40.232415
5724 16:34:40.497534 02d80000 ################################################################
5725 16:34:40.497681
5726 16:34:40.763225 02e00000 ################################################################
5727 16:34:40.763384
5728 16:34:41.021084 02e80000 ################################################################
5729 16:34:41.021257
5730 16:34:41.282401 02f00000 ################################################################
5731 16:34:41.282562
5732 16:34:41.535543 02f80000 ################################################################
5733 16:34:41.535685
5734 16:34:41.794378 03000000 ################################################################
5735 16:34:41.794521
5736 16:34:42.051785 03080000 ################################################################
5737 16:34:42.051932
5738 16:34:42.309045 03100000 ################################################################
5739 16:34:42.309226
5740 16:34:42.576799 03180000 ################################################################
5741 16:34:42.576946
5742 16:34:42.843213 03200000 ################################################################
5743 16:34:42.843402
5744 16:34:43.118047 03280000 ################################################################
5745 16:34:43.118194
5746 16:34:43.403047 03300000 ################################################################
5747 16:34:43.403207
5748 16:34:43.622579 03380000 ################################################### done.
5749 16:34:43.622798
5750 16:34:43.626136 The bootfile was 54411654 bytes long.
5751 16:34:43.626276
5752 16:34:43.629300 Sending tftp read request... done.
5753 16:34:43.629422
5754 16:34:43.629531 Waiting for the transfer...
5755 16:34:43.632562
5756 16:34:43.632683 00000000 # done.
5757 16:34:43.632800
5758 16:34:43.639186 Command line loaded dynamically from TFTP file: 14396128/tftp-deploy-myoln7kc/kernel/cmdline
5759 16:34:43.639314
5760 16:34:43.658704 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5761 16:34:43.658849
5762 16:34:43.658928 Loading FIT.
5763 16:34:43.658996
5764 16:34:43.662031 Image ramdisk-1 has 41223153 bytes.
5765 16:34:43.662124
5766 16:34:43.665197 Image fdt-1 has 57695 bytes.
5767 16:34:43.665322
5768 16:34:43.668654 Image kernel-1 has 13128753 bytes.
5769 16:34:43.668745
5770 16:34:43.675157 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5771 16:34:43.675284
5772 16:34:43.687909 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5773 16:34:43.688051
5774 16:34:43.694735 Choosing best match conf-1 for compat google,juniper-sku16.
5775 16:34:43.694863
5776 16:34:43.701842 Connected to device vid:did:rid of 1ae0:0028:00
5777 16:34:43.709036
5778 16:34:43.712272 tpm_get_response: command 0x17b, return code 0x0
5779 16:34:43.712406
5780 16:34:43.715531 tpm_cleanup: add release locality here.
5781 16:34:43.715656
5782 16:34:43.718850 Shutting down all USB controllers.
5783 16:34:43.718947
5784 16:34:43.722151 Removing current net device
5785 16:34:43.722248
5786 16:34:43.725085 Exiting depthcharge with code 4 at timestamp: 45661672
5787 16:34:43.725205
5788 16:34:43.731936 LZMA decompressing kernel-1 to 0x80193568
5789 16:34:43.732080
5790 16:34:43.734898 LZMA decompressing kernel-1 to 0x40000000
5791 16:34:45.599564
5792 16:34:45.599730 jumping to kernel
5793 16:34:45.600282 end: 2.2.4 bootloader-commands (duration 00:00:30) [common]
5794 16:34:45.600390 start: 2.2.5 auto-login-action (timeout 00:03:56) [common]
5795 16:34:45.600473 Setting prompt string to ['Linux version [0-9]']
5796 16:34:45.600548 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5797 16:34:45.600622 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5798 16:34:45.675112
5799 16:34:45.678466 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5800 16:34:45.681629 start: 2.2.5.1 login-action (timeout 00:03:56) [common]
5801 16:34:45.681743 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5802 16:34:45.681834 Setting prompt string to []
5803 16:34:45.681922 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5804 16:34:45.682005 Using line separator: #'\n'#
5805 16:34:45.682079 No login prompt set.
5806 16:34:45.682152 Parsing kernel messages
5807 16:34:45.682216 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5808 16:34:45.682331 [login-action] Waiting for messages, (timeout 00:03:56)
5809 16:34:45.682410 Waiting using forced prompt support (timeout 00:01:58)
5810 16:34:45.701452 [ 0.000000] Linux version 6.1.92-cip22 (KernelCI@build-j234605-arm64-gcc-10-defconfig-arm64-chromebook-rs2lc) (aarch64-linux-gnu-gcc (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 SMP PREEMPT Mon Jun 17 16:16:56 UTC 2024
5811 16:34:45.704510 [ 0.000000] random: crng init done
5812 16:34:45.711265 [ 0.000000] Machine model: Google juniper sku16 board
5813 16:34:45.714266 [ 0.000000] efi: UEFI not found.
5814 16:34:45.720722 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5815 16:34:45.730561 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5816 16:34:45.737076 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5817 16:34:45.740552 [ 0.000000] printk: bootconsole [mtk8250] enabled
5818 16:34:45.749760 [ 0.000000] NUMA: No NUMA configuration found
5819 16:34:45.756090 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5820 16:34:45.762881 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5821 16:34:45.762983 [ 0.000000] Zone ranges:
5822 16:34:45.769607 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5823 16:34:45.772943 [ 0.000000] DMA32 empty
5824 16:34:45.779208 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5825 16:34:45.782620 [ 0.000000] Movable zone start for each node
5826 16:34:45.785880 [ 0.000000] Early memory node ranges
5827 16:34:45.792409 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5828 16:34:45.799152 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5829 16:34:45.805619 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5830 16:34:45.812007 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5831 16:34:45.818750 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5832 16:34:45.824955 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5833 16:34:45.842026 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5834 16:34:45.848655 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5835 16:34:45.855299 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5836 16:34:45.858467 [ 0.000000] psci: probing for conduit method from DT.
5837 16:34:45.864926 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5838 16:34:45.868249 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5839 16:34:45.874936 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5840 16:34:45.878216 [ 0.000000] psci: SMC Calling Convention v1.1
5841 16:34:45.884539 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5842 16:34:45.887742 [ 0.000000] Detected VIPT I-cache on CPU0
5843 16:34:45.894712 [ 0.000000] CPU features: detected: GIC system register CPU interface
5844 16:34:45.900846 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5845 16:34:45.907633 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5846 16:34:45.914393 [ 0.000000] CPU features: detected: ARM erratum 845719
5847 16:34:45.917305 [ 0.000000] alternatives: applying boot alternatives
5848 16:34:45.923943 [ 0.000000] Fallback order for Node 0: 0
5849 16:34:45.930666 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5850 16:34:45.933764 [ 0.000000] Policy zone: Normal
5851 16:34:45.950136 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5852 16:34:45.963287 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5853 16:34:45.973096 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5854 16:34:45.979607 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5855 16:34:45.986163 <6>[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
5856 16:34:45.992564 <6>[ 0.000000] software IO TLB: area num 8.
5857 16:34:46.016622 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5858 16:34:46.074716 <6>[ 0.000000] Memory: 3874820K/4191232K available (18112K kernel code, 4120K rwdata, 22644K rodata, 8512K init, 616K bss, 283644K reserved, 32768K cma-reserved)
5859 16:34:46.080923 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5860 16:34:46.087592 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5861 16:34:46.090914 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5862 16:34:46.097688 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5863 16:34:46.104128 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5864 16:34:46.110819 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5865 16:34:46.116976 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5866 16:34:46.123637 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5867 16:34:46.130287 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5868 16:34:46.139866 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5869 16:34:46.146557 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5870 16:34:46.149636 <6>[ 0.000000] GICv3: 640 SPIs implemented
5871 16:34:46.153181 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5872 16:34:46.159685 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5873 16:34:46.162741 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5874 16:34:46.169192 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5875 16:34:46.182280 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5876 16:34:46.195493 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5877 16:34:46.202105 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5878 16:34:46.211711 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5879 16:34:46.225041 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5880 16:34:46.231586 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5881 16:34:46.238514 <6>[ 0.009484] Console: colour dummy device 80x25
5882 16:34:46.241852 <6>[ 0.014522] printk: console [tty1] enabled
5883 16:34:46.254656 <6>[ 0.018910] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5884 16:34:46.258072 <6>[ 0.029375] pid_max: default: 32768 minimum: 301
5885 16:34:46.264707 <6>[ 0.034256] LSM: Security Framework initializing
5886 16:34:46.271109 <6>[ 0.039175] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5887 16:34:46.277612 <6>[ 0.046798] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5888 16:34:46.284877 <4>[ 0.055674] cacheinfo: Unable to detect cache hierarchy for CPU 0
5889 16:34:46.294918 <6>[ 0.062299] cblist_init_generic: Setting adjustable number of callback queues.
5890 16:34:46.301301 <6>[ 0.069745] cblist_init_generic: Setting shift to 3 and lim to 1.
5891 16:34:46.307945 <6>[ 0.076098] cblist_init_generic: Setting adjustable number of callback queues.
5892 16:34:46.314275 <6>[ 0.083543] cblist_init_generic: Setting shift to 3 and lim to 1.
5893 16:34:46.317627 <6>[ 0.089942] rcu: Hierarchical SRCU implementation.
5894 16:34:46.324286 <6>[ 0.094967] rcu: Max phase no-delay instances is 1000.
5895 16:34:46.331936 <6>[ 0.102904] EFI services will not be available.
5896 16:34:46.335086 <6>[ 0.107852] smp: Bringing up secondary CPUs ...
5897 16:34:46.345942 <6>[ 0.113113] Detected VIPT I-cache on CPU1
5898 16:34:46.352474 <4>[ 0.113158] cacheinfo: Unable to detect cache hierarchy for CPU 1
5899 16:34:46.359019 <6>[ 0.113167] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5900 16:34:46.365542 <6>[ 0.113199] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5901 16:34:46.368609 <6>[ 0.113685] Detected VIPT I-cache on CPU2
5902 16:34:46.375267 <4>[ 0.113719] cacheinfo: Unable to detect cache hierarchy for CPU 2
5903 16:34:46.381676 <6>[ 0.113724] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5904 16:34:46.388377 <6>[ 0.113736] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5905 16:34:46.395018 <6>[ 0.114180] Detected VIPT I-cache on CPU3
5906 16:34:46.401352 <4>[ 0.114210] cacheinfo: Unable to detect cache hierarchy for CPU 3
5907 16:34:46.407950 <6>[ 0.114214] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5908 16:34:46.414462 <6>[ 0.114225] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5909 16:34:46.417724 <6>[ 0.114801] CPU features: detected: Spectre-v2
5910 16:34:46.424472 <6>[ 0.114810] CPU features: detected: Spectre-BHB
5911 16:34:46.427735 <6>[ 0.114814] CPU features: detected: ARM erratum 858921
5912 16:34:46.434055 <6>[ 0.114820] Detected VIPT I-cache on CPU4
5913 16:34:46.440935 <4>[ 0.114867] cacheinfo: Unable to detect cache hierarchy for CPU 4
5914 16:34:46.447326 <6>[ 0.114875] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5915 16:34:46.453669 <6>[ 0.114883] arch_timer: Enabling local workaround for ARM erratum 858921
5916 16:34:46.457111 <6>[ 0.114893] arch_timer: CPU4: Trapping CNTVCT access
5917 16:34:46.466922 <6>[ 0.114901] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5918 16:34:46.470154 <6>[ 0.115387] Detected VIPT I-cache on CPU5
5919 16:34:46.476886 <4>[ 0.115428] cacheinfo: Unable to detect cache hierarchy for CPU 5
5920 16:34:46.483138 <6>[ 0.115433] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5921 16:34:46.489929 <6>[ 0.115440] arch_timer: Enabling local workaround for ARM erratum 858921
5922 16:34:46.496509 <6>[ 0.115446] arch_timer: CPU5: Trapping CNTVCT access
5923 16:34:46.503013 <6>[ 0.115451] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5924 16:34:46.506464 <6>[ 0.115887] Detected VIPT I-cache on CPU6
5925 16:34:46.512724 <4>[ 0.115932] cacheinfo: Unable to detect cache hierarchy for CPU 6
5926 16:34:46.519566 <6>[ 0.115939] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5927 16:34:46.525850 <6>[ 0.115946] arch_timer: Enabling local workaround for ARM erratum 858921
5928 16:34:46.532513 <6>[ 0.115952] arch_timer: CPU6: Trapping CNTVCT access
5929 16:34:46.538974 <6>[ 0.115957] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5930 16:34:46.542477 <6>[ 0.116487] Detected VIPT I-cache on CPU7
5931 16:34:46.548732 <4>[ 0.116532] cacheinfo: Unable to detect cache hierarchy for CPU 7
5932 16:34:46.555447 <6>[ 0.116538] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5933 16:34:46.562000 <6>[ 0.116545] arch_timer: Enabling local workaround for ARM erratum 858921
5934 16:34:46.568221 <6>[ 0.116552] arch_timer: CPU7: Trapping CNTVCT access
5935 16:34:46.574847 <6>[ 0.116557] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5936 16:34:46.578222 <6>[ 0.116605] smp: Brought up 1 node, 8 CPUs
5937 16:34:46.584481 <6>[ 0.355511] SMP: Total of 8 processors activated.
5938 16:34:46.590929 <6>[ 0.360446] CPU features: detected: 32-bit EL0 Support
5939 16:34:46.594541 <6>[ 0.365825] CPU features: detected: 32-bit EL1 Support
5940 16:34:46.601088 <6>[ 0.371193] CPU features: detected: CRC32 instructions
5941 16:34:46.604208 <6>[ 0.376618] CPU: All CPU(s) started at EL2
5942 16:34:46.610523 <6>[ 0.380960] alternatives: applying system-wide alternatives
5943 16:34:46.617978 <6>[ 0.389128] devtmpfs: initialized
5944 16:34:46.633608 <6>[ 0.398051] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5945 16:34:46.640218 <6>[ 0.407999] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5946 16:34:46.646865 <6>[ 0.415728] pinctrl core: initialized pinctrl subsystem
5947 16:34:46.649868 <6>[ 0.422844] DMI not present or invalid.
5948 16:34:46.656416 <6>[ 0.427212] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5949 16:34:46.666533 <6>[ 0.434102] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5950 16:34:46.673226 <6>[ 0.441612] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5951 16:34:46.682930 <6>[ 0.449783] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5952 16:34:46.686172 <6>[ 0.457928] audit: initializing netlink subsys (disabled)
5953 16:34:46.695915 <5>[ 0.463609] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5954 16:34:46.702639 <6>[ 0.464582] thermal_sys: Registered thermal governor 'step_wise'
5955 16:34:46.709296 <6>[ 0.471560] thermal_sys: Registered thermal governor 'power_allocator'
5956 16:34:46.712258 <6>[ 0.477806] cpuidle: using governor menu
5957 16:34:46.719104 <6>[ 0.488753] NET: Registered PF_QIPCRTR protocol family
5958 16:34:46.725749 <6>[ 0.494232] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5959 16:34:46.732270 <6>[ 0.501324] ASID allocator initialised with 32768 entries
5960 16:34:46.735619 <6>[ 0.508106] Serial: AMBA PL011 UART driver
5961 16:34:46.747788 <4>[ 0.518508] Trying to register duplicate clock ID: 113
5962 16:34:46.806618 <6>[ 0.574262] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5963 16:34:46.820913 <6>[ 0.588626] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5964 16:34:46.824058 <6>[ 0.598376] KASLR enabled
5965 16:34:46.838687 <6>[ 0.606380] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5966 16:34:46.845499 <6>[ 0.613384] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5967 16:34:46.851686 <6>[ 0.619863] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5968 16:34:46.858670 <6>[ 0.626854] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5969 16:34:46.865088 <6>[ 0.633329] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5970 16:34:46.871671 <6>[ 0.640319] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5971 16:34:46.878184 <6>[ 0.646793] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5972 16:34:46.884609 <6>[ 0.653783] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5973 16:34:46.891052 <6>[ 0.661355] ACPI: Interpreter disabled.
5974 16:34:46.898477 <6>[ 0.669350] iommu: Default domain type: Translated
5975 16:34:46.905115 <6>[ 0.674458] iommu: DMA domain TLB invalidation policy: strict mode
5976 16:34:46.908345 <5>[ 0.681091] SCSI subsystem initialized
5977 16:34:46.914930 <6>[ 0.685510] usbcore: registered new interface driver usbfs
5978 16:34:46.921407 <6>[ 0.691237] usbcore: registered new interface driver hub
5979 16:34:46.924706 <6>[ 0.696777] usbcore: registered new device driver usb
5980 16:34:46.932281 <6>[ 0.703077] pps_core: LinuxPPS API ver. 1 registered
5981 16:34:46.942197 <6>[ 0.708261] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5982 16:34:46.945251 <6>[ 0.717586] PTP clock support registered
5983 16:34:46.948191 <6>[ 0.721838] EDAC MC: Ver: 3.0.0
5984 16:34:46.956612 <6>[ 0.727471] FPGA manager framework
5985 16:34:46.963275 <6>[ 0.731154] Advanced Linux Sound Architecture Driver Initialized.
5986 16:34:46.966163 <6>[ 0.737903] vgaarb: loaded
5987 16:34:46.972590 <6>[ 0.741018] clocksource: Switched to clocksource arch_sys_counter
5988 16:34:46.975902 <5>[ 0.747446] VFS: Disk quotas dquot_6.6.0
5989 16:34:46.982712 <6>[ 0.751622] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5990 16:34:46.985688 <6>[ 0.758796] pnp: PnP ACPI: disabled
5991 16:34:46.995035 <6>[ 0.765682] NET: Registered PF_INET protocol family
5992 16:34:47.001311 <6>[ 0.770906] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5993 16:34:47.013075 <6>[ 0.780806] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5994 16:34:47.023013 <6>[ 0.789561] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5995 16:34:47.029686 <6>[ 0.797511] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5996 16:34:47.036007 <6>[ 0.805745] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5997 16:34:47.046512 <6>[ 0.813838] TCP: Hash tables configured (established 32768 bind 32768)
5998 16:34:47.052627 <6>[ 0.820666] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5999 16:34:47.059538 <6>[ 0.827638] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6000 16:34:47.066005 <6>[ 0.835117] NET: Registered PF_UNIX/PF_LOCAL protocol family
6001 16:34:47.072399 <6>[ 0.841249] RPC: Registered named UNIX socket transport module.
6002 16:34:47.075468 <6>[ 0.847394] RPC: Registered udp transport module.
6003 16:34:47.082143 <6>[ 0.852318] RPC: Registered tcp transport module.
6004 16:34:47.088879 <6>[ 0.857241] RPC: Registered tcp NFSv4.1 backchannel transport module.
6005 16:34:47.091768 <6>[ 0.863896] PCI: CLS 0 bytes, default 64
6006 16:34:47.095142 <6>[ 0.868178] Unpacking initramfs...
6007 16:34:47.121662 <6>[ 0.889087] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6008 16:34:47.131410 <6>[ 0.897906] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6009 16:34:47.134481 <6>[ 0.906793] kvm [1]: IPA Size Limit: 40 bits
6010 16:34:47.142236 <6>[ 0.913142] kvm [1]: vgic-v2@c420000
6011 16:34:47.145461 <6>[ 0.916959] kvm [1]: GIC system register CPU interface enabled
6012 16:34:47.152529 <6>[ 0.923143] kvm [1]: vgic interrupt IRQ18
6013 16:34:47.155452 <6>[ 0.927502] kvm [1]: Hyp mode initialized successfully
6014 16:34:47.162883 <5>[ 0.933844] Initialise system trusted keyrings
6015 16:34:47.169495 <6>[ 0.938620] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6016 16:34:47.177808 <6>[ 0.948563] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6017 16:34:47.184242 <5>[ 0.955006] NFS: Registering the id_resolver key type
6018 16:34:47.187458 <5>[ 0.960309] Key type id_resolver registered
6019 16:34:47.193998 <5>[ 0.964720] Key type id_legacy registered
6020 16:34:47.275443 <6>[ 0.969028] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6021 16:34:47.276000 <6>[ 0.975944] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6022 16:34:47.276416 <6>[ 0.983662] 9p: Installing v9fs 9p2000 file system support
6023 16:34:47.276698 <5>[ 1.012852] Key type asymmetric registered
6024 16:34:47.277040 <5>[ 1.017186] Asymmetric key parser 'x509' registered
6025 16:34:47.277305 <6>[ 1.022323] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6026 16:34:47.277618 <6>[ 1.029929] io scheduler mq-deadline registered
6027 16:34:47.277930 <6>[ 1.034685] io scheduler kyber registered
6028 16:34:47.284684 <6>[ 1.055341] EINJ: ACPI disabled.
6029 16:34:47.291476 <4>[ 1.059069] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6030 16:34:47.329082 <6>[ 1.099786] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6031 16:34:47.337381 <6>[ 1.108236] printk: console [ttyS0] disabled
6032 16:34:47.365219 <6>[ 1.132873] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6033 16:34:47.371972 <6>[ 1.142335] printk: console [ttyS0] enabled
6034 16:34:47.375173 <6>[ 1.142335] printk: console [ttyS0] enabled
6035 16:34:47.381410 <6>[ 1.151245] printk: bootconsole [mtk8250] disabled
6036 16:34:47.384820 <6>[ 1.151245] printk: bootconsole [mtk8250] disabled
6037 16:34:47.394703 <3>[ 1.161740] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6038 16:34:47.400960 <3>[ 1.170111] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6039 16:34:47.430805 <6>[ 1.198487] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6040 16:34:47.437285 <6>[ 1.208117] serial serial0: tty port ttyS1 registered
6041 16:34:47.443800 <6>[ 1.214658] SuperH (H)SCI(F) driver initialized
6042 16:34:47.447121 <6>[ 1.220130] msm_serial: driver initialized
6043 16:34:47.462850 <6>[ 1.230482] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6044 16:34:47.472546 <6>[ 1.239074] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6045 16:34:47.478991 <6>[ 1.247647] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6046 16:34:47.488760 <6>[ 1.256219] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6047 16:34:47.498408 <6>[ 1.264871] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6048 16:34:47.505145 <6>[ 1.273532] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6049 16:34:47.514830 <6>[ 1.282269] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6050 16:34:47.524590 <6>[ 1.291022] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6051 16:34:47.530927 <6>[ 1.299591] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6052 16:34:47.540866 <6>[ 1.308385] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6053 16:34:47.549571 <4>[ 1.320736] cacheinfo: Unable to detect cache hierarchy for CPU 0
6054 16:34:47.558984 <6>[ 1.330124] loop: module loaded
6055 16:34:47.571023 <6>[ 1.341996] vsim1: Bringing 1800000uV into 2700000-2700000uV
6056 16:34:47.588986 <6>[ 1.359929] megasas: 07.719.03.00-rc1
6057 16:34:47.597915 <6>[ 1.368674] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6058 16:34:47.608940 <6>[ 1.376400] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6059 16:34:47.622001 <6>[ 1.392756] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6060 16:34:47.681939 <6>[ 1.446219] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-a
6061 16:34:48.411735 <6>[ 2.182501] Freeing initrd memory: 40252K
6062 16:34:48.427093 <4>[ 2.194526] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6063 16:34:48.433681 <4>[ 2.203758] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.92-cip22 #1
6064 16:34:48.440071 <4>[ 2.210456] Hardware name: Google juniper sku16 board (DT)
6065 16:34:48.443359 <4>[ 2.216196] Call trace:
6066 16:34:48.446617 <4>[ 2.218896] dump_backtrace.part.0+0xe0/0xf0
6067 16:34:48.449964 <4>[ 2.223434] show_stack+0x18/0x30
6068 16:34:48.456492 <4>[ 2.227006] dump_stack_lvl+0x68/0x84
6069 16:34:48.459815 <4>[ 2.230927] dump_stack+0x18/0x34
6070 16:34:48.463232 <4>[ 2.234497] sysfs_warn_dup+0x64/0x80
6071 16:34:48.466567 <4>[ 2.238419] sysfs_do_create_link_sd+0xf0/0x100
6072 16:34:48.472783 <4>[ 2.243206] sysfs_create_link+0x20/0x40
6073 16:34:48.476345 <4>[ 2.247385] bus_add_device+0x68/0x10c
6074 16:34:48.479444 <4>[ 2.251391] device_add+0x340/0x7ac
6075 16:34:48.482851 <4>[ 2.255134] of_device_add+0x44/0x60
6076 16:34:48.489195 <4>[ 2.258968] of_platform_device_create_pdata+0x90/0x120
6077 16:34:48.492629 <4>[ 2.264450] of_platform_bus_create+0x170/0x370
6078 16:34:48.499041 <4>[ 2.269236] of_platform_populate+0x50/0xfc
6079 16:34:48.502609 <4>[ 2.273676] parse_mtd_partitions+0x1dc/0x510
6080 16:34:48.509117 <4>[ 2.278289] mtd_device_parse_register+0xf8/0x2e0
6081 16:34:48.512191 <4>[ 2.283247] spi_nor_probe+0x21c/0x2f0
6082 16:34:48.515517 <4>[ 2.287253] spi_mem_probe+0x6c/0xb0
6083 16:34:48.518831 <4>[ 2.291086] spi_probe+0x84/0xe4
6084 16:34:48.522237 <4>[ 2.294568] really_probe+0xbc/0x2e0
6085 16:34:48.528863 <4>[ 2.298398] __driver_probe_device+0x78/0x11c
6086 16:34:48.532053 <4>[ 2.303010] driver_probe_device+0xd8/0x160
6087 16:34:48.535379 <4>[ 2.307448] __device_attach_driver+0xb8/0x134
6088 16:34:48.541763 <4>[ 2.312147] bus_for_each_drv+0x78/0xd0
6089 16:34:48.545022 <4>[ 2.316237] __device_attach+0xa8/0x1c0
6090 16:34:48.548317 <4>[ 2.320327] device_initial_probe+0x14/0x20
6091 16:34:48.551717 <4>[ 2.324765] bus_probe_device+0x9c/0xa4
6092 16:34:48.558198 <4>[ 2.328856] device_add+0x3ac/0x7ac
6093 16:34:48.561610 <4>[ 2.332598] __spi_add_device+0x78/0x120
6094 16:34:48.565024 <4>[ 2.336776] spi_add_device+0x40/0x7c
6095 16:34:48.571290 <4>[ 2.340693] spi_register_controller+0x610/0xad0
6096 16:34:48.574684 <4>[ 2.345566] devm_spi_register_controller+0x4c/0xa4
6097 16:34:48.578010 <4>[ 2.350699] mtk_spi_probe+0x3f8/0x650
6098 16:34:48.581338 <4>[ 2.354703] platform_probe+0x68/0xe0
6099 16:34:48.587771 <4>[ 2.358622] really_probe+0xbc/0x2e0
6100 16:34:48.591035 <4>[ 2.362452] __driver_probe_device+0x78/0x11c
6101 16:34:48.594512 <4>[ 2.367063] driver_probe_device+0xd8/0x160
6102 16:34:48.600836 <4>[ 2.371501] __driver_attach+0x94/0x19c
6103 16:34:48.604122 <4>[ 2.375592] bus_for_each_dev+0x70/0xd0
6104 16:34:48.607695 <4>[ 2.379682] driver_attach+0x24/0x30
6105 16:34:48.610576 <4>[ 2.383512] bus_add_driver+0x154/0x20c
6106 16:34:48.617148 <4>[ 2.387602] driver_register+0x78/0x130
6107 16:34:48.620692 <4>[ 2.391693] __platform_driver_register+0x28/0x34
6108 16:34:48.624056 <4>[ 2.396653] mtk_spi_driver_init+0x1c/0x28
6109 16:34:48.630502 <4>[ 2.401006] do_one_initcall+0x50/0x1d0
6110 16:34:48.633923 <4>[ 2.405097] kernel_init_freeable+0x21c/0x288
6111 16:34:48.636850 <4>[ 2.409710] kernel_init+0x24/0x12c
6112 16:34:48.640123 <4>[ 2.413455] ret_from_fork+0x10/0x20
6113 16:34:48.651680 <6>[ 2.422396] tun: Universal TUN/TAP device driver, 1.6
6114 16:34:48.655021 <6>[ 2.428687] thunder_xcv, ver 1.0
6115 16:34:48.661230 <6>[ 2.432202] thunder_bgx, ver 1.0
6116 16:34:48.661441 <6>[ 2.435705] nicpf, ver 1.0
6117 16:34:48.672461 <6>[ 2.440077] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6118 16:34:48.675762 <6>[ 2.447565] hns3: Copyright (c) 2017 Huawei Corporation.
6119 16:34:48.682429 <6>[ 2.453171] hclge is initializing
6120 16:34:48.685419 <6>[ 2.456751] e1000: Intel(R) PRO/1000 Network Driver
6121 16:34:48.692132 <6>[ 2.461889] e1000: Copyright (c) 1999-2006 Intel Corporation.
6122 16:34:48.698672 <6>[ 2.467912] e1000e: Intel(R) PRO/1000 Network Driver
6123 16:34:48.701940 <6>[ 2.473133] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6124 16:34:48.708487 <6>[ 2.479331] igb: Intel(R) Gigabit Ethernet Network Driver
6125 16:34:48.714895 <6>[ 2.484987] igb: Copyright (c) 2007-2014 Intel Corporation.
6126 16:34:48.721449 <6>[ 2.490830] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6127 16:34:48.728337 <6>[ 2.497353] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6128 16:34:48.731237 <6>[ 2.503913] sky2: driver version 1.30
6129 16:34:48.738366 <6>[ 2.509174] usbcore: registered new device driver r8152-cfgselector
6130 16:34:48.744815 <6>[ 2.515715] usbcore: registered new interface driver r8152
6131 16:34:48.751258 <6>[ 2.521543] VFIO - User Level meta-driver version: 0.3
6132 16:34:48.758460 <6>[ 2.529352] mtu3 11201000.usb: uwk - reg:0x420, version:101
6133 16:34:48.768303 <4>[ 2.535221] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6134 16:34:48.771547 <6>[ 2.542495] mtu3 11201000.usb: dr_mode: 1, drd: auto
6135 16:34:48.777947 <6>[ 2.547721] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6136 16:34:48.781117 <6>[ 2.553910] mtu3 11201000.usb: usb3-drd: 0
6137 16:34:48.791798 <6>[ 2.559471] mtu3 11201000.usb: xHCI platform device register success...
6138 16:34:48.798537 <4>[ 2.568154] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6139 16:34:48.805221 <6>[ 2.576099] xhci-mtk 11200000.usb: xHCI Host Controller
6140 16:34:48.814930 <6>[ 2.581609] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6141 16:34:48.817994 <6>[ 2.589331] xhci-mtk 11200000.usb: USB3 root hub has no ports
6142 16:34:48.828030 <6>[ 2.595339] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6143 16:34:48.834457 <6>[ 2.604764] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6144 16:34:48.840944 <6>[ 2.610843] xhci-mtk 11200000.usb: xHCI Host Controller
6145 16:34:48.847604 <6>[ 2.616333] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6146 16:34:48.854081 <6>[ 2.623992] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6147 16:34:48.860545 <6>[ 2.630822] hub 1-0:1.0: USB hub found
6148 16:34:48.863682 <6>[ 2.634851] hub 1-0:1.0: 1 port detected
6149 16:34:48.873693 <6>[ 2.640189] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6150 16:34:48.876943 <6>[ 2.648798] hub 2-0:1.0: USB hub found
6151 16:34:48.883628 <3>[ 2.652824] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6152 16:34:48.890231 <6>[ 2.660700] usbcore: registered new interface driver usb-storage
6153 16:34:48.896593 <6>[ 2.667307] usbcore: registered new device driver onboard-usb-hub
6154 16:34:48.913410 <4>[ 2.681118] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6155 16:34:48.922482 <6>[ 2.693389] mt6397-rtc mt6358-rtc: registered as rtc0
6156 16:34:48.932261 <6>[ 2.698870] mt6397-rtc mt6358-rtc: setting system clock to 2024-06-17T16:34:49 UTC (1718642089)
6157 16:34:48.938584 <6>[ 2.708763] i2c_dev: i2c /dev entries driver
6158 16:34:48.948511 <6>[ 2.715180] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6159 16:34:48.954931 <6>[ 2.723502] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6160 16:34:48.961338 <6>[ 2.732407] i2c 4-0058: Fixed dependency cycle(s) with /panel
6161 16:34:48.968005 <6>[ 2.738442] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6162 16:34:48.978490 <3>[ 2.745906] anx7625 4-0058: [drm:anx7625_i2c_probe] *ERROR* fail to find dsi host.
6163 16:34:48.994994 <6>[ 2.765791] cpu cpu0: EM: created perf domain
6164 16:34:49.008052 <6>[ 2.771301] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6165 16:34:49.011196 <6>[ 2.782586] cpu cpu4: EM: created perf domain
6166 16:34:49.018759 <6>[ 2.789783] sdhci: Secure Digital Host Controller Interface driver
6167 16:34:49.025721 <6>[ 2.796239] sdhci: Copyright(c) Pierre Ossman
6168 16:34:49.032256 <6>[ 2.801652] Synopsys Designware Multimedia Card Interface Driver
6169 16:34:49.038583 <6>[ 2.802203] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6170 16:34:49.045000 <6>[ 2.808714] sdhci-pltfm: SDHCI platform and OF driver helper
6171 16:34:49.051502 <6>[ 2.822013] ledtrig-cpu: registered to indicate activity on CPUs
6172 16:34:49.059006 <6>[ 2.829776] usbcore: registered new interface driver usbhid
6173 16:34:49.065089 <6>[ 2.835615] usbhid: USB HID core driver
6174 16:34:49.072667 <6>[ 2.839874] spi_master spi2: will run message pump with realtime priority
6175 16:34:49.079610 <4>[ 2.839875] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6176 16:34:49.085887 <4>[ 2.839928] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6177 16:34:49.098872 <6>[ 2.859865] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6178 16:34:49.116281 <6>[ 2.877217] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6179 16:34:49.122461 <4>[ 2.887872] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6180 16:34:49.128965 <6>[ 2.891706] cros-ec-spi spi2.0: Chrome EC device registered
6181 16:34:49.140343 <4>[ 2.907974] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6182 16:34:49.152622 <4>[ 2.920008] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6183 16:34:49.159058 <4>[ 2.929365] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6184 16:34:49.172553 <6>[ 2.943246] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6185 16:34:49.179085 <6>[ 2.946080] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6186 16:34:49.185390 <6>[ 2.951023] mmc0: new HS400 MMC card at address 0001
6187 16:34:49.192010 <6>[ 2.962155] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6188 16:34:49.201138 <6>[ 2.972037] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6189 16:34:49.208628 <6>[ 2.979578] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6190 16:34:49.218544 <6>[ 2.980775] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6191 16:34:49.221882 <6>[ 2.986540] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6192 16:34:49.234896 <6>[ 2.998281] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6193 16:34:49.241270 <6>[ 3.000205] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6194 16:34:49.251118 <6>[ 3.005478] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6195 16:34:49.260726 <6>[ 3.005591] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6196 16:34:49.267448 <6>[ 3.011281] NET: Registered PF_PACKET protocol family
6197 16:34:49.273743 <6>[ 3.043831] 9pnet: Installing 9P2000 support
6198 16:34:49.277017 <5>[ 3.048641] Key type dns_resolver registered
6199 16:34:49.283459 <6>[ 3.053746] registered taskstats version 1
6200 16:34:49.286660 <5>[ 3.058130] Loading compiled-in X.509 certificates
6201 16:34:49.297462 <6>[ 3.065125] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6202 16:34:49.329236 <3>[ 3.096766] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6203 16:34:49.362029 <6>[ 3.126393] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6204 16:34:49.373107 <6>[ 3.140738] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6205 16:34:49.383049 <6>[ 3.149319] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6206 16:34:49.389652 <6>[ 3.157859] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6207 16:34:49.399325 <6>[ 3.166574] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6208 16:34:49.409253 <6>[ 3.175259] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6209 16:34:49.415475 <6>[ 3.183882] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6210 16:34:49.425382 <6>[ 3.192432] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6211 16:34:49.431854 <6>[ 3.202061] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6212 16:34:49.438613 <6>[ 3.209419] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6213 16:34:49.445969 <6>[ 3.216562] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6214 16:34:49.452191 <6>[ 3.219919] hub 1-1:1.0: USB hub found
6215 16:34:49.458841 <6>[ 3.223721] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6216 16:34:49.462206 <6>[ 3.227475] hub 1-1:1.0: 3 ports detected
6217 16:34:49.468507 <6>[ 3.234408] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6218 16:34:49.475538 <6>[ 3.246263] panfrost 13040000.gpu: clock rate = 511999970
6219 16:34:49.485253 <6>[ 3.251940] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6220 16:34:49.495082 <6>[ 3.262160] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6221 16:34:49.501372 <6>[ 3.270173] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6222 16:34:49.514359 <6>[ 3.278606] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6223 16:34:49.520953 <6>[ 3.290685] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6224 16:34:49.534009 <6>[ 3.301771] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6225 16:34:49.543800 <6>[ 3.310574] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6226 16:34:49.553827 <6>[ 3.319722] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6227 16:34:49.563404 <6>[ 3.328852] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6228 16:34:49.570143 <6>[ 3.337981] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6229 16:34:49.579772 <6>[ 3.347282] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6230 16:34:49.589829 <6>[ 3.356583] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6231 16:34:49.599383 <6>[ 3.366056] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6232 16:34:49.609238 <6>[ 3.375531] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6233 16:34:49.619024 <6>[ 3.384658] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6234 16:34:49.689453 <6>[ 3.456896] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6235 16:34:49.698944 <6>[ 3.465762] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6236 16:34:49.709720 <6>[ 3.477277] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6237 16:34:49.757358 <6>[ 3.525054] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6238 16:34:50.419977 <6>[ 3.717412] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6239 16:34:50.429804 <4>[ 3.834242] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6240 16:34:50.439630 <4>[ 3.834261] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6241 16:34:50.442943 <6>[ 3.874968] r8152 1-1.2:1.0 eth0: v1.12.13
6242 16:34:50.449084 <6>[ 3.953072] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6243 16:34:50.455867 <6>[ 4.164457] Console: switching to colour frame buffer device 170x48
6244 16:34:50.465674 <6>[ 4.233380] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6245 16:34:50.487776 <6>[ 4.252138] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6246 16:34:50.506077 <6>[ 4.270521] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6247 16:34:50.516089 <6>[ 4.283205] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6248 16:34:50.522485 <6>[ 4.291745] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6249 16:34:50.535619 <6>[ 4.299877] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6250 16:34:50.553574 <6>[ 4.318081] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6251 16:34:51.713401 <6>[ 5.484368] r8152 1-1.2:1.0 eth0: carrier on
6252 16:34:54.442424 <5>[ 5.509033] Sending DHCP requests .., OK
6253 16:34:54.448701 <6>[ 8.217361] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.22
6254 16:34:54.451876 <6>[ 8.225797] IP-Config: Complete:
6255 16:34:54.464929 <6>[ 8.229369] device=eth0, hwaddr=00:e0:4c:78:85:cb, ipaddr=192.168.201.22, mask=255.255.255.0, gw=192.168.201.1
6256 16:34:54.474962 <6>[ 8.240273] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2, domain=lava-rack, nis-domain=(none)
6257 16:34:54.486806 <6>[ 8.254556] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6258 16:34:54.495431 <6>[ 8.254567] nameserver0=192.168.201.1
6259 16:34:54.503679 <6>[ 8.274334] clk: Disabling unused clocks
6260 16:34:54.508434 <6>[ 8.282277] ALSA device list:
6261 16:34:54.517323 <6>[ 8.288322] No soundcards found.
6262 16:34:54.526647 <6>[ 8.297360] Freeing unused kernel memory: 8512K
6263 16:34:54.533561 <6>[ 8.304484] Run /init as init process
6264 16:34:54.563187 <6>[ 8.333936] NET: Registered PF_INET6 protocol family
6265 16:34:54.570017 <6>[ 8.340955] Segment Routing with IPv6
6266 16:34:54.573167 <6>[ 8.345586] In-situ OAM (IOAM) with IPv6
6267 16:34:54.619361 <30>[ 8.360993] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6268 16:34:54.628052 <30>[ 8.398742] systemd[1]: Detected architecture arm64.
6269 16:34:54.628167
6270 16:34:54.634459 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6271 16:34:54.634549
6272 16:34:54.650490 <30>[ 8.421528] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6273 16:34:54.798027 <30>[ 8.565351] systemd[1]: Queued start job for default target graphical.target.
6274 16:34:54.835383 <30>[ 8.602737] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6275 16:34:54.844780 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6276 16:34:54.863095 <30>[ 8.630474] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6277 16:34:54.873355 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6278 16:34:54.895524 <30>[ 8.662960] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6279 16:34:54.906856 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6280 16:34:54.926754 <30>[ 8.694266] systemd[1]: Created slice user.slice - User and Session Slice.
6281 16:34:54.937215 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6282 16:34:54.957115 <30>[ 8.721546] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6283 16:34:54.969932 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6284 16:34:54.989361 <30>[ 8.753437] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6285 16:34:55.001298 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6286 16:34:55.030797 <30>[ 8.785296] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6287 16:34:55.045670 <30>[ 8.813407] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6288 16:34:55.056381 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6289 16:34:55.073652 <30>[ 8.841216] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6290 16:34:55.086491 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6291 16:34:55.105649 <30>[ 8.873264] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6292 16:34:55.119769 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6293 16:34:55.134509 <30>[ 8.905281] systemd[1]: Reached target paths.target - Path Units.
6294 16:34:55.148869 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6295 16:34:55.165514 <30>[ 8.933218] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6296 16:34:55.178311 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6297 16:34:55.193642 <30>[ 8.961187] systemd[1]: Reached target slices.target - Slice Units.
6298 16:34:55.204893 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6299 16:34:55.218544 <30>[ 8.989229] systemd[1]: Reached target swap.target - Swaps.
6300 16:34:55.229242 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6301 16:34:55.249708 <30>[ 9.017253] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6302 16:34:55.263156 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6303 16:34:55.282130 <30>[ 9.049597] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6304 16:34:55.295837 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6305 16:34:55.315536 <30>[ 9.082941] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6306 16:34:55.328741 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6307 16:34:55.346296 <30>[ 9.113946] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6308 16:34:55.360337 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6309 16:34:55.379504 <30>[ 9.146734] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6310 16:34:55.391844 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6311 16:34:55.410436 <30>[ 9.178060] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6312 16:34:55.424425 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6313 16:34:55.442602 <30>[ 9.209927] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6314 16:34:55.455573 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6315 16:34:55.474222 <30>[ 9.241662] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6316 16:34:55.486990 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6317 16:34:55.525947 <30>[ 9.293645] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6318 16:34:55.538684 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6319 16:34:55.563158 <30>[ 9.330633] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6320 16:34:55.576297 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6321 16:34:55.599932 <30>[ 9.367256] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6322 16:34:55.612846 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6323 16:34:55.636574 <30>[ 9.397720] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6324 16:34:55.682473 <30>[ 9.449967] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6325 16:34:55.696376 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6326 16:34:55.720213 <30>[ 9.487716] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6327 16:34:55.733810 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6328 16:34:55.755132 <30>[ 9.522615] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6329 16:34:55.771931 Startin<6>[ 9.536476] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6330 16:34:55.774977 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6331 16:34:55.826412 <30>[ 9.593831] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6332 16:34:55.837354 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6333 16:34:55.859420 <30>[ 9.627074] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6334 16:34:55.873949 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6335 16:34:55.895228 <30>[ 9.662850] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6336 16:34:55.908759 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6337 16:34:55.935562 <30>[ 9.703035] systemd[1]: Starting systemd-journald.service - Journal Service...
6338 16:34:55.948503 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6339 16:34:55.990545 <30>[ 9.757892] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6340 16:34:56.001344 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6341 16:34:56.025717 <30>[ 9.790114] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6342 16:34:56.038657 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6343 16:34:56.082840 <30>[ 9.850177] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6344 16:34:56.094384 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6345 16:34:56.113612 <30>[ 9.880975] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6346 16:34:56.124600 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6347 16:34:56.145300 <30>[ 9.912730] systemd[1]: Started systemd-journald.service - Journal Service.
6348 16:34:56.155067 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6349 16:34:56.176650 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6350 16:34:56.194081 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6351 16:34:56.210137 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6352 16:34:56.226497 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6353 16:34:56.247270 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6354 16:34:56.266835 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6355 16:34:56.286970 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6356 16:34:56.306978 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6357 16:34:56.326924 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6358 16:34:56.346467 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6359 16:34:56.366552 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6360 16:34:56.386707 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6361 16:34:56.434791 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6362 16:34:56.460281 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6363 16:34:56.481774 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6364 16:34:56.499285 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6365 16:34:56.523781 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6366 16:34:56.545840 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6367 16:34:56.552298 See 'systemctl status systemd-remount-fs.service' for details.
6368 16:34:56.598990 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6369 16:34:56.615590 <46>[ 10.383097] systemd-journald[203]: Received client request to flush runtime journal.
6370 16:34:56.628103 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6371 16:34:56.651746 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6372 16:34:56.673756 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6373 16:34:56.692688 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6374 16:34:56.711528 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6375 16:34:56.754736 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6376 16:34:56.785552 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6377 16:34:56.807446 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6378 16:34:56.830112 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6379 16:34:56.883306 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6380 16:34:56.906062 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6381 16:34:56.926903 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6382 16:34:56.975756 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6383 16:34:56.995956 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6384 16:34:57.014070 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6385 16:34:57.039324 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6386 16:34:57.061472 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6387 16:34:57.078239 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6388 16:34:57.093570 <46>[ 10.861108] systemd-journald[203]: Time jumped backwards, rotating.
6389 16:34:57.200093 <3>[ 10.970756] mtk-scp 10500000.scp: invalid resource
6390 16:34:57.209614 <3>[ 10.976111] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6391 16:34:57.219367 <6>[ 10.976672] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6392 16:34:57.229100 <6>[ 10.985500] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6393 16:34:57.235923 <3>[ 10.986743] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6394 16:34:57.246269 <6>[ 10.995708] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6395 16:34:57.256045 <3>[ 11.005062] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6396 16:34:57.262629 <3>[ 11.005071] elan_i2c 2-0015: Error applying setting, reverse things back
6397 16:34:57.269345 <6>[ 11.014440] remoteproc remoteproc0: scp is available
6398 16:34:57.275575 <4>[ 11.016853] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6399 16:34:57.282203 <3>[ 11.017608] thermal_sys: Failed to find 'trips' node
6400 16:34:57.288765 <3>[ 11.017611] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6401 16:34:57.298500 <3>[ 11.017619] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6402 16:34:57.308359 <4>[ 11.017622] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6403 16:34:57.315038 <4>[ 11.026735] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6404 16:34:57.321525 <3>[ 11.029594] thermal_sys: Failed to find 'trips' node
6405 16:34:57.331861 <3>[ 11.029601] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6406 16:34:57.338555 <3>[ 11.029609] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6407 16:34:57.349701 <4>[ 11.029613] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6408 16:34:57.356151 <4>[ 11.033097] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6409 16:34:57.366190 <4>[ 11.035192] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6410 16:34:57.379977 <6>[ 11.041781] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6411 16:34:57.383216 <6>[ 11.045078] remoteproc remoteproc0: powering up scp
6412 16:34:57.396794 <6>[ 11.055735] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6413 16:34:57.406758 <4>[ 11.057653] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6414 16:34:57.417152 <3>[ 11.058304] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6415 16:34:57.427754 <3>[ 11.058474] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6416 16:34:57.437723 <3>[ 11.058485] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6417 16:34:57.447601 <3>[ 11.060435] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6418 16:34:57.454139 <3>[ 11.060448] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6419 16:34:57.464075 <3>[ 11.060453] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6420 16:34:57.473839 <3>[ 11.060459] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6421 16:34:57.480479 <3>[ 11.060464] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6422 16:34:57.490422 <3>[ 11.061343] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6423 16:34:57.493766 <6>[ 11.074595] mc: Linux media interface: v0.10
6424 16:34:57.500343 <3>[ 11.075507] remoteproc remoteproc0: request_firmware failed: -2
6425 16:34:57.513390 <3>[ 11.103909] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6426 16:34:57.523524 <5>[ 11.119820] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6427 16:34:57.526436 <6>[ 11.125691] videodev: Linux video capture interface: v2.00
6428 16:34:57.537120 <6>[ 11.132188] cs_system_cfg: CoreSight Configuration manager initialised
6429 16:34:57.543748 <5>[ 11.151918] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6430 16:34:57.553325 <6>[ 11.195213] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6431 16:34:57.559989 <5>[ 11.195864] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6432 16:34:57.569521 <6>[ 11.199508] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6433 16:34:57.576342 <6>[ 11.212983] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6434 16:34:57.586308 <4>[ 11.214481] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6435 16:34:57.593218 <6>[ 11.230678] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6436 16:34:57.599819 <6>[ 11.231368] cfg80211: failed to load regulatory.db
6437 16:34:57.606516 <6>[ 11.240132] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6438 16:34:57.609792 <6>[ 11.264825] Bluetooth: Core ver 2.22
6439 16:34:57.620102 <6>[ 11.269186] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6440 16:34:57.626789 <6>[ 11.272783] NET: Registered PF_BLUETOOTH protocol family
6441 16:34:57.632997 <6>[ 11.277735] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6442 16:34:57.639797 <6>[ 11.290131] Bluetooth: HCI device and connection manager initialized
6443 16:34:57.652724 <3>[ 11.290291] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6444 16:34:57.659250 <3>[ 11.291323] debugfs: File 'Playback' in directory 'dapm' already present!
6445 16:34:57.665859 <3>[ 11.291335] debugfs: File 'Capture' in directory 'dapm' already present!
6446 16:34:57.672436 <6>[ 11.311565] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6447 16:34:57.679072 <6>[ 11.312444] Bluetooth: HCI socket layer initialized
6448 16:34:57.685331 <6>[ 11.320678] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6449 16:34:57.691964 <6>[ 11.328389] Bluetooth: L2CAP socket layer initialized
6450 16:34:57.698912 <6>[ 11.338909] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6451 16:34:57.712781 <6>[ 11.340911] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6452 16:34:57.719188 <6>[ 11.344468] Bluetooth: SCO socket layer initialized
6453 16:34:57.725688 <6>[ 11.357301] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6454 16:34:57.732223 <6>[ 11.370829] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6455 16:34:57.738738 <6>[ 11.375099] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6456 16:34:57.748524 <6>[ 11.375727] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video0
6457 16:34:57.751824 <6>[ 11.386970] Bluetooth: HCI UART driver ver 2.3
6458 16:34:57.762211 <6>[ 11.387847] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video1 (81,1)
6459 16:34:57.768734 <6>[ 11.395468] Bluetooth: HCI UART protocol H4 registered
6460 16:34:57.782042 <6>[ 11.400940] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6461 16:34:57.788677 <6>[ 11.401066] usbcore: registered new interface driver uvcvideo
6462 16:34:57.792019 <6>[ 11.408923] Bluetooth: HCI UART protocol LL registered
6463 16:34:57.802932 <6>[ 11.426875] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6464 16:34:57.810393 <6>[ 11.427340] Bluetooth: HCI UART protocol Three-wire (H5) registered
6465 16:34:57.816830 <6>[ 11.434375] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6466 16:34:57.823631 <6>[ 11.441637] Bluetooth: HCI UART protocol Broadcom registered
6467 16:34:57.836745 <6>[ 11.449551] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6468 16:34:57.843652 <6>[ 11.454381] Bluetooth: HCI UART protocol QCA registered
6469 16:34:57.850541 <6>[ 11.455803] Bluetooth: hci0: setting up ROME/QCA6390
6470 16:34:57.860441 <4>[ 11.550106] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6471 16:34:57.863763 <4>[ 11.550106] Fallback method does not support PEC.
6472 16:34:57.870967 <6>[ 11.557008] Bluetooth: HCI UART protocol Marvell registered
6473 16:34:57.881074 <3>[ 11.565797] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6474 16:34:57.891091 <3>[ 11.575278] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6475 16:34:57.900804 <3>[ 11.584398] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6476 16:34:57.908088 <3>[ 11.592399] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6477 16:34:57.914644 <6>[ 11.612163] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6478 16:34:57.926416 <3>[ 11.619992] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6479 16:34:57.932950 <3>[ 11.668671] Bluetooth: hci0: Frame reassembly failed (-84)
6480 16:34:57.943322 <3>[ 11.682786] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6481 16:34:57.953096 <3>[ 11.701899] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6482 16:34:57.962686 <3>[ 11.702441] power_supply sbs-12-000b: driver failed to report `capacity_level' property: -6
6483 16:34:58.043376 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/systemd-backlight.
6484 16:34:58.054273 <3>[ 11.821079] power_supply sbs-12-000b: driver failed to report `capacity_level' property: -6
6485 16:34:58.068605 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6486 16:34:58.118506 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6487 16:34:58.139091 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6488 16:34:58.159542 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6489 16:34:58.168147 <6>[ 11.938753] Bluetooth: hci0: QCA Product ID :0x00000008
6490 16:34:58.177129 <6>[ 11.947214] Bluetooth: hci0: QCA SOC Version :0x00000044
6491 16:34:58.184797 <6>[ 11.955196] Bluetooth: hci0: QCA ROM Version :0x00000302
6492 16:34:58.193425 <6>[ 11.964316] Bluetooth: hci0: QCA Patch Version:0x00000111
6493 16:34:58.202432 <6>[ 11.973343] Bluetooth: hci0: QCA controller version 0x00440302
6494 16:34:58.214548 <6>[ 11.982158] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6495 16:34:58.221058 <4>[ 11.982236] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6496 16:34:58.237424 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m<3>[ 12.002534] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6497 16:34:58.247570 <6>[ 12.009956] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6498 16:34:58.250716 <3>[ 12.012177] Bluetooth: hci0: QCA Failed to download patch (-2)
6499 16:34:58.253869 - Bluetooth Support.
6500 16:34:58.274292 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6501 16:34:58.294383 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6502 16:34:58.311940 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6503 16:34:58.318891 <4>[ 12.089476] Bluetooth: hci0: Received unexpected HCI Event 0x00
6504 16:34:58.325209 <3>[ 12.089467] Bluetooth: hci0: Frame reassembly failed (-84)
6505 16:34:58.338053 <4>[ 12.093059] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6506 16:34:58.353708 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6507 16:34:58.360108 <4>[ 12.128180] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6508 16:34:58.376601 [[0;32m OK [0m] Reached target [0;1;39mtime<4>[ 12.143791] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6509 16:34:58.383077 rs.target[0m - Timer Units.
6510 16:34:58.389601 <4>[ 12.157701] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6511 16:34:58.400030 <3>[ 12.165329] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6512 16:34:58.410117 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6513 16:34:58.426709 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6514 16:34:58.443152 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6515 16:34:58.458585 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6516 16:34:58.507179 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6517 16:34:58.531439 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6518 16:34:58.551849 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6519 16:34:58.571430 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6520 16:34:58.615321 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6521 16:34:58.682569 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6522 16:34:58.701050 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6523 16:34:58.719246 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6524 16:34:58.740449 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6525 16:34:58.759479 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6526 16:34:58.808530 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6527 16:34:58.861447 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6528 16:34:58.881352 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6529 16:34:58.901372 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6530 16:34:58.920300 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6531 16:34:58.964399 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6532 16:34:59.010312 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6533 16:34:59.081529
6534 16:34:59.084379 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6535 16:34:59.084518
6536 16:34:59.087619 debian-bookworm-arm64 login: root (automatic login)
6537 16:34:59.087718
6538 16:34:59.105520 Linux debian-bookworm-arm64 6.1.92-cip22 #1 SMP PREEMPT Mon Jun 17 16:16:56 UTC 2024 aarch64
6539 16:34:59.105698
6540 16:34:59.112257 The programs included with the Debian GNU/Linux system are free software;
6541 16:34:59.118692 the exact distribution terms for each program are described in the
6542 16:34:59.121835 individual files in /usr/share/doc/*/copyright.
6543 16:34:59.121978
6544 16:34:59.128270 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6545 16:34:59.131474 permitted by applicable law.
6546 16:34:59.132190 Matched prompt #10: / #
6548 16:34:59.132547 Setting prompt string to ['/ #']
6549 16:34:59.132692 end: 2.2.5.1 login-action (duration 00:00:13) [common]
6551 16:34:59.133040 end: 2.2.5 auto-login-action (duration 00:00:14) [common]
6552 16:34:59.133180 start: 2.2.6 expect-shell-connection (timeout 00:03:42) [common]
6553 16:34:59.133292 Setting prompt string to ['/ #']
6554 16:34:59.133399 Forcing a shell prompt, looking for ['/ #']
6556 16:34:59.183664 / #
6557 16:34:59.183875 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6558 16:34:59.184003 Waiting using forced prompt support (timeout 00:02:30)
6559 16:34:59.188417
6560 16:34:59.188760 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6561 16:34:59.188895 start: 2.2.7 export-device-env (timeout 00:03:42) [common]
6562 16:34:59.189005 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6563 16:34:59.189098 end: 2.2 depthcharge-retry (duration 00:01:18) [common]
6564 16:34:59.189191 end: 2 depthcharge-action (duration 00:01:18) [common]
6565 16:34:59.189287 start: 3 lava-test-retry (timeout 00:08:18) [common]
6566 16:34:59.189383 start: 3.1 lava-test-shell (timeout 00:08:18) [common]
6567 16:34:59.189477 Using namespace: common
6569 16:34:59.289817 / # #
6570 16:34:59.289983 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6571 16:34:59.295208 #
6572 16:34:59.295529 Using /lava-14396128
6574 16:34:59.395924 / # export SHELL=/bin/sh
6575 16:34:59.400654 export SHELL=/bin/sh
6577 16:34:59.501325 / # . /lava-14396128/environment
6578 16:34:59.506589 . /lava-14396128/environment
6580 16:34:59.607155 / # /lava-14396128/bin/lava-test-runner /lava-14396128/0
6581 16:34:59.607361 Test shell timeout: 10s (minimum of the action and connection timeout)
6582 16:34:59.611637 /lava-14396128/bin/lava-test-runner /lava-14396128/0
6583 16:34:59.636352 + export TESTRUN_ID=0_v4l2-compliance-uvc
6584 16:34:59.639697 + cd /lava-14396128/0/tests/0_v4l2-compliance-uvc
6585 16:34:59.639838 + cat uuid
6586 16:34:59.642876 + UUID=14396128_1.5.2.3.1
6587 16:34:59.643000 + set +x
6588 16:34:59.649606 <LAVA_SIGNAL_STARTRUN 0_v4l2-compliance-uvc 14396128_1.5.2.3.1>
6589 16:34:59.649938 Received signal: <STARTRUN> 0_v4l2-compliance-uvc 14396128_1.5.2.3.1
6590 16:34:59.650059 Starting test lava.0_v4l2-compliance-uvc (14396128_1.5.2.3.1)
6591 16:34:59.650200 Skipping test definition patterns.
6592 16:34:59.652703 + /usr/bin/v4l2-parser.sh -d uvcvideo
6593 16:34:59.659089 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=device-presence RESULT=pass>
6594 16:34:59.659206 device: /dev/video2
6595 16:34:59.659465 Received signal: <TESTCASE> TEST_CASE_ID=device-presence RESULT=pass
6597 16:35:00.342591 <3>[ 14.113090] Bluetooth: hci0: Opcode 0x1002 failed: -110
6598 16:35:00.349233 <3>[ 14.113226] Bluetooth: hci0: command 0x1002 tx timeout
6599 16:35:06.558816 v4l2-compliance 1.27.0-1, 64 bits, 64-bit time_t
6600 16:35:06.576266 v4l2-compliance SHA: a18611d8960f 2024-03-08 13:09:54
6601 16:35:06.586895
6602 16:35:06.605095 Compliance test for uvcvideo device /dev/video2:
6603 16:35:06.616080
6604 16:35:06.631617 Driver Info:
6605 16:35:06.646356 Driver name : uvcvideo
6606 16:35:06.662837 Card type : HD WebCam: HD WebCam
6607 16:35:06.677572 Bus info : usb-11200000.usb-1.3
6608 16:35:06.688476 Driver version : 6.1.92
6609 16:35:06.704028 Capabilities : 0x84a00001
6610 16:35:06.722142 Metadata Capture
6611 16:35:06.736514 Streaming
6612 16:35:06.751199 Extended Pix Format
6613 16:35:06.765127 Device Capabilities
6614 16:35:06.780894 Device Caps : 0x04200001
6615 16:35:06.800780 Streaming
6616 16:35:06.814434 Extended Pix Format
6617 16:35:06.828510 Media Driver Info:
6618 16:35:06.842579 Driver name : uvcvideo
6619 16:35:06.861660 Model : HD WebCam: HD WebCam
6620 16:35:06.872533 Serial :
6621 16:35:06.889692 Bus info : usb-11200000.usb-1.3
6622 16:35:06.900857 Media version : 6.1.92
6623 16:35:06.917307 Hardware revision: 0x00003269 (12905)
6624 16:35:06.925343 Driver version : 6.1.92
6625 16:35:06.941447 Interface Info:
6626 16:35:06.959654 <LAVA_SIGNAL_TESTSET START Interface-Info>
6627 16:35:06.959961 Received signal: <TESTSET> START Interface-Info
6628 16:35:06.960056 Starting test_set Interface-Info
6629 16:35:06.962765 ID : 0x03000002
6630 16:35:06.976799 Type : V4L Video
6631 16:35:06.990855 Entity Info:
6632 16:35:07.000214 <LAVA_SIGNAL_TESTSET STOP>
6633 16:35:07.000505 Received signal: <TESTSET> STOP
6634 16:35:07.000587 Closing test_set Interface-Info
6635 16:35:07.011392 <LAVA_SIGNAL_TESTSET START Entity-Info>
6636 16:35:07.011699 Received signal: <TESTSET> START Entity-Info
6637 16:35:07.011786 Starting test_set Entity-Info
6638 16:35:07.014568 ID : 0x00000001 (1)
6639 16:35:07.029348 Name : HD WebCam: HD WebCam
6640 16:35:07.041398 Function : V4L2 I/O
6641 16:35:07.055806 Flags : default
6642 16:35:07.070068 Pad 0x01000007 : 0: Sink
6643 16:35:07.097607 Link 0x02000013: from remote pad 0x100000a of entity 'Extension 4' (Video Pixel Formatter): Data, Enabled, Immutable
6644 16:35:07.097747
6645 16:35:07.113313 Required ioctls:
6646 16:35:07.122626 <LAVA_SIGNAL_TESTSET STOP>
6647 16:35:07.122926 Received signal: <TESTSET> STOP
6648 16:35:07.123005 Closing test_set Entity-Info
6649 16:35:07.134207 <LAVA_SIGNAL_TESTSET START Required-ioctls>
6650 16:35:07.134482 Received signal: <TESTSET> START Required-ioctls
6651 16:35:07.134561 Starting test_set Required-ioctls
6652 16:35:07.137358 test MC information (see 'Media Driver Info' above): OK
6653 16:35:07.167931 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MC-information-see-Media-Driver-Info-above RESULT=pass>
6654 16:35:07.168248 Received signal: <TESTCASE> TEST_CASE_ID=MC-information-see-Media-Driver-Info-above RESULT=pass
6656 16:35:07.171277 test VIDIOC_QUERYCAP: OK
6657 16:35:07.194036 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass>
6658 16:35:07.194324 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass
6660 16:35:07.197128 test invalid ioctls: OK
6661 16:35:07.225426 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=invalid-ioctls RESULT=pass>
6662 16:35:07.225559
6663 16:35:07.225809 Received signal: <TESTCASE> TEST_CASE_ID=invalid-ioctls RESULT=pass
6665 16:35:07.240757 Allow for multiple opens:
6666 16:35:07.250090 <LAVA_SIGNAL_TESTSET STOP>
6667 16:35:07.250374 Received signal: <TESTSET> STOP
6668 16:35:07.250451 Closing test_set Required-ioctls
6669 16:35:07.260901 <LAVA_SIGNAL_TESTSET START Allow-for-multiple-opens>
6670 16:35:07.261170 Received signal: <TESTSET> START Allow-for-multiple-opens
6671 16:35:07.261246 Starting test_set Allow-for-multiple-opens
6672 16:35:07.264090 test second /dev/video2 open: OK
6673 16:35:07.292564 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=second-/dev/video2-open RESULT=pass>
6674 16:35:07.292865 Received signal: <TESTCASE> TEST_CASE_ID=second-/dev/video2-open RESULT=pass
6676 16:35:07.295482 test VIDIOC_QUERYCAP: OK
6677 16:35:07.329364 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass>
6678 16:35:07.329676 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCAP RESULT=pass
6680 16:35:07.332743 test VIDIOC_G/S_PRIORITY: OK
6681 16:35:07.357785 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_PRIORITY RESULT=pass>
6682 16:35:07.358081 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_PRIORITY RESULT=pass
6684 16:35:07.361082 test for unlimited opens: OK
6685 16:35:07.384413 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=for-unlimited-opens RESULT=pass>
6686 16:35:07.384543
6687 16:35:07.384796 Received signal: <TESTCASE> TEST_CASE_ID=for-unlimited-opens RESULT=pass
6689 16:35:07.396720 Debug ioctls:
6690 16:35:07.407198 <LAVA_SIGNAL_TESTSET STOP>
6691 16:35:07.407505 Received signal: <TESTSET> STOP
6692 16:35:07.407588 Closing test_set Allow-for-multiple-opens
6693 16:35:07.417625 <LAVA_SIGNAL_TESTSET START Debug-ioctls>
6694 16:35:07.417901 Received signal: <TESTSET> START Debug-ioctls
6695 16:35:07.417982 Starting test_set Debug-ioctls
6696 16:35:07.420830 test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
6697 16:35:07.448541 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_DBG_G/S_REGISTER RESULT=pass>
6698 16:35:07.448838 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_DBG_G/S_REGISTER RESULT=pass
6700 16:35:07.454899 test VIDIOC_LOG_STATUS: OK (Not Supported)
6701 16:35:07.478360 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_LOG_STATUS RESULT=pass>
6702 16:35:07.478503
6703 16:35:07.478760 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_LOG_STATUS RESULT=pass
6705 16:35:07.493998 Input ioctls:
6706 16:35:07.503576 <LAVA_SIGNAL_TESTSET STOP>
6707 16:35:07.503856 Received signal: <TESTSET> STOP
6708 16:35:07.503941 Closing test_set Debug-ioctls
6709 16:35:07.514609 <LAVA_SIGNAL_TESTSET START Input-ioctls>
6710 16:35:07.514882 Received signal: <TESTSET> START Input-ioctls
6711 16:35:07.514961 Starting test_set Input-ioctls
6712 16:35:07.521300 test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
6713 16:35:07.548517 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS RESULT=pass>
6714 16:35:07.548889 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS RESULT=pass
6716 16:35:07.551784 test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
6717 16:35:07.577108 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass>
6718 16:35:07.577427 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass
6720 16:35:07.583638 test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
6721 16:35:07.609590 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_S_HW_FREQ_SEEK RESULT=pass>
6722 16:35:07.609870 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_S_HW_FREQ_SEEK RESULT=pass
6724 16:35:07.615691 test VIDIOC_ENUMAUDIO: OK (Not Supported)
6725 16:35:07.639679 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUMAUDIO RESULT=pass>
6726 16:35:07.639996 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUMAUDIO RESULT=pass
6728 16:35:07.643119 test VIDIOC_G/S/ENUMINPUT: OK
6729 16:35:07.669546 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/ENUMINPUT RESULT=pass>
6730 16:35:07.669842 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/ENUMINPUT RESULT=pass
6732 16:35:07.675926 test VIDIOC_G/S_AUDIO: OK (Not Supported)
6733 16:35:07.700120 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_AUDIO RESULT=pass>
6734 16:35:07.700405 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_AUDIO RESULT=pass
6736 16:35:07.703274 Inputs: 1 Audio Inputs: 0 Tuners: 0
6737 16:35:07.714784
6738 16:35:07.737624 test VIDIOC_G/S_MODULATOR: OK (Not Supported)
6739 16:35:07.766558 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_MODULATOR RESULT=pass>
6740 16:35:07.766881 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_MODULATOR RESULT=pass
6742 16:35:07.773152 test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
6743 16:35:07.796078 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass>
6744 16:35:07.796445 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_FREQUENCY RESULT=pass
6746 16:35:07.802473 test VIDIOC_ENUMAUDOUT: OK (Not Supported)
6747 16:35:07.826905 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUMAUDOUT RESULT=pass>
6748 16:35:07.827256 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUMAUDOUT RESULT=pass
6750 16:35:07.833403 test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
6751 16:35:07.857935 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/ENUMOUTPUT RESULT=pass>
6752 16:35:07.858269 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/ENUMOUTPUT RESULT=pass
6754 16:35:07.864388 test VIDIOC_G/S_AUDOUT: OK (Not Supported)
6755 16:35:07.889556 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_AUDOUT RESULT=pass>
6756 16:35:07.889851 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_AUDOUT RESULT=pass
6758 16:35:07.893369
6759 16:35:07.917489 test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
6760 16:35:07.945538 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_STD RESULT=pass
6762 16:35:07.948614 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_STD RESULT=pass>
6763 16:35:07.951539 test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
6764 16:35:07.981297 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS RESULT=pass>
6765 16:35:07.981618 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS RESULT=pass
6767 16:35:07.984274 test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
6768 16:35:08.009633 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_DV_TIMINGS_CAP RESULT=pass>
6769 16:35:08.009959 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_DV_TIMINGS_CAP RESULT=pass
6771 16:35:08.016165 test VIDIOC_G/S_EDID: OK (Not Supported)
6772 16:35:08.041204 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_EDID RESULT=pass>
6773 16:35:08.041356
6774 16:35:08.041642 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_EDID RESULT=pass
6776 16:35:08.056769 Control ioctls (Input 0):
6777 16:35:08.066986 <LAVA_SIGNAL_TESTSET STOP>
6778 16:35:08.067321 Received signal: <TESTSET> STOP
6779 16:35:08.067434 Closing test_set Input-ioctls
6780 16:35:08.077915 <LAVA_SIGNAL_TESTSET START Control-ioctls-Input-0>
6781 16:35:08.078191 Received signal: <TESTSET> START Control-ioctls-Input-0
6782 16:35:08.078304 Starting test_set Control-ioctls-Input-0
6783 16:35:08.081022 test VIDIOC_QUERY_EXT_CTRL/QUERYMENU: OK
6784 16:35:08.111980 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERY_EXT_CTRL/QUERYMENU RESULT=pass>
6785 16:35:08.112134 test VIDIOC_QUERYCTRL: OK
6786 16:35:08.112448 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERY_EXT_CTRL/QUERYMENU RESULT=pass
6788 16:35:08.138042 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_QUERYCTRL RESULT=pass>
6789 16:35:08.138376 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_QUERYCTRL RESULT=pass
6791 16:35:08.141307 test VIDIOC_G/S_CTRL: OK
6792 16:35:08.168643 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_CTRL RESULT=pass>
6793 16:35:08.168977 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_CTRL RESULT=pass
6795 16:35:08.171735 test VIDIOC_G/S/TRY_EXT_CTRLS: OK
6796 16:35:08.197416 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S/TRY_EXT_CTRLS RESULT=pass>
6797 16:35:08.197731 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S/TRY_EXT_CTRLS RESULT=pass
6799 16:35:08.203823 test VIDIOC_(UN)SUBSCRIBE_EVENT/DQEVENT: OK
6800 16:35:08.228280 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT RESULT=pass>
6801 16:35:08.228605 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT RESULT=pass
6803 16:35:08.231691 test VIDIOC_G/S_JPEGCOMP: OK (Not Supported)
6804 16:35:08.256718 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_JPEGCOMP RESULT=pass>
6805 16:35:08.257011 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_JPEGCOMP RESULT=pass
6807 16:35:08.262978 Standard Controls: 15 Private Controls: 0
6808 16:35:08.271785
6809 16:35:08.289603 Format ioctls (Input 0):
6810 16:35:08.298115 <LAVA_SIGNAL_TESTSET STOP>
6811 16:35:08.298435 Received signal: <TESTSET> STOP
6812 16:35:08.298519 Closing test_set Control-ioctls-Input-0
6813 16:35:08.309427 <LAVA_SIGNAL_TESTSET START Format-ioctls-Input-0>
6814 16:35:08.309707 Received signal: <TESTSET> START Format-ioctls-Input-0
6815 16:35:08.309790 Starting test_set Format-ioctls-Input-0
6816 16:35:08.312552 test VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS: OK
6817 16:35:08.340849 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS RESULT=pass>
6818 16:35:08.341129 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS RESULT=pass
6820 16:35:08.343872 test VIDIOC_G/S_PARM: OK
6821 16:35:08.366314 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G/S_PARM RESULT=pass>
6822 16:35:08.366637 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G/S_PARM RESULT=pass
6824 16:35:08.369384 test VIDIOC_G_FBUF: OK (Not Supported)
6825 16:35:08.397650 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_FBUF RESULT=pass>
6826 16:35:08.397969 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_FBUF RESULT=pass
6828 16:35:08.400906 test VIDIOC_G_FMT: OK
6829 16:35:08.427408 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_FMT RESULT=pass>
6830 16:35:08.427688 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_FMT RESULT=pass
6832 16:35:08.430410 test VIDIOC_TRY_FMT: OK
6833 16:35:08.456588 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_FMT RESULT=pass>
6834 16:35:08.456909 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_FMT RESULT=pass
6836 16:35:08.463198 warn: v4l2-test-formats.cpp(1046): Could not set fmt2
6837 16:35:08.471206 test VIDIOC_S_FMT: OK
6838 16:35:08.500608 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_S_FMT RESULT=pass>
6839 16:35:08.500892 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_S_FMT RESULT=pass
6841 16:35:08.503852 test VIDIOC_G_SLICED_VBI_CAP: OK (Not Supported)
6842 16:35:08.533032 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_SLICED_VBI_CAP RESULT=pass>
6843 16:35:08.533348 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_SLICED_VBI_CAP RESULT=pass
6845 16:35:08.536211 test Cropping: OK (Not Supported)
6846 16:35:08.563806 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Cropping RESULT=pass>
6847 16:35:08.564121 Received signal: <TESTCASE> TEST_CASE_ID=Cropping RESULT=pass
6849 16:35:08.567297 test Composing: OK (Not Supported)
6850 16:35:08.592901 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Composing RESULT=pass>
6851 16:35:08.593202 Received signal: <TESTCASE> TEST_CASE_ID=Composing RESULT=pass
6853 16:35:08.596035 test Scaling: OK (Not Supported)
6854 16:35:08.621698 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Scaling RESULT=pass>
6855 16:35:08.621820
6856 16:35:08.622070 Received signal: <TESTCASE> TEST_CASE_ID=Scaling RESULT=pass
6858 16:35:08.635076 Codec ioctls (Input 0):
6859 16:35:08.643974 <LAVA_SIGNAL_TESTSET STOP>
6860 16:35:08.644246 Received signal: <TESTSET> STOP
6861 16:35:08.644322 Closing test_set Format-ioctls-Input-0
6862 16:35:08.654415 <LAVA_SIGNAL_TESTSET START Codec-ioctls-Input-0>
6863 16:35:08.654688 Received signal: <TESTSET> START Codec-ioctls-Input-0
6864 16:35:08.654766 Starting test_set Codec-ioctls-Input-0
6865 16:35:08.657587 test VIDIOC_(TRY_)ENCODER_CMD: OK (Not Supported)
6866 16:35:08.686757 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_ENCODER_CMD RESULT=pass>
6867 16:35:08.687075 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_ENCODER_CMD RESULT=pass
6869 16:35:08.693102 test VIDIOC_G_ENC_INDEX: OK (Not Supported)
6870 16:35:08.720630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_G_ENC_INDEX RESULT=pass>
6871 16:35:08.720945 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_G_ENC_INDEX RESULT=pass
6873 16:35:08.726751 test VIDIOC_(TRY_)DECODER_CMD: OK (Not Supported)
6874 16:35:08.750595 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_TRY_DECODER_CMD RESULT=pass>
6875 16:35:08.750742
6876 16:35:08.751004 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_TRY_DECODER_CMD RESULT=pass
6878 16:35:08.766389 Buffer ioctls (Input 0):
6879 16:35:08.777062 <LAVA_SIGNAL_TESTSET STOP>
6880 16:35:08.777412 Received signal: <TESTSET> STOP
6881 16:35:08.777509 Closing test_set Codec-ioctls-Input-0
6882 16:35:08.786439 <LAVA_SIGNAL_TESTSET START Buffer-ioctls-Input-0>
6883 16:35:08.786732 Received signal: <TESTSET> START Buffer-ioctls-Input-0
6884 16:35:08.786848 Starting test_set Buffer-ioctls-Input-0
6885 16:35:08.789477 test VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF: OK
6886 16:35:08.819999 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF RESULT=pass>
6887 16:35:08.820316 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF RESULT=pass
6889 16:35:08.823061 test CREATE_BUFS maximum buffers: OK
6890 16:35:08.850651 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=CREATE_BUFS-maximum-buffers RESULT=pass>
6891 16:35:08.850791 test VIDIOC_EXPBUF: OK
6892 16:35:08.851064 Received signal: <TESTCASE> TEST_CASE_ID=CREATE_BUFS-maximum-buffers RESULT=pass
6894 16:35:08.877799 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=VIDIOC_EXPBUF RESULT=pass>
6895 16:35:08.878102 Received signal: <TESTCASE> TEST_CASE_ID=VIDIOC_EXPBUF RESULT=pass
6897 16:35:08.881017 test Requests: OK (Not Supported)
6898 16:35:08.907767 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=Requests RESULT=pass>
6899 16:35:08.907901
6900 16:35:08.908156 Received signal: <TESTCASE> TEST_CASE_ID=Requests RESULT=pass
6902 16:35:08.922335 Test input 0:
6903 16:35:08.935125
6904 16:35:08.951064 Streaming ioctls:
6905 16:35:08.959840 <LAVA_SIGNAL_TESTSET STOP>
6906 16:35:08.960123 Received signal: <TESTSET> STOP
6907 16:35:08.960200 Closing test_set Buffer-ioctls-Input-0
6908 16:35:08.971613 <LAVA_SIGNAL_TESTSET START Streaming-ioctls_Test-input-0>
6909 16:35:08.971882 Received signal: <TESTSET> START Streaming-ioctls_Test-input-0
6910 16:35:08.971964 Starting test_set Streaming-ioctls_Test-input-0
6911 16:35:08.974906 test read/write: OK (Not Supported)
6912 16:35:09.002104 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=read/write RESULT=pass>
6913 16:35:09.002380 Received signal: <TESTCASE> TEST_CASE_ID=read/write RESULT=pass
6915 16:35:09.005340 test blocking wait: OK
6916 16:35:09.032523 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=blocking-wait RESULT=pass>
6917 16:35:09.032833 Received signal: <TESTCASE> TEST_CASE_ID=blocking-wait RESULT=pass
6919 16:35:09.039000 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6920 16:35:09.044813 test MMAP (no poll): FAIL
6921 16:35:09.074145 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-no-poll RESULT=fail>
6922 16:35:09.074460 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-no-poll RESULT=fail
6924 16:35:09.080917 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6925 16:35:09.091456 test MMAP (select): FAIL
6926 16:35:09.123802 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-select RESULT=fail>
6927 16:35:09.124113 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-select RESULT=fail
6929 16:35:09.130347 fail: v4l2-test-buffers.cpp(1377): node->streamon(q.g_type()) != EINVAL
6930 16:35:09.140741 test MMAP (epoll): FAIL
6931 16:35:09.171904 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=MMAP-epoll RESULT=fail>
6932 16:35:09.172038
6933 16:35:09.172292 Received signal: <TESTCASE> TEST_CASE_ID=MMAP-epoll RESULT=fail
6935 16:35:09.403850
6936 16:35:09.414176 test USERPTR (no poll): OK
6937 16:35:09.443442 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=USERPTR-no-poll RESULT=pass>
6938 16:35:09.443696
6939 16:35:09.444050 Received signal: <TESTCASE> TEST_CASE_ID=USERPTR-no-poll RESULT=pass
6941 16:35:09.680018
6942 16:35:09.690420 test USERPTR (select): OK
6943 16:35:09.719813 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=USERPTR-select RESULT=pass>
6944 16:35:09.720231 Received signal: <TESTCASE> TEST_CASE_ID=USERPTR-select RESULT=pass
6946 16:35:09.726031 test DMABUF: Cannot test, specify --expbuf-device
6947 16:35:09.733671
6948 16:35:09.754813 Total for uvcvideo device /dev/video2: 54, Succeeded: 51, Failed: 3, Warnings: 1
6949 16:35:09.761538 <LAVA_TEST_RUNNER EXIT>
6950 16:35:09.761906 ok: lava_test_shell seems to have completed
6951 16:35:09.762062 Marking unfinished test run as failed
6953 16:35:09.764764 CREATE_BUFS-maximum-buffers:
result: pass
set: Buffer-ioctls-Input-0
Composing:
result: pass
set: Format-ioctls-Input-0
Cropping:
result: pass
set: Format-ioctls-Input-0
MC-information-see-Media-Driver-Info-above:
result: pass
set: Required-ioctls
MMAP-epoll:
result: fail
set: Streaming-ioctls_Test-input-0
MMAP-no-poll:
result: fail
set: Streaming-ioctls_Test-input-0
MMAP-select:
result: fail
set: Streaming-ioctls_Test-input-0
Requests:
result: pass
set: Buffer-ioctls-Input-0
Scaling:
result: pass
set: Format-ioctls-Input-0
USERPTR-no-poll:
result: pass
set: Streaming-ioctls_Test-input-0
USERPTR-select:
result: pass
set: Streaming-ioctls_Test-input-0
VIDIOC_DBG_G/S_REGISTER:
result: pass
set: Debug-ioctls
VIDIOC_DV_TIMINGS_CAP:
result: pass
set: Input-ioctls
VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS:
result: pass
set: Input-ioctls
VIDIOC_ENUM/G/S/QUERY_STD:
result: pass
set: Input-ioctls
VIDIOC_ENUMAUDIO:
result: pass
set: Input-ioctls
VIDIOC_ENUMAUDOUT:
result: pass
set: Input-ioctls
VIDIOC_ENUM_FMT/FRAMESIZES/FRAMEINTERVALS:
result: pass
set: Format-ioctls-Input-0
VIDIOC_EXPBUF:
result: pass
set: Buffer-ioctls-Input-0
VIDIOC_G/S/ENUMINPUT:
result: pass
set: Input-ioctls
VIDIOC_G/S/ENUMOUTPUT:
result: pass
set: Input-ioctls
VIDIOC_G/S/TRY_EXT_CTRLS:
result: pass
set: Control-ioctls-Input-0
VIDIOC_G/S_AUDIO:
result: pass
set: Input-ioctls
VIDIOC_G/S_AUDOUT:
result: pass
set: Input-ioctls
VIDIOC_G/S_CTRL:
result: pass
set: Control-ioctls-Input-0
VIDIOC_G/S_EDID:
result: pass
set: Input-ioctls
VIDIOC_G/S_FREQUENCY:
result: pass
set: Input-ioctls
VIDIOC_G/S_JPEGCOMP:
result: pass
set: Control-ioctls-Input-0
VIDIOC_G/S_MODULATOR:
result: pass
set: Input-ioctls
VIDIOC_G/S_PARM:
result: pass
set: Format-ioctls-Input-0
VIDIOC_G/S_PRIORITY:
result: pass
set: Allow-for-multiple-opens
VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS:
result: pass
set: Input-ioctls
VIDIOC_G_ENC_INDEX:
result: pass
set: Codec-ioctls-Input-0
VIDIOC_G_FBUF:
result: pass
set: Format-ioctls-Input-0
VIDIOC_G_FMT:
result: pass
set: Format-ioctls-Input-0
VIDIOC_G_SLICED_VBI_CAP:
result: pass
set: Format-ioctls-Input-0
VIDIOC_LOG_STATUS:
result: pass
set: Debug-ioctls
VIDIOC_QUERYCAP:
result: pass
set: Allow-for-multiple-opens
VIDIOC_QUERYCTRL:
result: pass
set: Control-ioctls-Input-0
VIDIOC_QUERY_EXT_CTRL/QUERYMENU:
result: pass
set: Control-ioctls-Input-0
VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF:
result: pass
set: Buffer-ioctls-Input-0
VIDIOC_S_FMT:
result: pass
set: Format-ioctls-Input-0
VIDIOC_S_HW_FREQ_SEEK:
result: pass
set: Input-ioctls
VIDIOC_TRY_DECODER_CMD:
result: pass
set: Codec-ioctls-Input-0
VIDIOC_TRY_ENCODER_CMD:
result: pass
set: Codec-ioctls-Input-0
VIDIOC_TRY_FMT:
result: pass
set: Format-ioctls-Input-0
VIDIOC_UNSUBSCRIBE_EVENT/DQEVENT:
result: pass
set: Control-ioctls-Input-0
blocking-wait:
result: pass
set: Streaming-ioctls_Test-input-0
device-presence: pass
for-unlimited-opens:
result: pass
set: Allow-for-multiple-opens
invalid-ioctls:
result: pass
set: Required-ioctls
read/write:
result: pass
set: Streaming-ioctls_Test-input-0
second-/dev/video2-open:
result: pass
set: Allow-for-multiple-opens
6954 16:35:09.764948 end: 3.1 lava-test-shell (duration 00:00:11) [common]
6955 16:35:09.765085 end: 3 lava-test-retry (duration 00:00:11) [common]
6956 16:35:09.765222 start: 4 finalize (timeout 00:08:07) [common]
6957 16:35:09.765357 start: 4.1 power-off (timeout 00:00:30) [common]
6958 16:35:09.765710 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2', '--port=1', '--command=off']
6959 16:35:10.821924 >> Command sent successfully.
6960 16:35:10.825116 Returned 0 in 1 seconds
6961 16:35:10.925566 end: 4.1 power-off (duration 00:00:01) [common]
6963 16:35:10.925929 start: 4.2 read-feedback (timeout 00:08:06) [common]
6964 16:35:10.926216 Listened to connection for namespace 'common' for up to 1s
6965 16:35:11.927130 Finalising connection for namespace 'common'
6966 16:35:11.927324 Disconnecting from shell: Finalise
6967 16:35:11.927415 / #
6968 16:35:12.027739 end: 4.2 read-feedback (duration 00:00:01) [common]
6969 16:35:12.027927 end: 4 finalize (duration 00:00:02) [common]
6970 16:35:12.028063 Cleaning after the job
6971 16:35:12.028172 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396128/tftp-deploy-myoln7kc/ramdisk
6972 16:35:12.032888 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396128/tftp-deploy-myoln7kc/kernel
6973 16:35:12.046776 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396128/tftp-deploy-myoln7kc/dtb
6974 16:35:12.046993 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14396128/tftp-deploy-myoln7kc/modules
6975 16:35:12.052888 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/14396128
6976 16:35:12.120787 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/14396128
6977 16:35:12.120974 Job finished correctly