Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 51
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 87
1 11:31:25.708406 lava-dispatcher, installed at version: 2024.05
2 11:31:25.708633 start: 0 validate
3 11:31:25.708757 Start time: 2024-07-17 11:31:25.708751+00:00 (UTC)
4 11:31:25.708907 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:31:25.709064 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 11:31:26.013280 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:31:26.013459 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.96-cip24-23-gd25f4b93e0db9%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 11:31:26.277812 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:31:26.278609 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.96-cip24-23-gd25f4b93e0db9%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 11:32:15.046327 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:32:15.046917 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.96-cip24-23-gd25f4b93e0db9%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
12 11:32:15.565821 validate duration: 49.86
14 11:32:15.566898 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:32:15.567367 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:32:15.567776 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:32:15.568406 Not decompressing ramdisk as can be used compressed.
18 11:32:15.568849 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 11:32:15.569157 saving as /var/lib/lava/dispatcher/tmp/14864581/tftp-deploy-nu8198jc/ramdisk/rootfs.cpio.gz
20 11:32:15.569455 total size: 47897469 (45 MB)
21 11:32:18.023065 progress 0 % (0 MB)
22 11:32:18.067411 progress 5 % (2 MB)
23 11:32:18.084023 progress 10 % (4 MB)
24 11:32:18.097074 progress 15 % (6 MB)
25 11:32:18.110045 progress 20 % (9 MB)
26 11:32:18.122811 progress 25 % (11 MB)
27 11:32:18.135647 progress 30 % (13 MB)
28 11:32:18.148572 progress 35 % (16 MB)
29 11:32:18.161511 progress 40 % (18 MB)
30 11:32:18.174674 progress 45 % (20 MB)
31 11:32:18.187730 progress 50 % (22 MB)
32 11:32:18.201011 progress 55 % (25 MB)
33 11:32:18.214176 progress 60 % (27 MB)
34 11:32:18.227200 progress 65 % (29 MB)
35 11:32:18.240336 progress 70 % (32 MB)
36 11:32:18.253350 progress 75 % (34 MB)
37 11:32:18.266328 progress 80 % (36 MB)
38 11:32:18.279317 progress 85 % (38 MB)
39 11:32:18.292670 progress 90 % (41 MB)
40 11:32:18.305754 progress 95 % (43 MB)
41 11:32:18.318676 progress 100 % (45 MB)
42 11:32:18.318916 45 MB downloaded in 2.75 s (16.61 MB/s)
43 11:32:18.319082 end: 1.1.1 http-download (duration 00:00:03) [common]
45 11:32:18.319327 end: 1.1 download-retry (duration 00:00:03) [common]
46 11:32:18.319416 start: 1.2 download-retry (timeout 00:09:57) [common]
47 11:32:18.319500 start: 1.2.1 http-download (timeout 00:09:57) [common]
48 11:32:18.319645 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
49 11:32:18.319714 saving as /var/lib/lava/dispatcher/tmp/14864581/tftp-deploy-nu8198jc/kernel/Image
50 11:32:18.319773 total size: 54813184 (52 MB)
51 11:32:18.319833 No compression specified
52 11:32:18.320984 progress 0 % (0 MB)
53 11:32:18.335876 progress 5 % (2 MB)
54 11:32:18.350545 progress 10 % (5 MB)
55 11:32:18.364992 progress 15 % (7 MB)
56 11:32:18.379986 progress 20 % (10 MB)
57 11:32:18.394911 progress 25 % (13 MB)
58 11:32:18.411289 progress 30 % (15 MB)
59 11:32:18.426623 progress 35 % (18 MB)
60 11:32:18.442209 progress 40 % (20 MB)
61 11:32:18.457670 progress 45 % (23 MB)
62 11:32:18.473136 progress 50 % (26 MB)
63 11:32:18.487831 progress 55 % (28 MB)
64 11:32:18.502410 progress 60 % (31 MB)
65 11:32:18.517242 progress 65 % (34 MB)
66 11:32:18.532153 progress 70 % (36 MB)
67 11:32:18.546877 progress 75 % (39 MB)
68 11:32:18.561748 progress 80 % (41 MB)
69 11:32:18.576414 progress 85 % (44 MB)
70 11:32:18.591166 progress 90 % (47 MB)
71 11:32:18.606100 progress 95 % (49 MB)
72 11:32:18.620497 progress 100 % (52 MB)
73 11:32:18.620749 52 MB downloaded in 0.30 s (173.68 MB/s)
74 11:32:18.620917 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:32:18.621151 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:32:18.621240 start: 1.3 download-retry (timeout 00:09:57) [common]
78 11:32:18.621324 start: 1.3.1 http-download (timeout 00:09:57) [common]
79 11:32:18.621469 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 11:32:18.621542 saving as /var/lib/lava/dispatcher/tmp/14864581/tftp-deploy-nu8198jc/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 11:32:18.621602 total size: 57695 (0 MB)
82 11:32:18.621660 No compression specified
83 11:32:18.622792 progress 56 % (0 MB)
84 11:32:18.623075 progress 100 % (0 MB)
85 11:32:18.623283 0 MB downloaded in 0.00 s (32.79 MB/s)
86 11:32:18.623408 end: 1.3.1 http-download (duration 00:00:00) [common]
88 11:32:18.623631 end: 1.3 download-retry (duration 00:00:00) [common]
89 11:32:18.623714 start: 1.4 download-retry (timeout 00:09:57) [common]
90 11:32:18.623796 start: 1.4.1 http-download (timeout 00:09:57) [common]
91 11:32:18.623912 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
92 11:32:18.623980 saving as /var/lib/lava/dispatcher/tmp/14864581/tftp-deploy-nu8198jc/modules/modules.tar
93 11:32:18.624039 total size: 8610184 (8 MB)
94 11:32:18.624098 Using unxz to decompress xz
95 11:32:18.625590 progress 0 % (0 MB)
96 11:32:18.647809 progress 5 % (0 MB)
97 11:32:18.674572 progress 10 % (0 MB)
98 11:32:18.701092 progress 15 % (1 MB)
99 11:32:18.727410 progress 20 % (1 MB)
100 11:32:18.752992 progress 25 % (2 MB)
101 11:32:18.778516 progress 30 % (2 MB)
102 11:32:18.803068 progress 35 % (2 MB)
103 11:32:18.831535 progress 40 % (3 MB)
104 11:32:18.857939 progress 45 % (3 MB)
105 11:32:18.884109 progress 50 % (4 MB)
106 11:32:18.910990 progress 55 % (4 MB)
107 11:32:18.937090 progress 60 % (4 MB)
108 11:32:18.962174 progress 65 % (5 MB)
109 11:32:18.989516 progress 70 % (5 MB)
110 11:32:19.018718 progress 75 % (6 MB)
111 11:32:19.048119 progress 80 % (6 MB)
112 11:32:19.073610 progress 85 % (7 MB)
113 11:32:19.098693 progress 90 % (7 MB)
114 11:32:19.123924 progress 95 % (7 MB)
115 11:32:19.148376 progress 100 % (8 MB)
116 11:32:19.154342 8 MB downloaded in 0.53 s (15.48 MB/s)
117 11:32:19.154539 end: 1.4.1 http-download (duration 00:00:01) [common]
119 11:32:19.154805 end: 1.4 download-retry (duration 00:00:01) [common]
120 11:32:19.154910 start: 1.5 prepare-tftp-overlay (timeout 00:09:56) [common]
121 11:32:19.155013 start: 1.5.1 extract-nfsrootfs (timeout 00:09:56) [common]
122 11:32:19.155133 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 11:32:19.155254 start: 1.5.2 lava-overlay (timeout 00:09:56) [common]
124 11:32:19.155479 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som
125 11:32:19.155625 makedir: /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin
126 11:32:19.155766 makedir: /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/tests
127 11:32:19.155882 makedir: /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/results
128 11:32:19.155991 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-add-keys
129 11:32:19.156177 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-add-sources
130 11:32:19.156349 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-background-process-start
131 11:32:19.156531 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-background-process-stop
132 11:32:19.156713 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-common-functions
133 11:32:19.156884 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-echo-ipv4
134 11:32:19.157053 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-install-packages
135 11:32:19.157221 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-installed-packages
136 11:32:19.157390 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-os-build
137 11:32:19.157556 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-probe-channel
138 11:32:19.157721 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-probe-ip
139 11:32:19.157888 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-target-ip
140 11:32:19.158054 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-target-mac
141 11:32:19.158219 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-target-storage
142 11:32:19.158390 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-test-case
143 11:32:19.158557 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-test-event
144 11:32:19.158722 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-test-feedback
145 11:32:19.158888 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-test-raise
146 11:32:19.159052 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-test-reference
147 11:32:19.159218 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-test-runner
148 11:32:19.159384 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-test-set
149 11:32:19.159550 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-test-shell
150 11:32:19.159722 Updating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-install-packages (oe)
151 11:32:19.159918 Updating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/bin/lava-installed-packages (oe)
152 11:32:19.160068 Creating /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/environment
153 11:32:19.160184 LAVA metadata
154 11:32:19.160264 - LAVA_JOB_ID=14864581
155 11:32:19.160367 - LAVA_DISPATCHER_IP=192.168.201.1
156 11:32:19.160524 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:56) [common]
157 11:32:19.160618 skipped lava-vland-overlay
158 11:32:19.160738 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 11:32:19.160874 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:56) [common]
160 11:32:19.160969 skipped lava-multinode-overlay
161 11:32:19.161086 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 11:32:19.161180 start: 1.5.2.3 test-definition (timeout 00:09:56) [common]
163 11:32:19.161288 Loading test definitions
164 11:32:19.161417 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:56) [common]
165 11:32:19.161517 Using /lava-14864581 at stage 0
166 11:32:19.161964 uuid=14864581_1.5.2.3.1 testdef=None
167 11:32:19.162088 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 11:32:19.162216 start: 1.5.2.3.2 test-overlay (timeout 00:09:56) [common]
169 11:32:19.162897 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 11:32:19.163270 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:56) [common]
172 11:32:19.164178 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 11:32:19.164577 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:56) [common]
175 11:32:19.165472 runner path: /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/0/tests/0_igt-gpu-panfrost test_uuid 14864581_1.5.2.3.1
176 11:32:19.165677 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 11:32:19.166037 Creating lava-test-runner.conf files
179 11:32:19.166138 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14864581/lava-overlay-5bsc6som/lava-14864581/0 for stage 0
180 11:32:19.166274 - 0_igt-gpu-panfrost
181 11:32:19.166413 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 11:32:19.166535 start: 1.5.2.4 compress-overlay (timeout 00:09:56) [common]
183 11:32:19.173983 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 11:32:19.174107 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:56) [common]
185 11:32:19.174211 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 11:32:19.174315 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 11:32:19.174415 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:56) [common]
188 11:32:20.887629 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:02) [common]
189 11:32:20.887797 start: 1.5.4 extract-modules (timeout 00:09:55) [common]
190 11:32:20.887917 extracting modules file /var/lib/lava/dispatcher/tmp/14864581/tftp-deploy-nu8198jc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14864581/extract-overlay-ramdisk-fl5_8_w6/ramdisk
191 11:32:21.147169 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 11:32:21.147327 start: 1.5.5 apply-overlay-tftp (timeout 00:09:54) [common]
193 11:32:21.147434 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14864581/compress-overlay-evawn8ep/overlay-1.5.2.4.tar.gz to ramdisk
194 11:32:21.147511 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14864581/compress-overlay-evawn8ep/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14864581/extract-overlay-ramdisk-fl5_8_w6/ramdisk
195 11:32:21.154587 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 11:32:21.154704 start: 1.5.6 configure-preseed-file (timeout 00:09:54) [common]
197 11:32:21.154810 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 11:32:21.154917 start: 1.5.7 compress-ramdisk (timeout 00:09:54) [common]
199 11:32:21.154998 Building ramdisk /var/lib/lava/dispatcher/tmp/14864581/extract-overlay-ramdisk-fl5_8_w6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14864581/extract-overlay-ramdisk-fl5_8_w6/ramdisk
200 11:32:22.290173 >> 465549 blocks
201 11:32:29.480495 rename /var/lib/lava/dispatcher/tmp/14864581/extract-overlay-ramdisk-fl5_8_w6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14864581/tftp-deploy-nu8198jc/ramdisk/ramdisk.cpio.gz
202 11:32:29.480767 end: 1.5.7 compress-ramdisk (duration 00:00:08) [common]
203 11:32:29.480934 start: 1.5.8 prepare-kernel (timeout 00:09:46) [common]
204 11:32:29.481087 start: 1.5.8.1 prepare-fit (timeout 00:09:46) [common]
205 11:32:29.481237 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14864581/tftp-deploy-nu8198jc/kernel/Image']
206 11:32:44.619930 Returned 0 in 15 seconds
207 11:32:44.620108 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14864581/tftp-deploy-nu8198jc/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14864581/tftp-deploy-nu8198jc/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14864581/tftp-deploy-nu8198jc/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14864581/tftp-deploy-nu8198jc/kernel/image.itb
208 11:32:45.520930 output: FIT description: Kernel Image image with one or more FDT blobs
209 11:32:45.521094 output: Created: Wed Jul 17 12:32:45 2024
210 11:32:45.521193 output: Image 0 (kernel-1)
211 11:32:45.521284 output: Description:
212 11:32:45.521372 output: Created: Wed Jul 17 12:32:45 2024
213 11:32:45.521460 output: Type: Kernel Image
214 11:32:45.521545 output: Compression: lzma compressed
215 11:32:45.521633 output: Data Size: 13118294 Bytes = 12810.83 KiB = 12.51 MiB
216 11:32:45.521719 output: Architecture: AArch64
217 11:32:45.521803 output: OS: Linux
218 11:32:45.521887 output: Load Address: 0x00000000
219 11:32:45.521973 output: Entry Point: 0x00000000
220 11:32:45.522062 output: Hash algo: crc32
221 11:32:45.522158 output: Hash value: 83448d17
222 11:32:45.522260 output: Image 1 (fdt-1)
223 11:32:45.522348 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 11:32:45.522432 output: Created: Wed Jul 17 12:32:45 2024
225 11:32:45.522516 output: Type: Flat Device Tree
226 11:32:45.522600 output: Compression: uncompressed
227 11:32:45.522683 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 11:32:45.522768 output: Architecture: AArch64
229 11:32:45.522852 output: Hash algo: crc32
230 11:32:45.522935 output: Hash value: a9713552
231 11:32:45.523018 output: Image 2 (ramdisk-1)
232 11:32:45.523101 output: Description: unavailable
233 11:32:45.523185 output: Created: Wed Jul 17 12:32:45 2024
234 11:32:45.523268 output: Type: RAMDisk Image
235 11:32:45.523352 output: Compression: uncompressed
236 11:32:45.523436 output: Data Size: 60994070 Bytes = 59564.52 KiB = 58.17 MiB
237 11:32:45.523520 output: Architecture: AArch64
238 11:32:45.523603 output: OS: Linux
239 11:32:45.523686 output: Load Address: unavailable
240 11:32:45.523769 output: Entry Point: unavailable
241 11:32:45.523852 output: Hash algo: crc32
242 11:32:45.523935 output: Hash value: 1b187d17
243 11:32:45.524018 output: Default Configuration: 'conf-1'
244 11:32:45.524101 output: Configuration 0 (conf-1)
245 11:32:45.524184 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 11:32:45.524267 output: Kernel: kernel-1
247 11:32:45.524350 output: Init Ramdisk: ramdisk-1
248 11:32:45.524434 output: FDT: fdt-1
249 11:32:45.524515 output: Loadables: kernel-1
250 11:32:45.524570 output:
251 11:32:45.524687 end: 1.5.8.1 prepare-fit (duration 00:00:16) [common]
252 11:32:45.524771 end: 1.5.8 prepare-kernel (duration 00:00:16) [common]
253 11:32:45.524853 end: 1.5 prepare-tftp-overlay (duration 00:00:26) [common]
254 11:32:45.524937 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:30) [common]
255 11:32:45.525001 No LXC device requested
256 11:32:45.525080 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 11:32:45.525159 start: 1.7 deploy-device-env (timeout 00:09:30) [common]
258 11:32:45.525235 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 11:32:45.525296 Checking files for TFTP limit of 4294967296 bytes.
260 11:32:45.525711 end: 1 tftp-deploy (duration 00:00:30) [common]
261 11:32:45.525810 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 11:32:45.525897 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 11:32:45.525993 substitutions:
264 11:32:45.526060 - {DTB}: 14864581/tftp-deploy-nu8198jc/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 11:32:45.526123 - {INITRD}: 14864581/tftp-deploy-nu8198jc/ramdisk/ramdisk.cpio.gz
266 11:32:45.526181 - {KERNEL}: 14864581/tftp-deploy-nu8198jc/kernel/Image
267 11:32:45.526237 - {LAVA_MAC}: None
268 11:32:45.526297 - {PRESEED_CONFIG}: None
269 11:32:45.526352 - {PRESEED_LOCAL}: None
270 11:32:45.526409 - {RAMDISK}: 14864581/tftp-deploy-nu8198jc/ramdisk/ramdisk.cpio.gz
271 11:32:45.526511 - {ROOT_PART}: None
272 11:32:45.526595 - {ROOT}: None
273 11:32:45.526662 - {SERVER_IP}: 192.168.201.1
274 11:32:45.526717 - {TEE}: None
275 11:32:45.526772 Parsed boot commands:
276 11:32:45.526826 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 11:32:45.527081 Parsed boot commands: tftpboot 192.168.201.1 14864581/tftp-deploy-nu8198jc/kernel/image.itb 14864581/tftp-deploy-nu8198jc/kernel/cmdline
278 11:32:45.527200 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 11:32:45.527290 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 11:32:45.527375 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 11:32:45.527456 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 11:32:45.527519 Not connected, no need to disconnect.
283 11:32:45.527593 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 11:32:45.527673 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 11:32:45.527736 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-0'
286 11:32:45.531196 Setting prompt string to ['lava-test: # ']
287 11:32:45.531674 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 11:32:45.531827 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 11:32:45.531959 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 11:32:45.532080 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 11:32:45.532421 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=reboot']
292 11:32:54.651150 >> Command sent successfully.
293 11:32:54.654681 Returned 0 in 9 seconds
294 11:32:54.654844 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
296 11:32:54.655081 end: 2.2.2 reset-device (duration 00:00:09) [common]
297 11:32:54.655178 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
298 11:32:54.655255 Setting prompt string to 'Starting depthcharge on Juniper...'
299 11:32:54.655336 Changing prompt to 'Starting depthcharge on Juniper...'
300 11:32:54.655410 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
301 11:32:54.655775 [Enter `^Ec?' for help]
302 11:33:01.907291 [DL] 00000000 00000000 010701
303 11:33:01.911929
304 11:33:01.912261
305 11:33:01.912561 F0: 102B 0000
306 11:33:01.912823
307 11:33:01.913055 F3: 1006 0033 [0200]
308 11:33:01.915243
309 11:33:01.915569 F3: 4001 00E0 [0200]
310 11:33:01.915827
311 11:33:01.916064 F3: 0000 0000
312 11:33:01.918988
313 11:33:01.919314 V0: 0000 0000 [0001]
314 11:33:01.919569
315 11:33:01.919802 00: 1027 0002
316 11:33:01.920036
317 11:33:01.922072 01: 0000 0000
318 11:33:01.922404
319 11:33:01.922661 BP: 0C00 0251 [0000]
320 11:33:01.922946
321 11:33:01.925266 G0: 1182 0000
322 11:33:01.925593
323 11:33:01.925848 EC: 0004 0000 [0001]
324 11:33:01.926083
325 11:33:01.929205 S7: 0000 0000 [0000]
326 11:33:01.929542
327 11:33:01.932348 CC: 0000 0000 [0001]
328 11:33:01.932705
329 11:33:01.932965 T0: 0000 00DB [000F]
330 11:33:01.933202
331 11:33:01.933427 Jump to BL
332 11:33:01.933649
333 11:33:01.967787
334 11:33:01.968116
335 11:33:01.974607 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
336 11:33:01.978235 ARM64: Exception handlers installed.
337 11:33:01.981882 ARM64: Testing exception
338 11:33:01.984775 ARM64: Done test exception
339 11:33:01.989257 WDT: Last reset was cold boot
340 11:33:01.989585 SPI0(PAD0) initialized at 992727 Hz
341 11:33:01.992527 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
342 11:33:01.996309 Manufacturer: ef
343 11:33:02.002760 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
344 11:33:02.014857 Probing TPM: . done!
345 11:33:02.015183 TPM ready after 0 ms
346 11:33:02.021759 Connected to device vid:did:rid of 1ae0:0028:00
347 11:33:02.028129 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
348 11:33:02.063896 Initialized TPM device CR50 revision 0
349 11:33:02.075947 tlcl_send_startup: Startup return code is 0
350 11:33:02.076284 TPM: setup succeeded
351 11:33:02.084952 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
352 11:33:02.088425 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
353 11:33:02.091961 in-header: 03 19 00 00 08 00 00 00
354 11:33:02.095374 in-data: a2 e0 47 00 13 00 00 00
355 11:33:02.098521 Chrome EC: UHEPI supported
356 11:33:02.104997 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
357 11:33:02.108276 in-header: 03 a1 00 00 08 00 00 00
358 11:33:02.111957 in-data: 84 60 60 10 00 00 00 00
359 11:33:02.112293 Phase 1
360 11:33:02.115176 FMAP: area GBB found @ 3f5000 (12032 bytes)
361 11:33:02.121773 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
362 11:33:02.128307 VB2:vb2_check_recovery() Recovery was requested manually
363 11:33:02.131993 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
364 11:33:02.138032 Recovery requested (1009000e)
365 11:33:02.143991 tlcl_extend: response is 0
366 11:33:02.152144 tlcl_extend: response is 0
367 11:33:02.177060
368 11:33:02.177386
369 11:33:02.183618 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
370 11:33:02.186940 ARM64: Exception handlers installed.
371 11:33:02.190287 ARM64: Testing exception
372 11:33:02.193386 ARM64: Done test exception
373 11:33:02.209559 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xc268, sec=0x2000
374 11:33:02.216116 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
375 11:33:02.219127 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
376 11:33:02.227416 [RTC]rtc_get_frequency_meter,134: input=0xf, output=919
377 11:33:02.234305 [RTC]rtc_get_frequency_meter,134: input=0x7, output=780
378 11:33:02.241404 [RTC]rtc_get_frequency_meter,134: input=0xb, output=848
379 11:33:02.248349 [RTC]rtc_get_frequency_meter,134: input=0x9, output=815
380 11:33:02.254912 [RTC]rtc_get_frequency_meter,134: input=0x8, output=797
381 11:33:02.261884 [RTC]rtc_get_frequency_meter,134: input=0x7, output=780
382 11:33:02.268665 [RTC]rtc_get_frequency_meter,134: input=0x8, output=796
383 11:33:02.272215 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xc268
384 11:33:02.278749 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
385 11:33:02.282276 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
386 11:33:02.285511 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
387 11:33:02.288840 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
388 11:33:02.292447 in-header: 03 19 00 00 08 00 00 00
389 11:33:02.295651 in-data: a2 e0 47 00 13 00 00 00
390 11:33:02.298908 Chrome EC: UHEPI supported
391 11:33:02.306008 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
392 11:33:02.309370 in-header: 03 a1 00 00 08 00 00 00
393 11:33:02.312936 in-data: 84 60 60 10 00 00 00 00
394 11:33:02.315737 Skip loading cached calibration data
395 11:33:02.322933 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
396 11:33:02.326109 in-header: 03 a1 00 00 08 00 00 00
397 11:33:02.329194 in-data: 84 60 60 10 00 00 00 00
398 11:33:02.336169 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
399 11:33:02.339452 in-header: 03 a1 00 00 08 00 00 00
400 11:33:02.342656 in-data: 84 60 60 10 00 00 00 00
401 11:33:02.343146 ADC[3]: Raw value=215860 ID=1
402 11:33:02.345843 Manufacturer: ef
403 11:33:02.352928 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
404 11:33:02.356033 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
405 11:33:02.359352 CBFS @ 21000 size 3d4000
406 11:33:02.362686 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
407 11:33:02.366369 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
408 11:33:02.370058 CBFS: Found @ offset 3c700 size 44
409 11:33:02.373262 DRAM-K: Full Calibration
410 11:33:02.376732 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
411 11:33:02.380221 CBFS @ 21000 size 3d4000
412 11:33:02.386687 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
413 11:33:02.389680 CBFS: Locating 'fallback/dram'
414 11:33:02.393189 CBFS: Found @ offset 24b00 size 12268
415 11:33:02.419828 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
416 11:33:02.423025 ddr_geometry: 1, config: 0x0
417 11:33:02.427252 header.status = 0x0
418 11:33:02.429664 header.magic = 0x44524d4b (expected: 0x44524d4b)
419 11:33:02.433210 header.version = 0x5 (expected: 0x5)
420 11:33:02.436641 header.size = 0x8f0 (expected: 0x8f0)
421 11:33:02.437084 header.config = 0x0
422 11:33:02.439686 header.flags = 0x0
423 11:33:02.443155 header.checksum = 0x0
424 11:33:02.446828 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
425 11:33:02.453137 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
426 11:33:02.456497 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
427 11:33:02.459778 ddr_geometry:1
428 11:33:02.463081 [EMI] new MDL number = 1
429 11:33:02.463532 dram_cbt_mode_extern: 0
430 11:33:02.466571 dram_cbt_mode [RK0]: 0, [RK1]: 0
431 11:33:02.472940 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
432 11:33:02.473394
433 11:33:02.473817
434 11:33:02.476518 [Bianco] ETT version 0.0.0.1
435 11:33:02.479606 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
436 11:33:02.479914
437 11:33:02.483174 vSetVcoreByFreq with vcore:762500, freq=1600
438 11:33:02.483412
439 11:33:02.486145 [DramcInit]
440 11:33:02.486382 AutoRefreshCKEOff AutoREF OFF
441 11:33:02.489685 DDRPhyPLLSetting-CKEOFF
442 11:33:02.493134 DDRPhyPLLSetting-CKEON
443 11:33:02.493295
444 11:33:02.493451 Enable WDQS
445 11:33:02.496788 [ModeRegInit_LP4] CH0 RK0
446 11:33:02.500571 Write Rank0 MR13 =0x18
447 11:33:02.500710 Write Rank0 MR12 =0x5d
448 11:33:02.503826 Write Rank0 MR1 =0x56
449 11:33:02.506781 Write Rank0 MR2 =0x1a
450 11:33:02.506904 Write Rank0 MR11 =0x0
451 11:33:02.510289 Write Rank0 MR22 =0x38
452 11:33:02.510405 Write Rank0 MR14 =0x5d
453 11:33:02.513566 Write Rank0 MR3 =0x30
454 11:33:02.517246 Write Rank0 MR13 =0x58
455 11:33:02.517330 Write Rank0 MR12 =0x5d
456 11:33:02.520106 Write Rank0 MR1 =0x56
457 11:33:02.520190 Write Rank0 MR2 =0x2d
458 11:33:02.523744 Write Rank0 MR11 =0x23
459 11:33:02.527231 Write Rank0 MR22 =0x34
460 11:33:02.527315 Write Rank0 MR14 =0x10
461 11:33:02.530336 Write Rank0 MR3 =0x30
462 11:33:02.534033 Write Rank0 MR13 =0xd8
463 11:33:02.534133 [ModeRegInit_LP4] CH0 RK1
464 11:33:02.537414 Write Rank1 MR13 =0x18
465 11:33:02.537498 Write Rank1 MR12 =0x5d
466 11:33:02.540661 Write Rank1 MR1 =0x56
467 11:33:02.544054 Write Rank1 MR2 =0x1a
468 11:33:02.544141 Write Rank1 MR11 =0x0
469 11:33:02.547117 Write Rank1 MR22 =0x38
470 11:33:02.547200 Write Rank1 MR14 =0x5d
471 11:33:02.550593 Write Rank1 MR3 =0x30
472 11:33:02.554056 Write Rank1 MR13 =0x58
473 11:33:02.554155 Write Rank1 MR12 =0x5d
474 11:33:02.557216 Write Rank1 MR1 =0x56
475 11:33:02.557329 Write Rank1 MR2 =0x2d
476 11:33:02.560582 Write Rank1 MR11 =0x23
477 11:33:02.563724 Write Rank1 MR22 =0x34
478 11:33:02.563841 Write Rank1 MR14 =0x10
479 11:33:02.566895 Write Rank1 MR3 =0x30
480 11:33:02.570778 Write Rank1 MR13 =0xd8
481 11:33:02.570911 [ModeRegInit_LP4] CH1 RK0
482 11:33:02.574424 Write Rank0 MR13 =0x18
483 11:33:02.574575 Write Rank0 MR12 =0x5d
484 11:33:02.577326 Write Rank0 MR1 =0x56
485 11:33:02.580493 Write Rank0 MR2 =0x1a
486 11:33:02.580666 Write Rank0 MR11 =0x0
487 11:33:02.583841 Write Rank0 MR22 =0x38
488 11:33:02.584045 Write Rank0 MR14 =0x5d
489 11:33:02.587181 Write Rank0 MR3 =0x30
490 11:33:02.590642 Write Rank0 MR13 =0x58
491 11:33:02.590895 Write Rank0 MR12 =0x5d
492 11:33:02.594054 Write Rank0 MR1 =0x56
493 11:33:02.597875 Write Rank0 MR2 =0x2d
494 11:33:02.598225 Write Rank0 MR11 =0x23
495 11:33:02.601131 Write Rank0 MR22 =0x34
496 11:33:02.601478 Write Rank0 MR14 =0x10
497 11:33:02.604258 Write Rank0 MR3 =0x30
498 11:33:02.607703 Write Rank0 MR13 =0xd8
499 11:33:02.608053 [ModeRegInit_LP4] CH1 RK1
500 11:33:02.611038 Write Rank1 MR13 =0x18
501 11:33:02.611384 Write Rank1 MR12 =0x5d
502 11:33:02.614379 Write Rank1 MR1 =0x56
503 11:33:02.617498 Write Rank1 MR2 =0x1a
504 11:33:02.617851 Write Rank1 MR11 =0x0
505 11:33:02.621026 Write Rank1 MR22 =0x38
506 11:33:02.624433 Write Rank1 MR14 =0x5d
507 11:33:02.624810 Write Rank1 MR3 =0x30
508 11:33:02.627736 Write Rank1 MR13 =0x58
509 11:33:02.628085 Write Rank1 MR12 =0x5d
510 11:33:02.631285 Write Rank1 MR1 =0x56
511 11:33:02.634384 Write Rank1 MR2 =0x2d
512 11:33:02.634734 Write Rank1 MR11 =0x23
513 11:33:02.637782 Write Rank1 MR22 =0x34
514 11:33:02.638132 Write Rank1 MR14 =0x10
515 11:33:02.641030 Write Rank1 MR3 =0x30
516 11:33:02.644567 Write Rank1 MR13 =0xd8
517 11:33:02.644970 match AC timing 3
518 11:33:02.654497 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
519 11:33:02.655000 [MiockJmeterHQA]
520 11:33:02.660820 vSetVcoreByFreq with vcore:762500, freq=1600
521 11:33:02.764816
522 11:33:02.764960 MIOCK jitter meter ch=0
523 11:33:02.765028
524 11:33:02.767964 1T = (102-17) = 85 dly cells
525 11:33:02.774701 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
526 11:33:02.778341 vSetVcoreByFreq with vcore:725000, freq=1200
527 11:33:02.877223
528 11:33:02.877362 MIOCK jitter meter ch=0
529 11:33:02.877431
530 11:33:02.880435 1T = (96-16) = 80 dly cells
531 11:33:02.888256 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
532 11:33:02.891915 vSetVcoreByFreq with vcore:725000, freq=800
533 11:33:02.989612
534 11:33:02.989749 MIOCK jitter meter ch=0
535 11:33:02.989814
536 11:33:02.993222 1T = (96-16) = 80 dly cells
537 11:33:02.999812 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
538 11:33:03.003108 vSetVcoreByFreq with vcore:762500, freq=1600
539 11:33:03.006516 vSetVcoreByFreq with vcore:762500, freq=1600
540 11:33:03.006601
541 11:33:03.006667 K DRVP
542 11:33:03.010209 1. OCD DRVP=0 CALOUT=0
543 11:33:03.013430 1. OCD DRVP=1 CALOUT=0
544 11:33:03.013515 1. OCD DRVP=2 CALOUT=0
545 11:33:03.016793 1. OCD DRVP=3 CALOUT=0
546 11:33:03.016879 1. OCD DRVP=4 CALOUT=0
547 11:33:03.019996 1. OCD DRVP=5 CALOUT=0
548 11:33:03.023293 1. OCD DRVP=6 CALOUT=0
549 11:33:03.023379 1. OCD DRVP=7 CALOUT=0
550 11:33:03.026476 1. OCD DRVP=8 CALOUT=0
551 11:33:03.029713 1. OCD DRVP=9 CALOUT=1
552 11:33:03.029798
553 11:33:03.029863 1. OCD DRVP calibration OK! DRVP=9
554 11:33:03.033114
555 11:33:03.033197
556 11:33:03.033261
557 11:33:03.033321 K ODTN
558 11:33:03.036405 3. OCD ODTN=0 ,CALOUT=1
559 11:33:03.036498 3. OCD ODTN=1 ,CALOUT=1
560 11:33:03.040079 3. OCD ODTN=2 ,CALOUT=1
561 11:33:03.040163 3. OCD ODTN=3 ,CALOUT=1
562 11:33:03.042959 3. OCD ODTN=4 ,CALOUT=1
563 11:33:03.046358 3. OCD ODTN=5 ,CALOUT=1
564 11:33:03.046450 3. OCD ODTN=6 ,CALOUT=1
565 11:33:03.049990 3. OCD ODTN=7 ,CALOUT=0
566 11:33:03.050083
567 11:33:03.053270 3. OCD ODTN calibration OK! ODTN=7
568 11:33:03.053364
569 11:33:03.056392 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
570 11:33:03.059961 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
571 11:33:03.066636 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
572 11:33:03.066732
573 11:33:03.066803 K DRVP
574 11:33:03.070175 1. OCD DRVP=0 CALOUT=0
575 11:33:03.070266 1. OCD DRVP=1 CALOUT=0
576 11:33:03.073515 1. OCD DRVP=2 CALOUT=0
577 11:33:03.076740 1. OCD DRVP=3 CALOUT=0
578 11:33:03.076836 1. OCD DRVP=4 CALOUT=0
579 11:33:03.080445 1. OCD DRVP=5 CALOUT=0
580 11:33:03.080552 1. OCD DRVP=6 CALOUT=0
581 11:33:03.083329 1. OCD DRVP=7 CALOUT=0
582 11:33:03.087199 1. OCD DRVP=8 CALOUT=0
583 11:33:03.087324 1. OCD DRVP=9 CALOUT=0
584 11:33:03.090464 1. OCD DRVP=10 CALOUT=0
585 11:33:03.093690 1. OCD DRVP=11 CALOUT=1
586 11:33:03.093810
587 11:33:03.093901 1. OCD DRVP calibration OK! DRVP=11
588 11:33:03.097034
589 11:33:03.097152
590 11:33:03.097243
591 11:33:03.097326 K ODTN
592 11:33:03.100355 3. OCD ODTN=0 ,CALOUT=1
593 11:33:03.100519 3. OCD ODTN=1 ,CALOUT=1
594 11:33:03.103610 3. OCD ODTN=2 ,CALOUT=1
595 11:33:03.103730 3. OCD ODTN=3 ,CALOUT=1
596 11:33:03.106868 3. OCD ODTN=4 ,CALOUT=1
597 11:33:03.110358 3. OCD ODTN=5 ,CALOUT=1
598 11:33:03.110479 3. OCD ODTN=6 ,CALOUT=1
599 11:33:03.113574 3. OCD ODTN=7 ,CALOUT=1
600 11:33:03.117397 3. OCD ODTN=8 ,CALOUT=1
601 11:33:03.117499 3. OCD ODTN=9 ,CALOUT=1
602 11:33:03.120405 3. OCD ODTN=10 ,CALOUT=1
603 11:33:03.123608 3. OCD ODTN=11 ,CALOUT=1
604 11:33:03.123695 3. OCD ODTN=12 ,CALOUT=1
605 11:33:03.126987 3. OCD ODTN=13 ,CALOUT=1
606 11:33:03.130690 3. OCD ODTN=14 ,CALOUT=1
607 11:33:03.130778 3. OCD ODTN=15 ,CALOUT=0
608 11:33:03.130845
609 11:33:03.133942 3. OCD ODTN calibration OK! ODTN=15
610 11:33:03.134027
611 11:33:03.140342 [SwImpedanceCal] DRVP=11, DRVN=9, ODTN=15
612 11:33:03.143547 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15
613 11:33:03.147143 term_option=1, Reg: DRVP=11, DRVN=9, ODTN=15 (After Adjust)
614 11:33:03.147228
615 11:33:03.150604 [DramcInit]
616 11:33:03.150688 AutoRefreshCKEOff AutoREF OFF
617 11:33:03.153863 DDRPhyPLLSetting-CKEOFF
618 11:33:03.157140 DDRPhyPLLSetting-CKEON
619 11:33:03.157223
620 11:33:03.157289 Enable WDQS
621 11:33:03.157349 ==
622 11:33:03.163600 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
623 11:33:03.167236 fsp= 1, odt_onoff= 1, Byte mode= 0
624 11:33:03.167322 ==
625 11:33:03.167389 [Duty_Offset_Calibration]
626 11:33:03.170579
627 11:33:03.170663 ===========================
628 11:33:03.173582 B0:1 B1:1 CA:1
629 11:33:03.192757 ==
630 11:33:03.196255 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
631 11:33:03.199269 fsp= 1, odt_onoff= 1, Byte mode= 0
632 11:33:03.199354 ==
633 11:33:03.202515 [Duty_Offset_Calibration]
634 11:33:03.202599
635 11:33:03.205844 ===========================
636 11:33:03.205928 B0:1 B1:0 CA:2
637 11:33:03.239164 [ModeRegInit_LP4] CH0 RK0
638 11:33:03.242505 Write Rank0 MR13 =0x18
639 11:33:03.242592 Write Rank0 MR12 =0x5d
640 11:33:03.245687 Write Rank0 MR1 =0x56
641 11:33:03.248975 Write Rank0 MR2 =0x1a
642 11:33:03.249093 Write Rank0 MR11 =0x0
643 11:33:03.252365 Write Rank0 MR22 =0x38
644 11:33:03.252493 Write Rank0 MR14 =0x5d
645 11:33:03.255901 Write Rank0 MR3 =0x30
646 11:33:03.259099 Write Rank0 MR13 =0x58
647 11:33:03.259214 Write Rank0 MR12 =0x5d
648 11:33:03.262760 Write Rank0 MR1 =0x56
649 11:33:03.262879 Write Rank0 MR2 =0x2d
650 11:33:03.265940 Write Rank0 MR11 =0x23
651 11:33:03.269644 Write Rank0 MR22 =0x34
652 11:33:03.269770 Write Rank0 MR14 =0x10
653 11:33:03.272516 Write Rank0 MR3 =0x30
654 11:33:03.276016 Write Rank0 MR13 =0xd8
655 11:33:03.276149 [ModeRegInit_LP4] CH0 RK1
656 11:33:03.279190 Write Rank1 MR13 =0x18
657 11:33:03.279298 Write Rank1 MR12 =0x5d
658 11:33:03.282832 Write Rank1 MR1 =0x56
659 11:33:03.286148 Write Rank1 MR2 =0x1a
660 11:33:03.286265 Write Rank1 MR11 =0x0
661 11:33:03.289481 Write Rank1 MR22 =0x38
662 11:33:03.289613 Write Rank1 MR14 =0x5d
663 11:33:03.292797 Write Rank1 MR3 =0x30
664 11:33:03.296030 Write Rank1 MR13 =0x58
665 11:33:03.296226 Write Rank1 MR12 =0x5d
666 11:33:03.299276 Write Rank1 MR1 =0x56
667 11:33:03.299479 Write Rank1 MR2 =0x2d
668 11:33:03.302758 Write Rank1 MR11 =0x23
669 11:33:03.306139 Write Rank1 MR22 =0x34
670 11:33:03.306343 Write Rank1 MR14 =0x10
671 11:33:03.309598 Write Rank1 MR3 =0x30
672 11:33:03.313378 Write Rank1 MR13 =0xd8
673 11:33:03.313706 [ModeRegInit_LP4] CH1 RK0
674 11:33:03.316801 Write Rank0 MR13 =0x18
675 11:33:03.317123 Write Rank0 MR12 =0x5d
676 11:33:03.320193 Write Rank0 MR1 =0x56
677 11:33:03.323277 Write Rank0 MR2 =0x1a
678 11:33:03.323659 Write Rank0 MR11 =0x0
679 11:33:03.326496 Write Rank0 MR22 =0x38
680 11:33:03.326876 Write Rank0 MR14 =0x5d
681 11:33:03.330147 Write Rank0 MR3 =0x30
682 11:33:03.333183 Write Rank0 MR13 =0x58
683 11:33:03.333568 Write Rank0 MR12 =0x5d
684 11:33:03.336607 Write Rank0 MR1 =0x56
685 11:33:03.336988 Write Rank0 MR2 =0x2d
686 11:33:03.339838 Write Rank0 MR11 =0x23
687 11:33:03.343661 Write Rank0 MR22 =0x34
688 11:33:03.344042 Write Rank0 MR14 =0x10
689 11:33:03.346688 Write Rank0 MR3 =0x30
690 11:33:03.350219 Write Rank0 MR13 =0xd8
691 11:33:03.350600 [ModeRegInit_LP4] CH1 RK1
692 11:33:03.353447 Write Rank1 MR13 =0x18
693 11:33:03.353829 Write Rank1 MR12 =0x5d
694 11:33:03.356591 Write Rank1 MR1 =0x56
695 11:33:03.360132 Write Rank1 MR2 =0x1a
696 11:33:03.360537 Write Rank1 MR11 =0x0
697 11:33:03.363207 Write Rank1 MR22 =0x38
698 11:33:03.366992 Write Rank1 MR14 =0x5d
699 11:33:03.367370 Write Rank1 MR3 =0x30
700 11:33:03.370125 Write Rank1 MR13 =0x58
701 11:33:03.370509 Write Rank1 MR12 =0x5d
702 11:33:03.373479 Write Rank1 MR1 =0x56
703 11:33:03.376920 Write Rank1 MR2 =0x2d
704 11:33:03.377358 Write Rank1 MR11 =0x23
705 11:33:03.380034 Write Rank1 MR22 =0x34
706 11:33:03.380415 Write Rank1 MR14 =0x10
707 11:33:03.383506 Write Rank1 MR3 =0x30
708 11:33:03.387211 Write Rank1 MR13 =0xd8
709 11:33:03.387612 match AC timing 3
710 11:33:03.396889 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
711 11:33:03.397274 DramC Write-DBI off
712 11:33:03.400068 DramC Read-DBI off
713 11:33:03.403362 Write Rank0 MR13 =0x59
714 11:33:03.403745 ==
715 11:33:03.407123 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
716 11:33:03.410282 fsp= 1, odt_onoff= 1, Byte mode= 0
717 11:33:03.410665 ==
718 11:33:03.413404 === u2Vref_new: 0x56 --> 0x2d
719 11:33:03.416736 === u2Vref_new: 0x58 --> 0x38
720 11:33:03.420596 === u2Vref_new: 0x5a --> 0x39
721 11:33:03.424034 === u2Vref_new: 0x5c --> 0x3c
722 11:33:03.426937 === u2Vref_new: 0x5e --> 0x3d
723 11:33:03.430220 === u2Vref_new: 0x60 --> 0xa0
724 11:33:03.433822 [CA 0] Center 34 (6~63) winsize 58
725 11:33:03.436984 [CA 1] Center 36 (9~63) winsize 55
726 11:33:03.440347 [CA 2] Center 29 (0~59) winsize 60
727 11:33:03.440759 [CA 3] Center 25 (-2~52) winsize 55
728 11:33:03.443693 [CA 4] Center 25 (-3~54) winsize 58
729 11:33:03.447224 [CA 5] Center 30 (0~60) winsize 61
730 11:33:03.447601
731 11:33:03.450490 [CATrainingPosCal] consider 1 rank data
732 11:33:03.454388 u2DelayCellTimex100 = 735/100 ps
733 11:33:03.457361 CA0 delay=34 (6~63),Diff = 9 PI (11 cell)
734 11:33:03.463855 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
735 11:33:03.467338 CA2 delay=29 (0~59),Diff = 4 PI (5 cell)
736 11:33:03.470894 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
737 11:33:03.474029 CA4 delay=25 (-3~54),Diff = 0 PI (0 cell)
738 11:33:03.477400 CA5 delay=30 (0~60),Diff = 5 PI (6 cell)
739 11:33:03.477896
740 11:33:03.480632 CA PerBit enable=1, Macro0, CA PI delay=25
741 11:33:03.483673 === u2Vref_new: 0x60 --> 0xa0
742 11:33:03.484160
743 11:33:03.487458 Vref(ca) range 1: 32
744 11:33:03.487944
745 11:33:03.488388 CS Dly= 9 (40-0-32)
746 11:33:03.490419 Write Rank0 MR13 =0xd8
747 11:33:03.490906 Write Rank0 MR13 =0xd8
748 11:33:03.493619 Write Rank0 MR12 =0x60
749 11:33:03.497051 Write Rank1 MR13 =0x59
750 11:33:03.497427 ==
751 11:33:03.500547 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
752 11:33:03.503976 fsp= 1, odt_onoff= 1, Byte mode= 0
753 11:33:03.504393 ==
754 11:33:03.507176 === u2Vref_new: 0x56 --> 0x2d
755 11:33:03.510322 === u2Vref_new: 0x58 --> 0x38
756 11:33:03.514005 === u2Vref_new: 0x5a --> 0x39
757 11:33:03.517260 === u2Vref_new: 0x5c --> 0x3c
758 11:33:03.520543 === u2Vref_new: 0x5e --> 0x3d
759 11:33:03.523745 === u2Vref_new: 0x60 --> 0xa0
760 11:33:03.527200 [CA 0] Center 36 (9~63) winsize 55
761 11:33:03.530341 [CA 1] Center 36 (9~63) winsize 55
762 11:33:03.533764 [CA 2] Center 31 (2~60) winsize 59
763 11:33:03.537195 [CA 3] Center 25 (-3~53) winsize 57
764 11:33:03.537718 [CA 4] Center 26 (-2~54) winsize 57
765 11:33:03.540918 [CA 5] Center 31 (2~61) winsize 60
766 11:33:03.541429
767 11:33:03.544146 [CATrainingPosCal] consider 2 rank data
768 11:33:03.547383 u2DelayCellTimex100 = 735/100 ps
769 11:33:03.550649 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
770 11:33:03.557614 CA1 delay=36 (9~63),Diff = 11 PI (14 cell)
771 11:33:03.561116 CA2 delay=30 (2~59),Diff = 5 PI (6 cell)
772 11:33:03.564070 CA3 delay=25 (-2~52),Diff = 0 PI (0 cell)
773 11:33:03.567347 CA4 delay=26 (-2~54),Diff = 1 PI (1 cell)
774 11:33:03.571262 CA5 delay=31 (2~60),Diff = 6 PI (7 cell)
775 11:33:03.571772
776 11:33:03.574485 CA PerBit enable=1, Macro0, CA PI delay=25
777 11:33:03.577542 === u2Vref_new: 0x5c --> 0x3c
778 11:33:03.578034
779 11:33:03.580870 Vref(ca) range 1: 28
780 11:33:03.581359
781 11:33:03.581816 CS Dly= 7 (38-0-32)
782 11:33:03.584113 Write Rank1 MR13 =0xd8
783 11:33:03.584624 Write Rank1 MR13 =0xd8
784 11:33:03.587586 Write Rank1 MR12 =0x5c
785 11:33:03.590655 [RankSwap] Rank num 2, (Multi 1), Rank 0
786 11:33:03.594136 Write Rank0 MR2 =0xad
787 11:33:03.594637 [Write Leveling]
788 11:33:03.597301 delay byte0 byte1 byte2 byte3
789 11:33:03.597794
790 11:33:03.600986 10 0 0
791 11:33:03.601488 11 0 0
792 11:33:03.601945 12 0 0
793 11:33:03.603951 13 0 0
794 11:33:03.604448 14 0 0
795 11:33:03.607607 15 0 0
796 11:33:03.608112 16 0 0
797 11:33:03.610745 17 0 0
798 11:33:03.611229 18 0 0
799 11:33:03.611689 19 0 0
800 11:33:03.614283 20 0 0
801 11:33:03.614784 21 0 0
802 11:33:03.617586 22 0 0
803 11:33:03.618116 23 0 0
804 11:33:03.618608 24 0 ff
805 11:33:03.620990 25 0 ff
806 11:33:03.621503 26 0 ff
807 11:33:03.624358 27 0 ff
808 11:33:03.624905 28 0 ff
809 11:33:03.627798 29 0 ff
810 11:33:03.628301 30 0 ff
811 11:33:03.628794 31 0 ff
812 11:33:03.631058 32 0 ff
813 11:33:03.631564 33 ff ff
814 11:33:03.634169 34 ff ff
815 11:33:03.634676 35 ff ff
816 11:33:03.637668 36 ff ff
817 11:33:03.638058 37 ff ff
818 11:33:03.641230 38 ff ff
819 11:33:03.641619 39 ff ff
820 11:33:03.644311 pass bytecount = 0xff (0xff: all bytes pass)
821 11:33:03.644743
822 11:33:03.647503 DQS0 dly: 33
823 11:33:03.648049 DQS1 dly: 24
824 11:33:03.650921 Write Rank0 MR2 =0x2d
825 11:33:03.654076 [RankSwap] Rank num 2, (Multi 1), Rank 0
826 11:33:03.654461 Write Rank0 MR1 =0xd6
827 11:33:03.657899 [Gating]
828 11:33:03.658443 ==
829 11:33:03.660980 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
830 11:33:03.664629 fsp= 1, odt_onoff= 1, Byte mode= 0
831 11:33:03.665119 ==
832 11:33:03.671054 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
833 11:33:03.674472 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
834 11:33:03.677713 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
835 11:33:03.681008 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
836 11:33:03.687560 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
837 11:33:03.691015 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
838 11:33:03.694573 3 1 24 |2c2c 3534 |(11 0)(11 11) |(0 0)(0 1)| 0
839 11:33:03.701234 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
840 11:33:03.704498 3 2 0 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
841 11:33:03.707692 3 2 4 |3534 403 |(11 11)(11 11) |(0 0)(1 1)| 0
842 11:33:03.714664 3 2 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
843 11:33:03.717888 3 2 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
844 11:33:03.720942 3 2 16 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
845 11:33:03.724305 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
846 11:33:03.730936 3 2 24 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
847 11:33:03.734434 3 2 28 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
848 11:33:03.737558 3 3 0 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
849 11:33:03.744931 3 3 4 |3534 1515 |(11 11)(11 11) |(0 0)(1 1)| 0
850 11:33:03.747649 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
851 11:33:03.751083 [Byte 1] Lead/lag falling Transition (3, 3, 8)
852 11:33:03.758042 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
853 11:33:03.761207 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
854 11:33:03.764898 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
855 11:33:03.768036 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
856 11:33:03.774672 3 3 28 |1211 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
857 11:33:03.778415 3 4 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
858 11:33:03.781579 3 4 4 |3d3d 3636 |(11 11)(11 11) |(1 1)(1 1)| 0
859 11:33:03.788218 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 11:33:03.791514 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 11:33:03.794667 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 11:33:03.801690 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 11:33:03.805085 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 11:33:03.808688 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 11:33:03.811535 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 11:33:03.818225 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 11:33:03.821956 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 11:33:03.825361 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
869 11:33:03.831867 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
870 11:33:03.835206 [Byte 0] Lead/lag falling Transition (3, 5, 16)
871 11:33:03.838745 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
872 11:33:03.841788 [Byte 0] Lead/lag Transition tap number (2)
873 11:33:03.848539 3 5 24 |3a3a 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
874 11:33:03.852414 [Byte 1] Lead/lag falling Transition (3, 5, 24)
875 11:33:03.855709 3 5 28 |1616 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
876 11:33:03.858986 [Byte 1] Lead/lag Transition tap number (2)
877 11:33:03.865570 3 6 0 |4646 1e1e |(0 0)(11 11) |(0 0)(0 0)| 0
878 11:33:03.865975 [Byte 0]First pass (3, 6, 0)
879 11:33:03.872307 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
880 11:33:03.875886 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 11:33:03.879111 [Byte 1]First pass (3, 6, 8)
882 11:33:03.882356 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 11:33:03.885605 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 11:33:03.889059 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 11:33:03.892276 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 11:33:03.899188 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 11:33:03.902624 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
888 11:33:03.905843 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
889 11:33:03.909061 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
890 11:33:03.912324 All bytes gating window > 1UI, Early break!
891 11:33:03.912738
892 11:33:03.916013 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
893 11:33:03.916396
894 11:33:03.922440 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
895 11:33:03.922824
896 11:33:03.923125
897 11:33:03.923396
898 11:33:03.925685 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
899 11:33:03.926069
900 11:33:03.929264 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
901 11:33:03.929651
902 11:33:03.929947
903 11:33:03.932212 Write Rank0 MR1 =0x56
904 11:33:03.932625
905 11:33:03.935910 best RODT dly(2T, 0.5T) = (2, 2)
906 11:33:03.936288
907 11:33:03.939008 best RODT dly(2T, 0.5T) = (2, 2)
908 11:33:03.939388 ==
909 11:33:03.942357 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
910 11:33:03.945574 fsp= 1, odt_onoff= 1, Byte mode= 0
911 11:33:03.945959 ==
912 11:33:03.952575 Start DQ dly to find pass range UseTestEngine =0
913 11:33:03.955847 x-axis: bit #, y-axis: DQ dly (-127~63)
914 11:33:03.956233 RX Vref Scan = 0
915 11:33:03.959408 -26, [0] xxxxxxxx xxxxxxxx [MSB]
916 11:33:03.962292 -25, [0] xxxxxxxx xxxxxxxx [MSB]
917 11:33:03.965761 -24, [0] xxxxxxxx xxxxxxxx [MSB]
918 11:33:03.969015 -23, [0] xxxxxxxx xxxxxxxx [MSB]
919 11:33:03.969408 -22, [0] xxxxxxxx xxxxxxxx [MSB]
920 11:33:03.972348 -21, [0] xxxxxxxx xxxxxxxx [MSB]
921 11:33:03.976188 -20, [0] xxxxxxxx xxxxxxxx [MSB]
922 11:33:03.979429 -19, [0] xxxxxxxx xxxxxxxx [MSB]
923 11:33:03.982442 -18, [0] xxxxxxxx xxxxxxxx [MSB]
924 11:33:03.986346 -17, [0] xxxxxxxx xxxxxxxx [MSB]
925 11:33:03.989516 -16, [0] xxxxxxxx xxxxxxxx [MSB]
926 11:33:03.992525 -15, [0] xxxxxxxx xxxxxxxx [MSB]
927 11:33:03.992919 -14, [0] xxxxxxxx xxxxxxxx [MSB]
928 11:33:03.996165 -13, [0] xxxxxxxx xxxxxxxx [MSB]
929 11:33:03.999326 -12, [0] xxxxxxxx xxxxxxxx [MSB]
930 11:33:04.002660 -11, [0] xxxxxxxx xxxxxxxx [MSB]
931 11:33:04.005915 -10, [0] xxxxxxxx xxxxxxxx [MSB]
932 11:33:04.009634 -9, [0] xxxxxxxx xxxxxxxx [MSB]
933 11:33:04.012960 -8, [0] xxxxxxxx xxxxxxxx [MSB]
934 11:33:04.013347 -7, [0] xxxxxxxx xxxxxxxx [MSB]
935 11:33:04.015937 -6, [0] xxxxxxxx xxxxxxxx [MSB]
936 11:33:04.019582 -5, [0] xxxxxxxx xxxxxxxx [MSB]
937 11:33:04.022834 -4, [0] xxxxxxxx xxxxxxxx [MSB]
938 11:33:04.026135 -3, [0] xxxxxxxx oxxxxxxx [MSB]
939 11:33:04.029358 -2, [0] xxxoxxxx oxxxxxxx [MSB]
940 11:33:04.032792 -1, [0] xxxoxxxx ooxxxxxx [MSB]
941 11:33:04.033202 0, [0] xxxoxoxx ooxoxxxx [MSB]
942 11:33:04.036161 1, [0] xxxoxoox ooxoooxx [MSB]
943 11:33:04.039721 2, [0] xxxoxoox ooxoooxx [MSB]
944 11:33:04.042905 3, [0] xxxoxooo ooxoooox [MSB]
945 11:33:04.046158 4, [0] xxxoxooo ooxoooox [MSB]
946 11:33:04.049393 5, [0] xooooooo ooxooooo [MSB]
947 11:33:04.049787 6, [0] oooooooo ooxooooo [MSB]
948 11:33:04.052945 7, [0] oooooooo ooxooooo [MSB]
949 11:33:04.056135 32, [0] oooxoooo oooooooo [MSB]
950 11:33:04.059397 33, [0] oooxoooo xooooooo [MSB]
951 11:33:04.063123 34, [0] oooxoooo xooooooo [MSB]
952 11:33:04.066286 35, [0] oooxoooo xooooooo [MSB]
953 11:33:04.066676 36, [0] oooxoxoo xooxoooo [MSB]
954 11:33:04.069609 37, [0] oooxoxxx xxoxoooo [MSB]
955 11:33:04.073063 38, [0] oooxoxxx xxoxxoxo [MSB]
956 11:33:04.076098 39, [0] oooxoxxx xxoxxxxo [MSB]
957 11:33:04.079967 40, [0] oooxxxxx xxoxxxxo [MSB]
958 11:33:04.083427 41, [0] xxoxxxxx xxoxxxxo [MSB]
959 11:33:04.086187 42, [0] xxxxxxxx xxoxxxxx [MSB]
960 11:33:04.086571 43, [0] xxxxxxxx xxoxxxxx [MSB]
961 11:33:04.090103 44, [0] xxxxxxxx xxxxxxxx [MSB]
962 11:33:04.093477 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
963 11:33:04.096485 iDelay=44, Bit 1, Center 22 (5 ~ 40) 36
964 11:33:04.099852 iDelay=44, Bit 2, Center 23 (5 ~ 41) 37
965 11:33:04.103218 iDelay=44, Bit 3, Center 14 (-2 ~ 31) 34
966 11:33:04.106566 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
967 11:33:04.113215 iDelay=44, Bit 5, Center 17 (0 ~ 35) 36
968 11:33:04.116555 iDelay=44, Bit 6, Center 18 (1 ~ 36) 36
969 11:33:04.119825 iDelay=44, Bit 7, Center 19 (3 ~ 36) 34
970 11:33:04.123082 iDelay=44, Bit 8, Center 14 (-3 ~ 32) 36
971 11:33:04.126731 iDelay=44, Bit 9, Center 17 (-1 ~ 36) 38
972 11:33:04.130257 iDelay=44, Bit 10, Center 25 (8 ~ 43) 36
973 11:33:04.133326 iDelay=44, Bit 11, Center 17 (0 ~ 35) 36
974 11:33:04.136871 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
975 11:33:04.140220 iDelay=44, Bit 13, Center 19 (1 ~ 38) 38
976 11:33:04.143507 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
977 11:33:04.146764 iDelay=44, Bit 15, Center 23 (5 ~ 41) 37
978 11:33:04.147150 ==
979 11:33:04.153230 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
980 11:33:04.156791 fsp= 1, odt_onoff= 1, Byte mode= 0
981 11:33:04.157175 ==
982 11:33:04.157472 DQS Delay:
983 11:33:04.160135 DQS0 = 0, DQS1 = 0
984 11:33:04.160553 DQM Delay:
985 11:33:04.163294 DQM0 = 19, DQM1 = 19
986 11:33:04.163673 DQ Delay:
987 11:33:04.166661 DQ0 =23, DQ1 =22, DQ2 =23, DQ3 =14
988 11:33:04.169946 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =19
989 11:33:04.173848 DQ8 =14, DQ9 =17, DQ10 =25, DQ11 =17
990 11:33:04.177126 DQ12 =19, DQ13 =19, DQ14 =20, DQ15 =23
991 11:33:04.177505
992 11:33:04.177802
993 11:33:04.178076 DramC Write-DBI off
994 11:33:04.178341 ==
995 11:33:04.183853 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
996 11:33:04.186673 fsp= 1, odt_onoff= 1, Byte mode= 0
997 11:33:04.187056 ==
998 11:33:04.190266 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
999 11:33:04.190647
1000 11:33:04.193708 Begin, DQ Scan Range 920~1176
1001 11:33:04.194087
1002 11:33:04.194382
1003 11:33:04.196869 TX Vref Scan disable
1004 11:33:04.199945 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1005 11:33:04.203657 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1006 11:33:04.206952 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1007 11:33:04.210056 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1008 11:33:04.213807 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1009 11:33:04.217054 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1010 11:33:04.220316 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1011 11:33:04.223417 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1012 11:33:04.227158 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1013 11:33:04.230494 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1014 11:33:04.234014 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1015 11:33:04.240227 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1016 11:33:04.243627 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1017 11:33:04.247032 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1018 11:33:04.250350 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1019 11:33:04.253400 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1020 11:33:04.257596 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1021 11:33:04.260715 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1022 11:33:04.263822 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1023 11:33:04.267239 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1024 11:33:04.270599 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1025 11:33:04.273399 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1026 11:33:04.276929 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1027 11:33:04.280149 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1028 11:33:04.283437 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1029 11:33:04.286715 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1030 11:33:04.290360 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1031 11:33:04.293299 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1032 11:33:04.300285 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1033 11:33:04.303363 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1034 11:33:04.306934 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1035 11:33:04.310020 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1036 11:33:04.313323 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1037 11:33:04.317311 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1038 11:33:04.320546 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1039 11:33:04.323919 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1040 11:33:04.326821 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1041 11:33:04.330578 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1042 11:33:04.333927 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1043 11:33:04.336893 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1044 11:33:04.340528 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1045 11:33:04.343708 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1046 11:33:04.346971 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1047 11:33:04.350783 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1048 11:33:04.353928 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1049 11:33:04.357022 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1050 11:33:04.360666 966 |3 6 6|[0] xxxxxxxx oxxxxxxx [MSB]
1051 11:33:04.364009 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1052 11:33:04.367215 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1053 11:33:04.370625 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1054 11:33:04.373722 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1055 11:33:04.380624 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
1056 11:33:04.384130 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
1057 11:33:04.386983 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
1058 11:33:04.390846 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1059 11:33:04.393952 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1060 11:33:04.397543 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1061 11:33:04.400709 977 |3 6 17|[0] xooooooo oooooooo [MSB]
1062 11:33:04.404004 985 |3 6 25|[0] oooooooo xooooooo [MSB]
1063 11:33:04.407503 986 |3 6 26|[0] oooooooo xooooooo [MSB]
1064 11:33:04.410780 987 |3 6 27|[0] oooooooo xxxxxxxx [MSB]
1065 11:33:04.413718 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1066 11:33:04.417327 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1067 11:33:04.424127 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1068 11:33:04.427574 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1069 11:33:04.430975 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1070 11:33:04.434254 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1071 11:33:04.438008 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1072 11:33:04.441238 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1073 11:33:04.444434 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1074 11:33:04.447658 997 |3 6 37|[0] oooxoxxx xxxxxxxx [MSB]
1075 11:33:04.450921 998 |3 6 38|[0] oooxxxxx xxxxxxxx [MSB]
1076 11:33:04.454512 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1077 11:33:04.457744 Byte0, DQ PI dly=986, DQM PI dly= 986
1078 11:33:04.461181 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
1079 11:33:04.461562
1080 11:33:04.467489 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
1081 11:33:04.467875
1082 11:33:04.470749 Byte1, DQ PI dly=976, DQM PI dly= 976
1083 11:33:04.474132 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1084 11:33:04.474512
1085 11:33:04.477641 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1086 11:33:04.478161
1087 11:33:04.481103 ==
1088 11:33:04.484379 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1089 11:33:04.487507 fsp= 1, odt_onoff= 1, Byte mode= 0
1090 11:33:04.487888 ==
1091 11:33:04.490673 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1092 11:33:04.491054
1093 11:33:04.494511 Begin, DQ Scan Range 952~1016
1094 11:33:04.497551 Write Rank0 MR14 =0x0
1095 11:33:04.505222
1096 11:33:04.505601 CH=0, VrefRange= 0, VrefLevel = 0
1097 11:33:04.511743 TX Bit0 (979~994) 16 986, Bit8 (967~977) 11 972,
1098 11:33:04.515411 TX Bit1 (978~993) 16 985, Bit9 (969~983) 15 976,
1099 11:33:04.522086 TX Bit2 (979~994) 16 986, Bit10 (975~987) 13 981,
1100 11:33:04.525371 TX Bit3 (976~987) 12 981, Bit11 (968~981) 14 974,
1101 11:33:04.528977 TX Bit4 (978~992) 15 985, Bit12 (970~983) 14 976,
1102 11:33:04.535425 TX Bit5 (976~991) 16 983, Bit13 (970~984) 15 977,
1103 11:33:04.538414 TX Bit6 (978~991) 14 984, Bit14 (969~984) 16 976,
1104 11:33:04.541856 TX Bit7 (978~992) 15 985, Bit15 (974~985) 12 979,
1105 11:33:04.542245
1106 11:33:04.545145 Write Rank0 MR14 =0x2
1107 11:33:04.553714
1108 11:33:04.554100 CH=0, VrefRange= 0, VrefLevel = 2
1109 11:33:04.560681 TX Bit0 (979~994) 16 986, Bit8 (967~979) 13 973,
1110 11:33:04.563935 TX Bit1 (978~993) 16 985, Bit9 (969~984) 16 976,
1111 11:33:04.570312 TX Bit2 (979~994) 16 986, Bit10 (974~988) 15 981,
1112 11:33:04.573588 TX Bit3 (975~987) 13 981, Bit11 (968~982) 15 975,
1113 11:33:04.576747 TX Bit4 (978~993) 16 985, Bit12 (970~984) 15 977,
1114 11:33:04.583385 TX Bit5 (976~992) 17 984, Bit13 (969~984) 16 976,
1115 11:33:04.587142 TX Bit6 (977~992) 16 984, Bit14 (969~985) 17 977,
1116 11:33:04.590296 TX Bit7 (978~992) 15 985, Bit15 (974~986) 13 980,
1117 11:33:04.590686
1118 11:33:04.593381 Write Rank0 MR14 =0x4
1119 11:33:04.602578
1120 11:33:04.602963 CH=0, VrefRange= 0, VrefLevel = 4
1121 11:33:04.609389 TX Bit0 (979~996) 18 987, Bit8 (967~981) 15 974,
1122 11:33:04.612943 TX Bit1 (977~994) 18 985, Bit9 (968~984) 17 976,
1123 11:33:04.616161 TX Bit2 (978~995) 18 986, Bit10 (974~989) 16 981,
1124 11:33:04.623116 TX Bit3 (975~988) 14 981, Bit11 (968~983) 16 975,
1125 11:33:04.625830 TX Bit4 (978~993) 16 985, Bit12 (970~984) 15 977,
1126 11:33:04.633011 TX Bit5 (976~992) 17 984, Bit13 (969~984) 16 976,
1127 11:33:04.635983 TX Bit6 (977~992) 16 984, Bit14 (969~985) 17 977,
1128 11:33:04.639443 TX Bit7 (978~993) 16 985, Bit15 (973~987) 15 980,
1129 11:33:04.639836
1130 11:33:04.643179 Write Rank0 MR14 =0x6
1131 11:33:04.651615
1132 11:33:04.651999 CH=0, VrefRange= 0, VrefLevel = 6
1133 11:33:04.658430 TX Bit0 (978~997) 20 987, Bit8 (967~982) 16 974,
1134 11:33:04.661585 TX Bit1 (977~994) 18 985, Bit9 (968~984) 17 976,
1135 11:33:04.668350 TX Bit2 (978~996) 19 987, Bit10 (974~989) 16 981,
1136 11:33:04.671954 TX Bit3 (974~990) 17 982, Bit11 (967~983) 17 975,
1137 11:33:04.674986 TX Bit4 (978~994) 17 986, Bit12 (969~984) 16 976,
1138 11:33:04.681931 TX Bit5 (976~993) 18 984, Bit13 (969~984) 16 976,
1139 11:33:04.733369 TX Bit6 (977~993) 17 985, Bit14 (969~986) 18 977,
1140 11:33:04.734057 TX Bit7 (978~994) 17 986, Bit15 (973~989) 17 981,
1141 11:33:04.734374
1142 11:33:04.734648 Write Rank0 MR14 =0x8
1143 11:33:04.734985
1144 11:33:04.735253 CH=0, VrefRange= 0, VrefLevel = 8
1145 11:33:04.735509 TX Bit0 (978~998) 21 988, Bit8 (966~982) 17 974,
1146 11:33:04.735761 TX Bit1 (978~995) 18 986, Bit9 (968~985) 18 976,
1147 11:33:04.736068 TX Bit2 (978~997) 20 987, Bit10 (973~990) 18 981,
1148 11:33:04.736330 TX Bit3 (974~991) 18 982, Bit11 (967~984) 18 975,
1149 11:33:04.736638 TX Bit4 (977~994) 18 985, Bit12 (969~985) 17 977,
1150 11:33:04.736937 TX Bit5 (976~993) 18 984, Bit13 (969~985) 17 977,
1151 11:33:04.737196 TX Bit6 (977~993) 17 985, Bit14 (968~987) 20 977,
1152 11:33:04.783980 TX Bit7 (977~994) 18 985, Bit15 (973~989) 17 981,
1153 11:33:04.784392
1154 11:33:04.785042 Write Rank0 MR14 =0xa
1155 11:33:04.785435
1156 11:33:04.785933 CH=0, VrefRange= 0, VrefLevel = 10
1157 11:33:04.786250 TX Bit0 (978~998) 21 988, Bit8 (966~983) 18 974,
1158 11:33:04.786521 TX Bit1 (977~996) 20 986, Bit9 (968~986) 19 977,
1159 11:33:04.786782 TX Bit2 (978~998) 21 988, Bit10 (973~990) 18 981,
1160 11:33:04.787040 TX Bit3 (974~991) 18 982, Bit11 (967~984) 18 975,
1161 11:33:04.787348 TX Bit4 (978~995) 18 986, Bit12 (969~985) 17 977,
1162 11:33:04.787609 TX Bit5 (975~993) 19 984, Bit13 (969~986) 18 977,
1163 11:33:04.787857 TX Bit6 (977~994) 18 985, Bit14 (968~987) 20 977,
1164 11:33:04.788922 TX Bit7 (977~994) 18 985, Bit15 (972~990) 19 981,
1165 11:33:04.789301
1166 11:33:04.789595 Write Rank0 MR14 =0xc
1167 11:33:04.799485
1168 11:33:04.802549 CH=0, VrefRange= 0, VrefLevel = 12
1169 11:33:04.805834 TX Bit0 (978~998) 21 988, Bit8 (966~983) 18 974,
1170 11:33:04.809339 TX Bit1 (977~997) 21 987, Bit9 (968~986) 19 977,
1171 11:33:04.816071 TX Bit2 (978~998) 21 988, Bit10 (973~991) 19 982,
1172 11:33:04.819262 TX Bit3 (974~992) 19 983, Bit11 (967~985) 19 976,
1173 11:33:04.822616 TX Bit4 (977~996) 20 986, Bit12 (969~986) 18 977,
1174 11:33:04.829124 TX Bit5 (975~994) 20 984, Bit13 (968~986) 19 977,
1175 11:33:04.832825 TX Bit6 (976~994) 19 985, Bit14 (968~987) 20 977,
1176 11:33:04.836175 TX Bit7 (977~995) 19 986, Bit15 (972~990) 19 981,
1177 11:33:04.836591
1178 11:33:04.839368 Write Rank0 MR14 =0xe
1179 11:33:04.848566
1180 11:33:04.852131 CH=0, VrefRange= 0, VrefLevel = 14
1181 11:33:04.855400 TX Bit0 (978~999) 22 988, Bit8 (966~983) 18 974,
1182 11:33:04.858838 TX Bit1 (977~998) 22 987, Bit9 (968~987) 20 977,
1183 11:33:04.865369 TX Bit2 (977~999) 23 988, Bit10 (972~991) 20 981,
1184 11:33:04.868949 TX Bit3 (973~992) 20 982, Bit11 (967~985) 19 976,
1185 11:33:04.871916 TX Bit4 (977~996) 20 986, Bit12 (968~987) 20 977,
1186 11:33:04.878902 TX Bit5 (975~995) 21 985, Bit13 (968~987) 20 977,
1187 11:33:04.882121 TX Bit6 (976~995) 20 985, Bit14 (968~989) 22 978,
1188 11:33:04.885745 TX Bit7 (977~996) 20 986, Bit15 (971~990) 20 980,
1189 11:33:04.886130
1190 11:33:04.888874 Write Rank0 MR14 =0x10
1191 11:33:04.898326
1192 11:33:04.898707 CH=0, VrefRange= 0, VrefLevel = 16
1193 11:33:04.904973 TX Bit0 (978~999) 22 988, Bit8 (966~984) 19 975,
1194 11:33:04.908203 TX Bit1 (977~999) 23 988, Bit9 (968~987) 20 977,
1195 11:33:04.915122 TX Bit2 (977~999) 23 988, Bit10 (971~992) 22 981,
1196 11:33:04.918425 TX Bit3 (973~992) 20 982, Bit11 (966~985) 20 975,
1197 11:33:04.921807 TX Bit4 (977~998) 22 987, Bit12 (968~987) 20 977,
1198 11:33:04.928139 TX Bit5 (975~995) 21 985, Bit13 (968~988) 21 978,
1199 11:33:04.931494 TX Bit6 (976~996) 21 986, Bit14 (968~990) 23 979,
1200 11:33:04.935206 TX Bit7 (977~996) 20 986, Bit15 (971~991) 21 981,
1201 11:33:04.935596
1202 11:33:04.938541 Write Rank0 MR14 =0x12
1203 11:33:04.948066
1204 11:33:04.951138 CH=0, VrefRange= 0, VrefLevel = 18
1205 11:33:04.954542 TX Bit0 (977~999) 23 988, Bit8 (965~985) 21 975,
1206 11:33:04.957990 TX Bit1 (977~999) 23 988, Bit9 (967~988) 22 977,
1207 11:33:04.964353 TX Bit2 (977~999) 23 988, Bit10 (971~992) 22 981,
1208 11:33:04.967890 TX Bit3 (972~993) 22 982, Bit11 (966~986) 21 976,
1209 11:33:04.971040 TX Bit4 (976~998) 23 987, Bit12 (968~988) 21 978,
1210 11:33:04.977748 TX Bit5 (974~995) 22 984, Bit13 (968~989) 22 978,
1211 11:33:04.980996 TX Bit6 (976~996) 21 986, Bit14 (967~990) 24 978,
1212 11:33:04.984294 TX Bit7 (977~998) 22 987, Bit15 (971~991) 21 981,
1213 11:33:04.984706
1214 11:33:04.987583 Write Rank0 MR14 =0x14
1215 11:33:04.997104
1216 11:33:04.997482 CH=0, VrefRange= 0, VrefLevel = 20
1217 11:33:05.004047 TX Bit0 (977~999) 23 988, Bit8 (965~985) 21 975,
1218 11:33:05.007354 TX Bit1 (976~999) 24 987, Bit9 (967~988) 22 977,
1219 11:33:05.013700 TX Bit2 (977~999) 23 988, Bit10 (971~992) 22 981,
1220 11:33:05.017376 TX Bit3 (971~993) 23 982, Bit11 (966~987) 22 976,
1221 11:33:05.020554 TX Bit4 (976~999) 24 987, Bit12 (968~989) 22 978,
1222 11:33:05.027777 TX Bit5 (974~996) 23 985, Bit13 (968~989) 22 978,
1223 11:33:05.030654 TX Bit6 (976~997) 22 986, Bit14 (967~990) 24 978,
1224 11:33:05.034427 TX Bit7 (977~999) 23 988, Bit15 (970~992) 23 981,
1225 11:33:05.034809
1226 11:33:05.037211 Write Rank0 MR14 =0x16
1227 11:33:05.047039
1228 11:33:05.050253 CH=0, VrefRange= 0, VrefLevel = 22
1229 11:33:05.053462 TX Bit0 (977~1000) 24 988, Bit8 (965~985) 21 975,
1230 11:33:05.057172 TX Bit1 (976~999) 24 987, Bit9 (967~989) 23 978,
1231 11:33:05.063547 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1232 11:33:05.067385 TX Bit3 (971~993) 23 982, Bit11 (966~987) 22 976,
1233 11:33:05.070779 TX Bit4 (976~999) 24 987, Bit12 (968~990) 23 979,
1234 11:33:05.077175 TX Bit5 (973~997) 25 985, Bit13 (968~990) 23 979,
1235 11:33:05.080890 TX Bit6 (976~998) 23 987, Bit14 (967~990) 24 978,
1236 11:33:05.084082 TX Bit7 (977~999) 23 988, Bit15 (970~992) 23 981,
1237 11:33:05.084497
1238 11:33:05.086946 Write Rank0 MR14 =0x18
1239 11:33:05.096574
1240 11:33:05.100446 CH=0, VrefRange= 0, VrefLevel = 24
1241 11:33:05.103715 TX Bit0 (977~1000) 24 988, Bit8 (964~986) 23 975,
1242 11:33:05.107065 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1243 11:33:05.113613 TX Bit2 (977~1000) 24 988, Bit10 (970~993) 24 981,
1244 11:33:05.117148 TX Bit3 (971~994) 24 982, Bit11 (966~988) 23 977,
1245 11:33:05.119988 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1246 11:33:05.126741 TX Bit5 (973~997) 25 985, Bit13 (967~990) 24 978,
1247 11:33:05.130302 TX Bit6 (975~998) 24 986, Bit14 (967~991) 25 979,
1248 11:33:05.133622 TX Bit7 (976~999) 24 987, Bit15 (970~992) 23 981,
1249 11:33:05.136548
1250 11:33:05.136929 Write Rank0 MR14 =0x1a
1251 11:33:05.146727
1252 11:33:05.147107 CH=0, VrefRange= 0, VrefLevel = 26
1253 11:33:05.153652 TX Bit0 (976~1000) 25 988, Bit8 (963~986) 24 974,
1254 11:33:05.157069 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1255 11:33:05.163537 TX Bit2 (976~1000) 25 988, Bit10 (970~993) 24 981,
1256 11:33:05.167092 TX Bit3 (970~994) 25 982, Bit11 (965~989) 25 977,
1257 11:33:05.170569 TX Bit4 (976~999) 24 987, Bit12 (967~990) 24 978,
1258 11:33:05.176891 TX Bit5 (972~997) 26 984, Bit13 (967~990) 24 978,
1259 11:33:05.180139 TX Bit6 (975~999) 25 987, Bit14 (967~991) 25 979,
1260 11:33:05.184003 TX Bit7 (976~999) 24 987, Bit15 (970~992) 23 981,
1261 11:33:05.184390
1262 11:33:05.186985 Write Rank0 MR14 =0x1c
1263 11:33:05.196862
1264 11:33:05.197243 CH=0, VrefRange= 0, VrefLevel = 28
1265 11:33:05.203609 TX Bit0 (976~1001) 26 988, Bit8 (963~987) 25 975,
1266 11:33:05.206757 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1267 11:33:05.213865 TX Bit2 (977~1001) 25 989, Bit10 (969~993) 25 981,
1268 11:33:05.216997 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1269 11:33:05.220495 TX Bit4 (975~1000) 26 987, Bit12 (967~990) 24 978,
1270 11:33:05.226852 TX Bit5 (972~998) 27 985, Bit13 (967~990) 24 978,
1271 11:33:05.230598 TX Bit6 (974~999) 26 986, Bit14 (967~990) 24 978,
1272 11:33:05.233598 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1273 11:33:05.237341
1274 11:33:05.237721 Write Rank0 MR14 =0x1e
1275 11:33:05.246979
1276 11:33:05.250580 CH=0, VrefRange= 0, VrefLevel = 30
1277 11:33:05.254176 TX Bit0 (976~1001) 26 988, Bit8 (963~987) 25 975,
1278 11:33:05.257291 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1279 11:33:05.263649 TX Bit2 (977~1001) 25 989, Bit10 (969~993) 25 981,
1280 11:33:05.267358 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1281 11:33:05.270555 TX Bit4 (975~1000) 26 987, Bit12 (967~990) 24 978,
1282 11:33:05.277250 TX Bit5 (972~998) 27 985, Bit13 (967~990) 24 978,
1283 11:33:05.280554 TX Bit6 (974~999) 26 986, Bit14 (967~990) 24 978,
1284 11:33:05.284055 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1285 11:33:05.287045
1286 11:33:05.287427 Write Rank0 MR14 =0x20
1287 11:33:05.297314
1288 11:33:05.300570 CH=0, VrefRange= 0, VrefLevel = 32
1289 11:33:05.304382 TX Bit0 (976~1001) 26 988, Bit8 (963~987) 25 975,
1290 11:33:05.307222 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1291 11:33:05.314199 TX Bit2 (977~1001) 25 989, Bit10 (969~993) 25 981,
1292 11:33:05.317373 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1293 11:33:05.320627 TX Bit4 (975~1000) 26 987, Bit12 (967~990) 24 978,
1294 11:33:05.326991 TX Bit5 (972~998) 27 985, Bit13 (967~990) 24 978,
1295 11:33:05.330511 TX Bit6 (974~999) 26 986, Bit14 (967~990) 24 978,
1296 11:33:05.337371 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1297 11:33:05.337970
1298 11:33:05.338455 Write Rank0 MR14 =0x22
1299 11:33:05.347571
1300 11:33:05.350761 CH=0, VrefRange= 0, VrefLevel = 34
1301 11:33:05.354242 TX Bit0 (976~1001) 26 988, Bit8 (963~987) 25 975,
1302 11:33:05.357486 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1303 11:33:05.364036 TX Bit2 (977~1001) 25 989, Bit10 (969~993) 25 981,
1304 11:33:05.367332 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1305 11:33:05.371077 TX Bit4 (975~1000) 26 987, Bit12 (967~990) 24 978,
1306 11:33:05.377604 TX Bit5 (972~998) 27 985, Bit13 (967~990) 24 978,
1307 11:33:05.380945 TX Bit6 (974~999) 26 986, Bit14 (967~990) 24 978,
1308 11:33:05.387402 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1309 11:33:05.387795
1310 11:33:05.388092 Write Rank0 MR14 =0x24
1311 11:33:05.397774
1312 11:33:05.398158 CH=0, VrefRange= 0, VrefLevel = 36
1313 11:33:05.404505 TX Bit0 (976~1001) 26 988, Bit8 (963~987) 25 975,
1314 11:33:05.407652 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1315 11:33:05.414171 TX Bit2 (977~1001) 25 989, Bit10 (969~993) 25 981,
1316 11:33:05.417916 TX Bit3 (970~995) 26 982, Bit11 (965~989) 25 977,
1317 11:33:05.421002 TX Bit4 (975~1000) 26 987, Bit12 (967~990) 24 978,
1318 11:33:05.428077 TX Bit5 (972~998) 27 985, Bit13 (967~990) 24 978,
1319 11:33:05.431228 TX Bit6 (974~999) 26 986, Bit14 (967~990) 24 978,
1320 11:33:05.438054 TX Bit7 (976~1000) 25 988, Bit15 (969~993) 25 981,
1321 11:33:05.438454
1322 11:33:05.438752
1323 11:33:05.441065 TX Vref found, early break! 377< 381
1324 11:33:05.444789 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1325 11:33:05.447961 u1DelayCellOfst[0]=7 cells (6 PI)
1326 11:33:05.451284 u1DelayCellOfst[1]=7 cells (6 PI)
1327 11:33:05.454423 u1DelayCellOfst[2]=9 cells (7 PI)
1328 11:33:05.458237 u1DelayCellOfst[3]=0 cells (0 PI)
1329 11:33:05.461349 u1DelayCellOfst[4]=6 cells (5 PI)
1330 11:33:05.461838 u1DelayCellOfst[5]=3 cells (3 PI)
1331 11:33:05.464551 u1DelayCellOfst[6]=5 cells (4 PI)
1332 11:33:05.468101 u1DelayCellOfst[7]=7 cells (6 PI)
1333 11:33:05.471144 Byte0, DQ PI dly=982, DQM PI dly= 985
1334 11:33:05.477773 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1335 11:33:05.478160
1336 11:33:05.481594 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1337 11:33:05.481985
1338 11:33:05.484772 u1DelayCellOfst[8]=0 cells (0 PI)
1339 11:33:05.488115 u1DelayCellOfst[9]=3 cells (3 PI)
1340 11:33:05.491200 u1DelayCellOfst[10]=7 cells (6 PI)
1341 11:33:05.494655 u1DelayCellOfst[11]=2 cells (2 PI)
1342 11:33:05.498080 u1DelayCellOfst[12]=3 cells (3 PI)
1343 11:33:05.498466 u1DelayCellOfst[13]=3 cells (3 PI)
1344 11:33:05.501500 u1DelayCellOfst[14]=3 cells (3 PI)
1345 11:33:05.504598 u1DelayCellOfst[15]=7 cells (6 PI)
1346 11:33:05.508211 Byte1, DQ PI dly=975, DQM PI dly= 978
1347 11:33:05.514904 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1348 11:33:05.515299
1349 11:33:05.518164 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1350 11:33:05.518556
1351 11:33:05.521403 Write Rank0 MR14 =0x1c
1352 11:33:05.521790
1353 11:33:05.522089 Final TX Range 0 Vref 28
1354 11:33:05.522368
1355 11:33:05.528122 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1356 11:33:05.528692
1357 11:33:05.534912 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1358 11:33:05.541587 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1359 11:33:05.548161 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1360 11:33:05.552160 Write Rank0 MR3 =0xb0
1361 11:33:05.555114 DramC Write-DBI on
1362 11:33:05.555495 ==
1363 11:33:05.558392 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1364 11:33:05.561635 fsp= 1, odt_onoff= 1, Byte mode= 0
1365 11:33:05.562024 ==
1366 11:33:05.565435 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1367 11:33:05.565820
1368 11:33:05.568384 Begin, DQ Scan Range 698~762
1369 11:33:05.568788
1370 11:33:05.569084
1371 11:33:05.571652 TX Vref Scan disable
1372 11:33:05.575398 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1373 11:33:05.578713 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1374 11:33:05.581878 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1375 11:33:05.585348 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1376 11:33:05.588624 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1377 11:33:05.591819 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1378 11:33:05.595452 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1379 11:33:05.598544 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1380 11:33:05.602116 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1381 11:33:05.605448 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1382 11:33:05.608869 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1383 11:33:05.611914 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1384 11:33:05.615383 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1385 11:33:05.618603 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1386 11:33:05.625426 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1387 11:33:05.628726 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1388 11:33:05.632092 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1389 11:33:05.635637 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1390 11:33:05.638893 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1391 11:33:05.642180 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1392 11:33:05.645824 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1393 11:33:05.648984 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1394 11:33:05.655652 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1395 11:33:05.659070 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1396 11:33:05.662632 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1397 11:33:05.665812 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1398 11:33:05.668986 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1399 11:33:05.672836 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1400 11:33:05.675976 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1401 11:33:05.678986 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1402 11:33:05.682399 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1403 11:33:05.686064 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1404 11:33:05.689254 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1405 11:33:05.692510 746 |2 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
1406 11:33:05.696133 Byte0, DQ PI dly=732, DQM PI dly= 732
1407 11:33:05.702388 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 28)
1408 11:33:05.702771
1409 11:33:05.705870 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 28)
1410 11:33:05.706256
1411 11:33:05.708959 Byte1, DQ PI dly=721, DQM PI dly= 721
1412 11:33:05.712417 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
1413 11:33:05.712997
1414 11:33:05.718938 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
1415 11:33:05.719470
1416 11:33:05.725835 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1417 11:33:05.732508 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1418 11:33:05.739384 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1419 11:33:05.739880 Write Rank0 MR3 =0x30
1420 11:33:05.742542 DramC Write-DBI off
1421 11:33:05.743017
1422 11:33:05.743456 [DATLAT]
1423 11:33:05.745755 Freq=1600, CH0 RK0, use_rxtx_scan=0
1424 11:33:05.746237
1425 11:33:05.749042 DATLAT Default: 0xf
1426 11:33:05.749524 7, 0xFFFF, sum=0
1427 11:33:05.752996 8, 0xFFFF, sum=0
1428 11:33:05.753485 9, 0xFFFF, sum=0
1429 11:33:05.755921 10, 0xFFFF, sum=0
1430 11:33:05.756416 11, 0xFFFF, sum=0
1431 11:33:05.759026 12, 0xFFFF, sum=0
1432 11:33:05.759507 13, 0xFFFF, sum=0
1433 11:33:05.762360 14, 0x0, sum=1
1434 11:33:05.762858 15, 0x0, sum=2
1435 11:33:05.763310 16, 0x0, sum=3
1436 11:33:05.765998 17, 0x0, sum=4
1437 11:33:05.769378 pattern=2 first_step=14 total pass=5 best_step=16
1438 11:33:05.769919 ==
1439 11:33:05.776209 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1440 11:33:05.779327 fsp= 1, odt_onoff= 1, Byte mode= 0
1441 11:33:05.779715 ==
1442 11:33:05.782537 Start DQ dly to find pass range UseTestEngine =1
1443 11:33:05.785954 x-axis: bit #, y-axis: DQ dly (-127~63)
1444 11:33:05.786345 RX Vref Scan = 1
1445 11:33:05.902195
1446 11:33:05.902622 RX Vref found, early break!
1447 11:33:05.902926
1448 11:33:05.909039 Final RX Vref 12, apply to both rank0 and 1
1449 11:33:05.909583 ==
1450 11:33:05.912326 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1451 11:33:05.915352 fsp= 1, odt_onoff= 1, Byte mode= 0
1452 11:33:05.915557 ==
1453 11:33:05.915749 DQS Delay:
1454 11:33:05.918843 DQS0 = 0, DQS1 = 0
1455 11:33:05.919338 DQM Delay:
1456 11:33:05.922468 DQM0 = 19, DQM1 = 18
1457 11:33:05.922965 DQ Delay:
1458 11:33:05.925596 DQ0 =22, DQ1 =21, DQ2 =21, DQ3 =15
1459 11:33:05.929046 DQ4 =21, DQ5 =17, DQ6 =18, DQ7 =20
1460 11:33:05.932435 DQ8 =14, DQ9 =16, DQ10 =25, DQ11 =17
1461 11:33:05.935644 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =21
1462 11:33:05.936025
1463 11:33:05.936322
1464 11:33:05.936632
1465 11:33:05.938855 [DramC_TX_OE_Calibration] TA2
1466 11:33:05.942090 Original DQ_B0 (3 6) =30, OEN = 27
1467 11:33:05.945357 Original DQ_B1 (3 6) =30, OEN = 27
1468 11:33:05.948634 23, 0x0, End_B0=23 End_B1=23
1469 11:33:05.949025 24, 0x0, End_B0=24 End_B1=24
1470 11:33:05.952365 25, 0x0, End_B0=25 End_B1=25
1471 11:33:05.955595 26, 0x0, End_B0=26 End_B1=26
1472 11:33:05.959230 27, 0x0, End_B0=27 End_B1=27
1473 11:33:05.959637 28, 0x0, End_B0=28 End_B1=28
1474 11:33:05.962426 29, 0x0, End_B0=29 End_B1=29
1475 11:33:05.965498 30, 0x0, End_B0=30 End_B1=30
1476 11:33:05.968949 31, 0xFFFF, End_B0=30 End_B1=30
1477 11:33:05.975985 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1478 11:33:05.979042 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1479 11:33:05.979548
1480 11:33:05.979994
1481 11:33:05.982496 Write Rank0 MR23 =0x3f
1482 11:33:05.982989 [DQSOSC]
1483 11:33:05.992600 [DQSOSCAuto] RK0, (LSB)MR18= 0x1212, (MSB)MR19= 0x303, tDQSOscB0 = 400 ps tDQSOscB1 = 400 ps
1484 11:33:05.996190 CH0_RK0: MR19=0x303, MR18=0x1212, DQSOSC=400, MR23=63, INC=15, DEC=23
1485 11:33:05.999360 Write Rank0 MR23 =0x3f
1486 11:33:05.999743 [DQSOSC]
1487 11:33:06.009508 [DQSOSCAuto] RK0, (LSB)MR18= 0x1212, (MSB)MR19= 0x303, tDQSOscB0 = 400 ps tDQSOscB1 = 400 ps
1488 11:33:06.009897 CH0 RK0: MR19=303, MR18=1212
1489 11:33:06.012753 [RankSwap] Rank num 2, (Multi 1), Rank 1
1490 11:33:06.016107 Write Rank0 MR2 =0xad
1491 11:33:06.019509 [Write Leveling]
1492 11:33:06.019890 delay byte0 byte1 byte2 byte3
1493 11:33:06.020188
1494 11:33:06.022423 10 0 0
1495 11:33:06.022812 11 0 0
1496 11:33:06.025974 12 0 0
1497 11:33:06.026362 13 0 0
1498 11:33:06.029327 14 0 0
1499 11:33:06.029715 15 0 0
1500 11:33:06.030016 16 0 0
1501 11:33:06.032744 17 0 0
1502 11:33:06.033132 18 0 0
1503 11:33:06.035998 19 0 0
1504 11:33:06.036384 20 0 0
1505 11:33:06.036713 21 0 0
1506 11:33:06.039705 22 0 0
1507 11:33:06.040093 23 0 0
1508 11:33:06.042806 24 0 ff
1509 11:33:06.043196 25 0 ff
1510 11:33:06.046114 26 0 ff
1511 11:33:06.046502 27 ff ff
1512 11:33:06.046809 28 ff ff
1513 11:33:06.049585 29 ff ff
1514 11:33:06.050096 30 ff ff
1515 11:33:06.052997 31 ff ff
1516 11:33:06.053389 32 ff ff
1517 11:33:06.056338 33 ff ff
1518 11:33:06.059437 pass bytecount = 0xff (0xff: all bytes pass)
1519 11:33:06.059819
1520 11:33:06.060114 DQS0 dly: 27
1521 11:33:06.062701 DQS1 dly: 24
1522 11:33:06.063084 Write Rank0 MR2 =0x2d
1523 11:33:06.066521 [RankSwap] Rank num 2, (Multi 1), Rank 0
1524 11:33:06.069988 Write Rank1 MR1 =0xd6
1525 11:33:06.070374 [Gating]
1526 11:33:06.070676 ==
1527 11:33:06.076386 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1528 11:33:06.079525 fsp= 1, odt_onoff= 1, Byte mode= 0
1529 11:33:06.079907 ==
1530 11:33:06.082808 3 1 0 |2c2b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1531 11:33:06.086283 3 1 4 |2c2b 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1532 11:33:06.092924 3 1 8 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1533 11:33:06.096654 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
1534 11:33:06.099607 3 1 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1535 11:33:06.106391 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1536 11:33:06.109473 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1537 11:33:06.113372 3 1 28 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1538 11:33:06.119579 3 2 0 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1539 11:33:06.123206 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
1540 11:33:06.126501 3 2 8 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1541 11:33:06.129987 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1542 11:33:06.136725 3 2 16 |3534 2b2a |(11 11)(11 11) |(0 0)(1 1)| 0
1543 11:33:06.139737 3 2 20 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1544 11:33:06.143530 3 2 24 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1545 11:33:06.149870 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1546 11:33:06.153046 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1547 11:33:06.156569 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1548 11:33:06.163314 3 3 8 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1549 11:33:06.166549 3 3 12 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1550 11:33:06.169907 3 3 16 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
1551 11:33:06.176770 3 3 20 |3534 bbd |(11 11)(11 11) |(0 0)(1 1)| 0
1552 11:33:06.179922 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
1553 11:33:06.183280 [Byte 1] Lead/lag falling Transition (3, 3, 24)
1554 11:33:06.186859 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1555 11:33:06.193626 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1556 11:33:06.196871 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1557 11:33:06.200067 3 4 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1558 11:33:06.206723 3 4 12 |1211 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1559 11:33:06.210526 3 4 16 |3d3d e0d |(11 11)(11 11) |(1 1)(1 1)| 0
1560 11:33:06.213492 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1561 11:33:06.217059 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1562 11:33:06.223603 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1563 11:33:06.227011 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1564 11:33:06.230128 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1565 11:33:06.236979 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1566 11:33:06.240986 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1567 11:33:06.243722 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1568 11:33:06.250820 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1569 11:33:06.253914 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1570 11:33:06.257179 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1571 11:33:06.260492 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1572 11:33:06.267017 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1573 11:33:06.270338 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1574 11:33:06.274004 [Byte 0] Lead/lag Transition tap number (2)
1575 11:33:06.277291 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1576 11:33:06.283684 3 6 8 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1577 11:33:06.287008 [Byte 1] Lead/lag Transition tap number (2)
1578 11:33:06.290398 3 6 12 |4646 3d3d |(10 10)(11 11) |(0 0)(0 0)| 0
1579 11:33:06.293941 3 6 16 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
1580 11:33:06.297100 [Byte 0]First pass (3, 6, 16)
1581 11:33:06.300389 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1582 11:33:06.303650 [Byte 1]First pass (3, 6, 20)
1583 11:33:06.307118 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1584 11:33:06.314065 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1585 11:33:06.317029 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1586 11:33:06.320803 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1587 11:33:06.324075 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1588 11:33:06.327255 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1589 11:33:06.333853 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1590 11:33:06.337596 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1591 11:33:06.340642 All bytes gating window > 1UI, Early break!
1592 11:33:06.341028
1593 11:33:06.344269 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1594 11:33:06.344684
1595 11:33:06.347588 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1596 11:33:06.347968
1597 11:33:06.348271
1598 11:33:06.348577
1599 11:33:06.350988 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1600 11:33:06.354090
1601 11:33:06.357574 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1602 11:33:06.358006
1603 11:33:06.358480
1604 11:33:06.358855 Write Rank1 MR1 =0x56
1605 11:33:06.359181
1606 11:33:06.361118 best RODT dly(2T, 0.5T) = (2, 3)
1607 11:33:06.361698
1608 11:33:06.364347 best RODT dly(2T, 0.5T) = (2, 3)
1609 11:33:06.364875 ==
1610 11:33:06.370718 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1611 11:33:06.374053 fsp= 1, odt_onoff= 1, Byte mode= 0
1612 11:33:06.374474 ==
1613 11:33:06.377747 Start DQ dly to find pass range UseTestEngine =0
1614 11:33:06.380877 x-axis: bit #, y-axis: DQ dly (-127~63)
1615 11:33:06.384196 RX Vref Scan = 0
1616 11:33:06.384911 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1617 11:33:06.387637 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1618 11:33:06.390753 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1619 11:33:06.394030 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1620 11:33:06.397823 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1621 11:33:06.401266 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1622 11:33:06.404562 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1623 11:33:06.407800 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1624 11:33:06.408192 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1625 11:33:06.411250 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1626 11:33:06.414398 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1627 11:33:06.417800 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1628 11:33:06.420846 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1629 11:33:06.424593 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1630 11:33:06.427764 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1631 11:33:06.430915 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1632 11:33:06.431335 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1633 11:33:06.434785 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1634 11:33:06.438023 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1635 11:33:06.441350 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1636 11:33:06.444519 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1637 11:33:06.447684 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1638 11:33:06.451106 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1639 11:33:06.451499 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1640 11:33:06.454319 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1641 11:33:06.457711 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1642 11:33:06.461230 0, [0] xxxoxoxx oxxoxxxx [MSB]
1643 11:33:06.464450 1, [0] xxxoxoxx ooxoooxx [MSB]
1644 11:33:06.468221 2, [0] xxxoxooo ooxoooxx [MSB]
1645 11:33:06.468643 3, [0] xxxooooo ooxoooox [MSB]
1646 11:33:06.471121 4, [0] oooooooo ooxooooo [MSB]
1647 11:33:06.474736 5, [0] oooooooo ooxooooo [MSB]
1648 11:33:06.477933 6, [0] oooooooo ooxooooo [MSB]
1649 11:33:06.481064 33, [0] oooooooo xooooooo [MSB]
1650 11:33:06.484805 34, [0] oooooooo xooooooo [MSB]
1651 11:33:06.487628 35, [0] oooxoooo xooooooo [MSB]
1652 11:33:06.488015 36, [0] oooxoooo xooxoooo [MSB]
1653 11:33:06.491238 37, [0] oooxoxoo xxoxoxoo [MSB]
1654 11:33:06.494603 38, [0] oooxoxoo xxoxxxxo [MSB]
1655 11:33:06.497919 39, [0] oooxoxox xxoxxxxo [MSB]
1656 11:33:06.501311 40, [0] oooxoxxx xxoxxxxo [MSB]
1657 11:33:06.504979 41, [0] oxxxoxxx xxoxxxxx [MSB]
1658 11:33:06.505371 42, [0] oxxxxxxx xxoxxxxx [MSB]
1659 11:33:06.508020 43, [0] xxxxxxxx xxoxxxxx [MSB]
1660 11:33:06.511199 44, [0] xxxxxxxx xxoxxxxx [MSB]
1661 11:33:06.514815 45, [0] xxxxxxxx xxxxxxxx [MSB]
1662 11:33:06.518219 iDelay=45, Bit 0, Center 23 (4 ~ 42) 39
1663 11:33:06.521203 iDelay=45, Bit 1, Center 22 (4 ~ 40) 37
1664 11:33:06.524596 iDelay=45, Bit 2, Center 22 (4 ~ 40) 37
1665 11:33:06.528099 iDelay=45, Bit 3, Center 16 (-2 ~ 34) 37
1666 11:33:06.531244 iDelay=45, Bit 4, Center 22 (3 ~ 41) 39
1667 11:33:06.534664 iDelay=45, Bit 5, Center 18 (0 ~ 36) 37
1668 11:33:06.537934 iDelay=45, Bit 6, Center 20 (2 ~ 39) 38
1669 11:33:06.541645 iDelay=45, Bit 7, Center 20 (2 ~ 38) 37
1670 11:33:06.548146 iDelay=45, Bit 8, Center 15 (-2 ~ 32) 35
1671 11:33:06.551687 iDelay=45, Bit 9, Center 18 (1 ~ 36) 36
1672 11:33:06.555048 iDelay=45, Bit 10, Center 25 (7 ~ 44) 38
1673 11:33:06.558258 iDelay=45, Bit 11, Center 16 (-2 ~ 35) 38
1674 11:33:06.561559 iDelay=45, Bit 12, Center 19 (1 ~ 37) 37
1675 11:33:06.564868 iDelay=45, Bit 13, Center 18 (1 ~ 36) 36
1676 11:33:06.568445 iDelay=45, Bit 14, Center 20 (3 ~ 37) 35
1677 11:33:06.571781 iDelay=45, Bit 15, Center 22 (4 ~ 40) 37
1678 11:33:06.572165 ==
1679 11:33:06.578102 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1680 11:33:06.581515 fsp= 1, odt_onoff= 1, Byte mode= 0
1681 11:33:06.581904 ==
1682 11:33:06.582204 DQS Delay:
1683 11:33:06.584863 DQS0 = 0, DQS1 = 0
1684 11:33:06.585247 DQM Delay:
1685 11:33:06.585546 DQM0 = 20, DQM1 = 19
1686 11:33:06.588358 DQ Delay:
1687 11:33:06.591770 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =16
1688 11:33:06.595311 DQ4 =22, DQ5 =18, DQ6 =20, DQ7 =20
1689 11:33:06.597964 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
1690 11:33:06.601586 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
1691 11:33:06.601966
1692 11:33:06.602261
1693 11:33:06.602536 DramC Write-DBI off
1694 11:33:06.602798 ==
1695 11:33:06.608336 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1696 11:33:06.611546 fsp= 1, odt_onoff= 1, Byte mode= 0
1697 11:33:06.611930 ==
1698 11:33:06.614780 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1699 11:33:06.615166
1700 11:33:06.618288 Begin, DQ Scan Range 920~1176
1701 11:33:06.618669
1702 11:33:06.618966
1703 11:33:06.621653 TX Vref Scan disable
1704 11:33:06.624825 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1705 11:33:06.628092 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1706 11:33:06.631319 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1707 11:33:06.634908 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1708 11:33:06.637990 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1709 11:33:06.641758 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1710 11:33:06.644851 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1711 11:33:06.648358 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1712 11:33:06.651681 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1713 11:33:06.654938 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1714 11:33:06.658173 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1715 11:33:06.661442 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1716 11:33:06.665210 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1717 11:33:06.668616 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1718 11:33:06.675139 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1719 11:33:06.678868 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1720 11:33:06.681659 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1721 11:33:06.684932 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1722 11:33:06.688180 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1723 11:33:06.691611 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1724 11:33:06.695375 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1725 11:33:06.698633 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1726 11:33:06.701645 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1727 11:33:06.704878 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1728 11:33:06.708672 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1729 11:33:06.711692 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1730 11:33:06.715019 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1731 11:33:06.718623 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1732 11:33:06.722108 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1733 11:33:06.725539 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1734 11:33:06.728356 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1735 11:33:06.731886 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1736 11:33:06.738383 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1737 11:33:06.742196 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1738 11:33:06.745199 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1739 11:33:06.748534 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1740 11:33:06.752083 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1741 11:33:06.755097 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1742 11:33:06.758939 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1743 11:33:06.761886 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1744 11:33:06.765508 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1745 11:33:06.768843 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1746 11:33:06.771945 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1747 11:33:06.775398 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1748 11:33:06.778709 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1749 11:33:06.781886 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1750 11:33:06.785396 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1751 11:33:06.788537 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1752 11:33:06.791933 968 |3 6 8|[0] xxxxxxxx oxxoxxxx [MSB]
1753 11:33:06.795619 969 |3 6 9|[0] xxxxxxxx ooxooxxx [MSB]
1754 11:33:06.798866 970 |3 6 10|[0] xxxxxxxx ooxooxox [MSB]
1755 11:33:06.802102 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1756 11:33:06.805416 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1757 11:33:06.811782 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1758 11:33:06.815249 974 |3 6 14|[0] xxxxxxxx ooxooooo [MSB]
1759 11:33:06.818974 975 |3 6 15|[0] xoxooooo oooooooo [MSB]
1760 11:33:06.822132 976 |3 6 16|[0] ooxooooo oooooooo [MSB]
1761 11:33:06.825578 987 |3 6 27|[0] oooooooo xooooooo [MSB]
1762 11:33:06.829234 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1763 11:33:06.832313 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1764 11:33:06.835788 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1765 11:33:06.839123 991 |3 6 31|[0] oooxoooo xxxxxxxx [MSB]
1766 11:33:06.842123 992 |3 6 32|[0] oooxoxoo xxxxxxxx [MSB]
1767 11:33:06.849152 993 |3 6 33|[0] xxxxxxxx xxxxxxxx [MSB]
1768 11:33:06.852090 Byte0, DQ PI dly=983, DQM PI dly= 983
1769 11:33:06.855708 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
1770 11:33:06.856094
1771 11:33:06.858959 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
1772 11:33:06.859365
1773 11:33:06.862159 Byte1, DQ PI dly=979, DQM PI dly= 979
1774 11:33:06.868782 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1775 11:33:06.869171
1776 11:33:06.872348 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1777 11:33:06.872796
1778 11:33:06.873101 ==
1779 11:33:06.875619 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1780 11:33:06.878983 fsp= 1, odt_onoff= 1, Byte mode= 0
1781 11:33:06.882697 ==
1782 11:33:06.885880 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1783 11:33:06.886267
1784 11:33:06.889029 Begin, DQ Scan Range 955~1019
1785 11:33:06.889413 Write Rank1 MR14 =0x0
1786 11:33:06.897305
1787 11:33:06.897689 CH=0, VrefRange= 0, VrefLevel = 0
1788 11:33:06.904357 TX Bit0 (978~991) 14 984, Bit8 (969~982) 14 975,
1789 11:33:06.907852 TX Bit1 (977~988) 12 982, Bit9 (971~984) 14 977,
1790 11:33:06.910903 TX Bit2 (978~990) 13 984, Bit10 (977~985) 9 981,
1791 11:33:06.917433 TX Bit3 (971~983) 13 977, Bit11 (971~983) 13 977,
1792 11:33:06.920743 TX Bit4 (977~990) 14 983, Bit12 (973~985) 13 979,
1793 11:33:06.927760 TX Bit5 (975~986) 12 980, Bit13 (975~983) 9 979,
1794 11:33:06.930735 TX Bit6 (976~989) 14 982, Bit14 (974~984) 11 979,
1795 11:33:06.934233 TX Bit7 (976~990) 15 983, Bit15 (976~985) 10 980,
1796 11:33:06.934619
1797 11:33:06.937601 Write Rank1 MR14 =0x2
1798 11:33:06.944920
1799 11:33:06.945299 CH=0, VrefRange= 0, VrefLevel = 2
1800 11:33:06.951754 TX Bit0 (977~992) 16 984, Bit8 (969~983) 15 976,
1801 11:33:06.954856 TX Bit1 (977~989) 13 983, Bit9 (970~985) 16 977,
1802 11:33:06.961448 TX Bit2 (978~991) 14 984, Bit10 (977~990) 14 983,
1803 11:33:06.964694 TX Bit3 (971~984) 14 977, Bit11 (970~983) 14 976,
1804 11:33:06.968170 TX Bit4 (977~991) 15 984, Bit12 (972~985) 14 978,
1805 11:33:06.974859 TX Bit5 (974~988) 15 981, Bit13 (974~983) 10 978,
1806 11:33:06.978684 TX Bit6 (975~990) 16 982, Bit14 (973~985) 13 979,
1807 11:33:06.981582 TX Bit7 (976~991) 16 983, Bit15 (976~990) 15 983,
1808 11:33:06.981968
1809 11:33:06.984960 Write Rank1 MR14 =0x4
1810 11:33:06.992630
1811 11:33:06.993013 CH=0, VrefRange= 0, VrefLevel = 4
1812 11:33:06.999304 TX Bit0 (977~992) 16 984, Bit8 (969~983) 15 976,
1813 11:33:07.002675 TX Bit1 (977~990) 14 983, Bit9 (970~986) 17 978,
1814 11:33:07.009208 TX Bit2 (978~991) 14 984, Bit10 (976~990) 15 983,
1815 11:33:07.012514 TX Bit3 (971~985) 15 978, Bit11 (969~984) 16 976,
1816 11:33:07.016142 TX Bit4 (976~991) 16 983, Bit12 (972~986) 15 979,
1817 11:33:07.022655 TX Bit5 (973~989) 17 981, Bit13 (974~984) 11 979,
1818 11:33:07.026535 TX Bit6 (975~990) 16 982, Bit14 (972~986) 15 979,
1819 11:33:07.029923 TX Bit7 (976~991) 16 983, Bit15 (976~990) 15 983,
1820 11:33:07.030310
1821 11:33:07.032928 Write Rank1 MR14 =0x6
1822 11:33:07.040886
1823 11:33:07.041267 CH=0, VrefRange= 0, VrefLevel = 6
1824 11:33:07.047451 TX Bit0 (977~993) 17 985, Bit8 (969~984) 16 976,
1825 11:33:07.050866 TX Bit1 (977~991) 15 984, Bit9 (970~986) 17 978,
1826 11:33:07.057779 TX Bit2 (978~992) 15 985, Bit10 (976~991) 16 983,
1827 11:33:07.060880 TX Bit3 (970~986) 17 978, Bit11 (969~984) 16 976,
1828 11:33:07.064199 TX Bit4 (976~991) 16 983, Bit12 (971~987) 17 979,
1829 11:33:07.070897 TX Bit5 (973~989) 17 981, Bit13 (973~984) 12 978,
1830 11:33:07.074366 TX Bit6 (974~990) 17 982, Bit14 (973~987) 15 980,
1831 11:33:07.077444 TX Bit7 (975~991) 17 983, Bit15 (975~991) 17 983,
1832 11:33:07.077829
1833 11:33:07.080682 Write Rank1 MR14 =0x8
1834 11:33:07.088773
1835 11:33:07.089157 CH=0, VrefRange= 0, VrefLevel = 8
1836 11:33:07.095493 TX Bit0 (977~993) 17 985, Bit8 (968~984) 17 976,
1837 11:33:07.098693 TX Bit1 (976~991) 16 983, Bit9 (969~986) 18 977,
1838 11:33:07.102055 TX Bit2 (977~992) 16 984, Bit10 (976~991) 16 983,
1839 11:33:07.109057 TX Bit3 (970~987) 18 978, Bit11 (968~984) 17 976,
1840 11:33:07.112174 TX Bit4 (976~992) 17 984, Bit12 (971~987) 17 979,
1841 11:33:07.118943 TX Bit5 (973~990) 18 981, Bit13 (972~985) 14 978,
1842 11:33:07.122213 TX Bit6 (974~991) 18 982, Bit14 (971~988) 18 979,
1843 11:33:07.125948 TX Bit7 (975~992) 18 983, Bit15 (974~991) 18 982,
1844 11:33:07.126332
1845 11:33:07.129231 Write Rank1 MR14 =0xa
1846 11:33:07.136757
1847 11:33:07.137139 CH=0, VrefRange= 0, VrefLevel = 10
1848 11:33:07.143880 TX Bit0 (977~994) 18 985, Bit8 (968~985) 18 976,
1849 11:33:07.147133 TX Bit1 (976~991) 16 983, Bit9 (969~987) 19 978,
1850 11:33:07.153972 TX Bit2 (977~993) 17 985, Bit10 (976~992) 17 984,
1851 11:33:07.156797 TX Bit3 (970~988) 19 979, Bit11 (969~985) 17 977,
1852 11:33:07.160499 TX Bit4 (975~992) 18 983, Bit12 (970~987) 18 978,
1853 11:33:07.167214 TX Bit5 (972~990) 19 981, Bit13 (971~986) 16 978,
1854 11:33:07.170460 TX Bit6 (974~991) 18 982, Bit14 (971~989) 19 980,
1855 11:33:07.173706 TX Bit7 (975~992) 18 983, Bit15 (975~992) 18 983,
1856 11:33:07.174094
1857 11:33:07.176541 Write Rank1 MR14 =0xc
1858 11:33:07.184713
1859 11:33:07.184879 CH=0, VrefRange= 0, VrefLevel = 12
1860 11:33:07.191636 TX Bit0 (977~995) 19 986, Bit8 (968~985) 18 976,
1861 11:33:07.195079 TX Bit1 (976~992) 17 984, Bit9 (969~989) 21 979,
1862 11:33:07.201386 TX Bit2 (977~993) 17 985, Bit10 (975~992) 18 983,
1863 11:33:07.205069 TX Bit3 (970~989) 20 979, Bit11 (968~985) 18 976,
1864 11:33:07.208634 TX Bit4 (975~992) 18 983, Bit12 (970~989) 20 979,
1865 11:33:07.215034 TX Bit5 (972~991) 20 981, Bit13 (971~987) 17 979,
1866 11:33:07.218525 TX Bit6 (974~992) 19 983, Bit14 (971~989) 19 980,
1867 11:33:07.221831 TX Bit7 (974~993) 20 983, Bit15 (974~992) 19 983,
1868 11:33:07.222109
1869 11:33:07.224917 Write Rank1 MR14 =0xe
1870 11:33:07.233362
1871 11:33:07.237127 CH=0, VrefRange= 0, VrefLevel = 14
1872 11:33:07.240445 TX Bit0 (976~995) 20 985, Bit8 (968~986) 19 977,
1873 11:33:07.243725 TX Bit1 (975~993) 19 984, Bit9 (969~989) 21 979,
1874 11:33:07.250109 TX Bit2 (977~994) 18 985, Bit10 (975~992) 18 983,
1875 11:33:07.253539 TX Bit3 (969~990) 22 979, Bit11 (968~986) 19 977,
1876 11:33:07.256795 TX Bit4 (975~993) 19 984, Bit12 (969~990) 22 979,
1877 11:33:07.263936 TX Bit5 (971~991) 21 981, Bit13 (971~987) 17 979,
1878 11:33:07.267319 TX Bit6 (973~992) 20 982, Bit14 (970~990) 21 980,
1879 11:33:07.270266 TX Bit7 (974~993) 20 983, Bit15 (974~992) 19 983,
1880 11:33:07.270771
1881 11:33:07.273552 Write Rank1 MR14 =0x10
1882 11:33:07.282591
1883 11:33:07.285599 CH=0, VrefRange= 0, VrefLevel = 16
1884 11:33:07.288840 TX Bit0 (976~996) 21 986, Bit8 (968~986) 19 977,
1885 11:33:07.292175 TX Bit1 (975~993) 19 984, Bit9 (969~990) 22 979,
1886 11:33:07.298856 TX Bit2 (976~994) 19 985, Bit10 (975~993) 19 984,
1887 11:33:07.302118 TX Bit3 (969~990) 22 979, Bit11 (968~986) 19 977,
1888 11:33:07.305776 TX Bit4 (974~993) 20 983, Bit12 (969~990) 22 979,
1889 11:33:07.312636 TX Bit5 (971~991) 21 981, Bit13 (971~987) 17 979,
1890 11:33:07.315611 TX Bit6 (972~992) 21 982, Bit14 (970~990) 21 980,
1891 11:33:07.318791 TX Bit7 (973~993) 21 983, Bit15 (974~993) 20 983,
1892 11:33:07.319274
1893 11:33:07.322084 Write Rank1 MR14 =0x12
1894 11:33:07.330869
1895 11:33:07.331240 CH=0, VrefRange= 0, VrefLevel = 18
1896 11:33:07.338197 TX Bit0 (976~997) 22 986, Bit8 (967~987) 21 977,
1897 11:33:07.341285 TX Bit1 (975~994) 20 984, Bit9 (969~990) 22 979,
1898 11:33:07.347735 TX Bit2 (976~995) 20 985, Bit10 (974~993) 20 983,
1899 11:33:07.351442 TX Bit3 (969~990) 22 979, Bit11 (968~988) 21 978,
1900 11:33:07.354774 TX Bit4 (974~994) 21 984, Bit12 (969~990) 22 979,
1901 11:33:07.361268 TX Bit5 (970~991) 22 980, Bit13 (970~989) 20 979,
1902 11:33:07.364577 TX Bit6 (972~993) 22 982, Bit14 (970~991) 22 980,
1903 11:33:07.368209 TX Bit7 (972~994) 23 983, Bit15 (974~993) 20 983,
1904 11:33:07.368754
1905 11:33:07.371568 Write Rank1 MR14 =0x14
1906 11:33:07.379789
1907 11:33:07.382947 CH=0, VrefRange= 0, VrefLevel = 20
1908 11:33:07.386817 TX Bit0 (976~997) 22 986, Bit8 (967~987) 21 977,
1909 11:33:07.389850 TX Bit1 (975~995) 21 985, Bit9 (968~990) 23 979,
1910 11:33:07.396321 TX Bit2 (976~995) 20 985, Bit10 (974~994) 21 984,
1911 11:33:07.399561 TX Bit3 (969~990) 22 979, Bit11 (968~989) 22 978,
1912 11:33:07.403306 TX Bit4 (973~995) 23 984, Bit12 (969~991) 23 980,
1913 11:33:07.409854 TX Bit5 (970~992) 23 981, Bit13 (970~989) 20 979,
1914 11:33:07.413247 TX Bit6 (971~993) 23 982, Bit14 (969~991) 23 980,
1915 11:33:07.416566 TX Bit7 (973~995) 23 984, Bit15 (973~993) 21 983,
1916 11:33:07.417165
1917 11:33:07.423367 wait MRW command Rank1 MR14 =0x16 fired (1)
1918 11:33:07.423913 Write Rank1 MR14 =0x16
1919 11:33:07.432585
1920 11:33:07.432987 CH=0, VrefRange= 0, VrefLevel = 22
1921 11:33:07.439256 TX Bit0 (976~998) 23 987, Bit8 (967~988) 22 977,
1922 11:33:07.442547 TX Bit1 (974~995) 22 984, Bit9 (968~991) 24 979,
1923 11:33:07.449273 TX Bit2 (976~996) 21 986, Bit10 (974~994) 21 984,
1924 11:33:07.452960 TX Bit3 (969~991) 23 980, Bit11 (968~989) 22 978,
1925 11:33:07.455856 TX Bit4 (973~995) 23 984, Bit12 (969~991) 23 980,
1926 11:33:07.462665 TX Bit5 (970~992) 23 981, Bit13 (970~990) 21 980,
1927 11:33:07.465805 TX Bit6 (971~993) 23 982, Bit14 (969~991) 23 980,
1928 11:33:07.469398 TX Bit7 (972~996) 25 984, Bit15 (972~994) 23 983,
1929 11:33:07.469798
1930 11:33:07.472543 Write Rank1 MR14 =0x18
1931 11:33:07.481802
1932 11:33:07.482329 CH=0, VrefRange= 0, VrefLevel = 24
1933 11:33:07.488289 TX Bit0 (975~998) 24 986, Bit8 (967~990) 24 978,
1934 11:33:07.491632 TX Bit1 (974~996) 23 985, Bit9 (968~991) 24 979,
1935 11:33:07.498237 TX Bit2 (976~997) 22 986, Bit10 (972~996) 25 984,
1936 11:33:07.501570 TX Bit3 (968~991) 24 979, Bit11 (967~990) 24 978,
1937 11:33:07.504935 TX Bit4 (973~996) 24 984, Bit12 (969~991) 23 980,
1938 11:33:07.511655 TX Bit5 (970~992) 23 981, Bit13 (969~990) 22 979,
1939 11:33:07.514994 TX Bit6 (971~994) 24 982, Bit14 (969~992) 24 980,
1940 11:33:07.518677 TX Bit7 (972~997) 26 984, Bit15 (973~995) 23 984,
1941 11:33:07.519081
1942 11:33:07.525430 wait MRW command Rank1 MR14 =0x1a fired (1)
1943 11:33:07.525876 Write Rank1 MR14 =0x1a
1944 11:33:07.534594
1945 11:33:07.537835 CH=0, VrefRange= 0, VrefLevel = 26
1946 11:33:07.540969 TX Bit0 (975~998) 24 986, Bit8 (966~990) 25 978,
1947 11:33:07.545325 TX Bit1 (974~996) 23 985, Bit9 (968~991) 24 979,
1948 11:33:07.551552 TX Bit2 (975~997) 23 986, Bit10 (973~996) 24 984,
1949 11:33:07.554834 TX Bit3 (969~991) 23 980, Bit11 (967~990) 24 978,
1950 11:33:07.557817 TX Bit4 (972~997) 26 984, Bit12 (969~991) 23 980,
1951 11:33:07.564264 TX Bit5 (970~993) 24 981, Bit13 (969~990) 22 979,
1952 11:33:07.567456 TX Bit6 (971~994) 24 982, Bit14 (969~992) 24 980,
1953 11:33:07.570431 TX Bit7 (971~997) 27 984, Bit15 (972~995) 24 983,
1954 11:33:07.570540
1955 11:33:07.573742 Write Rank1 MR14 =0x1c
1956 11:33:07.583152
1957 11:33:07.586506 CH=0, VrefRange= 0, VrefLevel = 28
1958 11:33:07.589742 TX Bit0 (975~998) 24 986, Bit8 (966~990) 25 978,
1959 11:33:07.593011 TX Bit1 (973~997) 25 985, Bit9 (968~991) 24 979,
1960 11:33:07.600048 TX Bit2 (975~997) 23 986, Bit10 (972~997) 26 984,
1961 11:33:07.603330 TX Bit3 (968~992) 25 980, Bit11 (967~990) 24 978,
1962 11:33:07.606465 TX Bit4 (972~997) 26 984, Bit12 (968~992) 25 980,
1963 11:33:07.613561 TX Bit5 (970~993) 24 981, Bit13 (969~990) 22 979,
1964 11:33:07.616589 TX Bit6 (970~995) 26 982, Bit14 (969~992) 24 980,
1965 11:33:07.619600 TX Bit7 (971~997) 27 984, Bit15 (971~996) 26 983,
1966 11:33:07.619698
1967 11:33:07.626491 wait MRW command Rank1 MR14 =0x1e fired (1)
1968 11:33:07.626592 Write Rank1 MR14 =0x1e
1969 11:33:07.636021
1970 11:33:07.636126 CH=0, VrefRange= 0, VrefLevel = 30
1971 11:33:07.642636 TX Bit0 (975~999) 25 987, Bit8 (966~990) 25 978,
1972 11:33:07.646076 TX Bit1 (973~997) 25 985, Bit9 (968~991) 24 979,
1973 11:33:07.652949 TX Bit2 (975~998) 24 986, Bit10 (972~997) 26 984,
1974 11:33:07.656350 TX Bit3 (968~992) 25 980, Bit11 (967~990) 24 978,
1975 11:33:07.659505 TX Bit4 (971~997) 27 984, Bit12 (968~992) 25 980,
1976 11:33:07.666072 TX Bit5 (969~994) 26 981, Bit13 (969~991) 23 980,
1977 11:33:07.669392 TX Bit6 (970~996) 27 983, Bit14 (968~992) 25 980,
1978 11:33:07.673019 TX Bit7 (972~997) 26 984, Bit15 (970~995) 26 982,
1979 11:33:07.673118
1980 11:33:07.676161 Write Rank1 MR14 =0x20
1981 11:33:07.685455
1982 11:33:07.688422 CH=0, VrefRange= 0, VrefLevel = 32
1983 11:33:07.692180 TX Bit0 (974~999) 26 986, Bit8 (966~990) 25 978,
1984 11:33:07.695032 TX Bit1 (974~998) 25 986, Bit9 (968~991) 24 979,
1985 11:33:07.701563 TX Bit2 (975~998) 24 986, Bit10 (971~997) 27 984,
1986 11:33:07.705662 TX Bit3 (968~992) 25 980, Bit11 (967~990) 24 978,
1987 11:33:07.708568 TX Bit4 (972~998) 27 985, Bit12 (968~991) 24 979,
1988 11:33:07.715367 TX Bit5 (969~994) 26 981, Bit13 (969~991) 23 980,
1989 11:33:07.718574 TX Bit6 (970~996) 27 983, Bit14 (968~992) 25 980,
1990 11:33:07.722169 TX Bit7 (972~998) 27 985, Bit15 (971~995) 25 983,
1991 11:33:07.722258
1992 11:33:07.725252 Write Rank1 MR14 =0x22
1993 11:33:07.734281
1994 11:33:07.734380 CH=0, VrefRange= 0, VrefLevel = 34
1995 11:33:07.740863 TX Bit0 (974~999) 26 986, Bit8 (966~990) 25 978,
1996 11:33:07.744113 TX Bit1 (974~998) 25 986, Bit9 (968~991) 24 979,
1997 11:33:07.747763 TX Bit2 (975~998) 24 986, Bit10 (971~997) 27 984,
1998 11:33:07.754207 TX Bit3 (968~992) 25 980, Bit11 (967~990) 24 978,
1999 11:33:07.757500 TX Bit4 (972~998) 27 985, Bit12 (968~991) 24 979,
2000 11:33:07.764474 TX Bit5 (969~994) 26 981, Bit13 (969~991) 23 980,
2001 11:33:07.767747 TX Bit6 (970~996) 27 983, Bit14 (968~992) 25 980,
2002 11:33:07.771232 TX Bit7 (972~998) 27 985, Bit15 (971~995) 25 983,
2003 11:33:07.771328
2004 11:33:07.774284 Write Rank1 MR14 =0x24
2005 11:33:07.782916
2006 11:33:07.786648 CH=0, VrefRange= 0, VrefLevel = 36
2007 11:33:07.789846 TX Bit0 (974~999) 26 986, Bit8 (966~990) 25 978,
2008 11:33:07.793394 TX Bit1 (974~998) 25 986, Bit9 (968~991) 24 979,
2009 11:33:07.799953 TX Bit2 (975~998) 24 986, Bit10 (971~997) 27 984,
2010 11:33:07.803294 TX Bit3 (968~992) 25 980, Bit11 (967~990) 24 978,
2011 11:33:07.806536 TX Bit4 (972~998) 27 985, Bit12 (968~991) 24 979,
2012 11:33:07.813139 TX Bit5 (969~994) 26 981, Bit13 (969~991) 23 980,
2013 11:33:07.816399 TX Bit6 (970~996) 27 983, Bit14 (968~992) 25 980,
2014 11:33:07.819785 TX Bit7 (972~998) 27 985, Bit15 (971~995) 25 983,
2015 11:33:07.819869
2016 11:33:07.823209 Write Rank1 MR14 =0x26
2017 11:33:07.832276
2018 11:33:07.832359 CH=0, VrefRange= 0, VrefLevel = 38
2019 11:33:07.838621 TX Bit0 (974~999) 26 986, Bit8 (966~990) 25 978,
2020 11:33:07.842452 TX Bit1 (974~998) 25 986, Bit9 (968~991) 24 979,
2021 11:33:07.848778 TX Bit2 (975~998) 24 986, Bit10 (971~997) 27 984,
2022 11:33:07.852118 TX Bit3 (968~992) 25 980, Bit11 (967~990) 24 978,
2023 11:33:07.855801 TX Bit4 (972~998) 27 985, Bit12 (968~991) 24 979,
2024 11:33:07.862044 TX Bit5 (969~994) 26 981, Bit13 (969~991) 23 980,
2025 11:33:07.865313 TX Bit6 (970~996) 27 983, Bit14 (968~992) 25 980,
2026 11:33:07.868905 TX Bit7 (972~998) 27 985, Bit15 (971~995) 25 983,
2027 11:33:07.868990
2028 11:33:07.869055
2029 11:33:07.871958 TX Vref found, early break! 377< 383
2030 11:33:07.878891 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2031 11:33:07.882499 u1DelayCellOfst[0]=7 cells (6 PI)
2032 11:33:07.885833 u1DelayCellOfst[1]=7 cells (6 PI)
2033 11:33:07.888973 u1DelayCellOfst[2]=7 cells (6 PI)
2034 11:33:07.889058 u1DelayCellOfst[3]=0 cells (0 PI)
2035 11:33:07.892010 u1DelayCellOfst[4]=6 cells (5 PI)
2036 11:33:07.895786 u1DelayCellOfst[5]=1 cells (1 PI)
2037 11:33:07.898963 u1DelayCellOfst[6]=3 cells (3 PI)
2038 11:33:07.902007 u1DelayCellOfst[7]=6 cells (5 PI)
2039 11:33:07.905588 Byte0, DQ PI dly=980, DQM PI dly= 983
2040 11:33:07.909120 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2041 11:33:07.909241
2042 11:33:07.916150 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2043 11:33:07.916300
2044 11:33:07.919263 u1DelayCellOfst[8]=0 cells (0 PI)
2045 11:33:07.922519 u1DelayCellOfst[9]=1 cells (1 PI)
2046 11:33:07.922644 u1DelayCellOfst[10]=7 cells (6 PI)
2047 11:33:07.925882 u1DelayCellOfst[11]=0 cells (0 PI)
2048 11:33:07.929194 u1DelayCellOfst[12]=1 cells (1 PI)
2049 11:33:07.932375 u1DelayCellOfst[13]=2 cells (2 PI)
2050 11:33:07.935786 u1DelayCellOfst[14]=2 cells (2 PI)
2051 11:33:07.939127 u1DelayCellOfst[15]=6 cells (5 PI)
2052 11:33:07.942259 Byte1, DQ PI dly=978, DQM PI dly= 981
2053 11:33:07.946028 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2054 11:33:07.946115
2055 11:33:07.952430 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2056 11:33:07.952534
2057 11:33:07.952600 Write Rank1 MR14 =0x20
2058 11:33:07.952660
2059 11:33:07.955941 Final TX Range 0 Vref 32
2060 11:33:07.956025
2061 11:33:07.962481 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2062 11:33:07.962575
2063 11:33:07.969326 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2064 11:33:07.975983 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2065 11:33:07.982684 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2066 11:33:07.986049 Write Rank1 MR3 =0xb0
2067 11:33:07.986134 DramC Write-DBI on
2068 11:33:07.989441 ==
2069 11:33:07.992671 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2070 11:33:07.996303 fsp= 1, odt_onoff= 1, Byte mode= 0
2071 11:33:07.996391 ==
2072 11:33:07.999228 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2073 11:33:07.999315
2074 11:33:08.002413 Begin, DQ Scan Range 701~765
2075 11:33:08.002500
2076 11:33:08.002586
2077 11:33:08.005690 TX Vref Scan disable
2078 11:33:08.009324 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2079 11:33:08.012389 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2080 11:33:08.015703 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2081 11:33:08.019483 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2082 11:33:08.022543 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2083 11:33:08.025787 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2084 11:33:08.029161 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2085 11:33:08.032348 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2086 11:33:08.035688 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2087 11:33:08.038878 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2088 11:33:08.042238 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2089 11:33:08.045841 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2090 11:33:08.048891 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2091 11:33:08.052220 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2092 11:33:08.062230 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2093 11:33:08.065676 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2094 11:33:08.068748 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2095 11:33:08.072001 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2096 11:33:08.075676 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2097 11:33:08.078950 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2098 11:33:08.082428 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2099 11:33:08.085448 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2100 11:33:08.088712 Byte0, DQ PI dly=728, DQM PI dly= 728
2101 11:33:08.091923 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
2102 11:33:08.092015
2103 11:33:08.098683 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
2104 11:33:08.098771
2105 11:33:08.101947 Byte1, DQ PI dly=723, DQM PI dly= 723
2106 11:33:08.105447 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2107 11:33:08.105535
2108 11:33:08.109120 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2109 11:33:08.109209
2110 11:33:08.115450 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2111 11:33:08.122603 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2112 11:33:08.132012 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2113 11:33:08.132100 Write Rank1 MR3 =0x30
2114 11:33:08.135907 DramC Write-DBI off
2115 11:33:08.135994
2116 11:33:08.136080 [DATLAT]
2117 11:33:08.139234 Freq=1600, CH0 RK1, use_rxtx_scan=0
2118 11:33:08.139322
2119 11:33:08.142711 DATLAT Default: 0x10
2120 11:33:08.142798 7, 0xFFFF, sum=0
2121 11:33:08.142886 8, 0xFFFF, sum=0
2122 11:33:08.145814 9, 0xFFFF, sum=0
2123 11:33:08.145902 10, 0xFFFF, sum=0
2124 11:33:08.148982 11, 0xFFFF, sum=0
2125 11:33:08.149071 12, 0xFFFF, sum=0
2126 11:33:08.152220 13, 0xFFFF, sum=0
2127 11:33:08.152309 14, 0x0, sum=1
2128 11:33:08.155582 15, 0x0, sum=2
2129 11:33:08.155670 16, 0x0, sum=3
2130 11:33:08.158833 17, 0x0, sum=4
2131 11:33:08.162643 pattern=2 first_step=14 total pass=5 best_step=16
2132 11:33:08.162730 ==
2133 11:33:08.165690 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2134 11:33:08.169037 fsp= 1, odt_onoff= 1, Byte mode= 0
2135 11:33:08.169125 ==
2136 11:33:08.176392 Start DQ dly to find pass range UseTestEngine =1
2137 11:33:08.179676 x-axis: bit #, y-axis: DQ dly (-127~63)
2138 11:33:08.179759 RX Vref Scan = 0
2139 11:33:08.182879 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2140 11:33:08.186089 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2141 11:33:08.189683 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2142 11:33:08.193001 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2143 11:33:08.193086 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2144 11:33:08.196074 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2145 11:33:08.200167 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2146 11:33:08.203019 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2147 11:33:08.206240 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2148 11:33:08.209519 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2149 11:33:08.213139 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2150 11:33:08.216416 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2151 11:33:08.216511 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2152 11:33:08.219539 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2153 11:33:08.222908 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2154 11:33:08.226279 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2155 11:33:08.229808 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2156 11:33:08.233145 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2157 11:33:08.236370 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2158 11:33:08.239766 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2159 11:33:08.239851 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2160 11:33:08.243009 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2161 11:33:08.246919 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2162 11:33:08.250318 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2163 11:33:08.253361 -2, [0] xxxoxxxx oxxoxxxx [MSB]
2164 11:33:08.256587 -1, [0] xxxoxxxx oxxoxxxx [MSB]
2165 11:33:08.256672 0, [0] xxxoxxxx oxxoxxxx [MSB]
2166 11:33:08.259959 1, [0] xxxoxoxx ooxoooxx [MSB]
2167 11:33:08.263222 2, [0] xxxoxoxx ooxoooxx [MSB]
2168 11:33:08.266606 3, [0] xxxoxooo ooxoooox [MSB]
2169 11:33:08.269829 4, [0] xxxoxooo ooxoooox [MSB]
2170 11:33:08.273263 5, [0] xoxooooo ooxoooox [MSB]
2171 11:33:08.273348 6, [0] oooooooo ooxooooo [MSB]
2172 11:33:08.278581 33, [0] oooooooo xooooooo [MSB]
2173 11:33:08.281658 34, [0] oooxoooo xooooooo [MSB]
2174 11:33:08.285089 35, [0] oooxoxoo xooxoooo [MSB]
2175 11:33:08.288215 36, [0] oooxoxoo xooxoxoo [MSB]
2176 11:33:08.291860 37, [0] oooxoxoo xxoxoxoo [MSB]
2177 11:33:08.295168 38, [0] oooxoxxo xxoxxxxo [MSB]
2178 11:33:08.295253 39, [0] oxxxoxxx xxoxxxxo [MSB]
2179 11:33:08.298496 40, [0] oxxxxxxx xxoxxxxx [MSB]
2180 11:33:08.301928 41, [0] xxxxxxxx xxoxxxxx [MSB]
2181 11:33:08.305064 42, [0] xxxxxxxx xxoxxxxx [MSB]
2182 11:33:08.308451 43, [0] xxxxxxxx xxoxxxxx [MSB]
2183 11:33:08.311911 44, [0] xxxxxxxx xxxxxxxx [MSB]
2184 11:33:08.315238 iDelay=44, Bit 0, Center 23 (6 ~ 40) 35
2185 11:33:08.318628 iDelay=44, Bit 1, Center 21 (5 ~ 38) 34
2186 11:33:08.322093 iDelay=44, Bit 2, Center 22 (6 ~ 38) 33
2187 11:33:08.325458 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2188 11:33:08.328465 iDelay=44, Bit 4, Center 22 (5 ~ 39) 35
2189 11:33:08.332025 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2190 11:33:08.335573 iDelay=44, Bit 6, Center 20 (3 ~ 37) 35
2191 11:33:08.338783 iDelay=44, Bit 7, Center 20 (3 ~ 38) 36
2192 11:33:08.342086 iDelay=44, Bit 8, Center 15 (-2 ~ 32) 35
2193 11:33:08.345035 iDelay=44, Bit 9, Center 18 (1 ~ 36) 36
2194 11:33:08.348435 iDelay=44, Bit 10, Center 25 (7 ~ 43) 37
2195 11:33:08.355341 iDelay=44, Bit 11, Center 16 (-2 ~ 34) 37
2196 11:33:08.358535 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
2197 11:33:08.361837 iDelay=44, Bit 13, Center 18 (1 ~ 35) 35
2198 11:33:08.365602 iDelay=44, Bit 14, Center 20 (3 ~ 37) 35
2199 11:33:08.368766 iDelay=44, Bit 15, Center 22 (6 ~ 39) 34
2200 11:33:08.368851 ==
2201 11:33:08.372176 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2202 11:33:08.375340 fsp= 1, odt_onoff= 1, Byte mode= 0
2203 11:33:08.375425 ==
2204 11:33:08.378637 DQS Delay:
2205 11:33:08.378722 DQS0 = 0, DQS1 = 0
2206 11:33:08.382168 DQM Delay:
2207 11:33:08.382254 DQM0 = 20, DQM1 = 19
2208 11:33:08.382320 DQ Delay:
2209 11:33:08.385412 DQ0 =23, DQ1 =21, DQ2 =22, DQ3 =15
2210 11:33:08.388725 DQ4 =22, DQ5 =17, DQ6 =20, DQ7 =20
2211 11:33:08.391819 DQ8 =15, DQ9 =18, DQ10 =25, DQ11 =16
2212 11:33:08.395551 DQ12 =19, DQ13 =18, DQ14 =20, DQ15 =22
2213 11:33:08.395634
2214 11:33:08.395699
2215 11:33:08.395759
2216 11:33:08.398679 [DramC_TX_OE_Calibration] TA2
2217 11:33:08.402149 Original DQ_B0 (3 6) =30, OEN = 27
2218 11:33:08.405257 Original DQ_B1 (3 6) =30, OEN = 27
2219 11:33:08.408940 23, 0x0, End_B0=23 End_B1=23
2220 11:33:08.412130 24, 0x0, End_B0=24 End_B1=24
2221 11:33:08.412220 25, 0x0, End_B0=25 End_B1=25
2222 11:33:08.415189 26, 0x0, End_B0=26 End_B1=26
2223 11:33:08.418858 27, 0x0, End_B0=27 End_B1=27
2224 11:33:08.421938 28, 0x0, End_B0=28 End_B1=28
2225 11:33:08.425685 29, 0x0, End_B0=29 End_B1=29
2226 11:33:08.425773 30, 0x0, End_B0=30 End_B1=30
2227 11:33:08.428714 31, 0xFFFF, End_B0=30 End_B1=30
2228 11:33:08.435535 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2229 11:33:08.438562 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2230 11:33:08.441948
2231 11:33:08.442036
2232 11:33:08.442122 Write Rank1 MR23 =0x3f
2233 11:33:08.442203 [DQSOSC]
2234 11:33:08.451823 [DQSOSCAuto] RK1, (LSB)MR18= 0xdcdc, (MSB)MR19= 0x202, tDQSOscB0 = 430 ps tDQSOscB1 = 430 ps
2235 11:33:08.458972 CH0_RK1: MR19=0x202, MR18=0xDCDC, DQSOSC=430, MR23=63, INC=13, DEC=19
2236 11:33:08.459103 Write Rank1 MR23 =0x3f
2237 11:33:08.462167 [DQSOSC]
2238 11:33:08.469005 [DQSOSCAuto] RK1, (LSB)MR18= 0xd9d9, (MSB)MR19= 0x202, tDQSOscB0 = 432 ps tDQSOscB1 = 432 ps
2239 11:33:08.471998 CH0 RK1: MR19=202, MR18=D9D9
2240 11:33:08.475805 [RxdqsGatingPostProcess] freq 1600
2241 11:33:08.478988 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2242 11:33:08.482462 Rank: 0
2243 11:33:08.482620 best DQS0 dly(2T, 0.5T) = (2, 5)
2244 11:33:08.485743 best DQS1 dly(2T, 0.5T) = (2, 5)
2245 11:33:08.489037 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2246 11:33:08.492302 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2247 11:33:08.492638 Rank: 1
2248 11:33:08.495617 best DQS0 dly(2T, 0.5T) = (2, 6)
2249 11:33:08.498907 best DQS1 dly(2T, 0.5T) = (2, 6)
2250 11:33:08.503036 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2251 11:33:08.506124 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2252 11:33:08.512565 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2253 11:33:08.515830 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2254 11:33:08.519203 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2255 11:33:08.523042 Write Rank0 MR13 =0x59
2256 11:33:08.523572 ==
2257 11:33:08.526351 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2258 11:33:08.529511 fsp= 1, odt_onoff= 1, Byte mode= 0
2259 11:33:08.530018 ==
2260 11:33:08.532707 === u2Vref_new: 0x56 --> 0x3a
2261 11:33:08.535982 === u2Vref_new: 0x58 --> 0x58
2262 11:33:08.539289 === u2Vref_new: 0x5a --> 0x5a
2263 11:33:08.542570 === u2Vref_new: 0x5c --> 0x78
2264 11:33:08.546113 === u2Vref_new: 0x5e --> 0x7a
2265 11:33:08.549484 === u2Vref_new: 0x60 --> 0x90
2266 11:33:08.552734 [CA 0] Center 38 (13~63) winsize 51
2267 11:33:08.555844 [CA 1] Center 37 (12~63) winsize 52
2268 11:33:08.559346 [CA 2] Center 34 (6~63) winsize 58
2269 11:33:08.562542 [CA 3] Center 34 (6~63) winsize 58
2270 11:33:08.565763 [CA 4] Center 34 (6~63) winsize 58
2271 11:33:08.566242 [CA 5] Center 28 (-2~58) winsize 61
2272 11:33:08.569433
2273 11:33:08.572656 [CATrainingPosCal] consider 1 rank data
2274 11:33:08.573177 u2DelayCellTimex100 = 735/100 ps
2275 11:33:08.579167 CA0 delay=38 (13~63),Diff = 10 PI (13 cell)
2276 11:33:08.582855 CA1 delay=37 (12~63),Diff = 9 PI (11 cell)
2277 11:33:08.586120 CA2 delay=34 (6~63),Diff = 6 PI (7 cell)
2278 11:33:08.589187 CA3 delay=34 (6~63),Diff = 6 PI (7 cell)
2279 11:33:08.592759 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2280 11:33:08.596012 CA5 delay=28 (-2~58),Diff = 0 PI (0 cell)
2281 11:33:08.596540
2282 11:33:08.599124 CA PerBit enable=1, Macro0, CA PI delay=28
2283 11:33:08.602852 === u2Vref_new: 0x60 --> 0x90
2284 11:33:08.603367
2285 11:33:08.606084 Vref(ca) range 1: 32
2286 11:33:08.606580
2287 11:33:08.607030 CS Dly= 11 (42-0-32)
2288 11:33:08.609579 Write Rank0 MR13 =0xd8
2289 11:33:08.613247 Write Rank0 MR13 =0xd8
2290 11:33:08.613800 Write Rank0 MR12 =0x60
2291 11:33:08.616542 Write Rank1 MR13 =0x59
2292 11:33:08.617090 ==
2293 11:33:08.619862 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2294 11:33:08.622742 fsp= 1, odt_onoff= 1, Byte mode= 0
2295 11:33:08.623252 ==
2296 11:33:08.626549 === u2Vref_new: 0x56 --> 0x3a
2297 11:33:08.629951 === u2Vref_new: 0x58 --> 0x58
2298 11:33:08.632755 === u2Vref_new: 0x5a --> 0x5a
2299 11:33:08.636511 === u2Vref_new: 0x5c --> 0x78
2300 11:33:08.639635 === u2Vref_new: 0x5e --> 0x7a
2301 11:33:08.643103 === u2Vref_new: 0x60 --> 0x90
2302 11:33:08.646430 [CA 0] Center 38 (13~63) winsize 51
2303 11:33:08.649542 [CA 1] Center 37 (12~63) winsize 52
2304 11:33:08.653104 [CA 2] Center 35 (7~63) winsize 57
2305 11:33:08.655847 [CA 3] Center 34 (6~63) winsize 58
2306 11:33:08.659605 [CA 4] Center 34 (6~63) winsize 58
2307 11:33:08.662650 [CA 5] Center 27 (-3~57) winsize 61
2308 11:33:08.663036
2309 11:33:08.666509 [CATrainingPosCal] consider 2 rank data
2310 11:33:08.669580 u2DelayCellTimex100 = 735/100 ps
2311 11:33:08.672627 CA0 delay=38 (13~63),Diff = 11 PI (14 cell)
2312 11:33:08.675849 CA1 delay=37 (12~63),Diff = 10 PI (13 cell)
2313 11:33:08.679690 CA2 delay=35 (7~63),Diff = 8 PI (10 cell)
2314 11:33:08.682679 CA3 delay=34 (6~63),Diff = 7 PI (9 cell)
2315 11:33:08.686004 CA4 delay=34 (6~63),Diff = 7 PI (9 cell)
2316 11:33:08.689455 CA5 delay=27 (-2~57),Diff = 0 PI (0 cell)
2317 11:33:08.689941
2318 11:33:08.696262 CA PerBit enable=1, Macro0, CA PI delay=27
2319 11:33:08.696843 === u2Vref_new: 0x5e --> 0x7a
2320 11:33:08.697315
2321 11:33:08.699345 Vref(ca) range 1: 30
2322 11:33:08.699833
2323 11:33:08.702696 CS Dly= 11 (42-0-32)
2324 11:33:08.703183 Write Rank1 MR13 =0xd8
2325 11:33:08.705935 Write Rank1 MR13 =0xd8
2326 11:33:08.706442 Write Rank1 MR12 =0x5e
2327 11:33:08.712791 [RankSwap] Rank num 2, (Multi 1), Rank 0
2328 11:33:08.713175 Write Rank0 MR2 =0xad
2329 11:33:08.715937 [Write Leveling]
2330 11:33:08.719566 delay byte0 byte1 byte2 byte3
2331 11:33:08.719946
2332 11:33:08.720244 10 0 0
2333 11:33:08.720564 11 0 0
2334 11:33:08.722916 12 0 0
2335 11:33:08.723305 13 0 0
2336 11:33:08.726130 14 0 0
2337 11:33:08.726518 15 0 0
2338 11:33:08.726821 16 0 0
2339 11:33:08.729382 17 0 0
2340 11:33:08.729771 18 0 0
2341 11:33:08.733002 19 0 0
2342 11:33:08.733566 20 0 0
2343 11:33:08.736073 21 0 0
2344 11:33:08.736637 22 0 0
2345 11:33:08.737141 23 0 0
2346 11:33:08.739404 24 0 ff
2347 11:33:08.739903 25 0 ff
2348 11:33:08.743005 26 0 ff
2349 11:33:08.743120 27 0 ff
2350 11:33:08.746329 28 0 ff
2351 11:33:08.746414 29 0 ff
2352 11:33:08.746481 30 0 ff
2353 11:33:08.749554 31 0 ff
2354 11:33:08.749627 32 0 ff
2355 11:33:08.752795 33 0 ff
2356 11:33:08.752868 34 ff ff
2357 11:33:08.756013 35 ff ff
2358 11:33:08.756113 36 ff ff
2359 11:33:08.759073 37 ff ff
2360 11:33:08.759170 38 ff ff
2361 11:33:08.762466 39 ff ff
2362 11:33:08.762572 40 ff ff
2363 11:33:08.766156 pass bytecount = 0xff (0xff: all bytes pass)
2364 11:33:08.766260
2365 11:33:08.769117 DQS0 dly: 34
2366 11:33:08.769218 DQS1 dly: 24
2367 11:33:08.772588 Write Rank0 MR2 =0x2d
2368 11:33:08.775703 [RankSwap] Rank num 2, (Multi 1), Rank 0
2369 11:33:08.775816 Write Rank0 MR1 =0xd6
2370 11:33:08.779454 [Gating]
2371 11:33:08.779558 ==
2372 11:33:08.782597 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2373 11:33:08.786109 fsp= 1, odt_onoff= 1, Byte mode= 0
2374 11:33:08.786193 ==
2375 11:33:08.789008 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2376 11:33:08.796129 3 1 4 |2b2a 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2377 11:33:08.799275 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2378 11:33:08.802537 3 1 12 |a09 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
2379 11:33:08.809131 3 1 16 |1818 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
2380 11:33:08.812296 [Byte 1] Lead/lag falling Transition (3, 1, 16)
2381 11:33:08.816017 3 1 20 |3433 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2382 11:33:08.822738 3 1 24 |3333 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2383 11:33:08.826168 3 1 28 |3332 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2384 11:33:08.829403 3 2 0 |2e2e 2c2b |(0 0)(11 11) |(0 1)(1 0)| 0
2385 11:33:08.832829 3 2 4 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2386 11:33:08.839233 3 2 8 |3131 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2387 11:33:08.843145 3 2 12 |3332 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
2388 11:33:08.846204 3 2 16 |2221 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2389 11:33:08.849043 [Byte 1] Lead/lag Transition tap number (9)
2390 11:33:08.856375 3 2 20 |1919 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2391 11:33:08.859505 [Byte 0] Lead/lag Transition tap number (1)
2392 11:33:08.862830 3 2 24 |3a39 605 |(11 11)(11 11) |(0 0)(0 0)| 0
2393 11:33:08.866006 3 2 28 |f0f 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2394 11:33:08.872650 3 3 0 |3838 3534 |(0 0)(11 11) |(1 1)(0 0)| 0
2395 11:33:08.876011 3 3 4 |3939 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2396 11:33:08.879628 3 3 8 |3838 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2397 11:33:08.885976 3 3 12 |1b1b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2398 11:33:08.889283 3 3 16 |2625 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2399 11:33:08.893239 3 3 20 |1111 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2400 11:33:08.896436 [Byte 0] Lead/lag falling Transition (3, 3, 20)
2401 11:33:08.903249 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2402 11:33:08.906304 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2403 11:33:08.909641 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2404 11:33:08.916415 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2405 11:33:08.919812 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2406 11:33:08.923084 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2407 11:33:08.929430 3 4 16 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2408 11:33:08.933146 3 4 20 |1515 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2409 11:33:08.936417 3 4 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2410 11:33:08.943161 3 4 28 |3d3d 3131 |(11 11)(11 11) |(1 1)(1 1)| 0
2411 11:33:08.946281 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2412 11:33:08.949749 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2413 11:33:08.953273 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2414 11:33:08.959465 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2415 11:33:08.962774 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2416 11:33:08.966361 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2417 11:33:08.972812 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2418 11:33:08.976181 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2419 11:33:08.979929 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2420 11:33:08.986478 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2421 11:33:08.989640 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2422 11:33:08.992803 [Byte 0] Lead/lag falling Transition (3, 6, 8)
2423 11:33:08.996083 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2424 11:33:09.002727 [Byte 0] Lead/lag Transition tap number (2)
2425 11:33:09.006545 3 6 16 |2c2c 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2426 11:33:09.009864 [Byte 1] Lead/lag falling Transition (3, 6, 16)
2427 11:33:09.015968 3 6 20 |606 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2428 11:33:09.019515 [Byte 1] Lead/lag Transition tap number (2)
2429 11:33:09.022724 3 6 24 |4646 403 |(0 0)(11 11) |(0 0)(0 0)| 0
2430 11:33:09.025913 [Byte 0]First pass (3, 6, 24)
2431 11:33:09.029349 3 6 28 |4646 1212 |(0 0)(11 11) |(0 0)(0 0)| 0
2432 11:33:09.032793 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2433 11:33:09.036008 [Byte 1]First pass (3, 7, 0)
2434 11:33:09.039279 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2435 11:33:09.042707 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2436 11:33:09.049570 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2437 11:33:09.052527 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2438 11:33:09.056067 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2439 11:33:09.059850 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2440 11:33:09.062892 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2441 11:33:09.069211 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2442 11:33:09.073336 All bytes gating window > 1UI, Early break!
2443 11:33:09.073421
2444 11:33:09.076217 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
2445 11:33:09.076301
2446 11:33:09.079630 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
2447 11:33:09.079714
2448 11:33:09.079783
2449 11:33:09.079849
2450 11:33:09.082817 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
2451 11:33:09.082901
2452 11:33:09.089365 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
2453 11:33:09.089449
2454 11:33:09.089514
2455 11:33:09.089573 Write Rank0 MR1 =0x56
2456 11:33:09.089630
2457 11:33:09.092574 best RODT dly(2T, 0.5T) = (2, 3)
2458 11:33:09.092657
2459 11:33:09.095802 best RODT dly(2T, 0.5T) = (2, 3)
2460 11:33:09.095885 ==
2461 11:33:09.102557 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2462 11:33:09.106193 fsp= 1, odt_onoff= 1, Byte mode= 0
2463 11:33:09.106277 ==
2464 11:33:09.109301 Start DQ dly to find pass range UseTestEngine =0
2465 11:33:09.112589 x-axis: bit #, y-axis: DQ dly (-127~63)
2466 11:33:09.116197 RX Vref Scan = 0
2467 11:33:09.116284 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2468 11:33:09.119179 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2469 11:33:09.122911 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2470 11:33:09.126083 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2471 11:33:09.129174 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2472 11:33:09.133163 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2473 11:33:09.136166 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2474 11:33:09.139499 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2475 11:33:09.142946 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2476 11:33:09.143032 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2477 11:33:09.146210 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2478 11:33:09.149125 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2479 11:33:09.152845 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2480 11:33:09.156031 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2481 11:33:09.159088 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2482 11:33:09.162529 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2483 11:33:09.165859 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2484 11:33:09.165974 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2485 11:33:09.169114 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2486 11:33:09.172778 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2487 11:33:09.175839 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2488 11:33:09.179247 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2489 11:33:09.182479 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2490 11:33:09.186293 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2491 11:33:09.186364 -2, [0] xxxoxxxx xoxxxxxo [MSB]
2492 11:33:09.189451 -1, [0] xxxoxxxx ooxxxxxo [MSB]
2493 11:33:09.192511 0, [0] xxxoxxxx ooxxxxxo [MSB]
2494 11:33:09.196001 1, [0] xxxoxxxx ooxxxxxo [MSB]
2495 11:33:09.199585 2, [0] xxooxxxx ooxxxxxo [MSB]
2496 11:33:09.202671 3, [0] xxooxxxo oooxxxxo [MSB]
2497 11:33:09.202778 4, [0] oxoooxxo oooxooxo [MSB]
2498 11:33:09.205916 5, [0] oooooxoo ooooooxo [MSB]
2499 11:33:09.209175 31, [0] oooooooo ooooooox [MSB]
2500 11:33:09.212424 32, [0] oooooooo ooooooox [MSB]
2501 11:33:09.215817 33, [0] oooooooo ooooooox [MSB]
2502 11:33:09.219708 34, [0] oooooooo ooooooox [MSB]
2503 11:33:09.219819 35, [0] oooxoooo ooooooox [MSB]
2504 11:33:09.222650 36, [0] oooxoooo xxooooox [MSB]
2505 11:33:09.225935 37, [0] ooxxoooo xxooooox [MSB]
2506 11:33:09.229716 38, [0] ooxxoooo xxooooox [MSB]
2507 11:33:09.232438 39, [0] ooxxooox xxooooox [MSB]
2508 11:33:09.235849 40, [0] oxxxxoox xxxoooox [MSB]
2509 11:33:09.239506 41, [0] xxxxxoox xxxxxxxx [MSB]
2510 11:33:09.239616 42, [0] xxxxxoxx xxxxxxxx [MSB]
2511 11:33:09.242795 43, [0] xxxxxxxx xxxxxxxx [MSB]
2512 11:33:09.246234 iDelay=43, Bit 0, Center 22 (4 ~ 40) 37
2513 11:33:09.249245 iDelay=43, Bit 1, Center 22 (5 ~ 39) 35
2514 11:33:09.255847 iDelay=43, Bit 2, Center 19 (2 ~ 36) 35
2515 11:33:09.259077 iDelay=43, Bit 3, Center 16 (-2 ~ 34) 37
2516 11:33:09.262512 iDelay=43, Bit 4, Center 21 (4 ~ 39) 36
2517 11:33:09.265681 iDelay=43, Bit 5, Center 24 (6 ~ 42) 37
2518 11:33:09.269330 iDelay=43, Bit 6, Center 23 (5 ~ 41) 37
2519 11:33:09.272451 iDelay=43, Bit 7, Center 20 (3 ~ 38) 36
2520 11:33:09.275591 iDelay=43, Bit 8, Center 17 (-1 ~ 35) 37
2521 11:33:09.279094 iDelay=43, Bit 9, Center 16 (-2 ~ 35) 38
2522 11:33:09.282640 iDelay=43, Bit 10, Center 21 (3 ~ 39) 37
2523 11:33:09.285631 iDelay=43, Bit 11, Center 22 (5 ~ 40) 36
2524 11:33:09.288809 iDelay=43, Bit 12, Center 22 (4 ~ 40) 37
2525 11:33:09.292172 iDelay=43, Bit 13, Center 22 (4 ~ 40) 37
2526 11:33:09.298749 iDelay=43, Bit 14, Center 23 (6 ~ 40) 35
2527 11:33:09.302153 iDelay=43, Bit 15, Center 13 (-3 ~ 30) 34
2528 11:33:09.302223 ==
2529 11:33:09.305853 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2530 11:33:09.309210 fsp= 1, odt_onoff= 1, Byte mode= 0
2531 11:33:09.309283 ==
2532 11:33:09.312400 DQS Delay:
2533 11:33:09.312505 DQS0 = 0, DQS1 = 0
2534 11:33:09.312577 DQM Delay:
2535 11:33:09.315378 DQM0 = 20, DQM1 = 19
2536 11:33:09.315470 DQ Delay:
2537 11:33:09.319069 DQ0 =22, DQ1 =22, DQ2 =19, DQ3 =16
2538 11:33:09.322303 DQ4 =21, DQ5 =24, DQ6 =23, DQ7 =20
2539 11:33:09.325548 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
2540 11:33:09.328729 DQ12 =22, DQ13 =22, DQ14 =23, DQ15 =13
2541 11:33:09.328798
2542 11:33:09.328858
2543 11:33:09.332007 DramC Write-DBI off
2544 11:33:09.332101 ==
2545 11:33:09.335468 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2546 11:33:09.338691 fsp= 1, odt_onoff= 1, Byte mode= 0
2547 11:33:09.338802 ==
2548 11:33:09.345729 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2549 11:33:09.345839
2550 11:33:09.348659 Begin, DQ Scan Range 920~1176
2551 11:33:09.348761
2552 11:33:09.348857
2553 11:33:09.348948 TX Vref Scan disable
2554 11:33:09.352612 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
2555 11:33:09.355430 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
2556 11:33:09.358548 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
2557 11:33:09.362043 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
2558 11:33:09.368723 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2559 11:33:09.372062 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2560 11:33:09.375636 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2561 11:33:09.378620 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2562 11:33:09.381954 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2563 11:33:09.385756 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2564 11:33:09.388813 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2565 11:33:09.392041 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2566 11:33:09.395185 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2567 11:33:09.398393 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2568 11:33:09.402133 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2569 11:33:09.405416 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2570 11:33:09.408579 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2571 11:33:09.411920 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2572 11:33:09.415261 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2573 11:33:09.418659 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2574 11:33:09.425490 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2575 11:33:09.428254 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2576 11:33:09.432095 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2577 11:33:09.435379 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2578 11:33:09.438815 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2579 11:33:09.441537 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2580 11:33:09.445244 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2581 11:33:09.448310 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2582 11:33:09.451761 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2583 11:33:09.455094 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2584 11:33:09.458283 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2585 11:33:09.461876 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2586 11:33:09.465311 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2587 11:33:09.468087 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2588 11:33:09.471595 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2589 11:33:09.478148 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2590 11:33:09.481660 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2591 11:33:09.484827 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2592 11:33:09.487974 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2593 11:33:09.491598 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2594 11:33:09.495170 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2595 11:33:09.498049 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2596 11:33:09.501406 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2597 11:33:09.504468 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2598 11:33:09.507849 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2599 11:33:09.511389 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2600 11:33:09.514497 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2601 11:33:09.517704 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2602 11:33:09.521240 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2603 11:33:09.524430 969 |3 6 9|[0] xxxxxxxx xxxxxxxo [MSB]
2604 11:33:09.527704 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
2605 11:33:09.531446 971 |3 6 11|[0] xxxxxxxx ooxxxxxo [MSB]
2606 11:33:09.534801 972 |3 6 12|[0] xxxxxxxx oooxxxoo [MSB]
2607 11:33:09.537996 973 |3 6 13|[0] xxxxxxxx oooooxoo [MSB]
2608 11:33:09.544660 974 |3 6 14|[0] xxxxxxxx oooooxoo [MSB]
2609 11:33:09.548108 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
2610 11:33:09.551212 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
2611 11:33:09.554300 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2612 11:33:09.557611 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2613 11:33:09.561028 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2614 11:33:09.564412 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2615 11:33:09.567742 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
2616 11:33:09.571109 982 |3 6 22|[0] xooooxoo oooooooo [MSB]
2617 11:33:09.574640 983 |3 6 23|[0] oooooxoo oooooooo [MSB]
2618 11:33:09.577822 986 |3 6 26|[0] oooooooo ooooooox [MSB]
2619 11:33:09.581116 987 |3 6 27|[0] oooooooo ooooooox [MSB]
2620 11:33:09.584423 988 |3 6 28|[0] oooooooo oxooooox [MSB]
2621 11:33:09.587563 989 |3 6 29|[0] oooooooo xxooooox [MSB]
2622 11:33:09.591214 990 |3 6 30|[0] oooooooo xxooooox [MSB]
2623 11:33:09.598005 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
2624 11:33:09.600935 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2625 11:33:09.604607 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2626 11:33:09.607557 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2627 11:33:09.610979 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2628 11:33:09.614622 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2629 11:33:09.618002 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2630 11:33:09.620911 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2631 11:33:09.624161 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
2632 11:33:09.627847 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2633 11:33:09.631117 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2634 11:33:09.634231 1002 |3 6 42|[0] oxxxooox xxxxxxxx [MSB]
2635 11:33:09.637568 1003 |3 6 43|[0] oxxxooxx xxxxxxxx [MSB]
2636 11:33:09.641386 1004 |3 6 44|[0] xxxxxxxx xxxxxxxx [MSB]
2637 11:33:09.644609 Byte0, DQ PI dly=991, DQM PI dly= 991
2638 11:33:09.651079 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
2639 11:33:09.651162
2640 11:33:09.654565 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
2641 11:33:09.654649
2642 11:33:09.657501 Byte1, DQ PI dly=979, DQM PI dly= 979
2643 11:33:09.664200 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2644 11:33:09.664311
2645 11:33:09.667373 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2646 11:33:09.667477
2647 11:33:09.667569 ==
2648 11:33:09.674250 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2649 11:33:09.674336 fsp= 1, odt_onoff= 1, Byte mode= 0
2650 11:33:09.677301 ==
2651 11:33:09.680918 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2652 11:33:09.681001
2653 11:33:09.683792 Begin, DQ Scan Range 955~1019
2654 11:33:09.683874 Write Rank0 MR14 =0x0
2655 11:33:09.694170
2656 11:33:09.694253 CH=1, VrefRange= 0, VrefLevel = 0
2657 11:33:09.700724 TX Bit0 (985~1000) 16 992, Bit8 (973~984) 12 978,
2658 11:33:09.703842 TX Bit1 (984~997) 14 990, Bit9 (974~983) 10 978,
2659 11:33:09.710755 TX Bit2 (983~997) 15 990, Bit10 (976~986) 11 981,
2660 11:33:09.713825 TX Bit3 (981~992) 12 986, Bit11 (976~987) 12 981,
2661 11:33:09.717399 TX Bit4 (984~998) 15 991, Bit12 (975~987) 13 981,
2662 11:33:09.724346 TX Bit5 (985~998) 14 991, Bit13 (977~988) 12 982,
2663 11:33:09.727490 TX Bit6 (984~998) 15 991, Bit14 (975~986) 12 980,
2664 11:33:09.730561 TX Bit7 (984~997) 14 990, Bit15 (969~979) 11 974,
2665 11:33:09.730645
2666 11:33:09.734055 Write Rank0 MR14 =0x2
2667 11:33:09.743804
2668 11:33:09.743887 CH=1, VrefRange= 0, VrefLevel = 2
2669 11:33:09.750072 TX Bit0 (984~1001) 18 992, Bit8 (974~984) 11 979,
2670 11:33:09.753375 TX Bit1 (984~998) 15 991, Bit9 (972~983) 12 977,
2671 11:33:09.759689 TX Bit2 (982~998) 17 990, Bit10 (975~987) 13 981,
2672 11:33:09.763250 TX Bit3 (980~993) 14 986, Bit11 (976~987) 12 981,
2673 11:33:09.766511 TX Bit4 (984~999) 16 991, Bit12 (975~988) 14 981,
2674 11:33:09.773067 TX Bit5 (985~999) 15 992, Bit13 (976~988) 13 982,
2675 11:33:09.776261 TX Bit6 (984~999) 16 991, Bit14 (975~986) 12 980,
2676 11:33:09.780035 TX Bit7 (984~998) 15 991, Bit15 (969~980) 12 974,
2677 11:33:09.783218
2678 11:33:09.783300 Write Rank0 MR14 =0x4
2679 11:33:09.792528
2680 11:33:09.792611 CH=1, VrefRange= 0, VrefLevel = 4
2681 11:33:09.799084 TX Bit0 (984~1001) 18 992, Bit8 (971~985) 15 978,
2682 11:33:09.802740 TX Bit1 (983~999) 17 991, Bit9 (972~984) 13 978,
2683 11:33:09.809067 TX Bit2 (982~998) 17 990, Bit10 (975~988) 14 981,
2684 11:33:09.812576 TX Bit3 (979~994) 16 986, Bit11 (976~989) 14 982,
2685 11:33:09.815992 TX Bit4 (983~999) 17 991, Bit12 (975~988) 14 981,
2686 11:33:09.822650 TX Bit5 (985~1000) 16 992, Bit13 (976~989) 14 982,
2687 11:33:09.825745 TX Bit6 (984~999) 16 991, Bit14 (974~987) 14 980,
2688 11:33:09.828984 TX Bit7 (984~998) 15 991, Bit15 (969~981) 13 975,
2689 11:33:09.832238
2690 11:33:09.832344 Write Rank0 MR14 =0x6
2691 11:33:09.842057
2692 11:33:09.842141 CH=1, VrefRange= 0, VrefLevel = 6
2693 11:33:09.848469 TX Bit0 (984~1002) 19 993, Bit8 (972~985) 14 978,
2694 11:33:09.851848 TX Bit1 (983~999) 17 991, Bit9 (972~984) 13 978,
2695 11:33:09.858862 TX Bit2 (981~998) 18 989, Bit10 (974~989) 16 981,
2696 11:33:09.861964 TX Bit3 (979~996) 18 987, Bit11 (976~990) 15 983,
2697 11:33:09.865112 TX Bit4 (983~1000) 18 991, Bit12 (975~990) 16 982,
2698 11:33:09.871921 TX Bit5 (985~1000) 16 992, Bit13 (976~990) 15 983,
2699 11:33:09.875231 TX Bit6 (984~999) 16 991, Bit14 (974~988) 15 981,
2700 11:33:09.881832 TX Bit7 (983~998) 16 990, Bit15 (969~983) 15 976,
2701 11:33:09.881918
2702 11:33:09.881984 Write Rank0 MR14 =0x8
2703 11:33:09.892015
2704 11:33:09.892122 CH=1, VrefRange= 0, VrefLevel = 8
2705 11:33:09.898499 TX Bit0 (984~1003) 20 993, Bit8 (971~985) 15 978,
2706 11:33:09.901950 TX Bit1 (982~999) 18 990, Bit9 (972~985) 14 978,
2707 11:33:09.908160 TX Bit2 (981~999) 19 990, Bit10 (975~990) 16 982,
2708 11:33:09.911729 TX Bit3 (979~996) 18 987, Bit11 (975~990) 16 982,
2709 11:33:09.915197 TX Bit4 (982~1000) 19 991, Bit12 (974~991) 18 982,
2710 11:33:09.921905 TX Bit5 (984~1001) 18 992, Bit13 (976~990) 15 983,
2711 11:33:09.925008 TX Bit6 (983~1000) 18 991, Bit14 (974~990) 17 982,
2712 11:33:09.931224 TX Bit7 (983~999) 17 991, Bit15 (968~983) 16 975,
2713 11:33:09.931330
2714 11:33:09.931432 Write Rank0 MR14 =0xa
2715 11:33:09.941432
2716 11:33:09.945351 CH=1, VrefRange= 0, VrefLevel = 10
2717 11:33:09.948460 TX Bit0 (983~1003) 21 993, Bit8 (970~986) 17 978,
2718 11:33:09.951738 TX Bit1 (982~1000) 19 991, Bit9 (971~985) 15 978,
2719 11:33:09.958331 TX Bit2 (980~999) 20 989, Bit10 (974~990) 17 982,
2720 11:33:09.961521 TX Bit3 (979~998) 20 988, Bit11 (975~990) 16 982,
2721 11:33:09.964910 TX Bit4 (982~1001) 20 991, Bit12 (974~991) 18 982,
2722 11:33:09.971580 TX Bit5 (984~1002) 19 993, Bit13 (976~991) 16 983,
2723 11:33:09.974847 TX Bit6 (983~1000) 18 991, Bit14 (973~990) 18 981,
2724 11:33:09.981487 TX Bit7 (983~1000) 18 991, Bit15 (968~984) 17 976,
2725 11:33:09.981561
2726 11:33:09.981623 Write Rank0 MR14 =0xc
2727 11:33:09.992262
2728 11:33:09.995454 CH=1, VrefRange= 0, VrefLevel = 12
2729 11:33:09.999134 TX Bit0 (983~1004) 22 993, Bit8 (970~987) 18 978,
2730 11:33:10.001996 TX Bit1 (982~1000) 19 991, Bit9 (971~985) 15 978,
2731 11:33:10.008481 TX Bit2 (979~1000) 22 989, Bit10 (974~991) 18 982,
2732 11:33:10.012084 TX Bit3 (978~998) 21 988, Bit11 (974~991) 18 982,
2733 11:33:10.015358 TX Bit4 (982~1002) 21 992, Bit12 (973~992) 20 982,
2734 11:33:10.021990 TX Bit5 (984~1002) 19 993, Bit13 (975~991) 17 983,
2735 11:33:10.025486 TX Bit6 (983~1001) 19 992, Bit14 (974~991) 18 982,
2736 11:33:10.031881 TX Bit7 (983~1000) 18 991, Bit15 (968~984) 17 976,
2737 11:33:10.031978
2738 11:33:10.032067 Write Rank0 MR14 =0xe
2739 11:33:10.042490
2740 11:33:10.042596 CH=1, VrefRange= 0, VrefLevel = 14
2741 11:33:10.049166 TX Bit0 (983~1004) 22 993, Bit8 (970~987) 18 978,
2742 11:33:10.052105 TX Bit1 (981~1001) 21 991, Bit9 (970~986) 17 978,
2743 11:33:10.059428 TX Bit2 (979~1000) 22 989, Bit10 (973~991) 19 982,
2744 11:33:10.062525 TX Bit3 (978~998) 21 988, Bit11 (974~991) 18 982,
2745 11:33:10.065732 TX Bit4 (981~1002) 22 991, Bit12 (973~992) 20 982,
2746 11:33:10.072246 TX Bit5 (984~1003) 20 993, Bit13 (974~992) 19 983,
2747 11:33:10.075819 TX Bit6 (982~1002) 21 992, Bit14 (973~991) 19 982,
2748 11:33:10.082429 TX Bit7 (982~1001) 20 991, Bit15 (967~984) 18 975,
2749 11:33:10.082534
2750 11:33:10.082627 Write Rank0 MR14 =0x10
2751 11:33:10.093050
2752 11:33:10.093122 CH=1, VrefRange= 0, VrefLevel = 16
2753 11:33:10.099908 TX Bit0 (983~1005) 23 994, Bit8 (970~988) 19 979,
2754 11:33:10.103139 TX Bit1 (981~1001) 21 991, Bit9 (970~987) 18 978,
2755 11:33:10.109674 TX Bit2 (979~1001) 23 990, Bit10 (972~991) 20 981,
2756 11:33:10.112952 TX Bit3 (978~998) 21 988, Bit11 (973~992) 20 982,
2757 11:33:10.116201 TX Bit4 (981~1002) 22 991, Bit12 (972~992) 21 982,
2758 11:33:10.122683 TX Bit5 (983~1004) 22 993, Bit13 (975~992) 18 983,
2759 11:33:10.125926 TX Bit6 (982~1002) 21 992, Bit14 (972~992) 21 982,
2760 11:33:10.132519 TX Bit7 (982~1001) 20 991, Bit15 (967~985) 19 976,
2761 11:33:10.132600
2762 11:33:10.132677 Write Rank0 MR14 =0x12
2763 11:33:10.143673
2764 11:33:10.146780 CH=1, VrefRange= 0, VrefLevel = 18
2765 11:33:10.150039 TX Bit0 (982~1005) 24 993, Bit8 (970~989) 20 979,
2766 11:33:10.153277 TX Bit1 (980~1002) 23 991, Bit9 (969~987) 19 978,
2767 11:33:10.159965 TX Bit2 (978~1001) 24 989, Bit10 (972~992) 21 982,
2768 11:33:10.163315 TX Bit3 (978~999) 22 988, Bit11 (973~992) 20 982,
2769 11:33:10.166716 TX Bit4 (981~1004) 24 992, Bit12 (972~993) 22 982,
2770 11:33:10.173446 TX Bit5 (983~1004) 22 993, Bit13 (974~992) 19 983,
2771 11:33:10.176614 TX Bit6 (981~1003) 23 992, Bit14 (972~992) 21 982,
2772 11:33:10.183223 TX Bit7 (981~1002) 22 991, Bit15 (967~985) 19 976,
2773 11:33:10.183323
2774 11:33:10.183423 Write Rank0 MR14 =0x14
2775 11:33:10.194230
2776 11:33:10.197227 CH=1, VrefRange= 0, VrefLevel = 20
2777 11:33:10.200880 TX Bit0 (982~1005) 24 993, Bit8 (969~990) 22 979,
2778 11:33:10.204135 TX Bit1 (980~1003) 24 991, Bit9 (970~989) 20 979,
2779 11:33:10.211175 TX Bit2 (979~1002) 24 990, Bit10 (971~992) 22 981,
2780 11:33:10.214210 TX Bit3 (978~999) 22 988, Bit11 (972~992) 21 982,
2781 11:33:10.217564 TX Bit4 (980~1004) 25 992, Bit12 (971~993) 23 982,
2782 11:33:10.223981 TX Bit5 (983~1005) 23 994, Bit13 (974~993) 20 983,
2783 11:33:10.227238 TX Bit6 (981~1004) 24 992, Bit14 (971~992) 22 981,
2784 11:33:10.234057 TX Bit7 (981~1003) 23 992, Bit15 (967~986) 20 976,
2785 11:33:10.234141
2786 11:33:10.234205 Write Rank0 MR14 =0x16
2787 11:33:10.244668
2788 11:33:10.248187 CH=1, VrefRange= 0, VrefLevel = 22
2789 11:33:10.251863 TX Bit0 (982~1006) 25 994, Bit8 (969~991) 23 980,
2790 11:33:10.254939 TX Bit1 (979~1004) 26 991, Bit9 (970~989) 20 979,
2791 11:33:10.261404 TX Bit2 (978~1003) 26 990, Bit10 (971~992) 22 981,
2792 11:33:10.264893 TX Bit3 (978~1000) 23 989, Bit11 (971~992) 22 981,
2793 11:33:10.268113 TX Bit4 (980~1005) 26 992, Bit12 (971~993) 23 982,
2794 11:33:10.274695 TX Bit5 (983~1005) 23 994, Bit13 (974~993) 20 983,
2795 11:33:10.278079 TX Bit6 (980~1004) 25 992, Bit14 (971~993) 23 982,
2796 11:33:10.284907 TX Bit7 (980~1003) 24 991, Bit15 (966~986) 21 976,
2797 11:33:10.284986
2798 11:33:10.285071 Write Rank0 MR14 =0x18
2799 11:33:10.295880
2800 11:33:10.299212 CH=1, VrefRange= 0, VrefLevel = 24
2801 11:33:10.302552 TX Bit0 (981~1006) 26 993, Bit8 (969~991) 23 980,
2802 11:33:10.305971 TX Bit1 (980~1004) 25 992, Bit9 (969~990) 22 979,
2803 11:33:10.312226 TX Bit2 (978~1003) 26 990, Bit10 (970~992) 23 981,
2804 11:33:10.315465 TX Bit3 (977~1000) 24 988, Bit11 (971~993) 23 982,
2805 11:33:10.319228 TX Bit4 (980~1005) 26 992, Bit12 (971~994) 24 982,
2806 11:33:10.325698 TX Bit5 (982~1006) 25 994, Bit13 (973~993) 21 983,
2807 11:33:10.329210 TX Bit6 (980~1005) 26 992, Bit14 (971~993) 23 982,
2808 11:33:10.335572 TX Bit7 (979~1004) 26 991, Bit15 (966~987) 22 976,
2809 11:33:10.335682
2810 11:33:10.335783 Write Rank0 MR14 =0x1a
2811 11:33:10.346672
2812 11:33:10.349759 CH=1, VrefRange= 0, VrefLevel = 26
2813 11:33:10.353472 TX Bit0 (981~1006) 26 993, Bit8 (969~991) 23 980,
2814 11:33:10.356561 TX Bit1 (979~1005) 27 992, Bit9 (969~990) 22 979,
2815 11:33:10.363471 TX Bit2 (978~1004) 27 991, Bit10 (970~993) 24 981,
2816 11:33:10.366535 TX Bit3 (977~1000) 24 988, Bit11 (971~994) 24 982,
2817 11:33:10.370081 TX Bit4 (979~1005) 27 992, Bit12 (971~994) 24 982,
2818 11:33:10.376777 TX Bit5 (982~1006) 25 994, Bit13 (974~994) 21 984,
2819 11:33:10.379852 TX Bit6 (980~1005) 26 992, Bit14 (970~994) 25 982,
2820 11:33:10.386600 TX Bit7 (980~1005) 26 992, Bit15 (966~988) 23 977,
2821 11:33:10.386699
2822 11:33:10.386799 Write Rank0 MR14 =0x1c
2823 11:33:10.397367
2824 11:33:10.400474 CH=1, VrefRange= 0, VrefLevel = 28
2825 11:33:10.404213 TX Bit0 (981~1006) 26 993, Bit8 (969~991) 23 980,
2826 11:33:10.407453 TX Bit1 (979~1005) 27 992, Bit9 (969~990) 22 979,
2827 11:33:10.413921 TX Bit2 (978~1004) 27 991, Bit10 (970~994) 25 982,
2828 11:33:10.417162 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2829 11:33:10.420520 TX Bit4 (979~1006) 28 992, Bit12 (971~994) 24 982,
2830 11:33:10.427281 TX Bit5 (981~1006) 26 993, Bit13 (973~994) 22 983,
2831 11:33:10.430854 TX Bit6 (979~1005) 27 992, Bit14 (970~994) 25 982,
2832 11:33:10.437266 TX Bit7 (979~1005) 27 992, Bit15 (966~988) 23 977,
2833 11:33:10.437345
2834 11:33:10.437406 Write Rank0 MR14 =0x1e
2835 11:33:10.448251
2836 11:33:10.451390 CH=1, VrefRange= 0, VrefLevel = 30
2837 11:33:10.454740 TX Bit0 (980~1006) 27 993, Bit8 (968~992) 25 980,
2838 11:33:10.458307 TX Bit1 (979~1005) 27 992, Bit9 (969~991) 23 980,
2839 11:33:10.465141 TX Bit2 (977~1003) 27 990, Bit10 (970~994) 25 982,
2840 11:33:10.467904 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2841 11:33:10.471729 TX Bit4 (979~1006) 28 992, Bit12 (970~994) 25 982,
2842 11:33:10.478295 TX Bit5 (981~1006) 26 993, Bit13 (972~994) 23 983,
2843 11:33:10.481395 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2844 11:33:10.487948 TX Bit7 (979~1005) 27 992, Bit15 (966~988) 23 977,
2845 11:33:10.488044
2846 11:33:10.488133 Write Rank0 MR14 =0x20
2847 11:33:10.499155
2848 11:33:10.502787 CH=1, VrefRange= 0, VrefLevel = 32
2849 11:33:10.505815 TX Bit0 (980~1006) 27 993, Bit8 (968~992) 25 980,
2850 11:33:10.509436 TX Bit1 (979~1005) 27 992, Bit9 (969~991) 23 980,
2851 11:33:10.516012 TX Bit2 (977~1003) 27 990, Bit10 (970~994) 25 982,
2852 11:33:10.519127 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2853 11:33:10.522534 TX Bit4 (979~1006) 28 992, Bit12 (970~994) 25 982,
2854 11:33:10.528817 TX Bit5 (981~1006) 26 993, Bit13 (972~994) 23 983,
2855 11:33:10.532090 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2856 11:33:10.538949 TX Bit7 (979~1005) 27 992, Bit15 (966~988) 23 977,
2857 11:33:10.539060
2858 11:33:10.539154 Write Rank0 MR14 =0x22
2859 11:33:10.549924
2860 11:33:10.553212 CH=1, VrefRange= 0, VrefLevel = 34
2861 11:33:10.556612 TX Bit0 (980~1006) 27 993, Bit8 (968~992) 25 980,
2862 11:33:10.559773 TX Bit1 (979~1005) 27 992, Bit9 (969~991) 23 980,
2863 11:33:10.566629 TX Bit2 (977~1003) 27 990, Bit10 (970~994) 25 982,
2864 11:33:10.569974 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2865 11:33:10.573306 TX Bit4 (979~1006) 28 992, Bit12 (970~994) 25 982,
2866 11:33:10.579769 TX Bit5 (981~1006) 26 993, Bit13 (972~994) 23 983,
2867 11:33:10.583135 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2868 11:33:10.589634 TX Bit7 (979~1005) 27 992, Bit15 (966~988) 23 977,
2869 11:33:10.589718
2870 11:33:10.589783 Write Rank0 MR14 =0x24
2871 11:33:10.600869
2872 11:33:10.600952 CH=1, VrefRange= 0, VrefLevel = 36
2873 11:33:10.607647 TX Bit0 (980~1006) 27 993, Bit8 (968~992) 25 980,
2874 11:33:10.610649 TX Bit1 (979~1005) 27 992, Bit9 (969~991) 23 980,
2875 11:33:10.617427 TX Bit2 (977~1003) 27 990, Bit10 (970~994) 25 982,
2876 11:33:10.621225 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2877 11:33:10.624340 TX Bit4 (979~1006) 28 992, Bit12 (970~994) 25 982,
2878 11:33:10.630801 TX Bit5 (981~1006) 26 993, Bit13 (972~994) 23 983,
2879 11:33:10.634071 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2880 11:33:10.640648 TX Bit7 (979~1005) 27 992, Bit15 (966~988) 23 977,
2881 11:33:10.640732
2882 11:33:10.640797 Write Rank0 MR14 =0x26
2883 11:33:10.651746
2884 11:33:10.651829 CH=1, VrefRange= 0, VrefLevel = 38
2885 11:33:10.658544 TX Bit0 (980~1006) 27 993, Bit8 (968~992) 25 980,
2886 11:33:10.661675 TX Bit1 (979~1005) 27 992, Bit9 (969~991) 23 980,
2887 11:33:10.668729 TX Bit2 (977~1003) 27 990, Bit10 (970~994) 25 982,
2888 11:33:10.671645 TX Bit3 (977~1001) 25 989, Bit11 (970~994) 25 982,
2889 11:33:10.675043 TX Bit4 (979~1006) 28 992, Bit12 (970~994) 25 982,
2890 11:33:10.681755 TX Bit5 (981~1006) 26 993, Bit13 (972~994) 23 983,
2891 11:33:10.684838 TX Bit6 (979~1006) 28 992, Bit14 (970~993) 24 981,
2892 11:33:10.691843 TX Bit7 (979~1005) 27 992, Bit15 (966~988) 23 977,
2893 11:33:10.691927
2894 11:33:10.691991
2895 11:33:10.695376 TX Vref found, early break! 381< 387
2896 11:33:10.698482 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2897 11:33:10.702170 u1DelayCellOfst[0]=5 cells (4 PI)
2898 11:33:10.705368 u1DelayCellOfst[1]=3 cells (3 PI)
2899 11:33:10.708577 u1DelayCellOfst[2]=1 cells (1 PI)
2900 11:33:10.711743 u1DelayCellOfst[3]=0 cells (0 PI)
2901 11:33:10.715008 u1DelayCellOfst[4]=3 cells (3 PI)
2902 11:33:10.718378 u1DelayCellOfst[5]=5 cells (4 PI)
2903 11:33:10.718463 u1DelayCellOfst[6]=3 cells (3 PI)
2904 11:33:10.721598 u1DelayCellOfst[7]=3 cells (3 PI)
2905 11:33:10.725064 Byte0, DQ PI dly=989, DQM PI dly= 991
2906 11:33:10.731581 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2907 11:33:10.731665
2908 11:33:10.734986 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2909 11:33:10.735071
2910 11:33:10.738368 u1DelayCellOfst[8]=3 cells (3 PI)
2911 11:33:10.741514 u1DelayCellOfst[9]=3 cells (3 PI)
2912 11:33:10.745415 u1DelayCellOfst[10]=6 cells (5 PI)
2913 11:33:10.748221 u1DelayCellOfst[11]=6 cells (5 PI)
2914 11:33:10.751633 u1DelayCellOfst[12]=6 cells (5 PI)
2915 11:33:10.754997 u1DelayCellOfst[13]=7 cells (6 PI)
2916 11:33:10.755081 u1DelayCellOfst[14]=5 cells (4 PI)
2917 11:33:10.758204 u1DelayCellOfst[15]=0 cells (0 PI)
2918 11:33:10.761498 Byte1, DQ PI dly=977, DQM PI dly= 980
2919 11:33:10.768407 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
2920 11:33:10.768499
2921 11:33:10.772031 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
2922 11:33:10.772115
2923 11:33:10.775085 wait MRW command Rank0 MR14 =0x1e fired (1)
2924 11:33:10.778351 Write Rank0 MR14 =0x1e
2925 11:33:10.778434
2926 11:33:10.781475 Final TX Range 0 Vref 30
2927 11:33:10.781558
2928 11:33:10.787943 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2929 11:33:10.788026
2930 11:33:10.794578 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2931 11:33:10.801774 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2932 11:33:10.808183 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2933 11:33:10.808294 Write Rank0 MR3 =0xb0
2934 11:33:10.811637 DramC Write-DBI on
2935 11:33:10.811721 ==
2936 11:33:10.818355 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2937 11:33:10.821668 fsp= 1, odt_onoff= 1, Byte mode= 0
2938 11:33:10.821753 ==
2939 11:33:10.824411 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2940 11:33:10.824514
2941 11:33:10.827857 Begin, DQ Scan Range 700~764
2942 11:33:10.827941
2943 11:33:10.828006
2944 11:33:10.828065 TX Vref Scan disable
2945 11:33:10.834549 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2946 11:33:10.838331 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2947 11:33:10.841518 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2948 11:33:10.844754 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2949 11:33:10.847970 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2950 11:33:10.851848 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2951 11:33:10.854805 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2952 11:33:10.857803 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2953 11:33:10.861174 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2954 11:33:10.864899 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2955 11:33:10.868201 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2956 11:33:10.871315 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2957 11:33:10.874527 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2958 11:33:10.877857 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2959 11:33:10.881549 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2960 11:33:10.884707 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2961 11:33:10.887757 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2962 11:33:10.890947 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2963 11:33:10.894259 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2964 11:33:10.898061 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
2965 11:33:10.901373 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
2966 11:33:10.907737 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
2967 11:33:10.910980 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
2968 11:33:10.914735 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
2969 11:33:10.918080 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2970 11:33:10.921093 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2971 11:33:10.924464 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2972 11:33:10.931630 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2973 11:33:10.934584 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2974 11:33:10.938122 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2975 11:33:10.941131 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2976 11:33:10.944408 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2977 11:33:10.947648 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
2978 11:33:10.951411 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
2979 11:33:10.954130 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
2980 11:33:10.957696 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
2981 11:33:10.961150 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
2982 11:33:10.964392 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
2983 11:33:10.967547 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
2984 11:33:10.970902 Byte0, DQ PI dly=737, DQM PI dly= 737
2985 11:33:10.977907 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
2986 11:33:10.977989
2987 11:33:10.981581 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
2988 11:33:10.981652
2989 11:33:10.984552 Byte1, DQ PI dly=724, DQM PI dly= 724
2990 11:33:10.987840 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 20)
2991 11:33:10.987916
2992 11:33:10.994521 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 20)
2993 11:33:10.994595
2994 11:33:11.000891 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2995 11:33:11.007830 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2996 11:33:11.014328 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2997 11:33:11.014406 Write Rank0 MR3 =0x30
2998 11:33:11.017570 DramC Write-DBI off
2999 11:33:11.017641
3000 11:33:11.017703 [DATLAT]
3001 11:33:11.020835 Freq=1600, CH1 RK0, use_rxtx_scan=0
3002 11:33:11.020904
3003 11:33:11.024150 DATLAT Default: 0xf
3004 11:33:11.024218 7, 0xFFFF, sum=0
3005 11:33:11.027547 8, 0xFFFF, sum=0
3006 11:33:11.027616 9, 0xFFFF, sum=0
3007 11:33:11.030735 10, 0xFFFF, sum=0
3008 11:33:11.030813 11, 0xFFFF, sum=0
3009 11:33:11.034049 12, 0xFFFF, sum=0
3010 11:33:11.034119 13, 0xFFFF, sum=0
3011 11:33:11.037721 14, 0x0, sum=1
3012 11:33:11.037802 15, 0x0, sum=2
3013 11:33:11.037865 16, 0x0, sum=3
3014 11:33:11.040844 17, 0x0, sum=4
3015 11:33:11.044142 pattern=2 first_step=14 total pass=5 best_step=16
3016 11:33:11.044211 ==
3017 11:33:11.050704 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3018 11:33:11.053979 fsp= 1, odt_onoff= 1, Byte mode= 0
3019 11:33:11.054059 ==
3020 11:33:11.057632 Start DQ dly to find pass range UseTestEngine =1
3021 11:33:11.060853 x-axis: bit #, y-axis: DQ dly (-127~63)
3022 11:33:11.064093 RX Vref Scan = 1
3023 11:33:11.170126
3024 11:33:11.170234 RX Vref found, early break!
3025 11:33:11.170310
3026 11:33:11.177086 Final RX Vref 11, apply to both rank0 and 1
3027 11:33:11.177194 ==
3028 11:33:11.180394 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3029 11:33:11.183582 fsp= 1, odt_onoff= 1, Byte mode= 0
3030 11:33:11.183656 ==
3031 11:33:11.183718 DQS Delay:
3032 11:33:11.186821 DQS0 = 0, DQS1 = 0
3033 11:33:11.186910 DQM Delay:
3034 11:33:11.190501 DQM0 = 20, DQM1 = 19
3035 11:33:11.190585 DQ Delay:
3036 11:33:11.193736 DQ0 =21, DQ1 =22, DQ2 =18, DQ3 =16
3037 11:33:11.196888 DQ4 =22, DQ5 =22, DQ6 =23, DQ7 =21
3038 11:33:11.200436 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =22
3039 11:33:11.203507 DQ12 =22, DQ13 =21, DQ14 =23, DQ15 =13
3040 11:33:11.203592
3041 11:33:11.203657
3042 11:33:11.203716
3043 11:33:11.206768 [DramC_TX_OE_Calibration] TA2
3044 11:33:11.210196 Original DQ_B0 (3 6) =30, OEN = 27
3045 11:33:11.213807 Original DQ_B1 (3 6) =30, OEN = 27
3046 11:33:11.217041 23, 0x0, End_B0=23 End_B1=23
3047 11:33:11.217129 24, 0x0, End_B0=24 End_B1=24
3048 11:33:11.220200 25, 0x0, End_B0=25 End_B1=25
3049 11:33:11.223687 26, 0x0, End_B0=26 End_B1=26
3050 11:33:11.227254 27, 0x0, End_B0=27 End_B1=27
3051 11:33:11.227340 28, 0x0, End_B0=28 End_B1=28
3052 11:33:11.230263 29, 0x0, End_B0=29 End_B1=29
3053 11:33:11.233933 30, 0x0, End_B0=30 End_B1=30
3054 11:33:11.236989 31, 0xFFFF, End_B0=30 End_B1=30
3055 11:33:11.243531 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3056 11:33:11.246754 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3057 11:33:11.246839
3058 11:33:11.246905
3059 11:33:11.250023 Write Rank0 MR23 =0x3f
3060 11:33:11.250108 [DQSOSC]
3061 11:33:11.260109 [DQSOSCAuto] RK0, (LSB)MR18= 0xc0c0, (MSB)MR19= 0x202, tDQSOscB0 = 447 ps tDQSOscB1 = 447 ps
3062 11:33:11.263428 CH1_RK0: MR19=0x202, MR18=0xC0C0, DQSOSC=447, MR23=63, INC=12, DEC=18
3063 11:33:11.266709 Write Rank0 MR23 =0x3f
3064 11:33:11.266793 [DQSOSC]
3065 11:33:11.276639 [DQSOSCAuto] RK0, (LSB)MR18= 0xbdbd, (MSB)MR19= 0x202, tDQSOscB0 = 449 ps tDQSOscB1 = 449 ps
3066 11:33:11.280216 CH1 RK0: MR19=202, MR18=BDBD
3067 11:33:11.283646 [RankSwap] Rank num 2, (Multi 1), Rank 1
3068 11:33:11.283730 Write Rank0 MR2 =0xad
3069 11:33:11.286752 [Write Leveling]
3070 11:33:11.290051 delay byte0 byte1 byte2 byte3
3071 11:33:11.290134
3072 11:33:11.290199 10 0 0
3073 11:33:11.293110 11 0 0
3074 11:33:11.293195 12 0 0
3075 11:33:11.293262 13 0 0
3076 11:33:11.296340 14 0 0
3077 11:33:11.296424 15 0 0
3078 11:33:11.299794 16 0 0
3079 11:33:11.299879 17 0 0
3080 11:33:11.299945 18 0 0
3081 11:33:11.303041 19 0 0
3082 11:33:11.303125 20 0 0
3083 11:33:11.306863 21 0 0
3084 11:33:11.306947 22 0 0
3085 11:33:11.307013 23 0 0
3086 11:33:11.309908 24 0 ff
3087 11:33:11.309993 25 0 ff
3088 11:33:11.313002 26 0 ff
3089 11:33:11.313087 27 0 ff
3090 11:33:11.316433 28 0 ff
3091 11:33:11.316527 29 0 ff
3092 11:33:11.320294 30 0 ff
3093 11:33:11.320378 31 0 ff
3094 11:33:11.320445 32 0 ff
3095 11:33:11.323490 33 0 ff
3096 11:33:11.323574 34 ff ff
3097 11:33:11.326802 35 ff ff
3098 11:33:11.326886 36 ff ff
3099 11:33:11.329972 37 ff ff
3100 11:33:11.330056 38 ff ff
3101 11:33:11.332999 39 ff ff
3102 11:33:11.333083 40 ff ff
3103 11:33:11.336715 pass bytecount = 0xff (0xff: all bytes pass)
3104 11:33:11.336799
3105 11:33:11.339753 DQS0 dly: 34
3106 11:33:11.339836 DQS1 dly: 24
3107 11:33:11.343313 Write Rank0 MR2 =0x2d
3108 11:33:11.346462 [RankSwap] Rank num 2, (Multi 1), Rank 0
3109 11:33:11.346546 Write Rank1 MR1 =0xd6
3110 11:33:11.349643 [Gating]
3111 11:33:11.349726 ==
3112 11:33:11.353527 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3113 11:33:11.356509 fsp= 1, odt_onoff= 1, Byte mode= 0
3114 11:33:11.356593 ==
3115 11:33:11.363036 3 1 0 |3332 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
3116 11:33:11.366588 3 1 4 |3535 2c2b |(0 0)(11 11) |(1 1)(0 0)| 0
3117 11:33:11.369430 3 1 8 |3333 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
3118 11:33:11.376240 3 1 12 |2423 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3119 11:33:11.379611 3 1 16 |3333 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3120 11:33:11.382997 3 1 20 |2827 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
3121 11:33:11.386099 3 1 24 |1313 2c2b |(1 1)(11 11) |(0 1)(1 0)| 0
3122 11:33:11.392598 3 1 28 |100f 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
3123 11:33:11.396304 3 2 0 |3433 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
3124 11:33:11.399538 3 2 4 |1514 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3125 11:33:11.406253 3 2 8 |2b2a 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
3126 11:33:11.409500 3 2 12 |3837 1716 |(11 11)(11 11) |(1 1)(0 0)| 0
3127 11:33:11.412732 3 2 16 |3b3b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3128 11:33:11.419737 3 2 20 |3b3b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3129 11:33:11.422680 3 2 24 |403 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3130 11:33:11.426217 3 2 28 |3c3b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3131 11:33:11.429652 3 3 0 |3d3c 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3132 11:33:11.436430 3 3 4 |3b3b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3133 11:33:11.439693 3 3 8 |1d1c 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3134 11:33:11.442907 [Byte 0] Lead/lag falling Transition (3, 3, 8)
3135 11:33:11.449269 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3136 11:33:11.452857 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3137 11:33:11.456137 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3138 11:33:11.462788 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3139 11:33:11.466522 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3140 11:33:11.469855 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
3141 11:33:11.473001 3 4 4 |1110 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
3142 11:33:11.479686 3 4 8 |e0e 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3143 11:33:11.482884 3 4 12 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0
3144 11:33:11.486308 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3145 11:33:11.493036 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3146 11:33:11.496338 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3147 11:33:11.499600 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3148 11:33:11.506542 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3149 11:33:11.509381 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3150 11:33:11.513073 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3151 11:33:11.516496 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3152 11:33:11.523157 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3153 11:33:11.526416 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3154 11:33:11.529621 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3155 11:33:11.536396 [Byte 0] Lead/lag falling Transition (3, 5, 24)
3156 11:33:11.540008 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3157 11:33:11.542920 3 6 0 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3158 11:33:11.546148 [Byte 0] Lead/lag Transition tap number (3)
3159 11:33:11.553278 3 6 4 |202 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3160 11:33:11.556351 [Byte 1] Lead/lag falling Transition (3, 6, 4)
3161 11:33:11.559680 3 6 8 |2a2a 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3162 11:33:11.562890 [Byte 1] Lead/lag Transition tap number (2)
3163 11:33:11.570011 3 6 12 |4646 d0c |(0 0)(11 11) |(0 0)(0 0)| 0
3164 11:33:11.570105 [Byte 0]First pass (3, 6, 12)
3165 11:33:11.576306 3 6 16 |4646 1010 |(0 0)(11 11) |(0 0)(0 0)| 0
3166 11:33:11.579463 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3167 11:33:11.582841 [Byte 1]First pass (3, 6, 20)
3168 11:33:11.586433 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3169 11:33:11.589467 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3170 11:33:11.592621 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3171 11:33:11.599105 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3172 11:33:11.602933 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3173 11:33:11.605844 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3174 11:33:11.609308 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3175 11:33:11.615771 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3176 11:33:11.618986 All bytes gating window > 1UI, Early break!
3177 11:33:11.619069
3178 11:33:11.622176 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 30)
3179 11:33:11.622260
3180 11:33:11.625942 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
3181 11:33:11.626025
3182 11:33:11.626090
3183 11:33:11.626150
3184 11:33:11.629153 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
3185 11:33:11.629237
3186 11:33:11.632567 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
3187 11:33:11.635734
3188 11:33:11.635816
3189 11:33:11.635881 Write Rank1 MR1 =0x56
3190 11:33:11.635941
3191 11:33:11.638942 best RODT dly(2T, 0.5T) = (2, 2)
3192 11:33:11.639027
3193 11:33:11.642216 best RODT dly(2T, 0.5T) = (2, 3)
3194 11:33:11.642299 ==
3195 11:33:11.648708 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3196 11:33:11.651992 fsp= 1, odt_onoff= 1, Byte mode= 0
3197 11:33:11.652072 ==
3198 11:33:11.655495 Start DQ dly to find pass range UseTestEngine =0
3199 11:33:11.658878 x-axis: bit #, y-axis: DQ dly (-127~63)
3200 11:33:11.658964 RX Vref Scan = 0
3201 11:33:11.662387 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3202 11:33:11.665640 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3203 11:33:11.669049 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3204 11:33:11.672257 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3205 11:33:11.675824 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3206 11:33:11.679363 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3207 11:33:11.682104 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3208 11:33:11.685455 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3209 11:33:11.685540 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3210 11:33:11.689148 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3211 11:33:11.692388 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3212 11:33:11.695546 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3213 11:33:11.698786 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3214 11:33:11.702257 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3215 11:33:11.705792 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3216 11:33:11.709115 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3217 11:33:11.709211 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3218 11:33:11.712172 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3219 11:33:11.715245 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3220 11:33:11.718565 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3221 11:33:11.721994 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3222 11:33:11.725264 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3223 11:33:11.728620 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3224 11:33:11.728705 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3225 11:33:11.731988 -2, [0] xxxoxxxx xxxxxxxo [MSB]
3226 11:33:11.735254 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3227 11:33:11.738856 0, [0] xxooxxxx ooxxxxxo [MSB]
3228 11:33:11.742026 1, [0] xxooxxxx ooxxxxxo [MSB]
3229 11:33:11.745249 2, [0] xxooxxxx ooxxxxxo [MSB]
3230 11:33:11.745333 3, [0] xxooxxxo oooxxxxo [MSB]
3231 11:33:11.748467 4, [0] xxoooxxo oooxxxxo [MSB]
3232 11:33:11.751775 5, [0] oooooxoo oooooooo [MSB]
3233 11:33:11.755437 6, [0] oooooooo ooooooxo [MSB]
3234 11:33:11.758691 31, [0] oooooooo ooooooox [MSB]
3235 11:33:11.761985 32, [0] oooooooo ooooooox [MSB]
3236 11:33:11.765222 33, [0] oooooooo ooooooox [MSB]
3237 11:33:11.765307 34, [0] oooooooo ooooooox [MSB]
3238 11:33:11.768645 35, [0] oooxoooo xxooooox [MSB]
3239 11:33:11.772180 36, [0] oooxoooo xxooooox [MSB]
3240 11:33:11.775496 37, [0] ooxxoooo xxooooox [MSB]
3241 11:33:11.778823 38, [0] ooxxoooo xxooooox [MSB]
3242 11:33:11.782123 39, [0] oxxxxoox xxooooox [MSB]
3243 11:33:11.785190 40, [0] oxxxxoox xxooooox [MSB]
3244 11:33:11.785275 41, [0] oxxxxoox xxxxxxox [MSB]
3245 11:33:11.788488 42, [0] xxxxxxxx xxxxxxxx [MSB]
3246 11:33:11.791650 iDelay=42, Bit 0, Center 23 (5 ~ 41) 37
3247 11:33:11.794983 iDelay=42, Bit 1, Center 21 (5 ~ 38) 34
3248 11:33:11.801510 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3249 11:33:11.805074 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3250 11:33:11.808508 iDelay=42, Bit 4, Center 21 (4 ~ 38) 35
3251 11:33:11.811664 iDelay=42, Bit 5, Center 23 (6 ~ 41) 36
3252 11:33:11.815103 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3253 11:33:11.818187 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3254 11:33:11.821936 iDelay=42, Bit 8, Center 17 (0 ~ 34) 35
3255 11:33:11.824867 iDelay=42, Bit 9, Center 16 (-1 ~ 34) 36
3256 11:33:11.828657 iDelay=42, Bit 10, Center 21 (3 ~ 40) 38
3257 11:33:11.832141 iDelay=42, Bit 11, Center 22 (5 ~ 40) 36
3258 11:33:11.835115 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3259 11:33:11.838468 iDelay=42, Bit 13, Center 22 (5 ~ 40) 36
3260 11:33:11.841629 iDelay=42, Bit 14, Center 24 (7 ~ 41) 35
3261 11:33:11.848691 iDelay=42, Bit 15, Center 14 (-2 ~ 30) 33
3262 11:33:11.848775 ==
3263 11:33:11.851801 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3264 11:33:11.855219 fsp= 1, odt_onoff= 1, Byte mode= 0
3265 11:33:11.855303 ==
3266 11:33:11.855368 DQS Delay:
3267 11:33:11.858804 DQS0 = 0, DQS1 = 0
3268 11:33:11.858889 DQM Delay:
3269 11:33:11.862117 DQM0 = 20, DQM1 = 19
3270 11:33:11.862201 DQ Delay:
3271 11:33:11.865507 DQ0 =23, DQ1 =21, DQ2 =18, DQ3 =16
3272 11:33:11.868706 DQ4 =21, DQ5 =23, DQ6 =23, DQ7 =20
3273 11:33:11.871943 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3274 11:33:11.875255 DQ12 =22, DQ13 =22, DQ14 =24, DQ15 =14
3275 11:33:11.875340
3276 11:33:11.875406
3277 11:33:11.878784 DramC Write-DBI off
3278 11:33:11.878868 ==
3279 11:33:11.882171 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3280 11:33:11.885370 fsp= 1, odt_onoff= 1, Byte mode= 0
3281 11:33:11.885455 ==
3282 11:33:11.888560 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3283 11:33:11.891799
3284 11:33:11.891882 Begin, DQ Scan Range 920~1176
3285 11:33:11.891948
3286 11:33:11.892008
3287 11:33:11.895597 TX Vref Scan disable
3288 11:33:11.898228 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
3289 11:33:11.901542 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
3290 11:33:11.905470 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
3291 11:33:11.908232 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
3292 11:33:11.911685 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3293 11:33:11.914939 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3294 11:33:11.921582 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3295 11:33:11.924816 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3296 11:33:11.928443 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3297 11:33:11.931512 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3298 11:33:11.935011 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3299 11:33:11.938332 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3300 11:33:11.941323 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3301 11:33:11.945029 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3302 11:33:11.948400 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3303 11:33:11.951763 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3304 11:33:11.954678 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3305 11:33:11.958015 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3306 11:33:11.961644 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3307 11:33:11.964998 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3308 11:33:11.968263 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3309 11:33:11.971547 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3310 11:33:11.978168 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3311 11:33:11.981418 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3312 11:33:11.985087 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3313 11:33:11.987962 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3314 11:33:11.991389 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3315 11:33:11.994721 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3316 11:33:11.998058 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3317 11:33:12.001668 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3318 11:33:12.004599 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3319 11:33:12.008062 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3320 11:33:12.011405 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3321 11:33:12.014621 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3322 11:33:12.017889 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3323 11:33:12.021300 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3324 11:33:12.025096 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3325 11:33:12.028271 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3326 11:33:12.031658 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3327 11:33:12.037971 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3328 11:33:12.041391 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3329 11:33:12.044878 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3330 11:33:12.048145 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3331 11:33:12.051341 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3332 11:33:12.054693 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3333 11:33:12.058173 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3334 11:33:12.061240 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3335 11:33:12.064734 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3336 11:33:12.068088 968 |3 6 8|[0] xxxxxxxx xoxxxxxo [MSB]
3337 11:33:12.071390 969 |3 6 9|[0] xxxxxxxx ooxxxxxo [MSB]
3338 11:33:12.074591 970 |3 6 10|[0] xxxxxxxx ooxxxxxo [MSB]
3339 11:33:12.077907 971 |3 6 11|[0] xxxxxxxx oooooxoo [MSB]
3340 11:33:12.081164 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3341 11:33:12.084620 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
3342 11:33:12.088370 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
3343 11:33:12.091650 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
3344 11:33:12.095001 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
3345 11:33:12.098230 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3346 11:33:12.101060 978 |3 6 18|[0] xooooxox oooooooo [MSB]
3347 11:33:12.107729 979 |3 6 19|[0] xoooooox oooooooo [MSB]
3348 11:33:12.111284 985 |3 6 25|[0] oooooooo ooooooox [MSB]
3349 11:33:12.114622 986 |3 6 26|[0] oooooooo ooooooox [MSB]
3350 11:33:12.117745 987 |3 6 27|[0] oooooooo ooooooox [MSB]
3351 11:33:12.120940 988 |3 6 28|[0] oooooooo xxooooox [MSB]
3352 11:33:12.124687 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
3353 11:33:12.128082 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
3354 11:33:12.131680 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3355 11:33:12.134780 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3356 11:33:12.138024 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3357 11:33:12.141324 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3358 11:33:12.147917 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3359 11:33:12.151134 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3360 11:33:12.154357 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
3361 11:33:12.157453 998 |3 6 38|[0] oooxoooo xxxxxxxx [MSB]
3362 11:33:12.161248 999 |3 6 39|[0] ooxxoooo xxxxxxxx [MSB]
3363 11:33:12.164195 1000 |3 6 40|[0] ooxxxoox xxxxxxxx [MSB]
3364 11:33:12.167599 1001 |3 6 41|[0] oxxxxoxx xxxxxxxx [MSB]
3365 11:33:12.170804 1002 |3 6 42|[0] xxxxxxxx xxxxxxxx [MSB]
3366 11:33:12.174290 Byte0, DQ PI dly=988, DQM PI dly= 988
3367 11:33:12.177746 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3368 11:33:12.177832
3369 11:33:12.184029 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3370 11:33:12.184115
3371 11:33:12.187494 Byte1, DQ PI dly=977, DQM PI dly= 977
3372 11:33:12.190953 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3373 11:33:12.191038
3374 11:33:12.194042 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3375 11:33:12.194127
3376 11:33:12.197610 ==
3377 11:33:12.200726 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3378 11:33:12.204271 fsp= 1, odt_onoff= 1, Byte mode= 0
3379 11:33:12.204356 ==
3380 11:33:12.207490 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3381 11:33:12.207575
3382 11:33:12.210757 Begin, DQ Scan Range 953~1017
3383 11:33:12.214463 Write Rank1 MR14 =0x0
3384 11:33:12.222515
3385 11:33:12.222601 CH=1, VrefRange= 0, VrefLevel = 0
3386 11:33:12.229426 TX Bit0 (982~998) 17 990, Bit8 (970~984) 15 977,
3387 11:33:12.232568 TX Bit1 (982~996) 15 989, Bit9 (971~983) 13 977,
3388 11:33:12.239148 TX Bit2 (979~993) 15 986, Bit10 (974~985) 12 979,
3389 11:33:12.242266 TX Bit3 (978~990) 13 984, Bit11 (975~986) 12 980,
3390 11:33:12.245469 TX Bit4 (981~995) 15 988, Bit12 (976~985) 10 980,
3391 11:33:12.252311 TX Bit5 (983~998) 16 990, Bit13 (975~987) 13 981,
3392 11:33:12.255501 TX Bit6 (981~996) 16 988, Bit14 (975~985) 11 980,
3393 11:33:12.258851 TX Bit7 (983~994) 12 988, Bit15 (968~978) 11 973,
3394 11:33:12.258936
3395 11:33:12.262290 Write Rank1 MR14 =0x2
3396 11:33:12.271506
3397 11:33:12.271591 CH=1, VrefRange= 0, VrefLevel = 2
3398 11:33:12.277996 TX Bit0 (982~998) 17 990, Bit8 (969~984) 16 976,
3399 11:33:12.281392 TX Bit1 (980~997) 18 988, Bit9 (970~984) 15 977,
3400 11:33:12.288413 TX Bit2 (979~994) 16 986, Bit10 (974~985) 12 979,
3401 11:33:12.291767 TX Bit3 (978~990) 13 984, Bit11 (974~987) 14 980,
3402 11:33:12.294777 TX Bit4 (980~996) 17 988, Bit12 (975~985) 11 980,
3403 11:33:12.301385 TX Bit5 (982~998) 17 990, Bit13 (974~987) 14 980,
3404 11:33:12.304498 TX Bit6 (981~997) 17 989, Bit14 (974~985) 12 979,
3405 11:33:12.307887 TX Bit7 (983~995) 13 989, Bit15 (968~979) 12 973,
3406 11:33:12.307973
3407 11:33:12.311088 Write Rank1 MR14 =0x4
3408 11:33:12.320579
3409 11:33:12.320664 CH=1, VrefRange= 0, VrefLevel = 4
3410 11:33:12.327521 TX Bit0 (982~999) 18 990, Bit8 (969~984) 16 976,
3411 11:33:12.330619 TX Bit1 (980~998) 19 989, Bit9 (970~984) 15 977,
3412 11:33:12.334477 TX Bit2 (978~995) 18 986, Bit10 (974~985) 12 979,
3413 11:33:12.341114 TX Bit3 (978~992) 15 985, Bit11 (974~987) 14 980,
3414 11:33:12.344187 TX Bit4 (980~997) 18 988, Bit12 (974~986) 13 980,
3415 11:33:12.350802 TX Bit5 (981~999) 19 990, Bit13 (974~989) 16 981,
3416 11:33:12.354184 TX Bit6 (980~998) 19 989, Bit14 (974~985) 12 979,
3417 11:33:12.357477 TX Bit7 (982~996) 15 989, Bit15 (968~980) 13 974,
3418 11:33:12.357562
3419 11:33:12.361156 Write Rank1 MR14 =0x6
3420 11:33:12.370316
3421 11:33:12.370401 CH=1, VrefRange= 0, VrefLevel = 6
3422 11:33:12.376975 TX Bit0 (981~999) 19 990, Bit8 (969~985) 17 977,
3423 11:33:12.380120 TX Bit1 (980~998) 19 989, Bit9 (970~985) 16 977,
3424 11:33:12.386658 TX Bit2 (978~996) 19 987, Bit10 (973~987) 15 980,
3425 11:33:12.390033 TX Bit3 (977~992) 16 984, Bit11 (974~989) 16 981,
3426 11:33:12.393006 TX Bit4 (979~998) 20 988, Bit12 (974~987) 14 980,
3427 11:33:12.400110 TX Bit5 (981~999) 19 990, Bit13 (974~989) 16 981,
3428 11:33:12.403443 TX Bit6 (981~998) 18 989, Bit14 (973~986) 14 979,
3429 11:33:12.406668 TX Bit7 (983~997) 15 990, Bit15 (968~980) 13 974,
3430 11:33:12.406750
3431 11:33:12.410341 Write Rank1 MR14 =0x8
3432 11:33:12.419434
3433 11:33:12.419518 CH=1, VrefRange= 0, VrefLevel = 8
3434 11:33:12.425968 TX Bit0 (980~999) 20 989, Bit8 (969~985) 17 977,
3435 11:33:12.429619 TX Bit1 (979~998) 20 988, Bit9 (970~985) 16 977,
3436 11:33:12.435939 TX Bit2 (978~997) 20 987, Bit10 (972~987) 16 979,
3437 11:33:12.439128 TX Bit3 (977~993) 17 985, Bit11 (973~989) 17 981,
3438 11:33:12.443176 TX Bit4 (979~998) 20 988, Bit12 (973~987) 15 980,
3439 11:33:12.449549 TX Bit5 (981~999) 19 990, Bit13 (973~990) 18 981,
3440 11:33:12.452893 TX Bit6 (980~999) 20 989, Bit14 (973~987) 15 980,
3441 11:33:12.456017 TX Bit7 (981~997) 17 989, Bit15 (967~982) 16 974,
3442 11:33:12.456091
3443 11:33:12.459123 Write Rank1 MR14 =0xa
3444 11:33:12.469000
3445 11:33:12.472004 CH=1, VrefRange= 0, VrefLevel = 10
3446 11:33:12.475325 TX Bit0 (981~1000) 20 990, Bit8 (969~986) 18 977,
3447 11:33:12.478494 TX Bit1 (979~998) 20 988, Bit9 (970~985) 16 977,
3448 11:33:12.485542 TX Bit2 (978~997) 20 987, Bit10 (972~988) 17 980,
3449 11:33:12.489126 TX Bit3 (977~993) 17 985, Bit11 (973~990) 18 981,
3450 11:33:12.492246 TX Bit4 (979~998) 20 988, Bit12 (972~989) 18 980,
3451 11:33:12.498751 TX Bit5 (980~1000) 21 990, Bit13 (972~991) 20 981,
3452 11:33:12.502206 TX Bit6 (979~999) 21 989, Bit14 (972~988) 17 980,
3453 11:33:12.505512 TX Bit7 (981~998) 18 989, Bit15 (967~983) 17 975,
3454 11:33:12.508727
3455 11:33:12.508801 Write Rank1 MR14 =0xc
3456 11:33:12.518629
3457 11:33:12.521990 CH=1, VrefRange= 0, VrefLevel = 12
3458 11:33:12.525180 TX Bit0 (980~1000) 21 990, Bit8 (969~986) 18 977,
3459 11:33:12.528216 TX Bit1 (979~999) 21 989, Bit9 (969~986) 18 977,
3460 11:33:12.534931 TX Bit2 (978~998) 21 988, Bit10 (971~989) 19 980,
3461 11:33:12.538840 TX Bit3 (977~994) 18 985, Bit11 (973~991) 19 982,
3462 11:33:12.541839 TX Bit4 (978~999) 22 988, Bit12 (972~989) 18 980,
3463 11:33:12.548411 TX Bit5 (980~1000) 21 990, Bit13 (972~991) 20 981,
3464 11:33:12.551928 TX Bit6 (979~999) 21 989, Bit14 (972~989) 18 980,
3465 11:33:12.558398 TX Bit7 (980~998) 19 989, Bit15 (967~984) 18 975,
3466 11:33:12.558473
3467 11:33:12.558544 Write Rank1 MR14 =0xe
3468 11:33:12.568603
3469 11:33:12.571752 CH=1, VrefRange= 0, VrefLevel = 14
3470 11:33:12.575379 TX Bit0 (980~1001) 22 990, Bit8 (969~987) 19 978,
3471 11:33:12.578326 TX Bit1 (978~999) 22 988, Bit9 (969~986) 18 977,
3472 11:33:12.585267 TX Bit2 (977~998) 22 987, Bit10 (971~990) 20 980,
3473 11:33:12.588550 TX Bit3 (977~996) 20 986, Bit11 (971~991) 21 981,
3474 11:33:12.591743 TX Bit4 (978~999) 22 988, Bit12 (971~990) 20 980,
3475 11:33:12.598366 TX Bit5 (979~1001) 23 990, Bit13 (972~991) 20 981,
3476 11:33:12.601605 TX Bit6 (979~1000) 22 989, Bit14 (971~990) 20 980,
3477 11:33:12.608206 TX Bit7 (980~998) 19 989, Bit15 (967~984) 18 975,
3478 11:33:12.608295
3479 11:33:12.608362 Write Rank1 MR14 =0x10
3480 11:33:12.618114
3481 11:33:12.621885 CH=1, VrefRange= 0, VrefLevel = 16
3482 11:33:12.625086 TX Bit0 (979~1001) 23 990, Bit8 (968~987) 20 977,
3483 11:33:12.628354 TX Bit1 (978~1000) 23 989, Bit9 (969~987) 19 978,
3484 11:33:12.634680 TX Bit2 (977~998) 22 987, Bit10 (970~990) 21 980,
3485 11:33:12.638126 TX Bit3 (976~996) 21 986, Bit11 (971~991) 21 981,
3486 11:33:12.641769 TX Bit4 (978~1000) 23 989, Bit12 (972~991) 20 981,
3487 11:33:12.648104 TX Bit5 (979~1001) 23 990, Bit13 (972~992) 21 982,
3488 11:33:12.651439 TX Bit6 (979~1000) 22 989, Bit14 (971~990) 20 980,
3489 11:33:12.658422 TX Bit7 (979~999) 21 989, Bit15 (967~984) 18 975,
3490 11:33:12.658511
3491 11:33:12.658597 Write Rank1 MR14 =0x12
3492 11:33:12.668832
3493 11:33:12.668920 CH=1, VrefRange= 0, VrefLevel = 18
3494 11:33:12.675262 TX Bit0 (979~1002) 24 990, Bit8 (968~988) 21 978,
3495 11:33:12.679129 TX Bit1 (978~1000) 23 989, Bit9 (969~987) 19 978,
3496 11:33:12.685454 TX Bit2 (977~999) 23 988, Bit10 (970~991) 22 980,
3497 11:33:12.688809 TX Bit3 (976~996) 21 986, Bit11 (971~991) 21 981,
3498 11:33:12.692308 TX Bit4 (978~1000) 23 989, Bit12 (971~991) 21 981,
3499 11:33:12.699280 TX Bit5 (979~1002) 24 990, Bit13 (971~992) 22 981,
3500 11:33:12.701995 TX Bit6 (979~1001) 23 990, Bit14 (970~990) 21 980,
3501 11:33:12.708403 TX Bit7 (980~999) 20 989, Bit15 (966~984) 19 975,
3502 11:33:12.708499
3503 11:33:12.708587 Write Rank1 MR14 =0x14
3504 11:33:12.719262
3505 11:33:12.722472 CH=1, VrefRange= 0, VrefLevel = 20
3506 11:33:12.725682 TX Bit0 (979~1002) 24 990, Bit8 (968~988) 21 978,
3507 11:33:12.728946 TX Bit1 (978~1001) 24 989, Bit9 (969~988) 20 978,
3508 11:33:12.735565 TX Bit2 (977~999) 23 988, Bit10 (970~991) 22 980,
3509 11:33:12.739277 TX Bit3 (976~997) 22 986, Bit11 (970~992) 23 981,
3510 11:33:12.742455 TX Bit4 (978~1001) 24 989, Bit12 (970~991) 22 980,
3511 11:33:12.749153 TX Bit5 (979~1002) 24 990, Bit13 (970~992) 23 981,
3512 11:33:12.752420 TX Bit6 (978~1001) 24 989, Bit14 (970~991) 22 980,
3513 11:33:12.758967 TX Bit7 (979~1000) 22 989, Bit15 (965~985) 21 975,
3514 11:33:12.759055
3515 11:33:12.759142 Write Rank1 MR14 =0x16
3516 11:33:12.769526
3517 11:33:12.769614 CH=1, VrefRange= 0, VrefLevel = 22
3518 11:33:12.776501 TX Bit0 (979~1003) 25 991, Bit8 (968~990) 23 979,
3519 11:33:12.779796 TX Bit1 (978~1001) 24 989, Bit9 (968~989) 22 978,
3520 11:33:12.786232 TX Bit2 (977~999) 23 988, Bit10 (970~991) 22 980,
3521 11:33:12.789721 TX Bit3 (976~998) 23 987, Bit11 (970~992) 23 981,
3522 11:33:12.792963 TX Bit4 (978~1001) 24 989, Bit12 (970~991) 22 980,
3523 11:33:12.799405 TX Bit5 (978~1003) 26 990, Bit13 (971~992) 22 981,
3524 11:33:12.802756 TX Bit6 (978~1002) 25 990, Bit14 (970~991) 22 980,
3525 11:33:12.809201 TX Bit7 (979~1000) 22 989, Bit15 (965~985) 21 975,
3526 11:33:12.809289
3527 11:33:12.809376 Write Rank1 MR14 =0x18
3528 11:33:12.820569
3529 11:33:12.824071 CH=1, VrefRange= 0, VrefLevel = 24
3530 11:33:12.827379 TX Bit0 (978~1004) 27 991, Bit8 (967~990) 24 978,
3531 11:33:12.830921 TX Bit1 (978~1002) 25 990, Bit9 (968~990) 23 979,
3532 11:33:12.837157 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
3533 11:33:12.840368 TX Bit3 (975~998) 24 986, Bit11 (970~992) 23 981,
3534 11:33:12.843620 TX Bit4 (978~1001) 24 989, Bit12 (970~992) 23 981,
3535 11:33:12.850648 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3536 11:33:12.854048 TX Bit6 (978~1002) 25 990, Bit14 (970~992) 23 981,
3537 11:33:12.860096 TX Bit7 (978~1001) 24 989, Bit15 (965~986) 22 975,
3538 11:33:12.860209
3539 11:33:12.860304 Write Rank1 MR14 =0x1a
3540 11:33:12.871258
3541 11:33:12.874610 CH=1, VrefRange= 0, VrefLevel = 26
3542 11:33:12.878253 TX Bit0 (978~1004) 27 991, Bit8 (968~991) 24 979,
3543 11:33:12.881626 TX Bit1 (978~1002) 25 990, Bit9 (968~990) 23 979,
3544 11:33:12.887712 TX Bit2 (977~1000) 24 988, Bit10 (969~992) 24 980,
3545 11:33:12.891498 TX Bit3 (975~998) 24 986, Bit11 (970~993) 24 981,
3546 11:33:12.894807 TX Bit4 (978~1001) 24 989, Bit12 (970~992) 23 981,
3547 11:33:12.901285 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3548 11:33:12.904602 TX Bit6 (978~1003) 26 990, Bit14 (970~992) 23 981,
3549 11:33:12.910761 TX Bit7 (978~1001) 24 989, Bit15 (965~986) 22 975,
3550 11:33:12.910868
3551 11:33:12.910965 Write Rank1 MR14 =0x1c
3552 11:33:12.922546
3553 11:33:12.922653 CH=1, VrefRange= 0, VrefLevel = 28
3554 11:33:12.928793 TX Bit0 (978~1004) 27 991, Bit8 (967~991) 25 979,
3555 11:33:12.932673 TX Bit1 (977~1003) 27 990, Bit9 (968~991) 24 979,
3556 11:33:12.938572 TX Bit2 (976~1000) 25 988, Bit10 (969~992) 24 980,
3557 11:33:12.941983 TX Bit3 (975~999) 25 987, Bit11 (969~993) 25 981,
3558 11:33:12.945146 TX Bit4 (977~1002) 26 989, Bit12 (970~992) 23 981,
3559 11:33:12.951740 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3560 11:33:12.955618 TX Bit6 (978~1003) 26 990, Bit14 (970~992) 23 981,
3561 11:33:12.962302 TX Bit7 (978~1002) 25 990, Bit15 (964~987) 24 975,
3562 11:33:12.962410
3563 11:33:12.962502 Write Rank1 MR14 =0x1e
3564 11:33:12.972995
3565 11:33:12.973098 CH=1, VrefRange= 0, VrefLevel = 30
3566 11:33:12.979766 TX Bit0 (978~1005) 28 991, Bit8 (967~990) 24 978,
3567 11:33:12.983499 TX Bit1 (977~1003) 27 990, Bit9 (968~990) 23 979,
3568 11:33:12.989955 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3569 11:33:12.993075 TX Bit3 (975~998) 24 986, Bit11 (969~993) 25 981,
3570 11:33:12.996447 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3571 11:33:13.002902 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3572 11:33:13.006240 TX Bit6 (977~1004) 28 990, Bit14 (969~992) 24 980,
3573 11:33:13.012716 TX Bit7 (978~1002) 25 990, Bit15 (963~988) 26 975,
3574 11:33:13.012823
3575 11:33:13.012915 Write Rank1 MR14 =0x20
3576 11:33:13.024033
3577 11:33:13.027336 CH=1, VrefRange= 0, VrefLevel = 32
3578 11:33:13.030984 TX Bit0 (978~1005) 28 991, Bit8 (967~990) 24 978,
3579 11:33:13.034366 TX Bit1 (977~1003) 27 990, Bit9 (968~990) 23 979,
3580 11:33:13.040759 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3581 11:33:13.043913 TX Bit3 (975~998) 24 986, Bit11 (969~993) 25 981,
3582 11:33:13.047318 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3583 11:33:13.053934 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3584 11:33:13.057121 TX Bit6 (977~1004) 28 990, Bit14 (969~992) 24 980,
3585 11:33:13.063585 TX Bit7 (978~1002) 25 990, Bit15 (963~988) 26 975,
3586 11:33:13.063689
3587 11:33:13.063792 Write Rank1 MR14 =0x22
3588 11:33:13.075051
3589 11:33:13.078433 CH=1, VrefRange= 0, VrefLevel = 34
3590 11:33:13.081703 TX Bit0 (978~1005) 28 991, Bit8 (967~990) 24 978,
3591 11:33:13.084770 TX Bit1 (977~1003) 27 990, Bit9 (968~990) 23 979,
3592 11:33:13.091701 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3593 11:33:13.095164 TX Bit3 (975~998) 24 986, Bit11 (969~993) 25 981,
3594 11:33:13.098163 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3595 11:33:13.105528 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3596 11:33:13.108224 TX Bit6 (977~1004) 28 990, Bit14 (969~992) 24 980,
3597 11:33:13.115329 TX Bit7 (978~1002) 25 990, Bit15 (963~988) 26 975,
3598 11:33:13.115414
3599 11:33:13.115480 Write Rank1 MR14 =0x24
3600 11:33:13.126012
3601 11:33:13.129239 CH=1, VrefRange= 0, VrefLevel = 36
3602 11:33:13.132414 TX Bit0 (978~1005) 28 991, Bit8 (967~990) 24 978,
3603 11:33:13.135782 TX Bit1 (977~1003) 27 990, Bit9 (968~990) 23 979,
3604 11:33:13.142166 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3605 11:33:13.145822 TX Bit3 (975~998) 24 986, Bit11 (969~993) 25 981,
3606 11:33:13.149233 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3607 11:33:13.155633 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3608 11:33:13.158667 TX Bit6 (977~1004) 28 990, Bit14 (969~992) 24 980,
3609 11:33:13.165333 TX Bit7 (978~1002) 25 990, Bit15 (963~988) 26 975,
3610 11:33:13.165418
3611 11:33:13.165498 Write Rank1 MR14 =0x26
3612 11:33:13.177296
3613 11:33:13.180167 CH=1, VrefRange= 0, VrefLevel = 38
3614 11:33:13.183489 TX Bit0 (978~1005) 28 991, Bit8 (967~990) 24 978,
3615 11:33:13.186571 TX Bit1 (977~1003) 27 990, Bit9 (968~990) 23 979,
3616 11:33:13.193521 TX Bit2 (977~1001) 25 989, Bit10 (969~992) 24 980,
3617 11:33:13.196626 TX Bit3 (975~998) 24 986, Bit11 (969~993) 25 981,
3618 11:33:13.200007 TX Bit4 (978~1003) 26 990, Bit12 (970~993) 24 981,
3619 11:33:13.206765 TX Bit5 (978~1004) 27 991, Bit13 (970~993) 24 981,
3620 11:33:13.210267 TX Bit6 (977~1004) 28 990, Bit14 (969~992) 24 980,
3621 11:33:13.216884 TX Bit7 (978~1002) 25 990, Bit15 (963~988) 26 975,
3622 11:33:13.216957
3623 11:33:13.217027
3624 11:33:13.220166 TX Vref found, early break! 377< 383
3625 11:33:13.223667 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3626 11:33:13.226583 u1DelayCellOfst[0]=6 cells (5 PI)
3627 11:33:13.229920 u1DelayCellOfst[1]=5 cells (4 PI)
3628 11:33:13.233214 u1DelayCellOfst[2]=3 cells (3 PI)
3629 11:33:13.236789 u1DelayCellOfst[3]=0 cells (0 PI)
3630 11:33:13.239872 u1DelayCellOfst[4]=5 cells (4 PI)
3631 11:33:13.243296 u1DelayCellOfst[5]=6 cells (5 PI)
3632 11:33:13.243366 u1DelayCellOfst[6]=5 cells (4 PI)
3633 11:33:13.246434 u1DelayCellOfst[7]=5 cells (4 PI)
3634 11:33:13.249645 Byte0, DQ PI dly=986, DQM PI dly= 988
3635 11:33:13.256532 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
3636 11:33:13.256605
3637 11:33:13.259722 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
3638 11:33:13.259796
3639 11:33:13.263049 u1DelayCellOfst[8]=3 cells (3 PI)
3640 11:33:13.266254 u1DelayCellOfst[9]=5 cells (4 PI)
3641 11:33:13.269894 u1DelayCellOfst[10]=6 cells (5 PI)
3642 11:33:13.273094 u1DelayCellOfst[11]=7 cells (6 PI)
3643 11:33:13.276531 u1DelayCellOfst[12]=7 cells (6 PI)
3644 11:33:13.279815 u1DelayCellOfst[13]=7 cells (6 PI)
3645 11:33:13.282902 u1DelayCellOfst[14]=6 cells (5 PI)
3646 11:33:13.286636 u1DelayCellOfst[15]=0 cells (0 PI)
3647 11:33:13.290188 Byte1, DQ PI dly=975, DQM PI dly= 978
3648 11:33:13.293148 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
3649 11:33:13.293222
3650 11:33:13.296407 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
3651 11:33:13.296492
3652 11:33:13.299649 Write Rank1 MR14 =0x1e
3653 11:33:13.299719
3654 11:33:13.303035 Final TX Range 0 Vref 30
3655 11:33:13.303109
3656 11:33:13.310001 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3657 11:33:13.310077
3658 11:33:13.316265 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3659 11:33:13.323039 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3660 11:33:13.329598 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3661 11:33:13.329681 Write Rank1 MR3 =0xb0
3662 11:33:13.333531 DramC Write-DBI on
3663 11:33:13.333606 ==
3664 11:33:13.336381 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3665 11:33:13.340164 fsp= 1, odt_onoff= 1, Byte mode= 0
3666 11:33:13.340236 ==
3667 11:33:13.346482 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3668 11:33:13.346556
3669 11:33:13.349823 Begin, DQ Scan Range 698~762
3670 11:33:13.349900
3671 11:33:13.349961
3672 11:33:13.350018 TX Vref Scan disable
3673 11:33:13.352953 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3674 11:33:13.356307 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3675 11:33:13.359584 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3676 11:33:13.366173 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3677 11:33:13.369475 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3678 11:33:13.372735 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3679 11:33:13.376067 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3680 11:33:13.379764 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3681 11:33:13.382917 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3682 11:33:13.386303 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3683 11:33:13.389494 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3684 11:33:13.392873 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3685 11:33:13.396108 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3686 11:33:13.399583 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3687 11:33:13.402720 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3688 11:33:13.405921 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3689 11:33:13.409552 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3690 11:33:13.412817 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3691 11:33:13.416120 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3692 11:33:13.419363 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3693 11:33:13.422552 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3694 11:33:13.426164 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3695 11:33:13.429622 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3696 11:33:13.436092 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3697 11:33:13.439309 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3698 11:33:13.442992 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3699 11:33:13.445867 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3700 11:33:13.449484 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3701 11:33:13.456005 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3702 11:33:13.459357 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3703 11:33:13.462547 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3704 11:33:13.465828 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3705 11:33:13.469088 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3706 11:33:13.472421 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3707 11:33:13.476158 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3708 11:33:13.479504 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3709 11:33:13.482683 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3710 11:33:13.486087 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3711 11:33:13.489389 750 |2 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
3712 11:33:13.492461 Byte0, DQ PI dly=735, DQM PI dly= 735
3713 11:33:13.495838 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 31)
3714 11:33:13.495916
3715 11:33:13.502506 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 31)
3716 11:33:13.502578
3717 11:33:13.506066 Byte1, DQ PI dly=723, DQM PI dly= 723
3718 11:33:13.509566 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3719 11:33:13.509635
3720 11:33:13.512713 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3721 11:33:13.515909
3722 11:33:13.519199 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3723 11:33:13.528941 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3724 11:33:13.535930 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3725 11:33:13.536025 Write Rank1 MR3 =0x30
3726 11:33:13.539011 DramC Write-DBI off
3727 11:33:13.539084
3728 11:33:13.539146 [DATLAT]
3729 11:33:13.542327 Freq=1600, CH1 RK1, use_rxtx_scan=0
3730 11:33:13.542400
3731 11:33:13.545586 DATLAT Default: 0x10
3732 11:33:13.545655 7, 0xFFFF, sum=0
3733 11:33:13.549383 8, 0xFFFF, sum=0
3734 11:33:13.549455 9, 0xFFFF, sum=0
3735 11:33:13.552247 10, 0xFFFF, sum=0
3736 11:33:13.552315 11, 0xFFFF, sum=0
3737 11:33:13.555583 12, 0xFFFF, sum=0
3738 11:33:13.555652 13, 0xFFFF, sum=0
3739 11:33:13.558743 14, 0x0, sum=1
3740 11:33:13.558831 15, 0x0, sum=2
3741 11:33:13.558895 16, 0x0, sum=3
3742 11:33:13.562170 17, 0x0, sum=4
3743 11:33:13.565465 pattern=2 first_step=14 total pass=5 best_step=16
3744 11:33:13.565561 ==
3745 11:33:13.572541 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3746 11:33:13.575962 fsp= 1, odt_onoff= 1, Byte mode= 0
3747 11:33:13.576035 ==
3748 11:33:13.579160 Start DQ dly to find pass range UseTestEngine =1
3749 11:33:13.582381 x-axis: bit #, y-axis: DQ dly (-127~63)
3750 11:33:13.585606 RX Vref Scan = 0
3751 11:33:13.585679 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3752 11:33:13.589056 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3753 11:33:13.592131 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3754 11:33:13.595415 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3755 11:33:13.599127 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3756 11:33:13.602162 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3757 11:33:13.605594 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3758 11:33:13.609173 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3759 11:33:13.609262 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3760 11:33:13.612436 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3761 11:33:13.615828 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3762 11:33:13.618945 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3763 11:33:13.622155 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3764 11:33:13.625430 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3765 11:33:13.628658 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3766 11:33:13.632149 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3767 11:33:13.635640 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3768 11:33:13.635712 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3769 11:33:13.638644 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3770 11:33:13.642576 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3771 11:33:13.645542 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3772 11:33:13.648736 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3773 11:33:13.652018 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3774 11:33:13.655500 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3775 11:33:13.655607 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3776 11:33:13.658639 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3777 11:33:13.662152 0, [0] xxooxxxx ooxxxxxo [MSB]
3778 11:33:13.665273 1, [0] xxooxxxx ooxxxxxo [MSB]
3779 11:33:13.668725 2, [0] xxooxxxx ooxxxxxo [MSB]
3780 11:33:13.672016 3, [0] oxooxxxo oooxxxxo [MSB]
3781 11:33:13.672131 4, [0] oxoooxxo ooooooxo [MSB]
3782 11:33:13.677181 32, [0] oooooooo ooooooox [MSB]
3783 11:33:13.680397 33, [0] oooooooo ooooooox [MSB]
3784 11:33:13.683729 34, [0] oooooooo ooooooox [MSB]
3785 11:33:13.687015 35, [0] oooxoooo oxooooox [MSB]
3786 11:33:13.690284 36, [0] oooxoooo xxooooox [MSB]
3787 11:33:13.693534 37, [0] ooxxoooo xxooooox [MSB]
3788 11:33:13.697356 38, [0] ooxxoooo xxooooox [MSB]
3789 11:33:13.697432 39, [0] ooxxooox xxooooox [MSB]
3790 11:33:13.700512 40, [0] oxxxxoox xxxoooox [MSB]
3791 11:33:13.704018 41, [0] oxxxxxox xxxxxxxx [MSB]
3792 11:33:13.706792 42, [0] xxxxxxxx xxxxxxxx [MSB]
3793 11:33:13.710429 iDelay=42, Bit 0, Center 22 (3 ~ 41) 39
3794 11:33:13.713765 iDelay=42, Bit 1, Center 22 (5 ~ 39) 35
3795 11:33:13.717007 iDelay=42, Bit 2, Center 18 (0 ~ 36) 37
3796 11:33:13.720274 iDelay=42, Bit 3, Center 16 (-2 ~ 34) 37
3797 11:33:13.723478 iDelay=42, Bit 4, Center 21 (4 ~ 39) 36
3798 11:33:13.727618 iDelay=42, Bit 5, Center 22 (5 ~ 40) 36
3799 11:33:13.730630 iDelay=42, Bit 6, Center 23 (5 ~ 41) 37
3800 11:33:13.733502 iDelay=42, Bit 7, Center 20 (3 ~ 38) 36
3801 11:33:13.740308 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
3802 11:33:13.743608 iDelay=42, Bit 9, Center 16 (-2 ~ 34) 37
3803 11:33:13.746882 iDelay=42, Bit 10, Center 21 (3 ~ 39) 37
3804 11:33:13.750067 iDelay=42, Bit 11, Center 22 (4 ~ 40) 37
3805 11:33:13.753723 iDelay=42, Bit 12, Center 22 (4 ~ 40) 37
3806 11:33:13.756941 iDelay=42, Bit 13, Center 22 (4 ~ 40) 37
3807 11:33:13.760248 iDelay=42, Bit 14, Center 22 (5 ~ 40) 36
3808 11:33:13.763343 iDelay=42, Bit 15, Center 14 (-3 ~ 31) 35
3809 11:33:13.763424 ==
3810 11:33:13.770116 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3811 11:33:13.773604 fsp= 1, odt_onoff= 1, Byte mode= 0
3812 11:33:13.773680 ==
3813 11:33:13.773752 DQS Delay:
3814 11:33:13.776625 DQS0 = 0, DQS1 = 0
3815 11:33:13.776699 DQM Delay:
3816 11:33:13.779836 DQM0 = 20, DQM1 = 19
3817 11:33:13.779906 DQ Delay:
3818 11:33:13.783570 DQ0 =22, DQ1 =22, DQ2 =18, DQ3 =16
3819 11:33:13.786535 DQ4 =21, DQ5 =22, DQ6 =23, DQ7 =20
3820 11:33:13.789834 DQ8 =17, DQ9 =16, DQ10 =21, DQ11 =22
3821 11:33:13.793652 DQ12 =22, DQ13 =22, DQ14 =22, DQ15 =14
3822 11:33:13.793735
3823 11:33:13.793799
3824 11:33:13.793858
3825 11:33:13.796761 [DramC_TX_OE_Calibration] TA2
3826 11:33:13.799786 Original DQ_B0 (3 6) =30, OEN = 27
3827 11:33:13.803099 Original DQ_B1 (3 6) =30, OEN = 27
3828 11:33:13.803182 23, 0x0, End_B0=23 End_B1=23
3829 11:33:13.806851 24, 0x0, End_B0=24 End_B1=24
3830 11:33:13.809760 25, 0x0, End_B0=25 End_B1=25
3831 11:33:13.813142 26, 0x0, End_B0=26 End_B1=26
3832 11:33:13.813227 27, 0x0, End_B0=27 End_B1=27
3833 11:33:13.816676 28, 0x0, End_B0=28 End_B1=28
3834 11:33:13.819920 29, 0x0, End_B0=29 End_B1=29
3835 11:33:13.823188 30, 0x0, End_B0=30 End_B1=30
3836 11:33:13.826462 31, 0xFFFF, End_B0=30 End_B1=30
3837 11:33:13.829901 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3838 11:33:13.836384 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3839 11:33:13.836477
3840 11:33:13.836542
3841 11:33:13.839638 Write Rank1 MR23 =0x3f
3842 11:33:13.839720 [DQSOSC]
3843 11:33:13.846164 [DQSOSCAuto] RK1, (LSB)MR18= 0xcece, (MSB)MR19= 0x202, tDQSOscB0 = 438 ps tDQSOscB1 = 438 ps
3844 11:33:13.853073 CH1_RK1: MR19=0x202, MR18=0xCECE, DQSOSC=438, MR23=63, INC=12, DEC=19
3845 11:33:13.856095 Write Rank1 MR23 =0x3f
3846 11:33:13.856182 [DQSOSC]
3847 11:33:13.866301 [DQSOSCAuto] RK1, (LSB)MR18= 0xcdcd, (MSB)MR19= 0x202, tDQSOscB0 = 439 ps tDQSOscB1 = 439 ps
3848 11:33:13.866385 CH1 RK1: MR19=202, MR18=CDCD
3849 11:33:13.869801 [RxdqsGatingPostProcess] freq 1600
3850 11:33:13.876675 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3851 11:33:13.876759 Rank: 0
3852 11:33:13.879653 best DQS0 dly(2T, 0.5T) = (2, 6)
3853 11:33:13.883156 best DQS1 dly(2T, 0.5T) = (2, 6)
3854 11:33:13.886651 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3855 11:33:13.889860 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3856 11:33:13.889944 Rank: 1
3857 11:33:13.893226 best DQS0 dly(2T, 0.5T) = (2, 5)
3858 11:33:13.896236 best DQS1 dly(2T, 0.5T) = (2, 6)
3859 11:33:13.899487 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3860 11:33:13.902853 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3861 11:33:13.906521 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3862 11:33:13.909605 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3863 11:33:13.916326 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3864 11:33:13.916406
3865 11:33:13.916491
3866 11:33:13.919412 [Calibration Summary] Freqency 1600
3867 11:33:13.919491 CH 0, Rank 0
3868 11:33:13.919553 All Pass.
3869 11:33:13.919611
3870 11:33:13.923006 CH 0, Rank 1
3871 11:33:13.923075 All Pass.
3872 11:33:13.923134
3873 11:33:13.923191 CH 1, Rank 0
3874 11:33:13.926294 All Pass.
3875 11:33:13.926366
3876 11:33:13.926426 CH 1, Rank 1
3877 11:33:13.926489 All Pass.
3878 11:33:13.926545
3879 11:33:13.932928 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3880 11:33:13.943006 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3881 11:33:13.949352 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3882 11:33:13.949437 Write Rank0 MR3 =0xb0
3883 11:33:13.956127 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3884 11:33:13.962883 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3885 11:33:13.969600 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3886 11:33:13.972417 Write Rank1 MR3 =0xb0
3887 11:33:13.979128 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3888 11:33:13.985860 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3889 11:33:13.992493 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3890 11:33:13.996306 Write Rank0 MR3 =0xb0
3891 11:33:14.002566 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3892 11:33:14.009418 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3893 11:33:14.016042 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3894 11:33:14.019308 Write Rank1 MR3 =0xb0
3895 11:33:14.019388 DramC Write-DBI on
3896 11:33:14.022676 [GetDramInforAfterCalByMRR] Vendor 6.
3897 11:33:14.026072 [GetDramInforAfterCalByMRR] Revision 505.
3898 11:33:14.026147 MR8 1111
3899 11:33:14.032755 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3900 11:33:14.032837 MR8 1111
3901 11:33:14.039367 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3902 11:33:14.039447 MR8 1111
3903 11:33:14.042587 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3904 11:33:14.045888 MR8 1111
3905 11:33:14.049146 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3906 11:33:14.059175 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3907 11:33:14.059256 Write Rank0 MR13 =0xd0
3908 11:33:14.062568 Write Rank1 MR13 =0xd0
3909 11:33:14.065899 Write Rank0 MR13 =0xd0
3910 11:33:14.065982 Write Rank1 MR13 =0xd0
3911 11:33:14.069596 Save calibration result to emmc
3912 11:33:14.069679
3913 11:33:14.069744
3914 11:33:14.072528 [DramcModeReg_Check] Freq_1600, FSP_1
3915 11:33:14.075781 FSP_1, CH_0, RK0
3916 11:33:14.075866 Write Rank0 MR13 =0xd8
3917 11:33:14.079256 MR12 = 0x60 (global = 0x60) match
3918 11:33:14.082443 MR14 = 0x1c (global = 0x1c) match
3919 11:33:14.085923 FSP_1, CH_0, RK1
3920 11:33:14.086033 Write Rank1 MR13 =0xd8
3921 11:33:14.088866 MR12 = 0x5c (global = 0x5c) match
3922 11:33:14.092617 MR14 = 0x20 (global = 0x20) match
3923 11:33:14.095389 FSP_1, CH_1, RK0
3924 11:33:14.095499 Write Rank0 MR13 =0xd8
3925 11:33:14.099144 MR12 = 0x60 (global = 0x60) match
3926 11:33:14.102720 MR14 = 0x1e (global = 0x1e) match
3927 11:33:14.105758 FSP_1, CH_1, RK1
3928 11:33:14.105841 Write Rank1 MR13 =0xd8
3929 11:33:14.109230 MR12 = 0x5e (global = 0x5e) match
3930 11:33:14.112558 MR14 = 0x1e (global = 0x1e) match
3931 11:33:14.112641
3932 11:33:14.119018 [MEM_TEST] 02: After DFS, before run time config
3933 11:33:14.125636 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3934 11:33:14.125720
3935 11:33:14.129344 [TA2_TEST]
3936 11:33:14.129427 === TA2 HW
3937 11:33:14.132252 TA2 PAT: XTALK
3938 11:33:14.135608 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3939 11:33:14.138661 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3940 11:33:14.145496 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3941 11:33:14.148727 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3942 11:33:14.148805
3943 11:33:14.148878
3944 11:33:14.152078 Settings after calibration
3945 11:33:14.152158
3946 11:33:14.155421 [DramcRunTimeConfig]
3947 11:33:14.158457 TransferPLLToSPMControl - MODE SW PHYPLL
3948 11:33:14.158531 TX_TRACKING: ON
3949 11:33:14.161916 RX_TRACKING: ON
3950 11:33:14.161990 HW_GATING: ON
3951 11:33:14.165250 HW_GATING DBG: OFF
3952 11:33:14.165325 ddr_geometry:1
3953 11:33:14.168475 ddr_geometry:1
3954 11:33:14.168550 ddr_geometry:1
3955 11:33:14.168620 ddr_geometry:1
3956 11:33:14.171847 ddr_geometry:1
3957 11:33:14.171920 ddr_geometry:1
3958 11:33:14.175731 ddr_geometry:1
3959 11:33:14.175804 ddr_geometry:1
3960 11:33:14.178474 High Freq DUMMY_READ_FOR_TRACKING: ON
3961 11:33:14.182164 ZQCS_ENABLE_LP4: OFF
3962 11:33:14.182251 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3963 11:33:14.185555 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3964 11:33:14.188627 SPM_CONTROL_AFTERK: ON
3965 11:33:14.191665 IMPEDANCE_TRACKING: ON
3966 11:33:14.191737 TEMP_SENSOR: ON
3967 11:33:14.195145 PER_BANK_REFRESH: ON
3968 11:33:14.195220 HW_SAVE_FOR_SR: ON
3969 11:33:14.198491 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3970 11:33:14.201784 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3971 11:33:14.205551 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3972 11:33:14.208615 Read ODT Tracking: ON
3973 11:33:14.211720 =========================
3974 11:33:14.211794
3975 11:33:14.211864 [TA2_TEST]
3976 11:33:14.211924 === TA2 HW
3977 11:33:14.218565 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3978 11:33:14.221570 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3979 11:33:14.228472 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3980 11:33:14.231680 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3981 11:33:14.231756
3982 11:33:14.235261 [MEM_TEST] 03: After run time config
3983 11:33:14.246487 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3984 11:33:14.249504 [complex_mem_test] start addr:0x40024000, len:131072
3985 11:33:14.453697 1st complex R/W mem test pass
3986 11:33:14.460390 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3987 11:33:14.463731 sync preloader write leveling
3988 11:33:14.467143 sync preloader cbt_mr12
3989 11:33:14.470600 sync preloader cbt_clk_dly
3990 11:33:14.470678 sync preloader cbt_cmd_dly
3991 11:33:14.473891 sync preloader cbt_cs
3992 11:33:14.477112 sync preloader cbt_ca_perbit_delay
3993 11:33:14.477190 sync preloader clk_delay
3994 11:33:14.480538 sync preloader dqs_delay
3995 11:33:14.483635 sync preloader u1Gating2T_Save
3996 11:33:14.486830 sync preloader u1Gating05T_Save
3997 11:33:14.490761 sync preloader u1Gatingfine_tune_Save
3998 11:33:14.493959 sync preloader u1Gatingucpass_count_Save
3999 11:33:14.497148 sync preloader u1TxWindowPerbitVref_Save
4000 11:33:14.500483 sync preloader u1TxCenter_min_Save
4001 11:33:14.503784 sync preloader u1TxCenter_max_Save
4002 11:33:14.506940 sync preloader u1Txwin_center_Save
4003 11:33:14.510635 sync preloader u1Txfirst_pass_Save
4004 11:33:14.513596 sync preloader u1Txlast_pass_Save
4005 11:33:14.513668 sync preloader u1RxDatlat_Save
4006 11:33:14.517113 sync preloader u1RxWinPerbitVref_Save
4007 11:33:14.523482 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4008 11:33:14.527143 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4009 11:33:14.530272 sync preloader delay_cell_unit
4010 11:33:14.536795 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4011 11:33:14.540619 sync preloader write leveling
4012 11:33:14.540692 sync preloader cbt_mr12
4013 11:33:14.543405 sync preloader cbt_clk_dly
4014 11:33:14.546803 sync preloader cbt_cmd_dly
4015 11:33:14.546886 sync preloader cbt_cs
4016 11:33:14.550484 sync preloader cbt_ca_perbit_delay
4017 11:33:14.553629 sync preloader clk_delay
4018 11:33:14.557306 sync preloader dqs_delay
4019 11:33:14.557389 sync preloader u1Gating2T_Save
4020 11:33:14.560426 sync preloader u1Gating05T_Save
4021 11:33:14.563524 sync preloader u1Gatingfine_tune_Save
4022 11:33:14.567042 sync preloader u1Gatingucpass_count_Save
4023 11:33:14.570409 sync preloader u1TxWindowPerbitVref_Save
4024 11:33:14.573623 sync preloader u1TxCenter_min_Save
4025 11:33:14.576928 sync preloader u1TxCenter_max_Save
4026 11:33:14.580393 sync preloader u1Txwin_center_Save
4027 11:33:14.583451 sync preloader u1Txfirst_pass_Save
4028 11:33:14.586868 sync preloader u1Txlast_pass_Save
4029 11:33:14.590191 sync preloader u1RxDatlat_Save
4030 11:33:14.593413 sync preloader u1RxWinPerbitVref_Save
4031 11:33:14.596725 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4032 11:33:14.599963 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4033 11:33:14.603372 sync preloader delay_cell_unit
4034 11:33:14.609839 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4035 11:33:14.613123 sync preloader write leveling
4036 11:33:14.616938 sync preloader cbt_mr12
4037 11:33:14.617020 sync preloader cbt_clk_dly
4038 11:33:14.619959 sync preloader cbt_cmd_dly
4039 11:33:14.623457 sync preloader cbt_cs
4040 11:33:14.626379 sync preloader cbt_ca_perbit_delay
4041 11:33:14.626467 sync preloader clk_delay
4042 11:33:14.630173 sync preloader dqs_delay
4043 11:33:14.633097 sync preloader u1Gating2T_Save
4044 11:33:14.637035 sync preloader u1Gating05T_Save
4045 11:33:14.640204 sync preloader u1Gatingfine_tune_Save
4046 11:33:14.643425 sync preloader u1Gatingucpass_count_Save
4047 11:33:14.646679 sync preloader u1TxWindowPerbitVref_Save
4048 11:33:14.649969 sync preloader u1TxCenter_min_Save
4049 11:33:14.653155 sync preloader u1TxCenter_max_Save
4050 11:33:14.657014 sync preloader u1Txwin_center_Save
4051 11:33:14.659837 sync preloader u1Txfirst_pass_Save
4052 11:33:14.663226 sync preloader u1Txlast_pass_Save
4053 11:33:14.663310 sync preloader u1RxDatlat_Save
4054 11:33:14.666549 sync preloader u1RxWinPerbitVref_Save
4055 11:33:14.673038 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4056 11:33:14.676692 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4057 11:33:14.679893 sync preloader delay_cell_unit
4058 11:33:14.683495 just_for_test_dump_coreboot_params dump all params
4059 11:33:14.686615 dump source = 0x0
4060 11:33:14.686699 dump params frequency:1600
4061 11:33:14.690080 dump params rank number:2
4062 11:33:14.690164
4063 11:33:14.693031 dump params write leveling
4064 11:33:14.696680 write leveling[0][0][0] = 0x21
4065 11:33:14.696764 write leveling[0][0][1] = 0x18
4066 11:33:14.700000 write leveling[0][1][0] = 0x1b
4067 11:33:14.703563 write leveling[0][1][1] = 0x18
4068 11:33:14.706998 write leveling[1][0][0] = 0x22
4069 11:33:14.709965 write leveling[1][0][1] = 0x18
4070 11:33:14.713194 write leveling[1][1][0] = 0x22
4071 11:33:14.713267 write leveling[1][1][1] = 0x18
4072 11:33:14.716389 dump params cbt_cs
4073 11:33:14.716496 cbt_cs[0][0] = 0x8
4074 11:33:14.719710 cbt_cs[0][1] = 0x8
4075 11:33:14.719785 cbt_cs[1][0] = 0xb
4076 11:33:14.723119 cbt_cs[1][1] = 0xb
4077 11:33:14.726677 dump params cbt_mr12
4078 11:33:14.726774 cbt_mr12[0][0] = 0x20
4079 11:33:14.729955 cbt_mr12[0][1] = 0x1c
4080 11:33:14.730039 cbt_mr12[1][0] = 0x20
4081 11:33:14.733050 cbt_mr12[1][1] = 0x1e
4082 11:33:14.736529 dump params tx window
4083 11:33:14.736612 tx_center_min[0][0][0] = 982
4084 11:33:14.740033 tx_center_max[0][0][0] = 989
4085 11:33:14.743246 tx_center_min[0][0][1] = 975
4086 11:33:14.746545 tx_center_max[0][0][1] = 981
4087 11:33:14.749728 tx_center_min[0][1][0] = 980
4088 11:33:14.749800 tx_center_max[0][1][0] = 986
4089 11:33:14.752932 tx_center_min[0][1][1] = 978
4090 11:33:14.756244 tx_center_max[0][1][1] = 984
4091 11:33:14.759652 tx_center_min[1][0][0] = 989
4092 11:33:14.759723 tx_center_max[1][0][0] = 993
4093 11:33:14.763513 tx_center_min[1][0][1] = 977
4094 11:33:14.766689 tx_center_max[1][0][1] = 983
4095 11:33:14.769728 tx_center_min[1][1][0] = 986
4096 11:33:14.772931 tx_center_max[1][1][0] = 991
4097 11:33:14.773002 tx_center_min[1][1][1] = 975
4098 11:33:14.776577 tx_center_max[1][1][1] = 981
4099 11:33:14.779760 dump params tx window
4100 11:33:14.783083 tx_win_center[0][0][0] = 988
4101 11:33:14.783149 tx_first_pass[0][0][0] = 976
4102 11:33:14.786181 tx_last_pass[0][0][0] = 1001
4103 11:33:14.789739 tx_win_center[0][0][1] = 988
4104 11:33:14.792777 tx_first_pass[0][0][1] = 976
4105 11:33:14.796183 tx_last_pass[0][0][1] = 1000
4106 11:33:14.796248 tx_win_center[0][0][2] = 989
4107 11:33:14.799602 tx_first_pass[0][0][2] = 977
4108 11:33:14.802933 tx_last_pass[0][0][2] = 1001
4109 11:33:14.806354 tx_win_center[0][0][3] = 982
4110 11:33:14.806428 tx_first_pass[0][0][3] = 970
4111 11:33:14.809937 tx_last_pass[0][0][3] = 995
4112 11:33:14.812985 tx_win_center[0][0][4] = 987
4113 11:33:14.815979 tx_first_pass[0][0][4] = 975
4114 11:33:14.819243 tx_last_pass[0][0][4] = 1000
4115 11:33:14.819342 tx_win_center[0][0][5] = 985
4116 11:33:14.822804 tx_first_pass[0][0][5] = 972
4117 11:33:14.825853 tx_last_pass[0][0][5] = 998
4118 11:33:14.829673 tx_win_center[0][0][6] = 986
4119 11:33:14.829772 tx_first_pass[0][0][6] = 974
4120 11:33:14.832837 tx_last_pass[0][0][6] = 999
4121 11:33:14.835938 tx_win_center[0][0][7] = 988
4122 11:33:14.839209 tx_first_pass[0][0][7] = 976
4123 11:33:14.843195 tx_last_pass[0][0][7] = 1000
4124 11:33:14.843268 tx_win_center[0][0][8] = 975
4125 11:33:14.846107 tx_first_pass[0][0][8] = 963
4126 11:33:14.849592 tx_last_pass[0][0][8] = 987
4127 11:33:14.852892 tx_win_center[0][0][9] = 978
4128 11:33:14.856198 tx_first_pass[0][0][9] = 967
4129 11:33:14.856282 tx_last_pass[0][0][9] = 990
4130 11:33:14.859455 tx_win_center[0][0][10] = 981
4131 11:33:14.863053 tx_first_pass[0][0][10] = 969
4132 11:33:14.865910 tx_last_pass[0][0][10] = 993
4133 11:33:14.865976 tx_win_center[0][0][11] = 977
4134 11:33:14.869651 tx_first_pass[0][0][11] = 965
4135 11:33:14.872930 tx_last_pass[0][0][11] = 989
4136 11:33:14.876119 tx_win_center[0][0][12] = 978
4137 11:33:14.879387 tx_first_pass[0][0][12] = 967
4138 11:33:14.882792 tx_last_pass[0][0][12] = 990
4139 11:33:14.882860 tx_win_center[0][0][13] = 978
4140 11:33:14.885905 tx_first_pass[0][0][13] = 967
4141 11:33:14.889215 tx_last_pass[0][0][13] = 990
4142 11:33:14.892679 tx_win_center[0][0][14] = 978
4143 11:33:14.896070 tx_first_pass[0][0][14] = 967
4144 11:33:14.896153 tx_last_pass[0][0][14] = 990
4145 11:33:14.899502 tx_win_center[0][0][15] = 981
4146 11:33:14.902713 tx_first_pass[0][0][15] = 969
4147 11:33:14.905878 tx_last_pass[0][0][15] = 993
4148 11:33:14.905962 tx_win_center[0][1][0] = 986
4149 11:33:14.909437 tx_first_pass[0][1][0] = 974
4150 11:33:14.912753 tx_last_pass[0][1][0] = 999
4151 11:33:14.915923 tx_win_center[0][1][1] = 986
4152 11:33:14.919090 tx_first_pass[0][1][1] = 974
4153 11:33:14.919173 tx_last_pass[0][1][1] = 998
4154 11:33:14.922825 tx_win_center[0][1][2] = 986
4155 11:33:14.925895 tx_first_pass[0][1][2] = 975
4156 11:33:14.929197 tx_last_pass[0][1][2] = 998
4157 11:33:14.932847 tx_win_center[0][1][3] = 980
4158 11:33:14.932929 tx_first_pass[0][1][3] = 968
4159 11:33:14.936110 tx_last_pass[0][1][3] = 992
4160 11:33:14.939443 tx_win_center[0][1][4] = 985
4161 11:33:14.942674 tx_first_pass[0][1][4] = 972
4162 11:33:14.942785 tx_last_pass[0][1][4] = 998
4163 11:33:14.945868 tx_win_center[0][1][5] = 981
4164 11:33:14.949291 tx_first_pass[0][1][5] = 969
4165 11:33:14.952816 tx_last_pass[0][1][5] = 994
4166 11:33:14.952925 tx_win_center[0][1][6] = 983
4167 11:33:14.955934 tx_first_pass[0][1][6] = 970
4168 11:33:14.959055 tx_last_pass[0][1][6] = 996
4169 11:33:14.962748 tx_win_center[0][1][7] = 985
4170 11:33:14.965866 tx_first_pass[0][1][7] = 972
4171 11:33:14.965948 tx_last_pass[0][1][7] = 998
4172 11:33:14.969375 tx_win_center[0][1][8] = 978
4173 11:33:14.972472 tx_first_pass[0][1][8] = 966
4174 11:33:14.975679 tx_last_pass[0][1][8] = 990
4175 11:33:14.975761 tx_win_center[0][1][9] = 979
4176 11:33:14.978961 tx_first_pass[0][1][9] = 968
4177 11:33:14.982374 tx_last_pass[0][1][9] = 991
4178 11:33:14.985788 tx_win_center[0][1][10] = 984
4179 11:33:14.989009 tx_first_pass[0][1][10] = 971
4180 11:33:14.989108 tx_last_pass[0][1][10] = 997
4181 11:33:14.992300 tx_win_center[0][1][11] = 978
4182 11:33:14.995530 tx_first_pass[0][1][11] = 967
4183 11:33:14.998752 tx_last_pass[0][1][11] = 990
4184 11:33:15.002626 tx_win_center[0][1][12] = 979
4185 11:33:15.005787 tx_first_pass[0][1][12] = 968
4186 11:33:15.005870 tx_last_pass[0][1][12] = 991
4187 11:33:15.008926 tx_win_center[0][1][13] = 980
4188 11:33:15.012124 tx_first_pass[0][1][13] = 969
4189 11:33:15.015804 tx_last_pass[0][1][13] = 991
4190 11:33:15.019130 tx_win_center[0][1][14] = 980
4191 11:33:15.019212 tx_first_pass[0][1][14] = 968
4192 11:33:15.022266 tx_last_pass[0][1][14] = 992
4193 11:33:15.025461 tx_win_center[0][1][15] = 983
4194 11:33:15.029006 tx_first_pass[0][1][15] = 971
4195 11:33:15.032031 tx_last_pass[0][1][15] = 995
4196 11:33:15.032140 tx_win_center[1][0][0] = 993
4197 11:33:15.035359 tx_first_pass[1][0][0] = 980
4198 11:33:15.038903 tx_last_pass[1][0][0] = 1006
4199 11:33:15.042245 tx_win_center[1][0][1] = 992
4200 11:33:15.042327 tx_first_pass[1][0][1] = 979
4201 11:33:15.045563 tx_last_pass[1][0][1] = 1005
4202 11:33:15.048792 tx_win_center[1][0][2] = 990
4203 11:33:15.051861 tx_first_pass[1][0][2] = 977
4204 11:33:15.055306 tx_last_pass[1][0][2] = 1003
4205 11:33:15.055388 tx_win_center[1][0][3] = 989
4206 11:33:15.058815 tx_first_pass[1][0][3] = 977
4207 11:33:15.062107 tx_last_pass[1][0][3] = 1001
4208 11:33:15.065572 tx_win_center[1][0][4] = 992
4209 11:33:15.068769 tx_first_pass[1][0][4] = 979
4210 11:33:15.068851 tx_last_pass[1][0][4] = 1006
4211 11:33:15.072240 tx_win_center[1][0][5] = 993
4212 11:33:15.075620 tx_first_pass[1][0][5] = 981
4213 11:33:15.078805 tx_last_pass[1][0][5] = 1006
4214 11:33:15.082121 tx_win_center[1][0][6] = 992
4215 11:33:15.082204 tx_first_pass[1][0][6] = 979
4216 11:33:15.085376 tx_last_pass[1][0][6] = 1006
4217 11:33:15.088647 tx_win_center[1][0][7] = 992
4218 11:33:15.091890 tx_first_pass[1][0][7] = 979
4219 11:33:15.091972 tx_last_pass[1][0][7] = 1005
4220 11:33:15.095076 tx_win_center[1][0][8] = 980
4221 11:33:15.098731 tx_first_pass[1][0][8] = 968
4222 11:33:15.101847 tx_last_pass[1][0][8] = 992
4223 11:33:15.105141 tx_win_center[1][0][9] = 980
4224 11:33:15.105223 tx_first_pass[1][0][9] = 969
4225 11:33:15.108283 tx_last_pass[1][0][9] = 991
4226 11:33:15.111910 tx_win_center[1][0][10] = 982
4227 11:33:15.115234 tx_first_pass[1][0][10] = 970
4228 11:33:15.118590 tx_last_pass[1][0][10] = 994
4229 11:33:15.118673 tx_win_center[1][0][11] = 982
4230 11:33:15.121606 tx_first_pass[1][0][11] = 970
4231 11:33:15.125344 tx_last_pass[1][0][11] = 994
4232 11:33:15.128463 tx_win_center[1][0][12] = 982
4233 11:33:15.131710 tx_first_pass[1][0][12] = 970
4234 11:33:15.131792 tx_last_pass[1][0][12] = 994
4235 11:33:15.134979 tx_win_center[1][0][13] = 983
4236 11:33:15.138705 tx_first_pass[1][0][13] = 972
4237 11:33:15.141906 tx_last_pass[1][0][13] = 994
4238 11:33:15.145240 tx_win_center[1][0][14] = 981
4239 11:33:15.145323 tx_first_pass[1][0][14] = 970
4240 11:33:15.148584 tx_last_pass[1][0][14] = 993
4241 11:33:15.151579 tx_win_center[1][0][15] = 977
4242 11:33:15.154797 tx_first_pass[1][0][15] = 966
4243 11:33:15.158490 tx_last_pass[1][0][15] = 988
4244 11:33:15.158573 tx_win_center[1][1][0] = 991
4245 11:33:15.161477 tx_first_pass[1][1][0] = 978
4246 11:33:15.164981 tx_last_pass[1][1][0] = 1005
4247 11:33:15.168124 tx_win_center[1][1][1] = 990
4248 11:33:15.171356 tx_first_pass[1][1][1] = 977
4249 11:33:15.171466 tx_last_pass[1][1][1] = 1003
4250 11:33:15.174956 tx_win_center[1][1][2] = 989
4251 11:33:15.177991 tx_first_pass[1][1][2] = 977
4252 11:33:15.181627 tx_last_pass[1][1][2] = 1001
4253 11:33:15.181711 tx_win_center[1][1][3] = 986
4254 11:33:15.184998 tx_first_pass[1][1][3] = 975
4255 11:33:15.188153 tx_last_pass[1][1][3] = 998
4256 11:33:15.191500 tx_win_center[1][1][4] = 990
4257 11:33:15.194697 tx_first_pass[1][1][4] = 978
4258 11:33:15.194780 tx_last_pass[1][1][4] = 1003
4259 11:33:15.198000 tx_win_center[1][1][5] = 991
4260 11:33:15.201657 tx_first_pass[1][1][5] = 978
4261 11:33:15.204680 tx_last_pass[1][1][5] = 1004
4262 11:33:15.208377 tx_win_center[1][1][6] = 990
4263 11:33:15.208489 tx_first_pass[1][1][6] = 977
4264 11:33:15.211397 tx_last_pass[1][1][6] = 1004
4265 11:33:15.214740 tx_win_center[1][1][7] = 990
4266 11:33:15.217937 tx_first_pass[1][1][7] = 978
4267 11:33:15.218021 tx_last_pass[1][1][7] = 1002
4268 11:33:15.221633 tx_win_center[1][1][8] = 978
4269 11:33:15.224795 tx_first_pass[1][1][8] = 967
4270 11:33:15.228075 tx_last_pass[1][1][8] = 990
4271 11:33:15.231156 tx_win_center[1][1][9] = 979
4272 11:33:15.231230 tx_first_pass[1][1][9] = 968
4273 11:33:15.234452 tx_last_pass[1][1][9] = 990
4274 11:33:15.237586 tx_win_center[1][1][10] = 980
4275 11:33:15.241371 tx_first_pass[1][1][10] = 969
4276 11:33:15.244512 tx_last_pass[1][1][10] = 992
4277 11:33:15.244585 tx_win_center[1][1][11] = 981
4278 11:33:15.247793 tx_first_pass[1][1][11] = 969
4279 11:33:15.251165 tx_last_pass[1][1][11] = 993
4280 11:33:15.254317 tx_win_center[1][1][12] = 981
4281 11:33:15.257795 tx_first_pass[1][1][12] = 970
4282 11:33:15.257872 tx_last_pass[1][1][12] = 993
4283 11:33:15.261197 tx_win_center[1][1][13] = 981
4284 11:33:15.264288 tx_first_pass[1][1][13] = 970
4285 11:33:15.267419 tx_last_pass[1][1][13] = 993
4286 11:33:15.270973 tx_win_center[1][1][14] = 980
4287 11:33:15.271058 tx_first_pass[1][1][14] = 969
4288 11:33:15.274516 tx_last_pass[1][1][14] = 992
4289 11:33:15.277638 tx_win_center[1][1][15] = 975
4290 11:33:15.281300 tx_first_pass[1][1][15] = 963
4291 11:33:15.284290 tx_last_pass[1][1][15] = 988
4292 11:33:15.284373 dump params rx window
4293 11:33:15.287645 rx_firspass[0][0][0] = 5
4294 11:33:15.290908 rx_lastpass[0][0][0] = 38
4295 11:33:15.290990 rx_firspass[0][0][1] = 6
4296 11:33:15.294328 rx_lastpass[0][0][1] = 36
4297 11:33:15.297414 rx_firspass[0][0][2] = 6
4298 11:33:15.297497 rx_lastpass[0][0][2] = 36
4299 11:33:15.300839 rx_firspass[0][0][3] = -2
4300 11:33:15.304531 rx_lastpass[0][0][3] = 30
4301 11:33:15.307570 rx_firspass[0][0][4] = 5
4302 11:33:15.307652 rx_lastpass[0][0][4] = 36
4303 11:33:15.311060 rx_firspass[0][0][5] = 2
4304 11:33:15.314428 rx_lastpass[0][0][5] = 31
4305 11:33:15.314511 rx_firspass[0][0][6] = 3
4306 11:33:15.317555 rx_lastpass[0][0][6] = 33
4307 11:33:15.320762 rx_firspass[0][0][7] = 5
4308 11:33:15.320844 rx_lastpass[0][0][7] = 36
4309 11:33:15.324088 rx_firspass[0][0][8] = -3
4310 11:33:15.327976 rx_lastpass[0][0][8] = 32
4311 11:33:15.330693 rx_firspass[0][0][9] = 1
4312 11:33:15.330776 rx_lastpass[0][0][9] = 32
4313 11:33:15.334107 rx_firspass[0][0][10] = 8
4314 11:33:15.337816 rx_lastpass[0][0][10] = 40
4315 11:33:15.337899 rx_firspass[0][0][11] = 2
4316 11:33:15.341107 rx_lastpass[0][0][11] = 32
4317 11:33:15.344273 rx_firspass[0][0][12] = 2
4318 11:33:15.347591 rx_lastpass[0][0][12] = 36
4319 11:33:15.347674 rx_firspass[0][0][13] = 3
4320 11:33:15.350884 rx_lastpass[0][0][13] = 33
4321 11:33:15.354231 rx_firspass[0][0][14] = 2
4322 11:33:15.357429 rx_lastpass[0][0][14] = 36
4323 11:33:15.357512 rx_firspass[0][0][15] = 6
4324 11:33:15.360638 rx_lastpass[0][0][15] = 36
4325 11:33:15.364422 rx_firspass[0][1][0] = 6
4326 11:33:15.364515 rx_lastpass[0][1][0] = 40
4327 11:33:15.367548 rx_firspass[0][1][1] = 5
4328 11:33:15.370935 rx_lastpass[0][1][1] = 38
4329 11:33:15.371018 rx_firspass[0][1][2] = 6
4330 11:33:15.374220 rx_lastpass[0][1][2] = 38
4331 11:33:15.377206 rx_firspass[0][1][3] = -2
4332 11:33:15.380640 rx_lastpass[0][1][3] = 33
4333 11:33:15.380725 rx_firspass[0][1][4] = 5
4334 11:33:15.383890 rx_lastpass[0][1][4] = 39
4335 11:33:15.387400 rx_firspass[0][1][5] = 1
4336 11:33:15.387484 rx_lastpass[0][1][5] = 34
4337 11:33:15.390792 rx_firspass[0][1][6] = 3
4338 11:33:15.394145 rx_lastpass[0][1][6] = 37
4339 11:33:15.394227 rx_firspass[0][1][7] = 3
4340 11:33:15.397988 rx_lastpass[0][1][7] = 38
4341 11:33:15.400886 rx_firspass[0][1][8] = -2
4342 11:33:15.404258 rx_lastpass[0][1][8] = 32
4343 11:33:15.404341 rx_firspass[0][1][9] = 1
4344 11:33:15.407460 rx_lastpass[0][1][9] = 36
4345 11:33:15.410631 rx_firspass[0][1][10] = 7
4346 11:33:15.410714 rx_lastpass[0][1][10] = 43
4347 11:33:15.414110 rx_firspass[0][1][11] = -2
4348 11:33:15.417293 rx_lastpass[0][1][11] = 34
4349 11:33:15.420516 rx_firspass[0][1][12] = 1
4350 11:33:15.420600 rx_lastpass[0][1][12] = 37
4351 11:33:15.424002 rx_firspass[0][1][13] = 1
4352 11:33:15.427824 rx_lastpass[0][1][13] = 35
4353 11:33:15.430959 rx_firspass[0][1][14] = 3
4354 11:33:15.431041 rx_lastpass[0][1][14] = 37
4355 11:33:15.434103 rx_firspass[0][1][15] = 6
4356 11:33:15.437372 rx_lastpass[0][1][15] = 39
4357 11:33:15.437455 rx_firspass[1][0][0] = 5
4358 11:33:15.440491 rx_lastpass[1][0][0] = 38
4359 11:33:15.444059 rx_firspass[1][0][1] = 5
4360 11:33:15.447320 rx_lastpass[1][0][1] = 38
4361 11:33:15.447403 rx_firspass[1][0][2] = 2
4362 11:33:15.450698 rx_lastpass[1][0][2] = 35
4363 11:33:15.453926 rx_firspass[1][0][3] = 0
4364 11:33:15.454008 rx_lastpass[1][0][3] = 33
4365 11:33:15.457221 rx_firspass[1][0][4] = 5
4366 11:33:15.460572 rx_lastpass[1][0][4] = 38
4367 11:33:15.460656 rx_firspass[1][0][5] = 7
4368 11:33:15.464185 rx_lastpass[1][0][5] = 38
4369 11:33:15.467218 rx_firspass[1][0][6] = 7
4370 11:33:15.470580 rx_lastpass[1][0][6] = 40
4371 11:33:15.470664 rx_firspass[1][0][7] = 5
4372 11:33:15.473841 rx_lastpass[1][0][7] = 38
4373 11:33:15.477032 rx_firspass[1][0][8] = 1
4374 11:33:15.477115 rx_lastpass[1][0][8] = 33
4375 11:33:15.480904 rx_firspass[1][0][9] = 0
4376 11:33:15.483715 rx_lastpass[1][0][9] = 32
4377 11:33:15.483798 rx_firspass[1][0][10] = 5
4378 11:33:15.487123 rx_lastpass[1][0][10] = 35
4379 11:33:15.490565 rx_firspass[1][0][11] = 5
4380 11:33:15.493810 rx_lastpass[1][0][11] = 38
4381 11:33:15.493894 rx_firspass[1][0][12] = 6
4382 11:33:15.497226 rx_lastpass[1][0][12] = 38
4383 11:33:15.500371 rx_firspass[1][0][13] = 5
4384 11:33:15.503847 rx_lastpass[1][0][13] = 37
4385 11:33:15.503930 rx_firspass[1][0][14] = 7
4386 11:33:15.507179 rx_lastpass[1][0][14] = 38
4387 11:33:15.510417 rx_firspass[1][0][15] = -3
4388 11:33:15.510501 rx_lastpass[1][0][15] = 30
4389 11:33:15.513669 rx_firspass[1][1][0] = 3
4390 11:33:15.517514 rx_lastpass[1][1][0] = 41
4391 11:33:15.520168 rx_firspass[1][1][1] = 5
4392 11:33:15.520251 rx_lastpass[1][1][1] = 39
4393 11:33:15.524074 rx_firspass[1][1][2] = 0
4394 11:33:15.527238 rx_lastpass[1][1][2] = 36
4395 11:33:15.527349 rx_firspass[1][1][3] = -2
4396 11:33:15.530470 rx_lastpass[1][1][3] = 34
4397 11:33:15.533570 rx_firspass[1][1][4] = 4
4398 11:33:15.536908 rx_lastpass[1][1][4] = 39
4399 11:33:15.536992 rx_firspass[1][1][5] = 5
4400 11:33:15.540587 rx_lastpass[1][1][5] = 40
4401 11:33:15.543626 rx_firspass[1][1][6] = 5
4402 11:33:15.543708 rx_lastpass[1][1][6] = 41
4403 11:33:15.547107 rx_firspass[1][1][7] = 3
4404 11:33:15.550353 rx_lastpass[1][1][7] = 38
4405 11:33:15.550437 rx_firspass[1][1][8] = 0
4406 11:33:15.553598 rx_lastpass[1][1][8] = 35
4407 11:33:15.556984 rx_firspass[1][1][9] = -2
4408 11:33:15.560356 rx_lastpass[1][1][9] = 34
4409 11:33:15.560471 rx_firspass[1][1][10] = 3
4410 11:33:15.563472 rx_lastpass[1][1][10] = 39
4411 11:33:15.566683 rx_firspass[1][1][11] = 4
4412 11:33:15.566766 rx_lastpass[1][1][11] = 40
4413 11:33:15.570152 rx_firspass[1][1][12] = 4
4414 11:33:15.573744 rx_lastpass[1][1][12] = 40
4415 11:33:15.577043 rx_firspass[1][1][13] = 4
4416 11:33:15.577125 rx_lastpass[1][1][13] = 40
4417 11:33:15.580445 rx_firspass[1][1][14] = 5
4418 11:33:15.583401 rx_lastpass[1][1][14] = 40
4419 11:33:15.586723 rx_firspass[1][1][15] = -3
4420 11:33:15.586806 rx_lastpass[1][1][15] = 31
4421 11:33:15.590055 dump params clk_delay
4422 11:33:15.590138 clk_delay[0] = 1
4423 11:33:15.593366 clk_delay[1] = 0
4424 11:33:15.593450 dump params dqs_delay
4425 11:33:15.597258 dqs_delay[0][0] = -2
4426 11:33:15.600132 dqs_delay[0][1] = 0
4427 11:33:15.600215 dqs_delay[1][0] = 0
4428 11:33:15.603593 dqs_delay[1][1] = 0
4429 11:33:15.606904 dump params delay_cell_unit = 735
4430 11:33:15.606986 dump source = 0x0
4431 11:33:15.610017 dump params frequency:1200
4432 11:33:15.610100 dump params rank number:2
4433 11:33:15.613681
4434 11:33:15.613777 dump params write leveling
4435 11:33:15.617045 write leveling[0][0][0] = 0x0
4436 11:33:15.620024 write leveling[0][0][1] = 0x0
4437 11:33:15.623692 write leveling[0][1][0] = 0x0
4438 11:33:15.623779 write leveling[0][1][1] = 0x0
4439 11:33:15.627123 write leveling[1][0][0] = 0x0
4440 11:33:15.630240 write leveling[1][0][1] = 0x0
4441 11:33:15.633701 write leveling[1][1][0] = 0x0
4442 11:33:15.636835 write leveling[1][1][1] = 0x0
4443 11:33:15.636918 dump params cbt_cs
4444 11:33:15.640258 cbt_cs[0][0] = 0x0
4445 11:33:15.640341 cbt_cs[0][1] = 0x0
4446 11:33:15.643750 cbt_cs[1][0] = 0x0
4447 11:33:15.643837 cbt_cs[1][1] = 0x0
4448 11:33:15.646909 dump params cbt_mr12
4449 11:33:15.646992 cbt_mr12[0][0] = 0x0
4450 11:33:15.650081 cbt_mr12[0][1] = 0x0
4451 11:33:15.653234 cbt_mr12[1][0] = 0x0
4452 11:33:15.653317 cbt_mr12[1][1] = 0x0
4453 11:33:15.656912 dump params tx window
4454 11:33:15.656996 tx_center_min[0][0][0] = 0
4455 11:33:15.660195 tx_center_max[0][0][0] = 0
4456 11:33:15.663057 tx_center_min[0][0][1] = 0
4457 11:33:15.666675 tx_center_max[0][0][1] = 0
4458 11:33:15.666758 tx_center_min[0][1][0] = 0
4459 11:33:15.670018 tx_center_max[0][1][0] = 0
4460 11:33:15.673461 tx_center_min[0][1][1] = 0
4461 11:33:15.676704 tx_center_max[0][1][1] = 0
4462 11:33:15.676787 tx_center_min[1][0][0] = 0
4463 11:33:15.680056 tx_center_max[1][0][0] = 0
4464 11:33:15.683153 tx_center_min[1][0][1] = 0
4465 11:33:15.686491 tx_center_max[1][0][1] = 0
4466 11:33:15.686574 tx_center_min[1][1][0] = 0
4467 11:33:15.689663 tx_center_max[1][1][0] = 0
4468 11:33:15.692989 tx_center_min[1][1][1] = 0
4469 11:33:15.696711 tx_center_max[1][1][1] = 0
4470 11:33:15.696794 dump params tx window
4471 11:33:15.699796 tx_win_center[0][0][0] = 0
4472 11:33:15.702983 tx_first_pass[0][0][0] = 0
4473 11:33:15.703066 tx_last_pass[0][0][0] = 0
4474 11:33:15.706310 tx_win_center[0][0][1] = 0
4475 11:33:15.709641 tx_first_pass[0][0][1] = 0
4476 11:33:15.712882 tx_last_pass[0][0][1] = 0
4477 11:33:15.712966 tx_win_center[0][0][2] = 0
4478 11:33:15.716177 tx_first_pass[0][0][2] = 0
4479 11:33:15.719767 tx_last_pass[0][0][2] = 0
4480 11:33:15.719850 tx_win_center[0][0][3] = 0
4481 11:33:15.723040 tx_first_pass[0][0][3] = 0
4482 11:33:15.726455 tx_last_pass[0][0][3] = 0
4483 11:33:15.729533 tx_win_center[0][0][4] = 0
4484 11:33:15.729618 tx_first_pass[0][0][4] = 0
4485 11:33:15.732802 tx_last_pass[0][0][4] = 0
4486 11:33:15.736205 tx_win_center[0][0][5] = 0
4487 11:33:15.739468 tx_first_pass[0][0][5] = 0
4488 11:33:15.739551 tx_last_pass[0][0][5] = 0
4489 11:33:15.742728 tx_win_center[0][0][6] = 0
4490 11:33:15.746385 tx_first_pass[0][0][6] = 0
4491 11:33:15.746495 tx_last_pass[0][0][6] = 0
4492 11:33:15.749336 tx_win_center[0][0][7] = 0
4493 11:33:15.752392 tx_first_pass[0][0][7] = 0
4494 11:33:15.756218 tx_last_pass[0][0][7] = 0
4495 11:33:15.756333 tx_win_center[0][0][8] = 0
4496 11:33:15.759487 tx_first_pass[0][0][8] = 0
4497 11:33:15.762854 tx_last_pass[0][0][8] = 0
4498 11:33:15.765844 tx_win_center[0][0][9] = 0
4499 11:33:15.765955 tx_first_pass[0][0][9] = 0
4500 11:33:15.769290 tx_last_pass[0][0][9] = 0
4501 11:33:15.772397 tx_win_center[0][0][10] = 0
4502 11:33:15.776212 tx_first_pass[0][0][10] = 0
4503 11:33:15.776328 tx_last_pass[0][0][10] = 0
4504 11:33:15.779268 tx_win_center[0][0][11] = 0
4505 11:33:15.782619 tx_first_pass[0][0][11] = 0
4506 11:33:15.785892 tx_last_pass[0][0][11] = 0
4507 11:33:15.786012 tx_win_center[0][0][12] = 0
4508 11:33:15.789173 tx_first_pass[0][0][12] = 0
4509 11:33:15.792436 tx_last_pass[0][0][12] = 0
4510 11:33:15.796318 tx_win_center[0][0][13] = 0
4511 11:33:15.796476 tx_first_pass[0][0][13] = 0
4512 11:33:15.799496 tx_last_pass[0][0][13] = 0
4513 11:33:15.802475 tx_win_center[0][0][14] = 0
4514 11:33:15.806278 tx_first_pass[0][0][14] = 0
4515 11:33:15.806386 tx_last_pass[0][0][14] = 0
4516 11:33:15.809759 tx_win_center[0][0][15] = 0
4517 11:33:15.812803 tx_first_pass[0][0][15] = 0
4518 11:33:15.815803 tx_last_pass[0][0][15] = 0
4519 11:33:15.815888 tx_win_center[0][1][0] = 0
4520 11:33:15.819031 tx_first_pass[0][1][0] = 0
4521 11:33:15.822791 tx_last_pass[0][1][0] = 0
4522 11:33:15.822876 tx_win_center[0][1][1] = 0
4523 11:33:15.825853 tx_first_pass[0][1][1] = 0
4524 11:33:15.829103 tx_last_pass[0][1][1] = 0
4525 11:33:15.832298 tx_win_center[0][1][2] = 0
4526 11:33:15.832382 tx_first_pass[0][1][2] = 0
4527 11:33:15.836071 tx_last_pass[0][1][2] = 0
4528 11:33:15.839262 tx_win_center[0][1][3] = 0
4529 11:33:15.842947 tx_first_pass[0][1][3] = 0
4530 11:33:15.843030 tx_last_pass[0][1][3] = 0
4531 11:33:15.845729 tx_win_center[0][1][4] = 0
4532 11:33:15.849547 tx_first_pass[0][1][4] = 0
4533 11:33:15.849630 tx_last_pass[0][1][4] = 0
4534 11:33:15.853028 tx_win_center[0][1][5] = 0
4535 11:33:15.856159 tx_first_pass[0][1][5] = 0
4536 11:33:15.859506 tx_last_pass[0][1][5] = 0
4537 11:33:15.859591 tx_win_center[0][1][6] = 0
4538 11:33:15.862664 tx_first_pass[0][1][6] = 0
4539 11:33:15.865877 tx_last_pass[0][1][6] = 0
4540 11:33:15.865961 tx_win_center[0][1][7] = 0
4541 11:33:15.868971 tx_first_pass[0][1][7] = 0
4542 11:33:15.872665 tx_last_pass[0][1][7] = 0
4543 11:33:15.875632 tx_win_center[0][1][8] = 0
4544 11:33:15.875716 tx_first_pass[0][1][8] = 0
4545 11:33:15.879002 tx_last_pass[0][1][8] = 0
4546 11:33:15.882494 tx_win_center[0][1][9] = 0
4547 11:33:15.885794 tx_first_pass[0][1][9] = 0
4548 11:33:15.885878 tx_last_pass[0][1][9] = 0
4549 11:33:15.888877 tx_win_center[0][1][10] = 0
4550 11:33:15.892651 tx_first_pass[0][1][10] = 0
4551 11:33:15.895761 tx_last_pass[0][1][10] = 0
4552 11:33:15.895846 tx_win_center[0][1][11] = 0
4553 11:33:15.899231 tx_first_pass[0][1][11] = 0
4554 11:33:15.902343 tx_last_pass[0][1][11] = 0
4555 11:33:15.905655 tx_win_center[0][1][12] = 0
4556 11:33:15.905739 tx_first_pass[0][1][12] = 0
4557 11:33:15.909139 tx_last_pass[0][1][12] = 0
4558 11:33:15.912281 tx_win_center[0][1][13] = 0
4559 11:33:15.915681 tx_first_pass[0][1][13] = 0
4560 11:33:15.915765 tx_last_pass[0][1][13] = 0
4561 11:33:15.919257 tx_win_center[0][1][14] = 0
4562 11:33:15.922567 tx_first_pass[0][1][14] = 0
4563 11:33:15.925852 tx_last_pass[0][1][14] = 0
4564 11:33:15.925936 tx_win_center[0][1][15] = 0
4565 11:33:15.929018 tx_first_pass[0][1][15] = 0
4566 11:33:15.932376 tx_last_pass[0][1][15] = 0
4567 11:33:15.935708 tx_win_center[1][0][0] = 0
4568 11:33:15.935791 tx_first_pass[1][0][0] = 0
4569 11:33:15.938907 tx_last_pass[1][0][0] = 0
4570 11:33:15.942124 tx_win_center[1][0][1] = 0
4571 11:33:15.942208 tx_first_pass[1][0][1] = 0
4572 11:33:15.945714 tx_last_pass[1][0][1] = 0
4573 11:33:15.948804 tx_win_center[1][0][2] = 0
4574 11:33:15.952084 tx_first_pass[1][0][2] = 0
4575 11:33:15.952170 tx_last_pass[1][0][2] = 0
4576 11:33:15.955675 tx_win_center[1][0][3] = 0
4577 11:33:15.958831 tx_first_pass[1][0][3] = 0
4578 11:33:15.961976 tx_last_pass[1][0][3] = 0
4579 11:33:15.962060 tx_win_center[1][0][4] = 0
4580 11:33:15.965276 tx_first_pass[1][0][4] = 0
4581 11:33:15.968665 tx_last_pass[1][0][4] = 0
4582 11:33:15.968749 tx_win_center[1][0][5] = 0
4583 11:33:15.971998 tx_first_pass[1][0][5] = 0
4584 11:33:15.975355 tx_last_pass[1][0][5] = 0
4585 11:33:15.978933 tx_win_center[1][0][6] = 0
4586 11:33:15.979017 tx_first_pass[1][0][6] = 0
4587 11:33:15.981990 tx_last_pass[1][0][6] = 0
4588 11:33:15.985525 tx_win_center[1][0][7] = 0
4589 11:33:15.988939 tx_first_pass[1][0][7] = 0
4590 11:33:15.989023 tx_last_pass[1][0][7] = 0
4591 11:33:15.992045 tx_win_center[1][0][8] = 0
4592 11:33:15.995292 tx_first_pass[1][0][8] = 0
4593 11:33:15.995377 tx_last_pass[1][0][8] = 0
4594 11:33:15.998573 tx_win_center[1][0][9] = 0
4595 11:33:16.002278 tx_first_pass[1][0][9] = 0
4596 11:33:16.005545 tx_last_pass[1][0][9] = 0
4597 11:33:16.005628 tx_win_center[1][0][10] = 0
4598 11:33:16.008719 tx_first_pass[1][0][10] = 0
4599 11:33:16.012091 tx_last_pass[1][0][10] = 0
4600 11:33:16.015332 tx_win_center[1][0][11] = 0
4601 11:33:16.015416 tx_first_pass[1][0][11] = 0
4602 11:33:16.018529 tx_last_pass[1][0][11] = 0
4603 11:33:16.021773 tx_win_center[1][0][12] = 0
4604 11:33:16.025743 tx_first_pass[1][0][12] = 0
4605 11:33:16.025827 tx_last_pass[1][0][12] = 0
4606 11:33:16.028935 tx_win_center[1][0][13] = 0
4607 11:33:16.031979 tx_first_pass[1][0][13] = 0
4608 11:33:16.035260 tx_last_pass[1][0][13] = 0
4609 11:33:16.035344 tx_win_center[1][0][14] = 0
4610 11:33:16.038371 tx_first_pass[1][0][14] = 0
4611 11:33:16.041873 tx_last_pass[1][0][14] = 0
4612 11:33:16.045334 tx_win_center[1][0][15] = 0
4613 11:33:16.045424 tx_first_pass[1][0][15] = 0
4614 11:33:16.048757 tx_last_pass[1][0][15] = 0
4615 11:33:16.052093 tx_win_center[1][1][0] = 0
4616 11:33:16.055428 tx_first_pass[1][1][0] = 0
4617 11:33:16.055512 tx_last_pass[1][1][0] = 0
4618 11:33:16.058552 tx_win_center[1][1][1] = 0
4619 11:33:16.061949 tx_first_pass[1][1][1] = 0
4620 11:33:16.062032 tx_last_pass[1][1][1] = 0
4621 11:33:16.065402 tx_win_center[1][1][2] = 0
4622 11:33:16.068805 tx_first_pass[1][1][2] = 0
4623 11:33:16.072017 tx_last_pass[1][1][2] = 0
4624 11:33:16.072101 tx_win_center[1][1][3] = 0
4625 11:33:16.075266 tx_first_pass[1][1][3] = 0
4626 11:33:16.078699 tx_last_pass[1][1][3] = 0
4627 11:33:16.081999 tx_win_center[1][1][4] = 0
4628 11:33:16.082083 tx_first_pass[1][1][4] = 0
4629 11:33:16.085244 tx_last_pass[1][1][4] = 0
4630 11:33:16.088808 tx_win_center[1][1][5] = 0
4631 11:33:16.088892 tx_first_pass[1][1][5] = 0
4632 11:33:16.091961 tx_last_pass[1][1][5] = 0
4633 11:33:16.095195 tx_win_center[1][1][6] = 0
4634 11:33:16.098695 tx_first_pass[1][1][6] = 0
4635 11:33:16.098779 tx_last_pass[1][1][6] = 0
4636 11:33:16.101745 tx_win_center[1][1][7] = 0
4637 11:33:16.105382 tx_first_pass[1][1][7] = 0
4638 11:33:16.108564 tx_last_pass[1][1][7] = 0
4639 11:33:16.108648 tx_win_center[1][1][8] = 0
4640 11:33:16.111807 tx_first_pass[1][1][8] = 0
4641 11:33:16.115092 tx_last_pass[1][1][8] = 0
4642 11:33:16.115176 tx_win_center[1][1][9] = 0
4643 11:33:16.118513 tx_first_pass[1][1][9] = 0
4644 11:33:16.121982 tx_last_pass[1][1][9] = 0
4645 11:33:16.125225 tx_win_center[1][1][10] = 0
4646 11:33:16.125309 tx_first_pass[1][1][10] = 0
4647 11:33:16.128380 tx_last_pass[1][1][10] = 0
4648 11:33:16.131998 tx_win_center[1][1][11] = 0
4649 11:33:16.135271 tx_first_pass[1][1][11] = 0
4650 11:33:16.135355 tx_last_pass[1][1][11] = 0
4651 11:33:16.138407 tx_win_center[1][1][12] = 0
4652 11:33:16.142084 tx_first_pass[1][1][12] = 0
4653 11:33:16.145194 tx_last_pass[1][1][12] = 0
4654 11:33:16.145277 tx_win_center[1][1][13] = 0
4655 11:33:16.148781 tx_first_pass[1][1][13] = 0
4656 11:33:16.152137 tx_last_pass[1][1][13] = 0
4657 11:33:16.155341 tx_win_center[1][1][14] = 0
4658 11:33:16.155425 tx_first_pass[1][1][14] = 0
4659 11:33:16.158716 tx_last_pass[1][1][14] = 0
4660 11:33:16.162022 tx_win_center[1][1][15] = 0
4661 11:33:16.165322 tx_first_pass[1][1][15] = 0
4662 11:33:16.165406 tx_last_pass[1][1][15] = 0
4663 11:33:16.168306 dump params rx window
4664 11:33:16.171715 rx_firspass[0][0][0] = 0
4665 11:33:16.171799 rx_lastpass[0][0][0] = 0
4666 11:33:16.175130 rx_firspass[0][0][1] = 0
4667 11:33:16.178466 rx_lastpass[0][0][1] = 0
4668 11:33:16.178550 rx_firspass[0][0][2] = 0
4669 11:33:16.182004 rx_lastpass[0][0][2] = 0
4670 11:33:16.185196 rx_firspass[0][0][3] = 0
4671 11:33:16.185280 rx_lastpass[0][0][3] = 0
4672 11:33:16.188325 rx_firspass[0][0][4] = 0
4673 11:33:16.191561 rx_lastpass[0][0][4] = 0
4674 11:33:16.195251 rx_firspass[0][0][5] = 0
4675 11:33:16.195335 rx_lastpass[0][0][5] = 0
4676 11:33:16.198506 rx_firspass[0][0][6] = 0
4677 11:33:16.201881 rx_lastpass[0][0][6] = 0
4678 11:33:16.201964 rx_firspass[0][0][7] = 0
4679 11:33:16.205636 rx_lastpass[0][0][7] = 0
4680 11:33:16.208461 rx_firspass[0][0][8] = 0
4681 11:33:16.208545 rx_lastpass[0][0][8] = 0
4682 11:33:16.211882 rx_firspass[0][0][9] = 0
4683 11:33:16.214879 rx_lastpass[0][0][9] = 0
4684 11:33:16.214962 rx_firspass[0][0][10] = 0
4685 11:33:16.218608 rx_lastpass[0][0][10] = 0
4686 11:33:16.221768 rx_firspass[0][0][11] = 0
4687 11:33:16.224832 rx_lastpass[0][0][11] = 0
4688 11:33:16.224915 rx_firspass[0][0][12] = 0
4689 11:33:16.228482 rx_lastpass[0][0][12] = 0
4690 11:33:16.231423 rx_firspass[0][0][13] = 0
4691 11:33:16.231506 rx_lastpass[0][0][13] = 0
4692 11:33:16.235205 rx_firspass[0][0][14] = 0
4693 11:33:16.238225 rx_lastpass[0][0][14] = 0
4694 11:33:16.238309 rx_firspass[0][0][15] = 0
4695 11:33:16.242186 rx_lastpass[0][0][15] = 0
4696 11:33:16.244956 rx_firspass[0][1][0] = 0
4697 11:33:16.248156 rx_lastpass[0][1][0] = 0
4698 11:33:16.248239 rx_firspass[0][1][1] = 0
4699 11:33:16.251703 rx_lastpass[0][1][1] = 0
4700 11:33:16.255259 rx_firspass[0][1][2] = 0
4701 11:33:16.255342 rx_lastpass[0][1][2] = 0
4702 11:33:16.258595 rx_firspass[0][1][3] = 0
4703 11:33:16.261961 rx_lastpass[0][1][3] = 0
4704 11:33:16.262044 rx_firspass[0][1][4] = 0
4705 11:33:16.265197 rx_lastpass[0][1][4] = 0
4706 11:33:16.268348 rx_firspass[0][1][5] = 0
4707 11:33:16.268431 rx_lastpass[0][1][5] = 0
4708 11:33:16.271538 rx_firspass[0][1][6] = 0
4709 11:33:16.275221 rx_lastpass[0][1][6] = 0
4710 11:33:16.275306 rx_firspass[0][1][7] = 0
4711 11:33:16.278526 rx_lastpass[0][1][7] = 0
4712 11:33:16.281723 rx_firspass[0][1][8] = 0
4713 11:33:16.285104 rx_lastpass[0][1][8] = 0
4714 11:33:16.285187 rx_firspass[0][1][9] = 0
4715 11:33:16.288691 rx_lastpass[0][1][9] = 0
4716 11:33:16.292327 rx_firspass[0][1][10] = 0
4717 11:33:16.292410 rx_lastpass[0][1][10] = 0
4718 11:33:16.295288 rx_firspass[0][1][11] = 0
4719 11:33:16.298349 rx_lastpass[0][1][11] = 0
4720 11:33:16.298433 rx_firspass[0][1][12] = 0
4721 11:33:16.301596 rx_lastpass[0][1][12] = 0
4722 11:33:16.305042 rx_firspass[0][1][13] = 0
4723 11:33:16.308564 rx_lastpass[0][1][13] = 0
4724 11:33:16.308647 rx_firspass[0][1][14] = 0
4725 11:33:16.311847 rx_lastpass[0][1][14] = 0
4726 11:33:16.314809 rx_firspass[0][1][15] = 0
4727 11:33:16.314893 rx_lastpass[0][1][15] = 0
4728 11:33:16.318503 rx_firspass[1][0][0] = 0
4729 11:33:16.321909 rx_lastpass[1][0][0] = 0
4730 11:33:16.321994 rx_firspass[1][0][1] = 0
4731 11:33:16.325106 rx_lastpass[1][0][1] = 0
4732 11:33:16.328473 rx_firspass[1][0][2] = 0
4733 11:33:16.331598 rx_lastpass[1][0][2] = 0
4734 11:33:16.331682 rx_firspass[1][0][3] = 0
4735 11:33:16.334958 rx_lastpass[1][0][3] = 0
4736 11:33:16.338758 rx_firspass[1][0][4] = 0
4737 11:33:16.338842 rx_lastpass[1][0][4] = 0
4738 11:33:16.342120 rx_firspass[1][0][5] = 0
4739 11:33:16.345191 rx_lastpass[1][0][5] = 0
4740 11:33:16.345275 rx_firspass[1][0][6] = 0
4741 11:33:16.348113 rx_lastpass[1][0][6] = 0
4742 11:33:16.351639 rx_firspass[1][0][7] = 0
4743 11:33:16.351723 rx_lastpass[1][0][7] = 0
4744 11:33:16.355354 rx_firspass[1][0][8] = 0
4745 11:33:16.358485 rx_lastpass[1][0][8] = 0
4746 11:33:16.358569 rx_firspass[1][0][9] = 0
4747 11:33:16.361475 rx_lastpass[1][0][9] = 0
4748 11:33:16.364672 rx_firspass[1][0][10] = 0
4749 11:33:16.368530 rx_lastpass[1][0][10] = 0
4750 11:33:16.368616 rx_firspass[1][0][11] = 0
4751 11:33:16.371735 rx_lastpass[1][0][11] = 0
4752 11:33:16.374867 rx_firspass[1][0][12] = 0
4753 11:33:16.374982 rx_lastpass[1][0][12] = 0
4754 11:33:16.378157 rx_firspass[1][0][13] = 0
4755 11:33:16.381464 rx_lastpass[1][0][13] = 0
4756 11:33:16.385262 rx_firspass[1][0][14] = 0
4757 11:33:16.385345 rx_lastpass[1][0][14] = 0
4758 11:33:16.388566 rx_firspass[1][0][15] = 0
4759 11:33:16.391985 rx_lastpass[1][0][15] = 0
4760 11:33:16.392068 rx_firspass[1][1][0] = 0
4761 11:33:16.394911 rx_lastpass[1][1][0] = 0
4762 11:33:16.398192 rx_firspass[1][1][1] = 0
4763 11:33:16.398276 rx_lastpass[1][1][1] = 0
4764 11:33:16.401849 rx_firspass[1][1][2] = 0
4765 11:33:16.405191 rx_lastpass[1][1][2] = 0
4766 11:33:16.405275 rx_firspass[1][1][3] = 0
4767 11:33:16.408037 rx_lastpass[1][1][3] = 0
4768 11:33:16.411728 rx_firspass[1][1][4] = 0
4769 11:33:16.415249 rx_lastpass[1][1][4] = 0
4770 11:33:16.415336 rx_firspass[1][1][5] = 0
4771 11:33:16.418137 rx_lastpass[1][1][5] = 0
4772 11:33:16.421457 rx_firspass[1][1][6] = 0
4773 11:33:16.421541 rx_lastpass[1][1][6] = 0
4774 11:33:16.425069 rx_firspass[1][1][7] = 0
4775 11:33:16.428273 rx_lastpass[1][1][7] = 0
4776 11:33:16.428356 rx_firspass[1][1][8] = 0
4777 11:33:16.431297 rx_lastpass[1][1][8] = 0
4778 11:33:16.434594 rx_firspass[1][1][9] = 0
4779 11:33:16.434704 rx_lastpass[1][1][9] = 0
4780 11:33:16.438038 rx_firspass[1][1][10] = 0
4781 11:33:16.441707 rx_lastpass[1][1][10] = 0
4782 11:33:16.445331 rx_firspass[1][1][11] = 0
4783 11:33:16.445414 rx_lastpass[1][1][11] = 0
4784 11:33:16.448276 rx_firspass[1][1][12] = 0
4785 11:33:16.451411 rx_lastpass[1][1][12] = 0
4786 11:33:16.451495 rx_firspass[1][1][13] = 0
4787 11:33:16.454483 rx_lastpass[1][1][13] = 0
4788 11:33:16.458149 rx_firspass[1][1][14] = 0
4789 11:33:16.461366 rx_lastpass[1][1][14] = 0
4790 11:33:16.461450 rx_firspass[1][1][15] = 0
4791 11:33:16.464469 rx_lastpass[1][1][15] = 0
4792 11:33:16.467857 dump params clk_delay
4793 11:33:16.467939 clk_delay[0] = 0
4794 11:33:16.471422 clk_delay[1] = 0
4795 11:33:16.471505 dump params dqs_delay
4796 11:33:16.474679 dqs_delay[0][0] = 0
4797 11:33:16.474763 dqs_delay[0][1] = 0
4798 11:33:16.477871 dqs_delay[1][0] = 0
4799 11:33:16.477954 dqs_delay[1][1] = 0
4800 11:33:16.481090 dump params delay_cell_unit = 735
4801 11:33:16.484247 dump source = 0x0
4802 11:33:16.484330 dump params frequency:800
4803 11:33:16.488067 dump params rank number:2
4804 11:33:16.488150
4805 11:33:16.491319 dump params write leveling
4806 11:33:16.494462 write leveling[0][0][0] = 0x0
4807 11:33:16.497633 write leveling[0][0][1] = 0x0
4808 11:33:16.497716 write leveling[0][1][0] = 0x0
4809 11:33:16.501352 write leveling[0][1][1] = 0x0
4810 11:33:16.504892 write leveling[1][0][0] = 0x0
4811 11:33:16.507695 write leveling[1][0][1] = 0x0
4812 11:33:16.510993 write leveling[1][1][0] = 0x0
4813 11:33:16.511107 write leveling[1][1][1] = 0x0
4814 11:33:16.514315 dump params cbt_cs
4815 11:33:16.514399 cbt_cs[0][0] = 0x0
4816 11:33:16.517830 cbt_cs[0][1] = 0x0
4817 11:33:16.517912 cbt_cs[1][0] = 0x0
4818 11:33:16.521144 cbt_cs[1][1] = 0x0
4819 11:33:16.524025 dump params cbt_mr12
4820 11:33:16.524109 cbt_mr12[0][0] = 0x0
4821 11:33:16.527441 cbt_mr12[0][1] = 0x0
4822 11:33:16.527525 cbt_mr12[1][0] = 0x0
4823 11:33:16.530595 cbt_mr12[1][1] = 0x0
4824 11:33:16.533840 dump params tx window
4825 11:33:16.533924 tx_center_min[0][0][0] = 0
4826 11:33:16.537306 tx_center_max[0][0][0] = 0
4827 11:33:16.540502 tx_center_min[0][0][1] = 0
4828 11:33:16.540587 tx_center_max[0][0][1] = 0
4829 11:33:16.544018 tx_center_min[0][1][0] = 0
4830 11:33:16.547399 tx_center_max[0][1][0] = 0
4831 11:33:16.550869 tx_center_min[0][1][1] = 0
4832 11:33:16.550983 tx_center_max[0][1][1] = 0
4833 11:33:16.553691 tx_center_min[1][0][0] = 0
4834 11:33:16.557288 tx_center_max[1][0][0] = 0
4835 11:33:16.560812 tx_center_min[1][0][1] = 0
4836 11:33:16.560895 tx_center_max[1][0][1] = 0
4837 11:33:16.564144 tx_center_min[1][1][0] = 0
4838 11:33:16.567254 tx_center_max[1][1][0] = 0
4839 11:33:16.570983 tx_center_min[1][1][1] = 0
4840 11:33:16.571097 tx_center_max[1][1][1] = 0
4841 11:33:16.573813 dump params tx window
4842 11:33:16.577317 tx_win_center[0][0][0] = 0
4843 11:33:16.577401 tx_first_pass[0][0][0] = 0
4844 11:33:16.580860 tx_last_pass[0][0][0] = 0
4845 11:33:16.584155 tx_win_center[0][0][1] = 0
4846 11:33:16.587372 tx_first_pass[0][0][1] = 0
4847 11:33:16.587455 tx_last_pass[0][0][1] = 0
4848 11:33:16.590603 tx_win_center[0][0][2] = 0
4849 11:33:16.593662 tx_first_pass[0][0][2] = 0
4850 11:33:16.593745 tx_last_pass[0][0][2] = 0
4851 11:33:16.597028 tx_win_center[0][0][3] = 0
4852 11:33:16.600202 tx_first_pass[0][0][3] = 0
4853 11:33:16.604111 tx_last_pass[0][0][3] = 0
4854 11:33:16.604194 tx_win_center[0][0][4] = 0
4855 11:33:16.607331 tx_first_pass[0][0][4] = 0
4856 11:33:16.610627 tx_last_pass[0][0][4] = 0
4857 11:33:16.613684 tx_win_center[0][0][5] = 0
4858 11:33:16.613767 tx_first_pass[0][0][5] = 0
4859 11:33:16.616955 tx_last_pass[0][0][5] = 0
4860 11:33:16.620727 tx_win_center[0][0][6] = 0
4861 11:33:16.620813 tx_first_pass[0][0][6] = 0
4862 11:33:16.623918 tx_last_pass[0][0][6] = 0
4863 11:33:16.626910 tx_win_center[0][0][7] = 0
4864 11:33:16.630305 tx_first_pass[0][0][7] = 0
4865 11:33:16.630389 tx_last_pass[0][0][7] = 0
4866 11:33:16.633992 tx_win_center[0][0][8] = 0
4867 11:33:16.637179 tx_first_pass[0][0][8] = 0
4868 11:33:16.640466 tx_last_pass[0][0][8] = 0
4869 11:33:16.640551 tx_win_center[0][0][9] = 0
4870 11:33:16.643597 tx_first_pass[0][0][9] = 0
4871 11:33:16.647151 tx_last_pass[0][0][9] = 0
4872 11:33:16.647236 tx_win_center[0][0][10] = 0
4873 11:33:16.650481 tx_first_pass[0][0][10] = 0
4874 11:33:16.653648 tx_last_pass[0][0][10] = 0
4875 11:33:16.656836 tx_win_center[0][0][11] = 0
4876 11:33:16.660158 tx_first_pass[0][0][11] = 0
4877 11:33:16.660242 tx_last_pass[0][0][11] = 0
4878 11:33:16.663733 tx_win_center[0][0][12] = 0
4879 11:33:16.667074 tx_first_pass[0][0][12] = 0
4880 11:33:16.667159 tx_last_pass[0][0][12] = 0
4881 11:33:16.670294 tx_win_center[0][0][13] = 0
4882 11:33:16.673458 tx_first_pass[0][0][13] = 0
4883 11:33:16.676714 tx_last_pass[0][0][13] = 0
4884 11:33:16.676799 tx_win_center[0][0][14] = 0
4885 11:33:16.680299 tx_first_pass[0][0][14] = 0
4886 11:33:16.683832 tx_last_pass[0][0][14] = 0
4887 11:33:16.687025 tx_win_center[0][0][15] = 0
4888 11:33:16.690140 tx_first_pass[0][0][15] = 0
4889 11:33:16.690225 tx_last_pass[0][0][15] = 0
4890 11:33:16.693500 tx_win_center[0][1][0] = 0
4891 11:33:16.696747 tx_first_pass[0][1][0] = 0
4892 11:33:16.696833 tx_last_pass[0][1][0] = 0
4893 11:33:16.700030 tx_win_center[0][1][1] = 0
4894 11:33:16.703815 tx_first_pass[0][1][1] = 0
4895 11:33:16.707183 tx_last_pass[0][1][1] = 0
4896 11:33:16.707268 tx_win_center[0][1][2] = 0
4897 11:33:16.710420 tx_first_pass[0][1][2] = 0
4898 11:33:16.713193 tx_last_pass[0][1][2] = 0
4899 11:33:16.717280 tx_win_center[0][1][3] = 0
4900 11:33:16.717364 tx_first_pass[0][1][3] = 0
4901 11:33:16.720251 tx_last_pass[0][1][3] = 0
4902 11:33:16.723387 tx_win_center[0][1][4] = 0
4903 11:33:16.723472 tx_first_pass[0][1][4] = 0
4904 11:33:16.726721 tx_last_pass[0][1][4] = 0
4905 11:33:16.729989 tx_win_center[0][1][5] = 0
4906 11:33:16.733159 tx_first_pass[0][1][5] = 0
4907 11:33:16.733243 tx_last_pass[0][1][5] = 0
4908 11:33:16.736825 tx_win_center[0][1][6] = 0
4909 11:33:16.740059 tx_first_pass[0][1][6] = 0
4910 11:33:16.740143 tx_last_pass[0][1][6] = 0
4911 11:33:16.743411 tx_win_center[0][1][7] = 0
4912 11:33:16.746694 tx_first_pass[0][1][7] = 0
4913 11:33:16.749919 tx_last_pass[0][1][7] = 0
4914 11:33:16.750004 tx_win_center[0][1][8] = 0
4915 11:33:16.753620 tx_first_pass[0][1][8] = 0
4916 11:33:16.756349 tx_last_pass[0][1][8] = 0
4917 11:33:16.759818 tx_win_center[0][1][9] = 0
4918 11:33:16.759902 tx_first_pass[0][1][9] = 0
4919 11:33:16.763085 tx_last_pass[0][1][9] = 0
4920 11:33:16.766459 tx_win_center[0][1][10] = 0
4921 11:33:16.769629 tx_first_pass[0][1][10] = 0
4922 11:33:16.769718 tx_last_pass[0][1][10] = 0
4923 11:33:16.773400 tx_win_center[0][1][11] = 0
4924 11:33:16.776718 tx_first_pass[0][1][11] = 0
4925 11:33:16.780045 tx_last_pass[0][1][11] = 0
4926 11:33:16.780138 tx_win_center[0][1][12] = 0
4927 11:33:16.783245 tx_first_pass[0][1][12] = 0
4928 11:33:16.786523 tx_last_pass[0][1][12] = 0
4929 11:33:16.789830 tx_win_center[0][1][13] = 0
4930 11:33:16.789956 tx_first_pass[0][1][13] = 0
4931 11:33:16.793025 tx_last_pass[0][1][13] = 0
4932 11:33:16.796248 tx_win_center[0][1][14] = 0
4933 11:33:16.799612 tx_first_pass[0][1][14] = 0
4934 11:33:16.799709 tx_last_pass[0][1][14] = 0
4935 11:33:16.802904 tx_win_center[0][1][15] = 0
4936 11:33:16.806136 tx_first_pass[0][1][15] = 0
4937 11:33:16.809507 tx_last_pass[0][1][15] = 0
4938 11:33:16.809593 tx_win_center[1][0][0] = 0
4939 11:33:16.812796 tx_first_pass[1][0][0] = 0
4940 11:33:16.816470 tx_last_pass[1][0][0] = 0
4941 11:33:16.819624 tx_win_center[1][0][1] = 0
4942 11:33:16.819699 tx_first_pass[1][0][1] = 0
4943 11:33:16.822926 tx_last_pass[1][0][1] = 0
4944 11:33:16.826496 tx_win_center[1][0][2] = 0
4945 11:33:16.826576 tx_first_pass[1][0][2] = 0
4946 11:33:16.829635 tx_last_pass[1][0][2] = 0
4947 11:33:16.833284 tx_win_center[1][0][3] = 0
4948 11:33:16.836422 tx_first_pass[1][0][3] = 0
4949 11:33:16.836519 tx_last_pass[1][0][3] = 0
4950 11:33:16.839994 tx_win_center[1][0][4] = 0
4951 11:33:16.842895 tx_first_pass[1][0][4] = 0
4952 11:33:16.842968 tx_last_pass[1][0][4] = 0
4953 11:33:16.846402 tx_win_center[1][0][5] = 0
4954 11:33:16.849406 tx_first_pass[1][0][5] = 0
4955 11:33:16.852981 tx_last_pass[1][0][5] = 0
4956 11:33:16.853061 tx_win_center[1][0][6] = 0
4957 11:33:16.855979 tx_first_pass[1][0][6] = 0
4958 11:33:16.859771 tx_last_pass[1][0][6] = 0
4959 11:33:16.862722 tx_win_center[1][0][7] = 0
4960 11:33:16.862799 tx_first_pass[1][0][7] = 0
4961 11:33:16.866692 tx_last_pass[1][0][7] = 0
4962 11:33:16.869588 tx_win_center[1][0][8] = 0
4963 11:33:16.869662 tx_first_pass[1][0][8] = 0
4964 11:33:16.872955 tx_last_pass[1][0][8] = 0
4965 11:33:16.876361 tx_win_center[1][0][9] = 0
4966 11:33:16.879342 tx_first_pass[1][0][9] = 0
4967 11:33:16.879417 tx_last_pass[1][0][9] = 0
4968 11:33:16.883150 tx_win_center[1][0][10] = 0
4969 11:33:16.886509 tx_first_pass[1][0][10] = 0
4970 11:33:16.889691 tx_last_pass[1][0][10] = 0
4971 11:33:16.889767 tx_win_center[1][0][11] = 0
4972 11:33:16.892927 tx_first_pass[1][0][11] = 0
4973 11:33:16.896197 tx_last_pass[1][0][11] = 0
4974 11:33:16.899372 tx_win_center[1][0][12] = 0
4975 11:33:16.899454 tx_first_pass[1][0][12] = 0
4976 11:33:16.903153 tx_last_pass[1][0][12] = 0
4977 11:33:16.906443 tx_win_center[1][0][13] = 0
4978 11:33:16.909770 tx_first_pass[1][0][13] = 0
4979 11:33:16.909846 tx_last_pass[1][0][13] = 0
4980 11:33:16.912771 tx_win_center[1][0][14] = 0
4981 11:33:16.916451 tx_first_pass[1][0][14] = 0
4982 11:33:16.919521 tx_last_pass[1][0][14] = 0
4983 11:33:16.919596 tx_win_center[1][0][15] = 0
4984 11:33:16.922739 tx_first_pass[1][0][15] = 0
4985 11:33:16.925886 tx_last_pass[1][0][15] = 0
4986 11:33:16.929248 tx_win_center[1][1][0] = 0
4987 11:33:16.929322 tx_first_pass[1][1][0] = 0
4988 11:33:16.932922 tx_last_pass[1][1][0] = 0
4989 11:33:16.936247 tx_win_center[1][1][1] = 0
4990 11:33:16.939510 tx_first_pass[1][1][1] = 0
4991 11:33:16.939584 tx_last_pass[1][1][1] = 0
4992 11:33:16.942692 tx_win_center[1][1][2] = 0
4993 11:33:16.946092 tx_first_pass[1][1][2] = 0
4994 11:33:16.946167 tx_last_pass[1][1][2] = 0
4995 11:33:16.949493 tx_win_center[1][1][3] = 0
4996 11:33:16.952836 tx_first_pass[1][1][3] = 0
4997 11:33:16.956195 tx_last_pass[1][1][3] = 0
4998 11:33:16.956270 tx_win_center[1][1][4] = 0
4999 11:33:16.959509 tx_first_pass[1][1][4] = 0
5000 11:33:16.962421 tx_last_pass[1][1][4] = 0
5001 11:33:16.965695 tx_win_center[1][1][5] = 0
5002 11:33:16.965774 tx_first_pass[1][1][5] = 0
5003 11:33:16.969413 tx_last_pass[1][1][5] = 0
5004 11:33:16.972578 tx_win_center[1][1][6] = 0
5005 11:33:16.972656 tx_first_pass[1][1][6] = 0
5006 11:33:16.976084 tx_last_pass[1][1][6] = 0
5007 11:33:16.979199 tx_win_center[1][1][7] = 0
5008 11:33:16.982450 tx_first_pass[1][1][7] = 0
5009 11:33:16.982526 tx_last_pass[1][1][7] = 0
5010 11:33:16.986204 tx_win_center[1][1][8] = 0
5011 11:33:16.989402 tx_first_pass[1][1][8] = 0
5012 11:33:16.992618 tx_last_pass[1][1][8] = 0
5013 11:33:16.992699 tx_win_center[1][1][9] = 0
5014 11:33:16.995801 tx_first_pass[1][1][9] = 0
5015 11:33:16.999096 tx_last_pass[1][1][9] = 0
5016 11:33:16.999169 tx_win_center[1][1][10] = 0
5017 11:33:17.002301 tx_first_pass[1][1][10] = 0
5018 11:33:17.005828 tx_last_pass[1][1][10] = 0
5019 11:33:17.009279 tx_win_center[1][1][11] = 0
5020 11:33:17.009357 tx_first_pass[1][1][11] = 0
5021 11:33:17.012705 tx_last_pass[1][1][11] = 0
5022 11:33:17.015929 tx_win_center[1][1][12] = 0
5023 11:33:17.019821 tx_first_pass[1][1][12] = 0
5024 11:33:17.019898 tx_last_pass[1][1][12] = 0
5025 11:33:17.022457 tx_win_center[1][1][13] = 0
5026 11:33:17.026147 tx_first_pass[1][1][13] = 0
5027 11:33:17.029123 tx_last_pass[1][1][13] = 0
5028 11:33:17.029201 tx_win_center[1][1][14] = 0
5029 11:33:17.032337 tx_first_pass[1][1][14] = 0
5030 11:33:17.035519 tx_last_pass[1][1][14] = 0
5031 11:33:17.039520 tx_win_center[1][1][15] = 0
5032 11:33:17.039592 tx_first_pass[1][1][15] = 0
5033 11:33:17.042607 tx_last_pass[1][1][15] = 0
5034 11:33:17.045930 dump params rx window
5035 11:33:17.046011 rx_firspass[0][0][0] = 0
5036 11:33:17.049102 rx_lastpass[0][0][0] = 0
5037 11:33:17.052204 rx_firspass[0][0][1] = 0
5038 11:33:17.056100 rx_lastpass[0][0][1] = 0
5039 11:33:17.056184 rx_firspass[0][0][2] = 0
5040 11:33:17.059450 rx_lastpass[0][0][2] = 0
5041 11:33:17.062583 rx_firspass[0][0][3] = 0
5042 11:33:17.062666 rx_lastpass[0][0][3] = 0
5043 11:33:17.065853 rx_firspass[0][0][4] = 0
5044 11:33:17.069258 rx_lastpass[0][0][4] = 0
5045 11:33:17.069358 rx_firspass[0][0][5] = 0
5046 11:33:17.072343 rx_lastpass[0][0][5] = 0
5047 11:33:17.075774 rx_firspass[0][0][6] = 0
5048 11:33:17.075856 rx_lastpass[0][0][6] = 0
5049 11:33:17.079167 rx_firspass[0][0][7] = 0
5050 11:33:17.082526 rx_lastpass[0][0][7] = 0
5051 11:33:17.082599 rx_firspass[0][0][8] = 0
5052 11:33:17.085703 rx_lastpass[0][0][8] = 0
5053 11:33:17.089144 rx_firspass[0][0][9] = 0
5054 11:33:17.089223 rx_lastpass[0][0][9] = 0
5055 11:33:17.092385 rx_firspass[0][0][10] = 0
5056 11:33:17.095865 rx_lastpass[0][0][10] = 0
5057 11:33:17.099108 rx_firspass[0][0][11] = 0
5058 11:33:17.099180 rx_lastpass[0][0][11] = 0
5059 11:33:17.102391 rx_firspass[0][0][12] = 0
5060 11:33:17.105720 rx_lastpass[0][0][12] = 0
5061 11:33:17.105789 rx_firspass[0][0][13] = 0
5062 11:33:17.108914 rx_lastpass[0][0][13] = 0
5063 11:33:17.112496 rx_firspass[0][0][14] = 0
5064 11:33:17.115769 rx_lastpass[0][0][14] = 0
5065 11:33:17.115851 rx_firspass[0][0][15] = 0
5066 11:33:17.119021 rx_lastpass[0][0][15] = 0
5067 11:33:17.122188 rx_firspass[0][1][0] = 0
5068 11:33:17.122257 rx_lastpass[0][1][0] = 0
5069 11:33:17.125699 rx_firspass[0][1][1] = 0
5070 11:33:17.128981 rx_lastpass[0][1][1] = 0
5071 11:33:17.129049 rx_firspass[0][1][2] = 0
5072 11:33:17.132051 rx_lastpass[0][1][2] = 0
5073 11:33:17.135314 rx_firspass[0][1][3] = 0
5074 11:33:17.139185 rx_lastpass[0][1][3] = 0
5075 11:33:17.139257 rx_firspass[0][1][4] = 0
5076 11:33:17.142148 rx_lastpass[0][1][4] = 0
5077 11:33:17.145360 rx_firspass[0][1][5] = 0
5078 11:33:17.145429 rx_lastpass[0][1][5] = 0
5079 11:33:17.148847 rx_firspass[0][1][6] = 0
5080 11:33:17.151986 rx_lastpass[0][1][6] = 0
5081 11:33:17.152053 rx_firspass[0][1][7] = 0
5082 11:33:17.155174 rx_lastpass[0][1][7] = 0
5083 11:33:17.158448 rx_firspass[0][1][8] = 0
5084 11:33:17.158520 rx_lastpass[0][1][8] = 0
5085 11:33:17.161766 rx_firspass[0][1][9] = 0
5086 11:33:17.165396 rx_lastpass[0][1][9] = 0
5087 11:33:17.168764 rx_firspass[0][1][10] = 0
5088 11:33:17.168845 rx_lastpass[0][1][10] = 0
5089 11:33:17.171711 rx_firspass[0][1][11] = 0
5090 11:33:17.175405 rx_lastpass[0][1][11] = 0
5091 11:33:17.175477 rx_firspass[0][1][12] = 0
5092 11:33:17.178579 rx_lastpass[0][1][12] = 0
5093 11:33:17.181750 rx_firspass[0][1][13] = 0
5094 11:33:17.185189 rx_lastpass[0][1][13] = 0
5095 11:33:17.185265 rx_firspass[0][1][14] = 0
5096 11:33:17.188452 rx_lastpass[0][1][14] = 0
5097 11:33:17.191788 rx_firspass[0][1][15] = 0
5098 11:33:17.191870 rx_lastpass[0][1][15] = 0
5099 11:33:17.195154 rx_firspass[1][0][0] = 0
5100 11:33:17.198173 rx_lastpass[1][0][0] = 0
5101 11:33:17.198243 rx_firspass[1][0][1] = 0
5102 11:33:17.201904 rx_lastpass[1][0][1] = 0
5103 11:33:17.204937 rx_firspass[1][0][2] = 0
5104 11:33:17.208214 rx_lastpass[1][0][2] = 0
5105 11:33:17.208284 rx_firspass[1][0][3] = 0
5106 11:33:17.211497 rx_lastpass[1][0][3] = 0
5107 11:33:17.215195 rx_firspass[1][0][4] = 0
5108 11:33:17.215262 rx_lastpass[1][0][4] = 0
5109 11:33:17.218411 rx_firspass[1][0][5] = 0
5110 11:33:17.221593 rx_lastpass[1][0][5] = 0
5111 11:33:17.221663 rx_firspass[1][0][6] = 0
5112 11:33:17.224765 rx_lastpass[1][0][6] = 0
5113 11:33:17.228682 rx_firspass[1][0][7] = 0
5114 11:33:17.228758 rx_lastpass[1][0][7] = 0
5115 11:33:17.231437 rx_firspass[1][0][8] = 0
5116 11:33:17.234892 rx_lastpass[1][0][8] = 0
5117 11:33:17.238158 rx_firspass[1][0][9] = 0
5118 11:33:17.238229 rx_lastpass[1][0][9] = 0
5119 11:33:17.241649 rx_firspass[1][0][10] = 0
5120 11:33:17.244974 rx_lastpass[1][0][10] = 0
5121 11:33:17.245074 rx_firspass[1][0][11] = 0
5122 11:33:17.247932 rx_lastpass[1][0][11] = 0
5123 11:33:17.251374 rx_firspass[1][0][12] = 0
5124 11:33:17.251444 rx_lastpass[1][0][12] = 0
5125 11:33:17.254711 rx_firspass[1][0][13] = 0
5126 11:33:17.258066 rx_lastpass[1][0][13] = 0
5127 11:33:17.261817 rx_firspass[1][0][14] = 0
5128 11:33:17.261890 rx_lastpass[1][0][14] = 0
5129 11:33:17.265123 rx_firspass[1][0][15] = 0
5130 11:33:17.268191 rx_lastpass[1][0][15] = 0
5131 11:33:17.268261 rx_firspass[1][1][0] = 0
5132 11:33:17.271334 rx_lastpass[1][1][0] = 0
5133 11:33:17.274690 rx_firspass[1][1][1] = 0
5134 11:33:17.278249 rx_lastpass[1][1][1] = 0
5135 11:33:17.278327 rx_firspass[1][1][2] = 0
5136 11:33:17.281528 rx_lastpass[1][1][2] = 0
5137 11:33:17.284792 rx_firspass[1][1][3] = 0
5138 11:33:17.284894 rx_lastpass[1][1][3] = 0
5139 11:33:17.287946 rx_firspass[1][1][4] = 0
5140 11:33:17.291636 rx_lastpass[1][1][4] = 0
5141 11:33:17.291735 rx_firspass[1][1][5] = 0
5142 11:33:17.294600 rx_lastpass[1][1][5] = 0
5143 11:33:17.297947 rx_firspass[1][1][6] = 0
5144 11:33:17.298016 rx_lastpass[1][1][6] = 0
5145 11:33:17.301074 rx_firspass[1][1][7] = 0
5146 11:33:17.304940 rx_lastpass[1][1][7] = 0
5147 11:33:17.305009 rx_firspass[1][1][8] = 0
5148 11:33:17.308434 rx_lastpass[1][1][8] = 0
5149 11:33:17.311493 rx_firspass[1][1][9] = 0
5150 11:33:17.311565 rx_lastpass[1][1][9] = 0
5151 11:33:17.314755 rx_firspass[1][1][10] = 0
5152 11:33:17.318084 rx_lastpass[1][1][10] = 0
5153 11:33:17.321365 rx_firspass[1][1][11] = 0
5154 11:33:17.321435 rx_lastpass[1][1][11] = 0
5155 11:33:17.325090 rx_firspass[1][1][12] = 0
5156 11:33:17.328097 rx_lastpass[1][1][12] = 0
5157 11:33:17.328166 rx_firspass[1][1][13] = 0
5158 11:33:17.331169 rx_lastpass[1][1][13] = 0
5159 11:33:17.334665 rx_firspass[1][1][14] = 0
5160 11:33:17.337971 rx_lastpass[1][1][14] = 0
5161 11:33:17.338042 rx_firspass[1][1][15] = 0
5162 11:33:17.341453 rx_lastpass[1][1][15] = 0
5163 11:33:17.344749 dump params clk_delay
5164 11:33:17.344854 clk_delay[0] = 0
5165 11:33:17.347607 clk_delay[1] = 0
5166 11:33:17.347675 dump params dqs_delay
5167 11:33:17.351375 dqs_delay[0][0] = 0
5168 11:33:17.351442 dqs_delay[0][1] = 0
5169 11:33:17.354275 dqs_delay[1][0] = 0
5170 11:33:17.354351 dqs_delay[1][1] = 0
5171 11:33:17.357600 dump params delay_cell_unit = 735
5172 11:33:17.361020 mt_set_emi_preloader end
5173 11:33:17.364340 [mt_mem_init] dram size: 0x100000000, rank number: 2
5174 11:33:17.370988 [complex_mem_test] start addr:0x40000000, len:20480
5175 11:33:17.407031 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5176 11:33:17.413690 [complex_mem_test] start addr:0x80000000, len:20480
5177 11:33:17.449183 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5178 11:33:17.456014 [complex_mem_test] start addr:0xc0000000, len:20480
5179 11:33:17.491599 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5180 11:33:17.498063 [complex_mem_test] start addr:0x56000000, len:8192
5181 11:33:17.514829 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5182 11:33:17.514917 ddr_geometry:1
5183 11:33:17.521529 [complex_mem_test] start addr:0x80000000, len:8192
5184 11:33:17.538331 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5185 11:33:17.542015 dram_init: dram init end (result: 0)
5186 11:33:17.548447 Successfully loaded DRAM blobs and ran DRAM calibration
5187 11:33:17.558743 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5188 11:33:17.558830 CBMEM:
5189 11:33:17.562406 IMD: root @ 00000000fffff000 254 entries.
5190 11:33:17.564988 IMD: root @ 00000000ffffec00 62 entries.
5191 11:33:17.572377 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5192 11:33:17.578738 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5193 11:33:17.582149 in-header: 03 a1 00 00 08 00 00 00
5194 11:33:17.585588 in-data: 84 60 60 10 00 00 00 00
5195 11:33:17.588676 Chrome EC: clear events_b mask to 0x0000000020004000
5196 11:33:17.595613 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5197 11:33:17.599663 in-header: 03 fd 00 00 00 00 00 00
5198 11:33:17.599739 in-data:
5199 11:33:17.606085 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5200 11:33:17.606157 CBFS @ 21000 size 3d4000
5201 11:33:17.612692 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5202 11:33:17.616090 CBFS: Locating 'fallback/ramstage'
5203 11:33:17.619561 CBFS: Found @ offset 10d40 size d563
5204 11:33:17.640314 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5205 11:33:17.652632 Accumulated console time in romstage 13684 ms
5206 11:33:17.652710
5207 11:33:17.652774
5208 11:33:17.662442 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5209 11:33:17.666245 ARM64: Exception handlers installed.
5210 11:33:17.666327 ARM64: Testing exception
5211 11:33:17.669406 ARM64: Done test exception
5212 11:33:17.672678 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5213 11:33:17.676007 Manufacturer: ef
5214 11:33:17.679252 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5215 11:33:17.686017 WARNING: RO_VPD is uninitialized or empty.
5216 11:33:17.689164 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5217 11:33:17.692274 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5218 11:33:17.702393 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5219 11:33:17.705864 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5220 11:33:17.712135 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5221 11:33:17.712219 Enumerating buses...
5222 11:33:17.719039 Show all devs... Before device enumeration.
5223 11:33:17.719127 Root Device: enabled 1
5224 11:33:17.722131 CPU_CLUSTER: 0: enabled 1
5225 11:33:17.722206 CPU: 00: enabled 1
5226 11:33:17.725428 Compare with tree...
5227 11:33:17.729011 Root Device: enabled 1
5228 11:33:17.729100 CPU_CLUSTER: 0: enabled 1
5229 11:33:17.732040 CPU: 00: enabled 1
5230 11:33:17.735418 Root Device scanning...
5231 11:33:17.735495 root_dev_scan_bus for Root Device
5232 11:33:17.738714 CPU_CLUSTER: 0 enabled
5233 11:33:17.742404 root_dev_scan_bus for Root Device done
5234 11:33:17.748980 scan_bus: scanning of bus Root Device took 10690 usecs
5235 11:33:17.749064 done
5236 11:33:17.752268 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5237 11:33:17.755426 Allocating resources...
5238 11:33:17.755505 Reading resources...
5239 11:33:17.758767 Root Device read_resources bus 0 link: 0
5240 11:33:17.765174 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5241 11:33:17.765250 CPU: 00 missing read_resources
5242 11:33:17.771656 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5243 11:33:17.775232 Root Device read_resources bus 0 link: 0 done
5244 11:33:17.778619 Done reading resources.
5245 11:33:17.781864 Show resources in subtree (Root Device)...After reading.
5246 11:33:17.785129 Root Device child on link 0 CPU_CLUSTER: 0
5247 11:33:17.788642 CPU_CLUSTER: 0 child on link 0 CPU: 00
5248 11:33:17.798190 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5249 11:33:17.798275 CPU: 00
5250 11:33:17.801408 Setting resources...
5251 11:33:17.805103 Root Device assign_resources, bus 0 link: 0
5252 11:33:17.808499 CPU_CLUSTER: 0 missing set_resources
5253 11:33:17.811774 Root Device assign_resources, bus 0 link: 0
5254 11:33:17.815469 Done setting resources.
5255 11:33:17.821800 Show resources in subtree (Root Device)...After assigning values.
5256 11:33:17.825058 Root Device child on link 0 CPU_CLUSTER: 0
5257 11:33:17.828586 CPU_CLUSTER: 0 child on link 0 CPU: 00
5258 11:33:17.838528 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5259 11:33:17.838654 CPU: 00
5260 11:33:17.841740 Done allocating resources.
5261 11:33:17.844807 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5262 11:33:17.848693 Enabling resources...
5263 11:33:17.848766 done.
5264 11:33:17.851701 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5265 11:33:17.855044 Initializing devices...
5266 11:33:17.855129 Root Device init ...
5267 11:33:17.858365 mainboard_init: Starting display init.
5268 11:33:17.861502 ADC[4]: Raw value=76102 ID=0
5269 11:33:17.885226 anx7625_power_on_init: Init interface.
5270 11:33:17.888360 anx7625_disable_pd_protocol: Disabled PD feature.
5271 11:33:17.894773 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5272 11:33:17.941775 anx7625_start_dp_work: Secure OCM version=00
5273 11:33:17.945337 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5274 11:33:17.962275 sp_tx_get_edid_block: EDID Block = 1
5275 11:33:18.079590 Extracted contents:
5276 11:33:18.082968 header: 00 ff ff ff ff ff ff 00
5277 11:33:18.086147 serial number: 06 af 5c 14 00 00 00 00 00 1a
5278 11:33:18.089607 version: 01 04
5279 11:33:18.092600 basic params: 95 1a 0e 78 02
5280 11:33:18.096009 chroma info: 99 85 95 55 56 92 28 22 50 54
5281 11:33:18.099626 established: 00 00 00
5282 11:33:18.106192 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5283 11:33:18.109168 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5284 11:33:18.115692 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5285 11:33:18.122932 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5286 11:33:18.129548 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5287 11:33:18.132587 extensions: 00
5288 11:33:18.132659 checksum: ae
5289 11:33:18.132721
5290 11:33:18.135978 Manufacturer: AUO Model 145c Serial Number 0
5291 11:33:18.139103 Made week 0 of 2016
5292 11:33:18.139173 EDID version: 1.4
5293 11:33:18.142551 Digital display
5294 11:33:18.146122 6 bits per primary color channel
5295 11:33:18.146206 DisplayPort interface
5296 11:33:18.148886 Maximum image size: 26 cm x 14 cm
5297 11:33:18.152564 Gamma: 220%
5298 11:33:18.152664 Check DPMS levels
5299 11:33:18.155781 Supported color formats: RGB 4:4:4
5300 11:33:18.159003 First detailed timing is preferred timing
5301 11:33:18.162355 Established timings supported:
5302 11:33:18.165609 Standard timings supported:
5303 11:33:18.165688 Detailed timings
5304 11:33:18.172497 Hex of detail: ce1d56ea50001a3030204600009010000018
5305 11:33:18.175808 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5306 11:33:18.179033 0556 0586 05a6 0640 hborder 0
5307 11:33:18.182496 0300 0304 030a 031a vborder 0
5308 11:33:18.185749 -hsync -vsync
5309 11:33:18.189108 Did detailed timing
5310 11:33:18.192406 Hex of detail: 0000000f0000000000000000000000000020
5311 11:33:18.195194 Manufacturer-specified data, tag 15
5312 11:33:18.202141 Hex of detail: 000000fe0041554f0a202020202020202020
5313 11:33:18.202221 ASCII string: AUO
5314 11:33:18.206010 Hex of detail: 000000fe004231313658414230312e34200a
5315 11:33:18.208599 ASCII string: B116XAB01.4
5316 11:33:18.208667 Checksum
5317 11:33:18.212104 Checksum: 0xae (valid)
5318 11:33:18.218907 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5319 11:33:18.218988 DSI data_rate: 457800000 bps
5320 11:33:18.226533 anx7625_parse_edid: set default k value to 0x3d for panel
5321 11:33:18.229818 anx7625_parse_edid: pixelclock(76300).
5322 11:33:18.233047 hactive(1366), hsync(32), hfp(48), hbp(154)
5323 11:33:18.236376 vactive(768), vsync(6), vfp(4), vbp(16)
5324 11:33:18.239396 anx7625_dsi_config: config dsi.
5325 11:33:18.247740 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5326 11:33:18.268963 anx7625_dsi_config: success to config DSI
5327 11:33:18.272071 anx7625_dp_start: MIPI phy setup OK.
5328 11:33:18.275094 [SSUSB] Setting up USB HOST controller...
5329 11:33:18.278980 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5330 11:33:18.282045 [SSUSB] phy power-on done.
5331 11:33:18.285929 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5332 11:33:18.289217 in-header: 03 fc 01 00 00 00 00 00
5333 11:33:18.289289 in-data:
5334 11:33:18.292405 handle_proto3_response: EC response with error code: 1
5335 11:33:18.295775 SPM: pcm index = 1
5336 11:33:18.299061 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5337 11:33:18.302248 CBFS @ 21000 size 3d4000
5338 11:33:18.309497 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5339 11:33:18.312408 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5340 11:33:18.315884 CBFS: Found @ offset 1e7c0 size 1026
5341 11:33:18.322236 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5342 11:33:18.326026 SPM: binary array size = 2988
5343 11:33:18.329571 SPM: version = pcm_allinone_v1.17.2_20180829
5344 11:33:18.332174 SPM binary loaded in 32 msecs
5345 11:33:18.339701 spm_kick_im_to_fetch: ptr = 000000004021eec2
5346 11:33:18.343085 spm_kick_im_to_fetch: len = 2988
5347 11:33:18.343154 SPM: spm_kick_pcm_to_run
5348 11:33:18.346286 SPM: spm_kick_pcm_to_run done
5349 11:33:18.350162 SPM: spm_init done in 52 msecs
5350 11:33:18.353302 Root Device init finished in 494994 usecs
5351 11:33:18.356238 CPU_CLUSTER: 0 init ...
5352 11:33:18.366251 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5353 11:33:18.369583 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5354 11:33:18.373042 CBFS @ 21000 size 3d4000
5355 11:33:18.376449 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5356 11:33:18.379713 CBFS: Locating 'sspm.bin'
5357 11:33:18.382782 CBFS: Found @ offset 208c0 size 41cb
5358 11:33:18.392907 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5359 11:33:18.400836 CPU_CLUSTER: 0 init finished in 42802 usecs
5360 11:33:18.400915 Devices initialized
5361 11:33:18.404251 Show all devs... After init.
5362 11:33:18.407910 Root Device: enabled 1
5363 11:33:18.407978 CPU_CLUSTER: 0: enabled 1
5364 11:33:18.411167 CPU: 00: enabled 1
5365 11:33:18.414422 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5366 11:33:18.417716 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5367 11:33:18.420740 ELOG: NV offset 0x558000 size 0x1000
5368 11:33:18.428390 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5369 11:33:18.435570 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5370 11:33:18.438687 ELOG: Event(17) added with size 13 at 2024-07-17 11:33:09 UTC
5371 11:33:18.441879 out: cmd=0x121: 03 db 21 01 00 00 00 00
5372 11:33:18.445157 in-header: 03 5c 00 00 2c 00 00 00
5373 11:33:18.458935 in-data: c0 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 9c 46 02 00 06 80 00 00 6e 5d 14 00 06 80 00 00 1a 31 08 00 06 80 00 00 ed 0c 31 00
5374 11:33:18.461910 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5375 11:33:18.465004 in-header: 03 19 00 00 08 00 00 00
5376 11:33:18.468371 in-data: a2 e0 47 00 13 00 00 00
5377 11:33:18.472202 Chrome EC: UHEPI supported
5378 11:33:18.478354 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5379 11:33:18.481616 in-header: 03 e1 00 00 08 00 00 00
5380 11:33:18.485234 in-data: 84 20 60 10 00 00 00 00
5381 11:33:18.488361 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5382 11:33:18.495105 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5383 11:33:18.498602 in-header: 03 e1 00 00 08 00 00 00
5384 11:33:18.501413 in-data: 84 20 60 10 00 00 00 00
5385 11:33:18.508265 ELOG: Event(A1) added with size 10 at 2024-07-17 11:33:09 UTC
5386 11:33:18.515110 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5387 11:33:18.518403 ELOG: Event(A0) added with size 9 at 2024-07-17 11:33:09 UTC
5388 11:33:18.524953 elog_add_boot_reason: Logged dev mode boot
5389 11:33:18.525025 Finalize devices...
5390 11:33:18.528052 Devices finalized
5391 11:33:18.531510 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5392 11:33:18.535170 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5393 11:33:18.541418 ELOG: Event(91) added with size 10 at 2024-07-17 11:33:09 UTC
5394 11:33:18.545282 Writing coreboot table at 0xffeda000
5395 11:33:18.548631 0. 0000000000114000-000000000011efff: RAMSTAGE
5396 11:33:18.555053 1. 0000000040000000-000000004023cfff: RAMSTAGE
5397 11:33:18.558199 2. 000000004023d000-00000000545fffff: RAM
5398 11:33:18.561474 3. 0000000054600000-000000005465ffff: BL31
5399 11:33:18.564895 4. 0000000054660000-00000000ffed9fff: RAM
5400 11:33:18.571526 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5401 11:33:18.575118 6. 0000000100000000-000000013fffffff: RAM
5402 11:33:18.578188 Passing 5 GPIOs to payload:
5403 11:33:18.581860 NAME | PORT | POLARITY | VALUE
5404 11:33:18.584944 write protect | 0x00000096 | low | high
5405 11:33:18.591887 EC in RW | 0x000000b1 | high | undefined
5406 11:33:18.595077 EC interrupt | 0x00000097 | low | undefined
5407 11:33:18.598304 TPM interrupt | 0x00000099 | high | undefined
5408 11:33:18.605605 speaker enable | 0x000000af | high | undefined
5409 11:33:18.608476 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5410 11:33:18.611573 in-header: 03 f7 00 00 02 00 00 00
5411 11:33:18.611651 in-data: 04 00
5412 11:33:18.614836 Board ID: 4
5413 11:33:18.618517 ADC[3]: Raw value=215860 ID=1
5414 11:33:18.618600 RAM code: 1
5415 11:33:18.618665 SKU ID: 16
5416 11:33:18.624839 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5417 11:33:18.624924 CBFS @ 21000 size 3d4000
5418 11:33:18.631786 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5419 11:33:18.638170 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum beee
5420 11:33:18.638253 coreboot table: 940 bytes.
5421 11:33:18.641344 IMD ROOT 0. 00000000fffff000 00001000
5422 11:33:18.648062 IMD SMALL 1. 00000000ffffe000 00001000
5423 11:33:18.651398 CONSOLE 2. 00000000fffde000 00020000
5424 11:33:18.654768 FMAP 3. 00000000fffdd000 0000047c
5425 11:33:18.658241 TIME STAMP 4. 00000000fffdc000 00000910
5426 11:33:18.661398 RAMOOPS 5. 00000000ffedc000 00100000
5427 11:33:18.665130 COREBOOT 6. 00000000ffeda000 00002000
5428 11:33:18.668042 IMD small region:
5429 11:33:18.671240 IMD ROOT 0. 00000000ffffec00 00000400
5430 11:33:18.674600 VBOOT WORK 1. 00000000ffffeb00 00000100
5431 11:33:18.678114 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5432 11:33:18.681616 VPD 3. 00000000ffffea60 0000006c
5433 11:33:18.688290 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5434 11:33:18.694612 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5435 11:33:18.697866 in-header: 03 e1 00 00 08 00 00 00
5436 11:33:18.697947 in-data: 84 20 60 10 00 00 00 00
5437 11:33:18.704946 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5438 11:33:18.705027 CBFS @ 21000 size 3d4000
5439 11:33:18.711505 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5440 11:33:18.714823 CBFS: Locating 'fallback/payload'
5441 11:33:18.722611 CBFS: Found @ offset dc040 size 439a0
5442 11:33:18.810588 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5443 11:33:18.813732 Checking segment from ROM address 0x0000000040003a00
5444 11:33:18.820848 Checking segment from ROM address 0x0000000040003a1c
5445 11:33:18.824099 Loading segment from ROM address 0x0000000040003a00
5446 11:33:18.827343 code (compression=0)
5447 11:33:18.834154 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5448 11:33:18.843988 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5449 11:33:18.847178 it's not compressed!
5450 11:33:18.850562 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5451 11:33:18.857111 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5452 11:33:18.864908 Loading segment from ROM address 0x0000000040003a1c
5453 11:33:18.868162 Entry Point 0x0000000080000000
5454 11:33:18.868282 Loaded segments
5455 11:33:18.874608 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5456 11:33:18.877978 Jumping to boot code at 0000000080000000(00000000ffeda000)
5457 11:33:18.888206 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5458 11:33:18.891375 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5459 11:33:18.895098 CBFS @ 21000 size 3d4000
5460 11:33:18.901232 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5461 11:33:18.901311 CBFS: Locating 'fallback/bl31'
5462 11:33:18.905115 CBFS: Found @ offset 36dc0 size 5820
5463 11:33:18.918836 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5464 11:33:18.922114 Checking segment from ROM address 0x0000000040003a00
5465 11:33:18.928678 Checking segment from ROM address 0x0000000040003a1c
5466 11:33:18.932065 Loading segment from ROM address 0x0000000040003a00
5467 11:33:18.935946 code (compression=1)
5468 11:33:18.942304 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5469 11:33:18.952169 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5470 11:33:18.952254 using LZMA
5471 11:33:18.960593 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5472 11:33:18.967266 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5473 11:33:18.970408 Loading segment from ROM address 0x0000000040003a1c
5474 11:33:18.973999 Entry Point 0x0000000054601000
5475 11:33:18.974100 Loaded segments
5476 11:33:18.977383 NOTICE: MT8183 bl31_setup
5477 11:33:18.984398 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5478 11:33:18.987755 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5479 11:33:18.991018 INFO: [DEVAPC] dump DEVAPC registers:
5480 11:33:19.001086 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5481 11:33:19.007763 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5482 11:33:19.017420 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5483 11:33:19.024040 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5484 11:33:19.034185 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5485 11:33:19.040884 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5486 11:33:19.051171 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5487 11:33:19.057314 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5488 11:33:19.064260 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5489 11:33:19.074087 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5490 11:33:19.080826 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5491 11:33:19.090644 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5492 11:33:19.097273 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5493 11:33:19.103949 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5494 11:33:19.113860 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5495 11:33:19.120799 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5496 11:33:19.127493 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5497 11:33:19.134340 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5498 11:33:19.140798 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5499 11:33:19.150683 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5500 11:33:19.157241 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5501 11:33:19.164028 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5502 11:33:19.167543 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5503 11:33:19.170858 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5504 11:33:19.174123 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5505 11:33:19.177647 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5506 11:33:19.180752 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5507 11:33:19.187897 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5508 11:33:19.190756 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5509 11:33:19.193897 WARNING: region 0:
5510 11:33:19.197569 WARNING: apc:0x168, sa:0x0, ea:0xfff
5511 11:33:19.197652 WARNING: region 1:
5512 11:33:19.203910 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5513 11:33:19.204008 WARNING: region 2:
5514 11:33:19.207550 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5515 11:33:19.210472 WARNING: region 3:
5516 11:33:19.214271 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5517 11:33:19.214347 WARNING: region 4:
5518 11:33:19.217918 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5519 11:33:19.220681 WARNING: region 5:
5520 11:33:19.224161 WARNING: apc:0x0, sa:0x0, ea:0x0
5521 11:33:19.224229 WARNING: region 6:
5522 11:33:19.227220 WARNING: apc:0x0, sa:0x0, ea:0x0
5523 11:33:19.231008 WARNING: region 7:
5524 11:33:19.234118 WARNING: apc:0x0, sa:0x0, ea:0x0
5525 11:33:19.240728 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5526 11:33:19.243888 INFO: SPM: enable SPMC mode
5527 11:33:19.247633 NOTICE: spm_boot_init() start
5528 11:33:19.247703 NOTICE: spm_boot_init() end
5529 11:33:19.254121 INFO: BL31: Initializing runtime services
5530 11:33:19.257441 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5531 11:33:19.264354 INFO: BL31: Preparing for EL3 exit to normal world
5532 11:33:19.267208 INFO: Entry point address = 0x80000000
5533 11:33:19.267278 INFO: SPSR = 0x8
5534 11:33:19.290753
5535 11:33:19.290839
5536 11:33:19.290904
5537 11:33:19.291381 end: 2.2.3 depthcharge-start (duration 00:00:25) [common]
5538 11:33:19.291481 start: 2.2.4 bootloader-commands (timeout 00:04:26) [common]
5539 11:33:19.291569 Setting prompt string to ['jacuzzi:']
5540 11:33:19.291644 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:26)
5541 11:33:19.294243 Starting depthcharge on Juniper...
5542 11:33:19.294325
5543 11:33:19.297161 vboot_handoff: creating legacy vboot_handoff structure
5544 11:33:19.297232
5545 11:33:19.300947 ec_init(0): CrosEC protocol v3 supported (544, 544)
5546 11:33:19.301014
5547 11:33:19.303883 Wipe memory regions:
5548 11:33:19.303949
5549 11:33:19.307324 [0x00000040000000, 0x00000054600000)
5550 11:33:19.350237
5551 11:33:19.350326 [0x00000054660000, 0x00000080000000)
5552 11:33:19.441692
5553 11:33:19.441786 [0x000000811994a0, 0x000000ffeda000)
5554 11:33:19.702169
5555 11:33:19.702294 [0x00000100000000, 0x00000140000000)
5556 11:33:19.835174
5557 11:33:19.838143 Initializing XHCI USB controller at 0x11200000.
5558 11:33:19.861059
5559 11:33:19.864429 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5560 11:33:19.864512
5561 11:33:19.864583
5562 11:33:19.864848 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5563 11:33:19.864927 Sending line: 'tftpboot 192.168.201.1 14864581/tftp-deploy-nu8198jc/kernel/image.itb 14864581/tftp-deploy-nu8198jc/kernel/cmdline '
5565 11:33:19.965334 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5566 11:33:19.965422 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:26)
5567 11:33:19.969679 jacuzzi: tftpboot 192.168.201.1 14864581/tftp-deploy-nu8198jc/kernel/image.ittp-deploy-nu8198jc/kernel/cmdline
5568 11:33:19.969762
5569 11:33:19.969834 Waiting for link
5570 11:33:20.375579
5571 11:33:20.375709 R8152: Initializing
5572 11:33:20.375777
5573 11:33:20.378519 Version 9 (ocp_data = 6010)
5574 11:33:20.378592
5575 11:33:20.381705 R8152: Done initializing
5576 11:33:20.381777
5577 11:33:20.381838 Adding net device
5578 11:33:20.767409
5579 11:33:20.767531 done.
5580 11:33:20.767597
5581 11:33:20.767665 MAC: 00:e0:4c:68:0b:b9
5582 11:33:20.767726
5583 11:33:20.770590 Sending DHCP discover... done.
5584 11:33:20.770663
5585 11:33:20.773994 Waiting for reply... done.
5586 11:33:20.774076
5587 11:33:20.777188 Sending DHCP request... done.
5588 11:33:20.777264
5589 11:33:20.781901 Waiting for reply... done.
5590 11:33:20.781976
5591 11:33:20.782043 My ip is 192.168.201.13
5592 11:33:20.782103
5593 11:33:20.784894 The DHCP server ip is 192.168.201.1
5594 11:33:20.784965
5595 11:33:20.791886 TFTP server IP predefined by user: 192.168.201.1
5596 11:33:20.791969
5597 11:33:20.798554 Bootfile predefined by user: 14864581/tftp-deploy-nu8198jc/kernel/image.itb
5598 11:33:20.798634
5599 11:33:20.798697 Sending tftp read request... done.
5600 11:33:20.801839
5601 11:33:20.805619 Waiting for the transfer...
5602 11:33:20.805709
5603 11:33:21.061419 00000000 ################################################################
5604 11:33:21.061550
5605 11:33:21.317924 00080000 ################################################################
5606 11:33:21.318051
5607 11:33:21.574276 00100000 ################################################################
5608 11:33:21.574427
5609 11:33:21.830392 00180000 ################################################################
5610 11:33:21.830523
5611 11:33:22.086089 00200000 ################################################################
5612 11:33:22.086218
5613 11:33:22.342464 00280000 ################################################################
5614 11:33:22.342591
5615 11:33:22.598435 00300000 ################################################################
5616 11:33:22.598591
5617 11:33:22.854158 00380000 ################################################################
5618 11:33:22.854290
5619 11:33:23.112027 00400000 ################################################################
5620 11:33:23.112161
5621 11:33:23.368814 00480000 ################################################################
5622 11:33:23.368942
5623 11:33:23.624317 00500000 ################################################################
5624 11:33:23.624480
5625 11:33:23.882333 00580000 ################################################################
5626 11:33:23.882494
5627 11:33:24.135898 00600000 ################################################################
5628 11:33:24.136064
5629 11:33:24.386981 00680000 ################################################################
5630 11:33:24.387107
5631 11:33:24.632994 00700000 ################################################################
5632 11:33:24.633154
5633 11:33:24.883377 00780000 ################################################################
5634 11:33:24.883537
5635 11:33:25.136217 00800000 ################################################################
5636 11:33:25.136375
5637 11:33:25.397486 00880000 ################################################################
5638 11:33:25.397609
5639 11:33:25.649080 00900000 ################################################################
5640 11:33:25.649243
5641 11:33:25.899324 00980000 ################################################################
5642 11:33:25.899480
5643 11:33:26.150399 00a00000 ################################################################
5644 11:33:26.150534
5645 11:33:26.401359 00a80000 ################################################################
5646 11:33:26.401489
5647 11:33:26.648019 00b00000 ################################################################
5648 11:33:26.648148
5649 11:33:26.897671 00b80000 ################################################################
5650 11:33:26.897790
5651 11:33:27.147714 00c00000 ################################################################
5652 11:33:27.147836
5653 11:33:27.399556 00c80000 ################################################################
5654 11:33:27.399676
5655 11:33:27.657726 00d00000 ################################################################
5656 11:33:27.657871
5657 11:33:27.907864 00d80000 ################################################################
5658 11:33:27.908014
5659 11:33:28.155599 00e00000 ################################################################
5660 11:33:28.155722
5661 11:33:28.403892 00e80000 ################################################################
5662 11:33:28.404017
5663 11:33:28.651324 00f00000 ################################################################
5664 11:33:28.651475
5665 11:33:28.904029 00f80000 ################################################################
5666 11:33:28.904153
5667 11:33:29.163063 01000000 ################################################################
5668 11:33:29.163207
5669 11:33:29.418552 01080000 ################################################################
5670 11:33:29.418689
5671 11:33:29.674195 01100000 ################################################################
5672 11:33:29.674317
5673 11:33:29.919803 01180000 ################################################################
5674 11:33:29.919920
5675 11:33:30.165980 01200000 ################################################################
5676 11:33:30.166124
5677 11:33:30.415198 01280000 ################################################################
5678 11:33:30.415322
5679 11:33:30.666053 01300000 ################################################################
5680 11:33:30.666186
5681 11:33:30.918846 01380000 ################################################################
5682 11:33:30.918974
5683 11:33:31.181344 01400000 ################################################################
5684 11:33:31.181474
5685 11:33:31.442536 01480000 ################################################################
5686 11:33:31.442670
5687 11:33:31.712230 01500000 ################################################################
5688 11:33:31.712362
5689 11:33:31.965299 01580000 ################################################################
5690 11:33:31.965427
5691 11:33:32.232620 01600000 ################################################################
5692 11:33:32.232743
5693 11:33:32.485279 01680000 ################################################################
5694 11:33:32.485402
5695 11:33:32.765648 01700000 ################################################################
5696 11:33:32.765770
5697 11:33:33.030657 01780000 ################################################################
5698 11:33:33.030778
5699 11:33:33.301127 01800000 ################################################################
5700 11:33:33.301250
5701 11:33:33.553820 01880000 ################################################################
5702 11:33:33.553947
5703 11:33:33.802286 01900000 ################################################################
5704 11:33:33.802410
5705 11:33:34.052121 01980000 ################################################################
5706 11:33:34.052244
5707 11:33:34.299219 01a00000 ################################################################
5708 11:33:34.299342
5709 11:33:34.549032 01a80000 ################################################################
5710 11:33:34.549155
5711 11:33:34.801179 01b00000 ################################################################
5712 11:33:34.801303
5713 11:33:35.060359 01b80000 ################################################################
5714 11:33:35.060512
5715 11:33:35.316994 01c00000 ################################################################
5716 11:33:35.317119
5717 11:33:35.573030 01c80000 ################################################################
5718 11:33:35.573156
5719 11:33:35.821464 01d00000 ################################################################
5720 11:33:35.821611
5721 11:33:36.069615 01d80000 ################################################################
5722 11:33:36.069739
5723 11:33:36.318642 01e00000 ################################################################
5724 11:33:36.318765
5725 11:33:36.593507 01e80000 ################################################################
5726 11:33:36.593638
5727 11:33:36.881300 01f00000 ################################################################
5728 11:33:36.881432
5729 11:33:37.158118 01f80000 ################################################################
5730 11:33:37.158253
5731 11:33:37.436992 02000000 ################################################################
5732 11:33:37.437131
5733 11:33:37.735675 02080000 ################################################################
5734 11:33:37.735806
5735 11:33:38.038995 02100000 ################################################################
5736 11:33:38.039133
5737 11:33:38.338211 02180000 ################################################################
5738 11:33:38.338342
5739 11:33:38.634089 02200000 ################################################################
5740 11:33:38.634221
5741 11:33:38.940331 02280000 ################################################################
5742 11:33:38.940449
5743 11:33:39.230929 02300000 ################################################################
5744 11:33:39.231056
5745 11:33:39.617053 02380000 ################################################################
5746 11:33:39.617509
5747 11:33:40.026439 02400000 ################################################################
5748 11:33:40.026895
5749 11:33:40.427410 02480000 ################################################################
5750 11:33:40.427969
5751 11:33:40.814227 02500000 ################################################################
5752 11:33:40.814679
5753 11:33:41.217700 02580000 ################################################################
5754 11:33:41.218153
5755 11:33:41.612399 02600000 ################################################################
5756 11:33:41.612902
5757 11:33:41.999766 02680000 ################################################################
5758 11:33:42.000216
5759 11:33:42.399156 02700000 ################################################################
5760 11:33:42.399606
5761 11:33:42.793899 02780000 ################################################################
5762 11:33:42.794341
5763 11:33:43.178739 02800000 ################################################################
5764 11:33:43.179222
5765 11:33:43.481569 02880000 ################################################################
5766 11:33:43.481697
5767 11:33:43.848131 02900000 ################################################################
5768 11:33:43.848620
5769 11:33:44.260903 02980000 ################################################################
5770 11:33:44.261355
5771 11:33:44.644368 02a00000 ################################################################
5772 11:33:44.645001
5773 11:33:45.071712 02a80000 ################################################################
5774 11:33:45.072201
5775 11:33:45.426664 02b00000 ################################################################
5776 11:33:45.426792
5777 11:33:45.721877 02b80000 ################################################################
5778 11:33:45.722008
5779 11:33:46.014938 02c00000 ################################################################
5780 11:33:46.015061
5781 11:33:46.310731 02c80000 ################################################################
5782 11:33:46.310852
5783 11:33:46.593505 02d00000 ################################################################
5784 11:33:46.593625
5785 11:33:46.880550 02d80000 ################################################################
5786 11:33:46.880701
5787 11:33:47.159968 02e00000 ################################################################
5788 11:33:47.160091
5789 11:33:47.444911 02e80000 ################################################################
5790 11:33:47.445033
5791 11:33:47.737272 02f00000 ################################################################
5792 11:33:47.737393
5793 11:33:48.046907 02f80000 ################################################################
5794 11:33:48.047362
5795 11:33:48.414540 03000000 ################################################################
5796 11:33:48.414671
5797 11:33:48.668789 03080000 ################################################################
5798 11:33:48.668916
5799 11:33:48.923132 03100000 ################################################################
5800 11:33:48.923255
5801 11:33:49.208106 03180000 ################################################################
5802 11:33:49.208226
5803 11:33:49.531694 03200000 ################################################################
5804 11:33:49.531864
5805 11:33:49.811019 03280000 ################################################################
5806 11:33:49.811161
5807 11:33:50.087844 03300000 ################################################################
5808 11:33:50.087974
5809 11:33:50.375965 03380000 ################################################################
5810 11:33:50.376122
5811 11:33:50.635103 03400000 ################################################################
5812 11:33:50.635241
5813 11:33:50.890457 03480000 ################################################################
5814 11:33:50.890598
5815 11:33:51.156396 03500000 ################################################################
5816 11:33:51.156535
5817 11:33:51.420542 03580000 ################################################################
5818 11:33:51.420704
5819 11:33:51.738054 03600000 ################################################################
5820 11:33:51.738702
5821 11:33:52.045165 03680000 ################################################################
5822 11:33:52.045289
5823 11:33:52.334595 03700000 ################################################################
5824 11:33:52.334752
5825 11:33:52.630296 03780000 ################################################################
5826 11:33:52.630424
5827 11:33:52.914441 03800000 ################################################################
5828 11:33:52.914573
5829 11:33:53.212969 03880000 ################################################################
5830 11:33:53.213475
5831 11:33:53.639616 03900000 ################################################################
5832 11:33:53.640099
5833 11:33:54.068568 03980000 ################################################################
5834 11:33:54.069042
5835 11:33:54.450567 03a00000 ################################################################
5836 11:33:54.450721
5837 11:33:54.778931 03a80000 ################################################################
5838 11:33:54.779388
5839 11:33:55.057518 03b00000 ################################################################
5840 11:33:55.057644
5841 11:33:55.312941 03b80000 ################################################################
5842 11:33:55.313072
5843 11:33:55.611134 03c00000 ################################################################
5844 11:33:55.611268
5845 11:33:55.911302 03c80000 ################################################################
5846 11:33:55.911434
5847 11:33:56.203482 03d00000 ################################################################
5848 11:33:56.203607
5849 11:33:56.483623 03d80000 ################################################################
5850 11:33:56.483746
5851 11:33:56.768512 03e00000 ################################################################
5852 11:33:56.768636
5853 11:33:57.067883 03e80000 ################################################################
5854 11:33:57.068008
5855 11:33:57.354696 03f00000 ################################################################
5856 11:33:57.354829
5857 11:33:57.608737 03f80000 ################################################################
5858 11:33:57.608862
5859 11:33:57.874029 04000000 ################################################################
5860 11:33:57.874157
5861 11:33:58.264117 04080000 ################################################################
5862 11:33:58.264719
5863 11:33:58.617376 04100000 ################################################################
5864 11:33:58.617854
5865 11:33:59.016024 04180000 ################################################################
5866 11:33:59.016514
5867 11:33:59.373782 04200000 ################################################################
5868 11:33:59.373907
5869 11:33:59.626257 04280000 ################################################################
5870 11:33:59.626396
5871 11:33:59.880527 04300000 ################################################################
5872 11:33:59.880663
5873 11:34:00.135492 04380000 ################################################################
5874 11:34:00.135625
5875 11:34:00.390058 04400000 ################################################################
5876 11:34:00.390191
5877 11:34:00.643876 04480000 ################################################################
5878 11:34:00.644012
5879 11:34:00.897581 04500000 ################################################################
5880 11:34:00.897712
5881 11:34:01.151384 04580000 ################################################################
5882 11:34:01.151519
5883 11:34:01.408193 04600000 ################################################################
5884 11:34:01.408332
5885 11:34:01.537286 04680000 ############################### done.
5886 11:34:01.537421
5887 11:34:01.540434 The bootfile was 74172102 bytes long.
5888 11:34:01.540540
5889 11:34:01.543802 Sending tftp read request... done.
5890 11:34:01.543897
5891 11:34:01.547111 Waiting for the transfer...
5892 11:34:01.547214
5893 11:34:01.547316 00000000 # done.
5894 11:34:01.547413
5895 11:34:01.557343 Command line loaded dynamically from TFTP file: 14864581/tftp-deploy-nu8198jc/kernel/cmdline
5896 11:34:01.557469
5897 11:34:01.573891 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5898 11:34:01.574156
5899 11:34:01.574352 Loading FIT.
5900 11:34:01.574529
5901 11:34:01.577070 Image ramdisk-1 has 60994070 bytes.
5902 11:34:01.577345
5903 11:34:01.580372 Image fdt-1 has 57695 bytes.
5904 11:34:01.580666
5905 11:34:01.583750 Image kernel-1 has 13118294 bytes.
5906 11:34:01.584011
5907 11:34:01.590696 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5908 11:34:01.591162
5909 11:34:01.603949 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5910 11:34:01.604354
5911 11:34:01.610453 Choosing best match conf-1 for compat google,juniper-sku16.
5912 11:34:01.610856
5913 11:34:01.614385 Connected to device vid:did:rid of 1ae0:0028:00
5914 11:34:01.626184
5915 11:34:01.628974 tpm_get_response: command 0x17b, return code 0x0
5916 11:34:01.629376
5917 11:34:01.632740 tpm_cleanup: add release locality here.
5918 11:34:01.633140
5919 11:34:01.635726 Shutting down all USB controllers.
5920 11:34:01.636126
5921 11:34:01.639585 Removing current net device
5922 11:34:01.639986
5923 11:34:01.643012 Exiting depthcharge with code 4 at timestamp: 59696401
5924 11:34:01.643545
5925 11:34:01.645817 LZMA decompressing kernel-1 to 0x80193568
5926 11:34:01.646204
5927 11:34:01.652497 LZMA decompressing kernel-1 to 0x40000000
5928 11:34:03.514659
5929 11:34:03.515324 jumping to kernel
5930 11:34:03.518926 end: 2.2.4 bootloader-commands (duration 00:00:44) [common]
5931 11:34:03.519561 start: 2.2.5 auto-login-action (timeout 00:03:42) [common]
5932 11:34:03.520064 Setting prompt string to ['Linux version [0-9]']
5933 11:34:03.520597 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5934 11:34:03.521112 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5935 11:34:03.589517
5936 11:34:03.593183 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5937 11:34:03.596905 start: 2.2.5.1 login-action (timeout 00:03:42) [common]
5938 11:34:03.597384 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5939 11:34:03.597783 Setting prompt string to []
5940 11:34:03.598254 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5941 11:34:03.598767 Using line separator: #'\n'#
5942 11:34:03.599116 No login prompt set.
5943 11:34:03.599519 Parsing kernel messages
5944 11:34:03.599903 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5945 11:34:03.600394 [login-action] Waiting for messages, (timeout 00:03:42)
5946 11:34:03.600762 Waiting using forced prompt support (timeout 00:01:51)
5947 11:34:03.616423 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j270465-arm64-gcc-12-defconfig-arm64-chromebook-hjsv4) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Wed Jul 17 11:18:13 UTC 2024
5948 11:34:03.619344 [ 0.000000] random: crng init done
5949 11:34:03.623013 [ 0.000000] Machine model: Google juniper sku16 board
5950 11:34:03.625970 [ 0.000000] efi: UEFI not found.
5951 11:34:03.635888 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5952 11:34:03.642706 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5953 11:34:03.649634 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5954 11:34:03.656232 [ 0.000000] printk: bootconsole [mtk8250] enabled
5955 11:34:03.664302 [ 0.000000] NUMA: No NUMA configuration found
5956 11:34:03.670892 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5957 11:34:03.677128 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5958 11:34:03.677633 [ 0.000000] Zone ranges:
5959 11:34:03.683841 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5960 11:34:03.687077 [ 0.000000] DMA32 empty
5961 11:34:03.693469 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5962 11:34:03.696992 [ 0.000000] Movable zone start for each node
5963 11:34:03.700259 [ 0.000000] Early memory node ranges
5964 11:34:03.707085 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5965 11:34:03.713618 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5966 11:34:03.720537 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5967 11:34:03.727164 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5968 11:34:03.733579 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5969 11:34:03.739778 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5970 11:34:03.760525 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5971 11:34:03.767322 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5972 11:34:03.773797 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5973 11:34:03.777199 [ 0.000000] psci: probing for conduit method from DT.
5974 11:34:03.783894 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5975 11:34:03.787122 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5976 11:34:03.793335 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5977 11:34:03.797257 [ 0.000000] psci: SMC Calling Convention v1.1
5978 11:34:03.803369 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5979 11:34:03.806662 [ 0.000000] Detected VIPT I-cache on CPU0
5980 11:34:03.813687 [ 0.000000] CPU features: detected: GIC system register CPU interface
5981 11:34:03.819999 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5982 11:34:03.826410 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5983 11:34:03.833016 [ 0.000000] CPU features: detected: ARM erratum 845719
5984 11:34:03.836077 [ 0.000000] alternatives: applying boot alternatives
5985 11:34:03.839957 [ 0.000000] Fallback order for Node 0: 0
5986 11:34:03.846329 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5987 11:34:03.849708 [ 0.000000] Policy zone: Normal
5988 11:34:03.869782 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5989 11:34:03.882984 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5990 11:34:03.889427 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5991 11:34:03.899505 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5992 11:34:03.906303 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5993 11:34:03.909568 <6>[ 0.000000] software IO TLB: area num 8.
5994 11:34:03.935567 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5995 11:34:03.993317 <6>[ 0.000000] Memory: 3855508K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 302956K reserved, 32768K cma-reserved)
5996 11:34:03.999958 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5997 11:34:04.006668 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5998 11:34:04.010312 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5999 11:34:04.016563 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
6000 11:34:04.022974 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
6001 11:34:04.026544 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
6002 11:34:04.036589 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
6003 11:34:04.043469 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
6004 11:34:04.049895 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
6005 11:34:04.059559 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
6006 11:34:04.063158 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
6007 11:34:04.066922 <6>[ 0.000000] GICv3: 640 SPIs implemented
6008 11:34:04.073078 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
6009 11:34:04.076835 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
6010 11:34:04.080229 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
6011 11:34:04.089766 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
6012 11:34:04.099572 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
6013 11:34:04.112871 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
6014 11:34:04.119757 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
6015 11:34:04.130381 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
6016 11:34:04.143927 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
6017 11:34:04.150560 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
6018 11:34:04.157563 <6>[ 0.009474] Console: colour dummy device 80x25
6019 11:34:04.160279 <6>[ 0.014509] printk: console [tty1] enabled
6020 11:34:04.170540 <6>[ 0.018900] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
6021 11:34:04.177232 <6>[ 0.029364] pid_max: default: 32768 minimum: 301
6022 11:34:04.180556 <6>[ 0.034245] LSM: Security Framework initializing
6023 11:34:04.190973 <6>[ 0.039160] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
6024 11:34:04.197335 <6>[ 0.046783] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
6025 11:34:04.203958 <4>[ 0.055668] cacheinfo: Unable to detect cache hierarchy for CPU 0
6026 11:34:04.213825 <6>[ 0.062295] cblist_init_generic: Setting adjustable number of callback queues.
6027 11:34:04.220588 <6>[ 0.069741] cblist_init_generic: Setting shift to 3 and lim to 1.
6028 11:34:04.227008 <6>[ 0.076094] cblist_init_generic: Setting adjustable number of callback queues.
6029 11:34:04.233514 <6>[ 0.083538] cblist_init_generic: Setting shift to 3 and lim to 1.
6030 11:34:04.236747 <6>[ 0.089937] rcu: Hierarchical SRCU implementation.
6031 11:34:04.243244 <6>[ 0.094963] rcu: Max phase no-delay instances is 1000.
6032 11:34:04.250606 <6>[ 0.102885] EFI services will not be available.
6033 11:34:04.253946 <6>[ 0.107835] smp: Bringing up secondary CPUs ...
6034 11:34:04.264252 <6>[ 0.113104] Detected VIPT I-cache on CPU1
6035 11:34:04.271045 <4>[ 0.113151] cacheinfo: Unable to detect cache hierarchy for CPU 1
6036 11:34:04.277794 <6>[ 0.113159] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
6037 11:34:04.284184 <6>[ 0.113190] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
6038 11:34:04.287443 <6>[ 0.113673] Detected VIPT I-cache on CPU2
6039 11:34:04.294468 <4>[ 0.113706] cacheinfo: Unable to detect cache hierarchy for CPU 2
6040 11:34:04.300809 <6>[ 0.113710] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
6041 11:34:04.307690 <6>[ 0.113723] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
6042 11:34:04.311040 <6>[ 0.114169] Detected VIPT I-cache on CPU3
6043 11:34:04.317713 <4>[ 0.114198] cacheinfo: Unable to detect cache hierarchy for CPU 3
6044 11:34:04.327786 <6>[ 0.114203] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
6045 11:34:04.334302 <6>[ 0.114214] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
6046 11:34:04.337529 <6>[ 0.114789] CPU features: detected: Spectre-v2
6047 11:34:04.340706 <6>[ 0.114799] CPU features: detected: Spectre-BHB
6048 11:34:04.347935 <6>[ 0.114803] CPU features: detected: ARM erratum 858921
6049 11:34:04.350795 <6>[ 0.114808] Detected VIPT I-cache on CPU4
6050 11:34:04.357373 <4>[ 0.114856] cacheinfo: Unable to detect cache hierarchy for CPU 4
6051 11:34:04.363937 <6>[ 0.114864] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
6052 11:34:04.370566 <6>[ 0.114872] arch_timer: Enabling local workaround for ARM erratum 858921
6053 11:34:04.377441 <6>[ 0.114882] arch_timer: CPU4: Trapping CNTVCT access
6054 11:34:04.384173 <6>[ 0.114890] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
6055 11:34:04.387367 <6>[ 0.115377] Detected VIPT I-cache on CPU5
6056 11:34:04.393818 <4>[ 0.115417] cacheinfo: Unable to detect cache hierarchy for CPU 5
6057 11:34:04.400440 <6>[ 0.115423] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
6058 11:34:04.407221 <6>[ 0.115429] arch_timer: Enabling local workaround for ARM erratum 858921
6059 11:34:04.413960 <6>[ 0.115436] arch_timer: CPU5: Trapping CNTVCT access
6060 11:34:04.420248 <6>[ 0.115441] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
6061 11:34:04.423972 <6>[ 0.115876] Detected VIPT I-cache on CPU6
6062 11:34:04.430191 <4>[ 0.115921] cacheinfo: Unable to detect cache hierarchy for CPU 6
6063 11:34:04.437415 <6>[ 0.115927] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
6064 11:34:04.447129 <6>[ 0.115934] arch_timer: Enabling local workaround for ARM erratum 858921
6065 11:34:04.450276 <6>[ 0.115940] arch_timer: CPU6: Trapping CNTVCT access
6066 11:34:04.457077 <6>[ 0.115945] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
6067 11:34:04.460191 <6>[ 0.116476] Detected VIPT I-cache on CPU7
6068 11:34:04.466938 <4>[ 0.116519] cacheinfo: Unable to detect cache hierarchy for CPU 7
6069 11:34:04.473358 <6>[ 0.116526] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
6070 11:34:04.483712 <6>[ 0.116533] arch_timer: Enabling local workaround for ARM erratum 858921
6071 11:34:04.486980 <6>[ 0.116539] arch_timer: CPU7: Trapping CNTVCT access
6072 11:34:04.493278 <6>[ 0.116544] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
6073 11:34:04.496727 <6>[ 0.116618] smp: Brought up 1 node, 8 CPUs
6074 11:34:04.503335 <6>[ 0.355495] SMP: Total of 8 processors activated.
6075 11:34:04.510190 <6>[ 0.360432] CPU features: detected: 32-bit EL0 Support
6076 11:34:04.513320 <6>[ 0.365803] CPU features: detected: 32-bit EL1 Support
6077 11:34:04.520231 <6>[ 0.371169] CPU features: detected: CRC32 instructions
6078 11:34:04.523054 <6>[ 0.376594] CPU: All CPU(s) started at EL2
6079 11:34:04.529609 <6>[ 0.380932] alternatives: applying system-wide alternatives
6080 11:34:04.537003 <6>[ 0.389095] devtmpfs: initialized
6081 11:34:04.548897 <6>[ 0.398024] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
6082 11:34:04.559029 <6>[ 0.407972] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
6083 11:34:04.562158 <6>[ 0.415695] pinctrl core: initialized pinctrl subsystem
6084 11:34:04.570870 <6>[ 0.422805] DMI not present or invalid.
6085 11:34:04.577135 <6>[ 0.427175] NET: Registered PF_NETLINK/PF_ROUTE protocol family
6086 11:34:04.584181 <6>[ 0.434073] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
6087 11:34:04.593977 <6>[ 0.441602] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
6088 11:34:04.600600 <6>[ 0.449850] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
6089 11:34:04.607068 <6>[ 0.458027] audit: initializing netlink subsys (disabled)
6090 11:34:04.613870 <5>[ 0.463733] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
6091 11:34:04.620201 <6>[ 0.464700] thermal_sys: Registered thermal governor 'step_wise'
6092 11:34:04.626772 <6>[ 0.471699] thermal_sys: Registered thermal governor 'power_allocator'
6093 11:34:04.630320 <6>[ 0.477996] cpuidle: using governor menu
6094 11:34:04.636660 <6>[ 0.488961] NET: Registered PF_QIPCRTR protocol family
6095 11:34:04.643568 <6>[ 0.494445] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
6096 11:34:04.649749 <6>[ 0.501543] ASID allocator initialised with 32768 entries
6097 11:34:04.656426 <6>[ 0.508304] Serial: AMBA PL011 UART driver
6098 11:34:04.667043 <4>[ 0.519654] Trying to register duplicate clock ID: 113
6099 11:34:04.727361 <6>[ 0.576265] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6100 11:34:04.741736 <6>[ 0.590666] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6101 11:34:04.745380 <6>[ 0.600435] KASLR enabled
6102 11:34:04.759450 <6>[ 0.608399] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
6103 11:34:04.766168 <6>[ 0.615403] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
6104 11:34:04.773108 <6>[ 0.621878] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
6105 11:34:04.779451 <6>[ 0.628869] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
6106 11:34:04.786394 <6>[ 0.635343] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
6107 11:34:04.792423 <6>[ 0.642333] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
6108 11:34:04.799174 <6>[ 0.648807] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
6109 11:34:04.805948 <6>[ 0.655798] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
6110 11:34:04.809148 <6>[ 0.663368] ACPI: Interpreter disabled.
6111 11:34:04.818744 <6>[ 0.671355] iommu: Default domain type: Translated
6112 11:34:04.825365 <6>[ 0.676463] iommu: DMA domain TLB invalidation policy: strict mode
6113 11:34:04.828768 <5>[ 0.683090] SCSI subsystem initialized
6114 11:34:04.835316 <6>[ 0.687501] usbcore: registered new interface driver usbfs
6115 11:34:04.842483 <6>[ 0.693227] usbcore: registered new interface driver hub
6116 11:34:04.845198 <6>[ 0.698769] usbcore: registered new device driver usb
6117 11:34:04.852574 <6>[ 0.705080] pps_core: LinuxPPS API ver. 1 registered
6118 11:34:04.862465 <6>[ 0.710264] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
6119 11:34:04.865809 <6>[ 0.719590] PTP clock support registered
6120 11:34:04.869199 <6>[ 0.723843] EDAC MC: Ver: 3.0.0
6121 11:34:04.876930 <6>[ 0.729483] FPGA manager framework
6122 11:34:04.883522 <6>[ 0.733169] Advanced Linux Sound Architecture Driver Initialized.
6123 11:34:04.886598 <6>[ 0.739929] vgaarb: loaded
6124 11:34:04.893473 <6>[ 0.743048] clocksource: Switched to clocksource arch_sys_counter
6125 11:34:04.896565 <5>[ 0.749478] VFS: Disk quotas dquot_6.6.0
6126 11:34:04.903579 <6>[ 0.753654] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
6127 11:34:04.906685 <6>[ 0.760826] pnp: PnP ACPI: disabled
6128 11:34:04.914959 <6>[ 0.767723] NET: Registered PF_INET protocol family
6129 11:34:04.921883 <6>[ 0.772954] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6130 11:34:04.933502 <6>[ 0.782869] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6131 11:34:04.943434 <6>[ 0.791624] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6132 11:34:04.950417 <6>[ 0.799574] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6133 11:34:04.957016 <6>[ 0.807805] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6134 11:34:04.963369 <6>[ 0.815899] TCP: Hash tables configured (established 32768 bind 32768)
6135 11:34:04.973836 <6>[ 0.822724] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6136 11:34:04.980286 <6>[ 0.829697] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6137 11:34:04.986686 <6>[ 0.837179] NET: Registered PF_UNIX/PF_LOCAL protocol family
6138 11:34:04.993219 <6>[ 0.843277] RPC: Registered named UNIX socket transport module.
6139 11:34:04.996891 <6>[ 0.849421] RPC: Registered udp transport module.
6140 11:34:05.000390 <6>[ 0.854346] RPC: Registered tcp transport module.
6141 11:34:05.006594 <6>[ 0.859269] RPC: Registered tcp NFSv4.1 backchannel transport module.
6142 11:34:05.013373 <6>[ 0.865921] PCI: CLS 0 bytes, default 64
6143 11:34:05.016438 <6>[ 0.870215] Unpacking initramfs...
6144 11:34:05.030584 <6>[ 0.879698] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6145 11:34:05.040546 <6>[ 0.888321] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6146 11:34:05.043678 <6>[ 0.897172] kvm [1]: IPA Size Limit: 40 bits
6147 11:34:05.051219 <6>[ 0.903499] kvm [1]: vgic-v2@c420000
6148 11:34:05.054529 <6>[ 0.907314] kvm [1]: GIC system register CPU interface enabled
6149 11:34:05.061249 <6>[ 0.913489] kvm [1]: vgic interrupt IRQ18
6150 11:34:05.064563 <6>[ 0.917864] kvm [1]: Hyp mode initialized successfully
6151 11:34:05.072591 <5>[ 0.924132] Initialise system trusted keyrings
6152 11:34:05.078333 <6>[ 0.928962] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6153 11:34:05.086480 <6>[ 0.938867] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6154 11:34:05.093157 <5>[ 0.945360] NFS: Registering the id_resolver key type
6155 11:34:05.096449 <5>[ 0.950674] Key type id_resolver registered
6156 11:34:05.102897 <5>[ 0.955088] Key type id_legacy registered
6157 11:34:05.110005 <6>[ 0.959394] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6158 11:34:05.116198 <6>[ 0.966316] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6159 11:34:05.122632 <6>[ 0.974074] 9p: Installing v9fs 9p2000 file system support
6160 11:34:05.150905 <5>[ 1.003590] Key type asymmetric registered
6161 11:34:05.154404 <5>[ 1.007935] Asymmetric key parser 'x509' registered
6162 11:34:05.164691 <6>[ 1.013089] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6163 11:34:05.167719 <6>[ 1.020703] io scheduler mq-deadline registered
6164 11:34:05.170803 <6>[ 1.025465] io scheduler kyber registered
6165 11:34:05.193826 <6>[ 1.046254] EINJ: ACPI disabled.
6166 11:34:05.200265 <4>[ 1.050035] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6167 11:34:05.238159 <6>[ 1.090990] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6168 11:34:05.246835 <6>[ 1.099441] printk: console [ttyS0] disabled
6169 11:34:05.274857 <6>[ 1.124092] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6170 11:34:05.282158 <6>[ 1.133570] printk: console [ttyS0] enabled
6171 11:34:05.285070 <6>[ 1.133570] printk: console [ttyS0] enabled
6172 11:34:05.291543 <6>[ 1.142490] printk: bootconsole [mtk8250] disabled
6173 11:34:05.294810 <6>[ 1.142490] printk: bootconsole [mtk8250] disabled
6174 11:34:05.304824 <3>[ 1.153028] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6175 11:34:05.311402 <3>[ 1.161410] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6176 11:34:05.340752 <6>[ 1.189818] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6177 11:34:05.347366 <6>[ 1.199477] serial serial0: tty port ttyS1 registered
6178 11:34:05.353980 <6>[ 1.206052] SuperH (H)SCI(F) driver initialized
6179 11:34:05.357562 <6>[ 1.211570] msm_serial: driver initialized
6180 11:34:05.372585 <6>[ 1.221920] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6181 11:34:05.382764 <6>[ 1.230528] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6182 11:34:05.389625 <6>[ 1.239100] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6183 11:34:05.399535 <6>[ 1.247667] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6184 11:34:05.406003 <6>[ 1.256322] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6185 11:34:05.416169 <6>[ 1.264984] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6186 11:34:05.425897 <6>[ 1.273723] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6187 11:34:05.432646 <6>[ 1.282465] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6188 11:34:05.442897 <6>[ 1.291030] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6189 11:34:05.452578 <6>[ 1.299828] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6190 11:34:05.460258 <4>[ 1.312258] cacheinfo: Unable to detect cache hierarchy for CPU 0
6191 11:34:05.469491 <6>[ 1.321582] loop: module loaded
6192 11:34:05.481750 <6>[ 1.333498] vsim1: Bringing 1800000uV into 2700000-2700000uV
6193 11:34:05.499459 <6>[ 1.351455] megasas: 07.719.03.00-rc1
6194 11:34:05.508897 <6>[ 1.360285] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6195 11:34:05.518616 <6>[ 1.370442] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6196 11:34:05.535483 <6>[ 1.387179] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6197 11:34:05.592022 <6>[ 1.437584] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_A:0.5.171/cr50_v2.94_mp.164-2fb1d
6198 11:34:07.083381 <6>[ 2.935442] Freeing initrd memory: 59564K
6199 11:34:07.098711 <4>[ 2.947537] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6200 11:34:07.105435 <4>[ 2.956770] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
6201 11:34:07.112048 <4>[ 2.963468] Hardware name: Google juniper sku16 board (DT)
6202 11:34:07.115585 <4>[ 2.969207] Call trace:
6203 11:34:07.118851 <4>[ 2.971907] dump_backtrace.part.0+0xe0/0xf0
6204 11:34:07.121847 <4>[ 2.976444] show_stack+0x18/0x30
6205 11:34:07.125592 <4>[ 2.980017] dump_stack_lvl+0x64/0x80
6206 11:34:07.132181 <4>[ 2.983937] dump_stack+0x18/0x34
6207 11:34:07.135167 <4>[ 2.987506] sysfs_warn_dup+0x64/0x80
6208 11:34:07.138858 <4>[ 2.991428] sysfs_do_create_link_sd+0xf0/0x100
6209 11:34:07.141899 <4>[ 2.996215] sysfs_create_link+0x20/0x40
6210 11:34:07.148667 <4>[ 3.000395] bus_add_device+0x64/0x120
6211 11:34:07.152013 <4>[ 3.004400] device_add+0x354/0x7ec
6212 11:34:07.155100 <4>[ 3.008147] of_device_add+0x44/0x60
6213 11:34:07.161989 <4>[ 3.011980] of_platform_device_create_pdata+0x90/0x124
6214 11:34:07.165445 <4>[ 3.017462] of_platform_bus_create+0x154/0x380
6215 11:34:07.168503 <4>[ 3.022248] of_platform_populate+0x50/0xfc
6216 11:34:07.174900 <4>[ 3.026686] parse_mtd_partitions+0x1d8/0x4e0
6217 11:34:07.178677 <4>[ 3.031302] mtd_device_parse_register+0xec/0x2e0
6218 11:34:07.182261 <4>[ 3.036263] spi_nor_probe+0x280/0x2f4
6219 11:34:07.189022 <4>[ 3.040268] spi_mem_probe+0x6c/0xc0
6220 11:34:07.192219 <4>[ 3.044101] spi_probe+0x84/0xe4
6221 11:34:07.195404 <4>[ 3.047585] really_probe+0xbc/0x2dc
6222 11:34:07.198700 <4>[ 3.051416] __driver_probe_device+0x78/0x114
6223 11:34:07.205312 <4>[ 3.056026] driver_probe_device+0xd8/0x15c
6224 11:34:07.208403 <4>[ 3.060463] __device_attach_driver+0xb8/0x134
6225 11:34:07.211676 <4>[ 3.065161] bus_for_each_drv+0x7c/0xd4
6226 11:34:07.214998 <4>[ 3.069254] __device_attach+0x9c/0x1a0
6227 11:34:07.221320 <4>[ 3.073344] device_initial_probe+0x14/0x20
6228 11:34:07.224793 <4>[ 3.077781] bus_probe_device+0x98/0xa0
6229 11:34:07.228029 <4>[ 3.081872] device_add+0x3c0/0x7ec
6230 11:34:07.231387 <4>[ 3.085617] __spi_add_device+0x78/0x120
6231 11:34:07.238034 <4>[ 3.089794] spi_add_device+0x44/0x80
6232 11:34:07.241267 <4>[ 3.093711] spi_register_controller+0x704/0xb20
6233 11:34:07.247834 <4>[ 3.098583] devm_spi_register_controller+0x4c/0xac
6234 11:34:07.251488 <4>[ 3.103717] mtk_spi_probe+0x4f4/0x684
6235 11:34:07.254448 <4>[ 3.107720] platform_probe+0x68/0xc0
6236 11:34:07.258175 <4>[ 3.111638] really_probe+0xbc/0x2dc
6237 11:34:07.265102 <4>[ 3.115469] __driver_probe_device+0x78/0x114
6238 11:34:07.268018 <4>[ 3.120080] driver_probe_device+0xd8/0x15c
6239 11:34:07.271556 <4>[ 3.124518] __driver_attach+0x94/0x19c
6240 11:34:07.274676 <4>[ 3.128609] bus_for_each_dev+0x74/0xd0
6241 11:34:07.278155 <4>[ 3.132701] driver_attach+0x24/0x30
6242 11:34:07.284442 <4>[ 3.136531] bus_add_driver+0x154/0x20c
6243 11:34:07.287576 <4>[ 3.140621] driver_register+0x78/0x130
6244 11:34:07.291012 <4>[ 3.144712] __platform_driver_register+0x28/0x34
6245 11:34:07.297958 <4>[ 3.149672] mtk_spi_driver_init+0x1c/0x28
6246 11:34:07.301133 <4>[ 3.154028] do_one_initcall+0x64/0x1dc
6247 11:34:07.304269 <4>[ 3.158119] kernel_init_freeable+0x218/0x284
6248 11:34:07.311074 <4>[ 3.162734] kernel_init+0x24/0x12c
6249 11:34:07.314310 <4>[ 3.166479] ret_from_fork+0x10/0x20
6250 11:34:07.323216 <6>[ 3.175406] tun: Universal TUN/TAP device driver, 1.6
6251 11:34:07.326909 <6>[ 3.181719] thunder_xcv, ver 1.0
6252 11:34:07.329897 <6>[ 3.185263] thunder_bgx, ver 1.0
6253 11:34:07.333279 <6>[ 3.188770] nicpf, ver 1.0
6254 11:34:07.344583 <6>[ 3.193153] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6255 11:34:07.348161 <6>[ 3.200642] hns3: Copyright (c) 2017 Huawei Corporation.
6256 11:34:07.351577 <6>[ 3.206240] hclge is initializing
6257 11:34:07.358114 <6>[ 3.209826] e1000: Intel(R) PRO/1000 Network Driver
6258 11:34:07.364543 <6>[ 3.214962] e1000: Copyright (c) 1999-2006 Intel Corporation.
6259 11:34:07.367528 <6>[ 3.220984] e1000e: Intel(R) PRO/1000 Network Driver
6260 11:34:07.374467 <6>[ 3.226205] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6261 11:34:07.381304 <6>[ 3.232399] igb: Intel(R) Gigabit Ethernet Network Driver
6262 11:34:07.388001 <6>[ 3.238055] igb: Copyright (c) 2007-2014 Intel Corporation.
6263 11:34:07.394382 <6>[ 3.243898] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6264 11:34:07.400996 <6>[ 3.250423] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6265 11:34:07.404580 <6>[ 3.256980] sky2: driver version 1.30
6266 11:34:07.411190 <6>[ 3.262246] usbcore: registered new device driver r8152-cfgselector
6267 11:34:07.417689 <6>[ 3.268791] usbcore: registered new interface driver r8152
6268 11:34:07.424266 <6>[ 3.274624] VFIO - User Level meta-driver version: 0.3
6269 11:34:07.430928 <6>[ 3.282446] mtu3 11201000.usb: uwk - reg:0x420, version:101
6270 11:34:07.437396 <4>[ 3.288324] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6271 11:34:07.444272 <6>[ 3.295603] mtu3 11201000.usb: dr_mode: 1, drd: auto
6272 11:34:07.451141 <6>[ 3.300829] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6273 11:34:07.454329 <6>[ 3.307016] mtu3 11201000.usb: usb3-drd: 0
6274 11:34:07.464286 <6>[ 3.312600] mtu3 11201000.usb: xHCI platform device register success...
6275 11:34:07.470829 <4>[ 3.321265] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6276 11:34:07.477225 <6>[ 3.329207] xhci-mtk 11200000.usb: xHCI Host Controller
6277 11:34:07.483862 <6>[ 3.334710] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6278 11:34:07.490414 <6>[ 3.342431] xhci-mtk 11200000.usb: USB3 root hub has no ports
6279 11:34:07.500065 <6>[ 3.348438] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6280 11:34:07.506845 <6>[ 3.357864] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6281 11:34:07.513643 <6>[ 3.363927] xhci-mtk 11200000.usb: xHCI Host Controller
6282 11:34:07.520201 <6>[ 3.369416] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6283 11:34:07.527017 <6>[ 3.377073] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6284 11:34:07.530364 <6>[ 3.383887] hub 1-0:1.0: USB hub found
6285 11:34:07.533649 <6>[ 3.387916] hub 1-0:1.0: 1 port detected
6286 11:34:07.544407 <6>[ 3.393253] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6287 11:34:07.547723 <6>[ 3.401871] hub 2-0:1.0: USB hub found
6288 11:34:07.554248 <3>[ 3.405898] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6289 11:34:07.561447 <6>[ 3.413756] usbcore: registered new interface driver usb-storage
6290 11:34:07.567854 <6>[ 3.420362] usbcore: registered new device driver onboard-usb-hub
6291 11:34:07.586044 <4>[ 3.435149] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6292 11:34:07.594862 <6>[ 3.447442] mt6397-rtc mt6358-rtc: registered as rtc0
6293 11:34:07.605231 <6>[ 3.452921] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-17T11:33:58 UTC (1721216038)
6294 11:34:07.608310 <6>[ 3.462804] i2c_dev: i2c /dev entries driver
6295 11:34:07.620257 <6>[ 3.469217] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6296 11:34:07.630504 <6>[ 3.477536] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6297 11:34:07.633506 <6>[ 3.486438] i2c 4-0058: Fixed dependency cycle(s) with /panel
6298 11:34:07.643089 <6>[ 3.492471] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6299 11:34:07.659548 <6>[ 3.511930] cpu cpu0: EM: created perf domain
6300 11:34:07.669866 <6>[ 3.517429] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6301 11:34:07.676644 <6>[ 3.528711] cpu cpu4: EM: created perf domain
6302 11:34:07.683493 <6>[ 3.535892] sdhci: Secure Digital Host Controller Interface driver
6303 11:34:07.690024 <6>[ 3.542348] sdhci: Copyright(c) Pierre Ossman
6304 11:34:07.697046 <6>[ 3.547756] Synopsys Designware Multimedia Card Interface Driver
6305 11:34:07.703550 <6>[ 3.548256] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6306 11:34:07.706542 <6>[ 3.554834] sdhci-pltfm: SDHCI platform and OF driver helper
6307 11:34:07.716215 <6>[ 3.568510] ledtrig-cpu: registered to indicate activity on CPUs
6308 11:34:07.723809 <6>[ 3.576293] usbcore: registered new interface driver usbhid
6309 11:34:07.727223 <6>[ 3.582155] usbhid: USB HID core driver
6310 11:34:07.737916 <6>[ 3.586435] spi_master spi2: will run message pump with realtime priority
6311 11:34:07.741807 <4>[ 3.586460] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6312 11:34:07.749486 <4>[ 3.600703] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6313 11:34:07.763059 <6>[ 3.606723] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6314 11:34:07.780488 <6>[ 3.622812] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6315 11:34:07.786758 <4>[ 3.634950] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6316 11:34:07.793689 <6>[ 3.643772] cros-ec-spi spi2.0: Chrome EC device registered
6317 11:34:07.800167 <4>[ 3.651002] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6318 11:34:07.814057 <4>[ 3.663154] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6319 11:34:07.820769 <4>[ 3.672070] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6320 11:34:07.833404 <6>[ 3.682663] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6321 11:34:07.855954 <6>[ 3.708563] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6322 11:34:07.863856 <6>[ 3.716055] mmc0: new HS400 MMC card at address 0001
6323 11:34:07.870127 <6>[ 3.722497] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6324 11:34:07.881366 <6>[ 3.733647] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6325 11:34:07.891011 <6>[ 3.739518] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6326 11:34:07.894585 <6>[ 3.742772] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6327 11:34:07.907601 <6>[ 3.752875] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6328 11:34:07.917339 <6>[ 3.752987] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6329 11:34:07.924437 <6>[ 3.754330] NET: Registered PF_PACKET protocol family
6330 11:34:07.933991 <6>[ 3.765806] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6331 11:34:07.941200 <6>[ 3.766419] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6332 11:34:07.944381 <6>[ 3.776519] 9pnet: Installing 9P2000 support
6333 11:34:07.950495 <6>[ 3.782432] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6334 11:34:07.953979 <5>[ 3.791689] Key type dns_resolver registered
6335 11:34:07.960902 <6>[ 3.807069] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6336 11:34:07.967632 <6>[ 3.808667] registered taskstats version 1
6337 11:34:07.970321 <5>[ 3.823626] Loading compiled-in X.509 certificates
6338 11:34:08.010777 <3>[ 3.859990] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6339 11:34:08.043811 <6>[ 3.889459] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6340 11:34:08.054630 <6>[ 3.903838] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6341 11:34:08.064623 <6>[ 3.912413] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6342 11:34:08.071334 <6>[ 3.921120] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6343 11:34:08.081507 <6>[ 3.929758] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6344 11:34:08.088312 <6>[ 3.938310] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6345 11:34:08.098442 <6>[ 3.946915] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6346 11:34:08.108012 <6>[ 3.955460] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6347 11:34:08.111299 <6>[ 3.962246] hub 1-1:1.0: USB hub found
6348 11:34:08.117949 <6>[ 3.964717] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6349 11:34:08.121102 <6>[ 3.968390] hub 1-1:1.0: 3 ports detected
6350 11:34:08.127981 <6>[ 3.975350] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6351 11:34:08.134418 <6>[ 3.985986] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6352 11:34:08.141275 <6>[ 3.993149] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6353 11:34:08.151286 <6>[ 4.000459] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6354 11:34:08.157670 <6>[ 4.008490] panfrost 13040000.gpu: clock rate = 511999970
6355 11:34:08.167773 <6>[ 4.014169] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6356 11:34:08.174667 <6>[ 4.024198] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6357 11:34:08.185119 <6>[ 4.032213] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6358 11:34:08.194816 <6>[ 4.040644] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6359 11:34:08.201393 <6>[ 4.052721] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6360 11:34:08.214625 <6>[ 4.063350] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6361 11:34:08.224233 <6>[ 4.072216] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6362 11:34:08.233979 <6>[ 4.081365] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6363 11:34:08.240536 <6>[ 4.090494] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6364 11:34:08.250777 <6>[ 4.099623] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6365 11:34:08.260941 <6>[ 4.108925] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6366 11:34:08.270714 <6>[ 4.118225] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6367 11:34:08.280409 <6>[ 4.127699] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6368 11:34:08.287438 <6>[ 4.137175] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6369 11:34:08.297319 <6>[ 4.146302] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6370 11:34:08.369593 <6>[ 4.218676] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6371 11:34:08.379468 <6>[ 4.227563] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6372 11:34:08.390459 <6>[ 4.239441] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6373 11:34:08.417855 <6>[ 4.267074] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6374 11:34:09.104874 <6>[ 4.463475] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6375 11:34:09.115136 <4>[ 4.608298] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6376 11:34:09.121149 <4>[ 4.608324] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6377 11:34:09.128178 <6>[ 4.656900] r8152 1-1.2:1.0 eth0: v1.12.13
6378 11:34:09.134500 <6>[ 4.735075] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6379 11:34:09.141513 <6>[ 4.937302] Console: switching to colour frame buffer device 170x48
6380 11:34:09.147930 <6>[ 4.997954] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6381 11:34:09.168410 <6>[ 5.014426] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6382 11:34:09.185378 <6>[ 5.031127] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6383 11:34:09.191849 <6>[ 5.043287] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6384 11:34:09.202669 <6>[ 5.051294] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6385 11:34:09.212352 <6>[ 5.057347] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6386 11:34:09.231286 <6>[ 5.077096] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6387 11:34:10.560987 <6>[ 6.413161] r8152 1-1.2:1.0 eth0: carrier on
6388 11:34:13.547373 <5>[ 6.439070] Sending DHCP requests .., OK
6389 11:34:13.554166 <6>[ 9.403554] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.13
6390 11:34:13.558063 <6>[ 9.411988] IP-Config: Complete:
6391 11:34:13.570516 <6>[ 9.415560] device=eth0, hwaddr=00:e0:4c:68:0b:b9, ipaddr=192.168.201.13, mask=255.255.255.0, gw=192.168.201.1
6392 11:34:13.581055 <6>[ 9.426460] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0, domain=lava-rack, nis-domain=(none)
6393 11:34:13.592576 <6>[ 9.440826] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6394 11:34:13.600852 <6>[ 9.440836] nameserver0=192.168.201.1
6395 11:34:13.608638 <6>[ 9.460684] clk: Disabling unused clocks
6396 11:34:13.613728 <6>[ 9.468672] ALSA device list:
6397 11:34:13.623276 <6>[ 9.474760] No soundcards found.
6398 11:34:13.632240 <6>[ 9.483814] Freeing unused kernel memory: 8512K
6399 11:34:13.639219 <6>[ 9.490872] Run /init as init process
6400 11:34:13.670118 <6>[ 9.521897] NET: Registered PF_INET6 protocol family
6401 11:34:13.677774 <6>[ 9.529485] Segment Routing with IPv6
6402 11:34:13.680976 <6>[ 9.534192] In-situ OAM (IOAM) with IPv6
6403 11:34:13.728003 <30>[ 9.553032] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6404 11:34:13.740529 <30>[ 9.591781] systemd[1]: Detected architecture arm64.
6405 11:34:13.741045
6406 11:34:13.746637 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6407 11:34:13.747141
6408 11:34:13.760133 <30>[ 9.611497] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6409 11:34:13.902621 <30>[ 9.750935] systemd[1]: Queued start job for default target graphical.target.
6410 11:34:13.949339 <30>[ 9.797677] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6411 11:34:13.959566 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6412 11:34:13.976036 <30>[ 9.824574] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6413 11:34:13.987344 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6414 11:34:14.007592 <30>[ 9.856482] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6415 11:34:14.020181 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6416 11:34:14.039626 <30>[ 9.888476] systemd[1]: Created slice user.slice - User and Session Slice.
6417 11:34:14.051356 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6418 11:34:14.074921 <30>[ 9.919711] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6419 11:34:14.088307 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6420 11:34:14.110516 <30>[ 9.955483] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6421 11:34:14.122588 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6422 11:34:14.148634 <30>[ 9.987325] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6423 11:34:14.168022 <30>[ 10.016650] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6424 11:34:14.179103 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6425 11:34:14.195339 <30>[ 10.043643] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6426 11:34:14.208720 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6427 11:34:14.227014 <30>[ 10.075352] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6428 11:34:14.241399 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6429 11:34:14.255801 <30>[ 10.107310] systemd[1]: Reached target paths.target - Path Units.
6430 11:34:14.270497 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6431 11:34:14.286702 <30>[ 10.135261] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6432 11:34:14.299135 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6433 11:34:14.315269 <30>[ 10.167216] systemd[1]: Reached target slices.target - Slice Units.
6434 11:34:14.330088 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6435 11:34:14.343854 <30>[ 10.195268] systemd[1]: Reached target swap.target - Swaps.
6436 11:34:14.354320 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6437 11:34:14.374532 <30>[ 10.223309] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6438 11:34:14.388313 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6439 11:34:14.407384 <30>[ 10.255767] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6440 11:34:14.421489 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6441 11:34:14.439761 <30>[ 10.288755] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6442 11:34:14.453866 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6443 11:34:14.471729 <30>[ 10.319975] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6444 11:34:14.485667 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6445 11:34:14.503490 <30>[ 10.351903] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6446 11:34:14.515991 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6447 11:34:14.535615 <30>[ 10.383929] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6448 11:34:14.548743 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6449 11:34:14.567283 <30>[ 10.415748] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6450 11:34:14.580060 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6451 11:34:14.622954 <30>[ 10.471546] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6452 11:34:14.636335 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6453 11:34:14.660881 <30>[ 10.509095] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6454 11:34:14.671541 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6455 11:34:14.694019 <30>[ 10.543104] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6456 11:34:14.705885 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6457 11:34:14.729465 <30>[ 10.571959] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6458 11:34:14.752753 <30>[ 10.601351] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6459 11:34:14.765354 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6460 11:34:14.807090 <30>[ 10.655849] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6461 11:34:14.820772 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6462 11:34:14.843529 <30>[ 10.692397] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6463 11:34:14.860166 Startin<6>[ 10.706588] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6464 11:34:14.863559 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6465 11:34:14.911327 <30>[ 10.760250] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6466 11:34:14.923511 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6467 11:34:14.947863 <30>[ 10.796852] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6468 11:34:14.960137 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6469 11:34:14.984334 <30>[ 10.833067] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6470 11:34:14.998112 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6471 11:34:15.047657 <30>[ 10.896375] systemd[1]: Starting systemd-journald.service - Journal Service...
6472 11:34:15.058762 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6473 11:34:15.078754 <30>[ 10.927461] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6474 11:34:15.090095 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6475 11:34:15.114783 <30>[ 10.959438] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6476 11:34:15.120964 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6477 11:34:15.142556 <30>[ 10.991214] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6478 11:34:15.155083 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6479 11:34:15.173525 <30>[ 11.022247] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6480 11:34:15.184612 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6481 11:34:15.206195 <30>[ 11.054805] systemd[1]: Started systemd-journald.service - Journal Service.
6482 11:34:15.216318 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6483 11:34:15.237025 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6484 11:34:15.255550 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6485 11:34:15.271429 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6486 11:34:15.291876 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6487 11:34:15.313653 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6488 11:34:15.331810 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6489 11:34:15.351866 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6490 11:34:15.371526 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6491 11:34:15.396095 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6492 11:34:15.415925 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6493 11:34:15.435845 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6494 11:34:15.459924 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6495 11:34:15.511652 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6496 11:34:15.537418 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6497 11:34:15.560052 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6498 11:34:15.566786 See 'systemctl status systemd-remount-fs.service' for details.
6499 11:34:15.590077 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6500 11:34:15.608745 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6501 11:34:15.628348 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6502 11:34:15.667935 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6503 11:34:15.681281 <46>[ 11.529548] systemd-journald[202]: Received client request to flush runtime journal.
6504 11:34:15.695350 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6505 11:34:15.720791 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6506 11:34:15.747938 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6507 11:34:15.770097 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6508 11:34:15.789162 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6509 11:34:15.851313 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6510 11:34:15.876699 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6511 11:34:15.896150 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6512 11:34:15.914742 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6513 11:34:15.951751 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6514 11:34:15.974688 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6515 11:34:15.996390 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6516 11:34:16.039995 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6517 11:34:16.062157 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6518 11:34:16.079520 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6519 11:34:16.104165 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6520 11:34:16.133004 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6521 11:34:16.150936 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6522 11:34:16.237175 <6>[ 12.085875] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6523 11:34:16.255690 <6>[ 12.101088] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6524 11:34:16.262561 <4>[ 12.113496] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6525 11:34:16.272177 <3>[ 12.123649] thermal_sys: Failed to find 'trips' node
6526 11:34:16.278156 <4>[ 12.127668] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6527 11:34:16.284627 <3>[ 12.129034] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6528 11:34:16.297127 <3>[ 12.144691] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6529 11:34:16.307172 <3>[ 12.146003] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6530 11:34:16.317269 <3>[ 12.150335] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6531 11:34:16.323503 <3>[ 12.150358] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6532 11:34:16.333717 <3>[ 12.150367] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6533 11:34:16.340118 <3>[ 12.155856] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6534 11:34:16.350258 <3>[ 12.159578] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6535 11:34:16.356803 <3>[ 12.159596] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6536 11:34:16.366404 <3>[ 12.159602] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6537 11:34:16.376708 <3>[ 12.159608] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6538 11:34:16.383464 <3>[ 12.159613] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6539 11:34:16.393064 <4>[ 12.164166] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6540 11:34:16.402873 <3>[ 12.172678] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6541 11:34:16.410117 <3>[ 12.172688] elan_i2c 2-0015: Error applying setting, reverse things back
6542 11:34:16.420226 <3>[ 12.175733] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6543 11:34:16.423373 <3>[ 12.183245] thermal_sys: Failed to find 'trips' node
6544 11:34:16.429587 <6>[ 12.210120] mc: Linux media interface: v0.10
6545 11:34:16.436407 <3>[ 12.215094] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6546 11:34:16.446492 <3>[ 12.215105] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6547 11:34:16.452929 <5>[ 12.229413] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6548 11:34:16.459831 <4>[ 12.232149] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6549 11:34:16.469355 <4>[ 12.234738] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6550 11:34:16.479807 <6>[ 12.245976] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6551 11:34:16.490173 <6>[ 12.248887] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6552 11:34:16.497022 <5>[ 12.252471] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6553 11:34:16.506782 <5>[ 12.252940] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6554 11:34:16.516589 <4>[ 12.253025] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6555 11:34:16.523643 <6>[ 12.253033] cfg80211: failed to load regulatory.db
6556 11:34:16.530086 <6>[ 12.257879] cs_system_cfg: CoreSight Configuration manager initialised
6557 11:34:16.539594 <6>[ 12.275561] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input6
6558 11:34:16.549813 <6>[ 12.277279] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6559 11:34:16.553013 <3>[ 12.286253] mtk-scp 10500000.scp: invalid resource
6560 11:34:16.559620 <6>[ 12.294514] videodev: Linux video capture interface: v2.00
6561 11:34:16.566529 <6>[ 12.294692] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6562 11:34:16.577056 <6>[ 12.295259] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6563 11:34:16.583856 <6>[ 12.296748] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6564 11:34:16.594870 <6>[ 12.298562] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6565 11:34:16.601609 <6>[ 12.302170] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6566 11:34:16.611503 <6>[ 12.302177] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6567 11:34:16.618009 <6>[ 12.302804] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6568 11:34:16.628594 <6>[ 12.304960] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6569 11:34:16.634840 <6>[ 12.310049] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6570 11:34:16.648620 <3>[ 12.320771] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6571 11:34:16.655578 <6>[ 12.325421] remoteproc remoteproc0: scp is available
6572 11:34:16.665061 <4>[ 12.325634] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6573 11:34:16.668172 <6>[ 12.325642] remoteproc remoteproc0: powering up scp
6574 11:34:16.678965 <4>[ 12.325659] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6575 11:34:16.685392 <3>[ 12.325662] remoteproc remoteproc0: request_firmware failed: -2
6576 11:34:16.689347 <6>[ 12.341849] Bluetooth: Core ver 2.22
6577 11:34:16.696958 <6>[ 12.364638] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6578 11:34:16.704364 <6>[ 12.365340] NET: Registered PF_BLUETOOTH protocol family
6579 11:34:16.711098 <6>[ 12.374530] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6580 11:34:16.717565 <6>[ 12.379129] Bluetooth: HCI device and connection manager initialized
6581 11:34:16.724373 <6>[ 12.386059] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6582 11:34:16.734048 <6>[ 12.386125] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6583 11:34:16.747628 <6>[ 12.392176] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6584 11:34:16.754009 <6>[ 12.392426] usbcore: registered new interface driver uvcvideo
6585 11:34:16.762467 <6>[ 12.395248] Bluetooth: HCI socket layer initialized
6586 11:34:16.775777 <6>[ 12.407902] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video3
6587 11:34:16.779464 <6>[ 12.411201] Bluetooth: L2CAP socket layer initialized
6588 11:34:16.789399 <6>[ 12.416564] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6589 11:34:16.797054 <6>[ 12.416571] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6590 11:34:16.810685 <6>[ 12.416666] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6591 11:34:16.818813 <6>[ 12.564512] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6592 11:34:16.822186 <6>[ 12.568054] Bluetooth: SCO socket layer initialized
6593 11:34:16.832319 <4>[ 12.592978] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6594 11:34:16.835204 <4>[ 12.592978] Fallback method does not support PEC.
6595 11:34:16.842587 <6>[ 12.623973] Bluetooth: HCI UART driver ver 2.3
6596 11:34:16.850508 <3>[ 12.633607] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6597 11:34:16.854385 <6>[ 12.636479] Bluetooth: HCI UART protocol H4 registered
6598 11:34:16.861614 <6>[ 12.636524] Bluetooth: HCI UART protocol LL registered
6599 11:34:16.872407 <3>[ 12.636723] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6600 11:34:16.878795 <3>[ 12.637375] debugfs: File 'Playback' in directory 'dapm' already present!
6601 11:34:16.885327 <3>[ 12.637380] debugfs: File 'Capture' in directory 'dapm' already present!
6602 11:34:16.899605 <6>[ 12.638712] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input7
6603 11:34:16.906199 <3>[ 12.640142] thermal_sys: Failed to find 'trips' node
6604 11:34:16.912998 <3>[ 12.640146] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6605 11:34:16.922825 <3>[ 12.640152] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6606 11:34:16.929559 <4>[ 12.640156] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6607 11:34:16.939293 <3>[ 12.652573] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6608 11:34:16.946025 <6>[ 12.654883] Bluetooth: HCI UART protocol Three-wire (H5) registered
6609 11:34:16.955988 <3>[ 12.674912] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6610 11:34:16.962634 <6>[ 12.679912] Bluetooth: HCI UART protocol Broadcom registered
6611 11:34:16.972390 <3>[ 12.693541] power_supply sbs-12-000b: driver failed to report `capacity_level' property: -6
6612 11:34:16.976015 <6>[ 12.698011] Bluetooth: HCI UART protocol QCA registered
6613 11:34:16.982779 <6>[ 12.698553] Bluetooth: hci0: setting up ROME/QCA6390
6614 11:34:16.992782 <3>[ 12.698904] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6615 11:34:16.999501 <3>[ 12.704213] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6616 11:34:17.022864 <46>[ 12.704550] systemd-journald[202]: Data hash table of /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal has a fill level at 75.2 (1539 of 2047 items, 524288 file size, 340 bytes per hash table item), suggesting rotation.
6617 11:34:17.039397 <46>[ 12.704558] systemd-journald[202]: /var/log/journal/c3f909ee3e324895ab90ff2613af9260/system.journal: Journal header limits reached or header out-of-date, rotating.
6618 11:34:17.045922 <3>[ 12.711627] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6619 11:34:17.052670 <6>[ 12.712396] Bluetooth: HCI UART protocol Marvell registered
6620 11:34:17.064039 <3>[ 12.723274] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6621 11:34:17.067108 <3>[ 12.910019] Bluetooth: hci0: Frame reassembly failed (-84)
6622 11:34:17.077283 <6>[ 12.910020] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6623 11:34:17.087566 <3>[ 12.918214] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6624 11:34:17.133541 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slic<4>[ 12.982818] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6625 11:34:17.140320 <3>[ 12.985870] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6626 11:34:17.143871 e /system/systemd-backlight.
6627 11:34:17.151179 <4>[ 12.999856] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6628 11:34:17.166711 <4>[ 13.015024] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6629 11:34:17.175237 [[0;32m OK [<4>[ 13.026777] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6630 11:34:17.182965 0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6631 11:34:17.223896 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6632 11:34:17.259206 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6633 11:34:17.305693 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6634 11:34:17.323788 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6635 11:34:17.343548 [[0;32m OK [0m] Reached targ<6>[ 13.193914] Bluetooth: hci0: QCA Product ID :0x00000008
6636 11:34:17.350639 et [0;1;39msysinit.target[0m - System Initialization.
6637 11:34:17.353773 <6>[ 13.206037] Bluetooth: hci0: QCA SOC Version :0x00000044
6638 11:34:17.364625 <6>[ 13.216909] Bluetooth: hci0: QCA ROM Version :0x00000302
6639 11:34:17.375537 <6>[ 13.227706] Bluetooth: hci0: QCA Patch Version:0x00000111
6640 11:34:17.388912 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard <6>[ 13.238402] Bluetooth: hci0: QCA controller version 0x00440302
6641 11:34:17.392269 unused blocks once a week.
6642 11:34:17.398590 <6>[ 13.249190] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6643 11:34:17.410467 <4>[ 13.259241] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6644 11:34:17.422280 <3>[ 13.271393] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6645 11:34:17.432616 [[0;32m OK [0m] Started [0;<3>[ 13.282095] Bluetooth: hci0: QCA Failed to download patch (-2)
6646 11:34:17.435535 1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6647 11:34:17.455659 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6648 11:34:17.472624 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6649 11:34:17.491779 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6650 11:34:17.508079 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6651 11:34:17.523833 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6652 11:34:17.573910 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6653 11:34:17.603406 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6654 11:34:17.625117 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6655 11:34:17.645439 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6656 11:34:17.676610 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6657 11:34:17.717233 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6658 11:34:17.738943 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6659 11:34:17.756889 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6660 11:34:17.793804 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6661 11:34:17.813910 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6662 11:34:17.833507 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6663 11:34:17.855975 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6664 11:34:17.874209 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6665 11:34:17.918333 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6666 11:34:17.952462 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6667 11:34:17.992941
6668 11:34:17.996433 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6669 11:34:17.996591
6670 11:34:17.999500 debian-bookworm-arm64 login: root (automatic login)
6671 11:34:17.999598
6672 11:34:18.020607 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Wed Jul 17 11:18:13 UTC 2024 aarch64
6673 11:34:18.020690
6674 11:34:18.027398 The programs included with the Debian GNU/Linux system are free software;
6675 11:34:18.034042 the exact distribution terms for each program are described in the
6676 11:34:18.036995 individual files in /usr/share/doc/*/copyright.
6677 11:34:18.037078
6678 11:34:18.043657 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6679 11:34:18.046878 permitted by applicable law.
6680 11:34:18.047294 Matched prompt #10: / #
6682 11:34:18.047535 Setting prompt string to ['/ #']
6683 11:34:18.047660 end: 2.2.5.1 login-action (duration 00:00:14) [common]
6685 11:34:18.047906 end: 2.2.5 auto-login-action (duration 00:00:15) [common]
6686 11:34:18.048023 start: 2.2.6 expect-shell-connection (timeout 00:03:27) [common]
6687 11:34:18.048089 Setting prompt string to ['/ #']
6688 11:34:18.048149 Forcing a shell prompt, looking for ['/ #']
6689 11:34:18.048210 Sending line: ''
6691 11:34:18.098529 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6692 11:34:18.098604 Waiting using forced prompt support (timeout 00:02:30)
6693 11:34:18.103402 / #
6694 11:34:18.103676 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6695 11:34:18.103773 start: 2.2.7 export-device-env (timeout 00:03:27) [common]
6696 11:34:18.103868 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6697 11:34:18.103954 end: 2.2 depthcharge-retry (duration 00:01:33) [common]
6698 11:34:18.104045 end: 2 depthcharge-action (duration 00:01:33) [common]
6699 11:34:18.104134 start: 3 lava-test-retry (timeout 00:07:57) [common]
6700 11:34:18.104223 start: 3.1 lava-test-shell (timeout 00:07:57) [common]
6701 11:34:18.104295 Using namespace: common
6702 11:34:18.104365 Sending line: '#'
6704 11:34:18.204809 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6705 11:34:18.210261 / # #
6706 11:34:18.210554 Using /lava-14864581
6707 11:34:18.210631 Sending line: 'export SHELL=/bin/sh'
6709 11:34:18.316320 / # export SHELL=/bin/sh
6710 11:34:18.316576 Sending line: '. /lava-14864581/environment'
6712 11:34:18.422524 / # . /lava-14864581/environment
6713 11:34:18.422823 Sending line: '/lava-14864581/bin/lava-test-runner /lava-14864581/0'
6715 11:34:18.523298 Test shell timeout: 10s (minimum of the action and connection timeout)
6716 11:34:18.528519 / # /lava-14864581/bin/lava-test-runner /lava-14864581/0
6717 11:34:18.558377 + export TESTRUN_ID=0_igt-gpu-panfrost
6718 11:34:18.564223 + cd /lava<8>[ 14.413168] <LAVA_SIGNAL_STARTRUN 0_igt-gpu-panfrost 14864581_1.5.2.3.1>
6719 11:34:18.564510 Received signal: <STARTRUN> 0_igt-gpu-panfrost 14864581_1.5.2.3.1
6720 11:34:18.564596 Starting test lava.0_igt-gpu-panfrost (14864581_1.5.2.3.1)
6721 11:34:18.564681 Skipping test definition patterns.
6722 11:34:18.567950 -14864581/0/tests/0_igt-gpu-panfrost
6723 11:34:18.568022 + cat uuid
6724 11:34:18.571311 + UUID=14864581_1.5.2.3.1
6725 11:34:18.571389 + set +x
6726 11:34:18.581187 + IGT_FORCE_DRIVER=panfrost /usr/bin/igt-parser.sh panfrost_gem_new panfrost_get_param panfrost_prime panfrost_submit
6727 11:34:18.591917 <8>[ 14.443964] <LAVA_SIGNAL_TESTSET START panfrost_gem_new>
6728 11:34:18.592161 Received signal: <TESTSET> START panfrost_gem_new
6729 11:34:18.592233 Starting test_set panfrost_gem_new
6730 11:34:18.614892 <6>[ 14.467170] Console: switching to colour dummy device 80x25
6731 11:34:18.621610 <14>[ 14.473383] [IGT] panfrost_gem_new: executing
6732 11:34:18.628721 IGT-Version: 1.2<14>[ 14.478626] [IGT] panfrost_gem_new: starting subtest gem-new-4096
6733 11:34:18.638305 8-ga44ebfe (aarc<14>[ 14.486763] [IGT] panfrost_gem_new: finished subtest gem-new-4096, SUCCESS
6734 11:34:18.645152 h64) (Linux: 6.1<14>[ 14.495730] [IGT] panfrost_gem_new: exiting, ret=0
6735 11:34:18.645239 .96-cip24 aarch64)
6736 11:34:18.651611 Using IGT_SRANDOM=1721216049 for randomisation
6737 11:34:18.654969 Opened device: /dev/dri/card0
6738 11:34:18.655054 Starting subtest: gem-new-4096
6739 11:34:18.661467 [1mSubtest gem-new-4096: SUCCESS (0.000s)[0m
6740 11:34:18.702773 <6>[ 14.535691] Console: switching to colour frame buffer device 170x48
6741 11:34:18.720681 <8>[ 14.569160] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-4096 RESULT=pass>
6742 11:34:18.720950 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-4096 RESULT=pass
6744 11:34:18.741628 <6>[ 14.593789] Console: switching to colour dummy device 80x25
6745 11:34:18.748326 <14>[ 14.599916] [IGT] panfrost_gem_new: executing
6746 11:34:18.755109 IGT-Version: 1.2<14>[ 14.604937] [IGT] panfrost_gem_new: starting subtest gem-new-0
6747 11:34:18.764874 8-ga44ebfe (aarc<14>[ 14.612471] [IGT] panfrost_gem_new: finished subtest gem-new-0, SUCCESS
6748 11:34:18.771553 h64) (Linux: 6.1<14>[ 14.621167] [IGT] panfrost_gem_new: exiting, ret=0
6749 11:34:18.772044 .96-cip24 aarch64)
6750 11:34:18.775105 Using IGT_SRANDOM=1721216049 for randomisation
6751 11:34:18.778549 Opened device: /dev/dri/card0
6752 11:34:18.781875 Starting subtest: gem-new-0
6753 11:34:18.784975 [1mSubtest gem-new-0: SUCCESS (0.000s)[0m
6754 11:34:18.816936 <6>[ 14.651828] Console: switching to colour frame buffer device 170x48
6755 11:34:18.831625 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-0 RESULT=pass
6757 11:34:18.834332 <8>[ 14.683009] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-0 RESULT=pass>
6758 11:34:18.855281 <6>[ 14.707345] Console: switching to colour dummy device 80x25
6759 11:34:18.862076 <14>[ 14.713824] [IGT] panfrost_gem_new: executing
6760 11:34:18.868721 IGT-Version: 1.2<14>[ 14.719081] [IGT] panfrost_gem_new: starting subtest gem-new-zeroed
6761 11:34:18.882070 8-ga44ebfe (aarch64) (Linux: 6.1<14>[ 14.728715] [IGT] panfrost_gem_new: finished subtest gem-new-zeroed, SUCCESS
6762 11:34:18.885212 <14>[ 14.737470] [IGT] panfrost_gem_new: exiting, ret=0
6763 11:34:18.888778 .96-cip24 aarch64)
6764 11:34:18.891995 Using IGT_SRANDOM=1721216049 for randomisation
6765 11:34:18.895283 Opened device: /dev/dri/card0
6766 11:34:18.898892 Starting subtest: gem-new-zeroed
6767 11:34:18.901886 [1mSubtest gem-new-zeroed: SUCCESS (0.001s)[0m
6768 11:34:18.933165 <6>[ 14.768284] Console: switching to colour frame buffer device 170x48
6769 11:34:18.950904 <8>[ 14.799481] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-new-zeroed RESULT=pass>
6770 11:34:18.951677 Received signal: <TESTCASE> TEST_CASE_ID=gem-new-zeroed RESULT=pass
6772 11:34:18.958083 <8>[ 14.809675] <LAVA_SIGNAL_TESTSET STOP>
6773 11:34:18.958708 Received signal: <TESTSET> STOP
6774 11:34:18.959036 Closing test_set panfrost_gem_new
6775 11:34:18.992382 <8>[ 14.844695] <LAVA_SIGNAL_TESTSET START panfrost_get_param>
6776 11:34:18.992705 Received signal: <TESTSET> START panfrost_get_param
6777 11:34:18.992779 Starting test_set panfrost_get_param
6778 11:34:19.026523 <6>[ 14.878683] Console: switching to colour dummy device 80x25
6779 11:34:19.033642 <14>[ 14.884667] [IGT] panfrost_get_param: executing
6780 11:34:19.039966 IGT-Version: 1.2<14>[ 14.890510] [IGT] panfrost_get_param: starting subtest base-params
6781 11:34:19.050305 8-ga44ebfe (aarc<14>[ 14.898113] [IGT] panfrost_get_param: finished subtest base-params, SUCCESS
6782 11:34:19.056725 h64) (Linux: 6.1<14>[ 14.907068] [IGT] panfrost_get_param: exiting, ret=0
6783 11:34:19.057089 .96-cip24 aarch64)
6784 11:34:19.063570 Using IGT_SRANDOM=1721216049 for randomisation
6785 11:34:19.067132 Opened device: /dev/dri/card0
6786 11:34:19.067743 Starting subtest: base-params
6787 11:34:19.073206 [1mSubtest base-params: SUCCESS (0.000s)[0m
6788 11:34:19.099791 <6>[ 14.934735] Console: switching to colour frame buffer device 170x48
6789 11:34:19.117790 <8>[ 14.966457] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=base-params RESULT=pass>
6790 11:34:19.118436 Received signal: <TESTCASE> TEST_CASE_ID=base-params RESULT=pass
6792 11:34:19.138537 <6>[ 14.990275] Console: switching to colour dummy device 80x25
6793 11:34:19.145070 <14>[ 14.996213] [IGT] panfrost_get_param: executing
6794 11:34:19.152340 IGT-Version: 1.2<14>[ 15.001518] [IGT] panfrost_get_param: starting subtest get-bad-param
6795 11:34:19.162035 8-ga44ebfe (aarc<14>[ 15.009677] [IGT] panfrost_get_param: finished subtest get-bad-param, SUCCESS
6796 11:34:19.168654 h64) (Linux: 6.1<14>[ 15.018821] [IGT] panfrost_get_param: exiting, ret=0
6797 11:34:19.172150 .96-cip24 aarch64)
6798 11:34:19.175110 Using IGT_SRANDOM=1721216050 for randomisation
6799 11:34:19.178716 Opened device: /dev/dri/card0
6800 11:34:19.181927 Starting subtest: get-bad-param
6801 11:34:19.184804 [1mSubtest get-bad-param: SUCCESS (0.000s)[0m
6802 11:34:19.215958 <6>[ 15.051020] Console: switching to colour frame buffer device 170x48
6803 11:34:19.233863 <8>[ 15.082220] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-param RESULT=pass>
6804 11:34:19.234910 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-param RESULT=pass
6806 11:34:19.266061 <6>[ 15.117705] Console: switching to colour dummy device 80x25
6807 11:34:19.272838 <14>[ 15.123663] [IGT] panfrost_get_param: executing
6808 11:34:19.279095 IGT-Version: 1.2<14>[ 15.129120] [IGT] panfrost_get_param: starting subtest get-bad-padding
6809 11:34:19.289698 8-ga44ebfe (aarc<14>[ 15.137465] [IGT] panfrost_get_param: finished subtest get-bad-padding, SUCCESS
6810 11:34:19.296035 h64) (Linux: 6.1<14>[ 15.146970] [IGT] panfrost_get_param: exiting, ret=0
6811 11:34:19.299115 .96-cip24 aarch64)
6812 11:34:19.302557 Using IGT_SRANDOM=1721216050 for randomisation
6813 11:34:19.306055 Opened device: /dev/dri/card0
6814 11:34:19.309259 Starting subtest: get-bad-padding
6815 11:34:19.312734 [1mSubtest get-bad-padding: SUCCESS (0.000s)[0m
6816 11:34:19.351758 <6>[ 15.183832] Console: switching to colour frame buffer device 170x48
6817 11:34:19.368320 <8>[ 15.216539] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=get-bad-padding RESULT=pass>
6818 11:34:19.369032 Received signal: <TESTCASE> TEST_CASE_ID=get-bad-padding RESULT=pass
6820 11:34:19.371573 <8>[ 15.225681] <LAVA_SIGNAL_TESTSET STOP>
6821 11:34:19.372186 Received signal: <TESTSET> STOP
6822 11:34:19.372555 Closing test_set panfrost_get_param
6823 11:34:19.411764 <8>[ 15.263200] <LAVA_SIGNAL_TESTSET START panfrost_prime>
6824 11:34:19.412501 Received signal: <TESTSET> START panfrost_prime
6825 11:34:19.412828 Starting test_set panfrost_prime
6826 11:34:19.444954 <6>[ 15.296136] Console: switching to colour dummy device 80x25
6827 11:34:19.451277 <14>[ 15.302127] [IGT] panfrost_prime: executing
6828 11:34:19.458033 IGT-Version: 1.28-ga44ebfe (aarch64) (Linux: 6.1.96-cip24 aarch64)
6829 11:34:19.461244 Using IGT_SRANDOM=1721216050 for randomisation
6830 11:34:19.464344 Opened device: /dev/dri/card0
6831 11:34:19.480137 <14>[ 15.331824] [IGT] panfrost_prime: starting subtest gem-prime-import
6832 11:34:19.483255 Starting subtest: gem-prime-import
6833 11:34:19.499991 (panfrost_prime:353) CRITICAL: Test assertion failure function igt_has_dumb, file ../tests/panfrost_prime.c:<14>[ 15.350056] [IGT] panfrost_prime: finished subtest gem-prime-import, FAIL
6834 11:34:19.503489 44:
6835 11:34:19.506913 (panfrost_p<14>[ 15.358696] [IGT] panfrost_prime: exiting, ret=98
6836 11:34:19.516383 rime:353) CRITICAL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP
6837 11:34:19.523297 (panfrost_prime:353) CRITICAL: Last errno: 9, Bad file descriptor
6838 11:34:19.523693 Stack trace:
6839 11:34:19.526832 #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6840 11:34:19.530189 #1 [<unknown>+0xe1731358]
6841 11:34:19.533252 #2 [<unknown>+0xe1730f2c]
6842 11:34:19.536601 #3 [__libc_init_first+0x80]
6843 11:34:19.536996 #4 [__libc_start_main+0x98]
6844 11:34:19.539795 #5 [<unknown>+0xe1730f70]
6845 11:34:19.543214 Subtest gem-prime-import failed.
6846 11:34:19.546735 **** DEBUG ****
6847 11:34:19.556269 (panfrost_prime:353) CRITICAL: Test assertion failure function igt_has_dumb, file ../tests/panfrost_prime.c:44:
6848 11:34:19.563129 (panfrost_prime:353) CRITICAL: Failed assertion: ret == 0 || errno == EINVAL || errno == EOPNOTSUPP
6849 11:34:19.569974 (panfr<6>[ 15.403565] Console: switching to colour frame buffer device 170x48
6850 11:34:19.576401 ost_prime:353) CRITICAL: Last errno: 9, Bad file descriptor
6851 11:34:19.580082 (panfrost_prime:353) igt_core-INFO: Stack trace:
6852 11:34:19.586427 (<8>[ 15.436620] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=gem-prime-import RESULT=fail>
6853 11:34:19.587068 Received signal: <TESTCASE> TEST_CASE_ID=gem-prime-import RESULT=fail
6855 11:34:19.593175 Received signal: <TESTSET> STOP
6856 11:34:19.593552 Closing test_set panfrost_prime
6857 11:34:19.596902 panfrost_prime:353) igt_core-INF<8>[ 15.446959] <LAVA_SIGNAL_TESTSET STOP>
6858 11:34:19.599728 O: #0 ../lib/igt_core.c:1989 __igt_fail_assert()
6859 11:34:19.606286 (panfrost_prime:353) igt_core-INFO: #1 [<unknown>+0xe1731358]
6860 11:34:19.609941 (panfrost_prime:353) igt_core-INFO: #2 [<unknown>+0xe1730f2c]
6861 11:34:19.616499 (panfrost_prime:353) igt_core-INFO: #3 [__libc_init_first+0x80]
6862 11:34:19.622825 (panfrost_prime:353) igt_core-INFO: #4 [__libc_start_main+0x98]
6863 11:34:19.630088 (panfrost_prime:353) igt_core-INFO: #5 [<unknown>+0xe1730f70]
6864 11:34:19.632939 ***<8>[ 15.484722] <LAVA_SIGNAL_TESTSET START panfrost_submit>
6865 11:34:19.633566 Received signal: <TESTSET> START panfrost_submit
6866 11:34:19.633903 Starting test_set panfrost_submit
6867 11:34:19.636337 * END ****
6868 11:34:19.639580 [1mSubtest gem-prime-import: FAIL (0.011s)[0m
6869 11:34:19.649844 (panfrost_prime:353) drmtest-WARNING: Don't attempt to close standard/invalid file descriptor: -1
6870 11:34:19.667036 <6>[ 15.518782] Console: switching to colour dummy device 80x25
6871 11:34:19.673548 <14>[ 15.524806] [IGT] panfrost_submit: executing
6872 11:34:19.680554 IGT-Version: 1.2<14>[ 15.530194] [IGT] panfrost_submit: starting subtest pan-submit
6873 11:34:19.690558 8-ga44ebfe (aarc<14>[ 15.538390] [IGT] panfrost_submit: finished subtest pan-submit, SUCCESS
6874 11:34:19.697036 h64) (Linux: 6.1<14>[ 15.545808] [IGT] panfrost_submit: exiting, ret=0
6875 11:34:19.697427 .96-cip24 aarch64)
6876 11:34:19.700408 Using IGT_SRANDOM=1721216050 for randomisation
6877 11:34:19.703547 Opened device: /dev/dri/card0
6878 11:34:19.706789 Starting subtest: pan-submit
6879 11:34:19.710251 [1mSubtest pan-submit: SUCCESS (0.001s)[0m
6880 11:34:19.750893 <6>[ 15.583170] Console: switching to colour frame buffer device 170x48
6881 11:34:19.764472 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit RESULT=pass
6883 11:34:19.767340 <8>[ 15.615881] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit RESULT=pass>
6884 11:34:19.787975 <6>[ 15.639478] Console: switching to colour dummy device 80x25
6885 11:34:19.794713 <14>[ 15.645782] [IGT] panfrost_submit: executing
6886 11:34:19.801330 IGT-Version: 1.2<14>[ 15.651126] [IGT] panfrost_submit: starting subtest pan-submit-error-no-jc
6887 11:34:19.810936 8-ga44ebfe (aarc<14>[ 15.659811] [IGT] panfrost_submit: finished subtest pan-submit-error-no-jc, SUCCESS
6888 11:34:19.817852 h64) (Linux: 6.1<14>[ 15.669528] [IGT] panfrost_submit: exiting, ret=0
6889 11:34:19.821304 .96-cip24 aarch64)
6890 11:34:19.824527 Using IGT_SRANDOM=1721216050 for randomisation
6891 11:34:19.827769 Opened device: /dev/dri/card0
6892 11:34:19.831299 Starting subtest: pan-submit-error-no-jc
6893 11:34:19.837556 [1mSubtest pan-submit-error-no-jc: SUCCESS (0.000s)[0m
6894 11:34:19.864408 <6>[ 15.699359] Console: switching to colour frame buffer device 170x48
6895 11:34:19.882771 <8>[ 15.731004] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass>
6896 11:34:19.883414 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-no-jc RESULT=pass
6898 11:34:19.904087 <6>[ 15.755470] Console: switching to colour dummy device 80x25
6899 11:34:19.910313 <14>[ 15.761399] [IGT] panfrost_submit: executing
6900 11:34:19.920316 IGT-Version: 1.2<14>[ 15.766408] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-in-syncs
6901 11:34:19.930237 8-ga44ebfe (aarc<14>[ 15.775809] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-in-syncs, SUCCESS
6902 11:34:19.936974 h64) (Linux: 6.1<14>[ 15.785993] [IGT] panfrost_submit: exiting, ret=0
6903 11:34:19.937371 .96-cip24 aarch64)
6904 11:34:19.940180 Using IGT_SRANDOM=1721216050 for randomisation
6905 11:34:19.943864 Opened device: /dev/dri/card0
6906 11:34:19.949930 Starting subtest: pan-submit-error-bad-in-syncs
6907 11:34:19.953571 [1mSubtest pan-submit-error-bad-in-syncs: SUCCESS (0.000s)[0m
6908 11:34:19.980381 <6>[ 15.815421] Console: switching to colour frame buffer device 170x48
6909 11:34:19.998287 <8>[ 15.846749] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass>
6910 11:34:19.998922 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-in-syncs RESULT=pass
6912 11:34:20.031489 <6>[ 15.883321] Console: switching to colour dummy device 80x25
6913 11:34:20.038492 <14>[ 15.889283] [IGT] panfrost_submit: executing
6914 11:34:20.048603 IGT-Version: 1.2<14>[ 15.894706] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-bo-handles
6915 11:34:20.058189 8-ga44ebfe (aarc<14>[ 15.904356] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-bo-handles, SUCCESS
6916 11:34:20.065414 h64) (Linux: 6.1<14>[ 15.914522] [IGT] panfrost_submit: exiting, ret=0
6917 11:34:20.065888 .96-cip24 aarch64)
6918 11:34:20.068631 Using IGT_SRANDOM=1721216050 for randomisation
6919 11:34:20.071925 Opened device: /dev/dri/card0
6920 11:34:20.078122 Starting subtest: pan-submit-error-bad-bo-handles
6921 11:34:20.081557 [1mSubtest pan-submit-error-bad-bo-handles: SUCCESS (0.000s)[0m
6922 11:34:20.116406 <6>[ 15.948643] Console: switching to colour frame buffer device 170x48
6923 11:34:20.134246 <8>[ 15.982762] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass>
6924 11:34:20.134878 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-bo-handles RESULT=pass
6926 11:34:20.165547 <6>[ 16.017174] Console: switching to colour dummy device 80x25
6927 11:34:20.172000 <14>[ 16.023137] [IGT] panfrost_submit: executing
6928 11:34:20.181908 IGT-Version: 1.2<14>[ 16.028665] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-requirements
6929 11:34:20.192204 8-ga44ebfe (aarc<14>[ 16.038608] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-requirements, SUCCESS
6930 11:34:20.199320 h64) (Linux: 6.1<14>[ 16.049016] [IGT] panfrost_submit: exiting, ret=0
6931 11:34:20.199790 .96-cip24 aarch64)
6932 11:34:20.205778 Using IGT_SRANDOM=1721216051 for randomisation
6933 11:34:20.206253 Opened device: /dev/dri/card0
6934 11:34:20.212309 Starting subtest: pan-submit-error-bad-requirements
6935 11:34:20.218747 [1mSubtest pan-submit-error-bad-requirements: SUCCESS (0.000s)[0m
6936 11:34:20.249462 <6>[ 16.081671] Console: switching to colour frame buffer device 170x48
6937 11:34:20.266280 <8>[ 16.114421] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass>
6938 11:34:20.267442 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-requirements RESULT=pass
6940 11:34:20.288276 <6>[ 16.140023] Console: switching to colour dummy device 80x25
6941 11:34:20.295227 <14>[ 16.146023] [IGT] panfrost_submit: executing
6942 11:34:20.304877 IGT-Version: 1.2<14>[ 16.150968] [IGT] panfrost_submit: starting subtest pan-submit-error-bad-out-sync
6943 11:34:20.314719 8-ga44ebfe (aarc<14>[ 16.160371] [IGT] panfrost_submit: finished subtest pan-submit-error-bad-out-sync, SUCCESS
6944 11:34:20.321704 h64) (Linux: 6.1<14>[ 16.170610] [IGT] panfrost_submit: exiting, ret=0
6945 11:34:20.322084 .96-cip24 aarch64)
6946 11:34:20.324779 Using IGT_SRANDOM=1721216051 for randomisation
6947 11:34:20.328411 Opened device: /dev/dri/card0
6948 11:34:20.334992 Starting subtest: pan-submit-error-bad-out-sync
6949 11:34:20.338392 [1mSubtest pan-submit-error-bad-out-sync: SUCCESS (0.000s)[0m
6950 11:34:20.362921 <6>[ 16.197735] Console: switching to colour frame buffer device 170x48
6951 11:34:20.381176 <8>[ 16.229507] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass>
6952 11:34:20.381810 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-error-bad-out-sync RESULT=pass
6954 11:34:20.404321 <6>[ 16.255840] Console: switching to colour dummy device 80x25
6955 11:34:20.410982 <14>[ 16.262052] [IGT] panfrost_submit: executing
6956 11:34:20.417374 IGT-Version: 1.2<14>[ 16.267200] [IGT] panfrost_submit: starting subtest pan-reset
6957 11:34:20.424014 8-ga44ebfe (aarch64) (Linux: 6.1.96-cip24 aarch64)
6958 11:34:20.427221 Using IGT_SRANDOM=1721216051 for randomisation
6959 11:34:20.430802 Opened device: /dev/dri/card0
6960 11:34:20.431185 Starting subtest: pan-reset
6961 11:34:20.940430 <3>[ 16.785695] panfrost 13040000.gpu: gpu sched timeout, js=1, config=0x7300, status=0x8, head=0x2000040, tail=0x2000000, sched_job=0000000075741e95
6962 11:34:20.954990 <14>[ 16.803103] [IGT] panfrost_submit: finished subtest pan-reset, SUCCESS
6963 11:34:20.961378 [1mSubtest pan-<14>[ 16.810129] [IGT] panfrost_submit: exiting, ret=0
6964 11:34:20.961765 reset: SUCCESS (0.528s)[0m
6965 11:34:21.016651 <6>[ 16.850962] Console: switching to colour frame buffer device 170x48
6966 11:34:21.033589 Received signal: <TESTCASE> TEST_CASE_ID=pan-reset RESULT=pass
6968 11:34:21.036436 <8>[ 16.885172] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-reset RESULT=pass>
6969 11:34:21.057851 <6>[ 16.909491] Console: switching to colour dummy device 80x25
6970 11:34:21.064430 <14>[ 16.915704] [IGT] panfrost_submit: executing
6971 11:34:21.071094 IGT-Version: 1.2<14>[ 16.920664] [IGT] panfrost_submit: starting subtest pan-submit-and-close
6972 11:34:21.081016 8-ga44ebfe (aarc<14>[ 16.929449] [IGT] panfrost_submit: finished subtest pan-submit-and-close, SUCCESS
6973 11:34:21.087575 h64) (Linux: 6.1<14>[ 16.938246] [IGT] panfrost_submit: exiting, ret=0
6974 11:34:21.091274 .96-cip24 aarch64)
6975 11:34:21.094328 Using IGT_SRANDOM=1721216051 for randomisation
6976 11:34:21.097727 Opened device: /dev/dri/card0
6977 11:34:21.100939 Starting subtest: pan-submit-and-close
6978 11:34:21.104402 [1mSubtest pan-submit-and-close: SUCCESS (0.000s)[0m
6979 11:34:21.144563 <6>[ 16.978904] Console: switching to colour frame buffer device 170x48
6980 11:34:21.162339 <8>[ 17.010778] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-submit-and-close RESULT=pass>
6981 11:34:21.163058 Received signal: <TESTCASE> TEST_CASE_ID=pan-submit-and-close RESULT=pass
6983 11:34:21.185340 <6>[ 17.036870] Console: switching to colour dummy device 80x25
6984 11:34:21.192288 <14>[ 17.043334] [IGT] panfrost_submit: executing
6985 11:34:21.201668 IGT-Version: 1.2<14>[ 17.048519] [IGT] panfrost_submit: starting subtest pan-unhandled-pagefault
6986 11:34:21.211640 8-ga44ebfe (aarc<3>[ 17.058161] panfrost 13040000.gpu: Unhandled Page fault in AS0 at VA 0x0000DEADBEEF0000
6987 11:34:21.212041 <3>[ 17.058161] Reason: TODO
6988 11:34:21.218092 <3>[ 17.058161] raw fault status: 0x7C1003C0
6989 11:34:21.221650 <3>[ 17.058161] decoded fault status: SLAVE FAULT
6990 11:34:21.228000 <3>[ 17.058161] exception type 0xC0: TRANSLATION_FAULT_0
6991 11:34:21.231253 <3>[ 17.058161] access type 0x3: WRITE
6992 11:34:21.234966 <3>[ 17.058161] source id 0x7C10
6993 11:34:21.244916 h64) (Linux: 6.1<3>[ 17.090649] panfrost 13040000.gpu: js fault, js=1, status=JOB_BUS_FAULT, head=0x2000000, tail=0x2000000
6994 11:34:21.254729 .96-cip24 aarch6<14>[ 17.102228] [IGT] panfrost_submit: finished subtest pan-unhandled-pagefault, SUCCESS
6995 11:34:21.255123 4)
6996 11:34:21.261278 Using IGT_SR<14>[ 17.111205] [IGT] panfrost_submit: exiting, ret=0
6997 11:34:21.265043 ANDOM=1721216052 for randomisation
6998 11:34:21.265511 Opened device: /dev/dri/card0
6999 11:34:21.271996 Starting subtest: pan-unhandled-pagefault
7000 11:34:21.275265 [1mSubtest pan-unhandled-pagefault: SUCCESS (0.045s)[0m
7001 11:34:21.313791 <6>[ 17.148807] Console: switching to colour frame buffer device 170x48
7002 11:34:21.333628 <8>[ 17.181686] <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=pan-unhandled-pagefault RESULT=pass>
7003 11:34:21.334492 Received signal: <TESTCASE> TEST_CASE_ID=pan-unhandled-pagefault RESULT=pass
7005 11:34:21.340952 <8>[ 17.192271] <LAVA_SIGNAL_TESTSET STOP>
7006 11:34:21.341621 Received signal: <TESTSET> STOP
7007 11:34:21.342007 Closing test_set panfrost_submit
7008 11:34:21.347386 <8>[ 17.197275] <LAVA_SIGNAL_ENDRUN 0_igt-gpu-panfrost 14864581_1.5.2.3.1>
7009 11:34:21.347787 + set +x
7010 11:34:21.348322 Received signal: <ENDRUN> 0_igt-gpu-panfrost 14864581_1.5.2.3.1
7011 11:34:21.348726 Ending use of test pattern.
7012 11:34:21.349006 Ending test lava.0_igt-gpu-panfrost (14864581_1.5.2.3.1), duration 2.78
7014 11:34:21.350608 <LAVA_TEST_RUNNER EXIT>
7015 11:34:21.351497 ok: lava_test_shell seems to have completed
7016 11:34:21.353053 gem-new-4096:
set: panfrost_gem_new
result: pass
gem-new-0:
set: panfrost_gem_new
result: pass
gem-new-zeroed:
set: panfrost_gem_new
result: pass
base-params:
set: panfrost_get_param
result: pass
get-bad-param:
set: panfrost_get_param
result: pass
get-bad-padding:
set: panfrost_get_param
result: pass
gem-prime-import:
set: panfrost_prime
result: fail
pan-submit:
set: panfrost_submit
result: pass
pan-submit-error-no-jc:
set: panfrost_submit
result: pass
pan-submit-error-bad-in-syncs:
set: panfrost_submit
result: pass
pan-submit-error-bad-bo-handles:
set: panfrost_submit
result: pass
pan-submit-error-bad-requirements:
set: panfrost_submit
result: pass
pan-submit-error-bad-out-sync:
set: panfrost_submit
result: pass
pan-reset:
set: panfrost_submit
result: pass
pan-submit-and-close:
set: panfrost_submit
result: pass
pan-unhandled-pagefault:
set: panfrost_submit
result: pass
7017 11:34:21.353535 end: 3.1 lava-test-shell (duration 00:00:03) [common]
7018 11:34:21.354120 end: 3 lava-test-retry (duration 00:00:03) [common]
7019 11:34:21.354792 start: 4 finalize (timeout 00:07:54) [common]
7020 11:34:21.355282 start: 4.1 power-off (timeout 00:00:30) [common]
7021 11:34:21.355905 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-0', '--port=1', '--command=off']
7022 11:34:23.470916 >> Command sent successfully.
7023 11:34:23.474551 Returned 0 in 2 seconds
7024 11:34:23.474694 end: 4.1 power-off (duration 00:00:02) [common]
7026 11:34:23.474915 start: 4.2 read-feedback (timeout 00:07:52) [common]
7027 11:34:23.475060 Listened to connection for namespace 'common' for up to 1s
7028 11:34:24.476108 Finalising connection for namespace 'common'
7029 11:34:24.476260 Disconnecting from shell: Finalise
7030 11:34:24.476329 / #
7031 11:34:24.576827 end: 4.2 read-feedback (duration 00:00:01) [common]
7032 11:34:24.577349 end: 4 finalize (duration 00:00:03) [common]
7033 11:34:24.577873 Cleaning after the job
7034 11:34:24.578377 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864581/tftp-deploy-nu8198jc/ramdisk
7035 11:34:24.607339 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864581/tftp-deploy-nu8198jc/kernel
7036 11:34:24.633825 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864581/tftp-deploy-nu8198jc/dtb
7037 11:34:24.634096 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864581/tftp-deploy-nu8198jc/modules
7038 11:34:24.640589 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14864581
7039 11:34:24.762661 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14864581
7040 11:34:24.762836 Job finished correctly