Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 56
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 92
1 11:33:59.785399 lava-dispatcher, installed at version: 2024.05
2 11:33:59.785620 start: 0 validate
3 11:33:59.785744 Start time: 2024-07-17 11:33:59.785737+00:00 (UTC)
4 11:33:59.785885 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:33:59.786042 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 11:34:00.046242 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:34:00.046477 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.96-cip24-23-gd25f4b93e0db9%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 11:34:00.304273 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:34:00.304682 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.96-cip24-23-gd25f4b93e0db9%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 11:34:00.564018 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:34:00.564572 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 11:34:00.825686 Using caching service: 'http://localhost/cache/?uri=%s'
13 11:34:00.826381 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.96-cip24-23-gd25f4b93e0db9%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
14 11:34:01.087099 validate duration: 1.30
16 11:34:01.087374 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 11:34:01.087487 start: 1.1 download-retry (timeout 00:10:00) [common]
18 11:34:01.087584 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 11:34:01.087760 Not decompressing ramdisk as can be used compressed.
20 11:34:01.087866 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 11:34:01.087947 saving as /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/ramdisk/initrd.cpio.gz
22 11:34:01.088010 total size: 5628169 (5 MB)
23 11:34:01.089073 progress 0 % (0 MB)
24 11:34:01.090888 progress 5 % (0 MB)
25 11:34:01.092611 progress 10 % (0 MB)
26 11:34:01.094086 progress 15 % (0 MB)
27 11:34:01.095736 progress 20 % (1 MB)
28 11:34:01.097220 progress 25 % (1 MB)
29 11:34:01.098865 progress 30 % (1 MB)
30 11:34:01.100513 progress 35 % (1 MB)
31 11:34:01.101983 progress 40 % (2 MB)
32 11:34:01.103694 progress 45 % (2 MB)
33 11:34:01.105181 progress 50 % (2 MB)
34 11:34:01.106819 progress 55 % (2 MB)
35 11:34:01.108524 progress 60 % (3 MB)
36 11:34:01.109981 progress 65 % (3 MB)
37 11:34:01.111632 progress 70 % (3 MB)
38 11:34:01.113068 progress 75 % (4 MB)
39 11:34:01.114675 progress 80 % (4 MB)
40 11:34:01.116124 progress 85 % (4 MB)
41 11:34:01.117757 progress 90 % (4 MB)
42 11:34:01.119396 progress 95 % (5 MB)
43 11:34:01.120870 progress 100 % (5 MB)
44 11:34:01.121089 5 MB downloaded in 0.03 s (162.30 MB/s)
45 11:34:01.121240 end: 1.1.1 http-download (duration 00:00:00) [common]
47 11:34:01.121481 end: 1.1 download-retry (duration 00:00:00) [common]
48 11:34:01.121568 start: 1.2 download-retry (timeout 00:10:00) [common]
49 11:34:01.121650 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 11:34:01.121793 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
51 11:34:01.121865 saving as /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/kernel/Image
52 11:34:01.121924 total size: 54813184 (52 MB)
53 11:34:01.121983 No compression specified
54 11:34:01.123072 progress 0 % (0 MB)
55 11:34:01.137760 progress 5 % (2 MB)
56 11:34:01.152752 progress 10 % (5 MB)
57 11:34:01.167607 progress 15 % (7 MB)
58 11:34:01.182265 progress 20 % (10 MB)
59 11:34:01.197390 progress 25 % (13 MB)
60 11:34:01.212971 progress 30 % (15 MB)
61 11:34:01.228340 progress 35 % (18 MB)
62 11:34:01.243543 progress 40 % (20 MB)
63 11:34:01.258530 progress 45 % (23 MB)
64 11:34:01.274048 progress 50 % (26 MB)
65 11:34:01.289014 progress 55 % (28 MB)
66 11:34:01.305234 progress 60 % (31 MB)
67 11:34:01.321254 progress 65 % (34 MB)
68 11:34:01.335834 progress 70 % (36 MB)
69 11:34:01.350567 progress 75 % (39 MB)
70 11:34:01.365195 progress 80 % (41 MB)
71 11:34:01.379668 progress 85 % (44 MB)
72 11:34:01.394244 progress 90 % (47 MB)
73 11:34:01.408927 progress 95 % (49 MB)
74 11:34:01.423318 progress 100 % (52 MB)
75 11:34:01.423575 52 MB downloaded in 0.30 s (173.30 MB/s)
76 11:34:01.423731 end: 1.2.1 http-download (duration 00:00:00) [common]
78 11:34:01.423961 end: 1.2 download-retry (duration 00:00:00) [common]
79 11:34:01.424050 start: 1.3 download-retry (timeout 00:10:00) [common]
80 11:34:01.424134 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 11:34:01.424278 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 11:34:01.424352 saving as /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 11:34:01.424411 total size: 57695 (0 MB)
84 11:34:01.424468 No compression specified
85 11:34:01.425674 progress 56 % (0 MB)
86 11:34:01.425956 progress 100 % (0 MB)
87 11:34:01.426163 0 MB downloaded in 0.00 s (31.46 MB/s)
88 11:34:01.426284 end: 1.3.1 http-download (duration 00:00:00) [common]
90 11:34:01.426505 end: 1.3 download-retry (duration 00:00:00) [common]
91 11:34:01.426588 start: 1.4 download-retry (timeout 00:10:00) [common]
92 11:34:01.426671 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 11:34:01.426787 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 11:34:01.426854 saving as /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/nfsrootfs/full.rootfs.tar
95 11:34:01.426914 total size: 120894716 (115 MB)
96 11:34:01.426974 Using unxz to decompress xz
97 11:34:01.428204 progress 0 % (0 MB)
98 11:34:01.796453 progress 5 % (5 MB)
99 11:34:02.167986 progress 10 % (11 MB)
100 11:34:02.538369 progress 15 % (17 MB)
101 11:34:02.887563 progress 20 % (23 MB)
102 11:34:03.220837 progress 25 % (28 MB)
103 11:34:03.592838 progress 30 % (34 MB)
104 11:34:03.937857 progress 35 % (40 MB)
105 11:34:04.123742 progress 40 % (46 MB)
106 11:34:04.322741 progress 45 % (51 MB)
107 11:34:04.651446 progress 50 % (57 MB)
108 11:34:05.035339 progress 55 % (63 MB)
109 11:34:05.400386 progress 60 % (69 MB)
110 11:34:05.769868 progress 65 % (74 MB)
111 11:34:06.143197 progress 70 % (80 MB)
112 11:34:06.521821 progress 75 % (86 MB)
113 11:34:06.888069 progress 80 % (92 MB)
114 11:34:07.256822 progress 85 % (98 MB)
115 11:34:07.622301 progress 90 % (103 MB)
116 11:34:07.971050 progress 95 % (109 MB)
117 11:34:08.363902 progress 100 % (115 MB)
118 11:34:08.369976 115 MB downloaded in 6.94 s (16.61 MB/s)
119 11:34:08.370151 end: 1.4.1 http-download (duration 00:00:07) [common]
121 11:34:08.370386 end: 1.4 download-retry (duration 00:00:07) [common]
122 11:34:08.370477 start: 1.5 download-retry (timeout 00:09:53) [common]
123 11:34:08.370560 start: 1.5.1 http-download (timeout 00:09:53) [common]
124 11:34:08.370701 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
125 11:34:08.370770 saving as /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/modules/modules.tar
126 11:34:08.370828 total size: 8610184 (8 MB)
127 11:34:08.370890 Using unxz to decompress xz
128 11:34:08.372269 progress 0 % (0 MB)
129 11:34:08.394586 progress 5 % (0 MB)
130 11:34:08.421014 progress 10 % (0 MB)
131 11:34:08.447246 progress 15 % (1 MB)
132 11:34:08.473446 progress 20 % (1 MB)
133 11:34:08.498910 progress 25 % (2 MB)
134 11:34:08.524394 progress 30 % (2 MB)
135 11:34:08.548630 progress 35 % (2 MB)
136 11:34:08.576782 progress 40 % (3 MB)
137 11:34:08.603047 progress 45 % (3 MB)
138 11:34:08.628988 progress 50 % (4 MB)
139 11:34:08.655861 progress 55 % (4 MB)
140 11:34:08.681922 progress 60 % (4 MB)
141 11:34:08.706969 progress 65 % (5 MB)
142 11:34:08.734948 progress 70 % (5 MB)
143 11:34:08.764153 progress 75 % (6 MB)
144 11:34:08.793657 progress 80 % (6 MB)
145 11:34:08.819249 progress 85 % (7 MB)
146 11:34:08.844292 progress 90 % (7 MB)
147 11:34:08.869723 progress 95 % (7 MB)
148 11:34:08.894982 progress 100 % (8 MB)
149 11:34:08.900879 8 MB downloaded in 0.53 s (15.49 MB/s)
150 11:34:08.901042 end: 1.5.1 http-download (duration 00:00:01) [common]
152 11:34:08.901282 end: 1.5 download-retry (duration 00:00:01) [common]
153 11:34:08.901371 start: 1.6 prepare-tftp-overlay (timeout 00:09:52) [common]
154 11:34:08.901460 start: 1.6.1 extract-nfsrootfs (timeout 00:09:52) [common]
155 11:34:13.048694 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14864599/extract-nfsrootfs-r2yycohl
156 11:34:13.048887 end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
157 11:34:13.048991 start: 1.6.2 lava-overlay (timeout 00:09:48) [common]
158 11:34:13.049171 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi
159 11:34:13.049304 makedir: /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin
160 11:34:13.049408 makedir: /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/tests
161 11:34:13.049511 makedir: /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/results
162 11:34:13.049603 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-add-keys
163 11:34:13.049746 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-add-sources
164 11:34:13.049877 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-background-process-start
165 11:34:13.050022 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-background-process-stop
166 11:34:13.050196 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-common-functions
167 11:34:13.050357 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-echo-ipv4
168 11:34:13.050487 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-install-packages
169 11:34:13.050617 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-installed-packages
170 11:34:13.050749 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-os-build
171 11:34:13.050876 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-probe-channel
172 11:34:13.051003 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-probe-ip
173 11:34:13.051131 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-target-ip
174 11:34:13.051256 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-target-mac
175 11:34:13.051381 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-target-storage
176 11:34:13.051567 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-test-case
177 11:34:13.051698 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-test-event
178 11:34:13.051823 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-test-feedback
179 11:34:13.051949 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-test-raise
180 11:34:13.052075 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-test-reference
181 11:34:13.052202 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-test-runner
182 11:34:13.052327 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-test-set
183 11:34:13.052452 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-test-shell
184 11:34:13.052583 Updating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-add-keys (debian)
185 11:34:13.052739 Updating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-add-sources (debian)
186 11:34:13.052882 Updating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-install-packages (debian)
187 11:34:13.053025 Updating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-installed-packages (debian)
188 11:34:13.053167 Updating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/bin/lava-os-build (debian)
189 11:34:13.053290 Creating /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/environment
190 11:34:13.053385 LAVA metadata
191 11:34:13.053455 - LAVA_JOB_ID=14864599
192 11:34:13.053523 - LAVA_DISPATCHER_IP=192.168.201.1
193 11:34:13.053626 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:48) [common]
194 11:34:13.053689 skipped lava-vland-overlay
195 11:34:13.053773 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 11:34:13.053853 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:48) [common]
197 11:34:13.053911 skipped lava-multinode-overlay
198 11:34:13.053982 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 11:34:13.054082 start: 1.6.2.3 test-definition (timeout 00:09:48) [common]
200 11:34:13.054155 Loading test definitions
201 11:34:13.054239 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:48) [common]
202 11:34:13.054303 Using /lava-14864599 at stage 0
203 11:34:13.054602 uuid=14864599_1.6.2.3.1 testdef=None
204 11:34:13.054693 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 11:34:13.054776 start: 1.6.2.3.2 test-overlay (timeout 00:09:48) [common]
206 11:34:13.055231 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 11:34:13.055527 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:48) [common]
209 11:34:13.056170 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 11:34:13.056554 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:48) [common]
212 11:34:13.057324 runner path: /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/0/tests/0_timesync-off test_uuid 14864599_1.6.2.3.1
213 11:34:13.057518 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 11:34:13.057892 start: 1.6.2.3.5 git-repo-action (timeout 00:09:48) [common]
216 11:34:13.057993 Using /lava-14864599 at stage 0
217 11:34:13.058133 Fetching tests from https://github.com/kernelci/test-definitions.git
218 11:34:13.058247 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/0/tests/1_kselftest-tpm2'
219 11:34:16.285946 Running '/usr/bin/git checkout kernelci.org
220 11:34:16.449657 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/kselftest.yaml
221 11:34:16.450276 uuid=14864599_1.6.2.3.5 testdef=None
222 11:34:16.450415 end: 1.6.2.3.5 git-repo-action (duration 00:00:03) [common]
224 11:34:16.450757 start: 1.6.2.3.6 test-overlay (timeout 00:09:45) [common]
225 11:34:16.451995 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 11:34:16.452381 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:45) [common]
228 11:34:16.453668 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 11:34:16.454055 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:45) [common]
231 11:34:16.455475 runner path: /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/0/tests/1_kselftest-tpm2 test_uuid 14864599_1.6.2.3.5
232 11:34:16.455569 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 11:34:16.455636 BRANCH='cip-gitlab'
234 11:34:16.455696 SKIPFILE='/dev/null'
235 11:34:16.455754 SKIP_INSTALL='True'
236 11:34:16.455812 TESTPROG_URL='http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz'
237 11:34:16.455871 TST_CASENAME=''
238 11:34:16.455927 TST_CMDFILES='tpm2'
239 11:34:16.456075 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 11:34:16.456275 Creating lava-test-runner.conf files
242 11:34:16.456337 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14864599/lava-overlay-5x6qj9bi/lava-14864599/0 for stage 0
243 11:34:16.456430 - 0_timesync-off
244 11:34:16.456502 - 1_kselftest-tpm2
245 11:34:16.456599 end: 1.6.2.3 test-definition (duration 00:00:03) [common]
246 11:34:16.456683 start: 1.6.2.4 compress-overlay (timeout 00:09:45) [common]
247 11:34:24.559218 end: 1.6.2.4 compress-overlay (duration 00:00:08) [common]
248 11:34:24.559384 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
249 11:34:24.559518 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 11:34:24.559612 end: 1.6.2 lava-overlay (duration 00:00:12) [common]
251 11:34:24.559700 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
252 11:34:24.721342 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 11:34:24.721495 start: 1.6.4 extract-modules (timeout 00:09:36) [common]
254 11:34:24.721578 extracting modules file /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14864599/extract-nfsrootfs-r2yycohl
255 11:34:24.971917 extracting modules file /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14864599/extract-overlay-ramdisk-im56st5i/ramdisk
256 11:34:25.229542 end: 1.6.4 extract-modules (duration 00:00:01) [common]
257 11:34:25.229686 start: 1.6.5 apply-overlay-tftp (timeout 00:09:36) [common]
258 11:34:25.229814 [common] Applying overlay to NFS
259 11:34:25.229909 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14864599/compress-overlay-0bqpo9vv/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14864599/extract-nfsrootfs-r2yycohl
260 11:34:26.164265 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 11:34:26.164416 start: 1.6.6 configure-preseed-file (timeout 00:09:35) [common]
262 11:34:26.164507 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 11:34:26.164597 start: 1.6.7 compress-ramdisk (timeout 00:09:35) [common]
264 11:34:26.164676 Building ramdisk /var/lib/lava/dispatcher/tmp/14864599/extract-overlay-ramdisk-im56st5i/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14864599/extract-overlay-ramdisk-im56st5i/ramdisk
265 11:34:26.463494 >> 129966 blocks
266 11:34:28.749244 rename /var/lib/lava/dispatcher/tmp/14864599/extract-overlay-ramdisk-im56st5i/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/ramdisk/ramdisk.cpio.gz
267 11:34:28.749428 end: 1.6.7 compress-ramdisk (duration 00:00:03) [common]
268 11:34:28.749527 start: 1.6.8 prepare-kernel (timeout 00:09:32) [common]
269 11:34:28.749614 start: 1.6.8.1 prepare-fit (timeout 00:09:32) [common]
270 11:34:28.749701 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/kernel/Image']
271 11:34:44.212343 Returned 0 in 15 seconds
272 11:34:44.212554 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/kernel/image.itb
273 11:34:44.589080 output: FIT description: Kernel Image image with one or more FDT blobs
274 11:34:44.589239 output: Created: Wed Jul 17 12:34:44 2024
275 11:34:44.589339 output: Image 0 (kernel-1)
276 11:34:44.589431 output: Description:
277 11:34:44.589521 output: Created: Wed Jul 17 12:34:44 2024
278 11:34:44.589610 output: Type: Kernel Image
279 11:34:44.589699 output: Compression: lzma compressed
280 11:34:44.589787 output: Data Size: 13118294 Bytes = 12810.83 KiB = 12.51 MiB
281 11:34:44.589874 output: Architecture: AArch64
282 11:34:44.589960 output: OS: Linux
283 11:34:44.590045 output: Load Address: 0x00000000
284 11:34:44.590131 output: Entry Point: 0x00000000
285 11:34:44.590216 output: Hash algo: crc32
286 11:34:44.590301 output: Hash value: 83448d17
287 11:34:44.590386 output: Image 1 (fdt-1)
288 11:34:44.590471 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 11:34:44.590556 output: Created: Wed Jul 17 12:34:44 2024
290 11:34:44.590641 output: Type: Flat Device Tree
291 11:34:44.590727 output: Compression: uncompressed
292 11:34:44.590812 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 11:34:44.590898 output: Architecture: AArch64
294 11:34:44.590983 output: Hash algo: crc32
295 11:34:44.591068 output: Hash value: a9713552
296 11:34:44.591152 output: Image 2 (ramdisk-1)
297 11:34:44.591238 output: Description: unavailable
298 11:34:44.591323 output: Created: Wed Jul 17 12:34:44 2024
299 11:34:44.591408 output: Type: RAMDisk Image
300 11:34:44.591497 output: Compression: uncompressed
301 11:34:44.591555 output: Data Size: 18722716 Bytes = 18283.90 KiB = 17.86 MiB
302 11:34:44.591611 output: Architecture: AArch64
303 11:34:44.591666 output: OS: Linux
304 11:34:44.591720 output: Load Address: unavailable
305 11:34:44.591774 output: Entry Point: unavailable
306 11:34:44.591828 output: Hash algo: crc32
307 11:34:44.591881 output: Hash value: 9e296df2
308 11:34:44.591936 output: Default Configuration: 'conf-1'
309 11:34:44.591990 output: Configuration 0 (conf-1)
310 11:34:44.592045 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 11:34:44.592100 output: Kernel: kernel-1
312 11:34:44.592154 output: Init Ramdisk: ramdisk-1
313 11:34:44.592209 output: FDT: fdt-1
314 11:34:44.592263 output: Loadables: kernel-1
315 11:34:44.592317 output:
316 11:34:44.592422 end: 1.6.8.1 prepare-fit (duration 00:00:16) [common]
317 11:34:44.592506 end: 1.6.8 prepare-kernel (duration 00:00:16) [common]
318 11:34:44.592589 end: 1.6 prepare-tftp-overlay (duration 00:00:36) [common]
319 11:34:44.592672 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:16) [common]
320 11:34:44.592737 No LXC device requested
321 11:34:44.592811 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 11:34:44.592890 start: 1.8 deploy-device-env (timeout 00:09:16) [common]
323 11:34:44.592965 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 11:34:44.593027 Checking files for TFTP limit of 4294967296 bytes.
325 11:34:44.593523 end: 1 tftp-deploy (duration 00:00:44) [common]
326 11:34:44.593627 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 11:34:44.593717 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 11:34:44.593820 substitutions:
329 11:34:44.593887 - {DTB}: 14864599/tftp-deploy-fih12593/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 11:34:44.593950 - {INITRD}: 14864599/tftp-deploy-fih12593/ramdisk/ramdisk.cpio.gz
331 11:34:44.594011 - {KERNEL}: 14864599/tftp-deploy-fih12593/kernel/Image
332 11:34:44.594069 - {LAVA_MAC}: None
333 11:34:44.594125 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14864599/extract-nfsrootfs-r2yycohl
334 11:34:44.594182 - {NFS_SERVER_IP}: 192.168.201.1
335 11:34:44.594237 - {PRESEED_CONFIG}: None
336 11:34:44.594297 - {PRESEED_LOCAL}: None
337 11:34:44.594352 - {RAMDISK}: 14864599/tftp-deploy-fih12593/ramdisk/ramdisk.cpio.gz
338 11:34:44.594407 - {ROOT_PART}: None
339 11:34:44.594462 - {ROOT}: None
340 11:34:44.594517 - {SERVER_IP}: 192.168.201.1
341 11:34:44.594572 - {TEE}: None
342 11:34:44.594627 Parsed boot commands:
343 11:34:44.594680 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 11:34:44.594833 Parsed boot commands: tftpboot 192.168.201.1 14864599/tftp-deploy-fih12593/kernel/image.itb 14864599/tftp-deploy-fih12593/kernel/cmdline
345 11:34:44.594922 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 11:34:44.595006 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 11:34:44.595087 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 11:34:44.595168 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 11:34:44.595231 Not connected, no need to disconnect.
350 11:34:44.595305 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 11:34:44.595383 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 11:34:44.595444 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-2'
353 11:34:44.598666 Setting prompt string to ['lava-test: # ']
354 11:34:44.599021 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 11:34:44.599128 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 11:34:44.599230 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 11:34:44.599319 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 11:34:44.599555 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2', '--port=1', '--command=reboot']
359 11:34:53.758847 >> Command sent successfully.
360 11:34:53.772342 Returned 0 in 9 seconds
361 11:34:53.772941 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
363 11:34:53.773888 end: 2.2.2 reset-device (duration 00:00:09) [common]
364 11:34:53.774375 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
365 11:34:53.774941 Setting prompt string to 'Starting depthcharge on Juniper...'
366 11:34:53.775272 Changing prompt to 'Starting depthcharge on Juniper...'
367 11:34:53.775645 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
368 11:34:53.777093 [Enter `^Ec?' for help]
369 11:35:01.454434 [DL] 00000000 00000000 010701
370 11:35:01.459321
371 11:35:01.459439
372 11:35:01.459523 F0: 102B 0000
373 11:35:01.459592
374 11:35:01.462581 F3: 1006 0033 [0200]
375 11:35:01.462668
376 11:35:01.462734 F3: 4001 00E0 [0200]
377 11:35:01.462799
378 11:35:01.462857 F3: 0000 0000
379 11:35:01.466391
380 11:35:01.466477 V0: 0000 0000 [0001]
381 11:35:01.466545
382 11:35:01.466606 00: 1027 0002
383 11:35:01.469411
384 11:35:01.469495 01: 0000 0000
385 11:35:01.469563
386 11:35:01.469624 BP: 0C00 0251 [0000]
387 11:35:01.469682
388 11:35:01.472398 G0: 1182 0000
389 11:35:01.472482
390 11:35:01.472548 EC: 0004 0000 [0001]
391 11:35:01.472608
392 11:35:01.475792 S7: 0000 0000 [0000]
393 11:35:01.475877
394 11:35:01.479209 CC: 0000 0000 [0001]
395 11:35:01.479320
396 11:35:01.479414 T0: 0000 00DB [000F]
397 11:35:01.479518
398 11:35:01.479579 Jump to BL
399 11:35:01.482207
400 11:35:01.515325
401 11:35:01.515447
402 11:35:01.525015 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
403 11:35:01.528452 ARM64: Exception handlers installed.
404 11:35:01.528538 ARM64: Testing exception
405 11:35:01.531789 ARM64: Done test exception
406 11:35:01.535375 WDT: Last reset was cold boot
407 11:35:01.538475 SPI0(PAD0) initialized at 992727 Hz
408 11:35:01.541967 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
409 11:35:01.542057 Manufacturer: ef
410 11:35:01.548411 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
411 11:35:01.562263 Probing TPM: . done!
412 11:35:01.562351 TPM ready after 0 ms
413 11:35:01.568820 Connected to device vid:did:rid of 1ae0:0028:00
414 11:35:01.578583 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-afa1dd1
415 11:35:01.608884 Initialized TPM device CR50 revision 0
416 11:35:01.620930 tlcl_send_startup: Startup return code is 0
417 11:35:01.621017 TPM: setup succeeded
418 11:35:01.628656 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
419 11:35:01.632211 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
420 11:35:01.635450 in-header: 03 19 00 00 08 00 00 00
421 11:35:01.638543 in-data: a2 e0 47 00 13 00 00 00
422 11:35:01.641935 Chrome EC: UHEPI supported
423 11:35:01.648433 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
424 11:35:01.651838 in-header: 03 a1 00 00 08 00 00 00
425 11:35:01.655224 in-data: 84 60 60 10 00 00 00 00
426 11:35:01.655312 Phase 1
427 11:35:01.658293 FMAP: area GBB found @ 3f5000 (12032 bytes)
428 11:35:01.664925 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
429 11:35:01.671238 VB2:vb2_check_recovery() Recovery was requested manually
430 11:35:01.674566 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
431 11:35:01.678872 Recovery requested (1009000e)
432 11:35:01.687340 tlcl_extend: response is 0
433 11:35:01.695716 tlcl_extend: response is 0
434 11:35:01.720661
435 11:35:01.720749
436 11:35:01.730210 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
437 11:35:01.733869 ARM64: Exception handlers installed.
438 11:35:01.733955 ARM64: Testing exception
439 11:35:01.736779 ARM64: Done test exception
440 11:35:01.752916 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0x926b, sec=0x203a
441 11:35:01.759305 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
442 11:35:01.762502 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
443 11:35:01.770917 [RTC]rtc_get_frequency_meter,134: input=0xf, output=863
444 11:35:01.778018 [RTC]rtc_get_frequency_meter,134: input=0x7, output=733
445 11:35:01.784826 [RTC]rtc_get_frequency_meter,134: input=0xb, output=800
446 11:35:01.791746 [RTC]rtc_get_frequency_meter,134: input=0x9, output=766
447 11:35:01.798695 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
448 11:35:01.805354 [RTC]rtc_get_frequency_meter,134: input=0xa, output=781
449 11:35:01.812298 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
450 11:35:01.819329 [RTC]rtc_osc_init,208: EOSC32 cali val = 0x926b
451 11:35:01.822333 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
452 11:35:01.825713 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
453 11:35:01.831973 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
454 11:35:01.835295 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
455 11:35:01.838833 in-header: 03 19 00 00 08 00 00 00
456 11:35:01.841911 in-data: a2 e0 47 00 13 00 00 00
457 11:35:01.841998 Chrome EC: UHEPI supported
458 11:35:01.848599 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
459 11:35:01.852018 in-header: 03 a1 00 00 08 00 00 00
460 11:35:01.855024 in-data: 84 60 60 10 00 00 00 00
461 11:35:01.858299 Skip loading cached calibration data
462 11:35:01.865007 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
463 11:35:01.868061 in-header: 03 a1 00 00 08 00 00 00
464 11:35:01.871371 in-data: 84 60 60 10 00 00 00 00
465 11:35:01.878277 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
466 11:35:01.881223 in-header: 03 a1 00 00 08 00 00 00
467 11:35:01.884587 in-data: 84 60 60 10 00 00 00 00
468 11:35:01.888072 ADC[3]: Raw value=216116 ID=1
469 11:35:01.891064 Manufacturer: ef
470 11:35:01.894521 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
471 11:35:01.900933 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
472 11:35:01.901020 CBFS @ 21000 size 3d4000
473 11:35:01.907308 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
474 11:35:01.910528 CBFS: Locating 'sdram-lpddr4x-H9HCNNNCPMALHR-4GB'
475 11:35:01.913773 CBFS: Found @ offset 3c700 size 44
476 11:35:01.917248 DRAM-K: Full Calibration
477 11:35:01.920616 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
478 11:35:01.923735 CBFS @ 21000 size 3d4000
479 11:35:01.930545 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
480 11:35:01.933607 CBFS: Locating 'fallback/dram'
481 11:35:01.936811 CBFS: Found @ offset 24b00 size 12268
482 11:35:01.963739 read SPI 0x45b44 0x1224c: 22773 us, 3263 KB/s, 26.104 Mbps
483 11:35:01.966825 ddr_geometry: 1, config: 0x0
484 11:35:01.970326 header.status = 0x0
485 11:35:01.973398 header.magic = 0x44524d4b (expected: 0x44524d4b)
486 11:35:01.976883 header.version = 0x5 (expected: 0x5)
487 11:35:01.979973 header.size = 0x8f0 (expected: 0x8f0)
488 11:35:01.983378 header.config = 0x0
489 11:35:01.983520 header.flags = 0x0
490 11:35:01.986655 header.checksum = 0x0
491 11:35:01.993137 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
492 11:35:01.996579 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
493 11:35:02.002934 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
494 11:35:02.003110 ddr_geometry:1
495 11:35:02.006020 [EMI] new MDL number = 1
496 11:35:02.006195 dram_cbt_mode_extern: 0
497 11:35:02.009494 dram_cbt_mode [RK0]: 0, [RK1]: 0
498 11:35:02.016563 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
499 11:35:02.016843
500 11:35:02.017099
501 11:35:02.019954 [Bianco] ETT version 0.0.0.1
502 11:35:02.023366 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
503 11:35:02.023801
504 11:35:02.026244 vSetVcoreByFreq with vcore:762500, freq=1600
505 11:35:02.026659
506 11:35:02.029693 [DramcInit]
507 11:35:02.033051 AutoRefreshCKEOff AutoREF OFF
508 11:35:02.033416 DDRPhyPLLSetting-CKEOFF
509 11:35:02.036243 DDRPhyPLLSetting-CKEON
510 11:35:02.036604
511 11:35:02.036927 Enable WDQS
512 11:35:02.041040 [ModeRegInit_LP4] CH0 RK0
513 11:35:02.044407 Write Rank0 MR13 =0x18
514 11:35:02.044518 Write Rank0 MR12 =0x5d
515 11:35:02.047438 Write Rank0 MR1 =0x56
516 11:35:02.050594 Write Rank0 MR2 =0x1a
517 11:35:02.050695 Write Rank0 MR11 =0x0
518 11:35:02.054212 Write Rank0 MR22 =0x38
519 11:35:02.057181 Write Rank0 MR14 =0x5d
520 11:35:02.057304 Write Rank0 MR3 =0x30
521 11:35:02.060665 Write Rank0 MR13 =0x58
522 11:35:02.060787 Write Rank0 MR12 =0x5d
523 11:35:02.063673 Write Rank0 MR1 =0x56
524 11:35:02.067061 Write Rank0 MR2 =0x2d
525 11:35:02.067215 Write Rank0 MR11 =0x23
526 11:35:02.070300 Write Rank0 MR22 =0x34
527 11:35:02.073555 Write Rank0 MR14 =0x10
528 11:35:02.073733 Write Rank0 MR3 =0x30
529 11:35:02.076899 Write Rank0 MR13 =0xd8
530 11:35:02.077172 [ModeRegInit_LP4] CH0 RK1
531 11:35:02.080083 Write Rank1 MR13 =0x18
532 11:35:02.083427 Write Rank1 MR12 =0x5d
533 11:35:02.083722 Write Rank1 MR1 =0x56
534 11:35:02.086837 Write Rank1 MR2 =0x1a
535 11:35:02.090244 Write Rank1 MR11 =0x0
536 11:35:02.090707 Write Rank1 MR22 =0x38
537 11:35:02.093800 Write Rank1 MR14 =0x5d
538 11:35:02.094142 Write Rank1 MR3 =0x30
539 11:35:02.096833 Write Rank1 MR13 =0x58
540 11:35:02.100139 Write Rank1 MR12 =0x5d
541 11:35:02.100531 Write Rank1 MR1 =0x56
542 11:35:02.103754 Write Rank1 MR2 =0x2d
543 11:35:02.106677 Write Rank1 MR11 =0x23
544 11:35:02.107214 Write Rank1 MR22 =0x34
545 11:35:02.109981 Write Rank1 MR14 =0x10
546 11:35:02.110492 Write Rank1 MR3 =0x30
547 11:35:02.112981 Write Rank1 MR13 =0xd8
548 11:35:02.116368 [ModeRegInit_LP4] CH1 RK0
549 11:35:02.116789 Write Rank0 MR13 =0x18
550 11:35:02.119804 Write Rank0 MR12 =0x5d
551 11:35:02.122910 Write Rank0 MR1 =0x56
552 11:35:02.123268 Write Rank0 MR2 =0x1a
553 11:35:02.126297 Write Rank0 MR11 =0x0
554 11:35:02.126667 Write Rank0 MR22 =0x38
555 11:35:02.129516 Write Rank0 MR14 =0x5d
556 11:35:02.132797 Write Rank0 MR3 =0x30
557 11:35:02.133289 Write Rank0 MR13 =0x58
558 11:35:02.135985 Write Rank0 MR12 =0x5d
559 11:35:02.139701 Write Rank0 MR1 =0x56
560 11:35:02.140107 Write Rank0 MR2 =0x2d
561 11:35:02.142604 Write Rank0 MR11 =0x23
562 11:35:02.143087 Write Rank0 MR22 =0x34
563 11:35:02.146053 Write Rank0 MR14 =0x10
564 11:35:02.149155 Write Rank0 MR3 =0x30
565 11:35:02.149515 Write Rank0 MR13 =0xd8
566 11:35:02.152626 [ModeRegInit_LP4] CH1 RK1
567 11:35:02.155513 Write Rank1 MR13 =0x18
568 11:35:02.155876 Write Rank1 MR12 =0x5d
569 11:35:02.158862 Write Rank1 MR1 =0x56
570 11:35:02.159420 Write Rank1 MR2 =0x1a
571 11:35:02.162079 Write Rank1 MR11 =0x0
572 11:35:02.165895 Write Rank1 MR22 =0x38
573 11:35:02.166390 Write Rank1 MR14 =0x5d
574 11:35:02.169018 Write Rank1 MR3 =0x30
575 11:35:02.172140 Write Rank1 MR13 =0x58
576 11:35:02.172502 Write Rank1 MR12 =0x5d
577 11:35:02.175447 Write Rank1 MR1 =0x56
578 11:35:02.175870 Write Rank1 MR2 =0x2d
579 11:35:02.178750 Write Rank1 MR11 =0x23
580 11:35:02.181896 Write Rank1 MR22 =0x34
581 11:35:02.182368 Write Rank1 MR14 =0x10
582 11:35:02.185144 Write Rank1 MR3 =0x30
583 11:35:02.188541 Write Rank1 MR13 =0xd8
584 11:35:02.189010 match AC timing 3
585 11:35:02.198204 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
586 11:35:02.198596 [MiockJmeterHQA]
587 11:35:02.204624 vSetVcoreByFreq with vcore:762500, freq=1600
588 11:35:02.309102
589 11:35:02.309528 MIOCK jitter meter ch=0
590 11:35:02.309836
591 11:35:02.312422 1T = (102-17) = 85 dly cells
592 11:35:02.318993 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 735/100 ps
593 11:35:02.322280 vSetVcoreByFreq with vcore:725000, freq=1200
594 11:35:02.422908
595 11:35:02.423376 MIOCK jitter meter ch=0
596 11:35:02.423817
597 11:35:02.425984 1T = (97-17) = 80 dly cells
598 11:35:02.432602 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
599 11:35:02.435810 vSetVcoreByFreq with vcore:725000, freq=800
600 11:35:02.535906
601 11:35:02.536300 MIOCK jitter meter ch=0
602 11:35:02.536582
603 11:35:02.539322 1T = (97-17) = 80 dly cells
604 11:35:02.546253 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 781/100 ps
605 11:35:02.549179 vSetVcoreByFreq with vcore:762500, freq=1600
606 11:35:02.552640 vSetVcoreByFreq with vcore:762500, freq=1600
607 11:35:02.553034
608 11:35:02.553338 K DRVP
609 11:35:02.555736 1. OCD DRVP=0 CALOUT=0
610 11:35:02.559015 1. OCD DRVP=1 CALOUT=0
611 11:35:02.559383 1. OCD DRVP=2 CALOUT=0
612 11:35:02.562086 1. OCD DRVP=3 CALOUT=0
613 11:35:02.565622 1. OCD DRVP=4 CALOUT=0
614 11:35:02.566020 1. OCD DRVP=5 CALOUT=0
615 11:35:02.568669 1. OCD DRVP=6 CALOUT=0
616 11:35:02.572222 1. OCD DRVP=7 CALOUT=0
617 11:35:02.572642 1. OCD DRVP=8 CALOUT=1
618 11:35:02.572959
619 11:35:02.575236 1. OCD DRVP calibration OK! DRVP=8
620 11:35:02.575693
621 11:35:02.576056
622 11:35:02.576349
623 11:35:02.578520 K ODTN
624 11:35:02.578912 3. OCD ODTN=0 ,CALOUT=1
625 11:35:02.581898 3. OCD ODTN=1 ,CALOUT=1
626 11:35:02.585159 3. OCD ODTN=2 ,CALOUT=1
627 11:35:02.585574 3. OCD ODTN=3 ,CALOUT=1
628 11:35:02.588285 3. OCD ODTN=4 ,CALOUT=1
629 11:35:02.588742 3. OCD ODTN=5 ,CALOUT=1
630 11:35:02.591610 3. OCD ODTN=6 ,CALOUT=1
631 11:35:02.595005 3. OCD ODTN=7 ,CALOUT=0
632 11:35:02.595405
633 11:35:02.598563 3. OCD ODTN calibration OK! ODTN=7
634 11:35:02.599008
635 11:35:02.601591 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
636 11:35:02.604628 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
637 11:35:02.611317 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
638 11:35:02.611783
639 11:35:02.612069 K DRVP
640 11:35:02.614482 1. OCD DRVP=0 CALOUT=0
641 11:35:02.614849 1. OCD DRVP=1 CALOUT=0
642 11:35:02.617968 1. OCD DRVP=2 CALOUT=0
643 11:35:02.621153 1. OCD DRVP=3 CALOUT=0
644 11:35:02.621604 1. OCD DRVP=4 CALOUT=0
645 11:35:02.624401 1. OCD DRVP=5 CALOUT=0
646 11:35:02.624770 1. OCD DRVP=6 CALOUT=0
647 11:35:02.627555 1. OCD DRVP=7 CALOUT=0
648 11:35:02.630829 1. OCD DRVP=8 CALOUT=0
649 11:35:02.631315 1. OCD DRVP=9 CALOUT=0
650 11:35:02.634242 1. OCD DRVP=10 CALOUT=1
651 11:35:02.634631
652 11:35:02.637354 1. OCD DRVP calibration OK! DRVP=10
653 11:35:02.637771
654 11:35:02.638051
655 11:35:02.638306
656 11:35:02.638628 K ODTN
657 11:35:02.640676 3. OCD ODTN=0 ,CALOUT=1
658 11:35:02.644126 3. OCD ODTN=1 ,CALOUT=1
659 11:35:02.644487 3. OCD ODTN=2 ,CALOUT=1
660 11:35:02.647569 3. OCD ODTN=3 ,CALOUT=1
661 11:35:02.650529 3. OCD ODTN=4 ,CALOUT=1
662 11:35:02.650888 3. OCD ODTN=5 ,CALOUT=1
663 11:35:02.653889 3. OCD ODTN=6 ,CALOUT=1
664 11:35:02.657265 3. OCD ODTN=7 ,CALOUT=1
665 11:35:02.657653 3. OCD ODTN=8 ,CALOUT=1
666 11:35:02.660283 3. OCD ODTN=9 ,CALOUT=1
667 11:35:02.663549 3. OCD ODTN=10 ,CALOUT=1
668 11:35:02.663926 3. OCD ODTN=11 ,CALOUT=1
669 11:35:02.667352 3. OCD ODTN=12 ,CALOUT=1
670 11:35:02.670327 3. OCD ODTN=13 ,CALOUT=1
671 11:35:02.670727 3. OCD ODTN=14 ,CALOUT=1
672 11:35:02.674113 3. OCD ODTN=15 ,CALOUT=0
673 11:35:02.674513
674 11:35:02.676743 3. OCD ODTN calibration OK! ODTN=15
675 11:35:02.677151
676 11:35:02.679988 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=15
677 11:35:02.683342 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15
678 11:35:02.689804 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=15 (After Adjust)
679 11:35:02.690363
680 11:35:02.690694 [DramcInit]
681 11:35:02.693143 AutoRefreshCKEOff AutoREF OFF
682 11:35:02.696491 DDRPhyPLLSetting-CKEOFF
683 11:35:02.699538 DDRPhyPLLSetting-CKEON
684 11:35:02.700079
685 11:35:02.700573 Enable WDQS
686 11:35:02.701047 ==
687 11:35:02.706158 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
688 11:35:02.709561 fsp= 1, odt_onoff= 1, Byte mode= 0
689 11:35:02.710015 ==
690 11:35:02.710483 [Duty_Offset_Calibration]
691 11:35:02.711082
692 11:35:02.712909 ===========================
693 11:35:02.715950 B0:1 B1:-1 CA:0
694 11:35:02.735888 ==
695 11:35:02.738776 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
696 11:35:02.742113 fsp= 1, odt_onoff= 1, Byte mode= 0
697 11:35:02.742471 ==
698 11:35:02.745473 [Duty_Offset_Calibration]
699 11:35:02.745951
700 11:35:02.748542 ===========================
701 11:35:02.749271 B0:0 B1:0 CA:0
702 11:35:02.781607 [ModeRegInit_LP4] CH0 RK0
703 11:35:02.784953 Write Rank0 MR13 =0x18
704 11:35:02.785539 Write Rank0 MR12 =0x5d
705 11:35:02.788199 Write Rank0 MR1 =0x56
706 11:35:02.791533 Write Rank0 MR2 =0x1a
707 11:35:02.791899 Write Rank0 MR11 =0x0
708 11:35:02.794746 Write Rank0 MR22 =0x38
709 11:35:02.798086 Write Rank0 MR14 =0x5d
710 11:35:02.798465 Write Rank0 MR3 =0x30
711 11:35:02.801246 Write Rank0 MR13 =0x58
712 11:35:02.801696 Write Rank0 MR12 =0x5d
713 11:35:02.804262 Write Rank0 MR1 =0x56
714 11:35:02.808324 Write Rank0 MR2 =0x2d
715 11:35:02.808729 Write Rank0 MR11 =0x23
716 11:35:02.811082 Write Rank0 MR22 =0x34
717 11:35:02.814274 Write Rank0 MR14 =0x10
718 11:35:02.814804 Write Rank0 MR3 =0x30
719 11:35:02.817386 Write Rank0 MR13 =0xd8
720 11:35:02.818044 [ModeRegInit_LP4] CH0 RK1
721 11:35:02.820729 Write Rank1 MR13 =0x18
722 11:35:02.824086 Write Rank1 MR12 =0x5d
723 11:35:02.824565 Write Rank1 MR1 =0x56
724 11:35:02.827255 Write Rank1 MR2 =0x1a
725 11:35:02.830490 Write Rank1 MR11 =0x0
726 11:35:02.830994 Write Rank1 MR22 =0x38
727 11:35:02.833618 Write Rank1 MR14 =0x5d
728 11:35:02.834118 Write Rank1 MR3 =0x30
729 11:35:02.836884 Write Rank1 MR13 =0x58
730 11:35:02.840256 Write Rank1 MR12 =0x5d
731 11:35:02.840721 Write Rank1 MR1 =0x56
732 11:35:02.843720 Write Rank1 MR2 =0x2d
733 11:35:02.847040 Write Rank1 MR11 =0x23
734 11:35:02.847528 Write Rank1 MR22 =0x34
735 11:35:02.849948 Write Rank1 MR14 =0x10
736 11:35:02.850394 Write Rank1 MR3 =0x30
737 11:35:02.853487 Write Rank1 MR13 =0xd8
738 11:35:02.856788 [ModeRegInit_LP4] CH1 RK0
739 11:35:02.857264 Write Rank0 MR13 =0x18
740 11:35:02.860224 Write Rank0 MR12 =0x5d
741 11:35:02.863267 Write Rank0 MR1 =0x56
742 11:35:02.863910 Write Rank0 MR2 =0x1a
743 11:35:02.866538 Write Rank0 MR11 =0x0
744 11:35:02.867002 Write Rank0 MR22 =0x38
745 11:35:02.869889 Write Rank0 MR14 =0x5d
746 11:35:02.873018 Write Rank0 MR3 =0x30
747 11:35:02.873432 Write Rank0 MR13 =0x58
748 11:35:02.876590 Write Rank0 MR12 =0x5d
749 11:35:02.879338 Write Rank0 MR1 =0x56
750 11:35:02.879894 Write Rank0 MR2 =0x2d
751 11:35:02.883067 Write Rank0 MR11 =0x23
752 11:35:02.883567 Write Rank0 MR22 =0x34
753 11:35:02.886326 Write Rank0 MR14 =0x10
754 11:35:02.889603 Write Rank0 MR3 =0x30
755 11:35:02.889991 Write Rank0 MR13 =0xd8
756 11:35:02.892431 [ModeRegInit_LP4] CH1 RK1
757 11:35:02.895893 Write Rank1 MR13 =0x18
758 11:35:02.896256 Write Rank1 MR12 =0x5d
759 11:35:02.899252 Write Rank1 MR1 =0x56
760 11:35:02.899706 Write Rank1 MR2 =0x1a
761 11:35:02.902492 Write Rank1 MR11 =0x0
762 11:35:02.905886 Write Rank1 MR22 =0x38
763 11:35:02.906328 Write Rank1 MR14 =0x5d
764 11:35:02.909191 Write Rank1 MR3 =0x30
765 11:35:02.912287 Write Rank1 MR13 =0x58
766 11:35:02.912768 Write Rank1 MR12 =0x5d
767 11:35:02.915576 Write Rank1 MR1 =0x56
768 11:35:02.916095 Write Rank1 MR2 =0x2d
769 11:35:02.918953 Write Rank1 MR11 =0x23
770 11:35:02.922255 Write Rank1 MR22 =0x34
771 11:35:02.922677 Write Rank1 MR14 =0x10
772 11:35:02.925225 Write Rank1 MR3 =0x30
773 11:35:02.928594 Write Rank1 MR13 =0xd8
774 11:35:02.929002 match AC timing 3
775 11:35:02.938663 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
776 11:35:02.942014 DramC Write-DBI off
777 11:35:02.942590 DramC Read-DBI off
778 11:35:02.944938 Write Rank0 MR13 =0x59
779 11:35:02.945430 ==
780 11:35:02.948259 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
781 11:35:02.951639 fsp= 1, odt_onoff= 1, Byte mode= 0
782 11:35:02.952185 ==
783 11:35:02.954769 === u2Vref_new: 0x56 --> 0x2d
784 11:35:02.958017 === u2Vref_new: 0x58 --> 0x38
785 11:35:02.961328 === u2Vref_new: 0x5a --> 0x39
786 11:35:02.964530 === u2Vref_new: 0x5c --> 0x3c
787 11:35:02.968046 === u2Vref_new: 0x5e --> 0x3d
788 11:35:02.970912 === u2Vref_new: 0x60 --> 0xa0
789 11:35:02.974449 [CA 0] Center 34 (6~63) winsize 58
790 11:35:02.977909 [CA 1] Center 35 (7~63) winsize 57
791 11:35:02.980883 [CA 2] Center 28 (-1~58) winsize 60
792 11:35:02.984470 [CA 3] Center 23 (-4~51) winsize 56
793 11:35:02.987735 [CA 4] Center 24 (-4~53) winsize 58
794 11:35:02.990844 [CA 5] Center 29 (0~59) winsize 60
795 11:35:02.991239
796 11:35:02.994208 [CATrainingPosCal] consider 1 rank data
797 11:35:02.997522 u2DelayCellTimex100 = 735/100 ps
798 11:35:03.000811 CA0 delay=34 (6~63),Diff = 11 PI (14 cell)
799 11:35:03.003937 CA1 delay=35 (7~63),Diff = 12 PI (15 cell)
800 11:35:03.007190 CA2 delay=28 (-1~58),Diff = 5 PI (6 cell)
801 11:35:03.010519 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
802 11:35:03.016869 CA4 delay=24 (-4~53),Diff = 1 PI (1 cell)
803 11:35:03.020573 CA5 delay=29 (0~59),Diff = 6 PI (7 cell)
804 11:35:03.020978
805 11:35:03.023573 CA PerBit enable=1, Macro0, CA PI delay=23
806 11:35:03.026943 === u2Vref_new: 0x5c --> 0x3c
807 11:35:03.027335
808 11:35:03.027694 Vref(ca) range 1: 28
809 11:35:03.027990
810 11:35:03.029993 CS Dly= 8 (39-0-32)
811 11:35:03.033536 Write Rank0 MR13 =0xd8
812 11:35:03.033925 Write Rank0 MR13 =0xd8
813 11:35:03.036596 Write Rank0 MR12 =0x5c
814 11:35:03.036990 Write Rank1 MR13 =0x59
815 11:35:03.039919 ==
816 11:35:03.043160 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
817 11:35:03.046623 fsp= 1, odt_onoff= 1, Byte mode= 0
818 11:35:03.047014 ==
819 11:35:03.049609 === u2Vref_new: 0x56 --> 0x2d
820 11:35:03.053048 === u2Vref_new: 0x58 --> 0x38
821 11:35:03.056208 === u2Vref_new: 0x5a --> 0x39
822 11:35:03.059521 === u2Vref_new: 0x5c --> 0x3c
823 11:35:03.062711 === u2Vref_new: 0x5e --> 0x3d
824 11:35:03.066128 === u2Vref_new: 0x60 --> 0xa0
825 11:35:03.069094 [CA 0] Center 35 (7~63) winsize 57
826 11:35:03.072427 [CA 1] Center 34 (6~63) winsize 58
827 11:35:03.075753 [CA 2] Center 28 (-1~58) winsize 60
828 11:35:03.078884 [CA 3] Center 23 (-5~51) winsize 57
829 11:35:03.082278 [CA 4] Center 23 (-5~52) winsize 58
830 11:35:03.085616 [CA 5] Center 29 (0~59) winsize 60
831 11:35:03.086139
832 11:35:03.089048 [CATrainingPosCal] consider 2 rank data
833 11:35:03.092235 u2DelayCellTimex100 = 735/100 ps
834 11:35:03.095844 CA0 delay=35 (7~63),Diff = 12 PI (15 cell)
835 11:35:03.098798 CA1 delay=35 (7~63),Diff = 12 PI (15 cell)
836 11:35:03.101859 CA2 delay=28 (-1~58),Diff = 5 PI (6 cell)
837 11:35:03.105634 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
838 11:35:03.108557 CA4 delay=24 (-4~52),Diff = 1 PI (1 cell)
839 11:35:03.112054 CA5 delay=29 (0~59),Diff = 6 PI (7 cell)
840 11:35:03.112437
841 11:35:03.118450 CA PerBit enable=1, Macro0, CA PI delay=23
842 11:35:03.118838 === u2Vref_new: 0x5e --> 0x3d
843 11:35:03.119139
844 11:35:03.121464 Vref(ca) range 1: 30
845 11:35:03.121858
846 11:35:03.125291 CS Dly= 5 (36-0-32)
847 11:35:03.125676 Write Rank1 MR13 =0xd8
848 11:35:03.128129 Write Rank1 MR13 =0xd8
849 11:35:03.131576 Write Rank1 MR12 =0x5e
850 11:35:03.134639 [RankSwap] Rank num 2, (Multi 1), Rank 0
851 11:35:03.135130 Write Rank0 MR2 =0xad
852 11:35:03.138102 [Write Leveling]
853 11:35:03.141338 delay byte0 byte1 byte2 byte3
854 11:35:03.141745
855 11:35:03.142056 10 0 0
856 11:35:03.144537 11 0 0
857 11:35:03.144904 12 0 0
858 11:35:03.145187 13 0 0
859 11:35:03.147821 14 0 0
860 11:35:03.148178 15 0 0
861 11:35:03.151097 16 0 0
862 11:35:03.151649 17 0 0
863 11:35:03.154456 18 0 0
864 11:35:03.154926 19 0 0
865 11:35:03.155344 20 0 0
866 11:35:03.157601 21 0 0
867 11:35:03.157958 22 0 0
868 11:35:03.160901 23 0 0
869 11:35:03.161258 24 0 0
870 11:35:03.161538 25 0 0
871 11:35:03.164267 26 0 0
872 11:35:03.164625 27 0 ff
873 11:35:03.167623 28 0 ff
874 11:35:03.167981 29 0 ff
875 11:35:03.170813 30 0 ff
876 11:35:03.171171 31 0 ff
877 11:35:03.173820 32 ff ff
878 11:35:03.174249 33 ff ff
879 11:35:03.177581 34 ff ff
880 11:35:03.177943 35 ff ff
881 11:35:03.178292 36 ff ff
882 11:35:03.180497 37 ff ff
883 11:35:03.180855 38 ff ff
884 11:35:03.187005 pass bytecount = 0xff (0xff: all bytes pass)
885 11:35:03.187357
886 11:35:03.187692 DQS0 dly: 32
887 11:35:03.187954 DQS1 dly: 27
888 11:35:03.190278 Write Rank0 MR2 =0x2d
889 11:35:03.193690 [RankSwap] Rank num 2, (Multi 1), Rank 0
890 11:35:03.196993 Write Rank0 MR1 =0xd6
891 11:35:03.197344 [Gating]
892 11:35:03.197617 ==
893 11:35:03.203551 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
894 11:35:03.206803 fsp= 1, odt_onoff= 1, Byte mode= 0
895 11:35:03.207174 ==
896 11:35:03.209878 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
897 11:35:03.213554 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
898 11:35:03.219689 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(0 0)| 0
899 11:35:03.223176 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
900 11:35:03.226626 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
901 11:35:03.232973 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
902 11:35:03.236082 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
903 11:35:03.239451 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
904 11:35:03.246266 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
905 11:35:03.249217 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
906 11:35:03.252594 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
907 11:35:03.259144 3 2 12 |504 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
908 11:35:03.262590 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
909 11:35:03.265951 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
910 11:35:03.272328 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
911 11:35:03.276306 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
912 11:35:03.278934 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
913 11:35:03.285331 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
914 11:35:03.288594 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
915 11:35:03.292159 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
916 11:35:03.298487 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
917 11:35:03.301528 [Byte 0] Lead/lag Transition tap number (1)
918 11:35:03.305128 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
919 11:35:03.308266 [Byte 1] Lead/lag falling Transition (3, 3, 20)
920 11:35:03.314741 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
921 11:35:03.317966 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
922 11:35:03.321459 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
923 11:35:03.327926 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
924 11:35:03.331094 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
925 11:35:03.334427 3 4 12 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
926 11:35:03.341163 3 4 16 |707 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
927 11:35:03.344244 3 4 20 |3d3d 403 |(11 11)(11 11) |(1 1)(1 1)| 0
928 11:35:03.347701 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 11:35:03.354313 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 11:35:03.357615 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 11:35:03.360678 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 11:35:03.367188 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 11:35:03.370631 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 11:35:03.373823 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
935 11:35:03.380275 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
936 11:35:03.383573 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
937 11:35:03.386770 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
938 11:35:03.393439 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
939 11:35:03.396613 [Byte 0] Lead/lag falling Transition (3, 6, 0)
940 11:35:03.400183 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
941 11:35:03.406665 [Byte 1] Lead/lag falling Transition (3, 6, 4)
942 11:35:03.409647 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
943 11:35:03.412987 [Byte 0] Lead/lag Transition tap number (3)
944 11:35:03.416244 3 6 12 |404 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
945 11:35:03.422849 [Byte 1] Lead/lag Transition tap number (3)
946 11:35:03.426261 3 6 16 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
947 11:35:03.429411 [Byte 0]First pass (3, 6, 16)
948 11:35:03.432985 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 11:35:03.435955 [Byte 1]First pass (3, 6, 20)
950 11:35:03.439240 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 11:35:03.442214 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 11:35:03.445613 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 11:35:03.452184 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 11:35:03.455606 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
955 11:35:03.458886 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
956 11:35:03.462149 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
957 11:35:03.465314 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
958 11:35:03.471867 All bytes gating window > 1UI, Early break!
959 11:35:03.472254
960 11:35:03.475105 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
961 11:35:03.475533
962 11:35:03.478532 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 10)
963 11:35:03.478917
964 11:35:03.479217
965 11:35:03.479528
966 11:35:03.481701 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
967 11:35:03.482085
968 11:35:03.485025 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
969 11:35:03.488466
970 11:35:03.488850
971 11:35:03.489151 Write Rank0 MR1 =0x56
972 11:35:03.489432
973 11:35:03.491765 best RODT dly(2T, 0.5T) = (2, 3)
974 11:35:03.492151
975 11:35:03.495061 best RODT dly(2T, 0.5T) = (2, 3)
976 11:35:03.495743 ==
977 11:35:03.501268 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
978 11:35:03.504839 fsp= 1, odt_onoff= 1, Byte mode= 0
979 11:35:03.505257 ==
980 11:35:03.507999 Start DQ dly to find pass range UseTestEngine =0
981 11:35:03.511086 x-axis: bit #, y-axis: DQ dly (-127~63)
982 11:35:03.514469 RX Vref Scan = 0
983 11:35:03.517962 -26, [0] xxxxxxxx xxxxxxxx [MSB]
984 11:35:03.518358 -25, [0] xxxxxxxx xxxxxxxx [MSB]
985 11:35:03.521196 -24, [0] xxxxxxxx xxxxxxxx [MSB]
986 11:35:03.524547 -23, [0] xxxxxxxx xxxxxxxx [MSB]
987 11:35:03.527650 -22, [0] xxxxxxxx xxxxxxxx [MSB]
988 11:35:03.530747 -21, [0] xxxxxxxx xxxxxxxx [MSB]
989 11:35:03.534086 -20, [0] xxxxxxxx xxxxxxxx [MSB]
990 11:35:03.537431 -19, [0] xxxxxxxx xxxxxxxx [MSB]
991 11:35:03.540894 -18, [0] xxxxxxxx xxxxxxxx [MSB]
992 11:35:03.544049 -17, [0] xxxxxxxx xxxxxxxx [MSB]
993 11:35:03.544465 -16, [0] xxxxxxxx xxxxxxxx [MSB]
994 11:35:03.547186 -15, [0] xxxxxxxx xxxxxxxx [MSB]
995 11:35:03.550409 -14, [0] xxxxxxxx xxxxxxxx [MSB]
996 11:35:03.554347 -13, [0] xxxxxxxx xxxxxxxx [MSB]
997 11:35:03.557196 -12, [0] xxxxxxxx xxxxxxxx [MSB]
998 11:35:03.560497 -11, [0] xxxxxxxx xxxxxxxx [MSB]
999 11:35:03.563805 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1000 11:35:03.566889 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1001 11:35:03.570051 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1002 11:35:03.570445 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1003 11:35:03.573585 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1004 11:35:03.576733 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1005 11:35:03.580041 -4, [0] xxxxxxxx oxxxxxxx [MSB]
1006 11:35:03.583358 -3, [0] xxxxxxxx oxxxxxxx [MSB]
1007 11:35:03.586479 -2, [0] xxxoxxxx oxxoxxxx [MSB]
1008 11:35:03.589720 -1, [0] xxxoxxxx oxxoxxxx [MSB]
1009 11:35:03.590117 0, [0] xxxoxxxx ooxoooxx [MSB]
1010 11:35:03.593135 1, [0] xxxoxxxx ooxoooxx [MSB]
1011 11:35:03.596496 2, [0] xxxoxoox ooxoooox [MSB]
1012 11:35:03.599520 3, [0] xxxoxoox ooxoooox [MSB]
1013 11:35:03.602986 4, [0] xxxoxooo ooxooooo [MSB]
1014 11:35:03.606270 5, [0] xxxooooo ooxooooo [MSB]
1015 11:35:03.609621 6, [0] oooooooo ooxooooo [MSB]
1016 11:35:03.610014 7, [0] oooooooo ooxooooo [MSB]
1017 11:35:03.612840 32, [0] oooxoooo oooooooo [MSB]
1018 11:35:03.616158 33, [0] oooxoooo xooooooo [MSB]
1019 11:35:03.619314 34, [0] oooxoooo xooxoooo [MSB]
1020 11:35:03.622764 35, [0] oooxoooo xxoxoooo [MSB]
1021 11:35:03.625876 36, [0] oooxoxoo xxoxxoxo [MSB]
1022 11:35:03.629102 37, [0] oooxoxxo xxoxxxxo [MSB]
1023 11:35:03.629499 38, [0] oooxoxxx xxoxxxxo [MSB]
1024 11:35:03.632362 39, [0] oooxoxxx xxoxxxxx [MSB]
1025 11:35:03.635908 40, [0] ooxxxxxx xxoxxxxx [MSB]
1026 11:35:03.639008 41, [0] xxxxxxxx xxoxxxxx [MSB]
1027 11:35:03.642304 42, [0] xxxxxxxx xxxxxxxx [MSB]
1028 11:35:03.645584 iDelay=42, Bit 0, Center 23 (6 ~ 40) 35
1029 11:35:03.648803 iDelay=42, Bit 1, Center 23 (6 ~ 40) 35
1030 11:35:03.652211 iDelay=42, Bit 2, Center 22 (6 ~ 39) 34
1031 11:35:03.655274 iDelay=42, Bit 3, Center 14 (-2 ~ 31) 34
1032 11:35:03.658564 iDelay=42, Bit 4, Center 22 (5 ~ 39) 35
1033 11:35:03.661976 iDelay=42, Bit 5, Center 18 (2 ~ 35) 34
1034 11:35:03.668490 iDelay=42, Bit 6, Center 19 (2 ~ 36) 35
1035 11:35:03.671984 iDelay=42, Bit 7, Center 20 (4 ~ 37) 34
1036 11:35:03.674804 iDelay=42, Bit 8, Center 14 (-4 ~ 32) 37
1037 11:35:03.678279 iDelay=42, Bit 9, Center 17 (0 ~ 34) 35
1038 11:35:03.681540 iDelay=42, Bit 10, Center 24 (8 ~ 41) 34
1039 11:35:03.684753 iDelay=42, Bit 11, Center 15 (-2 ~ 33) 36
1040 11:35:03.688186 iDelay=42, Bit 12, Center 17 (0 ~ 35) 36
1041 11:35:03.691607 iDelay=42, Bit 13, Center 18 (0 ~ 36) 37
1042 11:35:03.694516 iDelay=42, Bit 14, Center 18 (2 ~ 35) 34
1043 11:35:03.697842 iDelay=42, Bit 15, Center 21 (4 ~ 38) 35
1044 11:35:03.701363 ==
1045 11:35:03.704268 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1046 11:35:03.707567 fsp= 1, odt_onoff= 1, Byte mode= 0
1047 11:35:03.707924 ==
1048 11:35:03.708203 DQS Delay:
1049 11:35:03.711026 DQS0 = 0, DQS1 = 0
1050 11:35:03.711377 DQM Delay:
1051 11:35:03.714458 DQM0 = 20, DQM1 = 18
1052 11:35:03.714809 DQ Delay:
1053 11:35:03.717687 DQ0 =23, DQ1 =23, DQ2 =22, DQ3 =14
1054 11:35:03.720702 DQ4 =22, DQ5 =18, DQ6 =19, DQ7 =20
1055 11:35:03.724224 DQ8 =14, DQ9 =17, DQ10 =24, DQ11 =15
1056 11:35:03.727228 DQ12 =17, DQ13 =18, DQ14 =18, DQ15 =21
1057 11:35:03.727735
1058 11:35:03.728056
1059 11:35:03.730697 DramC Write-DBI off
1060 11:35:03.731196 ==
1061 11:35:03.733789 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1062 11:35:03.737178 fsp= 1, odt_onoff= 1, Byte mode= 0
1063 11:35:03.737653 ==
1064 11:35:03.743606 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1065 11:35:03.744005
1066 11:35:03.746972 Begin, DQ Scan Range 923~1179
1067 11:35:03.747677
1068 11:35:03.748007
1069 11:35:03.748291 TX Vref Scan disable
1070 11:35:03.750318 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1071 11:35:03.753410 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1072 11:35:03.759896 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1073 11:35:03.763359 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1074 11:35:03.766608 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1075 11:35:03.769971 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1076 11:35:03.773123 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1077 11:35:03.776455 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1078 11:35:03.779929 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1079 11:35:03.783139 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1080 11:35:03.786156 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1081 11:35:03.789573 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1082 11:35:03.792753 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1083 11:35:03.795902 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1084 11:35:03.799195 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1085 11:35:03.805810 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1086 11:35:03.809110 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1087 11:35:03.812171 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1088 11:35:03.815618 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1089 11:35:03.818669 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1090 11:35:03.822007 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1091 11:35:03.825337 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1092 11:35:03.828592 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1093 11:35:03.831909 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1094 11:35:03.835051 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1095 11:35:03.838346 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1096 11:35:03.841526 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1097 11:35:03.844894 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1098 11:35:03.851577 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1099 11:35:03.854788 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1100 11:35:03.857978 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1101 11:35:03.861393 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1102 11:35:03.864747 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1103 11:35:03.867993 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1104 11:35:03.871373 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1105 11:35:03.874388 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1106 11:35:03.877719 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1107 11:35:03.881064 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1108 11:35:03.884218 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1109 11:35:03.887590 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1110 11:35:03.891138 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1111 11:35:03.894459 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1112 11:35:03.900972 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1113 11:35:03.904070 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1114 11:35:03.907446 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1115 11:35:03.910716 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1116 11:35:03.914057 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
1117 11:35:03.917091 970 |3 6 10|[0] xxxxxxxx ooxoxxxx [MSB]
1118 11:35:03.920670 971 |3 6 11|[0] xxxxxxxx ooxooxxx [MSB]
1119 11:35:03.923816 972 |3 6 12|[0] xxxxxxxx ooxoooxx [MSB]
1120 11:35:03.927336 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1121 11:35:03.930262 974 |3 6 14|[0] xxxxxxxx ooxoooox [MSB]
1122 11:35:03.933735 975 |3 6 15|[0] xxxxxxxx ooxooooo [MSB]
1123 11:35:03.936959 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1124 11:35:03.940003 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
1125 11:35:03.943378 978 |3 6 18|[0] xxxoooox oooooooo [MSB]
1126 11:35:03.949955 979 |3 6 19|[0] xoxooooo oooooooo [MSB]
1127 11:35:03.953236 980 |3 6 20|[0] xooooooo oooooooo [MSB]
1128 11:35:03.956589 981 |3 6 21|[0] xooooooo oooooooo [MSB]
1129 11:35:03.959888 990 |3 6 30|[0] oooooooo oooxoooo [MSB]
1130 11:35:03.962796 991 |3 6 31|[0] oooooooo xooxxxoo [MSB]
1131 11:35:03.966318 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1132 11:35:03.969922 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1133 11:35:03.973149 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1134 11:35:03.979313 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
1135 11:35:03.982562 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
1136 11:35:03.986090 997 |3 6 37|[0] oooxoooo xxxxxxxx [MSB]
1137 11:35:03.989312 998 |3 6 38|[0] oooxoxoo xxxxxxxx [MSB]
1138 11:35:03.992515 999 |3 6 39|[0] oooxoxxo xxxxxxxx [MSB]
1139 11:35:03.995690 1000 |3 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1140 11:35:03.998963 Byte0, DQ PI dly=988, DQM PI dly= 988
1141 11:35:04.002411 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
1142 11:35:04.002771
1143 11:35:04.008707 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
1144 11:35:04.009060
1145 11:35:04.012213 Byte1, DQ PI dly=981, DQM PI dly= 981
1146 11:35:04.015426 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 21)
1147 11:35:04.015824
1148 11:35:04.018725 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 21)
1149 11:35:04.019079
1150 11:35:04.021743 ==
1151 11:35:04.025466 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1152 11:35:04.028432 fsp= 1, odt_onoff= 1, Byte mode= 0
1153 11:35:04.028904 ==
1154 11:35:04.031887 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1155 11:35:04.032325
1156 11:35:04.035001 Begin, DQ Scan Range 957~1021
1157 11:35:04.038176 Write Rank0 MR14 =0x0
1158 11:35:04.045943
1159 11:35:04.046391 CH=0, VrefRange= 0, VrefLevel = 0
1160 11:35:04.052520 TX Bit0 (984~995) 12 989, Bit8 (970~985) 16 977,
1161 11:35:04.055630 TX Bit1 (983~994) 12 988, Bit9 (973~987) 15 980,
1162 11:35:04.062312 TX Bit2 (983~995) 13 989, Bit10 (978~991) 14 984,
1163 11:35:04.065618 TX Bit3 (977~991) 15 984, Bit11 (972~984) 13 978,
1164 11:35:04.068666 TX Bit4 (982~993) 12 987, Bit12 (975~985) 11 980,
1165 11:35:04.075190 TX Bit5 (979~992) 14 985, Bit13 (976~985) 10 980,
1166 11:35:04.078673 TX Bit6 (979~992) 14 985, Bit14 (975~989) 15 982,
1167 11:35:04.084869 TX Bit7 (982~994) 13 988, Bit15 (977~991) 15 984,
1168 11:35:04.085329
1169 11:35:04.085710 Write Rank0 MR14 =0x2
1170 11:35:04.094073
1171 11:35:04.094598 CH=0, VrefRange= 0, VrefLevel = 2
1172 11:35:04.100522 TX Bit0 (984~995) 12 989, Bit8 (970~986) 17 978,
1173 11:35:04.103838 TX Bit1 (982~995) 14 988, Bit9 (973~988) 16 980,
1174 11:35:04.110312 TX Bit2 (983~996) 14 989, Bit10 (977~992) 16 984,
1175 11:35:04.113709 TX Bit3 (977~992) 16 984, Bit11 (972~984) 13 978,
1176 11:35:04.116883 TX Bit4 (982~994) 13 988, Bit12 (975~986) 12 980,
1177 11:35:04.123539 TX Bit5 (978~993) 16 985, Bit13 (975~986) 12 980,
1178 11:35:04.126507 TX Bit6 (979~993) 15 986, Bit14 (975~989) 15 982,
1179 11:35:04.133049 TX Bit7 (983~995) 13 989, Bit15 (977~992) 16 984,
1180 11:35:04.133440
1181 11:35:04.133833 Write Rank0 MR14 =0x4
1182 11:35:04.142013
1183 11:35:04.142512 CH=0, VrefRange= 0, VrefLevel = 4
1184 11:35:04.148843 TX Bit0 (983~996) 14 989, Bit8 (970~987) 18 978,
1185 11:35:04.151680 TX Bit1 (981~996) 16 988, Bit9 (973~989) 17 981,
1186 11:35:04.158580 TX Bit2 (982~997) 16 989, Bit10 (977~992) 16 984,
1187 11:35:04.161729 TX Bit3 (977~992) 16 984, Bit11 (971~986) 16 978,
1188 11:35:04.165082 TX Bit4 (981~994) 14 987, Bit12 (974~987) 14 980,
1189 11:35:04.171615 TX Bit5 (978~993) 16 985, Bit13 (975~987) 13 981,
1190 11:35:04.174577 TX Bit6 (979~993) 15 986, Bit14 (975~990) 16 982,
1191 11:35:04.181024 TX Bit7 (981~996) 16 988, Bit15 (976~992) 17 984,
1192 11:35:04.181111
1193 11:35:04.181218 Write Rank0 MR14 =0x6
1194 11:35:04.190412
1195 11:35:04.190495 CH=0, VrefRange= 0, VrefLevel = 6
1196 11:35:04.196712 TX Bit0 (983~998) 16 990, Bit8 (969~988) 20 978,
1197 11:35:04.200005 TX Bit1 (981~998) 18 989, Bit9 (972~989) 18 980,
1198 11:35:04.206611 TX Bit2 (983~998) 16 990, Bit10 (977~993) 17 985,
1199 11:35:04.209907 TX Bit3 (977~992) 16 984, Bit11 (971~987) 17 979,
1200 11:35:04.213355 TX Bit4 (981~996) 16 988, Bit12 (974~988) 15 981,
1201 11:35:04.263878 TX Bit5 (978~993) 16 985, Bit13 (974~988) 15 981,
1202 11:35:04.264146 TX Bit6 (978~994) 17 986, Bit14 (974~991) 18 982,
1203 11:35:04.264415 TX Bit7 (981~997) 17 989, Bit15 (977~993) 17 985,
1204 11:35:04.264485
1205 11:35:04.264554 Write Rank0 MR14 =0x8
1206 11:35:04.264616
1207 11:35:04.264856 CH=0, VrefRange= 0, VrefLevel = 8
1208 11:35:04.264920 TX Bit0 (983~998) 16 990, Bit8 (969~989) 21 979,
1209 11:35:04.265170 TX Bit1 (981~998) 18 989, Bit9 (971~989) 19 980,
1210 11:35:04.265249 TX Bit2 (982~999) 18 990, Bit10 (977~994) 18 985,
1211 11:35:04.265317 TX Bit3 (976~993) 18 984, Bit11 (970~988) 19 979,
1212 11:35:04.265584 TX Bit4 (980~997) 18 988, Bit12 (973~989) 17 981,
1213 11:35:04.296406 TX Bit5 (978~994) 17 986, Bit13 (974~989) 16 981,
1214 11:35:04.296788 TX Bit6 (978~995) 18 986, Bit14 (974~991) 18 982,
1215 11:35:04.297063 TX Bit7 (981~997) 17 989, Bit15 (976~994) 19 985,
1216 11:35:04.297134
1217 11:35:04.297196 Write Rank0 MR14 =0xa
1218 11:35:04.297257
1219 11:35:04.297326 CH=0, VrefRange= 0, VrefLevel = 10
1220 11:35:04.297385 TX Bit0 (982~999) 18 990, Bit8 (969~989) 21 979,
1221 11:35:04.300219 TX Bit1 (980~999) 20 989, Bit9 (971~989) 19 980,
1222 11:35:04.303423 TX Bit2 (983~999) 17 991, Bit10 (976~995) 20 985,
1223 11:35:04.306825 TX Bit3 (976~993) 18 984, Bit11 (970~988) 19 979,
1224 11:35:04.310346 TX Bit4 (980~997) 18 988, Bit12 (973~989) 17 981,
1225 11:35:04.316561 TX Bit5 (978~994) 17 986, Bit13 (973~989) 17 981,
1226 11:35:04.320006 TX Bit6 (978~996) 19 987, Bit14 (974~992) 19 983,
1227 11:35:04.326296 TX Bit7 (980~999) 20 989, Bit15 (976~996) 21 986,
1228 11:35:04.326376
1229 11:35:04.326441 Write Rank0 MR14 =0xc
1230 11:35:04.336086
1231 11:35:04.339431 CH=0, VrefRange= 0, VrefLevel = 12
1232 11:35:04.342475 TX Bit0 (982~999) 18 990, Bit8 (969~990) 22 979,
1233 11:35:04.345978 TX Bit1 (980~999) 20 989, Bit9 (971~990) 20 980,
1234 11:35:04.352307 TX Bit2 (981~999) 19 990, Bit10 (976~996) 21 986,
1235 11:35:04.355743 TX Bit3 (976~993) 18 984, Bit11 (970~989) 20 979,
1236 11:35:04.359055 TX Bit4 (979~998) 20 988, Bit12 (972~989) 18 980,
1237 11:35:04.365633 TX Bit5 (978~996) 19 987, Bit13 (972~990) 19 981,
1238 11:35:04.368624 TX Bit6 (978~997) 20 987, Bit14 (974~992) 19 983,
1239 11:35:04.375186 TX Bit7 (979~999) 21 989, Bit15 (976~996) 21 986,
1240 11:35:04.375264
1241 11:35:04.375332 Write Rank0 MR14 =0xe
1242 11:35:04.384966
1243 11:35:04.388185 CH=0, VrefRange= 0, VrefLevel = 14
1244 11:35:04.391216 TX Bit0 (982~1000) 19 991, Bit8 (969~990) 22 979,
1245 11:35:04.394646 TX Bit1 (980~999) 20 989, Bit9 (970~990) 21 980,
1246 11:35:04.401480 TX Bit2 (981~1000) 20 990, Bit10 (976~997) 22 986,
1247 11:35:04.404444 TX Bit3 (976~994) 19 985, Bit11 (969~989) 21 979,
1248 11:35:04.407719 TX Bit4 (979~999) 21 989, Bit12 (972~990) 19 981,
1249 11:35:04.414613 TX Bit5 (977~996) 20 986, Bit13 (972~990) 19 981,
1250 11:35:04.418171 TX Bit6 (978~998) 21 988, Bit14 (973~993) 21 983,
1251 11:35:04.424215 TX Bit7 (980~1000) 21 990, Bit15 (976~996) 21 986,
1252 11:35:04.424498
1253 11:35:04.424698 Write Rank0 MR14 =0x10
1254 11:35:04.434205
1255 11:35:04.437718 CH=0, VrefRange= 0, VrefLevel = 16
1256 11:35:04.441144 TX Bit0 (982~1000) 19 991, Bit8 (969~990) 22 979,
1257 11:35:04.444025 TX Bit1 (979~1000) 22 989, Bit9 (970~991) 22 980,
1258 11:35:04.450635 TX Bit2 (980~1000) 21 990, Bit10 (976~997) 22 986,
1259 11:35:04.454077 TX Bit3 (975~994) 20 984, Bit11 (969~989) 21 979,
1260 11:35:04.460389 TX Bit4 (979~999) 21 989, Bit12 (971~990) 20 980,
1261 11:35:04.463816 TX Bit5 (977~996) 20 986, Bit13 (972~990) 19 981,
1262 11:35:04.467195 TX Bit6 (977~999) 23 988, Bit14 (972~993) 22 982,
1263 11:35:04.473512 TX Bit7 (979~1000) 22 989, Bit15 (975~997) 23 986,
1264 11:35:04.473905
1265 11:35:04.474210 Write Rank0 MR14 =0x12
1266 11:35:04.483380
1267 11:35:04.487008 CH=0, VrefRange= 0, VrefLevel = 18
1268 11:35:04.490050 TX Bit0 (981~1000) 20 990, Bit8 (968~991) 24 979,
1269 11:35:04.493483 TX Bit1 (979~1000) 22 989, Bit9 (970~991) 22 980,
1270 11:35:04.499770 TX Bit2 (980~1000) 21 990, Bit10 (976~997) 22 986,
1271 11:35:04.503141 TX Bit3 (975~994) 20 984, Bit11 (969~990) 22 979,
1272 11:35:04.509580 TX Bit4 (978~999) 22 988, Bit12 (971~991) 21 981,
1273 11:35:04.513021 TX Bit5 (977~998) 22 987, Bit13 (971~991) 21 981,
1274 11:35:04.516195 TX Bit6 (977~999) 23 988, Bit14 (972~994) 23 983,
1275 11:35:04.523225 TX Bit7 (979~1000) 22 989, Bit15 (975~997) 23 986,
1276 11:35:04.523796
1277 11:35:04.524123 Write Rank0 MR14 =0x14
1278 11:35:04.533244
1279 11:35:04.536204 CH=0, VrefRange= 0, VrefLevel = 20
1280 11:35:04.539219 TX Bit0 (982~1001) 20 991, Bit8 (968~991) 24 979,
1281 11:35:04.542434 TX Bit1 (978~1000) 23 989, Bit9 (969~991) 23 980,
1282 11:35:04.549474 TX Bit2 (980~1001) 22 990, Bit10 (975~998) 24 986,
1283 11:35:04.552496 TX Bit3 (975~995) 21 985, Bit11 (969~990) 22 979,
1284 11:35:04.559293 TX Bit4 (978~1000) 23 989, Bit12 (971~991) 21 981,
1285 11:35:04.562446 TX Bit5 (977~998) 22 987, Bit13 (971~991) 21 981,
1286 11:35:04.565792 TX Bit6 (977~999) 23 988, Bit14 (972~994) 23 983,
1287 11:35:04.572366 TX Bit7 (979~1001) 23 990, Bit15 (975~997) 23 986,
1288 11:35:04.572759
1289 11:35:04.573063 Write Rank0 MR14 =0x16
1290 11:35:04.582595
1291 11:35:04.585687 CH=0, VrefRange= 0, VrefLevel = 22
1292 11:35:04.588874 TX Bit0 (980~1001) 22 990, Bit8 (968~991) 24 979,
1293 11:35:04.592169 TX Bit1 (979~1001) 23 990, Bit9 (969~992) 24 980,
1294 11:35:04.598722 TX Bit2 (980~1001) 22 990, Bit10 (975~998) 24 986,
1295 11:35:04.602215 TX Bit3 (975~995) 21 985, Bit11 (969~991) 23 980,
1296 11:35:04.608636 TX Bit4 (978~1000) 23 989, Bit12 (970~992) 23 981,
1297 11:35:04.611923 TX Bit5 (977~998) 22 987, Bit13 (970~991) 22 980,
1298 11:35:04.615296 TX Bit6 (977~1000) 24 988, Bit14 (971~995) 25 983,
1299 11:35:04.621856 TX Bit7 (978~1001) 24 989, Bit15 (974~997) 24 985,
1300 11:35:04.622245
1301 11:35:04.622593 Write Rank0 MR14 =0x18
1302 11:35:04.631834
1303 11:35:04.635226 CH=0, VrefRange= 0, VrefLevel = 24
1304 11:35:04.638535 TX Bit0 (979~1001) 23 990, Bit8 (968~991) 24 979,
1305 11:35:04.641871 TX Bit1 (978~1001) 24 989, Bit9 (969~993) 25 981,
1306 11:35:04.648420 TX Bit2 (979~1001) 23 990, Bit10 (975~998) 24 986,
1307 11:35:04.651751 TX Bit3 (975~996) 22 985, Bit11 (969~991) 23 980,
1308 11:35:04.658227 TX Bit4 (978~1000) 23 989, Bit12 (970~992) 23 981,
1309 11:35:04.661367 TX Bit5 (977~999) 23 988, Bit13 (970~992) 23 981,
1310 11:35:04.664955 TX Bit6 (977~1000) 24 988, Bit14 (971~996) 26 983,
1311 11:35:04.671018 TX Bit7 (978~1001) 24 989, Bit15 (974~998) 25 986,
1312 11:35:04.671622
1313 11:35:04.672112 Write Rank0 MR14 =0x1a
1314 11:35:04.681897
1315 11:35:04.684857 CH=0, VrefRange= 0, VrefLevel = 26
1316 11:35:04.688333 TX Bit0 (980~1002) 23 991, Bit8 (968~991) 24 979,
1317 11:35:04.691772 TX Bit1 (978~1001) 24 989, Bit9 (969~993) 25 981,
1318 11:35:04.697946 TX Bit2 (979~1002) 24 990, Bit10 (974~998) 25 986,
1319 11:35:04.701369 TX Bit3 (975~997) 23 986, Bit11 (968~991) 24 979,
1320 11:35:04.707887 TX Bit4 (978~1000) 23 989, Bit12 (970~993) 24 981,
1321 11:35:04.711031 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
1322 11:35:04.714594 TX Bit6 (977~1000) 24 988, Bit14 (970~996) 27 983,
1323 11:35:04.720852 TX Bit7 (978~1002) 25 990, Bit15 (974~998) 25 986,
1324 11:35:04.721248
1325 11:35:04.721553 Write Rank0 MR14 =0x1c
1326 11:35:04.731507
1327 11:35:04.734824 CH=0, VrefRange= 0, VrefLevel = 28
1328 11:35:04.738091 TX Bit0 (979~1003) 25 991, Bit8 (968~991) 24 979,
1329 11:35:04.741551 TX Bit1 (978~1002) 25 990, Bit9 (969~993) 25 981,
1330 11:35:04.747875 TX Bit2 (979~1002) 24 990, Bit10 (974~998) 25 986,
1331 11:35:04.751315 TX Bit3 (974~997) 24 985, Bit11 (968~992) 25 980,
1332 11:35:04.757617 TX Bit4 (977~1001) 25 989, Bit12 (970~993) 24 981,
1333 11:35:04.760845 TX Bit5 (976~999) 24 987, Bit13 (970~993) 24 981,
1334 11:35:04.764192 TX Bit6 (977~1000) 24 988, Bit14 (970~996) 27 983,
1335 11:35:04.770817 TX Bit7 (978~1002) 25 990, Bit15 (973~998) 26 985,
1336 11:35:04.771212
1337 11:35:04.771589 Write Rank0 MR14 =0x1e
1338 11:35:04.781247
1339 11:35:04.784530 CH=0, VrefRange= 0, VrefLevel = 30
1340 11:35:04.787775 TX Bit0 (979~1003) 25 991, Bit8 (968~991) 24 979,
1341 11:35:04.791389 TX Bit1 (978~1002) 25 990, Bit9 (969~993) 25 981,
1342 11:35:04.797608 TX Bit2 (979~1002) 24 990, Bit10 (974~998) 25 986,
1343 11:35:04.801079 TX Bit3 (974~997) 24 985, Bit11 (968~992) 25 980,
1344 11:35:04.807725 TX Bit4 (977~1001) 25 989, Bit12 (970~993) 24 981,
1345 11:35:04.810961 TX Bit5 (976~999) 24 987, Bit13 (970~993) 24 981,
1346 11:35:04.814302 TX Bit6 (977~1000) 24 988, Bit14 (970~996) 27 983,
1347 11:35:04.820576 TX Bit7 (978~1002) 25 990, Bit15 (973~998) 26 985,
1348 11:35:04.821096
1349 11:35:04.824045 wait MRW command Rank0 MR14 =0x20 fired (1)
1350 11:35:04.827149 Write Rank0 MR14 =0x20
1351 11:35:04.835225
1352 11:35:04.838747 CH=0, VrefRange= 0, VrefLevel = 32
1353 11:35:04.841801 TX Bit0 (979~1003) 25 991, Bit8 (968~991) 24 979,
1354 11:35:04.845121 TX Bit1 (978~1002) 25 990, Bit9 (969~993) 25 981,
1355 11:35:04.851906 TX Bit2 (979~1002) 24 990, Bit10 (974~998) 25 986,
1356 11:35:04.855532 TX Bit3 (974~997) 24 985, Bit11 (968~992) 25 980,
1357 11:35:04.861723 TX Bit4 (977~1001) 25 989, Bit12 (970~993) 24 981,
1358 11:35:04.864781 TX Bit5 (976~999) 24 987, Bit13 (970~993) 24 981,
1359 11:35:04.868237 TX Bit6 (977~1000) 24 988, Bit14 (970~996) 27 983,
1360 11:35:04.874351 TX Bit7 (978~1002) 25 990, Bit15 (973~998) 26 985,
1361 11:35:04.874819
1362 11:35:04.875299 Write Rank0 MR14 =0x22
1363 11:35:04.885150
1364 11:35:04.888395 CH=0, VrefRange= 0, VrefLevel = 34
1365 11:35:04.891816 TX Bit0 (979~1003) 25 991, Bit8 (968~991) 24 979,
1366 11:35:04.895191 TX Bit1 (978~1002) 25 990, Bit9 (969~993) 25 981,
1367 11:35:04.901590 TX Bit2 (979~1002) 24 990, Bit10 (974~998) 25 986,
1368 11:35:04.905021 TX Bit3 (974~997) 24 985, Bit11 (968~992) 25 980,
1369 11:35:04.911569 TX Bit4 (977~1001) 25 989, Bit12 (970~993) 24 981,
1370 11:35:04.914832 TX Bit5 (976~999) 24 987, Bit13 (970~993) 24 981,
1371 11:35:04.918045 TX Bit6 (977~1000) 24 988, Bit14 (970~996) 27 983,
1372 11:35:04.924512 TX Bit7 (978~1002) 25 990, Bit15 (973~998) 26 985,
1373 11:35:04.925184
1374 11:35:04.925694 Write Rank0 MR14 =0x24
1375 11:35:04.934870
1376 11:35:04.938286 CH=0, VrefRange= 0, VrefLevel = 36
1377 11:35:04.941951 TX Bit0 (979~1003) 25 991, Bit8 (968~991) 24 979,
1378 11:35:04.945033 TX Bit1 (978~1002) 25 990, Bit9 (969~993) 25 981,
1379 11:35:04.951161 TX Bit2 (979~1002) 24 990, Bit10 (974~998) 25 986,
1380 11:35:04.954527 TX Bit3 (974~997) 24 985, Bit11 (968~992) 25 980,
1381 11:35:04.961080 TX Bit4 (977~1001) 25 989, Bit12 (970~993) 24 981,
1382 11:35:04.964678 TX Bit5 (976~999) 24 987, Bit13 (970~993) 24 981,
1383 11:35:04.967700 TX Bit6 (977~1000) 24 988, Bit14 (970~996) 27 983,
1384 11:35:04.974177 TX Bit7 (978~1002) 25 990, Bit15 (973~998) 26 985,
1385 11:35:04.974509
1386 11:35:04.974792
1387 11:35:04.977623 TX Vref found, early break! 374< 376
1388 11:35:04.981019 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
1389 11:35:04.984219 u1DelayCellOfst[0]=7 cells (6 PI)
1390 11:35:04.987510 u1DelayCellOfst[1]=6 cells (5 PI)
1391 11:35:04.990774 u1DelayCellOfst[2]=6 cells (5 PI)
1392 11:35:04.994074 u1DelayCellOfst[3]=0 cells (0 PI)
1393 11:35:04.997260 u1DelayCellOfst[4]=5 cells (4 PI)
1394 11:35:05.000507 u1DelayCellOfst[5]=2 cells (2 PI)
1395 11:35:05.003897 u1DelayCellOfst[6]=3 cells (3 PI)
1396 11:35:05.007172 u1DelayCellOfst[7]=6 cells (5 PI)
1397 11:35:05.010461 Byte0, DQ PI dly=985, DQM PI dly= 988
1398 11:35:05.013643 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1399 11:35:05.014123
1400 11:35:05.016879 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1401 11:35:05.017413
1402 11:35:05.020260 u1DelayCellOfst[8]=0 cells (0 PI)
1403 11:35:05.023726 u1DelayCellOfst[9]=2 cells (2 PI)
1404 11:35:05.026657 u1DelayCellOfst[10]=9 cells (7 PI)
1405 11:35:05.030127 u1DelayCellOfst[11]=1 cells (1 PI)
1406 11:35:05.033574 u1DelayCellOfst[12]=2 cells (2 PI)
1407 11:35:05.036794 u1DelayCellOfst[13]=2 cells (2 PI)
1408 11:35:05.039946 u1DelayCellOfst[14]=5 cells (4 PI)
1409 11:35:05.043085 u1DelayCellOfst[15]=7 cells (6 PI)
1410 11:35:05.046627 Byte1, DQ PI dly=979, DQM PI dly= 982
1411 11:35:05.049833 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1412 11:35:05.050282
1413 11:35:05.056332 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1414 11:35:05.056817
1415 11:35:05.057228 Write Rank0 MR14 =0x1c
1416 11:35:05.057630
1417 11:35:05.059744 Final TX Range 0 Vref 28
1418 11:35:05.060130
1419 11:35:05.066316 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1420 11:35:05.066676
1421 11:35:05.072852 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1422 11:35:05.079253 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1423 11:35:05.085605 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1424 11:35:05.088925 Write Rank0 MR3 =0xb0
1425 11:35:05.092466 DramC Write-DBI on
1426 11:35:05.092824 ==
1427 11:35:05.095769 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1428 11:35:05.098833 fsp= 1, odt_onoff= 1, Byte mode= 0
1429 11:35:05.099262 ==
1430 11:35:05.105337 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1431 11:35:05.105693
1432 11:35:05.105970 Begin, DQ Scan Range 702~766
1433 11:35:05.106229
1434 11:35:05.106471
1435 11:35:05.108719 TX Vref Scan disable
1436 11:35:05.112038 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1437 11:35:05.115181 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1438 11:35:05.118312 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1439 11:35:05.121802 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1440 11:35:05.125265 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1441 11:35:05.128116 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1442 11:35:05.134839 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1443 11:35:05.138151 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1444 11:35:05.141488 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1445 11:35:05.144609 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1446 11:35:05.148037 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1447 11:35:05.151435 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1448 11:35:05.154508 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1449 11:35:05.157675 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1450 11:35:05.161040 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1451 11:35:05.164399 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
1452 11:35:05.167626 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
1453 11:35:05.170780 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
1454 11:35:05.173999 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
1455 11:35:05.182920 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1456 11:35:05.186266 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1457 11:35:05.189724 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1458 11:35:05.193075 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1459 11:35:05.196117 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1460 11:35:05.199493 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
1461 11:35:05.202484 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
1462 11:35:05.206053 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
1463 11:35:05.209358 747 |2 6 43|[0] xxxxxxxx xxxxxxxx [MSB]
1464 11:35:05.212457 Byte0, DQ PI dly=733, DQM PI dly= 733
1465 11:35:05.218880 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 29)
1466 11:35:05.219272
1467 11:35:05.221966 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 29)
1468 11:35:05.222051
1469 11:35:05.225293 Byte1, DQ PI dly=725, DQM PI dly= 725
1470 11:35:05.228467 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 21)
1471 11:35:05.228553
1472 11:35:05.235249 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 21)
1473 11:35:05.235362
1474 11:35:05.241751 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1475 11:35:05.248033 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1476 11:35:05.254825 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1477 11:35:05.258184 Write Rank0 MR3 =0x30
1478 11:35:05.258300 DramC Write-DBI off
1479 11:35:05.258401
1480 11:35:05.258495 [DATLAT]
1481 11:35:05.261378 Freq=1600, CH0 RK0, use_rxtx_scan=0
1482 11:35:05.261451
1483 11:35:05.264565 DATLAT Default: 0xf
1484 11:35:05.267747 7, 0xFFFF, sum=0
1485 11:35:05.267820 8, 0xFFFF, sum=0
1486 11:35:05.267883 9, 0xFFFF, sum=0
1487 11:35:05.271244 10, 0xFFFF, sum=0
1488 11:35:05.271320 11, 0xFFFF, sum=0
1489 11:35:05.274240 12, 0xFFFF, sum=0
1490 11:35:05.274344 13, 0xFFFF, sum=0
1491 11:35:05.277561 14, 0x0, sum=1
1492 11:35:05.277662 15, 0x0, sum=2
1493 11:35:05.280935 16, 0x0, sum=3
1494 11:35:05.281037 17, 0x0, sum=4
1495 11:35:05.284425 pattern=2 first_step=14 total pass=5 best_step=16
1496 11:35:05.287548 ==
1497 11:35:05.291220 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1498 11:35:05.293838 fsp= 1, odt_onoff= 1, Byte mode= 0
1499 11:35:05.293952 ==
1500 11:35:05.297219 Start DQ dly to find pass range UseTestEngine =1
1501 11:35:05.303871 x-axis: bit #, y-axis: DQ dly (-127~63)
1502 11:35:05.303953 RX Vref Scan = 1
1503 11:35:05.411072
1504 11:35:05.411188 RX Vref found, early break!
1505 11:35:05.411275
1506 11:35:05.417574 Final RX Vref 11, apply to both rank0 and 1
1507 11:35:05.417658 ==
1508 11:35:05.421217 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1509 11:35:05.424176 fsp= 1, odt_onoff= 1, Byte mode= 0
1510 11:35:05.424288 ==
1511 11:35:05.427637 DQS Delay:
1512 11:35:05.427711 DQS0 = 0, DQS1 = 0
1513 11:35:05.427774 DQM Delay:
1514 11:35:05.430852 DQM0 = 19, DQM1 = 17
1515 11:35:05.430924 DQ Delay:
1516 11:35:05.434434 DQ0 =22, DQ1 =22, DQ2 =23, DQ3 =14
1517 11:35:05.437471 DQ4 =22, DQ5 =18, DQ6 =18, DQ7 =20
1518 11:35:05.440488 DQ8 =13, DQ9 =17, DQ10 =23, DQ11 =15
1519 11:35:05.443863 DQ12 =17, DQ13 =16, DQ14 =18, DQ15 =20
1520 11:35:05.443943
1521 11:35:05.444005
1522 11:35:05.444063
1523 11:35:05.447304 [DramC_TX_OE_Calibration] TA2
1524 11:35:05.450708 Original DQ_B0 (3 6) =30, OEN = 27
1525 11:35:05.453570 Original DQ_B1 (3 6) =30, OEN = 27
1526 11:35:05.456884 23, 0x0, End_B0=23 End_B1=23
1527 11:35:05.460273 24, 0x0, End_B0=24 End_B1=24
1528 11:35:05.460349 25, 0x0, End_B0=25 End_B1=25
1529 11:35:05.463531 26, 0x0, End_B0=26 End_B1=26
1530 11:35:05.466827 27, 0x0, End_B0=27 End_B1=27
1531 11:35:05.470284 28, 0x0, End_B0=28 End_B1=28
1532 11:35:05.473228 29, 0x0, End_B0=29 End_B1=29
1533 11:35:05.473310 30, 0x0, End_B0=30 End_B1=30
1534 11:35:05.476931 31, 0xFFFF, End_B0=30 End_B1=30
1535 11:35:05.483280 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1536 11:35:05.489567 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1537 11:35:05.489648
1538 11:35:05.489715
1539 11:35:05.489786 Write Rank0 MR23 =0x3f
1540 11:35:05.492917 [DQSOSC]
1541 11:35:05.499561 [DQSOSCAuto] RK0, (LSB)MR18= 0xc1c1, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
1542 11:35:05.506057 CH0_RK0: MR19=0x202, MR18=0xC1C1, DQSOSC=446, MR23=63, INC=12, DEC=18
1543 11:35:05.509463 Write Rank0 MR23 =0x3f
1544 11:35:05.509539 [DQSOSC]
1545 11:35:05.515860 [DQSOSCAuto] RK0, (LSB)MR18= 0xc1c1, (MSB)MR19= 0x202, tDQSOscB0 = 446 ps tDQSOscB1 = 446 ps
1546 11:35:05.519257 CH0 RK0: MR19=202, MR18=C1C1
1547 11:35:05.522473 [RankSwap] Rank num 2, (Multi 1), Rank 1
1548 11:35:05.525666 Write Rank0 MR2 =0xad
1549 11:35:05.525742 [Write Leveling]
1550 11:35:05.529135 delay byte0 byte1 byte2 byte3
1551 11:35:05.529211
1552 11:35:05.532374 10 0 0
1553 11:35:05.532493 11 0 0
1554 11:35:05.535471 12 0 0
1555 11:35:05.535548 13 0 0
1556 11:35:05.535613 14 0 0
1557 11:35:05.538960 15 0 0
1558 11:35:05.539061 16 0 0
1559 11:35:05.542179 17 0 0
1560 11:35:05.542259 18 0 0
1561 11:35:05.542324 19 0 0
1562 11:35:05.545458 20 0 0
1563 11:35:05.545532 21 0 0
1564 11:35:05.548510 22 0 0
1565 11:35:05.548590 23 0 ff
1566 11:35:05.551940 24 0 ff
1567 11:35:05.552012 25 0 ff
1568 11:35:05.555184 26 0 ff
1569 11:35:05.555284 27 ff ff
1570 11:35:05.555392 28 ff ff
1571 11:35:05.558357 29 ff ff
1572 11:35:05.558439 30 ff ff
1573 11:35:05.561769 31 ff ff
1574 11:35:05.561847 32 ff ff
1575 11:35:05.565246 33 ff ff
1576 11:35:05.568368 pass bytecount = 0xff (0xff: all bytes pass)
1577 11:35:05.568443
1578 11:35:05.568506 DQS0 dly: 27
1579 11:35:05.571720 DQS1 dly: 23
1580 11:35:05.571792 Write Rank0 MR2 =0x2d
1581 11:35:05.578156 [RankSwap] Rank num 2, (Multi 1), Rank 0
1582 11:35:05.578236 Write Rank1 MR1 =0xd6
1583 11:35:05.578301 [Gating]
1584 11:35:05.581309 ==
1585 11:35:05.584786 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1586 11:35:05.588126 fsp= 1, odt_onoff= 1, Byte mode= 0
1587 11:35:05.588214 ==
1588 11:35:05.591366 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1589 11:35:05.598047 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1590 11:35:05.601010 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1591 11:35:05.604207 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(0 0)(1 1)| 0
1592 11:35:05.610971 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(0 0)| 0
1593 11:35:05.614139 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1594 11:35:05.617531 [Byte 1] Lead/lag falling Transition (3, 1, 20)
1595 11:35:05.623814 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
1596 11:35:05.627394 [Byte 0] Lead/lag falling Transition (3, 1, 24)
1597 11:35:05.630664 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1598 11:35:05.637070 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1599 11:35:05.640384 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1600 11:35:05.643761 3 2 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1601 11:35:05.650525 3 2 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1602 11:35:05.653267 3 2 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1603 11:35:05.656592 [Byte 0] Lead/lag Transition tap number (7)
1604 11:35:05.659893 [Byte 1] Lead/lag Transition tap number (8)
1605 11:35:05.666469 3 2 20 |2b2a 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1606 11:35:05.669783 3 2 24 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1607 11:35:05.673181 3 2 28 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1608 11:35:05.679765 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1609 11:35:05.682786 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1610 11:35:05.686264 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1611 11:35:05.692606 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1612 11:35:05.696101 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
1613 11:35:05.699164 3 3 20 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1614 11:35:05.705820 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1615 11:35:05.708920 3 3 28 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1616 11:35:05.712329 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1617 11:35:05.718777 3 4 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1618 11:35:05.722215 3 4 8 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1619 11:35:05.725418 3 4 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1620 11:35:05.732175 3 4 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1621 11:35:05.735591 3 4 20 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1622 11:35:05.738648 3 4 24 |3d3d 2121 |(11 11)(11 11) |(1 1)(1 1)| 0
1623 11:35:05.745180 3 4 28 |3d3d 2828 |(11 11)(11 11) |(1 1)(1 1)| 0
1624 11:35:05.748752 3 5 0 |3d3d 1211 |(11 11)(11 11) |(1 1)(1 1)| 0
1625 11:35:05.751431 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1626 11:35:05.758147 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1627 11:35:05.761648 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1628 11:35:05.764698 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1629 11:35:05.771385 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1630 11:35:05.774440 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1631 11:35:05.778052 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1632 11:35:05.784388 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1633 11:35:05.787781 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1634 11:35:05.790851 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1635 11:35:05.797367 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1636 11:35:05.800675 [Byte 0] Lead/lag falling Transition (3, 6, 12)
1637 11:35:05.803962 3 6 16 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1638 11:35:05.807374 [Byte 0] Lead/lag Transition tap number (2)
1639 11:35:05.813841 [Byte 1] Lead/lag falling Transition (3, 6, 16)
1640 11:35:05.817156 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
1641 11:35:05.820433 [Byte 1] Lead/lag Transition tap number (2)
1642 11:35:05.823811 3 6 24 |2626 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1643 11:35:05.830375 3 6 28 |4646 2020 |(0 0)(1 1) |(0 0)(0 0)| 0
1644 11:35:05.833454 [Byte 0]First pass (3, 6, 28)
1645 11:35:05.836735 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1646 11:35:05.840181 [Byte 1]First pass (3, 7, 0)
1647 11:35:05.843538 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1648 11:35:05.846754 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1649 11:35:05.850000 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1650 11:35:05.853023 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1651 11:35:05.859773 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1652 11:35:05.863063 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1653 11:35:05.866179 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1654 11:35:05.869688 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1655 11:35:05.876200 All bytes gating window > 1UI, Early break!
1656 11:35:05.876311
1657 11:35:05.879432 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 16)
1658 11:35:05.879555
1659 11:35:05.882599 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 20)
1660 11:35:05.882713
1661 11:35:05.882811
1662 11:35:05.882904
1663 11:35:05.885832 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
1664 11:35:05.885945
1665 11:35:05.889208 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 20)
1666 11:35:05.889295
1667 11:35:05.892545
1668 11:35:05.892631 Write Rank1 MR1 =0x56
1669 11:35:05.892698
1670 11:35:05.895843 best RODT dly(2T, 0.5T) = (2, 3)
1671 11:35:05.895935
1672 11:35:05.898958 best RODT dly(2T, 0.5T) = (2, 3)
1673 11:35:05.899058 ==
1674 11:35:05.905509 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1675 11:35:05.909070 fsp= 1, odt_onoff= 1, Byte mode= 0
1676 11:35:05.909193 ==
1677 11:35:05.912567 Start DQ dly to find pass range UseTestEngine =0
1678 11:35:05.915404 x-axis: bit #, y-axis: DQ dly (-127~63)
1679 11:35:05.918803 RX Vref Scan = 0
1680 11:35:05.918917 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1681 11:35:05.921751 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1682 11:35:05.925023 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1683 11:35:05.928341 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1684 11:35:05.931597 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1685 11:35:05.934757 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1686 11:35:05.938143 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1687 11:35:05.941519 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1688 11:35:05.945163 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1689 11:35:05.948040 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1690 11:35:05.948142 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1691 11:35:05.951506 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1692 11:35:05.954458 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1693 11:35:05.957962 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1694 11:35:05.961236 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1695 11:35:05.964773 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1696 11:35:05.967838 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1697 11:35:05.971106 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1698 11:35:05.974729 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1699 11:35:05.974937 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1700 11:35:05.978031 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1701 11:35:05.980978 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1702 11:35:05.984086 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1703 11:35:05.987432 -3, [0] xxxoxxxx oxxoxxxx [MSB]
1704 11:35:05.990789 -2, [0] xxxoxxxx ooxooxxx [MSB]
1705 11:35:05.994119 -1, [0] xxxoxxxx ooxoooxx [MSB]
1706 11:35:05.994521 0, [0] xxxoxoox ooxoooxx [MSB]
1707 11:35:05.997470 1, [0] xxxoxoox ooxoooox [MSB]
1708 11:35:06.000708 2, [0] xxxoxoox ooxoooox [MSB]
1709 11:35:06.003944 3, [0] xxxooooo ooxoooox [MSB]
1710 11:35:06.007132 4, [0] ooxooooo ooxooooo [MSB]
1711 11:35:06.010327 5, [0] ooxooooo ooxooooo [MSB]
1712 11:35:06.010870 6, [0] oooooooo ooxooooo [MSB]
1713 11:35:06.013843 32, [0] oooxoooo oooooooo [MSB]
1714 11:35:06.017110 33, [0] oooxoooo xooooooo [MSB]
1715 11:35:06.020600 34, [0] oooxoooo xooooooo [MSB]
1716 11:35:06.024078 35, [0] oooxoooo xxoxoooo [MSB]
1717 11:35:06.027158 36, [0] oooxoxxo xxoxxoxo [MSB]
1718 11:35:06.030738 37, [0] oooxoxxx xxoxxxxo [MSB]
1719 11:35:06.033750 38, [0] oooxoxxx xxoxxxxo [MSB]
1720 11:35:06.034169 39, [0] ooxxxxxx xxoxxxxx [MSB]
1721 11:35:06.036851 40, [0] xoxxxxxx xxoxxxxx [MSB]
1722 11:35:06.040197 41, [0] xxxxxxxx xxoxxxxx [MSB]
1723 11:35:06.043602 42, [0] xxxxxxxx xxoxxxxx [MSB]
1724 11:35:06.046989 43, [0] xxxxxxxx xxxxxxxx [MSB]
1725 11:35:06.050055 iDelay=43, Bit 0, Center 21 (4 ~ 39) 36
1726 11:35:06.053205 iDelay=43, Bit 1, Center 22 (4 ~ 40) 37
1727 11:35:06.056562 iDelay=43, Bit 2, Center 22 (6 ~ 38) 33
1728 11:35:06.059660 iDelay=43, Bit 3, Center 14 (-3 ~ 31) 35
1729 11:35:06.063187 iDelay=43, Bit 4, Center 20 (3 ~ 38) 36
1730 11:35:06.066506 iDelay=43, Bit 5, Center 17 (0 ~ 35) 36
1731 11:35:06.069636 iDelay=43, Bit 6, Center 17 (0 ~ 35) 36
1732 11:35:06.076266 iDelay=43, Bit 7, Center 19 (3 ~ 36) 34
1733 11:35:06.079832 iDelay=43, Bit 8, Center 14 (-3 ~ 32) 36
1734 11:35:06.082743 iDelay=43, Bit 9, Center 16 (-2 ~ 34) 37
1735 11:35:06.086136 iDelay=43, Bit 10, Center 24 (7 ~ 42) 36
1736 11:35:06.089554 iDelay=43, Bit 11, Center 15 (-3 ~ 34) 38
1737 11:35:06.092457 iDelay=43, Bit 12, Center 16 (-2 ~ 35) 38
1738 11:35:06.096024 iDelay=43, Bit 13, Center 17 (-1 ~ 36) 38
1739 11:35:06.099099 iDelay=43, Bit 14, Center 18 (1 ~ 35) 35
1740 11:35:06.102288 iDelay=43, Bit 15, Center 21 (4 ~ 38) 35
1741 11:35:06.105880 ==
1742 11:35:06.109193 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1743 11:35:06.112273 fsp= 1, odt_onoff= 1, Byte mode= 0
1744 11:35:06.112638 ==
1745 11:35:06.112957 DQS Delay:
1746 11:35:06.115588 DQS0 = 0, DQS1 = 0
1747 11:35:06.116046 DQM Delay:
1748 11:35:06.118994 DQM0 = 19, DQM1 = 17
1749 11:35:06.119394 DQ Delay:
1750 11:35:06.122257 DQ0 =21, DQ1 =22, DQ2 =22, DQ3 =14
1751 11:35:06.125407 DQ4 =20, DQ5 =17, DQ6 =17, DQ7 =19
1752 11:35:06.128531 DQ8 =14, DQ9 =16, DQ10 =24, DQ11 =15
1753 11:35:06.132007 DQ12 =16, DQ13 =17, DQ14 =18, DQ15 =21
1754 11:35:06.132398
1755 11:35:06.132702
1756 11:35:06.135608 DramC Write-DBI off
1757 11:35:06.136005 ==
1758 11:35:06.138503 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1759 11:35:06.141928 fsp= 1, odt_onoff= 1, Byte mode= 0
1760 11:35:06.142324 ==
1761 11:35:06.148463 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1762 11:35:06.149028
1763 11:35:06.151645 Begin, DQ Scan Range 919~1175
1764 11:35:06.152237
1765 11:35:06.152624
1766 11:35:06.152973 TX Vref Scan disable
1767 11:35:06.154763 919 |3 4 23|[0] xxxxxxxx xxxxxxxx [MSB]
1768 11:35:06.158064 920 |3 4 24|[0] xxxxxxxx xxxxxxxx [MSB]
1769 11:35:06.164595 921 |3 4 25|[0] xxxxxxxx xxxxxxxx [MSB]
1770 11:35:06.168038 922 |3 4 26|[0] xxxxxxxx xxxxxxxx [MSB]
1771 11:35:06.171299 923 |3 4 27|[0] xxxxxxxx xxxxxxxx [MSB]
1772 11:35:06.174733 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1773 11:35:06.177796 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1774 11:35:06.181142 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1775 11:35:06.184440 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1776 11:35:06.187787 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1777 11:35:06.191173 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1778 11:35:06.194327 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1779 11:35:06.197584 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1780 11:35:06.200761 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1781 11:35:06.203986 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1782 11:35:06.210287 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1783 11:35:06.213842 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1784 11:35:06.217249 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1785 11:35:06.220444 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1786 11:35:06.223841 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1787 11:35:06.226977 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1788 11:35:06.230013 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1789 11:35:06.233491 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1790 11:35:06.236934 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1791 11:35:06.239853 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1792 11:35:06.243126 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1793 11:35:06.246342 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1794 11:35:06.253091 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1795 11:35:06.256667 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1796 11:35:06.259699 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1797 11:35:06.263392 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1798 11:35:06.266158 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1799 11:35:06.269329 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1800 11:35:06.272941 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1801 11:35:06.276190 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1802 11:35:06.279284 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1803 11:35:06.282629 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1804 11:35:06.286008 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1805 11:35:06.289306 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1806 11:35:06.292554 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1807 11:35:06.298950 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1808 11:35:06.302354 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1809 11:35:06.305351 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1810 11:35:06.308586 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1811 11:35:06.311951 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1812 11:35:06.315023 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1813 11:35:06.318573 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1814 11:35:06.321947 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1815 11:35:06.325543 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
1816 11:35:06.328205 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
1817 11:35:06.331700 969 |3 6 9|[0] xxxxxxxx oxxoxoxx [MSB]
1818 11:35:06.334938 970 |3 6 10|[0] xxxxxxxx ooxoooox [MSB]
1819 11:35:06.338113 971 |3 6 11|[0] xxxxxxxx ooxoooox [MSB]
1820 11:35:06.341373 972 |3 6 12|[0] xxxxxxxx ooxoooox [MSB]
1821 11:35:06.344652 973 |3 6 13|[0] xxxxxxxx ooxoooox [MSB]
1822 11:35:06.348173 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
1823 11:35:06.354916 975 |3 6 15|[0] xxxxxxxx oooooooo [MSB]
1824 11:35:06.357878 976 |3 6 16|[0] xxxxxxxx oooooooo [MSB]
1825 11:35:06.361232 977 |3 6 17|[0] xxxoxoox oooooooo [MSB]
1826 11:35:06.364262 987 |3 6 27|[0] oooooooo oooxoooo [MSB]
1827 11:35:06.367821 988 |3 6 28|[0] oooooooo oooxoooo [MSB]
1828 11:35:06.370850 989 |3 6 29|[0] oooooooo xooxoooo [MSB]
1829 11:35:06.374270 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1830 11:35:06.380881 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1831 11:35:06.384039 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1832 11:35:06.387267 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1833 11:35:06.390893 994 |3 6 34|[0] oooxoxoo xxxxxxxx [MSB]
1834 11:35:06.394060 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1835 11:35:06.397479 996 |3 6 36|[0] oooxoxxo xxxxxxxx [MSB]
1836 11:35:06.400428 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1837 11:35:06.403826 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1838 11:35:06.406914 Byte0, DQ PI dly=985, DQM PI dly= 985
1839 11:35:06.410264 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1840 11:35:06.410663
1841 11:35:06.416757 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1842 11:35:06.417150
1843 11:35:06.420050 Byte1, DQ PI dly=979, DQM PI dly= 979
1844 11:35:06.423294 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1845 11:35:06.423726
1846 11:35:06.429885 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1847 11:35:06.430275
1848 11:35:06.430578 ==
1849 11:35:06.433346 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1850 11:35:06.436483 fsp= 1, odt_onoff= 1, Byte mode= 0
1851 11:35:06.436872 ==
1852 11:35:06.443283 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1853 11:35:06.443704
1854 11:35:06.444006 Begin, DQ Scan Range 955~1019
1855 11:35:06.446160 Write Rank1 MR14 =0x0
1856 11:35:06.454142
1857 11:35:06.454530 CH=0, VrefRange= 0, VrefLevel = 0
1858 11:35:06.460945 TX Bit0 (981~992) 12 986, Bit8 (970~983) 14 976,
1859 11:35:06.464021 TX Bit1 (979~993) 15 986, Bit9 (974~983) 10 978,
1860 11:35:06.470617 TX Bit2 (981~992) 12 986, Bit10 (976~990) 15 983,
1861 11:35:06.473888 TX Bit3 (975~989) 15 982, Bit11 (972~982) 11 977,
1862 11:35:06.477234 TX Bit4 (979~992) 14 985, Bit12 (974~983) 10 978,
1863 11:35:06.483744 TX Bit5 (978~988) 11 983, Bit13 (973~984) 12 978,
1864 11:35:06.487062 TX Bit6 (978~991) 14 984, Bit14 (973~989) 17 981,
1865 11:35:06.493565 TX Bit7 (979~992) 14 985, Bit15 (976~989) 14 982,
1866 11:35:06.494096
1867 11:35:06.494632 Write Rank1 MR14 =0x2
1868 11:35:06.502378
1869 11:35:06.502770 CH=0, VrefRange= 0, VrefLevel = 2
1870 11:35:06.508834 TX Bit0 (981~993) 13 987, Bit8 (969~983) 15 976,
1871 11:35:06.512067 TX Bit1 (979~993) 15 986, Bit9 (973~983) 11 978,
1872 11:35:06.518990 TX Bit2 (980~992) 13 986, Bit10 (976~990) 15 983,
1873 11:35:06.521849 TX Bit3 (975~990) 16 982, Bit11 (972~982) 11 977,
1874 11:35:06.525451 TX Bit4 (979~993) 15 986, Bit12 (974~983) 10 978,
1875 11:35:06.531592 TX Bit5 (978~989) 12 983, Bit13 (972~985) 14 978,
1876 11:35:06.535018 TX Bit6 (978~991) 14 984, Bit14 (973~990) 18 981,
1877 11:35:06.541630 TX Bit7 (979~993) 15 986, Bit15 (976~990) 15 983,
1878 11:35:06.542149
1879 11:35:06.542590 Write Rank1 MR14 =0x4
1880 11:35:06.550491
1881 11:35:06.550916 CH=0, VrefRange= 0, VrefLevel = 4
1882 11:35:06.556926 TX Bit0 (980~993) 14 986, Bit8 (969~984) 16 976,
1883 11:35:06.560391 TX Bit1 (979~994) 16 986, Bit9 (973~984) 12 978,
1884 11:35:06.566715 TX Bit2 (981~993) 13 987, Bit10 (976~991) 16 983,
1885 11:35:06.570108 TX Bit3 (975~990) 16 982, Bit11 (971~983) 13 977,
1886 11:35:06.573355 TX Bit4 (978~993) 16 985, Bit12 (973~984) 12 978,
1887 11:35:06.579946 TX Bit5 (977~990) 14 983, Bit13 (972~985) 14 978,
1888 11:35:06.583095 TX Bit6 (977~992) 16 984, Bit14 (972~990) 19 981,
1889 11:35:06.589855 TX Bit7 (979~994) 16 986, Bit15 (976~990) 15 983,
1890 11:35:06.590320
1891 11:35:06.590634 Write Rank1 MR14 =0x6
1892 11:35:06.598848
1893 11:35:06.599327 CH=0, VrefRange= 0, VrefLevel = 6
1894 11:35:06.605380 TX Bit0 (979~994) 16 986, Bit8 (969~984) 16 976,
1895 11:35:06.608993 TX Bit1 (978~995) 18 986, Bit9 (972~985) 14 978,
1896 11:35:06.614985 TX Bit2 (980~993) 14 986, Bit10 (976~991) 16 983,
1897 11:35:06.618341 TX Bit3 (974~991) 18 982, Bit11 (971~983) 13 977,
1898 11:35:06.621768 TX Bit4 (978~994) 17 986, Bit12 (973~985) 13 979,
1899 11:35:06.628124 TX Bit5 (977~991) 15 984, Bit13 (972~986) 15 979,
1900 11:35:06.631415 TX Bit6 (977~992) 16 984, Bit14 (972~990) 19 981,
1901 11:35:06.637978 TX Bit7 (979~994) 16 986, Bit15 (975~991) 17 983,
1902 11:35:06.638440
1903 11:35:06.638747 Write Rank1 MR14 =0x8
1904 11:35:06.646642
1905 11:35:06.646786 CH=0, VrefRange= 0, VrefLevel = 8
1906 11:35:06.653052 TX Bit0 (979~995) 17 987, Bit8 (969~984) 16 976,
1907 11:35:06.656427 TX Bit1 (978~995) 18 986, Bit9 (971~985) 15 978,
1908 11:35:06.663045 TX Bit2 (980~995) 16 987, Bit10 (976~992) 17 984,
1909 11:35:06.666311 TX Bit3 (974~991) 18 982, Bit11 (970~984) 15 977,
1910 11:35:06.669562 TX Bit4 (978~994) 17 986, Bit12 (972~985) 14 978,
1911 11:35:06.676022 TX Bit5 (977~991) 15 984, Bit13 (971~987) 17 979,
1912 11:35:06.679535 TX Bit6 (977~993) 17 985, Bit14 (972~990) 19 981,
1913 11:35:06.686158 TX Bit7 (978~995) 18 986, Bit15 (976~992) 17 984,
1914 11:35:06.686314
1915 11:35:06.686435 Write Rank1 MR14 =0xa
1916 11:35:06.695370
1917 11:35:06.698298 CH=0, VrefRange= 0, VrefLevel = 10
1918 11:35:06.701703 TX Bit0 (979~996) 18 987, Bit8 (968~985) 18 976,
1919 11:35:06.705655 TX Bit1 (978~996) 19 987, Bit9 (971~986) 16 978,
1920 11:35:06.711714 TX Bit2 (979~995) 17 987, Bit10 (975~992) 18 983,
1921 11:35:06.715222 TX Bit3 (973~991) 19 982, Bit11 (970~984) 15 977,
1922 11:35:06.718367 TX Bit4 (978~995) 18 986, Bit12 (972~986) 15 979,
1923 11:35:06.725037 TX Bit5 (977~992) 16 984, Bit13 (971~987) 17 979,
1924 11:35:06.728296 TX Bit6 (977~994) 18 985, Bit14 (971~991) 21 981,
1925 11:35:06.734996 TX Bit7 (978~996) 19 987, Bit15 (975~992) 18 983,
1926 11:35:06.735519
1927 11:35:06.735852 Write Rank1 MR14 =0xc
1928 11:35:06.744258
1929 11:35:06.747310 CH=0, VrefRange= 0, VrefLevel = 12
1930 11:35:06.750699 TX Bit0 (979~997) 19 988, Bit8 (968~986) 19 977,
1931 11:35:06.753907 TX Bit1 (978~997) 20 987, Bit9 (970~987) 18 978,
1932 11:35:06.760602 TX Bit2 (979~996) 18 987, Bit10 (975~993) 19 984,
1933 11:35:06.763788 TX Bit3 (973~992) 20 982, Bit11 (969~985) 17 977,
1934 11:35:06.767025 TX Bit4 (978~995) 18 986, Bit12 (971~987) 17 979,
1935 11:35:06.773487 TX Bit5 (976~992) 17 984, Bit13 (970~989) 20 979,
1936 11:35:06.776777 TX Bit6 (977~994) 18 985, Bit14 (971~991) 21 981,
1937 11:35:06.783200 TX Bit7 (978~997) 20 987, Bit15 (975~992) 18 983,
1938 11:35:06.783619
1939 11:35:06.783926 Write Rank1 MR14 =0xe
1940 11:35:06.793181
1941 11:35:06.796352 CH=0, VrefRange= 0, VrefLevel = 14
1942 11:35:06.799715 TX Bit0 (978~998) 21 988, Bit8 (968~987) 20 977,
1943 11:35:06.802957 TX Bit1 (978~998) 21 988, Bit9 (970~988) 19 979,
1944 11:35:06.809266 TX Bit2 (979~997) 19 988, Bit10 (975~993) 19 984,
1945 11:35:06.812571 TX Bit3 (972~992) 21 982, Bit11 (968~985) 18 976,
1946 11:35:06.816143 TX Bit4 (978~997) 20 987, Bit12 (971~988) 18 979,
1947 11:35:06.822416 TX Bit5 (976~993) 18 984, Bit13 (970~990) 21 980,
1948 11:35:06.825953 TX Bit6 (977~995) 19 986, Bit14 (970~991) 22 980,
1949 11:35:06.832295 TX Bit7 (978~998) 21 988, Bit15 (974~992) 19 983,
1950 11:35:06.832686
1951 11:35:06.832990 Write Rank1 MR14 =0x10
1952 11:35:06.842160
1953 11:35:06.845323 CH=0, VrefRange= 0, VrefLevel = 16
1954 11:35:06.848433 TX Bit0 (979~998) 20 988, Bit8 (968~988) 21 978,
1955 11:35:06.851782 TX Bit1 (978~998) 21 988, Bit9 (969~988) 20 978,
1956 11:35:06.858391 TX Bit2 (979~998) 20 988, Bit10 (975~993) 19 984,
1957 11:35:06.861547 TX Bit3 (972~992) 21 982, Bit11 (968~986) 19 977,
1958 11:35:06.864929 TX Bit4 (978~997) 20 987, Bit12 (970~988) 19 979,
1959 11:35:06.871345 TX Bit5 (976~993) 18 984, Bit13 (969~990) 22 979,
1960 11:35:06.874834 TX Bit6 (976~996) 21 986, Bit14 (970~992) 23 981,
1961 11:35:06.881091 TX Bit7 (978~998) 21 988, Bit15 (974~993) 20 983,
1962 11:35:06.881462
1963 11:35:06.881738 Write Rank1 MR14 =0x12
1964 11:35:06.891006
1965 11:35:06.894498 CH=0, VrefRange= 0, VrefLevel = 18
1966 11:35:06.897955 TX Bit0 (978~999) 22 988, Bit8 (968~988) 21 978,
1967 11:35:06.901158 TX Bit1 (977~999) 23 988, Bit9 (969~989) 21 979,
1968 11:35:06.907312 TX Bit2 (979~998) 20 988, Bit10 (975~995) 21 985,
1969 11:35:06.910777 TX Bit3 (972~992) 21 982, Bit11 (968~987) 20 977,
1970 11:35:06.914123 TX Bit4 (977~998) 22 987, Bit12 (970~989) 20 979,
1971 11:35:06.920813 TX Bit5 (976~994) 19 985, Bit13 (969~990) 22 979,
1972 11:35:06.923950 TX Bit6 (976~996) 21 986, Bit14 (970~992) 23 981,
1973 11:35:06.930257 TX Bit7 (978~998) 21 988, Bit15 (974~994) 21 984,
1974 11:35:06.930647
1975 11:35:06.930961 Write Rank1 MR14 =0x14
1976 11:35:06.940556
1977 11:35:06.943813 CH=0, VrefRange= 0, VrefLevel = 20
1978 11:35:06.947553 TX Bit0 (978~999) 22 988, Bit8 (967~989) 23 978,
1979 11:35:06.950008 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
1980 11:35:06.956566 TX Bit2 (978~998) 21 988, Bit10 (974~995) 22 984,
1981 11:35:06.960036 TX Bit3 (972~993) 22 982, Bit11 (968~988) 21 978,
1982 11:35:06.963307 TX Bit4 (977~998) 22 987, Bit12 (969~990) 22 979,
1983 11:35:06.969853 TX Bit5 (975~994) 20 984, Bit13 (969~991) 23 980,
1984 11:35:06.973118 TX Bit6 (976~997) 22 986, Bit14 (969~992) 24 980,
1985 11:35:06.979757 TX Bit7 (978~999) 22 988, Bit15 (974~994) 21 984,
1986 11:35:06.980148
1987 11:35:06.980450 Write Rank1 MR14 =0x16
1988 11:35:06.990031
1989 11:35:06.992964 CH=0, VrefRange= 0, VrefLevel = 22
1990 11:35:06.996399 TX Bit0 (978~1000) 23 989, Bit8 (968~990) 23 979,
1991 11:35:06.999403 TX Bit1 (977~999) 23 988, Bit9 (969~990) 22 979,
1992 11:35:07.005400 TX Bit2 (978~999) 22 988, Bit10 (974~995) 22 984,
1993 11:35:07.008688 TX Bit3 (971~994) 24 982, Bit11 (968~989) 22 978,
1994 11:35:07.012344 TX Bit4 (977~999) 23 988, Bit12 (969~990) 22 979,
1995 11:35:07.018676 TX Bit5 (975~995) 21 985, Bit13 (969~991) 23 980,
1996 11:35:07.021880 TX Bit6 (976~998) 23 987, Bit14 (969~993) 25 981,
1997 11:35:07.028363 TX Bit7 (977~999) 23 988, Bit15 (974~994) 21 984,
1998 11:35:07.028450
1999 11:35:07.028518 Write Rank1 MR14 =0x18
2000 11:35:07.038436
2001 11:35:07.041760 CH=0, VrefRange= 0, VrefLevel = 24
2002 11:35:07.044995 TX Bit0 (978~1000) 23 989, Bit8 (967~990) 24 978,
2003 11:35:07.048363 TX Bit1 (977~1000) 24 988, Bit9 (968~990) 23 979,
2004 11:35:07.055034 TX Bit2 (978~999) 22 988, Bit10 (974~996) 23 985,
2005 11:35:07.058337 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
2006 11:35:07.061518 TX Bit4 (977~999) 23 988, Bit12 (969~990) 22 979,
2007 11:35:07.068241 TX Bit5 (975~995) 21 985, Bit13 (968~991) 24 979,
2008 11:35:07.071342 TX Bit6 (975~998) 24 986, Bit14 (969~993) 25 981,
2009 11:35:07.077627 TX Bit7 (977~1000) 24 988, Bit15 (973~996) 24 984,
2010 11:35:07.077722
2011 11:35:07.077789 Write Rank1 MR14 =0x1a
2012 11:35:07.088085
2013 11:35:07.091208 CH=0, VrefRange= 0, VrefLevel = 26
2014 11:35:07.094509 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
2015 11:35:07.097635 TX Bit1 (977~1000) 24 988, Bit9 (968~990) 23 979,
2016 11:35:07.104519 TX Bit2 (978~1000) 23 989, Bit10 (973~997) 25 985,
2017 11:35:07.107875 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
2018 11:35:07.114094 TX Bit4 (977~1000) 24 988, Bit12 (969~991) 23 980,
2019 11:35:07.117526 TX Bit5 (974~996) 23 985, Bit13 (968~991) 24 979,
2020 11:35:07.120874 TX Bit6 (975~999) 25 987, Bit14 (969~993) 25 981,
2021 11:35:07.127309 TX Bit7 (977~1000) 24 988, Bit15 (974~996) 23 985,
2022 11:35:07.127424
2023 11:35:07.127515 Write Rank1 MR14 =0x1c
2024 11:35:07.137791
2025 11:35:07.140996 CH=0, VrefRange= 0, VrefLevel = 28
2026 11:35:07.144304 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978,
2027 11:35:07.147754 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
2028 11:35:07.154292 TX Bit2 (977~1000) 24 988, Bit10 (973~998) 26 985,
2029 11:35:07.157440 TX Bit3 (970~995) 26 982, Bit11 (967~990) 24 978,
2030 11:35:07.164298 TX Bit4 (977~1000) 24 988, Bit12 (968~991) 24 979,
2031 11:35:07.167286 TX Bit5 (974~997) 24 985, Bit13 (968~991) 24 979,
2032 11:35:07.170625 TX Bit6 (975~999) 25 987, Bit14 (969~993) 25 981,
2033 11:35:07.177113 TX Bit7 (977~1000) 24 988, Bit15 (973~997) 25 985,
2034 11:35:07.177189
2035 11:35:07.177251 Write Rank1 MR14 =0x1e
2036 11:35:07.187920
2037 11:35:07.191069 CH=0, VrefRange= 0, VrefLevel = 30
2038 11:35:07.194353 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
2039 11:35:07.197724 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
2040 11:35:07.204408 TX Bit2 (977~1001) 25 989, Bit10 (973~998) 26 985,
2041 11:35:07.207342 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
2042 11:35:07.213823 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
2043 11:35:07.217352 TX Bit5 (974~998) 25 986, Bit13 (968~991) 24 979,
2044 11:35:07.220466 TX Bit6 (976~999) 24 987, Bit14 (969~993) 25 981,
2045 11:35:07.227247 TX Bit7 (976~1001) 26 988, Bit15 (972~997) 26 984,
2046 11:35:07.227713
2047 11:35:07.228241 Write Rank1 MR14 =0x20
2048 11:35:07.237854
2049 11:35:07.241200 CH=0, VrefRange= 0, VrefLevel = 32
2050 11:35:07.244579 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
2051 11:35:07.247661 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
2052 11:35:07.254567 TX Bit2 (977~1001) 25 989, Bit10 (973~998) 26 985,
2053 11:35:07.257949 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
2054 11:35:07.264161 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
2055 11:35:07.267672 TX Bit5 (974~998) 25 986, Bit13 (968~991) 24 979,
2056 11:35:07.270809 TX Bit6 (976~999) 24 987, Bit14 (969~993) 25 981,
2057 11:35:07.276795 TX Bit7 (976~1001) 26 988, Bit15 (972~997) 26 984,
2058 11:35:07.276881
2059 11:35:07.276948 Write Rank1 MR14 =0x22
2060 11:35:07.287494
2061 11:35:07.290718 CH=0, VrefRange= 0, VrefLevel = 34
2062 11:35:07.293898 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
2063 11:35:07.297888 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
2064 11:35:07.303952 TX Bit2 (977~1001) 25 989, Bit10 (973~998) 26 985,
2065 11:35:07.307878 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
2066 11:35:07.313796 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
2067 11:35:07.316935 TX Bit5 (974~998) 25 986, Bit13 (968~991) 24 979,
2068 11:35:07.320289 TX Bit6 (976~999) 24 987, Bit14 (969~993) 25 981,
2069 11:35:07.327117 TX Bit7 (976~1001) 26 988, Bit15 (972~997) 26 984,
2070 11:35:07.327203
2071 11:35:07.327268 Write Rank1 MR14 =0x24
2072 11:35:07.337338
2073 11:35:07.340703 CH=0, VrefRange= 0, VrefLevel = 36
2074 11:35:07.343740 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
2075 11:35:07.347256 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
2076 11:35:07.353603 TX Bit2 (977~1001) 25 989, Bit10 (973~998) 26 985,
2077 11:35:07.356912 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
2078 11:35:07.363397 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
2079 11:35:07.366894 TX Bit5 (974~998) 25 986, Bit13 (968~991) 24 979,
2080 11:35:07.370102 TX Bit6 (976~999) 24 987, Bit14 (969~993) 25 981,
2081 11:35:07.376416 TX Bit7 (976~1001) 26 988, Bit15 (972~997) 26 984,
2082 11:35:07.376502
2083 11:35:07.376568 Write Rank1 MR14 =0x26
2084 11:35:07.387148
2085 11:35:07.390509 CH=0, VrefRange= 0, VrefLevel = 38
2086 11:35:07.393908 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
2087 11:35:07.397082 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
2088 11:35:07.403721 TX Bit2 (977~1001) 25 989, Bit10 (973~998) 26 985,
2089 11:35:07.406777 TX Bit3 (970~994) 25 982, Bit11 (967~990) 24 978,
2090 11:35:07.413538 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
2091 11:35:07.416584 TX Bit5 (974~998) 25 986, Bit13 (968~991) 24 979,
2092 11:35:07.419822 TX Bit6 (976~999) 24 987, Bit14 (969~993) 25 981,
2093 11:35:07.426444 TX Bit7 (976~1001) 26 988, Bit15 (972~997) 26 984,
2094 11:35:07.426530
2095 11:35:07.426596
2096 11:35:07.429966 TX Vref found, early break! 366< 375
2097 11:35:07.432853 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2098 11:35:07.436223 u1DelayCellOfst[0]=9 cells (7 PI)
2099 11:35:07.439557 u1DelayCellOfst[1]=7 cells (6 PI)
2100 11:35:07.442752 u1DelayCellOfst[2]=9 cells (7 PI)
2101 11:35:07.446093 u1DelayCellOfst[3]=0 cells (0 PI)
2102 11:35:07.449605 u1DelayCellOfst[4]=7 cells (6 PI)
2103 11:35:07.452914 u1DelayCellOfst[5]=5 cells (4 PI)
2104 11:35:07.456011 u1DelayCellOfst[6]=6 cells (5 PI)
2105 11:35:07.459191 u1DelayCellOfst[7]=7 cells (6 PI)
2106 11:35:07.462642 Byte0, DQ PI dly=982, DQM PI dly= 985
2107 11:35:07.465597 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
2108 11:35:07.465692
2109 11:35:07.468971 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
2110 11:35:07.469092
2111 11:35:07.472338 u1DelayCellOfst[8]=0 cells (0 PI)
2112 11:35:07.475526 u1DelayCellOfst[9]=1 cells (1 PI)
2113 11:35:07.478970 u1DelayCellOfst[10]=9 cells (7 PI)
2114 11:35:07.482148 u1DelayCellOfst[11]=0 cells (0 PI)
2115 11:35:07.485593 u1DelayCellOfst[12]=1 cells (1 PI)
2116 11:35:07.488617 u1DelayCellOfst[13]=1 cells (1 PI)
2117 11:35:07.492098 u1DelayCellOfst[14]=3 cells (3 PI)
2118 11:35:07.495137 u1DelayCellOfst[15]=7 cells (6 PI)
2119 11:35:07.498406 Byte1, DQ PI dly=978, DQM PI dly= 981
2120 11:35:07.501749 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2121 11:35:07.501836
2122 11:35:07.508551 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2123 11:35:07.508638
2124 11:35:07.508705 Write Rank1 MR14 =0x1e
2125 11:35:07.508765
2126 11:35:07.511787 Final TX Range 0 Vref 30
2127 11:35:07.511871
2128 11:35:07.518326 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2129 11:35:07.518432
2130 11:35:07.524895 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2131 11:35:07.531182 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2132 11:35:07.537843 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2133 11:35:07.540956 Write Rank1 MR3 =0xb0
2134 11:35:07.544445 DramC Write-DBI on
2135 11:35:07.544540 ==
2136 11:35:07.547466 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2137 11:35:07.550786 fsp= 1, odt_onoff= 1, Byte mode= 0
2138 11:35:07.550859 ==
2139 11:35:07.557551 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2140 11:35:07.557656
2141 11:35:07.557749 Begin, DQ Scan Range 701~765
2142 11:35:07.557847
2143 11:35:07.557911
2144 11:35:07.560788 TX Vref Scan disable
2145 11:35:07.563845 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2146 11:35:07.567218 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2147 11:35:07.570610 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2148 11:35:07.573786 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2149 11:35:07.576953 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2150 11:35:07.580207 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2151 11:35:07.587035 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2152 11:35:07.590496 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2153 11:35:07.593558 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2154 11:35:07.597073 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2155 11:35:07.600298 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2156 11:35:07.603500 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2157 11:35:07.606522 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2158 11:35:07.609945 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2159 11:35:07.613189 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2160 11:35:07.616469 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2161 11:35:07.619735 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2162 11:35:07.623073 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2163 11:35:07.631753 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2164 11:35:07.634666 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2165 11:35:07.638054 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2166 11:35:07.641607 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2167 11:35:07.644594 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2168 11:35:07.647964 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2169 11:35:07.651198 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2170 11:35:07.654425 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2171 11:35:07.657863 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2172 11:35:07.661177 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
2173 11:35:07.664504 Byte0, DQ PI dly=731, DQM PI dly= 731
2174 11:35:07.670841 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
2175 11:35:07.671284
2176 11:35:07.674402 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
2177 11:35:07.674851
2178 11:35:07.677509 Byte1, DQ PI dly=723, DQM PI dly= 723
2179 11:35:07.680620 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
2180 11:35:07.681034
2181 11:35:07.687369 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
2182 11:35:07.687794
2183 11:35:07.693845 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2184 11:35:07.700741 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2185 11:35:07.707059 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2186 11:35:07.710217 Write Rank1 MR3 =0x30
2187 11:35:07.710616 DramC Write-DBI off
2188 11:35:07.710925
2189 11:35:07.713589 [DATLAT]
2190 11:35:07.716941 Freq=1600, CH0 RK1, use_rxtx_scan=0
2191 11:35:07.717333
2192 11:35:07.717640 DATLAT Default: 0x10
2193 11:35:07.720187 7, 0xFFFF, sum=0
2194 11:35:07.720590 8, 0xFFFF, sum=0
2195 11:35:07.723627 9, 0xFFFF, sum=0
2196 11:35:07.724031 10, 0xFFFF, sum=0
2197 11:35:07.726951 11, 0xFFFF, sum=0
2198 11:35:07.727351 12, 0xFFFF, sum=0
2199 11:35:07.730601 13, 0xFFFF, sum=0
2200 11:35:07.731001 14, 0x0, sum=1
2201 11:35:07.731314 15, 0x0, sum=2
2202 11:35:07.733549 16, 0x0, sum=3
2203 11:35:07.734048 17, 0x0, sum=4
2204 11:35:07.740050 pattern=2 first_step=14 total pass=5 best_step=16
2205 11:35:07.740442 ==
2206 11:35:07.743422 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2207 11:35:07.746641 fsp= 1, odt_onoff= 1, Byte mode= 0
2208 11:35:07.747115 ==
2209 11:35:07.753548 Start DQ dly to find pass range UseTestEngine =1
2210 11:35:07.756264 x-axis: bit #, y-axis: DQ dly (-127~63)
2211 11:35:07.756857 RX Vref Scan = 0
2212 11:35:07.759498 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2213 11:35:07.762791 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2214 11:35:07.766383 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2215 11:35:07.769633 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2216 11:35:07.772738 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2217 11:35:07.773168 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2218 11:35:07.776052 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2219 11:35:07.779512 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2220 11:35:07.782476 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2221 11:35:07.785748 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2222 11:35:07.789033 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2223 11:35:07.792340 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2224 11:35:07.795333 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2225 11:35:07.798584 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2226 11:35:07.802273 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2227 11:35:07.802757 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2228 11:35:07.805439 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2229 11:35:07.808874 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2230 11:35:07.812197 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2231 11:35:07.815156 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2232 11:35:07.818918 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2233 11:35:07.821467 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2234 11:35:07.824870 -4, [0] xxxxxxxx oxxxxxxx [MSB]
2235 11:35:07.825350 -3, [0] xxxxxxxx oxxxxxxx [MSB]
2236 11:35:07.828249 -2, [0] xxxoxxxx ooxoxoxx [MSB]
2237 11:35:07.831581 -1, [0] xxxoxoxx ooxoxoxx [MSB]
2238 11:35:07.834914 0, [0] xxxoxoxx ooxoooxx [MSB]
2239 11:35:07.838113 1, [0] xxxoxoox ooxoooox [MSB]
2240 11:35:07.841256 2, [0] xxxoxoox ooxoooox [MSB]
2241 11:35:07.841651 3, [0] xxxoxooo ooxoooox [MSB]
2242 11:35:07.844687 4, [0] oxxooooo ooxooooo [MSB]
2243 11:35:07.847912 5, [0] ooxooooo oooooooo [MSB]
2244 11:35:07.852543 32, [0] oooxoooo oooooooo [MSB]
2245 11:35:07.855444 33, [0] oooxoooo xooxoooo [MSB]
2246 11:35:07.858794 34, [0] oooxoooo xooxoooo [MSB]
2247 11:35:07.862382 35, [0] oooxoxoo xxoxxxoo [MSB]
2248 11:35:07.865448 36, [0] oooxoxxo xxoxxxoo [MSB]
2249 11:35:07.869072 37, [0] oooxoxxo xxoxxxxo [MSB]
2250 11:35:07.871869 38, [0] oooxoxxx xxoxxxxx [MSB]
2251 11:35:07.872279 39, [0] oxoxxxxx xxoxxxxx [MSB]
2252 11:35:07.875183 40, [0] xxoxxxxx xxoxxxxx [MSB]
2253 11:35:07.878869 41, [0] xxxxxxxx xxxxxxxx [MSB]
2254 11:35:07.882043 iDelay=41, Bit 0, Center 21 (4 ~ 39) 36
2255 11:35:07.885263 iDelay=41, Bit 1, Center 21 (5 ~ 38) 34
2256 11:35:07.888486 iDelay=41, Bit 2, Center 23 (6 ~ 40) 35
2257 11:35:07.894942 iDelay=41, Bit 3, Center 14 (-2 ~ 31) 34
2258 11:35:07.898237 iDelay=41, Bit 4, Center 21 (4 ~ 38) 35
2259 11:35:07.901559 iDelay=41, Bit 5, Center 16 (-1 ~ 34) 36
2260 11:35:07.904471 iDelay=41, Bit 6, Center 18 (1 ~ 35) 35
2261 11:35:07.908065 iDelay=41, Bit 7, Center 20 (3 ~ 37) 35
2262 11:35:07.911239 iDelay=41, Bit 8, Center 14 (-4 ~ 32) 37
2263 11:35:07.914526 iDelay=41, Bit 9, Center 16 (-2 ~ 34) 37
2264 11:35:07.917818 iDelay=41, Bit 10, Center 22 (5 ~ 40) 36
2265 11:35:07.921082 iDelay=41, Bit 11, Center 15 (-2 ~ 32) 35
2266 11:35:07.924123 iDelay=41, Bit 12, Center 17 (0 ~ 34) 35
2267 11:35:07.930938 iDelay=41, Bit 13, Center 16 (-2 ~ 34) 37
2268 11:35:07.934186 iDelay=41, Bit 14, Center 18 (1 ~ 36) 36
2269 11:35:07.937560 iDelay=41, Bit 15, Center 20 (4 ~ 37) 34
2270 11:35:07.937949 ==
2271 11:35:07.940820 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2272 11:35:07.944186 fsp= 1, odt_onoff= 1, Byte mode= 0
2273 11:35:07.944581 ==
2274 11:35:07.947617 DQS Delay:
2275 11:35:07.948087 DQS0 = 0, DQS1 = 0
2276 11:35:07.950982 DQM Delay:
2277 11:35:07.951488 DQM0 = 19, DQM1 = 17
2278 11:35:07.951807 DQ Delay:
2279 11:35:07.954346 DQ0 =21, DQ1 =21, DQ2 =23, DQ3 =14
2280 11:35:07.957150 DQ4 =21, DQ5 =16, DQ6 =18, DQ7 =20
2281 11:35:07.960500 DQ8 =14, DQ9 =16, DQ10 =22, DQ11 =15
2282 11:35:07.963511 DQ12 =17, DQ13 =16, DQ14 =18, DQ15 =20
2283 11:35:07.963903
2284 11:35:07.964210
2285 11:35:07.966927
2286 11:35:07.967311 [DramC_TX_OE_Calibration] TA2
2287 11:35:07.970166 Original DQ_B0 (3 6) =30, OEN = 27
2288 11:35:07.973446 Original DQ_B1 (3 6) =30, OEN = 27
2289 11:35:07.976950 23, 0x0, End_B0=23 End_B1=23
2290 11:35:07.979863 24, 0x0, End_B0=24 End_B1=24
2291 11:35:07.983266 25, 0x0, End_B0=25 End_B1=25
2292 11:35:07.983718 26, 0x0, End_B0=26 End_B1=26
2293 11:35:07.986553 27, 0x0, End_B0=27 End_B1=27
2294 11:35:07.989666 28, 0x0, End_B0=28 End_B1=28
2295 11:35:07.993358 29, 0x0, End_B0=29 End_B1=29
2296 11:35:07.996370 30, 0x0, End_B0=30 End_B1=30
2297 11:35:07.996811 31, 0xFFFF, End_B0=30 End_B1=30
2298 11:35:08.003272 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2299 11:35:08.009657 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2300 11:35:08.010048
2301 11:35:08.010348
2302 11:35:08.012600 Write Rank1 MR23 =0x3f
2303 11:35:08.012989 [DQSOSC]
2304 11:35:08.019164 [DQSOSCAuto] RK1, (LSB)MR18= 0xa3a3, (MSB)MR19= 0x202, tDQSOscB0 = 466 ps tDQSOscB1 = 466 ps
2305 11:35:08.025919 CH0_RK1: MR19=0x202, MR18=0xA3A3, DQSOSC=466, MR23=63, INC=11, DEC=16
2306 11:35:08.029328 Write Rank1 MR23 =0x3f
2307 11:35:08.029927 [DQSOSC]
2308 11:35:08.039077 [DQSOSCAuto] RK1, (LSB)MR18= 0xa6a6, (MSB)MR19= 0x202, tDQSOscB0 = 464 ps tDQSOscB1 = 464 ps
2309 11:35:08.039500 CH0 RK1: MR19=202, MR18=A6A6
2310 11:35:08.042327 [RxdqsGatingPostProcess] freq 1600
2311 11:35:08.048364 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2312 11:35:08.048450 Rank: 0
2313 11:35:08.052035 best DQS0 dly(2T, 0.5T) = (2, 6)
2314 11:35:08.055231 best DQS1 dly(2T, 0.5T) = (2, 6)
2315 11:35:08.058931 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2316 11:35:08.062129 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2317 11:35:08.062599 Rank: 1
2318 11:35:08.065212 best DQS0 dly(2T, 0.5T) = (2, 6)
2319 11:35:08.068817 best DQS1 dly(2T, 0.5T) = (2, 6)
2320 11:35:08.071851 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2321 11:35:08.075121 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2322 11:35:08.078529 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2323 11:35:08.081705 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2324 11:35:08.088351 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2325 11:35:08.088835 Write Rank0 MR13 =0x59
2326 11:35:08.091164 ==
2327 11:35:08.094875 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2328 11:35:08.097982 fsp= 1, odt_onoff= 1, Byte mode= 0
2329 11:35:08.098375 ==
2330 11:35:08.101309 === u2Vref_new: 0x56 --> 0x3a
2331 11:35:08.104270 === u2Vref_new: 0x58 --> 0x58
2332 11:35:08.107775 === u2Vref_new: 0x5a --> 0x5a
2333 11:35:08.110787 === u2Vref_new: 0x5c --> 0x78
2334 11:35:08.114104 === u2Vref_new: 0x5e --> 0x7a
2335 11:35:08.117418 === u2Vref_new: 0x60 --> 0x90
2336 11:35:08.120797 [CA 0] Center 37 (12~63) winsize 52
2337 11:35:08.124001 [CA 1] Center 37 (12~63) winsize 52
2338 11:35:08.127184 [CA 2] Center 34 (6~63) winsize 58
2339 11:35:08.130912 [CA 3] Center 35 (7~63) winsize 57
2340 11:35:08.133719 [CA 4] Center 34 (5~63) winsize 59
2341 11:35:08.137230 [CA 5] Center 29 (0~58) winsize 59
2342 11:35:08.137695
2343 11:35:08.140305 [CATrainingPosCal] consider 1 rank data
2344 11:35:08.143438 u2DelayCellTimex100 = 735/100 ps
2345 11:35:08.146715 CA0 delay=37 (12~63),Diff = 8 PI (10 cell)
2346 11:35:08.150083 CA1 delay=37 (12~63),Diff = 8 PI (10 cell)
2347 11:35:08.153239 CA2 delay=34 (6~63),Diff = 5 PI (6 cell)
2348 11:35:08.156984 CA3 delay=35 (7~63),Diff = 6 PI (7 cell)
2349 11:35:08.159964 CA4 delay=34 (5~63),Diff = 5 PI (6 cell)
2350 11:35:08.163408 CA5 delay=29 (0~58),Diff = 0 PI (0 cell)
2351 11:35:08.163964
2352 11:35:08.169943 CA PerBit enable=1, Macro0, CA PI delay=29
2353 11:35:08.170334 === u2Vref_new: 0x5c --> 0x78
2354 11:35:08.170644
2355 11:35:08.173006 Vref(ca) range 1: 28
2356 11:35:08.173393
2357 11:35:08.176372 CS Dly= 12 (43-0-32)
2358 11:35:08.176761 Write Rank0 MR13 =0xd8
2359 11:35:08.179753 Write Rank0 MR13 =0xd8
2360 11:35:08.182986 Write Rank0 MR12 =0x5c
2361 11:35:08.183375 Write Rank1 MR13 =0x59
2362 11:35:08.183707 ==
2363 11:35:08.189408 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2364 11:35:08.192682 fsp= 1, odt_onoff= 1, Byte mode= 0
2365 11:35:08.193074 ==
2366 11:35:08.195998 === u2Vref_new: 0x56 --> 0x3a
2367 11:35:08.199338 === u2Vref_new: 0x58 --> 0x58
2368 11:35:08.202383 === u2Vref_new: 0x5a --> 0x5a
2369 11:35:08.202776 === u2Vref_new: 0x5c --> 0x78
2370 11:35:08.206127 === u2Vref_new: 0x5e --> 0x7a
2371 11:35:08.209442 === u2Vref_new: 0x60 --> 0x90
2372 11:35:08.212468 [CA 0] Center 37 (12~63) winsize 52
2373 11:35:08.215945 [CA 1] Center 37 (12~63) winsize 52
2374 11:35:08.219230 [CA 2] Center 34 (5~63) winsize 59
2375 11:35:08.222716 [CA 3] Center 35 (7~63) winsize 57
2376 11:35:08.225662 [CA 4] Center 34 (5~63) winsize 59
2377 11:35:08.228937 [CA 5] Center 28 (-1~58) winsize 60
2378 11:35:08.229326
2379 11:35:08.232430 [CATrainingPosCal] consider 2 rank data
2380 11:35:08.235632 u2DelayCellTimex100 = 735/100 ps
2381 11:35:08.238757 CA0 delay=37 (12~63),Diff = 8 PI (10 cell)
2382 11:35:08.242185 CA1 delay=37 (12~63),Diff = 8 PI (10 cell)
2383 11:35:08.249117 CA2 delay=34 (6~63),Diff = 5 PI (6 cell)
2384 11:35:08.252030 CA3 delay=35 (7~63),Diff = 6 PI (7 cell)
2385 11:35:08.254981 CA4 delay=34 (5~63),Diff = 5 PI (6 cell)
2386 11:35:08.258513 CA5 delay=29 (0~58),Diff = 0 PI (0 cell)
2387 11:35:08.258903
2388 11:35:08.261956 CA PerBit enable=1, Macro0, CA PI delay=29
2389 11:35:08.265497 === u2Vref_new: 0x5c --> 0x78
2390 11:35:08.265925
2391 11:35:08.268270 Vref(ca) range 1: 28
2392 11:35:08.268657
2393 11:35:08.268961 CS Dly= 11 (42-0-32)
2394 11:35:08.271757 Write Rank1 MR13 =0xd8
2395 11:35:08.272156 Write Rank1 MR13 =0xd8
2396 11:35:08.274876 Write Rank1 MR12 =0x5c
2397 11:35:08.278558 [RankSwap] Rank num 2, (Multi 1), Rank 0
2398 11:35:08.281449 Write Rank0 MR2 =0xad
2399 11:35:08.281894 [Write Leveling]
2400 11:35:08.284709 delay byte0 byte1 byte2 byte3
2401 11:35:08.285100
2402 11:35:08.287857 10 0 0
2403 11:35:08.288254 11 0 0
2404 11:35:08.291103 12 0 0
2405 11:35:08.291528 13 0 0
2406 11:35:08.291856 14 0 0
2407 11:35:08.294380 15 0 0
2408 11:35:08.294773 16 0 0
2409 11:35:08.297578 17 0 0
2410 11:35:08.297975 18 0 0
2411 11:35:08.298282 19 0 0
2412 11:35:08.301087 20 0 0
2413 11:35:08.301478 21 0 0
2414 11:35:08.304347 22 0 0
2415 11:35:08.304746 23 0 0
2416 11:35:08.307566 24 0 0
2417 11:35:08.307967 25 0 0
2418 11:35:08.308287 26 0 0
2419 11:35:08.310895 27 0 0
2420 11:35:08.311289 28 0 ff
2421 11:35:08.314185 29 0 ff
2422 11:35:08.314583 30 0 ff
2423 11:35:08.317275 31 0 ff
2424 11:35:08.317676 32 0 ff
2425 11:35:08.320663 33 0 ff
2426 11:35:08.321062 34 0 ff
2427 11:35:08.321375 35 0 ff
2428 11:35:08.324056 36 ff ff
2429 11:35:08.324454 37 ff ff
2430 11:35:08.327117 38 ff ff
2431 11:35:08.327497 39 ff ff
2432 11:35:08.330675 40 ff ff
2433 11:35:08.331086 41 ff ff
2434 11:35:08.333935 42 ff ff
2435 11:35:08.337096 pass bytecount = 0xff (0xff: all bytes pass)
2436 11:35:08.337489
2437 11:35:08.337879 DQS0 dly: 36
2438 11:35:08.340242 DQS1 dly: 28
2439 11:35:08.340604 Write Rank0 MR2 =0x2d
2440 11:35:08.343571 [RankSwap] Rank num 2, (Multi 1), Rank 0
2441 11:35:08.346961 Write Rank0 MR1 =0xd6
2442 11:35:08.347321 [Gating]
2443 11:35:08.347639 ==
2444 11:35:08.353324 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2445 11:35:08.356193 fsp= 1, odt_onoff= 1, Byte mode= 0
2446 11:35:08.356279 ==
2447 11:35:08.359606 3 1 0 |2c2b 3736 |(11 11)(11 11) |(1 1)(0 0)| 0
2448 11:35:08.366068 3 1 4 |2c2b 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2449 11:35:08.369414 3 1 8 |2c2b 3535 |(11 11)(11 11) |(1 1)(0 0)| 0
2450 11:35:08.372670 3 1 12 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
2451 11:35:08.379054 3 1 16 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 0)| 0
2452 11:35:08.382445 3 1 20 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
2453 11:35:08.385790 3 1 24 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
2454 11:35:08.392398 3 1 28 |2c2b 2f2f |(11 11)(11 11) |(1 0)(1 1)| 0
2455 11:35:08.395773 3 2 0 |2c2b 3535 |(11 11)(11 11) |(1 0)(0 1)| 0
2456 11:35:08.398946 3 2 4 |2c2b 1a19 |(11 11)(11 11) |(1 0)(0 1)| 0
2457 11:35:08.405932 3 2 8 |2c2b 3434 |(11 11)(11 11) |(1 0)(0 1)| 0
2458 11:35:08.408669 3 2 12 |2c2b 3434 |(11 11)(0 0) |(1 0)(0 1)| 0
2459 11:35:08.412085 3 2 16 |201 3534 |(11 11)(11 11) |(0 0)(1 0)| 0
2460 11:35:08.418517 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
2461 11:35:08.422202 3 2 24 |3534 1e1d |(11 11)(11 11) |(0 0)(1 1)| 0
2462 11:35:08.425156 3 2 28 |3534 3c3b |(11 11)(11 11) |(0 0)(1 1)| 0
2463 11:35:08.431928 3 3 0 |3534 3c3c |(11 11)(0 0) |(0 0)(1 1)| 0
2464 11:35:08.435232 3 3 4 |3534 3b3a |(11 11)(11 11) |(0 0)(1 1)| 0
2465 11:35:08.438351 3 3 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2466 11:35:08.442058 [Byte 1] Lead/lag Transition tap number (1)
2467 11:35:08.448632 3 3 12 |3534 3b3a |(11 11)(11 11) |(0 0)(0 0)| 0
2468 11:35:08.451337 3 3 16 |3534 3c3c |(11 11)(11 11) |(1 1)(1 1)| 0
2469 11:35:08.455103 3 3 20 |3534 1d1d |(11 11)(11 11) |(1 1)(1 1)| 0
2470 11:35:08.461141 [Byte 0] Lead/lag falling Transition (3, 3, 20)
2471 11:35:08.464669 3 3 24 |3534 f0e |(11 11)(11 11) |(0 1)(1 1)| 0
2472 11:35:08.468047 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2473 11:35:08.474377 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2474 11:35:08.477395 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2475 11:35:08.480869 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2476 11:35:08.487408 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2477 11:35:08.490843 3 4 16 |201 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2478 11:35:08.493958 3 4 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2479 11:35:08.500715 3 4 24 |3d3d c0c |(11 11)(11 11) |(1 1)(1 1)| 0
2480 11:35:08.503968 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2481 11:35:08.506941 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2482 11:35:08.513636 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2483 11:35:08.517052 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2484 11:35:08.520403 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2485 11:35:08.526729 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2486 11:35:08.529958 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2487 11:35:08.533288 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2488 11:35:08.539824 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2489 11:35:08.543151 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2490 11:35:08.546365 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2491 11:35:08.553046 [Byte 0] Lead/lag falling Transition (3, 6, 4)
2492 11:35:08.555977 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2493 11:35:08.559337 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2494 11:35:08.562637 [Byte 0] Lead/lag Transition tap number (3)
2495 11:35:08.569149 [Byte 1] Lead/lag falling Transition (3, 6, 12)
2496 11:35:08.572160 3 6 16 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2497 11:35:08.575408 [Byte 1] Lead/lag Transition tap number (2)
2498 11:35:08.578845 3 6 20 |4646 3d3d |(0 0)(11 11) |(0 0)(0 0)| 0
2499 11:35:08.581798 [Byte 0]First pass (3, 6, 20)
2500 11:35:08.588654 3 6 24 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
2501 11:35:08.591939 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2502 11:35:08.595095 [Byte 1]First pass (3, 6, 28)
2503 11:35:08.598258 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2504 11:35:08.601681 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2505 11:35:08.604683 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2506 11:35:08.607995 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2507 11:35:08.614845 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2508 11:35:08.618060 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2509 11:35:08.621429 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2510 11:35:08.624595 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2511 11:35:08.631059 All bytes gating window > 1UI, Early break!
2512 11:35:08.631170
2513 11:35:08.634476 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 10)
2514 11:35:08.634577
2515 11:35:08.637482 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 16)
2516 11:35:08.637587
2517 11:35:08.637687
2518 11:35:08.637777
2519 11:35:08.640910 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 10)
2520 11:35:08.641010
2521 11:35:08.647182 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 16)
2522 11:35:08.647286
2523 11:35:08.647384
2524 11:35:08.647483 Write Rank0 MR1 =0x56
2525 11:35:08.647546
2526 11:35:08.650739 best RODT dly(2T, 0.5T) = (2, 3)
2527 11:35:08.650808
2528 11:35:08.653749 best RODT dly(2T, 0.5T) = (2, 3)
2529 11:35:08.653852 ==
2530 11:35:08.660416 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2531 11:35:08.663716 fsp= 1, odt_onoff= 1, Byte mode= 0
2532 11:35:08.663818 ==
2533 11:35:08.666878 Start DQ dly to find pass range UseTestEngine =0
2534 11:35:08.670258 x-axis: bit #, y-axis: DQ dly (-127~63)
2535 11:35:08.673426 RX Vref Scan = 0
2536 11:35:08.676780 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2537 11:35:08.676886 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2538 11:35:08.680008 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2539 11:35:08.683471 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2540 11:35:08.686498 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2541 11:35:08.689740 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2542 11:35:08.693141 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2543 11:35:08.696595 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2544 11:35:08.699718 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2545 11:35:08.702938 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2546 11:35:08.703042 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2547 11:35:08.706484 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2548 11:35:08.709427 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2549 11:35:08.712770 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2550 11:35:08.716303 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2551 11:35:08.719286 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2552 11:35:08.722539 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2553 11:35:08.725924 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2554 11:35:08.729020 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2555 11:35:08.729121 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2556 11:35:08.732349 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2557 11:35:08.735755 -5, [0] xxxxxxxx xxxxxxxo [MSB]
2558 11:35:08.739215 -4, [0] xxxxxxxx xxxxxxxo [MSB]
2559 11:35:08.742280 -3, [0] xxxxxxxx xxxxxxxo [MSB]
2560 11:35:08.745651 -2, [0] xxxoxxxx ooxxxxxo [MSB]
2561 11:35:08.748854 -1, [0] xxxoxxxx ooxxxxxo [MSB]
2562 11:35:08.752130 0, [0] xxxoxxxx ooxxxxxo [MSB]
2563 11:35:08.752209 1, [0] xxooxxxo oooxxxxo [MSB]
2564 11:35:08.755381 2, [0] xxooxxxo ooooxxxo [MSB]
2565 11:35:08.758505 3, [0] xooooxxo oooooooo [MSB]
2566 11:35:08.761869 4, [0] oooooxxo oooooooo [MSB]
2567 11:35:08.765276 5, [0] oooooxoo oooooooo [MSB]
2568 11:35:08.768592 6, [0] oooooxoo oooooooo [MSB]
2569 11:35:08.768700 32, [0] oooooooo ooooooox [MSB]
2570 11:35:08.771511 33, [0] oooooooo ooooooox [MSB]
2571 11:35:08.774926 34, [0] oooooooo ooooooox [MSB]
2572 11:35:08.778179 35, [0] ooxooooo oxooooox [MSB]
2573 11:35:08.781504 36, [0] ooxxoooo oxooooox [MSB]
2574 11:35:08.784629 37, [0] ooxxoooo xxooooox [MSB]
2575 11:35:08.787977 38, [0] ooxxoooo xxooooox [MSB]
2576 11:35:08.791330 39, [0] oxxxooox xxoxxoox [MSB]
2577 11:35:08.791433 40, [0] oxxxxoox xxxxxoox [MSB]
2578 11:35:08.794667 41, [0] xxxxxoxx xxxxxxxx [MSB]
2579 11:35:08.797720 42, [0] xxxxxoxx xxxxxxxx [MSB]
2580 11:35:08.801235 43, [0] xxxxxxxx xxxxxxxx [MSB]
2581 11:35:08.804408 iDelay=43, Bit 0, Center 22 (4 ~ 40) 37
2582 11:35:08.807774 iDelay=43, Bit 1, Center 20 (3 ~ 38) 36
2583 11:35:08.810959 iDelay=43, Bit 2, Center 17 (1 ~ 34) 34
2584 11:35:08.814417 iDelay=43, Bit 3, Center 16 (-2 ~ 35) 38
2585 11:35:08.817358 iDelay=43, Bit 4, Center 21 (3 ~ 39) 37
2586 11:35:08.824005 iDelay=43, Bit 5, Center 24 (7 ~ 42) 36
2587 11:35:08.827333 iDelay=43, Bit 6, Center 22 (5 ~ 40) 36
2588 11:35:08.830483 iDelay=43, Bit 7, Center 19 (1 ~ 38) 38
2589 11:35:08.833849 iDelay=43, Bit 8, Center 17 (-2 ~ 36) 39
2590 11:35:08.837342 iDelay=43, Bit 9, Center 16 (-2 ~ 34) 37
2591 11:35:08.840234 iDelay=43, Bit 10, Center 20 (1 ~ 39) 39
2592 11:35:08.843472 iDelay=43, Bit 11, Center 20 (2 ~ 38) 37
2593 11:35:08.846771 iDelay=43, Bit 12, Center 20 (3 ~ 38) 36
2594 11:35:08.850202 iDelay=43, Bit 13, Center 21 (3 ~ 40) 38
2595 11:35:08.853454 iDelay=43, Bit 14, Center 21 (3 ~ 40) 38
2596 11:35:08.859851 iDelay=43, Bit 15, Center 13 (-5 ~ 31) 37
2597 11:35:08.859937 ==
2598 11:35:08.863186 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2599 11:35:08.866491 fsp= 1, odt_onoff= 1, Byte mode= 0
2600 11:35:08.866570 ==
2601 11:35:08.869856 DQS Delay:
2602 11:35:08.869958 DQS0 = 0, DQS1 = 0
2603 11:35:08.870056 DQM Delay:
2604 11:35:08.872974 DQM0 = 20, DQM1 = 18
2605 11:35:08.873070 DQ Delay:
2606 11:35:08.876355 DQ0 =22, DQ1 =20, DQ2 =17, DQ3 =16
2607 11:35:08.879639 DQ4 =21, DQ5 =24, DQ6 =22, DQ7 =19
2608 11:35:08.883032 DQ8 =17, DQ9 =16, DQ10 =20, DQ11 =20
2609 11:35:08.886334 DQ12 =20, DQ13 =21, DQ14 =21, DQ15 =13
2610 11:35:08.886432
2611 11:35:08.886527
2612 11:35:08.889356 DramC Write-DBI off
2613 11:35:08.889465 ==
2614 11:35:08.893012 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2615 11:35:08.895866 fsp= 1, odt_onoff= 1, Byte mode= 0
2616 11:35:08.899330 ==
2617 11:35:08.902455 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2618 11:35:08.902557
2619 11:35:08.905757 Begin, DQ Scan Range 924~1180
2620 11:35:08.905859
2621 11:35:08.905956
2622 11:35:08.906046 TX Vref Scan disable
2623 11:35:08.909151 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
2624 11:35:08.915434 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
2625 11:35:08.919022 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
2626 11:35:08.922144 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
2627 11:35:08.925395 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2628 11:35:08.928867 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2629 11:35:08.932122 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2630 11:35:08.935198 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2631 11:35:08.938611 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2632 11:35:08.942015 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2633 11:35:08.945523 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2634 11:35:08.948487 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2635 11:35:08.951512 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2636 11:35:08.958475 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2637 11:35:08.961472 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2638 11:35:08.965010 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2639 11:35:08.967923 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2640 11:35:08.971399 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2641 11:35:08.974737 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2642 11:35:08.978041 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2643 11:35:08.981098 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2644 11:35:08.984470 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2645 11:35:08.987439 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2646 11:35:08.991197 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2647 11:35:08.994166 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2648 11:35:08.997398 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2649 11:35:09.004025 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2650 11:35:09.007256 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2651 11:35:09.010474 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2652 11:35:09.013798 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2653 11:35:09.017076 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2654 11:35:09.020456 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2655 11:35:09.023477 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2656 11:35:09.026828 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2657 11:35:09.030182 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2658 11:35:09.033454 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2659 11:35:09.037114 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2660 11:35:09.040055 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2661 11:35:09.043314 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2662 11:35:09.046607 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2663 11:35:09.053114 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2664 11:35:09.056399 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2665 11:35:09.059730 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2666 11:35:09.063127 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
2667 11:35:09.066081 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
2668 11:35:09.069615 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
2669 11:35:09.072666 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
2670 11:35:09.076152 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
2671 11:35:09.079336 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
2672 11:35:09.082706 973 |3 6 13|[0] xxxxxxxx ooxxxxxo [MSB]
2673 11:35:09.085951 974 |3 6 14|[0] xxxxxxxx ooxxxxxo [MSB]
2674 11:35:09.089060 975 |3 6 15|[0] xxxxxxxx oooxxxxo [MSB]
2675 11:35:09.092431 976 |3 6 16|[0] xxxxxxxx oooxxxxo [MSB]
2676 11:35:09.095694 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
2677 11:35:09.099009 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
2678 11:35:09.105489 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
2679 11:35:09.108774 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
2680 11:35:09.112009 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
2681 11:35:09.115470 982 |3 6 22|[0] xxxxxxxx oooooooo [MSB]
2682 11:35:09.118771 983 |3 6 23|[0] xooooxxo oooooooo [MSB]
2683 11:35:09.121901 984 |3 6 24|[0] xooooooo oooooooo [MSB]
2684 11:35:09.125379 990 |3 6 30|[0] oooooooo ooooooox [MSB]
2685 11:35:09.128503 991 |3 6 31|[0] oooooooo ooooooox [MSB]
2686 11:35:09.132003 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2687 11:35:09.138186 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2688 11:35:09.141466 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2689 11:35:09.144911 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
2690 11:35:09.148202 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
2691 11:35:09.151331 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
2692 11:35:09.154444 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
2693 11:35:09.157855 999 |3 6 39|[0] oooooooo xxxxxxxx [MSB]
2694 11:35:09.161090 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
2695 11:35:09.164419 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
2696 11:35:09.167814 1002 |3 6 42|[0] oooxoooo xxxxxxxx [MSB]
2697 11:35:09.171192 1003 |3 6 43|[0] ooxxoooo xxxxxxxx [MSB]
2698 11:35:09.177663 1004 |3 6 44|[0] ooxxooox xxxxxxxx [MSB]
2699 11:35:09.180862 1005 |3 6 45|[0] ooxxxoxx xxxxxxxx [MSB]
2700 11:35:09.183974 1006 |3 6 46|[0] xxxxxxxx xxxxxxxx [MSB]
2701 11:35:09.187378 Byte0, DQ PI dly=993, DQM PI dly= 993
2702 11:35:09.190619 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 33)
2703 11:35:09.190705
2704 11:35:09.194068 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 33)
2705 11:35:09.197179
2706 11:35:09.200382 Byte1, DQ PI dly=982, DQM PI dly= 982
2707 11:35:09.203788 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
2708 11:35:09.203875
2709 11:35:09.207217 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
2710 11:35:09.207290
2711 11:35:09.207352 ==
2712 11:35:09.213639 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2713 11:35:09.216914 fsp= 1, odt_onoff= 1, Byte mode= 0
2714 11:35:09.217000 ==
2715 11:35:09.220136 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2716 11:35:09.220224
2717 11:35:09.223257 Begin, DQ Scan Range 958~1022
2718 11:35:09.226649 Write Rank0 MR14 =0x0
2719 11:35:09.234065
2720 11:35:09.234141 CH=1, VrefRange= 0, VrefLevel = 0
2721 11:35:09.240829 TX Bit0 (986~1000) 15 993, Bit8 (976~990) 15 983,
2722 11:35:09.244011 TX Bit1 (985~1000) 16 992, Bit9 (977~987) 11 982,
2723 11:35:09.250651 TX Bit2 (983~998) 16 990, Bit10 (978~991) 14 984,
2724 11:35:09.254034 TX Bit3 (980~995) 16 987, Bit11 (979~991) 13 985,
2725 11:35:09.257040 TX Bit4 (984~999) 16 991, Bit12 (979~991) 13 985,
2726 11:35:09.263443 TX Bit5 (986~1000) 15 993, Bit13 (980~992) 13 986,
2727 11:35:09.266913 TX Bit6 (985~999) 15 992, Bit14 (978~991) 14 984,
2728 11:35:09.273321 TX Bit7 (985~999) 15 992, Bit15 (973~983) 11 978,
2729 11:35:09.273403
2730 11:35:09.273468 Write Rank0 MR14 =0x2
2731 11:35:09.283044
2732 11:35:09.283116 CH=1, VrefRange= 0, VrefLevel = 2
2733 11:35:09.289802 TX Bit0 (986~1001) 16 993, Bit8 (976~990) 15 983,
2734 11:35:09.293083 TX Bit1 (984~1000) 17 992, Bit9 (976~988) 13 982,
2735 11:35:09.299552 TX Bit2 (983~998) 16 990, Bit10 (977~992) 16 984,
2736 11:35:09.302681 TX Bit3 (980~996) 17 988, Bit11 (978~991) 14 984,
2737 11:35:09.306132 TX Bit4 (984~999) 16 991, Bit12 (979~991) 13 985,
2738 11:35:09.312568 TX Bit5 (986~1001) 16 993, Bit13 (979~992) 14 985,
2739 11:35:09.315557 TX Bit6 (985~999) 15 992, Bit14 (978~991) 14 984,
2740 11:35:09.322170 TX Bit7 (985~999) 15 992, Bit15 (973~983) 11 978,
2741 11:35:09.322278
2742 11:35:09.322347 Write Rank0 MR14 =0x4
2743 11:35:09.332283
2744 11:35:09.332369 CH=1, VrefRange= 0, VrefLevel = 4
2745 11:35:09.338775 TX Bit0 (985~1002) 18 993, Bit8 (975~990) 16 982,
2746 11:35:09.341988 TX Bit1 (984~1001) 18 992, Bit9 (975~989) 15 982,
2747 11:35:09.348699 TX Bit2 (983~999) 17 991, Bit10 (977~992) 16 984,
2748 11:35:09.351919 TX Bit3 (979~997) 19 988, Bit11 (978~992) 15 985,
2749 11:35:09.355035 TX Bit4 (984~1000) 17 992, Bit12 (978~992) 15 985,
2750 11:35:09.361747 TX Bit5 (985~1001) 17 993, Bit13 (978~993) 16 985,
2751 11:35:09.364968 TX Bit6 (985~1000) 16 992, Bit14 (978~991) 14 984,
2752 11:35:09.371791 TX Bit7 (984~1000) 17 992, Bit15 (973~984) 12 978,
2753 11:35:09.371872
2754 11:35:09.371939 Write Rank0 MR14 =0x6
2755 11:35:09.381865
2756 11:35:09.381942 CH=1, VrefRange= 0, VrefLevel = 6
2757 11:35:09.388474 TX Bit0 (985~1003) 19 994, Bit8 (975~991) 17 983,
2758 11:35:09.391474 TX Bit1 (984~1002) 19 993, Bit9 (975~989) 15 982,
2759 11:35:09.398260 TX Bit2 (982~999) 18 990, Bit10 (977~993) 17 985,
2760 11:35:09.401242 TX Bit3 (979~997) 19 988, Bit11 (978~992) 15 985,
2761 11:35:09.404682 TX Bit4 (984~1001) 18 992, Bit12 (978~992) 15 985,
2762 11:35:09.411382 TX Bit5 (985~1003) 19 994, Bit13 (978~993) 16 985,
2763 11:35:09.414553 TX Bit6 (985~1001) 17 993, Bit14 (978~992) 15 985,
2764 11:35:09.420874 TX Bit7 (984~1000) 17 992, Bit15 (971~985) 15 978,
2765 11:35:09.420960
2766 11:35:09.421026 Write Rank0 MR14 =0x8
2767 11:35:09.431350
2768 11:35:09.431435 CH=1, VrefRange= 0, VrefLevel = 8
2769 11:35:09.438071 TX Bit0 (985~1004) 20 994, Bit8 (974~991) 18 982,
2770 11:35:09.441347 TX Bit1 (984~1003) 20 993, Bit9 (975~990) 16 982,
2771 11:35:09.447841 TX Bit2 (982~1000) 19 991, Bit10 (976~993) 18 984,
2772 11:35:09.451283 TX Bit3 (979~997) 19 988, Bit11 (978~993) 16 985,
2773 11:35:09.457453 TX Bit4 (984~1001) 18 992, Bit12 (977~993) 17 985,
2774 11:35:09.461008 TX Bit5 (986~1004) 19 995, Bit13 (978~994) 17 986,
2775 11:35:09.464128 TX Bit6 (984~1001) 18 992, Bit14 (978~993) 16 985,
2776 11:35:09.470869 TX Bit7 (984~1001) 18 992, Bit15 (971~986) 16 978,
2777 11:35:09.470978
2778 11:35:09.471074 Write Rank0 MR14 =0xa
2779 11:35:09.481479
2780 11:35:09.484816 CH=1, VrefRange= 0, VrefLevel = 10
2781 11:35:09.488075 TX Bit0 (985~1004) 20 994, Bit8 (974~991) 18 982,
2782 11:35:09.491367 TX Bit1 (984~1004) 21 994, Bit9 (974~990) 17 982,
2783 11:35:09.497575 TX Bit2 (982~1000) 19 991, Bit10 (976~994) 19 985,
2784 11:35:09.500943 TX Bit3 (978~998) 21 988, Bit11 (978~994) 17 986,
2785 11:35:09.507321 TX Bit4 (983~1002) 20 992, Bit12 (977~993) 17 985,
2786 11:35:09.510833 TX Bit5 (985~1004) 20 994, Bit13 (977~995) 19 986,
2787 11:35:09.513821 TX Bit6 (984~1002) 19 993, Bit14 (977~993) 17 985,
2788 11:35:09.520507 TX Bit7 (984~1002) 19 993, Bit15 (971~987) 17 979,
2789 11:35:09.520619
2790 11:35:09.520718 Write Rank0 MR14 =0xc
2791 11:35:09.531185
2792 11:35:09.534597 CH=1, VrefRange= 0, VrefLevel = 12
2793 11:35:09.537783 TX Bit0 (985~1005) 21 995, Bit8 (973~992) 20 982,
2794 11:35:09.541159 TX Bit1 (983~1003) 21 993, Bit9 (973~991) 19 982,
2795 11:35:09.547533 TX Bit2 (981~1001) 21 991, Bit10 (976~994) 19 985,
2796 11:35:09.550915 TX Bit3 (978~998) 21 988, Bit11 (977~994) 18 985,
2797 11:35:09.557463 TX Bit4 (983~1003) 21 993, Bit12 (977~994) 18 985,
2798 11:35:09.561055 TX Bit5 (985~1004) 20 994, Bit13 (977~996) 20 986,
2799 11:35:09.563980 TX Bit6 (984~1003) 20 993, Bit14 (977~994) 18 985,
2800 11:35:09.570541 TX Bit7 (984~1002) 19 993, Bit15 (970~987) 18 978,
2801 11:35:09.570651
2802 11:35:09.570738 Write Rank0 MR14 =0xe
2803 11:35:09.581285
2804 11:35:09.584778 CH=1, VrefRange= 0, VrefLevel = 14
2805 11:35:09.587725 TX Bit0 (984~1005) 22 994, Bit8 (973~992) 20 982,
2806 11:35:09.591396 TX Bit1 (983~1005) 23 994, Bit9 (973~991) 19 982,
2807 11:35:09.598055 TX Bit2 (980~1001) 22 990, Bit10 (976~994) 19 985,
2808 11:35:09.600863 TX Bit3 (978~999) 22 988, Bit11 (977~995) 19 986,
2809 11:35:09.607574 TX Bit4 (983~1004) 22 993, Bit12 (977~995) 19 986,
2810 11:35:09.610662 TX Bit5 (984~1005) 22 994, Bit13 (978~996) 19 987,
2811 11:35:09.613956 TX Bit6 (984~1004) 21 994, Bit14 (977~994) 18 985,
2812 11:35:09.620907 TX Bit7 (984~1003) 20 993, Bit15 (970~988) 19 979,
2813 11:35:09.620996
2814 11:35:09.621084 Write Rank0 MR14 =0x10
2815 11:35:09.631393
2816 11:35:09.634778 CH=1, VrefRange= 0, VrefLevel = 16
2817 11:35:09.638195 TX Bit0 (984~1005) 22 994, Bit8 (972~992) 21 982,
2818 11:35:09.641475 TX Bit1 (983~1005) 23 994, Bit9 (973~991) 19 982,
2819 11:35:09.647738 TX Bit2 (980~1002) 23 991, Bit10 (975~995) 21 985,
2820 11:35:09.651073 TX Bit3 (978~999) 22 988, Bit11 (977~996) 20 986,
2821 11:35:09.657547 TX Bit4 (982~1004) 23 993, Bit12 (976~996) 21 986,
2822 11:35:09.660883 TX Bit5 (984~1005) 22 994, Bit13 (977~997) 21 987,
2823 11:35:09.664319 TX Bit6 (984~1004) 21 994, Bit14 (976~995) 20 985,
2824 11:35:09.670693 TX Bit7 (984~1004) 21 994, Bit15 (970~989) 20 979,
2825 11:35:09.670780
2826 11:35:09.670872 Write Rank0 MR14 =0x12
2827 11:35:09.681924
2828 11:35:09.685162 CH=1, VrefRange= 0, VrefLevel = 18
2829 11:35:09.688123 TX Bit0 (985~1006) 22 995, Bit8 (972~993) 22 982,
2830 11:35:09.691761 TX Bit1 (983~1005) 23 994, Bit9 (972~991) 20 981,
2831 11:35:09.698022 TX Bit2 (980~1003) 24 991, Bit10 (975~996) 22 985,
2832 11:35:09.701507 TX Bit3 (978~999) 22 988, Bit11 (977~997) 21 987,
2833 11:35:09.707948 TX Bit4 (982~1005) 24 993, Bit12 (976~996) 21 986,
2834 11:35:09.711185 TX Bit5 (984~1005) 22 994, Bit13 (977~997) 21 987,
2835 11:35:09.714423 TX Bit6 (983~1005) 23 994, Bit14 (976~996) 21 986,
2836 11:35:09.720877 TX Bit7 (983~1004) 22 993, Bit15 (970~990) 21 980,
2837 11:35:09.720966
2838 11:35:09.724123 Write Rank0 MR14 =0x14
2839 11:35:09.732246
2840 11:35:09.735611 CH=1, VrefRange= 0, VrefLevel = 20
2841 11:35:09.738781 TX Bit0 (984~1006) 23 995, Bit8 (972~994) 23 983,
2842 11:35:09.742056 TX Bit1 (982~1005) 24 993, Bit9 (972~992) 21 982,
2843 11:35:09.748824 TX Bit2 (979~1003) 25 991, Bit10 (975~997) 23 986,
2844 11:35:09.752003 TX Bit3 (977~1000) 24 988, Bit11 (976~997) 22 986,
2845 11:35:09.758471 TX Bit4 (982~1005) 24 993, Bit12 (976~997) 22 986,
2846 11:35:09.761518 TX Bit5 (984~1006) 23 995, Bit13 (976~997) 22 986,
2847 11:35:09.764966 TX Bit6 (983~1005) 23 994, Bit14 (976~997) 22 986,
2848 11:35:09.771440 TX Bit7 (983~1005) 23 994, Bit15 (970~990) 21 980,
2849 11:35:09.771724
2850 11:35:09.774727 Write Rank0 MR14 =0x16
2851 11:35:09.782607
2852 11:35:09.786086 CH=1, VrefRange= 0, VrefLevel = 22
2853 11:35:09.789369 TX Bit0 (984~1006) 23 995, Bit8 (972~994) 23 983,
2854 11:35:09.792340 TX Bit1 (982~1006) 25 994, Bit9 (971~992) 22 981,
2855 11:35:09.798689 TX Bit2 (979~1004) 26 991, Bit10 (975~998) 24 986,
2856 11:35:09.802065 TX Bit3 (977~1000) 24 988, Bit11 (976~998) 23 987,
2857 11:35:09.808460 TX Bit4 (981~1005) 25 993, Bit12 (976~998) 23 987,
2858 11:35:09.811923 TX Bit5 (984~1006) 23 995, Bit13 (976~998) 23 987,
2859 11:35:09.815186 TX Bit6 (983~1005) 23 994, Bit14 (976~997) 22 986,
2860 11:35:09.821849 TX Bit7 (983~1005) 23 994, Bit15 (970~991) 22 980,
2861 11:35:09.821938
2862 11:35:09.824962 Write Rank0 MR14 =0x18
2863 11:35:09.833175
2864 11:35:09.836177 CH=1, VrefRange= 0, VrefLevel = 24
2865 11:35:09.839272 TX Bit0 (983~1006) 24 994, Bit8 (971~995) 25 983,
2866 11:35:09.842578 TX Bit1 (982~1006) 25 994, Bit9 (971~992) 22 981,
2867 11:35:09.848999 TX Bit2 (979~1004) 26 991, Bit10 (974~997) 24 985,
2868 11:35:09.852565 TX Bit3 (977~1001) 25 989, Bit11 (976~998) 23 987,
2869 11:35:09.859137 TX Bit4 (981~1005) 25 993, Bit12 (976~998) 23 987,
2870 11:35:09.862390 TX Bit5 (983~1006) 24 994, Bit13 (976~998) 23 987,
2871 11:35:09.865589 TX Bit6 (982~1005) 24 993, Bit14 (976~997) 22 986,
2872 11:35:09.872303 TX Bit7 (982~1005) 24 993, Bit15 (969~991) 23 980,
2873 11:35:09.872405
2874 11:35:09.875391 Write Rank0 MR14 =0x1a
2875 11:35:09.883146
2876 11:35:09.886659 CH=1, VrefRange= 0, VrefLevel = 26
2877 11:35:09.889664 TX Bit0 (983~1006) 24 994, Bit8 (971~995) 25 983,
2878 11:35:09.893040 TX Bit1 (981~1006) 26 993, Bit9 (972~993) 22 982,
2879 11:35:09.899551 TX Bit2 (979~1005) 27 992, Bit10 (974~998) 25 986,
2880 11:35:09.902844 TX Bit3 (977~1001) 25 989, Bit11 (975~998) 24 986,
2881 11:35:09.909453 TX Bit4 (980~1006) 27 993, Bit12 (975~998) 24 986,
2882 11:35:09.912870 TX Bit5 (983~1006) 24 994, Bit13 (976~999) 24 987,
2883 11:35:09.915858 TX Bit6 (982~1005) 24 993, Bit14 (976~998) 23 987,
2884 11:35:09.922407 TX Bit7 (982~1005) 24 993, Bit15 (969~991) 23 980,
2885 11:35:09.922517
2886 11:35:09.925679 Write Rank0 MR14 =0x1c
2887 11:35:09.933723
2888 11:35:09.936943 CH=1, VrefRange= 0, VrefLevel = 28
2889 11:35:09.940986 TX Bit0 (983~1007) 25 995, Bit8 (971~995) 25 983,
2890 11:35:09.943623 TX Bit1 (981~1006) 26 993, Bit9 (970~993) 24 981,
2891 11:35:09.949788 TX Bit2 (978~1005) 28 991, Bit10 (975~999) 25 987,
2892 11:35:09.953245 TX Bit3 (977~1002) 26 989, Bit11 (975~999) 25 987,
2893 11:35:09.959812 TX Bit4 (980~1006) 27 993, Bit12 (975~998) 24 986,
2894 11:35:09.963127 TX Bit5 (983~1006) 24 994, Bit13 (976~999) 24 987,
2895 11:35:09.966726 TX Bit6 (982~1006) 25 994, Bit14 (975~998) 24 986,
2896 11:35:09.973024 TX Bit7 (981~1005) 25 993, Bit15 (969~991) 23 980,
2897 11:35:09.973111
2898 11:35:09.973202 Write Rank0 MR14 =0x1e
2899 11:35:09.984164
2900 11:35:09.987557 CH=1, VrefRange= 0, VrefLevel = 30
2901 11:35:09.990790 TX Bit0 (983~1007) 25 995, Bit8 (971~995) 25 983,
2902 11:35:09.994145 TX Bit1 (981~1006) 26 993, Bit9 (970~994) 25 982,
2903 11:35:10.000823 TX Bit2 (978~1005) 28 991, Bit10 (974~998) 25 986,
2904 11:35:10.004149 TX Bit3 (977~1002) 26 989, Bit11 (975~999) 25 987,
2905 11:35:10.010450 TX Bit4 (981~1006) 26 993, Bit12 (975~998) 24 986,
2906 11:35:10.013757 TX Bit5 (983~1007) 25 995, Bit13 (975~999) 25 987,
2907 11:35:10.016821 TX Bit6 (982~1006) 25 994, Bit14 (975~999) 25 987,
2908 11:35:10.023364 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
2909 11:35:10.023447
2910 11:35:10.026820 Write Rank0 MR14 =0x20
2911 11:35:10.034798
2912 11:35:10.038182 CH=1, VrefRange= 0, VrefLevel = 32
2913 11:35:10.041189 TX Bit0 (983~1007) 25 995, Bit8 (971~995) 25 983,
2914 11:35:10.044647 TX Bit1 (981~1006) 26 993, Bit9 (970~993) 24 981,
2915 11:35:10.051157 TX Bit2 (978~1005) 28 991, Bit10 (975~998) 24 986,
2916 11:35:10.054818 TX Bit3 (977~1001) 25 989, Bit11 (975~999) 25 987,
2917 11:35:10.060950 TX Bit4 (982~1006) 25 994, Bit12 (975~998) 24 986,
2918 11:35:10.064148 TX Bit5 (982~1007) 26 994, Bit13 (975~999) 25 987,
2919 11:35:10.067450 TX Bit6 (981~1006) 26 993, Bit14 (974~999) 26 986,
2920 11:35:10.073944 TX Bit7 (980~1006) 27 993, Bit15 (968~992) 25 980,
2921 11:35:10.074030
2922 11:35:10.077279 Write Rank0 MR14 =0x22
2923 11:35:10.085170
2924 11:35:10.088639 CH=1, VrefRange= 0, VrefLevel = 34
2925 11:35:10.091765 TX Bit0 (983~1007) 25 995, Bit8 (971~995) 25 983,
2926 11:35:10.094926 TX Bit1 (981~1006) 26 993, Bit9 (970~993) 24 981,
2927 11:35:10.101830 TX Bit2 (978~1005) 28 991, Bit10 (975~998) 24 986,
2928 11:35:10.104806 TX Bit3 (977~1001) 25 989, Bit11 (975~999) 25 987,
2929 11:35:10.111557 TX Bit4 (982~1006) 25 994, Bit12 (975~998) 24 986,
2930 11:35:10.114713 TX Bit5 (982~1007) 26 994, Bit13 (975~999) 25 987,
2931 11:35:10.118194 TX Bit6 (981~1006) 26 993, Bit14 (974~999) 26 986,
2932 11:35:10.124839 TX Bit7 (980~1006) 27 993, Bit15 (968~992) 25 980,
2933 11:35:10.124925
2934 11:35:10.127733 Write Rank0 MR14 =0x24
2935 11:35:10.135712
2936 11:35:10.139058 CH=1, VrefRange= 0, VrefLevel = 36
2937 11:35:10.142229 TX Bit0 (983~1007) 25 995, Bit8 (971~995) 25 983,
2938 11:35:10.145634 TX Bit1 (981~1006) 26 993, Bit9 (970~993) 24 981,
2939 11:35:10.152045 TX Bit2 (978~1005) 28 991, Bit10 (975~998) 24 986,
2940 11:35:10.155392 TX Bit3 (977~1001) 25 989, Bit11 (975~999) 25 987,
2941 11:35:10.161878 TX Bit4 (982~1006) 25 994, Bit12 (975~998) 24 986,
2942 11:35:10.165394 TX Bit5 (982~1007) 26 994, Bit13 (975~999) 25 987,
2943 11:35:10.168491 TX Bit6 (981~1006) 26 993, Bit14 (974~999) 26 986,
2944 11:35:10.175131 TX Bit7 (980~1006) 27 993, Bit15 (968~992) 25 980,
2945 11:35:10.175206
2946 11:35:10.178061 Write Rank0 MR14 =0x26
2947 11:35:10.186086
2948 11:35:10.189251 CH=1, VrefRange= 0, VrefLevel = 38
2949 11:35:10.192829 TX Bit0 (983~1007) 25 995, Bit8 (971~995) 25 983,
2950 11:35:10.195888 TX Bit1 (981~1006) 26 993, Bit9 (970~993) 24 981,
2951 11:35:10.202364 TX Bit2 (978~1005) 28 991, Bit10 (975~998) 24 986,
2952 11:35:10.205837 TX Bit3 (977~1001) 25 989, Bit11 (975~999) 25 987,
2953 11:35:10.212282 TX Bit4 (982~1006) 25 994, Bit12 (975~998) 24 986,
2954 11:35:10.215728 TX Bit5 (982~1007) 26 994, Bit13 (975~999) 25 987,
2955 11:35:10.218800 TX Bit6 (981~1006) 26 993, Bit14 (974~999) 26 986,
2956 11:35:10.225089 TX Bit7 (980~1006) 27 993, Bit15 (968~992) 25 980,
2957 11:35:10.225180
2958 11:35:10.225254
2959 11:35:10.228549 TX Vref found, early break! 375< 385
2960 11:35:10.231901 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
2961 11:35:10.235023 u1DelayCellOfst[0]=7 cells (6 PI)
2962 11:35:10.238420 u1DelayCellOfst[1]=5 cells (4 PI)
2963 11:35:10.241563 u1DelayCellOfst[2]=2 cells (2 PI)
2964 11:35:10.245016 u1DelayCellOfst[3]=0 cells (0 PI)
2965 11:35:10.248311 u1DelayCellOfst[4]=6 cells (5 PI)
2966 11:35:10.251283 u1DelayCellOfst[5]=6 cells (5 PI)
2967 11:35:10.254695 u1DelayCellOfst[6]=5 cells (4 PI)
2968 11:35:10.258151 u1DelayCellOfst[7]=5 cells (4 PI)
2969 11:35:10.261371 Byte0, DQ PI dly=989, DQM PI dly= 992
2970 11:35:10.264630 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 29)
2971 11:35:10.264717
2972 11:35:10.267711 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 29)
2973 11:35:10.271059
2974 11:35:10.271145 u1DelayCellOfst[8]=3 cells (3 PI)
2975 11:35:10.274463 u1DelayCellOfst[9]=1 cells (1 PI)
2976 11:35:10.277439 u1DelayCellOfst[10]=7 cells (6 PI)
2977 11:35:10.281160 u1DelayCellOfst[11]=9 cells (7 PI)
2978 11:35:10.284384 u1DelayCellOfst[12]=7 cells (6 PI)
2979 11:35:10.287301 u1DelayCellOfst[13]=9 cells (7 PI)
2980 11:35:10.291008 u1DelayCellOfst[14]=7 cells (6 PI)
2981 11:35:10.294210 u1DelayCellOfst[15]=0 cells (0 PI)
2982 11:35:10.297374 Byte1, DQ PI dly=980, DQM PI dly= 983
2983 11:35:10.300452 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
2984 11:35:10.300525
2985 11:35:10.307015 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
2986 11:35:10.307091
2987 11:35:10.307154 Write Rank0 MR14 =0x20
2988 11:35:10.310417
2989 11:35:10.310488 Final TX Range 0 Vref 32
2990 11:35:10.310548
2991 11:35:10.316974 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2992 11:35:10.317056
2993 11:35:10.323569 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2994 11:35:10.330020 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2995 11:35:10.339777 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2996 11:35:10.339889 Write Rank0 MR3 =0xb0
2997 11:35:10.343175 DramC Write-DBI on
2998 11:35:10.343261 ==
2999 11:35:10.346502 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3000 11:35:10.349983 fsp= 1, odt_onoff= 1, Byte mode= 0
3001 11:35:10.350069 ==
3002 11:35:10.356379 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3003 11:35:10.356464
3004 11:35:10.356530 Begin, DQ Scan Range 703~767
3005 11:35:10.359448
3006 11:35:10.359559
3007 11:35:10.359626 TX Vref Scan disable
3008 11:35:10.362759 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3009 11:35:10.366074 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3010 11:35:10.369181 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3011 11:35:10.372612 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3012 11:35:10.375897 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3013 11:35:10.382284 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3014 11:35:10.385652 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3015 11:35:10.389065 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3016 11:35:10.392263 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3017 11:35:10.395432 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3018 11:35:10.398855 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3019 11:35:10.401923 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3020 11:35:10.405400 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3021 11:35:10.408546 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3022 11:35:10.411867 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3023 11:35:10.415386 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3024 11:35:10.418429 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3025 11:35:10.421595 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3026 11:35:10.424820 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3027 11:35:10.428412 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3028 11:35:10.434791 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3029 11:35:10.437945 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3030 11:35:10.444397 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3031 11:35:10.447745 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3032 11:35:10.451148 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3033 11:35:10.454369 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3034 11:35:10.457777 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3035 11:35:10.461018 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3036 11:35:10.464314 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3037 11:35:10.467408 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3038 11:35:10.470566 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3039 11:35:10.473824 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3040 11:35:10.477191 Byte0, DQ PI dly=737, DQM PI dly= 737
3041 11:35:10.483931 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
3042 11:35:10.484010
3043 11:35:10.487339 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
3044 11:35:10.487439
3045 11:35:10.490237 Byte1, DQ PI dly=727, DQM PI dly= 727
3046 11:35:10.493655 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 23)
3047 11:35:10.493751
3048 11:35:10.500448 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 23)
3049 11:35:10.500538
3050 11:35:10.506841 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3051 11:35:10.513339 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3052 11:35:10.519984 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3053 11:35:10.523281 Write Rank0 MR3 =0x30
3054 11:35:10.523362 DramC Write-DBI off
3055 11:35:10.523426
3056 11:35:10.526407 [DATLAT]
3057 11:35:10.529699 Freq=1600, CH1 RK0, use_rxtx_scan=0
3058 11:35:10.529786
3059 11:35:10.529858 DATLAT Default: 0xf
3060 11:35:10.533068 7, 0xFFFF, sum=0
3061 11:35:10.533155 8, 0xFFFF, sum=0
3062 11:35:10.536281 9, 0xFFFF, sum=0
3063 11:35:10.536368 10, 0xFFFF, sum=0
3064 11:35:10.539605 11, 0xFFFF, sum=0
3065 11:35:10.539694 12, 0xFFFF, sum=0
3066 11:35:10.542740 13, 0xFFFF, sum=0
3067 11:35:10.542854 14, 0x0, sum=1
3068 11:35:10.542953 15, 0x0, sum=2
3069 11:35:10.546037 16, 0x0, sum=3
3070 11:35:10.546151 17, 0x0, sum=4
3071 11:35:10.552693 pattern=2 first_step=14 total pass=5 best_step=16
3072 11:35:10.552779 ==
3073 11:35:10.555986 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3074 11:35:10.559401 fsp= 1, odt_onoff= 1, Byte mode= 0
3075 11:35:10.559512 ==
3076 11:35:10.565965 Start DQ dly to find pass range UseTestEngine =1
3077 11:35:10.568866 x-axis: bit #, y-axis: DQ dly (-127~63)
3078 11:35:10.568945 RX Vref Scan = 1
3079 11:35:10.676841
3080 11:35:10.677432 RX Vref found, early break!
3081 11:35:10.677924
3082 11:35:10.683429 Final RX Vref 11, apply to both rank0 and 1
3083 11:35:10.683954 ==
3084 11:35:10.687226 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
3085 11:35:10.690214 fsp= 1, odt_onoff= 1, Byte mode= 0
3086 11:35:10.690628 ==
3087 11:35:10.693471 DQS Delay:
3088 11:35:10.693979 DQS0 = 0, DQS1 = 0
3089 11:35:10.694419 DQM Delay:
3090 11:35:10.696549 DQM0 = 19, DQM1 = 18
3091 11:35:10.696936 DQ Delay:
3092 11:35:10.700263 DQ0 =20, DQ1 =21, DQ2 =18, DQ3 =15
3093 11:35:10.703318 DQ4 =20, DQ5 =23, DQ6 =22, DQ7 =19
3094 11:35:10.706660 DQ8 =17, DQ9 =16, DQ10 =19, DQ11 =20
3095 11:35:10.709662 DQ12 =20, DQ13 =21, DQ14 =21, DQ15 =12
3096 11:35:10.710182
3097 11:35:10.710621
3098 11:35:10.710988
3099 11:35:10.713053 [DramC_TX_OE_Calibration] TA2
3100 11:35:10.716106 Original DQ_B0 (3 6) =30, OEN = 27
3101 11:35:10.719511 Original DQ_B1 (3 6) =30, OEN = 27
3102 11:35:10.722751 23, 0x0, End_B0=23 End_B1=23
3103 11:35:10.726037 24, 0x0, End_B0=24 End_B1=24
3104 11:35:10.726426 25, 0x0, End_B0=25 End_B1=25
3105 11:35:10.729237 26, 0x0, End_B0=26 End_B1=26
3106 11:35:10.732766 27, 0x0, End_B0=27 End_B1=27
3107 11:35:10.735799 28, 0x0, End_B0=28 End_B1=28
3108 11:35:10.739190 29, 0x0, End_B0=29 End_B1=29
3109 11:35:10.739713 30, 0x0, End_B0=30 End_B1=30
3110 11:35:10.742267 31, 0xFFFF, End_B0=30 End_B1=30
3111 11:35:10.748996 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3112 11:35:10.755493 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3113 11:35:10.755886
3114 11:35:10.756185
3115 11:35:10.756463 Write Rank0 MR23 =0x3f
3116 11:35:10.758892 [DQSOSC]
3117 11:35:10.765184 [DQSOSCAuto] RK0, (LSB)MR18= 0xb7b7, (MSB)MR19= 0x202, tDQSOscB0 = 453 ps tDQSOscB1 = 453 ps
3118 11:35:10.771853 CH1_RK0: MR19=0x202, MR18=0xB7B7, DQSOSC=453, MR23=63, INC=11, DEC=17
3119 11:35:10.775319 Write Rank0 MR23 =0x3f
3120 11:35:10.775750 [DQSOSC]
3121 11:35:10.781815 [DQSOSCAuto] RK0, (LSB)MR18= 0xb8b8, (MSB)MR19= 0x202, tDQSOscB0 = 452 ps tDQSOscB1 = 452 ps
3122 11:35:10.784856 CH1 RK0: MR19=202, MR18=B8B8
3123 11:35:10.788358 [RankSwap] Rank num 2, (Multi 1), Rank 1
3124 11:35:10.791612 Write Rank0 MR2 =0xad
3125 11:35:10.792196 [Write Leveling]
3126 11:35:10.794703 delay byte0 byte1 byte2 byte3
3127 11:35:10.795085
3128 11:35:10.798034 10 0 0
3129 11:35:10.798423 11 0 0
3130 11:35:10.801476 12 0 0
3131 11:35:10.801872 13 0 0
3132 11:35:10.802202 14 0 0
3133 11:35:10.804726 15 0 0
3134 11:35:10.805113 16 0 0
3135 11:35:10.808014 17 0 0
3136 11:35:10.808514 18 0 0
3137 11:35:10.808835 19 0 0
3138 11:35:10.811133 20 0 0
3139 11:35:10.811566 21 0 0
3140 11:35:10.814462 22 0 0
3141 11:35:10.814850 23 0 0
3142 11:35:10.818003 24 0 0
3143 11:35:10.818408 25 0 0
3144 11:35:10.818710 26 0 0
3145 11:35:10.821480 27 0 0
3146 11:35:10.821872 28 0 ff
3147 11:35:10.824514 29 0 ff
3148 11:35:10.824947 30 0 ff
3149 11:35:10.828242 31 0 ff
3150 11:35:10.828809 32 0 ff
3151 11:35:10.830657 33 0 ff
3152 11:35:10.831082 34 ff ff
3153 11:35:10.831400 35 ff ff
3154 11:35:10.834319 36 ff ff
3155 11:35:10.834769 37 ff ff
3156 11:35:10.837510 38 ff ff
3157 11:35:10.837904 39 ff ff
3158 11:35:10.840551 40 ff ff
3159 11:35:10.844397 pass bytecount = 0xff (0xff: all bytes pass)
3160 11:35:10.844787
3161 11:35:10.845085 DQS0 dly: 34
3162 11:35:10.847403 DQS1 dly: 28
3163 11:35:10.847837 Write Rank0 MR2 =0x2d
3164 11:35:10.853819 [RankSwap] Rank num 2, (Multi 1), Rank 0
3165 11:35:10.854249 Write Rank1 MR1 =0xd6
3166 11:35:10.854563 [Gating]
3167 11:35:10.857116 ==
3168 11:35:10.860153 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3169 11:35:10.863576 fsp= 1, odt_onoff= 1, Byte mode= 0
3170 11:35:10.863968 ==
3171 11:35:10.866722 3 1 0 |2c2b 1616 |(11 11)(11 11) |(1 1)(1 1)| 0
3172 11:35:10.873614 3 1 4 |2c2b 2221 |(11 11)(11 11) |(1 1)(1 1)| 0
3173 11:35:10.876739 3 1 8 |2c2b 3635 |(11 11)(11 11) |(0 0)(0 0)| 0
3174 11:35:10.880051 3 1 12 |2c2b 3636 |(11 11)(0 0) |(0 0)(0 0)| 0
3175 11:35:10.886563 3 1 16 |2c2b e0e |(11 11)(11 11) |(1 0)(0 0)| 0
3176 11:35:10.889752 3 1 20 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
3177 11:35:10.892904 3 1 24 |2c2b 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
3178 11:35:10.899524 3 1 28 |2c2b 3535 |(11 11)(11 11) |(1 0)(1 1)| 0
3179 11:35:10.902890 3 2 0 |2c2b 2424 |(11 11)(11 11) |(1 0)(0 1)| 0
3180 11:35:10.906198 3 2 4 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 0)| 0
3181 11:35:10.912682 3 2 8 |2c2b 3635 |(11 11)(11 11) |(1 0)(0 1)| 0
3182 11:35:10.915762 3 2 12 |2c2b 3434 |(11 11)(0 0) |(1 0)(0 1)| 0
3183 11:35:10.919102 3 2 16 |2c2b 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3184 11:35:10.925983 3 2 20 |302 3434 |(11 11)(11 11) |(0 0)(1 1)| 0
3185 11:35:10.929023 3 2 24 |3534 1312 |(11 11)(11 11) |(0 0)(1 1)| 0
3186 11:35:10.932406 3 2 28 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3187 11:35:10.938793 3 3 0 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3188 11:35:10.942512 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3189 11:35:10.945434 3 3 8 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3190 11:35:10.951746 3 3 12 |3534 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3191 11:35:10.954839 3 3 16 |3534 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3192 11:35:10.958184 3 3 20 |3534 3d3c |(11 11)(11 11) |(1 1)(1 1)| 0
3193 11:35:10.964590 3 3 24 |3534 d0c |(11 11)(11 11) |(0 1)(1 1)| 0
3194 11:35:10.968145 3 3 28 |3534 706 |(11 11)(11 11) |(0 1)(1 1)| 0
3195 11:35:10.971168 [Byte 1] Lead/lag falling Transition (3, 3, 28)
3196 11:35:10.974358 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3197 11:35:10.980876 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3198 11:35:10.984303 3 4 8 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3199 11:35:10.987558 3 4 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3200 11:35:10.994157 3 4 16 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3201 11:35:10.997546 3 4 20 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3202 11:35:11.000393 3 4 24 |3d3d 2f2e |(11 11)(11 11) |(1 1)(0 1)| 0
3203 11:35:11.007207 3 4 28 |3d3d 3a39 |(11 11)(11 1) |(1 1)(1 1)| 0
3204 11:35:11.010660 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3205 11:35:11.013565 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3206 11:35:11.020070 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3207 11:35:11.023307 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3208 11:35:11.026649 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3209 11:35:11.033234 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3210 11:35:11.036780 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3211 11:35:11.039767 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3212 11:35:11.046242 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3213 11:35:11.049586 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3214 11:35:11.052774 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3215 11:35:11.059361 [Byte 0] Lead/lag falling Transition (3, 6, 8)
3216 11:35:11.062670 3 6 12 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3217 11:35:11.066089 [Byte 0] Lead/lag Transition tap number (2)
3218 11:35:11.069135 [Byte 1] Lead/lag falling Transition (3, 6, 12)
3219 11:35:11.075855 3 6 16 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3220 11:35:11.078934 3 6 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3221 11:35:11.082487 [Byte 1] Lead/lag Transition tap number (3)
3222 11:35:11.088861 3 6 24 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
3223 11:35:11.088948 [Byte 0]First pass (3, 6, 24)
3224 11:35:11.095383 3 6 28 |4646 2424 |(0 0)(11 11) |(0 0)(0 0)| 0
3225 11:35:11.098695 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3226 11:35:11.101849 [Byte 1]First pass (3, 7, 0)
3227 11:35:11.105301 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3228 11:35:11.108475 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3229 11:35:11.111809 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3230 11:35:11.118206 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3231 11:35:11.121650 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3232 11:35:11.124905 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3233 11:35:11.128247 3 7 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3234 11:35:11.134867 4 0 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3235 11:35:11.137917 All bytes gating window > 1UI, Early break!
3236 11:35:11.138029
3237 11:35:11.141299 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 12)
3238 11:35:11.141405
3239 11:35:11.144689 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 18)
3240 11:35:11.144807
3241 11:35:11.144905
3242 11:35:11.145004
3243 11:35:11.147654 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 12)
3244 11:35:11.147758
3245 11:35:11.154474 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 18)
3246 11:35:11.154560
3247 11:35:11.154626
3248 11:35:11.154687 Write Rank1 MR1 =0x56
3249 11:35:11.154749
3250 11:35:11.157777 best RODT dly(2T, 0.5T) = (2, 3)
3251 11:35:11.157847
3252 11:35:11.161097 best RODT dly(2T, 0.5T) = (2, 3)
3253 11:35:11.161186 ==
3254 11:35:11.167735 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3255 11:35:11.170621 fsp= 1, odt_onoff= 1, Byte mode= 0
3256 11:35:11.170802 ==
3257 11:35:11.174273 Start DQ dly to find pass range UseTestEngine =0
3258 11:35:11.177574 x-axis: bit #, y-axis: DQ dly (-127~63)
3259 11:35:11.180530 RX Vref Scan = 0
3260 11:35:11.183932 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3261 11:35:11.187019 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3262 11:35:11.187106 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3263 11:35:11.190462 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3264 11:35:11.193792 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3265 11:35:11.196858 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3266 11:35:11.199904 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3267 11:35:11.203163 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3268 11:35:11.206550 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3269 11:35:11.209821 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3270 11:35:11.213274 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3271 11:35:11.216562 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3272 11:35:11.216682 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3273 11:35:11.219477 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3274 11:35:11.223001 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3275 11:35:11.226451 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3276 11:35:11.229395 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3277 11:35:11.232954 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3278 11:35:11.235908 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3279 11:35:11.239239 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3280 11:35:11.239315 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3281 11:35:11.242533 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3282 11:35:11.245900 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3283 11:35:11.249105 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3284 11:35:11.252397 -2, [0] xxxoxxxx xoxxxxxo [MSB]
3285 11:35:11.255715 -1, [0] xxxoxxxx xoxxxxxo [MSB]
3286 11:35:11.258794 0, [0] xxxoxxxx ooxxxxxo [MSB]
3287 11:35:11.262096 1, [0] xxxoxxxx ooxxxxxo [MSB]
3288 11:35:11.262192 2, [0] xxxoxxxx ooxxoxxo [MSB]
3289 11:35:11.265703 3, [0] xxooxxxo oooxoxxo [MSB]
3290 11:35:11.268980 4, [0] xxooxxxo oooooxxo [MSB]
3291 11:35:11.272052 5, [0] oooooxoo oooooooo [MSB]
3292 11:35:11.275169 32, [0] oooooooo ooooooox [MSB]
3293 11:35:11.278574 33, [0] oooooooo ooooooox [MSB]
3294 11:35:11.281782 34, [0] oooooooo oxooooox [MSB]
3295 11:35:11.281858 35, [0] ooxxoooo xxooooox [MSB]
3296 11:35:11.285113 36, [0] ooxxoooo xxooooox [MSB]
3297 11:35:11.288457 37, [0] ooxxoooo xxooooox [MSB]
3298 11:35:11.291722 38, [0] ooxxoooo xxooooox [MSB]
3299 11:35:11.294969 39, [0] oxxxooox xxooooox [MSB]
3300 11:35:11.298190 40, [0] oxxxooox xxxxooox [MSB]
3301 11:35:11.301484 41, [0] oxxxxoxx xxxxxoox [MSB]
3302 11:35:11.301559 42, [0] xxxxxoxx xxxxxxxx [MSB]
3303 11:35:11.304845 43, [0] xxxxxxxx xxxxxxxx [MSB]
3304 11:35:11.308103 iDelay=43, Bit 0, Center 23 (5 ~ 41) 37
3305 11:35:11.314483 iDelay=43, Bit 1, Center 21 (5 ~ 38) 34
3306 11:35:11.317717 iDelay=43, Bit 2, Center 18 (3 ~ 34) 32
3307 11:35:11.321118 iDelay=43, Bit 3, Center 16 (-2 ~ 34) 37
3308 11:35:11.324321 iDelay=43, Bit 4, Center 22 (5 ~ 40) 36
3309 11:35:11.327743 iDelay=43, Bit 5, Center 24 (6 ~ 42) 37
3310 11:35:11.331085 iDelay=43, Bit 6, Center 22 (5 ~ 40) 36
3311 11:35:11.334336 iDelay=43, Bit 7, Center 20 (3 ~ 38) 36
3312 11:35:11.337609 iDelay=43, Bit 8, Center 17 (0 ~ 34) 35
3313 11:35:11.340706 iDelay=43, Bit 9, Center 15 (-2 ~ 33) 36
3314 11:35:11.344140 iDelay=43, Bit 10, Center 21 (3 ~ 39) 37
3315 11:35:11.347106 iDelay=43, Bit 11, Center 21 (4 ~ 39) 36
3316 11:35:11.353723 iDelay=43, Bit 12, Center 21 (2 ~ 40) 39
3317 11:35:11.357103 iDelay=43, Bit 13, Center 23 (5 ~ 41) 37
3318 11:35:11.360360 iDelay=43, Bit 14, Center 23 (5 ~ 41) 37
3319 11:35:11.363385 iDelay=43, Bit 15, Center 13 (-4 ~ 31) 36
3320 11:35:11.363494 ==
3321 11:35:11.366829 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3322 11:35:11.370254 fsp= 1, odt_onoff= 1, Byte mode= 0
3323 11:35:11.373353 ==
3324 11:35:11.373437 DQS Delay:
3325 11:35:11.373503 DQS0 = 0, DQS1 = 0
3326 11:35:11.376889 DQM Delay:
3327 11:35:11.376976 DQM0 = 20, DQM1 = 19
3328 11:35:11.380071 DQ Delay:
3329 11:35:11.380155 DQ0 =23, DQ1 =21, DQ2 =18, DQ3 =16
3330 11:35:11.383338 DQ4 =22, DQ5 =24, DQ6 =22, DQ7 =20
3331 11:35:11.386458 DQ8 =17, DQ9 =15, DQ10 =21, DQ11 =21
3332 11:35:11.389929 DQ12 =21, DQ13 =23, DQ14 =23, DQ15 =13
3333 11:35:11.393098
3334 11:35:11.393182
3335 11:35:11.393248 DramC Write-DBI off
3336 11:35:11.393309 ==
3337 11:35:11.399553 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3338 11:35:11.402898 fsp= 1, odt_onoff= 1, Byte mode= 0
3339 11:35:11.402991 ==
3340 11:35:11.406097 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3341 11:35:11.406182
3342 11:35:11.409461 Begin, DQ Scan Range 924~1180
3343 11:35:11.409546
3344 11:35:11.409611
3345 11:35:11.412777 TX Vref Scan disable
3346 11:35:11.415771 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
3347 11:35:11.419173 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
3348 11:35:11.422369 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
3349 11:35:11.425737 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
3350 11:35:11.429167 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3351 11:35:11.432527 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3352 11:35:11.435356 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3353 11:35:11.438791 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3354 11:35:11.442029 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3355 11:35:11.445194 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3356 11:35:11.451861 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3357 11:35:11.455503 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3358 11:35:11.458609 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3359 11:35:11.461568 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3360 11:35:11.465049 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3361 11:35:11.468381 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3362 11:35:11.471317 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3363 11:35:11.474702 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3364 11:35:11.477957 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3365 11:35:11.481448 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3366 11:35:11.484645 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3367 11:35:11.487891 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3368 11:35:11.494365 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3369 11:35:11.497885 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3370 11:35:11.501155 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3371 11:35:11.504415 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3372 11:35:11.507863 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3373 11:35:11.510767 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3374 11:35:11.514259 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3375 11:35:11.517231 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3376 11:35:11.520625 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3377 11:35:11.523860 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3378 11:35:11.527235 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3379 11:35:11.530512 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3380 11:35:11.533895 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3381 11:35:11.540409 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3382 11:35:11.543374 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3383 11:35:11.546918 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3384 11:35:11.550121 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3385 11:35:11.553575 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3386 11:35:11.556657 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3387 11:35:11.560500 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3388 11:35:11.563371 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3389 11:35:11.566411 967 |3 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3390 11:35:11.569955 968 |3 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3391 11:35:11.573015 969 |3 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3392 11:35:11.576345 970 |3 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3393 11:35:11.579822 971 |3 6 11|[0] xxxxxxxx xxxxxxxx [MSB]
3394 11:35:11.582883 972 |3 6 12|[0] xxxxxxxx xxxxxxxx [MSB]
3395 11:35:11.586355 973 |3 6 13|[0] xxxxxxxx xxxxxxxx [MSB]
3396 11:35:11.589826 974 |3 6 14|[0] xxxxxxxx ooxxxxxo [MSB]
3397 11:35:11.595888 975 |3 6 15|[0] xxxxxxxx ooxxxxxo [MSB]
3398 11:35:11.599183 976 |3 6 16|[0] xxxxxxxx oooxxxoo [MSB]
3399 11:35:11.602563 977 |3 6 17|[0] xxxxxxxx oooooooo [MSB]
3400 11:35:11.605711 978 |3 6 18|[0] xxxxxxxx oooooooo [MSB]
3401 11:35:11.609023 979 |3 6 19|[0] xxxxxxxx oooooooo [MSB]
3402 11:35:11.612389 980 |3 6 20|[0] xxxxxxxx oooooooo [MSB]
3403 11:35:11.615509 981 |3 6 21|[0] xxxxxxxx oooooooo [MSB]
3404 11:35:11.618877 982 |3 6 22|[0] xooooxox oooooooo [MSB]
3405 11:35:11.625435 991 |3 6 31|[0] oooooooo ooooooox [MSB]
3406 11:35:11.628704 992 |3 6 32|[0] oooooooo oxooooox [MSB]
3407 11:35:11.632152 993 |3 6 33|[0] oooooooo xxooooox [MSB]
3408 11:35:11.635154 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3409 11:35:11.638430 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3410 11:35:11.641603 996 |3 6 36|[0] oooooooo xxxxxxxx [MSB]
3411 11:35:11.645297 997 |3 6 37|[0] oooooooo xxxxxxxx [MSB]
3412 11:35:11.648158 998 |3 6 38|[0] oooooooo xxxxxxxx [MSB]
3413 11:35:11.651803 999 |3 6 39|[0] oooxoooo xxxxxxxx [MSB]
3414 11:35:11.654715 1000 |3 6 40|[0] oooxoooo xxxxxxxx [MSB]
3415 11:35:11.658160 1001 |3 6 41|[0] oooxoooo xxxxxxxx [MSB]
3416 11:35:11.664498 1002 |3 6 42|[0] ooxxoooo xxxxxxxx [MSB]
3417 11:35:11.667942 1003 |3 6 43|[0] ooxxooox xxxxxxxx [MSB]
3418 11:35:11.671043 1004 |3 6 44|[0] ooxxooox xxxxxxxx [MSB]
3419 11:35:11.674335 1005 |3 6 45|[0] xxxxxxxx xxxxxxxx [MSB]
3420 11:35:11.677787 Byte0, DQ PI dly=991, DQM PI dly= 991
3421 11:35:11.681173 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 31)
3422 11:35:11.681259
3423 11:35:11.687566 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 31)
3424 11:35:11.687687
3425 11:35:11.690726 Byte1, DQ PI dly=983, DQM PI dly= 983
3426 11:35:11.694247 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3427 11:35:11.694332
3428 11:35:11.697369 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3429 11:35:11.697471
3430 11:35:11.700541 ==
3431 11:35:11.703716 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3432 11:35:11.706975 fsp= 1, odt_onoff= 1, Byte mode= 0
3433 11:35:11.707047 ==
3434 11:35:11.710495 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3435 11:35:11.710581
3436 11:35:11.713646 Begin, DQ Scan Range 959~1023
3437 11:35:11.716684 Write Rank1 MR14 =0x0
3438 11:35:11.725014
3439 11:35:11.727878 CH=1, VrefRange= 0, VrefLevel = 0
3440 11:35:11.731320 TX Bit0 (985~1000) 16 992, Bit8 (977~988) 12 982,
3441 11:35:11.734460 TX Bit1 (984~998) 15 991, Bit9 (976~987) 12 981,
3442 11:35:11.741175 TX Bit2 (983~997) 15 990, Bit10 (977~992) 16 984,
3443 11:35:11.744245 TX Bit3 (979~992) 14 985, Bit11 (978~992) 15 985,
3444 11:35:11.747570 TX Bit4 (984~999) 16 991, Bit12 (979~990) 12 984,
3445 11:35:11.754203 TX Bit5 (985~1000) 16 992, Bit13 (979~992) 14 985,
3446 11:35:11.757313 TX Bit6 (984~998) 15 991, Bit14 (978~991) 14 984,
3447 11:35:11.764019 TX Bit7 (984~997) 14 990, Bit15 (973~984) 12 978,
3448 11:35:11.764106
3449 11:35:11.764172 Write Rank1 MR14 =0x2
3450 11:35:11.773610
3451 11:35:11.773694 CH=1, VrefRange= 0, VrefLevel = 2
3452 11:35:11.780204 TX Bit0 (985~1001) 17 993, Bit8 (977~989) 13 983,
3453 11:35:11.783676 TX Bit1 (984~999) 16 991, Bit9 (976~988) 13 982,
3454 11:35:11.790020 TX Bit2 (983~997) 15 990, Bit10 (977~993) 17 985,
3455 11:35:11.793237 TX Bit3 (980~993) 14 986, Bit11 (978~993) 16 985,
3456 11:35:11.796360 TX Bit4 (983~999) 17 991, Bit12 (978~991) 14 984,
3457 11:35:11.803298 TX Bit5 (985~1001) 17 993, Bit13 (978~993) 16 985,
3458 11:35:11.806361 TX Bit6 (984~999) 16 991, Bit14 (978~991) 14 984,
3459 11:35:11.812808 TX Bit7 (984~998) 15 991, Bit15 (973~985) 13 979,
3460 11:35:11.812893
3461 11:35:11.812961 Write Rank1 MR14 =0x4
3462 11:35:11.822343
3463 11:35:11.822429 CH=1, VrefRange= 0, VrefLevel = 4
3464 11:35:11.829038 TX Bit0 (985~1002) 18 993, Bit8 (977~990) 14 983,
3465 11:35:11.832422 TX Bit1 (984~1000) 17 992, Bit9 (975~989) 15 982,
3466 11:35:11.839050 TX Bit2 (982~998) 17 990, Bit10 (977~994) 18 985,
3467 11:35:11.842040 TX Bit3 (979~994) 16 986, Bit11 (978~993) 16 985,
3468 11:35:11.848819 TX Bit4 (983~1000) 18 991, Bit12 (979~991) 13 985,
3469 11:35:11.852138 TX Bit5 (984~1001) 18 992, Bit13 (979~994) 16 986,
3470 11:35:11.855126 TX Bit6 (984~1000) 17 992, Bit14 (978~991) 14 984,
3471 11:35:11.861997 TX Bit7 (984~999) 16 991, Bit15 (972~986) 15 979,
3472 11:35:11.862108
3473 11:35:11.862214 Write Rank1 MR14 =0x6
3474 11:35:11.872488
3475 11:35:11.872596 CH=1, VrefRange= 0, VrefLevel = 6
3476 11:35:11.878371 TX Bit0 (985~1003) 19 994, Bit8 (976~990) 15 983,
3477 11:35:11.881841 TX Bit1 (983~1000) 18 991, Bit9 (975~990) 16 982,
3478 11:35:11.888364 TX Bit2 (981~998) 18 989, Bit10 (977~994) 18 985,
3479 11:35:11.891358 TX Bit3 (978~996) 19 987, Bit11 (978~994) 17 986,
3480 11:35:11.894727 TX Bit4 (983~1000) 18 991, Bit12 (978~992) 15 985,
3481 11:35:11.901213 TX Bit5 (984~1002) 19 993, Bit13 (978~995) 18 986,
3482 11:35:11.904509 TX Bit6 (984~1000) 17 992, Bit14 (978~992) 15 985,
3483 11:35:11.911274 TX Bit7 (984~999) 16 991, Bit15 (971~987) 17 979,
3484 11:35:11.911385
3485 11:35:11.911503 Write Rank1 MR14 =0x8
3486 11:35:11.921415
3487 11:35:11.921537 CH=1, VrefRange= 0, VrefLevel = 8
3488 11:35:11.927855 TX Bit0 (984~1003) 20 993, Bit8 (976~990) 15 983,
3489 11:35:11.931257 TX Bit1 (983~1001) 19 992, Bit9 (974~990) 17 982,
3490 11:35:11.937929 TX Bit2 (981~999) 19 990, Bit10 (977~995) 19 986,
3491 11:35:11.941030 TX Bit3 (979~996) 18 987, Bit11 (978~995) 18 986,
3492 11:35:11.944298 TX Bit4 (982~1001) 20 991, Bit12 (978~992) 15 985,
3493 11:35:11.951041 TX Bit5 (984~1002) 19 993, Bit13 (978~995) 18 986,
3494 11:35:11.954183 TX Bit6 (983~1001) 19 992, Bit14 (977~992) 16 984,
3495 11:35:11.960666 TX Bit7 (984~1000) 17 992, Bit15 (971~988) 18 979,
3496 11:35:11.960751
3497 11:35:11.960818 Write Rank1 MR14 =0xa
3498 11:35:11.970996
3499 11:35:11.974390 CH=1, VrefRange= 0, VrefLevel = 10
3500 11:35:11.977686 TX Bit0 (984~1005) 22 994, Bit8 (976~991) 16 983,
3501 11:35:11.981157 TX Bit1 (983~1001) 19 992, Bit9 (974~990) 17 982,
3502 11:35:11.987597 TX Bit2 (980~999) 20 989, Bit10 (976~996) 21 986,
3503 11:35:11.990910 TX Bit3 (978~997) 20 987, Bit11 (977~996) 20 986,
3504 11:35:11.997254 TX Bit4 (982~1002) 21 992, Bit12 (977~993) 17 985,
3505 11:35:12.000654 TX Bit5 (984~1004) 21 994, Bit13 (978~996) 19 987,
3506 11:35:12.003697 TX Bit6 (983~1002) 20 992, Bit14 (977~993) 17 985,
3507 11:35:12.010293 TX Bit7 (983~1000) 18 991, Bit15 (971~989) 19 980,
3508 11:35:12.010374
3509 11:35:12.013449 wait MRW command Rank1 MR14 =0xc fired (1)
3510 11:35:12.016851 Write Rank1 MR14 =0xc
3511 11:35:12.025104
3512 11:35:12.027860 CH=1, VrefRange= 0, VrefLevel = 12
3513 11:35:12.031167 TX Bit0 (984~1005) 22 994, Bit8 (976~991) 16 983,
3514 11:35:12.034404 TX Bit1 (983~1002) 20 992, Bit9 (974~990) 17 982,
3515 11:35:12.041062 TX Bit2 (980~1000) 21 990, Bit10 (976~997) 22 986,
3516 11:35:12.044247 TX Bit3 (978~997) 20 987, Bit11 (977~997) 21 987,
3517 11:35:12.051129 TX Bit4 (982~1003) 22 992, Bit12 (978~993) 16 985,
3518 11:35:12.054301 TX Bit5 (984~1004) 21 994, Bit13 (978~997) 20 987,
3519 11:35:12.057290 TX Bit6 (983~1002) 20 992, Bit14 (977~994) 18 985,
3520 11:35:12.064132 TX Bit7 (983~1001) 19 992, Bit15 (971~989) 19 980,
3521 11:35:12.064213
3522 11:35:12.064278 Write Rank1 MR14 =0xe
3523 11:35:12.074543
3524 11:35:12.077841 CH=1, VrefRange= 0, VrefLevel = 14
3525 11:35:12.081378 TX Bit0 (984~1005) 22 994, Bit8 (975~991) 17 983,
3526 11:35:12.084749 TX Bit1 (982~1003) 22 992, Bit9 (973~991) 19 982,
3527 11:35:12.091272 TX Bit2 (980~1000) 21 990, Bit10 (976~997) 22 986,
3528 11:35:12.094322 TX Bit3 (978~997) 20 987, Bit11 (977~997) 21 987,
3529 11:35:12.100882 TX Bit4 (981~1003) 23 992, Bit12 (977~994) 18 985,
3530 11:35:12.104037 TX Bit5 (984~1005) 22 994, Bit13 (977~998) 22 987,
3531 11:35:12.107355 TX Bit6 (982~1003) 22 992, Bit14 (977~995) 19 986,
3532 11:35:12.113857 TX Bit7 (983~1002) 20 992, Bit15 (970~990) 21 980,
3533 11:35:12.113952
3534 11:35:12.114046 Write Rank1 MR14 =0x10
3535 11:35:12.124576
3536 11:35:12.128093 CH=1, VrefRange= 0, VrefLevel = 16
3537 11:35:12.131304 TX Bit0 (983~1005) 23 994, Bit8 (975~992) 18 983,
3538 11:35:12.134497 TX Bit1 (982~1004) 23 993, Bit9 (973~991) 19 982,
3539 11:35:12.141160 TX Bit2 (979~1001) 23 990, Bit10 (976~998) 23 987,
3540 11:35:12.144506 TX Bit3 (978~998) 21 988, Bit11 (977~998) 22 987,
3541 11:35:12.151178 TX Bit4 (982~1004) 23 993, Bit12 (977~995) 19 986,
3542 11:35:12.154490 TX Bit5 (983~1005) 23 994, Bit13 (978~998) 21 988,
3543 11:35:12.157455 TX Bit6 (982~1004) 23 993, Bit14 (976~996) 21 986,
3544 11:35:12.164032 TX Bit7 (982~1002) 21 992, Bit15 (970~991) 22 980,
3545 11:35:12.164117
3546 11:35:12.164182 Write Rank1 MR14 =0x12
3547 11:35:12.174809
3548 11:35:12.178201 CH=1, VrefRange= 0, VrefLevel = 18
3549 11:35:12.181593 TX Bit0 (983~1005) 23 994, Bit8 (974~992) 19 983,
3550 11:35:12.185004 TX Bit1 (982~1004) 23 993, Bit9 (972~992) 21 982,
3551 11:35:12.191245 TX Bit2 (979~1002) 24 990, Bit10 (975~998) 24 986,
3552 11:35:12.194579 TX Bit3 (977~998) 22 987, Bit11 (976~998) 23 987,
3553 11:35:12.201103 TX Bit4 (981~1005) 25 993, Bit12 (977~996) 20 986,
3554 11:35:12.204451 TX Bit5 (983~1005) 23 994, Bit13 (977~998) 22 987,
3555 11:35:12.207409 TX Bit6 (982~1004) 23 993, Bit14 (976~996) 21 986,
3556 11:35:12.214200 TX Bit7 (983~1003) 21 993, Bit15 (970~991) 22 980,
3557 11:35:12.214285
3558 11:35:12.214351 Write Rank1 MR14 =0x14
3559 11:35:12.224938
3560 11:35:12.228273 CH=1, VrefRange= 0, VrefLevel = 20
3561 11:35:12.231907 TX Bit0 (983~1006) 24 994, Bit8 (973~993) 21 983,
3562 11:35:12.234908 TX Bit1 (981~1005) 25 993, Bit9 (972~992) 21 982,
3563 11:35:12.241623 TX Bit2 (979~1002) 24 990, Bit10 (975~998) 24 986,
3564 11:35:12.245100 TX Bit3 (977~999) 23 988, Bit11 (976~999) 24 987,
3565 11:35:12.251361 TX Bit4 (980~1005) 26 992, Bit12 (977~997) 21 987,
3566 11:35:12.254687 TX Bit5 (982~1005) 24 993, Bit13 (977~998) 22 987,
3567 11:35:12.257819 TX Bit6 (981~1005) 25 993, Bit14 (976~997) 22 986,
3568 11:35:12.264399 TX Bit7 (981~1004) 24 992, Bit15 (970~991) 22 980,
3569 11:35:12.264484
3570 11:35:12.264550 Write Rank1 MR14 =0x16
3571 11:35:12.275202
3572 11:35:12.278498 CH=1, VrefRange= 0, VrefLevel = 22
3573 11:35:12.282097 TX Bit0 (983~1006) 24 994, Bit8 (973~993) 21 983,
3574 11:35:12.285097 TX Bit1 (981~1005) 25 993, Bit9 (971~992) 22 981,
3575 11:35:12.291693 TX Bit2 (979~1003) 25 991, Bit10 (975~999) 25 987,
3576 11:35:12.294903 TX Bit3 (977~999) 23 988, Bit11 (976~999) 24 987,
3577 11:35:12.301348 TX Bit4 (980~1005) 26 992, Bit12 (976~997) 22 986,
3578 11:35:12.304610 TX Bit5 (982~1005) 24 993, Bit13 (977~999) 23 988,
3579 11:35:12.308075 TX Bit6 (981~1005) 25 993, Bit14 (976~998) 23 987,
3580 11:35:12.314626 TX Bit7 (982~1004) 23 993, Bit15 (969~991) 23 980,
3581 11:35:12.314711
3582 11:35:12.314777 Write Rank1 MR14 =0x18
3583 11:35:12.325547
3584 11:35:12.328858 CH=1, VrefRange= 0, VrefLevel = 24
3585 11:35:12.331956 TX Bit0 (982~1006) 25 994, Bit8 (972~994) 23 983,
3586 11:35:12.335262 TX Bit1 (981~1005) 25 993, Bit9 (971~993) 23 982,
3587 11:35:12.341700 TX Bit2 (979~1003) 25 991, Bit10 (974~999) 26 986,
3588 11:35:12.345431 TX Bit3 (977~999) 23 988, Bit11 (975~999) 25 987,
3589 11:35:12.351567 TX Bit4 (980~1005) 26 992, Bit12 (976~998) 23 987,
3590 11:35:12.354802 TX Bit5 (982~1006) 25 994, Bit13 (976~999) 24 987,
3591 11:35:12.358250 TX Bit6 (981~1005) 25 993, Bit14 (976~998) 23 987,
3592 11:35:12.365147 TX Bit7 (981~1005) 25 993, Bit15 (969~991) 23 980,
3593 11:35:12.365233
3594 11:35:12.365299 Write Rank1 MR14 =0x1a
3595 11:35:12.375678
3596 11:35:12.379175 CH=1, VrefRange= 0, VrefLevel = 26
3597 11:35:12.382254 TX Bit0 (982~1006) 25 994, Bit8 (972~995) 24 983,
3598 11:35:12.385457 TX Bit1 (980~1006) 27 993, Bit9 (971~994) 24 982,
3599 11:35:12.392258 TX Bit2 (978~1004) 27 991, Bit10 (974~999) 26 986,
3600 11:35:12.395407 TX Bit3 (977~1000) 24 988, Bit11 (975~999) 25 987,
3601 11:35:12.401862 TX Bit4 (979~1006) 28 992, Bit12 (976~998) 23 987,
3602 11:35:12.405050 TX Bit5 (982~1006) 25 994, Bit13 (976~999) 24 987,
3603 11:35:12.408540 TX Bit6 (980~1006) 27 993, Bit14 (975~998) 24 986,
3604 11:35:12.414965 TX Bit7 (981~1005) 25 993, Bit15 (969~992) 24 980,
3605 11:35:12.415049
3606 11:35:12.418295 Write Rank1 MR14 =0x1c
3607 11:35:12.425842
3608 11:35:12.429160 CH=1, VrefRange= 0, VrefLevel = 28
3609 11:35:12.432635 TX Bit0 (982~1006) 25 994, Bit8 (972~995) 24 983,
3610 11:35:12.436080 TX Bit1 (979~1006) 28 992, Bit9 (971~994) 24 982,
3611 11:35:12.442298 TX Bit2 (978~1004) 27 991, Bit10 (974~999) 26 986,
3612 11:35:12.445581 TX Bit3 (977~1001) 25 989, Bit11 (975~999) 25 987,
3613 11:35:12.452031 TX Bit4 (979~1006) 28 992, Bit12 (976~998) 23 987,
3614 11:35:12.455285 TX Bit5 (981~1006) 26 993, Bit13 (976~999) 24 987,
3615 11:35:12.458755 TX Bit6 (980~1006) 27 993, Bit14 (975~999) 25 987,
3616 11:35:12.465438 TX Bit7 (981~1006) 26 993, Bit15 (969~992) 24 980,
3617 11:35:12.465524
3618 11:35:12.468301 Write Rank1 MR14 =0x1e
3619 11:35:12.476258
3620 11:35:12.479471 CH=1, VrefRange= 0, VrefLevel = 30
3621 11:35:12.482722 TX Bit0 (981~1007) 27 994, Bit8 (971~996) 26 983,
3622 11:35:12.486010 TX Bit1 (980~1006) 27 993, Bit9 (970~995) 26 982,
3623 11:35:12.492511 TX Bit2 (978~1004) 27 991, Bit10 (975~999) 25 987,
3624 11:35:12.495751 TX Bit3 (976~1001) 26 988, Bit11 (975~999) 25 987,
3625 11:35:12.502685 TX Bit4 (980~1006) 27 993, Bit12 (975~999) 25 987,
3626 11:35:12.505557 TX Bit5 (981~1006) 26 993, Bit13 (975~999) 25 987,
3627 11:35:12.509131 TX Bit6 (979~1006) 28 992, Bit14 (975~998) 24 986,
3628 11:35:12.515404 TX Bit7 (979~1005) 27 992, Bit15 (969~992) 24 980,
3629 11:35:12.515528
3630 11:35:12.518512 Write Rank1 MR14 =0x20
3631 11:35:12.526814
3632 11:35:12.530623 CH=1, VrefRange= 0, VrefLevel = 32
3633 11:35:12.533074 TX Bit0 (981~1007) 27 994, Bit8 (971~996) 26 983,
3634 11:35:12.536528 TX Bit1 (980~1006) 27 993, Bit9 (970~995) 26 982,
3635 11:35:12.543204 TX Bit2 (978~1004) 27 991, Bit10 (975~999) 25 987,
3636 11:35:12.546272 TX Bit3 (976~1001) 26 988, Bit11 (975~999) 25 987,
3637 11:35:12.552987 TX Bit4 (980~1006) 27 993, Bit12 (975~999) 25 987,
3638 11:35:12.556056 TX Bit5 (981~1006) 26 993, Bit13 (975~999) 25 987,
3639 11:35:12.559319 TX Bit6 (979~1006) 28 992, Bit14 (975~998) 24 986,
3640 11:35:12.566142 TX Bit7 (979~1005) 27 992, Bit15 (969~992) 24 980,
3641 11:35:12.566255
3642 11:35:12.569026 Write Rank1 MR14 =0x22
3643 11:35:12.577359
3644 11:35:12.580610 CH=1, VrefRange= 0, VrefLevel = 34
3645 11:35:12.583733 TX Bit0 (981~1007) 27 994, Bit8 (971~996) 26 983,
3646 11:35:12.587145 TX Bit1 (980~1006) 27 993, Bit9 (970~995) 26 982,
3647 11:35:12.593629 TX Bit2 (978~1004) 27 991, Bit10 (975~999) 25 987,
3648 11:35:12.596794 TX Bit3 (976~1001) 26 988, Bit11 (975~999) 25 987,
3649 11:35:12.603379 TX Bit4 (980~1006) 27 993, Bit12 (975~999) 25 987,
3650 11:35:12.606567 TX Bit5 (981~1006) 26 993, Bit13 (975~999) 25 987,
3651 11:35:12.610135 TX Bit6 (979~1006) 28 992, Bit14 (975~998) 24 986,
3652 11:35:12.616665 TX Bit7 (979~1005) 27 992, Bit15 (969~992) 24 980,
3653 11:35:12.616761
3654 11:35:12.619945 Write Rank1 MR14 =0x24
3655 11:35:12.627576
3656 11:35:12.630788 CH=1, VrefRange= 0, VrefLevel = 36
3657 11:35:12.634049 TX Bit0 (981~1007) 27 994, Bit8 (971~996) 26 983,
3658 11:35:12.637306 TX Bit1 (980~1006) 27 993, Bit9 (970~995) 26 982,
3659 11:35:12.644041 TX Bit2 (978~1004) 27 991, Bit10 (975~999) 25 987,
3660 11:35:12.647288 TX Bit3 (976~1001) 26 988, Bit11 (975~999) 25 987,
3661 11:35:12.653665 TX Bit4 (980~1006) 27 993, Bit12 (975~999) 25 987,
3662 11:35:12.657072 TX Bit5 (981~1006) 26 993, Bit13 (975~999) 25 987,
3663 11:35:12.660595 TX Bit6 (979~1006) 28 992, Bit14 (975~998) 24 986,
3664 11:35:12.666742 TX Bit7 (979~1005) 27 992, Bit15 (969~992) 24 980,
3665 11:35:12.666830
3666 11:35:12.666896
3667 11:35:12.670179 TX Vref found, early break! 390< 394
3668 11:35:12.673242 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =735/100 ps
3669 11:35:12.676840 u1DelayCellOfst[0]=7 cells (6 PI)
3670 11:35:12.679983 u1DelayCellOfst[1]=6 cells (5 PI)
3671 11:35:12.683328 u1DelayCellOfst[2]=3 cells (3 PI)
3672 11:35:12.686372 u1DelayCellOfst[3]=0 cells (0 PI)
3673 11:35:12.689991 u1DelayCellOfst[4]=6 cells (5 PI)
3674 11:35:12.692914 u1DelayCellOfst[5]=6 cells (5 PI)
3675 11:35:12.696196 u1DelayCellOfst[6]=5 cells (4 PI)
3676 11:35:12.699641 u1DelayCellOfst[7]=5 cells (4 PI)
3677 11:35:12.702847 Byte0, DQ PI dly=988, DQM PI dly= 991
3678 11:35:12.706173 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 28)
3679 11:35:12.706258
3680 11:35:12.712367 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 28)
3681 11:35:12.712460
3682 11:35:12.712525 u1DelayCellOfst[8]=3 cells (3 PI)
3683 11:35:12.715679 u1DelayCellOfst[9]=2 cells (2 PI)
3684 11:35:12.718863 u1DelayCellOfst[10]=9 cells (7 PI)
3685 11:35:12.722245 u1DelayCellOfst[11]=9 cells (7 PI)
3686 11:35:12.725870 u1DelayCellOfst[12]=9 cells (7 PI)
3687 11:35:12.729095 u1DelayCellOfst[13]=9 cells (7 PI)
3688 11:35:12.732341 u1DelayCellOfst[14]=7 cells (6 PI)
3689 11:35:12.735418 u1DelayCellOfst[15]=0 cells (0 PI)
3690 11:35:12.738705 Byte1, DQ PI dly=980, DQM PI dly= 983
3691 11:35:12.741832 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
3692 11:35:12.745395
3693 11:35:12.748432 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
3694 11:35:12.748518
3695 11:35:12.748584 Write Rank1 MR14 =0x1e
3696 11:35:12.751634
3697 11:35:12.751735 Final TX Range 0 Vref 30
3698 11:35:12.751819
3699 11:35:12.758284 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3700 11:35:12.758370
3701 11:35:12.764785 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3702 11:35:12.771433 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3703 11:35:12.781173 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3704 11:35:12.781253 Write Rank1 MR3 =0xb0
3705 11:35:12.784541 DramC Write-DBI on
3706 11:35:12.784623 ==
3707 11:35:12.787808 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3708 11:35:12.790793 fsp= 1, odt_onoff= 1, Byte mode= 0
3709 11:35:12.790886 ==
3710 11:35:12.797357 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3711 11:35:12.797438
3712 11:35:12.800922 Begin, DQ Scan Range 703~767
3713 11:35:12.801003
3714 11:35:12.801068
3715 11:35:12.801128 TX Vref Scan disable
3716 11:35:12.804456 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3717 11:35:12.807339 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3718 11:35:12.810721 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3719 11:35:12.814050 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3720 11:35:12.820261 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3721 11:35:12.823731 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3722 11:35:12.826931 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3723 11:35:12.830284 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3724 11:35:12.833923 711 |2 6 7|[0] xxxxxxxx xxxxxxxx [MSB]
3725 11:35:12.836783 712 |2 6 8|[0] xxxxxxxx xxxxxxxx [MSB]
3726 11:35:12.840132 713 |2 6 9|[0] xxxxxxxx xxxxxxxx [MSB]
3727 11:35:12.843576 714 |2 6 10|[0] xxxxxxxx xxxxxxxx [MSB]
3728 11:35:12.846536 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3729 11:35:12.849961 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3730 11:35:12.853367 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3731 11:35:12.856320 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3732 11:35:12.859742 719 |2 6 15|[0] xxxxxxxx oooooooo [MSB]
3733 11:35:12.863113 720 |2 6 16|[0] xxxxxxxx oooooooo [MSB]
3734 11:35:12.866326 721 |2 6 17|[0] xxxxxxxx oooooooo [MSB]
3735 11:35:12.872933 722 |2 6 18|[0] xxxxxxxx oooooooo [MSB]
3736 11:35:12.876023 723 |2 6 19|[0] xxxxxxxx oooooooo [MSB]
3737 11:35:12.882731 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3738 11:35:12.885985 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
3739 11:35:12.889347 745 |2 6 41|[0] oooooooo xxxxxxxx [MSB]
3740 11:35:12.892720 746 |2 6 42|[0] oooooooo xxxxxxxx [MSB]
3741 11:35:12.895641 747 |2 6 43|[0] oooooooo xxxxxxxx [MSB]
3742 11:35:12.898978 748 |2 6 44|[0] oooooooo xxxxxxxx [MSB]
3743 11:35:12.902361 749 |2 6 45|[0] oooooooo xxxxxxxx [MSB]
3744 11:35:12.905740 750 |2 6 46|[0] oooooooo xxxxxxxx [MSB]
3745 11:35:12.908750 751 |2 6 47|[0] xxxxxxxx xxxxxxxx [MSB]
3746 11:35:12.912241 Byte0, DQ PI dly=737, DQM PI dly= 737
3747 11:35:12.918614 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 33)
3748 11:35:12.918700
3749 11:35:12.921958 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 33)
3750 11:35:12.922042
3751 11:35:12.925190 Byte1, DQ PI dly=728, DQM PI dly= 728
3752 11:35:12.928637 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
3753 11:35:12.928722
3754 11:35:12.935207 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
3755 11:35:12.935293
3756 11:35:12.941774 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3757 11:35:12.948244 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3758 11:35:12.954580 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3759 11:35:12.957900 Write Rank1 MR3 =0x30
3760 11:35:12.958009 DramC Write-DBI off
3761 11:35:12.958104
3762 11:35:12.961380 [DATLAT]
3763 11:35:12.964407 Freq=1600, CH1 RK1, use_rxtx_scan=0
3764 11:35:12.964518
3765 11:35:12.964614 DATLAT Default: 0x10
3766 11:35:12.967825 7, 0xFFFF, sum=0
3767 11:35:12.967917 8, 0xFFFF, sum=0
3768 11:35:12.971142 9, 0xFFFF, sum=0
3769 11:35:12.971249 10, 0xFFFF, sum=0
3770 11:35:12.974004 11, 0xFFFF, sum=0
3771 11:35:12.974122 12, 0xFFFF, sum=0
3772 11:35:12.977554 13, 0xFFFF, sum=0
3773 11:35:12.977667 14, 0x0, sum=1
3774 11:35:12.977766 15, 0x0, sum=2
3775 11:35:12.980747 16, 0x0, sum=3
3776 11:35:12.980860 17, 0x0, sum=4
3777 11:35:12.987373 pattern=2 first_step=14 total pass=5 best_step=16
3778 11:35:12.987484 ==
3779 11:35:12.990585 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3780 11:35:12.993912 fsp= 1, odt_onoff= 1, Byte mode= 0
3781 11:35:12.993997 ==
3782 11:35:13.000260 Start DQ dly to find pass range UseTestEngine =1
3783 11:35:13.003572 x-axis: bit #, y-axis: DQ dly (-127~63)
3784 11:35:13.003684 RX Vref Scan = 0
3785 11:35:13.007016 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3786 11:35:13.010207 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3787 11:35:13.013673 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3788 11:35:13.016710 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3789 11:35:13.020086 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3790 11:35:13.020176 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3791 11:35:13.023316 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3792 11:35:13.026769 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3793 11:35:13.029754 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3794 11:35:13.033119 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3795 11:35:13.036473 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3796 11:35:13.039835 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3797 11:35:13.042915 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3798 11:35:13.046284 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3799 11:35:13.049518 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3800 11:35:13.049627 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3801 11:35:13.052951 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3802 11:35:13.056081 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3803 11:35:13.059244 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3804 11:35:13.062741 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3805 11:35:13.066161 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3806 11:35:13.069527 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3807 11:35:13.072478 -4, [0] xxxxxxxx xxxxxxxo [MSB]
3808 11:35:13.072563 -3, [0] xxxxxxxx xxxxxxxo [MSB]
3809 11:35:13.075889 -2, [0] xxxxxxxx xoxxxxxo [MSB]
3810 11:35:13.079019 -1, [0] xxxoxxxx ooxxxxxo [MSB]
3811 11:35:13.082338 0, [0] xxxoxxxx ooxxxxxo [MSB]
3812 11:35:13.085584 1, [0] xxxoxxxx ooxxxxxo [MSB]
3813 11:35:13.088799 2, [0] xxxoxxxx ooxxxxxo [MSB]
3814 11:35:13.092132 3, [0] xxooxxxo oooooxxo [MSB]
3815 11:35:13.092218 4, [0] ooooxxxo oooooooo [MSB]
3816 11:35:13.095450 5, [0] oooooxxo oooooooo [MSB]
3817 11:35:13.099869 32, [0] oooooooo ooooooox [MSB]
3818 11:35:13.103057 33, [0] oooooooo ooooooox [MSB]
3819 11:35:13.106257 34, [0] oooxoooo oxooooox [MSB]
3820 11:35:13.109498 35, [0] ooxxoooo oxooooox [MSB]
3821 11:35:13.112769 36, [0] ooxxoooo xxooooox [MSB]
3822 11:35:13.116308 37, [0] ooxxoooo xxooooox [MSB]
3823 11:35:13.119468 38, [0] ooxxoooo xxooxoox [MSB]
3824 11:35:13.119555 39, [0] ooxxooox xxxxxoox [MSB]
3825 11:35:13.122640 40, [0] oxxxxoox xxxxxxox [MSB]
3826 11:35:13.126143 41, [0] xxxxxxxx xxxxxxxx [MSB]
3827 11:35:13.129122 iDelay=41, Bit 0, Center 22 (4 ~ 40) 37
3828 11:35:13.132444 iDelay=41, Bit 1, Center 21 (4 ~ 39) 36
3829 11:35:13.135798 iDelay=41, Bit 2, Center 18 (3 ~ 34) 32
3830 11:35:13.142287 iDelay=41, Bit 3, Center 16 (-1 ~ 33) 35
3831 11:35:13.145539 iDelay=41, Bit 4, Center 22 (5 ~ 39) 35
3832 11:35:13.148926 iDelay=41, Bit 5, Center 23 (6 ~ 40) 35
3833 11:35:13.152175 iDelay=41, Bit 6, Center 23 (6 ~ 40) 35
3834 11:35:13.155567 iDelay=41, Bit 7, Center 20 (3 ~ 38) 36
3835 11:35:13.158830 iDelay=41, Bit 8, Center 17 (-1 ~ 35) 37
3836 11:35:13.162054 iDelay=41, Bit 9, Center 15 (-2 ~ 33) 36
3837 11:35:13.165348 iDelay=41, Bit 10, Center 20 (3 ~ 38) 36
3838 11:35:13.168403 iDelay=41, Bit 11, Center 20 (3 ~ 38) 36
3839 11:35:13.171769 iDelay=41, Bit 12, Center 20 (3 ~ 37) 35
3840 11:35:13.178640 iDelay=41, Bit 13, Center 21 (4 ~ 39) 36
3841 11:35:13.181801 iDelay=41, Bit 14, Center 22 (4 ~ 40) 37
3842 11:35:13.185366 iDelay=41, Bit 15, Center 13 (-4 ~ 31) 36
3843 11:35:13.185753 ==
3844 11:35:13.188395 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3845 11:35:13.191870 fsp= 1, odt_onoff= 1, Byte mode= 0
3846 11:35:13.192253 ==
3847 11:35:13.195075 DQS Delay:
3848 11:35:13.195556 DQS0 = 0, DQS1 = 0
3849 11:35:13.198140 DQM Delay:
3850 11:35:13.198520 DQM0 = 20, DQM1 = 18
3851 11:35:13.198820 DQ Delay:
3852 11:35:13.201409 DQ0 =22, DQ1 =21, DQ2 =18, DQ3 =16
3853 11:35:13.204659 DQ4 =22, DQ5 =23, DQ6 =23, DQ7 =20
3854 11:35:13.208084 DQ8 =17, DQ9 =15, DQ10 =20, DQ11 =20
3855 11:35:13.211397 DQ12 =20, DQ13 =21, DQ14 =22, DQ15 =13
3856 11:35:13.211835
3857 11:35:13.214724
3858 11:35:13.215106
3859 11:35:13.215407 [DramC_TX_OE_Calibration] TA2
3860 11:35:13.218142 Original DQ_B0 (3 6) =30, OEN = 27
3861 11:35:13.220932 Original DQ_B1 (3 6) =30, OEN = 27
3862 11:35:13.224593 23, 0x0, End_B0=23 End_B1=23
3863 11:35:13.227586 24, 0x0, End_B0=24 End_B1=24
3864 11:35:13.230901 25, 0x0, End_B0=25 End_B1=25
3865 11:35:13.231335 26, 0x0, End_B0=26 End_B1=26
3866 11:35:13.234008 27, 0x0, End_B0=27 End_B1=27
3867 11:35:13.237673 28, 0x0, End_B0=28 End_B1=28
3868 11:35:13.240683 29, 0x0, End_B0=29 End_B1=29
3869 11:35:13.243985 30, 0x0, End_B0=30 End_B1=30
3870 11:35:13.244381 31, 0xFFFF, End_B0=30 End_B1=30
3871 11:35:13.250746 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3872 11:35:13.256899 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3873 11:35:13.257293
3874 11:35:13.257599
3875 11:35:13.260297 Write Rank1 MR23 =0x3f
3876 11:35:13.260687 [DQSOSC]
3877 11:35:13.267095 [DQSOSCAuto] RK1, (LSB)MR18= 0xbaba, (MSB)MR19= 0x202, tDQSOscB0 = 451 ps tDQSOscB1 = 451 ps
3878 11:35:13.273516 CH1_RK1: MR19=0x202, MR18=0xBABA, DQSOSC=451, MR23=63, INC=12, DEC=18
3879 11:35:13.276884 Write Rank1 MR23 =0x3f
3880 11:35:13.277277 [DQSOSC]
3881 11:35:13.286430 [DQSOSCAuto] RK1, (LSB)MR18= 0xb9b9, (MSB)MR19= 0x202, tDQSOscB0 = 451 ps tDQSOscB1 = 451 ps
3882 11:35:13.286827 CH1 RK1: MR19=202, MR18=B9B9
3883 11:35:13.289727 [RxdqsGatingPostProcess] freq 1600
3884 11:35:13.296358 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3885 11:35:13.296767 Rank: 0
3886 11:35:13.299799 best DQS0 dly(2T, 0.5T) = (2, 6)
3887 11:35:13.302788 best DQS1 dly(2T, 0.5T) = (2, 6)
3888 11:35:13.306090 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3889 11:35:13.309444 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3890 11:35:13.309840 Rank: 1
3891 11:35:13.312576 best DQS0 dly(2T, 0.5T) = (2, 6)
3892 11:35:13.316024 best DQS1 dly(2T, 0.5T) = (2, 6)
3893 11:35:13.319340 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
3894 11:35:13.322438 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
3895 11:35:13.325738 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3896 11:35:13.329155 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3897 11:35:13.335702 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3898 11:35:13.336094
3899 11:35:13.336398
3900 11:35:13.338758 [Calibration Summary] Freqency 1600
3901 11:35:13.339148 CH 0, Rank 0
3902 11:35:13.342113 All Pass.
3903 11:35:13.342573
3904 11:35:13.342886 CH 0, Rank 1
3905 11:35:13.343172 All Pass.
3906 11:35:13.343448
3907 11:35:13.345295 CH 1, Rank 0
3908 11:35:13.345685 All Pass.
3909 11:35:13.345990
3910 11:35:13.346272 CH 1, Rank 1
3911 11:35:13.348918 All Pass.
3912 11:35:13.349404
3913 11:35:13.355178 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3914 11:35:13.361704 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3915 11:35:13.368491 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3916 11:35:13.371945 Write Rank0 MR3 =0xb0
3917 11:35:13.378291 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3918 11:35:13.384440 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3919 11:35:13.391203 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3920 11:35:13.394527 Write Rank1 MR3 =0xb0
3921 11:35:13.401356 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3922 11:35:13.407840 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3923 11:35:13.414442 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3924 11:35:13.414919 Write Rank0 MR3 =0xb0
3925 11:35:13.421220 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3926 11:35:13.430487 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3927 11:35:13.437017 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3928 11:35:13.437410 Write Rank1 MR3 =0xb0
3929 11:35:13.440511 DramC Write-DBI on
3930 11:35:13.443766 [GetDramInforAfterCalByMRR] Vendor 6.
3931 11:35:13.446835 [GetDramInforAfterCalByMRR] Revision 505.
3932 11:35:13.447221 MR8 1111
3933 11:35:13.453197 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3934 11:35:13.453590 MR8 1111
3935 11:35:13.456487 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3936 11:35:13.460047 MR8 1111
3937 11:35:13.463096 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3938 11:35:13.463514 MR8 1111
3939 11:35:13.469816 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3940 11:35:13.479806 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3941 11:35:13.480198 Write Rank0 MR13 =0xd0
3942 11:35:13.483156 Write Rank1 MR13 =0xd0
3943 11:35:13.486160 Write Rank0 MR13 =0xd0
3944 11:35:13.486570 Write Rank1 MR13 =0xd0
3945 11:35:13.489193 Save calibration result to emmc
3946 11:35:13.489544
3947 11:35:13.489846
3948 11:35:13.492797 [DramcModeReg_Check] Freq_1600, FSP_1
3949 11:35:13.495805 FSP_1, CH_0, RK0
3950 11:35:13.496197 Write Rank0 MR13 =0xd8
3951 11:35:13.499403 MR12 = 0x5c (global = 0x5c) match
3952 11:35:13.502438 MR14 = 0x1c (global = 0x1c) match
3953 11:35:13.505790 FSP_1, CH_0, RK1
3954 11:35:13.506259 Write Rank1 MR13 =0xd8
3955 11:35:13.509224 MR12 = 0x5e (global = 0x5e) match
3956 11:35:13.512593 MR14 = 0x1e (global = 0x1e) match
3957 11:35:13.515512 FSP_1, CH_1, RK0
3958 11:35:13.515898 Write Rank0 MR13 =0xd8
3959 11:35:13.518803 MR12 = 0x5c (global = 0x5c) match
3960 11:35:13.522000 MR14 = 0x20 (global = 0x20) match
3961 11:35:13.525420 FSP_1, CH_1, RK1
3962 11:35:13.525805 Write Rank1 MR13 =0xd8
3963 11:35:13.528720 MR12 = 0x5c (global = 0x5c) match
3964 11:35:13.531920 MR14 = 0x1e (global = 0x1e) match
3965 11:35:13.532315
3966 11:35:13.538602 [MEM_TEST] 02: After DFS, before run time config
3967 11:35:13.548341 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3968 11:35:13.548730
3969 11:35:13.549029 [TA2_TEST]
3970 11:35:13.549308 === TA2 HW
3971 11:35:13.551726 TA2 PAT: XTALK
3972 11:35:13.554961 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3973 11:35:13.561535 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3974 11:35:13.564901 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3975 11:35:13.571126 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3976 11:35:13.571502
3977 11:35:13.571780
3978 11:35:13.572034 Settings after calibration
3979 11:35:13.574433
3980 11:35:13.574828 [DramcRunTimeConfig]
3981 11:35:13.577699 TransferPLLToSPMControl - MODE SW PHYPLL
3982 11:35:13.581355 TX_TRACKING: ON
3983 11:35:13.581739 RX_TRACKING: ON
3984 11:35:13.584305 HW_GATING: ON
3985 11:35:13.584703 HW_GATING DBG: OFF
3986 11:35:13.585007 ddr_geometry:1
3987 11:35:13.587814 ddr_geometry:1
3988 11:35:13.588199 ddr_geometry:1
3989 11:35:13.590821 ddr_geometry:1
3990 11:35:13.591205 ddr_geometry:1
3991 11:35:13.594414 ddr_geometry:1
3992 11:35:13.594799 ddr_geometry:1
3993 11:35:13.595100 ddr_geometry:1
3994 11:35:13.597411 High Freq DUMMY_READ_FOR_TRACKING: ON
3995 11:35:13.600905 ZQCS_ENABLE_LP4: OFF
3996 11:35:13.604148 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3997 11:35:13.607204 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3998 11:35:13.610419 SPM_CONTROL_AFTERK: ON
3999 11:35:13.610827 IMPEDANCE_TRACKING: ON
4000 11:35:13.614171 TEMP_SENSOR: ON
4001 11:35:13.614556 PER_BANK_REFRESH: ON
4002 11:35:13.617130 HW_SAVE_FOR_SR: ON
4003 11:35:13.620627 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
4004 11:35:13.623821 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
4005 11:35:13.627023 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
4006 11:35:13.627527 Read ODT Tracking: ON
4007 11:35:13.630075 =========================
4008 11:35:13.630457
4009 11:35:13.633603 [TA2_TEST]
4010 11:35:13.633982 === TA2 HW
4011 11:35:13.636894 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
4012 11:35:13.643468 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
4013 11:35:13.646566 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
4014 11:35:13.653508 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
4015 11:35:13.653890
4016 11:35:13.656333 [MEM_TEST] 03: After run time config
4017 11:35:13.666569 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
4018 11:35:13.669552 [complex_mem_test] start addr:0x40024000, len:131072
4019 11:35:13.874064 1st complex R/W mem test pass
4020 11:35:13.880349 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
4021 11:35:13.883771 sync preloader write leveling
4022 11:35:13.886724 sync preloader cbt_mr12
4023 11:35:13.890065 sync preloader cbt_clk_dly
4024 11:35:13.890537 sync preloader cbt_cmd_dly
4025 11:35:13.893491 sync preloader cbt_cs
4026 11:35:13.896771 sync preloader cbt_ca_perbit_delay
4027 11:35:13.899885 sync preloader clk_delay
4028 11:35:13.900430 sync preloader dqs_delay
4029 11:35:13.903149 sync preloader u1Gating2T_Save
4030 11:35:13.906540 sync preloader u1Gating05T_Save
4031 11:35:13.909942 sync preloader u1Gatingfine_tune_Save
4032 11:35:13.913147 sync preloader u1Gatingucpass_count_Save
4033 11:35:13.916647 sync preloader u1TxWindowPerbitVref_Save
4034 11:35:13.919834 sync preloader u1TxCenter_min_Save
4035 11:35:13.922793 sync preloader u1TxCenter_max_Save
4036 11:35:13.926468 sync preloader u1Txwin_center_Save
4037 11:35:13.929510 sync preloader u1Txfirst_pass_Save
4038 11:35:13.932705 sync preloader u1Txlast_pass_Save
4039 11:35:13.936203 sync preloader u1RxDatlat_Save
4040 11:35:13.939344 sync preloader u1RxWinPerbitVref_Save
4041 11:35:13.942664 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4042 11:35:13.946021 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4043 11:35:13.949094 sync preloader delay_cell_unit
4044 11:35:13.955957 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
4045 11:35:13.959125 sync preloader write leveling
4046 11:35:13.962128 sync preloader cbt_mr12
4047 11:35:13.962514 sync preloader cbt_clk_dly
4048 11:35:13.965586 sync preloader cbt_cmd_dly
4049 11:35:13.968608 sync preloader cbt_cs
4050 11:35:13.971932 sync preloader cbt_ca_perbit_delay
4051 11:35:13.972316 sync preloader clk_delay
4052 11:35:13.975544 sync preloader dqs_delay
4053 11:35:13.978484 sync preloader u1Gating2T_Save
4054 11:35:13.981869 sync preloader u1Gating05T_Save
4055 11:35:13.984962 sync preloader u1Gatingfine_tune_Save
4056 11:35:13.988145 sync preloader u1Gatingucpass_count_Save
4057 11:35:13.991674 sync preloader u1TxWindowPerbitVref_Save
4058 11:35:13.995067 sync preloader u1TxCenter_min_Save
4059 11:35:13.998126 sync preloader u1TxCenter_max_Save
4060 11:35:14.001364 sync preloader u1Txwin_center_Save
4061 11:35:14.004932 sync preloader u1Txfirst_pass_Save
4062 11:35:14.007847 sync preloader u1Txlast_pass_Save
4063 11:35:14.011285 sync preloader u1RxDatlat_Save
4064 11:35:14.014319 sync preloader u1RxWinPerbitVref_Save
4065 11:35:14.018093 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4066 11:35:14.021025 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4067 11:35:14.024556 sync preloader delay_cell_unit
4068 11:35:14.030871 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
4069 11:35:14.034260 sync preloader write leveling
4070 11:35:14.037227 sync preloader cbt_mr12
4071 11:35:14.037731 sync preloader cbt_clk_dly
4072 11:35:14.040509 sync preloader cbt_cmd_dly
4073 11:35:14.043934 sync preloader cbt_cs
4074 11:35:14.047237 sync preloader cbt_ca_perbit_delay
4075 11:35:14.047668 sync preloader clk_delay
4076 11:35:14.050545 sync preloader dqs_delay
4077 11:35:14.053640 sync preloader u1Gating2T_Save
4078 11:35:14.057283 sync preloader u1Gating05T_Save
4079 11:35:14.060499 sync preloader u1Gatingfine_tune_Save
4080 11:35:14.063423 sync preloader u1Gatingucpass_count_Save
4081 11:35:14.066944 sync preloader u1TxWindowPerbitVref_Save
4082 11:35:14.069888 sync preloader u1TxCenter_min_Save
4083 11:35:14.073296 sync preloader u1TxCenter_max_Save
4084 11:35:14.076721 sync preloader u1Txwin_center_Save
4085 11:35:14.079975 sync preloader u1Txfirst_pass_Save
4086 11:35:14.083307 sync preloader u1Txlast_pass_Save
4087 11:35:14.083611 sync preloader u1RxDatlat_Save
4088 11:35:14.086656 sync preloader u1RxWinPerbitVref_Save
4089 11:35:14.092831 sync preloader u1RxWinPerbitDQ_firsbypass_Save
4090 11:35:14.096202 sync preloader u1RxWinPerbitDQ_lastbypass_Save
4091 11:35:14.099347 sync preloader delay_cell_unit
4092 11:35:14.102721 just_for_test_dump_coreboot_params dump all params
4093 11:35:14.105749 dump source = 0x0
4094 11:35:14.105852 dump params frequency:1600
4095 11:35:14.109152 dump params rank number:2
4096 11:35:14.109235
4097 11:35:14.112367 dump params write leveling
4098 11:35:14.115788 write leveling[0][0][0] = 0x20
4099 11:35:14.118916 write leveling[0][0][1] = 0x1b
4100 11:35:14.122453 write leveling[0][1][0] = 0x1b
4101 11:35:14.122537 write leveling[0][1][1] = 0x17
4102 11:35:14.125671 write leveling[1][0][0] = 0x24
4103 11:35:14.128834 write leveling[1][0][1] = 0x1c
4104 11:35:14.132123 write leveling[1][1][0] = 0x22
4105 11:35:14.135935 write leveling[1][1][1] = 0x1c
4106 11:35:14.136052 dump params cbt_cs
4107 11:35:14.138528 cbt_cs[0][0] = 0x6
4108 11:35:14.138611 cbt_cs[0][1] = 0x6
4109 11:35:14.142048 cbt_cs[1][0] = 0xb
4110 11:35:14.142132 cbt_cs[1][1] = 0xb
4111 11:35:14.145253 dump params cbt_mr12
4112 11:35:14.148676 cbt_mr12[0][0] = 0x1c
4113 11:35:14.148760 cbt_mr12[0][1] = 0x1e
4114 11:35:14.151881 cbt_mr12[1][0] = 0x1c
4115 11:35:14.151964 cbt_mr12[1][1] = 0x1c
4116 11:35:14.155290 dump params tx window
4117 11:35:14.158229 tx_center_min[0][0][0] = 985
4118 11:35:14.161403 tx_center_max[0][0][0] = 991
4119 11:35:14.161489 tx_center_min[0][0][1] = 979
4120 11:35:14.164804 tx_center_max[0][0][1] = 986
4121 11:35:14.168089 tx_center_min[0][1][0] = 982
4122 11:35:14.171290 tx_center_max[0][1][0] = 989
4123 11:35:14.174592 tx_center_min[0][1][1] = 978
4124 11:35:14.174677 tx_center_max[0][1][1] = 985
4125 11:35:14.177997 tx_center_min[1][0][0] = 989
4126 11:35:14.181001 tx_center_max[1][0][0] = 995
4127 11:35:14.184368 tx_center_min[1][0][1] = 980
4128 11:35:14.187800 tx_center_max[1][0][1] = 987
4129 11:35:14.187883 tx_center_min[1][1][0] = 988
4130 11:35:14.190832 tx_center_max[1][1][0] = 994
4131 11:35:14.194152 tx_center_min[1][1][1] = 980
4132 11:35:14.197571 tx_center_max[1][1][1] = 987
4133 11:35:14.197655 dump params tx window
4134 11:35:14.200823 tx_win_center[0][0][0] = 991
4135 11:35:14.204127 tx_first_pass[0][0][0] = 979
4136 11:35:14.207379 tx_last_pass[0][0][0] = 1003
4137 11:35:14.211063 tx_win_center[0][0][1] = 990
4138 11:35:14.211147 tx_first_pass[0][0][1] = 978
4139 11:35:14.214032 tx_last_pass[0][0][1] = 1002
4140 11:35:14.216856 tx_win_center[0][0][2] = 990
4141 11:35:14.220526 tx_first_pass[0][0][2] = 979
4142 11:35:14.223565 tx_last_pass[0][0][2] = 1002
4143 11:35:14.223649 tx_win_center[0][0][3] = 985
4144 11:35:14.226749 tx_first_pass[0][0][3] = 974
4145 11:35:14.230086 tx_last_pass[0][0][3] = 997
4146 11:35:14.233388 tx_win_center[0][0][4] = 989
4147 11:35:14.236589 tx_first_pass[0][0][4] = 977
4148 11:35:14.236674 tx_last_pass[0][0][4] = 1001
4149 11:35:14.239922 tx_win_center[0][0][5] = 987
4150 11:35:14.243224 tx_first_pass[0][0][5] = 976
4151 11:35:14.246567 tx_last_pass[0][0][5] = 999
4152 11:35:14.249694 tx_win_center[0][0][6] = 988
4153 11:35:14.249778 tx_first_pass[0][0][6] = 977
4154 11:35:14.253218 tx_last_pass[0][0][6] = 1000
4155 11:35:14.256350 tx_win_center[0][0][7] = 990
4156 11:35:14.259695 tx_first_pass[0][0][7] = 978
4157 11:35:14.262897 tx_last_pass[0][0][7] = 1002
4158 11:35:14.262982 tx_win_center[0][0][8] = 979
4159 11:35:14.265926 tx_first_pass[0][0][8] = 968
4160 11:35:14.269389 tx_last_pass[0][0][8] = 991
4161 11:35:14.272855 tx_win_center[0][0][9] = 981
4162 11:35:14.275750 tx_first_pass[0][0][9] = 969
4163 11:35:14.275860 tx_last_pass[0][0][9] = 993
4164 11:35:14.279269 tx_win_center[0][0][10] = 986
4165 11:35:14.282249 tx_first_pass[0][0][10] = 974
4166 11:35:14.285521 tx_last_pass[0][0][10] = 998
4167 11:35:14.289033 tx_win_center[0][0][11] = 980
4168 11:35:14.289135 tx_first_pass[0][0][11] = 968
4169 11:35:14.292306 tx_last_pass[0][0][11] = 992
4170 11:35:14.295376 tx_win_center[0][0][12] = 981
4171 11:35:14.298716 tx_first_pass[0][0][12] = 970
4172 11:35:14.302083 tx_last_pass[0][0][12] = 993
4173 11:35:14.302187 tx_win_center[0][0][13] = 981
4174 11:35:14.305498 tx_first_pass[0][0][13] = 970
4175 11:35:14.308363 tx_last_pass[0][0][13] = 993
4176 11:35:14.311804 tx_win_center[0][0][14] = 983
4177 11:35:14.315053 tx_first_pass[0][0][14] = 970
4178 11:35:14.318750 tx_last_pass[0][0][14] = 996
4179 11:35:14.318857 tx_win_center[0][0][15] = 985
4180 11:35:14.321732 tx_first_pass[0][0][15] = 973
4181 11:35:14.324825 tx_last_pass[0][0][15] = 998
4182 11:35:14.328286 tx_win_center[0][1][0] = 989
4183 11:35:14.331407 tx_first_pass[0][1][0] = 978
4184 11:35:14.331527 tx_last_pass[0][1][0] = 1001
4185 11:35:14.334683 tx_win_center[0][1][1] = 988
4186 11:35:14.338095 tx_first_pass[0][1][1] = 977
4187 11:35:14.341244 tx_last_pass[0][1][1] = 1000
4188 11:35:14.345000 tx_win_center[0][1][2] = 989
4189 11:35:14.345204 tx_first_pass[0][1][2] = 977
4190 11:35:14.347965 tx_last_pass[0][1][2] = 1001
4191 11:35:14.351359 tx_win_center[0][1][3] = 982
4192 11:35:14.354706 tx_first_pass[0][1][3] = 970
4193 11:35:14.357882 tx_last_pass[0][1][3] = 994
4194 11:35:14.358128 tx_win_center[0][1][4] = 988
4195 11:35:14.361361 tx_first_pass[0][1][4] = 976
4196 11:35:14.364390 tx_last_pass[0][1][4] = 1000
4197 11:35:14.367800 tx_win_center[0][1][5] = 986
4198 11:35:14.370979 tx_first_pass[0][1][5] = 974
4199 11:35:14.371425 tx_last_pass[0][1][5] = 998
4200 11:35:14.374349 tx_win_center[0][1][6] = 987
4201 11:35:14.377792 tx_first_pass[0][1][6] = 976
4202 11:35:14.381106 tx_last_pass[0][1][6] = 999
4203 11:35:14.381715 tx_win_center[0][1][7] = 988
4204 11:35:14.384246 tx_first_pass[0][1][7] = 976
4205 11:35:14.387531 tx_last_pass[0][1][7] = 1001
4206 11:35:14.390908 tx_win_center[0][1][8] = 978
4207 11:35:14.394062 tx_first_pass[0][1][8] = 967
4208 11:35:14.394599 tx_last_pass[0][1][8] = 990
4209 11:35:14.397467 tx_win_center[0][1][9] = 979
4210 11:35:14.400855 tx_first_pass[0][1][9] = 968
4211 11:35:14.403747 tx_last_pass[0][1][9] = 991
4212 11:35:14.407076 tx_win_center[0][1][10] = 985
4213 11:35:14.407560 tx_first_pass[0][1][10] = 973
4214 11:35:14.410468 tx_last_pass[0][1][10] = 998
4215 11:35:14.413862 tx_win_center[0][1][11] = 978
4216 11:35:14.417118 tx_first_pass[0][1][11] = 967
4217 11:35:14.420078 tx_last_pass[0][1][11] = 990
4218 11:35:14.423403 tx_win_center[0][1][12] = 979
4219 11:35:14.423866 tx_first_pass[0][1][12] = 968
4220 11:35:14.426838 tx_last_pass[0][1][12] = 991
4221 11:35:14.430021 tx_win_center[0][1][13] = 979
4222 11:35:14.433170 tx_first_pass[0][1][13] = 968
4223 11:35:14.436627 tx_last_pass[0][1][13] = 991
4224 11:35:14.437016 tx_win_center[0][1][14] = 981
4225 11:35:14.439754 tx_first_pass[0][1][14] = 969
4226 11:35:14.443172 tx_last_pass[0][1][14] = 993
4227 11:35:14.446403 tx_win_center[0][1][15] = 984
4228 11:35:14.449523 tx_first_pass[0][1][15] = 972
4229 11:35:14.453128 tx_last_pass[0][1][15] = 997
4230 11:35:14.453514 tx_win_center[1][0][0] = 995
4231 11:35:14.456351 tx_first_pass[1][0][0] = 983
4232 11:35:14.459706 tx_last_pass[1][0][0] = 1007
4233 11:35:14.462706 tx_win_center[1][0][1] = 993
4234 11:35:14.466279 tx_first_pass[1][0][1] = 981
4235 11:35:14.466683 tx_last_pass[1][0][1] = 1006
4236 11:35:14.469030 tx_win_center[1][0][2] = 991
4237 11:35:14.472673 tx_first_pass[1][0][2] = 978
4238 11:35:14.476219 tx_last_pass[1][0][2] = 1005
4239 11:35:14.479278 tx_win_center[1][0][3] = 989
4240 11:35:14.479703 tx_first_pass[1][0][3] = 977
4241 11:35:14.482303 tx_last_pass[1][0][3] = 1001
4242 11:35:14.485401 tx_win_center[1][0][4] = 994
4243 11:35:14.488704 tx_first_pass[1][0][4] = 982
4244 11:35:14.492082 tx_last_pass[1][0][4] = 1006
4245 11:35:14.492470 tx_win_center[1][0][5] = 994
4246 11:35:14.495304 tx_first_pass[1][0][5] = 982
4247 11:35:14.498793 tx_last_pass[1][0][5] = 1007
4248 11:35:14.502205 tx_win_center[1][0][6] = 993
4249 11:35:14.505268 tx_first_pass[1][0][6] = 981
4250 11:35:14.505878 tx_last_pass[1][0][6] = 1006
4251 11:35:14.508579 tx_win_center[1][0][7] = 993
4252 11:35:14.511740 tx_first_pass[1][0][7] = 980
4253 11:35:14.514840 tx_last_pass[1][0][7] = 1006
4254 11:35:14.514924 tx_win_center[1][0][8] = 983
4255 11:35:14.518275 tx_first_pass[1][0][8] = 971
4256 11:35:14.521249 tx_last_pass[1][0][8] = 995
4257 11:35:14.524571 tx_win_center[1][0][9] = 981
4258 11:35:14.527808 tx_first_pass[1][0][9] = 970
4259 11:35:14.527892 tx_last_pass[1][0][9] = 993
4260 11:35:14.530978 tx_win_center[1][0][10] = 986
4261 11:35:14.534328 tx_first_pass[1][0][10] = 975
4262 11:35:14.538144 tx_last_pass[1][0][10] = 998
4263 11:35:14.541287 tx_win_center[1][0][11] = 987
4264 11:35:14.544057 tx_first_pass[1][0][11] = 975
4265 11:35:14.544141 tx_last_pass[1][0][11] = 999
4266 11:35:14.547384 tx_win_center[1][0][12] = 986
4267 11:35:14.550890 tx_first_pass[1][0][12] = 975
4268 11:35:14.554245 tx_last_pass[1][0][12] = 998
4269 11:35:14.557481 tx_win_center[1][0][13] = 987
4270 11:35:14.557579 tx_first_pass[1][0][13] = 975
4271 11:35:14.560695 tx_last_pass[1][0][13] = 999
4272 11:35:14.564060 tx_win_center[1][0][14] = 986
4273 11:35:14.567307 tx_first_pass[1][0][14] = 974
4274 11:35:14.570341 tx_last_pass[1][0][14] = 999
4275 11:35:14.570474 tx_win_center[1][0][15] = 980
4276 11:35:14.573920 tx_first_pass[1][0][15] = 968
4277 11:35:14.576927 tx_last_pass[1][0][15] = 992
4278 11:35:14.580176 tx_win_center[1][1][0] = 994
4279 11:35:14.583594 tx_first_pass[1][1][0] = 981
4280 11:35:14.586620 tx_last_pass[1][1][0] = 1007
4281 11:35:14.586730 tx_win_center[1][1][1] = 993
4282 11:35:14.590297 tx_first_pass[1][1][1] = 980
4283 11:35:14.593474 tx_last_pass[1][1][1] = 1006
4284 11:35:14.596588 tx_win_center[1][1][2] = 991
4285 11:35:14.600123 tx_first_pass[1][1][2] = 978
4286 11:35:14.600207 tx_last_pass[1][1][2] = 1004
4287 11:35:14.603285 tx_win_center[1][1][3] = 988
4288 11:35:14.606277 tx_first_pass[1][1][3] = 976
4289 11:35:14.609639 tx_last_pass[1][1][3] = 1001
4290 11:35:14.609724 tx_win_center[1][1][4] = 993
4291 11:35:14.613015 tx_first_pass[1][1][4] = 980
4292 11:35:14.616093 tx_last_pass[1][1][4] = 1006
4293 11:35:14.619584 tx_win_center[1][1][5] = 993
4294 11:35:14.622652 tx_first_pass[1][1][5] = 981
4295 11:35:14.622735 tx_last_pass[1][1][5] = 1006
4296 11:35:14.626018 tx_win_center[1][1][6] = 992
4297 11:35:14.629328 tx_first_pass[1][1][6] = 979
4298 11:35:14.632567 tx_last_pass[1][1][6] = 1006
4299 11:35:14.636020 tx_win_center[1][1][7] = 992
4300 11:35:14.636104 tx_first_pass[1][1][7] = 979
4301 11:35:14.639320 tx_last_pass[1][1][7] = 1005
4302 11:35:14.642357 tx_win_center[1][1][8] = 983
4303 11:35:14.645698 tx_first_pass[1][1][8] = 971
4304 11:35:14.649089 tx_last_pass[1][1][8] = 996
4305 11:35:14.649174 tx_win_center[1][1][9] = 982
4306 11:35:14.652197 tx_first_pass[1][1][9] = 970
4307 11:35:14.655524 tx_last_pass[1][1][9] = 995
4308 11:35:14.658730 tx_win_center[1][1][10] = 987
4309 11:35:14.662037 tx_first_pass[1][1][10] = 975
4310 11:35:14.662121 tx_last_pass[1][1][10] = 999
4311 11:35:14.665225 tx_win_center[1][1][11] = 987
4312 11:35:14.669041 tx_first_pass[1][1][11] = 975
4313 11:35:14.672040 tx_last_pass[1][1][11] = 999
4314 11:35:14.675300 tx_win_center[1][1][12] = 987
4315 11:35:14.678624 tx_first_pass[1][1][12] = 975
4316 11:35:14.678712 tx_last_pass[1][1][12] = 999
4317 11:35:14.681667 tx_win_center[1][1][13] = 987
4318 11:35:14.685036 tx_first_pass[1][1][13] = 975
4319 11:35:14.688377 tx_last_pass[1][1][13] = 999
4320 11:35:14.691618 tx_win_center[1][1][14] = 986
4321 11:35:14.691703 tx_first_pass[1][1][14] = 975
4322 11:35:14.694727 tx_last_pass[1][1][14] = 998
4323 11:35:14.698267 tx_win_center[1][1][15] = 980
4324 11:35:14.701648 tx_first_pass[1][1][15] = 969
4325 11:35:14.704849 tx_last_pass[1][1][15] = 992
4326 11:35:14.704933 dump params rx window
4327 11:35:14.708082 rx_firspass[0][0][0] = 7
4328 11:35:14.711194 rx_lastpass[0][0][0] = 36
4329 11:35:14.711278 rx_firspass[0][0][1] = 8
4330 11:35:14.714726 rx_lastpass[0][0][1] = 36
4331 11:35:14.717857 rx_firspass[0][0][2] = 5
4332 11:35:14.721270 rx_lastpass[0][0][2] = 38
4333 11:35:14.721354 rx_firspass[0][0][3] = -3
4334 11:35:14.724313 rx_lastpass[0][0][3] = 30
4335 11:35:14.727642 rx_firspass[0][0][4] = 6
4336 11:35:14.727726 rx_lastpass[0][0][4] = 36
4337 11:35:14.730692 rx_firspass[0][0][5] = 3
4338 11:35:14.734309 rx_lastpass[0][0][5] = 33
4339 11:35:14.737541 rx_firspass[0][0][6] = 3
4340 11:35:14.737625 rx_lastpass[0][0][6] = 33
4341 11:35:14.740835 rx_firspass[0][0][7] = 5
4342 11:35:14.743852 rx_lastpass[0][0][7] = 36
4343 11:35:14.743937 rx_firspass[0][0][8] = -2
4344 11:35:14.747313 rx_lastpass[0][0][8] = 30
4345 11:35:14.750603 rx_firspass[0][0][9] = 2
4346 11:35:14.753745 rx_lastpass[0][0][9] = 32
4347 11:35:14.753828 rx_firspass[0][0][10] = 8
4348 11:35:14.757279 rx_lastpass[0][0][10] = 37
4349 11:35:14.760313 rx_firspass[0][0][11] = 0
4350 11:35:14.763431 rx_lastpass[0][0][11] = 30
4351 11:35:14.763534 rx_firspass[0][0][12] = 3
4352 11:35:14.766830 rx_lastpass[0][0][12] = 31
4353 11:35:14.770133 rx_firspass[0][0][13] = 1
4354 11:35:14.770216 rx_lastpass[0][0][13] = 31
4355 11:35:14.773344 rx_firspass[0][0][14] = 1
4356 11:35:14.776603 rx_lastpass[0][0][14] = 35
4357 11:35:14.780086 rx_firspass[0][0][15] = 3
4358 11:35:14.780169 rx_lastpass[0][0][15] = 36
4359 11:35:14.783179 rx_firspass[0][1][0] = 4
4360 11:35:14.786676 rx_lastpass[0][1][0] = 39
4361 11:35:14.789685 rx_firspass[0][1][1] = 5
4362 11:35:14.789768 rx_lastpass[0][1][1] = 38
4363 11:35:14.792994 rx_firspass[0][1][2] = 6
4364 11:35:14.796437 rx_lastpass[0][1][2] = 40
4365 11:35:14.796521 rx_firspass[0][1][3] = -2
4366 11:35:14.799729 rx_lastpass[0][1][3] = 31
4367 11:35:14.802740 rx_firspass[0][1][4] = 4
4368 11:35:14.806361 rx_lastpass[0][1][4] = 38
4369 11:35:14.806444 rx_firspass[0][1][5] = -1
4370 11:35:14.809567 rx_lastpass[0][1][5] = 34
4371 11:35:14.812871 rx_firspass[0][1][6] = 1
4372 11:35:14.812954 rx_lastpass[0][1][6] = 35
4373 11:35:14.816158 rx_firspass[0][1][7] = 3
4374 11:35:14.819232 rx_lastpass[0][1][7] = 37
4375 11:35:14.822522 rx_firspass[0][1][8] = -4
4376 11:35:14.822605 rx_lastpass[0][1][8] = 32
4377 11:35:14.826008 rx_firspass[0][1][9] = -2
4378 11:35:14.829168 rx_lastpass[0][1][9] = 34
4379 11:35:14.829252 rx_firspass[0][1][10] = 5
4380 11:35:14.832411 rx_lastpass[0][1][10] = 40
4381 11:35:14.835822 rx_firspass[0][1][11] = -2
4382 11:35:14.838908 rx_lastpass[0][1][11] = 32
4383 11:35:14.838992 rx_firspass[0][1][12] = 0
4384 11:35:14.842120 rx_lastpass[0][1][12] = 34
4385 11:35:14.845479 rx_firspass[0][1][13] = -2
4386 11:35:14.848652 rx_lastpass[0][1][13] = 34
4387 11:35:14.848736 rx_firspass[0][1][14] = 1
4388 11:35:14.852250 rx_lastpass[0][1][14] = 36
4389 11:35:14.855238 rx_firspass[0][1][15] = 4
4390 11:35:14.858659 rx_lastpass[0][1][15] = 37
4391 11:35:14.858743 rx_firspass[1][0][0] = 5
4392 11:35:14.861787 rx_lastpass[1][0][0] = 36
4393 11:35:14.864999 rx_firspass[1][0][1] = 3
4394 11:35:14.865083 rx_lastpass[1][0][1] = 36
4395 11:35:14.868255 rx_firspass[1][0][2] = 1
4396 11:35:14.871693 rx_lastpass[1][0][2] = 34
4397 11:35:14.874841 rx_firspass[1][0][3] = 0
4398 11:35:14.874925 rx_lastpass[1][0][3] = 30
4399 11:35:14.878159 rx_firspass[1][0][4] = 5
4400 11:35:14.881777 rx_lastpass[1][0][4] = 35
4401 11:35:14.881870 rx_firspass[1][0][5] = 9
4402 11:35:14.884493 rx_lastpass[1][0][5] = 38
4403 11:35:14.888063 rx_firspass[1][0][6] = 5
4404 11:35:14.891484 rx_lastpass[1][0][6] = 38
4405 11:35:14.891563 rx_firspass[1][0][7] = 5
4406 11:35:14.894428 rx_lastpass[1][0][7] = 34
4407 11:35:14.897752 rx_firspass[1][0][8] = 1
4408 11:35:14.897853 rx_lastpass[1][0][8] = 33
4409 11:35:14.901331 rx_firspass[1][0][9] = 0
4410 11:35:14.904281 rx_lastpass[1][0][9] = 31
4411 11:35:14.907586 rx_firspass[1][0][10] = 3
4412 11:35:14.907662 rx_lastpass[1][0][10] = 35
4413 11:35:14.911071 rx_firspass[1][0][11] = 4
4414 11:35:14.914247 rx_lastpass[1][0][11] = 36
4415 11:35:14.914326 rx_firspass[1][0][12] = 6
4416 11:35:14.917294 rx_lastpass[1][0][12] = 35
4417 11:35:14.920778 rx_firspass[1][0][13] = 6
4418 11:35:14.924135 rx_lastpass[1][0][13] = 35
4419 11:35:14.924235 rx_firspass[1][0][14] = 5
4420 11:35:14.927194 rx_lastpass[1][0][14] = 36
4421 11:35:14.930750 rx_firspass[1][0][15] = -4
4422 11:35:14.933673 rx_lastpass[1][0][15] = 29
4423 11:35:14.933772 rx_firspass[1][1][0] = 4
4424 11:35:14.937125 rx_lastpass[1][1][0] = 40
4425 11:35:14.940492 rx_firspass[1][1][1] = 4
4426 11:35:14.943538 rx_lastpass[1][1][1] = 39
4427 11:35:14.943619 rx_firspass[1][1][2] = 3
4428 11:35:14.947136 rx_lastpass[1][1][2] = 34
4429 11:35:14.950225 rx_firspass[1][1][3] = -1
4430 11:35:14.950328 rx_lastpass[1][1][3] = 33
4431 11:35:14.953256 rx_firspass[1][1][4] = 5
4432 11:35:14.956916 rx_lastpass[1][1][4] = 39
4433 11:35:14.959966 rx_firspass[1][1][5] = 6
4434 11:35:14.960048 rx_lastpass[1][1][5] = 40
4435 11:35:14.963381 rx_firspass[1][1][6] = 6
4436 11:35:14.966465 rx_lastpass[1][1][6] = 40
4437 11:35:14.966566 rx_firspass[1][1][7] = 3
4438 11:35:14.969895 rx_lastpass[1][1][7] = 38
4439 11:35:14.972989 rx_firspass[1][1][8] = -1
4440 11:35:14.976519 rx_lastpass[1][1][8] = 35
4441 11:35:14.976622 rx_firspass[1][1][9] = -2
4442 11:35:14.979462 rx_lastpass[1][1][9] = 33
4443 11:35:14.982780 rx_firspass[1][1][10] = 3
4444 11:35:14.982877 rx_lastpass[1][1][10] = 38
4445 11:35:14.986332 rx_firspass[1][1][11] = 3
4446 11:35:14.989337 rx_lastpass[1][1][11] = 38
4447 11:35:14.992935 rx_firspass[1][1][12] = 3
4448 11:35:14.993043 rx_lastpass[1][1][12] = 37
4449 11:35:14.996114 rx_firspass[1][1][13] = 4
4450 11:35:14.999376 rx_lastpass[1][1][13] = 39
4451 11:35:15.002801 rx_firspass[1][1][14] = 4
4452 11:35:15.002906 rx_lastpass[1][1][14] = 40
4453 11:35:15.005961 rx_firspass[1][1][15] = -4
4454 11:35:15.009021 rx_lastpass[1][1][15] = 31
4455 11:35:15.009123 dump params clk_delay
4456 11:35:15.012181 clk_delay[0] = -1
4457 11:35:15.012281 clk_delay[1] = 0
4458 11:35:15.015372 dump params dqs_delay
4459 11:35:15.018689 dqs_delay[0][0] = -1
4460 11:35:15.018789 dqs_delay[0][1] = 0
4461 11:35:15.022547 dqs_delay[1][0] = 0
4462 11:35:15.022627 dqs_delay[1][1] = -1
4463 11:35:15.025941 dump params delay_cell_unit = 735
4464 11:35:15.029005 dump source = 0x0
4465 11:35:15.029105 dump params frequency:1200
4466 11:35:15.032105 dump params rank number:2
4467 11:35:15.032208
4468 11:35:15.034971 dump params write leveling
4469 11:35:15.038473 write leveling[0][0][0] = 0x0
4470 11:35:15.041605 write leveling[0][0][1] = 0x0
4471 11:35:15.041707 write leveling[0][1][0] = 0x0
4472 11:35:15.044958 write leveling[0][1][1] = 0x0
4473 11:35:15.047972 write leveling[1][0][0] = 0x0
4474 11:35:15.051357 write leveling[1][0][1] = 0x0
4475 11:35:15.054646 write leveling[1][1][0] = 0x0
4476 11:35:15.058110 write leveling[1][1][1] = 0x0
4477 11:35:15.058189 dump params cbt_cs
4478 11:35:15.061238 cbt_cs[0][0] = 0x0
4479 11:35:15.061343 cbt_cs[0][1] = 0x0
4480 11:35:15.064533 cbt_cs[1][0] = 0x0
4481 11:35:15.064613 cbt_cs[1][1] = 0x0
4482 11:35:15.067822 dump params cbt_mr12
4483 11:35:15.067891 cbt_mr12[0][0] = 0x0
4484 11:35:15.071120 cbt_mr12[0][1] = 0x0
4485 11:35:15.074557 cbt_mr12[1][0] = 0x0
4486 11:35:15.074640 cbt_mr12[1][1] = 0x0
4487 11:35:15.077857 dump params tx window
4488 11:35:15.077961 tx_center_min[0][0][0] = 0
4489 11:35:15.081204 tx_center_max[0][0][0] = 0
4490 11:35:15.084299 tx_center_min[0][0][1] = 0
4491 11:35:15.087755 tx_center_max[0][0][1] = 0
4492 11:35:15.087826 tx_center_min[0][1][0] = 0
4493 11:35:15.090784 tx_center_max[0][1][0] = 0
4494 11:35:15.094171 tx_center_min[0][1][1] = 0
4495 11:35:15.097278 tx_center_max[0][1][1] = 0
4496 11:35:15.097379 tx_center_min[1][0][0] = 0
4497 11:35:15.100657 tx_center_max[1][0][0] = 0
4498 11:35:15.103784 tx_center_min[1][0][1] = 0
4499 11:35:15.107244 tx_center_max[1][0][1] = 0
4500 11:35:15.107350 tx_center_min[1][1][0] = 0
4501 11:35:15.110480 tx_center_max[1][1][0] = 0
4502 11:35:15.113584 tx_center_min[1][1][1] = 0
4503 11:35:15.117140 tx_center_max[1][1][1] = 0
4504 11:35:15.117229 dump params tx window
4505 11:35:15.120520 tx_win_center[0][0][0] = 0
4506 11:35:15.123618 tx_first_pass[0][0][0] = 0
4507 11:35:15.126687 tx_last_pass[0][0][0] = 0
4508 11:35:15.126771 tx_win_center[0][0][1] = 0
4509 11:35:15.130182 tx_first_pass[0][0][1] = 0
4510 11:35:15.133541 tx_last_pass[0][0][1] = 0
4511 11:35:15.133626 tx_win_center[0][0][2] = 0
4512 11:35:15.136608 tx_first_pass[0][0][2] = 0
4513 11:35:15.139823 tx_last_pass[0][0][2] = 0
4514 11:35:15.143210 tx_win_center[0][0][3] = 0
4515 11:35:15.143294 tx_first_pass[0][0][3] = 0
4516 11:35:15.146599 tx_last_pass[0][0][3] = 0
4517 11:35:15.149972 tx_win_center[0][0][4] = 0
4518 11:35:15.152855 tx_first_pass[0][0][4] = 0
4519 11:35:15.152938 tx_last_pass[0][0][4] = 0
4520 11:35:15.156289 tx_win_center[0][0][5] = 0
4521 11:35:15.159412 tx_first_pass[0][0][5] = 0
4522 11:35:15.163020 tx_last_pass[0][0][5] = 0
4523 11:35:15.163104 tx_win_center[0][0][6] = 0
4524 11:35:15.166067 tx_first_pass[0][0][6] = 0
4525 11:35:15.169494 tx_last_pass[0][0][6] = 0
4526 11:35:15.169578 tx_win_center[0][0][7] = 0
4527 11:35:15.172662 tx_first_pass[0][0][7] = 0
4528 11:35:15.176006 tx_last_pass[0][0][7] = 0
4529 11:35:15.179288 tx_win_center[0][0][8] = 0
4530 11:35:15.179371 tx_first_pass[0][0][8] = 0
4531 11:35:15.182543 tx_last_pass[0][0][8] = 0
4532 11:35:15.185733 tx_win_center[0][0][9] = 0
4533 11:35:15.189048 tx_first_pass[0][0][9] = 0
4534 11:35:15.189131 tx_last_pass[0][0][9] = 0
4535 11:35:15.192398 tx_win_center[0][0][10] = 0
4536 11:35:15.195644 tx_first_pass[0][0][10] = 0
4537 11:35:15.199120 tx_last_pass[0][0][10] = 0
4538 11:35:15.199205 tx_win_center[0][0][11] = 0
4539 11:35:15.202367 tx_first_pass[0][0][11] = 0
4540 11:35:15.205410 tx_last_pass[0][0][11] = 0
4541 11:35:15.208644 tx_win_center[0][0][12] = 0
4542 11:35:15.212062 tx_first_pass[0][0][12] = 0
4543 11:35:15.212146 tx_last_pass[0][0][12] = 0
4544 11:35:15.215306 tx_win_center[0][0][13] = 0
4545 11:35:15.218440 tx_first_pass[0][0][13] = 0
4546 11:35:15.221770 tx_last_pass[0][0][13] = 0
4547 11:35:15.221853 tx_win_center[0][0][14] = 0
4548 11:35:15.225155 tx_first_pass[0][0][14] = 0
4549 11:35:15.228558 tx_last_pass[0][0][14] = 0
4550 11:35:15.231525 tx_win_center[0][0][15] = 0
4551 11:35:15.231610 tx_first_pass[0][0][15] = 0
4552 11:35:15.234920 tx_last_pass[0][0][15] = 0
4553 11:35:15.238236 tx_win_center[0][1][0] = 0
4554 11:35:15.241586 tx_first_pass[0][1][0] = 0
4555 11:35:15.241671 tx_last_pass[0][1][0] = 0
4556 11:35:15.244715 tx_win_center[0][1][1] = 0
4557 11:35:15.248058 tx_first_pass[0][1][1] = 0
4558 11:35:15.251212 tx_last_pass[0][1][1] = 0
4559 11:35:15.251316 tx_win_center[0][1][2] = 0
4560 11:35:15.254557 tx_first_pass[0][1][2] = 0
4561 11:35:15.258042 tx_last_pass[0][1][2] = 0
4562 11:35:15.258145 tx_win_center[0][1][3] = 0
4563 11:35:15.261009 tx_first_pass[0][1][3] = 0
4564 11:35:15.264363 tx_last_pass[0][1][3] = 0
4565 11:35:15.267699 tx_win_center[0][1][4] = 0
4566 11:35:15.267794 tx_first_pass[0][1][4] = 0
4567 11:35:15.271117 tx_last_pass[0][1][4] = 0
4568 11:35:15.274133 tx_win_center[0][1][5] = 0
4569 11:35:15.277454 tx_first_pass[0][1][5] = 0
4570 11:35:15.277554 tx_last_pass[0][1][5] = 0
4571 11:35:15.280770 tx_win_center[0][1][6] = 0
4572 11:35:15.283943 tx_first_pass[0][1][6] = 0
4573 11:35:15.287189 tx_last_pass[0][1][6] = 0
4574 11:35:15.287294 tx_win_center[0][1][7] = 0
4575 11:35:15.290783 tx_first_pass[0][1][7] = 0
4576 11:35:15.293773 tx_last_pass[0][1][7] = 0
4577 11:35:15.297342 tx_win_center[0][1][8] = 0
4578 11:35:15.297446 tx_first_pass[0][1][8] = 0
4579 11:35:15.300584 tx_last_pass[0][1][8] = 0
4580 11:35:15.303950 tx_win_center[0][1][9] = 0
4581 11:35:15.307192 tx_first_pass[0][1][9] = 0
4582 11:35:15.307306 tx_last_pass[0][1][9] = 0
4583 11:35:15.310292 tx_win_center[0][1][10] = 0
4584 11:35:15.313444 tx_first_pass[0][1][10] = 0
4585 11:35:15.316564 tx_last_pass[0][1][10] = 0
4586 11:35:15.316665 tx_win_center[0][1][11] = 0
4587 11:35:15.320006 tx_first_pass[0][1][11] = 0
4588 11:35:15.323324 tx_last_pass[0][1][11] = 0
4589 11:35:15.326463 tx_win_center[0][1][12] = 0
4590 11:35:15.326573 tx_first_pass[0][1][12] = 0
4591 11:35:15.329745 tx_last_pass[0][1][12] = 0
4592 11:35:15.333108 tx_win_center[0][1][13] = 0
4593 11:35:15.336161 tx_first_pass[0][1][13] = 0
4594 11:35:15.336272 tx_last_pass[0][1][13] = 0
4595 11:35:15.339646 tx_win_center[0][1][14] = 0
4596 11:35:15.342986 tx_first_pass[0][1][14] = 0
4597 11:35:15.346392 tx_last_pass[0][1][14] = 0
4598 11:35:15.346476 tx_win_center[0][1][15] = 0
4599 11:35:15.349450 tx_first_pass[0][1][15] = 0
4600 11:35:15.352617 tx_last_pass[0][1][15] = 0
4601 11:35:15.356190 tx_win_center[1][0][0] = 0
4602 11:35:15.356274 tx_first_pass[1][0][0] = 0
4603 11:35:15.359321 tx_last_pass[1][0][0] = 0
4604 11:35:15.362448 tx_win_center[1][0][1] = 0
4605 11:35:15.365751 tx_first_pass[1][0][1] = 0
4606 11:35:15.365835 tx_last_pass[1][0][1] = 0
4607 11:35:15.368884 tx_win_center[1][0][2] = 0
4608 11:35:15.372284 tx_first_pass[1][0][2] = 0
4609 11:35:15.375677 tx_last_pass[1][0][2] = 0
4610 11:35:15.375761 tx_win_center[1][0][3] = 0
4611 11:35:15.378764 tx_first_pass[1][0][3] = 0
4612 11:35:15.382079 tx_last_pass[1][0][3] = 0
4613 11:35:15.385443 tx_win_center[1][0][4] = 0
4614 11:35:15.385532 tx_first_pass[1][0][4] = 0
4615 11:35:15.388614 tx_last_pass[1][0][4] = 0
4616 11:35:15.391887 tx_win_center[1][0][5] = 0
4617 11:35:15.395065 tx_first_pass[1][0][5] = 0
4618 11:35:15.395170 tx_last_pass[1][0][5] = 0
4619 11:35:15.398387 tx_win_center[1][0][6] = 0
4620 11:35:15.401581 tx_first_pass[1][0][6] = 0
4621 11:35:15.401691 tx_last_pass[1][0][6] = 0
4622 11:35:15.405093 tx_win_center[1][0][7] = 0
4623 11:35:15.408125 tx_first_pass[1][0][7] = 0
4624 11:35:15.411547 tx_last_pass[1][0][7] = 0
4625 11:35:15.411643 tx_win_center[1][0][8] = 0
4626 11:35:15.414766 tx_first_pass[1][0][8] = 0
4627 11:35:15.418217 tx_last_pass[1][0][8] = 0
4628 11:35:15.421390 tx_win_center[1][0][9] = 0
4629 11:35:15.421497 tx_first_pass[1][0][9] = 0
4630 11:35:15.424937 tx_last_pass[1][0][9] = 0
4631 11:35:15.427943 tx_win_center[1][0][10] = 0
4632 11:35:15.431097 tx_first_pass[1][0][10] = 0
4633 11:35:15.431203 tx_last_pass[1][0][10] = 0
4634 11:35:15.434472 tx_win_center[1][0][11] = 0
4635 11:35:15.437754 tx_first_pass[1][0][11] = 0
4636 11:35:15.441070 tx_last_pass[1][0][11] = 0
4637 11:35:15.441147 tx_win_center[1][0][12] = 0
4638 11:35:15.444362 tx_first_pass[1][0][12] = 0
4639 11:35:15.447858 tx_last_pass[1][0][12] = 0
4640 11:35:15.450892 tx_win_center[1][0][13] = 0
4641 11:35:15.454018 tx_first_pass[1][0][13] = 0
4642 11:35:15.454125 tx_last_pass[1][0][13] = 0
4643 11:35:15.457518 tx_win_center[1][0][14] = 0
4644 11:35:15.460555 tx_first_pass[1][0][14] = 0
4645 11:35:15.464143 tx_last_pass[1][0][14] = 0
4646 11:35:15.464219 tx_win_center[1][0][15] = 0
4647 11:35:15.467092 tx_first_pass[1][0][15] = 0
4648 11:35:15.470514 tx_last_pass[1][0][15] = 0
4649 11:35:15.473920 tx_win_center[1][1][0] = 0
4650 11:35:15.474023 tx_first_pass[1][1][0] = 0
4651 11:35:15.477245 tx_last_pass[1][1][0] = 0
4652 11:35:15.480234 tx_win_center[1][1][1] = 0
4653 11:35:15.483656 tx_first_pass[1][1][1] = 0
4654 11:35:15.483760 tx_last_pass[1][1][1] = 0
4655 11:35:15.486943 tx_win_center[1][1][2] = 0
4656 11:35:15.490110 tx_first_pass[1][1][2] = 0
4657 11:35:15.490190 tx_last_pass[1][1][2] = 0
4658 11:35:15.493300 tx_win_center[1][1][3] = 0
4659 11:35:15.496771 tx_first_pass[1][1][3] = 0
4660 11:35:15.499894 tx_last_pass[1][1][3] = 0
4661 11:35:15.499970 tx_win_center[1][1][4] = 0
4662 11:35:15.503489 tx_first_pass[1][1][4] = 0
4663 11:35:15.506622 tx_last_pass[1][1][4] = 0
4664 11:35:15.509721 tx_win_center[1][1][5] = 0
4665 11:35:15.509806 tx_first_pass[1][1][5] = 0
4666 11:35:15.512959 tx_last_pass[1][1][5] = 0
4667 11:35:15.516349 tx_win_center[1][1][6] = 0
4668 11:35:15.519869 tx_first_pass[1][1][6] = 0
4669 11:35:15.519958 tx_last_pass[1][1][6] = 0
4670 11:35:15.522854 tx_win_center[1][1][7] = 0
4671 11:35:15.526241 tx_first_pass[1][1][7] = 0
4672 11:35:15.529601 tx_last_pass[1][1][7] = 0
4673 11:35:15.529685 tx_win_center[1][1][8] = 0
4674 11:35:15.533008 tx_first_pass[1][1][8] = 0
4675 11:35:15.536234 tx_last_pass[1][1][8] = 0
4676 11:35:15.536318 tx_win_center[1][1][9] = 0
4677 11:35:15.539257 tx_first_pass[1][1][9] = 0
4678 11:35:15.542615 tx_last_pass[1][1][9] = 0
4679 11:35:15.545971 tx_win_center[1][1][10] = 0
4680 11:35:15.546055 tx_first_pass[1][1][10] = 0
4681 11:35:15.549192 tx_last_pass[1][1][10] = 0
4682 11:35:15.552476 tx_win_center[1][1][11] = 0
4683 11:35:15.555780 tx_first_pass[1][1][11] = 0
4684 11:35:15.558958 tx_last_pass[1][1][11] = 0
4685 11:35:15.559042 tx_win_center[1][1][12] = 0
4686 11:35:15.562389 tx_first_pass[1][1][12] = 0
4687 11:35:15.565398 tx_last_pass[1][1][12] = 0
4688 11:35:15.568937 tx_win_center[1][1][13] = 0
4689 11:35:15.569021 tx_first_pass[1][1][13] = 0
4690 11:35:15.572196 tx_last_pass[1][1][13] = 0
4691 11:35:15.575264 tx_win_center[1][1][14] = 0
4692 11:35:15.578772 tx_first_pass[1][1][14] = 0
4693 11:35:15.578886 tx_last_pass[1][1][14] = 0
4694 11:35:15.581724 tx_win_center[1][1][15] = 0
4695 11:35:15.585007 tx_first_pass[1][1][15] = 0
4696 11:35:15.588414 tx_last_pass[1][1][15] = 0
4697 11:35:15.588498 dump params rx window
4698 11:35:15.591579 rx_firspass[0][0][0] = 0
4699 11:35:15.595216 rx_lastpass[0][0][0] = 0
4700 11:35:15.595300 rx_firspass[0][0][1] = 0
4701 11:35:15.598140 rx_lastpass[0][0][1] = 0
4702 11:35:15.601496 rx_firspass[0][0][2] = 0
4703 11:35:15.601579 rx_lastpass[0][0][2] = 0
4704 11:35:15.605029 rx_firspass[0][0][3] = 0
4705 11:35:15.608148 rx_lastpass[0][0][3] = 0
4706 11:35:15.611449 rx_firspass[0][0][4] = 0
4707 11:35:15.611540 rx_lastpass[0][0][4] = 0
4708 11:35:15.614804 rx_firspass[0][0][5] = 0
4709 11:35:15.618129 rx_lastpass[0][0][5] = 0
4710 11:35:15.618213 rx_firspass[0][0][6] = 0
4711 11:35:15.621190 rx_lastpass[0][0][6] = 0
4712 11:35:15.624602 rx_firspass[0][0][7] = 0
4713 11:35:15.624686 rx_lastpass[0][0][7] = 0
4714 11:35:15.627718 rx_firspass[0][0][8] = 0
4715 11:35:15.631166 rx_lastpass[0][0][8] = 0
4716 11:35:15.634308 rx_firspass[0][0][9] = 0
4717 11:35:15.634398 rx_lastpass[0][0][9] = 0
4718 11:35:15.637421 rx_firspass[0][0][10] = 0
4719 11:35:15.640660 rx_lastpass[0][0][10] = 0
4720 11:35:15.640737 rx_firspass[0][0][11] = 0
4721 11:35:15.643893 rx_lastpass[0][0][11] = 0
4722 11:35:15.647343 rx_firspass[0][0][12] = 0
4723 11:35:15.650797 rx_lastpass[0][0][12] = 0
4724 11:35:15.650894 rx_firspass[0][0][13] = 0
4725 11:35:15.654103 rx_lastpass[0][0][13] = 0
4726 11:35:15.657208 rx_firspass[0][0][14] = 0
4727 11:35:15.657313 rx_lastpass[0][0][14] = 0
4728 11:35:15.660352 rx_firspass[0][0][15] = 0
4729 11:35:15.663774 rx_lastpass[0][0][15] = 0
4730 11:35:15.666826 rx_firspass[0][1][0] = 0
4731 11:35:15.666903 rx_lastpass[0][1][0] = 0
4732 11:35:15.670198 rx_firspass[0][1][1] = 0
4733 11:35:15.673897 rx_lastpass[0][1][1] = 0
4734 11:35:15.674003 rx_firspass[0][1][2] = 0
4735 11:35:15.676622 rx_lastpass[0][1][2] = 0
4736 11:35:15.680000 rx_firspass[0][1][3] = 0
4737 11:35:15.680080 rx_lastpass[0][1][3] = 0
4738 11:35:15.683404 rx_firspass[0][1][4] = 0
4739 11:35:15.686685 rx_lastpass[0][1][4] = 0
4740 11:35:15.689921 rx_firspass[0][1][5] = 0
4741 11:35:15.690024 rx_lastpass[0][1][5] = 0
4742 11:35:15.693376 rx_firspass[0][1][6] = 0
4743 11:35:15.696379 rx_lastpass[0][1][6] = 0
4744 11:35:15.696457 rx_firspass[0][1][7] = 0
4745 11:35:15.700051 rx_lastpass[0][1][7] = 0
4746 11:35:15.702926 rx_firspass[0][1][8] = 0
4747 11:35:15.703004 rx_lastpass[0][1][8] = 0
4748 11:35:15.706218 rx_firspass[0][1][9] = 0
4749 11:35:15.709461 rx_lastpass[0][1][9] = 0
4750 11:35:15.713007 rx_firspass[0][1][10] = 0
4751 11:35:15.713111 rx_lastpass[0][1][10] = 0
4752 11:35:15.716053 rx_firspass[0][1][11] = 0
4753 11:35:15.719332 rx_lastpass[0][1][11] = 0
4754 11:35:15.719416 rx_firspass[0][1][12] = 0
4755 11:35:15.722905 rx_lastpass[0][1][12] = 0
4756 11:35:15.725766 rx_firspass[0][1][13] = 0
4757 11:35:15.729351 rx_lastpass[0][1][13] = 0
4758 11:35:15.729435 rx_firspass[0][1][14] = 0
4759 11:35:15.732509 rx_lastpass[0][1][14] = 0
4760 11:35:15.735929 rx_firspass[0][1][15] = 0
4761 11:35:15.739183 rx_lastpass[0][1][15] = 0
4762 11:35:15.739268 rx_firspass[1][0][0] = 0
4763 11:35:15.742424 rx_lastpass[1][0][0] = 0
4764 11:35:15.745633 rx_firspass[1][0][1] = 0
4765 11:35:15.745717 rx_lastpass[1][0][1] = 0
4766 11:35:15.748774 rx_firspass[1][0][2] = 0
4767 11:35:15.752134 rx_lastpass[1][0][2] = 0
4768 11:35:15.752217 rx_firspass[1][0][3] = 0
4769 11:35:15.755285 rx_lastpass[1][0][3] = 0
4770 11:35:15.758617 rx_firspass[1][0][4] = 0
4771 11:35:15.762050 rx_lastpass[1][0][4] = 0
4772 11:35:15.762133 rx_firspass[1][0][5] = 0
4773 11:35:15.765124 rx_lastpass[1][0][5] = 0
4774 11:35:15.768527 rx_firspass[1][0][6] = 0
4775 11:35:15.768616 rx_lastpass[1][0][6] = 0
4776 11:35:15.771646 rx_firspass[1][0][7] = 0
4777 11:35:15.775094 rx_lastpass[1][0][7] = 0
4778 11:35:15.775204 rx_firspass[1][0][8] = 0
4779 11:35:15.778209 rx_lastpass[1][0][8] = 0
4780 11:35:15.781762 rx_firspass[1][0][9] = 0
4781 11:35:15.784813 rx_lastpass[1][0][9] = 0
4782 11:35:15.784896 rx_firspass[1][0][10] = 0
4783 11:35:15.788091 rx_lastpass[1][0][10] = 0
4784 11:35:15.791475 rx_firspass[1][0][11] = 0
4785 11:35:15.791559 rx_lastpass[1][0][11] = 0
4786 11:35:15.794462 rx_firspass[1][0][12] = 0
4787 11:35:15.797849 rx_lastpass[1][0][12] = 0
4788 11:35:15.801145 rx_firspass[1][0][13] = 0
4789 11:35:15.801228 rx_lastpass[1][0][13] = 0
4790 11:35:15.804582 rx_firspass[1][0][14] = 0
4791 11:35:15.807670 rx_lastpass[1][0][14] = 0
4792 11:35:15.807754 rx_firspass[1][0][15] = 0
4793 11:35:15.810911 rx_lastpass[1][0][15] = 0
4794 11:35:15.814459 rx_firspass[1][1][0] = 0
4795 11:35:15.817634 rx_lastpass[1][1][0] = 0
4796 11:35:15.817717 rx_firspass[1][1][1] = 0
4797 11:35:15.820854 rx_lastpass[1][1][1] = 0
4798 11:35:15.824172 rx_firspass[1][1][2] = 0
4799 11:35:15.824257 rx_lastpass[1][1][2] = 0
4800 11:35:15.827207 rx_firspass[1][1][3] = 0
4801 11:35:15.830504 rx_lastpass[1][1][3] = 0
4802 11:35:15.830588 rx_firspass[1][1][4] = 0
4803 11:35:15.833742 rx_lastpass[1][1][4] = 0
4804 11:35:15.837325 rx_firspass[1][1][5] = 0
4805 11:35:15.840484 rx_lastpass[1][1][5] = 0
4806 11:35:15.840567 rx_firspass[1][1][6] = 0
4807 11:35:15.843598 rx_lastpass[1][1][6] = 0
4808 11:35:15.846804 rx_firspass[1][1][7] = 0
4809 11:35:15.846887 rx_lastpass[1][1][7] = 0
4810 11:35:15.850183 rx_firspass[1][1][8] = 0
4811 11:35:15.853557 rx_lastpass[1][1][8] = 0
4812 11:35:15.853641 rx_firspass[1][1][9] = 0
4813 11:35:15.856829 rx_lastpass[1][1][9] = 0
4814 11:35:15.860038 rx_firspass[1][1][10] = 0
4815 11:35:15.863428 rx_lastpass[1][1][10] = 0
4816 11:35:15.863522 rx_firspass[1][1][11] = 0
4817 11:35:15.866562 rx_lastpass[1][1][11] = 0
4818 11:35:15.870007 rx_firspass[1][1][12] = 0
4819 11:35:15.870091 rx_lastpass[1][1][12] = 0
4820 11:35:15.873353 rx_firspass[1][1][13] = 0
4821 11:35:15.876588 rx_lastpass[1][1][13] = 0
4822 11:35:15.879894 rx_firspass[1][1][14] = 0
4823 11:35:15.879978 rx_lastpass[1][1][14] = 0
4824 11:35:15.882952 rx_firspass[1][1][15] = 0
4825 11:35:15.886239 rx_lastpass[1][1][15] = 0
4826 11:35:15.886330 dump params clk_delay
4827 11:35:15.889579 clk_delay[0] = 0
4828 11:35:15.889663 clk_delay[1] = 0
4829 11:35:15.892917 dump params dqs_delay
4830 11:35:15.895923 dqs_delay[0][0] = 0
4831 11:35:15.896007 dqs_delay[0][1] = 0
4832 11:35:15.899312 dqs_delay[1][0] = 0
4833 11:35:15.899396 dqs_delay[1][1] = 0
4834 11:35:15.902725 dump params delay_cell_unit = 735
4835 11:35:15.905716 dump source = 0x0
4836 11:35:15.905806 dump params frequency:800
4837 11:35:15.909329 dump params rank number:2
4838 11:35:15.909412
4839 11:35:15.912351 dump params write leveling
4840 11:35:15.915751 write leveling[0][0][0] = 0x0
4841 11:35:15.915836 write leveling[0][0][1] = 0x0
4842 11:35:15.919153 write leveling[0][1][0] = 0x0
4843 11:35:15.922218 write leveling[0][1][1] = 0x0
4844 11:35:15.925511 write leveling[1][0][0] = 0x0
4845 11:35:15.928922 write leveling[1][0][1] = 0x0
4846 11:35:15.931911 write leveling[1][1][0] = 0x0
4847 11:35:15.931996 write leveling[1][1][1] = 0x0
4848 11:35:15.935281 dump params cbt_cs
4849 11:35:15.935364 cbt_cs[0][0] = 0x0
4850 11:35:15.938615 cbt_cs[0][1] = 0x0
4851 11:35:15.938722 cbt_cs[1][0] = 0x0
4852 11:35:15.941810 cbt_cs[1][1] = 0x0
4853 11:35:15.945257 dump params cbt_mr12
4854 11:35:15.945340 cbt_mr12[0][0] = 0x0
4855 11:35:15.948722 cbt_mr12[0][1] = 0x0
4856 11:35:15.948806 cbt_mr12[1][0] = 0x0
4857 11:35:15.951751 cbt_mr12[1][1] = 0x0
4858 11:35:15.955127 dump params tx window
4859 11:35:15.955211 tx_center_min[0][0][0] = 0
4860 11:35:15.958097 tx_center_max[0][0][0] = 0
4861 11:35:15.961680 tx_center_min[0][0][1] = 0
4862 11:35:15.964659 tx_center_max[0][0][1] = 0
4863 11:35:15.964743 tx_center_min[0][1][0] = 0
4864 11:35:15.968109 tx_center_max[0][1][0] = 0
4865 11:35:15.971401 tx_center_min[0][1][1] = 0
4866 11:35:15.974740 tx_center_max[0][1][1] = 0
4867 11:35:15.974825 tx_center_min[1][0][0] = 0
4868 11:35:15.977949 tx_center_max[1][0][0] = 0
4869 11:35:15.981077 tx_center_min[1][0][1] = 0
4870 11:35:15.984600 tx_center_max[1][0][1] = 0
4871 11:35:15.984683 tx_center_min[1][1][0] = 0
4872 11:35:15.987609 tx_center_max[1][1][0] = 0
4873 11:35:15.990962 tx_center_min[1][1][1] = 0
4874 11:35:15.994455 tx_center_max[1][1][1] = 0
4875 11:35:15.994539 dump params tx window
4876 11:35:15.997611 tx_win_center[0][0][0] = 0
4877 11:35:16.001023 tx_first_pass[0][0][0] = 0
4878 11:35:16.001107 tx_last_pass[0][0][0] = 0
4879 11:35:16.004224 tx_win_center[0][0][1] = 0
4880 11:35:16.007638 tx_first_pass[0][0][1] = 0
4881 11:35:16.010671 tx_last_pass[0][0][1] = 0
4882 11:35:16.010755 tx_win_center[0][0][2] = 0
4883 11:35:16.013852 tx_first_pass[0][0][2] = 0
4884 11:35:16.017028 tx_last_pass[0][0][2] = 0
4885 11:35:16.017112 tx_win_center[0][0][3] = 0
4886 11:35:16.020514 tx_first_pass[0][0][3] = 0
4887 11:35:16.023677 tx_last_pass[0][0][3] = 0
4888 11:35:16.026987 tx_win_center[0][0][4] = 0
4889 11:35:16.027071 tx_first_pass[0][0][4] = 0
4890 11:35:16.030413 tx_last_pass[0][0][4] = 0
4891 11:35:16.033390 tx_win_center[0][0][5] = 0
4892 11:35:16.036726 tx_first_pass[0][0][5] = 0
4893 11:35:16.036811 tx_last_pass[0][0][5] = 0
4894 11:35:16.040042 tx_win_center[0][0][6] = 0
4895 11:35:16.043448 tx_first_pass[0][0][6] = 0
4896 11:35:16.046654 tx_last_pass[0][0][6] = 0
4897 11:35:16.046738 tx_win_center[0][0][7] = 0
4898 11:35:16.050143 tx_first_pass[0][0][7] = 0
4899 11:35:16.053148 tx_last_pass[0][0][7] = 0
4900 11:35:16.056453 tx_win_center[0][0][8] = 0
4901 11:35:16.056538 tx_first_pass[0][0][8] = 0
4902 11:35:16.059706 tx_last_pass[0][0][8] = 0
4903 11:35:16.063132 tx_win_center[0][0][9] = 0
4904 11:35:16.066472 tx_first_pass[0][0][9] = 0
4905 11:35:16.066557 tx_last_pass[0][0][9] = 0
4906 11:35:16.069937 tx_win_center[0][0][10] = 0
4907 11:35:16.072853 tx_first_pass[0][0][10] = 0
4908 11:35:16.076242 tx_last_pass[0][0][10] = 0
4909 11:35:16.076326 tx_win_center[0][0][11] = 0
4910 11:35:16.079387 tx_first_pass[0][0][11] = 0
4911 11:35:16.082831 tx_last_pass[0][0][11] = 0
4912 11:35:16.086139 tx_win_center[0][0][12] = 0
4913 11:35:16.086230 tx_first_pass[0][0][12] = 0
4914 11:35:16.089394 tx_last_pass[0][0][12] = 0
4915 11:35:16.092610 tx_win_center[0][0][13] = 0
4916 11:35:16.095995 tx_first_pass[0][0][13] = 0
4917 11:35:16.096104 tx_last_pass[0][0][13] = 0
4918 11:35:16.099272 tx_win_center[0][0][14] = 0
4919 11:35:16.102858 tx_first_pass[0][0][14] = 0
4920 11:35:16.105922 tx_last_pass[0][0][14] = 0
4921 11:35:16.106007 tx_win_center[0][0][15] = 0
4922 11:35:16.108745 tx_first_pass[0][0][15] = 0
4923 11:35:16.112113 tx_last_pass[0][0][15] = 0
4924 11:35:16.115638 tx_win_center[0][1][0] = 0
4925 11:35:16.115722 tx_first_pass[0][1][0] = 0
4926 11:35:16.118707 tx_last_pass[0][1][0] = 0
4927 11:35:16.122199 tx_win_center[0][1][1] = 0
4928 11:35:16.125254 tx_first_pass[0][1][1] = 0
4929 11:35:16.125338 tx_last_pass[0][1][1] = 0
4930 11:35:16.128547 tx_win_center[0][1][2] = 0
4931 11:35:16.131967 tx_first_pass[0][1][2] = 0
4932 11:35:16.135067 tx_last_pass[0][1][2] = 0
4933 11:35:16.135171 tx_win_center[0][1][3] = 0
4934 11:35:16.138277 tx_first_pass[0][1][3] = 0
4935 11:35:16.141622 tx_last_pass[0][1][3] = 0
4936 11:35:16.144977 tx_win_center[0][1][4] = 0
4937 11:35:16.145085 tx_first_pass[0][1][4] = 0
4938 11:35:16.148129 tx_last_pass[0][1][4] = 0
4939 11:35:16.151357 tx_win_center[0][1][5] = 0
4940 11:35:16.151467 tx_first_pass[0][1][5] = 0
4941 11:35:16.154646 tx_last_pass[0][1][5] = 0
4942 11:35:16.158240 tx_win_center[0][1][6] = 0
4943 11:35:16.161509 tx_first_pass[0][1][6] = 0
4944 11:35:16.161615 tx_last_pass[0][1][6] = 0
4945 11:35:16.164519 tx_win_center[0][1][7] = 0
4946 11:35:16.167732 tx_first_pass[0][1][7] = 0
4947 11:35:16.170976 tx_last_pass[0][1][7] = 0
4948 11:35:16.171075 tx_win_center[0][1][8] = 0
4949 11:35:16.174557 tx_first_pass[0][1][8] = 0
4950 11:35:16.177966 tx_last_pass[0][1][8] = 0
4951 11:35:16.180869 tx_win_center[0][1][9] = 0
4952 11:35:16.180947 tx_first_pass[0][1][9] = 0
4953 11:35:16.184351 tx_last_pass[0][1][9] = 0
4954 11:35:16.187512 tx_win_center[0][1][10] = 0
4955 11:35:16.190794 tx_first_pass[0][1][10] = 0
4956 11:35:16.190908 tx_last_pass[0][1][10] = 0
4957 11:35:16.194239 tx_win_center[0][1][11] = 0
4958 11:35:16.197363 tx_first_pass[0][1][11] = 0
4959 11:35:16.200520 tx_last_pass[0][1][11] = 0
4960 11:35:16.200646 tx_win_center[0][1][12] = 0
4961 11:35:16.203845 tx_first_pass[0][1][12] = 0
4962 11:35:16.207328 tx_last_pass[0][1][12] = 0
4963 11:35:16.210510 tx_win_center[0][1][13] = 0
4964 11:35:16.210660 tx_first_pass[0][1][13] = 0
4965 11:35:16.213766 tx_last_pass[0][1][13] = 0
4966 11:35:16.216966 tx_win_center[0][1][14] = 0
4967 11:35:16.220422 tx_first_pass[0][1][14] = 0
4968 11:35:16.220561 tx_last_pass[0][1][14] = 0
4969 11:35:16.223446 tx_win_center[0][1][15] = 0
4970 11:35:16.226770 tx_first_pass[0][1][15] = 0
4971 11:35:16.230222 tx_last_pass[0][1][15] = 0
4972 11:35:16.233531 tx_win_center[1][0][0] = 0
4973 11:35:16.233639 tx_first_pass[1][0][0] = 0
4974 11:35:16.236565 tx_last_pass[1][0][0] = 0
4975 11:35:16.239948 tx_win_center[1][0][1] = 0
4976 11:35:16.240027 tx_first_pass[1][0][1] = 0
4977 11:35:16.243353 tx_last_pass[1][0][1] = 0
4978 11:35:16.246803 tx_win_center[1][0][2] = 0
4979 11:35:16.249921 tx_first_pass[1][0][2] = 0
4980 11:35:16.250026 tx_last_pass[1][0][2] = 0
4981 11:35:16.252949 tx_win_center[1][0][3] = 0
4982 11:35:16.256396 tx_first_pass[1][0][3] = 0
4983 11:35:16.259777 tx_last_pass[1][0][3] = 0
4984 11:35:16.259865 tx_win_center[1][0][4] = 0
4985 11:35:16.262812 tx_first_pass[1][0][4] = 0
4986 11:35:16.266125 tx_last_pass[1][0][4] = 0
4987 11:35:16.269307 tx_win_center[1][0][5] = 0
4988 11:35:16.269413 tx_first_pass[1][0][5] = 0
4989 11:35:16.272643 tx_last_pass[1][0][5] = 0
4990 11:35:16.275871 tx_win_center[1][0][6] = 0
4991 11:35:16.279367 tx_first_pass[1][0][6] = 0
4992 11:35:16.279480 tx_last_pass[1][0][6] = 0
4993 11:35:16.282622 tx_win_center[1][0][7] = 0
4994 11:35:16.285672 tx_first_pass[1][0][7] = 0
4995 11:35:16.285779 tx_last_pass[1][0][7] = 0
4996 11:35:16.289122 tx_win_center[1][0][8] = 0
4997 11:35:16.292475 tx_first_pass[1][0][8] = 0
4998 11:35:16.295750 tx_last_pass[1][0][8] = 0
4999 11:35:16.295828 tx_win_center[1][0][9] = 0
5000 11:35:16.298829 tx_first_pass[1][0][9] = 0
5001 11:35:16.302173 tx_last_pass[1][0][9] = 0
5002 11:35:16.305511 tx_win_center[1][0][10] = 0
5003 11:35:16.305617 tx_first_pass[1][0][10] = 0
5004 11:35:16.308548 tx_last_pass[1][0][10] = 0
5005 11:35:16.312018 tx_win_center[1][0][11] = 0
5006 11:35:16.315379 tx_first_pass[1][0][11] = 0
5007 11:35:16.315499 tx_last_pass[1][0][11] = 0
5008 11:35:16.318407 tx_win_center[1][0][12] = 0
5009 11:35:16.321764 tx_first_pass[1][0][12] = 0
5010 11:35:16.325249 tx_last_pass[1][0][12] = 0
5011 11:35:16.325342 tx_win_center[1][0][13] = 0
5012 11:35:16.328445 tx_first_pass[1][0][13] = 0
5013 11:35:16.331679 tx_last_pass[1][0][13] = 0
5014 11:35:16.334929 tx_win_center[1][0][14] = 0
5015 11:35:16.338303 tx_first_pass[1][0][14] = 0
5016 11:35:16.338413 tx_last_pass[1][0][14] = 0
5017 11:35:16.341674 tx_win_center[1][0][15] = 0
5018 11:35:16.344671 tx_first_pass[1][0][15] = 0
5019 11:35:16.348031 tx_last_pass[1][0][15] = 0
5020 11:35:16.348111 tx_win_center[1][1][0] = 0
5021 11:35:16.351445 tx_first_pass[1][1][0] = 0
5022 11:35:16.354539 tx_last_pass[1][1][0] = 0
5023 11:35:16.357755 tx_win_center[1][1][1] = 0
5024 11:35:16.357862 tx_first_pass[1][1][1] = 0
5025 11:35:16.361350 tx_last_pass[1][1][1] = 0
5026 11:35:16.364423 tx_win_center[1][1][2] = 0
5027 11:35:16.367683 tx_first_pass[1][1][2] = 0
5028 11:35:16.367766 tx_last_pass[1][1][2] = 0
5029 11:35:16.370911 tx_win_center[1][1][3] = 0
5030 11:35:16.374197 tx_first_pass[1][1][3] = 0
5031 11:35:16.374304 tx_last_pass[1][1][3] = 0
5032 11:35:16.377595 tx_win_center[1][1][4] = 0
5033 11:35:16.380859 tx_first_pass[1][1][4] = 0
5034 11:35:16.384181 tx_last_pass[1][1][4] = 0
5035 11:35:16.384287 tx_win_center[1][1][5] = 0
5036 11:35:16.387153 tx_first_pass[1][1][5] = 0
5037 11:35:16.390586 tx_last_pass[1][1][5] = 0
5038 11:35:16.393898 tx_win_center[1][1][6] = 0
5039 11:35:16.394003 tx_first_pass[1][1][6] = 0
5040 11:35:16.396993 tx_last_pass[1][1][6] = 0
5041 11:35:16.400464 tx_win_center[1][1][7] = 0
5042 11:35:16.403805 tx_first_pass[1][1][7] = 0
5043 11:35:16.403880 tx_last_pass[1][1][7] = 0
5044 11:35:16.407125 tx_win_center[1][1][8] = 0
5045 11:35:16.410371 tx_first_pass[1][1][8] = 0
5046 11:35:16.410475 tx_last_pass[1][1][8] = 0
5047 11:35:16.413519 tx_win_center[1][1][9] = 0
5048 11:35:16.416966 tx_first_pass[1][1][9] = 0
5049 11:35:16.420195 tx_last_pass[1][1][9] = 0
5050 11:35:16.420280 tx_win_center[1][1][10] = 0
5051 11:35:16.423384 tx_first_pass[1][1][10] = 0
5052 11:35:16.426534 tx_last_pass[1][1][10] = 0
5053 11:35:16.429821 tx_win_center[1][1][11] = 0
5054 11:35:16.432961 tx_first_pass[1][1][11] = 0
5055 11:35:16.433072 tx_last_pass[1][1][11] = 0
5056 11:35:16.436404 tx_win_center[1][1][12] = 0
5057 11:35:16.439714 tx_first_pass[1][1][12] = 0
5058 11:35:16.443102 tx_last_pass[1][1][12] = 0
5059 11:35:16.443187 tx_win_center[1][1][13] = 0
5060 11:35:16.446222 tx_first_pass[1][1][13] = 0
5061 11:35:16.449627 tx_last_pass[1][1][13] = 0
5062 11:35:16.453038 tx_win_center[1][1][14] = 0
5063 11:35:16.453123 tx_first_pass[1][1][14] = 0
5064 11:35:16.456115 tx_last_pass[1][1][14] = 0
5065 11:35:16.459147 tx_win_center[1][1][15] = 0
5066 11:35:16.462586 tx_first_pass[1][1][15] = 0
5067 11:35:16.462671 tx_last_pass[1][1][15] = 0
5068 11:35:16.465796 dump params rx window
5069 11:35:16.469097 rx_firspass[0][0][0] = 0
5070 11:35:16.469182 rx_lastpass[0][0][0] = 0
5071 11:35:16.472394 rx_firspass[0][0][1] = 0
5072 11:35:16.475754 rx_lastpass[0][0][1] = 0
5073 11:35:16.479068 rx_firspass[0][0][2] = 0
5074 11:35:16.479152 rx_lastpass[0][0][2] = 0
5075 11:35:16.482272 rx_firspass[0][0][3] = 0
5076 11:35:16.485395 rx_lastpass[0][0][3] = 0
5077 11:35:16.485479 rx_firspass[0][0][4] = 0
5078 11:35:16.488691 rx_lastpass[0][0][4] = 0
5079 11:35:16.492127 rx_firspass[0][0][5] = 0
5080 11:35:16.492212 rx_lastpass[0][0][5] = 0
5081 11:35:16.495334 rx_firspass[0][0][6] = 0
5082 11:35:16.498456 rx_lastpass[0][0][6] = 0
5083 11:35:16.498531 rx_firspass[0][0][7] = 0
5084 11:35:16.501850 rx_lastpass[0][0][7] = 0
5085 11:35:16.505083 rx_firspass[0][0][8] = 0
5086 11:35:16.508347 rx_lastpass[0][0][8] = 0
5087 11:35:16.508430 rx_firspass[0][0][9] = 0
5088 11:35:16.511825 rx_lastpass[0][0][9] = 0
5089 11:35:16.514969 rx_firspass[0][0][10] = 0
5090 11:35:16.515058 rx_lastpass[0][0][10] = 0
5091 11:35:16.518120 rx_firspass[0][0][11] = 0
5092 11:35:16.521504 rx_lastpass[0][0][11] = 0
5093 11:35:16.524840 rx_firspass[0][0][12] = 0
5094 11:35:16.524961 rx_lastpass[0][0][12] = 0
5095 11:35:16.528105 rx_firspass[0][0][13] = 0
5096 11:35:16.531194 rx_lastpass[0][0][13] = 0
5097 11:35:16.534607 rx_firspass[0][0][14] = 0
5098 11:35:16.534690 rx_lastpass[0][0][14] = 0
5099 11:35:16.538130 rx_firspass[0][0][15] = 0
5100 11:35:16.541302 rx_lastpass[0][0][15] = 0
5101 11:35:16.541422 rx_firspass[0][1][0] = 0
5102 11:35:16.544481 rx_lastpass[0][1][0] = 0
5103 11:35:16.547611 rx_firspass[0][1][1] = 0
5104 11:35:16.547694 rx_lastpass[0][1][1] = 0
5105 11:35:16.550851 rx_firspass[0][1][2] = 0
5106 11:35:16.554137 rx_lastpass[0][1][2] = 0
5107 11:35:16.557752 rx_firspass[0][1][3] = 0
5108 11:35:16.557835 rx_lastpass[0][1][3] = 0
5109 11:35:16.560896 rx_firspass[0][1][4] = 0
5110 11:35:16.563895 rx_lastpass[0][1][4] = 0
5111 11:35:16.563979 rx_firspass[0][1][5] = 0
5112 11:35:16.567266 rx_lastpass[0][1][5] = 0
5113 11:35:16.570596 rx_firspass[0][1][6] = 0
5114 11:35:16.570679 rx_lastpass[0][1][6] = 0
5115 11:35:16.573937 rx_firspass[0][1][7] = 0
5116 11:35:16.577141 rx_lastpass[0][1][7] = 0
5117 11:35:16.580384 rx_firspass[0][1][8] = 0
5118 11:35:16.580467 rx_lastpass[0][1][8] = 0
5119 11:35:16.583584 rx_firspass[0][1][9] = 0
5120 11:35:16.586952 rx_lastpass[0][1][9] = 0
5121 11:35:16.587036 rx_firspass[0][1][10] = 0
5122 11:35:16.590101 rx_lastpass[0][1][10] = 0
5123 11:35:16.593459 rx_firspass[0][1][11] = 0
5124 11:35:16.596865 rx_lastpass[0][1][11] = 0
5125 11:35:16.596948 rx_firspass[0][1][12] = 0
5126 11:35:16.600156 rx_lastpass[0][1][12] = 0
5127 11:35:16.603399 rx_firspass[0][1][13] = 0
5128 11:35:16.603492 rx_lastpass[0][1][13] = 0
5129 11:35:16.606680 rx_firspass[0][1][14] = 0
5130 11:35:16.609980 rx_lastpass[0][1][14] = 0
5131 11:35:16.613272 rx_firspass[0][1][15] = 0
5132 11:35:16.613355 rx_lastpass[0][1][15] = 0
5133 11:35:16.616279 rx_firspass[1][0][0] = 0
5134 11:35:16.619672 rx_lastpass[1][0][0] = 0
5135 11:35:16.619755 rx_firspass[1][0][1] = 0
5136 11:35:16.622984 rx_lastpass[1][0][1] = 0
5137 11:35:16.626292 rx_firspass[1][0][2] = 0
5138 11:35:16.629506 rx_lastpass[1][0][2] = 0
5139 11:35:16.629590 rx_firspass[1][0][3] = 0
5140 11:35:16.632668 rx_lastpass[1][0][3] = 0
5141 11:35:16.635950 rx_firspass[1][0][4] = 0
5142 11:35:16.636033 rx_lastpass[1][0][4] = 0
5143 11:35:16.639361 rx_firspass[1][0][5] = 0
5144 11:35:16.642495 rx_lastpass[1][0][5] = 0
5145 11:35:16.642578 rx_firspass[1][0][6] = 0
5146 11:35:16.645723 rx_lastpass[1][0][6] = 0
5147 11:35:16.649153 rx_firspass[1][0][7] = 0
5148 11:35:16.649236 rx_lastpass[1][0][7] = 0
5149 11:35:16.652205 rx_firspass[1][0][8] = 0
5150 11:35:16.655804 rx_lastpass[1][0][8] = 0
5151 11:35:16.658957 rx_firspass[1][0][9] = 0
5152 11:35:16.659040 rx_lastpass[1][0][9] = 0
5153 11:35:16.662328 rx_firspass[1][0][10] = 0
5154 11:35:16.665421 rx_lastpass[1][0][10] = 0
5155 11:35:16.665505 rx_firspass[1][0][11] = 0
5156 11:35:16.668835 rx_lastpass[1][0][11] = 0
5157 11:35:16.672096 rx_firspass[1][0][12] = 0
5158 11:35:16.675404 rx_lastpass[1][0][12] = 0
5159 11:35:16.675502 rx_firspass[1][0][13] = 0
5160 11:35:16.678457 rx_lastpass[1][0][13] = 0
5161 11:35:16.682125 rx_firspass[1][0][14] = 0
5162 11:35:16.685291 rx_lastpass[1][0][14] = 0
5163 11:35:16.685374 rx_firspass[1][0][15] = 0
5164 11:35:16.688282 rx_lastpass[1][0][15] = 0
5165 11:35:16.691787 rx_firspass[1][1][0] = 0
5166 11:35:16.691870 rx_lastpass[1][1][0] = 0
5167 11:35:16.695058 rx_firspass[1][1][1] = 0
5168 11:35:16.698371 rx_lastpass[1][1][1] = 0
5169 11:35:16.698454 rx_firspass[1][1][2] = 0
5170 11:35:16.701446 rx_lastpass[1][1][2] = 0
5171 11:35:16.704655 rx_firspass[1][1][3] = 0
5172 11:35:16.707992 rx_lastpass[1][1][3] = 0
5173 11:35:16.708075 rx_firspass[1][1][4] = 0
5174 11:35:16.711331 rx_lastpass[1][1][4] = 0
5175 11:35:16.714414 rx_firspass[1][1][5] = 0
5176 11:35:16.714496 rx_lastpass[1][1][5] = 0
5177 11:35:16.717834 rx_firspass[1][1][6] = 0
5178 11:35:16.721179 rx_lastpass[1][1][6] = 0
5179 11:35:16.721262 rx_firspass[1][1][7] = 0
5180 11:35:16.724277 rx_lastpass[1][1][7] = 0
5181 11:35:16.727583 rx_firspass[1][1][8] = 0
5182 11:35:16.731158 rx_lastpass[1][1][8] = 0
5183 11:35:16.731241 rx_firspass[1][1][9] = 0
5184 11:35:16.734132 rx_lastpass[1][1][9] = 0
5185 11:35:16.737578 rx_firspass[1][1][10] = 0
5186 11:35:16.737661 rx_lastpass[1][1][10] = 0
5187 11:35:16.740935 rx_firspass[1][1][11] = 0
5188 11:35:16.744432 rx_lastpass[1][1][11] = 0
5189 11:35:16.747263 rx_firspass[1][1][12] = 0
5190 11:35:16.747347 rx_lastpass[1][1][12] = 0
5191 11:35:16.750863 rx_firspass[1][1][13] = 0
5192 11:35:16.753879 rx_lastpass[1][1][13] = 0
5193 11:35:16.753963 rx_firspass[1][1][14] = 0
5194 11:35:16.757118 rx_lastpass[1][1][14] = 0
5195 11:35:16.760653 rx_firspass[1][1][15] = 0
5196 11:35:16.763749 rx_lastpass[1][1][15] = 0
5197 11:35:16.763833 dump params clk_delay
5198 11:35:16.767245 clk_delay[0] = 0
5199 11:35:16.767329 clk_delay[1] = 0
5200 11:35:16.770099 dump params dqs_delay
5201 11:35:16.770183 dqs_delay[0][0] = 0
5202 11:35:16.773747 dqs_delay[0][1] = 0
5203 11:35:16.773831 dqs_delay[1][0] = 0
5204 11:35:16.776708 dqs_delay[1][1] = 0
5205 11:35:16.780270 dump params delay_cell_unit = 735
5206 11:35:16.783235 mt_set_emi_preloader end
5207 11:35:16.786526 [mt_mem_init] dram size: 0x100000000, rank number: 2
5208 11:35:16.789953 [complex_mem_test] start addr:0x40000000, len:20480
5209 11:35:16.827929 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5210 11:35:16.834320 [complex_mem_test] start addr:0x80000000, len:20480
5211 11:35:16.870021 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5212 11:35:16.876866 [complex_mem_test] start addr:0xc0000000, len:20480
5213 11:35:16.912468 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5214 11:35:16.918984 [complex_mem_test] start addr:0x56000000, len:8192
5215 11:35:16.935741 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5216 11:35:16.939099 ddr_geometry:1
5217 11:35:16.942146 [complex_mem_test] start addr:0x80000000, len:8192
5218 11:35:16.959282 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5219 11:35:16.962756 dram_init: dram init end (result: 0)
5220 11:35:16.969238 Successfully loaded DRAM blobs and ran DRAM calibration
5221 11:35:16.979029 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5222 11:35:16.979116 CBMEM:
5223 11:35:16.982317 IMD: root @ 00000000fffff000 254 entries.
5224 11:35:16.985667 IMD: root @ 00000000ffffec00 62 entries.
5225 11:35:16.992480 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5226 11:35:16.998809 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5227 11:35:17.002023 in-header: 03 a1 00 00 08 00 00 00
5228 11:35:17.005369 in-data: 84 60 60 10 00 00 00 00
5229 11:35:17.008680 Chrome EC: clear events_b mask to 0x0000000020004000
5230 11:35:17.015102 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5231 11:35:17.019291 in-header: 03 fd 00 00 00 00 00 00
5232 11:35:17.022231 in-data:
5233 11:35:17.025732 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5234 11:35:17.028935 CBFS @ 21000 size 3d4000
5235 11:35:17.031981 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5236 11:35:17.035373 CBFS: Locating 'fallback/ramstage'
5237 11:35:17.038647 CBFS: Found @ offset 10d40 size d563
5238 11:35:17.061367 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5239 11:35:17.073349 Accumulated console time in romstage 13597 ms
5240 11:35:17.073433
5241 11:35:17.073499
5242 11:35:17.083391 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5243 11:35:17.086626 ARM64: Exception handlers installed.
5244 11:35:17.086710 ARM64: Testing exception
5245 11:35:17.089868 ARM64: Done test exception
5246 11:35:17.093125 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5247 11:35:17.096611 Manufacturer: ef
5248 11:35:17.102899 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5249 11:35:17.106155 WARNING: RO_VPD is uninitialized or empty.
5250 11:35:17.109397 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5251 11:35:17.112685 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5252 11:35:17.122936 read SPI 0x550600 0x3a00: 4533 us, 3275 KB/s, 26.200 Mbps
5253 11:35:17.126364 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5254 11:35:17.132937 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5255 11:35:17.133022 Enumerating buses...
5256 11:35:17.139279 Show all devs... Before device enumeration.
5257 11:35:17.139363 Root Device: enabled 1
5258 11:35:17.142647 CPU_CLUSTER: 0: enabled 1
5259 11:35:17.146037 CPU: 00: enabled 1
5260 11:35:17.146120 Compare with tree...
5261 11:35:17.149043 Root Device: enabled 1
5262 11:35:17.149126 CPU_CLUSTER: 0: enabled 1
5263 11:35:17.152525 CPU: 00: enabled 1
5264 11:35:17.155942 Root Device scanning...
5265 11:35:17.159338 root_dev_scan_bus for Root Device
5266 11:35:17.159422 CPU_CLUSTER: 0 enabled
5267 11:35:17.162343 root_dev_scan_bus for Root Device done
5268 11:35:17.168899 scan_bus: scanning of bus Root Device took 10689 usecs
5269 11:35:17.168983 done
5270 11:35:17.172288 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5271 11:35:17.175243 Allocating resources...
5272 11:35:17.178730 Reading resources...
5273 11:35:17.181867 Root Device read_resources bus 0 link: 0
5274 11:35:17.185320 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5275 11:35:17.188410 CPU: 00 missing read_resources
5276 11:35:17.191820 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5277 11:35:17.195189 Root Device read_resources bus 0 link: 0 done
5278 11:35:17.198293 Done reading resources.
5279 11:35:17.204968 Show resources in subtree (Root Device)...After reading.
5280 11:35:17.208276 Root Device child on link 0 CPU_CLUSTER: 0
5281 11:35:17.211469 CPU_CLUSTER: 0 child on link 0 CPU: 00
5282 11:35:17.221251 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5283 11:35:17.221337 CPU: 00
5284 11:35:17.221403 Setting resources...
5285 11:35:17.227751 Root Device assign_resources, bus 0 link: 0
5286 11:35:17.231156 CPU_CLUSTER: 0 missing set_resources
5287 11:35:17.234206 Root Device assign_resources, bus 0 link: 0
5288 11:35:17.234290 Done setting resources.
5289 11:35:17.240738 Show resources in subtree (Root Device)...After assigning values.
5290 11:35:17.244159 Root Device child on link 0 CPU_CLUSTER: 0
5291 11:35:17.250691 CPU_CLUSTER: 0 child on link 0 CPU: 00
5292 11:35:17.257151 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5293 11:35:17.260497 CPU: 00
5294 11:35:17.260582 Done allocating resources.
5295 11:35:17.267170 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5296 11:35:17.267253 Enabling resources...
5297 11:35:17.267318 done.
5298 11:35:17.273771 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5299 11:35:17.276913 Initializing devices...
5300 11:35:17.276998 Root Device init ...
5301 11:35:17.280299 mainboard_init: Starting display init.
5302 11:35:17.283431 ADC[4]: Raw value=76192 ID=0
5303 11:35:17.305990 anx7625_power_on_init: Init interface.
5304 11:35:17.309284 anx7625_disable_pd_protocol: Disabled PD feature.
5305 11:35:17.315950 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5306 11:35:17.373285 anx7625_start_dp_work: Secure OCM version=00
5307 11:35:17.376427 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5308 11:35:17.393438 sp_tx_get_edid_block: EDID Block = 1
5309 11:35:17.510773 Extracted contents:
5310 11:35:17.514023 header: 00 ff ff ff ff ff ff 00
5311 11:35:17.517201 serial number: 06 af 5c 14 00 00 00 00 00 1a
5312 11:35:17.520728 version: 01 04
5313 11:35:17.524121 basic params: 95 1a 0e 78 02
5314 11:35:17.527169 chroma info: 99 85 95 55 56 92 28 22 50 54
5315 11:35:17.530573 established: 00 00 00
5316 11:35:17.537036 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5317 11:35:17.543762 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5318 11:35:17.547103 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5319 11:35:17.553693 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5320 11:35:17.560200 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5321 11:35:17.563542 extensions: 00
5322 11:35:17.563931 checksum: ae
5323 11:35:17.564235
5324 11:35:17.569778 Manufacturer: AUO Model 145c Serial Number 0
5325 11:35:17.570564 Made week 0 of 2016
5326 11:35:17.573200 EDID version: 1.4
5327 11:35:17.573608 Digital display
5328 11:35:17.576460 6 bits per primary color channel
5329 11:35:17.579450 DisplayPort interface
5330 11:35:17.582940 Maximum image size: 26 cm x 14 cm
5331 11:35:17.583379 Gamma: 220%
5332 11:35:17.583756 Check DPMS levels
5333 11:35:17.586245 Supported color formats: RGB 4:4:4
5334 11:35:17.589509 First detailed timing is preferred timing
5335 11:35:17.592871 Established timings supported:
5336 11:35:17.596119 Standard timings supported:
5337 11:35:17.599429 Detailed timings
5338 11:35:17.602773 Hex of detail: ce1d56ea50001a3030204600009010000018
5339 11:35:17.606009 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5340 11:35:17.612534 0556 0586 05a6 0640 hborder 0
5341 11:35:17.615868 0300 0304 030a 031a vborder 0
5342 11:35:17.618871 -hsync -vsync
5343 11:35:17.619257 Did detailed timing
5344 11:35:17.625625 Hex of detail: 0000000f0000000000000000000000000020
5345 11:35:17.628694 Manufacturer-specified data, tag 15
5346 11:35:17.632053 Hex of detail: 000000fe0041554f0a202020202020202020
5347 11:35:17.635514 ASCII string: AUO
5348 11:35:17.638493 Hex of detail: 000000fe004231313658414230312e34200a
5349 11:35:17.641784 ASCII string: B116XAB01.4
5350 11:35:17.642167 Checksum
5351 11:35:17.645135 Checksum: 0xae (valid)
5352 11:35:17.648519 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5353 11:35:17.651570 DSI data_rate: 457800000 bps
5354 11:35:17.658239 anx7625_parse_edid: set default k value to 0x3d for panel
5355 11:35:17.661360 anx7625_parse_edid: pixelclock(76300).
5356 11:35:17.664538 hactive(1366), hsync(32), hfp(48), hbp(154)
5357 11:35:17.668121 vactive(768), vsync(6), vfp(4), vbp(16)
5358 11:35:17.671301 anx7625_dsi_config: config dsi.
5359 11:35:17.678985 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5360 11:35:17.700173 anx7625_dsi_config: success to config DSI
5361 11:35:17.703133 anx7625_dp_start: MIPI phy setup OK.
5362 11:35:17.706201 [SSUSB] Setting up USB HOST controller...
5363 11:35:17.709643 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5364 11:35:17.712695 [SSUSB] phy power-on done.
5365 11:35:17.716400 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5366 11:35:17.719737 in-header: 03 fc 01 00 00 00 00 00
5367 11:35:17.719821 in-data:
5368 11:35:17.726120 handle_proto3_response: EC response with error code: 1
5369 11:35:17.726205 SPM: pcm index = 1
5370 11:35:17.732742 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5371 11:35:17.732827 CBFS @ 21000 size 3d4000
5372 11:35:17.739243 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5373 11:35:17.742765 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5374 11:35:17.745921 CBFS: Found @ offset 1e7c0 size 1026
5375 11:35:17.752388 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5376 11:35:17.755826 SPM: binary array size = 2988
5377 11:35:17.759115 SPM: version = pcm_allinone_v1.17.2_20180829
5378 11:35:17.762426 SPM binary loaded in 32 msecs
5379 11:35:17.770745 spm_kick_im_to_fetch: ptr = 000000004021eec2
5380 11:35:17.774153 spm_kick_im_to_fetch: len = 2988
5381 11:35:17.774238 SPM: spm_kick_pcm_to_run
5382 11:35:17.777466 SPM: spm_kick_pcm_to_run done
5383 11:35:17.780325 SPM: spm_init done in 52 msecs
5384 11:35:17.784126 Root Device init finished in 505263 usecs
5385 11:35:17.787036 CPU_CLUSTER: 0 init ...
5386 11:35:17.797168 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5387 11:35:17.800300 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5388 11:35:17.803420 CBFS @ 21000 size 3d4000
5389 11:35:17.806763 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5390 11:35:17.809857 CBFS: Locating 'sspm.bin'
5391 11:35:17.813208 CBFS: Found @ offset 208c0 size 41cb
5392 11:35:17.824011 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5393 11:35:17.832036 CPU_CLUSTER: 0 init finished in 42805 usecs
5394 11:35:17.832122 Devices initialized
5395 11:35:17.835239 Show all devs... After init.
5396 11:35:17.838661 Root Device: enabled 1
5397 11:35:17.838745 CPU_CLUSTER: 0: enabled 1
5398 11:35:17.842010 CPU: 00: enabled 1
5399 11:35:17.845145 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5400 11:35:17.851829 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5401 11:35:17.855077 ELOG: NV offset 0x558000 size 0x1000
5402 11:35:17.858075 read SPI 0x558000 0x1000: 1262 us, 3245 KB/s, 25.960 Mbps
5403 11:35:17.864615 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5404 11:35:17.871189 ELOG: Event(17) added with size 13 at 2024-07-17 11:35:17 UTC
5405 11:35:17.874689 out: cmd=0x121: 03 db 21 01 00 00 00 00
5406 11:35:17.877730 in-header: 03 5e 00 00 2c 00 00 00
5407 11:35:17.891161 in-data: 45 4b 00 00 00 00 00 00 02 10 00 00 06 80 00 00 0e d3 07 00 06 80 00 00 c8 a2 2f 00 06 80 00 00 40 04 01 00 06 80 00 00 b9 38 02 00
5408 11:35:17.894305 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5409 11:35:17.897375 in-header: 03 19 00 00 08 00 00 00
5410 11:35:17.900729 in-data: a2 e0 47 00 13 00 00 00
5411 11:35:17.904186 Chrome EC: UHEPI supported
5412 11:35:17.910600 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5413 11:35:17.914060 in-header: 03 e1 00 00 08 00 00 00
5414 11:35:17.917326 in-data: 84 20 60 10 00 00 00 00
5415 11:35:17.920280 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5416 11:35:17.926887 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5417 11:35:17.930111 in-header: 03 e1 00 00 08 00 00 00
5418 11:35:17.933298 in-data: 84 20 60 10 00 00 00 00
5419 11:35:17.939829 ELOG: Event(A1) added with size 10 at 2024-07-17 11:35:17 UTC
5420 11:35:17.946341 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5421 11:35:17.949714 ELOG: Event(A0) added with size 9 at 2024-07-17 11:35:17 UTC
5422 11:35:17.952855 elog_add_boot_reason: Logged dev mode boot
5423 11:35:17.956279 Finalize devices...
5424 11:35:17.959451 Devices finalized
5425 11:35:17.962880 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5426 11:35:17.966248 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5427 11:35:17.972629 ELOG: Event(91) added with size 10 at 2024-07-17 11:35:17 UTC
5428 11:35:17.976154 Writing coreboot table at 0xffeda000
5429 11:35:17.979293 0. 0000000000114000-000000000011efff: RAMSTAGE
5430 11:35:17.986008 1. 0000000040000000-000000004023cfff: RAMSTAGE
5431 11:35:17.989200 2. 000000004023d000-00000000545fffff: RAM
5432 11:35:17.992706 3. 0000000054600000-000000005465ffff: BL31
5433 11:35:17.995569 4. 0000000054660000-00000000ffed9fff: RAM
5434 11:35:18.002129 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5435 11:35:18.005398 6. 0000000100000000-000000013fffffff: RAM
5436 11:35:18.008753 Passing 5 GPIOs to payload:
5437 11:35:18.012104 NAME | PORT | POLARITY | VALUE
5438 11:35:18.018736 write protect | 0x00000096 | low | high
5439 11:35:18.022109 EC in RW | 0x000000b1 | high | undefined
5440 11:35:18.025067 EC interrupt | 0x00000097 | low | undefined
5441 11:35:18.031857 TPM interrupt | 0x00000099 | high | undefined
5442 11:35:18.035021 speaker enable | 0x000000af | high | undefined
5443 11:35:18.038353 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5444 11:35:18.041475 in-header: 03 f7 00 00 02 00 00 00
5445 11:35:18.044933 in-data: 04 00
5446 11:35:18.045017 Board ID: 4
5447 11:35:18.047922 ADC[3]: Raw value=215404 ID=1
5448 11:35:18.048006 RAM code: 1
5449 11:35:18.051200 SKU ID: 16
5450 11:35:18.054784 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5451 11:35:18.057837 CBFS @ 21000 size 3d4000
5452 11:35:18.061125 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5453 11:35:18.067875 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 42c1
5454 11:35:18.071228 coreboot table: 940 bytes.
5455 11:35:18.074618 IMD ROOT 0. 00000000fffff000 00001000
5456 11:35:18.077615 IMD SMALL 1. 00000000ffffe000 00001000
5457 11:35:18.080945 CONSOLE 2. 00000000fffde000 00020000
5458 11:35:18.084185 FMAP 3. 00000000fffdd000 0000047c
5459 11:35:18.087578 TIME STAMP 4. 00000000fffdc000 00000910
5460 11:35:18.090848 RAMOOPS 5. 00000000ffedc000 00100000
5461 11:35:18.097485 COREBOOT 6. 00000000ffeda000 00002000
5462 11:35:18.097570 IMD small region:
5463 11:35:18.100789 IMD ROOT 0. 00000000ffffec00 00000400
5464 11:35:18.103732 VBOOT WORK 1. 00000000ffffeb00 00000100
5465 11:35:18.110397 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5466 11:35:18.113826 VPD 3. 00000000ffffea60 0000006c
5467 11:35:18.116934 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5468 11:35:18.123378 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5469 11:35:18.126833 in-header: 03 e1 00 00 08 00 00 00
5470 11:35:18.130154 in-data: 84 20 60 10 00 00 00 00
5471 11:35:18.133391 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5472 11:35:18.136474 CBFS @ 21000 size 3d4000
5473 11:35:18.143263 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5474 11:35:18.146434 CBFS: Locating 'fallback/payload'
5475 11:35:18.153889 CBFS: Found @ offset dc040 size 439a0
5476 11:35:18.241667 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5477 11:35:18.244875 Checking segment from ROM address 0x0000000040003a00
5478 11:35:18.251451 Checking segment from ROM address 0x0000000040003a1c
5479 11:35:18.254754 Loading segment from ROM address 0x0000000040003a00
5480 11:35:18.257947 code (compression=0)
5481 11:35:18.267763 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5482 11:35:18.274251 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5483 11:35:18.277416 it's not compressed!
5484 11:35:18.280784 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5485 11:35:18.287386 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5486 11:35:18.295845 Loading segment from ROM address 0x0000000040003a1c
5487 11:35:18.299262 Entry Point 0x0000000080000000
5488 11:35:18.299372 Loaded segments
5489 11:35:18.305610 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5490 11:35:18.309015 Jumping to boot code at 0000000080000000(00000000ffeda000)
5491 11:35:18.318698 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5492 11:35:18.325445 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5493 11:35:18.325530 CBFS @ 21000 size 3d4000
5494 11:35:18.331832 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5495 11:35:18.335161 CBFS: Locating 'fallback/bl31'
5496 11:35:18.338447 CBFS: Found @ offset 36dc0 size 5820
5497 11:35:18.349621 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5498 11:35:18.352978 Checking segment from ROM address 0x0000000040003a00
5499 11:35:18.359567 Checking segment from ROM address 0x0000000040003a1c
5500 11:35:18.363061 Loading segment from ROM address 0x0000000040003a00
5501 11:35:18.366045 code (compression=1)
5502 11:35:18.376150 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5503 11:35:18.382528 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5504 11:35:18.382614 using LZMA
5505 11:35:18.391626 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5506 11:35:18.398209 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5507 11:35:18.401254 Loading segment from ROM address 0x0000000040003a1c
5508 11:35:18.404605 Entry Point 0x0000000054601000
5509 11:35:18.404688 Loaded segments
5510 11:35:18.407979 NOTICE: MT8183 bl31_setup
5511 11:35:18.415153 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5512 11:35:18.418538 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5513 11:35:18.422095 INFO: [DEVAPC] dump DEVAPC registers:
5514 11:35:18.431540 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5515 11:35:18.438222 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5516 11:35:18.448206 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5517 11:35:18.455200 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5518 11:35:18.464431 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5519 11:35:18.471138 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5520 11:35:18.480873 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5521 11:35:18.487266 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5522 11:35:18.497418 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5523 11:35:18.503881 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5524 11:35:18.513810 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5525 11:35:18.520049 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5526 11:35:18.530084 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5527 11:35:18.536611 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5528 11:35:18.543267 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5529 11:35:18.552698 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5530 11:35:18.559245 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5531 11:35:18.566242 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5532 11:35:18.572646 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5533 11:35:18.579345 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5534 11:35:18.589305 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5535 11:35:18.595764 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5536 11:35:18.599326 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5537 11:35:18.602391 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5538 11:35:18.605802 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5539 11:35:18.608960 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5540 11:35:18.612271 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5541 11:35:18.618678 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5542 11:35:18.622213 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5543 11:35:18.625120 WARNING: region 0:
5544 11:35:18.628645 WARNING: apc:0x168, sa:0x0, ea:0xfff
5545 11:35:18.629043 WARNING: region 1:
5546 11:35:18.635130 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5547 11:35:18.635652 WARNING: region 2:
5548 11:35:18.638677 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5549 11:35:18.641912 WARNING: region 3:
5550 11:35:18.645115 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5551 11:35:18.645659 WARNING: region 4:
5552 11:35:18.651642 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5553 11:35:18.652036 WARNING: region 5:
5554 11:35:18.654588 WARNING: apc:0x0, sa:0x0, ea:0x0
5555 11:35:18.658093 WARNING: region 6:
5556 11:35:18.661321 WARNING: apc:0x0, sa:0x0, ea:0x0
5557 11:35:18.661762 WARNING: region 7:
5558 11:35:18.664510 WARNING: apc:0x0, sa:0x0, ea:0x0
5559 11:35:18.671329 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5560 11:35:18.674668 INFO: SPM: enable SPMC mode
5561 11:35:18.677743 NOTICE: spm_boot_init() start
5562 11:35:18.681210 NOTICE: spm_boot_init() end
5563 11:35:18.684654 INFO: BL31: Initializing runtime services
5564 11:35:18.690771 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5565 11:35:18.694084 INFO: BL31: Preparing for EL3 exit to normal world
5566 11:35:18.697457 INFO: Entry point address = 0x80000000
5567 11:35:18.700502 INFO: SPSR = 0x8
5568 11:35:18.722581
5569 11:35:18.722969
5570 11:35:18.723268
5571 11:35:18.725231 end: 2.2.3 depthcharge-start (duration 00:00:25) [common]
5572 11:35:18.725688 start: 2.2.4 bootloader-commands (timeout 00:04:26) [common]
5573 11:35:18.726144 Setting prompt string to ['jacuzzi:']
5574 11:35:18.726474 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:26)
5575 11:35:18.727057 Starting depthcharge on Juniper...
5576 11:35:18.727369
5577 11:35:18.728642 vboot_handoff: creating legacy vboot_handoff structure
5578 11:35:18.729034
5579 11:35:18.731922 ec_init(0): CrosEC protocol v3 supported (544, 544)
5580 11:35:18.735419
5581 11:35:18.735848 Wipe memory regions:
5582 11:35:18.736178
5583 11:35:18.738523 [0x00000040000000, 0x00000054600000)
5584 11:35:18.781735
5585 11:35:18.782160 [0x00000054660000, 0x00000080000000)
5586 11:35:18.873152
5587 11:35:18.873592 [0x000000811994a0, 0x000000ffeda000)
5588 11:35:19.132440
5589 11:35:19.132898 [0x00000100000000, 0x00000140000000)
5590 11:35:19.264965
5591 11:35:19.267617 Initializing XHCI USB controller at 0x11200000.
5592 11:35:19.290623
5593 11:35:19.294034 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5594 11:35:19.294121
5595 11:35:19.294192
5596 11:35:19.294469 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5597 11:35:19.294549 Sending line: 'tftpboot 192.168.201.1 14864599/tftp-deploy-fih12593/kernel/image.itb 14864599/tftp-deploy-fih12593/kernel/cmdline '
5599 11:35:19.395020 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5600 11:35:19.395108 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:25)
5601 11:35:19.399083 jacuzzi: tftpboot 192.168.201.1 14864599/tftp-deploy-fih12593/kernel/image.tp-deploy-fih12593/kernel/cmdline
5602 11:35:19.399207
5603 11:35:19.399292 Waiting for link
5604 11:35:19.804708
5605 11:35:19.804872 R8152: Initializing
5606 11:35:19.804964
5607 11:35:19.808001 Version 9 (ocp_data = 6010)
5608 11:35:19.808138
5609 11:35:19.810969 R8152: Done initializing
5610 11:35:19.811085
5611 11:35:19.811190 Adding net device
5612 11:35:20.196882
5613 11:35:20.197047 done.
5614 11:35:20.197145
5615 11:35:20.197243 MAC: 00:e0:4c:78:85:cb
5616 11:35:20.197338
5617 11:35:20.200157 Sending DHCP discover... done.
5618 11:35:20.200261
5619 11:35:20.203373 Waiting for reply... done.
5620 11:35:20.203495
5621 11:35:20.206613 Sending DHCP request... done.
5622 11:35:20.206702
5623 11:35:20.211644 Waiting for reply... done.
5624 11:35:20.211718
5625 11:35:20.211780 My ip is 192.168.201.22
5626 11:35:20.211847
5627 11:35:20.215054 The DHCP server ip is 192.168.201.1
5628 11:35:20.215127
5629 11:35:20.221591 TFTP server IP predefined by user: 192.168.201.1
5630 11:35:20.221670
5631 11:35:20.228050 Bootfile predefined by user: 14864599/tftp-deploy-fih12593/kernel/image.itb
5632 11:35:20.228166
5633 11:35:20.231384 Sending tftp read request... done.
5634 11:35:20.231496
5635 11:35:20.235190 Waiting for the transfer...
5636 11:35:20.235269
5637 11:35:20.512183 00000000 ################################################################
5638 11:35:20.512321
5639 11:35:20.795808 00080000 ################################################################
5640 11:35:20.795947
5641 11:35:21.071460 00100000 ################################################################
5642 11:35:21.071582
5643 11:35:21.337989 00180000 ################################################################
5644 11:35:21.338138
5645 11:35:21.607064 00200000 ################################################################
5646 11:35:21.607239
5647 11:35:21.877714 00280000 ################################################################
5648 11:35:21.877869
5649 11:35:22.152751 00300000 ################################################################
5650 11:35:22.152887
5651 11:35:22.420818 00380000 ################################################################
5652 11:35:22.420954
5653 11:35:22.690234 00400000 ################################################################
5654 11:35:22.690390
5655 11:35:22.956139 00480000 ################################################################
5656 11:35:22.956275
5657 11:35:23.218858 00500000 ################################################################
5658 11:35:23.219000
5659 11:35:23.484131 00580000 ################################################################
5660 11:35:23.484292
5661 11:35:23.750138 00600000 ################################################################
5662 11:35:23.750304
5663 11:35:24.008646 00680000 ################################################################
5664 11:35:24.008831
5665 11:35:24.278766 00700000 ################################################################
5666 11:35:24.278927
5667 11:35:24.540565 00780000 ################################################################
5668 11:35:24.540727
5669 11:35:24.817539 00800000 ################################################################
5670 11:35:24.817700
5671 11:35:25.088735 00880000 ################################################################
5672 11:35:25.088871
5673 11:35:25.363388 00900000 ################################################################
5674 11:35:25.363538
5675 11:35:25.642955 00980000 ################################################################
5676 11:35:25.643122
5677 11:35:25.905537 00a00000 ################################################################
5678 11:35:25.905673
5679 11:35:26.178146 00a80000 ################################################################
5680 11:35:26.178285
5681 11:35:26.455670 00b00000 ################################################################
5682 11:35:26.455803
5683 11:35:26.727852 00b80000 ################################################################
5684 11:35:26.727983
5685 11:35:26.999881 00c00000 ################################################################
5686 11:35:27.000016
5687 11:35:27.272966 00c80000 ################################################################
5688 11:35:27.273096
5689 11:35:27.562865 00d00000 ################################################################
5690 11:35:27.563002
5691 11:35:27.849710 00d80000 ################################################################
5692 11:35:27.849831
5693 11:35:28.128855 00e00000 ################################################################
5694 11:35:28.128986
5695 11:35:28.405088 00e80000 ################################################################
5696 11:35:28.405256
5697 11:35:28.687434 00f00000 ################################################################
5698 11:35:28.687577
5699 11:35:28.957991 00f80000 ################################################################
5700 11:35:28.958126
5701 11:35:29.228268 01000000 ################################################################
5702 11:35:29.228414
5703 11:35:29.492233 01080000 ################################################################
5704 11:35:29.492396
5705 11:35:29.739167 01100000 ################################################################
5706 11:35:29.739300
5707 11:35:30.005146 01180000 ################################################################
5708 11:35:30.005306
5709 11:35:30.272519 01200000 ################################################################
5710 11:35:30.272652
5711 11:35:30.550602 01280000 ################################################################
5712 11:35:30.550761
5713 11:35:30.821709 01300000 ################################################################
5714 11:35:30.821870
5715 11:35:31.080148 01380000 ################################################################
5716 11:35:31.080318
5717 11:35:31.346529 01400000 ################################################################
5718 11:35:31.346693
5719 11:35:31.612664 01480000 ################################################################
5720 11:35:31.612826
5721 11:35:31.877681 01500000 ################################################################
5722 11:35:31.877852
5723 11:35:32.137225 01580000 ################################################################
5724 11:35:32.137361
5725 11:35:32.391744 01600000 ################################################################
5726 11:35:32.391905
5727 11:35:32.655178 01680000 ################################################################
5728 11:35:32.655351
5729 11:35:32.921243 01700000 ################################################################
5730 11:35:32.921391
5731 11:35:33.187570 01780000 ################################################################
5732 11:35:33.187743
5733 11:35:33.448735 01800000 ################################################################
5734 11:35:33.448873
5735 11:35:33.711988 01880000 ################################################################
5736 11:35:33.712127
5737 11:35:33.976456 01900000 ################################################################
5738 11:35:33.976594
5739 11:35:34.238429 01980000 ################################################################
5740 11:35:34.238580
5741 11:35:34.513300 01a00000 ################################################################
5742 11:35:34.513451
5743 11:35:34.780315 01a80000 ################################################################
5744 11:35:34.780473
5745 11:35:35.044230 01b00000 ################################################################
5746 11:35:35.044379
5747 11:35:35.312105 01b80000 ################################################################
5748 11:35:35.312254
5749 11:35:35.591126 01c00000 ################################################################
5750 11:35:35.591262
5751 11:35:35.883379 01c80000 ################################################################
5752 11:35:35.883535
5753 11:35:36.160995 01d00000 ################################################################
5754 11:35:36.161128
5755 11:35:36.454223 01d80000 ################################################################
5756 11:35:36.454418
5757 11:35:36.697186 01e00000 ####################################################### done.
5758 11:35:36.697318
5759 11:35:36.700447 The bootfile was 31900746 bytes long.
5760 11:35:36.700529
5761 11:35:36.703859 Sending tftp read request... done.
5762 11:35:36.703940
5763 11:35:36.707137 Waiting for the transfer...
5764 11:35:36.707240
5765 11:35:36.707331 00000000 # done.
5766 11:35:36.707423
5767 11:35:36.716797 Command line loaded dynamically from TFTP file: 14864599/tftp-deploy-fih12593/kernel/cmdline
5768 11:35:36.716884
5769 11:35:36.740019 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14864599/extract-nfsrootfs-r2yycohl,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5770 11:35:36.740126
5771 11:35:36.742916 Loading FIT.
5772 11:35:36.743026
5773 11:35:36.746388 Image ramdisk-1 has 18722716 bytes.
5774 11:35:36.746465
5775 11:35:36.749805 Image fdt-1 has 57695 bytes.
5776 11:35:36.749887
5777 11:35:36.749951 Image kernel-1 has 13118294 bytes.
5778 11:35:36.752757
5779 11:35:36.759336 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5780 11:35:36.759413
5781 11:35:36.772336 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5782 11:35:36.772425
5783 11:35:36.775609 Choosing best match conf-1 for compat google,juniper-sku16.
5784 11:35:36.781278
5785 11:35:36.785347 Connected to device vid:did:rid of 1ae0:0028:00
5786 11:35:36.792739
5787 11:35:36.795926 tpm_get_response: command 0x17b, return code 0x0
5788 11:35:36.796007
5789 11:35:36.799124 tpm_cleanup: add release locality here.
5790 11:35:36.799202
5791 11:35:36.802419 Shutting down all USB controllers.
5792 11:35:36.802498
5793 11:35:36.805844 Removing current net device
5794 11:35:36.805938
5795 11:35:36.809060 Exiting depthcharge with code 4 at timestamp: 35317115
5796 11:35:36.809141
5797 11:35:36.815579 LZMA decompressing kernel-1 to 0x80193568
5798 11:35:36.815661
5799 11:35:36.818874 LZMA decompressing kernel-1 to 0x40000000
5800 11:35:38.681474
5801 11:35:38.681603 jumping to kernel
5802 11:35:38.682107 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
5803 11:35:38.682213 start: 2.2.5 auto-login-action (timeout 00:04:06) [common]
5804 11:35:38.682299 Setting prompt string to ['Linux version [0-9]']
5805 11:35:38.682370 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5806 11:35:38.682441 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5807 11:35:38.756666
5808 11:35:38.760001 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5809 11:35:38.763411 start: 2.2.5.1 login-action (timeout 00:04:06) [common]
5810 11:35:38.763534 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5811 11:35:38.763622 Setting prompt string to []
5812 11:35:38.763704 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5813 11:35:38.763781 Using line separator: #'\n'#
5814 11:35:38.763853 No login prompt set.
5815 11:35:38.763917 Parsing kernel messages
5816 11:35:38.763973 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5817 11:35:38.764097 [login-action] Waiting for messages, (timeout 00:04:06)
5818 11:35:38.764167 Waiting using forced prompt support (timeout 00:02:03)
5819 11:35:38.782996 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j270465-arm64-gcc-12-defconfig-arm64-chromebook-hjsv4) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Wed Jul 17 11:18:13 UTC 2024
5820 11:35:38.786115 [ 0.000000] random: crng init done
5821 11:35:38.789450 [ 0.000000] Machine model: Google juniper sku16 board
5822 11:35:38.792431 [ 0.000000] efi: UEFI not found.
5823 11:35:38.802351 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5824 11:35:38.809046 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5825 11:35:38.818789 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5826 11:35:38.822064 [ 0.000000] printk: bootconsole [mtk8250] enabled
5827 11:35:38.830519 [ 0.000000] NUMA: No NUMA configuration found
5828 11:35:38.836989 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5829 11:35:38.843462 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5830 11:35:38.843551 [ 0.000000] Zone ranges:
5831 11:35:38.850052 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5832 11:35:38.853483 [ 0.000000] DMA32 empty
5833 11:35:38.860028 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5834 11:35:38.863101 [ 0.000000] Movable zone start for each node
5835 11:35:38.866558 [ 0.000000] Early memory node ranges
5836 11:35:38.873014 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5837 11:35:38.879834 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5838 11:35:38.886163 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5839 11:35:38.892780 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5840 11:35:38.899307 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5841 11:35:38.905617 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5842 11:35:38.927129 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5843 11:35:38.933890 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5844 11:35:38.940163 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5845 11:35:38.943575 [ 0.000000] psci: probing for conduit method from DT.
5846 11:35:38.949941 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5847 11:35:38.953139 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5848 11:35:38.959954 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5849 11:35:38.962915 [ 0.000000] psci: SMC Calling Convention v1.1
5850 11:35:38.969764 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5851 11:35:38.972875 [ 0.000000] Detected VIPT I-cache on CPU0
5852 11:35:38.979364 [ 0.000000] CPU features: detected: GIC system register CPU interface
5853 11:35:38.986116 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5854 11:35:38.992528 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5855 11:35:38.998960 [ 0.000000] CPU features: detected: ARM erratum 845719
5856 11:35:39.002485 [ 0.000000] alternatives: applying boot alternatives
5857 11:35:39.008836 [ 0.000000] Fallback order for Node 0: 0
5858 11:35:39.015464 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5859 11:35:39.018638 [ 0.000000] Policy zone: Normal
5860 11:35:39.045031 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14864599/extract-nfsrootfs-r2yycohl,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5861 11:35:39.057876 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5862 11:35:39.064701 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5863 11:35:39.074586 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5864 11:35:39.081015 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5865 11:35:39.084466 <6>[ 0.000000] software IO TLB: area num 8.
5866 11:35:39.110753 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5867 11:35:39.168930 <6>[ 0.000000] Memory: 3896788K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 261676K reserved, 32768K cma-reserved)
5868 11:35:39.175318 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5869 11:35:39.181829 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5870 11:35:39.185382 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5871 11:35:39.191856 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5872 11:35:39.198215 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5873 11:35:39.205090 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5874 11:35:39.211432 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5875 11:35:39.217941 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5876 11:35:39.224431 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5877 11:35:39.234386 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5878 11:35:39.241001 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5879 11:35:39.244088 <6>[ 0.000000] GICv3: 640 SPIs implemented
5880 11:35:39.247316 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5881 11:35:39.253756 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5882 11:35:39.256983 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5883 11:35:39.263728 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5884 11:35:39.276588 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5885 11:35:39.286667 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5886 11:35:39.296579 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5887 11:35:39.305874 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5888 11:35:39.319068 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5889 11:35:39.325632 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5890 11:35:39.332539 <6>[ 0.009463] Console: colour dummy device 80x25
5891 11:35:39.335943 <6>[ 0.014499] printk: console [tty1] enabled
5892 11:35:39.349130 <6>[ 0.018891] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5893 11:35:39.352426 <6>[ 0.029355] pid_max: default: 32768 minimum: 301
5894 11:35:39.358976 <6>[ 0.034236] LSM: Security Framework initializing
5895 11:35:39.365440 <6>[ 0.039149] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5896 11:35:39.372056 <6>[ 0.046773] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5897 11:35:39.379108 <4>[ 0.055657] cacheinfo: Unable to detect cache hierarchy for CPU 0
5898 11:35:39.388799 <6>[ 0.062282] cblist_init_generic: Setting adjustable number of callback queues.
5899 11:35:39.395213 <6>[ 0.069728] cblist_init_generic: Setting shift to 3 and lim to 1.
5900 11:35:39.401722 <6>[ 0.076081] cblist_init_generic: Setting adjustable number of callback queues.
5901 11:35:39.408290 <6>[ 0.083526] cblist_init_generic: Setting shift to 3 and lim to 1.
5902 11:35:39.411580 <6>[ 0.089924] rcu: Hierarchical SRCU implementation.
5903 11:35:39.417987 <6>[ 0.094950] rcu: Max phase no-delay instances is 1000.
5904 11:35:39.426077 <6>[ 0.102858] EFI services will not be available.
5905 11:35:39.429407 <6>[ 0.107808] smp: Bringing up secondary CPUs ...
5906 11:35:39.439939 <6>[ 0.113081] Detected VIPT I-cache on CPU1
5907 11:35:39.446291 <4>[ 0.113129] cacheinfo: Unable to detect cache hierarchy for CPU 1
5908 11:35:39.452648 <6>[ 0.113137] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5909 11:35:39.459460 <6>[ 0.113167] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5910 11:35:39.462617 <6>[ 0.113650] Detected VIPT I-cache on CPU2
5911 11:35:39.469033 <4>[ 0.113684] cacheinfo: Unable to detect cache hierarchy for CPU 2
5912 11:35:39.475613 <6>[ 0.113688] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5913 11:35:39.482442 <6>[ 0.113700] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5914 11:35:39.488629 <6>[ 0.114147] Detected VIPT I-cache on CPU3
5915 11:35:39.495363 <4>[ 0.114178] cacheinfo: Unable to detect cache hierarchy for CPU 3
5916 11:35:39.501968 <6>[ 0.114182] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5917 11:35:39.508433 <6>[ 0.114194] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5918 11:35:39.511718 <6>[ 0.114768] CPU features: detected: Spectre-v2
5919 11:35:39.518126 <6>[ 0.114778] CPU features: detected: Spectre-BHB
5920 11:35:39.521599 <6>[ 0.114782] CPU features: detected: ARM erratum 858921
5921 11:35:39.528173 <6>[ 0.114787] Detected VIPT I-cache on CPU4
5922 11:35:39.534619 <4>[ 0.114836] cacheinfo: Unable to detect cache hierarchy for CPU 4
5923 11:35:39.541460 <6>[ 0.114844] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5924 11:35:39.548100 <6>[ 0.114852] arch_timer: Enabling local workaround for ARM erratum 858921
5925 11:35:39.551229 <6>[ 0.114863] arch_timer: CPU4: Trapping CNTVCT access
5926 11:35:39.561009 <6>[ 0.114870] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5927 11:35:39.564335 <6>[ 0.115354] Detected VIPT I-cache on CPU5
5928 11:35:39.570758 <4>[ 0.115395] cacheinfo: Unable to detect cache hierarchy for CPU 5
5929 11:35:39.577325 <6>[ 0.115401] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5930 11:35:39.584169 <6>[ 0.115408] arch_timer: Enabling local workaround for ARM erratum 858921
5931 11:35:39.590508 <6>[ 0.115414] arch_timer: CPU5: Trapping CNTVCT access
5932 11:35:39.596973 <6>[ 0.115419] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5933 11:35:39.599982 <6>[ 0.115955] Detected VIPT I-cache on CPU6
5934 11:35:39.606682 <4>[ 0.116000] cacheinfo: Unable to detect cache hierarchy for CPU 6
5935 11:35:39.613418 <6>[ 0.116006] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5936 11:35:39.619939 <6>[ 0.116013] arch_timer: Enabling local workaround for ARM erratum 858921
5937 11:35:39.626528 <6>[ 0.116019] arch_timer: CPU6: Trapping CNTVCT access
5938 11:35:39.632831 <6>[ 0.116024] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5939 11:35:39.636323 <6>[ 0.116555] Detected VIPT I-cache on CPU7
5940 11:35:39.642564 <4>[ 0.116598] cacheinfo: Unable to detect cache hierarchy for CPU 7
5941 11:35:39.649241 <6>[ 0.116604] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5942 11:35:39.658994 <6>[ 0.116611] arch_timer: Enabling local workaround for ARM erratum 858921
5943 11:35:39.662325 <6>[ 0.116618] arch_timer: CPU7: Trapping CNTVCT access
5944 11:35:39.668828 <6>[ 0.116623] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5945 11:35:39.675380 <6>[ 0.116671] smp: Brought up 1 node, 8 CPUs
5946 11:35:39.678731 <6>[ 0.355547] SMP: Total of 8 processors activated.
5947 11:35:39.684974 <6>[ 0.360483] CPU features: detected: 32-bit EL0 Support
5948 11:35:39.688425 <6>[ 0.365854] CPU features: detected: 32-bit EL1 Support
5949 11:35:39.694950 <6>[ 0.371221] CPU features: detected: CRC32 instructions
5950 11:35:39.698090 <6>[ 0.376648] CPU: All CPU(s) started at EL2
5951 11:35:39.704501 <6>[ 0.380986] alternatives: applying system-wide alternatives
5952 11:35:39.712039 <6>[ 0.388984] devtmpfs: initialized
5953 11:35:39.727803 <6>[ 0.397947] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5954 11:35:39.734889 <6>[ 0.407895] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5955 11:35:39.740838 <6>[ 0.415619] pinctrl core: initialized pinctrl subsystem
5956 11:35:39.744062 <6>[ 0.422727] DMI not present or invalid.
5957 11:35:39.750495 <6>[ 0.427095] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5958 11:35:39.760615 <6>[ 0.434001] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5959 11:35:39.767059 <6>[ 0.441530] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5960 11:35:39.776837 <6>[ 0.449780] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5961 11:35:39.783356 <6>[ 0.457958] audit: initializing netlink subsys (disabled)
5962 11:35:39.789823 <5>[ 0.463666] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5963 11:35:39.796184 <6>[ 0.464644] thermal_sys: Registered thermal governor 'step_wise'
5964 11:35:39.802983 <6>[ 0.471631] thermal_sys: Registered thermal governor 'power_allocator'
5965 11:35:39.806118 <6>[ 0.477931] cpuidle: using governor menu
5966 11:35:39.812699 <6>[ 0.488894] NET: Registered PF_QIPCRTR protocol family
5967 11:35:39.819152 <6>[ 0.494391] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5968 11:35:39.825892 <6>[ 0.501489] ASID allocator initialised with 32768 entries
5969 11:35:39.832246 <6>[ 0.508260] Serial: AMBA PL011 UART driver
5970 11:35:39.842929 <4>[ 0.519604] Trying to register duplicate clock ID: 113
5971 11:35:39.902655 <6>[ 0.576121] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5972 11:35:39.916971 <6>[ 0.590508] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5973 11:35:39.920085 <6>[ 0.600286] KASLR enabled
5974 11:35:39.934748 <6>[ 0.608226] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5975 11:35:39.941294 <6>[ 0.615228] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5976 11:35:39.948132 <6>[ 0.621704] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5977 11:35:39.954279 <6>[ 0.628696] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5978 11:35:39.960955 <6>[ 0.635170] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5979 11:35:39.967261 <6>[ 0.642160] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5980 11:35:39.973938 <6>[ 0.648635] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5981 11:35:39.980439 <6>[ 0.655625] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5982 11:35:39.986845 <6>[ 0.663154] ACPI: Interpreter disabled.
5983 11:35:39.994489 <6>[ 0.671159] iommu: Default domain type: Translated
5984 11:35:40.001026 <6>[ 0.676320] iommu: DMA domain TLB invalidation policy: strict mode
5985 11:35:40.004277 <5>[ 0.682943] SCSI subsystem initialized
5986 11:35:40.010883 <6>[ 0.687393] usbcore: registered new interface driver usbfs
5987 11:35:40.017137 <6>[ 0.693121] usbcore: registered new interface driver hub
5988 11:35:40.023838 <6>[ 0.698663] usbcore: registered new device driver usb
5989 11:35:40.026924 <6>[ 0.704985] pps_core: LinuxPPS API ver. 1 registered
5990 11:35:40.036687 <6>[ 0.710170] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5991 11:35:40.043208 <6>[ 0.719495] PTP clock support registered
5992 11:35:40.046541 <6>[ 0.723750] EDAC MC: Ver: 3.0.0
5993 11:35:40.050058 <6>[ 0.729402] FPGA manager framework
5994 11:35:40.056206 <6>[ 0.733084] Advanced Linux Sound Architecture Driver Initialized.
5995 11:35:40.059949 <6>[ 0.739825] vgaarb: loaded
5996 11:35:40.066202 <6>[ 0.742956] clocksource: Switched to clocksource arch_sys_counter
5997 11:35:40.072683 <5>[ 0.749392] VFS: Disk quotas dquot_6.6.0
5998 11:35:40.079132 <6>[ 0.753566] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5999 11:35:40.082399 <6>[ 0.760739] pnp: PnP ACPI: disabled
6000 11:35:40.090722 <6>[ 0.767608] NET: Registered PF_INET protocol family
6001 11:35:40.097639 <6>[ 0.772831] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
6002 11:35:40.109164 <6>[ 0.782741] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
6003 11:35:40.118974 <6>[ 0.791494] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
6004 11:35:40.125684 <6>[ 0.799444] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
6005 11:35:40.132005 <6>[ 0.807676] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
6006 11:35:40.142311 <6>[ 0.815768] TCP: Hash tables configured (established 32768 bind 32768)
6007 11:35:40.148470 <6>[ 0.822595] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
6008 11:35:40.155242 <6>[ 0.829568] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
6009 11:35:40.161792 <6>[ 0.837052] NET: Registered PF_UNIX/PF_LOCAL protocol family
6010 11:35:40.168280 <6>[ 0.843174] RPC: Registered named UNIX socket transport module.
6011 11:35:40.171621 <6>[ 0.849321] RPC: Registered udp transport module.
6012 11:35:40.178007 <6>[ 0.854248] RPC: Registered tcp transport module.
6013 11:35:40.184496 <6>[ 0.859172] RPC: Registered tcp NFSv4.1 backchannel transport module.
6014 11:35:40.187972 <6>[ 0.865824] PCI: CLS 0 bytes, default 64
6015 11:35:40.191023 <6>[ 0.870088] Unpacking initramfs...
6016 11:35:40.209685 <6>[ 0.883575] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
6017 11:35:40.219855 <6>[ 0.892296] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
6018 11:35:40.222879 <6>[ 0.901205] kvm [1]: IPA Size Limit: 40 bits
6019 11:35:40.230880 <6>[ 0.907555] kvm [1]: vgic-v2@c420000
6020 11:35:40.237212 <6>[ 0.911386] kvm [1]: GIC system register CPU interface enabled
6021 11:35:40.240706 <6>[ 0.917571] kvm [1]: vgic interrupt IRQ18
6022 11:35:40.246982 <6>[ 0.921945] kvm [1]: Hyp mode initialized successfully
6023 11:35:40.250064 <5>[ 0.928288] Initialise system trusted keyrings
6024 11:35:40.256858 <6>[ 0.933129] workingset: timestamp_bits=42 max_order=20 bucket_order=0
6025 11:35:40.266304 <6>[ 0.943076] squashfs: version 4.0 (2009/01/31) Phillip Lougher
6026 11:35:40.272729 <5>[ 0.949506] NFS: Registering the id_resolver key type
6027 11:35:40.275986 <5>[ 0.954819] Key type id_resolver registered
6028 11:35:40.282626 <5>[ 0.959232] Key type id_legacy registered
6029 11:35:40.289305 <6>[ 0.963535] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
6030 11:35:40.295726 <6>[ 0.970455] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
6031 11:35:40.302168 <6>[ 0.978205] 9p: Installing v9fs 9p2000 file system support
6032 11:35:40.330296 <5>[ 1.006918] Key type asymmetric registered
6033 11:35:40.333440 <5>[ 1.011268] Asymmetric key parser 'x509' registered
6034 11:35:40.343134 <6>[ 1.016421] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
6035 11:35:40.346601 <6>[ 1.024043] io scheduler mq-deadline registered
6036 11:35:40.349723 <6>[ 1.028802] io scheduler kyber registered
6037 11:35:40.372850 <6>[ 1.049618] EINJ: ACPI disabled.
6038 11:35:40.379368 <4>[ 1.053395] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
6039 11:35:40.417247 <6>[ 1.094117] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
6040 11:35:40.425752 <6>[ 1.102607] printk: console [ttyS0] disabled
6041 11:35:40.453622 <6>[ 1.127256] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
6042 11:35:40.460072 <6>[ 1.136732] printk: console [ttyS0] enabled
6043 11:35:40.463342 <6>[ 1.136732] printk: console [ttyS0] enabled
6044 11:35:40.469700 <6>[ 1.145653] printk: bootconsole [mtk8250] disabled
6045 11:35:40.473234 <6>[ 1.145653] printk: bootconsole [mtk8250] disabled
6046 11:35:40.482897 <3>[ 1.156184] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
6047 11:35:40.489643 <3>[ 1.164566] mt6577-uart 11003000.serial: Error applying setting, reverse things back
6048 11:35:40.519236 <6>[ 1.192971] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
6049 11:35:40.525806 <6>[ 1.202625] serial serial0: tty port ttyS1 registered
6050 11:35:40.532243 <6>[ 1.209197] SuperH (H)SCI(F) driver initialized
6051 11:35:40.538824 <6>[ 1.214694] msm_serial: driver initialized
6052 11:35:40.551606 <6>[ 1.224991] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
6053 11:35:40.561322 <6>[ 1.233583] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
6054 11:35:40.567566 <6>[ 1.242156] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
6055 11:35:40.577589 <6>[ 1.250722] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
6056 11:35:40.587316 <6>[ 1.259391] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
6057 11:35:40.593734 <6>[ 1.268055] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
6058 11:35:40.603892 <6>[ 1.276796] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
6059 11:35:40.613553 <6>[ 1.285537] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
6060 11:35:40.620120 <6>[ 1.294104] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
6061 11:35:40.629680 <6>[ 1.302903] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
6062 11:35:40.638510 <4>[ 1.315328] cacheinfo: Unable to detect cache hierarchy for CPU 0
6063 11:35:40.647896 <6>[ 1.324674] loop: module loaded
6064 11:35:40.659710 <6>[ 1.336631] vsim1: Bringing 1800000uV into 2700000-2700000uV
6065 11:35:40.677759 <6>[ 1.354553] megasas: 07.719.03.00-rc1
6066 11:35:40.686490 <6>[ 1.363367] spi-nor spi1.0: w25q64dw (8192 Kbytes)
6067 11:35:40.696997 <6>[ 1.370342] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
6068 11:35:40.710261 <6>[ 1.386975] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
6069 11:35:40.770538 <6>[ 1.440670] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.3.25/cr50_v1.9308_87_mp.398-a
6070 11:35:40.822634 <6>[ 1.499329] Freeing initrd memory: 18280K
6071 11:35:40.837836 <4>[ 1.511183] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
6072 11:35:40.844289 <4>[ 1.520412] CPU: 5 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
6073 11:35:40.850878 <4>[ 1.527112] Hardware name: Google juniper sku16 board (DT)
6074 11:35:40.854078 <4>[ 1.532852] Call trace:
6075 11:35:40.857169 <4>[ 1.535552] dump_backtrace.part.0+0xe0/0xf0
6076 11:35:40.860634 <4>[ 1.540090] show_stack+0x18/0x30
6077 11:35:40.867317 <4>[ 1.543663] dump_stack_lvl+0x64/0x80
6078 11:35:40.870368 <4>[ 1.547583] dump_stack+0x18/0x34
6079 11:35:40.873727 <4>[ 1.551153] sysfs_warn_dup+0x64/0x80
6080 11:35:40.877098 <4>[ 1.555074] sysfs_do_create_link_sd+0xf0/0x100
6081 11:35:40.884080 <4>[ 1.559860] sysfs_create_link+0x20/0x40
6082 11:35:40.887023 <4>[ 1.564040] bus_add_device+0x64/0x120
6083 11:35:40.890406 <4>[ 1.568045] device_add+0x354/0x7ec
6084 11:35:40.893463 <4>[ 1.571792] of_device_add+0x44/0x60
6085 11:35:40.900304 <4>[ 1.575626] of_platform_device_create_pdata+0x90/0x124
6086 11:35:40.903649 <4>[ 1.581108] of_platform_bus_create+0x154/0x380
6087 11:35:40.910327 <4>[ 1.585893] of_platform_populate+0x50/0xfc
6088 11:35:40.913523 <4>[ 1.590332] parse_mtd_partitions+0x1d8/0x4e0
6089 11:35:40.916902 <4>[ 1.594948] mtd_device_parse_register+0xec/0x2e0
6090 11:35:40.923174 <4>[ 1.599909] spi_nor_probe+0x280/0x2f4
6091 11:35:40.926651 <4>[ 1.603915] spi_mem_probe+0x6c/0xc0
6092 11:35:40.929765 <4>[ 1.607748] spi_probe+0x84/0xe4
6093 11:35:40.933194 <4>[ 1.611233] really_probe+0xbc/0x2dc
6094 11:35:40.939555 <4>[ 1.615064] __driver_probe_device+0x78/0x114
6095 11:35:40.942743 <4>[ 1.619676] driver_probe_device+0xd8/0x15c
6096 11:35:40.946211 <4>[ 1.624114] __device_attach_driver+0xb8/0x134
6097 11:35:40.952726 <4>[ 1.628813] bus_for_each_drv+0x7c/0xd4
6098 11:35:40.955971 <4>[ 1.632905] __device_attach+0x9c/0x1a0
6099 11:35:40.959246 <4>[ 1.636995] device_initial_probe+0x14/0x20
6100 11:35:40.962630 <4>[ 1.641434] bus_probe_device+0x98/0xa0
6101 11:35:40.969020 <4>[ 1.645524] device_add+0x3c0/0x7ec
6102 11:35:40.972417 <4>[ 1.649269] __spi_add_device+0x78/0x120
6103 11:35:40.975684 <4>[ 1.653446] spi_add_device+0x44/0x80
6104 11:35:40.979086 <4>[ 1.657362] spi_register_controller+0x704/0xb20
6105 11:35:40.985801 <4>[ 1.662235] devm_spi_register_controller+0x4c/0xac
6106 11:35:40.989242 <4>[ 1.667368] mtk_spi_probe+0x4f4/0x684
6107 11:35:40.992058 <4>[ 1.671372] platform_probe+0x68/0xc0
6108 11:35:40.998670 <4>[ 1.675290] really_probe+0xbc/0x2dc
6109 11:35:41.002000 <4>[ 1.679119] __driver_probe_device+0x78/0x114
6110 11:35:41.005435 <4>[ 1.683730] driver_probe_device+0xd8/0x15c
6111 11:35:41.012024 <4>[ 1.688167] __driver_attach+0x94/0x19c
6112 11:35:41.015233 <4>[ 1.692257] bus_for_each_dev+0x74/0xd0
6113 11:35:41.018685 <4>[ 1.696348] driver_attach+0x24/0x30
6114 11:35:41.021976 <4>[ 1.700178] bus_add_driver+0x154/0x20c
6115 11:35:41.024981 <4>[ 1.704269] driver_register+0x78/0x130
6116 11:35:41.031796 <4>[ 1.708359] __platform_driver_register+0x28/0x34
6117 11:35:41.035022 <4>[ 1.713319] mtk_spi_driver_init+0x1c/0x28
6118 11:35:41.041670 <4>[ 1.717674] do_one_initcall+0x64/0x1dc
6119 11:35:41.044708 <4>[ 1.721765] kernel_init_freeable+0x218/0x284
6120 11:35:41.048015 <4>[ 1.726381] kernel_init+0x24/0x12c
6121 11:35:41.051676 <4>[ 1.730126] ret_from_fork+0x10/0x20
6122 11:35:41.062251 <6>[ 1.738943] tun: Universal TUN/TAP device driver, 1.6
6123 11:35:41.065429 <6>[ 1.745247] thunder_xcv, ver 1.0
6124 11:35:41.072249 <6>[ 1.748767] thunder_bgx, ver 1.0
6125 11:35:41.072334 <6>[ 1.752271] nicpf, ver 1.0
6126 11:35:41.082989 <6>[ 1.756642] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
6127 11:35:41.086322 <6>[ 1.764127] hns3: Copyright (c) 2017 Huawei Corporation.
6128 11:35:41.092878 <6>[ 1.769725] hclge is initializing
6129 11:35:41.096106 <6>[ 1.773310] e1000: Intel(R) PRO/1000 Network Driver
6130 11:35:41.102779 <6>[ 1.778448] e1000: Copyright (c) 1999-2006 Intel Corporation.
6131 11:35:41.109187 <6>[ 1.784472] e1000e: Intel(R) PRO/1000 Network Driver
6132 11:35:41.112640 <6>[ 1.789693] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
6133 11:35:41.119154 <6>[ 1.795886] igb: Intel(R) Gigabit Ethernet Network Driver
6134 11:35:41.125729 <6>[ 1.801543] igb: Copyright (c) 2007-2014 Intel Corporation.
6135 11:35:41.132253 <6>[ 1.807390] igbvf: Intel(R) Gigabit Virtual Function Network Driver
6136 11:35:41.138949 <6>[ 1.813914] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
6137 11:35:41.141954 <6>[ 1.820467] sky2: driver version 1.30
6138 11:35:41.149094 <6>[ 1.825729] usbcore: registered new device driver r8152-cfgselector
6139 11:35:41.155345 <6>[ 1.832275] usbcore: registered new interface driver r8152
6140 11:35:41.162157 <6>[ 1.838104] VFIO - User Level meta-driver version: 0.3
6141 11:35:41.169191 <6>[ 1.845931] mtu3 11201000.usb: uwk - reg:0x420, version:101
6142 11:35:41.175601 <4>[ 1.851803] mtu3 11201000.usb: supply vbus not found, using dummy regulator
6143 11:35:41.182225 <6>[ 1.859081] mtu3 11201000.usb: dr_mode: 1, drd: auto
6144 11:35:41.188797 <6>[ 1.864307] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
6145 11:35:41.191951 <6>[ 1.870492] mtu3 11201000.usb: usb3-drd: 0
6146 11:35:41.202509 <6>[ 1.876072] mtu3 11201000.usb: xHCI platform device register success...
6147 11:35:41.209242 <4>[ 1.884741] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
6148 11:35:41.215789 <6>[ 1.892667] xhci-mtk 11200000.usb: xHCI Host Controller
6149 11:35:41.225825 <6>[ 1.898176] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
6150 11:35:41.229067 <6>[ 1.905914] xhci-mtk 11200000.usb: USB3 root hub has no ports
6151 11:35:41.238775 <6>[ 1.911924] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
6152 11:35:41.245300 <6>[ 1.921347] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
6153 11:35:41.252082 <6>[ 1.927423] xhci-mtk 11200000.usb: xHCI Host Controller
6154 11:35:41.258428 <6>[ 1.932911] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
6155 11:35:41.265055 <6>[ 1.940570] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
6156 11:35:41.268300 <6>[ 1.947383] hub 1-0:1.0: USB hub found
6157 11:35:41.274713 <6>[ 1.951413] hub 1-0:1.0: 1 port detected
6158 11:35:41.284656 <6>[ 1.956764] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
6159 11:35:41.288004 <6>[ 1.965408] hub 2-0:1.0: USB hub found
6160 11:35:41.294335 <3>[ 1.969458] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
6161 11:35:41.300972 <6>[ 1.977351] usbcore: registered new interface driver usb-storage
6162 11:35:41.307825 <6>[ 1.983954] usbcore: registered new device driver onboard-usb-hub
6163 11:35:41.321702 <4>[ 1.995070] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6164 11:35:41.330701 <6>[ 2.007307] mt6397-rtc mt6358-rtc: registered as rtc0
6165 11:35:41.340264 <6>[ 2.012787] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-17T11:35:41 UTC (1721216141)
6166 11:35:41.346901 <6>[ 2.022675] i2c_dev: i2c /dev entries driver
6167 11:35:41.356675 <6>[ 2.029093] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6168 11:35:41.363202 <6>[ 2.037436] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6169 11:35:41.369966 <6>[ 2.046341] i2c 4-0058: Fixed dependency cycle(s) with /panel
6170 11:35:41.376439 <6>[ 2.052375] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6171 11:35:41.395274 <6>[ 2.071769] cpu cpu0: EM: created perf domain
6172 11:35:41.407917 <6>[ 2.077260] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6173 11:35:41.411355 <6>[ 2.088539] cpu cpu4: EM: created perf domain
6174 11:35:41.418464 <6>[ 2.095268] sdhci: Secure Digital Host Controller Interface driver
6175 11:35:41.424966 <6>[ 2.101723] sdhci: Copyright(c) Pierre Ossman
6176 11:35:41.431364 <6>[ 2.107135] Synopsys Designware Multimedia Card Interface Driver
6177 11:35:41.437980 <6>[ 2.107678] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6178 11:35:41.444580 <6>[ 2.114198] sdhci-pltfm: SDHCI platform and OF driver helper
6179 11:35:41.451143 <6>[ 2.127334] ledtrig-cpu: registered to indicate activity on CPUs
6180 11:35:41.458324 <6>[ 2.135054] usbcore: registered new interface driver usbhid
6181 11:35:41.464971 <6>[ 2.140892] usbhid: USB HID core driver
6182 11:35:41.471606 <6>[ 2.145184] spi_master spi2: will run message pump with realtime priority
6183 11:35:41.478953 <4>[ 2.145214] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6184 11:35:41.485429 <4>[ 2.159469] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6185 11:35:41.498725 <6>[ 2.166820] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6186 11:35:41.515745 <6>[ 2.182703] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6187 11:35:41.522587 <4>[ 2.192588] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6188 11:35:41.528798 <6>[ 2.197355] cros-ec-spi spi2.0: Chrome EC device registered
6189 11:35:41.540983 <4>[ 2.214368] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6190 11:35:41.552362 <4>[ 2.225788] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6191 11:35:41.558962 <4>[ 2.234648] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6192 11:35:41.565405 <6>[ 2.240590] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x13014
6193 11:35:41.572299 <6>[ 2.249063] mmc0: new HS400 MMC card at address 0001
6194 11:35:41.578885 <6>[ 2.253975] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6195 11:35:41.585159 <6>[ 2.255525] mmcblk0: mmc0:0001 DA4032 29.1 GiB
6196 11:35:41.595039 <6>[ 2.271767] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6197 11:35:41.604557 <6>[ 2.281499] mmcblk0boot0: mmc0:0001 DA4032 4.00 MiB
6198 11:35:41.611470 <6>[ 2.288076] mmcblk0boot1: mmc0:0001 DA4032 4.00 MiB
6199 11:35:41.621388 <6>[ 2.291569] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6200 11:35:41.627722 <6>[ 2.294343] mmcblk0rpmb: mmc0:0001 DA4032 16.0 MiB, chardev (507:0)
6201 11:35:41.637378 <6>[ 2.306680] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6202 11:35:41.650735 <6>[ 2.307208] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6203 11:35:41.660608 <6>[ 2.307487] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6204 11:35:41.667153 <6>[ 2.342916] NET: Registered PF_PACKET protocol family
6205 11:35:41.670398 <6>[ 2.348339] 9pnet: Installing 9P2000 support
6206 11:35:41.677010 <5>[ 2.353093] Key type dns_resolver registered
6207 11:35:41.680209 <6>[ 2.358440] registered taskstats version 1
6208 11:35:41.687100 <5>[ 2.362826] Loading compiled-in X.509 certificates
6209 11:35:41.697612 <6>[ 2.371211] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6210 11:35:41.727476 <3>[ 2.401123] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6211 11:35:41.759662 <6>[ 2.429846] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6212 11:35:41.770577 <6>[ 2.444189] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6213 11:35:41.780508 <6>[ 2.452760] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6214 11:35:41.786803 <6>[ 2.461290] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6215 11:35:41.796661 <6>[ 2.470045] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6216 11:35:41.806493 <6>[ 2.478650] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6217 11:35:41.813075 <6>[ 2.487200] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6218 11:35:41.822673 <6>[ 2.495780] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6219 11:35:41.829505 <6>[ 2.505417] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6220 11:35:41.836241 <6>[ 2.512784] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6221 11:35:41.843050 <6>[ 2.519926] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6222 11:35:41.853469 <6>[ 2.527116] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6223 11:35:41.860186 <6>[ 2.534459] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6224 11:35:41.863445 <6>[ 2.542196] hub 1-1:1.0: USB hub found
6225 11:35:41.869895 <6>[ 2.546603] hub 1-1:1.0: 3 ports detected
6226 11:35:41.876350 <6>[ 2.551186] panfrost 13040000.gpu: clock rate = 511999970
6227 11:35:41.886144 <6>[ 2.556858] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6228 11:35:41.892495 <6>[ 2.566819] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6229 11:35:41.902266 <6>[ 2.574824] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6230 11:35:41.912479 <6>[ 2.583259] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6231 11:35:41.918740 <6>[ 2.595336] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6232 11:35:41.929943 <6>[ 2.603576] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6233 11:35:41.939967 <6>[ 2.612245] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6234 11:35:41.949798 <6>[ 2.621399] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6235 11:35:41.959390 <6>[ 2.630531] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6236 11:35:41.966163 <6>[ 2.639660] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6237 11:35:41.975859 <6>[ 2.648963] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6238 11:35:41.985425 <6>[ 2.658266] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6239 11:35:41.995305 <6>[ 2.667745] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6240 11:35:42.004992 <6>[ 2.677222] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6241 11:35:42.014721 <6>[ 2.686349] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6242 11:35:42.085052 <6>[ 2.758558] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6243 11:35:42.094781 <6>[ 2.767428] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6244 11:35:42.106633 <6>[ 2.780185] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6245 11:35:42.185459 <6>[ 2.858998] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6246 11:35:42.808368 <6>[ 3.051294] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6247 11:35:42.818222 <4>[ 3.168347] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6248 11:35:42.824770 <4>[ 3.168364] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6249 11:35:42.831182 <6>[ 3.221121] r8152 1-1.2:1.0 eth0: v1.12.13
6250 11:35:42.837912 <6>[ 3.302986] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6251 11:35:42.844254 <6>[ 3.465272] Console: switching to colour frame buffer device 170x48
6252 11:35:42.853910 <6>[ 3.525925] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6253 11:35:42.872697 <6>[ 3.542887] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6254 11:35:42.889899 <6>[ 3.559958] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6255 11:35:42.899625 <6>[ 3.572337] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6256 11:35:42.906091 <6>[ 3.580866] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6257 11:35:42.919130 <6>[ 3.588007] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6258 11:35:42.936550 <6>[ 3.606877] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6259 11:35:44.235842 <6>[ 4.912705] r8152 1-1.2:1.0 eth0: carrier on
6260 11:35:46.426336 <5>[ 4.935099] Sending DHCP requests .., OK
6261 11:35:46.432879 <6>[ 7.107344] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.22
6262 11:35:46.436207 <6>[ 7.115793] IP-Config: Complete:
6263 11:35:46.449126 <6>[ 7.119361] device=eth0, hwaddr=00:e0:4c:78:85:cb, ipaddr=192.168.201.22, mask=255.255.255.0, gw=192.168.201.1
6264 11:35:46.458990 <6>[ 7.130259] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2, domain=lava-rack, nis-domain=(none)
6265 11:35:46.471054 <6>[ 7.144627] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6266 11:35:46.479874 <6>[ 7.144637] nameserver0=192.168.201.1
6267 11:35:46.487809 <6>[ 7.164593] clk: Disabling unused clocks
6268 11:35:46.492498 <6>[ 7.172582] ALSA device list:
6269 11:35:46.501927 <6>[ 7.178676] No soundcards found.
6270 11:35:46.511061 <6>[ 7.187716] Freeing unused kernel memory: 8512K
6271 11:35:46.518032 <6>[ 7.194893] Run /init as init process
6272 11:35:46.529499 Loading, please wait...
6273 11:35:46.565365 Starting systemd-udevd version 252.22-1~deb12u1
6274 11:35:46.928644 <6>[ 7.601971] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6275 11:35:46.938444 <3>[ 7.602012] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6276 11:35:46.944921 <3>[ 7.603431] mtk-scp 10500000.scp: invalid resource
6277 11:35:46.951441 <6>[ 7.603475] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6278 11:35:46.958187 <3>[ 7.605733] thermal_sys: Failed to find 'trips' node
6279 11:35:46.964750 <3>[ 7.605739] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6280 11:35:46.974356 <3>[ 7.605746] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6281 11:35:46.980789 <4>[ 7.605750] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6282 11:35:46.987646 <3>[ 7.611412] thermal_sys: Failed to find 'trips' node
6283 11:35:46.990752 <6>[ 7.612188] remoteproc remoteproc0: scp is available
6284 11:35:47.000538 <4>[ 7.612303] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6285 11:35:47.007203 <6>[ 7.612310] remoteproc remoteproc0: powering up scp
6286 11:35:47.013585 <4>[ 7.612326] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6287 11:35:47.020549 <3>[ 7.612330] remoteproc remoteproc0: request_firmware failed: -2
6288 11:35:47.030391 <4>[ 7.612618] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6289 11:35:47.037099 <3>[ 7.622441] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6290 11:35:47.043472 <3>[ 7.625114] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6291 11:35:47.053955 <3>[ 7.625127] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6292 11:35:47.060674 <4>[ 7.625132] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6293 11:35:47.066913 <4>[ 7.634524] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6294 11:35:47.081398 <3>[ 7.634695] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6295 11:35:47.091567 <4>[ 7.643904] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6296 11:35:47.102857 <3>[ 7.647215] elan_i2c 2-0015: Error applying setting, reverse things back
6297 11:35:47.112584 <6>[ 7.656347] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6298 11:35:47.120277 <6>[ 7.666013] mc: Linux media interface: v0.10
6299 11:35:47.130284 <3>[ 7.666578] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6300 11:35:47.140264 <3>[ 7.666599] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6301 11:35:47.150397 <3>[ 7.666608] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6302 11:35:47.160744 <5>[ 7.668181] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6303 11:35:47.173648 <6>[ 7.673360] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6304 11:35:47.183417 <3>[ 7.675730] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6305 11:35:47.193469 <5>[ 7.679884] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6306 11:35:47.203168 <5>[ 7.680307] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6307 11:35:47.212915 <4>[ 7.680366] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6308 11:35:47.219692 <6>[ 7.680373] cfg80211: failed to load regulatory.db
6309 11:35:47.229311 <6>[ 7.696844] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6310 11:35:47.239170 <3>[ 7.697294] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6311 11:35:47.252047 <3>[ 7.697358] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6312 11:35:47.259287 <6>[ 7.716689] videodev: Linux video capture interface: v2.00
6313 11:35:47.269922 <3>[ 7.718289] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6314 11:35:47.277463 <6>[ 7.734835] cs_system_cfg: CoreSight Configuration manager initialised
6315 11:35:47.288817 <3>[ 7.742338] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6316 11:35:47.299120 <3>[ 7.742349] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6317 11:35:47.309324 <3>[ 7.742384] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6318 11:35:47.319472 <6>[ 7.812061] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6319 11:35:47.361886 <3>[ 8.031934] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6320 11:35:47.371719 <6>[ 8.032322] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6321 11:35:47.378216 <3>[ 8.045884] debugfs: File 'Playback' in directory 'dapm' already present!
6322 11:35:47.384799 <6>[ 8.052068] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6323 11:35:47.391568 <3>[ 8.059100] debugfs: File 'Capture' in directory 'dapm' already present!
6324 11:35:47.401214 <6>[ 8.066916] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6325 11:35:47.410936 <6>[ 8.082140] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6326 11:35:47.420641 <6>[ 8.082727] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6327 11:35:47.423997 <6>[ 8.084391] Bluetooth: Core ver 2.22
6328 11:35:47.430172 <6>[ 8.084460] NET: Registered PF_BLUETOOTH protocol family
6329 11:35:47.436864 <6>[ 8.084465] Bluetooth: HCI device and connection manager initialized
6330 11:35:47.444221 <6>[ 8.084484] Bluetooth: HCI socket layer initialized
6331 11:35:47.447574 <6>[ 8.084497] Bluetooth: L2CAP socket layer initialized
6332 11:35:47.454100 <6>[ 8.084514] Bluetooth: SCO socket layer initialized
6333 11:35:47.465115 <6>[ 8.084964] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6334 11:35:47.468121 <6>[ 8.085926] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6335 11:35:47.478997 <6>[ 8.102106] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6336 11:35:47.488593 <4>[ 8.112555] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6337 11:35:47.495354 <4>[ 8.112555] Fallback method does not support PEC.
6338 11:35:47.501850 <6>[ 8.114496] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6339 11:35:47.508180 <3>[ 8.116884] thermal_sys: Failed to find 'trips' node
6340 11:35:47.514743 <3>[ 8.116889] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6341 11:35:47.521097 <3>[ 8.116899] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6342 11:35:47.531556 <4>[ 8.116904] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6343 11:35:47.541392 <3>[ 8.122550] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6344 11:35:47.547926 <6>[ 8.125498] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6345 11:35:47.554498 <3>[ 8.136292] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6346 11:35:47.564305 <6>[ 8.140354] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6347 11:35:47.574451 <6>[ 8.162237] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6348 11:35:47.580737 Begin: Loading essential drivers ... done.
6349 11:35:47.584110 Begi<6>[ 8.162290] Bluetooth: HCI UART driver ver 2.3
6350 11:35:47.587335 n: Running /scripts/init-premount ... done.
6351 11:35:47.593760 Beg<6>[ 8.162297] Bluetooth: HCI UART protocol H4 registered
6352 11:35:47.600459 in: Mounting root file system ..<6>[ 8.162359] Bluetooth: HCI UART protocol LL registered
6353 11:35:47.610588 . Begin: Running /scripts/nfs-to<6>[ 8.162393] Bluetooth: HCI UART protocol Three-wire (H5) registered
6354 11:35:47.613607 p ... done.
6355 11:35:47.620409 Begin: Running /scr<6>[ 8.163551] Bluetooth: HCI UART protocol Broadcom registered
6356 11:35:47.626913 ipts/nfs-premount ... Waiting up<6>[ 8.163593] Bluetooth: HCI UART protocol QCA registered
6357 11:35:47.636664 to 60 secs for any ethernet to <6>[ 8.163618] Bluetooth: HCI UART protocol Marvell registered
6358 11:35:47.640123 become available
6359 11:35:47.646424 Device /sys/cl<6>[ 8.164393] Bluetooth: hci0: setting up ROME/QCA6390
6360 11:35:47.646513 ass/net/eth0 found
6361 11:35:47.646600 done.
6362 11:35:47.656327 Begin: Waiting up to <6>[ 8.175807] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6363 11:35:47.666253 180 secs for any network device <6>[ 8.184281] usbcore: registered new interface driver uvcvideo
6364 11:35:47.669294 to become available ... done.
6365 11:35:47.675758 <6>[ 8.188544] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6366 11:35:47.689364 <6>[ 8.225192] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6367 11:35:47.699240 <6>[ 8.228943] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6368 11:35:47.709059 <6>[ 8.237136] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6369 11:35:47.754710 <6>[ 8.424870] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6370 11:35:47.787218 IP-Config: eth0 hardware address 00:e0:4c:78:85:cb mtu 1500 DHCP
6371 11:35:47.793442 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6372 11:35:47.806252 address: 192.168.201.22 broadcast: 192.168.201.255 netmask: 255.255.255<3>[ 8.480111] Bluetooth: hci0: Frame reassembly failed (-84)
6373 11:35:47.806343 .0
6374 11:35:47.812627 gateway: 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6375 11:35:47.819215 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-2
6376 11:35:47.825665 domain : lava-rack
6377 11:35:47.828992 rootserver: 192.168.201.1 rootpath:
6378 11:35:47.832304 filename :
6379 11:35:47.839665 done.
6380 11:35:47.842919 Begin: Running /scripts/nfs-bottom ... done.
6381 11:35:47.869852 Begin: Running /scripts/init-bottom ... done.
6382 11:35:47.914161 <6>[ 8.587483] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6383 11:35:48.071070 <6>[ 8.747718] Bluetooth: hci0: QCA Product ID :0x00000008
6384 11:35:48.077845 <6>[ 8.754493] Bluetooth: hci0: QCA SOC Version :0x00000044
6385 11:35:48.084365 <6>[ 8.761168] Bluetooth: hci0: QCA ROM Version :0x00000302
6386 11:35:48.090973 <6>[ 8.767814] Bluetooth: hci0: QCA Patch Version:0x00000111
6387 11:35:48.097606 <6>[ 8.774433] Bluetooth: hci0: QCA controller version 0x00440302
6388 11:35:48.107818 <6>[ 8.781475] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6389 11:35:48.119245 <4>[ 8.792713] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6390 11:35:48.130540 <3>[ 8.804037] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6391 11:35:48.137403 <3>[ 8.814260] Bluetooth: hci0: QCA Failed to download patch (-2)
6392 11:35:48.204233 <3>[ 8.881145] Bluetooth: hci0: Frame reassembly failed (-84)
6393 11:35:48.210990 <4>[ 8.881164] Bluetooth: hci0: Received unexpected HCI Event 0x00
6394 11:35:48.220318 <3>[ 8.886919] Bluetooth: hci0: Frame reassembly failed (-84)
6395 11:35:48.284388 <6>[ 8.957541] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6396 11:35:48.365131 <4>[ 9.038474] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6397 11:35:48.385430 <4>[ 9.059020] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6398 11:35:48.401544 <4>[ 9.074844] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6399 11:35:48.411509 <4>[ 9.088145] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6400 11:35:49.248215 <6>[ 9.924968] NET: Registered PF_INET6 protocol family
6401 11:35:49.259794 <6>[ 9.936492] Segment Routing with IPv6
6402 11:35:49.266641 <6>[ 9.943251] In-situ OAM (IOAM) with IPv6
6403 11:35:49.440047 <30>[ 10.087119] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6404 11:35:49.456475 <30>[ 10.133210] systemd[1]: Detected architecture arm64.
6405 11:35:49.466431
6406 11:35:49.469452 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6407 11:35:49.469559
6408 11:35:49.491195 <30>[ 10.167965] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6409 11:35:50.214433 <3>[ 10.891037] Bluetooth: hci0: Opcode 0x0c14 failed: -110
6410 11:35:50.221058 <3>[ 10.891257] Bluetooth: hci0: command 0x0c14 tx timeout
6411 11:35:50.486867 <30>[ 11.160324] systemd[1]: Queued start job for default target graphical.target.
6412 11:35:50.522518 <30>[ 11.195708] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6413 11:35:50.534587 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6414 11:35:50.552029 <30>[ 11.225296] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6415 11:35:50.564875 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6416 11:35:50.584027 <30>[ 11.257413] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6417 11:35:50.598136 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6418 11:35:50.615310 <30>[ 11.288605] systemd[1]: Created slice user.slice - User and Session Slice.
6419 11:35:50.627224 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6420 11:35:50.649451 <30>[ 11.319573] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6421 11:35:50.662347 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6422 11:35:50.685330 <30>[ 11.355402] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6423 11:35:50.697516 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6424 11:35:50.726826 <30>[ 11.387353] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6425 11:35:50.743106 <30>[ 11.416502] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6426 11:35:50.753891 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6427 11:35:50.769917 <30>[ 11.443174] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6428 11:35:50.782610 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6429 11:35:50.801926 <30>[ 11.475205] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6430 11:35:50.816078 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6431 11:35:50.830639 <30>[ 11.507256] systemd[1]: Reached target paths.target - Path Units.
6432 11:35:50.845135 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6433 11:35:50.861813 <30>[ 11.535159] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6434 11:35:50.874180 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6435 11:35:50.889959 <30>[ 11.563133] systemd[1]: Reached target slices.target - Slice Units.
6436 11:35:50.901026 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6437 11:35:50.914467 <30>[ 11.591182] systemd[1]: Reached target swap.target - Swaps.
6438 11:35:50.925257 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6439 11:35:50.945650 <30>[ 11.619217] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6440 11:35:50.959327 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6441 11:35:50.978246 <30>[ 11.651588] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6442 11:35:50.992178 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6443 11:35:51.012971 <30>[ 11.686121] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6444 11:35:51.026088 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6445 11:35:51.043580 <30>[ 11.717105] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6446 11:35:51.057813 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6447 11:35:51.074407 <30>[ 11.747933] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6448 11:35:51.086970 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6449 11:35:51.107482 <30>[ 11.780731] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6450 11:35:51.121119 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6451 11:35:51.140605 <30>[ 11.814137] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6452 11:35:51.154154 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6453 11:35:51.170498 <30>[ 11.843752] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6454 11:35:51.183122 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6455 11:35:51.225924 <30>[ 11.899408] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6456 11:35:51.237159 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6457 11:35:51.263275 <30>[ 11.936478] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6458 11:35:51.276289 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6459 11:35:51.303195 <30>[ 11.976491] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6460 11:35:51.315538 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6461 11:35:51.341176 <30>[ 12.007900] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6462 11:35:51.382424 <30>[ 12.055660] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6463 11:35:51.394986 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6464 11:35:51.418241 <30>[ 12.091567] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6465 11:35:51.432148 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6466 11:35:51.456118 <30>[ 12.129500] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6467 11:35:51.469843 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6468 11:35:51.512996 <6>[ 12.186243] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6469 11:35:51.522809 <30>[ 12.188470] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6470 11:35:51.537456 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6471 11:35:51.552247 <30>[ 12.225399] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6472 11:35:51.563976 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6473 11:35:51.587871 <30>[ 12.261158] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6474 11:35:51.598678 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6475 11:35:51.625103 <6>[ 12.301504] fuse: init (API version 7.37)
6476 11:35:51.642830 <30>[ 12.316055] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6477 11:35:51.654089 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6478 11:35:51.680822 <30>[ 12.354225] systemd[1]: Starting systemd-journald.service - Journal Service...
6479 11:35:51.693223 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6480 11:35:51.750447 <30>[ 12.423798] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6481 11:35:51.761820 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6482 11:35:51.785426 <30>[ 12.455597] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6483 11:35:51.796440 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6484 11:35:51.816868 <30>[ 12.490438] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6485 11:35:51.829405 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6486 11:35:51.849889 <30>[ 12.522591] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6487 11:35:51.856585 <3>[ 12.528457] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6488 11:35:51.875678 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices..<3>[ 12.548549] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6489 11:35:51.875820 .
6490 11:35:51.895773 <3>[ 12.568787] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6491 11:35:51.903105 <30>[ 12.573449] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6492 11:35:51.909792 <3>[ 12.583157] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6493 11:35:51.923413 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6494 11:35:51.929812 <3>[ 12.603263] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6495 11:35:51.941190 <30>[ 12.612573] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6496 11:35:51.947510 <3>[ 12.620359] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6497 11:35:51.961101 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6498 11:35:51.968025 <3>[ 12.641873] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6499 11:35:51.979360 <30>[ 12.651809] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6500 11:35:51.986327 <3>[ 12.658791] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6501 11:35:51.999379 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6502 11:35:52.022479 <30>[ 12.695625] systemd[1]: Started systemd-journald.service - Journal Service.
6503 11:35:52.032214 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6504 11:35:52.058836 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6505 11:35:52.081009 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6506 11:35:52.100771 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6507 11:35:52.124978 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6508 11:35:52.148615 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6509 11:35:52.168657 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6510 11:35:52.192447 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6511 11:35:52.210790 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6512 11:35:52.234858 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6513 11:35:52.258939 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6514 11:35:52.283071 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6515 11:35:52.326733 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6516 11:35:52.348903 <4>[ 13.015216] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6517 11:35:52.359446 <3>[ 13.032985] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6518 11:35:52.366274 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6519 11:35:52.392235 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6520 11:35:52.419515 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6521 11:35:52.448474 <46>[ 13.121902] systemd-journald[317]: Received client request to flush runtime journal.
6522 11:35:52.478947 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6523 11:35:52.703146 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6524 11:35:53.048677 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6525 11:35:53.068728 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6526 11:35:53.088067 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6527 11:35:53.109101 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6528 11:35:53.566151 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6529 11:35:53.891009 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6530 11:35:53.911426 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6531 11:35:53.954547 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6532 11:35:54.046680 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6533 11:35:54.066589 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6534 11:35:54.086082 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6535 11:35:54.131093 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6536 11:35:54.160756 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6537 11:35:54.414072 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6538 11:35:54.478093 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6539 11:35:54.496304 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6540 11:35:54.557483 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6541 11:35:54.680181 <4>[ 15.356237] power_supply_show_property: 4 callbacks suppressed
6542 11:35:54.691353 <3>[ 15.356252] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6543 11:35:54.707568 <3>[ 15.380571] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6544 11:35:54.722423 <3>[ 15.395459] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6545 11:35:54.737334 <3>[ 15.410244] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6546 11:35:54.753219 <3>[ 15.426284] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6547 11:35:54.770482 <3>[ 15.443085] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6548 11:35:54.784904 <3>[ 15.457869] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6549 11:35:54.802023 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/system<3>[ 15.472807] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6550 11:35:54.802164 d-backlight.
6551 11:35:54.815740 <3>[ 15.488448] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6552 11:35:54.832426 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Sup<3>[ 15.503170] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6553 11:35:54.832564 port.
6554 11:35:54.850489 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6555 11:35:54.882678 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6556 11:35:54.931817 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6557 11:35:54.959854 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6558 11:35:54.986246 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6559 11:35:55.015249 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6560 11:35:55.144308 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6561 11:35:55.208043 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6562 11:35:55.233752 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6563 11:35:55.262982 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6564 11:35:55.296637 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6565 11:35:55.317574 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6566 11:35:55.341549 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6567 11:35:55.362801 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6568 11:35:55.386962 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6569 11:35:55.409785 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6570 11:35:55.427592 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6571 11:35:55.448944 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6572 11:35:55.472522 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6573 11:35:55.529602 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6574 11:35:55.548737 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6575 11:35:55.566696 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6576 11:35:55.584787 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6577 11:35:55.605044 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6578 11:35:55.622128 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6579 11:35:55.638126 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6580 11:35:55.656109 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6581 11:35:55.674182 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6582 11:35:55.696640 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6583 11:35:55.738781 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6584 11:35:55.764438 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6585 11:35:55.839057 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6586 11:35:55.945238 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6587 11:35:55.974362 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6588 11:35:55.998320 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6589 11:35:56.020095 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6590 11:35:56.076258 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6591 11:35:56.130427 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6592 11:35:56.157198 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6593 11:35:56.178395 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6594 11:35:56.218221 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6595 11:35:56.255635 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6596 11:35:56.302261 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6597 11:35:56.327138 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6598 11:35:56.346144 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6599 11:35:56.399480 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6600 11:35:56.460512 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6601 11:35:56.559949
6602 11:35:56.562754 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6603 11:35:56.562865
6604 11:35:56.566027 debian-bookworm-arm64 login: root (automatic login)
6605 11:35:56.566134
6606 11:35:56.882099 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Wed Jul 17 11:18:13 UTC 2024 aarch64
6607 11:35:56.882262
6608 11:35:56.888432 The programs included with the Debian GNU/Linux system are free software;
6609 11:35:56.895176 the exact distribution terms for each program are described in the
6610 11:35:56.898652 individual files in /usr/share/doc/*/copyright.
6611 11:35:56.898755
6612 11:35:56.905055 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6613 11:35:56.908474 permitted by applicable law.
6614 11:35:57.983911 Matched prompt #10: / #
6616 11:35:57.984183 Setting prompt string to ['/ #']
6617 11:35:57.984286 end: 2.2.5.1 login-action (duration 00:00:19) [common]
6619 11:35:57.984492 end: 2.2.5 auto-login-action (duration 00:00:19) [common]
6620 11:35:57.984593 start: 2.2.6 expect-shell-connection (timeout 00:03:47) [common]
6621 11:35:57.984665 Setting prompt string to ['/ #']
6622 11:35:57.984728 Forcing a shell prompt, looking for ['/ #']
6623 11:35:57.984789 Sending line: ''
6625 11:35:58.035159 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6626 11:35:58.035270 Waiting using forced prompt support (timeout 00:02:30)
6627 11:35:58.039600 / #
6628 11:35:58.039878 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6629 11:35:58.039982 start: 2.2.7 export-device-env (timeout 00:03:47) [common]
6630 11:35:58.040068 Sending line: "export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14864599/extract-nfsrootfs-r2yycohl'"
6632 11:35:58.145332 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14864599/extract-nfsrootfs-r2yycohl'
6633 11:35:58.145624 Sending line: "export NFS_SERVER_IP='192.168.201.1'"
6635 11:35:58.250985 / # export NFS_SERVER_IP='192.168.201.1'
6636 11:35:58.251305 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6637 11:35:58.251466 end: 2.2 depthcharge-retry (duration 00:01:14) [common]
6638 11:35:58.251566 end: 2 depthcharge-action (duration 00:01:14) [common]
6639 11:35:58.251672 start: 3 lava-test-retry (timeout 00:08:03) [common]
6640 11:35:58.251764 start: 3.1 lava-test-shell (timeout 00:08:03) [common]
6641 11:35:58.251838 Using namespace: common
6642 11:35:58.251923 Sending line: '#'
6644 11:35:58.352364 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6645 11:35:58.357251 / # #
6646 11:35:58.357551 Using /lava-14864599
6647 11:35:58.357651 Sending line: 'export SHELL=/bin/bash'
6649 11:35:58.463078 / # export SHELL=/bin/bash
6650 11:35:58.463370 Sending line: '. /lava-14864599/environment'
6652 11:35:58.568691 / # . /lava-14864599/environment
6653 11:35:58.574274 Sending line: '/lava-14864599/bin/lava-test-runner /lava-14864599/0'
6655 11:35:58.674764 Test shell timeout: 10s (minimum of the action and connection timeout)
6656 11:35:58.680031 / # /lava-14864599/bin/lava-test-runner /lava-14864599/0
6657 11:35:58.924107 + export TESTRUN_ID=0_timesync-off
6658 11:35:58.927343 + TESTRUN_ID=0_timesync-off
6659 11:35:58.930826 + cd /lava-14864599/0/tests/0_timesync-off
6660 11:35:58.933757 ++ cat uuid
6661 11:35:58.937289 + UUID=14864599_1.6.2.3.1
6662 11:35:58.937414 + set +x
6663 11:35:58.943648 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14864599_1.6.2.3.1>
6664 11:35:58.943952 Received signal: <STARTRUN> 0_timesync-off 14864599_1.6.2.3.1
6665 11:35:58.944066 Starting test lava.0_timesync-off (14864599_1.6.2.3.1)
6666 11:35:58.944193 Skipping test definition patterns.
6667 11:35:58.946950 + systemctl stop systemd-timesyncd
6668 11:35:59.002841 + set +x
6669 11:35:59.006181 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14864599_1.6.2.3.1>
6670 11:35:59.006459 Received signal: <ENDRUN> 0_timesync-off 14864599_1.6.2.3.1
6671 11:35:59.006545 Ending use of test pattern.
6672 11:35:59.006609 Ending test lava.0_timesync-off (14864599_1.6.2.3.1), duration 0.06
6674 11:35:59.075353 + export TESTRUN_ID=1_kselftest-tpm2
6675 11:35:59.075521 + TESTRUN_ID=1_kselftest-tpm2
6676 11:35:59.081596 + cd /lava-14864599/0/tests/1_kselftest-tpm2
6677 11:35:59.081705 ++ cat uuid
6678 11:35:59.085266 + UUID=14864599_1.6.2.3.5
6679 11:35:59.085393 + set +x
6680 11:35:59.091896 <LAVA_SIGNAL_STARTRUN 1_kselftest-tpm2 14864599_1.6.2.3.5>
6681 11:35:59.092182 Received signal: <STARTRUN> 1_kselftest-tpm2 14864599_1.6.2.3.5
6682 11:35:59.092264 Starting test lava.1_kselftest-tpm2 (14864599_1.6.2.3.5)
6683 11:35:59.092370 Skipping test definition patterns.
6684 11:35:59.094898 + cd ./automated/linux/kselftest/
6685 11:35:59.124141 + ./kselftest.sh -c tpm2 -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip-gitlab -e '' -p /opt/kselftests/mainline/ -n 1 -i 1 -E ''
6686 11:35:59.156462 INFO: install_deps skipped
6687 11:35:59.678609 --2024-07-17 11:35:59-- http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz
6688 11:35:59.691372 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6689 11:35:59.820726 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6690 11:35:59.950333 HTTP request sent, awaiting response... 200 OK
6691 11:35:59.953265 Length: 1920476 (1.8M) [application/octet-stream]
6692 11:35:59.956627 Saving to: 'kselftest_armhf.tar.gz'
6693 11:35:59.956717
6694 11:35:59.956803
6695 11:36:00.208436 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6696 11:36:00.468432 kselftest_armhf.tar 2%[ ] 43.57K 171KB/s
6697 11:36:00.893441 kselftest_armhf.tar 11%[=> ] 213.25K 417KB/s
6698 11:36:01.012287 kselftest_armhf.tar 34%[=====> ] 651.61K 700KB/s
6699 11:36:01.018551 kselftest_armhf.tar 100%[===================>] 1.83M 1.75MB/s in 1.0s
6700 11:36:01.018648
6701 11:36:01.187257 2024-07-17 11:36:01 (1.75 MB/s) - 'kselftest_armhf.tar.gz' saved [1920476/1920476]
6702 11:36:01.187433
6703 11:36:07.973260 skiplist:
6704 11:36:07.976636 ========================================
6705 11:36:07.979994 ========================================
6706 11:36:08.024253 tpm2:test_smoke.sh
6707 11:36:08.027173 tpm2:test_space.sh
6708 11:36:08.043292 ============== Tests to run ===============
6709 11:36:08.043396 tpm2:test_smoke.sh
6710 11:36:08.046251 tpm2:test_space.sh
6711 11:36:08.049776 ===========End Tests to run ===============
6712 11:36:08.053171 shardfile-tpm2 pass
6713 11:36:08.150946 <12>[ 28.827305] kselftest: Running tests in tpm2
6714 11:36:08.160306 TAP version 13
6715 11:36:08.174808 1..2
6716 11:36:08.208659 # selftests: tpm2: test_smoke.sh
6717 11:36:10.071065 # test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite) ... ERROR
6718 11:36:10.077331 # test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp) ... ERROR
6719 11:36:10.084147 # Exception ignored in: <function Client.__del__ at 0xffff8eadccc0>
6720 11:36:10.087088 # Traceback (most recent call last):
6721 11:36:10.097237 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6722 11:36:10.097665 # if self.tpm:
6723 11:36:10.100733 # ^^^^^^^^
6724 11:36:10.103848 # AttributeError: 'Client' object has no attribute 'tpm'
6725 11:36:10.110635 # test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth) ... ERROR
6726 11:36:10.117192 # Exception ignored in: <function Client.__del__ at 0xffff8eadccc0>
6727 11:36:10.120479 # Traceback (most recent call last):
6728 11:36:10.130311 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6729 11:36:10.133486 # if self.tpm:
6730 11:36:10.133872 # ^^^^^^^^
6731 11:36:10.140374 # AttributeError: 'Client' object has no attribute 'tpm'
6732 11:36:10.146881 # test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy) ... ERROR
6733 11:36:10.153226 # Exception ignored in: <function Client.__del__ at 0xffff8eadccc0>
6734 11:36:10.156445 # Traceback (most recent call last):
6735 11:36:10.166361 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6736 11:36:10.166904 # if self.tpm:
6737 11:36:10.169723 # ^^^^^^^^
6738 11:36:10.172961 # AttributeError: 'Client' object has no attribute 'tpm'
6739 11:36:10.182966 # test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth) ... ERROR
6740 11:36:10.189098 # Exception ignored in: <function Client.__del__ at 0xffff8eadccc0>
6741 11:36:10.192480 # Traceback (most recent call last):
6742 11:36:10.202793 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6743 11:36:10.203401 # if self.tpm:
6744 11:36:10.205568 # ^^^^^^^^
6745 11:36:10.208946 # AttributeError: 'Client' object has no attribute 'tpm'
6746 11:36:10.215273 # test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds) ... ERROR
6747 11:36:10.222068 # Exception ignored in: <function Client.__del__ at 0xffff8eadccc0>
6748 11:36:10.225393 # Traceback (most recent call last):
6749 11:36:10.234922 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6750 11:36:10.238448 # if self.tpm:
6751 11:36:10.238627 # ^^^^^^^^
6752 11:36:10.244790 # AttributeError: 'Client' object has no attribute 'tpm'
6753 11:36:10.251175 # test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd) ... ERROR
6754 11:36:10.254551 # Exception ignored in: <function Client.__del__ at 0xffff8eadccc0>
6755 11:36:10.257891 # Traceback (most recent call last):
6756 11:36:10.270980 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6757 11:36:10.271129 # if self.tpm:
6758 11:36:10.274306 # ^^^^^^^^
6759 11:36:10.277346 # AttributeError: 'Client' object has no attribute 'tpm'
6760 11:36:10.287308 # test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth) ... ERROR
6761 11:36:10.290643 # Exception ignored in: <function Client.__del__ at 0xffff8eadccc0>
6762 11:36:10.293806 # Traceback (most recent call last):
6763 11:36:10.303738 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6764 11:36:10.307053 # if self.tpm:
6765 11:36:10.310369 # ^^^^^^^^
6766 11:36:10.313350 # AttributeError: 'Client' object has no attribute 'tpm'
6767 11:36:10.323295 # test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy) ... ERROR
6768 11:36:10.326425 # Exception ignored in: <function Client.__del__ at 0xffff8eadccc0>
6769 11:36:10.333226 # Traceback (most recent call last):
6770 11:36:10.339632 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 375, in __del__
6771 11:36:10.342954 # if self.tpm:
6772 11:36:10.346307 # ^^^^^^^^
6773 11:36:10.349646 # AttributeError: 'Client' object has no attribute 'tpm'
6774 11:36:10.349727 #
6775 11:36:10.356352 # ======================================================================
6776 11:36:10.365978 # ERROR: test_read_partial_overwrite (tpm2_tests.SmokeTest.test_read_partial_overwrite)
6777 11:36:10.372826 # ----------------------------------------------------------------------
6778 11:36:10.375762 # Traceback (most recent call last):
6779 11:36:10.385589 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 16, in setUp
6780 11:36:10.388880 # self.root_key = self.client.create_root_key()
6781 11:36:10.392314 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6782 11:36:10.405128 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6783 11:36:10.408441 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6784 11:36:10.415054 # ^^^^^^^^^^^^^^^^^^
6785 11:36:10.424945 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6786 11:36:10.428106 # raise ProtocolError(cc, rc)
6787 11:36:10.434621 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6788 11:36:10.434737 #
6789 11:36:10.441166 # ======================================================================
6790 11:36:10.447585 # ERROR: test_read_partial_resp (tpm2_tests.SmokeTest.test_read_partial_resp)
6791 11:36:10.454553 # ----------------------------------------------------------------------
6792 11:36:10.457569 # Traceback (most recent call last):
6793 11:36:10.467423 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6794 11:36:10.470733 # self.client = tpm2.Client()
6795 11:36:10.474217 # ^^^^^^^^^^^^^
6796 11:36:10.484043 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6797 11:36:10.487122 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6798 11:36:10.493916 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6799 11:36:10.500222 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6800 11:36:10.500313 #
6801 11:36:10.507285 # ======================================================================
6802 11:36:10.514144 # ERROR: test_seal_with_auth (tpm2_tests.SmokeTest.test_seal_with_auth)
6803 11:36:10.520584 # ----------------------------------------------------------------------
6804 11:36:10.523743 # Traceback (most recent call last):
6805 11:36:10.534251 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6806 11:36:10.537149 # self.client = tpm2.Client()
6807 11:36:10.537237 # ^^^^^^^^^^^^^
6808 11:36:10.550459 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6809 11:36:10.553803 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6810 11:36:10.556779 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6811 11:36:10.563613 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6812 11:36:10.563696 #
6813 11:36:10.570205 # ======================================================================
6814 11:36:10.576984 # ERROR: test_seal_with_policy (tpm2_tests.SmokeTest.test_seal_with_policy)
6815 11:36:10.583294 # ----------------------------------------------------------------------
6816 11:36:10.586738 # Traceback (most recent call last):
6817 11:36:10.596503 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6818 11:36:10.599733 # self.client = tpm2.Client()
6819 11:36:10.603179 # ^^^^^^^^^^^^^
6820 11:36:10.613018 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6821 11:36:10.619529 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6822 11:36:10.622506 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6823 11:36:10.629086 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6824 11:36:10.629201 #
6825 11:36:10.635817 # ======================================================================
6826 11:36:10.642309 # ERROR: test_seal_with_too_long_auth (tpm2_tests.SmokeTest.test_seal_with_too_long_auth)
6827 11:36:10.649023 # ----------------------------------------------------------------------
6828 11:36:10.652338 # Traceback (most recent call last):
6829 11:36:10.662459 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6830 11:36:10.665482 # self.client = tpm2.Client()
6831 11:36:10.668835 # ^^^^^^^^^^^^^
6832 11:36:10.678504 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6833 11:36:10.685181 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6834 11:36:10.688234 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6835 11:36:10.694797 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6836 11:36:10.694906 #
6837 11:36:10.701603 # ======================================================================
6838 11:36:10.708178 # ERROR: test_send_two_cmds (tpm2_tests.SmokeTest.test_send_two_cmds)
6839 11:36:10.714676 # ----------------------------------------------------------------------
6840 11:36:10.718165 # Traceback (most recent call last):
6841 11:36:10.727640 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6842 11:36:10.730867 # self.client = tpm2.Client()
6843 11:36:10.734240 # ^^^^^^^^^^^^^
6844 11:36:10.743813 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6845 11:36:10.747345 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6846 11:36:10.753791 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6847 11:36:10.756936 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6848 11:36:10.757021 #
6849 11:36:10.763746 # ======================================================================
6850 11:36:10.770149 # ERROR: test_too_short_cmd (tpm2_tests.SmokeTest.test_too_short_cmd)
6851 11:36:10.776911 # ----------------------------------------------------------------------
6852 11:36:10.780238 # Traceback (most recent call last):
6853 11:36:10.789947 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6854 11:36:10.793445 # self.client = tpm2.Client()
6855 11:36:10.796438 # ^^^^^^^^^^^^^
6856 11:36:10.806262 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6857 11:36:10.812776 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6858 11:36:10.816076 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6859 11:36:10.823263 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6860 11:36:10.823348 #
6861 11:36:10.829823 # ======================================================================
6862 11:36:10.836057 # ERROR: test_unseal_with_wrong_auth (tpm2_tests.SmokeTest.test_unseal_with_wrong_auth)
6863 11:36:10.842700 # ----------------------------------------------------------------------
6864 11:36:10.845824 # Traceback (most recent call last):
6865 11:36:10.855631 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6866 11:36:10.859116 # self.client = tpm2.Client()
6867 11:36:10.862299 # ^^^^^^^^^^^^^
6868 11:36:10.872240 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6869 11:36:10.878665 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6870 11:36:10.881928 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6871 11:36:10.888425 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6872 11:36:10.888510 #
6873 11:36:10.894906 # ======================================================================
6874 11:36:10.901357 # ERROR: test_unseal_with_wrong_policy (tpm2_tests.SmokeTest.test_unseal_with_wrong_policy)
6875 11:36:10.908068 # ----------------------------------------------------------------------
6876 11:36:10.911484 # Traceback (most recent call last):
6877 11:36:10.921039 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 15, in setUp
6878 11:36:10.924309 # self.client = tpm2.Client()
6879 11:36:10.927652 # ^^^^^^^^^^^^^
6880 11:36:10.938107 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 364, in __init__
6881 11:36:10.945586 # self.tpm = open('/dev/tpm0', 'r+b', buffering=0)
6882 11:36:10.949000 # ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
6883 11:36:10.955705 # OSError: [Errno 16] Device or resource busy: '/dev/tpm0'
6884 11:36:10.955791 #
6885 11:36:10.960299 # ----------------------------------------------------------------------
6886 11:36:10.963428 # Ran 9 tests in 0.062s
6887 11:36:10.963523 #
6888 11:36:10.963589 # FAILED (errors=9)
6889 11:36:10.970163 # test_async (tpm2_tests.AsyncTest.test_async) ... ok
6890 11:36:10.979328 # test_flush_invalid_context (tpm2_tests.AsyncTest.test_flush_invalid_context) ... ok
6891 11:36:10.979439 #
6892 11:36:10.985646 # ----------------------------------------------------------------------
6893 11:36:10.985731 # Ran 2 tests in 0.040s
6894 11:36:10.985798 #
6895 11:36:10.985859 # OK
6896 11:36:10.989935 ok 1 selftests: tpm2: test_smoke.sh
6897 11:36:10.993267 # selftests: tpm2: test_space.sh
6898 11:36:11.001571 # test_flush_context (tpm2_tests.SpaceTest.test_flush_context) ... ERROR
6899 11:36:11.005011 # test_get_handles (tpm2_tests.SpaceTest.test_get_handles) ... ERROR
6900 11:36:11.011599 # test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc) ... ERROR
6901 11:36:11.018177 # test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces) ... ERROR
6902 11:36:11.018286 #
6903 11:36:11.024718 # ======================================================================
6904 11:36:11.031132 # ERROR: test_flush_context (tpm2_tests.SpaceTest.test_flush_context)
6905 11:36:11.037962 # ----------------------------------------------------------------------
6906 11:36:11.041295 # Traceback (most recent call last):
6907 11:36:11.054481 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 261, in test_flush_context
6908 11:36:11.057521 # root1 = space1.create_root_key()
6909 11:36:11.060990 # ^^^^^^^^^^^^^^^^^^^^^^^^
6910 11:36:11.070816 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6911 11:36:11.077447 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6912 11:36:11.080527 # ^^^^^^^^^^^^^^^^^^
6913 11:36:11.090227 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6914 11:36:11.093602 # raise ProtocolError(cc, rc)
6915 11:36:11.100159 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6916 11:36:11.100262 #
6917 11:36:11.106633 # ======================================================================
6918 11:36:11.113414 # ERROR: test_get_handles (tpm2_tests.SpaceTest.test_get_handles)
6919 11:36:11.120036 # ----------------------------------------------------------------------
6920 11:36:11.123314 # Traceback (most recent call last):
6921 11:36:11.132932 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 271, in test_get_handles
6922 11:36:11.136340 # space1.create_root_key()
6923 11:36:11.146020 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6924 11:36:11.152765 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6925 11:36:11.156064 # ^^^^^^^^^^^^^^^^^^
6926 11:36:11.165699 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6927 11:36:11.169139 # raise ProtocolError(cc, rc)
6928 11:36:11.175770 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6929 11:36:11.175851 #
6930 11:36:11.182366 # ======================================================================
6931 11:36:11.188703 # ERROR: test_invalid_cc (tpm2_tests.SpaceTest.test_invalid_cc)
6932 11:36:11.195447 # ----------------------------------------------------------------------
6933 11:36:11.198842 # Traceback (most recent call last):
6934 11:36:11.208506 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 290, in test_invalid_cc
6935 11:36:11.211678 # root1 = space1.create_root_key()
6936 11:36:11.215147 # ^^^^^^^^^^^^^^^^^^^^^^^^
6937 11:36:11.228131 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6938 11:36:11.231858 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6939 11:36:11.237984 # ^^^^^^^^^^^^^^^^^^
6940 11:36:11.247750 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6941 11:36:11.250866 # raise ProtocolError(cc, rc)
6942 11:36:11.257497 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6943 11:36:11.257579 #
6944 11:36:11.264298 # ======================================================================
6945 11:36:11.271077 # ERROR: test_make_two_spaces (tpm2_tests.SpaceTest.test_make_two_spaces)
6946 11:36:11.277323 # ----------------------------------------------------------------------
6947 11:36:11.280620 # Traceback (most recent call last):
6948 11:36:11.290627 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2_tests.py", line 247, in test_make_two_spaces
6949 11:36:11.293748 # root1 = space1.create_root_key()
6950 11:36:11.297062 # ^^^^^^^^^^^^^^^^^^^^^^^^
6951 11:36:11.310149 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 587, in create_root_key
6952 11:36:11.313271 # return struct.unpack('>I', self.send_cmd(cmd)[10:14])[0]
6953 11:36:11.319914 # ^^^^^^^^^^^^^^^^^^
6954 11:36:11.329828 # File "/lava-14864599/0/tests/1_kselftest-tpm2/automated/linux/kselftest/tpm2/tpm2.py", line 402, in send_cmd
6955 11:36:11.332967 # raise ProtocolError(cc, rc)
6956 11:36:11.339473 # tpm2.ProtocolError: TPM_RC_BAD_AUTH: cc=0x00000131, rc=0x000009a2
6957 11:36:11.339558 #
6958 11:36:11.346065 # ----------------------------------------------------------------------
6959 11:36:11.346152 # Ran 4 tests in 0.078s
6960 11:36:11.346218 #
6961 11:36:11.349497 # FAILED (errors=4)
6962 11:36:11.352762 not ok 2 selftests: tpm2: test_space.sh # exit=1
6963 11:36:11.677750 tpm2_test_smoke_sh pass
6964 11:36:11.680880 tpm2_test_space_sh fail
6965 11:36:11.765156 + ../../utils/send-to-lava.sh ./output/result.txt
6966 11:36:11.823172 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-tpm2 RESULT=pass>
6967 11:36:11.823483 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-tpm2 RESULT=pass
6969 11:36:11.866064 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass>
6970 11:36:11.866328 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_smoke_sh RESULT=pass
6972 11:36:11.911106 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=tpm2_test_space_sh RESULT=fail>
6973 11:36:11.911372 Received signal: <TESTCASE> TEST_CASE_ID=tpm2_test_space_sh RESULT=fail
6975 11:36:11.914471 + set +x
6976 11:36:11.917872 <LAVA_SIGNAL_ENDRUN 1_kselftest-tpm2 14864599_1.6.2.3.5>
6977 11:36:11.918128 Received signal: <ENDRUN> 1_kselftest-tpm2 14864599_1.6.2.3.5
6978 11:36:11.918205 Ending use of test pattern.
6979 11:36:11.918267 Ending test lava.1_kselftest-tpm2 (14864599_1.6.2.3.5), duration 12.83
6981 11:36:11.921174 <LAVA_TEST_RUNNER EXIT>
6982 11:36:11.921451 ok: lava_test_shell seems to have completed
6983 11:36:11.921561 shardfile-tpm2: pass
tpm2_test_smoke_sh: pass
tpm2_test_space_sh: fail
6984 11:36:11.921651 end: 3.1 lava-test-shell (duration 00:00:14) [common]
6985 11:36:11.921736 end: 3 lava-test-retry (duration 00:00:14) [common]
6986 11:36:11.921827 start: 4 finalize (timeout 00:07:49) [common]
6987 11:36:11.921915 start: 4.1 power-off (timeout 00:00:30) [common]
6988 11:36:11.922051 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-2', '--port=1', '--command=off']
6989 11:36:13.997712 >> Command sent successfully.
6990 11:36:14.011338 Returned 0 in 2 seconds
6991 11:36:14.011942 end: 4.1 power-off (duration 00:00:02) [common]
6993 11:36:14.013164 start: 4.2 read-feedback (timeout 00:07:47) [common]
6994 11:36:14.013791 Listened to connection for namespace 'common' for up to 1s
6995 11:36:15.014854 Finalising connection for namespace 'common'
6996 11:36:15.015335 Disconnecting from shell: Finalise
6997 11:36:15.015716 / #
6998 11:36:15.116448 end: 4.2 read-feedback (duration 00:00:01) [common]
6999 11:36:15.117008 end: 4 finalize (duration 00:00:03) [common]
7000 11:36:15.117683 Cleaning after the job
7001 11:36:15.118186 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/ramdisk
7002 11:36:15.128182 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/kernel
7003 11:36:15.160326 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/dtb
7004 11:36:15.160664 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/nfsrootfs
7005 11:36:15.230185 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864599/tftp-deploy-fih12593/modules
7006 11:36:15.235930 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14864599
7007 11:36:15.876714 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14864599
7008 11:36:15.876873 Job finished correctly