Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 39
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 84
1 11:31:24.655760 lava-dispatcher, installed at version: 2024.05
2 11:31:24.655962 start: 0 validate
3 11:31:24.656078 Start time: 2024-07-17 11:31:24.656073+00:00 (UTC)
4 11:31:24.656213 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:31:24.656358 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-cros-ec%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 11:31:24.916631 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:31:24.916794 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.96-cip24-23-gd25f4b93e0db9%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 11:31:25.175462 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:31:25.176518 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.96-cip24-23-gd25f4b93e0db9%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 11:31:52.317153 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:31:52.317857 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.96-cip24-23-gd25f4b93e0db9%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
12 11:31:52.839243 validate duration: 28.18
14 11:31:52.840423 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 11:31:52.840897 start: 1.1 download-retry (timeout 00:10:00) [common]
16 11:31:52.841359 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 11:31:52.842018 Not decompressing ramdisk as can be used compressed.
18 11:31:52.842444 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-cros-ec/20240313.0/arm64/rootfs.cpio.gz
19 11:31:52.842750 saving as /var/lib/lava/dispatcher/tmp/14864595/tftp-deploy-ebab05c9/ramdisk/rootfs.cpio.gz
20 11:31:52.843053 total size: 39026414 (37 MB)
21 11:31:56.158915 progress 0 % (0 MB)
22 11:31:56.198807 progress 5 % (1 MB)
23 11:31:56.214775 progress 10 % (3 MB)
24 11:31:56.226137 progress 15 % (5 MB)
25 11:31:56.235765 progress 20 % (7 MB)
26 11:31:56.245031 progress 25 % (9 MB)
27 11:31:56.254311 progress 30 % (11 MB)
28 11:31:56.263562 progress 35 % (13 MB)
29 11:31:56.272929 progress 40 % (14 MB)
30 11:31:56.282557 progress 45 % (16 MB)
31 11:31:56.292575 progress 50 % (18 MB)
32 11:31:56.302160 progress 55 % (20 MB)
33 11:31:56.311423 progress 60 % (22 MB)
34 11:31:56.320770 progress 65 % (24 MB)
35 11:31:56.330256 progress 70 % (26 MB)
36 11:31:56.339611 progress 75 % (27 MB)
37 11:31:56.348861 progress 80 % (29 MB)
38 11:31:56.358374 progress 85 % (31 MB)
39 11:31:56.367829 progress 90 % (33 MB)
40 11:31:56.377557 progress 95 % (35 MB)
41 11:31:56.386819 progress 100 % (37 MB)
42 11:31:56.387070 37 MB downloaded in 3.54 s (10.50 MB/s)
43 11:31:56.387225 end: 1.1.1 http-download (duration 00:00:04) [common]
45 11:31:56.387453 end: 1.1 download-retry (duration 00:00:04) [common]
46 11:31:56.387534 start: 1.2 download-retry (timeout 00:09:56) [common]
47 11:31:56.387609 start: 1.2.1 http-download (timeout 00:09:56) [common]
48 11:31:56.387743 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
49 11:31:56.387807 saving as /var/lib/lava/dispatcher/tmp/14864595/tftp-deploy-ebab05c9/kernel/Image
50 11:31:56.387864 total size: 54813184 (52 MB)
51 11:31:56.387919 No compression specified
52 11:31:56.388961 progress 0 % (0 MB)
53 11:31:56.402180 progress 5 % (2 MB)
54 11:31:56.415481 progress 10 % (5 MB)
55 11:31:56.428676 progress 15 % (7 MB)
56 11:31:56.441882 progress 20 % (10 MB)
57 11:31:56.455563 progress 25 % (13 MB)
58 11:31:56.468683 progress 30 % (15 MB)
59 11:31:56.482390 progress 35 % (18 MB)
60 11:31:56.496674 progress 40 % (20 MB)
61 11:31:56.510455 progress 45 % (23 MB)
62 11:31:56.524093 progress 50 % (26 MB)
63 11:31:56.538148 progress 55 % (28 MB)
64 11:31:56.551690 progress 60 % (31 MB)
65 11:31:56.565458 progress 65 % (34 MB)
66 11:31:56.579195 progress 70 % (36 MB)
67 11:31:56.592935 progress 75 % (39 MB)
68 11:31:56.607027 progress 80 % (41 MB)
69 11:31:56.620425 progress 85 % (44 MB)
70 11:31:56.633945 progress 90 % (47 MB)
71 11:31:56.647333 progress 95 % (49 MB)
72 11:31:56.660479 progress 100 % (52 MB)
73 11:31:56.660724 52 MB downloaded in 0.27 s (191.58 MB/s)
74 11:31:56.660880 end: 1.2.1 http-download (duration 00:00:00) [common]
76 11:31:56.661090 end: 1.2 download-retry (duration 00:00:00) [common]
77 11:31:56.661172 start: 1.3 download-retry (timeout 00:09:56) [common]
78 11:31:56.661271 start: 1.3.1 http-download (timeout 00:09:56) [common]
79 11:31:56.661409 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
80 11:31:56.661474 saving as /var/lib/lava/dispatcher/tmp/14864595/tftp-deploy-ebab05c9/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
81 11:31:56.661528 total size: 57695 (0 MB)
82 11:31:56.661581 No compression specified
83 11:31:56.662649 progress 56 % (0 MB)
84 11:31:56.662905 progress 100 % (0 MB)
85 11:31:56.663091 0 MB downloaded in 0.00 s (35.25 MB/s)
86 11:31:56.663205 end: 1.3.1 http-download (duration 00:00:00) [common]
88 11:31:56.663408 end: 1.3 download-retry (duration 00:00:00) [common]
89 11:31:56.663485 start: 1.4 download-retry (timeout 00:09:56) [common]
90 11:31:56.663560 start: 1.4.1 http-download (timeout 00:09:56) [common]
91 11:31:56.663667 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
92 11:31:56.663730 saving as /var/lib/lava/dispatcher/tmp/14864595/tftp-deploy-ebab05c9/modules/modules.tar
93 11:31:56.663783 total size: 8610184 (8 MB)
94 11:31:56.663837 Using unxz to decompress xz
95 11:31:56.665374 progress 0 % (0 MB)
96 11:31:56.685812 progress 5 % (0 MB)
97 11:31:56.710166 progress 10 % (0 MB)
98 11:31:56.733817 progress 15 % (1 MB)
99 11:31:56.757639 progress 20 % (1 MB)
100 11:31:56.782150 progress 25 % (2 MB)
101 11:31:56.806129 progress 30 % (2 MB)
102 11:31:56.828492 progress 35 % (2 MB)
103 11:31:56.854763 progress 40 % (3 MB)
104 11:31:56.879058 progress 45 % (3 MB)
105 11:31:56.902774 progress 50 % (4 MB)
106 11:31:56.928270 progress 55 % (4 MB)
107 11:31:56.953364 progress 60 % (4 MB)
108 11:31:56.977464 progress 65 % (5 MB)
109 11:31:57.003710 progress 70 % (5 MB)
110 11:31:57.031045 progress 75 % (6 MB)
111 11:31:57.057889 progress 80 % (6 MB)
112 11:31:57.081556 progress 85 % (7 MB)
113 11:31:57.105490 progress 90 % (7 MB)
114 11:31:57.129578 progress 95 % (7 MB)
115 11:31:57.153198 progress 100 % (8 MB)
116 11:31:57.158609 8 MB downloaded in 0.49 s (16.59 MB/s)
117 11:31:57.158774 end: 1.4.1 http-download (duration 00:00:00) [common]
119 11:31:57.158988 end: 1.4 download-retry (duration 00:00:00) [common]
120 11:31:57.159067 start: 1.5 prepare-tftp-overlay (timeout 00:09:56) [common]
121 11:31:57.159145 start: 1.5.1 extract-nfsrootfs (timeout 00:09:56) [common]
122 11:31:57.159215 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 11:31:57.159287 start: 1.5.2 lava-overlay (timeout 00:09:56) [common]
124 11:31:57.159551 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm
125 11:31:57.159669 makedir: /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin
126 11:31:57.159760 makedir: /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/tests
127 11:31:57.159847 makedir: /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/results
128 11:31:57.159931 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-add-keys
129 11:31:57.160057 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-add-sources
130 11:31:57.160171 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-background-process-start
131 11:31:57.160286 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-background-process-stop
132 11:31:57.160406 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-common-functions
133 11:31:57.160522 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-echo-ipv4
134 11:31:57.160633 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-install-packages
135 11:31:57.160743 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-installed-packages
136 11:31:57.160852 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-os-build
137 11:31:57.160961 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-probe-channel
138 11:31:57.161070 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-probe-ip
139 11:31:57.161180 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-target-ip
140 11:31:57.161333 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-target-mac
141 11:31:57.161443 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-target-storage
142 11:31:57.161554 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-test-case
143 11:31:57.161663 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-test-event
144 11:31:57.161771 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-test-feedback
145 11:31:57.161880 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-test-raise
146 11:31:57.161988 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-test-reference
147 11:31:57.162097 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-test-runner
148 11:31:57.162206 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-test-set
149 11:31:57.162315 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-test-shell
150 11:31:57.162425 Updating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-install-packages (oe)
151 11:31:57.162561 Updating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/bin/lava-installed-packages (oe)
152 11:31:57.162669 Creating /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/environment
153 11:31:57.162757 LAVA metadata
154 11:31:57.162819 - LAVA_JOB_ID=14864595
155 11:31:57.162874 - LAVA_DISPATCHER_IP=192.168.201.1
156 11:31:57.162961 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:56) [common]
157 11:31:57.163019 skipped lava-vland-overlay
158 11:31:57.163086 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
159 11:31:57.163155 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:56) [common]
160 11:31:57.163207 skipped lava-multinode-overlay
161 11:31:57.163270 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
162 11:31:57.163338 start: 1.5.2.3 test-definition (timeout 00:09:56) [common]
163 11:31:57.163402 Loading test definitions
164 11:31:57.163513 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:56) [common]
165 11:31:57.163572 Using /lava-14864595 at stage 0
166 11:31:57.163852 uuid=14864595_1.5.2.3.1 testdef=None
167 11:31:57.163931 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
168 11:31:57.164004 start: 1.5.2.3.2 test-overlay (timeout 00:09:56) [common]
169 11:31:57.164438 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
171 11:31:57.164669 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:56) [common]
172 11:31:57.165217 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
174 11:31:57.165466 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:56) [common]
175 11:31:57.166004 runner path: /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/0/tests/0_cros-ec test_uuid 14864595_1.5.2.3.1
176 11:31:57.166144 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
178 11:31:57.166332 Creating lava-test-runner.conf files
179 11:31:57.166387 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14864595/lava-overlay-r1x4efwm/lava-14864595/0 for stage 0
180 11:31:57.166466 - 0_cros-ec
181 11:31:57.166553 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
182 11:31:57.166626 start: 1.5.2.4 compress-overlay (timeout 00:09:56) [common]
183 11:31:57.172962 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
184 11:31:57.173066 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:56) [common]
185 11:31:57.173145 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
186 11:31:57.173237 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
187 11:31:57.173351 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:56) [common]
188 11:31:58.263684 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
189 11:31:58.263828 start: 1.5.4 extract-modules (timeout 00:09:55) [common]
190 11:31:58.263901 extracting modules file /var/lib/lava/dispatcher/tmp/14864595/tftp-deploy-ebab05c9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14864595/extract-overlay-ramdisk-to396ymd/ramdisk
191 11:31:58.491331 end: 1.5.4 extract-modules (duration 00:00:00) [common]
192 11:31:58.491470 start: 1.5.5 apply-overlay-tftp (timeout 00:09:54) [common]
193 11:31:58.491556 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14864595/compress-overlay-0vwan8c9/overlay-1.5.2.4.tar.gz to ramdisk
194 11:31:58.491616 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14864595/compress-overlay-0vwan8c9/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14864595/extract-overlay-ramdisk-to396ymd/ramdisk
195 11:31:58.498073 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
196 11:31:58.498169 start: 1.5.6 configure-preseed-file (timeout 00:09:54) [common]
197 11:31:58.498247 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
198 11:31:58.498352 start: 1.5.7 compress-ramdisk (timeout 00:09:54) [common]
199 11:31:58.498434 Building ramdisk /var/lib/lava/dispatcher/tmp/14864595/extract-overlay-ramdisk-to396ymd/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14864595/extract-overlay-ramdisk-to396ymd/ramdisk
200 11:31:59.213743 >> 335502 blocks
201 11:32:04.591466 rename /var/lib/lava/dispatcher/tmp/14864595/extract-overlay-ramdisk-to396ymd/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14864595/tftp-deploy-ebab05c9/ramdisk/ramdisk.cpio.gz
202 11:32:04.591637 end: 1.5.7 compress-ramdisk (duration 00:00:06) [common]
203 11:32:04.591725 start: 1.5.8 prepare-kernel (timeout 00:09:48) [common]
204 11:32:04.591821 start: 1.5.8.1 prepare-fit (timeout 00:09:48) [common]
205 11:32:04.591899 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14864595/tftp-deploy-ebab05c9/kernel/Image']
206 11:32:18.890464 Returned 0 in 14 seconds
207 11:32:18.890625 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14864595/tftp-deploy-ebab05c9/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14864595/tftp-deploy-ebab05c9/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14864595/tftp-deploy-ebab05c9/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14864595/tftp-deploy-ebab05c9/kernel/image.itb
208 11:32:19.630096 output: FIT description: Kernel Image image with one or more FDT blobs
209 11:32:19.630244 output: Created: Wed Jul 17 12:32:19 2024
210 11:32:19.630331 output: Image 0 (kernel-1)
211 11:32:19.630418 output: Description:
212 11:32:19.630498 output: Created: Wed Jul 17 12:32:19 2024
213 11:32:19.630582 output: Type: Kernel Image
214 11:32:19.630660 output: Compression: lzma compressed
215 11:32:19.630740 output: Data Size: 13118294 Bytes = 12810.83 KiB = 12.51 MiB
216 11:32:19.630818 output: Architecture: AArch64
217 11:32:19.630898 output: OS: Linux
218 11:32:19.630975 output: Load Address: 0x00000000
219 11:32:19.631053 output: Entry Point: 0x00000000
220 11:32:19.631130 output: Hash algo: crc32
221 11:32:19.631209 output: Hash value: 83448d17
222 11:32:19.631286 output: Image 1 (fdt-1)
223 11:32:19.631365 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
224 11:32:19.631443 output: Created: Wed Jul 17 12:32:19 2024
225 11:32:19.631520 output: Type: Flat Device Tree
226 11:32:19.631600 output: Compression: uncompressed
227 11:32:19.631675 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
228 11:32:19.631757 output: Architecture: AArch64
229 11:32:19.631833 output: Hash algo: crc32
230 11:32:19.631911 output: Hash value: a9713552
231 11:32:19.631986 output: Image 2 (ramdisk-1)
232 11:32:19.632065 output: Description: unavailable
233 11:32:19.632140 output: Created: Wed Jul 17 12:32:19 2024
234 11:32:19.632218 output: Type: RAMDisk Image
235 11:32:19.632293 output: Compression: uncompressed
236 11:32:19.632373 output: Data Size: 52133686 Bytes = 50911.80 KiB = 49.72 MiB
237 11:32:19.632450 output: Architecture: AArch64
238 11:32:19.632528 output: OS: Linux
239 11:32:19.632605 output: Load Address: unavailable
240 11:32:19.632681 output: Entry Point: unavailable
241 11:32:19.632761 output: Hash algo: crc32
242 11:32:19.632836 output: Hash value: 1ba7b1ea
243 11:32:19.632912 output: Default Configuration: 'conf-1'
244 11:32:19.632987 output: Configuration 0 (conf-1)
245 11:32:19.633067 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
246 11:32:19.633143 output: Kernel: kernel-1
247 11:32:19.633220 output: Init Ramdisk: ramdisk-1
248 11:32:19.633340 output: FDT: fdt-1
249 11:32:19.633420 output: Loadables: kernel-1
250 11:32:19.633496 output:
251 11:32:19.633632 end: 1.5.8.1 prepare-fit (duration 00:00:15) [common]
252 11:32:19.633737 end: 1.5.8 prepare-kernel (duration 00:00:15) [common]
253 11:32:19.633840 end: 1.5 prepare-tftp-overlay (duration 00:00:22) [common]
254 11:32:19.633945 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:33) [common]
255 11:32:19.634031 No LXC device requested
256 11:32:19.634133 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
257 11:32:19.634237 start: 1.7 deploy-device-env (timeout 00:09:33) [common]
258 11:32:19.634333 end: 1.7 deploy-device-env (duration 00:00:00) [common]
259 11:32:19.634420 Checking files for TFTP limit of 4294967296 bytes.
260 11:32:19.634826 end: 1 tftp-deploy (duration 00:00:27) [common]
261 11:32:19.634927 start: 2 depthcharge-action (timeout 00:05:00) [common]
262 11:32:19.635020 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
263 11:32:19.635130 substitutions:
264 11:32:19.635219 - {DTB}: 14864595/tftp-deploy-ebab05c9/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
265 11:32:19.635290 - {INITRD}: 14864595/tftp-deploy-ebab05c9/ramdisk/ramdisk.cpio.gz
266 11:32:19.635361 - {KERNEL}: 14864595/tftp-deploy-ebab05c9/kernel/Image
267 11:32:19.635448 - {LAVA_MAC}: None
268 11:32:19.635536 - {PRESEED_CONFIG}: None
269 11:32:19.635622 - {PRESEED_LOCAL}: None
270 11:32:19.635710 - {RAMDISK}: 14864595/tftp-deploy-ebab05c9/ramdisk/ramdisk.cpio.gz
271 11:32:19.635807 - {ROOT_PART}: None
272 11:32:19.635892 - {ROOT}: None
273 11:32:19.635977 - {SERVER_IP}: 192.168.201.1
274 11:32:19.636062 - {TEE}: None
275 11:32:19.636147 Parsed boot commands:
276 11:32:19.636230 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
277 11:32:19.636422 Parsed boot commands: tftpboot 192.168.201.1 14864595/tftp-deploy-ebab05c9/kernel/image.itb 14864595/tftp-deploy-ebab05c9/kernel/cmdline
278 11:32:19.636534 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
279 11:32:19.636645 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
280 11:32:19.636755 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
281 11:32:19.636863 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
282 11:32:19.636953 Not connected, no need to disconnect.
283 11:32:19.637059 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
284 11:32:19.637165 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
285 11:32:19.637294 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-5'
286 11:32:19.640243 Setting prompt string to ['lava-test: # ']
287 11:32:19.640561 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
288 11:32:19.640666 end: 2.2.1 reset-connection (duration 00:00:00) [common]
289 11:32:19.640767 start: 2.2.2 reset-device (timeout 00:05:00) [common]
290 11:32:19.640900 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
291 11:32:19.641109 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=reboot']
292 11:32:28.771510 >> Command sent successfully.
293 11:32:28.774890 Returned 0 in 9 seconds
294 11:32:28.775050 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
296 11:32:28.775284 end: 2.2.2 reset-device (duration 00:00:09) [common]
297 11:32:28.775384 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
298 11:32:28.775507 Setting prompt string to 'Starting depthcharge on Juniper...'
299 11:32:28.775611 Changing prompt to 'Starting depthcharge on Juniper...'
300 11:32:28.775712 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
301 11:32:28.776217 [Enter `^Ec?' for help]
302 11:32:35.329283 [DL] 00000000 00000000 010701
303 11:32:35.334148
304 11:32:35.334230
305 11:32:35.334308 F0: 102B 0000
306 11:32:35.334390
307 11:32:35.334463 F3: 1006 0033 [0200]
308 11:32:35.337547
309 11:32:35.337627 F3: 4001 00E0 [0200]
310 11:32:35.337708
311 11:32:35.337782 F3: 0000 0000
312 11:32:35.337874
313 11:32:35.340948 V0: 0000 0000 [0001]
314 11:32:35.341026
315 11:32:35.341114 00: 1027 0002
316 11:32:35.341203
317 11:32:35.344174 01: 0000 0000
318 11:32:35.344263
319 11:32:35.344333 BP: 0C00 0251 [0000]
320 11:32:35.344420
321 11:32:35.347941 G0: 1182 0000
322 11:32:35.348019
323 11:32:35.348098 EC: 0004 0000 [0001]
324 11:32:35.348171
325 11:32:35.350929 S7: 0000 0000 [0000]
326 11:32:35.351005
327 11:32:35.351080 CC: 0000 0000 [0001]
328 11:32:35.354580
329 11:32:35.354656 T0: 0000 00DB [000F]
330 11:32:35.354734
331 11:32:35.354835 Jump to BL
332 11:32:35.354905
333 11:32:35.390032
334 11:32:35.390127
335 11:32:35.396696 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
336 11:32:35.400149 ARM64: Exception handlers installed.
337 11:32:35.403500 ARM64: Testing exception
338 11:32:35.406680 ARM64: Done test exception
339 11:32:35.410226 WDT: Last reset was cold boot
340 11:32:35.413388 SPI0(PAD0) initialized at 992727 Hz
341 11:32:35.417092 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
342 11:32:35.417185 Manufacturer: ef
343 11:32:35.423852 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
344 11:32:35.436874 Probing TPM: . done!
345 11:32:35.436989 TPM ready after 0 ms
346 11:32:35.443622 Connected to device vid:did:rid of 1ae0:0028:00
347 11:32:35.450417 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b81dc66
348 11:32:35.453812 Initialized TPM device CR50 revision 0
349 11:32:35.495107 tlcl_send_startup: Startup return code is 0
350 11:32:35.495250 TPM: setup succeeded
351 11:32:35.503658 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
352 11:32:35.507247 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
353 11:32:35.510571 in-header: 03 19 00 00 08 00 00 00
354 11:32:35.513335 in-data: a2 e0 47 00 13 00 00 00
355 11:32:35.517036 Chrome EC: UHEPI supported
356 11:32:35.523931 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
357 11:32:35.527045 in-header: 03 a1 00 00 08 00 00 00
358 11:32:35.530583 in-data: 84 60 60 10 00 00 00 00
359 11:32:35.530664 Phase 1
360 11:32:35.533810 FMAP: area GBB found @ 3f5000 (12032 bytes)
361 11:32:35.540681 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
362 11:32:35.543983 VB2:vb2_check_recovery() Recovery was requested manually
363 11:32:35.550591 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
364 11:32:35.556290 Recovery requested (1009000e)
365 11:32:35.565092 tlcl_extend: response is 0
366 11:32:35.570448 tlcl_extend: response is 0
367 11:32:35.595241
368 11:32:35.595349
369 11:32:35.601722 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
370 11:32:35.605124 ARM64: Exception handlers installed.
371 11:32:35.608718 ARM64: Testing exception
372 11:32:35.611977 ARM64: Done test exception
373 11:32:35.627985 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xaa70, sec=0x2030
374 11:32:35.634379 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
375 11:32:35.637733 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
376 11:32:35.646250 [RTC]rtc_get_frequency_meter,134: input=0xf, output=777
377 11:32:35.653069 [RTC]rtc_get_frequency_meter,134: input=0x17, output=107
378 11:32:35.660036 [RTC]rtc_get_frequency_meter,134: input=0x1b, output=1048
379 11:32:35.666879 [RTC]rtc_get_frequency_meter,134: input=0x19, output=75
380 11:32:35.673866 [RTC]rtc_get_frequency_meter,134: input=0x1a, output=1025
381 11:32:35.680731 [RTC]rtc_get_frequency_meter,134: input=0x19, output=0
382 11:32:35.687825 [RTC]rtc_get_frequency_meter,134: input=0x1a, output=0
383 11:32:35.691175 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xaa7a
384 11:32:35.697774 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
385 11:32:35.701285 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
386 11:32:35.704524 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
387 11:32:35.707799 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
388 11:32:35.711164 in-header: 03 19 00 00 08 00 00 00
389 11:32:35.714740 in-data: a2 e0 47 00 13 00 00 00
390 11:32:35.718074 Chrome EC: UHEPI supported
391 11:32:35.724761 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
392 11:32:35.728270 in-header: 03 a1 00 00 08 00 00 00
393 11:32:35.731431 in-data: 84 60 60 10 00 00 00 00
394 11:32:35.734632 Skip loading cached calibration data
395 11:32:35.741807 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
396 11:32:35.744819 in-header: 03 a1 00 00 08 00 00 00
397 11:32:35.748519 in-data: 84 60 60 10 00 00 00 00
398 11:32:35.754947 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
399 11:32:35.758515 in-header: 03 a1 00 00 08 00 00 00
400 11:32:35.761624 in-data: 84 60 60 10 00 00 00 00
401 11:32:35.761701 ADC[3]: Raw value=1044222 ID=8
402 11:32:35.764901 Manufacturer: ef
403 11:32:35.771547 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
404 11:32:35.775112 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
405 11:32:35.778477 CBFS @ 21000 size 3d4000
406 11:32:35.782123 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
407 11:32:35.785441 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
408 11:32:35.788763 CBFS: Found @ offset 3c880 size 4b
409 11:32:35.792274 DRAM-K: Full Calibration
410 11:32:35.795746 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
411 11:32:35.799149 CBFS @ 21000 size 3d4000
412 11:32:35.805821 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
413 11:32:35.808987 CBFS: Locating 'fallback/dram'
414 11:32:35.812263 CBFS: Found @ offset 24b00 size 12268
415 11:32:35.838868 read SPI 0x45b44 0x1224c: 22773 us, 3263 KB/s, 26.104 Mbps
416 11:32:35.842476 ddr_geometry: 1, config: 0x0
417 11:32:35.845695 header.status = 0x0
418 11:32:35.849134 header.magic = 0x44524d4b (expected: 0x44524d4b)
419 11:32:35.852539 header.version = 0x5 (expected: 0x5)
420 11:32:35.855866 header.size = 0x8f0 (expected: 0x8f0)
421 11:32:35.855962 header.config = 0x0
422 11:32:35.859432 header.flags = 0x0
423 11:32:35.859521 header.checksum = 0x0
424 11:32:35.866175 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
425 11:32:35.872698 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
426 11:32:35.876113 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
427 11:32:35.879632 ddr_geometry:1
428 11:32:35.879747 [EMI] new MDL number = 1
429 11:32:35.883005 dram_cbt_mode_extern: 0
430 11:32:35.886417 dram_cbt_mode [RK0]: 0, [RK1]: 0
431 11:32:35.892759 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
432 11:32:35.892850
433 11:32:35.892913
434 11:32:35.892971 [Bianco] ETT version 0.0.0.1
435 11:32:35.899381 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
436 11:32:35.899524
437 11:32:35.902889 vSetVcoreByFreq with vcore:762500, freq=1600
438 11:32:35.902985
439 11:32:35.903068 [DramcInit]
440 11:32:35.906560 AutoRefreshCKEOff AutoREF OFF
441 11:32:35.909618 DDRPhyPLLSetting-CKEOFF
442 11:32:35.909715 DDRPhyPLLSetting-CKEON
443 11:32:35.913406
444 11:32:35.913489 Enable WDQS
445 11:32:35.916458 [ModeRegInit_LP4] CH0 RK0
446 11:32:35.919752 Write Rank0 MR13 =0x18
447 11:32:35.919858 Write Rank0 MR12 =0x5d
448 11:32:35.923218 Write Rank0 MR1 =0x56
449 11:32:35.926446 Write Rank0 MR2 =0x1a
450 11:32:35.926526 Write Rank0 MR11 =0x0
451 11:32:35.929724 Write Rank0 MR22 =0x38
452 11:32:35.929804 Write Rank0 MR14 =0x5d
453 11:32:35.933102 Write Rank0 MR3 =0x30
454 11:32:35.936544 Write Rank0 MR13 =0x58
455 11:32:35.936625 Write Rank0 MR12 =0x5d
456 11:32:35.939778 Write Rank0 MR1 =0x56
457 11:32:35.939860 Write Rank0 MR2 =0x2d
458 11:32:35.943077 Write Rank0 MR11 =0x23
459 11:32:35.946505 Write Rank0 MR22 =0x34
460 11:32:35.946583 Write Rank0 MR14 =0x10
461 11:32:35.949947 Write Rank0 MR3 =0x30
462 11:32:35.950024 Write Rank0 MR13 =0xd8
463 11:32:35.953237 [ModeRegInit_LP4] CH0 RK1
464 11:32:35.956851 Write Rank1 MR13 =0x18
465 11:32:35.956934 Write Rank1 MR12 =0x5d
466 11:32:35.959962 Write Rank1 MR1 =0x56
467 11:32:35.963359 Write Rank1 MR2 =0x1a
468 11:32:35.963436 Write Rank1 MR11 =0x0
469 11:32:35.967060 Write Rank1 MR22 =0x38
470 11:32:35.967147 Write Rank1 MR14 =0x5d
471 11:32:35.970470 Write Rank1 MR3 =0x30
472 11:32:35.973987 Write Rank1 MR13 =0x58
473 11:32:35.974066 Write Rank1 MR12 =0x5d
474 11:32:35.976933 Write Rank1 MR1 =0x56
475 11:32:35.977011 Write Rank1 MR2 =0x2d
476 11:32:35.980267 Write Rank1 MR11 =0x23
477 11:32:35.983527 Write Rank1 MR22 =0x34
478 11:32:35.983609 Write Rank1 MR14 =0x10
479 11:32:35.986760 Write Rank1 MR3 =0x30
480 11:32:35.986837 Write Rank1 MR13 =0xd8
481 11:32:35.990477 [ModeRegInit_LP4] CH1 RK0
482 11:32:35.993976 Write Rank0 MR13 =0x18
483 11:32:35.994097 Write Rank0 MR12 =0x5d
484 11:32:35.996870 Write Rank0 MR1 =0x56
485 11:32:36.000286 Write Rank0 MR2 =0x1a
486 11:32:36.000468 Write Rank0 MR11 =0x0
487 11:32:36.003693 Write Rank0 MR22 =0x38
488 11:32:36.003772 Write Rank0 MR14 =0x5d
489 11:32:36.007006 Write Rank0 MR3 =0x30
490 11:32:36.010383 Write Rank0 MR13 =0x58
491 11:32:36.010464 Write Rank0 MR12 =0x5d
492 11:32:36.013665 Write Rank0 MR1 =0x56
493 11:32:36.013742 Write Rank0 MR2 =0x2d
494 11:32:36.017205 Write Rank0 MR11 =0x23
495 11:32:36.020759 Write Rank0 MR22 =0x34
496 11:32:36.020835 Write Rank0 MR14 =0x10
497 11:32:36.023730 Write Rank0 MR3 =0x30
498 11:32:36.023805 Write Rank0 MR13 =0xd8
499 11:32:36.027417 [ModeRegInit_LP4] CH1 RK1
500 11:32:36.030776 Write Rank1 MR13 =0x18
501 11:32:36.030853 Write Rank1 MR12 =0x5d
502 11:32:36.033804 Write Rank1 MR1 =0x56
503 11:32:36.037333 Write Rank1 MR2 =0x1a
504 11:32:36.037409 Write Rank1 MR11 =0x0
505 11:32:36.040822 Write Rank1 MR22 =0x38
506 11:32:36.040899 Write Rank1 MR14 =0x5d
507 11:32:36.044045 Write Rank1 MR3 =0x30
508 11:32:36.047455 Write Rank1 MR13 =0x58
509 11:32:36.047531 Write Rank1 MR12 =0x5d
510 11:32:36.050788 Write Rank1 MR1 =0x56
511 11:32:36.050864 Write Rank1 MR2 =0x2d
512 11:32:36.054136 Write Rank1 MR11 =0x23
513 11:32:36.057536 Write Rank1 MR22 =0x34
514 11:32:36.057616 Write Rank1 MR14 =0x10
515 11:32:36.060793 Write Rank1 MR3 =0x30
516 11:32:36.060874 Write Rank1 MR13 =0xd8
517 11:32:36.064548 match AC timing 3
518 11:32:36.074192 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
519 11:32:36.074332 [MiockJmeterHQA]
520 11:32:36.077823 vSetVcoreByFreq with vcore:762500, freq=1600
521 11:32:36.183230
522 11:32:36.183377 MIOCK jitter meter ch=0
523 11:32:36.183448
524 11:32:36.186746 1T = (101-18) = 83 dly cells
525 11:32:36.193591 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 753/100 ps
526 11:32:36.196984 vSetVcoreByFreq with vcore:725000, freq=1200
527 11:32:36.295240
528 11:32:36.295614 MIOCK jitter meter ch=0
529 11:32:36.295890
530 11:32:36.298706 1T = (95-17) = 78 dly cells
531 11:32:36.305268 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
532 11:32:36.308743 vSetVcoreByFreq with vcore:725000, freq=800
533 11:32:36.406221
534 11:32:36.406590 MIOCK jitter meter ch=0
535 11:32:36.406869
536 11:32:36.409704 1T = (95-17) = 78 dly cells
537 11:32:36.416532 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
538 11:32:36.419631 vSetVcoreByFreq with vcore:762500, freq=1600
539 11:32:36.423297 vSetVcoreByFreq with vcore:762500, freq=1600
540 11:32:36.423661
541 11:32:36.423938 K DRVP
542 11:32:36.426517 1. OCD DRVP=0 CALOUT=0
543 11:32:36.429757 1. OCD DRVP=1 CALOUT=0
544 11:32:36.430119 1. OCD DRVP=2 CALOUT=0
545 11:32:36.433148 1. OCD DRVP=3 CALOUT=0
546 11:32:36.433637 1. OCD DRVP=4 CALOUT=0
547 11:32:36.436896 1. OCD DRVP=5 CALOUT=0
548 11:32:36.440074 1. OCD DRVP=6 CALOUT=0
549 11:32:36.440436 1. OCD DRVP=7 CALOUT=0
550 11:32:36.443214 1. OCD DRVP=8 CALOUT=1
551 11:32:36.443571
552 11:32:36.446667 1. OCD DRVP calibration OK! DRVP=8
553 11:32:36.447027
554 11:32:36.447301
555 11:32:36.447555
556 11:32:36.447795 K ODTN
557 11:32:36.450292 3. OCD ODTN=0 ,CALOUT=1
558 11:32:36.453376 3. OCD ODTN=1 ,CALOUT=1
559 11:32:36.453736 3. OCD ODTN=2 ,CALOUT=1
560 11:32:36.456624 3. OCD ODTN=3 ,CALOUT=1
561 11:32:36.456995 3. OCD ODTN=4 ,CALOUT=1
562 11:32:36.460223 3. OCD ODTN=5 ,CALOUT=1
563 11:32:36.463907 3. OCD ODTN=6 ,CALOUT=1
564 11:32:36.464268 3. OCD ODTN=7 ,CALOUT=0
565 11:32:36.464546
566 11:32:36.466988 3. OCD ODTN calibration OK! ODTN=7
567 11:32:36.467348
568 11:32:36.470202 [SwImpedanceCal] DRVP=8, DRVN=9, ODTN=7
569 11:32:36.477183 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15
570 11:32:36.480243 term_option=0, Reg: DRVP=8, DRVN=7, ODTN=15 (After Adjust)
571 11:32:36.480643
572 11:32:36.480920 K DRVP
573 11:32:36.483629 1. OCD DRVP=0 CALOUT=0
574 11:32:36.486831 1. OCD DRVP=1 CALOUT=0
575 11:32:36.487188 1. OCD DRVP=2 CALOUT=0
576 11:32:36.490511 1. OCD DRVP=3 CALOUT=0
577 11:32:36.493942 1. OCD DRVP=4 CALOUT=0
578 11:32:36.494312 1. OCD DRVP=5 CALOUT=0
579 11:32:36.497058 1. OCD DRVP=6 CALOUT=0
580 11:32:36.497448 1. OCD DRVP=7 CALOUT=0
581 11:32:36.500347 1. OCD DRVP=8 CALOUT=0
582 11:32:36.504122 1. OCD DRVP=9 CALOUT=1
583 11:32:36.504490
584 11:32:36.507685 1. OCD DRVP calibration OK! DRVP=9
585 11:32:36.508042
586 11:32:36.508316
587 11:32:36.508565
588 11:32:36.508802 K ODTN
589 11:32:36.510817 3. OCD ODTN=0 ,CALOUT=1
590 11:32:36.511175 3. OCD ODTN=1 ,CALOUT=1
591 11:32:36.514047 3. OCD ODTN=2 ,CALOUT=1
592 11:32:36.514408 3. OCD ODTN=3 ,CALOUT=1
593 11:32:36.517856 3. OCD ODTN=4 ,CALOUT=1
594 11:32:36.520843 3. OCD ODTN=5 ,CALOUT=1
595 11:32:36.521202 3. OCD ODTN=6 ,CALOUT=1
596 11:32:36.524405 3. OCD ODTN=7 ,CALOUT=1
597 11:32:36.527659 3. OCD ODTN=8 ,CALOUT=1
598 11:32:36.528040 3. OCD ODTN=9 ,CALOUT=1
599 11:32:36.530943 3. OCD ODTN=10 ,CALOUT=1
600 11:32:36.534225 3. OCD ODTN=11 ,CALOUT=1
601 11:32:36.534581 3. OCD ODTN=12 ,CALOUT=1
602 11:32:36.538236 3. OCD ODTN=13 ,CALOUT=0
603 11:32:36.538592
604 11:32:36.541223 3. OCD ODTN calibration OK! ODTN=13
605 11:32:36.541609
606 11:32:36.544490 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=13
607 11:32:36.547726 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=13
608 11:32:36.554550 term_option=1, Reg: DRVP=9, DRVN=9, ODTN=13 (After Adjust)
609 11:32:36.554905
610 11:32:36.555178 [DramcInit]
611 11:32:36.557963 AutoRefreshCKEOff AutoREF OFF
612 11:32:36.561422 DDRPhyPLLSetting-CKEOFF
613 11:32:36.561771 DDRPhyPLLSetting-CKEON
614 11:32:36.562042
615 11:32:36.564607 Enable WDQS
616 11:32:36.564956 ==
617 11:32:36.568366 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
618 11:32:36.571529 fsp= 1, odt_onoff= 1, Byte mode= 0
619 11:32:36.571882 ==
620 11:32:36.574689 [Duty_Offset_Calibration]
621 11:32:36.575039
622 11:32:36.578006 ===========================
623 11:32:36.578360 B0:1 B1:0 CA:0
624 11:32:36.600766 ==
625 11:32:36.604276 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
626 11:32:36.607499 fsp= 1, odt_onoff= 1, Byte mode= 0
627 11:32:36.607852 ==
628 11:32:36.611020 [Duty_Offset_Calibration]
629 11:32:36.611370
630 11:32:36.614190 ===========================
631 11:32:36.614542 B0:1 B1:0 CA:-1
632 11:32:36.647510 [ModeRegInit_LP4] CH0 RK0
633 11:32:36.650808 Write Rank0 MR13 =0x18
634 11:32:36.651167 Write Rank0 MR12 =0x5d
635 11:32:36.654102 Write Rank0 MR1 =0x56
636 11:32:36.657624 Write Rank0 MR2 =0x1a
637 11:32:36.657977 Write Rank0 MR11 =0x0
638 11:32:36.660843 Write Rank0 MR22 =0x38
639 11:32:36.661195 Write Rank0 MR14 =0x5d
640 11:32:36.664181 Write Rank0 MR3 =0x30
641 11:32:36.668125 Write Rank0 MR13 =0x58
642 11:32:36.668475 Write Rank0 MR12 =0x5d
643 11:32:36.671050 Write Rank0 MR1 =0x56
644 11:32:36.671398 Write Rank0 MR2 =0x2d
645 11:32:36.674168 Write Rank0 MR11 =0x23
646 11:32:36.677741 Write Rank0 MR22 =0x34
647 11:32:36.678092 Write Rank0 MR14 =0x10
648 11:32:36.680931 Write Rank0 MR3 =0x30
649 11:32:36.681316 Write Rank0 MR13 =0xd8
650 11:32:36.684229 [ModeRegInit_LP4] CH0 RK1
651 11:32:36.687875 Write Rank1 MR13 =0x18
652 11:32:36.688042 Write Rank1 MR12 =0x5d
653 11:32:36.690795 Write Rank1 MR1 =0x56
654 11:32:36.694564 Write Rank1 MR2 =0x1a
655 11:32:36.694730 Write Rank1 MR11 =0x0
656 11:32:36.697610 Write Rank1 MR22 =0x38
657 11:32:36.697776 Write Rank1 MR14 =0x5d
658 11:32:36.701340 Write Rank1 MR3 =0x30
659 11:32:36.704699 Write Rank1 MR13 =0x58
660 11:32:36.704891 Write Rank1 MR12 =0x5d
661 11:32:36.707955 Write Rank1 MR1 =0x56
662 11:32:36.708253 Write Rank1 MR2 =0x2d
663 11:32:36.711697 Write Rank1 MR11 =0x23
664 11:32:36.714622 Write Rank1 MR22 =0x34
665 11:32:36.714918 Write Rank1 MR14 =0x10
666 11:32:36.718048 Write Rank1 MR3 =0x30
667 11:32:36.718399 Write Rank1 MR13 =0xd8
668 11:32:36.721296 [ModeRegInit_LP4] CH1 RK0
669 11:32:36.724563 Write Rank0 MR13 =0x18
670 11:32:36.724913 Write Rank0 MR12 =0x5d
671 11:32:36.728082 Write Rank0 MR1 =0x56
672 11:32:36.731422 Write Rank0 MR2 =0x1a
673 11:32:36.731779 Write Rank0 MR11 =0x0
674 11:32:36.734639 Write Rank0 MR22 =0x38
675 11:32:36.735084 Write Rank0 MR14 =0x5d
676 11:32:36.738121 Write Rank0 MR3 =0x30
677 11:32:36.741528 Write Rank0 MR13 =0x58
678 11:32:36.741880 Write Rank0 MR12 =0x5d
679 11:32:36.745050 Write Rank0 MR1 =0x56
680 11:32:36.745456 Write Rank0 MR2 =0x2d
681 11:32:36.748560 Write Rank0 MR11 =0x23
682 11:32:36.751723 Write Rank0 MR22 =0x34
683 11:32:36.752073 Write Rank0 MR14 =0x10
684 11:32:36.755145 Write Rank0 MR3 =0x30
685 11:32:36.755495 Write Rank0 MR13 =0xd8
686 11:32:36.758279 [ModeRegInit_LP4] CH1 RK1
687 11:32:36.761643 Write Rank1 MR13 =0x18
688 11:32:36.761993 Write Rank1 MR12 =0x5d
689 11:32:36.765040 Write Rank1 MR1 =0x56
690 11:32:36.765440 Write Rank1 MR2 =0x1a
691 11:32:36.768846 Write Rank1 MR11 =0x0
692 11:32:36.771841 Write Rank1 MR22 =0x38
693 11:32:36.772194 Write Rank1 MR14 =0x5d
694 11:32:36.775062 Write Rank1 MR3 =0x30
695 11:32:36.778718 Write Rank1 MR13 =0x58
696 11:32:36.779083 Write Rank1 MR12 =0x5d
697 11:32:36.782212 Write Rank1 MR1 =0x56
698 11:32:36.782613 Write Rank1 MR2 =0x2d
699 11:32:36.785395 Write Rank1 MR11 =0x23
700 11:32:36.788737 Write Rank1 MR22 =0x34
701 11:32:36.789092 Write Rank1 MR14 =0x10
702 11:32:36.791985 Write Rank1 MR3 =0x30
703 11:32:36.792337 Write Rank1 MR13 =0xd8
704 11:32:36.795429 match AC timing 3
705 11:32:36.805549 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
706 11:32:36.805927 DramC Write-DBI off
707 11:32:36.808835 DramC Read-DBI off
708 11:32:36.809189 Write Rank0 MR13 =0x59
709 11:32:36.809518 ==
710 11:32:36.815464 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
711 11:32:36.818963 fsp= 1, odt_onoff= 1, Byte mode= 0
712 11:32:36.819318 ==
713 11:32:36.822502 === u2Vref_new: 0x56 --> 0x2d
714 11:32:36.825604 === u2Vref_new: 0x58 --> 0x38
715 11:32:36.829279 === u2Vref_new: 0x5a --> 0x39
716 11:32:36.832531 === u2Vref_new: 0x5c --> 0x3c
717 11:32:36.832884 === u2Vref_new: 0x5e --> 0x3d
718 11:32:36.836178 === u2Vref_new: 0x60 --> 0xa0
719 11:32:36.839143 [CA 0] Center 33 (4~63) winsize 60
720 11:32:36.842230 [CA 1] Center 34 (5~63) winsize 59
721 11:32:36.845674 [CA 2] Center 27 (0~55) winsize 56
722 11:32:36.849126 [CA 3] Center 23 (-4~51) winsize 56
723 11:32:36.852203 [CA 4] Center 24 (-3~52) winsize 56
724 11:32:36.855693 [CA 5] Center 28 (-1~58) winsize 60
725 11:32:36.856046
726 11:32:36.859058 [CATrainingPosCal] consider 1 rank data
727 11:32:36.862376 u2DelayCellTimex100 = 753/100 ps
728 11:32:36.865692 CA0 delay=33 (4~63),Diff = 10 PI (12 cell)
729 11:32:36.869135 CA1 delay=34 (5~63),Diff = 11 PI (14 cell)
730 11:32:36.872547 CA2 delay=27 (0~55),Diff = 4 PI (5 cell)
731 11:32:36.879201 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
732 11:32:36.882866 CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)
733 11:32:36.886191 CA5 delay=28 (-1~58),Diff = 5 PI (6 cell)
734 11:32:36.886543
735 11:32:36.889340 CA PerBit enable=1, Macro0, CA PI delay=23
736 11:32:36.893059 === u2Vref_new: 0x58 --> 0x38
737 11:32:36.893467
738 11:32:36.893745 Vref(ca) range 1: 24
739 11:32:36.893995
740 11:32:36.896168 CS Dly= 11 (42-0-32)
741 11:32:36.899492 Write Rank0 MR13 =0xd8
742 11:32:36.899845 Write Rank0 MR13 =0xd8
743 11:32:36.903205 Write Rank0 MR12 =0x58
744 11:32:36.903559 Write Rank1 MR13 =0x59
745 11:32:36.903831 ==
746 11:32:36.909753 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
747 11:32:36.912902 fsp= 1, odt_onoff= 1, Byte mode= 0
748 11:32:36.913441 ==
749 11:32:36.916444 === u2Vref_new: 0x56 --> 0x2d
750 11:32:36.919650 === u2Vref_new: 0x58 --> 0x38
751 11:32:36.923117 === u2Vref_new: 0x5a --> 0x39
752 11:32:36.926653 === u2Vref_new: 0x5c --> 0x3c
753 11:32:36.927019 === u2Vref_new: 0x5e --> 0x3d
754 11:32:36.930039 === u2Vref_new: 0x60 --> 0xa0
755 11:32:36.933189 [CA 0] Center 33 (4~63) winsize 60
756 11:32:36.936591 [CA 1] Center 34 (5~63) winsize 59
757 11:32:36.940214 [CA 2] Center 28 (0~56) winsize 57
758 11:32:36.943438 [CA 3] Center 23 (-4~51) winsize 56
759 11:32:36.947046 [CA 4] Center 24 (-3~52) winsize 56
760 11:32:36.950202 [CA 5] Center 29 (1~58) winsize 58
761 11:32:36.950555
762 11:32:36.953738 [CATrainingPosCal] consider 2 rank data
763 11:32:36.957088 u2DelayCellTimex100 = 753/100 ps
764 11:32:36.960278 CA0 delay=33 (4~63),Diff = 10 PI (12 cell)
765 11:32:36.963741 CA1 delay=34 (5~63),Diff = 11 PI (14 cell)
766 11:32:36.967010 CA2 delay=27 (0~55),Diff = 4 PI (5 cell)
767 11:32:36.970446 CA3 delay=23 (-4~51),Diff = 0 PI (0 cell)
768 11:32:36.977342 CA4 delay=24 (-3~52),Diff = 1 PI (1 cell)
769 11:32:36.980750 CA5 delay=29 (1~58),Diff = 6 PI (7 cell)
770 11:32:36.981101
771 11:32:36.983682 CA PerBit enable=1, Macro0, CA PI delay=23
772 11:32:36.987231 === u2Vref_new: 0x56 --> 0x2d
773 11:32:36.987583
774 11:32:36.987863 Vref(ca) range 1: 22
775 11:32:36.988119
776 11:32:36.990423 CS Dly= 7 (38-0-32)
777 11:32:36.990776 Write Rank1 MR13 =0xd8
778 11:32:36.993873 Write Rank1 MR13 =0xd8
779 11:32:36.997121 Write Rank1 MR12 =0x56
780 11:32:37.000470 [RankSwap] Rank num 2, (Multi 1), Rank 0
781 11:32:37.000824 Write Rank0 MR2 =0xad
782 11:32:37.004030 [Write Leveling]
783 11:32:37.007261 delay byte0 byte1 byte2 byte3
784 11:32:37.007711
785 11:32:37.008122 10 0 0
786 11:32:37.010722 11 0 0
787 11:32:37.011070 12 0 0
788 11:32:37.011336 13 0 0
789 11:32:37.014038 14 0 0
790 11:32:37.014393 15 0 0
791 11:32:37.017312 16 0 0
792 11:32:37.017822 17 0 0
793 11:32:37.018267 18 0 0
794 11:32:37.020462 19 0 0
795 11:32:37.020936 20 0 0
796 11:32:37.024060 21 0 0
797 11:32:37.024509 22 0 0
798 11:32:37.024930 23 0 0
799 11:32:37.027591 24 0 0
800 11:32:37.028034 25 0 0
801 11:32:37.030638 26 0 0
802 11:32:37.031037 27 0 0
803 11:32:37.034024 28 0 ff
804 11:32:37.034389 29 0 ff
805 11:32:37.034678 30 0 ff
806 11:32:37.037591 31 0 ff
807 11:32:37.037964 32 0 ff
808 11:32:37.041552 33 ff ff
809 11:32:37.042056 34 ff ff
810 11:32:37.044418 35 ff ff
811 11:32:37.044872 36 ff ff
812 11:32:37.047550 37 ff ff
813 11:32:37.048018 38 ff ff
814 11:32:37.048444 39 ff ff
815 11:32:37.054585 pass bytecount = 0xff (0xff: all bytes pass)
816 11:32:37.055034
817 11:32:37.055446 DQS0 dly: 33
818 11:32:37.055842 DQS1 dly: 28
819 11:32:37.057627 Write Rank0 MR2 =0x2d
820 11:32:37.060879 [RankSwap] Rank num 2, (Multi 1), Rank 0
821 11:32:37.064535 Write Rank0 MR1 =0xd6
822 11:32:37.064960 [Gating]
823 11:32:37.065383 ==
824 11:32:37.071138 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
825 11:32:37.071580 fsp= 1, odt_onoff= 1, Byte mode= 0
826 11:32:37.074708 ==
827 11:32:37.077984 3 1 0 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
828 11:32:37.080989 3 1 4 |3534 0 |(11 11)(11 11) |(1 1)(1 1)| 0
829 11:32:37.084460 3 1 8 |3534 707 |(11 11)(11 11) |(0 0)(1 1)| 0
830 11:32:37.091286 3 1 12 |3534 3232 |(11 11)(11 11) |(0 0)(0 1)| 0
831 11:32:37.094861 3 1 16 |3534 3434 |(11 11)(11 11) |(0 0)(1 1)| 0
832 11:32:37.098466 3 1 20 |3534 2928 |(11 11)(11 11) |(0 0)(0 1)| 0
833 11:32:37.101543 3 1 24 |3534 b0b |(11 11)(11 11) |(0 1)(0 1)| 0
834 11:32:37.108327 3 1 28 |3534 3434 |(11 11)(11 11) |(0 1)(0 1)| 0
835 11:32:37.111573 3 2 0 |1515 2a29 |(11 11)(11 11) |(1 1)(1 1)| 0
836 11:32:37.115106 3 2 4 |3d3d 909 |(11 11)(11 11) |(1 1)(1 1)| 0
837 11:32:37.121619 3 2 8 |3d3d 201f |(11 11)(11 11) |(1 1)(1 1)| 0
838 11:32:37.124990 3 2 12 |3d3d 3c3b |(11 11)(11 11) |(1 1)(1 1)| 0
839 11:32:37.128796 3 2 16 |3d3d 3635 |(11 11)(11 11) |(1 1)(1 1)| 0
840 11:32:37.131648 3 2 20 |3d3d 3c3c |(11 11)(0 0) |(1 1)(1 1)| 0
841 11:32:37.138524 [Byte 1] Lead/lag Transition tap number (1)
842 11:32:37.142079 3 2 24 |3d3d 202 |(11 11)(11 11) |(1 1)(0 0)| 0
843 11:32:37.145297 3 2 28 |3d3d c0c |(11 11)(11 11) |(1 1)(1 1)| 0
844 11:32:37.148596 3 3 0 |3d3d 3c3c |(11 11)(11 11) |(1 1)(1 1)| 0
845 11:32:37.155762 3 3 4 |3d3d f0e |(11 11)(11 11) |(1 1)(1 1)| 0
846 11:32:37.158515 3 3 8 |1e1d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
847 11:32:37.162483 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
848 11:32:37.165475 [Byte 0] Lead/lag Transition tap number (1)
849 11:32:37.172077 [Byte 1] Lead/lag falling Transition (3, 3, 12)
850 11:32:37.175700 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
851 11:32:37.178953 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
852 11:32:37.185808 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
853 11:32:37.189389 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
854 11:32:37.192434 3 4 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
855 11:32:37.195764 3 4 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
856 11:32:37.202548 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
857 11:32:37.206132 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
858 11:32:37.209433 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
859 11:32:37.215927 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
860 11:32:37.219330 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
861 11:32:37.222709 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
862 11:32:37.229766 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
863 11:32:37.232633 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
864 11:32:37.236216 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
865 11:32:37.239517 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
866 11:32:37.246566 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
867 11:32:37.249673 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
868 11:32:37.253223 [Byte 0] Lead/lag falling Transition (3, 5, 20)
869 11:32:37.256374 [Byte 1] Lead/lag falling Transition (3, 5, 20)
870 11:32:37.263205 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
871 11:32:37.266515 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
872 11:32:37.269466 [Byte 0] Lead/lag Transition tap number (3)
873 11:32:37.272839 [Byte 1] Lead/lag Transition tap number (3)
874 11:32:37.279651 3 6 0 |4242 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
875 11:32:37.282936 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
876 11:32:37.286333 [Byte 0]First pass (3, 6, 4)
877 11:32:37.289725 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
878 11:32:37.293029 [Byte 1]First pass (3, 6, 8)
879 11:32:37.296571 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
880 11:32:37.299805 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
881 11:32:37.303146 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
882 11:32:37.306253 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
883 11:32:37.313258 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
884 11:32:37.316323 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
885 11:32:37.319926 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
886 11:32:37.323417 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
887 11:32:37.326908 All bytes gating window > 1UI, Early break!
888 11:32:37.326986
889 11:32:37.333184 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
890 11:32:37.333298
891 11:32:37.336728 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 26)
892 11:32:37.336803
893 11:32:37.336861
894 11:32:37.336914
895 11:32:37.340105 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
896 11:32:37.340181
897 11:32:37.343370 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
898 11:32:37.343445
899 11:32:37.343504
900 11:32:37.346622 Write Rank0 MR1 =0x56
901 11:32:37.346697
902 11:32:37.349990 best RODT dly(2T, 0.5T) = (2, 2)
903 11:32:37.350065
904 11:32:37.353469 best RODT dly(2T, 0.5T) = (2, 2)
905 11:32:37.353545 ==
906 11:32:37.357263 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
907 11:32:37.360085 fsp= 1, odt_onoff= 1, Byte mode= 0
908 11:32:37.360161 ==
909 11:32:37.366765 Start DQ dly to find pass range UseTestEngine =0
910 11:32:37.370299 x-axis: bit #, y-axis: DQ dly (-127~63)
911 11:32:37.370374 RX Vref Scan = 0
912 11:32:37.373499 -26, [0] xxxxxxxx xxxxxxxx [MSB]
913 11:32:37.376714 -25, [0] xxxxxxxx xxxxxxxx [MSB]
914 11:32:37.380063 -24, [0] xxxxxxxx xxxxxxxx [MSB]
915 11:32:37.383576 -23, [0] xxxxxxxx xxxxxxxx [MSB]
916 11:32:37.383652 -22, [0] xxxxxxxx xxxxxxxx [MSB]
917 11:32:37.386919 -21, [0] xxxxxxxx xxxxxxxx [MSB]
918 11:32:37.390451 -20, [0] xxxxxxxx xxxxxxxx [MSB]
919 11:32:37.393720 -19, [0] xxxxxxxx xxxxxxxx [MSB]
920 11:32:37.396903 -18, [0] xxxxxxxx xxxxxxxx [MSB]
921 11:32:37.400089 -17, [0] xxxxxxxx xxxxxxxx [MSB]
922 11:32:37.403545 -16, [0] xxxxxxxx xxxxxxxx [MSB]
923 11:32:37.407035 -15, [0] xxxxxxxx xxxxxxxx [MSB]
924 11:32:37.407111 -14, [0] xxxxxxxx xxxxxxxx [MSB]
925 11:32:37.410308 -13, [0] xxxxxxxx xxxxxxxx [MSB]
926 11:32:37.413630 -12, [0] xxxxxxxx xxxxxxxx [MSB]
927 11:32:37.417246 -11, [0] xxxxxxxx xxxxxxxx [MSB]
928 11:32:37.420819 -10, [0] xxxxxxxx xxxxxxxx [MSB]
929 11:32:37.423717 -9, [0] xxxxxxxx xxxxxxxx [MSB]
930 11:32:37.427163 -8, [0] xxxxxxxx xxxxxxxx [MSB]
931 11:32:37.427242 -7, [0] xxxxxxxx xxxxxxxx [MSB]
932 11:32:37.430316 -6, [0] xxxxxxxx xxxxxxxx [MSB]
933 11:32:37.433824 -5, [0] xxxxxxxx xxxxxxxx [MSB]
934 11:32:37.437132 -4, [0] xxxxxxxx xxxxxxxx [MSB]
935 11:32:37.440540 -3, [0] xxxxxxxx xxxxxxxx [MSB]
936 11:32:37.443791 -2, [0] xxxoxxxx xxxxxxxx [MSB]
937 11:32:37.447360 -1, [0] xxxoxxxx xxxxxxxx [MSB]
938 11:32:37.447437 0, [0] xxxoxoxx xxxxxoxx [MSB]
939 11:32:37.450464 1, [0] xxxoxooo xoxxxoxx [MSB]
940 11:32:37.454213 2, [0] xxxoxooo ooxoxoxx [MSB]
941 11:32:37.457574 3, [0] xxxoxooo ooxooooo [MSB]
942 11:32:37.460685 4, [0] xxxoxooo ooxooooo [MSB]
943 11:32:37.460775 5, [0] xxxooooo ooxooooo [MSB]
944 11:32:37.463928 6, [0] xooooooo oooooooo [MSB]
945 11:32:37.467558 7, [0] xooooooo oooooooo [MSB]
946 11:32:37.470802 30, [0] oooxoooo oooooooo [MSB]
947 11:32:37.474153 31, [0] oooxoooo oooooooo [MSB]
948 11:32:37.477707 32, [0] oooxoxxo oooooooo [MSB]
949 11:32:37.480716 33, [0] oooxoxxo ooooooxo [MSB]
950 11:32:37.480793 34, [0] oooxoxxo xooxooxo [MSB]
951 11:32:37.484159 35, [0] oooxoxxo xooxooxo [MSB]
952 11:32:37.487865 36, [0] oooxoxxx xooxooxo [MSB]
953 11:32:37.490809 37, [0] oooxoxxx xooxxxxx [MSB]
954 11:32:37.494620 38, [0] oooxxxxx xxoxxxxx [MSB]
955 11:32:37.497546 39, [0] oxoxxxxx xxoxxxxx [MSB]
956 11:32:37.497623 40, [0] oxxxxxxx xxxxxxxx [MSB]
957 11:32:37.501385 41, [0] xxxxxxxx xxxxxxxx [MSB]
958 11:32:37.504757 iDelay=41, Bit 0, Center 24 (8 ~ 40) 33
959 11:32:37.507658 iDelay=41, Bit 1, Center 22 (6 ~ 38) 33
960 11:32:37.510932 iDelay=41, Bit 2, Center 22 (6 ~ 39) 34
961 11:32:37.517768 iDelay=41, Bit 3, Center 13 (-2 ~ 29) 32
962 11:32:37.521633 iDelay=41, Bit 4, Center 21 (5 ~ 37) 33
963 11:32:37.524789 iDelay=41, Bit 5, Center 15 (0 ~ 31) 32
964 11:32:37.528287 iDelay=41, Bit 6, Center 16 (1 ~ 31) 31
965 11:32:37.531224 iDelay=41, Bit 7, Center 18 (1 ~ 35) 35
966 11:32:37.534760 iDelay=41, Bit 8, Center 17 (2 ~ 33) 32
967 11:32:37.538133 iDelay=41, Bit 9, Center 19 (1 ~ 37) 37
968 11:32:37.541445 iDelay=41, Bit 10, Center 22 (6 ~ 39) 34
969 11:32:37.544808 iDelay=41, Bit 11, Center 17 (2 ~ 33) 32
970 11:32:37.548196 iDelay=41, Bit 12, Center 19 (3 ~ 36) 34
971 11:32:37.551434 iDelay=41, Bit 13, Center 18 (0 ~ 36) 37
972 11:32:37.554993 iDelay=41, Bit 14, Center 17 (3 ~ 32) 30
973 11:32:37.558103 iDelay=41, Bit 15, Center 19 (3 ~ 36) 34
974 11:32:37.558178 ==
975 11:32:37.565017 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
976 11:32:37.568435 fsp= 1, odt_onoff= 1, Byte mode= 0
977 11:32:37.568513 ==
978 11:32:37.568572 DQS Delay:
979 11:32:37.571630 DQS0 = 0, DQS1 = 0
980 11:32:37.571727 DQM Delay:
981 11:32:37.574996 DQM0 = 18, DQM1 = 18
982 11:32:37.575072 DQ Delay:
983 11:32:37.578162 DQ0 =24, DQ1 =22, DQ2 =22, DQ3 =13
984 11:32:37.581681 DQ4 =21, DQ5 =15, DQ6 =16, DQ7 =18
985 11:32:37.584868 DQ8 =17, DQ9 =19, DQ10 =22, DQ11 =17
986 11:32:37.588413 DQ12 =19, DQ13 =18, DQ14 =17, DQ15 =19
987 11:32:37.588488
988 11:32:37.588545
989 11:32:37.588599 DramC Write-DBI off
990 11:32:37.591385 ==
991 11:32:37.594799 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
992 11:32:37.598401 fsp= 1, odt_onoff= 1, Byte mode= 0
993 11:32:37.598476 ==
994 11:32:37.601978 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
995 11:32:37.602053
996 11:32:37.604818 Begin, DQ Scan Range 924~1180
997 11:32:37.604893
998 11:32:37.604951
999 11:32:37.608254 TX Vref Scan disable
1000 11:32:37.611745 924 |3 4 28|[0] xxxxxxxx xxxxxxxx [MSB]
1001 11:32:37.614842 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1002 11:32:37.618499 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1003 11:32:37.621968 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1004 11:32:37.624912 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1005 11:32:37.628731 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1006 11:32:37.631614 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1007 11:32:37.634921 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1008 11:32:37.638593 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1009 11:32:37.641995 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1010 11:32:37.645479 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1011 11:32:37.648660 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1012 11:32:37.655140 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1013 11:32:37.658825 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1014 11:32:37.662298 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1015 11:32:37.665371 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1016 11:32:37.668738 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1017 11:32:37.672008 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1018 11:32:37.675582 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1019 11:32:37.678803 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1020 11:32:37.682205 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1021 11:32:37.686068 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1022 11:32:37.688995 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1023 11:32:37.692574 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1024 11:32:37.695413 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1025 11:32:37.699024 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1026 11:32:37.702198 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1027 11:32:37.705620 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1028 11:32:37.709108 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1029 11:32:37.712111 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1030 11:32:37.715720 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1031 11:32:37.722299 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1032 11:32:37.725750 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1033 11:32:37.728953 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1034 11:32:37.732816 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1035 11:32:37.735754 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1036 11:32:37.739497 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1037 11:32:37.742748 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1038 11:32:37.745870 962 |3 6 2|[0] xxxxxxxx oxxxxxxx [MSB]
1039 11:32:37.749356 963 |3 6 3|[0] xxxxxxxx oxxoxxxx [MSB]
1040 11:32:37.752748 964 |3 6 4|[0] xxxxxxxx ooxoxxox [MSB]
1041 11:32:37.756305 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1042 11:32:37.759213 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1043 11:32:37.762812 967 |3 6 7|[0] xxxxxxxx ooxooooo [MSB]
1044 11:32:37.766424 968 |3 6 8|[0] xxxxxxxx ooxooooo [MSB]
1045 11:32:37.769391 969 |3 6 9|[0] xxxxxxxx oooooooo [MSB]
1046 11:32:37.772862 970 |3 6 10|[0] xxxoxoxx oooooooo [MSB]
1047 11:32:37.776408 971 |3 6 11|[0] xxxoxoox oooooooo [MSB]
1048 11:32:37.779451 972 |3 6 12|[0] xxxoxoox oooooooo [MSB]
1049 11:32:37.783172 973 |3 6 13|[0] xxxoxooo oooooooo [MSB]
1050 11:32:37.786238 974 |3 6 14|[0] xxxooooo oooooooo [MSB]
1051 11:32:37.789568 975 |3 6 15|[0] xxoooooo oooooooo [MSB]
1052 11:32:37.801654 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1053 11:32:37.801740 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1054 11:32:37.804247 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1055 11:32:37.807646 992 |3 6 32|[0] oooxoooo xxxxxxxx [MSB]
1056 11:32:37.811238 993 |3 6 33|[0] oooxoxoo xxxxxxxx [MSB]
1057 11:32:37.814450 994 |3 6 34|[0] oooxoxxo xxxxxxxx [MSB]
1058 11:32:37.817815 995 |3 6 35|[0] oooxoxxo xxxxxxxx [MSB]
1059 11:32:37.821163 996 |3 6 36|[0] xxxxxxxx xxxxxxxx [MSB]
1060 11:32:37.824462 Byte0, DQ PI dly=982, DQM PI dly= 982
1061 11:32:37.828014 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1062 11:32:37.828093
1063 11:32:37.834656 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1064 11:32:37.834735
1065 11:32:37.838156 Byte1, DQ PI dly=976, DQM PI dly= 976
1066 11:32:37.841531 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1067 11:32:37.841607
1068 11:32:37.845001 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1069 11:32:37.845077
1070 11:32:37.845135 ==
1071 11:32:37.851379 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1072 11:32:37.854617 fsp= 1, odt_onoff= 1, Byte mode= 0
1073 11:32:37.854693 ==
1074 11:32:37.858205 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1075 11:32:37.858280
1076 11:32:37.861380 Begin, DQ Scan Range 952~1016
1077 11:32:37.864817 Write Rank0 MR14 =0x0
1078 11:32:37.871835
1079 11:32:37.871909 CH=0, VrefRange= 0, VrefLevel = 0
1080 11:32:37.878738 TX Bit0 (977~994) 18 985, Bit8 (966~983) 18 974,
1081 11:32:37.881817 TX Bit1 (977~992) 16 984, Bit9 (967~986) 20 976,
1082 11:32:37.888320 TX Bit2 (976~994) 19 985, Bit10 (970~989) 20 979,
1083 11:32:37.891712 TX Bit3 (970~989) 20 979, Bit11 (967~985) 19 976,
1084 11:32:37.895466 TX Bit4 (976~994) 19 985, Bit12 (967~986) 20 976,
1085 11:32:37.901856 TX Bit5 (974~990) 17 982, Bit13 (967~984) 18 975,
1086 11:32:37.905370 TX Bit6 (975~990) 16 982, Bit14 (968~985) 18 976,
1087 11:32:37.908481 TX Bit7 (975~992) 18 983, Bit15 (969~988) 20 978,
1088 11:32:37.908574
1089 11:32:37.911899 Write Rank0 MR14 =0x2
1090 11:32:37.920451
1091 11:32:37.920528 CH=0, VrefRange= 0, VrefLevel = 2
1092 11:32:37.927296 TX Bit0 (977~995) 19 986, Bit8 (965~984) 20 974,
1093 11:32:37.930781 TX Bit1 (976~993) 18 984, Bit9 (967~987) 21 977,
1094 11:32:37.933753 TX Bit2 (977~994) 18 985, Bit10 (970~990) 21 980,
1095 11:32:37.940656 TX Bit3 (970~989) 20 979, Bit11 (966~985) 20 975,
1096 11:32:37.944070 TX Bit4 (976~995) 20 985, Bit12 (967~987) 21 977,
1097 11:32:37.950747 TX Bit5 (974~990) 17 982, Bit13 (967~985) 19 976,
1098 11:32:37.954282 TX Bit6 (974~990) 17 982, Bit14 (968~985) 18 976,
1099 11:32:37.957466 TX Bit7 (975~992) 18 983, Bit15 (968~989) 22 978,
1100 11:32:37.957542
1101 11:32:37.960511 Write Rank0 MR14 =0x4
1102 11:32:37.969362
1103 11:32:37.969437 CH=0, VrefRange= 0, VrefLevel = 4
1104 11:32:37.975847 TX Bit0 (977~996) 20 986, Bit8 (965~984) 20 974,
1105 11:32:37.979326 TX Bit1 (977~993) 17 985, Bit9 (966~987) 22 976,
1106 11:32:37.986099 TX Bit2 (976~995) 20 985, Bit10 (969~990) 22 979,
1107 11:32:37.989263 TX Bit3 (969~989) 21 979, Bit11 (965~986) 22 975,
1108 11:32:37.993079 TX Bit4 (976~996) 21 986, Bit12 (967~988) 22 977,
1109 11:32:37.999553 TX Bit5 (973~990) 18 981, Bit13 (967~985) 19 976,
1110 11:32:38.003012 TX Bit6 (974~991) 18 982, Bit14 (967~986) 20 976,
1111 11:32:38.006201 TX Bit7 (975~993) 19 984, Bit15 (968~989) 22 978,
1112 11:32:38.006276
1113 11:32:38.009435 Write Rank0 MR14 =0x6
1114 11:32:38.018224
1115 11:32:38.018298 CH=0, VrefRange= 0, VrefLevel = 6
1116 11:32:38.024674 TX Bit0 (977~996) 20 986, Bit8 (964~985) 22 974,
1117 11:32:38.028040 TX Bit1 (976~994) 19 985, Bit9 (966~988) 23 977,
1118 11:32:38.035090 TX Bit2 (976~995) 20 985, Bit10 (969~990) 22 979,
1119 11:32:38.038322 TX Bit3 (969~990) 22 979, Bit11 (965~987) 23 976,
1120 11:32:38.041951 TX Bit4 (976~996) 21 986, Bit12 (966~988) 23 977,
1121 11:32:38.048595 TX Bit5 (973~990) 18 981, Bit13 (966~986) 21 976,
1122 11:32:38.052136 TX Bit6 (974~991) 18 982, Bit14 (967~986) 20 976,
1123 11:32:38.055498 TX Bit7 (974~993) 20 983, Bit15 (968~989) 22 978,
1124 11:32:38.055573
1125 11:32:38.058347 Write Rank0 MR14 =0x8
1126 11:32:38.067086
1127 11:32:38.067160 CH=0, VrefRange= 0, VrefLevel = 8
1128 11:32:38.073839 TX Bit0 (976~997) 22 986, Bit8 (964~985) 22 974,
1129 11:32:38.077402 TX Bit1 (976~995) 20 985, Bit9 (966~988) 23 977,
1130 11:32:38.084171 TX Bit2 (976~996) 21 986, Bit10 (969~991) 23 980,
1131 11:32:38.087384 TX Bit3 (969~990) 22 979, Bit11 (964~988) 25 976,
1132 11:32:38.090559 TX Bit4 (975~997) 23 986, Bit12 (966~988) 23 977,
1133 11:32:38.097448 TX Bit5 (972~990) 19 981, Bit13 (966~987) 22 976,
1134 11:32:38.100803 TX Bit6 (974~991) 18 982, Bit14 (966~987) 22 976,
1135 11:32:38.104188 TX Bit7 (974~994) 21 984, Bit15 (968~989) 22 978,
1136 11:32:38.104263
1137 11:32:38.107461 Write Rank0 MR14 =0xa
1138 11:32:38.116196
1139 11:32:38.119532 CH=0, VrefRange= 0, VrefLevel = 10
1140 11:32:38.170971 TX Bit0 (976~997) 22 986, Bit8 (963~986) 24 974,
1141 11:32:38.171337 TX Bit1 (975~995) 21 985, Bit9 (965~989) 25 977,
1142 11:32:38.171413 TX Bit2 (976~997) 22 986, Bit10 (969~991) 23 980,
1143 11:32:38.171795 TX Bit3 (969~991) 23 980, Bit11 (964~988) 25 976,
1144 11:32:38.172155 TX Bit4 (975~997) 23 986, Bit12 (966~989) 24 977,
1145 11:32:38.172411 TX Bit5 (971~991) 21 981, Bit13 (965~987) 23 976,
1146 11:32:38.172719 TX Bit6 (973~992) 20 982, Bit14 (966~988) 23 977,
1147 11:32:38.172794 TX Bit7 (973~994) 22 983, Bit15 (968~990) 23 979,
1148 11:32:38.173049
1149 11:32:38.173126 Write Rank0 MR14 =0xc
1150 11:32:38.173179
1151 11:32:38.173238 CH=0, VrefRange= 0, VrefLevel = 12
1152 11:32:38.173314 TX Bit0 (976~998) 23 987, Bit8 (963~987) 25 975,
1153 11:32:38.204188 TX Bit1 (976~996) 21 986, Bit9 (965~989) 25 977,
1154 11:32:38.204444 TX Bit2 (975~997) 23 986, Bit10 (969~991) 23 980,
1155 11:32:38.204520 TX Bit3 (968~990) 23 979, Bit11 (964~988) 25 976,
1156 11:32:38.204756 TX Bit4 (975~997) 23 986, Bit12 (966~989) 24 977,
1157 11:32:38.204814 TX Bit5 (971~991) 21 981, Bit13 (965~988) 24 976,
1158 11:32:38.204876 TX Bit6 (972~992) 21 982, Bit14 (965~988) 24 976,
1159 11:32:38.208023 TX Bit7 (973~994) 22 983, Bit15 (967~990) 24 978,
1160 11:32:38.208099
1161 11:32:38.208157 Write Rank0 MR14 =0xe
1162 11:32:38.214962
1163 11:32:38.218302 CH=0, VrefRange= 0, VrefLevel = 14
1164 11:32:38.221575 TX Bit0 (976~998) 23 987, Bit8 (963~987) 25 975,
1165 11:32:38.224846 TX Bit1 (975~996) 22 985, Bit9 (965~989) 25 977,
1166 11:32:38.231530 TX Bit2 (975~997) 23 986, Bit10 (969~992) 24 980,
1167 11:32:38.234900 TX Bit3 (968~991) 24 979, Bit11 (963~989) 27 976,
1168 11:32:38.238042 TX Bit4 (974~998) 25 986, Bit12 (965~989) 25 977,
1169 11:32:38.244804 TX Bit5 (970~991) 22 980, Bit13 (965~988) 24 976,
1170 11:32:38.248540 TX Bit6 (971~993) 23 982, Bit14 (965~989) 25 977,
1171 11:32:38.251555 TX Bit7 (972~995) 24 983, Bit15 (968~990) 23 979,
1172 11:32:38.251632
1173 11:32:38.254896 Write Rank0 MR14 =0x10
1174 11:32:38.264207
1175 11:32:38.267547 CH=0, VrefRange= 0, VrefLevel = 16
1176 11:32:38.271260 TX Bit0 (976~999) 24 987, Bit8 (962~988) 27 975,
1177 11:32:38.274404 TX Bit1 (976~997) 22 986, Bit9 (964~989) 26 976,
1178 11:32:38.281058 TX Bit2 (975~998) 24 986, Bit10 (968~992) 25 980,
1179 11:32:38.284519 TX Bit3 (968~991) 24 979, Bit11 (964~989) 26 976,
1180 11:32:38.287872 TX Bit4 (974~998) 25 986, Bit12 (965~989) 25 977,
1181 11:32:38.294349 TX Bit5 (970~992) 23 981, Bit13 (964~988) 25 976,
1182 11:32:38.297821 TX Bit6 (971~993) 23 982, Bit14 (965~989) 25 977,
1183 11:32:38.301287 TX Bit7 (971~996) 26 983, Bit15 (967~991) 25 979,
1184 11:32:38.301378
1185 11:32:38.304694 Write Rank0 MR14 =0x12
1186 11:32:38.313843
1187 11:32:38.317114 CH=0, VrefRange= 0, VrefLevel = 18
1188 11:32:38.320488 TX Bit0 (975~999) 25 987, Bit8 (962~988) 27 975,
1189 11:32:38.323859 TX Bit1 (975~997) 23 986, Bit9 (964~989) 26 976,
1190 11:32:38.330577 TX Bit2 (975~998) 24 986, Bit10 (969~992) 24 980,
1191 11:32:38.334175 TX Bit3 (968~992) 25 980, Bit11 (963~989) 27 976,
1192 11:32:38.337217 TX Bit4 (974~998) 25 986, Bit12 (965~989) 25 977,
1193 11:32:38.343934 TX Bit5 (970~992) 23 981, Bit13 (965~989) 25 977,
1194 11:32:38.347435 TX Bit6 (971~994) 24 982, Bit14 (964~989) 26 976,
1195 11:32:38.351076 TX Bit7 (971~997) 27 984, Bit15 (967~991) 25 979,
1196 11:32:38.351153
1197 11:32:38.353851 Write Rank0 MR14 =0x14
1198 11:32:38.363316
1199 11:32:38.366873 CH=0, VrefRange= 0, VrefLevel = 20
1200 11:32:38.370466 TX Bit0 (975~999) 25 987, Bit8 (962~989) 28 975,
1201 11:32:38.373448 TX Bit1 (975~997) 23 986, Bit9 (964~989) 26 976,
1202 11:32:38.380321 TX Bit2 (974~998) 25 986, Bit10 (968~992) 25 980,
1203 11:32:38.383729 TX Bit3 (967~992) 26 979, Bit11 (963~989) 27 976,
1204 11:32:38.386810 TX Bit4 (974~999) 26 986, Bit12 (964~989) 26 976,
1205 11:32:38.393556 TX Bit5 (970~993) 24 981, Bit13 (963~989) 27 976,
1206 11:32:38.397154 TX Bit6 (970~994) 25 982, Bit14 (963~989) 27 976,
1207 11:32:38.400143 TX Bit7 (971~997) 27 984, Bit15 (966~991) 26 978,
1208 11:32:38.400219
1209 11:32:38.403560 Write Rank0 MR14 =0x16
1210 11:32:38.412811
1211 11:32:38.416409 CH=0, VrefRange= 0, VrefLevel = 22
1212 11:32:38.419806 TX Bit0 (975~999) 25 987, Bit8 (962~989) 28 975,
1213 11:32:38.422966 TX Bit1 (975~997) 23 986, Bit9 (964~989) 26 976,
1214 11:32:38.429964 TX Bit2 (974~998) 25 986, Bit10 (968~992) 25 980,
1215 11:32:38.432861 TX Bit3 (967~992) 26 979, Bit11 (963~989) 27 976,
1216 11:32:38.436209 TX Bit4 (974~999) 26 986, Bit12 (964~989) 26 976,
1217 11:32:38.443166 TX Bit5 (970~993) 24 981, Bit13 (963~989) 27 976,
1218 11:32:38.446415 TX Bit6 (970~994) 25 982, Bit14 (963~989) 27 976,
1219 11:32:38.449510 TX Bit7 (971~997) 27 984, Bit15 (966~991) 26 978,
1220 11:32:38.449586
1221 11:32:38.453215 Write Rank0 MR14 =0x18
1222 11:32:38.462174
1223 11:32:38.465855 CH=0, VrefRange= 0, VrefLevel = 24
1224 11:32:38.469258 TX Bit0 (975~999) 25 987, Bit8 (963~988) 26 975,
1225 11:32:38.472297 TX Bit1 (975~998) 24 986, Bit9 (965~988) 24 976,
1226 11:32:38.479376 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1227 11:32:38.482554 TX Bit3 (968~991) 24 979, Bit11 (964~989) 26 976,
1228 11:32:38.486154 TX Bit4 (974~998) 25 986, Bit12 (965~989) 25 977,
1229 11:32:38.492642 TX Bit5 (969~993) 25 981, Bit13 (963~988) 26 975,
1230 11:32:38.495847 TX Bit6 (970~994) 25 982, Bit14 (965~988) 24 976,
1231 11:32:38.499221 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1232 11:32:38.499297
1233 11:32:38.502529 Write Rank0 MR14 =0x1a
1234 11:32:38.511922
1235 11:32:38.515184 CH=0, VrefRange= 0, VrefLevel = 26
1236 11:32:38.518659 TX Bit0 (975~999) 25 987, Bit8 (963~988) 26 975,
1237 11:32:38.522006 TX Bit1 (975~998) 24 986, Bit9 (965~988) 24 976,
1238 11:32:38.528691 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1239 11:32:38.532137 TX Bit3 (968~991) 24 979, Bit11 (964~989) 26 976,
1240 11:32:38.535423 TX Bit4 (974~998) 25 986, Bit12 (965~989) 25 977,
1241 11:32:38.542178 TX Bit5 (969~993) 25 981, Bit13 (963~988) 26 975,
1242 11:32:38.545801 TX Bit6 (970~994) 25 982, Bit14 (965~988) 24 976,
1243 11:32:38.548831 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1244 11:32:38.548906
1245 11:32:38.552156 Write Rank0 MR14 =0x1c
1246 11:32:38.561518
1247 11:32:38.564734 CH=0, VrefRange= 0, VrefLevel = 28
1248 11:32:38.568389 TX Bit0 (975~999) 25 987, Bit8 (963~988) 26 975,
1249 11:32:38.571604 TX Bit1 (975~998) 24 986, Bit9 (965~988) 24 976,
1250 11:32:38.578444 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1251 11:32:38.581737 TX Bit3 (968~991) 24 979, Bit11 (964~989) 26 976,
1252 11:32:38.584792 TX Bit4 (974~998) 25 986, Bit12 (965~989) 25 977,
1253 11:32:38.591604 TX Bit5 (969~993) 25 981, Bit13 (963~988) 26 975,
1254 11:32:38.595023 TX Bit6 (970~994) 25 982, Bit14 (965~988) 24 976,
1255 11:32:38.598281 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1256 11:32:38.598357
1257 11:32:38.601581 Write Rank0 MR14 =0x1e
1258 11:32:38.610795
1259 11:32:38.614107 CH=0, VrefRange= 0, VrefLevel = 30
1260 11:32:38.617480 TX Bit0 (975~999) 25 987, Bit8 (963~988) 26 975,
1261 11:32:38.620651 TX Bit1 (975~998) 24 986, Bit9 (965~988) 24 976,
1262 11:32:38.627747 TX Bit2 (974~998) 25 986, Bit10 (968~991) 24 979,
1263 11:32:38.631310 TX Bit3 (968~991) 24 979, Bit11 (964~989) 26 976,
1264 11:32:38.634754 TX Bit4 (974~998) 25 986, Bit12 (965~989) 25 977,
1265 11:32:38.641068 TX Bit5 (969~993) 25 981, Bit13 (963~988) 26 975,
1266 11:32:38.644621 TX Bit6 (970~994) 25 982, Bit14 (965~988) 24 976,
1267 11:32:38.647899 TX Bit7 (971~995) 25 983, Bit15 (966~990) 25 978,
1268 11:32:38.647975
1269 11:32:38.648033
1270 11:32:38.651617 TX Vref found, early break! 365< 378
1271 11:32:38.658000 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
1272 11:32:38.661400 u1DelayCellOfst[0]=10 cells (8 PI)
1273 11:32:38.665011 u1DelayCellOfst[1]=9 cells (7 PI)
1274 11:32:38.668385 u1DelayCellOfst[2]=9 cells (7 PI)
1275 11:32:38.668460 u1DelayCellOfst[3]=0 cells (0 PI)
1276 11:32:38.671220 u1DelayCellOfst[4]=9 cells (7 PI)
1277 11:32:38.674976 u1DelayCellOfst[5]=2 cells (2 PI)
1278 11:32:38.677996 u1DelayCellOfst[6]=3 cells (3 PI)
1279 11:32:38.681475 u1DelayCellOfst[7]=5 cells (4 PI)
1280 11:32:38.685047 Byte0, DQ PI dly=979, DQM PI dly= 983
1281 11:32:38.688031 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1282 11:32:38.688107
1283 11:32:38.694934 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1284 11:32:38.695010
1285 11:32:38.698338 u1DelayCellOfst[8]=0 cells (0 PI)
1286 11:32:38.701345 u1DelayCellOfst[9]=1 cells (1 PI)
1287 11:32:38.701420 u1DelayCellOfst[10]=5 cells (4 PI)
1288 11:32:38.704974 u1DelayCellOfst[11]=1 cells (1 PI)
1289 11:32:38.708179 u1DelayCellOfst[12]=2 cells (2 PI)
1290 11:32:38.711774 u1DelayCellOfst[13]=0 cells (0 PI)
1291 11:32:38.714917 u1DelayCellOfst[14]=1 cells (1 PI)
1292 11:32:38.718310 u1DelayCellOfst[15]=3 cells (3 PI)
1293 11:32:38.721558 Byte1, DQ PI dly=975, DQM PI dly= 977
1294 11:32:38.724954 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1295 11:32:38.725029
1296 11:32:38.732252 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1297 11:32:38.732328
1298 11:32:38.732387 Write Rank0 MR14 =0x18
1299 11:32:38.732441
1300 11:32:38.735029 Final TX Range 0 Vref 24
1301 11:32:38.735105
1302 11:32:38.741634 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1303 11:32:38.741711
1304 11:32:38.748734 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1305 11:32:38.754997 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1306 11:32:38.761982 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1307 11:32:38.765384 Write Rank0 MR3 =0xb0
1308 11:32:38.765458 DramC Write-DBI on
1309 11:32:38.765516 ==
1310 11:32:38.772225 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1311 11:32:38.775520 fsp= 1, odt_onoff= 1, Byte mode= 0
1312 11:32:38.775619 ==
1313 11:32:38.778751 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1314 11:32:38.778826
1315 11:32:38.782206 Begin, DQ Scan Range 697~761
1316 11:32:38.782280
1317 11:32:38.782390
1318 11:32:38.785559 TX Vref Scan disable
1319 11:32:38.788728 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1320 11:32:38.792467 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1321 11:32:38.795871 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1322 11:32:38.799215 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1323 11:32:38.802252 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1324 11:32:38.805484 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1325 11:32:38.808908 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1326 11:32:38.812650 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1327 11:32:38.815885 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1328 11:32:38.819213 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1329 11:32:38.822464 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1330 11:32:38.825936 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1331 11:32:38.829469 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1332 11:32:38.832547 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1333 11:32:38.835857 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1334 11:32:38.838974 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1335 11:32:38.842477 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1336 11:32:38.851682 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1337 11:32:38.855187 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1338 11:32:38.858359 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1339 11:32:38.861908 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1340 11:32:38.865207 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1341 11:32:38.868457 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1342 11:32:38.871720 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1343 11:32:38.875208 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1344 11:32:38.878594 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1345 11:32:38.881827 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
1346 11:32:38.885143 Byte0, DQ PI dly=728, DQM PI dly= 728
1347 11:32:38.888853 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
1348 11:32:38.888931
1349 11:32:38.895537 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
1350 11:32:38.895613
1351 11:32:38.898736 Byte1, DQ PI dly=719, DQM PI dly= 719
1352 11:32:38.902130 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 15)
1353 11:32:38.902206
1354 11:32:38.905438 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 15)
1355 11:32:38.905516
1356 11:32:38.912532 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1357 11:32:38.918954 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1358 11:32:38.925630 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1359 11:32:38.928989 Write Rank0 MR3 =0x30
1360 11:32:38.932191 DramC Write-DBI off
1361 11:32:38.932266
1362 11:32:38.932324 [DATLAT]
1363 11:32:38.935810 Freq=1600, CH0 RK0, use_rxtx_scan=0
1364 11:32:38.935886
1365 11:32:38.935945 DATLAT Default: 0xf
1366 11:32:38.939143 7, 0xFFFF, sum=0
1367 11:32:38.939221 8, 0xFFFF, sum=0
1368 11:32:38.942442 9, 0xFFFF, sum=0
1369 11:32:38.942518 10, 0xFFFF, sum=0
1370 11:32:38.946052 11, 0xFFFF, sum=0
1371 11:32:38.946129 12, 0xFFFF, sum=0
1372 11:32:38.949167 13, 0xFFFF, sum=0
1373 11:32:38.949306 14, 0x0, sum=1
1374 11:32:38.952525 15, 0x0, sum=2
1375 11:32:38.952602 16, 0x0, sum=3
1376 11:32:38.952661 17, 0x0, sum=4
1377 11:32:38.959267 pattern=2 first_step=14 total pass=5 best_step=16
1378 11:32:38.959342 ==
1379 11:32:38.962532 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1380 11:32:38.965745 fsp= 1, odt_onoff= 1, Byte mode= 0
1381 11:32:38.965823 ==
1382 11:32:38.972672 Start DQ dly to find pass range UseTestEngine =1
1383 11:32:38.975742 x-axis: bit #, y-axis: DQ dly (-127~63)
1384 11:32:38.975818 RX Vref Scan = 1
1385 11:32:39.098677
1386 11:32:39.098775 RX Vref found, early break!
1387 11:32:39.098835
1388 11:32:39.102258 Final RX Vref 13, apply to both rank0 and 1
1389 11:32:39.105806 ==
1390 11:32:39.109108 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1391 11:32:39.112393 fsp= 1, odt_onoff= 1, Byte mode= 0
1392 11:32:39.112470 ==
1393 11:32:39.112528 DQS Delay:
1394 11:32:39.115616 DQS0 = 0, DQS1 = 0
1395 11:32:39.115692 DQM Delay:
1396 11:32:39.119255 DQM0 = 19, DQM1 = 18
1397 11:32:39.119330 DQ Delay:
1398 11:32:39.122227 DQ0 =25, DQ1 =23, DQ2 =23, DQ3 =13
1399 11:32:39.125672 DQ4 =22, DQ5 =16, DQ6 =17, DQ7 =18
1400 11:32:39.129191 DQ8 =17, DQ9 =19, DQ10 =22, DQ11 =17
1401 11:32:39.132784 DQ12 =18, DQ13 =16, DQ14 =17, DQ15 =19
1402 11:32:39.132860
1403 11:32:39.132921
1404 11:32:39.132976
1405 11:32:39.135594 [DramC_TX_OE_Calibration] TA2
1406 11:32:39.139009 Original DQ_B0 (3 6) =30, OEN = 27
1407 11:32:39.142849 Original DQ_B1 (3 6) =30, OEN = 27
1408 11:32:39.142936 23, 0x0, End_B0=23 End_B1=23
1409 11:32:39.145805 24, 0x0, End_B0=24 End_B1=24
1410 11:32:39.149065 25, 0x0, End_B0=25 End_B1=25
1411 11:32:39.152579 26, 0x0, End_B0=26 End_B1=26
1412 11:32:39.156368 27, 0x0, End_B0=27 End_B1=27
1413 11:32:39.156445 28, 0x0, End_B0=28 End_B1=28
1414 11:32:39.159293 29, 0x0, End_B0=29 End_B1=29
1415 11:32:39.162622 30, 0x0, End_B0=30 End_B1=30
1416 11:32:39.166076 31, 0xFFFF, End_B0=30 End_B1=30
1417 11:32:39.169491 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1418 11:32:39.176225 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1419 11:32:39.176302
1420 11:32:39.176360
1421 11:32:39.180068 Write Rank0 MR23 =0x3f
1422 11:32:39.180144 [DQSOSC]
1423 11:32:39.186281 [DQSOSCAuto] RK0, (LSB)MR18= 0x9b, (MSB)MR19= 0x3, tDQSOscB0 = 341 ps tDQSOscB1 = 0 ps
1424 11:32:39.192895 CH0_RK0: MR19=0x3, MR18=0x9B, DQSOSC=341, MR23=63, INC=21, DEC=31
1425 11:32:39.192972 Write Rank0 MR23 =0x3f
1426 11:32:39.196141 [DQSOSC]
1427 11:32:39.203454 [DQSOSCAuto] RK0, (LSB)MR18= 0x9e, (MSB)MR19= 0x3, tDQSOscB0 = 340 ps tDQSOscB1 = 0 ps
1428 11:32:39.206562 CH0 RK0: MR19=3, MR18=9E
1429 11:32:39.209589 [RankSwap] Rank num 2, (Multi 1), Rank 1
1430 11:32:39.209666 Write Rank0 MR2 =0xad
1431 11:32:39.213146 [Write Leveling]
1432 11:32:39.216262 delay byte0 byte1 byte2 byte3
1433 11:32:39.216337
1434 11:32:39.216397 10 0 0
1435 11:32:39.219745 11 0 0
1436 11:32:39.219821 12 0 0
1437 11:32:39.219881 13 0 0
1438 11:32:39.223041 14 0 0
1439 11:32:39.223158 15 0 0
1440 11:32:39.226213 16 0 0
1441 11:32:39.226289 17 0 0
1442 11:32:39.226349 18 0 0
1443 11:32:39.230170 19 0 0
1444 11:32:39.230247 20 0 0
1445 11:32:39.233475 21 0 0
1446 11:32:39.233551 22 0 0
1447 11:32:39.236575 23 0 0
1448 11:32:39.236652 24 0 0
1449 11:32:39.236712 25 0 0
1450 11:32:39.239774 26 0 0
1451 11:32:39.239850 27 0 0
1452 11:32:39.243282 28 0 0
1453 11:32:39.243359 29 0 0
1454 11:32:39.243419 30 0 ff
1455 11:32:39.246655 31 0 ff
1456 11:32:39.246732 32 0 ff
1457 11:32:39.250004 33 0 ff
1458 11:32:39.250097 34 0 ff
1459 11:32:39.253151 35 ff ff
1460 11:32:39.253289 36 ff ff
1461 11:32:39.256721 37 ff ff
1462 11:32:39.256823 38 ff ff
1463 11:32:39.256910 39 ff ff
1464 11:32:39.260074 40 ff ff
1465 11:32:39.260151 41 ff ff
1466 11:32:39.266920 pass bytecount = 0xff (0xff: all bytes pass)
1467 11:32:39.266996
1468 11:32:39.267055 DQS0 dly: 35
1469 11:32:39.267111 DQS1 dly: 30
1470 11:32:39.270186 Write Rank0 MR2 =0x2d
1471 11:32:39.273781 [RankSwap] Rank num 2, (Multi 1), Rank 0
1472 11:32:39.276935 Write Rank1 MR1 =0xd6
1473 11:32:39.277011 [Gating]
1474 11:32:39.277070 ==
1475 11:32:39.280299 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1476 11:32:39.283636 fsp= 1, odt_onoff= 1, Byte mode= 0
1477 11:32:39.283713 ==
1478 11:32:39.290062 3 1 0 |3534 1615 |(11 11)(11 11) |(0 0)(0 0)| 0
1479 11:32:39.293668 3 1 4 |3534 d0c |(11 11)(11 11) |(1 1)(0 0)| 0
1480 11:32:39.296783 3 1 8 |3534 3636 |(11 11)(11 11) |(1 1)(1 1)| 0
1481 11:32:39.303586 3 1 12 |3534 3535 |(11 11)(11 11) |(1 1)(1 1)| 0
1482 11:32:39.307152 3 1 16 |3534 3131 |(11 11)(11 11) |(0 0)(0 1)| 0
1483 11:32:39.310447 3 1 20 |3534 2827 |(11 11)(11 11) |(0 0)(0 1)| 0
1484 11:32:39.317012 3 1 24 |3534 3434 |(11 11)(0 0) |(0 0)(0 1)| 0
1485 11:32:39.320411 3 1 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1486 11:32:39.324047 3 2 0 |3534 1a1a |(11 11)(11 11) |(0 1)(0 1)| 0
1487 11:32:39.327036 3 2 4 |3534 3433 |(11 11)(11 11) |(0 1)(0 1)| 0
1488 11:32:39.333972 3 2 8 |807 202 |(11 11)(11 11) |(1 1)(1 1)| 0
1489 11:32:39.337279 3 2 12 |3d3d 808 |(11 11)(11 11) |(1 1)(1 1)| 0
1490 11:32:39.340360 3 2 16 |3d3d 2525 |(11 11)(11 11) |(1 1)(1 1)| 0
1491 11:32:39.347250 3 2 20 |3d3d 1717 |(11 11)(11 11) |(1 1)(1 1)| 0
1492 11:32:39.350545 3 2 24 |3d3d 3d3d |(11 11)(0 0) |(1 1)(1 1)| 0
1493 11:32:39.354093 3 2 28 |3d3d e0d |(11 11)(11 11) |(1 1)(1 1)| 0
1494 11:32:39.357307 3 3 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1495 11:32:39.364152 3 3 4 |3d3d 1313 |(11 11)(1 1) |(1 1)(1 1)| 0
1496 11:32:39.367614 3 3 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1497 11:32:39.370773 3 3 12 |3d3d 3c3c |(11 11)(0 0) |(1 1)(1 1)| 0
1498 11:32:39.374134 3 3 16 |1b1a 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1499 11:32:39.380968 3 3 20 |e0e 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1500 11:32:39.384227 [Byte 0] Lead/lag Transition tap number (1)
1501 11:32:39.387923 [Byte 1] Lead/lag falling Transition (3, 3, 20)
1502 11:32:39.391143 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1503 11:32:39.398119 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1504 11:32:39.401103 3 4 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1505 11:32:39.404472 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1506 11:32:39.408125 3 4 8 |403 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1507 11:32:39.414587 3 4 12 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1508 11:32:39.418241 3 4 16 |3d3d 505 |(11 11)(11 11) |(1 1)(1 1)| 0
1509 11:32:39.421161 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1510 11:32:39.428015 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1511 11:32:39.431153 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1512 11:32:39.434886 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1513 11:32:39.441731 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1514 11:32:39.445383 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1515 11:32:39.448061 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1516 11:32:39.451670 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1517 11:32:39.458504 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1518 11:32:39.461393 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1519 11:32:39.464709 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1520 11:32:39.471515 [Byte 0] Lead/lag falling Transition (3, 5, 28)
1521 11:32:39.474799 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1522 11:32:39.478217 [Byte 1] Lead/lag falling Transition (3, 6, 0)
1523 11:32:39.481974 3 6 4 |3e3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1524 11:32:39.488508 [Byte 1] Lead/lag Transition tap number (2)
1525 11:32:39.491677 3 6 8 |202 3e3d |(11 11)(11 11) |(1 0)(0 0)| 0
1526 11:32:39.495182 [Byte 0] Lead/lag Transition tap number (4)
1527 11:32:39.498754 3 6 12 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
1528 11:32:39.501603 [Byte 0]First pass (3, 6, 12)
1529 11:32:39.505128 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1530 11:32:39.508842 [Byte 1]First pass (3, 6, 16)
1531 11:32:39.512046 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1532 11:32:39.515195 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1533 11:32:39.522207 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1534 11:32:39.525169 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1535 11:32:39.529197 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1536 11:32:39.532076 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1537 11:32:39.535573 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1538 11:32:39.542361 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1539 11:32:39.545560 All bytes gating window > 1UI, Early break!
1540 11:32:39.545635
1541 11:32:39.549028 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 4)
1542 11:32:39.549142
1543 11:32:39.552522 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 4)
1544 11:32:39.552598
1545 11:32:39.552655
1546 11:32:39.552708
1547 11:32:39.555706 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1548 11:32:39.555783
1549 11:32:39.559175 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 4)
1550 11:32:39.559272
1551 11:32:39.559358
1552 11:32:39.562309 Write Rank1 MR1 =0x56
1553 11:32:39.562398
1554 11:32:39.565603 best RODT dly(2T, 0.5T) = (2, 3)
1555 11:32:39.565692
1556 11:32:39.569391 best RODT dly(2T, 0.5T) = (2, 3)
1557 11:32:39.569467 ==
1558 11:32:39.572643 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1559 11:32:39.575933 fsp= 1, odt_onoff= 1, Byte mode= 0
1560 11:32:39.576008 ==
1561 11:32:39.582675 Start DQ dly to find pass range UseTestEngine =0
1562 11:32:39.585816 x-axis: bit #, y-axis: DQ dly (-127~63)
1563 11:32:39.585891 RX Vref Scan = 0
1564 11:32:39.589208 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1565 11:32:39.592841 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1566 11:32:39.596150 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1567 11:32:39.599659 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1568 11:32:39.603111 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1569 11:32:39.606131 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1570 11:32:39.606207 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1571 11:32:39.609498 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1572 11:32:39.612809 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1573 11:32:39.616717 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1574 11:32:39.619693 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1575 11:32:39.623325 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1576 11:32:39.626479 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1577 11:32:39.626556 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1578 11:32:39.629493 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1579 11:32:39.632940 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1580 11:32:39.636558 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1581 11:32:39.639599 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1582 11:32:39.642975 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1583 11:32:39.646215 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1584 11:32:39.649919 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1585 11:32:39.649996 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1586 11:32:39.653119 -4, [0] xxxoxxxx xxxxxxxx [MSB]
1587 11:32:39.656603 -3, [0] xxxoxxxx xxxxxxxx [MSB]
1588 11:32:39.660138 -2, [0] xxxoxoxx xxxxxxxx [MSB]
1589 11:32:39.663422 -1, [0] xxxoxooo oxxxxxxx [MSB]
1590 11:32:39.666570 0, [0] xxxoxooo oxxoxxox [MSB]
1591 11:32:39.666647 1, [0] xxxoxooo ooxoooox [MSB]
1592 11:32:39.669765 2, [0] xxxoxooo ooxooooo [MSB]
1593 11:32:39.673807 3, [0] xxxoxooo ooxooooo [MSB]
1594 11:32:39.676834 4, [0] xxxooooo ooxooooo [MSB]
1595 11:32:39.679921 5, [0] xooooooo oooooooo [MSB]
1596 11:32:39.683644 33, [0] oooxoooo oooooooo [MSB]
1597 11:32:39.683722 34, [0] oooxoxoo oooooooo [MSB]
1598 11:32:39.686720 35, [0] oooxoxoo oooxoooo [MSB]
1599 11:32:39.690238 36, [0] oooxoxxx xooxooxo [MSB]
1600 11:32:39.693172 37, [0] oooxoxxx xooxoxxo [MSB]
1601 11:32:39.696724 38, [0] oooxoxxx xxoxoxxo [MSB]
1602 11:32:39.700217 39, [0] oooxoxxx xxoxxxxo [MSB]
1603 11:32:39.703563 40, [0] oxoxxxxx xxoxxxxx [MSB]
1604 11:32:39.703639 41, [0] oxxxxxxx xxoxxxxx [MSB]
1605 11:32:39.707045 42, [0] xxxxxxxx xxoxxxxx [MSB]
1606 11:32:39.710251 43, [0] xxxxxxxx xxxxxxxx [MSB]
1607 11:32:39.713482 iDelay=43, Bit 0, Center 23 (6 ~ 41) 36
1608 11:32:39.717214 iDelay=43, Bit 1, Center 22 (5 ~ 39) 35
1609 11:32:39.720554 iDelay=43, Bit 2, Center 22 (5 ~ 40) 36
1610 11:32:39.723855 iDelay=43, Bit 3, Center 14 (-4 ~ 32) 37
1611 11:32:39.726941 iDelay=43, Bit 4, Center 21 (4 ~ 39) 36
1612 11:32:39.730515 iDelay=43, Bit 5, Center 15 (-2 ~ 33) 36
1613 11:32:39.734020 iDelay=43, Bit 6, Center 17 (-1 ~ 35) 37
1614 11:32:39.740542 iDelay=43, Bit 7, Center 17 (-1 ~ 35) 37
1615 11:32:39.743721 iDelay=43, Bit 8, Center 17 (-1 ~ 35) 37
1616 11:32:39.747452 iDelay=43, Bit 9, Center 19 (1 ~ 37) 37
1617 11:32:39.750959 iDelay=43, Bit 10, Center 23 (5 ~ 42) 38
1618 11:32:39.753843 iDelay=43, Bit 11, Center 17 (0 ~ 34) 35
1619 11:32:39.757365 iDelay=43, Bit 12, Center 19 (1 ~ 38) 38
1620 11:32:39.760610 iDelay=43, Bit 13, Center 18 (1 ~ 36) 36
1621 11:32:39.764713 iDelay=43, Bit 14, Center 17 (0 ~ 35) 36
1622 11:32:39.767328 iDelay=43, Bit 15, Center 20 (2 ~ 39) 38
1623 11:32:39.767420 ==
1624 11:32:39.774103 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1625 11:32:39.777501 fsp= 1, odt_onoff= 1, Byte mode= 0
1626 11:32:39.777572 ==
1627 11:32:39.777630 DQS Delay:
1628 11:32:39.781056 DQS0 = 0, DQS1 = 0
1629 11:32:39.781142 DQM Delay:
1630 11:32:39.781221 DQM0 = 18, DQM1 = 18
1631 11:32:39.784577 DQ Delay:
1632 11:32:39.787421 DQ0 =23, DQ1 =22, DQ2 =22, DQ3 =14
1633 11:32:39.790940 DQ4 =21, DQ5 =15, DQ6 =17, DQ7 =17
1634 11:32:39.794187 DQ8 =17, DQ9 =19, DQ10 =23, DQ11 =17
1635 11:32:39.797620 DQ12 =19, DQ13 =18, DQ14 =17, DQ15 =20
1636 11:32:39.797721
1637 11:32:39.797804
1638 11:32:39.797883 DramC Write-DBI off
1639 11:32:39.797962 ==
1640 11:32:39.804398 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1641 11:32:39.807603 fsp= 1, odt_onoff= 1, Byte mode= 0
1642 11:32:39.807728 ==
1643 11:32:39.811384 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1644 11:32:39.811459
1645 11:32:39.814292 Begin, DQ Scan Range 926~1182
1646 11:32:39.814367
1647 11:32:39.814425
1648 11:32:39.817570 TX Vref Scan disable
1649 11:32:39.820876 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1650 11:32:39.824540 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1651 11:32:39.827742 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1652 11:32:39.831202 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1653 11:32:39.834508 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1654 11:32:39.837699 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1655 11:32:39.841244 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1656 11:32:39.844341 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1657 11:32:39.848085 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1658 11:32:39.851651 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1659 11:32:39.854452 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1660 11:32:39.857993 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1661 11:32:39.861613 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1662 11:32:39.864791 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1663 11:32:39.868090 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1664 11:32:39.871450 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1665 11:32:39.875017 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1666 11:32:39.881618 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1667 11:32:39.884833 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1668 11:32:39.888410 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1669 11:32:39.891774 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1670 11:32:39.895097 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1671 11:32:39.898379 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1672 11:32:39.902192 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1673 11:32:39.905145 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1674 11:32:39.908243 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1675 11:32:39.911827 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1676 11:32:39.914960 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1677 11:32:39.918365 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1678 11:32:39.921911 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1679 11:32:39.925625 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1680 11:32:39.928663 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1681 11:32:39.931789 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1682 11:32:39.935133 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1683 11:32:39.938470 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1684 11:32:39.941896 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1685 11:32:39.945367 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1686 11:32:39.948493 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1687 11:32:39.952019 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1688 11:32:39.958638 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1689 11:32:39.961957 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1690 11:32:39.965592 967 |3 6 7|[0] xxxxxxxx oxxoxxxx [MSB]
1691 11:32:39.968805 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1692 11:32:39.971878 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1693 11:32:39.975483 970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]
1694 11:32:39.978795 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1695 11:32:39.981977 972 |3 6 12|[0] xxxxxxxx ooxooooo [MSB]
1696 11:32:39.985643 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1697 11:32:39.988723 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1698 11:32:39.992032 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1699 11:32:39.995531 976 |3 6 16|[0] xxxooooo oooooooo [MSB]
1700 11:32:40.002768 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1701 11:32:40.005856 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1702 11:32:40.009534 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1703 11:32:40.012847 993 |3 6 33|[0] oooxoooo xxxxxxxx [MSB]
1704 11:32:40.016075 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
1705 11:32:40.019312 995 |3 6 35|[0] oooxoxoo xxxxxxxx [MSB]
1706 11:32:40.022710 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1707 11:32:40.026258 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1708 11:32:40.029269 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1709 11:32:40.032874 Byte0, DQ PI dly=984, DQM PI dly= 984
1710 11:32:40.036182 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 24)
1711 11:32:40.036263
1712 11:32:40.043073 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 24)
1713 11:32:40.043148
1714 11:32:40.046022 Byte1, DQ PI dly=979, DQM PI dly= 979
1715 11:32:40.049824 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1716 11:32:40.049901
1717 11:32:40.052795 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1718 11:32:40.052871
1719 11:32:40.052928 ==
1720 11:32:40.059542 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1721 11:32:40.062890 fsp= 1, odt_onoff= 1, Byte mode= 0
1722 11:32:40.062965 ==
1723 11:32:40.066125 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1724 11:32:40.066200
1725 11:32:40.069938 Begin, DQ Scan Range 955~1019
1726 11:32:40.072780 Write Rank1 MR14 =0x0
1727 11:32:40.080230
1728 11:32:40.080306 CH=0, VrefRange= 0, VrefLevel = 0
1729 11:32:40.087018 TX Bit0 (979~997) 19 988, Bit8 (968~988) 21 978,
1730 11:32:40.090615 TX Bit1 (978~996) 19 987, Bit9 (969~988) 20 978,
1731 11:32:40.094136 TX Bit2 (978~997) 20 987, Bit10 (976~991) 16 983,
1732 11:32:40.100662 TX Bit3 (974~990) 17 982, Bit11 (969~987) 19 978,
1733 11:32:40.104021 TX Bit4 (977~997) 21 987, Bit12 (970~989) 20 979,
1734 11:32:40.110664 TX Bit5 (976~990) 15 983, Bit13 (970~986) 17 978,
1735 11:32:40.114164 TX Bit6 (976~991) 16 983, Bit14 (972~988) 17 980,
1736 11:32:40.117335 TX Bit7 (978~993) 16 985, Bit15 (973~990) 18 981,
1737 11:32:40.117410
1738 11:32:40.120850 Write Rank1 MR14 =0x2
1739 11:32:40.129067
1740 11:32:40.129141 CH=0, VrefRange= 0, VrefLevel = 2
1741 11:32:40.135973 TX Bit0 (978~998) 21 988, Bit8 (968~988) 21 978,
1742 11:32:40.139728 TX Bit1 (978~996) 19 987, Bit9 (969~989) 21 979,
1743 11:32:40.142815 TX Bit2 (978~997) 20 987, Bit10 (975~991) 17 983,
1744 11:32:40.149428 TX Bit3 (974~990) 17 982, Bit11 (969~989) 21 979,
1745 11:32:40.152790 TX Bit4 (977~997) 21 987, Bit12 (970~989) 20 979,
1746 11:32:40.159389 TX Bit5 (975~991) 17 983, Bit13 (969~987) 19 978,
1747 11:32:40.162981 TX Bit6 (976~991) 16 983, Bit14 (971~989) 19 980,
1748 11:32:40.166536 TX Bit7 (977~993) 17 985, Bit15 (973~990) 18 981,
1749 11:32:40.166611
1750 11:32:40.169730 Write Rank1 MR14 =0x4
1751 11:32:40.177890
1752 11:32:40.177964 CH=0, VrefRange= 0, VrefLevel = 4
1753 11:32:40.184736 TX Bit0 (978~998) 21 988, Bit8 (968~989) 22 978,
1754 11:32:40.188246 TX Bit1 (978~997) 20 987, Bit9 (969~989) 21 979,
1755 11:32:40.194900 TX Bit2 (978~997) 20 987, Bit10 (975~992) 18 983,
1756 11:32:40.198149 TX Bit3 (973~990) 18 981, Bit11 (969~989) 21 979,
1757 11:32:40.201371 TX Bit4 (977~998) 22 987, Bit12 (970~989) 20 979,
1758 11:32:40.207908 TX Bit5 (975~991) 17 983, Bit13 (969~988) 20 978,
1759 11:32:40.211576 TX Bit6 (976~992) 17 984, Bit14 (971~989) 19 980,
1760 11:32:40.215047 TX Bit7 (977~994) 18 985, Bit15 (972~991) 20 981,
1761 11:32:40.215123
1762 11:32:40.217883 Write Rank1 MR14 =0x6
1763 11:32:40.226538
1764 11:32:40.226613 CH=0, VrefRange= 0, VrefLevel = 6
1765 11:32:40.233543 TX Bit0 (978~998) 21 988, Bit8 (968~989) 22 978,
1766 11:32:40.236849 TX Bit1 (977~997) 21 987, Bit9 (968~990) 23 979,
1767 11:32:40.243373 TX Bit2 (977~998) 22 987, Bit10 (974~992) 19 983,
1768 11:32:40.247049 TX Bit3 (973~991) 19 982, Bit11 (968~989) 22 978,
1769 11:32:40.250123 TX Bit4 (977~998) 22 987, Bit12 (971~990) 20 980,
1770 11:32:40.256971 TX Bit5 (975~992) 18 983, Bit13 (969~988) 20 978,
1771 11:32:40.260368 TX Bit6 (975~993) 19 984, Bit14 (970~990) 21 980,
1772 11:32:40.263495 TX Bit7 (977~994) 18 985, Bit15 (973~991) 19 982,
1773 11:32:40.263571
1774 11:32:40.266763 Write Rank1 MR14 =0x8
1775 11:32:40.275687
1776 11:32:40.275761 CH=0, VrefRange= 0, VrefLevel = 8
1777 11:32:40.282328 TX Bit0 (978~999) 22 988, Bit8 (967~989) 23 978,
1778 11:32:40.285659 TX Bit1 (977~998) 22 987, Bit9 (968~990) 23 979,
1779 11:32:40.288986 TX Bit2 (977~998) 22 987, Bit10 (974~992) 19 983,
1780 11:32:40.295989 TX Bit3 (973~991) 19 982, Bit11 (968~989) 22 978,
1781 11:32:40.299282 TX Bit4 (977~998) 22 987, Bit12 (969~990) 22 979,
1782 11:32:40.306292 TX Bit5 (975~992) 18 983, Bit13 (968~988) 21 978,
1783 11:32:40.309709 TX Bit6 (975~993) 19 984, Bit14 (969~990) 22 979,
1784 11:32:40.312848 TX Bit7 (977~995) 19 986, Bit15 (972~991) 20 981,
1785 11:32:40.312926
1786 11:32:40.315954 Write Rank1 MR14 =0xa
1787 11:32:40.324986
1788 11:32:40.325063 CH=0, VrefRange= 0, VrefLevel = 10
1789 11:32:40.331471 TX Bit0 (977~999) 23 988, Bit8 (967~989) 23 978,
1790 11:32:40.334613 TX Bit1 (977~998) 22 987, Bit9 (968~990) 23 979,
1791 11:32:40.341615 TX Bit2 (977~998) 22 987, Bit10 (974~993) 20 983,
1792 11:32:40.344740 TX Bit3 (972~991) 20 981, Bit11 (968~989) 22 978,
1793 11:32:40.348250 TX Bit4 (977~998) 22 987, Bit12 (969~990) 22 979,
1794 11:32:40.354902 TX Bit5 (974~993) 20 983, Bit13 (968~989) 22 978,
1795 11:32:40.358316 TX Bit6 (974~994) 21 984, Bit14 (969~990) 22 979,
1796 11:32:40.361812 TX Bit7 (977~996) 20 986, Bit15 (972~992) 21 982,
1797 11:32:40.361889
1798 11:32:40.365222 Write Rank1 MR14 =0xc
1799 11:32:40.373594
1800 11:32:40.377135 CH=0, VrefRange= 0, VrefLevel = 12
1801 11:32:40.380385 TX Bit0 (977~1000) 24 988, Bit8 (967~989) 23 978,
1802 11:32:40.384025 TX Bit1 (977~998) 22 987, Bit9 (968~990) 23 979,
1803 11:32:40.390696 TX Bit2 (977~999) 23 988, Bit10 (974~993) 20 983,
1804 11:32:40.394147 TX Bit3 (972~991) 20 981, Bit11 (967~990) 24 978,
1805 11:32:40.397218 TX Bit4 (976~999) 24 987, Bit12 (968~990) 23 979,
1806 11:32:40.404313 TX Bit5 (973~993) 21 983, Bit13 (968~989) 22 978,
1807 11:32:40.407473 TX Bit6 (974~995) 22 984, Bit14 (969~990) 22 979,
1808 11:32:40.410835 TX Bit7 (977~996) 20 986, Bit15 (971~992) 22 981,
1809 11:32:40.410913
1810 11:32:40.414053 Write Rank1 MR14 =0xe
1811 11:32:40.422892
1812 11:32:40.426501 CH=0, VrefRange= 0, VrefLevel = 14
1813 11:32:40.429587 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
1814 11:32:40.433372 TX Bit1 (977~998) 22 987, Bit9 (968~990) 23 979,
1815 11:32:40.439789 TX Bit2 (977~999) 23 988, Bit10 (974~993) 20 983,
1816 11:32:40.443153 TX Bit3 (971~992) 22 981, Bit11 (967~990) 24 978,
1817 11:32:40.446877 TX Bit4 (977~999) 23 988, Bit12 (969~991) 23 980,
1818 11:32:40.453318 TX Bit5 (973~994) 22 983, Bit13 (968~990) 23 979,
1819 11:32:40.456515 TX Bit6 (974~995) 22 984, Bit14 (969~990) 22 979,
1820 11:32:40.460196 TX Bit7 (976~997) 22 986, Bit15 (971~993) 23 982,
1821 11:32:40.460271
1822 11:32:40.463466 Write Rank1 MR14 =0x10
1823 11:32:40.472446
1824 11:32:40.475719 CH=0, VrefRange= 0, VrefLevel = 16
1825 11:32:40.479157 TX Bit0 (977~1000) 24 988, Bit8 (967~990) 24 978,
1826 11:32:40.482382 TX Bit1 (977~999) 23 988, Bit9 (968~990) 23 979,
1827 11:32:40.489498 TX Bit2 (977~1000) 24 988, Bit10 (974~995) 22 984,
1828 11:32:40.492561 TX Bit3 (971~992) 22 981, Bit11 (967~990) 24 978,
1829 11:32:40.495859 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
1830 11:32:40.503000 TX Bit5 (973~995) 23 984, Bit13 (968~989) 22 978,
1831 11:32:40.505986 TX Bit6 (973~996) 24 984, Bit14 (968~990) 23 979,
1832 11:32:40.509589 TX Bit7 (976~997) 22 986, Bit15 (970~993) 24 981,
1833 11:32:40.509667
1834 11:32:40.512516 Write Rank1 MR14 =0x12
1835 11:32:40.522354
1836 11:32:40.525351 CH=0, VrefRange= 0, VrefLevel = 18
1837 11:32:40.529109 TX Bit0 (977~1001) 25 989, Bit8 (967~990) 24 978,
1838 11:32:40.532263 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
1839 11:32:40.539267 TX Bit2 (976~1000) 25 988, Bit10 (973~995) 23 984,
1840 11:32:40.542341 TX Bit3 (971~993) 23 982, Bit11 (967~990) 24 978,
1841 11:32:40.545952 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
1842 11:32:40.552735 TX Bit5 (972~995) 24 983, Bit13 (967~990) 24 978,
1843 11:32:40.555794 TX Bit6 (973~997) 25 985, Bit14 (968~991) 24 979,
1844 11:32:40.558967 TX Bit7 (976~997) 22 986, Bit15 (969~994) 26 981,
1845 11:32:40.559046
1846 11:32:40.562553 Write Rank1 MR14 =0x14
1847 11:32:40.571970
1848 11:32:40.575469 CH=0, VrefRange= 0, VrefLevel = 20
1849 11:32:40.578636 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
1850 11:32:40.582025 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1851 11:32:40.588792 TX Bit2 (976~1000) 25 988, Bit10 (973~996) 24 984,
1852 11:32:40.592349 TX Bit3 (970~993) 24 981, Bit11 (967~991) 25 979,
1853 11:32:40.595448 TX Bit4 (976~1001) 26 988, Bit12 (968~991) 24 979,
1854 11:32:40.602314 TX Bit5 (972~996) 25 984, Bit13 (967~990) 24 978,
1855 11:32:40.605584 TX Bit6 (972~997) 26 984, Bit14 (968~991) 24 979,
1856 11:32:40.609132 TX Bit7 (975~998) 24 986, Bit15 (968~993) 26 980,
1857 11:32:40.609208
1858 11:32:40.612193 Write Rank1 MR14 =0x16
1859 11:32:40.621817
1860 11:32:40.625217 CH=0, VrefRange= 0, VrefLevel = 22
1861 11:32:40.628663 TX Bit0 (977~1002) 26 989, Bit8 (967~990) 24 978,
1862 11:32:40.631810 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
1863 11:32:40.638715 TX Bit2 (976~1000) 25 988, Bit10 (973~996) 24 984,
1864 11:32:40.641816 TX Bit3 (970~993) 24 981, Bit11 (967~991) 25 979,
1865 11:32:40.645503 TX Bit4 (976~1001) 26 988, Bit12 (968~991) 24 979,
1866 11:32:40.652100 TX Bit5 (972~996) 25 984, Bit13 (967~990) 24 978,
1867 11:32:40.655413 TX Bit6 (972~997) 26 984, Bit14 (968~991) 24 979,
1868 11:32:40.658654 TX Bit7 (975~998) 24 986, Bit15 (968~993) 26 980,
1869 11:32:40.658730
1870 11:32:40.661891 Write Rank1 MR14 =0x18
1871 11:32:40.671749
1872 11:32:40.675028 CH=0, VrefRange= 0, VrefLevel = 24
1873 11:32:40.678519 TX Bit0 (977~1002) 26 989, Bit8 (966~990) 25 978,
1874 11:32:40.681874 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1875 11:32:40.688301 TX Bit2 (976~1000) 25 988, Bit10 (973~996) 24 984,
1876 11:32:40.692036 TX Bit3 (970~995) 26 982, Bit11 (967~991) 25 979,
1877 11:32:40.695401 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
1878 11:32:40.701730 TX Bit5 (971~995) 25 983, Bit13 (967~990) 24 978,
1879 11:32:40.705214 TX Bit6 (971~996) 26 983, Bit14 (967~991) 25 979,
1880 11:32:40.708553 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1881 11:32:40.708629
1882 11:32:40.712010 Write Rank1 MR14 =0x1a
1883 11:32:40.721851
1884 11:32:40.721926 CH=0, VrefRange= 0, VrefLevel = 26
1885 11:32:40.728457 TX Bit0 (977~1002) 26 989, Bit8 (966~990) 25 978,
1886 11:32:40.731748 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1887 11:32:40.738448 TX Bit2 (976~1000) 25 988, Bit10 (973~996) 24 984,
1888 11:32:40.741960 TX Bit3 (970~995) 26 982, Bit11 (967~991) 25 979,
1889 11:32:40.745179 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
1890 11:32:40.751883 TX Bit5 (971~995) 25 983, Bit13 (967~990) 24 978,
1891 11:32:40.755251 TX Bit6 (971~996) 26 983, Bit14 (967~991) 25 979,
1892 11:32:40.758545 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1893 11:32:40.758620
1894 11:32:40.761874 Write Rank1 MR14 =0x1c
1895 11:32:40.771630
1896 11:32:40.775073 CH=0, VrefRange= 0, VrefLevel = 28
1897 11:32:40.778129 TX Bit0 (977~1002) 26 989, Bit8 (966~990) 25 978,
1898 11:32:40.781390 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1899 11:32:40.788526 TX Bit2 (976~1000) 25 988, Bit10 (973~996) 24 984,
1900 11:32:40.791629 TX Bit3 (970~995) 26 982, Bit11 (967~991) 25 979,
1901 11:32:40.795015 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
1902 11:32:40.801727 TX Bit5 (971~995) 25 983, Bit13 (967~990) 24 978,
1903 11:32:40.804888 TX Bit6 (971~996) 26 983, Bit14 (967~991) 25 979,
1904 11:32:40.808318 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1905 11:32:40.808397
1906 11:32:40.811704 Write Rank1 MR14 =0x1e
1907 11:32:40.821286
1908 11:32:40.824338 CH=0, VrefRange= 0, VrefLevel = 30
1909 11:32:40.828099 TX Bit0 (977~1002) 26 989, Bit8 (966~990) 25 978,
1910 11:32:40.831383 TX Bit1 (976~1000) 25 988, Bit9 (967~990) 24 978,
1911 11:32:40.838234 TX Bit2 (976~1000) 25 988, Bit10 (973~996) 24 984,
1912 11:32:40.841520 TX Bit3 (970~995) 26 982, Bit11 (967~991) 25 979,
1913 11:32:40.845062 TX Bit4 (976~1000) 25 988, Bit12 (968~991) 24 979,
1914 11:32:40.851875 TX Bit5 (971~995) 25 983, Bit13 (967~990) 24 978,
1915 11:32:40.854986 TX Bit6 (971~996) 26 983, Bit14 (967~991) 25 979,
1916 11:32:40.858595 TX Bit7 (975~998) 24 986, Bit15 (969~992) 24 980,
1917 11:32:40.858722
1918 11:32:40.858799
1919 11:32:40.861896 TX Vref found, early break! 369< 377
1920 11:32:40.868471 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
1921 11:32:40.871694 u1DelayCellOfst[0]=9 cells (7 PI)
1922 11:32:40.875134 u1DelayCellOfst[1]=7 cells (6 PI)
1923 11:32:40.878445 u1DelayCellOfst[2]=7 cells (6 PI)
1924 11:32:40.878515 u1DelayCellOfst[3]=0 cells (0 PI)
1925 11:32:40.881818 u1DelayCellOfst[4]=7 cells (6 PI)
1926 11:32:40.885296 u1DelayCellOfst[5]=1 cells (1 PI)
1927 11:32:40.888722 u1DelayCellOfst[6]=1 cells (1 PI)
1928 11:32:40.892102 u1DelayCellOfst[7]=5 cells (4 PI)
1929 11:32:40.895773 Byte0, DQ PI dly=982, DQM PI dly= 985
1930 11:32:40.899102 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1931 11:32:40.899177
1932 11:32:40.905759 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1933 11:32:40.905836
1934 11:32:40.905894 u1DelayCellOfst[8]=0 cells (0 PI)
1935 11:32:40.909368 u1DelayCellOfst[9]=0 cells (0 PI)
1936 11:32:40.912573 u1DelayCellOfst[10]=7 cells (6 PI)
1937 11:32:40.915704 u1DelayCellOfst[11]=1 cells (1 PI)
1938 11:32:40.919152 u1DelayCellOfst[12]=1 cells (1 PI)
1939 11:32:40.922526 u1DelayCellOfst[13]=0 cells (0 PI)
1940 11:32:40.925927 u1DelayCellOfst[14]=1 cells (1 PI)
1941 11:32:40.929271 u1DelayCellOfst[15]=2 cells (2 PI)
1942 11:32:40.932737 Byte1, DQ PI dly=978, DQM PI dly= 981
1943 11:32:40.935863 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
1944 11:32:40.935938
1945 11:32:40.942709 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
1946 11:32:40.942786
1947 11:32:40.942847 Write Rank1 MR14 =0x18
1948 11:32:40.942902
1949 11:32:40.946108 Final TX Range 0 Vref 24
1950 11:32:40.946183
1951 11:32:40.952691 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1952 11:32:40.952767
1953 11:32:40.959610 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1954 11:32:40.966571 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1955 11:32:40.973098 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1956 11:32:40.976323 Write Rank1 MR3 =0xb0
1957 11:32:40.976398 DramC Write-DBI on
1958 11:32:40.976456 ==
1959 11:32:40.982963 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1960 11:32:40.986270 fsp= 1, odt_onoff= 1, Byte mode= 0
1961 11:32:40.986345 ==
1962 11:32:40.989590 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1963 11:32:40.989666
1964 11:32:40.993093 Begin, DQ Scan Range 701~765
1965 11:32:40.993167
1966 11:32:40.993248
1967 11:32:40.993318 TX Vref Scan disable
1968 11:32:40.999770 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1969 11:32:41.003094 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1970 11:32:41.006638 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1971 11:32:41.009847 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1972 11:32:41.013140 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1973 11:32:41.016520 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1974 11:32:41.020037 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1975 11:32:41.023357 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1976 11:32:41.026979 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1977 11:32:41.030102 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1978 11:32:41.033358 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1979 11:32:41.036578 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1980 11:32:41.040373 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1981 11:32:41.043491 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1982 11:32:41.046832 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1983 11:32:41.050326 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
1984 11:32:41.058499 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1985 11:32:41.061521 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1986 11:32:41.065430 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1987 11:32:41.068382 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1988 11:32:41.071603 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1989 11:32:41.075234 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1990 11:32:41.078496 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
1991 11:32:41.081975 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
1992 11:32:41.085275 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
1993 11:32:41.088381 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
1994 11:32:41.092005 Byte0, DQ PI dly=730, DQM PI dly= 730
1995 11:32:41.095419 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
1996 11:32:41.095495
1997 11:32:41.102026 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
1998 11:32:41.102102
1999 11:32:41.105647 Byte1, DQ PI dly=722, DQM PI dly= 722
2000 11:32:41.108666 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2001 11:32:41.108741
2002 11:32:41.112193 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2003 11:32:41.112269
2004 11:32:41.118784 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2005 11:32:41.125463 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2006 11:32:41.132250 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2007 11:32:41.135920 Write Rank1 MR3 =0x30
2008 11:32:41.139200 DramC Write-DBI off
2009 11:32:41.139276
2010 11:32:41.139334 [DATLAT]
2011 11:32:41.142466 Freq=1600, CH0 RK1, use_rxtx_scan=0
2012 11:32:41.142541
2013 11:32:41.142599 DATLAT Default: 0x10
2014 11:32:41.146711 7, 0xFFFF, sum=0
2015 11:32:41.146788 8, 0xFFFF, sum=0
2016 11:32:41.150237 9, 0xFFFF, sum=0
2017 11:32:41.150314 10, 0xFFFF, sum=0
2018 11:32:41.150374 11, 0xFFFF, sum=0
2019 11:32:41.153859 12, 0xFFFF, sum=0
2020 11:32:41.153936 13, 0xFFFF, sum=0
2021 11:32:41.157754 14, 0x0, sum=1
2022 11:32:41.157830 15, 0x0, sum=2
2023 11:32:41.157889 16, 0x0, sum=3
2024 11:32:41.160958 17, 0x0, sum=4
2025 11:32:41.164631 pattern=2 first_step=14 total pass=5 best_step=16
2026 11:32:41.164707 ==
2027 11:32:41.171420 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2028 11:32:41.174879 fsp= 1, odt_onoff= 1, Byte mode= 0
2029 11:32:41.174954 ==
2030 11:32:41.178172 Start DQ dly to find pass range UseTestEngine =1
2031 11:32:41.181207 x-axis: bit #, y-axis: DQ dly (-127~63)
2032 11:32:41.184657 RX Vref Scan = 0
2033 11:32:41.184731 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2034 11:32:41.187586 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2035 11:32:41.191114 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2036 11:32:41.194554 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2037 11:32:41.197991 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2038 11:32:41.201421 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2039 11:32:41.204329 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2040 11:32:41.207708 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2041 11:32:41.207784 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2042 11:32:41.211647 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2043 11:32:41.214482 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2044 11:32:41.217792 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2045 11:32:41.221104 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2046 11:32:41.224440 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2047 11:32:41.227897 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2048 11:32:41.231970 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2049 11:32:41.232100 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2050 11:32:41.236083 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2051 11:32:41.240212 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2052 11:32:41.240373 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2053 11:32:41.244061 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2054 11:32:41.248169 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2055 11:32:41.251609 -4, [0] xxxoxxxx xxxxxxxx [MSB]
2056 11:32:41.251748 -3, [0] xxxoxxxx xxxxxxxx [MSB]
2057 11:32:41.254801 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2058 11:32:41.258456 -1, [0] xxxoxoxx xxxxxxxx [MSB]
2059 11:32:41.261456 0, [0] xxxoxoxx oxxoxxxx [MSB]
2060 11:32:41.264826 1, [0] xxxoxoxx oxxoxxox [MSB]
2061 11:32:41.268221 2, [0] xxxoxoox oxxoxoox [MSB]
2062 11:32:41.268296 3, [0] xxxoxooo ooxooooo [MSB]
2063 11:32:41.272055 4, [0] xxxoxooo ooxooooo [MSB]
2064 11:32:41.275091 5, [0] xoxoxooo ooxooooo [MSB]
2065 11:32:41.278662 6, [0] xoxoxooo oooooooo [MSB]
2066 11:32:41.281750 32, [0] oooxoooo oooooooo [MSB]
2067 11:32:41.285099 33, [0] oooxoooo oooooooo [MSB]
2068 11:32:41.288529 34, [0] oooxoxoo oooooxoo [MSB]
2069 11:32:41.291710 35, [0] oooxoxxx oooxoxxo [MSB]
2070 11:32:41.295393 36, [0] oooxoxxx xooxoxxo [MSB]
2071 11:32:41.298771 37, [0] oooxoxxx xxoxxxxo [MSB]
2072 11:32:41.298916 38, [0] oooxoxxx xxoxxxxx [MSB]
2073 11:32:41.301828 39, [0] oooxoxxx xxoxxxxx [MSB]
2074 11:32:41.305380 40, [0] ooxxoxxx xxxxxxxx [MSB]
2075 11:32:41.308566 41, [0] oxxxxxxx xxxxxxxx [MSB]
2076 11:32:41.312084 42, [0] xxxxxxxx xxxxxxxx [MSB]
2077 11:32:41.315894 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
2078 11:32:41.319267 iDelay=42, Bit 1, Center 22 (5 ~ 40) 36
2079 11:32:41.322935 iDelay=42, Bit 2, Center 23 (7 ~ 39) 33
2080 11:32:41.326340 iDelay=42, Bit 3, Center 13 (-4 ~ 31) 36
2081 11:32:41.329495 iDelay=42, Bit 4, Center 23 (7 ~ 40) 34
2082 11:32:41.332759 iDelay=42, Bit 5, Center 16 (-1 ~ 33) 35
2083 11:32:41.336241 iDelay=42, Bit 6, Center 18 (2 ~ 34) 33
2084 11:32:41.339516 iDelay=42, Bit 7, Center 18 (3 ~ 34) 32
2085 11:32:41.342883 iDelay=42, Bit 8, Center 17 (0 ~ 35) 36
2086 11:32:41.346226 iDelay=42, Bit 9, Center 19 (3 ~ 36) 34
2087 11:32:41.349532 iDelay=42, Bit 10, Center 22 (6 ~ 39) 34
2088 11:32:41.352873 iDelay=42, Bit 11, Center 17 (0 ~ 34) 35
2089 11:32:41.356371 iDelay=42, Bit 12, Center 19 (3 ~ 36) 34
2090 11:32:41.359830 iDelay=42, Bit 13, Center 17 (2 ~ 33) 32
2091 11:32:41.363214 iDelay=42, Bit 14, Center 17 (1 ~ 34) 34
2092 11:32:41.369835 iDelay=42, Bit 15, Center 20 (3 ~ 37) 35
2093 11:32:41.369918 ==
2094 11:32:41.373188 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2095 11:32:41.376482 fsp= 1, odt_onoff= 1, Byte mode= 0
2096 11:32:41.376561 ==
2097 11:32:41.376639 DQS Delay:
2098 11:32:41.380111 DQS0 = 0, DQS1 = 0
2099 11:32:41.380188 DQM Delay:
2100 11:32:41.383190 DQM0 = 19, DQM1 = 18
2101 11:32:41.383271 DQ Delay:
2102 11:32:41.386880 DQ0 =24, DQ1 =22, DQ2 =23, DQ3 =13
2103 11:32:41.389905 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
2104 11:32:41.393478 DQ8 =17, DQ9 =19, DQ10 =22, DQ11 =17
2105 11:32:41.396687 DQ12 =19, DQ13 =17, DQ14 =17, DQ15 =20
2106 11:32:41.396765
2107 11:32:41.396840
2108 11:32:41.396911
2109 11:32:41.400125 [DramC_TX_OE_Calibration] TA2
2110 11:32:41.403472 Original DQ_B0 (3 6) =30, OEN = 27
2111 11:32:41.406744 Original DQ_B1 (3 6) =30, OEN = 27
2112 11:32:41.410393 23, 0x0, End_B0=23 End_B1=23
2113 11:32:41.410473 24, 0x0, End_B0=24 End_B1=24
2114 11:32:41.413595 25, 0x0, End_B0=25 End_B1=25
2115 11:32:41.416853 26, 0x0, End_B0=26 End_B1=26
2116 11:32:41.420287 27, 0x0, End_B0=27 End_B1=27
2117 11:32:41.420366 28, 0x0, End_B0=28 End_B1=28
2118 11:32:41.423789 29, 0x0, End_B0=29 End_B1=29
2119 11:32:41.426902 30, 0x0, End_B0=30 End_B1=30
2120 11:32:41.430542 31, 0xFFFF, End_B0=30 End_B1=30
2121 11:32:41.433362 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2122 11:32:41.440169 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2123 11:32:41.440252
2124 11:32:41.440330
2125 11:32:41.443450 Write Rank1 MR23 =0x3f
2126 11:32:41.443527 [DQSOSC]
2127 11:32:41.450150 [DQSOSCAuto] RK1, (LSB)MR18= 0x8b, (MSB)MR19= 0x3, tDQSOscB0 = 347 ps tDQSOscB1 = 0 ps
2128 11:32:41.456768 CH0_RK1: MR19=0x3, MR18=0x8B, DQSOSC=347, MR23=63, INC=20, DEC=30
2129 11:32:41.460117 Write Rank1 MR23 =0x3f
2130 11:32:41.460195 [DQSOSC]
2131 11:32:41.467015 [DQSOSCAuto] RK1, (LSB)MR18= 0x8d, (MSB)MR19= 0x3, tDQSOscB0 = 346 ps tDQSOscB1 = 0 ps
2132 11:32:41.470240 CH0 RK1: MR19=3, MR18=8D
2133 11:32:41.473663 [RxdqsGatingPostProcess] freq 1600
2134 11:32:41.476691 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2135 11:32:41.479998 Rank: 0
2136 11:32:41.483539 best DQS0 dly(2T, 0.5T) = (2, 5)
2137 11:32:41.483641 best DQS1 dly(2T, 0.5T) = (2, 5)
2138 11:32:41.486758 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2139 11:32:41.490139 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2140 11:32:41.493479 Rank: 1
2141 11:32:41.496707 best DQS0 dly(2T, 0.5T) = (2, 6)
2142 11:32:41.496772 best DQS1 dly(2T, 0.5T) = (2, 6)
2143 11:32:41.500284 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2144 11:32:41.503861 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2145 11:32:41.510394 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2146 11:32:41.513837 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2147 11:32:41.517385 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2148 11:32:41.520355 Write Rank0 MR13 =0x59
2149 11:32:41.520425 ==
2150 11:32:41.523971 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2151 11:32:41.527137 fsp= 1, odt_onoff= 1, Byte mode= 0
2152 11:32:41.527209 ==
2153 11:32:41.530356 === u2Vref_new: 0x56 --> 0x3a
2154 11:32:41.533784 === u2Vref_new: 0x58 --> 0x58
2155 11:32:41.537327 === u2Vref_new: 0x5a --> 0x5a
2156 11:32:41.540714 === u2Vref_new: 0x5c --> 0x78
2157 11:32:41.543898 === u2Vref_new: 0x5e --> 0x7a
2158 11:32:41.547386 === u2Vref_new: 0x60 --> 0x90
2159 11:32:41.550453 [CA 0] Center 37 (11~63) winsize 53
2160 11:32:41.553914 [CA 1] Center 36 (10~63) winsize 54
2161 11:32:41.557399 [CA 2] Center 33 (4~63) winsize 60
2162 11:32:41.560869 [CA 3] Center 33 (4~63) winsize 60
2163 11:32:41.563970 [CA 4] Center 34 (6~63) winsize 58
2164 11:32:41.564121 [CA 5] Center 28 (-1~57) winsize 59
2165 11:32:41.567696
2166 11:32:41.570586 [CATrainingPosCal] consider 1 rank data
2167 11:32:41.570665 u2DelayCellTimex100 = 753/100 ps
2168 11:32:41.577390 CA0 delay=37 (11~63),Diff = 9 PI (11 cell)
2169 11:32:41.580910 CA1 delay=36 (10~63),Diff = 8 PI (10 cell)
2170 11:32:41.584377 CA2 delay=33 (4~63),Diff = 5 PI (6 cell)
2171 11:32:41.587304 CA3 delay=33 (4~63),Diff = 5 PI (6 cell)
2172 11:32:41.590922 CA4 delay=34 (6~63),Diff = 6 PI (7 cell)
2173 11:32:41.594080 CA5 delay=28 (-1~57),Diff = 0 PI (0 cell)
2174 11:32:41.594147
2175 11:32:41.597754 CA PerBit enable=1, Macro0, CA PI delay=28
2176 11:32:41.600764 === u2Vref_new: 0x56 --> 0x3a
2177 11:32:41.600838
2178 11:32:41.604336 Vref(ca) range 1: 22
2179 11:32:41.604406
2180 11:32:41.604464 CS Dly= 12 (43-0-32)
2181 11:32:41.607433 Write Rank0 MR13 =0xd8
2182 11:32:41.611021 Write Rank0 MR13 =0xd8
2183 11:32:41.611085 Write Rank0 MR12 =0x56
2184 11:32:41.614400 Write Rank1 MR13 =0x59
2185 11:32:41.614469 ==
2186 11:32:41.617721 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2187 11:32:41.621055 fsp= 1, odt_onoff= 1, Byte mode= 0
2188 11:32:41.621123 ==
2189 11:32:41.624502 === u2Vref_new: 0x56 --> 0x3a
2190 11:32:41.627904 === u2Vref_new: 0x58 --> 0x58
2191 11:32:41.631070 === u2Vref_new: 0x5a --> 0x5a
2192 11:32:41.634494 === u2Vref_new: 0x5c --> 0x78
2193 11:32:41.637832 === u2Vref_new: 0x5e --> 0x7a
2194 11:32:41.641452 === u2Vref_new: 0x60 --> 0x90
2195 11:32:41.641547
2196 11:32:41.644711 CBT Vref found, early break!
2197 11:32:41.647610 [CA 0] Center 37 (12~63) winsize 52
2198 11:32:41.651178 [CA 1] Center 35 (8~63) winsize 56
2199 11:32:41.651290 [CA 2] Center 33 (4~63) winsize 60
2200 11:32:41.654968 [CA 3] Center 33 (4~63) winsize 60
2201 11:32:41.658146 [CA 4] Center 35 (7~63) winsize 57
2202 11:32:41.661338 [CA 5] Center 27 (-1~56) winsize 58
2203 11:32:41.661455
2204 11:32:41.664640 [CATrainingPosCal] consider 2 rank data
2205 11:32:41.668344 u2DelayCellTimex100 = 753/100 ps
2206 11:32:41.671277 CA0 delay=37 (12~63),Diff = 10 PI (12 cell)
2207 11:32:41.677977 CA1 delay=36 (10~63),Diff = 9 PI (11 cell)
2208 11:32:41.681656 CA2 delay=33 (4~63),Diff = 6 PI (7 cell)
2209 11:32:41.684823 CA3 delay=33 (4~63),Diff = 6 PI (7 cell)
2210 11:32:41.718464 CA4 delay=35 (7~63),Diff = 8 PI (10 cell)
2211 11:32:41.718566 CA5 delay=27 (-1~56),Diff = 0 PI (0 cell)
2212 11:32:41.718651
2213 11:32:41.718753 CA PerBit enable=1, Macro0, CA PI delay=27
2214 11:32:41.718838 === u2Vref_new: 0x56 --> 0x3a
2215 11:32:41.718908
2216 11:32:41.718977 Vref(ca) range 1: 22
2217 11:32:41.719066
2218 11:32:41.719164 CS Dly= 11 (42-0-32)
2219 11:32:41.719276 Write Rank1 MR13 =0xd8
2220 11:32:41.719361 Write Rank1 MR13 =0xd8
2221 11:32:41.719445 Write Rank1 MR12 =0x56
2222 11:32:41.719529 [RankSwap] Rank num 2, (Multi 1), Rank 0
2223 11:32:41.719616 Write Rank0 MR2 =0xad
2224 11:32:41.719720 [Write Leveling]
2225 11:32:41.719818 delay byte0 byte1 byte2 byte3
2226 11:32:41.719902
2227 11:32:41.720014 10 0 0
2228 11:32:41.721924 11 0 0
2229 11:32:41.722020 12 0 0
2230 11:32:41.725926 13 0 0
2231 11:32:41.726028 14 0 0
2232 11:32:41.726118 15 0 0
2233 11:32:41.728599 16 0 0
2234 11:32:41.728676 17 0 0
2235 11:32:41.732081 18 0 0
2236 11:32:41.732158 19 0 0
2237 11:32:41.735598 20 0 0
2238 11:32:41.735675 21 0 0
2239 11:32:41.735734 22 0 0
2240 11:32:41.739036 23 0 0
2241 11:32:41.739112 24 0 0
2242 11:32:41.742293 25 0 0
2243 11:32:41.742370 26 0 0
2244 11:32:41.742430 27 0 0
2245 11:32:41.745883 28 0 0
2246 11:32:41.745959 29 0 0
2247 11:32:41.748937 30 0 0
2248 11:32:41.749014 31 0 0
2249 11:32:41.749073 32 0 ff
2250 11:32:41.752542 33 0 ff
2251 11:32:41.752619 34 0 ff
2252 11:32:41.755748 35 0 ff
2253 11:32:41.755825 36 0 ff
2254 11:32:41.759108 37 ff ff
2255 11:32:41.759184 38 ff ff
2256 11:32:41.762205 39 ff ff
2257 11:32:41.762282 40 ff ff
2258 11:32:41.765629 41 ff ff
2259 11:32:41.765706 42 ff ff
2260 11:32:41.765766 43 ff ff
2261 11:32:41.772663 pass bytecount = 0xff (0xff: all bytes pass)
2262 11:32:41.772739
2263 11:32:41.772798 DQS0 dly: 37
2264 11:32:41.772853 DQS1 dly: 32
2265 11:32:41.775581 Write Rank0 MR2 =0x2d
2266 11:32:41.779084 [RankSwap] Rank num 2, (Multi 1), Rank 0
2267 11:32:41.782491 Write Rank0 MR1 =0xd6
2268 11:32:41.782567 [Gating]
2269 11:32:41.782626 ==
2270 11:32:41.786121 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2271 11:32:41.789274 fsp= 1, odt_onoff= 1, Byte mode= 0
2272 11:32:41.793006 ==
2273 11:32:41.795960 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2274 11:32:41.799211 3 1 4 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2275 11:32:41.802618 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2276 11:32:41.809666 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2277 11:32:41.812980 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2278 11:32:41.816151 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2279 11:32:41.822872 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2280 11:32:41.826151 3 1 28 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2281 11:32:41.829559 3 2 0 |201f 2c2b |(11 11)(11 11) |(1 1)(0 0)| 0
2282 11:32:41.832815 3 2 4 |3d3d 201f |(11 11)(11 11) |(1 1)(0 0)| 0
2283 11:32:41.839894 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2284 11:32:41.843269 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2285 11:32:41.846404 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2286 11:32:41.853028 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2287 11:32:41.856424 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2288 11:32:41.859737 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2289 11:32:41.866535 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2290 11:32:41.870254 3 3 4 |202 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2291 11:32:41.873606 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2292 11:32:41.876701 [Byte 0] Lead/lag Transition tap number (1)
2293 11:32:41.883748 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2294 11:32:41.886837 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2295 11:32:41.890394 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2296 11:32:41.893652 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2297 11:32:41.900455 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2298 11:32:41.903695 3 4 0 |707 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2299 11:32:41.907013 3 4 4 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
2300 11:32:41.913877 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2301 11:32:41.917107 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2302 11:32:41.920633 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2303 11:32:41.923708 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2304 11:32:41.930442 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2305 11:32:41.933826 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2306 11:32:41.937098 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2307 11:32:41.943798 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2308 11:32:41.947300 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2309 11:32:41.950440 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2310 11:32:41.956832 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2311 11:32:41.960775 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2312 11:32:41.963817 [Byte 0] Lead/lag falling Transition (3, 5, 20)
2313 11:32:41.970117 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2314 11:32:41.974159 [Byte 0] Lead/lag Transition tap number (2)
2315 11:32:41.976980 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2316 11:32:41.980235 3 5 28 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2317 11:32:41.986862 [Byte 1] Lead/lag Transition tap number (2)
2318 11:32:41.990246 3 6 0 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
2319 11:32:41.993890 3 6 4 |4646 202 |(0 0)(11 11) |(0 0)(0 0)| 0
2320 11:32:41.997107 [Byte 0]First pass (3, 6, 4)
2321 11:32:42.000206 3 6 8 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
2322 11:32:42.003843 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2323 11:32:42.007372 [Byte 1]First pass (3, 6, 12)
2324 11:32:42.010330 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2325 11:32:42.013581 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2326 11:32:42.020446 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2327 11:32:42.023518 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2328 11:32:42.027221 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2329 11:32:42.030207 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2330 11:32:42.033749 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2331 11:32:42.040192 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2332 11:32:42.043794 All bytes gating window > 1UI, Early break!
2333 11:32:42.043866
2334 11:32:42.047091 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 24)
2335 11:32:42.047163
2336 11:32:42.050065 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
2337 11:32:42.050131
2338 11:32:42.050184
2339 11:32:42.050241
2340 11:32:42.053820 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 24)
2341 11:32:42.053880
2342 11:32:42.060517 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
2343 11:32:42.060597
2344 11:32:42.060660
2345 11:32:42.060714 Write Rank0 MR1 =0x56
2346 11:32:42.060766
2347 11:32:42.063678 best RODT dly(2T, 0.5T) = (2, 2)
2348 11:32:42.063739
2349 11:32:42.067390 best RODT dly(2T, 0.5T) = (2, 2)
2350 11:32:42.067452 ==
2351 11:32:42.073785 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2352 11:32:42.077110 fsp= 1, odt_onoff= 1, Byte mode= 0
2353 11:32:42.077180 ==
2354 11:32:42.080384 Start DQ dly to find pass range UseTestEngine =0
2355 11:32:42.083570 x-axis: bit #, y-axis: DQ dly (-127~63)
2356 11:32:42.087767 RX Vref Scan = 0
2357 11:32:42.087831 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2358 11:32:42.090516 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2359 11:32:42.093848 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2360 11:32:42.097338 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2361 11:32:42.100560 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2362 11:32:42.103945 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2363 11:32:42.107362 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2364 11:32:42.110368 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2365 11:32:42.110433 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2366 11:32:42.113949 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2367 11:32:42.117159 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2368 11:32:42.120471 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2369 11:32:42.124163 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2370 11:32:42.127152 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2371 11:32:42.130918 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2372 11:32:42.133852 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2373 11:32:42.133919 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2374 11:32:42.137405 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2375 11:32:42.140495 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2376 11:32:42.143997 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2377 11:32:42.147510 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2378 11:32:42.151097 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2379 11:32:42.153877 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2380 11:32:42.153946 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2381 11:32:42.157383 -2, [0] xxxxxxxx xxxxxxxo [MSB]
2382 11:32:42.160779 -1, [0] xxxxxxxx xxxxxxxo [MSB]
2383 11:32:42.164054 0, [0] xxxoxxxx xxxxxxxo [MSB]
2384 11:32:42.167120 1, [0] xxxoxxxx xxxxxxxo [MSB]
2385 11:32:42.170642 2, [0] xxooxxxo oxoxxxxo [MSB]
2386 11:32:42.170712 3, [0] xxoooxxo oooxxxxo [MSB]
2387 11:32:42.173782 4, [0] xxoooxxo ooooxxoo [MSB]
2388 11:32:42.177406 5, [0] xxoooxxo oooooooo [MSB]
2389 11:32:42.180799 6, [0] xooooxxo oooooooo [MSB]
2390 11:32:42.184066 31, [0] oooxoooo oooooooo [MSB]
2391 11:32:42.187122 32, [0] ooxxoooo ooooooox [MSB]
2392 11:32:42.187192 33, [0] ooxxoooo oxooooox [MSB]
2393 11:32:42.190503 34, [0] ooxxoooo oxxxooox [MSB]
2394 11:32:42.193768 35, [0] ooxxoooo xxxxooxx [MSB]
2395 11:32:42.197005 36, [0] ooxxxoox xxxxoxxx [MSB]
2396 11:32:42.200712 37, [0] ooxxxoox xxxxoxxx [MSB]
2397 11:32:42.204115 38, [0] ooxxxoox xxxxoxxx [MSB]
2398 11:32:42.207146 39, [0] ooxxxoox xxxxxxxx [MSB]
2399 11:32:42.207214 40, [0] ooxxxoox xxxxxxxx [MSB]
2400 11:32:42.210593 41, [0] xxxxxxxx xxxxxxxx [MSB]
2401 11:32:42.214291 iDelay=41, Bit 0, Center 23 (7 ~ 40) 34
2402 11:32:42.217382 iDelay=41, Bit 1, Center 23 (6 ~ 40) 35
2403 11:32:42.220693 iDelay=41, Bit 2, Center 16 (2 ~ 31) 30
2404 11:32:42.227361 iDelay=41, Bit 3, Center 15 (0 ~ 30) 31
2405 11:32:42.230869 iDelay=41, Bit 4, Center 19 (3 ~ 35) 33
2406 11:32:42.234007 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2407 11:32:42.237993 iDelay=41, Bit 6, Center 23 (7 ~ 40) 34
2408 11:32:42.240883 iDelay=41, Bit 7, Center 18 (2 ~ 35) 34
2409 11:32:42.244037 iDelay=41, Bit 8, Center 18 (2 ~ 34) 33
2410 11:32:42.247472 iDelay=41, Bit 9, Center 17 (3 ~ 32) 30
2411 11:32:42.250636 iDelay=41, Bit 10, Center 17 (2 ~ 33) 32
2412 11:32:42.254346 iDelay=41, Bit 11, Center 18 (4 ~ 33) 30
2413 11:32:42.257545 iDelay=41, Bit 12, Center 21 (5 ~ 38) 34
2414 11:32:42.260852 iDelay=41, Bit 13, Center 20 (5 ~ 35) 31
2415 11:32:42.264252 iDelay=41, Bit 14, Center 19 (4 ~ 34) 31
2416 11:32:42.267497 iDelay=41, Bit 15, Center 14 (-2 ~ 31) 34
2417 11:32:42.267563 ==
2418 11:32:42.274494 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2419 11:32:42.277783 fsp= 1, odt_onoff= 1, Byte mode= 0
2420 11:32:42.277849 ==
2421 11:32:42.277905 DQS Delay:
2422 11:32:42.280966 DQS0 = 0, DQS1 = 0
2423 11:32:42.281032 DQM Delay:
2424 11:32:42.284493 DQM0 = 20, DQM1 = 18
2425 11:32:42.284555 DQ Delay:
2426 11:32:42.287588 DQ0 =23, DQ1 =23, DQ2 =16, DQ3 =15
2427 11:32:42.290843 DQ4 =19, DQ5 =23, DQ6 =23, DQ7 =18
2428 11:32:42.294221 DQ8 =18, DQ9 =17, DQ10 =17, DQ11 =18
2429 11:32:42.297700 DQ12 =21, DQ13 =20, DQ14 =19, DQ15 =14
2430 11:32:42.297765
2431 11:32:42.297817
2432 11:32:42.297871 DramC Write-DBI off
2433 11:32:42.300792 ==
2434 11:32:42.304152 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2435 11:32:42.307960 fsp= 1, odt_onoff= 1, Byte mode= 0
2436 11:32:42.308023 ==
2437 11:32:42.310906 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2438 11:32:42.310971
2439 11:32:42.314456 Begin, DQ Scan Range 928~1184
2440 11:32:42.314518
2441 11:32:42.314570
2442 11:32:42.317486 TX Vref Scan disable
2443 11:32:42.320946 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2444 11:32:42.324129 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2445 11:32:42.327641 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2446 11:32:42.331211 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2447 11:32:42.334715 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2448 11:32:42.337645 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2449 11:32:42.340978 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2450 11:32:42.344282 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2451 11:32:42.347859 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2452 11:32:42.351138 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2453 11:32:42.357564 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2454 11:32:42.360971 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2455 11:32:42.364405 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2456 11:32:42.367768 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2457 11:32:42.371288 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2458 11:32:42.374432 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2459 11:32:42.377842 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2460 11:32:42.381598 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2461 11:32:42.384302 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2462 11:32:42.388017 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2463 11:32:42.391379 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2464 11:32:42.394727 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2465 11:32:42.397863 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2466 11:32:42.401369 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2467 11:32:42.404672 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2468 11:32:42.407997 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2469 11:32:42.411367 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2470 11:32:42.417676 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2471 11:32:42.421351 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2472 11:32:42.424599 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2473 11:32:42.427963 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2474 11:32:42.431401 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2475 11:32:42.434994 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2476 11:32:42.438215 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2477 11:32:42.441442 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2478 11:32:42.444707 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2479 11:32:42.447719 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2480 11:32:42.451169 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2481 11:32:42.454570 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2482 11:32:42.458024 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
2483 11:32:42.461215 968 |3 6 8|[0] xxxxxxxx oxxxxxxo [MSB]
2484 11:32:42.464898 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
2485 11:32:42.468128 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
2486 11:32:42.471463 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
2487 11:32:42.474600 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2488 11:32:42.478059 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
2489 11:32:42.481446 974 |3 6 14|[0] xxxoxxxx oooooooo [MSB]
2490 11:32:42.484704 975 |3 6 15|[0] xxoooxxx oooooooo [MSB]
2491 11:32:42.488098 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
2492 11:32:42.496796 991 |3 6 31|[0] oooooooo oxxxxxxx [MSB]
2493 11:32:42.499786 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2494 11:32:42.503306 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2495 11:32:42.507119 994 |3 6 34|[0] oooxoooo xxxxxxxx [MSB]
2496 11:32:42.510210 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]
2497 11:32:42.513471 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
2498 11:32:42.516720 997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]
2499 11:32:42.520204 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
2500 11:32:42.523448 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2501 11:32:42.526609 Byte0, DQ PI dly=985, DQM PI dly= 985
2502 11:32:42.530059 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
2503 11:32:42.530138
2504 11:32:42.536642 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
2505 11:32:42.536713
2506 11:32:42.539964 Byte1, DQ PI dly=979, DQM PI dly= 979
2507 11:32:42.543534 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2508 11:32:42.543599
2509 11:32:42.547025 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2510 11:32:42.547093
2511 11:32:42.547148 ==
2512 11:32:42.553883 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2513 11:32:42.556939 fsp= 1, odt_onoff= 1, Byte mode= 0
2514 11:32:42.557004 ==
2515 11:32:42.560278 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2516 11:32:42.560348
2517 11:32:42.563622 Begin, DQ Scan Range 955~1019
2518 11:32:42.567188 Write Rank0 MR14 =0x0
2519 11:32:42.574270
2520 11:32:42.574332 CH=1, VrefRange= 0, VrefLevel = 0
2521 11:32:42.580876 TX Bit0 (979~997) 19 988, Bit8 (970~988) 19 979,
2522 11:32:42.584252 TX Bit1 (978~995) 18 986, Bit9 (970~987) 18 978,
2523 11:32:42.591147 TX Bit2 (977~990) 14 983, Bit10 (970~988) 19 979,
2524 11:32:42.594292 TX Bit3 (975~990) 16 982, Bit11 (971~989) 19 980,
2525 11:32:42.597741 TX Bit4 (977~993) 17 985, Bit12 (972~991) 20 981,
2526 11:32:42.604292 TX Bit5 (979~997) 19 988, Bit13 (972~990) 19 981,
2527 11:32:42.607922 TX Bit6 (979~997) 19 988, Bit14 (972~988) 17 980,
2528 11:32:42.611237 TX Bit7 (977~992) 16 984, Bit15 (969~986) 18 977,
2529 11:32:42.611300
2530 11:32:42.614475 Write Rank0 MR14 =0x2
2531 11:32:42.622960
2532 11:32:42.623034 CH=1, VrefRange= 0, VrefLevel = 2
2533 11:32:42.629803 TX Bit0 (979~998) 20 988, Bit8 (969~989) 21 979,
2534 11:32:42.633368 TX Bit1 (978~996) 19 987, Bit9 (970~988) 19 979,
2535 11:32:42.639866 TX Bit2 (976~991) 16 983, Bit10 (970~988) 19 979,
2536 11:32:42.643302 TX Bit3 (975~990) 16 982, Bit11 (971~990) 20 980,
2537 11:32:42.646136 TX Bit4 (977~993) 17 985, Bit12 (972~991) 20 981,
2538 11:32:42.653060 TX Bit5 (978~998) 21 988, Bit13 (972~990) 19 981,
2539 11:32:42.656347 TX Bit6 (979~998) 20 988, Bit14 (971~989) 19 980,
2540 11:32:42.659836 TX Bit7 (977~992) 16 984, Bit15 (968~986) 19 977,
2541 11:32:42.659899
2542 11:32:42.662798 Write Rank0 MR14 =0x4
2543 11:32:42.671763
2544 11:32:42.671826 CH=1, VrefRange= 0, VrefLevel = 4
2545 11:32:42.678264 TX Bit0 (978~998) 21 988, Bit8 (969~990) 22 979,
2546 11:32:42.681860 TX Bit1 (977~996) 20 986, Bit9 (970~989) 20 979,
2547 11:32:42.688193 TX Bit2 (976~991) 16 983, Bit10 (971~989) 19 980,
2548 11:32:42.692031 TX Bit3 (975~991) 17 983, Bit11 (971~991) 21 981,
2549 11:32:42.695246 TX Bit4 (977~994) 18 985, Bit12 (971~991) 21 981,
2550 11:32:42.701672 TX Bit5 (978~998) 21 988, Bit13 (972~990) 19 981,
2551 11:32:42.705008 TX Bit6 (978~998) 21 988, Bit14 (971~990) 20 980,
2552 11:32:42.708784 TX Bit7 (977~993) 17 985, Bit15 (968~987) 20 977,
2553 11:32:42.708853
2554 11:32:42.712123 Write Rank0 MR14 =0x6
2555 11:32:42.720404
2556 11:32:42.720485 CH=1, VrefRange= 0, VrefLevel = 6
2557 11:32:42.727000 TX Bit0 (979~998) 20 988, Bit8 (969~990) 22 979,
2558 11:32:42.730423 TX Bit1 (977~997) 21 987, Bit9 (969~989) 21 979,
2559 11:32:42.737428 TX Bit2 (976~992) 17 984, Bit10 (970~989) 20 979,
2560 11:32:42.740571 TX Bit3 (974~991) 18 982, Bit11 (971~991) 21 981,
2561 11:32:42.743795 TX Bit4 (977~994) 18 985, Bit12 (971~992) 22 981,
2562 11:32:42.750905 TX Bit5 (978~998) 21 988, Bit13 (971~991) 21 981,
2563 11:32:42.753817 TX Bit6 (978~998) 21 988, Bit14 (971~990) 20 980,
2564 11:32:42.757178 TX Bit7 (977~993) 17 985, Bit15 (968~987) 20 977,
2565 11:32:42.757344
2566 11:32:42.760565 Write Rank0 MR14 =0x8
2567 11:32:42.769338
2568 11:32:42.769406 CH=1, VrefRange= 0, VrefLevel = 8
2569 11:32:42.776039 TX Bit0 (978~998) 21 988, Bit8 (969~991) 23 980,
2570 11:32:42.779214 TX Bit1 (977~997) 21 987, Bit9 (969~990) 22 979,
2571 11:32:42.786021 TX Bit2 (976~992) 17 984, Bit10 (970~990) 21 980,
2572 11:32:42.789582 TX Bit3 (974~991) 18 982, Bit11 (970~991) 22 980,
2573 11:32:42.792809 TX Bit4 (976~995) 20 985, Bit12 (971~992) 22 981,
2574 11:32:42.799305 TX Bit5 (977~998) 22 987, Bit13 (971~991) 21 981,
2575 11:32:42.803092 TX Bit6 (978~998) 21 988, Bit14 (970~991) 22 980,
2576 11:32:42.806367 TX Bit7 (977~994) 18 985, Bit15 (968~987) 20 977,
2577 11:32:42.806514
2578 11:32:42.809379 Write Rank0 MR14 =0xa
2579 11:32:42.818105
2580 11:32:42.821434 CH=1, VrefRange= 0, VrefLevel = 10
2581 11:32:42.824792 TX Bit0 (978~999) 22 988, Bit8 (969~990) 22 979,
2582 11:32:42.828223 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
2583 11:32:42.834714 TX Bit2 (976~992) 17 984, Bit10 (969~991) 23 980,
2584 11:32:42.838156 TX Bit3 (973~992) 20 982, Bit11 (970~991) 22 980,
2585 11:32:42.841739 TX Bit4 (976~996) 21 986, Bit12 (971~992) 22 981,
2586 11:32:42.848312 TX Bit5 (977~999) 23 988, Bit13 (971~991) 21 981,
2587 11:32:42.851894 TX Bit6 (978~999) 22 988, Bit14 (970~991) 22 980,
2588 11:32:42.855080 TX Bit7 (977~994) 18 985, Bit15 (968~988) 21 978,
2589 11:32:42.855148
2590 11:32:42.858320 Write Rank0 MR14 =0xc
2591 11:32:42.867148
2592 11:32:42.870512 CH=1, VrefRange= 0, VrefLevel = 12
2593 11:32:42.873996 TX Bit0 (978~999) 22 988, Bit8 (969~991) 23 980,
2594 11:32:42.877032 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
2595 11:32:42.883990 TX Bit2 (976~993) 18 984, Bit10 (969~991) 23 980,
2596 11:32:42.887206 TX Bit3 (973~992) 20 982, Bit11 (970~992) 23 981,
2597 11:32:42.890554 TX Bit4 (976~997) 22 986, Bit12 (970~992) 23 981,
2598 11:32:42.897092 TX Bit5 (977~999) 23 988, Bit13 (971~991) 21 981,
2599 11:32:42.900576 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
2600 11:32:42.903673 TX Bit7 (977~995) 19 986, Bit15 (967~989) 23 978,
2601 11:32:42.903815
2602 11:32:42.907082 Write Rank0 MR14 =0xe
2603 11:32:42.916347
2604 11:32:42.919595 CH=1, VrefRange= 0, VrefLevel = 14
2605 11:32:42.922767 TX Bit0 (977~999) 23 988, Bit8 (968~991) 24 979,
2606 11:32:42.926571 TX Bit1 (977~998) 22 987, Bit9 (969~991) 23 980,
2607 11:32:42.932847 TX Bit2 (975~994) 20 984, Bit10 (969~991) 23 980,
2608 11:32:42.936373 TX Bit3 (973~993) 21 983, Bit11 (970~992) 23 981,
2609 11:32:42.939772 TX Bit4 (976~997) 22 986, Bit12 (970~992) 23 981,
2610 11:32:42.946354 TX Bit5 (977~999) 23 988, Bit13 (970~992) 23 981,
2611 11:32:42.949766 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
2612 11:32:42.953149 TX Bit7 (976~996) 21 986, Bit15 (967~990) 24 978,
2613 11:32:42.953341
2614 11:32:42.956555 Write Rank0 MR14 =0x10
2615 11:32:42.965436
2616 11:32:42.968574 CH=1, VrefRange= 0, VrefLevel = 16
2617 11:32:42.971784 TX Bit0 (977~999) 23 988, Bit8 (968~991) 24 979,
2618 11:32:42.975130 TX Bit1 (977~998) 22 987, Bit9 (968~991) 24 979,
2619 11:32:42.981763 TX Bit2 (975~994) 20 984, Bit10 (969~992) 24 980,
2620 11:32:42.985665 TX Bit3 (972~993) 22 982, Bit11 (970~992) 23 981,
2621 11:32:42.988456 TX Bit4 (975~997) 23 986, Bit12 (970~993) 24 981,
2622 11:32:42.995151 TX Bit5 (977~999) 23 988, Bit13 (970~992) 23 981,
2623 11:32:42.998391 TX Bit6 (977~999) 23 988, Bit14 (970~992) 23 981,
2624 11:32:43.001767 TX Bit7 (976~997) 22 986, Bit15 (967~990) 24 978,
2625 11:32:43.001867
2626 11:32:43.005690 Write Rank0 MR14 =0x12
2627 11:32:43.014198
2628 11:32:43.017565 CH=1, VrefRange= 0, VrefLevel = 18
2629 11:32:43.020822 TX Bit0 (977~1000) 24 988, Bit8 (968~992) 25 980,
2630 11:32:43.024233 TX Bit1 (976~998) 23 987, Bit9 (968~991) 24 979,
2631 11:32:43.030777 TX Bit2 (974~995) 22 984, Bit10 (969~992) 24 980,
2632 11:32:43.034265 TX Bit3 (972~994) 23 983, Bit11 (969~992) 24 980,
2633 11:32:43.037682 TX Bit4 (975~998) 24 986, Bit12 (970~993) 24 981,
2634 11:32:43.044154 TX Bit5 (977~999) 23 988, Bit13 (970~992) 23 981,
2635 11:32:43.047525 TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981,
2636 11:32:43.050796 TX Bit7 (976~997) 22 986, Bit15 (967~991) 25 979,
2637 11:32:43.054508
2638 11:32:43.054599 Write Rank0 MR14 =0x14
2639 11:32:43.063820
2640 11:32:43.067311 CH=1, VrefRange= 0, VrefLevel = 20
2641 11:32:43.070643 TX Bit0 (977~1000) 24 988, Bit8 (968~992) 25 980,
2642 11:32:43.073937 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
2643 11:32:43.080549 TX Bit2 (974~996) 23 985, Bit10 (969~992) 24 980,
2644 11:32:43.083624 TX Bit3 (971~995) 25 983, Bit11 (969~993) 25 981,
2645 11:32:43.087012 TX Bit4 (975~998) 24 986, Bit12 (970~993) 24 981,
2646 11:32:43.093562 TX Bit5 (976~999) 24 987, Bit13 (970~993) 24 981,
2647 11:32:43.097213 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
2648 11:32:43.100623 TX Bit7 (976~998) 23 987, Bit15 (966~991) 26 978,
2649 11:32:43.103551
2650 11:32:43.103626 Write Rank0 MR14 =0x16
2651 11:32:43.113083
2652 11:32:43.116270 CH=1, VrefRange= 0, VrefLevel = 22
2653 11:32:43.119822 TX Bit0 (977~1000) 24 988, Bit8 (967~991) 25 979,
2654 11:32:43.123157 TX Bit1 (976~999) 24 987, Bit9 (968~992) 25 980,
2655 11:32:43.129764 TX Bit2 (974~997) 24 985, Bit10 (968~992) 25 980,
2656 11:32:43.133140 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2657 11:32:43.136325 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2658 11:32:43.143211 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2659 11:32:43.146626 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
2660 11:32:43.149871 TX Bit7 (975~998) 24 986, Bit15 (965~991) 27 978,
2661 11:32:43.149947
2662 11:32:43.153049 Write Rank0 MR14 =0x18
2663 11:32:43.162613
2664 11:32:43.166204 CH=1, VrefRange= 0, VrefLevel = 24
2665 11:32:43.169362 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
2666 11:32:43.172617 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
2667 11:32:43.179375 TX Bit2 (973~997) 25 985, Bit10 (968~992) 25 980,
2668 11:32:43.182664 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2669 11:32:43.186293 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2670 11:32:43.192889 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2671 11:32:43.196134 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2672 11:32:43.199446 TX Bit7 (975~998) 24 986, Bit15 (965~991) 27 978,
2673 11:32:43.199521
2674 11:32:43.202552 Write Rank0 MR14 =0x1a
2675 11:32:43.212287
2676 11:32:43.215537 CH=1, VrefRange= 0, VrefLevel = 26
2677 11:32:43.219164 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
2678 11:32:43.222198 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
2679 11:32:43.228728 TX Bit2 (973~997) 25 985, Bit10 (968~992) 25 980,
2680 11:32:43.232360 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2681 11:32:43.235668 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2682 11:32:43.242127 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2683 11:32:43.245744 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2684 11:32:43.248907 TX Bit7 (975~998) 24 986, Bit15 (965~991) 27 978,
2685 11:32:43.248983
2686 11:32:43.252280 Write Rank0 MR14 =0x1c
2687 11:32:43.261563
2688 11:32:43.265005 CH=1, VrefRange= 0, VrefLevel = 28
2689 11:32:43.268183 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
2690 11:32:43.271569 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
2691 11:32:43.278151 TX Bit2 (973~997) 25 985, Bit10 (968~992) 25 980,
2692 11:32:43.281409 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2693 11:32:43.284883 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2694 11:32:43.291384 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2695 11:32:43.295156 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2696 11:32:43.298259 TX Bit7 (975~998) 24 986, Bit15 (965~991) 27 978,
2697 11:32:43.301256
2698 11:32:43.301360 Write Rank0 MR14 =0x1e
2699 11:32:43.310949
2700 11:32:43.314401 CH=1, VrefRange= 0, VrefLevel = 30
2701 11:32:43.317621 TX Bit0 (976~1001) 26 988, Bit8 (967~991) 25 979,
2702 11:32:43.320896 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
2703 11:32:43.327445 TX Bit2 (973~997) 25 985, Bit10 (968~992) 25 980,
2704 11:32:43.331066 TX Bit3 (971~995) 25 983, Bit11 (969~992) 24 980,
2705 11:32:43.334184 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2706 11:32:43.341165 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
2707 11:32:43.344283 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
2708 11:32:43.347755 TX Bit7 (975~998) 24 986, Bit15 (965~991) 27 978,
2709 11:32:43.351140
2710 11:32:43.351215
2711 11:32:43.354474 TX Vref found, early break! 373< 374
2712 11:32:43.357687 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
2713 11:32:43.360954 u1DelayCellOfst[0]=6 cells (5 PI)
2714 11:32:43.364358 u1DelayCellOfst[1]=5 cells (4 PI)
2715 11:32:43.367770 u1DelayCellOfst[2]=2 cells (2 PI)
2716 11:32:43.370975 u1DelayCellOfst[3]=0 cells (0 PI)
2717 11:32:43.371050 u1DelayCellOfst[4]=3 cells (3 PI)
2718 11:32:43.374412 u1DelayCellOfst[5]=5 cells (4 PI)
2719 11:32:43.377578 u1DelayCellOfst[6]=6 cells (5 PI)
2720 11:32:43.380881 u1DelayCellOfst[7]=3 cells (3 PI)
2721 11:32:43.384763 Byte0, DQ PI dly=983, DQM PI dly= 985
2722 11:32:43.391253 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2723 11:32:43.391330
2724 11:32:43.394443 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2725 11:32:43.394523
2726 11:32:43.397730 u1DelayCellOfst[8]=1 cells (1 PI)
2727 11:32:43.401502 u1DelayCellOfst[9]=1 cells (1 PI)
2728 11:32:43.404595 u1DelayCellOfst[10]=2 cells (2 PI)
2729 11:32:43.404671 u1DelayCellOfst[11]=2 cells (2 PI)
2730 11:32:43.407876 u1DelayCellOfst[12]=3 cells (3 PI)
2731 11:32:43.411096 u1DelayCellOfst[13]=3 cells (3 PI)
2732 11:32:43.414456 u1DelayCellOfst[14]=2 cells (2 PI)
2733 11:32:43.417713 u1DelayCellOfst[15]=0 cells (0 PI)
2734 11:32:43.421063 Byte1, DQ PI dly=978, DQM PI dly= 979
2735 11:32:43.427956 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2736 11:32:43.428053
2737 11:32:43.431243 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2738 11:32:43.431340
2739 11:32:43.434934 Write Rank0 MR14 =0x18
2740 11:32:43.435027
2741 11:32:43.435114 Final TX Range 0 Vref 24
2742 11:32:43.435195
2743 11:32:43.441287 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2744 11:32:43.441386
2745 11:32:43.447762 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2746 11:32:43.455140 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2747 11:32:43.461194 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2748 11:32:43.464807 Write Rank0 MR3 =0xb0
2749 11:32:43.467804 DramC Write-DBI on
2750 11:32:43.467879 ==
2751 11:32:43.471160 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2752 11:32:43.475092 fsp= 1, odt_onoff= 1, Byte mode= 0
2753 11:32:43.475168 ==
2754 11:32:43.478121 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2755 11:32:43.478214
2756 11:32:43.481236 Begin, DQ Scan Range 699~763
2757 11:32:43.481369
2758 11:32:43.481430
2759 11:32:43.484850 TX Vref Scan disable
2760 11:32:43.487973 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2761 11:32:43.491615 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2762 11:32:43.494953 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2763 11:32:43.498190 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2764 11:32:43.501870 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2765 11:32:43.504883 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2766 11:32:43.507985 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2767 11:32:43.511424 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2768 11:32:43.515065 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2769 11:32:43.517937 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2770 11:32:43.521192 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
2771 11:32:43.524973 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2772 11:32:43.528207 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2773 11:32:43.531570 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2774 11:32:43.538349 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2775 11:32:43.541446 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2776 11:32:43.544826 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2777 11:32:43.548299 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2778 11:32:43.551398 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2779 11:32:43.558580 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2780 11:32:43.562027 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2781 11:32:43.565242 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2782 11:32:43.568787 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2783 11:32:43.572156 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2784 11:32:43.575295 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2785 11:32:43.578584 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2786 11:32:43.581982 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2787 11:32:43.585255 Byte0, DQ PI dly=730, DQM PI dly= 730
2788 11:32:43.588643 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2789 11:32:43.588778
2790 11:32:43.595225 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2791 11:32:43.595321
2792 11:32:43.598685 Byte1, DQ PI dly=722, DQM PI dly= 722
2793 11:32:43.601948 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2794 11:32:43.602024
2795 11:32:43.605652 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2796 11:32:43.605736
2797 11:32:43.612052 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2798 11:32:43.618773 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2799 11:32:43.625433 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2800 11:32:43.628746 Write Rank0 MR3 =0x30
2801 11:32:43.632155 DramC Write-DBI off
2802 11:32:43.632230
2803 11:32:43.632287 [DATLAT]
2804 11:32:43.635287 Freq=1600, CH1 RK0, use_rxtx_scan=0
2805 11:32:43.635390
2806 11:32:43.635474 DATLAT Default: 0xf
2807 11:32:43.638682 7, 0xFFFF, sum=0
2808 11:32:43.638757 8, 0xFFFF, sum=0
2809 11:32:43.641937 9, 0xFFFF, sum=0
2810 11:32:43.642013 10, 0xFFFF, sum=0
2811 11:32:43.645406 11, 0xFFFF, sum=0
2812 11:32:43.645531 12, 0xFFFF, sum=0
2813 11:32:43.648792 13, 0xFFFF, sum=0
2814 11:32:43.648895 14, 0x0, sum=1
2815 11:32:43.652172 15, 0x0, sum=2
2816 11:32:43.652247 16, 0x0, sum=3
2817 11:32:43.652321 17, 0x0, sum=4
2818 11:32:43.658695 pattern=2 first_step=14 total pass=5 best_step=16
2819 11:32:43.658793 ==
2820 11:32:43.662146 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2821 11:32:43.665420 fsp= 1, odt_onoff= 1, Byte mode= 0
2822 11:32:43.665495 ==
2823 11:32:43.672296 Start DQ dly to find pass range UseTestEngine =1
2824 11:32:43.675682 x-axis: bit #, y-axis: DQ dly (-127~63)
2825 11:32:43.675758 RX Vref Scan = 1
2826 11:32:43.798674
2827 11:32:43.798781 RX Vref found, early break!
2828 11:32:43.798842
2829 11:32:43.805431 Final RX Vref 13, apply to both rank0 and 1
2830 11:32:43.805508 ==
2831 11:32:43.808803 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2832 11:32:43.812086 fsp= 1, odt_onoff= 1, Byte mode= 0
2833 11:32:43.812162 ==
2834 11:32:43.812220 DQS Delay:
2835 11:32:43.815405 DQS0 = 0, DQS1 = 0
2836 11:32:43.815481 DQM Delay:
2837 11:32:43.818840 DQM0 = 20, DQM1 = 18
2838 11:32:43.818915 DQ Delay:
2839 11:32:43.822453 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
2840 11:32:43.825438 DQ4 =19, DQ5 =24, DQ6 =25, DQ7 =20
2841 11:32:43.828644 DQ8 =18, DQ9 =18, DQ10 =17, DQ11 =19
2842 11:32:43.832278 DQ12 =21, DQ13 =19, DQ14 =20, DQ15 =15
2843 11:32:43.832353
2844 11:32:43.832412
2845 11:32:43.832465
2846 11:32:43.835371 [DramC_TX_OE_Calibration] TA2
2847 11:32:43.839006 Original DQ_B0 (3 6) =30, OEN = 27
2848 11:32:43.842259 Original DQ_B1 (3 6) =30, OEN = 27
2849 11:32:43.845276 23, 0x0, End_B0=23 End_B1=23
2850 11:32:43.845379 24, 0x0, End_B0=24 End_B1=24
2851 11:32:43.848870 25, 0x0, End_B0=25 End_B1=25
2852 11:32:43.852002 26, 0x0, End_B0=26 End_B1=26
2853 11:32:43.855542 27, 0x0, End_B0=27 End_B1=27
2854 11:32:43.855620 28, 0x0, End_B0=28 End_B1=28
2855 11:32:43.858570 29, 0x0, End_B0=29 End_B1=29
2856 11:32:43.861860 30, 0x0, End_B0=30 End_B1=30
2857 11:32:43.865576 31, 0xFFFF, End_B0=30 End_B1=30
2858 11:32:43.872116 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2859 11:32:43.875504 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2860 11:32:43.875606
2861 11:32:43.875685
2862 11:32:43.879257 Write Rank0 MR23 =0x3f
2863 11:32:43.879333 [DQSOSC]
2864 11:32:43.885479 [DQSOSCAuto] RK0, (LSB)MR18= 0xa0, (MSB)MR19= 0x3, tDQSOscB0 = 339 ps tDQSOscB1 = 0 ps
2865 11:32:43.892543 CH1_RK0: MR19=0x3, MR18=0xA0, DQSOSC=339, MR23=63, INC=21, DEC=32
2866 11:32:43.895751 Write Rank0 MR23 =0x3f
2867 11:32:43.895849 [DQSOSC]
2868 11:32:43.902318 [DQSOSCAuto] RK0, (LSB)MR18= 0xa1, (MSB)MR19= 0x3, tDQSOscB0 = 339 ps tDQSOscB1 = 0 ps
2869 11:32:43.905877 CH1 RK0: MR19=3, MR18=A1
2870 11:32:43.909125 [RankSwap] Rank num 2, (Multi 1), Rank 1
2871 11:32:43.912325 Write Rank0 MR2 =0xad
2872 11:32:43.912401 [Write Leveling]
2873 11:32:43.915924 delay byte0 byte1 byte2 byte3
2874 11:32:43.916001
2875 11:32:43.916059 10 0 0
2876 11:32:43.919440 11 0 0
2877 11:32:43.919517 12 0 0
2878 11:32:43.922433 13 0 0
2879 11:32:43.922510 14 0 0
2880 11:32:43.922570 15 0 0
2881 11:32:43.925920 16 0 0
2882 11:32:43.925998 17 0 0
2883 11:32:43.929296 18 0 0
2884 11:32:43.929402 19 0 0
2885 11:32:43.932469 20 0 0
2886 11:32:43.932546 21 0 0
2887 11:32:43.932605 22 0 0
2888 11:32:43.936145 23 0 0
2889 11:32:43.936245 24 0 0
2890 11:32:43.938961 25 0 0
2891 11:32:43.939058 26 0 0
2892 11:32:43.939147 27 0 0
2893 11:32:43.942309 28 0 0
2894 11:32:43.942412 29 0 0
2895 11:32:43.945893 30 0 0
2896 11:32:43.945994 31 0 0
2897 11:32:43.949058 32 0 ff
2898 11:32:43.949131 33 0 ff
2899 11:32:43.949190 34 0 ff
2900 11:32:43.952413 35 0 ff
2901 11:32:43.952493 36 ff ff
2902 11:32:43.955890 37 ff ff
2903 11:32:43.955970 38 ff ff
2904 11:32:43.959032 39 ff ff
2905 11:32:43.959125 40 ff ff
2906 11:32:43.962482 41 ff ff
2907 11:32:43.962560 42 ff ff
2908 11:32:43.966019 pass bytecount = 0xff (0xff: all bytes pass)
2909 11:32:43.966094
2910 11:32:43.969252 DQS0 dly: 36
2911 11:32:43.969342 DQS1 dly: 32
2912 11:32:43.972644 Write Rank0 MR2 =0x2d
2913 11:32:43.975684 [RankSwap] Rank num 2, (Multi 1), Rank 0
2914 11:32:43.975760 Write Rank1 MR1 =0xd6
2915 11:32:43.979107 [Gating]
2916 11:32:43.979182 ==
2917 11:32:43.982630 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2918 11:32:43.986085 fsp= 1, odt_onoff= 1, Byte mode= 0
2919 11:32:43.986161 ==
2920 11:32:43.992362 3 1 0 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2921 11:32:43.995660 3 1 4 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2922 11:32:43.998955 3 1 8 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2923 11:32:44.002526 3 1 12 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2924 11:32:44.008989 3 1 16 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2925 11:32:44.012315 3 1 20 |3534 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
2926 11:32:44.015837 3 1 24 |3534 2c2b |(11 11)(11 11) |(0 1)(1 0)| 0
2927 11:32:44.022955 3 1 28 |3534 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2928 11:32:44.026133 3 2 0 |1c1c 2c2b |(11 11)(11 11) |(1 1)(1 0)| 0
2929 11:32:44.029047 3 2 4 |3d3d 303 |(11 11)(11 11) |(1 1)(0 0)| 0
2930 11:32:44.035946 3 2 8 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2931 11:32:44.039156 3 2 12 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2932 11:32:44.042565 3 2 16 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2933 11:32:44.045658 3 2 20 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2934 11:32:44.052515 3 2 24 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2935 11:32:44.055975 3 2 28 |3d3d 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2936 11:32:44.059724 3 3 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2937 11:32:44.066195 3 3 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2938 11:32:44.069447 3 3 8 |1b1b 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
2939 11:32:44.072741 [Byte 0] Lead/lag Transition tap number (1)
2940 11:32:44.075980 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2941 11:32:44.082833 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2942 11:32:44.086006 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
2943 11:32:44.089357 3 3 24 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2944 11:32:44.096095 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 0)| 0
2945 11:32:44.099440 3 4 0 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2946 11:32:44.102570 3 4 4 |1a1a 2322 |(11 11)(11 11) |(1 1)(1 1)| 0
2947 11:32:44.109428 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2948 11:32:44.112758 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2949 11:32:44.116299 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2950 11:32:44.122701 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2951 11:32:44.125956 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2952 11:32:44.129391 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2953 11:32:44.132671 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2954 11:32:44.139099 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2955 11:32:44.142728 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2956 11:32:44.145860 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2957 11:32:44.152943 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2958 11:32:44.156149 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2959 11:32:44.159166 [Byte 0] Lead/lag falling Transition (3, 5, 20)
2960 11:32:44.166067 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2961 11:32:44.169413 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2962 11:32:44.172838 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
2963 11:32:44.176280 [Byte 0] Lead/lag Transition tap number (3)
2964 11:32:44.182914 3 6 0 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2965 11:32:44.186132 [Byte 1] Lead/lag Transition tap number (3)
2966 11:32:44.189528 3 6 4 |4646 404 |(0 0)(11 11) |(0 0)(0 0)| 0
2967 11:32:44.192819 [Byte 0]First pass (3, 6, 4)
2968 11:32:44.196115 3 6 8 |4646 4646 |(0 0)(10 10) |(0 0)(0 0)| 0
2969 11:32:44.199449 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2970 11:32:44.203532 [Byte 1]First pass (3, 6, 12)
2971 11:32:44.206525 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2972 11:32:44.209875 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2973 11:32:44.213442 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2974 11:32:44.219704 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2975 11:32:44.223390 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2976 11:32:44.226566 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2977 11:32:44.229812 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2978 11:32:44.233334 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2979 11:32:44.240081 All bytes gating window > 1UI, Early break!
2980 11:32:44.240157
2981 11:32:44.243376 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
2982 11:32:44.243474
2983 11:32:44.246658 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 30)
2984 11:32:44.246750
2985 11:32:44.246834
2986 11:32:44.246914
2987 11:32:44.249841 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
2988 11:32:44.249930
2989 11:32:44.253337 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 30)
2990 11:32:44.253429
2991 11:32:44.256554
2992 11:32:44.256645 Write Rank1 MR1 =0x56
2993 11:32:44.256728
2994 11:32:44.259994 best RODT dly(2T, 0.5T) = (2, 2)
2995 11:32:44.260090
2996 11:32:44.263500 best RODT dly(2T, 0.5T) = (2, 2)
2997 11:32:44.263588 ==
2998 11:32:44.270100 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2999 11:32:44.270177 fsp= 1, odt_onoff= 1, Byte mode= 0
3000 11:32:44.273573 ==
3001 11:32:44.276709 Start DQ dly to find pass range UseTestEngine =0
3002 11:32:44.280185 x-axis: bit #, y-axis: DQ dly (-127~63)
3003 11:32:44.280261 RX Vref Scan = 0
3004 11:32:44.283503 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3005 11:32:44.286669 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3006 11:32:44.290067 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3007 11:32:44.293495 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3008 11:32:44.296679 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3009 11:32:44.300135 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3010 11:32:44.303400 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3011 11:32:44.303477 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3012 11:32:44.306801 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3013 11:32:44.310393 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3014 11:32:44.313315 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3015 11:32:44.316825 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3016 11:32:44.320229 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3017 11:32:44.323876 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3018 11:32:44.327018 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3019 11:32:44.327095 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3020 11:32:44.330450 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3021 11:32:44.333473 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3022 11:32:44.336997 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3023 11:32:44.340154 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3024 11:32:44.343656 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3025 11:32:44.346776 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3026 11:32:44.346872 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3027 11:32:44.350210 -3, [0] xxxoxxxx xxxxxxxx [MSB]
3028 11:32:44.353523 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3029 11:32:44.357021 -1, [0] xxooxxxx xxxxxxxo [MSB]
3030 11:32:44.360281 0, [0] xxooxxxx xxxxxxxo [MSB]
3031 11:32:44.363491 1, [0] xxooxxxx oxoxxxxo [MSB]
3032 11:32:44.363584 2, [0] xxooxxxo oooxxxxo [MSB]
3033 11:32:44.366744 3, [0] xxoooxxo oooxxxoo [MSB]
3034 11:32:44.370387 4, [0] xxoooxxo ooooxxoo [MSB]
3035 11:32:44.373842 5, [0] xxoooxxo ooooxooo [MSB]
3036 11:32:44.376994 6, [0] xoooooxo oooooooo [MSB]
3037 11:32:44.380479 33, [0] oooxoooo oooooooo [MSB]
3038 11:32:44.380578 34, [0] oooxoooo ooooooox [MSB]
3039 11:32:44.383634 35, [0] ooxxoooo ooooooox [MSB]
3040 11:32:44.387113 36, [0] ooxxoooo oxooooox [MSB]
3041 11:32:44.390260 37, [0] ooxxoooo xxxoooox [MSB]
3042 11:32:44.393615 38, [0] ooxxoooo xxxxooox [MSB]
3043 11:32:44.396895 39, [0] ooxxxoox xxxxooxx [MSB]
3044 11:32:44.400502 40, [0] ooxxxoox xxxxoxxx [MSB]
3045 11:32:44.400594 41, [0] ooxxxoox xxxxxxxx [MSB]
3046 11:32:44.403484 42, [0] ooxxxoox xxxxxxxx [MSB]
3047 11:32:44.407006 43, [0] oxxxxxxx xxxxxxxx [MSB]
3048 11:32:44.410326 44, [0] xxxxxxxx xxxxxxxx [MSB]
3049 11:32:44.413753 iDelay=44, Bit 0, Center 25 (7 ~ 43) 37
3050 11:32:44.417297 iDelay=44, Bit 1, Center 24 (6 ~ 42) 37
3051 11:32:44.420479 iDelay=44, Bit 2, Center 16 (-1 ~ 34) 36
3052 11:32:44.423999 iDelay=44, Bit 3, Center 14 (-3 ~ 32) 36
3053 11:32:44.427356 iDelay=44, Bit 4, Center 20 (3 ~ 38) 36
3054 11:32:44.430682 iDelay=44, Bit 5, Center 24 (6 ~ 42) 37
3055 11:32:44.433984 iDelay=44, Bit 6, Center 24 (7 ~ 42) 36
3056 11:32:44.437127 iDelay=44, Bit 7, Center 20 (2 ~ 38) 37
3057 11:32:44.443928 iDelay=44, Bit 8, Center 18 (1 ~ 36) 36
3058 11:32:44.447090 iDelay=44, Bit 9, Center 18 (2 ~ 35) 34
3059 11:32:44.450544 iDelay=44, Bit 10, Center 18 (1 ~ 36) 36
3060 11:32:44.453791 iDelay=44, Bit 11, Center 20 (4 ~ 37) 34
3061 11:32:44.457152 iDelay=44, Bit 12, Center 23 (6 ~ 40) 35
3062 11:32:44.460623 iDelay=44, Bit 13, Center 22 (5 ~ 39) 35
3063 11:32:44.464095 iDelay=44, Bit 14, Center 20 (3 ~ 38) 36
3064 11:32:44.467103 iDelay=44, Bit 15, Center 16 (-1 ~ 33) 35
3065 11:32:44.467197 ==
3066 11:32:44.473640 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3067 11:32:44.477334 fsp= 1, odt_onoff= 1, Byte mode= 0
3068 11:32:44.477425 ==
3069 11:32:44.477511 DQS Delay:
3070 11:32:44.480256 DQS0 = 0, DQS1 = 0
3071 11:32:44.480346 DQM Delay:
3072 11:32:44.480428 DQM0 = 20, DQM1 = 19
3073 11:32:44.483936 DQ Delay:
3074 11:32:44.487315 DQ0 =25, DQ1 =24, DQ2 =16, DQ3 =14
3075 11:32:44.490890 DQ4 =20, DQ5 =24, DQ6 =24, DQ7 =20
3076 11:32:44.494042 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =20
3077 11:32:44.497203 DQ12 =23, DQ13 =22, DQ14 =20, DQ15 =16
3078 11:32:44.497302
3079 11:32:44.497360
3080 11:32:44.497413 DramC Write-DBI off
3081 11:32:44.497465 ==
3082 11:32:44.503874 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3083 11:32:44.507136 fsp= 1, odt_onoff= 1, Byte mode= 0
3084 11:32:44.507212 ==
3085 11:32:44.510747 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3086 11:32:44.510838
3087 11:32:44.513765 Begin, DQ Scan Range 928~1184
3088 11:32:44.513840
3089 11:32:44.513898
3090 11:32:44.517367 TX Vref Scan disable
3091 11:32:44.520673 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3092 11:32:44.524071 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3093 11:32:44.527412 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3094 11:32:44.530590 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3095 11:32:44.534415 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3096 11:32:44.537488 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3097 11:32:44.540489 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3098 11:32:44.544255 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3099 11:32:44.547458 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3100 11:32:44.550726 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3101 11:32:44.554157 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3102 11:32:44.558096 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3103 11:32:44.560552 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3104 11:32:44.563972 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3105 11:32:44.567661 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3106 11:32:44.574331 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3107 11:32:44.577665 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3108 11:32:44.580813 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3109 11:32:44.583972 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3110 11:32:44.587607 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3111 11:32:44.591167 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3112 11:32:44.594545 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3113 11:32:44.597612 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3114 11:32:44.601144 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3115 11:32:44.604796 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3116 11:32:44.607593 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3117 11:32:44.611248 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3118 11:32:44.614237 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3119 11:32:44.618213 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3120 11:32:44.620873 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3121 11:32:44.624286 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3122 11:32:44.627810 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3123 11:32:44.631388 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3124 11:32:44.634622 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3125 11:32:44.637834 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3126 11:32:44.641537 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3127 11:32:44.647731 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3128 11:32:44.651003 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3129 11:32:44.654610 966 |3 6 6|[0] xxxxxxxx xxxxxxxo [MSB]
3130 11:32:44.657802 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3131 11:32:44.661395 968 |3 6 8|[0] xxxxxxxx ooxxxxxo [MSB]
3132 11:32:44.664459 969 |3 6 9|[0] xxxxxxxx ooooxxxo [MSB]
3133 11:32:44.667704 970 |3 6 10|[0] xxxxxxxx oooooooo [MSB]
3134 11:32:44.671039 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3135 11:32:44.674689 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3136 11:32:44.677614 973 |3 6 13|[0] xxooxxxx oooooooo [MSB]
3137 11:32:44.681062 974 |3 6 14|[0] xxoooxxo oooooooo [MSB]
3138 11:32:44.684576 975 |3 6 15|[0] xooooxxo oooooooo [MSB]
3139 11:32:44.692210 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3140 11:32:44.695405 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3141 11:32:44.698566 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3142 11:32:44.702028 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3143 11:32:44.705667 995 |3 6 35|[0] oooooooo xxxxxxxx [MSB]
3144 11:32:44.709052 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
3145 11:32:44.712028 997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]
3146 11:32:44.715446 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
3147 11:32:44.719095 Byte0, DQ PI dly=985, DQM PI dly= 985
3148 11:32:44.722469 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
3149 11:32:44.722561
3150 11:32:44.728883 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
3151 11:32:44.728978
3152 11:32:44.732472 Byte1, DQ PI dly=979, DQM PI dly= 979
3153 11:32:44.735419 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
3154 11:32:44.735516
3155 11:32:44.738779 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
3156 11:32:44.738869
3157 11:32:44.738954 ==
3158 11:32:44.745638 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3159 11:32:44.748828 fsp= 1, odt_onoff= 1, Byte mode= 0
3160 11:32:44.748918 ==
3161 11:32:44.752488 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3162 11:32:44.752580
3163 11:32:44.755718 Begin, DQ Scan Range 955~1019
3164 11:32:44.758980 Write Rank1 MR14 =0x0
3165 11:32:44.766292
3166 11:32:44.766391 CH=1, VrefRange= 0, VrefLevel = 0
3167 11:32:44.773037 TX Bit0 (978~998) 21 988, Bit8 (970~988) 19 979,
3168 11:32:44.776461 TX Bit1 (977~997) 21 987, Bit9 (970~987) 18 978,
3169 11:32:44.783130 TX Bit2 (975~991) 17 983, Bit10 (970~986) 17 978,
3170 11:32:44.786485 TX Bit3 (974~990) 17 982, Bit11 (971~990) 20 980,
3171 11:32:44.790000 TX Bit4 (976~993) 18 984, Bit12 (972~991) 20 981,
3172 11:32:44.796833 TX Bit5 (977~997) 21 987, Bit13 (972~988) 17 980,
3173 11:32:44.800271 TX Bit6 (977~997) 21 987, Bit14 (971~988) 18 979,
3174 11:32:44.803707 TX Bit7 (977~994) 18 985, Bit15 (968~986) 19 977,
3175 11:32:44.803806
3176 11:32:44.806718 Write Rank1 MR14 =0x2
3177 11:32:44.815083
3178 11:32:44.815154 CH=1, VrefRange= 0, VrefLevel = 2
3179 11:32:44.821876 TX Bit0 (977~998) 22 987, Bit8 (970~989) 20 979,
3180 11:32:44.825428 TX Bit1 (976~997) 22 986, Bit9 (970~988) 19 979,
3181 11:32:44.832214 TX Bit2 (974~992) 19 983, Bit10 (970~987) 18 978,
3182 11:32:44.835489 TX Bit3 (974~990) 17 982, Bit11 (971~990) 20 980,
3183 11:32:44.838753 TX Bit4 (976~994) 19 985, Bit12 (971~991) 21 981,
3184 11:32:44.845136 TX Bit5 (977~997) 21 987, Bit13 (972~988) 17 980,
3185 11:32:44.848563 TX Bit6 (977~998) 22 987, Bit14 (971~989) 19 980,
3186 11:32:44.851805 TX Bit7 (976~994) 19 985, Bit15 (968~986) 19 977,
3187 11:32:44.851900
3188 11:32:44.855271 Write Rank1 MR14 =0x4
3189 11:32:44.863916
3190 11:32:44.864008 CH=1, VrefRange= 0, VrefLevel = 4
3191 11:32:44.870660 TX Bit0 (977~998) 22 987, Bit8 (969~989) 21 979,
3192 11:32:44.874018 TX Bit1 (976~997) 22 986, Bit9 (970~988) 19 979,
3193 11:32:44.880708 TX Bit2 (974~992) 19 983, Bit10 (970~988) 19 979,
3194 11:32:44.884215 TX Bit3 (973~991) 19 982, Bit11 (971~991) 21 981,
3195 11:32:44.887278 TX Bit4 (976~994) 19 985, Bit12 (971~991) 21 981,
3196 11:32:44.893980 TX Bit5 (977~998) 22 987, Bit13 (971~989) 19 980,
3197 11:32:44.897506 TX Bit6 (977~998) 22 987, Bit14 (971~989) 19 980,
3198 11:32:44.900956 TX Bit7 (976~995) 20 985, Bit15 (968~987) 20 977,
3199 11:32:44.901020
3200 11:32:44.903898 Write Rank1 MR14 =0x6
3201 11:32:44.912881
3202 11:32:44.912969 CH=1, VrefRange= 0, VrefLevel = 6
3203 11:32:44.919660 TX Bit0 (977~998) 22 987, Bit8 (969~990) 22 979,
3204 11:32:44.923153 TX Bit1 (976~997) 22 986, Bit9 (970~989) 20 979,
3205 11:32:44.929565 TX Bit2 (973~992) 20 982, Bit10 (970~989) 20 979,
3206 11:32:44.932814 TX Bit3 (973~991) 19 982, Bit11 (970~991) 22 980,
3207 11:32:44.936145 TX Bit4 (975~995) 21 985, Bit12 (971~991) 21 981,
3208 11:32:44.942940 TX Bit5 (977~998) 22 987, Bit13 (971~990) 20 980,
3209 11:32:44.946417 TX Bit6 (977~998) 22 987, Bit14 (970~990) 21 980,
3210 11:32:44.949589 TX Bit7 (976~996) 21 986, Bit15 (967~987) 21 977,
3211 11:32:44.949665
3212 11:32:44.952756 Write Rank1 MR14 =0x8
3213 11:32:44.961530
3214 11:32:44.961605 CH=1, VrefRange= 0, VrefLevel = 8
3215 11:32:44.968373 TX Bit0 (977~998) 22 987, Bit8 (969~990) 22 979,
3216 11:32:44.971738 TX Bit1 (976~997) 22 986, Bit9 (969~990) 22 979,
3217 11:32:44.978126 TX Bit2 (973~993) 21 983, Bit10 (970~989) 20 979,
3218 11:32:44.981769 TX Bit3 (972~992) 21 982, Bit11 (970~991) 22 980,
3219 11:32:44.985038 TX Bit4 (975~996) 22 985, Bit12 (971~992) 22 981,
3220 11:32:44.991644 TX Bit5 (977~998) 22 987, Bit13 (970~990) 21 980,
3221 11:32:44.995212 TX Bit6 (977~998) 22 987, Bit14 (970~991) 22 980,
3222 11:32:44.998153 TX Bit7 (976~996) 21 986, Bit15 (967~988) 22 977,
3223 11:32:44.998230
3224 11:32:45.005121 wait MRW command Rank1 MR14 =0xa fired (1)
3225 11:32:45.005198 Write Rank1 MR14 =0xa
3226 11:32:45.014034
3227 11:32:45.017570 CH=1, VrefRange= 0, VrefLevel = 10
3228 11:32:45.020987 TX Bit0 (977~998) 22 987, Bit8 (969~990) 22 979,
3229 11:32:45.024203 TX Bit1 (976~998) 23 987, Bit9 (969~990) 22 979,
3230 11:32:45.030721 TX Bit2 (973~994) 22 983, Bit10 (970~990) 21 980,
3231 11:32:45.033992 TX Bit3 (972~992) 21 982, Bit11 (970~992) 23 981,
3232 11:32:45.037627 TX Bit4 (975~996) 22 985, Bit12 (971~992) 22 981,
3233 11:32:45.044165 TX Bit5 (976~998) 23 987, Bit13 (970~991) 22 980,
3234 11:32:45.047640 TX Bit6 (977~998) 22 987, Bit14 (970~991) 22 980,
3235 11:32:45.050740 TX Bit7 (975~997) 23 986, Bit15 (967~989) 23 978,
3236 11:32:45.050817
3237 11:32:45.053875 Write Rank1 MR14 =0xc
3238 11:32:45.063227
3239 11:32:45.067017 CH=1, VrefRange= 0, VrefLevel = 12
3240 11:32:45.069787 TX Bit0 (976~999) 24 987, Bit8 (969~991) 23 980,
3241 11:32:45.073353 TX Bit1 (976~998) 23 987, Bit9 (969~990) 22 979,
3242 11:32:45.079639 TX Bit2 (972~994) 23 983, Bit10 (969~990) 22 979,
3243 11:32:45.083163 TX Bit3 (971~993) 23 982, Bit11 (970~991) 22 980,
3244 11:32:45.086279 TX Bit4 (974~997) 24 985, Bit12 (971~992) 22 981,
3245 11:32:45.093357 TX Bit5 (976~998) 23 987, Bit13 (970~991) 22 980,
3246 11:32:45.096634 TX Bit6 (976~999) 24 987, Bit14 (970~991) 22 980,
3247 11:32:45.099754 TX Bit7 (975~997) 23 986, Bit15 (967~989) 23 978,
3248 11:32:45.099830
3249 11:32:45.103189 Write Rank1 MR14 =0xe
3250 11:32:45.112036
3251 11:32:45.115402 CH=1, VrefRange= 0, VrefLevel = 14
3252 11:32:45.118622 TX Bit0 (976~999) 24 987, Bit8 (969~991) 23 980,
3253 11:32:45.122213 TX Bit1 (976~998) 23 987, Bit9 (969~990) 22 979,
3254 11:32:45.128931 TX Bit2 (971~995) 25 983, Bit10 (969~990) 22 979,
3255 11:32:45.132147 TX Bit3 (971~994) 24 982, Bit11 (970~992) 23 981,
3256 11:32:45.135663 TX Bit4 (974~997) 24 985, Bit12 (970~992) 23 981,
3257 11:32:45.142101 TX Bit5 (976~999) 24 987, Bit13 (970~991) 22 980,
3258 11:32:45.145621 TX Bit6 (976~999) 24 987, Bit14 (970~991) 22 980,
3259 11:32:45.149193 TX Bit7 (975~997) 23 986, Bit15 (966~990) 25 978,
3260 11:32:45.152281
3261 11:32:45.152356 Write Rank1 MR14 =0x10
3262 11:32:45.161587
3263 11:32:45.165183 CH=1, VrefRange= 0, VrefLevel = 16
3264 11:32:45.168472 TX Bit0 (976~999) 24 987, Bit8 (968~991) 24 979,
3265 11:32:45.171403 TX Bit1 (975~998) 24 986, Bit9 (969~991) 23 980,
3266 11:32:45.178143 TX Bit2 (971~996) 26 983, Bit10 (969~991) 23 980,
3267 11:32:45.181978 TX Bit3 (971~995) 25 983, Bit11 (970~992) 23 981,
3268 11:32:45.184761 TX Bit4 (974~997) 24 985, Bit12 (970~992) 23 981,
3269 11:32:45.191558 TX Bit5 (976~999) 24 987, Bit13 (970~991) 22 980,
3270 11:32:45.194849 TX Bit6 (976~999) 24 987, Bit14 (970~991) 22 980,
3271 11:32:45.198076 TX Bit7 (975~997) 23 986, Bit15 (966~990) 25 978,
3272 11:32:45.198173
3273 11:32:45.201262 Write Rank1 MR14 =0x12
3274 11:32:45.210883
3275 11:32:45.214150 CH=1, VrefRange= 0, VrefLevel = 18
3276 11:32:45.217179 TX Bit0 (976~1000) 25 988, Bit8 (968~991) 24 979,
3277 11:32:45.220652 TX Bit1 (975~998) 24 986, Bit9 (968~991) 24 979,
3278 11:32:45.227370 TX Bit2 (972~996) 25 984, Bit10 (969~991) 23 980,
3279 11:32:45.230724 TX Bit3 (970~995) 26 982, Bit11 (969~992) 24 980,
3280 11:32:45.233858 TX Bit4 (973~997) 25 985, Bit12 (970~993) 24 981,
3281 11:32:45.240661 TX Bit5 (976~999) 24 987, Bit13 (970~992) 23 981,
3282 11:32:45.244332 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3283 11:32:45.247299 TX Bit7 (974~997) 24 985, Bit15 (966~990) 25 978,
3284 11:32:45.251158
3285 11:32:45.251222 Write Rank1 MR14 =0x14
3286 11:32:45.260312
3287 11:32:45.263504 CH=1, VrefRange= 0, VrefLevel = 20
3288 11:32:45.267080 TX Bit0 (976~1001) 26 988, Bit8 (968~991) 24 979,
3289 11:32:45.270497 TX Bit1 (975~999) 25 987, Bit9 (968~991) 24 979,
3290 11:32:45.277193 TX Bit2 (971~997) 27 984, Bit10 (968~991) 24 979,
3291 11:32:45.280287 TX Bit3 (970~996) 27 983, Bit11 (969~992) 24 980,
3292 11:32:45.283764 TX Bit4 (973~997) 25 985, Bit12 (970~993) 24 981,
3293 11:32:45.290280 TX Bit5 (976~1000) 25 988, Bit13 (969~992) 24 980,
3294 11:32:45.293662 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3295 11:32:45.297458 TX Bit7 (974~998) 25 986, Bit15 (965~991) 27 978,
3296 11:32:45.297522
3297 11:32:45.300564 Write Rank1 MR14 =0x16
3298 11:32:45.309909
3299 11:32:45.313163 CH=1, VrefRange= 0, VrefLevel = 22
3300 11:32:45.316465 TX Bit0 (976~1001) 26 988, Bit8 (968~991) 24 979,
3301 11:32:45.319987 TX Bit1 (975~999) 25 987, Bit9 (968~991) 24 979,
3302 11:32:45.326958 TX Bit2 (971~997) 27 984, Bit10 (968~991) 24 979,
3303 11:32:45.330437 TX Bit3 (970~996) 27 983, Bit11 (969~992) 24 980,
3304 11:32:45.333363 TX Bit4 (973~997) 25 985, Bit12 (970~993) 24 981,
3305 11:32:45.340354 TX Bit5 (976~1000) 25 988, Bit13 (969~992) 24 980,
3306 11:32:45.343362 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3307 11:32:45.346709 TX Bit7 (974~998) 25 986, Bit15 (965~991) 27 978,
3308 11:32:45.346803
3309 11:32:45.350049 Write Rank1 MR14 =0x18
3310 11:32:45.359699
3311 11:32:45.359777 CH=1, VrefRange= 0, VrefLevel = 24
3312 11:32:45.366425 TX Bit0 (976~1001) 26 988, Bit8 (968~991) 24 979,
3313 11:32:45.370092 TX Bit1 (975~999) 25 987, Bit9 (968~991) 24 979,
3314 11:32:45.376593 TX Bit2 (971~997) 27 984, Bit10 (968~991) 24 979,
3315 11:32:45.379971 TX Bit3 (970~996) 27 983, Bit11 (969~992) 24 980,
3316 11:32:45.383433 TX Bit4 (973~997) 25 985, Bit12 (970~993) 24 981,
3317 11:32:45.390543 TX Bit5 (976~1000) 25 988, Bit13 (969~992) 24 980,
3318 11:32:45.393140 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3319 11:32:45.396768 TX Bit7 (974~998) 25 986, Bit15 (965~991) 27 978,
3320 11:32:45.396837
3321 11:32:45.400420 Write Rank1 MR14 =0x1a
3322 11:32:45.409165
3323 11:32:45.413049 CH=1, VrefRange= 0, VrefLevel = 26
3324 11:32:45.415791 TX Bit0 (976~1001) 26 988, Bit8 (968~991) 24 979,
3325 11:32:45.419216 TX Bit1 (975~999) 25 987, Bit9 (968~991) 24 979,
3326 11:32:45.425879 TX Bit2 (971~997) 27 984, Bit10 (968~991) 24 979,
3327 11:32:45.429080 TX Bit3 (970~996) 27 983, Bit11 (969~992) 24 980,
3328 11:32:45.432646 TX Bit4 (973~997) 25 985, Bit12 (970~993) 24 981,
3329 11:32:45.439664 TX Bit5 (976~1000) 25 988, Bit13 (969~992) 24 980,
3330 11:32:45.442732 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3331 11:32:45.445885 TX Bit7 (974~998) 25 986, Bit15 (965~991) 27 978,
3332 11:32:45.445953
3333 11:32:45.449402 Write Rank1 MR14 =0x1c
3334 11:32:45.458457
3335 11:32:45.461889 CH=1, VrefRange= 0, VrefLevel = 28
3336 11:32:45.465519 TX Bit0 (976~1001) 26 988, Bit8 (968~991) 24 979,
3337 11:32:45.468813 TX Bit1 (975~999) 25 987, Bit9 (968~991) 24 979,
3338 11:32:45.475800 TX Bit2 (971~997) 27 984, Bit10 (968~991) 24 979,
3339 11:32:45.478864 TX Bit3 (970~996) 27 983, Bit11 (969~992) 24 980,
3340 11:32:45.482308 TX Bit4 (973~997) 25 985, Bit12 (970~993) 24 981,
3341 11:32:45.488949 TX Bit5 (976~1000) 25 988, Bit13 (969~992) 24 980,
3342 11:32:45.492269 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3343 11:32:45.495467 TX Bit7 (974~998) 25 986, Bit15 (965~991) 27 978,
3344 11:32:45.498962
3345 11:32:45.499033 Write Rank1 MR14 =0x1e
3346 11:32:45.508258
3347 11:32:45.511647 CH=1, VrefRange= 0, VrefLevel = 30
3348 11:32:45.514666 TX Bit0 (976~1001) 26 988, Bit8 (968~991) 24 979,
3349 11:32:45.518620 TX Bit1 (975~999) 25 987, Bit9 (968~991) 24 979,
3350 11:32:45.524993 TX Bit2 (971~997) 27 984, Bit10 (968~991) 24 979,
3351 11:32:45.528476 TX Bit3 (970~996) 27 983, Bit11 (969~992) 24 980,
3352 11:32:45.531571 TX Bit4 (973~997) 25 985, Bit12 (970~993) 24 981,
3353 11:32:45.538421 TX Bit5 (976~1000) 25 988, Bit13 (969~992) 24 980,
3354 11:32:45.541651 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3355 11:32:45.545280 TX Bit7 (974~998) 25 986, Bit15 (965~991) 27 978,
3356 11:32:45.548516
3357 11:32:45.548584 Write Rank1 MR14 =0x20
3358 11:32:45.558101
3359 11:32:45.561332 CH=1, VrefRange= 0, VrefLevel = 32
3360 11:32:45.564515 TX Bit0 (976~1001) 26 988, Bit8 (968~991) 24 979,
3361 11:32:45.568009 TX Bit1 (975~999) 25 987, Bit9 (968~991) 24 979,
3362 11:32:45.574435 TX Bit2 (971~997) 27 984, Bit10 (968~991) 24 979,
3363 11:32:45.577703 TX Bit3 (970~996) 27 983, Bit11 (969~992) 24 980,
3364 11:32:45.580973 TX Bit4 (973~997) 25 985, Bit12 (970~993) 24 981,
3365 11:32:45.587904 TX Bit5 (976~1000) 25 988, Bit13 (969~992) 24 980,
3366 11:32:45.591442 TX Bit6 (976~1000) 25 988, Bit14 (969~992) 24 980,
3367 11:32:45.594444 TX Bit7 (974~998) 25 986, Bit15 (965~991) 27 978,
3368 11:32:45.597877
3369 11:32:45.597937
3370 11:32:45.601289 TX Vref found, early break! 378< 380
3371 11:32:45.604571 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =753/100 ps
3372 11:32:45.608044 u1DelayCellOfst[0]=6 cells (5 PI)
3373 11:32:45.611315 u1DelayCellOfst[1]=5 cells (4 PI)
3374 11:32:45.614696 u1DelayCellOfst[2]=1 cells (1 PI)
3375 11:32:45.617787 u1DelayCellOfst[3]=0 cells (0 PI)
3376 11:32:45.617849 u1DelayCellOfst[4]=2 cells (2 PI)
3377 11:32:45.621348 u1DelayCellOfst[5]=6 cells (5 PI)
3378 11:32:45.624761 u1DelayCellOfst[6]=6 cells (5 PI)
3379 11:32:45.628225 u1DelayCellOfst[7]=3 cells (3 PI)
3380 11:32:45.631402 Byte0, DQ PI dly=983, DQM PI dly= 985
3381 11:32:45.634655 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
3382 11:32:45.638056
3383 11:32:45.641234 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
3384 11:32:45.641334
3385 11:32:45.644779 u1DelayCellOfst[8]=1 cells (1 PI)
3386 11:32:45.648021 u1DelayCellOfst[9]=1 cells (1 PI)
3387 11:32:45.651584 u1DelayCellOfst[10]=1 cells (1 PI)
3388 11:32:45.654886 u1DelayCellOfst[11]=2 cells (2 PI)
3389 11:32:45.654956 u1DelayCellOfst[12]=3 cells (3 PI)
3390 11:32:45.658026 u1DelayCellOfst[13]=2 cells (2 PI)
3391 11:32:45.661365 u1DelayCellOfst[14]=2 cells (2 PI)
3392 11:32:45.664778 u1DelayCellOfst[15]=0 cells (0 PI)
3393 11:32:45.668389 Byte1, DQ PI dly=978, DQM PI dly= 979
3394 11:32:45.674715 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3395 11:32:45.674792
3396 11:32:45.677915 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3397 11:32:45.677983
3398 11:32:45.681543 Write Rank1 MR14 =0x14
3399 11:32:45.681609
3400 11:32:45.681665 Final TX Range 0 Vref 20
3401 11:32:45.681721
3402 11:32:45.687847 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3403 11:32:45.687919
3404 11:32:45.694665 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3405 11:32:45.701830 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3406 11:32:45.708344 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3407 11:32:45.711333 Write Rank1 MR3 =0xb0
3408 11:32:45.714811 DramC Write-DBI on
3409 11:32:45.714883 ==
3410 11:32:45.717993 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3411 11:32:45.721418 fsp= 1, odt_onoff= 1, Byte mode= 0
3412 11:32:45.721490 ==
3413 11:32:45.725157 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3414 11:32:45.725230
3415 11:32:45.728300 Begin, DQ Scan Range 699~763
3416 11:32:45.728364
3417 11:32:45.728420
3418 11:32:45.731429 TX Vref Scan disable
3419 11:32:45.735084 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3420 11:32:45.738223 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3421 11:32:45.741566 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3422 11:32:45.744992 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3423 11:32:45.748583 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3424 11:32:45.751399 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3425 11:32:45.755093 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3426 11:32:45.758188 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3427 11:32:45.761464 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3428 11:32:45.764919 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
3429 11:32:45.768079 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
3430 11:32:45.771721 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
3431 11:32:45.778273 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3432 11:32:45.782223 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3433 11:32:45.785260 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3434 11:32:45.788583 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3435 11:32:45.791648 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3436 11:32:45.794824 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3437 11:32:45.802169 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3438 11:32:45.805746 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3439 11:32:45.809094 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3440 11:32:45.812145 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3441 11:32:45.815599 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3442 11:32:45.818796 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3443 11:32:45.822179 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3444 11:32:45.825695 743 |2 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3445 11:32:45.829200 Byte0, DQ PI dly=729, DQM PI dly= 729
3446 11:32:45.832629 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 25)
3447 11:32:45.832710
3448 11:32:45.839087 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 25)
3449 11:32:45.839161
3450 11:32:45.842593 Byte1, DQ PI dly=721, DQM PI dly= 721
3451 11:32:45.845646 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 17)
3452 11:32:45.845720
3453 11:32:45.849074 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 17)
3454 11:32:45.849144
3455 11:32:45.855866 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3456 11:32:45.862493 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3457 11:32:45.868916 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3458 11:32:45.872362 Write Rank1 MR3 =0x30
3459 11:32:45.875654 DramC Write-DBI off
3460 11:32:45.875727
3461 11:32:45.875783 [DATLAT]
3462 11:32:45.879020 Freq=1600, CH1 RK1, use_rxtx_scan=0
3463 11:32:45.879091
3464 11:32:45.882224 DATLAT Default: 0x10
3465 11:32:45.882291 7, 0xFFFF, sum=0
3466 11:32:45.882348 8, 0xFFFF, sum=0
3467 11:32:45.885691 9, 0xFFFF, sum=0
3468 11:32:45.885760 10, 0xFFFF, sum=0
3469 11:32:45.889040 11, 0xFFFF, sum=0
3470 11:32:45.889135 12, 0xFFFF, sum=0
3471 11:32:45.892396 13, 0xFFFF, sum=0
3472 11:32:45.892461 14, 0x0, sum=1
3473 11:32:45.895538 15, 0x0, sum=2
3474 11:32:45.895609 16, 0x0, sum=3
3475 11:32:45.898886 17, 0x0, sum=4
3476 11:32:45.902276 pattern=2 first_step=14 total pass=5 best_step=16
3477 11:32:45.902375 ==
3478 11:32:45.905544 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3479 11:32:45.908806 fsp= 1, odt_onoff= 1, Byte mode= 0
3480 11:32:45.908870 ==
3481 11:32:45.915559 Start DQ dly to find pass range UseTestEngine =1
3482 11:32:45.919247 x-axis: bit #, y-axis: DQ dly (-127~63)
3483 11:32:45.919344 RX Vref Scan = 0
3484 11:32:45.922244 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3485 11:32:45.925919 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3486 11:32:45.929259 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3487 11:32:45.932700 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3488 11:32:45.935798 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3489 11:32:45.935891 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3490 11:32:45.939049 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3491 11:32:45.942420 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3492 11:32:45.945945 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3493 11:32:45.949209 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3494 11:32:45.952406 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3495 11:32:45.955948 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3496 11:32:45.959167 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3497 11:32:45.962667 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3498 11:32:45.962769 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3499 11:32:45.965792 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3500 11:32:45.969027 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3501 11:32:45.972327 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3502 11:32:45.975955 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3503 11:32:45.979456 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3504 11:32:45.982309 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3505 11:32:45.982403 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3506 11:32:45.985887 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3507 11:32:45.989150 -3, [0] xxxoxxxx xxxxxxxx [MSB]
3508 11:32:45.992621 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3509 11:32:45.996096 -1, [0] xxooxxxx xxxxxxxo [MSB]
3510 11:32:45.999305 0, [0] xxooxxxx xxxxxxxo [MSB]
3511 11:32:45.999376 1, [0] xxooxxxx oooxxxxo [MSB]
3512 11:32:46.002664 2, [0] xxooxxxx oooxxxxo [MSB]
3513 11:32:46.006026 3, [0] xxooxxxx ooooxxoo [MSB]
3514 11:32:46.009503 4, [0] xxoooxxo ooooxxoo [MSB]
3515 11:32:46.012826 5, [0] xxoooxxo ooooxooo [MSB]
3516 11:32:46.015736 6, [0] xxoooxxo oooooooo [MSB]
3517 11:32:46.015806 7, [0] xoooooxo oooooooo [MSB]
3518 11:32:46.021507 33, [0] oooooooo ooooooox [MSB]
3519 11:32:46.024441 34, [0] oooxoooo ooooooox [MSB]
3520 11:32:46.027612 35, [0] oooxoooo ooooooox [MSB]
3521 11:32:46.031314 36, [0] ooxxoooo ooxoooox [MSB]
3522 11:32:46.034477 37, [0] ooxxxooo xxxoooxx [MSB]
3523 11:32:46.037702 38, [0] ooxxxoox xxxxooxx [MSB]
3524 11:32:46.037774 39, [0] ooxxxoox xxxxoxxx [MSB]
3525 11:32:46.041060 40, [0] ooxxxoox xxxxxxxx [MSB]
3526 11:32:46.044607 41, [0] ooxxxxox xxxxxxxx [MSB]
3527 11:32:46.047626 42, [0] xxxxxxxx xxxxxxxx [MSB]
3528 11:32:46.051061 iDelay=42, Bit 0, Center 24 (8 ~ 41) 34
3529 11:32:46.054684 iDelay=42, Bit 1, Center 24 (7 ~ 41) 35
3530 11:32:46.057733 iDelay=42, Bit 2, Center 17 (-1 ~ 35) 37
3531 11:32:46.061108 iDelay=42, Bit 3, Center 15 (-3 ~ 33) 37
3532 11:32:46.064573 iDelay=42, Bit 4, Center 20 (4 ~ 36) 33
3533 11:32:46.067627 iDelay=42, Bit 5, Center 23 (7 ~ 40) 34
3534 11:32:46.071431 iDelay=42, Bit 6, Center 24 (8 ~ 41) 34
3535 11:32:46.078000 iDelay=42, Bit 7, Center 20 (4 ~ 37) 34
3536 11:32:46.080962 iDelay=42, Bit 8, Center 18 (1 ~ 36) 36
3537 11:32:46.084452 iDelay=42, Bit 9, Center 18 (1 ~ 36) 36
3538 11:32:46.088051 iDelay=42, Bit 10, Center 18 (1 ~ 35) 35
3539 11:32:46.091292 iDelay=42, Bit 11, Center 20 (3 ~ 37) 35
3540 11:32:46.094676 iDelay=42, Bit 12, Center 22 (6 ~ 39) 34
3541 11:32:46.097966 iDelay=42, Bit 13, Center 21 (5 ~ 38) 34
3542 11:32:46.100956 iDelay=42, Bit 14, Center 19 (3 ~ 36) 34
3543 11:32:46.104393 iDelay=42, Bit 15, Center 15 (-1 ~ 32) 34
3544 11:32:46.104458 ==
3545 11:32:46.111097 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3546 11:32:46.114409 fsp= 1, odt_onoff= 1, Byte mode= 0
3547 11:32:46.114478 ==
3548 11:32:46.114550 DQS Delay:
3549 11:32:46.117879 DQS0 = 0, DQS1 = 0
3550 11:32:46.117960 DQM Delay:
3551 11:32:46.118022 DQM0 = 20, DQM1 = 18
3552 11:32:46.121100 DQ Delay:
3553 11:32:46.124730 DQ0 =24, DQ1 =24, DQ2 =17, DQ3 =15
3554 11:32:46.127990 DQ4 =20, DQ5 =23, DQ6 =24, DQ7 =20
3555 11:32:46.131197 DQ8 =18, DQ9 =18, DQ10 =18, DQ11 =20
3556 11:32:46.134431 DQ12 =22, DQ13 =21, DQ14 =19, DQ15 =15
3557 11:32:46.134507
3558 11:32:46.134567
3559 11:32:46.134620
3560 11:32:46.138248 [DramC_TX_OE_Calibration] TA2
3561 11:32:46.141125 Original DQ_B0 (3 6) =30, OEN = 27
3562 11:32:46.141193 Original DQ_B1 (3 6) =30, OEN = 27
3563 11:32:46.144668 23, 0x0, End_B0=23 End_B1=23
3564 11:32:46.147669 24, 0x0, End_B0=24 End_B1=24
3565 11:32:46.151339 25, 0x0, End_B0=25 End_B1=25
3566 11:32:46.154747 26, 0x0, End_B0=26 End_B1=26
3567 11:32:46.154825 27, 0x0, End_B0=27 End_B1=27
3568 11:32:46.158202 28, 0x0, End_B0=28 End_B1=28
3569 11:32:46.161395 29, 0x0, End_B0=29 End_B1=29
3570 11:32:46.164766 30, 0x0, End_B0=30 End_B1=30
3571 11:32:46.164845 31, 0xFFFF, End_B0=30 End_B1=30
3572 11:32:46.171548 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3573 11:32:46.178137 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3574 11:32:46.178213
3575 11:32:46.178271
3576 11:32:46.178324 Write Rank1 MR23 =0x3f
3577 11:32:46.181322 [DQSOSC]
3578 11:32:46.188245 [DQSOSCAuto] RK1, (LSB)MR18= 0xa8, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps
3579 11:32:46.194653 CH1_RK1: MR19=0x3, MR18=0xA8, DQSOSC=336, MR23=63, INC=21, DEC=32
3580 11:32:46.194729 Write Rank1 MR23 =0x3f
3581 11:32:46.198067 [DQSOSC]
3582 11:32:46.204652 [DQSOSCAuto] RK1, (LSB)MR18= 0xa3, (MSB)MR19= 0x3, tDQSOscB0 = 338 ps tDQSOscB1 = 0 ps
3583 11:32:46.208162 CH1 RK1: MR19=3, MR18=A3
3584 11:32:46.211429 [RxdqsGatingPostProcess] freq 1600
3585 11:32:46.214666 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3586 11:32:46.214742 Rank: 0
3587 11:32:46.218008 best DQS0 dly(2T, 0.5T) = (2, 5)
3588 11:32:46.221754 best DQS1 dly(2T, 0.5T) = (2, 5)
3589 11:32:46.224710 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3590 11:32:46.228193 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3591 11:32:46.228286 Rank: 1
3592 11:32:46.231581 best DQS0 dly(2T, 0.5T) = (2, 5)
3593 11:32:46.234921 best DQS1 dly(2T, 0.5T) = (2, 5)
3594 11:32:46.237991 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3595 11:32:46.241403 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3596 11:32:46.244946 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3597 11:32:46.248688 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3598 11:32:46.255078 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3599 11:32:46.255173
3600 11:32:46.255257
3601 11:32:46.258366 [Calibration Summary] Freqency 1600
3602 11:32:46.258472 CH 0, Rank 0
3603 11:32:46.258557 All Pass.
3604 11:32:46.261758
3605 11:32:46.261860 CH 0, Rank 1
3606 11:32:46.261934 All Pass.
3607 11:32:46.261988
3608 11:32:46.265196 CH 1, Rank 0
3609 11:32:46.265380 All Pass.
3610 11:32:46.265467
3611 11:32:46.265523 CH 1, Rank 1
3612 11:32:46.268649 All Pass.
3613 11:32:46.268742
3614 11:32:46.274889 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3615 11:32:46.281668 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3616 11:32:46.288381 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3617 11:32:46.288470 Write Rank0 MR3 =0xb0
3618 11:32:46.295187 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3619 11:32:46.301968 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3620 11:32:46.308655 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3621 11:32:46.311827 Write Rank1 MR3 =0xb0
3622 11:32:46.318756 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3623 11:32:46.325190 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3624 11:32:46.332018 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3625 11:32:46.335379 Write Rank0 MR3 =0xb0
3626 11:32:46.342106 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3627 11:32:46.348621 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3628 11:32:46.355893 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3629 11:32:46.355970 Write Rank1 MR3 =0xb0
3630 11:32:46.358808 DramC Write-DBI on
3631 11:32:46.362406 [GetDramInforAfterCalByMRR] Vendor 1.
3632 11:32:46.365505 [GetDramInforAfterCalByMRR] Revision 7.
3633 11:32:46.365580 MR8 12
3634 11:32:46.372646 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3635 11:32:46.372723 MR8 12
3636 11:32:46.375508 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3637 11:32:46.378926 MR8 12
3638 11:32:46.382269 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3639 11:32:46.382374 MR8 12
3640 11:32:46.388964 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3641 11:32:46.395812 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3642 11:32:46.398765 Write Rank0 MR13 =0xd0
3643 11:32:46.402743 Write Rank1 MR13 =0xd0
3644 11:32:46.402811 Write Rank0 MR13 =0xd0
3645 11:32:46.405505 Write Rank1 MR13 =0xd0
3646 11:32:46.409112 Save calibration result to emmc
3647 11:32:46.409186
3648 11:32:46.409284
3649 11:32:46.412351 [DramcModeReg_Check] Freq_1600, FSP_1
3650 11:32:46.412427 FSP_1, CH_0, RK0
3651 11:32:46.415787 Write Rank0 MR13 =0xd8
3652 11:32:46.418948 MR12 = 0x58 (global = 0x58) match
3653 11:32:46.422543 MR14 = 0x18 (global = 0x18) match
3654 11:32:46.422618 FSP_1, CH_0, RK1
3655 11:32:46.425836 Write Rank1 MR13 =0xd8
3656 11:32:46.429056 MR12 = 0x56 (global = 0x56) match
3657 11:32:46.432390 MR14 = 0x18 (global = 0x18) match
3658 11:32:46.432465 FSP_1, CH_1, RK0
3659 11:32:46.435703 Write Rank0 MR13 =0xd8
3660 11:32:46.439269 MR12 = 0x56 (global = 0x56) match
3661 11:32:46.442434 MR14 = 0x18 (global = 0x18) match
3662 11:32:46.442509 FSP_1, CH_1, RK1
3663 11:32:46.446015 Write Rank1 MR13 =0xd8
3664 11:32:46.449380 MR12 = 0x56 (global = 0x56) match
3665 11:32:46.452250 MR14 = 0x14 (global = 0x14) match
3666 11:32:46.452324
3667 11:32:46.455756 [MEM_TEST] 02: After DFS, before run time config
3668 11:32:46.466770 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3669 11:32:46.466846
3670 11:32:46.466903 [TA2_TEST]
3671 11:32:46.466957 === TA2 HW
3672 11:32:46.469934 TA2 PAT: XTALK
3673 11:32:46.473462 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3674 11:32:46.479954 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3675 11:32:46.483575 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3676 11:32:46.486818 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3677 11:32:46.490254
3678 11:32:46.490394
3679 11:32:46.490451 Settings after calibration
3680 11:32:46.490506
3681 11:32:46.493596 [DramcRunTimeConfig]
3682 11:32:46.496686 TransferPLLToSPMControl - MODE SW PHYPLL
3683 11:32:46.496760 TX_TRACKING: ON
3684 11:32:46.500356 RX_TRACKING: ON
3685 11:32:46.500430 HW_GATING: ON
3686 11:32:46.503357 HW_GATING DBG: OFF
3687 11:32:46.503431 ddr_geometry:1
3688 11:32:46.506654 ddr_geometry:1
3689 11:32:46.506729 ddr_geometry:1
3690 11:32:46.506786 ddr_geometry:1
3691 11:32:46.510028 ddr_geometry:1
3692 11:32:46.510123 ddr_geometry:1
3693 11:32:46.513413 ddr_geometry:1
3694 11:32:46.513484 ddr_geometry:1
3695 11:32:46.517119 High Freq DUMMY_READ_FOR_TRACKING: ON
3696 11:32:46.519931 ZQCS_ENABLE_LP4: OFF
3697 11:32:46.523514 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3698 11:32:46.526855 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3699 11:32:46.526927 SPM_CONTROL_AFTERK: ON
3700 11:32:46.530394 IMPEDANCE_TRACKING: ON
3701 11:32:46.530487 TEMP_SENSOR: ON
3702 11:32:46.533437 PER_BANK_REFRESH: ON
3703 11:32:46.533506 HW_SAVE_FOR_SR: ON
3704 11:32:46.537261 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3705 11:32:46.540221 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3706 11:32:46.543833 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3707 11:32:46.546749 Read ODT Tracking: ON
3708 11:32:46.550174 =========================
3709 11:32:46.550240
3710 11:32:46.550298 [TA2_TEST]
3711 11:32:46.550378 === TA2 HW
3712 11:32:46.556903 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3713 11:32:46.560352 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3714 11:32:46.566993 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3715 11:32:46.570524 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3716 11:32:46.570599
3717 11:32:46.573680 [MEM_TEST] 03: After run time config
3718 11:32:46.584681 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3719 11:32:46.587700 [complex_mem_test] start addr:0x40024000, len:131072
3720 11:32:46.791926 1st complex R/W mem test pass
3721 11:32:46.798852 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3722 11:32:46.802213 sync preloader write leveling
3723 11:32:46.805458 sync preloader cbt_mr12
3724 11:32:46.808857 sync preloader cbt_clk_dly
3725 11:32:46.808924 sync preloader cbt_cmd_dly
3726 11:32:46.812140 sync preloader cbt_cs
3727 11:32:46.815824 sync preloader cbt_ca_perbit_delay
3728 11:32:46.815903 sync preloader clk_delay
3729 11:32:46.819113 sync preloader dqs_delay
3730 11:32:46.822304 sync preloader u1Gating2T_Save
3731 11:32:46.825597 sync preloader u1Gating05T_Save
3732 11:32:46.828688 sync preloader u1Gatingfine_tune_Save
3733 11:32:46.832333 sync preloader u1Gatingucpass_count_Save
3734 11:32:46.835667 sync preloader u1TxWindowPerbitVref_Save
3735 11:32:46.839233 sync preloader u1TxCenter_min_Save
3736 11:32:46.842511 sync preloader u1TxCenter_max_Save
3737 11:32:46.845455 sync preloader u1Txwin_center_Save
3738 11:32:46.848764 sync preloader u1Txfirst_pass_Save
3739 11:32:46.852299 sync preloader u1Txlast_pass_Save
3740 11:32:46.852399 sync preloader u1RxDatlat_Save
3741 11:32:46.855539 sync preloader u1RxWinPerbitVref_Save
3742 11:32:46.862336 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3743 11:32:46.865904 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3744 11:32:46.868920 sync preloader delay_cell_unit
3745 11:32:46.875676 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3746 11:32:46.878958 sync preloader write leveling
3747 11:32:46.879029 sync preloader cbt_mr12
3748 11:32:46.882275 sync preloader cbt_clk_dly
3749 11:32:46.885511 sync preloader cbt_cmd_dly
3750 11:32:46.885603 sync preloader cbt_cs
3751 11:32:46.888918 sync preloader cbt_ca_perbit_delay
3752 11:32:46.892654 sync preloader clk_delay
3753 11:32:46.892719 sync preloader dqs_delay
3754 11:32:46.895846 sync preloader u1Gating2T_Save
3755 11:32:46.899301 sync preloader u1Gating05T_Save
3756 11:32:46.902432 sync preloader u1Gatingfine_tune_Save
3757 11:32:46.905604 sync preloader u1Gatingucpass_count_Save
3758 11:32:46.909365 sync preloader u1TxWindowPerbitVref_Save
3759 11:32:46.912458 sync preloader u1TxCenter_min_Save
3760 11:32:46.915877 sync preloader u1TxCenter_max_Save
3761 11:32:46.919622 sync preloader u1Txwin_center_Save
3762 11:32:46.922152 sync preloader u1Txfirst_pass_Save
3763 11:32:46.925534 sync preloader u1Txlast_pass_Save
3764 11:32:46.929409 sync preloader u1RxDatlat_Save
3765 11:32:46.932397 sync preloader u1RxWinPerbitVref_Save
3766 11:32:46.935845 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3767 11:32:46.939421 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3768 11:32:46.942358 sync preloader delay_cell_unit
3769 11:32:46.949359 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3770 11:32:46.952753 sync preloader write leveling
3771 11:32:46.952852 sync preloader cbt_mr12
3772 11:32:46.956119 sync preloader cbt_clk_dly
3773 11:32:46.959518 sync preloader cbt_cmd_dly
3774 11:32:46.959615 sync preloader cbt_cs
3775 11:32:46.962774 sync preloader cbt_ca_perbit_delay
3776 11:32:46.966103 sync preloader clk_delay
3777 11:32:46.969792 sync preloader dqs_delay
3778 11:32:46.972863 sync preloader u1Gating2T_Save
3779 11:32:46.972943 sync preloader u1Gating05T_Save
3780 11:32:46.975975 sync preloader u1Gatingfine_tune_Save
3781 11:32:46.982676 sync preloader u1Gatingucpass_count_Save
3782 11:32:46.985873 sync preloader u1TxWindowPerbitVref_Save
3783 11:32:46.989462 sync preloader u1TxCenter_min_Save
3784 11:32:46.989541 sync preloader u1TxCenter_max_Save
3785 11:32:46.992909 sync preloader u1Txwin_center_Save
3786 11:32:46.996144 sync preloader u1Txfirst_pass_Save
3787 11:32:46.999387 sync preloader u1Txlast_pass_Save
3788 11:32:47.003283 sync preloader u1RxDatlat_Save
3789 11:32:47.006139 sync preloader u1RxWinPerbitVref_Save
3790 11:32:47.009571 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3791 11:32:47.016289 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3792 11:32:47.016369 sync preloader delay_cell_unit
3793 11:32:47.022815 just_for_test_dump_coreboot_params dump all params
3794 11:32:47.022894 dump source = 0x0
3795 11:32:47.026138 dump params frequency:1600
3796 11:32:47.029482 dump params rank number:2
3797 11:32:47.029577
3798 11:32:47.029668 dump params write leveling
3799 11:32:47.032801 write leveling[0][0][0] = 0x21
3800 11:32:47.036411 write leveling[0][0][1] = 0x1c
3801 11:32:47.039266 write leveling[0][1][0] = 0x23
3802 11:32:47.042549 write leveling[0][1][1] = 0x1e
3803 11:32:47.046056 write leveling[1][0][0] = 0x25
3804 11:32:47.046135 write leveling[1][0][1] = 0x20
3805 11:32:47.049257 write leveling[1][1][0] = 0x24
3806 11:32:47.052900 write leveling[1][1][1] = 0x20
3807 11:32:47.056165 dump params cbt_cs
3808 11:32:47.056256 cbt_cs[0][0] = 0x9
3809 11:32:47.059285 cbt_cs[0][1] = 0x9
3810 11:32:47.059360 cbt_cs[1][0] = 0xb
3811 11:32:47.063048 cbt_cs[1][1] = 0xb
3812 11:32:47.063124 dump params cbt_mr12
3813 11:32:47.066268 cbt_mr12[0][0] = 0x18
3814 11:32:47.066343 cbt_mr12[0][1] = 0x16
3815 11:32:47.069373 cbt_mr12[1][0] = 0x16
3816 11:32:47.072739 cbt_mr12[1][1] = 0x16
3817 11:32:47.072815 dump params tx window
3818 11:32:47.076105 tx_center_min[0][0][0] = 979
3819 11:32:47.079833 tx_center_max[0][0][0] = 987
3820 11:32:47.082744 tx_center_min[0][0][1] = 975
3821 11:32:47.082820 tx_center_max[0][0][1] = 979
3822 11:32:47.086542 tx_center_min[0][1][0] = 982
3823 11:32:47.089484 tx_center_max[0][1][0] = 989
3824 11:32:47.093143 tx_center_min[0][1][1] = 978
3825 11:32:47.093218 tx_center_max[0][1][1] = 984
3826 11:32:47.096051 tx_center_min[1][0][0] = 983
3827 11:32:47.099425 tx_center_max[1][0][0] = 988
3828 11:32:47.103039 tx_center_min[1][0][1] = 978
3829 11:32:47.106572 tx_center_max[1][0][1] = 981
3830 11:32:47.106646 tx_center_min[1][1][0] = 983
3831 11:32:47.109617 tx_center_max[1][1][0] = 988
3832 11:32:47.113384 tx_center_min[1][1][1] = 978
3833 11:32:47.116252 tx_center_max[1][1][1] = 981
3834 11:32:47.116327 dump params tx window
3835 11:32:47.119663 tx_win_center[0][0][0] = 987
3836 11:32:47.123129 tx_first_pass[0][0][0] = 975
3837 11:32:47.126525 tx_last_pass[0][0][0] = 999
3838 11:32:47.126600 tx_win_center[0][0][1] = 986
3839 11:32:47.129659 tx_first_pass[0][0][1] = 975
3840 11:32:47.133118 tx_last_pass[0][0][1] = 998
3841 11:32:47.136744 tx_win_center[0][0][2] = 986
3842 11:32:47.139660 tx_first_pass[0][0][2] = 974
3843 11:32:47.139735 tx_last_pass[0][0][2] = 998
3844 11:32:47.143150 tx_win_center[0][0][3] = 979
3845 11:32:47.146594 tx_first_pass[0][0][3] = 968
3846 11:32:47.150086 tx_last_pass[0][0][3] = 991
3847 11:32:47.150161 tx_win_center[0][0][4] = 986
3848 11:32:47.152931 tx_first_pass[0][0][4] = 974
3849 11:32:47.157109 tx_last_pass[0][0][4] = 998
3850 11:32:47.159747 tx_win_center[0][0][5] = 981
3851 11:32:47.163116 tx_first_pass[0][0][5] = 969
3852 11:32:47.163192 tx_last_pass[0][0][5] = 993
3853 11:32:47.166576 tx_win_center[0][0][6] = 982
3854 11:32:47.169557 tx_first_pass[0][0][6] = 970
3855 11:32:47.173467 tx_last_pass[0][0][6] = 994
3856 11:32:47.173542 tx_win_center[0][0][7] = 983
3857 11:32:47.176257 tx_first_pass[0][0][7] = 971
3858 11:32:47.179725 tx_last_pass[0][0][7] = 995
3859 11:32:47.183045 tx_win_center[0][0][8] = 975
3860 11:32:47.183120 tx_first_pass[0][0][8] = 963
3861 11:32:47.186697 tx_last_pass[0][0][8] = 988
3862 11:32:47.190074 tx_win_center[0][0][9] = 976
3863 11:32:47.192990 tx_first_pass[0][0][9] = 965
3864 11:32:47.196324 tx_last_pass[0][0][9] = 988
3865 11:32:47.196400 tx_win_center[0][0][10] = 979
3866 11:32:47.199914 tx_first_pass[0][0][10] = 968
3867 11:32:47.203321 tx_last_pass[0][0][10] = 991
3868 11:32:47.206240 tx_win_center[0][0][11] = 976
3869 11:32:47.210266 tx_first_pass[0][0][11] = 964
3870 11:32:47.210342 tx_last_pass[0][0][11] = 989
3871 11:32:47.213020 tx_win_center[0][0][12] = 977
3872 11:32:47.216588 tx_first_pass[0][0][12] = 965
3873 11:32:47.220073 tx_last_pass[0][0][12] = 989
3874 11:32:47.223318 tx_win_center[0][0][13] = 975
3875 11:32:47.223411 tx_first_pass[0][0][13] = 963
3876 11:32:47.226627 tx_last_pass[0][0][13] = 988
3877 11:32:47.229832 tx_win_center[0][0][14] = 976
3878 11:32:47.233531 tx_first_pass[0][0][14] = 965
3879 11:32:47.236572 tx_last_pass[0][0][14] = 988
3880 11:32:47.236647 tx_win_center[0][0][15] = 978
3881 11:32:47.239806 tx_first_pass[0][0][15] = 966
3882 11:32:47.243296 tx_last_pass[0][0][15] = 990
3883 11:32:47.246587 tx_win_center[0][1][0] = 989
3884 11:32:47.249917 tx_first_pass[0][1][0] = 977
3885 11:32:47.249993 tx_last_pass[0][1][0] = 1002
3886 11:32:47.253246 tx_win_center[0][1][1] = 988
3887 11:32:47.256309 tx_first_pass[0][1][1] = 976
3888 11:32:47.259699 tx_last_pass[0][1][1] = 1000
3889 11:32:47.259804 tx_win_center[0][1][2] = 988
3890 11:32:47.263318 tx_first_pass[0][1][2] = 976
3891 11:32:47.266499 tx_last_pass[0][1][2] = 1000
3892 11:32:47.269612 tx_win_center[0][1][3] = 982
3893 11:32:47.273088 tx_first_pass[0][1][3] = 970
3894 11:32:47.273164 tx_last_pass[0][1][3] = 995
3895 11:32:47.276622 tx_win_center[0][1][4] = 988
3896 11:32:47.280040 tx_first_pass[0][1][4] = 976
3897 11:32:47.283856 tx_last_pass[0][1][4] = 1000
3898 11:32:47.283931 tx_win_center[0][1][5] = 983
3899 11:32:47.286514 tx_first_pass[0][1][5] = 971
3900 11:32:47.289915 tx_last_pass[0][1][5] = 995
3901 11:32:47.293298 tx_win_center[0][1][6] = 983
3902 11:32:47.296745 tx_first_pass[0][1][6] = 971
3903 11:32:47.296821 tx_last_pass[0][1][6] = 996
3904 11:32:47.300114 tx_win_center[0][1][7] = 986
3905 11:32:47.303087 tx_first_pass[0][1][7] = 975
3906 11:32:47.306567 tx_last_pass[0][1][7] = 998
3907 11:32:47.306642 tx_win_center[0][1][8] = 978
3908 11:32:47.309846 tx_first_pass[0][1][8] = 966
3909 11:32:47.313348 tx_last_pass[0][1][8] = 990
3910 11:32:47.316880 tx_win_center[0][1][9] = 978
3911 11:32:47.320061 tx_first_pass[0][1][9] = 967
3912 11:32:47.320137 tx_last_pass[0][1][9] = 990
3913 11:32:47.323529 tx_win_center[0][1][10] = 984
3914 11:32:47.326755 tx_first_pass[0][1][10] = 973
3915 11:32:47.329857 tx_last_pass[0][1][10] = 996
3916 11:32:47.329934 tx_win_center[0][1][11] = 979
3917 11:32:47.333558 tx_first_pass[0][1][11] = 967
3918 11:32:47.336809 tx_last_pass[0][1][11] = 991
3919 11:32:47.339949 tx_win_center[0][1][12] = 979
3920 11:32:47.343569 tx_first_pass[0][1][12] = 968
3921 11:32:47.343645 tx_last_pass[0][1][12] = 991
3922 11:32:47.346791 tx_win_center[0][1][13] = 978
3923 11:32:47.350526 tx_first_pass[0][1][13] = 967
3924 11:32:47.353575 tx_last_pass[0][1][13] = 990
3925 11:32:47.356693 tx_win_center[0][1][14] = 979
3926 11:32:47.356770 tx_first_pass[0][1][14] = 967
3927 11:32:47.360168 tx_last_pass[0][1][14] = 991
3928 11:32:47.363266 tx_win_center[0][1][15] = 980
3929 11:32:47.366589 tx_first_pass[0][1][15] = 969
3930 11:32:47.370260 tx_last_pass[0][1][15] = 992
3931 11:32:47.370336 tx_win_center[1][0][0] = 988
3932 11:32:47.373638 tx_first_pass[1][0][0] = 976
3933 11:32:47.376691 tx_last_pass[1][0][0] = 1001
3934 11:32:47.380175 tx_win_center[1][0][1] = 987
3935 11:32:47.383292 tx_first_pass[1][0][1] = 976
3936 11:32:47.383359 tx_last_pass[1][0][1] = 999
3937 11:32:47.386772 tx_win_center[1][0][2] = 985
3938 11:32:47.389954 tx_first_pass[1][0][2] = 973
3939 11:32:47.393817 tx_last_pass[1][0][2] = 997
3940 11:32:47.393893 tx_win_center[1][0][3] = 983
3941 11:32:47.396981 tx_first_pass[1][0][3] = 971
3942 11:32:47.400603 tx_last_pass[1][0][3] = 995
3943 11:32:47.403539 tx_win_center[1][0][4] = 986
3944 11:32:47.406766 tx_first_pass[1][0][4] = 975
3945 11:32:47.406892 tx_last_pass[1][0][4] = 998
3946 11:32:47.410345 tx_win_center[1][0][5] = 987
3947 11:32:47.413662 tx_first_pass[1][0][5] = 976
3948 11:32:47.417035 tx_last_pass[1][0][5] = 999
3949 11:32:47.417111 tx_win_center[1][0][6] = 988
3950 11:32:47.420755 tx_first_pass[1][0][6] = 976
3951 11:32:47.424023 tx_last_pass[1][0][6] = 1000
3952 11:32:47.426824 tx_win_center[1][0][7] = 986
3953 11:32:47.430567 tx_first_pass[1][0][7] = 975
3954 11:32:47.430642 tx_last_pass[1][0][7] = 998
3955 11:32:47.433573 tx_win_center[1][0][8] = 979
3956 11:32:47.437024 tx_first_pass[1][0][8] = 967
3957 11:32:47.440170 tx_last_pass[1][0][8] = 991
3958 11:32:47.440247 tx_win_center[1][0][9] = 979
3959 11:32:47.443798 tx_first_pass[1][0][9] = 968
3960 11:32:47.447048 tx_last_pass[1][0][9] = 991
3961 11:32:47.450303 tx_win_center[1][0][10] = 980
3962 11:32:47.453555 tx_first_pass[1][0][10] = 968
3963 11:32:47.453633 tx_last_pass[1][0][10] = 992
3964 11:32:47.456749 tx_win_center[1][0][11] = 980
3965 11:32:47.460367 tx_first_pass[1][0][11] = 969
3966 11:32:47.463468 tx_last_pass[1][0][11] = 992
3967 11:32:47.466802 tx_win_center[1][0][12] = 981
3968 11:32:47.466881 tx_first_pass[1][0][12] = 969
3969 11:32:47.470162 tx_last_pass[1][0][12] = 993
3970 11:32:47.473832 tx_win_center[1][0][13] = 981
3971 11:32:47.477431 tx_first_pass[1][0][13] = 970
3972 11:32:47.480457 tx_last_pass[1][0][13] = 992
3973 11:32:47.480535 tx_win_center[1][0][14] = 980
3974 11:32:47.483921 tx_first_pass[1][0][14] = 969
3975 11:32:47.487119 tx_last_pass[1][0][14] = 992
3976 11:32:47.490978 tx_win_center[1][0][15] = 978
3977 11:32:47.493763 tx_first_pass[1][0][15] = 965
3978 11:32:47.493842 tx_last_pass[1][0][15] = 991
3979 11:32:47.496963 tx_win_center[1][1][0] = 988
3980 11:32:47.500573 tx_first_pass[1][1][0] = 976
3981 11:32:47.504128 tx_last_pass[1][1][0] = 1001
3982 11:32:47.504206 tx_win_center[1][1][1] = 987
3983 11:32:47.507274 tx_first_pass[1][1][1] = 975
3984 11:32:47.510522 tx_last_pass[1][1][1] = 999
3985 11:32:47.513938 tx_win_center[1][1][2] = 984
3986 11:32:47.517345 tx_first_pass[1][1][2] = 971
3987 11:32:47.517423 tx_last_pass[1][1][2] = 997
3988 11:32:47.520213 tx_win_center[1][1][3] = 983
3989 11:32:47.523459 tx_first_pass[1][1][3] = 970
3990 11:32:47.527041 tx_last_pass[1][1][3] = 996
3991 11:32:47.527119 tx_win_center[1][1][4] = 985
3992 11:32:47.530718 tx_first_pass[1][1][4] = 973
3993 11:32:47.533818 tx_last_pass[1][1][4] = 997
3994 11:32:47.536992 tx_win_center[1][1][5] = 988
3995 11:32:47.540279 tx_first_pass[1][1][5] = 976
3996 11:32:47.540357 tx_last_pass[1][1][5] = 1000
3997 11:32:47.543861 tx_win_center[1][1][6] = 988
3998 11:32:47.546866 tx_first_pass[1][1][6] = 976
3999 11:32:47.550047 tx_last_pass[1][1][6] = 1000
4000 11:32:47.553222 tx_win_center[1][1][7] = 986
4001 11:32:47.553340 tx_first_pass[1][1][7] = 974
4002 11:32:47.556662 tx_last_pass[1][1][7] = 998
4003 11:32:47.560246 tx_win_center[1][1][8] = 979
4004 11:32:47.563414 tx_first_pass[1][1][8] = 968
4005 11:32:47.563492 tx_last_pass[1][1][8] = 991
4006 11:32:47.566840 tx_win_center[1][1][9] = 979
4007 11:32:47.570324 tx_first_pass[1][1][9] = 968
4008 11:32:47.573419 tx_last_pass[1][1][9] = 991
4009 11:32:47.576872 tx_win_center[1][1][10] = 979
4010 11:32:47.576950 tx_first_pass[1][1][10] = 968
4011 11:32:47.580114 tx_last_pass[1][1][10] = 991
4012 11:32:47.583660 tx_win_center[1][1][11] = 980
4013 11:32:47.587410 tx_first_pass[1][1][11] = 969
4014 11:32:47.590205 tx_last_pass[1][1][11] = 992
4015 11:32:47.590284 tx_win_center[1][1][12] = 981
4016 11:32:47.593709 tx_first_pass[1][1][12] = 970
4017 11:32:47.597158 tx_last_pass[1][1][12] = 993
4018 11:32:47.600292 tx_win_center[1][1][13] = 980
4019 11:32:47.603656 tx_first_pass[1][1][13] = 969
4020 11:32:47.603734 tx_last_pass[1][1][13] = 992
4021 11:32:47.606971 tx_win_center[1][1][14] = 980
4022 11:32:47.610187 tx_first_pass[1][1][14] = 969
4023 11:32:47.613668 tx_last_pass[1][1][14] = 992
4024 11:32:47.616801 tx_win_center[1][1][15] = 978
4025 11:32:47.616880 tx_first_pass[1][1][15] = 965
4026 11:32:47.620323 tx_last_pass[1][1][15] = 991
4027 11:32:47.623627 dump params rx window
4028 11:32:47.623704 rx_firspass[0][0][0] = 9
4029 11:32:47.627132 rx_lastpass[0][0][0] = 40
4030 11:32:47.630245 rx_firspass[0][0][1] = 7
4031 11:32:47.633463 rx_lastpass[0][0][1] = 38
4032 11:32:47.633543 rx_firspass[0][0][2] = 9
4033 11:32:47.637099 rx_lastpass[0][0][2] = 38
4034 11:32:47.640166 rx_firspass[0][0][3] = -3
4035 11:32:47.640243 rx_lastpass[0][0][3] = 28
4036 11:32:47.643839 rx_firspass[0][0][4] = 7
4037 11:32:47.647259 rx_lastpass[0][0][4] = 38
4038 11:32:47.647337 rx_firspass[0][0][5] = 0
4039 11:32:47.650366 rx_lastpass[0][0][5] = 30
4040 11:32:47.653377 rx_firspass[0][0][6] = 1
4041 11:32:47.657174 rx_lastpass[0][0][6] = 31
4042 11:32:47.657292 rx_firspass[0][0][7] = 4
4043 11:32:47.660241 rx_lastpass[0][0][7] = 32
4044 11:32:47.663590 rx_firspass[0][0][8] = 0
4045 11:32:47.663668 rx_lastpass[0][0][8] = 34
4046 11:32:47.667162 rx_firspass[0][0][9] = 4
4047 11:32:47.670198 rx_lastpass[0][0][9] = 34
4048 11:32:47.670276 rx_firspass[0][0][10] = 6
4049 11:32:47.673718 rx_lastpass[0][0][10] = 37
4050 11:32:47.677489 rx_firspass[0][0][11] = 1
4051 11:32:47.680251 rx_lastpass[0][0][11] = 34
4052 11:32:47.680328 rx_firspass[0][0][12] = 2
4053 11:32:47.683918 rx_lastpass[0][0][12] = 35
4054 11:32:47.687116 rx_firspass[0][0][13] = 2
4055 11:32:47.687195 rx_lastpass[0][0][13] = 30
4056 11:32:47.690532 rx_firspass[0][0][14] = -1
4057 11:32:47.694043 rx_lastpass[0][0][14] = 34
4058 11:32:47.697139 rx_firspass[0][0][15] = 3
4059 11:32:47.697217 rx_lastpass[0][0][15] = 35
4060 11:32:47.700437 rx_firspass[0][1][0] = 7
4061 11:32:47.703888 rx_lastpass[0][1][0] = 41
4062 11:32:47.703966 rx_firspass[0][1][1] = 5
4063 11:32:47.707308 rx_lastpass[0][1][1] = 40
4064 11:32:47.710592 rx_firspass[0][1][2] = 7
4065 11:32:47.714024 rx_lastpass[0][1][2] = 39
4066 11:32:47.714101 rx_firspass[0][1][3] = -4
4067 11:32:47.717029 rx_lastpass[0][1][3] = 31
4068 11:32:47.720588 rx_firspass[0][1][4] = 7
4069 11:32:47.720666 rx_lastpass[0][1][4] = 40
4070 11:32:47.724046 rx_firspass[0][1][5] = -1
4071 11:32:47.727107 rx_lastpass[0][1][5] = 33
4072 11:32:47.727185 rx_firspass[0][1][6] = 2
4073 11:32:47.730448 rx_lastpass[0][1][6] = 34
4074 11:32:47.734010 rx_firspass[0][1][7] = 3
4075 11:32:47.737121 rx_lastpass[0][1][7] = 34
4076 11:32:47.737199 rx_firspass[0][1][8] = 0
4077 11:32:47.740557 rx_lastpass[0][1][8] = 35
4078 11:32:47.743737 rx_firspass[0][1][9] = 3
4079 11:32:47.743815 rx_lastpass[0][1][9] = 36
4080 11:32:47.747320 rx_firspass[0][1][10] = 6
4081 11:32:47.750427 rx_lastpass[0][1][10] = 39
4082 11:32:47.750500 rx_firspass[0][1][11] = 0
4083 11:32:47.753712 rx_lastpass[0][1][11] = 34
4084 11:32:47.757081 rx_firspass[0][1][12] = 3
4085 11:32:47.760617 rx_lastpass[0][1][12] = 36
4086 11:32:47.760695 rx_firspass[0][1][13] = 2
4087 11:32:47.763966 rx_lastpass[0][1][13] = 33
4088 11:32:47.767385 rx_firspass[0][1][14] = 1
4089 11:32:47.770510 rx_lastpass[0][1][14] = 34
4090 11:32:47.770589 rx_firspass[0][1][15] = 3
4091 11:32:47.773863 rx_lastpass[0][1][15] = 37
4092 11:32:47.777322 rx_firspass[1][0][0] = 8
4093 11:32:47.777401 rx_lastpass[1][0][0] = 39
4094 11:32:47.780480 rx_firspass[1][0][1] = 7
4095 11:32:47.784079 rx_lastpass[1][0][1] = 39
4096 11:32:47.784157 rx_firspass[1][0][2] = 1
4097 11:32:47.787430 rx_lastpass[1][0][2] = 34
4098 11:32:47.790509 rx_firspass[1][0][3] = -2
4099 11:32:47.793737 rx_lastpass[1][0][3] = 32
4100 11:32:47.793815 rx_firspass[1][0][4] = 4
4101 11:32:47.797104 rx_lastpass[1][0][4] = 34
4102 11:32:47.800474 rx_firspass[1][0][5] = 8
4103 11:32:47.800551 rx_lastpass[1][0][5] = 40
4104 11:32:47.803960 rx_firspass[1][0][6] = 9
4105 11:32:47.807271 rx_lastpass[1][0][6] = 40
4106 11:32:47.807349 rx_firspass[1][0][7] = 4
4107 11:32:47.810533 rx_lastpass[1][0][7] = 34
4108 11:32:47.813912 rx_firspass[1][0][8] = 1
4109 11:32:47.817376 rx_lastpass[1][0][8] = 35
4110 11:32:47.817454 rx_firspass[1][0][9] = 0
4111 11:32:47.820565 rx_lastpass[1][0][9] = 35
4112 11:32:47.824290 rx_firspass[1][0][10] = 3
4113 11:32:47.824368 rx_lastpass[1][0][10] = 33
4114 11:32:47.827294 rx_firspass[1][0][11] = 2
4115 11:32:47.830953 rx_lastpass[1][0][11] = 36
4116 11:32:47.833953 rx_firspass[1][0][12] = 5
4117 11:32:47.834031 rx_lastpass[1][0][12] = 37
4118 11:32:47.837261 rx_firspass[1][0][13] = 3
4119 11:32:47.841039 rx_lastpass[1][0][13] = 35
4120 11:32:47.841118 rx_firspass[1][0][14] = 3
4121 11:32:47.844329 rx_lastpass[1][0][14] = 35
4122 11:32:47.847458 rx_firspass[1][0][15] = -1
4123 11:32:47.850900 rx_lastpass[1][0][15] = 30
4124 11:32:47.850978 rx_firspass[1][1][0] = 8
4125 11:32:47.854298 rx_lastpass[1][1][0] = 41
4126 11:32:47.857483 rx_firspass[1][1][1] = 7
4127 11:32:47.857561 rx_lastpass[1][1][1] = 41
4128 11:32:47.860826 rx_firspass[1][1][2] = -1
4129 11:32:47.864085 rx_lastpass[1][1][2] = 35
4130 11:32:47.867301 rx_firspass[1][1][3] = -3
4131 11:32:47.867379 rx_lastpass[1][1][3] = 33
4132 11:32:47.870759 rx_firspass[1][1][4] = 4
4133 11:32:47.874377 rx_lastpass[1][1][4] = 36
4134 11:32:47.874455 rx_firspass[1][1][5] = 7
4135 11:32:47.877499 rx_lastpass[1][1][5] = 40
4136 11:32:47.881173 rx_firspass[1][1][6] = 8
4137 11:32:47.881290 rx_lastpass[1][1][6] = 41
4138 11:32:47.884455 rx_firspass[1][1][7] = 4
4139 11:32:47.887902 rx_lastpass[1][1][7] = 37
4140 11:32:47.887981 rx_firspass[1][1][8] = 1
4141 11:32:47.891183 rx_lastpass[1][1][8] = 36
4142 11:32:47.894628 rx_firspass[1][1][9] = 1
4143 11:32:47.898336 rx_lastpass[1][1][9] = 36
4144 11:32:47.898414 rx_firspass[1][1][10] = 1
4145 11:32:47.901146 rx_lastpass[1][1][10] = 35
4146 11:32:47.904672 rx_firspass[1][1][11] = 3
4147 11:32:47.904749 rx_lastpass[1][1][11] = 37
4148 11:32:47.908031 rx_firspass[1][1][12] = 6
4149 11:32:47.911338 rx_lastpass[1][1][12] = 39
4150 11:32:47.914482 rx_firspass[1][1][13] = 5
4151 11:32:47.914560 rx_lastpass[1][1][13] = 38
4152 11:32:47.918109 rx_firspass[1][1][14] = 3
4153 11:32:47.921380 rx_lastpass[1][1][14] = 36
4154 11:32:47.921458 rx_firspass[1][1][15] = -1
4155 11:32:47.924418 rx_lastpass[1][1][15] = 32
4156 11:32:47.928061 dump params clk_delay
4157 11:32:47.928139 clk_delay[0] = 0
4158 11:32:47.931163 clk_delay[1] = 0
4159 11:32:47.931240 dump params dqs_delay
4160 11:32:47.935108 dqs_delay[0][0] = -1
4161 11:32:47.935186 dqs_delay[0][1] = 2
4162 11:32:47.937945 dqs_delay[1][0] = 0
4163 11:32:47.941159 dqs_delay[1][1] = 0
4164 11:32:47.941262 dump params delay_cell_unit = 753
4165 11:32:47.944763 dump source = 0x0
4166 11:32:47.948156 dump params frequency:1200
4167 11:32:47.948269 dump params rank number:2
4168 11:32:47.948334
4169 11:32:47.951083 dump params write leveling
4170 11:32:47.954305 write leveling[0][0][0] = 0x0
4171 11:32:47.957898 write leveling[0][0][1] = 0x0
4172 11:32:47.961095 write leveling[0][1][0] = 0x0
4173 11:32:47.961170 write leveling[0][1][1] = 0x0
4174 11:32:47.964432 write leveling[1][0][0] = 0x0
4175 11:32:47.967729 write leveling[1][0][1] = 0x0
4176 11:32:47.971367 write leveling[1][1][0] = 0x0
4177 11:32:47.974547 write leveling[1][1][1] = 0x0
4178 11:32:47.974623 dump params cbt_cs
4179 11:32:47.978318 cbt_cs[0][0] = 0x0
4180 11:32:47.978392 cbt_cs[0][1] = 0x0
4181 11:32:47.981384 cbt_cs[1][0] = 0x0
4182 11:32:47.981459 cbt_cs[1][1] = 0x0
4183 11:32:47.984794 dump params cbt_mr12
4184 11:32:47.984869 cbt_mr12[0][0] = 0x0
4185 11:32:47.987886 cbt_mr12[0][1] = 0x0
4186 11:32:47.987961 cbt_mr12[1][0] = 0x0
4187 11:32:47.991247 cbt_mr12[1][1] = 0x0
4188 11:32:47.994523 dump params tx window
4189 11:32:47.994598 tx_center_min[0][0][0] = 0
4190 11:32:47.997986 tx_center_max[0][0][0] = 0
4191 11:32:48.001233 tx_center_min[0][0][1] = 0
4192 11:32:48.004568 tx_center_max[0][0][1] = 0
4193 11:32:48.004643 tx_center_min[0][1][0] = 0
4194 11:32:48.008132 tx_center_max[0][1][0] = 0
4195 11:32:48.011255 tx_center_min[0][1][1] = 0
4196 11:32:48.011330 tx_center_max[0][1][1] = 0
4197 11:32:48.014905 tx_center_min[1][0][0] = 0
4198 11:32:48.018074 tx_center_max[1][0][0] = 0
4199 11:32:48.021242 tx_center_min[1][0][1] = 0
4200 11:32:48.021317 tx_center_max[1][0][1] = 0
4201 11:32:48.024572 tx_center_min[1][1][0] = 0
4202 11:32:48.027846 tx_center_max[1][1][0] = 0
4203 11:32:48.031322 tx_center_min[1][1][1] = 0
4204 11:32:48.031398 tx_center_max[1][1][1] = 0
4205 11:32:48.034746 dump params tx window
4206 11:32:48.038213 tx_win_center[0][0][0] = 0
4207 11:32:48.038304 tx_first_pass[0][0][0] = 0
4208 11:32:48.041527 tx_last_pass[0][0][0] = 0
4209 11:32:48.044627 tx_win_center[0][0][1] = 0
4210 11:32:48.048185 tx_first_pass[0][0][1] = 0
4211 11:32:48.048264 tx_last_pass[0][0][1] = 0
4212 11:32:48.051666 tx_win_center[0][0][2] = 0
4213 11:32:48.055164 tx_first_pass[0][0][2] = 0
4214 11:32:48.055242 tx_last_pass[0][0][2] = 0
4215 11:32:48.058122 tx_win_center[0][0][3] = 0
4216 11:32:48.061571 tx_first_pass[0][0][3] = 0
4217 11:32:48.064844 tx_last_pass[0][0][3] = 0
4218 11:32:48.064922 tx_win_center[0][0][4] = 0
4219 11:32:48.068192 tx_first_pass[0][0][4] = 0
4220 11:32:48.071728 tx_last_pass[0][0][4] = 0
4221 11:32:48.071804 tx_win_center[0][0][5] = 0
4222 11:32:48.074700 tx_first_pass[0][0][5] = 0
4223 11:32:48.078152 tx_last_pass[0][0][5] = 0
4224 11:32:48.081676 tx_win_center[0][0][6] = 0
4225 11:32:48.081751 tx_first_pass[0][0][6] = 0
4226 11:32:48.084852 tx_last_pass[0][0][6] = 0
4227 11:32:48.088620 tx_win_center[0][0][7] = 0
4228 11:32:48.092061 tx_first_pass[0][0][7] = 0
4229 11:32:48.092136 tx_last_pass[0][0][7] = 0
4230 11:32:48.094929 tx_win_center[0][0][8] = 0
4231 11:32:48.098103 tx_first_pass[0][0][8] = 0
4232 11:32:48.098179 tx_last_pass[0][0][8] = 0
4233 11:32:48.101536 tx_win_center[0][0][9] = 0
4234 11:32:48.105148 tx_first_pass[0][0][9] = 0
4235 11:32:48.108825 tx_last_pass[0][0][9] = 0
4236 11:32:48.108900 tx_win_center[0][0][10] = 0
4237 11:32:48.112175 tx_first_pass[0][0][10] = 0
4238 11:32:48.114994 tx_last_pass[0][0][10] = 0
4239 11:32:48.118651 tx_win_center[0][0][11] = 0
4240 11:32:48.118727 tx_first_pass[0][0][11] = 0
4241 11:32:48.121795 tx_last_pass[0][0][11] = 0
4242 11:32:48.125097 tx_win_center[0][0][12] = 0
4243 11:32:48.128346 tx_first_pass[0][0][12] = 0
4244 11:32:48.128421 tx_last_pass[0][0][12] = 0
4245 11:32:48.131816 tx_win_center[0][0][13] = 0
4246 11:32:48.135091 tx_first_pass[0][0][13] = 0
4247 11:32:48.138478 tx_last_pass[0][0][13] = 0
4248 11:32:48.138554 tx_win_center[0][0][14] = 0
4249 11:32:48.141881 tx_first_pass[0][0][14] = 0
4250 11:32:48.145174 tx_last_pass[0][0][14] = 0
4251 11:32:48.148711 tx_win_center[0][0][15] = 0
4252 11:32:48.148812 tx_first_pass[0][0][15] = 0
4253 11:32:48.151982 tx_last_pass[0][0][15] = 0
4254 11:32:48.155358 tx_win_center[0][1][0] = 0
4255 11:32:48.155434 tx_first_pass[0][1][0] = 0
4256 11:32:48.158396 tx_last_pass[0][1][0] = 0
4257 11:32:48.161701 tx_win_center[0][1][1] = 0
4258 11:32:48.165380 tx_first_pass[0][1][1] = 0
4259 11:32:48.165455 tx_last_pass[0][1][1] = 0
4260 11:32:48.168714 tx_win_center[0][1][2] = 0
4261 11:32:48.171825 tx_first_pass[0][1][2] = 0
4262 11:32:48.174943 tx_last_pass[0][1][2] = 0
4263 11:32:48.175017 tx_win_center[0][1][3] = 0
4264 11:32:48.178316 tx_first_pass[0][1][3] = 0
4265 11:32:48.181720 tx_last_pass[0][1][3] = 0
4266 11:32:48.181796 tx_win_center[0][1][4] = 0
4267 11:32:48.185392 tx_first_pass[0][1][4] = 0
4268 11:32:48.188308 tx_last_pass[0][1][4] = 0
4269 11:32:48.192144 tx_win_center[0][1][5] = 0
4270 11:32:48.192218 tx_first_pass[0][1][5] = 0
4271 11:32:48.194939 tx_last_pass[0][1][5] = 0
4272 11:32:48.198357 tx_win_center[0][1][6] = 0
4273 11:32:48.198432 tx_first_pass[0][1][6] = 0
4274 11:32:48.201756 tx_last_pass[0][1][6] = 0
4275 11:32:48.205137 tx_win_center[0][1][7] = 0
4276 11:32:48.208795 tx_first_pass[0][1][7] = 0
4277 11:32:48.208895 tx_last_pass[0][1][7] = 0
4278 11:32:48.211687 tx_win_center[0][1][8] = 0
4279 11:32:48.215220 tx_first_pass[0][1][8] = 0
4280 11:32:48.218649 tx_last_pass[0][1][8] = 0
4281 11:32:48.218724 tx_win_center[0][1][9] = 0
4282 11:32:48.221863 tx_first_pass[0][1][9] = 0
4283 11:32:48.225410 tx_last_pass[0][1][9] = 0
4284 11:32:48.225485 tx_win_center[0][1][10] = 0
4285 11:32:48.228421 tx_first_pass[0][1][10] = 0
4286 11:32:48.231766 tx_last_pass[0][1][10] = 0
4287 11:32:48.235318 tx_win_center[0][1][11] = 0
4288 11:32:48.235393 tx_first_pass[0][1][11] = 0
4289 11:32:48.238391 tx_last_pass[0][1][11] = 0
4290 11:32:48.242255 tx_win_center[0][1][12] = 0
4291 11:32:48.245361 tx_first_pass[0][1][12] = 0
4292 11:32:48.245436 tx_last_pass[0][1][12] = 0
4293 11:32:48.248355 tx_win_center[0][1][13] = 0
4294 11:32:48.251741 tx_first_pass[0][1][13] = 0
4295 11:32:48.255114 tx_last_pass[0][1][13] = 0
4296 11:32:48.255189 tx_win_center[0][1][14] = 0
4297 11:32:48.258483 tx_first_pass[0][1][14] = 0
4298 11:32:48.261869 tx_last_pass[0][1][14] = 0
4299 11:32:48.265229 tx_win_center[0][1][15] = 0
4300 11:32:48.265338 tx_first_pass[0][1][15] = 0
4301 11:32:48.268669 tx_last_pass[0][1][15] = 0
4302 11:32:48.271865 tx_win_center[1][0][0] = 0
4303 11:32:48.275348 tx_first_pass[1][0][0] = 0
4304 11:32:48.275423 tx_last_pass[1][0][0] = 0
4305 11:32:48.278655 tx_win_center[1][0][1] = 0
4306 11:32:48.281848 tx_first_pass[1][0][1] = 0
4307 11:32:48.281924 tx_last_pass[1][0][1] = 0
4308 11:32:48.285350 tx_win_center[1][0][2] = 0
4309 11:32:48.288901 tx_first_pass[1][0][2] = 0
4310 11:32:48.291892 tx_last_pass[1][0][2] = 0
4311 11:32:48.291985 tx_win_center[1][0][3] = 0
4312 11:32:48.295378 tx_first_pass[1][0][3] = 0
4313 11:32:48.298698 tx_last_pass[1][0][3] = 0
4314 11:32:48.302065 tx_win_center[1][0][4] = 0
4315 11:32:48.302140 tx_first_pass[1][0][4] = 0
4316 11:32:48.305366 tx_last_pass[1][0][4] = 0
4317 11:32:48.308727 tx_win_center[1][0][5] = 0
4318 11:32:48.308802 tx_first_pass[1][0][5] = 0
4319 11:32:48.312266 tx_last_pass[1][0][5] = 0
4320 11:32:48.315401 tx_win_center[1][0][6] = 0
4321 11:32:48.318859 tx_first_pass[1][0][6] = 0
4322 11:32:48.318934 tx_last_pass[1][0][6] = 0
4323 11:32:48.321982 tx_win_center[1][0][7] = 0
4324 11:32:48.325731 tx_first_pass[1][0][7] = 0
4325 11:32:48.325805 tx_last_pass[1][0][7] = 0
4326 11:32:48.329084 tx_win_center[1][0][8] = 0
4327 11:32:48.332181 tx_first_pass[1][0][8] = 0
4328 11:32:48.335524 tx_last_pass[1][0][8] = 0
4329 11:32:48.335623 tx_win_center[1][0][9] = 0
4330 11:32:48.339069 tx_first_pass[1][0][9] = 0
4331 11:32:48.342394 tx_last_pass[1][0][9] = 0
4332 11:32:48.345568 tx_win_center[1][0][10] = 0
4333 11:32:48.345642 tx_first_pass[1][0][10] = 0
4334 11:32:48.348653 tx_last_pass[1][0][10] = 0
4335 11:32:48.352128 tx_win_center[1][0][11] = 0
4336 11:32:48.355305 tx_first_pass[1][0][11] = 0
4337 11:32:48.355380 tx_last_pass[1][0][11] = 0
4338 11:32:48.359196 tx_win_center[1][0][12] = 0
4339 11:32:48.362163 tx_first_pass[1][0][12] = 0
4340 11:32:48.365401 tx_last_pass[1][0][12] = 0
4341 11:32:48.365476 tx_win_center[1][0][13] = 0
4342 11:32:48.368546 tx_first_pass[1][0][13] = 0
4343 11:32:48.371961 tx_last_pass[1][0][13] = 0
4344 11:32:48.375328 tx_win_center[1][0][14] = 0
4345 11:32:48.375402 tx_first_pass[1][0][14] = 0
4346 11:32:48.379065 tx_last_pass[1][0][14] = 0
4347 11:32:48.381967 tx_win_center[1][0][15] = 0
4348 11:32:48.385580 tx_first_pass[1][0][15] = 0
4349 11:32:48.385654 tx_last_pass[1][0][15] = 0
4350 11:32:48.388854 tx_win_center[1][1][0] = 0
4351 11:32:48.391954 tx_first_pass[1][1][0] = 0
4352 11:32:48.392028 tx_last_pass[1][1][0] = 0
4353 11:32:48.395278 tx_win_center[1][1][1] = 0
4354 11:32:48.398669 tx_first_pass[1][1][1] = 0
4355 11:32:48.402135 tx_last_pass[1][1][1] = 0
4356 11:32:48.402210 tx_win_center[1][1][2] = 0
4357 11:32:48.405656 tx_first_pass[1][1][2] = 0
4358 11:32:48.408993 tx_last_pass[1][1][2] = 0
4359 11:32:48.411943 tx_win_center[1][1][3] = 0
4360 11:32:48.412013 tx_first_pass[1][1][3] = 0
4361 11:32:48.415452 tx_last_pass[1][1][3] = 0
4362 11:32:48.418494 tx_win_center[1][1][4] = 0
4363 11:32:48.418562 tx_first_pass[1][1][4] = 0
4364 11:32:48.422245 tx_last_pass[1][1][4] = 0
4365 11:32:48.425346 tx_win_center[1][1][5] = 0
4366 11:32:48.428597 tx_first_pass[1][1][5] = 0
4367 11:32:48.428665 tx_last_pass[1][1][5] = 0
4368 11:32:48.431805 tx_win_center[1][1][6] = 0
4369 11:32:48.435266 tx_first_pass[1][1][6] = 0
4370 11:32:48.438914 tx_last_pass[1][1][6] = 0
4371 11:32:48.438982 tx_win_center[1][1][7] = 0
4372 11:32:48.442223 tx_first_pass[1][1][7] = 0
4373 11:32:48.445327 tx_last_pass[1][1][7] = 0
4374 11:32:48.445401 tx_win_center[1][1][8] = 0
4375 11:32:48.448504 tx_first_pass[1][1][8] = 0
4376 11:32:48.451851 tx_last_pass[1][1][8] = 0
4377 11:32:48.455356 tx_win_center[1][1][9] = 0
4378 11:32:48.455429 tx_first_pass[1][1][9] = 0
4379 11:32:48.458407 tx_last_pass[1][1][9] = 0
4380 11:32:48.461930 tx_win_center[1][1][10] = 0
4381 11:32:48.465107 tx_first_pass[1][1][10] = 0
4382 11:32:48.465203 tx_last_pass[1][1][10] = 0
4383 11:32:48.468408 tx_win_center[1][1][11] = 0
4384 11:32:48.471885 tx_first_pass[1][1][11] = 0
4385 11:32:48.475252 tx_last_pass[1][1][11] = 0
4386 11:32:48.475321 tx_win_center[1][1][12] = 0
4387 11:32:48.478837 tx_first_pass[1][1][12] = 0
4388 11:32:48.482040 tx_last_pass[1][1][12] = 0
4389 11:32:48.485370 tx_win_center[1][1][13] = 0
4390 11:32:48.485437 tx_first_pass[1][1][13] = 0
4391 11:32:48.488641 tx_last_pass[1][1][13] = 0
4392 11:32:48.492205 tx_win_center[1][1][14] = 0
4393 11:32:48.495527 tx_first_pass[1][1][14] = 0
4394 11:32:48.495619 tx_last_pass[1][1][14] = 0
4395 11:32:48.498843 tx_win_center[1][1][15] = 0
4396 11:32:48.502121 tx_first_pass[1][1][15] = 0
4397 11:32:48.505546 tx_last_pass[1][1][15] = 0
4398 11:32:48.505613 dump params rx window
4399 11:32:48.508888 rx_firspass[0][0][0] = 0
4400 11:32:48.508983 rx_lastpass[0][0][0] = 0
4401 11:32:48.511951 rx_firspass[0][0][1] = 0
4402 11:32:48.515394 rx_lastpass[0][0][1] = 0
4403 11:32:48.519099 rx_firspass[0][0][2] = 0
4404 11:32:48.519174 rx_lastpass[0][0][2] = 0
4405 11:32:48.522352 rx_firspass[0][0][3] = 0
4406 11:32:48.525758 rx_lastpass[0][0][3] = 0
4407 11:32:48.525833 rx_firspass[0][0][4] = 0
4408 11:32:48.528959 rx_lastpass[0][0][4] = 0
4409 11:32:48.532150 rx_firspass[0][0][5] = 0
4410 11:32:48.532226 rx_lastpass[0][0][5] = 0
4411 11:32:48.535810 rx_firspass[0][0][6] = 0
4412 11:32:48.538813 rx_lastpass[0][0][6] = 0
4413 11:32:48.538878 rx_firspass[0][0][7] = 0
4414 11:32:48.542362 rx_lastpass[0][0][7] = 0
4415 11:32:48.545414 rx_firspass[0][0][8] = 0
4416 11:32:48.545489 rx_lastpass[0][0][8] = 0
4417 11:32:48.549106 rx_firspass[0][0][9] = 0
4418 11:32:48.552456 rx_lastpass[0][0][9] = 0
4419 11:32:48.552532 rx_firspass[0][0][10] = 0
4420 11:32:48.555488 rx_lastpass[0][0][10] = 0
4421 11:32:48.558920 rx_firspass[0][0][11] = 0
4422 11:32:48.562046 rx_lastpass[0][0][11] = 0
4423 11:32:48.562114 rx_firspass[0][0][12] = 0
4424 11:32:48.565425 rx_lastpass[0][0][12] = 0
4425 11:32:48.568861 rx_firspass[0][0][13] = 0
4426 11:32:48.568959 rx_lastpass[0][0][13] = 0
4427 11:32:48.572160 rx_firspass[0][0][14] = 0
4428 11:32:48.575446 rx_lastpass[0][0][14] = 0
4429 11:32:48.578809 rx_firspass[0][0][15] = 0
4430 11:32:48.578908 rx_lastpass[0][0][15] = 0
4431 11:32:48.582052 rx_firspass[0][1][0] = 0
4432 11:32:48.585603 rx_lastpass[0][1][0] = 0
4433 11:32:48.585679 rx_firspass[0][1][1] = 0
4434 11:32:48.588953 rx_lastpass[0][1][1] = 0
4435 11:32:48.592251 rx_firspass[0][1][2] = 0
4436 11:32:48.592327 rx_lastpass[0][1][2] = 0
4437 11:32:48.595411 rx_firspass[0][1][3] = 0
4438 11:32:48.599094 rx_lastpass[0][1][3] = 0
4439 11:32:48.599169 rx_firspass[0][1][4] = 0
4440 11:32:48.602467 rx_lastpass[0][1][4] = 0
4441 11:32:48.605376 rx_firspass[0][1][5] = 0
4442 11:32:48.608677 rx_lastpass[0][1][5] = 0
4443 11:32:48.608752 rx_firspass[0][1][6] = 0
4444 11:32:48.612134 rx_lastpass[0][1][6] = 0
4445 11:32:48.615611 rx_firspass[0][1][7] = 0
4446 11:32:48.615686 rx_lastpass[0][1][7] = 0
4447 11:32:48.619029 rx_firspass[0][1][8] = 0
4448 11:32:48.622317 rx_lastpass[0][1][8] = 0
4449 11:32:48.622393 rx_firspass[0][1][9] = 0
4450 11:32:48.625657 rx_lastpass[0][1][9] = 0
4451 11:32:48.628694 rx_firspass[0][1][10] = 0
4452 11:32:48.628769 rx_lastpass[0][1][10] = 0
4453 11:32:48.632073 rx_firspass[0][1][11] = 0
4454 11:32:48.635391 rx_lastpass[0][1][11] = 0
4455 11:32:48.638880 rx_firspass[0][1][12] = 0
4456 11:32:48.638956 rx_lastpass[0][1][12] = 0
4457 11:32:48.642491 rx_firspass[0][1][13] = 0
4458 11:32:48.645421 rx_lastpass[0][1][13] = 0
4459 11:32:48.645496 rx_firspass[0][1][14] = 0
4460 11:32:48.649042 rx_lastpass[0][1][14] = 0
4461 11:32:48.652467 rx_firspass[0][1][15] = 0
4462 11:32:48.655541 rx_lastpass[0][1][15] = 0
4463 11:32:48.655620 rx_firspass[1][0][0] = 0
4464 11:32:48.658757 rx_lastpass[1][0][0] = 0
4465 11:32:48.662284 rx_firspass[1][0][1] = 0
4466 11:32:48.662359 rx_lastpass[1][0][1] = 0
4467 11:32:48.665417 rx_firspass[1][0][2] = 0
4468 11:32:48.669333 rx_lastpass[1][0][2] = 0
4469 11:32:48.669418 rx_firspass[1][0][3] = 0
4470 11:32:48.672045 rx_lastpass[1][0][3] = 0
4471 11:32:48.675682 rx_firspass[1][0][4] = 0
4472 11:32:48.675756 rx_lastpass[1][0][4] = 0
4473 11:32:48.678683 rx_firspass[1][0][5] = 0
4474 11:32:48.682371 rx_lastpass[1][0][5] = 0
4475 11:32:48.682447 rx_firspass[1][0][6] = 0
4476 11:32:48.685539 rx_lastpass[1][0][6] = 0
4477 11:32:48.688865 rx_firspass[1][0][7] = 0
4478 11:32:48.688965 rx_lastpass[1][0][7] = 0
4479 11:32:48.692152 rx_firspass[1][0][8] = 0
4480 11:32:48.695423 rx_lastpass[1][0][8] = 0
4481 11:32:48.699080 rx_firspass[1][0][9] = 0
4482 11:32:48.699155 rx_lastpass[1][0][9] = 0
4483 11:32:48.702310 rx_firspass[1][0][10] = 0
4484 11:32:48.705733 rx_lastpass[1][0][10] = 0
4485 11:32:48.705809 rx_firspass[1][0][11] = 0
4486 11:32:48.709003 rx_lastpass[1][0][11] = 0
4487 11:32:48.712657 rx_firspass[1][0][12] = 0
4488 11:32:48.715858 rx_lastpass[1][0][12] = 0
4489 11:32:48.715934 rx_firspass[1][0][13] = 0
4490 11:32:48.719148 rx_lastpass[1][0][13] = 0
4491 11:32:48.722170 rx_firspass[1][0][14] = 0
4492 11:32:48.722245 rx_lastpass[1][0][14] = 0
4493 11:32:48.725440 rx_firspass[1][0][15] = 0
4494 11:32:48.728946 rx_lastpass[1][0][15] = 0
4495 11:32:48.729020 rx_firspass[1][1][0] = 0
4496 11:32:48.732430 rx_lastpass[1][1][0] = 0
4497 11:32:48.735597 rx_firspass[1][1][1] = 0
4498 11:32:48.735673 rx_lastpass[1][1][1] = 0
4499 11:32:48.738955 rx_firspass[1][1][2] = 0
4500 11:32:48.742183 rx_lastpass[1][1][2] = 0
4501 11:32:48.745509 rx_firspass[1][1][3] = 0
4502 11:32:48.745584 rx_lastpass[1][1][3] = 0
4503 11:32:48.749327 rx_firspass[1][1][4] = 0
4504 11:32:48.752576 rx_lastpass[1][1][4] = 0
4505 11:32:48.752673 rx_firspass[1][1][5] = 0
4506 11:32:48.755845 rx_lastpass[1][1][5] = 0
4507 11:32:48.759183 rx_firspass[1][1][6] = 0
4508 11:32:48.759258 rx_lastpass[1][1][6] = 0
4509 11:32:48.762208 rx_firspass[1][1][7] = 0
4510 11:32:48.765786 rx_lastpass[1][1][7] = 0
4511 11:32:48.765886 rx_firspass[1][1][8] = 0
4512 11:32:48.769123 rx_lastpass[1][1][8] = 0
4513 11:32:48.772441 rx_firspass[1][1][9] = 0
4514 11:32:48.772516 rx_lastpass[1][1][9] = 0
4515 11:32:48.775627 rx_firspass[1][1][10] = 0
4516 11:32:48.779266 rx_lastpass[1][1][10] = 0
4517 11:32:48.782505 rx_firspass[1][1][11] = 0
4518 11:32:48.782580 rx_lastpass[1][1][11] = 0
4519 11:32:48.785972 rx_firspass[1][1][12] = 0
4520 11:32:48.789135 rx_lastpass[1][1][12] = 0
4521 11:32:48.789230 rx_firspass[1][1][13] = 0
4522 11:32:48.792430 rx_lastpass[1][1][13] = 0
4523 11:32:48.795694 rx_firspass[1][1][14] = 0
4524 11:32:48.795769 rx_lastpass[1][1][14] = 0
4525 11:32:48.799082 rx_firspass[1][1][15] = 0
4526 11:32:48.802362 rx_lastpass[1][1][15] = 0
4527 11:32:48.805784 dump params clk_delay
4528 11:32:48.805859 clk_delay[0] = 0
4529 11:32:48.805917 clk_delay[1] = 0
4530 11:32:48.809456 dump params dqs_delay
4531 11:32:48.813205 dqs_delay[0][0] = 0
4532 11:32:48.813305 dqs_delay[0][1] = 0
4533 11:32:48.815881 dqs_delay[1][0] = 0
4534 11:32:48.815956 dqs_delay[1][1] = 0
4535 11:32:48.819188 dump params delay_cell_unit = 753
4536 11:32:48.822402 dump source = 0x0
4537 11:32:48.822478 dump params frequency:800
4538 11:32:48.825921 dump params rank number:2
4539 11:32:48.825995
4540 11:32:48.829324 dump params write leveling
4541 11:32:48.832407 write leveling[0][0][0] = 0x0
4542 11:32:48.832482 write leveling[0][0][1] = 0x0
4543 11:32:48.835944 write leveling[0][1][0] = 0x0
4544 11:32:48.839098 write leveling[0][1][1] = 0x0
4545 11:32:48.842992 write leveling[1][0][0] = 0x0
4546 11:32:48.846003 write leveling[1][0][1] = 0x0
4547 11:32:48.846079 write leveling[1][1][0] = 0x0
4548 11:32:48.849208 write leveling[1][1][1] = 0x0
4549 11:32:48.852604 dump params cbt_cs
4550 11:32:48.852679 cbt_cs[0][0] = 0x0
4551 11:32:48.856206 cbt_cs[0][1] = 0x0
4552 11:32:48.856281 cbt_cs[1][0] = 0x0
4553 11:32:48.859491 cbt_cs[1][1] = 0x0
4554 11:32:48.859566 dump params cbt_mr12
4555 11:32:48.863073 cbt_mr12[0][0] = 0x0
4556 11:32:48.863149 cbt_mr12[0][1] = 0x0
4557 11:32:48.866288 cbt_mr12[1][0] = 0x0
4558 11:32:48.869463 cbt_mr12[1][1] = 0x0
4559 11:32:48.869539 dump params tx window
4560 11:32:48.872873 tx_center_min[0][0][0] = 0
4561 11:32:48.876139 tx_center_max[0][0][0] = 0
4562 11:32:48.876215 tx_center_min[0][0][1] = 0
4563 11:32:48.879459 tx_center_max[0][0][1] = 0
4564 11:32:48.882505 tx_center_min[0][1][0] = 0
4565 11:32:48.885918 tx_center_max[0][1][0] = 0
4566 11:32:48.885994 tx_center_min[0][1][1] = 0
4567 11:32:48.889183 tx_center_max[0][1][1] = 0
4568 11:32:48.892748 tx_center_min[1][0][0] = 0
4569 11:32:48.895836 tx_center_max[1][0][0] = 0
4570 11:32:48.895912 tx_center_min[1][0][1] = 0
4571 11:32:48.899189 tx_center_max[1][0][1] = 0
4572 11:32:48.902770 tx_center_min[1][1][0] = 0
4573 11:32:48.905637 tx_center_max[1][1][0] = 0
4574 11:32:48.905713 tx_center_min[1][1][1] = 0
4575 11:32:48.909051 tx_center_max[1][1][1] = 0
4576 11:32:48.912739 dump params tx window
4577 11:32:48.912815 tx_win_center[0][0][0] = 0
4578 11:32:48.915694 tx_first_pass[0][0][0] = 0
4579 11:32:48.918944 tx_last_pass[0][0][0] = 0
4580 11:32:48.922556 tx_win_center[0][0][1] = 0
4581 11:32:48.922631 tx_first_pass[0][0][1] = 0
4582 11:32:48.925915 tx_last_pass[0][0][1] = 0
4583 11:32:48.929241 tx_win_center[0][0][2] = 0
4584 11:32:48.929330 tx_first_pass[0][0][2] = 0
4585 11:32:48.932482 tx_last_pass[0][0][2] = 0
4586 11:32:48.935601 tx_win_center[0][0][3] = 0
4587 11:32:48.938957 tx_first_pass[0][0][3] = 0
4588 11:32:48.939033 tx_last_pass[0][0][3] = 0
4589 11:32:48.942517 tx_win_center[0][0][4] = 0
4590 11:32:48.945460 tx_first_pass[0][0][4] = 0
4591 11:32:48.949068 tx_last_pass[0][0][4] = 0
4592 11:32:48.949144 tx_win_center[0][0][5] = 0
4593 11:32:48.952463 tx_first_pass[0][0][5] = 0
4594 11:32:48.955819 tx_last_pass[0][0][5] = 0
4595 11:32:48.955895 tx_win_center[0][0][6] = 0
4596 11:32:48.959092 tx_first_pass[0][0][6] = 0
4597 11:32:48.962285 tx_last_pass[0][0][6] = 0
4598 11:32:48.965799 tx_win_center[0][0][7] = 0
4599 11:32:48.965875 tx_first_pass[0][0][7] = 0
4600 11:32:48.968899 tx_last_pass[0][0][7] = 0
4601 11:32:48.972479 tx_win_center[0][0][8] = 0
4602 11:32:48.972555 tx_first_pass[0][0][8] = 0
4603 11:32:48.975718 tx_last_pass[0][0][8] = 0
4604 11:32:48.979080 tx_win_center[0][0][9] = 0
4605 11:32:48.982224 tx_first_pass[0][0][9] = 0
4606 11:32:48.982299 tx_last_pass[0][0][9] = 0
4607 11:32:48.985743 tx_win_center[0][0][10] = 0
4608 11:32:48.988974 tx_first_pass[0][0][10] = 0
4609 11:32:48.992255 tx_last_pass[0][0][10] = 0
4610 11:32:48.992331 tx_win_center[0][0][11] = 0
4611 11:32:48.995711 tx_first_pass[0][0][11] = 0
4612 11:32:48.999034 tx_last_pass[0][0][11] = 0
4613 11:32:49.002188 tx_win_center[0][0][12] = 0
4614 11:32:49.002264 tx_first_pass[0][0][12] = 0
4615 11:32:49.006027 tx_last_pass[0][0][12] = 0
4616 11:32:49.008863 tx_win_center[0][0][13] = 0
4617 11:32:49.012452 tx_first_pass[0][0][13] = 0
4618 11:32:49.012528 tx_last_pass[0][0][13] = 0
4619 11:32:49.015428 tx_win_center[0][0][14] = 0
4620 11:32:49.019181 tx_first_pass[0][0][14] = 0
4621 11:32:49.022501 tx_last_pass[0][0][14] = 0
4622 11:32:49.022576 tx_win_center[0][0][15] = 0
4623 11:32:49.025922 tx_first_pass[0][0][15] = 0
4624 11:32:49.028805 tx_last_pass[0][0][15] = 0
4625 11:32:49.032274 tx_win_center[0][1][0] = 0
4626 11:32:49.032351 tx_first_pass[0][1][0] = 0
4627 11:32:49.035771 tx_last_pass[0][1][0] = 0
4628 11:32:49.038777 tx_win_center[0][1][1] = 0
4629 11:32:49.042313 tx_first_pass[0][1][1] = 0
4630 11:32:49.042389 tx_last_pass[0][1][1] = 0
4631 11:32:49.045555 tx_win_center[0][1][2] = 0
4632 11:32:49.049218 tx_first_pass[0][1][2] = 0
4633 11:32:49.049325 tx_last_pass[0][1][2] = 0
4634 11:32:49.052324 tx_win_center[0][1][3] = 0
4635 11:32:49.055758 tx_first_pass[0][1][3] = 0
4636 11:32:49.059046 tx_last_pass[0][1][3] = 0
4637 11:32:49.059122 tx_win_center[0][1][4] = 0
4638 11:32:49.062300 tx_first_pass[0][1][4] = 0
4639 11:32:49.065950 tx_last_pass[0][1][4] = 0
4640 11:32:49.066026 tx_win_center[0][1][5] = 0
4641 11:32:49.068880 tx_first_pass[0][1][5] = 0
4642 11:32:49.072375 tx_last_pass[0][1][5] = 0
4643 11:32:49.075769 tx_win_center[0][1][6] = 0
4644 11:32:49.075844 tx_first_pass[0][1][6] = 0
4645 11:32:49.079293 tx_last_pass[0][1][6] = 0
4646 11:32:49.082550 tx_win_center[0][1][7] = 0
4647 11:32:49.085801 tx_first_pass[0][1][7] = 0
4648 11:32:49.085877 tx_last_pass[0][1][7] = 0
4649 11:32:49.089491 tx_win_center[0][1][8] = 0
4650 11:32:49.092281 tx_first_pass[0][1][8] = 0
4651 11:32:49.092357 tx_last_pass[0][1][8] = 0
4652 11:32:49.095568 tx_win_center[0][1][9] = 0
4653 11:32:49.099009 tx_first_pass[0][1][9] = 0
4654 11:32:49.102671 tx_last_pass[0][1][9] = 0
4655 11:32:49.102747 tx_win_center[0][1][10] = 0
4656 11:32:49.105879 tx_first_pass[0][1][10] = 0
4657 11:32:49.109147 tx_last_pass[0][1][10] = 0
4658 11:32:49.112806 tx_win_center[0][1][11] = 0
4659 11:32:49.112882 tx_first_pass[0][1][11] = 0
4660 11:32:49.115793 tx_last_pass[0][1][11] = 0
4661 11:32:49.119076 tx_win_center[0][1][12] = 0
4662 11:32:49.122294 tx_first_pass[0][1][12] = 0
4663 11:32:49.122370 tx_last_pass[0][1][12] = 0
4664 11:32:49.126025 tx_win_center[0][1][13] = 0
4665 11:32:49.129109 tx_first_pass[0][1][13] = 0
4666 11:32:49.132895 tx_last_pass[0][1][13] = 0
4667 11:32:49.132971 tx_win_center[0][1][14] = 0
4668 11:32:49.135750 tx_first_pass[0][1][14] = 0
4669 11:32:49.139427 tx_last_pass[0][1][14] = 0
4670 11:32:49.139503 tx_win_center[0][1][15] = 0
4671 11:32:49.142553 tx_first_pass[0][1][15] = 0
4672 11:32:49.145998 tx_last_pass[0][1][15] = 0
4673 11:32:49.149209 tx_win_center[1][0][0] = 0
4674 11:32:49.149308 tx_first_pass[1][0][0] = 0
4675 11:32:49.152516 tx_last_pass[1][0][0] = 0
4676 11:32:49.155960 tx_win_center[1][0][1] = 0
4677 11:32:49.159217 tx_first_pass[1][0][1] = 0
4678 11:32:49.159294 tx_last_pass[1][0][1] = 0
4679 11:32:49.162524 tx_win_center[1][0][2] = 0
4680 11:32:49.166019 tx_first_pass[1][0][2] = 0
4681 11:32:49.166094 tx_last_pass[1][0][2] = 0
4682 11:32:49.169295 tx_win_center[1][0][3] = 0
4683 11:32:49.172592 tx_first_pass[1][0][3] = 0
4684 11:32:49.176203 tx_last_pass[1][0][3] = 0
4685 11:32:49.176278 tx_win_center[1][0][4] = 0
4686 11:32:49.179469 tx_first_pass[1][0][4] = 0
4687 11:32:49.182812 tx_last_pass[1][0][4] = 0
4688 11:32:49.186368 tx_win_center[1][0][5] = 0
4689 11:32:49.186443 tx_first_pass[1][0][5] = 0
4690 11:32:49.189733 tx_last_pass[1][0][5] = 0
4691 11:32:49.192692 tx_win_center[1][0][6] = 0
4692 11:32:49.192767 tx_first_pass[1][0][6] = 0
4693 11:32:49.196048 tx_last_pass[1][0][6] = 0
4694 11:32:49.199384 tx_win_center[1][0][7] = 0
4695 11:32:49.203066 tx_first_pass[1][0][7] = 0
4696 11:32:49.203142 tx_last_pass[1][0][7] = 0
4697 11:32:49.206317 tx_win_center[1][0][8] = 0
4698 11:32:49.209862 tx_first_pass[1][0][8] = 0
4699 11:32:49.209938 tx_last_pass[1][0][8] = 0
4700 11:32:49.212932 tx_win_center[1][0][9] = 0
4701 11:32:49.216278 tx_first_pass[1][0][9] = 0
4702 11:32:49.219472 tx_last_pass[1][0][9] = 0
4703 11:32:49.219548 tx_win_center[1][0][10] = 0
4704 11:32:49.223311 tx_first_pass[1][0][10] = 0
4705 11:32:49.226648 tx_last_pass[1][0][10] = 0
4706 11:32:49.229589 tx_win_center[1][0][11] = 0
4707 11:32:49.229665 tx_first_pass[1][0][11] = 0
4708 11:32:49.233182 tx_last_pass[1][0][11] = 0
4709 11:32:49.236082 tx_win_center[1][0][12] = 0
4710 11:32:49.239381 tx_first_pass[1][0][12] = 0
4711 11:32:49.239457 tx_last_pass[1][0][12] = 0
4712 11:32:49.242779 tx_win_center[1][0][13] = 0
4713 11:32:49.246188 tx_first_pass[1][0][13] = 0
4714 11:32:49.249513 tx_last_pass[1][0][13] = 0
4715 11:32:49.249589 tx_win_center[1][0][14] = 0
4716 11:32:49.252805 tx_first_pass[1][0][14] = 0
4717 11:32:49.256078 tx_last_pass[1][0][14] = 0
4718 11:32:49.259864 tx_win_center[1][0][15] = 0
4719 11:32:49.259941 tx_first_pass[1][0][15] = 0
4720 11:32:49.262602 tx_last_pass[1][0][15] = 0
4721 11:32:49.266239 tx_win_center[1][1][0] = 0
4722 11:32:49.269390 tx_first_pass[1][1][0] = 0
4723 11:32:49.269466 tx_last_pass[1][1][0] = 0
4724 11:32:49.273038 tx_win_center[1][1][1] = 0
4725 11:32:49.276094 tx_first_pass[1][1][1] = 0
4726 11:32:49.276170 tx_last_pass[1][1][1] = 0
4727 11:32:49.279418 tx_win_center[1][1][2] = 0
4728 11:32:49.282738 tx_first_pass[1][1][2] = 0
4729 11:32:49.286129 tx_last_pass[1][1][2] = 0
4730 11:32:49.286205 tx_win_center[1][1][3] = 0
4731 11:32:49.289815 tx_first_pass[1][1][3] = 0
4732 11:32:49.292675 tx_last_pass[1][1][3] = 0
4733 11:32:49.296440 tx_win_center[1][1][4] = 0
4734 11:32:49.296516 tx_first_pass[1][1][4] = 0
4735 11:32:49.299451 tx_last_pass[1][1][4] = 0
4736 11:32:49.302818 tx_win_center[1][1][5] = 0
4737 11:32:49.302894 tx_first_pass[1][1][5] = 0
4738 11:32:49.306361 tx_last_pass[1][1][5] = 0
4739 11:32:49.309281 tx_win_center[1][1][6] = 0
4740 11:32:49.312970 tx_first_pass[1][1][6] = 0
4741 11:32:49.313046 tx_last_pass[1][1][6] = 0
4742 11:32:49.316175 tx_win_center[1][1][7] = 0
4743 11:32:49.319685 tx_first_pass[1][1][7] = 0
4744 11:32:49.319761 tx_last_pass[1][1][7] = 0
4745 11:32:49.322943 tx_win_center[1][1][8] = 0
4746 11:32:49.326525 tx_first_pass[1][1][8] = 0
4747 11:32:49.329637 tx_last_pass[1][1][8] = 0
4748 11:32:49.329713 tx_win_center[1][1][9] = 0
4749 11:32:49.333081 tx_first_pass[1][1][9] = 0
4750 11:32:49.336454 tx_last_pass[1][1][9] = 0
4751 11:32:49.339879 tx_win_center[1][1][10] = 0
4752 11:32:49.339954 tx_first_pass[1][1][10] = 0
4753 11:32:49.343217 tx_last_pass[1][1][10] = 0
4754 11:32:49.346286 tx_win_center[1][1][11] = 0
4755 11:32:49.349939 tx_first_pass[1][1][11] = 0
4756 11:32:49.350046 tx_last_pass[1][1][11] = 0
4757 11:32:49.352984 tx_win_center[1][1][12] = 0
4758 11:32:49.356242 tx_first_pass[1][1][12] = 0
4759 11:32:49.359637 tx_last_pass[1][1][12] = 0
4760 11:32:49.359713 tx_win_center[1][1][13] = 0
4761 11:32:49.363250 tx_first_pass[1][1][13] = 0
4762 11:32:49.366238 tx_last_pass[1][1][13] = 0
4763 11:32:49.366314 tx_win_center[1][1][14] = 0
4764 11:32:49.369651 tx_first_pass[1][1][14] = 0
4765 11:32:49.373208 tx_last_pass[1][1][14] = 0
4766 11:32:49.376786 tx_win_center[1][1][15] = 0
4767 11:32:49.376861 tx_first_pass[1][1][15] = 0
4768 11:32:49.380009 tx_last_pass[1][1][15] = 0
4769 11:32:49.383541 dump params rx window
4770 11:32:49.383616 rx_firspass[0][0][0] = 0
4771 11:32:49.386743 rx_lastpass[0][0][0] = 0
4772 11:32:49.390150 rx_firspass[0][0][1] = 0
4773 11:32:49.393114 rx_lastpass[0][0][1] = 0
4774 11:32:49.393189 rx_firspass[0][0][2] = 0
4775 11:32:49.396634 rx_lastpass[0][0][2] = 0
4776 11:32:49.400029 rx_firspass[0][0][3] = 0
4777 11:32:49.400104 rx_lastpass[0][0][3] = 0
4778 11:32:49.403216 rx_firspass[0][0][4] = 0
4779 11:32:49.406737 rx_lastpass[0][0][4] = 0
4780 11:32:49.406812 rx_firspass[0][0][5] = 0
4781 11:32:49.409843 rx_lastpass[0][0][5] = 0
4782 11:32:49.413087 rx_firspass[0][0][6] = 0
4783 11:32:49.413163 rx_lastpass[0][0][6] = 0
4784 11:32:49.416389 rx_firspass[0][0][7] = 0
4785 11:32:49.419692 rx_lastpass[0][0][7] = 0
4786 11:32:49.419768 rx_firspass[0][0][8] = 0
4787 11:32:49.423182 rx_lastpass[0][0][8] = 0
4788 11:32:49.426545 rx_firspass[0][0][9] = 0
4789 11:32:49.429821 rx_lastpass[0][0][9] = 0
4790 11:32:49.429897 rx_firspass[0][0][10] = 0
4791 11:32:49.433357 rx_lastpass[0][0][10] = 0
4792 11:32:49.436719 rx_firspass[0][0][11] = 0
4793 11:32:49.436794 rx_lastpass[0][0][11] = 0
4794 11:32:49.439807 rx_firspass[0][0][12] = 0
4795 11:32:49.443137 rx_lastpass[0][0][12] = 0
4796 11:32:49.446512 rx_firspass[0][0][13] = 0
4797 11:32:49.446588 rx_lastpass[0][0][13] = 0
4798 11:32:49.449570 rx_firspass[0][0][14] = 0
4799 11:32:49.452747 rx_lastpass[0][0][14] = 0
4800 11:32:49.452822 rx_firspass[0][0][15] = 0
4801 11:32:49.456298 rx_lastpass[0][0][15] = 0
4802 11:32:49.459501 rx_firspass[0][1][0] = 0
4803 11:32:49.459576 rx_lastpass[0][1][0] = 0
4804 11:32:49.463201 rx_firspass[0][1][1] = 0
4805 11:32:49.466564 rx_lastpass[0][1][1] = 0
4806 11:32:49.466639 rx_firspass[0][1][2] = 0
4807 11:32:49.469960 rx_lastpass[0][1][2] = 0
4808 11:32:49.473110 rx_firspass[0][1][3] = 0
4809 11:32:49.476504 rx_lastpass[0][1][3] = 0
4810 11:32:49.476579 rx_firspass[0][1][4] = 0
4811 11:32:49.479392 rx_lastpass[0][1][4] = 0
4812 11:32:49.483019 rx_firspass[0][1][5] = 0
4813 11:32:49.483094 rx_lastpass[0][1][5] = 0
4814 11:32:49.486259 rx_firspass[0][1][6] = 0
4815 11:32:49.489941 rx_lastpass[0][1][6] = 0
4816 11:32:49.490017 rx_firspass[0][1][7] = 0
4817 11:32:49.493174 rx_lastpass[0][1][7] = 0
4818 11:32:49.496517 rx_firspass[0][1][8] = 0
4819 11:32:49.496592 rx_lastpass[0][1][8] = 0
4820 11:32:49.499519 rx_firspass[0][1][9] = 0
4821 11:32:49.503196 rx_lastpass[0][1][9] = 0
4822 11:32:49.503272 rx_firspass[0][1][10] = 0
4823 11:32:49.506474 rx_lastpass[0][1][10] = 0
4824 11:32:49.509468 rx_firspass[0][1][11] = 0
4825 11:32:49.512960 rx_lastpass[0][1][11] = 0
4826 11:32:49.513035 rx_firspass[0][1][12] = 0
4827 11:32:49.516514 rx_lastpass[0][1][12] = 0
4828 11:32:49.519876 rx_firspass[0][1][13] = 0
4829 11:32:49.519952 rx_lastpass[0][1][13] = 0
4830 11:32:49.523222 rx_firspass[0][1][14] = 0
4831 11:32:49.526460 rx_lastpass[0][1][14] = 0
4832 11:32:49.530074 rx_firspass[0][1][15] = 0
4833 11:32:49.530150 rx_lastpass[0][1][15] = 0
4834 11:32:49.533378 rx_firspass[1][0][0] = 0
4835 11:32:49.536404 rx_lastpass[1][0][0] = 0
4836 11:32:49.536478 rx_firspass[1][0][1] = 0
4837 11:32:49.539751 rx_lastpass[1][0][1] = 0
4838 11:32:49.543080 rx_firspass[1][0][2] = 0
4839 11:32:49.543155 rx_lastpass[1][0][2] = 0
4840 11:32:49.546646 rx_firspass[1][0][3] = 0
4841 11:32:49.549686 rx_lastpass[1][0][3] = 0
4842 11:32:49.549760 rx_firspass[1][0][4] = 0
4843 11:32:49.553461 rx_lastpass[1][0][4] = 0
4844 11:32:49.556502 rx_firspass[1][0][5] = 0
4845 11:32:49.556576 rx_lastpass[1][0][5] = 0
4846 11:32:49.559911 rx_firspass[1][0][6] = 0
4847 11:32:49.563362 rx_lastpass[1][0][6] = 0
4848 11:32:49.566820 rx_firspass[1][0][7] = 0
4849 11:32:49.566894 rx_lastpass[1][0][7] = 0
4850 11:32:49.569679 rx_firspass[1][0][8] = 0
4851 11:32:49.573290 rx_lastpass[1][0][8] = 0
4852 11:32:49.573366 rx_firspass[1][0][9] = 0
4853 11:32:49.576671 rx_lastpass[1][0][9] = 0
4854 11:32:49.579825 rx_firspass[1][0][10] = 0
4855 11:32:49.579899 rx_lastpass[1][0][10] = 0
4856 11:32:49.583135 rx_firspass[1][0][11] = 0
4857 11:32:49.586797 rx_lastpass[1][0][11] = 0
4858 11:32:49.586872 rx_firspass[1][0][12] = 0
4859 11:32:49.589926 rx_lastpass[1][0][12] = 0
4860 11:32:49.593246 rx_firspass[1][0][13] = 0
4861 11:32:49.596721 rx_lastpass[1][0][13] = 0
4862 11:32:49.596796 rx_firspass[1][0][14] = 0
4863 11:32:49.600095 rx_lastpass[1][0][14] = 0
4864 11:32:49.603413 rx_firspass[1][0][15] = 0
4865 11:32:49.603488 rx_lastpass[1][0][15] = 0
4866 11:32:49.606757 rx_firspass[1][1][0] = 0
4867 11:32:49.610145 rx_lastpass[1][1][0] = 0
4868 11:32:49.610220 rx_firspass[1][1][1] = 0
4869 11:32:49.613607 rx_lastpass[1][1][1] = 0
4870 11:32:49.616833 rx_firspass[1][1][2] = 0
4871 11:32:49.616908 rx_lastpass[1][1][2] = 0
4872 11:32:49.620176 rx_firspass[1][1][3] = 0
4873 11:32:49.623650 rx_lastpass[1][1][3] = 0
4874 11:32:49.627072 rx_firspass[1][1][4] = 0
4875 11:32:49.627147 rx_lastpass[1][1][4] = 0
4876 11:32:49.630073 rx_firspass[1][1][5] = 0
4877 11:32:49.633298 rx_lastpass[1][1][5] = 0
4878 11:32:49.633374 rx_firspass[1][1][6] = 0
4879 11:32:49.637067 rx_lastpass[1][1][6] = 0
4880 11:32:49.640569 rx_firspass[1][1][7] = 0
4881 11:32:49.640645 rx_lastpass[1][1][7] = 0
4882 11:32:49.643944 rx_firspass[1][1][8] = 0
4883 11:32:49.647005 rx_lastpass[1][1][8] = 0
4884 11:32:49.647080 rx_firspass[1][1][9] = 0
4885 11:32:49.650182 rx_lastpass[1][1][9] = 0
4886 11:32:49.653741 rx_firspass[1][1][10] = 0
4887 11:32:49.653817 rx_lastpass[1][1][10] = 0
4888 11:32:49.657258 rx_firspass[1][1][11] = 0
4889 11:32:49.660641 rx_lastpass[1][1][11] = 0
4890 11:32:49.663661 rx_firspass[1][1][12] = 0
4891 11:32:49.663737 rx_lastpass[1][1][12] = 0
4892 11:32:49.667190 rx_firspass[1][1][13] = 0
4893 11:32:49.670424 rx_lastpass[1][1][13] = 0
4894 11:32:49.670499 rx_firspass[1][1][14] = 0
4895 11:32:49.673942 rx_lastpass[1][1][14] = 0
4896 11:32:49.677262 rx_firspass[1][1][15] = 0
4897 11:32:49.680527 rx_lastpass[1][1][15] = 0
4898 11:32:49.680602 dump params clk_delay
4899 11:32:49.683605 clk_delay[0] = 0
4900 11:32:49.683681 clk_delay[1] = 0
4901 11:32:49.686860 dump params dqs_delay
4902 11:32:49.686936 dqs_delay[0][0] = 0
4903 11:32:49.690265 dqs_delay[0][1] = 0
4904 11:32:49.690362 dqs_delay[1][0] = 0
4905 11:32:49.693539 dqs_delay[1][1] = 0
4906 11:32:49.697062 dump params delay_cell_unit = 753
4907 11:32:49.697130 mt_set_emi_preloader end
4908 11:32:49.704000 [mt_mem_init] dram size: 0x100000000, rank number: 2
4909 11:32:49.706877 [complex_mem_test] start addr:0x40000000, len:20480
4910 11:32:49.744491 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
4911 11:32:49.751111 [complex_mem_test] start addr:0x80000000, len:20480
4912 11:32:49.786755 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
4913 11:32:49.793303 [complex_mem_test] start addr:0xc0000000, len:20480
4914 11:32:49.828982 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
4915 11:32:49.835729 [complex_mem_test] start addr:0x56000000, len:8192
4916 11:32:49.852343 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
4917 11:32:49.852424 ddr_geometry:1
4918 11:32:49.859383 [complex_mem_test] start addr:0x80000000, len:8192
4919 11:32:49.876267 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
4920 11:32:49.879330 dram_init: dram init end (result: 0)
4921 11:32:49.886327 Successfully loaded DRAM blobs and ran DRAM calibration
4922 11:32:49.896001 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
4923 11:32:49.896079 CBMEM:
4924 11:32:49.899454 IMD: root @ 00000000fffff000 254 entries.
4925 11:32:49.902952 IMD: root @ 00000000ffffec00 62 entries.
4926 11:32:49.909321 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
4927 11:32:49.915958 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
4928 11:32:49.919255 in-header: 03 a1 00 00 08 00 00 00
4929 11:32:49.922634 in-data: 84 60 60 10 00 00 00 00
4930 11:32:49.926099 Chrome EC: clear events_b mask to 0x0000000020004000
4931 11:32:49.933519 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
4932 11:32:49.937191 in-header: 03 fd 00 00 00 00 00 00
4933 11:32:49.937287 in-data:
4934 11:32:49.943362 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
4935 11:32:49.943438 CBFS @ 21000 size 3d4000
4936 11:32:49.950063 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
4937 11:32:49.953461 CBFS: Locating 'fallback/ramstage'
4938 11:32:49.956480 CBFS: Found @ offset 10d40 size d563
4939 11:32:49.977741 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
4940 11:32:49.989862 Accumulated console time in romstage 12717 ms
4941 11:32:49.989940
4942 11:32:49.989998
4943 11:32:50.000101 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
4944 11:32:50.003091 ARM64: Exception handlers installed.
4945 11:32:50.003167 ARM64: Testing exception
4946 11:32:50.006688 ARM64: Done test exception
4947 11:32:50.009863 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
4948 11:32:50.013484 Manufacturer: ef
4949 11:32:50.016513 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
4950 11:32:50.023573 WARNING: RO_VPD is uninitialized or empty.
4951 11:32:50.026818 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4952 11:32:50.030110 FMAP: area RW_VPD found @ 550000 (16384 bytes)
4953 11:32:50.039549 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
4954 11:32:50.043045 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
4955 11:32:50.049879 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
4956 11:32:50.049956 Enumerating buses...
4957 11:32:50.056313 Show all devs... Before device enumeration.
4958 11:32:50.056389 Root Device: enabled 1
4959 11:32:50.059670 CPU_CLUSTER: 0: enabled 1
4960 11:32:50.059750 CPU: 00: enabled 1
4961 11:32:50.063265 Compare with tree...
4962 11:32:50.066485 Root Device: enabled 1
4963 11:32:50.066560 CPU_CLUSTER: 0: enabled 1
4964 11:32:50.069837 CPU: 00: enabled 1
4965 11:32:50.072994 Root Device scanning...
4966 11:32:50.073069 root_dev_scan_bus for Root Device
4967 11:32:50.076438 CPU_CLUSTER: 0 enabled
4968 11:32:50.079760 root_dev_scan_bus for Root Device done
4969 11:32:50.086495 scan_bus: scanning of bus Root Device took 10688 usecs
4970 11:32:50.086571 done
4971 11:32:50.089699 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
4972 11:32:50.093073 Allocating resources...
4973 11:32:50.093149 Reading resources...
4974 11:32:50.096437 Root Device read_resources bus 0 link: 0
4975 11:32:50.103332 CPU_CLUSTER: 0 read_resources bus 0 link: 0
4976 11:32:50.103408 CPU: 00 missing read_resources
4977 11:32:50.109970 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
4978 11:32:50.113149 Root Device read_resources bus 0 link: 0 done
4979 11:32:50.116569 Done reading resources.
4980 11:32:50.119516 Show resources in subtree (Root Device)...After reading.
4981 11:32:50.123002 Root Device child on link 0 CPU_CLUSTER: 0
4982 11:32:50.126820 CPU_CLUSTER: 0 child on link 0 CPU: 00
4983 11:32:50.136649 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
4984 11:32:50.136726 CPU: 00
4985 11:32:50.139851 Setting resources...
4986 11:32:50.143602 Root Device assign_resources, bus 0 link: 0
4987 11:32:50.146263 CPU_CLUSTER: 0 missing set_resources
4988 11:32:50.149982 Root Device assign_resources, bus 0 link: 0
4989 11:32:50.153456 Done setting resources.
4990 11:32:50.156565 Show resources in subtree (Root Device)...After assigning values.
4991 11:32:50.163146 Root Device child on link 0 CPU_CLUSTER: 0
4992 11:32:50.166721 CPU_CLUSTER: 0 child on link 0 CPU: 00
4993 11:32:50.173186 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
4994 11:32:50.176516 CPU: 00
4995 11:32:50.176591 Done allocating resources.
4996 11:32:50.183092 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
4997 11:32:50.183168 Enabling resources...
4998 11:32:50.186371 done.
4999 11:32:50.189888 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5000 11:32:50.193140 Initializing devices...
5001 11:32:50.193259 Root Device init ...
5002 11:32:50.196230 mainboard_init: Starting display init.
5003 11:32:50.199872 ADC[4]: Raw value=77032 ID=0
5004 11:32:50.222483 anx7625_power_on_init: Init interface.
5005 11:32:50.225815 anx7625_disable_pd_protocol: Disabled PD feature.
5006 11:32:50.232402 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5007 11:32:50.289413 anx7625_start_dp_work: Secure OCM version=00
5008 11:32:50.292895 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5009 11:32:50.309879 sp_tx_get_edid_block: EDID Block = 1
5010 11:32:50.427009 Extracted contents:
5011 11:32:50.430408 header: 00 ff ff ff ff ff ff 00
5012 11:32:50.433789 serial number: 06 af 5c 14 00 00 00 00 00 1a
5013 11:32:50.436932 version: 01 04
5014 11:32:50.440489 basic params: 95 1a 0e 78 02
5015 11:32:50.443619 chroma info: 99 85 95 55 56 92 28 22 50 54
5016 11:32:50.447619 established: 00 00 00
5017 11:32:50.453701 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5018 11:32:50.456836 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5019 11:32:50.464161 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5020 11:32:50.470612 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5021 11:32:50.476862 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5022 11:32:50.480112 extensions: 00
5023 11:32:50.480188 checksum: ae
5024 11:32:50.480247
5025 11:32:50.484142 Manufacturer: AUO Model 145c Serial Number 0
5026 11:32:50.487427 Made week 0 of 2016
5027 11:32:50.487503 EDID version: 1.4
5028 11:32:50.490459 Digital display
5029 11:32:50.493423 6 bits per primary color channel
5030 11:32:50.493500 DisplayPort interface
5031 11:32:50.497000 Maximum image size: 26 cm x 14 cm
5032 11:32:50.500334 Gamma: 220%
5033 11:32:50.500409 Check DPMS levels
5034 11:32:50.503864 Supported color formats: RGB 4:4:4
5035 11:32:50.507414 First detailed timing is preferred timing
5036 11:32:50.510244 Established timings supported:
5037 11:32:50.513896 Standard timings supported:
5038 11:32:50.513972 Detailed timings
5039 11:32:50.520166 Hex of detail: ce1d56ea50001a3030204600009010000018
5040 11:32:50.523674 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5041 11:32:50.527160 0556 0586 05a6 0640 hborder 0
5042 11:32:50.530301 0300 0304 030a 031a vborder 0
5043 11:32:50.533579 -hsync -vsync
5044 11:32:50.536789 Did detailed timing
5045 11:32:50.540125 Hex of detail: 0000000f0000000000000000000000000020
5046 11:32:50.543417 Manufacturer-specified data, tag 15
5047 11:32:50.546996 Hex of detail: 000000fe0041554f0a202020202020202020
5048 11:32:50.550135 ASCII string: AUO
5049 11:32:50.553740 Hex of detail: 000000fe004231313658414230312e34200a
5050 11:32:50.556861 ASCII string: B116XAB01.4
5051 11:32:50.556936 Checksum
5052 11:32:50.560373 Checksum: 0xae (valid)
5053 11:32:50.566778 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5054 11:32:50.566854 DSI data_rate: 457800000 bps
5055 11:32:50.573985 anx7625_parse_edid: set default k value to 0x3d for panel
5056 11:32:50.577510 anx7625_parse_edid: pixelclock(76300).
5057 11:32:50.581124 hactive(1366), hsync(32), hfp(48), hbp(154)
5058 11:32:50.583983 vactive(768), vsync(6), vfp(4), vbp(16)
5059 11:32:50.587406 anx7625_dsi_config: config dsi.
5060 11:32:50.595227 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5061 11:32:50.616238 anx7625_dsi_config: success to config DSI
5062 11:32:50.619418 anx7625_dp_start: MIPI phy setup OK.
5063 11:32:50.623102 [SSUSB] Setting up USB HOST controller...
5064 11:32:50.626437 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5065 11:32:50.629473 [SSUSB] phy power-on done.
5066 11:32:50.633433 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5067 11:32:50.636893 in-header: 03 fc 01 00 00 00 00 00
5068 11:32:50.636969 in-data:
5069 11:32:50.643223 handle_proto3_response: EC response with error code: 1
5070 11:32:50.643299 SPM: pcm index = 1
5071 11:32:50.646742 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5072 11:32:50.650046 CBFS @ 21000 size 3d4000
5073 11:32:50.656644 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5074 11:32:50.660255 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5075 11:32:50.663526 CBFS: Found @ offset 1e7c0 size 1026
5076 11:32:50.670261 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5077 11:32:50.673283 SPM: binary array size = 2988
5078 11:32:50.676608 SPM: version = pcm_allinone_v1.17.2_20180829
5079 11:32:50.680020 SPM binary loaded in 32 msecs
5080 11:32:50.687650 spm_kick_im_to_fetch: ptr = 000000004021eec2
5081 11:32:50.690615 spm_kick_im_to_fetch: len = 2988
5082 11:32:50.690692 SPM: spm_kick_pcm_to_run
5083 11:32:50.694076 SPM: spm_kick_pcm_to_run done
5084 11:32:50.697345 SPM: spm_init done in 52 msecs
5085 11:32:50.700813 Root Device init finished in 505266 usecs
5086 11:32:50.704322 CPU_CLUSTER: 0 init ...
5087 11:32:50.711104 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5088 11:32:50.717718 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5089 11:32:50.717795 CBFS @ 21000 size 3d4000
5090 11:32:50.724276 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5091 11:32:50.728109 CBFS: Locating 'sspm.bin'
5092 11:32:50.731253 CBFS: Found @ offset 208c0 size 41cb
5093 11:32:50.740495 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5094 11:32:50.748429 CPU_CLUSTER: 0 init finished in 42800 usecs
5095 11:32:50.748505 Devices initialized
5096 11:32:50.751916 Show all devs... After init.
5097 11:32:50.755287 Root Device: enabled 1
5098 11:32:50.755453 CPU_CLUSTER: 0: enabled 1
5099 11:32:50.758723 CPU: 00: enabled 1
5100 11:32:50.761904 BS: BS_DEV_INIT times (ms): entry 0 run 234 exit 0
5101 11:32:50.765022 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5102 11:32:50.768550 ELOG: NV offset 0x558000 size 0x1000
5103 11:32:50.776245 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5104 11:32:50.782850 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5105 11:32:50.786477 ELOG: Event(17) added with size 13 at 2024-07-17 11:32:50 UTC
5106 11:32:50.789676 out: cmd=0x121: 03 db 21 01 00 00 00 00
5107 11:32:50.792788 in-header: 03 00 00 00 2c 00 00 00
5108 11:32:50.806478 in-data: 0e 49 00 00 00 00 00 00 02 10 00 00 06 80 00 00 c7 1f 03 00 06 80 00 00 2f 2b 10 00 06 80 00 00 a6 fc 07 00 06 80 00 00 70 af 35 00
5109 11:32:50.809926 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5110 11:32:50.812770 in-header: 03 19 00 00 08 00 00 00
5111 11:32:50.816236 in-data: a2 e0 47 00 13 00 00 00
5112 11:32:50.819630 Chrome EC: UHEPI supported
5113 11:32:50.826464 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5114 11:32:50.829845 in-header: 03 e1 00 00 08 00 00 00
5115 11:32:50.832767 in-data: 84 20 60 10 00 00 00 00
5116 11:32:50.836283 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5117 11:32:50.842848 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5118 11:32:50.846189 in-header: 03 e1 00 00 08 00 00 00
5119 11:32:50.849752 in-data: 84 20 60 10 00 00 00 00
5120 11:32:50.856035 ELOG: Event(A1) added with size 10 at 2024-07-17 11:32:50 UTC
5121 11:32:50.862742 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5122 11:32:50.866302 ELOG: Event(A0) added with size 9 at 2024-07-17 11:32:50 UTC
5123 11:32:50.869520 elog_add_boot_reason: Logged dev mode boot
5124 11:32:50.873076 Finalize devices...
5125 11:32:50.873154 Devices finalized
5126 11:32:50.879848 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
5127 11:32:50.883154 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5128 11:32:50.889575 ELOG: Event(91) added with size 10 at 2024-07-17 11:32:50 UTC
5129 11:32:50.893193 Writing coreboot table at 0xffeda000
5130 11:32:50.896194 0. 0000000000114000-000000000011efff: RAMSTAGE
5131 11:32:50.899557 1. 0000000040000000-000000004023cfff: RAMSTAGE
5132 11:32:50.906257 2. 000000004023d000-00000000545fffff: RAM
5133 11:32:50.909443 3. 0000000054600000-000000005465ffff: BL31
5134 11:32:50.913014 4. 0000000054660000-00000000ffed9fff: RAM
5135 11:32:50.916436 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5136 11:32:50.923006 6. 0000000100000000-000000013fffffff: RAM
5137 11:32:50.923082 Passing 5 GPIOs to payload:
5138 11:32:50.929692 NAME | PORT | POLARITY | VALUE
5139 11:32:50.932895 write protect | 0x00000096 | low | high
5140 11:32:50.939753 EC in RW | 0x000000b1 | high | undefined
5141 11:32:50.943087 EC interrupt | 0x00000097 | low | undefined
5142 11:32:50.946301 TPM interrupt | 0x00000099 | high | undefined
5143 11:32:50.952956 speaker enable | 0x000000af | high | undefined
5144 11:32:50.956273 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5145 11:32:50.959652 in-header: 03 f7 00 00 02 00 00 00
5146 11:32:50.959727 in-data: 04 00
5147 11:32:50.962774 Board ID: 4
5148 11:32:50.962873 ADC[3]: Raw value=1040656 ID=8
5149 11:32:50.966574 RAM code: 8
5150 11:32:50.966649 SKU ID: 16
5151 11:32:50.969671 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5152 11:32:50.973139 CBFS @ 21000 size 3d4000
5153 11:32:50.980028 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5154 11:32:50.983187 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 6985
5155 11:32:50.986282 coreboot table: 940 bytes.
5156 11:32:50.989967 IMD ROOT 0. 00000000fffff000 00001000
5157 11:32:50.993263 IMD SMALL 1. 00000000ffffe000 00001000
5158 11:32:50.996294 CONSOLE 2. 00000000fffde000 00020000
5159 11:32:51.003307 FMAP 3. 00000000fffdd000 0000047c
5160 11:32:51.006694 TIME STAMP 4. 00000000fffdc000 00000910
5161 11:32:51.009591 RAMOOPS 5. 00000000ffedc000 00100000
5162 11:32:51.013113 COREBOOT 6. 00000000ffeda000 00002000
5163 11:32:51.013188 IMD small region:
5164 11:32:51.016413 IMD ROOT 0. 00000000ffffec00 00000400
5165 11:32:51.022873 VBOOT WORK 1. 00000000ffffeb00 00000100
5166 11:32:51.026649 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5167 11:32:51.029683 VPD 3. 00000000ffffea60 0000006c
5168 11:32:51.033274 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5169 11:32:51.039797 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5170 11:32:51.043127 in-header: 03 e1 00 00 08 00 00 00
5171 11:32:51.046379 in-data: 84 20 60 10 00 00 00 00
5172 11:32:51.050041 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5173 11:32:51.053105 CBFS @ 21000 size 3d4000
5174 11:32:51.059788 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5175 11:32:51.063196 CBFS: Locating 'fallback/payload'
5176 11:32:51.070294 CBFS: Found @ offset dc040 size 439a0
5177 11:32:51.158258 read SPI 0xfd078 0x439a0: 84380 us, 3281 KB/s, 26.248 Mbps
5178 11:32:51.161259 Checking segment from ROM address 0x0000000040003a00
5179 11:32:51.168086 Checking segment from ROM address 0x0000000040003a1c
5180 11:32:51.171721 Loading segment from ROM address 0x0000000040003a00
5181 11:32:51.175078 code (compression=0)
5182 11:32:51.184743 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5183 11:32:51.191691 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5184 11:32:51.194743 it's not compressed!
5185 11:32:51.198306 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5186 11:32:51.204797 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5187 11:32:51.212330 Loading segment from ROM address 0x0000000040003a1c
5188 11:32:51.215709 Entry Point 0x0000000080000000
5189 11:32:51.215785 Loaded segments
5190 11:32:51.222439 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5191 11:32:51.225989 Jumping to boot code at 0000000080000000(00000000ffeda000)
5192 11:32:51.235829 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5193 11:32:51.239588 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5194 11:32:51.242644 CBFS @ 21000 size 3d4000
5195 11:32:51.249324 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5196 11:32:51.249396 CBFS: Locating 'fallback/bl31'
5197 11:32:51.252812 CBFS: Found @ offset 36dc0 size 5820
5198 11:32:51.266502 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5199 11:32:51.269969 Checking segment from ROM address 0x0000000040003a00
5200 11:32:51.276761 Checking segment from ROM address 0x0000000040003a1c
5201 11:32:51.279918 Loading segment from ROM address 0x0000000040003a00
5202 11:32:51.283405 code (compression=1)
5203 11:32:51.289609 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5204 11:32:51.299578 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5205 11:32:51.299655 using LZMA
5206 11:32:51.308285 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5207 11:32:51.315241 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5208 11:32:51.318609 Loading segment from ROM address 0x0000000040003a1c
5209 11:32:51.321724 Entry Point 0x0000000054601000
5210 11:32:51.321816 Loaded segments
5211 11:32:51.325512 NOTICE: MT8183 bl31_setup
5212 11:32:51.332027 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5213 11:32:51.335703 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5214 11:32:51.338886 INFO: [DEVAPC] dump DEVAPC registers:
5215 11:32:51.349118 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5216 11:32:51.355350 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5217 11:32:51.362208 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5218 11:32:51.371992 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5219 11:32:51.378763 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5220 11:32:51.388712 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5221 11:32:51.395451 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5222 11:32:51.405635 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5223 11:32:51.412455 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5224 11:32:51.422420 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5225 11:32:51.429147 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5226 11:32:51.438979 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5227 11:32:51.445962 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5228 11:32:51.452496 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5229 11:32:51.459231 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5230 11:32:51.468978 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5231 11:32:51.476139 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5232 11:32:51.482532 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5233 11:32:51.489361 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5234 11:32:51.495810 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5235 11:32:51.505808 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5236 11:32:51.512332 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5237 11:32:51.516056 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5238 11:32:51.519258 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5239 11:32:51.522316 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5240 11:32:51.525676 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5241 11:32:51.529168 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5242 11:32:51.535829 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5243 11:32:51.539183 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5244 11:32:51.542965 WARNING: region 0:
5245 11:32:51.545932 WARNING: apc:0x168, sa:0x0, ea:0xfff
5246 11:32:51.546008 WARNING: region 1:
5247 11:32:51.549380 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5248 11:32:51.552402 WARNING: region 2:
5249 11:32:51.556354 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5250 11:32:51.556430 WARNING: region 3:
5251 11:32:51.563306 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5252 11:32:51.563382 WARNING: region 4:
5253 11:32:51.566004 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5254 11:32:51.569271 WARNING: region 5:
5255 11:32:51.572529 WARNING: apc:0x0, sa:0x0, ea:0x0
5256 11:32:51.572604 WARNING: region 6:
5257 11:32:51.576166 WARNING: apc:0x0, sa:0x0, ea:0x0
5258 11:32:51.579055 WARNING: region 7:
5259 11:32:51.579131 WARNING: apc:0x0, sa:0x0, ea:0x0
5260 11:32:51.589334 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5261 11:32:51.589410 INFO: SPM: enable SPMC mode
5262 11:32:51.592539 NOTICE: spm_boot_init() start
5263 11:32:51.595822 NOTICE: spm_boot_init() end
5264 11:32:51.599368 INFO: BL31: Initializing runtime services
5265 11:32:51.606024 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5266 11:32:51.609605 INFO: BL31: Preparing for EL3 exit to normal world
5267 11:32:51.612712 INFO: Entry point address = 0x80000000
5268 11:32:51.615822 INFO: SPSR = 0x8
5269 11:32:51.638442
5270 11:32:51.638527
5271 11:32:51.638587
5272 11:32:51.639023 end: 2.2.3 depthcharge-start (duration 00:00:23) [common]
5273 11:32:51.639112 start: 2.2.4 bootloader-commands (timeout 00:04:28) [common]
5274 11:32:51.639184 Setting prompt string to ['jacuzzi:']
5275 11:32:51.639247 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:28)
5276 11:32:51.641885 Starting depthcharge on Juniper...
5277 11:32:51.641959
5278 11:32:51.645038 vboot_handoff: creating legacy vboot_handoff structure
5279 11:32:51.645113
5280 11:32:51.648264 ec_init(0): CrosEC protocol v3 supported (544, 544)
5281 11:32:51.648339
5282 11:32:51.651848 Wipe memory regions:
5283 11:32:51.651923
5284 11:32:51.654739 [0x00000040000000, 0x00000054600000)
5285 11:32:51.697665
5286 11:32:51.697742 [0x00000054660000, 0x00000080000000)
5287 11:32:51.788961
5288 11:32:51.789054 [0x000000811994a0, 0x000000ffeda000)
5289 11:32:52.048314
5290 11:32:52.048448 [0x00000100000000, 0x00000140000000)
5291 11:32:52.181031
5292 11:32:52.184462 Initializing XHCI USB controller at 0x11200000.
5293 11:32:52.207272
5294 11:32:52.210669 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5295 11:32:52.210747
5296 11:32:52.210806
5297 11:32:52.211059 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5298 11:32:52.211129 Sending line: 'tftpboot 192.168.201.1 14864595/tftp-deploy-ebab05c9/kernel/image.itb 14864595/tftp-deploy-ebab05c9/kernel/cmdline '
5300 11:32:52.311566 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5301 11:32:52.311643 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:27)
5302 11:32:52.315782 jacuzzi: tftpboot 192.168.201.1 14864595/tftp-deploy-ebab05c9/kernel/image.itp-deploy-ebab05c9/kernel/cmdline
5303 11:32:52.315857
5304 11:32:52.315913 Waiting for link
5305 11:32:52.867808
5306 11:32:52.867922 R8152: Initializing
5307 11:32:52.867982
5308 11:32:52.871420 Version 9 (ocp_data = 6010)
5309 11:32:52.871497
5310 11:32:52.874432 R8152: Done initializing
5311 11:32:52.874507
5312 11:32:52.874565 Adding net device
5313 11:32:53.053219
5314 11:32:53.053342 R8152: Initializing
5315 11:32:53.053401
5316 11:32:53.056372 Version 9 (ocp_data = 6010)
5317 11:32:53.056449
5318 11:32:53.059884 R8152: Done initializing
5319 11:32:53.059966
5320 11:32:53.062936 net_add_device: Attemp to include the same device
5321 11:32:53.449565
5322 11:32:53.449678 done.
5323 11:32:53.449737
5324 11:32:53.449791 MAC: 00:e0:4c:68:03:2b
5325 11:32:53.449843
5326 11:32:53.452743 Sending DHCP discover... done.
5327 11:32:53.452819
5328 11:32:53.456259 Waiting for reply... done.
5329 11:32:53.456336
5330 11:32:53.459399 Sending DHCP request... done.
5331 11:32:53.459476
5332 11:32:53.462773 Waiting for reply... done.
5333 11:32:53.462847
5334 11:32:53.462905 My ip is 192.168.201.17
5335 11:32:53.462959
5336 11:32:53.466124 The DHCP server ip is 192.168.201.1
5337 11:32:53.466199
5338 11:32:53.472676 TFTP server IP predefined by user: 192.168.201.1
5339 11:32:53.472752
5340 11:32:53.479433 Bootfile predefined by user: 14864595/tftp-deploy-ebab05c9/kernel/image.itb
5341 11:32:53.479509
5342 11:32:53.479567 Sending tftp read request... done.
5343 11:32:53.479621
5344 11:32:53.486077 Waiting for the transfer...
5345 11:32:53.486154
5346 11:32:53.748380 00000000 ################################################################
5347 11:32:53.748493
5348 11:32:54.007238 00080000 ################################################################
5349 11:32:54.007359
5350 11:32:54.279851 00100000 ################################################################
5351 11:32:54.279966
5352 11:32:54.549441 00180000 ################################################################
5353 11:32:54.549560
5354 11:32:54.843549 00200000 ################################################################
5355 11:32:54.843661
5356 11:32:55.126855 00280000 ################################################################
5357 11:32:55.126969
5358 11:32:55.407651 00300000 ################################################################
5359 11:32:55.407767
5360 11:32:55.677781 00380000 ################################################################
5361 11:32:55.677894
5362 11:32:55.967584 00400000 ################################################################
5363 11:32:55.967700
5364 11:32:56.251075 00480000 ################################################################
5365 11:32:56.251192
5366 11:32:56.523730 00500000 ################################################################
5367 11:32:56.523843
5368 11:32:56.819420 00580000 ################################################################
5369 11:32:56.819536
5370 11:32:57.093719 00600000 ################################################################
5371 11:32:57.093835
5372 11:32:57.384588 00680000 ################################################################
5373 11:32:57.384761
5374 11:32:57.671984 00700000 ################################################################
5375 11:32:57.672099
5376 11:32:57.966755 00780000 ################################################################
5377 11:32:57.966873
5378 11:32:58.267104 00800000 ################################################################
5379 11:32:58.267244
5380 11:32:58.552990 00880000 ################################################################
5381 11:32:58.553102
5382 11:32:58.823300 00900000 ################################################################
5383 11:32:58.823414
5384 11:32:59.104575 00980000 ################################################################
5385 11:32:59.104719
5386 11:32:59.404112 00a00000 ################################################################
5387 11:32:59.404225
5388 11:32:59.696798 00a80000 ################################################################
5389 11:32:59.696913
5390 11:32:59.973212 00b00000 ################################################################
5391 11:32:59.973364
5392 11:33:00.262474 00b80000 ################################################################
5393 11:33:00.262593
5394 11:33:00.545712 00c00000 ################################################################
5395 11:33:00.545821
5396 11:33:00.818166 00c80000 ################################################################
5397 11:33:00.818279
5398 11:33:01.112696 00d00000 ################################################################
5399 11:33:01.112836
5400 11:33:01.409617 00d80000 ################################################################
5401 11:33:01.409732
5402 11:33:01.687738 00e00000 ################################################################
5403 11:33:01.687874
5404 11:33:01.982444 00e80000 ################################################################
5405 11:33:01.982561
5406 11:33:02.272073 00f00000 ################################################################
5407 11:33:02.272191
5408 11:33:02.574487 00f80000 ################################################################
5409 11:33:02.574604
5410 11:33:02.871079 01000000 ################################################################
5411 11:33:02.871197
5412 11:33:03.168632 01080000 ################################################################
5413 11:33:03.168744
5414 11:33:03.467661 01100000 ################################################################
5415 11:33:03.467784
5416 11:33:03.753914 01180000 ################################################################
5417 11:33:03.754029
5418 11:33:04.048152 01200000 ################################################################
5419 11:33:04.048268
5420 11:33:04.349004 01280000 ################################################################
5421 11:33:04.349115
5422 11:33:04.635229 01300000 ################################################################
5423 11:33:04.635344
5424 11:33:04.913330 01380000 ################################################################
5425 11:33:04.913442
5426 11:33:05.184968 01400000 ################################################################
5427 11:33:05.185085
5428 11:33:05.467238 01480000 ################################################################
5429 11:33:05.467354
5430 11:33:05.759479 01500000 ################################################################
5431 11:33:05.759595
5432 11:33:06.044663 01580000 ################################################################
5433 11:33:06.044774
5434 11:33:06.303197 01600000 ################################################################
5435 11:33:06.303310
5436 11:33:06.563412 01680000 ################################################################
5437 11:33:06.563529
5438 11:33:06.863016 01700000 ################################################################
5439 11:33:06.863132
5440 11:33:07.170011 01780000 ################################################################
5441 11:33:07.170122
5442 11:33:07.468825 01800000 ################################################################
5443 11:33:07.468940
5444 11:33:07.763747 01880000 ################################################################
5445 11:33:07.763863
5446 11:33:08.055993 01900000 ################################################################
5447 11:33:08.056108
5448 11:33:08.354132 01980000 ################################################################
5449 11:33:08.354246
5450 11:33:08.619453 01a00000 ################################################################
5451 11:33:08.619566
5452 11:33:08.909504 01a80000 ################################################################
5453 11:33:08.909616
5454 11:33:09.184915 01b00000 ################################################################
5455 11:33:09.185024
5456 11:33:09.485270 01b80000 ################################################################
5457 11:33:09.485408
5458 11:33:09.784558 01c00000 ################################################################
5459 11:33:09.784670
5460 11:33:10.074986 01c80000 ################################################################
5461 11:33:10.075101
5462 11:33:10.370263 01d00000 ################################################################
5463 11:33:10.370374
5464 11:33:10.671537 01d80000 ################################################################
5465 11:33:10.671651
5466 11:33:10.936033 01e00000 ################################################################
5467 11:33:10.936141
5468 11:33:11.193267 01e80000 ################################################################
5469 11:33:11.193391
5470 11:33:11.479984 01f00000 ################################################################
5471 11:33:11.480098
5472 11:33:11.754855 01f80000 ################################################################
5473 11:33:11.754971
5474 11:33:12.053114 02000000 ################################################################
5475 11:33:12.053281
5476 11:33:12.338993 02080000 ################################################################
5477 11:33:12.339109
5478 11:33:12.629243 02100000 ################################################################
5479 11:33:12.629358
5480 11:33:12.911713 02180000 ################################################################
5481 11:33:12.911867
5482 11:33:13.202425 02200000 ################################################################
5483 11:33:13.202540
5484 11:33:13.499814 02280000 ################################################################
5485 11:33:13.499929
5486 11:33:13.764565 02300000 ################################################################
5487 11:33:13.764673
5488 11:33:14.036059 02380000 ################################################################
5489 11:33:14.036171
5490 11:33:14.301785 02400000 ################################################################
5491 11:33:14.301901
5492 11:33:14.573904 02480000 ################################################################
5493 11:33:14.574020
5494 11:33:14.846555 02500000 ################################################################
5495 11:33:14.846678
5496 11:33:15.139476 02580000 ################################################################
5497 11:33:15.139593
5498 11:33:15.504220 02600000 ################################################################
5499 11:33:15.504689
5500 11:33:15.858410 02680000 ################################################################
5501 11:33:15.858535
5502 11:33:16.146724 02700000 ################################################################
5503 11:33:16.146836
5504 11:33:16.440929 02780000 ################################################################
5505 11:33:16.441050
5506 11:33:16.742480 02800000 ################################################################
5507 11:33:16.742636
5508 11:33:17.048051 02880000 ################################################################
5509 11:33:17.048188
5510 11:33:17.355727 02900000 ################################################################
5511 11:33:17.355845
5512 11:33:17.661496 02980000 ################################################################
5513 11:33:17.661620
5514 11:33:17.966129 02a00000 ################################################################
5515 11:33:17.966252
5516 11:33:18.258169 02a80000 ################################################################
5517 11:33:18.258294
5518 11:33:18.537089 02b00000 ################################################################
5519 11:33:18.537238
5520 11:33:18.806051 02b80000 ################################################################
5521 11:33:18.806172
5522 11:33:19.106992 02c00000 ################################################################
5523 11:33:19.107137
5524 11:33:19.399472 02c80000 ################################################################
5525 11:33:19.399599
5526 11:33:19.687856 02d00000 ################################################################
5527 11:33:19.687981
5528 11:33:19.962744 02d80000 ################################################################
5529 11:33:19.962868
5530 11:33:20.229117 02e00000 ################################################################
5531 11:33:20.229274
5532 11:33:20.498247 02e80000 ################################################################
5533 11:33:20.498361
5534 11:33:20.753172 02f00000 ################################################################
5535 11:33:20.753326
5536 11:33:21.004846 02f80000 ################################################################
5537 11:33:21.004957
5538 11:33:21.278215 03000000 ################################################################
5539 11:33:21.278329
5540 11:33:21.541974 03080000 ################################################################
5541 11:33:21.542185
5542 11:33:21.835853 03100000 ################################################################
5543 11:33:21.835969
5544 11:33:22.128434 03180000 ################################################################
5545 11:33:22.128549
5546 11:33:22.415272 03200000 ################################################################
5547 11:33:22.415391
5548 11:33:22.692296 03280000 ################################################################
5549 11:33:22.692420
5550 11:33:22.966235 03300000 ################################################################
5551 11:33:22.966358
5552 11:33:23.243566 03380000 ################################################################
5553 11:33:23.243689
5554 11:33:23.507640 03400000 ################################################################
5555 11:33:23.507761
5556 11:33:23.774769 03480000 ################################################################
5557 11:33:23.774893
5558 11:33:24.064436 03500000 ################################################################
5559 11:33:24.064563
5560 11:33:24.340631 03580000 ################################################################
5561 11:33:24.340754
5562 11:33:24.626415 03600000 ################################################################
5563 11:33:24.626539
5564 11:33:24.898971 03680000 ################################################################
5565 11:33:24.899099
5566 11:33:25.156717 03700000 ################################################################
5567 11:33:25.156864
5568 11:33:25.430175 03780000 ################################################################
5569 11:33:25.430320
5570 11:33:25.686249 03800000 ################################################################
5571 11:33:25.686370
5572 11:33:25.949040 03880000 ################################################################
5573 11:33:25.949165
5574 11:33:26.210870 03900000 ################################################################
5575 11:33:26.210995
5576 11:33:26.471851 03980000 ################################################################
5577 11:33:26.471969
5578 11:33:26.735746 03a00000 ################################################################
5579 11:33:26.735859
5580 11:33:27.022482 03a80000 ################################################################
5581 11:33:27.022605
5582 11:33:27.300276 03b00000 ################################################################
5583 11:33:27.300403
5584 11:33:27.592402 03b80000 ################################################################
5585 11:33:27.592522
5586 11:33:27.880498 03c00000 ################################################################
5587 11:33:27.880619
5588 11:33:28.173938 03c80000 ################################################################
5589 11:33:28.174058
5590 11:33:28.462150 03d00000 ################################################################
5591 11:33:28.462273
5592 11:33:28.734369 03d80000 ################################################################
5593 11:33:28.734487
5594 11:33:28.894703 03e00000 ##################################### done.
5595 11:33:28.894816
5596 11:33:28.898061 The bootfile was 65311718 bytes long.
5597 11:33:28.898138
5598 11:33:28.901464 Sending tftp read request... done.
5599 11:33:28.901551
5600 11:33:28.904499 Waiting for the transfer...
5601 11:33:28.904575
5602 11:33:28.908170 00000000 # done.
5603 11:33:28.908248
5604 11:33:28.914923 Command line loaded dynamically from TFTP file: 14864595/tftp-deploy-ebab05c9/kernel/cmdline
5605 11:33:28.915001
5606 11:33:28.931498 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5607 11:33:28.931577
5608 11:33:28.931636 Loading FIT.
5609 11:33:28.931692
5610 11:33:28.934759 Image ramdisk-1 has 52133686 bytes.
5611 11:33:28.934836
5612 11:33:28.938175 Image fdt-1 has 57695 bytes.
5613 11:33:28.938251
5614 11:33:28.941310 Image kernel-1 has 13118294 bytes.
5615 11:33:28.941387
5616 11:33:28.951424 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5617 11:33:28.951501
5618 11:33:28.961570 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5619 11:33:28.961648
5620 11:33:28.968306 Choosing best match conf-1 for compat google,juniper-sku16.
5621 11:33:28.972063
5622 11:33:28.976537 Connected to device vid:did:rid of 1ae0:0028:00
5623 11:33:28.984855
5624 11:33:28.988293 tpm_get_response: command 0x17b, return code 0x0
5625 11:33:28.988370
5626 11:33:28.991680 tpm_cleanup: add release locality here.
5627 11:33:28.991756
5628 11:33:28.994712 Shutting down all USB controllers.
5629 11:33:28.994789
5630 11:33:28.998212 Removing current net device
5631 11:33:28.998312
5632 11:33:29.001584 Exiting depthcharge with code 4 at timestamp: 53634113
5633 11:33:29.001660
5634 11:33:29.004845 LZMA decompressing kernel-1 to 0x80193568
5635 11:33:29.004921
5636 11:33:29.008373 LZMA decompressing kernel-1 to 0x40000000
5637 11:33:30.873913
5638 11:33:30.874034 jumping to kernel
5639 11:33:30.874563 end: 2.2.4 bootloader-commands (duration 00:00:39) [common]
5640 11:33:30.874664 start: 2.2.5 auto-login-action (timeout 00:03:49) [common]
5641 11:33:30.874734 Setting prompt string to ['Linux version [0-9]']
5642 11:33:30.874797 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5643 11:33:30.874860 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5644 11:33:30.948803
5645 11:33:30.951933 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5646 11:33:30.955730 start: 2.2.5.1 login-action (timeout 00:03:49) [common]
5647 11:33:30.955823 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5648 11:33:30.955892 Setting prompt string to []
5649 11:33:30.955965 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5650 11:33:30.956032 Using line separator: #'\n'#
5651 11:33:30.956087 No login prompt set.
5652 11:33:30.956143 Parsing kernel messages
5653 11:33:30.956193 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5654 11:33:30.956290 [login-action] Waiting for messages, (timeout 00:03:49)
5655 11:33:30.956350 Waiting using forced prompt support (timeout 00:01:54)
5656 11:33:30.975728 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j270465-arm64-gcc-12-defconfig-arm64-chromebook-hjsv4) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Wed Jul 17 11:18:13 UTC 2024
5657 11:33:30.979122 [ 0.000000] random: crng init done
5658 11:33:30.981787 [ 0.000000] Machine model: Google juniper sku16 board
5659 11:33:30.985493 [ 0.000000] efi: UEFI not found.
5660 11:33:30.995233 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5661 11:33:31.001890 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5662 11:33:31.008783 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5663 11:33:31.014966 [ 0.000000] printk: bootconsole [mtk8250] enabled
5664 11:33:31.022644 [ 0.000000] NUMA: No NUMA configuration found
5665 11:33:31.029171 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5666 11:33:31.035699 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5667 11:33:31.035776 [ 0.000000] Zone ranges:
5668 11:33:31.042658 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5669 11:33:31.045981 [ 0.000000] DMA32 empty
5670 11:33:31.052655 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5671 11:33:31.056253 [ 0.000000] Movable zone start for each node
5672 11:33:31.059602 [ 0.000000] Early memory node ranges
5673 11:33:31.066030 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5674 11:33:31.072504 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5675 11:33:31.079525 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5676 11:33:31.085780 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5677 11:33:31.092481 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5678 11:33:31.099233 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5679 11:33:31.119140 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5680 11:33:31.125945 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5681 11:33:31.132621 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5682 11:33:31.135686 [ 0.000000] psci: probing for conduit method from DT.
5683 11:33:31.142694 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5684 11:33:31.145761 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5685 11:33:31.152706 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5686 11:33:31.155949 [ 0.000000] psci: SMC Calling Convention v1.1
5687 11:33:31.162702 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5688 11:33:31.165874 [ 0.000000] Detected VIPT I-cache on CPU0
5689 11:33:31.172819 [ 0.000000] CPU features: detected: GIC system register CPU interface
5690 11:33:31.179195 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5691 11:33:31.186062 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5692 11:33:31.189533 [ 0.000000] CPU features: detected: ARM erratum 845719
5693 11:33:31.196139 [ 0.000000] alternatives: applying boot alternatives
5694 11:33:31.199766 [ 0.000000] Fallback order for Node 0: 0
5695 11:33:31.206151 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5696 11:33:31.209347 [ 0.000000] Policy zone: Normal
5697 11:33:31.229327 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
5698 11:33:31.239454 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5699 11:33:31.249475 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5700 11:33:31.256375 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5701 11:33:31.266115 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5702 11:33:31.269357 <6>[ 0.000000] software IO TLB: area num 8.
5703 11:33:31.294249 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5704 11:33:31.352430 <6>[ 0.000000] Memory: 3864164K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 294300K reserved, 32768K cma-reserved)
5705 11:33:31.358886 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5706 11:33:31.365740 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5707 11:33:31.368904 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5708 11:33:31.375764 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5709 11:33:31.382234 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5710 11:33:31.385658 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5711 11:33:31.395696 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5712 11:33:31.402262 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5713 11:33:31.405785 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5714 11:33:31.417285 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5715 11:33:31.423970 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5716 11:33:31.427349 <6>[ 0.000000] GICv3: 640 SPIs implemented
5717 11:33:31.430956 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5718 11:33:31.437273 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5719 11:33:31.440649 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5720 11:33:31.447504 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5721 11:33:31.457340 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5722 11:33:31.470782 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5723 11:33:31.477391 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5724 11:33:31.489376 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5725 11:33:31.502570 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5726 11:33:31.509126 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5727 11:33:31.515968 <6>[ 0.009478] Console: colour dummy device 80x25
5728 11:33:31.519468 <6>[ 0.014510] printk: console [tty1] enabled
5729 11:33:31.529671 <6>[ 0.018903] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5730 11:33:31.536149 <6>[ 0.029367] pid_max: default: 32768 minimum: 301
5731 11:33:31.539390 <6>[ 0.034248] LSM: Security Framework initializing
5732 11:33:31.549404 <6>[ 0.039163] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5733 11:33:31.555861 <6>[ 0.046786] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5734 11:33:31.562657 <4>[ 0.055664] cacheinfo: Unable to detect cache hierarchy for CPU 0
5735 11:33:31.572556 <6>[ 0.062289] cblist_init_generic: Setting adjustable number of callback queues.
5736 11:33:31.576079 <6>[ 0.069734] cblist_init_generic: Setting shift to 3 and lim to 1.
5737 11:33:31.586251 <6>[ 0.076087] cblist_init_generic: Setting adjustable number of callback queues.
5738 11:33:31.592616 <6>[ 0.083533] cblist_init_generic: Setting shift to 3 and lim to 1.
5739 11:33:31.595978 <6>[ 0.089931] rcu: Hierarchical SRCU implementation.
5740 11:33:31.603055 <6>[ 0.094957] rcu: Max phase no-delay instances is 1000.
5741 11:33:31.609355 <6>[ 0.102877] EFI services will not be available.
5742 11:33:31.612799 <6>[ 0.107826] smp: Bringing up secondary CPUs ...
5743 11:33:31.622888 <6>[ 0.113062] Detected VIPT I-cache on CPU1
5744 11:33:31.629732 <4>[ 0.113109] cacheinfo: Unable to detect cache hierarchy for CPU 1
5745 11:33:31.636592 <6>[ 0.113117] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5746 11:33:31.643118 <6>[ 0.113149] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5747 11:33:31.646495 <6>[ 0.113630] Detected VIPT I-cache on CPU2
5748 11:33:31.653095 <4>[ 0.113664] cacheinfo: Unable to detect cache hierarchy for CPU 2
5749 11:33:31.659648 <6>[ 0.113668] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5750 11:33:31.666340 <6>[ 0.113680] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5751 11:33:31.669512 <6>[ 0.114126] Detected VIPT I-cache on CPU3
5752 11:33:31.676174 <4>[ 0.114156] cacheinfo: Unable to detect cache hierarchy for CPU 3
5753 11:33:31.683009 <6>[ 0.114161] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5754 11:33:31.689616 <6>[ 0.114173] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5755 11:33:31.696307 <6>[ 0.114747] CPU features: detected: Spectre-v2
5756 11:33:31.699373 <6>[ 0.114757] CPU features: detected: Spectre-BHB
5757 11:33:31.706281 <6>[ 0.114761] CPU features: detected: ARM erratum 858921
5758 11:33:31.709541 <6>[ 0.114766] Detected VIPT I-cache on CPU4
5759 11:33:31.716087 <4>[ 0.114814] cacheinfo: Unable to detect cache hierarchy for CPU 4
5760 11:33:31.723271 <6>[ 0.114821] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5761 11:33:31.729653 <6>[ 0.114829] arch_timer: Enabling local workaround for ARM erratum 858921
5762 11:33:31.736391 <6>[ 0.114840] arch_timer: CPU4: Trapping CNTVCT access
5763 11:33:31.742717 <6>[ 0.114848] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5764 11:33:31.745879 <6>[ 0.115333] Detected VIPT I-cache on CPU5
5765 11:33:31.752949 <4>[ 0.115372] cacheinfo: Unable to detect cache hierarchy for CPU 5
5766 11:33:31.759883 <6>[ 0.115378] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5767 11:33:31.766188 <6>[ 0.115385] arch_timer: Enabling local workaround for ARM erratum 858921
5768 11:33:31.772805 <6>[ 0.115391] arch_timer: CPU5: Trapping CNTVCT access
5769 11:33:31.779270 <6>[ 0.115396] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5770 11:33:31.782626 <6>[ 0.115834] Detected VIPT I-cache on CPU6
5771 11:33:31.789038 <4>[ 0.115879] cacheinfo: Unable to detect cache hierarchy for CPU 6
5772 11:33:31.795666 <6>[ 0.115885] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5773 11:33:31.802761 <6>[ 0.115892] arch_timer: Enabling local workaround for ARM erratum 858921
5774 11:33:31.809352 <6>[ 0.115898] arch_timer: CPU6: Trapping CNTVCT access
5775 11:33:31.816000 <6>[ 0.115903] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5776 11:33:31.819151 <6>[ 0.116435] Detected VIPT I-cache on CPU7
5777 11:33:31.825974 <4>[ 0.116479] cacheinfo: Unable to detect cache hierarchy for CPU 7
5778 11:33:31.832466 <6>[ 0.116485] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5779 11:33:31.839308 <6>[ 0.116492] arch_timer: Enabling local workaround for ARM erratum 858921
5780 11:33:31.846013 <6>[ 0.116498] arch_timer: CPU7: Trapping CNTVCT access
5781 11:33:31.852411 <6>[ 0.116503] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5782 11:33:31.855880 <6>[ 0.116552] smp: Brought up 1 node, 8 CPUs
5783 11:33:31.862668 <6>[ 0.355460] SMP: Total of 8 processors activated.
5784 11:33:31.866029 <6>[ 0.360395] CPU features: detected: 32-bit EL0 Support
5785 11:33:31.872497 <6>[ 0.365773] CPU features: detected: 32-bit EL1 Support
5786 11:33:31.879338 <6>[ 0.371140] CPU features: detected: CRC32 instructions
5787 11:33:31.882717 <6>[ 0.376565] CPU: All CPU(s) started at EL2
5788 11:33:31.889143 <6>[ 0.380903] alternatives: applying system-wide alternatives
5789 11:33:31.892967 <6>[ 0.389099] devtmpfs: initialized
5790 11:33:31.907948 <6>[ 0.398033] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5791 11:33:31.917740 <6>[ 0.407981] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5792 11:33:31.921126 <6>[ 0.415705] pinctrl core: initialized pinctrl subsystem
5793 11:33:31.929351 <6>[ 0.422824] DMI not present or invalid.
5794 11:33:31.935997 <6>[ 0.427193] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5795 11:33:31.942874 <6>[ 0.434081] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5796 11:33:31.949454 <6>[ 0.441592] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5797 11:33:31.959423 <6>[ 0.449761] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5798 11:33:31.966146 <6>[ 0.457908] audit: initializing netlink subsys (disabled)
5799 11:33:31.972884 <5>[ 0.463591] audit: type=2000 audit(0.328:1): state=initialized audit_enabled=0 res=1
5800 11:33:31.979298 <6>[ 0.464559] thermal_sys: Registered thermal governor 'step_wise'
5801 11:33:31.985962 <6>[ 0.471542] thermal_sys: Registered thermal governor 'power_allocator'
5802 11:33:31.989480 <6>[ 0.477790] cpuidle: using governor menu
5803 11:33:31.996172 <6>[ 0.488737] NET: Registered PF_QIPCRTR protocol family
5804 11:33:32.002958 <6>[ 0.494217] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5805 11:33:32.009484 <6>[ 0.501310] ASID allocator initialised with 32768 entries
5806 11:33:32.012705 <6>[ 0.508096] Serial: AMBA PL011 UART driver
5807 11:33:32.025896 <4>[ 0.519451] Trying to register duplicate clock ID: 113
5808 11:33:32.085887 <6>[ 0.576179] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5809 11:33:32.100249 <6>[ 0.590589] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5810 11:33:32.103684 <6>[ 0.600367] KASLR enabled
5811 11:33:32.118061 <6>[ 0.608310] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5812 11:33:32.125028 <6>[ 0.615313] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5813 11:33:32.131419 <6>[ 0.621789] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5814 11:33:32.138339 <6>[ 0.628780] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5815 11:33:32.144747 <6>[ 0.635254] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5816 11:33:32.151865 <6>[ 0.642243] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5817 11:33:32.158691 <6>[ 0.648717] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5818 11:33:32.164879 <6>[ 0.655706] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5819 11:33:32.168419 <6>[ 0.663238] ACPI: Interpreter disabled.
5820 11:33:32.178137 <6>[ 0.671253] iommu: Default domain type: Translated
5821 11:33:32.184677 <6>[ 0.676362] iommu: DMA domain TLB invalidation policy: strict mode
5822 11:33:32.188015 <5>[ 0.683014] SCSI subsystem initialized
5823 11:33:32.194722 <6>[ 0.687475] usbcore: registered new interface driver usbfs
5824 11:33:32.201169 <6>[ 0.693200] usbcore: registered new interface driver hub
5825 11:33:32.204476 <6>[ 0.698740] usbcore: registered new device driver usb
5826 11:33:32.211651 <6>[ 0.705066] pps_core: LinuxPPS API ver. 1 registered
5827 11:33:32.221613 <6>[ 0.710250] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5828 11:33:32.225068 <6>[ 0.719577] PTP clock support registered
5829 11:33:32.228119 <6>[ 0.723830] EDAC MC: Ver: 3.0.0
5830 11:33:32.235818 <6>[ 0.729490] FPGA manager framework
5831 11:33:32.239333 <6>[ 0.733171] Advanced Linux Sound Architecture Driver Initialized.
5832 11:33:32.243118 <6>[ 0.739911] vgaarb: loaded
5833 11:33:32.249631 <6>[ 0.743034] clocksource: Switched to clocksource arch_sys_counter
5834 11:33:32.256625 <5>[ 0.749463] VFS: Disk quotas dquot_6.6.0
5835 11:33:32.263310 <6>[ 0.753637] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5836 11:33:32.266407 <6>[ 0.760811] pnp: PnP ACPI: disabled
5837 11:33:32.274485 <6>[ 0.767695] NET: Registered PF_INET protocol family
5838 11:33:32.280914 <6>[ 0.772921] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5839 11:33:32.292804 <6>[ 0.782831] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5840 11:33:32.299824 <6>[ 0.791583] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5841 11:33:32.309364 <6>[ 0.799534] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5842 11:33:32.315902 <6>[ 0.807766] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5843 11:33:32.322739 <6>[ 0.815860] TCP: Hash tables configured (established 32768 bind 32768)
5844 11:33:32.332692 <6>[ 0.822688] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5845 11:33:32.339419 <6>[ 0.829661] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5846 11:33:32.346355 <6>[ 0.837142] NET: Registered PF_UNIX/PF_LOCAL protocol family
5847 11:33:32.349754 <6>[ 0.843263] RPC: Registered named UNIX socket transport module.
5848 11:33:32.356028 <6>[ 0.849407] RPC: Registered udp transport module.
5849 11:33:32.359627 <6>[ 0.854333] RPC: Registered tcp transport module.
5850 11:33:32.365987 <6>[ 0.859256] RPC: Registered tcp NFSv4.1 backchannel transport module.
5851 11:33:32.372888 <6>[ 0.865911] PCI: CLS 0 bytes, default 64
5852 11:33:32.376241 <6>[ 0.870203] Unpacking initramfs...
5853 11:33:32.389493 <6>[ 0.879701] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5854 11:33:32.399418 <6>[ 0.888323] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5855 11:33:32.402899 <6>[ 0.897177] kvm [1]: IPA Size Limit: 40 bits
5856 11:33:32.410089 <6>[ 0.903501] kvm [1]: vgic-v2@c420000
5857 11:33:32.413483 <6>[ 0.907317] kvm [1]: GIC system register CPU interface enabled
5858 11:33:32.420169 <6>[ 0.913494] kvm [1]: vgic interrupt IRQ18
5859 11:33:32.423190 <6>[ 0.917862] kvm [1]: Hyp mode initialized successfully
5860 11:33:32.430645 <5>[ 0.924119] Initialise system trusted keyrings
5861 11:33:32.437210 <6>[ 0.928948] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5862 11:33:32.445380 <6>[ 0.938844] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5863 11:33:32.452065 <5>[ 0.945365] NFS: Registering the id_resolver key type
5864 11:33:32.455692 <5>[ 0.950675] Key type id_resolver registered
5865 11:33:32.461883 <5>[ 0.955087] Key type id_legacy registered
5866 11:33:32.468643 <6>[ 0.959394] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5867 11:33:32.475355 <6>[ 0.966339] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5868 11:33:32.482144 <6>[ 0.974153] 9p: Installing v9fs 9p2000 file system support
5869 11:33:32.509649 <5>[ 1.003163] Key type asymmetric registered
5870 11:33:32.513112 <5>[ 1.007509] Asymmetric key parser 'x509' registered
5871 11:33:32.523128 <6>[ 1.012669] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5872 11:33:32.526228 <6>[ 1.020287] io scheduler mq-deadline registered
5873 11:33:32.529692 <6>[ 1.025042] io scheduler kyber registered
5874 11:33:32.552134 <6>[ 1.045757] EINJ: ACPI disabled.
5875 11:33:32.559089 <4>[ 1.049527] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5876 11:33:32.596735 <6>[ 1.090306] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5877 11:33:32.605455 <6>[ 1.098790] printk: console [ttyS0] disabled
5878 11:33:32.633214 <6>[ 1.123448] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5879 11:33:32.639972 <6>[ 1.132925] printk: console [ttyS0] enabled
5880 11:33:32.643511 <6>[ 1.132925] printk: console [ttyS0] enabled
5881 11:33:32.650002 <6>[ 1.141846] printk: bootconsole [mtk8250] disabled
5882 11:33:32.653104 <6>[ 1.141846] printk: bootconsole [mtk8250] disabled
5883 11:33:32.663358 <3>[ 1.152377] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5884 11:33:32.669646 <3>[ 1.160758] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5885 11:33:32.699050 <6>[ 1.189165] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5886 11:33:32.705593 <6>[ 1.198823] serial serial0: tty port ttyS1 registered
5887 11:33:32.712173 <6>[ 1.205390] SuperH (H)SCI(F) driver initialized
5888 11:33:32.715353 <6>[ 1.210877] msm_serial: driver initialized
5889 11:33:32.730811 <6>[ 1.221176] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5890 11:33:32.740876 <6>[ 1.229781] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5891 11:33:32.747655 <6>[ 1.238353] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5892 11:33:32.757714 <6>[ 1.246919] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5893 11:33:32.764220 <6>[ 1.255569] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5894 11:33:32.774303 <6>[ 1.264225] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5895 11:33:32.784349 <6>[ 1.272961] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5896 11:33:32.790895 <6>[ 1.281699] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5897 11:33:32.800884 <6>[ 1.290259] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5898 11:33:32.807622 <6>[ 1.299059] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5899 11:33:32.817919 <4>[ 1.311448] cacheinfo: Unable to detect cache hierarchy for CPU 0
5900 11:33:32.827249 <6>[ 1.320787] loop: module loaded
5901 11:33:32.839115 <6>[ 1.332667] vsim1: Bringing 1800000uV into 2700000-2700000uV
5902 11:33:32.857097 <6>[ 1.350556] megasas: 07.719.03.00-rc1
5903 11:33:32.865746 <6>[ 1.359353] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5904 11:33:32.877054 <6>[ 1.370429] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5905 11:33:32.894134 <6>[ 1.387278] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5906 11:33:32.951113 <6>[ 1.437624] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.130/cr50_v2.94_mp.110-683b8
5907 11:33:34.081803 <6>[ 2.575552] Freeing initrd memory: 50908K
5908 11:33:34.098022 <4>[ 2.587663] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5909 11:33:34.104136 <4>[ 2.596913] CPU: 6 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
5910 11:33:34.110827 <4>[ 2.603613] Hardware name: Google juniper sku16 board (DT)
5911 11:33:34.114071 <4>[ 2.609351] Call trace:
5912 11:33:34.117167 <4>[ 2.612052] dump_backtrace.part.0+0xe0/0xf0
5913 11:33:34.120696 <4>[ 2.616589] show_stack+0x18/0x30
5914 11:33:34.123987 <4>[ 2.620162] dump_stack_lvl+0x64/0x80
5915 11:33:34.130687 <4>[ 2.624082] dump_stack+0x18/0x34
5916 11:33:34.133976 <4>[ 2.627651] sysfs_warn_dup+0x64/0x80
5917 11:33:34.137474 <4>[ 2.631573] sysfs_do_create_link_sd+0xf0/0x100
5918 11:33:34.140540 <4>[ 2.636360] sysfs_create_link+0x20/0x40
5919 11:33:34.147175 <4>[ 2.640539] bus_add_device+0x64/0x120
5920 11:33:34.150530 <4>[ 2.644545] device_add+0x354/0x7ec
5921 11:33:34.153933 <4>[ 2.648291] of_device_add+0x44/0x60
5922 11:33:34.160793 <4>[ 2.652125] of_platform_device_create_pdata+0x90/0x124
5923 11:33:34.163859 <4>[ 2.657605] of_platform_bus_create+0x154/0x380
5924 11:33:34.167519 <4>[ 2.662390] of_platform_populate+0x50/0xfc
5925 11:33:34.173849 <4>[ 2.666829] parse_mtd_partitions+0x1d8/0x4e0
5926 11:33:34.177358 <4>[ 2.671445] mtd_device_parse_register+0xec/0x2e0
5927 11:33:34.180557 <4>[ 2.676406] spi_nor_probe+0x280/0x2f4
5928 11:33:34.187131 <4>[ 2.680412] spi_mem_probe+0x6c/0xc0
5929 11:33:34.190457 <4>[ 2.684244] spi_probe+0x84/0xe4
5930 11:33:34.193897 <4>[ 2.687729] really_probe+0xbc/0x2dc
5931 11:33:34.197053 <4>[ 2.691559] __driver_probe_device+0x78/0x114
5932 11:33:34.203688 <4>[ 2.696171] driver_probe_device+0xd8/0x15c
5933 11:33:34.207105 <4>[ 2.700609] __device_attach_driver+0xb8/0x134
5934 11:33:34.210277 <4>[ 2.705308] bus_for_each_drv+0x7c/0xd4
5935 11:33:34.213609 <4>[ 2.709400] __device_attach+0x9c/0x1a0
5936 11:33:34.220358 <4>[ 2.713491] device_initial_probe+0x14/0x20
5937 11:33:34.223598 <4>[ 2.717929] bus_probe_device+0x98/0xa0
5938 11:33:34.227075 <4>[ 2.722018] device_add+0x3c0/0x7ec
5939 11:33:34.230370 <4>[ 2.725763] __spi_add_device+0x78/0x120
5940 11:33:34.237057 <4>[ 2.729941] spi_add_device+0x44/0x80
5941 11:33:34.240222 <4>[ 2.733858] spi_register_controller+0x704/0xb20
5942 11:33:34.246963 <4>[ 2.738731] devm_spi_register_controller+0x4c/0xac
5943 11:33:34.250204 <4>[ 2.743864] mtk_spi_probe+0x4f4/0x684
5944 11:33:34.253673 <4>[ 2.747869] platform_probe+0x68/0xc0
5945 11:33:34.256901 <4>[ 2.751787] really_probe+0xbc/0x2dc
5946 11:33:34.260065 <4>[ 2.755617] __driver_probe_device+0x78/0x114
5947 11:33:34.266672 <4>[ 2.760228] driver_probe_device+0xd8/0x15c
5948 11:33:34.270174 <4>[ 2.764666] __driver_attach+0x94/0x19c
5949 11:33:34.273511 <4>[ 2.768756] bus_for_each_dev+0x74/0xd0
5950 11:33:34.276559 <4>[ 2.772848] driver_attach+0x24/0x30
5951 11:33:34.283602 <4>[ 2.776678] bus_add_driver+0x154/0x20c
5952 11:33:34.286563 <4>[ 2.780768] driver_register+0x78/0x130
5953 11:33:34.289993 <4>[ 2.784858] __platform_driver_register+0x28/0x34
5954 11:33:34.296630 <4>[ 2.789818] mtk_spi_driver_init+0x1c/0x28
5955 11:33:34.300681 <4>[ 2.794174] do_one_initcall+0x64/0x1dc
5956 11:33:34.303347 <4>[ 2.798265] kernel_init_freeable+0x218/0x284
5957 11:33:34.306623 <4>[ 2.802879] kernel_init+0x24/0x12c
5958 11:33:34.313268 <4>[ 2.806623] ret_from_fork+0x10/0x20
5959 11:33:34.322062 <6>[ 2.815541] tun: Universal TUN/TAP device driver, 1.6
5960 11:33:34.325287 <6>[ 2.821838] thunder_xcv, ver 1.0
5961 11:33:34.328667 <6>[ 2.825354] thunder_bgx, ver 1.0
5962 11:33:34.332061 <6>[ 2.828857] nicpf, ver 1.0
5963 11:33:34.343136 <6>[ 2.833224] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5964 11:33:34.346389 <6>[ 2.840710] hns3: Copyright (c) 2017 Huawei Corporation.
5965 11:33:34.349693 <6>[ 2.846305] hclge is initializing
5966 11:33:34.356263 <6>[ 2.849898] e1000: Intel(R) PRO/1000 Network Driver
5967 11:33:34.363097 <6>[ 2.855033] e1000: Copyright (c) 1999-2006 Intel Corporation.
5968 11:33:34.366286 <6>[ 2.861056] e1000e: Intel(R) PRO/1000 Network Driver
5969 11:33:34.373050 <6>[ 2.866277] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5970 11:33:34.379825 <6>[ 2.872471] igb: Intel(R) Gigabit Ethernet Network Driver
5971 11:33:34.386419 <6>[ 2.878126] igb: Copyright (c) 2007-2014 Intel Corporation.
5972 11:33:34.393040 <6>[ 2.883971] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5973 11:33:34.399552 <6>[ 2.890496] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5974 11:33:34.402794 <6>[ 2.897046] sky2: driver version 1.30
5975 11:33:34.409597 <6>[ 2.902293] usbcore: registered new device driver r8152-cfgselector
5976 11:33:34.416037 <6>[ 2.908836] usbcore: registered new interface driver r8152
5977 11:33:34.423109 <6>[ 2.914669] VFIO - User Level meta-driver version: 0.3
5978 11:33:34.429621 <6>[ 2.922441] mtu3 11201000.usb: uwk - reg:0x420, version:101
5979 11:33:34.436191 <4>[ 2.928315] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5980 11:33:34.442965 <6>[ 2.935589] mtu3 11201000.usb: dr_mode: 1, drd: auto
5981 11:33:34.449531 <6>[ 2.940815] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5982 11:33:34.452684 <6>[ 2.947003] mtu3 11201000.usb: usb3-drd: 0
5983 11:33:34.459173 <6>[ 2.952576] mtu3 11201000.usb: xHCI platform device register success...
5984 11:33:34.471155 <4>[ 2.961208] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5985 11:33:34.478010 <6>[ 2.969151] xhci-mtk 11200000.usb: xHCI Host Controller
5986 11:33:34.484306 <6>[ 2.974657] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5987 11:33:34.490961 <6>[ 2.982378] xhci-mtk 11200000.usb: USB3 root hub has no ports
5988 11:33:34.500719 <6>[ 2.988387] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5989 11:33:34.504223 <6>[ 2.997811] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5990 11:33:34.510887 <6>[ 3.003884] xhci-mtk 11200000.usb: xHCI Host Controller
5991 11:33:34.517644 <6>[ 3.009372] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5992 11:33:34.524730 <6>[ 3.017029] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5993 11:33:34.531119 <6>[ 3.023853] hub 1-0:1.0: USB hub found
5994 11:33:34.534291 <6>[ 3.027882] hub 1-0:1.0: 1 port detected
5995 11:33:34.544183 <6>[ 3.033220] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5996 11:33:34.547321 <6>[ 3.041856] hub 2-0:1.0: USB hub found
5997 11:33:34.554169 <3>[ 3.045889] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5998 11:33:34.560668 <6>[ 3.053779] usbcore: registered new interface driver usb-storage
5999 11:33:34.567378 <6>[ 3.060377] usbcore: registered new device driver onboard-usb-hub
6000 11:33:34.581265 <4>[ 3.071146] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
6001 11:33:34.589997 <6>[ 3.083371] mt6397-rtc mt6358-rtc: registered as rtc0
6002 11:33:34.599891 <6>[ 3.088855] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-17T11:33:34 UTC (1721216014)
6003 11:33:34.603230 <6>[ 3.098682] i2c_dev: i2c /dev entries driver
6004 11:33:34.614986 <6>[ 3.105118] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6005 11:33:34.624955 <6>[ 3.113438] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
6006 11:33:34.628386 <6>[ 3.122341] i2c 4-0058: Fixed dependency cycle(s) with /panel
6007 11:33:34.638560 <6>[ 3.128372] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
6008 11:33:34.654316 <6>[ 3.147798] cpu cpu0: EM: created perf domain
6009 11:33:34.664717 <6>[ 3.153323] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
6010 11:33:34.671230 <6>[ 3.164628] cpu cpu4: EM: created perf domain
6011 11:33:34.678531 <6>[ 3.171801] sdhci: Secure Digital Host Controller Interface driver
6012 11:33:34.685182 <6>[ 3.178258] sdhci: Copyright(c) Pierre Ossman
6013 11:33:34.691649 <6>[ 3.183651] Synopsys Designware Multimedia Card Interface Driver
6014 11:33:34.698110 <6>[ 3.184157] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
6015 11:33:34.701508 <6>[ 3.190710] sdhci-pltfm: SDHCI platform and OF driver helper
6016 11:33:34.710044 <6>[ 3.203465] ledtrig-cpu: registered to indicate activity on CPUs
6017 11:33:34.717629 <6>[ 3.211225] usbcore: registered new interface driver usbhid
6018 11:33:34.721205 <6>[ 3.217069] usbhid: USB HID core driver
6019 11:33:34.731794 <6>[ 3.221393] spi_master spi2: will run message pump with realtime priority
6020 11:33:34.739233 <4>[ 3.221714] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
6021 11:33:34.746100 <4>[ 3.235796] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
6022 11:33:34.759208 <6>[ 3.241312] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
6023 11:33:34.775613 <6>[ 3.258783] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
6024 11:33:34.782437 <4>[ 3.270328] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6025 11:33:34.785757 <6>[ 3.273670] cros-ec-spi spi2.0: Chrome EC device registered
6026 11:33:34.798897 <4>[ 3.288980] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6027 11:33:34.811216 <4>[ 3.301277] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6028 11:33:34.817942 <6>[ 3.305306] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
6029 11:33:34.824456 <4>[ 3.309940] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6030 11:33:34.827727 <6>[ 3.315579] mmc0: new HS400 MMC card at address 0001
6031 11:33:34.834119 <6>[ 3.327506] mmcblk0: mmc0:0001 TB2932 29.2 GiB
6032 11:33:34.845145 <6>[ 3.334955] mmc1: new ultra high speed SDR104 SDIO card at address 0001
6033 11:33:34.848015 <6>[ 3.336157] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
6034 11:33:34.857547 <6>[ 3.351113] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
6035 11:33:34.864434 <6>[ 3.357663] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
6036 11:33:34.870834 <6>[ 3.363832] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
6037 11:33:34.880856 <6>[ 3.367510] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
6038 11:33:34.896575 <6>[ 3.383559] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
6039 11:33:34.906538 <6>[ 3.384502] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6040 11:33:34.917008 <6>[ 3.406938] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
6041 11:33:34.923568 <6>[ 3.408176] NET: Registered PF_PACKET protocol family
6042 11:33:34.930208 <6>[ 3.422412] 9pnet: Installing 9P2000 support
6043 11:33:34.933630 <5>[ 3.427180] Key type dns_resolver registered
6044 11:33:34.940109 <6>[ 3.432499] registered taskstats version 1
6045 11:33:34.943641 <5>[ 3.436868] Loading compiled-in X.509 certificates
6046 11:33:34.964782 <6>[ 3.455082] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6047 11:33:34.985104 <3>[ 3.475293] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6048 11:33:35.015859 <6>[ 3.502744] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6049 11:33:35.027363 <6>[ 3.517483] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6050 11:33:35.037136 <6>[ 3.526275] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6051 11:33:35.044048 <6>[ 3.534825] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6052 11:33:35.053848 <6>[ 3.543349] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6053 11:33:35.060462 <6>[ 3.551872] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6054 11:33:35.070330 <6>[ 3.560393] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6055 11:33:35.080396 <6>[ 3.568912] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6056 11:33:35.086930 <6>[ 3.578069] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6057 11:33:35.093531 <6>[ 3.585399] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6058 11:33:35.100226 <6>[ 3.592559] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6059 11:33:35.106996 <6>[ 3.599675] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6060 11:33:35.113708 <6>[ 3.606949] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6061 11:33:35.120047 <6>[ 3.611020] hub 1-1:1.0: USB hub found
6062 11:33:35.123714 <6>[ 3.615054] panfrost 13040000.gpu: clock rate = 511999970
6063 11:33:35.130249 <6>[ 3.618135] hub 1-1:1.0: 3 ports detected
6064 11:33:35.140116 <6>[ 3.623300] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6065 11:33:35.146893 <6>[ 3.637876] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6066 11:33:35.157219 <6>[ 3.645895] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6067 11:33:35.167140 <6>[ 3.654332] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6068 11:33:35.173834 <6>[ 3.666411] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6069 11:33:35.186829 <6>[ 3.677067] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6070 11:33:35.196924 <6>[ 3.686095] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6071 11:33:35.206568 <6>[ 3.695262] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6072 11:33:35.216785 <6>[ 3.704393] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6073 11:33:35.223483 <6>[ 3.713523] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6074 11:33:35.233340 <6>[ 3.722823] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6075 11:33:35.243660 <6>[ 3.732125] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6076 11:33:35.253085 <6>[ 3.741601] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6077 11:33:35.263140 <6>[ 3.751075] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6078 11:33:35.269728 <6>[ 3.760201] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6079 11:33:35.345016 <6>[ 3.834853] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6080 11:33:35.354969 <6>[ 3.843779] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6081 11:33:35.365420 <6>[ 3.855341] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6082 11:33:35.432912 <6>[ 3.923069] usb 1-1.1: new high-speed USB device number 3 using xhci-mtk
6083 11:33:36.081637 <6>[ 4.029769] hub 1-1.1:1.0: USB hub found
6084 11:33:36.084877 <6>[ 4.029981] hub 1-1.1:1.0: 4 ports detected
6085 11:33:36.091761 <6>[ 4.558055] Console: switching to colour frame buffer device 170x48
6086 11:33:36.101649 <6>[ 4.590068] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6087 11:33:36.120496 <6>[ 4.606515] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6088 11:33:36.137698 <6>[ 4.623932] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6089 11:33:36.144315 <6>[ 4.635767] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6090 11:33:36.154797 <6>[ 4.643956] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6091 11:33:36.164165 <6>[ 4.650325] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6092 11:33:36.184272 <6>[ 4.670365] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6093 11:33:36.209603 <6>[ 4.699085] usb 1-1.2: new high-speed USB device number 4 using xhci-mtk
6094 11:33:36.406110 <6>[ 4.895371] r8152-cfgselector 1-1.2: reset high-speed USB device number 4 using xhci-mtk
6095 11:33:36.546207 <6>[ 5.035936] r8152 1-1.2:1.0: load rtl8153b-2 v1 10/23/19 successfully
6096 11:33:36.584771 <6>[ 5.077257] r8152 1-1.2:1.0 eth0: v1.12.13
6097 11:33:36.601855 <6>[ 5.091092] usb 1-1.1.1: new high-speed USB device number 5 using xhci-mtk
6098 11:33:36.611657 <6>[ 5.099929] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6099 11:33:36.633450 <6>[ 5.119690] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6100 11:33:36.801890 <6>[ 5.291057] usb 1-1.3: new high-speed USB device number 6 using xhci-mtk
6101 11:33:36.938631 <6>[ 5.424808] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6102 11:33:36.990060 <6>[ 5.479577] r8152-cfgselector 1-1.1.1: reset high-speed USB device number 5 using xhci-mtk
6103 11:33:37.150519 <6>[ 5.640112] r8152 1-1.1.1:1.0: load rtl8153b-2 v1 10/23/19 successfully
6104 11:33:37.208370 <6>[ 5.700866] r8152 1-1.1.1:1.0 eth1: v1.12.13
6105 11:33:37.235916 <6>[ 5.722045] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6106 11:33:37.263469 <6>[ 5.749710] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6107 11:33:38.183669 <6>[ 6.676242] r8152 1-1.2:1.0 eth0: carrier on
6108 11:33:40.829943 <5>[ 6.707057] Sending DHCP requests .., OK
6109 11:33:40.842489 <6>[ 9.332020] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.17
6110 11:33:40.852102 <6>[ 9.345101] IP-Config: Complete:
6111 11:33:40.866812 <6>[ 9.353296] device=eth0, hwaddr=00:e0:4c:68:03:2b, ipaddr=192.168.201.17, mask=255.255.255.0, gw=192.168.201.1
6112 11:33:40.879501 <6>[ 9.368873] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5, domain=lava-rack, nis-domain=(none)
6113 11:33:40.892532 <6>[ 9.382011] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6114 11:33:40.899811 <6>[ 9.382019] nameserver0=192.168.201.1
6115 11:33:40.923592 <6>[ 9.416293] clk: Disabling unused clocks
6116 11:33:40.928465 <6>[ 9.424227] ALSA device list:
6117 11:33:40.936591 <6>[ 9.429532] No soundcards found.
6118 11:33:40.944760 <6>[ 9.437571] Freeing unused kernel memory: 8512K
6119 11:33:40.951498 <6>[ 9.444411] Run /init as init process
6120 11:33:40.985427 <6>[ 9.478064] NET: Registered PF_INET6 protocol family
6121 11:33:40.994623 <6>[ 9.487342] Segment Routing with IPv6
6122 11:33:40.997695 <6>[ 9.492432] In-situ OAM (IOAM) with IPv6
6123 11:33:41.040218 <30>[ 9.506697] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6124 11:33:41.049207 <30>[ 9.542177] systemd[1]: Detected architecture arm64.
6125 11:33:41.054572
6126 11:33:41.057896 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6127 11:33:41.058291
6128 11:33:41.074395 <30>[ 9.567317] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6129 11:33:41.208714 <30>[ 9.698020] systemd[1]: Queued start job for default target graphical.target.
6130 11:33:41.247227 <30>[ 9.736666] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6131 11:33:41.257558 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6132 11:33:41.275104 <30>[ 9.764532] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6133 11:33:41.285592 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6134 11:33:41.302607 <30>[ 9.792118] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6135 11:33:41.314022 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6136 11:33:41.330405 <30>[ 9.819936] systemd[1]: Created slice user.slice - User and Session Slice.
6137 11:33:41.340868 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6138 11:33:41.361131 <30>[ 9.847494] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6139 11:33:41.373045 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6140 11:33:41.393462 <30>[ 9.879402] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6141 11:33:41.405308 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6142 11:33:41.432218 <30>[ 9.911315] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6143 11:33:41.450312 <30>[ 9.939692] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6144 11:33:41.457714 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6145 11:33:41.477555 <30>[ 9.967213] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6146 11:33:41.490672 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6147 11:33:41.509926 <30>[ 9.999290] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6148 11:33:41.524577 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6149 11:33:41.538598 <30>[ 10.031354] systemd[1]: Reached target paths.target - Path Units.
6150 11:33:41.553293 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6151 11:33:41.569895 <30>[ 10.059238] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6152 11:33:41.582450 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6153 11:33:41.598791 <30>[ 10.091214] systemd[1]: Reached target slices.target - Slice Units.
6154 11:33:41.613605 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6155 11:33:41.627232 <30>[ 10.119765] systemd[1]: Reached target swap.target - Swaps.
6156 11:33:41.638119 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6157 11:33:41.658006 <30>[ 10.147338] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6158 11:33:41.672196 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6159 11:33:41.690763 <30>[ 10.180235] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6160 11:33:41.704924 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6161 11:33:41.723666 <30>[ 10.212992] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6162 11:33:41.737124 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6163 11:33:41.755301 <30>[ 10.244630] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6164 11:33:41.769277 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6165 11:33:41.786630 <30>[ 10.275890] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6166 11:33:41.798817 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6167 11:33:41.818384 <30>[ 10.308085] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6168 11:33:41.832291 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6169 11:33:41.850838 <30>[ 10.339922] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6170 11:33:41.863902 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6171 11:33:41.882223 <30>[ 10.371699] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6172 11:33:41.895279 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6173 11:33:41.938066 <30>[ 10.427400] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6174 11:33:41.949752 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6175 11:33:41.962877 <30>[ 10.452312] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6176 11:33:41.976297 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6177 11:33:41.999496 <30>[ 10.488928] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6178 11:33:42.011048 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6179 11:33:42.037515 <30>[ 10.520119] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6180 11:33:42.078121 <30>[ 10.567651] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6181 11:33:42.091702 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6182 11:33:42.116094 <30>[ 10.605430] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6183 11:33:42.127557 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6184 11:33:42.149712 <30>[ 10.639229] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6185 11:33:42.166178 Startin<6>[ 10.652558] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6186 11:33:42.169523 g [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6187 11:33:42.195392 <30>[ 10.684815] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6188 11:33:42.206058 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6189 11:33:42.228471 <30>[ 10.717661] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6190 11:33:42.241113 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6191 11:33:42.290401 <30>[ 10.780120] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6192 11:33:42.303846 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6193 11:33:42.321923 <30>[ 10.811379] systemd[1]: Starting systemd-journald.service - Journal Service...
6194 11:33:42.332699 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6195 11:33:42.353712 <30>[ 10.843065] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6196 11:33:42.363409 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6197 11:33:42.389463 <30>[ 10.875743] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6198 11:33:42.402427 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6199 11:33:42.446943 <30>[ 10.936224] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6200 11:33:42.459505 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6201 11:33:42.482130 <30>[ 10.971225] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6202 11:33:42.492980 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6203 11:33:42.513796 <30>[ 11.002886] systemd[1]: Started systemd-journald.service - Journal Service.
6204 11:33:42.523492 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6205 11:33:42.544334 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6206 11:33:42.562780 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6207 11:33:42.578973 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6208 11:33:42.598560 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
6209 11:33:42.622799 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6210 11:33:42.647343 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6211 11:33:42.669114 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6212 11:33:42.692783 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6213 11:33:42.711664 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6214 11:33:42.735694 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6215 11:33:42.759625 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6216 11:33:42.780762 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6217 11:33:42.831229 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6218 11:33:42.852542 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
6219 11:33:42.875844 [[0;1;31mFAILED[0m] Failed to start [0;1;39msystemd-re…ount Root and Kernel File Systems.
6220 11:33:42.882766 See 'systemctl status systemd-remount-fs.service' for details.
6221 11:33:42.904850 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6222 11:33:42.922560 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6223 11:33:42.943681 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6224 11:33:42.987450 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6225 11:33:43.004493 <46>[ 11.493920] systemd-journald[205]: Received client request to flush runtime journal.
6226 11:33:43.017084 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6227 11:33:43.030114 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6228 11:33:43.053552 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6229 11:33:43.072485 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6230 11:33:43.091529 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6231 11:33:43.139359 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6232 11:33:43.165709 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6233 11:33:43.183038 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6234 11:33:43.202892 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6235 11:33:43.251252 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6236 11:33:43.275739 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6237 11:33:43.306216 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6238 11:33:43.368734 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6239 11:33:43.389599 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6240 11:33:43.407322 [[0;32m OK [<6>[ 11.897540] r8152 1-1.1.1:1.0 enx88541f0f7aca: renamed from eth1
6241 11:33:43.413759 0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6242 11:33:43.449605 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6243 11:33:43.466498 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6244 11:33:43.494409 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6245 11:33:43.559488 <6>[ 12.049045] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6246 11:33:43.576492 <3>[ 12.065538] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6247 11:33:43.586185 <4>[ 12.068261] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6248 11:33:43.596664 <3>[ 12.075721] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6249 11:33:43.603057 <4>[ 12.082389] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6250 11:33:43.609091 <4>[ 12.082522] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6251 11:33:43.619364 <6>[ 12.086762] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6252 11:33:43.632767 <3>[ 12.092399] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6253 11:33:43.642549 <6>[ 12.107794] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6254 11:33:43.649325 <3>[ 12.113701] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6255 11:33:43.657624 <6>[ 12.115717] mc: Linux media interface: v0.10
6256 11:33:43.667448 <3>[ 12.117842] elan_i2c 2-0015: Error applying setting, reverse things back
6257 11:33:43.674097 <3>[ 12.128791] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6258 11:33:43.687649 <3>[ 12.159016] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6259 11:33:43.697608 <3>[ 12.163956] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6260 11:33:43.704422 <6>[ 12.185422] videodev: Linux video capture interface: v2.00
6261 11:33:43.723794 <3>[ 12.211130] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6262 11:33:43.730282 <6>[ 12.211343] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6263 11:33:43.741435 <6>[ 12.216086] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6264 11:33:43.750864 <3>[ 12.221617] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6265 11:33:43.757410 <6>[ 12.229597] cs_system_cfg: CoreSight Configuration manager initialised
6266 11:33:43.764412 <5>[ 12.234781] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6267 11:33:43.773961 <3>[ 12.238899] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6268 11:33:43.780629 <5>[ 12.243408] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6269 11:33:43.787319 <5>[ 12.243836] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6270 11:33:43.797484 <4>[ 12.243899] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6271 11:33:43.804178 <6>[ 12.243907] cfg80211: failed to load regulatory.db
6272 11:33:43.810870 <6>[ 12.256307] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6273 11:33:43.820715 <3>[ 12.263511] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6274 11:33:43.823939 <3>[ 12.263987] mtk-scp 10500000.scp: invalid resource
6275 11:33:43.834952 <6>[ 12.264049] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6276 11:33:43.838125 <6>[ 12.272413] remoteproc remoteproc0: scp is available
6277 11:33:43.848039 <6>[ 12.273426] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6278 11:33:43.855160 <6>[ 12.273511] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6279 11:33:43.861330 <6>[ 12.273590] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6280 11:33:43.872338 <6>[ 12.273668] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6281 11:33:43.878565 <3>[ 12.278471] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6282 11:33:43.888810 <6>[ 12.278709] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6283 11:33:43.895308 <6>[ 12.279729] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6284 11:33:43.901897 <6>[ 12.280444] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6285 11:33:43.912224 <4>[ 12.286985] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6286 11:33:43.918956 <6>[ 12.287413] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6287 11:33:43.928563 <3>[ 12.296078] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6288 11:33:43.931913 <6>[ 12.300755] remoteproc remoteproc0: powering up scp
6289 11:33:43.935254 <6>[ 12.303518] Bluetooth: Core ver 2.22
6290 11:33:43.941938 <6>[ 12.303587] NET: Registered PF_BLUETOOTH protocol family
6291 11:33:43.948460 <6>[ 12.303590] Bluetooth: HCI device and connection manager initialized
6292 11:33:43.952070 <6>[ 12.303607] Bluetooth: HCI socket layer initialized
6293 11:33:43.958530 <6>[ 12.303614] Bluetooth: L2CAP socket layer initialized
6294 11:33:43.965872 <6>[ 12.303629] Bluetooth: SCO socket layer initialized
6295 11:33:43.968741 <6>[ 12.324118] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6296 11:33:43.982774 <6>[ 12.324374] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6297 11:33:43.992608 <4>[ 12.331449] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6298 11:33:43.999436 <6>[ 12.334609] usbcore: registered new interface driver uvcvideo
6299 11:33:44.005708 <6>[ 12.341935] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6300 11:33:44.012351 <3>[ 12.344567] remoteproc remoteproc0: request_firmware failed: -2
6301 11:33:44.025832 <3>[ 12.344906] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6302 11:33:44.035935 <6>[ 12.360706] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video2 (81,2)
6303 11:33:44.042540 <6>[ 12.362308] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video3
6304 11:33:44.053338 <3>[ 12.364240] debugfs: File 'Playback' in directory 'dapm' already present!
6305 11:33:44.059735 <3>[ 12.364251] debugfs: File 'Capture' in directory 'dapm' already present!
6306 11:33:44.069370 <6>[ 12.366845] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6307 11:33:44.076946 <3>[ 12.369631] thermal_sys: Failed to find 'trips' node
6308 11:33:44.084198 <6>[ 12.378110] Bluetooth: HCI UART driver ver 2.3
6309 11:33:44.094314 <3>[ 12.385899] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6310 11:33:44.101018 <6>[ 12.393639] Bluetooth: HCI UART protocol H4 registered
6311 11:33:44.111122 <3>[ 12.400211] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6312 11:33:44.121646 <6>[ 12.400619] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6313 11:33:44.133368 <6>[ 12.400628] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6314 11:33:44.147569 <6>[ 12.400961] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6315 11:33:44.154214 <6>[ 12.408565] Bluetooth: HCI UART protocol LL registered
6316 11:33:44.164926 <4>[ 12.416435] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6317 11:33:44.171489 <6>[ 12.424950] Bluetooth: HCI UART protocol Three-wire (H5) registered
6318 11:33:44.179755 <3>[ 12.431343] thermal_sys: Failed to find 'trips' node
6319 11:33:44.186882 <6>[ 12.434204] Bluetooth: HCI UART protocol Broadcom registered
6320 11:33:44.197904 <3>[ 12.439453] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6321 11:33:44.208163 <3>[ 12.439464] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6322 11:33:44.214383 <6>[ 12.446106] Bluetooth: HCI UART protocol QCA registered
6323 11:33:44.221447 <6>[ 12.447499] Bluetooth: hci0: setting up ROME/QCA6390
6324 11:33:44.231618 <4>[ 12.451217] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6325 11:33:44.238176 <6>[ 12.456523] Bluetooth: HCI UART protocol Marvell registered
6326 11:33:44.248484 <6>[ 12.551105] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6327 11:33:44.255544 <3>[ 12.662181] Bluetooth: hci0: Frame reassembly failed (-84)
6328 11:33:44.329988 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slic<4>[ 12.819909] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6329 11:33:44.337008 <4>[ 12.819909] Fallback method does not support PEC.
6330 11:33:44.347591 e /system/system<3>[ 12.823434] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6331 11:33:44.348133 d-backlight.
6332 11:33:44.355030 <3>[ 12.836278] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6333 11:33:44.362660 <3>[ 12.849495] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6334 11:33:44.372872 <3>[ 12.858201] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6335 11:33:44.395999 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m <3>[ 12.886148] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6336 11:33:44.398839 - System Time Set.
6337 11:33:44.412924 <3>[ 12.901604] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6338 11:33:44.429003 <3>[ 12.917563] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6339 11:33:44.435925 <6>[ 12.928187] Bluetooth: hci0: QCA Product ID :0x00000008
6340 11:33:44.446215 <3>[ 12.933294] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6341 11:33:44.450301 <6>[ 12.933865] Bluetooth: hci0: QCA SOC Version :0x00000044
6342 11:33:44.457005 <3>[ 12.947730] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6343 11:33:44.463524 <6>[ 12.947774] Bluetooth: hci0: QCA ROM Version :0x00000302
6344 11:33:44.476092 <3>[ 12.964624] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6345 11:33:44.482659 <6>[ 12.965325] Bluetooth: hci0: QCA Patch Version:0x00000111
6346 11:33:44.496636 <6>[ 12.988140] Bluetooth: hci0: QCA controller version 0x00440302
6347 11:33:44.504126 <6>[ 12.988151] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6348 11:33:44.516664 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6349 11:33:44.531565 <6>[ 13.020821] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6350 11:33:44.569636 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6351 11:33:44.591905 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6352 11:33:44.614071 <4>[ 13.103267] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6353 11:33:44.633590 <4>[ 13.122759] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6354 11:33:44.647872 <4>[ 13.137117] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6355 11:33:44.658933 [[0;32m OK [<4>[ 13.148518] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6356 11:33:44.665306 0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6357 11:33:44.699870 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Support.
6358 11:33:44.716183 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6359 11:33:44.736648 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6360 11:33:44.751682 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6361 11:33:44.768001 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6362 11:33:44.790140 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Clean<3>[ 13.280167] Bluetooth: hci0: Frame reassembly failed (-84)
6363 11:33:44.793156 up of Temporary Directories.
6364 11:33:44.809872 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6365 11:33:44.826645 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6366 11:33:44.845894 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6367 11:33:44.861895 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6368 11:33:44.877737 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6369 11:33:44.920564 <6>[ 13.410080] Bluetooth: hci0: QCA Downloading qca/nvm_00440302_i2s.bin
6370 11:33:44.930684 <4>[ 13.418553] bluetooth hci0: Direct firmware load for qca/nvm_00440302_i2s.bin failed with error -2
6371 11:33:44.941066 <3>[ 13.429554] Bluetooth: hci0: QCA Failed to request file: qca/nvm_00440302_i2s.bin (-2)
6372 11:33:44.947305 Starting [0;1;39mdbus.<3>[ 13.439442] Bluetooth: hci0: QCA Failed to download NVM (-2)
6373 11:33:44.954134 service[0m - D-Bus System Message Bus...
6374 11:33:44.982014 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6375 11:33:45.007782 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6376 11:33:45.029796 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6377 11:33:45.065018 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6378 11:33:45.140572 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6379 11:33:45.179341 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6380 11:33:45.198974 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6381 11:33:45.243082 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6382 11:33:45.263304 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6383 11:33:45.283166 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6384 11:33:45.303972 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6385 11:33:45.322544 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6386 11:33:45.365947 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6387 11:33:45.406139 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6388 11:33:45.461011
6389 11:33:45.464126 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6390 11:33:45.464595
6391 11:33:45.467325 debian-bookworm-arm64 login: root (automatic login)
6392 11:33:45.467834
6393 11:33:45.482027 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Wed Jul 17 11:18:13 UTC 2024 aarch64
6394 11:33:45.482518
6395 11:33:45.488806 The programs included with the Debian GNU/Linux system are free software;
6396 11:33:45.495916 the exact distribution terms for each program are described in the
6397 11:33:45.498631 individual files in /usr/share/doc/*/copyright.
6398 11:33:45.499064
6399 11:33:45.505832 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6400 11:33:45.508820 permitted by applicable law.
6401 11:33:45.510329 Matched prompt #10: / #
6403 11:33:45.511600 Setting prompt string to ['/ #']
6404 11:33:45.512061 end: 2.2.5.1 login-action (duration 00:00:15) [common]
6406 11:33:45.513042 end: 2.2.5 auto-login-action (duration 00:00:15) [common]
6407 11:33:45.513521 start: 2.2.6 expect-shell-connection (timeout 00:03:34) [common]
6408 11:33:45.513859 Setting prompt string to ['/ #']
6409 11:33:45.514164 Forcing a shell prompt, looking for ['/ #']
6410 11:33:45.514467 Sending line: ''
6412 11:33:45.565206 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6413 11:33:45.565398 Waiting using forced prompt support (timeout 00:02:30)
6414 11:33:45.570484 / #
6415 11:33:45.570935 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6416 11:33:45.571221 start: 2.2.7 export-device-env (timeout 00:03:34) [common]
6417 11:33:45.571484 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6418 11:33:45.571730 end: 2.2 depthcharge-retry (duration 00:01:26) [common]
6419 11:33:45.571977 end: 2 depthcharge-action (duration 00:01:26) [common]
6420 11:33:45.572231 start: 3 lava-test-retry (timeout 00:05:00) [common]
6421 11:33:45.572483 start: 3.1 lava-test-shell (timeout 00:05:00) [common]
6422 11:33:45.572694 Using namespace: common
6423 11:33:45.572894 Sending line: '#'
6425 11:33:45.674164 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:05:00)
6426 11:33:45.679783 / # #
6427 11:33:45.680584 Using /lava-14864595
6428 11:33:45.680943 Sending line: 'export SHELL=/bin/sh'
6430 11:33:45.788324 / # export SHELL=/bin/sh
6431 11:33:45.789058 Sending line: '. /lava-14864595/environment'
6433 11:33:45.896462 / # . /lava-14864595/environment
6434 11:33:45.897276 Sending line: '/lava-14864595/bin/lava-test-runner /lava-14864595/0'
6436 11:33:45.998326 Test shell timeout: 10s (minimum of the action and connection timeout)
6437 11:33:46.003758 / # /lava-14864595/bin/lava-test-runner /lava-14864595/0
6438 11:33:46.029788 + export TESTRUN_ID=0_cros-ec
6439 11:33:46.035994 +<8>[ 14.528618] <LAVA_SIGNAL_STARTRUN 0_cros-ec 14864595_1.5.2.3.1>
6440 11:33:46.036758 Received signal: <STARTRUN> 0_cros-ec 14864595_1.5.2.3.1
6441 11:33:46.037128 Starting test lava.0_cros-ec (14864595_1.5.2.3.1)
6442 11:33:46.037554 Skipping test definition patterns.
6443 11:33:46.039389 cd /lava-14864595/0/tests/0_cros-ec
6444 11:33:46.042751 + cat uuid
6445 11:33:46.043246 + UUID=14864595_1.5.2.3.1
6446 11:33:46.046276 + set +x
6447 11:33:46.049065 + python3 -m cros.runners.lava_runner -v
6448 11:33:46.650112 test_cros_ec_accel_iio_abi (cros.tests.cros_ec_accel.TestCrosECAccel.test_cros_ec_accel_iio_abi)
6449 11:33:46.656620 Checks the cros-ec accelerometer IIO ABI. ... skipped 'No cros-ec-accel found'
6450 11:33:46.657121
6451 11:33:46.663253 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_accel_iio_abi RESULT=skip
6453 11:33:46.666376 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_accel_iio_abi RESULT=skip>
6454 11:33:46.676451 test_cros_ec_accel_iio_data_is_valid (cros.tests.cros_ec_accel.TestCrosECAccel.test_cros_ec_accel_iio_data_is_valid)
6455 11:33:46.686752 Validates accelerometer data by computing the magnitude. If the ... skipped 'No accelerometer found'
6456 11:33:46.687273
6457 11:33:46.693186 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_accel_iio_data_is_valid RESULT=skip>
6458 11:33:46.693935 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_accel_iio_data_is_valid RESULT=skip
6460 11:33:46.699795 test_cros_ec_gyro_iio_abi (cros.tests.cros_ec_gyro.TestCrosECGyro.test_cros_ec_gyro_iio_abi)
6461 11:33:46.709511 Checks the cros-ec gyroscope IIO ABI. ... skipped 'No cros-ec-gyro found'
6462 11:33:46.710008
6463 11:33:46.716276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_gyro_iio_abi RESULT=skip>
6464 11:33:46.717086 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_gyro_iio_abi RESULT=skip
6466 11:33:46.723171 test_cros_ec_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_abi)
6467 11:33:46.726251 Checks the standard ABI for the main Embedded Controller. ... ok
6468 11:33:46.726744
6469 11:33:46.733002 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_abi RESULT=pass>
6470 11:33:46.733894 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_abi RESULT=pass
6472 11:33:46.739404 test_cros_ec_chardev (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_chardev)
6473 11:33:46.746068 Checks the main Embedded controller character device. ... ok
6474 11:33:46.746562
6475 11:33:46.753113 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_chardev RESULT=pass>
6476 11:33:46.753963 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_chardev RESULT=pass
6478 11:33:46.759923 test_cros_ec_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_ec_hello)
6479 11:33:46.766572 Checks basic comunication with the main Embedded controller. ... ok
6480 11:33:46.767080
6481 11:33:46.772942 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_hello RESULT=pass>
6482 11:33:46.773724 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_hello RESULT=pass
6484 11:33:46.779724 test_cros_fp_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_abi)
6485 11:33:46.786186 Checks the standard ABI for the Fingerprint EC. ... skipped 'MCU cros_fp not supported'
6486 11:33:46.786686
6487 11:33:46.793211 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_abi RESULT=skip>
6488 11:33:46.793997 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_abi RESULT=skip
6490 11:33:46.799516 test_cros_fp_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_hello)
6491 11:33:46.809443 Checks basic comunication with the fingerprint controller. ... skipped 'MCU cros_fp not found'
6492 11:33:46.809996
6493 11:33:46.816281 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_hello RESULT=skip>
6494 11:33:46.816967 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_hello RESULT=skip
6496 11:33:46.822995 test_cros_fp_reboot (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_fp_reboot)
6497 11:33:46.829551 Test reboot command on Fingerprint MCU. ... skipped 'MCU cros_fp not found'
6498 11:33:46.830187
6499 11:33:46.836385 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_fp_reboot RESULT=skip>
6500 11:33:46.837063 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_fp_reboot RESULT=skip
6502 11:33:46.843492 test_cros_pd_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_pd_abi)
6503 11:33:46.849640 Checks the standard ABI for the Power Delivery EC. ... skipped 'MCU cros_pd not supported'
6504 11:33:46.850274
6505 11:33:46.856087 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_pd_abi RESULT=skip>
6506 11:33:46.856834 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_pd_abi RESULT=skip
6508 11:33:46.863152 test_cros_pd_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_pd_hello)
6509 11:33:46.873211 Checks basic comunication with the power delivery controller. ... skipped 'MCU cros_pd not found'
6510 11:33:46.873442
6511 11:33:46.879219 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_pd_hello RESULT=skip>
6512 11:33:46.879577 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_pd_hello RESULT=skip
6514 11:33:46.885982 test_cros_tp_abi (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_tp_abi)
6515 11:33:46.892981 Checks the standard ABI for the Touchpad EC. ... skipped 'MCU cros_tp not supported'
6516 11:33:46.893528
6517 11:33:46.899183 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_tp_abi RESULT=skip>
6518 11:33:46.899869 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_tp_abi RESULT=skip
6520 11:33:46.905852 test_cros_tp_hello (cros.tests.cros_ec_mcu.TestCrosECMCU.test_cros_tp_hello)
6521 11:33:46.912555 Checks basic comunication with the touchpad controller. ... skipped 'MCU cros_tp not found'
6522 11:33:46.913071
6523 11:33:46.919096 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_tp_hello RESULT=skip>
6524 11:33:46.919848 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_tp_hello RESULT=skip
6526 11:33:46.929265 test_cros_ec_pwm_backlight (cros.tests.cros_ec_pwm.TestCrosECPWM.test_cros_ec_pwm_backlight)
6527 11:33:46.935692 Check that the backlight is connected to a pwm of the EC and that ... skipped 'No backlight pwm found'
6528 11:33:46.936126
6529 11:33:46.942276 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_pwm_backlight RESULT=skip>
6530 11:33:46.942948 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_pwm_backlight RESULT=skip
6532 11:33:46.952124 test_cros_ec_battery_abi (cros.tests.cros_ec_power.TestCrosECPower.test_cros_ec_battery_abi)
6533 11:33:46.955557 Check the cros battery ABI. ... skipped 'No BAT found'
6534 11:33:46.955778
6535 11:33:46.962018 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_battery_abi RESULT=skip>
6536 11:33:46.962430 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_battery_abi RESULT=skip
6538 11:33:46.971972 test_cros_ec_usbpd_charger_abi (cros.tests.cros_ec_power.TestCrosECPower.test_cros_ec_usbpd_charger_abi)
6539 11:33:46.978704 Check the cros USBPD charger ABI. ... skipped 'No CROS_USBPD_CHARGER found'
6540 11:33:46.978898
6541 11:33:46.985118 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_usbpd_charger_abi RESULT=skip>
6542 11:33:46.985557 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_usbpd_charger_abi RESULT=skip
6544 11:33:46.991846 test_cros_ec_rtc_abi (cros.tests.cros_ec_rtc.TestCrosECRTC.test_cros_ec_rtc_abi)
6545 11:33:46.998580 Check the cros RTC ABI. ... skipped 'EC_FEATURE_RTC not supported, skipping'
6546 11:33:46.998791
6547 11:33:47.005418 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_rtc_abi RESULT=skip>
6548 11:33:47.005840 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_rtc_abi RESULT=skip
6550 11:33:47.015490 test_cros_ec_extcon_usbc_abi (cros.tests.cros_ec_extcon.TestCrosECextcon.test_cros_ec_extcon_usbc_abi)
6551 11:33:47.021870 Checks the cros-ec extcon ABI. ... skipped 'No extcon device found'
6552 11:33:47.022319
6553 11:33:47.028758 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=test_cros_ec_extcon_usbc_abi RESULT=skip>
6554 11:33:47.029184
6555 11:33:47.030019 Received signal: <TESTCASE> TEST_CASE_ID=test_cros_ec_extcon_usbc_abi RESULT=skip
6557 11:33:47.038626 ----------------------------------------------------------<8>[ 15.531329] <LAVA_SIGNAL_ENDRUN 0_cros-ec 14864595_1.5.2.3.1>
6558 11:33:47.039245 Received signal: <ENDRUN> 0_cros-ec 14864595_1.5.2.3.1
6559 11:33:47.039602 Ending use of test pattern.
6560 11:33:47.039884 Ending test lava.0_cros-ec (14864595_1.5.2.3.1), duration 1.00
6562 11:33:47.041761 ------------
6563 11:33:47.042148 Ran 18 tests in 0.352s
6564 11:33:47.042449
6565 11:33:47.045413 OK (skipped=15)
6566 11:33:47.046120 + set +x
6567 11:33:47.048353 <LAVA_TEST_RUNNER EXIT>
6568 11:33:47.048980 ok: lava_test_shell seems to have completed
6569 11:33:47.049825 test_cros_ec_accel_iio_abi: skip
test_cros_ec_accel_iio_data_is_valid: skip
test_cros_ec_gyro_iio_abi: skip
test_cros_ec_abi: pass
test_cros_ec_chardev: pass
test_cros_ec_hello: pass
test_cros_fp_abi: skip
test_cros_fp_hello: skip
test_cros_fp_reboot: skip
test_cros_pd_abi: skip
test_cros_pd_hello: skip
test_cros_tp_abi: skip
test_cros_tp_hello: skip
test_cros_ec_pwm_backlight: skip
test_cros_ec_battery_abi: skip
test_cros_ec_usbpd_charger_abi: skip
test_cros_ec_rtc_abi: skip
test_cros_ec_extcon_usbc_abi: skip
6570 11:33:47.050255 end: 3.1 lava-test-shell (duration 00:00:01) [common]
6571 11:33:47.050639 end: 3 lava-test-retry (duration 00:00:01) [common]
6572 11:33:47.051038 start: 4 finalize (timeout 00:08:06) [common]
6573 11:33:47.051475 start: 4.1 power-off (timeout 00:00:30) [common]
6574 11:33:47.052089 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-5', '--port=1', '--command=off']
6575 11:33:49.166170 >> Command sent successfully.
6576 11:33:49.179984 Returned 0 in 2 seconds
6577 11:33:49.180633 end: 4.1 power-off (duration 00:00:02) [common]
6579 11:33:49.181834 start: 4.2 read-feedback (timeout 00:08:04) [common]
6580 11:33:49.182518 Listened to connection for namespace 'common' for up to 1s
6581 11:33:50.183635 Finalising connection for namespace 'common'
6582 11:33:50.184211 Disconnecting from shell: Finalise
6583 11:33:50.184652 / #
6584 11:33:50.285386 end: 4.2 read-feedback (duration 00:00:01) [common]
6585 11:33:50.285525 end: 4 finalize (duration 00:00:03) [common]
6586 11:33:50.285651 Cleaning after the job
6587 11:33:50.285757 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864595/tftp-deploy-ebab05c9/ramdisk
6588 11:33:50.291648 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864595/tftp-deploy-ebab05c9/kernel
6589 11:33:50.306841 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864595/tftp-deploy-ebab05c9/dtb
6590 11:33:50.307073 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864595/tftp-deploy-ebab05c9/modules
6591 11:33:50.313127 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14864595
6592 11:33:50.403158 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14864595
6593 11:33:50.403315 Job finished correctly