Boot log: mt8183-kukui-jacuzzi-juniper-sku16
- Errors: 0
- Kernel Errors: 53
- Boot result: PASS
- Warnings: 1
- Kernel Warnings: 91
1 11:34:22.220378 lava-dispatcher, installed at version: 2024.05
2 11:34:22.220566 start: 0 validate
3 11:34:22.220698 Start time: 2024-07-17 11:34:22.220689+00:00 (UTC)
4 11:34:22.220824 Using caching service: 'http://localhost/cache/?uri=%s'
5 11:34:22.220961 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 11:34:22.483724 Using caching service: 'http://localhost/cache/?uri=%s'
7 11:34:22.484419 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.96-cip24-23-gd25f4b93e0db9%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fkernel%2FImage exists
8 11:34:22.746769 Using caching service: 'http://localhost/cache/?uri=%s'
9 11:34:22.747511 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.96-cip24-23-gd25f4b93e0db9%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fdtbs%2Fmediatek%2Fmt8183-kukui-jacuzzi-juniper-sku16.dtb exists
10 11:34:23.012626 Using caching service: 'http://localhost/cache/?uri=%s'
11 11:34:23.013208 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 11:34:23.276502 Using caching service: 'http://localhost/cache/?uri=%s'
13 11:34:23.277086 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip-gitlab%2Fci-pavel-linux-test%2Fv6.1.96-cip24-23-gd25f4b93e0db9%2Farm64%2Fdefconfig%2Barm64-chromebook%2Fgcc-12%2Fmodules.tar.xz exists
14 11:34:23.545256 validate duration: 1.32
16 11:34:23.546381 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 11:34:23.546870 start: 1.1 download-retry (timeout 00:10:00) [common]
18 11:34:23.547317 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 11:34:23.547978 Not decompressing ramdisk as can be used compressed.
20 11:34:23.548396 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 11:34:23.548703 saving as /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/ramdisk/initrd.cpio.gz
22 11:34:23.548992 total size: 5628169 (5 MB)
23 11:34:23.553677 progress 0 % (0 MB)
24 11:34:23.562930 progress 5 % (0 MB)
25 11:34:23.569860 progress 10 % (0 MB)
26 11:34:23.574189 progress 15 % (0 MB)
27 11:34:23.578117 progress 20 % (1 MB)
28 11:34:23.581304 progress 25 % (1 MB)
29 11:34:23.584125 progress 30 % (1 MB)
30 11:34:23.586959 progress 35 % (1 MB)
31 11:34:23.589085 progress 40 % (2 MB)
32 11:34:23.591562 progress 45 % (2 MB)
33 11:34:23.593467 progress 50 % (2 MB)
34 11:34:23.595535 progress 55 % (2 MB)
35 11:34:23.597585 progress 60 % (3 MB)
36 11:34:23.599243 progress 65 % (3 MB)
37 11:34:23.601111 progress 70 % (3 MB)
38 11:34:23.602741 progress 75 % (4 MB)
39 11:34:23.604416 progress 80 % (4 MB)
40 11:34:23.605930 progress 85 % (4 MB)
41 11:34:23.607594 progress 90 % (4 MB)
42 11:34:23.609120 progress 95 % (5 MB)
43 11:34:23.610504 progress 100 % (5 MB)
44 11:34:23.610719 5 MB downloaded in 0.06 s (86.93 MB/s)
45 11:34:23.610863 end: 1.1.1 http-download (duration 00:00:00) [common]
47 11:34:23.611094 end: 1.1 download-retry (duration 00:00:00) [common]
48 11:34:23.611174 start: 1.2 download-retry (timeout 00:10:00) [common]
49 11:34:23.611249 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 11:34:23.611378 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/kernel/Image
51 11:34:23.611456 saving as /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/kernel/Image
52 11:34:23.611510 total size: 54813184 (52 MB)
53 11:34:23.611563 No compression specified
54 11:34:23.612617 progress 0 % (0 MB)
55 11:34:23.626226 progress 5 % (2 MB)
56 11:34:23.640049 progress 10 % (5 MB)
57 11:34:23.653622 progress 15 % (7 MB)
58 11:34:23.667542 progress 20 % (10 MB)
59 11:34:23.681477 progress 25 % (13 MB)
60 11:34:23.695049 progress 30 % (15 MB)
61 11:34:23.708830 progress 35 % (18 MB)
62 11:34:23.722689 progress 40 % (20 MB)
63 11:34:23.736333 progress 45 % (23 MB)
64 11:34:23.750291 progress 50 % (26 MB)
65 11:34:23.764030 progress 55 % (28 MB)
66 11:34:23.777731 progress 60 % (31 MB)
67 11:34:23.791517 progress 65 % (34 MB)
68 11:34:23.805061 progress 70 % (36 MB)
69 11:34:23.818923 progress 75 % (39 MB)
70 11:34:23.832648 progress 80 % (41 MB)
71 11:34:23.846357 progress 85 % (44 MB)
72 11:34:23.860206 progress 90 % (47 MB)
73 11:34:23.873800 progress 95 % (49 MB)
74 11:34:23.887324 progress 100 % (52 MB)
75 11:34:23.887545 52 MB downloaded in 0.28 s (189.38 MB/s)
76 11:34:23.887686 end: 1.2.1 http-download (duration 00:00:00) [common]
78 11:34:23.887888 end: 1.2 download-retry (duration 00:00:00) [common]
79 11:34:23.887966 start: 1.3 download-retry (timeout 00:10:00) [common]
80 11:34:23.888041 start: 1.3.1 http-download (timeout 00:10:00) [common]
81 11:34:23.888169 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/dtbs/mediatek/mt8183-kukui-jacuzzi-juniper-sku16.dtb
82 11:34:23.888235 saving as /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
83 11:34:23.888287 total size: 57695 (0 MB)
84 11:34:23.888340 No compression specified
85 11:34:23.889478 progress 56 % (0 MB)
86 11:34:23.889737 progress 100 % (0 MB)
87 11:34:23.889932 0 MB downloaded in 0.00 s (33.50 MB/s)
88 11:34:23.890042 end: 1.3.1 http-download (duration 00:00:00) [common]
90 11:34:23.890240 end: 1.3 download-retry (duration 00:00:00) [common]
91 11:34:23.890313 start: 1.4 download-retry (timeout 00:10:00) [common]
92 11:34:23.890387 start: 1.4.1 http-download (timeout 00:10:00) [common]
93 11:34:23.890490 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 11:34:23.890548 saving as /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/nfsrootfs/full.rootfs.tar
95 11:34:23.890601 total size: 120894716 (115 MB)
96 11:34:23.890653 Using unxz to decompress xz
97 11:34:23.891910 progress 0 % (0 MB)
98 11:34:24.227966 progress 5 % (5 MB)
99 11:34:24.571253 progress 10 % (11 MB)
100 11:34:24.913348 progress 15 % (17 MB)
101 11:34:25.235980 progress 20 % (23 MB)
102 11:34:25.538149 progress 25 % (28 MB)
103 11:34:25.883010 progress 30 % (34 MB)
104 11:34:26.206859 progress 35 % (40 MB)
105 11:34:26.375769 progress 40 % (46 MB)
106 11:34:26.557301 progress 45 % (51 MB)
107 11:34:26.858053 progress 50 % (57 MB)
108 11:34:27.212362 progress 55 % (63 MB)
109 11:34:27.551014 progress 60 % (69 MB)
110 11:34:27.888598 progress 65 % (74 MB)
111 11:34:28.224650 progress 70 % (80 MB)
112 11:34:28.571422 progress 75 % (86 MB)
113 11:34:28.900598 progress 80 % (92 MB)
114 11:34:29.234405 progress 85 % (98 MB)
115 11:34:29.568561 progress 90 % (103 MB)
116 11:34:29.887918 progress 95 % (109 MB)
117 11:34:30.236913 progress 100 % (115 MB)
118 11:34:30.242327 115 MB downloaded in 6.35 s (18.15 MB/s)
119 11:34:30.242479 end: 1.4.1 http-download (duration 00:00:06) [common]
121 11:34:30.242686 end: 1.4 download-retry (duration 00:00:06) [common]
122 11:34:30.242762 start: 1.5 download-retry (timeout 00:09:53) [common]
123 11:34:30.242835 start: 1.5.1 http-download (timeout 00:09:53) [common]
124 11:34:30.242962 downloading http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/modules.tar.xz
125 11:34:30.243022 saving as /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/modules/modules.tar
126 11:34:30.243074 total size: 8610184 (8 MB)
127 11:34:30.243128 Using unxz to decompress xz
128 11:34:30.244357 progress 0 % (0 MB)
129 11:34:30.264686 progress 5 % (0 MB)
130 11:34:30.288602 progress 10 % (0 MB)
131 11:34:30.312249 progress 15 % (1 MB)
132 11:34:30.336365 progress 20 % (1 MB)
133 11:34:30.359685 progress 25 % (2 MB)
134 11:34:30.383244 progress 30 % (2 MB)
135 11:34:30.405321 progress 35 % (2 MB)
136 11:34:30.431188 progress 40 % (3 MB)
137 11:34:30.455369 progress 45 % (3 MB)
138 11:34:30.479356 progress 50 % (4 MB)
139 11:34:30.503919 progress 55 % (4 MB)
140 11:34:30.527699 progress 60 % (4 MB)
141 11:34:30.550746 progress 65 % (5 MB)
142 11:34:30.575941 progress 70 % (5 MB)
143 11:34:30.602796 progress 75 % (6 MB)
144 11:34:30.630323 progress 80 % (6 MB)
145 11:34:30.653700 progress 85 % (7 MB)
146 11:34:30.676548 progress 90 % (7 MB)
147 11:34:30.699733 progress 95 % (7 MB)
148 11:34:30.722287 progress 100 % (8 MB)
149 11:34:30.727703 8 MB downloaded in 0.48 s (16.94 MB/s)
150 11:34:30.727853 end: 1.5.1 http-download (duration 00:00:00) [common]
152 11:34:30.728064 end: 1.5 download-retry (duration 00:00:00) [common]
153 11:34:30.728139 start: 1.6 prepare-tftp-overlay (timeout 00:09:53) [common]
154 11:34:30.728213 start: 1.6.1 extract-nfsrootfs (timeout 00:09:53) [common]
155 11:34:34.281037 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/14864610/extract-nfsrootfs-lfr77svd
156 11:34:34.281266 end: 1.6.1 extract-nfsrootfs (duration 00:00:04) [common]
157 11:34:34.281354 start: 1.6.2 lava-overlay (timeout 00:09:49) [common]
158 11:34:34.281513 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1
159 11:34:34.281629 makedir: /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin
160 11:34:34.281720 makedir: /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/tests
161 11:34:34.281808 makedir: /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/results
162 11:34:34.281892 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-add-keys
163 11:34:34.282018 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-add-sources
164 11:34:34.282137 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-background-process-start
165 11:34:34.282261 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-background-process-stop
166 11:34:34.282394 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-common-functions
167 11:34:34.282511 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-echo-ipv4
168 11:34:34.282629 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-install-packages
169 11:34:34.282745 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-installed-packages
170 11:34:34.282856 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-os-build
171 11:34:34.282969 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-probe-channel
172 11:34:34.283081 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-probe-ip
173 11:34:34.283193 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-target-ip
174 11:34:34.283307 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-target-mac
175 11:34:34.283420 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-target-storage
176 11:34:34.283535 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-test-case
177 11:34:34.283648 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-test-event
178 11:34:34.283760 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-test-feedback
179 11:34:34.283875 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-test-raise
180 11:34:34.283986 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-test-reference
181 11:34:34.284096 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-test-runner
182 11:34:34.284207 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-test-set
183 11:34:34.284316 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-test-shell
184 11:34:34.284431 Updating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-add-keys (debian)
185 11:34:34.284571 Updating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-add-sources (debian)
186 11:34:34.284702 Updating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-install-packages (debian)
187 11:34:34.284830 Updating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-installed-packages (debian)
188 11:34:34.284962 Updating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/bin/lava-os-build (debian)
189 11:34:34.285100 Creating /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/environment
190 11:34:34.285332 LAVA metadata
191 11:34:34.285400 - LAVA_JOB_ID=14864610
192 11:34:34.285458 - LAVA_DISPATCHER_IP=192.168.201.1
193 11:34:34.285553 start: 1.6.2.1 lava-vland-overlay (timeout 00:09:49) [common]
194 11:34:34.285612 skipped lava-vland-overlay
195 11:34:34.285679 end: 1.6.2.1 lava-vland-overlay (duration 00:00:00) [common]
196 11:34:34.285748 start: 1.6.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
197 11:34:34.285801 skipped lava-multinode-overlay
198 11:34:34.285863 end: 1.6.2.2 lava-multinode-overlay (duration 00:00:00) [common]
199 11:34:34.285930 start: 1.6.2.3 test-definition (timeout 00:09:49) [common]
200 11:34:34.285989 Loading test definitions
201 11:34:34.286064 start: 1.6.2.3.1 inline-repo-action (timeout 00:09:49) [common]
202 11:34:34.286121 Using /lava-14864610 at stage 0
203 11:34:34.286388 uuid=14864610_1.6.2.3.1 testdef=None
204 11:34:34.286466 end: 1.6.2.3.1 inline-repo-action (duration 00:00:00) [common]
205 11:34:34.286538 start: 1.6.2.3.2 test-overlay (timeout 00:09:49) [common]
206 11:34:34.286932 end: 1.6.2.3.2 test-overlay (duration 00:00:00) [common]
208 11:34:34.287123 start: 1.6.2.3.3 test-install-overlay (timeout 00:09:49) [common]
209 11:34:34.287630 end: 1.6.2.3.3 test-install-overlay (duration 00:00:00) [common]
211 11:34:34.287838 start: 1.6.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
212 11:34:34.288328 runner path: /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/0/tests/0_timesync-off test_uuid 14864610_1.6.2.3.1
213 11:34:34.288469 end: 1.6.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
215 11:34:34.288666 start: 1.6.2.3.5 git-repo-action (timeout 00:09:49) [common]
216 11:34:34.288730 Using /lava-14864610 at stage 0
217 11:34:34.288813 Fetching tests from https://github.com/kernelci/test-definitions.git
218 11:34:34.288891 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/0/tests/1_kselftest-rtc'
219 11:34:37.634366 Running '/usr/bin/git checkout kernelci.org
220 11:34:37.780278 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
221 11:34:37.780642 uuid=14864610_1.6.2.3.5 testdef=None
222 11:34:37.780740 end: 1.6.2.3.5 git-repo-action (duration 00:00:03) [common]
224 11:34:37.780928 start: 1.6.2.3.6 test-overlay (timeout 00:09:46) [common]
225 11:34:37.781603 end: 1.6.2.3.6 test-overlay (duration 00:00:00) [common]
227 11:34:37.781800 start: 1.6.2.3.7 test-install-overlay (timeout 00:09:46) [common]
228 11:34:37.782831 end: 1.6.2.3.7 test-install-overlay (duration 00:00:00) [common]
230 11:34:37.783042 start: 1.6.2.3.8 test-runscript-overlay (timeout 00:09:46) [common]
231 11:34:37.783881 runner path: /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/0/tests/1_kselftest-rtc test_uuid 14864610_1.6.2.3.5
232 11:34:37.783959 BOARD='mt8183-kukui-jacuzzi-juniper-sku16'
233 11:34:37.784016 BRANCH='cip-gitlab'
234 11:34:37.784068 SKIPFILE='/dev/null'
235 11:34:37.784118 SKIP_INSTALL='True'
236 11:34:37.784166 TESTPROG_URL='http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz'
237 11:34:37.784216 TST_CASENAME=''
238 11:34:37.784264 TST_CMDFILES='rtc'
239 11:34:37.784393 end: 1.6.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
241 11:34:37.784568 Creating lava-test-runner.conf files
242 11:34:37.784623 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/14864610/lava-overlay-pjo6ldi1/lava-14864610/0 for stage 0
243 11:34:37.784703 - 0_timesync-off
244 11:34:37.784760 - 1_kselftest-rtc
245 11:34:37.784845 end: 1.6.2.3 test-definition (duration 00:00:03) [common]
246 11:34:37.784919 start: 1.6.2.4 compress-overlay (timeout 00:09:46) [common]
247 11:34:44.852179 end: 1.6.2.4 compress-overlay (duration 00:00:07) [common]
248 11:34:44.852308 start: 1.6.2.5 persistent-nfs-overlay (timeout 00:09:39) [common]
249 11:34:44.852389 end: 1.6.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
250 11:34:44.852468 end: 1.6.2 lava-overlay (duration 00:00:11) [common]
251 11:34:44.852544 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:39) [common]
252 11:34:45.014264 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
253 11:34:45.014402 start: 1.6.4 extract-modules (timeout 00:09:39) [common]
254 11:34:45.014474 extracting modules file /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14864610/extract-nfsrootfs-lfr77svd
255 11:34:45.238250 extracting modules file /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/modules/modules.tar to /var/lib/lava/dispatcher/tmp/14864610/extract-overlay-ramdisk-eumm4gwn/ramdisk
256 11:34:45.465789 end: 1.6.4 extract-modules (duration 00:00:00) [common]
257 11:34:45.465923 start: 1.6.5 apply-overlay-tftp (timeout 00:09:38) [common]
258 11:34:45.465997 [common] Applying overlay to NFS
259 11:34:45.466056 [common] Applying overlay /var/lib/lava/dispatcher/tmp/14864610/compress-overlay-i0ctoru2/overlay-1.6.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/14864610/extract-nfsrootfs-lfr77svd
260 11:34:46.344870 end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
261 11:34:46.345005 start: 1.6.6 configure-preseed-file (timeout 00:09:37) [common]
262 11:34:46.345088 end: 1.6.6 configure-preseed-file (duration 00:00:00) [common]
263 11:34:46.345206 start: 1.6.7 compress-ramdisk (timeout 00:09:37) [common]
264 11:34:46.345273 Building ramdisk /var/lib/lava/dispatcher/tmp/14864610/extract-overlay-ramdisk-eumm4gwn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/14864610/extract-overlay-ramdisk-eumm4gwn/ramdisk
265 11:34:46.742502 >> 129966 blocks
266 11:34:48.846900 rename /var/lib/lava/dispatcher/tmp/14864610/extract-overlay-ramdisk-eumm4gwn/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/ramdisk/ramdisk.cpio.gz
267 11:34:48.847065 end: 1.6.7 compress-ramdisk (duration 00:00:03) [common]
268 11:34:48.847152 start: 1.6.8 prepare-kernel (timeout 00:09:35) [common]
269 11:34:48.847232 start: 1.6.8.1 prepare-fit (timeout 00:09:35) [common]
270 11:34:48.847315 Calling: ['lzma', '--keep', '/var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/kernel/Image']
271 11:35:02.819905 Returned 0 in 13 seconds
272 11:35:02.820108 mkimage -D "-I dts -O dtb -p 2048" -f auto -A arm64 -O linux -T kernel -C lzma -d /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/kernel/Image.lzma -a 0 -b /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb -i /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/ramdisk/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/kernel/image.itb
273 11:35:03.280446 output: FIT description: Kernel Image image with one or more FDT blobs
274 11:35:03.280585 output: Created: Wed Jul 17 12:35:03 2024
275 11:35:03.280648 output: Image 0 (kernel-1)
276 11:35:03.280704 output: Description:
277 11:35:03.280757 output: Created: Wed Jul 17 12:35:03 2024
278 11:35:03.280809 output: Type: Kernel Image
279 11:35:03.280860 output: Compression: lzma compressed
280 11:35:03.280912 output: Data Size: 13118294 Bytes = 12810.83 KiB = 12.51 MiB
281 11:35:03.280963 output: Architecture: AArch64
282 11:35:03.281013 output: OS: Linux
283 11:35:03.281061 output: Load Address: 0x00000000
284 11:35:03.281110 output: Entry Point: 0x00000000
285 11:35:03.281212 output: Hash algo: crc32
286 11:35:03.281268 output: Hash value: 83448d17
287 11:35:03.281317 output: Image 1 (fdt-1)
288 11:35:03.281366 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
289 11:35:03.281415 output: Created: Wed Jul 17 12:35:03 2024
290 11:35:03.281463 output: Type: Flat Device Tree
291 11:35:03.281511 output: Compression: uncompressed
292 11:35:03.281559 output: Data Size: 57695 Bytes = 56.34 KiB = 0.06 MiB
293 11:35:03.281608 output: Architecture: AArch64
294 11:35:03.281657 output: Hash algo: crc32
295 11:35:03.281704 output: Hash value: a9713552
296 11:35:03.281751 output: Image 2 (ramdisk-1)
297 11:35:03.281798 output: Description: unavailable
298 11:35:03.281846 output: Created: Wed Jul 17 12:35:03 2024
299 11:35:03.281894 output: Type: RAMDisk Image
300 11:35:03.281942 output: Compression: uncompressed
301 11:35:03.281990 output: Data Size: 18722081 Bytes = 18283.28 KiB = 17.85 MiB
302 11:35:03.282038 output: Architecture: AArch64
303 11:35:03.282084 output: OS: Linux
304 11:35:03.282131 output: Load Address: unavailable
305 11:35:03.282178 output: Entry Point: unavailable
306 11:35:03.282225 output: Hash algo: crc32
307 11:35:03.282271 output: Hash value: 25798047
308 11:35:03.282335 output: Default Configuration: 'conf-1'
309 11:35:03.282396 output: Configuration 0 (conf-1)
310 11:35:03.282443 output: Description: mt8183-kukui-jacuzzi-juniper-sku16
311 11:35:03.282490 output: Kernel: kernel-1
312 11:35:03.282537 output: Init Ramdisk: ramdisk-1
313 11:35:03.282585 output: FDT: fdt-1
314 11:35:03.282632 output: Loadables: kernel-1
315 11:35:03.282679 output:
316 11:35:03.282775 end: 1.6.8.1 prepare-fit (duration 00:00:14) [common]
317 11:35:03.282848 end: 1.6.8 prepare-kernel (duration 00:00:14) [common]
318 11:35:03.282921 end: 1.6 prepare-tftp-overlay (duration 00:00:33) [common]
319 11:35:03.282993 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
320 11:35:03.283049 No LXC device requested
321 11:35:03.283115 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
322 11:35:03.283201 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
323 11:35:03.283311 end: 1.8 deploy-device-env (duration 00:00:00) [common]
324 11:35:03.283382 Checking files for TFTP limit of 4294967296 bytes.
325 11:35:03.283788 end: 1 tftp-deploy (duration 00:00:40) [common]
326 11:35:03.283876 start: 2 depthcharge-action (timeout 00:05:00) [common]
327 11:35:03.283953 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
328 11:35:03.284040 substitutions:
329 11:35:03.284099 - {DTB}: 14864610/tftp-deploy-970h3d48/dtb/mt8183-kukui-jacuzzi-juniper-sku16.dtb
330 11:35:03.284155 - {INITRD}: 14864610/tftp-deploy-970h3d48/ramdisk/ramdisk.cpio.gz
331 11:35:03.284207 - {KERNEL}: 14864610/tftp-deploy-970h3d48/kernel/Image
332 11:35:03.284258 - {LAVA_MAC}: None
333 11:35:03.284307 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/14864610/extract-nfsrootfs-lfr77svd
334 11:35:03.284357 - {NFS_SERVER_IP}: 192.168.201.1
335 11:35:03.284407 - {PRESEED_CONFIG}: None
336 11:35:03.284465 - {PRESEED_LOCAL}: None
337 11:35:03.284514 - {RAMDISK}: 14864610/tftp-deploy-970h3d48/ramdisk/ramdisk.cpio.gz
338 11:35:03.284563 - {ROOT_PART}: None
339 11:35:03.284610 - {ROOT}: None
340 11:35:03.284658 - {SERVER_IP}: 192.168.201.1
341 11:35:03.284705 - {TEE}: None
342 11:35:03.284753 Parsed boot commands:
343 11:35:03.284800 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
344 11:35:03.284942 Parsed boot commands: tftpboot 192.168.201.1 14864610/tftp-deploy-970h3d48/kernel/image.itb 14864610/tftp-deploy-970h3d48/kernel/cmdline
345 11:35:03.285020 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
346 11:35:03.285093 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
347 11:35:03.285192 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
348 11:35:03.285277 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
349 11:35:03.285331 Not connected, no need to disconnect.
350 11:35:03.285397 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
351 11:35:03.285463 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
352 11:35:03.285517 [common] connect-device Connecting to device using '/usr/local/bin/chromebook-console.sh mt8183-kukui-jacuzzi-juniper-sku16-cbg-3'
353 11:35:03.288625 Setting prompt string to ['lava-test: # ']
354 11:35:03.288970 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
355 11:35:03.289066 end: 2.2.1 reset-connection (duration 00:00:00) [common]
356 11:35:03.289201 start: 2.2.2 reset-device (timeout 00:05:00) [common]
357 11:35:03.289331 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
358 11:35:03.289510 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=reboot']
359 11:35:12.431220 >> Command sent successfully.
360 11:35:12.434640 Returned 0 in 9 seconds
361 11:35:12.434800 end: 2.2.2.1 pdu-reboot (duration 00:00:09) [common]
363 11:35:12.435000 end: 2.2.2 reset-device (duration 00:00:09) [common]
364 11:35:12.435082 start: 2.2.3 depthcharge-start (timeout 00:04:51) [common]
365 11:35:12.435157 Setting prompt string to 'Starting depthcharge on Juniper...'
366 11:35:12.435210 Changing prompt to 'Starting depthcharge on Juniper...'
367 11:35:12.435268 depthcharge-start: Wait for prompt Starting depthcharge on Juniper... (timeout 00:05:00)
368 11:35:12.435595 [Enter `^Ec?' for help]
369 11:35:19.564547 [DL] 00000000 00000000 010701
370 11:35:19.569411
371 11:35:19.569500
372 11:35:19.569557 F0: 102B 0000
373 11:35:19.569618
374 11:35:19.569670 F3: 1006 0033 [0200]
375 11:35:19.573077
376 11:35:19.573207 F3: 4001 00E0 [0200]
377 11:35:19.573266
378 11:35:19.573319 F3: 0000 0000
379 11:35:19.573372
380 11:35:19.575204 V0: 0000 0000 [0001]
381 11:35:19.575282
382 11:35:19.575339 00: 1027 0002
383 11:35:19.575394
384 11:35:19.578954 01: 0000 0000
385 11:35:19.579052
386 11:35:19.579137 BP: 0C00 0251 [0000]
387 11:35:19.579210
388 11:35:19.582446 G0: 1182 0000
389 11:35:19.582542
390 11:35:19.582614 EC: 0004 0000 [0001]
391 11:35:19.582686
392 11:35:19.585406 S7: 0000 0000 [0000]
393 11:35:19.585497
394 11:35:19.585558 CC: 0000 0000 [0001]
395 11:35:19.588655
396 11:35:19.588783 T0: 0000 00DB [000F]
397 11:35:19.588884
398 11:35:19.588980 Jump to BL
399 11:35:19.589077
400 11:35:19.625110
401 11:35:19.625253
402 11:35:19.631332 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 verstage starting (log level: 8)...
403 11:35:19.635014 ARM64: Exception handlers installed.
404 11:35:19.637759 ARM64: Testing exception
405 11:35:19.641392 ARM64: Done test exception
406 11:35:19.645069 WDT: Last reset was cold boot
407 11:35:19.648366 SPI0(PAD0) initialized at 992727 Hz
408 11:35:19.652821 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
409 11:35:19.652897 Manufacturer: ef
410 11:35:19.659700 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
411 11:35:19.671733 Probing TPM: . done!
412 11:35:19.671846 TPM ready after 0 ms
413 11:35:19.678249 Connected to device vid:did:rid of 1ae0:0028:00
414 11:35:19.684869 Firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1dd676c
415 11:35:19.688440 Initialized TPM device CR50 revision 0
416 11:35:19.734109 tlcl_send_startup: Startup return code is 0
417 11:35:19.734244 TPM: setup succeeded
418 11:35:19.742921 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
419 11:35:19.746129 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
420 11:35:19.749273 in-header: 03 19 00 00 08 00 00 00
421 11:35:19.752677 in-data: a2 e0 47 00 13 00 00 00
422 11:35:19.756395 Chrome EC: UHEPI supported
423 11:35:19.762919 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
424 11:35:19.766273 in-header: 03 a1 00 00 08 00 00 00
425 11:35:19.770021 in-data: 84 60 60 10 00 00 00 00
426 11:35:19.770123 Phase 1
427 11:35:19.772737 FMAP: area GBB found @ 3f5000 (12032 bytes)
428 11:35:19.779608 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
429 11:35:19.786078 VB2:vb2_check_recovery() Recovery was requested manually
430 11:35:19.789630 VB2:vb2_check_recovery() We have a recovery request: 0x2 / 0x0
431 11:35:19.795461 Recovery requested (1009000e)
432 11:35:19.804506 tlcl_extend: response is 0
433 11:35:19.809940 tlcl_extend: response is 0
434 11:35:19.834747
435 11:35:19.834862
436 11:35:19.841838 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 romstage starting (log level: 8)...
437 11:35:19.844725 ARM64: Exception handlers installed.
438 11:35:19.848197 ARM64: Testing exception
439 11:35:19.851229 ARM64: Done test exception
440 11:35:19.866403 [RTC]rtc_enable_dcxo,41: con=0x482, osc32con=0xea6b, sec=0x2011
441 11:35:19.873496 [RTC]rtc_check_state,142: con=482, pwrkey1=a357, pwrkey2=67d2
442 11:35:19.876836 [RTC]rtc_eosc_cali,157: PMIC_RG_FQMTR_CKSEL=0x4a
443 11:35:19.885405 [RTC]rtc_get_frequency_meter,134: input=0xf, output=863
444 11:35:19.892176 [RTC]rtc_get_frequency_meter,134: input=0x7, output=730
445 11:35:19.899158 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
446 11:35:19.905441 [RTC]rtc_get_frequency_meter,134: input=0x9, output=763
447 11:35:19.912283 [RTC]rtc_get_frequency_meter,134: input=0xa, output=782
448 11:35:19.919281 [RTC]rtc_get_frequency_meter,134: input=0xa, output=783
449 11:35:19.926690 [RTC]rtc_get_frequency_meter,134: input=0xb, output=799
450 11:35:19.930117 [RTC]rtc_osc_init,208: EOSC32 cali val = 0xea6b
451 11:35:19.936309 [RTC]rtc_boot_common,186: irqsta=0, bbpu=0, con=482
452 11:35:19.939531 [RTC]rtc_bbpu_power_on,373: rtc_write_trigger=1
453 11:35:19.943294 [RTC]rtc_bbpu_power_on,376: done BBPU=0x9
454 11:35:19.947262 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
455 11:35:19.950147 in-header: 03 19 00 00 08 00 00 00
456 11:35:19.953425 in-data: a2 e0 47 00 13 00 00 00
457 11:35:19.956593 Chrome EC: UHEPI supported
458 11:35:19.963504 out: cmd=0xa4: 03 5d a4 00 00 00 0c 00 00 01 00 00 f4 fb 00 00 00 00 00 00
459 11:35:19.966871 in-header: 03 a1 00 00 08 00 00 00
460 11:35:19.970051 in-data: 84 60 60 10 00 00 00 00
461 11:35:19.973097 Skip loading cached calibration data
462 11:35:19.980184 out: cmd=0xa4: 03 7f a4 00 00 00 0c 00 00 01 00 00 d0 ff ff ff 00 00 00 00
463 11:35:19.983209 in-header: 03 a1 00 00 08 00 00 00
464 11:35:19.986670 in-data: 84 60 60 10 00 00 00 00
465 11:35:19.993407 out: cmd=0xa4: 03 79 a4 00 00 00 0c 00 00 01 00 00 f0 7e 11 00 84 60 60 10
466 11:35:19.996838 in-header: 03 a1 00 00 08 00 00 00
467 11:35:19.999770 in-data: 84 60 60 10 00 00 00 00
468 11:35:20.003605 ADC[3]: Raw value=1036764 ID=8
469 11:35:20.003685 Manufacturer: ef
470 11:35:20.010219 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
471 11:35:20.013477 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
472 11:35:20.016964 CBFS @ 21000 size 3d4000
473 11:35:20.020536 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
474 11:35:20.026881 CBFS: Locating 'sdram-lpddr4x-K4UBE3D4AA-MGCL-4GB'
475 11:35:20.030343 CBFS: Found @ offset 3c880 size 4b
476 11:35:20.030423 DRAM-K: Full Calibration
477 11:35:20.036619 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
478 11:35:20.036710 CBFS @ 21000 size 3d4000
479 11:35:20.043397 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
480 11:35:20.047095 CBFS: Locating 'fallback/dram'
481 11:35:20.050168 CBFS: Found @ offset 24b00 size 12268
482 11:35:20.077990 read SPI 0x45b44 0x1224c: 22774 us, 3263 KB/s, 26.104 Mbps
483 11:35:20.081335 ddr_geometry: 1, config: 0x0
484 11:35:20.084493 header.status = 0x0
485 11:35:20.087796 header.magic = 0x44524d4b (expected: 0x44524d4b)
486 11:35:20.091508 header.version = 0x5 (expected: 0x5)
487 11:35:20.094503 header.size = 0x8f0 (expected: 0x8f0)
488 11:35:20.094580 header.config = 0x0
489 11:35:20.098579 header.flags = 0x0
490 11:35:20.098656 header.checksum = 0x0
491 11:35:20.104894 dram_init: MediaTek DRAM firmware version: 1.5.0, accepting param version 5
492 11:35:20.111087 Set DRAM voltage: vdram1 = 1125000, vddq = 600000
493 11:35:20.115058 Get DRAM voltage to vdram1 = 1125000, vddq = 600000
494 11:35:20.118451 ddr_geometry:1
495 11:35:20.118584 [EMI] new MDL number = 1
496 11:35:20.121660 dram_cbt_mode_extern: 0
497 11:35:20.124515 dram_cbt_mode [RK0]: 0, [RK1]: 0
498 11:35:20.131264 Rank info: 0 emi_setting_index: 1 CONA[0xf053f154]
499 11:35:20.131373
500 11:35:20.131458
501 11:35:20.131539 [Bianco] ETT version 0.0.0.1
502 11:35:20.137884 dram_type 6, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=6
503 11:35:20.137983
504 11:35:20.142336 vSetVcoreByFreq with vcore:762500, freq=1600
505 11:35:20.142437
506 11:35:20.142522 [DramcInit]
507 11:35:20.144793 AutoRefreshCKEOff AutoREF OFF
508 11:35:20.148044 DDRPhyPLLSetting-CKEOFF
509 11:35:20.151358 DDRPhyPLLSetting-CKEON
510 11:35:20.151459
511 11:35:20.151545 Enable WDQS
512 11:35:20.155094 [ModeRegInit_LP4] CH0 RK0
513 11:35:20.158210 Write Rank0 MR13 =0x18
514 11:35:20.158310 Write Rank0 MR12 =0x5d
515 11:35:20.162390 Write Rank0 MR1 =0x56
516 11:35:20.165343 Write Rank0 MR2 =0x1a
517 11:35:20.165422 Write Rank0 MR11 =0x0
518 11:35:20.168376 Write Rank0 MR22 =0x38
519 11:35:20.168453 Write Rank0 MR14 =0x5d
520 11:35:20.171894 Write Rank0 MR3 =0x30
521 11:35:20.174832 Write Rank0 MR13 =0x58
522 11:35:20.174912 Write Rank0 MR12 =0x5d
523 11:35:20.178276 Write Rank0 MR1 =0x56
524 11:35:20.178372 Write Rank0 MR2 =0x2d
525 11:35:20.181696 Write Rank0 MR11 =0x23
526 11:35:20.185603 Write Rank0 MR22 =0x34
527 11:35:20.185680 Write Rank0 MR14 =0x10
528 11:35:20.188707 Write Rank0 MR3 =0x30
529 11:35:20.191614 Write Rank0 MR13 =0xd8
530 11:35:20.191727 [ModeRegInit_LP4] CH0 RK1
531 11:35:20.195029 Write Rank1 MR13 =0x18
532 11:35:20.195104 Write Rank1 MR12 =0x5d
533 11:35:20.198730 Write Rank1 MR1 =0x56
534 11:35:20.201933 Write Rank1 MR2 =0x1a
535 11:35:20.202011 Write Rank1 MR11 =0x0
536 11:35:20.204997 Write Rank1 MR22 =0x38
537 11:35:20.205095 Write Rank1 MR14 =0x5d
538 11:35:20.208891 Write Rank1 MR3 =0x30
539 11:35:20.211954 Write Rank1 MR13 =0x58
540 11:35:20.212029 Write Rank1 MR12 =0x5d
541 11:35:20.215089 Write Rank1 MR1 =0x56
542 11:35:20.215163 Write Rank1 MR2 =0x2d
543 11:35:20.218534 Write Rank1 MR11 =0x23
544 11:35:20.222534 Write Rank1 MR22 =0x34
545 11:35:20.222654 Write Rank1 MR14 =0x10
546 11:35:20.225417 Write Rank1 MR3 =0x30
547 11:35:20.228800 Write Rank1 MR13 =0xd8
548 11:35:20.228875 [ModeRegInit_LP4] CH1 RK0
549 11:35:20.232277 Write Rank0 MR13 =0x18
550 11:35:20.232352 Write Rank0 MR12 =0x5d
551 11:35:20.236109 Write Rank0 MR1 =0x56
552 11:35:20.238833 Write Rank0 MR2 =0x1a
553 11:35:20.238907 Write Rank0 MR11 =0x0
554 11:35:20.241833 Write Rank0 MR22 =0x38
555 11:35:20.241906 Write Rank0 MR14 =0x5d
556 11:35:20.245287 Write Rank0 MR3 =0x30
557 11:35:20.248536 Write Rank0 MR13 =0x58
558 11:35:20.248653 Write Rank0 MR12 =0x5d
559 11:35:20.251834 Write Rank0 MR1 =0x56
560 11:35:20.255087 Write Rank0 MR2 =0x2d
561 11:35:20.255188 Write Rank0 MR11 =0x23
562 11:35:20.258807 Write Rank0 MR22 =0x34
563 11:35:20.258881 Write Rank0 MR14 =0x10
564 11:35:20.262309 Write Rank0 MR3 =0x30
565 11:35:20.265391 Write Rank0 MR13 =0xd8
566 11:35:20.265468 [ModeRegInit_LP4] CH1 RK1
567 11:35:20.268721 Write Rank1 MR13 =0x18
568 11:35:20.268810 Write Rank1 MR12 =0x5d
569 11:35:20.272135 Write Rank1 MR1 =0x56
570 11:35:20.275693 Write Rank1 MR2 =0x1a
571 11:35:20.275768 Write Rank1 MR11 =0x0
572 11:35:20.279643 Write Rank1 MR22 =0x38
573 11:35:20.279718 Write Rank1 MR14 =0x5d
574 11:35:20.282685 Write Rank1 MR3 =0x30
575 11:35:20.285849 Write Rank1 MR13 =0x58
576 11:35:20.285923 Write Rank1 MR12 =0x5d
577 11:35:20.289060 Write Rank1 MR1 =0x56
578 11:35:20.289142 Write Rank1 MR2 =0x2d
579 11:35:20.292364 Write Rank1 MR11 =0x23
580 11:35:20.296701 Write Rank1 MR22 =0x34
581 11:35:20.296777 Write Rank1 MR14 =0x10
582 11:35:20.299423 Write Rank1 MR3 =0x30
583 11:35:20.302462 Write Rank1 MR13 =0xd8
584 11:35:20.302537 match AC timing 3
585 11:35:20.312457 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
586 11:35:20.312541 [MiockJmeterHQA]
587 11:35:20.316430 vSetVcoreByFreq with vcore:762500, freq=1600
588 11:35:20.420143
589 11:35:20.420257 MIOCK jitter meter ch=0
590 11:35:20.420315
591 11:35:20.423186 1T = (99-17) = 82 dly cells
592 11:35:20.430104 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 762/100 ps
593 11:35:20.433552 vSetVcoreByFreq with vcore:725000, freq=1200
594 11:35:20.530434
595 11:35:20.530545 MIOCK jitter meter ch=0
596 11:35:20.530603
597 11:35:20.533770 1T = (94-16) = 78 dly cells
598 11:35:20.540494 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
599 11:35:20.544052 vSetVcoreByFreq with vcore:725000, freq=800
600 11:35:20.640702
601 11:35:20.640838 MIOCK jitter meter ch=0
602 11:35:20.640924
603 11:35:20.643925 1T = (94-16) = 78 dly cells
604 11:35:20.650575 Clock freq = 1599 MHz, period = 625 ps, 1 dly cell = 801/100 ps
605 11:35:20.653731 vSetVcoreByFreq with vcore:762500, freq=1600
606 11:35:20.657251 vSetVcoreByFreq with vcore:762500, freq=1600
607 11:35:20.657328
608 11:35:20.657386 K DRVP
609 11:35:20.660341 1. OCD DRVP=0 CALOUT=0
610 11:35:20.663735 1. OCD DRVP=1 CALOUT=0
611 11:35:20.663812 1. OCD DRVP=2 CALOUT=0
612 11:35:20.667413 1. OCD DRVP=3 CALOUT=0
613 11:35:20.670663 1. OCD DRVP=4 CALOUT=0
614 11:35:20.670742 1. OCD DRVP=5 CALOUT=0
615 11:35:20.674265 1. OCD DRVP=6 CALOUT=0
616 11:35:20.674425 1. OCD DRVP=7 CALOUT=0
617 11:35:20.677164 1. OCD DRVP=8 CALOUT=0
618 11:35:20.680152 1. OCD DRVP=9 CALOUT=1
619 11:35:20.680261
620 11:35:20.684057 1. OCD DRVP calibration OK! DRVP=9
621 11:35:20.684135
622 11:35:20.684193
623 11:35:20.684246
624 11:35:20.684296 K ODTN
625 11:35:20.687138 3. OCD ODTN=0 ,CALOUT=1
626 11:35:20.687216 3. OCD ODTN=1 ,CALOUT=1
627 11:35:20.690299 3. OCD ODTN=2 ,CALOUT=1
628 11:35:20.693581 3. OCD ODTN=3 ,CALOUT=1
629 11:35:20.693657 3. OCD ODTN=4 ,CALOUT=1
630 11:35:20.697170 3. OCD ODTN=5 ,CALOUT=1
631 11:35:20.700318 3. OCD ODTN=6 ,CALOUT=1
632 11:35:20.700395 3. OCD ODTN=7 ,CALOUT=0
633 11:35:20.700454
634 11:35:20.703809 3. OCD ODTN calibration OK! ODTN=7
635 11:35:20.703885
636 11:35:20.707392 [SwImpedanceCal] DRVP=9, DRVN=9, ODTN=7
637 11:35:20.710672 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15
638 11:35:20.717280 term_option=0, Reg: DRVP=9, DRVN=7, ODTN=15 (After Adjust)
639 11:35:20.717357
640 11:35:20.717415 K DRVP
641 11:35:20.720467 1. OCD DRVP=0 CALOUT=0
642 11:35:20.723686 1. OCD DRVP=1 CALOUT=0
643 11:35:20.723763 1. OCD DRVP=2 CALOUT=0
644 11:35:20.727449 1. OCD DRVP=3 CALOUT=0
645 11:35:20.727566 1. OCD DRVP=4 CALOUT=0
646 11:35:20.730591 1. OCD DRVP=5 CALOUT=0
647 11:35:20.734037 1. OCD DRVP=6 CALOUT=0
648 11:35:20.734113 1. OCD DRVP=7 CALOUT=0
649 11:35:20.736978 1. OCD DRVP=8 CALOUT=0
650 11:35:20.737078 1. OCD DRVP=9 CALOUT=0
651 11:35:20.740622 1. OCD DRVP=10 CALOUT=1
652 11:35:20.740725
653 11:35:20.743822 1. OCD DRVP calibration OK! DRVP=10
654 11:35:20.743898
655 11:35:20.743955
656 11:35:20.744008
657 11:35:20.744058 K ODTN
658 11:35:20.747082 3. OCD ODTN=0 ,CALOUT=1
659 11:35:20.750488 3. OCD ODTN=1 ,CALOUT=1
660 11:35:20.750582 3. OCD ODTN=2 ,CALOUT=1
661 11:35:20.754221 3. OCD ODTN=3 ,CALOUT=1
662 11:35:20.757486 3. OCD ODTN=4 ,CALOUT=1
663 11:35:20.757562 3. OCD ODTN=5 ,CALOUT=1
664 11:35:20.760848 3. OCD ODTN=6 ,CALOUT=1
665 11:35:20.764115 3. OCD ODTN=7 ,CALOUT=1
666 11:35:20.764192 3. OCD ODTN=8 ,CALOUT=1
667 11:35:20.767216 3. OCD ODTN=9 ,CALOUT=1
668 11:35:20.770569 3. OCD ODTN=10 ,CALOUT=1
669 11:35:20.770723 3. OCD ODTN=11 ,CALOUT=1
670 11:35:20.773908 3. OCD ODTN=12 ,CALOUT=1
671 11:35:20.777703 3. OCD ODTN=13 ,CALOUT=1
672 11:35:20.777781 3. OCD ODTN=14 ,CALOUT=0
673 11:35:20.777840
674 11:35:20.780769 3. OCD ODTN calibration OK! ODTN=14
675 11:35:20.780847
676 11:35:20.785055 [SwImpedanceCal] DRVP=10, DRVN=9, ODTN=14
677 11:35:20.791119 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14
678 11:35:20.794138 term_option=1, Reg: DRVP=10, DRVN=9, ODTN=14 (After Adjust)
679 11:35:20.794214
680 11:35:20.797411 [DramcInit]
681 11:35:20.797486 AutoRefreshCKEOff AutoREF OFF
682 11:35:20.801118 DDRPhyPLLSetting-CKEOFF
683 11:35:20.804558 DDRPhyPLLSetting-CKEON
684 11:35:20.804655
685 11:35:20.804738 Enable WDQS
686 11:35:20.804816 ==
687 11:35:20.810931 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
688 11:35:20.814264 fsp= 1, odt_onoff= 1, Byte mode= 0
689 11:35:20.814340 ==
690 11:35:20.814401 [Duty_Offset_Calibration]
691 11:35:20.814453
692 11:35:20.817519 ===========================
693 11:35:20.820892 B0:0 B1:1 CA:1
694 11:35:20.839943 ==
695 11:35:20.843428 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
696 11:35:20.846706 fsp= 1, odt_onoff= 1, Byte mode= 0
697 11:35:20.846783 ==
698 11:35:20.850102 [Duty_Offset_Calibration]
699 11:35:20.850177
700 11:35:20.853779 ===========================
701 11:35:20.853855 B0:1 B1:2 CA:0
702 11:35:20.886164 [ModeRegInit_LP4] CH0 RK0
703 11:35:20.888759 Write Rank0 MR13 =0x18
704 11:35:20.888859 Write Rank0 MR12 =0x5d
705 11:35:20.893060 Write Rank0 MR1 =0x56
706 11:35:20.895513 Write Rank0 MR2 =0x1a
707 11:35:20.895613 Write Rank0 MR11 =0x0
708 11:35:20.899689 Write Rank0 MR22 =0x38
709 11:35:20.899766 Write Rank0 MR14 =0x5d
710 11:35:20.902406 Write Rank0 MR3 =0x30
711 11:35:20.905829 Write Rank0 MR13 =0x58
712 11:35:20.905957 Write Rank0 MR12 =0x5d
713 11:35:20.909088 Write Rank0 MR1 =0x56
714 11:35:20.909216 Write Rank0 MR2 =0x2d
715 11:35:20.912311 Write Rank0 MR11 =0x23
716 11:35:20.916118 Write Rank0 MR22 =0x34
717 11:35:20.916220 Write Rank0 MR14 =0x10
718 11:35:20.919218 Write Rank0 MR3 =0x30
719 11:35:20.922417 Write Rank0 MR13 =0xd8
720 11:35:20.922514 [ModeRegInit_LP4] CH0 RK1
721 11:35:20.926283 Write Rank1 MR13 =0x18
722 11:35:20.926374 Write Rank1 MR12 =0x5d
723 11:35:20.929482 Write Rank1 MR1 =0x56
724 11:35:20.932876 Write Rank1 MR2 =0x1a
725 11:35:20.932969 Write Rank1 MR11 =0x0
726 11:35:20.935716 Write Rank1 MR22 =0x38
727 11:35:20.935818 Write Rank1 MR14 =0x5d
728 11:35:20.939415 Write Rank1 MR3 =0x30
729 11:35:20.943104 Write Rank1 MR13 =0x58
730 11:35:20.943195 Write Rank1 MR12 =0x5d
731 11:35:20.945927 Write Rank1 MR1 =0x56
732 11:35:20.946029 Write Rank1 MR2 =0x2d
733 11:35:20.949680 Write Rank1 MR11 =0x23
734 11:35:20.952731 Write Rank1 MR22 =0x34
735 11:35:20.952826 Write Rank1 MR14 =0x10
736 11:35:20.956382 Write Rank1 MR3 =0x30
737 11:35:20.959375 Write Rank1 MR13 =0xd8
738 11:35:20.959468 [ModeRegInit_LP4] CH1 RK0
739 11:35:20.962457 Write Rank0 MR13 =0x18
740 11:35:20.962546 Write Rank0 MR12 =0x5d
741 11:35:20.966068 Write Rank0 MR1 =0x56
742 11:35:20.969362 Write Rank0 MR2 =0x1a
743 11:35:20.969468 Write Rank0 MR11 =0x0
744 11:35:20.972692 Write Rank0 MR22 =0x38
745 11:35:20.972780 Write Rank0 MR14 =0x5d
746 11:35:20.976093 Write Rank0 MR3 =0x30
747 11:35:20.979370 Write Rank0 MR13 =0x58
748 11:35:20.979462 Write Rank0 MR12 =0x5d
749 11:35:20.982905 Write Rank0 MR1 =0x56
750 11:35:20.982995 Write Rank0 MR2 =0x2d
751 11:35:20.986026 Write Rank0 MR11 =0x23
752 11:35:20.989577 Write Rank0 MR22 =0x34
753 11:35:20.989652 Write Rank0 MR14 =0x10
754 11:35:20.993392 Write Rank0 MR3 =0x30
755 11:35:20.996290 Write Rank0 MR13 =0xd8
756 11:35:20.996364 [ModeRegInit_LP4] CH1 RK1
757 11:35:20.999743 Write Rank1 MR13 =0x18
758 11:35:20.999844 Write Rank1 MR12 =0x5d
759 11:35:21.003240 Write Rank1 MR1 =0x56
760 11:35:21.006711 Write Rank1 MR2 =0x1a
761 11:35:21.006785 Write Rank1 MR11 =0x0
762 11:35:21.009864 Write Rank1 MR22 =0x38
763 11:35:21.009962 Write Rank1 MR14 =0x5d
764 11:35:21.013000 Write Rank1 MR3 =0x30
765 11:35:21.016397 Write Rank1 MR13 =0x58
766 11:35:21.016515 Write Rank1 MR12 =0x5d
767 11:35:21.020399 Write Rank1 MR1 =0x56
768 11:35:21.020478 Write Rank1 MR2 =0x2d
769 11:35:21.023558 Write Rank1 MR11 =0x23
770 11:35:21.026423 Write Rank1 MR22 =0x34
771 11:35:21.026522 Write Rank1 MR14 =0x10
772 11:35:21.029729 Write Rank1 MR3 =0x30
773 11:35:21.033072 Write Rank1 MR13 =0xd8
774 11:35:21.033209 match AC timing 3
775 11:35:21.043860 [DdrUpdateACTimingReg] Freq = 1600, tRFCab = 141, tRFCab_05T = 0, TXREFCNT = 159, tRFCpb = 65, tRFCpb_05T = 0
776 11:35:21.043939 DramC Write-DBI off
777 11:35:21.046762 DramC Read-DBI off
778 11:35:21.050003 Write Rank0 MR13 =0x59
779 11:35:21.050078 ==
780 11:35:21.053569 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
781 11:35:21.056824 fsp= 1, odt_onoff= 1, Byte mode= 0
782 11:35:21.056922 ==
783 11:35:21.060425 === u2Vref_new: 0x56 --> 0x2d
784 11:35:21.063486 === u2Vref_new: 0x58 --> 0x38
785 11:35:21.066777 === u2Vref_new: 0x5a --> 0x39
786 11:35:21.070237 === u2Vref_new: 0x5c --> 0x3c
787 11:35:21.073708 === u2Vref_new: 0x5e --> 0x3d
788 11:35:21.076586 === u2Vref_new: 0x60 --> 0xa0
789 11:35:21.080034 [CA 0] Center 33 (4~63) winsize 60
790 11:35:21.083578 [CA 1] Center 34 (5~63) winsize 59
791 11:35:21.083676 [CA 2] Center 29 (1~57) winsize 57
792 11:35:21.086931 [CA 3] Center 24 (-3~51) winsize 55
793 11:35:21.090034 [CA 4] Center 25 (-2~52) winsize 55
794 11:35:21.093511 [CA 5] Center 29 (2~57) winsize 56
795 11:35:21.093587
796 11:35:21.097039 [CATrainingPosCal] consider 1 rank data
797 11:35:21.099913 u2DelayCellTimex100 = 762/100 ps
798 11:35:21.103175 CA0 delay=33 (4~63),Diff = 9 PI (11 cell)
799 11:35:21.107120 CA1 delay=34 (5~63),Diff = 10 PI (12 cell)
800 11:35:21.113520 CA2 delay=29 (1~57),Diff = 5 PI (6 cell)
801 11:35:21.116759 CA3 delay=24 (-3~51),Diff = 0 PI (0 cell)
802 11:35:21.119913 CA4 delay=25 (-2~52),Diff = 1 PI (1 cell)
803 11:35:21.123588 CA5 delay=29 (2~57),Diff = 5 PI (6 cell)
804 11:35:21.123663
805 11:35:21.126679 CA PerBit enable=1, Macro0, CA PI delay=24
806 11:35:21.130241 === u2Vref_new: 0x56 --> 0x2d
807 11:35:21.130316
808 11:35:21.130379 Vref(ca) range 1: 22
809 11:35:21.133497
810 11:35:21.133589 CS Dly= 10 (41-0-32)
811 11:35:21.136809 Write Rank0 MR13 =0xd8
812 11:35:21.136965 Write Rank0 MR13 =0xd8
813 11:35:21.140443 Write Rank0 MR12 =0x56
814 11:35:21.143981 Write Rank1 MR13 =0x59
815 11:35:21.144056 ==
816 11:35:21.147019 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
817 11:35:21.150581 fsp= 1, odt_onoff= 1, Byte mode= 0
818 11:35:21.150657 ==
819 11:35:21.153789 === u2Vref_new: 0x56 --> 0x2d
820 11:35:21.157144 === u2Vref_new: 0x58 --> 0x38
821 11:35:21.160218 === u2Vref_new: 0x5a --> 0x39
822 11:35:21.163551 === u2Vref_new: 0x5c --> 0x3c
823 11:35:21.166934 === u2Vref_new: 0x5e --> 0x3d
824 11:35:21.170234 === u2Vref_new: 0x60 --> 0xa0
825 11:35:21.173396 [CA 0] Center 34 (5~63) winsize 59
826 11:35:21.177299 [CA 1] Center 35 (7~63) winsize 57
827 11:35:21.180232 [CA 2] Center 29 (1~58) winsize 58
828 11:35:21.180330 [CA 3] Center 23 (-4~50) winsize 55
829 11:35:21.183788 [CA 4] Center 24 (-3~52) winsize 56
830 11:35:21.187117 [CA 5] Center 30 (1~59) winsize 59
831 11:35:21.187191
832 11:35:21.190321 [CATrainingPosCal] consider 2 rank data
833 11:35:21.193966 u2DelayCellTimex100 = 762/100 ps
834 11:35:21.197493 CA0 delay=34 (5~63),Diff = 11 PI (14 cell)
835 11:35:21.204322 CA1 delay=35 (7~63),Diff = 12 PI (15 cell)
836 11:35:21.207150 CA2 delay=29 (1~57),Diff = 6 PI (7 cell)
837 11:35:21.210430 CA3 delay=23 (-3~50),Diff = 0 PI (0 cell)
838 11:35:21.213780 CA4 delay=25 (-2~52),Diff = 2 PI (2 cell)
839 11:35:21.217470 CA5 delay=29 (2~57),Diff = 6 PI (7 cell)
840 11:35:21.217547
841 11:35:21.220977 CA PerBit enable=1, Macro0, CA PI delay=23
842 11:35:21.224102 === u2Vref_new: 0x56 --> 0x2d
843 11:35:21.224177
844 11:35:21.227322 Vref(ca) range 1: 22
845 11:35:21.227398
846 11:35:21.227455 CS Dly= 11 (42-0-32)
847 11:35:21.230826 Write Rank1 MR13 =0xd8
848 11:35:21.230900 Write Rank1 MR13 =0xd8
849 11:35:21.234693 Write Rank1 MR12 =0x56
850 11:35:21.238024 [RankSwap] Rank num 2, (Multi 1), Rank 0
851 11:35:21.240547 Write Rank0 MR2 =0xad
852 11:35:21.240622 [Write Leveling]
853 11:35:21.243861 delay byte0 byte1 byte2 byte3
854 11:35:21.243934
855 11:35:21.247646 10 0 0
856 11:35:21.247722 11 0 0
857 11:35:21.247781 12 0 0
858 11:35:21.250959 13 0 0
859 11:35:21.251035 14 0 0
860 11:35:21.254329 15 0 0
861 11:35:21.254404 16 0 0
862 11:35:21.254463 17 0 0
863 11:35:21.257721 18 0 0
864 11:35:21.257797 19 0 0
865 11:35:21.261018 20 0 0
866 11:35:21.261119 21 0 0
867 11:35:21.261246 22 0 0
868 11:35:21.264394 23 0 0
869 11:35:21.264493 24 0 0
870 11:35:21.267539 25 0 0
871 11:35:21.267615 26 0 0
872 11:35:21.271147 27 0 0
873 11:35:21.271224 28 0 0
874 11:35:21.271282 29 0 ff
875 11:35:21.274311 30 0 ff
876 11:35:21.274387 31 0 ff
877 11:35:21.278204 32 0 ff
878 11:35:21.278281 33 ff ff
879 11:35:21.281004 34 ff ff
880 11:35:21.281105 35 ff ff
881 11:35:21.284450 36 ff ff
882 11:35:21.284526 37 ff ff
883 11:35:21.284585 38 ff ff
884 11:35:21.287517 39 ff ff
885 11:35:21.291223 pass bytecount = 0xff (0xff: all bytes pass)
886 11:35:21.291297
887 11:35:21.294778 DQS0 dly: 33
888 11:35:21.294851 DQS1 dly: 29
889 11:35:21.297593 Write Rank0 MR2 =0x2d
890 11:35:21.301311 [RankSwap] Rank num 2, (Multi 1), Rank 0
891 11:35:21.301396 Write Rank0 MR1 =0xd6
892 11:35:21.301454 [Gating]
893 11:35:21.304425 ==
894 11:35:21.308095 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
895 11:35:21.310962 fsp= 1, odt_onoff= 1, Byte mode= 0
896 11:35:21.311041 ==
897 11:35:21.314223 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
898 11:35:21.321594 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
899 11:35:21.324626 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
900 11:35:21.327697 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
901 11:35:21.334411 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
902 11:35:21.338042 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
903 11:35:21.341058 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
904 11:35:21.344411 3 1 28 |2c2c 2c2b |(11 10)(11 11) |(1 0)(1 0)| 0
905 11:35:21.350939 3 2 0 |a0a 2c2b |(11 11)(11 11) |(0 0)(1 0)| 0
906 11:35:21.354749 3 2 4 |3534 909 |(11 11)(11 11) |(0 0)(0 0)| 0
907 11:35:21.357884 3 2 8 |3534 1b1b |(11 11)(11 11) |(0 0)(0 0)| 0
908 11:35:21.365044 3 2 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
909 11:35:21.367756 3 2 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
910 11:35:21.371302 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
911 11:35:21.377861 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
912 11:35:21.381638 3 2 28 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
913 11:35:21.384696 3 3 0 |3534 3534 |(11 11)(11 11) |(1 1)(0 0)| 0
914 11:35:21.388466 3 3 4 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
915 11:35:21.395191 3 3 8 |3534 3534 |(11 11)(11 11) |(0 0)(1 1)| 0
916 11:35:21.398170 3 3 12 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
917 11:35:21.401534 3 3 16 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
918 11:35:21.408436 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
919 11:35:21.411301 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
920 11:35:21.414759 3 3 28 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
921 11:35:21.421505 3 4 0 |403 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
922 11:35:21.424766 3 4 4 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
923 11:35:21.427908 3 4 8 |3d3d 2121 |(11 11)(11 11) |(1 1)(1 1)| 0
924 11:35:21.431716 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
925 11:35:21.438305 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
926 11:35:21.441751 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
927 11:35:21.444902 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
928 11:35:21.451659 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
929 11:35:21.454928 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
930 11:35:21.458560 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
931 11:35:21.465040 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
932 11:35:21.468764 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
933 11:35:21.471614 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
934 11:35:21.475061 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
935 11:35:21.482132 [Byte 0] Lead/lag falling Transition (3, 5, 20)
936 11:35:21.485041 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
937 11:35:21.488387 [Byte 1] Lead/lag falling Transition (3, 5, 24)
938 11:35:21.495709 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
939 11:35:21.498839 [Byte 0] Lead/lag Transition tap number (3)
940 11:35:21.502124 [Byte 1] Lead/lag Transition tap number (2)
941 11:35:21.505822 3 6 0 |202 3d3d |(11 11)(11 11) |(0 0)(0 0)| 0
942 11:35:21.508930 3 6 4 |4646 3d3d |(0 0)(11 11) |(0 0)(0 0)| 0
943 11:35:21.511692 [Byte 0]First pass (3, 6, 4)
944 11:35:21.515719 3 6 8 |4646 3030 |(0 0)(1 1) |(0 0)(0 0)| 0
945 11:35:21.521644 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
946 11:35:21.521727 [Byte 1]First pass (3, 6, 12)
947 11:35:21.528283 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
948 11:35:21.531894 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
949 11:35:21.535392 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
950 11:35:21.538535 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
951 11:35:21.542042 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
952 11:35:21.548871 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
953 11:35:21.551987 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
954 11:35:21.555424 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
955 11:35:21.559119 All bytes gating window > 1UI, Early break!
956 11:35:21.559251
957 11:35:21.561958 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 26)
958 11:35:21.562080
959 11:35:21.565966 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
960 11:35:21.566067
961 11:35:21.566152
962 11:35:21.568713
963 11:35:21.572600 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 26)
964 11:35:21.572700
965 11:35:21.575692 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
966 11:35:21.575783
967 11:35:21.575864
968 11:35:21.579009 Write Rank0 MR1 =0x56
969 11:35:21.579086
970 11:35:21.582337 best RODT dly(2T, 0.5T) = (2, 2)
971 11:35:21.582412
972 11:35:21.582469 best RODT dly(2T, 0.5T) = (2, 2)
973 11:35:21.585850 ==
974 11:35:21.588926 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
975 11:35:21.592522 fsp= 1, odt_onoff= 1, Byte mode= 0
976 11:35:21.592628 ==
977 11:35:21.595596 Start DQ dly to find pass range UseTestEngine =0
978 11:35:21.599151 x-axis: bit #, y-axis: DQ dly (-127~63)
979 11:35:21.603042 RX Vref Scan = 0
980 11:35:21.605973 -26, [0] xxxxxxxx xxxxxxxx [MSB]
981 11:35:21.609427 -25, [0] xxxxxxxx xxxxxxxx [MSB]
982 11:35:21.609531 -24, [0] xxxxxxxx xxxxxxxx [MSB]
983 11:35:21.612487 -23, [0] xxxxxxxx xxxxxxxx [MSB]
984 11:35:21.615902 -22, [0] xxxxxxxx xxxxxxxx [MSB]
985 11:35:21.619197 -21, [0] xxxxxxxx xxxxxxxx [MSB]
986 11:35:21.622455 -20, [0] xxxxxxxx xxxxxxxx [MSB]
987 11:35:21.625978 -19, [0] xxxxxxxx xxxxxxxx [MSB]
988 11:35:21.629863 -18, [0] xxxxxxxx xxxxxxxx [MSB]
989 11:35:21.632791 -17, [0] xxxxxxxx xxxxxxxx [MSB]
990 11:35:21.632893 -16, [0] xxxxxxxx xxxxxxxx [MSB]
991 11:35:21.636291 -15, [0] xxxxxxxx xxxxxxxx [MSB]
992 11:35:21.639206 -14, [0] xxxxxxxx xxxxxxxx [MSB]
993 11:35:21.642373 -13, [0] xxxxxxxx xxxxxxxx [MSB]
994 11:35:21.646143 -12, [0] xxxxxxxx xxxxxxxx [MSB]
995 11:35:21.649428 -11, [0] xxxxxxxx xxxxxxxx [MSB]
996 11:35:21.652864 -10, [0] xxxxxxxx xxxxxxxx [MSB]
997 11:35:21.656353 -9, [0] xxxxxxxx xxxxxxxx [MSB]
998 11:35:21.656430 -8, [0] xxxxxxxx xxxxxxxx [MSB]
999 11:35:21.659472 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1000 11:35:21.662513 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1001 11:35:21.665803 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1002 11:35:21.669368 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1003 11:35:21.672622 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1004 11:35:21.675756 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1005 11:35:21.675832 -1, [0] xxxxxxxx xxxxxxxx [MSB]
1006 11:35:21.679511 0, [0] xxxoxoxx xxxxxxxx [MSB]
1007 11:35:21.682363 1, [0] xxxoxoxx xxxoxxxx [MSB]
1008 11:35:21.686203 2, [0] xxxoxoxo xxxoxoxx [MSB]
1009 11:35:21.689086 3, [0] xxxoxooo oxxoxoox [MSB]
1010 11:35:21.692571 4, [0] xxxoxooo ooxoxooo [MSB]
1011 11:35:21.692649 5, [0] xxxoxooo ooxooooo [MSB]
1012 11:35:21.695754 6, [0] xxxoxooo ooxooooo [MSB]
1013 11:35:21.699296 7, [0] xxoooooo ooxooooo [MSB]
1014 11:35:21.702565 8, [0] xooooooo oooooooo [MSB]
1015 11:35:21.706348 9, [0] xooooooo oooooooo [MSB]
1016 11:35:21.709692 10, [0] xooooooo oooooooo [MSB]
1017 11:35:21.709771 31, [0] oooooooo oooooooo [MSB]
1018 11:35:21.712763 32, [0] oooxoooo oooooooo [MSB]
1019 11:35:21.715950 33, [0] oooxoooo oooooxoo [MSB]
1020 11:35:21.719173 34, [0] oooxoxxo oooooxxo [MSB]
1021 11:35:21.723121 35, [0] oooxoxxx xooooxxo [MSB]
1022 11:35:21.726257 36, [0] oooxoxxx xooxoxxo [MSB]
1023 11:35:21.726334 37, [0] oooxoxxx xxoxxxxx [MSB]
1024 11:35:21.729454 38, [0] oooxoxxx xxoxxxxx [MSB]
1025 11:35:21.732610 39, [0] oooxoxxx xxoxxxxx [MSB]
1026 11:35:21.736533 40, [0] xooxxxxx xxoxxxxx [MSB]
1027 11:35:21.739200 41, [0] xoxxxxxx xxoxxxxx [MSB]
1028 11:35:21.743370 42, [0] xxxxxxxx xxxxxxxx [MSB]
1029 11:35:21.746457 iDelay=42, Bit 0, Center 25 (11 ~ 39) 29
1030 11:35:21.749650 iDelay=42, Bit 1, Center 24 (8 ~ 41) 34
1031 11:35:21.752979 iDelay=42, Bit 2, Center 23 (7 ~ 40) 34
1032 11:35:21.756472 iDelay=42, Bit 3, Center 15 (0 ~ 31) 32
1033 11:35:21.760006 iDelay=42, Bit 4, Center 23 (7 ~ 39) 33
1034 11:35:21.763800 iDelay=42, Bit 5, Center 16 (0 ~ 33) 34
1035 11:35:21.766426 iDelay=42, Bit 6, Center 18 (3 ~ 33) 31
1036 11:35:21.769498 iDelay=42, Bit 7, Center 18 (2 ~ 34) 33
1037 11:35:21.772782 iDelay=42, Bit 8, Center 18 (3 ~ 34) 32
1038 11:35:21.776529 iDelay=42, Bit 9, Center 20 (4 ~ 36) 33
1039 11:35:21.779869 iDelay=42, Bit 10, Center 24 (8 ~ 41) 34
1040 11:35:21.782974 iDelay=42, Bit 11, Center 18 (1 ~ 35) 35
1041 11:35:21.789942 iDelay=42, Bit 12, Center 20 (5 ~ 36) 32
1042 11:35:21.793401 iDelay=42, Bit 13, Center 17 (2 ~ 32) 31
1043 11:35:21.796492 iDelay=42, Bit 14, Center 18 (3 ~ 33) 31
1044 11:35:21.799618 iDelay=42, Bit 15, Center 20 (4 ~ 36) 33
1045 11:35:21.799711 ==
1046 11:35:21.803535 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1047 11:35:21.806672 fsp= 1, odt_onoff= 1, Byte mode= 0
1048 11:35:21.806743 ==
1049 11:35:21.809851 DQS Delay:
1050 11:35:21.809941 DQS0 = 0, DQS1 = 0
1051 11:35:21.812958 DQM Delay:
1052 11:35:21.813079 DQM0 = 20, DQM1 = 19
1053 11:35:21.813186 DQ Delay:
1054 11:35:21.816490 DQ0 =25, DQ1 =24, DQ2 =23, DQ3 =15
1055 11:35:21.819836 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =18
1056 11:35:21.823164 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =18
1057 11:35:21.826444 DQ12 =20, DQ13 =17, DQ14 =18, DQ15 =20
1058 11:35:21.826530
1059 11:35:21.826588
1060 11:35:21.830017 DramC Write-DBI off
1061 11:35:21.830115 ==
1062 11:35:21.832974 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1063 11:35:21.836815 fsp= 1, odt_onoff= 1, Byte mode= 0
1064 11:35:21.836892 ==
1065 11:35:21.843012 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1066 11:35:21.843134
1067 11:35:21.846326 Begin, DQ Scan Range 925~1181
1068 11:35:21.846403
1069 11:35:21.846461
1070 11:35:21.846515 TX Vref Scan disable
1071 11:35:21.849984 925 |3 4 29|[0] xxxxxxxx xxxxxxxx [MSB]
1072 11:35:21.853852 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1073 11:35:21.856428 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1074 11:35:21.863733 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1075 11:35:21.866964 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1076 11:35:21.870266 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1077 11:35:21.873304 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1078 11:35:21.876633 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1079 11:35:21.879943 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1080 11:35:21.883123 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1081 11:35:21.886746 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1082 11:35:21.889951 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1083 11:35:21.893963 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1084 11:35:21.896635 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1085 11:35:21.899936 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1086 11:35:21.903363 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1087 11:35:21.906651 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1088 11:35:21.910365 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1089 11:35:21.913429 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1090 11:35:21.916835 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1091 11:35:21.920322 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1092 11:35:21.923350 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1093 11:35:21.930374 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1094 11:35:21.933411 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1095 11:35:21.936828 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1096 11:35:21.940379 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1097 11:35:21.944061 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1098 11:35:21.947415 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1099 11:35:21.950512 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1100 11:35:21.953661 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1101 11:35:21.957032 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1102 11:35:21.960847 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1103 11:35:21.964090 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1104 11:35:21.967379 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1105 11:35:21.970376 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1106 11:35:21.974048 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1107 11:35:21.977209 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1108 11:35:21.980388 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1109 11:35:21.983895 963 |3 6 3|[0] xxxxxxxx oxxoxoxx [MSB]
1110 11:35:21.987723 964 |3 6 4|[0] xxxxxxxx oxxoxoxx [MSB]
1111 11:35:21.990610 965 |3 6 5|[0] xxxxxxxx ooxoooox [MSB]
1112 11:35:21.993800 966 |3 6 6|[0] xxxxxxxx ooxoooox [MSB]
1113 11:35:21.997456 967 |3 6 7|[0] xxxxxxxx ooxoooox [MSB]
1114 11:35:22.001024 968 |3 6 8|[0] xxxxxxxx ooxooooo [MSB]
1115 11:35:22.004180 969 |3 6 9|[0] xxxoxxxx oooooooo [MSB]
1116 11:35:22.010669 970 |3 6 10|[0] xxxoxoxx oooooooo [MSB]
1117 11:35:22.014052 971 |3 6 11|[0] xxxoxoox oooooooo [MSB]
1118 11:35:22.017526 972 |3 6 12|[0] xxxoxoox oooooooo [MSB]
1119 11:35:22.020681 973 |3 6 13|[0] xxxoxoox oooooooo [MSB]
1120 11:35:22.024107 974 |3 6 14|[0] xxxoooox oooooooo [MSB]
1121 11:35:22.027351 975 |3 6 15|[0] xxoooooo oooooooo [MSB]
1122 11:35:22.031003 988 |3 6 28|[0] oooooooo xxxxxxxx [MSB]
1123 11:35:22.034237 989 |3 6 29|[0] oooooooo xxxxxxxx [MSB]
1124 11:35:22.041039 990 |3 6 30|[0] oooooooo xxxxxxxx [MSB]
1125 11:35:22.044422 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1126 11:35:22.047829 992 |3 6 32|[0] oooxoooo xxxxxxxx [MSB]
1127 11:35:22.051057 993 |3 6 33|[0] oooxoxoo xxxxxxxx [MSB]
1128 11:35:22.054496 994 |3 6 34|[0] oxxxxxxx xxxxxxxx [MSB]
1129 11:35:22.058109 995 |3 6 35|[0] xxxxxxxx xxxxxxxx [MSB]
1130 11:35:22.061588 Byte0, DQ PI dly=982, DQM PI dly= 982
1131 11:35:22.064181 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
1132 11:35:22.064257
1133 11:35:22.067803 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
1134 11:35:22.067903
1135 11:35:22.071017 Byte1, DQ PI dly=976, DQM PI dly= 976
1136 11:35:22.078149 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 16)
1137 11:35:22.078229
1138 11:35:22.081475 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 16)
1139 11:35:22.081556
1140 11:35:22.081615 ==
1141 11:35:22.088066 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1142 11:35:22.091401 fsp= 1, odt_onoff= 1, Byte mode= 0
1143 11:35:22.091480 ==
1144 11:35:22.094528 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1145 11:35:22.094605
1146 11:35:22.098020 Begin, DQ Scan Range 952~1016
1147 11:35:22.098095 Write Rank0 MR14 =0x0
1148 11:35:22.108121
1149 11:35:22.108198 CH=0, VrefRange= 0, VrefLevel = 0
1150 11:35:22.114483 TX Bit0 (978~994) 17 986, Bit8 (966~984) 19 975,
1151 11:35:22.117818 TX Bit1 (978~993) 16 985, Bit9 (968~984) 17 976,
1152 11:35:22.124591 TX Bit2 (977~993) 17 985, Bit10 (970~990) 21 980,
1153 11:35:22.127914 TX Bit3 (971~986) 16 978, Bit11 (966~984) 19 975,
1154 11:35:22.131244 TX Bit4 (976~993) 18 984, Bit12 (967~984) 18 975,
1155 11:35:22.138326 TX Bit5 (973~988) 16 980, Bit13 (967~983) 17 975,
1156 11:35:22.141389 TX Bit6 (974~988) 15 981, Bit14 (968~984) 17 976,
1157 11:35:22.145171 TX Bit7 (977~991) 15 984, Bit15 (969~986) 18 977,
1158 11:35:22.145262
1159 11:35:22.148303 Write Rank0 MR14 =0x2
1160 11:35:22.156813
1161 11:35:22.156912 CH=0, VrefRange= 0, VrefLevel = 2
1162 11:35:22.163634 TX Bit0 (977~995) 19 986, Bit8 (966~985) 20 975,
1163 11:35:22.166639 TX Bit1 (977~994) 18 985, Bit9 (967~985) 19 976,
1164 11:35:22.173434 TX Bit2 (977~993) 17 985, Bit10 (970~990) 21 980,
1165 11:35:22.176641 TX Bit3 (971~987) 17 979, Bit11 (965~984) 20 974,
1166 11:35:22.180213 TX Bit4 (976~994) 19 985, Bit12 (967~985) 19 976,
1167 11:35:22.187444 TX Bit5 (972~989) 18 980, Bit13 (966~983) 18 974,
1168 11:35:22.190116 TX Bit6 (974~989) 16 981, Bit14 (968~985) 18 976,
1169 11:35:22.193712 TX Bit7 (977~991) 15 984, Bit15 (969~987) 19 978,
1170 11:35:22.193793
1171 11:35:22.197301 Write Rank0 MR14 =0x4
1172 11:35:22.205262
1173 11:35:22.205339 CH=0, VrefRange= 0, VrefLevel = 4
1174 11:35:22.211990 TX Bit0 (978~995) 18 986, Bit8 (966~985) 20 975,
1175 11:35:22.215250 TX Bit1 (977~994) 18 985, Bit9 (967~985) 19 976,
1176 11:35:22.221952 TX Bit2 (976~993) 18 984, Bit10 (970~990) 21 980,
1177 11:35:22.225252 TX Bit3 (970~987) 18 978, Bit11 (965~985) 21 975,
1178 11:35:22.228498 TX Bit4 (976~994) 19 985, Bit12 (967~985) 19 976,
1179 11:35:22.235661 TX Bit5 (972~990) 19 981, Bit13 (966~984) 19 975,
1180 11:35:22.238731 TX Bit6 (973~990) 18 981, Bit14 (967~985) 19 976,
1181 11:35:22.242216 TX Bit7 (977~992) 16 984, Bit15 (969~988) 20 978,
1182 11:35:22.242293
1183 11:35:22.245570 Write Rank0 MR14 =0x6
1184 11:35:22.254122
1185 11:35:22.254200 CH=0, VrefRange= 0, VrefLevel = 6
1186 11:35:22.261091 TX Bit0 (977~995) 19 986, Bit8 (966~985) 20 975,
1187 11:35:22.264291 TX Bit1 (977~994) 18 985, Bit9 (967~985) 19 976,
1188 11:35:22.270681 TX Bit2 (976~994) 19 985, Bit10 (970~991) 22 980,
1189 11:35:22.274218 TX Bit3 (970~988) 19 979, Bit11 (965~985) 21 975,
1190 11:35:22.277125 TX Bit4 (976~995) 20 985, Bit12 (966~986) 21 976,
1191 11:35:22.284048 TX Bit5 (972~990) 19 981, Bit13 (966~984) 19 975,
1192 11:35:22.287354 TX Bit6 (972~991) 20 981, Bit14 (967~986) 20 976,
1193 11:35:22.291155 TX Bit7 (976~992) 17 984, Bit15 (969~988) 20 978,
1194 11:35:22.291230
1195 11:35:22.294045 Write Rank0 MR14 =0x8
1196 11:35:22.303629
1197 11:35:22.303707 CH=0, VrefRange= 0, VrefLevel = 8
1198 11:35:22.309463 TX Bit0 (977~996) 20 986, Bit8 (965~986) 22 975,
1199 11:35:22.313385 TX Bit1 (977~994) 18 985, Bit9 (967~986) 20 976,
1200 11:35:22.319361 TX Bit2 (976~994) 19 985, Bit10 (969~991) 23 980,
1201 11:35:22.323094 TX Bit3 (970~988) 19 979, Bit11 (964~985) 22 974,
1202 11:35:22.326108 TX Bit4 (975~995) 21 985, Bit12 (966~986) 21 976,
1203 11:35:22.333208 TX Bit5 (971~991) 21 981, Bit13 (965~984) 20 974,
1204 11:35:22.336400 TX Bit6 (972~991) 20 981, Bit14 (967~987) 21 977,
1205 11:35:22.339794 TX Bit7 (976~993) 18 984, Bit15 (969~989) 21 979,
1206 11:35:22.339896
1207 11:35:22.343566 Write Rank0 MR14 =0xa
1208 11:35:22.399685
1209 11:35:22.399821 CH=0, VrefRange= 0, VrefLevel = 10
1210 11:35:22.400285 TX Bit0 (977~996) 20 986, Bit8 (965~986) 22 975,
1211 11:35:22.400801 TX Bit1 (976~995) 20 985, Bit9 (966~986) 21 976,
1212 11:35:22.401109 TX Bit2 (976~994) 19 985, Bit10 (969~991) 23 980,
1213 11:35:22.401226 TX Bit3 (970~990) 21 980, Bit11 (963~986) 24 974,
1214 11:35:22.401323 TX Bit4 (975~996) 22 985, Bit12 (966~987) 22 976,
1215 11:35:22.401420 TX Bit5 (971~991) 21 981, Bit13 (965~985) 21 975,
1216 11:35:22.401689 TX Bit6 (971~991) 21 981, Bit14 (966~988) 23 977,
1217 11:35:22.402325 TX Bit7 (976~993) 18 984, Bit15 (969~989) 21 979,
1218 11:35:22.402424
1219 11:35:22.402508 Write Rank0 MR14 =0xc
1220 11:35:22.402588
1221 11:35:22.436537 CH=0, VrefRange= 0, VrefLevel = 12
1222 11:35:22.436671 TX Bit0 (977~997) 21 987, Bit8 (964~987) 24 975,
1223 11:35:22.436806 TX Bit1 (976~995) 20 985, Bit9 (966~987) 22 976,
1224 11:35:22.437075 TX Bit2 (976~995) 20 985, Bit10 (970~991) 22 980,
1225 11:35:22.437179 TX Bit3 (969~990) 22 979, Bit11 (963~986) 24 974,
1226 11:35:22.437607 TX Bit4 (975~996) 22 985, Bit12 (966~987) 22 976,
1227 11:35:22.438333 TX Bit5 (971~991) 21 981, Bit13 (964~986) 23 975,
1228 11:35:22.438425 TX Bit6 (971~992) 22 981, Bit14 (966~988) 23 977,
1229 11:35:22.440750 TX Bit7 (976~993) 18 984, Bit15 (968~989) 22 978,
1230 11:35:22.440825
1231 11:35:22.443932 Write Rank0 MR14 =0xe
1232 11:35:22.450055
1233 11:35:22.450134 CH=0, VrefRange= 0, VrefLevel = 14
1234 11:35:22.456651 TX Bit0 (977~998) 22 987, Bit8 (964~988) 25 976,
1235 11:35:22.460093 TX Bit1 (976~996) 21 986, Bit9 (965~988) 24 976,
1236 11:35:22.466555 TX Bit2 (976~995) 20 985, Bit10 (969~991) 23 980,
1237 11:35:22.470181 TX Bit3 (969~991) 23 980, Bit11 (963~987) 25 975,
1238 11:35:22.473849 TX Bit4 (974~996) 23 985, Bit12 (965~988) 24 976,
1239 11:35:22.480369 TX Bit5 (970~992) 23 981, Bit13 (964~986) 23 975,
1240 11:35:22.483734 TX Bit6 (971~992) 22 981, Bit14 (966~989) 24 977,
1241 11:35:22.486928 TX Bit7 (975~994) 20 984, Bit15 (968~990) 23 979,
1242 11:35:22.487028
1243 11:35:22.489941 Write Rank0 MR14 =0x10
1244 11:35:22.499290
1245 11:35:22.502615 CH=0, VrefRange= 0, VrefLevel = 16
1246 11:35:22.506140 TX Bit0 (976~998) 23 987, Bit8 (963~988) 26 975,
1247 11:35:22.509325 TX Bit1 (976~996) 21 986, Bit9 (965~988) 24 976,
1248 11:35:22.516094 TX Bit2 (975~996) 22 985, Bit10 (969~992) 24 980,
1249 11:35:22.519480 TX Bit3 (969~991) 23 980, Bit11 (962~987) 26 974,
1250 11:35:22.522790 TX Bit4 (974~997) 24 985, Bit12 (965~989) 25 977,
1251 11:35:22.529316 TX Bit5 (970~992) 23 981, Bit13 (963~986) 24 974,
1252 11:35:22.533002 TX Bit6 (971~993) 23 982, Bit14 (965~989) 25 977,
1253 11:35:22.536102 TX Bit7 (975~994) 20 984, Bit15 (968~990) 23 979,
1254 11:35:22.539541
1255 11:35:22.539620 Write Rank0 MR14 =0x12
1256 11:35:22.548806
1257 11:35:22.552315 CH=0, VrefRange= 0, VrefLevel = 18
1258 11:35:22.555786 TX Bit0 (976~999) 24 987, Bit8 (963~988) 26 975,
1259 11:35:22.559013 TX Bit1 (976~996) 21 986, Bit9 (965~989) 25 977,
1260 11:35:22.565671 TX Bit2 (975~996) 22 985, Bit10 (969~992) 24 980,
1261 11:35:22.568934 TX Bit3 (969~991) 23 980, Bit11 (963~988) 26 975,
1262 11:35:22.571949 TX Bit4 (974~998) 25 986, Bit12 (964~989) 26 976,
1263 11:35:22.579212 TX Bit5 (970~992) 23 981, Bit13 (964~987) 24 975,
1264 11:35:22.582036 TX Bit6 (970~993) 24 981, Bit14 (965~990) 26 977,
1265 11:35:22.585809 TX Bit7 (974~995) 22 984, Bit15 (968~990) 23 979,
1266 11:35:22.585885
1267 11:35:22.589131 Write Rank0 MR14 =0x14
1268 11:35:22.598444
1269 11:35:22.601494 CH=0, VrefRange= 0, VrefLevel = 20
1270 11:35:22.605558 TX Bit0 (976~999) 24 987, Bit8 (963~989) 27 976,
1271 11:35:22.608409 TX Bit1 (976~997) 22 986, Bit9 (964~989) 26 976,
1272 11:35:22.615225 TX Bit2 (975~997) 23 986, Bit10 (969~992) 24 980,
1273 11:35:22.618366 TX Bit3 (969~992) 24 980, Bit11 (962~988) 27 975,
1274 11:35:22.621606 TX Bit4 (973~999) 27 986, Bit12 (965~989) 25 977,
1275 11:35:22.628865 TX Bit5 (969~992) 24 980, Bit13 (962~988) 27 975,
1276 11:35:22.631605 TX Bit6 (970~993) 24 981, Bit14 (965~989) 25 977,
1277 11:35:22.635354 TX Bit7 (974~995) 22 984, Bit15 (968~990) 23 979,
1278 11:35:22.635471
1279 11:35:22.638866 Write Rank0 MR14 =0x16
1280 11:35:22.647788
1281 11:35:22.651692 CH=0, VrefRange= 0, VrefLevel = 22
1282 11:35:22.654510 TX Bit0 (976~999) 24 987, Bit8 (962~988) 27 975,
1283 11:35:22.658375 TX Bit1 (975~998) 24 986, Bit9 (964~989) 26 976,
1284 11:35:22.664408 TX Bit2 (975~997) 23 986, Bit10 (968~992) 25 980,
1285 11:35:22.667907 TX Bit3 (968~992) 25 980, Bit11 (962~989) 28 975,
1286 11:35:22.671352 TX Bit4 (974~999) 26 986, Bit12 (964~989) 26 976,
1287 11:35:22.678018 TX Bit5 (969~993) 25 981, Bit13 (962~988) 27 975,
1288 11:35:22.681692 TX Bit6 (970~993) 24 981, Bit14 (964~989) 26 976,
1289 11:35:22.684660 TX Bit7 (973~996) 24 984, Bit15 (967~991) 25 979,
1290 11:35:22.684735
1291 11:35:22.688013 Write Rank0 MR14 =0x18
1292 11:35:22.697464
1293 11:35:22.701113 CH=0, VrefRange= 0, VrefLevel = 24
1294 11:35:22.704833 TX Bit0 (976~1000) 25 988, Bit8 (963~988) 26 975,
1295 11:35:22.707818 TX Bit1 (975~998) 24 986, Bit9 (963~989) 27 976,
1296 11:35:22.714736 TX Bit2 (975~998) 24 986, Bit10 (968~992) 25 980,
1297 11:35:22.718093 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1298 11:35:22.721180 TX Bit4 (974~999) 26 986, Bit12 (964~989) 26 976,
1299 11:35:22.727481 TX Bit5 (969~993) 25 981, Bit13 (963~988) 26 975,
1300 11:35:22.731181 TX Bit6 (969~994) 26 981, Bit14 (965~989) 25 977,
1301 11:35:22.734447 TX Bit7 (973~996) 24 984, Bit15 (967~991) 25 979,
1302 11:35:22.734529
1303 11:35:22.737797 Write Rank0 MR14 =0x1a
1304 11:35:22.747143
1305 11:35:22.751057 CH=0, VrefRange= 0, VrefLevel = 26
1306 11:35:22.753682 TX Bit0 (976~1000) 25 988, Bit8 (963~988) 26 975,
1307 11:35:22.757451 TX Bit1 (975~998) 24 986, Bit9 (963~989) 27 976,
1308 11:35:22.764069 TX Bit2 (975~998) 24 986, Bit10 (968~992) 25 980,
1309 11:35:22.767875 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1310 11:35:22.770701 TX Bit4 (974~999) 26 986, Bit12 (964~989) 26 976,
1311 11:35:22.777441 TX Bit5 (969~993) 25 981, Bit13 (963~988) 26 975,
1312 11:35:22.780572 TX Bit6 (969~994) 26 981, Bit14 (965~989) 25 977,
1313 11:35:22.783865 TX Bit7 (973~996) 24 984, Bit15 (967~991) 25 979,
1314 11:35:22.783945
1315 11:35:22.787385 Write Rank0 MR14 =0x1c
1316 11:35:22.796893
1317 11:35:22.800167 CH=0, VrefRange= 0, VrefLevel = 28
1318 11:35:22.803450 TX Bit0 (976~1000) 25 988, Bit8 (963~988) 26 975,
1319 11:35:22.807022 TX Bit1 (975~998) 24 986, Bit9 (963~989) 27 976,
1320 11:35:22.813533 TX Bit2 (975~998) 24 986, Bit10 (968~992) 25 980,
1321 11:35:22.816816 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1322 11:35:22.820437 TX Bit4 (974~999) 26 986, Bit12 (964~989) 26 976,
1323 11:35:22.826927 TX Bit5 (969~993) 25 981, Bit13 (963~988) 26 975,
1324 11:35:22.830543 TX Bit6 (969~994) 26 981, Bit14 (965~989) 25 977,
1325 11:35:22.834314 TX Bit7 (973~996) 24 984, Bit15 (967~991) 25 979,
1326 11:35:22.834394
1327 11:35:22.836700 Write Rank0 MR14 =0x1e
1328 11:35:22.846811
1329 11:35:22.849696 CH=0, VrefRange= 0, VrefLevel = 30
1330 11:35:22.853331 TX Bit0 (976~1000) 25 988, Bit8 (963~988) 26 975,
1331 11:35:22.856652 TX Bit1 (975~998) 24 986, Bit9 (963~989) 27 976,
1332 11:35:22.863098 TX Bit2 (975~998) 24 986, Bit10 (968~992) 25 980,
1333 11:35:22.866451 TX Bit3 (968~992) 25 980, Bit11 (962~988) 27 975,
1334 11:35:22.869598 TX Bit4 (974~999) 26 986, Bit12 (964~989) 26 976,
1335 11:35:22.876251 TX Bit5 (969~993) 25 981, Bit13 (963~988) 26 975,
1336 11:35:22.879634 TX Bit6 (969~994) 26 981, Bit14 (965~989) 25 977,
1337 11:35:22.883199 TX Bit7 (973~996) 24 984, Bit15 (967~991) 25 979,
1338 11:35:22.886553
1339 11:35:22.886633
1340 11:35:22.889792 TX Vref found, early break! 375< 385
1341 11:35:22.893537 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1342 11:35:22.896344 u1DelayCellOfst[0]=10 cells (8 PI)
1343 11:35:22.900202 u1DelayCellOfst[1]=7 cells (6 PI)
1344 11:35:22.903671 u1DelayCellOfst[2]=7 cells (6 PI)
1345 11:35:22.906616 u1DelayCellOfst[3]=0 cells (0 PI)
1346 11:35:22.906694 u1DelayCellOfst[4]=7 cells (6 PI)
1347 11:35:22.910032 u1DelayCellOfst[5]=1 cells (1 PI)
1348 11:35:22.913032 u1DelayCellOfst[6]=1 cells (1 PI)
1349 11:35:22.916576 u1DelayCellOfst[7]=5 cells (4 PI)
1350 11:35:22.919653 Byte0, DQ PI dly=980, DQM PI dly= 984
1351 11:35:22.926709 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 20)
1352 11:35:22.926787
1353 11:35:22.929972 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 20)
1354 11:35:22.930048
1355 11:35:22.933656 u1DelayCellOfst[8]=0 cells (0 PI)
1356 11:35:22.936771 u1DelayCellOfst[9]=1 cells (1 PI)
1357 11:35:22.939764 u1DelayCellOfst[10]=6 cells (5 PI)
1358 11:35:22.943599 u1DelayCellOfst[11]=0 cells (0 PI)
1359 11:35:22.943674 u1DelayCellOfst[12]=1 cells (1 PI)
1360 11:35:22.947119 u1DelayCellOfst[13]=0 cells (0 PI)
1361 11:35:22.949939 u1DelayCellOfst[14]=2 cells (2 PI)
1362 11:35:22.953569 u1DelayCellOfst[15]=5 cells (4 PI)
1363 11:35:22.956685 Byte1, DQ PI dly=975, DQM PI dly= 977
1364 11:35:22.960249 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 15)
1365 11:35:22.963898
1366 11:35:22.966607 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 15)
1367 11:35:22.966687
1368 11:35:22.966747 Write Rank0 MR14 =0x18
1369 11:35:22.970397
1370 11:35:22.970471 Final TX Range 0 Vref 24
1371 11:35:22.970530
1372 11:35:22.976829 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
1373 11:35:22.976908
1374 11:35:22.983940 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
1375 11:35:22.990564 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1376 11:35:22.996931 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1377 11:35:23.000397 Write Rank0 MR3 =0xb0
1378 11:35:23.000471 DramC Write-DBI on
1379 11:35:23.003874 ==
1380 11:35:23.007475 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1381 11:35:23.010205 fsp= 1, odt_onoff= 1, Byte mode= 0
1382 11:35:23.010281 ==
1383 11:35:23.013821 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
1384 11:35:23.013896
1385 11:35:23.017815 Begin, DQ Scan Range 697~761
1386 11:35:23.017889
1387 11:35:23.017947
1388 11:35:23.020486 TX Vref Scan disable
1389 11:35:23.023993 697 |2 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1390 11:35:23.027531 698 |2 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1391 11:35:23.030466 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1392 11:35:23.034098 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1393 11:35:23.037515 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1394 11:35:23.040771 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1395 11:35:23.044061 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1396 11:35:23.047187 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1397 11:35:23.050458 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1398 11:35:23.053895 706 |2 6 2|[0] xxxxxxxx oooooooo [MSB]
1399 11:35:23.057423 707 |2 6 3|[0] xxxxxxxx oooooooo [MSB]
1400 11:35:23.060656 708 |2 6 4|[0] xxxxxxxx oooooooo [MSB]
1401 11:35:23.064215 709 |2 6 5|[0] xxxxxxxx oooooooo [MSB]
1402 11:35:23.067210 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
1403 11:35:23.070935 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
1404 11:35:23.074157 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
1405 11:35:23.077717 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
1406 11:35:23.084340 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
1407 11:35:23.087372 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
1408 11:35:23.094722 734 |2 6 30|[0] oooooooo xxxxxxxx [MSB]
1409 11:35:23.097954 735 |2 6 31|[0] oooooooo xxxxxxxx [MSB]
1410 11:35:23.101269 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
1411 11:35:23.104205 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
1412 11:35:23.107777 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
1413 11:35:23.111266 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
1414 11:35:23.114317 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
1415 11:35:23.117794 741 |2 6 37|[0] xxxxxxxx xxxxxxxx [MSB]
1416 11:35:23.121100 Byte0, DQ PI dly=728, DQM PI dly= 728
1417 11:35:23.124223 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 24)
1418 11:35:23.124294
1419 11:35:23.127968 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 24)
1420 11:35:23.131008
1421 11:35:23.134672 Byte1, DQ PI dly=719, DQM PI dly= 719
1422 11:35:23.138021 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 15)
1423 11:35:23.138096
1424 11:35:23.141204 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 15)
1425 11:35:23.141279
1426 11:35:23.147989 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
1427 11:35:23.154589 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
1428 11:35:23.161471 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
1429 11:35:23.164871 Write Rank0 MR3 =0x30
1430 11:35:23.164964 DramC Write-DBI off
1431 11:35:23.167623
1432 11:35:23.167698 [DATLAT]
1433 11:35:23.171271 Freq=1600, CH0 RK0, use_rxtx_scan=0
1434 11:35:23.171349
1435 11:35:23.171408 DATLAT Default: 0xf
1436 11:35:23.174933 7, 0xFFFF, sum=0
1437 11:35:23.175009 8, 0xFFFF, sum=0
1438 11:35:23.178150 9, 0xFFFF, sum=0
1439 11:35:23.178226 10, 0xFFFF, sum=0
1440 11:35:23.181439 11, 0xFFFF, sum=0
1441 11:35:23.181515 12, 0xFFFF, sum=0
1442 11:35:23.184572 13, 0xFFFF, sum=0
1443 11:35:23.184648 14, 0x0, sum=1
1444 11:35:23.187807 15, 0x0, sum=2
1445 11:35:23.187884 16, 0x0, sum=3
1446 11:35:23.187943 17, 0x0, sum=4
1447 11:35:23.194715 pattern=2 first_step=14 total pass=5 best_step=16
1448 11:35:23.194791 ==
1449 11:35:23.198038 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1450 11:35:23.201819 fsp= 1, odt_onoff= 1, Byte mode= 0
1451 11:35:23.201895 ==
1452 11:35:23.208682 Start DQ dly to find pass range UseTestEngine =1
1453 11:35:23.211387 x-axis: bit #, y-axis: DQ dly (-127~63)
1454 11:35:23.211482 RX Vref Scan = 1
1455 11:35:23.333942
1456 11:35:23.334055 RX Vref found, early break!
1457 11:35:23.334116
1458 11:35:23.338260 Final RX Vref 13, apply to both rank0 and 1
1459 11:35:23.340473 ==
1460 11:35:23.344144 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 0
1461 11:35:23.347259 fsp= 1, odt_onoff= 1, Byte mode= 0
1462 11:35:23.347336 ==
1463 11:35:23.347395 DQS Delay:
1464 11:35:23.350848 DQS0 = 0, DQS1 = 0
1465 11:35:23.350924 DQM Delay:
1466 11:35:23.354239 DQM0 = 20, DQM1 = 19
1467 11:35:23.354315 DQ Delay:
1468 11:35:23.357224 DQ0 =25, DQ1 =24, DQ2 =24, DQ3 =15
1469 11:35:23.361298 DQ4 =23, DQ5 =16, DQ6 =18, DQ7 =19
1470 11:35:23.364338 DQ8 =18, DQ9 =20, DQ10 =24, DQ11 =16
1471 11:35:23.367769 DQ12 =20, DQ13 =16, DQ14 =18, DQ15 =20
1472 11:35:23.367893
1473 11:35:23.367953
1474 11:35:23.368006
1475 11:35:23.370853 [DramC_TX_OE_Calibration] TA2
1476 11:35:23.374077 Original DQ_B0 (3 6) =30, OEN = 27
1477 11:35:23.377517 Original DQ_B1 (3 6) =30, OEN = 27
1478 11:35:23.380772 23, 0x0, End_B0=23 End_B1=23
1479 11:35:23.380869 24, 0x0, End_B0=24 End_B1=24
1480 11:35:23.384247 25, 0x0, End_B0=25 End_B1=25
1481 11:35:23.387340 26, 0x0, End_B0=26 End_B1=26
1482 11:35:23.390941 27, 0x0, End_B0=27 End_B1=27
1483 11:35:23.391050 28, 0x0, End_B0=28 End_B1=28
1484 11:35:23.394149 29, 0x0, End_B0=29 End_B1=29
1485 11:35:23.397726 30, 0x0, End_B0=30 End_B1=30
1486 11:35:23.401025 31, 0xFFFF, End_B0=30 End_B1=30
1487 11:35:23.404063 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1488 11:35:23.411038 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
1489 11:35:23.411138
1490 11:35:23.411196
1491 11:35:23.414458 Write Rank0 MR23 =0x3f
1492 11:35:23.414533 [DQSOSC]
1493 11:35:23.420757 [DQSOSCAuto] RK0, (LSB)MR18= 0xa7, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps
1494 11:35:23.428275 CH0_RK0: MR19=0x3, MR18=0xA7, DQSOSC=336, MR23=63, INC=21, DEC=32
1495 11:35:23.431295 Write Rank0 MR23 =0x3f
1496 11:35:23.431369 [DQSOSC]
1497 11:35:23.438087 [DQSOSCAuto] RK0, (LSB)MR18= 0xa9, (MSB)MR19= 0x3, tDQSOscB0 = 336 ps tDQSOscB1 = 0 ps
1498 11:35:23.442135 CH0 RK0: MR19=3, MR18=A9
1499 11:35:23.444460 [RankSwap] Rank num 2, (Multi 1), Rank 1
1500 11:35:23.444535 Write Rank0 MR2 =0xad
1501 11:35:23.447975 [Write Leveling]
1502 11:35:23.451161 delay byte0 byte1 byte2 byte3
1503 11:35:23.451284
1504 11:35:23.451386 10 0 0
1505 11:35:23.454638 11 0 0
1506 11:35:23.454749 12 0 0
1507 11:35:23.458862 13 0 0
1508 11:35:23.458978 14 0 0
1509 11:35:23.459085 15 0 0
1510 11:35:23.461397 16 0 0
1511 11:35:23.461523 17 0 0
1512 11:35:23.464860 18 0 0
1513 11:35:23.464986 19 0 0
1514 11:35:23.465106 20 0 0
1515 11:35:23.468258 21 0 0
1516 11:35:23.468391 22 0 0
1517 11:35:23.471518 23 0 0
1518 11:35:23.471667 24 0 0
1519 11:35:23.471808 25 0 0
1520 11:35:23.474959 26 0 0
1521 11:35:23.475110 27 0 0
1522 11:35:23.478199 28 0 0
1523 11:35:23.478369 29 0 0
1524 11:35:23.481691 30 0 ff
1525 11:35:23.481884 31 0 ff
1526 11:35:23.482073 32 0 ff
1527 11:35:23.485297 33 0 ff
1528 11:35:23.485458 34 ff ff
1529 11:35:23.488422 35 ff ff
1530 11:35:23.488670 36 ff ff
1531 11:35:23.492019 37 ff ff
1532 11:35:23.492309 38 ff ff
1533 11:35:23.494999 39 ff ff
1534 11:35:23.495222 40 ff ff
1535 11:35:23.498969 pass bytecount = 0xff (0xff: all bytes pass)
1536 11:35:23.499241
1537 11:35:23.501755 DQS0 dly: 34
1538 11:35:23.502046 DQS1 dly: 30
1539 11:35:23.505381 Write Rank0 MR2 =0x2d
1540 11:35:23.508397 [RankSwap] Rank num 2, (Multi 1), Rank 0
1541 11:35:23.508794 Write Rank1 MR1 =0xd6
1542 11:35:23.511938 [Gating]
1543 11:35:23.512230 ==
1544 11:35:23.515541 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1545 11:35:23.518450 fsp= 1, odt_onoff= 1, Byte mode= 0
1546 11:35:23.518748 ==
1547 11:35:23.525048 3 1 0 |2c2b 2c2b |(11 11)(11 11) |(1 1)(1 1)| 0
1548 11:35:23.528704 3 1 4 |2c2b 2c2b |(11 11)(11 11) |(0 0)(0 0)| 0
1549 11:35:23.532546 3 1 8 |2c2b 2c2b |(11 11)(11 11) |(1 0)(0 0)| 0
1550 11:35:23.535330 3 1 12 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1551 11:35:23.541865 3 1 16 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1552 11:35:23.545978 3 1 20 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1553 11:35:23.549173 3 1 24 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1554 11:35:23.555118 3 1 28 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1555 11:35:23.558702 3 2 0 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1556 11:35:23.561842 3 2 4 |2c2b 2c2b |(11 11)(11 11) |(1 0)(1 0)| 0
1557 11:35:23.568503 3 2 8 |2c2c 2c2b |(11 10)(11 11) |(1 0)(1 0)| 0
1558 11:35:23.571997 3 2 12 |1818 2c2c |(11 11)(11 0) |(0 0)(0 0)| 0
1559 11:35:23.575386 3 2 16 |3534 201 |(11 11)(11 11) |(0 0)(0 0)| 0
1560 11:35:23.579183 3 2 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1561 11:35:23.586027 3 2 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1562 11:35:23.588609 3 2 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1563 11:35:23.592167 3 3 0 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1564 11:35:23.598958 3 3 4 |3534 3534 |(11 11)(11 11) |(0 0)(0 0)| 0
1565 11:35:23.602266 3 3 8 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1566 11:35:23.605538 3 3 12 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1567 11:35:23.608949 3 3 16 |3534 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1568 11:35:23.615769 3 3 20 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1569 11:35:23.619133 3 3 24 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1570 11:35:23.622268 3 3 28 |3534 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
1571 11:35:23.629377 3 4 0 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1572 11:35:23.632282 3 4 4 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
1573 11:35:23.636649 3 4 8 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
1574 11:35:23.642588 3 4 12 |2e2d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
1575 11:35:23.646122 3 4 16 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
1576 11:35:23.649179 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1577 11:35:23.652922 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1578 11:35:23.659712 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1579 11:35:23.662763 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1580 11:35:23.666212 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1581 11:35:23.672888 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1582 11:35:23.675701 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1583 11:35:23.678996 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1584 11:35:23.685818 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1585 11:35:23.688833 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1586 11:35:23.692407 3 5 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1587 11:35:23.699132 3 6 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
1588 11:35:23.702905 [Byte 0] Lead/lag falling Transition (3, 6, 0)
1589 11:35:23.705926 3 6 4 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
1590 11:35:23.708895 [Byte 1] Lead/lag falling Transition (3, 6, 4)
1591 11:35:23.716106 3 6 8 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 0)| 0
1592 11:35:23.719302 [Byte 0] Lead/lag Transition tap number (3)
1593 11:35:23.722428 [Byte 1] Lead/lag Transition tap number (2)
1594 11:35:23.725822 3 6 12 |202 3e3d |(11 11)(11 11) |(0 0)(0 0)| 0
1595 11:35:23.729385 3 6 16 |2020 202 |(1 1)(11 11) |(0 0)(0 0)| 0
1596 11:35:23.736043 3 6 20 |4646 4040 |(0 0)(1 1) |(0 0)(0 0)| 0
1597 11:35:23.736127 [Byte 0]First pass (3, 6, 20)
1598 11:35:23.742687 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1599 11:35:23.742767 [Byte 1]First pass (3, 6, 24)
1600 11:35:23.749054 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1601 11:35:23.753173 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1602 11:35:23.756379 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1603 11:35:23.759492 3 7 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1604 11:35:23.762931 3 7 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1605 11:35:23.769959 3 7 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1606 11:35:23.772629 3 7 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1607 11:35:23.776263 3 7 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
1608 11:35:23.779599 All bytes gating window > 1UI, Early break!
1609 11:35:23.779673
1610 11:35:23.783240 best DQS0 dly(2T, 0.5T, PI) = (3, 6, 6)
1611 11:35:23.783316
1612 11:35:23.786416 best DQS1 dly(2T, 0.5T, PI) = (3, 6, 8)
1613 11:35:23.786491
1614 11:35:23.786547
1615 11:35:23.789486
1616 11:35:23.793440 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 2, 6)
1617 11:35:23.793515
1618 11:35:23.796400 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 2, 8)
1619 11:35:23.796474
1620 11:35:23.796533
1621 11:35:23.796586 Write Rank1 MR1 =0x56
1622 11:35:23.799617
1623 11:35:23.799692 best RODT dly(2T, 0.5T) = (2, 3)
1624 11:35:23.799749
1625 11:35:23.802923 best RODT dly(2T, 0.5T) = (2, 3)
1626 11:35:23.802999 ==
1627 11:35:23.809522 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1628 11:35:23.813064 fsp= 1, odt_onoff= 1, Byte mode= 0
1629 11:35:23.813146 ==
1630 11:35:23.816877 Start DQ dly to find pass range UseTestEngine =0
1631 11:35:23.819948 x-axis: bit #, y-axis: DQ dly (-127~63)
1632 11:35:23.823450 RX Vref Scan = 0
1633 11:35:23.826473 -26, [0] xxxxxxxx xxxxxxxx [MSB]
1634 11:35:23.830061 -25, [0] xxxxxxxx xxxxxxxx [MSB]
1635 11:35:23.830137 -24, [0] xxxxxxxx xxxxxxxx [MSB]
1636 11:35:23.833045 -23, [0] xxxxxxxx xxxxxxxx [MSB]
1637 11:35:23.836359 -22, [0] xxxxxxxx xxxxxxxx [MSB]
1638 11:35:23.839862 -21, [0] xxxxxxxx xxxxxxxx [MSB]
1639 11:35:23.843372 -20, [0] xxxxxxxx xxxxxxxx [MSB]
1640 11:35:23.846374 -19, [0] xxxxxxxx xxxxxxxx [MSB]
1641 11:35:23.850184 -18, [0] xxxxxxxx xxxxxxxx [MSB]
1642 11:35:23.853515 -17, [0] xxxxxxxx xxxxxxxx [MSB]
1643 11:35:23.853595 -16, [0] xxxxxxxx xxxxxxxx [MSB]
1644 11:35:23.856383 -15, [0] xxxxxxxx xxxxxxxx [MSB]
1645 11:35:23.860292 -14, [0] xxxxxxxx xxxxxxxx [MSB]
1646 11:35:23.863563 -13, [0] xxxxxxxx xxxxxxxx [MSB]
1647 11:35:23.866839 -12, [0] xxxxxxxx xxxxxxxx [MSB]
1648 11:35:23.870170 -11, [0] xxxxxxxx xxxxxxxx [MSB]
1649 11:35:23.874132 -10, [0] xxxxxxxx xxxxxxxx [MSB]
1650 11:35:23.874208 -9, [0] xxxxxxxx xxxxxxxx [MSB]
1651 11:35:23.877262 -8, [0] xxxxxxxx xxxxxxxx [MSB]
1652 11:35:23.880540 -7, [0] xxxxxxxx xxxxxxxx [MSB]
1653 11:35:23.884295 -6, [0] xxxxxxxx xxxxxxxx [MSB]
1654 11:35:23.886867 -5, [0] xxxxxxxx xxxxxxxx [MSB]
1655 11:35:23.984318 -4, [0] xxxxxxxx xxxxxxxx [MSB]
1656 11:35:23.984716 -3, [0] xxxxxxxx xxxxxxxx [MSB]
1657 11:35:23.985418 -2, [0] xxxxxxxx xxxxxxxx [MSB]
1658 11:35:23.985716 -1, [0] xxxoxxxx xxxoxxxx [MSB]
1659 11:35:23.986032 0, [0] xxxoxoxx oxxoxoxx [MSB]
1660 11:35:23.986340 1, [0] xxxoxoxx ooxoooox [MSB]
1661 11:35:23.986643 2, [0] xxxoxooo ooxoooox [MSB]
1662 11:35:23.986939 3, [0] xxxoxooo ooxooooo [MSB]
1663 11:35:23.987231 4, [0] xxxoxooo ooxooooo [MSB]
1664 11:35:23.987521 5, [0] xxxoxooo ooxooooo [MSB]
1665 11:35:23.987810 6, [0] xxxooooo oooooooo [MSB]
1666 11:35:23.988218 7, [0] xooooooo oooooooo [MSB]
1667 11:35:23.988515 8, [0] xooooooo oooooooo [MSB]
1668 11:35:23.988804 34, [0] oooooooo oooooooo [MSB]
1669 11:35:23.989093 35, [0] oooxoooo oooxoxoo [MSB]
1670 11:35:23.989336 36, [0] oooxoxoo oooxoxxo [MSB]
1671 11:35:23.989402 37, [0] oooxoxxx xooxoxxo [MSB]
1672 11:35:23.989468 38, [0] oooxoxxx xxoxxxxo [MSB]
1673 11:35:23.989535 39, [0] oooxoxxx xxoxxxxx [MSB]
1674 11:35:23.989601 40, [0] oooxoxxx xxoxxxxx [MSB]
1675 11:35:23.989668 41, [0] oooxoxxx xxoxxxxx [MSB]
1676 11:35:23.989753 42, [0] oooxxxxx xxoxxxxx [MSB]
1677 11:35:23.989838 43, [0] xoxxxxxx xxoxxxxx [MSB]
1678 11:35:23.989923 44, [0] xxxxxxxx xxxxxxxx [MSB]
1679 11:35:23.990007 iDelay=44, Bit 0, Center 25 (9 ~ 42) 34
1680 11:35:23.990089 iDelay=44, Bit 1, Center 25 (7 ~ 43) 37
1681 11:35:23.990171 iDelay=44, Bit 2, Center 24 (7 ~ 42) 36
1682 11:35:23.990254 iDelay=44, Bit 3, Center 16 (-1 ~ 34) 36
1683 11:35:23.990336 iDelay=44, Bit 4, Center 23 (6 ~ 41) 36
1684 11:35:23.990418 iDelay=44, Bit 5, Center 17 (0 ~ 35) 36
1685 11:35:23.990499 iDelay=44, Bit 6, Center 19 (2 ~ 36) 35
1686 11:35:23.990581 iDelay=44, Bit 7, Center 19 (2 ~ 36) 35
1687 11:35:23.990677 iDelay=44, Bit 8, Center 18 (0 ~ 36) 37
1688 11:35:23.990759 iDelay=44, Bit 9, Center 19 (1 ~ 37) 37
1689 11:35:23.993763 iDelay=44, Bit 10, Center 24 (6 ~ 43) 38
1690 11:35:23.997109 iDelay=44, Bit 11, Center 16 (-1 ~ 34) 36
1691 11:35:24.000795 iDelay=44, Bit 12, Center 19 (1 ~ 37) 37
1692 11:35:24.004187 iDelay=44, Bit 13, Center 17 (0 ~ 34) 35
1693 11:35:24.007307 iDelay=44, Bit 14, Center 18 (1 ~ 35) 35
1694 11:35:24.010545 iDelay=44, Bit 15, Center 20 (3 ~ 38) 36
1695 11:35:24.010628 ==
1696 11:35:24.017585 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1697 11:35:24.020712 fsp= 1, odt_onoff= 1, Byte mode= 0
1698 11:35:24.020814 ==
1699 11:35:24.020899 DQS Delay:
1700 11:35:24.023988 DQS0 = 0, DQS1 = 0
1701 11:35:24.024080 DQM Delay:
1702 11:35:24.024162 DQM0 = 21, DQM1 = 18
1703 11:35:24.027376 DQ Delay:
1704 11:35:24.030963 DQ0 =25, DQ1 =25, DQ2 =24, DQ3 =16
1705 11:35:24.034578 DQ4 =23, DQ5 =17, DQ6 =19, DQ7 =19
1706 11:35:24.034652 DQ8 =18, DQ9 =19, DQ10 =24, DQ11 =16
1707 11:35:24.041461 DQ12 =19, DQ13 =17, DQ14 =18, DQ15 =20
1708 11:35:24.041535
1709 11:35:24.041592
1710 11:35:24.041645 DramC Write-DBI off
1711 11:35:24.041697 ==
1712 11:35:24.047546 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1713 11:35:24.050803 fsp= 1, odt_onoff= 1, Byte mode= 0
1714 11:35:24.050883 ==
1715 11:35:24.054247 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
1716 11:35:24.054333
1717 11:35:24.058050 Begin, DQ Scan Range 926~1182
1718 11:35:24.058144
1719 11:35:24.058216
1720 11:35:24.061266 TX Vref Scan disable
1721 11:35:24.064362 926 |3 4 30|[0] xxxxxxxx xxxxxxxx [MSB]
1722 11:35:24.068130 927 |3 4 31|[0] xxxxxxxx xxxxxxxx [MSB]
1723 11:35:24.071515 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
1724 11:35:24.074562 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
1725 11:35:24.078190 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
1726 11:35:24.081522 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
1727 11:35:24.084807 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
1728 11:35:24.088281 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
1729 11:35:24.091634 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
1730 11:35:24.095256 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
1731 11:35:24.098172 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
1732 11:35:24.102121 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
1733 11:35:24.104927 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
1734 11:35:24.108979 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
1735 11:35:24.111815 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
1736 11:35:24.115624 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
1737 11:35:24.118325 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
1738 11:35:24.121979 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
1739 11:35:24.128526 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
1740 11:35:24.132177 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
1741 11:35:24.135765 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
1742 11:35:24.139087 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
1743 11:35:24.142217 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
1744 11:35:24.145285 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
1745 11:35:24.148814 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
1746 11:35:24.152056 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
1747 11:35:24.155298 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
1748 11:35:24.158882 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
1749 11:35:24.162386 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
1750 11:35:24.165809 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
1751 11:35:24.169438 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
1752 11:35:24.173132 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
1753 11:35:24.176325 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
1754 11:35:24.179344 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
1755 11:35:24.183021 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
1756 11:35:24.185618 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
1757 11:35:24.188977 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
1758 11:35:24.192815 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
1759 11:35:24.195441 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
1760 11:35:24.202311 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
1761 11:35:24.205813 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
1762 11:35:24.209199 967 |3 6 7|[0] xxxxxxxx xxxoooxx [MSB]
1763 11:35:24.212396 968 |3 6 8|[0] xxxxxxxx ooxoooox [MSB]
1764 11:35:24.215630 969 |3 6 9|[0] xxxxxxxx ooxoooox [MSB]
1765 11:35:24.219168 970 |3 6 10|[0] xxxxxxxx ooxooooo [MSB]
1766 11:35:24.222401 971 |3 6 11|[0] xxxxxxxx ooxooooo [MSB]
1767 11:35:24.226625 972 |3 6 12|[0] xxxoxxxx ooxooooo [MSB]
1768 11:35:24.229221 973 |3 6 13|[0] xxxoxxxx oooooooo [MSB]
1769 11:35:24.232660 974 |3 6 14|[0] xxxoxoox oooooooo [MSB]
1770 11:35:24.236216 975 |3 6 15|[0] xxxoxoox oooooooo [MSB]
1771 11:35:24.239208 976 |3 6 16|[0] xxxoxoox oooooooo [MSB]
1772 11:35:24.242616 977 |3 6 17|[0] xxxooooo oooooooo [MSB]
1773 11:35:24.250103 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
1774 11:35:24.253490 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
1775 11:35:24.256638 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
1776 11:35:24.259890 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
1777 11:35:24.263049 995 |3 6 35|[0] oooooxoo xxxxxxxx [MSB]
1778 11:35:24.266829 996 |3 6 36|[0] oooxoxoo xxxxxxxx [MSB]
1779 11:35:24.270167 997 |3 6 37|[0] oooxoxxo xxxxxxxx [MSB]
1780 11:35:24.273312 998 |3 6 38|[0] xxxxxxxx xxxxxxxx [MSB]
1781 11:35:24.276535 Byte0, DQ PI dly=985, DQM PI dly= 985
1782 11:35:24.279995 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
1783 11:35:24.280348
1784 11:35:24.286708 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
1785 11:35:24.287060
1786 11:35:24.290029 Byte1, DQ PI dly=979, DQM PI dly= 979
1787 11:35:24.293558 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
1788 11:35:24.293910
1789 11:35:24.296568 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
1790 11:35:24.296922
1791 11:35:24.297232 ==
1792 11:35:24.303514 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
1793 11:35:24.306938 fsp= 1, odt_onoff= 1, Byte mode= 0
1794 11:35:24.307294 ==
1795 11:35:24.310439 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
1796 11:35:24.310802
1797 11:35:24.313769 Begin, DQ Scan Range 955~1019
1798 11:35:24.317034 Write Rank1 MR14 =0x0
1799 11:35:24.324083
1800 11:35:24.324437 CH=0, VrefRange= 0, VrefLevel = 0
1801 11:35:24.330677 TX Bit0 (981~999) 19 990, Bit8 (969~986) 18 977,
1802 11:35:24.334109 TX Bit1 (979~997) 19 988, Bit9 (970~987) 18 978,
1803 11:35:24.340985 TX Bit2 (979~996) 18 987, Bit10 (975~991) 17 983,
1804 11:35:24.344609 TX Bit3 (974~991) 18 982, Bit11 (968~986) 19 977,
1805 11:35:24.347259 TX Bit4 (979~997) 19 988, Bit12 (969~987) 19 978,
1806 11:35:24.353983 TX Bit5 (977~991) 15 984, Bit13 (969~985) 17 977,
1807 11:35:24.357532 TX Bit6 (976~992) 17 984, Bit14 (969~986) 18 977,
1808 11:35:24.360798 TX Bit7 (978~993) 16 985, Bit15 (974~990) 17 982,
1809 11:35:24.360946
1810 11:35:24.363821 Write Rank1 MR14 =0x2
1811 11:35:24.373051
1812 11:35:24.373223 CH=0, VrefRange= 0, VrefLevel = 2
1813 11:35:24.379585 TX Bit0 (980~999) 20 989, Bit8 (969~987) 19 978,
1814 11:35:24.382985 TX Bit1 (979~998) 20 988, Bit9 (969~988) 20 978,
1815 11:35:24.389837 TX Bit2 (979~997) 19 988, Bit10 (975~991) 17 983,
1816 11:35:24.393114 TX Bit3 (974~992) 19 983, Bit11 (968~987) 20 977,
1817 11:35:24.396781 TX Bit4 (978~998) 21 988, Bit12 (969~988) 20 978,
1818 11:35:24.403177 TX Bit5 (976~991) 16 983, Bit13 (969~986) 18 977,
1819 11:35:24.406464 TX Bit6 (977~993) 17 985, Bit14 (970~987) 18 978,
1820 11:35:24.409632 TX Bit7 (978~995) 18 986, Bit15 (973~990) 18 981,
1821 11:35:24.409719
1822 11:35:24.413045 Write Rank1 MR14 =0x4
1823 11:35:24.422352
1824 11:35:24.422500 CH=0, VrefRange= 0, VrefLevel = 4
1825 11:35:24.428795 TX Bit0 (979~999) 21 989, Bit8 (969~988) 20 978,
1826 11:35:24.432136 TX Bit1 (978~998) 21 988, Bit9 (969~988) 20 978,
1827 11:35:24.438973 TX Bit2 (978~998) 21 988, Bit10 (974~992) 19 983,
1828 11:35:24.442222 TX Bit3 (974~992) 19 983, Bit11 (968~987) 20 977,
1829 11:35:24.445240 TX Bit4 (978~998) 21 988, Bit12 (969~989) 21 979,
1830 11:35:24.452270 TX Bit5 (976~991) 16 983, Bit13 (968~987) 20 977,
1831 11:35:24.455988 TX Bit6 (976~993) 18 984, Bit14 (969~988) 20 978,
1832 11:35:24.459153 TX Bit7 (978~995) 18 986, Bit15 (972~990) 19 981,
1833 11:35:24.459251
1834 11:35:24.462498 Write Rank1 MR14 =0x6
1835 11:35:24.470962
1836 11:35:24.471053 CH=0, VrefRange= 0, VrefLevel = 6
1837 11:35:24.478031 TX Bit0 (979~999) 21 989, Bit8 (968~988) 21 978,
1838 11:35:24.481240 TX Bit1 (979~998) 20 988, Bit9 (969~990) 22 979,
1839 11:35:24.487729 TX Bit2 (978~998) 21 988, Bit10 (974~992) 19 983,
1840 11:35:24.490996 TX Bit3 (973~992) 20 982, Bit11 (968~988) 21 978,
1841 11:35:24.494576 TX Bit4 (978~998) 21 988, Bit12 (969~989) 21 979,
1842 11:35:24.500916 TX Bit5 (976~992) 17 984, Bit13 (968~987) 20 977,
1843 11:35:24.504712 TX Bit6 (976~993) 18 984, Bit14 (969~989) 21 979,
1844 11:35:24.507617 TX Bit7 (978~995) 18 986, Bit15 (972~990) 19 981,
1845 11:35:24.507712
1846 11:35:24.511284 Write Rank1 MR14 =0x8
1847 11:35:24.520237
1848 11:35:24.520332 CH=0, VrefRange= 0, VrefLevel = 8
1849 11:35:24.526577 TX Bit0 (979~1000) 22 989, Bit8 (968~989) 22 978,
1850 11:35:24.530027 TX Bit1 (978~999) 22 988, Bit9 (969~990) 22 979,
1851 11:35:24.537267 TX Bit2 (978~998) 21 988, Bit10 (974~992) 19 983,
1852 11:35:24.540000 TX Bit3 (972~993) 22 982, Bit11 (968~989) 22 978,
1853 11:35:24.543408 TX Bit4 (978~999) 22 988, Bit12 (968~990) 23 979,
1854 11:35:24.550050 TX Bit5 (976~992) 17 984, Bit13 (968~988) 21 978,
1855 11:35:24.553908 TX Bit6 (975~994) 20 984, Bit14 (969~989) 21 979,
1856 11:35:24.556626 TX Bit7 (977~996) 20 986, Bit15 (971~991) 21 981,
1857 11:35:24.556705
1858 11:35:24.559897 Write Rank1 MR14 =0xa
1859 11:35:24.569286
1860 11:35:24.569371 CH=0, VrefRange= 0, VrefLevel = 10
1861 11:35:24.575730 TX Bit0 (979~1000) 22 989, Bit8 (968~989) 22 978,
1862 11:35:24.579227 TX Bit1 (978~999) 22 988, Bit9 (969~990) 22 979,
1863 11:35:24.586296 TX Bit2 (978~999) 22 988, Bit10 (974~993) 20 983,
1864 11:35:24.589444 TX Bit3 (972~993) 22 982, Bit11 (968~989) 22 978,
1865 11:35:24.592585 TX Bit4 (978~999) 22 988, Bit12 (968~990) 23 979,
1866 11:35:24.599427 TX Bit5 (975~992) 18 983, Bit13 (968~989) 22 978,
1867 11:35:24.602851 TX Bit6 (975~995) 21 985, Bit14 (969~990) 22 979,
1868 11:35:24.606033 TX Bit7 (977~997) 21 987, Bit15 (971~991) 21 981,
1869 11:35:24.606120
1870 11:35:24.609513 Write Rank1 MR14 =0xc
1871 11:35:24.618347
1872 11:35:24.621802 CH=0, VrefRange= 0, VrefLevel = 12
1873 11:35:24.625268 TX Bit0 (978~1000) 23 989, Bit8 (968~990) 23 979,
1874 11:35:24.628373 TX Bit1 (978~999) 22 988, Bit9 (968~990) 23 979,
1875 11:35:24.635256 TX Bit2 (978~999) 22 988, Bit10 (973~993) 21 983,
1876 11:35:24.638487 TX Bit3 (971~994) 24 982, Bit11 (967~990) 24 978,
1877 11:35:24.641861 TX Bit4 (978~999) 22 988, Bit12 (968~990) 23 979,
1878 11:35:24.648646 TX Bit5 (975~993) 19 984, Bit13 (967~989) 23 978,
1879 11:35:24.651995 TX Bit6 (975~995) 21 985, Bit14 (968~990) 23 979,
1880 11:35:24.655935 TX Bit7 (977~997) 21 987, Bit15 (971~991) 21 981,
1881 11:35:24.656012
1882 11:35:24.658639 Write Rank1 MR14 =0xe
1883 11:35:24.667798
1884 11:35:24.671923 CH=0, VrefRange= 0, VrefLevel = 14
1885 11:35:24.674793 TX Bit0 (979~1001) 23 990, Bit8 (968~990) 23 979,
1886 11:35:24.677862 TX Bit1 (978~999) 22 988, Bit9 (969~991) 23 980,
1887 11:35:24.684952 TX Bit2 (978~999) 22 988, Bit10 (973~993) 21 983,
1888 11:35:24.687897 TX Bit3 (971~994) 24 982, Bit11 (967~990) 24 978,
1889 11:35:24.691793 TX Bit4 (978~1000) 23 989, Bit12 (968~990) 23 979,
1890 11:35:24.698328 TX Bit5 (974~994) 21 984, Bit13 (967~989) 23 978,
1891 11:35:24.701720 TX Bit6 (974~996) 23 985, Bit14 (968~990) 23 979,
1892 11:35:24.704842 TX Bit7 (977~998) 22 987, Bit15 (971~991) 21 981,
1893 11:35:24.705064
1894 11:35:24.708605 Write Rank1 MR14 =0x10
1895 11:35:24.717681
1896 11:35:24.718037 CH=0, VrefRange= 0, VrefLevel = 16
1897 11:35:24.724624 TX Bit0 (978~1001) 24 989, Bit8 (968~990) 23 979,
1898 11:35:24.727827 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
1899 11:35:24.734616 TX Bit2 (977~999) 23 988, Bit10 (973~994) 22 983,
1900 11:35:24.738444 TX Bit3 (970~995) 26 982, Bit11 (967~990) 24 978,
1901 11:35:24.741585 TX Bit4 (977~1000) 24 988, Bit12 (968~991) 24 979,
1902 11:35:24.747933 TX Bit5 (973~994) 22 983, Bit13 (967~990) 24 978,
1903 11:35:24.751193 TX Bit6 (974~996) 23 985, Bit14 (968~990) 23 979,
1904 11:35:24.754712 TX Bit7 (976~998) 23 987, Bit15 (970~992) 23 981,
1905 11:35:24.755198
1906 11:35:24.758353 Write Rank1 MR14 =0x12
1907 11:35:24.767401
1908 11:35:24.770612 CH=0, VrefRange= 0, VrefLevel = 18
1909 11:35:24.774202 TX Bit0 (978~1001) 24 989, Bit8 (967~990) 24 978,
1910 11:35:24.777229 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1911 11:35:24.784229 TX Bit2 (978~999) 22 988, Bit10 (972~994) 23 983,
1912 11:35:24.787547 TX Bit3 (970~995) 26 982, Bit11 (967~990) 24 978,
1913 11:35:24.790634 TX Bit4 (977~1000) 24 988, Bit12 (968~991) 24 979,
1914 11:35:24.797504 TX Bit5 (973~995) 23 984, Bit13 (967~990) 24 978,
1915 11:35:24.800594 TX Bit6 (973~997) 25 985, Bit14 (968~991) 24 979,
1916 11:35:24.803901 TX Bit7 (976~999) 24 987, Bit15 (969~992) 24 980,
1917 11:35:24.807521
1918 11:35:24.807638 Write Rank1 MR14 =0x14
1919 11:35:24.816833
1920 11:35:24.816942 CH=0, VrefRange= 0, VrefLevel = 20
1921 11:35:24.823997 TX Bit0 (978~1002) 25 990, Bit8 (967~990) 24 978,
1922 11:35:24.826941 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1923 11:35:24.833595 TX Bit2 (977~1000) 24 988, Bit10 (972~995) 24 983,
1924 11:35:24.837314 TX Bit3 (970~996) 27 983, Bit11 (966~991) 26 978,
1925 11:35:24.840670 TX Bit4 (977~1001) 25 989, Bit12 (967~991) 25 979,
1926 11:35:24.846888 TX Bit5 (973~995) 23 984, Bit13 (967~990) 24 978,
1927 11:35:24.850357 TX Bit6 (973~998) 26 985, Bit14 (968~991) 24 979,
1928 11:35:24.854175 TX Bit7 (976~999) 24 987, Bit15 (970~992) 23 981,
1929 11:35:24.854260
1930 11:35:24.857119 Write Rank1 MR14 =0x16
1931 11:35:24.866751
1932 11:35:24.870680 CH=0, VrefRange= 0, VrefLevel = 22
1933 11:35:24.873347 TX Bit0 (978~1002) 25 990, Bit8 (967~991) 25 979,
1934 11:35:24.877195 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1935 11:35:24.883394 TX Bit2 (977~1000) 24 988, Bit10 (971~995) 25 983,
1936 11:35:24.887029 TX Bit3 (970~996) 27 983, Bit11 (966~991) 26 978,
1937 11:35:24.890412 TX Bit4 (976~1001) 26 988, Bit12 (967~991) 25 979,
1938 11:35:24.896936 TX Bit5 (972~995) 24 983, Bit13 (966~990) 25 978,
1939 11:35:24.900572 TX Bit6 (972~998) 27 985, Bit14 (967~991) 25 979,
1940 11:35:24.903850 TX Bit7 (976~999) 24 987, Bit15 (969~992) 24 980,
1941 11:35:24.906800
1942 11:35:24.906942 Write Rank1 MR14 =0x18
1943 11:35:24.916964
1944 11:35:24.917099 CH=0, VrefRange= 0, VrefLevel = 24
1945 11:35:24.923344 TX Bit0 (978~1002) 25 990, Bit8 (967~991) 25 979,
1946 11:35:24.927127 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1947 11:35:24.933593 TX Bit2 (977~1000) 24 988, Bit10 (971~995) 25 983,
1948 11:35:24.937142 TX Bit3 (970~996) 27 983, Bit11 (966~991) 26 978,
1949 11:35:24.940425 TX Bit4 (976~1001) 26 988, Bit12 (967~991) 25 979,
1950 11:35:24.946712 TX Bit5 (972~995) 24 983, Bit13 (966~990) 25 978,
1951 11:35:24.950679 TX Bit6 (972~998) 27 985, Bit14 (967~991) 25 979,
1952 11:35:24.954037 TX Bit7 (976~999) 24 987, Bit15 (969~992) 24 980,
1953 11:35:24.954132
1954 11:35:24.957304 Write Rank1 MR14 =0x1a
1955 11:35:24.966763
1956 11:35:24.970151 CH=0, VrefRange= 0, VrefLevel = 26
1957 11:35:24.973568 TX Bit0 (978~1002) 25 990, Bit8 (967~991) 25 979,
1958 11:35:24.976809 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1959 11:35:24.983485 TX Bit2 (977~1000) 24 988, Bit10 (971~995) 25 983,
1960 11:35:24.986741 TX Bit3 (970~996) 27 983, Bit11 (966~991) 26 978,
1961 11:35:24.990019 TX Bit4 (976~1001) 26 988, Bit12 (967~991) 25 979,
1962 11:35:24.996772 TX Bit5 (972~995) 24 983, Bit13 (966~990) 25 978,
1963 11:35:25.000070 TX Bit6 (972~998) 27 985, Bit14 (967~991) 25 979,
1964 11:35:25.006644 TX Bit7 (976~999) 24 987, Bit15 (969~992) 24 980,
1965 11:35:25.006779
1966 11:35:25.006841 Write Rank1 MR14 =0x1c
1967 11:35:25.016724
1968 11:35:25.016810 CH=0, VrefRange= 0, VrefLevel = 28
1969 11:35:25.023463 TX Bit0 (978~1002) 25 990, Bit8 (967~991) 25 979,
1970 11:35:25.026837 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1971 11:35:25.034104 TX Bit2 (977~1000) 24 988, Bit10 (971~995) 25 983,
1972 11:35:25.036705 TX Bit3 (970~996) 27 983, Bit11 (966~991) 26 978,
1973 11:35:25.040613 TX Bit4 (976~1001) 26 988, Bit12 (967~991) 25 979,
1974 11:35:25.047022 TX Bit5 (972~995) 24 983, Bit13 (966~990) 25 978,
1975 11:35:25.050462 TX Bit6 (972~998) 27 985, Bit14 (967~991) 25 979,
1976 11:35:25.053644 TX Bit7 (976~999) 24 987, Bit15 (969~992) 24 980,
1977 11:35:25.053742
1978 11:35:25.057069 Write Rank1 MR14 =0x1e
1979 11:35:25.066350
1980 11:35:25.069737 CH=0, VrefRange= 0, VrefLevel = 30
1981 11:35:25.073410 TX Bit0 (978~1002) 25 990, Bit8 (967~991) 25 979,
1982 11:35:25.076327 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
1983 11:35:25.083278 TX Bit2 (977~1000) 24 988, Bit10 (971~995) 25 983,
1984 11:35:25.087020 TX Bit3 (970~996) 27 983, Bit11 (966~991) 26 978,
1985 11:35:25.089779 TX Bit4 (976~1001) 26 988, Bit12 (967~991) 25 979,
1986 11:35:25.096718 TX Bit5 (972~995) 24 983, Bit13 (966~990) 25 978,
1987 11:35:25.099766 TX Bit6 (972~998) 27 985, Bit14 (967~991) 25 979,
1988 11:35:25.103902 TX Bit7 (976~999) 24 987, Bit15 (969~992) 24 980,
1989 11:35:25.106749
1990 11:35:25.106842
1991 11:35:25.109814 TX Vref found, early break! 378< 380
1992 11:35:25.113632 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
1993 11:35:25.116857 u1DelayCellOfst[0]=8 cells (7 PI)
1994 11:35:25.120366 u1DelayCellOfst[1]=6 cells (5 PI)
1995 11:35:25.123593 u1DelayCellOfst[2]=6 cells (5 PI)
1996 11:35:25.127101 u1DelayCellOfst[3]=0 cells (0 PI)
1997 11:35:25.127179 u1DelayCellOfst[4]=6 cells (5 PI)
1998 11:35:25.130279 u1DelayCellOfst[5]=0 cells (0 PI)
1999 11:35:25.133875 u1DelayCellOfst[6]=2 cells (2 PI)
2000 11:35:25.136855 u1DelayCellOfst[7]=5 cells (4 PI)
2001 11:35:25.140618 Byte0, DQ PI dly=983, DQM PI dly= 986
2002 11:35:25.143377 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2003 11:35:25.147162
2004 11:35:25.150346 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2005 11:35:25.150439
2006 11:35:25.153728 u1DelayCellOfst[8]=1 cells (1 PI)
2007 11:35:25.156720 u1DelayCellOfst[9]=1 cells (1 PI)
2008 11:35:25.160749 u1DelayCellOfst[10]=6 cells (5 PI)
2009 11:35:25.163816 u1DelayCellOfst[11]=0 cells (0 PI)
2010 11:35:25.163940 u1DelayCellOfst[12]=1 cells (1 PI)
2011 11:35:25.167055 u1DelayCellOfst[13]=0 cells (0 PI)
2012 11:35:25.170354 u1DelayCellOfst[14]=1 cells (1 PI)
2013 11:35:25.173648 u1DelayCellOfst[15]=2 cells (2 PI)
2014 11:35:25.177121 Byte1, DQ PI dly=978, DQM PI dly= 980
2015 11:35:25.184036 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
2016 11:35:25.184283
2017 11:35:25.187300 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
2018 11:35:25.187572
2019 11:35:25.190652 Write Rank1 MR14 =0x16
2020 11:35:25.190947
2021 11:35:25.191292 Final TX Range 0 Vref 22
2022 11:35:25.191611
2023 11:35:25.197372 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2024 11:35:25.197898
2025 11:35:25.204011 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2026 11:35:25.210906 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2027 11:35:25.217460 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2028 11:35:25.220929 Write Rank1 MR3 =0xb0
2029 11:35:25.221548 DramC Write-DBI on
2030 11:35:25.224264 ==
2031 11:35:25.227551 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2032 11:35:25.231151 fsp= 1, odt_onoff= 1, Byte mode= 0
2033 11:35:25.231715 ==
2034 11:35:25.234038 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2035 11:35:25.234523
2036 11:35:25.237864 Begin, DQ Scan Range 700~764
2037 11:35:25.238245
2038 11:35:25.238536
2039 11:35:25.241109 TX Vref Scan disable
2040 11:35:25.244706 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2041 11:35:25.247955 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2042 11:35:25.250922 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2043 11:35:25.254384 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2044 11:35:25.258252 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2045 11:35:25.261257 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2046 11:35:25.264497 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2047 11:35:25.268117 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2048 11:35:25.271440 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2049 11:35:25.274542 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2050 11:35:25.278330 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2051 11:35:25.281322 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2052 11:35:25.284667 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2053 11:35:25.287801 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2054 11:35:25.291403 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2055 11:35:25.294456 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2056 11:35:25.298015 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2057 11:35:25.304417 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2058 11:35:25.307736 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2059 11:35:25.314488 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2060 11:35:25.317853 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2061 11:35:25.321039 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2062 11:35:25.324689 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2063 11:35:25.328025 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2064 11:35:25.331395 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2065 11:35:25.334465 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2066 11:35:25.337729 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
2067 11:35:25.341655 Byte0, DQ PI dly=730, DQM PI dly= 730
2068 11:35:25.344625 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 26)
2069 11:35:25.344703
2070 11:35:25.348341 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 26)
2071 11:35:25.348431
2072 11:35:25.354931 Byte1, DQ PI dly=722, DQM PI dly= 722
2073 11:35:25.358180 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2074 11:35:25.358296
2075 11:35:25.361595 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2076 11:35:25.361707
2077 11:35:25.368533 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2078 11:35:25.374800 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2079 11:35:25.381408 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2080 11:35:25.385156 Write Rank1 MR3 =0x30
2081 11:35:25.385310 DramC Write-DBI off
2082 11:35:25.388736
2083 11:35:25.388922 [DATLAT]
2084 11:35:25.391572 Freq=1600, CH0 RK1, use_rxtx_scan=0
2085 11:35:25.391744
2086 11:35:25.391872 DATLAT Default: 0x10
2087 11:35:25.394950 7, 0xFFFF, sum=0
2088 11:35:25.395132 8, 0xFFFF, sum=0
2089 11:35:25.398651 9, 0xFFFF, sum=0
2090 11:35:25.398846 10, 0xFFFF, sum=0
2091 11:35:25.402026 11, 0xFFFF, sum=0
2092 11:35:25.402263 12, 0xFFFF, sum=0
2093 11:35:25.405503 13, 0xFFFF, sum=0
2094 11:35:25.405750 14, 0x0, sum=1
2095 11:35:25.405961 15, 0x0, sum=2
2096 11:35:25.408934 16, 0x0, sum=3
2097 11:35:25.409344 17, 0x0, sum=4
2098 11:35:25.415636 pattern=2 first_step=14 total pass=5 best_step=16
2099 11:35:25.416166 ==
2100 11:35:25.418786 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2101 11:35:25.422332 fsp= 1, odt_onoff= 1, Byte mode= 0
2102 11:35:25.422728 ==
2103 11:35:25.429003 Start DQ dly to find pass range UseTestEngine =1
2104 11:35:25.432175 x-axis: bit #, y-axis: DQ dly (-127~63)
2105 11:35:25.432572 RX Vref Scan = 0
2106 11:35:25.435395 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2107 11:35:25.438585 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2108 11:35:25.442205 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2109 11:35:25.445395 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2110 11:35:25.445755 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2111 11:35:25.448513 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2112 11:35:25.451927 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2113 11:35:25.455252 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2114 11:35:25.458786 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2115 11:35:25.461910 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2116 11:35:25.465457 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2117 11:35:25.468911 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2118 11:35:25.469287 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2119 11:35:25.471750 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2120 11:35:25.475728 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2121 11:35:25.478706 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2122 11:35:25.482517 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2123 11:35:25.485746 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2124 11:35:25.488680 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2125 11:35:25.491936 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2126 11:35:25.492305 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2127 11:35:25.495538 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2128 11:35:25.498951 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2129 11:35:25.502302 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2130 11:35:25.505255 -2, [0] xxxoxxxx xxxxxxxx [MSB]
2131 11:35:25.508711 -1, [0] xxxoxxxx xxxxxoxx [MSB]
2132 11:35:25.509001 0, [0] xxxoxxxx oxxxxoxx [MSB]
2133 11:35:25.512081 1, [0] xxxoxoxx ooxoooox [MSB]
2134 11:35:25.515313 2, [0] xxxoxooo ooxoooox [MSB]
2135 11:35:25.518745 3, [0] xxxoxooo ooxooooo [MSB]
2136 11:35:25.522340 4, [0] xxxoxooo ooxooooo [MSB]
2137 11:35:25.525504 5, [0] xxxooooo ooxooooo [MSB]
2138 11:35:25.525660 6, [0] xxxooooo oooooooo [MSB]
2139 11:35:25.528618 7, [0] xooooooo oooooooo [MSB]
2140 11:35:25.532058 8, [0] xooooooo oooooooo [MSB]
2141 11:35:25.536031 34, [0] oooxoooo oooxoooo [MSB]
2142 11:35:25.539289 35, [0] oooxoxoo oooxoxoo [MSB]
2143 11:35:25.542340 36, [0] oooxoxxo oooxoxoo [MSB]
2144 11:35:25.546017 37, [0] oooxoxxx xooxxxxo [MSB]
2145 11:35:25.549239 38, [0] oooxoxxx xooxxxxo [MSB]
2146 11:35:25.552395 39, [0] oooxoxxx xxoxxxxx [MSB]
2147 11:35:25.552470 40, [0] oooxoxxx xxoxxxxx [MSB]
2148 11:35:25.556286 41, [0] oooxxxxx xxoxxxxx [MSB]
2149 11:35:25.559445 42, [0] oooxxxxx xxxxxxxx [MSB]
2150 11:35:25.562890 43, [0] oxxxxxxx xxxxxxxx [MSB]
2151 11:35:25.565758 44, [0] xxxxxxxx xxxxxxxx [MSB]
2152 11:35:25.569127 iDelay=44, Bit 0, Center 26 (9 ~ 43) 35
2153 11:35:25.572516 iDelay=44, Bit 1, Center 24 (7 ~ 42) 36
2154 11:35:25.576005 iDelay=44, Bit 2, Center 24 (7 ~ 42) 36
2155 11:35:25.579454 iDelay=44, Bit 3, Center 15 (-2 ~ 33) 36
2156 11:35:25.582796 iDelay=44, Bit 4, Center 22 (5 ~ 40) 36
2157 11:35:25.585893 iDelay=44, Bit 5, Center 17 (1 ~ 34) 34
2158 11:35:25.589469 iDelay=44, Bit 6, Center 18 (2 ~ 35) 34
2159 11:35:25.592566 iDelay=44, Bit 7, Center 19 (2 ~ 36) 35
2160 11:35:25.596011 iDelay=44, Bit 8, Center 18 (0 ~ 36) 37
2161 11:35:25.599858 iDelay=44, Bit 9, Center 19 (1 ~ 38) 38
2162 11:35:25.606128 iDelay=44, Bit 10, Center 23 (6 ~ 41) 36
2163 11:35:25.609119 iDelay=44, Bit 11, Center 17 (1 ~ 33) 33
2164 11:35:25.613309 iDelay=44, Bit 12, Center 18 (1 ~ 36) 36
2165 11:35:25.616231 iDelay=44, Bit 13, Center 16 (-1 ~ 34) 36
2166 11:35:25.619596 iDelay=44, Bit 14, Center 18 (1 ~ 36) 36
2167 11:35:25.623635 iDelay=44, Bit 15, Center 20 (3 ~ 38) 36
2168 11:35:25.623798 ==
2169 11:35:25.629327 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_0, rank 1
2170 11:35:25.629537 fsp= 1, odt_onoff= 1, Byte mode= 0
2171 11:35:25.632873 ==
2172 11:35:25.633118 DQS Delay:
2173 11:35:25.633380 DQS0 = 0, DQS1 = 0
2174 11:35:25.636178 DQM Delay:
2175 11:35:25.636499 DQM0 = 20, DQM1 = 18
2176 11:35:25.639380 DQ Delay:
2177 11:35:25.639675 DQ0 =26, DQ1 =24, DQ2 =24, DQ3 =15
2178 11:35:25.643159 DQ4 =22, DQ5 =17, DQ6 =18, DQ7 =19
2179 11:35:25.646095 DQ8 =18, DQ9 =19, DQ10 =23, DQ11 =17
2180 11:35:25.649831 DQ12 =18, DQ13 =16, DQ14 =18, DQ15 =20
2181 11:35:25.650069
2182 11:35:25.652992
2183 11:35:25.653251
2184 11:35:25.653436 [DramC_TX_OE_Calibration] TA2
2185 11:35:25.656190 Original DQ_B0 (3 6) =30, OEN = 27
2186 11:35:25.660125 Original DQ_B1 (3 6) =30, OEN = 27
2187 11:35:25.663154 23, 0x0, End_B0=23 End_B1=23
2188 11:35:25.666229 24, 0x0, End_B0=24 End_B1=24
2189 11:35:25.670058 25, 0x0, End_B0=25 End_B1=25
2190 11:35:25.670244 26, 0x0, End_B0=26 End_B1=26
2191 11:35:25.673083 27, 0x0, End_B0=27 End_B1=27
2192 11:35:25.676906 28, 0x0, End_B0=28 End_B1=28
2193 11:35:25.679912 29, 0x0, End_B0=29 End_B1=29
2194 11:35:25.680158 30, 0x0, End_B0=30 End_B1=30
2195 11:35:25.683012 31, 0xFFFF, End_B0=30 End_B1=30
2196 11:35:25.689735 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2197 11:35:25.697076 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2198 11:35:25.697579
2199 11:35:25.698004
2200 11:35:25.698436 Write Rank1 MR23 =0x3f
2201 11:35:25.699972 [DQSOSC]
2202 11:35:25.706599 [DQSOSCAuto] RK1, (LSB)MR18= 0x78, (MSB)MR19= 0x3, tDQSOscB0 = 354 ps tDQSOscB1 = 0 ps
2203 11:35:25.709854 CH0_RK1: MR19=0x3, MR18=0x78, DQSOSC=354, MR23=63, INC=19, DEC=29
2204 11:35:25.713312 Write Rank1 MR23 =0x3f
2205 11:35:25.713665 [DQSOSC]
2206 11:35:25.723712 [DQSOSCAuto] RK1, (LSB)MR18= 0x78, (MSB)MR19= 0x3, tDQSOscB0 = 354 ps tDQSOscB1 = 0 ps
2207 11:35:25.724071 CH0 RK1: MR19=3, MR18=78
2208 11:35:25.727140 [RxdqsGatingPostProcess] freq 1600
2209 11:35:25.733799 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
2210 11:35:25.734251 Rank: 0
2211 11:35:25.737219 best DQS0 dly(2T, 0.5T) = (2, 5)
2212 11:35:25.740202 best DQS1 dly(2T, 0.5T) = (2, 5)
2213 11:35:25.743508 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
2214 11:35:25.746974 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
2215 11:35:25.747323 Rank: 1
2216 11:35:25.750681 best DQS0 dly(2T, 0.5T) = (2, 6)
2217 11:35:25.754050 best DQS1 dly(2T, 0.5T) = (2, 6)
2218 11:35:25.756873 best DQS0 P1 dly(2T, 0.5T) = (3, 2)
2219 11:35:25.760303 best DQS1 P1 dly(2T, 0.5T) = (3, 2)
2220 11:35:25.764009 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
2221 11:35:25.767973 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
2222 11:35:25.771055 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
2223 11:35:25.774324 Write Rank0 MR13 =0x59
2224 11:35:25.774701 ==
2225 11:35:25.777727 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2226 11:35:25.781008 fsp= 1, odt_onoff= 1, Byte mode= 0
2227 11:35:25.784379 ==
2228 11:35:25.784913 === u2Vref_new: 0x56 --> 0x3a
2229 11:35:25.788098 === u2Vref_new: 0x58 --> 0x58
2230 11:35:25.791257 === u2Vref_new: 0x5a --> 0x5a
2231 11:35:25.794614 === u2Vref_new: 0x5c --> 0x78
2232 11:35:25.797805 === u2Vref_new: 0x5e --> 0x7a
2233 11:35:25.801242 === u2Vref_new: 0x60 --> 0x90
2234 11:35:25.804419 [CA 0] Center 36 (9~63) winsize 55
2235 11:35:25.807887 [CA 1] Center 35 (7~63) winsize 57
2236 11:35:25.811096 [CA 2] Center 32 (3~62) winsize 60
2237 11:35:25.814881 [CA 3] Center 33 (3~63) winsize 61
2238 11:35:25.817719 [CA 4] Center 33 (3~63) winsize 61
2239 11:35:25.821434 [CA 5] Center 25 (-1~52) winsize 54
2240 11:35:25.821553
2241 11:35:25.824514 [CATrainingPosCal] consider 1 rank data
2242 11:35:25.828557 u2DelayCellTimex100 = 762/100 ps
2243 11:35:25.831255 CA0 delay=36 (9~63),Diff = 11 PI (14 cell)
2244 11:35:25.834713 CA1 delay=35 (7~63),Diff = 10 PI (12 cell)
2245 11:35:25.838423 CA2 delay=32 (3~62),Diff = 7 PI (8 cell)
2246 11:35:25.841263 CA3 delay=33 (3~63),Diff = 8 PI (10 cell)
2247 11:35:25.844692 CA4 delay=33 (3~63),Diff = 8 PI (10 cell)
2248 11:35:25.848044 CA5 delay=25 (-1~52),Diff = 0 PI (0 cell)
2249 11:35:25.848164
2250 11:35:25.851367 CA PerBit enable=1, Macro0, CA PI delay=25
2251 11:35:25.854895 === u2Vref_new: 0x56 --> 0x3a
2252 11:35:25.855013
2253 11:35:25.858035 Vref(ca) range 1: 22
2254 11:35:25.858167
2255 11:35:25.858270 CS Dly= 10 (41-0-32)
2256 11:35:25.861436 Write Rank0 MR13 =0xd8
2257 11:35:25.865078 Write Rank0 MR13 =0xd8
2258 11:35:25.865259 Write Rank0 MR12 =0x56
2259 11:35:25.868447 Write Rank1 MR13 =0x59
2260 11:35:25.868674 ==
2261 11:35:25.875503 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
2262 11:35:25.875711 fsp= 1, odt_onoff= 1, Byte mode= 0
2263 11:35:25.878386 ==
2264 11:35:25.878636 === u2Vref_new: 0x56 --> 0x3a
2265 11:35:25.881587 === u2Vref_new: 0x58 --> 0x58
2266 11:35:25.885186 === u2Vref_new: 0x5a --> 0x5a
2267 11:35:25.888851 === u2Vref_new: 0x5c --> 0x78
2268 11:35:25.891748 === u2Vref_new: 0x5e --> 0x7a
2269 11:35:25.895594 === u2Vref_new: 0x60 --> 0x90
2270 11:35:25.898879 [CA 0] Center 36 (10~63) winsize 54
2271 11:35:25.901775 [CA 1] Center 35 (7~63) winsize 57
2272 11:35:25.905518 [CA 2] Center 33 (4~63) winsize 60
2273 11:35:25.908677 [CA 3] Center 33 (3~63) winsize 61
2274 11:35:25.911809 [CA 4] Center 34 (5~63) winsize 59
2275 11:35:25.915410 [CA 5] Center 26 (-1~53) winsize 55
2276 11:35:25.915791
2277 11:35:25.918575 [CATrainingPosCal] consider 2 rank data
2278 11:35:25.921959 u2DelayCellTimex100 = 762/100 ps
2279 11:35:25.925102 CA0 delay=36 (10~63),Diff = 11 PI (14 cell)
2280 11:35:25.928709 CA1 delay=35 (7~63),Diff = 10 PI (12 cell)
2281 11:35:25.931848 CA2 delay=33 (4~62),Diff = 8 PI (10 cell)
2282 11:35:25.935123 CA3 delay=33 (3~63),Diff = 8 PI (10 cell)
2283 11:35:25.939108 CA4 delay=34 (5~63),Diff = 9 PI (11 cell)
2284 11:35:25.942254 CA5 delay=25 (-1~52),Diff = 0 PI (0 cell)
2285 11:35:25.942654
2286 11:35:25.949181 CA PerBit enable=1, Macro0, CA PI delay=25
2287 11:35:25.949563 === u2Vref_new: 0x58 --> 0x58
2288 11:35:25.949865
2289 11:35:25.952488 Vref(ca) range 1: 24
2290 11:35:25.952861
2291 11:35:25.955180 CS Dly= 11 (42-0-32)
2292 11:35:25.955557 Write Rank1 MR13 =0xd8
2293 11:35:25.958605 Write Rank1 MR13 =0xd8
2294 11:35:25.961933 Write Rank1 MR12 =0x58
2295 11:35:25.965241 [RankSwap] Rank num 2, (Multi 1), Rank 0
2296 11:35:25.965638 Write Rank0 MR2 =0xad
2297 11:35:25.968602 [Write Leveling]
2298 11:35:25.971917 delay byte0 byte1 byte2 byte3
2299 11:35:25.972411
2300 11:35:25.972833 10 0 0
2301 11:35:25.973275 11 0 0
2302 11:35:25.975602 12 0 0
2303 11:35:25.976109 13 0 0
2304 11:35:25.979048 14 0 0
2305 11:35:25.979430 15 0 0
2306 11:35:25.981888 16 0 0
2307 11:35:25.982288 17 0 0
2308 11:35:25.982587 18 0 0
2309 11:35:25.985522 19 0 0
2310 11:35:25.985919 20 0 0
2311 11:35:25.988589 21 0 0
2312 11:35:25.988973 22 0 0
2313 11:35:25.989314 23 0 0
2314 11:35:25.991897 24 0 0
2315 11:35:25.992278 25 0 0
2316 11:35:25.995311 26 0 0
2317 11:35:25.995692 27 0 0
2318 11:35:25.995989 28 0 0
2319 11:35:25.998656 29 0 0
2320 11:35:25.999039 30 0 0
2321 11:35:26.002028 31 0 0
2322 11:35:26.002493 32 0 ff
2323 11:35:26.005238 33 0 ff
2324 11:35:26.005632 34 0 ff
2325 11:35:26.005941 35 0 ff
2326 11:35:26.008886 36 ff ff
2327 11:35:26.009314 37 ff ff
2328 11:35:26.012217 38 ff ff
2329 11:35:26.012772 39 ff ff
2330 11:35:26.015809 40 ff ff
2331 11:35:26.016202 41 ff ff
2332 11:35:26.018678 42 ff ff
2333 11:35:26.022010 pass bytecount = 0xff (0xff: all bytes pass)
2334 11:35:26.022396
2335 11:35:26.022691 DQS0 dly: 36
2336 11:35:26.025814 DQS1 dly: 32
2337 11:35:26.026210 Write Rank0 MR2 =0x2d
2338 11:35:26.028774 [RankSwap] Rank num 2, (Multi 1), Rank 0
2339 11:35:26.032377 Write Rank0 MR1 =0xd6
2340 11:35:26.032646 [Gating]
2341 11:35:26.032886 ==
2342 11:35:26.038639 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2343 11:35:26.041900 fsp= 1, odt_onoff= 1, Byte mode= 0
2344 11:35:26.042120 ==
2345 11:35:26.045529 3 1 0 |100f 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2346 11:35:26.048833 3 1 4 |1d1c 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
2347 11:35:26.055441 3 1 8 |f0e 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2348 11:35:26.058779 3 1 12 |302f 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
2349 11:35:26.062130 3 1 16 |2b2b 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2350 11:35:26.069333 3 1 20 |100f 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2351 11:35:26.072508 3 1 24 |2f2e 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2352 11:35:26.075677 3 1 28 |706 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
2353 11:35:26.079789 3 2 0 |2727 b0a |(11 11)(11 11) |(1 1)(1 1)| 0
2354 11:35:26.086038 3 2 4 |505 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2355 11:35:26.089336 3 2 8 |3737 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2356 11:35:26.092920 3 2 12 |3737 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2357 11:35:26.096365 3 2 16 |3636 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2358 11:35:26.102772 3 2 20 |505 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
2359 11:35:26.106531 3 2 24 |2423 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2360 11:35:26.109337 3 2 28 |3736 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2361 11:35:26.116731 3 3 0 |201 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2362 11:35:26.119564 [Byte 0] Lead/lag falling Transition (3, 3, 0)
2363 11:35:26.122760 3 3 4 |3534 3d3d |(11 11)(11 11) |(0 1)(1 1)| 0
2364 11:35:26.126226 3 3 8 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
2365 11:35:26.132904 [Byte 1] Lead/lag falling Transition (3, 3, 8)
2366 11:35:26.136566 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2367 11:35:26.139786 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2368 11:35:26.146507 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
2369 11:35:26.149782 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2370 11:35:26.153538 3 3 28 |504 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
2371 11:35:26.159967 3 4 0 |3d3d 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
2372 11:35:26.163351 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2373 11:35:26.166831 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2374 11:35:26.169837 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2375 11:35:26.176838 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2376 11:35:26.179757 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2377 11:35:26.183374 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2378 11:35:26.189763 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2379 11:35:26.193277 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2380 11:35:26.196821 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2381 11:35:26.203739 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2382 11:35:26.206686 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2383 11:35:26.209854 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
2384 11:35:26.213483 [Byte 0] Lead/lag falling Transition (3, 5, 16)
2385 11:35:26.219708 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2386 11:35:26.222971 3 5 24 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
2387 11:35:26.226648 [Byte 0] Lead/lag Transition tap number (3)
2388 11:35:26.229742 [Byte 1] Lead/lag falling Transition (3, 5, 24)
2389 11:35:26.236606 3 5 28 |403 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
2390 11:35:26.240313 [Byte 1] Lead/lag Transition tap number (2)
2391 11:35:26.243507 3 6 0 |4646 d0c |(0 0)(11 11) |(0 0)(0 0)| 0
2392 11:35:26.246439 [Byte 0]First pass (3, 6, 0)
2393 11:35:26.249999 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2394 11:35:26.253316 [Byte 1]First pass (3, 6, 4)
2395 11:35:26.256855 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2396 11:35:26.260238 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2397 11:35:26.263082 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2398 11:35:26.270045 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2399 11:35:26.273371 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2400 11:35:26.277018 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2401 11:35:26.280466 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2402 11:35:26.283911 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
2403 11:35:26.290405 All bytes gating window > 1UI, Early break!
2404 11:35:26.290791
2405 11:35:26.293608 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 22)
2406 11:35:26.293993
2407 11:35:26.296751 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
2408 11:35:26.297134
2409 11:35:26.297476
2410 11:35:26.297756
2411 11:35:26.300291 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 22)
2412 11:35:26.300673
2413 11:35:26.303754 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
2414 11:35:26.304140
2415 11:35:26.307169
2416 11:35:26.307552 Write Rank0 MR1 =0x56
2417 11:35:26.307850
2418 11:35:26.310593 best RODT dly(2T, 0.5T) = (2, 2)
2419 11:35:26.311004
2420 11:35:26.313554 best RODT dly(2T, 0.5T) = (2, 2)
2421 11:35:26.313940 ==
2422 11:35:26.320120 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2423 11:35:26.320652 fsp= 1, odt_onoff= 1, Byte mode= 0
2424 11:35:26.323528 ==
2425 11:35:26.327084 Start DQ dly to find pass range UseTestEngine =0
2426 11:35:26.330271 x-axis: bit #, y-axis: DQ dly (-127~63)
2427 11:35:26.330755 RX Vref Scan = 0
2428 11:35:26.333358 -26, [0] xxxxxxxx xxxxxxxx [MSB]
2429 11:35:26.336962 -25, [0] xxxxxxxx xxxxxxxx [MSB]
2430 11:35:26.340174 -24, [0] xxxxxxxx xxxxxxxx [MSB]
2431 11:35:26.343585 -23, [0] xxxxxxxx xxxxxxxx [MSB]
2432 11:35:26.346962 -22, [0] xxxxxxxx xxxxxxxx [MSB]
2433 11:35:26.350890 -21, [0] xxxxxxxx xxxxxxxx [MSB]
2434 11:35:26.353906 -20, [0] xxxxxxxx xxxxxxxx [MSB]
2435 11:35:26.354441 -19, [0] xxxxxxxx xxxxxxxx [MSB]
2436 11:35:26.357011 -18, [0] xxxxxxxx xxxxxxxx [MSB]
2437 11:35:26.360464 -17, [0] xxxxxxxx xxxxxxxx [MSB]
2438 11:35:26.363990 -16, [0] xxxxxxxx xxxxxxxx [MSB]
2439 11:35:26.367365 -15, [0] xxxxxxxx xxxxxxxx [MSB]
2440 11:35:26.370683 -14, [0] xxxxxxxx xxxxxxxx [MSB]
2441 11:35:26.374168 -13, [0] xxxxxxxx xxxxxxxx [MSB]
2442 11:35:26.374739 -12, [0] xxxxxxxx xxxxxxxx [MSB]
2443 11:35:26.377218 -11, [0] xxxxxxxx xxxxxxxx [MSB]
2444 11:35:26.381074 -10, [0] xxxxxxxx xxxxxxxx [MSB]
2445 11:35:26.383756 -9, [0] xxxxxxxx xxxxxxxx [MSB]
2446 11:35:26.386955 -8, [0] xxxxxxxx xxxxxxxx [MSB]
2447 11:35:26.390796 -7, [0] xxxxxxxx xxxxxxxx [MSB]
2448 11:35:26.394609 -6, [0] xxxxxxxx xxxxxxxx [MSB]
2449 11:35:26.394889 -5, [0] xxxxxxxx xxxxxxxx [MSB]
2450 11:35:26.397369 -4, [0] xxxxxxxx xxxxxxxx [MSB]
2451 11:35:26.400225 -3, [0] xxxxxxxx xxxxxxxx [MSB]
2452 11:35:26.403698 -2, [0] xxxxxxxx xxxxxxxx [MSB]
2453 11:35:26.406988 -1, [0] xxxxxxxx xxxxxxxx [MSB]
2454 11:35:26.410242 0, [0] xxxoxxxx xxxxxxxx [MSB]
2455 11:35:26.414451 1, [0] xxooxxxx xxxxxxxo [MSB]
2456 11:35:26.414621 2, [0] xxooxxxo xxxxxxxo [MSB]
2457 11:35:26.417511 3, [0] xxoooxxo xoxxxoxo [MSB]
2458 11:35:26.420863 4, [0] xxoooxxo oooxooxo [MSB]
2459 11:35:26.424235 5, [0] xxoooxxo oooooooo [MSB]
2460 11:35:26.427817 6, [0] xooooxxo oooooooo [MSB]
2461 11:35:26.431076 7, [0] xoooooxo oooooooo [MSB]
2462 11:35:26.431228 8, [0] ooooooxo oooooooo [MSB]
2463 11:35:26.433757 32, [0] ooxxoooo oooooooo [MSB]
2464 11:35:26.437278 33, [0] ooxxoooo ooooooox [MSB]
2465 11:35:26.440214 34, [0] ooxxoooo ooooooox [MSB]
2466 11:35:26.443616 35, [0] ooxxxooo ooxoooox [MSB]
2467 11:35:26.447442 36, [0] ooxxxooo ooxoooox [MSB]
2468 11:35:26.447583 37, [0] ooxxxoox xxxxoxxx [MSB]
2469 11:35:26.450280 38, [0] ooxxxoox xxxxoxxx [MSB]
2470 11:35:26.453569 39, [0] ooxxxoox xxxxoxxx [MSB]
2471 11:35:26.457382 40, [0] oxxxxoox xxxxxxxx [MSB]
2472 11:35:26.460868 41, [0] xxxxxxxx xxxxxxxx [MSB]
2473 11:35:26.464215 iDelay=41, Bit 0, Center 24 (8 ~ 40) 33
2474 11:35:26.467178 iDelay=41, Bit 1, Center 22 (6 ~ 39) 34
2475 11:35:26.470195 iDelay=41, Bit 2, Center 16 (1 ~ 31) 31
2476 11:35:26.473703 iDelay=41, Bit 3, Center 15 (0 ~ 31) 32
2477 11:35:26.477011 iDelay=41, Bit 4, Center 18 (3 ~ 34) 32
2478 11:35:26.480484 iDelay=41, Bit 5, Center 23 (7 ~ 40) 34
2479 11:35:26.483872 iDelay=41, Bit 6, Center 24 (9 ~ 40) 32
2480 11:35:26.487515 iDelay=41, Bit 7, Center 19 (2 ~ 36) 35
2481 11:35:26.490230 iDelay=41, Bit 8, Center 20 (4 ~ 36) 33
2482 11:35:26.494034 iDelay=41, Bit 9, Center 19 (3 ~ 36) 34
2483 11:35:26.501189 iDelay=41, Bit 10, Center 19 (4 ~ 34) 31
2484 11:35:26.503790 iDelay=41, Bit 11, Center 20 (5 ~ 36) 32
2485 11:35:26.507363 iDelay=41, Bit 12, Center 21 (4 ~ 39) 36
2486 11:35:26.511400 iDelay=41, Bit 13, Center 19 (3 ~ 36) 34
2487 11:35:26.514062 iDelay=41, Bit 14, Center 20 (5 ~ 36) 32
2488 11:35:26.517726 iDelay=41, Bit 15, Center 16 (1 ~ 32) 32
2489 11:35:26.517873 ==
2490 11:35:26.524107 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2491 11:35:26.524275 fsp= 1, odt_onoff= 1, Byte mode= 0
2492 11:35:26.527610 ==
2493 11:35:26.527805 DQS Delay:
2494 11:35:26.527958 DQS0 = 0, DQS1 = 0
2495 11:35:26.530908 DQM Delay:
2496 11:35:26.531105 DQM0 = 20, DQM1 = 19
2497 11:35:26.534326 DQ Delay:
2498 11:35:26.534717 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2499 11:35:26.537647 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =19
2500 11:35:26.540997 DQ8 =20, DQ9 =19, DQ10 =19, DQ11 =20
2501 11:35:26.544452 DQ12 =21, DQ13 =19, DQ14 =20, DQ15 =16
2502 11:35:26.544861
2503 11:35:26.545257
2504 11:35:26.547702 DramC Write-DBI off
2505 11:35:26.548071 ==
2506 11:35:26.554779 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2507 11:35:26.557481 fsp= 1, odt_onoff= 1, Byte mode= 0
2508 11:35:26.557879 ==
2509 11:35:26.561059 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
2510 11:35:26.561470
2511 11:35:26.565208 Begin, DQ Scan Range 928~1184
2512 11:35:26.565575
2513 11:35:26.565921
2514 11:35:26.566256 TX Vref Scan disable
2515 11:35:26.567837 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
2516 11:35:26.574668 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
2517 11:35:26.577510 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
2518 11:35:26.581020 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
2519 11:35:26.584513 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
2520 11:35:26.587901 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
2521 11:35:26.590793 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
2522 11:35:26.594316 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
2523 11:35:26.597933 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
2524 11:35:26.600612 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
2525 11:35:26.604086 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
2526 11:35:26.607388 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
2527 11:35:26.610674 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
2528 11:35:26.614411 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
2529 11:35:26.617765 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
2530 11:35:26.621074 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
2531 11:35:26.627852 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
2532 11:35:26.630814 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
2533 11:35:26.634193 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
2534 11:35:26.637642 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
2535 11:35:26.640703 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
2536 11:35:26.644546 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
2537 11:35:26.647216 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
2538 11:35:26.651253 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
2539 11:35:26.654116 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
2540 11:35:26.657936 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
2541 11:35:26.660994 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
2542 11:35:26.664232 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2543 11:35:26.667041 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2544 11:35:26.670914 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2545 11:35:26.673613 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2546 11:35:26.680654 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2547 11:35:26.684333 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2548 11:35:26.687353 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2549 11:35:26.690822 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2550 11:35:26.693912 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2551 11:35:26.697491 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2552 11:35:26.700222 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2553 11:35:26.703544 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
2554 11:35:26.706960 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
2555 11:35:26.710868 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
2556 11:35:26.713274 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
2557 11:35:26.716663 970 |3 6 10|[0] xxxxxxxx oooxoxxo [MSB]
2558 11:35:26.720351 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
2559 11:35:26.723334 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
2560 11:35:26.726427 973 |3 6 13|[0] xxxxxxxx oooooooo [MSB]
2561 11:35:26.730291 974 |3 6 14|[0] xxxxxxxx oooooooo [MSB]
2562 11:35:26.733177 975 |3 6 15|[0] xxooxxxx oooooooo [MSB]
2563 11:35:26.736974 976 |3 6 16|[0] xooooxxo oooooooo [MSB]
2564 11:35:26.739686 977 |3 6 17|[0] xoooooxo oooooooo [MSB]
2565 11:35:26.748457 990 |3 6 30|[0] oooooooo ooooooox [MSB]
2566 11:35:26.751988 991 |3 6 31|[0] oooooooo ooooooox [MSB]
2567 11:35:26.754769 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
2568 11:35:26.758266 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
2569 11:35:26.761546 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
2570 11:35:26.765696 995 |3 6 35|[0] oooxoooo xxxxxxxx [MSB]
2571 11:35:26.768388 996 |3 6 36|[0] oooxoooo xxxxxxxx [MSB]
2572 11:35:26.771579 997 |3 6 37|[0] ooxxoooo xxxxxxxx [MSB]
2573 11:35:26.775017 998 |3 6 38|[0] ooxxooox xxxxxxxx [MSB]
2574 11:35:26.778515 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
2575 11:35:26.781659 Byte0, DQ PI dly=986, DQM PI dly= 986
2576 11:35:26.784940 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 26)
2577 11:35:26.785062
2578 11:35:26.791854 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 26)
2579 11:35:26.791967
2580 11:35:26.795012 Byte1, DQ PI dly=979, DQM PI dly= 979
2581 11:35:26.798322 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 19)
2582 11:35:26.798408
2583 11:35:26.801737 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 19)
2584 11:35:26.801816
2585 11:35:26.804664 ==
2586 11:35:26.808188 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2587 11:35:26.811920 fsp= 1, odt_onoff= 1, Byte mode= 0
2588 11:35:26.811995 ==
2589 11:35:26.815315 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
2590 11:35:26.815391
2591 11:35:26.818268 Begin, DQ Scan Range 955~1019
2592 11:35:26.821693 Write Rank0 MR14 =0x0
2593 11:35:26.829570
2594 11:35:26.829665 CH=1, VrefRange= 0, VrefLevel = 0
2595 11:35:26.836359 TX Bit0 (979~998) 20 988, Bit8 (970~986) 17 978,
2596 11:35:26.840092 TX Bit1 (977~996) 20 986, Bit9 (970~986) 17 978,
2597 11:35:26.846574 TX Bit2 (977~992) 16 984, Bit10 (973~986) 14 979,
2598 11:35:26.849562 TX Bit3 (976~990) 15 983, Bit11 (975~990) 16 982,
2599 11:35:26.852948 TX Bit4 (978~993) 16 985, Bit12 (973~990) 18 981,
2600 11:35:26.860041 TX Bit5 (978~998) 21 988, Bit13 (975~989) 15 982,
2601 11:35:26.862780 TX Bit6 (980~998) 19 989, Bit14 (973~987) 15 980,
2602 11:35:26.866244 TX Bit7 (977~992) 16 984, Bit15 (968~986) 19 977,
2603 11:35:26.866320
2604 11:35:26.869416 Write Rank0 MR14 =0x2
2605 11:35:26.878539
2606 11:35:26.878615 CH=1, VrefRange= 0, VrefLevel = 2
2607 11:35:26.884916 TX Bit0 (979~998) 20 988, Bit8 (970~987) 18 978,
2608 11:35:26.888605 TX Bit1 (978~997) 20 987, Bit9 (970~987) 18 978,
2609 11:35:26.895396 TX Bit2 (977~992) 16 984, Bit10 (972~987) 16 979,
2610 11:35:26.898407 TX Bit3 (975~991) 17 983, Bit11 (974~990) 17 982,
2611 11:35:26.901457 TX Bit4 (977~994) 18 985, Bit12 (972~990) 19 981,
2612 11:35:26.908365 TX Bit5 (978~998) 21 988, Bit13 (975~990) 16 982,
2613 11:35:26.911525 TX Bit6 (979~998) 20 988, Bit14 (974~987) 14 980,
2614 11:35:26.915480 TX Bit7 (978~992) 15 985, Bit15 (968~986) 19 977,
2615 11:35:26.915565
2616 11:35:26.918310 Write Rank0 MR14 =0x4
2617 11:35:26.927458
2618 11:35:26.927566 CH=1, VrefRange= 0, VrefLevel = 4
2619 11:35:26.934312 TX Bit0 (978~999) 22 988, Bit8 (970~987) 18 978,
2620 11:35:26.937318 TX Bit1 (977~997) 21 987, Bit9 (970~987) 18 978,
2621 11:35:26.943856 TX Bit2 (977~993) 17 985, Bit10 (971~987) 17 979,
2622 11:35:26.947243 TX Bit3 (975~991) 17 983, Bit11 (974~991) 18 982,
2623 11:35:26.950305 TX Bit4 (977~994) 18 985, Bit12 (972~991) 20 981,
2624 11:35:26.957565 TX Bit5 (978~998) 21 988, Bit13 (974~991) 18 982,
2625 11:35:26.960819 TX Bit6 (979~998) 20 988, Bit14 (973~988) 16 980,
2626 11:35:26.964302 TX Bit7 (977~993) 17 985, Bit15 (968~987) 20 977,
2627 11:35:26.964378
2628 11:35:26.967252 Write Rank0 MR14 =0x6
2629 11:35:26.976242
2630 11:35:26.976318 CH=1, VrefRange= 0, VrefLevel = 6
2631 11:35:26.982597 TX Bit0 (979~999) 21 989, Bit8 (969~987) 19 978,
2632 11:35:26.985894 TX Bit1 (977~997) 21 987, Bit9 (969~987) 19 978,
2633 11:35:26.992592 TX Bit2 (976~993) 18 984, Bit10 (971~989) 19 980,
2634 11:35:26.995825 TX Bit3 (975~991) 17 983, Bit11 (974~991) 18 982,
2635 11:35:26.999743 TX Bit4 (977~995) 19 986, Bit12 (972~991) 20 981,
2636 11:35:27.006138 TX Bit5 (978~998) 21 988, Bit13 (973~991) 19 982,
2637 11:35:27.009060 TX Bit6 (979~998) 20 988, Bit14 (972~989) 18 980,
2638 11:35:27.012529 TX Bit7 (977~994) 18 985, Bit15 (968~987) 20 977,
2639 11:35:27.012696
2640 11:35:27.016387 Write Rank0 MR14 =0x8
2641 11:35:27.025083
2642 11:35:27.025252 CH=1, VrefRange= 0, VrefLevel = 8
2643 11:35:27.032244 TX Bit0 (978~999) 22 988, Bit8 (969~989) 21 979,
2644 11:35:27.035254 TX Bit1 (977~997) 21 987, Bit9 (970~988) 19 979,
2645 11:35:27.041710 TX Bit2 (976~994) 19 985, Bit10 (972~990) 19 981,
2646 11:35:27.045411 TX Bit3 (974~992) 19 983, Bit11 (973~991) 19 982,
2647 11:35:27.048705 TX Bit4 (977~996) 20 986, Bit12 (971~991) 21 981,
2648 11:35:27.055650 TX Bit5 (977~999) 23 988, Bit13 (973~991) 19 982,
2649 11:35:27.059035 TX Bit6 (978~999) 22 988, Bit14 (972~990) 19 981,
2650 11:35:27.062226 TX Bit7 (977~994) 18 985, Bit15 (968~987) 20 977,
2651 11:35:27.062664
2652 11:35:27.065485 Write Rank0 MR14 =0xa
2653 11:35:27.074251
2654 11:35:27.077796 CH=1, VrefRange= 0, VrefLevel = 10
2655 11:35:27.081123 TX Bit0 (978~999) 22 988, Bit8 (969~990) 22 979,
2656 11:35:27.084758 TX Bit1 (977~998) 22 987, Bit9 (969~989) 21 979,
2657 11:35:27.091127 TX Bit2 (976~994) 19 985, Bit10 (970~991) 22 980,
2658 11:35:27.094298 TX Bit3 (974~992) 19 983, Bit11 (973~991) 19 982,
2659 11:35:27.097743 TX Bit4 (977~997) 21 987, Bit12 (971~992) 22 981,
2660 11:35:27.104009 TX Bit5 (977~999) 23 988, Bit13 (973~991) 19 982,
2661 11:35:27.107598 TX Bit6 (979~999) 21 989, Bit14 (971~991) 21 981,
2662 11:35:27.110903 TX Bit7 (977~995) 19 986, Bit15 (967~988) 22 977,
2663 11:35:27.111296
2664 11:35:27.114294 Write Rank0 MR14 =0xc
2665 11:35:27.123196
2666 11:35:27.126537 CH=1, VrefRange= 0, VrefLevel = 12
2667 11:35:27.129874 TX Bit0 (978~1000) 23 989, Bit8 (969~990) 22 979,
2668 11:35:27.132929 TX Bit1 (977~998) 22 987, Bit9 (969~990) 22 979,
2669 11:35:27.140022 TX Bit2 (976~995) 20 985, Bit10 (970~991) 22 980,
2670 11:35:27.143150 TX Bit3 (973~993) 21 983, Bit11 (972~992) 21 982,
2671 11:35:27.147034 TX Bit4 (976~997) 22 986, Bit12 (970~992) 23 981,
2672 11:35:27.153289 TX Bit5 (977~999) 23 988, Bit13 (972~992) 21 982,
2673 11:35:27.156677 TX Bit6 (978~999) 22 988, Bit14 (971~991) 21 981,
2674 11:35:27.159838 TX Bit7 (977~996) 20 986, Bit15 (967~989) 23 978,
2675 11:35:27.160049
2676 11:35:27.163299 Write Rank0 MR14 =0xe
2677 11:35:27.173237
2678 11:35:27.175939 CH=1, VrefRange= 0, VrefLevel = 14
2679 11:35:27.179250 TX Bit0 (978~1000) 23 989, Bit8 (969~991) 23 980,
2680 11:35:27.182667 TX Bit1 (976~998) 23 987, Bit9 (969~990) 22 979,
2681 11:35:27.189074 TX Bit2 (975~996) 22 985, Bit10 (971~991) 21 981,
2682 11:35:27.192634 TX Bit3 (973~993) 21 983, Bit11 (972~992) 21 982,
2683 11:35:27.195983 TX Bit4 (976~998) 23 987, Bit12 (970~992) 23 981,
2684 11:35:27.203361 TX Bit5 (977~999) 23 988, Bit13 (972~992) 21 982,
2685 11:35:27.206103 TX Bit6 (978~1000) 23 989, Bit14 (971~991) 21 981,
2686 11:35:27.209498 TX Bit7 (976~997) 22 986, Bit15 (967~989) 23 978,
2687 11:35:27.209880
2688 11:35:27.212664 Write Rank0 MR14 =0x10
2689 11:35:27.222305
2690 11:35:27.225623 CH=1, VrefRange= 0, VrefLevel = 16
2691 11:35:27.228738 TX Bit0 (978~1000) 23 989, Bit8 (969~991) 23 980,
2692 11:35:27.232755 TX Bit1 (976~999) 24 987, Bit9 (969~991) 23 980,
2693 11:35:27.238459 TX Bit2 (975~996) 22 985, Bit10 (969~991) 23 980,
2694 11:35:27.241809 TX Bit3 (972~993) 22 982, Bit11 (971~992) 22 981,
2695 11:35:27.245464 TX Bit4 (976~998) 23 987, Bit12 (970~992) 23 981,
2696 11:35:27.252025 TX Bit5 (977~1000) 24 988, Bit13 (971~992) 22 981,
2697 11:35:27.255407 TX Bit6 (978~1000) 23 989, Bit14 (970~992) 23 981,
2698 11:35:27.258619 TX Bit7 (976~997) 22 986, Bit15 (967~990) 24 978,
2699 11:35:27.262256
2700 11:35:27.262634 Write Rank0 MR14 =0x12
2701 11:35:27.271486
2702 11:35:27.275150 CH=1, VrefRange= 0, VrefLevel = 18
2703 11:35:27.278121 TX Bit0 (977~1001) 25 989, Bit8 (968~991) 24 979,
2704 11:35:27.281714 TX Bit1 (976~999) 24 987, Bit9 (968~991) 24 979,
2705 11:35:27.288689 TX Bit2 (975~997) 23 986, Bit10 (970~992) 23 981,
2706 11:35:27.291595 TX Bit3 (972~994) 23 983, Bit11 (970~993) 24 981,
2707 11:35:27.295273 TX Bit4 (976~998) 23 987, Bit12 (970~992) 23 981,
2708 11:35:27.301326 TX Bit5 (977~999) 23 988, Bit13 (970~992) 23 981,
2709 11:35:27.305087 TX Bit6 (978~1000) 23 989, Bit14 (970~992) 23 981,
2710 11:35:27.308231 TX Bit7 (976~997) 22 986, Bit15 (967~991) 25 979,
2711 11:35:27.308436
2712 11:35:27.311627 Write Rank0 MR14 =0x14
2713 11:35:27.321476
2714 11:35:27.324726 CH=1, VrefRange= 0, VrefLevel = 20
2715 11:35:27.327798 TX Bit0 (977~1001) 25 989, Bit8 (968~992) 25 980,
2716 11:35:27.331140 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
2717 11:35:27.338230 TX Bit2 (974~997) 24 985, Bit10 (969~992) 24 980,
2718 11:35:27.341009 TX Bit3 (971~995) 25 983, Bit11 (970~993) 24 981,
2719 11:35:27.344465 TX Bit4 (975~999) 25 987, Bit12 (969~993) 25 981,
2720 11:35:27.351047 TX Bit5 (977~1000) 24 988, Bit13 (971~992) 22 981,
2721 11:35:27.354440 TX Bit6 (977~1001) 25 989, Bit14 (970~992) 23 981,
2722 11:35:27.361253 TX Bit7 (975~998) 24 986, Bit15 (966~990) 25 978,
2723 11:35:27.361654
2724 11:35:27.361950 Write Rank0 MR14 =0x16
2725 11:35:27.371111
2726 11:35:27.374235 CH=1, VrefRange= 0, VrefLevel = 22
2727 11:35:27.377585 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
2728 11:35:27.381196 TX Bit1 (976~1000) 25 988, Bit9 (968~991) 24 979,
2729 11:35:27.387412 TX Bit2 (974~997) 24 985, Bit10 (969~992) 24 980,
2730 11:35:27.391529 TX Bit3 (971~996) 26 983, Bit11 (970~993) 24 981,
2731 11:35:27.394293 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2732 11:35:27.401235 TX Bit5 (976~1001) 26 988, Bit13 (970~992) 23 981,
2733 11:35:27.404268 TX Bit6 (978~1001) 24 989, Bit14 (969~992) 24 980,
2734 11:35:27.410428 TX Bit7 (975~998) 24 986, Bit15 (966~990) 25 978,
2735 11:35:27.410818
2736 11:35:27.411113 Write Rank0 MR14 =0x18
2737 11:35:27.420980
2738 11:35:27.424081 CH=1, VrefRange= 0, VrefLevel = 24
2739 11:35:27.427176 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
2740 11:35:27.430571 TX Bit1 (976~1000) 25 988, Bit9 (968~992) 25 980,
2741 11:35:27.437683 TX Bit2 (973~997) 25 985, Bit10 (968~992) 25 980,
2742 11:35:27.440298 TX Bit3 (971~995) 25 983, Bit11 (970~993) 24 981,
2743 11:35:27.443886 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2744 11:35:27.450294 TX Bit5 (976~1001) 26 988, Bit13 (970~992) 23 981,
2745 11:35:27.454011 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
2746 11:35:27.461086 TX Bit7 (975~998) 24 986, Bit15 (966~989) 24 977,
2747 11:35:27.461539
2748 11:35:27.461842 Write Rank0 MR14 =0x1a
2749 11:35:27.470712
2750 11:35:27.474091 CH=1, VrefRange= 0, VrefLevel = 26
2751 11:35:27.477061 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
2752 11:35:27.480773 TX Bit1 (976~1000) 25 988, Bit9 (968~992) 25 980,
2753 11:35:27.487101 TX Bit2 (973~997) 25 985, Bit10 (968~992) 25 980,
2754 11:35:27.490745 TX Bit3 (971~995) 25 983, Bit11 (970~993) 24 981,
2755 11:35:27.494123 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2756 11:35:27.500412 TX Bit5 (976~1001) 26 988, Bit13 (970~992) 23 981,
2757 11:35:27.504241 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
2758 11:35:27.507502 TX Bit7 (975~998) 24 986, Bit15 (966~989) 24 977,
2759 11:35:27.510733
2760 11:35:27.511112 Write Rank0 MR14 =0x1c
2761 11:35:27.520954
2762 11:35:27.523940 CH=1, VrefRange= 0, VrefLevel = 28
2763 11:35:27.527169 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
2764 11:35:27.530173 TX Bit1 (976~1000) 25 988, Bit9 (968~992) 25 980,
2765 11:35:27.536816 TX Bit2 (973~997) 25 985, Bit10 (968~992) 25 980,
2766 11:35:27.540219 TX Bit3 (971~995) 25 983, Bit11 (970~993) 24 981,
2767 11:35:27.543790 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2768 11:35:27.550427 TX Bit5 (976~1001) 26 988, Bit13 (970~992) 23 981,
2769 11:35:27.553525 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
2770 11:35:27.560579 TX Bit7 (975~998) 24 986, Bit15 (966~989) 24 977,
2771 11:35:27.560963
2772 11:35:27.561300 Write Rank0 MR14 =0x1e
2773 11:35:27.570380
2774 11:35:27.573650 CH=1, VrefRange= 0, VrefLevel = 30
2775 11:35:27.576561 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
2776 11:35:27.580207 TX Bit1 (976~1000) 25 988, Bit9 (968~992) 25 980,
2777 11:35:27.586753 TX Bit2 (973~997) 25 985, Bit10 (968~992) 25 980,
2778 11:35:27.590120 TX Bit3 (971~995) 25 983, Bit11 (970~993) 24 981,
2779 11:35:27.593647 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2780 11:35:27.600094 TX Bit5 (976~1001) 26 988, Bit13 (970~992) 23 981,
2781 11:35:27.603609 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
2782 11:35:27.610152 TX Bit7 (975~998) 24 986, Bit15 (966~989) 24 977,
2783 11:35:27.610539
2784 11:35:27.610830 Write Rank0 MR14 =0x20
2785 11:35:27.619681
2786 11:35:27.623296 CH=1, VrefRange= 0, VrefLevel = 32
2787 11:35:27.627186 TX Bit0 (977~1002) 26 989, Bit8 (968~992) 25 980,
2788 11:35:27.629575 TX Bit1 (976~1000) 25 988, Bit9 (968~992) 25 980,
2789 11:35:27.636586 TX Bit2 (973~997) 25 985, Bit10 (968~992) 25 980,
2790 11:35:27.639797 TX Bit3 (971~995) 25 983, Bit11 (970~993) 24 981,
2791 11:35:27.643468 TX Bit4 (975~998) 24 986, Bit12 (969~993) 25 981,
2792 11:35:27.649875 TX Bit5 (976~1001) 26 988, Bit13 (970~992) 23 981,
2793 11:35:27.652988 TX Bit6 (977~1002) 26 989, Bit14 (969~992) 24 980,
2794 11:35:27.659831 TX Bit7 (975~998) 24 986, Bit15 (966~989) 24 977,
2795 11:35:27.660108
2796 11:35:27.660319
2797 11:35:27.663091 TX Vref found, early break! 365< 376
2798 11:35:27.666296 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
2799 11:35:27.669637 u1DelayCellOfst[0]=7 cells (6 PI)
2800 11:35:27.672954 u1DelayCellOfst[1]=6 cells (5 PI)
2801 11:35:27.676526 u1DelayCellOfst[2]=2 cells (2 PI)
2802 11:35:27.679825 u1DelayCellOfst[3]=0 cells (0 PI)
2803 11:35:27.683408 u1DelayCellOfst[4]=3 cells (3 PI)
2804 11:35:27.683691 u1DelayCellOfst[5]=6 cells (5 PI)
2805 11:35:27.686391 u1DelayCellOfst[6]=7 cells (6 PI)
2806 11:35:27.690281 u1DelayCellOfst[7]=3 cells (3 PI)
2807 11:35:27.693041 Byte0, DQ PI dly=983, DQM PI dly= 986
2808 11:35:27.700021 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 23)
2809 11:35:27.700371
2810 11:35:27.703049 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 23)
2811 11:35:27.703430
2812 11:35:27.706633 u1DelayCellOfst[8]=3 cells (3 PI)
2813 11:35:27.709863 u1DelayCellOfst[9]=3 cells (3 PI)
2814 11:35:27.712982 u1DelayCellOfst[10]=3 cells (3 PI)
2815 11:35:27.716678 u1DelayCellOfst[11]=5 cells (4 PI)
2816 11:35:27.719595 u1DelayCellOfst[12]=5 cells (4 PI)
2817 11:35:27.722879 u1DelayCellOfst[13]=5 cells (4 PI)
2818 11:35:27.723399 u1DelayCellOfst[14]=3 cells (3 PI)
2819 11:35:27.726233 u1DelayCellOfst[15]=0 cells (0 PI)
2820 11:35:27.729680 Byte1, DQ PI dly=977, DQM PI dly= 979
2821 11:35:27.736461 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
2822 11:35:27.736851
2823 11:35:27.739777 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
2824 11:35:27.740166
2825 11:35:27.743049 Write Rank0 MR14 =0x18
2826 11:35:27.743432
2827 11:35:27.743729 Final TX Range 0 Vref 24
2828 11:35:27.744004
2829 11:35:27.749693 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
2830 11:35:27.750095
2831 11:35:27.756682 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
2832 11:35:27.763235 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2833 11:35:27.773255 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2834 11:35:27.773775 Write Rank0 MR3 =0xb0
2835 11:35:27.776987 DramC Write-DBI on
2836 11:35:27.777444 ==
2837 11:35:27.779931 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2838 11:35:27.783181 fsp= 1, odt_onoff= 1, Byte mode= 0
2839 11:35:27.783577 ==
2840 11:35:27.789996 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
2841 11:35:27.790383
2842 11:35:27.790681 Begin, DQ Scan Range 699~763
2843 11:35:27.790961
2844 11:35:27.793281
2845 11:35:27.793676 TX Vref Scan disable
2846 11:35:27.796604 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
2847 11:35:27.799838 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
2848 11:35:27.802906 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
2849 11:35:27.806719 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
2850 11:35:27.809898 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
2851 11:35:27.813433 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
2852 11:35:27.816729 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
2853 11:35:27.823276 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
2854 11:35:27.826393 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
2855 11:35:27.829542 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
2856 11:35:27.832982 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
2857 11:35:27.836168 710 |2 6 6|[0] xxxxxxxx oooooooo [MSB]
2858 11:35:27.839733 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
2859 11:35:27.843491 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
2860 11:35:27.846557 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
2861 11:35:27.850240 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
2862 11:35:27.852834 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
2863 11:35:27.856402 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
2864 11:35:27.860057 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
2865 11:35:27.862880 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
2866 11:35:27.870785 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
2867 11:35:27.874186 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
2868 11:35:27.877394 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
2869 11:35:27.880939 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
2870 11:35:27.884039 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
2871 11:35:27.887315 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
2872 11:35:27.890658 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
2873 11:35:27.894326 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
2874 11:35:27.897593 744 |2 6 40|[0] oooooooo xxxxxxxx [MSB]
2875 11:35:27.900616 745 |2 6 41|[0] xxxxxxxx xxxxxxxx [MSB]
2876 11:35:27.903927 Byte0, DQ PI dly=731, DQM PI dly= 731
2877 11:35:27.907328 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
2878 11:35:27.910562
2879 11:35:27.914260 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
2880 11:35:27.914796
2881 11:35:27.917420 Byte1, DQ PI dly=722, DQM PI dly= 722
2882 11:35:27.921048 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 18)
2883 11:35:27.921487
2884 11:35:27.927323 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 18)
2885 11:35:27.927727
2886 11:35:27.930632 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
2887 11:35:27.940434 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
2888 11:35:27.947428 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
2889 11:35:27.947821 Write Rank0 MR3 =0x30
2890 11:35:27.950409 DramC Write-DBI off
2891 11:35:27.950914
2892 11:35:27.951231 [DATLAT]
2893 11:35:27.953614 Freq=1600, CH1 RK0, use_rxtx_scan=0
2894 11:35:27.954120
2895 11:35:27.957365 DATLAT Default: 0xf
2896 11:35:27.957752 7, 0xFFFF, sum=0
2897 11:35:27.960710 8, 0xFFFF, sum=0
2898 11:35:27.961101 9, 0xFFFF, sum=0
2899 11:35:27.964296 10, 0xFFFF, sum=0
2900 11:35:27.964689 11, 0xFFFF, sum=0
2901 11:35:27.967200 12, 0xFFFF, sum=0
2902 11:35:27.967593 13, 0xFFFF, sum=0
2903 11:35:27.970858 14, 0x0, sum=1
2904 11:35:27.971250 15, 0x0, sum=2
2905 11:35:27.971557 16, 0x0, sum=3
2906 11:35:27.973695 17, 0x0, sum=4
2907 11:35:27.977234 pattern=2 first_step=14 total pass=5 best_step=16
2908 11:35:27.977634 ==
2909 11:35:27.983652 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2910 11:35:27.987600 fsp= 1, odt_onoff= 1, Byte mode= 0
2911 11:35:27.987989 ==
2912 11:35:27.990436 Start DQ dly to find pass range UseTestEngine =1
2913 11:35:27.993639 x-axis: bit #, y-axis: DQ dly (-127~63)
2914 11:35:27.996840 RX Vref Scan = 1
2915 11:35:28.110152
2916 11:35:28.110274 RX Vref found, early break!
2917 11:35:28.110333
2918 11:35:28.116733 Final RX Vref 13, apply to both rank0 and 1
2919 11:35:28.116813 ==
2920 11:35:28.120173 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 0
2921 11:35:28.123585 fsp= 1, odt_onoff= 1, Byte mode= 0
2922 11:35:28.123662 ==
2923 11:35:28.123720 DQS Delay:
2924 11:35:28.126657 DQS0 = 0, DQS1 = 0
2925 11:35:28.126748 DQM Delay:
2926 11:35:28.130377 DQM0 = 20, DQM1 = 18
2927 11:35:28.130453 DQ Delay:
2928 11:35:28.134159 DQ0 =24, DQ1 =22, DQ2 =16, DQ3 =15
2929 11:35:28.136604 DQ4 =18, DQ5 =23, DQ6 =25, DQ7 =19
2930 11:35:28.140471 DQ8 =19, DQ9 =19, DQ10 =18, DQ11 =19
2931 11:35:28.143505 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
2932 11:35:28.143581
2933 11:35:28.143640
2934 11:35:28.143694
2935 11:35:28.147045 [DramC_TX_OE_Calibration] TA2
2936 11:35:28.150187 Original DQ_B0 (3 6) =30, OEN = 27
2937 11:35:28.153564 Original DQ_B1 (3 6) =30, OEN = 27
2938 11:35:28.157027 23, 0x0, End_B0=23 End_B1=23
2939 11:35:28.157131 24, 0x0, End_B0=24 End_B1=24
2940 11:35:28.160168 25, 0x0, End_B0=25 End_B1=25
2941 11:35:28.163179 26, 0x0, End_B0=26 End_B1=26
2942 11:35:28.166910 27, 0x0, End_B0=27 End_B1=27
2943 11:35:28.170174 28, 0x0, End_B0=28 End_B1=28
2944 11:35:28.170251 29, 0x0, End_B0=29 End_B1=29
2945 11:35:28.173431 30, 0x0, End_B0=30 End_B1=30
2946 11:35:28.177005 31, 0xFFFF, End_B0=30 End_B1=30
2947 11:35:28.183890 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2948 11:35:28.186841 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
2949 11:35:28.186921
2950 11:35:28.186979
2951 11:35:28.190060 Write Rank0 MR23 =0x3f
2952 11:35:28.190159 [DQSOSC]
2953 11:35:28.197089 [DQSOSCAuto] RK0, (LSB)MR18= 0xbd, (MSB)MR19= 0x3, tDQSOscB0 = 329 ps tDQSOscB1 = 0 ps
2954 11:35:28.203557 CH1_RK0: MR19=0x3, MR18=0xBD, DQSOSC=329, MR23=63, INC=22, DEC=34
2955 11:35:28.206952 Write Rank0 MR23 =0x3f
2956 11:35:28.207026 [DQSOSC]
2957 11:35:28.213864 [DQSOSCAuto] RK0, (LSB)MR18= 0xb9, (MSB)MR19= 0x3, tDQSOscB0 = 330 ps tDQSOscB1 = 0 ps
2958 11:35:28.217117 CH1 RK0: MR19=3, MR18=B9
2959 11:35:28.219842 [RankSwap] Rank num 2, (Multi 1), Rank 1
2960 11:35:28.223548 Write Rank0 MR2 =0xad
2961 11:35:28.223623 [Write Leveling]
2962 11:35:28.227046 delay byte0 byte1 byte2 byte3
2963 11:35:28.227126
2964 11:35:28.230330 10 0 0
2965 11:35:28.230410 11 0 0
2966 11:35:28.230473 12 0 0
2967 11:35:28.233537 13 0 0
2968 11:35:28.233624 14 0 0
2969 11:35:28.237071 15 0 0
2970 11:35:28.237193 16 0 0
2971 11:35:28.237267 17 0 0
2972 11:35:28.239936 18 0 0
2973 11:35:28.240031 19 0 0
2974 11:35:28.243381 20 0 0
2975 11:35:28.243484 21 0 0
2976 11:35:28.247057 22 0 0
2977 11:35:28.247169 23 0 0
2978 11:35:28.247257 24 0 0
2979 11:35:28.249977 25 0 0
2980 11:35:28.250089 26 0 0
2981 11:35:28.253171 27 0 0
2982 11:35:28.253295 28 0 0
2983 11:35:28.253392 29 0 0
2984 11:35:28.256559 30 0 0
2985 11:35:28.256698 31 0 0
2986 11:35:28.260624 32 0 ff
2987 11:35:28.260763 33 0 ff
2988 11:35:28.263494 34 0 ff
2989 11:35:28.263652 35 ff ff
2990 11:35:28.266426 36 ff ff
2991 11:35:28.266673 37 ff ff
2992 11:35:28.266854 38 ff ff
2993 11:35:28.269980 39 ff ff
2994 11:35:28.270163 40 ff ff
2995 11:35:28.273670 41 ff ff
2996 11:35:28.276748 pass bytecount = 0xff (0xff: all bytes pass)
2997 11:35:28.277020
2998 11:35:28.277264 DQS0 dly: 35
2999 11:35:28.280420 DQS1 dly: 32
3000 11:35:28.280688 Write Rank0 MR2 =0x2d
3001 11:35:28.286836 [RankSwap] Rank num 2, (Multi 1), Rank 0
3002 11:35:28.287350 Write Rank1 MR1 =0xd6
3003 11:35:28.287814 [Gating]
3004 11:35:28.288109 ==
3005 11:35:28.293419 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3006 11:35:28.296648 fsp= 1, odt_onoff= 1, Byte mode= 0
3007 11:35:28.297203 ==
3008 11:35:28.300234 3 1 0 |3433 3534 |(11 11)(11 11) |(1 1)(1 1)| 0
3009 11:35:28.307038 3 1 4 |3232 3534 |(11 11)(11 11) |(1 0)(1 1)| 0
3010 11:35:28.310231 3 1 8 |3131 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3011 11:35:28.313659 3 1 12 |1919 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3012 11:35:28.320390 3 1 16 |3030 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3013 11:35:28.323803 3 1 20 |3534 3534 |(11 11)(11 11) |(1 0)(0 1)| 0
3014 11:35:28.326788 3 1 24 |3332 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3015 11:35:28.330496 3 1 28 |201 3534 |(11 11)(11 11) |(0 0)(0 1)| 0
3016 11:35:28.336761 3 2 0 |3938 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3017 11:35:28.340324 3 2 4 |2c2b 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3018 11:35:28.343360 3 2 8 |1818 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3019 11:35:28.350543 3 2 12 |3b3b 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3020 11:35:28.353942 [Byte 0] Lead/lag Transition tap number (1)
3021 11:35:28.356959 3 2 16 |3939 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3022 11:35:28.360576 3 2 20 |202 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3023 11:35:28.366677 3 2 24 |3939 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3024 11:35:28.370259 3 2 28 |3736 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3025 11:35:28.373275 3 3 0 |201 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3026 11:35:28.380367 3 3 4 |3534 201 |(11 11)(11 11) |(0 1)(1 1)| 0
3027 11:35:28.383736 3 3 8 |3534 3534 |(11 11)(11 11) |(0 1)(1 1)| 0
3028 11:35:28.386815 [Byte 1] Lead/lag falling Transition (3, 3, 8)
3029 11:35:28.389989 3 3 12 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3030 11:35:28.396870 3 3 16 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3031 11:35:28.400509 3 3 20 |3534 3534 |(11 11)(11 11) |(0 1)(0 1)| 0
3032 11:35:28.403882 3 3 24 |3534 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3033 11:35:28.410525 3 3 28 |201 3534 |(11 11)(11 11) |(1 1)(0 1)| 0
3034 11:35:28.413707 3 4 0 |3d3d 201 |(11 11)(11 11) |(1 1)(1 1)| 0
3035 11:35:28.416911 3 4 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3036 11:35:28.423232 3 4 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3037 11:35:28.426951 3 4 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3038 11:35:28.430061 3 4 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3039 11:35:28.433210 3 4 20 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3040 11:35:28.440891 3 4 24 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3041 11:35:28.443650 3 4 28 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3042 11:35:28.446923 3 5 0 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3043 11:35:28.453349 3 5 4 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3044 11:35:28.456759 3 5 8 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3045 11:35:28.460347 3 5 12 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3046 11:35:28.466678 3 5 16 |3d3d 3d3d |(11 11)(11 11) |(1 1)(1 1)| 0
3047 11:35:28.470112 [Byte 0] Lead/lag falling Transition (3, 5, 16)
3048 11:35:28.473650 3 5 20 |3d3d 3d3d |(11 11)(11 11) |(1 0)(1 1)| 0
3049 11:35:28.476799 [Byte 0] Lead/lag Transition tap number (2)
3050 11:35:28.483573 3 5 24 |3e3d 3d3d |(11 11)(11 11) |(0 0)(1 1)| 0
3051 11:35:28.486819 [Byte 1] Lead/lag falling Transition (3, 5, 24)
3052 11:35:28.490141 3 5 28 |202 3d3d |(11 11)(11 11) |(0 0)(1 0)| 0
3053 11:35:28.493532 [Byte 1] Lead/lag Transition tap number (2)
3054 11:35:28.500210 3 6 0 |4646 202 |(10 10)(11 11) |(0 0)(0 0)| 0
3055 11:35:28.503347 3 6 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3056 11:35:28.506652 [Byte 0]First pass (3, 6, 4)
3057 11:35:28.507149 [Byte 1]First pass (3, 6, 4)
3058 11:35:28.513861 3 6 8 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3059 11:35:28.517125 3 6 12 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3060 11:35:28.520072 3 6 16 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3061 11:35:28.523684 3 6 20 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3062 11:35:28.526560 3 6 24 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3063 11:35:28.533348 3 6 28 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3064 11:35:28.536549 3 7 0 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3065 11:35:28.540418 3 7 4 |4646 4646 |(0 0)(0 0) |(0 0)(0 0)| 0
3066 11:35:28.543325 All bytes gating window > 1UI, Early break!
3067 11:35:28.543633
3068 11:35:28.546591 best DQS0 dly(2T, 0.5T, PI) = (3, 5, 20)
3069 11:35:28.546811
3070 11:35:28.550150 best DQS1 dly(2T, 0.5T, PI) = (3, 5, 28)
3071 11:35:28.553181
3072 11:35:28.553359
3073 11:35:28.553516
3074 11:35:28.557087 best DQS0 P1 dly(2T, 0.5T, PI) = (4, 1, 20)
3075 11:35:28.557253
3076 11:35:28.559704 best DQS1 P1 dly(2T, 0.5T, PI) = (4, 1, 28)
3077 11:35:28.559829
3078 11:35:28.559922
3079 11:35:28.563186 Write Rank1 MR1 =0x56
3080 11:35:28.563298
3081 11:35:28.566730 best RODT dly(2T, 0.5T) = (2, 2)
3082 11:35:28.566839
3083 11:35:28.570289 best RODT dly(2T, 0.5T) = (2, 2)
3084 11:35:28.570389 ==
3085 11:35:28.573123 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3086 11:35:28.576646 fsp= 1, odt_onoff= 1, Byte mode= 0
3087 11:35:28.576748 ==
3088 11:35:28.579936 Start DQ dly to find pass range UseTestEngine =0
3089 11:35:28.586952 x-axis: bit #, y-axis: DQ dly (-127~63)
3090 11:35:28.587051 RX Vref Scan = 0
3091 11:35:28.590214 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3092 11:35:28.593235 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3093 11:35:28.596937 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3094 11:35:28.597031 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3095 11:35:28.600312 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3096 11:35:28.603467 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3097 11:35:28.606850 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3098 11:35:28.609747 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3099 11:35:28.613310 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3100 11:35:28.616467 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3101 11:35:28.620237 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3102 11:35:28.623318 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3103 11:35:28.623426 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3104 11:35:28.626762 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3105 11:35:28.629934 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3106 11:35:28.633106 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3107 11:35:28.636562 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3108 11:35:28.639685 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3109 11:35:28.643110 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3110 11:35:28.646666 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3111 11:35:28.646921 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3112 11:35:28.650055 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3113 11:35:28.653019 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3114 11:35:28.656885 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3115 11:35:28.659981 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3116 11:35:28.663388 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3117 11:35:28.666403 0, [0] xxxoxxxx xxxxxxxo [MSB]
3118 11:35:28.666914 1, [0] xxooxxxo xxxxxxxo [MSB]
3119 11:35:28.670324 2, [0] xxoooxxo xxxxxxxo [MSB]
3120 11:35:28.673669 3, [0] xxoooxxo ooooxooo [MSB]
3121 11:35:28.676667 4, [0] xxoooxxo ooooxooo [MSB]
3122 11:35:28.679766 5, [0] xoooooxo oooooooo [MSB]
3123 11:35:28.683697 6, [0] xoooooxo oooooooo [MSB]
3124 11:35:28.684092 34, [0] oooxoooo oooooooo [MSB]
3125 11:35:28.686330 35, [0] ooxxoooo ooooooox [MSB]
3126 11:35:28.690050 36, [0] ooxxoooo ooooooox [MSB]
3127 11:35:28.692932 37, [0] ooxxxooo ooxoooox [MSB]
3128 11:35:28.696469 38, [0] ooxxxooo xoxooxxx [MSB]
3129 11:35:28.699486 39, [0] ooxxxoox xxxxoxxx [MSB]
3130 11:35:28.702863 40, [0] ooxxxoox xxxxoxxx [MSB]
3131 11:35:28.703259 41, [0] ooxxxoox xxxxxxxx [MSB]
3132 11:35:28.706609 42, [0] xxxxxxxx xxxxxxxx [MSB]
3133 11:35:28.709722 iDelay=42, Bit 0, Center 24 (7 ~ 41) 35
3134 11:35:28.712974 iDelay=42, Bit 1, Center 23 (5 ~ 41) 37
3135 11:35:28.716588 iDelay=42, Bit 2, Center 17 (1 ~ 34) 34
3136 11:35:28.723372 iDelay=42, Bit 3, Center 15 (-2 ~ 33) 36
3137 11:35:28.726679 iDelay=42, Bit 4, Center 19 (2 ~ 36) 35
3138 11:35:28.730218 iDelay=42, Bit 5, Center 23 (5 ~ 41) 37
3139 11:35:28.733391 iDelay=42, Bit 6, Center 24 (7 ~ 41) 35
3140 11:35:28.736577 iDelay=42, Bit 7, Center 19 (1 ~ 38) 38
3141 11:35:28.739676 iDelay=42, Bit 8, Center 20 (3 ~ 37) 35
3142 11:35:28.743379 iDelay=42, Bit 9, Center 20 (3 ~ 38) 36
3143 11:35:28.746546 iDelay=42, Bit 10, Center 19 (3 ~ 36) 34
3144 11:35:28.749795 iDelay=42, Bit 11, Center 20 (3 ~ 38) 36
3145 11:35:28.753448 iDelay=42, Bit 12, Center 22 (5 ~ 40) 36
3146 11:35:28.756561 iDelay=42, Bit 13, Center 20 (3 ~ 37) 35
3147 11:35:28.760158 iDelay=42, Bit 14, Center 20 (3 ~ 37) 35
3148 11:35:28.763245 iDelay=42, Bit 15, Center 17 (0 ~ 34) 35
3149 11:35:28.763630 ==
3150 11:35:28.770014 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3151 11:35:28.773273 fsp= 1, odt_onoff= 1, Byte mode= 0
3152 11:35:28.773661 ==
3153 11:35:28.774001 DQS Delay:
3154 11:35:28.776381 DQS0 = 0, DQS1 = 0
3155 11:35:28.776763 DQM Delay:
3156 11:35:28.779570 DQM0 = 20, DQM1 = 19
3157 11:35:28.779952 DQ Delay:
3158 11:35:28.783271 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
3159 11:35:28.786679 DQ4 =19, DQ5 =23, DQ6 =24, DQ7 =19
3160 11:35:28.789679 DQ8 =20, DQ9 =20, DQ10 =19, DQ11 =20
3161 11:35:28.793102 DQ12 =22, DQ13 =20, DQ14 =20, DQ15 =17
3162 11:35:28.793533
3163 11:35:28.793831
3164 11:35:28.796467 DramC Write-DBI off
3165 11:35:28.796847 ==
3166 11:35:28.799941 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3167 11:35:28.803090 fsp= 1, odt_onoff= 1, Byte mode= 0
3168 11:35:28.803473 ==
3169 11:35:28.806781 [TxWindowPerbitCal] calType=2, VrefScanEnable 0
3170 11:35:28.807165
3171 11:35:28.810044 Begin, DQ Scan Range 928~1184
3172 11:35:28.810424
3173 11:35:28.810718
3174 11:35:28.813373 TX Vref Scan disable
3175 11:35:28.816533 928 |3 4 32|[0] xxxxxxxx xxxxxxxx [MSB]
3176 11:35:28.819806 929 |3 4 33|[0] xxxxxxxx xxxxxxxx [MSB]
3177 11:35:28.822885 930 |3 4 34|[0] xxxxxxxx xxxxxxxx [MSB]
3178 11:35:28.826271 931 |3 4 35|[0] xxxxxxxx xxxxxxxx [MSB]
3179 11:35:28.829663 932 |3 4 36|[0] xxxxxxxx xxxxxxxx [MSB]
3180 11:35:28.833020 933 |3 4 37|[0] xxxxxxxx xxxxxxxx [MSB]
3181 11:35:28.836322 934 |3 4 38|[0] xxxxxxxx xxxxxxxx [MSB]
3182 11:35:28.839889 935 |3 4 39|[0] xxxxxxxx xxxxxxxx [MSB]
3183 11:35:28.843375 936 |3 4 40|[0] xxxxxxxx xxxxxxxx [MSB]
3184 11:35:28.850058 937 |3 4 41|[0] xxxxxxxx xxxxxxxx [MSB]
3185 11:35:28.853227 938 |3 4 42|[0] xxxxxxxx xxxxxxxx [MSB]
3186 11:35:28.856612 939 |3 4 43|[0] xxxxxxxx xxxxxxxx [MSB]
3187 11:35:28.860045 940 |3 4 44|[0] xxxxxxxx xxxxxxxx [MSB]
3188 11:35:28.863506 941 |3 4 45|[0] xxxxxxxx xxxxxxxx [MSB]
3189 11:35:28.866438 942 |3 4 46|[0] xxxxxxxx xxxxxxxx [MSB]
3190 11:35:28.869768 943 |3 4 47|[0] xxxxxxxx xxxxxxxx [MSB]
3191 11:35:28.872947 944 |3 4 48|[0] xxxxxxxx xxxxxxxx [MSB]
3192 11:35:28.876367 945 |3 4 49|[0] xxxxxxxx xxxxxxxx [MSB]
3193 11:35:28.879947 946 |3 4 50|[0] xxxxxxxx xxxxxxxx [MSB]
3194 11:35:28.882715 947 |3 4 51|[0] xxxxxxxx xxxxxxxx [MSB]
3195 11:35:28.886072 948 |3 4 52|[0] xxxxxxxx xxxxxxxx [MSB]
3196 11:35:28.889771 949 |3 4 53|[0] xxxxxxxx xxxxxxxx [MSB]
3197 11:35:28.893188 950 |3 4 54|[0] xxxxxxxx xxxxxxxx [MSB]
3198 11:35:28.896995 951 |3 4 55|[0] xxxxxxxx xxxxxxxx [MSB]
3199 11:35:28.900054 952 |3 4 56|[0] xxxxxxxx xxxxxxxx [MSB]
3200 11:35:28.906184 953 |3 4 57|[0] xxxxxxxx xxxxxxxx [MSB]
3201 11:35:28.909626 954 |3 4 58|[0] xxxxxxxx xxxxxxxx [MSB]
3202 11:35:28.912898 955 |3 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3203 11:35:28.916317 956 |3 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3204 11:35:28.920129 957 |3 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3205 11:35:28.923136 958 |3 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3206 11:35:28.926729 959 |3 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3207 11:35:28.929452 960 |3 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3208 11:35:28.932786 961 |3 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3209 11:35:28.936759 962 |3 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3210 11:35:28.939854 963 |3 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3211 11:35:28.943372 964 |3 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3212 11:35:28.946340 965 |3 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3213 11:35:28.950037 966 |3 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3214 11:35:28.953117 967 |3 6 7|[0] xxxxxxxx xxxxxxxo [MSB]
3215 11:35:28.956427 968 |3 6 8|[0] xxxxxxxx xxxxxxxo [MSB]
3216 11:35:28.959617 969 |3 6 9|[0] xxxxxxxx oooxxxxo [MSB]
3217 11:35:28.963051 970 |3 6 10|[0] xxxxxxxx oooxoxoo [MSB]
3218 11:35:28.966640 971 |3 6 11|[0] xxxxxxxx oooooooo [MSB]
3219 11:35:28.969682 972 |3 6 12|[0] xxxxxxxx oooooooo [MSB]
3220 11:35:28.972892 973 |3 6 13|[0] xxooxxxx oooooooo [MSB]
3221 11:35:28.980482 974 |3 6 14|[0] xxooxxxx oooooooo [MSB]
3222 11:35:28.983274 975 |3 6 15|[0] xxoooxxx oooooooo [MSB]
3223 11:35:28.987128 976 |3 6 16|[0] xxoooxxo oooooooo [MSB]
3224 11:35:28.989712 989 |3 6 29|[0] oooooooo ooooooox [MSB]
3225 11:35:28.992925 990 |3 6 30|[0] oooooooo ooooooox [MSB]
3226 11:35:28.996680 991 |3 6 31|[0] oooooooo xxxxxxxx [MSB]
3227 11:35:29.000171 992 |3 6 32|[0] oooooooo xxxxxxxx [MSB]
3228 11:35:29.006561 993 |3 6 33|[0] oooooooo xxxxxxxx [MSB]
3229 11:35:29.009577 994 |3 6 34|[0] oooooooo xxxxxxxx [MSB]
3230 11:35:29.013574 995 |3 6 35|[0] ooxxoooo xxxxxxxx [MSB]
3231 11:35:29.016416 996 |3 6 36|[0] ooxxoooo xxxxxxxx [MSB]
3232 11:35:29.020045 997 |3 6 37|[0] ooxxooox xxxxxxxx [MSB]
3233 11:35:29.023493 998 |3 6 38|[0] ooxxxoox xxxxxxxx [MSB]
3234 11:35:29.026828 999 |3 6 39|[0] xxxxxxxx xxxxxxxx [MSB]
3235 11:35:29.029945 Byte0, DQ PI dly=985, DQM PI dly= 985
3236 11:35:29.033791 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 25)
3237 11:35:29.034176
3238 11:35:29.036702 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 25)
3239 11:35:29.039749
3240 11:35:29.043040 Byte1, DQ PI dly=978, DQM PI dly= 978
3241 11:35:29.046430 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 18)
3242 11:35:29.046815
3243 11:35:29.049919 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 18)
3244 11:35:29.050305
3245 11:35:29.050602 ==
3246 11:35:29.056494 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3247 11:35:29.059600 fsp= 1, odt_onoff= 1, Byte mode= 0
3248 11:35:29.059979 ==
3249 11:35:29.062870 [TxWindowPerbitCal] calType=0, VrefScanEnable 1
3250 11:35:29.063246
3251 11:35:29.066554 Begin, DQ Scan Range 954~1018
3252 11:35:29.069653 Write Rank1 MR14 =0x0
3253 11:35:29.077241
3254 11:35:29.077621 CH=1, VrefRange= 0, VrefLevel = 0
3255 11:35:29.083717 TX Bit0 (979~998) 20 988, Bit8 (971~987) 17 979,
3256 11:35:29.087428 TX Bit1 (978~995) 18 986, Bit9 (970~986) 17 978,
3257 11:35:29.093889 TX Bit2 (976~991) 16 983, Bit10 (973~986) 14 979,
3258 11:35:29.097598 TX Bit3 (975~990) 16 982, Bit11 (974~990) 17 982,
3259 11:35:29.100908 TX Bit4 (977~992) 16 984, Bit12 (972~988) 17 980,
3260 11:35:29.107484 TX Bit5 (978~996) 19 987, Bit13 (974~987) 14 980,
3261 11:35:29.110456 TX Bit6 (978~997) 20 987, Bit14 (973~987) 15 980,
3262 11:35:29.113983 TX Bit7 (977~992) 16 984, Bit15 (968~985) 18 976,
3263 11:35:29.114367
3264 11:35:29.117517 Write Rank1 MR14 =0x2
3265 11:35:29.126257
3266 11:35:29.126637 CH=1, VrefRange= 0, VrefLevel = 2
3267 11:35:29.132922 TX Bit0 (979~998) 20 988, Bit8 (971~987) 17 979,
3268 11:35:29.136067 TX Bit1 (978~995) 18 986, Bit9 (970~986) 17 978,
3269 11:35:29.142696 TX Bit2 (976~991) 16 983, Bit10 (973~986) 14 979,
3270 11:35:29.146263 TX Bit3 (975~990) 16 982, Bit11 (974~990) 17 982,
3271 11:35:29.149766 TX Bit4 (977~992) 16 984, Bit12 (972~988) 17 980,
3272 11:35:29.156718 TX Bit5 (978~996) 19 987, Bit13 (974~987) 14 980,
3273 11:35:29.159628 TX Bit6 (978~997) 20 987, Bit14 (973~987) 15 980,
3274 11:35:29.162968 TX Bit7 (977~992) 16 984, Bit15 (968~985) 18 976,
3275 11:35:29.163353
3276 11:35:29.165996 Write Rank1 MR14 =0x4
3277 11:35:29.174960
3278 11:35:29.175342 CH=1, VrefRange= 0, VrefLevel = 4
3279 11:35:29.181803 TX Bit0 (978~998) 21 988, Bit8 (971~988) 18 979,
3280 11:35:29.185186 TX Bit1 (978~997) 20 987, Bit9 (970~987) 18 978,
3281 11:35:29.191417 TX Bit2 (976~992) 17 984, Bit10 (971~987) 17 979,
3282 11:35:29.195191 TX Bit3 (974~991) 18 982, Bit11 (973~991) 19 982,
3283 11:35:29.199309 TX Bit4 (976~993) 18 984, Bit12 (972~989) 18 980,
3284 11:35:29.204828 TX Bit5 (978~998) 21 988, Bit13 (974~988) 15 981,
3285 11:35:29.208627 TX Bit6 (978~998) 21 988, Bit14 (972~988) 17 980,
3286 11:35:29.211384 TX Bit7 (977~992) 16 984, Bit15 (968~985) 18 976,
3287 11:35:29.211769
3288 11:35:29.214884 Write Rank1 MR14 =0x6
3289 11:35:29.223819
3290 11:35:29.224198 CH=1, VrefRange= 0, VrefLevel = 6
3291 11:35:29.230394 TX Bit0 (978~998) 21 988, Bit8 (970~987) 18 978,
3292 11:35:29.234322 TX Bit1 (978~997) 20 987, Bit9 (970~987) 18 978,
3293 11:35:29.240821 TX Bit2 (975~992) 18 983, Bit10 (971~988) 18 979,
3294 11:35:29.243953 TX Bit3 (974~991) 18 982, Bit11 (972~991) 20 981,
3295 11:35:29.247324 TX Bit4 (976~994) 19 985, Bit12 (972~990) 19 981,
3296 11:35:29.253926 TX Bit5 (977~998) 22 987, Bit13 (974~989) 16 981,
3297 11:35:29.257081 TX Bit6 (978~998) 21 988, Bit14 (972~989) 18 980,
3298 11:35:29.260852 TX Bit7 (977~993) 17 985, Bit15 (968~986) 19 977,
3299 11:35:29.261287
3300 11:35:29.263971 Write Rank1 MR14 =0x8
3301 11:35:29.273100
3302 11:35:29.273519 CH=1, VrefRange= 0, VrefLevel = 8
3303 11:35:29.279954 TX Bit0 (978~999) 22 988, Bit8 (970~989) 20 979,
3304 11:35:29.283279 TX Bit1 (977~998) 22 987, Bit9 (969~988) 20 978,
3305 11:35:29.289979 TX Bit2 (975~992) 18 983, Bit10 (970~989) 20 979,
3306 11:35:29.293196 TX Bit3 (973~992) 20 982, Bit11 (972~992) 21 982,
3307 11:35:29.296939 TX Bit4 (976~995) 20 985, Bit12 (971~990) 20 980,
3308 11:35:29.303275 TX Bit5 (977~998) 22 987, Bit13 (973~989) 17 981,
3309 11:35:29.306860 TX Bit6 (978~998) 21 988, Bit14 (972~990) 19 981,
3310 11:35:29.309644 TX Bit7 (977~994) 18 985, Bit15 (968~986) 19 977,
3311 11:35:29.310029
3312 11:35:29.312993 Write Rank1 MR14 =0xa
3313 11:35:29.322330
3314 11:35:29.326475 CH=1, VrefRange= 0, VrefLevel = 10
3315 11:35:29.329205 TX Bit0 (978~999) 22 988, Bit8 (970~989) 20 979,
3316 11:35:29.332586 TX Bit1 (977~998) 22 987, Bit9 (969~989) 21 979,
3317 11:35:29.338947 TX Bit2 (975~993) 19 984, Bit10 (970~989) 20 979,
3318 11:35:29.342485 TX Bit3 (973~992) 20 982, Bit11 (972~992) 21 982,
3319 11:35:29.346084 TX Bit4 (976~995) 20 985, Bit12 (971~991) 21 981,
3320 11:35:29.352461 TX Bit5 (977~998) 22 987, Bit13 (972~990) 19 981,
3321 11:35:29.355885 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
3322 11:35:29.359143 TX Bit7 (976~994) 19 985, Bit15 (967~986) 20 976,
3323 11:35:29.359633
3324 11:35:29.362058 Write Rank1 MR14 =0xc
3325 11:35:29.371510
3326 11:35:29.374923 CH=1, VrefRange= 0, VrefLevel = 12
3327 11:35:29.377981 TX Bit0 (978~1000) 23 989, Bit8 (970~990) 21 980,
3328 11:35:29.381342 TX Bit1 (978~998) 21 988, Bit9 (969~989) 21 979,
3329 11:35:29.388295 TX Bit2 (974~993) 20 983, Bit10 (970~991) 22 980,
3330 11:35:29.391856 TX Bit3 (972~993) 22 982, Bit11 (971~992) 22 981,
3331 11:35:29.394691 TX Bit4 (975~996) 22 985, Bit12 (970~991) 22 980,
3332 11:35:29.401487 TX Bit5 (977~998) 22 987, Bit13 (972~991) 20 981,
3333 11:35:29.404736 TX Bit6 (978~999) 22 988, Bit14 (970~991) 22 980,
3334 11:35:29.408280 TX Bit7 (976~995) 20 985, Bit15 (967~987) 21 977,
3335 11:35:29.411346
3336 11:35:29.411724 Write Rank1 MR14 =0xe
3337 11:35:29.421184
3338 11:35:29.424386 CH=1, VrefRange= 0, VrefLevel = 14
3339 11:35:29.428079 TX Bit0 (978~1000) 23 989, Bit8 (969~991) 23 980,
3340 11:35:29.432013 TX Bit1 (978~998) 21 988, Bit9 (969~989) 21 979,
3341 11:35:29.437879 TX Bit2 (974~994) 21 984, Bit10 (970~991) 22 980,
3342 11:35:29.440822 TX Bit3 (972~993) 22 982, Bit11 (971~992) 22 981,
3343 11:35:29.444479 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3344 11:35:29.451479 TX Bit5 (977~998) 22 987, Bit13 (972~991) 20 981,
3345 11:35:29.454714 TX Bit6 (977~999) 23 988, Bit14 (970~991) 22 980,
3346 11:35:29.457798 TX Bit7 (977~996) 20 986, Bit15 (967~987) 21 977,
3347 11:35:29.458182
3348 11:35:29.461289 Write Rank1 MR14 =0x10
3349 11:35:29.470813
3350 11:35:29.473767 CH=1, VrefRange= 0, VrefLevel = 16
3351 11:35:29.477234 TX Bit0 (977~1000) 24 988, Bit8 (969~991) 23 980,
3352 11:35:29.480633 TX Bit1 (977~999) 23 988, Bit9 (968~990) 23 979,
3353 11:35:29.486973 TX Bit2 (973~995) 23 984, Bit10 (969~991) 23 980,
3354 11:35:29.491212 TX Bit3 (971~994) 24 982, Bit11 (970~993) 24 981,
3355 11:35:29.493943 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3356 11:35:29.500359 TX Bit5 (977~999) 23 988, Bit13 (971~991) 21 981,
3357 11:35:29.504190 TX Bit6 (977~1000) 24 988, Bit14 (970~992) 23 981,
3358 11:35:29.507175 TX Bit7 (976~996) 21 986, Bit15 (967~987) 21 977,
3359 11:35:29.510531
3360 11:35:29.511012 Write Rank1 MR14 =0x12
3361 11:35:29.520560
3362 11:35:29.523675 CH=1, VrefRange= 0, VrefLevel = 18
3363 11:35:29.527120 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3364 11:35:29.530498 TX Bit1 (977~999) 23 988, Bit9 (969~991) 23 980,
3365 11:35:29.536882 TX Bit2 (974~995) 22 984, Bit10 (969~991) 23 980,
3366 11:35:29.540574 TX Bit3 (971~994) 24 982, Bit11 (970~993) 24 981,
3367 11:35:29.543550 TX Bit4 (975~997) 23 986, Bit12 (970~992) 23 981,
3368 11:35:29.550681 TX Bit5 (977~999) 23 988, Bit13 (971~991) 21 981,
3369 11:35:29.553894 TX Bit6 (977~1000) 24 988, Bit14 (969~992) 24 980,
3370 11:35:29.557173 TX Bit7 (976~997) 22 986, Bit15 (967~988) 22 977,
3371 11:35:29.560694
3372 11:35:29.561214 Write Rank1 MR14 =0x14
3373 11:35:29.570272
3374 11:35:29.573756 CH=1, VrefRange= 0, VrefLevel = 20
3375 11:35:29.576933 TX Bit0 (977~1001) 25 989, Bit8 (968~991) 24 979,
3376 11:35:29.580256 TX Bit1 (977~999) 23 988, Bit9 (968~991) 24 979,
3377 11:35:29.587128 TX Bit2 (973~996) 24 984, Bit10 (969~991) 23 980,
3378 11:35:29.590298 TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981,
3379 11:35:29.593729 TX Bit4 (974~998) 25 986, Bit12 (970~992) 23 981,
3380 11:35:29.600643 TX Bit5 (977~999) 23 988, Bit13 (970~992) 23 981,
3381 11:35:29.604117 TX Bit6 (977~1001) 25 989, Bit14 (970~992) 23 981,
3382 11:35:29.606793 TX Bit7 (976~997) 22 986, Bit15 (967~988) 22 977,
3383 11:35:29.609876
3384 11:35:29.610253 Write Rank1 MR14 =0x16
3385 11:35:29.620000
3386 11:35:29.623067 CH=1, VrefRange= 0, VrefLevel = 22
3387 11:35:29.626667 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3388 11:35:29.630037 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3389 11:35:29.636748 TX Bit2 (972~996) 25 984, Bit10 (969~991) 23 980,
3390 11:35:29.640314 TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981,
3391 11:35:29.643651 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3392 11:35:29.649740 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3393 11:35:29.652893 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3394 11:35:29.659912 TX Bit7 (975~998) 24 986, Bit15 (966~989) 24 977,
3395 11:35:29.660359
3396 11:35:29.660737 Write Rank1 MR14 =0x18
3397 11:35:29.669889
3398 11:35:29.673347 CH=1, VrefRange= 0, VrefLevel = 24
3399 11:35:29.676837 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3400 11:35:29.679769 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3401 11:35:29.687112 TX Bit2 (972~996) 25 984, Bit10 (969~991) 23 980,
3402 11:35:29.689881 TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981,
3403 11:35:29.693089 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3404 11:35:29.699711 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3405 11:35:29.703535 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3406 11:35:29.709960 TX Bit7 (975~998) 24 986, Bit15 (966~989) 24 977,
3407 11:35:29.710345
3408 11:35:29.710638 Write Rank1 MR14 =0x1a
3409 11:35:29.720626
3410 11:35:29.723233 CH=1, VrefRange= 0, VrefLevel = 26
3411 11:35:29.727129 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3412 11:35:29.730151 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3413 11:35:29.736454 TX Bit2 (972~996) 25 984, Bit10 (969~991) 23 980,
3414 11:35:29.740054 TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981,
3415 11:35:29.743345 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3416 11:35:29.750143 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3417 11:35:29.753890 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3418 11:35:29.760314 TX Bit7 (975~998) 24 986, Bit15 (966~989) 24 977,
3419 11:35:29.760699
3420 11:35:29.760990 Write Rank1 MR14 =0x1c
3421 11:35:29.770416
3422 11:35:29.773580 CH=1, VrefRange= 0, VrefLevel = 28
3423 11:35:29.776786 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3424 11:35:29.779856 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3425 11:35:29.787031 TX Bit2 (972~996) 25 984, Bit10 (969~991) 23 980,
3426 11:35:29.790287 TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981,
3427 11:35:29.793474 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3428 11:35:29.800104 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3429 11:35:29.803496 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3430 11:35:29.809859 TX Bit7 (975~998) 24 986, Bit15 (966~989) 24 977,
3431 11:35:29.810242
3432 11:35:29.810538 Write Rank1 MR14 =0x1e
3433 11:35:29.819876
3434 11:35:29.823156 CH=1, VrefRange= 0, VrefLevel = 30
3435 11:35:29.826621 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3436 11:35:29.830078 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3437 11:35:29.836506 TX Bit2 (972~996) 25 984, Bit10 (969~991) 23 980,
3438 11:35:29.840188 TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981,
3439 11:35:29.843375 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3440 11:35:29.850017 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3441 11:35:29.853482 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3442 11:35:29.859929 TX Bit7 (975~998) 24 986, Bit15 (966~989) 24 977,
3443 11:35:29.860455
3444 11:35:29.860833 Write Rank1 MR14 =0x20
3445 11:35:29.870106
3446 11:35:29.873164 CH=1, VrefRange= 0, VrefLevel = 32
3447 11:35:29.876405 TX Bit0 (977~1001) 25 989, Bit8 (969~991) 23 980,
3448 11:35:29.880481 TX Bit1 (977~1000) 24 988, Bit9 (968~991) 24 979,
3449 11:35:29.886644 TX Bit2 (972~996) 25 984, Bit10 (969~991) 23 980,
3450 11:35:29.889917 TX Bit3 (970~995) 26 982, Bit11 (970~993) 24 981,
3451 11:35:29.893195 TX Bit4 (974~998) 25 986, Bit12 (969~992) 24 980,
3452 11:35:29.900250 TX Bit5 (976~1000) 25 988, Bit13 (970~992) 23 981,
3453 11:35:29.903399 TX Bit6 (976~1001) 26 988, Bit14 (969~992) 24 980,
3454 11:35:29.909959 TX Bit7 (975~998) 24 986, Bit15 (966~989) 24 977,
3455 11:35:29.910340
3456 11:35:29.910630
3457 11:35:29.912955 TX Vref found, early break! 360< 369
3458 11:35:29.916468 [TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =762/100 ps
3459 11:35:29.920337 u1DelayCellOfst[0]=8 cells (7 PI)
3460 11:35:29.923068 u1DelayCellOfst[1]=7 cells (6 PI)
3461 11:35:29.926402 u1DelayCellOfst[2]=2 cells (2 PI)
3462 11:35:29.929672 u1DelayCellOfst[3]=0 cells (0 PI)
3463 11:35:29.933395 u1DelayCellOfst[4]=5 cells (4 PI)
3464 11:35:29.936643 u1DelayCellOfst[5]=7 cells (6 PI)
3465 11:35:29.937024 u1DelayCellOfst[6]=7 cells (6 PI)
3466 11:35:29.940039 u1DelayCellOfst[7]=5 cells (4 PI)
3467 11:35:29.942876 Byte0, DQ PI dly=982, DQM PI dly= 985
3468 11:35:29.950025 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 22)
3469 11:35:29.950417
3470 11:35:29.953111 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 22)
3471 11:35:29.953526
3472 11:35:29.956257 u1DelayCellOfst[8]=3 cells (3 PI)
3473 11:35:29.959940 u1DelayCellOfst[9]=2 cells (2 PI)
3474 11:35:29.963151 u1DelayCellOfst[10]=3 cells (3 PI)
3475 11:35:29.966426 u1DelayCellOfst[11]=5 cells (4 PI)
3476 11:35:29.970065 u1DelayCellOfst[12]=3 cells (3 PI)
3477 11:35:29.973529 u1DelayCellOfst[13]=5 cells (4 PI)
3478 11:35:29.973907 u1DelayCellOfst[14]=3 cells (3 PI)
3479 11:35:29.976162 u1DelayCellOfst[15]=0 cells (0 PI)
3480 11:35:29.979588 Byte1, DQ PI dly=977, DQM PI dly= 979
3481 11:35:29.986376 Final DQ PI dly(LargeUI, SmallUI, PI) =(3 ,6, 17)
3482 11:35:29.986776
3483 11:35:29.989882 OEN DQ PI dly(LargeUI, SmallUI, PI) =(3 ,3, 17)
3484 11:35:29.990401
3485 11:35:29.993562 Write Rank1 MR14 =0x16
3486 11:35:29.994065
3487 11:35:29.994550 Final TX Range 0 Vref 22
3488 11:35:29.996363
3489 11:35:29.999997 [TX_K_DQM_WITH_WDBI] Step1: K DQM with DBI_ON, and check DQM window spec.
3490 11:35:30.003301
3491 11:35:30.006397 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3492 11:35:30.016563 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3493 11:35:30.022932 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3494 11:35:30.023445 Write Rank1 MR3 =0xb0
3495 11:35:30.026440 DramC Write-DBI on
3496 11:35:30.026932 ==
3497 11:35:30.029652 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3498 11:35:30.033177 fsp= 1, odt_onoff= 1, Byte mode= 0
3499 11:35:30.033667 ==
3500 11:35:30.039978 [TxWindowPerbitCal] calType=1, VrefScanEnable 0
3501 11:35:30.040468
3502 11:35:30.040919 Begin, DQ Scan Range 699~763
3503 11:35:30.043482
3504 11:35:30.043881
3505 11:35:30.044174 TX Vref Scan disable
3506 11:35:30.046478 699 |2 4 59|[0] xxxxxxxx xxxxxxxx [MSB]
3507 11:35:30.049956 700 |2 4 60|[0] xxxxxxxx xxxxxxxx [MSB]
3508 11:35:30.053201 701 |2 4 61|[0] xxxxxxxx xxxxxxxx [MSB]
3509 11:35:30.056265 702 |2 4 62|[0] xxxxxxxx xxxxxxxx [MSB]
3510 11:35:30.059941 703 |2 4 63|[0] xxxxxxxx xxxxxxxx [MSB]
3511 11:35:30.063279 704 |2 6 0|[0] xxxxxxxx xxxxxxxx [MSB]
3512 11:35:30.069814 705 |2 6 1|[0] xxxxxxxx xxxxxxxx [MSB]
3513 11:35:30.073281 706 |2 6 2|[0] xxxxxxxx xxxxxxxx [MSB]
3514 11:35:30.076511 707 |2 6 3|[0] xxxxxxxx xxxxxxxx [MSB]
3515 11:35:30.079985 708 |2 6 4|[0] xxxxxxxx xxxxxxxx [MSB]
3516 11:35:30.083228 709 |2 6 5|[0] xxxxxxxx xxxxxxxx [MSB]
3517 11:35:30.086362 710 |2 6 6|[0] xxxxxxxx xxxxxxxx [MSB]
3518 11:35:30.090082 711 |2 6 7|[0] xxxxxxxx oooooooo [MSB]
3519 11:35:30.093193 712 |2 6 8|[0] xxxxxxxx oooooooo [MSB]
3520 11:35:30.096356 713 |2 6 9|[0] xxxxxxxx oooooooo [MSB]
3521 11:35:30.099526 714 |2 6 10|[0] xxxxxxxx oooooooo [MSB]
3522 11:35:30.103020 715 |2 6 11|[0] xxxxxxxx oooooooo [MSB]
3523 11:35:30.106670 716 |2 6 12|[0] xxxxxxxx oooooooo [MSB]
3524 11:35:30.109971 717 |2 6 13|[0] xxxxxxxx oooooooo [MSB]
3525 11:35:30.113237 718 |2 6 14|[0] xxxxxxxx oooooooo [MSB]
3526 11:35:30.121351 736 |2 6 32|[0] oooooooo xxxxxxxx [MSB]
3527 11:35:30.124312 737 |2 6 33|[0] oooooooo xxxxxxxx [MSB]
3528 11:35:30.127437 738 |2 6 34|[0] oooooooo xxxxxxxx [MSB]
3529 11:35:30.131100 739 |2 6 35|[0] oooooooo xxxxxxxx [MSB]
3530 11:35:30.134231 740 |2 6 36|[0] oooooooo xxxxxxxx [MSB]
3531 11:35:30.138008 741 |2 6 37|[0] oooooooo xxxxxxxx [MSB]
3532 11:35:30.141096 742 |2 6 38|[0] oooooooo xxxxxxxx [MSB]
3533 11:35:30.144202 743 |2 6 39|[0] oooooooo xxxxxxxx [MSB]
3534 11:35:30.148038 744 |2 6 40|[0] xxxxxxxx xxxxxxxx [MSB]
3535 11:35:30.151688 Byte0, DQ PI dly=731, DQM PI dly= 731
3536 11:35:30.154494 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 27)
3537 11:35:30.154978
3538 11:35:30.160877 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 27)
3539 11:35:30.161381
3540 11:35:30.164531 Byte1, DQ PI dly=723, DQM PI dly= 723
3541 11:35:30.168084 Final DQ PI dly(LargeUI, SmallUI, PI) =(2 ,6, 19)
3542 11:35:30.168562
3543 11:35:30.171246 OEN DQ PI dly(LargeUI, SmallUI, PI) =(2 ,3, 19)
3544 11:35:30.171666
3545 11:35:30.177880 Before -1MCK, ucdq_final_ui_large_dqs0 = 2, ucdq_final_ui_large_dqs1 = 2
3546 11:35:30.184633 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3547 11:35:30.194771 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3548 11:35:30.195155 Write Rank1 MR3 =0x30
3549 11:35:30.197808 DramC Write-DBI off
3550 11:35:30.198182
3551 11:35:30.198471 [DATLAT]
3552 11:35:30.201003 Freq=1600, CH1 RK1, use_rxtx_scan=0
3553 11:35:30.201439
3554 11:35:30.204421 DATLAT Default: 0x10
3555 11:35:30.204797 7, 0xFFFF, sum=0
3556 11:35:30.207990 8, 0xFFFF, sum=0
3557 11:35:30.208539 9, 0xFFFF, sum=0
3558 11:35:30.209029 10, 0xFFFF, sum=0
3559 11:35:30.210805 11, 0xFFFF, sum=0
3560 11:35:30.211298 12, 0xFFFF, sum=0
3561 11:35:30.214215 13, 0xFFFF, sum=0
3562 11:35:30.214711 14, 0x0, sum=1
3563 11:35:30.218156 15, 0x0, sum=2
3564 11:35:30.218658 16, 0x0, sum=3
3565 11:35:30.221069 17, 0x0, sum=4
3566 11:35:30.224557 pattern=2 first_step=14 total pass=5 best_step=16
3567 11:35:30.224935 ==
3568 11:35:30.231106 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3569 11:35:30.231567 fsp= 1, odt_onoff= 1, Byte mode= 0
3570 11:35:30.235520 ==
3571 11:35:30.238150 Start DQ dly to find pass range UseTestEngine =1
3572 11:35:30.240986 x-axis: bit #, y-axis: DQ dly (-127~63)
3573 11:35:30.241422 RX Vref Scan = 0
3574 11:35:30.244432 -26, [0] xxxxxxxx xxxxxxxx [MSB]
3575 11:35:30.247801 -25, [0] xxxxxxxx xxxxxxxx [MSB]
3576 11:35:30.250991 -24, [0] xxxxxxxx xxxxxxxx [MSB]
3577 11:35:30.254701 -23, [0] xxxxxxxx xxxxxxxx [MSB]
3578 11:35:30.257631 -22, [0] xxxxxxxx xxxxxxxx [MSB]
3579 11:35:30.261110 -21, [0] xxxxxxxx xxxxxxxx [MSB]
3580 11:35:30.264638 -20, [0] xxxxxxxx xxxxxxxx [MSB]
3581 11:35:30.265177 -19, [0] xxxxxxxx xxxxxxxx [MSB]
3582 11:35:30.267709 -18, [0] xxxxxxxx xxxxxxxx [MSB]
3583 11:35:30.271174 -17, [0] xxxxxxxx xxxxxxxx [MSB]
3584 11:35:30.274219 -16, [0] xxxxxxxx xxxxxxxx [MSB]
3585 11:35:30.277586 -15, [0] xxxxxxxx xxxxxxxx [MSB]
3586 11:35:30.281200 -14, [0] xxxxxxxx xxxxxxxx [MSB]
3587 11:35:30.284425 -13, [0] xxxxxxxx xxxxxxxx [MSB]
3588 11:35:30.287648 -12, [0] xxxxxxxx xxxxxxxx [MSB]
3589 11:35:30.288040 -11, [0] xxxxxxxx xxxxxxxx [MSB]
3590 11:35:30.290848 -10, [0] xxxxxxxx xxxxxxxx [MSB]
3591 11:35:30.294442 -9, [0] xxxxxxxx xxxxxxxx [MSB]
3592 11:35:30.298366 -8, [0] xxxxxxxx xxxxxxxx [MSB]
3593 11:35:30.300856 -7, [0] xxxxxxxx xxxxxxxx [MSB]
3594 11:35:30.304395 -6, [0] xxxxxxxx xxxxxxxx [MSB]
3595 11:35:30.307665 -5, [0] xxxxxxxx xxxxxxxx [MSB]
3596 11:35:30.308169 -4, [0] xxxxxxxx xxxxxxxx [MSB]
3597 11:35:30.311045 -3, [0] xxxxxxxx xxxxxxxx [MSB]
3598 11:35:30.314355 -2, [0] xxxoxxxx xxxxxxxx [MSB]
3599 11:35:30.317436 -1, [0] xxxoxxxx xxxxxxxx [MSB]
3600 11:35:30.320849 0, [0] xxooxxxx xxxxxxxo [MSB]
3601 11:35:30.324024 1, [0] xxoooxxo xxxxxxxo [MSB]
3602 11:35:30.327620 2, [0] xxoooxxo oooxxxxo [MSB]
3603 11:35:30.328138 3, [0] xxoooxxo ooooxooo [MSB]
3604 11:35:30.330750 4, [0] xxoooxxo oooooooo [MSB]
3605 11:35:30.334041 5, [0] xoooooxo oooooooo [MSB]
3606 11:35:30.337394 6, [0] xoooooxo oooooooo [MSB]
3607 11:35:30.341890 34, [0] oooxoooo oooooooo [MSB]
3608 11:35:30.344354 35, [0] oooxoooo ooooooox [MSB]
3609 11:35:30.347967 36, [0] ooxxoooo ooooooox [MSB]
3610 11:35:30.350946 37, [0] ooxxxoox ooxooxxx [MSB]
3611 11:35:30.354377 38, [0] ooxxxoox xxxooxxx [MSB]
3612 11:35:30.357889 39, [0] ooxxxoox xxxxoxxx [MSB]
3613 11:35:30.358450 40, [0] ooxxxoox xxxxxxxx [MSB]
3614 11:35:30.361073 41, [0] ooxxxoox xxxxxxxx [MSB]
3615 11:35:30.364228 42, [0] oxxxxxox xxxxxxxx [MSB]
3616 11:35:30.367795 43, [0] xxxxxxxx xxxxxxxx [MSB]
3617 11:35:30.370861 iDelay=43, Bit 0, Center 24 (7 ~ 42) 36
3618 11:35:30.374235 iDelay=43, Bit 1, Center 23 (5 ~ 41) 37
3619 11:35:30.378551 iDelay=43, Bit 2, Center 17 (0 ~ 35) 36
3620 11:35:30.380937 iDelay=43, Bit 3, Center 15 (-2 ~ 33) 36
3621 11:35:30.384240 iDelay=43, Bit 4, Center 18 (1 ~ 36) 36
3622 11:35:30.388013 iDelay=43, Bit 5, Center 23 (5 ~ 41) 37
3623 11:35:30.390854 iDelay=43, Bit 6, Center 24 (7 ~ 42) 36
3624 11:35:30.397693 iDelay=43, Bit 7, Center 18 (1 ~ 36) 36
3625 11:35:30.400845 iDelay=43, Bit 8, Center 19 (2 ~ 37) 36
3626 11:35:30.404450 iDelay=43, Bit 9, Center 19 (2 ~ 37) 36
3627 11:35:30.407382 iDelay=43, Bit 10, Center 19 (2 ~ 36) 35
3628 11:35:30.411179 iDelay=43, Bit 11, Center 20 (3 ~ 38) 36
3629 11:35:30.414463 iDelay=43, Bit 12, Center 21 (4 ~ 39) 36
3630 11:35:30.417651 iDelay=43, Bit 13, Center 19 (3 ~ 36) 34
3631 11:35:30.421127 iDelay=43, Bit 14, Center 19 (3 ~ 36) 34
3632 11:35:30.423978 iDelay=43, Bit 15, Center 17 (0 ~ 34) 35
3633 11:35:30.424386 ==
3634 11:35:30.430882 Dram Type= 6, Freq= 1596, FreqGroup= 1600, CH_1, rank 1
3635 11:35:30.433864 fsp= 1, odt_onoff= 1, Byte mode= 0
3636 11:35:30.434245 ==
3637 11:35:30.434536 DQS Delay:
3638 11:35:30.437633 DQS0 = 0, DQS1 = 0
3639 11:35:30.438012 DQM Delay:
3640 11:35:30.440566 DQM0 = 20, DQM1 = 19
3641 11:35:30.440943 DQ Delay:
3642 11:35:30.443945 DQ0 =24, DQ1 =23, DQ2 =17, DQ3 =15
3643 11:35:30.447383 DQ4 =18, DQ5 =23, DQ6 =24, DQ7 =18
3644 11:35:30.451324 DQ8 =19, DQ9 =19, DQ10 =19, DQ11 =20
3645 11:35:30.453938 DQ12 =21, DQ13 =19, DQ14 =19, DQ15 =17
3646 11:35:30.454317
3647 11:35:30.454626
3648 11:35:30.454901
3649 11:35:30.457539 [DramC_TX_OE_Calibration] TA2
3650 11:35:30.460905 Original DQ_B0 (3 6) =30, OEN = 27
3651 11:35:30.461471 Original DQ_B1 (3 6) =30, OEN = 27
3652 11:35:30.463928 23, 0x0, End_B0=23 End_B1=23
3653 11:35:30.467778 24, 0x0, End_B0=24 End_B1=24
3654 11:35:30.471506 25, 0x0, End_B0=25 End_B1=25
3655 11:35:30.474195 26, 0x0, End_B0=26 End_B1=26
3656 11:35:30.474626 27, 0x0, End_B0=27 End_B1=27
3657 11:35:30.477653 28, 0x0, End_B0=28 End_B1=28
3658 11:35:30.480732 29, 0x0, End_B0=29 End_B1=29
3659 11:35:30.484395 30, 0x0, End_B0=30 End_B1=30
3660 11:35:30.484969 31, 0xFFFF, End_B0=30 End_B1=30
3661 11:35:30.491613 Byte0 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3662 11:35:30.497796 Byte1 end_step=30 best_step=27 Final TX OE(2T, 0.5T) = (3, 3)
3663 11:35:30.498175
3664 11:35:30.498466
3665 11:35:30.500992 Write Rank1 MR23 =0x3f
3666 11:35:30.501412 [DQSOSC]
3667 11:35:30.507493 [DQSOSCAuto] RK1, (LSB)MR18= 0xad, (MSB)MR19= 0x3, tDQSOscB0 = 334 ps tDQSOscB1 = 0 ps
3668 11:35:30.514602 CH1_RK1: MR19=0x3, MR18=0xAD, DQSOSC=334, MR23=63, INC=22, DEC=33
3669 11:35:30.514982 Write Rank1 MR23 =0x3f
3670 11:35:30.517634 [DQSOSC]
3671 11:35:30.524174 [DQSOSCAuto] RK1, (LSB)MR18= 0xb1, (MSB)MR19= 0x3, tDQSOscB0 = 333 ps tDQSOscB1 = 0 ps
3672 11:35:30.527877 CH1 RK1: MR19=3, MR18=B1
3673 11:35:30.531369 [RxdqsGatingPostProcess] freq 1600
3674 11:35:30.534666 ChangeDQSINCTL -1, reg_TX_dly_DQSgated_min 2, u1TXDLY_Cal_min 3
3675 11:35:30.535107 Rank: 0
3676 11:35:30.537597 best DQS0 dly(2T, 0.5T) = (2, 5)
3677 11:35:30.541184 best DQS1 dly(2T, 0.5T) = (2, 5)
3678 11:35:30.544026 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3679 11:35:30.547417 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3680 11:35:30.547794 Rank: 1
3681 11:35:30.550658 best DQS0 dly(2T, 0.5T) = (2, 5)
3682 11:35:30.554198 best DQS1 dly(2T, 0.5T) = (2, 5)
3683 11:35:30.557683 best DQS0 P1 dly(2T, 0.5T) = (3, 1)
3684 11:35:30.561422 best DQS1 P1 dly(2T, 0.5T) = (3, 1)
3685 11:35:30.567488 TX_dly_DQSgated check: min 2 max 3, ChangeDQSINCTL=-1
3686 11:35:30.567871 DQSINCTL=5, RANKINCTL=3, u4XRTR2R=9
3687 11:35:30.574137 [DualRankRxdatlatCal] RK0: 16, RK1: 16, Final_Datlat 16
3688 11:35:30.574517
3689 11:35:30.574810
3690 11:35:30.577535 [Calibration Summary] Freqency 1600
3691 11:35:30.577919 CH 0, Rank 0
3692 11:35:30.581098 All Pass.
3693 11:35:30.581599
3694 11:35:30.582010 CH 0, Rank 1
3695 11:35:30.582340 All Pass.
3696 11:35:30.582606
3697 11:35:30.584024 CH 1, Rank 0
3698 11:35:30.584401 All Pass.
3699 11:35:30.584691
3700 11:35:30.585010 CH 1, Rank 1
3701 11:35:30.587352 All Pass.
3702 11:35:30.587728
3703 11:35:30.594592 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3704 11:35:30.600976 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3705 11:35:30.608369 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3706 11:35:30.611211 Write Rank0 MR3 =0xb0
3707 11:35:30.614756 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3708 11:35:30.624607 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3709 11:35:30.631240 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3710 11:35:30.631638 Write Rank1 MR3 =0xb0
3711 11:35:30.637657 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3712 11:35:30.644040 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3713 11:35:30.651491 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3714 11:35:30.654211 Write Rank0 MR3 =0xb0
3715 11:35:30.661390 Before -1MCK, ucdq_final_ui_large_dqs0 = 3, ucdq_final_ui_large_dqs1 = 3
3716 11:35:30.668067 Before -1MCK, ucdq_final_dqm_ui_large_dqs0 = 3, ucdq_final_dqm_ui_large_dqs1 = 3
3717 11:35:30.674641 After -1MCK, ucdq_final_dqm_ui_large_dqs0 = 2, ucdq_final_dqm_ui_large_dqs1 = 2
3718 11:35:30.677413 Write Rank1 MR3 =0xb0
3719 11:35:30.677792 DramC Write-DBI on
3720 11:35:30.680790 [GetDramInforAfterCalByMRR] Vendor 1.
3721 11:35:30.684351 [GetDramInforAfterCalByMRR] Revision 7.
3722 11:35:30.687951 MR8 12
3723 11:35:30.691159 CH0, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3724 11:35:30.691544 MR8 12
3725 11:35:30.697381 CH0, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3726 11:35:30.697765 MR8 12
3727 11:35:30.700867 CH1, RK0, DieNum 1, Density 80000000, RKsize 80000000.
3728 11:35:30.704063 MR8 12
3729 11:35:30.707517 CH1, RK1, DieNum 1, Density 80000000, RKsize 80000000.
3730 11:35:30.717814 [ACTimingOptimize]Density (MR8 OP[5:2]) 4, TRFC 100, TRFC_05T 0, TXREFCNT 119, TRFCpb 44, TRFCpb_05T 0
3731 11:35:30.718200 Write Rank0 MR13 =0xd0
3732 11:35:30.720749 Write Rank1 MR13 =0xd0
3733 11:35:30.724314 Write Rank0 MR13 =0xd0
3734 11:35:30.724694 Write Rank1 MR13 =0xd0
3735 11:35:30.727463 Save calibration result to emmc
3736 11:35:30.727859
3737 11:35:30.728151
3738 11:35:30.730845 [DramcModeReg_Check] Freq_1600, FSP_1
3739 11:35:30.734023 FSP_1, CH_0, RK0
3740 11:35:30.734405 Write Rank0 MR13 =0xd8
3741 11:35:30.737466 MR12 = 0x56 (global = 0x56) match
3742 11:35:30.741085 MR14 = 0x18 (global = 0x18) match
3743 11:35:30.744116 FSP_1, CH_0, RK1
3744 11:35:30.744493 Write Rank1 MR13 =0xd8
3745 11:35:30.747987 MR12 = 0x56 (global = 0x56) match
3746 11:35:30.751258 MR14 = 0x16 (global = 0x16) match
3747 11:35:30.754297 FSP_1, CH_1, RK0
3748 11:35:30.754676 Write Rank0 MR13 =0xd8
3749 11:35:30.757607 MR12 = 0x56 (global = 0x56) match
3750 11:35:30.760909 MR14 = 0x18 (global = 0x18) match
3751 11:35:30.764361 FSP_1, CH_1, RK1
3752 11:35:30.764738 Write Rank1 MR13 =0xd8
3753 11:35:30.767300 MR12 = 0x58 (global = 0x58) match
3754 11:35:30.770606 MR14 = 0x16 (global = 0x16) match
3755 11:35:30.770986
3756 11:35:30.777241 [MEM_TEST] 02: After DFS, before run time config
3757 11:35:30.783872 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3758 11:35:30.784254
3759 11:35:30.787781 [TA2_TEST]
3760 11:35:30.788157 === TA2 HW
3761 11:35:30.788454 TA2 PAT: XTALK
3762 11:35:30.794170 HW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0
3763 11:35:30.797241 HW channel(0) Rank(1), TA2 pass, pass_cnt:2, err_cnt:0
3764 11:35:30.804271 HW channel(1) Rank(0), TA2 pass, pass_cnt:3, err_cnt:0
3765 11:35:30.807092 HW channel(1) Rank(1), TA2 pass, pass_cnt:4, err_cnt:0
3766 11:35:30.807596
3767 11:35:30.808046
3768 11:35:30.810187 Settings after calibration
3769 11:35:30.810669
3770 11:35:30.814061 [DramcRunTimeConfig]
3771 11:35:30.817101 TransferPLLToSPMControl - MODE SW PHYPLL
3772 11:35:30.817626 TX_TRACKING: ON
3773 11:35:30.820340 RX_TRACKING: ON
3774 11:35:30.820743 HW_GATING: ON
3775 11:35:30.823788 HW_GATING DBG: OFF
3776 11:35:30.824165 ddr_geometry:1
3777 11:35:30.824458 ddr_geometry:1
3778 11:35:30.827067 ddr_geometry:1
3779 11:35:30.827446 ddr_geometry:1
3780 11:35:30.830830 ddr_geometry:1
3781 11:35:30.831210 ddr_geometry:1
3782 11:35:30.831504 ddr_geometry:1
3783 11:35:30.834083 ddr_geometry:1
3784 11:35:30.837202 High Freq DUMMY_READ_FOR_TRACKING: ON
3785 11:35:30.837586 ZQCS_ENABLE_LP4: OFF
3786 11:35:30.840840 LOWPOWER_GOLDEN_SETTINGS(DCM): ON
3787 11:35:30.844321 DUMMY_READ_FOR_DQS_GATING_RETRY: OFF
3788 11:35:30.847435 SPM_CONTROL_AFTERK: ON
3789 11:35:30.850791 IMPEDANCE_TRACKING: ON
3790 11:35:30.851172 TEMP_SENSOR: ON
3791 11:35:30.853988 PER_BANK_REFRESH: ON
3792 11:35:30.854539 HW_SAVE_FOR_SR: ON
3793 11:35:30.857224 SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON
3794 11:35:30.860377 CLK_FREE_FUN_FOR_DRAMC_PSEL: ON
3795 11:35:30.863998 PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON
3796 11:35:30.867237 Read ODT Tracking: ON
3797 11:35:30.867760 =========================
3798 11:35:30.868213
3799 11:35:30.870899 [TA2_TEST]
3800 11:35:30.871381 === TA2 HW
3801 11:35:30.877224 HW channel(0) Rank(0), TA2 pass, pass_cnt:5, err_cnt:0
3802 11:35:30.880445 HW channel(0) Rank(1), TA2 pass, pass_cnt:6, err_cnt:0
3803 11:35:30.884343 HW channel(1) Rank(0), TA2 pass, pass_cnt:7, err_cnt:0
3804 11:35:30.890566 HW channel(1) Rank(1), TA2 pass, pass_cnt:8, err_cnt:0
3805 11:35:30.890968
3806 11:35:30.893898 [MEM_TEST] 03: After run time config
3807 11:35:30.904986 [MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count =16384, Fail count =0)
3808 11:35:30.907962 [complex_mem_test] start addr:0x40024000, len:131072
3809 11:35:31.112258 1st complex R/W mem test pass
3810 11:35:31.118657 save_calibration_params with freq_sel:1, frequency:1600, _MappingFreqArray:0
3811 11:35:31.121942 sync preloader write leveling
3812 11:35:31.125309 sync preloader cbt_mr12
3813 11:35:31.128572 sync preloader cbt_clk_dly
3814 11:35:31.128950 sync preloader cbt_cmd_dly
3815 11:35:31.131808 sync preloader cbt_cs
3816 11:35:31.135022 sync preloader cbt_ca_perbit_delay
3817 11:35:31.135399 sync preloader clk_delay
3818 11:35:31.138426 sync preloader dqs_delay
3819 11:35:31.141785 sync preloader u1Gating2T_Save
3820 11:35:31.145516 sync preloader u1Gating05T_Save
3821 11:35:31.148381 sync preloader u1Gatingfine_tune_Save
3822 11:35:31.151923 sync preloader u1Gatingucpass_count_Save
3823 11:35:31.155401 sync preloader u1TxWindowPerbitVref_Save
3824 11:35:31.159269 sync preloader u1TxCenter_min_Save
3825 11:35:31.161994 sync preloader u1TxCenter_max_Save
3826 11:35:31.165272 sync preloader u1Txwin_center_Save
3827 11:35:31.168494 sync preloader u1Txfirst_pass_Save
3828 11:35:31.171895 sync preloader u1Txlast_pass_Save
3829 11:35:31.172284 sync preloader u1RxDatlat_Save
3830 11:35:31.175647 sync preloader u1RxWinPerbitVref_Save
3831 11:35:31.181786 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3832 11:35:31.184918 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3833 11:35:31.188310 sync preloader delay_cell_unit
3834 11:35:31.195070 save_calibration_params with freq_sel:3, frequency:1200, _MappingFreqArray:1
3835 11:35:31.198311 sync preloader write leveling
3836 11:35:31.198688 sync preloader cbt_mr12
3837 11:35:31.201976 sync preloader cbt_clk_dly
3838 11:35:31.205222 sync preloader cbt_cmd_dly
3839 11:35:31.205602 sync preloader cbt_cs
3840 11:35:31.208735 sync preloader cbt_ca_perbit_delay
3841 11:35:31.212214 sync preloader clk_delay
3842 11:35:31.215532 sync preloader dqs_delay
3843 11:35:31.215912 sync preloader u1Gating2T_Save
3844 11:35:31.218768 sync preloader u1Gating05T_Save
3845 11:35:31.221926 sync preloader u1Gatingfine_tune_Save
3846 11:35:31.225322 sync preloader u1Gatingucpass_count_Save
3847 11:35:31.228778 sync preloader u1TxWindowPerbitVref_Save
3848 11:35:31.232052 sync preloader u1TxCenter_min_Save
3849 11:35:31.235695 sync preloader u1TxCenter_max_Save
3850 11:35:31.238816 sync preloader u1Txwin_center_Save
3851 11:35:31.241681 sync preloader u1Txfirst_pass_Save
3852 11:35:31.245234 sync preloader u1Txlast_pass_Save
3853 11:35:31.248147 sync preloader u1RxDatlat_Save
3854 11:35:31.252165 sync preloader u1RxWinPerbitVref_Save
3855 11:35:31.254889 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3856 11:35:31.258724 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3857 11:35:31.261842 sync preloader delay_cell_unit
3858 11:35:31.268530 save_calibration_params with freq_sel:5, frequency:800, _MappingFreqArray:2
3859 11:35:31.271640 sync preloader write leveling
3860 11:35:31.275273 sync preloader cbt_mr12
3861 11:35:31.275758 sync preloader cbt_clk_dly
3862 11:35:31.278595 sync preloader cbt_cmd_dly
3863 11:35:31.281807 sync preloader cbt_cs
3864 11:35:31.284828 sync preloader cbt_ca_perbit_delay
3865 11:35:31.285252 sync preloader clk_delay
3866 11:35:31.288468 sync preloader dqs_delay
3867 11:35:31.291690 sync preloader u1Gating2T_Save
3868 11:35:31.295115 sync preloader u1Gating05T_Save
3869 11:35:31.298342 sync preloader u1Gatingfine_tune_Save
3870 11:35:31.301830 sync preloader u1Gatingucpass_count_Save
3871 11:35:31.305237 sync preloader u1TxWindowPerbitVref_Save
3872 11:35:31.308684 sync preloader u1TxCenter_min_Save
3873 11:35:31.311733 sync preloader u1TxCenter_max_Save
3874 11:35:31.315042 sync preloader u1Txwin_center_Save
3875 11:35:31.318354 sync preloader u1Txfirst_pass_Save
3876 11:35:31.321533 sync preloader u1Txlast_pass_Save
3877 11:35:31.322038 sync preloader u1RxDatlat_Save
3878 11:35:31.325547 sync preloader u1RxWinPerbitVref_Save
3879 11:35:31.331715 sync preloader u1RxWinPerbitDQ_firsbypass_Save
3880 11:35:31.335264 sync preloader u1RxWinPerbitDQ_lastbypass_Save
3881 11:35:31.338468 sync preloader delay_cell_unit
3882 11:35:31.341825 just_for_test_dump_coreboot_params dump all params
3883 11:35:31.344886 dump source = 0x0
3884 11:35:31.345403 dump params frequency:1600
3885 11:35:31.348203 dump params rank number:2
3886 11:35:31.348681
3887 11:35:31.351742 dump params write leveling
3888 11:35:31.354929 write leveling[0][0][0] = 0x21
3889 11:35:31.355416 write leveling[0][0][1] = 0x1d
3890 11:35:31.358949 write leveling[0][1][0] = 0x22
3891 11:35:31.361990 write leveling[0][1][1] = 0x1e
3892 11:35:31.364717 write leveling[1][0][0] = 0x24
3893 11:35:31.368705 write leveling[1][0][1] = 0x20
3894 11:35:31.371542 write leveling[1][1][0] = 0x23
3895 11:35:31.372019 write leveling[1][1][1] = 0x20
3896 11:35:31.375264 dump params cbt_cs
3897 11:35:31.375743 cbt_cs[0][0] = 0xa
3898 11:35:31.378312 cbt_cs[0][1] = 0xa
3899 11:35:31.378776 cbt_cs[1][0] = 0xa
3900 11:35:31.381455 cbt_cs[1][1] = 0xa
3901 11:35:31.385116 dump params cbt_mr12
3902 11:35:31.385623 cbt_mr12[0][0] = 0x16
3903 11:35:31.388355 cbt_mr12[0][1] = 0x16
3904 11:35:31.388820 cbt_mr12[1][0] = 0x16
3905 11:35:31.391710 cbt_mr12[1][1] = 0x18
3906 11:35:31.392174 dump params tx window
3907 11:35:31.395169 tx_center_min[0][0][0] = 980
3908 11:35:31.398137 tx_center_max[0][0][0] = 988
3909 11:35:31.401988 tx_center_min[0][0][1] = 975
3910 11:35:31.404666 tx_center_max[0][0][1] = 980
3911 11:35:31.405168 tx_center_min[0][1][0] = 983
3912 11:35:31.408265 tx_center_max[0][1][0] = 990
3913 11:35:31.411369 tx_center_min[0][1][1] = 978
3914 11:35:31.414698 tx_center_max[0][1][1] = 983
3915 11:35:31.418322 tx_center_min[1][0][0] = 983
3916 11:35:31.418706 tx_center_max[1][0][0] = 989
3917 11:35:31.421705 tx_center_min[1][0][1] = 977
3918 11:35:31.425181 tx_center_max[1][0][1] = 981
3919 11:35:31.428301 tx_center_min[1][1][0] = 982
3920 11:35:31.431601 tx_center_max[1][1][0] = 989
3921 11:35:31.431985 tx_center_min[1][1][1] = 977
3922 11:35:31.434956 tx_center_max[1][1][1] = 981
3923 11:35:31.438384 dump params tx window
3924 11:35:31.438765 tx_win_center[0][0][0] = 988
3925 11:35:31.442063 tx_first_pass[0][0][0] = 976
3926 11:35:31.445045 tx_last_pass[0][0][0] = 1000
3927 11:35:31.448361 tx_win_center[0][0][1] = 986
3928 11:35:31.451747 tx_first_pass[0][0][1] = 975
3929 11:35:31.452196 tx_last_pass[0][0][1] = 998
3930 11:35:31.454959 tx_win_center[0][0][2] = 986
3931 11:35:31.458746 tx_first_pass[0][0][2] = 975
3932 11:35:31.461760 tx_last_pass[0][0][2] = 998
3933 11:35:31.462276 tx_win_center[0][0][3] = 980
3934 11:35:31.464791 tx_first_pass[0][0][3] = 968
3935 11:35:31.468507 tx_last_pass[0][0][3] = 992
3936 11:35:31.472042 tx_win_center[0][0][4] = 986
3937 11:35:31.475103 tx_first_pass[0][0][4] = 974
3938 11:35:31.475600 tx_last_pass[0][0][4] = 999
3939 11:35:31.478510 tx_win_center[0][0][5] = 981
3940 11:35:31.481843 tx_first_pass[0][0][5] = 969
3941 11:35:31.485066 tx_last_pass[0][0][5] = 993
3942 11:35:31.485590 tx_win_center[0][0][6] = 981
3943 11:35:31.488711 tx_first_pass[0][0][6] = 969
3944 11:35:31.492155 tx_last_pass[0][0][6] = 994
3945 11:35:31.495585 tx_win_center[0][0][7] = 984
3946 11:35:31.498503 tx_first_pass[0][0][7] = 973
3947 11:35:31.498582 tx_last_pass[0][0][7] = 996
3948 11:35:31.501547 tx_win_center[0][0][8] = 975
3949 11:35:31.504750 tx_first_pass[0][0][8] = 963
3950 11:35:31.508063 tx_last_pass[0][0][8] = 988
3951 11:35:31.508209 tx_win_center[0][0][9] = 976
3952 11:35:31.511770 tx_first_pass[0][0][9] = 963
3953 11:35:31.515013 tx_last_pass[0][0][9] = 989
3954 11:35:31.517901 tx_win_center[0][0][10] = 980
3955 11:35:31.521354 tx_first_pass[0][0][10] = 968
3956 11:35:31.521453 tx_last_pass[0][0][10] = 992
3957 11:35:31.524574 tx_win_center[0][0][11] = 975
3958 11:35:31.527801 tx_first_pass[0][0][11] = 962
3959 11:35:31.531547 tx_last_pass[0][0][11] = 988
3960 11:35:31.534881 tx_win_center[0][0][12] = 976
3961 11:35:31.534977 tx_first_pass[0][0][12] = 964
3962 11:35:31.537860 tx_last_pass[0][0][12] = 989
3963 11:35:31.541355 tx_win_center[0][0][13] = 975
3964 11:35:31.544948 tx_first_pass[0][0][13] = 963
3965 11:35:31.547785 tx_last_pass[0][0][13] = 988
3966 11:35:31.547914 tx_win_center[0][0][14] = 977
3967 11:35:31.551049 tx_first_pass[0][0][14] = 965
3968 11:35:31.554316 tx_last_pass[0][0][14] = 989
3969 11:35:31.557709 tx_win_center[0][0][15] = 979
3970 11:35:31.561178 tx_first_pass[0][0][15] = 967
3971 11:35:31.561347 tx_last_pass[0][0][15] = 991
3972 11:35:31.564470 tx_win_center[0][1][0] = 990
3973 11:35:31.567555 tx_first_pass[0][1][0] = 978
3974 11:35:31.571125 tx_last_pass[0][1][0] = 1002
3975 11:35:31.574548 tx_win_center[0][1][1] = 988
3976 11:35:31.574714 tx_first_pass[0][1][1] = 977
3977 11:35:31.577663 tx_last_pass[0][1][1] = 1000
3978 11:35:31.581702 tx_win_center[0][1][2] = 988
3979 11:35:31.584163 tx_first_pass[0][1][2] = 977
3980 11:35:31.587703 tx_last_pass[0][1][2] = 1000
3981 11:35:31.587824 tx_win_center[0][1][3] = 983
3982 11:35:31.590743 tx_first_pass[0][1][3] = 970
3983 11:35:31.594274 tx_last_pass[0][1][3] = 996
3984 11:35:31.597630 tx_win_center[0][1][4] = 988
3985 11:35:31.597725 tx_first_pass[0][1][4] = 976
3986 11:35:31.600704 tx_last_pass[0][1][4] = 1001
3987 11:35:31.604341 tx_win_center[0][1][5] = 983
3988 11:35:31.607465 tx_first_pass[0][1][5] = 972
3989 11:35:31.611162 tx_last_pass[0][1][5] = 995
3990 11:35:31.611254 tx_win_center[0][1][6] = 985
3991 11:35:31.614340 tx_first_pass[0][1][6] = 972
3992 11:35:31.617830 tx_last_pass[0][1][6] = 998
3993 11:35:31.621073 tx_win_center[0][1][7] = 987
3994 11:35:31.621184 tx_first_pass[0][1][7] = 976
3995 11:35:31.624340 tx_last_pass[0][1][7] = 999
3996 11:35:31.627154 tx_win_center[0][1][8] = 979
3997 11:35:31.630677 tx_first_pass[0][1][8] = 967
3998 11:35:31.634588 tx_last_pass[0][1][8] = 991
3999 11:35:31.634672 tx_win_center[0][1][9] = 979
4000 11:35:31.637163 tx_first_pass[0][1][9] = 968
4001 11:35:31.640951 tx_last_pass[0][1][9] = 991
4002 11:35:31.644397 tx_win_center[0][1][10] = 983
4003 11:35:31.647146 tx_first_pass[0][1][10] = 971
4004 11:35:31.647223 tx_last_pass[0][1][10] = 995
4005 11:35:31.650525 tx_win_center[0][1][11] = 978
4006 11:35:31.653997 tx_first_pass[0][1][11] = 966
4007 11:35:31.657451 tx_last_pass[0][1][11] = 991
4008 11:35:31.660668 tx_win_center[0][1][12] = 979
4009 11:35:31.660747 tx_first_pass[0][1][12] = 967
4010 11:35:31.664298 tx_last_pass[0][1][12] = 991
4011 11:35:31.667112 tx_win_center[0][1][13] = 978
4012 11:35:31.670477 tx_first_pass[0][1][13] = 966
4013 11:35:31.673934 tx_last_pass[0][1][13] = 990
4014 11:35:31.674017 tx_win_center[0][1][14] = 979
4015 11:35:31.677355 tx_first_pass[0][1][14] = 967
4016 11:35:31.680801 tx_last_pass[0][1][14] = 991
4017 11:35:31.684303 tx_win_center[0][1][15] = 980
4018 11:35:31.687382 tx_first_pass[0][1][15] = 969
4019 11:35:31.687462 tx_last_pass[0][1][15] = 992
4020 11:35:31.690384 tx_win_center[1][0][0] = 989
4021 11:35:31.693702 tx_first_pass[1][0][0] = 977
4022 11:35:31.696970 tx_last_pass[1][0][0] = 1002
4023 11:35:31.700506 tx_win_center[1][0][1] = 988
4024 11:35:31.700589 tx_first_pass[1][0][1] = 976
4025 11:35:31.703846 tx_last_pass[1][0][1] = 1000
4026 11:35:31.707647 tx_win_center[1][0][2] = 985
4027 11:35:31.710300 tx_first_pass[1][0][2] = 973
4028 11:35:31.710375 tx_last_pass[1][0][2] = 997
4029 11:35:31.714026 tx_win_center[1][0][3] = 983
4030 11:35:31.717235 tx_first_pass[1][0][3] = 971
4031 11:35:31.720651 tx_last_pass[1][0][3] = 995
4032 11:35:31.724055 tx_win_center[1][0][4] = 986
4033 11:35:31.724130 tx_first_pass[1][0][4] = 975
4034 11:35:31.727120 tx_last_pass[1][0][4] = 998
4035 11:35:31.730617 tx_win_center[1][0][5] = 988
4036 11:35:31.733588 tx_first_pass[1][0][5] = 976
4037 11:35:31.733663 tx_last_pass[1][0][5] = 1001
4038 11:35:31.737328 tx_win_center[1][0][6] = 989
4039 11:35:31.740355 tx_first_pass[1][0][6] = 977
4040 11:35:31.743557 tx_last_pass[1][0][6] = 1002
4041 11:35:31.747102 tx_win_center[1][0][7] = 986
4042 11:35:31.747194 tx_first_pass[1][0][7] = 975
4043 11:35:31.750580 tx_last_pass[1][0][7] = 998
4044 11:35:31.754296 tx_win_center[1][0][8] = 980
4045 11:35:31.757162 tx_first_pass[1][0][8] = 968
4046 11:35:31.757280 tx_last_pass[1][0][8] = 992
4047 11:35:31.760201 tx_win_center[1][0][9] = 980
4048 11:35:31.763855 tx_first_pass[1][0][9] = 968
4049 11:35:31.767456 tx_last_pass[1][0][9] = 992
4050 11:35:31.770362 tx_win_center[1][0][10] = 980
4051 11:35:31.770500 tx_first_pass[1][0][10] = 968
4052 11:35:31.774050 tx_last_pass[1][0][10] = 992
4053 11:35:31.777335 tx_win_center[1][0][11] = 981
4054 11:35:31.780251 tx_first_pass[1][0][11] = 970
4055 11:35:31.784139 tx_last_pass[1][0][11] = 993
4056 11:35:31.784357 tx_win_center[1][0][12] = 981
4057 11:35:31.787045 tx_first_pass[1][0][12] = 969
4058 11:35:31.790850 tx_last_pass[1][0][12] = 993
4059 11:35:31.794564 tx_win_center[1][0][13] = 981
4060 11:35:31.797200 tx_first_pass[1][0][13] = 970
4061 11:35:31.797584 tx_last_pass[1][0][13] = 992
4062 11:35:31.800925 tx_win_center[1][0][14] = 980
4063 11:35:31.804575 tx_first_pass[1][0][14] = 969
4064 11:35:31.807774 tx_last_pass[1][0][14] = 992
4065 11:35:31.810668 tx_win_center[1][0][15] = 977
4066 11:35:31.811051 tx_first_pass[1][0][15] = 966
4067 11:35:31.814692 tx_last_pass[1][0][15] = 989
4068 11:35:31.817258 tx_win_center[1][1][0] = 989
4069 11:35:31.820987 tx_first_pass[1][1][0] = 977
4070 11:35:31.824279 tx_last_pass[1][1][0] = 1001
4071 11:35:31.824812 tx_win_center[1][1][1] = 988
4072 11:35:31.827691 tx_first_pass[1][1][1] = 977
4073 11:35:31.830472 tx_last_pass[1][1][1] = 1000
4074 11:35:31.833986 tx_win_center[1][1][2] = 984
4075 11:35:31.837478 tx_first_pass[1][1][2] = 972
4076 11:35:31.837860 tx_last_pass[1][1][2] = 996
4077 11:35:31.840814 tx_win_center[1][1][3] = 982
4078 11:35:31.844297 tx_first_pass[1][1][3] = 970
4079 11:35:31.847395 tx_last_pass[1][1][3] = 995
4080 11:35:31.847772 tx_win_center[1][1][4] = 986
4081 11:35:31.850477 tx_first_pass[1][1][4] = 974
4082 11:35:31.854001 tx_last_pass[1][1][4] = 998
4083 11:35:31.857913 tx_win_center[1][1][5] = 988
4084 11:35:31.860841 tx_first_pass[1][1][5] = 976
4085 11:35:31.861259 tx_last_pass[1][1][5] = 1000
4086 11:35:31.863975 tx_win_center[1][1][6] = 988
4087 11:35:31.867191 tx_first_pass[1][1][6] = 976
4088 11:35:31.870522 tx_last_pass[1][1][6] = 1001
4089 11:35:31.870904 tx_win_center[1][1][7] = 986
4090 11:35:31.873827 tx_first_pass[1][1][7] = 975
4091 11:35:31.877218 tx_last_pass[1][1][7] = 998
4092 11:35:31.880293 tx_win_center[1][1][8] = 980
4093 11:35:31.884224 tx_first_pass[1][1][8] = 969
4094 11:35:31.884604 tx_last_pass[1][1][8] = 991
4095 11:35:31.887162 tx_win_center[1][1][9] = 979
4096 11:35:31.890769 tx_first_pass[1][1][9] = 968
4097 11:35:31.893970 tx_last_pass[1][1][9] = 991
4098 11:35:31.894374 tx_win_center[1][1][10] = 980
4099 11:35:31.896819 tx_first_pass[1][1][10] = 969
4100 11:35:31.900222 tx_last_pass[1][1][10] = 991
4101 11:35:31.903933 tx_win_center[1][1][11] = 981
4102 11:35:31.907017 tx_first_pass[1][1][11] = 970
4103 11:35:31.907399 tx_last_pass[1][1][11] = 993
4104 11:35:31.911065 tx_win_center[1][1][12] = 980
4105 11:35:31.914045 tx_first_pass[1][1][12] = 969
4106 11:35:31.917062 tx_last_pass[1][1][12] = 992
4107 11:35:31.920260 tx_win_center[1][1][13] = 981
4108 11:35:31.923767 tx_first_pass[1][1][13] = 970
4109 11:35:31.924147 tx_last_pass[1][1][13] = 992
4110 11:35:31.927185 tx_win_center[1][1][14] = 980
4111 11:35:31.930389 tx_first_pass[1][1][14] = 969
4112 11:35:31.933776 tx_last_pass[1][1][14] = 992
4113 11:35:31.937415 tx_win_center[1][1][15] = 977
4114 11:35:31.937795 tx_first_pass[1][1][15] = 966
4115 11:35:31.940439 tx_last_pass[1][1][15] = 989
4116 11:35:31.943704 dump params rx window
4117 11:35:31.944083 rx_firspass[0][0][0] = 9
4118 11:35:31.947153 rx_lastpass[0][0][0] = 42
4119 11:35:31.950413 rx_firspass[0][0][1] = 8
4120 11:35:31.954383 rx_lastpass[0][0][1] = 40
4121 11:35:31.954853 rx_firspass[0][0][2] = 9
4122 11:35:31.957121 rx_lastpass[0][0][2] = 39
4123 11:35:31.961082 rx_firspass[0][0][3] = -1
4124 11:35:31.961503 rx_lastpass[0][0][3] = 31
4125 11:35:31.963465 rx_firspass[0][0][4] = 7
4126 11:35:31.966724 rx_lastpass[0][0][4] = 39
4127 11:35:31.967106 rx_firspass[0][0][5] = 3
4128 11:35:31.970687 rx_lastpass[0][0][5] = 29
4129 11:35:31.973733 rx_firspass[0][0][6] = 2
4130 11:35:31.977168 rx_lastpass[0][0][6] = 32
4131 11:35:31.977555 rx_firspass[0][0][7] = 4
4132 11:35:31.980256 rx_lastpass[0][0][7] = 34
4133 11:35:31.983763 rx_firspass[0][0][8] = 2
4134 11:35:31.984142 rx_lastpass[0][0][8] = 34
4135 11:35:31.987407 rx_firspass[0][0][9] = 5
4136 11:35:31.990170 rx_lastpass[0][0][9] = 35
4137 11:35:31.990548 rx_firspass[0][0][10] = 9
4138 11:35:31.994341 rx_lastpass[0][0][10] = 38
4139 11:35:31.996642 rx_firspass[0][0][11] = 2
4140 11:35:32.000104 rx_lastpass[0][0][11] = 31
4141 11:35:32.000484 rx_firspass[0][0][12] = 5
4142 11:35:32.003622 rx_lastpass[0][0][12] = 34
4143 11:35:32.006867 rx_firspass[0][0][13] = 1
4144 11:35:32.010147 rx_lastpass[0][0][13] = 31
4145 11:35:32.010530 rx_firspass[0][0][14] = 3
4146 11:35:32.013655 rx_lastpass[0][0][14] = 33
4147 11:35:32.016850 rx_firspass[0][0][15] = 4
4148 11:35:32.017270 rx_lastpass[0][0][15] = 35
4149 11:35:32.020324 rx_firspass[0][1][0] = 9
4150 11:35:32.023236 rx_lastpass[0][1][0] = 43
4151 11:35:32.026657 rx_firspass[0][1][1] = 7
4152 11:35:32.027039 rx_lastpass[0][1][1] = 42
4153 11:35:32.029861 rx_firspass[0][1][2] = 7
4154 11:35:32.033266 rx_lastpass[0][1][2] = 42
4155 11:35:32.033660 rx_firspass[0][1][3] = -2
4156 11:35:32.036958 rx_lastpass[0][1][3] = 33
4157 11:35:32.040052 rx_firspass[0][1][4] = 5
4158 11:35:32.043149 rx_lastpass[0][1][4] = 40
4159 11:35:32.043530 rx_firspass[0][1][5] = 1
4160 11:35:32.046917 rx_lastpass[0][1][5] = 34
4161 11:35:32.050186 rx_firspass[0][1][6] = 2
4162 11:35:32.050562 rx_lastpass[0][1][6] = 35
4163 11:35:32.053664 rx_firspass[0][1][7] = 2
4164 11:35:32.057011 rx_lastpass[0][1][7] = 36
4165 11:35:32.057418 rx_firspass[0][1][8] = 0
4166 11:35:32.060260 rx_lastpass[0][1][8] = 36
4167 11:35:32.063814 rx_firspass[0][1][9] = 1
4168 11:35:32.064194 rx_lastpass[0][1][9] = 38
4169 11:35:32.066826 rx_firspass[0][1][10] = 6
4170 11:35:32.070364 rx_lastpass[0][1][10] = 41
4171 11:35:32.073238 rx_firspass[0][1][11] = 1
4172 11:35:32.073617 rx_lastpass[0][1][11] = 33
4173 11:35:32.077272 rx_firspass[0][1][12] = 1
4174 11:35:32.080383 rx_lastpass[0][1][12] = 36
4175 11:35:32.080761 rx_firspass[0][1][13] = -1
4176 11:35:32.083546 rx_lastpass[0][1][13] = 34
4177 11:35:32.086974 rx_firspass[0][1][14] = 1
4178 11:35:32.090017 rx_lastpass[0][1][14] = 36
4179 11:35:32.090396 rx_firspass[0][1][15] = 3
4180 11:35:32.093091 rx_lastpass[0][1][15] = 38
4181 11:35:32.096991 rx_firspass[1][0][0] = 7
4182 11:35:32.099751 rx_lastpass[1][0][0] = 42
4183 11:35:32.100141 rx_firspass[1][0][1] = 5
4184 11:35:32.103867 rx_lastpass[1][0][1] = 40
4185 11:35:32.106597 rx_firspass[1][0][2] = -1
4186 11:35:32.106974 rx_lastpass[1][0][2] = 33
4187 11:35:32.109688 rx_firspass[1][0][3] = -1
4188 11:35:32.113309 rx_lastpass[1][0][3] = 32
4189 11:35:32.116621 rx_firspass[1][0][4] = 3
4190 11:35:32.117000 rx_lastpass[1][0][4] = 34
4191 11:35:32.119946 rx_firspass[1][0][5] = 8
4192 11:35:32.123210 rx_lastpass[1][0][5] = 40
4193 11:35:32.123589 rx_firspass[1][0][6] = 9
4194 11:35:32.126613 rx_lastpass[1][0][6] = 41
4195 11:35:32.129442 rx_firspass[1][0][7] = 4
4196 11:35:32.129826 rx_lastpass[1][0][7] = 34
4197 11:35:32.132926 rx_firspass[1][0][8] = 2
4198 11:35:32.137458 rx_lastpass[1][0][8] = 36
4199 11:35:32.140118 rx_firspass[1][0][9] = 3
4200 11:35:32.140499 rx_lastpass[1][0][9] = 36
4201 11:35:32.142907 rx_firspass[1][0][10] = 2
4202 11:35:32.146360 rx_lastpass[1][0][10] = 35
4203 11:35:32.146745 rx_firspass[1][0][11] = 4
4204 11:35:32.149643 rx_lastpass[1][0][11] = 36
4205 11:35:32.152913 rx_firspass[1][0][12] = 5
4206 11:35:32.156280 rx_lastpass[1][0][12] = 36
4207 11:35:32.156664 rx_firspass[1][0][13] = 5
4208 11:35:32.160312 rx_lastpass[1][0][13] = 34
4209 11:35:32.163392 rx_firspass[1][0][14] = 3
4210 11:35:32.166695 rx_lastpass[1][0][14] = 35
4211 11:35:32.167077 rx_firspass[1][0][15] = 0
4212 11:35:32.169750 rx_lastpass[1][0][15] = 33
4213 11:35:32.173507 rx_firspass[1][1][0] = 7
4214 11:35:32.173892 rx_lastpass[1][1][0] = 42
4215 11:35:32.176352 rx_firspass[1][1][1] = 5
4216 11:35:32.179882 rx_lastpass[1][1][1] = 41
4217 11:35:32.180265 rx_firspass[1][1][2] = 0
4218 11:35:32.182992 rx_lastpass[1][1][2] = 35
4219 11:35:32.186547 rx_firspass[1][1][3] = -2
4220 11:35:32.189706 rx_lastpass[1][1][3] = 33
4221 11:35:32.190090 rx_firspass[1][1][4] = 1
4222 11:35:32.193047 rx_lastpass[1][1][4] = 36
4223 11:35:32.196477 rx_firspass[1][1][5] = 5
4224 11:35:32.196872 rx_lastpass[1][1][5] = 41
4225 11:35:32.199705 rx_firspass[1][1][6] = 7
4226 11:35:32.203234 rx_lastpass[1][1][6] = 42
4227 11:35:32.203615 rx_firspass[1][1][7] = 1
4228 11:35:32.206272 rx_lastpass[1][1][7] = 36
4229 11:35:32.209972 rx_firspass[1][1][8] = 2
4230 11:35:32.213208 rx_lastpass[1][1][8] = 37
4231 11:35:32.213589 rx_firspass[1][1][9] = 2
4232 11:35:32.216497 rx_lastpass[1][1][9] = 37
4233 11:35:32.220125 rx_firspass[1][1][10] = 2
4234 11:35:32.220506 rx_lastpass[1][1][10] = 36
4235 11:35:32.222732 rx_firspass[1][1][11] = 3
4236 11:35:32.226543 rx_lastpass[1][1][11] = 38
4237 11:35:32.229923 rx_firspass[1][1][12] = 4
4238 11:35:32.230302 rx_lastpass[1][1][12] = 39
4239 11:35:32.232858 rx_firspass[1][1][13] = 3
4240 11:35:32.236301 rx_lastpass[1][1][13] = 36
4241 11:35:32.236679 rx_firspass[1][1][14] = 3
4242 11:35:32.240009 rx_lastpass[1][1][14] = 36
4243 11:35:32.243109 rx_firspass[1][1][15] = 0
4244 11:35:32.246051 rx_lastpass[1][1][15] = 34
4245 11:35:32.246428 dump params clk_delay
4246 11:35:32.249601 clk_delay[0] = -1
4247 11:35:32.249996 clk_delay[1] = 0
4248 11:35:32.253206 dump params dqs_delay
4249 11:35:32.253592 dqs_delay[0][0] = -1
4250 11:35:32.256231 dqs_delay[0][1] = 0
4251 11:35:32.256603 dqs_delay[1][0] = -1
4252 11:35:32.259788 dqs_delay[1][1] = 0
4253 11:35:32.263224 dump params delay_cell_unit = 762
4254 11:35:32.263599 dump source = 0x0
4255 11:35:32.266171 dump params frequency:1200
4256 11:35:32.269788 dump params rank number:2
4257 11:35:32.270160
4258 11:35:32.273176 dump params write leveling
4259 11:35:32.273557 write leveling[0][0][0] = 0x0
4260 11:35:32.276314 write leveling[0][0][1] = 0x0
4261 11:35:32.279252 write leveling[0][1][0] = 0x0
4262 11:35:32.282908 write leveling[0][1][1] = 0x0
4263 11:35:32.286484 write leveling[1][0][0] = 0x0
4264 11:35:32.286857 write leveling[1][0][1] = 0x0
4265 11:35:32.289502 write leveling[1][1][0] = 0x0
4266 11:35:32.292897 write leveling[1][1][1] = 0x0
4267 11:35:32.296149 dump params cbt_cs
4268 11:35:32.296524 cbt_cs[0][0] = 0x0
4269 11:35:32.299920 cbt_cs[0][1] = 0x0
4270 11:35:32.300297 cbt_cs[1][0] = 0x0
4271 11:35:32.303259 cbt_cs[1][1] = 0x0
4272 11:35:32.303639 dump params cbt_mr12
4273 11:35:32.306209 cbt_mr12[0][0] = 0x0
4274 11:35:32.306586 cbt_mr12[0][1] = 0x0
4275 11:35:32.309788 cbt_mr12[1][0] = 0x0
4276 11:35:32.312705 cbt_mr12[1][1] = 0x0
4277 11:35:32.313082 dump params tx window
4278 11:35:32.316093 tx_center_min[0][0][0] = 0
4279 11:35:32.319604 tx_center_max[0][0][0] = 0
4280 11:35:32.319983 tx_center_min[0][0][1] = 0
4281 11:35:32.323301 tx_center_max[0][0][1] = 0
4282 11:35:32.326183 tx_center_min[0][1][0] = 0
4283 11:35:32.326567 tx_center_max[0][1][0] = 0
4284 11:35:32.329953 tx_center_min[0][1][1] = 0
4285 11:35:32.333214 tx_center_max[0][1][1] = 0
4286 11:35:32.336843 tx_center_min[1][0][0] = 0
4287 11:35:32.337259 tx_center_max[1][0][0] = 0
4288 11:35:32.339955 tx_center_min[1][0][1] = 0
4289 11:35:32.342825 tx_center_max[1][0][1] = 0
4290 11:35:32.346606 tx_center_min[1][1][0] = 0
4291 11:35:32.346982 tx_center_max[1][1][0] = 0
4292 11:35:32.349587 tx_center_min[1][1][1] = 0
4293 11:35:32.352868 tx_center_max[1][1][1] = 0
4294 11:35:32.353283 dump params tx window
4295 11:35:32.356281 tx_win_center[0][0][0] = 0
4296 11:35:32.360366 tx_first_pass[0][0][0] = 0
4297 11:35:32.362889 tx_last_pass[0][0][0] = 0
4298 11:35:32.363267 tx_win_center[0][0][1] = 0
4299 11:35:32.366418 tx_first_pass[0][0][1] = 0
4300 11:35:32.369599 tx_last_pass[0][0][1] = 0
4301 11:35:32.373650 tx_win_center[0][0][2] = 0
4302 11:35:32.374036 tx_first_pass[0][0][2] = 0
4303 11:35:32.376070 tx_last_pass[0][0][2] = 0
4304 11:35:32.379841 tx_win_center[0][0][3] = 0
4305 11:35:32.380225 tx_first_pass[0][0][3] = 0
4306 11:35:32.383076 tx_last_pass[0][0][3] = 0
4307 11:35:32.387056 tx_win_center[0][0][4] = 0
4308 11:35:32.389743 tx_first_pass[0][0][4] = 0
4309 11:35:32.390160 tx_last_pass[0][0][4] = 0
4310 11:35:32.392679 tx_win_center[0][0][5] = 0
4311 11:35:32.396170 tx_first_pass[0][0][5] = 0
4312 11:35:32.396571 tx_last_pass[0][0][5] = 0
4313 11:35:32.399549 tx_win_center[0][0][6] = 0
4314 11:35:32.402799 tx_first_pass[0][0][6] = 0
4315 11:35:32.406105 tx_last_pass[0][0][6] = 0
4316 11:35:32.406544 tx_win_center[0][0][7] = 0
4317 11:35:32.409551 tx_first_pass[0][0][7] = 0
4318 11:35:32.412751 tx_last_pass[0][0][7] = 0
4319 11:35:32.416308 tx_win_center[0][0][8] = 0
4320 11:35:32.416702 tx_first_pass[0][0][8] = 0
4321 11:35:32.419321 tx_last_pass[0][0][8] = 0
4322 11:35:32.422773 tx_win_center[0][0][9] = 0
4323 11:35:32.426383 tx_first_pass[0][0][9] = 0
4324 11:35:32.426780 tx_last_pass[0][0][9] = 0
4325 11:35:32.429512 tx_win_center[0][0][10] = 0
4326 11:35:32.432724 tx_first_pass[0][0][10] = 0
4327 11:35:32.433121 tx_last_pass[0][0][10] = 0
4328 11:35:32.435974 tx_win_center[0][0][11] = 0
4329 11:35:32.439535 tx_first_pass[0][0][11] = 0
4330 11:35:32.443025 tx_last_pass[0][0][11] = 0
4331 11:35:32.443421 tx_win_center[0][0][12] = 0
4332 11:35:32.446088 tx_first_pass[0][0][12] = 0
4333 11:35:32.449699 tx_last_pass[0][0][12] = 0
4334 11:35:32.453047 tx_win_center[0][0][13] = 0
4335 11:35:32.453483 tx_first_pass[0][0][13] = 0
4336 11:35:32.456054 tx_last_pass[0][0][13] = 0
4337 11:35:32.459712 tx_win_center[0][0][14] = 0
4338 11:35:32.462812 tx_first_pass[0][0][14] = 0
4339 11:35:32.463208 tx_last_pass[0][0][14] = 0
4340 11:35:32.465895 tx_win_center[0][0][15] = 0
4341 11:35:32.469567 tx_first_pass[0][0][15] = 0
4342 11:35:32.472657 tx_last_pass[0][0][15] = 0
4343 11:35:32.473055 tx_win_center[0][1][0] = 0
4344 11:35:32.476172 tx_first_pass[0][1][0] = 0
4345 11:35:32.479453 tx_last_pass[0][1][0] = 0
4346 11:35:32.482644 tx_win_center[0][1][1] = 0
4347 11:35:32.483038 tx_first_pass[0][1][1] = 0
4348 11:35:32.486287 tx_last_pass[0][1][1] = 0
4349 11:35:32.489694 tx_win_center[0][1][2] = 0
4350 11:35:32.492963 tx_first_pass[0][1][2] = 0
4351 11:35:32.493415 tx_last_pass[0][1][2] = 0
4352 11:35:32.496110 tx_win_center[0][1][3] = 0
4353 11:35:32.500013 tx_first_pass[0][1][3] = 0
4354 11:35:32.500402 tx_last_pass[0][1][3] = 0
4355 11:35:32.502719 tx_win_center[0][1][4] = 0
4356 11:35:32.505966 tx_first_pass[0][1][4] = 0
4357 11:35:32.509637 tx_last_pass[0][1][4] = 0
4358 11:35:32.510041 tx_win_center[0][1][5] = 0
4359 11:35:32.512705 tx_first_pass[0][1][5] = 0
4360 11:35:32.516326 tx_last_pass[0][1][5] = 0
4361 11:35:32.519012 tx_win_center[0][1][6] = 0
4362 11:35:32.519403 tx_first_pass[0][1][6] = 0
4363 11:35:32.522543 tx_last_pass[0][1][6] = 0
4364 11:35:32.525694 tx_win_center[0][1][7] = 0
4365 11:35:32.526081 tx_first_pass[0][1][7] = 0
4366 11:35:32.529170 tx_last_pass[0][1][7] = 0
4367 11:35:32.532497 tx_win_center[0][1][8] = 0
4368 11:35:32.535898 tx_first_pass[0][1][8] = 0
4369 11:35:32.536289 tx_last_pass[0][1][8] = 0
4370 11:35:32.539643 tx_win_center[0][1][9] = 0
4371 11:35:32.542291 tx_first_pass[0][1][9] = 0
4372 11:35:32.545956 tx_last_pass[0][1][9] = 0
4373 11:35:32.546344 tx_win_center[0][1][10] = 0
4374 11:35:32.549231 tx_first_pass[0][1][10] = 0
4375 11:35:32.552636 tx_last_pass[0][1][10] = 0
4376 11:35:32.555846 tx_win_center[0][1][11] = 0
4377 11:35:32.556234 tx_first_pass[0][1][11] = 0
4378 11:35:32.559027 tx_last_pass[0][1][11] = 0
4379 11:35:32.562171 tx_win_center[0][1][12] = 0
4380 11:35:32.565814 tx_first_pass[0][1][12] = 0
4381 11:35:32.566214 tx_last_pass[0][1][12] = 0
4382 11:35:32.569117 tx_win_center[0][1][13] = 0
4383 11:35:32.572270 tx_first_pass[0][1][13] = 0
4384 11:35:32.575542 tx_last_pass[0][1][13] = 0
4385 11:35:32.575931 tx_win_center[0][1][14] = 0
4386 11:35:32.579030 tx_first_pass[0][1][14] = 0
4387 11:35:32.582126 tx_last_pass[0][1][14] = 0
4388 11:35:32.585998 tx_win_center[0][1][15] = 0
4389 11:35:32.586387 tx_first_pass[0][1][15] = 0
4390 11:35:32.589215 tx_last_pass[0][1][15] = 0
4391 11:35:32.592571 tx_win_center[1][0][0] = 0
4392 11:35:32.596191 tx_first_pass[1][0][0] = 0
4393 11:35:32.596578 tx_last_pass[1][0][0] = 0
4394 11:35:32.598724 tx_win_center[1][0][1] = 0
4395 11:35:32.602302 tx_first_pass[1][0][1] = 0
4396 11:35:32.602687 tx_last_pass[1][0][1] = 0
4397 11:35:32.606166 tx_win_center[1][0][2] = 0
4398 11:35:32.608703 tx_first_pass[1][0][2] = 0
4399 11:35:32.612570 tx_last_pass[1][0][2] = 0
4400 11:35:32.612954 tx_win_center[1][0][3] = 0
4401 11:35:32.615847 tx_first_pass[1][0][3] = 0
4402 11:35:32.619298 tx_last_pass[1][0][3] = 0
4403 11:35:32.619682 tx_win_center[1][0][4] = 0
4404 11:35:32.622410 tx_first_pass[1][0][4] = 0
4405 11:35:32.626065 tx_last_pass[1][0][4] = 0
4406 11:35:32.628770 tx_win_center[1][0][5] = 0
4407 11:35:32.629190 tx_first_pass[1][0][5] = 0
4408 11:35:32.632254 tx_last_pass[1][0][5] = 0
4409 11:35:32.635763 tx_win_center[1][0][6] = 0
4410 11:35:32.638781 tx_first_pass[1][0][6] = 0
4411 11:35:32.639166 tx_last_pass[1][0][6] = 0
4412 11:35:32.641955 tx_win_center[1][0][7] = 0
4413 11:35:32.645635 tx_first_pass[1][0][7] = 0
4414 11:35:32.646018 tx_last_pass[1][0][7] = 0
4415 11:35:32.648757 tx_win_center[1][0][8] = 0
4416 11:35:32.651812 tx_first_pass[1][0][8] = 0
4417 11:35:32.655170 tx_last_pass[1][0][8] = 0
4418 11:35:32.655612 tx_win_center[1][0][9] = 0
4419 11:35:32.658468 tx_first_pass[1][0][9] = 0
4420 11:35:32.662238 tx_last_pass[1][0][9] = 0
4421 11:35:32.665466 tx_win_center[1][0][10] = 0
4422 11:35:32.665846 tx_first_pass[1][0][10] = 0
4423 11:35:32.668968 tx_last_pass[1][0][10] = 0
4424 11:35:32.671840 tx_win_center[1][0][11] = 0
4425 11:35:32.675436 tx_first_pass[1][0][11] = 0
4426 11:35:32.675820 tx_last_pass[1][0][11] = 0
4427 11:35:32.678777 tx_win_center[1][0][12] = 0
4428 11:35:32.682088 tx_first_pass[1][0][12] = 0
4429 11:35:32.685307 tx_last_pass[1][0][12] = 0
4430 11:35:32.685692 tx_win_center[1][0][13] = 0
4431 11:35:32.689307 tx_first_pass[1][0][13] = 0
4432 11:35:32.692660 tx_last_pass[1][0][13] = 0
4433 11:35:32.696047 tx_win_center[1][0][14] = 0
4434 11:35:32.696431 tx_first_pass[1][0][14] = 0
4435 11:35:32.698617 tx_last_pass[1][0][14] = 0
4436 11:35:32.702361 tx_win_center[1][0][15] = 0
4437 11:35:32.705414 tx_first_pass[1][0][15] = 0
4438 11:35:32.705798 tx_last_pass[1][0][15] = 0
4439 11:35:32.708680 tx_win_center[1][1][0] = 0
4440 11:35:32.712082 tx_first_pass[1][1][0] = 0
4441 11:35:32.715618 tx_last_pass[1][1][0] = 0
4442 11:35:32.715999 tx_win_center[1][1][1] = 0
4443 11:35:32.718622 tx_first_pass[1][1][1] = 0
4444 11:35:32.722155 tx_last_pass[1][1][1] = 0
4445 11:35:32.722551 tx_win_center[1][1][2] = 0
4446 11:35:32.725378 tx_first_pass[1][1][2] = 0
4447 11:35:32.728583 tx_last_pass[1][1][2] = 0
4448 11:35:32.732150 tx_win_center[1][1][3] = 0
4449 11:35:32.732548 tx_first_pass[1][1][3] = 0
4450 11:35:32.735250 tx_last_pass[1][1][3] = 0
4451 11:35:32.738790 tx_win_center[1][1][4] = 0
4452 11:35:32.741803 tx_first_pass[1][1][4] = 0
4453 11:35:32.742198 tx_last_pass[1][1][4] = 0
4454 11:35:32.745326 tx_win_center[1][1][5] = 0
4455 11:35:32.748940 tx_first_pass[1][1][5] = 0
4456 11:35:32.749379 tx_last_pass[1][1][5] = 0
4457 11:35:32.751885 tx_win_center[1][1][6] = 0
4458 11:35:32.755227 tx_first_pass[1][1][6] = 0
4459 11:35:32.758785 tx_last_pass[1][1][6] = 0
4460 11:35:32.759182 tx_win_center[1][1][7] = 0
4461 11:35:32.761662 tx_first_pass[1][1][7] = 0
4462 11:35:32.765434 tx_last_pass[1][1][7] = 0
4463 11:35:32.765833 tx_win_center[1][1][8] = 0
4464 11:35:32.768405 tx_first_pass[1][1][8] = 0
4465 11:35:32.772136 tx_last_pass[1][1][8] = 0
4466 11:35:32.775602 tx_win_center[1][1][9] = 0
4467 11:35:32.775998 tx_first_pass[1][1][9] = 0
4468 11:35:32.778521 tx_last_pass[1][1][9] = 0
4469 11:35:32.782073 tx_win_center[1][1][10] = 0
4470 11:35:32.785506 tx_first_pass[1][1][10] = 0
4471 11:35:32.785912 tx_last_pass[1][1][10] = 0
4472 11:35:32.788889 tx_win_center[1][1][11] = 0
4473 11:35:32.792566 tx_first_pass[1][1][11] = 0
4474 11:35:32.795323 tx_last_pass[1][1][11] = 0
4475 11:35:32.795687 tx_win_center[1][1][12] = 0
4476 11:35:32.798974 tx_first_pass[1][1][12] = 0
4477 11:35:32.802395 tx_last_pass[1][1][12] = 0
4478 11:35:32.806218 tx_win_center[1][1][13] = 0
4479 11:35:32.806601 tx_first_pass[1][1][13] = 0
4480 11:35:32.809073 tx_last_pass[1][1][13] = 0
4481 11:35:32.812432 tx_win_center[1][1][14] = 0
4482 11:35:32.815392 tx_first_pass[1][1][14] = 0
4483 11:35:32.815776 tx_last_pass[1][1][14] = 0
4484 11:35:32.818932 tx_win_center[1][1][15] = 0
4485 11:35:32.822016 tx_first_pass[1][1][15] = 0
4486 11:35:32.825637 tx_last_pass[1][1][15] = 0
4487 11:35:32.826021 dump params rx window
4488 11:35:32.829209 rx_firspass[0][0][0] = 0
4489 11:35:32.829591 rx_lastpass[0][0][0] = 0
4490 11:35:32.831925 rx_firspass[0][0][1] = 0
4491 11:35:32.836242 rx_lastpass[0][0][1] = 0
4492 11:35:32.839021 rx_firspass[0][0][2] = 0
4493 11:35:32.839404 rx_lastpass[0][0][2] = 0
4494 11:35:32.842061 rx_firspass[0][0][3] = 0
4495 11:35:32.845784 rx_lastpass[0][0][3] = 0
4496 11:35:32.846169 rx_firspass[0][0][4] = 0
4497 11:35:32.849279 rx_lastpass[0][0][4] = 0
4498 11:35:32.851992 rx_firspass[0][0][5] = 0
4499 11:35:32.852370 rx_lastpass[0][0][5] = 0
4500 11:35:32.855246 rx_firspass[0][0][6] = 0
4501 11:35:32.858666 rx_lastpass[0][0][6] = 0
4502 11:35:32.859047 rx_firspass[0][0][7] = 0
4503 11:35:32.862350 rx_lastpass[0][0][7] = 0
4504 11:35:32.865555 rx_firspass[0][0][8] = 0
4505 11:35:32.866144 rx_lastpass[0][0][8] = 0
4506 11:35:32.868880 rx_firspass[0][0][9] = 0
4507 11:35:32.872054 rx_lastpass[0][0][9] = 0
4508 11:35:32.875187 rx_firspass[0][0][10] = 0
4509 11:35:32.875568 rx_lastpass[0][0][10] = 0
4510 11:35:32.878623 rx_firspass[0][0][11] = 0
4511 11:35:32.881846 rx_lastpass[0][0][11] = 0
4512 11:35:32.882235 rx_firspass[0][0][12] = 0
4513 11:35:32.885416 rx_lastpass[0][0][12] = 0
4514 11:35:32.888670 rx_firspass[0][0][13] = 0
4515 11:35:32.891690 rx_lastpass[0][0][13] = 0
4516 11:35:32.892073 rx_firspass[0][0][14] = 0
4517 11:35:32.895447 rx_lastpass[0][0][14] = 0
4518 11:35:32.898225 rx_firspass[0][0][15] = 0
4519 11:35:32.898667 rx_lastpass[0][0][15] = 0
4520 11:35:32.901716 rx_firspass[0][1][0] = 0
4521 11:35:32.905078 rx_lastpass[0][1][0] = 0
4522 11:35:32.905489 rx_firspass[0][1][1] = 0
4523 11:35:32.908238 rx_lastpass[0][1][1] = 0
4524 11:35:32.912541 rx_firspass[0][1][2] = 0
4525 11:35:32.914942 rx_lastpass[0][1][2] = 0
4526 11:35:32.915324 rx_firspass[0][1][3] = 0
4527 11:35:32.918605 rx_lastpass[0][1][3] = 0
4528 11:35:32.921996 rx_firspass[0][1][4] = 0
4529 11:35:32.922379 rx_lastpass[0][1][4] = 0
4530 11:35:32.925091 rx_firspass[0][1][5] = 0
4531 11:35:32.928159 rx_lastpass[0][1][5] = 0
4532 11:35:32.928539 rx_firspass[0][1][6] = 0
4533 11:35:32.931623 rx_lastpass[0][1][6] = 0
4534 11:35:32.935079 rx_firspass[0][1][7] = 0
4535 11:35:32.935461 rx_lastpass[0][1][7] = 0
4536 11:35:32.938850 rx_firspass[0][1][8] = 0
4537 11:35:32.941602 rx_lastpass[0][1][8] = 0
4538 11:35:32.941986 rx_firspass[0][1][9] = 0
4539 11:35:32.946035 rx_lastpass[0][1][9] = 0
4540 11:35:32.948696 rx_firspass[0][1][10] = 0
4541 11:35:32.951914 rx_lastpass[0][1][10] = 0
4542 11:35:32.952295 rx_firspass[0][1][11] = 0
4543 11:35:32.955637 rx_lastpass[0][1][11] = 0
4544 11:35:32.958317 rx_firspass[0][1][12] = 0
4545 11:35:32.958703 rx_lastpass[0][1][12] = 0
4546 11:35:32.962284 rx_firspass[0][1][13] = 0
4547 11:35:32.965094 rx_lastpass[0][1][13] = 0
4548 11:35:32.968587 rx_firspass[0][1][14] = 0
4549 11:35:32.968983 rx_lastpass[0][1][14] = 0
4550 11:35:32.971725 rx_firspass[0][1][15] = 0
4551 11:35:32.974816 rx_lastpass[0][1][15] = 0
4552 11:35:32.975201 rx_firspass[1][0][0] = 0
4553 11:35:32.978277 rx_lastpass[1][0][0] = 0
4554 11:35:32.981863 rx_firspass[1][0][1] = 0
4555 11:35:32.982245 rx_lastpass[1][0][1] = 0
4556 11:35:32.985327 rx_firspass[1][0][2] = 0
4557 11:35:32.988716 rx_lastpass[1][0][2] = 0
4558 11:35:32.989098 rx_firspass[1][0][3] = 0
4559 11:35:32.992081 rx_lastpass[1][0][3] = 0
4560 11:35:32.995174 rx_firspass[1][0][4] = 0
4561 11:35:32.999017 rx_lastpass[1][0][4] = 0
4562 11:35:32.999398 rx_firspass[1][0][5] = 0
4563 11:35:33.001959 rx_lastpass[1][0][5] = 0
4564 11:35:33.005678 rx_firspass[1][0][6] = 0
4565 11:35:33.006062 rx_lastpass[1][0][6] = 0
4566 11:35:33.008432 rx_firspass[1][0][7] = 0
4567 11:35:33.012237 rx_lastpass[1][0][7] = 0
4568 11:35:33.012619 rx_firspass[1][0][8] = 0
4569 11:35:33.015594 rx_lastpass[1][0][8] = 0
4570 11:35:33.018609 rx_firspass[1][0][9] = 0
4571 11:35:33.018989 rx_lastpass[1][0][9] = 0
4572 11:35:33.021948 rx_firspass[1][0][10] = 0
4573 11:35:33.025455 rx_lastpass[1][0][10] = 0
4574 11:35:33.025837 rx_firspass[1][0][11] = 0
4575 11:35:33.028531 rx_lastpass[1][0][11] = 0
4576 11:35:33.032273 rx_firspass[1][0][12] = 0
4577 11:35:33.035156 rx_lastpass[1][0][12] = 0
4578 11:35:33.035539 rx_firspass[1][0][13] = 0
4579 11:35:33.038535 rx_lastpass[1][0][13] = 0
4580 11:35:33.042119 rx_firspass[1][0][14] = 0
4581 11:35:33.042499 rx_lastpass[1][0][14] = 0
4582 11:35:33.045039 rx_firspass[1][0][15] = 0
4583 11:35:33.049083 rx_lastpass[1][0][15] = 0
4584 11:35:33.052071 rx_firspass[1][1][0] = 0
4585 11:35:33.052450 rx_lastpass[1][1][0] = 0
4586 11:35:33.055434 rx_firspass[1][1][1] = 0
4587 11:35:33.058780 rx_lastpass[1][1][1] = 0
4588 11:35:33.059253 rx_firspass[1][1][2] = 0
4589 11:35:33.061805 rx_lastpass[1][1][2] = 0
4590 11:35:33.065769 rx_firspass[1][1][3] = 0
4591 11:35:33.066251 rx_lastpass[1][1][3] = 0
4592 11:35:33.068716 rx_firspass[1][1][4] = 0
4593 11:35:33.072041 rx_lastpass[1][1][4] = 0
4594 11:35:33.072424 rx_firspass[1][1][5] = 0
4595 11:35:33.075262 rx_lastpass[1][1][5] = 0
4596 11:35:33.078289 rx_firspass[1][1][6] = 0
4597 11:35:33.081432 rx_lastpass[1][1][6] = 0
4598 11:35:33.081812 rx_firspass[1][1][7] = 0
4599 11:35:33.084604 rx_lastpass[1][1][7] = 0
4600 11:35:33.088101 rx_firspass[1][1][8] = 0
4601 11:35:33.088486 rx_lastpass[1][1][8] = 0
4602 11:35:33.091471 rx_firspass[1][1][9] = 0
4603 11:35:33.094885 rx_lastpass[1][1][9] = 0
4604 11:35:33.095268 rx_firspass[1][1][10] = 0
4605 11:35:33.098138 rx_lastpass[1][1][10] = 0
4606 11:35:33.101731 rx_firspass[1][1][11] = 0
4607 11:35:33.104828 rx_lastpass[1][1][11] = 0
4608 11:35:33.105246 rx_firspass[1][1][12] = 0
4609 11:35:33.108447 rx_lastpass[1][1][12] = 0
4610 11:35:33.111823 rx_firspass[1][1][13] = 0
4611 11:35:33.112207 rx_lastpass[1][1][13] = 0
4612 11:35:33.115074 rx_firspass[1][1][14] = 0
4613 11:35:33.118144 rx_lastpass[1][1][14] = 0
4614 11:35:33.121641 rx_firspass[1][1][15] = 0
4615 11:35:33.122024 rx_lastpass[1][1][15] = 0
4616 11:35:33.125199 dump params clk_delay
4617 11:35:33.125584 clk_delay[0] = 0
4618 11:35:33.127772 clk_delay[1] = 0
4619 11:35:33.128153 dump params dqs_delay
4620 11:35:33.131104 dqs_delay[0][0] = 0
4621 11:35:33.131486 dqs_delay[0][1] = 0
4622 11:35:33.134582 dqs_delay[1][0] = 0
4623 11:35:33.138086 dqs_delay[1][1] = 0
4624 11:35:33.138467 dump params delay_cell_unit = 762
4625 11:35:33.141385 dump source = 0x0
4626 11:35:33.145229 dump params frequency:800
4627 11:35:33.145607 dump params rank number:2
4628 11:35:33.145904
4629 11:35:33.148324 dump params write leveling
4630 11:35:33.151637 write leveling[0][0][0] = 0x0
4631 11:35:33.155057 write leveling[0][0][1] = 0x0
4632 11:35:33.157991 write leveling[0][1][0] = 0x0
4633 11:35:33.158402 write leveling[0][1][1] = 0x0
4634 11:35:33.162171 write leveling[1][0][0] = 0x0
4635 11:35:33.165608 write leveling[1][0][1] = 0x0
4636 11:35:33.168214 write leveling[1][1][0] = 0x0
4637 11:35:33.171782 write leveling[1][1][1] = 0x0
4638 11:35:33.172163 dump params cbt_cs
4639 11:35:33.174431 cbt_cs[0][0] = 0x0
4640 11:35:33.174851 cbt_cs[0][1] = 0x0
4641 11:35:33.178238 cbt_cs[1][0] = 0x0
4642 11:35:33.178618 cbt_cs[1][1] = 0x0
4643 11:35:33.181486 dump params cbt_mr12
4644 11:35:33.181864 cbt_mr12[0][0] = 0x0
4645 11:35:33.184218 cbt_mr12[0][1] = 0x0
4646 11:35:33.184594 cbt_mr12[1][0] = 0x0
4647 11:35:33.187697 cbt_mr12[1][1] = 0x0
4648 11:35:33.190906 dump params tx window
4649 11:35:33.191324 tx_center_min[0][0][0] = 0
4650 11:35:33.194193 tx_center_max[0][0][0] = 0
4651 11:35:33.197612 tx_center_min[0][0][1] = 0
4652 11:35:33.201357 tx_center_max[0][0][1] = 0
4653 11:35:33.201737 tx_center_min[0][1][0] = 0
4654 11:35:33.204795 tx_center_max[0][1][0] = 0
4655 11:35:33.207487 tx_center_min[0][1][1] = 0
4656 11:35:33.211317 tx_center_max[0][1][1] = 0
4657 11:35:33.211696 tx_center_min[1][0][0] = 0
4658 11:35:33.214940 tx_center_max[1][0][0] = 0
4659 11:35:33.217387 tx_center_min[1][0][1] = 0
4660 11:35:33.220857 tx_center_max[1][0][1] = 0
4661 11:35:33.221276 tx_center_min[1][1][0] = 0
4662 11:35:33.224117 tx_center_max[1][1][0] = 0
4663 11:35:33.227546 tx_center_min[1][1][1] = 0
4664 11:35:33.230795 tx_center_max[1][1][1] = 0
4665 11:35:33.231173 dump params tx window
4666 11:35:33.233866 tx_win_center[0][0][0] = 0
4667 11:35:33.237463 tx_first_pass[0][0][0] = 0
4668 11:35:33.237853 tx_last_pass[0][0][0] = 0
4669 11:35:33.241087 tx_win_center[0][0][1] = 0
4670 11:35:33.243889 tx_first_pass[0][0][1] = 0
4671 11:35:33.244271 tx_last_pass[0][0][1] = 0
4672 11:35:33.247476 tx_win_center[0][0][2] = 0
4673 11:35:33.250598 tx_first_pass[0][0][2] = 0
4674 11:35:33.254289 tx_last_pass[0][0][2] = 0
4675 11:35:33.254706 tx_win_center[0][0][3] = 0
4676 11:35:33.257904 tx_first_pass[0][0][3] = 0
4677 11:35:33.260688 tx_last_pass[0][0][3] = 0
4678 11:35:33.263884 tx_win_center[0][0][4] = 0
4679 11:35:33.264264 tx_first_pass[0][0][4] = 0
4680 11:35:33.267249 tx_last_pass[0][0][4] = 0
4681 11:35:33.271226 tx_win_center[0][0][5] = 0
4682 11:35:33.271603 tx_first_pass[0][0][5] = 0
4683 11:35:33.274232 tx_last_pass[0][0][5] = 0
4684 11:35:33.277250 tx_win_center[0][0][6] = 0
4685 11:35:33.280716 tx_first_pass[0][0][6] = 0
4686 11:35:33.281096 tx_last_pass[0][0][6] = 0
4687 11:35:33.284094 tx_win_center[0][0][7] = 0
4688 11:35:33.287153 tx_first_pass[0][0][7] = 0
4689 11:35:33.290694 tx_last_pass[0][0][7] = 0
4690 11:35:33.291073 tx_win_center[0][0][8] = 0
4691 11:35:33.294195 tx_first_pass[0][0][8] = 0
4692 11:35:33.297486 tx_last_pass[0][0][8] = 0
4693 11:35:33.297835 tx_win_center[0][0][9] = 0
4694 11:35:33.300609 tx_first_pass[0][0][9] = 0
4695 11:35:33.304079 tx_last_pass[0][0][9] = 0
4696 11:35:33.307339 tx_win_center[0][0][10] = 0
4697 11:35:33.307873 tx_first_pass[0][0][10] = 0
4698 11:35:33.310788 tx_last_pass[0][0][10] = 0
4699 11:35:33.313971 tx_win_center[0][0][11] = 0
4700 11:35:33.317245 tx_first_pass[0][0][11] = 0
4701 11:35:33.317715 tx_last_pass[0][0][11] = 0
4702 11:35:33.320702 tx_win_center[0][0][12] = 0
4703 11:35:33.324195 tx_first_pass[0][0][12] = 0
4704 11:35:33.327579 tx_last_pass[0][0][12] = 0
4705 11:35:33.327960 tx_win_center[0][0][13] = 0
4706 11:35:33.330532 tx_first_pass[0][0][13] = 0
4707 11:35:33.333810 tx_last_pass[0][0][13] = 0
4708 11:35:33.338184 tx_win_center[0][0][14] = 0
4709 11:35:33.338698 tx_first_pass[0][0][14] = 0
4710 11:35:33.340686 tx_last_pass[0][0][14] = 0
4711 11:35:33.343802 tx_win_center[0][0][15] = 0
4712 11:35:33.347058 tx_first_pass[0][0][15] = 0
4713 11:35:33.347489 tx_last_pass[0][0][15] = 0
4714 11:35:33.350836 tx_win_center[0][1][0] = 0
4715 11:35:33.353977 tx_first_pass[0][1][0] = 0
4716 11:35:33.357231 tx_last_pass[0][1][0] = 0
4717 11:35:33.357689 tx_win_center[0][1][1] = 0
4718 11:35:33.361051 tx_first_pass[0][1][1] = 0
4719 11:35:33.363825 tx_last_pass[0][1][1] = 0
4720 11:35:33.364332 tx_win_center[0][1][2] = 0
4721 11:35:33.366928 tx_first_pass[0][1][2] = 0
4722 11:35:33.370631 tx_last_pass[0][1][2] = 0
4723 11:35:33.374068 tx_win_center[0][1][3] = 0
4724 11:35:33.374459 tx_first_pass[0][1][3] = 0
4725 11:35:33.377459 tx_last_pass[0][1][3] = 0
4726 11:35:33.380795 tx_win_center[0][1][4] = 0
4727 11:35:33.383895 tx_first_pass[0][1][4] = 0
4728 11:35:33.384407 tx_last_pass[0][1][4] = 0
4729 11:35:33.387475 tx_win_center[0][1][5] = 0
4730 11:35:33.390657 tx_first_pass[0][1][5] = 0
4731 11:35:33.391068 tx_last_pass[0][1][5] = 0
4732 11:35:33.393709 tx_win_center[0][1][6] = 0
4733 11:35:33.397470 tx_first_pass[0][1][6] = 0
4734 11:35:33.400577 tx_last_pass[0][1][6] = 0
4735 11:35:33.400972 tx_win_center[0][1][7] = 0
4736 11:35:33.403763 tx_first_pass[0][1][7] = 0
4737 11:35:33.407450 tx_last_pass[0][1][7] = 0
4738 11:35:33.407858 tx_win_center[0][1][8] = 0
4739 11:35:33.410584 tx_first_pass[0][1][8] = 0
4740 11:35:33.414088 tx_last_pass[0][1][8] = 0
4741 11:35:33.417674 tx_win_center[0][1][9] = 0
4742 11:35:33.418210 tx_first_pass[0][1][9] = 0
4743 11:35:33.420600 tx_last_pass[0][1][9] = 0
4744 11:35:33.423698 tx_win_center[0][1][10] = 0
4745 11:35:33.426991 tx_first_pass[0][1][10] = 0
4746 11:35:33.427541 tx_last_pass[0][1][10] = 0
4747 11:35:33.430404 tx_win_center[0][1][11] = 0
4748 11:35:33.433942 tx_first_pass[0][1][11] = 0
4749 11:35:33.436941 tx_last_pass[0][1][11] = 0
4750 11:35:33.437544 tx_win_center[0][1][12] = 0
4751 11:35:33.440516 tx_first_pass[0][1][12] = 0
4752 11:35:33.443835 tx_last_pass[0][1][12] = 0
4753 11:35:33.447006 tx_win_center[0][1][13] = 0
4754 11:35:33.447358 tx_first_pass[0][1][13] = 0
4755 11:35:33.450337 tx_last_pass[0][1][13] = 0
4756 11:35:33.453880 tx_win_center[0][1][14] = 0
4757 11:35:33.456971 tx_first_pass[0][1][14] = 0
4758 11:35:33.457237 tx_last_pass[0][1][14] = 0
4759 11:35:33.460325 tx_win_center[0][1][15] = 0
4760 11:35:33.463696 tx_first_pass[0][1][15] = 0
4761 11:35:33.466971 tx_last_pass[0][1][15] = 0
4762 11:35:33.467249 tx_win_center[1][0][0] = 0
4763 11:35:33.470442 tx_first_pass[1][0][0] = 0
4764 11:35:33.474084 tx_last_pass[1][0][0] = 0
4765 11:35:33.474159 tx_win_center[1][0][1] = 0
4766 11:35:33.476979 tx_first_pass[1][0][1] = 0
4767 11:35:33.480313 tx_last_pass[1][0][1] = 0
4768 11:35:33.484074 tx_win_center[1][0][2] = 0
4769 11:35:33.484149 tx_first_pass[1][0][2] = 0
4770 11:35:33.486785 tx_last_pass[1][0][2] = 0
4771 11:35:33.490346 tx_win_center[1][0][3] = 0
4772 11:35:33.493681 tx_first_pass[1][0][3] = 0
4773 11:35:33.493755 tx_last_pass[1][0][3] = 0
4774 11:35:33.496931 tx_win_center[1][0][4] = 0
4775 11:35:33.500576 tx_first_pass[1][0][4] = 0
4776 11:35:33.500657 tx_last_pass[1][0][4] = 0
4777 11:35:33.503795 tx_win_center[1][0][5] = 0
4778 11:35:33.506909 tx_first_pass[1][0][5] = 0
4779 11:35:33.511113 tx_last_pass[1][0][5] = 0
4780 11:35:33.511224 tx_win_center[1][0][6] = 0
4781 11:35:33.513316 tx_first_pass[1][0][6] = 0
4782 11:35:33.517074 tx_last_pass[1][0][6] = 0
4783 11:35:33.517219 tx_win_center[1][0][7] = 0
4784 11:35:33.520378 tx_first_pass[1][0][7] = 0
4785 11:35:33.524051 tx_last_pass[1][0][7] = 0
4786 11:35:33.527117 tx_win_center[1][0][8] = 0
4787 11:35:33.527255 tx_first_pass[1][0][8] = 0
4788 11:35:33.530785 tx_last_pass[1][0][8] = 0
4789 11:35:33.533530 tx_win_center[1][0][9] = 0
4790 11:35:33.536981 tx_first_pass[1][0][9] = 0
4791 11:35:33.537070 tx_last_pass[1][0][9] = 0
4792 11:35:33.540748 tx_win_center[1][0][10] = 0
4793 11:35:33.543807 tx_first_pass[1][0][10] = 0
4794 11:35:33.543887 tx_last_pass[1][0][10] = 0
4795 11:35:33.547586 tx_win_center[1][0][11] = 0
4796 11:35:33.550735 tx_first_pass[1][0][11] = 0
4797 11:35:33.553946 tx_last_pass[1][0][11] = 0
4798 11:35:33.554041 tx_win_center[1][0][12] = 0
4799 11:35:33.557111 tx_first_pass[1][0][12] = 0
4800 11:35:33.560494 tx_last_pass[1][0][12] = 0
4801 11:35:33.564054 tx_win_center[1][0][13] = 0
4802 11:35:33.564171 tx_first_pass[1][0][13] = 0
4803 11:35:33.567090 tx_last_pass[1][0][13] = 0
4804 11:35:33.570408 tx_win_center[1][0][14] = 0
4805 11:35:33.573988 tx_first_pass[1][0][14] = 0
4806 11:35:33.574127 tx_last_pass[1][0][14] = 0
4807 11:35:33.577494 tx_win_center[1][0][15] = 0
4808 11:35:33.580442 tx_first_pass[1][0][15] = 0
4809 11:35:33.584263 tx_last_pass[1][0][15] = 0
4810 11:35:33.584651 tx_win_center[1][1][0] = 0
4811 11:35:33.587460 tx_first_pass[1][1][0] = 0
4812 11:35:33.590577 tx_last_pass[1][1][0] = 0
4813 11:35:33.594264 tx_win_center[1][1][1] = 0
4814 11:35:33.594650 tx_first_pass[1][1][1] = 0
4815 11:35:33.597248 tx_last_pass[1][1][1] = 0
4816 11:35:33.601664 tx_win_center[1][1][2] = 0
4817 11:35:33.604630 tx_first_pass[1][1][2] = 0
4818 11:35:33.605085 tx_last_pass[1][1][2] = 0
4819 11:35:33.607617 tx_win_center[1][1][3] = 0
4820 11:35:33.610891 tx_first_pass[1][1][3] = 0
4821 11:35:33.611351 tx_last_pass[1][1][3] = 0
4822 11:35:33.614423 tx_win_center[1][1][4] = 0
4823 11:35:33.617808 tx_first_pass[1][1][4] = 0
4824 11:35:33.620926 tx_last_pass[1][1][4] = 0
4825 11:35:33.621409 tx_win_center[1][1][5] = 0
4826 11:35:33.624537 tx_first_pass[1][1][5] = 0
4827 11:35:33.627763 tx_last_pass[1][1][5] = 0
4828 11:35:33.630811 tx_win_center[1][1][6] = 0
4829 11:35:33.631192 tx_first_pass[1][1][6] = 0
4830 11:35:33.633882 tx_last_pass[1][1][6] = 0
4831 11:35:33.637540 tx_win_center[1][1][7] = 0
4832 11:35:33.637925 tx_first_pass[1][1][7] = 0
4833 11:35:33.640478 tx_last_pass[1][1][7] = 0
4834 11:35:33.643743 tx_win_center[1][1][8] = 0
4835 11:35:33.647625 tx_first_pass[1][1][8] = 0
4836 11:35:33.648006 tx_last_pass[1][1][8] = 0
4837 11:35:33.651075 tx_win_center[1][1][9] = 0
4838 11:35:33.653815 tx_first_pass[1][1][9] = 0
4839 11:35:33.654198 tx_last_pass[1][1][9] = 0
4840 11:35:33.657639 tx_win_center[1][1][10] = 0
4841 11:35:33.660892 tx_first_pass[1][1][10] = 0
4842 11:35:33.664051 tx_last_pass[1][1][10] = 0
4843 11:35:33.664509 tx_win_center[1][1][11] = 0
4844 11:35:33.667476 tx_first_pass[1][1][11] = 0
4845 11:35:33.671096 tx_last_pass[1][1][11] = 0
4846 11:35:33.674196 tx_win_center[1][1][12] = 0
4847 11:35:33.674582 tx_first_pass[1][1][12] = 0
4848 11:35:33.677179 tx_last_pass[1][1][12] = 0
4849 11:35:33.680977 tx_win_center[1][1][13] = 0
4850 11:35:33.684413 tx_first_pass[1][1][13] = 0
4851 11:35:33.684881 tx_last_pass[1][1][13] = 0
4852 11:35:33.687188 tx_win_center[1][1][14] = 0
4853 11:35:33.690751 tx_first_pass[1][1][14] = 0
4854 11:35:33.694165 tx_last_pass[1][1][14] = 0
4855 11:35:33.694596 tx_win_center[1][1][15] = 0
4856 11:35:33.697916 tx_first_pass[1][1][15] = 0
4857 11:35:33.701304 tx_last_pass[1][1][15] = 0
4858 11:35:33.704134 dump params rx window
4859 11:35:33.704592 rx_firspass[0][0][0] = 0
4860 11:35:33.708144 rx_lastpass[0][0][0] = 0
4861 11:35:33.710792 rx_firspass[0][0][1] = 0
4862 11:35:33.711207 rx_lastpass[0][0][1] = 0
4863 11:35:33.714169 rx_firspass[0][0][2] = 0
4864 11:35:33.717798 rx_lastpass[0][0][2] = 0
4865 11:35:33.718259 rx_firspass[0][0][3] = 0
4866 11:35:33.720892 rx_lastpass[0][0][3] = 0
4867 11:35:33.725020 rx_firspass[0][0][4] = 0
4868 11:35:33.725523 rx_lastpass[0][0][4] = 0
4869 11:35:33.727473 rx_firspass[0][0][5] = 0
4870 11:35:33.730702 rx_lastpass[0][0][5] = 0
4871 11:35:33.731088 rx_firspass[0][0][6] = 0
4872 11:35:33.734216 rx_lastpass[0][0][6] = 0
4873 11:35:33.737478 rx_firspass[0][0][7] = 0
4874 11:35:33.740991 rx_lastpass[0][0][7] = 0
4875 11:35:33.741503 rx_firspass[0][0][8] = 0
4876 11:35:33.744459 rx_lastpass[0][0][8] = 0
4877 11:35:33.747905 rx_firspass[0][0][9] = 0
4878 11:35:33.748365 rx_lastpass[0][0][9] = 0
4879 11:35:33.750803 rx_firspass[0][0][10] = 0
4880 11:35:33.754513 rx_lastpass[0][0][10] = 0
4881 11:35:33.754972 rx_firspass[0][0][11] = 0
4882 11:35:33.757383 rx_lastpass[0][0][11] = 0
4883 11:35:33.760673 rx_firspass[0][0][12] = 0
4884 11:35:33.763835 rx_lastpass[0][0][12] = 0
4885 11:35:33.764217 rx_firspass[0][0][13] = 0
4886 11:35:33.768044 rx_lastpass[0][0][13] = 0
4887 11:35:33.771013 rx_firspass[0][0][14] = 0
4888 11:35:33.771396 rx_lastpass[0][0][14] = 0
4889 11:35:33.774032 rx_firspass[0][0][15] = 0
4890 11:35:33.777617 rx_lastpass[0][0][15] = 0
4891 11:35:33.778092 rx_firspass[0][1][0] = 0
4892 11:35:33.780729 rx_lastpass[0][1][0] = 0
4893 11:35:33.784306 rx_firspass[0][1][1] = 0
4894 11:35:33.787293 rx_lastpass[0][1][1] = 0
4895 11:35:33.787677 rx_firspass[0][1][2] = 0
4896 11:35:33.790980 rx_lastpass[0][1][2] = 0
4897 11:35:33.794282 rx_firspass[0][1][3] = 0
4898 11:35:33.794665 rx_lastpass[0][1][3] = 0
4899 11:35:33.797885 rx_firspass[0][1][4] = 0
4900 11:35:33.801199 rx_lastpass[0][1][4] = 0
4901 11:35:33.801584 rx_firspass[0][1][5] = 0
4902 11:35:33.803989 rx_lastpass[0][1][5] = 0
4903 11:35:33.808057 rx_firspass[0][1][6] = 0
4904 11:35:33.808520 rx_lastpass[0][1][6] = 0
4905 11:35:33.811390 rx_firspass[0][1][7] = 0
4906 11:35:33.814132 rx_lastpass[0][1][7] = 0
4907 11:35:33.814515 rx_firspass[0][1][8] = 0
4908 11:35:33.817697 rx_lastpass[0][1][8] = 0
4909 11:35:33.821030 rx_firspass[0][1][9] = 0
4910 11:35:33.821528 rx_lastpass[0][1][9] = 0
4911 11:35:33.825062 rx_firspass[0][1][10] = 0
4912 11:35:33.827986 rx_lastpass[0][1][10] = 0
4913 11:35:33.831000 rx_firspass[0][1][11] = 0
4914 11:35:33.831388 rx_lastpass[0][1][11] = 0
4915 11:35:33.834056 rx_firspass[0][1][12] = 0
4916 11:35:33.837927 rx_lastpass[0][1][12] = 0
4917 11:35:33.838437 rx_firspass[0][1][13] = 0
4918 11:35:33.840855 rx_lastpass[0][1][13] = 0
4919 11:35:33.844486 rx_firspass[0][1][14] = 0
4920 11:35:33.848003 rx_lastpass[0][1][14] = 0
4921 11:35:33.848468 rx_firspass[0][1][15] = 0
4922 11:35:33.850779 rx_lastpass[0][1][15] = 0
4923 11:35:33.854684 rx_firspass[1][0][0] = 0
4924 11:35:33.855149 rx_lastpass[1][0][0] = 0
4925 11:35:33.857781 rx_firspass[1][0][1] = 0
4926 11:35:33.860718 rx_lastpass[1][0][1] = 0
4927 11:35:33.861196 rx_firspass[1][0][2] = 0
4928 11:35:33.864075 rx_lastpass[1][0][2] = 0
4929 11:35:33.867533 rx_firspass[1][0][3] = 0
4930 11:35:33.867917 rx_lastpass[1][0][3] = 0
4931 11:35:33.871220 rx_firspass[1][0][4] = 0
4932 11:35:33.874469 rx_lastpass[1][0][4] = 0
4933 11:35:33.874853 rx_firspass[1][0][5] = 0
4934 11:35:33.877650 rx_lastpass[1][0][5] = 0
4935 11:35:33.881170 rx_firspass[1][0][6] = 0
4936 11:35:33.884568 rx_lastpass[1][0][6] = 0
4937 11:35:33.884954 rx_firspass[1][0][7] = 0
4938 11:35:33.887731 rx_lastpass[1][0][7] = 0
4939 11:35:33.891395 rx_firspass[1][0][8] = 0
4940 11:35:33.892028 rx_lastpass[1][0][8] = 0
4941 11:35:33.894220 rx_firspass[1][0][9] = 0
4942 11:35:33.897892 rx_lastpass[1][0][9] = 0
4943 11:35:33.898290 rx_firspass[1][0][10] = 0
4944 11:35:33.901427 rx_lastpass[1][0][10] = 0
4945 11:35:33.904438 rx_firspass[1][0][11] = 0
4946 11:35:33.904841 rx_lastpass[1][0][11] = 0
4947 11:35:33.907725 rx_firspass[1][0][12] = 0
4948 11:35:33.911212 rx_lastpass[1][0][12] = 0
4949 11:35:33.914136 rx_firspass[1][0][13] = 0
4950 11:35:33.914517 rx_lastpass[1][0][13] = 0
4951 11:35:33.917907 rx_firspass[1][0][14] = 0
4952 11:35:33.921196 rx_lastpass[1][0][14] = 0
4953 11:35:33.921662 rx_firspass[1][0][15] = 0
4954 11:35:33.924444 rx_lastpass[1][0][15] = 0
4955 11:35:33.927919 rx_firspass[1][1][0] = 0
4956 11:35:33.931482 rx_lastpass[1][1][0] = 0
4957 11:35:33.931945 rx_firspass[1][1][1] = 0
4958 11:35:33.934760 rx_lastpass[1][1][1] = 0
4959 11:35:33.938064 rx_firspass[1][1][2] = 0
4960 11:35:33.938527 rx_lastpass[1][1][2] = 0
4961 11:35:33.940780 rx_firspass[1][1][3] = 0
4962 11:35:33.944262 rx_lastpass[1][1][3] = 0
4963 11:35:33.944645 rx_firspass[1][1][4] = 0
4964 11:35:33.947767 rx_lastpass[1][1][4] = 0
4965 11:35:33.951130 rx_firspass[1][1][5] = 0
4966 11:35:33.951518 rx_lastpass[1][1][5] = 0
4967 11:35:33.953941 rx_firspass[1][1][6] = 0
4968 11:35:33.957967 rx_lastpass[1][1][6] = 0
4969 11:35:33.961186 rx_firspass[1][1][7] = 0
4970 11:35:33.961577 rx_lastpass[1][1][7] = 0
4971 11:35:33.964501 rx_firspass[1][1][8] = 0
4972 11:35:33.967744 rx_lastpass[1][1][8] = 0
4973 11:35:33.968206 rx_firspass[1][1][9] = 0
4974 11:35:33.971282 rx_lastpass[1][1][9] = 0
4975 11:35:33.973719 rx_firspass[1][1][10] = 0
4976 11:35:33.974103 rx_lastpass[1][1][10] = 0
4977 11:35:33.977319 rx_firspass[1][1][11] = 0
4978 11:35:33.980236 rx_lastpass[1][1][11] = 0
4979 11:35:33.984301 rx_firspass[1][1][12] = 0
4980 11:35:33.984777 rx_lastpass[1][1][12] = 0
4981 11:35:33.987210 rx_firspass[1][1][13] = 0
4982 11:35:33.990529 rx_lastpass[1][1][13] = 0
4983 11:35:33.990997 rx_firspass[1][1][14] = 0
4984 11:35:33.994095 rx_lastpass[1][1][14] = 0
4985 11:35:33.996928 rx_firspass[1][1][15] = 0
4986 11:35:34.000950 rx_lastpass[1][1][15] = 0
4987 11:35:34.001375 dump params clk_delay
4988 11:35:34.003827 clk_delay[0] = 0
4989 11:35:34.004335 clk_delay[1] = 0
4990 11:35:34.007034 dump params dqs_delay
4991 11:35:34.007500 dqs_delay[0][0] = 0
4992 11:35:34.010662 dqs_delay[0][1] = 0
4993 11:35:34.011049 dqs_delay[1][0] = 0
4994 11:35:34.014005 dqs_delay[1][1] = 0
4995 11:35:34.017506 dump params delay_cell_unit = 762
4996 11:35:34.017971 mt_set_emi_preloader end
4997 11:35:34.024153 [mt_mem_init] dram size: 0x100000000, rank number: 2
4998 11:35:34.027368 [complex_mem_test] start addr:0x40000000, len:20480
4999 11:35:34.065532 [mt_mem_init] preloader addr:0x40000000 complex R/W mem test pass : 0
5000 11:35:34.071975 [complex_mem_test] start addr:0x80000000, len:20480
5001 11:35:34.107448 [mt_mem_init] preloader addr:0x80000000 complex R/W mem test pass : 0
5002 11:35:34.114137 [complex_mem_test] start addr:0xc0000000, len:20480
5003 11:35:34.149722 [mt_mem_init] preloader addr:0xc0000000 complex R/W mem test pass : 0
5004 11:35:34.156054 [complex_mem_test] start addr:0x56000000, len:8192
5005 11:35:34.172715 [MEM] 1st complex R/W mem test pass (start addr:0x56000000)
5006 11:35:34.173311 ddr_geometry:1
5007 11:35:34.178912 [complex_mem_test] start addr:0x80000000, len:8192
5008 11:35:34.196858 [MEM] 2nd complex R/W mem test pass (start addr:0x80000000, 0x0 @Rank1)
5009 11:35:34.199534 dram_init: dram init end (result: 0)
5010 11:35:34.206592 Successfully loaded DRAM blobs and ran DRAM calibration
5011 11:35:34.216380 Mapping address range [0000000040000000:0000000140000000) as cacheable | read-write | non-secure | normal
5012 11:35:34.216874 CBMEM:
5013 11:35:34.220003 IMD: root @ 00000000fffff000 254 entries.
5014 11:35:34.223330 IMD: root @ 00000000ffffec00 62 entries.
5015 11:35:34.230367 VBOOT: copying vboot_working_data (256 bytes) to CBMEM...
5016 11:35:34.236431 out: cmd=0xa4: 03 6c a4 00 00 00 0c 00 00 01 00 00 50 7f 11 00 00 00 00 00
5017 11:35:34.239804 in-header: 03 a1 00 00 08 00 00 00
5018 11:35:34.243007 in-data: 84 60 60 10 00 00 00 00
5019 11:35:34.246091 Chrome EC: clear events_b mask to 0x0000000020004000
5020 11:35:34.253387 out: cmd=0xa4: 03 ea a4 00 00 00 0c 00 02 01 00 00 00 40 00 20 00 00 00 00
5021 11:35:34.257501 in-header: 03 fd 00 00 00 00 00 00
5022 11:35:34.257960 in-data:
5023 11:35:34.263698 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5024 11:35:34.264168 CBFS @ 21000 size 3d4000
5025 11:35:34.270738 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5026 11:35:34.274158 CBFS: Locating 'fallback/ramstage'
5027 11:35:34.277867 CBFS: Found @ offset 10d40 size d563
5028 11:35:34.298090 read SPI 0x31d94 0xd547: 16640 us, 3281 KB/s, 26.248 Mbps
5029 11:35:34.310728 Accumulated console time in romstage 12796 ms
5030 11:35:34.311234
5031 11:35:34.311570
5032 11:35:34.321073 coreboot-v1.9308_26_0.0.22-10565-g8487d48179 Sun Jan 30 03:25:20 UTC 2022 ramstage starting (log level: 8)...
5033 11:35:34.323758 ARM64: Exception handlers installed.
5034 11:35:34.324260 ARM64: Testing exception
5035 11:35:34.327236 ARM64: Done test exception
5036 11:35:34.330371 FMAP: area RO_VPD found @ 3f8000 (32768 bytes)
5037 11:35:34.333368 Manufacturer: ef
5038 11:35:34.337302 SF: Detected W25Q64DW with sector size 0x1000, total 0x800000
5039 11:35:34.343508 WARNING: RO_VPD is uninitialized or empty.
5040 11:35:34.347195 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5041 11:35:34.350579 FMAP: area RW_VPD found @ 550000 (16384 bytes)
5042 11:35:34.359677 read SPI 0x550600 0x3a00: 4532 us, 3276 KB/s, 26.208 Mbps
5043 11:35:34.363573 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
5044 11:35:34.370384 BS: BS_DEV_INIT_CHIPS times (ms): entry 0 run 0 exit 0
5045 11:35:34.370879 Enumerating buses...
5046 11:35:34.373801 Show all devs... Before device enumeration.
5047 11:35:34.377072 Root Device: enabled 1
5048 11:35:34.381013 CPU_CLUSTER: 0: enabled 1
5049 11:35:34.381454 CPU: 00: enabled 1
5050 11:35:34.383778 Compare with tree...
5051 11:35:34.384245 Root Device: enabled 1
5052 11:35:34.386990 CPU_CLUSTER: 0: enabled 1
5053 11:35:34.390283 CPU: 00: enabled 1
5054 11:35:34.390752 Root Device scanning...
5055 11:35:34.393912 root_dev_scan_bus for Root Device
5056 11:35:34.397482 CPU_CLUSTER: 0 enabled
5057 11:35:34.400005 root_dev_scan_bus for Root Device done
5058 11:35:34.404515 scan_bus: scanning of bus Root Device took 10689 usecs
5059 11:35:34.407288 done
5060 11:35:34.410532 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 0 exit 0
5061 11:35:34.413613 Allocating resources...
5062 11:35:34.414000 Reading resources...
5063 11:35:34.416856 Root Device read_resources bus 0 link: 0
5064 11:35:34.420452 CPU_CLUSTER: 0 read_resources bus 0 link: 0
5065 11:35:34.423838 CPU: 00 missing read_resources
5066 11:35:34.430146 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
5067 11:35:34.434080 Root Device read_resources bus 0 link: 0 done
5068 11:35:34.434522 Done reading resources.
5069 11:35:34.440033 Show resources in subtree (Root Device)...After reading.
5070 11:35:34.443768 Root Device child on link 0 CPU_CLUSTER: 0
5071 11:35:34.447038 CPU_CLUSTER: 0 child on link 0 CPU: 00
5072 11:35:34.457450 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5073 11:35:34.457963 CPU: 00
5074 11:35:34.460302 Setting resources...
5075 11:35:34.463580 Root Device assign_resources, bus 0 link: 0
5076 11:35:34.467247 CPU_CLUSTER: 0 missing set_resources
5077 11:35:34.469813 Root Device assign_resources, bus 0 link: 0
5078 11:35:34.473551 Done setting resources.
5079 11:35:34.476635 Show resources in subtree (Root Device)...After assigning values.
5080 11:35:34.484375 Root Device child on link 0 CPU_CLUSTER: 0
5081 11:35:34.487218 CPU_CLUSTER: 0 child on link 0 CPU: 00
5082 11:35:34.494013 CPU_CLUSTER: 0 resource base 40000000 size 100000000 align 0 gran 0 limit 0 flags e0004200 index 0
5083 11:35:34.496732 CPU: 00
5084 11:35:34.497248 Done allocating resources.
5085 11:35:34.503463 BS: BS_DEV_RESOURCES times (ms): entry 0 run 0 exit 0
5086 11:35:34.503970 Enabling resources...
5087 11:35:34.506569 done.
5088 11:35:34.509979 BS: BS_DEV_ENABLE times (ms): entry 0 run 0 exit 0
5089 11:35:34.513261 Initializing devices...
5090 11:35:34.513764 Root Device init ...
5091 11:35:34.516651 mainboard_init: Starting display init.
5092 11:35:34.520463 ADC[4]: Raw value=76494 ID=0
5093 11:35:34.542755 anx7625_power_on_init: Init interface.
5094 11:35:34.546263 anx7625_disable_pd_protocol: Disabled PD feature.
5095 11:35:34.552730 anx7625_power_on_init: Firmware: ver 0x13, rev 0x0.
5096 11:35:34.599600 anx7625_start_dp_work: Secure OCM version=00
5097 11:35:34.602800 anx7625_hpd_change_detect: HPD received 0x7e:0x45=0x91
5098 11:35:34.619533 sp_tx_get_edid_block: EDID Block = 1
5099 11:35:34.737504 Extracted contents:
5100 11:35:34.740504 header: 00 ff ff ff ff ff ff 00
5101 11:35:34.744015 serial number: 06 af 5c 14 00 00 00 00 00 1a
5102 11:35:34.747515 version: 01 04
5103 11:35:34.750196 basic params: 95 1a 0e 78 02
5104 11:35:34.753592 chroma info: 99 85 95 55 56 92 28 22 50 54
5105 11:35:34.757285 established: 00 00 00
5106 11:35:34.763606 standard: 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01 01
5107 11:35:34.766710 descriptor 1: ce 1d 56 ea 50 00 1a 30 30 20 46 00 00 90 10 00 00 18
5108 11:35:34.773826 descriptor 2: 00 00 00 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 20
5109 11:35:34.780709 descriptor 3: 00 00 00 fe 00 41 55 4f 0a 20 20 20 20 20 20 20 20 20
5110 11:35:34.786563 descriptor 4: 00 00 00 fe 00 42 31 31 36 58 41 42 30 31 2e 34 20 0a
5111 11:35:34.790253 extensions: 00
5112 11:35:34.790760 checksum: ae
5113 11:35:34.791092
5114 11:35:34.793800 Manufacturer: AUO Model 145c Serial Number 0
5115 11:35:34.796928 Made week 0 of 2016
5116 11:35:34.797481 EDID version: 1.4
5117 11:35:34.800633 Digital display
5118 11:35:34.803371 6 bits per primary color channel
5119 11:35:34.803812 DisplayPort interface
5120 11:35:34.806941 Maximum image size: 26 cm x 14 cm
5121 11:35:34.810154 Gamma: 220%
5122 11:35:34.810581 Check DPMS levels
5123 11:35:34.813968 Supported color formats: RGB 4:4:4
5124 11:35:34.816720 First detailed timing is preferred timing
5125 11:35:34.820221 Established timings supported:
5126 11:35:34.823896 Standard timings supported:
5127 11:35:34.824365 Detailed timings
5128 11:35:34.827491 Hex of detail: ce1d56ea50001a3030204600009010000018
5129 11:35:34.833827 Detailed mode (IN HEX): Clock 76300 KHz, 100 mm x 90 mm
5130 11:35:34.837079 0556 0586 05a6 0640 hborder 0
5131 11:35:34.840490 0300 0304 030a 031a vborder 0
5132 11:35:34.844048 -hsync -vsync
5133 11:35:34.847560 Did detailed timing
5134 11:35:34.850172 Hex of detail: 0000000f0000000000000000000000000020
5135 11:35:34.853696 Manufacturer-specified data, tag 15
5136 11:35:34.856974 Hex of detail: 000000fe0041554f0a202020202020202020
5137 11:35:34.860749 ASCII string: AUO
5138 11:35:34.863746 Hex of detail: 000000fe004231313658414230312e34200a
5139 11:35:34.866640 ASCII string: B116XAB01.4
5140 11:35:34.867068 Checksum
5141 11:35:34.870008 Checksum: 0xae (valid)
5142 11:35:34.877754 get_active_panel: Found ID 1: 'AUO B116XAB01.4 ' 1366x768@0Hz
5143 11:35:34.878224 DSI data_rate: 457800000 bps
5144 11:35:34.884049 anx7625_parse_edid: set default k value to 0x3d for panel
5145 11:35:34.887603 anx7625_parse_edid: pixelclock(76300).
5146 11:35:34.890577 hactive(1366), hsync(32), hfp(48), hbp(154)
5147 11:35:34.893727 vactive(768), vsync(6), vfp(4), vbp(16)
5148 11:35:34.897748 anx7625_dsi_config: config dsi.
5149 11:35:34.905584 anx7625_dsi_video_config: compute M(12500992), N(552960), divider(8).
5150 11:35:34.926262 anx7625_dsi_config: success to config DSI
5151 11:35:34.930106 anx7625_dp_start: MIPI phy setup OK.
5152 11:35:34.933291 [SSUSB] Setting up USB HOST controller...
5153 11:35:34.936652 [SSUSB] u3phy_ports_enable u2p:1, u3p:0
5154 11:35:34.937213 [SSUSB] phy power-on done.
5155 11:35:34.943558 out: cmd=0xf: 03 da 0f 00 00 00 04 00 10 00 00 00
5156 11:35:34.946858 in-header: 03 fc 01 00 00 00 00 00
5157 11:35:34.947285 in-data:
5158 11:35:34.949824 handle_proto3_response: EC response with error code: 1
5159 11:35:34.954107 SPM: pcm index = 1
5160 11:35:34.956670 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5161 11:35:34.960672 CBFS @ 21000 size 3d4000
5162 11:35:34.967747 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5163 11:35:34.970237 CBFS: Locating 'pcm_allinone_lp4_3200.bin'
5164 11:35:34.973722 CBFS: Found @ offset 1e7c0 size 1026
5165 11:35:34.980047 read SPI 0x3f808 0x1026: 1271 us, 3252 KB/s, 26.016 Mbps
5166 11:35:34.983192 SPM: binary array size = 2988
5167 11:35:34.987104 SPM: version = pcm_allinone_v1.17.2_20180829
5168 11:35:34.989721 SPM binary loaded in 32 msecs
5169 11:35:34.997185 spm_kick_im_to_fetch: ptr = 000000004021eec2
5170 11:35:35.000606 spm_kick_im_to_fetch: len = 2988
5171 11:35:35.001113 SPM: spm_kick_pcm_to_run
5172 11:35:35.004387 SPM: spm_kick_pcm_to_run done
5173 11:35:35.007298 SPM: spm_init done in 52 msecs
5174 11:35:35.011407 Root Device init finished in 494998 usecs
5175 11:35:35.013662 CPU_CLUSTER: 0 init ...
5176 11:35:35.024223 Mapping address range [0000000000200000:0000000000280000) as cacheable | read-write | secure | device
5177 11:35:35.028303 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5178 11:35:35.030992 CBFS @ 21000 size 3d4000
5179 11:35:35.034140 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5180 11:35:35.037806 CBFS: Locating 'sspm.bin'
5181 11:35:35.040751 CBFS: Found @ offset 208c0 size 41cb
5182 11:35:35.050736 read SPI 0x418f8 0x41cb: 5142 us, 3275 KB/s, 26.200 Mbps
5183 11:35:35.058874 CPU_CLUSTER: 0 init finished in 42801 usecs
5184 11:35:35.059416 Devices initialized
5185 11:35:35.061984 Show all devs... After init.
5186 11:35:35.065323 Root Device: enabled 1
5187 11:35:35.065823 CPU_CLUSTER: 0: enabled 1
5188 11:35:35.068307 CPU: 00: enabled 1
5189 11:35:35.071638 BS: BS_DEV_INIT times (ms): entry 0 run 224 exit 0
5190 11:35:35.075032 FMAP: area RW_ELOG found @ 558000 (4096 bytes)
5191 11:35:35.078235 ELOG: NV offset 0x558000 size 0x1000
5192 11:35:35.086286 read SPI 0x558000 0x1000: 1259 us, 3253 KB/s, 26.024 Mbps
5193 11:35:35.092784 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
5194 11:35:35.095845 ELOG: Event(17) added with size 13 at 2024-07-17 11:35:34 UTC
5195 11:35:35.099368 out: cmd=0x121: 03 db 21 01 00 00 00 00
5196 11:35:35.103148 in-header: 03 12 00 00 2c 00 00 00
5197 11:35:35.116093 in-data: f5 47 00 00 00 00 00 00 02 10 00 00 06 80 00 00 cf c7 07 00 06 80 00 00 18 99 35 00 06 80 00 00 af c3 00 00 06 80 00 00 62 00 02 00
5198 11:35:35.119512 out: cmd=0xd: 03 f0 0d 00 00 00 00 00
5199 11:35:35.122958 in-header: 03 19 00 00 08 00 00 00
5200 11:35:35.126654 in-data: a2 e0 47 00 13 00 00 00
5201 11:35:35.129683 Chrome EC: UHEPI supported
5202 11:35:35.136497 out: cmd=0xa4: 03 54 a4 00 00 00 0c 00 00 01 00 00 f8 ff 01 00 00 00 00 00
5203 11:35:35.139846 in-header: 03 e1 00 00 08 00 00 00
5204 11:35:35.142995 in-data: 84 20 60 10 00 00 00 00
5205 11:35:35.146521 FMAP: area RW_NVRAM found @ 554000 (8192 bytes)
5206 11:35:35.152995 out: cmd=0xa4: 03 c9 a4 00 00 00 0c 00 00 01 00 00 00 20 23 40 00 00 00 00
5207 11:35:35.156120 in-header: 03 e1 00 00 08 00 00 00
5208 11:35:35.160103 in-data: 84 20 60 10 00 00 00 00
5209 11:35:35.166317 ELOG: Event(A1) added with size 10 at 2024-07-17 11:35:34 UTC
5210 11:35:35.173709 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x02
5211 11:35:35.176388 ELOG: Event(A0) added with size 9 at 2024-07-17 11:35:34 UTC
5212 11:35:35.179289 elog_add_boot_reason: Logged dev mode boot
5213 11:35:35.183212 Finalize devices...
5214 11:35:35.183613 Devices finalized
5215 11:35:35.189367 BS: BS_POST_DEVICE times (ms): entry 3 run 0 exit 0
5216 11:35:35.192896 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
5217 11:35:35.199597 ELOG: Event(91) added with size 10 at 2024-07-17 11:35:34 UTC
5218 11:35:35.202881 Writing coreboot table at 0xffeda000
5219 11:35:35.205861 0. 0000000000114000-000000000011efff: RAMSTAGE
5220 11:35:35.213468 1. 0000000040000000-000000004023cfff: RAMSTAGE
5221 11:35:35.215908 2. 000000004023d000-00000000545fffff: RAM
5222 11:35:35.219764 3. 0000000054600000-000000005465ffff: BL31
5223 11:35:35.222683 4. 0000000054660000-00000000ffed9fff: RAM
5224 11:35:35.229233 5. 00000000ffeda000-00000000ffffffff: CONFIGURATION TABLES
5225 11:35:35.232776 6. 0000000100000000-000000013fffffff: RAM
5226 11:35:35.233301 Passing 5 GPIOs to payload:
5227 11:35:35.239326 NAME | PORT | POLARITY | VALUE
5228 11:35:35.242400 write protect | 0x00000096 | low | high
5229 11:35:35.249245 EC in RW | 0x000000b1 | high | undefined
5230 11:35:35.252204 EC interrupt | 0x00000097 | low | undefined
5231 11:35:35.255445 TPM interrupt | 0x00000099 | high | undefined
5232 11:35:35.262657 speaker enable | 0x000000af | high | undefined
5233 11:35:35.265598 out: cmd=0x6: 03 f7 06 00 00 00 00 00
5234 11:35:35.269304 in-header: 03 f7 00 00 02 00 00 00
5235 11:35:35.269563 in-data: 04 00
5236 11:35:35.272680 Board ID: 4
5237 11:35:35.275804 ADC[3]: Raw value=1034629 ID=8
5238 11:35:35.276085 RAM code: 8
5239 11:35:35.276266 SKU ID: 16
5240 11:35:35.282413 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5241 11:35:35.282621 CBFS @ 21000 size 3d4000
5242 11:35:35.288886 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5243 11:35:35.295480 Wrote coreboot table at: 00000000ffeda000, 0x394 bytes, checksum 3ae3
5244 11:35:35.295705 coreboot table: 940 bytes.
5245 11:35:35.299389 IMD ROOT 0. 00000000fffff000 00001000
5246 11:35:35.305335 IMD SMALL 1. 00000000ffffe000 00001000
5247 11:35:35.308624 CONSOLE 2. 00000000fffde000 00020000
5248 11:35:35.312407 FMAP 3. 00000000fffdd000 0000047c
5249 11:35:35.315756 TIME STAMP 4. 00000000fffdc000 00000910
5250 11:35:35.319096 RAMOOPS 5. 00000000ffedc000 00100000
5251 11:35:35.322694 COREBOOT 6. 00000000ffeda000 00002000
5252 11:35:35.323146 IMD small region:
5253 11:35:35.329169 IMD ROOT 0. 00000000ffffec00 00000400
5254 11:35:35.332458 VBOOT WORK 1. 00000000ffffeb00 00000100
5255 11:35:35.336021 EC HOSTEVENT 2. 00000000ffffeae0 00000008
5256 11:35:35.338877 VPD 3. 00000000ffffea60 0000006c
5257 11:35:35.342916 BS: BS_WRITE_TABLES times (ms): entry 0 run 0 exit 0
5258 11:35:35.349452 out: cmd=0xa4: 03 95 a4 00 00 00 0c 00 00 01 00 00 24 32 21 40 00 00 00 00
5259 11:35:35.353100 in-header: 03 e1 00 00 08 00 00 00
5260 11:35:35.356158 in-data: 84 20 60 10 00 00 00 00
5261 11:35:35.362712 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5262 11:35:35.363212 CBFS @ 21000 size 3d4000
5263 11:35:35.369265 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5264 11:35:35.372624 CBFS: Locating 'fallback/payload'
5265 11:35:35.380357 CBFS: Found @ offset dc040 size 439a0
5266 11:35:35.468032 read SPI 0xfd078 0x439a0: 84379 us, 3281 KB/s, 26.248 Mbps
5267 11:35:35.471535 Checking segment from ROM address 0x0000000040003a00
5268 11:35:35.478196 Checking segment from ROM address 0x0000000040003a1c
5269 11:35:35.480942 Loading segment from ROM address 0x0000000040003a00
5270 11:35:35.484771 code (compression=0)
5271 11:35:35.494939 New segment dstaddr 0x0000000080000000 memsize 0x11994a0 srcaddr 0x0000000040003a38 filesize 0x43968
5272 11:35:35.501176 Loading Segment: addr: 0x0000000080000000 memsz: 0x00000000011994a0 filesz: 0x0000000000043968
5273 11:35:35.504549 it's not compressed!
5274 11:35:35.507872 [ 0x80000000, 80043968, 0x811994a0) <- 40003a38
5275 11:35:35.514784 Clearing Segment: addr: 0x0000000080043968 memsz: 0x0000000001155b38
5276 11:35:35.522310 Loading segment from ROM address 0x0000000040003a1c
5277 11:35:35.525519 Entry Point 0x0000000080000000
5278 11:35:35.525979 Loaded segments
5279 11:35:35.532287 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 92 exit 0
5280 11:35:35.535638 Jumping to boot code at 0000000080000000(00000000ffeda000)
5281 11:35:35.545890 CPU0: stack: 0000000000114000 - 0000000000118000, lowest used address 0000000000117540, stack used: 2752 bytes
5282 11:35:35.548841 FMAP: area COREBOOT found @ 21000 (4014080 bytes)
5283 11:35:35.552023 CBFS @ 21000 size 3d4000
5284 11:35:35.559125 CBFS: 'Master Header Locator' located CBFS at [21000:3f5000)
5285 11:35:35.562242 CBFS: Locating 'fallback/bl31'
5286 11:35:35.565741 CBFS: Found @ offset 36dc0 size 5820
5287 11:35:35.576766 read SPI 0x57de8 0x5820: 6880 us, 3279 KB/s, 26.232 Mbps
5288 11:35:35.579949 Checking segment from ROM address 0x0000000040003a00
5289 11:35:35.586340 Checking segment from ROM address 0x0000000040003a1c
5290 11:35:35.589088 Loading segment from ROM address 0x0000000040003a00
5291 11:35:35.592530 code (compression=1)
5292 11:35:35.599662 New segment dstaddr 0x0000000054600000 memsize 0x29000 srcaddr 0x0000000040003a38 filesize 0x57e8
5293 11:35:35.609433 Loading Segment: addr: 0x0000000054600000 memsz: 0x0000000000029000 filesz: 0x00000000000057e8
5294 11:35:35.609898 using LZMA
5295 11:35:35.618375 [ 0x54600000, 5460f420, 0x54629000) <- 40003a38
5296 11:35:35.624768 Clearing Segment: addr: 0x000000005460f420 memsz: 0x0000000000019be0
5297 11:35:35.628462 Loading segment from ROM address 0x0000000040003a1c
5298 11:35:35.632086 Entry Point 0x0000000054601000
5299 11:35:35.632550 Loaded segments
5300 11:35:35.635094 NOTICE: MT8183 bl31_setup
5301 11:35:35.641866 NOTICE: BL31: v2.1(debug):v2.1-806-g3addeb68c
5302 11:35:35.645438 NOTICE: BL31: Built : Sun Jan 30 03:25:20 UTC 2022
5303 11:35:35.649181 INFO: [DEVAPC] dump DEVAPC registers:
5304 11:35:35.658729 INFO: [DEVAPC] (INFRA)D0_APC_0 = 0x0, (INFRA)D1_APC_0 = 0xfcfffffc, (INFRA)D2_APC_0 = 0x0
5305 11:35:35.665349 INFO: [DEVAPC] (INFRA)D0_APC_1 = 0x0, (INFRA)D1_APC_1 = 0xffffffff, (INFRA)D2_APC_1 = 0x0
5306 11:35:35.676022 INFO: [DEVAPC] (INFRA)D0_APC_2 = 0x0, (INFRA)D1_APC_2 = 0xffffffff, (INFRA)D2_APC_2 = 0x0
5307 11:35:35.681637 INFO: [DEVAPC] (INFRA)D0_APC_3 = 0x0, (INFRA)D1_APC_3 = 0xffffffff, (INFRA)D2_APC_3 = 0x0
5308 11:35:35.691796 INFO: [DEVAPC] (INFRA)D0_APC_4 = 0x80000000, (INFRA)D1_APC_4 = 0xffffffff, (INFRA)D2_APC_4 = 0x0
5309 11:35:35.698273 INFO: [DEVAPC] (INFRA)D0_APC_5 = 0x2aaa, (INFRA)D1_APC_5 = 0xfcff3fff, (INFRA)D2_APC_5 = 0x0
5310 11:35:35.708239 INFO: [DEVAPC] (INFRA)D0_APC_6 = 0x0, (INFRA)D1_APC_6 = 0xffffffff, (INFRA)D2_APC_6 = 0x0
5311 11:35:35.714856 INFO: [DEVAPC] (INFRA)D0_APC_7 = 0x0, (INFRA)D1_APC_7 = 0xffffffff, (INFRA)D2_APC_7 = 0x0
5312 11:35:35.721879 INFO: [DEVAPC] (INFRA)D0_APC_8 = 0x0, (INFRA)D1_APC_8 = 0xffffffff, (INFRA)D2_APC_8 = 0x0
5313 11:35:35.731645 INFO: [DEVAPC] (INFRA)D0_APC_9 = 0x0, (INFRA)D1_APC_9 = 0xffffffff, (INFRA)D2_APC_9 = 0x0
5314 11:35:35.738765 INFO: [DEVAPC] (INFRA)D0_APC_10 = 0x0, (INFRA)D1_APC_10 = 0xffffffff, (INFRA)D2_APC_10 = 0x0
5315 11:35:35.749292 INFO: [DEVAPC] (INFRA)D0_APC_11 = 0x0, (INFRA)D1_APC_11 = 0xffffffff, (INFRA)D2_APC_11 = 0x0
5316 11:35:35.755031 INFO: [DEVAPC] (INFRA)D0_APC_12 = 0x0, (INFRA)D1_APC_12 = 0xff, (INFRA)D2_APC_12 = 0x0
5317 11:35:35.765109 INFO: [DEVAPC] (MM)D0_APC_0 = 0x0, (MM)D1_APC_0 = 0xffc000ff, (MM)D2_APC_0 = 0x0
5318 11:35:35.771509 INFO: [DEVAPC] (MM)D0_APC_1 = 0x0, (MM)D1_APC_1 = 0x3fffffff, (MM)D2_APC_1 = 0x0
5319 11:35:35.777861 INFO: [DEVAPC] (MM)D0_APC_2 = 0x0, (MM)D1_APC_2 = 0xcffff33c, (MM)D2_APC_2 = 0x0
5320 11:35:35.784674 INFO: [DEVAPC] (MM)D0_APC_3 = 0x0, (MM)D1_APC_3 = 0x3ccfc0ff, (MM)D2_APC_3 = 0x0
5321 11:35:35.791218 INFO: [DEVAPC] (MM)D0_APC_4 = 0x0, (MM)D1_APC_4 = 0xffff0000, (MM)D2_APC_4 = 0x0
5322 11:35:35.800977 INFO: [DEVAPC] (MM)D0_APC_5 = 0x0, (MM)D1_APC_5 = 0xffffffff, (MM)D2_APC_5 = 0x0
5323 11:35:35.808266 INFO: [DEVAPC] (MM)D0_APC_6 = 0x0, (MM)D1_APC_6 = 0xffffffff, (MM)D2_APC_6 = 0x0
5324 11:35:35.814527 INFO: [DEVAPC] (MM)D0_APC_7 = 0x0, (MM)D1_APC_7 = 0xffffffff, (MM)D2_APC_7 = 0x0
5325 11:35:35.821035 INFO: [DEVAPC] (MM)D0_APC_8 = 0x0, (MM)D1_APC_8 = 0x3ffffff, (MM)D2_APC_8 = 0x0
5326 11:35:35.824940 INFO: [DEVAPC] MAS_DOM_0 = 0x1
5327 11:35:35.828187 INFO: [DEVAPC] MAS_DOM_1 = 0x200
5328 11:35:35.831382 INFO: [DEVAPC] MAS_DOM_2 = 0x0
5329 11:35:35.834668 INFO: [DEVAPC] MAS_DOM_3 = 0x2000
5330 11:35:35.837740 INFO: [DEVAPC] MAS_SEC_0 = 0x8000000
5331 11:35:35.844801 INFO: [DEVAPC] (INFRA)MAS_DOMAIN_REMAP_0 = 0x88, (INFRA)MAS_DOMAIN_REMAP_1 = 0x0
5332 11:35:35.848112 INFO: [DEVAPC] (MM)MAS_DOMAIN_REMAP_0 = 0x24
5333 11:35:35.851604 WARNING: region 0:
5334 11:35:35.855078 WARNING: apc:0x168, sa:0x0, ea:0xfff
5335 11:35:35.857775 WARNING: region 1:
5336 11:35:35.861355 WARNING: apc:0x140, sa:0x1000, ea:0x128f
5337 11:35:35.861823 WARNING: region 2:
5338 11:35:35.864827 WARNING: apc:0x168, sa:0x1290, ea:0x1fff
5339 11:35:35.868154 WARNING: region 3:
5340 11:35:35.871385 WARNING: apc:0x168, sa:0x2000, ea:0xbfff
5341 11:35:35.871766 WARNING: region 4:
5342 11:35:35.879021 WARNING: apc:0x168, sa:0xc000, ea:0x1ffff
5343 11:35:35.879495 WARNING: region 5:
5344 11:35:35.881108 WARNING: apc:0x0, sa:0x0, ea:0x0
5345 11:35:35.885423 WARNING: region 6:
5346 11:35:35.885829 WARNING: apc:0x0, sa:0x0, ea:0x0
5347 11:35:35.887723 WARNING: region 7:
5348 11:35:35.891665 WARNING: apc:0x0, sa:0x0, ea:0x0
5349 11:35:35.897623 INFO: GICv3 without legacy support detected. ARM GICv3 driver initialized in EL3
5350 11:35:35.901273 INFO: SPM: enable SPMC mode
5351 11:35:35.904614 NOTICE: spm_boot_init() start
5352 11:35:35.904997 NOTICE: spm_boot_init() end
5353 11:35:35.911436 INFO: BL31: Initializing runtime services
5354 11:35:35.914724 INFO: BL31: cortex_a53: CPU workaround for 855873 was applied
5355 11:35:35.921564 INFO: BL31: Preparing for EL3 exit to normal world
5356 11:35:35.924547 INFO: Entry point address = 0x80000000
5357 11:35:35.927580 INFO: SPSR = 0x8
5358 11:35:35.948409
5359 11:35:35.948909
5360 11:35:35.949295
5361 11:35:35.951040 end: 2.2.3 depthcharge-start (duration 00:00:24) [common]
5362 11:35:35.951635 start: 2.2.4 bootloader-commands (timeout 00:04:27) [common]
5363 11:35:35.952088 Setting prompt string to ['jacuzzi:']
5364 11:35:35.952458 bootloader-commands: Wait for prompt ['jacuzzi:'] (timeout 00:04:27)
5365 11:35:35.953089 Starting depthcharge on Juniper...
5366 11:35:35.953483
5367 11:35:35.955525 vboot_handoff: creating legacy vboot_handoff structure
5368 11:35:35.956064
5369 11:35:35.958535 ec_init(0): CrosEC protocol v3 supported (544, 544)
5370 11:35:35.959033
5371 11:35:35.961485 Wipe memory regions:
5372 11:35:35.961907
5373 11:35:35.965098 [0x00000040000000, 0x00000054600000)
5374 11:35:36.008276
5375 11:35:36.008846 [0x00000054660000, 0x00000080000000)
5376 11:35:36.099061
5377 11:35:36.099561 [0x000000811994a0, 0x000000ffeda000)
5378 11:35:36.358689
5379 11:35:36.359164 [0x00000100000000, 0x00000140000000)
5380 11:35:36.490846
5381 11:35:36.493785 Initializing XHCI USB controller at 0x11200000.
5382 11:35:36.517237
5383 11:35:36.520592 [firmware-jacuzzi-12573.B-collabora] Jun 8 2022 08:18:54
5384 11:35:36.521100
5385 11:35:36.521456
5386 11:35:36.522115 Setting prompt string to ['jacuzzi:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5387 11:35:36.522489 Sending line: 'tftpboot 192.168.201.1 14864610/tftp-deploy-970h3d48/kernel/image.itb 14864610/tftp-deploy-970h3d48/kernel/cmdline '
5389 11:35:36.624250 Setting prompt string to ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5390 11:35:36.624744 bootloader-commands: Wait for prompt ['jumping to kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:27)
5391 11:35:36.629299 jacuzzi: tftpboot 192.168.201.1 14864610/tftp-deploy-970h3d48/kernel/image.ittp-deploy-970h3d48/kernel/cmdline
5392 11:35:36.629762
5393 11:35:36.630092 Waiting for link
5394 11:35:37.030754
5395 11:35:37.031178 R8152: Initializing
5396 11:35:37.031474
5397 11:35:37.034294 Version 9 (ocp_data = 6010)
5398 11:35:37.034741
5399 11:35:37.037374 R8152: Done initializing
5400 11:35:37.037750
5401 11:35:37.038041 Adding net device
5402 11:35:37.423323
5403 11:35:37.423745 done.
5404 11:35:37.424216
5405 11:35:37.424768 MAC: 00:e0:4c:71:a7:1f
5406 11:35:37.425347
5407 11:35:37.426345 Sending DHCP discover... done.
5408 11:35:37.426722
5409 11:35:37.429594 Waiting for reply... done.
5410 11:35:37.429973
5411 11:35:37.432848 Sending DHCP request... done.
5412 11:35:37.433266
5413 11:35:37.436614 Waiting for reply... done.
5414 11:35:37.437048
5415 11:35:37.437408 My ip is 192.168.201.23
5416 11:35:37.437692
5417 11:35:37.440825 The DHCP server ip is 192.168.201.1
5418 11:35:37.441302
5419 11:35:37.446540 TFTP server IP predefined by user: 192.168.201.1
5420 11:35:37.446927
5421 11:35:37.453200 Bootfile predefined by user: 14864610/tftp-deploy-970h3d48/kernel/image.itb
5422 11:35:37.453590
5423 11:35:37.453938 Sending tftp read request... done.
5424 11:35:37.456594
5425 11:35:37.463425 Waiting for the transfer...
5426 11:35:37.463818
5427 11:35:37.771641 00000000 ################################################################
5428 11:35:37.771753
5429 11:35:38.050688 00080000 ################################################################
5430 11:35:38.050811
5431 11:35:38.304390 00100000 ################################################################
5432 11:35:38.304514
5433 11:35:38.549965 00180000 ################################################################
5434 11:35:38.550096
5435 11:35:38.807931 00200000 ################################################################
5436 11:35:38.808055
5437 11:35:39.071436 00280000 ################################################################
5438 11:35:39.071549
5439 11:35:39.339517 00300000 ################################################################
5440 11:35:39.339628
5441 11:35:39.593292 00380000 ################################################################
5442 11:35:39.593407
5443 11:35:39.870248 00400000 ################################################################
5444 11:35:39.870376
5445 11:35:40.155312 00480000 ################################################################
5446 11:35:40.155431
5447 11:35:40.450367 00500000 ################################################################
5448 11:35:40.450489
5449 11:35:40.741369 00580000 ################################################################
5450 11:35:40.741490
5451 11:35:41.027340 00600000 ################################################################
5452 11:35:41.027456
5453 11:35:41.318168 00680000 ################################################################
5454 11:35:41.318285
5455 11:35:41.727399 00700000 ################################################################
5456 11:35:41.727851
5457 11:35:42.124619 00780000 ################################################################
5458 11:35:42.125087
5459 11:35:42.507360 00800000 ################################################################
5460 11:35:42.507817
5461 11:35:42.917822 00880000 ################################################################
5462 11:35:42.918274
5463 11:35:43.342499 00900000 ################################################################
5464 11:35:43.342956
5465 11:35:43.747919 00980000 ################################################################
5466 11:35:43.748394
5467 11:35:44.137107 00a00000 ################################################################
5468 11:35:44.137643
5469 11:35:44.529477 00a80000 ################################################################
5470 11:35:44.529620
5471 11:35:44.795983 00b00000 ################################################################
5472 11:35:44.796103
5473 11:35:45.068712 00b80000 ################################################################
5474 11:35:45.068852
5475 11:35:45.321729 00c00000 ################################################################
5476 11:35:45.321835
5477 11:35:45.576716 00c80000 ################################################################
5478 11:35:45.576844
5479 11:35:45.849442 00d00000 ################################################################
5480 11:35:45.849561
5481 11:35:46.138926 00d80000 ################################################################
5482 11:35:46.139068
5483 11:35:46.408849 00e00000 ################################################################
5484 11:35:46.408956
5485 11:35:46.665664 00e80000 ################################################################
5486 11:35:46.665776
5487 11:35:46.954355 00f00000 ################################################################
5488 11:35:46.954472
5489 11:35:47.233041 00f80000 ################################################################
5490 11:35:47.233171
5491 11:35:47.486592 01000000 ################################################################
5492 11:35:47.486707
5493 11:35:47.768652 01080000 ################################################################
5494 11:35:47.768769
5495 11:35:48.027403 01100000 ################################################################
5496 11:35:48.027520
5497 11:35:48.289192 01180000 ################################################################
5498 11:35:48.289325
5499 11:35:48.546937 01200000 ################################################################
5500 11:35:48.547052
5501 11:35:48.808195 01280000 ################################################################
5502 11:35:48.808314
5503 11:35:49.056426 01300000 ################################################################
5504 11:35:49.056546
5505 11:35:49.304848 01380000 ################################################################
5506 11:35:49.304967
5507 11:35:49.556346 01400000 ################################################################
5508 11:35:49.556466
5509 11:35:49.809402 01480000 ################################################################
5510 11:35:49.809527
5511 11:35:50.060624 01500000 ################################################################
5512 11:35:50.060741
5513 11:35:50.310575 01580000 ################################################################
5514 11:35:50.310694
5515 11:35:50.561025 01600000 ################################################################
5516 11:35:50.561151
5517 11:35:50.814095 01680000 ################################################################
5518 11:35:50.814211
5519 11:35:51.075833 01700000 ################################################################
5520 11:35:51.075967
5521 11:35:51.327477 01780000 ################################################################
5522 11:35:51.327621
5523 11:35:51.576960 01800000 ################################################################
5524 11:35:51.577080
5525 11:35:51.831143 01880000 ################################################################
5526 11:35:51.831263
5527 11:35:52.085125 01900000 ################################################################
5528 11:35:52.085263
5529 11:35:52.340622 01980000 ################################################################
5530 11:35:52.340743
5531 11:35:52.596727 01a00000 ################################################################
5532 11:35:52.596847
5533 11:35:52.854605 01a80000 ################################################################
5534 11:35:52.854721
5535 11:35:53.112121 01b00000 ################################################################
5536 11:35:53.112239
5537 11:35:53.366302 01b80000 ################################################################
5538 11:35:53.366428
5539 11:35:53.615940 01c00000 ################################################################
5540 11:35:53.616090
5541 11:35:53.859825 01c80000 ################################################################
5542 11:35:53.859941
5543 11:35:54.109286 01d00000 ################################################################
5544 11:35:54.109416
5545 11:35:54.354734 01d80000 ################################################################
5546 11:35:54.354856
5547 11:35:54.565431 01e00000 ####################################################### done.
5548 11:35:54.565545
5549 11:35:54.568802 The bootfile was 31900114 bytes long.
5550 11:35:54.568881
5551 11:35:54.572276 Sending tftp read request... done.
5552 11:35:54.572362
5553 11:35:54.572439 Waiting for the transfer...
5554 11:35:54.572510
5555 11:35:54.575892 00000000 # done.
5556 11:35:54.575970
5557 11:35:54.582563 Command line loaded dynamically from TFTP file: 14864610/tftp-deploy-970h3d48/kernel/cmdline
5558 11:35:54.582641
5559 11:35:54.609258 The command line is: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14864610/extract-nfsrootfs-lfr77svd,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5560 11:35:54.609341
5561 11:35:54.609417 Loading FIT.
5562 11:35:54.609488
5563 11:35:54.612729 Image ramdisk-1 has 18722081 bytes.
5564 11:35:54.612805
5565 11:35:54.615853 Image fdt-1 has 57695 bytes.
5566 11:35:54.615929
5567 11:35:54.619687 Image kernel-1 has 13118294 bytes.
5568 11:35:54.619764
5569 11:35:54.628795 Compat preference: google,juniper-rev4-sku16 google,juniper-sku16 google,juniper-rev4 google,juniper
5570 11:35:54.628877
5571 11:35:54.638881 Config conf-1 (default), kernel kernel-1, fdt fdt-1, ramdisk ramdisk-1, compat google,juniper-sku16 (match) google,juniper mediatek,mt8183
5572 11:35:54.638959
5573 11:35:54.645551 Choosing best match conf-1 for compat google,juniper-sku16.
5574 11:35:54.649358
5575 11:35:54.713784 Connected to device vid:did:rid of 1ae0:0028:00
5576 11:35:54.723231
5577 11:35:54.726656 tpm_get_response: command 0x17b, return code 0x0
5578 11:35:54.726733
5579 11:35:54.729927 tpm_cleanup: add release locality here.
5580 11:35:54.730003
5581 11:35:54.733722 Shutting down all USB controllers.
5582 11:35:54.733799
5583 11:35:54.736850 Removing current net device
5584 11:35:54.736948
5585 11:35:54.739722 Exiting depthcharge with code 4 at timestamp: 35138051
5586 11:35:54.739814
5587 11:35:54.743370 LZMA decompressing kernel-1 to 0x80193568
5588 11:35:54.743447
5589 11:35:54.749854 LZMA decompressing kernel-1 to 0x40000000
5590 11:35:56.612274
5591 11:35:56.612389 jumping to kernel
5592 11:35:56.613054 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
5593 11:35:56.613220 start: 2.2.5 auto-login-action (timeout 00:04:07) [common]
5594 11:35:56.613316 Setting prompt string to ['Linux version [0-9]']
5595 11:35:56.613407 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
5596 11:35:56.613505 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
5597 11:35:56.687549
5598 11:35:56.690678 [ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
5599 11:35:56.694126 start: 2.2.5.1 login-action (timeout 00:04:07) [common]
5600 11:35:56.694220 The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
5601 11:35:56.694294 Setting prompt string to []
5602 11:35:56.694383 Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
5603 11:35:56.694459 Using line separator: #'\n'#
5604 11:35:56.694522 No login prompt set.
5605 11:35:56.694594 Parsing kernel messages
5606 11:35:56.694657 ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
5607 11:35:56.694825 [login-action] Waiting for messages, (timeout 00:04:07)
5608 11:35:56.694922 Waiting using forced prompt support (timeout 00:02:03)
5609 11:35:56.713741 [ 0.000000] Linux version 6.1.96-cip24 (KernelCI@build-j270465-arm64-gcc-12-defconfig-arm64-chromebook-hjsv4) (aarch64-linux-gnu-gcc (Debian 12.2.0-14) 12.2.0, GNU ld (GNU Binutils for Debian) 2.40) #1 SMP PREEMPT Wed Jul 17 11:18:13 UTC 2024
5610 11:35:56.717012 [ 0.000000] random: crng init done
5611 11:35:56.720407 [ 0.000000] Machine model: Google juniper sku16 board
5612 11:35:56.723976 [ 0.000000] efi: UEFI not found.
5613 11:35:56.734218 [ 0.000000] Reserved memory: created DMA memory pool at 0x0000000050000000, size 41 MiB
5614 11:35:56.740145 [ 0.000000] OF: reserved mem: initialized node memory@50000000, compatible id shared-dma-pool
5615 11:35:56.746988 [ 0.000000] earlycon: mtk8250 at MMIO32 0x0000000011002000 (options '115200n8')
5616 11:35:56.753547 [ 0.000000] printk: bootconsole [mtk8250] enabled
5617 11:35:56.761097 [ 0.000000] NUMA: No NUMA configuration found
5618 11:35:56.767759 [ 0.000000] NUMA: Faking a node at [mem 0x0000000040000000-0x000000013fffffff]
5619 11:35:56.774460 [ 0.000000] NUMA: NODE_DATA [mem 0x13f7bea00-0x13f7c0fff]
5620 11:35:56.774536 [ 0.000000] Zone ranges:
5621 11:35:56.780686 [ 0.000000] DMA [mem 0x0000000040000000-0x00000000ffffffff]
5622 11:35:56.784155 [ 0.000000] DMA32 empty
5623 11:35:56.791375 [ 0.000000] Normal [mem 0x0000000100000000-0x000000013fffffff]
5624 11:35:56.794434 [ 0.000000] Movable zone start for each node
5625 11:35:56.797242 [ 0.000000] Early memory node ranges
5626 11:35:56.804205 [ 0.000000] node 0: [mem 0x0000000040000000-0x000000004fffffff]
5627 11:35:56.810810 [ 0.000000] node 0: [mem 0x0000000050000000-0x00000000528fffff]
5628 11:35:56.817409 [ 0.000000] node 0: [mem 0x0000000052900000-0x00000000545fffff]
5629 11:35:56.823855 [ 0.000000] node 0: [mem 0x0000000054700000-0x00000000ffdfffff]
5630 11:35:56.831136 [ 0.000000] node 0: [mem 0x0000000100000000-0x000000013fffffff]
5631 11:35:56.837548 [ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000013fffffff]
5632 11:35:56.858014 [ 0.000000] On node 0, zone DMA: 256 pages in unavailable ranges
5633 11:35:56.864403 [ 0.000000] On node 0, zone Normal: 512 pages in unavailable ranges
5634 11:35:56.871140 [ 0.000000] cma: Reserved 32 MiB at 0x00000000fde00000
5635 11:35:56.874587 [ 0.000000] psci: probing for conduit method from DT.
5636 11:35:56.881241 [ 0.000000] psci: PSCIv1.1 detected in firmware.
5637 11:35:56.884541 [ 0.000000] psci: Using standard PSCI v0.2 function IDs
5638 11:35:56.890966 [ 0.000000] psci: MIGRATE_INFO_TYPE not supported.
5639 11:35:56.894279 [ 0.000000] psci: SMC Calling Convention v1.1
5640 11:35:56.901299 [ 0.000000] percpu: Embedded 21 pages/cpu s48296 r8192 d29528 u86016
5641 11:35:56.904387 [ 0.000000] Detected VIPT I-cache on CPU0
5642 11:35:56.911440 [ 0.000000] CPU features: detected: GIC system register CPU interface
5643 11:35:56.917946 [ 0.000000] CPU features: kernel page table isolation forced ON by KASLR
5644 11:35:56.924108 [ 0.000000] CPU features: detected: Kernel page table isolation (KPTI)
5645 11:35:56.927704 [ 0.000000] CPU features: detected: ARM erratum 845719
5646 11:35:56.934632 [ 0.000000] alternatives: applying boot alternatives
5647 11:35:56.937587 [ 0.000000] Fallback order for Node 0: 0
5648 11:35:56.944107 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 1031424
5649 11:35:56.947400 [ 0.000000] Policy zone: Normal
5650 11:35:56.974106 [ 0.000000] Kernel command line: earlyprintk=ttyS0,115200n8 console=tty1 console_msg_format=syslog earlycon deferred_probe_timeout=60 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/14864610/extract-nfsrootfs-lfr77svd,tcp,hard,v3 ip=dhcp tftpserverip=192.168.201.1
5651 11:35:56.987582 <5>[ 0.000000] Unknown kernel command line parameters "earlyprintk=ttyS0,115200n8 tftpserverip=192.168.201.1", will be passed to user space.
5652 11:35:56.997979 <6>[ 0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes, linear)
5653 11:35:57.004562 <6>[ 0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes, linear)
5654 11:35:57.010869 <6>[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
5655 11:35:57.017470 <6>[ 0.000000] software IO TLB: area num 8.
5656 11:35:57.041365 <6>[ 0.000000] software IO TLB: mapped [mem 0x00000000f9e00000-0x00000000fde00000] (64MB)
5657 11:35:57.099751 <6>[ 0.000000] Memory: 3896788K/4191232K available (18112K kernel code, 4120K rwdata, 22640K rodata, 8512K init, 615K bss, 261676K reserved, 32768K cma-reserved)
5658 11:35:57.106745 <6>[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=8, Nodes=1
5659 11:35:57.112966 <6>[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
5660 11:35:57.116003 <6>[ 0.000000] rcu: RCU event tracing is enabled.
5661 11:35:57.123041 <6>[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=256 to nr_cpu_ids=8.
5662 11:35:57.129389 <6>[ 0.000000] Trampoline variant of Tasks RCU enabled.
5663 11:35:57.132932 <6>[ 0.000000] Tracing variant of Tasks RCU enabled.
5664 11:35:57.142666 <6>[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.
5665 11:35:57.149551 <6>[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=8
5666 11:35:57.152890 <6>[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
5667 11:35:57.165011 <6>[ 0.000000] GIC: enabling workaround for GICv3: Mediatek Chromebook GICR save problem
5668 11:35:57.171341 <6>[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
5669 11:35:57.175095 <6>[ 0.000000] GICv3: 640 SPIs implemented
5670 11:35:57.178042 <6>[ 0.000000] GICv3: 0 Extended SPIs implemented
5671 11:35:57.184643 <6>[ 0.000000] Root IRQ handler: gic_handle_irq
5672 11:35:57.188122 <6>[ 0.000000] GICv3: GICv3 features: 16 PPIs
5673 11:35:57.194214 <6>[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c100000
5674 11:35:57.207665 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-0[0] { /cpus/cpu@0[0] /cpus/cpu@1[1] /cpus/cpu@2[2] /cpus/cpu@3[3] }
5675 11:35:57.217736 <6>[ 0.000000] GICv3: GIC: PPI partition interrupt-partition-1[1] { /cpus/cpu@100[4] /cpus/cpu@101[5] /cpus/cpu@102[6] /cpus/cpu@103[7] }
5676 11:35:57.224221 <6>[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
5677 11:35:57.236357 <6>[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).
5678 11:35:57.249737 <6>[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns
5679 11:35:57.256591 <6>[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns
5680 11:35:57.262940 <6>[ 0.009462] Console: colour dummy device 80x25
5681 11:35:57.266365 <6>[ 0.014497] printk: console [tty1] enabled
5682 11:35:57.276214 <6>[ 0.018890] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)
5683 11:35:57.283331 <6>[ 0.029354] pid_max: default: 32768 minimum: 301
5684 11:35:57.286419 <6>[ 0.034235] LSM: Security Framework initializing
5685 11:35:57.296569 <6>[ 0.039150] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5686 11:35:57.303172 <6>[ 0.046774] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes, linear)
5687 11:35:57.309577 <4>[ 0.055653] cacheinfo: Unable to detect cache hierarchy for CPU 0
5688 11:35:57.319478 <6>[ 0.062278] cblist_init_generic: Setting adjustable number of callback queues.
5689 11:35:57.326674 <6>[ 0.069723] cblist_init_generic: Setting shift to 3 and lim to 1.
5690 11:35:57.333175 <6>[ 0.076076] cblist_init_generic: Setting adjustable number of callback queues.
5691 11:35:57.339753 <6>[ 0.083520] cblist_init_generic: Setting shift to 3 and lim to 1.
5692 11:35:57.343128 <6>[ 0.089919] rcu: Hierarchical SRCU implementation.
5693 11:35:57.349562 <6>[ 0.094945] rcu: Max phase no-delay instances is 1000.
5694 11:35:57.356208 <6>[ 0.102847] EFI services will not be available.
5695 11:35:57.359628 <6>[ 0.107797] smp: Bringing up secondary CPUs ...
5696 11:35:57.370135 <6>[ 0.113101] Detected VIPT I-cache on CPU1
5697 11:35:57.376988 <4>[ 0.113147] cacheinfo: Unable to detect cache hierarchy for CPU 1
5698 11:35:57.383882 <6>[ 0.113155] GICv3: CPU1: found redistributor 1 region 0:0x000000000c120000
5699 11:35:57.390349 <6>[ 0.113185] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
5700 11:35:57.393379 <6>[ 0.113671] Detected VIPT I-cache on CPU2
5701 11:35:57.400526 <4>[ 0.113704] cacheinfo: Unable to detect cache hierarchy for CPU 2
5702 11:35:57.406981 <6>[ 0.113709] GICv3: CPU2: found redistributor 2 region 0:0x000000000c140000
5703 11:35:57.413727 <6>[ 0.113721] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
5704 11:35:57.417290 <6>[ 0.114167] Detected VIPT I-cache on CPU3
5705 11:35:57.423373 <4>[ 0.114198] cacheinfo: Unable to detect cache hierarchy for CPU 3
5706 11:35:57.430372 <6>[ 0.114202] GICv3: CPU3: found redistributor 3 region 0:0x000000000c160000
5707 11:35:57.436626 <6>[ 0.114213] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
5708 11:35:57.443242 <6>[ 0.114787] CPU features: detected: Spectre-v2
5709 11:35:57.446934 <6>[ 0.114797] CPU features: detected: Spectre-BHB
5710 11:35:57.453429 <6>[ 0.114801] CPU features: detected: ARM erratum 858921
5711 11:35:57.456924 <6>[ 0.114806] Detected VIPT I-cache on CPU4
5712 11:35:57.463339 <4>[ 0.114854] cacheinfo: Unable to detect cache hierarchy for CPU 4
5713 11:35:57.470355 <6>[ 0.114862] GICv3: CPU4: found redistributor 100 region 0:0x000000000c180000
5714 11:35:57.476631 <6>[ 0.114870] arch_timer: Enabling local workaround for ARM erratum 858921
5715 11:35:57.483160 <6>[ 0.114881] arch_timer: CPU4: Trapping CNTVCT access
5716 11:35:57.489907 <6>[ 0.114889] CPU4: Booted secondary processor 0x0000000100 [0x410fd092]
5717 11:35:57.493068 <6>[ 0.115374] Detected VIPT I-cache on CPU5
5718 11:35:57.499866 <4>[ 0.115414] cacheinfo: Unable to detect cache hierarchy for CPU 5
5719 11:35:57.506242 <6>[ 0.115420] GICv3: CPU5: found redistributor 101 region 0:0x000000000c1a0000
5720 11:35:57.513476 <6>[ 0.115427] arch_timer: Enabling local workaround for ARM erratum 858921
5721 11:35:57.520167 <6>[ 0.115433] arch_timer: CPU5: Trapping CNTVCT access
5722 11:35:57.526113 <6>[ 0.115438] CPU5: Booted secondary processor 0x0000000101 [0x410fd092]
5723 11:35:57.530087 <6>[ 0.115875] Detected VIPT I-cache on CPU6
5724 11:35:57.536305 <4>[ 0.115921] cacheinfo: Unable to detect cache hierarchy for CPU 6
5725 11:35:57.543192 <6>[ 0.115927] GICv3: CPU6: found redistributor 102 region 0:0x000000000c1c0000
5726 11:35:57.553058 <6>[ 0.115934] arch_timer: Enabling local workaround for ARM erratum 858921
5727 11:35:57.556043 <6>[ 0.115940] arch_timer: CPU6: Trapping CNTVCT access
5728 11:35:57.562629 <6>[ 0.115945] CPU6: Booted secondary processor 0x0000000102 [0x410fd092]
5729 11:35:57.566230 <6>[ 0.116475] Detected VIPT I-cache on CPU7
5730 11:35:57.572591 <4>[ 0.116518] cacheinfo: Unable to detect cache hierarchy for CPU 7
5731 11:35:57.579415 <6>[ 0.116524] GICv3: CPU7: found redistributor 103 region 0:0x000000000c1e0000
5732 11:35:57.589371 <6>[ 0.116531] arch_timer: Enabling local workaround for ARM erratum 858921
5733 11:35:57.592526 <6>[ 0.116538] arch_timer: CPU7: Trapping CNTVCT access
5734 11:35:57.599098 <6>[ 0.116543] CPU7: Booted secondary processor 0x0000000103 [0x410fd092]
5735 11:35:57.602944 <6>[ 0.116619] smp: Brought up 1 node, 8 CPUs
5736 11:35:57.609093 <6>[ 0.355495] SMP: Total of 8 processors activated.
5737 11:35:57.615920 <6>[ 0.360431] CPU features: detected: 32-bit EL0 Support
5738 11:35:57.619022 <6>[ 0.365803] CPU features: detected: 32-bit EL1 Support
5739 11:35:57.625607 <6>[ 0.371169] CPU features: detected: CRC32 instructions
5740 11:35:57.628974 <6>[ 0.376594] CPU: All CPU(s) started at EL2
5741 11:35:57.635763 <6>[ 0.380933] alternatives: applying system-wide alternatives
5742 11:35:57.642732 <6>[ 0.388935] devtmpfs: initialized
5743 11:35:57.654787 <6>[ 0.397889] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns
5744 11:35:57.664544 <6>[ 0.407835] futex hash table entries: 2048 (order: 5, 131072 bytes, linear)
5745 11:35:57.668319 <6>[ 0.415560] pinctrl core: initialized pinctrl subsystem
5746 11:35:57.676290 <6>[ 0.422669] DMI not present or invalid.
5747 11:35:57.682852 <6>[ 0.427040] NET: Registered PF_NETLINK/PF_ROUTE protocol family
5748 11:35:57.689565 <6>[ 0.433947] DMA: preallocated 512 KiB GFP_KERNEL pool for atomic allocations
5749 11:35:57.699664 <6>[ 0.441475] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
5750 11:35:57.706457 <6>[ 0.449726] DMA: preallocated 512 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
5751 11:35:57.712782 <6>[ 0.457902] audit: initializing netlink subsys (disabled)
5752 11:35:57.720058 <5>[ 0.463607] audit: type=2000 audit(0.332:1): state=initialized audit_enabled=0 res=1
5753 11:35:57.726143 <6>[ 0.464576] thermal_sys: Registered thermal governor 'step_wise'
5754 11:35:57.732586 <6>[ 0.471573] thermal_sys: Registered thermal governor 'power_allocator'
5755 11:35:57.736765 <6>[ 0.477872] cpuidle: using governor menu
5756 11:35:57.742734 <6>[ 0.488835] NET: Registered PF_QIPCRTR protocol family
5757 11:35:57.749360 <6>[ 0.494334] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
5758 11:35:57.756134 <6>[ 0.501432] ASID allocator initialised with 32768 entries
5759 11:35:57.759693 <6>[ 0.508200] Serial: AMBA PL011 UART driver
5760 11:35:57.773257 <4>[ 0.519527] Trying to register duplicate clock ID: 113
5761 11:35:57.832984 <6>[ 0.575990] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5762 11:35:57.847598 <6>[ 0.590373] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5763 11:35:57.850780 <6>[ 0.600147] KASLR enabled
5764 11:35:57.865056 <6>[ 0.608123] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
5765 11:35:57.871936 <6>[ 0.615127] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
5766 11:35:57.878518 <6>[ 0.621604] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
5767 11:35:57.885311 <6>[ 0.628596] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
5768 11:35:57.891955 <6>[ 0.635069] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
5769 11:35:57.898515 <6>[ 0.642059] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
5770 11:35:57.905451 <6>[ 0.648534] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
5771 11:35:57.912002 <6>[ 0.655524] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
5772 11:35:57.915416 <6>[ 0.663084] ACPI: Interpreter disabled.
5773 11:35:57.924770 <6>[ 0.671058] iommu: Default domain type: Translated
5774 11:35:57.931439 <6>[ 0.676167] iommu: DMA domain TLB invalidation policy: strict mode
5775 11:35:57.934710 <5>[ 0.682799] SCSI subsystem initialized
5776 11:35:57.941645 <6>[ 0.687212] usbcore: registered new interface driver usbfs
5777 11:35:57.948306 <6>[ 0.692940] usbcore: registered new interface driver hub
5778 11:35:57.951568 <6>[ 0.698482] usbcore: registered new device driver usb
5779 11:35:57.958537 <6>[ 0.704789] pps_core: LinuxPPS API ver. 1 registered
5780 11:35:57.968991 <6>[ 0.709973] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
5781 11:35:57.971718 <6>[ 0.719298] PTP clock support registered
5782 11:35:57.975137 <6>[ 0.723550] EDAC MC: Ver: 3.0.0
5783 11:35:57.982861 <6>[ 0.729180] FPGA manager framework
5784 11:35:57.989606 <6>[ 0.732865] Advanced Linux Sound Architecture Driver Initialized.
5785 11:35:57.992749 <6>[ 0.739627] vgaarb: loaded
5786 11:35:57.996381 <6>[ 0.742754] clocksource: Switched to clocksource arch_sys_counter
5787 11:35:58.003390 <5>[ 0.749187] VFS: Disk quotas dquot_6.6.0
5788 11:35:58.009438 <6>[ 0.753365] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
5789 11:35:58.013011 <6>[ 0.760539] pnp: PnP ACPI: disabled
5790 11:35:58.020958 <6>[ 0.767428] NET: Registered PF_INET protocol family
5791 11:35:58.027691 <6>[ 0.772659] IP idents hash table entries: 65536 (order: 7, 524288 bytes, linear)
5792 11:35:58.039854 <6>[ 0.782575] tcp_listen_portaddr_hash hash table entries: 2048 (order: 3, 32768 bytes, linear)
5793 11:35:58.049832 <6>[ 0.791329] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
5794 11:35:58.056169 <6>[ 0.799282] TCP established hash table entries: 32768 (order: 6, 262144 bytes, linear)
5795 11:35:58.062903 <6>[ 0.807514] TCP bind hash table entries: 32768 (order: 8, 1048576 bytes, linear)
5796 11:35:58.069422 <6>[ 0.815607] TCP: Hash tables configured (established 32768 bind 32768)
5797 11:35:58.079256 <6>[ 0.822432] UDP hash table entries: 2048 (order: 4, 65536 bytes, linear)
5798 11:35:58.085912 <6>[ 0.829405] UDP-Lite hash table entries: 2048 (order: 4, 65536 bytes, linear)
5799 11:35:58.092640 <6>[ 0.836883] NET: Registered PF_UNIX/PF_LOCAL protocol family
5800 11:35:58.099292 <6>[ 0.842981] RPC: Registered named UNIX socket transport module.
5801 11:35:58.102690 <6>[ 0.849126] RPC: Registered udp transport module.
5802 11:35:58.106327 <6>[ 0.854050] RPC: Registered tcp transport module.
5803 11:35:58.112819 <6>[ 0.858974] RPC: Registered tcp NFSv4.1 backchannel transport module.
5804 11:35:58.119095 <6>[ 0.865627] PCI: CLS 0 bytes, default 64
5805 11:35:58.122657 <6>[ 0.869912] Unpacking initramfs...
5806 11:35:58.148387 <6>[ 0.890864] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 counters available
5807 11:35:58.157436 <6>[ 0.899596] hw perfevents: enabled with armv8_cortex_a73 PMU driver, 7 counters available
5808 11:35:58.161299 <6>[ 0.908509] kvm [1]: IPA Size Limit: 40 bits
5809 11:35:58.168212 <6>[ 0.914867] kvm [1]: vgic-v2@c420000
5810 11:35:58.172251 <6>[ 0.918690] kvm [1]: GIC system register CPU interface enabled
5811 11:35:58.178647 <6>[ 0.924877] kvm [1]: vgic interrupt IRQ18
5812 11:35:58.182044 <6>[ 0.929243] kvm [1]: Hyp mode initialized successfully
5813 11:35:58.189442 <5>[ 0.935613] Initialise system trusted keyrings
5814 11:35:58.195835 <6>[ 0.940462] workingset: timestamp_bits=42 max_order=20 bucket_order=0
5815 11:35:58.204499 <6>[ 0.950388] squashfs: version 4.0 (2009/01/31) Phillip Lougher
5816 11:35:58.210497 <5>[ 0.956832] NFS: Registering the id_resolver key type
5817 11:35:58.214029 <5>[ 0.962144] Key type id_resolver registered
5818 11:35:58.220788 <5>[ 0.966557] Key type id_legacy registered
5819 11:35:58.227578 <6>[ 0.970864] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
5820 11:35:58.234121 <6>[ 0.977788] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
5821 11:35:58.240309 <6>[ 0.985536] 9p: Installing v9fs 9p2000 file system support
5822 11:35:58.267777 <5>[ 1.013959] Key type asymmetric registered
5823 11:35:58.271047 <5>[ 1.018303] Asymmetric key parser 'x509' registered
5824 11:35:58.280848 <6>[ 1.023457] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 243)
5825 11:35:58.284416 <6>[ 1.031078] io scheduler mq-deadline registered
5826 11:35:58.287933 <6>[ 1.035837] io scheduler kyber registered
5827 11:35:58.310562 <6>[ 1.056591] EINJ: ACPI disabled.
5828 11:35:58.317068 <4>[ 1.060363] of_fixed_factor_clk: probe of fixed-factor-clock-13m failed with error -17
5829 11:35:58.354707 <6>[ 1.101255] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
5830 11:35:58.363116 <6>[ 1.109730] printk: console [ttyS0] disabled
5831 11:35:58.391314 <6>[ 1.134396] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 242, base_baud = 1625000) is a ST16650V2
5832 11:35:58.397813 <6>[ 1.143875] printk: console [ttyS0] enabled
5833 11:35:58.401525 <6>[ 1.143875] printk: console [ttyS0] enabled
5834 11:35:58.407869 <6>[ 1.152796] printk: bootconsole [mtk8250] disabled
5835 11:35:58.411429 <6>[ 1.152796] printk: bootconsole [mtk8250] disabled
5836 11:35:58.421663 <3>[ 1.163330] mt8183-pinctrl 10005000.pinctrl: pin_config_group_set op failed for group 47
5837 11:35:58.428204 <3>[ 1.171710] mt6577-uart 11003000.serial: Error applying setting, reverse things back
5838 11:35:58.457448 <6>[ 1.200117] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 243, base_baud = 1625000) is a ST16650V2
5839 11:35:58.463687 <6>[ 1.209774] serial serial0: tty port ttyS1 registered
5840 11:35:58.470507 <6>[ 1.216361] SuperH (H)SCI(F) driver initialized
5841 11:35:58.474104 <6>[ 1.221875] msm_serial: driver initialized
5842 11:35:58.489611 <6>[ 1.232316] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14008000
5843 11:35:58.499595 <6>[ 1.240932] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@14009000
5844 11:35:58.506186 <6>[ 1.249511] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ovl@1400a000
5845 11:35:58.516251 <6>[ 1.258078] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400b000
5846 11:35:58.523336 <6>[ 1.266734] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/rdma@1400c000
5847 11:35:58.532862 <6>[ 1.275402] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/color@1400e000
5848 11:35:58.542903 <6>[ 1.284144] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/ccorr@1400f000
5849 11:35:58.549104 <6>[ 1.292884] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/aal@14010000
5850 11:35:58.559500 <6>[ 1.301449] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/gamma@14011000
5851 11:35:58.565790 <6>[ 1.310248] mediatek-drm mediatek-drm.1.auto: Adding component match for /soc/dsi@14014000
5852 11:35:58.576499 <4>[ 1.322614] cacheinfo: Unable to detect cache hierarchy for CPU 0
5853 11:35:58.585503 <6>[ 1.331990] loop: module loaded
5854 11:35:58.597464 <6>[ 1.343910] vsim1: Bringing 1800000uV into 2700000-2700000uV
5855 11:35:58.615105 <6>[ 1.361759] megasas: 07.719.03.00-rc1
5856 11:35:58.624343 <6>[ 1.370470] spi-nor spi1.0: w25q64dw (8192 Kbytes)
5857 11:35:58.631863 <6>[ 1.378146] tpm_tis_spi spi0.0: TPM ready IRQ confirmed on attempt 2
5858 11:35:58.648920 <6>[ 1.394978] tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x28, rev-id 0)
5859 11:35:58.705170 <6>[ 1.445189] tpm_tis_spi spi0.0: Cr50 firmware version: B2-C:0 RO_A:0.0.12/bf248b9d RW_B:0.5.171/cr50_v2.94_mp.164-2fb1d
5860 11:35:58.753686 <6>[ 1.499809] Freeing initrd memory: 18280K
5861 11:35:58.768763 <4>[ 1.511631] sysfs: cannot create duplicate filename '/bus/platform/devices/fixed-factor-clock-13m'
5862 11:35:58.775243 <4>[ 1.520861] CPU: 5 PID: 1 Comm: swapper/0 Not tainted 6.1.96-cip24 #1
5863 11:35:58.782152 <4>[ 1.527560] Hardware name: Google juniper sku16 board (DT)
5864 11:35:58.785793 <4>[ 1.533299] Call trace:
5865 11:35:58.788863 <4>[ 1.535999] dump_backtrace.part.0+0xe0/0xf0
5866 11:35:58.792295 <4>[ 1.540536] show_stack+0x18/0x30
5867 11:35:58.795727 <4>[ 1.544110] dump_stack_lvl+0x64/0x80
5868 11:35:58.798855 <4>[ 1.548030] dump_stack+0x18/0x34
5869 11:35:58.805364 <4>[ 1.551599] sysfs_warn_dup+0x64/0x80
5870 11:35:58.808960 <4>[ 1.555521] sysfs_do_create_link_sd+0xf0/0x100
5871 11:35:58.812756 <4>[ 1.560308] sysfs_create_link+0x20/0x40
5872 11:35:58.815578 <4>[ 1.564488] bus_add_device+0x64/0x120
5873 11:35:58.822171 <4>[ 1.568492] device_add+0x354/0x7ec
5874 11:35:58.825841 <4>[ 1.572239] of_device_add+0x44/0x60
5875 11:35:58.829561 <4>[ 1.576071] of_platform_device_create_pdata+0x90/0x124
5876 11:35:58.835728 <4>[ 1.581551] of_platform_bus_create+0x154/0x380
5877 11:35:58.839401 <4>[ 1.586337] of_platform_populate+0x50/0xfc
5878 11:35:58.842726 <4>[ 1.590776] parse_mtd_partitions+0x1d8/0x4e0
5879 11:35:58.849320 <4>[ 1.595391] mtd_device_parse_register+0xec/0x2e0
5880 11:35:58.852756 <4>[ 1.600351] spi_nor_probe+0x280/0x2f4
5881 11:35:58.856313 <4>[ 1.604357] spi_mem_probe+0x6c/0xc0
5882 11:35:58.859289 <4>[ 1.608189] spi_probe+0x84/0xe4
5883 11:35:58.862529 <4>[ 1.611675] really_probe+0xbc/0x2dc
5884 11:35:58.869364 <4>[ 1.615505] __driver_probe_device+0x78/0x114
5885 11:35:58.872735 <4>[ 1.620117] driver_probe_device+0xd8/0x15c
5886 11:35:58.878957 <4>[ 1.624554] __device_attach_driver+0xb8/0x134
5887 11:35:58.882700 <4>[ 1.629252] bus_for_each_drv+0x7c/0xd4
5888 11:35:58.885989 <4>[ 1.633345] __device_attach+0x9c/0x1a0
5889 11:35:58.889517 <4>[ 1.637436] device_initial_probe+0x14/0x20
5890 11:35:58.896383 <4>[ 1.641874] bus_probe_device+0x98/0xa0
5891 11:35:58.899358 <4>[ 1.645964] device_add+0x3c0/0x7ec
5892 11:35:58.902937 <4>[ 1.649709] __spi_add_device+0x78/0x120
5893 11:35:58.906173 <4>[ 1.653886] spi_add_device+0x44/0x80
5894 11:35:58.912664 <4>[ 1.657804] spi_register_controller+0x704/0xb20
5895 11:35:58.915887 <4>[ 1.662676] devm_spi_register_controller+0x4c/0xac
5896 11:35:58.919441 <4>[ 1.667810] mtk_spi_probe+0x4f4/0x684
5897 11:35:58.926159 <4>[ 1.671814] platform_probe+0x68/0xc0
5898 11:35:58.929358 <4>[ 1.675733] really_probe+0xbc/0x2dc
5899 11:35:58.932642 <4>[ 1.679563] __driver_probe_device+0x78/0x114
5900 11:35:58.935782 <4>[ 1.684174] driver_probe_device+0xd8/0x15c
5901 11:35:58.942445 <4>[ 1.688611] __driver_attach+0x94/0x19c
5902 11:35:58.945790 <4>[ 1.692701] bus_for_each_dev+0x74/0xd0
5903 11:35:58.949055 <4>[ 1.696793] driver_attach+0x24/0x30
5904 11:35:58.952496 <4>[ 1.700622] bus_add_driver+0x154/0x20c
5905 11:35:58.959142 <4>[ 1.704712] driver_register+0x78/0x130
5906 11:35:58.962375 <4>[ 1.708802] __platform_driver_register+0x28/0x34
5907 11:35:58.965660 <4>[ 1.713761] mtk_spi_driver_init+0x1c/0x28
5908 11:35:58.972283 <4>[ 1.718117] do_one_initcall+0x64/0x1dc
5909 11:35:58.975736 <4>[ 1.722208] kernel_init_freeable+0x218/0x284
5910 11:35:58.978772 <4>[ 1.726823] kernel_init+0x24/0x12c
5911 11:35:58.982741 <4>[ 1.730567] ret_from_fork+0x10/0x20
5912 11:35:58.993214 <6>[ 1.739451] tun: Universal TUN/TAP device driver, 1.6
5913 11:35:58.997200 <6>[ 1.745738] thunder_xcv, ver 1.0
5914 11:35:59.000059 <6>[ 1.749253] thunder_bgx, ver 1.0
5915 11:35:59.003189 <6>[ 1.752756] nicpf, ver 1.0
5916 11:35:59.014692 <6>[ 1.757132] hns3: Hisilicon Ethernet Network Driver for Hip08 Family - version
5917 11:35:59.017432 <6>[ 1.764619] hns3: Copyright (c) 2017 Huawei Corporation.
5918 11:35:59.020888 <6>[ 1.770226] hclge is initializing
5919 11:35:59.028152 <6>[ 1.773814] e1000: Intel(R) PRO/1000 Network Driver
5920 11:35:59.034181 <6>[ 1.778950] e1000: Copyright (c) 1999-2006 Intel Corporation.
5921 11:35:59.037844 <6>[ 1.784974] e1000e: Intel(R) PRO/1000 Network Driver
5922 11:35:59.044079 <6>[ 1.790196] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
5923 11:35:59.051245 <6>[ 1.796391] igb: Intel(R) Gigabit Ethernet Network Driver
5924 11:35:59.058089 <6>[ 1.802048] igb: Copyright (c) 2007-2014 Intel Corporation.
5925 11:35:59.064636 <6>[ 1.807892] igbvf: Intel(R) Gigabit Virtual Function Network Driver
5926 11:35:59.067462 <6>[ 1.814417] igbvf: Copyright (c) 2009 - 2012 Intel Corporation.
5927 11:35:59.074909 <6>[ 1.820976] sky2: driver version 1.30
5928 11:35:59.081428 <6>[ 1.826228] usbcore: registered new device driver r8152-cfgselector
5929 11:35:59.087936 <6>[ 1.832772] usbcore: registered new interface driver r8152
5930 11:35:59.091514 <6>[ 1.838601] VFIO - User Level meta-driver version: 0.3
5931 11:35:59.100291 <6>[ 1.846394] mtu3 11201000.usb: uwk - reg:0x420, version:101
5932 11:35:59.106728 <4>[ 1.852269] mtu3 11201000.usb: supply vbus not found, using dummy regulator
5933 11:35:59.113319 <6>[ 1.859543] mtu3 11201000.usb: dr_mode: 1, drd: auto
5934 11:35:59.120212 <6>[ 1.864768] mtu3 11201000.usb: u2p_dis_msk: 0, u3p_dis_msk: 0
5935 11:35:59.123639 <6>[ 1.870957] mtu3 11201000.usb: usb3-drd: 0
5936 11:35:59.133513 <6>[ 1.876539] mtu3 11201000.usb: xHCI platform device register success...
5937 11:35:59.140367 <4>[ 1.885208] xhci-mtk 11200000.usb: supply vbus not found, using dummy regulator
5938 11:35:59.147384 <6>[ 1.893150] xhci-mtk 11200000.usb: xHCI Host Controller
5939 11:35:59.153986 <6>[ 1.898672] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 1
5940 11:35:59.160082 <6>[ 1.906392] xhci-mtk 11200000.usb: USB3 root hub has no ports
5941 11:35:59.170684 <6>[ 1.912401] xhci-mtk 11200000.usb: hcc params 0x01400f99 hci version 0x110 quirks 0x0000000000210010
5942 11:35:59.177882 <6>[ 1.921827] xhci-mtk 11200000.usb: irq 253, io mem 0x11200000
5943 11:35:59.180661 <6>[ 1.927891] xhci-mtk 11200000.usb: xHCI Host Controller
5944 11:35:59.190666 <6>[ 1.933380] xhci-mtk 11200000.usb: new USB bus registered, assigned bus number 2
5945 11:35:59.197130 <6>[ 1.941037] xhci-mtk 11200000.usb: Host supports USB 3.0 SuperSpeed
5946 11:35:59.201057 <6>[ 1.947850] hub 1-0:1.0: USB hub found
5947 11:35:59.204250 <6>[ 1.951880] hub 1-0:1.0: 1 port detected
5948 11:35:59.214454 <6>[ 1.957230] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM.
5949 11:35:59.217638 <6>[ 1.965864] hub 2-0:1.0: USB hub found
5950 11:35:59.224152 <3>[ 1.969914] hub 2-0:1.0: config failed, hub doesn't have any ports! (err -19)
5951 11:35:59.231289 <6>[ 1.977804] usbcore: registered new interface driver usb-storage
5952 11:35:59.238187 <6>[ 1.984416] usbcore: registered new device driver onboard-usb-hub
5953 11:35:59.251970 <4>[ 1.994868] onboard-usb-hub 11200000.usb:hub@1: supply vdd not found, using dummy regulator
5954 11:35:59.260989 <6>[ 2.007100] mt6397-rtc mt6358-rtc: registered as rtc0
5955 11:35:59.271347 <6>[ 2.012581] mt6397-rtc mt6358-rtc: setting system clock to 2024-07-17T11:35:59 UTC (1721216159)
5956 11:35:59.274292 <6>[ 2.022453] i2c_dev: i2c /dev entries driver
5957 11:35:59.285778 <6>[ 2.028874] platform panel: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5958 11:35:59.296285 <6>[ 2.037189] platform 14014000.dsi: Fixed dependency cycle(s) with /soc/i2c@11008000/anx7625@58
5959 11:35:59.299207 <6>[ 2.046094] i2c 4-0058: Fixed dependency cycle(s) with /panel
5960 11:35:59.309116 <6>[ 2.052125] i2c 4-0058: Fixed dependency cycle(s) with /soc/dsi@14014000
5961 11:35:59.325455 <6>[ 2.071552] cpu cpu0: EM: created perf domain
5962 11:35:59.335541 <6>[ 2.077073] cpufreq: cpufreq_online: CPU4: Running at unlisted initial frequency: 1199999 KHz, changing to: 1248000 KHz
5963 11:35:59.342201 <6>[ 2.088361] cpu cpu4: EM: created perf domain
5964 11:35:59.349343 <6>[ 2.095445] sdhci: Secure Digital Host Controller Interface driver
5965 11:35:59.356226 <6>[ 2.101899] sdhci: Copyright(c) Pierre Ossman
5966 11:35:59.362484 <6>[ 2.107312] Synopsys Designware Multimedia Card Interface Driver
5967 11:35:59.368992 <6>[ 2.107715] mtk-msdc 11240000.mmc: allocated mmc-pwrseq
5968 11:35:59.372436 <6>[ 2.114369] sdhci-pltfm: SDHCI platform and OF driver helper
5969 11:35:59.380247 <6>[ 2.126837] ledtrig-cpu: registered to indicate activity on CPUs
5970 11:35:59.388634 <6>[ 2.134530] usbcore: registered new interface driver usbhid
5971 11:35:59.391747 <6>[ 2.140372] usbhid: USB HID core driver
5972 11:35:59.402396 <6>[ 2.144678] spi_master spi2: will run message pump with realtime priority
5973 11:35:59.406118 <4>[ 2.144834] i2c_hid_of 2-002c: supply vdd not found, using dummy regulator
5974 11:35:59.413830 <4>[ 2.158982] i2c_hid_of 2-002c: supply vddl not found, using dummy regulator
5975 11:35:59.426899 <6>[ 2.164824] input: cros_ec as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input0
5976 11:35:59.445314 <6>[ 2.181384] input: cros_ec_buttons as /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:keyboard-controller/input/input1
5977 11:35:59.451765 <4>[ 2.194011] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
5978 11:35:59.455109 <6>[ 2.195813] cros-ec-spi spi2.0: Chrome EC device registered
5979 11:35:59.470110 <4>[ 2.212944] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
5980 11:35:59.476918 <6>[ 2.222065] mtk-msdc 11230000.mmc: Final PAD_DS_TUNE: 0x11c14
5981 11:35:59.483875 <4>[ 2.224698] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
5982 11:35:59.489714 <6>[ 2.229016] mmc0: new HS400 MMC card at address 0001
5983 11:35:59.496441 <4>[ 2.237149] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
5984 11:35:59.499930 <6>[ 2.242086] mmcblk0: mmc0:0001 TB2932 29.2 GiB
5985 11:35:59.512925 <6>[ 2.258923] mmcblk0: p1 p2 p3 p4 p5 p6 p7 p8 p9 p10 p11 p12
5986 11:35:59.521538 <6>[ 2.267912] mmcblk0boot0: mmc0:0001 TB2932 4.00 MiB
5987 11:35:59.528652 <6>[ 2.268282] mmc1: new ultra high speed SDR104 SDIO card at address 0001
5988 11:35:59.535123 <6>[ 2.274541] mmcblk0boot1: mmc0:0001 TB2932 4.00 MiB
5989 11:35:59.541527 <6>[ 2.284709] mt6358-sound mt6358-sound: mt6358_platform_driver_probe(), dev name mt6358-sound
5990 11:35:59.548040 <6>[ 2.286177] mmcblk0rpmb: mmc0:0001 TB2932 4.00 MiB, chardev (507:0)
5991 11:35:59.558292 <6>[ 2.297716] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
5992 11:35:59.571881 <6>[ 2.307646] input: hid-over-i2c 06CB:CDB5 Mouse as /devices/platform/soc/11009000.i2c/i2c-2/2-002c/0018:06CB:CDB5.0001/input/input2
5993 11:35:59.578453 <6>[ 2.312277] NET: Registered PF_PACKET protocol family
5994 11:35:59.588695 <6>[ 2.323596] hid-generic 0018:06CB:CDB5.0001: input: I2C HID v1.00 Mouse [hid-over-i2c 06CB:CDB5] on 2-002c
5995 11:35:59.591574 <6>[ 2.328771] 9pnet: Installing 9P2000 support
5996 11:35:59.595876 <5>[ 2.343221] Key type dns_resolver registered
5997 11:35:59.601964 <6>[ 2.348252] registered taskstats version 1
5998 11:35:59.605073 <5>[ 2.352617] Loading compiled-in X.509 certificates
5999 11:35:59.627783 <6>[ 2.370778] usb 1-1: new high-speed USB device number 2 using xhci-mtk
6000 11:35:59.647190 <3>[ 2.390216] anx7625 4-0058: [drm:anx7625_link_bridge] *ERROR* fail to parse DT for panel : -517
6001 11:35:59.679019 <6>[ 2.418447] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6002 11:35:59.689863 <6>[ 2.432835] mtk-iommu 10205000.iommu: bound 14017000.larb (ops mtk_smi_larb_component_ops)
6003 11:35:59.699810 <6>[ 2.441403] mtk-iommu 10205000.iommu: bound 16010000.larb (ops mtk_smi_larb_component_ops)
6004 11:35:59.706564 <6>[ 2.450053] mtk-iommu 10205000.iommu: bound 1502f000.larb (ops mtk_smi_larb_component_ops)
6005 11:35:59.716380 <6>[ 2.458704] mtk-iommu 10205000.iommu: bound 1a002000.larb (ops mtk_smi_larb_component_ops)
6006 11:35:59.722937 <6>[ 2.467296] mtk-iommu 10205000.iommu: bound 17010000.larb (ops mtk_smi_larb_component_ops)
6007 11:35:59.732884 <6>[ 2.475835] mtk-iommu 10205000.iommu: bound 15021000.larb (ops mtk_smi_larb_component_ops)
6008 11:35:59.742859 <6>[ 2.484437] mtk-iommu 10205000.iommu: bound 1a001000.larb (ops mtk_smi_larb_component_ops)
6009 11:35:59.749921 <6>[ 2.493712] mediatek-disp-ovl 14008000.ovl: Adding to iommu group 0
6010 11:35:59.756341 <6>[ 2.501073] mediatek-disp-ovl 14009000.ovl: Adding to iommu group 0
6011 11:35:59.762894 <6>[ 2.508255] mediatek-disp-ovl 1400a000.ovl: Adding to iommu group 0
6012 11:35:59.769470 <6>[ 2.515377] mediatek-disp-rdma 1400b000.rdma: Adding to iommu group 0
6013 11:35:59.776806 <6>[ 2.522671] mediatek-disp-rdma 1400c000.rdma: Adding to iommu group 0
6014 11:35:59.784880 <6>[ 2.530794] panfrost 13040000.gpu: clock rate = 511999970
6015 11:35:59.794361 <6>[ 2.536536] panfrost 13040000.gpu: [drm:panfrost_devfreq_init] More than 1 supply is not supported yet
6016 11:35:59.804561 <6>[ 2.546742] panfrost 13040000.gpu: mali-g72 id 0x6221 major 0x0 minor 0x3 status 0x0
6017 11:35:59.807960 <6>[ 2.547602] hub 1-1:1.0: USB hub found
6018 11:35:59.814363 <6>[ 2.554752] panfrost 13040000.gpu: features: 00000000,000004f7, issues: 00000000,00000400
6019 11:35:59.821488 <6>[ 2.559210] hub 1-1:1.0: 3 ports detected
6020 11:35:59.830816 <6>[ 2.567173] panfrost 13040000.gpu: Features: L2:0x07120206 Shader:0x00000000 Tiler:0x00000809 Mem:0x1 MMU:0x00002830 AS:0xff JS:0x7
6021 11:35:59.837204 <6>[ 2.567178] panfrost 13040000.gpu: shader_present=0x7 l2_present=0x1
6022 11:35:59.849968 <6>[ 2.592246] [drm] Initialized panfrost 1.2.0 20180908 for 13040000.gpu on minor 0
6023 11:35:59.859435 <6>[ 2.601745] mediatek-drm mediatek-drm.1.auto: bound 14008000.ovl (ops mtk_disp_ovl_component_ops)
6024 11:35:59.869262 <6>[ 2.610919] mediatek-drm mediatek-drm.1.auto: bound 14009000.ovl (ops mtk_disp_ovl_component_ops)
6025 11:35:59.879332 <6>[ 2.620049] mediatek-drm mediatek-drm.1.auto: bound 1400a000.ovl (ops mtk_disp_ovl_component_ops)
6026 11:35:59.885890 <6>[ 2.629177] mediatek-drm mediatek-drm.1.auto: bound 1400b000.rdma (ops mtk_disp_rdma_component_ops)
6027 11:35:59.895559 <6>[ 2.638478] mediatek-drm mediatek-drm.1.auto: bound 1400c000.rdma (ops mtk_disp_rdma_component_ops)
6028 11:35:59.905289 <6>[ 2.647780] mediatek-drm mediatek-drm.1.auto: bound 1400e000.color (ops mtk_disp_color_component_ops)
6029 11:35:59.915379 <6>[ 2.657257] mediatek-drm mediatek-drm.1.auto: bound 1400f000.ccorr (ops mtk_disp_ccorr_component_ops)
6030 11:35:59.925613 <6>[ 2.666730] mediatek-drm mediatek-drm.1.auto: bound 14010000.aal (ops mtk_disp_aal_component_ops)
6031 11:35:59.935478 <6>[ 2.675856] mediatek-drm mediatek-drm.1.auto: bound 14011000.gamma (ops mtk_disp_gamma_component_ops)
6032 11:36:00.004315 <6>[ 2.747492] mediatek-drm mediatek-drm.1.auto: bound 14014000.dsi (ops mtk_dsi_component_ops)
6033 11:36:00.014315 <6>[ 2.756699] mediatek-drm mediatek-drm.1.auto: Not creating crtc 1 because component 10 is disabled or missing
6034 11:36:00.025961 <6>[ 2.768836] [drm] Initialized mediatek 1.0.0 20150513 for mediatek-drm.1.auto on minor 1
6035 11:36:00.115833 <6>[ 2.858826] usb 1-1.2: new high-speed USB device number 3 using xhci-mtk
6036 11:36:00.736971 <6>[ 3.051078] r8152-cfgselector 1-1.2: reset high-speed USB device number 3 using xhci-mtk
6037 11:36:00.747240 <4>[ 3.168011] r8152 1-1.2:1.0: Direct firmware load for rtl_nic/rtl8153b-2.fw failed with error -2
6038 11:36:00.753837 <4>[ 3.168028] r8152 1-1.2:1.0: unable to load firmware patch rtl_nic/rtl8153b-2.fw (-2)
6039 11:36:00.760435 <6>[ 3.221495] r8152 1-1.2:1.0 eth0: v1.12.13
6040 11:36:00.766806 <6>[ 3.298773] usb 1-1.3: new high-speed USB device number 4 using xhci-mtk
6041 11:36:00.773547 <6>[ 3.463208] Console: switching to colour frame buffer device 170x48
6042 11:36:00.779989 <6>[ 3.523842] mediatek-drm mediatek-drm.1.auto: [drm] fb0: mediatekdrmfb frame buffer device
6043 11:36:00.801236 <6>[ 3.540802] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6044 11:36:00.818131 <6>[ 3.557875] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6045 11:36:00.824601 <6>[ 3.570343] input: wifi-wakeup as /devices/platform/wifi-wakeup/input/input4
6046 11:36:00.836161 <6>[ 3.578590] input: volume-buttons as /devices/platform/volume-buttons/input/input5
6047 11:36:00.845438 <6>[ 3.585505] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6048 11:36:00.865441 <6>[ 3.604705] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6049 11:36:02.052892 <6>[ 4.799401] r8152 1-1.2:1.0 eth0: carrier on
6050 11:36:04.504878 <5>[ 4.822789] Sending DHCP requests .., OK
6051 11:36:04.511514 <6>[ 7.255202] IP-Config: Got DHCP answer from 192.168.201.1, my address is 192.168.201.23
6052 11:36:04.514416 <6>[ 7.263682] IP-Config: Complete:
6053 11:36:04.527957 <6>[ 7.267251] device=eth0, hwaddr=00:e0:4c:71:a7:1f, ipaddr=192.168.201.23, mask=255.255.255.0, gw=192.168.201.1
6054 11:36:04.537631 <6>[ 7.278164] host=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3, domain=lava-rack, nis-domain=(none)
6055 11:36:04.550386 <6>[ 7.292551] bootserver=192.168.201.1, rootserver=192.168.201.1, rootpath=
6056 11:36:04.558868 <6>[ 7.292561] nameserver0=192.168.201.1
6057 11:36:04.569377 <6>[ 7.315599] clk: Disabling unused clocks
6058 11:36:04.574578 <6>[ 7.324243] ALSA device list:
6059 11:36:04.584279 <6>[ 7.330704] No soundcards found.
6060 11:36:04.594890 <6>[ 7.340838] Freeing unused kernel memory: 8512K
6061 11:36:04.602762 <6>[ 7.348745] Run /init as init process
6062 11:36:04.615939 Loading, please wait...
6063 11:36:04.649002 Starting systemd-udevd version 252.22-1~deb12u1
6064 11:36:04.946745 <6>[ 7.689443] mtk-wdt 10007000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)
6065 11:36:04.959023 <4>[ 7.701972] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: No cache defaults, reading back from HW
6066 11:36:04.970471 <6>[ 7.713182] mt8183-audio 11220000.audio-controller:mt8183-afe-pcm: mtk_afe_combine_sub_dai(), num of dai 20
6067 11:36:04.988828 <6>[ 7.728249] mt8183_mt6358_ts3a227 mt8183-sound: mt8183_mt6358_ts3a227_max98357_dev_probe Can't find pin state wov -19
6068 11:36:05.001851 <3>[ 7.740870] debugfs: Directory '11220000.audio-controller:mt8183-afe-pcm' with parent 'mt8183_mt6358_ts3a227_max98357' already present!
6069 11:36:05.019395 <3>[ 7.758845] mt8183-pinctrl 10005000.pinctrl: pin GPIO7 already requested by 2-002c; cannot claim for 2-0015
6070 11:36:05.025905 <3>[ 7.771227] mt8183-pinctrl 10005000.pinctrl: pin-7 (2-0015) status -22
6071 11:36:05.040885 <3>[ 7.780381] mt8183-pinctrl 10005000.pinctrl: could not request pin 7 (GPIO7) from group GPIO7 on device pinctrl_paris
6072 11:36:05.051150 <4>[ 7.791335] elants_i2c 0-0010: supply vcc33 not found, using dummy regulator
6073 11:36:05.066563 <3>[ 7.805785] mt8183_mt6358_ts3a227 mt8183-sound: ASoC: driver name too long 'mt8183_mt6358_ts3a227_max98357' -> 'mt8183_mt6358_t'
6074 11:36:05.073566 <3>[ 7.808923] elan_i2c 2-0015: Error applying setting, reverse things back
6075 11:36:05.079645 <3>[ 7.818569] debugfs: File 'Playback' in directory 'dapm' already present!
6076 11:36:05.086320 <4>[ 7.824761] elants_i2c 0-0010: supply vccio not found, using dummy regulator
6077 11:36:05.096651 <3>[ 7.826192] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6078 11:36:05.106593 <3>[ 7.826209] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6079 11:36:05.116289 <3>[ 7.826216] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6080 11:36:05.125961 <3>[ 7.826291] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6081 11:36:05.136774 <3>[ 7.826297] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6082 11:36:05.146948 <3>[ 7.826302] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6083 11:36:05.157381 <3>[ 7.826308] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6084 11:36:05.167791 <3>[ 7.826313] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6085 11:36:05.177735 <3>[ 7.826344] OF: graph: no port node found in /soc/spi@11012000/cros-ec@0/typec/connector@0
6086 11:36:05.184712 <3>[ 7.831739] debugfs: File 'Capture' in directory 'dapm' already present!
6087 11:36:05.191597 <6>[ 7.840008] mc: Linux media interface: v0.10
6088 11:36:05.197847 <6>[ 7.911659] cs_system_cfg: CoreSight Configuration manager initialised
6089 11:36:05.207759 <6>[ 7.934032] input: mt8183_mt6358_ts3a227_max98357 Headset Jack as /devices/platform/mt8183-sound/sound/card0/input6
6090 11:36:05.214887 <6>[ 7.937412] sbs-battery 12-000b: sbs-battery: battery gas gauge device registered
6091 11:36:05.221508 <3>[ 7.943007] thermal_sys: Failed to find 'trips' node
6092 11:36:05.227980 <6>[ 7.948998] videodev: Linux video capture interface: v2.00
6093 11:36:05.235045 <3>[ 7.959005] thermal_sys: Failed to find trip points for thermal-sensor1 id=0
6094 11:36:05.244629 <3>[ 7.959017] generic-adc-thermal thermal-sensor1: Thermal zone sensor register failed: -22
6095 11:36:05.255027 <6>[ 7.992189] input: Elan Touchscreen as /devices/platform/soc/11007000.i2c/i2c-0/0-0010/input/input7
6096 11:36:05.261485 <4>[ 7.995580] generic-adc-thermal: probe of thermal-sensor1 failed with error -22
6097 11:36:05.268102 <3>[ 7.996815] thermal_sys: Failed to find 'trips' node
6098 11:36:05.271496 <3>[ 8.013414] mtk-scp 10500000.scp: invalid resource
6099 11:36:05.281668 <6>[ 8.013458] coresight-cpu-debug d410000.cpu-debug: Coresight debug-CPU0 initialized
6100 11:36:05.288567 <6>[ 8.013543] coresight-cpu-debug d510000.cpu-debug: Coresight debug-CPU1 initialized
6101 11:36:05.294465 <6>[ 8.013597] coresight-cpu-debug d610000.cpu-debug: Coresight debug-CPU2 initialized
6102 11:36:05.304413 <6>[ 8.013647] coresight-cpu-debug d710000.cpu-debug: Coresight debug-CPU3 initialized
6103 11:36:05.311082 <5>[ 8.015902] cfg80211: Loading compiled-in X.509 certificates for regulatory database
6104 11:36:05.317731 <3>[ 8.018442] thermal_sys: Failed to find trip points for thermal-sensor2 id=0
6105 11:36:05.328547 <3>[ 8.018451] generic-adc-thermal thermal-sensor2: Thermal zone sensor register failed: -22
6106 11:36:05.338730 <6>[ 8.018554] coresight-cpu-debug d810000.cpu-debug: Coresight debug-CPU4 initialized
6107 11:36:05.345154 <6>[ 8.023764] coresight-cpu-debug d910000.cpu-debug: Coresight debug-CPU5 initialized
6108 11:36:05.355123 <6>[ 8.023802] mtk-scp 10500000.scp: assigned reserved memory node memory@50000000
6109 11:36:05.362242 <6>[ 8.024836] remoteproc remoteproc0: scp is available
6110 11:36:05.372314 <4>[ 8.025695] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6111 11:36:05.378656 <6>[ 8.025708] remoteproc remoteproc0: powering up scp
6112 11:36:05.388599 <4>[ 8.025736] remoteproc remoteproc0: Direct firmware load for scp.img failed with error -2
6113 11:36:05.395081 <3>[ 8.025741] remoteproc remoteproc0: request_firmware failed: -2
6114 11:36:05.406160 <4>[ 8.031406] generic-adc-thermal: probe of thermal-sensor2 failed with error -22
6115 11:36:05.412876 <5>[ 8.032087] cfg80211: Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
6116 11:36:05.422805 <6>[ 8.039627] coresight-cpu-debug da10000.cpu-debug: Coresight debug-CPU6 initialized
6117 11:36:05.426634 <6>[ 8.040118] Bluetooth: Core ver 2.22
6118 11:36:05.433547 <6>[ 8.040169] NET: Registered PF_BLUETOOTH protocol family
6119 11:36:05.436280 <6>[ 8.040172] Bluetooth: HCI device and connection manager initialized
6120 11:36:05.443195 <6>[ 8.040189] Bluetooth: HCI socket layer initialized
6121 11:36:05.446868 <6>[ 8.040194] Bluetooth: L2CAP socket layer initialized
6122 11:36:05.453699 <6>[ 8.040205] Bluetooth: SCO socket layer initialized
6123 11:36:05.460396 <6>[ 8.047853] usb 1-1.3: Found UVC 1.00 device HD WebCam (04f2:b567)
6124 11:36:05.470503 <5>[ 8.048136] cfg80211: Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
6125 11:36:05.481431 <4>[ 8.048211] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
6126 11:36:05.483865 <6>[ 8.048219] cfg80211: failed to load regulatory.db
6127 11:36:05.494034 <6>[ 8.055447] coresight-cpu-debug db10000.cpu-debug: Coresight debug-CPU7 initialized
6128 11:36:05.500710 <6>[ 8.055896] mtk-mdp3 14001000.dma-controller0: Adding to iommu group 0
6129 11:36:05.507307 <6>[ 8.055942] mtk-jpeg 17030000.venc_jpg: Adding to iommu group 0
6130 11:36:05.517718 <6>[ 8.056337] mtk-jpeg 17030000.venc_jpg: mtk-jpeg-enc device registered as /dev/video0 (81,0)
6131 11:36:05.523983 <6>[ 8.056708] mtk-mdp3 14001000.dma-controller0: Driver registered as /dev/video1
6132 11:36:05.530644 <6>[ 8.080740] Bluetooth: HCI UART driver ver 2.3
6133 11:36:05.544294 <6>[ 8.081735] input: HD WebCam: HD WebCam as /devices/platform/soc/11201000.usb/11200000.usb/usb1/1-1/1-1.3/1-1.3:1.0/input/input8
6134 11:36:05.550829 <6>[ 8.081903] usbcore: registered new interface driver uvcvideo
6135 11:36:05.560660 <6>[ 8.160275] ath10k_sdio mmc1:0001:1: qca6174 hw3.2 sdio target 0x05030000 chip_id 0x00000000 sub 0000:0000
6136 11:36:05.563999 <6>[ 8.165064] Bluetooth: HCI UART protocol H4 registered
6137 11:36:05.575005 <6>[ 8.172745] ath10k_sdio mmc1:0001:1: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0
6138 11:36:05.578322 <6>[ 8.176621] Bluetooth: HCI UART protocol LL registered
6139 11:36:05.590006 <6>[ 8.182488] ath10k_sdio mmc1:0001:1: firmware ver WLAN.RMH.4.4.1-00174 api 6 features wowlan,ignore-otp,mfp crc32 7319fa77
6140 11:36:05.596573 <6>[ 8.188768] Bluetooth: HCI UART protocol Three-wire (H5) registered
6141 11:36:05.606835 <4>[ 8.302013] sbs-battery 12-000b: I2C adapter does not support I2C_FUNC_SMBUS_READ_BLOCK_DATA.
6142 11:36:05.609902 <4>[ 8.302013] Fallback method does not support PEC.
6143 11:36:05.616552 <6>[ 8.311581] Bluetooth: HCI UART protocol Broadcom registered
6144 11:36:05.626530 <3>[ 8.320311] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6145 11:36:05.633107 <6>[ 8.325103] Bluetooth: HCI UART protocol QCA registered
6146 11:36:05.636855 <6>[ 8.326358] Bluetooth: hci0: setting up ROME/QCA6390
6147 11:36:05.646901 <3>[ 8.338703] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6148 11:36:05.653603 <6>[ 8.341754] Bluetooth: HCI UART protocol Marvell registered
6149 11:36:05.660155 <6>[ 8.343053] ath10k_sdio mmc1:0001:1: board_file api 2 bmi_id 0:4 crc32 d2863f91
6150 11:36:05.692159 Begin: Loading essential drivers ... done.
6151 11:36:05.695819 Begin: Running /scripts/init-premount ... done.
6152 11:36:05.701918 Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
6153 11:36:05.712213 Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
6154 11:36:05.715657 Device /sys/class/net/eth0 found
6155 11:36:05.715735 done.
6156 11:36:05.726299 Begin: Waiting up to 180 secs for any network device to become available ... done.
6157 11:36:05.768979 IP-Config: eth0 hardware address 00:e0:4c:71:a7:1f mtu 1500 DHCP
6158 11:36:05.780034 IP-Config: eth0 complete (dhcp from 192.168.201.1):
6159 11:36:05.787169 address: 192.168.201.23 broadcast: 192.168.201.255 netmask: 255.255.255.0
6160 11:36:05.793445 gateway:<3>[ 8.537866] Bluetooth: hci0: Frame reassembly failed (-84)
6161 11:36:05.800001 192.168.201.1 dns0 : 192.168.201.1 dns1 : 0.0.0.0
6162 11:36:05.806684 host : mt8183-kukui-jacuzzi-juniper-sku16-cbg-3
6163 11:36:05.813003 domain : lava-rack
6164 11:36:05.816602 rootserver: 192.168.201.1 rootpath:
6165 11:36:05.816722 filename :
6166 11:36:05.822664 done.
6167 11:36:05.829704 Begin: Running /scripts/nfs-bottom ... done.
6168 11:36:05.852592 Begin: Running /scripts/init-bottom ... done.
6169 11:36:05.967826 <6>[ 8.709775] ath10k_sdio mmc1:0001:1: htt-ver 3.87 wmi-op 4 htt-op 3 cal otp max-sta 32 raw 0 hwcrypto 1
6170 11:36:06.047230 <4>[ 8.789940] mmc1: queuing unknown CIS tuple 0x01 [d9 01 ff] (3 bytes)
6171 11:36:06.061469 <6>[ 8.807598] Bluetooth: hci0: QCA Product ID :0x00000008
6172 11:36:06.070652 <6>[ 8.816392] Bluetooth: hci0: QCA SOC Version :0x00000044
6173 11:36:06.079535 <6>[ 8.825749] Bluetooth: hci0: QCA ROM Version :0x00000302
6174 11:36:06.089248 <6>[ 8.835347] Bluetooth: hci0: QCA Patch Version:0x00000111
6175 11:36:06.098205 <6>[ 8.844339] Bluetooth: hci0: QCA controller version 0x00440302
6176 11:36:06.110311 <6>[ 8.853198] Bluetooth: hci0: QCA Downloading qca/rampatch_00440302.bin
6177 11:36:06.120600 <4>[ 8.863416] bluetooth hci0: Direct firmware load for qca/rampatch_00440302.bin failed with error -2
6178 11:36:06.127183 <4>[ 8.864430] mmc1: queuing unknown CIS tuple 0x1a [01 01 00 02 07] (5 bytes)
6179 11:36:06.137262 <3>[ 8.872760] Bluetooth: hci0: QCA Failed to request file: qca/rampatch_00440302.bin (-2)
6180 11:36:06.143984 <4>[ 8.883927] mmc1: queuing unknown CIS tuple 0x1b [c1 41 30 30 ff ff 32 00] (8 bytes)
6181 11:36:06.154988 <3>[ 8.888239] Bluetooth: hci0: QCA Failed to download patch (-2)
6182 11:36:06.178912 <4>[ 8.925116] mmc1: queuing unknown CIS tuple 0x14 [] (0 bytes)
6183 11:36:06.202976 <3>[ 8.949066] Bluetooth: hci0: Frame reassembly failed (-84)
6184 11:36:06.210114 <4>[ 8.949214] Bluetooth: hci0: Received unexpected HCI Event 0x00
6185 11:36:06.216941 <3>[ 8.954868] Bluetooth: hci0: Frame reassembly failed (-84)
6186 11:36:07.309621 <6>[ 10.055877] NET: Registered PF_INET6 protocol family
6187 11:36:07.321837 <6>[ 10.068023] Segment Routing with IPv6
6188 11:36:07.329398 <6>[ 10.075217] In-situ OAM (IOAM) with IPv6
6189 11:36:07.495994 <30>[ 10.215855] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
6190 11:36:07.516001 <30>[ 10.262320] systemd[1]: Detected architecture arm64.
6191 11:36:07.526652
6192 11:36:07.529512 Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
6193 11:36:07.529614
6194 11:36:07.555143 <30>[ 10.300567] systemd[1]: Hostname set to <debian-bookworm-arm64>.
6195 11:36:08.204918 <3>[ 10.950952] Bluetooth: hci0: Opcode 0x0c14 failed: -110
6196 11:36:08.215193 <3>[ 10.950952] Bluetooth: hci0: command 0x0c14 tx timeout
6197 11:36:08.499661 <30>[ 11.242065] systemd[1]: Queued start job for default target graphical.target.
6198 11:36:08.545056 <30>[ 11.287709] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
6199 11:36:08.557072 [[0;32m OK [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
6200 11:36:08.578340 <30>[ 11.321224] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
6201 11:36:08.591792 [[0;32m OK [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
6202 11:36:08.610507 <30>[ 11.353206] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
6203 11:36:08.624619 [[0;32m OK [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
6204 11:36:08.641484 <30>[ 11.384393] systemd[1]: Created slice user.slice - User and Session Slice.
6205 11:36:08.653437 [[0;32m OK [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
6206 11:36:08.676178 <30>[ 11.415381] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
6207 11:36:08.688994 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
6208 11:36:08.712178 <30>[ 11.451196] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
6209 11:36:08.724730 [[0;32m OK [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
6210 11:36:08.750467 <30>[ 11.483136] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
6211 11:36:08.769341 <30>[ 11.512323] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
6212 11:36:08.777407 Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
6213 11:36:08.796193 <30>[ 11.538980] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
6214 11:36:08.808975 [[0;32m OK [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
6215 11:36:08.828523 <30>[ 11.571008] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
6216 11:36:08.842408 [[0;32m OK [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
6217 11:36:08.857039 <30>[ 11.603226] systemd[1]: Reached target paths.target - Path Units.
6218 11:36:08.871539 [[0;32m OK [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
6219 11:36:08.888396 <30>[ 11.630970] systemd[1]: Reached target remote-fs.target - Remote File Systems.
6220 11:36:08.900562 [[0;32m OK [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
6221 11:36:08.912749 <30>[ 11.658938] systemd[1]: Reached target slices.target - Slice Units.
6222 11:36:08.927552 [[0;32m OK [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
6223 11:36:08.941282 <30>[ 11.686965] systemd[1]: Reached target swap.target - Swaps.
6224 11:36:08.951380 [[0;32m OK [0m] Reached target [0;1;39mswap.target[0m - Swaps.
6225 11:36:08.972097 <30>[ 11.714997] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
6226 11:36:08.985586 [[0;32m OK [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
6227 11:36:09.004671 <30>[ 11.747379] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
6228 11:36:09.018623 [[0;32m OK [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
6229 11:36:09.039133 <30>[ 11.781911] systemd[1]: Listening on systemd-journald-audit.socket - Journal Audit Socket.
6230 11:36:09.053001 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…socket[0m - Journal Audit Socket.
6231 11:36:09.074519 <30>[ 11.816922] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
6232 11:36:09.088370 [[0;32m OK [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
6233 11:36:09.104847 <30>[ 11.847764] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
6234 11:36:09.117344 [[0;32m OK [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
6235 11:36:09.138124 <30>[ 11.880641] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
6236 11:36:09.151837 [[0;32m OK [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
6237 11:36:09.170816 <30>[ 11.913648] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
6238 11:36:09.184176 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
6239 11:36:09.201051 <30>[ 11.943588] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
6240 11:36:09.213690 [[0;32m OK [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
6241 11:36:09.252875 <30>[ 11.995558] systemd[1]: Mounting dev-hugepages.mount - Huge Pages File System...
6242 11:36:09.263799 Mounting [0;1;39mdev-hugepages.mount[0m - Huge Pages File System...
6243 11:36:09.283581 <30>[ 12.026414] systemd[1]: Mounting dev-mqueue.mount - POSIX Message Queue File System...
6244 11:36:09.296388 Mounting [0;1;39mdev-mqueue.mount…POSIX Message Queue File System...
6245 11:36:09.317068 <30>[ 12.060149] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
6246 11:36:09.330201 Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
6247 11:36:09.355885 <30>[ 12.092217] systemd[1]: sys-kernel-tracing.mount - Kernel Trace File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/tracing).
6248 11:36:09.396630 <30>[ 12.139473] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
6249 11:36:09.409607 Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
6250 11:36:09.434712 <30>[ 12.177550] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
6251 11:36:09.445919 Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
6252 11:36:09.474491 <30>[ 12.217213] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
6253 11:36:09.487355 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6254 11:36:09.526758 <6>[ 12.268799] device-mapper: ioctl: 4.47.0-ioctl (2022-07-28) initialised: dm-devel@redhat.com
6255 11:36:09.538081 <30>[ 12.280014] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
6256 11:36:09.551311 Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
6257 11:36:09.573753 <30>[ 12.316402] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
6258 11:36:09.588145 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6259 11:36:09.610178 <30>[ 12.352614] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
6260 11:36:09.623539 Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
6261 11:36:09.645275 <30>[ 12.387923] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
6262 11:36:09.657927 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6263 11:36:09.664948 <6>[ 12.411049] fuse: init (API version 7.37)
6264 11:36:09.713212 <30>[ 12.456182] systemd[1]: Starting systemd-journald.service - Journal Service...
6265 11:36:09.723561 Starting [0;1;39msystemd-journald.service[0m - Journal Service...
6266 11:36:09.746751 <30>[ 12.489705] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
6267 11:36:09.757641 Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
6268 11:36:09.787294 <30>[ 12.526666] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
6269 11:36:09.798815 Starting [0;1;39msystemd-network-g… units from Kernel command line...
6270 11:36:09.822647 <30>[ 12.565444] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
6271 11:36:09.835551 Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
6272 11:36:09.857935 <30>[ 12.600757] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
6273 11:36:09.870786 Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
6274 11:36:09.894306 <30>[ 12.636650] systemd[1]: Mounted dev-hugepages.mount - Huge Pages File System.
6275 11:36:09.903938 [[0;32m OK [0m] Mounted [0;1;39mdev-hugepages.mount[0m - Huge Pages File System.
6276 11:36:09.921418 <30>[ 12.664333] systemd[1]: Mounted dev-mqueue.mount - POSIX Message Queue File System.
6277 11:36:09.936012 [[0;32m OK [0m] Mounted [0;1;39mdev-mqueue.mount[…- POSIX Message Queue File System.
6278 11:36:09.942547 <3>[ 12.684682] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6279 11:36:09.954971 <30>[ 12.695778] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
6280 11:36:09.960592 <3>[ 12.701533] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6281 11:36:09.971946 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
6282 11:36:09.978607 <3>[ 12.722993] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6283 11:36:09.992119 <30>[ 12.732930] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
6284 11:36:09.998851 <3>[ 12.737908] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6285 11:36:10.019184 [[0;32m OK [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static D<3>[ 12.760575] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6286 11:36:10.019267 evice Nodes.
6287 11:36:10.034866 <3>[ 12.777414] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6288 11:36:10.042175 <30>[ 12.787375] systemd[1]: modprobe@configfs.service: Deactivated successfully.
6289 11:36:10.054123 <3>[ 12.795361] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6290 11:36:10.061997 <30>[ 12.797271] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
6291 11:36:10.071755 <3>[ 12.810931] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6292 11:36:10.085960 [[0;32m OK [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
6293 11:36:10.100995 <30>[ 12.843668] systemd[1]: Started systemd-journald.service - Journal Service.
6294 11:36:10.110864 [[0;32m OK [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
6295 11:36:10.132719 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6296 11:36:10.151078 [[0;32m OK [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
6297 11:36:10.171162 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6298 11:36:10.195668 [[0;32m OK [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
6299 11:36:10.218889 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6300 11:36:10.241974 [[0;32m OK [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
6301 11:36:10.262356 [[0;32m OK [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
6302 11:36:10.285674 [[0;32m OK [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
6303 11:36:10.311297 [[0;32m OK [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
6304 11:36:10.359031 <4>[ 13.094901] synth uevent: /devices/platform/soc/11012000.spi/spi_master/spi2/spi2.0/11012000.spi:cros-ec@0:i2c-tunnel/i2c-12/12-000b/power_supply/sbs-12-000b: failed to send uevent
6305 11:36:10.370215 <3>[ 13.112715] power_supply sbs-12-000b: uevent: failed to send synthetic uevent: -5
6306 11:36:10.389176 Mounting [0;1;39msys-fs-fuse-conne…[0m - FUSE Control File System...
6307 11:36:10.417911 Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
6308 11:36:10.465410 Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
6309 11:36:10.490820 Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
6310 11:36:10.524572 Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Ke<46>[ 13.266378] systemd-journald[321]: Received client request to flush runtime journal.
6311 11:36:10.524657 rnel Variables...
6312 11:36:10.540976 Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
6313 11:36:10.575883 [[0;32m OK [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
6314 11:36:10.593965 [[0;32m OK [0m] Mounted [0;1;39msys-fs-fuse-connec…nt[0m - FUSE Control File System.
6315 11:36:10.617344 [[0;32m OK [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
6316 11:36:10.638801 [[0;32m OK [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
6317 11:36:11.308891 [[0;32m OK [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
6318 11:36:11.642618 [[0;32m OK [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
6319 11:36:11.689021 Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
6320 11:36:12.022870 [[0;32m OK [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
6321 11:36:12.087319 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
6322 11:36:12.105324 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
6323 11:36:12.124987 [[0;32m OK [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
6324 11:36:12.172914 Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
6325 11:36:12.197890 Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
6326 11:36:12.427355 [[0;32m OK [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
6327 11:36:12.504593 Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
6328 11:36:12.522478 [[0;32m OK [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
6329 11:36:12.568128 [[0;32m OK [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
6330 11:36:12.705389 <4>[ 15.450651] power_supply_show_property: 4 callbacks suppressed
6331 11:36:12.716121 <3>[ 15.450668] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6332 11:36:12.732141 <3>[ 15.474584] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6333 11:36:12.748525 <3>[ 15.490306] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6334 11:36:12.764269 <3>[ 15.506730] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6335 11:36:12.781374 <3>[ 15.524001] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6336 11:36:12.799190 [[0;32m OK [0m] Created slice [0;1;39msystem-syste…- Slice /system/system<3>[ 15.540739] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6337 11:36:12.799275 d-backlight.
6338 11:36:12.815944 <3>[ 15.558040] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6339 11:36:12.833029 [[0;32m OK [0m] Reached target [0;1;39mbluetooth.target[0m - Bluetooth Sup<3>[ 15.574455] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6340 11:36:12.833133 port.
6341 11:36:12.848493 <3>[ 15.591208] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6342 11:36:12.865543 <3>[ 15.608048] power_supply sbs-12-000b: driver failed to report `technology' property: -5
6343 11:36:12.888664 Starting [0;1;39msystemd-backlight…ess of backlight:backlight_lcd0...
6344 11:36:12.922888 Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
6345 11:36:12.945496 Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
6346 11:36:12.993878 [[0;32m OK [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
6347 11:36:13.032649 Starting [0;1;39msystemd-rfkill.se…Load/Save RF Kill Switch Status...
6348 11:36:13.050398 [[0;32m OK [0m] Finished [0;1;39msystemd-backlight…tness of backlight:backlight_lcd0.
6349 11:36:13.133390 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
6350 11:36:13.197355 [[0;32m OK [0m] Started [0;1;39msystemd-rfkill.ser…- Load/Save RF Kill Switch Status.
6351 11:36:13.241510 Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
6352 11:36:13.265646 Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
6353 11:36:13.291903 Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
6354 11:36:13.312659 [[0;32m OK [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
6355 11:36:13.332622 [[0;32m OK [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
6356 11:36:13.349915 [[0;32m OK [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
6357 11:36:13.371493 [[0;32m OK [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
6358 11:36:13.393286 [[0;32m OK [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
6359 11:36:13.407902 [[0;32m OK [0m] Reached target [0;1;39mnetwork.target[0m - Network.
6360 11:36:13.429863 [[0;32m OK [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
6361 11:36:13.449919 [[0;32m OK [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
6362 11:36:13.474412 [[0;32m OK [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
6363 11:36:13.501112 [[0;32m OK [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
6364 11:36:13.521225 [[0;32m OK [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
6365 11:36:13.556160 [[0;32m OK [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
6366 11:36:13.576056 [[0;32m OK [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
6367 11:36:13.593222 [[0;32m OK [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
6368 11:36:13.608712 [[0;32m OK [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
6369 11:36:13.627198 [[0;32m OK [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
6370 11:36:13.645273 [[0;32m OK [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
6371 11:36:13.666441 [[0;32m OK [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
6372 11:36:13.710628 Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
6373 11:36:13.732623 Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
6374 11:36:13.762716 Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
6375 11:36:13.866717 Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
6376 11:36:13.889213 Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
6377 11:36:13.914985 [[0;32m OK [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
6378 11:36:13.935675 [[0;32m OK [0m] Reached target [0;1;39msound.target[0m - Sound Card.
6379 11:36:14.081076 [[0;32m OK [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
6380 11:36:14.124053 [[0;32m OK [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
6381 11:36:14.183055 [[0;32m OK [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
6382 11:36:14.220193 [[0;32m OK [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
6383 11:36:14.240368 [[0;32m OK [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
6384 11:36:14.277469 [[0;32m OK [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
6385 11:36:14.303823 [[0;32m OK [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
6386 11:36:14.326305 [[0;32m OK [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
6387 11:36:14.349419 [[0;32m OK [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
6388 11:36:14.398930 Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
6389 11:36:14.447791 [[0;32m OK [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
6390 11:36:14.552761
6391 11:36:14.555826 Debian GNU/Linux 12 debian-bookworm-arm64 ttyS0
6392 11:36:14.555916
6393 11:36:14.559476 debian-bookworm-arm64 login: root (automatic login)
6394 11:36:14.559551
6395 11:36:14.859915 Linux debian-bookworm-arm64 6.1.96-cip24 #1 SMP PREEMPT Wed Jul 17 11:18:13 UTC 2024 aarch64
6396 11:36:14.860039
6397 11:36:14.866525 The programs included with the Debian GNU/Linux system are free software;
6398 11:36:14.873292 the exact distribution terms for each program are described in the
6399 11:36:14.876662 individual files in /usr/share/doc/*/copyright.
6400 11:36:14.876746
6401 11:36:14.883279 Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
6402 11:36:14.886631 permitted by applicable law.
6403 11:36:15.882498 Matched prompt #10: / #
6405 11:36:15.882749 Setting prompt string to ['/ #']
6406 11:36:15.882838 end: 2.2.5.1 login-action (duration 00:00:19) [common]
6408 11:36:15.883012 end: 2.2.5 auto-login-action (duration 00:00:19) [common]
6409 11:36:15.883091 start: 2.2.6 expect-shell-connection (timeout 00:03:47) [common]
6410 11:36:15.883156 Setting prompt string to ['/ #']
6411 11:36:15.883210 Forcing a shell prompt, looking for ['/ #']
6412 11:36:15.883263 Sending line: ''
6414 11:36:15.933629 expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
6415 11:36:15.933822 Waiting using forced prompt support (timeout 00:02:30)
6416 11:36:15.939936 / #
6417 11:36:15.940228 end: 2.2.6 expect-shell-connection (duration 00:00:00) [common]
6418 11:36:15.940363 start: 2.2.7 export-device-env (timeout 00:03:47) [common]
6419 11:36:15.940501 Sending line: "export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14864610/extract-nfsrootfs-lfr77svd'"
6421 11:36:16.046333 / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/14864610/extract-nfsrootfs-lfr77svd'
6422 11:36:16.046607 Sending line: "export NFS_SERVER_IP='192.168.201.1'"
6424 11:36:16.152442 / # export NFS_SERVER_IP='192.168.201.1'
6425 11:36:16.152739 end: 2.2.7 export-device-env (duration 00:00:00) [common]
6426 11:36:16.152834 end: 2.2 depthcharge-retry (duration 00:01:13) [common]
6427 11:36:16.152939 end: 2 depthcharge-action (duration 00:01:13) [common]
6428 11:36:16.153033 start: 3 lava-test-retry (timeout 00:08:07) [common]
6429 11:36:16.153114 start: 3.1 lava-test-shell (timeout 00:08:07) [common]
6430 11:36:16.153247 Using namespace: common
6431 11:36:16.153315 Sending line: '#'
6433 11:36:16.253804 lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
6434 11:36:16.259149 / # #
6435 11:36:16.259421 Using /lava-14864610
6436 11:36:16.259484 Sending line: 'export SHELL=/bin/bash'
6438 11:36:16.365490 / # export SHELL=/bin/bash
6439 11:36:16.365756 Sending line: '. /lava-14864610/environment'
6441 11:36:16.471583 / # . /lava-14864610/environment
6442 11:36:16.476303 Sending line: '/lava-14864610/bin/lava-test-runner /lava-14864610/0'
6444 11:36:16.576768 Test shell timeout: 10s (minimum of the action and connection timeout)
6445 11:36:16.582406 / # /lava-14864610/bin/lava-test-runner /lava-14864610/0
6446 11:36:16.803430 + export TESTRUN_ID=0_timesync-off
6447 11:36:16.806799 + TESTRUN_ID=0_timesync-off
6448 11:36:16.810437 + cd /lava-14864610/0/tests/0_timesync-off
6449 11:36:16.813572 ++ cat uuid
6450 11:36:16.817246 + UUID=14864610_1.6.2.3.1
6451 11:36:16.817330 + set +x
6452 11:36:16.823710 <LAVA_SIGNAL_STARTRUN 0_timesync-off 14864610_1.6.2.3.1>
6453 11:36:16.824024 Received signal: <STARTRUN> 0_timesync-off 14864610_1.6.2.3.1
6454 11:36:16.824091 Starting test lava.0_timesync-off (14864610_1.6.2.3.1)
6455 11:36:16.824203 Skipping test definition patterns.
6456 11:36:16.827039 + systemctl stop systemd-timesyncd
6457 11:36:16.890687 + set +x
6458 11:36:16.893887 <LAVA_SIGNAL_ENDRUN 0_timesync-off 14864610_1.6.2.3.1>
6459 11:36:16.894144 Received signal: <ENDRUN> 0_timesync-off 14864610_1.6.2.3.1
6460 11:36:16.894224 Ending use of test pattern.
6461 11:36:16.894280 Ending test lava.0_timesync-off (14864610_1.6.2.3.1), duration 0.07
6463 11:36:16.955018 + export TESTRUN_ID=1_kselftest-rtc
6464 11:36:16.958374 + TESTRUN_ID=1_kselftest-rtc
6465 11:36:16.961822 + cd /lava-14864610/0/tests/1_kselftest-rtc
6466 11:36:16.964807 ++ cat uuid
6467 11:36:16.968354 + UUID=14864610_1.6.2.3.5
6468 11:36:16.968459 + set +x
6469 11:36:16.974983 <LAVA_SIGNAL_STARTRUN 1_kselftest-rtc 14864610_1.6.2.3.5>
6470 11:36:16.975247 Received signal: <STARTRUN> 1_kselftest-rtc 14864610_1.6.2.3.5
6471 11:36:16.975310 Starting test lava.1_kselftest-rtc (14864610_1.6.2.3.5)
6472 11:36:16.975382 Skipping test definition patterns.
6473 11:36:16.978109 + cd ./automated/linux/kselftest/
6474 11:36:17.007752 + ./kselftest.sh -c rtc -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz -L '' -S /dev/null -b mt8183-kukui-jacuzzi-juniper-sku16 -g cip-gitlab -e '' -p /opt/kselftests/mainline/ -n 1 -i 1 -E ''
6475 11:36:17.032331 INFO: install_deps skipped
6476 11:36:17.519908 --2024-07-17 11:36:17-- http://storage.kernelci.org/cip-gitlab/ci-pavel-linux-test/v6.1.96-cip24-23-gd25f4b93e0db9/arm64/defconfig+arm64-chromebook/gcc-12/kselftest.tar.xz
6477 11:36:17.526741 Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
6478 11:36:17.647656 Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
6479 11:36:17.777018 HTTP request sent, awaiting response... 200 OK
6480 11:36:17.779946 Length: 1920476 (1.8M) [application/octet-stream]
6481 11:36:17.783186 Saving to: 'kselftest_armhf.tar.gz'
6482 11:36:17.783263
6483 11:36:17.783323
6484 11:36:18.034595 kselftest_armhf.tar 0%[ ] 0 --.-KB/s
6485 11:36:18.292636 kselftest_armhf.tar 2%[ ] 44.98K 178KB/s
6486 11:36:18.602932 kselftest_armhf.tar 11%[=> ] 214.67K 424KB/s
6487 11:36:18.810134 kselftest_armhf.tar 44%[=======> ] 838.27K 1.01MB/s
6488 11:36:18.821038 kselftest_armhf.tar 44%[=======> ] 841.10K 830KB/s
6489 11:36:18.827661 kselftest_armhf.tar 100%[===================>] 1.83M 1.79MB/s in 1.0s
6490 11:36:18.827772
6491 11:36:19.002894 2024-07-17 11:36:18 (1.79 MB/s) - 'kselftest_armhf.tar.gz' saved [1920476/1920476]
6492 11:36:19.003022
6493 11:36:25.264357 skiplist:
6494 11:36:25.268263 ========================================
6495 11:36:25.271188 ========================================
6496 11:36:25.312000 rtc:rtctest
6497 11:36:25.330698 ============== Tests to run ===============
6498 11:36:25.330810 rtc:rtctest
6499 11:36:25.333830 ===========End Tests to run ===============
6500 11:36:25.338173 shardfile-rtc pass
6501 11:36:25.438022 <12>[ 28.183456] kselftest: Running tests in rtc
6502 11:36:25.447907 TAP version 13
6503 11:36:25.461754 1..1
6504 11:36:25.492912 # selftests: rtc: rtctest
6505 11:36:25.942875 # TAP version 13
6506 11:36:25.943002 # 1..8
6507 11:36:25.946110 # # Starting 8 tests from 2 test cases.
6508 11:36:25.949105 # # RUN rtc.date_read ...
6509 11:36:25.955926 # # rtctest.c:49:date_read:Current RTC date/time is 17/07/2024 11:36:25.
6510 11:36:25.959202 # # OK rtc.date_read
6511 11:36:25.962321 # ok 1 rtc.date_read
6512 11:36:25.965643 # # RUN rtc.date_read_loop ...
6513 11:36:25.975890 # # rtctest.c:88:date_read_loop:Continuously reading RTC time for 30s (with 11ms breaks after every read).
6514 11:36:35.476792 <6>[ 38.224999] vaux18: disabling
6515 11:36:35.480044 <6>[ 38.228735] vio28: disabling
6516 11:36:55.811883 # # rtctest.c:115:date_read_loop:Performed 2648 RTC time reads.
6517 11:36:55.815497 # # OK rtc.date_read_loop
6518 11:36:55.818692 # ok 2 rtc.date_read_loop
6519 11:36:55.822492 # # RUN rtc.uie_read ...
6520 11:36:58.794261 # # OK rtc.uie_read
6521 11:36:58.796791 # ok 3 rtc.uie_read
6522 11:36:58.800011 # # RUN rtc.uie_select ...
6523 11:37:01.794917 # # OK rtc.uie_select
6524 11:37:01.797663 # ok 4 rtc.uie_select
6525 11:37:01.801050 # # RUN rtc.alarm_alm_set ...
6526 11:37:01.807677 # # rtctest.c:202:alarm_alm_set:Alarm time now set to 11:37:05.
6527 11:37:01.810980 # # rtctest.c:207:alarm_alm_set:Expected -1 (-1) != rc (-1)
6528 11:37:01.817480 # # alarm_alm_set: Test terminated by assertion
6529 11:37:01.821121 # # FAIL rtc.alarm_alm_set
6530 11:37:01.821541 # not ok 5 rtc.alarm_alm_set
6531 11:37:01.828005 # # RUN rtc.alarm_wkalm_set ...
6532 11:37:01.834920 # # rtctest.c:258:alarm_wkalm_set:Alarm time now set to 17/07/2024 11:37:05.
6533 11:37:04.796795 # # OK rtc.alarm_wkalm_set
6534 11:37:04.797419 # ok 6 rtc.alarm_wkalm_set
6535 11:37:04.803552 # # RUN rtc.alarm_alm_set_minute ...
6536 11:37:04.806907 # # rtctest.c:304:alarm_alm_set_minute:Alarm time now set to 11:38:00.
6537 11:37:04.814276 # # rtctest.c:309:alarm_alm_set_minute:Expected -1 (-1) != rc (-1)
6538 11:37:04.820283 # # alarm_alm_set_minute: Test terminated by assertion
6539 11:37:04.823420 # # FAIL rtc.alarm_alm_set_minute
6540 11:37:04.826908 # not ok 7 rtc.alarm_alm_set_minute
6541 11:37:04.830368 # # RUN rtc.alarm_wkalm_set_minute ...
6542 11:37:04.836644 # # rtctest.c:360:alarm_wkalm_set_minute:Alarm time now set to 17/07/2024 11:38:00.
6543 11:37:59.798400 # # OK rtc.alarm_wkalm_set_minute
6544 11:37:59.801807 # ok 8 rtc.alarm_wkalm_set_minute
6545 11:37:59.805477 # # FAILED: 6 / 8 tests passed.
6546 11:37:59.808490 # # Totals: pass:6 fail:2 xfail:0 xpass:0 skip:0 error:0
6547 11:37:59.811581 not ok 1 selftests: rtc: rtctest # exit=1
6548 11:38:01.381886 rtc_rtctest_rtc_date_read pass
6549 11:38:01.385897 rtc_rtctest_rtc_date_read_loop pass
6550 11:38:01.388371 rtc_rtctest_rtc_uie_read pass
6551 11:38:01.391959 rtc_rtctest_rtc_uie_select pass
6552 11:38:01.394948 rtc_rtctest_rtc_alarm_alm_set fail
6553 11:38:01.398754 rtc_rtctest_rtc_alarm_wkalm_set pass
6554 11:38:01.402015 rtc_rtctest_rtc_alarm_alm_set_minute fail
6555 11:38:01.405236 rtc_rtctest_rtc_alarm_wkalm_set_minute pass
6556 11:38:01.408258 rtc_rtctest fail
6557 11:38:01.473279 + ../../utils/send-to-lava.sh ./output/result.txt
6558 11:38:01.546847 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-rtc RESULT=pass>
6559 11:38:01.547602 Received signal: <TESTCASE> TEST_CASE_ID=shardfile-rtc RESULT=pass
6561 11:38:01.601863 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_date_read RESULT=pass>
6562 11:38:01.602500 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_date_read RESULT=pass
6564 11:38:01.655287 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_date_read_loop RESULT=pass>
6565 11:38:01.655918 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_date_read_loop RESULT=pass
6567 11:38:01.703072 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_uie_read RESULT=pass>
6568 11:38:01.703701 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_uie_read RESULT=pass
6570 11:38:01.759492 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_uie_select RESULT=pass>
6571 11:38:01.760122 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_uie_select RESULT=pass
6573 11:38:01.815456 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set RESULT=fail>
6574 11:38:01.816109 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set RESULT=fail
6576 11:38:01.868857 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set RESULT=pass>
6577 11:38:01.869537 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set RESULT=pass
6579 11:38:01.923630 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set_minute RESULT=fail>
6580 11:38:01.924261 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_alm_set_minute RESULT=fail
6582 11:38:01.974817 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set_minute RESULT=pass>
6583 11:38:01.975444 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest_rtc_alarm_wkalm_set_minute RESULT=pass
6585 11:38:02.014207 <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=rtc_rtctest RESULT=fail>
6586 11:38:02.014289 + set +x
6587 11:38:02.014516 Received signal: <TESTCASE> TEST_CASE_ID=rtc_rtctest RESULT=fail
6589 11:38:02.020723 <LAVA_SIGNAL_ENDRUN 1_kselftest-rtc 14864610_1.6.2.3.5>
6590 11:38:02.020965 Received signal: <ENDRUN> 1_kselftest-rtc 14864610_1.6.2.3.5
6591 11:38:02.021035 Ending use of test pattern.
6592 11:38:02.021091 Ending test lava.1_kselftest-rtc (14864610_1.6.2.3.5), duration 105.05
6594 11:38:02.021346 ok: lava_test_shell seems to have completed
6595 11:38:02.021473 shardfile-rtc: pass
rtc_rtctest_rtc_date_read: pass
rtc_rtctest_rtc_date_read_loop: pass
rtc_rtctest_rtc_uie_read: pass
rtc_rtctest_rtc_uie_select: pass
rtc_rtctest_rtc_alarm_alm_set: fail
rtc_rtctest_rtc_alarm_wkalm_set: pass
rtc_rtctest_rtc_alarm_alm_set_minute: fail
rtc_rtctest_rtc_alarm_wkalm_set_minute: pass
rtc_rtctest: fail
6596 11:38:02.021564 end: 3.1 lava-test-shell (duration 00:01:46) [common]
6597 11:38:02.021644 end: 3 lava-test-retry (duration 00:01:46) [common]
6598 11:38:02.021724 start: 4 finalize (timeout 00:06:22) [common]
6599 11:38:02.021805 start: 4.1 power-off (timeout 00:00:30) [common]
6600 11:38:02.021943 Calling: ['pduclient', '--daemon=localhost', '--hostname=mt8183-kukui-jacuzzi-juniper-sku16-cbg-3', '--port=1', '--command=off']
6601 11:38:04.105352 >> Command sent successfully.
6602 11:38:04.118935 Returned 0 in 2 seconds
6603 11:38:04.119572 end: 4.1 power-off (duration 00:00:02) [common]
6605 11:38:04.120740 start: 4.2 read-feedback (timeout 00:06:19) [common]
6607 11:38:04.122166 Listened to connection for namespace 'common' for up to 1s
6608 11:38:05.122402 Finalising connection for namespace 'common'
6609 11:38:05.123075 Disconnecting from shell: Finalise
6610 11:38:05.123511 / #
6611 11:38:05.224073 end: 4.2 read-feedback (duration 00:00:01) [common]
6612 11:38:05.224236 end: 4 finalize (duration 00:00:03) [common]
6613 11:38:05.224376 Cleaning after the job
6614 11:38:05.224501 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/ramdisk
6615 11:38:05.227022 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/kernel
6616 11:38:05.239413 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/dtb
6617 11:38:05.239593 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/nfsrootfs
6618 11:38:05.305512 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/14864610/tftp-deploy-970h3d48/modules
6619 11:38:05.311145 Removing override tmp directory at /var/lib/lava/dispatcher/tmp/14864610
6620 11:38:05.863745 Removing root tmp directory at /var/lib/lava/dispatcher/tmp/14864610
6621 11:38:05.863906 Job finished correctly