Boot log: asus-cx9400-volteer

    1 01:51:26.262411  lava-dispatcher, installed at version: 2022.10
    2 01:51:26.262593  start: 0 validate
    3 01:51:26.262725  Start time: 2022-11-16 01:51:26.262718+00:00 (UTC)
    4 01:51:26.262850  Using caching service: 'http://localhost/cache/?uri=%s'
    5 01:51:26.262975  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20221107.1%2Fx86%2Frootfs.cpio.gz exists
    6 01:51:26.555428  Using caching service: 'http://localhost/cache/?uri=%s'
    7 01:51:26.556169  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.265-cip85-rt27%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 01:51:28.562351  Using caching service: 'http://localhost/cache/?uri=%s'
    9 01:51:28.563060  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.265-cip85-rt27%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   10 01:51:28.578864  validate duration: 2.32
   12 01:51:28.580200  start: 1 tftp-deploy (timeout 00:10:00) [common]
   13 01:51:28.580831  start: 1.1 download-retry (timeout 00:10:00) [common]
   14 01:51:28.581434  start: 1.1.1 http-download (timeout 00:10:00) [common]
   15 01:51:28.582063  Not decompressing ramdisk as can be used compressed.
   16 01:51:28.582535  downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20221107.1/x86/rootfs.cpio.gz
   17 01:51:28.582915  saving as /var/lib/lava/dispatcher/tmp/7989938/tftp-deploy-asox6jve/ramdisk/rootfs.cpio.gz
   18 01:51:28.583262  total size: 8415749 (8MB)
   19 01:51:28.596450  progress   0% (0MB)
   20 01:51:28.610574  progress   5% (0MB)
   21 01:51:28.626337  progress  10% (0MB)
   22 01:51:28.644827  progress  15% (1MB)
   23 01:51:28.658283  progress  20% (1MB)
   24 01:51:28.674397  progress  25% (2MB)
   25 01:51:28.689506  progress  30% (2MB)
   26 01:51:28.700701  progress  35% (2MB)
   27 01:51:28.719284  progress  40% (3MB)
   28 01:51:28.749623  progress  45% (3MB)
   29 01:51:28.783059  progress  50% (4MB)
   30 01:51:28.824050  progress  55% (4MB)
   31 01:51:28.859383  progress  60% (4MB)
   32 01:51:28.899271  progress  65% (5MB)
   33 01:51:28.922510  progress  70% (5MB)
   34 01:51:28.971230  progress  75% (6MB)
   35 01:51:29.014843  progress  80% (6MB)
   36 01:51:29.055827  progress  85% (6MB)
   37 01:51:29.101264  progress  90% (7MB)
   38 01:51:29.145802  progress  95% (7MB)
   39 01:51:29.183965  progress 100% (8MB)
   40 01:51:29.185527  8MB downloaded in 0.60s (13.33MB/s)
   41 01:51:29.186358  end: 1.1.1 http-download (duration 00:00:01) [common]
   43 01:51:29.187970  end: 1.1 download-retry (duration 00:00:01) [common]
   44 01:51:29.188511  start: 1.2 download-retry (timeout 00:09:59) [common]
   45 01:51:29.189042  start: 1.2.1 http-download (timeout 00:09:59) [common]
   46 01:51:29.189645  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.265-cip85-rt27/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
   47 01:51:29.190077  saving as /var/lib/lava/dispatcher/tmp/7989938/tftp-deploy-asox6jve/kernel/bzImage
   48 01:51:29.190448  total size: 9281536 (8MB)
   49 01:51:29.190857  No compression specified
   50 01:51:29.205562  progress   0% (0MB)
   51 01:51:29.226189  progress   5% (0MB)
   52 01:51:29.238007  progress  10% (0MB)
   53 01:51:29.254050  progress  15% (1MB)
   54 01:51:29.270166  progress  20% (1MB)
   55 01:51:29.288478  progress  25% (2MB)
   56 01:51:29.306213  progress  30% (2MB)
   57 01:51:29.322860  progress  35% (3MB)
   58 01:51:29.337438  progress  40% (3MB)
   59 01:51:29.352139  progress  45% (4MB)
   60 01:51:29.367920  progress  50% (4MB)
   61 01:51:29.379870  progress  55% (4MB)
   62 01:51:29.392188  progress  60% (5MB)
   63 01:51:29.409816  progress  65% (5MB)
   64 01:51:29.422240  progress  70% (6MB)
   65 01:51:29.441062  progress  75% (6MB)
   66 01:51:29.454319  progress  80% (7MB)
   67 01:51:29.469771  progress  85% (7MB)
   68 01:51:29.486945  progress  90% (7MB)
   69 01:51:29.505827  progress  95% (8MB)
   70 01:51:29.521288  progress 100% (8MB)
   71 01:51:29.521522  8MB downloaded in 0.33s (26.74MB/s)
   72 01:51:29.521705  end: 1.2.1 http-download (duration 00:00:00) [common]
   74 01:51:29.521960  end: 1.2 download-retry (duration 00:00:00) [common]
   75 01:51:29.522058  start: 1.3 download-retry (timeout 00:09:59) [common]
   76 01:51:29.522152  start: 1.3.1 http-download (timeout 00:09:59) [common]
   77 01:51:29.522265  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.265-cip85-rt27/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
   78 01:51:29.522337  saving as /var/lib/lava/dispatcher/tmp/7989938/tftp-deploy-asox6jve/modules/modules.tar
   79 01:51:29.522402  total size: 64572 (0MB)
   80 01:51:29.522467  Using unxz to decompress xz
   81 01:51:29.534865  progress  50% (0MB)
   82 01:51:29.537522  progress 100% (0MB)
   83 01:51:29.541465  0MB downloaded in 0.02s (3.23MB/s)
   84 01:51:29.541816  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 01:51:29.542205  end: 1.3 download-retry (duration 00:00:00) [common]
   87 01:51:29.542349  start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
   88 01:51:29.542494  start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
   89 01:51:29.542626  end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
   90 01:51:29.542783  start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
   91 01:51:29.543044  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo
   92 01:51:29.543221  makedir: /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin
   93 01:51:29.543362  makedir: /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/tests
   94 01:51:29.543508  makedir: /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/results
   95 01:51:29.543690  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-add-keys
   96 01:51:29.543907  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-add-sources
   97 01:51:29.544101  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-background-process-start
   98 01:51:29.544291  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-background-process-stop
   99 01:51:29.544479  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-common-functions
  100 01:51:29.544664  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-echo-ipv4
  101 01:51:29.544851  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-install-packages
  102 01:51:29.545036  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-installed-packages
  103 01:51:29.545217  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-os-build
  104 01:51:29.545399  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-probe-channel
  105 01:51:29.545592  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-probe-ip
  106 01:51:29.545778  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-target-ip
  107 01:51:29.545958  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-target-mac
  108 01:51:29.546138  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-target-storage
  109 01:51:29.546324  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-test-case
  110 01:51:29.546508  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-test-event
  111 01:51:29.546690  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-test-feedback
  112 01:51:29.546882  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-test-raise
  113 01:51:29.547072  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-test-reference
  114 01:51:29.547254  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-test-runner
  115 01:51:29.547434  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-test-set
  116 01:51:29.547613  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-test-shell
  117 01:51:29.547799  Updating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-install-packages (oe)
  118 01:51:29.547988  Updating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/bin/lava-installed-packages (oe)
  119 01:51:29.548156  Creating /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/environment
  120 01:51:29.548303  LAVA metadata
  121 01:51:29.548421  - LAVA_JOB_ID=7989938
  122 01:51:29.548531  - LAVA_DISPATCHER_IP=192.168.201.1
  123 01:51:29.548700  start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
  124 01:51:29.548809  skipped lava-vland-overlay
  125 01:51:29.548937  end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
  126 01:51:29.549077  start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
  127 01:51:29.549185  skipped lava-multinode-overlay
  128 01:51:29.549309  end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  129 01:51:29.549447  start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
  130 01:51:29.549581  Loading test definitions
  131 01:51:29.549742  start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
  132 01:51:29.549866  Using /lava-7989938 at stage 0
  133 01:51:29.550297  uuid=7989938_1.4.2.3.1 testdef=None
  134 01:51:29.550449  end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
  135 01:51:29.550597  start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
  136 01:51:29.551426  end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
  138 01:51:29.551811  start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
  139 01:51:29.552769  end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
  141 01:51:29.553168  start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
  142 01:51:29.554070  runner path: /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/0/tests/0_dmesg test_uuid 7989938_1.4.2.3.1
  143 01:51:29.554318  end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  145 01:51:29.554706  start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
  146 01:51:29.554829  Using /lava-7989938 at stage 1
  147 01:51:29.555230  uuid=7989938_1.4.2.3.5 testdef=None
  148 01:51:29.555383  end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
  149 01:51:29.555530  start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
  150 01:51:29.556261  end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
  152 01:51:29.556635  start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
  153 01:51:29.557596  end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
  155 01:51:29.557992  start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
  156 01:51:29.558895  runner path: /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/1/tests/1_bootrr test_uuid 7989938_1.4.2.3.5
  157 01:51:29.559130  end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
  159 01:51:29.559477  Creating lava-test-runner.conf files
  160 01:51:29.559585  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/0 for stage 0
  161 01:51:29.559720  - 0_dmesg
  162 01:51:29.559841  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7989938/lava-overlay-q27wu6zo/lava-7989938/1 for stage 1
  163 01:51:29.559977  - 1_bootrr
  164 01:51:29.560127  end: 1.4.2.3 test-definition (duration 00:00:00) [common]
  165 01:51:29.560274  start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
  166 01:51:29.569818  end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
  167 01:51:29.569976  start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
  168 01:51:29.570111  end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  169 01:51:29.570237  end: 1.4.2 lava-overlay (duration 00:00:00) [common]
  170 01:51:29.570362  start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
  171 01:51:29.755533  end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  172 01:51:29.755881  start: 1.4.4 extract-modules (timeout 00:09:59) [common]
  173 01:51:29.755989  extracting modules file /var/lib/lava/dispatcher/tmp/7989938/tftp-deploy-asox6jve/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7989938/extract-overlay-ramdisk-tv5f6tcx/ramdisk
  174 01:51:29.760045  end: 1.4.4 extract-modules (duration 00:00:00) [common]
  175 01:51:29.760156  start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
  176 01:51:29.760240  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7989938/compress-overlay-rk42vt3l/overlay-1.4.2.4.tar.gz to ramdisk
  177 01:51:29.760312  [common] Applying overlay /var/lib/lava/dispatcher/tmp/7989938/compress-overlay-rk42vt3l/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7989938/extract-overlay-ramdisk-tv5f6tcx/ramdisk
  178 01:51:29.764007  end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
  179 01:51:29.764135  start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
  180 01:51:29.764242  end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
  181 01:51:29.764333  start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
  182 01:51:29.764411  Building ramdisk /var/lib/lava/dispatcher/tmp/7989938/extract-overlay-ramdisk-tv5f6tcx/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7989938/extract-overlay-ramdisk-tv5f6tcx/ramdisk
  183 01:51:29.828132  >> 48237 blocks

  184 01:51:30.568988  rename /var/lib/lava/dispatcher/tmp/7989938/extract-overlay-ramdisk-tv5f6tcx/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7989938/tftp-deploy-asox6jve/ramdisk/ramdisk.cpio.gz
  185 01:51:30.569412  end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
  186 01:51:30.569543  start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
  187 01:51:30.569645  start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
  188 01:51:30.569742  No mkimage arch provided, not using FIT.
  189 01:51:30.569832  end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
  190 01:51:30.569918  end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
  191 01:51:30.570014  end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
  192 01:51:30.570109  start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
  193 01:51:30.570187  No LXC device requested
  194 01:51:30.570273  end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
  195 01:51:30.570361  start: 1.6 deploy-device-env (timeout 00:09:58) [common]
  196 01:51:30.570443  end: 1.6 deploy-device-env (duration 00:00:00) [common]
  197 01:51:30.570517  Checking files for TFTP limit of 4294967296 bytes.
  198 01:51:30.570910  end: 1 tftp-deploy (duration 00:00:02) [common]
  199 01:51:30.571020  start: 2 depthcharge-action (timeout 00:05:00) [common]
  200 01:51:30.571118  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  201 01:51:30.571244  substitutions:
  202 01:51:30.571311  - {DTB}: None
  203 01:51:30.571378  - {INITRD}: 7989938/tftp-deploy-asox6jve/ramdisk/ramdisk.cpio.gz
  204 01:51:30.571440  - {KERNEL}: 7989938/tftp-deploy-asox6jve/kernel/bzImage
  205 01:51:30.571499  - {LAVA_MAC}: None
  206 01:51:30.571557  - {PRESEED_CONFIG}: None
  207 01:51:30.571614  - {PRESEED_LOCAL}: None
  208 01:51:30.571670  - {RAMDISK}: 7989938/tftp-deploy-asox6jve/ramdisk/ramdisk.cpio.gz
  209 01:51:30.571727  - {ROOT_PART}: None
  210 01:51:30.571783  - {ROOT}: None
  211 01:51:30.571840  - {SERVER_IP}: 192.168.201.1
  212 01:51:30.571896  - {TEE}: None
  213 01:51:30.571954  Parsed boot commands:
  214 01:51:30.572008  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  215 01:51:30.572160  Parsed boot commands: tftpboot 192.168.201.1 7989938/tftp-deploy-asox6jve/kernel/bzImage 7989938/tftp-deploy-asox6jve/kernel/cmdline 7989938/tftp-deploy-asox6jve/ramdisk/ramdisk.cpio.gz
  216 01:51:30.572252  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  217 01:51:30.572346  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  218 01:51:30.572444  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  219 01:51:30.572534  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  220 01:51:30.572606  Not connected, no need to disconnect.
  221 01:51:30.572683  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  222 01:51:30.572766  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  223 01:51:30.572833  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-10'
  224 01:51:30.575449  Setting prompt string to ['lava-test: # ']
  225 01:51:30.575735  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  226 01:51:30.575872  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  227 01:51:30.575972  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  228 01:51:30.576065  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  229 01:51:30.576247  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=reboot'
  230 01:51:30.594652  >> Command sent successfully.

  231 01:51:30.596504  Returned 0 in 0 seconds
  232 01:51:30.697275  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  234 01:51:30.700014  end: 2.2.2 reset-device (duration 00:00:00) [common]
  235 01:51:30.700545  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  236 01:51:30.701029  Setting prompt string to 'Starting depthcharge on Voema...'
  237 01:51:30.701396  Changing prompt to 'Starting depthcharge on Voema...'
  238 01:51:30.701824  depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
  239 01:51:30.702887  [Enter `^Ec?' for help]
  240 01:51:38.616999  
  241 01:51:38.617173  
  242 01:51:38.626459  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
  243 01:51:38.629768  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
  244 01:51:38.633167  
  245 01:51:38.636207  CPU: ID 806c1, Tigerlake B0, ucode: 00000086
  246 01:51:38.639700  CPU: AES supported, TXT NOT supported, VT supported
  247 01:51:38.643203  
  248 01:51:38.646411  MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
  249 01:51:38.650373  PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
  250 01:51:38.656975  IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
  251 01:51:38.660690  VBOOT: Loading verstage.
  252 01:51:38.663662  FMAP: Found "FLASH" version 1.1 at 0x1804000.
  253 01:51:38.670153  FMAP: base = 0x0 size = 0x2000000 #areas = 32
  254 01:51:38.673544  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  255 01:51:38.683837  CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
  256 01:51:38.689819  CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
  257 01:51:38.689935  
  258 01:51:38.690010  
  259 01:51:38.700887  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 verstage starting (log level: 8)...
  260 01:51:38.717361  Probing TPM: . done!
  261 01:51:38.720226  TPM ready after 0 ms
  262 01:51:38.723589  Connected to device vid:did:rid of 1ae0:0028:00
  263 01:51:38.734843  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
  264 01:51:38.741701  Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
  265 01:51:38.744833  Initialized TPM device CR50 revision 0
  266 01:51:38.801503  tlcl_send_startup: Startup return code is 0
  267 01:51:38.801655  TPM: setup succeeded
  268 01:51:38.816764  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
  269 01:51:38.830992  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  270 01:51:38.844015  VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
  271 01:51:38.853418  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
  272 01:51:38.857365  Chrome EC: UHEPI supported
  273 01:51:38.860606  Phase 1
  274 01:51:38.863796  FMAP: area GBB found @ 1805000 (458752 bytes)
  275 01:51:38.870691  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  276 01:51:38.873709  
  277 01:51:38.880666  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  278 01:51:38.887002  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  279 01:51:38.893442  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
  280 01:51:38.897018  Recovery requested (1009000e)
  281 01:51:38.900638  TPM: Extending digest for VBOOT: boot mode into PCR 0
  282 01:51:38.912285  tlcl_extend: response is 0
  283 01:51:38.918367  TPM: Extending digest for VBOOT: GBB HWID into PCR 1
  284 01:51:38.928380  tlcl_extend: response is 0
  285 01:51:38.935262  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  286 01:51:38.941438  CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
  287 01:51:38.948013  BS: verstage times (exec / console): total (unknown) / 142 ms
  288 01:51:38.948121  
  289 01:51:38.948213  
  290 01:51:38.961142  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 romstage starting (log level: 8)...
  291 01:51:38.968087  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  292 01:51:38.971225  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  293 01:51:38.974818  gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
  294 01:51:38.981171  gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
  295 01:51:38.984310  gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
  296 01:51:38.987905  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
  297 01:51:38.991191  TCO_STS:   0000 0000
  298 01:51:38.994559  GEN_PMCON: d0015038 00002200
  299 01:51:38.998306  GBLRST_CAUSE: 00000000 00000000
  300 01:51:39.001394  HPR_CAUSE0: 00000000
  301 01:51:39.001496  prev_sleep_state 5
  302 01:51:39.004229  Boot Count incremented to 9830
  303 01:51:39.011230  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  304 01:51:39.017712  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  305 01:51:39.027539  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  306 01:51:39.034123  CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
  307 01:51:39.037233  Chrome EC: UHEPI supported
  308 01:51:39.043877  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  309 01:51:39.055199  Probing TPM:  done!
  310 01:51:39.061501  Connected to device vid:did:rid of 1ae0:0028:00
  311 01:51:39.071767  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
  312 01:51:39.075591  Initialized TPM device CR50 revision 0
  313 01:51:39.090183  src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
  314 01:51:39.096257  MRC: Hash idx 0x100b comparison successful.
  315 01:51:39.099964  MRC cache found, size faa8
  316 01:51:39.100083  bootmode is set to: 2
  317 01:51:39.103217  SPD index = 2
  318 01:51:39.109991  CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
  319 01:51:39.113292  SPD: module type is LPDDR4X
  320 01:51:39.116381  SPD: module part number is MT53D1G64D4NW-046
  321 01:51:39.122691  SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
  322 01:51:39.126455  SPD: device width 16 bits, bus width 16 bits
  323 01:51:39.133368  SPD: module size is 2048 MB (per channel)
  324 01:51:39.563605  CBMEM:
  325 01:51:39.567060  IMD: root @ 0x76fff000 254 entries.
  326 01:51:39.570536  IMD: root @ 0x76ffec00 62 entries.
  327 01:51:39.573964  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
  328 01:51:39.580461  FMAP: area RW_VPD found @ f35000 (8192 bytes)
  329 01:51:39.583375  External stage cache:
  330 01:51:39.586789  IMD: root @ 0x7b3ff000 254 entries.
  331 01:51:39.590245  IMD: root @ 0x7b3fec00 62 entries.
  332 01:51:39.604906  FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
  333 01:51:39.611541  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
  334 01:51:39.617945  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
  335 01:51:39.631539  MRC: 'RECOVERY_MRC_CACHE' does not need update.
  336 01:51:39.638378  cse_lite: Skip switching to RW in the recovery path
  337 01:51:39.638556  8 DIMMs found
  338 01:51:39.638631  SMM Memory Map
  339 01:51:39.641907  SMRAM       : 0x7b000000 0x800000
  340 01:51:39.645419  
  341 01:51:39.648252   Subregion 0: 0x7b000000 0x200000
  342 01:51:39.651546   Subregion 1: 0x7b200000 0x200000
  343 01:51:39.655210   Subregion 2: 0x7b400000 0x400000
  344 01:51:39.655330  top_of_ram = 0x77000000
  345 01:51:39.661748  MTRR Range: Start=76000000 End=77000000 (Size 1000000)
  346 01:51:39.668370  MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
  347 01:51:39.671758  MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
  348 01:51:39.678453  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  349 01:51:39.684674  CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
  350 01:51:39.691460  Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
  351 01:51:39.701614  Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
  352 01:51:39.704950  Processing 211 relocs. Offset value of 0x74c0b000
  353 01:51:39.708378  
  354 01:51:39.715103  BS: romstage times (exec / console): total (unknown) / 276 ms
  355 01:51:39.720160  
  356 01:51:39.720266  
  357 01:51:39.730311  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 postcar starting (log level: 8)...
  358 01:51:39.733372  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  359 01:51:39.743584  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  360 01:51:39.749912  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  361 01:51:39.756807  CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
  362 01:51:39.763515  Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
  363 01:51:39.807241  Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
  364 01:51:39.813669  Processing 5008 relocs. Offset value of 0x75d98000
  365 01:51:39.817105  BS: postcar times (exec / console): total (unknown) / 59 ms
  366 01:51:39.820253  
  367 01:51:39.820347  
  368 01:51:39.830371  coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May  4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
  369 01:51:39.830487  Normal boot
  370 01:51:39.833588  FW_CONFIG value is 0x804c02
  371 01:51:39.836835  PCI: 00:07.0 disabled by fw_config
  372 01:51:39.840289  PCI: 00:07.1 disabled by fw_config
  373 01:51:39.843707  PCI: 00:0d.2 disabled by fw_config
  374 01:51:39.849941  PCI: 00:1c.7 disabled by fw_config
  375 01:51:39.853189  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  376 01:51:39.860033  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  377 01:51:39.863249  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
  378 01:51:39.869980  GENERIC: 0.0 disabled by fw_config
  379 01:51:39.873014  GENERIC: 1.0 disabled by fw_config
  380 01:51:39.876801  fw_config match found: DB_USB=USB3_ACTIVE
  381 01:51:39.879748  fw_config match found: DB_USB=USB3_ACTIVE
  382 01:51:39.883143  fw_config match found: DB_USB=USB3_ACTIVE
  383 01:51:39.890125  fw_config match found: DB_USB=USB3_ACTIVE
  384 01:51:39.893138  FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
  385 01:51:39.899467  MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
  386 01:51:39.903108  
  387 01:51:39.910141  MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
  388 01:51:39.916243  CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
  389 01:51:39.920545  microcode: sig=0x806c1 pf=0x80 revision=0x86
  390 01:51:39.927276  microcode: Update skipped, already up-to-date
  391 01:51:39.933591  CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
  392 01:51:39.960856  Detected 4 core, 8 thread CPU.
  393 01:51:39.964228  Setting up SMI for CPU
  394 01:51:39.967187  IED base = 0x7b400000
  395 01:51:39.967293  IED size = 0x00400000
  396 01:51:39.970565  Will perform SMM setup.
  397 01:51:39.977031  CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
  398 01:51:39.983784  Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
  399 01:51:39.990480  Processing 16 relocs. Offset value of 0x00030000
  400 01:51:39.993890  Attempting to start 7 APs
  401 01:51:39.997040  Waiting for 10ms after sending INIT.
  402 01:51:40.012564  Waiting for 1st SIPI to complete...done.
  403 01:51:40.012710  AP: slot 2 apic_id 1.
  404 01:51:40.015682  AP: slot 4 apic_id 7.
  405 01:51:40.019373  AP: slot 5 apic_id 6.
  406 01:51:40.019465  AP: slot 6 apic_id 2.
  407 01:51:40.022261  AP: slot 3 apic_id 3.
  408 01:51:40.025697  AP: slot 1 apic_id 5.
  409 01:51:40.025784  AP: slot 7 apic_id 4.
  410 01:51:40.029124  
  411 01:51:40.032363  Waiting for 2nd SIPI to complete...done.
  412 01:51:40.038750  Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
  413 01:51:40.045497  Processing 13 relocs. Offset value of 0x00038000
  414 01:51:40.048676  Unable to locate Global NVS
  415 01:51:40.055692  SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
  416 01:51:40.058760  Installing permanent SMM handler to 0x7b000000
  417 01:51:40.068552  Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
  418 01:51:40.072114  Processing 794 relocs. Offset value of 0x7b010000
  419 01:51:40.081665  Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
  420 01:51:40.085183  Processing 13 relocs. Offset value of 0x7b008000
  421 01:51:40.091533  SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
  422 01:51:40.098460  SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
  423 01:51:40.104799  SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
  424 01:51:40.108099  SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
  425 01:51:40.115051  SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
  426 01:51:40.121732  SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
  427 01:51:40.127943  SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
  428 01:51:40.131691  Unable to locate Global NVS
  429 01:51:40.138462  SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
  430 01:51:40.141233  Clearing SMI status registers
  431 01:51:40.145351  SMI_STS: PM1 
  432 01:51:40.145437  PM1_STS: PWRBTN 
  433 01:51:40.151178  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
  434 01:51:40.154852  In relocation handler: CPU 0
  435 01:51:40.157864  New SMBASE=0x7b000000 IEDBASE=0x7b400000
  436 01:51:40.164913  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  437 01:51:40.167792  Relocation complete.
  438 01:51:40.174354  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
  439 01:51:40.177777  In relocation handler: CPU 2
  440 01:51:40.181034  New SMBASE=0x7afff800 IEDBASE=0x7b400000
  441 01:51:40.184352  Relocation complete.
  442 01:51:40.190922  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
  443 01:51:40.194167  In relocation handler: CPU 7
  444 01:51:40.197370  New SMBASE=0x7affe400 IEDBASE=0x7b400000
  445 01:51:40.201066  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  446 01:51:40.203925  Relocation complete.
  447 01:51:40.210768  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
  448 01:51:40.214421  In relocation handler: CPU 1
  449 01:51:40.217345  New SMBASE=0x7afffc00 IEDBASE=0x7b400000
  450 01:51:40.221095  Relocation complete.
  451 01:51:40.227404  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
  452 01:51:40.230226  In relocation handler: CPU 4
  453 01:51:40.233750  New SMBASE=0x7afff000 IEDBASE=0x7b400000
  454 01:51:40.236977  Relocation complete.
  455 01:51:40.243612  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
  456 01:51:40.246693  In relocation handler: CPU 5
  457 01:51:40.250216  New SMBASE=0x7affec00 IEDBASE=0x7b400000
  458 01:51:40.257022  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  459 01:51:40.257176  Relocation complete.
  460 01:51:40.266917  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
  461 01:51:40.267039  In relocation handler: CPU 3
  462 01:51:40.270420  
  463 01:51:40.273345  New SMBASE=0x7afff400 IEDBASE=0x7b400000
  464 01:51:40.273444  Relocation complete.
  465 01:51:40.283169  smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
  466 01:51:40.283267  In relocation handler: CPU 6
  467 01:51:40.286473  
  468 01:51:40.290177  New SMBASE=0x7affe800 IEDBASE=0x7b400000
  469 01:51:40.293316  Writing SMRR. base = 0x7b000006, mask=0xff800c00
  470 01:51:40.296600  Relocation complete.
  471 01:51:40.300227  Initializing CPU #0
  472 01:51:40.303172  CPU: vendor Intel device 806c1
  473 01:51:40.306590  CPU: family 06, model 8c, stepping 01
  474 01:51:40.310082  Clearing out pending MCEs
  475 01:51:40.310171  Setting up local APIC...
  476 01:51:40.312979   apic_id: 0x00 done.
  477 01:51:40.316227  Turbo is available but hidden
  478 01:51:40.319388  Turbo is available and visible
  479 01:51:40.323353  microcode: Update skipped, already up-to-date
  480 01:51:40.325968  CPU #0 initialized
  481 01:51:40.330002  Initializing CPU #4
  482 01:51:40.330080  Initializing CPU #5
  483 01:51:40.332998  CPU: vendor Intel device 806c1
  484 01:51:40.336397  CPU: family 06, model 8c, stepping 01
  485 01:51:40.339446  CPU: vendor Intel device 806c1
  486 01:51:40.342656  CPU: family 06, model 8c, stepping 01
  487 01:51:40.345720  Clearing out pending MCEs
  488 01:51:40.349308  Clearing out pending MCEs
  489 01:51:40.352571  Setting up local APIC...
  490 01:51:40.352652  Initializing CPU #7
  491 01:51:40.355694  Initializing CPU #1
  492 01:51:40.359304  CPU: vendor Intel device 806c1
  493 01:51:40.362269  CPU: family 06, model 8c, stepping 01
  494 01:51:40.365907  CPU: vendor Intel device 806c1
  495 01:51:40.369186  CPU: family 06, model 8c, stepping 01
  496 01:51:40.373038  Clearing out pending MCEs
  497 01:51:40.377137  Clearing out pending MCEs
  498 01:51:40.377251  Setting up local APIC...
  499 01:51:40.380191  Initializing CPU #3
  500 01:51:40.380318  Initializing CPU #6
  501 01:51:40.383540   apic_id: 0x04 done.
  502 01:51:40.386568  Setting up local APIC...
  503 01:51:40.386646  Initializing CPU #2
  504 01:51:40.390277  Setting up local APIC...
  505 01:51:40.393802  CPU: vendor Intel device 806c1
  506 01:51:40.396929  CPU: family 06, model 8c, stepping 01
  507 01:51:40.400197  CPU: vendor Intel device 806c1
  508 01:51:40.403162  CPU: family 06, model 8c, stepping 01
  509 01:51:40.406765  Clearing out pending MCEs
  510 01:51:40.409760   apic_id: 0x07 done.
  511 01:51:40.409843   apic_id: 0x06 done.
  512 01:51:40.413131  
  513 01:51:40.413213  Setting up local APIC...
  514 01:51:40.416775   apic_id: 0x05 done.
  515 01:51:40.419938  microcode: Update skipped, already up-to-date
  516 01:51:40.426372  microcode: Update skipped, already up-to-date
  517 01:51:40.426464  CPU #7 initialized
  518 01:51:40.433347  microcode: Update skipped, already up-to-date
  519 01:51:40.433435  CPU #1 initialized
  520 01:51:40.436452  CPU #4 initialized
  521 01:51:40.439580  microcode: Update skipped, already up-to-date
  522 01:51:40.443557  Clearing out pending MCEs
  523 01:51:40.446344  CPU: vendor Intel device 806c1
  524 01:51:40.449551  CPU: family 06, model 8c, stepping 01
  525 01:51:40.452861  Setting up local APIC...
  526 01:51:40.452946  CPU #5 initialized
  527 01:51:40.456306  
  528 01:51:40.456412   apic_id: 0x01 done.
  529 01:51:40.459452  Clearing out pending MCEs
  530 01:51:40.463290   apic_id: 0x03 done.
  531 01:51:40.463388  Setting up local APIC...
  532 01:51:40.469189  microcode: Update skipped, already up-to-date
  533 01:51:40.469286   apic_id: 0x02 done.
  534 01:51:40.472529  CPU #3 initialized
  535 01:51:40.475677  microcode: Update skipped, already up-to-date
  536 01:51:40.482554  microcode: Update skipped, already up-to-date
  537 01:51:40.482676  CPU #6 initialized
  538 01:51:40.485831  CPU #2 initialized
  539 01:51:40.489189  bsp_do_flight_plan done after 454 msecs.
  540 01:51:40.492551  CPU: frequency set to 4400 MHz
  541 01:51:40.495894  Enabling SMIs.
  542 01:51:40.501961  BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
  543 01:51:40.517308  SATAXPCIE1 indicates PCIe NVMe is present
  544 01:51:40.520213  Probing TPM:  done!
  545 01:51:40.523593  Connected to device vid:did:rid of 1ae0:0028:00
  546 01:51:40.534206  Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
  547 01:51:40.537688  Initialized TPM device CR50 revision 0
  548 01:51:40.540953  Enabling S0i3.4
  549 01:51:40.548030  CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
  550 01:51:40.550849  Found a VBT of 8704 bytes after decompression
  551 01:51:40.557411  cse_lite: CSE RO boot. HybridStorageMode disabled
  552 01:51:40.564274  WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
  553 01:51:40.639662  FSPS returned 0
  554 01:51:40.642975  Executing Phase 1 of FspMultiPhaseSiInit
  555 01:51:40.653315  FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
  556 01:51:40.656343  port C0 DISC req: usage 1 usb3 1 usb2 5
  557 01:51:40.659567  Raw Buffer output 0 00000511
  558 01:51:40.662843  Raw Buffer output 1 00000000
  559 01:51:40.666750  pmc_send_ipc_cmd succeeded
  560 01:51:40.673921  port C1 DISC req: usage 1 usb3 2 usb2 3
  561 01:51:40.674012  Raw Buffer output 0 00000321
  562 01:51:40.676989  Raw Buffer output 1 00000000
  563 01:51:40.680884  pmc_send_ipc_cmd succeeded
  564 01:51:40.686594  Detected 4 core, 8 thread CPU.
  565 01:51:40.689391  Detected 4 core, 8 thread CPU.
  566 01:51:40.890317  Display FSP Version Info HOB
  567 01:51:40.893302  Reference Code - CPU = a.0.4c.31
  568 01:51:40.896618  uCode Version = 0.0.0.86
  569 01:51:40.899903  TXT ACM version = ff.ff.ff.ffff
  570 01:51:40.903159  Reference Code - ME = a.0.4c.31
  571 01:51:40.906231  MEBx version = 0.0.0.0
  572 01:51:40.909762  ME Firmware Version = Consumer SKU
  573 01:51:40.913051  Reference Code - PCH = a.0.4c.31
  574 01:51:40.916232  PCH-CRID Status = Disabled
  575 01:51:40.919511  PCH-CRID Original Value = ff.ff.ff.ffff
  576 01:51:40.923106  PCH-CRID New Value = ff.ff.ff.ffff
  577 01:51:40.926375  OPROM - RST - RAID = ff.ff.ff.ffff
  578 01:51:40.929392  PCH Hsio Version = 4.0.0.0
  579 01:51:40.932885  Reference Code - SA - System Agent = a.0.4c.31
  580 01:51:40.936118  Reference Code - MRC = 2.0.0.1
  581 01:51:40.939405  SA - PCIe Version = a.0.4c.31
  582 01:51:40.942807  SA-CRID Status = Disabled
  583 01:51:40.946059  SA-CRID Original Value = 0.0.0.1
  584 01:51:40.949849  SA-CRID New Value = 0.0.0.1
  585 01:51:40.953180  OPROM - VBIOS = ff.ff.ff.ffff
  586 01:51:40.956814  IO Manageability Engine FW Version = 11.1.4.0
  587 01:51:40.960184  PHY Build Version = 0.0.0.e0
  588 01:51:40.963307  Thunderbolt(TM) FW Version = 0.0.0.0
  589 01:51:40.970269  System Agent Manageability Engine FW Version = ff.ff.ff.ffff
  590 01:51:40.973450  ITSS IRQ Polarities Before:
  591 01:51:40.973555  IPC0: 0xffffffff
  592 01:51:40.976886  IPC1: 0xffffffff
  593 01:51:40.976991  IPC2: 0xffffffff
  594 01:51:40.980173  IPC3: 0xffffffff
  595 01:51:40.983046  ITSS IRQ Polarities After:
  596 01:51:40.983171  IPC0: 0xffffffff
  597 01:51:40.986529  IPC1: 0xffffffff
  598 01:51:40.986607  IPC2: 0xffffffff
  599 01:51:40.989703  IPC3: 0xffffffff
  600 01:51:40.993155  Found PCIe Root Port #9 at PCI: 00:1d.0.
  601 01:51:41.006656  pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
  602 01:51:41.016297  pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
  603 01:51:41.029473  pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
  604 01:51:41.036315  BS: BS_DEV_INIT_CHIPS run times (exec / console): 292 / 236 ms
  605 01:51:41.036465  Enumerating buses...
  606 01:51:41.042894  Show all devs... Before device enumeration.
  607 01:51:41.043029  Root Device: enabled 1
  608 01:51:41.046136  DOMAIN: 0000: enabled 1
  609 01:51:41.049297  CPU_CLUSTER: 0: enabled 1
  610 01:51:41.053000  PCI: 00:00.0: enabled 1
  611 01:51:41.053150  PCI: 00:02.0: enabled 1
  612 01:51:41.055997  PCI: 00:04.0: enabled 1
  613 01:51:41.059575  PCI: 00:05.0: enabled 1
  614 01:51:41.062612  PCI: 00:06.0: enabled 0
  615 01:51:41.062915  PCI: 00:07.0: enabled 0
  616 01:51:41.066179  PCI: 00:07.1: enabled 0
  617 01:51:41.069291  PCI: 00:07.2: enabled 0
  618 01:51:41.072992  PCI: 00:07.3: enabled 0
  619 01:51:41.073354  PCI: 00:08.0: enabled 1
  620 01:51:41.076072  PCI: 00:09.0: enabled 0
  621 01:51:41.079347  PCI: 00:0a.0: enabled 0
  622 01:51:41.083142  PCI: 00:0d.0: enabled 1
  623 01:51:41.083476  PCI: 00:0d.1: enabled 0
  624 01:51:41.086127  PCI: 00:0d.2: enabled 0
  625 01:51:41.089678  PCI: 00:0d.3: enabled 0
  626 01:51:41.089987  PCI: 00:0e.0: enabled 0
  627 01:51:41.092537  
  628 01:51:41.092864  PCI: 00:10.2: enabled 1
  629 01:51:41.095888  PCI: 00:10.6: enabled 0
  630 01:51:41.099108  PCI: 00:10.7: enabled 0
  631 01:51:41.099442  PCI: 00:12.0: enabled 0
  632 01:51:41.102315  PCI: 00:12.6: enabled 0
  633 01:51:41.105822  PCI: 00:13.0: enabled 0
  634 01:51:41.109089  PCI: 00:14.0: enabled 1
  635 01:51:41.109179  PCI: 00:14.1: enabled 0
  636 01:51:41.112434  PCI: 00:14.2: enabled 1
  637 01:51:41.115653  PCI: 00:14.3: enabled 1
  638 01:51:41.118679  PCI: 00:15.0: enabled 1
  639 01:51:41.118766  PCI: 00:15.1: enabled 1
  640 01:51:41.122084  PCI: 00:15.2: enabled 1
  641 01:51:41.125648  PCI: 00:15.3: enabled 1
  642 01:51:41.129030  PCI: 00:16.0: enabled 1
  643 01:51:41.129106  PCI: 00:16.1: enabled 0
  644 01:51:41.132429  PCI: 00:16.2: enabled 0
  645 01:51:41.135768  PCI: 00:16.3: enabled 0
  646 01:51:41.138828  PCI: 00:16.4: enabled 0
  647 01:51:41.138909  PCI: 00:16.5: enabled 0
  648 01:51:41.142434  PCI: 00:17.0: enabled 1
  649 01:51:41.145363  PCI: 00:19.0: enabled 0
  650 01:51:41.145443  PCI: 00:19.1: enabled 1
  651 01:51:41.148868  PCI: 00:19.2: enabled 0
  652 01:51:41.152290  PCI: 00:1c.0: enabled 1
  653 01:51:41.155217  PCI: 00:1c.1: enabled 0
  654 01:51:41.155299  PCI: 00:1c.2: enabled 0
  655 01:51:41.158898  PCI: 00:1c.3: enabled 0
  656 01:51:41.162125  PCI: 00:1c.4: enabled 0
  657 01:51:41.165374  PCI: 00:1c.5: enabled 0
  658 01:51:41.165460  PCI: 00:1c.6: enabled 1
  659 01:51:41.168650  PCI: 00:1c.7: enabled 0
  660 01:51:41.171821  PCI: 00:1d.0: enabled 1
  661 01:51:41.175442  PCI: 00:1d.1: enabled 0
  662 01:51:41.175532  PCI: 00:1d.2: enabled 1
  663 01:51:41.178678  PCI: 00:1d.3: enabled 0
  664 01:51:41.181842  PCI: 00:1e.0: enabled 1
  665 01:51:41.181930  PCI: 00:1e.1: enabled 0
  666 01:51:41.185180  
  667 01:51:41.185265  PCI: 00:1e.2: enabled 1
  668 01:51:41.188795  PCI: 00:1e.3: enabled 1
  669 01:51:41.191800  PCI: 00:1f.0: enabled 1
  670 01:51:41.191886  PCI: 00:1f.1: enabled 0
  671 01:51:41.195076  PCI: 00:1f.2: enabled 1
  672 01:51:41.198648  PCI: 00:1f.3: enabled 1
  673 01:51:41.202049  PCI: 00:1f.4: enabled 0
  674 01:51:41.202129  PCI: 00:1f.5: enabled 1
  675 01:51:41.205418  PCI: 00:1f.6: enabled 0
  676 01:51:41.208316  PCI: 00:1f.7: enabled 0
  677 01:51:41.208391  APIC: 00: enabled 1
  678 01:51:41.211859  GENERIC: 0.0: enabled 1
  679 01:51:41.215233  GENERIC: 0.0: enabled 1
  680 01:51:41.218271  GENERIC: 1.0: enabled 1
  681 01:51:41.218347  GENERIC: 0.0: enabled 1
  682 01:51:41.221738  GENERIC: 1.0: enabled 1
  683 01:51:41.224966  USB0 port 0: enabled 1
  684 01:51:41.228302  GENERIC: 0.0: enabled 1
  685 01:51:41.228384  USB0 port 0: enabled 1
  686 01:51:41.231973  GENERIC: 0.0: enabled 1
  687 01:51:41.235195  I2C: 00:1a: enabled 1
  688 01:51:41.235276  I2C: 00:31: enabled 1
  689 01:51:41.238302  I2C: 00:32: enabled 1
  690 01:51:41.241662  I2C: 00:10: enabled 1
  691 01:51:41.241739  I2C: 00:15: enabled 1
  692 01:51:41.244974  GENERIC: 0.0: enabled 0
  693 01:51:41.248341  GENERIC: 1.0: enabled 0
  694 01:51:41.251442  GENERIC: 0.0: enabled 1
  695 01:51:41.251521  SPI: 00: enabled 1
  696 01:51:41.255074  SPI: 00: enabled 1
  697 01:51:41.255159  PNP: 0c09.0: enabled 1
  698 01:51:41.258396  
  699 01:51:41.258487  GENERIC: 0.0: enabled 1
  700 01:51:41.262133  USB3 port 0: enabled 1
  701 01:51:41.265472  USB3 port 1: enabled 1
  702 01:51:41.265592  USB3 port 2: enabled 0
  703 01:51:41.268214  USB3 port 3: enabled 0
  704 01:51:41.271390  USB2 port 0: enabled 0
  705 01:51:41.271479  USB2 port 1: enabled 1
  706 01:51:41.274998  USB2 port 2: enabled 1
  707 01:51:41.278463  USB2 port 3: enabled 0
  708 01:51:41.281372  USB2 port 4: enabled 1
  709 01:51:41.281463  USB2 port 5: enabled 0
  710 01:51:41.284919  USB2 port 6: enabled 0
  711 01:51:41.288152  USB2 port 7: enabled 0
  712 01:51:41.288243  USB2 port 8: enabled 0
  713 01:51:41.291651  USB2 port 9: enabled 0
  714 01:51:41.294915  USB3 port 0: enabled 0
  715 01:51:41.298384  USB3 port 1: enabled 1
  716 01:51:41.298462  USB3 port 2: enabled 0
  717 01:51:41.301088  USB3 port 3: enabled 0
  718 01:51:41.304662  GENERIC: 0.0: enabled 1
  719 01:51:41.304744  GENERIC: 1.0: enabled 1
  720 01:51:41.308070  APIC: 05: enabled 1
  721 01:51:41.311206  APIC: 01: enabled 1
  722 01:51:41.311284  APIC: 03: enabled 1
  723 01:51:41.314365  APIC: 07: enabled 1
  724 01:51:41.318014  APIC: 06: enabled 1
  725 01:51:41.318096  APIC: 02: enabled 1
  726 01:51:41.321143  APIC: 04: enabled 1
  727 01:51:41.321229  Compare with tree...
  728 01:51:41.324472  Root Device: enabled 1
  729 01:51:41.327512   DOMAIN: 0000: enabled 1
  730 01:51:41.330998    PCI: 00:00.0: enabled 1
  731 01:51:41.334208    PCI: 00:02.0: enabled 1
  732 01:51:41.334303    PCI: 00:04.0: enabled 1
  733 01:51:41.337799     GENERIC: 0.0: enabled 1
  734 01:51:41.341213    PCI: 00:05.0: enabled 1
  735 01:51:41.343995    PCI: 00:06.0: enabled 0
  736 01:51:41.347320    PCI: 00:07.0: enabled 0
  737 01:51:41.347402     GENERIC: 0.0: enabled 1
  738 01:51:41.350695    PCI: 00:07.1: enabled 0
  739 01:51:41.354207     GENERIC: 1.0: enabled 1
  740 01:51:41.357589    PCI: 00:07.2: enabled 0
  741 01:51:41.360484     GENERIC: 0.0: enabled 1
  742 01:51:41.360569    PCI: 00:07.3: enabled 0
  743 01:51:41.363934     GENERIC: 1.0: enabled 1
  744 01:51:41.367375    PCI: 00:08.0: enabled 1
  745 01:51:41.370567    PCI: 00:09.0: enabled 0
  746 01:51:41.373918    PCI: 00:0a.0: enabled 0
  747 01:51:41.373998    PCI: 00:0d.0: enabled 1
  748 01:51:41.377567     USB0 port 0: enabled 1
  749 01:51:41.380516      USB3 port 0: enabled 1
  750 01:51:41.384288      USB3 port 1: enabled 1
  751 01:51:41.387650      USB3 port 2: enabled 0
  752 01:51:41.390626      USB3 port 3: enabled 0
  753 01:51:41.390714    PCI: 00:0d.1: enabled 0
  754 01:51:41.393700    PCI: 00:0d.2: enabled 0
  755 01:51:41.397180     GENERIC: 0.0: enabled 1
  756 01:51:41.400328    PCI: 00:0d.3: enabled 0
  757 01:51:41.403925    PCI: 00:0e.0: enabled 0
  758 01:51:41.404008    PCI: 00:10.2: enabled 1
  759 01:51:41.406788    PCI: 00:10.6: enabled 0
  760 01:51:41.410340    PCI: 00:10.7: enabled 0
  761 01:51:41.413452    PCI: 00:12.0: enabled 0
  762 01:51:41.417205    PCI: 00:12.6: enabled 0
  763 01:51:41.417292    PCI: 00:13.0: enabled 0
  764 01:51:41.420728    PCI: 00:14.0: enabled 1
  765 01:51:41.423596     USB0 port 0: enabled 1
  766 01:51:41.426875      USB2 port 0: enabled 0
  767 01:51:41.430221      USB2 port 1: enabled 1
  768 01:51:41.430311      USB2 port 2: enabled 1
  769 01:51:41.433618      USB2 port 3: enabled 0
  770 01:51:41.436507      USB2 port 4: enabled 1
  771 01:51:41.440031      USB2 port 5: enabled 0
  772 01:51:41.443316      USB2 port 6: enabled 0
  773 01:51:41.446616      USB2 port 7: enabled 0
  774 01:51:41.446703      USB2 port 8: enabled 0
  775 01:51:41.449996      USB2 port 9: enabled 0
  776 01:51:41.453056      USB3 port 0: enabled 0
  777 01:51:41.456494      USB3 port 1: enabled 1
  778 01:51:41.459943      USB3 port 2: enabled 0
  779 01:51:41.463189      USB3 port 3: enabled 0
  780 01:51:41.463279    PCI: 00:14.1: enabled 0
  781 01:51:41.466306    PCI: 00:14.2: enabled 1
  782 01:51:41.470017    PCI: 00:14.3: enabled 1
  783 01:51:41.473025     GENERIC: 0.0: enabled 1
  784 01:51:41.476099    PCI: 00:15.0: enabled 1
  785 01:51:41.476187     I2C: 00:1a: enabled 1
  786 01:51:41.479600     I2C: 00:31: enabled 1
  787 01:51:41.483206     I2C: 00:32: enabled 1
  788 01:51:41.486520    PCI: 00:15.1: enabled 1
  789 01:51:41.486607     I2C: 00:10: enabled 1
  790 01:51:41.489474    PCI: 00:15.2: enabled 1
  791 01:51:41.492812    PCI: 00:15.3: enabled 1
  792 01:51:41.496383    PCI: 00:16.0: enabled 1
  793 01:51:41.499528    PCI: 00:16.1: enabled 0
  794 01:51:41.499633    PCI: 00:16.2: enabled 0
  795 01:51:41.502407    PCI: 00:16.3: enabled 0
  796 01:51:41.505970    PCI: 00:16.4: enabled 0
  797 01:51:41.509129    PCI: 00:16.5: enabled 0
  798 01:51:41.513028    PCI: 00:17.0: enabled 1
  799 01:51:41.513112    PCI: 00:19.0: enabled 0
  800 01:51:41.515951    PCI: 00:19.1: enabled 1
  801 01:51:41.518926     I2C: 00:15: enabled 1
  802 01:51:41.522569    PCI: 00:19.2: enabled 0
  803 01:51:41.525855    PCI: 00:1d.0: enabled 1
  804 01:51:41.525945     GENERIC: 0.0: enabled 1
  805 01:51:41.528882    PCI: 00:1e.0: enabled 1
  806 01:51:41.532438    PCI: 00:1e.1: enabled 0
  807 01:51:41.535451    PCI: 00:1e.2: enabled 1
  808 01:51:41.538906     SPI: 00: enabled 1
  809 01:51:41.539005    PCI: 00:1e.3: enabled 1
  810 01:51:41.542365     SPI: 00: enabled 1
  811 01:51:41.545683    PCI: 00:1f.0: enabled 1
  812 01:51:41.548919     PNP: 0c09.0: enabled 1
  813 01:51:41.549034    PCI: 00:1f.1: enabled 0
  814 01:51:41.552119    PCI: 00:1f.2: enabled 1
  815 01:51:41.555812     GENERIC: 0.0: enabled 1
  816 01:51:41.558641      GENERIC: 0.0: enabled 1
  817 01:51:41.561911      GENERIC: 1.0: enabled 1
  818 01:51:41.565495    PCI: 00:1f.3: enabled 1
  819 01:51:41.565589    PCI: 00:1f.4: enabled 0
  820 01:51:41.617003    PCI: 00:1f.5: enabled 1
  821 01:51:41.617161    PCI: 00:1f.6: enabled 0
  822 01:51:41.617437    PCI: 00:1f.7: enabled 0
  823 01:51:41.617529   CPU_CLUSTER: 0: enabled 1
  824 01:51:41.617596    APIC: 00: enabled 1
  825 01:51:41.617668    APIC: 05: enabled 1
  826 01:51:41.617731    APIC: 01: enabled 1
  827 01:51:41.617983    APIC: 03: enabled 1
  828 01:51:41.618062    APIC: 07: enabled 1
  829 01:51:41.618124    APIC: 06: enabled 1
  830 01:51:41.618184    APIC: 02: enabled 1
  831 01:51:41.618259    APIC: 04: enabled 1
  832 01:51:41.618319  Root Device scanning...
  833 01:51:41.618378  scan_static_bus for Root Device
  834 01:51:41.618445  DOMAIN: 0000 enabled
  835 01:51:41.618701  CPU_CLUSTER: 0 enabled
  836 01:51:41.618767  DOMAIN: 0000 scanning...
  837 01:51:41.618834  PCI: pci_scan_bus for bus 00
  838 01:51:41.618893  PCI: 00:00.0 [8086/0000] ops
  839 01:51:41.618951  PCI: 00:00.0 [8086/9a12] enabled
  840 01:51:41.653300  
  841 01:51:41.653458  PCI: 00:02.0 [8086/0000] bus ops
  842 01:51:41.653748  PCI: 00:02.0 [8086/9a40] enabled
  843 01:51:41.653822  PCI: 00:04.0 [8086/0000] bus ops
  844 01:51:41.653899  PCI: 00:04.0 [8086/9a03] enabled
  845 01:51:41.653962  PCI: 00:05.0 [8086/9a19] enabled
  846 01:51:41.654231  PCI: 00:07.0 [0000/0000] hidden
  847 01:51:41.654337  PCI: 00:08.0 [8086/9a11] enabled
  848 01:51:41.654427  PCI: 00:0a.0 [8086/9a0d] disabled
  849 01:51:41.654521  PCI: 00:0d.0 [8086/0000] bus ops
  850 01:51:41.657092  PCI: 00:0d.0 [8086/9a13] enabled
  851 01:51:41.657167  PCI: 00:14.0 [8086/0000] bus ops
  852 01:51:41.660855  PCI: 00:14.0 [8086/a0ed] enabled
  853 01:51:41.663825  PCI: 00:14.2 [8086/a0ef] enabled
  854 01:51:41.667592  PCI: 00:14.3 [8086/0000] bus ops
  855 01:51:41.670460  PCI: 00:14.3 [8086/a0f0] enabled
  856 01:51:41.673948  PCI: 00:15.0 [8086/0000] bus ops
  857 01:51:41.677462  PCI: 00:15.0 [8086/a0e8] enabled
  858 01:51:41.680644  PCI: 00:15.1 [8086/0000] bus ops
  859 01:51:41.683624  PCI: 00:15.1 [8086/a0e9] enabled
  860 01:51:41.687030  PCI: 00:15.2 [8086/0000] bus ops
  861 01:51:41.690366  PCI: 00:15.2 [8086/a0ea] enabled
  862 01:51:41.693620  PCI: 00:15.3 [8086/0000] bus ops
  863 01:51:41.697040  PCI: 00:15.3 [8086/a0eb] enabled
  864 01:51:41.697130  PCI: 00:16.0 [8086/0000] ops
  865 01:51:41.700090  PCI: 00:16.0 [8086/a0e0] enabled
  866 01:51:41.706819  PCI: Static device PCI: 00:17.0 not found, disabling it.
  867 01:51:41.710211  PCI: 00:19.0 [8086/0000] bus ops
  868 01:51:41.713637  PCI: 00:19.0 [8086/a0c5] disabled
  869 01:51:41.716827  PCI: 00:19.1 [8086/0000] bus ops
  870 01:51:41.719928  PCI: 00:19.1 [8086/a0c6] enabled
  871 01:51:41.723178  PCI: 00:1d.0 [8086/0000] bus ops
  872 01:51:41.726427  PCI: 00:1d.0 [8086/a0b0] enabled
  873 01:51:41.729695  PCI: 00:1e.0 [8086/0000] ops
  874 01:51:41.733253  PCI: 00:1e.0 [8086/a0a8] enabled
  875 01:51:41.736560  PCI: 00:1e.2 [8086/0000] bus ops
  876 01:51:41.739794  PCI: 00:1e.2 [8086/a0aa] enabled
  877 01:51:41.743166  PCI: 00:1e.3 [8086/0000] bus ops
  878 01:51:41.746546  PCI: 00:1e.3 [8086/a0ab] enabled
  879 01:51:41.749758  PCI: 00:1f.0 [8086/0000] bus ops
  880 01:51:41.753005  PCI: 00:1f.0 [8086/a087] enabled
  881 01:51:41.756557  RTC Init
  882 01:51:41.759600  Set power on after power failure.
  883 01:51:41.759694  Disabling Deep S3
  884 01:51:41.762762  Disabling Deep S3
  885 01:51:41.762850  Disabling Deep S4
  886 01:51:41.766604  Disabling Deep S4
  887 01:51:41.769332  Disabling Deep S5
  888 01:51:41.769426  Disabling Deep S5
  889 01:51:41.772734  PCI: 00:1f.2 [0000/0000] hidden
  890 01:51:41.776025  PCI: 00:1f.3 [8086/0000] bus ops
  891 01:51:41.779631  PCI: 00:1f.3 [8086/a0c8] enabled
  892 01:51:41.782914  PCI: 00:1f.5 [8086/0000] bus ops
  893 01:51:41.785889  PCI: 00:1f.5 [8086/a0a4] enabled
  894 01:51:41.788972  PCI: Leftover static devices:
  895 01:51:41.789060  PCI: 00:10.2
  896 01:51:41.792808  PCI: 00:10.6
  897 01:51:41.792903  PCI: 00:10.7
  898 01:51:41.795796  PCI: 00:06.0
  899 01:51:41.795882  PCI: 00:07.1
  900 01:51:41.799427  PCI: 00:07.2
  901 01:51:41.799521  PCI: 00:07.3
  902 01:51:41.799591  PCI: 00:09.0
  903 01:51:41.802839  PCI: 00:0d.1
  904 01:51:41.802938  PCI: 00:0d.2
  905 01:51:41.807447  PCI: 00:0d.3
  906 01:51:41.807536  PCI: 00:0e.0
  907 01:51:41.807613  PCI: 00:12.0
  908 01:51:41.808960  PCI: 00:12.6
  909 01:51:41.809048  PCI: 00:13.0
  910 01:51:41.812713  PCI: 00:14.1
  911 01:51:41.812800  PCI: 00:16.1
  912 01:51:41.812869  PCI: 00:16.2
  913 01:51:41.815489  
  914 01:51:41.815576  PCI: 00:16.3
  915 01:51:41.815645  PCI: 00:16.4
  916 01:51:41.819204  PCI: 00:16.5
  917 01:51:41.819322  PCI: 00:17.0
  918 01:51:41.822041  PCI: 00:19.2
  919 01:51:41.822122  PCI: 00:1e.1
  920 01:51:41.822189  PCI: 00:1f.1
  921 01:51:41.825493  PCI: 00:1f.4
  922 01:51:41.825570  PCI: 00:1f.6
  923 01:51:41.828964  PCI: 00:1f.7
  924 01:51:41.832497  PCI: Check your devicetree.cb.
  925 01:51:41.832582  PCI: 00:02.0 scanning...
  926 01:51:41.835235  scan_generic_bus for PCI: 00:02.0
  927 01:51:41.838862  
  928 01:51:41.842367  scan_generic_bus for PCI: 00:02.0 done
  929 01:51:41.845605  scan_bus: bus PCI: 00:02.0 finished in 7 msecs
  930 01:51:41.848670  PCI: 00:04.0 scanning...
  931 01:51:41.851995  scan_generic_bus for PCI: 00:04.0
  932 01:51:41.855553  GENERIC: 0.0 enabled
  933 01:51:41.858757  bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
  934 01:51:41.865058  scan_bus: bus PCI: 00:04.0 finished in 11 msecs
  935 01:51:41.868599  PCI: 00:0d.0 scanning...
  936 01:51:41.871614  scan_static_bus for PCI: 00:0d.0
  937 01:51:41.871697  USB0 port 0 enabled
  938 01:51:41.875374  USB0 port 0 scanning...
  939 01:51:41.878312  scan_static_bus for USB0 port 0
  940 01:51:41.881541  USB3 port 0 enabled
  941 01:51:41.881639  USB3 port 1 enabled
  942 01:51:41.884916  USB3 port 2 disabled
  943 01:51:41.888411  USB3 port 3 disabled
  944 01:51:41.888500  USB3 port 0 scanning...
  945 01:51:41.891880  scan_static_bus for USB3 port 0
  946 01:51:41.898467  scan_static_bus for USB3 port 0 done
  947 01:51:41.902077  scan_bus: bus USB3 port 0 finished in 6 msecs
  948 01:51:41.905438  USB3 port 1 scanning...
  949 01:51:41.908243  scan_static_bus for USB3 port 1
  950 01:51:41.911845  scan_static_bus for USB3 port 1 done
  951 01:51:41.914763  scan_bus: bus USB3 port 1 finished in 6 msecs
  952 01:51:41.917633  scan_static_bus for USB0 port 0 done
  953 01:51:41.924334  scan_bus: bus USB0 port 0 finished in 43 msecs
  954 01:51:41.927734  scan_static_bus for PCI: 00:0d.0 done
  955 01:51:41.930985  scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
  956 01:51:41.934405  PCI: 00:14.0 scanning...
  957 01:51:41.937692  scan_static_bus for PCI: 00:14.0
  958 01:51:41.940882  USB0 port 0 enabled
  959 01:51:41.944294  USB0 port 0 scanning...
  960 01:51:41.947573  scan_static_bus for USB0 port 0
  961 01:51:41.947656  USB2 port 0 disabled
  962 01:51:41.950805  USB2 port 1 enabled
  963 01:51:41.954007  USB2 port 2 enabled
  964 01:51:41.954119  USB2 port 3 disabled
  965 01:51:41.957873  USB2 port 4 enabled
  966 01:51:41.960920  USB2 port 5 disabled
  967 01:51:41.961010  USB2 port 6 disabled
  968 01:51:41.964311  USB2 port 7 disabled
  969 01:51:41.964397  USB2 port 8 disabled
  970 01:51:41.967532  USB2 port 9 disabled
  971 01:51:41.970797  USB3 port 0 disabled
  972 01:51:41.970894  USB3 port 1 enabled
  973 01:51:41.974233  USB3 port 2 disabled
  974 01:51:41.977221  USB3 port 3 disabled
  975 01:51:41.977323  USB2 port 1 scanning...
  976 01:51:41.980785  scan_static_bus for USB2 port 1
  977 01:51:41.987610  scan_static_bus for USB2 port 1 done
  978 01:51:41.990602  scan_bus: bus USB2 port 1 finished in 6 msecs
  979 01:51:41.993835  USB2 port 2 scanning...
  980 01:51:41.996988  scan_static_bus for USB2 port 2
  981 01:51:42.000349  scan_static_bus for USB2 port 2 done
  982 01:51:42.003723  scan_bus: bus USB2 port 2 finished in 6 msecs
  983 01:51:42.007208  USB2 port 4 scanning...
  984 01:51:42.010323  scan_static_bus for USB2 port 4
  985 01:51:42.013530  scan_static_bus for USB2 port 4 done
  986 01:51:42.020125  scan_bus: bus USB2 port 4 finished in 6 msecs
  987 01:51:42.020240  USB3 port 1 scanning...
  988 01:51:42.023566  scan_static_bus for USB3 port 1
  989 01:51:42.030013  scan_static_bus for USB3 port 1 done
  990 01:51:42.033437  scan_bus: bus USB3 port 1 finished in 6 msecs
  991 01:51:42.036574  scan_static_bus for USB0 port 0 done
  992 01:51:42.039976  scan_bus: bus USB0 port 0 finished in 93 msecs
  993 01:51:42.046703  scan_static_bus for PCI: 00:14.0 done
  994 01:51:42.050007  scan_bus: bus PCI: 00:14.0 finished in 109 msecs
  995 01:51:42.053446  PCI: 00:14.3 scanning...
  996 01:51:42.056648  scan_static_bus for PCI: 00:14.3
  997 01:51:42.059830  GENERIC: 0.0 enabled
  998 01:51:42.062853  scan_static_bus for PCI: 00:14.3 done
  999 01:51:42.066123  scan_bus: bus PCI: 00:14.3 finished in 9 msecs
 1000 01:51:42.069620  PCI: 00:15.0 scanning...
 1001 01:51:42.072816  scan_static_bus for PCI: 00:15.0
 1002 01:51:42.076214  I2C: 00:1a enabled
 1003 01:51:42.076305  I2C: 00:31 enabled
 1004 01:51:42.079770  I2C: 00:32 enabled
 1005 01:51:42.083129  scan_static_bus for PCI: 00:15.0 done
 1006 01:51:42.086191  scan_bus: bus PCI: 00:15.0 finished in 12 msecs
 1007 01:51:42.089138  PCI: 00:15.1 scanning...
 1008 01:51:42.092576  scan_static_bus for PCI: 00:15.1
 1009 01:51:42.096527  I2C: 00:10 enabled
 1010 01:51:42.099087  scan_static_bus for PCI: 00:15.1 done
 1011 01:51:42.102370  scan_bus: bus PCI: 00:15.1 finished in 9 msecs
 1012 01:51:42.106223  PCI: 00:15.2 scanning...
 1013 01:51:42.109242  scan_static_bus for PCI: 00:15.2
 1014 01:51:42.112596  scan_static_bus for PCI: 00:15.2 done
 1015 01:51:42.119244  scan_bus: bus PCI: 00:15.2 finished in 7 msecs
 1016 01:51:42.122142  PCI: 00:15.3 scanning...
 1017 01:51:42.125575  scan_static_bus for PCI: 00:15.3
 1018 01:51:42.129180  scan_static_bus for PCI: 00:15.3 done
 1019 01:51:42.132793  scan_bus: bus PCI: 00:15.3 finished in 7 msecs
 1020 01:51:42.135679  PCI: 00:19.1 scanning...
 1021 01:51:42.139309  scan_static_bus for PCI: 00:19.1
 1022 01:51:42.142150  I2C: 00:15 enabled
 1023 01:51:42.145376  scan_static_bus for PCI: 00:19.1 done
 1024 01:51:42.148836  scan_bus: bus PCI: 00:19.1 finished in 9 msecs
 1025 01:51:42.152038  PCI: 00:1d.0 scanning...
 1026 01:51:42.156038  do_pci_scan_bridge for PCI: 00:1d.0
 1027 01:51:42.158516  PCI: pci_scan_bus for bus 01
 1028 01:51:42.161929  PCI: 01:00.0 [15b7/5009] enabled
 1029 01:51:42.165691  GENERIC: 0.0 enabled
 1030 01:51:42.168609  Enabling Common Clock Configuration
 1031 01:51:42.171702  L1 Sub-State supported from root port 29
 1032 01:51:42.175338  L1 Sub-State Support = 0x5
 1033 01:51:42.178502  CommonModeRestoreTime = 0x28
 1034 01:51:42.181700  Power On Value = 0x16, Power On Scale = 0x0
 1035 01:51:42.185291  ASPM: Enabled L1
 1036 01:51:42.188596  PCIe: Max_Payload_Size adjusted to 128
 1037 01:51:42.192118  scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
 1038 01:51:42.195574  PCI: 00:1e.2 scanning...
 1039 01:51:42.199376  scan_generic_bus for PCI: 00:1e.2
 1040 01:51:42.202167  SPI: 00 enabled
 1041 01:51:42.205867  bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
 1042 01:51:42.212051  scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
 1043 01:51:42.215493  PCI: 00:1e.3 scanning...
 1044 01:51:42.218741  scan_generic_bus for PCI: 00:1e.3
 1045 01:51:42.218821  SPI: 00 enabled
 1046 01:51:42.225208  bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
 1047 01:51:42.231937  scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
 1048 01:51:42.232032  PCI: 00:1f.0 scanning...
 1049 01:51:42.235263  scan_static_bus for PCI: 00:1f.0
 1050 01:51:42.238641  PNP: 0c09.0 enabled
 1051 01:51:42.241637  PNP: 0c09.0 scanning...
 1052 01:51:42.245277  scan_static_bus for PNP: 0c09.0
 1053 01:51:42.248328  scan_static_bus for PNP: 0c09.0 done
 1054 01:51:42.251744  scan_bus: bus PNP: 0c09.0 finished in 6 msecs
 1055 01:51:42.258545  scan_static_bus for PCI: 00:1f.0 done
 1056 01:51:42.261878  scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
 1057 01:51:42.264843  PCI: 00:1f.2 scanning...
 1058 01:51:42.268157  scan_static_bus for PCI: 00:1f.2
 1059 01:51:42.268246  GENERIC: 0.0 enabled
 1060 01:51:42.271242  GENERIC: 0.0 scanning...
 1061 01:51:42.274532  scan_static_bus for GENERIC: 0.0
 1062 01:51:42.277977  GENERIC: 0.0 enabled
 1063 01:51:42.281545  GENERIC: 1.0 enabled
 1064 01:51:42.284580  scan_static_bus for GENERIC: 0.0 done
 1065 01:51:42.288268  scan_bus: bus GENERIC: 0.0 finished in 11 msecs
 1066 01:51:42.291238  scan_static_bus for PCI: 00:1f.2 done
 1067 01:51:42.297890  scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
 1068 01:51:42.300929  PCI: 00:1f.3 scanning...
 1069 01:51:42.304225  scan_static_bus for PCI: 00:1f.3
 1070 01:51:42.307768  scan_static_bus for PCI: 00:1f.3 done
 1071 01:51:42.310998  scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
 1072 01:51:42.314084  PCI: 00:1f.5 scanning...
 1073 01:51:42.317226  scan_generic_bus for PCI: 00:1f.5
 1074 01:51:42.320447  scan_generic_bus for PCI: 00:1f.5 done
 1075 01:51:42.327412  scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
 1076 01:51:42.330760  scan_bus: bus DOMAIN: 0000 finished in 716 msecs
 1077 01:51:42.334141  scan_static_bus for Root Device done
 1078 01:51:42.340562  scan_bus: bus Root Device finished in 736 msecs
 1079 01:51:42.340652  done
 1080 01:51:42.347214  BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
 1081 01:51:42.350447  Chrome EC: UHEPI supported
 1082 01:51:42.356942  FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
 1083 01:51:42.363955  SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
 1084 01:51:42.367035  SPI flash protection: WPSW=0 SRP0=1
 1085 01:51:42.370136  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1086 01:51:42.377022  BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
 1087 01:51:42.379899  found VGA at PCI: 00:02.0
 1088 01:51:42.383068  Setting up VGA for PCI: 00:02.0
 1089 01:51:42.386977  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1090 01:51:42.393678  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1091 01:51:42.396561  Allocating resources...
 1092 01:51:42.396648  Reading resources...
 1093 01:51:42.400109  Root Device read_resources bus 0 link: 0
 1094 01:51:42.406584  DOMAIN: 0000 read_resources bus 0 link: 0
 1095 01:51:42.410167  PCI: 00:04.0 read_resources bus 1 link: 0
 1096 01:51:42.416363  PCI: 00:04.0 read_resources bus 1 link: 0 done
 1097 01:51:42.419973  PCI: 00:0d.0 read_resources bus 0 link: 0
 1098 01:51:42.426308  USB0 port 0 read_resources bus 0 link: 0
 1099 01:51:42.430332  USB0 port 0 read_resources bus 0 link: 0 done
 1100 01:51:42.436280  PCI: 00:0d.0 read_resources bus 0 link: 0 done
 1101 01:51:42.439809  PCI: 00:14.0 read_resources bus 0 link: 0
 1102 01:51:42.443023  USB0 port 0 read_resources bus 0 link: 0
 1103 01:51:42.450425  USB0 port 0 read_resources bus 0 link: 0 done
 1104 01:51:42.453746  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1105 01:51:42.460558  PCI: 00:14.3 read_resources bus 0 link: 0
 1106 01:51:42.464291  PCI: 00:14.3 read_resources bus 0 link: 0 done
 1107 01:51:42.470433  PCI: 00:15.0 read_resources bus 0 link: 0
 1108 01:51:42.474193  PCI: 00:15.0 read_resources bus 0 link: 0 done
 1109 01:51:42.480444  PCI: 00:15.1 read_resources bus 0 link: 0
 1110 01:51:42.483875  PCI: 00:15.1 read_resources bus 0 link: 0 done
 1111 01:51:42.491070  PCI: 00:19.1 read_resources bus 0 link: 0
 1112 01:51:42.494573  PCI: 00:19.1 read_resources bus 0 link: 0 done
 1113 01:51:42.500873  PCI: 00:1d.0 read_resources bus 1 link: 0
 1114 01:51:42.504559  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1115 01:51:42.510898  PCI: 00:1e.2 read_resources bus 2 link: 0
 1116 01:51:42.514056  PCI: 00:1e.2 read_resources bus 2 link: 0 done
 1117 01:51:42.520657  PCI: 00:1e.3 read_resources bus 3 link: 0
 1118 01:51:42.524359  PCI: 00:1e.3 read_resources bus 3 link: 0 done
 1119 01:51:42.530425  PCI: 00:1f.0 read_resources bus 0 link: 0
 1120 01:51:42.533694  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1121 01:51:42.537359  PCI: 00:1f.2 read_resources bus 0 link: 0
 1122 01:51:42.540632  
 1123 01:51:42.544017  GENERIC: 0.0 read_resources bus 0 link: 0
 1124 01:51:42.546876  GENERIC: 0.0 read_resources bus 0 link: 0 done
 1125 01:51:42.550357  
 1126 01:51:42.553517  PCI: 00:1f.2 read_resources bus 0 link: 0 done
 1127 01:51:42.559889  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1128 01:51:42.563362  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1129 01:51:42.569829  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1130 01:51:42.573247  Root Device read_resources bus 0 link: 0 done
 1131 01:51:42.576882  Done reading resources.
 1132 01:51:42.583417  Show resources in subtree (Root Device)...After reading.
 1133 01:51:42.586639   Root Device child on link 0 DOMAIN: 0000
 1134 01:51:42.589808    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1135 01:51:42.599738    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1136 01:51:42.609507    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1137 01:51:42.609655     PCI: 00:00.0
 1138 01:51:42.613139  
 1139 01:51:42.619542     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1140 01:51:42.629338     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1141 01:51:42.639337     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1142 01:51:42.649094     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1143 01:51:42.659582     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1144 01:51:42.669012     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1145 01:51:42.676034     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1146 01:51:42.685581     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1147 01:51:42.695668     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1148 01:51:42.705814     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1149 01:51:42.715509     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1150 01:51:42.725133     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1151 01:51:42.732177     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1152 01:51:42.742183     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1153 01:51:42.751530     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1154 01:51:42.762119     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1155 01:51:42.771529     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1156 01:51:42.781676     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1157 01:51:42.791476     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1158 01:51:42.798034     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1159 01:51:42.801284  
 1160 01:51:42.801380     PCI: 00:02.0
 1161 01:51:42.811329     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1162 01:51:42.820857     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1163 01:51:42.830932     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1164 01:51:42.834126     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1165 01:51:42.844229     PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
 1166 01:51:42.847586      GENERIC: 0.0
 1167 01:51:42.847704     PCI: 00:05.0
 1168 01:51:42.857622     PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1169 01:51:42.864108     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1170 01:51:42.864242      GENERIC: 0.0
 1171 01:51:42.867420     PCI: 00:08.0
 1172 01:51:42.877344     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1173 01:51:42.877451     PCI: 00:0a.0
 1174 01:51:42.883893     PCI: 00:0d.0 child on link 0 USB0 port 0
 1175 01:51:42.893951     PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1176 01:51:42.897118      USB0 port 0 child on link 0 USB3 port 0
 1177 01:51:42.897219       USB3 port 0
 1178 01:51:42.900252       USB3 port 1
 1179 01:51:42.903512       USB3 port 2
 1180 01:51:42.903625       USB3 port 3
 1181 01:51:42.907034     PCI: 00:14.0 child on link 0 USB0 port 0
 1182 01:51:42.917201     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1183 01:51:42.923552      USB0 port 0 child on link 0 USB2 port 0
 1184 01:51:42.923669       USB2 port 0
 1185 01:51:42.927090       USB2 port 1
 1186 01:51:42.927195       USB2 port 2
 1187 01:51:42.929903       USB2 port 3
 1188 01:51:42.929995       USB2 port 4
 1189 01:51:42.933245  
 1190 01:51:42.933361       USB2 port 5
 1191 01:51:42.936470       USB2 port 6
 1192 01:51:42.936557       USB2 port 7
 1193 01:51:42.939937       USB2 port 8
 1194 01:51:42.940027       USB2 port 9
 1195 01:51:42.943091       USB3 port 0
 1196 01:51:42.943186       USB3 port 1
 1197 01:51:42.946224       USB3 port 2
 1198 01:51:42.946330       USB3 port 3
 1199 01:51:42.950306     PCI: 00:14.2
 1200 01:51:42.959766     PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1201 01:51:42.969698     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1202 01:51:42.972586     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1203 01:51:42.983182     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1204 01:51:42.985667      GENERIC: 0.0
 1205 01:51:42.988995     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1206 01:51:42.999207     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1207 01:51:43.002589      I2C: 00:1a
 1208 01:51:43.002676      I2C: 00:31
 1209 01:51:43.005345      I2C: 00:32
 1210 01:51:43.008699     PCI: 00:15.1 child on link 0 I2C: 00:10
 1211 01:51:43.019067     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1212 01:51:43.019186      I2C: 00:10
 1213 01:51:43.022294     PCI: 00:15.2
 1214 01:51:43.031972     PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1215 01:51:43.032086     PCI: 00:15.3
 1216 01:51:43.042352     PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1217 01:51:43.045229     PCI: 00:16.0
 1218 01:51:43.055590     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1219 01:51:43.055713     PCI: 00:19.0
 1220 01:51:43.061753     PCI: 00:19.1 child on link 0 I2C: 00:15
 1221 01:51:43.071848     PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1222 01:51:43.071974      I2C: 00:15
 1223 01:51:43.078655     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1224 01:51:43.085157     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1225 01:51:43.094901     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1226 01:51:43.105000     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1227 01:51:43.105135      GENERIC: 0.0
 1228 01:51:43.108184      PCI: 01:00.0
 1229 01:51:43.117915      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1230 01:51:43.128116      PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
 1231 01:51:43.128253     PCI: 00:1e.0
 1232 01:51:43.131022  
 1233 01:51:43.141395     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1234 01:51:43.144337     PCI: 00:1e.2 child on link 0 SPI: 00
 1235 01:51:43.154817     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1236 01:51:43.154929      SPI: 00
 1237 01:51:43.161294     PCI: 00:1e.3 child on link 0 SPI: 00
 1238 01:51:43.170955     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1239 01:51:43.171072      SPI: 00
 1240 01:51:43.174129     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1241 01:51:43.183951     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1242 01:51:43.187429      PNP: 0c09.0
 1243 01:51:43.194013      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1244 01:51:43.200967     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1245 01:51:43.207374     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1246 01:51:43.217338     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1247 01:51:43.223956      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1248 01:51:43.224095       GENERIC: 0.0
 1249 01:51:43.227216       GENERIC: 1.0
 1250 01:51:43.227336     PCI: 00:1f.3
 1251 01:51:43.236865     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1252 01:51:43.247342     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1253 01:51:43.250939     PCI: 00:1f.5
 1254 01:51:43.257561     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1255 01:51:43.260294  
 1256 01:51:43.263684    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1257 01:51:43.263774     APIC: 00
 1258 01:51:43.266761     APIC: 05
 1259 01:51:43.266853     APIC: 01
 1260 01:51:43.266950     APIC: 03
 1261 01:51:43.269923     APIC: 07
 1262 01:51:43.270060     APIC: 06
 1263 01:51:43.270157     APIC: 02
 1264 01:51:43.273413  
 1265 01:51:43.273511     APIC: 04
 1266 01:51:43.279882  ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
 1267 01:51:43.286809   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
 1268 01:51:43.293183   PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
 1269 01:51:43.299946   PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
 1270 01:51:43.303714    PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1271 01:51:43.306320    PCI: 01:00.0 20 *  [0x4000 - 0x40ff] mem
 1272 01:51:43.313190   PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
 1273 01:51:43.319602   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1274 01:51:43.323095  
 1275 01:51:43.330118   PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1276 01:51:43.336563  === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
 1277 01:51:43.342880  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1278 01:51:43.349565   update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1279 01:51:43.356101   update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
 1280 01:51:43.366328   update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
 1281 01:51:43.369442   DOMAIN: 0000: Resource ranges:
 1282 01:51:43.373087   * Base: 1000, Size: 800, Tag: 100
 1283 01:51:43.376028   * Base: 1900, Size: e700, Tag: 100
 1284 01:51:43.379352    PCI: 00:02.0 20 *  [0x1000 - 0x103f] limit: 103f io
 1285 01:51:43.386599  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
 1286 01:51:43.395925  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
 1287 01:51:43.402542   update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
 1288 01:51:43.409331   update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
 1289 01:51:43.419118   update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
 1290 01:51:43.425893   update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
 1291 01:51:43.432403   update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
 1292 01:51:43.442122   update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
 1293 01:51:43.448864   update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
 1294 01:51:43.455740   update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
 1295 01:51:43.465623   update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
 1296 01:51:43.472126   update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
 1297 01:51:43.478936   update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
 1298 01:51:43.485068   update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
 1299 01:51:43.488784  
 1300 01:51:43.495138   update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
 1301 01:51:43.502420   update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
 1302 01:51:43.509223   update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
 1303 01:51:43.518674   update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
 1304 01:51:43.524917   update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
 1305 01:51:43.534965   update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
 1306 01:51:43.541649   update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
 1307 01:51:43.548350   update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
 1308 01:51:43.557959   update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
 1309 01:51:43.564363   update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
 1310 01:51:43.567737   DOMAIN: 0000: Resource ranges:
 1311 01:51:43.571214   * Base: 7fc00000, Size: 40400000, Tag: 200
 1312 01:51:43.577827   * Base: d0000000, Size: 28000000, Tag: 200
 1313 01:51:43.581395   * Base: fa000000, Size: 1000000, Tag: 200
 1314 01:51:43.584199   * Base: fb001000, Size: 2fff000, Tag: 200
 1315 01:51:43.587636   * Base: fe010000, Size: 2e000, Tag: 200
 1316 01:51:43.594249   * Base: fe03f000, Size: d41000, Tag: 200
 1317 01:51:43.597189   * Base: fed88000, Size: 8000, Tag: 200
 1318 01:51:43.600784   * Base: fed93000, Size: d000, Tag: 200
 1319 01:51:43.604085   * Base: feda2000, Size: 1e000, Tag: 200
 1320 01:51:43.610853   * Base: fede0000, Size: 1220000, Tag: 200
 1321 01:51:43.614413   * Base: 480400000, Size: 7b7fc00000, Tag: 100200
 1322 01:51:43.620697    PCI: 00:02.0 18 *  [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
 1323 01:51:43.627783    PCI: 00:02.0 10 *  [0x90000000 - 0x90ffffff] limit: 90ffffff mem
 1324 01:51:43.634002    PCI: 00:05.0 10 *  [0x91000000 - 0x91ffffff] limit: 91ffffff mem
 1325 01:51:43.640343    PCI: 00:1d.0 20 *  [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
 1326 01:51:43.646998    PCI: 00:1f.3 20 *  [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
 1327 01:51:43.653554    PCI: 00:04.0 10 *  [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
 1328 01:51:43.660541    PCI: 00:0d.0 10 *  [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
 1329 01:51:43.666712    PCI: 00:14.0 10 *  [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
 1330 01:51:43.673227    PCI: 00:14.2 10 *  [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
 1331 01:51:43.680241    PCI: 00:14.3 10 *  [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
 1332 01:51:43.686972    PCI: 00:1f.3 10 *  [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
 1333 01:51:43.693474    PCI: 00:08.0 10 *  [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
 1334 01:51:43.699686    PCI: 00:14.2 18 *  [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
 1335 01:51:43.706324    PCI: 00:15.0 10 *  [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
 1336 01:51:43.713045    PCI: 00:15.1 10 *  [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
 1337 01:51:43.719541    PCI: 00:15.2 10 *  [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
 1338 01:51:43.726349    PCI: 00:15.3 10 *  [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
 1339 01:51:43.732792    PCI: 00:16.0 10 *  [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
 1340 01:51:43.739978    PCI: 00:19.1 10 *  [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
 1341 01:51:43.745990    PCI: 00:1e.2 10 *  [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
 1342 01:51:43.752845    PCI: 00:1e.3 10 *  [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
 1343 01:51:43.759261    PCI: 00:1f.5 10 *  [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
 1344 01:51:43.769184  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
 1345 01:51:43.776277  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
 1346 01:51:43.779364   PCI: 00:1d.0: Resource ranges:
 1347 01:51:43.782753   * Base: 7fc00000, Size: 100000, Tag: 200
 1348 01:51:43.789573    PCI: 01:00.0 10 *  [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
 1349 01:51:43.795826    PCI: 01:00.0 20 *  [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
 1350 01:51:43.805508  PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
 1351 01:51:43.812224  === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
 1352 01:51:43.815474  Root Device assign_resources, bus 0 link: 0
 1353 01:51:43.822301  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1354 01:51:43.828845  PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
 1355 01:51:43.838518  PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
 1356 01:51:43.844983  PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
 1357 01:51:43.854965  PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
 1358 01:51:43.858246  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1359 01:51:43.861811  PCI: 00:04.0 assign_resources, bus 1 link: 0
 1360 01:51:43.865292  
 1361 01:51:43.871750  PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
 1362 01:51:43.878184  PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
 1363 01:51:43.888092  PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
 1364 01:51:43.891617  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1365 01:51:43.898034  PCI: 00:0d.0 assign_resources, bus 0 link: 0
 1366 01:51:43.904851  PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
 1367 01:51:43.911694  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1368 01:51:43.914518  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1369 01:51:43.921523  PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
 1370 01:51:43.931062  PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
 1371 01:51:43.937655  PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
 1372 01:51:43.944181  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1373 01:51:43.947561  PCI: 00:14.3 assign_resources, bus 0 link: 0
 1374 01:51:43.957320  PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
 1375 01:51:43.960748  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1376 01:51:43.964269  PCI: 00:15.0 assign_resources, bus 0 link: 0
 1377 01:51:43.967300  
 1378 01:51:43.974055  PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
 1379 01:51:43.977336  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1380 01:51:43.984030  PCI: 00:15.1 assign_resources, bus 0 link: 0
 1381 01:51:43.990345  PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
 1382 01:51:44.000038  PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
 1383 01:51:44.006689  PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
 1384 01:51:44.016772  PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
 1385 01:51:44.019826  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1386 01:51:44.026372  PCI: 00:19.1 assign_resources, bus 0 link: 0
 1387 01:51:44.033296  PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
 1388 01:51:44.042987  PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1389 01:51:44.053108  PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
 1390 01:51:44.056356  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1391 01:51:44.066265  PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
 1392 01:51:44.072875  PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
 1393 01:51:44.079095  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1394 01:51:44.086044  PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
 1395 01:51:44.089590  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1396 01:51:44.096162  PCI: 00:1e.2 assign_resources, bus 2 link: 0
 1397 01:51:44.103029  PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
 1398 01:51:44.109082  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1399 01:51:44.112387  PCI: 00:1e.3 assign_resources, bus 3 link: 0
 1400 01:51:44.119820  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1401 01:51:44.122538  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1402 01:51:44.128584  LPC: Trying to open IO window from 800 size 1ff
 1403 01:51:44.135274  PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
 1404 01:51:44.145338  PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
 1405 01:51:44.152119  PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
 1406 01:51:44.154752  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1407 01:51:44.161444  Root Device assign_resources, bus 0 link: 0
 1408 01:51:44.164694  Done setting resources.
 1409 01:51:44.171557  Show resources in subtree (Root Device)...After assigning values.
 1410 01:51:44.175089   Root Device child on link 0 DOMAIN: 0000
 1411 01:51:44.178401    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1412 01:51:44.188453    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1413 01:51:44.197574    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
 1414 01:51:44.201341     PCI: 00:00.0
 1415 01:51:44.207689     PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1416 01:51:44.210897  
 1417 01:51:44.217675     PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
 1418 01:51:44.227701     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1419 01:51:44.237518     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1420 01:51:44.247142     PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1421 01:51:44.256838     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1422 01:51:44.267401     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
 1423 01:51:44.273707     PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1424 01:51:44.283384     PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1425 01:51:44.293063     PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
 1426 01:51:44.303550     PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
 1427 01:51:44.312998     PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
 1428 01:51:44.322885     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
 1429 01:51:44.329816     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
 1430 01:51:44.339944     PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
 1431 01:51:44.349436     PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
 1432 01:51:44.359551     PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
 1433 01:51:44.369194     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
 1434 01:51:44.379429     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
 1435 01:51:44.389277     PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
 1436 01:51:44.389385     PCI: 00:02.0
 1437 01:51:44.399107     PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
 1438 01:51:44.412488     PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
 1439 01:51:44.419055     PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
 1440 01:51:44.425805     PCI: 00:04.0 child on link 0 GENERIC: 0.0
 1441 01:51:44.435388     PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
 1442 01:51:44.435508      GENERIC: 0.0
 1443 01:51:44.438711     PCI: 00:05.0
 1444 01:51:44.449179     PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
 1445 01:51:44.452264     PCI: 00:07.0 child on link 0 GENERIC: 0.0
 1446 01:51:44.455123      GENERIC: 0.0
 1447 01:51:44.458448     PCI: 00:08.0
 1448 01:51:44.468211     PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
 1449 01:51:44.468326     PCI: 00:0a.0
 1450 01:51:44.471617     PCI: 00:0d.0 child on link 0 USB0 port 0
 1451 01:51:44.474951  
 1452 01:51:44.485345     PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
 1453 01:51:44.488594      USB0 port 0 child on link 0 USB3 port 0
 1454 01:51:44.488690       USB3 port 0
 1455 01:51:44.491871  
 1456 01:51:44.491973       USB3 port 1
 1457 01:51:44.495111       USB3 port 2
 1458 01:51:44.495216       USB3 port 3
 1459 01:51:44.498099     PCI: 00:14.0 child on link 0 USB0 port 0
 1460 01:51:44.511606     PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
 1461 01:51:44.514728      USB0 port 0 child on link 0 USB2 port 0
 1462 01:51:44.514858       USB2 port 0
 1463 01:51:44.517995       USB2 port 1
 1464 01:51:44.521552       USB2 port 2
 1465 01:51:44.521715       USB2 port 3
 1466 01:51:44.524640       USB2 port 4
 1467 01:51:44.524723       USB2 port 5
 1468 01:51:44.528192       USB2 port 6
 1469 01:51:44.528285       USB2 port 7
 1470 01:51:44.530967       USB2 port 8
 1471 01:51:44.531043       USB2 port 9
 1472 01:51:44.534657       USB3 port 0
 1473 01:51:44.534737       USB3 port 1
 1474 01:51:44.537751       USB3 port 2
 1475 01:51:44.537840       USB3 port 3
 1476 01:51:44.541017     PCI: 00:14.2
 1477 01:51:44.550950     PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
 1478 01:51:44.560855     PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
 1479 01:51:44.567350     PCI: 00:14.3 child on link 0 GENERIC: 0.0
 1480 01:51:44.577396     PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
 1481 01:51:44.577571      GENERIC: 0.0
 1482 01:51:44.580666     PCI: 00:15.0 child on link 0 I2C: 00:1a
 1483 01:51:44.584236  
 1484 01:51:44.594138     PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
 1485 01:51:44.594241      I2C: 00:1a
 1486 01:51:44.597278      I2C: 00:31
 1487 01:51:44.597366      I2C: 00:32
 1488 01:51:44.600911     PCI: 00:15.1 child on link 0 I2C: 00:10
 1489 01:51:44.610728     PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
 1490 01:51:44.613865      I2C: 00:10
 1491 01:51:44.613965     PCI: 00:15.2
 1492 01:51:44.626854     PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
 1493 01:51:44.626978     PCI: 00:15.3
 1494 01:51:44.636824     PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
 1495 01:51:44.640215     PCI: 00:16.0
 1496 01:51:44.650191     PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
 1497 01:51:44.650313     PCI: 00:19.0
 1498 01:51:44.656905     PCI: 00:19.1 child on link 0 I2C: 00:15
 1499 01:51:44.666774     PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
 1500 01:51:44.666912      I2C: 00:15
 1501 01:51:44.673661     PCI: 00:1d.0 child on link 0 GENERIC: 0.0
 1502 01:51:44.680363     PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
 1503 01:51:44.693747     PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
 1504 01:51:44.703049     PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
 1505 01:51:44.706251      GENERIC: 0.0
 1506 01:51:44.706356      PCI: 01:00.0
 1507 01:51:44.716723      PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
 1508 01:51:44.726366      PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
 1509 01:51:44.729960     PCI: 00:1e.0
 1510 01:51:44.739992     PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1511 01:51:44.742954     PCI: 00:1e.2 child on link 0 SPI: 00
 1512 01:51:44.756539     PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
 1513 01:51:44.756673      SPI: 00
 1514 01:51:44.759465     PCI: 00:1e.3 child on link 0 SPI: 00
 1515 01:51:44.769574     PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
 1516 01:51:44.773062      SPI: 00
 1517 01:51:44.776087     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1518 01:51:44.786253     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1519 01:51:44.786429      PNP: 0c09.0
 1520 01:51:44.796002      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1521 01:51:44.799726     PCI: 00:1f.2 child on link 0 GENERIC: 0.0
 1522 01:51:44.809449     PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
 1523 01:51:44.819433     PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
 1524 01:51:44.822453      GENERIC: 0.0 child on link 0 GENERIC: 0.0
 1525 01:51:44.825677       GENERIC: 0.0
 1526 01:51:44.825768       GENERIC: 1.0
 1527 01:51:44.828995     PCI: 00:1f.3
 1528 01:51:44.838855     PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
 1529 01:51:44.848741     PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
 1530 01:51:44.852225     PCI: 00:1f.5
 1531 01:51:44.862325     PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
 1532 01:51:44.865691    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1533 01:51:44.865798     APIC: 00
 1534 01:51:44.869079     APIC: 05
 1535 01:51:44.869163     APIC: 01
 1536 01:51:44.869241     APIC: 03
 1537 01:51:44.872179  
 1538 01:51:44.872258     APIC: 07
 1539 01:51:44.872325     APIC: 06
 1540 01:51:44.875578     APIC: 02
 1541 01:51:44.875664     APIC: 04
 1542 01:51:44.878404  Done allocating resources.
 1543 01:51:44.885273  BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
 1544 01:51:44.891730  fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
 1545 01:51:44.895423  Configure GPIOs for I2S audio on UP4.
 1546 01:51:44.901703  BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
 1547 01:51:44.904886  Enabling resources...
 1548 01:51:44.908072  PCI: 00:00.0 subsystem <- 8086/9a12
 1549 01:51:44.908159  PCI: 00:00.0 cmd <- 06
 1550 01:51:44.915186  PCI: 00:02.0 subsystem <- 8086/9a40
 1551 01:51:44.915275  PCI: 00:02.0 cmd <- 03
 1552 01:51:44.918473  PCI: 00:04.0 subsystem <- 8086/9a03
 1553 01:51:44.921778  PCI: 00:04.0 cmd <- 02
 1554 01:51:44.925183  PCI: 00:05.0 subsystem <- 8086/9a19
 1555 01:51:44.928389  PCI: 00:05.0 cmd <- 02
 1556 01:51:44.931340  PCI: 00:08.0 subsystem <- 8086/9a11
 1557 01:51:44.935061  PCI: 00:08.0 cmd <- 06
 1558 01:51:44.938664  PCI: 00:0d.0 subsystem <- 8086/9a13
 1559 01:51:44.941642  PCI: 00:0d.0 cmd <- 02
 1560 01:51:44.944518  PCI: 00:14.0 subsystem <- 8086/a0ed
 1561 01:51:44.947944  PCI: 00:14.0 cmd <- 02
 1562 01:51:44.951291  PCI: 00:14.2 subsystem <- 8086/a0ef
 1563 01:51:44.954663  PCI: 00:14.2 cmd <- 02
 1564 01:51:44.958111  PCI: 00:14.3 subsystem <- 8086/a0f0
 1565 01:51:44.958201  PCI: 00:14.3 cmd <- 02
 1566 01:51:44.965047  PCI: 00:15.0 subsystem <- 8086/a0e8
 1567 01:51:44.965156  PCI: 00:15.0 cmd <- 02
 1568 01:51:44.968010  PCI: 00:15.1 subsystem <- 8086/a0e9
 1569 01:51:44.971464  PCI: 00:15.1 cmd <- 02
 1570 01:51:44.974689  PCI: 00:15.2 subsystem <- 8086/a0ea
 1571 01:51:44.977891  PCI: 00:15.2 cmd <- 02
 1572 01:51:44.980791  PCI: 00:15.3 subsystem <- 8086/a0eb
 1573 01:51:44.984058  PCI: 00:15.3 cmd <- 02
 1574 01:51:44.987803  PCI: 00:16.0 subsystem <- 8086/a0e0
 1575 01:51:44.990913  PCI: 00:16.0 cmd <- 02
 1576 01:51:44.994385  PCI: 00:19.1 subsystem <- 8086/a0c6
 1577 01:51:44.997643  PCI: 00:19.1 cmd <- 02
 1578 01:51:45.001006  PCI: 00:1d.0 bridge ctrl <- 0013
 1579 01:51:45.004212  PCI: 00:1d.0 subsystem <- 8086/a0b0
 1580 01:51:45.007552  PCI: 00:1d.0 cmd <- 06
 1581 01:51:45.011013  PCI: 00:1e.0 subsystem <- 8086/a0a8
 1582 01:51:45.011152  PCI: 00:1e.0 cmd <- 06
 1583 01:51:45.013933  
 1584 01:51:45.017007  PCI: 00:1e.2 subsystem <- 8086/a0aa
 1585 01:51:45.017114  PCI: 00:1e.2 cmd <- 06
 1586 01:51:45.023910  PCI: 00:1e.3 subsystem <- 8086/a0ab
 1587 01:51:45.024011  PCI: 00:1e.3 cmd <- 02
 1588 01:51:45.027310  PCI: 00:1f.0 subsystem <- 8086/a087
 1589 01:51:45.030189  PCI: 00:1f.0 cmd <- 407
 1590 01:51:45.033947  PCI: 00:1f.3 subsystem <- 8086/a0c8
 1591 01:51:45.036972  PCI: 00:1f.3 cmd <- 02
 1592 01:51:45.040108  PCI: 00:1f.5 subsystem <- 8086/a0a4
 1593 01:51:45.043336  PCI: 00:1f.5 cmd <- 406
 1594 01:51:45.047854  PCI: 01:00.0 cmd <- 02
 1595 01:51:45.052556  done.
 1596 01:51:45.055844  BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
 1597 01:51:45.059023  Initializing devices...
 1598 01:51:45.062328  Root Device init
 1599 01:51:45.065375  Chrome EC: Set SMI mask to 0x0000000000000000
 1600 01:51:45.072337  Chrome EC: clear events_b mask to 0x0000000000000000
 1601 01:51:45.078903  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1602 01:51:45.085544  Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
 1603 01:51:45.088718  Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
 1604 01:51:45.092027  
 1605 01:51:45.094816  Chrome EC: Set WAKE mask to 0x0000000000000000
 1606 01:51:45.102523  fw_config match found: DB_USB=USB3_ACTIVE
 1607 01:51:45.105319  Configure Right Type-C port orientation for retimer
 1608 01:51:45.108570  Root Device init finished in 44 msecs
 1609 01:51:45.112546  PCI: 00:00.0 init
 1610 01:51:45.115808  CPU TDP = 9 Watts
 1611 01:51:45.115897  CPU PL1 = 9 Watts
 1612 01:51:45.119275  
 1613 01:51:45.119361  CPU PL2 = 40 Watts
 1614 01:51:45.122759  CPU PL4 = 83 Watts
 1615 01:51:45.126004  PCI: 00:00.0 init finished in 8 msecs
 1616 01:51:45.126094  PCI: 00:02.0 init
 1617 01:51:45.129391  
 1618 01:51:45.129484  GMA: Found VBT in CBFS
 1619 01:51:45.132185  GMA: Found valid VBT in CBFS
 1620 01:51:45.138889  framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
 1621 01:51:45.145635                     x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
 1622 01:51:45.148572  PCI: 00:02.0 init finished in 18 msecs
 1623 01:51:45.152370  PCI: 00:05.0 init
 1624 01:51:45.155382  PCI: 00:05.0 init finished in 0 msecs
 1625 01:51:45.158710  PCI: 00:08.0 init
 1626 01:51:45.162483  PCI: 00:08.0 init finished in 0 msecs
 1627 01:51:45.165301  PCI: 00:14.0 init
 1628 01:51:45.168820  PCI: 00:14.0 init finished in 0 msecs
 1629 01:51:45.171879  PCI: 00:14.2 init
 1630 01:51:45.175387  PCI: 00:14.2 init finished in 0 msecs
 1631 01:51:45.178529  PCI: 00:15.0 init
 1632 01:51:45.181654  I2C bus 0 version 0x3230302a
 1633 01:51:45.185409  DW I2C bus 0 at 0x7fe4e000 (400 KHz)
 1634 01:51:45.188315  PCI: 00:15.0 init finished in 6 msecs
 1635 01:51:45.191568  PCI: 00:15.1 init
 1636 01:51:45.191653  I2C bus 1 version 0x3230302a
 1637 01:51:45.198374  DW I2C bus 1 at 0x7fe4f000 (400 KHz)
 1638 01:51:45.201898  PCI: 00:15.1 init finished in 6 msecs
 1639 01:51:45.201981  PCI: 00:15.2 init
 1640 01:51:45.205011  I2C bus 2 version 0x3230302a
 1641 01:51:45.207912  DW I2C bus 2 at 0x7fe50000 (400 KHz)
 1642 01:51:45.214531  PCI: 00:15.2 init finished in 6 msecs
 1643 01:51:45.214631  PCI: 00:15.3 init
 1644 01:51:45.217859  I2C bus 3 version 0x3230302a
 1645 01:51:45.221081  DW I2C bus 3 at 0x7fe51000 (400 KHz)
 1646 01:51:45.224229  PCI: 00:15.3 init finished in 6 msecs
 1647 01:51:45.228302  PCI: 00:16.0 init
 1648 01:51:45.230963  PCI: 00:16.0 init finished in 0 msecs
 1649 01:51:45.234561  PCI: 00:19.1 init
 1650 01:51:45.237816  I2C bus 5 version 0x3230302a
 1651 01:51:45.241346  DW I2C bus 5 at 0x7fe53000 (400 KHz)
 1652 01:51:45.244419  PCI: 00:19.1 init finished in 6 msecs
 1653 01:51:45.247610  PCI: 00:1d.0 init
 1654 01:51:45.250634  Initializing PCH PCIe bridge.
 1655 01:51:45.254347  PCI: 00:1d.0 init finished in 3 msecs
 1656 01:51:45.257330  PCI: 00:1f.0 init
 1657 01:51:45.260715  IOAPIC: Initializing IOAPIC at 0xfec00000
 1658 01:51:45.264083  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1659 01:51:45.267275  
 1660 01:51:45.267380  IOAPIC: ID = 0x02
 1661 01:51:45.270693  IOAPIC: Dumping registers
 1662 01:51:45.273723    reg 0x0000: 0x02000000
 1663 01:51:45.273811    reg 0x0001: 0x00770020
 1664 01:51:45.277178    reg 0x0002: 0x00000000
 1665 01:51:45.280432  PCI: 00:1f.0 init finished in 21 msecs
 1666 01:51:45.284306  PCI: 00:1f.2 init
 1667 01:51:45.287428  Disabling ACPI via APMC.
 1668 01:51:45.291439  APMC done.
 1669 01:51:45.294884  PCI: 00:1f.2 init finished in 6 msecs
 1670 01:51:45.306331  PCI: 01:00.0 init
 1671 01:51:45.309481  PCI: 01:00.0 init finished in 0 msecs
 1672 01:51:45.312618  PNP: 0c09.0 init
 1673 01:51:45.319453  Google Chrome EC uptime: 8.314 seconds
 1674 01:51:45.323002  Google Chrome AP resets since EC boot: 1
 1675 01:51:45.325909  Google Chrome most recent AP reset causes:
 1676 01:51:45.329515  	0.455: 32775 shutdown: entering G3
 1677 01:51:45.335951  Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
 1678 01:51:45.339041  PNP: 0c09.0 init finished in 23 msecs
 1679 01:51:45.346111  Devices initialized
 1680 01:51:45.349199  Show all devs... After init.
 1681 01:51:45.352772  Root Device: enabled 1
 1682 01:51:45.352858  DOMAIN: 0000: enabled 1
 1683 01:51:45.356019  CPU_CLUSTER: 0: enabled 1
 1684 01:51:45.359290  PCI: 00:00.0: enabled 1
 1685 01:51:45.362374  PCI: 00:02.0: enabled 1
 1686 01:51:45.362461  PCI: 00:04.0: enabled 1
 1687 01:51:45.365709  PCI: 00:05.0: enabled 1
 1688 01:51:45.369257  PCI: 00:06.0: enabled 0
 1689 01:51:45.372229  PCI: 00:07.0: enabled 0
 1690 01:51:45.372354  PCI: 00:07.1: enabled 0
 1691 01:51:45.375841  PCI: 00:07.2: enabled 0
 1692 01:51:45.378805  PCI: 00:07.3: enabled 0
 1693 01:51:45.382371  PCI: 00:08.0: enabled 1
 1694 01:51:45.382457  PCI: 00:09.0: enabled 0
 1695 01:51:45.385627  PCI: 00:0a.0: enabled 0
 1696 01:51:45.389092  PCI: 00:0d.0: enabled 1
 1697 01:51:45.391881  PCI: 00:0d.1: enabled 0
 1698 01:51:45.391956  PCI: 00:0d.2: enabled 0
 1699 01:51:45.395359  PCI: 00:0d.3: enabled 0
 1700 01:51:45.398725  PCI: 00:0e.0: enabled 0
 1701 01:51:45.401877  PCI: 00:10.2: enabled 1
 1702 01:51:45.401961  PCI: 00:10.6: enabled 0
 1703 01:51:45.405216  PCI: 00:10.7: enabled 0
 1704 01:51:45.408669  PCI: 00:12.0: enabled 0
 1705 01:51:45.411995  PCI: 00:12.6: enabled 0
 1706 01:51:45.412082  PCI: 00:13.0: enabled 0
 1707 01:51:45.415061  PCI: 00:14.0: enabled 1
 1708 01:51:45.418316  PCI: 00:14.1: enabled 0
 1709 01:51:45.421425  PCI: 00:14.2: enabled 1
 1710 01:51:45.421539  PCI: 00:14.3: enabled 1
 1711 01:51:45.425238  PCI: 00:15.0: enabled 1
 1712 01:51:45.428116  PCI: 00:15.1: enabled 1
 1713 01:51:45.428196  PCI: 00:15.2: enabled 1
 1714 01:51:45.431984  
 1715 01:51:45.432083  PCI: 00:15.3: enabled 1
 1716 01:51:45.435230  PCI: 00:16.0: enabled 1
 1717 01:51:45.438319  PCI: 00:16.1: enabled 0
 1718 01:51:45.438444  PCI: 00:16.2: enabled 0
 1719 01:51:45.441588  PCI: 00:16.3: enabled 0
 1720 01:51:45.444851  PCI: 00:16.4: enabled 0
 1721 01:51:45.448070  PCI: 00:16.5: enabled 0
 1722 01:51:45.448150  PCI: 00:17.0: enabled 0
 1723 01:51:45.451348  PCI: 00:19.0: enabled 0
 1724 01:51:45.454777  PCI: 00:19.1: enabled 1
 1725 01:51:45.457945  PCI: 00:19.2: enabled 0
 1726 01:51:45.458035  PCI: 00:1c.0: enabled 1
 1727 01:51:45.461279  PCI: 00:1c.1: enabled 0
 1728 01:51:45.464486  PCI: 00:1c.2: enabled 0
 1729 01:51:45.468000  PCI: 00:1c.3: enabled 0
 1730 01:51:45.468123  PCI: 00:1c.4: enabled 0
 1731 01:51:45.471483  PCI: 00:1c.5: enabled 0
 1732 01:51:45.474077  PCI: 00:1c.6: enabled 1
 1733 01:51:45.477901  PCI: 00:1c.7: enabled 0
 1734 01:51:45.477990  PCI: 00:1d.0: enabled 1
 1735 01:51:45.480960  PCI: 00:1d.1: enabled 0
 1736 01:51:45.484526  PCI: 00:1d.2: enabled 1
 1737 01:51:45.487543  PCI: 00:1d.3: enabled 0
 1738 01:51:45.487630  PCI: 00:1e.0: enabled 1
 1739 01:51:45.491286  PCI: 00:1e.1: enabled 0
 1740 01:51:45.494474  PCI: 00:1e.2: enabled 1
 1741 01:51:45.497528  PCI: 00:1e.3: enabled 1
 1742 01:51:45.497628  PCI: 00:1f.0: enabled 1
 1743 01:51:45.500892  PCI: 00:1f.1: enabled 0
 1744 01:51:45.504024  PCI: 00:1f.2: enabled 1
 1745 01:51:45.504153  PCI: 00:1f.3: enabled 1
 1746 01:51:45.507452  PCI: 00:1f.4: enabled 0
 1747 01:51:45.510691  PCI: 00:1f.5: enabled 1
 1748 01:51:45.513779  PCI: 00:1f.6: enabled 0
 1749 01:51:45.513867  PCI: 00:1f.7: enabled 0
 1750 01:51:45.516915  APIC: 00: enabled 1
 1751 01:51:45.520647  GENERIC: 0.0: enabled 1
 1752 01:51:45.524215  GENERIC: 0.0: enabled 1
 1753 01:51:45.524305  GENERIC: 1.0: enabled 1
 1754 01:51:45.527004  GENERIC: 0.0: enabled 1
 1755 01:51:45.530457  GENERIC: 1.0: enabled 1
 1756 01:51:45.530547  USB0 port 0: enabled 1
 1757 01:51:45.533495  GENERIC: 0.0: enabled 1
 1758 01:51:45.537218  USB0 port 0: enabled 1
 1759 01:51:45.540210  GENERIC: 0.0: enabled 1
 1760 01:51:45.540319  I2C: 00:1a: enabled 1
 1761 01:51:45.543542  I2C: 00:31: enabled 1
 1762 01:51:45.546777  I2C: 00:32: enabled 1
 1763 01:51:45.546898  I2C: 00:10: enabled 1
 1764 01:51:45.550423  I2C: 00:15: enabled 1
 1765 01:51:45.553549  GENERIC: 0.0: enabled 0
 1766 01:51:45.557372  GENERIC: 1.0: enabled 0
 1767 01:51:45.557527  GENERIC: 0.0: enabled 1
 1768 01:51:45.560316  SPI: 00: enabled 1
 1769 01:51:45.560428  SPI: 00: enabled 1
 1770 01:51:45.563489  PNP: 0c09.0: enabled 1
 1771 01:51:45.567582  GENERIC: 0.0: enabled 1
 1772 01:51:45.570330  USB3 port 0: enabled 1
 1773 01:51:45.570417  USB3 port 1: enabled 1
 1774 01:51:45.573261  USB3 port 2: enabled 0
 1775 01:51:45.576506  USB3 port 3: enabled 0
 1776 01:51:45.576606  USB2 port 0: enabled 0
 1777 01:51:45.579795  USB2 port 1: enabled 1
 1778 01:51:45.583448  USB2 port 2: enabled 1
 1779 01:51:45.586836  USB2 port 3: enabled 0
 1780 01:51:45.586934  USB2 port 4: enabled 1
 1781 01:51:45.589818  USB2 port 5: enabled 0
 1782 01:51:45.593470  USB2 port 6: enabled 0
 1783 01:51:45.593567  USB2 port 7: enabled 0
 1784 01:51:45.596566  USB2 port 8: enabled 0
 1785 01:51:45.599897  USB2 port 9: enabled 0
 1786 01:51:45.603400  USB3 port 0: enabled 0
 1787 01:51:45.603488  USB3 port 1: enabled 1
 1788 01:51:45.606084  USB3 port 2: enabled 0
 1789 01:51:45.609560  USB3 port 3: enabled 0
 1790 01:51:45.609648  GENERIC: 0.0: enabled 1
 1791 01:51:45.612739  GENERIC: 1.0: enabled 1
 1792 01:51:45.616034  APIC: 05: enabled 1
 1793 01:51:45.616124  APIC: 01: enabled 1
 1794 01:51:45.619495  APIC: 03: enabled 1
 1795 01:51:45.622880  APIC: 07: enabled 1
 1796 01:51:45.622963  APIC: 06: enabled 1
 1797 01:51:45.626231  APIC: 02: enabled 1
 1798 01:51:45.626313  APIC: 04: enabled 1
 1799 01:51:45.629357  
 1800 01:51:45.629447  PCI: 01:00.0: enabled 1
 1801 01:51:45.635930  BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
 1802 01:51:45.639292  FMAP: area RW_ELOG found @ f30000 (4096 bytes)
 1803 01:51:45.642646  ELOG: NV offset 0xf30000 size 0x1000
 1804 01:51:45.651299  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1805 01:51:45.657615  ELOG: Event(17) added with size 13 at 2022-11-16 01:51:45 UTC
 1806 01:51:45.664783  ELOG: Event(92) added with size 9 at 2022-11-16 01:51:45 UTC
 1807 01:51:45.671132  ELOG: Event(93) added with size 9 at 2022-11-16 01:51:45 UTC
 1808 01:51:45.677553  ELOG: Event(9E) added with size 10 at 2022-11-16 01:51:45 UTC
 1809 01:51:45.684509  ELOG: Event(9F) added with size 14 at 2022-11-16 01:51:45 UTC
 1810 01:51:45.690699  BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
 1811 01:51:45.694147  ELOG: Event(A1) added with size 10 at 2022-11-16 01:51:45 UTC
 1812 01:51:45.697468  
 1813 01:51:45.704175  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1814 01:51:45.710856  ELOG: Event(A0) added with size 9 at 2022-11-16 01:51:45 UTC
 1815 01:51:45.713777  elog_add_boot_reason: Logged dev mode boot
 1816 01:51:45.720646  BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
 1817 01:51:45.720744  Finalize devices...
 1818 01:51:45.723669  Devices finalized
 1819 01:51:45.730757  BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
 1820 01:51:45.733946  FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
 1821 01:51:45.740870  BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
 1822 01:51:45.744067  ME: HFSTS1                      : 0x80030055
 1823 01:51:45.750598  ME: HFSTS2                      : 0x30280116
 1824 01:51:45.753755  ME: HFSTS3                      : 0x00000050
 1825 01:51:45.757158  ME: HFSTS4                      : 0x00004000
 1826 01:51:45.763843  ME: HFSTS5                      : 0x00000000
 1827 01:51:45.766742  ME: HFSTS6                      : 0x40400006
 1828 01:51:45.770242  ME: Manufacturing Mode          : YES
 1829 01:51:45.773696  ME: SPI Protection Mode Enabled : NO
 1830 01:51:45.780394  ME: FW Partition Table          : OK
 1831 01:51:45.783920  ME: Bringup Loader Failure      : NO
 1832 01:51:45.786681  ME: Firmware Init Complete      : NO
 1833 01:51:45.790296  ME: Boot Options Present        : NO
 1834 01:51:45.793700  ME: Update In Progress          : NO
 1835 01:51:45.796481  ME: D0i3 Support                : YES
 1836 01:51:45.800218  ME: Low Power State Enabled     : NO
 1837 01:51:45.803404  ME: CPU Replaced                : YES
 1838 01:51:45.810262  ME: CPU Replacement Valid       : YES
 1839 01:51:45.813440  ME: Current Working State       : 5
 1840 01:51:45.816350  ME: Current Operation State     : 1
 1841 01:51:45.820126  ME: Current Operation Mode      : 3
 1842 01:51:45.823291  ME: Error Code                  : 0
 1843 01:51:45.826445  ME: Enhanced Debug Mode         : NO
 1844 01:51:45.829810  ME: CPU Debug Disabled          : YES
 1845 01:51:45.832990  ME: TXT Support                 : NO
 1846 01:51:45.839666  BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
 1847 01:51:45.849459  CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
 1848 01:51:45.852624  CBFS: 'fallback/slic' not found.
 1849 01:51:45.856253  ACPI: Writing ACPI tables at 76b01000.
 1850 01:51:45.856369  ACPI:    * FACS
 1851 01:51:45.859115  ACPI:    * DSDT
 1852 01:51:45.862802  Ramoops buffer: 0x100000@0x76a00000.
 1853 01:51:45.866019  FMAP: area RO_VPD found @ 1800000 (16384 bytes)
 1854 01:51:45.872395  FMAP: area RW_VPD found @ f35000 (8192 bytes)
 1855 01:51:45.876400  Google Chrome EC: version:
 1856 01:51:45.879086  	ro: voema_v2.0.10114-a447f03e46
 1857 01:51:45.882268  	rw: voema_v2.0.10114-a447f03e46
 1858 01:51:45.882354    running image: 2
 1859 01:51:45.888965  PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
 1860 01:51:45.894060  ACPI:    * FADT
 1861 01:51:45.894158  SCI is IRQ9
 1862 01:51:45.900574  ACPI: added table 1/32, length now 40
 1863 01:51:45.900673  ACPI:     * SSDT
 1864 01:51:45.903976  Found 1 CPU(s) with 8 core(s) each.
 1865 01:51:45.910594  \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
 1866 01:51:45.914018  \_SB.DPTF: Intel DPTF at GENERIC: 0.0
 1867 01:51:45.917405  \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
 1868 01:51:45.920194  \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
 1869 01:51:45.927032  \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
 1870 01:51:45.933873  \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
 1871 01:51:45.936938  \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
 1872 01:51:45.943441  \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
 1873 01:51:45.950552  \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
 1874 01:51:45.953482  \_SB.PCI0.RP09: Added StorageD3Enable property
 1875 01:51:45.960066  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1876 01:51:45.963314  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
 1877 01:51:45.969873  PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
 1878 01:51:45.973220  PS2K: Passing 80 keymaps to kernel
 1879 01:51:45.980262  \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
 1880 01:51:45.986485  \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
 1881 01:51:45.993158  \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
 1882 01:51:45.999896  \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
 1883 01:51:46.006298  \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
 1884 01:51:46.013010  \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
 1885 01:51:46.019614  \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
 1886 01:51:46.026213  \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
 1887 01:51:46.029926  ACPI: added table 2/32, length now 44
 1888 01:51:46.030025  ACPI:    * MCFG
 1889 01:51:46.032784  
 1890 01:51:46.036400  ACPI: added table 3/32, length now 48
 1891 01:51:46.036489  ACPI:    * TPM2
 1892 01:51:46.039316  TPM2 log created at 0x769f0000
 1893 01:51:46.043204  ACPI: added table 4/32, length now 52
 1894 01:51:46.046339  ACPI:    * MADT
 1895 01:51:46.046428  SCI is IRQ9
 1896 01:51:46.049415  ACPI: added table 5/32, length now 56
 1897 01:51:46.053061  current = 76b09850
 1898 01:51:46.053153  ACPI:    * DMAR
 1899 01:51:46.056100  ACPI: added table 6/32, length now 60
 1900 01:51:46.059354  
 1901 01:51:46.062695  ACPI: added table 7/32, length now 64
 1902 01:51:46.062785  ACPI:    * HPET
 1903 01:51:46.066517  ACPI: added table 8/32, length now 68
 1904 01:51:46.069294  ACPI: done.
 1905 01:51:46.069385  ACPI tables: 35216 bytes.
 1906 01:51:46.072408  
 1907 01:51:46.072497  smbios_write_tables: 769ef000
 1908 01:51:46.076618  EC returned error result code 3
 1909 01:51:46.080391  Couldn't obtain OEM name from CBI
 1910 01:51:46.083958  Create SMBIOS type 16
 1911 01:51:46.087705  Create SMBIOS type 17
 1912 01:51:46.090893  GENERIC: 0.0 (WIFI Device)
 1913 01:51:46.090991  SMBIOS tables: 1734 bytes.
 1914 01:51:46.093759  
 1915 01:51:46.097275  Writing table forward entry at 0x00000500
 1916 01:51:46.103837  Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
 1917 01:51:46.107225  Writing coreboot table at 0x76b25000
 1918 01:51:46.113722   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1919 01:51:46.117165   1. 0000000000001000-000000000009ffff: RAM
 1920 01:51:46.120051   2. 00000000000a0000-00000000000fffff: RESERVED
 1921 01:51:46.126953   3. 0000000000100000-00000000769eefff: RAM
 1922 01:51:46.129959   4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
 1923 01:51:46.136382   5. 0000000076b98000-0000000076c09fff: RAMSTAGE
 1924 01:51:46.143103   6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
 1925 01:51:46.146312   7. 0000000077000000-000000007fbfffff: RESERVED
 1926 01:51:46.153191   8. 00000000c0000000-00000000cfffffff: RESERVED
 1927 01:51:46.156490   9. 00000000f8000000-00000000f9ffffff: RESERVED
 1928 01:51:46.163123  10. 00000000fb000000-00000000fb000fff: RESERVED
 1929 01:51:46.166326  11. 00000000fe000000-00000000fe00ffff: RESERVED
 1930 01:51:46.169676  12. 00000000fed80000-00000000fed87fff: RESERVED
 1931 01:51:46.176096  13. 00000000fed90000-00000000fed92fff: RESERVED
 1932 01:51:46.179269  14. 00000000feda0000-00000000feda1fff: RESERVED
 1933 01:51:46.186626  15. 00000000fedc0000-00000000feddffff: RESERVED
 1934 01:51:46.189123  16. 0000000100000000-00000004803fffff: RAM
 1935 01:51:46.192503  Passing 4 GPIOs to payload:
 1936 01:51:46.198984              NAME |       PORT | POLARITY |     VALUE
 1937 01:51:46.202883               lid |  undefined |     high |      high
 1938 01:51:46.209355             power |  undefined |     high |       low
 1939 01:51:46.212302             oprom |  undefined |     high |       low
 1940 01:51:46.219238          EC in RW | 0x000000e5 |     high |      high
 1941 01:51:46.225694  Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f865
 1942 01:51:46.228883  coreboot table: 1576 bytes.
 1943 01:51:46.232087  IMD ROOT    0. 0x76fff000 0x00001000
 1944 01:51:46.235180  IMD SMALL   1. 0x76ffe000 0x00001000
 1945 01:51:46.238798  FSP MEMORY  2. 0x76c4e000 0x003b0000
 1946 01:51:46.242094  VPD         3. 0x76c4d000 0x00000367
 1947 01:51:46.245057  RO MCACHE   4. 0x76c4c000 0x00000fdc
 1948 01:51:46.251965  CONSOLE     5. 0x76c2c000 0x00020000
 1949 01:51:46.255440  FMAP        6. 0x76c2b000 0x00000578
 1950 01:51:46.258604  TIME STAMP  7. 0x76c2a000 0x00000910
 1951 01:51:46.261840  VBOOT WORK  8. 0x76c16000 0x00014000
 1952 01:51:46.265627  ROMSTG STCK 9. 0x76c15000 0x00001000
 1953 01:51:46.268354  AFTER CAR  10. 0x76c0a000 0x0000b000
 1954 01:51:46.271952  RAMSTAGE   11. 0x76b97000 0x00073000
 1955 01:51:46.274836  REFCODE    12. 0x76b42000 0x00055000
 1956 01:51:46.278086  
 1957 01:51:46.281900  SMM BACKUP 13. 0x76b32000 0x00010000
 1958 01:51:46.284623  4f444749   14. 0x76b30000 0x00002000
 1959 01:51:46.288245  EXT VBT15. 0x76b2d000 0x0000219f
 1960 01:51:46.291436  COREBOOT   16. 0x76b25000 0x00008000
 1961 01:51:46.294691  ACPI       17. 0x76b01000 0x00024000
 1962 01:51:46.297804  ACPI GNVS  18. 0x76b00000 0x00001000
 1963 01:51:46.301045  RAMOOPS    19. 0x76a00000 0x00100000
 1964 01:51:46.304596  TPM2 TCGLOG20. 0x769f0000 0x00010000
 1965 01:51:46.310858  SMBIOS     21. 0x769ef000 0x00000800
 1966 01:51:46.310956  IMD small region:
 1967 01:51:46.314545    IMD ROOT    0. 0x76ffec00 0x00000400
 1968 01:51:46.317654    FSP RUNTIME 1. 0x76ffebe0 0x00000004
 1969 01:51:46.321195  
 1970 01:51:46.324672    POWER STATE 2. 0x76ffeb80 0x00000044
 1971 01:51:46.327254    ROMSTAGE    3. 0x76ffeb60 0x00000004
 1972 01:51:46.330593    MEM INFO    4. 0x76ffe980 0x000001e0
 1973 01:51:46.337192  BS: BS_WRITE_TABLES run times (exec / console): 7 / 484 ms
 1974 01:51:46.340492  MTRR: Physical address space:
 1975 01:51:46.347408  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1976 01:51:46.353832  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1977 01:51:46.357309  0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
 1978 01:51:46.363625  0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
 1979 01:51:46.370239  0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
 1980 01:51:46.377013  0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
 1981 01:51:46.383677  0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
 1982 01:51:46.387133  MTRR: Fixed MSR 0x250 0x0606060606060606
 1983 01:51:46.393661  MTRR: Fixed MSR 0x258 0x0606060606060606
 1984 01:51:46.396655  MTRR: Fixed MSR 0x259 0x0000000000000000
 1985 01:51:46.400250  MTRR: Fixed MSR 0x268 0x0606060606060606
 1986 01:51:46.403344  MTRR: Fixed MSR 0x269 0x0606060606060606
 1987 01:51:46.407162  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1988 01:51:46.413754  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1989 01:51:46.417142  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1990 01:51:46.420176  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1991 01:51:46.423499  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1992 01:51:46.429944  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1993 01:51:46.433020  call enable_fixed_mtrr()
 1994 01:51:46.436293  CPU physical address size: 39 bits
 1995 01:51:46.439631  MTRR: default type WB/UC MTRR counts: 6/7.
 1996 01:51:46.443574  MTRR: WB selected as default type.
 1997 01:51:46.449907  MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
 1998 01:51:46.456592  MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
 1999 01:51:46.462985  MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
 2000 01:51:46.469953  MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
 2001 01:51:46.476220  MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 2002 01:51:46.483140  MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
 2003 01:51:46.489300  MTRR: Fixed MSR 0x250 0x0606060606060606
 2004 01:51:46.493068  MTRR: Fixed MSR 0x258 0x0606060606060606
 2005 01:51:46.496170  MTRR: Fixed MSR 0x259 0x0000000000000000
 2006 01:51:46.499230  MTRR: Fixed MSR 0x268 0x0606060606060606
 2007 01:51:46.505856  MTRR: Fixed MSR 0x269 0x0606060606060606
 2008 01:51:46.509308  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2009 01:51:46.512532  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2010 01:51:46.516050  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2011 01:51:46.522342  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2012 01:51:46.525992  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2013 01:51:46.528964  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2014 01:51:46.529056  
 2015 01:51:46.533351  MTRR check
 2016 01:51:46.536755  call enable_fixed_mtrr()
 2017 01:51:46.536851  Fixed MTRRs   : Enabled
 2018 01:51:46.539657  Variable MTRRs: Enabled
 2019 01:51:46.539745  
 2020 01:51:46.543726  MTRR: Fixed MSR 0x250 0x0606060606060606
 2021 01:51:46.549696  MTRR: Fixed MSR 0x250 0x0606060606060606
 2022 01:51:46.552950  MTRR: Fixed MSR 0x258 0x0606060606060606
 2023 01:51:46.557118  MTRR: Fixed MSR 0x259 0x0000000000000000
 2024 01:51:46.559752  MTRR: Fixed MSR 0x268 0x0606060606060606
 2025 01:51:46.566420  MTRR: Fixed MSR 0x269 0x0606060606060606
 2026 01:51:46.570051  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2027 01:51:46.572960  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2028 01:51:46.576299  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2029 01:51:46.579775  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2030 01:51:46.582842  
 2031 01:51:46.586140  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2032 01:51:46.589278  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2033 01:51:46.596463  MTRR: Fixed MSR 0x258 0x0606060606060606
 2034 01:51:46.600113  MTRR: Fixed MSR 0x259 0x0000000000000000
 2035 01:51:46.603164  MTRR: Fixed MSR 0x268 0x0606060606060606
 2036 01:51:46.606544  MTRR: Fixed MSR 0x269 0x0606060606060606
 2037 01:51:46.613059  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2038 01:51:46.616332  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2039 01:51:46.619637  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2040 01:51:46.622892  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2041 01:51:46.629842  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2042 01:51:46.632704  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2043 01:51:46.636040  call enable_fixed_mtrr()
 2044 01:51:46.639596  call enable_fixed_mtrr()
 2045 01:51:46.643008  MTRR: Fixed MSR 0x250 0x0606060606060606
 2046 01:51:46.646513  MTRR: Fixed MSR 0x250 0x0606060606060606
 2047 01:51:46.652844  MTRR: Fixed MSR 0x258 0x0606060606060606
 2048 01:51:46.656271  MTRR: Fixed MSR 0x259 0x0000000000000000
 2049 01:51:46.659103  MTRR: Fixed MSR 0x268 0x0606060606060606
 2050 01:51:46.663035  MTRR: Fixed MSR 0x269 0x0606060606060606
 2051 01:51:46.669435  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2052 01:51:46.672696  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2053 01:51:46.676228  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2054 01:51:46.679154  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2055 01:51:46.682503  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2056 01:51:46.686225  
 2057 01:51:46.689154  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2058 01:51:46.695947  MTRR: Fixed MSR 0x258 0x0606060606060606
 2059 01:51:46.699190  MTRR: Fixed MSR 0x259 0x0000000000000000
 2060 01:51:46.702583  MTRR: Fixed MSR 0x268 0x0606060606060606
 2061 01:51:46.705576  MTRR: Fixed MSR 0x269 0x0606060606060606
 2062 01:51:46.708828  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2063 01:51:46.712511  
 2064 01:51:46.715472  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2065 01:51:46.719133  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2066 01:51:46.722410  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2067 01:51:46.725237  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2068 01:51:46.728594  
 2069 01:51:46.732037  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2070 01:51:46.735309  call enable_fixed_mtrr()
 2071 01:51:46.738685  call enable_fixed_mtrr()
 2072 01:51:46.741944  CPU physical address size: 39 bits
 2073 01:51:46.745470  CPU physical address size: 39 bits
 2074 01:51:46.752193  CPU physical address size: 39 bits
 2075 01:51:46.755263  CPU physical address size: 39 bits
 2076 01:51:46.761945  BS: BS_WRITE_TABLES exit times (exec / console): 52 / 151 ms
 2077 01:51:46.765001  CPU physical address size: 39 bits
 2078 01:51:46.769990  Checking cr50 for pending updates
 2079 01:51:46.774015  MTRR: Fixed MSR 0x250 0x0606060606060606
 2080 01:51:46.778178  MTRR: Fixed MSR 0x250 0x0606060606060606
 2081 01:51:46.784387  MTRR: Fixed MSR 0x258 0x0606060606060606
 2082 01:51:46.787517  MTRR: Fixed MSR 0x259 0x0000000000000000
 2083 01:51:46.790847  MTRR: Fixed MSR 0x268 0x0606060606060606
 2084 01:51:46.794090  MTRR: Fixed MSR 0x269 0x0606060606060606
 2085 01:51:46.800724  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2086 01:51:46.804381  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2087 01:51:46.807746  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2088 01:51:46.811005  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2089 01:51:46.814273  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2090 01:51:46.817201  
 2091 01:51:46.820398  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2092 01:51:46.827372  MTRR: Fixed MSR 0x258 0x0606060606060606
 2093 01:51:46.827489  call enable_fixed_mtrr()
 2094 01:51:46.834022  MTRR: Fixed MSR 0x259 0x0000000000000000
 2095 01:51:46.837207  MTRR: Fixed MSR 0x268 0x0606060606060606
 2096 01:51:46.840805  MTRR: Fixed MSR 0x269 0x0606060606060606
 2097 01:51:46.843783  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2098 01:51:46.847415  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2099 01:51:46.850215  
 2100 01:51:46.853783  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2101 01:51:46.857304  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2102 01:51:46.860367  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2103 01:51:46.864124  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2104 01:51:46.870254  CPU physical address size: 39 bits
 2105 01:51:46.874433  call enable_fixed_mtrr()
 2106 01:51:46.877697  Reading cr50 TPM mode
 2107 01:51:46.881135  CPU physical address size: 39 bits
 2108 01:51:46.887873  BS: BS_PAYLOAD_LOAD entry times (exec / console): 112 / 8 ms
 2109 01:51:46.894585  CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
 2110 01:51:46.900941  Checking segment from ROM address 0xffc02b38
 2111 01:51:46.904641  Checking segment from ROM address 0xffc02b54
 2112 01:51:46.907515  Loading segment from ROM address 0xffc02b38
 2113 01:51:46.911003  
 2114 01:51:46.911102    code (compression=0)
 2115 01:51:46.921069    New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
 2116 01:51:46.927742  Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
 2117 01:51:46.930624  it's not compressed!
 2118 01:51:47.071510  [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
 2119 01:51:47.078183  Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
 2120 01:51:47.084818  Loading segment from ROM address 0xffc02b54
 2121 01:51:47.088395    Entry Point 0x30000000
 2122 01:51:47.088510  Loaded segments
 2123 01:51:47.094919  BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
 2124 01:51:47.139802  Finalizing chipset.
 2125 01:51:47.143121  Finalizing SMM.
 2126 01:51:47.143236  APMC done.
 2127 01:51:47.149974  BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
 2128 01:51:47.153031  mp_park_aps done after 0 msecs.
 2129 01:51:47.156198  Jumping to boot code at 0x30000000(0x76b25000)
 2130 01:51:47.166265  CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
 2131 01:51:47.166405  
 2132 01:51:47.166478  
 2133 01:51:47.169658  
 2134 01:51:47.169762  
 2135 01:51:47.170117  end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
 2136 01:51:47.170238  start: 2.2.4 bootloader-commands (timeout 00:04:43) [common]
 2137 01:51:47.170357  Setting prompt string to ['volteer:']
 2138 01:51:47.170462  bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:43)
 2139 01:51:47.172667  Starting depthcharge on Voema...
 2140 01:51:47.172770  
 2141 01:51:47.179440  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2142 01:51:47.179629  
 2143 01:51:47.185885  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2144 01:51:47.185987  
 2145 01:51:47.192851  Looking for NVMe Controller 0x3005f220 @ 00:1d:00
 2146 01:51:47.192951  
 2147 01:51:47.195990  Failed to find eMMC card reader
 2148 01:51:47.196078  
 2149 01:51:47.199370  Wipe memory regions:
 2150 01:51:47.199484  
 2151 01:51:47.202387  	[0x00000000001000, 0x000000000a0000)
 2152 01:51:47.202474  
 2153 01:51:47.206293  	[0x00000000100000, 0x00000030000000)
 2154 01:51:47.206420  
 2155 01:51:47.245203  	[0x00000032662db0, 0x000000769ef000)
 2156 01:51:47.245356  
 2157 01:51:47.298134  	[0x00000100000000, 0x00000480400000)
 2158 01:51:47.298340  
 2159 01:51:47.930031  ec_init: CrosEC protocol v3 supported (256, 256)
 2160 01:51:47.930205  
 2161 01:51:48.361084  R8152: Initializing
 2162 01:51:48.361239  
 2163 01:51:48.364545  Version 6 (ocp_data = 5c30)
 2164 01:51:48.364631  
 2165 01:51:48.367781  R8152: Done initializing
 2166 01:51:48.367867  
 2167 01:51:48.370764  Adding net device
 2168 01:51:48.370852  
 2169 01:51:48.676927  [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
 2170 01:51:48.677118  
 2171 01:51:48.677187  
 2172 01:51:48.677265  
 2173 01:51:48.680167  Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2175 01:51:48.781054  volteer: tftpboot 192.168.201.1 7989938/tftp-deploy-asox6jve/kernel/bzImage 7989938/tftp-deploy-asox6jve/kernel/cmdline 7989938/tftp-deploy-asox6jve/ramdisk/ramdisk.cpio.gz
 2176 01:51:48.781747  Setting prompt string to 'Starting kernel'
 2177 01:51:48.782165  Setting prompt string to ['Starting kernel']
 2178 01:51:48.782538  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2179 01:51:48.782943  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
 2180 01:51:48.786521  tftpboot 192.168.201.1 7989938/tftp-deploy-asox6jve/kernel/bzImoy-asox6jve/kernel/cmdline 7989938/tftp-deploy-asox6jve/ramdisk/ramdisk.cpio.gz
 2181 01:51:48.787028  
 2182 01:51:48.787468  Waiting for link
 2183 01:51:48.787840  
 2184 01:51:48.990255  done.
 2185 01:51:48.990419  
 2186 01:51:48.990490  MAC: 00:24:32:30:7a:04
 2187 01:51:48.990565  
 2188 01:51:48.993646  Sending DHCP discover... done.
 2189 01:51:48.993734  
 2190 01:51:48.997050  Waiting for reply... done.
 2191 01:51:48.997138  
 2192 01:51:49.000673  Sending DHCP request... done.
 2193 01:51:49.000851  
 2194 01:51:49.003674  Waiting for reply... done.
 2195 01:51:49.003763  
 2196 01:51:49.007391  My ip is 192.168.201.22
 2197 01:51:49.007478  
 2198 01:51:49.009971  The DHCP server ip is 192.168.201.1
 2199 01:51:49.010058  
 2200 01:51:49.016742  TFTP server IP predefined by user: 192.168.201.1
 2201 01:51:49.016856  
 2202 01:51:49.023318  Bootfile predefined by user: 7989938/tftp-deploy-asox6jve/kernel/bzImage
 2203 01:51:49.023419  
 2204 01:51:49.026699  Sending tftp read request... done.
 2205 01:51:49.026814  
 2206 01:51:49.029653  Waiting for the transfer... 
 2207 01:51:49.029733  
 2208 01:51:49.601148  00000000 ################################################################
 2209 01:51:49.601321  
 2210 01:51:50.188394  00080000 ################################################################
 2211 01:51:50.188550  
 2212 01:51:50.780423  00100000 ################################################################
 2213 01:51:50.780581  
 2214 01:51:51.368295  00180000 ################################################################
 2215 01:51:51.368466  
 2216 01:51:51.957512  00200000 ################################################################
 2217 01:51:51.957660  
 2218 01:51:52.556591  00280000 ################################################################
 2219 01:51:52.556757  
 2220 01:51:53.148098  00300000 ################################################################
 2221 01:51:53.148250  
 2222 01:51:53.735018  00380000 ################################################################
 2223 01:51:53.735169  
 2224 01:51:54.327146  00400000 ################################################################
 2225 01:51:54.327305  
 2226 01:51:54.926668  00480000 ################################################################
 2227 01:51:54.926827  
 2228 01:51:55.519128  00500000 ################################################################
 2229 01:51:55.519288  
 2230 01:51:56.111540  00580000 ################################################################
 2231 01:51:56.111702  
 2232 01:51:56.696316  00600000 ################################################################
 2233 01:51:56.696467  
 2234 01:51:57.279183  00680000 ################################################################
 2235 01:51:57.279352  
 2236 01:51:57.881047  00700000 ################################################################
 2237 01:51:57.881206  
 2238 01:51:58.466872  00780000 ################################################################
 2239 01:51:58.467043  
 2240 01:51:59.063721  00800000 ################################################################
 2241 01:51:59.063879  
 2242 01:51:59.477041  00880000 ############################################## done.
 2243 01:51:59.477219  
 2244 01:51:59.480592  The bootfile was 9281536 bytes long.
 2245 01:51:59.480706  
 2246 01:51:59.483785  Sending tftp read request... done.
 2247 01:51:59.483867  
 2248 01:51:59.486847  Waiting for the transfer... 
 2249 01:51:59.486921  
 2250 01:52:00.079748  00000000 ################################################################
 2251 01:52:00.079950  
 2252 01:52:00.684355  00080000 ################################################################
 2253 01:52:00.684518  
 2254 01:52:01.291039  00100000 ################################################################
 2255 01:52:01.291199  
 2256 01:52:01.900873  00180000 ################################################################
 2257 01:52:01.901058  
 2258 01:52:02.506301  00200000 ################################################################
 2259 01:52:02.506464  
 2260 01:52:03.111522  00280000 ################################################################
 2261 01:52:03.111676  
 2262 01:52:03.721249  00300000 ################################################################
 2263 01:52:03.721410  
 2264 01:52:04.322584  00380000 ################################################################
 2265 01:52:04.322748  
 2266 01:52:04.927024  00400000 ################################################################
 2267 01:52:04.927187  
 2268 01:52:05.533783  00480000 ################################################################
 2269 01:52:05.533937  
 2270 01:52:06.136525  00500000 ################################################################
 2271 01:52:06.136683  
 2272 01:52:06.741918  00580000 ################################################################
 2273 01:52:06.742076  
 2274 01:52:07.340423  00600000 ################################################################
 2275 01:52:07.340581  
 2276 01:52:07.938404  00680000 ################################################################
 2277 01:52:07.938572  
 2278 01:52:08.532204  00700000 ################################################################
 2279 01:52:08.532357  
 2280 01:52:09.120149  00780000 ################################################################
 2281 01:52:09.120304  
 2282 01:52:09.330980  00800000 ####################### done.
 2283 01:52:09.331135  
 2284 01:52:09.334251  Sending tftp read request... done.
 2285 01:52:09.334349  
 2286 01:52:09.337742  Waiting for the transfer... 
 2287 01:52:09.337840  
 2288 01:52:09.337911  00000000 # done.
 2289 01:52:09.337980  
 2290 01:52:09.347737  Command line loaded dynamically from TFTP file: 7989938/tftp-deploy-asox6jve/kernel/cmdline
 2291 01:52:09.347853  
 2292 01:52:09.360734  The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
 2293 01:52:09.360845  
 2294 01:52:09.370157  Shutting down all USB controllers.
 2295 01:52:09.370289  
 2296 01:52:09.370383  Removing current net device
 2297 01:52:09.370469  
 2298 01:52:09.373156  Finalizing coreboot
 2299 01:52:09.373277  
 2300 01:52:09.379604  Exiting depthcharge with code 4 at timestamp: 30789620
 2301 01:52:09.379750  
 2302 01:52:09.379863  
 2303 01:52:09.379968  Starting kernel ...
 2304 01:52:09.380069  
 2305 01:52:09.380167  
 2306 01:52:09.380265  
 2307 01:52:09.380776  end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
 2308 01:52:09.380941  start: 2.2.5 auto-login-action (timeout 00:04:21) [common]
 2309 01:52:09.381077  Setting prompt string to ['Linux version [0-9]']
 2310 01:52:09.381198  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2311 01:52:09.381315  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2313 01:56:30.381213  end: 2.2.5 auto-login-action (duration 00:04:21) [common]
 2315 01:56:30.381432  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 261 seconds'
 2317 01:56:30.381638  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2320 01:56:30.381907  end: 2 depthcharge-action (duration 00:05:00) [common]
 2322 01:56:30.382170  Cleaning after the job
 2323 01:56:30.382258  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7989938/tftp-deploy-asox6jve/ramdisk
 2324 01:56:30.382939  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7989938/tftp-deploy-asox6jve/kernel
 2325 01:56:30.383604  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7989938/tftp-deploy-asox6jve/modules
 2326 01:56:30.383803  start: 5.1 power-off (timeout 00:00:30) [common]
 2327 01:56:30.383957  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-10' '--port=1' '--command=off'
 2328 01:56:30.403394  >> Command sent successfully.

 2329 01:56:30.405489  Returned 0 in 0 seconds
 2330 01:56:30.506294  end: 5.1 power-off (duration 00:00:00) [common]
 2332 01:56:30.506622  start: 5.2 read-feedback (timeout 00:10:00) [common]
 2333 01:56:30.506869  Listened to connection for namespace 'common' for up to 1s
 2334 01:56:31.509589  Finalising connection for namespace 'common'
 2335 01:56:31.509854  Disconnecting from shell: Finalise
 2336 01:56:31.610658  end: 5.2 read-feedback (duration 00:00:01) [common]
 2337 01:56:31.610879  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7989938
 2338 01:56:31.619577  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7989938
 2339 01:56:31.619849  JobError: Your job cannot terminate cleanly.