Boot log: asus-cx9400-volteer
- Kernel Warnings: 0
- Warnings: 0
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
1 01:51:27.660054 lava-dispatcher, installed at version: 2022.10
2 01:51:27.660241 start: 0 validate
3 01:51:27.660368 Start time: 2022-11-16 01:51:27.660361+00:00 (UTC)
4 01:51:27.660489 Using caching service: 'http://localhost/cache/?uri=%s'
5 01:51:27.660615 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221107.1%2Famd64%2Finitrd.cpio.gz exists
6 01:51:27.663179 Using caching service: 'http://localhost/cache/?uri=%s'
7 01:51:27.663298 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.265-cip85-rt27%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 01:51:28.667805 Using caching service: 'http://localhost/cache/?uri=%s'
9 01:51:28.668501 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20221107.1%2Famd64%2Ffull.rootfs.tar.xz exists
10 01:51:28.683844 Using caching service: 'http://localhost/cache/?uri=%s'
11 01:51:28.684481 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.265-cip85-rt27%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 01:51:28.696469 validate duration: 1.04
14 01:51:28.697839 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 01:51:28.698400 start: 1.1 download-retry (timeout 00:10:00) [common]
16 01:51:28.698899 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 01:51:28.699448 Not decompressing ramdisk as can be used compressed.
18 01:51:28.699902 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221107.1/amd64/initrd.cpio.gz
19 01:51:28.700262 saving as /var/lib/lava/dispatcher/tmp/7989952/tftp-deploy-qv11ytw9/ramdisk/initrd.cpio.gz
20 01:51:28.700606 total size: 5431606 (5MB)
21 01:51:28.706916 progress 0% (0MB)
22 01:51:28.714811 progress 5% (0MB)
23 01:51:28.719911 progress 10% (0MB)
24 01:51:28.723673 progress 15% (0MB)
25 01:51:28.728717 progress 20% (1MB)
26 01:51:28.733964 progress 25% (1MB)
27 01:51:28.737638 progress 30% (1MB)
28 01:51:28.743031 progress 35% (1MB)
29 01:51:28.748718 progress 40% (2MB)
30 01:51:28.758346 progress 45% (2MB)
31 01:51:28.766253 progress 50% (2MB)
32 01:51:28.774099 progress 55% (2MB)
33 01:51:28.780060 progress 60% (3MB)
34 01:51:28.790111 progress 65% (3MB)
35 01:51:28.799477 progress 70% (3MB)
36 01:51:28.806580 progress 75% (3MB)
37 01:51:28.814496 progress 80% (4MB)
38 01:51:28.821841 progress 85% (4MB)
39 01:51:28.829463 progress 90% (4MB)
40 01:51:28.838561 progress 95% (4MB)
41 01:51:28.844135 progress 100% (5MB)
42 01:51:28.844441 5MB downloaded in 0.14s (36.01MB/s)
43 01:51:28.844597 end: 1.1.1 http-download (duration 00:00:00) [common]
45 01:51:28.844857 end: 1.1 download-retry (duration 00:00:00) [common]
46 01:51:28.844946 start: 1.2 download-retry (timeout 00:10:00) [common]
47 01:51:28.845033 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 01:51:28.845137 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.265-cip85-rt27/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 01:51:28.845204 saving as /var/lib/lava/dispatcher/tmp/7989952/tftp-deploy-qv11ytw9/kernel/bzImage
50 01:51:28.845265 total size: 9281536 (8MB)
51 01:51:28.845345 No compression specified
52 01:51:28.848157 progress 0% (0MB)
53 01:51:28.860441 progress 5% (0MB)
54 01:51:28.874847 progress 10% (0MB)
55 01:51:28.885592 progress 15% (1MB)
56 01:51:28.900156 progress 20% (1MB)
57 01:51:28.908841 progress 25% (2MB)
58 01:51:28.918511 progress 30% (2MB)
59 01:51:28.927849 progress 35% (3MB)
60 01:51:28.937130 progress 40% (3MB)
61 01:51:28.945170 progress 45% (4MB)
62 01:51:28.953855 progress 50% (4MB)
63 01:51:28.961734 progress 55% (4MB)
64 01:51:28.972933 progress 60% (5MB)
65 01:51:28.982549 progress 65% (5MB)
66 01:51:28.995491 progress 70% (6MB)
67 01:51:29.008810 progress 75% (6MB)
68 01:51:29.021170 progress 80% (7MB)
69 01:51:29.033035 progress 85% (7MB)
70 01:51:29.046202 progress 90% (7MB)
71 01:51:29.059475 progress 95% (8MB)
72 01:51:29.076224 progress 100% (8MB)
73 01:51:29.076466 8MB downloaded in 0.23s (38.29MB/s)
74 01:51:29.076639 end: 1.2.1 http-download (duration 00:00:00) [common]
76 01:51:29.076940 end: 1.2 download-retry (duration 00:00:00) [common]
77 01:51:29.077032 start: 1.3 download-retry (timeout 00:10:00) [common]
78 01:51:29.077150 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 01:51:29.077268 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20221107.1/amd64/full.rootfs.tar.xz
80 01:51:29.077344 saving as /var/lib/lava/dispatcher/tmp/7989952/tftp-deploy-qv11ytw9/nfsrootfs/full.rootfs.tar
81 01:51:29.077439 total size: 133303528 (127MB)
82 01:51:29.077533 Using unxz to decompress xz
83 01:51:29.082065 progress 0% (0MB)
84 01:51:29.425149 progress 5% (6MB)
85 01:51:29.802349 progress 10% (12MB)
86 01:51:30.112349 progress 15% (19MB)
87 01:51:30.321259 progress 20% (25MB)
88 01:51:30.594128 progress 25% (31MB)
89 01:51:30.966693 progress 30% (38MB)
90 01:51:31.347810 progress 35% (44MB)
91 01:51:31.775203 progress 40% (50MB)
92 01:51:32.179939 progress 45% (57MB)
93 01:51:32.561234 progress 50% (63MB)
94 01:51:32.964188 progress 55% (69MB)
95 01:51:33.351711 progress 60% (76MB)
96 01:51:33.739059 progress 65% (82MB)
97 01:51:34.138064 progress 70% (89MB)
98 01:51:34.519368 progress 75% (95MB)
99 01:51:34.971976 progress 80% (101MB)
100 01:51:35.427630 progress 85% (108MB)
101 01:51:35.725227 progress 90% (114MB)
102 01:51:36.093858 progress 95% (120MB)
103 01:51:36.496973 progress 100% (127MB)
104 01:51:36.501913 127MB downloaded in 7.42s (17.12MB/s)
105 01:51:36.502224 end: 1.3.1 http-download (duration 00:00:07) [common]
107 01:51:36.502518 end: 1.3 download-retry (duration 00:00:07) [common]
108 01:51:36.502618 start: 1.4 download-retry (timeout 00:09:52) [common]
109 01:51:36.502715 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 01:51:36.502831 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.265-cip85-rt27/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 01:51:36.502916 saving as /var/lib/lava/dispatcher/tmp/7989952/tftp-deploy-qv11ytw9/modules/modules.tar
112 01:51:36.502982 total size: 64572 (0MB)
113 01:51:36.503062 Using unxz to decompress xz
114 01:51:37.508197 progress 50% (0MB)
115 01:51:37.508666 progress 100% (0MB)
116 01:51:37.512855 0MB downloaded in 1.01s (0.06MB/s)
117 01:51:37.513145 end: 1.4.1 http-download (duration 00:00:01) [common]
119 01:51:37.513487 end: 1.4 download-retry (duration 00:00:01) [common]
120 01:51:37.513600 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 01:51:37.513713 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 01:51:38.745699 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/7989952/extract-nfsrootfs-6n9pq8rw
123 01:51:38.745924 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 01:51:38.746032 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
125 01:51:38.746169 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic
126 01:51:38.746270 makedir: /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin
127 01:51:38.746356 makedir: /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/tests
128 01:51:38.746438 makedir: /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/results
129 01:51:38.746535 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-add-keys
130 01:51:38.746691 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-add-sources
131 01:51:38.746821 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-background-process-start
132 01:51:38.746931 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-background-process-stop
133 01:51:38.747039 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-common-functions
134 01:51:38.747148 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-echo-ipv4
135 01:51:38.747256 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-install-packages
136 01:51:38.747362 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-installed-packages
137 01:51:38.747471 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-os-build
138 01:51:38.747576 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-probe-channel
139 01:51:38.747680 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-probe-ip
140 01:51:38.747785 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-target-ip
141 01:51:38.747888 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-target-mac
142 01:51:38.747992 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-target-storage
143 01:51:38.748100 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-test-case
144 01:51:38.748207 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-test-event
145 01:51:38.748313 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-test-feedback
146 01:51:38.748419 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-test-raise
147 01:51:38.748524 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-test-reference
148 01:51:38.748630 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-test-runner
149 01:51:38.748736 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-test-set
150 01:51:38.748840 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-test-shell
151 01:51:38.748947 Updating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-install-packages (oe)
152 01:51:38.749056 Updating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/bin/lava-installed-packages (oe)
153 01:51:38.749149 Creating /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/environment
154 01:51:38.749233 LAVA metadata
155 01:51:38.749297 - LAVA_JOB_ID=7989952
156 01:51:38.749401 - LAVA_DISPATCHER_IP=192.168.201.1
157 01:51:38.749498 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
158 01:51:38.749562 skipped lava-vland-overlay
159 01:51:38.749653 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 01:51:38.749736 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
161 01:51:38.749797 skipped lava-multinode-overlay
162 01:51:38.749869 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 01:51:38.749947 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
164 01:51:38.750016 Loading test definitions
165 01:51:38.750106 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:50) [common]
166 01:51:38.750176 Using /lava-7989952 at stage 0
167 01:51:38.750429 uuid=7989952_1.5.2.3.1 testdef=None
168 01:51:38.750517 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 01:51:38.750601 start: 1.5.2.3.2 test-overlay (timeout 00:09:50) [common]
170 01:51:38.751068 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 01:51:38.751299 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:50) [common]
173 01:51:38.751919 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 01:51:38.752156 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:50) [common]
176 01:51:38.752682 runner path: /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/0/tests/0_dmesg test_uuid 7989952_1.5.2.3.1
177 01:51:38.752831 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 01:51:38.753061 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:50) [common]
180 01:51:38.753132 Using /lava-7989952 at stage 1
181 01:51:38.753415 uuid=7989952_1.5.2.3.5 testdef=None
182 01:51:38.753504 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 01:51:38.753589 start: 1.5.2.3.6 test-overlay (timeout 00:09:50) [common]
184 01:51:38.754016 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 01:51:38.754240 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:50) [common]
187 01:51:38.754800 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 01:51:38.755036 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:50) [common]
190 01:51:38.755569 runner path: /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/1/tests/1_bootrr test_uuid 7989952_1.5.2.3.5
191 01:51:38.755708 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 01:51:38.755917 Creating lava-test-runner.conf files
194 01:51:38.755980 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/0 for stage 0
195 01:51:38.756060 - 0_dmesg
196 01:51:38.756133 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/7989952/lava-overlay-gdidhxic/lava-7989952/1 for stage 1
197 01:51:38.756214 - 1_bootrr
198 01:51:38.756302 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 01:51:38.756386 start: 1.5.2.4 compress-overlay (timeout 00:09:50) [common]
200 01:51:38.761868 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 01:51:38.761971 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:50) [common]
202 01:51:38.762057 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 01:51:38.762143 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 01:51:38.762226 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:50) [common]
205 01:51:38.864334 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 01:51:38.864678 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
207 01:51:38.864793 extracting modules file /var/lib/lava/dispatcher/tmp/7989952/tftp-deploy-qv11ytw9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7989952/extract-nfsrootfs-6n9pq8rw
208 01:51:38.868849 extracting modules file /var/lib/lava/dispatcher/tmp/7989952/tftp-deploy-qv11ytw9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/7989952/extract-overlay-ramdisk-bj1mdybv/ramdisk
209 01:51:38.872849 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 01:51:38.873013 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
211 01:51:38.873113 [common] Applying overlay to NFS
212 01:51:38.873191 [common] Applying overlay /var/lib/lava/dispatcher/tmp/7989952/compress-overlay-fn6wnuyj/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/7989952/extract-nfsrootfs-6n9pq8rw
213 01:51:38.877576 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 01:51:38.877742 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
215 01:51:38.877848 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 01:51:38.877940 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
217 01:51:38.878022 Building ramdisk /var/lib/lava/dispatcher/tmp/7989952/extract-overlay-ramdisk-bj1mdybv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/7989952/extract-overlay-ramdisk-bj1mdybv/ramdisk
218 01:51:38.911637 >> 24775 blocks
219 01:51:39.381117 rename /var/lib/lava/dispatcher/tmp/7989952/extract-overlay-ramdisk-bj1mdybv/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/7989952/tftp-deploy-qv11ytw9/ramdisk/ramdisk.cpio.gz
220 01:51:39.381558 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
221 01:51:39.381679 start: 1.5.8 prepare-kernel (timeout 00:09:49) [common]
222 01:51:39.381800 start: 1.5.8.1 prepare-fit (timeout 00:09:49) [common]
223 01:51:39.381919 No mkimage arch provided, not using FIT.
224 01:51:39.382017 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 01:51:39.382099 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 01:51:39.382195 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 01:51:39.382286 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:49) [common]
228 01:51:39.382361 No LXC device requested
229 01:51:39.382439 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 01:51:39.382526 start: 1.7 deploy-device-env (timeout 00:09:49) [common]
231 01:51:39.382608 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 01:51:39.382674 Checking files for TFTP limit of 4294967296 bytes.
233 01:51:39.383046 end: 1 tftp-deploy (duration 00:00:11) [common]
234 01:51:39.383152 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 01:51:39.383243 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 01:51:39.383367 substitutions:
237 01:51:39.383433 - {DTB}: None
238 01:51:39.383497 - {INITRD}: 7989952/tftp-deploy-qv11ytw9/ramdisk/ramdisk.cpio.gz
239 01:51:39.383557 - {KERNEL}: 7989952/tftp-deploy-qv11ytw9/kernel/bzImage
240 01:51:39.383617 - {LAVA_MAC}: None
241 01:51:39.383674 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/7989952/extract-nfsrootfs-6n9pq8rw
242 01:51:39.383731 - {NFS_SERVER_IP}: 192.168.201.1
243 01:51:39.383787 - {PRESEED_CONFIG}: None
244 01:51:39.383845 - {PRESEED_LOCAL}: None
245 01:51:39.383910 - {RAMDISK}: 7989952/tftp-deploy-qv11ytw9/ramdisk/ramdisk.cpio.gz
246 01:51:39.383971 - {ROOT_PART}: None
247 01:51:39.384026 - {ROOT}: None
248 01:51:39.384080 - {SERVER_IP}: 192.168.201.1
249 01:51:39.384134 - {TEE}: None
250 01:51:39.384188 Parsed boot commands:
251 01:51:39.384258 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 01:51:39.384416 Parsed boot commands: tftpboot 192.168.201.1 7989952/tftp-deploy-qv11ytw9/kernel/bzImage 7989952/tftp-deploy-qv11ytw9/kernel/cmdline 7989952/tftp-deploy-qv11ytw9/ramdisk/ramdisk.cpio.gz
253 01:51:39.384534 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 01:51:39.384638 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 01:51:39.384742 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 01:51:39.384846 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 01:51:39.384928 Not connected, no need to disconnect.
258 01:51:39.385028 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 01:51:39.385122 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 01:51:39.385188 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-13'
261 01:51:39.388174 Setting prompt string to ['lava-test: # ']
262 01:51:39.388509 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 01:51:39.388630 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 01:51:39.388763 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 01:51:39.388874 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 01:51:39.389057 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=reboot'
267 01:51:39.408811 >> Command sent successfully.
268 01:51:39.410781 Returned 0 in 0 seconds
269 01:51:39.511801 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 01:51:39.513040 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 01:51:39.513544 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 01:51:39.513899 Setting prompt string to 'Starting depthcharge on Voema...'
274 01:51:39.514156 Changing prompt to 'Starting depthcharge on Voema...'
275 01:51:39.514428 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 01:51:39.515413 [Enter `^Ec?' for help]
277 01:51:46.916531
278 01:51:46.916701
279 01:51:46.926399 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 01:51:46.929514 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
281 01:51:46.936444 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
282 01:51:46.939602 CPU: AES supported, TXT NOT supported, VT supported
283 01:51:46.946918 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
284 01:51:46.950296 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
285 01:51:46.957015 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
286 01:51:46.960205 VBOOT: Loading verstage.
287 01:51:46.963447 FMAP: Found "FLASH" version 1.1 at 0x1804000.
288 01:51:46.970364 FMAP: base = 0x0 size = 0x2000000 #areas = 32
289 01:51:46.973665 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
290 01:51:46.983676 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
291 01:51:46.990213 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
292 01:51:46.990302
293 01:51:46.990370
294 01:51:47.000509 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
295 01:51:47.016954 Probing TPM: . done!
296 01:51:47.020484 TPM ready after 0 ms
297 01:51:47.024039 Connected to device vid:did:rid of 1ae0:0028:00
298 01:51:47.035056 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
299 01:51:47.041348 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
300 01:51:47.044940 Initialized TPM device CR50 revision 0
301 01:51:47.097447 tlcl_send_startup: Startup return code is 0
302 01:51:47.097617 TPM: setup succeeded
303 01:51:47.111924 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
304 01:51:47.126196 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
305 01:51:47.139197 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
306 01:51:47.148570 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
307 01:51:47.152482 Chrome EC: UHEPI supported
308 01:51:47.155514 Phase 1
309 01:51:47.158857 FMAP: area GBB found @ 1805000 (458752 bytes)
310 01:51:47.169087 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
311 01:51:47.175386 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
312 01:51:47.182023 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
313 01:51:47.188792 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
314 01:51:47.191893 Recovery requested (1009000e)
315 01:51:47.195703 TPM: Extending digest for VBOOT: boot mode into PCR 0
316 01:51:47.207004 tlcl_extend: response is 0
317 01:51:47.213262 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
318 01:51:47.223766 tlcl_extend: response is 0
319 01:51:47.229916 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
320 01:51:47.236507 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
321 01:51:47.243020 BS: verstage times (exec / console): total (unknown) / 142 ms
322 01:51:47.243100
323 01:51:47.243167
324 01:51:47.256443 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
325 01:51:47.263089 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
326 01:51:47.266780 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
327 01:51:47.269741 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
328 01:51:47.276498 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
329 01:51:47.279530 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
330 01:51:47.283305 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
331 01:51:47.286486 TCO_STS: 0000 0000
332 01:51:47.289508 GEN_PMCON: d0015038 00002200
333 01:51:47.292785 GBLRST_CAUSE: 00000000 00000000
334 01:51:47.295780 HPR_CAUSE0: 00000000
335 01:51:47.295867 prev_sleep_state 5
336 01:51:47.299639 Boot Count incremented to 10088
337 01:51:47.305860 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
338 01:51:47.312717 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
339 01:51:47.322555 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
340 01:51:47.329147 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
341 01:51:47.332529 Chrome EC: UHEPI supported
342 01:51:47.338963 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
343 01:51:47.350338 Probing TPM: done!
344 01:51:47.356935 Connected to device vid:did:rid of 1ae0:0028:00
345 01:51:47.366626 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
346 01:51:47.370539 Initialized TPM device CR50 revision 0
347 01:51:47.384996 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
348 01:51:47.391559 MRC: Hash idx 0x100b comparison successful.
349 01:51:47.394917 MRC cache found, size faa8
350 01:51:47.395006 bootmode is set to: 2
351 01:51:47.398508 SPD index = 2
352 01:51:47.405083 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
353 01:51:47.408079 SPD: module type is LPDDR4X
354 01:51:47.411557 SPD: module part number is MT53D1G64D4NW-046
355 01:51:47.417988 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
356 01:51:47.424457 SPD: device width 16 bits, bus width 16 bits
357 01:51:47.427379 SPD: module size is 2048 MB (per channel)
358 01:51:47.857147 CBMEM:
359 01:51:47.860047 IMD: root @ 0x76fff000 254 entries.
360 01:51:47.863389 IMD: root @ 0x76ffec00 62 entries.
361 01:51:47.866879 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
362 01:51:47.873606 FMAP: area RW_VPD found @ f35000 (8192 bytes)
363 01:51:47.876583 External stage cache:
364 01:51:47.880155 IMD: root @ 0x7b3ff000 254 entries.
365 01:51:47.883560 IMD: root @ 0x7b3fec00 62 entries.
366 01:51:47.898217 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
367 01:51:47.904474 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
368 01:51:47.911489 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
369 01:51:47.924898 MRC: 'RECOVERY_MRC_CACHE' does not need update.
370 01:51:47.931629 cse_lite: Skip switching to RW in the recovery path
371 01:51:47.931718 8 DIMMs found
372 01:51:47.931790 SMM Memory Map
373 01:51:47.934751
374 01:51:47.938194 SMRAM : 0x7b000000 0x800000
375 01:51:47.941487 Subregion 0: 0x7b000000 0x200000
376 01:51:47.945159 Subregion 1: 0x7b200000 0x200000
377 01:51:47.947917 Subregion 2: 0x7b400000 0x400000
378 01:51:47.948002 top_of_ram = 0x77000000
379 01:51:47.955193 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
380 01:51:47.961443 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
381 01:51:47.964653 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
382 01:51:47.971337 MTRR Range: Start=ff000000 End=0 (Size 1000000)
383 01:51:47.978144 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
384 01:51:47.984301 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
385 01:51:47.994803 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
386 01:51:47.998250 Processing 211 relocs. Offset value of 0x74c0b000
387 01:51:48.001662
388 01:51:48.007634 BS: romstage times (exec / console): total (unknown) / 277 ms
389 01:51:48.013302
390 01:51:48.013429
391 01:51:48.024643 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
392 01:51:48.027963 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 01:51:48.034918 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 01:51:48.044955 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 01:51:48.051156 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
396 01:51:48.057599 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
397 01:51:48.100492 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
398 01:51:48.106950 Processing 5008 relocs. Offset value of 0x75d98000
399 01:51:48.110205 BS: postcar times (exec / console): total (unknown) / 59 ms
400 01:51:48.113386
401 01:51:48.113477
402 01:51:48.123552 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
403 01:51:48.123640 Normal boot
404 01:51:48.126620 FW_CONFIG value is 0x804c02
405 01:51:48.130339 PCI: 00:07.0 disabled by fw_config
406 01:51:48.133531 PCI: 00:07.1 disabled by fw_config
407 01:51:48.137048 PCI: 00:0d.2 disabled by fw_config
408 01:51:48.143215 PCI: 00:1c.7 disabled by fw_config
409 01:51:48.146761 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
410 01:51:48.153515 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
411 01:51:48.156519 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
412 01:51:48.163295 GENERIC: 0.0 disabled by fw_config
413 01:51:48.166816 GENERIC: 1.0 disabled by fw_config
414 01:51:48.169997 fw_config match found: DB_USB=USB3_ACTIVE
415 01:51:48.173184 fw_config match found: DB_USB=USB3_ACTIVE
416 01:51:48.176440 fw_config match found: DB_USB=USB3_ACTIVE
417 01:51:48.183390 fw_config match found: DB_USB=USB3_ACTIVE
418 01:51:48.186612 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
419 01:51:48.193025 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
420 01:51:48.203182 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
421 01:51:48.209674 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
422 01:51:48.212968 microcode: sig=0x806c1 pf=0x80 revision=0x86
423 01:51:48.219757 microcode: Update skipped, already up-to-date
424 01:51:48.226068 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
425 01:51:48.253751 Detected 4 core, 8 thread CPU.
426 01:51:48.257186 Setting up SMI for CPU
427 01:51:48.260931 IED base = 0x7b400000
428 01:51:48.261015 IED size = 0x00400000
429 01:51:48.264036 Will perform SMM setup.
430 01:51:48.270528 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
431 01:51:48.276873 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
432 01:51:48.283972 Processing 16 relocs. Offset value of 0x00030000
433 01:51:48.286981 Attempting to start 7 APs
434 01:51:48.290255 Waiting for 10ms after sending INIT.
435 01:51:48.305866 Waiting for 1st SIPI to complete...done.
436 01:51:48.305952 AP: slot 6 apic_id 1.
437 01:51:48.308854 AP: slot 2 apic_id 5.
438 01:51:48.312597 AP: slot 4 apic_id 7.
439 01:51:48.312681 AP: slot 5 apic_id 2.
440 01:51:48.315485 AP: slot 1 apic_id 3.
441 01:51:48.318727 Waiting for 2nd SIPI to complete...done.
442 01:51:48.322235 AP: slot 7 apic_id 4.
443 01:51:48.325809 AP: slot 3 apic_id 6.
444 01:51:48.332096 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
445 01:51:48.338654 Processing 13 relocs. Offset value of 0x00038000
446 01:51:48.342078 Unable to locate Global NVS
447 01:51:48.348637 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
448 01:51:48.351938 Installing permanent SMM handler to 0x7b000000
449 01:51:48.362169 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
450 01:51:48.365151 Processing 794 relocs. Offset value of 0x7b010000
451 01:51:48.374873 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
452 01:51:48.378328 Processing 13 relocs. Offset value of 0x7b008000
453 01:51:48.384607 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
454 01:51:48.391354 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
455 01:51:48.397979 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
456 01:51:48.401242 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
457 01:51:48.407974 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
458 01:51:48.414303 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
459 01:51:48.421200 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
460 01:51:48.424780 Unable to locate Global NVS
461 01:51:48.431413 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
462 01:51:48.434702 Clearing SMI status registers
463 01:51:48.437379 SMI_STS: PM1
464 01:51:48.437468 PM1_STS: PWRBTN
465 01:51:48.444496 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
466 01:51:48.447820 In relocation handler: CPU 0
467 01:51:48.450752 New SMBASE=0x7b000000 IEDBASE=0x7b400000
468 01:51:48.454335
469 01:51:48.457588 Writing SMRR. base = 0x7b000006, mask=0xff800c00
470 01:51:48.460473 Relocation complete.
471 01:51:48.467352 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
472 01:51:48.470754 In relocation handler: CPU 6
473 01:51:48.473921 New SMBASE=0x7affe800 IEDBASE=0x7b400000
474 01:51:48.477101 Relocation complete.
475 01:51:48.484286 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
476 01:51:48.487335 In relocation handler: CPU 3
477 01:51:48.490643 New SMBASE=0x7afff400 IEDBASE=0x7b400000
478 01:51:48.493964 Writing SMRR. base = 0x7b000006, mask=0xff800c00
479 01:51:48.497004 Relocation complete.
480 01:51:48.503476 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
481 01:51:48.507065 In relocation handler: CPU 4
482 01:51:48.510427 New SMBASE=0x7afff000 IEDBASE=0x7b400000
483 01:51:48.513713 Relocation complete.
484 01:51:48.520110 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
485 01:51:48.523596 In relocation handler: CPU 5
486 01:51:48.526870 New SMBASE=0x7affec00 IEDBASE=0x7b400000
487 01:51:48.533525 Writing SMRR. base = 0x7b000006, mask=0xff800c00
488 01:51:48.533611 Relocation complete.
489 01:51:48.536703
490 01:51:48.543482 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
491 01:51:48.546847 In relocation handler: CPU 1
492 01:51:48.549920 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
493 01:51:48.550007 Relocation complete.
494 01:51:48.559880 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
495 01:51:48.559968 In relocation handler: CPU 2
496 01:51:48.563372
497 01:51:48.566702 New SMBASE=0x7afff800 IEDBASE=0x7b400000
498 01:51:48.566789 Relocation complete.
499 01:51:48.576923 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
500 01:51:48.577010 In relocation handler: CPU 7
501 01:51:48.580253
502 01:51:48.583477 New SMBASE=0x7affe400 IEDBASE=0x7b400000
503 01:51:48.586853 Writing SMRR. base = 0x7b000006, mask=0xff800c00
504 01:51:48.589763 Relocation complete.
505 01:51:48.589847 Initializing CPU #0
506 01:51:48.593254
507 01:51:48.596509 CPU: vendor Intel device 806c1
508 01:51:48.599836 CPU: family 06, model 8c, stepping 01
509 01:51:48.599920 Clearing out pending MCEs
510 01:51:48.602922 Setting up local APIC...
511 01:51:48.606419 apic_id: 0x00 done.
512 01:51:48.609615 Turbo is available but hidden
513 01:51:48.613033 Turbo is available and visible
514 01:51:48.616469 microcode: Update skipped, already up-to-date
515 01:51:48.619445 CPU #0 initialized
516 01:51:48.619529 Initializing CPU #6
517 01:51:48.623188
518 01:51:48.623273 Initializing CPU #2
519 01:51:48.626282 Initializing CPU #7
520 01:51:48.629750 CPU: vendor Intel device 806c1
521 01:51:48.632728 CPU: family 06, model 8c, stepping 01
522 01:51:48.636005 CPU: vendor Intel device 806c1
523 01:51:48.639756 CPU: family 06, model 8c, stepping 01
524 01:51:48.642716 Clearing out pending MCEs
525 01:51:48.642800 Clearing out pending MCEs
526 01:51:48.646070
527 01:51:48.646155 Setting up local APIC...
528 01:51:48.649537 CPU: vendor Intel device 806c1
529 01:51:48.652432 CPU: family 06, model 8c, stepping 01
530 01:51:48.655892 Setting up local APIC...
531 01:51:48.659406 Clearing out pending MCEs
532 01:51:48.662421 Initializing CPU #1
533 01:51:48.662508 Initializing CPU #5
534 01:51:48.665969 CPU: vendor Intel device 806c1
535 01:51:48.669641 CPU: family 06, model 8c, stepping 01
536 01:51:48.672648 CPU: vendor Intel device 806c1
537 01:51:48.675703 CPU: family 06, model 8c, stepping 01
538 01:51:48.679635 Clearing out pending MCEs
539 01:51:48.682882 Clearing out pending MCEs
540 01:51:48.686232 Setting up local APIC...
541 01:51:48.686317 apic_id: 0x04 done.
542 01:51:48.689341 Initializing CPU #3
543 01:51:48.693540 Setting up local APIC...
544 01:51:48.693625 CPU: vendor Intel device 806c1
545 01:51:48.699926 CPU: family 06, model 8c, stepping 01
546 01:51:48.700028 Initializing CPU #4
547 01:51:48.703220 Clearing out pending MCEs
548 01:51:48.706716 microcode: Update skipped, already up-to-date
549 01:51:48.709725 CPU: vendor Intel device 806c1
550 01:51:48.713014 CPU: family 06, model 8c, stepping 01
551 01:51:48.716485
552 01:51:48.716607 Setting up local APIC...
553 01:51:48.719872 apic_id: 0x03 done.
554 01:51:48.723342 apic_id: 0x02 done.
555 01:51:48.726513 microcode: Update skipped, already up-to-date
556 01:51:48.729977 microcode: Update skipped, already up-to-date
557 01:51:48.732755 CPU #7 initialized
558 01:51:48.736204 apic_id: 0x05 done.
559 01:51:48.736289 Setting up local APIC...
560 01:51:48.743084 microcode: Update skipped, already up-to-date
561 01:51:48.743169 CPU #5 initialized
562 01:51:48.746025 CPU #1 initialized
563 01:51:48.749602 apic_id: 0x06 done.
564 01:51:48.749687 Clearing out pending MCEs
565 01:51:48.756350 microcode: Update skipped, already up-to-date
566 01:51:48.756439 Setting up local APIC...
567 01:51:48.759491 CPU #3 initialized
568 01:51:48.763223 apic_id: 0x07 done.
569 01:51:48.763307 apic_id: 0x01 done.
570 01:51:48.766256 CPU #2 initialized
571 01:51:48.769681 microcode: Update skipped, already up-to-date
572 01:51:48.776244 microcode: Update skipped, already up-to-date
573 01:51:48.776329 CPU #4 initialized
574 01:51:48.779576 CPU #6 initialized
575 01:51:48.782599 bsp_do_flight_plan done after 458 msecs.
576 01:51:48.786287 CPU: frequency set to 4400 MHz
577 01:51:48.789594 Enabling SMIs.
578 01:51:48.792497 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
579 01:51:48.795891
580 01:51:48.810571 SATAXPCIE1 indicates PCIe NVMe is present
581 01:51:48.813564 Probing TPM: done!
582 01:51:48.817041 Connected to device vid:did:rid of 1ae0:0028:00
583 01:51:48.827715 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
584 01:51:48.830886 Initialized TPM device CR50 revision 0
585 01:51:48.834442 Enabling S0i3.4
586 01:51:48.841766 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
587 01:51:48.843893 Found a VBT of 8704 bytes after decompression
588 01:51:48.850731 cse_lite: CSE RO boot. HybridStorageMode disabled
589 01:51:48.857306 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
590 01:51:48.932711 FSPS returned 0
591 01:51:48.936357 Executing Phase 1 of FspMultiPhaseSiInit
592 01:51:48.945936 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
593 01:51:48.949513 port C0 DISC req: usage 1 usb3 1 usb2 5
594 01:51:48.952436 Raw Buffer output 0 00000511
595 01:51:48.955963 Raw Buffer output 1 00000000
596 01:51:48.959533 pmc_send_ipc_cmd succeeded
597 01:51:48.963095 port C1 DISC req: usage 1 usb3 2 usb2 3
598 01:51:48.966554
599 01:51:48.966638 Raw Buffer output 0 00000321
600 01:51:48.969506 Raw Buffer output 1 00000000
601 01:51:48.973908 pmc_send_ipc_cmd succeeded
602 01:51:48.979327 Detected 4 core, 8 thread CPU.
603 01:51:48.981919 Detected 4 core, 8 thread CPU.
604 01:51:49.183232 Display FSP Version Info HOB
605 01:51:49.186375 Reference Code - CPU = a.0.4c.31
606 01:51:49.189304 uCode Version = 0.0.0.86
607 01:51:49.192588 TXT ACM version = ff.ff.ff.ffff
608 01:51:49.196062 Reference Code - ME = a.0.4c.31
609 01:51:49.199705 MEBx version = 0.0.0.0
610 01:51:49.203104 ME Firmware Version = Consumer SKU
611 01:51:49.206075 Reference Code - PCH = a.0.4c.31
612 01:51:49.209615 PCH-CRID Status = Disabled
613 01:51:49.212815 PCH-CRID Original Value = ff.ff.ff.ffff
614 01:51:49.215947 PCH-CRID New Value = ff.ff.ff.ffff
615 01:51:49.219699 OPROM - RST - RAID = ff.ff.ff.ffff
616 01:51:49.223326 PCH Hsio Version = 4.0.0.0
617 01:51:49.225804 Reference Code - SA - System Agent = a.0.4c.31
618 01:51:49.229293 Reference Code - MRC = 2.0.0.1
619 01:51:49.232659 SA - PCIe Version = a.0.4c.31
620 01:51:49.235778 SA-CRID Status = Disabled
621 01:51:49.239079 SA-CRID Original Value = 0.0.0.1
622 01:51:49.242582 SA-CRID New Value = 0.0.0.1
623 01:51:49.246066 OPROM - VBIOS = ff.ff.ff.ffff
624 01:51:49.249131 IO Manageability Engine FW Version = 11.1.4.0
625 01:51:49.252404 PHY Build Version = 0.0.0.e0
626 01:51:49.255826 Thunderbolt(TM) FW Version = 0.0.0.0
627 01:51:49.262235 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
628 01:51:49.265781 ITSS IRQ Polarities Before:
629 01:51:49.265867 IPC0: 0xffffffff
630 01:51:49.269623 IPC1: 0xffffffff
631 01:51:49.269708 IPC2: 0xffffffff
632 01:51:49.273451 IPC3: 0xffffffff
633 01:51:49.273536 ITSS IRQ Polarities After:
634 01:51:49.276668 IPC0: 0xffffffff
635 01:51:49.276753 IPC1: 0xffffffff
636 01:51:49.279826 IPC2: 0xffffffff
637 01:51:49.279911 IPC3: 0xffffffff
638 01:51:49.283358
639 01:51:49.286341 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 01:51:49.296670 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 01:51:49.309694 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 01:51:49.322822 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 01:51:49.330113 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
644 01:51:49.330201 Enumerating buses...
645 01:51:49.336130 Show all devs... Before device enumeration.
646 01:51:49.336216 Root Device: enabled 1
647 01:51:49.339409 DOMAIN: 0000: enabled 1
648 01:51:49.342615 CPU_CLUSTER: 0: enabled 1
649 01:51:49.346253 PCI: 00:00.0: enabled 1
650 01:51:49.346338 PCI: 00:02.0: enabled 1
651 01:51:49.349520 PCI: 00:04.0: enabled 1
652 01:51:49.352776 PCI: 00:05.0: enabled 1
653 01:51:49.356175 PCI: 00:06.0: enabled 0
654 01:51:49.356262 PCI: 00:07.0: enabled 0
655 01:51:49.359178 PCI: 00:07.1: enabled 0
656 01:51:49.362584 PCI: 00:07.2: enabled 0
657 01:51:49.362671 PCI: 00:07.3: enabled 0
658 01:51:49.366042 PCI: 00:08.0: enabled 1
659 01:51:49.369276 PCI: 00:09.0: enabled 0
660 01:51:49.373020 PCI: 00:0a.0: enabled 0
661 01:51:49.373105 PCI: 00:0d.0: enabled 1
662 01:51:49.376014 PCI: 00:0d.1: enabled 0
663 01:51:49.379465 PCI: 00:0d.2: enabled 0
664 01:51:49.382521 PCI: 00:0d.3: enabled 0
665 01:51:49.382606 PCI: 00:0e.0: enabled 0
666 01:51:49.386177 PCI: 00:10.2: enabled 1
667 01:51:49.389021 PCI: 00:10.6: enabled 0
668 01:51:49.392339 PCI: 00:10.7: enabled 0
669 01:51:49.392424 PCI: 00:12.0: enabled 0
670 01:51:49.395697 PCI: 00:12.6: enabled 0
671 01:51:49.399000 PCI: 00:13.0: enabled 0
672 01:51:49.402318 PCI: 00:14.0: enabled 1
673 01:51:49.402404 PCI: 00:14.1: enabled 0
674 01:51:49.405744 PCI: 00:14.2: enabled 1
675 01:51:49.409112 PCI: 00:14.3: enabled 1
676 01:51:49.409198 PCI: 00:15.0: enabled 1
677 01:51:49.412648 PCI: 00:15.1: enabled 1
678 01:51:49.415922 PCI: 00:15.2: enabled 1
679 01:51:49.419108 PCI: 00:15.3: enabled 1
680 01:51:49.419194 PCI: 00:16.0: enabled 1
681 01:51:49.422205 PCI: 00:16.1: enabled 0
682 01:51:49.425687 PCI: 00:16.2: enabled 0
683 01:51:49.428655 PCI: 00:16.3: enabled 0
684 01:51:49.428740 PCI: 00:16.4: enabled 0
685 01:51:49.432204 PCI: 00:16.5: enabled 0
686 01:51:49.435351 PCI: 00:17.0: enabled 1
687 01:51:49.438951 PCI: 00:19.0: enabled 0
688 01:51:49.439037 PCI: 00:19.1: enabled 1
689 01:51:49.442294 PCI: 00:19.2: enabled 0
690 01:51:49.445259 PCI: 00:1c.0: enabled 1
691 01:51:49.448924 PCI: 00:1c.1: enabled 0
692 01:51:49.449008 PCI: 00:1c.2: enabled 0
693 01:51:49.452390 PCI: 00:1c.3: enabled 0
694 01:51:49.454973 PCI: 00:1c.4: enabled 0
695 01:51:49.458677 PCI: 00:1c.5: enabled 0
696 01:51:49.458771 PCI: 00:1c.6: enabled 1
697 01:51:49.462160 PCI: 00:1c.7: enabled 0
698 01:51:49.465037 PCI: 00:1d.0: enabled 1
699 01:51:49.465122 PCI: 00:1d.1: enabled 0
700 01:51:49.468654 PCI: 00:1d.2: enabled 1
701 01:51:49.471828 PCI: 00:1d.3: enabled 0
702 01:51:49.475405 PCI: 00:1e.0: enabled 1
703 01:51:49.475489 PCI: 00:1e.1: enabled 0
704 01:51:49.478286 PCI: 00:1e.2: enabled 1
705 01:51:49.481854 PCI: 00:1e.3: enabled 1
706 01:51:49.485142 PCI: 00:1f.0: enabled 1
707 01:51:49.485227 PCI: 00:1f.1: enabled 0
708 01:51:49.488713 PCI: 00:1f.2: enabled 1
709 01:51:49.491543 PCI: 00:1f.3: enabled 1
710 01:51:49.495310 PCI: 00:1f.4: enabled 0
711 01:51:49.495395 PCI: 00:1f.5: enabled 1
712 01:51:49.498459 PCI: 00:1f.6: enabled 0
713 01:51:49.501687 PCI: 00:1f.7: enabled 0
714 01:51:49.501773 APIC: 00: enabled 1
715 01:51:49.505128 GENERIC: 0.0: enabled 1
716 01:51:49.508056 GENERIC: 0.0: enabled 1
717 01:51:49.511373 GENERIC: 1.0: enabled 1
718 01:51:49.511459 GENERIC: 0.0: enabled 1
719 01:51:49.514788 GENERIC: 1.0: enabled 1
720 01:51:49.517940 USB0 port 0: enabled 1
721 01:51:49.521871 GENERIC: 0.0: enabled 1
722 01:51:49.521959 USB0 port 0: enabled 1
723 01:51:49.524743 GENERIC: 0.0: enabled 1
724 01:51:49.528142 I2C: 00:1a: enabled 1
725 01:51:49.528226 I2C: 00:31: enabled 1
726 01:51:49.531296 I2C: 00:32: enabled 1
727 01:51:49.534804 I2C: 00:10: enabled 1
728 01:51:49.534904 I2C: 00:15: enabled 1
729 01:51:49.538306 GENERIC: 0.0: enabled 0
730 01:51:49.541499 GENERIC: 1.0: enabled 0
731 01:51:49.544809 GENERIC: 0.0: enabled 1
732 01:51:49.544892 SPI: 00: enabled 1
733 01:51:49.548055 SPI: 00: enabled 1
734 01:51:49.548124 PNP: 0c09.0: enabled 1
735 01:51:49.551284 GENERIC: 0.0: enabled 1
736 01:51:49.554827 USB3 port 0: enabled 1
737 01:51:49.557850 USB3 port 1: enabled 1
738 01:51:49.557933 USB3 port 2: enabled 0
739 01:51:49.561499 USB3 port 3: enabled 0
740 01:51:49.564287 USB2 port 0: enabled 0
741 01:51:49.564370 USB2 port 1: enabled 1
742 01:51:49.567945 USB2 port 2: enabled 1
743 01:51:49.571518 USB2 port 3: enabled 0
744 01:51:49.574543 USB2 port 4: enabled 1
745 01:51:49.574626 USB2 port 5: enabled 0
746 01:51:49.578130 USB2 port 6: enabled 0
747 01:51:49.581003 USB2 port 7: enabled 0
748 01:51:49.581086 USB2 port 8: enabled 0
749 01:51:49.584326 USB2 port 9: enabled 0
750 01:51:49.587943 USB3 port 0: enabled 0
751 01:51:49.590708 USB3 port 1: enabled 1
752 01:51:49.590791 USB3 port 2: enabled 0
753 01:51:49.594104 USB3 port 3: enabled 0
754 01:51:49.597293 GENERIC: 0.0: enabled 1
755 01:51:49.597398 GENERIC: 1.0: enabled 1
756 01:51:49.600903 APIC: 03: enabled 1
757 01:51:49.604459 APIC: 05: enabled 1
758 01:51:49.604542 APIC: 06: enabled 1
759 01:51:49.607642 APIC: 07: enabled 1
760 01:51:49.610538 APIC: 02: enabled 1
761 01:51:49.610621 APIC: 01: enabled 1
762 01:51:49.613941 APIC: 04: enabled 1
763 01:51:49.614024 Compare with tree...
764 01:51:49.617519 Root Device: enabled 1
765 01:51:49.620665 DOMAIN: 0000: enabled 1
766 01:51:49.623922 PCI: 00:00.0: enabled 1
767 01:51:49.627107 PCI: 00:02.0: enabled 1
768 01:51:49.627190 PCI: 00:04.0: enabled 1
769 01:51:49.630729 GENERIC: 0.0: enabled 1
770 01:51:49.633868 PCI: 00:05.0: enabled 1
771 01:51:49.637426 PCI: 00:06.0: enabled 0
772 01:51:49.640424 PCI: 00:07.0: enabled 0
773 01:51:49.640510 GENERIC: 0.0: enabled 1
774 01:51:49.643893 PCI: 00:07.1: enabled 0
775 01:51:49.647112 GENERIC: 1.0: enabled 1
776 01:51:49.650558 PCI: 00:07.2: enabled 0
777 01:51:49.653934 GENERIC: 0.0: enabled 1
778 01:51:49.654018 PCI: 00:07.3: enabled 0
779 01:51:49.656908 GENERIC: 1.0: enabled 1
780 01:51:49.660353 PCI: 00:08.0: enabled 1
781 01:51:49.663345 PCI: 00:09.0: enabled 0
782 01:51:49.666952 PCI: 00:0a.0: enabled 0
783 01:51:49.667041 PCI: 00:0d.0: enabled 1
784 01:51:49.670030 USB0 port 0: enabled 1
785 01:51:49.673497 USB3 port 0: enabled 1
786 01:51:49.676928 USB3 port 1: enabled 1
787 01:51:49.679999 USB3 port 2: enabled 0
788 01:51:49.683502 USB3 port 3: enabled 0
789 01:51:49.683585 PCI: 00:0d.1: enabled 0
790 01:51:49.686806 PCI: 00:0d.2: enabled 0
791 01:51:49.690062 GENERIC: 0.0: enabled 1
792 01:51:49.693679 PCI: 00:0d.3: enabled 0
793 01:51:49.696695 PCI: 00:0e.0: enabled 0
794 01:51:49.696779 PCI: 00:10.2: enabled 1
795 01:51:49.699790 PCI: 00:10.6: enabled 0
796 01:51:49.703493 PCI: 00:10.7: enabled 0
797 01:51:49.706851 PCI: 00:12.0: enabled 0
798 01:51:49.710079 PCI: 00:12.6: enabled 0
799 01:51:49.710162 PCI: 00:13.0: enabled 0
800 01:51:49.712967 PCI: 00:14.0: enabled 1
801 01:51:49.716745 USB0 port 0: enabled 1
802 01:51:49.719916 USB2 port 0: enabled 0
803 01:51:49.722797 USB2 port 1: enabled 1
804 01:51:49.722883 USB2 port 2: enabled 1
805 01:51:49.726514 USB2 port 3: enabled 0
806 01:51:49.729660 USB2 port 4: enabled 1
807 01:51:49.732750 USB2 port 5: enabled 0
808 01:51:49.736550 USB2 port 6: enabled 0
809 01:51:49.739731 USB2 port 7: enabled 0
810 01:51:49.739819 USB2 port 8: enabled 0
811 01:51:49.742747 USB2 port 9: enabled 0
812 01:51:49.746295 USB3 port 0: enabled 0
813 01:51:49.749591 USB3 port 1: enabled 1
814 01:51:49.752886 USB3 port 2: enabled 0
815 01:51:49.752973 USB3 port 3: enabled 0
816 01:51:49.756016
817 01:51:49.756106 PCI: 00:14.1: enabled 0
818 01:51:49.759192 PCI: 00:14.2: enabled 1
819 01:51:49.762594 PCI: 00:14.3: enabled 1
820 01:51:49.766330 GENERIC: 0.0: enabled 1
821 01:51:49.769693 PCI: 00:15.0: enabled 1
822 01:51:49.769780 I2C: 00:1a: enabled 1
823 01:51:49.772698 I2C: 00:31: enabled 1
824 01:51:49.776129 I2C: 00:32: enabled 1
825 01:51:49.779621 PCI: 00:15.1: enabled 1
826 01:51:49.779708 I2C: 00:10: enabled 1
827 01:51:49.782417 PCI: 00:15.2: enabled 1
828 01:51:49.785917 PCI: 00:15.3: enabled 1
829 01:51:49.789268 PCI: 00:16.0: enabled 1
830 01:51:49.792806 PCI: 00:16.1: enabled 0
831 01:51:49.792893 PCI: 00:16.2: enabled 0
832 01:51:49.795766 PCI: 00:16.3: enabled 0
833 01:51:49.799311 PCI: 00:16.4: enabled 0
834 01:51:49.802327 PCI: 00:16.5: enabled 0
835 01:51:49.806032 PCI: 00:17.0: enabled 1
836 01:51:49.806118 PCI: 00:19.0: enabled 0
837 01:51:49.809264 PCI: 00:19.1: enabled 1
838 01:51:49.812423 I2C: 00:15: enabled 1
839 01:51:49.816046 PCI: 00:19.2: enabled 0
840 01:51:49.816131 PCI: 00:1d.0: enabled 1
841 01:51:49.819285
842 01:51:49.819369 GENERIC: 0.0: enabled 1
843 01:51:49.822235 PCI: 00:1e.0: enabled 1
844 01:51:49.825802 PCI: 00:1e.1: enabled 0
845 01:51:49.828848 PCI: 00:1e.2: enabled 1
846 01:51:49.828933 SPI: 00: enabled 1
847 01:51:49.832133 PCI: 00:1e.3: enabled 1
848 01:51:49.835443 SPI: 00: enabled 1
849 01:51:49.838521 PCI: 00:1f.0: enabled 1
850 01:51:49.838608 PNP: 0c09.0: enabled 1
851 01:51:49.842151
852 01:51:49.842237 PCI: 00:1f.1: enabled 0
853 01:51:49.845415 PCI: 00:1f.2: enabled 1
854 01:51:49.849110 GENERIC: 0.0: enabled 1
855 01:51:49.852098 GENERIC: 0.0: enabled 1
856 01:51:49.855499 GENERIC: 1.0: enabled 1
857 01:51:49.855584 PCI: 00:1f.3: enabled 1
858 01:51:49.858358 PCI: 00:1f.4: enabled 0
859 01:51:49.862030 PCI: 00:1f.5: enabled 1
860 01:51:49.865480 PCI: 00:1f.6: enabled 0
861 01:51:49.868401 PCI: 00:1f.7: enabled 0
862 01:51:49.868485 CPU_CLUSTER: 0: enabled 1
863 01:51:49.920231 APIC: 00: enabled 1
864 01:51:49.920324 APIC: 03: enabled 1
865 01:51:49.920391 APIC: 05: enabled 1
866 01:51:49.920464 APIC: 06: enabled 1
867 01:51:49.920526 APIC: 07: enabled 1
868 01:51:49.920775 APIC: 02: enabled 1
869 01:51:49.920841 APIC: 01: enabled 1
870 01:51:49.920900 APIC: 04: enabled 1
871 01:51:49.920957 Root Device scanning...
872 01:51:49.921013 scan_static_bus for Root Device
873 01:51:49.921253 DOMAIN: 0000 enabled
874 01:51:49.921315 CPU_CLUSTER: 0 enabled
875 01:51:49.921380 DOMAIN: 0000 scanning...
876 01:51:49.921438 PCI: pci_scan_bus for bus 00
877 01:51:49.921494 PCI: 00:00.0 [8086/0000] ops
878 01:51:49.921734 PCI: 00:00.0 [8086/9a12] enabled
879 01:51:49.921795 PCI: 00:02.0 [8086/0000] bus ops
880 01:51:49.921851 PCI: 00:02.0 [8086/9a40] enabled
881 01:51:49.921905 PCI: 00:04.0 [8086/0000] bus ops
882 01:51:49.970763 PCI: 00:04.0 [8086/9a03] enabled
883 01:51:49.970877 PCI: 00:05.0 [8086/9a19] enabled
884 01:51:49.971136
885 01:51:49.971205 PCI: 00:07.0 [0000/0000] hidden
886 01:51:49.971458 PCI: 00:08.0 [8086/9a11] enabled
887 01:51:49.971527 PCI: 00:0a.0 [8086/9a0d] disabled
888 01:51:49.971801 PCI: 00:0d.0 [8086/0000] bus ops
889 01:51:49.971868 PCI: 00:0d.0 [8086/9a13] enabled
890 01:51:49.972145 PCI: 00:14.0 [8086/0000] bus ops
891 01:51:49.972228 PCI: 00:14.0 [8086/a0ed] enabled
892 01:51:49.972287 PCI: 00:14.2 [8086/a0ef] enabled
893 01:51:49.972345 PCI: 00:14.3 [8086/0000] bus ops
894 01:51:49.972584 PCI: 00:14.3 [8086/a0f0] enabled
895 01:51:49.972648 PCI: 00:15.0 [8086/0000] bus ops
896 01:51:49.972887 PCI: 00:15.0 [8086/a0e8] enabled
897 01:51:49.972950 PCI: 00:15.1 [8086/0000] bus ops
898 01:51:50.010331 PCI: 00:15.1 [8086/a0e9] enabled
899 01:51:50.010431 PCI: 00:15.2 [8086/0000] bus ops
900 01:51:50.010923 PCI: 00:15.2 [8086/a0ea] enabled
901 01:51:50.011197 PCI: 00:15.3 [8086/0000] bus ops
902 01:51:50.011268 PCI: 00:15.3 [8086/a0eb] enabled
903 01:51:50.011332 PCI: 00:16.0 [8086/0000] ops
904 01:51:50.011392 PCI: 00:16.0 [8086/a0e0] enabled
905 01:51:50.011914 PCI: Static device PCI: 00:17.0 not found, disabling it.
906 01:51:50.012000 PCI: 00:19.0 [8086/0000] bus ops
907 01:51:50.012253
908 01:51:50.012322 PCI: 00:19.0 [8086/a0c5] disabled
909 01:51:50.014826 PCI: 00:19.1 [8086/0000] bus ops
910 01:51:50.014924 PCI: 00:19.1 [8086/a0c6] enabled
911 01:51:50.018251 PCI: 00:1d.0 [8086/0000] bus ops
912 01:51:50.021098 PCI: 00:1d.0 [8086/a0b0] enabled
913 01:51:50.024451 PCI: 00:1e.0 [8086/0000] ops
914 01:51:50.028039 PCI: 00:1e.0 [8086/a0a8] enabled
915 01:51:50.031362 PCI: 00:1e.2 [8086/0000] bus ops
916 01:51:50.035008 PCI: 00:1e.2 [8086/a0aa] enabled
917 01:51:50.037679 PCI: 00:1e.3 [8086/0000] bus ops
918 01:51:50.041045 PCI: 00:1e.3 [8086/a0ab] enabled
919 01:51:50.044143 PCI: 00:1f.0 [8086/0000] bus ops
920 01:51:50.047622 PCI: 00:1f.0 [8086/a087] enabled
921 01:51:50.047707 RTC Init
922 01:51:50.051040 Set power on after power failure.
923 01:51:50.054151 Disabling Deep S3
924 01:51:50.054235 Disabling Deep S3
925 01:51:50.057477 Disabling Deep S4
926 01:51:50.057562 Disabling Deep S4
927 01:51:50.060998 Disabling Deep S5
928 01:51:50.064015 Disabling Deep S5
929 01:51:50.067886 PCI: 00:1f.2 [0000/0000] hidden
930 01:51:50.070463 PCI: 00:1f.3 [8086/0000] bus ops
931 01:51:50.074259 PCI: 00:1f.3 [8086/a0c8] enabled
932 01:51:50.077213 PCI: 00:1f.5 [8086/0000] bus ops
933 01:51:50.080736 PCI: 00:1f.5 [8086/a0a4] enabled
934 01:51:50.084072 PCI: Leftover static devices:
935 01:51:50.084156 PCI: 00:10.2
936 01:51:50.084222 PCI: 00:10.6
937 01:51:50.087395 PCI: 00:10.7
938 01:51:50.087480 PCI: 00:06.0
939 01:51:50.090387 PCI: 00:07.1
940 01:51:50.090471 PCI: 00:07.2
941 01:51:50.090538 PCI: 00:07.3
942 01:51:50.093957 PCI: 00:09.0
943 01:51:50.094042 PCI: 00:0d.1
944 01:51:50.097305 PCI: 00:0d.2
945 01:51:50.097425 PCI: 00:0d.3
946 01:51:50.097491 PCI: 00:0e.0
947 01:51:50.100568 PCI: 00:12.0
948 01:51:50.100652 PCI: 00:12.6
949 01:51:50.104132 PCI: 00:13.0
950 01:51:50.104216 PCI: 00:14.1
951 01:51:50.106939 PCI: 00:16.1
952 01:51:50.107025 PCI: 00:16.2
953 01:51:50.107091 PCI: 00:16.3
954 01:51:50.110271 PCI: 00:16.4
955 01:51:50.110355 PCI: 00:16.5
956 01:51:50.114022 PCI: 00:17.0
957 01:51:50.114117 PCI: 00:19.2
958 01:51:50.114183 PCI: 00:1e.1
959 01:51:50.117248 PCI: 00:1f.1
960 01:51:50.117355 PCI: 00:1f.4
961 01:51:50.120402 PCI: 00:1f.6
962 01:51:50.120499 PCI: 00:1f.7
963 01:51:50.123983 PCI: Check your devicetree.cb.
964 01:51:50.127178 PCI: 00:02.0 scanning...
965 01:51:50.130170 scan_generic_bus for PCI: 00:02.0
966 01:51:50.133697 scan_generic_bus for PCI: 00:02.0 done
967 01:51:50.137030 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
968 01:51:50.140023
969 01:51:50.140108 PCI: 00:04.0 scanning...
970 01:51:50.143468 scan_generic_bus for PCI: 00:04.0
971 01:51:50.146863 GENERIC: 0.0 enabled
972 01:51:50.153483 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
973 01:51:50.156773 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
974 01:51:50.160437 PCI: 00:0d.0 scanning...
975 01:51:50.163447 scan_static_bus for PCI: 00:0d.0
976 01:51:50.166636 USB0 port 0 enabled
977 01:51:50.166722 USB0 port 0 scanning...
978 01:51:50.169918
979 01:51:50.173522 scan_static_bus for USB0 port 0
980 01:51:50.173607 USB3 port 0 enabled
981 01:51:50.176462 USB3 port 1 enabled
982 01:51:50.176548 USB3 port 2 disabled
983 01:51:50.179983 USB3 port 3 disabled
984 01:51:50.182960 USB3 port 0 scanning...
985 01:51:50.186495 scan_static_bus for USB3 port 0
986 01:51:50.189520 scan_static_bus for USB3 port 0 done
987 01:51:50.192802 scan_bus: bus USB3 port 0 finished in 6 msecs
988 01:51:50.196343 USB3 port 1 scanning...
989 01:51:50.199687 scan_static_bus for USB3 port 1
990 01:51:50.202935 scan_static_bus for USB3 port 1 done
991 01:51:50.209948 scan_bus: bus USB3 port 1 finished in 6 msecs
992 01:51:50.213041 scan_static_bus for USB0 port 0 done
993 01:51:50.216428 scan_bus: bus USB0 port 0 finished in 43 msecs
994 01:51:50.219501 scan_static_bus for PCI: 00:0d.0 done
995 01:51:50.226121 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
996 01:51:50.229215 PCI: 00:14.0 scanning...
997 01:51:50.232604 scan_static_bus for PCI: 00:14.0
998 01:51:50.232690 USB0 port 0 enabled
999 01:51:50.236100 USB0 port 0 scanning...
1000 01:51:50.239670 scan_static_bus for USB0 port 0
1001 01:51:50.242564 USB2 port 0 disabled
1002 01:51:50.242650 USB2 port 1 enabled
1003 01:51:50.246143 USB2 port 2 enabled
1004 01:51:50.249238 USB2 port 3 disabled
1005 01:51:50.249346 USB2 port 4 enabled
1006 01:51:50.252821 USB2 port 5 disabled
1007 01:51:50.255734 USB2 port 6 disabled
1008 01:51:50.255819 USB2 port 7 disabled
1009 01:51:50.259104 USB2 port 8 disabled
1010 01:51:50.259194 USB2 port 9 disabled
1011 01:51:50.262628
1012 01:51:50.262714 USB3 port 0 disabled
1013 01:51:50.265777 USB3 port 1 enabled
1014 01:51:50.265862 USB3 port 2 disabled
1015 01:51:50.269255 USB3 port 3 disabled
1016 01:51:50.272485 USB2 port 1 scanning...
1017 01:51:50.275466 scan_static_bus for USB2 port 1
1018 01:51:50.278935 scan_static_bus for USB2 port 1 done
1019 01:51:50.281934 scan_bus: bus USB2 port 1 finished in 6 msecs
1020 01:51:50.285680 USB2 port 2 scanning...
1021 01:51:50.288913 scan_static_bus for USB2 port 2
1022 01:51:50.291965 scan_static_bus for USB2 port 2 done
1023 01:51:50.298489 scan_bus: bus USB2 port 2 finished in 6 msecs
1024 01:51:50.298575 USB2 port 4 scanning...
1025 01:51:50.302273 scan_static_bus for USB2 port 4
1026 01:51:50.308693 scan_static_bus for USB2 port 4 done
1027 01:51:50.312027 scan_bus: bus USB2 port 4 finished in 6 msecs
1028 01:51:50.315364 USB3 port 1 scanning...
1029 01:51:50.318690 scan_static_bus for USB3 port 1
1030 01:51:50.321822 scan_static_bus for USB3 port 1 done
1031 01:51:50.325245 scan_bus: bus USB3 port 1 finished in 6 msecs
1032 01:51:50.328468 scan_static_bus for USB0 port 0 done
1033 01:51:50.335102 scan_bus: bus USB0 port 0 finished in 93 msecs
1034 01:51:50.338543 scan_static_bus for PCI: 00:14.0 done
1035 01:51:50.341753 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1036 01:51:50.345045 PCI: 00:14.3 scanning...
1037 01:51:50.348364 scan_static_bus for PCI: 00:14.3
1038 01:51:50.351831 GENERIC: 0.0 enabled
1039 01:51:50.354996 scan_static_bus for PCI: 00:14.3 done
1040 01:51:50.358392 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1041 01:51:50.361937
1042 01:51:50.362022 PCI: 00:15.0 scanning...
1043 01:51:50.365230 scan_static_bus for PCI: 00:15.0
1044 01:51:50.368114 I2C: 00:1a enabled
1045 01:51:50.371401 I2C: 00:31 enabled
1046 01:51:50.371489 I2C: 00:32 enabled
1047 01:51:50.375102 scan_static_bus for PCI: 00:15.0 done
1048 01:51:50.381515 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1049 01:51:50.381600 PCI: 00:15.1 scanning...
1050 01:51:50.384914 scan_static_bus for PCI: 00:15.1
1051 01:51:50.388400 I2C: 00:10 enabled
1052 01:51:50.391574 scan_static_bus for PCI: 00:15.1 done
1053 01:51:50.397902 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1054 01:51:50.397987 PCI: 00:15.2 scanning...
1055 01:51:50.401246 scan_static_bus for PCI: 00:15.2
1056 01:51:50.408156 scan_static_bus for PCI: 00:15.2 done
1057 01:51:50.411526 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1058 01:51:50.414481 PCI: 00:15.3 scanning...
1059 01:51:50.418308 scan_static_bus for PCI: 00:15.3
1060 01:51:50.421216 scan_static_bus for PCI: 00:15.3 done
1061 01:51:50.424663 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1062 01:51:50.427694 PCI: 00:19.1 scanning...
1063 01:51:50.431021 scan_static_bus for PCI: 00:19.1
1064 01:51:50.434453 I2C: 00:15 enabled
1065 01:51:50.437584 scan_static_bus for PCI: 00:19.1 done
1066 01:51:50.444256 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1067 01:51:50.444341 PCI: 00:1d.0 scanning...
1068 01:51:50.447667 do_pci_scan_bridge for PCI: 00:1d.0
1069 01:51:50.451090 PCI: pci_scan_bus for bus 01
1070 01:51:50.454345 PCI: 01:00.0 [15b7/5009] enabled
1071 01:51:50.457178 GENERIC: 0.0 enabled
1072 01:51:50.460745 Enabling Common Clock Configuration
1073 01:51:50.464298 L1 Sub-State supported from root port 29
1074 01:51:50.467139 L1 Sub-State Support = 0x5
1075 01:51:50.470618 CommonModeRestoreTime = 0x28
1076 01:51:50.473835 Power On Value = 0x16, Power On Scale = 0x0
1077 01:51:50.477288
1078 01:51:50.477413 ASPM: Enabled L1
1079 01:51:50.480764 PCIe: Max_Payload_Size adjusted to 128
1080 01:51:50.487328 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1081 01:51:50.487414 PCI: 00:1e.2 scanning...
1082 01:51:50.490776 scan_generic_bus for PCI: 00:1e.2
1083 01:51:50.494190
1084 01:51:50.494276 SPI: 00 enabled
1085 01:51:50.500715 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1086 01:51:50.504100 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1087 01:51:50.506976 PCI: 00:1e.3 scanning...
1088 01:51:50.510496 scan_generic_bus for PCI: 00:1e.3
1089 01:51:50.513496 SPI: 00 enabled
1090 01:51:50.517313 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1091 01:51:50.524000 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1092 01:51:50.527133 PCI: 00:1f.0 scanning...
1093 01:51:50.530521 scan_static_bus for PCI: 00:1f.0
1094 01:51:50.530639 PNP: 0c09.0 enabled
1095 01:51:50.533896 PNP: 0c09.0 scanning...
1096 01:51:50.536924 scan_static_bus for PNP: 0c09.0
1097 01:51:50.540420 scan_static_bus for PNP: 0c09.0 done
1098 01:51:50.546799 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1099 01:51:50.550417 scan_static_bus for PCI: 00:1f.0 done
1100 01:51:50.553817 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1101 01:51:50.557176 PCI: 00:1f.2 scanning...
1102 01:51:50.560545 scan_static_bus for PCI: 00:1f.2
1103 01:51:50.563539 GENERIC: 0.0 enabled
1104 01:51:50.563665 GENERIC: 0.0 scanning...
1105 01:51:50.566993
1106 01:51:50.569885 scan_static_bus for GENERIC: 0.0
1107 01:51:50.569971 GENERIC: 0.0 enabled
1108 01:51:50.573146 GENERIC: 1.0 enabled
1109 01:51:50.576317 scan_static_bus for GENERIC: 0.0 done
1110 01:51:50.583097 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1111 01:51:50.586884 scan_static_bus for PCI: 00:1f.2 done
1112 01:51:50.589616 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1113 01:51:50.593072 PCI: 00:1f.3 scanning...
1114 01:51:50.596502 scan_static_bus for PCI: 00:1f.3
1115 01:51:50.599512 scan_static_bus for PCI: 00:1f.3 done
1116 01:51:50.606111 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1117 01:51:50.606200 PCI: 00:1f.5 scanning...
1118 01:51:50.609581 scan_generic_bus for PCI: 00:1f.5
1119 01:51:50.616395 scan_generic_bus for PCI: 00:1f.5 done
1120 01:51:50.619593 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1121 01:51:50.623002 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1122 01:51:50.626320
1123 01:51:50.629580 scan_static_bus for Root Device done
1124 01:51:50.632717 scan_bus: bus Root Device finished in 736 msecs
1125 01:51:50.632804 done
1126 01:51:50.639555 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1127 01:51:50.642792 Chrome EC: UHEPI supported
1128 01:51:50.649252 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1129 01:51:50.655931 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1130 01:51:50.659092 SPI flash protection: WPSW=0 SRP0=1
1131 01:51:50.662300 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1132 01:51:50.669316 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1133 01:51:50.672429 found VGA at PCI: 00:02.0
1134 01:51:50.675577 Setting up VGA for PCI: 00:02.0
1135 01:51:50.679317 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1136 01:51:50.682658
1137 01:51:50.685309 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1138 01:51:50.689156 Allocating resources...
1139 01:51:50.689259 Reading resources...
1140 01:51:50.695530 Root Device read_resources bus 0 link: 0
1141 01:51:50.698955 DOMAIN: 0000 read_resources bus 0 link: 0
1142 01:51:50.701837 PCI: 00:04.0 read_resources bus 1 link: 0
1143 01:51:50.705594
1144 01:51:50.708837 PCI: 00:04.0 read_resources bus 1 link: 0 done
1145 01:51:50.715251 PCI: 00:0d.0 read_resources bus 0 link: 0
1146 01:51:50.718630 USB0 port 0 read_resources bus 0 link: 0
1147 01:51:50.722202 USB0 port 0 read_resources bus 0 link: 0 done
1148 01:51:50.725357
1149 01:51:50.728522 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1150 01:51:50.731771 PCI: 00:14.0 read_resources bus 0 link: 0
1151 01:51:50.738611 USB0 port 0 read_resources bus 0 link: 0
1152 01:51:50.741523 USB0 port 0 read_resources bus 0 link: 0 done
1153 01:51:50.748525 PCI: 00:14.0 read_resources bus 0 link: 0 done
1154 01:51:50.751699 PCI: 00:14.3 read_resources bus 0 link: 0
1155 01:51:50.758474 PCI: 00:14.3 read_resources bus 0 link: 0 done
1156 01:51:50.761567 PCI: 00:15.0 read_resources bus 0 link: 0
1157 01:51:50.768365 PCI: 00:15.0 read_resources bus 0 link: 0 done
1158 01:51:50.771898 PCI: 00:15.1 read_resources bus 0 link: 0
1159 01:51:50.778411 PCI: 00:15.1 read_resources bus 0 link: 0 done
1160 01:51:50.781735 PCI: 00:19.1 read_resources bus 0 link: 0
1161 01:51:50.788555 PCI: 00:19.1 read_resources bus 0 link: 0 done
1162 01:51:50.792014 PCI: 00:1d.0 read_resources bus 1 link: 0
1163 01:51:50.798747 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1164 01:51:50.801982 PCI: 00:1e.2 read_resources bus 2 link: 0
1165 01:51:50.808837 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1166 01:51:50.811888 PCI: 00:1e.3 read_resources bus 3 link: 0
1167 01:51:50.818395 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1168 01:51:50.821315 PCI: 00:1f.0 read_resources bus 0 link: 0
1169 01:51:50.828065 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1170 01:51:50.831910 PCI: 00:1f.2 read_resources bus 0 link: 0
1171 01:51:50.834807 GENERIC: 0.0 read_resources bus 0 link: 0
1172 01:51:50.841866 GENERIC: 0.0 read_resources bus 0 link: 0 done
1173 01:51:50.845103 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1174 01:51:50.852526 DOMAIN: 0000 read_resources bus 0 link: 0 done
1175 01:51:50.855513 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1176 01:51:50.862429 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1177 01:51:50.865432 Root Device read_resources bus 0 link: 0 done
1178 01:51:50.868843 Done reading resources.
1179 01:51:50.875414 Show resources in subtree (Root Device)...After reading.
1180 01:51:50.879032 Root Device child on link 0 DOMAIN: 0000
1181 01:51:50.882221 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1182 01:51:50.892206 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1183 01:51:50.902168 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1184 01:51:50.905378 PCI: 00:00.0
1185 01:51:50.915413 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1186 01:51:50.921942 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1187 01:51:50.931932 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1188 01:51:50.941540 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1189 01:51:50.951431 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1190 01:51:50.962039 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1191 01:51:50.971496 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1192 01:51:50.977925 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1193 01:51:50.987800 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1194 01:51:50.998415 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1195 01:51:51.007807 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1196 01:51:51.018012 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1197 01:51:51.028012 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1198 01:51:51.034194 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1199 01:51:51.043925 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1200 01:51:51.054209 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1201 01:51:51.064158 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1202 01:51:51.074000 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1203 01:51:51.084297 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1204 01:51:51.093660 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1205 01:51:51.093749 PCI: 00:02.0
1206 01:51:51.103516 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1207 01:51:51.113770 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1208 01:51:51.123621 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1209 01:51:51.126975 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1210 01:51:51.136690 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1211 01:51:51.140217 GENERIC: 0.0
1212 01:51:51.140302 PCI: 00:05.0
1213 01:51:51.149719 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1214 01:51:51.156619 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1215 01:51:51.156705 GENERIC: 0.0
1216 01:51:51.160309 PCI: 00:08.0
1217 01:51:51.170147 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 01:51:51.170234 PCI: 00:0a.0
1219 01:51:51.176376 PCI: 00:0d.0 child on link 0 USB0 port 0
1220 01:51:51.186689 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1221 01:51:51.189436 USB0 port 0 child on link 0 USB3 port 0
1222 01:51:51.193149 USB3 port 0
1223 01:51:51.193234 USB3 port 1
1224 01:51:51.196420 USB3 port 2
1225 01:51:51.196510 USB3 port 3
1226 01:51:51.199635 PCI: 00:14.0 child on link 0 USB0 port 0
1227 01:51:51.202935
1228 01:51:51.213135 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1229 01:51:51.215919 USB0 port 0 child on link 0 USB2 port 0
1230 01:51:51.216004 USB2 port 0
1231 01:51:51.219434 USB2 port 1
1232 01:51:51.219518 USB2 port 2
1233 01:51:51.222903 USB2 port 3
1234 01:51:51.225912 USB2 port 4
1235 01:51:51.226005 USB2 port 5
1236 01:51:51.229290 USB2 port 6
1237 01:51:51.229413 USB2 port 7
1238 01:51:51.232569 USB2 port 8
1239 01:51:51.232653 USB2 port 9
1240 01:51:51.235929 USB3 port 0
1241 01:51:51.236013 USB3 port 1
1242 01:51:51.239406 USB3 port 2
1243 01:51:51.239493 USB3 port 3
1244 01:51:51.242545 PCI: 00:14.2
1245 01:51:51.252391 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1246 01:51:51.262904 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1247 01:51:51.265634 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1248 01:51:51.275950 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1249 01:51:51.279052 GENERIC: 0.0
1250 01:51:51.282119 PCI: 00:15.0 child on link 0 I2C: 00:1a
1251 01:51:51.292169 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1252 01:51:51.295436 I2C: 00:1a
1253 01:51:51.295531 I2C: 00:31
1254 01:51:51.295601 I2C: 00:32
1255 01:51:51.299180
1256 01:51:51.301999 PCI: 00:15.1 child on link 0 I2C: 00:10
1257 01:51:51.311947 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 01:51:51.312035 I2C: 00:10
1259 01:51:51.315741 PCI: 00:15.2
1260 01:51:51.325258 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1261 01:51:51.325354 PCI: 00:15.3
1262 01:51:51.335208 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1263 01:51:51.338516 PCI: 00:16.0
1264 01:51:51.348575 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1265 01:51:51.348660 PCI: 00:19.0
1266 01:51:51.355144 PCI: 00:19.1 child on link 0 I2C: 00:15
1267 01:51:51.365403 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1268 01:51:51.365489 I2C: 00:15
1269 01:51:51.368455 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1270 01:51:51.378267 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1271 01:51:51.388391 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1272 01:51:51.397923 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1273 01:51:51.398013 GENERIC: 0.0
1274 01:51:51.401154 PCI: 01:00.0
1275 01:51:51.411056 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1276 01:51:51.420915 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1277 01:51:51.421001 PCI: 00:1e.0
1278 01:51:51.434257 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1279 01:51:51.437765 PCI: 00:1e.2 child on link 0 SPI: 00
1280 01:51:51.447892 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1281 01:51:51.447978 SPI: 00
1282 01:51:51.454542 PCI: 00:1e.3 child on link 0 SPI: 00
1283 01:51:51.463981 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1284 01:51:51.464069 SPI: 00
1285 01:51:51.467123 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1286 01:51:51.477189 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1287 01:51:51.477277 PNP: 0c09.0
1288 01:51:51.487005 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1289 01:51:51.490748 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1290 01:51:51.500582 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1291 01:51:51.510530 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1292 01:51:51.513403 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1293 01:51:51.516943 GENERIC: 0.0
1294 01:51:51.520379 GENERIC: 1.0
1295 01:51:51.520494 PCI: 00:1f.3
1296 01:51:51.530044 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1297 01:51:51.540093 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1298 01:51:51.543679 PCI: 00:1f.5
1299 01:51:51.550130 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1300 01:51:51.556633 CPU_CLUSTER: 0 child on link 0 APIC: 00
1301 01:51:51.556744 APIC: 00
1302 01:51:51.556839 APIC: 03
1303 01:51:51.560159
1304 01:51:51.560264 APIC: 05
1305 01:51:51.560354 APIC: 06
1306 01:51:51.563561 APIC: 07
1307 01:51:51.563661 APIC: 02
1308 01:51:51.563748 APIC: 01
1309 01:51:51.566277 APIC: 04
1310 01:51:51.572979 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1311 01:51:51.579738 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1312 01:51:51.586286 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1313 01:51:51.592995 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1314 01:51:51.596227 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1315 01:51:51.599347 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1316 01:51:51.606578 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1317 01:51:51.613089 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1318 01:51:51.623053 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1319 01:51:51.629290 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1320 01:51:51.635935 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1321 01:51:51.642701 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1322 01:51:51.649260 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1323 01:51:51.659197 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1324 01:51:51.662293 DOMAIN: 0000: Resource ranges:
1325 01:51:51.665534 * Base: 1000, Size: 800, Tag: 100
1326 01:51:51.668958 * Base: 1900, Size: e700, Tag: 100
1327 01:51:51.672575 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1328 01:51:51.679180 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1329 01:51:51.688997 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1330 01:51:51.695647 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1331 01:51:51.701987 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1332 01:51:51.712136 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1333 01:51:51.718903 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1334 01:51:51.725536 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1335 01:51:51.735737 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1336 01:51:51.741872 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1337 01:51:51.748354 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1338 01:51:51.754933 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1339 01:51:51.758396
1340 01:51:51.764767 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1341 01:51:51.771469 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1342 01:51:51.777961 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1343 01:51:51.781466
1344 01:51:51.788089 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1345 01:51:51.794944 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1346 01:51:51.801440 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1347 01:51:51.811411 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1348 01:51:51.817874 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1349 01:51:51.824579 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1350 01:51:51.827618
1351 01:51:51.834373 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1352 01:51:51.841069 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1353 01:51:51.847577 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1354 01:51:51.850829
1355 01:51:51.857584 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1356 01:51:51.860645 DOMAIN: 0000: Resource ranges:
1357 01:51:51.864363 * Base: 7fc00000, Size: 40400000, Tag: 200
1358 01:51:51.867536 * Base: d0000000, Size: 28000000, Tag: 200
1359 01:51:51.874180 * Base: fa000000, Size: 1000000, Tag: 200
1360 01:51:51.877888 * Base: fb001000, Size: 2fff000, Tag: 200
1361 01:51:51.880670 * Base: fe010000, Size: 2e000, Tag: 200
1362 01:51:51.887487 * Base: fe03f000, Size: d41000, Tag: 200
1363 01:51:51.891062 * Base: fed88000, Size: 8000, Tag: 200
1364 01:51:51.893775 * Base: fed93000, Size: d000, Tag: 200
1365 01:51:51.897433 * Base: feda2000, Size: 1e000, Tag: 200
1366 01:51:51.904005 * Base: fede0000, Size: 1220000, Tag: 200
1367 01:51:51.907347 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1368 01:51:51.913911 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1369 01:51:51.920399 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1370 01:51:51.926712 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1371 01:51:51.933721 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1372 01:51:51.939945 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1373 01:51:51.946709 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1374 01:51:51.953235 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1375 01:51:51.960138 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1376 01:51:51.966319 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1377 01:51:51.973231 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1378 01:51:51.979744 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1379 01:51:51.986318 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1380 01:51:51.993231 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1381 01:51:51.999603 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1382 01:51:52.006232 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1383 01:51:52.012766 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1384 01:51:52.019613 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1385 01:51:52.026125 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1386 01:51:52.032573 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1387 01:51:52.039021 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1388 01:51:52.045928 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1389 01:51:52.052842 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1390 01:51:52.062246 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1391 01:51:52.069109 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1392 01:51:52.072310 PCI: 00:1d.0: Resource ranges:
1393 01:51:52.075658 * Base: 7fc00000, Size: 100000, Tag: 200
1394 01:51:52.082343 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1395 01:51:52.088892 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1396 01:51:52.098654 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1397 01:51:52.105186 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1398 01:51:52.108685 Root Device assign_resources, bus 0 link: 0
1399 01:51:52.115201 DOMAIN: 0000 assign_resources, bus 0 link: 0
1400 01:51:52.122232 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1401 01:51:52.131558 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1402 01:51:52.138624 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1403 01:51:52.148199 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1404 01:51:52.151812 PCI: 00:04.0 assign_resources, bus 1 link: 0
1405 01:51:52.155378 PCI: 00:04.0 assign_resources, bus 1 link: 0
1406 01:51:52.164582 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1407 01:51:52.171511 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1408 01:51:52.181130 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1409 01:51:52.184457 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1410 01:51:52.191139 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1411 01:51:52.197749 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1412 01:51:52.200935 PCI: 00:14.0 assign_resources, bus 0 link: 0
1413 01:51:52.204414
1414 01:51:52.207412 PCI: 00:14.0 assign_resources, bus 0 link: 0
1415 01:51:52.214227 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1416 01:51:52.224017 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1417 01:51:52.230839 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1418 01:51:52.237197 PCI: 00:14.3 assign_resources, bus 0 link: 0
1419 01:51:52.240611 PCI: 00:14.3 assign_resources, bus 0 link: 0
1420 01:51:52.250432 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1421 01:51:52.253914 PCI: 00:15.0 assign_resources, bus 0 link: 0
1422 01:51:52.257302 PCI: 00:15.0 assign_resources, bus 0 link: 0
1423 01:51:52.267616 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1424 01:51:52.270416 PCI: 00:15.1 assign_resources, bus 0 link: 0
1425 01:51:52.277227 PCI: 00:15.1 assign_resources, bus 0 link: 0
1426 01:51:52.283554 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1427 01:51:52.293604 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1428 01:51:52.299943 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1429 01:51:52.309952 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1430 01:51:52.312849 PCI: 00:19.1 assign_resources, bus 0 link: 0
1431 01:51:52.319884 PCI: 00:19.1 assign_resources, bus 0 link: 0
1432 01:51:52.326677 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1433 01:51:52.336190 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1434 01:51:52.346302 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1435 01:51:52.349691 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1436 01:51:52.359408 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1437 01:51:52.366039 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1438 01:51:52.369390 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1439 01:51:52.379535 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1440 01:51:52.382871 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1441 01:51:52.389026 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1442 01:51:52.395667 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1443 01:51:52.402481 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1444 01:51:52.405773 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1445 01:51:52.409545 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1446 01:51:52.415995 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1447 01:51:52.418971 LPC: Trying to open IO window from 800 size 1ff
1448 01:51:52.429018 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1449 01:51:52.435558 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1450 01:51:52.445307 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1451 01:51:52.448902 DOMAIN: 0000 assign_resources, bus 0 link: 0
1452 01:51:52.455069 Root Device assign_resources, bus 0 link: 0
1453 01:51:52.455154 Done setting resources.
1454 01:51:52.461895 Show resources in subtree (Root Device)...After assigning values.
1455 01:51:52.468730 Root Device child on link 0 DOMAIN: 0000
1456 01:51:52.472006 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1457 01:51:52.481742 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1458 01:51:52.491327 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1459 01:51:52.491414 PCI: 00:00.0
1460 01:51:52.501464 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1461 01:51:52.511480 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1462 01:51:52.521450 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1463 01:51:52.531237 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1464 01:51:52.540822 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1465 01:51:52.547782 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1466 01:51:52.557357 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1467 01:51:52.567531 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1468 01:51:52.577371 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1469 01:51:52.587009 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1470 01:51:52.597303 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1471 01:51:52.603651 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1472 01:51:52.613637 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1473 01:51:52.623391 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1474 01:51:52.633671 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1475 01:51:52.643411 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1476 01:51:52.652811 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1477 01:51:52.663178 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1478 01:51:52.669807 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1479 01:51:52.679527 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1480 01:51:52.682780 PCI: 00:02.0
1481 01:51:52.692792 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1482 01:51:52.702812 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1483 01:51:52.712730 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1484 01:51:52.715896 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1485 01:51:52.728893 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1486 01:51:52.728979 GENERIC: 0.0
1487 01:51:52.732589 PCI: 00:05.0
1488 01:51:52.742312 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1489 01:51:52.745857 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1490 01:51:52.749576 GENERIC: 0.0
1491 01:51:52.749660 PCI: 00:08.0
1492 01:51:52.758574 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1493 01:51:52.762192 PCI: 00:0a.0
1494 01:51:52.765168 PCI: 00:0d.0 child on link 0 USB0 port 0
1495 01:51:52.775301 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1496 01:51:52.781957 USB0 port 0 child on link 0 USB3 port 0
1497 01:51:52.782043 USB3 port 0
1498 01:51:52.784891 USB3 port 1
1499 01:51:52.784978 USB3 port 2
1500 01:51:52.788497 USB3 port 3
1501 01:51:52.791610 PCI: 00:14.0 child on link 0 USB0 port 0
1502 01:51:52.801903 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1503 01:51:52.808453 USB0 port 0 child on link 0 USB2 port 0
1504 01:51:52.808549 USB2 port 0
1505 01:51:52.811707 USB2 port 1
1506 01:51:52.811791 USB2 port 2
1507 01:51:52.815608 USB2 port 3
1508 01:51:52.815693 USB2 port 4
1509 01:51:52.818190 USB2 port 5
1510 01:51:52.818274 USB2 port 6
1511 01:51:52.821251 USB2 port 7
1512 01:51:52.824935 USB2 port 8
1513 01:51:52.825020 USB2 port 9
1514 01:51:52.828012 USB3 port 0
1515 01:51:52.828096 USB3 port 1
1516 01:51:52.831492 USB3 port 2
1517 01:51:52.831576 USB3 port 3
1518 01:51:52.834535 PCI: 00:14.2
1519 01:51:52.844562 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1520 01:51:52.854649 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1521 01:51:52.857681 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1522 01:51:52.867731 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1523 01:51:52.871651 GENERIC: 0.0
1524 01:51:52.874529 PCI: 00:15.0 child on link 0 I2C: 00:1a
1525 01:51:52.884260 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1526 01:51:52.887348 I2C: 00:1a
1527 01:51:52.887437 I2C: 00:31
1528 01:51:52.890709 I2C: 00:32
1529 01:51:52.893840 PCI: 00:15.1 child on link 0 I2C: 00:10
1530 01:51:52.903804 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1531 01:51:52.907219 I2C: 00:10
1532 01:51:52.907308 PCI: 00:15.2
1533 01:51:52.917165 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1534 01:51:52.920247 PCI: 00:15.3
1535 01:51:52.930308 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1536 01:51:52.930410 PCI: 00:16.0
1537 01:51:52.933738
1538 01:51:52.943594 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1539 01:51:52.943708 PCI: 00:19.0
1540 01:51:52.946999 PCI: 00:19.1 child on link 0 I2C: 00:15
1541 01:51:52.959975 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1542 01:51:52.960092 I2C: 00:15
1543 01:51:52.963369 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1544 01:51:52.973216 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1545 01:51:52.986629 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1546 01:51:52.996409 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1547 01:51:52.996549 GENERIC: 0.0
1548 01:51:53.000018
1549 01:51:53.000115 PCI: 01:00.0
1550 01:51:53.009605 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1551 01:51:53.019384 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1552 01:51:53.022884 PCI: 00:1e.0
1553 01:51:53.032587 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1554 01:51:53.036028 PCI: 00:1e.2 child on link 0 SPI: 00
1555 01:51:53.046319 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1556 01:51:53.048954
1557 01:51:53.049045 SPI: 00
1558 01:51:53.052837 PCI: 00:1e.3 child on link 0 SPI: 00
1559 01:51:53.062132 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1560 01:51:53.065467 SPI: 00
1561 01:51:53.068838 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1562 01:51:53.078983 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1563 01:51:53.079082 PNP: 0c09.0
1564 01:51:53.088589 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1565 01:51:53.091947 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1566 01:51:53.101791 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1567 01:51:53.111901 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1568 01:51:53.115057 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1569 01:51:53.118189 GENERIC: 0.0
1570 01:51:53.118278 GENERIC: 1.0
1571 01:51:53.121491 PCI: 00:1f.3
1572 01:51:53.131490 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1573 01:51:53.141247 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1574 01:51:53.144958 PCI: 00:1f.5
1575 01:51:53.154816 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1576 01:51:53.158139 CPU_CLUSTER: 0 child on link 0 APIC: 00
1577 01:51:53.158231 APIC: 00
1578 01:51:53.161169 APIC: 03
1579 01:51:53.161284 APIC: 05
1580 01:51:53.164423 APIC: 06
1581 01:51:53.164540 APIC: 07
1582 01:51:53.164625 APIC: 02
1583 01:51:53.167613 APIC: 01
1584 01:51:53.167701 APIC: 04
1585 01:51:53.171126 Done allocating resources.
1586 01:51:53.178177 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1587 01:51:53.183949 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1588 01:51:53.187989 Configure GPIOs for I2S audio on UP4.
1589 01:51:53.193886 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1590 01:51:53.197287 Enabling resources...
1591 01:51:53.200799 PCI: 00:00.0 subsystem <- 8086/9a12
1592 01:51:53.204102 PCI: 00:00.0 cmd <- 06
1593 01:51:53.207123 PCI: 00:02.0 subsystem <- 8086/9a40
1594 01:51:53.207211 PCI: 00:02.0 cmd <- 03
1595 01:51:53.213954 PCI: 00:04.0 subsystem <- 8086/9a03
1596 01:51:53.214043 PCI: 00:04.0 cmd <- 02
1597 01:51:53.217181 PCI: 00:05.0 subsystem <- 8086/9a19
1598 01:51:53.220367 PCI: 00:05.0 cmd <- 02
1599 01:51:53.224223 PCI: 00:08.0 subsystem <- 8086/9a11
1600 01:51:53.227181 PCI: 00:08.0 cmd <- 06
1601 01:51:53.230833 PCI: 00:0d.0 subsystem <- 8086/9a13
1602 01:51:53.233818 PCI: 00:0d.0 cmd <- 02
1603 01:51:53.237134 PCI: 00:14.0 subsystem <- 8086/a0ed
1604 01:51:53.240368 PCI: 00:14.0 cmd <- 02
1605 01:51:53.243496 PCI: 00:14.2 subsystem <- 8086/a0ef
1606 01:51:53.246944 PCI: 00:14.2 cmd <- 02
1607 01:51:53.249999 PCI: 00:14.3 subsystem <- 8086/a0f0
1608 01:51:53.253750 PCI: 00:14.3 cmd <- 02
1609 01:51:53.256630 PCI: 00:15.0 subsystem <- 8086/a0e8
1610 01:51:53.256719 PCI: 00:15.0 cmd <- 02
1611 01:51:53.263664 PCI: 00:15.1 subsystem <- 8086/a0e9
1612 01:51:53.263757 PCI: 00:15.1 cmd <- 02
1613 01:51:53.267145 PCI: 00:15.2 subsystem <- 8086/a0ea
1614 01:51:53.270065 PCI: 00:15.2 cmd <- 02
1615 01:51:53.273637 PCI: 00:15.3 subsystem <- 8086/a0eb
1616 01:51:53.276705 PCI: 00:15.3 cmd <- 02
1617 01:51:53.280340 PCI: 00:16.0 subsystem <- 8086/a0e0
1618 01:51:53.283947 PCI: 00:16.0 cmd <- 02
1619 01:51:53.286555 PCI: 00:19.1 subsystem <- 8086/a0c6
1620 01:51:53.290346 PCI: 00:19.1 cmd <- 02
1621 01:51:53.293341 PCI: 00:1d.0 bridge ctrl <- 0013
1622 01:51:53.296740 PCI: 00:1d.0 subsystem <- 8086/a0b0
1623 01:51:53.300056 PCI: 00:1d.0 cmd <- 06
1624 01:51:53.303149 PCI: 00:1e.0 subsystem <- 8086/a0a8
1625 01:51:53.306337 PCI: 00:1e.0 cmd <- 06
1626 01:51:53.309550 PCI: 00:1e.2 subsystem <- 8086/a0aa
1627 01:51:53.309636 PCI: 00:1e.2 cmd <- 06
1628 01:51:53.316283 PCI: 00:1e.3 subsystem <- 8086/a0ab
1629 01:51:53.316369 PCI: 00:1e.3 cmd <- 02
1630 01:51:53.320432 PCI: 00:1f.0 subsystem <- 8086/a087
1631 01:51:53.323114 PCI: 00:1f.0 cmd <- 407
1632 01:51:53.326181 PCI: 00:1f.3 subsystem <- 8086/a0c8
1633 01:51:53.329299 PCI: 00:1f.3 cmd <- 02
1634 01:51:53.332678 PCI: 00:1f.5 subsystem <- 8086/a0a4
1635 01:51:53.336305 PCI: 00:1f.5 cmd <- 406
1636 01:51:53.340358 PCI: 01:00.0 cmd <- 02
1637 01:51:53.344599 done.
1638 01:51:53.348061 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1639 01:51:53.351483 Initializing devices...
1640 01:51:53.354642 Root Device init
1641 01:51:53.358400 Chrome EC: Set SMI mask to 0x0000000000000000
1642 01:51:53.364521 Chrome EC: clear events_b mask to 0x0000000000000000
1643 01:51:53.371497 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1644 01:51:53.374571 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1645 01:51:53.378162
1646 01:51:53.381077 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1647 01:51:53.387971 Chrome EC: Set WAKE mask to 0x0000000000000000
1648 01:51:53.394567 fw_config match found: DB_USB=USB3_ACTIVE
1649 01:51:53.398820 Configure Right Type-C port orientation for retimer
1650 01:51:53.401365 Root Device init finished in 44 msecs
1651 01:51:53.404943 PCI: 00:00.0 init
1652 01:51:53.408161 CPU TDP = 9 Watts
1653 01:51:53.408251 CPU PL1 = 9 Watts
1654 01:51:53.411518 CPU PL2 = 40 Watts
1655 01:51:53.414889 CPU PL4 = 83 Watts
1656 01:51:53.418185 PCI: 00:00.0 init finished in 8 msecs
1657 01:51:53.418271 PCI: 00:02.0 init
1658 01:51:53.421211
1659 01:51:53.421298 GMA: Found VBT in CBFS
1660 01:51:53.425188 GMA: Found valid VBT in CBFS
1661 01:51:53.431884 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1662 01:51:53.438093 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1663 01:51:53.441603 PCI: 00:02.0 init finished in 18 msecs
1664 01:51:53.444209 PCI: 00:05.0 init
1665 01:51:53.447859 PCI: 00:05.0 init finished in 0 msecs
1666 01:51:53.450987 PCI: 00:08.0 init
1667 01:51:53.454903 PCI: 00:08.0 init finished in 0 msecs
1668 01:51:53.457636 PCI: 00:14.0 init
1669 01:51:53.460891 PCI: 00:14.0 init finished in 0 msecs
1670 01:51:53.464039 PCI: 00:14.2 init
1671 01:51:53.467745 PCI: 00:14.2 init finished in 0 msecs
1672 01:51:53.470607 PCI: 00:15.0 init
1673 01:51:53.473906 I2C bus 0 version 0x3230302a
1674 01:51:53.477327 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1675 01:51:53.480777 PCI: 00:15.0 init finished in 6 msecs
1676 01:51:53.484889 PCI: 00:15.1 init
1677 01:51:53.484975 I2C bus 1 version 0x3230302a
1678 01:51:53.490667 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1679 01:51:53.493665 PCI: 00:15.1 init finished in 6 msecs
1680 01:51:53.493755 PCI: 00:15.2 init
1681 01:51:53.497725 I2C bus 2 version 0x3230302a
1682 01:51:53.500445 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1683 01:51:53.507165 PCI: 00:15.2 init finished in 6 msecs
1684 01:51:53.507323 PCI: 00:15.3 init
1685 01:51:53.510156 I2C bus 3 version 0x3230302a
1686 01:51:53.513637 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1687 01:51:53.516951 PCI: 00:15.3 init finished in 6 msecs
1688 01:51:53.520434 PCI: 00:16.0 init
1689 01:51:53.523300 PCI: 00:16.0 init finished in 0 msecs
1690 01:51:53.526742 PCI: 00:19.1 init
1691 01:51:53.530352 I2C bus 5 version 0x3230302a
1692 01:51:53.533380 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1693 01:51:53.536728 PCI: 00:19.1 init finished in 6 msecs
1694 01:51:53.540499 PCI: 00:1d.0 init
1695 01:51:53.543679 Initializing PCH PCIe bridge.
1696 01:51:53.546587 PCI: 00:1d.0 init finished in 3 msecs
1697 01:51:53.550058 PCI: 00:1f.0 init
1698 01:51:53.553534 IOAPIC: Initializing IOAPIC at 0xfec00000
1699 01:51:53.556526 IOAPIC: Bootstrap Processor Local APIC = 0x00
1700 01:51:53.559602 IOAPIC: ID = 0x02
1701 01:51:53.563309 IOAPIC: Dumping registers
1702 01:51:53.566442 reg 0x0000: 0x02000000
1703 01:51:53.566526 reg 0x0001: 0x00770020
1704 01:51:53.569448 reg 0x0002: 0x00000000
1705 01:51:53.572953 PCI: 00:1f.0 init finished in 21 msecs
1706 01:51:53.576953 PCI: 00:1f.2 init
1707 01:51:53.579785 Disabling ACPI via APMC.
1708 01:51:53.583692 APMC done.
1709 01:51:53.587237 PCI: 00:1f.2 init finished in 6 msecs
1710 01:51:53.598484 PCI: 01:00.0 init
1711 01:51:53.601918 PCI: 01:00.0 init finished in 0 msecs
1712 01:51:53.605626 PNP: 0c09.0 init
1713 01:51:53.608605 Google Chrome EC uptime: 8.249 seconds
1714 01:51:53.615156 Google Chrome AP resets since EC boot: 1
1715 01:51:53.618295 Google Chrome most recent AP reset causes:
1716 01:51:53.621940 0.451: 32775 shutdown: entering G3
1717 01:51:53.628429 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1718 01:51:53.632088 PNP: 0c09.0 init finished in 22 msecs
1719 01:51:53.637285 Devices initialized
1720 01:51:53.640773 Show all devs... After init.
1721 01:51:53.643836 Root Device: enabled 1
1722 01:51:53.643922 DOMAIN: 0000: enabled 1
1723 01:51:53.647229 CPU_CLUSTER: 0: enabled 1
1724 01:51:53.650604 PCI: 00:00.0: enabled 1
1725 01:51:53.653942 PCI: 00:02.0: enabled 1
1726 01:51:53.654027 PCI: 00:04.0: enabled 1
1727 01:51:53.657705 PCI: 00:05.0: enabled 1
1728 01:51:53.660526 PCI: 00:06.0: enabled 0
1729 01:51:53.664102 PCI: 00:07.0: enabled 0
1730 01:51:53.664188 PCI: 00:07.1: enabled 0
1731 01:51:53.667390 PCI: 00:07.2: enabled 0
1732 01:51:53.670391 PCI: 00:07.3: enabled 0
1733 01:51:53.673620 PCI: 00:08.0: enabled 1
1734 01:51:53.673705 PCI: 00:09.0: enabled 0
1735 01:51:53.677083 PCI: 00:0a.0: enabled 0
1736 01:51:53.680101 PCI: 00:0d.0: enabled 1
1737 01:51:53.683676 PCI: 00:0d.1: enabled 0
1738 01:51:53.683759 PCI: 00:0d.2: enabled 0
1739 01:51:53.687159 PCI: 00:0d.3: enabled 0
1740 01:51:53.689951 PCI: 00:0e.0: enabled 0
1741 01:51:53.693539 PCI: 00:10.2: enabled 1
1742 01:51:53.693623 PCI: 00:10.6: enabled 0
1743 01:51:53.696613 PCI: 00:10.7: enabled 0
1744 01:51:53.700186 PCI: 00:12.0: enabled 0
1745 01:51:53.700269 PCI: 00:12.6: enabled 0
1746 01:51:53.703614 PCI: 00:13.0: enabled 0
1747 01:51:53.706862 PCI: 00:14.0: enabled 1
1748 01:51:53.710020 PCI: 00:14.1: enabled 0
1749 01:51:53.710104 PCI: 00:14.2: enabled 1
1750 01:51:53.713590 PCI: 00:14.3: enabled 1
1751 01:51:53.716449 PCI: 00:15.0: enabled 1
1752 01:51:53.719843 PCI: 00:15.1: enabled 1
1753 01:51:53.719926 PCI: 00:15.2: enabled 1
1754 01:51:53.723479 PCI: 00:15.3: enabled 1
1755 01:51:53.726711 PCI: 00:16.0: enabled 1
1756 01:51:53.730379 PCI: 00:16.1: enabled 0
1757 01:51:53.730462 PCI: 00:16.2: enabled 0
1758 01:51:53.733481 PCI: 00:16.3: enabled 0
1759 01:51:53.736311 PCI: 00:16.4: enabled 0
1760 01:51:53.740081 PCI: 00:16.5: enabled 0
1761 01:51:53.740178 PCI: 00:17.0: enabled 0
1762 01:51:53.742984 PCI: 00:19.0: enabled 0
1763 01:51:53.746217 PCI: 00:19.1: enabled 1
1764 01:51:53.746307 PCI: 00:19.2: enabled 0
1765 01:51:53.749893 PCI: 00:1c.0: enabled 1
1766 01:51:53.752917 PCI: 00:1c.1: enabled 0
1767 01:51:53.756332 PCI: 00:1c.2: enabled 0
1768 01:51:53.756416 PCI: 00:1c.3: enabled 0
1769 01:51:53.759579 PCI: 00:1c.4: enabled 0
1770 01:51:53.763539 PCI: 00:1c.5: enabled 0
1771 01:51:53.766125 PCI: 00:1c.6: enabled 1
1772 01:51:53.766208 PCI: 00:1c.7: enabled 0
1773 01:51:53.770349 PCI: 00:1d.0: enabled 1
1774 01:51:53.773316 PCI: 00:1d.1: enabled 0
1775 01:51:53.776318 PCI: 00:1d.2: enabled 1
1776 01:51:53.776402 PCI: 00:1d.3: enabled 0
1777 01:51:53.779664 PCI: 00:1e.0: enabled 1
1778 01:51:53.783338 PCI: 00:1e.1: enabled 0
1779 01:51:53.783420 PCI: 00:1e.2: enabled 1
1780 01:51:53.786622
1781 01:51:53.786705 PCI: 00:1e.3: enabled 1
1782 01:51:53.789467 PCI: 00:1f.0: enabled 1
1783 01:51:53.793121 PCI: 00:1f.1: enabled 0
1784 01:51:53.793207 PCI: 00:1f.2: enabled 1
1785 01:51:53.796106 PCI: 00:1f.3: enabled 1
1786 01:51:53.799763 PCI: 00:1f.4: enabled 0
1787 01:51:53.802954 PCI: 00:1f.5: enabled 1
1788 01:51:53.803036 PCI: 00:1f.6: enabled 0
1789 01:51:53.806126 PCI: 00:1f.7: enabled 0
1790 01:51:53.809695 APIC: 00: enabled 1
1791 01:51:53.809784 GENERIC: 0.0: enabled 1
1792 01:51:53.812651 GENERIC: 0.0: enabled 1
1793 01:51:53.816248 GENERIC: 1.0: enabled 1
1794 01:51:53.819613 GENERIC: 0.0: enabled 1
1795 01:51:53.819696 GENERIC: 1.0: enabled 1
1796 01:51:53.822842 USB0 port 0: enabled 1
1797 01:51:53.826035 GENERIC: 0.0: enabled 1
1798 01:51:53.829556 USB0 port 0: enabled 1
1799 01:51:53.829638 GENERIC: 0.0: enabled 1
1800 01:51:53.832835 I2C: 00:1a: enabled 1
1801 01:51:53.835732 I2C: 00:31: enabled 1
1802 01:51:53.835816 I2C: 00:32: enabled 1
1803 01:51:53.838993 I2C: 00:10: enabled 1
1804 01:51:53.842394 I2C: 00:15: enabled 1
1805 01:51:53.842480 GENERIC: 0.0: enabled 0
1806 01:51:53.845726 GENERIC: 1.0: enabled 0
1807 01:51:53.848952 GENERIC: 0.0: enabled 1
1808 01:51:53.852960 SPI: 00: enabled 1
1809 01:51:53.853043 SPI: 00: enabled 1
1810 01:51:53.855843 PNP: 0c09.0: enabled 1
1811 01:51:53.859295 GENERIC: 0.0: enabled 1
1812 01:51:53.859378 USB3 port 0: enabled 1
1813 01:51:53.862451 USB3 port 1: enabled 1
1814 01:51:53.865714 USB3 port 2: enabled 0
1815 01:51:53.865809 USB3 port 3: enabled 0
1816 01:51:53.869021 USB2 port 0: enabled 0
1817 01:51:53.872343 USB2 port 1: enabled 1
1818 01:51:53.875942 USB2 port 2: enabled 1
1819 01:51:53.876025 USB2 port 3: enabled 0
1820 01:51:53.878703 USB2 port 4: enabled 1
1821 01:51:53.882678 USB2 port 5: enabled 0
1822 01:51:53.882762 USB2 port 6: enabled 0
1823 01:51:53.885495 USB2 port 7: enabled 0
1824 01:51:53.888904 USB2 port 8: enabled 0
1825 01:51:53.888987 USB2 port 9: enabled 0
1826 01:51:53.892122 USB3 port 0: enabled 0
1827 01:51:53.895503 USB3 port 1: enabled 1
1828 01:51:53.898542 USB3 port 2: enabled 0
1829 01:51:53.898625 USB3 port 3: enabled 0
1830 01:51:53.902459 GENERIC: 0.0: enabled 1
1831 01:51:53.905539 GENERIC: 1.0: enabled 1
1832 01:51:53.905622 APIC: 03: enabled 1
1833 01:51:53.908900 APIC: 05: enabled 1
1834 01:51:53.911932 APIC: 06: enabled 1
1835 01:51:53.912015 APIC: 07: enabled 1
1836 01:51:53.915180 APIC: 02: enabled 1
1837 01:51:53.915263 APIC: 01: enabled 1
1838 01:51:53.918456
1839 01:51:53.918539 APIC: 04: enabled 1
1840 01:51:53.922064 PCI: 01:00.0: enabled 1
1841 01:51:53.928925 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1842 01:51:53.932484 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1843 01:51:53.935202 ELOG: NV offset 0xf30000 size 0x1000
1844 01:51:53.942147 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1845 01:51:53.948782 ELOG: Event(17) added with size 13 at 2022-11-16 01:51:52 UTC
1846 01:51:53.955594 ELOG: Event(92) added with size 9 at 2022-11-16 01:51:52 UTC
1847 01:51:53.962810 ELOG: Event(93) added with size 9 at 2022-11-16 01:51:52 UTC
1848 01:51:53.969115 ELOG: Event(9E) added with size 10 at 2022-11-16 01:51:52 UTC
1849 01:51:53.975213 ELOG: Event(9F) added with size 14 at 2022-11-16 01:51:52 UTC
1850 01:51:53.982270 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1851 01:51:53.988327 ELOG: Event(A1) added with size 10 at 2022-11-16 01:51:52 UTC
1852 01:51:53.995336 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1853 01:51:54.001905 ELOG: Event(A0) added with size 9 at 2022-11-16 01:51:52 UTC
1854 01:51:54.005026 elog_add_boot_reason: Logged dev mode boot
1855 01:51:54.011390 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1856 01:51:54.014559 Finalize devices...
1857 01:51:54.014650 Devices finalized
1858 01:51:54.021580 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1859 01:51:54.024905 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1860 01:51:54.031838 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1861 01:51:54.034357 ME: HFSTS1 : 0x80030055
1862 01:51:54.038445
1863 01:51:54.040964 ME: HFSTS2 : 0x30280116
1864 01:51:54.044374 ME: HFSTS3 : 0x00000050
1865 01:51:54.051253 ME: HFSTS4 : 0x00004000
1866 01:51:54.054454 ME: HFSTS5 : 0x00000000
1867 01:51:54.057950 ME: HFSTS6 : 0x40400006
1868 01:51:54.060925 ME: Manufacturing Mode : YES
1869 01:51:54.068253 ME: SPI Protection Mode Enabled : NO
1870 01:51:54.070754 ME: FW Partition Table : OK
1871 01:51:54.074181 ME: Bringup Loader Failure : NO
1872 01:51:54.077275 ME: Firmware Init Complete : NO
1873 01:51:54.080941 ME: Boot Options Present : NO
1874 01:51:54.084405 ME: Update In Progress : NO
1875 01:51:54.087719 ME: D0i3 Support : YES
1876 01:51:54.090766 ME: Low Power State Enabled : NO
1877 01:51:54.098148 ME: CPU Replaced : YES
1878 01:51:54.100918 ME: CPU Replacement Valid : YES
1879 01:51:54.104235 ME: Current Working State : 5
1880 01:51:54.107373 ME: Current Operation State : 1
1881 01:51:54.110984 ME: Current Operation Mode : 3
1882 01:51:54.114395 ME: Error Code : 0
1883 01:51:54.117501 ME: Enhanced Debug Mode : NO
1884 01:51:54.120459 ME: CPU Debug Disabled : YES
1885 01:51:54.124759 ME: TXT Support : NO
1886 01:51:54.130375 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1887 01:51:54.140923 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1888 01:51:54.143648 CBFS: 'fallback/slic' not found.
1889 01:51:54.147380 ACPI: Writing ACPI tables at 76b01000.
1890 01:51:54.147464 ACPI: * FACS
1891 01:51:54.150370 ACPI: * DSDT
1892 01:51:54.154092 Ramoops buffer: 0x100000@0x76a00000.
1893 01:51:54.157283 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1894 01:51:54.163955 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1895 01:51:54.167175 Google Chrome EC: version:
1896 01:51:54.170020 ro: voema_v2.0.10114-a447f03e46
1897 01:51:54.173541 rw: voema_v2.0.10114-a447f03e46
1898 01:51:54.173630 running image: 2
1899 01:51:54.180008 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1900 01:51:54.185652 ACPI: * FADT
1901 01:51:54.185739 SCI is IRQ9
1902 01:51:54.192011 ACPI: added table 1/32, length now 40
1903 01:51:54.192096 ACPI: * SSDT
1904 01:51:54.195427 Found 1 CPU(s) with 8 core(s) each.
1905 01:51:54.201654 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1906 01:51:54.204839 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1907 01:51:54.208606 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1908 01:51:54.211377 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1909 01:51:54.218627 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1910 01:51:54.224977 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1911 01:51:54.228276 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1912 01:51:54.234988 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1913 01:51:54.241480 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1914 01:51:54.244518 \_SB.PCI0.RP09: Added StorageD3Enable property
1915 01:51:54.251505 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1916 01:51:54.254466 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1917 01:51:54.261041 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1918 01:51:54.264271 PS2K: Passing 80 keymaps to kernel
1919 01:51:54.271178 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1920 01:51:54.278278 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1921 01:51:54.284796 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1922 01:51:54.290952 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1923 01:51:54.297423 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1924 01:51:54.304425 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1925 01:51:54.311056 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1926 01:51:54.317500 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1927 01:51:54.321272 ACPI: added table 2/32, length now 44
1928 01:51:54.321395 ACPI: * MCFG
1929 01:51:54.324255 ACPI: added table 3/32, length now 48
1930 01:51:54.327126
1931 01:51:54.327223 ACPI: * TPM2
1932 01:51:54.331116 TPM2 log created at 0x769f0000
1933 01:51:54.333774 ACPI: added table 4/32, length now 52
1934 01:51:54.337134 ACPI: * MADT
1935 01:51:54.337218 SCI is IRQ9
1936 01:51:54.340408 ACPI: added table 5/32, length now 56
1937 01:51:54.343771 current = 76b09850
1938 01:51:54.343870 ACPI: * DMAR
1939 01:51:54.347452 ACPI: added table 6/32, length now 60
1940 01:51:54.353895 ACPI: added table 7/32, length now 64
1941 01:51:54.353980 ACPI: * HPET
1942 01:51:54.356874 ACPI: added table 8/32, length now 68
1943 01:51:54.360803 ACPI: done.
1944 01:51:54.360888 ACPI tables: 35216 bytes.
1945 01:51:54.363895 smbios_write_tables: 769ef000
1946 01:51:54.367097 EC returned error result code 3
1947 01:51:54.370591
1948 01:51:54.373729 Couldn't obtain OEM name from CBI
1949 01:51:54.373815 Create SMBIOS type 16
1950 01:51:54.377360 Create SMBIOS type 17
1951 01:51:54.380429 GENERIC: 0.0 (WIFI Device)
1952 01:51:54.383681 SMBIOS tables: 1734 bytes.
1953 01:51:54.386607 Writing table forward entry at 0x00000500
1954 01:51:54.393389 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1955 01:51:54.396965 Writing coreboot table at 0x76b25000
1956 01:51:54.403227 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1957 01:51:54.406654 1. 0000000000001000-000000000009ffff: RAM
1958 01:51:54.413064 2. 00000000000a0000-00000000000fffff: RESERVED
1959 01:51:54.417272 3. 0000000000100000-00000000769eefff: RAM
1960 01:51:54.423469 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1961 01:51:54.426521 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1962 01:51:54.432965 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1963 01:51:54.436703 7. 0000000077000000-000000007fbfffff: RESERVED
1964 01:51:54.443001 8. 00000000c0000000-00000000cfffffff: RESERVED
1965 01:51:54.446552 9. 00000000f8000000-00000000f9ffffff: RESERVED
1966 01:51:54.453282 10. 00000000fb000000-00000000fb000fff: RESERVED
1967 01:51:54.456262 11. 00000000fe000000-00000000fe00ffff: RESERVED
1968 01:51:54.462686 12. 00000000fed80000-00000000fed87fff: RESERVED
1969 01:51:54.466451 13. 00000000fed90000-00000000fed92fff: RESERVED
1970 01:51:54.469659 14. 00000000feda0000-00000000feda1fff: RESERVED
1971 01:51:54.476380 15. 00000000fedc0000-00000000feddffff: RESERVED
1972 01:51:54.479756 16. 0000000100000000-00000004803fffff: RAM
1973 01:51:54.483062 Passing 4 GPIOs to payload:
1974 01:51:54.489455 NAME | PORT | POLARITY | VALUE
1975 01:51:54.492446 lid | undefined | high | high
1976 01:51:54.499797 power | undefined | high | low
1977 01:51:54.502585 oprom | undefined | high | low
1978 01:51:54.505691
1979 01:51:54.508949 EC in RW | 0x000000e5 | high | high
1980 01:51:54.515851 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum e1d1
1981 01:51:54.518998 coreboot table: 1576 bytes.
1982 01:51:54.522447 IMD ROOT 0. 0x76fff000 0x00001000
1983 01:51:54.525684 IMD SMALL 1. 0x76ffe000 0x00001000
1984 01:51:54.528488 FSP MEMORY 2. 0x76c4e000 0x003b0000
1985 01:51:54.531992 VPD 3. 0x76c4d000 0x00000367
1986 01:51:54.538775 RO MCACHE 4. 0x76c4c000 0x00000fdc
1987 01:51:54.542053 CONSOLE 5. 0x76c2c000 0x00020000
1988 01:51:54.545471 FMAP 6. 0x76c2b000 0x00000578
1989 01:51:54.549012 TIME STAMP 7. 0x76c2a000 0x00000910
1990 01:51:54.552062 VBOOT WORK 8. 0x76c16000 0x00014000
1991 01:51:54.555271 ROMSTG STCK 9. 0x76c15000 0x00001000
1992 01:51:54.558576 AFTER CAR 10. 0x76c0a000 0x0000b000
1993 01:51:54.561976 RAMSTAGE 11. 0x76b97000 0x00073000
1994 01:51:54.568889 REFCODE 12. 0x76b42000 0x00055000
1995 01:51:54.571795 SMM BACKUP 13. 0x76b32000 0x00010000
1996 01:51:54.575127 4f444749 14. 0x76b30000 0x00002000
1997 01:51:54.578826 EXT VBT15. 0x76b2d000 0x0000219f
1998 01:51:54.581874 COREBOOT 16. 0x76b25000 0x00008000
1999 01:51:54.585210 ACPI 17. 0x76b01000 0x00024000
2000 01:51:54.588101 ACPI GNVS 18. 0x76b00000 0x00001000
2001 01:51:54.592025 RAMOOPS 19. 0x76a00000 0x00100000
2002 01:51:54.595752 TPM2 TCGLOG20. 0x769f0000 0x00010000
2003 01:51:54.601513 SMBIOS 21. 0x769ef000 0x00000800
2004 01:51:54.601601 IMD small region:
2005 01:51:54.605023 IMD ROOT 0. 0x76ffec00 0x00000400
2006 01:51:54.611455 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2007 01:51:54.614773 POWER STATE 2. 0x76ffeb80 0x00000044
2008 01:51:54.617803 ROMSTAGE 3. 0x76ffeb60 0x00000004
2009 01:51:54.621064 MEM INFO 4. 0x76ffe980 0x000001e0
2010 01:51:54.627996 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
2011 01:51:54.631326 MTRR: Physical address space:
2012 01:51:54.638261 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2013 01:51:54.644753 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2014 01:51:54.647730 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2015 01:51:54.654451 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2016 01:51:54.660879 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2017 01:51:54.667884 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2018 01:51:54.674473 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
2019 01:51:54.677452 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 01:51:54.680953 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 01:51:54.683938
2022 01:51:54.687728 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 01:51:54.690830 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 01:51:54.694021 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 01:51:54.697177 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 01:51:54.703867 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 01:51:54.707135 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 01:51:54.710605 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 01:51:54.713948 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 01:51:54.720380 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 01:51:54.723848 call enable_fixed_mtrr()
2032 01:51:54.727114 CPU physical address size: 39 bits
2033 01:51:54.730956 MTRR: default type WB/UC MTRR counts: 6/7.
2034 01:51:54.733755 MTRR: WB selected as default type.
2035 01:51:54.740199 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2036 01:51:54.747457 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2037 01:51:54.753544 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2038 01:51:54.760887 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2039 01:51:54.767146 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2040 01:51:54.773070 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2041 01:51:54.773159
2042 01:51:54.776530 MTRR check
2043 01:51:54.779874 Fixed MTRRs : Enabled
2044 01:51:54.779961 Variable MTRRs: Enabled
2045 01:51:54.780028
2046 01:51:54.786676 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 01:51:54.789621 MTRR: Fixed MSR 0x258 0x0606060606060606
2048 01:51:54.793481 MTRR: Fixed MSR 0x259 0x0000000000000000
2049 01:51:54.796517 MTRR: Fixed MSR 0x268 0x0606060606060606
2050 01:51:54.802957 MTRR: Fixed MSR 0x269 0x0606060606060606
2051 01:51:54.806136 MTRR: Fixed MSR 0x26a 0x0606060606060606
2052 01:51:54.809761 MTRR: Fixed MSR 0x26b 0x0606060606060606
2053 01:51:54.813127 MTRR: Fixed MSR 0x26c 0x0606060606060606
2054 01:51:54.816239 MTRR: Fixed MSR 0x26d 0x0606060606060606
2055 01:51:54.819518
2056 01:51:54.823120 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 01:51:54.826357 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 01:51:54.833265 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2059 01:51:54.836596 call enable_fixed_mtrr()
2060 01:51:54.840234 Checking cr50 for pending updates
2061 01:51:54.843475 CPU physical address size: 39 bits
2062 01:51:54.847308 MTRR: Fixed MSR 0x250 0x0606060606060606
2063 01:51:54.850321 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 01:51:54.857417 MTRR: Fixed MSR 0x258 0x0606060606060606
2065 01:51:54.860267 MTRR: Fixed MSR 0x259 0x0000000000000000
2066 01:51:54.864030 MTRR: Fixed MSR 0x268 0x0606060606060606
2067 01:51:54.867185 MTRR: Fixed MSR 0x269 0x0606060606060606
2068 01:51:54.873721 MTRR: Fixed MSR 0x26a 0x0606060606060606
2069 01:51:54.876940 MTRR: Fixed MSR 0x26b 0x0606060606060606
2070 01:51:54.880520 MTRR: Fixed MSR 0x26c 0x0606060606060606
2071 01:51:54.883844 MTRR: Fixed MSR 0x26d 0x0606060606060606
2072 01:51:54.887096 MTRR: Fixed MSR 0x26e 0x0606060606060606
2073 01:51:54.893903 MTRR: Fixed MSR 0x26f 0x0606060606060606
2074 01:51:54.897046 MTRR: Fixed MSR 0x258 0x0606060606060606
2075 01:51:54.903988 MTRR: Fixed MSR 0x259 0x0000000000000000
2076 01:51:54.906768 MTRR: Fixed MSR 0x268 0x0606060606060606
2077 01:51:54.910110 MTRR: Fixed MSR 0x269 0x0606060606060606
2078 01:51:54.913515 MTRR: Fixed MSR 0x26a 0x0606060606060606
2079 01:51:54.920566 MTRR: Fixed MSR 0x26b 0x0606060606060606
2080 01:51:54.923524 MTRR: Fixed MSR 0x26c 0x0606060606060606
2081 01:51:54.926790 MTRR: Fixed MSR 0x26d 0x0606060606060606
2082 01:51:54.930350 MTRR: Fixed MSR 0x26e 0x0606060606060606
2083 01:51:54.936465 MTRR: Fixed MSR 0x26f 0x0606060606060606
2084 01:51:54.940217 call enable_fixed_mtrr()
2085 01:51:54.944245 call enable_fixed_mtrr()
2086 01:51:54.944330 Reading cr50 TPM mode
2087 01:51:54.947639 MTRR: Fixed MSR 0x250 0x0606060606060606
2088 01:51:54.953814 MTRR: Fixed MSR 0x250 0x0606060606060606
2089 01:51:54.957225 MTRR: Fixed MSR 0x258 0x0606060606060606
2090 01:51:54.960680 MTRR: Fixed MSR 0x259 0x0000000000000000
2091 01:51:54.964017 MTRR: Fixed MSR 0x268 0x0606060606060606
2092 01:51:54.967112 MTRR: Fixed MSR 0x269 0x0606060606060606
2093 01:51:54.970790
2094 01:51:54.973804 MTRR: Fixed MSR 0x26a 0x0606060606060606
2095 01:51:54.977636 MTRR: Fixed MSR 0x26b 0x0606060606060606
2096 01:51:54.980490 MTRR: Fixed MSR 0x26c 0x0606060606060606
2097 01:51:54.983824 MTRR: Fixed MSR 0x26d 0x0606060606060606
2098 01:51:54.990579 MTRR: Fixed MSR 0x26e 0x0606060606060606
2099 01:51:54.994238 MTRR: Fixed MSR 0x26f 0x0606060606060606
2100 01:51:55.000638 MTRR: Fixed MSR 0x258 0x0606060606060606
2101 01:51:55.000728 call enable_fixed_mtrr()
2102 01:51:55.007209 MTRR: Fixed MSR 0x259 0x0000000000000000
2103 01:51:55.010146 MTRR: Fixed MSR 0x268 0x0606060606060606
2104 01:51:55.013978 MTRR: Fixed MSR 0x269 0x0606060606060606
2105 01:51:55.016996 MTRR: Fixed MSR 0x26a 0x0606060606060606
2106 01:51:55.023846 MTRR: Fixed MSR 0x26b 0x0606060606060606
2107 01:51:55.026914 MTRR: Fixed MSR 0x26c 0x0606060606060606
2108 01:51:55.029861 MTRR: Fixed MSR 0x26d 0x0606060606060606
2109 01:51:55.033200 MTRR: Fixed MSR 0x26e 0x0606060606060606
2110 01:51:55.040265 MTRR: Fixed MSR 0x26f 0x0606060606060606
2111 01:51:55.043347 CPU physical address size: 39 bits
2112 01:51:55.047450 call enable_fixed_mtrr()
2113 01:51:55.051178 CPU physical address size: 39 bits
2114 01:51:55.055551 CPU physical address size: 39 bits
2115 01:51:55.062351 MTRR: Fixed MSR 0x250 0x0606060606060606
2116 01:51:55.065715 MTRR: Fixed MSR 0x250 0x0606060606060606
2117 01:51:55.068529 MTRR: Fixed MSR 0x258 0x0606060606060606
2118 01:51:55.071947 MTRR: Fixed MSR 0x259 0x0000000000000000
2119 01:51:55.078960 MTRR: Fixed MSR 0x268 0x0606060606060606
2120 01:51:55.082472 MTRR: Fixed MSR 0x269 0x0606060606060606
2121 01:51:55.085460 MTRR: Fixed MSR 0x26a 0x0606060606060606
2122 01:51:55.089095 MTRR: Fixed MSR 0x26b 0x0606060606060606
2123 01:51:55.095466 MTRR: Fixed MSR 0x26c 0x0606060606060606
2124 01:51:55.098285 MTRR: Fixed MSR 0x26d 0x0606060606060606
2125 01:51:55.101684 MTRR: Fixed MSR 0x26e 0x0606060606060606
2126 01:51:55.105125 MTRR: Fixed MSR 0x26f 0x0606060606060606
2127 01:51:55.113266 MTRR: Fixed MSR 0x258 0x0606060606060606
2128 01:51:55.116557 MTRR: Fixed MSR 0x259 0x0000000000000000
2129 01:51:55.119738 MTRR: Fixed MSR 0x268 0x0606060606060606
2130 01:51:55.122983 MTRR: Fixed MSR 0x269 0x0606060606060606
2131 01:51:55.129345 MTRR: Fixed MSR 0x26a 0x0606060606060606
2132 01:51:55.132960 MTRR: Fixed MSR 0x26b 0x0606060606060606
2133 01:51:55.136287 MTRR: Fixed MSR 0x26c 0x0606060606060606
2134 01:51:55.139559 MTRR: Fixed MSR 0x26d 0x0606060606060606
2135 01:51:55.146660 MTRR: Fixed MSR 0x26e 0x0606060606060606
2136 01:51:55.149324 MTRR: Fixed MSR 0x26f 0x0606060606060606
2137 01:51:55.152649 call enable_fixed_mtrr()
2138 01:51:55.156017 call enable_fixed_mtrr()
2139 01:51:55.159432 CPU physical address size: 39 bits
2140 01:51:55.162547 CPU physical address size: 39 bits
2141 01:51:55.166329 CPU physical address size: 39 bits
2142 01:51:55.172898 BS: BS_PAYLOAD_LOAD entry times (exec / console): 109 / 6 ms
2143 01:51:55.182746 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2144 01:51:55.186438 Checking segment from ROM address 0xffc02b38
2145 01:51:55.189309 Checking segment from ROM address 0xffc02b54
2146 01:51:55.196613 Loading segment from ROM address 0xffc02b38
2147 01:51:55.196698 code (compression=0)
2148 01:51:55.206067 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2149 01:51:55.216309 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2150 01:51:55.216394 it's not compressed!
2151 01:51:55.356201 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2152 01:51:55.362548 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2153 01:51:55.369565 Loading segment from ROM address 0xffc02b54
2154 01:51:55.373103 Entry Point 0x30000000
2155 01:51:55.373187 Loaded segments
2156 01:51:55.379240 BS: BS_PAYLOAD_LOAD run times (exec / console): 136 / 63 ms
2157 01:51:55.424372 Finalizing chipset.
2158 01:51:55.427900 Finalizing SMM.
2159 01:51:55.427986 APMC done.
2160 01:51:55.434387 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2161 01:51:55.437879 mp_park_aps done after 0 msecs.
2162 01:51:55.441101 Jumping to boot code at 0x30000000(0x76b25000)
2163 01:51:55.450870 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2164 01:51:55.450957
2165 01:51:55.451024
2166 01:51:55.451085
2167 01:51:55.454335 Starting depthcharge on Voema...
2168 01:51:55.454421
2169 01:51:55.454791 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2170 01:51:55.454893 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2171 01:51:55.454982 Setting prompt string to ['volteer:']
2172 01:51:55.455064 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2173 01:51:55.464573 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2174 01:51:55.464662
2175 01:51:55.470763 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2176 01:51:55.470862
2177 01:51:55.477754 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2178 01:51:55.477921
2179 01:51:55.481090 Failed to find eMMC card reader
2180 01:51:55.481180
2181 01:51:55.481249 Wipe memory regions:
2182 01:51:55.484116
2183 01:51:55.487181 [0x00000000001000, 0x000000000a0000)
2184 01:51:55.487269
2185 01:51:55.490764 [0x00000000100000, 0x00000030000000)
2186 01:51:55.490856
2187 01:51:55.528026 [0x00000032662db0, 0x000000769ef000)
2188 01:51:55.528449
2189 01:51:55.579389 [0x00000100000000, 0x00000480400000)
2190 01:51:55.579852
2191 01:51:56.221893 ec_init: CrosEC protocol v3 supported (256, 256)
2192 01:51:56.222050
2193 01:51:56.654514 R8152: Initializing
2194 01:51:56.655077
2195 01:51:56.657951 Version 6 (ocp_data = 5c30)
2196 01:51:56.658395
2197 01:51:56.660908 R8152: Done initializing
2198 01:51:56.661374
2199 01:51:56.664383 Adding net device
2200 01:51:56.664824
2201 01:51:56.969473 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2202 01:51:56.970014
2203 01:51:56.970371
2204 01:51:56.970699
2205 01:51:56.972776 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2207 01:51:57.074552 volteer: tftpboot 192.168.201.1 7989952/tftp-deploy-qv11ytw9/kernel/bzImage 7989952/tftp-deploy-qv11ytw9/kernel/cmdline 7989952/tftp-deploy-qv11ytw9/ramdisk/ramdisk.cpio.gz
2208 01:51:57.075229 Setting prompt string to 'Starting kernel'
2209 01:51:57.075688 Setting prompt string to ['Starting kernel']
2210 01:51:57.076048 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2211 01:51:57.076451 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2212 01:51:57.080050 tftpboot 192.168.201.1 7989952/tftp-deploy-qv11ytw9/kernel/bzImoy-qv11ytw9/kernel/cmdline 7989952/tftp-deploy-qv11ytw9/ramdisk/ramdisk.cpio.gz
2213 01:51:57.080514
2214 01:51:57.080864 Waiting for link
2215 01:51:57.081188
2216 01:51:57.284354 done.
2217 01:51:57.284888
2218 01:51:57.285242 MAC: 00:24:32:30:7d:ab
2219 01:51:57.285753
2220 01:51:57.287280 Sending DHCP discover... done.
2221 01:51:57.287722
2222 01:51:57.290602 Waiting for reply... done.
2223 01:51:57.291045
2224 01:51:57.294144 Sending DHCP request... done.
2225 01:51:57.294586
2226 01:51:57.297020 Waiting for reply... done.
2227 01:51:57.297511
2228 01:51:57.300750 My ip is 192.168.201.20
2229 01:51:57.301291
2230 01:51:57.303795 The DHCP server ip is 192.168.201.1
2231 01:51:57.304345
2232 01:51:57.307276 TFTP server IP predefined by user: 192.168.201.1
2233 01:51:57.307821
2234 01:51:57.314046 Bootfile predefined by user: 7989952/tftp-deploy-qv11ytw9/kernel/bzImage
2235 01:51:57.317045
2236 01:51:57.320360 Sending tftp read request... done.
2237 01:51:57.320807
2238 01:51:57.325040 Waiting for the transfer...
2239 01:51:57.325533
2240 01:51:57.993961 00000000 ################################################################
2241 01:51:57.994490
2242 01:51:58.688613 00080000 ################################################################
2243 01:51:58.689146
2244 01:51:59.373974 00100000 ################################################################
2245 01:51:59.374507
2246 01:52:00.042473 00180000 ################################################################
2247 01:52:00.043012
2248 01:52:00.735297 00200000 ################################################################
2249 01:52:00.735865
2250 01:52:01.387909 00280000 ################################################################
2251 01:52:01.388070
2252 01:52:02.037671 00300000 ################################################################
2253 01:52:02.038324
2254 01:52:02.708869 00380000 ################################################################
2255 01:52:02.709440
2256 01:52:03.388861 00400000 ################################################################
2257 01:52:03.389400
2258 01:52:04.052978 00480000 ################################################################
2259 01:52:04.053540
2260 01:52:04.722432 00500000 ################################################################
2261 01:52:04.722942
2262 01:52:05.391263 00580000 ################################################################
2263 01:52:05.391882
2264 01:52:06.048316 00600000 ################################################################
2265 01:52:06.048851
2266 01:52:06.676301 00680000 ################################################################
2267 01:52:06.676440
2268 01:52:07.237174 00700000 ################################################################
2269 01:52:07.237310
2270 01:52:07.828873 00780000 ################################################################
2271 01:52:07.829011
2272 01:52:08.444998 00800000 ################################################################
2273 01:52:08.445707
2274 01:52:08.888829 00880000 ############################################## done.
2275 01:52:08.888968
2276 01:52:08.892505 The bootfile was 9281536 bytes long.
2277 01:52:08.892591
2278 01:52:08.895510 Sending tftp read request... done.
2279 01:52:08.895595
2280 01:52:08.898725 Waiting for the transfer...
2281 01:52:08.898810
2282 01:52:09.452180 00000000 ################################################################
2283 01:52:09.452319
2284 01:52:10.005801 00080000 ################################################################
2285 01:52:10.005934
2286 01:52:10.554352 00100000 ################################################################
2287 01:52:10.554491
2288 01:52:11.114510 00180000 ################################################################
2289 01:52:11.114646
2290 01:52:11.666323 00200000 ################################################################
2291 01:52:11.666471
2292 01:52:12.217533 00280000 ################################################################
2293 01:52:12.217670
2294 01:52:12.768054 00300000 ################################################################
2295 01:52:12.768195
2296 01:52:13.344807 00380000 ################################################################
2297 01:52:13.344951
2298 01:52:13.910954 00400000 ################################################################
2299 01:52:13.911094
2300 01:52:14.445154 00480000 ################################################################
2301 01:52:14.445313
2302 01:52:14.725812 00500000 ################################## done.
2303 01:52:14.725952
2304 01:52:14.729177 Sending tftp read request... done.
2305 01:52:14.729255
2306 01:52:14.732374 Waiting for the transfer...
2307 01:52:14.732450
2308 01:52:14.732513 00000000 # done.
2309 01:52:14.732577
2310 01:52:14.742351 Command line loaded dynamically from TFTP file: 7989952/tftp-deploy-qv11ytw9/kernel/cmdline
2311 01:52:14.742430
2312 01:52:14.765074 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/7989952/extract-nfsrootfs-6n9pq8rw,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2313 01:52:14.765166
2314 01:52:14.771970 Shutting down all USB controllers.
2315 01:52:14.772048
2316 01:52:14.772111 Removing current net device
2317 01:52:14.772174
2318 01:52:14.774973 Finalizing coreboot
2319 01:52:14.775046
2320 01:52:14.781646 Exiting depthcharge with code 4 at timestamp: 27892244
2321 01:52:14.781727
2322 01:52:14.781791
2323 01:52:14.781851 Starting kernel ...
2324 01:52:14.781917
2325 01:52:14.781974
2326 01:52:14.782336 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2327 01:52:14.782433 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2328 01:52:14.782510 Setting prompt string to ['Linux version [0-9]']
2329 01:52:14.782580 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2330 01:52:14.782654 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2331 01:52:14.784954
2332 01:52:14.785037
2334 01:56:39.782737 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2336 01:56:39.782947 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2338 01:56:39.783109 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2341 01:56:39.783381 end: 2 depthcharge-action (duration 00:05:00) [common]
2343 01:56:39.783613 Cleaning after the job
2344 01:56:39.783699 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7989952/tftp-deploy-qv11ytw9/ramdisk
2345 01:56:39.784176 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7989952/tftp-deploy-qv11ytw9/kernel
2346 01:56:39.784843 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7989952/tftp-deploy-qv11ytw9/nfsrootfs
2347 01:56:39.815845 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/7989952/tftp-deploy-qv11ytw9/modules
2348 01:56:39.816152 start: 5.1 power-off (timeout 00:00:30) [common]
2349 01:56:39.816319 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-13' '--port=1' '--command=off'
2350 01:56:39.835894 >> Command sent successfully.
2351 01:56:39.837976 Returned 0 in 0 seconds
2352 01:56:39.938771 end: 5.1 power-off (duration 00:00:00) [common]
2354 01:56:39.939090 start: 5.2 read-feedback (timeout 00:10:00) [common]
2355 01:56:39.939334 Listened to connection for namespace 'common' for up to 1s
2356 01:56:40.941427 Finalising connection for namespace 'common'
2357 01:56:40.941607 Disconnecting from shell: Finalise
2358 01:56:41.042371 end: 5.2 read-feedback (duration 00:00:01) [common]
2359 01:56:41.042539 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/7989952
2360 01:56:41.133187 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/7989952
2361 01:56:41.134884 JobError: Your job cannot terminate cleanly.