Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 20:54:28.673536 lava-dispatcher, installed at version: 2022.11
2 20:54:28.673744 start: 0 validate
3 20:54:28.673895 Start time: 2023-01-18 20:54:28.673887+00:00 (UTC)
4 20:54:28.674040 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:54:28.674182 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230114.0%2Fx86%2Frootfs.cpio.gz exists
6 20:54:28.960682 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:54:28.961391 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.269-cip88-rt28%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:54:29.250105 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:54:29.250810 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.269-cip88-rt28%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 20:54:29.550989 validate duration: 0.88
12 20:54:29.552368 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 20:54:29.552967 start: 1.1 download-retry (timeout 00:10:00) [common]
14 20:54:29.553458 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 20:54:29.553988 Not decompressing ramdisk as can be used compressed.
16 20:54:29.554437 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230114.0/x86/rootfs.cpio.gz
17 20:54:29.554867 saving as /var/lib/lava/dispatcher/tmp/8785133/tftp-deploy-jpdylcxf/ramdisk/rootfs.cpio.gz
18 20:54:29.555218 total size: 8423555 (8MB)
19 20:54:29.560420 progress 0% (0MB)
20 20:54:29.570711 progress 5% (0MB)
21 20:54:29.576847 progress 10% (0MB)
22 20:54:29.581805 progress 15% (1MB)
23 20:54:29.585829 progress 20% (1MB)
24 20:54:29.589383 progress 25% (2MB)
25 20:54:29.592628 progress 30% (2MB)
26 20:54:29.595334 progress 35% (2MB)
27 20:54:29.598158 progress 40% (3MB)
28 20:54:29.600802 progress 45% (3MB)
29 20:54:29.603142 progress 50% (4MB)
30 20:54:29.605462 progress 55% (4MB)
31 20:54:29.607764 progress 60% (4MB)
32 20:54:29.610091 progress 65% (5MB)
33 20:54:29.612234 progress 70% (5MB)
34 20:54:29.614520 progress 75% (6MB)
35 20:54:29.616836 progress 80% (6MB)
36 20:54:29.619162 progress 85% (6MB)
37 20:54:29.621505 progress 90% (7MB)
38 20:54:29.623822 progress 95% (7MB)
39 20:54:29.626149 progress 100% (8MB)
40 20:54:29.626340 8MB downloaded in 0.07s (112.95MB/s)
41 20:54:29.626509 end: 1.1.1 http-download (duration 00:00:00) [common]
43 20:54:29.626793 end: 1.1 download-retry (duration 00:00:00) [common]
44 20:54:29.626894 start: 1.2 download-retry (timeout 00:10:00) [common]
45 20:54:29.626993 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 20:54:29.627112 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.269-cip88-rt28/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 20:54:29.627190 saving as /var/lib/lava/dispatcher/tmp/8785133/tftp-deploy-jpdylcxf/kernel/bzImage
48 20:54:29.627261 total size: 9711616 (9MB)
49 20:54:29.627331 No compression specified
50 20:54:29.628502 progress 0% (0MB)
51 20:54:29.631155 progress 5% (0MB)
52 20:54:29.633930 progress 10% (0MB)
53 20:54:29.636674 progress 15% (1MB)
54 20:54:29.639391 progress 20% (1MB)
55 20:54:29.642098 progress 25% (2MB)
56 20:54:29.644605 progress 30% (2MB)
57 20:54:29.647307 progress 35% (3MB)
58 20:54:29.650039 progress 40% (3MB)
59 20:54:29.652753 progress 45% (4MB)
60 20:54:29.655448 progress 50% (4MB)
61 20:54:29.658136 progress 55% (5MB)
62 20:54:29.660619 progress 60% (5MB)
63 20:54:29.663251 progress 65% (6MB)
64 20:54:29.665881 progress 70% (6MB)
65 20:54:29.668599 progress 75% (6MB)
66 20:54:29.671282 progress 80% (7MB)
67 20:54:29.673773 progress 85% (7MB)
68 20:54:29.676462 progress 90% (8MB)
69 20:54:29.679145 progress 95% (8MB)
70 20:54:29.681839 progress 100% (9MB)
71 20:54:29.682074 9MB downloaded in 0.05s (168.99MB/s)
72 20:54:29.682247 end: 1.2.1 http-download (duration 00:00:00) [common]
74 20:54:29.682518 end: 1.2 download-retry (duration 00:00:00) [common]
75 20:54:29.682622 start: 1.3 download-retry (timeout 00:10:00) [common]
76 20:54:29.682722 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 20:54:29.682843 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.269-cip88-rt28/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 20:54:29.682922 saving as /var/lib/lava/dispatcher/tmp/8785133/tftp-deploy-jpdylcxf/modules/modules.tar
79 20:54:29.682993 total size: 64664 (0MB)
80 20:54:29.683064 Using unxz to decompress xz
81 20:54:29.686603 progress 50% (0MB)
82 20:54:29.687050 progress 100% (0MB)
83 20:54:29.691842 0MB downloaded in 0.01s (6.98MB/s)
84 20:54:29.692121 end: 1.3.1 http-download (duration 00:00:00) [common]
86 20:54:29.692421 end: 1.3 download-retry (duration 00:00:00) [common]
87 20:54:29.692539 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 20:54:29.692650 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 20:54:29.692747 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 20:54:29.692849 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 20:54:29.693049 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz
92 20:54:29.693177 makedir: /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin
93 20:54:29.693274 makedir: /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/tests
94 20:54:29.693366 makedir: /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/results
95 20:54:29.693489 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-add-keys
96 20:54:29.693645 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-add-sources
97 20:54:29.693787 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-background-process-start
98 20:54:29.693937 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-background-process-stop
99 20:54:29.694072 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-common-functions
100 20:54:29.694199 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-echo-ipv4
101 20:54:29.694333 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-install-packages
102 20:54:29.694465 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-installed-packages
103 20:54:29.694591 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-os-build
104 20:54:29.694716 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-probe-channel
105 20:54:29.694851 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-probe-ip
106 20:54:29.694982 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-target-ip
107 20:54:29.695116 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-target-mac
108 20:54:29.695252 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-target-storage
109 20:54:29.695390 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-test-case
110 20:54:29.695534 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-test-event
111 20:54:29.695667 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-test-feedback
112 20:54:29.695797 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-test-raise
113 20:54:29.695929 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-test-reference
114 20:54:29.696068 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-test-runner
115 20:54:29.696195 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-test-set
116 20:54:29.696326 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-test-shell
117 20:54:29.696455 Updating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-install-packages (oe)
118 20:54:29.696590 Updating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/bin/lava-installed-packages (oe)
119 20:54:29.696705 Creating /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/environment
120 20:54:29.696806 LAVA metadata
121 20:54:29.696895 - LAVA_JOB_ID=8785133
122 20:54:29.696974 - LAVA_DISPATCHER_IP=192.168.201.1
123 20:54:29.697094 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 20:54:29.697171 skipped lava-vland-overlay
125 20:54:29.697263 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 20:54:29.697362 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 20:54:29.697439 skipped lava-multinode-overlay
128 20:54:29.697525 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 20:54:29.697624 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 20:54:29.697714 Loading test definitions
131 20:54:29.697839 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 20:54:29.697930 Using /lava-8785133 at stage 0
133 20:54:29.698242 uuid=8785133_1.4.2.3.1 testdef=None
134 20:54:29.698349 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 20:54:29.698449 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 20:54:29.699015 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 20:54:29.699295 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 20:54:29.699963 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 20:54:29.700263 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 20:54:29.700902 runner path: /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/0/tests/0_dmesg test_uuid 8785133_1.4.2.3.1
143 20:54:29.701077 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 20:54:29.701355 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 20:54:29.701441 Using /lava-8785133 at stage 1
147 20:54:29.701717 uuid=8785133_1.4.2.3.5 testdef=None
148 20:54:29.701822 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 20:54:29.701929 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 20:54:29.702441 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 20:54:29.702719 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 20:54:29.703378 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 20:54:29.703662 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 20:54:29.704328 runner path: /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/1/tests/1_bootrr test_uuid 8785133_1.4.2.3.5
157 20:54:29.704497 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 20:54:29.704748 Creating lava-test-runner.conf files
160 20:54:29.704837 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/0 for stage 0
161 20:54:29.704936 - 0_dmesg
162 20:54:29.705021 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8785133/lava-overlay-9wewxqqz/lava-8785133/1 for stage 1
163 20:54:29.705119 - 1_bootrr
164 20:54:29.705225 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 20:54:29.705330 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 20:54:29.712334 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 20:54:29.712463 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 20:54:29.712565 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 20:54:29.712664 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 20:54:29.712765 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 20:54:29.920208 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 20:54:29.920584 start: 1.4.4 extract-modules (timeout 00:10:00) [common]
173 20:54:29.920719 extracting modules file /var/lib/lava/dispatcher/tmp/8785133/tftp-deploy-jpdylcxf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8785133/extract-overlay-ramdisk-psu82abb/ramdisk
174 20:54:29.925379 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 20:54:29.925510 start: 1.4.5 apply-overlay-tftp (timeout 00:10:00) [common]
176 20:54:29.925617 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8785133/compress-overlay-b6pelohg/overlay-1.4.2.4.tar.gz to ramdisk
177 20:54:29.925702 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8785133/compress-overlay-b6pelohg/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8785133/extract-overlay-ramdisk-psu82abb/ramdisk
178 20:54:29.930126 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 20:54:29.930261 start: 1.4.6 configure-preseed-file (timeout 00:10:00) [common]
180 20:54:29.930371 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 20:54:29.930491 start: 1.4.7 compress-ramdisk (timeout 00:10:00) [common]
182 20:54:29.930586 Building ramdisk /var/lib/lava/dispatcher/tmp/8785133/extract-overlay-ramdisk-psu82abb/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8785133/extract-overlay-ramdisk-psu82abb/ramdisk
183 20:54:30.000574 >> 48351 blocks
184 20:54:30.854212 rename /var/lib/lava/dispatcher/tmp/8785133/extract-overlay-ramdisk-psu82abb/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8785133/tftp-deploy-jpdylcxf/ramdisk/ramdisk.cpio.gz
185 20:54:30.854654 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 20:54:30.854805 start: 1.4.8 prepare-kernel (timeout 00:09:59) [common]
187 20:54:30.854925 start: 1.4.8.1 prepare-fit (timeout 00:09:59) [common]
188 20:54:30.855037 No mkimage arch provided, not using FIT.
189 20:54:30.855148 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 20:54:30.855258 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 20:54:30.855389 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 20:54:30.855505 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:59) [common]
193 20:54:30.855594 No LXC device requested
194 20:54:30.855687 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 20:54:30.855804 start: 1.6 deploy-device-env (timeout 00:09:59) [common]
196 20:54:30.855903 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 20:54:30.855993 Checking files for TFTP limit of 4294967296 bytes.
198 20:54:30.856443 end: 1 tftp-deploy (duration 00:00:01) [common]
199 20:54:30.856566 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 20:54:30.856675 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 20:54:30.856824 substitutions:
202 20:54:30.856905 - {DTB}: None
203 20:54:30.856986 - {INITRD}: 8785133/tftp-deploy-jpdylcxf/ramdisk/ramdisk.cpio.gz
204 20:54:30.857058 - {KERNEL}: 8785133/tftp-deploy-jpdylcxf/kernel/bzImage
205 20:54:30.857125 - {LAVA_MAC}: None
206 20:54:30.857192 - {PRESEED_CONFIG}: None
207 20:54:30.857264 - {PRESEED_LOCAL}: None
208 20:54:30.857334 - {RAMDISK}: 8785133/tftp-deploy-jpdylcxf/ramdisk/ramdisk.cpio.gz
209 20:54:30.857405 - {ROOT_PART}: None
210 20:54:30.857472 - {ROOT}: None
211 20:54:30.857537 - {SERVER_IP}: 192.168.201.1
212 20:54:30.857602 - {TEE}: None
213 20:54:30.857666 Parsed boot commands:
214 20:54:30.857733 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 20:54:30.857918 Parsed boot commands: tftpboot 192.168.201.1 8785133/tftp-deploy-jpdylcxf/kernel/bzImage 8785133/tftp-deploy-jpdylcxf/kernel/cmdline 8785133/tftp-deploy-jpdylcxf/ramdisk/ramdisk.cpio.gz
216 20:54:30.858027 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 20:54:30.858137 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 20:54:30.858263 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 20:54:30.858377 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 20:54:30.858463 Not connected, no need to disconnect.
221 20:54:30.858552 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 20:54:30.858648 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 20:54:30.858736 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
224 20:54:30.861655 Setting prompt string to ['lava-test: # ']
225 20:54:30.861982 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 20:54:30.862103 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 20:54:30.862217 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 20:54:30.862334 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 20:54:30.862542 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
230 20:54:30.884344 >> Command sent successfully.
231 20:54:30.886516 Returned 0 in 0 seconds
232 20:54:30.987611 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 20:54:30.990191 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 20:54:30.990663 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 20:54:30.991068 Setting prompt string to 'Starting depthcharge on Helios...'
237 20:54:30.991393 Changing prompt to 'Starting depthcharge on Helios...'
238 20:54:30.991743 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
239 20:54:30.993226 [Enter `^Ec?' for help]
240 20:54:37.659388
241 20:54:37.660023
242 20:54:37.669548 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
243 20:54:37.672499 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
244 20:54:37.679232 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
245 20:54:37.682308 CPU: AES supported, TXT NOT supported, VT supported
246 20:54:37.689667 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
247 20:54:37.692737 PCH: device id 0284 (rev 00) is Cometlake-U Premium
248 20:54:37.699367 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
249 20:54:37.702463 VBOOT: Loading verstage.
250 20:54:37.706260 FMAP: Found "FLASH" version 1.1 at 0xc04000.
251 20:54:37.712478 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
252 20:54:37.716098 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
253 20:54:37.719054 CBFS @ c08000 size 3f8000
254 20:54:37.725969 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
255 20:54:37.729552 CBFS: Locating 'fallback/verstage'
256 20:54:37.732531 CBFS: Found @ offset 10fb80 size 1072c
257 20:54:37.732975
258 20:54:37.733418
259 20:54:37.745727 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
260 20:54:37.759475 Probing TPM: . done!
261 20:54:37.762633 TPM ready after 0 ms
262 20:54:37.766256 Connected to device vid:did:rid of 1ae0:0028:00
263 20:54:37.776311 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
264 20:54:37.779920 Initialized TPM device CR50 revision 0
265 20:54:37.822482 tlcl_send_startup: Startup return code is 0
266 20:54:37.822991 TPM: setup succeeded
267 20:54:37.835365 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
268 20:54:37.838904 Chrome EC: UHEPI supported
269 20:54:37.842519 Phase 1
270 20:54:37.845594 FMAP: area GBB found @ c05000 (12288 bytes)
271 20:54:37.852286 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
272 20:54:37.852727 Phase 2
273 20:54:37.855358 Phase 3
274 20:54:37.858954 FMAP: area GBB found @ c05000 (12288 bytes)
275 20:54:37.865700 VB2:vb2_report_dev_firmware() This is developer signed firmware
276 20:54:37.871808 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
277 20:54:37.875281 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
278 20:54:37.881886 VB2:vb2_verify_keyblock() Checking keyblock signature...
279 20:54:37.897739 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
280 20:54:37.900780 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
281 20:54:37.907486 VB2:vb2_verify_fw_preamble() Verifying preamble.
282 20:54:37.911931 Phase 4
283 20:54:37.915007 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
284 20:54:37.921867 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
285 20:54:38.100773 VB2:vb2_rsa_verify_digest() Digest check failed!
286 20:54:38.104633 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
287 20:54:38.107614
288 20:54:38.107998 Saving nvdata
289 20:54:38.110735 Reboot requested (10020007)
290 20:54:38.114384 board_reset() called!
291 20:54:38.114857 full_reset() called!
292 20:54:42.624984
293 20:54:42.625130
294 20:54:42.635065 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
295 20:54:42.637995 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
296 20:54:42.644752 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
297 20:54:42.647916 CPU: AES supported, TXT NOT supported, VT supported
298 20:54:42.655050 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
299 20:54:42.658073 PCH: device id 0284 (rev 00) is Cometlake-U Premium
300 20:54:42.664852 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
301 20:54:42.667725 VBOOT: Loading verstage.
302 20:54:42.671418 FMAP: Found "FLASH" version 1.1 at 0xc04000.
303 20:54:42.678196 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
304 20:54:42.684296 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
305 20:54:42.684386 CBFS @ c08000 size 3f8000
306 20:54:42.691192 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
307 20:54:42.694738 CBFS: Locating 'fallback/verstage'
308 20:54:42.697790 CBFS: Found @ offset 10fb80 size 1072c
309 20:54:42.702121
310 20:54:42.702216
311 20:54:42.711976 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
312 20:54:42.725993 Probing TPM: . done!
313 20:54:42.729729 TPM ready after 0 ms
314 20:54:42.732606 Connected to device vid:did:rid of 1ae0:0028:00
315 20:54:42.742886 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
316 20:54:42.746682 Initialized TPM device CR50 revision 0
317 20:54:42.788675 tlcl_send_startup: Startup return code is 0
318 20:54:42.788788 TPM: setup succeeded
319 20:54:42.801475 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
320 20:54:42.805107 Chrome EC: UHEPI supported
321 20:54:42.808748 Phase 1
322 20:54:42.811935 FMAP: area GBB found @ c05000 (12288 bytes)
323 20:54:42.818554 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
324 20:54:42.825401 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
325 20:54:42.828388 Recovery requested (1009000e)
326 20:54:42.834501 Saving nvdata
327 20:54:42.840327 tlcl_extend: response is 0
328 20:54:42.849368 tlcl_extend: response is 0
329 20:54:42.856126 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
330 20:54:42.859592 CBFS @ c08000 size 3f8000
331 20:54:42.866377 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
332 20:54:42.869515 CBFS: Locating 'fallback/romstage'
333 20:54:42.873192 CBFS: Found @ offset 80 size 145fc
334 20:54:42.876279 Accumulated console time in verstage 98 ms
335 20:54:42.876386
336 20:54:42.876485
337 20:54:42.889321 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
338 20:54:42.896147 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 20:54:42.899272 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 20:54:42.902284 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
341 20:54:42.909091 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
342 20:54:42.912865 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
343 20:54:42.916041 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
344 20:54:42.919094 TCO_STS: 0000 0000
345 20:54:42.922829 GEN_PMCON: e0015238 00000200
346 20:54:42.926144 GBLRST_CAUSE: 00000000 00000000
347 20:54:42.926263 prev_sleep_state 5
348 20:54:42.929095 Boot Count incremented to 42307
349 20:54:42.936023 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
350 20:54:42.939588 CBFS @ c08000 size 3f8000
351 20:54:42.945793 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
352 20:54:42.945976 CBFS: Locating 'fspm.bin'
353 20:54:42.949455 CBFS: Found @ offset 5ffc0 size 71000
354 20:54:42.952287
355 20:54:42.955859 Chrome EC: UHEPI supported
356 20:54:42.962453 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
357 20:54:42.966101 Probing TPM: done!
358 20:54:42.972719 Connected to device vid:did:rid of 1ae0:0028:00
359 20:54:42.982528 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
360 20:54:42.988863 Initialized TPM device CR50 revision 0
361 20:54:42.997538 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
362 20:54:43.004387 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
363 20:54:43.007356 MRC cache found, size 1948
364 20:54:43.010835 bootmode is set to: 2
365 20:54:43.014549 PRMRR disabled by config.
366 20:54:43.014633 SPD INDEX = 1
367 20:54:43.020717 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 20:54:43.023883 CBFS @ c08000 size 3f8000
369 20:54:43.030825 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 20:54:43.030922 CBFS: Locating 'spd.bin'
371 20:54:43.034644 CBFS: Found @ offset 5fb80 size 400
372 20:54:43.037572 SPD: module type is LPDDR3
373 20:54:43.040552 SPD: module part is
374 20:54:43.047394 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
375 20:54:43.050550 SPD: device width 4 bits, bus width 8 bits
376 20:54:43.053768 SPD: module size is 4096 MB (per channel)
377 20:54:43.057475 memory slot: 0 configuration done.
378 20:54:43.060534 memory slot: 2 configuration done.
379 20:54:43.111843 CBMEM:
380 20:54:43.115420 IMD: root @ 99fff000 254 entries.
381 20:54:43.118504 IMD: root @ 99ffec00 62 entries.
382 20:54:43.122266 External stage cache:
383 20:54:43.125226 IMD: root @ 9abff000 254 entries.
384 20:54:43.128299 IMD: root @ 9abfec00 62 entries.
385 20:54:43.131952 Chrome EC: clear events_b mask to 0x0000000020004000
386 20:54:43.134958
387 20:54:43.147912 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
388 20:54:43.161413 tlcl_write: response is 0
389 20:54:43.170012 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
390 20:54:43.176709 MRC: TPM MRC hash updated successfully.
391 20:54:43.177290 2 DIMMs found
392 20:54:43.180450 SMM Memory Map
393 20:54:43.183443 SMRAM : 0x9a000000 0x1000000
394 20:54:43.186435 Subregion 0: 0x9a000000 0xa00000
395 20:54:43.190034 Subregion 1: 0x9aa00000 0x200000
396 20:54:43.193298 Subregion 2: 0x9ac00000 0x400000
397 20:54:43.196943 top_of_ram = 0x9a000000
398 20:54:43.200153 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
399 20:54:43.206751 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
400 20:54:43.209817 MTRR Range: Start=ff000000 End=0 (Size 1000000)
401 20:54:43.216561 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
402 20:54:43.219705 CBFS @ c08000 size 3f8000
403 20:54:43.223405 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
404 20:54:43.226434 CBFS: Locating 'fallback/postcar'
405 20:54:43.229549 CBFS: Found @ offset 107000 size 4b44
406 20:54:43.233187
407 20:54:43.236279 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
408 20:54:43.248479 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
409 20:54:43.252372 Processing 180 relocs. Offset value of 0x97c0c000
410 20:54:43.260451 Accumulated console time in romstage 286 ms
411 20:54:43.260888
412 20:54:43.261236
413 20:54:43.269920 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
414 20:54:43.276699 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
415 20:54:43.279658 CBFS @ c08000 size 3f8000
416 20:54:43.283206 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
417 20:54:43.286506
418 20:54:43.289564 CBFS: Locating 'fallback/ramstage'
419 20:54:43.293262 CBFS: Found @ offset 43380 size 1b9e8
420 20:54:43.299357 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
421 20:54:43.331768 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
422 20:54:43.335541 Processing 3976 relocs. Offset value of 0x98db0000
423 20:54:43.341785 Accumulated console time in postcar 52 ms
424 20:54:43.341939
425 20:54:43.342064
426 20:54:43.351599 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
427 20:54:43.358221 FMAP: area RO_VPD found @ c00000 (16384 bytes)
428 20:54:43.361811 WARNING: RO_VPD is uninitialized or empty.
429 20:54:43.365346 FMAP: area RW_VPD found @ af8000 (8192 bytes)
430 20:54:43.371976 FMAP: area RW_VPD found @ af8000 (8192 bytes)
431 20:54:43.372524 Normal boot.
432 20:54:43.378446 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
433 20:54:43.381461 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
434 20:54:43.385074 CBFS @ c08000 size 3f8000
435 20:54:43.391929 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
436 20:54:43.395056 CBFS: Locating 'cpu_microcode_blob.bin'
437 20:54:43.398263 CBFS: Found @ offset 14700 size 2ec00
438 20:54:43.401911 microcode: sig=0x806ec pf=0x4 revision=0xc9
439 20:54:43.404961 Skip microcode update
440 20:54:43.408273 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 20:54:43.411814
442 20:54:43.412379 CBFS @ c08000 size 3f8000
443 20:54:43.417915 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 20:54:43.421600 CBFS: Locating 'fsps.bin'
445 20:54:43.424687 CBFS: Found @ offset d1fc0 size 35000
446 20:54:43.450388 Detected 4 core, 8 thread CPU.
447 20:54:43.453496 Setting up SMI for CPU
448 20:54:43.457122 IED base = 0x9ac00000
449 20:54:43.457620 IED size = 0x00400000
450 20:54:43.460089 Will perform SMM setup.
451 20:54:43.466784 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
452 20:54:43.473734 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
453 20:54:43.476698 Processing 16 relocs. Offset value of 0x00030000
454 20:54:43.480357 Attempting to start 7 APs
455 20:54:43.483909 Waiting for 10ms after sending INIT.
456 20:54:43.499906 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
457 20:54:43.500531 done.
458 20:54:43.503591 AP: slot 7 apic_id 2.
459 20:54:43.506791 AP: slot 6 apic_id 3.
460 20:54:43.509727 Waiting for 2nd SIPI to complete...done.
461 20:54:43.513717 AP: slot 4 apic_id 6.
462 20:54:43.514230 AP: slot 5 apic_id 7.
463 20:54:43.516831 AP: slot 1 apic_id 5.
464 20:54:43.519913 AP: slot 2 apic_id 4.
465 20:54:43.526603 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
466 20:54:43.533368 Processing 13 relocs. Offset value of 0x00038000
467 20:54:43.536521 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
468 20:54:43.539542
469 20:54:43.543227 Installing SMM handler to 0x9a000000
470 20:54:43.549387 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
471 20:54:43.556129 Processing 658 relocs. Offset value of 0x9a010000
472 20:54:43.562850 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
473 20:54:43.566330 Processing 13 relocs. Offset value of 0x9a008000
474 20:54:43.573062 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
475 20:54:43.579238 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
476 20:54:43.585856 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
477 20:54:43.589506 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
478 20:54:43.595796 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
479 20:54:43.602564 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
480 20:54:43.605852 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
481 20:54:43.609077
482 20:54:43.612552 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
483 20:54:43.616141 Clearing SMI status registers
484 20:54:43.619303 SMI_STS: PM1
485 20:54:43.619749 PM1_STS: PWRBTN
486 20:54:43.622888 TCO_STS: SECOND_TO
487 20:54:43.625986 New SMBASE 0x9a000000
488 20:54:43.629191 In relocation handler: CPU 0
489 20:54:43.632779 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
490 20:54:43.635832 Writing SMRR. base = 0x9a000006, mask=0xff000800
491 20:54:43.639594 Relocation complete.
492 20:54:43.642546 New SMBASE 0x99fff400
493 20:54:43.643012 In relocation handler: CPU 3
494 20:54:43.646217
495 20:54:43.649463 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
496 20:54:43.652653 Writing SMRR. base = 0x9a000006, mask=0xff000800
497 20:54:43.655815 Relocation complete.
498 20:54:43.659432 New SMBASE 0x99ffec00
499 20:54:43.659893 In relocation handler: CPU 5
500 20:54:43.666168 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
501 20:54:43.669154 Writing SMRR. base = 0x9a000006, mask=0xff000800
502 20:54:43.672777 Relocation complete.
503 20:54:43.673250 New SMBASE 0x99fff000
504 20:54:43.675908 In relocation handler: CPU 4
505 20:54:43.682555 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
506 20:54:43.686159 Writing SMRR. base = 0x9a000006, mask=0xff000800
507 20:54:43.689356 Relocation complete.
508 20:54:43.689816 New SMBASE 0x99fffc00
509 20:54:43.692389 In relocation handler: CPU 1
510 20:54:43.699117 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
511 20:54:43.702723 Writing SMRR. base = 0x9a000006, mask=0xff000800
512 20:54:43.705886 Relocation complete.
513 20:54:43.706381 New SMBASE 0x99fff800
514 20:54:43.709219 In relocation handler: CPU 2
515 20:54:43.712405 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
516 20:54:43.719204 Writing SMRR. base = 0x9a000006, mask=0xff000800
517 20:54:43.722269 Relocation complete.
518 20:54:43.722793 New SMBASE 0x99ffe400
519 20:54:43.725922 In relocation handler: CPU 7
520 20:54:43.728980 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
521 20:54:43.735640 Writing SMRR. base = 0x9a000006, mask=0xff000800
522 20:54:43.739469 Relocation complete.
523 20:54:43.739968 New SMBASE 0x99ffe800
524 20:54:43.742501 In relocation handler: CPU 6
525 20:54:43.745485 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
526 20:54:43.752253 Writing SMRR. base = 0x9a000006, mask=0xff000800
527 20:54:43.752851 Relocation complete.
528 20:54:43.755821 Initializing CPU #0
529 20:54:43.758921 CPU: vendor Intel device 806ec
530 20:54:43.762134 CPU: family 06, model 8e, stepping 0c
531 20:54:43.765208 Clearing out pending MCEs
532 20:54:43.768858 Setting up local APIC...
533 20:54:43.769399 apic_id: 0x00 done.
534 20:54:43.771881 Turbo is available but hidden
535 20:54:43.775641 Turbo is available and visible
536 20:54:43.778589 VMX status: enabled
537 20:54:43.781689 IA32_FEATURE_CONTROL status: locked
538 20:54:43.785356 Skip microcode update
539 20:54:43.785827 CPU #0 initialized
540 20:54:43.788567 Initializing CPU #3
541 20:54:43.792149 Initializing CPU #4
542 20:54:43.792639 Initializing CPU #5
543 20:54:43.795339 CPU: vendor Intel device 806ec
544 20:54:43.798995 CPU: family 06, model 8e, stepping 0c
545 20:54:43.802270 CPU: vendor Intel device 806ec
546 20:54:43.805410 CPU: family 06, model 8e, stepping 0c
547 20:54:43.808539 Clearing out pending MCEs
548 20:54:43.812127 Clearing out pending MCEs
549 20:54:43.815386 Setting up local APIC...
550 20:54:43.815914 Initializing CPU #1
551 20:54:43.818511 Initializing CPU #2
552 20:54:43.822338 CPU: vendor Intel device 806ec
553 20:54:43.825286 CPU: family 06, model 8e, stepping 0c
554 20:54:43.828966 CPU: vendor Intel device 806ec
555 20:54:43.832030 CPU: family 06, model 8e, stepping 0c
556 20:54:43.835072 Clearing out pending MCEs
557 20:54:43.838758 Clearing out pending MCEs
558 20:54:43.841628 CPU: vendor Intel device 806ec
559 20:54:43.844862 CPU: family 06, model 8e, stepping 0c
560 20:54:43.848352 Setting up local APIC...
561 20:54:43.848798 Initializing CPU #7
562 20:54:43.851519 Initializing CPU #6
563 20:54:43.855140 CPU: vendor Intel device 806ec
564 20:54:43.858179 CPU: family 06, model 8e, stepping 0c
565 20:54:43.862030 CPU: vendor Intel device 806ec
566 20:54:43.864996 CPU: family 06, model 8e, stepping 0c
567 20:54:43.868000 Clearing out pending MCEs
568 20:54:43.871696 Clearing out pending MCEs
569 20:54:43.872195 Setting up local APIC...
570 20:54:43.874485 Setting up local APIC...
571 20:54:43.878359 apic_id: 0x06 done.
572 20:54:43.878830 Setting up local APIC...
573 20:54:43.881265 Clearing out pending MCEs
574 20:54:43.884695 apic_id: 0x05 done.
575 20:54:43.888321 Setting up local APIC...
576 20:54:43.888802 apic_id: 0x07 done.
577 20:54:43.891354 VMX status: enabled
578 20:54:43.894948 VMX status: enabled
579 20:54:43.897874 IA32_FEATURE_CONTROL status: locked
580 20:54:43.900994 IA32_FEATURE_CONTROL status: locked
581 20:54:43.901488 Skip microcode update
582 20:54:43.904738 Skip microcode update
583 20:54:43.907935 CPU #4 initialized
584 20:54:43.908428 CPU #5 initialized
585 20:54:43.911314 apic_id: 0x03 done.
586 20:54:43.914340 Setting up local APIC...
587 20:54:43.914825 apic_id: 0x04 done.
588 20:54:43.918217 VMX status: enabled
589 20:54:43.921335 VMX status: enabled
590 20:54:43.924561 IA32_FEATURE_CONTROL status: locked
591 20:54:43.928006 IA32_FEATURE_CONTROL status: locked
592 20:54:43.928492 Skip microcode update
593 20:54:43.930993 apic_id: 0x01 done.
594 20:54:43.934729 VMX status: enabled
595 20:54:43.935298 apic_id: 0x02 done.
596 20:54:43.937980 IA32_FEATURE_CONTROL status: locked
597 20:54:43.940860 VMX status: enabled
598 20:54:43.944595 Skip microcode update
599 20:54:43.947598 IA32_FEATURE_CONTROL status: locked
600 20:54:43.948065 CPU #6 initialized
601 20:54:43.950746 Skip microcode update
602 20:54:43.954351 Skip microcode update
603 20:54:43.954753 CPU #1 initialized
604 20:54:43.957557 CPU #2 initialized
605 20:54:43.957968 CPU #7 initialized
606 20:54:43.961110
607 20:54:43.961601 VMX status: enabled
608 20:54:43.964142 IA32_FEATURE_CONTROL status: locked
609 20:54:43.967829 Skip microcode update
610 20:54:43.971016 CPU #3 initialized
611 20:54:43.973971 bsp_do_flight_plan done after 461 msecs.
612 20:54:43.977819 CPU: frequency set to 4200 MHz
613 20:54:43.978259 Enabling SMIs.
614 20:54:43.980790 Locking SMM.
615 20:54:43.994499 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
616 20:54:43.997670 CBFS @ c08000 size 3f8000
617 20:54:44.004574 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
618 20:54:44.005086 CBFS: Locating 'vbt.bin'
619 20:54:44.007652 CBFS: Found @ offset 5f5c0 size 499
620 20:54:44.014313 Found a VBT of 4608 bytes after decompression
621 20:54:44.196017 Display FSP Version Info HOB
622 20:54:44.199019 Reference Code - CPU = 9.0.1e.30
623 20:54:44.202114 uCode Version = 0.0.0.ca
624 20:54:44.205729 TXT ACM version = ff.ff.ff.ffff
625 20:54:44.208958 Display FSP Version Info HOB
626 20:54:44.212451 Reference Code - ME = 9.0.1e.30
627 20:54:44.215605 MEBx version = 0.0.0.0
628 20:54:44.219246 ME Firmware Version = Consumer SKU
629 20:54:44.222453 Display FSP Version Info HOB
630 20:54:44.225753 Reference Code - CML PCH = 9.0.1e.30
631 20:54:44.229222 PCH-CRID Status = Disabled
632 20:54:44.232406 PCH-CRID Original Value = ff.ff.ff.ffff
633 20:54:44.236147 PCH-CRID New Value = ff.ff.ff.ffff
634 20:54:44.239176 OPROM - RST - RAID = ff.ff.ff.ffff
635 20:54:44.242204 ChipsetInit Base Version = ff.ff.ff.ffff
636 20:54:44.245758 ChipsetInit Oem Version = ff.ff.ff.ffff
637 20:54:44.248755 Display FSP Version Info HOB
638 20:54:44.255714 Reference Code - SA - System Agent = 9.0.1e.30
639 20:54:44.259221 Reference Code - MRC = 0.7.1.6c
640 20:54:44.259693 SA - PCIe Version = 9.0.1e.30
641 20:54:44.262187 SA-CRID Status = Disabled
642 20:54:44.265410 SA-CRID Original Value = 0.0.0.c
643 20:54:44.268877 SA-CRID New Value = 0.0.0.c
644 20:54:44.272018 OPROM - VBIOS = ff.ff.ff.ffff
645 20:54:44.275818 RTC Init
646 20:54:44.278984 Set power on after power failure.
647 20:54:44.279467 Disabling Deep S3
648 20:54:44.282623 Disabling Deep S3
649 20:54:44.283102 Disabling Deep S4
650 20:54:44.285635 Disabling Deep S4
651 20:54:44.286238 Disabling Deep S5
652 20:54:44.288556 Disabling Deep S5
653 20:54:44.295393 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 192 exit 1
654 20:54:44.295939 Enumerating buses...
655 20:54:44.302075 Show all devs... Before device enumeration.
656 20:54:44.302557 Root Device: enabled 1
657 20:54:44.305136 CPU_CLUSTER: 0: enabled 1
658 20:54:44.308744 DOMAIN: 0000: enabled 1
659 20:54:44.311964 APIC: 00: enabled 1
660 20:54:44.312492 PCI: 00:00.0: enabled 1
661 20:54:44.315558 PCI: 00:02.0: enabled 1
662 20:54:44.318581 PCI: 00:04.0: enabled 0
663 20:54:44.321577 PCI: 00:05.0: enabled 0
664 20:54:44.322046 PCI: 00:12.0: enabled 1
665 20:54:44.325337 PCI: 00:12.5: enabled 0
666 20:54:44.328497 PCI: 00:12.6: enabled 0
667 20:54:44.328972 PCI: 00:14.0: enabled 1
668 20:54:44.332187
669 20:54:44.332684 PCI: 00:14.1: enabled 0
670 20:54:44.335405 PCI: 00:14.3: enabled 1
671 20:54:44.338452 PCI: 00:14.5: enabled 0
672 20:54:44.339075 PCI: 00:15.0: enabled 1
673 20:54:44.342018 PCI: 00:15.1: enabled 1
674 20:54:44.345164 PCI: 00:15.2: enabled 0
675 20:54:44.348120 PCI: 00:15.3: enabled 0
676 20:54:44.348603 PCI: 00:16.0: enabled 1
677 20:54:44.351787 PCI: 00:16.1: enabled 0
678 20:54:44.355085 PCI: 00:16.2: enabled 0
679 20:54:44.358435 PCI: 00:16.3: enabled 0
680 20:54:44.358930 PCI: 00:16.4: enabled 0
681 20:54:44.361558 PCI: 00:16.5: enabled 0
682 20:54:44.364608 PCI: 00:17.0: enabled 1
683 20:54:44.367889 PCI: 00:19.0: enabled 1
684 20:54:44.368415 PCI: 00:19.1: enabled 0
685 20:54:44.371818 PCI: 00:19.2: enabled 0
686 20:54:44.374845 PCI: 00:1a.0: enabled 0
687 20:54:44.375368 PCI: 00:1c.0: enabled 0
688 20:54:44.377922 PCI: 00:1c.1: enabled 0
689 20:54:44.381453 PCI: 00:1c.2: enabled 0
690 20:54:44.384574 PCI: 00:1c.3: enabled 0
691 20:54:44.385062 PCI: 00:1c.4: enabled 0
692 20:54:44.387793 PCI: 00:1c.5: enabled 0
693 20:54:44.391373 PCI: 00:1c.6: enabled 0
694 20:54:44.394427 PCI: 00:1c.7: enabled 0
695 20:54:44.394927 PCI: 00:1d.0: enabled 1
696 20:54:44.397970 PCI: 00:1d.1: enabled 0
697 20:54:44.401332 PCI: 00:1d.2: enabled 0
698 20:54:44.404451 PCI: 00:1d.3: enabled 0
699 20:54:44.404963 PCI: 00:1d.4: enabled 0
700 20:54:44.408192 PCI: 00:1d.5: enabled 1
701 20:54:44.410968 PCI: 00:1e.0: enabled 1
702 20:54:44.411402 PCI: 00:1e.1: enabled 0
703 20:54:44.414613 PCI: 00:1e.2: enabled 1
704 20:54:44.417832 PCI: 00:1e.3: enabled 1
705 20:54:44.420999 PCI: 00:1f.0: enabled 1
706 20:54:44.421447 PCI: 00:1f.1: enabled 1
707 20:54:44.424623 PCI: 00:1f.2: enabled 1
708 20:54:44.427755 PCI: 00:1f.3: enabled 1
709 20:54:44.431361 PCI: 00:1f.4: enabled 1
710 20:54:44.431887 PCI: 00:1f.5: enabled 1
711 20:54:44.434525 PCI: 00:1f.6: enabled 0
712 20:54:44.438127 USB0 port 0: enabled 1
713 20:54:44.438565 I2C: 00:15: enabled 1
714 20:54:44.441232 I2C: 00:5d: enabled 1
715 20:54:44.444082 GENERIC: 0.0: enabled 1
716 20:54:44.447921 I2C: 00:1a: enabled 1
717 20:54:44.448423 I2C: 00:38: enabled 1
718 20:54:44.450742 I2C: 00:39: enabled 1
719 20:54:44.453825 I2C: 00:3a: enabled 1
720 20:54:44.453922 I2C: 00:3b: enabled 1
721 20:54:44.457488 PCI: 00:00.0: enabled 1
722 20:54:44.460613 SPI: 00: enabled 1
723 20:54:44.460710 SPI: 01: enabled 1
724 20:54:44.464266 PNP: 0c09.0: enabled 1
725 20:54:44.467346 USB2 port 0: enabled 1
726 20:54:44.467442 USB2 port 1: enabled 1
727 20:54:44.470679 USB2 port 2: enabled 0
728 20:54:44.474231 USB2 port 3: enabled 0
729 20:54:44.474328 USB2 port 5: enabled 0
730 20:54:44.477204 USB2 port 6: enabled 1
731 20:54:44.480349 USB2 port 9: enabled 1
732 20:54:44.480446 USB3 port 0: enabled 1
733 20:54:44.483577
734 20:54:44.483674 USB3 port 1: enabled 1
735 20:54:44.487042 USB3 port 2: enabled 1
736 20:54:44.490180 USB3 port 3: enabled 1
737 20:54:44.490323 USB3 port 4: enabled 0
738 20:54:44.493829 APIC: 05: enabled 1
739 20:54:44.496970 APIC: 04: enabled 1
740 20:54:44.497067 APIC: 01: enabled 1
741 20:54:44.500410 APIC: 06: enabled 1
742 20:54:44.500547 APIC: 07: enabled 1
743 20:54:44.503418 APIC: 03: enabled 1
744 20:54:44.507118 APIC: 02: enabled 1
745 20:54:44.507214 Compare with tree...
746 20:54:44.510085 Root Device: enabled 1
747 20:54:44.513678 CPU_CLUSTER: 0: enabled 1
748 20:54:44.513775 APIC: 00: enabled 1
749 20:54:44.516906
750 20:54:44.517003 APIC: 05: enabled 1
751 20:54:44.520018 APIC: 04: enabled 1
752 20:54:44.523638 APIC: 01: enabled 1
753 20:54:44.523734 APIC: 06: enabled 1
754 20:54:44.526629 APIC: 07: enabled 1
755 20:54:44.530519 APIC: 03: enabled 1
756 20:54:44.530609 APIC: 02: enabled 1
757 20:54:44.533537 DOMAIN: 0000: enabled 1
758 20:54:44.536573 PCI: 00:00.0: enabled 1
759 20:54:44.540289 PCI: 00:02.0: enabled 1
760 20:54:44.540375 PCI: 00:04.0: enabled 0
761 20:54:44.543418 PCI: 00:05.0: enabled 0
762 20:54:44.547007 PCI: 00:12.0: enabled 1
763 20:54:44.550211 PCI: 00:12.5: enabled 0
764 20:54:44.553180 PCI: 00:12.6: enabled 0
765 20:54:44.553268 PCI: 00:14.0: enabled 1
766 20:54:44.556309 USB0 port 0: enabled 1
767 20:54:44.559875 USB2 port 0: enabled 1
768 20:54:44.562983 USB2 port 1: enabled 1
769 20:54:44.566624 USB2 port 2: enabled 0
770 20:54:44.566713 USB2 port 3: enabled 0
771 20:54:44.569594 USB2 port 5: enabled 0
772 20:54:44.573377 USB2 port 6: enabled 1
773 20:54:44.576455 USB2 port 9: enabled 1
774 20:54:44.579601 USB3 port 0: enabled 1
775 20:54:44.583207 USB3 port 1: enabled 1
776 20:54:44.583299 USB3 port 2: enabled 1
777 20:54:44.586209 USB3 port 3: enabled 1
778 20:54:44.589849 USB3 port 4: enabled 0
779 20:54:44.592837 PCI: 00:14.1: enabled 0
780 20:54:44.596406 PCI: 00:14.3: enabled 1
781 20:54:44.596501 PCI: 00:14.5: enabled 0
782 20:54:44.599570 PCI: 00:15.0: enabled 1
783 20:54:44.602589 I2C: 00:15: enabled 1
784 20:54:44.606352 PCI: 00:15.1: enabled 1
785 20:54:44.609312 I2C: 00:5d: enabled 1
786 20:54:44.609407 GENERIC: 0.0: enabled 1
787 20:54:44.613098 PCI: 00:15.2: enabled 0
788 20:54:44.616317 PCI: 00:15.3: enabled 0
789 20:54:44.619394 PCI: 00:16.0: enabled 1
790 20:54:44.622480 PCI: 00:16.1: enabled 0
791 20:54:44.622576 PCI: 00:16.2: enabled 0
792 20:54:44.626218 PCI: 00:16.3: enabled 0
793 20:54:44.629294 PCI: 00:16.4: enabled 0
794 20:54:44.632419 PCI: 00:16.5: enabled 0
795 20:54:44.632519 PCI: 00:17.0: enabled 1
796 20:54:44.636070
797 20:54:44.636165 PCI: 00:19.0: enabled 1
798 20:54:44.639275 I2C: 00:1a: enabled 1
799 20:54:44.642385 I2C: 00:38: enabled 1
800 20:54:44.646199 I2C: 00:39: enabled 1
801 20:54:44.646295 I2C: 00:3a: enabled 1
802 20:54:44.649194 I2C: 00:3b: enabled 1
803 20:54:44.652230 PCI: 00:19.1: enabled 0
804 20:54:44.655932 PCI: 00:19.2: enabled 0
805 20:54:44.656045 PCI: 00:1a.0: enabled 0
806 20:54:44.659028
807 20:54:44.659151 PCI: 00:1c.0: enabled 0
808 20:54:44.662706 PCI: 00:1c.1: enabled 0
809 20:54:44.665924 PCI: 00:1c.2: enabled 0
810 20:54:44.668905 PCI: 00:1c.3: enabled 0
811 20:54:44.668999 PCI: 00:1c.4: enabled 0
812 20:54:44.672474 PCI: 00:1c.5: enabled 0
813 20:54:44.675538 PCI: 00:1c.6: enabled 0
814 20:54:44.679150 PCI: 00:1c.7: enabled 0
815 20:54:44.682370 PCI: 00:1d.0: enabled 1
816 20:54:44.682466 PCI: 00:1d.1: enabled 0
817 20:54:44.685290 PCI: 00:1d.2: enabled 0
818 20:54:44.688918 PCI: 00:1d.3: enabled 0
819 20:54:44.691914 PCI: 00:1d.4: enabled 0
820 20:54:44.695745 PCI: 00:1d.5: enabled 1
821 20:54:44.695839 PCI: 00:00.0: enabled 1
822 20:54:44.699058 PCI: 00:1e.0: enabled 1
823 20:54:44.702121 PCI: 00:1e.1: enabled 0
824 20:54:44.705248 PCI: 00:1e.2: enabled 1
825 20:54:44.705342 SPI: 00: enabled 1
826 20:54:44.708884
827 20:54:44.708986 PCI: 00:1e.3: enabled 1
828 20:54:44.712469 SPI: 01: enabled 1
829 20:54:44.715571 PCI: 00:1f.0: enabled 1
830 20:54:44.718692 PNP: 0c09.0: enabled 1
831 20:54:44.718787 PCI: 00:1f.1: enabled 1
832 20:54:44.721766 PCI: 00:1f.2: enabled 1
833 20:54:44.725479 PCI: 00:1f.3: enabled 1
834 20:54:44.728741 PCI: 00:1f.4: enabled 1
835 20:54:44.728836 PCI: 00:1f.5: enabled 1
836 20:54:44.731671
837 20:54:44.731766 PCI: 00:1f.6: enabled 0
838 20:54:44.734958 Root Device scanning...
839 20:54:44.738565 scan_static_bus for Root Device
840 20:54:44.741477 CPU_CLUSTER: 0 enabled
841 20:54:44.741572 DOMAIN: 0000 enabled
842 20:54:44.745278 DOMAIN: 0000 scanning...
843 20:54:44.748262 PCI: pci_scan_bus for bus 00
844 20:54:44.751875 PCI: 00:00.0 [8086/0000] ops
845 20:54:44.754956 PCI: 00:00.0 [8086/9b61] enabled
846 20:54:44.758474 PCI: 00:02.0 [8086/0000] bus ops
847 20:54:44.761606 PCI: 00:02.0 [8086/9b41] enabled
848 20:54:44.765210 PCI: 00:04.0 [8086/1903] disabled
849 20:54:44.768485 PCI: 00:08.0 [8086/1911] enabled
850 20:54:44.771529 PCI: 00:12.0 [8086/02f9] enabled
851 20:54:44.775102 PCI: 00:14.0 [8086/0000] bus ops
852 20:54:44.778243 PCI: 00:14.0 [8086/02ed] enabled
853 20:54:44.781362 PCI: 00:14.2 [8086/02ef] enabled
854 20:54:44.785046 PCI: 00:14.3 [8086/02f0] enabled
855 20:54:44.788127 PCI: 00:15.0 [8086/0000] bus ops
856 20:54:44.791934 PCI: 00:15.0 [8086/02e8] enabled
857 20:54:44.794801 PCI: 00:15.1 [8086/0000] bus ops
858 20:54:44.798356 PCI: 00:15.1 [8086/02e9] enabled
859 20:54:44.801284 PCI: 00:16.0 [8086/0000] ops
860 20:54:44.805193 PCI: 00:16.0 [8086/02e0] enabled
861 20:54:44.808118 PCI: 00:17.0 [8086/0000] ops
862 20:54:44.811233 PCI: 00:17.0 [8086/02d3] enabled
863 20:54:44.814933 PCI: 00:19.0 [8086/0000] bus ops
864 20:54:44.817775 PCI: 00:19.0 [8086/02c5] enabled
865 20:54:44.821522 PCI: 00:1d.0 [8086/0000] bus ops
866 20:54:44.824823 PCI: 00:1d.0 [8086/02b0] enabled
867 20:54:44.831299 PCI: Static device PCI: 00:1d.5 not found, disabling it.
868 20:54:44.835086 PCI: 00:1e.0 [8086/0000] ops
869 20:54:44.838050 PCI: 00:1e.0 [8086/02a8] enabled
870 20:54:44.841211 PCI: 00:1e.2 [8086/0000] bus ops
871 20:54:44.844474 PCI: 00:1e.2 [8086/02aa] enabled
872 20:54:44.847992 PCI: 00:1e.3 [8086/0000] bus ops
873 20:54:44.851066 PCI: 00:1e.3 [8086/02ab] enabled
874 20:54:44.854671 PCI: 00:1f.0 [8086/0000] bus ops
875 20:54:44.857707 PCI: 00:1f.0 [8086/0284] enabled
876 20:54:44.861318 PCI: Static device PCI: 00:1f.1 not found, disabling it.
877 20:54:44.867456 PCI: Static device PCI: 00:1f.2 not found, disabling it.
878 20:54:44.871306 PCI: 00:1f.3 [8086/0000] bus ops
879 20:54:44.874365 PCI: 00:1f.3 [8086/02c8] enabled
880 20:54:44.877583 PCI: 00:1f.4 [8086/0000] bus ops
881 20:54:44.881110 PCI: 00:1f.4 [8086/02a3] enabled
882 20:54:44.884190 PCI: 00:1f.5 [8086/0000] bus ops
883 20:54:44.887370 PCI: 00:1f.5 [8086/02a4] enabled
884 20:54:44.891028 PCI: Leftover static devices:
885 20:54:44.891123 PCI: 00:05.0
886 20:54:44.894107 PCI: 00:12.5
887 20:54:44.894205 PCI: 00:12.6
888 20:54:44.897755 PCI: 00:14.1
889 20:54:44.897850 PCI: 00:14.5
890 20:54:44.897924 PCI: 00:15.2
891 20:54:44.900669 PCI: 00:15.3
892 20:54:44.900763 PCI: 00:16.1
893 20:54:44.904505 PCI: 00:16.2
894 20:54:44.904600 PCI: 00:16.3
895 20:54:44.904675 PCI: 00:16.4
896 20:54:44.907411 PCI: 00:16.5
897 20:54:44.907505 PCI: 00:19.1
898 20:54:44.911018 PCI: 00:19.2
899 20:54:44.911113 PCI: 00:1a.0
900 20:54:44.913966 PCI: 00:1c.0
901 20:54:44.914061 PCI: 00:1c.1
902 20:54:44.914136 PCI: 00:1c.2
903 20:54:44.917748 PCI: 00:1c.3
904 20:54:44.917844 PCI: 00:1c.4
905 20:54:44.920931 PCI: 00:1c.5
906 20:54:44.921027 PCI: 00:1c.6
907 20:54:44.921104 PCI: 00:1c.7
908 20:54:44.923998 PCI: 00:1d.1
909 20:54:44.924088 PCI: 00:1d.2
910 20:54:44.927159 PCI: 00:1d.3
911 20:54:44.927247 PCI: 00:1d.4
912 20:54:44.927323 PCI: 00:1d.5
913 20:54:44.930854 PCI: 00:1e.1
914 20:54:44.930952 PCI: 00:1f.1
915 20:54:44.933948 PCI: 00:1f.2
916 20:54:44.934050 PCI: 00:1f.6
917 20:54:44.937478 PCI: Check your devicetree.cb.
918 20:54:44.940676 PCI: 00:02.0 scanning...
919 20:54:44.944279 scan_generic_bus for PCI: 00:02.0
920 20:54:44.947326 scan_generic_bus for PCI: 00:02.0 done
921 20:54:44.954092 scan_bus: scanning of bus PCI: 00:02.0 took 10190 usecs
922 20:54:44.957241 PCI: 00:14.0 scanning...
923 20:54:44.960373 scan_static_bus for PCI: 00:14.0
924 20:54:44.960462 USB0 port 0 enabled
925 20:54:44.963966 USB0 port 0 scanning...
926 20:54:44.967081 scan_static_bus for USB0 port 0
927 20:54:44.970116 USB2 port 0 enabled
928 20:54:44.970207 USB2 port 1 enabled
929 20:54:44.973705 USB2 port 2 disabled
930 20:54:44.977322 USB2 port 3 disabled
931 20:54:44.977412 USB2 port 5 disabled
932 20:54:44.980378 USB2 port 6 enabled
933 20:54:44.980476 USB2 port 9 enabled
934 20:54:44.983349 USB3 port 0 enabled
935 20:54:44.986998 USB3 port 1 enabled
936 20:54:44.987107 USB3 port 2 enabled
937 20:54:44.990136 USB3 port 3 enabled
938 20:54:44.993780 USB3 port 4 disabled
939 20:54:44.993895 USB2 port 0 scanning...
940 20:54:44.996719 scan_static_bus for USB2 port 0
941 20:54:45.000292 scan_static_bus for USB2 port 0 done
942 20:54:45.003279
943 20:54:45.007118 scan_bus: scanning of bus USB2 port 0 took 9713 usecs
944 20:54:45.010037 USB2 port 1 scanning...
945 20:54:45.013754 scan_static_bus for USB2 port 1
946 20:54:45.016777 scan_static_bus for USB2 port 1 done
947 20:54:45.023481 scan_bus: scanning of bus USB2 port 1 took 9695 usecs
948 20:54:45.023815 USB2 port 6 scanning...
949 20:54:45.026722 scan_static_bus for USB2 port 6
950 20:54:45.033569 scan_static_bus for USB2 port 6 done
951 20:54:45.037152 scan_bus: scanning of bus USB2 port 6 took 9690 usecs
952 20:54:45.040159 USB2 port 9 scanning...
953 20:54:45.043314 scan_static_bus for USB2 port 9
954 20:54:45.046899 scan_static_bus for USB2 port 9 done
955 20:54:45.053787 scan_bus: scanning of bus USB2 port 9 took 9694 usecs
956 20:54:45.054271 USB3 port 0 scanning...
957 20:54:45.056735 scan_static_bus for USB3 port 0
958 20:54:45.063889 scan_static_bus for USB3 port 0 done
959 20:54:45.067042 scan_bus: scanning of bus USB3 port 0 took 9694 usecs
960 20:54:45.070036 USB3 port 1 scanning...
961 20:54:45.073180 scan_static_bus for USB3 port 1
962 20:54:45.076810 scan_static_bus for USB3 port 1 done
963 20:54:45.083557 scan_bus: scanning of bus USB3 port 1 took 9695 usecs
964 20:54:45.084004 USB3 port 2 scanning...
965 20:54:45.087235 scan_static_bus for USB3 port 2
966 20:54:45.093358 scan_static_bus for USB3 port 2 done
967 20:54:45.097042 scan_bus: scanning of bus USB3 port 2 took 9686 usecs
968 20:54:45.099931 USB3 port 3 scanning...
969 20:54:45.103677 scan_static_bus for USB3 port 3
970 20:54:45.106779 scan_static_bus for USB3 port 3 done
971 20:54:45.113390 scan_bus: scanning of bus USB3 port 3 took 9692 usecs
972 20:54:45.116493 scan_static_bus for USB0 port 0 done
973 20:54:45.120120 scan_bus: scanning of bus USB0 port 0 took 155268 usecs
974 20:54:45.123148
975 20:54:45.126665 scan_static_bus for PCI: 00:14.0 done
976 20:54:45.129776 scan_bus: scanning of bus PCI: 00:14.0 took 172882 usecs
977 20:54:45.132884 PCI: 00:15.0 scanning...
978 20:54:45.135994 scan_generic_bus for PCI: 00:15.0
979 20:54:45.139828 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
980 20:54:45.146469 scan_generic_bus for PCI: 00:15.0 done
981 20:54:45.149671 scan_bus: scanning of bus PCI: 00:15.0 took 14285 usecs
982 20:54:45.153399 PCI: 00:15.1 scanning...
983 20:54:45.156144 scan_generic_bus for PCI: 00:15.1
984 20:54:45.159250 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
985 20:54:45.166031 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
986 20:54:45.169700 scan_generic_bus for PCI: 00:15.1 done
987 20:54:45.175896 scan_bus: scanning of bus PCI: 00:15.1 took 18633 usecs
988 20:54:45.175989 PCI: 00:19.0 scanning...
989 20:54:45.179480 scan_generic_bus for PCI: 00:19.0
990 20:54:45.186205 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
991 20:54:45.189259 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
992 20:54:45.192516 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
993 20:54:45.196220 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
994 20:54:45.202858 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
995 20:54:45.205943 scan_generic_bus for PCI: 00:19.0 done
996 20:54:45.209033 scan_bus: scanning of bus PCI: 00:19.0 took 30707 usecs
997 20:54:45.212663 PCI: 00:1d.0 scanning...
998 20:54:45.215779 do_pci_scan_bridge for PCI: 00:1d.0
999 20:54:45.219311 PCI: pci_scan_bus for bus 01
1000 20:54:45.222451 PCI: 01:00.0 [1c5c/1327] enabled
1001 20:54:45.226176 Enabling Common Clock Configuration
1002 20:54:45.232482 L1 Sub-State supported from root port 29
1003 20:54:45.236151 L1 Sub-State Support = 0xf
1004 20:54:45.236241 CommonModeRestoreTime = 0x28
1005 20:54:45.242231 Power On Value = 0x16, Power On Scale = 0x0
1006 20:54:45.242325 ASPM: Enabled L1
1007 20:54:45.249036 scan_bus: scanning of bus PCI: 00:1d.0 took 32779 usecs
1008 20:54:45.252189 PCI: 00:1e.2 scanning...
1009 20:54:45.255911 scan_generic_bus for PCI: 00:1e.2
1010 20:54:45.258919 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1011 20:54:45.262110 scan_generic_bus for PCI: 00:1e.2 done
1012 20:54:45.269218 scan_bus: scanning of bus PCI: 00:1e.2 took 13990 usecs
1013 20:54:45.272309 PCI: 00:1e.3 scanning...
1014 20:54:45.275324 scan_generic_bus for PCI: 00:1e.3
1015 20:54:45.279021 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1016 20:54:45.282045 scan_generic_bus for PCI: 00:1e.3 done
1017 20:54:45.288933 scan_bus: scanning of bus PCI: 00:1e.3 took 13997 usecs
1018 20:54:45.289026 PCI: 00:1f.0 scanning...
1019 20:54:45.292538 scan_static_bus for PCI: 00:1f.0
1020 20:54:45.295568 PNP: 0c09.0 enabled
1021 20:54:45.298877 scan_static_bus for PCI: 00:1f.0 done
1022 20:54:45.305426 scan_bus: scanning of bus PCI: 00:1f.0 took 12051 usecs
1023 20:54:45.308963 PCI: 00:1f.3 scanning...
1024 20:54:45.311991 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1025 20:54:45.315579 PCI: 00:1f.4 scanning...
1026 20:54:45.318618 scan_generic_bus for PCI: 00:1f.4
1027 20:54:45.322256 scan_generic_bus for PCI: 00:1f.4 done
1028 20:54:45.328980 scan_bus: scanning of bus PCI: 00:1f.4 took 10172 usecs
1029 20:54:45.332020 PCI: 00:1f.5 scanning...
1030 20:54:45.335086 scan_generic_bus for PCI: 00:1f.5
1031 20:54:45.338809 scan_generic_bus for PCI: 00:1f.5 done
1032 20:54:45.345665 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
1033 20:54:45.351708 scan_bus: scanning of bus DOMAIN: 0000 took 604805 usecs
1034 20:54:45.355359 scan_static_bus for Root Device done
1035 20:54:45.358391 scan_bus: scanning of bus Root Device took 624660 usecs
1036 20:54:45.362341 done
1037 20:54:45.365399 Chrome EC: UHEPI supported
1038 20:54:45.368609 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1039 20:54:45.375330 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1040 20:54:45.382047 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1041 20:54:45.388133 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1042 20:54:45.391674 SPI flash protection: WPSW=0 SRP0=0
1043 20:54:45.398403 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1044 20:54:45.401427 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1045 20:54:45.405132 found VGA at PCI: 00:02.0
1046 20:54:45.408261 Setting up VGA for PCI: 00:02.0
1047 20:54:45.415020 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1048 20:54:45.417991 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1049 20:54:45.421611 Allocating resources...
1050 20:54:45.424832 Reading resources...
1051 20:54:45.427973 Root Device read_resources bus 0 link: 0
1052 20:54:45.431714 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1053 20:54:45.437638 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1054 20:54:45.441252 DOMAIN: 0000 read_resources bus 0 link: 0
1055 20:54:45.448617 PCI: 00:14.0 read_resources bus 0 link: 0
1056 20:54:45.451803 USB0 port 0 read_resources bus 0 link: 0
1057 20:54:45.460294 USB0 port 0 read_resources bus 0 link: 0 done
1058 20:54:45.463225 PCI: 00:14.0 read_resources bus 0 link: 0 done
1059 20:54:45.470596 PCI: 00:15.0 read_resources bus 1 link: 0
1060 20:54:45.474207 PCI: 00:15.0 read_resources bus 1 link: 0 done
1061 20:54:45.481028 PCI: 00:15.1 read_resources bus 2 link: 0
1062 20:54:45.484026 PCI: 00:15.1 read_resources bus 2 link: 0 done
1063 20:54:45.491466 PCI: 00:19.0 read_resources bus 3 link: 0
1064 20:54:45.497957 PCI: 00:19.0 read_resources bus 3 link: 0 done
1065 20:54:45.501028 PCI: 00:1d.0 read_resources bus 1 link: 0
1066 20:54:45.507659 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1067 20:54:45.511322 PCI: 00:1e.2 read_resources bus 4 link: 0
1068 20:54:45.517856 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1069 20:54:45.520894 PCI: 00:1e.3 read_resources bus 5 link: 0
1070 20:54:45.527643 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1071 20:54:45.531348 PCI: 00:1f.0 read_resources bus 0 link: 0
1072 20:54:45.537590 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1073 20:54:45.544378 DOMAIN: 0000 read_resources bus 0 link: 0 done
1074 20:54:45.547463 Root Device read_resources bus 0 link: 0 done
1075 20:54:45.551071 Done reading resources.
1076 20:54:45.554008 Show resources in subtree (Root Device)...After reading.
1077 20:54:45.560728 Root Device child on link 0 CPU_CLUSTER: 0
1078 20:54:45.564384 CPU_CLUSTER: 0 child on link 0 APIC: 00
1079 20:54:45.564469 APIC: 00
1080 20:54:45.567360 APIC: 05
1081 20:54:45.567447 APIC: 04
1082 20:54:45.571009 APIC: 01
1083 20:54:45.571091 APIC: 06
1084 20:54:45.571162 APIC: 07
1085 20:54:45.574020 APIC: 03
1086 20:54:45.574099 APIC: 02
1087 20:54:45.577859 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1088 20:54:45.587537 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1089 20:54:45.643693 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1090 20:54:45.643823 PCI: 00:00.0
1091 20:54:45.644105 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1092 20:54:45.644188 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1093 20:54:45.644559 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1094 20:54:45.645203 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1095 20:54:45.690205 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1096 20:54:45.690514 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1097 20:54:45.690795 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1098 20:54:45.691451 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1099 20:54:45.691727 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1100 20:54:45.695186 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1101 20:54:45.701437 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1102 20:54:45.711729 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1103 20:54:45.721600 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1104 20:54:45.731357 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1105 20:54:45.741380 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1106 20:54:45.747946 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1107 20:54:45.751060 PCI: 00:02.0
1108 20:54:45.760988 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1109 20:54:45.770751 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1110 20:54:45.781161 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1111 20:54:45.781254 PCI: 00:04.0
1112 20:54:45.784124 PCI: 00:08.0
1113 20:54:45.794387 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1114 20:54:45.794482 PCI: 00:12.0
1115 20:54:45.804193 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1116 20:54:45.810825 PCI: 00:14.0 child on link 0 USB0 port 0
1117 20:54:45.820631 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1118 20:54:45.823662 USB0 port 0 child on link 0 USB2 port 0
1119 20:54:45.823749 USB2 port 0
1120 20:54:45.827220 USB2 port 1
1121 20:54:45.827315 USB2 port 2
1122 20:54:45.830877 USB2 port 3
1123 20:54:45.830960 USB2 port 5
1124 20:54:45.833964
1125 20:54:45.834051 USB2 port 6
1126 20:54:45.837073 USB2 port 9
1127 20:54:45.837172 USB3 port 0
1128 20:54:45.840522 USB3 port 1
1129 20:54:45.840626 USB3 port 2
1130 20:54:45.843611 USB3 port 3
1131 20:54:45.843700 USB3 port 4
1132 20:54:45.847298 PCI: 00:14.2
1133 20:54:45.857096 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1134 20:54:45.867380 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1135 20:54:45.867471 PCI: 00:14.3
1136 20:54:45.876658 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1137 20:54:45.880362 PCI: 00:15.0 child on link 0 I2C: 01:15
1138 20:54:45.883338
1139 20:54:45.890243 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 20:54:45.893367
1141 20:54:45.893454 I2C: 01:15
1142 20:54:45.896843 PCI: 00:15.1 child on link 0 I2C: 02:5d
1143 20:54:45.907077 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1144 20:54:45.910213 I2C: 02:5d
1145 20:54:45.910305 GENERIC: 0.0
1146 20:54:45.913349 PCI: 00:16.0
1147 20:54:45.923032 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1148 20:54:45.923126 PCI: 00:17.0
1149 20:54:45.933397 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1150 20:54:45.943288 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1151 20:54:45.949959 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1152 20:54:45.959817 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1153 20:54:45.966022 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1154 20:54:45.975882 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1155 20:54:45.979469 PCI: 00:19.0 child on link 0 I2C: 03:1a
1156 20:54:45.989578 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1157 20:54:45.992536 I2C: 03:1a
1158 20:54:45.992627 I2C: 03:38
1159 20:54:45.996292 I2C: 03:39
1160 20:54:45.996387 I2C: 03:3a
1161 20:54:45.999221 I2C: 03:3b
1162 20:54:46.002561 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1163 20:54:46.012835 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1164 20:54:46.022622 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1165 20:54:46.029441 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1166 20:54:46.032454 PCI: 01:00.0
1167 20:54:46.042653 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1168 20:54:46.042752 PCI: 00:1e.0
1169 20:54:46.055633 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1170 20:54:46.065691 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1171 20:54:46.068708 PCI: 00:1e.2 child on link 0 SPI: 00
1172 20:54:46.078682 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1173 20:54:46.078779 SPI: 00
1174 20:54:46.082324 PCI: 00:1e.3 child on link 0 SPI: 01
1175 20:54:46.092187 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 20:54:46.095125 SPI: 01
1177 20:54:46.098866 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1178 20:54:46.108714 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1179 20:54:46.115407 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1180 20:54:46.119102 PNP: 0c09.0
1181 20:54:46.128686 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1182 20:54:46.128790 PCI: 00:1f.3
1183 20:54:46.138137 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1184 20:54:46.148450 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1185 20:54:46.151663 PCI: 00:1f.4
1186 20:54:46.158472 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1187 20:54:46.168394 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1188 20:54:46.171291 PCI: 00:1f.5
1189 20:54:46.181149 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1190 20:54:46.187935 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1191 20:54:46.191144 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1192 20:54:46.198396 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1193 20:54:46.201414
1194 20:54:46.204404 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1195 20:54:46.207996 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1196 20:54:46.211102 PCI: 00:17.0 18 * [0x60 - 0x67] io
1197 20:54:46.214396 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1198 20:54:46.221059 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1199 20:54:46.227489 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1200 20:54:46.234095 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1201 20:54:46.244428 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1202 20:54:46.251263 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1203 20:54:46.254290 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1204 20:54:46.260511 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1205 20:54:46.264016
1206 20:54:46.267186 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1207 20:54:46.270874 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1208 20:54:46.277425 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1209 20:54:46.280448 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1210 20:54:46.287261 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1211 20:54:46.290242 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1212 20:54:46.297049 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1213 20:54:46.300706 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1214 20:54:46.306797 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1215 20:54:46.310387 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1216 20:54:46.317256 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1217 20:54:46.320433 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1218 20:54:46.323309 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1219 20:54:46.327013
1220 20:54:46.330201 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1221 20:54:46.333306 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1222 20:54:46.339937 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1223 20:54:46.343772 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1224 20:54:46.350207 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1225 20:54:46.353265 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1226 20:54:46.360018 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1227 20:54:46.362957 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1228 20:54:46.369854 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1229 20:54:46.372991 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1230 20:54:46.382965 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1231 20:54:46.386081 avoid_fixed_resources: DOMAIN: 0000
1232 20:54:46.392903 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1233 20:54:46.396446 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1234 20:54:46.406229 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1235 20:54:46.412752 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1236 20:54:46.419030 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1237 20:54:46.429553 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1238 20:54:46.435670 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1239 20:54:46.442280 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1240 20:54:46.452441 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1241 20:54:46.458644 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1242 20:54:46.465212 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1243 20:54:46.471872 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1244 20:54:46.475643 Setting resources...
1245 20:54:46.481663 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1246 20:54:46.485235 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1247 20:54:46.488296 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1248 20:54:46.494912 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1249 20:54:46.498828 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1250 20:54:46.505362 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1251 20:54:46.512015 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1252 20:54:46.514845 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1253 20:54:46.518540
1254 20:54:46.524733 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1255 20:54:46.528309 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1256 20:54:46.535043 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1257 20:54:46.538204 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1258 20:54:46.544814 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1259 20:54:46.548324 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1260 20:54:46.554696 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1261 20:54:46.557755 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1262 20:54:46.564526 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1263 20:54:46.567597 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1264 20:54:46.574349 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1265 20:54:46.577520 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1266 20:54:46.584187 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1267 20:54:46.587408 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1268 20:54:46.594175 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1269 20:54:46.597231 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1270 20:54:46.603910 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1271 20:54:46.606997 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1272 20:54:46.610710 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1273 20:54:46.617364 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1274 20:54:46.620234 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1275 20:54:46.626802 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1276 20:54:46.630369 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1277 20:54:46.636866 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1278 20:54:46.643704 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1279 20:54:46.650363 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1280 20:54:46.660230 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1281 20:54:46.666722 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1282 20:54:46.669878 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1283 20:54:46.676719 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1284 20:54:46.679702
1285 20:54:46.683519 Root Device assign_resources, bus 0 link: 0
1286 20:54:46.687012 DOMAIN: 0000 assign_resources, bus 0 link: 0
1287 20:54:46.696809 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1288 20:54:46.703456 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1289 20:54:46.713282 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1290 20:54:46.719985 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1291 20:54:46.730004 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1292 20:54:46.736442 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1293 20:54:46.743076 PCI: 00:14.0 assign_resources, bus 0 link: 0
1294 20:54:46.746054 PCI: 00:14.0 assign_resources, bus 0 link: 0
1295 20:54:46.752801 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1296 20:54:46.763170 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1297 20:54:46.769119 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1298 20:54:46.779501 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1299 20:54:46.782643 PCI: 00:15.0 assign_resources, bus 1 link: 0
1300 20:54:46.789301 PCI: 00:15.0 assign_resources, bus 1 link: 0
1301 20:54:46.796066 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1302 20:54:46.801386 PCI: 00:15.1 assign_resources, bus 2 link: 0
1303 20:54:46.802933
1304 20:54:46.806072 PCI: 00:15.1 assign_resources, bus 2 link: 0
1305 20:54:46.812859 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1306 20:54:46.823172 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1307 20:54:46.829229 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1308 20:54:46.835972 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1309 20:54:46.839082
1310 20:54:46.845892 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1311 20:54:46.852544 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1312 20:54:46.859184 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1313 20:54:46.862351
1314 20:54:46.869077 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1315 20:54:46.872139 PCI: 00:19.0 assign_resources, bus 3 link: 0
1316 20:54:46.879109 PCI: 00:19.0 assign_resources, bus 3 link: 0
1317 20:54:46.885305 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1318 20:54:46.895215 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1319 20:54:46.905566 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1320 20:54:46.908825 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1321 20:54:46.918434 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1322 20:54:46.922101 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1323 20:54:46.928331 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1324 20:54:46.938618 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1325 20:54:46.942190 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1326 20:54:46.948527 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1327 20:54:46.955379 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1328 20:54:46.961929 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1329 20:54:46.965067 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1330 20:54:46.968195 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1331 20:54:46.971988
1332 20:54:46.975129 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1333 20:54:46.978002 LPC: Trying to open IO window from 800 size 1ff
1334 20:54:46.981798
1335 20:54:46.987873 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1336 20:54:46.994584 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1337 20:54:47.004512 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1338 20:54:47.011281 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1339 20:54:47.018031 DOMAIN: 0000 assign_resources, bus 0 link: 0
1340 20:54:47.021057 Root Device assign_resources, bus 0 link: 0
1341 20:54:47.024739 Done setting resources.
1342 20:54:47.030998 Show resources in subtree (Root Device)...After assigning values.
1343 20:54:47.034605 Root Device child on link 0 CPU_CLUSTER: 0
1344 20:54:47.041249 CPU_CLUSTER: 0 child on link 0 APIC: 00
1345 20:54:47.041347 APIC: 00
1346 20:54:47.041423 APIC: 05
1347 20:54:47.044299 APIC: 04
1348 20:54:47.044395 APIC: 01
1349 20:54:47.044471 APIC: 06
1350 20:54:47.047855 APIC: 07
1351 20:54:47.047952 APIC: 03
1352 20:54:47.051010 APIC: 02
1353 20:54:47.054083 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1354 20:54:47.064278 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1355 20:54:47.074118 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1356 20:54:47.077316 PCI: 00:00.0
1357 20:54:47.087631 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1358 20:54:47.093685 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1359 20:54:47.103891 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1360 20:54:47.113770 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1361 20:54:47.123301 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1362 20:54:47.133749 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1363 20:54:47.143416 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1364 20:54:47.149973 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1365 20:54:47.159967 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1366 20:54:47.169843 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1367 20:54:47.179715 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1368 20:54:47.189389 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1369 20:54:47.199241 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1370 20:54:47.209079 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1371 20:54:47.215789 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1372 20:54:47.226020 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1373 20:54:47.229199 PCI: 00:02.0
1374 20:54:47.238894 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1375 20:54:47.248698 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1376 20:54:47.258480 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1377 20:54:47.258581 PCI: 00:04.0
1378 20:54:47.262250 PCI: 00:08.0
1379 20:54:47.271893 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1380 20:54:47.275168 PCI: 00:12.0
1381 20:54:47.285116 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1382 20:54:47.288796 PCI: 00:14.0 child on link 0 USB0 port 0
1383 20:54:47.298138 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1384 20:54:47.301737 USB0 port 0 child on link 0 USB2 port 0
1385 20:54:47.304726 USB2 port 0
1386 20:54:47.308425 USB2 port 1
1387 20:54:47.308514 USB2 port 2
1388 20:54:47.311464 USB2 port 3
1389 20:54:47.311552 USB2 port 5
1390 20:54:47.315214 USB2 port 6
1391 20:54:47.315293 USB2 port 9
1392 20:54:47.318135 USB3 port 0
1393 20:54:47.318213 USB3 port 1
1394 20:54:47.321628 USB3 port 2
1395 20:54:47.321707 USB3 port 3
1396 20:54:47.324669 USB3 port 4
1397 20:54:47.324757 PCI: 00:14.2
1398 20:54:47.334385 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1399 20:54:47.347668 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1400 20:54:47.347755 PCI: 00:14.3
1401 20:54:47.358105 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1402 20:54:47.364214 PCI: 00:15.0 child on link 0 I2C: 01:15
1403 20:54:47.374464 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1404 20:54:47.374562 I2C: 01:15
1405 20:54:47.377596 PCI: 00:15.1 child on link 0 I2C: 02:5d
1406 20:54:47.387469 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1407 20:54:47.390606
1408 20:54:47.390690 I2C: 02:5d
1409 20:54:47.394210 GENERIC: 0.0
1410 20:54:47.394291 PCI: 00:16.0
1411 20:54:47.403989 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1412 20:54:47.407610 PCI: 00:17.0
1413 20:54:47.416867 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1414 20:54:47.427342 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1415 20:54:47.436950 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1416 20:54:47.443719 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1417 20:54:47.453267 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1418 20:54:47.463595 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1419 20:54:47.466776 PCI: 00:19.0 child on link 0 I2C: 03:1a
1420 20:54:47.479710 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1421 20:54:47.479800 I2C: 03:1a
1422 20:54:47.483434 I2C: 03:38
1423 20:54:47.483527 I2C: 03:39
1424 20:54:47.483600 I2C: 03:3a
1425 20:54:47.486470 I2C: 03:3b
1426 20:54:47.489495 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1427 20:54:47.499987 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1428 20:54:47.509613 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1429 20:54:47.519498 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1430 20:54:47.523062 PCI: 01:00.0
1431 20:54:47.532886 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1432 20:54:47.532975 PCI: 00:1e.0
1433 20:54:47.545872 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1434 20:54:47.556037 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1435 20:54:47.559261 PCI: 00:1e.2 child on link 0 SPI: 00
1436 20:54:47.568905 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1437 20:54:47.572485 SPI: 00
1438 20:54:47.575463 PCI: 00:1e.3 child on link 0 SPI: 01
1439 20:54:47.585945 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1440 20:54:47.586034 SPI: 01
1441 20:54:47.592281 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1442 20:54:47.599067 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1443 20:54:47.608907 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1444 20:54:47.608998 PNP: 0c09.0
1445 20:54:47.612006
1446 20:54:47.618533 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1447 20:54:47.621577 PCI: 00:1f.3
1448 20:54:47.632111 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1449 20:54:47.641971 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1450 20:54:47.642077 PCI: 00:1f.4
1451 20:54:47.651641 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1452 20:54:47.661806 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1453 20:54:47.664975 PCI: 00:1f.5
1454 20:54:47.675122 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1455 20:54:47.678085 Done allocating resources.
1456 20:54:47.681247 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1457 20:54:47.684931 Enabling resources...
1458 20:54:47.691669 PCI: 00:00.0 subsystem <- 8086/9b61
1459 20:54:47.691767 PCI: 00:00.0 cmd <- 06
1460 20:54:47.694724 PCI: 00:02.0 subsystem <- 8086/9b41
1461 20:54:47.698300 PCI: 00:02.0 cmd <- 03
1462 20:54:47.701369 PCI: 00:08.0 cmd <- 06
1463 20:54:47.704887 PCI: 00:12.0 subsystem <- 8086/02f9
1464 20:54:47.707892 PCI: 00:12.0 cmd <- 02
1465 20:54:47.711486 PCI: 00:14.0 subsystem <- 8086/02ed
1466 20:54:47.714650 PCI: 00:14.0 cmd <- 02
1467 20:54:47.714748 PCI: 00:14.2 cmd <- 02
1468 20:54:47.717832
1469 20:54:47.721335 PCI: 00:14.3 subsystem <- 8086/02f0
1470 20:54:47.721432 PCI: 00:14.3 cmd <- 02
1471 20:54:47.728010 PCI: 00:15.0 subsystem <- 8086/02e8
1472 20:54:47.728118 PCI: 00:15.0 cmd <- 02
1473 20:54:47.731774 PCI: 00:15.1 subsystem <- 8086/02e9
1474 20:54:47.734775 PCI: 00:15.1 cmd <- 02
1475 20:54:47.738183 PCI: 00:16.0 subsystem <- 8086/02e0
1476 20:54:47.741335 PCI: 00:16.0 cmd <- 02
1477 20:54:47.744234 PCI: 00:17.0 subsystem <- 8086/02d3
1478 20:54:47.747993 PCI: 00:17.0 cmd <- 03
1479 20:54:47.751185 PCI: 00:19.0 subsystem <- 8086/02c5
1480 20:54:47.754640 PCI: 00:19.0 cmd <- 02
1481 20:54:47.757540 PCI: 00:1d.0 bridge ctrl <- 0013
1482 20:54:47.761218 PCI: 00:1d.0 subsystem <- 8086/02b0
1483 20:54:47.764236 PCI: 00:1d.0 cmd <- 06
1484 20:54:47.767829 PCI: 00:1e.0 subsystem <- 8086/02a8
1485 20:54:47.770910 PCI: 00:1e.0 cmd <- 06
1486 20:54:47.774512 PCI: 00:1e.2 subsystem <- 8086/02aa
1487 20:54:47.777605 PCI: 00:1e.2 cmd <- 06
1488 20:54:47.781143 PCI: 00:1e.3 subsystem <- 8086/02ab
1489 20:54:47.781240 PCI: 00:1e.3 cmd <- 02
1490 20:54:47.787824 PCI: 00:1f.0 subsystem <- 8086/0284
1491 20:54:47.787923 PCI: 00:1f.0 cmd <- 407
1492 20:54:47.790778 PCI: 00:1f.3 subsystem <- 8086/02c8
1493 20:54:47.794531
1494 20:54:47.794629 PCI: 00:1f.3 cmd <- 02
1495 20:54:47.797510 PCI: 00:1f.4 subsystem <- 8086/02a3
1496 20:54:47.800457 PCI: 00:1f.4 cmd <- 03
1497 20:54:47.804154 PCI: 00:1f.5 subsystem <- 8086/02a4
1498 20:54:47.807241 PCI: 00:1f.5 cmd <- 406
1499 20:54:47.816427 PCI: 01:00.0 cmd <- 02
1500 20:54:47.821890 done.
1501 20:54:47.829994 ME: Version: 14.0.39.1367
1502 20:54:47.836479 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 8
1503 20:54:47.839605 Initializing devices...
1504 20:54:47.839697 Root Device init ...
1505 20:54:47.846287 Chrome EC: Set SMI mask to 0x0000000000000000
1506 20:54:47.849879 Chrome EC: clear events_b mask to 0x0000000000000000
1507 20:54:47.856695 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1508 20:54:47.863276 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1509 20:54:47.869367 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1510 20:54:47.872851 Chrome EC: Set WAKE mask to 0x0000000000000000
1511 20:54:47.876455 Root Device init finished in 35185 usecs
1512 20:54:47.879956 CPU_CLUSTER: 0 init ...
1513 20:54:47.883292 CPU_CLUSTER: 0 init finished in 2438 usecs
1514 20:54:47.886440
1515 20:54:47.890931 PCI: 00:00.0 init ...
1516 20:54:47.893968 CPU TDP: 15 Watts
1517 20:54:47.897547 CPU PL2 = 64 Watts
1518 20:54:47.900669 PCI: 00:00.0 init finished in 7080 usecs
1519 20:54:47.903681 PCI: 00:02.0 init ...
1520 20:54:47.907433 PCI: 00:02.0 init finished in 2245 usecs
1521 20:54:47.910660 PCI: 00:08.0 init ...
1522 20:54:47.913810 PCI: 00:08.0 init finished in 2252 usecs
1523 20:54:47.917376 PCI: 00:12.0 init ...
1524 20:54:47.920402 PCI: 00:12.0 init finished in 2243 usecs
1525 20:54:47.923517 PCI: 00:14.0 init ...
1526 20:54:47.927118 PCI: 00:14.0 init finished in 2244 usecs
1527 20:54:47.930221 PCI: 00:14.2 init ...
1528 20:54:47.934125 PCI: 00:14.2 init finished in 2253 usecs
1529 20:54:47.936990 PCI: 00:14.3 init ...
1530 20:54:47.940585 PCI: 00:14.3 init finished in 2270 usecs
1531 20:54:47.943718 PCI: 00:15.0 init ...
1532 20:54:47.947278 DW I2C bus 0 at 0xd121f000 (400 KHz)
1533 20:54:47.950264 PCI: 00:15.0 init finished in 5969 usecs
1534 20:54:47.953282 PCI: 00:15.1 init ...
1535 20:54:47.956940 DW I2C bus 1 at 0xd1220000 (400 KHz)
1536 20:54:47.960108 PCI: 00:15.1 init finished in 5977 usecs
1537 20:54:47.963556
1538 20:54:47.963654 PCI: 00:16.0 init ...
1539 20:54:47.970188 PCI: 00:16.0 init finished in 2243 usecs
1540 20:54:47.970287 PCI: 00:19.0 init ...
1541 20:54:47.973330
1542 20:54:47.976350 DW I2C bus 4 at 0xd1222000 (400 KHz)
1543 20:54:47.980008 PCI: 00:19.0 init finished in 5978 usecs
1544 20:54:47.983048 PCI: 00:1d.0 init ...
1545 20:54:47.986694 Initializing PCH PCIe bridge.
1546 20:54:47.989701 PCI: 00:1d.0 init finished in 5286 usecs
1547 20:54:47.992884 PCI: 00:1f.0 init ...
1548 20:54:47.996572 IOAPIC: Initializing IOAPIC at 0xfec00000
1549 20:54:48.003295 IOAPIC: Bootstrap Processor Local APIC = 0x00
1550 20:54:48.003395 IOAPIC: ID = 0x02
1551 20:54:48.006387 IOAPIC: Dumping registers
1552 20:54:48.009476 reg 0x0000: 0x02000000
1553 20:54:48.013263 reg 0x0001: 0x00770020
1554 20:54:48.013365 reg 0x0002: 0x00000000
1555 20:54:48.019254 PCI: 00:1f.0 init finished in 23545 usecs
1556 20:54:48.022933 PCI: 00:1f.4 init ...
1557 20:54:48.026037 PCI: 00:1f.4 init finished in 2263 usecs
1558 20:54:48.036470 PCI: 01:00.0 init ...
1559 20:54:48.039971 PCI: 01:00.0 init finished in 2244 usecs
1560 20:54:48.044483 PNP: 0c09.0 init ...
1561 20:54:48.047302 Google Chrome EC uptime: 11.062 seconds
1562 20:54:48.054214 Google Chrome AP resets since EC boot: 0
1563 20:54:48.057251 Google Chrome most recent AP reset causes:
1564 20:54:48.063900 Google Chrome EC reset flags at last EC boot: reset-pin
1565 20:54:48.067536 PNP: 0c09.0 init finished in 20577 usecs
1566 20:54:48.070443 Devices initialized
1567 20:54:48.070529 Show all devs... After init.
1568 20:54:48.074215
1569 20:54:48.074299 Root Device: enabled 1
1570 20:54:48.077178 CPU_CLUSTER: 0: enabled 1
1571 20:54:48.080292 DOMAIN: 0000: enabled 1
1572 20:54:48.080379 APIC: 00: enabled 1
1573 20:54:48.083845 PCI: 00:00.0: enabled 1
1574 20:54:48.086856 PCI: 00:02.0: enabled 1
1575 20:54:48.090529 PCI: 00:04.0: enabled 0
1576 20:54:48.090612 PCI: 00:05.0: enabled 0
1577 20:54:48.093743 PCI: 00:12.0: enabled 1
1578 20:54:48.096843 PCI: 00:12.5: enabled 0
1579 20:54:48.100466 PCI: 00:12.6: enabled 0
1580 20:54:48.100561 PCI: 00:14.0: enabled 1
1581 20:54:48.103635 PCI: 00:14.1: enabled 0
1582 20:54:48.107120 PCI: 00:14.3: enabled 1
1583 20:54:48.107217 PCI: 00:14.5: enabled 0
1584 20:54:48.110408
1585 20:54:48.110495 PCI: 00:15.0: enabled 1
1586 20:54:48.113483 PCI: 00:15.1: enabled 1
1587 20:54:48.117064 PCI: 00:15.2: enabled 0
1588 20:54:48.117150 PCI: 00:15.3: enabled 0
1589 20:54:48.120261 PCI: 00:16.0: enabled 1
1590 20:54:48.123313 PCI: 00:16.1: enabled 0
1591 20:54:48.126986 PCI: 00:16.2: enabled 0
1592 20:54:48.127081 PCI: 00:16.3: enabled 0
1593 20:54:48.130134 PCI: 00:16.4: enabled 0
1594 20:54:48.133180 PCI: 00:16.5: enabled 0
1595 20:54:48.136856 PCI: 00:17.0: enabled 1
1596 20:54:48.136951 PCI: 00:19.0: enabled 1
1597 20:54:48.139995 PCI: 00:19.1: enabled 0
1598 20:54:48.143484 PCI: 00:19.2: enabled 0
1599 20:54:48.146476 PCI: 00:1a.0: enabled 0
1600 20:54:48.146571 PCI: 00:1c.0: enabled 0
1601 20:54:48.150042 PCI: 00:1c.1: enabled 0
1602 20:54:48.153215 PCI: 00:1c.2: enabled 0
1603 20:54:48.153310 PCI: 00:1c.3: enabled 0
1604 20:54:48.156344 PCI: 00:1c.4: enabled 0
1605 20:54:48.159896 PCI: 00:1c.5: enabled 0
1606 20:54:48.162949 PCI: 00:1c.6: enabled 0
1607 20:54:48.163044 PCI: 00:1c.7: enabled 0
1608 20:54:48.166581 PCI: 00:1d.0: enabled 1
1609 20:54:48.169703 PCI: 00:1d.1: enabled 0
1610 20:54:48.173125 PCI: 00:1d.2: enabled 0
1611 20:54:48.173234 PCI: 00:1d.3: enabled 0
1612 20:54:48.176058 PCI: 00:1d.4: enabled 0
1613 20:54:48.179640 PCI: 00:1d.5: enabled 0
1614 20:54:48.182972 PCI: 00:1e.0: enabled 1
1615 20:54:48.183068 PCI: 00:1e.1: enabled 0
1616 20:54:48.185891 PCI: 00:1e.2: enabled 1
1617 20:54:48.189416 PCI: 00:1e.3: enabled 1
1618 20:54:48.192474 PCI: 00:1f.0: enabled 1
1619 20:54:48.192570 PCI: 00:1f.1: enabled 0
1620 20:54:48.196283 PCI: 00:1f.2: enabled 0
1621 20:54:48.199405 PCI: 00:1f.3: enabled 1
1622 20:54:48.199501 PCI: 00:1f.4: enabled 1
1623 20:54:48.202415
1624 20:54:48.202513 PCI: 00:1f.5: enabled 1
1625 20:54:48.206091 PCI: 00:1f.6: enabled 0
1626 20:54:48.209158 USB0 port 0: enabled 1
1627 20:54:48.209255 I2C: 01:15: enabled 1
1628 20:54:48.212323 I2C: 02:5d: enabled 1
1629 20:54:48.216081 GENERIC: 0.0: enabled 1
1630 20:54:48.216178 I2C: 03:1a: enabled 1
1631 20:54:48.219206 I2C: 03:38: enabled 1
1632 20:54:48.222206 I2C: 03:39: enabled 1
1633 20:54:48.222305 I2C: 03:3a: enabled 1
1634 20:54:48.226014
1635 20:54:48.226110 I2C: 03:3b: enabled 1
1636 20:54:48.229137 PCI: 00:00.0: enabled 1
1637 20:54:48.229234 SPI: 00: enabled 1
1638 20:54:48.232173
1639 20:54:48.232270 SPI: 01: enabled 1
1640 20:54:48.235717 PNP: 0c09.0: enabled 1
1641 20:54:48.235814 USB2 port 0: enabled 1
1642 20:54:48.239096
1643 20:54:48.239192 USB2 port 1: enabled 1
1644 20:54:48.241986 USB2 port 2: enabled 0
1645 20:54:48.245578 USB2 port 3: enabled 0
1646 20:54:48.245674 USB2 port 5: enabled 0
1647 20:54:48.248764 USB2 port 6: enabled 1
1648 20:54:48.252272 USB2 port 9: enabled 1
1649 20:54:48.252368 USB3 port 0: enabled 1
1650 20:54:48.255493 USB3 port 1: enabled 1
1651 20:54:48.258676 USB3 port 2: enabled 1
1652 20:54:48.262108 USB3 port 3: enabled 1
1653 20:54:48.262204 USB3 port 4: enabled 0
1654 20:54:48.265081 APIC: 05: enabled 1
1655 20:54:48.268685 APIC: 04: enabled 1
1656 20:54:48.268781 APIC: 01: enabled 1
1657 20:54:48.271744 APIC: 06: enabled 1
1658 20:54:48.271839 APIC: 07: enabled 1
1659 20:54:48.275242 APIC: 03: enabled 1
1660 20:54:48.278386 APIC: 02: enabled 1
1661 20:54:48.278484 PCI: 00:08.0: enabled 1
1662 20:54:48.281918 PCI: 00:14.2: enabled 1
1663 20:54:48.285008 PCI: 01:00.0: enabled 1
1664 20:54:48.288628 Disabling ACPI via APMC:
1665 20:54:48.291434 done.
1666 20:54:48.295120 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1667 20:54:48.298212 ELOG: NV offset 0xaf0000 size 0x4000
1668 20:54:48.305559 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1669 20:54:48.312460 ELOG: Event(17) added with size 13 at 2023-01-18 20:54:48 UTC
1670 20:54:48.318887 ELOG: Event(92) added with size 9 at 2023-01-18 20:54:48 UTC
1671 20:54:48.325729 ELOG: Event(93) added with size 9 at 2023-01-18 20:54:48 UTC
1672 20:54:48.332634 ELOG: Event(9A) added with size 9 at 2023-01-18 20:54:48 UTC
1673 20:54:48.338681 ELOG: Event(9E) added with size 10 at 2023-01-18 20:54:48 UTC
1674 20:54:48.345556 ELOG: Event(9F) added with size 14 at 2023-01-18 20:54:48 UTC
1675 20:54:48.348475 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1676 20:54:48.355891 ELOG: Event(A1) added with size 10 at 2023-01-18 20:54:48 UTC
1677 20:54:48.366360 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1678 20:54:48.372522 ELOG: Event(A0) added with size 9 at 2023-01-18 20:54:48 UTC
1679 20:54:48.375991 elog_add_boot_reason: Logged dev mode boot
1680 20:54:48.379111 Finalize devices...
1681 20:54:48.379213 PCI: 00:17.0 final
1682 20:54:48.382672 Devices finalized
1683 20:54:48.385639 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1684 20:54:48.392323 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1685 20:54:48.395926 ME: HFSTS1 : 0x90000245
1686 20:54:48.399000 ME: HFSTS2 : 0x3B850126
1687 20:54:48.405647 ME: HFSTS3 : 0x00000020
1688 20:54:48.408763 ME: HFSTS4 : 0x00004800
1689 20:54:48.412472 ME: HFSTS5 : 0x00000000
1690 20:54:48.415459 ME: HFSTS6 : 0x40400006
1691 20:54:48.418601 ME: Manufacturing Mode : NO
1692 20:54:48.422407 ME: FW Partition Table : OK
1693 20:54:48.425357 ME: Bringup Loader Failure : NO
1694 20:54:48.429065 ME: Firmware Init Complete : YES
1695 20:54:48.432071 ME: Boot Options Present : NO
1696 20:54:48.435260 ME: Update In Progress : NO
1697 20:54:48.438899 ME: D0i3 Support : YES
1698 20:54:48.441964 ME: Low Power State Enabled : NO
1699 20:54:48.445681 ME: CPU Replaced : NO
1700 20:54:48.448639 ME: CPU Replacement Valid : YES
1701 20:54:48.452340 ME: Current Working State : 5
1702 20:54:48.455427 ME: Current Operation State : 1
1703 20:54:48.458405 ME: Current Operation Mode : 0
1704 20:54:48.462021 ME: Error Code : 0
1705 20:54:48.465126 ME: CPU Debug Disabled : YES
1706 20:54:48.468847 ME: TXT Support : NO
1707 20:54:48.475368 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1708 20:54:48.481455 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1709 20:54:48.481569 CBFS @ c08000 size 3f8000
1710 20:54:48.488147 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1711 20:54:48.491915 CBFS: Locating 'fallback/dsdt.aml'
1712 20:54:48.494985 CBFS: Found @ offset 10bb80 size 3fa5
1713 20:54:48.501552 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1714 20:54:48.504642 CBFS @ c08000 size 3f8000
1715 20:54:48.508327 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1716 20:54:48.511372 CBFS: Locating 'fallback/slic'
1717 20:54:48.516751 CBFS: 'fallback/slic' not found.
1718 20:54:48.523495 ACPI: Writing ACPI tables at 99b3e000.
1719 20:54:48.523614 ACPI: * FACS
1720 20:54:48.526588 ACPI: * DSDT
1721 20:54:48.530370 Ramoops buffer: 0x100000@0x99a3d000.
1722 20:54:48.533387 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1723 20:54:48.539605 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1724 20:54:48.543472 Google Chrome EC: version:
1725 20:54:48.546441 ro: helios_v2.0.2659-56403530b
1726 20:54:48.549512 rw: helios_v2.0.2849-c41de27e7d
1727 20:54:48.549600 running image: 1
1728 20:54:48.554399 ACPI: * FADT
1729 20:54:48.554490 SCI is IRQ9
1730 20:54:48.557473 ACPI: added table 1/32, length now 40
1731 20:54:48.560506
1732 20:54:48.560595 ACPI: * SSDT
1733 20:54:48.564264 Found 1 CPU(s) with 8 core(s) each.
1734 20:54:48.567321 Error: Could not locate 'wifi_sar' in VPD.
1735 20:54:48.573749 Checking CBFS for default SAR values
1736 20:54:48.577291 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1737 20:54:48.580368 CBFS @ c08000 size 3f8000
1738 20:54:48.587300 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1739 20:54:48.590380 CBFS: Locating 'wifi_sar_defaults.hex'
1740 20:54:48.594029 CBFS: Found @ offset 5fac0 size 77
1741 20:54:48.597116 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1742 20:54:48.603864 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1743 20:54:48.606900 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1744 20:54:48.613534 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1745 20:54:48.616602 failed to find key in VPD: dsm_calib_r0_0
1746 20:54:48.626589 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1747 20:54:48.630354 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1748 20:54:48.633328 failed to find key in VPD: dsm_calib_r0_1
1749 20:54:48.636440
1750 20:54:48.643054 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1751 20:54:48.649808 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1752 20:54:48.652866 failed to find key in VPD: dsm_calib_r0_2
1753 20:54:48.663335 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1754 20:54:48.666442 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1755 20:54:48.673268 failed to find key in VPD: dsm_calib_r0_3
1756 20:54:48.679846 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1757 20:54:48.686074 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1758 20:54:48.689686 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1759 20:54:48.696144 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1760 20:54:48.699727 EC returned error result code 1
1761 20:54:48.703450 EC returned error result code 1
1762 20:54:48.706502 EC returned error result code 1
1763 20:54:48.710282 PS2K: Bad resp from EC. Vivaldi disabled!
1764 20:54:48.716494 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1765 20:54:48.723472 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1766 20:54:48.726693 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1767 20:54:48.733412 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1768 20:54:48.736477 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1769 20:54:48.743299 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1770 20:54:48.750202 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1771 20:54:48.756677 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1772 20:54:48.759733 ACPI: added table 2/32, length now 44
1773 20:54:48.759829 ACPI: * MCFG
1774 20:54:48.763109 ACPI: added table 3/32, length now 48
1775 20:54:48.766370
1776 20:54:48.766467 ACPI: * TPM2
1777 20:54:48.769437 TPM2 log created at 99a2d000
1778 20:54:48.773153 ACPI: added table 4/32, length now 52
1779 20:54:48.776184 ACPI: * MADT
1780 20:54:48.776275 SCI is IRQ9
1781 20:54:48.779253 ACPI: added table 5/32, length now 56
1782 20:54:48.782823 current = 99b43ac0
1783 20:54:48.782925 ACPI: * DMAR
1784 20:54:48.786442 ACPI: added table 6/32, length now 60
1785 20:54:48.789445 ACPI: * IGD OpRegion
1786 20:54:48.792515 GMA: Found VBT in CBFS
1787 20:54:48.796060 GMA: Found valid VBT in CBFS
1788 20:54:48.799184 ACPI: added table 7/32, length now 64
1789 20:54:48.799279 ACPI: * HPET
1790 20:54:48.802698 ACPI: added table 8/32, length now 68
1791 20:54:48.805997 ACPI: done.
1792 20:54:48.809530 ACPI tables: 31744 bytes.
1793 20:54:48.812658 smbios_write_tables: 99a2c000
1794 20:54:48.815638 EC returned error result code 3
1795 20:54:48.819389 Couldn't obtain OEM name from CBI
1796 20:54:48.822573 Create SMBIOS type 17
1797 20:54:48.825751 PCI: 00:00.0 (Intel Cannonlake)
1798 20:54:48.825838 PCI: 00:14.3 (Intel WiFi)
1799 20:54:48.829215 SMBIOS tables: 939 bytes.
1800 20:54:48.832264 Writing table forward entry at 0x00000500
1801 20:54:48.839040 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1802 20:54:48.842088 Writing coreboot table at 0x99b62000
1803 20:54:48.848664 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1804 20:54:48.851819 1. 0000000000001000-000000000009ffff: RAM
1805 20:54:48.858568 2. 00000000000a0000-00000000000fffff: RESERVED
1806 20:54:48.862188 3. 0000000000100000-0000000099a2bfff: RAM
1807 20:54:48.868842 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1808 20:54:48.871963 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1809 20:54:48.878505 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1810 20:54:48.885188 7. 000000009a000000-000000009f7fffff: RESERVED
1811 20:54:48.888100 8. 00000000e0000000-00000000efffffff: RESERVED
1812 20:54:48.894804 9. 00000000fc000000-00000000fc000fff: RESERVED
1813 20:54:48.898479 10. 00000000fe000000-00000000fe00ffff: RESERVED
1814 20:54:48.901432 11. 00000000fed10000-00000000fed17fff: RESERVED
1815 20:54:48.908103 12. 00000000fed80000-00000000fed83fff: RESERVED
1816 20:54:48.911735 13. 00000000fed90000-00000000fed91fff: RESERVED
1817 20:54:48.917893 14. 00000000feda0000-00000000feda1fff: RESERVED
1818 20:54:48.921532 15. 0000000100000000-000000045e7fffff: RAM
1819 20:54:48.924823 Graphics framebuffer located at 0xc0000000
1820 20:54:48.927801 Passing 5 GPIOs to payload:
1821 20:54:48.934434 NAME | PORT | POLARITY | VALUE
1822 20:54:48.937967 write protect | undefined | high | low
1823 20:54:48.944368 lid | undefined | high | high
1824 20:54:48.951276 power | undefined | high | low
1825 20:54:48.954294 oprom | undefined | high | low
1826 20:54:48.960933 EC in RW | 0x000000cb | high | low
1827 20:54:48.961024 Board ID: 4
1828 20:54:48.968118 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1829 20:54:48.968207 CBFS @ c08000 size 3f8000
1830 20:54:48.974239 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1831 20:54:48.980990 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1832 20:54:48.984547 coreboot table: 1492 bytes.
1833 20:54:48.987432 IMD ROOT 0. 99fff000 00001000
1834 20:54:48.991062 IMD SMALL 1. 99ffe000 00001000
1835 20:54:48.994137 FSP MEMORY 2. 99c4e000 003b0000
1836 20:54:48.997875 CONSOLE 3. 99c2e000 00020000
1837 20:54:49.000845 FMAP 4. 99c2d000 0000054e
1838 20:54:49.003762 TIME STAMP 5. 99c2c000 00000910
1839 20:54:49.007547 VBOOT WORK 6. 99c18000 00014000
1840 20:54:49.010595 MRC DATA 7. 99c16000 00001958
1841 20:54:49.013647 ROMSTG STCK 8. 99c15000 00001000
1842 20:54:49.016991 AFTER CAR 9. 99c0b000 0000a000
1843 20:54:49.020506 RAMSTAGE 10. 99baf000 0005c000
1844 20:54:49.024059 REFCODE 11. 99b7a000 00035000
1845 20:54:49.027222 SMM BACKUP 12. 99b6a000 00010000
1846 20:54:49.031101 COREBOOT 13. 99b62000 00008000
1847 20:54:49.034042 ACPI 14. 99b3e000 00024000
1848 20:54:49.037083 ACPI GNVS 15. 99b3d000 00001000
1849 20:54:49.040330 RAMOOPS 16. 99a3d000 00100000
1850 20:54:49.043942 TPM2 TCGLOG17. 99a2d000 00010000
1851 20:54:49.046953 SMBIOS 18. 99a2c000 00000800
1852 20:54:49.050753 IMD small region:
1853 20:54:49.053723 IMD ROOT 0. 99ffec00 00000400
1854 20:54:49.056905 FSP RUNTIME 1. 99ffebe0 00000004
1855 20:54:49.060625 EC HOSTEVENT 2. 99ffebc0 00000008
1856 20:54:49.063668 POWER STATE 3. 99ffeb80 00000040
1857 20:54:49.066756 ROMSTAGE 4. 99ffeb60 00000004
1858 20:54:49.070518 MEM INFO 5. 99ffe9a0 000001b9
1859 20:54:49.073444 VPD 6. 99ffe920 0000006c
1860 20:54:49.076696 MTRR: Physical address space:
1861 20:54:49.083245 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1862 20:54:49.089934 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1863 20:54:49.097008 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1864 20:54:49.103284 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1865 20:54:49.106768 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1866 20:54:49.113045 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1867 20:54:49.119639 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1868 20:54:49.123038 MTRR: Fixed MSR 0x250 0x0606060606060606
1869 20:54:49.129729 MTRR: Fixed MSR 0x258 0x0606060606060606
1870 20:54:49.132930 MTRR: Fixed MSR 0x259 0x0000000000000000
1871 20:54:49.135940 MTRR: Fixed MSR 0x268 0x0606060606060606
1872 20:54:49.139631 MTRR: Fixed MSR 0x269 0x0606060606060606
1873 20:54:49.146368 MTRR: Fixed MSR 0x26a 0x0606060606060606
1874 20:54:49.149514 MTRR: Fixed MSR 0x26b 0x0606060606060606
1875 20:54:49.153225 MTRR: Fixed MSR 0x26c 0x0606060606060606
1876 20:54:49.156192 MTRR: Fixed MSR 0x26d 0x0606060606060606
1877 20:54:49.162715 MTRR: Fixed MSR 0x26e 0x0606060606060606
1878 20:54:49.166356 MTRR: Fixed MSR 0x26f 0x0606060606060606
1879 20:54:49.169324 call enable_fixed_mtrr()
1880 20:54:49.172513 CPU physical address size: 39 bits
1881 20:54:49.176041 MTRR: default type WB/UC MTRR counts: 6/8.
1882 20:54:49.179290 MTRR: WB selected as default type.
1883 20:54:49.185911 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1884 20:54:49.192704 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1885 20:54:49.199405 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1886 20:54:49.205582 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1887 20:54:49.212120 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1888 20:54:49.218755 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1889 20:54:49.222509 MTRR: Fixed MSR 0x250 0x0606060606060606
1890 20:54:49.225417 MTRR: Fixed MSR 0x258 0x0606060606060606
1891 20:54:49.232232 MTRR: Fixed MSR 0x259 0x0000000000000000
1892 20:54:49.235467 MTRR: Fixed MSR 0x268 0x0606060606060606
1893 20:54:49.239204 MTRR: Fixed MSR 0x269 0x0606060606060606
1894 20:54:49.242111 MTRR: Fixed MSR 0x26a 0x0606060606060606
1895 20:54:49.245159 MTRR: Fixed MSR 0x26b 0x0606060606060606
1896 20:54:49.248954
1897 20:54:49.251941 MTRR: Fixed MSR 0x26c 0x0606060606060606
1898 20:54:49.255583 MTRR: Fixed MSR 0x26d 0x0606060606060606
1899 20:54:49.258761 MTRR: Fixed MSR 0x26e 0x0606060606060606
1900 20:54:49.261861 MTRR: Fixed MSR 0x26f 0x0606060606060606
1901 20:54:49.261958
1902 20:54:49.265448
1903 20:54:49.265546 MTRR check
1904 20:54:49.268464 Fixed MTRRs : Enabled
1905 20:54:49.268563 Variable MTRRs: Enabled
1906 20:54:49.268644
1907 20:54:49.272156 call enable_fixed_mtrr()
1908 20:54:49.278728 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1909 20:54:49.281923 CPU physical address size: 39 bits
1910 20:54:49.288064 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1911 20:54:49.291661 MTRR: Fixed MSR 0x250 0x0606060606060606
1912 20:54:49.294872 MTRR: Fixed MSR 0x250 0x0606060606060606
1913 20:54:49.298466 MTRR: Fixed MSR 0x258 0x0606060606060606
1914 20:54:49.301520 MTRR: Fixed MSR 0x259 0x0000000000000000
1915 20:54:49.304576
1916 20:54:49.308222 MTRR: Fixed MSR 0x268 0x0606060606060606
1917 20:54:49.311232 MTRR: Fixed MSR 0x269 0x0606060606060606
1918 20:54:49.314716 MTRR: Fixed MSR 0x26a 0x0606060606060606
1919 20:54:49.317947 MTRR: Fixed MSR 0x26b 0x0606060606060606
1920 20:54:49.324653 MTRR: Fixed MSR 0x26c 0x0606060606060606
1921 20:54:49.327873 MTRR: Fixed MSR 0x26d 0x0606060606060606
1922 20:54:49.331049 MTRR: Fixed MSR 0x26e 0x0606060606060606
1923 20:54:49.334680 MTRR: Fixed MSR 0x26f 0x0606060606060606
1924 20:54:49.340930 MTRR: Fixed MSR 0x258 0x0606060606060606
1925 20:54:49.344589 MTRR: Fixed MSR 0x259 0x0000000000000000
1926 20:54:49.347579 MTRR: Fixed MSR 0x268 0x0606060606060606
1927 20:54:49.350701 MTRR: Fixed MSR 0x269 0x0606060606060606
1928 20:54:49.354289
1929 20:54:49.357306 MTRR: Fixed MSR 0x26a 0x0606060606060606
1930 20:54:49.360998 MTRR: Fixed MSR 0x26b 0x0606060606060606
1931 20:54:49.364069 MTRR: Fixed MSR 0x26c 0x0606060606060606
1932 20:54:49.367719 MTRR: Fixed MSR 0x26d 0x0606060606060606
1933 20:54:49.373815 MTRR: Fixed MSR 0x26e 0x0606060606060606
1934 20:54:49.377343 MTRR: Fixed MSR 0x26f 0x0606060606060606
1935 20:54:49.381019 call enable_fixed_mtrr()
1936 20:54:49.384085 MTRR: Fixed MSR 0x250 0x0606060606060606
1937 20:54:49.387075 MTRR: Fixed MSR 0x250 0x0606060606060606
1938 20:54:49.390860 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 20:54:49.397479 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 20:54:49.400507 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 20:54:49.404350 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 20:54:49.407332 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 20:54:49.414051 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 20:54:49.417178 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 20:54:49.420795 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 20:54:49.423883 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 20:54:49.430361 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 20:54:49.433501 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 20:54:49.437267 call enable_fixed_mtrr()
1950 20:54:49.440281 MTRR: Fixed MSR 0x259 0x0000000000000000
1951 20:54:49.443929 MTRR: Fixed MSR 0x268 0x0606060606060606
1952 20:54:49.446908 MTRR: Fixed MSR 0x269 0x0606060606060606
1953 20:54:49.453373 MTRR: Fixed MSR 0x26a 0x0606060606060606
1954 20:54:49.456995 MTRR: Fixed MSR 0x26b 0x0606060606060606
1955 20:54:49.460054 MTRR: Fixed MSR 0x26c 0x0606060606060606
1956 20:54:49.463650 MTRR: Fixed MSR 0x26d 0x0606060606060606
1957 20:54:49.469817 MTRR: Fixed MSR 0x26e 0x0606060606060606
1958 20:54:49.473449 MTRR: Fixed MSR 0x26f 0x0606060606060606
1959 20:54:49.476500 CPU physical address size: 39 bits
1960 20:54:49.480258 call enable_fixed_mtrr()
1961 20:54:49.483269 call enable_fixed_mtrr()
1962 20:54:49.486279 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 20:54:49.489993 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 20:54:49.492898 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 20:54:49.496507 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 20:54:49.500021
1967 20:54:49.503133 MTRR: Fixed MSR 0x268 0x0606060606060606
1968 20:54:49.506711 MTRR: Fixed MSR 0x269 0x0606060606060606
1969 20:54:49.509916 MTRR: Fixed MSR 0x26a 0x0606060606060606
1970 20:54:49.513444 MTRR: Fixed MSR 0x26b 0x0606060606060606
1971 20:54:49.519542 MTRR: Fixed MSR 0x26c 0x0606060606060606
1972 20:54:49.523243 MTRR: Fixed MSR 0x26d 0x0606060606060606
1973 20:54:49.526217 MTRR: Fixed MSR 0x26e 0x0606060606060606
1974 20:54:49.529383 MTRR: Fixed MSR 0x26f 0x0606060606060606
1975 20:54:49.536012 MTRR: Fixed MSR 0x258 0x0606060606060606
1976 20:54:49.536115 call enable_fixed_mtrr()
1977 20:54:49.539658
1978 20:54:49.542805 MTRR: Fixed MSR 0x259 0x0000000000000000
1979 20:54:49.545878 MTRR: Fixed MSR 0x268 0x0606060606060606
1980 20:54:49.549380 MTRR: Fixed MSR 0x269 0x0606060606060606
1981 20:54:49.552436 MTRR: Fixed MSR 0x26a 0x0606060606060606
1982 20:54:49.559149 MTRR: Fixed MSR 0x26b 0x0606060606060606
1983 20:54:49.562520 MTRR: Fixed MSR 0x26c 0x0606060606060606
1984 20:54:49.565568 MTRR: Fixed MSR 0x26d 0x0606060606060606
1985 20:54:49.569242 MTRR: Fixed MSR 0x26e 0x0606060606060606
1986 20:54:49.575907 MTRR: Fixed MSR 0x26f 0x0606060606060606
1987 20:54:49.578863 CPU physical address size: 39 bits
1988 20:54:49.582517 call enable_fixed_mtrr()
1989 20:54:49.585776 CPU physical address size: 39 bits
1990 20:54:49.588765 CPU physical address size: 39 bits
1991 20:54:49.592355 CBFS @ c08000 size 3f8000
1992 20:54:49.595394 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1993 20:54:49.599094 CBFS: Locating 'fallback/payload'
1994 20:54:49.605117 CPU physical address size: 39 bits
1995 20:54:49.608803 CPU physical address size: 39 bits
1996 20:54:49.611929 CBFS: Found @ offset 1c96c0 size 3f798
1997 20:54:49.615448 Checking segment from ROM address 0xffdd16f8
1998 20:54:49.619013 Checking segment from ROM address 0xffdd1714
1999 20:54:49.625208 Loading segment from ROM address 0xffdd16f8
2000 20:54:49.628997 code (compression=0)
2001 20:54:49.635408 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2002 20:54:49.645304 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2003 20:54:49.645403 it's not compressed!
2004 20:54:49.738349 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2005 20:54:49.745292 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2006 20:54:49.748467 Loading segment from ROM address 0xffdd1714
2007 20:54:49.751485 Entry Point 0x30000000
2008 20:54:49.755073 Loaded segments
2009 20:54:49.760704 Finalizing chipset.
2010 20:54:49.763764 Finalizing SMM.
2011 20:54:49.767037 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2012 20:54:49.770589 mp_park_aps done after 0 msecs.
2013 20:54:49.776693 Jumping to boot code at 30000000(99b62000)
2014 20:54:49.783505 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2015 20:54:49.783614
2016 20:54:49.783694
2017 20:54:49.783772
2018 20:54:49.787120 Starting depthcharge on Helios...
2019 20:54:49.787207
2020 20:54:49.787596 end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
2021 20:54:49.787724 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2022 20:54:49.787823 Setting prompt string to ['hatch:']
2023 20:54:49.787917 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2024 20:54:49.797128 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2025 20:54:49.797243
2026 20:54:49.803230 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2027 20:54:49.803340
2028 20:54:49.809946 board_setup: Info: eMMC controller not present; skipping
2029 20:54:49.810083
2030 20:54:49.813487 New NVMe Controller 0x30053ac0 @ 00:1d:00
2031 20:54:49.813581
2032 20:54:49.820138 board_setup: Info: SDHCI controller not present; skipping
2033 20:54:49.820244
2034 20:54:49.826238 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2035 20:54:49.826343
2036 20:54:49.826424 Wipe memory regions:
2037 20:54:49.826498
2038 20:54:49.829912 [0x00000000001000, 0x000000000a0000)
2039 20:54:49.830012
2040 20:54:49.836338 [0x00000000100000, 0x00000030000000)
2041 20:54:49.836440
2042 20:54:49.902845 [0x00000030657430, 0x00000099a2c000)
2043 20:54:49.903005
2044 20:54:50.053065 [0x00000100000000, 0x0000045e800000)
2045 20:54:50.053221
2046 20:54:51.508627 R8152: Initializing
2047 20:54:51.508800
2048 20:54:51.511596 Version 9 (ocp_data = 6010)
2049 20:54:51.511695
2050 20:54:51.515912 R8152: Done initializing
2051 20:54:51.516009
2052 20:54:51.519026 Adding net device
2053 20:54:51.519123
2054 20:54:52.001943 R8152: Initializing
2055 20:54:52.002109
2056 20:54:52.005547 Version 6 (ocp_data = 5c30)
2057 20:54:52.005643
2058 20:54:52.008534 R8152: Done initializing
2059 20:54:52.008628
2060 20:54:52.015345 net_add_device: Attemp to include the same device
2061 20:54:52.015443
2062 20:54:52.022180 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2063 20:54:52.022275
2064 20:54:52.022348
2065 20:54:52.022426
2066 20:54:52.022708 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2068 20:54:52.123479 hatch: tftpboot 192.168.201.1 8785133/tftp-deploy-jpdylcxf/kernel/bzImage 8785133/tftp-deploy-jpdylcxf/kernel/cmdline 8785133/tftp-deploy-jpdylcxf/ramdisk/ramdisk.cpio.gz
2069 20:54:52.123650 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2070 20:54:52.123747 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2071 20:54:52.127797 tftpboot 192.168.201.1 8785133/tftp-deploy-jpdylcxf/kernel/bzImoy-jpdylcxf/kernel/cmdline 8785133/tftp-deploy-jpdylcxf/ramdisk/ramdisk.cpio.gz
2072 20:54:52.127900
2073 20:54:52.127974 Waiting for link
2074 20:54:52.128042
2075 20:54:52.328857 done.
2076 20:54:52.329020
2077 20:54:52.329100 MAC: 00:24:32:50:1a:59
2078 20:54:52.329172
2079 20:54:52.331855 Sending DHCP discover... done.
2080 20:54:52.331951
2081 20:54:52.334940 Waiting for reply... done.
2082 20:54:52.335036
2083 20:54:52.338508 Sending DHCP request... done.
2084 20:54:52.338604
2085 20:54:52.341611 Waiting for reply... done.
2086 20:54:52.341707
2087 20:54:52.344752 My ip is 192.168.201.14
2088 20:54:52.344851
2089 20:54:52.348285 The DHCP server ip is 192.168.201.1
2090 20:54:52.348383
2091 20:54:52.351361 TFTP server IP predefined by user: 192.168.201.1
2092 20:54:52.351457
2093 20:54:52.358178 Bootfile predefined by user: 8785133/tftp-deploy-jpdylcxf/kernel/bzImage
2094 20:54:52.358275
2095 20:54:52.361184 Sending tftp read request... done.
2096 20:54:52.361281
2097 20:54:52.368036 Waiting for the transfer...
2098 20:54:52.368142
2099 20:54:52.896150 00000000 ################################################################
2100 20:54:52.896316
2101 20:54:53.425206 00080000 ################################################################
2102 20:54:53.425373
2103 20:54:53.942750 00100000 ################################################################
2104 20:54:53.942913
2105 20:54:54.459243 00180000 ################################################################
2106 20:54:54.459403
2107 20:54:54.998744 00200000 ################################################################
2108 20:54:54.998908
2109 20:54:55.543892 00280000 ################################################################
2110 20:54:55.544069
2111 20:54:56.109588 00300000 ################################################################
2112 20:54:56.110114
2113 20:54:56.708745 00380000 ################################################################
2114 20:54:56.709264
2115 20:54:57.271228 00400000 ################################################################
2116 20:54:57.271395
2117 20:54:57.823874 00480000 ################################################################
2118 20:54:57.824024
2119 20:54:58.366210 00500000 ################################################################
2120 20:54:58.366369
2121 20:54:58.910303 00580000 ################################################################
2122 20:54:58.910460
2123 20:54:59.444687 00600000 ################################################################
2124 20:54:59.444838
2125 20:54:59.978699 00680000 ################################################################
2126 20:54:59.978864
2127 20:55:00.563969 00700000 ################################################################
2128 20:55:00.564541
2129 20:55:01.110128 00780000 ################################################################
2130 20:55:01.110294
2131 20:55:01.656095 00800000 ################################################################
2132 20:55:01.656640
2133 20:55:02.242389 00880000 ################################################################
2134 20:55:02.242949
2135 20:55:02.526290 00900000 ################################## done.
2136 20:55:02.526864
2137 20:55:02.529155 The bootfile was 9711616 bytes long.
2138 20:55:02.529728
2139 20:55:02.533128 Sending tftp read request... done.
2140 20:55:02.533567
2141 20:55:02.536261 Waiting for the transfer...
2142 20:55:02.536703
2143 20:55:03.143024 00000000 ################################################################
2144 20:55:03.143619
2145 20:55:03.740891 00080000 ################################################################
2146 20:55:03.741041
2147 20:55:04.342066 00100000 ################################################################
2148 20:55:04.342370
2149 20:55:04.921319 00180000 ################################################################
2150 20:55:04.921843
2151 20:55:05.473456 00200000 ################################################################
2152 20:55:05.473621
2153 20:55:06.012266 00280000 ################################################################
2154 20:55:06.012416
2155 20:55:06.584986 00300000 ################################################################
2156 20:55:06.585141
2157 20:55:07.130227 00380000 ################################################################
2158 20:55:07.130376
2159 20:55:07.659601 00400000 ################################################################
2160 20:55:07.659754
2161 20:55:08.202138 00480000 ################################################################
2162 20:55:08.202286
2163 20:55:08.729197 00500000 ################################################################
2164 20:55:08.729350
2165 20:55:09.267507 00580000 ################################################################
2166 20:55:09.267659
2167 20:55:09.802830 00600000 ################################################################
2168 20:55:09.802986
2169 20:55:10.322902 00680000 ################################################################
2170 20:55:10.323054
2171 20:55:10.866240 00700000 ################################################################
2172 20:55:10.866393
2173 20:55:11.401641 00780000 ################################################################
2174 20:55:11.401791
2175 20:55:11.595280 00800000 ######################## done.
2176 20:55:11.595431
2177 20:55:11.598209 Sending tftp read request... done.
2178 20:55:11.598313
2179 20:55:11.602156 Waiting for the transfer...
2180 20:55:11.602255
2181 20:55:11.602334 00000000 # done.
2182 20:55:11.602410
2183 20:55:11.612042 Command line loaded dynamically from TFTP file: 8785133/tftp-deploy-jpdylcxf/kernel/cmdline
2184 20:55:11.612149
2185 20:55:11.628197 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2186 20:55:11.628304
2187 20:55:11.634879 ec_init(0): CrosEC protocol v3 supported (256, 256)
2188 20:55:11.634985
2189 20:55:11.642808 Shutting down all USB controllers.
2190 20:55:11.642910
2191 20:55:11.643001 Removing current net device
2192 20:55:11.643082
2193 20:55:11.646031 Finalizing coreboot
2194 20:55:11.646129
2195 20:55:11.652951 Exiting depthcharge with code 4 at timestamp: 29207416
2196 20:55:11.653050
2197 20:55:11.653128
2198 20:55:11.653201 Starting kernel ...
2199 20:55:11.653310
2200 20:55:11.653386
2201 20:55:11.653804 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2202 20:55:11.653913 start: 2.2.5 auto-login-action (timeout 00:04:19) [common]
2203 20:55:11.654001 Setting prompt string to ['Linux version [0-9]']
2204 20:55:11.654101 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2205 20:55:11.654209 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2206 20:55:11.655886
2207 20:55:11.655981
2209 20:59:30.655112 end: 2.2.5 auto-login-action (duration 00:04:19) [common]
2211 20:59:30.657035 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 259 seconds'
2213 20:59:30.658467 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2216 20:59:30.659655 end: 2 depthcharge-action (duration 00:05:00) [common]
2218 20:59:30.659935 Cleaning after the job
2219 20:59:30.660046 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785133/tftp-deploy-jpdylcxf/ramdisk
2220 20:59:30.660747 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785133/tftp-deploy-jpdylcxf/kernel
2221 20:59:30.661626 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785133/tftp-deploy-jpdylcxf/modules
2222 20:59:30.661837 start: 5.1 power-off (timeout 00:00:30) [common]
2223 20:59:30.662010 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2224 20:59:30.683270 >> Command sent successfully.
2225 20:59:30.685301 Returned 0 in 0 seconds
2226 20:59:30.786627 end: 5.1 power-off (duration 00:00:00) [common]
2228 20:59:30.788404 start: 5.2 read-feedback (timeout 00:10:00) [common]
2229 20:59:30.789707 Listened to connection for namespace 'common' for up to 1s
2230 20:59:31.518673 Listened to connection for namespace 'common' for up to 1s
2231 20:59:31.522301 Listened to connection for namespace 'common' for up to 1s
2232 20:59:31.525585 Listened to connection for namespace 'common' for up to 1s
2233 20:59:31.528588 Listened to connection for namespace 'common' for up to 1s
2234 20:59:31.532464 Listened to connection for namespace 'common' for up to 1s
2235 20:59:31.535235 Listened to connection for namespace 'common' for up to 1s
2236 20:59:31.538860 Listened to connection for namespace 'common' for up to 1s
2237 20:59:31.542859 Listened to connection for namespace 'common' for up to 1s
2238 20:59:31.545783 Listened to connection for namespace 'common' for up to 1s
2239 20:59:31.549247 Listened to connection for namespace 'common' for up to 1s
2240 20:59:31.552297 Listened to connection for namespace 'common' for up to 1s
2241 20:59:31.555840 Listened to connection for namespace 'common' for up to 1s
2242 20:59:31.558728 Listened to connection for namespace 'common' for up to 1s
2243 20:59:31.561965 Listened to connection for namespace 'common' for up to 1s
2244 20:59:31.565589 Listened to connection for namespace 'common' for up to 1s
2245 20:59:31.569017 Listened to connection for namespace 'common' for up to 1s
2246 20:59:31.575327 Listened to connection for namespace 'common' for up to 1s
2247 20:59:31.578266 Listened to connection for namespace 'common' for up to 1s
2248 20:59:31.790403 Finalising connection for namespace 'common'
2249 20:59:31.791163 Disconnecting from shell: Finalise
2250 20:59:31.791615
2251 20:59:31.893164 end: 5.2 read-feedback (duration 00:00:01) [common]
2252 20:59:31.893795 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8785133
2253 20:59:31.902928 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8785133
2254 20:59:31.903071 JobError: Your job cannot terminate cleanly.