Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 20:52:09.524567 lava-dispatcher, installed at version: 2022.11
2 20:52:09.524774 start: 0 validate
3 20:52:09.524905 Start time: 2023-01-18 20:52:09.524897+00:00 (UTC)
4 20:52:09.525040 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:52:09.525174 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230114.0%2Fx86%2Frootfs.cpio.gz exists
6 20:52:09.811148 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:52:09.811854 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.269-cip88-rt28%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:52:10.099417 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:52:10.100075 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.269-cip88-rt28%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 20:52:10.111182 validate duration: 0.59
12 20:52:10.112384 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 20:52:10.112928 start: 1.1 download-retry (timeout 00:10:00) [common]
14 20:52:10.113401 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 20:52:10.113941 Not decompressing ramdisk as can be used compressed.
16 20:52:10.114372 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230114.0/x86/rootfs.cpio.gz
17 20:52:10.114700 saving as /var/lib/lava/dispatcher/tmp/8785132/tftp-deploy-us7zcp2x/ramdisk/rootfs.cpio.gz
18 20:52:10.115016 total size: 8423555 (8MB)
19 20:52:10.120947 progress 0% (0MB)
20 20:52:10.133022 progress 5% (0MB)
21 20:52:10.140533 progress 10% (0MB)
22 20:52:10.145907 progress 15% (1MB)
23 20:52:10.151813 progress 20% (1MB)
24 20:52:10.160031 progress 25% (2MB)
25 20:52:10.168040 progress 30% (2MB)
26 20:52:10.174012 progress 35% (2MB)
27 20:52:10.180861 progress 40% (3MB)
28 20:52:10.189592 progress 45% (3MB)
29 20:52:10.197176 progress 50% (4MB)
30 20:52:10.205112 progress 55% (4MB)
31 20:52:10.213746 progress 60% (4MB)
32 20:52:10.221572 progress 65% (5MB)
33 20:52:10.229058 progress 70% (5MB)
34 20:52:10.237168 progress 75% (6MB)
35 20:52:10.245825 progress 80% (6MB)
36 20:52:10.253628 progress 85% (6MB)
37 20:52:10.262320 progress 90% (7MB)
38 20:52:10.269932 progress 95% (7MB)
39 20:52:10.277502 progress 100% (8MB)
40 20:52:10.277728 8MB downloaded in 0.16s (49.37MB/s)
41 20:52:10.277954 end: 1.1.1 http-download (duration 00:00:00) [common]
43 20:52:10.278336 end: 1.1 download-retry (duration 00:00:00) [common]
44 20:52:10.278461 start: 1.2 download-retry (timeout 00:10:00) [common]
45 20:52:10.278575 start: 1.2.1 http-download (timeout 00:10:00) [common]
46 20:52:10.278680 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.269-cip88-rt28/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 20:52:10.278749 saving as /var/lib/lava/dispatcher/tmp/8785132/tftp-deploy-us7zcp2x/kernel/bzImage
48 20:52:10.278819 total size: 9711616 (9MB)
49 20:52:10.278883 No compression specified
50 20:52:10.286722 progress 0% (0MB)
51 20:52:10.325360 progress 5% (0MB)
52 20:52:10.358906 progress 10% (0MB)
53 20:52:10.377120 progress 15% (1MB)
54 20:52:10.394472 progress 20% (1MB)
55 20:52:10.411794 progress 25% (2MB)
56 20:52:10.424768 progress 30% (2MB)
57 20:52:10.437081 progress 35% (3MB)
58 20:52:10.445284 progress 40% (3MB)
59 20:52:10.454726 progress 45% (4MB)
60 20:52:10.464537 progress 50% (4MB)
61 20:52:10.474115 progress 55% (5MB)
62 20:52:10.482596 progress 60% (5MB)
63 20:52:10.492196 progress 65% (6MB)
64 20:52:10.501566 progress 70% (6MB)
65 20:52:10.511359 progress 75% (6MB)
66 20:52:10.520936 progress 80% (7MB)
67 20:52:10.529430 progress 85% (7MB)
68 20:52:10.539287 progress 90% (8MB)
69 20:52:10.549374 progress 95% (8MB)
70 20:52:10.557475 progress 100% (9MB)
71 20:52:10.557706 9MB downloaded in 0.28s (33.21MB/s)
72 20:52:10.557876 end: 1.2.1 http-download (duration 00:00:00) [common]
74 20:52:10.558143 end: 1.2 download-retry (duration 00:00:00) [common]
75 20:52:10.558236 start: 1.3 download-retry (timeout 00:10:00) [common]
76 20:52:10.558338 start: 1.3.1 http-download (timeout 00:10:00) [common]
77 20:52:10.558454 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.269-cip88-rt28/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 20:52:10.558537 saving as /var/lib/lava/dispatcher/tmp/8785132/tftp-deploy-us7zcp2x/modules/modules.tar
79 20:52:10.558601 total size: 64664 (0MB)
80 20:52:10.558664 Using unxz to decompress xz
81 20:52:10.567773 progress 50% (0MB)
82 20:52:10.569987 progress 100% (0MB)
83 20:52:10.572424 0MB downloaded in 0.01s (4.46MB/s)
84 20:52:10.572661 end: 1.3.1 http-download (duration 00:00:00) [common]
86 20:52:10.572934 end: 1.3 download-retry (duration 00:00:00) [common]
87 20:52:10.573041 start: 1.4 prepare-tftp-overlay (timeout 00:10:00) [common]
88 20:52:10.573153 start: 1.4.1 extract-nfsrootfs (timeout 00:10:00) [common]
89 20:52:10.573246 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
90 20:52:10.573342 start: 1.4.2 lava-overlay (timeout 00:10:00) [common]
91 20:52:10.573527 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1
92 20:52:10.573646 makedir: /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin
93 20:52:10.573740 makedir: /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/tests
94 20:52:10.573843 makedir: /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/results
95 20:52:10.573959 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-add-keys
96 20:52:10.574097 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-add-sources
97 20:52:10.574232 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-background-process-start
98 20:52:10.574364 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-background-process-stop
99 20:52:10.574485 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-common-functions
100 20:52:10.574619 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-echo-ipv4
101 20:52:10.574742 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-install-packages
102 20:52:10.574859 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-installed-packages
103 20:52:10.574976 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-os-build
104 20:52:10.575094 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-probe-channel
105 20:52:10.575211 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-probe-ip
106 20:52:10.575330 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-target-ip
107 20:52:10.575446 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-target-mac
108 20:52:10.575560 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-target-storage
109 20:52:10.575679 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-test-case
110 20:52:10.575796 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-test-event
111 20:52:10.575913 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-test-feedback
112 20:52:10.576029 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-test-raise
113 20:52:10.576156 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-test-reference
114 20:52:10.576297 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-test-runner
115 20:52:10.576444 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-test-set
116 20:52:10.576563 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-test-shell
117 20:52:10.576683 Updating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-install-packages (oe)
118 20:52:10.576817 Updating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/bin/lava-installed-packages (oe)
119 20:52:10.576930 Creating /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/environment
120 20:52:10.577025 LAVA metadata
121 20:52:10.577108 - LAVA_JOB_ID=8785132
122 20:52:10.577194 - LAVA_DISPATCHER_IP=192.168.201.1
123 20:52:10.577305 start: 1.4.2.1 lava-vland-overlay (timeout 00:10:00) [common]
124 20:52:10.577378 skipped lava-vland-overlay
125 20:52:10.577468 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
126 20:52:10.577560 start: 1.4.2.2 lava-multinode-overlay (timeout 00:10:00) [common]
127 20:52:10.577631 skipped lava-multinode-overlay
128 20:52:10.577710 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
129 20:52:10.577803 start: 1.4.2.3 test-definition (timeout 00:10:00) [common]
130 20:52:10.577883 Loading test definitions
131 20:52:10.577987 start: 1.4.2.3.1 inline-repo-action (timeout 00:10:00) [common]
132 20:52:10.578066 Using /lava-8785132 at stage 0
133 20:52:10.578348 uuid=8785132_1.4.2.3.1 testdef=None
134 20:52:10.578444 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
135 20:52:10.578539 start: 1.4.2.3.2 test-overlay (timeout 00:10:00) [common]
136 20:52:10.579058 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
138 20:52:10.579306 start: 1.4.2.3.3 test-install-overlay (timeout 00:10:00) [common]
139 20:52:10.579911 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
141 20:52:10.580169 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:10:00) [common]
142 20:52:10.580738 runner path: /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/0/tests/0_dmesg test_uuid 8785132_1.4.2.3.1
143 20:52:10.580894 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
145 20:52:10.581136 start: 1.4.2.3.5 inline-repo-action (timeout 00:10:00) [common]
146 20:52:10.581215 Using /lava-8785132 at stage 1
147 20:52:10.581484 uuid=8785132_1.4.2.3.5 testdef=None
148 20:52:10.581581 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
149 20:52:10.581678 start: 1.4.2.3.6 test-overlay (timeout 00:10:00) [common]
150 20:52:10.582143 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
152 20:52:10.582379 start: 1.4.2.3.7 test-install-overlay (timeout 00:10:00) [common]
153 20:52:10.582984 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
155 20:52:10.583245 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:10:00) [common]
156 20:52:10.583850 runner path: /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/1/tests/1_bootrr test_uuid 8785132_1.4.2.3.5
157 20:52:10.584015 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
159 20:52:10.584234 Creating lava-test-runner.conf files
160 20:52:10.584303 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/0 for stage 0
161 20:52:10.584389 - 0_dmesg
162 20:52:10.584469 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8785132/lava-overlay-_u2gi8k1/lava-8785132/1 for stage 1
163 20:52:10.584556 - 1_bootrr
164 20:52:10.584652 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
165 20:52:10.584748 start: 1.4.2.4 compress-overlay (timeout 00:10:00) [common]
166 20:52:10.591327 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
167 20:52:10.591448 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:10:00) [common]
168 20:52:10.591543 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
169 20:52:10.591651 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
170 20:52:10.591750 start: 1.4.3 extract-overlay-ramdisk (timeout 00:10:00) [common]
171 20:52:10.777547 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
172 20:52:10.777887 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
173 20:52:10.778003 extracting modules file /var/lib/lava/dispatcher/tmp/8785132/tftp-deploy-us7zcp2x/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8785132/extract-overlay-ramdisk-uilqd7y9/ramdisk
174 20:52:10.782340 end: 1.4.4 extract-modules (duration 00:00:00) [common]
175 20:52:10.782460 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
176 20:52:10.782548 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8785132/compress-overlay-62i6t3ly/overlay-1.4.2.4.tar.gz to ramdisk
177 20:52:10.782623 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8785132/compress-overlay-62i6t3ly/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8785132/extract-overlay-ramdisk-uilqd7y9/ramdisk
178 20:52:10.786522 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
179 20:52:10.786637 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
180 20:52:10.786728 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
181 20:52:10.786821 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
182 20:52:10.786902 Building ramdisk /var/lib/lava/dispatcher/tmp/8785132/extract-overlay-ramdisk-uilqd7y9/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8785132/extract-overlay-ramdisk-uilqd7y9/ramdisk
183 20:52:10.851888 >> 48351 blocks
184 20:52:11.642815 rename /var/lib/lava/dispatcher/tmp/8785132/extract-overlay-ramdisk-uilqd7y9/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8785132/tftp-deploy-us7zcp2x/ramdisk/ramdisk.cpio.gz
185 20:52:11.643354 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
186 20:52:11.643514 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
187 20:52:11.643644 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
188 20:52:11.643767 No mkimage arch provided, not using FIT.
189 20:52:11.643873 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
190 20:52:11.644003 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
191 20:52:11.644106 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
192 20:52:11.644202 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
193 20:52:11.644282 No LXC device requested
194 20:52:11.644372 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
195 20:52:11.644466 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
196 20:52:11.644556 end: 1.6 deploy-device-env (duration 00:00:00) [common]
197 20:52:11.644634 Checking files for TFTP limit of 4294967296 bytes.
198 20:52:11.645075 end: 1 tftp-deploy (duration 00:00:02) [common]
199 20:52:11.645213 start: 2 depthcharge-action (timeout 00:05:00) [common]
200 20:52:11.645328 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
201 20:52:11.645482 substitutions:
202 20:52:11.645554 - {DTB}: None
203 20:52:11.645621 - {INITRD}: 8785132/tftp-deploy-us7zcp2x/ramdisk/ramdisk.cpio.gz
204 20:52:11.645713 - {KERNEL}: 8785132/tftp-deploy-us7zcp2x/kernel/bzImage
205 20:52:11.645773 - {LAVA_MAC}: None
206 20:52:11.645863 - {PRESEED_CONFIG}: None
207 20:52:11.645923 - {PRESEED_LOCAL}: None
208 20:52:11.646014 - {RAMDISK}: 8785132/tftp-deploy-us7zcp2x/ramdisk/ramdisk.cpio.gz
209 20:52:11.646076 - {ROOT_PART}: None
210 20:52:11.646135 - {ROOT}: None
211 20:52:11.646193 - {SERVER_IP}: 192.168.201.1
212 20:52:11.646251 - {TEE}: None
213 20:52:11.646308 Parsed boot commands:
214 20:52:11.646365 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
215 20:52:11.646524 Parsed boot commands: tftpboot 192.168.201.1 8785132/tftp-deploy-us7zcp2x/kernel/bzImage 8785132/tftp-deploy-us7zcp2x/kernel/cmdline 8785132/tftp-deploy-us7zcp2x/ramdisk/ramdisk.cpio.gz
216 20:52:11.646626 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
217 20:52:11.646722 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
218 20:52:11.646825 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
219 20:52:11.646918 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
220 20:52:11.646992 Not connected, no need to disconnect.
221 20:52:11.647073 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
222 20:52:11.647158 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
223 20:52:11.647238 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-6'
224 20:52:11.649993 Setting prompt string to ['lava-test: # ']
225 20:52:11.650288 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
226 20:52:11.650395 end: 2.2.1 reset-connection (duration 00:00:00) [common]
227 20:52:11.650498 start: 2.2.2 reset-device (timeout 00:05:00) [common]
228 20:52:11.650591 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
229 20:52:11.650773 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=reboot'
230 20:52:11.670041 >> Command sent successfully.
231 20:52:11.672151 Returned 0 in 0 seconds
232 20:52:11.773316 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
234 20:52:11.775804 end: 2.2.2 reset-device (duration 00:00:00) [common]
235 20:52:11.776315 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
236 20:52:11.776737 Setting prompt string to 'Starting depthcharge on Voema...'
237 20:52:11.777076 Changing prompt to 'Starting depthcharge on Voema...'
238 20:52:11.777444 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
239 20:52:11.778705 [Enter `^Ec?' for help]
240 20:52:19.500902
241 20:52:19.501537
242 20:52:19.510971 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
243 20:52:19.513887 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
244 20:52:19.520700 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
245 20:52:19.523795 CPU: AES supported, TXT NOT supported, VT supported
246 20:52:19.530523 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
247 20:52:19.534085 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
248 20:52:19.536910
249 20:52:19.540624 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
250 20:52:19.543503 VBOOT: Loading verstage.
251 20:52:19.547504 FMAP: Found "FLASH" version 1.1 at 0x1804000.
252 20:52:19.554225 FMAP: base = 0x0 size = 0x2000000 #areas = 32
253 20:52:19.557119 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
254 20:52:19.567782 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
255 20:52:19.574383 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
256 20:52:19.574828
257 20:52:19.575177
258 20:52:19.588256 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
259 20:52:19.601211 Probing TPM: . done!
260 20:52:19.604311 TPM ready after 0 ms
261 20:52:19.607935 Connected to device vid:did:rid of 1ae0:0028:00
262 20:52:19.619399 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
263 20:52:19.625636 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
264 20:52:19.629131 Initialized TPM device CR50 revision 0
265 20:52:19.682844 tlcl_send_startup: Startup return code is 0
266 20:52:19.683367 TPM: setup succeeded
267 20:52:19.698081 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
268 20:52:19.712030 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
269 20:52:19.725080 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
270 20:52:19.734778 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
271 20:52:19.738554 Chrome EC: UHEPI supported
272 20:52:19.741335 Phase 1
273 20:52:19.744564 FMAP: area GBB found @ 1805000 (458752 bytes)
274 20:52:19.751194 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
275 20:52:19.754934
276 20:52:19.761552 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
277 20:52:19.768074 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
278 20:52:19.774886 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
279 20:52:19.778317 Recovery requested (1009000e)
280 20:52:19.781406 TPM: Extending digest for VBOOT: boot mode into PCR 0
281 20:52:19.792929 tlcl_extend: response is 0
282 20:52:19.799867 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
283 20:52:19.809484 tlcl_extend: response is 0
284 20:52:19.816262 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
285 20:52:19.822827 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
286 20:52:19.829534 BS: verstage times (exec / console): total (unknown) / 142 ms
287 20:52:19.830033
288 20:52:19.830390
289 20:52:19.842227 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
290 20:52:19.849073 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
291 20:52:19.852609 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
292 20:52:19.855667 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
293 20:52:19.862382 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
294 20:52:19.865824 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
295 20:52:19.868916 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
296 20:52:19.872465 TCO_STS: 0000 0000
297 20:52:19.875420 GEN_PMCON: d0015038 00002200
298 20:52:19.879007 GBLRST_CAUSE: 00000000 00000000
299 20:52:19.879495 HPR_CAUSE0: 00000000
300 20:52:19.882507
301 20:52:19.882945 prev_sleep_state 5
302 20:52:19.885580 Boot Count incremented to 14508
303 20:52:19.892263 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
304 20:52:19.898972 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
305 20:52:19.908923 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
306 20:52:19.914928 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
307 20:52:19.918294 Chrome EC: UHEPI supported
308 20:52:19.925055 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
309 20:52:19.936792 Probing TPM: done!
310 20:52:19.943956 Connected to device vid:did:rid of 1ae0:0028:00
311 20:52:19.954501 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
312 20:52:19.961856 Initialized TPM device CR50 revision 0
313 20:52:19.971824 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
314 20:52:19.978576 MRC: Hash idx 0x100b comparison successful.
315 20:52:19.981749 MRC cache found, size faa8
316 20:52:19.981956 bootmode is set to: 2
317 20:52:19.985315 SPD index = 0
318 20:52:19.991468 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
319 20:52:19.995503 SPD: module type is LPDDR4X
320 20:52:19.998413 SPD: module part number is MT53E512M64D4NW-046
321 20:52:20.005511 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
322 20:52:20.008479 SPD: device width 16 bits, bus width 16 bits
323 20:52:20.011561
324 20:52:20.015040 SPD: module size is 1024 MB (per channel)
325 20:52:20.446110 CBMEM:
326 20:52:20.449833 IMD: root @ 0x76fff000 254 entries.
327 20:52:20.452902 IMD: root @ 0x76ffec00 62 entries.
328 20:52:20.456443 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
329 20:52:20.463262 FMAP: area RW_VPD found @ f35000 (8192 bytes)
330 20:52:20.466365 External stage cache:
331 20:52:20.469611 IMD: root @ 0x7b3ff000 254 entries.
332 20:52:20.473250 IMD: root @ 0x7b3fec00 62 entries.
333 20:52:20.488003 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
334 20:52:20.494567 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
335 20:52:20.501136 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
336 20:52:20.515537 MRC: 'RECOVERY_MRC_CACHE' does not need update.
337 20:52:20.519264 cse_lite: Skip switching to RW in the recovery path
338 20:52:20.522795 8 DIMMs found
339 20:52:20.523244 SMM Memory Map
340 20:52:20.526474 SMRAM : 0x7b000000 0x800000
341 20:52:20.530151 Subregion 0: 0x7b000000 0x200000
342 20:52:20.533138 Subregion 1: 0x7b200000 0x200000
343 20:52:20.536701 Subregion 2: 0x7b400000 0x400000
344 20:52:20.539848 top_of_ram = 0x77000000
345 20:52:20.546623 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
346 20:52:20.549733 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
347 20:52:20.556239 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
348 20:52:20.559902 MTRR Range: Start=ff000000 End=0 (Size 1000000)
349 20:52:20.569840 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
350 20:52:20.572924 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
351 20:52:20.585025 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
352 20:52:20.588707 Processing 211 relocs. Offset value of 0x74c0b000
353 20:52:20.591805
354 20:52:20.598505 BS: romstage times (exec / console): total (unknown) / 277 ms
355 20:52:20.604611
356 20:52:20.605092
357 20:52:20.614743 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
358 20:52:20.617584 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
359 20:52:20.627729 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
360 20:52:20.634446 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
361 20:52:20.640847 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
362 20:52:20.647691 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
363 20:52:20.693980 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
364 20:52:20.701035 Processing 5008 relocs. Offset value of 0x75d98000
365 20:52:20.704031 BS: postcar times (exec / console): total (unknown) / 59 ms
366 20:52:20.704111
367 20:52:20.707724
368 20:52:20.717466 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
369 20:52:20.717548 Normal boot
370 20:52:20.721208 FW_CONFIG value is 0x804c02
371 20:52:20.724104 PCI: 00:07.0 disabled by fw_config
372 20:52:20.727855 PCI: 00:07.1 disabled by fw_config
373 20:52:20.730886 PCI: 00:0d.2 disabled by fw_config
374 20:52:20.734761 PCI: 00:1c.7 disabled by fw_config
375 20:52:20.741495 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
376 20:52:20.748129 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
377 20:52:20.751262 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
378 20:52:20.754393 GENERIC: 0.0 disabled by fw_config
379 20:52:20.758087 GENERIC: 1.0 disabled by fw_config
380 20:52:20.764853 fw_config match found: DB_USB=USB3_ACTIVE
381 20:52:20.767836 fw_config match found: DB_USB=USB3_ACTIVE
382 20:52:20.770825 fw_config match found: DB_USB=USB3_ACTIVE
383 20:52:20.774617 fw_config match found: DB_USB=USB3_ACTIVE
384 20:52:20.781347 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
385 20:52:20.788093 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
386 20:52:20.794026 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
387 20:52:20.797894
388 20:52:20.804385 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
389 20:52:20.807574 microcode: sig=0x806c1 pf=0x80 revision=0x86
390 20:52:20.814284 microcode: Update skipped, already up-to-date
391 20:52:20.821037 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
392 20:52:20.848209 Detected 4 core, 8 thread CPU.
393 20:52:20.851207 Setting up SMI for CPU
394 20:52:20.854442 IED base = 0x7b400000
395 20:52:20.854881 IED size = 0x00400000
396 20:52:20.858191 Will perform SMM setup.
397 20:52:20.864380 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
398 20:52:20.871364 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
399 20:52:20.877961 Processing 16 relocs. Offset value of 0x00030000
400 20:52:20.880978 Attempting to start 7 APs
401 20:52:20.884537 Waiting for 10ms after sending INIT.
402 20:52:20.900292 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
403 20:52:20.903206 AP: slot 2 apic_id 3.
404 20:52:20.906945 AP: slot 6 apic_id 2.
405 20:52:20.907384 AP: slot 5 apic_id 6.
406 20:52:20.909859 AP: slot 4 apic_id 7.
407 20:52:20.910293 done.
408 20:52:20.913614 AP: slot 7 apic_id 5.
409 20:52:20.914052 AP: slot 3 apic_id 4.
410 20:52:20.920290 Waiting for 2nd SIPI to complete...done.
411 20:52:20.926505 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
412 20:52:20.933180 Processing 13 relocs. Offset value of 0x00038000
413 20:52:20.933679 Unable to locate Global NVS
414 20:52:20.943409 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
415 20:52:20.946470 Installing permanent SMM handler to 0x7b000000
416 20:52:20.956824 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
417 20:52:20.959894 Processing 794 relocs. Offset value of 0x7b010000
418 20:52:20.969810 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
419 20:52:20.973530 Processing 13 relocs. Offset value of 0x7b008000
420 20:52:20.979724 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
421 20:52:20.986605 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
422 20:52:20.989564 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
423 20:52:20.996457 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
424 20:52:21.003192 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
425 20:52:21.009501 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
426 20:52:21.016270 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
427 20:52:21.016708 Unable to locate Global NVS
428 20:52:21.026101 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
429 20:52:21.029469 Clearing SMI status registers
430 20:52:21.029922 SMI_STS: PM1
431 20:52:21.033034 PM1_STS: PWRBTN
432 20:52:21.039663 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
433 20:52:21.042835 In relocation handler: CPU 0
434 20:52:21.046261 New SMBASE=0x7b000000 IEDBASE=0x7b400000
435 20:52:21.052865 Writing SMRR. base = 0x7b000006, mask=0xff800c00
436 20:52:21.053305 Relocation complete.
437 20:52:21.059677 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
438 20:52:21.062922
439 20:52:21.063381 In relocation handler: CPU 1
440 20:52:21.069640 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
441 20:52:21.070077 Relocation complete.
442 20:52:21.076645 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
443 20:52:21.079715 In relocation handler: CPU 2
444 20:52:21.086402 New SMBASE=0x7afff800 IEDBASE=0x7b400000
445 20:52:21.086867 Relocation complete.
446 20:52:21.092357 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
447 20:52:21.095960 In relocation handler: CPU 6
448 20:52:21.102569 New SMBASE=0x7affe800 IEDBASE=0x7b400000
449 20:52:21.105743 Writing SMRR. base = 0x7b000006, mask=0xff800c00
450 20:52:21.109373 Relocation complete.
451 20:52:21.116180 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
452 20:52:21.119114 In relocation handler: CPU 5
453 20:52:21.122852 New SMBASE=0x7affec00 IEDBASE=0x7b400000
454 20:52:21.125872 Writing SMRR. base = 0x7b000006, mask=0xff800c00
455 20:52:21.129006 Relocation complete.
456 20:52:21.135684 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
457 20:52:21.139362 In relocation handler: CPU 4
458 20:52:21.142328 New SMBASE=0x7afff000 IEDBASE=0x7b400000
459 20:52:21.145393 Relocation complete.
460 20:52:21.152472 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
461 20:52:21.155425 In relocation handler: CPU 3
462 20:52:21.159104 New SMBASE=0x7afff400 IEDBASE=0x7b400000
463 20:52:21.165378 Writing SMRR. base = 0x7b000006, mask=0xff800c00
464 20:52:21.169023 Relocation complete.
465 20:52:21.175802 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
466 20:52:21.178813 In relocation handler: CPU 7
467 20:52:21.182268 New SMBASE=0x7affe400 IEDBASE=0x7b400000
468 20:52:21.182358 Relocation complete.
469 20:52:21.185926 Initializing CPU #0
470 20:52:21.189851 CPU: vendor Intel device 806c1
471 20:52:21.192919 CPU: family 06, model 8c, stepping 01
472 20:52:21.195967 Clearing out pending MCEs
473 20:52:21.199859 Setting up local APIC...
474 20:52:21.200345 apic_id: 0x00 done.
475 20:52:21.202926 Turbo is available but hidden
476 20:52:21.206457 Turbo is available and visible
477 20:52:21.213091 microcode: Update skipped, already up-to-date
478 20:52:21.213554 CPU #0 initialized
479 20:52:21.216235 Initializing CPU #5
480 20:52:21.216681 Initializing CPU #4
481 20:52:21.219801 CPU: vendor Intel device 806c1
482 20:52:21.226549 CPU: family 06, model 8c, stepping 01
483 20:52:21.227021 CPU: vendor Intel device 806c1
484 20:52:21.232836 CPU: family 06, model 8c, stepping 01
485 20:52:21.233335 Clearing out pending MCEs
486 20:52:21.236606 Clearing out pending MCEs
487 20:52:21.239656 Setting up local APIC...
488 20:52:21.242664 Initializing CPU #3
489 20:52:21.243113 Initializing CPU #7
490 20:52:21.246416 CPU: vendor Intel device 806c1
491 20:52:21.249502 CPU: family 06, model 8c, stepping 01
492 20:52:21.253209 CPU: vendor Intel device 806c1
493 20:52:21.256263 CPU: family 06, model 8c, stepping 01
494 20:52:21.259309 Clearing out pending MCEs
495 20:52:21.263079 Clearing out pending MCEs
496 20:52:21.266118 Setting up local APIC...
497 20:52:21.266564 Initializing CPU #1
498 20:52:21.269245 Initializing CPU #6
499 20:52:21.272820 Initializing CPU #2
500 20:52:21.275807 CPU: vendor Intel device 806c1
501 20:52:21.279166 CPU: family 06, model 8c, stepping 01
502 20:52:21.282183 CPU: vendor Intel device 806c1
503 20:52:21.285947 CPU: family 06, model 8c, stepping 01
504 20:52:21.289003 Clearing out pending MCEs
505 20:52:21.289084 Clearing out pending MCEs
506 20:52:21.292061 Setting up local APIC...
507 20:52:21.295927 apic_id: 0x04 done.
508 20:52:21.299586 Setting up local APIC...
509 20:52:21.302477 microcode: Update skipped, already up-to-date
510 20:52:21.306105 Setting up local APIC...
511 20:52:21.306651 apic_id: 0x02 done.
512 20:52:21.309359 Setting up local APIC...
513 20:52:21.312992 CPU: vendor Intel device 806c1
514 20:52:21.316203 CPU: family 06, model 8c, stepping 01
515 20:52:21.319380 CPU #3 initialized
516 20:52:21.322374 microcode: Update skipped, already up-to-date
517 20:52:21.326009 apic_id: 0x03 done.
518 20:52:21.326456 CPU #6 initialized
519 20:52:21.332785 microcode: Update skipped, already up-to-date
520 20:52:21.333251 apic_id: 0x06 done.
521 20:52:21.335796 apic_id: 0x07 done.
522 20:52:21.339246 apic_id: 0x05 done.
523 20:52:21.342177 microcode: Update skipped, already up-to-date
524 20:52:21.345476 microcode: Update skipped, already up-to-date
525 20:52:21.348996 Clearing out pending MCEs
526 20:52:21.355772 microcode: Update skipped, already up-to-date
527 20:52:21.355870 CPU #2 initialized
528 20:52:21.358653 CPU #7 initialized
529 20:52:21.358759 CPU #4 initialized
530 20:52:21.362409 CPU #5 initialized
531 20:52:21.365528 Setting up local APIC...
532 20:52:21.365644 apic_id: 0x01 done.
533 20:52:21.372673 microcode: Update skipped, already up-to-date
534 20:52:21.373111 CPU #1 initialized
535 20:52:21.379238 bsp_do_flight_plan done after 455 msecs.
536 20:52:21.382454 CPU: frequency set to 4000 MHz
537 20:52:21.382892 Enabling SMIs.
538 20:52:21.389312 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
539 20:52:21.404809 SATAXPCIE1 indicates PCIe NVMe is present
540 20:52:21.408488 Probing TPM: done!
541 20:52:21.411546 Connected to device vid:did:rid of 1ae0:0028:00
542 20:52:21.422582 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
543 20:52:21.425703 Initialized TPM device CR50 revision 0
544 20:52:21.428643 Enabling S0i3.4
545 20:52:21.435490 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
546 20:52:21.438572 Found a VBT of 8704 bytes after decompression
547 20:52:21.445281 cse_lite: CSE RO boot. HybridStorageMode disabled
548 20:52:21.451875 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
549 20:52:21.527267 FSPS returned 0
550 20:52:21.530936 Executing Phase 1 of FspMultiPhaseSiInit
551 20:52:21.540895 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
552 20:52:21.543844 port C0 DISC req: usage 1 usb3 1 usb2 5
553 20:52:21.547570 Raw Buffer output 0 00000511
554 20:52:21.550721 Raw Buffer output 1 00000000
555 20:52:21.554302 pmc_send_ipc_cmd succeeded
556 20:52:21.557922 port C1 DISC req: usage 1 usb3 2 usb2 3
557 20:52:21.560920 Raw Buffer output 0 00000321
558 20:52:21.564608 Raw Buffer output 1 00000000
559 20:52:21.568197 pmc_send_ipc_cmd succeeded
560 20:52:21.573718 Detected 4 core, 8 thread CPU.
561 20:52:21.576745 Detected 4 core, 8 thread CPU.
562 20:52:21.810744 Display FSP Version Info HOB
563 20:52:21.814117 Reference Code - CPU = a.0.4c.31
564 20:52:21.817032 uCode Version = 0.0.0.86
565 20:52:21.820692 TXT ACM version = ff.ff.ff.ffff
566 20:52:21.823675 Reference Code - ME = a.0.4c.31
567 20:52:21.827149 MEBx version = 0.0.0.0
568 20:52:21.830143 ME Firmware Version = Consumer SKU
569 20:52:21.833676 Reference Code - PCH = a.0.4c.31
570 20:52:21.837226 PCH-CRID Status = Disabled
571 20:52:21.840339 PCH-CRID Original Value = ff.ff.ff.ffff
572 20:52:21.844047 PCH-CRID New Value = ff.ff.ff.ffff
573 20:52:21.847208 OPROM - RST - RAID = ff.ff.ff.ffff
574 20:52:21.850185 PCH Hsio Version = 4.0.0.0
575 20:52:21.853704 Reference Code - SA - System Agent = a.0.4c.31
576 20:52:21.856869 Reference Code - MRC = 2.0.0.1
577 20:52:21.860440 SA - PCIe Version = a.0.4c.31
578 20:52:21.863572 SA-CRID Status = Disabled
579 20:52:21.867262 SA-CRID Original Value = 0.0.0.1
580 20:52:21.870146 SA-CRID New Value = 0.0.0.1
581 20:52:21.873739 OPROM - VBIOS = ff.ff.ff.ffff
582 20:52:21.876714 IO Manageability Engine FW Version = 11.1.4.0
583 20:52:21.880348 PHY Build Version = 0.0.0.e0
584 20:52:21.883523 Thunderbolt(TM) FW Version = 0.0.0.0
585 20:52:21.890057 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
586 20:52:21.893672 ITSS IRQ Polarities Before:
587 20:52:21.893757 IPC0: 0xffffffff
588 20:52:21.897227 IPC1: 0xffffffff
589 20:52:21.897310 IPC2: 0xffffffff
590 20:52:21.900406 IPC3: 0xffffffff
591 20:52:21.903464 ITSS IRQ Polarities After:
592 20:52:21.903549 IPC0: 0xffffffff
593 20:52:21.907093 IPC1: 0xffffffff
594 20:52:21.907177 IPC2: 0xffffffff
595 20:52:21.910168 IPC3: 0xffffffff
596 20:52:21.913731 Found PCIe Root Port #9 at PCI: 00:1d.0.
597 20:52:21.926587 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
598 20:52:21.936452 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
599 20:52:21.950472 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
600 20:52:21.957177 BS: BS_DEV_INIT_CHIPS run times (exec / console): 325 / 236 ms
601 20:52:21.957644 Enumerating buses...
602 20:52:21.963867 Show all devs... Before device enumeration.
603 20:52:21.964379 Root Device: enabled 1
604 20:52:21.966934
605 20:52:21.967499 DOMAIN: 0000: enabled 1
606 20:52:21.970580 CPU_CLUSTER: 0: enabled 1
607 20:52:21.973529 PCI: 00:00.0: enabled 1
608 20:52:21.973960 PCI: 00:02.0: enabled 1
609 20:52:21.977139
610 20:52:21.977625 PCI: 00:04.0: enabled 1
611 20:52:21.980277 PCI: 00:05.0: enabled 1
612 20:52:21.983335 PCI: 00:06.0: enabled 0
613 20:52:21.983815 PCI: 00:07.0: enabled 0
614 20:52:21.986931 PCI: 00:07.1: enabled 0
615 20:52:21.990650 PCI: 00:07.2: enabled 0
616 20:52:21.993791 PCI: 00:07.3: enabled 0
617 20:52:21.994306 PCI: 00:08.0: enabled 1
618 20:52:21.996833 PCI: 00:09.0: enabled 0
619 20:52:22.000502 PCI: 00:0a.0: enabled 0
620 20:52:22.003627 PCI: 00:0d.0: enabled 1
621 20:52:22.004047 PCI: 00:0d.1: enabled 0
622 20:52:22.006821 PCI: 00:0d.2: enabled 0
623 20:52:22.010406 PCI: 00:0d.3: enabled 0
624 20:52:22.013293 PCI: 00:0e.0: enabled 0
625 20:52:22.013887 PCI: 00:10.2: enabled 1
626 20:52:22.016944 PCI: 00:10.6: enabled 0
627 20:52:22.020009 PCI: 00:10.7: enabled 0
628 20:52:22.020432 PCI: 00:12.0: enabled 0
629 20:52:22.023443 PCI: 00:12.6: enabled 0
630 20:52:22.027122 PCI: 00:13.0: enabled 0
631 20:52:22.030047 PCI: 00:14.0: enabled 1
632 20:52:22.030531 PCI: 00:14.1: enabled 0
633 20:52:22.033358 PCI: 00:14.2: enabled 1
634 20:52:22.036948 PCI: 00:14.3: enabled 1
635 20:52:22.039948 PCI: 00:15.0: enabled 1
636 20:52:22.040413 PCI: 00:15.1: enabled 1
637 20:52:22.043545 PCI: 00:15.2: enabled 1
638 20:52:22.046711 PCI: 00:15.3: enabled 1
639 20:52:22.050529 PCI: 00:16.0: enabled 1
640 20:52:22.051051 PCI: 00:16.1: enabled 0
641 20:52:22.053388 PCI: 00:16.2: enabled 0
642 20:52:22.057051 PCI: 00:16.3: enabled 0
643 20:52:22.057456 PCI: 00:16.4: enabled 0
644 20:52:22.060240 PCI: 00:16.5: enabled 0
645 20:52:22.063259 PCI: 00:17.0: enabled 1
646 20:52:22.066883 PCI: 00:19.0: enabled 0
647 20:52:22.067420 PCI: 00:19.1: enabled 1
648 20:52:22.070390 PCI: 00:19.2: enabled 0
649 20:52:22.073363 PCI: 00:1c.0: enabled 1
650 20:52:22.076395 PCI: 00:1c.1: enabled 0
651 20:52:22.076814 PCI: 00:1c.2: enabled 0
652 20:52:22.080145 PCI: 00:1c.3: enabled 0
653 20:52:22.083096 PCI: 00:1c.4: enabled 0
654 20:52:22.086925 PCI: 00:1c.5: enabled 0
655 20:52:22.087388 PCI: 00:1c.6: enabled 1
656 20:52:22.089941 PCI: 00:1c.7: enabled 0
657 20:52:22.093581 PCI: 00:1d.0: enabled 1
658 20:52:22.094007 PCI: 00:1d.1: enabled 0
659 20:52:22.096703 PCI: 00:1d.2: enabled 1
660 20:52:22.100261 PCI: 00:1d.3: enabled 0
661 20:52:22.103341 PCI: 00:1e.0: enabled 1
662 20:52:22.103819 PCI: 00:1e.1: enabled 0
663 20:52:22.106606 PCI: 00:1e.2: enabled 1
664 20:52:22.110155 PCI: 00:1e.3: enabled 1
665 20:52:22.113174 PCI: 00:1f.0: enabled 1
666 20:52:22.113635 PCI: 00:1f.1: enabled 0
667 20:52:22.116854 PCI: 00:1f.2: enabled 1
668 20:52:22.119917 PCI: 00:1f.3: enabled 1
669 20:52:22.123552 PCI: 00:1f.4: enabled 0
670 20:52:22.124017 PCI: 00:1f.5: enabled 1
671 20:52:22.126403 PCI: 00:1f.6: enabled 0
672 20:52:22.130165 PCI: 00:1f.7: enabled 0
673 20:52:22.130618 APIC: 00: enabled 1
674 20:52:22.133141 GENERIC: 0.0: enabled 1
675 20:52:22.136871 GENERIC: 0.0: enabled 1
676 20:52:22.139783 GENERIC: 1.0: enabled 1
677 20:52:22.140209 GENERIC: 0.0: enabled 1
678 20:52:22.143301 GENERIC: 1.0: enabled 1
679 20:52:22.146012 USB0 port 0: enabled 1
680 20:52:22.146094 GENERIC: 0.0: enabled 1
681 20:52:22.149649
682 20:52:22.149739 USB0 port 0: enabled 1
683 20:52:22.152768 GENERIC: 0.0: enabled 1
684 20:52:22.155939 I2C: 00:1a: enabled 1
685 20:52:22.156021 I2C: 00:31: enabled 1
686 20:52:22.159577 I2C: 00:32: enabled 1
687 20:52:22.162747 I2C: 00:10: enabled 1
688 20:52:22.162846 I2C: 00:15: enabled 1
689 20:52:22.165902 GENERIC: 0.0: enabled 0
690 20:52:22.169395 GENERIC: 1.0: enabled 0
691 20:52:22.173005 GENERIC: 0.0: enabled 1
692 20:52:22.173087 SPI: 00: enabled 1
693 20:52:22.176036 SPI: 00: enabled 1
694 20:52:22.176118 PNP: 0c09.0: enabled 1
695 20:52:22.179690 GENERIC: 0.0: enabled 1
696 20:52:22.182952 USB3 port 0: enabled 1
697 20:52:22.185869 USB3 port 1: enabled 1
698 20:52:22.185951 USB3 port 2: enabled 0
699 20:52:22.189495 USB3 port 3: enabled 0
700 20:52:22.193064 USB2 port 0: enabled 0
701 20:52:22.193147 USB2 port 1: enabled 1
702 20:52:22.196103 USB2 port 2: enabled 1
703 20:52:22.199265 USB2 port 3: enabled 0
704 20:52:22.199348 USB2 port 4: enabled 1
705 20:52:22.203048 USB2 port 5: enabled 0
706 20:52:22.206223 USB2 port 6: enabled 0
707 20:52:22.209188 USB2 port 7: enabled 0
708 20:52:22.209269 USB2 port 8: enabled 0
709 20:52:22.212862 USB2 port 9: enabled 0
710 20:52:22.216416 USB3 port 0: enabled 0
711 20:52:22.216499 USB3 port 1: enabled 1
712 20:52:22.219536 USB3 port 2: enabled 0
713 20:52:22.223043 USB3 port 3: enabled 0
714 20:52:22.225953 GENERIC: 0.0: enabled 1
715 20:52:22.226041 GENERIC: 1.0: enabled 1
716 20:52:22.229568 APIC: 01: enabled 1
717 20:52:22.232610 APIC: 03: enabled 1
718 20:52:22.232705 APIC: 04: enabled 1
719 20:52:22.236224 APIC: 07: enabled 1
720 20:52:22.236306 APIC: 06: enabled 1
721 20:52:22.239237 APIC: 02: enabled 1
722 20:52:22.242980 APIC: 05: enabled 1
723 20:52:22.243062 Compare with tree...
724 20:52:22.246036 Root Device: enabled 1
725 20:52:22.249584 DOMAIN: 0000: enabled 1
726 20:52:22.252692 PCI: 00:00.0: enabled 1
727 20:52:22.252775 PCI: 00:02.0: enabled 1
728 20:52:22.255643 PCI: 00:04.0: enabled 1
729 20:52:22.259150 GENERIC: 0.0: enabled 1
730 20:52:22.262419 PCI: 00:05.0: enabled 1
731 20:52:22.266093 PCI: 00:06.0: enabled 0
732 20:52:22.266181 PCI: 00:07.0: enabled 0
733 20:52:22.269236 GENERIC: 0.0: enabled 1
734 20:52:22.272272 PCI: 00:07.1: enabled 0
735 20:52:22.276101 GENERIC: 1.0: enabled 1
736 20:52:22.279077 PCI: 00:07.2: enabled 0
737 20:52:22.279254 GENERIC: 0.0: enabled 1
738 20:52:22.282795 PCI: 00:07.3: enabled 0
739 20:52:22.285784 GENERIC: 1.0: enabled 1
740 20:52:22.289329 PCI: 00:08.0: enabled 1
741 20:52:22.292395 PCI: 00:09.0: enabled 0
742 20:52:22.292478 PCI: 00:0a.0: enabled 0
743 20:52:22.296032 PCI: 00:0d.0: enabled 1
744 20:52:22.299060 USB0 port 0: enabled 1
745 20:52:22.302752 USB3 port 0: enabled 1
746 20:52:22.305945 USB3 port 1: enabled 1
747 20:52:22.306124 USB3 port 2: enabled 0
748 20:52:22.309061 USB3 port 3: enabled 0
749 20:52:22.312736 PCI: 00:0d.1: enabled 0
750 20:52:22.315883 PCI: 00:0d.2: enabled 0
751 20:52:22.319673 GENERIC: 0.0: enabled 1
752 20:52:22.319904 PCI: 00:0d.3: enabled 0
753 20:52:22.322449 PCI: 00:0e.0: enabled 0
754 20:52:22.326393 PCI: 00:10.2: enabled 1
755 20:52:22.329279 PCI: 00:10.6: enabled 0
756 20:52:22.332959 PCI: 00:10.7: enabled 0
757 20:52:22.333381 PCI: 00:12.0: enabled 0
758 20:52:22.336030 PCI: 00:12.6: enabled 0
759 20:52:22.339615 PCI: 00:13.0: enabled 0
760 20:52:22.342497 PCI: 00:14.0: enabled 1
761 20:52:22.346344 USB0 port 0: enabled 1
762 20:52:22.346766 USB2 port 0: enabled 0
763 20:52:22.349252 USB2 port 1: enabled 1
764 20:52:22.352975 USB2 port 2: enabled 1
765 20:52:22.355885 USB2 port 3: enabled 0
766 20:52:22.359570 USB2 port 4: enabled 1
767 20:52:22.362599 USB2 port 5: enabled 0
768 20:52:22.363036 USB2 port 6: enabled 0
769 20:52:22.365766 USB2 port 7: enabled 0
770 20:52:22.369518 USB2 port 8: enabled 0
771 20:52:22.372426 USB2 port 9: enabled 0
772 20:52:22.375896 USB3 port 0: enabled 0
773 20:52:22.376321 USB3 port 1: enabled 1
774 20:52:22.378934
775 20:52:22.379424 USB3 port 2: enabled 0
776 20:52:22.382474 USB3 port 3: enabled 0
777 20:52:22.385952 PCI: 00:14.1: enabled 0
778 20:52:22.389225 PCI: 00:14.2: enabled 1
779 20:52:22.392298 PCI: 00:14.3: enabled 1
780 20:52:22.392721 GENERIC: 0.0: enabled 1
781 20:52:22.395920 PCI: 00:15.0: enabled 1
782 20:52:22.398966 I2C: 00:1a: enabled 1
783 20:52:22.402587 I2C: 00:31: enabled 1
784 20:52:22.403014 I2C: 00:32: enabled 1
785 20:52:22.405921 PCI: 00:15.1: enabled 1
786 20:52:22.409241 I2C: 00:10: enabled 1
787 20:52:22.412312 PCI: 00:15.2: enabled 1
788 20:52:22.415978 PCI: 00:15.3: enabled 1
789 20:52:22.416403 PCI: 00:16.0: enabled 1
790 20:52:22.419060 PCI: 00:16.1: enabled 0
791 20:52:22.422551 PCI: 00:16.2: enabled 0
792 20:52:22.426050 PCI: 00:16.3: enabled 0
793 20:52:22.426475 PCI: 00:16.4: enabled 0
794 20:52:22.429824 PCI: 00:16.5: enabled 0
795 20:52:22.433313 PCI: 00:17.0: enabled 1
796 20:52:22.436996 PCI: 00:19.0: enabled 0
797 20:52:22.437455 PCI: 00:19.1: enabled 1
798 20:52:22.439825 I2C: 00:15: enabled 1
799 20:52:22.443464 PCI: 00:19.2: enabled 0
800 20:52:22.446666 PCI: 00:1d.0: enabled 1
801 20:52:22.450031 GENERIC: 0.0: enabled 1
802 20:52:22.450458 PCI: 00:1e.0: enabled 1
803 20:52:22.453240 PCI: 00:1e.1: enabled 0
804 20:52:22.456898 PCI: 00:1e.2: enabled 1
805 20:52:22.460061 SPI: 00: enabled 1
806 20:52:22.460541 PCI: 00:1e.3: enabled 1
807 20:52:22.463005 SPI: 00: enabled 1
808 20:52:22.513447 PCI: 00:1f.0: enabled 1
809 20:52:22.514074 PNP: 0c09.0: enabled 1
810 20:52:22.514941 PCI: 00:1f.1: enabled 0
811 20:52:22.515312 PCI: 00:1f.2: enabled 1
812 20:52:22.515633 GENERIC: 0.0: enabled 1
813 20:52:22.515946 GENERIC: 0.0: enabled 1
814 20:52:22.516329 GENERIC: 1.0: enabled 1
815 20:52:22.516673 PCI: 00:1f.3: enabled 1
816 20:52:22.516998 PCI: 00:1f.4: enabled 0
817 20:52:22.517405 PCI: 00:1f.5: enabled 1
818 20:52:22.517823 PCI: 00:1f.6: enabled 0
819 20:52:22.518251 PCI: 00:1f.7: enabled 0
820 20:52:22.518637 CPU_CLUSTER: 0: enabled 1
821 20:52:22.519049 APIC: 00: enabled 1
822 20:52:22.519460 APIC: 01: enabled 1
823 20:52:22.519789 APIC: 03: enabled 1
824 20:52:22.520129 APIC: 04: enabled 1
825 20:52:22.520507 APIC: 07: enabled 1
826 20:52:22.520893 APIC: 06: enabled 1
827 20:52:22.521282 APIC: 02: enabled 1
828 20:52:22.533316 APIC: 05: enabled 1
829 20:52:22.533804 Root Device scanning...
830 20:52:22.534264 scan_static_bus for Root Device
831 20:52:22.534760 DOMAIN: 0000 enabled
832 20:52:22.535216 CPU_CLUSTER: 0 enabled
833 20:52:22.536327 DOMAIN: 0000 scanning...
834 20:52:22.536720 PCI: pci_scan_bus for bus 00
835 20:52:22.539972 PCI: 00:00.0 [8086/0000] ops
836 20:52:22.540423 PCI: 00:00.0 [8086/9a12] enabled
837 20:52:22.542937 PCI: 00:02.0 [8086/0000] bus ops
838 20:52:22.546515 PCI: 00:02.0 [8086/9a40] enabled
839 20:52:22.549484 PCI: 00:04.0 [8086/0000] bus ops
840 20:52:22.553290 PCI: 00:04.0 [8086/9a03] enabled
841 20:52:22.556455 PCI: 00:05.0 [8086/9a19] enabled
842 20:52:22.559995 PCI: 00:07.0 [0000/0000] hidden
843 20:52:22.563085 PCI: 00:08.0 [8086/9a11] enabled
844 20:52:22.566200 PCI: 00:0a.0 [8086/9a0d] disabled
845 20:52:22.569807 PCI: 00:0d.0 [8086/0000] bus ops
846 20:52:22.572745 PCI: 00:0d.0 [8086/9a13] enabled
847 20:52:22.576004 PCI: 00:14.0 [8086/0000] bus ops
848 20:52:22.579533 PCI: 00:14.0 [8086/a0ed] enabled
849 20:52:22.583134 PCI: 00:14.2 [8086/a0ef] enabled
850 20:52:22.586283 PCI: 00:14.3 [8086/0000] bus ops
851 20:52:22.589411 PCI: 00:14.3 [8086/a0f0] enabled
852 20:52:22.592966 PCI: 00:15.0 [8086/0000] bus ops
853 20:52:22.595999 PCI: 00:15.0 [8086/a0e8] enabled
854 20:52:22.599690 PCI: 00:15.1 [8086/0000] bus ops
855 20:52:22.602716 PCI: 00:15.1 [8086/a0e9] enabled
856 20:52:22.606395 PCI: 00:15.2 [8086/0000] bus ops
857 20:52:22.609536 PCI: 00:15.2 [8086/a0ea] enabled
858 20:52:22.613244 PCI: 00:15.3 [8086/0000] bus ops
859 20:52:22.616297 PCI: 00:15.3 [8086/a0eb] enabled
860 20:52:22.619453 PCI: 00:16.0 [8086/0000] ops
861 20:52:22.623296 PCI: 00:16.0 [8086/a0e0] enabled
862 20:52:22.629882 PCI: Static device PCI: 00:17.0 not found, disabling it.
863 20:52:22.632988 PCI: 00:19.0 [8086/0000] bus ops
864 20:52:22.636281 PCI: 00:19.0 [8086/a0c5] disabled
865 20:52:22.639531 PCI: 00:19.1 [8086/0000] bus ops
866 20:52:22.642897 PCI: 00:19.1 [8086/a0c6] enabled
867 20:52:22.646421 PCI: 00:1d.0 [8086/0000] bus ops
868 20:52:22.649515 PCI: 00:1d.0 [8086/a0b0] enabled
869 20:52:22.653198 PCI: 00:1e.0 [8086/0000] ops
870 20:52:22.656008 PCI: 00:1e.0 [8086/a0a8] enabled
871 20:52:22.659807 PCI: 00:1e.2 [8086/0000] bus ops
872 20:52:22.662737 PCI: 00:1e.2 [8086/a0aa] enabled
873 20:52:22.665947 PCI: 00:1e.3 [8086/0000] bus ops
874 20:52:22.669542 PCI: 00:1e.3 [8086/a0ab] enabled
875 20:52:22.672551 PCI: 00:1f.0 [8086/0000] bus ops
876 20:52:22.676364 PCI: 00:1f.0 [8086/a087] enabled
877 20:52:22.676822 RTC Init
878 20:52:22.679424 Set power on after power failure.
879 20:52:22.682983 Disabling Deep S3
880 20:52:22.683419 Disabling Deep S3
881 20:52:22.685925 Disabling Deep S4
882 20:52:22.686411 Disabling Deep S4
883 20:52:22.689681
884 20:52:22.690121 Disabling Deep S5
885 20:52:22.692576 Disabling Deep S5
886 20:52:22.696294 PCI: 00:1f.2 [0000/0000] hidden
887 20:52:22.699428 PCI: 00:1f.3 [8086/0000] bus ops
888 20:52:22.702507 PCI: 00:1f.3 [8086/a0c8] enabled
889 20:52:22.706121 PCI: 00:1f.5 [8086/0000] bus ops
890 20:52:22.709071 PCI: 00:1f.5 [8086/a0a4] enabled
891 20:52:22.712841 PCI: Leftover static devices:
892 20:52:22.713268 PCI: 00:10.2
893 20:52:22.713668 PCI: 00:10.6
894 20:52:22.715806 PCI: 00:10.7
895 20:52:22.716254 PCI: 00:06.0
896 20:52:22.718931 PCI: 00:07.1
897 20:52:22.719376 PCI: 00:07.2
898 20:52:22.719735 PCI: 00:07.3
899 20:52:22.722604 PCI: 00:09.0
900 20:52:22.723027 PCI: 00:0d.1
901 20:52:22.725737 PCI: 00:0d.2
902 20:52:22.726173 PCI: 00:0d.3
903 20:52:22.729292 PCI: 00:0e.0
904 20:52:22.729809 PCI: 00:12.0
905 20:52:22.730166 PCI: 00:12.6
906 20:52:22.732211 PCI: 00:13.0
907 20:52:22.732644 PCI: 00:14.1
908 20:52:22.735717 PCI: 00:16.1
909 20:52:22.736154 PCI: 00:16.2
910 20:52:22.736496 PCI: 00:16.3
911 20:52:22.739313 PCI: 00:16.4
912 20:52:22.739816 PCI: 00:16.5
913 20:52:22.742296 PCI: 00:17.0
914 20:52:22.742703 PCI: 00:19.2
915 20:52:22.743068 PCI: 00:1e.1
916 20:52:22.745857
917 20:52:22.746408 PCI: 00:1f.1
918 20:52:22.746947 PCI: 00:1f.4
919 20:52:22.748815 PCI: 00:1f.6
920 20:52:22.749298 PCI: 00:1f.7
921 20:52:22.752464 PCI: Check your devicetree.cb.
922 20:52:22.755694 PCI: 00:02.0 scanning...
923 20:52:22.759295 scan_generic_bus for PCI: 00:02.0
924 20:52:22.762350 scan_generic_bus for PCI: 00:02.0 done
925 20:52:22.768424 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
926 20:52:22.768902 PCI: 00:04.0 scanning...
927 20:52:22.772061 scan_generic_bus for PCI: 00:04.0
928 20:52:22.775245
929 20:52:22.775701 GENERIC: 0.0 enabled
930 20:52:22.781969 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
931 20:52:22.785009 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
932 20:52:22.788707 PCI: 00:0d.0 scanning...
933 20:52:22.791631 scan_static_bus for PCI: 00:0d.0
934 20:52:22.795328 USB0 port 0 enabled
935 20:52:22.798483 USB0 port 0 scanning...
936 20:52:22.801658 scan_static_bus for USB0 port 0
937 20:52:22.802137 USB3 port 0 enabled
938 20:52:22.804746 USB3 port 1 enabled
939 20:52:22.808400 USB3 port 2 disabled
940 20:52:22.808876 USB3 port 3 disabled
941 20:52:22.811421 USB3 port 0 scanning...
942 20:52:22.815056 scan_static_bus for USB3 port 0
943 20:52:22.818281 scan_static_bus for USB3 port 0 done
944 20:52:22.821906 scan_bus: bus USB3 port 0 finished in 6 msecs
945 20:52:22.824972
946 20:52:22.825379 USB3 port 1 scanning...
947 20:52:22.828216 scan_static_bus for USB3 port 1
948 20:52:22.831726 scan_static_bus for USB3 port 1 done
949 20:52:22.838361 scan_bus: bus USB3 port 1 finished in 6 msecs
950 20:52:22.841366 scan_static_bus for USB0 port 0 done
951 20:52:22.845020 scan_bus: bus USB0 port 0 finished in 43 msecs
952 20:52:22.847964 scan_static_bus for PCI: 00:0d.0 done
953 20:52:22.854980 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
954 20:52:22.857920 PCI: 00:14.0 scanning...
955 20:52:22.861325 scan_static_bus for PCI: 00:14.0
956 20:52:22.861806 USB0 port 0 enabled
957 20:52:22.864993 USB0 port 0 scanning...
958 20:52:22.868172 scan_static_bus for USB0 port 0
959 20:52:22.871231 USB2 port 0 disabled
960 20:52:22.871689 USB2 port 1 enabled
961 20:52:22.874710 USB2 port 2 enabled
962 20:52:22.877811 USB2 port 3 disabled
963 20:52:22.878283 USB2 port 4 enabled
964 20:52:22.881651 USB2 port 5 disabled
965 20:52:22.884526 USB2 port 6 disabled
966 20:52:22.884982 USB2 port 7 disabled
967 20:52:22.888034 USB2 port 8 disabled
968 20:52:22.891050 USB2 port 9 disabled
969 20:52:22.891520 USB3 port 0 disabled
970 20:52:22.894699 USB3 port 1 enabled
971 20:52:22.895129 USB3 port 2 disabled
972 20:52:22.897751 USB3 port 3 disabled
973 20:52:22.900923 USB2 port 1 scanning...
974 20:52:22.904472 scan_static_bus for USB2 port 1
975 20:52:22.908088 scan_static_bus for USB2 port 1 done
976 20:52:22.911059 scan_bus: bus USB2 port 1 finished in 6 msecs
977 20:52:22.914697 USB2 port 2 scanning...
978 20:52:22.917850 scan_static_bus for USB2 port 2
979 20:52:22.921481 scan_static_bus for USB2 port 2 done
980 20:52:22.927765 scan_bus: bus USB2 port 2 finished in 6 msecs
981 20:52:22.928197 USB2 port 4 scanning...
982 20:52:22.931301 scan_static_bus for USB2 port 4
983 20:52:22.937504 scan_static_bus for USB2 port 4 done
984 20:52:22.940935 scan_bus: bus USB2 port 4 finished in 6 msecs
985 20:52:22.944545 USB3 port 1 scanning...
986 20:52:22.947564 scan_static_bus for USB3 port 1
987 20:52:22.951209 scan_static_bus for USB3 port 1 done
988 20:52:22.954208 scan_bus: bus USB3 port 1 finished in 6 msecs
989 20:52:22.957634 scan_static_bus for USB0 port 0 done
990 20:52:22.964181 scan_bus: bus USB0 port 0 finished in 93 msecs
991 20:52:22.967283 scan_static_bus for PCI: 00:14.0 done
992 20:52:22.971011 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
993 20:52:22.974292 PCI: 00:14.3 scanning...
994 20:52:22.977334 scan_static_bus for PCI: 00:14.3
995 20:52:22.980558 GENERIC: 0.0 enabled
996 20:52:22.984135 scan_static_bus for PCI: 00:14.3 done
997 20:52:22.987136 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
998 20:52:22.990662 PCI: 00:15.0 scanning...
999 20:52:22.993673 scan_static_bus for PCI: 00:15.0
1000 20:52:22.997198 I2C: 00:1a enabled
1001 20:52:22.997701 I2C: 00:31 enabled
1002 20:52:23.000372
1003 20:52:23.000798 I2C: 00:32 enabled
1004 20:52:23.004615 scan_static_bus for PCI: 00:15.0 done
1005 20:52:23.007667 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1006 20:52:23.011378
1007 20:52:23.011834 PCI: 00:15.1 scanning...
1008 20:52:23.014251 scan_static_bus for PCI: 00:15.1
1009 20:52:23.017526 I2C: 00:10 enabled
1010 20:52:23.021127 scan_static_bus for PCI: 00:15.1 done
1011 20:52:23.024212 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1012 20:52:23.027904
1013 20:52:23.028345 PCI: 00:15.2 scanning...
1014 20:52:23.030998 scan_static_bus for PCI: 00:15.2
1015 20:52:23.037570 scan_static_bus for PCI: 00:15.2 done
1016 20:52:23.040759 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1017 20:52:23.044302 PCI: 00:15.3 scanning...
1018 20:52:23.047226 scan_static_bus for PCI: 00:15.3
1019 20:52:23.050788 scan_static_bus for PCI: 00:15.3 done
1020 20:52:23.053873 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1021 20:52:23.057490 PCI: 00:19.1 scanning...
1022 20:52:23.060465 scan_static_bus for PCI: 00:19.1
1023 20:52:23.064075 I2C: 00:15 enabled
1024 20:52:23.067411 scan_static_bus for PCI: 00:19.1 done
1025 20:52:23.070585 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1026 20:52:23.074326 PCI: 00:1d.0 scanning...
1027 20:52:23.077289 do_pci_scan_bridge for PCI: 00:1d.0
1028 20:52:23.080326 PCI: pci_scan_bus for bus 01
1029 20:52:23.084069 PCI: 01:00.0 [1c5c/174a] enabled
1030 20:52:23.087182 GENERIC: 0.0 enabled
1031 20:52:23.090880 Enabling Common Clock Configuration
1032 20:52:23.093785 L1 Sub-State supported from root port 29
1033 20:52:23.097248 L1 Sub-State Support = 0xf
1034 20:52:23.100612 CommonModeRestoreTime = 0x28
1035 20:52:23.104140 Power On Value = 0x16, Power On Scale = 0x0
1036 20:52:23.107303 ASPM: Enabled L1
1037 20:52:23.110297 PCIe: Max_Payload_Size adjusted to 128
1038 20:52:23.113900 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1039 20:52:23.116898 PCI: 00:1e.2 scanning...
1040 20:52:23.120675 scan_generic_bus for PCI: 00:1e.2
1041 20:52:23.123827 SPI: 00 enabled
1042 20:52:23.130791 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1043 20:52:23.133654 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1044 20:52:23.137310 PCI: 00:1e.3 scanning...
1045 20:52:23.140464 scan_generic_bus for PCI: 00:1e.3
1046 20:52:23.140892 SPI: 00 enabled
1047 20:52:23.147007 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1048 20:52:23.153884 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1049 20:52:23.154314 PCI: 00:1f.0 scanning...
1050 20:52:23.157208 scan_static_bus for PCI: 00:1f.0
1051 20:52:23.160970 PNP: 0c09.0 enabled
1052 20:52:23.164084 PNP: 0c09.0 scanning...
1053 20:52:23.167196 scan_static_bus for PNP: 0c09.0
1054 20:52:23.170818 scan_static_bus for PNP: 0c09.0 done
1055 20:52:23.173775 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1056 20:52:23.177445 scan_static_bus for PCI: 00:1f.0 done
1057 20:52:23.180631
1058 20:52:23.183640 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1059 20:52:23.187291 PCI: 00:1f.2 scanning...
1060 20:52:23.190248 scan_static_bus for PCI: 00:1f.2
1061 20:52:23.190993 GENERIC: 0.0 enabled
1062 20:52:23.193841 GENERIC: 0.0 scanning...
1063 20:52:23.197351 scan_static_bus for GENERIC: 0.0
1064 20:52:23.200060 GENERIC: 0.0 enabled
1065 20:52:23.203306 GENERIC: 1.0 enabled
1066 20:52:23.206970 scan_static_bus for GENERIC: 0.0 done
1067 20:52:23.210334 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1068 20:52:23.214072 scan_static_bus for PCI: 00:1f.2 done
1069 20:52:23.220751 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1070 20:52:23.221181 PCI: 00:1f.3 scanning...
1071 20:52:23.223723
1072 20:52:23.226889 scan_static_bus for PCI: 00:1f.3
1073 20:52:23.230415 scan_static_bus for PCI: 00:1f.3 done
1074 20:52:23.233384 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1075 20:52:23.236856 PCI: 00:1f.5 scanning...
1076 20:52:23.240140 scan_generic_bus for PCI: 00:1f.5
1077 20:52:23.243209 scan_generic_bus for PCI: 00:1f.5 done
1078 20:52:23.250223 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1079 20:52:23.253237 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1080 20:52:23.256805 scan_static_bus for Root Device done
1081 20:52:23.263703 scan_bus: bus Root Device finished in 737 msecs
1082 20:52:23.264157 done
1083 20:52:23.270154 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1084 20:52:23.273136 Chrome EC: UHEPI supported
1085 20:52:23.280044 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1086 20:52:23.283286 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1087 20:52:23.290009 SPI flash protection: WPSW=0 SRP0=0
1088 20:52:23.293124 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1089 20:52:23.300049 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1090 20:52:23.302780 found VGA at PCI: 00:02.0
1091 20:52:23.306608 Setting up VGA for PCI: 00:02.0
1092 20:52:23.309500 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1093 20:52:23.316339 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1094 20:52:23.316817 Allocating resources...
1095 20:52:23.319601 Reading resources...
1096 20:52:23.323258 Root Device read_resources bus 0 link: 0
1097 20:52:23.329371 DOMAIN: 0000 read_resources bus 0 link: 0
1098 20:52:23.333023 PCI: 00:04.0 read_resources bus 1 link: 0
1099 20:52:23.339683 PCI: 00:04.0 read_resources bus 1 link: 0 done
1100 20:52:23.342740 PCI: 00:0d.0 read_resources bus 0 link: 0
1101 20:52:23.346382 USB0 port 0 read_resources bus 0 link: 0
1102 20:52:23.353348 USB0 port 0 read_resources bus 0 link: 0 done
1103 20:52:23.356883 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1104 20:52:23.363584 PCI: 00:14.0 read_resources bus 0 link: 0
1105 20:52:23.366629 USB0 port 0 read_resources bus 0 link: 0
1106 20:52:23.373522 USB0 port 0 read_resources bus 0 link: 0 done
1107 20:52:23.376532 PCI: 00:14.0 read_resources bus 0 link: 0 done
1108 20:52:23.383019 PCI: 00:14.3 read_resources bus 0 link: 0
1109 20:52:23.386222 PCI: 00:14.3 read_resources bus 0 link: 0 done
1110 20:52:23.393145 PCI: 00:15.0 read_resources bus 0 link: 0
1111 20:52:23.396212 PCI: 00:15.0 read_resources bus 0 link: 0 done
1112 20:52:23.402935 PCI: 00:15.1 read_resources bus 0 link: 0
1113 20:52:23.406002 PCI: 00:15.1 read_resources bus 0 link: 0 done
1114 20:52:23.413403 PCI: 00:19.1 read_resources bus 0 link: 0
1115 20:52:23.416380 PCI: 00:19.1 read_resources bus 0 link: 0 done
1116 20:52:23.423113 PCI: 00:1d.0 read_resources bus 1 link: 0
1117 20:52:23.426776 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1118 20:52:23.433320 PCI: 00:1e.2 read_resources bus 2 link: 0
1119 20:52:23.436461 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1120 20:52:23.443339 PCI: 00:1e.3 read_resources bus 3 link: 0
1121 20:52:23.446328 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1122 20:52:23.452927 PCI: 00:1f.0 read_resources bus 0 link: 0
1123 20:52:23.456405 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1124 20:52:23.459975 PCI: 00:1f.2 read_resources bus 0 link: 0
1125 20:52:23.463067
1126 20:52:23.466485 GENERIC: 0.0 read_resources bus 0 link: 0
1127 20:52:23.469648 GENERIC: 0.0 read_resources bus 0 link: 0 done
1128 20:52:23.476911 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1129 20:52:23.483190 DOMAIN: 0000 read_resources bus 0 link: 0 done
1130 20:52:23.486773 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1131 20:52:23.493361 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1132 20:52:23.496650 Root Device read_resources bus 0 link: 0 done
1133 20:52:23.499641 Done reading resources.
1134 20:52:23.503332 Show resources in subtree (Root Device)...After reading.
1135 20:52:23.509797 Root Device child on link 0 DOMAIN: 0000
1136 20:52:23.513477 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1137 20:52:23.523184 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1138 20:52:23.532753 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1139 20:52:23.533293 PCI: 00:00.0
1140 20:52:23.542910 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1141 20:52:23.553228 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1142 20:52:23.562974 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1143 20:52:23.572666 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1144 20:52:23.583305 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1145 20:52:23.589545 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1146 20:52:23.599280 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1147 20:52:23.609589 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1148 20:52:23.619552 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1149 20:52:23.629231 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1150 20:52:23.636102 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1151 20:52:23.639102
1152 20:52:23.645933 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1153 20:52:23.655601 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1154 20:52:23.665785 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1155 20:52:23.675532 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1156 20:52:23.685929 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1157 20:52:23.695769 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1158 20:52:23.702412 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1159 20:52:23.712287 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1160 20:52:23.722022 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1161 20:52:23.725710 PCI: 00:02.0
1162 20:52:23.735313 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1163 20:52:23.745300 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1164 20:52:23.752024 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1165 20:52:23.758689 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1166 20:52:23.768235 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1167 20:52:23.768719 GENERIC: 0.0
1168 20:52:23.771870 PCI: 00:05.0
1169 20:52:23.781627 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1170 20:52:23.785340 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1171 20:52:23.788310 GENERIC: 0.0
1172 20:52:23.788725 PCI: 00:08.0
1173 20:52:23.798181 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1174 20:52:23.801876 PCI: 00:0a.0
1175 20:52:23.805010 PCI: 00:0d.0 child on link 0 USB0 port 0
1176 20:52:23.814670 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1177 20:52:23.818240 USB0 port 0 child on link 0 USB3 port 0
1178 20:52:23.821277 USB3 port 0
1179 20:52:23.821752 USB3 port 1
1180 20:52:23.824928
1181 20:52:23.825380 USB3 port 2
1182 20:52:23.827993 USB3 port 3
1183 20:52:23.831546 PCI: 00:14.0 child on link 0 USB0 port 0
1184 20:52:23.841411 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1185 20:52:23.845117 USB0 port 0 child on link 0 USB2 port 0
1186 20:52:23.848141 USB2 port 0
1187 20:52:23.848574 USB2 port 1
1188 20:52:23.851279 USB2 port 2
1189 20:52:23.851716 USB2 port 3
1190 20:52:23.854945 USB2 port 4
1191 20:52:23.855444 USB2 port 5
1192 20:52:23.857959 USB2 port 6
1193 20:52:23.861480 USB2 port 7
1194 20:52:23.861927 USB2 port 8
1195 20:52:23.864501 USB2 port 9
1196 20:52:23.864973 USB3 port 0
1197 20:52:23.868018 USB3 port 1
1198 20:52:23.868453 USB3 port 2
1199 20:52:23.871631 USB3 port 3
1200 20:52:23.872067 PCI: 00:14.2
1201 20:52:23.881449 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1202 20:52:23.891147 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1203 20:52:23.897857 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1204 20:52:23.908091 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 20:52:23.908571 GENERIC: 0.0
1206 20:52:23.911182 PCI: 00:15.0 child on link 0 I2C: 00:1a
1207 20:52:23.921298 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1208 20:52:23.924364 I2C: 00:1a
1209 20:52:23.924803 I2C: 00:31
1210 20:52:23.927593 I2C: 00:32
1211 20:52:23.931202 PCI: 00:15.1 child on link 0 I2C: 00:10
1212 20:52:23.940829 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 20:52:23.944508 I2C: 00:10
1214 20:52:23.944953 PCI: 00:15.2
1215 20:52:23.954227 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1216 20:52:23.957833 PCI: 00:15.3
1217 20:52:23.967500 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1218 20:52:23.967950 PCI: 00:16.0
1219 20:52:23.977240 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1220 20:52:23.980920 PCI: 00:19.0
1221 20:52:23.984363 PCI: 00:19.1 child on link 0 I2C: 00:15
1222 20:52:23.994047 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1223 20:52:23.994512 I2C: 00:15
1224 20:52:24.000785 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1225 20:52:24.007784 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1226 20:52:24.017471 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1227 20:52:24.027124 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1228 20:52:24.030142 GENERIC: 0.0
1229 20:52:24.030237 PCI: 01:00.0
1230 20:52:24.039861 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1231 20:52:24.050039 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1232 20:52:24.060363 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1233 20:52:24.060487 PCI: 00:1e.0
1234 20:52:24.073403 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1235 20:52:24.077066 PCI: 00:1e.2 child on link 0 SPI: 00
1236 20:52:24.087046 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1237 20:52:24.087267 SPI: 00
1238 20:52:24.090537 PCI: 00:1e.3 child on link 0 SPI: 00
1239 20:52:24.100504 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 20:52:24.103447 SPI: 00
1241 20:52:24.106718 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1242 20:52:24.117093 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1243 20:52:24.117622 PNP: 0c09.0
1244 20:52:24.126659 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1245 20:52:24.130423 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1246 20:52:24.140089 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1247 20:52:24.150331 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1248 20:52:24.153525 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1249 20:52:24.156540 GENERIC: 0.0
1250 20:52:24.156991 GENERIC: 1.0
1251 20:52:24.160215 PCI: 00:1f.3
1252 20:52:24.169816 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1253 20:52:24.179924 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1254 20:52:24.180425 PCI: 00:1f.5
1255 20:52:24.190002 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1256 20:52:24.193499 CPU_CLUSTER: 0 child on link 0 APIC: 00
1257 20:52:24.196480 APIC: 00
1258 20:52:24.196987 APIC: 01
1259 20:52:24.199597 APIC: 03
1260 20:52:24.200032 APIC: 04
1261 20:52:24.200429 APIC: 07
1262 20:52:24.203261 APIC: 06
1263 20:52:24.203699 APIC: 02
1264 20:52:24.204046 APIC: 05
1265 20:52:24.206367
1266 20:52:24.213297 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1267 20:52:24.219932 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1268 20:52:24.223066 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1269 20:52:24.229679 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1270 20:52:24.233250 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1271 20:52:24.239349 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1272 20:52:24.242924 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1273 20:52:24.249675 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1274 20:52:24.256571 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1275 20:52:24.266280 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1276 20:52:24.272753 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1277 20:52:24.279299 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1278 20:52:24.286016 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1279 20:52:24.292742 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1280 20:52:24.302407 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1281 20:52:24.305584 DOMAIN: 0000: Resource ranges:
1282 20:52:24.308916 * Base: 1000, Size: 800, Tag: 100
1283 20:52:24.312729 * Base: 1900, Size: e700, Tag: 100
1284 20:52:24.315923 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1285 20:52:24.322446 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1286 20:52:24.328988 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1287 20:52:24.339059 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1288 20:52:24.345375 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1289 20:52:24.352309 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1290 20:52:24.362096 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1291 20:52:24.368739 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1292 20:52:24.375202 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1293 20:52:24.385589 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1294 20:52:24.392331 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1295 20:52:24.399046 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1296 20:52:24.408692 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1297 20:52:24.415528 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1298 20:52:24.422185 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1299 20:52:24.431854 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1300 20:52:24.438564 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1301 20:52:24.445217 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1302 20:52:24.454798 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1303 20:52:24.461638 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1304 20:52:24.468427 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1305 20:52:24.478195 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1306 20:52:24.484905 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1307 20:52:24.491574 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1308 20:52:24.501463 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1309 20:52:24.505144 DOMAIN: 0000: Resource ranges:
1310 20:52:24.508261 * Base: 7fc00000, Size: 40400000, Tag: 200
1311 20:52:24.511275 * Base: d0000000, Size: 28000000, Tag: 200
1312 20:52:24.518016 * Base: fa000000, Size: 1000000, Tag: 200
1313 20:52:24.521219 * Base: fb001000, Size: 2fff000, Tag: 200
1314 20:52:24.524875 * Base: fe010000, Size: 2e000, Tag: 200
1315 20:52:24.527866 * Base: fe03f000, Size: d41000, Tag: 200
1316 20:52:24.534338 * Base: fed88000, Size: 8000, Tag: 200
1317 20:52:24.537982 * Base: fed93000, Size: d000, Tag: 200
1318 20:52:24.541571 * Base: feda2000, Size: 1e000, Tag: 200
1319 20:52:24.544689 * Base: fede0000, Size: 1220000, Tag: 200
1320 20:52:24.551339 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1321 20:52:24.557654 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1322 20:52:24.564434 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1323 20:52:24.570959 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1324 20:52:24.577712 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1325 20:52:24.584269 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1326 20:52:24.590899 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1327 20:52:24.597753 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1328 20:52:24.604326 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1329 20:52:24.611172 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1330 20:52:24.617255 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1331 20:52:24.624042 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1332 20:52:24.630739 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1333 20:52:24.637226 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1334 20:52:24.643920 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1335 20:52:24.650772 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1336 20:52:24.657501 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1337 20:52:24.663693 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1338 20:52:24.670536 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1339 20:52:24.677158 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1340 20:52:24.683855 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1341 20:52:24.689983 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1342 20:52:24.696680 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1343 20:52:24.703295 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1344 20:52:24.710054 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1345 20:52:24.713735
1346 20:52:24.713830 PCI: 00:1d.0: Resource ranges:
1347 20:52:24.719975 * Base: 7fc00000, Size: 100000, Tag: 200
1348 20:52:24.726620 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1349 20:52:24.733160 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1350 20:52:24.739860 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1351 20:52:24.746678 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1352 20:52:24.753202 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1353 20:52:24.759980 Root Device assign_resources, bus 0 link: 0
1354 20:52:24.763003 DOMAIN: 0000 assign_resources, bus 0 link: 0
1355 20:52:24.772884 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1356 20:52:24.779656 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1357 20:52:24.789794 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1358 20:52:24.796086 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1359 20:52:24.799780 PCI: 00:04.0 assign_resources, bus 1 link: 0
1360 20:52:24.806588 PCI: 00:04.0 assign_resources, bus 1 link: 0
1361 20:52:24.813363 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1362 20:52:24.823281 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1363 20:52:24.829409 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1364 20:52:24.836198 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1365 20:52:24.839771 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1366 20:52:24.849888 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1367 20:52:24.853252 PCI: 00:14.0 assign_resources, bus 0 link: 0
1368 20:52:24.856854 PCI: 00:14.0 assign_resources, bus 0 link: 0
1369 20:52:24.866401 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1370 20:52:24.873112 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1371 20:52:24.882703 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1372 20:52:24.885980 PCI: 00:14.3 assign_resources, bus 0 link: 0
1373 20:52:24.892410 PCI: 00:14.3 assign_resources, bus 0 link: 0
1374 20:52:24.899747 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1375 20:52:24.902782 PCI: 00:15.0 assign_resources, bus 0 link: 0
1376 20:52:24.909496 PCI: 00:15.0 assign_resources, bus 0 link: 0
1377 20:52:24.916094 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1378 20:52:24.922969 PCI: 00:15.1 assign_resources, bus 0 link: 0
1379 20:52:24.925823 PCI: 00:15.1 assign_resources, bus 0 link: 0
1380 20:52:24.935628 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1381 20:52:24.942173 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1382 20:52:24.952029 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1383 20:52:24.958539 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1384 20:52:24.962041 PCI: 00:19.1 assign_resources, bus 0 link: 0
1385 20:52:24.968864 PCI: 00:19.1 assign_resources, bus 0 link: 0
1386 20:52:24.975816 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1387 20:52:24.985390 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1388 20:52:24.995863 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1389 20:52:24.998832 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1390 20:52:25.008532 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1391 20:52:25.015358 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1392 20:52:25.024960 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1393 20:52:25.028727 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1394 20:52:25.038649 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1395 20:52:25.041760 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1396 20:52:25.045301 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1397 20:52:25.055087 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1398 20:52:25.058682 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1399 20:52:25.065306 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1400 20:52:25.068414 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1401 20:52:25.075268 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1402 20:52:25.078460 LPC: Trying to open IO window from 800 size 1ff
1403 20:52:25.088711 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1404 20:52:25.095150 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1405 20:52:25.101225 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1406 20:52:25.108363 DOMAIN: 0000 assign_resources, bus 0 link: 0
1407 20:52:25.111363 Root Device assign_resources, bus 0 link: 0
1408 20:52:25.114573 Done setting resources.
1409 20:52:25.121260 Show resources in subtree (Root Device)...After assigning values.
1410 20:52:25.124714 Root Device child on link 0 DOMAIN: 0000
1411 20:52:25.131702 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1412 20:52:25.137944 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1413 20:52:25.148096 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1414 20:52:25.151097 PCI: 00:00.0
1415 20:52:25.161474 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1416 20:52:25.170868 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1417 20:52:25.177791 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1418 20:52:25.187901 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1419 20:52:25.197475 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1420 20:52:25.208101 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1421 20:52:25.217702 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1422 20:52:25.227512 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1423 20:52:25.234546 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1424 20:52:25.244015 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1425 20:52:25.254365 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1426 20:52:25.264279 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1427 20:52:25.273895 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1428 20:52:25.280784 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1429 20:52:25.290651 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1430 20:52:25.300259 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1431 20:52:25.310510 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1432 20:52:25.320342 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1433 20:52:25.330279 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1434 20:52:25.340135 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1435 20:52:25.340597 PCI: 00:02.0
1436 20:52:25.350424 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1437 20:52:25.363385 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1438 20:52:25.370161 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1439 20:52:25.376971 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1440 20:52:25.387059 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1441 20:52:25.387516 GENERIC: 0.0
1442 20:52:25.390046 PCI: 00:05.0
1443 20:52:25.400217 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1444 20:52:25.403708 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1445 20:52:25.406573 GENERIC: 0.0
1446 20:52:25.406970 PCI: 00:08.0
1447 20:52:25.420066 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1448 20:52:25.420520 PCI: 00:0a.0
1449 20:52:25.423249 PCI: 00:0d.0 child on link 0 USB0 port 0
1450 20:52:25.436785 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1451 20:52:25.439892 USB0 port 0 child on link 0 USB3 port 0
1452 20:52:25.440346 USB3 port 0
1453 20:52:25.442965 USB3 port 1
1454 20:52:25.443418 USB3 port 2
1455 20:52:25.446595 USB3 port 3
1456 20:52:25.450153 PCI: 00:14.0 child on link 0 USB0 port 0
1457 20:52:25.459579 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1458 20:52:25.466444 USB0 port 0 child on link 0 USB2 port 0
1459 20:52:25.466888 USB2 port 0
1460 20:52:25.470114 USB2 port 1
1461 20:52:25.470552 USB2 port 2
1462 20:52:25.473034 USB2 port 3
1463 20:52:25.473567 USB2 port 4
1464 20:52:25.476297 USB2 port 5
1465 20:52:25.476745 USB2 port 6
1466 20:52:25.479939 USB2 port 7
1467 20:52:25.482685 USB2 port 8
1468 20:52:25.482769 USB2 port 9
1469 20:52:25.485864 USB3 port 0
1470 20:52:25.485948 USB3 port 1
1471 20:52:25.489615 USB3 port 2
1472 20:52:25.489702 USB3 port 3
1473 20:52:25.492546 PCI: 00:14.2
1474 20:52:25.502346 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1475 20:52:25.512696 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1476 20:52:25.515865 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1477 20:52:25.526456 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1478 20:52:25.529484 GENERIC: 0.0
1479 20:52:25.532557 PCI: 00:15.0 child on link 0 I2C: 00:1a
1480 20:52:25.543033 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1481 20:52:25.546058 I2C: 00:1a
1482 20:52:25.546545 I2C: 00:31
1483 20:52:25.549052 I2C: 00:32
1484 20:52:25.552772 PCI: 00:15.1 child on link 0 I2C: 00:10
1485 20:52:25.562678 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1486 20:52:25.565818 I2C: 00:10
1487 20:52:25.566253 PCI: 00:15.2
1488 20:52:25.575853 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1489 20:52:25.579685 PCI: 00:15.3
1490 20:52:25.589554 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1491 20:52:25.589996 PCI: 00:16.0
1492 20:52:25.599370 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1493 20:52:25.602753
1494 20:52:25.603271 PCI: 00:19.0
1495 20:52:25.605789 PCI: 00:19.1 child on link 0 I2C: 00:15
1496 20:52:25.615544 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1497 20:52:25.619263 I2C: 00:15
1498 20:52:25.622268 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1499 20:52:25.632545 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1500 20:52:25.642599 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1501 20:52:25.645549
1502 20:52:25.655882 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1503 20:52:25.656364 GENERIC: 0.0
1504 20:52:25.658868 PCI: 01:00.0
1505 20:52:25.668462 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1506 20:52:25.678235 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1507 20:52:25.688131 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1508 20:52:25.691811 PCI: 00:1e.0
1509 20:52:25.701554 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1510 20:52:25.704803 PCI: 00:1e.2 child on link 0 SPI: 00
1511 20:52:25.715099 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1512 20:52:25.718136 SPI: 00
1513 20:52:25.721112 PCI: 00:1e.3 child on link 0 SPI: 00
1514 20:52:25.731403 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1515 20:52:25.734553 SPI: 00
1516 20:52:25.738285 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1517 20:52:25.744479 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1518 20:52:25.748290 PNP: 0c09.0
1519 20:52:25.757955 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1520 20:52:25.761524 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1521 20:52:25.771263 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1522 20:52:25.781376 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1523 20:52:25.784375 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1524 20:52:25.788010 GENERIC: 0.0
1525 20:52:25.788087 GENERIC: 1.0
1526 20:52:25.791145 PCI: 00:1f.3
1527 20:52:25.801010 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1528 20:52:25.811238 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1529 20:52:25.811322 PCI: 00:1f.5
1530 20:52:25.820913 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1531 20:52:25.824516
1532 20:52:25.827631 CPU_CLUSTER: 0 child on link 0 APIC: 00
1533 20:52:25.827709 APIC: 00
1534 20:52:25.831180 APIC: 01
1535 20:52:25.831253 APIC: 03
1536 20:52:25.831321 APIC: 04
1537 20:52:25.834198 APIC: 07
1538 20:52:25.834280 APIC: 06
1539 20:52:25.834350 APIC: 02
1540 20:52:25.837774 APIC: 05
1541 20:52:25.841019 Done allocating resources.
1542 20:52:25.844135 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1543 20:52:25.847841
1544 20:52:25.850815 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1545 20:52:25.854396 Configure GPIOs for I2S audio on UP4.
1546 20:52:25.862230 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1547 20:52:25.865269 Enabling resources...
1548 20:52:25.868948 PCI: 00:00.0 subsystem <- 8086/9a12
1549 20:52:25.871951 PCI: 00:00.0 cmd <- 06
1550 20:52:25.875613 PCI: 00:02.0 subsystem <- 8086/9a40
1551 20:52:25.878592 PCI: 00:02.0 cmd <- 03
1552 20:52:25.882310 PCI: 00:04.0 subsystem <- 8086/9a03
1553 20:52:25.882407 PCI: 00:04.0 cmd <- 02
1554 20:52:25.885438
1555 20:52:25.888681 PCI: 00:05.0 subsystem <- 8086/9a19
1556 20:52:25.888779 PCI: 00:05.0 cmd <- 02
1557 20:52:25.895671 PCI: 00:08.0 subsystem <- 8086/9a11
1558 20:52:25.895789 PCI: 00:08.0 cmd <- 06
1559 20:52:25.898727 PCI: 00:0d.0 subsystem <- 8086/9a13
1560 20:52:25.901663 PCI: 00:0d.0 cmd <- 02
1561 20:52:25.905406 PCI: 00:14.0 subsystem <- 8086/a0ed
1562 20:52:25.908534 PCI: 00:14.0 cmd <- 02
1563 20:52:25.911984 PCI: 00:14.2 subsystem <- 8086/a0ef
1564 20:52:25.915509 PCI: 00:14.2 cmd <- 02
1565 20:52:25.918671 PCI: 00:14.3 subsystem <- 8086/a0f0
1566 20:52:25.921659 PCI: 00:14.3 cmd <- 02
1567 20:52:25.925386 PCI: 00:15.0 subsystem <- 8086/a0e8
1568 20:52:25.928550 PCI: 00:15.0 cmd <- 02
1569 20:52:25.932205 PCI: 00:15.1 subsystem <- 8086/a0e9
1570 20:52:25.935425 PCI: 00:15.1 cmd <- 02
1571 20:52:25.938439 PCI: 00:15.2 subsystem <- 8086/a0ea
1572 20:52:25.938882 PCI: 00:15.2 cmd <- 02
1573 20:52:25.945406 PCI: 00:15.3 subsystem <- 8086/a0eb
1574 20:52:25.945940 PCI: 00:15.3 cmd <- 02
1575 20:52:25.948908 PCI: 00:16.0 subsystem <- 8086/a0e0
1576 20:52:25.952008 PCI: 00:16.0 cmd <- 02
1577 20:52:25.955050 PCI: 00:19.1 subsystem <- 8086/a0c6
1578 20:52:25.958735 PCI: 00:19.1 cmd <- 02
1579 20:52:25.961726 PCI: 00:1d.0 bridge ctrl <- 0013
1580 20:52:25.965325 PCI: 00:1d.0 subsystem <- 8086/a0b0
1581 20:52:25.968309 PCI: 00:1d.0 cmd <- 06
1582 20:52:25.972141 PCI: 00:1e.0 subsystem <- 8086/a0a8
1583 20:52:25.975218 PCI: 00:1e.0 cmd <- 06
1584 20:52:25.978204 PCI: 00:1e.2 subsystem <- 8086/a0aa
1585 20:52:25.981834 PCI: 00:1e.2 cmd <- 06
1586 20:52:25.984965 PCI: 00:1e.3 subsystem <- 8086/a0ab
1587 20:52:25.988459 PCI: 00:1e.3 cmd <- 02
1588 20:52:25.991659 PCI: 00:1f.0 subsystem <- 8086/a087
1589 20:52:25.992165 PCI: 00:1f.0 cmd <- 407
1590 20:52:25.998502 PCI: 00:1f.3 subsystem <- 8086/a0c8
1591 20:52:25.999073 PCI: 00:1f.3 cmd <- 02
1592 20:52:26.002020 PCI: 00:1f.5 subsystem <- 8086/a0a4
1593 20:52:26.005009 PCI: 00:1f.5 cmd <- 406
1594 20:52:26.009883 PCI: 01:00.0 cmd <- 02
1595 20:52:26.014637 done.
1596 20:52:26.018138 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1597 20:52:26.021055 Initializing devices...
1598 20:52:26.024745 Root Device init
1599 20:52:26.027723 Chrome EC: Set SMI mask to 0x0000000000000000
1600 20:52:26.034453 Chrome EC: clear events_b mask to 0x0000000000000000
1601 20:52:26.041172 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1602 20:52:26.047980 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1603 20:52:26.054115 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1604 20:52:26.057898 Chrome EC: Set WAKE mask to 0x0000000000000000
1605 20:52:26.065306 fw_config match found: DB_USB=USB3_ACTIVE
1606 20:52:26.068836 Configure Right Type-C port orientation for retimer
1607 20:52:26.072022 Root Device init finished in 45 msecs
1608 20:52:26.076322 PCI: 00:00.0 init
1609 20:52:26.079292 CPU TDP = 9 Watts
1610 20:52:26.079823 CPU PL1 = 9 Watts
1611 20:52:26.082378 CPU PL2 = 40 Watts
1612 20:52:26.086013 CPU PL4 = 83 Watts
1613 20:52:26.089034 PCI: 00:00.0 init finished in 8 msecs
1614 20:52:26.089502 PCI: 00:02.0 init
1615 20:52:26.092799 GMA: Found VBT in CBFS
1616 20:52:26.095754 GMA: Found valid VBT in CBFS
1617 20:52:26.102554 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1618 20:52:26.108702 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1619 20:52:26.112444 PCI: 00:02.0 init finished in 18 msecs
1620 20:52:26.115432 PCI: 00:05.0 init
1621 20:52:26.118825 PCI: 00:05.0 init finished in 0 msecs
1622 20:52:26.121831 PCI: 00:08.0 init
1623 20:52:26.125828 PCI: 00:08.0 init finished in 0 msecs
1624 20:52:26.129015 PCI: 00:14.0 init
1625 20:52:26.132667 PCI: 00:14.0 init finished in 0 msecs
1626 20:52:26.135614 PCI: 00:14.2 init
1627 20:52:26.138844 PCI: 00:14.2 init finished in 0 msecs
1628 20:52:26.142553 PCI: 00:15.0 init
1629 20:52:26.143127 I2C bus 0 version 0x3230302a
1630 20:52:26.149095 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1631 20:52:26.152111 PCI: 00:15.0 init finished in 6 msecs
1632 20:52:26.152597 PCI: 00:15.1 init
1633 20:52:26.155798 I2C bus 1 version 0x3230302a
1634 20:52:26.158855 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1635 20:52:26.165510 PCI: 00:15.1 init finished in 6 msecs
1636 20:52:26.165942 PCI: 00:15.2 init
1637 20:52:26.169086 I2C bus 2 version 0x3230302a
1638 20:52:26.172293 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1639 20:52:26.175807 PCI: 00:15.2 init finished in 6 msecs
1640 20:52:26.178904 PCI: 00:15.3 init
1641 20:52:26.181974 I2C bus 3 version 0x3230302a
1642 20:52:26.185071 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1643 20:52:26.188598 PCI: 00:15.3 init finished in 6 msecs
1644 20:52:26.191824 PCI: 00:16.0 init
1645 20:52:26.195475 PCI: 00:16.0 init finished in 0 msecs
1646 20:52:26.198439 PCI: 00:19.1 init
1647 20:52:26.201666 I2C bus 5 version 0x3230302a
1648 20:52:26.205259 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1649 20:52:26.208108 PCI: 00:19.1 init finished in 6 msecs
1650 20:52:26.211710 PCI: 00:1d.0 init
1651 20:52:26.212199 Initializing PCH PCIe bridge.
1652 20:52:26.218484 PCI: 00:1d.0 init finished in 3 msecs
1653 20:52:26.222016 PCI: 00:1f.0 init
1654 20:52:26.224978 IOAPIC: Initializing IOAPIC at 0xfec00000
1655 20:52:26.228030 IOAPIC: Bootstrap Processor Local APIC = 0x00
1656 20:52:26.231695 IOAPIC: ID = 0x02
1657 20:52:26.235310 IOAPIC: Dumping registers
1658 20:52:26.235783 reg 0x0000: 0x02000000
1659 20:52:26.238144 reg 0x0001: 0x00770020
1660 20:52:26.241451 reg 0x0002: 0x00000000
1661 20:52:26.245012 PCI: 00:1f.0 init finished in 21 msecs
1662 20:52:26.248112 PCI: 00:1f.2 init
1663 20:52:26.251803 Disabling ACPI via APMC.
1664 20:52:26.252250 APMC done.
1665 20:52:26.254982 PCI: 00:1f.2 init finished in 5 msecs
1666 20:52:26.268491 PCI: 01:00.0 init
1667 20:52:26.271527 PCI: 01:00.0 init finished in 0 msecs
1668 20:52:26.275371 PNP: 0c09.0 init
1669 20:52:26.278397 Google Chrome EC uptime: 8.411 seconds
1670 20:52:26.285333 Google Chrome AP resets since EC boot: 1
1671 20:52:26.288172 Google Chrome most recent AP reset causes:
1672 20:52:26.291884 0.348: 32775 shutdown: entering G3
1673 20:52:26.298199 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1674 20:52:26.301327 PNP: 0c09.0 init finished in 22 msecs
1675 20:52:26.307543 Devices initialized
1676 20:52:26.310569 Show all devs... After init.
1677 20:52:26.314151 Root Device: enabled 1
1678 20:52:26.314588 DOMAIN: 0000: enabled 1
1679 20:52:26.317286 CPU_CLUSTER: 0: enabled 1
1680 20:52:26.320791 PCI: 00:00.0: enabled 1
1681 20:52:26.323874 PCI: 00:02.0: enabled 1
1682 20:52:26.324314 PCI: 00:04.0: enabled 1
1683 20:52:26.327513 PCI: 00:05.0: enabled 1
1684 20:52:26.330672 PCI: 00:06.0: enabled 0
1685 20:52:26.333853 PCI: 00:07.0: enabled 0
1686 20:52:26.334445 PCI: 00:07.1: enabled 0
1687 20:52:26.337269 PCI: 00:07.2: enabled 0
1688 20:52:26.340423 PCI: 00:07.3: enabled 0
1689 20:52:26.344088 PCI: 00:08.0: enabled 1
1690 20:52:26.344752 PCI: 00:09.0: enabled 0
1691 20:52:26.347075 PCI: 00:0a.0: enabled 0
1692 20:52:26.350826 PCI: 00:0d.0: enabled 1
1693 20:52:26.351415 PCI: 00:0d.1: enabled 0
1694 20:52:26.353764
1695 20:52:26.354246 PCI: 00:0d.2: enabled 0
1696 20:52:26.356875 PCI: 00:0d.3: enabled 0
1697 20:52:26.360566 PCI: 00:0e.0: enabled 0
1698 20:52:26.361058 PCI: 00:10.2: enabled 1
1699 20:52:26.363687 PCI: 00:10.6: enabled 0
1700 20:52:26.367301 PCI: 00:10.7: enabled 0
1701 20:52:26.370810 PCI: 00:12.0: enabled 0
1702 20:52:26.371267 PCI: 00:12.6: enabled 0
1703 20:52:26.373906 PCI: 00:13.0: enabled 0
1704 20:52:26.377358 PCI: 00:14.0: enabled 1
1705 20:52:26.380613 PCI: 00:14.1: enabled 0
1706 20:52:26.381061 PCI: 00:14.2: enabled 1
1707 20:52:26.383580 PCI: 00:14.3: enabled 1
1708 20:52:26.387235 PCI: 00:15.0: enabled 1
1709 20:52:26.390388 PCI: 00:15.1: enabled 1
1710 20:52:26.390850 PCI: 00:15.2: enabled 1
1711 20:52:26.393953 PCI: 00:15.3: enabled 1
1712 20:52:26.397068 PCI: 00:16.0: enabled 1
1713 20:52:26.397546 PCI: 00:16.1: enabled 0
1714 20:52:26.400177 PCI: 00:16.2: enabled 0
1715 20:52:26.403861 PCI: 00:16.3: enabled 0
1716 20:52:26.406926 PCI: 00:16.4: enabled 0
1717 20:52:26.407371 PCI: 00:16.5: enabled 0
1718 20:52:26.410123 PCI: 00:17.0: enabled 0
1719 20:52:26.413645 PCI: 00:19.0: enabled 0
1720 20:52:26.416745 PCI: 00:19.1: enabled 1
1721 20:52:26.417184 PCI: 00:19.2: enabled 0
1722 20:52:26.420527 PCI: 00:1c.0: enabled 1
1723 20:52:26.423342 PCI: 00:1c.1: enabled 0
1724 20:52:26.426878 PCI: 00:1c.2: enabled 0
1725 20:52:26.427362 PCI: 00:1c.3: enabled 0
1726 20:52:26.430030 PCI: 00:1c.4: enabled 0
1727 20:52:26.433877 PCI: 00:1c.5: enabled 0
1728 20:52:26.434331 PCI: 00:1c.6: enabled 1
1729 20:52:26.436805
1730 20:52:26.437240 PCI: 00:1c.7: enabled 0
1731 20:52:26.439873 PCI: 00:1d.0: enabled 1
1732 20:52:26.443544 PCI: 00:1d.1: enabled 0
1733 20:52:26.444062 PCI: 00:1d.2: enabled 1
1734 20:52:26.446518 PCI: 00:1d.3: enabled 0
1735 20:52:26.450216 PCI: 00:1e.0: enabled 1
1736 20:52:26.453441 PCI: 00:1e.1: enabled 0
1737 20:52:26.453966 PCI: 00:1e.2: enabled 1
1738 20:52:26.456988 PCI: 00:1e.3: enabled 1
1739 20:52:26.460061 PCI: 00:1f.0: enabled 1
1740 20:52:26.463331 PCI: 00:1f.1: enabled 0
1741 20:52:26.463785 PCI: 00:1f.2: enabled 1
1742 20:52:26.466880 PCI: 00:1f.3: enabled 1
1743 20:52:26.469814 PCI: 00:1f.4: enabled 0
1744 20:52:26.473450 PCI: 00:1f.5: enabled 1
1745 20:52:26.473889 PCI: 00:1f.6: enabled 0
1746 20:52:26.476330 PCI: 00:1f.7: enabled 0
1747 20:52:26.480046 APIC: 00: enabled 1
1748 20:52:26.480433 GENERIC: 0.0: enabled 1
1749 20:52:26.483233 GENERIC: 0.0: enabled 1
1750 20:52:26.487005 GENERIC: 1.0: enabled 1
1751 20:52:26.489997 GENERIC: 0.0: enabled 1
1752 20:52:26.490444 GENERIC: 1.0: enabled 1
1753 20:52:26.492996 USB0 port 0: enabled 1
1754 20:52:26.496816 GENERIC: 0.0: enabled 1
1755 20:52:26.497253 USB0 port 0: enabled 1
1756 20:52:26.499797 GENERIC: 0.0: enabled 1
1757 20:52:26.503497 I2C: 00:1a: enabled 1
1758 20:52:26.506490 I2C: 00:31: enabled 1
1759 20:52:26.506929 I2C: 00:32: enabled 1
1760 20:52:26.509513 I2C: 00:10: enabled 1
1761 20:52:26.513268 I2C: 00:15: enabled 1
1762 20:52:26.513841 GENERIC: 0.0: enabled 0
1763 20:52:26.516279 GENERIC: 1.0: enabled 0
1764 20:52:26.519841 GENERIC: 0.0: enabled 1
1765 20:52:26.520337 SPI: 00: enabled 1
1766 20:52:26.522848 SPI: 00: enabled 1
1767 20:52:26.526374 PNP: 0c09.0: enabled 1
1768 20:52:26.526882 GENERIC: 0.0: enabled 1
1769 20:52:26.529812 USB3 port 0: enabled 1
1770 20:52:26.532836 USB3 port 1: enabled 1
1771 20:52:26.533340 USB3 port 2: enabled 0
1772 20:52:26.536466
1773 20:52:26.536971 USB3 port 3: enabled 0
1774 20:52:26.539674 USB2 port 0: enabled 0
1775 20:52:26.543164 USB2 port 1: enabled 1
1776 20:52:26.543667 USB2 port 2: enabled 1
1777 20:52:26.546149 USB2 port 3: enabled 0
1778 20:52:26.550043 USB2 port 4: enabled 1
1779 20:52:26.550539 USB2 port 5: enabled 0
1780 20:52:26.553024 USB2 port 6: enabled 0
1781 20:52:26.556157 USB2 port 7: enabled 0
1782 20:52:26.559945 USB2 port 8: enabled 0
1783 20:52:26.560388 USB2 port 9: enabled 0
1784 20:52:26.563101 USB3 port 0: enabled 0
1785 20:52:26.566151 USB3 port 1: enabled 1
1786 20:52:26.566608 USB3 port 2: enabled 0
1787 20:52:26.569971 USB3 port 3: enabled 0
1788 20:52:26.572913 GENERIC: 0.0: enabled 1
1789 20:52:26.576503 GENERIC: 1.0: enabled 1
1790 20:52:26.576990 APIC: 01: enabled 1
1791 20:52:26.579597 APIC: 03: enabled 1
1792 20:52:26.579973 APIC: 04: enabled 1
1793 20:52:26.583253 APIC: 07: enabled 1
1794 20:52:26.586381 APIC: 06: enabled 1
1795 20:52:26.586841 APIC: 02: enabled 1
1796 20:52:26.589445 APIC: 05: enabled 1
1797 20:52:26.593064 PCI: 01:00.0: enabled 1
1798 20:52:26.596035 BS: BS_DEV_INIT run times (exec / console): 32 / 540 ms
1799 20:52:26.602673 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1800 20:52:26.606302 ELOG: NV offset 0xf30000 size 0x1000
1801 20:52:26.612586 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1802 20:52:26.619334 ELOG: Event(17) added with size 13 at 2023-01-18 20:52:26 UTC
1803 20:52:26.625968 ELOG: Event(92) added with size 9 at 2023-01-18 20:52:26 UTC
1804 20:52:26.632467 ELOG: Event(93) added with size 9 at 2023-01-18 20:52:26 UTC
1805 20:52:26.639403 ELOG: Event(9E) added with size 10 at 2023-01-18 20:52:26 UTC
1806 20:52:26.646143 ELOG: Event(9F) added with size 14 at 2023-01-18 20:52:26 UTC
1807 20:52:26.652203 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1808 20:52:26.655795 ELOG: Event(A1) added with size 10 at 2023-01-18 20:52:26 UTC
1809 20:52:26.662563 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1810 20:52:26.668842 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1811 20:52:26.672503 Finalize devices...
1812 20:52:26.673028 Devices finalized
1813 20:52:26.679053 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1814 20:52:26.682550 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1815 20:52:26.688492 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1816 20:52:26.695194 ME: HFSTS1 : 0x80030055
1817 20:52:26.698862 ME: HFSTS2 : 0x30280116
1818 20:52:26.701760 ME: HFSTS3 : 0x00000050
1819 20:52:26.708369 ME: HFSTS4 : 0x00004000
1820 20:52:26.712067 ME: HFSTS5 : 0x00000000
1821 20:52:26.714984 ME: HFSTS6 : 0x00400006
1822 20:52:26.718615 ME: Manufacturing Mode : YES
1823 20:52:26.721672
1824 20:52:26.725202 ME: SPI Protection Mode Enabled : NO
1825 20:52:26.728368 ME: FW Partition Table : OK
1826 20:52:26.731853 ME: Bringup Loader Failure : NO
1827 20:52:26.734782 ME: Firmware Init Complete : NO
1828 20:52:26.738520 ME: Boot Options Present : NO
1829 20:52:26.741553 ME: Update In Progress : NO
1830 20:52:26.745300 ME: D0i3 Support : YES
1831 20:52:26.748249 ME: Low Power State Enabled : NO
1832 20:52:26.754966 ME: CPU Replaced : YES
1833 20:52:26.758066 ME: CPU Replacement Valid : YES
1834 20:52:26.761759 ME: Current Working State : 5
1835 20:52:26.764730 ME: Current Operation State : 1
1836 20:52:26.768361 ME: Current Operation Mode : 3
1837 20:52:26.771378 ME: Error Code : 0
1838 20:52:26.775100 ME: Enhanced Debug Mode : NO
1839 20:52:26.777985 ME: CPU Debug Disabled : YES
1840 20:52:26.781548 ME: TXT Support : NO
1841 20:52:26.784605
1842 20:52:26.788541 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1843 20:52:26.798510 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1844 20:52:26.801482 CBFS: 'fallback/slic' not found.
1845 20:52:26.805112 ACPI: Writing ACPI tables at 76b01000.
1846 20:52:26.805583 ACPI: * FACS
1847 20:52:26.808339 ACPI: * DSDT
1848 20:52:26.811980 Ramoops buffer: 0x100000@0x76a00000.
1849 20:52:26.814978 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1850 20:52:26.821738 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1851 20:52:26.824754 Google Chrome EC: version:
1852 20:52:26.828386 ro: voema_v2.0.7540-147f8d37d1
1853 20:52:26.831430 rw: voema_v2.0.7540-147f8d37d1
1854 20:52:26.831866 running image: 2
1855 20:52:26.838087 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1856 20:52:26.843680 ACPI: * FADT
1857 20:52:26.844190 SCI is IRQ9
1858 20:52:26.846585 ACPI: added table 1/32, length now 40
1859 20:52:26.849569
1860 20:52:26.850009 ACPI: * SSDT
1861 20:52:26.853292 Found 1 CPU(s) with 8 core(s) each.
1862 20:52:26.860057 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1863 20:52:26.863084 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1864 20:52:26.866297 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1865 20:52:26.869967 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1866 20:52:26.876741 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1867 20:52:26.883406 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1868 20:52:26.886360 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1869 20:52:26.893064 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1870 20:52:26.899764 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1871 20:52:26.902846 \_SB.PCI0.RP09: Added StorageD3Enable property
1872 20:52:26.906222 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1873 20:52:26.912855 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1874 20:52:26.919549 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1875 20:52:26.922641 PS2K: Passing 80 keymaps to kernel
1876 20:52:26.929308 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1877 20:52:26.935841 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1878 20:52:26.942569 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1879 20:52:26.949326 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1880 20:52:26.955729 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1881 20:52:26.962447 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1882 20:52:26.966243 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1883 20:52:26.969373
1884 20:52:26.972365 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1885 20:52:26.979197 ACPI: added table 2/32, length now 44
1886 20:52:26.979648 ACPI: * MCFG
1887 20:52:26.983006 ACPI: added table 3/32, length now 48
1888 20:52:26.985875 ACPI: * TPM2
1889 20:52:26.989400 TPM2 log created at 0x769f0000
1890 20:52:26.992256 ACPI: added table 4/32, length now 52
1891 20:52:26.992707 ACPI: * MADT
1892 20:52:26.995952 SCI is IRQ9
1893 20:52:26.999060 ACPI: added table 5/32, length now 56
1894 20:52:26.999554 current = 76b09850
1895 20:52:27.002393 ACPI: * DMAR
1896 20:52:27.005444 ACPI: added table 6/32, length now 60
1897 20:52:27.008992 ACPI: added table 7/32, length now 64
1898 20:52:27.012089 ACPI: * HPET
1899 20:52:27.015103 ACPI: added table 8/32, length now 68
1900 20:52:27.015209 ACPI: done.
1901 20:52:27.018828 ACPI tables: 35216 bytes.
1902 20:52:27.021924 smbios_write_tables: 769ef000
1903 20:52:27.025358 EC returned error result code 3
1904 20:52:27.028354 Couldn't obtain OEM name from CBI
1905 20:52:27.031900 Create SMBIOS type 16
1906 20:52:27.035528 Create SMBIOS type 17
1907 20:52:27.035604 GENERIC: 0.0 (WIFI Device)
1908 20:52:27.038465 SMBIOS tables: 1750 bytes.
1909 20:52:27.045182 Writing table forward entry at 0x00000500
1910 20:52:27.048305 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1911 20:52:27.054996 Writing coreboot table at 0x76b25000
1912 20:52:27.058632 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1913 20:52:27.065384 1. 0000000000001000-000000000009ffff: RAM
1914 20:52:27.068484 2. 00000000000a0000-00000000000fffff: RESERVED
1915 20:52:27.071608 3. 0000000000100000-00000000769eefff: RAM
1916 20:52:27.078270 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1917 20:52:27.085028 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1918 20:52:27.088571 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1919 20:52:27.095194 7. 0000000077000000-000000007fbfffff: RESERVED
1920 20:52:27.098232 8. 00000000c0000000-00000000cfffffff: RESERVED
1921 20:52:27.104928 9. 00000000f8000000-00000000f9ffffff: RESERVED
1922 20:52:27.108043 10. 00000000fb000000-00000000fb000fff: RESERVED
1923 20:52:27.114820 11. 00000000fe000000-00000000fe00ffff: RESERVED
1924 20:52:27.118568 12. 00000000fed80000-00000000fed87fff: RESERVED
1925 20:52:27.121697 13. 00000000fed90000-00000000fed92fff: RESERVED
1926 20:52:27.128314 14. 00000000feda0000-00000000feda1fff: RESERVED
1927 20:52:27.131373 15. 00000000fedc0000-00000000feddffff: RESERVED
1928 20:52:27.137960 16. 0000000100000000-00000002803fffff: RAM
1929 20:52:27.138055 Passing 4 GPIOs to payload:
1930 20:52:27.141389
1931 20:52:27.145131 NAME | PORT | POLARITY | VALUE
1932 20:52:27.151182 lid | undefined | high | high
1933 20:52:27.154875 power | undefined | high | low
1934 20:52:27.161548 oprom | undefined | high | low
1935 20:52:27.164629 EC in RW | 0x000000e5 | high | high
1936 20:52:27.171388 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum a5e7
1937 20:52:27.174675 coreboot table: 1576 bytes.
1938 20:52:27.178196 IMD ROOT 0. 0x76fff000 0x00001000
1939 20:52:27.181136 IMD SMALL 1. 0x76ffe000 0x00001000
1940 20:52:27.187838 FSP MEMORY 2. 0x76c4e000 0x003b0000
1941 20:52:27.191502 VPD 3. 0x76c4d000 0x00000367
1942 20:52:27.194468 RO MCACHE 4. 0x76c4c000 0x00000fdc
1943 20:52:27.198137 CONSOLE 5. 0x76c2c000 0x00020000
1944 20:52:27.201283 FMAP 6. 0x76c2b000 0x00000578
1945 20:52:27.204430 TIME STAMP 7. 0x76c2a000 0x00000910
1946 20:52:27.208037 VBOOT WORK 8. 0x76c16000 0x00014000
1947 20:52:27.211106 ROMSTG STCK 9. 0x76c15000 0x00001000
1948 20:52:27.214730 AFTER CAR 10. 0x76c0a000 0x0000b000
1949 20:52:27.218457
1950 20:52:27.221427 RAMSTAGE 11. 0x76b97000 0x00073000
1951 20:52:27.225127 REFCODE 12. 0x76b42000 0x00055000
1952 20:52:27.228097 SMM BACKUP 13. 0x76b32000 0x00010000
1953 20:52:27.231779 4f444749 14. 0x76b30000 0x00002000
1954 20:52:27.234780 EXT VBT15. 0x76b2d000 0x0000219f
1955 20:52:27.238040 COREBOOT 16. 0x76b25000 0x00008000
1956 20:52:27.241688 ACPI 17. 0x76b01000 0x00024000
1957 20:52:27.244528 ACPI GNVS 18. 0x76b00000 0x00001000
1958 20:52:27.248233 RAMOOPS 19. 0x76a00000 0x00100000
1959 20:52:27.251336
1960 20:52:27.255131 TPM2 TCGLOG20. 0x769f0000 0x00010000
1961 20:52:27.258045 SMBIOS 21. 0x769ef000 0x00000800
1962 20:52:27.258226 IMD small region:
1963 20:52:27.261695 IMD ROOT 0. 0x76ffec00 0x00000400
1964 20:52:27.268030 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1965 20:52:27.271173 POWER STATE 2. 0x76ffeb80 0x00000044
1966 20:52:27.274968 ROMSTAGE 3. 0x76ffeb60 0x00000004
1967 20:52:27.277917 MEM INFO 4. 0x76ffe980 0x000001e0
1968 20:52:27.284917 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1969 20:52:27.287847 MTRR: Physical address space:
1970 20:52:27.294683 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1971 20:52:27.301332 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1972 20:52:27.308140 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1973 20:52:27.311106 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1974 20:52:27.317745 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1975 20:52:27.324613 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1976 20:52:27.331158 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1977 20:52:27.334722 MTRR: Fixed MSR 0x250 0x0606060606060606
1978 20:52:27.341470 MTRR: Fixed MSR 0x258 0x0606060606060606
1979 20:52:27.344401 MTRR: Fixed MSR 0x259 0x0000000000000000
1980 20:52:27.347974 MTRR: Fixed MSR 0x268 0x0606060606060606
1981 20:52:27.351048 MTRR: Fixed MSR 0x269 0x0606060606060606
1982 20:52:27.354207 MTRR: Fixed MSR 0x26a 0x0606060606060606
1983 20:52:27.357819
1984 20:52:27.360758 MTRR: Fixed MSR 0x26b 0x0606060606060606
1985 20:52:27.364211 MTRR: Fixed MSR 0x26c 0x0606060606060606
1986 20:52:27.367984 MTRR: Fixed MSR 0x26d 0x0606060606060606
1987 20:52:27.371010 MTRR: Fixed MSR 0x26e 0x0606060606060606
1988 20:52:27.377554 MTRR: Fixed MSR 0x26f 0x0606060606060606
1989 20:52:27.380865 call enable_fixed_mtrr()
1990 20:52:27.384394 CPU physical address size: 39 bits
1991 20:52:27.387305 MTRR: default type WB/UC MTRR counts: 6/6.
1992 20:52:27.390868 MTRR: UC selected as default type.
1993 20:52:27.397689 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1994 20:52:27.404222 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1995 20:52:27.410997 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1996 20:52:27.417527 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1997 20:52:27.424108 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1998 20:52:27.430446 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
1999 20:52:27.434165 MTRR: Fixed MSR 0x250 0x0606060606060606
2000 20:52:27.437055 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 20:52:27.443800 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 20:52:27.447569 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 20:52:27.450454 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 20:52:27.453630 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 20:52:27.460271 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 20:52:27.463756 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 20:52:27.467040 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 20:52:27.470710 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 20:52:27.477001 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 20:52:27.477519
2011 20:52:27.477889 MTRR check
2012 20:52:27.480681 call enable_fixed_mtrr()
2013 20:52:27.483683 Fixed MTRRs : Enabled
2014 20:52:27.487276 Variable MTRRs: Enabled
2015 20:52:27.487822
2016 20:52:27.490345 CPU physical address size: 39 bits
2017 20:52:27.496940 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
2018 20:52:27.500070 MTRR: Fixed MSR 0x250 0x0606060606060606
2019 20:52:27.503816 MTRR: Fixed MSR 0x250 0x0606060606060606
2020 20:52:27.506700 MTRR: Fixed MSR 0x258 0x0606060606060606
2021 20:52:27.510666
2022 20:52:27.513582 MTRR: Fixed MSR 0x259 0x0000000000000000
2023 20:52:27.516765 MTRR: Fixed MSR 0x268 0x0606060606060606
2024 20:52:27.520377 MTRR: Fixed MSR 0x269 0x0606060606060606
2025 20:52:27.523465 MTRR: Fixed MSR 0x26a 0x0606060606060606
2026 20:52:27.530374 MTRR: Fixed MSR 0x26b 0x0606060606060606
2027 20:52:27.533508 MTRR: Fixed MSR 0x26c 0x0606060606060606
2028 20:52:27.537097 MTRR: Fixed MSR 0x26d 0x0606060606060606
2029 20:52:27.540191 MTRR: Fixed MSR 0x26e 0x0606060606060606
2030 20:52:27.547105 MTRR: Fixed MSR 0x26f 0x0606060606060606
2031 20:52:27.550017 MTRR: Fixed MSR 0x258 0x0606060606060606
2032 20:52:27.553586 call enable_fixed_mtrr()
2033 20:52:27.556645 MTRR: Fixed MSR 0x259 0x0000000000000000
2034 20:52:27.560379 MTRR: Fixed MSR 0x268 0x0606060606060606
2035 20:52:27.566492 MTRR: Fixed MSR 0x269 0x0606060606060606
2036 20:52:27.569710 MTRR: Fixed MSR 0x26a 0x0606060606060606
2037 20:52:27.572938 MTRR: Fixed MSR 0x26b 0x0606060606060606
2038 20:52:27.576554 MTRR: Fixed MSR 0x26c 0x0606060606060606
2039 20:52:27.582711 MTRR: Fixed MSR 0x26d 0x0606060606060606
2040 20:52:27.586854 MTRR: Fixed MSR 0x26e 0x0606060606060606
2041 20:52:27.589644 MTRR: Fixed MSR 0x26f 0x0606060606060606
2042 20:52:27.592901 CPU physical address size: 39 bits
2043 20:52:27.599476 call enable_fixed_mtrr()
2044 20:52:27.603187 MTRR: Fixed MSR 0x250 0x0606060606060606
2045 20:52:27.606142 MTRR: Fixed MSR 0x250 0x0606060606060606
2046 20:52:27.609741 MTRR: Fixed MSR 0x258 0x0606060606060606
2047 20:52:27.612952 MTRR: Fixed MSR 0x259 0x0000000000000000
2048 20:52:27.619772 MTRR: Fixed MSR 0x268 0x0606060606060606
2049 20:52:27.622779 MTRR: Fixed MSR 0x269 0x0606060606060606
2050 20:52:27.626406 MTRR: Fixed MSR 0x26a 0x0606060606060606
2051 20:52:27.629358 MTRR: Fixed MSR 0x26b 0x0606060606060606
2052 20:52:27.636200 MTRR: Fixed MSR 0x26c 0x0606060606060606
2053 20:52:27.639658 MTRR: Fixed MSR 0x26d 0x0606060606060606
2054 20:52:27.642702 MTRR: Fixed MSR 0x26e 0x0606060606060606
2055 20:52:27.645916 MTRR: Fixed MSR 0x26f 0x0606060606060606
2056 20:52:27.653715 MTRR: Fixed MSR 0x258 0x0606060606060606
2057 20:52:27.656811 MTRR: Fixed MSR 0x259 0x0000000000000000
2058 20:52:27.660523 MTRR: Fixed MSR 0x268 0x0606060606060606
2059 20:52:27.663625 MTRR: Fixed MSR 0x269 0x0606060606060606
2060 20:52:27.670293 MTRR: Fixed MSR 0x26a 0x0606060606060606
2061 20:52:27.673519 MTRR: Fixed MSR 0x26b 0x0606060606060606
2062 20:52:27.677189 MTRR: Fixed MSR 0x26c 0x0606060606060606
2063 20:52:27.680421 MTRR: Fixed MSR 0x26d 0x0606060606060606
2064 20:52:27.683599 MTRR: Fixed MSR 0x26e 0x0606060606060606
2065 20:52:27.687253
2066 20:52:27.690126 MTRR: Fixed MSR 0x26f 0x0606060606060606
2067 20:52:27.693819 call enable_fixed_mtrr()
2068 20:52:27.696895 call enable_fixed_mtrr()
2069 20:52:27.700300 CPU physical address size: 39 bits
2070 20:52:27.703041 MTRR: Fixed MSR 0x250 0x0606060606060606
2071 20:52:27.706669 MTRR: Fixed MSR 0x250 0x0606060606060606
2072 20:52:27.709699 MTRR: Fixed MSR 0x258 0x0606060606060606
2073 20:52:27.716559 MTRR: Fixed MSR 0x259 0x0000000000000000
2074 20:52:27.719615 MTRR: Fixed MSR 0x268 0x0606060606060606
2075 20:52:27.723313 MTRR: Fixed MSR 0x269 0x0606060606060606
2076 20:52:27.726710 MTRR: Fixed MSR 0x26a 0x0606060606060606
2077 20:52:27.733374 MTRR: Fixed MSR 0x26b 0x0606060606060606
2078 20:52:27.736577 MTRR: Fixed MSR 0x26c 0x0606060606060606
2079 20:52:27.739601 MTRR: Fixed MSR 0x26d 0x0606060606060606
2080 20:52:27.743176 MTRR: Fixed MSR 0x26e 0x0606060606060606
2081 20:52:27.746383 MTRR: Fixed MSR 0x26f 0x0606060606060606
2082 20:52:27.752957 MTRR: Fixed MSR 0x258 0x0606060606060606
2083 20:52:27.756265 call enable_fixed_mtrr()
2084 20:52:27.759358 MTRR: Fixed MSR 0x259 0x0000000000000000
2085 20:52:27.763184 MTRR: Fixed MSR 0x268 0x0606060606060606
2086 20:52:27.769897 MTRR: Fixed MSR 0x269 0x0606060606060606
2087 20:52:27.772853 MTRR: Fixed MSR 0x26a 0x0606060606060606
2088 20:52:27.776266 MTRR: Fixed MSR 0x26b 0x0606060606060606
2089 20:52:27.779744 MTRR: Fixed MSR 0x26c 0x0606060606060606
2090 20:52:27.782874 MTRR: Fixed MSR 0x26d 0x0606060606060606
2091 20:52:27.789651 MTRR: Fixed MSR 0x26e 0x0606060606060606
2092 20:52:27.792735 MTRR: Fixed MSR 0x26f 0x0606060606060606
2093 20:52:27.796480 CPU physical address size: 39 bits
2094 20:52:27.800492 call enable_fixed_mtrr()
2095 20:52:27.804763 Checking cr50 for pending updates
2096 20:52:27.808412 CPU physical address size: 39 bits
2097 20:52:27.811309 CPU physical address size: 39 bits
2098 20:52:27.815099 Reading cr50 TPM mode
2099 20:52:27.818189 CPU physical address size: 39 bits
2100 20:52:27.824795 BS: BS_PAYLOAD_LOAD entry times (exec / console): 317 / 6 ms
2101 20:52:27.835135 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2102 20:52:27.838238 Checking segment from ROM address 0xffc02b38
2103 20:52:27.841254 Checking segment from ROM address 0xffc02b54
2104 20:52:27.848062 Loading segment from ROM address 0xffc02b38
2105 20:52:27.848641 code (compression=0)
2106 20:52:27.858183 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2107 20:52:27.864835 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2108 20:52:27.867892 it's not compressed!
2109 20:52:28.007367 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2110 20:52:28.013908 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2111 20:52:28.020748 Loading segment from ROM address 0xffc02b54
2112 20:52:28.021189 Entry Point 0x30000000
2113 20:52:28.023974 Loaded segments
2114 20:52:28.030501 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2115 20:52:28.074222 Finalizing chipset.
2116 20:52:28.077571 Finalizing SMM.
2117 20:52:28.078012 APMC done.
2118 20:52:28.084145 BS: BS_PAYLOAD_LOAD exit times (exec / console): 43 / 5 ms
2119 20:52:28.087238 mp_park_aps done after 0 msecs.
2120 20:52:28.090901 Jumping to boot code at 0x30000000(0x76b25000)
2121 20:52:28.101074 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2122 20:52:28.101670
2123 20:52:28.102024
2124 20:52:28.102344
2125 20:52:28.104138 Starting depthcharge on Voema...
2126 20:52:28.104571
2127 20:52:28.105734 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2128 20:52:28.106257 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2129 20:52:28.106667 Setting prompt string to ['volteer:']
2130 20:52:28.107058 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2131 20:52:28.114148 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2132 20:52:28.114649
2133 20:52:28.120913 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2134 20:52:28.121354
2135 20:52:28.126885 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2136 20:52:28.127323
2137 20:52:28.130517 Failed to find eMMC card reader
2138 20:52:28.130958
2139 20:52:28.131307 Wipe memory regions:
2140 20:52:28.131632
2141 20:52:28.137283 [0x00000000001000, 0x000000000a0000)
2142 20:52:28.137752
2143 20:52:28.140390 [0x00000000100000, 0x00000030000000)
2144 20:52:28.140828
2145 20:52:28.168828 [0x00000032662db0, 0x000000769ef000)
2146 20:52:28.169277
2147 20:52:28.207839 [0x00000100000000, 0x00000280400000)
2148 20:52:28.208365
2149 20:52:28.415989 ec_init: CrosEC protocol v3 supported (256, 256)
2150 20:52:28.416496
2151 20:52:28.422716 update_port_state: port C0 state: usb enable 1 mux conn 0
2152 20:52:28.423159
2153 20:52:28.432207 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2154 20:52:28.432652
2155 20:52:28.439027 pmc_check_ipc_sts: STS_BUSY done after 1561 us
2156 20:52:28.439490
2157 20:52:28.441990 send_conn_disc_msg: pmc_send_cmd succeeded
2158 20:52:28.442471
2159 20:52:28.872775 R8152: Initializing
2160 20:52:28.872925
2161 20:52:28.876328 Version 6 (ocp_data = 5c30)
2162 20:52:28.876409
2163 20:52:28.879338 R8152: Done initializing
2164 20:52:28.879427
2165 20:52:28.882767 Adding net device
2166 20:52:28.882854
2167 20:52:29.188391 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2168 20:52:29.188538
2169 20:52:29.188610
2170 20:52:29.188675
2171 20:52:29.191641 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 20:52:29.292349 volteer: tftpboot 192.168.201.1 8785132/tftp-deploy-us7zcp2x/kernel/bzImage 8785132/tftp-deploy-us7zcp2x/kernel/cmdline 8785132/tftp-deploy-us7zcp2x/ramdisk/ramdisk.cpio.gz
2174 20:52:29.292508 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 20:52:29.292614 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2176 20:52:29.296888 tftpboot 192.168.201.1 8785132/tftp-deploy-us7zcp2x/kernel/bzImoy-us7zcp2x/kernel/cmdline 8785132/tftp-deploy-us7zcp2x/ramdisk/ramdisk.cpio.gz
2177 20:52:29.296977
2178 20:52:29.297044 Waiting for link
2179 20:52:29.297106
2180 20:52:29.499776 done.
2181 20:52:29.499913
2182 20:52:29.499993 MAC: 00:24:32:30:7e:47
2183 20:52:29.500057
2184 20:52:29.503393 Sending DHCP discover... done.
2185 20:52:29.503474
2186 20:52:29.506380 Waiting for reply... done.
2187 20:52:29.506457
2188 20:52:29.509540 Sending DHCP request... done.
2189 20:52:29.509620
2190 20:52:29.513222 Waiting for reply... done.
2191 20:52:29.513296
2192 20:52:29.516433 My ip is 192.168.201.19
2193 20:52:29.516507
2194 20:52:29.519956 The DHCP server ip is 192.168.201.1
2195 20:52:29.520030
2196 20:52:29.523070 TFTP server IP predefined by user: 192.168.201.1
2197 20:52:29.523140
2198 20:52:29.529844 Bootfile predefined by user: 8785132/tftp-deploy-us7zcp2x/kernel/bzImage
2199 20:52:29.529915
2200 20:52:29.533001 Sending tftp read request... done.
2201 20:52:29.533069
2202 20:52:29.536014 Waiting for the transfer...
2203 20:52:29.539653
2204 20:52:30.071996 00000000 ################################################################
2205 20:52:30.072148
2206 20:52:30.607786 00080000 ################################################################
2207 20:52:30.607942
2208 20:52:31.134544 00100000 ################################################################
2209 20:52:31.134717
2210 20:52:31.661461 00180000 ################################################################
2211 20:52:31.661609
2212 20:52:32.178150 00200000 ################################################################
2213 20:52:32.178290
2214 20:52:32.705618 00280000 ################################################################
2215 20:52:32.705771
2216 20:52:33.233597 00300000 ################################################################
2217 20:52:33.233747
2218 20:52:33.763818 00380000 ################################################################
2219 20:52:33.763984
2220 20:52:34.298140 00400000 ################################################################
2221 20:52:34.298287
2222 20:52:34.838493 00480000 ################################################################
2223 20:52:34.838645
2224 20:52:35.372730 00500000 ################################################################
2225 20:52:35.372874
2226 20:52:35.919859 00580000 ################################################################
2227 20:52:35.920012
2228 20:52:36.450064 00600000 ################################################################
2229 20:52:36.450214
2230 20:52:36.998998 00680000 ################################################################
2231 20:52:36.999153
2232 20:52:37.534213 00700000 ################################################################
2233 20:52:37.534361
2234 20:52:38.096904 00780000 ################################################################
2235 20:52:38.097068
2236 20:52:38.675506 00800000 ################################################################
2237 20:52:38.675656
2238 20:52:39.216545 00880000 ################################################################
2239 20:52:39.216730
2240 20:52:39.496066 00900000 ################################## done.
2241 20:52:39.496206
2242 20:52:39.499012 The bootfile was 9711616 bytes long.
2243 20:52:39.499093
2244 20:52:39.502738 Sending tftp read request... done.
2245 20:52:39.502817
2246 20:52:39.505707 Waiting for the transfer...
2247 20:52:39.505786
2248 20:52:40.064362 00000000 ################################################################
2249 20:52:40.064538
2250 20:52:40.634620 00080000 ################################################################
2251 20:52:40.634759
2252 20:52:41.260854 00100000 ################################################################
2253 20:52:41.260991
2254 20:52:41.794568 00180000 ################################################################
2255 20:52:41.794718
2256 20:52:42.413856 00200000 ################################################################
2257 20:52:42.414377
2258 20:52:43.025802 00280000 ################################################################
2259 20:52:43.025941
2260 20:52:43.590868 00300000 ################################################################
2261 20:52:43.591422
2262 20:52:44.150905 00380000 ################################################################
2263 20:52:44.151063
2264 20:52:44.744074 00400000 ################################################################
2265 20:52:44.744211
2266 20:52:45.307717 00480000 ################################################################
2267 20:52:45.307900
2268 20:52:45.943749 00500000 ################################################################
2269 20:52:45.944269
2270 20:52:46.565504 00580000 ################################################################
2271 20:52:46.566027
2272 20:52:47.176062 00600000 ################################################################
2273 20:52:47.176580
2274 20:52:47.729255 00680000 ################################################################
2275 20:52:47.729395
2276 20:52:48.316391 00700000 ################################################################
2277 20:52:48.316949
2278 20:52:48.931841 00780000 ################################################################
2279 20:52:48.931995
2280 20:52:49.133298 00800000 ######################## done.
2281 20:52:49.133493
2282 20:52:49.137007 Sending tftp read request... done.
2283 20:52:49.137085
2284 20:52:49.140107 Waiting for the transfer...
2285 20:52:49.140185
2286 20:52:49.140250 00000000 # done.
2287 20:52:49.140313
2288 20:52:49.149922 Command line loaded dynamically from TFTP file: 8785132/tftp-deploy-us7zcp2x/kernel/cmdline
2289 20:52:49.150018
2290 20:52:49.163315 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2291 20:52:49.163405
2292 20:52:49.170594 Shutting down all USB controllers.
2293 20:52:49.170675
2294 20:52:49.170742 Removing current net device
2295 20:52:49.170808
2296 20:52:49.174402 Finalizing coreboot
2297 20:52:49.174487
2298 20:52:49.180458 Exiting depthcharge with code 4 at timestamp: 29720067
2299 20:52:49.180558
2300 20:52:49.180625
2301 20:52:49.180687 Starting kernel ...
2302 20:52:49.180763
2303 20:52:49.180823
2304 20:52:49.180881
2305 20:52:49.181274 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2306 20:52:49.181382 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2307 20:52:49.181496 Setting prompt string to ['Linux version [0-9]']
2308 20:52:49.181567 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2309 20:52:49.181640 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2311 20:57:11.182546 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2313 20:57:11.183784 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2315 20:57:11.184640 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2318 20:57:11.186221 end: 2 depthcharge-action (duration 00:05:00) [common]
2320 20:57:11.186689 Cleaning after the job
2321 20:57:11.186775 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785132/tftp-deploy-us7zcp2x/ramdisk
2322 20:57:11.187409 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785132/tftp-deploy-us7zcp2x/kernel
2323 20:57:11.188121 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785132/tftp-deploy-us7zcp2x/modules
2324 20:57:11.188328 start: 5.1 power-off (timeout 00:00:30) [common]
2325 20:57:11.188543 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=off'
2326 20:57:11.209502 >> Command sent successfully.
2327 20:57:11.211582 Returned 0 in 0 seconds
2328 20:57:11.312463 end: 5.1 power-off (duration 00:00:00) [common]
2330 20:57:11.312813 start: 5.2 read-feedback (timeout 00:10:00) [common]
2331 20:57:11.313074 Listened to connection for namespace 'common' for up to 1s
2332 20:57:12.317544 Finalising connection for namespace 'common'
2333 20:57:12.317802 Disconnecting from shell: Finalise
2334 20:57:12.418657 end: 5.2 read-feedback (duration 00:00:01) [common]
2335 20:57:12.418863 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8785132
2336 20:57:12.425163 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8785132
2337 20:57:12.425365 JobError: Your job cannot terminate cleanly.