Boot log: asus-C436FA-Flip-hatch
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 20:54:14.321248 lava-dispatcher, installed at version: 2022.11
2 20:54:14.321455 start: 0 validate
3 20:54:14.321629 Start time: 2023-01-18 20:54:14.321622+00:00 (UTC)
4 20:54:14.321763 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:54:14.321893 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230114.0%2Famd64%2Finitrd.cpio.gz exists
6 20:54:14.617683 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:54:14.618444 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.269-cip88-rt28%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:54:14.902174 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:54:14.902349 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230114.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 20:54:15.197122 Using caching service: 'http://localhost/cache/?uri=%s'
11 20:54:15.197305 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.269-cip88-rt28%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 20:54:15.492461 validate duration: 1.17
14 20:54:15.492740 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 20:54:15.492849 start: 1.1 download-retry (timeout 00:10:00) [common]
16 20:54:15.492937 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 20:54:15.493035 Not decompressing ramdisk as can be used compressed.
18 20:54:15.493119 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230114.0/amd64/initrd.cpio.gz
19 20:54:15.493184 saving as /var/lib/lava/dispatcher/tmp/8785147/tftp-deploy-5dbg8a5g/ramdisk/initrd.cpio.gz
20 20:54:15.493245 total size: 5432135 (5MB)
21 20:54:15.506178 progress 0% (0MB)
22 20:54:15.515431 progress 5% (0MB)
23 20:54:15.523366 progress 10% (0MB)
24 20:54:15.532635 progress 15% (0MB)
25 20:54:15.543196 progress 20% (1MB)
26 20:54:15.551983 progress 25% (1MB)
27 20:54:15.560069 progress 30% (1MB)
28 20:54:15.568854 progress 35% (1MB)
29 20:54:15.577924 progress 40% (2MB)
30 20:54:15.586661 progress 45% (2MB)
31 20:54:15.598873 progress 50% (2MB)
32 20:54:15.607751 progress 55% (2MB)
33 20:54:15.616211 progress 60% (3MB)
34 20:54:15.625128 progress 65% (3MB)
35 20:54:15.635112 progress 70% (3MB)
36 20:54:15.643614 progress 75% (3MB)
37 20:54:15.652663 progress 80% (4MB)
38 20:54:15.662344 progress 85% (4MB)
39 20:54:15.671954 progress 90% (4MB)
40 20:54:15.680516 progress 95% (4MB)
41 20:54:15.689074 progress 100% (5MB)
42 20:54:15.689781 5MB downloaded in 0.20s (26.36MB/s)
43 20:54:15.690187 end: 1.1.1 http-download (duration 00:00:00) [common]
45 20:54:15.690864 end: 1.1 download-retry (duration 00:00:00) [common]
46 20:54:15.691109 start: 1.2 download-retry (timeout 00:10:00) [common]
47 20:54:15.691350 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 20:54:15.691625 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.269-cip88-rt28/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 20:54:15.691817 saving as /var/lib/lava/dispatcher/tmp/8785147/tftp-deploy-5dbg8a5g/kernel/bzImage
50 20:54:15.691998 total size: 9711616 (9MB)
51 20:54:15.692135 No compression specified
52 20:54:15.695462 progress 0% (0MB)
53 20:54:15.708428 progress 5% (0MB)
54 20:54:15.719809 progress 10% (0MB)
55 20:54:15.732908 progress 15% (1MB)
56 20:54:15.745579 progress 20% (1MB)
57 20:54:15.757467 progress 25% (2MB)
58 20:54:15.769229 progress 30% (2MB)
59 20:54:15.781758 progress 35% (3MB)
60 20:54:15.795585 progress 40% (3MB)
61 20:54:15.808044 progress 45% (4MB)
62 20:54:15.819656 progress 50% (4MB)
63 20:54:15.832019 progress 55% (5MB)
64 20:54:15.844728 progress 60% (5MB)
65 20:54:15.856754 progress 65% (6MB)
66 20:54:15.868886 progress 70% (6MB)
67 20:54:15.882289 progress 75% (6MB)
68 20:54:15.894014 progress 80% (7MB)
69 20:54:15.906973 progress 85% (7MB)
70 20:54:15.918514 progress 90% (8MB)
71 20:54:15.932228 progress 95% (8MB)
72 20:54:15.942983 progress 100% (9MB)
73 20:54:15.943196 9MB downloaded in 0.25s (36.87MB/s)
74 20:54:15.943352 end: 1.2.1 http-download (duration 00:00:00) [common]
76 20:54:15.943593 end: 1.2 download-retry (duration 00:00:00) [common]
77 20:54:15.943758 start: 1.3 download-retry (timeout 00:10:00) [common]
78 20:54:15.943845 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 20:54:15.943951 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230114.0/amd64/full.rootfs.tar.xz
80 20:54:15.944019 saving as /var/lib/lava/dispatcher/tmp/8785147/tftp-deploy-5dbg8a5g/nfsrootfs/full.rootfs.tar
81 20:54:15.944082 total size: 133346544 (127MB)
82 20:54:15.944160 Using unxz to decompress xz
83 20:54:15.961070 progress 0% (0MB)
84 20:54:16.307208 progress 5% (6MB)
85 20:54:16.675338 progress 10% (12MB)
86 20:54:16.972979 progress 15% (19MB)
87 20:54:17.187259 progress 20% (25MB)
88 20:54:17.447556 progress 25% (31MB)
89 20:54:17.809469 progress 30% (38MB)
90 20:54:18.167147 progress 35% (44MB)
91 20:54:18.557059 progress 40% (50MB)
92 20:54:18.935621 progress 45% (57MB)
93 20:54:19.285447 progress 50% (63MB)
94 20:54:19.656257 progress 55% (69MB)
95 20:54:20.013803 progress 60% (76MB)
96 20:54:20.373559 progress 65% (82MB)
97 20:54:20.731545 progress 70% (89MB)
98 20:54:21.095168 progress 75% (95MB)
99 20:54:21.537953 progress 80% (101MB)
100 20:54:21.975603 progress 85% (108MB)
101 20:54:22.239850 progress 90% (114MB)
102 20:54:22.580842 progress 95% (120MB)
103 20:54:22.972548 progress 100% (127MB)
104 20:54:22.978059 127MB downloaded in 7.03s (18.08MB/s)
105 20:54:22.978339 end: 1.3.1 http-download (duration 00:00:07) [common]
107 20:54:22.978626 end: 1.3 download-retry (duration 00:00:07) [common]
108 20:54:22.978757 start: 1.4 download-retry (timeout 00:09:53) [common]
109 20:54:22.978867 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 20:54:22.978984 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.269-cip88-rt28/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 20:54:22.979055 saving as /var/lib/lava/dispatcher/tmp/8785147/tftp-deploy-5dbg8a5g/modules/modules.tar
112 20:54:22.979155 total size: 64664 (0MB)
113 20:54:22.979217 Using unxz to decompress xz
114 20:54:22.984745 progress 50% (0MB)
115 20:54:22.985152 progress 100% (0MB)
116 20:54:22.989438 0MB downloaded in 0.01s (6.00MB/s)
117 20:54:22.989710 end: 1.4.1 http-download (duration 00:00:00) [common]
119 20:54:22.989966 end: 1.4 download-retry (duration 00:00:00) [common]
120 20:54:22.990061 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 20:54:22.990157 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 20:54:24.239477 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8785147/extract-nfsrootfs-kppbzx2y
123 20:54:24.239683 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 20:54:24.239789 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
125 20:54:24.239924 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q
126 20:54:24.240029 makedir: /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin
127 20:54:24.240116 makedir: /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/tests
128 20:54:24.240198 makedir: /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/results
129 20:54:24.240297 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-add-keys
130 20:54:24.240428 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-add-sources
131 20:54:24.240545 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-background-process-start
132 20:54:24.240660 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-background-process-stop
133 20:54:24.240773 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-common-functions
134 20:54:24.240885 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-echo-ipv4
135 20:54:24.240998 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-install-packages
136 20:54:24.241109 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-installed-packages
137 20:54:24.241218 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-os-build
138 20:54:24.241329 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-probe-channel
139 20:54:24.241440 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-probe-ip
140 20:54:24.241588 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-target-ip
141 20:54:24.241698 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-target-mac
142 20:54:24.241808 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-target-storage
143 20:54:24.241919 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-test-case
144 20:54:24.242031 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-test-event
145 20:54:24.242141 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-test-feedback
146 20:54:24.242249 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-test-raise
147 20:54:24.242359 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-test-reference
148 20:54:24.242469 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-test-runner
149 20:54:24.242582 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-test-set
150 20:54:24.242691 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-test-shell
151 20:54:24.242802 Updating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-install-packages (oe)
152 20:54:24.242917 Updating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/bin/lava-installed-packages (oe)
153 20:54:24.243015 Creating /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/environment
154 20:54:24.243102 LAVA metadata
155 20:54:24.243169 - LAVA_JOB_ID=8785147
156 20:54:24.243235 - LAVA_DISPATCHER_IP=192.168.201.1
157 20:54:24.243335 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
158 20:54:24.243402 skipped lava-vland-overlay
159 20:54:24.243480 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 20:54:24.243563 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
161 20:54:24.243627 skipped lava-multinode-overlay
162 20:54:24.243702 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 20:54:24.243785 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
164 20:54:24.243857 Loading test definitions
165 20:54:24.243951 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
166 20:54:24.244023 Using /lava-8785147 at stage 0
167 20:54:24.244279 uuid=8785147_1.5.2.3.1 testdef=None
168 20:54:24.244371 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 20:54:24.244459 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
170 20:54:24.244930 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 20:54:24.245164 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
173 20:54:24.245765 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 20:54:24.246007 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
176 20:54:24.246541 runner path: /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/0/tests/0_dmesg test_uuid 8785147_1.5.2.3.1
177 20:54:24.246686 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 20:54:24.246921 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
180 20:54:24.246997 Using /lava-8785147 at stage 1
181 20:54:24.247236 uuid=8785147_1.5.2.3.5 testdef=None
182 20:54:24.247328 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 20:54:24.247417 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
184 20:54:24.247854 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 20:54:24.248083 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
187 20:54:24.248648 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 20:54:24.248889 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
190 20:54:24.249432 runner path: /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/1/tests/1_bootrr test_uuid 8785147_1.5.2.3.5
191 20:54:24.250007 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 20:54:24.250224 Creating lava-test-runner.conf files
194 20:54:24.250291 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/0 for stage 0
195 20:54:24.250377 - 0_dmesg
196 20:54:24.250453 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8785147/lava-overlay-scsysb1q/lava-8785147/1 for stage 1
197 20:54:24.250536 - 1_bootrr
198 20:54:24.250629 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 20:54:24.250718 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
200 20:54:24.256124 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 20:54:24.256229 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
202 20:54:24.256318 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 20:54:24.256406 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 20:54:24.256494 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
205 20:54:24.358650 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 20:54:24.358995 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 20:54:24.359102 extracting modules file /var/lib/lava/dispatcher/tmp/8785147/tftp-deploy-5dbg8a5g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8785147/extract-nfsrootfs-kppbzx2y
208 20:54:24.363089 extracting modules file /var/lib/lava/dispatcher/tmp/8785147/tftp-deploy-5dbg8a5g/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8785147/extract-overlay-ramdisk-9rbezwem/ramdisk
209 20:54:24.366798 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 20:54:24.366906 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 20:54:24.366987 [common] Applying overlay to NFS
212 20:54:24.367060 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8785147/compress-overlay-4m62yk5m/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8785147/extract-nfsrootfs-kppbzx2y
213 20:54:24.370821 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 20:54:24.370926 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 20:54:24.371017 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 20:54:24.371108 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 20:54:24.371186 Building ramdisk /var/lib/lava/dispatcher/tmp/8785147/extract-overlay-ramdisk-9rbezwem/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8785147/extract-overlay-ramdisk-9rbezwem/ramdisk
218 20:54:24.404716 >> 24777 blocks
219 20:54:24.867139 rename /var/lib/lava/dispatcher/tmp/8785147/extract-overlay-ramdisk-9rbezwem/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8785147/tftp-deploy-5dbg8a5g/ramdisk/ramdisk.cpio.gz
220 20:54:24.867541 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
221 20:54:24.867660 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
222 20:54:24.867768 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
223 20:54:24.867866 No mkimage arch provided, not using FIT.
224 20:54:24.867957 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 20:54:24.868043 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 20:54:24.868142 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 20:54:24.868236 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
228 20:54:24.868314 No LXC device requested
229 20:54:24.868394 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 20:54:24.868481 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
231 20:54:24.868562 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 20:54:24.868631 Checking files for TFTP limit of 4294967296 bytes.
233 20:54:24.869013 end: 1 tftp-deploy (duration 00:00:09) [common]
234 20:54:24.869116 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 20:54:24.869206 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 20:54:24.869333 substitutions:
237 20:54:24.869400 - {DTB}: None
238 20:54:24.869467 - {INITRD}: 8785147/tftp-deploy-5dbg8a5g/ramdisk/ramdisk.cpio.gz
239 20:54:24.869568 - {KERNEL}: 8785147/tftp-deploy-5dbg8a5g/kernel/bzImage
240 20:54:24.869630 - {LAVA_MAC}: None
241 20:54:24.869689 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8785147/extract-nfsrootfs-kppbzx2y
242 20:54:24.869750 - {NFS_SERVER_IP}: 192.168.201.1
243 20:54:24.869809 - {PRESEED_CONFIG}: None
244 20:54:24.869865 - {PRESEED_LOCAL}: None
245 20:54:24.869921 - {RAMDISK}: 8785147/tftp-deploy-5dbg8a5g/ramdisk/ramdisk.cpio.gz
246 20:54:24.869978 - {ROOT_PART}: None
247 20:54:24.870034 - {ROOT}: None
248 20:54:24.870090 - {SERVER_IP}: 192.168.201.1
249 20:54:24.870146 - {TEE}: None
250 20:54:24.870202 Parsed boot commands:
251 20:54:24.870258 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 20:54:24.870411 Parsed boot commands: tftpboot 192.168.201.1 8785147/tftp-deploy-5dbg8a5g/kernel/bzImage 8785147/tftp-deploy-5dbg8a5g/kernel/cmdline 8785147/tftp-deploy-5dbg8a5g/ramdisk/ramdisk.cpio.gz
253 20:54:24.870503 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 20:54:24.870593 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 20:54:24.870690 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 20:54:24.870779 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 20:54:24.870849 Not connected, no need to disconnect.
258 20:54:24.870927 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 20:54:24.871013 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 20:54:24.871083 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-0'
261 20:54:24.873939 Setting prompt string to ['lava-test: # ']
262 20:54:24.874276 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 20:54:24.874406 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 20:54:24.874505 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 20:54:24.874597 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 20:54:24.874769 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=reboot'
267 20:54:24.894408 >> Command sent successfully.
268 20:54:24.896273 Returned 0 in 0 seconds
269 20:54:24.997365 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 20:54:24.998580 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 20:54:24.999011 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 20:54:24.999387 Setting prompt string to 'Starting depthcharge on Helios...'
274 20:54:24.999674 Changing prompt to 'Starting depthcharge on Helios...'
275 20:54:24.999969 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
276 20:54:25.000994 [Enter `^Ec?' for help]
277 20:54:31.244976
278 20:54:31.245616
279 20:54:31.254999 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
280 20:54:31.257870 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
281 20:54:31.264676 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
282 20:54:31.268363 CPU: AES supported, TXT NOT supported, VT supported
283 20:54:31.274752 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
284 20:54:31.277945 PCH: device id 0284 (rev 00) is Cometlake-U Premium
285 20:54:31.285313 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
286 20:54:31.288390 VBOOT: Loading verstage.
287 20:54:31.291322 FMAP: Found "FLASH" version 1.1 at 0xc04000.
288 20:54:31.298695 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
289 20:54:31.301545 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
290 20:54:31.304944 CBFS @ c08000 size 3f8000
291 20:54:31.311745 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
292 20:54:31.314688 CBFS: Locating 'fallback/verstage'
293 20:54:31.318064 CBFS: Found @ offset 10fb80 size 1072c
294 20:54:31.321351
295 20:54:31.321892
296 20:54:31.332025 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
297 20:54:31.346279 Probing TPM: . done!
298 20:54:31.349592 TPM ready after 0 ms
299 20:54:31.353044 Connected to device vid:did:rid of 1ae0:0028:00
300 20:54:31.363038 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
301 20:54:31.366521 Initialized TPM device CR50 revision 0
302 20:54:31.410893 tlcl_send_startup: Startup return code is 0
303 20:54:31.411413 TPM: setup succeeded
304 20:54:31.423594 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
305 20:54:31.427489 Chrome EC: UHEPI supported
306 20:54:31.430587 Phase 1
307 20:54:31.433999 FMAP: area GBB found @ c05000 (12288 bytes)
308 20:54:31.440505 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
309 20:54:31.440998 Phase 2
310 20:54:31.444098
311 20:54:31.444699 Phase 3
312 20:54:31.447234 FMAP: area GBB found @ c05000 (12288 bytes)
313 20:54:31.453987 VB2:vb2_report_dev_firmware() This is developer signed firmware
314 20:54:31.460647 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
315 20:54:31.464256 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
316 20:54:31.470318 VB2:vb2_verify_keyblock() Checking keyblock signature...
317 20:54:31.485960 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
318 20:54:31.489306 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
319 20:54:31.496160 VB2:vb2_verify_fw_preamble() Verifying preamble.
320 20:54:31.500452 Phase 4
321 20:54:31.503921 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
322 20:54:31.510264 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
323 20:54:31.690132 VB2:vb2_rsa_verify_digest() Digest check failed!
324 20:54:31.693271 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
325 20:54:31.696352
326 20:54:31.696812 Saving nvdata
327 20:54:31.699960 Reboot requested (10020007)
328 20:54:31.703419 board_reset() called!
329 20:54:31.703934 full_reset() called!
330 20:54:36.212356
331 20:54:36.212864
332 20:54:36.222445 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
333 20:54:36.225520 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
334 20:54:36.232226 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
335 20:54:36.235653 CPU: AES supported, TXT NOT supported, VT supported
336 20:54:36.242267 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
337 20:54:36.245646 PCH: device id 0284 (rev 00) is Cometlake-U Premium
338 20:54:36.252518 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
339 20:54:36.255478 VBOOT: Loading verstage.
340 20:54:36.259098 FMAP: Found "FLASH" version 1.1 at 0xc04000.
341 20:54:36.265581 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
342 20:54:36.269009 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
343 20:54:36.272273 CBFS @ c08000 size 3f8000
344 20:54:36.278891 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
345 20:54:36.281967 CBFS: Locating 'fallback/verstage'
346 20:54:36.285549 CBFS: Found @ offset 10fb80 size 1072c
347 20:54:36.288559
348 20:54:36.288998
349 20:54:36.298834 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
350 20:54:36.313399 Probing TPM: . done!
351 20:54:36.316627 TPM ready after 0 ms
352 20:54:36.319747 Connected to device vid:did:rid of 1ae0:0028:00
353 20:54:36.329837 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
354 20:54:36.333744 Initialized TPM device CR50 revision 0
355 20:54:36.378195 tlcl_send_startup: Startup return code is 0
356 20:54:36.378779 TPM: setup succeeded
357 20:54:36.390620 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
358 20:54:36.394735 Chrome EC: UHEPI supported
359 20:54:36.398062 Phase 1
360 20:54:36.401540 FMAP: area GBB found @ c05000 (12288 bytes)
361 20:54:36.407934 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
362 20:54:36.414302 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
363 20:54:36.417642 Recovery requested (1009000e)
364 20:54:36.424158 Saving nvdata
365 20:54:36.430036 tlcl_extend: response is 0
366 20:54:36.438525 tlcl_extend: response is 0
367 20:54:36.445887 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
368 20:54:36.448966 CBFS @ c08000 size 3f8000
369 20:54:36.455695 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
370 20:54:36.459213 CBFS: Locating 'fallback/romstage'
371 20:54:36.462434 CBFS: Found @ offset 80 size 145fc
372 20:54:36.465572 Accumulated console time in verstage 98 ms
373 20:54:36.466089
374 20:54:36.466481
375 20:54:36.478617 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
376 20:54:36.485715 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
377 20:54:36.488645 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
378 20:54:36.492138 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
379 20:54:36.498426 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
380 20:54:36.501829 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
381 20:54:36.505238 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
382 20:54:36.508660 TCO_STS: 0000 0000
383 20:54:36.511538 GEN_PMCON: e0015238 00000200
384 20:54:36.514984 GBLRST_CAUSE: 00000000 00000000
385 20:54:36.515438 prev_sleep_state 5
386 20:54:36.518359 Boot Count incremented to 51921
387 20:54:36.525390 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
388 20:54:36.528418 CBFS @ c08000 size 3f8000
389 20:54:36.535311 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
390 20:54:36.535765 CBFS: Locating 'fspm.bin'
391 20:54:36.538442 CBFS: Found @ offset 5ffc0 size 71000
392 20:54:36.542994 Chrome EC: UHEPI supported
393 20:54:36.549889 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
394 20:54:36.555593 Probing TPM: done!
395 20:54:36.561952 Connected to device vid:did:rid of 1ae0:0028:00
396 20:54:36.571682 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
397 20:54:36.577849 Initialized TPM device CR50 revision 0
398 20:54:36.587046 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
399 20:54:36.593642 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
400 20:54:36.596561 MRC cache found, size 1948
401 20:54:36.600089 bootmode is set to: 2
402 20:54:36.603421 PRMRR disabled by config.
403 20:54:36.603854 SPD INDEX = 1
404 20:54:36.609918 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
405 20:54:36.613321 CBFS @ c08000 size 3f8000
406 20:54:36.619888 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
407 20:54:36.620326 CBFS: Locating 'spd.bin'
408 20:54:36.623324 CBFS: Found @ offset 5fb80 size 400
409 20:54:36.626755 SPD: module type is LPDDR3
410 20:54:36.630071 SPD: module part is
411 20:54:36.636472 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
412 20:54:36.639906 SPD: device width 4 bits, bus width 8 bits
413 20:54:36.643306 SPD: module size is 4096 MB (per channel)
414 20:54:36.646211 memory slot: 0 configuration done.
415 20:54:36.649754 memory slot: 2 configuration done.
416 20:54:36.701004 CBMEM:
417 20:54:36.704161 IMD: root @ 99fff000 254 entries.
418 20:54:36.707650 IMD: root @ 99ffec00 62 entries.
419 20:54:36.710908 External stage cache:
420 20:54:36.714439 IMD: root @ 9abff000 254 entries.
421 20:54:36.717516 IMD: root @ 9abfec00 62 entries.
422 20:54:36.720758 Chrome EC: clear events_b mask to 0x0000000020004000
423 20:54:36.736659 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
424 20:54:36.750282 tlcl_write: response is 0
425 20:54:36.759581 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
426 20:54:36.765700 MRC: TPM MRC hash updated successfully.
427 20:54:36.765897 2 DIMMs found
428 20:54:36.768843 SMM Memory Map
429 20:54:36.772511 SMRAM : 0x9a000000 0x1000000
430 20:54:36.775463 Subregion 0: 0x9a000000 0xa00000
431 20:54:36.779474 Subregion 1: 0x9aa00000 0x200000
432 20:54:36.782602 Subregion 2: 0x9ac00000 0x400000
433 20:54:36.785556 top_of_ram = 0x9a000000
434 20:54:36.789095 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
435 20:54:36.795261 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
436 20:54:36.799132 MTRR Range: Start=ff000000 End=0 (Size 1000000)
437 20:54:36.805456 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
438 20:54:36.808504 CBFS @ c08000 size 3f8000
439 20:54:36.811916 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
440 20:54:36.815479 CBFS: Locating 'fallback/postcar'
441 20:54:36.818563 CBFS: Found @ offset 107000 size 4b44
442 20:54:36.822339
443 20:54:36.825324 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
444 20:54:36.837989 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
445 20:54:36.841323 Processing 180 relocs. Offset value of 0x97c0c000
446 20:54:36.849918 Accumulated console time in romstage 286 ms
447 20:54:36.850034
448 20:54:36.850126
449 20:54:36.860014 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
450 20:54:36.866729 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
451 20:54:36.869687 CBFS @ c08000 size 3f8000
452 20:54:36.872797 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
453 20:54:36.879793 CBFS: Locating 'fallback/ramstage'
454 20:54:36.882877 CBFS: Found @ offset 43380 size 1b9e8
455 20:54:36.889739 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
456 20:54:36.922145 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
457 20:54:36.925198 Processing 3976 relocs. Offset value of 0x98db0000
458 20:54:36.931914 Accumulated console time in postcar 52 ms
459 20:54:36.932354
460 20:54:36.932771
461 20:54:36.941968 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
462 20:54:36.945370 FMAP: area RO_VPD found @ c00000 (16384 bytes)
463 20:54:36.948547
464 20:54:36.951918 WARNING: RO_VPD is uninitialized or empty.
465 20:54:36.955275 FMAP: area RW_VPD found @ af8000 (8192 bytes)
466 20:54:36.961670 FMAP: area RW_VPD found @ af8000 (8192 bytes)
467 20:54:36.962196 Normal boot.
468 20:54:36.967954 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
469 20:54:36.971611 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
470 20:54:36.974636 CBFS @ c08000 size 3f8000
471 20:54:36.981588 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
472 20:54:36.985149 CBFS: Locating 'cpu_microcode_blob.bin'
473 20:54:36.988493 CBFS: Found @ offset 14700 size 2ec00
474 20:54:36.991486 microcode: sig=0x806ec pf=0x4 revision=0xc9
475 20:54:36.995023 Skip microcode update
476 20:54:36.997979 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
477 20:54:37.001599
478 20:54:37.002037 CBFS @ c08000 size 3f8000
479 20:54:37.008677 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
480 20:54:37.011428 CBFS: Locating 'fsps.bin'
481 20:54:37.014877 CBFS: Found @ offset d1fc0 size 35000
482 20:54:37.040409 Detected 4 core, 8 thread CPU.
483 20:54:37.043853 Setting up SMI for CPU
484 20:54:37.046492 IED base = 0x9ac00000
485 20:54:37.046972 IED size = 0x00400000
486 20:54:37.049841 Will perform SMM setup.
487 20:54:37.056807 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
488 20:54:37.063575 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
489 20:54:37.066397 Processing 16 relocs. Offset value of 0x00030000
490 20:54:37.070399 Attempting to start 7 APs
491 20:54:37.073451 Waiting for 10ms after sending INIT.
492 20:54:37.089665 Waiting for 1st SIPI to complete...AP: slot 3 apic_id 1.
493 20:54:37.090105 done.
494 20:54:37.093249 AP: slot 5 apic_id 7.
495 20:54:37.096936 AP: slot 2 apic_id 6.
496 20:54:37.099915 Waiting for 2nd SIPI to complete...done.
497 20:54:37.103067 AP: slot 1 apic_id 3.
498 20:54:37.103504 AP: slot 4 apic_id 2.
499 20:54:37.106660 AP: slot 7 apic_id 4.
500 20:54:37.109467 AP: slot 6 apic_id 5.
501 20:54:37.116331 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
502 20:54:37.119711 Processing 13 relocs. Offset value of 0x00038000
503 20:54:37.126181 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
504 20:54:37.132968 Installing SMM handler to 0x9a000000
505 20:54:37.139860 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
506 20:54:37.143186 Processing 658 relocs. Offset value of 0x9a010000
507 20:54:37.152793 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
508 20:54:37.156379 Processing 13 relocs. Offset value of 0x9a008000
509 20:54:37.162699 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
510 20:54:37.169948 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
511 20:54:37.173387 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
512 20:54:37.180251 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
513 20:54:37.186913 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
514 20:54:37.193518 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
515 20:54:37.196157 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
516 20:54:37.203228 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
517 20:54:37.206090 Clearing SMI status registers
518 20:54:37.209612 SMI_STS: PM1
519 20:54:37.210191 PM1_STS: PWRBTN
520 20:54:37.213333 TCO_STS: SECOND_TO
521 20:54:37.216003 New SMBASE 0x9a000000
522 20:54:37.216491 In relocation handler: CPU 0
523 20:54:37.219208
524 20:54:37.223064 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 20:54:37.225915 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 20:54:37.229103 Relocation complete.
527 20:54:37.232144 New SMBASE 0x99fff400
528 20:54:37.232230 In relocation handler: CPU 3
529 20:54:37.239001 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
530 20:54:37.242005 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 20:54:37.245471 Relocation complete.
532 20:54:37.245590 New SMBASE 0x99fff800
533 20:54:37.248978 In relocation handler: CPU 2
534 20:54:37.255360 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
535 20:54:37.258955 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 20:54:37.261991 Relocation complete.
537 20:54:37.262076 New SMBASE 0x99ffec00
538 20:54:37.265327 In relocation handler: CPU 5
539 20:54:37.272007 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
540 20:54:37.275567 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 20:54:37.278652 Relocation complete.
542 20:54:37.278736 New SMBASE 0x99ffe800
543 20:54:37.282218 In relocation handler: CPU 6
544 20:54:37.285348 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
545 20:54:37.292123 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 20:54:37.295454 Relocation complete.
547 20:54:37.295538 New SMBASE 0x99ffe400
548 20:54:37.298569 In relocation handler: CPU 7
549 20:54:37.302202 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
550 20:54:37.308816 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 20:54:37.311786 Relocation complete.
552 20:54:37.311869 New SMBASE 0x99fff000
553 20:54:37.315284 In relocation handler: CPU 4
554 20:54:37.318253 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
555 20:54:37.325174 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 20:54:37.325259 Relocation complete.
557 20:54:37.328570 New SMBASE 0x99fffc00
558 20:54:37.332060 In relocation handler: CPU 1
559 20:54:37.335034 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
560 20:54:37.341603 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 20:54:37.341688 Relocation complete.
562 20:54:37.345426 Initializing CPU #0
563 20:54:37.348478 CPU: vendor Intel device 806ec
564 20:54:37.351930 CPU: family 06, model 8e, stepping 0c
565 20:54:37.355516 Clearing out pending MCEs
566 20:54:37.358496 Setting up local APIC...
567 20:54:37.358581 apic_id: 0x00 done.
568 20:54:37.361790 Turbo is available but hidden
569 20:54:37.364793 Turbo is available and visible
570 20:54:37.368080 VMX status: enabled
571 20:54:37.371592 IA32_FEATURE_CONTROL status: locked
572 20:54:37.375075 Skip microcode update
573 20:54:37.375159 CPU #0 initialized
574 20:54:37.378201 Initializing CPU #3
575 20:54:37.378286 Initializing CPU #6
576 20:54:37.381717 Initializing CPU #7
577 20:54:37.384650 CPU: vendor Intel device 806ec
578 20:54:37.388334 CPU: family 06, model 8e, stepping 0c
579 20:54:37.391308 CPU: vendor Intel device 806ec
580 20:54:37.394891 CPU: family 06, model 8e, stepping 0c
581 20:54:37.397882 Clearing out pending MCEs
582 20:54:37.401604 Clearing out pending MCEs
583 20:54:37.404526 Setting up local APIC...
584 20:54:37.408084 CPU: vendor Intel device 806ec
585 20:54:37.411676 CPU: family 06, model 8e, stepping 0c
586 20:54:37.411761 Clearing out pending MCEs
587 20:54:37.414412
588 20:54:37.414497 Setting up local APIC...
589 20:54:37.418111 Initializing CPU #2
590 20:54:37.418195 Initializing CPU #5
591 20:54:37.421453
592 20:54:37.421575 CPU: vendor Intel device 806ec
593 20:54:37.427707 CPU: family 06, model 8e, stepping 0c
594 20:54:37.427800 Setting up local APIC...
595 20:54:37.431268 Clearing out pending MCEs
596 20:54:37.434687 CPU: vendor Intel device 806ec
597 20:54:37.437648 CPU: family 06, model 8e, stepping 0c
598 20:54:37.441176 Setting up local APIC...
599 20:54:37.444633 apic_id: 0x05 done.
600 20:54:37.444717 apic_id: 0x04 done.
601 20:54:37.448120 VMX status: enabled
602 20:54:37.448205 VMX status: enabled
603 20:54:37.454720 IA32_FEATURE_CONTROL status: locked
604 20:54:37.457934 IA32_FEATURE_CONTROL status: locked
605 20:54:37.458034 Skip microcode update
606 20:54:37.461124 Skip microcode update
607 20:54:37.464745 CPU #6 initialized
608 20:54:37.464842 CPU #7 initialized
609 20:54:37.467562 apic_id: 0x01 done.
610 20:54:37.467667 Initializing CPU #4
611 20:54:37.471080 Initializing CPU #1
612 20:54:37.474504 CPU: vendor Intel device 806ec
613 20:54:37.477747 CPU: family 06, model 8e, stepping 0c
614 20:54:37.481432 CPU: vendor Intel device 806ec
615 20:54:37.484668 CPU: family 06, model 8e, stepping 0c
616 20:54:37.488233 Clearing out pending MCEs
617 20:54:37.491327 Clearing out pending MCEs
618 20:54:37.495014 Setting up local APIC...
619 20:54:37.495257 VMX status: enabled
620 20:54:37.497821 apic_id: 0x06 done.
621 20:54:37.501613 Clearing out pending MCEs
622 20:54:37.501907 VMX status: enabled
623 20:54:37.504311 Setting up local APIC...
624 20:54:37.507802 IA32_FEATURE_CONTROL status: locked
625 20:54:37.511016 Setting up local APIC...
626 20:54:37.514590 IA32_FEATURE_CONTROL status: locked
627 20:54:37.518080 apic_id: 0x07 done.
628 20:54:37.518478 Skip microcode update
629 20:54:37.521333 VMX status: enabled
630 20:54:37.521901 CPU #2 initialized
631 20:54:37.524961
632 20:54:37.527994 IA32_FEATURE_CONTROL status: locked
633 20:54:37.528554 Skip microcode update
634 20:54:37.531021 Skip microcode update
635 20:54:37.534414 CPU #3 initialized
636 20:54:37.534847 apic_id: 0x02 done.
637 20:54:37.537779 apic_id: 0x03 done.
638 20:54:37.538215 VMX status: enabled
639 20:54:37.541379 VMX status: enabled
640 20:54:37.544279 IA32_FEATURE_CONTROL status: locked
641 20:54:37.547855 IA32_FEATURE_CONTROL status: locked
642 20:54:37.550882 Skip microcode update
643 20:54:37.554341 Skip microcode update
644 20:54:37.554778 CPU #4 initialized
645 20:54:37.557795 CPU #1 initialized
646 20:54:37.558231 CPU #5 initialized
647 20:54:37.564941 bsp_do_flight_plan done after 461 msecs.
648 20:54:37.567634 CPU: frequency set to 4200 MHz
649 20:54:37.568208 Enabling SMIs.
650 20:54:37.568571 Locking SMM.
651 20:54:37.584419 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
652 20:54:37.587643 CBFS @ c08000 size 3f8000
653 20:54:37.594076 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
654 20:54:37.594652 CBFS: Locating 'vbt.bin'
655 20:54:37.596983 CBFS: Found @ offset 5f5c0 size 499
656 20:54:37.604093 Found a VBT of 4608 bytes after decompression
657 20:54:37.789596 Display FSP Version Info HOB
658 20:54:37.792634 Reference Code - CPU = 9.0.1e.30
659 20:54:37.795988 uCode Version = 0.0.0.ca
660 20:54:37.799099 TXT ACM version = ff.ff.ff.ffff
661 20:54:37.802567 Display FSP Version Info HOB
662 20:54:37.805789 Reference Code - ME = 9.0.1e.30
663 20:54:37.809282 MEBx version = 0.0.0.0
664 20:54:37.812761 ME Firmware Version = Consumer SKU
665 20:54:37.815682 Display FSP Version Info HOB
666 20:54:37.818929 Reference Code - CML PCH = 9.0.1e.30
667 20:54:37.822618 PCH-CRID Status = Disabled
668 20:54:37.826031 PCH-CRID Original Value = ff.ff.ff.ffff
669 20:54:37.828901 PCH-CRID New Value = ff.ff.ff.ffff
670 20:54:37.832206 OPROM - RST - RAID = ff.ff.ff.ffff
671 20:54:37.835732 ChipsetInit Base Version = ff.ff.ff.ffff
672 20:54:37.838815 ChipsetInit Oem Version = ff.ff.ff.ffff
673 20:54:37.842407 Display FSP Version Info HOB
674 20:54:37.848831 Reference Code - SA - System Agent = 9.0.1e.30
675 20:54:37.852228 Reference Code - MRC = 0.7.1.6c
676 20:54:37.852721 SA - PCIe Version = 9.0.1e.30
677 20:54:37.855347
678 20:54:37.855845 SA-CRID Status = Disabled
679 20:54:37.858798 SA-CRID Original Value = 0.0.0.c
680 20:54:37.862476 SA-CRID New Value = 0.0.0.c
681 20:54:37.865310 OPROM - VBIOS = ff.ff.ff.ffff
682 20:54:37.868718 RTC Init
683 20:54:37.872179 Set power on after power failure.
684 20:54:37.872657 Disabling Deep S3
685 20:54:37.875536 Disabling Deep S3
686 20:54:37.875975 Disabling Deep S4
687 20:54:37.878449 Disabling Deep S4
688 20:54:37.878887 Disabling Deep S5
689 20:54:37.881836
690 20:54:37.882274 Disabling Deep S5
691 20:54:37.888470 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
692 20:54:37.888913 Enumerating buses...
693 20:54:37.895062 Show all devs... Before device enumeration.
694 20:54:37.895504 Root Device: enabled 1
695 20:54:37.898650
696 20:54:37.899091 CPU_CLUSTER: 0: enabled 1
697 20:54:37.901575 DOMAIN: 0000: enabled 1
698 20:54:37.905248 APIC: 00: enabled 1
699 20:54:37.905738 PCI: 00:00.0: enabled 1
700 20:54:37.908601 PCI: 00:02.0: enabled 1
701 20:54:37.911663 PCI: 00:04.0: enabled 0
702 20:54:37.915282 PCI: 00:05.0: enabled 0
703 20:54:37.915734 PCI: 00:12.0: enabled 1
704 20:54:37.918383 PCI: 00:12.5: enabled 0
705 20:54:37.922054 PCI: 00:12.6: enabled 0
706 20:54:37.922503 PCI: 00:14.0: enabled 1
707 20:54:37.924922
708 20:54:37.925371 PCI: 00:14.1: enabled 0
709 20:54:37.928453 PCI: 00:14.3: enabled 1
710 20:54:37.931370 PCI: 00:14.5: enabled 0
711 20:54:37.931833 PCI: 00:15.0: enabled 1
712 20:54:37.934802 PCI: 00:15.1: enabled 1
713 20:54:37.938244 PCI: 00:15.2: enabled 0
714 20:54:37.941532 PCI: 00:15.3: enabled 0
715 20:54:37.942002 PCI: 00:16.0: enabled 1
716 20:54:37.944957 PCI: 00:16.1: enabled 0
717 20:54:37.948365 PCI: 00:16.2: enabled 0
718 20:54:37.951316 PCI: 00:16.3: enabled 0
719 20:54:37.951810 PCI: 00:16.4: enabled 0
720 20:54:37.954690 PCI: 00:16.5: enabled 0
721 20:54:37.958092 PCI: 00:17.0: enabled 1
722 20:54:37.961171 PCI: 00:19.0: enabled 1
723 20:54:37.961665 PCI: 00:19.1: enabled 0
724 20:54:37.964879 PCI: 00:19.2: enabled 0
725 20:54:37.967911 PCI: 00:1a.0: enabled 0
726 20:54:37.971112 PCI: 00:1c.0: enabled 0
727 20:54:37.971555 PCI: 00:1c.1: enabled 0
728 20:54:37.974573 PCI: 00:1c.2: enabled 0
729 20:54:37.977940 PCI: 00:1c.3: enabled 0
730 20:54:37.978386 PCI: 00:1c.4: enabled 0
731 20:54:37.981594 PCI: 00:1c.5: enabled 0
732 20:54:37.984645 PCI: 00:1c.6: enabled 0
733 20:54:37.988073 PCI: 00:1c.7: enabled 0
734 20:54:37.988521 PCI: 00:1d.0: enabled 1
735 20:54:37.991193 PCI: 00:1d.1: enabled 0
736 20:54:37.994811 PCI: 00:1d.2: enabled 0
737 20:54:37.997834 PCI: 00:1d.3: enabled 0
738 20:54:37.998282 PCI: 00:1d.4: enabled 0
739 20:54:38.001012 PCI: 00:1d.5: enabled 1
740 20:54:38.004565 PCI: 00:1e.0: enabled 1
741 20:54:38.007631 PCI: 00:1e.1: enabled 0
742 20:54:38.008080 PCI: 00:1e.2: enabled 1
743 20:54:38.010980 PCI: 00:1e.3: enabled 1
744 20:54:38.014609 PCI: 00:1f.0: enabled 1
745 20:54:38.015059 PCI: 00:1f.1: enabled 1
746 20:54:38.017758 PCI: 00:1f.2: enabled 1
747 20:54:38.021103 PCI: 00:1f.3: enabled 1
748 20:54:38.024421 PCI: 00:1f.4: enabled 1
749 20:54:38.024980 PCI: 00:1f.5: enabled 1
750 20:54:38.027678 PCI: 00:1f.6: enabled 0
751 20:54:38.030665 USB0 port 0: enabled 1
752 20:54:38.033990 I2C: 00:15: enabled 1
753 20:54:38.034456 I2C: 00:5d: enabled 1
754 20:54:38.037442 GENERIC: 0.0: enabled 1
755 20:54:38.040771 I2C: 00:1a: enabled 1
756 20:54:38.040939 I2C: 00:38: enabled 1
757 20:54:38.043788 I2C: 00:39: enabled 1
758 20:54:38.047355 I2C: 00:3a: enabled 1
759 20:54:38.047441 I2C: 00:3b: enabled 1
760 20:54:38.050187 PCI: 00:00.0: enabled 1
761 20:54:38.053662 SPI: 00: enabled 1
762 20:54:38.053749 SPI: 01: enabled 1
763 20:54:38.056984 PNP: 0c09.0: enabled 1
764 20:54:38.060513 USB2 port 0: enabled 1
765 20:54:38.060599 USB2 port 1: enabled 1
766 20:54:38.063587 USB2 port 2: enabled 0
767 20:54:38.067009 USB2 port 3: enabled 0
768 20:54:38.067095 USB2 port 5: enabled 0
769 20:54:38.070430 USB2 port 6: enabled 1
770 20:54:38.073801 USB2 port 9: enabled 1
771 20:54:38.076667 USB3 port 0: enabled 1
772 20:54:38.076748 USB3 port 1: enabled 1
773 20:54:38.080200 USB3 port 2: enabled 1
774 20:54:38.083450 USB3 port 3: enabled 1
775 20:54:38.083550 USB3 port 4: enabled 0
776 20:54:38.087508 APIC: 03: enabled 1
777 20:54:38.090032 APIC: 06: enabled 1
778 20:54:38.090136 APIC: 01: enabled 1
779 20:54:38.093623 APIC: 02: enabled 1
780 20:54:38.093732 APIC: 07: enabled 1
781 20:54:38.096692 APIC: 05: enabled 1
782 20:54:38.100329 APIC: 04: enabled 1
783 20:54:38.100446 Compare with tree...
784 20:54:38.103835 Root Device: enabled 1
785 20:54:38.106913 CPU_CLUSTER: 0: enabled 1
786 20:54:38.110027 APIC: 00: enabled 1
787 20:54:38.110175 APIC: 03: enabled 1
788 20:54:38.113496 APIC: 06: enabled 1
789 20:54:38.116682 APIC: 01: enabled 1
790 20:54:38.116847 APIC: 02: enabled 1
791 20:54:38.120330 APIC: 07: enabled 1
792 20:54:38.123669 APIC: 05: enabled 1
793 20:54:38.123974 APIC: 04: enabled 1
794 20:54:38.127186 DOMAIN: 0000: enabled 1
795 20:54:38.130093 PCI: 00:00.0: enabled 1
796 20:54:38.133605 PCI: 00:02.0: enabled 1
797 20:54:38.133906 PCI: 00:04.0: enabled 0
798 20:54:38.137084 PCI: 00:05.0: enabled 0
799 20:54:38.140484 PCI: 00:12.0: enabled 1
800 20:54:38.143496 PCI: 00:12.5: enabled 0
801 20:54:38.146961 PCI: 00:12.6: enabled 0
802 20:54:38.147408 PCI: 00:14.0: enabled 1
803 20:54:38.150009 USB0 port 0: enabled 1
804 20:54:38.153649 USB2 port 0: enabled 1
805 20:54:38.156939 USB2 port 1: enabled 1
806 20:54:38.159882 USB2 port 2: enabled 0
807 20:54:38.160331 USB2 port 3: enabled 0
808 20:54:38.163755 USB2 port 5: enabled 0
809 20:54:38.166739 USB2 port 6: enabled 1
810 20:54:38.170457 USB2 port 9: enabled 1
811 20:54:38.173515 USB3 port 0: enabled 1
812 20:54:38.176592 USB3 port 1: enabled 1
813 20:54:38.177033 USB3 port 2: enabled 1
814 20:54:38.180449 USB3 port 3: enabled 1
815 20:54:38.183447 USB3 port 4: enabled 0
816 20:54:38.186676 PCI: 00:14.1: enabled 0
817 20:54:38.190207 PCI: 00:14.3: enabled 1
818 20:54:38.190646 PCI: 00:14.5: enabled 0
819 20:54:38.193614 PCI: 00:15.0: enabled 1
820 20:54:38.197262 I2C: 00:15: enabled 1
821 20:54:38.200363 PCI: 00:15.1: enabled 1
822 20:54:38.203251 I2C: 00:5d: enabled 1
823 20:54:38.203692 GENERIC: 0.0: enabled 1
824 20:54:38.207094 PCI: 00:15.2: enabled 0
825 20:54:38.210071 PCI: 00:15.3: enabled 0
826 20:54:38.213694 PCI: 00:16.0: enabled 1
827 20:54:38.214281 PCI: 00:16.1: enabled 0
828 20:54:38.216447
829 20:54:38.216931 PCI: 00:16.2: enabled 0
830 20:54:38.220049 PCI: 00:16.3: enabled 0
831 20:54:38.223391 PCI: 00:16.4: enabled 0
832 20:54:38.226957 PCI: 00:16.5: enabled 0
833 20:54:38.227542 PCI: 00:17.0: enabled 1
834 20:54:38.229780 PCI: 00:19.0: enabled 1
835 20:54:38.233212 I2C: 00:1a: enabled 1
836 20:54:38.237041 I2C: 00:38: enabled 1
837 20:54:38.240376 I2C: 00:39: enabled 1
838 20:54:38.240966 I2C: 00:3a: enabled 1
839 20:54:38.243030 I2C: 00:3b: enabled 1
840 20:54:38.246402 PCI: 00:19.1: enabled 0
841 20:54:38.250051 PCI: 00:19.2: enabled 0
842 20:54:38.250553 PCI: 00:1a.0: enabled 0
843 20:54:38.253194 PCI: 00:1c.0: enabled 0
844 20:54:38.256613 PCI: 00:1c.1: enabled 0
845 20:54:38.259849 PCI: 00:1c.2: enabled 0
846 20:54:38.263359 PCI: 00:1c.3: enabled 0
847 20:54:38.263844 PCI: 00:1c.4: enabled 0
848 20:54:38.266334 PCI: 00:1c.5: enabled 0
849 20:54:38.269620 PCI: 00:1c.6: enabled 0
850 20:54:38.273116 PCI: 00:1c.7: enabled 0
851 20:54:38.276395 PCI: 00:1d.0: enabled 1
852 20:54:38.276899 PCI: 00:1d.1: enabled 0
853 20:54:38.279381 PCI: 00:1d.2: enabled 0
854 20:54:38.282910 PCI: 00:1d.3: enabled 0
855 20:54:38.285892 PCI: 00:1d.4: enabled 0
856 20:54:38.289431 PCI: 00:1d.5: enabled 1
857 20:54:38.289918 PCI: 00:00.0: enabled 1
858 20:54:38.292852 PCI: 00:1e.0: enabled 1
859 20:54:38.295998 PCI: 00:1e.1: enabled 0
860 20:54:38.299455 PCI: 00:1e.2: enabled 1
861 20:54:38.299893 SPI: 00: enabled 1
862 20:54:38.302469 PCI: 00:1e.3: enabled 1
863 20:54:38.306178 SPI: 01: enabled 1
864 20:54:38.309249 PCI: 00:1f.0: enabled 1
865 20:54:38.309739 PNP: 0c09.0: enabled 1
866 20:54:38.313063 PCI: 00:1f.1: enabled 1
867 20:54:38.316265 PCI: 00:1f.2: enabled 1
868 20:54:38.319722 PCI: 00:1f.3: enabled 1
869 20:54:38.322623 PCI: 00:1f.4: enabled 1
870 20:54:38.323059 PCI: 00:1f.5: enabled 1
871 20:54:38.326125 PCI: 00:1f.6: enabled 0
872 20:54:38.329242 Root Device scanning...
873 20:54:38.332846 scan_static_bus for Root Device
874 20:54:38.335759 CPU_CLUSTER: 0 enabled
875 20:54:38.336153 DOMAIN: 0000 enabled
876 20:54:38.339342 DOMAIN: 0000 scanning...
877 20:54:38.342374 PCI: pci_scan_bus for bus 00
878 20:54:38.345866 PCI: 00:00.0 [8086/0000] ops
879 20:54:38.348754 PCI: 00:00.0 [8086/9b61] enabled
880 20:54:38.352145 PCI: 00:02.0 [8086/0000] bus ops
881 20:54:38.355931 PCI: 00:02.0 [8086/9b41] enabled
882 20:54:38.359063 PCI: 00:04.0 [8086/1903] disabled
883 20:54:38.362410 PCI: 00:08.0 [8086/1911] enabled
884 20:54:38.365961 PCI: 00:12.0 [8086/02f9] enabled
885 20:54:38.368839 PCI: 00:14.0 [8086/0000] bus ops
886 20:54:38.372289 PCI: 00:14.0 [8086/02ed] enabled
887 20:54:38.375741 PCI: 00:14.2 [8086/02ef] enabled
888 20:54:38.378773 PCI: 00:14.3 [8086/02f0] enabled
889 20:54:38.382110 PCI: 00:15.0 [8086/0000] bus ops
890 20:54:38.385577 PCI: 00:15.0 [8086/02e8] enabled
891 20:54:38.388775 PCI: 00:15.1 [8086/0000] bus ops
892 20:54:38.392431 PCI: 00:15.1 [8086/02e9] enabled
893 20:54:38.395501 PCI: 00:16.0 [8086/0000] ops
894 20:54:38.399081 PCI: 00:16.0 [8086/02e0] enabled
895 20:54:38.402102 PCI: 00:17.0 [8086/0000] ops
896 20:54:38.405594 PCI: 00:17.0 [8086/02d3] enabled
897 20:54:38.408630 PCI: 00:19.0 [8086/0000] bus ops
898 20:54:38.412311 PCI: 00:19.0 [8086/02c5] enabled
899 20:54:38.415301 PCI: 00:1d.0 [8086/0000] bus ops
900 20:54:38.418946 PCI: 00:1d.0 [8086/02b0] enabled
901 20:54:38.425551 PCI: Static device PCI: 00:1d.5 not found, disabling it.
902 20:54:38.428640 PCI: 00:1e.0 [8086/0000] ops
903 20:54:38.432194 PCI: 00:1e.0 [8086/02a8] enabled
904 20:54:38.435237 PCI: 00:1e.2 [8086/0000] bus ops
905 20:54:38.438748 PCI: 00:1e.2 [8086/02aa] enabled
906 20:54:38.441912 PCI: 00:1e.3 [8086/0000] bus ops
907 20:54:38.445031 PCI: 00:1e.3 [8086/02ab] enabled
908 20:54:38.448708 PCI: 00:1f.0 [8086/0000] bus ops
909 20:54:38.451894 PCI: 00:1f.0 [8086/0284] enabled
910 20:54:38.455413 PCI: Static device PCI: 00:1f.1 not found, disabling it.
911 20:54:38.461995 PCI: Static device PCI: 00:1f.2 not found, disabling it.
912 20:54:38.465365 PCI: 00:1f.3 [8086/0000] bus ops
913 20:54:38.468282 PCI: 00:1f.3 [8086/02c8] enabled
914 20:54:38.471708 PCI: 00:1f.4 [8086/0000] bus ops
915 20:54:38.474814 PCI: 00:1f.4 [8086/02a3] enabled
916 20:54:38.478809 PCI: 00:1f.5 [8086/0000] bus ops
917 20:54:38.481762 PCI: 00:1f.5 [8086/02a4] enabled
918 20:54:38.485078 PCI: Leftover static devices:
919 20:54:38.485544 PCI: 00:05.0
920 20:54:38.488433 PCI: 00:12.5
921 20:54:38.488902 PCI: 00:12.6
922 20:54:38.489284 PCI: 00:14.1
923 20:54:38.491771 PCI: 00:14.5
924 20:54:38.492217 PCI: 00:15.2
925 20:54:38.494881 PCI: 00:15.3
926 20:54:38.495325 PCI: 00:16.1
927 20:54:38.498357 PCI: 00:16.2
928 20:54:38.498798 PCI: 00:16.3
929 20:54:38.499213 PCI: 00:16.4
930 20:54:38.501547 PCI: 00:16.5
931 20:54:38.501993 PCI: 00:19.1
932 20:54:38.505059 PCI: 00:19.2
933 20:54:38.505549 PCI: 00:1a.0
934 20:54:38.505914 PCI: 00:1c.0
935 20:54:38.509008 PCI: 00:1c.1
936 20:54:38.509584 PCI: 00:1c.2
937 20:54:38.512017 PCI: 00:1c.3
938 20:54:38.512558 PCI: 00:1c.4
939 20:54:38.512913 PCI: 00:1c.5
940 20:54:38.515557 PCI: 00:1c.6
941 20:54:38.516118 PCI: 00:1c.7
942 20:54:38.518409 PCI: 00:1d.1
943 20:54:38.518852 PCI: 00:1d.2
944 20:54:38.521402 PCI: 00:1d.3
945 20:54:38.521888 PCI: 00:1d.4
946 20:54:38.522249 PCI: 00:1d.5
947 20:54:38.525465 PCI: 00:1e.1
948 20:54:38.526046 PCI: 00:1f.1
949 20:54:38.528073 PCI: 00:1f.2
950 20:54:38.528517 PCI: 00:1f.6
951 20:54:38.531574 PCI: Check your devicetree.cb.
952 20:54:38.535111 PCI: 00:02.0 scanning...
953 20:54:38.538427 scan_generic_bus for PCI: 00:02.0
954 20:54:38.541509 scan_generic_bus for PCI: 00:02.0 done
955 20:54:38.548308 scan_bus: scanning of bus PCI: 00:02.0 took 10198 usecs
956 20:54:38.548841 PCI: 00:14.0 scanning...
957 20:54:38.551757 scan_static_bus for PCI: 00:14.0
958 20:54:38.554876 USB0 port 0 enabled
959 20:54:38.558392 USB0 port 0 scanning...
960 20:54:38.561712 scan_static_bus for USB0 port 0
961 20:54:38.564791 USB2 port 0 enabled
962 20:54:38.565373 USB2 port 1 enabled
963 20:54:38.568262 USB2 port 2 disabled
964 20:54:38.568863 USB2 port 3 disabled
965 20:54:38.571230 USB2 port 5 disabled
966 20:54:38.574235 USB2 port 6 enabled
967 20:54:38.574680 USB2 port 9 enabled
968 20:54:38.577920 USB3 port 0 enabled
969 20:54:38.581431 USB3 port 1 enabled
970 20:54:38.581899 USB3 port 2 enabled
971 20:54:38.584372 USB3 port 3 enabled
972 20:54:38.584814 USB3 port 4 disabled
973 20:54:38.587790 USB2 port 0 scanning...
974 20:54:38.591161 scan_static_bus for USB2 port 0
975 20:54:38.594424 scan_static_bus for USB2 port 0 done
976 20:54:38.600873 scan_bus: scanning of bus USB2 port 0 took 9707 usecs
977 20:54:38.604392 USB2 port 1 scanning...
978 20:54:38.607531 scan_static_bus for USB2 port 1
979 20:54:38.610979 scan_static_bus for USB2 port 1 done
980 20:54:38.614582 scan_bus: scanning of bus USB2 port 1 took 9708 usecs
981 20:54:38.617654
982 20:54:38.618097 USB2 port 6 scanning...
983 20:54:38.621299 scan_static_bus for USB2 port 6
984 20:54:38.624414 scan_static_bus for USB2 port 6 done
985 20:54:38.630901 scan_bus: scanning of bus USB2 port 6 took 9707 usecs
986 20:54:38.634389 USB2 port 9 scanning...
987 20:54:38.638039 scan_static_bus for USB2 port 9
988 20:54:38.641017 scan_static_bus for USB2 port 9 done
989 20:54:38.644521 scan_bus: scanning of bus USB2 port 9 took 9697 usecs
990 20:54:38.647923 USB3 port 0 scanning...
991 20:54:38.650985 scan_static_bus for USB3 port 0
992 20:54:38.654318 scan_static_bus for USB3 port 0 done
993 20:54:38.660835 scan_bus: scanning of bus USB3 port 0 took 9708 usecs
994 20:54:38.664290 USB3 port 1 scanning...
995 20:54:38.667299 scan_static_bus for USB3 port 1
996 20:54:38.670711 scan_static_bus for USB3 port 1 done
997 20:54:38.677288 scan_bus: scanning of bus USB3 port 1 took 9709 usecs
998 20:54:38.677783 USB3 port 2 scanning...
999 20:54:38.680802 scan_static_bus for USB3 port 2
1000 20:54:38.683913 scan_static_bus for USB3 port 2 done
1001 20:54:38.690818 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
1002 20:54:38.694260 USB3 port 3 scanning...
1003 20:54:38.697579 scan_static_bus for USB3 port 3
1004 20:54:38.700502 scan_static_bus for USB3 port 3 done
1005 20:54:38.707318 scan_bus: scanning of bus USB3 port 3 took 9696 usecs
1006 20:54:38.710819 scan_static_bus for USB0 port 0 done
1007 20:54:38.713828 scan_bus: scanning of bus USB0 port 0 took 155393 usecs
1008 20:54:38.720370 scan_static_bus for PCI: 00:14.0 done
1009 20:54:38.723910 scan_bus: scanning of bus PCI: 00:14.0 took 173026 usecs
1010 20:54:38.726972 PCI: 00:15.0 scanning...
1011 20:54:38.730571 scan_generic_bus for PCI: 00:15.0
1012 20:54:38.733744 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1013 20:54:38.740471 scan_generic_bus for PCI: 00:15.0 done
1014 20:54:38.743973 scan_bus: scanning of bus PCI: 00:15.0 took 14303 usecs
1015 20:54:38.747374 PCI: 00:15.1 scanning...
1016 20:54:38.750242 scan_generic_bus for PCI: 00:15.1
1017 20:54:38.753878 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1018 20:54:38.760247 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1019 20:54:38.763810 scan_generic_bus for PCI: 00:15.1 done
1020 20:54:38.766789 scan_bus: scanning of bus PCI: 00:15.1 took 18611 usecs
1021 20:54:38.770215 PCI: 00:19.0 scanning...
1022 20:54:38.773201 scan_generic_bus for PCI: 00:19.0
1023 20:54:38.780392 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1024 20:54:38.783722 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1025 20:54:38.786732 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1026 20:54:38.790153 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1027 20:54:38.796951 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1028 20:54:38.799801 scan_generic_bus for PCI: 00:19.0 done
1029 20:54:38.803322 scan_bus: scanning of bus PCI: 00:19.0 took 30725 usecs
1030 20:54:38.806901 PCI: 00:1d.0 scanning...
1031 20:54:38.810020 do_pci_scan_bridge for PCI: 00:1d.0
1032 20:54:38.813620 PCI: pci_scan_bus for bus 01
1033 20:54:38.816601 PCI: 01:00.0 [1c5c/1327] enabled
1034 20:54:38.819760 Enabling Common Clock Configuration
1035 20:54:38.827005 L1 Sub-State supported from root port 29
1036 20:54:38.827452 L1 Sub-State Support = 0xf
1037 20:54:38.830162 CommonModeRestoreTime = 0x28
1038 20:54:38.836309 Power On Value = 0x16, Power On Scale = 0x0
1039 20:54:38.836755 ASPM: Enabled L1
1040 20:54:38.843164 scan_bus: scanning of bus PCI: 00:1d.0 took 32794 usecs
1041 20:54:38.846676 PCI: 00:1e.2 scanning...
1042 20:54:38.850070 scan_generic_bus for PCI: 00:1e.2
1043 20:54:38.853197 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1044 20:54:38.856643 scan_generic_bus for PCI: 00:1e.2 done
1045 20:54:38.862834 scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs
1046 20:54:38.866274 PCI: 00:1e.3 scanning...
1047 20:54:38.869994 scan_generic_bus for PCI: 00:1e.3
1048 20:54:38.872767 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1049 20:54:38.876345 scan_generic_bus for PCI: 00:1e.3 done
1050 20:54:38.882924 scan_bus: scanning of bus PCI: 00:1e.3 took 14009 usecs
1051 20:54:38.883372 PCI: 00:1f.0 scanning...
1052 20:54:38.886437 scan_static_bus for PCI: 00:1f.0
1053 20:54:38.889912 PNP: 0c09.0 enabled
1054 20:54:38.893327 scan_static_bus for PCI: 00:1f.0 done
1055 20:54:38.899675 scan_bus: scanning of bus PCI: 00:1f.0 took 12059 usecs
1056 20:54:38.903272 PCI: 00:1f.3 scanning...
1057 20:54:38.906063 scan_bus: scanning of bus PCI: 00:1f.3 took 2852 usecs
1058 20:54:38.910099 PCI: 00:1f.4 scanning...
1059 20:54:38.913322 scan_generic_bus for PCI: 00:1f.4
1060 20:54:38.916159 scan_generic_bus for PCI: 00:1f.4 done
1061 20:54:38.922674 scan_bus: scanning of bus PCI: 00:1f.4 took 10186 usecs
1062 20:54:38.926130 PCI: 00:1f.5 scanning...
1063 20:54:38.929161 scan_generic_bus for PCI: 00:1f.5
1064 20:54:38.932592 scan_generic_bus for PCI: 00:1f.5 done
1065 20:54:38.939610 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
1066 20:54:38.946357 scan_bus: scanning of bus DOMAIN: 0000 took 605092 usecs
1067 20:54:38.949323 scan_static_bus for Root Device done
1068 20:54:38.952470 scan_bus: scanning of bus Root Device took 624965 usecs
1069 20:54:38.956130 done
1070 20:54:38.959442 Chrome EC: UHEPI supported
1071 20:54:38.962798 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1072 20:54:38.969118 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1073 20:54:38.975792 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1074 20:54:38.982719 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1075 20:54:38.986062 SPI flash protection: WPSW=0 SRP0=0
1076 20:54:38.992475 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1077 20:54:38.995839 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1078 20:54:38.999401 found VGA at PCI: 00:02.0
1079 20:54:39.002222 Setting up VGA for PCI: 00:02.0
1080 20:54:39.009112 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1081 20:54:39.012622 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1082 20:54:39.015486 Allocating resources...
1083 20:54:39.019297 Reading resources...
1084 20:54:39.022127 Root Device read_resources bus 0 link: 0
1085 20:54:39.025829 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1086 20:54:39.032433 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1087 20:54:39.035473 DOMAIN: 0000 read_resources bus 0 link: 0
1088 20:54:39.042481 PCI: 00:14.0 read_resources bus 0 link: 0
1089 20:54:39.046064 USB0 port 0 read_resources bus 0 link: 0
1090 20:54:39.054065 USB0 port 0 read_resources bus 0 link: 0 done
1091 20:54:39.057602 PCI: 00:14.0 read_resources bus 0 link: 0 done
1092 20:54:39.064440 PCI: 00:15.0 read_resources bus 1 link: 0
1093 20:54:39.067975 PCI: 00:15.0 read_resources bus 1 link: 0 done
1094 20:54:39.074970 PCI: 00:15.1 read_resources bus 2 link: 0
1095 20:54:39.077868 PCI: 00:15.1 read_resources bus 2 link: 0 done
1096 20:54:39.085423 PCI: 00:19.0 read_resources bus 3 link: 0
1097 20:54:39.092007 PCI: 00:19.0 read_resources bus 3 link: 0 done
1098 20:54:39.095367 PCI: 00:1d.0 read_resources bus 1 link: 0
1099 20:54:39.102013 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1100 20:54:39.105352 PCI: 00:1e.2 read_resources bus 4 link: 0
1101 20:54:39.111924 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1102 20:54:39.115478 PCI: 00:1e.3 read_resources bus 5 link: 0
1103 20:54:39.121987 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1104 20:54:39.125001 PCI: 00:1f.0 read_resources bus 0 link: 0
1105 20:54:39.131807 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1106 20:54:39.138330 DOMAIN: 0000 read_resources bus 0 link: 0 done
1107 20:54:39.141952 Root Device read_resources bus 0 link: 0 done
1108 20:54:39.145529 Done reading resources.
1109 20:54:39.148500 Show resources in subtree (Root Device)...After reading.
1110 20:54:39.154968 Root Device child on link 0 CPU_CLUSTER: 0
1111 20:54:39.158464 CPU_CLUSTER: 0 child on link 0 APIC: 00
1112 20:54:39.158903 APIC: 00
1113 20:54:39.161787 APIC: 03
1114 20:54:39.162253 APIC: 06
1115 20:54:39.164799 APIC: 01
1116 20:54:39.165233 APIC: 02
1117 20:54:39.165617 APIC: 07
1118 20:54:39.168149 APIC: 05
1119 20:54:39.168593 APIC: 04
1120 20:54:39.171825 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1121 20:54:39.181762 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1122 20:54:39.231743 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1123 20:54:39.232327 PCI: 00:00.0
1124 20:54:39.233106 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1125 20:54:39.233621 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1126 20:54:39.234000 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1127 20:54:39.234351 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1128 20:54:39.281727 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1129 20:54:39.282690 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1130 20:54:39.283135 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1131 20:54:39.283575 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1132 20:54:39.284283 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1133 20:54:39.330911 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1134 20:54:39.331406 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1135 20:54:39.331673 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1136 20:54:39.331935 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1137 20:54:39.332021 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1138 20:54:39.350182 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1139 20:54:39.350595 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1140 20:54:39.350697 PCI: 00:02.0
1141 20:54:39.353875 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1142 20:54:39.367409 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1143 20:54:39.373694 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1144 20:54:39.376972 PCI: 00:04.0
1145 20:54:39.377171 PCI: 00:08.0
1146 20:54:39.387144 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1147 20:54:39.390303 PCI: 00:12.0
1148 20:54:39.401213 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1149 20:54:39.403792 PCI: 00:14.0 child on link 0 USB0 port 0
1150 20:54:39.413690 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1151 20:54:39.416969 USB0 port 0 child on link 0 USB2 port 0
1152 20:54:39.420441 USB2 port 0
1153 20:54:39.420527 USB2 port 1
1154 20:54:39.423258 USB2 port 2
1155 20:54:39.423345 USB2 port 3
1156 20:54:39.426311 USB2 port 5
1157 20:54:39.426396 USB2 port 6
1158 20:54:39.429775
1159 20:54:39.429865 USB2 port 9
1160 20:54:39.433244 USB3 port 0
1161 20:54:39.433329 USB3 port 1
1162 20:54:39.436264 USB3 port 2
1163 20:54:39.436348 USB3 port 3
1164 20:54:39.439865 USB3 port 4
1165 20:54:39.439941 PCI: 00:14.2
1166 20:54:39.450028 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1167 20:54:39.460048 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1168 20:54:39.463439 PCI: 00:14.3
1169 20:54:39.473656 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1170 20:54:39.476469 PCI: 00:15.0 child on link 0 I2C: 01:15
1171 20:54:39.486435 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1172 20:54:39.486882 I2C: 01:15
1173 20:54:39.493434 PCI: 00:15.1 child on link 0 I2C: 02:5d
1174 20:54:39.503377 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1175 20:54:39.503821 I2C: 02:5d
1176 20:54:39.506347 GENERIC: 0.0
1177 20:54:39.506785 PCI: 00:16.0
1178 20:54:39.516311 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1179 20:54:39.519636 PCI: 00:17.0
1180 20:54:39.526318 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1181 20:54:39.536637 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1182 20:54:39.546150 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1183 20:54:39.552860 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1184 20:54:39.562941 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1185 20:54:39.569440 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1186 20:54:39.575811 PCI: 00:19.0 child on link 0 I2C: 03:1a
1187 20:54:39.585928 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1188 20:54:39.586391 I2C: 03:1a
1189 20:54:39.589281 I2C: 03:38
1190 20:54:39.589762 I2C: 03:39
1191 20:54:39.592815 I2C: 03:3a
1192 20:54:39.593254 I2C: 03:3b
1193 20:54:39.596056 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1194 20:54:39.605734 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1195 20:54:39.615792 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1196 20:54:39.625790 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1197 20:54:39.626239 PCI: 01:00.0
1198 20:54:39.635465 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1199 20:54:39.639001 PCI: 00:1e.0
1200 20:54:39.648727 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1201 20:54:39.658867 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1202 20:54:39.661983 PCI: 00:1e.2 child on link 0 SPI: 00
1203 20:54:39.672226 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1204 20:54:39.675555 SPI: 00
1205 20:54:39.678419 PCI: 00:1e.3 child on link 0 SPI: 01
1206 20:54:39.688744 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 20:54:39.689294 SPI: 01
1208 20:54:39.694985 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1209 20:54:39.702044 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1210 20:54:39.711494 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1211 20:54:39.711944 PNP: 0c09.0
1212 20:54:39.714987
1213 20:54:39.721677 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1214 20:54:39.724675 PCI: 00:1f.3
1215 20:54:39.735000 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1216 20:54:39.744924 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1217 20:54:39.745560 PCI: 00:1f.4
1218 20:54:39.755057 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1219 20:54:39.765061 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1220 20:54:39.765702 PCI: 00:1f.5
1221 20:54:39.774597 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1222 20:54:39.780737 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1223 20:54:39.787929 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1224 20:54:39.794265 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1225 20:54:39.797178 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1226 20:54:39.801145 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1227 20:54:39.804733 PCI: 00:17.0 18 * [0x60 - 0x67] io
1228 20:54:39.807681 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1229 20:54:39.813842 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1230 20:54:39.820361 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1231 20:54:39.830592 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1232 20:54:39.837073 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1233 20:54:39.843882 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1234 20:54:39.850566 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1235 20:54:39.857027 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1236 20:54:39.860461 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1237 20:54:39.867094 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1238 20:54:39.870066 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1239 20:54:39.876963 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1240 20:54:39.879905 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1241 20:54:39.886972 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1242 20:54:39.890336 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1243 20:54:39.896920 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1244 20:54:39.899822 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1245 20:54:39.906760 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1246 20:54:39.910186 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1247 20:54:39.916665 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1248 20:54:39.920022 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1249 20:54:39.926433 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1250 20:54:39.929891 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1251 20:54:39.933514 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1252 20:54:39.940027 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1253 20:54:39.943139 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1254 20:54:39.949689 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1255 20:54:39.953364 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1256 20:54:39.959993 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1257 20:54:39.963021 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1258 20:54:39.969918 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1259 20:54:39.976427 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1260 20:54:39.979824 avoid_fixed_resources: DOMAIN: 0000
1261 20:54:39.986237 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1262 20:54:39.993074 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1263 20:54:39.999574 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1264 20:54:40.009372 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1265 20:54:40.015796 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1266 20:54:40.022879 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1267 20:54:40.032878 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1268 20:54:40.039276 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1269 20:54:40.045834 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1270 20:54:40.052492 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1271 20:54:40.062386 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1272 20:54:40.069011 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1273 20:54:40.069460 Setting resources...
1274 20:54:40.072482
1275 20:54:40.075556 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1276 20:54:40.082406 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1277 20:54:40.085330 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1278 20:54:40.088720 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1279 20:54:40.092336 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1280 20:54:40.098834 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1281 20:54:40.105353 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1282 20:54:40.112314 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1283 20:54:40.119005 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1284 20:54:40.125532 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1285 20:54:40.129005 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1286 20:54:40.135621 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1287 20:54:40.139044 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1288 20:54:40.145885 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1289 20:54:40.148758 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1290 20:54:40.155294 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1291 20:54:40.159373 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1292 20:54:40.162096 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1293 20:54:40.168981 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1294 20:54:40.172500 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1295 20:54:40.178686 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1296 20:54:40.181674 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1297 20:54:40.188629 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1298 20:54:40.191862 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1299 20:54:40.198378 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1300 20:54:40.202170 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1301 20:54:40.208478 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1302 20:54:40.211750 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1303 20:54:40.218562 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1304 20:54:40.221630 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1305 20:54:40.228318 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1306 20:54:40.231709 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1307 20:54:40.237979 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1308 20:54:40.248168 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1309 20:54:40.254666 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1310 20:54:40.261383 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1311 20:54:40.264895 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1312 20:54:40.274610 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1313 20:54:40.277734 Root Device assign_resources, bus 0 link: 0
1314 20:54:40.281259 DOMAIN: 0000 assign_resources, bus 0 link: 0
1315 20:54:40.291848 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1316 20:54:40.298389 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1317 20:54:40.308414 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1318 20:54:40.314991 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1319 20:54:40.324792 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1320 20:54:40.331513 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1321 20:54:40.337776 PCI: 00:14.0 assign_resources, bus 0 link: 0
1322 20:54:40.341178 PCI: 00:14.0 assign_resources, bus 0 link: 0
1323 20:54:40.351080 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1324 20:54:40.357533 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1325 20:54:40.364805 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1326 20:54:40.367792
1327 20:54:40.374059 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1328 20:54:40.377767 PCI: 00:15.0 assign_resources, bus 1 link: 0
1329 20:54:40.384435 PCI: 00:15.0 assign_resources, bus 1 link: 0
1330 20:54:40.390929 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1331 20:54:40.397296 PCI: 00:15.1 assign_resources, bus 2 link: 0
1332 20:54:40.400835 PCI: 00:15.1 assign_resources, bus 2 link: 0
1333 20:54:40.410686 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1334 20:54:40.417446 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1335 20:54:40.423863 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1336 20:54:40.433603 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1337 20:54:40.440085 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1338 20:54:40.446706 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1339 20:54:40.456947 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1340 20:54:40.463402 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1341 20:54:40.470022 PCI: 00:19.0 assign_resources, bus 3 link: 0
1342 20:54:40.473574 PCI: 00:19.0 assign_resources, bus 3 link: 0
1343 20:54:40.483834 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1344 20:54:40.490246 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1345 20:54:40.499894 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1346 20:54:40.503395 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1347 20:54:40.512981 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1348 20:54:40.516438 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1349 20:54:40.526220 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1350 20:54:40.532568 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1351 20:54:40.539514 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1352 20:54:40.542822 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1353 20:54:40.552833 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1354 20:54:40.555892 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1355 20:54:40.559832 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1356 20:54:40.566373 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1357 20:54:40.569209 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1358 20:54:40.576026 LPC: Trying to open IO window from 800 size 1ff
1359 20:54:40.582298 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1360 20:54:40.592709 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1361 20:54:40.599138 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1362 20:54:40.608786 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1363 20:54:40.611866 DOMAIN: 0000 assign_resources, bus 0 link: 0
1364 20:54:40.618908 Root Device assign_resources, bus 0 link: 0
1365 20:54:40.619350 Done setting resources.
1366 20:54:40.625326 Show resources in subtree (Root Device)...After assigning values.
1367 20:54:40.631774 Root Device child on link 0 CPU_CLUSTER: 0
1368 20:54:40.634999 CPU_CLUSTER: 0 child on link 0 APIC: 00
1369 20:54:40.635439 APIC: 00
1370 20:54:40.638519 APIC: 03
1371 20:54:40.638988 APIC: 06
1372 20:54:40.639374 APIC: 01
1373 20:54:40.641989 APIC: 02
1374 20:54:40.642428 APIC: 07
1375 20:54:40.645266 APIC: 05
1376 20:54:40.645748 APIC: 04
1377 20:54:40.648450 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1378 20:54:40.658595 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1379 20:54:40.671429 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1380 20:54:40.671876 PCI: 00:00.0
1381 20:54:40.681595 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1382 20:54:40.691555 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1383 20:54:40.701891 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1384 20:54:40.707862 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1385 20:54:40.717502 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1386 20:54:40.727427 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1387 20:54:40.738249 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1388 20:54:40.747588 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1389 20:54:40.757761 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1390 20:54:40.764385 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1391 20:54:40.774177 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1392 20:54:40.784292 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1393 20:54:40.794181 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1394 20:54:40.804095 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1395 20:54:40.813926 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1396 20:54:40.820350 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1397 20:54:40.823822 PCI: 00:02.0
1398 20:54:40.833891 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1399 20:54:40.843123 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1400 20:54:40.853846 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1401 20:54:40.857145 PCI: 00:04.0
1402 20:54:40.857624 PCI: 00:08.0
1403 20:54:40.867055 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1404 20:54:40.870095 PCI: 00:12.0
1405 20:54:40.880347 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1406 20:54:40.882991 PCI: 00:14.0 child on link 0 USB0 port 0
1407 20:54:40.893264 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1408 20:54:40.899743 USB0 port 0 child on link 0 USB2 port 0
1409 20:54:40.900188 USB2 port 0
1410 20:54:40.903350 USB2 port 1
1411 20:54:40.903908 USB2 port 2
1412 20:54:40.905994 USB2 port 3
1413 20:54:40.906435 USB2 port 5
1414 20:54:40.909374 USB2 port 6
1415 20:54:40.909845 USB2 port 9
1416 20:54:40.912938 USB3 port 0
1417 20:54:40.916360 USB3 port 1
1418 20:54:40.916915 USB3 port 2
1419 20:54:40.919538 USB3 port 3
1420 20:54:40.919983 USB3 port 4
1421 20:54:40.922594 PCI: 00:14.2
1422 20:54:40.933053 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1423 20:54:40.942670 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1424 20:54:40.943121 PCI: 00:14.3
1425 20:54:40.952820 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1426 20:54:40.959533 PCI: 00:15.0 child on link 0 I2C: 01:15
1427 20:54:40.969047 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1428 20:54:40.969611 I2C: 01:15
1429 20:54:40.975641 PCI: 00:15.1 child on link 0 I2C: 02:5d
1430 20:54:40.985860 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1431 20:54:40.986312 I2C: 02:5d
1432 20:54:40.988875 GENERIC: 0.0
1433 20:54:40.989343 PCI: 00:16.0
1434 20:54:40.998940 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1435 20:54:41.002244 PCI: 00:17.0
1436 20:54:41.011935 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1437 20:54:41.021706 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1438 20:54:41.031674 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1439 20:54:41.041897 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1440 20:54:41.048268 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1441 20:54:41.058111 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1442 20:54:41.065268 PCI: 00:19.0 child on link 0 I2C: 03:1a
1443 20:54:41.075061 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1444 20:54:41.075665 I2C: 03:1a
1445 20:54:41.077938 I2C: 03:38
1446 20:54:41.078459 I2C: 03:39
1447 20:54:41.081557 I2C: 03:3a
1448 20:54:41.082145 I2C: 03:3b
1449 20:54:41.084613 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1450 20:54:41.088109
1451 20:54:41.094504 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1452 20:54:41.104405 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1453 20:54:41.117838 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1454 20:54:41.118419 PCI: 01:00.0
1455 20:54:41.127667 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1456 20:54:41.131099 PCI: 00:1e.0
1457 20:54:41.141239 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1458 20:54:41.150578 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1459 20:54:41.154094 PCI: 00:1e.2 child on link 0 SPI: 00
1460 20:54:41.167180 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1461 20:54:41.167268 SPI: 00
1462 20:54:41.170321 PCI: 00:1e.3 child on link 0 SPI: 01
1463 20:54:41.180424 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1464 20:54:41.183595 SPI: 01
1465 20:54:41.186548 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1466 20:54:41.196825 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1467 20:54:41.203775 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1468 20:54:41.206950 PNP: 0c09.0
1469 20:54:41.213196 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1470 20:54:41.216645 PCI: 00:1f.3
1471 20:54:41.226688 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1472 20:54:41.236747 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1473 20:54:41.240123 PCI: 00:1f.4
1474 20:54:41.246460 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1475 20:54:41.256430 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1476 20:54:41.260382
1477 20:54:41.260941 PCI: 00:1f.5
1478 20:54:41.270095 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1479 20:54:41.273408 Done allocating resources.
1480 20:54:41.279674 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1481 20:54:41.280123 Enabling resources...
1482 20:54:41.287400 PCI: 00:00.0 subsystem <- 8086/9b61
1483 20:54:41.287845 PCI: 00:00.0 cmd <- 06
1484 20:54:41.290316 PCI: 00:02.0 subsystem <- 8086/9b41
1485 20:54:41.294067 PCI: 00:02.0 cmd <- 03
1486 20:54:41.297005 PCI: 00:08.0 cmd <- 06
1487 20:54:41.300480 PCI: 00:12.0 subsystem <- 8086/02f9
1488 20:54:41.303628 PCI: 00:12.0 cmd <- 02
1489 20:54:41.307007 PCI: 00:14.0 subsystem <- 8086/02ed
1490 20:54:41.310634 PCI: 00:14.0 cmd <- 02
1491 20:54:41.313587 PCI: 00:14.2 cmd <- 02
1492 20:54:41.316765 PCI: 00:14.3 subsystem <- 8086/02f0
1493 20:54:41.317229 PCI: 00:14.3 cmd <- 02
1494 20:54:41.324406 PCI: 00:15.0 subsystem <- 8086/02e8
1495 20:54:41.324961 PCI: 00:15.0 cmd <- 02
1496 20:54:41.327278 PCI: 00:15.1 subsystem <- 8086/02e9
1497 20:54:41.330633 PCI: 00:15.1 cmd <- 02
1498 20:54:41.333900 PCI: 00:16.0 subsystem <- 8086/02e0
1499 20:54:41.337219 PCI: 00:16.0 cmd <- 02
1500 20:54:41.340460 PCI: 00:17.0 subsystem <- 8086/02d3
1501 20:54:41.344020 PCI: 00:17.0 cmd <- 03
1502 20:54:41.346887 PCI: 00:19.0 subsystem <- 8086/02c5
1503 20:54:41.350534 PCI: 00:19.0 cmd <- 02
1504 20:54:41.353552 PCI: 00:1d.0 bridge ctrl <- 0013
1505 20:54:41.356927 PCI: 00:1d.0 subsystem <- 8086/02b0
1506 20:54:41.360994 PCI: 00:1d.0 cmd <- 06
1507 20:54:41.363963 PCI: 00:1e.0 subsystem <- 8086/02a8
1508 20:54:41.367437 PCI: 00:1e.0 cmd <- 06
1509 20:54:41.370283 PCI: 00:1e.2 subsystem <- 8086/02aa
1510 20:54:41.370754 PCI: 00:1e.2 cmd <- 06
1511 20:54:41.373406
1512 20:54:41.376971 PCI: 00:1e.3 subsystem <- 8086/02ab
1513 20:54:41.377435 PCI: 00:1e.3 cmd <- 02
1514 20:54:41.383625 PCI: 00:1f.0 subsystem <- 8086/0284
1515 20:54:41.384096 PCI: 00:1f.0 cmd <- 407
1516 20:54:41.386561 PCI: 00:1f.3 subsystem <- 8086/02c8
1517 20:54:41.390066 PCI: 00:1f.3 cmd <- 02
1518 20:54:41.393583 PCI: 00:1f.4 subsystem <- 8086/02a3
1519 20:54:41.396682 PCI: 00:1f.4 cmd <- 03
1520 20:54:41.400118 PCI: 00:1f.5 subsystem <- 8086/02a4
1521 20:54:41.403042 PCI: 00:1f.5 cmd <- 406
1522 20:54:41.411988 PCI: 01:00.0 cmd <- 02
1523 20:54:41.417306 done.
1524 20:54:41.428332 ME: Version: 14.0.39.1367
1525 20:54:41.435202 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 10
1526 20:54:41.438664 Initializing devices...
1527 20:54:41.439150 Root Device init ...
1528 20:54:41.445255 Chrome EC: Set SMI mask to 0x0000000000000000
1529 20:54:41.448111 Chrome EC: clear events_b mask to 0x0000000000000000
1530 20:54:41.454915 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1531 20:54:41.461777 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1532 20:54:41.468260 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1533 20:54:41.472121 Chrome EC: Set WAKE mask to 0x0000000000000000
1534 20:54:41.475278 Root Device init finished in 35154 usecs
1535 20:54:41.478321 CPU_CLUSTER: 0 init ...
1536 20:54:41.481433 CPU_CLUSTER: 0 init finished in 2439 usecs
1537 20:54:41.484930
1538 20:54:41.489002 PCI: 00:00.0 init ...
1539 20:54:41.492723 CPU TDP: 15 Watts
1540 20:54:41.495717 CPU PL2 = 64 Watts
1541 20:54:41.499280 PCI: 00:00.0 init finished in 7072 usecs
1542 20:54:41.501912 PCI: 00:02.0 init ...
1543 20:54:41.505366 PCI: 00:02.0 init finished in 2252 usecs
1544 20:54:41.508886 PCI: 00:08.0 init ...
1545 20:54:41.511900 PCI: 00:08.0 init finished in 2252 usecs
1546 20:54:41.515365 PCI: 00:12.0 init ...
1547 20:54:41.518765 PCI: 00:12.0 init finished in 2253 usecs
1548 20:54:41.522183 PCI: 00:14.0 init ...
1549 20:54:41.525364 PCI: 00:14.0 init finished in 2252 usecs
1550 20:54:41.528474 PCI: 00:14.2 init ...
1551 20:54:41.531917 PCI: 00:14.2 init finished in 2251 usecs
1552 20:54:41.534913 PCI: 00:14.3 init ...
1553 20:54:41.538783 PCI: 00:14.3 init finished in 2268 usecs
1554 20:54:41.541831 PCI: 00:15.0 init ...
1555 20:54:41.545360 DW I2C bus 0 at 0xd121f000 (400 KHz)
1556 20:54:41.548223 PCI: 00:15.0 init finished in 5977 usecs
1557 20:54:41.552326 PCI: 00:15.1 init ...
1558 20:54:41.555422 DW I2C bus 1 at 0xd1220000 (400 KHz)
1559 20:54:41.558848 PCI: 00:15.1 init finished in 5975 usecs
1560 20:54:41.561784
1561 20:54:41.562363 PCI: 00:16.0 init ...
1562 20:54:41.568553 PCI: 00:16.0 init finished in 2253 usecs
1563 20:54:41.569067 PCI: 00:19.0 init ...
1564 20:54:41.571465
1565 20:54:41.575130 DW I2C bus 4 at 0xd1222000 (400 KHz)
1566 20:54:41.578135 PCI: 00:19.0 init finished in 5977 usecs
1567 20:54:41.581731 PCI: 00:1d.0 init ...
1568 20:54:41.584803 Initializing PCH PCIe bridge.
1569 20:54:41.588409 PCI: 00:1d.0 init finished in 5275 usecs
1570 20:54:41.591416 PCI: 00:1f.0 init ...
1571 20:54:41.595014 IOAPIC: Initializing IOAPIC at 0xfec00000
1572 20:54:41.601738 IOAPIC: Bootstrap Processor Local APIC = 0x00
1573 20:54:41.602176 IOAPIC: ID = 0x02
1574 20:54:41.604656 IOAPIC: Dumping registers
1575 20:54:41.608200 reg 0x0000: 0x02000000
1576 20:54:41.611679 reg 0x0001: 0x00770020
1577 20:54:41.612115 reg 0x0002: 0x00000000
1578 20:54:41.618122 PCI: 00:1f.0 init finished in 23533 usecs
1579 20:54:41.621500 PCI: 00:1f.4 init ...
1580 20:54:41.624411 PCI: 00:1f.4 init finished in 2261 usecs
1581 20:54:41.635012 PCI: 01:00.0 init ...
1582 20:54:41.638404 PCI: 01:00.0 init finished in 2243 usecs
1583 20:54:41.642829 PNP: 0c09.0 init ...
1584 20:54:41.646112 Google Chrome EC uptime: 11.098 seconds
1585 20:54:41.652468 Google Chrome AP resets since EC boot: 0
1586 20:54:41.655874 Google Chrome most recent AP reset causes:
1587 20:54:41.662429 Google Chrome EC reset flags at last EC boot: reset-pin
1588 20:54:41.665788 PNP: 0c09.0 init finished in 20642 usecs
1589 20:54:41.669183 Devices initialized
1590 20:54:41.669723 Show all devs... After init.
1591 20:54:41.672594
1592 20:54:41.673135 Root Device: enabled 1
1593 20:54:41.676215 CPU_CLUSTER: 0: enabled 1
1594 20:54:41.679351 DOMAIN: 0000: enabled 1
1595 20:54:41.679906 APIC: 00: enabled 1
1596 20:54:41.682438 PCI: 00:00.0: enabled 1
1597 20:54:41.686082 PCI: 00:02.0: enabled 1
1598 20:54:41.688974 PCI: 00:04.0: enabled 0
1599 20:54:41.689682 PCI: 00:05.0: enabled 0
1600 20:54:41.692623 PCI: 00:12.0: enabled 1
1601 20:54:41.695603 PCI: 00:12.5: enabled 0
1602 20:54:41.696047 PCI: 00:12.6: enabled 0
1603 20:54:41.699167
1604 20:54:41.699606 PCI: 00:14.0: enabled 1
1605 20:54:41.702043 PCI: 00:14.1: enabled 0
1606 20:54:41.705750 PCI: 00:14.3: enabled 1
1607 20:54:41.706248 PCI: 00:14.5: enabled 0
1608 20:54:41.709118 PCI: 00:15.0: enabled 1
1609 20:54:41.712148 PCI: 00:15.1: enabled 1
1610 20:54:41.715706 PCI: 00:15.2: enabled 0
1611 20:54:41.716190 PCI: 00:15.3: enabled 0
1612 20:54:41.718691 PCI: 00:16.0: enabled 1
1613 20:54:41.722261 PCI: 00:16.1: enabled 0
1614 20:54:41.725650 PCI: 00:16.2: enabled 0
1615 20:54:41.726179 PCI: 00:16.3: enabled 0
1616 20:54:41.728383 PCI: 00:16.4: enabled 0
1617 20:54:41.732085 PCI: 00:16.5: enabled 0
1618 20:54:41.735352 PCI: 00:17.0: enabled 1
1619 20:54:41.735792 PCI: 00:19.0: enabled 1
1620 20:54:41.738473 PCI: 00:19.1: enabled 0
1621 20:54:41.741824 PCI: 00:19.2: enabled 0
1622 20:54:41.742266 PCI: 00:1a.0: enabled 0
1623 20:54:41.745259
1624 20:54:41.745761 PCI: 00:1c.0: enabled 0
1625 20:54:41.748385 PCI: 00:1c.1: enabled 0
1626 20:54:41.751903 PCI: 00:1c.2: enabled 0
1627 20:54:41.752474 PCI: 00:1c.3: enabled 0
1628 20:54:41.755021 PCI: 00:1c.4: enabled 0
1629 20:54:41.758294 PCI: 00:1c.5: enabled 0
1630 20:54:41.761754 PCI: 00:1c.6: enabled 0
1631 20:54:41.762194 PCI: 00:1c.7: enabled 0
1632 20:54:41.765061 PCI: 00:1d.0: enabled 1
1633 20:54:41.768694 PCI: 00:1d.1: enabled 0
1634 20:54:41.772081 PCI: 00:1d.2: enabled 0
1635 20:54:41.772597 PCI: 00:1d.3: enabled 0
1636 20:54:41.775106 PCI: 00:1d.4: enabled 0
1637 20:54:41.778096 PCI: 00:1d.5: enabled 0
1638 20:54:41.781725 PCI: 00:1e.0: enabled 1
1639 20:54:41.782184 PCI: 00:1e.1: enabled 0
1640 20:54:41.784571 PCI: 00:1e.2: enabled 1
1641 20:54:41.788025 PCI: 00:1e.3: enabled 1
1642 20:54:41.788664 PCI: 00:1f.0: enabled 1
1643 20:54:41.791591
1644 20:54:41.792028 PCI: 00:1f.1: enabled 0
1645 20:54:41.794663 PCI: 00:1f.2: enabled 0
1646 20:54:41.798146 PCI: 00:1f.3: enabled 1
1647 20:54:41.798578 PCI: 00:1f.4: enabled 1
1648 20:54:41.801280 PCI: 00:1f.5: enabled 1
1649 20:54:41.804973 PCI: 00:1f.6: enabled 0
1650 20:54:41.808042 USB0 port 0: enabled 1
1651 20:54:41.808477 I2C: 01:15: enabled 1
1652 20:54:41.811442 I2C: 02:5d: enabled 1
1653 20:54:41.814425 GENERIC: 0.0: enabled 1
1654 20:54:41.814862 I2C: 03:1a: enabled 1
1655 20:54:41.817884 I2C: 03:38: enabled 1
1656 20:54:41.821461 I2C: 03:39: enabled 1
1657 20:54:41.821964 I2C: 03:3a: enabled 1
1658 20:54:41.824248 I2C: 03:3b: enabled 1
1659 20:54:41.827801 PCI: 00:00.0: enabled 1
1660 20:54:41.828236 SPI: 00: enabled 1
1661 20:54:41.830833 SPI: 01: enabled 1
1662 20:54:41.834267 PNP: 0c09.0: enabled 1
1663 20:54:41.834703 USB2 port 0: enabled 1
1664 20:54:41.837794 USB2 port 1: enabled 1
1665 20:54:41.840683 USB2 port 2: enabled 0
1666 20:54:41.844225 USB2 port 3: enabled 0
1667 20:54:41.844667 USB2 port 5: enabled 0
1668 20:54:41.847457 USB2 port 6: enabled 1
1669 20:54:41.850770 USB2 port 9: enabled 1
1670 20:54:41.851289 USB3 port 0: enabled 1
1671 20:54:41.854076 USB3 port 1: enabled 1
1672 20:54:41.857551 USB3 port 2: enabled 1
1673 20:54:41.858011 USB3 port 3: enabled 1
1674 20:54:41.860422
1675 20:54:41.860866 USB3 port 4: enabled 0
1676 20:54:41.864001 APIC: 03: enabled 1
1677 20:54:41.864448 APIC: 06: enabled 1
1678 20:54:41.867321 APIC: 01: enabled 1
1679 20:54:41.870805 APIC: 02: enabled 1
1680 20:54:41.871251 APIC: 07: enabled 1
1681 20:54:41.874013 APIC: 05: enabled 1
1682 20:54:41.877052 APIC: 04: enabled 1
1683 20:54:41.877526 PCI: 00:08.0: enabled 1
1684 20:54:41.880670 PCI: 00:14.2: enabled 1
1685 20:54:41.883601 PCI: 01:00.0: enabled 1
1686 20:54:41.887115 Disabling ACPI via APMC:
1687 20:54:41.890751 done.
1688 20:54:41.893759 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1689 20:54:41.897272 ELOG: NV offset 0xaf0000 size 0x4000
1690 20:54:41.904826 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1691 20:54:41.911224 ELOG: Event(17) added with size 13 at 2023-01-18 20:54:41 UTC
1692 20:54:41.917291 ELOG: Event(92) added with size 9 at 2023-01-18 20:54:41 UTC
1693 20:54:41.923759 ELOG: Event(93) added with size 9 at 2023-01-18 20:54:41 UTC
1694 20:54:41.930715 ELOG: Event(9A) added with size 9 at 2023-01-18 20:54:41 UTC
1695 20:54:41.937332 ELOG: Event(9E) added with size 10 at 2023-01-18 20:54:41 UTC
1696 20:54:41.944132 ELOG: Event(9F) added with size 14 at 2023-01-18 20:54:41 UTC
1697 20:54:41.946999 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1698 20:54:41.954872 ELOG: Event(A1) added with size 10 at 2023-01-18 20:54:41 UTC
1699 20:54:41.964875 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1700 20:54:41.971618 ELOG: Event(A0) added with size 9 at 2023-01-18 20:54:41 UTC
1701 20:54:41.975074 elog_add_boot_reason: Logged dev mode boot
1702 20:54:41.975596 Finalize devices...
1703 20:54:41.978107 PCI: 00:17.0 final
1704 20:54:41.981512 Devices finalized
1705 20:54:41.984570 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1706 20:54:41.991594 BS: BS_POST_DEVICE times (ms): entry 2 run 0 exit 0
1707 20:54:41.994472 ME: HFSTS1 : 0x90000245
1708 20:54:41.998079 ME: HFSTS2 : 0x3B850126
1709 20:54:42.004562 ME: HFSTS3 : 0x00000020
1710 20:54:42.007646 ME: HFSTS4 : 0x00004800
1711 20:54:42.011120 ME: HFSTS5 : 0x00000000
1712 20:54:42.014317 ME: HFSTS6 : 0x40400006
1713 20:54:42.017754 ME: Manufacturing Mode : NO
1714 20:54:42.021348 ME: FW Partition Table : OK
1715 20:54:42.024335 ME: Bringup Loader Failure : NO
1716 20:54:42.027726 ME: Firmware Init Complete : YES
1717 20:54:42.031138 ME: Boot Options Present : NO
1718 20:54:42.034276 ME: Update In Progress : NO
1719 20:54:42.037694 ME: D0i3 Support : YES
1720 20:54:42.041135 ME: Low Power State Enabled : NO
1721 20:54:42.044524 ME: CPU Replaced : NO
1722 20:54:42.047521 ME: CPU Replacement Valid : YES
1723 20:54:42.050984 ME: Current Working State : 5
1724 20:54:42.054434 ME: Current Operation State : 1
1725 20:54:42.057421 ME: Current Operation Mode : 0
1726 20:54:42.060853 ME: Error Code : 0
1727 20:54:42.064404 ME: CPU Debug Disabled : YES
1728 20:54:42.067451 ME: TXT Support : NO
1729 20:54:42.073829 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1730 20:54:42.080891 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1731 20:54:42.081409 CBFS @ c08000 size 3f8000
1732 20:54:42.086964 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1733 20:54:42.090349 CBFS: Locating 'fallback/dsdt.aml'
1734 20:54:42.093815 CBFS: Found @ offset 10bb80 size 3fa5
1735 20:54:42.100363 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1736 20:54:42.104081 CBFS @ c08000 size 3f8000
1737 20:54:42.107008 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1738 20:54:42.110583 CBFS: Locating 'fallback/slic'
1739 20:54:42.115242 CBFS: 'fallback/slic' not found.
1740 20:54:42.121826 ACPI: Writing ACPI tables at 99b3e000.
1741 20:54:42.121911 ACPI: * FACS
1742 20:54:42.125420 ACPI: * DSDT
1743 20:54:42.128401 Ramoops buffer: 0x100000@0x99a3d000.
1744 20:54:42.131739 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1745 20:54:42.138339 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1746 20:54:42.141165 Google Chrome EC: version:
1747 20:54:42.144778 ro: helios_v2.0.2659-56403530b
1748 20:54:42.148269 rw: helios_v2.0.2849-c41de27e7d
1749 20:54:42.148395 running image: 1
1750 20:54:42.152666 ACPI: * FADT
1751 20:54:42.152805 SCI is IRQ9
1752 20:54:42.156255 ACPI: added table 1/32, length now 40
1753 20:54:42.159239
1754 20:54:42.159433 ACPI: * SSDT
1755 20:54:42.162752 Found 1 CPU(s) with 8 core(s) each.
1756 20:54:42.165709 Error: Could not locate 'wifi_sar' in VPD.
1757 20:54:42.172361 Checking CBFS for default SAR values
1758 20:54:42.175889 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1759 20:54:42.179398 CBFS @ c08000 size 3f8000
1760 20:54:42.185954 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1761 20:54:42.188863 CBFS: Locating 'wifi_sar_defaults.hex'
1762 20:54:42.192484 CBFS: Found @ offset 5fac0 size 77
1763 20:54:42.195633 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1764 20:54:42.199180 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1765 20:54:42.202343
1766 20:54:42.205874 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1767 20:54:42.212524 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1768 20:54:42.215552 failed to find key in VPD: dsm_calib_r0_0
1769 20:54:42.222463 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1770 20:54:42.225533
1771 20:54:42.229079 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1772 20:54:42.231925 failed to find key in VPD: dsm_calib_r0_1
1773 20:54:42.242226 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1774 20:54:42.248723 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1775 20:54:42.251782 failed to find key in VPD: dsm_calib_r0_2
1776 20:54:42.261942 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1777 20:54:42.265397 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1778 20:54:42.271928 failed to find key in VPD: dsm_calib_r0_3
1779 20:54:42.278188 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1780 20:54:42.284754 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1781 20:54:42.288264 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1782 20:54:42.291940 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1783 20:54:42.295529 EC returned error result code 1
1784 20:54:42.299425 EC returned error result code 1
1785 20:54:42.303573 EC returned error result code 1
1786 20:54:42.310122 PS2K: Bad resp from EC. Vivaldi disabled!
1787 20:54:42.313253 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1788 20:54:42.319960 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1789 20:54:42.326400 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1790 20:54:42.330112 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1791 20:54:42.336367 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1792 20:54:42.343047 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1793 20:54:42.346639 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1794 20:54:42.353146 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1795 20:54:42.356343 ACPI: added table 2/32, length now 44
1796 20:54:42.359635 ACPI: * MCFG
1797 20:54:42.362978 ACPI: added table 3/32, length now 48
1798 20:54:42.365958 ACPI: * TPM2
1799 20:54:42.366399 TPM2 log created at 99a2d000
1800 20:54:42.372539 ACPI: added table 4/32, length now 52
1801 20:54:42.372980 ACPI: * MADT
1802 20:54:42.373330 SCI is IRQ9
1803 20:54:42.376214
1804 20:54:42.379573 ACPI: added table 5/32, length now 56
1805 20:54:42.380011 current = 99b43ac0
1806 20:54:42.382947 ACPI: * DMAR
1807 20:54:42.385696 ACPI: added table 6/32, length now 60
1808 20:54:42.389515 ACPI: * IGD OpRegion
1809 20:54:42.389970 GMA: Found VBT in CBFS
1810 20:54:42.392809 GMA: Found valid VBT in CBFS
1811 20:54:42.395902 ACPI: added table 7/32, length now 64
1812 20:54:42.399150 ACPI: * HPET
1813 20:54:42.402628 ACPI: added table 8/32, length now 68
1814 20:54:42.403067 ACPI: done.
1815 20:54:42.405655 ACPI tables: 31744 bytes.
1816 20:54:42.409600 smbios_write_tables: 99a2c000
1817 20:54:42.413186 EC returned error result code 3
1818 20:54:42.416241 Couldn't obtain OEM name from CBI
1819 20:54:42.419790 Create SMBIOS type 17
1820 20:54:42.422898 PCI: 00:00.0 (Intel Cannonlake)
1821 20:54:42.426013 PCI: 00:14.3 (Intel WiFi)
1822 20:54:42.426497 SMBIOS tables: 939 bytes.
1823 20:54:42.429576
1824 20:54:42.433050 Writing table forward entry at 0x00000500
1825 20:54:42.439063 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1826 20:54:42.442272 Writing coreboot table at 0x99b62000
1827 20:54:42.446099 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1828 20:54:42.449578
1829 20:54:42.452815 1. 0000000000001000-000000000009ffff: RAM
1830 20:54:42.456115 2. 00000000000a0000-00000000000fffff: RESERVED
1831 20:54:42.463022 3. 0000000000100000-0000000099a2bfff: RAM
1832 20:54:42.465957 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1833 20:54:42.472907 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1834 20:54:42.479128 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1835 20:54:42.482514 7. 000000009a000000-000000009f7fffff: RESERVED
1836 20:54:42.485909 8. 00000000e0000000-00000000efffffff: RESERVED
1837 20:54:42.492352 9. 00000000fc000000-00000000fc000fff: RESERVED
1838 20:54:42.495535 10. 00000000fe000000-00000000fe00ffff: RESERVED
1839 20:54:42.502592 11. 00000000fed10000-00000000fed17fff: RESERVED
1840 20:54:42.505596 12. 00000000fed80000-00000000fed83fff: RESERVED
1841 20:54:42.512381 13. 00000000fed90000-00000000fed91fff: RESERVED
1842 20:54:42.515750 14. 00000000feda0000-00000000feda1fff: RESERVED
1843 20:54:42.518699 15. 0000000100000000-000000045e7fffff: RAM
1844 20:54:42.525317 Graphics framebuffer located at 0xc0000000
1845 20:54:42.529176 Passing 5 GPIOs to payload:
1846 20:54:42.532742 NAME | PORT | POLARITY | VALUE
1847 20:54:42.538762 write protect | undefined | high | low
1848 20:54:42.541974 lid | undefined | high | high
1849 20:54:42.548949 power | undefined | high | low
1850 20:54:42.551809 oprom | undefined | high | low
1851 20:54:42.555364
1852 20:54:42.558354 EC in RW | 0x000000cb | high | low
1853 20:54:42.558799 Board ID: 4
1854 20:54:42.565397 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1855 20:54:42.568692 CBFS @ c08000 size 3f8000
1856 20:54:42.574857 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1857 20:54:42.578215 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6baa
1858 20:54:42.581640 coreboot table: 1492 bytes.
1859 20:54:42.584886 IMD ROOT 0. 99fff000 00001000
1860 20:54:42.588393 IMD SMALL 1. 99ffe000 00001000
1861 20:54:42.591511 FSP MEMORY 2. 99c4e000 003b0000
1862 20:54:42.595026 CONSOLE 3. 99c2e000 00020000
1863 20:54:42.597692 FMAP 4. 99c2d000 0000054e
1864 20:54:42.601284 TIME STAMP 5. 99c2c000 00000910
1865 20:54:42.604255 VBOOT WORK 6. 99c18000 00014000
1866 20:54:42.607773 MRC DATA 7. 99c16000 00001958
1867 20:54:42.610863 ROMSTG STCK 8. 99c15000 00001000
1868 20:54:42.614420 AFTER CAR 9. 99c0b000 0000a000
1869 20:54:42.617765 RAMSTAGE 10. 99baf000 0005c000
1870 20:54:42.620839 REFCODE 11. 99b7a000 00035000
1871 20:54:42.624428 SMM BACKUP 12. 99b6a000 00010000
1872 20:54:42.627628 COREBOOT 13. 99b62000 00008000
1873 20:54:42.631067 ACPI 14. 99b3e000 00024000
1874 20:54:42.634087 ACPI GNVS 15. 99b3d000 00001000
1875 20:54:42.637648 RAMOOPS 16. 99a3d000 00100000
1876 20:54:42.641208 TPM2 TCGLOG17. 99a2d000 00010000
1877 20:54:42.644592 SMBIOS 18. 99a2c000 00000800
1878 20:54:42.647457 IMD small region:
1879 20:54:42.651058 IMD ROOT 0. 99ffec00 00000400
1880 20:54:42.654023 FSP RUNTIME 1. 99ffebe0 00000004
1881 20:54:42.657340 EC HOSTEVENT 2. 99ffebc0 00000008
1882 20:54:42.660855 POWER STATE 3. 99ffeb80 00000040
1883 20:54:42.664271 ROMSTAGE 4. 99ffeb60 00000004
1884 20:54:42.667379 MEM INFO 5. 99ffe9a0 000001b9
1885 20:54:42.670822 VPD 6. 99ffe920 0000006c
1886 20:54:42.674342 MTRR: Physical address space:
1887 20:54:42.680545 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1888 20:54:42.687674 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1889 20:54:42.694173 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1890 20:54:42.701020 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1891 20:54:42.707370 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1892 20:54:42.713934 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1893 20:54:42.716958 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1894 20:54:42.723688 MTRR: Fixed MSR 0x250 0x0606060606060606
1895 20:54:42.726929 MTRR: Fixed MSR 0x258 0x0606060606060606
1896 20:54:42.730305 MTRR: Fixed MSR 0x259 0x0000000000000000
1897 20:54:42.733391 MTRR: Fixed MSR 0x268 0x0606060606060606
1898 20:54:42.740087 MTRR: Fixed MSR 0x269 0x0606060606060606
1899 20:54:42.743562 MTRR: Fixed MSR 0x26a 0x0606060606060606
1900 20:54:42.746811 MTRR: Fixed MSR 0x26b 0x0606060606060606
1901 20:54:42.749901 MTRR: Fixed MSR 0x26c 0x0606060606060606
1902 20:54:42.756368 MTRR: Fixed MSR 0x26d 0x0606060606060606
1903 20:54:42.759996 MTRR: Fixed MSR 0x26e 0x0606060606060606
1904 20:54:42.763030 MTRR: Fixed MSR 0x26f 0x0606060606060606
1905 20:54:42.766526 call enable_fixed_mtrr()
1906 20:54:42.770134 CPU physical address size: 39 bits
1907 20:54:42.773177 MTRR: default type WB/UC MTRR counts: 6/8.
1908 20:54:42.776695 MTRR: WB selected as default type.
1909 20:54:42.783446 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1910 20:54:42.790184 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1911 20:54:42.796881 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1912 20:54:42.803498 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1913 20:54:42.810137 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1914 20:54:42.816463 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1915 20:54:42.820033 MTRR: Fixed MSR 0x250 0x0606060606060606
1916 20:54:42.826962 MTRR: Fixed MSR 0x258 0x0606060606060606
1917 20:54:42.829718 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 20:54:42.833085 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 20:54:42.836480 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 20:54:42.839577 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 20:54:42.846191 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 20:54:42.849411 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 20:54:42.853056 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 20:54:42.855868 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 20:54:42.862718 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 20:54:42.863173
1927 20:54:42.863529 MTRR check
1928 20:54:42.865999 Fixed MTRRs : Enabled
1929 20:54:42.869555 Variable MTRRs: Enabled
1930 20:54:42.870001
1931 20:54:42.870358 call enable_fixed_mtrr()
1932 20:54:42.872504
1933 20:54:42.876145 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1934 20:54:42.879432 CPU physical address size: 39 bits
1935 20:54:42.886256 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1936 20:54:42.889145 MTRR: Fixed MSR 0x250 0x0606060606060606
1937 20:54:42.892384 MTRR: Fixed MSR 0x250 0x0606060606060606
1938 20:54:42.898802 MTRR: Fixed MSR 0x258 0x0606060606060606
1939 20:54:42.902345 MTRR: Fixed MSR 0x259 0x0000000000000000
1940 20:54:42.905547 MTRR: Fixed MSR 0x268 0x0606060606060606
1941 20:54:42.909570 MTRR: Fixed MSR 0x269 0x0606060606060606
1942 20:54:42.912200 MTRR: Fixed MSR 0x26a 0x0606060606060606
1943 20:54:42.919187 MTRR: Fixed MSR 0x26b 0x0606060606060606
1944 20:54:42.922025 MTRR: Fixed MSR 0x26c 0x0606060606060606
1945 20:54:42.925453 MTRR: Fixed MSR 0x26d 0x0606060606060606
1946 20:54:42.928411 MTRR: Fixed MSR 0x26e 0x0606060606060606
1947 20:54:42.935463 MTRR: Fixed MSR 0x26f 0x0606060606060606
1948 20:54:42.938582 MTRR: Fixed MSR 0x258 0x0606060606060606
1949 20:54:42.942016 MTRR: Fixed MSR 0x259 0x0000000000000000
1950 20:54:42.948964 MTRR: Fixed MSR 0x268 0x0606060606060606
1951 20:54:42.951615 MTRR: Fixed MSR 0x269 0x0606060606060606
1952 20:54:42.955357 MTRR: Fixed MSR 0x26a 0x0606060606060606
1953 20:54:42.958407 MTRR: Fixed MSR 0x26b 0x0606060606060606
1954 20:54:42.962077 MTRR: Fixed MSR 0x26c 0x0606060606060606
1955 20:54:42.968813 MTRR: Fixed MSR 0x26d 0x0606060606060606
1956 20:54:42.971388 MTRR: Fixed MSR 0x26e 0x0606060606060606
1957 20:54:42.975422 MTRR: Fixed MSR 0x26f 0x0606060606060606
1958 20:54:42.977752 call enable_fixed_mtrr()
1959 20:54:42.981190 call enable_fixed_mtrr()
1960 20:54:42.984885 CPU physical address size: 39 bits
1961 20:54:42.987796 CPU physical address size: 39 bits
1962 20:54:42.991047 MTRR: Fixed MSR 0x250 0x0606060606060606
1963 20:54:42.994329 MTRR: Fixed MSR 0x250 0x0606060606060606
1964 20:54:43.001161 MTRR: Fixed MSR 0x258 0x0606060606060606
1965 20:54:43.004542 MTRR: Fixed MSR 0x259 0x0000000000000000
1966 20:54:43.007597 MTRR: Fixed MSR 0x268 0x0606060606060606
1967 20:54:43.011157 MTRR: Fixed MSR 0x269 0x0606060606060606
1968 20:54:43.017323 MTRR: Fixed MSR 0x26a 0x0606060606060606
1969 20:54:43.020873 MTRR: Fixed MSR 0x26b 0x0606060606060606
1970 20:54:43.024554 MTRR: Fixed MSR 0x26c 0x0606060606060606
1971 20:54:43.027620 MTRR: Fixed MSR 0x26d 0x0606060606060606
1972 20:54:43.034149 MTRR: Fixed MSR 0x26e 0x0606060606060606
1973 20:54:43.037565 MTRR: Fixed MSR 0x26f 0x0606060606060606
1974 20:54:43.040734 MTRR: Fixed MSR 0x258 0x0606060606060606
1975 20:54:43.044103 call enable_fixed_mtrr()
1976 20:54:43.047106 MTRR: Fixed MSR 0x259 0x0000000000000000
1977 20:54:43.050595 MTRR: Fixed MSR 0x268 0x0606060606060606
1978 20:54:43.057290 MTRR: Fixed MSR 0x269 0x0606060606060606
1979 20:54:43.060585 MTRR: Fixed MSR 0x26a 0x0606060606060606
1980 20:54:43.064031 MTRR: Fixed MSR 0x26b 0x0606060606060606
1981 20:54:43.067775 MTRR: Fixed MSR 0x26c 0x0606060606060606
1982 20:54:43.073871 MTRR: Fixed MSR 0x26d 0x0606060606060606
1983 20:54:43.076908 MTRR: Fixed MSR 0x26e 0x0606060606060606
1984 20:54:43.080729 MTRR: Fixed MSR 0x26f 0x0606060606060606
1985 20:54:43.083457 CPU physical address size: 39 bits
1986 20:54:43.087409 call enable_fixed_mtrr()
1987 20:54:43.090498 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 20:54:43.097210 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 20:54:43.100579 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 20:54:43.103860 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 20:54:43.106987 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 20:54:43.110510 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 20:54:43.117137 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 20:54:43.120301 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 20:54:43.123670 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 20:54:43.126711 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 20:54:43.133541 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 20:54:43.136692 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 20:54:43.139765 call enable_fixed_mtrr()
2000 20:54:43.143220 MTRR: Fixed MSR 0x258 0x0606060606060606
2001 20:54:43.147159 MTRR: Fixed MSR 0x259 0x0000000000000000
2002 20:54:43.150197 MTRR: Fixed MSR 0x268 0x0606060606060606
2003 20:54:43.156492 MTRR: Fixed MSR 0x269 0x0606060606060606
2004 20:54:43.159788 MTRR: Fixed MSR 0x26a 0x0606060606060606
2005 20:54:43.163302 MTRR: Fixed MSR 0x26b 0x0606060606060606
2006 20:54:43.166572 MTRR: Fixed MSR 0x26c 0x0606060606060606
2007 20:54:43.172888 MTRR: Fixed MSR 0x26d 0x0606060606060606
2008 20:54:43.176577 MTRR: Fixed MSR 0x26e 0x0606060606060606
2009 20:54:43.180337 MTRR: Fixed MSR 0x26f 0x0606060606060606
2010 20:54:43.183088 CPU physical address size: 39 bits
2011 20:54:43.186457 call enable_fixed_mtrr()
2012 20:54:43.190008 CPU physical address size: 39 bits
2013 20:54:43.193329 CBFS @ c08000 size 3f8000
2014 20:54:43.199678 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
2015 20:54:43.202961 CBFS: Locating 'fallback/payload'
2016 20:54:43.206508 CPU physical address size: 39 bits
2017 20:54:43.210010 CBFS: Found @ offset 1c96c0 size 3f798
2018 20:54:43.213062 Checking segment from ROM address 0xffdd16f8
2019 20:54:43.219782 Checking segment from ROM address 0xffdd1714
2020 20:54:43.222806 Loading segment from ROM address 0xffdd16f8
2021 20:54:43.226608 code (compression=0)
2022 20:54:43.233218 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
2023 20:54:43.242786 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
2024 20:54:43.243395 it's not compressed!
2025 20:54:43.336905 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
2026 20:54:43.343112 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
2027 20:54:43.346080 Loading segment from ROM address 0xffdd1714
2028 20:54:43.349605 Entry Point 0x30000000
2029 20:54:43.353018 Loaded segments
2030 20:54:43.358648 Finalizing chipset.
2031 20:54:43.361945 Finalizing SMM.
2032 20:54:43.365432 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2033 20:54:43.368421 mp_park_aps done after 0 msecs.
2034 20:54:43.375376 Jumping to boot code at 30000000(99b62000)
2035 20:54:43.381706 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2036 20:54:43.382256
2037 20:54:43.382675
2038 20:54:43.383065
2039 20:54:43.384973 Starting depthcharge on Helios...
2040 20:54:43.385426
2041 20:54:43.386621 end: 2.2.3 depthcharge-start (duration 00:00:18) [common]
2042 20:54:43.387247 start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
2043 20:54:43.387724 Setting prompt string to ['hatch:']
2044 20:54:43.388255 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
2045 20:54:43.395132 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2046 20:54:43.395576
2047 20:54:43.401255 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2048 20:54:43.401768
2049 20:54:43.408443 board_setup: Info: eMMC controller not present; skipping
2050 20:54:43.408901
2051 20:54:43.411373 New NVMe Controller 0x30053ac0 @ 00:1d:00
2052 20:54:43.411828
2053 20:54:43.418056 board_setup: Info: SDHCI controller not present; skipping
2054 20:54:43.418494
2055 20:54:43.424517 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2056 20:54:43.425047
2057 20:54:43.425399 Wipe memory regions:
2058 20:54:43.425765
2059 20:54:43.428074 [0x00000000001000, 0x000000000a0000)
2060 20:54:43.428534
2061 20:54:43.431076 [0x00000000100000, 0x00000030000000)
2062 20:54:43.434543
2063 20:54:43.501196 [0x00000030657430, 0x00000099a2c000)
2064 20:54:43.501876
2065 20:54:43.641517 [0x00000100000000, 0x0000045e800000)
2066 20:54:43.642048
2067 20:54:45.024328 R8152: Initializing
2068 20:54:45.024916
2069 20:54:45.026989 Version 9 (ocp_data = 6010)
2070 20:54:45.027471
2071 20:54:45.031759 R8152: Done initializing
2072 20:54:45.032346
2073 20:54:45.034486 Adding net device
2074 20:54:45.034972
2075 20:54:45.643944 R8152: Initializing
2076 20:54:45.644474
2077 20:54:45.646797 Version 6 (ocp_data = 5c30)
2078 20:54:45.647227
2079 20:54:45.650271 R8152: Done initializing
2080 20:54:45.650751
2081 20:54:45.653563 net_add_device: Attemp to include the same device
2082 20:54:45.657259
2083 20:54:45.664801 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2084 20:54:45.665264
2085 20:54:45.665748
2086 20:54:45.666088
2087 20:54:45.666848 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2089 20:54:45.768472 hatch: tftpboot 192.168.201.1 8785147/tftp-deploy-5dbg8a5g/kernel/bzImage 8785147/tftp-deploy-5dbg8a5g/kernel/cmdline 8785147/tftp-deploy-5dbg8a5g/ramdisk/ramdisk.cpio.gz
2090 20:54:45.769117 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2091 20:54:45.769695 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
2092 20:54:45.774503 tftpboot 192.168.201.1 8785147/tftp-deploy-5dbg8a5g/kernel/bzImy-5dbg8a5g/kernel/cmdline 8785147/tftp-deploy-5dbg8a5g/ramdisk/ramdisk.cpio.gz
2093 20:54:45.775050
2094 20:54:45.775400 Waiting for link
2095 20:54:45.775726
2096 20:54:45.974844 done.
2097 20:54:45.975354
2098 20:54:45.975712 MAC: 00:24:32:50:1a:5f
2099 20:54:45.976048
2100 20:54:45.978096 Sending DHCP discover... done.
2101 20:54:45.978598
2102 20:54:45.981636 Waiting for reply... done.
2103 20:54:45.982152
2104 20:54:45.984561 Sending DHCP request... done.
2105 20:54:45.984952
2106 20:54:45.991317 Waiting for reply... done.
2107 20:54:45.991853
2108 20:54:45.992219 My ip is 192.168.201.21
2109 20:54:45.992554
2110 20:54:45.995038 The DHCP server ip is 192.168.201.1
2111 20:54:45.995562
2112 20:54:46.001574 TFTP server IP predefined by user: 192.168.201.1
2113 20:54:46.002114
2114 20:54:46.008113 Bootfile predefined by user: 8785147/tftp-deploy-5dbg8a5g/kernel/bzImage
2115 20:54:46.008541
2116 20:54:46.011166 Sending tftp read request... done.
2117 20:54:46.011715
2118 20:54:46.014725 Waiting for the transfer...
2119 20:54:46.015213
2120 20:54:46.687317 00000000 ################################################################
2121 20:54:46.687934
2122 20:54:47.366341 00080000 ################################################################
2123 20:54:47.366887
2124 20:54:48.055127 00100000 ################################################################
2125 20:54:48.055697
2126 20:54:48.746943 00180000 ################################################################
2127 20:54:48.747450
2128 20:54:49.432952 00200000 ################################################################
2129 20:54:49.433572
2130 20:54:50.109927 00280000 ################################################################
2131 20:54:50.110449
2132 20:54:50.792960 00300000 ################################################################
2133 20:54:50.793536
2134 20:54:51.462620 00380000 ################################################################
2135 20:54:51.462778
2136 20:54:52.130442 00400000 ################################################################
2137 20:54:52.131014
2138 20:54:52.781961 00480000 ################################################################
2139 20:54:52.782117
2140 20:54:53.396768 00500000 ################################################################
2141 20:54:53.397308
2142 20:54:54.063381 00580000 ################################################################
2143 20:54:54.063533
2144 20:54:54.713965 00600000 ################################################################
2145 20:54:54.714518
2146 20:54:55.302417 00680000 ################################################################
2147 20:54:55.302968
2148 20:54:55.974392 00700000 ################################################################
2149 20:54:55.974932
2150 20:54:56.600327 00780000 ################################################################
2151 20:54:56.600871
2152 20:54:57.215713 00800000 ################################################################
2153 20:54:57.215868
2154 20:54:57.769732 00880000 ################################################################
2155 20:54:57.769884
2156 20:54:58.063432 00900000 ################################## done.
2157 20:54:58.063956
2158 20:54:58.066435 The bootfile was 9711616 bytes long.
2159 20:54:58.066883
2160 20:54:58.070075 Sending tftp read request... done.
2161 20:54:58.070516
2162 20:54:58.073007 Waiting for the transfer...
2163 20:54:58.073448
2164 20:54:58.740224 00000000 ################################################################
2165 20:54:58.740773
2166 20:54:59.397917 00080000 ################################################################
2167 20:54:59.398462
2168 20:55:00.028553 00100000 ################################################################
2169 20:55:00.028765
2170 20:55:00.688190 00180000 ################################################################
2171 20:55:00.688835
2172 20:55:01.364868 00200000 ################################################################
2173 20:55:01.365417
2174 20:55:02.045525 00280000 ################################################################
2175 20:55:02.046083
2176 20:55:02.738248 00300000 ################################################################
2177 20:55:02.738781
2178 20:55:03.393981 00380000 ################################################################
2179 20:55:03.394529
2180 20:55:04.071894 00400000 ################################################################
2181 20:55:04.072439
2182 20:55:04.762525 00480000 ################################################################
2183 20:55:04.763106
2184 20:55:05.149696 00500000 ################################### done.
2185 20:55:05.149843
2186 20:55:05.153250 Sending tftp read request... done.
2187 20:55:05.153344
2188 20:55:05.156251 Waiting for the transfer...
2189 20:55:05.156327
2190 20:55:05.156393 00000000 # done.
2191 20:55:05.156465
2192 20:55:05.166350 Command line loaded dynamically from TFTP file: 8785147/tftp-deploy-5dbg8a5g/kernel/cmdline
2193 20:55:05.166432
2194 20:55:05.189079 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8785147/extract-nfsrootfs-kppbzx2y,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2195 20:55:05.189182
2196 20:55:05.195506 ec_init(0): CrosEC protocol v3 supported (256, 256)
2197 20:55:05.195587
2198 20:55:05.203125 Shutting down all USB controllers.
2199 20:55:05.203211
2200 20:55:05.203278 Removing current net device
2201 20:55:05.203349
2202 20:55:05.210462 Finalizing coreboot
2203 20:55:05.210556
2204 20:55:05.217076 Exiting depthcharge with code 4 at timestamp: 29184604
2205 20:55:05.217167
2206 20:55:05.217236
2207 20:55:05.217301 Starting kernel ...
2208 20:55:05.217362
2209 20:55:05.217733 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2210 20:55:05.217828 start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
2211 20:55:05.217903 Setting prompt string to ['Linux version [0-9]']
2212 20:55:05.217976 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2213 20:55:05.218048 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2214 20:55:05.220024
2215 20:55:05.220109
2217 20:59:25.218728 end: 2.2.5 auto-login-action (duration 00:04:20) [common]
2219 20:59:25.219875 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
2221 20:59:25.220734 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2224 20:59:25.222297 end: 2 depthcharge-action (duration 00:05:00) [common]
2226 20:59:25.223563 Cleaning after the job
2227 20:59:25.224026 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785147/tftp-deploy-5dbg8a5g/ramdisk
2228 20:59:25.226428 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785147/tftp-deploy-5dbg8a5g/kernel
2229 20:59:25.230227 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785147/tftp-deploy-5dbg8a5g/nfsrootfs
2230 20:59:25.295500 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785147/tftp-deploy-5dbg8a5g/modules
2231 20:59:25.295817 start: 5.1 power-off (timeout 00:00:30) [common]
2232 20:59:25.295974 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-0' '--port=1' '--command=off'
2233 20:59:25.314897 >> Command sent successfully.
2234 20:59:25.317083 Returned 0 in 0 seconds
2235 20:59:25.418316 end: 5.1 power-off (duration 00:00:00) [common]
2237 20:59:25.419865 start: 5.2 read-feedback (timeout 00:10:00) [common]
2238 20:59:25.421309 Listened to connection for namespace 'common' for up to 1s
2239 20:59:26.223887 Listened to connection for namespace 'common' for up to 1s
2240 20:59:26.227371 Listened to connection for namespace 'common' for up to 1s
2241 20:59:26.230657 Listened to connection for namespace 'common' for up to 1s
2242 20:59:26.234205 Listened to connection for namespace 'common' for up to 1s
2243 20:59:26.237559 Listened to connection for namespace 'common' for up to 1s
2244 20:59:26.240935 Listened to connection for namespace 'common' for up to 1s
2245 20:59:26.244071 Listened to connection for namespace 'common' for up to 1s
2246 20:59:26.247774 Listened to connection for namespace 'common' for up to 1s
2247 20:59:26.250873 Listened to connection for namespace 'common' for up to 1s
2248 20:59:26.254512 Listened to connection for namespace 'common' for up to 1s
2249 20:59:26.258067 Listened to connection for namespace 'common' for up to 1s
2250 20:59:26.262257 Listened to connection for namespace 'common' for up to 1s
2251 20:59:26.266252 Listened to connection for namespace 'common' for up to 1s
2252 20:59:26.421507 Finalising connection for namespace 'common'
2253 20:59:26.422385 Disconnecting from shell: Finalise
2254 20:59:26.422854
2255 20:59:26.524324 end: 5.2 read-feedback (duration 00:00:01) [common]
2256 20:59:26.524938 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8785147
2257 20:59:26.623647 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8785147
2258 20:59:26.623840 JobError: Your job cannot terminate cleanly.