Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 20:52:32.645546 lava-dispatcher, installed at version: 2022.11
2 20:52:32.645755 start: 0 validate
3 20:52:32.645903 Start time: 2023-01-18 20:52:32.645897+00:00 (UTC)
4 20:52:32.646042 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:52:32.646172 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230114.0%2Famd64%2Finitrd.cpio.gz exists
6 20:52:32.930959 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:52:32.931142 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.269-cip88-rt28%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:52:33.213658 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:52:33.213827 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230114.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 20:52:33.502415 Using caching service: 'http://localhost/cache/?uri=%s'
11 20:52:33.502581 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.269-cip88-rt28%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 20:52:33.792527 validate duration: 1.15
14 20:52:33.792805 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 20:52:33.792923 start: 1.1 download-retry (timeout 00:10:00) [common]
16 20:52:33.793018 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 20:52:33.793115 Not decompressing ramdisk as can be used compressed.
18 20:52:33.793209 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230114.0/amd64/initrd.cpio.gz
19 20:52:33.793275 saving as /var/lib/lava/dispatcher/tmp/8785140/tftp-deploy-vrf0m9hj/ramdisk/initrd.cpio.gz
20 20:52:33.793338 total size: 5432135 (5MB)
21 20:52:33.794477 progress 0% (0MB)
22 20:52:33.795930 progress 5% (0MB)
23 20:52:33.797359 progress 10% (0MB)
24 20:52:33.798785 progress 15% (0MB)
25 20:52:33.800262 progress 20% (1MB)
26 20:52:33.801673 progress 25% (1MB)
27 20:52:33.802986 progress 30% (1MB)
28 20:52:33.804437 progress 35% (1MB)
29 20:52:33.805868 progress 40% (2MB)
30 20:52:33.807176 progress 45% (2MB)
31 20:52:33.808472 progress 50% (2MB)
32 20:52:33.809980 progress 55% (2MB)
33 20:52:33.811325 progress 60% (3MB)
34 20:52:33.812624 progress 65% (3MB)
35 20:52:33.814194 progress 70% (3MB)
36 20:52:33.815498 progress 75% (3MB)
37 20:52:33.816793 progress 80% (4MB)
38 20:52:33.818137 progress 85% (4MB)
39 20:52:33.819651 progress 90% (4MB)
40 20:52:33.820961 progress 95% (4MB)
41 20:52:33.822327 progress 100% (5MB)
42 20:52:33.822586 5MB downloaded in 0.03s (177.15MB/s)
43 20:52:33.822738 end: 1.1.1 http-download (duration 00:00:00) [common]
45 20:52:33.822982 end: 1.1 download-retry (duration 00:00:00) [common]
46 20:52:33.823074 start: 1.2 download-retry (timeout 00:10:00) [common]
47 20:52:33.823172 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 20:52:33.823279 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.269-cip88-rt28/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 20:52:33.823377 saving as /var/lib/lava/dispatcher/tmp/8785140/tftp-deploy-vrf0m9hj/kernel/bzImage
50 20:52:33.823467 total size: 9711616 (9MB)
51 20:52:33.823533 No compression specified
52 20:52:33.824560 progress 0% (0MB)
53 20:52:33.826972 progress 5% (0MB)
54 20:52:33.829561 progress 10% (0MB)
55 20:52:33.831997 progress 15% (1MB)
56 20:52:33.834484 progress 20% (1MB)
57 20:52:33.836974 progress 25% (2MB)
58 20:52:33.839270 progress 30% (2MB)
59 20:52:33.841788 progress 35% (3MB)
60 20:52:33.844191 progress 40% (3MB)
61 20:52:33.846704 progress 45% (4MB)
62 20:52:33.849121 progress 50% (4MB)
63 20:52:33.851591 progress 55% (5MB)
64 20:52:33.853873 progress 60% (5MB)
65 20:52:33.856282 progress 65% (6MB)
66 20:52:33.858735 progress 70% (6MB)
67 20:52:33.861125 progress 75% (6MB)
68 20:52:33.863586 progress 80% (7MB)
69 20:52:33.865839 progress 85% (7MB)
70 20:52:33.868279 progress 90% (8MB)
71 20:52:33.870702 progress 95% (8MB)
72 20:52:33.873164 progress 100% (9MB)
73 20:52:33.873400 9MB downloaded in 0.05s (185.58MB/s)
74 20:52:33.873571 end: 1.2.1 http-download (duration 00:00:00) [common]
76 20:52:33.873813 end: 1.2 download-retry (duration 00:00:00) [common]
77 20:52:33.873904 start: 1.3 download-retry (timeout 00:10:00) [common]
78 20:52:33.873992 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 20:52:33.874100 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230114.0/amd64/full.rootfs.tar.xz
80 20:52:33.874168 saving as /var/lib/lava/dispatcher/tmp/8785140/tftp-deploy-vrf0m9hj/nfsrootfs/full.rootfs.tar
81 20:52:33.874231 total size: 133346544 (127MB)
82 20:52:33.874292 Using unxz to decompress xz
83 20:52:33.877678 progress 0% (0MB)
84 20:52:34.211954 progress 5% (6MB)
85 20:52:34.574008 progress 10% (12MB)
86 20:52:34.865662 progress 15% (19MB)
87 20:52:35.072538 progress 20% (25MB)
88 20:52:35.323370 progress 25% (31MB)
89 20:52:35.668141 progress 30% (38MB)
90 20:52:36.020416 progress 35% (44MB)
91 20:52:36.410944 progress 40% (50MB)
92 20:52:36.790782 progress 45% (57MB)
93 20:52:37.143749 progress 50% (63MB)
94 20:52:37.520605 progress 55% (69MB)
95 20:52:37.885158 progress 60% (76MB)
96 20:52:38.263094 progress 65% (82MB)
97 20:52:38.641953 progress 70% (89MB)
98 20:52:39.022623 progress 75% (95MB)
99 20:52:39.487456 progress 80% (101MB)
100 20:52:39.943924 progress 85% (108MB)
101 20:52:40.219261 progress 90% (114MB)
102 20:52:40.574057 progress 95% (120MB)
103 20:52:40.991752 progress 100% (127MB)
104 20:52:40.997685 127MB downloaded in 7.12s (17.85MB/s)
105 20:52:40.997952 end: 1.3.1 http-download (duration 00:00:07) [common]
107 20:52:40.998249 end: 1.3 download-retry (duration 00:00:07) [common]
108 20:52:40.998342 start: 1.4 download-retry (timeout 00:09:53) [common]
109 20:52:40.998432 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 20:52:40.998569 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.269-cip88-rt28/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 20:52:40.998641 saving as /var/lib/lava/dispatcher/tmp/8785140/tftp-deploy-vrf0m9hj/modules/modules.tar
112 20:52:40.998704 total size: 64664 (0MB)
113 20:52:40.998769 Using unxz to decompress xz
114 20:52:41.001878 progress 50% (0MB)
115 20:52:41.002245 progress 100% (0MB)
116 20:52:41.006751 0MB downloaded in 0.01s (7.67MB/s)
117 20:52:41.006972 end: 1.4.1 http-download (duration 00:00:00) [common]
119 20:52:41.007228 end: 1.4 download-retry (duration 00:00:00) [common]
120 20:52:41.007341 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
121 20:52:41.007446 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
122 20:52:42.270405 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8785140/extract-nfsrootfs-97aaybd2
123 20:52:42.270608 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
124 20:52:42.270717 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
125 20:52:42.270857 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s
126 20:52:42.270958 makedir: /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin
127 20:52:42.271043 makedir: /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/tests
128 20:52:42.271124 makedir: /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/results
129 20:52:42.271222 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-add-keys
130 20:52:42.271354 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-add-sources
131 20:52:42.271470 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-background-process-start
132 20:52:42.271585 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-background-process-stop
133 20:52:42.271697 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-common-functions
134 20:52:42.271808 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-echo-ipv4
135 20:52:42.271918 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-install-packages
136 20:52:42.272028 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-installed-packages
137 20:52:42.272138 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-os-build
138 20:52:42.272248 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-probe-channel
139 20:52:42.272359 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-probe-ip
140 20:52:42.272481 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-target-ip
141 20:52:42.272593 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-target-mac
142 20:52:42.272702 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-target-storage
143 20:52:42.272813 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-test-case
144 20:52:42.272925 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-test-event
145 20:52:42.273034 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-test-feedback
146 20:52:42.273144 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-test-raise
147 20:52:42.273255 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-test-reference
148 20:52:42.273364 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-test-runner
149 20:52:42.273511 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-test-set
150 20:52:42.273619 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-test-shell
151 20:52:42.273730 Updating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-install-packages (oe)
152 20:52:42.273842 Updating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/bin/lava-installed-packages (oe)
153 20:52:42.273940 Creating /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/environment
154 20:52:42.274026 LAVA metadata
155 20:52:42.274092 - LAVA_JOB_ID=8785140
156 20:52:42.274156 - LAVA_DISPATCHER_IP=192.168.201.1
157 20:52:42.274254 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
158 20:52:42.274319 skipped lava-vland-overlay
159 20:52:42.274394 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 20:52:42.274480 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
161 20:52:42.274574 skipped lava-multinode-overlay
162 20:52:42.274664 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 20:52:42.274749 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
164 20:52:42.274823 Loading test definitions
165 20:52:42.274914 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
166 20:52:42.274987 Using /lava-8785140 at stage 0
167 20:52:42.275245 uuid=8785140_1.5.2.3.1 testdef=None
168 20:52:42.275337 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
169 20:52:42.275425 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
170 20:52:42.275899 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
172 20:52:42.276133 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
173 20:52:42.276696 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
175 20:52:42.276937 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
176 20:52:42.277616 runner path: /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/0/tests/0_dmesg test_uuid 8785140_1.5.2.3.1
177 20:52:42.277768 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
179 20:52:42.278003 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:52) [common]
180 20:52:42.278075 Using /lava-8785140 at stage 1
181 20:52:42.278313 uuid=8785140_1.5.2.3.5 testdef=None
182 20:52:42.278403 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
183 20:52:42.278491 start: 1.5.2.3.6 test-overlay (timeout 00:09:52) [common]
184 20:52:42.278935 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
186 20:52:42.279162 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:52) [common]
187 20:52:42.279732 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
189 20:52:42.279970 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:52) [common]
190 20:52:42.280518 runner path: /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/1/tests/1_bootrr test_uuid 8785140_1.5.2.3.5
191 20:52:42.280661 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
193 20:52:42.280871 Creating lava-test-runner.conf files
194 20:52:42.280936 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/0 for stage 0
195 20:52:42.281018 - 0_dmesg
196 20:52:42.281093 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8785140/lava-overlay-sde4002s/lava-8785140/1 for stage 1
197 20:52:42.281175 - 1_bootrr
198 20:52:42.281266 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
199 20:52:42.281352 start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
200 20:52:42.286931 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
201 20:52:42.287036 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
202 20:52:42.287125 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
203 20:52:42.287213 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
204 20:52:42.287301 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
205 20:52:42.389040 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
206 20:52:42.389410 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
207 20:52:42.389535 extracting modules file /var/lib/lava/dispatcher/tmp/8785140/tftp-deploy-vrf0m9hj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8785140/extract-nfsrootfs-97aaybd2
208 20:52:42.393596 extracting modules file /var/lib/lava/dispatcher/tmp/8785140/tftp-deploy-vrf0m9hj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8785140/extract-overlay-ramdisk-bjgrlrla/ramdisk
209 20:52:42.397329 end: 1.5.4 extract-modules (duration 00:00:00) [common]
210 20:52:42.397485 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
211 20:52:42.397572 [common] Applying overlay to NFS
212 20:52:42.397645 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8785140/compress-overlay-d01y22bn/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8785140/extract-nfsrootfs-97aaybd2
213 20:52:42.401433 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
214 20:52:42.401554 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
215 20:52:42.401647 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
216 20:52:42.401740 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
217 20:52:42.401819 Building ramdisk /var/lib/lava/dispatcher/tmp/8785140/extract-overlay-ramdisk-bjgrlrla/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8785140/extract-overlay-ramdisk-bjgrlrla/ramdisk
218 20:52:42.435192 >> 24777 blocks
219 20:52:42.898081 rename /var/lib/lava/dispatcher/tmp/8785140/extract-overlay-ramdisk-bjgrlrla/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8785140/tftp-deploy-vrf0m9hj/ramdisk/ramdisk.cpio.gz
220 20:52:42.898485 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
221 20:52:42.898611 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
222 20:52:42.898714 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
223 20:52:42.898809 No mkimage arch provided, not using FIT.
224 20:52:42.898900 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
225 20:52:42.898983 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
226 20:52:42.899079 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
227 20:52:42.899173 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
228 20:52:42.899253 No LXC device requested
229 20:52:42.899335 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
230 20:52:42.899424 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
231 20:52:42.899505 end: 1.7 deploy-device-env (duration 00:00:00) [common]
232 20:52:42.899572 Checking files for TFTP limit of 4294967296 bytes.
233 20:52:42.899959 end: 1 tftp-deploy (duration 00:00:09) [common]
234 20:52:42.900064 start: 2 depthcharge-action (timeout 00:05:00) [common]
235 20:52:42.900155 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
236 20:52:42.900281 substitutions:
237 20:52:42.900347 - {DTB}: None
238 20:52:42.900410 - {INITRD}: 8785140/tftp-deploy-vrf0m9hj/ramdisk/ramdisk.cpio.gz
239 20:52:42.900469 - {KERNEL}: 8785140/tftp-deploy-vrf0m9hj/kernel/bzImage
240 20:52:42.900526 - {LAVA_MAC}: None
241 20:52:42.900581 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8785140/extract-nfsrootfs-97aaybd2
242 20:52:42.900637 - {NFS_SERVER_IP}: 192.168.201.1
243 20:52:42.900691 - {PRESEED_CONFIG}: None
244 20:52:42.900747 - {PRESEED_LOCAL}: None
245 20:52:42.900802 - {RAMDISK}: 8785140/tftp-deploy-vrf0m9hj/ramdisk/ramdisk.cpio.gz
246 20:52:42.900856 - {ROOT_PART}: None
247 20:52:42.900910 - {ROOT}: None
248 20:52:42.900963 - {SERVER_IP}: 192.168.201.1
249 20:52:42.901016 - {TEE}: None
250 20:52:42.901070 Parsed boot commands:
251 20:52:42.901123 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
252 20:52:42.901273 Parsed boot commands: tftpboot 192.168.201.1 8785140/tftp-deploy-vrf0m9hj/kernel/bzImage 8785140/tftp-deploy-vrf0m9hj/kernel/cmdline 8785140/tftp-deploy-vrf0m9hj/ramdisk/ramdisk.cpio.gz
253 20:52:42.901366 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
254 20:52:42.901493 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
255 20:52:42.901584 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
256 20:52:42.901678 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
257 20:52:42.901750 Not connected, no need to disconnect.
258 20:52:42.901827 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
259 20:52:42.901911 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
260 20:52:42.901979 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-14'
261 20:52:42.904583 Setting prompt string to ['lava-test: # ']
262 20:52:42.904864 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
263 20:52:42.904969 end: 2.2.1 reset-connection (duration 00:00:00) [common]
264 20:52:42.905066 start: 2.2.2 reset-device (timeout 00:05:00) [common]
265 20:52:42.905156 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
266 20:52:42.905332 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=reboot'
267 20:52:42.924066 >> Command sent successfully.
268 20:52:42.925980 Returned 0 in 0 seconds
269 20:52:43.027053 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
271 20:52:43.028265 end: 2.2.2 reset-device (duration 00:00:00) [common]
272 20:52:43.028732 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
273 20:52:43.029093 Setting prompt string to 'Starting depthcharge on Voema...'
274 20:52:43.029418 Changing prompt to 'Starting depthcharge on Voema...'
275 20:52:43.029738 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
276 20:52:43.030827 [Enter `^Ec?' for help]
277 20:52:50.211651
278 20:52:50.212212
279 20:52:50.221450 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
280 20:52:50.224702 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
281 20:52:50.228069
282 20:52:50.231387 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
283 20:52:50.235368 CPU: AES supported, TXT NOT supported, VT supported
284 20:52:50.242006 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
285 20:52:50.245233 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
286 20:52:50.251800 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
287 20:52:50.255285 VBOOT: Loading verstage.
288 20:52:50.258810 FMAP: Found "FLASH" version 1.1 at 0x1804000.
289 20:52:50.265425 FMAP: base = 0x0 size = 0x2000000 #areas = 32
290 20:52:50.268726 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
291 20:52:50.278718 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
292 20:52:50.284783 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
293 20:52:50.285268
294 20:52:50.285739
295 20:52:50.295368 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
296 20:52:50.312096 Probing TPM: . done!
297 20:52:50.315338 TPM ready after 0 ms
298 20:52:50.318628 Connected to device vid:did:rid of 1ae0:0028:00
299 20:52:50.329831 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
300 20:52:50.336444 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
301 20:52:50.339697 Initialized TPM device CR50 revision 0
302 20:52:50.396059 tlcl_send_startup: Startup return code is 0
303 20:52:50.396580 TPM: setup succeeded
304 20:52:50.410960 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
305 20:52:50.424464 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
306 20:52:50.437993 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
307 20:52:50.447186 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
308 20:52:50.451016 Chrome EC: UHEPI supported
309 20:52:50.454340 Phase 1
310 20:52:50.458080 FMAP: area GBB found @ 1805000 (458752 bytes)
311 20:52:50.467788 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
312 20:52:50.474359 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
313 20:52:50.480888 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
314 20:52:50.486986 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
315 20:52:50.490891 Recovery requested (1009000e)
316 20:52:50.494206 TPM: Extending digest for VBOOT: boot mode into PCR 0
317 20:52:50.505837 tlcl_extend: response is 0
318 20:52:50.512447 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
319 20:52:50.522291 tlcl_extend: response is 0
320 20:52:50.529011 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
321 20:52:50.535470 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
322 20:52:50.542236 BS: verstage times (exec / console): total (unknown) / 142 ms
323 20:52:50.542710
324 20:52:50.543087
325 20:52:50.555378 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
326 20:52:50.561956 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
327 20:52:50.565247 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
328 20:52:50.568436 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
329 20:52:50.575133 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
330 20:52:50.578469 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
331 20:52:50.581853 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
332 20:52:50.585190 TCO_STS: 0000 0000
333 20:52:50.588473 GEN_PMCON: d0015038 00002200
334 20:52:50.591231 GBLRST_CAUSE: 00000000 00000000
335 20:52:50.594677 HPR_CAUSE0: 00000000
336 20:52:50.595118 prev_sleep_state 5
337 20:52:50.597879 Boot Count incremented to 2245
338 20:52:50.604511 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
339 20:52:50.610833 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
340 20:52:50.620631 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
341 20:52:50.627415 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
342 20:52:50.630700 Chrome EC: UHEPI supported
343 20:52:50.637278 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
344 20:52:50.648729 Probing TPM: done!
345 20:52:50.655131 Connected to device vid:did:rid of 1ae0:0028:00
346 20:52:50.664985 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
347 20:52:50.669119 Initialized TPM device CR50 revision 0
348 20:52:50.683239 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
349 20:52:50.686520
350 20:52:50.689976 MRC: Hash idx 0x100b comparison successful.
351 20:52:50.693288 MRC cache found, size faa8
352 20:52:50.693403 bootmode is set to: 2
353 20:52:50.696894 SPD index = 2
354 20:52:50.703885 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
355 20:52:50.706453 SPD: module type is LPDDR4X
356 20:52:50.710008 SPD: module part number is MT53D1G64D4NW-046
357 20:52:50.716679 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
358 20:52:50.720712 SPD: device width 16 bits, bus width 16 bits
359 20:52:50.724708 SPD: module size is 2048 MB (per channel)
360 20:52:51.156697 CBMEM:
361 20:52:51.159904 IMD: root @ 0x76fff000 254 entries.
362 20:52:51.163202 IMD: root @ 0x76ffec00 62 entries.
363 20:52:51.166499 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
364 20:52:51.172697 FMAP: area RW_VPD found @ f35000 (8192 bytes)
365 20:52:51.176304 External stage cache:
366 20:52:51.179688 IMD: root @ 0x7b3ff000 254 entries.
367 20:52:51.182994 IMD: root @ 0x7b3fec00 62 entries.
368 20:52:51.198422 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
369 20:52:51.205055 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
370 20:52:51.211163 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
371 20:52:51.225235 MRC: 'RECOVERY_MRC_CACHE' does not need update.
372 20:52:51.231976 cse_lite: Skip switching to RW in the recovery path
373 20:52:51.232417 8 DIMMs found
374 20:52:51.235219 SMM Memory Map
375 20:52:51.238555 SMRAM : 0x7b000000 0x800000
376 20:52:51.242004 Subregion 0: 0x7b000000 0x200000
377 20:52:51.245268 Subregion 1: 0x7b200000 0x200000
378 20:52:51.248549 Subregion 2: 0x7b400000 0x400000
379 20:52:51.248984 top_of_ram = 0x77000000
380 20:52:51.255146 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
381 20:52:51.261819 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
382 20:52:51.265021 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
383 20:52:51.271498 MTRR Range: Start=ff000000 End=0 (Size 1000000)
384 20:52:51.277945 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
385 20:52:51.284651 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
386 20:52:51.295265 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
387 20:52:51.298595 Processing 211 relocs. Offset value of 0x74c0b000
388 20:52:51.308544 BS: romstage times (exec / console): total (unknown) / 276 ms
389 20:52:51.314023
390 20:52:51.314455
391 20:52:51.324135 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
392 20:52:51.326938 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
393 20:52:51.336852 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
394 20:52:51.343516 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
395 20:52:51.350113 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
396 20:52:51.356801 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
397 20:52:51.401313 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
398 20:52:51.408233 Processing 5008 relocs. Offset value of 0x75d98000
399 20:52:51.410549 BS: postcar times (exec / console): total (unknown) / 59 ms
400 20:52:51.411038
401 20:52:51.413876
402 20:52:51.414363
403 20:52:51.423868 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
404 20:52:51.424373 Normal boot
405 20:52:51.427277 FW_CONFIG value is 0x804c02
406 20:52:51.430509 PCI: 00:07.0 disabled by fw_config
407 20:52:51.433939 PCI: 00:07.1 disabled by fw_config
408 20:52:51.436551 PCI: 00:0d.2 disabled by fw_config
409 20:52:51.440029
410 20:52:51.443668 PCI: 00:1c.7 disabled by fw_config
411 20:52:51.446689 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
412 20:52:51.453551 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 20:52:51.460509 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 20:52:51.462916 GENERIC: 0.0 disabled by fw_config
415 20:52:51.466344 GENERIC: 1.0 disabled by fw_config
416 20:52:51.469722 fw_config match found: DB_USB=USB3_ACTIVE
417 20:52:51.472903 fw_config match found: DB_USB=USB3_ACTIVE
418 20:52:51.479949 fw_config match found: DB_USB=USB3_ACTIVE
419 20:52:51.483325 fw_config match found: DB_USB=USB3_ACTIVE
420 20:52:51.486483 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
421 20:52:51.495788 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
422 20:52:51.502585 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
423 20:52:51.509351 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
424 20:52:51.515634 microcode: sig=0x806c1 pf=0x80 revision=0x86
425 20:52:51.519448 microcode: Update skipped, already up-to-date
426 20:52:51.526040 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
427 20:52:51.554106 Detected 4 core, 8 thread CPU.
428 20:52:51.557734 Setting up SMI for CPU
429 20:52:51.561728 IED base = 0x7b400000
430 20:52:51.562306 IED size = 0x00400000
431 20:52:51.564451 Will perform SMM setup.
432 20:52:51.571045 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
433 20:52:51.577630 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
434 20:52:51.583956 Processing 16 relocs. Offset value of 0x00030000
435 20:52:51.587382 Attempting to start 7 APs
436 20:52:51.590570 Waiting for 10ms after sending INIT.
437 20:52:51.606718 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
438 20:52:51.607298 done.
439 20:52:51.609983 AP: slot 2 apic_id 5.
440 20:52:51.612770 AP: slot 5 apic_id 4.
441 20:52:51.613345 AP: slot 3 apic_id 7.
442 20:52:51.616319 AP: slot 6 apic_id 6.
443 20:52:51.619394 Waiting for 2nd SIPI to complete...done.
444 20:52:51.622632 AP: slot 4 apic_id 2.
445 20:52:51.626024 AP: slot 7 apic_id 3.
446 20:52:51.632637 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
447 20:52:51.639372 Processing 13 relocs. Offset value of 0x00038000
448 20:52:51.639903 Unable to locate Global NVS
449 20:52:51.642593
450 20:52:51.649177 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
451 20:52:51.652623 Installing permanent SMM handler to 0x7b000000
452 20:52:51.662612 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
453 20:52:51.666025 Processing 794 relocs. Offset value of 0x7b010000
454 20:52:51.675223 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
455 20:52:51.678571 Processing 13 relocs. Offset value of 0x7b008000
456 20:52:51.685217 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
457 20:52:51.692144 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
458 20:52:51.698666 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
459 20:52:51.701991 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
460 20:52:51.708791 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
461 20:52:51.715434 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
462 20:52:51.721681 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
463 20:52:51.724853 Unable to locate Global NVS
464 20:52:51.732025 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
465 20:52:51.735237 Clearing SMI status registers
466 20:52:51.738600 SMI_STS: PM1
467 20:52:51.739077 PM1_STS: PWRBTN
468 20:52:51.745086 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
469 20:52:51.748518 In relocation handler: CPU 0
470 20:52:51.751664 New SMBASE=0x7b000000 IEDBASE=0x7b400000
471 20:52:51.758218 Writing SMRR. base = 0x7b000006, mask=0xff800c00
472 20:52:51.761559 Relocation complete.
473 20:52:51.768614 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
474 20:52:51.771127 In relocation handler: CPU 1
475 20:52:51.774402 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
476 20:52:51.777953 Relocation complete.
477 20:52:51.784441 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
478 20:52:51.787600 In relocation handler: CPU 4
479 20:52:51.790834 New SMBASE=0x7afff000 IEDBASE=0x7b400000
480 20:52:51.794259 Writing SMRR. base = 0x7b000006, mask=0xff800c00
481 20:52:51.797641 Relocation complete.
482 20:52:51.804450 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
483 20:52:51.807744 In relocation handler: CPU 7
484 20:52:51.811268 New SMBASE=0x7affe400 IEDBASE=0x7b400000
485 20:52:51.813735 Relocation complete.
486 20:52:51.820552 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
487 20:52:51.823768 In relocation handler: CPU 5
488 20:52:51.827205 New SMBASE=0x7affec00 IEDBASE=0x7b400000
489 20:52:51.833953 Writing SMRR. base = 0x7b000006, mask=0xff800c00
490 20:52:51.837459 Relocation complete.
491 20:52:51.843975 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
492 20:52:51.847253 In relocation handler: CPU 2
493 20:52:51.850327 New SMBASE=0x7afff800 IEDBASE=0x7b400000
494 20:52:51.853565 Relocation complete.
495 20:52:51.860075 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
496 20:52:51.863416 In relocation handler: CPU 3
497 20:52:51.866793 New SMBASE=0x7afff400 IEDBASE=0x7b400000
498 20:52:51.870011 Relocation complete.
499 20:52:51.876665 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
500 20:52:51.879551 In relocation handler: CPU 6
501 20:52:51.883633 New SMBASE=0x7affe800 IEDBASE=0x7b400000
502 20:52:51.886682 Writing SMRR. base = 0x7b000006, mask=0xff800c00
503 20:52:51.889899 Relocation complete.
504 20:52:51.893430 Initializing CPU #0
505 20:52:51.896067 CPU: vendor Intel device 806c1
506 20:52:51.899655 CPU: family 06, model 8c, stepping 01
507 20:52:51.902750 Clearing out pending MCEs
508 20:52:51.903186 Setting up local APIC...
509 20:52:51.906190 apic_id: 0x00 done.
510 20:52:51.909703 Turbo is available but hidden
511 20:52:51.913101 Turbo is available and visible
512 20:52:51.916200 microcode: Update skipped, already up-to-date
513 20:52:51.919407 CPU #0 initialized
514 20:52:51.922751 Initializing CPU #5
515 20:52:51.923188 Initializing CPU #2
516 20:52:51.926099 Initializing CPU #6
517 20:52:51.929400 Initializing CPU #3
518 20:52:51.929973 CPU: vendor Intel device 806c1
519 20:52:51.932858
520 20:52:51.936122 CPU: family 06, model 8c, stepping 01
521 20:52:51.939408 CPU: vendor Intel device 806c1
522 20:52:51.942120 CPU: family 06, model 8c, stepping 01
523 20:52:51.945638 Clearing out pending MCEs
524 20:52:51.946072 Clearing out pending MCEs
525 20:52:51.948951 Setting up local APIC...
526 20:52:51.952395 Initializing CPU #1
527 20:52:51.952849 Initializing CPU #4
528 20:52:51.955640 Initializing CPU #7
529 20:52:51.959323 CPU: vendor Intel device 806c1
530 20:52:51.962501 CPU: family 06, model 8c, stepping 01
531 20:52:51.966431 CPU: vendor Intel device 806c1
532 20:52:51.970513 CPU: family 06, model 8c, stepping 01
533 20:52:51.973129 Clearing out pending MCEs
534 20:52:51.973584 Clearing out pending MCEs
535 20:52:51.976502 CPU: vendor Intel device 806c1
536 20:52:51.979952 CPU: family 06, model 8c, stepping 01
537 20:52:51.983287
538 20:52:51.983726 Setting up local APIC...
539 20:52:51.986809 Setting up local APIC...
540 20:52:51.989965 CPU: vendor Intel device 806c1
541 20:52:51.993524 CPU: family 06, model 8c, stepping 01
542 20:52:51.996642 CPU: vendor Intel device 806c1
543 20:52:51.999956 CPU: family 06, model 8c, stepping 01
544 20:52:52.003328 Clearing out pending MCEs
545 20:52:52.006611 Clearing out pending MCEs
546 20:52:52.010038 Setting up local APIC...
547 20:52:52.010570 apic_id: 0x03 done.
548 20:52:52.013546 Setting up local APIC...
549 20:52:52.016632 apic_id: 0x07 done.
550 20:52:52.017241 apic_id: 0x06 done.
551 20:52:52.023170 microcode: Update skipped, already up-to-date
552 20:52:52.026496 microcode: Update skipped, already up-to-date
553 20:52:52.029447 CPU #3 initialized
554 20:52:52.030017 CPU #6 initialized
555 20:52:52.032563 Clearing out pending MCEs
556 20:52:52.035955 apic_id: 0x05 done.
557 20:52:52.039165 Setting up local APIC...
558 20:52:52.039595 Setting up local APIC...
559 20:52:52.045938 microcode: Update skipped, already up-to-date
560 20:52:52.046404 apic_id: 0x02 done.
561 20:52:52.049354 apic_id: 0x01 done.
562 20:52:52.053083 microcode: Update skipped, already up-to-date
563 20:52:52.056114 CPU #7 initialized
564 20:52:52.059498 CPU #4 initialized
565 20:52:52.062607 microcode: Update skipped, already up-to-date
566 20:52:52.066068 apic_id: 0x04 done.
567 20:52:52.066543 CPU #2 initialized
568 20:52:52.073071 microcode: Update skipped, already up-to-date
569 20:52:52.076181 microcode: Update skipped, already up-to-date
570 20:52:52.078964 CPU #5 initialized
571 20:52:52.079528 CPU #1 initialized
572 20:52:52.082189 bsp_do_flight_plan done after 458 msecs.
573 20:52:52.085517 CPU: frequency set to 4400 MHz
574 20:52:52.088937 Enabling SMIs.
575 20:52:52.095530 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 346 / 317 ms
576 20:52:52.110020 SATAXPCIE1 indicates PCIe NVMe is present
577 20:52:52.113403 Probing TPM: done!
578 20:52:52.117467 Connected to device vid:did:rid of 1ae0:0028:00
579 20:52:52.127643 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
580 20:52:52.131035 Initialized TPM device CR50 revision 0
581 20:52:52.134367 Enabling S0i3.4
582 20:52:52.141320 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
583 20:52:52.144089 Found a VBT of 8704 bytes after decompression
584 20:52:52.150844 cse_lite: CSE RO boot. HybridStorageMode disabled
585 20:52:52.157456 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
586 20:52:52.233193 FSPS returned 0
587 20:52:52.236590 Executing Phase 1 of FspMultiPhaseSiInit
588 20:52:52.246545 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
589 20:52:52.249840 port C0 DISC req: usage 1 usb3 1 usb2 5
590 20:52:52.253556 Raw Buffer output 0 00000511
591 20:52:52.256586 Raw Buffer output 1 00000000
592 20:52:52.260245 pmc_send_ipc_cmd succeeded
593 20:52:52.266575 port C1 DISC req: usage 1 usb3 2 usb2 3
594 20:52:52.267169 Raw Buffer output 0 00000321
595 20:52:52.270214 Raw Buffer output 1 00000000
596 20:52:52.274621 pmc_send_ipc_cmd succeeded
597 20:52:52.279611 Detected 4 core, 8 thread CPU.
598 20:52:52.282607 Detected 4 core, 8 thread CPU.
599 20:52:52.483168 Display FSP Version Info HOB
600 20:52:52.486370 Reference Code - CPU = a.0.4c.31
601 20:52:52.489658 uCode Version = 0.0.0.86
602 20:52:52.492866 TXT ACM version = ff.ff.ff.ffff
603 20:52:52.496105 Reference Code - ME = a.0.4c.31
604 20:52:52.499512 MEBx version = 0.0.0.0
605 20:52:52.502746 ME Firmware Version = Consumer SKU
606 20:52:52.506273 Reference Code - PCH = a.0.4c.31
607 20:52:52.508900 PCH-CRID Status = Disabled
608 20:52:52.512204 PCH-CRID Original Value = ff.ff.ff.ffff
609 20:52:52.515542 PCH-CRID New Value = ff.ff.ff.ffff
610 20:52:52.518863 OPROM - RST - RAID = ff.ff.ff.ffff
611 20:52:52.522187 PCH Hsio Version = 4.0.0.0
612 20:52:52.525540 Reference Code - SA - System Agent = a.0.4c.31
613 20:52:52.528905 Reference Code - MRC = 2.0.0.1
614 20:52:52.532183 SA - PCIe Version = a.0.4c.31
615 20:52:52.535613 SA-CRID Status = Disabled
616 20:52:52.539135 SA-CRID Original Value = 0.0.0.1
617 20:52:52.542940 SA-CRID New Value = 0.0.0.1
618 20:52:52.546318 OPROM - VBIOS = ff.ff.ff.ffff
619 20:52:52.550255 IO Manageability Engine FW Version = 11.1.4.0
620 20:52:52.553324 PHY Build Version = 0.0.0.e0
621 20:52:52.556688 Thunderbolt(TM) FW Version = 0.0.0.0
622 20:52:52.563429 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
623 20:52:52.563883 ITSS IRQ Polarities Before:
624 20:52:52.566679 IPC0: 0xffffffff
625 20:52:52.567107 IPC1: 0xffffffff
626 20:52:52.570075
627 20:52:52.570503 IPC2: 0xffffffff
628 20:52:52.573262 IPC3: 0xffffffff
629 20:52:52.573728 ITSS IRQ Polarities After:
630 20:52:52.576567 IPC0: 0xffffffff
631 20:52:52.579792 IPC1: 0xffffffff
632 20:52:52.580223 IPC2: 0xffffffff
633 20:52:52.583206 IPC3: 0xffffffff
634 20:52:52.586610 Found PCIe Root Port #9 at PCI: 00:1d.0.
635 20:52:52.595954 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
636 20:52:52.599692
637 20:52:52.609015 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
638 20:52:52.622375 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
639 20:52:52.629004 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
640 20:52:52.629489 Enumerating buses...
641 20:52:52.635694 Show all devs... Before device enumeration.
642 20:52:52.636124 Root Device: enabled 1
643 20:52:52.639062 DOMAIN: 0000: enabled 1
644 20:52:52.642375 CPU_CLUSTER: 0: enabled 1
645 20:52:52.645747 PCI: 00:00.0: enabled 1
646 20:52:52.646177 PCI: 00:02.0: enabled 1
647 20:52:52.648977 PCI: 00:04.0: enabled 1
648 20:52:52.652365 PCI: 00:05.0: enabled 1
649 20:52:52.655667 PCI: 00:06.0: enabled 0
650 20:52:52.656119 PCI: 00:07.0: enabled 0
651 20:52:52.658954 PCI: 00:07.1: enabled 0
652 20:52:52.662341 PCI: 00:07.2: enabled 0
653 20:52:52.665516 PCI: 00:07.3: enabled 0
654 20:52:52.665965 PCI: 00:08.0: enabled 1
655 20:52:52.668869 PCI: 00:09.0: enabled 0
656 20:52:52.671976 PCI: 00:0a.0: enabled 0
657 20:52:52.675429 PCI: 00:0d.0: enabled 1
658 20:52:52.675750 PCI: 00:0d.1: enabled 0
659 20:52:52.678095 PCI: 00:0d.2: enabled 0
660 20:52:52.681486 PCI: 00:0d.3: enabled 0
661 20:52:52.684679 PCI: 00:0e.0: enabled 0
662 20:52:52.684788 PCI: 00:10.2: enabled 1
663 20:52:52.688017 PCI: 00:10.6: enabled 0
664 20:52:52.691316 PCI: 00:10.7: enabled 0
665 20:52:52.694681 PCI: 00:12.0: enabled 0
666 20:52:52.694754 PCI: 00:12.6: enabled 0
667 20:52:52.697959 PCI: 00:13.0: enabled 0
668 20:52:52.701238 PCI: 00:14.0: enabled 1
669 20:52:52.701326 PCI: 00:14.1: enabled 0
670 20:52:52.704624
671 20:52:52.704694 PCI: 00:14.2: enabled 1
672 20:52:52.707891 PCI: 00:14.3: enabled 1
673 20:52:52.711175 PCI: 00:15.0: enabled 1
674 20:52:52.711253 PCI: 00:15.1: enabled 1
675 20:52:52.714582 PCI: 00:15.2: enabled 1
676 20:52:52.717896 PCI: 00:15.3: enabled 1
677 20:52:52.721196 PCI: 00:16.0: enabled 1
678 20:52:52.721272 PCI: 00:16.1: enabled 0
679 20:52:52.724512 PCI: 00:16.2: enabled 0
680 20:52:52.727926 PCI: 00:16.3: enabled 0
681 20:52:52.731289 PCI: 00:16.4: enabled 0
682 20:52:52.731367 PCI: 00:16.5: enabled 0
683 20:52:52.734602 PCI: 00:17.0: enabled 1
684 20:52:52.737899 PCI: 00:19.0: enabled 0
685 20:52:52.741241 PCI: 00:19.1: enabled 1
686 20:52:52.741315 PCI: 00:19.2: enabled 0
687 20:52:52.743980 PCI: 00:1c.0: enabled 1
688 20:52:52.747282 PCI: 00:1c.1: enabled 0
689 20:52:52.750640 PCI: 00:1c.2: enabled 0
690 20:52:52.750715 PCI: 00:1c.3: enabled 0
691 20:52:52.753888 PCI: 00:1c.4: enabled 0
692 20:52:52.757245 PCI: 00:1c.5: enabled 0
693 20:52:52.757339 PCI: 00:1c.6: enabled 1
694 20:52:52.760566
695 20:52:52.760643 PCI: 00:1c.7: enabled 0
696 20:52:52.763791 PCI: 00:1d.0: enabled 1
697 20:52:52.767109 PCI: 00:1d.1: enabled 0
698 20:52:52.767185 PCI: 00:1d.2: enabled 1
699 20:52:52.770531 PCI: 00:1d.3: enabled 0
700 20:52:52.773786 PCI: 00:1e.0: enabled 1
701 20:52:52.777068 PCI: 00:1e.1: enabled 0
702 20:52:52.777143 PCI: 00:1e.2: enabled 1
703 20:52:52.780438 PCI: 00:1e.3: enabled 1
704 20:52:52.783645 PCI: 00:1f.0: enabled 1
705 20:52:52.787058 PCI: 00:1f.1: enabled 0
706 20:52:52.787131 PCI: 00:1f.2: enabled 1
707 20:52:52.790433 PCI: 00:1f.3: enabled 1
708 20:52:52.793662 PCI: 00:1f.4: enabled 0
709 20:52:52.797072 PCI: 00:1f.5: enabled 1
710 20:52:52.797148 PCI: 00:1f.6: enabled 0
711 20:52:52.800582 PCI: 00:1f.7: enabled 0
712 20:52:52.803733 APIC: 00: enabled 1
713 20:52:52.803809 GENERIC: 0.0: enabled 1
714 20:52:52.807122 GENERIC: 0.0: enabled 1
715 20:52:52.810418 GENERIC: 1.0: enabled 1
716 20:52:52.813684 GENERIC: 0.0: enabled 1
717 20:52:52.813757 GENERIC: 1.0: enabled 1
718 20:52:52.816411 USB0 port 0: enabled 1
719 20:52:52.819768 GENERIC: 0.0: enabled 1
720 20:52:52.823050 USB0 port 0: enabled 1
721 20:52:52.823125 GENERIC: 0.0: enabled 1
722 20:52:52.826313 I2C: 00:1a: enabled 1
723 20:52:52.829557 I2C: 00:31: enabled 1
724 20:52:52.829642 I2C: 00:32: enabled 1
725 20:52:52.833049 I2C: 00:10: enabled 1
726 20:52:52.836317 I2C: 00:15: enabled 1
727 20:52:52.836394 GENERIC: 0.0: enabled 0
728 20:52:52.839642 GENERIC: 1.0: enabled 0
729 20:52:52.842865 GENERIC: 0.0: enabled 1
730 20:52:52.842942 SPI: 00: enabled 1
731 20:52:52.846292
732 20:52:52.846368 SPI: 00: enabled 1
733 20:52:52.849581 PNP: 0c09.0: enabled 1
734 20:52:52.852885 GENERIC: 0.0: enabled 1
735 20:52:52.852961 USB3 port 0: enabled 1
736 20:52:52.856685 USB3 port 1: enabled 1
737 20:52:52.859924 USB3 port 2: enabled 0
738 20:52:52.859998 USB3 port 3: enabled 0
739 20:52:52.862630 USB2 port 0: enabled 0
740 20:52:52.866047 USB2 port 1: enabled 1
741 20:52:52.866126 USB2 port 2: enabled 1
742 20:52:52.869490
743 20:52:52.869563 USB2 port 3: enabled 0
744 20:52:52.872778 USB2 port 4: enabled 1
745 20:52:52.876064 USB2 port 5: enabled 0
746 20:52:52.876140 USB2 port 6: enabled 0
747 20:52:52.879386 USB2 port 7: enabled 0
748 20:52:52.882556 USB2 port 8: enabled 0
749 20:52:52.882629 USB2 port 9: enabled 0
750 20:52:52.885922
751 20:52:52.885995 USB3 port 0: enabled 0
752 20:52:52.889233 USB3 port 1: enabled 1
753 20:52:52.892546 USB3 port 2: enabled 0
754 20:52:52.892621 USB3 port 3: enabled 0
755 20:52:52.895725 GENERIC: 0.0: enabled 1
756 20:52:52.899041 GENERIC: 1.0: enabled 1
757 20:52:52.899117 APIC: 01: enabled 1
758 20:52:52.902448 APIC: 05: enabled 1
759 20:52:52.905788 APIC: 07: enabled 1
760 20:52:52.905862 APIC: 02: enabled 1
761 20:52:52.909066 APIC: 04: enabled 1
762 20:52:52.912440 APIC: 06: enabled 1
763 20:52:52.912516 APIC: 03: enabled 1
764 20:52:52.915707 Compare with tree...
765 20:52:52.919168 Root Device: enabled 1
766 20:52:52.919240 DOMAIN: 0000: enabled 1
767 20:52:52.922415 PCI: 00:00.0: enabled 1
768 20:52:52.925207 PCI: 00:02.0: enabled 1
769 20:52:52.928479 PCI: 00:04.0: enabled 1
770 20:52:52.931886 GENERIC: 0.0: enabled 1
771 20:52:52.931965 PCI: 00:05.0: enabled 1
772 20:52:52.935266 PCI: 00:06.0: enabled 0
773 20:52:52.938499 PCI: 00:07.0: enabled 0
774 20:52:52.941770 GENERIC: 0.0: enabled 1
775 20:52:52.945232 PCI: 00:07.1: enabled 0
776 20:52:52.945310 GENERIC: 1.0: enabled 1
777 20:52:52.948606 PCI: 00:07.2: enabled 0
778 20:52:52.951918 GENERIC: 0.0: enabled 1
779 20:52:52.955324 PCI: 00:07.3: enabled 0
780 20:52:52.958766 GENERIC: 1.0: enabled 1
781 20:52:52.958842 PCI: 00:08.0: enabled 1
782 20:52:52.962020 PCI: 00:09.0: enabled 0
783 20:52:52.965231 PCI: 00:0a.0: enabled 0
784 20:52:52.968105 PCI: 00:0d.0: enabled 1
785 20:52:52.971550 USB0 port 0: enabled 1
786 20:52:52.974872 USB3 port 0: enabled 1
787 20:52:52.974948 USB3 port 1: enabled 1
788 20:52:52.978055 USB3 port 2: enabled 0
789 20:52:52.981349 USB3 port 3: enabled 0
790 20:52:52.984648 PCI: 00:0d.1: enabled 0
791 20:52:52.987964 PCI: 00:0d.2: enabled 0
792 20:52:52.988036 GENERIC: 0.0: enabled 1
793 20:52:52.991358 PCI: 00:0d.3: enabled 0
794 20:52:52.994705 PCI: 00:0e.0: enabled 0
795 20:52:52.998060 PCI: 00:10.2: enabled 1
796 20:52:53.000815 PCI: 00:10.6: enabled 0
797 20:52:53.000887 PCI: 00:10.7: enabled 0
798 20:52:53.004169 PCI: 00:12.0: enabled 0
799 20:52:53.007479 PCI: 00:12.6: enabled 0
800 20:52:53.010827 PCI: 00:13.0: enabled 0
801 20:52:53.014150 PCI: 00:14.0: enabled 1
802 20:52:53.014224 USB0 port 0: enabled 1
803 20:52:53.017413 USB2 port 0: enabled 0
804 20:52:53.020679 USB2 port 1: enabled 1
805 20:52:53.024067 USB2 port 2: enabled 1
806 20:52:53.027507 USB2 port 3: enabled 0
807 20:52:53.030834 USB2 port 4: enabled 1
808 20:52:53.030910 USB2 port 5: enabled 0
809 20:52:53.034177 USB2 port 6: enabled 0
810 20:52:53.037614 USB2 port 7: enabled 0
811 20:52:53.040910 USB2 port 8: enabled 0
812 20:52:53.044217 USB2 port 9: enabled 0
813 20:52:53.046965 USB3 port 0: enabled 0
814 20:52:53.047040 USB3 port 1: enabled 1
815 20:52:53.050351 USB3 port 2: enabled 0
816 20:52:53.053665 USB3 port 3: enabled 0
817 20:52:53.056961 PCI: 00:14.1: enabled 0
818 20:52:53.060251 PCI: 00:14.2: enabled 1
819 20:52:53.060324 PCI: 00:14.3: enabled 1
820 20:52:53.063576 GENERIC: 0.0: enabled 1
821 20:52:53.066871 PCI: 00:15.0: enabled 1
822 20:52:53.070223 I2C: 00:1a: enabled 1
823 20:52:53.073627 I2C: 00:31: enabled 1
824 20:52:53.073698 I2C: 00:32: enabled 1
825 20:52:53.076936 PCI: 00:15.1: enabled 1
826 20:52:53.080291 I2C: 00:10: enabled 1
827 20:52:53.083599 PCI: 00:15.2: enabled 1
828 20:52:53.086814 PCI: 00:15.3: enabled 1
829 20:52:53.086885 PCI: 00:16.0: enabled 1
830 20:52:53.090097 PCI: 00:16.1: enabled 0
831 20:52:53.093470 PCI: 00:16.2: enabled 0
832 20:52:53.096753 PCI: 00:16.3: enabled 0
833 20:52:53.100211 PCI: 00:16.4: enabled 0
834 20:52:53.100282 PCI: 00:16.5: enabled 0
835 20:52:53.103538 PCI: 00:17.0: enabled 1
836 20:52:53.106844 PCI: 00:19.0: enabled 0
837 20:52:53.110080 PCI: 00:19.1: enabled 1
838 20:52:53.113487 I2C: 00:15: enabled 1
839 20:52:53.113556 PCI: 00:19.2: enabled 0
840 20:52:53.116716 PCI: 00:1d.0: enabled 1
841 20:52:53.119906 GENERIC: 0.0: enabled 1
842 20:52:53.123241 PCI: 00:1e.0: enabled 1
843 20:52:53.126542 PCI: 00:1e.1: enabled 0
844 20:52:53.126612 PCI: 00:1e.2: enabled 1
845 20:52:53.129990 SPI: 00: enabled 1
846 20:52:53.133286 PCI: 00:1e.3: enabled 1
847 20:52:53.136009 SPI: 00: enabled 1
848 20:52:53.136084 PCI: 00:1f.0: enabled 1
849 20:52:53.139499 PNP: 0c09.0: enabled 1
850 20:52:53.178872 PCI: 00:1f.1: enabled 0
851 20:52:53.178976 PCI: 00:1f.2: enabled 1
852 20:52:53.179254 GENERIC: 0.0: enabled 1
853 20:52:53.179326 GENERIC: 0.0: enabled 1
854 20:52:53.179390 GENERIC: 1.0: enabled 1
855 20:52:53.179451 PCI: 00:1f.3: enabled 1
856 20:52:53.179520 PCI: 00:1f.4: enabled 0
857 20:52:53.179588 PCI: 00:1f.5: enabled 1
858 20:52:53.179646 PCI: 00:1f.6: enabled 0
859 20:52:53.179887 PCI: 00:1f.7: enabled 0
860 20:52:53.179949 CPU_CLUSTER: 0: enabled 1
861 20:52:53.180007 APIC: 00: enabled 1
862 20:52:53.180253 APIC: 01: enabled 1
863 20:52:53.180322 APIC: 05: enabled 1
864 20:52:53.180382 APIC: 07: enabled 1
865 20:52:53.182805 APIC: 02: enabled 1
866 20:52:53.182872 APIC: 04: enabled 1
867 20:52:53.186124 APIC: 06: enabled 1
868 20:52:53.186192 APIC: 03: enabled 1
869 20:52:53.190670 Root Device scanning...
870 20:52:53.194001 scan_static_bus for Root Device
871 20:52:53.197255 DOMAIN: 0000 enabled
872 20:52:53.200641 CPU_CLUSTER: 0 enabled
873 20:52:53.200714 DOMAIN: 0000 scanning...
874 20:52:53.203967 PCI: pci_scan_bus for bus 00
875 20:52:53.207186 PCI: 00:00.0 [8086/0000] ops
876 20:52:53.211248 PCI: 00:00.0 [8086/9a12] enabled
877 20:52:53.214573 PCI: 00:02.0 [8086/0000] bus ops
878 20:52:53.217852 PCI: 00:02.0 [8086/9a40] enabled
879 20:52:53.221093 PCI: 00:04.0 [8086/0000] bus ops
880 20:52:53.224514 PCI: 00:04.0 [8086/9a03] enabled
881 20:52:53.227859 PCI: 00:05.0 [8086/9a19] enabled
882 20:52:53.231194 PCI: 00:07.0 [0000/0000] hidden
883 20:52:53.234548 PCI: 00:08.0 [8086/9a11] enabled
884 20:52:53.237873 PCI: 00:0a.0 [8086/9a0d] disabled
885 20:52:53.240558 PCI: 00:0d.0 [8086/0000] bus ops
886 20:52:53.243847 PCI: 00:0d.0 [8086/9a13] enabled
887 20:52:53.247104 PCI: 00:14.0 [8086/0000] bus ops
888 20:52:53.250460 PCI: 00:14.0 [8086/a0ed] enabled
889 20:52:53.253834 PCI: 00:14.2 [8086/a0ef] enabled
890 20:52:53.257208 PCI: 00:14.3 [8086/0000] bus ops
891 20:52:53.260489 PCI: 00:14.3 [8086/a0f0] enabled
892 20:52:53.263879 PCI: 00:15.0 [8086/0000] bus ops
893 20:52:53.267162 PCI: 00:15.0 [8086/a0e8] enabled
894 20:52:53.270458 PCI: 00:15.1 [8086/0000] bus ops
895 20:52:53.273721 PCI: 00:15.1 [8086/a0e9] enabled
896 20:52:53.276528 PCI: 00:15.2 [8086/0000] bus ops
897 20:52:53.279956 PCI: 00:15.2 [8086/a0ea] enabled
898 20:52:53.283251 PCI: 00:15.3 [8086/0000] bus ops
899 20:52:53.286472 PCI: 00:15.3 [8086/a0eb] enabled
900 20:52:53.289726 PCI: 00:16.0 [8086/0000] ops
901 20:52:53.293603 PCI: 00:16.0 [8086/a0e0] enabled
902 20:52:53.300141 PCI: Static device PCI: 00:17.0 not found, disabling it.
903 20:52:53.303542 PCI: 00:19.0 [8086/0000] bus ops
904 20:52:53.306840 PCI: 00:19.0 [8086/a0c5] disabled
905 20:52:53.309511 PCI: 00:19.1 [8086/0000] bus ops
906 20:52:53.312899 PCI: 00:19.1 [8086/a0c6] enabled
907 20:52:53.316183 PCI: 00:1d.0 [8086/0000] bus ops
908 20:52:53.319581 PCI: 00:1d.0 [8086/a0b0] enabled
909 20:52:53.322827 PCI: 00:1e.0 [8086/0000] ops
910 20:52:53.326083 PCI: 00:1e.0 [8086/a0a8] enabled
911 20:52:53.329521 PCI: 00:1e.2 [8086/0000] bus ops
912 20:52:53.332831 PCI: 00:1e.2 [8086/a0aa] enabled
913 20:52:53.336126 PCI: 00:1e.3 [8086/0000] bus ops
914 20:52:53.339488 PCI: 00:1e.3 [8086/a0ab] enabled
915 20:52:53.342833 PCI: 00:1f.0 [8086/0000] bus ops
916 20:52:53.346113 PCI: 00:1f.0 [8086/a087] enabled
917 20:52:53.346198 RTC Init
918 20:52:53.349356 Set power on after power failure.
919 20:52:53.352218
920 20:52:53.352293 Disabling Deep S3
921 20:52:53.355497 Disabling Deep S3
922 20:52:53.355566 Disabling Deep S4
923 20:52:53.358911 Disabling Deep S4
924 20:52:53.358981 Disabling Deep S5
925 20:52:53.362652 Disabling Deep S5
926 20:52:53.365382 PCI: 00:1f.2 [0000/0000] hidden
927 20:52:53.368707 PCI: 00:1f.3 [8086/0000] bus ops
928 20:52:53.372117 PCI: 00:1f.3 [8086/a0c8] enabled
929 20:52:53.375505 PCI: 00:1f.5 [8086/0000] bus ops
930 20:52:53.378844 PCI: 00:1f.5 [8086/a0a4] enabled
931 20:52:53.382184 PCI: Leftover static devices:
932 20:52:53.382259 PCI: 00:10.2
933 20:52:53.385527 PCI: 00:10.6
934 20:52:53.385596 PCI: 00:10.7
935 20:52:53.388709 PCI: 00:06.0
936 20:52:53.388776 PCI: 00:07.1
937 20:52:53.388834 PCI: 00:07.2
938 20:52:53.392079 PCI: 00:07.3
939 20:52:53.392148 PCI: 00:09.0
940 20:52:53.395364 PCI: 00:0d.1
941 20:52:53.395433 PCI: 00:0d.2
942 20:52:53.395492 PCI: 00:0d.3
943 20:52:53.398546 PCI: 00:0e.0
944 20:52:53.398618 PCI: 00:12.0
945 20:52:53.401854 PCI: 00:12.6
946 20:52:53.401921 PCI: 00:13.0
947 20:52:53.405283 PCI: 00:14.1
948 20:52:53.405349 PCI: 00:16.1
949 20:52:53.405414 PCI: 00:16.2
950 20:52:53.408733 PCI: 00:16.3
951 20:52:53.408804 PCI: 00:16.4
952 20:52:53.411999 PCI: 00:16.5
953 20:52:53.412067 PCI: 00:17.0
954 20:52:53.412124 PCI: 00:19.2
955 20:52:53.415259 PCI: 00:1e.1
956 20:52:53.415325 PCI: 00:1f.1
957 20:52:53.418586 PCI: 00:1f.4
958 20:52:53.418669 PCI: 00:1f.6
959 20:52:53.418735 PCI: 00:1f.7
960 20:52:53.421905
961 20:52:53.421988 PCI: Check your devicetree.cb.
962 20:52:53.425100 PCI: 00:02.0 scanning...
963 20:52:53.428313 scan_generic_bus for PCI: 00:02.0
964 20:52:53.431773 scan_generic_bus for PCI: 00:02.0 done
965 20:52:53.435175
966 20:52:53.438589 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
967 20:52:53.441902 PCI: 00:04.0 scanning...
968 20:52:53.445195 scan_generic_bus for PCI: 00:04.0
969 20:52:53.445270 GENERIC: 0.0 enabled
970 20:52:53.451293 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
971 20:52:53.458127 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
972 20:52:53.458210 PCI: 00:0d.0 scanning...
973 20:52:53.461534
974 20:52:53.464962 scan_static_bus for PCI: 00:0d.0
975 20:52:53.465045 USB0 port 0 enabled
976 20:52:53.467685 USB0 port 0 scanning...
977 20:52:53.471095 scan_static_bus for USB0 port 0
978 20:52:53.474443 USB3 port 0 enabled
979 20:52:53.474527 USB3 port 1 enabled
980 20:52:53.477776 USB3 port 2 disabled
981 20:52:53.481077 USB3 port 3 disabled
982 20:52:53.481160 USB3 port 0 scanning...
983 20:52:53.484291 scan_static_bus for USB3 port 0
984 20:52:53.487576 scan_static_bus for USB3 port 0 done
985 20:52:53.494029 scan_bus: bus USB3 port 0 finished in 6 msecs
986 20:52:53.497291 USB3 port 1 scanning...
987 20:52:53.500535 scan_static_bus for USB3 port 1
988 20:52:53.504385 scan_static_bus for USB3 port 1 done
989 20:52:53.507826 scan_bus: bus USB3 port 1 finished in 6 msecs
990 20:52:53.511116 scan_static_bus for USB0 port 0 done
991 20:52:53.517211 scan_bus: bus USB0 port 0 finished in 43 msecs
992 20:52:53.520556 scan_static_bus for PCI: 00:0d.0 done
993 20:52:53.523875 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
994 20:52:53.527087 PCI: 00:14.0 scanning...
995 20:52:53.530908 scan_static_bus for PCI: 00:14.0
996 20:52:53.534275 USB0 port 0 enabled
997 20:52:53.536942 USB0 port 0 scanning...
998 20:52:53.540237 scan_static_bus for USB0 port 0
999 20:52:53.540314 USB2 port 0 disabled
1000 20:52:53.543585 USB2 port 1 enabled
1001 20:52:53.543673 USB2 port 2 enabled
1002 20:52:53.546967
1003 20:52:53.547037 USB2 port 3 disabled
1004 20:52:53.550305 USB2 port 4 enabled
1005 20:52:53.550375 USB2 port 5 disabled
1006 20:52:53.553662 USB2 port 6 disabled
1007 20:52:53.557072 USB2 port 7 disabled
1008 20:52:53.557141 USB2 port 8 disabled
1009 20:52:53.560548 USB2 port 9 disabled
1010 20:52:53.563255 USB3 port 0 disabled
1011 20:52:53.563323 USB3 port 1 enabled
1012 20:52:53.566674 USB3 port 2 disabled
1013 20:52:53.570150 USB3 port 3 disabled
1014 20:52:53.570218 USB2 port 1 scanning...
1015 20:52:53.573465 scan_static_bus for USB2 port 1
1016 20:52:53.580262 scan_static_bus for USB2 port 1 done
1017 20:52:53.583593 scan_bus: bus USB2 port 1 finished in 6 msecs
1018 20:52:53.586231 USB2 port 2 scanning...
1019 20:52:53.590244 scan_static_bus for USB2 port 2
1020 20:52:53.592835 scan_static_bus for USB2 port 2 done
1021 20:52:53.596648 scan_bus: bus USB2 port 2 finished in 6 msecs
1022 20:52:53.599980 USB2 port 4 scanning...
1023 20:52:53.603196 scan_static_bus for USB2 port 4
1024 20:52:53.606429 scan_static_bus for USB2 port 4 done
1025 20:52:53.609773 scan_bus: bus USB2 port 4 finished in 6 msecs
1026 20:52:53.613091
1027 20:52:53.613159 USB3 port 1 scanning...
1028 20:52:53.616490 scan_static_bus for USB3 port 1
1029 20:52:53.619693 scan_static_bus for USB3 port 1 done
1030 20:52:53.626214 scan_bus: bus USB3 port 1 finished in 6 msecs
1031 20:52:53.629572 scan_static_bus for USB0 port 0 done
1032 20:52:53.632661 scan_bus: bus USB0 port 0 finished in 93 msecs
1033 20:52:53.639457 scan_static_bus for PCI: 00:14.0 done
1034 20:52:53.642642 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1035 20:52:53.646080 PCI: 00:14.3 scanning...
1036 20:52:53.648914 scan_static_bus for PCI: 00:14.3
1037 20:52:53.648986 GENERIC: 0.0 enabled
1038 20:52:53.652211
1039 20:52:53.655663 scan_static_bus for PCI: 00:14.3 done
1040 20:52:53.659014 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1041 20:52:53.662446 PCI: 00:15.0 scanning...
1042 20:52:53.665810 scan_static_bus for PCI: 00:15.0
1043 20:52:53.668529 I2C: 00:1a enabled
1044 20:52:53.668605 I2C: 00:31 enabled
1045 20:52:53.671858 I2C: 00:32 enabled
1046 20:52:53.675346 scan_static_bus for PCI: 00:15.0 done
1047 20:52:53.678709 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1048 20:52:53.681957 PCI: 00:15.1 scanning...
1049 20:52:53.685360 scan_static_bus for PCI: 00:15.1
1050 20:52:53.688745 I2C: 00:10 enabled
1051 20:52:53.692087 scan_static_bus for PCI: 00:15.1 done
1052 20:52:53.695283 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1053 20:52:53.698649 PCI: 00:15.2 scanning...
1054 20:52:53.701973 scan_static_bus for PCI: 00:15.2
1055 20:52:53.705231 scan_static_bus for PCI: 00:15.2 done
1056 20:52:53.711881 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1057 20:52:53.715188 PCI: 00:15.3 scanning...
1058 20:52:53.718521 scan_static_bus for PCI: 00:15.3
1059 20:52:53.721787 scan_static_bus for PCI: 00:15.3 done
1060 20:52:53.725107 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1061 20:52:53.728416 PCI: 00:19.1 scanning...
1062 20:52:53.731674 scan_static_bus for PCI: 00:19.1
1063 20:52:53.734871 I2C: 00:15 enabled
1064 20:52:53.738415 scan_static_bus for PCI: 00:19.1 done
1065 20:52:53.741657 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1066 20:52:53.744993 PCI: 00:1d.0 scanning...
1067 20:52:53.747815 do_pci_scan_bridge for PCI: 00:1d.0
1068 20:52:53.751269 PCI: pci_scan_bus for bus 01
1069 20:52:53.754528 PCI: 01:00.0 [15b7/5009] enabled
1070 20:52:53.757865 GENERIC: 0.0 enabled
1071 20:52:53.761192 Enabling Common Clock Configuration
1072 20:52:53.764621 L1 Sub-State supported from root port 29
1073 20:52:53.767911 L1 Sub-State Support = 0x5
1074 20:52:53.771270 CommonModeRestoreTime = 0x28
1075 20:52:53.774661 Power On Value = 0x16, Power On Scale = 0x0
1076 20:52:53.778004 ASPM: Enabled L1
1077 20:52:53.780770 PCIe: Max_Payload_Size adjusted to 128
1078 20:52:53.784815 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1079 20:52:53.788142 PCI: 00:1e.2 scanning...
1080 20:52:53.791658 scan_generic_bus for PCI: 00:1e.2
1081 20:52:53.794868 SPI: 00 enabled
1082 20:52:53.798050 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1083 20:52:53.804732 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1084 20:52:53.807903 PCI: 00:1e.3 scanning...
1085 20:52:53.811116 scan_generic_bus for PCI: 00:1e.3
1086 20:52:53.811192 SPI: 00 enabled
1087 20:52:53.817949 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1088 20:52:53.824481 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1089 20:52:53.824557 PCI: 00:1f.0 scanning...
1090 20:52:53.827856 scan_static_bus for PCI: 00:1f.0
1091 20:52:53.831250 PNP: 0c09.0 enabled
1092 20:52:53.834511 PNP: 0c09.0 scanning...
1093 20:52:53.837925 scan_static_bus for PNP: 0c09.0
1094 20:52:53.841250 scan_static_bus for PNP: 0c09.0 done
1095 20:52:53.843925 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1096 20:52:53.847250 scan_static_bus for PCI: 00:1f.0 done
1097 20:52:53.854146 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1098 20:52:53.857321 PCI: 00:1f.2 scanning...
1099 20:52:53.860678 scan_static_bus for PCI: 00:1f.2
1100 20:52:53.860753 GENERIC: 0.0 enabled
1101 20:52:53.864104 GENERIC: 0.0 scanning...
1102 20:52:53.867533 scan_static_bus for GENERIC: 0.0
1103 20:52:53.870795 GENERIC: 0.0 enabled
1104 20:52:53.874239 GENERIC: 1.0 enabled
1105 20:52:53.878015 scan_static_bus for GENERIC: 0.0 done
1106 20:52:53.880679 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1107 20:52:53.884019 scan_static_bus for PCI: 00:1f.2 done
1108 20:52:53.890764 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1109 20:52:53.893543 PCI: 00:1f.3 scanning...
1110 20:52:53.896887 scan_static_bus for PCI: 00:1f.3
1111 20:52:53.900240 scan_static_bus for PCI: 00:1f.3 done
1112 20:52:53.903324 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1113 20:52:53.906481 PCI: 00:1f.5 scanning...
1114 20:52:53.910384 scan_generic_bus for PCI: 00:1f.5
1115 20:52:53.913593 scan_generic_bus for PCI: 00:1f.5 done
1116 20:52:53.920125 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1117 20:52:53.923368 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1118 20:52:53.926621 scan_static_bus for Root Device done
1119 20:52:53.933268 scan_bus: bus Root Device finished in 735 msecs
1120 20:52:53.933352 done
1121 20:52:53.939760 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1122 20:52:53.943222 Chrome EC: UHEPI supported
1123 20:52:53.949290 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1124 20:52:53.956061 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1125 20:52:53.959401 SPI flash protection: WPSW=0 SRP0=1
1126 20:52:53.962732 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1127 20:52:53.968815 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1128 20:52:53.972260 found VGA at PCI: 00:02.0
1129 20:52:53.975636 Setting up VGA for PCI: 00:02.0
1130 20:52:53.979032 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1131 20:52:53.985797 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1132 20:52:53.988506 Allocating resources...
1133 20:52:53.988596 Reading resources...
1134 20:52:53.991947 Root Device read_resources bus 0 link: 0
1135 20:52:53.998637 DOMAIN: 0000 read_resources bus 0 link: 0
1136 20:52:54.001970 PCI: 00:04.0 read_resources bus 1 link: 0
1137 20:52:54.009110 PCI: 00:04.0 read_resources bus 1 link: 0 done
1138 20:52:54.011814 PCI: 00:0d.0 read_resources bus 0 link: 0
1139 20:52:54.018402 USB0 port 0 read_resources bus 0 link: 0
1140 20:52:54.021709 USB0 port 0 read_resources bus 0 link: 0 done
1141 20:52:54.028398 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1142 20:52:54.031737 PCI: 00:14.0 read_resources bus 0 link: 0
1143 20:52:54.035128 USB0 port 0 read_resources bus 0 link: 0
1144 20:52:54.042415 USB0 port 0 read_resources bus 0 link: 0 done
1145 20:52:54.045720 PCI: 00:14.0 read_resources bus 0 link: 0 done
1146 20:52:54.053077 PCI: 00:14.3 read_resources bus 0 link: 0
1147 20:52:54.056449 PCI: 00:14.3 read_resources bus 0 link: 0 done
1148 20:52:54.063055 PCI: 00:15.0 read_resources bus 0 link: 0
1149 20:52:54.065873 PCI: 00:15.0 read_resources bus 0 link: 0 done
1150 20:52:54.072680 PCI: 00:15.1 read_resources bus 0 link: 0
1151 20:52:54.076062 PCI: 00:15.1 read_resources bus 0 link: 0 done
1152 20:52:54.083434 PCI: 00:19.1 read_resources bus 0 link: 0
1153 20:52:54.086796 PCI: 00:19.1 read_resources bus 0 link: 0 done
1154 20:52:54.092852 PCI: 00:1d.0 read_resources bus 1 link: 0
1155 20:52:54.096253 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1156 20:52:54.103047 PCI: 00:1e.2 read_resources bus 2 link: 0
1157 20:52:54.106416 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1158 20:52:54.113120 PCI: 00:1e.3 read_resources bus 3 link: 0
1159 20:52:54.116369 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1160 20:52:54.122911 PCI: 00:1f.0 read_resources bus 0 link: 0
1161 20:52:54.126280 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1162 20:52:54.129596 PCI: 00:1f.2 read_resources bus 0 link: 0
1163 20:52:54.132958
1164 20:52:54.136021 GENERIC: 0.0 read_resources bus 0 link: 0
1165 20:52:54.139259 GENERIC: 0.0 read_resources bus 0 link: 0 done
1166 20:52:54.143022
1167 20:52:54.145830 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1168 20:52:54.152498 DOMAIN: 0000 read_resources bus 0 link: 0 done
1169 20:52:54.155913 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1170 20:52:54.162021 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1171 20:52:54.165321 Root Device read_resources bus 0 link: 0 done
1172 20:52:54.168821 Done reading resources.
1173 20:52:54.175498 Show resources in subtree (Root Device)...After reading.
1174 20:52:54.178866 Root Device child on link 0 DOMAIN: 0000
1175 20:52:54.182207 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1176 20:52:54.192179 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1177 20:52:54.201618 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1178 20:52:54.205051 PCI: 00:00.0
1179 20:52:54.211545 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1180 20:52:54.221264 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1181 20:52:54.231338 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1182 20:52:54.241326 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1183 20:52:54.251124 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1184 20:52:54.261228 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1185 20:52:54.271211 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1186 20:52:54.277477 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1187 20:52:54.287476 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1188 20:52:54.297618 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1189 20:52:54.307594 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1190 20:52:54.317521 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1191 20:52:54.327362 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1192 20:52:54.333872 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1193 20:52:54.343895 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1194 20:52:54.353915 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1195 20:52:54.363961 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1196 20:52:54.373701 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1197 20:52:54.383718 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1198 20:52:54.393964 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1199 20:52:54.394409 PCI: 00:02.0
1200 20:52:54.403522 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1201 20:52:54.413463 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1202 20:52:54.423006 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1203 20:52:54.426241 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1204 20:52:54.436236 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1205 20:52:54.439649 GENERIC: 0.0
1206 20:52:54.440090 PCI: 00:05.0
1207 20:52:54.449560 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1208 20:52:54.452973
1209 20:52:54.456398 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1210 20:52:54.456839 GENERIC: 0.0
1211 20:52:54.458979 PCI: 00:08.0
1212 20:52:54.468964 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1213 20:52:54.469627 PCI: 00:0a.0
1214 20:52:54.475917 PCI: 00:0d.0 child on link 0 USB0 port 0
1215 20:52:54.486097 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1216 20:52:54.489618 USB0 port 0 child on link 0 USB3 port 0
1217 20:52:54.492085 USB3 port 0
1218 20:52:54.492533 USB3 port 1
1219 20:52:54.495382 USB3 port 2
1220 20:52:54.495882 USB3 port 3
1221 20:52:54.502600 PCI: 00:14.0 child on link 0 USB0 port 0
1222 20:52:54.512040 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1223 20:52:54.515452 USB0 port 0 child on link 0 USB2 port 0
1224 20:52:54.518609 USB2 port 0
1225 20:52:54.519044 USB2 port 1
1226 20:52:54.522008 USB2 port 2
1227 20:52:54.522443 USB2 port 3
1228 20:52:54.525308 USB2 port 4
1229 20:52:54.525841 USB2 port 5
1230 20:52:54.528467 USB2 port 6
1231 20:52:54.528920 USB2 port 7
1232 20:52:54.531835 USB2 port 8
1233 20:52:54.532263 USB2 port 9
1234 20:52:54.535242 USB3 port 0
1235 20:52:54.535668 USB3 port 1
1236 20:52:54.538595 USB3 port 2
1237 20:52:54.539024 USB3 port 3
1238 20:52:54.541820
1239 20:52:54.542252 PCI: 00:14.2
1240 20:52:54.551778 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1241 20:52:54.561624 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1242 20:52:54.564990 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1243 20:52:54.575120 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1244 20:52:54.578312 GENERIC: 0.0
1245 20:52:54.581641 PCI: 00:15.0 child on link 0 I2C: 00:1a
1246 20:52:54.591717 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 20:52:54.595045 I2C: 00:1a
1248 20:52:54.595472 I2C: 00:31
1249 20:52:54.598424 I2C: 00:32
1250 20:52:54.601695 PCI: 00:15.1 child on link 0 I2C: 00:10
1251 20:52:54.611187 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1252 20:52:54.611628 I2C: 00:10
1253 20:52:54.614450 PCI: 00:15.2
1254 20:52:54.624336 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1255 20:52:54.624778 PCI: 00:15.3
1256 20:52:54.634808 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1257 20:52:54.637921 PCI: 00:16.0
1258 20:52:54.647999 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1259 20:52:54.648435 PCI: 00:19.0
1260 20:52:54.654425 PCI: 00:19.1 child on link 0 I2C: 00:15
1261 20:52:54.664710 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1262 20:52:54.665250 I2C: 00:15
1263 20:52:54.670814 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1264 20:52:54.677222 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1265 20:52:54.687258 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1266 20:52:54.697348 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1267 20:52:54.697810 GENERIC: 0.0
1268 20:52:54.700725
1269 20:52:54.701154 PCI: 01:00.0
1270 20:52:54.710261 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1271 20:52:54.720107 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1272 20:52:54.723417 PCI: 00:1e.0
1273 20:52:54.733143 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1274 20:52:54.736630 PCI: 00:1e.2 child on link 0 SPI: 00
1275 20:52:54.746579 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1276 20:52:54.749859 SPI: 00
1277 20:52:54.753209 PCI: 00:1e.3 child on link 0 SPI: 00
1278 20:52:54.763221 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1279 20:52:54.763759 SPI: 00
1280 20:52:54.769275 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1281 20:52:54.775932 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1282 20:52:54.779305 PNP: 0c09.0
1283 20:52:54.785942 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1284 20:52:54.792660 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1285 20:52:54.802137 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1286 20:52:54.808981 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1287 20:52:54.815562 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1288 20:52:54.816080 GENERIC: 0.0
1289 20:52:54.819024 GENERIC: 1.0
1290 20:52:54.819418 PCI: 00:1f.3
1291 20:52:54.829241 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1292 20:52:54.842278 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1293 20:52:54.842729 PCI: 00:1f.5
1294 20:52:54.852092 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1295 20:52:54.855035 CPU_CLUSTER: 0 child on link 0 APIC: 00
1296 20:52:54.855507 APIC: 00
1297 20:52:54.858213
1298 20:52:54.858666 APIC: 01
1299 20:52:54.859132 APIC: 05
1300 20:52:54.861502 APIC: 07
1301 20:52:54.861942 APIC: 02
1302 20:52:54.862381 APIC: 04
1303 20:52:54.864899 APIC: 06
1304 20:52:54.865335 APIC: 03
1305 20:52:54.874910 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1306 20:52:54.878304 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1307 20:52:54.885251 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1308 20:52:54.891099 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1309 20:52:54.894355 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1310 20:52:54.901274 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1311 20:52:54.907789 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1312 20:52:54.914493 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1313 20:52:54.921472 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1314 20:52:54.927974 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1315 20:52:54.934454 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1316 20:52:54.944402 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1317 20:52:54.950939 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1318 20:52:54.957469 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1319 20:52:54.960752 DOMAIN: 0000: Resource ranges:
1320 20:52:54.964201 * Base: 1000, Size: 800, Tag: 100
1321 20:52:54.967790 * Base: 1900, Size: e700, Tag: 100
1322 20:52:54.974297 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1323 20:52:54.980301 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1324 20:52:54.986901 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1325 20:52:54.993660 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1326 20:52:55.003965 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1327 20:52:55.009923 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1328 20:52:55.016791 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1329 20:52:55.026691 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1330 20:52:55.033336 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1331 20:52:55.039841 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1332 20:52:55.049811 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1333 20:52:55.056319 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1334 20:52:55.063045 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1335 20:52:55.073073 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1336 20:52:55.079053 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1337 20:52:55.085709 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1338 20:52:55.095859 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1339 20:52:55.102469 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1340 20:52:55.108980 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1341 20:52:55.118715 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1342 20:52:55.125336 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1343 20:52:55.131945 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1344 20:52:55.141873 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1345 20:52:55.148616 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1346 20:52:55.155402 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1347 20:52:55.158667 DOMAIN: 0000: Resource ranges:
1348 20:52:55.165226 * Base: 7fc00000, Size: 40400000, Tag: 200
1349 20:52:55.168590 * Base: d0000000, Size: 28000000, Tag: 200
1350 20:52:55.171883 * Base: fa000000, Size: 1000000, Tag: 200
1351 20:52:55.178718 * Base: fb001000, Size: 2fff000, Tag: 200
1352 20:52:55.181346 * Base: fe010000, Size: 2e000, Tag: 200
1353 20:52:55.184878 * Base: fe03f000, Size: d41000, Tag: 200
1354 20:52:55.188050 * Base: fed88000, Size: 8000, Tag: 200
1355 20:52:55.195164 * Base: fed93000, Size: d000, Tag: 200
1356 20:52:55.198279 * Base: feda2000, Size: 1e000, Tag: 200
1357 20:52:55.201554 * Base: fede0000, Size: 1220000, Tag: 200
1358 20:52:55.208538 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1359 20:52:55.215003 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1360 20:52:55.221458 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1361 20:52:55.228301 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1362 20:52:55.234821 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1363 20:52:55.241396 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1364 20:52:55.248073 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1365 20:52:55.254074 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1366 20:52:55.261413 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1367 20:52:55.267234 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1368 20:52:55.273788 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1369 20:52:55.280461 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1370 20:52:55.287161 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1371 20:52:55.293996 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1372 20:52:55.300570 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1373 20:52:55.307362 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1374 20:52:55.314002 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1375 20:52:55.320860 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1376 20:52:55.326919 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1377 20:52:55.333557 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1378 20:52:55.340518 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1379 20:52:55.347196 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1380 20:52:55.353772 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1381 20:52:55.360313 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1382 20:52:55.369798 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1383 20:52:55.372992 PCI: 00:1d.0: Resource ranges:
1384 20:52:55.376384 * Base: 7fc00000, Size: 100000, Tag: 200
1385 20:52:55.383428 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1386 20:52:55.389957 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1387 20:52:55.396788 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1388 20:52:55.406114 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1389 20:52:55.409610 Root Device assign_resources, bus 0 link: 0
1390 20:52:55.413113 DOMAIN: 0000 assign_resources, bus 0 link: 0
1391 20:52:55.423007 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1392 20:52:55.429576 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1393 20:52:55.439567 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1394 20:52:55.446232 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1395 20:52:55.453088 PCI: 00:04.0 assign_resources, bus 1 link: 0
1396 20:52:55.456049 PCI: 00:04.0 assign_resources, bus 1 link: 0
1397 20:52:55.465948 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1398 20:52:55.472694 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1399 20:52:55.482113 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1400 20:52:55.485367 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1401 20:52:55.488667 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1402 20:52:55.499023 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1403 20:52:55.502340 PCI: 00:14.0 assign_resources, bus 0 link: 0
1404 20:52:55.508521 PCI: 00:14.0 assign_resources, bus 0 link: 0
1405 20:52:55.515147 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1406 20:52:55.524968 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1407 20:52:55.531406 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1408 20:52:55.534680 PCI: 00:14.3 assign_resources, bus 0 link: 0
1409 20:52:55.542005 PCI: 00:14.3 assign_resources, bus 0 link: 0
1410 20:52:55.548607 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1411 20:52:55.554608 PCI: 00:15.0 assign_resources, bus 0 link: 0
1412 20:52:55.558055 PCI: 00:15.0 assign_resources, bus 0 link: 0
1413 20:52:55.568519 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1414 20:52:55.571244 PCI: 00:15.1 assign_resources, bus 0 link: 0
1415 20:52:55.574431 PCI: 00:15.1 assign_resources, bus 0 link: 0
1416 20:52:55.584566 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1417 20:52:55.591314 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1418 20:52:55.601342 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1419 20:52:55.607714 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1420 20:52:55.614824 PCI: 00:19.1 assign_resources, bus 0 link: 0
1421 20:52:55.617449 PCI: 00:19.1 assign_resources, bus 0 link: 0
1422 20:52:55.627423 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1423 20:52:55.637626 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1424 20:52:55.644356 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1425 20:52:55.650912 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1426 20:52:55.657614 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1427 20:52:55.667569 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1428 20:52:55.670922 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1429 20:52:55.680630 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1430 20:52:55.683271 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1431 20:52:55.686707 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1432 20:52:55.696760 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1433 20:52:55.700186 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1434 20:52:55.706928 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1435 20:52:55.710283 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1436 20:52:55.716971 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1437 20:52:55.720303 LPC: Trying to open IO window from 800 size 1ff
1438 20:52:55.730453 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1439 20:52:55.736495 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1440 20:52:55.743158 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1441 20:52:55.746487
1442 20:52:55.749824 DOMAIN: 0000 assign_resources, bus 0 link: 0
1443 20:52:55.752944 Root Device assign_resources, bus 0 link: 0
1444 20:52:55.756161 Done setting resources.
1445 20:52:55.762881 Show resources in subtree (Root Device)...After assigning values.
1446 20:52:55.766099 Root Device child on link 0 DOMAIN: 0000
1447 20:52:55.772687 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1448 20:52:55.779354 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1449 20:52:55.782976
1450 20:52:55.789732 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1451 20:52:55.792292
1452 20:52:55.792732 PCI: 00:00.0
1453 20:52:55.802328 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1454 20:52:55.812317 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1455 20:52:55.822058 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1456 20:52:55.829337 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1457 20:52:55.838826 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1458 20:52:55.848922 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1459 20:52:55.858893 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1460 20:52:55.868967 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1461 20:52:55.878919 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1462 20:52:55.885357 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1463 20:52:55.895367 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1464 20:52:55.905337 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1465 20:52:55.915399 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1466 20:52:55.924783 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1467 20:52:55.931490 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1468 20:52:55.941634 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1469 20:52:55.951549 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1470 20:52:55.961346 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1471 20:52:55.971327 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1472 20:52:55.981404 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1473 20:52:55.981848 PCI: 00:02.0
1474 20:52:55.994574 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1475 20:52:56.004012 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1476 20:52:56.014142 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1477 20:52:56.017527 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1478 20:52:56.027381 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1479 20:52:56.030784 GENERIC: 0.0
1480 20:52:56.031220 PCI: 00:05.0
1481 20:52:56.040650 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1482 20:52:56.047415 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1483 20:52:56.047853 GENERIC: 0.0
1484 20:52:56.050728 PCI: 00:08.0
1485 20:52:56.060676 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1486 20:52:56.061116 PCI: 00:0a.0
1487 20:52:56.067268 PCI: 00:0d.0 child on link 0 USB0 port 0
1488 20:52:56.077253 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1489 20:52:56.080598 USB0 port 0 child on link 0 USB3 port 0
1490 20:52:56.083288 USB3 port 0
1491 20:52:56.083727 USB3 port 1
1492 20:52:56.086658 USB3 port 2
1493 20:52:56.087092 USB3 port 3
1494 20:52:56.093383 PCI: 00:14.0 child on link 0 USB0 port 0
1495 20:52:56.103979 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1496 20:52:56.107036 USB0 port 0 child on link 0 USB2 port 0
1497 20:52:56.110244 USB2 port 0
1498 20:52:56.110703 USB2 port 1
1499 20:52:56.113792 USB2 port 2
1500 20:52:56.114223 USB2 port 3
1501 20:52:56.116473 USB2 port 4
1502 20:52:56.116923 USB2 port 5
1503 20:52:56.119895 USB2 port 6
1504 20:52:56.120331 USB2 port 7
1505 20:52:56.123215
1506 20:52:56.123649 USB2 port 8
1507 20:52:56.126586 USB2 port 9
1508 20:52:56.127016 USB3 port 0
1509 20:52:56.130047 USB3 port 1
1510 20:52:56.130481 USB3 port 2
1511 20:52:56.132823 USB3 port 3
1512 20:52:56.133254 PCI: 00:14.2
1513 20:52:56.142836 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1514 20:52:56.152949 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1515 20:52:56.156206
1516 20:52:56.159572 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1517 20:52:56.169426 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1518 20:52:56.172815 GENERIC: 0.0
1519 20:52:56.176104 PCI: 00:15.0 child on link 0 I2C: 00:1a
1520 20:52:56.185710 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1521 20:52:56.186152 I2C: 00:1a
1522 20:52:56.189117 I2C: 00:31
1523 20:52:56.189567 I2C: 00:32
1524 20:52:56.196055 PCI: 00:15.1 child on link 0 I2C: 00:10
1525 20:52:56.206148 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1526 20:52:56.206740 I2C: 00:10
1527 20:52:56.209392 PCI: 00:15.2
1528 20:52:56.218841 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1529 20:52:56.219435 PCI: 00:15.3
1530 20:52:56.232060 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1531 20:52:56.232682 PCI: 00:16.0
1532 20:52:56.242290 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1533 20:52:56.244936 PCI: 00:19.0
1534 20:52:56.248385 PCI: 00:19.1 child on link 0 I2C: 00:15
1535 20:52:56.258473 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1536 20:52:56.261673 I2C: 00:15
1537 20:52:56.264982 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1538 20:52:56.275106 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1539 20:52:56.284369 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1540 20:52:56.298083 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1541 20:52:56.298638 GENERIC: 0.0
1542 20:52:56.301011 PCI: 01:00.0
1543 20:52:56.311337 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1544 20:52:56.320736 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1545 20:52:56.321208 PCI: 00:1e.0
1546 20:52:56.334148 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1547 20:52:56.337483 PCI: 00:1e.2 child on link 0 SPI: 00
1548 20:52:56.347552 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1549 20:52:56.348005 SPI: 00
1550 20:52:56.350373
1551 20:52:56.353613 PCI: 00:1e.3 child on link 0 SPI: 00
1552 20:52:56.363447 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1553 20:52:56.363888 SPI: 00
1554 20:52:56.369993 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1555 20:52:56.377234 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1556 20:52:56.379894 PNP: 0c09.0
1557 20:52:56.386497 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1558 20:52:56.393323 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1559 20:52:56.403292 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1560 20:52:56.410056 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1561 20:52:56.416710 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1562 20:52:56.417139 GENERIC: 0.0
1563 20:52:56.419833 GENERIC: 1.0
1564 20:52:56.419916 PCI: 00:1f.3
1565 20:52:56.432564 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1566 20:52:56.442439 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1567 20:52:56.442554 PCI: 00:1f.5
1568 20:52:56.452552 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1569 20:52:56.459479 CPU_CLUSTER: 0 child on link 0 APIC: 00
1570 20:52:56.459911 APIC: 00
1571 20:52:56.460250 APIC: 01
1572 20:52:56.462705 APIC: 05
1573 20:52:56.463139 APIC: 07
1574 20:52:56.465874 APIC: 02
1575 20:52:56.466318 APIC: 04
1576 20:52:56.466654 APIC: 06
1577 20:52:56.469245 APIC: 03
1578 20:52:56.472604 Done allocating resources.
1579 20:52:56.475747 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1580 20:52:56.483060 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1581 20:52:56.486274 Configure GPIOs for I2S audio on UP4.
1582 20:52:56.493691 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1583 20:52:56.496994 Enabling resources...
1584 20:52:56.500231 PCI: 00:00.0 subsystem <- 8086/9a12
1585 20:52:56.503563 PCI: 00:00.0 cmd <- 06
1586 20:52:56.506874 PCI: 00:02.0 subsystem <- 8086/9a40
1587 20:52:56.509669 PCI: 00:02.0 cmd <- 03
1588 20:52:56.513012 PCI: 00:04.0 subsystem <- 8086/9a03
1589 20:52:56.516417 PCI: 00:04.0 cmd <- 02
1590 20:52:56.519671 PCI: 00:05.0 subsystem <- 8086/9a19
1591 20:52:56.520109 PCI: 00:05.0 cmd <- 02
1592 20:52:56.526497 PCI: 00:08.0 subsystem <- 8086/9a11
1593 20:52:56.526923 PCI: 00:08.0 cmd <- 06
1594 20:52:56.530022 PCI: 00:0d.0 subsystem <- 8086/9a13
1595 20:52:56.533287 PCI: 00:0d.0 cmd <- 02
1596 20:52:56.536654 PCI: 00:14.0 subsystem <- 8086/a0ed
1597 20:52:56.540012 PCI: 00:14.0 cmd <- 02
1598 20:52:56.543310 PCI: 00:14.2 subsystem <- 8086/a0ef
1599 20:52:56.545930 PCI: 00:14.2 cmd <- 02
1600 20:52:56.549319 PCI: 00:14.3 subsystem <- 8086/a0f0
1601 20:52:56.552669 PCI: 00:14.3 cmd <- 02
1602 20:52:56.556030 PCI: 00:15.0 subsystem <- 8086/a0e8
1603 20:52:56.559432 PCI: 00:15.0 cmd <- 02
1604 20:52:56.562798 PCI: 00:15.1 subsystem <- 8086/a0e9
1605 20:52:56.566157 PCI: 00:15.1 cmd <- 02
1606 20:52:56.569473 PCI: 00:15.2 subsystem <- 8086/a0ea
1607 20:52:56.569906 PCI: 00:15.2 cmd <- 02
1608 20:52:56.576202 PCI: 00:15.3 subsystem <- 8086/a0eb
1609 20:52:56.576633 PCI: 00:15.3 cmd <- 02
1610 20:52:56.579572 PCI: 00:16.0 subsystem <- 8086/a0e0
1611 20:52:56.582839 PCI: 00:16.0 cmd <- 02
1612 20:52:56.586154 PCI: 00:19.1 subsystem <- 8086/a0c6
1613 20:52:56.589423 PCI: 00:19.1 cmd <- 02
1614 20:52:56.592761 PCI: 00:1d.0 bridge ctrl <- 0013
1615 20:52:56.596290 PCI: 00:1d.0 subsystem <- 8086/a0b0
1616 20:52:56.599316 PCI: 00:1d.0 cmd <- 06
1617 20:52:56.602703 PCI: 00:1e.0 subsystem <- 8086/a0a8
1618 20:52:56.605424 PCI: 00:1e.0 cmd <- 06
1619 20:52:56.609532 PCI: 00:1e.2 subsystem <- 8086/a0aa
1620 20:52:56.611939 PCI: 00:1e.2 cmd <- 06
1621 20:52:56.615270 PCI: 00:1e.3 subsystem <- 8086/a0ab
1622 20:52:56.618670 PCI: 00:1e.3 cmd <- 02
1623 20:52:56.621922 PCI: 00:1f.0 subsystem <- 8086/a087
1624 20:52:56.625402 PCI: 00:1f.0 cmd <- 407
1625 20:52:56.628736 PCI: 00:1f.3 subsystem <- 8086/a0c8
1626 20:52:56.629194 PCI: 00:1f.3 cmd <- 02
1627 20:52:56.635572 PCI: 00:1f.5 subsystem <- 8086/a0a4
1628 20:52:56.636102 PCI: 00:1f.5 cmd <- 406
1629 20:52:56.640182 PCI: 01:00.0 cmd <- 02
1630 20:52:56.644805 done.
1631 20:52:56.648304 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1632 20:52:56.651642 Initializing devices...
1633 20:52:56.654930 Root Device init
1634 20:52:56.658335 Chrome EC: Set SMI mask to 0x0000000000000000
1635 20:52:56.665113 Chrome EC: clear events_b mask to 0x0000000000000000
1636 20:52:56.671047 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1637 20:52:56.674377 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1638 20:52:56.681492 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1639 20:52:56.688212 Chrome EC: Set WAKE mask to 0x0000000000000000
1640 20:52:56.690945 fw_config match found: DB_USB=USB3_ACTIVE
1641 20:52:56.698204 Configure Right Type-C port orientation for retimer
1642 20:52:56.701429 Root Device init finished in 42 msecs
1643 20:52:56.704717 PCI: 00:00.0 init
1644 20:52:56.705159 CPU TDP = 9 Watts
1645 20:52:56.707506
1646 20:52:56.707937 CPU PL1 = 9 Watts
1647 20:52:56.711037 CPU PL2 = 40 Watts
1648 20:52:56.711567 CPU PL4 = 83 Watts
1649 20:52:56.714084 PCI: 00:00.0 init finished in 8 msecs
1650 20:52:56.717557 PCI: 00:02.0 init
1651 20:52:56.720806 GMA: Found VBT in CBFS
1652 20:52:56.724263 GMA: Found valid VBT in CBFS
1653 20:52:56.727365 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1654 20:52:56.737455 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1655 20:52:56.740926 PCI: 00:02.0 init finished in 18 msecs
1656 20:52:56.744253 PCI: 00:05.0 init
1657 20:52:56.747716 PCI: 00:05.0 init finished in 0 msecs
1658 20:52:56.748148 PCI: 00:08.0 init
1659 20:52:56.750938
1660 20:52:56.754092 PCI: 00:08.0 init finished in 0 msecs
1661 20:52:56.754528 PCI: 00:14.0 init
1662 20:52:56.756990
1663 20:52:56.760418 PCI: 00:14.0 init finished in 0 msecs
1664 20:52:56.760934 PCI: 00:14.2 init
1665 20:52:56.763832 PCI: 00:14.2 init finished in 0 msecs
1666 20:52:56.767775 PCI: 00:15.0 init
1667 20:52:56.771074 I2C bus 0 version 0x3230302a
1668 20:52:56.773985 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1669 20:52:56.777280 PCI: 00:15.0 init finished in 6 msecs
1670 20:52:56.780602 PCI: 00:15.1 init
1671 20:52:56.784026 I2C bus 1 version 0x3230302a
1672 20:52:56.787361 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1673 20:52:56.790624 PCI: 00:15.1 init finished in 6 msecs
1674 20:52:56.793998 PCI: 00:15.2 init
1675 20:52:56.797268 I2C bus 2 version 0x3230302a
1676 20:52:56.800692 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1677 20:52:56.804153 PCI: 00:15.2 init finished in 6 msecs
1678 20:52:56.807254 PCI: 00:15.3 init
1679 20:52:56.807692 I2C bus 3 version 0x3230302a
1680 20:52:56.814080 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1681 20:52:56.817560 PCI: 00:15.3 init finished in 6 msecs
1682 20:52:56.818137 PCI: 00:16.0 init
1683 20:52:56.823557 PCI: 00:16.0 init finished in 0 msecs
1684 20:52:56.823996 PCI: 00:19.1 init
1685 20:52:56.826762 I2C bus 5 version 0x3230302a
1686 20:52:56.830299 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1687 20:52:56.833930 PCI: 00:19.1 init finished in 6 msecs
1688 20:52:56.837152 PCI: 00:1d.0 init
1689 20:52:56.840387 Initializing PCH PCIe bridge.
1690 20:52:56.843828 PCI: 00:1d.0 init finished in 3 msecs
1691 20:52:56.847106 PCI: 00:1f.0 init
1692 20:52:56.850431 IOAPIC: Initializing IOAPIC at 0xfec00000
1693 20:52:56.857288 IOAPIC: Bootstrap Processor Local APIC = 0x00
1694 20:52:56.857811 IOAPIC: ID = 0x02
1695 20:52:56.859977 IOAPIC: Dumping registers
1696 20:52:56.863403 reg 0x0000: 0x02000000
1697 20:52:56.866598 reg 0x0001: 0x00770020
1698 20:52:56.867056 reg 0x0002: 0x00000000
1699 20:52:56.873231 PCI: 00:1f.0 init finished in 21 msecs
1700 20:52:56.873714 PCI: 00:1f.2 init
1701 20:52:56.876542 Disabling ACPI via APMC.
1702 20:52:56.881811 APMC done.
1703 20:52:56.884699 PCI: 00:1f.2 init finished in 6 msecs
1704 20:52:56.897028 PCI: 01:00.0 init
1705 20:52:56.900313 PCI: 01:00.0 init finished in 0 msecs
1706 20:52:56.902994 PNP: 0c09.0 init
1707 20:52:56.910218 Google Chrome EC uptime: 8.294 seconds
1708 20:52:56.913119 Google Chrome AP resets since EC boot: 1
1709 20:52:56.916489 Google Chrome most recent AP reset causes:
1710 20:52:56.919920 0.453: 32775 shutdown: entering G3
1711 20:52:56.926601 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1712 20:52:56.929819 PNP: 0c09.0 init finished in 24 msecs
1713 20:52:56.936526 Devices initialized
1714 20:52:56.939875 Show all devs... After init.
1715 20:52:56.943203 Root Device: enabled 1
1716 20:52:56.943644 DOMAIN: 0000: enabled 1
1717 20:52:56.946595 CPU_CLUSTER: 0: enabled 1
1718 20:52:56.950073 PCI: 00:00.0: enabled 1
1719 20:52:56.953356 PCI: 00:02.0: enabled 1
1720 20:52:56.953884 PCI: 00:04.0: enabled 1
1721 20:52:56.956736 PCI: 00:05.0: enabled 1
1722 20:52:56.959949 PCI: 00:06.0: enabled 0
1723 20:52:56.963380 PCI: 00:07.0: enabled 0
1724 20:52:56.963965 PCI: 00:07.1: enabled 0
1725 20:52:56.966817 PCI: 00:07.2: enabled 0
1726 20:52:56.969522 PCI: 00:07.3: enabled 0
1727 20:52:56.972773 PCI: 00:08.0: enabled 1
1728 20:52:56.973321 PCI: 00:09.0: enabled 0
1729 20:52:56.976011 PCI: 00:0a.0: enabled 0
1730 20:52:56.979385 PCI: 00:0d.0: enabled 1
1731 20:52:56.982779 PCI: 00:0d.1: enabled 0
1732 20:52:56.983225 PCI: 00:0d.2: enabled 0
1733 20:52:56.986716 PCI: 00:0d.3: enabled 0
1734 20:52:56.989790 PCI: 00:0e.0: enabled 0
1735 20:52:56.992984 PCI: 00:10.2: enabled 1
1736 20:52:56.993448 PCI: 00:10.6: enabled 0
1737 20:52:56.996258 PCI: 00:10.7: enabled 0
1738 20:52:56.998919 PCI: 00:12.0: enabled 0
1739 20:52:57.002642 PCI: 00:12.6: enabled 0
1740 20:52:57.003095 PCI: 00:13.0: enabled 0
1741 20:52:57.005450 PCI: 00:14.0: enabled 1
1742 20:52:57.009347 PCI: 00:14.1: enabled 0
1743 20:52:57.012533 PCI: 00:14.2: enabled 1
1744 20:52:57.012958 PCI: 00:14.3: enabled 1
1745 20:52:57.015042 PCI: 00:15.0: enabled 1
1746 20:52:57.018322 PCI: 00:15.1: enabled 1
1747 20:52:57.018406 PCI: 00:15.2: enabled 1
1748 20:52:57.021651
1749 20:52:57.021735 PCI: 00:15.3: enabled 1
1750 20:52:57.024922 PCI: 00:16.0: enabled 1
1751 20:52:57.028423 PCI: 00:16.1: enabled 0
1752 20:52:57.028512 PCI: 00:16.2: enabled 0
1753 20:52:57.031674 PCI: 00:16.3: enabled 0
1754 20:52:57.035022 PCI: 00:16.4: enabled 0
1755 20:52:57.038370 PCI: 00:16.5: enabled 0
1756 20:52:57.038474 PCI: 00:17.0: enabled 0
1757 20:52:57.041766 PCI: 00:19.0: enabled 0
1758 20:52:57.044441 PCI: 00:19.1: enabled 1
1759 20:52:57.047802 PCI: 00:19.2: enabled 0
1760 20:52:57.047916 PCI: 00:1c.0: enabled 1
1761 20:52:57.051168 PCI: 00:1c.1: enabled 0
1762 20:52:57.054609 PCI: 00:1c.2: enabled 0
1763 20:52:57.057993 PCI: 00:1c.3: enabled 0
1764 20:52:57.058132 PCI: 00:1c.4: enabled 0
1765 20:52:57.061557 PCI: 00:1c.5: enabled 0
1766 20:52:57.064980 PCI: 00:1c.6: enabled 1
1767 20:52:57.068242 PCI: 00:1c.7: enabled 0
1768 20:52:57.068550 PCI: 00:1d.0: enabled 1
1769 20:52:57.070808 PCI: 00:1d.1: enabled 0
1770 20:52:57.074249 PCI: 00:1d.2: enabled 1
1771 20:52:57.077502 PCI: 00:1d.3: enabled 0
1772 20:52:57.077771 PCI: 00:1e.0: enabled 1
1773 20:52:57.080873 PCI: 00:1e.1: enabled 0
1774 20:52:57.084217 PCI: 00:1e.2: enabled 1
1775 20:52:57.087492 PCI: 00:1e.3: enabled 1
1776 20:52:57.087948 PCI: 00:1f.0: enabled 1
1777 20:52:57.090928 PCI: 00:1f.1: enabled 0
1778 20:52:57.094168 PCI: 00:1f.2: enabled 1
1779 20:52:57.097480 PCI: 00:1f.3: enabled 1
1780 20:52:57.097913 PCI: 00:1f.4: enabled 0
1781 20:52:57.100736 PCI: 00:1f.5: enabled 1
1782 20:52:57.104073 PCI: 00:1f.6: enabled 0
1783 20:52:57.107304 PCI: 00:1f.7: enabled 0
1784 20:52:57.107742 APIC: 00: enabled 1
1785 20:52:57.110625 GENERIC: 0.0: enabled 1
1786 20:52:57.114315 GENERIC: 0.0: enabled 1
1787 20:52:57.114861 GENERIC: 1.0: enabled 1
1788 20:52:57.117748 GENERIC: 0.0: enabled 1
1789 20:52:57.120981 GENERIC: 1.0: enabled 1
1790 20:52:57.124353 USB0 port 0: enabled 1
1791 20:52:57.124938 GENERIC: 0.0: enabled 1
1792 20:52:57.127288 USB0 port 0: enabled 1
1793 20:52:57.130676 GENERIC: 0.0: enabled 1
1794 20:52:57.131114 I2C: 00:1a: enabled 1
1795 20:52:57.133986 I2C: 00:31: enabled 1
1796 20:52:57.137316 I2C: 00:32: enabled 1
1797 20:52:57.137776 I2C: 00:10: enabled 1
1798 20:52:57.140718
1799 20:52:57.141189 I2C: 00:15: enabled 1
1800 20:52:57.143536 GENERIC: 0.0: enabled 0
1801 20:52:57.147369 GENERIC: 1.0: enabled 0
1802 20:52:57.147830 GENERIC: 0.0: enabled 1
1803 20:52:57.150065 SPI: 00: enabled 1
1804 20:52:57.153483 SPI: 00: enabled 1
1805 20:52:57.153921 PNP: 0c09.0: enabled 1
1806 20:52:57.156883 GENERIC: 0.0: enabled 1
1807 20:52:57.160191 USB3 port 0: enabled 1
1808 20:52:57.160627 USB3 port 1: enabled 1
1809 20:52:57.163502 USB3 port 2: enabled 0
1810 20:52:57.166880 USB3 port 3: enabled 0
1811 20:52:57.170383 USB2 port 0: enabled 0
1812 20:52:57.170951 USB2 port 1: enabled 1
1813 20:52:57.173616 USB2 port 2: enabled 1
1814 20:52:57.176769 USB2 port 3: enabled 0
1815 20:52:57.177225 USB2 port 4: enabled 1
1816 20:52:57.180255 USB2 port 5: enabled 0
1817 20:52:57.183534 USB2 port 6: enabled 0
1818 20:52:57.186901 USB2 port 7: enabled 0
1819 20:52:57.187326 USB2 port 8: enabled 0
1820 20:52:57.189556 USB2 port 9: enabled 0
1821 20:52:57.193438 USB3 port 0: enabled 0
1822 20:52:57.193899 USB3 port 1: enabled 1
1823 20:52:57.196516 USB3 port 2: enabled 0
1824 20:52:57.200037 USB3 port 3: enabled 0
1825 20:52:57.203148 GENERIC: 0.0: enabled 1
1826 20:52:57.203591 GENERIC: 1.0: enabled 1
1827 20:52:57.206476 APIC: 01: enabled 1
1828 20:52:57.209732 APIC: 05: enabled 1
1829 20:52:57.210032 APIC: 07: enabled 1
1830 20:52:57.213120 APIC: 02: enabled 1
1831 20:52:57.213445 APIC: 04: enabled 1
1832 20:52:57.216653 APIC: 06: enabled 1
1833 20:52:57.219164 APIC: 03: enabled 1
1834 20:52:57.219611 PCI: 01:00.0: enabled 1
1835 20:52:57.225862 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1836 20:52:57.229138 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1837 20:52:57.232577
1838 20:52:57.235936 ELOG: NV offset 0xf30000 size 0x1000
1839 20:52:57.242758 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1840 20:52:57.249267 ELOG: Event(17) added with size 13 at 2023-01-18 20:52:57 UTC
1841 20:52:57.255301 ELOG: Event(92) added with size 9 at 2023-01-18 20:52:57 UTC
1842 20:52:57.262395 ELOG: Event(93) added with size 9 at 2023-01-18 20:52:57 UTC
1843 20:52:57.269151 ELOG: Event(9E) added with size 10 at 2023-01-18 20:52:57 UTC
1844 20:52:57.275845 ELOG: Event(9F) added with size 14 at 2023-01-18 20:52:57 UTC
1845 20:52:57.279596 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1846 20:52:57.285147 ELOG: Event(A1) added with size 10 at 2023-01-18 20:52:57 UTC
1847 20:52:57.295136 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1848 20:52:57.301519 ELOG: Event(A0) added with size 9 at 2023-01-18 20:52:57 UTC
1849 20:52:57.304901 elog_add_boot_reason: Logged dev mode boot
1850 20:52:57.312162 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1851 20:52:57.312684 Finalize devices...
1852 20:52:57.315313 Devices finalized
1853 20:52:57.321555 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1854 20:52:57.325021 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1855 20:52:57.331691 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1856 20:52:57.334441 ME: HFSTS1 : 0x80030055
1857 20:52:57.340995 ME: HFSTS2 : 0x30280116
1858 20:52:57.344375 ME: HFSTS3 : 0x00000050
1859 20:52:57.347850 ME: HFSTS4 : 0x00004000
1860 20:52:57.354299 ME: HFSTS5 : 0x00000000
1861 20:52:57.357716 ME: HFSTS6 : 0x40400006
1862 20:52:57.361178 ME: Manufacturing Mode : YES
1863 20:52:57.364579 ME: SPI Protection Mode Enabled : NO
1864 20:52:57.367942 ME: FW Partition Table : OK
1865 20:52:57.373988 ME: Bringup Loader Failure : NO
1866 20:52:57.377265 ME: Firmware Init Complete : NO
1867 20:52:57.380458 ME: Boot Options Present : NO
1868 20:52:57.383995 ME: Update In Progress : NO
1869 20:52:57.387715 ME: D0i3 Support : YES
1870 20:52:57.390668 ME: Low Power State Enabled : NO
1871 20:52:57.394357 ME: CPU Replaced : YES
1872 20:52:57.400716 ME: CPU Replacement Valid : YES
1873 20:52:57.403791 ME: Current Working State : 5
1874 20:52:57.407296 ME: Current Operation State : 1
1875 20:52:57.410617 ME: Current Operation Mode : 3
1876 20:52:57.414032 ME: Error Code : 0
1877 20:52:57.417200 ME: Enhanced Debug Mode : NO
1878 20:52:57.420760 ME: CPU Debug Disabled : YES
1879 20:52:57.424612 ME: TXT Support : NO
1880 20:52:57.430542 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1881 20:52:57.437453 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1882 20:52:57.440624 CBFS: 'fallback/slic' not found.
1883 20:52:57.447348 ACPI: Writing ACPI tables at 76b01000.
1884 20:52:57.447787 ACPI: * FACS
1885 20:52:57.449897 ACPI: * DSDT
1886 20:52:57.453476 Ramoops buffer: 0x100000@0x76a00000.
1887 20:52:57.456693 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1888 20:52:57.463473 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1889 20:52:57.467002 Google Chrome EC: version:
1890 20:52:57.470066 ro: voema_v2.0.10114-a447f03e46
1891 20:52:57.473465 rw: voema_v2.0.10132-7b2059e3bc
1892 20:52:57.476925 running image: 2
1893 20:52:57.479681 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1894 20:52:57.485042 ACPI: * FADT
1895 20:52:57.485695 SCI is IRQ9
1896 20:52:57.491589 ACPI: added table 1/32, length now 40
1897 20:52:57.492176 ACPI: * SSDT
1898 20:52:57.495272 Found 1 CPU(s) with 8 core(s) each.
1899 20:52:57.501355 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1900 20:52:57.505154 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1901 20:52:57.508506 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1902 20:52:57.511724 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1903 20:52:57.518440 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1904 20:52:57.524977 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1905 20:52:57.528356 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1906 20:52:57.534909 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1907 20:52:57.541103 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1908 20:52:57.544388 \_SB.PCI0.RP09: Added StorageD3Enable property
1909 20:52:57.551017 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1910 20:52:57.554332 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1911 20:52:57.561719 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1912 20:52:57.564963 PS2K: Passing 80 keymaps to kernel
1913 20:52:57.571683 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1914 20:52:57.577675 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1915 20:52:57.584288 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1916 20:52:57.591019 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1917 20:52:57.597521 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1918 20:52:57.604482 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1919 20:52:57.611063 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1920 20:52:57.617472 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1921 20:52:57.620984 ACPI: added table 2/32, length now 44
1922 20:52:57.624037 ACPI: * MCFG
1923 20:52:57.627274 ACPI: added table 3/32, length now 48
1924 20:52:57.627746 ACPI: * TPM2
1925 20:52:57.630708 TPM2 log created at 0x769f0000
1926 20:52:57.634092 ACPI: added table 4/32, length now 52
1927 20:52:57.637447 ACPI: * MADT
1928 20:52:57.637880 SCI is IRQ9
1929 20:52:57.640778 ACPI: added table 5/32, length now 56
1930 20:52:57.644214 current = 76b09850
1931 20:52:57.644651 ACPI: * DMAR
1932 20:52:57.647629
1933 20:52:57.650273 ACPI: added table 6/32, length now 60
1934 20:52:57.653727 ACPI: added table 7/32, length now 64
1935 20:52:57.654161 ACPI: * HPET
1936 20:52:57.657133 ACPI: added table 8/32, length now 68
1937 20:52:57.660382
1938 20:52:57.660817 ACPI: done.
1939 20:52:57.663661 ACPI tables: 35216 bytes.
1940 20:52:57.667062 smbios_write_tables: 769ef000
1941 20:52:57.670382 EC returned error result code 3
1942 20:52:57.673580 Couldn't obtain OEM name from CBI
1943 20:52:57.676826 Create SMBIOS type 16
1944 20:52:57.680100 Create SMBIOS type 17
1945 20:52:57.680532 GENERIC: 0.0 (WIFI Device)
1946 20:52:57.683655
1947 20:52:57.684095 SMBIOS tables: 1734 bytes.
1948 20:52:57.690294 Writing table forward entry at 0x00000500
1949 20:52:57.692917 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1950 20:52:57.696197
1951 20:52:57.699643 Writing coreboot table at 0x76b25000
1952 20:52:57.702965 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1953 20:52:57.709481 1. 0000000000001000-000000000009ffff: RAM
1954 20:52:57.713179 2. 00000000000a0000-00000000000fffff: RESERVED
1955 20:52:57.716344 3. 0000000000100000-00000000769eefff: RAM
1956 20:52:57.719613
1957 20:52:57.722862 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1958 20:52:57.729412 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1959 20:52:57.736448 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1960 20:52:57.739336 7. 0000000077000000-000000007fbfffff: RESERVED
1961 20:52:57.742762 8. 00000000c0000000-00000000cfffffff: RESERVED
1962 20:52:57.749366 9. 00000000f8000000-00000000f9ffffff: RESERVED
1963 20:52:57.752972 10. 00000000fb000000-00000000fb000fff: RESERVED
1964 20:52:57.759422 11. 00000000fe000000-00000000fe00ffff: RESERVED
1965 20:52:57.762639 12. 00000000fed80000-00000000fed87fff: RESERVED
1966 20:52:57.768751 13. 00000000fed90000-00000000fed92fff: RESERVED
1967 20:52:57.772109 14. 00000000feda0000-00000000feda1fff: RESERVED
1968 20:52:57.778680 15. 00000000fedc0000-00000000feddffff: RESERVED
1969 20:52:57.782095 16. 0000000100000000-00000004803fffff: RAM
1970 20:52:57.785587 Passing 4 GPIOs to payload:
1971 20:52:57.789017 NAME | PORT | POLARITY | VALUE
1972 20:52:57.795783 lid | undefined | high | high
1973 20:52:57.801632 power | undefined | high | low
1974 20:52:57.804963 oprom | undefined | high | low
1975 20:52:57.812185 EC in RW | 0x000000e5 | high | high
1976 20:52:57.818825 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7e26
1977 20:52:57.821490 coreboot table: 1576 bytes.
1978 20:52:57.824836 IMD ROOT 0. 0x76fff000 0x00001000
1979 20:52:57.828012 IMD SMALL 1. 0x76ffe000 0x00001000
1980 20:52:57.831330 FSP MEMORY 2. 0x76c4e000 0x003b0000
1981 20:52:57.834828 VPD 3. 0x76c4d000 0x00000367
1982 20:52:57.838083 RO MCACHE 4. 0x76c4c000 0x00000fdc
1983 20:52:57.841329 CONSOLE 5. 0x76c2c000 0x00020000
1984 20:52:57.848088 FMAP 6. 0x76c2b000 0x00000578
1985 20:52:57.851429 TIME STAMP 7. 0x76c2a000 0x00000910
1986 20:52:57.854807 VBOOT WORK 8. 0x76c16000 0x00014000
1987 20:52:57.857510 ROMSTG STCK 9. 0x76c15000 0x00001000
1988 20:52:57.860886 AFTER CAR 10. 0x76c0a000 0x0000b000
1989 20:52:57.864179 RAMSTAGE 11. 0x76b97000 0x00073000
1990 20:52:57.867824 REFCODE 12. 0x76b42000 0x00055000
1991 20:52:57.871165 SMM BACKUP 13. 0x76b32000 0x00010000
1992 20:52:57.877640 4f444749 14. 0x76b30000 0x00002000
1993 20:52:57.881002 EXT VBT15. 0x76b2d000 0x0000219f
1994 20:52:57.884362 COREBOOT 16. 0x76b25000 0x00008000
1995 20:52:57.887170 ACPI 17. 0x76b01000 0x00024000
1996 20:52:57.890513 ACPI GNVS 18. 0x76b00000 0x00001000
1997 20:52:57.893930 RAMOOPS 19. 0x76a00000 0x00100000
1998 20:52:57.897214 TPM2 TCGLOG20. 0x769f0000 0x00010000
1999 20:52:57.900477 SMBIOS 21. 0x769ef000 0x00000800
2000 20:52:57.903806 IMD small region:
2001 20:52:57.907191 IMD ROOT 0. 0x76ffec00 0x00000400
2002 20:52:57.910455 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2003 20:52:57.917137 POWER STATE 2. 0x76ffeb80 0x00000044
2004 20:52:57.920404 ROMSTAGE 3. 0x76ffeb60 0x00000004
2005 20:52:57.923550 MEM INFO 4. 0x76ffe980 0x000001e0
2006 20:52:57.930176 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
2007 20:52:57.933341 MTRR: Physical address space:
2008 20:52:57.937029 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2009 20:52:57.940247
2010 20:52:57.943247 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2011 20:52:57.949914 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2012 20:52:57.956594 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2013 20:52:57.963379 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2014 20:52:57.969905 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2015 20:52:57.976492 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
2016 20:52:57.979219 MTRR: Fixed MSR 0x250 0x0606060606060606
2017 20:52:57.982689 MTRR: Fixed MSR 0x258 0x0606060606060606
2018 20:52:57.989409 MTRR: Fixed MSR 0x259 0x0000000000000000
2019 20:52:57.992881 MTRR: Fixed MSR 0x268 0x0606060606060606
2020 20:52:57.996012 MTRR: Fixed MSR 0x269 0x0606060606060606
2021 20:52:57.999404 MTRR: Fixed MSR 0x26a 0x0606060606060606
2022 20:52:58.005971 MTRR: Fixed MSR 0x26b 0x0606060606060606
2023 20:52:58.008979 MTRR: Fixed MSR 0x26c 0x0606060606060606
2024 20:52:58.012310 MTRR: Fixed MSR 0x26d 0x0606060606060606
2025 20:52:58.015567 MTRR: Fixed MSR 0x26e 0x0606060606060606
2026 20:52:58.022283 MTRR: Fixed MSR 0x26f 0x0606060606060606
2027 20:52:58.025906 call enable_fixed_mtrr()
2028 20:52:58.029166 CPU physical address size: 39 bits
2029 20:52:58.032515 MTRR: default type WB/UC MTRR counts: 6/7.
2030 20:52:58.035981 MTRR: WB selected as default type.
2031 20:52:58.039007
2032 20:52:58.042303 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2033 20:52:58.048245 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2034 20:52:58.055025 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2035 20:52:58.061735 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2036 20:52:58.068576 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2037 20:52:58.075303 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2038 20:52:58.078814
2039 20:52:58.079244 MTRR check
2040 20:52:58.082106 Fixed MTRRs : Enabled
2041 20:52:58.082659 Variable MTRRs: Enabled
2042 20:52:58.083008
2043 20:52:58.088750 MTRR: Fixed MSR 0x250 0x0606060606060606
2044 20:52:58.091864 MTRR: Fixed MSR 0x258 0x0606060606060606
2045 20:52:58.095603 MTRR: Fixed MSR 0x259 0x0000000000000000
2046 20:52:58.098763 MTRR: Fixed MSR 0x268 0x0606060606060606
2047 20:52:58.104871 MTRR: Fixed MSR 0x269 0x0606060606060606
2048 20:52:58.108094 MTRR: Fixed MSR 0x26a 0x0606060606060606
2049 20:52:58.111512 MTRR: Fixed MSR 0x26b 0x0606060606060606
2050 20:52:58.114756 MTRR: Fixed MSR 0x26c 0x0606060606060606
2051 20:52:58.121683 MTRR: Fixed MSR 0x26d 0x0606060606060606
2052 20:52:58.125051 MTRR: Fixed MSR 0x26e 0x0606060606060606
2053 20:52:58.128422 MTRR: Fixed MSR 0x26f 0x0606060606060606
2054 20:52:58.135539 MTRR: Fixed MSR 0x250 0x0606060606060606
2055 20:52:58.136089 call enable_fixed_mtrr()
2056 20:52:58.142200 MTRR: Fixed MSR 0x258 0x0606060606060606
2057 20:52:58.145341 MTRR: Fixed MSR 0x259 0x0000000000000000
2058 20:52:58.148586 MTRR: Fixed MSR 0x268 0x0606060606060606
2059 20:52:58.151443 MTRR: Fixed MSR 0x269 0x0606060606060606
2060 20:52:58.158346 MTRR: Fixed MSR 0x26a 0x0606060606060606
2061 20:52:58.161636 MTRR: Fixed MSR 0x26b 0x0606060606060606
2062 20:52:58.165058 MTRR: Fixed MSR 0x26c 0x0606060606060606
2063 20:52:58.168539 MTRR: Fixed MSR 0x26d 0x0606060606060606
2064 20:52:58.175355 MTRR: Fixed MSR 0x26e 0x0606060606060606
2065 20:52:58.178005 MTRR: Fixed MSR 0x26f 0x0606060606060606
2066 20:52:58.181264 CPU physical address size: 39 bits
2067 20:52:58.188003 call enable_fixed_mtrr()
2068 20:52:58.191372 MTRR: Fixed MSR 0x250 0x0606060606060606
2069 20:52:58.194950 MTRR: Fixed MSR 0x250 0x0606060606060606
2070 20:52:58.201017 MTRR: Fixed MSR 0x258 0x0606060606060606
2071 20:52:58.205050 MTRR: Fixed MSR 0x259 0x0000000000000000
2072 20:52:58.208259 MTRR: Fixed MSR 0x268 0x0606060606060606
2073 20:52:58.211659 MTRR: Fixed MSR 0x269 0x0606060606060606
2074 20:52:58.214976 MTRR: Fixed MSR 0x26a 0x0606060606060606
2075 20:52:58.221017 MTRR: Fixed MSR 0x26b 0x0606060606060606
2076 20:52:58.225075 MTRR: Fixed MSR 0x26c 0x0606060606060606
2077 20:52:58.227730 MTRR: Fixed MSR 0x26d 0x0606060606060606
2078 20:52:58.231026 MTRR: Fixed MSR 0x26e 0x0606060606060606
2079 20:52:58.237580 MTRR: Fixed MSR 0x26f 0x0606060606060606
2080 20:52:58.240945 MTRR: Fixed MSR 0x258 0x0606060606060606
2081 20:52:58.244410
2082 20:52:58.245075 call enable_fixed_mtrr()
2083 20:52:58.250973 MTRR: Fixed MSR 0x259 0x0000000000000000
2084 20:52:58.254374 MTRR: Fixed MSR 0x268 0x0606060606060606
2085 20:52:58.257655 MTRR: Fixed MSR 0x269 0x0606060606060606
2086 20:52:58.261059 MTRR: Fixed MSR 0x26a 0x0606060606060606
2087 20:52:58.263959 MTRR: Fixed MSR 0x26b 0x0606060606060606
2088 20:52:58.270504 MTRR: Fixed MSR 0x26c 0x0606060606060606
2089 20:52:58.273777 MTRR: Fixed MSR 0x26d 0x0606060606060606
2090 20:52:58.277137 MTRR: Fixed MSR 0x26e 0x0606060606060606
2091 20:52:58.280622 MTRR: Fixed MSR 0x26f 0x0606060606060606
2092 20:52:58.287217 CPU physical address size: 39 bits
2093 20:52:58.291537 call enable_fixed_mtrr()
2094 20:52:58.294743 CPU physical address size: 39 bits
2095 20:52:58.297627 MTRR: Fixed MSR 0x250 0x0606060606060606
2096 20:52:58.301441
2097 20:52:58.304117 MTRR: Fixed MSR 0x250 0x0606060606060606
2098 20:52:58.307313 MTRR: Fixed MSR 0x258 0x0606060606060606
2099 20:52:58.311258 MTRR: Fixed MSR 0x259 0x0000000000000000
2100 20:52:58.313917 MTRR: Fixed MSR 0x268 0x0606060606060606
2101 20:52:58.320623 MTRR: Fixed MSR 0x269 0x0606060606060606
2102 20:52:58.324321 MTRR: Fixed MSR 0x26a 0x0606060606060606
2103 20:52:58.327929 MTRR: Fixed MSR 0x26b 0x0606060606060606
2104 20:52:58.331026 MTRR: Fixed MSR 0x26c 0x0606060606060606
2105 20:52:58.337477 MTRR: Fixed MSR 0x26d 0x0606060606060606
2106 20:52:58.340533 MTRR: Fixed MSR 0x26e 0x0606060606060606
2107 20:52:58.343913 MTRR: Fixed MSR 0x26f 0x0606060606060606
2108 20:52:58.351324 MTRR: Fixed MSR 0x258 0x0606060606060606
2109 20:52:58.351756 call enable_fixed_mtrr()
2110 20:52:58.358028 MTRR: Fixed MSR 0x259 0x0000000000000000
2111 20:52:58.361324 MTRR: Fixed MSR 0x268 0x0606060606060606
2112 20:52:58.364716 MTRR: Fixed MSR 0x269 0x0606060606060606
2113 20:52:58.368164 MTRR: Fixed MSR 0x26a 0x0606060606060606
2114 20:52:58.374808 MTRR: Fixed MSR 0x26b 0x0606060606060606
2115 20:52:58.378039 MTRR: Fixed MSR 0x26c 0x0606060606060606
2116 20:52:58.380717 MTRR: Fixed MSR 0x26d 0x0606060606060606
2117 20:52:58.384048 MTRR: Fixed MSR 0x26e 0x0606060606060606
2118 20:52:58.390572 MTRR: Fixed MSR 0x26f 0x0606060606060606
2119 20:52:58.393999 CPU physical address size: 39 bits
2120 20:52:58.398588 call enable_fixed_mtrr()
2121 20:52:58.401868 CPU physical address size: 39 bits
2122 20:52:58.405332 CPU physical address size: 39 bits
2123 20:52:58.411935 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2124 20:52:58.415370 MTRR: Fixed MSR 0x250 0x0606060606060606
2125 20:52:58.418554 Checking cr50 for pending updates
2126 20:52:58.422550 MTRR: Fixed MSR 0x258 0x0606060606060606
2127 20:52:58.425820
2128 20:52:58.429103 MTRR: Fixed MSR 0x259 0x0000000000000000
2129 20:52:58.432391 MTRR: Fixed MSR 0x268 0x0606060606060606
2130 20:52:58.435660 MTRR: Fixed MSR 0x269 0x0606060606060606
2131 20:52:58.438977 MTRR: Fixed MSR 0x26a 0x0606060606060606
2132 20:52:58.445751 MTRR: Fixed MSR 0x26b 0x0606060606060606
2133 20:52:58.449211 MTRR: Fixed MSR 0x26c 0x0606060606060606
2134 20:52:58.452556 MTRR: Fixed MSR 0x26d 0x0606060606060606
2135 20:52:58.455983 MTRR: Fixed MSR 0x26e 0x0606060606060606
2136 20:52:58.461937 MTRR: Fixed MSR 0x26f 0x0606060606060606
2137 20:52:58.465330 Reading cr50 TPM mode
2138 20:52:58.469538 call enable_fixed_mtrr()
2139 20:52:58.472798 CPU physical address size: 39 bits
2140 20:52:58.478824 BS: BS_PAYLOAD_LOAD entry times (exec / console): 49 / 8 ms
2141 20:52:58.485468 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2142 20:52:58.492288 Checking segment from ROM address 0xffc02b38
2143 20:52:58.495928 Checking segment from ROM address 0xffc02b54
2144 20:52:58.499170 Loading segment from ROM address 0xffc02b38
2145 20:52:58.502011 code (compression=0)
2146 20:52:58.511975 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2147 20:52:58.518579 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2148 20:52:58.522415 it's not compressed!
2149 20:52:58.661213 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2150 20:52:58.667997 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2151 20:52:58.675381 Loading segment from ROM address 0xffc02b54
2152 20:52:58.678558 Entry Point 0x30000000
2153 20:52:58.679194 Loaded segments
2154 20:52:58.684455 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2155 20:52:58.730512 Finalizing chipset.
2156 20:52:58.733718 Finalizing SMM.
2157 20:52:58.734312 APMC done.
2158 20:52:58.739998 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2159 20:52:58.743589 mp_park_aps done after 0 msecs.
2160 20:52:58.746647 Jumping to boot code at 0x30000000(0x76b25000)
2161 20:52:58.756546 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2162 20:52:58.757037
2163 20:52:58.757551
2164 20:52:58.758007
2165 20:52:58.759811 Starting depthcharge on Voema...
2166 20:52:58.760249
2167 20:52:58.761358 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2168 20:52:58.761961 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2169 20:52:58.762411 Setting prompt string to ['volteer:']
2170 20:52:58.762904 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2171 20:52:58.769729 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2172 20:52:58.770177
2173 20:52:58.776626 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2174 20:52:58.777172
2175 20:52:58.782694 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2176 20:52:58.783133
2177 20:52:58.786087 Failed to find eMMC card reader
2178 20:52:58.786524
2179 20:52:58.789341 Wipe memory regions:
2180 20:52:58.789828
2181 20:52:58.792613 [0x00000000001000, 0x000000000a0000)
2182 20:52:58.793108
2183 20:52:58.796179 [0x00000000100000, 0x00000030000000)
2184 20:52:58.796612
2185 20:52:58.834679 [0x00000032662db0, 0x000000769ef000)
2186 20:52:58.835265
2187 20:52:58.888149 [0x00000100000000, 0x00000480400000)
2188 20:52:58.888675
2189 20:52:59.522021 ec_init: CrosEC protocol v3 supported (256, 256)
2190 20:52:59.522606
2191 20:52:59.953217 R8152: Initializing
2192 20:52:59.953842
2193 20:52:59.956550 Version 6 (ocp_data = 5c30)
2194 20:52:59.957066
2195 20:52:59.959817 R8152: Done initializing
2196 20:52:59.960413
2197 20:52:59.962960 Adding net device
2198 20:52:59.963445
2199 20:53:00.267665 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2200 20:53:00.268243
2201 20:53:00.268731
2202 20:53:00.269185
2203 20:53:00.271252 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2205 20:53:00.373214 volteer: tftpboot 192.168.201.1 8785140/tftp-deploy-vrf0m9hj/kernel/bzImage 8785140/tftp-deploy-vrf0m9hj/kernel/cmdline 8785140/tftp-deploy-vrf0m9hj/ramdisk/ramdisk.cpio.gz
2206 20:53:00.373987 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2207 20:53:00.374579 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2208 20:53:00.379046 tftpboot 192.168.201.1 8785140/tftp-deploy-vrf0m9hj/kernel/bzImaoy-vrf0m9hj/kernel/cmdline 8785140/tftp-deploy-vrf0m9hj/ramdisk/ramdisk.cpio.gz
2209 20:53:00.379551
2210 20:53:00.379931 Waiting for link
2211 20:53:00.380288
2212 20:53:00.582099 done.
2213 20:53:00.582684
2214 20:53:00.583073 MAC: 00:24:32:30:7e:22
2215 20:53:00.583432
2216 20:53:00.585196 Sending DHCP discover... done.
2217 20:53:00.585711
2218 20:53:00.588498 Waiting for reply... done.
2219 20:53:00.589008
2220 20:53:00.591709 Sending DHCP request... done.
2221 20:53:00.592143
2222 20:53:00.595367 Waiting for reply... done.
2223 20:53:00.595928
2224 20:53:00.598477 My ip is 192.168.201.21
2225 20:53:00.598959
2226 20:53:00.601058 The DHCP server ip is 192.168.201.1
2227 20:53:00.601562
2228 20:53:00.607861 TFTP server IP predefined by user: 192.168.201.1
2229 20:53:00.608354
2230 20:53:00.614722 Bootfile predefined by user: 8785140/tftp-deploy-vrf0m9hj/kernel/bzImage
2231 20:53:00.615161
2232 20:53:00.617910 Sending tftp read request... done.
2233 20:53:00.618371
2234 20:53:00.621336 Waiting for the transfer...
2235 20:53:00.621793
2236 20:53:01.281900 00000000 ################################################################
2237 20:53:01.282434
2238 20:53:01.932908 00080000 ################################################################
2239 20:53:01.933064
2240 20:53:02.554014 00100000 ################################################################
2241 20:53:02.554173
2242 20:53:03.170141 00180000 ################################################################
2243 20:53:03.170295
2244 20:53:03.766889 00200000 ################################################################
2245 20:53:03.767039
2246 20:53:04.377961 00280000 ################################################################
2247 20:53:04.378121
2248 20:53:04.978337 00300000 ################################################################
2249 20:53:04.978497
2250 20:53:05.523179 00380000 ################################################################
2251 20:53:05.523322
2252 20:53:06.122724 00400000 ################################################################
2253 20:53:06.122872
2254 20:53:06.709882 00480000 ################################################################
2255 20:53:06.710033
2256 20:53:07.300295 00500000 ################################################################
2257 20:53:07.300448
2258 20:53:07.847324 00580000 ################################################################
2259 20:53:07.847508
2260 20:53:08.527440 00600000 ################################################################
2261 20:53:08.527991
2262 20:53:09.191923 00680000 ################################################################
2263 20:53:09.192477
2264 20:53:09.866257 00700000 ################################################################
2265 20:53:09.866785
2266 20:53:10.531938 00780000 ################################################################
2267 20:53:10.532461
2268 20:53:11.204155 00800000 ################################################################
2269 20:53:11.204372
2270 20:53:11.869245 00880000 ################################################################
2271 20:53:11.869421
2272 20:53:12.212595 00900000 ################################## done.
2273 20:53:12.212742
2274 20:53:12.216238 The bootfile was 9711616 bytes long.
2275 20:53:12.216695
2276 20:53:12.219842 Sending tftp read request... done.
2277 20:53:12.220380
2278 20:53:12.222882 Waiting for the transfer...
2279 20:53:12.223317
2280 20:53:12.885922 00000000 ################################################################
2281 20:53:12.886451
2282 20:53:13.505519 00080000 ################################################################
2283 20:53:13.506052
2284 20:53:14.134534 00100000 ################################################################
2285 20:53:14.135088
2286 20:53:14.787863 00180000 ################################################################
2287 20:53:14.788392
2288 20:53:15.438019 00200000 ################################################################
2289 20:53:15.438578
2290 20:53:16.078778 00280000 ################################################################
2291 20:53:16.079416
2292 20:53:16.782133 00300000 ################################################################
2293 20:53:16.782650
2294 20:53:17.449626 00380000 ################################################################
2295 20:53:17.450157
2296 20:53:18.115805 00400000 ################################################################
2297 20:53:18.116322
2298 20:53:18.732251 00480000 ################################################################
2299 20:53:18.732490
2300 20:53:19.096360 00500000 ################################### done.
2301 20:53:19.096908
2302 20:53:19.099802 Sending tftp read request... done.
2303 20:53:19.100277
2304 20:53:19.103319 Waiting for the transfer...
2305 20:53:19.103767
2306 20:53:19.104138 00000000 # done.
2307 20:53:19.104479
2308 20:53:19.113176 Command line loaded dynamically from TFTP file: 8785140/tftp-deploy-vrf0m9hj/kernel/cmdline
2309 20:53:19.113677
2310 20:53:19.132370 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8785140/extract-nfsrootfs-97aaybd2,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2311 20:53:19.132838
2312 20:53:19.140330 Shutting down all USB controllers.
2313 20:53:19.140772
2314 20:53:19.141137 Removing current net device
2315 20:53:19.141519
2316 20:53:19.143824 Finalizing coreboot
2317 20:53:19.144288
2318 20:53:19.150593 Exiting depthcharge with code 4 at timestamp: 28966003
2319 20:53:19.151038
2320 20:53:19.151386
2321 20:53:19.151711 Starting kernel ...
2322 20:53:19.152023
2323 20:53:19.152331
2324 20:53:19.152631
2325 20:53:19.153810 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2326 20:53:19.154301 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2327 20:53:19.154677 Setting prompt string to ['Linux version [0-9]']
2328 20:53:19.155030 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2329 20:53:19.155387 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2331 20:57:43.155285 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2333 20:57:43.156416 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2335 20:57:43.157418 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2338 20:57:43.159276 end: 2 depthcharge-action (duration 00:05:00) [common]
2340 20:57:43.160548 Cleaning after the job
2341 20:57:43.161012 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785140/tftp-deploy-vrf0m9hj/ramdisk
2342 20:57:43.163557 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785140/tftp-deploy-vrf0m9hj/kernel
2343 20:57:43.166914 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785140/tftp-deploy-vrf0m9hj/nfsrootfs
2344 20:57:43.228989 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785140/tftp-deploy-vrf0m9hj/modules
2345 20:57:43.229318 start: 5.1 power-off (timeout 00:00:30) [common]
2346 20:57:43.229493 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=off'
2347 20:57:43.248505 >> Command sent successfully.
2348 20:57:43.250321 Returned 0 in 0 seconds
2349 20:57:43.351508 end: 5.1 power-off (duration 00:00:00) [common]
2351 20:57:43.353122 start: 5.2 read-feedback (timeout 00:10:00) [common]
2352 20:57:43.354403 Listened to connection for namespace 'common' for up to 1s
2353 20:57:44.357717 Finalising connection for namespace 'common'
2354 20:57:44.358492 Disconnecting from shell: Finalise
2355 20:57:44.460102 end: 5.2 read-feedback (duration 00:00:01) [common]
2356 20:57:44.460769 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8785140
2357 20:57:44.595784 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8785140
2358 20:57:44.595986 JobError: Your job cannot terminate cleanly.