Boot log: asus-cx9400-volteer
- Kernel Errors: 0
- Boot result: FAIL
- Errors: 2
- Kernel Warnings: 0
- Warnings: 0
1 20:52:12.437436 lava-dispatcher, installed at version: 2022.11
2 20:52:12.437634 start: 0 validate
3 20:52:12.437767 Start time: 2023-01-18 20:52:12.437757+00:00 (UTC)
4 20:52:12.437899 Using caching service: 'http://localhost/cache/?uri=%s'
5 20:52:12.438027 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230114.0%2Famd64%2Finitrd.cpio.gz exists
6 20:52:12.730278 Using caching service: 'http://localhost/cache/?uri=%s'
7 20:52:12.731096 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.269-cip88-rt28%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 20:52:13.019929 Using caching service: 'http://localhost/cache/?uri=%s'
9 20:52:13.020638 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230114.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 20:52:13.313458 Using caching service: 'http://localhost/cache/?uri=%s'
11 20:52:13.314159 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.269-cip88-rt28%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 20:52:13.612494 validate duration: 1.17
14 20:52:13.613882 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 20:52:13.614450 start: 1.1 download-retry (timeout 00:10:00) [common]
16 20:52:13.614983 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 20:52:13.615539 Not decompressing ramdisk as can be used compressed.
18 20:52:13.616015 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230114.0/amd64/initrd.cpio.gz
19 20:52:13.616392 saving as /var/lib/lava/dispatcher/tmp/8785134/tftp-deploy-m1mwol1u/ramdisk/initrd.cpio.gz
20 20:52:13.616750 total size: 5432122 (5MB)
21 20:52:13.622150 progress 0% (0MB)
22 20:52:13.630441 progress 5% (0MB)
23 20:52:13.637255 progress 10% (0MB)
24 20:52:13.641919 progress 15% (0MB)
25 20:52:13.646087 progress 20% (1MB)
26 20:52:13.649129 progress 25% (1MB)
27 20:52:13.651823 progress 30% (1MB)
28 20:52:13.654731 progress 35% (1MB)
29 20:52:13.657023 progress 40% (2MB)
30 20:52:13.659153 progress 45% (2MB)
31 20:52:13.661174 progress 50% (2MB)
32 20:52:13.663239 progress 55% (2MB)
33 20:52:13.665078 progress 60% (3MB)
34 20:52:13.666757 progress 65% (3MB)
35 20:52:13.668587 progress 70% (3MB)
36 20:52:13.670220 progress 75% (3MB)
37 20:52:13.671729 progress 80% (4MB)
38 20:52:13.673204 progress 85% (4MB)
39 20:52:13.674847 progress 90% (4MB)
40 20:52:13.676252 progress 95% (4MB)
41 20:52:13.677608 progress 100% (5MB)
42 20:52:13.677871 5MB downloaded in 0.06s (84.75MB/s)
43 20:52:13.678026 end: 1.1.1 http-download (duration 00:00:00) [common]
45 20:52:13.678284 end: 1.1 download-retry (duration 00:00:00) [common]
46 20:52:13.678378 start: 1.2 download-retry (timeout 00:10:00) [common]
47 20:52:13.678471 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 20:52:13.678580 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.269-cip88-rt28/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 20:52:13.678653 saving as /var/lib/lava/dispatcher/tmp/8785134/tftp-deploy-m1mwol1u/kernel/bzImage
50 20:52:13.678720 total size: 9711616 (9MB)
51 20:52:13.678785 No compression specified
52 20:52:15.682017 progress 0% (0MB)
53 20:52:15.696115 progress 5% (0MB)
54 20:52:15.709797 progress 10% (0MB)
55 20:52:15.717960 progress 15% (1MB)
56 20:52:15.723748 progress 20% (1MB)
57 20:52:15.728403 progress 25% (2MB)
58 20:52:15.732257 progress 30% (2MB)
59 20:52:15.735954 progress 35% (3MB)
60 20:52:15.739410 progress 40% (3MB)
61 20:52:15.742526 progress 45% (4MB)
62 20:52:15.745475 progress 50% (4MB)
63 20:52:15.748231 progress 55% (5MB)
64 20:52:15.750650 progress 60% (5MB)
65 20:52:15.753099 progress 65% (6MB)
66 20:52:15.755562 progress 70% (6MB)
67 20:52:15.757942 progress 75% (6MB)
68 20:52:15.760297 progress 80% (7MB)
69 20:52:15.762487 progress 85% (7MB)
70 20:52:15.764838 progress 90% (8MB)
71 20:52:15.767233 progress 95% (8MB)
72 20:52:15.769593 progress 100% (9MB)
73 20:52:15.769799 9MB downloaded in 2.09s (4.43MB/s)
74 20:52:15.769949 end: 1.2.1 http-download (duration 00:00:02) [common]
76 20:52:15.770189 end: 1.2 download-retry (duration 00:00:02) [common]
77 20:52:15.770279 start: 1.3 download-retry (timeout 00:09:58) [common]
78 20:52:15.770366 start: 1.3.1 http-download (timeout 00:09:58) [common]
79 20:52:15.770476 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230114.0/amd64/full.rootfs.tar.xz
80 20:52:15.770543 saving as /var/lib/lava/dispatcher/tmp/8785134/tftp-deploy-m1mwol1u/nfsrootfs/full.rootfs.tar
81 20:52:15.770604 total size: 123911640 (118MB)
82 20:52:15.770665 Using unxz to decompress xz
83 20:52:15.773950 progress 0% (0MB)
84 20:52:16.209407 progress 5% (5MB)
85 20:52:16.653066 progress 10% (11MB)
86 20:52:17.101472 progress 15% (17MB)
87 20:52:17.559732 progress 20% (23MB)
88 20:52:17.892278 progress 25% (29MB)
89 20:52:18.225474 progress 30% (35MB)
90 20:52:18.490235 progress 35% (41MB)
91 20:52:18.652850 progress 40% (47MB)
92 20:52:19.011850 progress 45% (53MB)
93 20:52:19.367629 progress 50% (59MB)
94 20:52:19.695749 progress 55% (65MB)
95 20:52:20.039922 progress 60% (70MB)
96 20:52:20.365445 progress 65% (76MB)
97 20:52:20.735819 progress 70% (82MB)
98 20:52:21.138706 progress 75% (88MB)
99 20:52:21.541413 progress 80% (94MB)
100 20:52:21.664295 progress 85% (100MB)
101 20:52:21.822900 progress 90% (106MB)
102 20:52:22.148691 progress 95% (112MB)
103 20:52:22.509973 progress 100% (118MB)
104 20:52:22.515626 118MB downloaded in 6.75s (17.52MB/s)
105 20:52:22.515887 end: 1.3.1 http-download (duration 00:00:07) [common]
107 20:52:22.516153 end: 1.3 download-retry (duration 00:00:07) [common]
108 20:52:22.516249 start: 1.4 download-retry (timeout 00:09:51) [common]
109 20:52:22.516340 start: 1.4.1 http-download (timeout 00:09:51) [common]
110 20:52:22.516456 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.269-cip88-rt28/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 20:52:22.516526 saving as /var/lib/lava/dispatcher/tmp/8785134/tftp-deploy-m1mwol1u/modules/modules.tar
112 20:52:22.516589 total size: 64664 (0MB)
113 20:52:22.516652 Using unxz to decompress xz
114 20:52:22.519807 progress 50% (0MB)
115 20:52:22.520177 progress 100% (0MB)
116 20:52:22.524343 0MB downloaded in 0.01s (7.96MB/s)
117 20:52:22.524561 end: 1.4.1 http-download (duration 00:00:00) [common]
119 20:52:22.524818 end: 1.4 download-retry (duration 00:00:00) [common]
120 20:52:22.524913 start: 1.5 prepare-tftp-overlay (timeout 00:09:51) [common]
121 20:52:22.525010 start: 1.5.1 extract-nfsrootfs (timeout 00:09:51) [common]
122 20:52:24.262724 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8785134/extract-nfsrootfs-xi54azw0
123 20:52:24.262993 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
124 20:52:24.263101 start: 1.5.2 lava-overlay (timeout 00:09:49) [common]
125 20:52:24.263240 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp
126 20:52:24.263342 makedir: /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin
127 20:52:24.263429 makedir: /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/tests
128 20:52:24.263509 makedir: /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/results
129 20:52:24.263606 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-add-keys
130 20:52:24.263743 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-add-sources
131 20:52:24.263859 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-background-process-start
132 20:52:24.263973 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-background-process-stop
133 20:52:24.264085 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-common-functions
134 20:52:24.264226 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-echo-ipv4
135 20:52:24.264337 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-install-packages
136 20:52:24.264448 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-installed-packages
137 20:52:24.264556 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-os-build
138 20:52:24.264666 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-probe-channel
139 20:52:24.264775 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-probe-ip
140 20:52:24.264883 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-target-ip
141 20:52:24.264995 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-target-mac
142 20:52:24.265102 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-target-storage
143 20:52:24.265214 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-test-case
144 20:52:24.265325 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-test-event
145 20:52:24.265434 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-test-feedback
146 20:52:24.265542 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-test-raise
147 20:52:24.265650 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-test-reference
148 20:52:24.265760 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-test-runner
149 20:52:24.265870 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-test-set
150 20:52:24.265978 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-test-shell
151 20:52:24.266088 Updating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-install-packages (oe)
152 20:52:24.266202 Updating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/bin/lava-installed-packages (oe)
153 20:52:24.266299 Creating /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/environment
154 20:52:24.266384 LAVA metadata
155 20:52:24.266450 - LAVA_JOB_ID=8785134
156 20:52:24.266513 - LAVA_DISPATCHER_IP=192.168.201.1
157 20:52:24.266609 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:49) [common]
158 20:52:24.266674 skipped lava-vland-overlay
159 20:52:24.266750 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
160 20:52:24.266831 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:49) [common]
161 20:52:24.266928 skipped lava-multinode-overlay
162 20:52:24.267032 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
163 20:52:24.267114 start: 1.5.2.3 test-definition (timeout 00:09:49) [common]
164 20:52:24.267186 Loading test definitions
165 20:52:24.267277 start: 1.5.2.3.1 git-repo-action (timeout 00:09:49) [common]
166 20:52:24.267346 Using /lava-8785134 at stage 0
167 20:52:24.267440 Fetching tests from https://github.com/kernelci/test-definitions
168 20:52:24.267518 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/0/tests/0_ltp-ipc'
169 20:52:27.747005 Running '/usr/bin/git checkout kernelci.org
170 20:52:27.884512 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
171 20:52:27.885266 uuid=8785134_1.5.2.3.1 testdef=None
172 20:52:27.885434 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
174 20:52:27.885702 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
175 20:52:27.886579 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
177 20:52:27.886822 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
178 20:52:27.887903 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
180 20:52:27.888202 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
181 20:52:27.889237 runner path: /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/0/tests/0_ltp-ipc test_uuid 8785134_1.5.2.3.1
182 20:52:27.889330 SKIPFILE='skipfile-lkft.yaml'
183 20:52:27.889406 SKIP_INSTALL='true'
184 20:52:27.889471 TST_CMDFILES='ipc'
185 20:52:27.889616 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
187 20:52:27.889873 Creating lava-test-runner.conf files
188 20:52:27.889942 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8785134/lava-overlay-70zjusbp/lava-8785134/0 for stage 0
189 20:52:27.890034 - 0_ltp-ipc
190 20:52:27.890139 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
191 20:52:27.890232 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
192 20:52:35.422844 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
193 20:52:35.423075 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
194 20:52:35.423219 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
195 20:52:35.423424 end: 1.5.2 lava-overlay (duration 00:00:11) [common]
196 20:52:35.423532 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
197 20:52:35.525255 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
198 20:52:35.525617 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
199 20:52:35.525808 extracting modules file /var/lib/lava/dispatcher/tmp/8785134/tftp-deploy-m1mwol1u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8785134/extract-nfsrootfs-xi54azw0
200 20:52:35.530048 extracting modules file /var/lib/lava/dispatcher/tmp/8785134/tftp-deploy-m1mwol1u/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8785134/extract-overlay-ramdisk-a9ifb_ya/ramdisk
201 20:52:35.534020 end: 1.5.4 extract-modules (duration 00:00:00) [common]
202 20:52:35.534133 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
203 20:52:35.534218 [common] Applying overlay to NFS
204 20:52:35.534291 [common] Applying overlay /var/lib/lava/dispatcher/tmp/8785134/compress-overlay-6y2rjwzi/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8785134/extract-nfsrootfs-xi54azw0
205 20:52:35.992415 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
206 20:52:35.992588 start: 1.5.6 configure-preseed-file (timeout 00:09:38) [common]
207 20:52:35.992687 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
208 20:52:35.992779 start: 1.5.7 compress-ramdisk (timeout 00:09:38) [common]
209 20:52:35.992863 Building ramdisk /var/lib/lava/dispatcher/tmp/8785134/extract-overlay-ramdisk-a9ifb_ya/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8785134/extract-overlay-ramdisk-a9ifb_ya/ramdisk
210 20:52:36.027533 >> 24777 blocks
211 20:52:36.491778 rename /var/lib/lava/dispatcher/tmp/8785134/extract-overlay-ramdisk-a9ifb_ya/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8785134/tftp-deploy-m1mwol1u/ramdisk/ramdisk.cpio.gz
212 20:52:36.492200 end: 1.5.7 compress-ramdisk (duration 00:00:00) [common]
213 20:52:36.492324 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
214 20:52:36.492431 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
215 20:52:36.492529 No mkimage arch provided, not using FIT.
216 20:52:36.492622 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
217 20:52:36.492710 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
218 20:52:36.492810 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
219 20:52:36.492911 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
220 20:52:36.492999 No LXC device requested
221 20:52:36.493086 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
222 20:52:36.493179 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
223 20:52:36.493266 end: 1.7 deploy-device-env (duration 00:00:00) [common]
224 20:52:36.493339 Checking files for TFTP limit of 4294967296 bytes.
225 20:52:36.493736 end: 1 tftp-deploy (duration 00:00:23) [common]
226 20:52:36.493844 start: 2 depthcharge-action (timeout 00:05:00) [common]
227 20:52:36.493940 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
228 20:52:36.494069 substitutions:
229 20:52:36.494141 - {DTB}: None
230 20:52:36.494209 - {INITRD}: 8785134/tftp-deploy-m1mwol1u/ramdisk/ramdisk.cpio.gz
231 20:52:36.494274 - {KERNEL}: 8785134/tftp-deploy-m1mwol1u/kernel/bzImage
232 20:52:36.494337 - {LAVA_MAC}: None
233 20:52:36.494397 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8785134/extract-nfsrootfs-xi54azw0
234 20:52:36.494457 - {NFS_SERVER_IP}: 192.168.201.1
235 20:52:36.494516 - {PRESEED_CONFIG}: None
236 20:52:36.494574 - {PRESEED_LOCAL}: None
237 20:52:36.494632 - {RAMDISK}: 8785134/tftp-deploy-m1mwol1u/ramdisk/ramdisk.cpio.gz
238 20:52:36.494690 - {ROOT_PART}: None
239 20:52:36.494747 - {ROOT}: None
240 20:52:36.494805 - {SERVER_IP}: 192.168.201.1
241 20:52:36.494861 - {TEE}: None
242 20:52:36.494971 Parsed boot commands:
243 20:52:36.495030 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
244 20:52:36.495192 Parsed boot commands: tftpboot 192.168.201.1 8785134/tftp-deploy-m1mwol1u/kernel/bzImage 8785134/tftp-deploy-m1mwol1u/kernel/cmdline 8785134/tftp-deploy-m1mwol1u/ramdisk/ramdisk.cpio.gz
245 20:52:36.495288 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
246 20:52:36.495380 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
247 20:52:36.495480 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
248 20:52:36.495574 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
249 20:52:36.495648 Not connected, no need to disconnect.
250 20:52:36.495731 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
251 20:52:36.495817 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
252 20:52:36.495888 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-1'
253 20:52:36.498522 Setting prompt string to ['lava-test: # ']
254 20:52:36.498811 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
255 20:52:36.498966 end: 2.2.1 reset-connection (duration 00:00:00) [common]
256 20:52:36.499070 start: 2.2.2 reset-device (timeout 00:05:00) [common]
257 20:52:36.499171 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
258 20:52:36.499359 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=reboot'
259 20:52:36.517862 >> Command sent successfully.
260 20:52:36.519741 Returned 0 in 0 seconds
261 20:52:36.620816 end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
263 20:52:36.622138 end: 2.2.2 reset-device (duration 00:00:00) [common]
264 20:52:36.622580 start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
265 20:52:36.623044 Setting prompt string to 'Starting depthcharge on Voema...'
266 20:52:36.623371 Changing prompt to 'Starting depthcharge on Voema...'
267 20:52:36.623732 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
268 20:52:36.624892 [Enter `^Ec?' for help]
269 20:52:44.301871
270 20:52:44.302535
271 20:52:44.312002 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
272 20:52:44.315547 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
273 20:52:44.322018 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
274 20:52:44.324874 CPU: AES supported, TXT NOT supported, VT supported
275 20:52:44.331613 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
276 20:52:44.338242 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
277 20:52:44.341388 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
278 20:52:44.344805 VBOOT: Loading verstage.
279 20:52:44.351753 FMAP: Found "FLASH" version 1.1 at 0x1804000.
280 20:52:44.354620 FMAP: base = 0x0 size = 0x2000000 #areas = 32
281 20:52:44.357942 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
282 20:52:44.361747
283 20:52:44.368151 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
284 20:52:44.374696 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
285 20:52:44.377718
286 20:52:44.378209
287 20:52:44.387705 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
288 20:52:44.402507 Probing TPM: . done!
289 20:52:44.405671 TPM ready after 0 ms
290 20:52:44.409458 Connected to device vid:did:rid of 1ae0:0028:00
291 20:52:44.420532 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
292 20:52:44.426907 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
293 20:52:44.430266 Initialized TPM device CR50 revision 0
294 20:52:44.483147 tlcl_send_startup: Startup return code is 0
295 20:52:44.483675 TPM: setup succeeded
296 20:52:44.498563 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
297 20:52:44.513136 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
298 20:52:44.525932 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
299 20:52:44.535585 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
300 20:52:44.539530 Chrome EC: UHEPI supported
301 20:52:44.543706 Phase 1
302 20:52:44.546436 FMAP: area GBB found @ 1805000 (458752 bytes)
303 20:52:44.556643 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
304 20:52:44.563514 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
305 20:52:44.569874 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
306 20:52:44.577084 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
307 20:52:44.579556 Recovery requested (1009000e)
308 20:52:44.582762 TPM: Extending digest for VBOOT: boot mode into PCR 0
309 20:52:44.594825 tlcl_extend: response is 0
310 20:52:44.601313 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
311 20:52:44.611532 tlcl_extend: response is 0
312 20:52:44.618230 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
313 20:52:44.625085 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
314 20:52:44.631506 BS: verstage times (exec / console): total (unknown) / 142 ms
315 20:52:44.631992
316 20:52:44.632382
317 20:52:44.644911 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
318 20:52:44.651568 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
319 20:52:44.654757 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
320 20:52:44.658098 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
321 20:52:44.664827 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
322 20:52:44.667668 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
323 20:52:44.671310 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
324 20:52:44.674546 TCO_STS: 0000 0000
325 20:52:44.677848 GEN_PMCON: d0015038 00002200
326 20:52:44.681212 GBLRST_CAUSE: 00000000 00000000
327 20:52:44.681704 HPR_CAUSE0: 00000000
328 20:52:44.684445 prev_sleep_state 5
329 20:52:44.687559 Boot Count incremented to 16959
330 20:52:44.694169 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
331 20:52:44.701012 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
332 20:52:44.707309 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
333 20:52:44.714181 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
334 20:52:44.718796 Chrome EC: UHEPI supported
335 20:52:44.725109 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
336 20:52:44.739500 Probing TPM: done!
337 20:52:44.743424 Connected to device vid:did:rid of 1ae0:0028:00
338 20:52:44.754569 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
339 20:52:44.758413 Initialized TPM device CR50 revision 0
340 20:52:44.773919 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
341 20:52:44.780186 MRC: Hash idx 0x100b comparison successful.
342 20:52:44.783636 MRC cache found, size faa8
343 20:52:44.784238 bootmode is set to: 2
344 20:52:44.786690 SPD index = 0
345 20:52:44.793292 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
346 20:52:44.796520 SPD: module type is LPDDR4X
347 20:52:44.800013 SPD: module part number is MT53E512M64D4NW-046
348 20:52:44.803174
349 20:52:44.806648 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
350 20:52:44.813234 SPD: device width 16 bits, bus width 16 bits
351 20:52:44.816337 SPD: module size is 1024 MB (per channel)
352 20:52:45.248730 CBMEM:
353 20:52:45.252120 IMD: root @ 0x76fff000 254 entries.
354 20:52:45.255514 IMD: root @ 0x76ffec00 62 entries.
355 20:52:45.258515 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
356 20:52:45.265141 FMAP: area RW_VPD found @ f35000 (8192 bytes)
357 20:52:45.268328 External stage cache:
358 20:52:45.272185 IMD: root @ 0x7b3ff000 254 entries.
359 20:52:45.274810 IMD: root @ 0x7b3fec00 62 entries.
360 20:52:45.291006 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
361 20:52:45.297358 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
362 20:52:45.303258 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
363 20:52:45.318239 MRC: 'RECOVERY_MRC_CACHE' does not need update.
364 20:52:45.321629 cse_lite: Skip switching to RW in the recovery path
365 20:52:45.325153 8 DIMMs found
366 20:52:45.325653 SMM Memory Map
367 20:52:45.328333 SMRAM : 0x7b000000 0x800000
368 20:52:45.331736 Subregion 0: 0x7b000000 0x200000
369 20:52:45.334923 Subregion 1: 0x7b200000 0x200000
370 20:52:45.338528 Subregion 2: 0x7b400000 0x400000
371 20:52:45.341601 top_of_ram = 0x77000000
372 20:52:45.348170 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
373 20:52:45.351788 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
374 20:52:45.358587 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
375 20:52:45.362218 MTRR Range: Start=ff000000 End=0 (Size 1000000)
376 20:52:45.371524 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
377 20:52:45.378241 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
378 20:52:45.387965 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
379 20:52:45.391516 Processing 211 relocs. Offset value of 0x74c0b000
380 20:52:45.400475 BS: romstage times (exec / console): total (unknown) / 277 ms
381 20:52:45.406545
382 20:52:45.407199
383 20:52:45.416712 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
384 20:52:45.419883 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
385 20:52:45.430075 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
386 20:52:45.436486 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
387 20:52:45.443060 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
388 20:52:45.449547 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
389 20:52:45.496787 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
390 20:52:45.503074 Processing 5008 relocs. Offset value of 0x75d98000
391 20:52:45.506667 BS: postcar times (exec / console): total (unknown) / 59 ms
392 20:52:45.507342
393 20:52:45.510564
394 20:52:45.511086
395 20:52:45.519993 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
396 20:52:45.520544 Normal boot
397 20:52:45.523445 FW_CONFIG value is 0x804c02
398 20:52:45.526819 PCI: 00:07.0 disabled by fw_config
399 20:52:45.530117 PCI: 00:07.1 disabled by fw_config
400 20:52:45.533712 PCI: 00:0d.2 disabled by fw_config
401 20:52:45.536605 PCI: 00:1c.7 disabled by fw_config
402 20:52:45.543552 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
403 20:52:45.549893 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
404 20:52:45.553838 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
405 20:52:45.556630 GENERIC: 0.0 disabled by fw_config
406 20:52:45.560220 GENERIC: 1.0 disabled by fw_config
407 20:52:45.566817 fw_config match found: DB_USB=USB3_ACTIVE
408 20:52:45.570096 fw_config match found: DB_USB=USB3_ACTIVE
409 20:52:45.573199 fw_config match found: DB_USB=USB3_ACTIVE
410 20:52:45.576525 fw_config match found: DB_USB=USB3_ACTIVE
411 20:52:45.583143 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
412 20:52:45.590067 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
413 20:52:45.596345 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
414 20:52:45.606295 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
415 20:52:45.609584 microcode: sig=0x806c1 pf=0x80 revision=0x86
416 20:52:45.616385 microcode: Update skipped, already up-to-date
417 20:52:45.623014 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
418 20:52:45.650365 Detected 4 core, 8 thread CPU.
419 20:52:45.653654 Setting up SMI for CPU
420 20:52:45.656999 IED base = 0x7b400000
421 20:52:45.657484 IED size = 0x00400000
422 20:52:45.659956 Will perform SMM setup.
423 20:52:45.666594 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
424 20:52:45.673017 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
425 20:52:45.679520 Processing 16 relocs. Offset value of 0x00030000
426 20:52:45.683207 Attempting to start 7 APs
427 20:52:45.686401 Waiting for 10ms after sending INIT.
428 20:52:45.702293 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
429 20:52:45.702848 done.
430 20:52:45.705199 AP: slot 6 apic_id 2.
431 20:52:45.708731 AP: slot 2 apic_id 3.
432 20:52:45.711865 Waiting for 2nd SIPI to complete...done.
433 20:52:45.715116 AP: slot 3 apic_id 5.
434 20:52:45.715553 AP: slot 7 apic_id 4.
435 20:52:45.718686 AP: slot 4 apic_id 7.
436 20:52:45.722145 AP: slot 5 apic_id 6.
437 20:52:45.728887 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
438 20:52:45.735379 Processing 13 relocs. Offset value of 0x00038000
439 20:52:45.735871 Unable to locate Global NVS
440 20:52:45.745268 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
441 20:52:45.748584 Installing permanent SMM handler to 0x7b000000
442 20:52:45.758651 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
443 20:52:45.762225 Processing 794 relocs. Offset value of 0x7b010000
444 20:52:45.771947 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
445 20:52:45.775325 Processing 13 relocs. Offset value of 0x7b008000
446 20:52:45.782022 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
447 20:52:45.788672 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
448 20:52:45.791625 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
449 20:52:45.798527 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
450 20:52:45.804876 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
451 20:52:45.811802 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
452 20:52:45.818078 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
453 20:52:45.818527 Unable to locate Global NVS
454 20:52:45.828221 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
455 20:52:45.831354 Clearing SMI status registers
456 20:52:45.831801 SMI_STS: PM1
457 20:52:45.834698 PM1_STS: PWRBTN
458 20:52:45.841415 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
459 20:52:45.844633 In relocation handler: CPU 0
460 20:52:45.848180 New SMBASE=0x7b000000 IEDBASE=0x7b400000
461 20:52:45.854797 Writing SMRR. base = 0x7b000006, mask=0xff800c00
462 20:52:45.855313 Relocation complete.
463 20:52:45.864822 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
464 20:52:45.865366 In relocation handler: CPU 1
465 20:52:45.871520 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
466 20:52:45.872110 Relocation complete.
467 20:52:45.881385 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
468 20:52:45.881949 In relocation handler: CPU 6
469 20:52:45.887800 New SMBASE=0x7affe800 IEDBASE=0x7b400000
470 20:52:45.891785 Writing SMRR. base = 0x7b000006, mask=0xff800c00
471 20:52:45.894199 Relocation complete.
472 20:52:45.901292 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
473 20:52:45.904323 In relocation handler: CPU 2
474 20:52:45.907704 New SMBASE=0x7afff800 IEDBASE=0x7b400000
475 20:52:45.911099 Relocation complete.
476 20:52:45.917601 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
477 20:52:45.920977 In relocation handler: CPU 5
478 20:52:45.924404 New SMBASE=0x7affec00 IEDBASE=0x7b400000
479 20:52:45.930636 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 20:52:45.931131 Relocation complete.
481 20:52:45.937369 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
482 20:52:45.940773 In relocation handler: CPU 4
483 20:52:45.947849 New SMBASE=0x7afff000 IEDBASE=0x7b400000
484 20:52:45.948478 Relocation complete.
485 20:52:45.953857 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
486 20:52:45.957490 In relocation handler: CPU 7
487 20:52:45.963892 New SMBASE=0x7affe400 IEDBASE=0x7b400000
488 20:52:45.967364 Writing SMRR. base = 0x7b000006, mask=0xff800c00
489 20:52:45.970819 Relocation complete.
490 20:52:45.977683 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
491 20:52:45.982026 In relocation handler: CPU 3
492 20:52:45.985318 New SMBASE=0x7afff400 IEDBASE=0x7b400000
493 20:52:45.985783 Relocation complete.
494 20:52:45.988694 Initializing CPU #0
495 20:52:45.991992 CPU: vendor Intel device 806c1
496 20:52:45.995159 CPU: family 06, model 8c, stepping 01
497 20:52:45.998596 Clearing out pending MCEs
498 20:52:46.002239 Setting up local APIC...
499 20:52:46.002787 apic_id: 0x00 done.
500 20:52:46.005357 Turbo is available but hidden
501 20:52:46.008293 Turbo is available and visible
502 20:52:46.015284 microcode: Update skipped, already up-to-date
503 20:52:46.015900 CPU #0 initialized
504 20:52:46.018321 Initializing CPU #7
505 20:52:46.018775 Initializing CPU #3
506 20:52:46.021661 CPU: vendor Intel device 806c1
507 20:52:46.028191 CPU: family 06, model 8c, stepping 01
508 20:52:46.028755 CPU: vendor Intel device 806c1
509 20:52:46.031403
510 20:52:46.034801 CPU: family 06, model 8c, stepping 01
511 20:52:46.035300 Clearing out pending MCEs
512 20:52:46.038472 Clearing out pending MCEs
513 20:52:46.041407 Setting up local APIC...
514 20:52:46.044993 Initializing CPU #6
515 20:52:46.045465 apic_id: 0x04 done.
516 20:52:46.048214 Initializing CPU #1
517 20:52:46.048669 Initializing CPU #4
518 20:52:46.051566
519 20:52:46.052121 Initializing CPU #5
520 20:52:46.055266 CPU: vendor Intel device 806c1
521 20:52:46.058047 CPU: family 06, model 8c, stepping 01
522 20:52:46.061723 CPU: vendor Intel device 806c1
523 20:52:46.064729 CPU: family 06, model 8c, stepping 01
524 20:52:46.068227 Clearing out pending MCEs
525 20:52:46.071454 Clearing out pending MCEs
526 20:52:46.074897 Setting up local APIC...
527 20:52:46.078125 CPU: vendor Intel device 806c1
528 20:52:46.081540 CPU: family 06, model 8c, stepping 01
529 20:52:46.082095 Initializing CPU #2
530 20:52:46.085018 Clearing out pending MCEs
531 20:52:46.088504 CPU: vendor Intel device 806c1
532 20:52:46.091346 CPU: family 06, model 8c, stepping 01
533 20:52:46.094728 Setting up local APIC...
534 20:52:46.098339 apic_id: 0x07 done.
535 20:52:46.098931 Setting up local APIC...
536 20:52:46.104631 microcode: Update skipped, already up-to-date
537 20:52:46.105185 apic_id: 0x06 done.
538 20:52:46.111186 microcode: Update skipped, already up-to-date
539 20:52:46.114520 microcode: Update skipped, already up-to-date
540 20:52:46.117786 CPU #4 initialized
541 20:52:46.121173 CPU: vendor Intel device 806c1
542 20:52:46.124506 CPU: family 06, model 8c, stepping 01
543 20:52:46.127978 Clearing out pending MCEs
544 20:52:46.128423 apic_id: 0x02 done.
545 20:52:46.130865 Setting up local APIC...
546 20:52:46.134101 CPU #5 initialized
547 20:52:46.134541 Setting up local APIC...
548 20:52:46.137520 apic_id: 0x03 done.
549 20:52:46.141011 microcode: Update skipped, already up-to-date
550 20:52:46.147373 microcode: Update skipped, already up-to-date
551 20:52:46.147817 CPU #6 initialized
552 20:52:46.151125 CPU #2 initialized
553 20:52:46.154201 apic_id: 0x05 done.
554 20:52:46.154641 CPU #7 initialized
555 20:52:46.160900 microcode: Update skipped, already up-to-date
556 20:52:46.161345 Clearing out pending MCEs
557 20:52:46.164299 CPU #3 initialized
558 20:52:46.167649 Setting up local APIC...
559 20:52:46.168095 apic_id: 0x01 done.
560 20:52:46.170639
561 20:52:46.174112 microcode: Update skipped, already up-to-date
562 20:52:46.177770 CPU #1 initialized
563 20:52:46.180767 bsp_do_flight_plan done after 464 msecs.
564 20:52:46.183968 CPU: frequency set to 4000 MHz
565 20:52:46.184410 Enabling SMIs.
566 20:52:46.190774 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
567 20:52:46.207504 SATAXPCIE1 indicates PCIe NVMe is present
568 20:52:46.210477 Probing TPM: done!
569 20:52:46.213801 Connected to device vid:did:rid of 1ae0:0028:00
570 20:52:46.224502 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
571 20:52:46.228005 Initialized TPM device CR50 revision 0
572 20:52:46.231087 Enabling S0i3.4
573 20:52:46.238146 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
574 20:52:46.241009 Found a VBT of 8704 bytes after decompression
575 20:52:46.247681 cse_lite: CSE RO boot. HybridStorageMode disabled
576 20:52:46.254543 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
577 20:52:46.330313 FSPS returned 0
578 20:52:46.333743 Executing Phase 1 of FspMultiPhaseSiInit
579 20:52:46.343472 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
580 20:52:46.347100 port C0 DISC req: usage 1 usb3 1 usb2 5
581 20:52:46.350235 Raw Buffer output 0 00000511
582 20:52:46.353393 Raw Buffer output 1 00000000
583 20:52:46.357217 pmc_send_ipc_cmd succeeded
584 20:52:46.360904 port C1 DISC req: usage 1 usb3 2 usb2 3
585 20:52:46.364066
586 20:52:46.364658 Raw Buffer output 0 00000321
587 20:52:46.367599 Raw Buffer output 1 00000000
588 20:52:46.371675 pmc_send_ipc_cmd succeeded
589 20:52:46.376870 Detected 4 core, 8 thread CPU.
590 20:52:46.380094 Detected 4 core, 8 thread CPU.
591 20:52:46.614394 Display FSP Version Info HOB
592 20:52:46.617537 Reference Code - CPU = a.0.4c.31
593 20:52:46.621050 uCode Version = 0.0.0.86
594 20:52:46.624178 TXT ACM version = ff.ff.ff.ffff
595 20:52:46.627268 Reference Code - ME = a.0.4c.31
596 20:52:46.630961 MEBx version = 0.0.0.0
597 20:52:46.634057 ME Firmware Version = Consumer SKU
598 20:52:46.637540 Reference Code - PCH = a.0.4c.31
599 20:52:46.640743 PCH-CRID Status = Disabled
600 20:52:46.644083 PCH-CRID Original Value = ff.ff.ff.ffff
601 20:52:46.647492 PCH-CRID New Value = ff.ff.ff.ffff
602 20:52:46.650630 OPROM - RST - RAID = ff.ff.ff.ffff
603 20:52:46.654162 PCH Hsio Version = 4.0.0.0
604 20:52:46.657306 Reference Code - SA - System Agent = a.0.4c.31
605 20:52:46.660642 Reference Code - MRC = 2.0.0.1
606 20:52:46.664035 SA - PCIe Version = a.0.4c.31
607 20:52:46.667588 SA-CRID Status = Disabled
608 20:52:46.670724 SA-CRID Original Value = 0.0.0.1
609 20:52:46.674426 SA-CRID New Value = 0.0.0.1
610 20:52:46.677357 OPROM - VBIOS = ff.ff.ff.ffff
611 20:52:46.680850 IO Manageability Engine FW Version = 11.1.4.0
612 20:52:46.684203 PHY Build Version = 0.0.0.e0
613 20:52:46.687593 Thunderbolt(TM) FW Version = 0.0.0.0
614 20:52:46.694212 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
615 20:52:46.697379 ITSS IRQ Polarities Before:
616 20:52:46.697854 IPC0: 0xffffffff
617 20:52:46.700579 IPC1: 0xffffffff
618 20:52:46.701118 IPC2: 0xffffffff
619 20:52:46.704195 IPC3: 0xffffffff
620 20:52:46.707204 ITSS IRQ Polarities After:
621 20:52:46.707679 IPC0: 0xffffffff
622 20:52:46.711037 IPC1: 0xffffffff
623 20:52:46.711702 IPC2: 0xffffffff
624 20:52:46.713948 IPC3: 0xffffffff
625 20:52:46.717106 Found PCIe Root Port #9 at PCI: 00:1d.0.
626 20:52:46.730354 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
627 20:52:46.740581 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
628 20:52:46.753745 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
629 20:52:46.760219 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
630 20:52:46.763412 Enumerating buses...
631 20:52:46.767034 Show all devs... Before device enumeration.
632 20:52:46.770482 Root Device: enabled 1
633 20:52:46.771112 DOMAIN: 0000: enabled 1
634 20:52:46.773518 CPU_CLUSTER: 0: enabled 1
635 20:52:46.776860 PCI: 00:00.0: enabled 1
636 20:52:46.780495 PCI: 00:02.0: enabled 1
637 20:52:46.781085 PCI: 00:04.0: enabled 1
638 20:52:46.783451 PCI: 00:05.0: enabled 1
639 20:52:46.787250 PCI: 00:06.0: enabled 0
640 20:52:46.790275 PCI: 00:07.0: enabled 0
641 20:52:46.790868 PCI: 00:07.1: enabled 0
642 20:52:46.793991 PCI: 00:07.2: enabled 0
643 20:52:46.796999 PCI: 00:07.3: enabled 0
644 20:52:46.797589 PCI: 00:08.0: enabled 1
645 20:52:46.800120 PCI: 00:09.0: enabled 0
646 20:52:46.803505 PCI: 00:0a.0: enabled 0
647 20:52:46.806985 PCI: 00:0d.0: enabled 1
648 20:52:46.807575 PCI: 00:0d.1: enabled 0
649 20:52:46.810439 PCI: 00:0d.2: enabled 0
650 20:52:46.813315 PCI: 00:0d.3: enabled 0
651 20:52:46.816499 PCI: 00:0e.0: enabled 0
652 20:52:46.816982 PCI: 00:10.2: enabled 1
653 20:52:46.820116 PCI: 00:10.6: enabled 0
654 20:52:46.823726 PCI: 00:10.7: enabled 0
655 20:52:46.827008 PCI: 00:12.0: enabled 0
656 20:52:46.827604 PCI: 00:12.6: enabled 0
657 20:52:46.829917 PCI: 00:13.0: enabled 0
658 20:52:46.833322 PCI: 00:14.0: enabled 1
659 20:52:46.833831 PCI: 00:14.1: enabled 0
660 20:52:46.836578
661 20:52:46.837060 PCI: 00:14.2: enabled 1
662 20:52:46.840171 PCI: 00:14.3: enabled 1
663 20:52:46.843382 PCI: 00:15.0: enabled 1
664 20:52:46.843874 PCI: 00:15.1: enabled 1
665 20:52:46.846794 PCI: 00:15.2: enabled 1
666 20:52:46.850111 PCI: 00:15.3: enabled 1
667 20:52:46.853115 PCI: 00:16.0: enabled 1
668 20:52:46.853599 PCI: 00:16.1: enabled 0
669 20:52:46.856495 PCI: 00:16.2: enabled 0
670 20:52:46.859929 PCI: 00:16.3: enabled 0
671 20:52:46.863264 PCI: 00:16.4: enabled 0
672 20:52:46.863708 PCI: 00:16.5: enabled 0
673 20:52:46.866627 PCI: 00:17.0: enabled 1
674 20:52:46.869899 PCI: 00:19.0: enabled 0
675 20:52:46.873047 PCI: 00:19.1: enabled 1
676 20:52:46.873487 PCI: 00:19.2: enabled 0
677 20:52:46.876642 PCI: 00:1c.0: enabled 1
678 20:52:46.879953 PCI: 00:1c.1: enabled 0
679 20:52:46.880486 PCI: 00:1c.2: enabled 0
680 20:52:46.883329 PCI: 00:1c.3: enabled 0
681 20:52:46.886377 PCI: 00:1c.4: enabled 0
682 20:52:46.889597 PCI: 00:1c.5: enabled 0
683 20:52:46.890034 PCI: 00:1c.6: enabled 1
684 20:52:46.893175 PCI: 00:1c.7: enabled 0
685 20:52:46.896367 PCI: 00:1d.0: enabled 1
686 20:52:46.899933 PCI: 00:1d.1: enabled 0
687 20:52:46.900370 PCI: 00:1d.2: enabled 1
688 20:52:46.903063 PCI: 00:1d.3: enabled 0
689 20:52:46.906479 PCI: 00:1e.0: enabled 1
690 20:52:46.909899 PCI: 00:1e.1: enabled 0
691 20:52:46.910520 PCI: 00:1e.2: enabled 1
692 20:52:46.912932 PCI: 00:1e.3: enabled 1
693 20:52:46.916569 PCI: 00:1f.0: enabled 1
694 20:52:46.917072 PCI: 00:1f.1: enabled 0
695 20:52:46.919841
696 20:52:46.920326 PCI: 00:1f.2: enabled 1
697 20:52:46.922994 PCI: 00:1f.3: enabled 1
698 20:52:46.926147 PCI: 00:1f.4: enabled 0
699 20:52:46.926585 PCI: 00:1f.5: enabled 1
700 20:52:46.929902 PCI: 00:1f.6: enabled 0
701 20:52:46.932973 PCI: 00:1f.7: enabled 0
702 20:52:46.936165 APIC: 00: enabled 1
703 20:52:46.936744 GENERIC: 0.0: enabled 1
704 20:52:46.939414 GENERIC: 0.0: enabled 1
705 20:52:46.943031 GENERIC: 1.0: enabled 1
706 20:52:46.943472 GENERIC: 0.0: enabled 1
707 20:52:46.946362 GENERIC: 1.0: enabled 1
708 20:52:46.949453 USB0 port 0: enabled 1
709 20:52:46.953010 GENERIC: 0.0: enabled 1
710 20:52:46.953448 USB0 port 0: enabled 1
711 20:52:46.955979 GENERIC: 0.0: enabled 1
712 20:52:46.959402 I2C: 00:1a: enabled 1
713 20:52:46.959846 I2C: 00:31: enabled 1
714 20:52:46.962933 I2C: 00:32: enabled 1
715 20:52:46.966066 I2C: 00:10: enabled 1
716 20:52:46.966535 I2C: 00:15: enabled 1
717 20:52:46.969530 GENERIC: 0.0: enabled 0
718 20:52:46.972973 GENERIC: 1.0: enabled 0
719 20:52:46.976195 GENERIC: 0.0: enabled 1
720 20:52:46.976656 SPI: 00: enabled 1
721 20:52:46.979402 SPI: 00: enabled 1
722 20:52:46.982778 PNP: 0c09.0: enabled 1
723 20:52:46.983216 GENERIC: 0.0: enabled 1
724 20:52:46.986267 USB3 port 0: enabled 1
725 20:52:46.989386 USB3 port 1: enabled 1
726 20:52:46.989836 USB3 port 2: enabled 0
727 20:52:46.992994 USB3 port 3: enabled 0
728 20:52:46.996004 USB2 port 0: enabled 0
729 20:52:46.999610 USB2 port 1: enabled 1
730 20:52:47.000057 USB2 port 2: enabled 1
731 20:52:47.002671 USB2 port 3: enabled 0
732 20:52:47.006404 USB2 port 4: enabled 1
733 20:52:47.007002 USB2 port 5: enabled 0
734 20:52:47.009620 USB2 port 6: enabled 0
735 20:52:47.012543 USB2 port 7: enabled 0
736 20:52:47.013121 USB2 port 8: enabled 0
737 20:52:47.016123 USB2 port 9: enabled 0
738 20:52:47.019513 USB3 port 0: enabled 0
739 20:52:47.023217 USB3 port 1: enabled 1
740 20:52:47.023812 USB3 port 2: enabled 0
741 20:52:47.026014 USB3 port 3: enabled 0
742 20:52:47.029496 GENERIC: 0.0: enabled 1
743 20:52:47.030077 GENERIC: 1.0: enabled 1
744 20:52:47.032721 APIC: 01: enabled 1
745 20:52:47.036218 APIC: 03: enabled 1
746 20:52:47.036877 APIC: 05: enabled 1
747 20:52:47.039562 APIC: 07: enabled 1
748 20:52:47.042694 APIC: 06: enabled 1
749 20:52:47.043277 APIC: 02: enabled 1
750 20:52:47.045906 APIC: 04: enabled 1
751 20:52:47.046391 Compare with tree...
752 20:52:47.049089 Root Device: enabled 1
753 20:52:47.052890 DOMAIN: 0000: enabled 1
754 20:52:47.055832 PCI: 00:00.0: enabled 1
755 20:52:47.056321 PCI: 00:02.0: enabled 1
756 20:52:47.059340
757 20:52:47.059828 PCI: 00:04.0: enabled 1
758 20:52:47.062385 GENERIC: 0.0: enabled 1
759 20:52:47.065959 PCI: 00:05.0: enabled 1
760 20:52:47.069235 PCI: 00:06.0: enabled 0
761 20:52:47.069749 PCI: 00:07.0: enabled 0
762 20:52:47.072841
763 20:52:47.073428 GENERIC: 0.0: enabled 1
764 20:52:47.076106 PCI: 00:07.1: enabled 0
765 20:52:47.079085 GENERIC: 1.0: enabled 1
766 20:52:47.082635 PCI: 00:07.2: enabled 0
767 20:52:47.085779 GENERIC: 0.0: enabled 1
768 20:52:47.086371 PCI: 00:07.3: enabled 0
769 20:52:47.089069 GENERIC: 1.0: enabled 1
770 20:52:47.092538 PCI: 00:08.0: enabled 1
771 20:52:47.096153 PCI: 00:09.0: enabled 0
772 20:52:47.099433 PCI: 00:0a.0: enabled 0
773 20:52:47.100022 PCI: 00:0d.0: enabled 1
774 20:52:47.102474 USB0 port 0: enabled 1
775 20:52:47.106141 USB3 port 0: enabled 1
776 20:52:47.108946 USB3 port 1: enabled 1
777 20:52:47.112169 USB3 port 2: enabled 0
778 20:52:47.112655 USB3 port 3: enabled 0
779 20:52:47.115878 PCI: 00:0d.1: enabled 0
780 20:52:47.118939 PCI: 00:0d.2: enabled 0
781 20:52:47.122477 GENERIC: 0.0: enabled 1
782 20:52:47.126003 PCI: 00:0d.3: enabled 0
783 20:52:47.126604 PCI: 00:0e.0: enabled 0
784 20:52:47.129026 PCI: 00:10.2: enabled 1
785 20:52:47.132323 PCI: 00:10.6: enabled 0
786 20:52:47.135811 PCI: 00:10.7: enabled 0
787 20:52:47.139237 PCI: 00:12.0: enabled 0
788 20:52:47.139861 PCI: 00:12.6: enabled 0
789 20:52:47.142327 PCI: 00:13.0: enabled 0
790 20:52:47.145613 PCI: 00:14.0: enabled 1
791 20:52:47.148708 USB0 port 0: enabled 1
792 20:52:47.152041 USB2 port 0: enabled 0
793 20:52:47.152535 USB2 port 1: enabled 1
794 20:52:47.155470 USB2 port 2: enabled 1
795 20:52:47.158982 USB2 port 3: enabled 0
796 20:52:47.162561 USB2 port 4: enabled 1
797 20:52:47.165820 USB2 port 5: enabled 0
798 20:52:47.168706 USB2 port 6: enabled 0
799 20:52:47.169236 USB2 port 7: enabled 0
800 20:52:47.172158 USB2 port 8: enabled 0
801 20:52:47.175270 USB2 port 9: enabled 0
802 20:52:47.178912 USB3 port 0: enabled 0
803 20:52:47.181901 USB3 port 1: enabled 1
804 20:52:47.185554 USB3 port 2: enabled 0
805 20:52:47.186050 USB3 port 3: enabled 0
806 20:52:47.188576 PCI: 00:14.1: enabled 0
807 20:52:47.191884 PCI: 00:14.2: enabled 1
808 20:52:47.195424 PCI: 00:14.3: enabled 1
809 20:52:47.198566 GENERIC: 0.0: enabled 1
810 20:52:47.199104 PCI: 00:15.0: enabled 1
811 20:52:47.202051 I2C: 00:1a: enabled 1
812 20:52:47.205132 I2C: 00:31: enabled 1
813 20:52:47.208678 I2C: 00:32: enabled 1
814 20:52:47.209124 PCI: 00:15.1: enabled 1
815 20:52:47.211796 I2C: 00:10: enabled 1
816 20:52:47.214968 PCI: 00:15.2: enabled 1
817 20:52:47.218906 PCI: 00:15.3: enabled 1
818 20:52:47.219369 PCI: 00:16.0: enabled 1
819 20:52:47.222457
820 20:52:47.222933 PCI: 00:16.1: enabled 0
821 20:52:47.226336 PCI: 00:16.2: enabled 0
822 20:52:47.229572 PCI: 00:16.3: enabled 0
823 20:52:47.230027 PCI: 00:16.4: enabled 0
824 20:52:47.232614 PCI: 00:16.5: enabled 0
825 20:52:47.236086 PCI: 00:17.0: enabled 1
826 20:52:47.239408 PCI: 00:19.0: enabled 0
827 20:52:47.243039 PCI: 00:19.1: enabled 1
828 20:52:47.243495 I2C: 00:15: enabled 1
829 20:52:47.246249 PCI: 00:19.2: enabled 0
830 20:52:47.249322 PCI: 00:1d.0: enabled 1
831 20:52:47.252791 GENERIC: 0.0: enabled 1
832 20:52:47.255783 PCI: 00:1e.0: enabled 1
833 20:52:47.256225 PCI: 00:1e.1: enabled 0
834 20:52:47.305999 PCI: 00:1e.2: enabled 1
835 20:52:47.306584 SPI: 00: enabled 1
836 20:52:47.307027 PCI: 00:1e.3: enabled 1
837 20:52:47.307409 SPI: 00: enabled 1
838 20:52:47.307759 PCI: 00:1f.0: enabled 1
839 20:52:47.308515 PNP: 0c09.0: enabled 1
840 20:52:47.308894 PCI: 00:1f.1: enabled 0
841 20:52:47.309235 PCI: 00:1f.2: enabled 1
842 20:52:47.309569 GENERIC: 0.0: enabled 1
843 20:52:47.309894 GENERIC: 0.0: enabled 1
844 20:52:47.310218 GENERIC: 1.0: enabled 1
845 20:52:47.310567 PCI: 00:1f.3: enabled 1
846 20:52:47.310940 PCI: 00:1f.4: enabled 0
847 20:52:47.311271 PCI: 00:1f.5: enabled 1
848 20:52:47.311591 PCI: 00:1f.6: enabled 0
849 20:52:47.311906 PCI: 00:1f.7: enabled 0
850 20:52:47.312220 CPU_CLUSTER: 0: enabled 1
851 20:52:47.312538 APIC: 00: enabled 1
852 20:52:47.312851 APIC: 01: enabled 1
853 20:52:47.358119 APIC: 03: enabled 1
854 20:52:47.358658 APIC: 05: enabled 1
855 20:52:47.359039 APIC: 07: enabled 1
856 20:52:47.359375 APIC: 06: enabled 1
857 20:52:47.359691 APIC: 02: enabled 1
858 20:52:47.359996 APIC: 04: enabled 1
859 20:52:47.360654 Root Device scanning...
860 20:52:47.360987 scan_static_bus for Root Device
861 20:52:47.361292 DOMAIN: 0000 enabled
862 20:52:47.361589 CPU_CLUSTER: 0 enabled
863 20:52:47.361879 DOMAIN: 0000 scanning...
864 20:52:47.362170 PCI: pci_scan_bus for bus 00
865 20:52:47.362459 PCI: 00:00.0 [8086/0000] ops
866 20:52:47.362747 PCI: 00:00.0 [8086/9a12] enabled
867 20:52:47.363096 PCI: 00:02.0 [8086/0000] bus ops
868 20:52:47.363391 PCI: 00:02.0 [8086/9a40] enabled
869 20:52:47.363682 PCI: 00:04.0 [8086/0000] bus ops
870 20:52:47.363970 PCI: 00:04.0 [8086/9a03] enabled
871 20:52:47.408369 PCI: 00:05.0 [8086/9a19] enabled
872 20:52:47.408997 PCI: 00:07.0 [0000/0000] hidden
873 20:52:47.409396 PCI: 00:08.0 [8086/9a11] enabled
874 20:52:47.409760 PCI: 00:0a.0 [8086/9a0d] disabled
875 20:52:47.410486 PCI: 00:0d.0 [8086/0000] bus ops
876 20:52:47.410952 PCI: 00:0d.0 [8086/9a13] enabled
877 20:52:47.411323 PCI: 00:14.0 [8086/0000] bus ops
878 20:52:47.411665 PCI: 00:14.0 [8086/a0ed] enabled
879 20:52:47.411999 PCI: 00:14.2 [8086/a0ef] enabled
880 20:52:47.412327 PCI: 00:14.3 [8086/0000] bus ops
881 20:52:47.412650 PCI: 00:14.3 [8086/a0f0] enabled
882 20:52:47.412973 PCI: 00:15.0 [8086/0000] bus ops
883 20:52:47.413292 PCI: 00:15.0 [8086/a0e8] enabled
884 20:52:47.413612 PCI: 00:15.1 [8086/0000] bus ops
885 20:52:47.413932 PCI: 00:15.1 [8086/a0e9] enabled
886 20:52:47.414712 PCI: 00:15.2 [8086/0000] bus ops
887 20:52:47.415169 PCI: 00:15.2 [8086/a0ea] enabled
888 20:52:47.416577 PCI: 00:15.3 [8086/0000] bus ops
889 20:52:47.420675 PCI: 00:15.3 [8086/a0eb] enabled
890 20:52:47.423296 PCI: 00:16.0 [8086/0000] ops
891 20:52:47.426240 PCI: 00:16.0 [8086/a0e0] enabled
892 20:52:47.433191 PCI: Static device PCI: 00:17.0 not found, disabling it.
893 20:52:47.436296 PCI: 00:19.0 [8086/0000] bus ops
894 20:52:47.440028 PCI: 00:19.0 [8086/a0c5] disabled
895 20:52:47.442982 PCI: 00:19.1 [8086/0000] bus ops
896 20:52:47.446483 PCI: 00:19.1 [8086/a0c6] enabled
897 20:52:47.449605 PCI: 00:1d.0 [8086/0000] bus ops
898 20:52:47.453319 PCI: 00:1d.0 [8086/a0b0] enabled
899 20:52:47.455998 PCI: 00:1e.0 [8086/0000] ops
900 20:52:47.459530 PCI: 00:1e.0 [8086/a0a8] enabled
901 20:52:47.462504 PCI: 00:1e.2 [8086/0000] bus ops
902 20:52:47.466609 PCI: 00:1e.2 [8086/a0aa] enabled
903 20:52:47.469792 PCI: 00:1e.3 [8086/0000] bus ops
904 20:52:47.473072 PCI: 00:1e.3 [8086/a0ab] enabled
905 20:52:47.475913 PCI: 00:1f.0 [8086/0000] bus ops
906 20:52:47.479277 PCI: 00:1f.0 [8086/a087] enabled
907 20:52:47.479765 RTC Init
908 20:52:47.482770 Set power on after power failure.
909 20:52:47.486090 Disabling Deep S3
910 20:52:47.486585 Disabling Deep S3
911 20:52:47.489397
912 20:52:47.489987 Disabling Deep S4
913 20:52:47.492376 Disabling Deep S4
914 20:52:47.492862 Disabling Deep S5
915 20:52:47.495844 Disabling Deep S5
916 20:52:47.499327 PCI: 00:1f.2 [0000/0000] hidden
917 20:52:47.502316 PCI: 00:1f.3 [8086/0000] bus ops
918 20:52:47.505938 PCI: 00:1f.3 [8086/a0c8] enabled
919 20:52:47.509211 PCI: 00:1f.5 [8086/0000] bus ops
920 20:52:47.512302 PCI: 00:1f.5 [8086/a0a4] enabled
921 20:52:47.515437 PCI: Leftover static devices:
922 20:52:47.515883 PCI: 00:10.2
923 20:52:47.516265 PCI: 00:10.6
924 20:52:47.518982
925 20:52:47.519426 PCI: 00:10.7
926 20:52:47.519781 PCI: 00:06.0
927 20:52:47.522626 PCI: 00:07.1
928 20:52:47.523111 PCI: 00:07.2
929 20:52:47.525767 PCI: 00:07.3
930 20:52:47.526209 PCI: 00:09.0
931 20:52:47.526559 PCI: 00:0d.1
932 20:52:47.528797 PCI: 00:0d.2
933 20:52:47.529236 PCI: 00:0d.3
934 20:52:47.532813 PCI: 00:0e.0
935 20:52:47.533361 PCI: 00:12.0
936 20:52:47.533720 PCI: 00:12.6
937 20:52:47.535487 PCI: 00:13.0
938 20:52:47.535928 PCI: 00:14.1
939 20:52:47.539494 PCI: 00:16.1
940 20:52:47.540039 PCI: 00:16.2
941 20:52:47.540396 PCI: 00:16.3
942 20:52:47.542032
943 20:52:47.542474 PCI: 00:16.4
944 20:52:47.542829 PCI: 00:16.5
945 20:52:47.545656 PCI: 00:17.0
946 20:52:47.546098 PCI: 00:19.2
947 20:52:47.548829 PCI: 00:1e.1
948 20:52:47.549268 PCI: 00:1f.1
949 20:52:47.549621 PCI: 00:1f.4
950 20:52:47.551993 PCI: 00:1f.6
951 20:52:47.552437 PCI: 00:1f.7
952 20:52:47.555440 PCI: Check your devicetree.cb.
953 20:52:47.558984 PCI: 00:02.0 scanning...
954 20:52:47.562144 scan_generic_bus for PCI: 00:02.0
955 20:52:47.565647 scan_generic_bus for PCI: 00:02.0 done
956 20:52:47.572199 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
957 20:52:47.572746 PCI: 00:04.0 scanning...
958 20:52:47.575504 scan_generic_bus for PCI: 00:04.0
959 20:52:47.579187
960 20:52:47.579739 GENERIC: 0.0 enabled
961 20:52:47.585418 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
962 20:52:47.589094 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
963 20:52:47.592260 PCI: 00:0d.0 scanning...
964 20:52:47.595427 scan_static_bus for PCI: 00:0d.0
965 20:52:47.598443 USB0 port 0 enabled
966 20:52:47.602009 USB0 port 0 scanning...
967 20:52:47.605204 scan_static_bus for USB0 port 0
968 20:52:47.605748 USB3 port 0 enabled
969 20:52:47.608518 USB3 port 1 enabled
970 20:52:47.612192 USB3 port 2 disabled
971 20:52:47.612739 USB3 port 3 disabled
972 20:52:47.615386 USB3 port 0 scanning...
973 20:52:47.618784 scan_static_bus for USB3 port 0
974 20:52:47.622305 scan_static_bus for USB3 port 0 done
975 20:52:47.625345 scan_bus: bus USB3 port 0 finished in 6 msecs
976 20:52:47.628366
977 20:52:47.628807 USB3 port 1 scanning...
978 20:52:47.631452 scan_static_bus for USB3 port 1
979 20:52:47.635186 scan_static_bus for USB3 port 1 done
980 20:52:47.641966 scan_bus: bus USB3 port 1 finished in 6 msecs
981 20:52:47.645276 scan_static_bus for USB0 port 0 done
982 20:52:47.648357 scan_bus: bus USB0 port 0 finished in 43 msecs
983 20:52:47.651796 scan_static_bus for PCI: 00:0d.0 done
984 20:52:47.658607 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
985 20:52:47.661523 PCI: 00:14.0 scanning...
986 20:52:47.664953 scan_static_bus for PCI: 00:14.0
987 20:52:47.665440 USB0 port 0 enabled
988 20:52:47.668188 USB0 port 0 scanning...
989 20:52:47.671530 scan_static_bus for USB0 port 0
990 20:52:47.674800 USB2 port 0 disabled
991 20:52:47.675321 USB2 port 1 enabled
992 20:52:47.678302 USB2 port 2 enabled
993 20:52:47.681353 USB2 port 3 disabled
994 20:52:47.681857 USB2 port 4 enabled
995 20:52:47.684452 USB2 port 5 disabled
996 20:52:47.687720 USB2 port 6 disabled
997 20:52:47.687805 USB2 port 7 disabled
998 20:52:47.691344 USB2 port 8 disabled
999 20:52:47.694472 USB2 port 9 disabled
1000 20:52:47.694570 USB3 port 0 disabled
1001 20:52:47.698077 USB3 port 1 enabled
1002 20:52:47.698175 USB3 port 2 disabled
1003 20:52:47.701055 USB3 port 3 disabled
1004 20:52:47.704610 USB2 port 1 scanning...
1005 20:52:47.707654 scan_static_bus for USB2 port 1
1006 20:52:47.711009 scan_static_bus for USB2 port 1 done
1007 20:52:47.714655 scan_bus: bus USB2 port 1 finished in 6 msecs
1008 20:52:47.717762 USB2 port 2 scanning...
1009 20:52:47.720865 scan_static_bus for USB2 port 2
1010 20:52:47.724417 scan_static_bus for USB2 port 2 done
1011 20:52:47.731281 scan_bus: bus USB2 port 2 finished in 6 msecs
1012 20:52:47.731585 USB2 port 4 scanning...
1013 20:52:47.734488 scan_static_bus for USB2 port 4
1014 20:52:47.741255 scan_static_bus for USB2 port 4 done
1015 20:52:47.744426 scan_bus: bus USB2 port 4 finished in 6 msecs
1016 20:52:47.748042 USB3 port 1 scanning...
1017 20:52:47.751319 scan_static_bus for USB3 port 1
1018 20:52:47.754482 scan_static_bus for USB3 port 1 done
1019 20:52:47.758032 scan_bus: bus USB3 port 1 finished in 6 msecs
1020 20:52:47.761387 scan_static_bus for USB0 port 0 done
1021 20:52:47.767931 scan_bus: bus USB0 port 0 finished in 93 msecs
1022 20:52:47.771304 scan_static_bus for PCI: 00:14.0 done
1023 20:52:47.774646 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1024 20:52:47.777917 PCI: 00:14.3 scanning...
1025 20:52:47.781093 scan_static_bus for PCI: 00:14.3
1026 20:52:47.784307 GENERIC: 0.0 enabled
1027 20:52:47.788025 scan_static_bus for PCI: 00:14.3 done
1028 20:52:47.791428 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1029 20:52:47.794900 PCI: 00:15.0 scanning...
1030 20:52:47.798267 scan_static_bus for PCI: 00:15.0
1031 20:52:47.801770 I2C: 00:1a enabled
1032 20:52:47.802284 I2C: 00:31 enabled
1033 20:52:47.805281 I2C: 00:32 enabled
1034 20:52:47.808584 scan_static_bus for PCI: 00:15.0 done
1035 20:52:47.811692 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1036 20:52:47.815086 PCI: 00:15.1 scanning...
1037 20:52:47.818518 scan_static_bus for PCI: 00:15.1
1038 20:52:47.821667 I2C: 00:10 enabled
1039 20:52:47.825118 scan_static_bus for PCI: 00:15.1 done
1040 20:52:47.828244 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1041 20:52:47.831791 PCI: 00:15.2 scanning...
1042 20:52:47.834564 scan_static_bus for PCI: 00:15.2
1043 20:52:47.838056 scan_static_bus for PCI: 00:15.2 done
1044 20:52:47.844914 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1045 20:52:47.848123 PCI: 00:15.3 scanning...
1046 20:52:47.851543 scan_static_bus for PCI: 00:15.3
1047 20:52:47.854460 scan_static_bus for PCI: 00:15.3 done
1048 20:52:47.858116 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1049 20:52:47.861321 PCI: 00:19.1 scanning...
1050 20:52:47.864649 scan_static_bus for PCI: 00:19.1
1051 20:52:47.867935 I2C: 00:15 enabled
1052 20:52:47.871076 scan_static_bus for PCI: 00:19.1 done
1053 20:52:47.874540 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1054 20:52:47.878465 PCI: 00:1d.0 scanning...
1055 20:52:47.881366 do_pci_scan_bridge for PCI: 00:1d.0
1056 20:52:47.884431 PCI: pci_scan_bus for bus 01
1057 20:52:47.887994 PCI: 01:00.0 [1c5c/174a] enabled
1058 20:52:47.891199 GENERIC: 0.0 enabled
1059 20:52:47.894949 Enabling Common Clock Configuration
1060 20:52:47.897752 L1 Sub-State supported from root port 29
1061 20:52:47.901002 L1 Sub-State Support = 0xf
1062 20:52:47.904956 CommonModeRestoreTime = 0x28
1063 20:52:47.907846 Power On Value = 0x16, Power On Scale = 0x0
1064 20:52:47.911410 ASPM: Enabled L1
1065 20:52:47.914400 PCIe: Max_Payload_Size adjusted to 128
1066 20:52:47.917650 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1067 20:52:47.921235 PCI: 00:1e.2 scanning...
1068 20:52:47.924625 scan_generic_bus for PCI: 00:1e.2
1069 20:52:47.927652 SPI: 00 enabled
1070 20:52:47.931494 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1071 20:52:47.934269
1072 20:52:47.937549 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1073 20:52:47.941081 PCI: 00:1e.3 scanning...
1074 20:52:47.944056 scan_generic_bus for PCI: 00:1e.3
1075 20:52:47.944613 SPI: 00 enabled
1076 20:52:47.950743 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1077 20:52:47.957491 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1078 20:52:47.957939 PCI: 00:1f.0 scanning...
1079 20:52:47.960774 scan_static_bus for PCI: 00:1f.0
1080 20:52:47.963939 PNP: 0c09.0 enabled
1081 20:52:47.967438 PNP: 0c09.0 scanning...
1082 20:52:47.970689 scan_static_bus for PNP: 0c09.0
1083 20:52:47.974014 scan_static_bus for PNP: 0c09.0 done
1084 20:52:47.977731 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1085 20:52:47.980542 scan_static_bus for PCI: 00:1f.0 done
1086 20:52:47.983936
1087 20:52:47.987377 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1088 20:52:47.990535 PCI: 00:1f.2 scanning...
1089 20:52:47.993994 scan_static_bus for PCI: 00:1f.2
1090 20:52:47.994462 GENERIC: 0.0 enabled
1091 20:52:47.997383 GENERIC: 0.0 scanning...
1092 20:52:48.000527 scan_static_bus for GENERIC: 0.0
1093 20:52:48.003896 GENERIC: 0.0 enabled
1094 20:52:48.007066 GENERIC: 1.0 enabled
1095 20:52:48.010282 scan_static_bus for GENERIC: 0.0 done
1096 20:52:48.013678 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1097 20:52:48.017212 scan_static_bus for PCI: 00:1f.2 done
1098 20:52:48.024034 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1099 20:52:48.027388 PCI: 00:1f.3 scanning...
1100 20:52:48.030266 scan_static_bus for PCI: 00:1f.3
1101 20:52:48.033810 scan_static_bus for PCI: 00:1f.3 done
1102 20:52:48.037065 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1103 20:52:48.040271 PCI: 00:1f.5 scanning...
1104 20:52:48.043405 scan_generic_bus for PCI: 00:1f.5
1105 20:52:48.047040 scan_generic_bus for PCI: 00:1f.5 done
1106 20:52:48.053590 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1107 20:52:48.056685 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1108 20:52:48.060544 scan_static_bus for Root Device done
1109 20:52:48.066724 scan_bus: bus Root Device finished in 736 msecs
1110 20:52:48.067351 done
1111 20:52:48.073286 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1112 20:52:48.076632 Chrome EC: UHEPI supported
1113 20:52:48.083422 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1114 20:52:48.086573 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1115 20:52:48.092981 SPI flash protection: WPSW=0 SRP0=0
1116 20:52:48.096463 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1117 20:52:48.103125 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1118 20:52:48.106419 found VGA at PCI: 00:02.0
1119 20:52:48.109830 Setting up VGA for PCI: 00:02.0
1120 20:52:48.112833 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1121 20:52:48.119681 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1122 20:52:48.120121 Allocating resources...
1123 20:52:48.122975 Reading resources...
1124 20:52:48.126106 Root Device read_resources bus 0 link: 0
1125 20:52:48.132767 DOMAIN: 0000 read_resources bus 0 link: 0
1126 20:52:48.136403 PCI: 00:04.0 read_resources bus 1 link: 0
1127 20:52:48.142742 PCI: 00:04.0 read_resources bus 1 link: 0 done
1128 20:52:48.145901 PCI: 00:0d.0 read_resources bus 0 link: 0
1129 20:52:48.149534 USB0 port 0 read_resources bus 0 link: 0
1130 20:52:48.152728
1131 20:52:48.155964 USB0 port 0 read_resources bus 0 link: 0 done
1132 20:52:48.162931 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1133 20:52:48.165928 PCI: 00:14.0 read_resources bus 0 link: 0
1134 20:52:48.168963 USB0 port 0 read_resources bus 0 link: 0
1135 20:52:48.176356 USB0 port 0 read_resources bus 0 link: 0 done
1136 20:52:48.179386 PCI: 00:14.0 read_resources bus 0 link: 0 done
1137 20:52:48.186648 PCI: 00:14.3 read_resources bus 0 link: 0
1138 20:52:48.189566 PCI: 00:14.3 read_resources bus 0 link: 0 done
1139 20:52:48.196303 PCI: 00:15.0 read_resources bus 0 link: 0
1140 20:52:48.199626 PCI: 00:15.0 read_resources bus 0 link: 0 done
1141 20:52:48.206363 PCI: 00:15.1 read_resources bus 0 link: 0
1142 20:52:48.209632 PCI: 00:15.1 read_resources bus 0 link: 0 done
1143 20:52:48.217069 PCI: 00:19.1 read_resources bus 0 link: 0
1144 20:52:48.220416 PCI: 00:19.1 read_resources bus 0 link: 0 done
1145 20:52:48.227051 PCI: 00:1d.0 read_resources bus 1 link: 0
1146 20:52:48.230267 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1147 20:52:48.236894 PCI: 00:1e.2 read_resources bus 2 link: 0
1148 20:52:48.240641 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1149 20:52:48.247054 PCI: 00:1e.3 read_resources bus 3 link: 0
1150 20:52:48.250610 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1151 20:52:48.256977 PCI: 00:1f.0 read_resources bus 0 link: 0
1152 20:52:48.260252 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1153 20:52:48.263748 PCI: 00:1f.2 read_resources bus 0 link: 0
1154 20:52:48.270706 GENERIC: 0.0 read_resources bus 0 link: 0
1155 20:52:48.273633 GENERIC: 0.0 read_resources bus 0 link: 0 done
1156 20:52:48.280347 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1157 20:52:48.286625 DOMAIN: 0000 read_resources bus 0 link: 0 done
1158 20:52:48.290291 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1159 20:52:48.293280 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1160 20:52:48.296842
1161 20:52:48.299867 Root Device read_resources bus 0 link: 0 done
1162 20:52:48.303561 Done reading resources.
1163 20:52:48.306673 Show resources in subtree (Root Device)...After reading.
1164 20:52:48.313320 Root Device child on link 0 DOMAIN: 0000
1165 20:52:48.316629 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1166 20:52:48.326655 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1167 20:52:48.336635 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1168 20:52:48.337220 PCI: 00:00.0
1169 20:52:48.346295 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1170 20:52:48.356454 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1171 20:52:48.366434 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1172 20:52:48.376326 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1173 20:52:48.386117 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1174 20:52:48.392980 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1175 20:52:48.403068 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1176 20:52:48.413128 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1177 20:52:48.422929 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1178 20:52:48.433084 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1179 20:52:48.439314 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1180 20:52:48.449850 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1181 20:52:48.459317 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1182 20:52:48.469451 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1183 20:52:48.479101 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1184 20:52:48.489100 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1185 20:52:48.499029 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1186 20:52:48.505946 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1187 20:52:48.515736 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1188 20:52:48.525598 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1189 20:52:48.528675 PCI: 00:02.0
1190 20:52:48.539239 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 20:52:48.548833 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1192 20:52:48.555574 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1193 20:52:48.562119 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 20:52:48.572399 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1195 20:52:48.572994 GENERIC: 0.0
1196 20:52:48.575336 PCI: 00:05.0
1197 20:52:48.585295 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 20:52:48.588385 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1199 20:52:48.592155 GENERIC: 0.0
1200 20:52:48.592777 PCI: 00:08.0
1201 20:52:48.601827 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 20:52:48.605211 PCI: 00:0a.0
1203 20:52:48.608386 PCI: 00:0d.0 child on link 0 USB0 port 0
1204 20:52:48.618107 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 20:52:48.621638 USB0 port 0 child on link 0 USB3 port 0
1206 20:52:48.625061 USB3 port 0
1207 20:52:48.625628 USB3 port 1
1208 20:52:48.628508
1209 20:52:48.629064 USB3 port 2
1210 20:52:48.631750 USB3 port 3
1211 20:52:48.634845 PCI: 00:14.0 child on link 0 USB0 port 0
1212 20:52:48.644995 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1213 20:52:48.648140 USB0 port 0 child on link 0 USB2 port 0
1214 20:52:48.651787 USB2 port 0
1215 20:52:48.652234 USB2 port 1
1216 20:52:48.654790 USB2 port 2
1217 20:52:48.655286 USB2 port 3
1218 20:52:48.658103 USB2 port 4
1219 20:52:48.658549 USB2 port 5
1220 20:52:48.662074 USB2 port 6
1221 20:52:48.665033 USB2 port 7
1222 20:52:48.665576 USB2 port 8
1223 20:52:48.668236 USB2 port 9
1224 20:52:48.668844 USB3 port 0
1225 20:52:48.671334 USB3 port 1
1226 20:52:48.671845 USB3 port 2
1227 20:52:48.674478 USB3 port 3
1228 20:52:48.674984 PCI: 00:14.2
1229 20:52:48.684791 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1230 20:52:48.695134 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1231 20:52:48.701058 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1232 20:52:48.711378 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1233 20:52:48.711958 GENERIC: 0.0
1234 20:52:48.714469 PCI: 00:15.0 child on link 0 I2C: 00:1a
1235 20:52:48.724705 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 20:52:48.727919 I2C: 00:1a
1237 20:52:48.728434 I2C: 00:31
1238 20:52:48.730865 I2C: 00:32
1239 20:52:48.734394 PCI: 00:15.1 child on link 0 I2C: 00:10
1240 20:52:48.744468 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1241 20:52:48.747732 I2C: 00:10
1242 20:52:48.748227 PCI: 00:15.2
1243 20:52:48.757392 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1244 20:52:48.761336 PCI: 00:15.3
1245 20:52:48.770925 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 20:52:48.771521 PCI: 00:16.0
1247 20:52:48.780784 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1248 20:52:48.784237 PCI: 00:19.0
1249 20:52:48.787808 PCI: 00:19.1 child on link 0 I2C: 00:15
1250 20:52:48.797705 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1251 20:52:48.798301 I2C: 00:15
1252 20:52:48.803841 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1253 20:52:48.811150 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1254 20:52:48.820765 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1255 20:52:48.830314 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1256 20:52:48.833852 GENERIC: 0.0
1257 20:52:48.834464 PCI: 01:00.0
1258 20:52:48.843845 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1259 20:52:48.853593 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1260 20:52:48.863507 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1261 20:52:48.864008 PCI: 00:1e.0
1262 20:52:48.876608 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1263 20:52:48.880249 PCI: 00:1e.2 child on link 0 SPI: 00
1264 20:52:48.889898 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1265 20:52:48.890418 SPI: 00
1266 20:52:48.893634 PCI: 00:1e.3 child on link 0 SPI: 00
1267 20:52:48.896773
1268 20:52:48.903159 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1269 20:52:48.906584
1270 20:52:48.907058 SPI: 00
1271 20:52:48.910133 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1272 20:52:48.920321 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1273 20:52:48.920918 PNP: 0c09.0
1274 20:52:48.929960 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1275 20:52:48.933431 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1276 20:52:48.942972 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1277 20:52:48.953069 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1278 20:52:48.956599 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1279 20:52:48.959804 GENERIC: 0.0
1280 20:52:48.960294 GENERIC: 1.0
1281 20:52:48.963034 PCI: 00:1f.3
1282 20:52:48.973176 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1283 20:52:48.983036 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1284 20:52:48.986158 PCI: 00:1f.5
1285 20:52:48.992974 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1286 20:52:48.999751 CPU_CLUSTER: 0 child on link 0 APIC: 00
1287 20:52:49.000354 APIC: 00
1288 20:52:49.000749 APIC: 01
1289 20:52:49.002763 APIC: 03
1290 20:52:49.003285 APIC: 05
1291 20:52:49.003674 APIC: 07
1292 20:52:49.006018
1293 20:52:49.006515 APIC: 06
1294 20:52:49.006929 APIC: 02
1295 20:52:49.009776 APIC: 04
1296 20:52:49.016129 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1297 20:52:49.022904 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1298 20:52:49.029290 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1299 20:52:49.032738 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1300 20:52:49.039025 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1301 20:52:49.042449 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1302 20:52:49.045889 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1303 20:52:49.052680 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1304 20:52:49.062617 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1305 20:52:49.068990 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1306 20:52:49.075488 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1307 20:52:49.082294 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1308 20:52:49.088954 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1309 20:52:49.098686 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1310 20:52:49.105322 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1311 20:52:49.109045 DOMAIN: 0000: Resource ranges:
1312 20:52:49.111988 * Base: 1000, Size: 800, Tag: 100
1313 20:52:49.115230 * Base: 1900, Size: e700, Tag: 100
1314 20:52:49.122415 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1315 20:52:49.129007 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1316 20:52:49.135389 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1317 20:52:49.141837 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1318 20:52:49.148466 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1319 20:52:49.158420 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1320 20:52:49.165390 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1321 20:52:49.171962 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1322 20:52:49.181867 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1323 20:52:49.188213 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1324 20:52:49.195211 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1325 20:52:49.204931 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1326 20:52:49.211438 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1327 20:52:49.218807 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1328 20:52:49.224815 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1329 20:52:49.228308
1330 20:52:49.234836 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1331 20:52:49.241250 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1332 20:52:49.247784 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1333 20:52:49.258129 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1334 20:52:49.264280 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1335 20:52:49.274426 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1336 20:52:49.281396 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1337 20:52:49.287955 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1338 20:52:49.294432 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1339 20:52:49.297841
1340 20:52:49.304079 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1341 20:52:49.307637 DOMAIN: 0000: Resource ranges:
1342 20:52:49.310936 * Base: 7fc00000, Size: 40400000, Tag: 200
1343 20:52:49.314430 * Base: d0000000, Size: 28000000, Tag: 200
1344 20:52:49.321056 * Base: fa000000, Size: 1000000, Tag: 200
1345 20:52:49.324252 * Base: fb001000, Size: 2fff000, Tag: 200
1346 20:52:49.327388 * Base: fe010000, Size: 2e000, Tag: 200
1347 20:52:49.334317 * Base: fe03f000, Size: d41000, Tag: 200
1348 20:52:49.337610 * Base: fed88000, Size: 8000, Tag: 200
1349 20:52:49.340633 * Base: fed93000, Size: d000, Tag: 200
1350 20:52:49.343934 * Base: feda2000, Size: 1e000, Tag: 200
1351 20:52:49.347346 * Base: fede0000, Size: 1220000, Tag: 200
1352 20:52:49.350807
1353 20:52:49.354334 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1354 20:52:49.360352 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1355 20:52:49.367311 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1356 20:52:49.373989 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1357 20:52:49.380732 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1358 20:52:49.387446 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1359 20:52:49.394216 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1360 20:52:49.400979 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1361 20:52:49.407088 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1362 20:52:49.413748 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1363 20:52:49.420449 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1364 20:52:49.426582 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1365 20:52:49.433558 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1366 20:52:49.440164 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1367 20:52:49.446481 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1368 20:52:49.453451 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1369 20:52:49.459842 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1370 20:52:49.466463 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1371 20:52:49.473590 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1372 20:52:49.480185 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1373 20:52:49.486430 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1374 20:52:49.493347 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1375 20:52:49.500002 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1376 20:52:49.506350 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1377 20:52:49.516323 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1378 20:52:49.519534 PCI: 00:1d.0: Resource ranges:
1379 20:52:49.522846 * Base: 7fc00000, Size: 100000, Tag: 200
1380 20:52:49.529548 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1381 20:52:49.536025 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1382 20:52:49.542739 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1383 20:52:49.552922 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1384 20:52:49.559385 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1385 20:52:49.562707 Root Device assign_resources, bus 0 link: 0
1386 20:52:49.565988 DOMAIN: 0000 assign_resources, bus 0 link: 0
1387 20:52:49.576681 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1388 20:52:49.583226 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1389 20:52:49.592681 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1390 20:52:49.599359 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1391 20:52:49.606266 PCI: 00:04.0 assign_resources, bus 1 link: 0
1392 20:52:49.609276 PCI: 00:04.0 assign_resources, bus 1 link: 0
1393 20:52:49.619351 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1394 20:52:49.625444 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1395 20:52:49.635551 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1396 20:52:49.638982 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1397 20:52:49.642145 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1398 20:52:49.652614 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1399 20:52:49.655697 PCI: 00:14.0 assign_resources, bus 0 link: 0
1400 20:52:49.662306 PCI: 00:14.0 assign_resources, bus 0 link: 0
1401 20:52:49.668655 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1402 20:52:49.679083 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1403 20:52:49.685493 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1404 20:52:49.688388 PCI: 00:14.3 assign_resources, bus 0 link: 0
1405 20:52:49.695440 PCI: 00:14.3 assign_resources, bus 0 link: 0
1406 20:52:49.702113 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1407 20:52:49.708664 PCI: 00:15.0 assign_resources, bus 0 link: 0
1408 20:52:49.711774 PCI: 00:15.0 assign_resources, bus 0 link: 0
1409 20:52:49.722084 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1410 20:52:49.725042 PCI: 00:15.1 assign_resources, bus 0 link: 0
1411 20:52:49.728531 PCI: 00:15.1 assign_resources, bus 0 link: 0
1412 20:52:49.738805 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1413 20:52:49.744895 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1414 20:52:49.754968 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1415 20:52:49.761404 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1416 20:52:49.768363 PCI: 00:19.1 assign_resources, bus 0 link: 0
1417 20:52:49.771530 PCI: 00:19.1 assign_resources, bus 0 link: 0
1418 20:52:49.781695 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1419 20:52:49.791194 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1420 20:52:49.798093 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1421 20:52:49.804690 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1422 20:52:49.811534 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1423 20:52:49.821162 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1424 20:52:49.827835 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1425 20:52:49.830995 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1426 20:52:49.840890 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1427 20:52:49.844352 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1428 20:52:49.850852 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1429 20:52:49.857303 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1430 20:52:49.863947 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1431 20:52:49.867235 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1432 20:52:49.870944 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1433 20:52:49.877845 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1434 20:52:49.880976 LPC: Trying to open IO window from 800 size 1ff
1435 20:52:49.890437 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1436 20:52:49.897466 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1437 20:52:49.907012 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1438 20:52:49.910582 DOMAIN: 0000 assign_resources, bus 0 link: 0
1439 20:52:49.917015 Root Device assign_resources, bus 0 link: 0
1440 20:52:49.917472 Done setting resources.
1441 20:52:49.923758 Show resources in subtree (Root Device)...After assigning values.
1442 20:52:49.930154 Root Device child on link 0 DOMAIN: 0000
1443 20:52:49.933470 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1444 20:52:49.943457 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1445 20:52:49.953575 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1446 20:52:49.954158 PCI: 00:00.0
1447 20:52:49.963388 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1448 20:52:49.973766 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1449 20:52:49.983622 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1450 20:52:49.993572 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1451 20:52:49.999739 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1452 20:52:50.009728 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1453 20:52:50.019748 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1454 20:52:50.029850 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1455 20:52:50.039883 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1456 20:52:50.049657 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1457 20:52:50.056459 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1458 20:52:50.066472 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1459 20:52:50.076436 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1460 20:52:50.086299 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1461 20:52:50.096127 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1462 20:52:50.102949 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1463 20:52:50.112586 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1464 20:52:50.115866
1465 20:52:50.122791 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1466 20:52:50.132205 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1467 20:52:50.142707 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1468 20:52:50.145654 PCI: 00:02.0
1469 20:52:50.155677 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1470 20:52:50.165272 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1471 20:52:50.175342 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1472 20:52:50.178984 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1473 20:52:50.188899 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1474 20:52:50.192149 GENERIC: 0.0
1475 20:52:50.192636 PCI: 00:05.0
1476 20:52:50.202038 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1477 20:52:50.205745
1478 20:52:50.208681 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1479 20:52:50.209171 GENERIC: 0.0
1480 20:52:50.211822 PCI: 00:08.0
1481 20:52:50.221998 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1482 20:52:50.225201 PCI: 00:0a.0
1483 20:52:50.228723 PCI: 00:0d.0 child on link 0 USB0 port 0
1484 20:52:50.238566 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1485 20:52:50.241830 USB0 port 0 child on link 0 USB3 port 0
1486 20:52:50.245453 USB3 port 0
1487 20:52:50.245932 USB3 port 1
1488 20:52:50.248442 USB3 port 2
1489 20:52:50.248929 USB3 port 3
1490 20:52:50.254959 PCI: 00:14.0 child on link 0 USB0 port 0
1491 20:52:50.264589 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1492 20:52:50.267953 USB0 port 0 child on link 0 USB2 port 0
1493 20:52:50.271455 USB2 port 0
1494 20:52:50.271894 USB2 port 1
1495 20:52:50.274660 USB2 port 2
1496 20:52:50.275136 USB2 port 3
1497 20:52:50.278061 USB2 port 4
1498 20:52:50.281161 USB2 port 5
1499 20:52:50.281597 USB2 port 6
1500 20:52:50.284509 USB2 port 7
1501 20:52:50.284949 USB2 port 8
1502 20:52:50.288080 USB2 port 9
1503 20:52:50.288522 USB3 port 0
1504 20:52:50.291079 USB3 port 1
1505 20:52:50.291519 USB3 port 2
1506 20:52:50.294565 USB3 port 3
1507 20:52:50.295034 PCI: 00:14.2
1508 20:52:50.304397 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1509 20:52:50.317983 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1510 20:52:50.320833 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1511 20:52:50.331175 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1512 20:52:50.334184 GENERIC: 0.0
1513 20:52:50.337986 PCI: 00:15.0 child on link 0 I2C: 00:1a
1514 20:52:50.347541 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1515 20:52:50.348151 I2C: 00:1a
1516 20:52:50.350957 I2C: 00:31
1517 20:52:50.351445 I2C: 00:32
1518 20:52:50.357907 PCI: 00:15.1 child on link 0 I2C: 00:10
1519 20:52:50.367734 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1520 20:52:50.368327 I2C: 00:10
1521 20:52:50.371202 PCI: 00:15.2
1522 20:52:50.381174 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1523 20:52:50.381763 PCI: 00:15.3
1524 20:52:50.391019 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1525 20:52:50.394279
1526 20:52:50.394870 PCI: 00:16.0
1527 20:52:50.404234 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1528 20:52:50.407316 PCI: 00:19.0
1529 20:52:50.411164 PCI: 00:19.1 child on link 0 I2C: 00:15
1530 20:52:50.421163 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1531 20:52:50.424090 I2C: 00:15
1532 20:52:50.427448 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1533 20:52:50.437093 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1534 20:52:50.447123 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1535 20:52:50.457296 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1536 20:52:50.460395 GENERIC: 0.0
1537 20:52:50.460970 PCI: 01:00.0
1538 20:52:50.473832 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1539 20:52:50.483603 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1540 20:52:50.493700 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1541 20:52:50.494290 PCI: 00:1e.0
1542 20:52:50.506821 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1543 20:52:50.510210 PCI: 00:1e.2 child on link 0 SPI: 00
1544 20:52:50.519982 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1545 20:52:50.520592 SPI: 00
1546 20:52:50.526508 PCI: 00:1e.3 child on link 0 SPI: 00
1547 20:52:50.536573 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1548 20:52:50.537095 SPI: 00
1549 20:52:50.539854 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1550 20:52:50.549852 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1551 20:52:50.553217 PNP: 0c09.0
1552 20:52:50.559628 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1553 20:52:50.566789 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1554 20:52:50.573132 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1555 20:52:50.583147 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1556 20:52:50.589931 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1557 20:52:50.590524 GENERIC: 0.0
1558 20:52:50.593117 GENERIC: 1.0
1559 20:52:50.593652 PCI: 00:1f.3
1560 20:52:50.602973 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1561 20:52:50.612903 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1562 20:52:50.616223
1563 20:52:50.616753 PCI: 00:1f.5
1564 20:52:50.626000 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1565 20:52:50.629667 CPU_CLUSTER: 0 child on link 0 APIC: 00
1566 20:52:50.632944 APIC: 00
1567 20:52:50.633491 APIC: 01
1568 20:52:50.636002 APIC: 03
1569 20:52:50.636581 APIC: 05
1570 20:52:50.637060 APIC: 07
1571 20:52:50.639563 APIC: 06
1572 20:52:50.640144 APIC: 02
1573 20:52:50.640621 APIC: 04
1574 20:52:50.642928
1575 20:52:50.643438 Done allocating resources.
1576 20:52:50.649461 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1577 20:52:50.655990 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1578 20:52:50.658819 Configure GPIOs for I2S audio on UP4.
1579 20:52:50.665584 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1580 20:52:50.669128 Enabling resources...
1581 20:52:50.672499 PCI: 00:00.0 subsystem <- 8086/9a12
1582 20:52:50.675845 PCI: 00:00.0 cmd <- 06
1583 20:52:50.679241 PCI: 00:02.0 subsystem <- 8086/9a40
1584 20:52:50.682748 PCI: 00:02.0 cmd <- 03
1585 20:52:50.685997 PCI: 00:04.0 subsystem <- 8086/9a03
1586 20:52:50.689133 PCI: 00:04.0 cmd <- 02
1587 20:52:50.692173 PCI: 00:05.0 subsystem <- 8086/9a19
1588 20:52:50.692336 PCI: 00:05.0 cmd <- 02
1589 20:52:50.698791 PCI: 00:08.0 subsystem <- 8086/9a11
1590 20:52:50.699005 PCI: 00:08.0 cmd <- 06
1591 20:52:50.702613 PCI: 00:0d.0 subsystem <- 8086/9a13
1592 20:52:50.705685 PCI: 00:0d.0 cmd <- 02
1593 20:52:50.709051 PCI: 00:14.0 subsystem <- 8086/a0ed
1594 20:52:50.712605 PCI: 00:14.0 cmd <- 02
1595 20:52:50.715710 PCI: 00:14.2 subsystem <- 8086/a0ef
1596 20:52:50.718790 PCI: 00:14.2 cmd <- 02
1597 20:52:50.722064 PCI: 00:14.3 subsystem <- 8086/a0f0
1598 20:52:50.725782 PCI: 00:14.3 cmd <- 02
1599 20:52:50.728865 PCI: 00:15.0 subsystem <- 8086/a0e8
1600 20:52:50.732082 PCI: 00:15.0 cmd <- 02
1601 20:52:50.735541 PCI: 00:15.1 subsystem <- 8086/a0e9
1602 20:52:50.738574 PCI: 00:15.1 cmd <- 02
1603 20:52:50.741912 PCI: 00:15.2 subsystem <- 8086/a0ea
1604 20:52:50.742317 PCI: 00:15.2 cmd <- 02
1605 20:52:50.748858 PCI: 00:15.3 subsystem <- 8086/a0eb
1606 20:52:50.749258 PCI: 00:15.3 cmd <- 02
1607 20:52:50.752057 PCI: 00:16.0 subsystem <- 8086/a0e0
1608 20:52:50.755238 PCI: 00:16.0 cmd <- 02
1609 20:52:50.758778 PCI: 00:19.1 subsystem <- 8086/a0c6
1610 20:52:50.762302 PCI: 00:19.1 cmd <- 02
1611 20:52:50.765795 PCI: 00:1d.0 bridge ctrl <- 0013
1612 20:52:50.768962 PCI: 00:1d.0 subsystem <- 8086/a0b0
1613 20:52:50.771968 PCI: 00:1d.0 cmd <- 06
1614 20:52:50.775302 PCI: 00:1e.0 subsystem <- 8086/a0a8
1615 20:52:50.778648 PCI: 00:1e.0 cmd <- 06
1616 20:52:50.782136 PCI: 00:1e.2 subsystem <- 8086/a0aa
1617 20:52:50.785048 PCI: 00:1e.2 cmd <- 06
1618 20:52:50.788400 PCI: 00:1e.3 subsystem <- 8086/a0ab
1619 20:52:50.791359 PCI: 00:1e.3 cmd <- 02
1620 20:52:50.795032 PCI: 00:1f.0 subsystem <- 8086/a087
1621 20:52:50.798245 PCI: 00:1f.0 cmd <- 407
1622 20:52:50.801894 PCI: 00:1f.3 subsystem <- 8086/a0c8
1623 20:52:50.802472 PCI: 00:1f.3 cmd <- 02
1624 20:52:50.808531 PCI: 00:1f.5 subsystem <- 8086/a0a4
1625 20:52:50.809108 PCI: 00:1f.5 cmd <- 406
1626 20:52:50.813536 PCI: 01:00.0 cmd <- 02
1627 20:52:50.818498 done.
1628 20:52:50.821801 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1629 20:52:50.824706 Initializing devices...
1630 20:52:50.827954 Root Device init
1631 20:52:50.831359 Chrome EC: Set SMI mask to 0x0000000000000000
1632 20:52:50.837812 Chrome EC: clear events_b mask to 0x0000000000000000
1633 20:52:50.844735 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1634 20:52:50.847574 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1635 20:52:50.854527 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1636 20:52:50.861410 Chrome EC: Set WAKE mask to 0x0000000000000000
1637 20:52:50.864970 fw_config match found: DB_USB=USB3_ACTIVE
1638 20:52:50.871234 Configure Right Type-C port orientation for retimer
1639 20:52:50.874913 Root Device init finished in 42 msecs
1640 20:52:50.877791 PCI: 00:00.0 init
1641 20:52:50.880887 CPU TDP = 9 Watts
1642 20:52:50.881480 CPU PL1 = 9 Watts
1643 20:52:50.884452 CPU PL2 = 40 Watts
1644 20:52:50.885027 CPU PL4 = 83 Watts
1645 20:52:50.888057 PCI: 00:00.0 init finished in 8 msecs
1646 20:52:50.891084 PCI: 00:02.0 init
1647 20:52:50.894712 GMA: Found VBT in CBFS
1648 20:52:50.897920 GMA: Found valid VBT in CBFS
1649 20:52:50.901210 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1650 20:52:50.911318 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1651 20:52:50.914224 PCI: 00:02.0 init finished in 18 msecs
1652 20:52:50.917706 PCI: 00:05.0 init
1653 20:52:50.920829 PCI: 00:05.0 init finished in 0 msecs
1654 20:52:50.921421 PCI: 00:08.0 init
1655 20:52:50.927514 PCI: 00:08.0 init finished in 0 msecs
1656 20:52:50.928101 PCI: 00:14.0 init
1657 20:52:50.934135 PCI: 00:14.0 init finished in 0 msecs
1658 20:52:50.934714 PCI: 00:14.2 init
1659 20:52:50.937712 PCI: 00:14.2 init finished in 0 msecs
1660 20:52:50.941191 PCI: 00:15.0 init
1661 20:52:50.944664 I2C bus 0 version 0x3230302a
1662 20:52:50.948142 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1663 20:52:50.951049 PCI: 00:15.0 init finished in 6 msecs
1664 20:52:50.954212 PCI: 00:15.1 init
1665 20:52:50.957930 I2C bus 1 version 0x3230302a
1666 20:52:50.961087 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1667 20:52:50.963955 PCI: 00:15.1 init finished in 6 msecs
1668 20:52:50.967491 PCI: 00:15.2 init
1669 20:52:50.970408 I2C bus 2 version 0x3230302a
1670 20:52:50.973961 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1671 20:52:50.977415 PCI: 00:15.2 init finished in 6 msecs
1672 20:52:50.977523 PCI: 00:15.3 init
1673 20:52:50.980350 I2C bus 3 version 0x3230302a
1674 20:52:50.983854 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1675 20:52:50.990503 PCI: 00:15.3 init finished in 6 msecs
1676 20:52:50.990594 PCI: 00:16.0 init
1677 20:52:50.993707 PCI: 00:16.0 init finished in 0 msecs
1678 20:52:50.997773 PCI: 00:19.1 init
1679 20:52:51.000885 I2C bus 5 version 0x3230302a
1680 20:52:51.004419 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1681 20:52:51.007514 PCI: 00:19.1 init finished in 6 msecs
1682 20:52:51.011094 PCI: 00:1d.0 init
1683 20:52:51.014366 Initializing PCH PCIe bridge.
1684 20:52:51.017835 PCI: 00:1d.0 init finished in 3 msecs
1685 20:52:51.021186 PCI: 00:1f.0 init
1686 20:52:51.024270 IOAPIC: Initializing IOAPIC at 0xfec00000
1687 20:52:51.027671 IOAPIC: Bootstrap Processor Local APIC = 0x00
1688 20:52:51.031056
1689 20:52:51.031653 IOAPIC: ID = 0x02
1690 20:52:51.034292 IOAPIC: Dumping registers
1691 20:52:51.038012 reg 0x0000: 0x02000000
1692 20:52:51.038604 reg 0x0001: 0x00770020
1693 20:52:51.041181 reg 0x0002: 0x00000000
1694 20:52:51.044479 PCI: 00:1f.0 init finished in 21 msecs
1695 20:52:51.047986 PCI: 00:1f.2 init
1696 20:52:51.051299 Disabling ACPI via APMC.
1697 20:52:51.055010 APMC done.
1698 20:52:51.057989 PCI: 00:1f.2 init finished in 5 msecs
1699 20:52:51.069350 PCI: 01:00.0 init
1700 20:52:51.072483 PCI: 01:00.0 init finished in 0 msecs
1701 20:52:51.075752 PNP: 0c09.0 init
1702 20:52:51.079222 Google Chrome EC uptime: 8.432 seconds
1703 20:52:51.085488 Google Chrome AP resets since EC boot: 1
1704 20:52:51.088882 Google Chrome most recent AP reset causes:
1705 20:52:51.092469 0.349: 32775 shutdown: entering G3
1706 20:52:51.099000 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1707 20:52:51.102359 PNP: 0c09.0 init finished in 22 msecs
1708 20:52:51.107854 Devices initialized
1709 20:52:51.111299 Show all devs... After init.
1710 20:52:51.114480 Root Device: enabled 1
1711 20:52:51.115012 DOMAIN: 0000: enabled 1
1712 20:52:51.117930 CPU_CLUSTER: 0: enabled 1
1713 20:52:51.121102 PCI: 00:00.0: enabled 1
1714 20:52:51.124759 PCI: 00:02.0: enabled 1
1715 20:52:51.125255 PCI: 00:04.0: enabled 1
1716 20:52:51.127594 PCI: 00:05.0: enabled 1
1717 20:52:51.131246 PCI: 00:06.0: enabled 0
1718 20:52:51.134404 PCI: 00:07.0: enabled 0
1719 20:52:51.134954 PCI: 00:07.1: enabled 0
1720 20:52:51.137806 PCI: 00:07.2: enabled 0
1721 20:52:51.140924 PCI: 00:07.3: enabled 0
1722 20:52:51.144414 PCI: 00:08.0: enabled 1
1723 20:52:51.144907 PCI: 00:09.0: enabled 0
1724 20:52:51.147787 PCI: 00:0a.0: enabled 0
1725 20:52:51.151120 PCI: 00:0d.0: enabled 1
1726 20:52:51.151718 PCI: 00:0d.1: enabled 0
1727 20:52:51.154425
1728 20:52:51.154951 PCI: 00:0d.2: enabled 0
1729 20:52:51.158073 PCI: 00:0d.3: enabled 0
1730 20:52:51.161122 PCI: 00:0e.0: enabled 0
1731 20:52:51.161620 PCI: 00:10.2: enabled 1
1732 20:52:51.164853 PCI: 00:10.6: enabled 0
1733 20:52:51.167783 PCI: 00:10.7: enabled 0
1734 20:52:51.171539 PCI: 00:12.0: enabled 0
1735 20:52:51.172142 PCI: 00:12.6: enabled 0
1736 20:52:51.174166 PCI: 00:13.0: enabled 0
1737 20:52:51.177794 PCI: 00:14.0: enabled 1
1738 20:52:51.181212 PCI: 00:14.1: enabled 0
1739 20:52:51.181802 PCI: 00:14.2: enabled 1
1740 20:52:51.184063 PCI: 00:14.3: enabled 1
1741 20:52:51.187680 PCI: 00:15.0: enabled 1
1742 20:52:51.191209 PCI: 00:15.1: enabled 1
1743 20:52:51.191816 PCI: 00:15.2: enabled 1
1744 20:52:51.194398 PCI: 00:15.3: enabled 1
1745 20:52:51.197523 PCI: 00:16.0: enabled 1
1746 20:52:51.198040 PCI: 00:16.1: enabled 0
1747 20:52:51.200768 PCI: 00:16.2: enabled 0
1748 20:52:51.204389 PCI: 00:16.3: enabled 0
1749 20:52:51.207389 PCI: 00:16.4: enabled 0
1750 20:52:51.207882 PCI: 00:16.5: enabled 0
1751 20:52:51.210973 PCI: 00:17.0: enabled 0
1752 20:52:51.213974 PCI: 00:19.0: enabled 0
1753 20:52:51.217231 PCI: 00:19.1: enabled 1
1754 20:52:51.217727 PCI: 00:19.2: enabled 0
1755 20:52:51.220733 PCI: 00:1c.0: enabled 1
1756 20:52:51.223841 PCI: 00:1c.1: enabled 0
1757 20:52:51.227537 PCI: 00:1c.2: enabled 0
1758 20:52:51.228030 PCI: 00:1c.3: enabled 0
1759 20:52:51.230784 PCI: 00:1c.4: enabled 0
1760 20:52:51.233855 PCI: 00:1c.5: enabled 0
1761 20:52:51.234347 PCI: 00:1c.6: enabled 1
1762 20:52:51.237430
1763 20:52:51.237876 PCI: 00:1c.7: enabled 0
1764 20:52:51.240454 PCI: 00:1d.0: enabled 1
1765 20:52:51.244256 PCI: 00:1d.1: enabled 0
1766 20:52:51.244812 PCI: 00:1d.2: enabled 1
1767 20:52:51.247107 PCI: 00:1d.3: enabled 0
1768 20:52:51.250458 PCI: 00:1e.0: enabled 1
1769 20:52:51.253854 PCI: 00:1e.1: enabled 0
1770 20:52:51.254343 PCI: 00:1e.2: enabled 1
1771 20:52:51.257338 PCI: 00:1e.3: enabled 1
1772 20:52:51.260445 PCI: 00:1f.0: enabled 1
1773 20:52:51.263984 PCI: 00:1f.1: enabled 0
1774 20:52:51.264436 PCI: 00:1f.2: enabled 1
1775 20:52:51.267319 PCI: 00:1f.3: enabled 1
1776 20:52:51.270780 PCI: 00:1f.4: enabled 0
1777 20:52:51.273998 PCI: 00:1f.5: enabled 1
1778 20:52:51.274503 PCI: 00:1f.6: enabled 0
1779 20:52:51.277071 PCI: 00:1f.7: enabled 0
1780 20:52:51.280287 APIC: 00: enabled 1
1781 20:52:51.280732 GENERIC: 0.0: enabled 1
1782 20:52:51.284166 GENERIC: 0.0: enabled 1
1783 20:52:51.287056 GENERIC: 1.0: enabled 1
1784 20:52:51.290382 GENERIC: 0.0: enabled 1
1785 20:52:51.290867 GENERIC: 1.0: enabled 1
1786 20:52:51.294016 USB0 port 0: enabled 1
1787 20:52:51.297377 GENERIC: 0.0: enabled 1
1788 20:52:51.297969 USB0 port 0: enabled 1
1789 20:52:51.300527 GENERIC: 0.0: enabled 1
1790 20:52:51.304046 I2C: 00:1a: enabled 1
1791 20:52:51.307320 I2C: 00:31: enabled 1
1792 20:52:51.307945 I2C: 00:32: enabled 1
1793 20:52:51.310728 I2C: 00:10: enabled 1
1794 20:52:51.313863 I2C: 00:15: enabled 1
1795 20:52:51.314459 GENERIC: 0.0: enabled 0
1796 20:52:51.316896 GENERIC: 1.0: enabled 0
1797 20:52:51.320675 GENERIC: 0.0: enabled 1
1798 20:52:51.321160 SPI: 00: enabled 1
1799 20:52:51.323526 SPI: 00: enabled 1
1800 20:52:51.327197 PNP: 0c09.0: enabled 1
1801 20:52:51.327682 GENERIC: 0.0: enabled 1
1802 20:52:51.330308 USB3 port 0: enabled 1
1803 20:52:51.333843 USB3 port 1: enabled 1
1804 20:52:51.334376 USB3 port 2: enabled 0
1805 20:52:51.336909
1806 20:52:51.337391 USB3 port 3: enabled 0
1807 20:52:51.340601 USB2 port 0: enabled 0
1808 20:52:51.343551 USB2 port 1: enabled 1
1809 20:52:51.344047 USB2 port 2: enabled 1
1810 20:52:51.346983 USB2 port 3: enabled 0
1811 20:52:51.350230 USB2 port 4: enabled 1
1812 20:52:51.350831 USB2 port 5: enabled 0
1813 20:52:51.353511 USB2 port 6: enabled 0
1814 20:52:51.356959 USB2 port 7: enabled 0
1815 20:52:51.360139 USB2 port 8: enabled 0
1816 20:52:51.360654 USB2 port 9: enabled 0
1817 20:52:51.363770 USB3 port 0: enabled 0
1818 20:52:51.367100 USB3 port 1: enabled 1
1819 20:52:51.367591 USB3 port 2: enabled 0
1820 20:52:51.369916 USB3 port 3: enabled 0
1821 20:52:51.373528 GENERIC: 0.0: enabled 1
1822 20:52:51.377274 GENERIC: 1.0: enabled 1
1823 20:52:51.377872 APIC: 01: enabled 1
1824 20:52:51.380213 APIC: 03: enabled 1
1825 20:52:51.380700 APIC: 05: enabled 1
1826 20:52:51.383417 APIC: 07: enabled 1
1827 20:52:51.386818 APIC: 06: enabled 1
1828 20:52:51.387447 APIC: 02: enabled 1
1829 20:52:51.390296 APIC: 04: enabled 1
1830 20:52:51.393533 PCI: 01:00.0: enabled 1
1831 20:52:51.396808 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1832 20:52:51.403218 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1833 20:52:51.406752 ELOG: NV offset 0xf30000 size 0x1000
1834 20:52:51.412908 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1835 20:52:51.419689 ELOG: Event(17) added with size 13 at 2023-01-18 20:52:51 UTC
1836 20:52:51.426364 ELOG: Event(92) added with size 9 at 2023-01-18 20:52:51 UTC
1837 20:52:51.433141 ELOG: Event(93) added with size 9 at 2023-01-18 20:52:51 UTC
1838 20:52:51.439604 ELOG: Event(9E) added with size 10 at 2023-01-18 20:52:51 UTC
1839 20:52:51.446195 ELOG: Event(9F) added with size 14 at 2023-01-18 20:52:51 UTC
1840 20:52:51.452638 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1841 20:52:51.459410 ELOG: Event(A1) added with size 10 at 2023-01-18 20:52:51 UTC
1842 20:52:51.465854 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1843 20:52:51.472454 ELOG: Event(A0) added with size 9 at 2023-01-18 20:52:51 UTC
1844 20:52:51.479359 ELOG: Event(16) added with size 11 at 2023-01-18 20:52:51 UTC
1845 20:52:51.482696 Erasing flash addr f30000 + 4 KiB
1846 20:52:51.537842 elog_add_boot_reason: Logged dev mode boot
1847 20:52:51.544561 BS: BS_POST_DEVICE entry times (exec / console): 28 / 34 ms
1848 20:52:51.545030 Finalize devices...
1849 20:52:51.548009 Devices finalized
1850 20:52:51.551375 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1851 20:52:51.558081 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1852 20:52:51.565001 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1853 20:52:51.567859 ME: HFSTS1 : 0x80030055
1854 20:52:51.571483 ME: HFSTS2 : 0x30280116
1855 20:52:51.578063 ME: HFSTS3 : 0x00000050
1856 20:52:51.581328 ME: HFSTS4 : 0x00004000
1857 20:52:51.584710 ME: HFSTS5 : 0x00000000
1858 20:52:51.591474 ME: HFSTS6 : 0x00400006
1859 20:52:51.594507 ME: Manufacturing Mode : YES
1860 20:52:51.598087 ME: SPI Protection Mode Enabled : NO
1861 20:52:51.601766 ME: FW Partition Table : OK
1862 20:52:51.604567 ME: Bringup Loader Failure : NO
1863 20:52:51.608191 ME: Firmware Init Complete : NO
1864 20:52:51.614502 ME: Boot Options Present : NO
1865 20:52:51.618105 ME: Update In Progress : NO
1866 20:52:51.621080 ME: D0i3 Support : YES
1867 20:52:51.624921 ME: Low Power State Enabled : NO
1868 20:52:51.628025 ME: CPU Replaced : YES
1869 20:52:51.631044 ME: CPU Replacement Valid : YES
1870 20:52:51.634739 ME: Current Working State : 5
1871 20:52:51.637839 ME: Current Operation State : 1
1872 20:52:51.640930 ME: Current Operation Mode : 3
1873 20:52:51.644626
1874 20:52:51.647694 ME: Error Code : 0
1875 20:52:51.651054 ME: Enhanced Debug Mode : NO
1876 20:52:51.654536 ME: CPU Debug Disabled : YES
1877 20:52:51.657882 ME: TXT Support : NO
1878 20:52:51.664149 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1879 20:52:51.670934 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1880 20:52:51.674269 CBFS: 'fallback/slic' not found.
1881 20:52:51.677932 ACPI: Writing ACPI tables at 76b01000.
1882 20:52:51.680912 ACPI: * FACS
1883 20:52:51.681462 ACPI: * DSDT
1884 20:52:51.684080 Ramoops buffer: 0x100000@0x76a00000.
1885 20:52:51.690902 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1886 20:52:51.694370 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1887 20:52:51.698269 Google Chrome EC: version:
1888 20:52:51.701428 ro: voema_v2.0.7540-147f8d37d1
1889 20:52:51.704737 rw: voema_v2.0.7540-147f8d37d1
1890 20:52:51.708125 running image: 2
1891 20:52:51.714773 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1892 20:52:51.717952 ACPI: * FADT
1893 20:52:51.718536 SCI is IRQ9
1894 20:52:51.721321 ACPI: added table 1/32, length now 40
1895 20:52:51.724564 ACPI: * SSDT
1896 20:52:51.728251 Found 1 CPU(s) with 8 core(s) each.
1897 20:52:51.731279 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1898 20:52:51.738261 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1899 20:52:51.741519 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1900 20:52:51.744517 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1901 20:52:51.751564 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1902 20:52:51.758090 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1903 20:52:51.761058 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1904 20:52:51.767707 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1905 20:52:51.774230 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1906 20:52:51.777784 \_SB.PCI0.RP09: Added StorageD3Enable property
1907 20:52:51.781398 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1908 20:52:51.787561 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1909 20:52:51.791203 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1910 20:52:51.797604 PS2K: Passing 80 keymaps to kernel
1911 20:52:51.804602 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1912 20:52:51.807566 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1913 20:52:51.810775
1914 20:52:51.814557 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1915 20:52:51.820831 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1916 20:52:51.827455 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1917 20:52:51.834061 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1918 20:52:51.840847 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1919 20:52:51.847428 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1920 20:52:51.850633 ACPI: added table 2/32, length now 44
1921 20:52:51.854082
1922 20:52:51.854574 ACPI: * MCFG
1923 20:52:51.857896 ACPI: added table 3/32, length now 48
1924 20:52:51.860575 ACPI: * TPM2
1925 20:52:51.864331 TPM2 log created at 0x769f0000
1926 20:52:51.867620 ACPI: added table 4/32, length now 52
1927 20:52:51.868119 ACPI: * MADT
1928 20:52:51.870832 SCI is IRQ9
1929 20:52:51.874478 ACPI: added table 5/32, length now 56
1930 20:52:51.875112 current = 76b09850
1931 20:52:51.877361 ACPI: * DMAR
1932 20:52:51.880698 ACPI: added table 6/32, length now 60
1933 20:52:51.884115 ACPI: added table 7/32, length now 64
1934 20:52:51.887421 ACPI: * HPET
1935 20:52:51.890788 ACPI: added table 8/32, length now 68
1936 20:52:51.891314 ACPI: done.
1937 20:52:51.894036 ACPI tables: 35216 bytes.
1938 20:52:51.897251 smbios_write_tables: 769ef000
1939 20:52:51.900788 EC returned error result code 3
1940 20:52:51.903831 Couldn't obtain OEM name from CBI
1941 20:52:51.907337 Create SMBIOS type 16
1942 20:52:51.910444 Create SMBIOS type 17
1943 20:52:51.910905 GENERIC: 0.0 (WIFI Device)
1944 20:52:51.914065
1945 20:52:51.914706 SMBIOS tables: 1750 bytes.
1946 20:52:51.920805 Writing table forward entry at 0x00000500
1947 20:52:51.923798 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1948 20:52:51.930725 Writing coreboot table at 0x76b25000
1949 20:52:51.934092 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1950 20:52:51.940521 1. 0000000000001000-000000000009ffff: RAM
1951 20:52:51.943555 2. 00000000000a0000-00000000000fffff: RESERVED
1952 20:52:51.947307 3. 0000000000100000-00000000769eefff: RAM
1953 20:52:51.953527 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1954 20:52:51.960758 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1955 20:52:51.963508 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1956 20:52:51.970285 7. 0000000077000000-000000007fbfffff: RESERVED
1957 20:52:51.973456 8. 00000000c0000000-00000000cfffffff: RESERVED
1958 20:52:51.980068 9. 00000000f8000000-00000000f9ffffff: RESERVED
1959 20:52:51.983592 10. 00000000fb000000-00000000fb000fff: RESERVED
1960 20:52:51.990315 11. 00000000fe000000-00000000fe00ffff: RESERVED
1961 20:52:51.993896 12. 00000000fed80000-00000000fed87fff: RESERVED
1962 20:52:52.000337 13. 00000000fed90000-00000000fed92fff: RESERVED
1963 20:52:52.003660 14. 00000000feda0000-00000000feda1fff: RESERVED
1964 20:52:52.006507 15. 00000000fedc0000-00000000feddffff: RESERVED
1965 20:52:52.013433 16. 0000000100000000-00000002803fffff: RAM
1966 20:52:52.016746 Passing 4 GPIOs to payload:
1967 20:52:52.020201 NAME | PORT | POLARITY | VALUE
1968 20:52:52.026470 lid | undefined | high | high
1969 20:52:52.030197 power | undefined | high | low
1970 20:52:52.036705 oprom | undefined | high | low
1971 20:52:52.039966 EC in RW | 0x000000e5 | high | high
1972 20:52:52.043285
1973 20:52:52.046690 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f4be
1974 20:52:52.049818 coreboot table: 1576 bytes.
1975 20:52:52.053077 IMD ROOT 0. 0x76fff000 0x00001000
1976 20:52:52.056463 IMD SMALL 1. 0x76ffe000 0x00001000
1977 20:52:52.060215
1978 20:52:52.063152 FSP MEMORY 2. 0x76c4e000 0x003b0000
1979 20:52:52.066239 VPD 3. 0x76c4d000 0x00000367
1980 20:52:52.069769 RO MCACHE 4. 0x76c4c000 0x00000fdc
1981 20:52:52.073155 CONSOLE 5. 0x76c2c000 0x00020000
1982 20:52:52.076664 FMAP 6. 0x76c2b000 0x00000578
1983 20:52:52.079804 TIME STAMP 7. 0x76c2a000 0x00000910
1984 20:52:52.083217 VBOOT WORK 8. 0x76c16000 0x00014000
1985 20:52:52.086398 ROMSTG STCK 9. 0x76c15000 0x00001000
1986 20:52:52.093112 AFTER CAR 10. 0x76c0a000 0x0000b000
1987 20:52:52.095874 RAMSTAGE 11. 0x76b97000 0x00073000
1988 20:52:52.099475 REFCODE 12. 0x76b42000 0x00055000
1989 20:52:52.102581 SMM BACKUP 13. 0x76b32000 0x00010000
1990 20:52:52.105746 4f444749 14. 0x76b30000 0x00002000
1991 20:52:52.109223 EXT VBT15. 0x76b2d000 0x0000219f
1992 20:52:52.113023 COREBOOT 16. 0x76b25000 0x00008000
1993 20:52:52.116151 ACPI 17. 0x76b01000 0x00024000
1994 20:52:52.119292 ACPI GNVS 18. 0x76b00000 0x00001000
1995 20:52:52.125875 RAMOOPS 19. 0x76a00000 0x00100000
1996 20:52:52.129479 TPM2 TCGLOG20. 0x769f0000 0x00010000
1997 20:52:52.132806 SMBIOS 21. 0x769ef000 0x00000800
1998 20:52:52.133005 IMD small region:
1999 20:52:52.139511 IMD ROOT 0. 0x76ffec00 0x00000400
2000 20:52:52.142575 FSP RUNTIME 1. 0x76ffebe0 0x00000004
2001 20:52:52.145779 POWER STATE 2. 0x76ffeb80 0x00000044
2002 20:52:52.149455 ROMSTAGE 3. 0x76ffeb60 0x00000004
2003 20:52:52.152524 MEM INFO 4. 0x76ffe980 0x000001e0
2004 20:52:52.159554 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
2005 20:52:52.162588 MTRR: Physical address space:
2006 20:52:52.169878 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
2007 20:52:52.176240 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
2008 20:52:52.182918 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
2009 20:52:52.186227 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
2010 20:52:52.192812 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
2011 20:52:52.199836 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
2012 20:52:52.206215 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
2013 20:52:52.209533 MTRR: Fixed MSR 0x250 0x0606060606060606
2014 20:52:52.216188 MTRR: Fixed MSR 0x258 0x0606060606060606
2015 20:52:52.219266 MTRR: Fixed MSR 0x259 0x0000000000000000
2016 20:52:52.222382 MTRR: Fixed MSR 0x268 0x0606060606060606
2017 20:52:52.226344 MTRR: Fixed MSR 0x269 0x0606060606060606
2018 20:52:52.232685 MTRR: Fixed MSR 0x26a 0x0606060606060606
2019 20:52:52.235795 MTRR: Fixed MSR 0x26b 0x0606060606060606
2020 20:52:52.239380 MTRR: Fixed MSR 0x26c 0x0606060606060606
2021 20:52:52.242328 MTRR: Fixed MSR 0x26d 0x0606060606060606
2022 20:52:52.245678 MTRR: Fixed MSR 0x26e 0x0606060606060606
2023 20:52:52.249384
2024 20:52:52.252430 MTRR: Fixed MSR 0x26f 0x0606060606060606
2025 20:52:52.255644 call enable_fixed_mtrr()
2026 20:52:52.259439 CPU physical address size: 39 bits
2027 20:52:52.262177 MTRR: default type WB/UC MTRR counts: 6/6.
2028 20:52:52.265943 MTRR: UC selected as default type.
2029 20:52:52.272528 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2030 20:52:52.279041 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2031 20:52:52.285539 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2032 20:52:52.292137 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2033 20:52:52.299005 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2034 20:52:52.305354 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2035 20:52:52.308582 MTRR: Fixed MSR 0x250 0x0606060606060606
2036 20:52:52.312193 MTRR: Fixed MSR 0x258 0x0606060606060606
2037 20:52:52.315499
2038 20:52:52.318829 MTRR: Fixed MSR 0x259 0x0000000000000000
2039 20:52:52.321905 MTRR: Fixed MSR 0x268 0x0606060606060606
2040 20:52:52.325437 MTRR: Fixed MSR 0x269 0x0606060606060606
2041 20:52:52.328875 MTRR: Fixed MSR 0x26a 0x0606060606060606
2042 20:52:52.335539 MTRR: Fixed MSR 0x26b 0x0606060606060606
2043 20:52:52.338506 MTRR: Fixed MSR 0x26c 0x0606060606060606
2044 20:52:52.341979 MTRR: Fixed MSR 0x26d 0x0606060606060606
2045 20:52:52.345438 MTRR: Fixed MSR 0x26e 0x0606060606060606
2046 20:52:52.351638 MTRR: Fixed MSR 0x26f 0x0606060606060606
2047 20:52:52.355382 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 20:52:52.358321 call enable_fixed_mtrr()
2049 20:52:52.361972 MTRR: Fixed MSR 0x258 0x0606060606060606
2050 20:52:52.365180 MTRR: Fixed MSR 0x259 0x0000000000000000
2051 20:52:52.371862 MTRR: Fixed MSR 0x268 0x0606060606060606
2052 20:52:52.374994 MTRR: Fixed MSR 0x269 0x0606060606060606
2053 20:52:52.378705 MTRR: Fixed MSR 0x26a 0x0606060606060606
2054 20:52:52.382034 MTRR: Fixed MSR 0x26b 0x0606060606060606
2055 20:52:52.388952 MTRR: Fixed MSR 0x26c 0x0606060606060606
2056 20:52:52.391589 MTRR: Fixed MSR 0x26d 0x0606060606060606
2057 20:52:52.395287 MTRR: Fixed MSR 0x26e 0x0606060606060606
2058 20:52:52.398436 MTRR: Fixed MSR 0x26f 0x0606060606060606
2059 20:52:52.402415 CPU physical address size: 39 bits
2060 20:52:52.409113 call enable_fixed_mtrr()
2061 20:52:52.409702
2062 20:52:52.410093 MTRR check
2063 20:52:52.411981 MTRR: Fixed MSR 0x250 0x0606060606060606
2064 20:52:52.415646 Fixed MTRRs : Enabled
2065 20:52:52.418807 Variable MTRRs: Enabled
2066 20:52:52.419326
2067 20:52:52.422261 MTRR: Fixed MSR 0x258 0x0606060606060606
2068 20:52:52.426323 MTRR: Fixed MSR 0x259 0x0000000000000000
2069 20:52:52.428581 MTRR: Fixed MSR 0x268 0x0606060606060606
2070 20:52:52.435276 MTRR: Fixed MSR 0x269 0x0606060606060606
2071 20:52:52.438366 MTRR: Fixed MSR 0x26a 0x0606060606060606
2072 20:52:52.441889 MTRR: Fixed MSR 0x26b 0x0606060606060606
2073 20:52:52.445175 MTRR: Fixed MSR 0x26c 0x0606060606060606
2074 20:52:52.451977 MTRR: Fixed MSR 0x26d 0x0606060606060606
2075 20:52:52.455163 MTRR: Fixed MSR 0x26e 0x0606060606060606
2076 20:52:52.458174 MTRR: Fixed MSR 0x26f 0x0606060606060606
2077 20:52:52.465092 BS: BS_WRITE_TABLES exit times (exec / console): 108 / 150 ms
2078 20:52:52.468487 call enable_fixed_mtrr()
2079 20:52:52.472436 Checking cr50 for pending updates
2080 20:52:52.476401 CPU physical address size: 39 bits
2081 20:52:52.479932 MTRR: Fixed MSR 0x250 0x0606060606060606
2082 20:52:52.483131 MTRR: Fixed MSR 0x250 0x0606060606060606
2083 20:52:52.486581 MTRR: Fixed MSR 0x258 0x0606060606060606
2084 20:52:52.492868 MTRR: Fixed MSR 0x259 0x0000000000000000
2085 20:52:52.496613 MTRR: Fixed MSR 0x268 0x0606060606060606
2086 20:52:52.499568 MTRR: Fixed MSR 0x269 0x0606060606060606
2087 20:52:52.503189 MTRR: Fixed MSR 0x26a 0x0606060606060606
2088 20:52:52.510146 MTRR: Fixed MSR 0x26b 0x0606060606060606
2089 20:52:52.513482 MTRR: Fixed MSR 0x26c 0x0606060606060606
2090 20:52:52.516745 MTRR: Fixed MSR 0x26d 0x0606060606060606
2091 20:52:52.519797 MTRR: Fixed MSR 0x26e 0x0606060606060606
2092 20:52:52.526454 MTRR: Fixed MSR 0x26f 0x0606060606060606
2093 20:52:52.529585 MTRR: Fixed MSR 0x258 0x0606060606060606
2094 20:52:52.533417 MTRR: Fixed MSR 0x259 0x0000000000000000
2095 20:52:52.539828 MTRR: Fixed MSR 0x268 0x0606060606060606
2096 20:52:52.542689 MTRR: Fixed MSR 0x269 0x0606060606060606
2097 20:52:52.546208 MTRR: Fixed MSR 0x26a 0x0606060606060606
2098 20:52:52.549616 MTRR: Fixed MSR 0x26b 0x0606060606060606
2099 20:52:52.552724 MTRR: Fixed MSR 0x26c 0x0606060606060606
2100 20:52:52.555974
2101 20:52:52.559556 MTRR: Fixed MSR 0x26d 0x0606060606060606
2102 20:52:52.563281 MTRR: Fixed MSR 0x26e 0x0606060606060606
2103 20:52:52.566324 MTRR: Fixed MSR 0x26f 0x0606060606060606
2104 20:52:52.570027 call enable_fixed_mtrr()
2105 20:52:52.573092 call enable_fixed_mtrr()
2106 20:52:52.577412 Reading cr50 TPM mode
2107 20:52:52.578003 CPU physical address size: 39 bits
2108 20:52:52.581708 CPU physical address size: 39 bits
2109 20:52:52.588459 MTRR: Fixed MSR 0x250 0x0606060606060606
2110 20:52:52.591961 MTRR: Fixed MSR 0x250 0x0606060606060606
2111 20:52:52.595251 MTRR: Fixed MSR 0x258 0x0606060606060606
2112 20:52:52.598575 MTRR: Fixed MSR 0x259 0x0000000000000000
2113 20:52:52.604819 MTRR: Fixed MSR 0x268 0x0606060606060606
2114 20:52:52.607962 MTRR: Fixed MSR 0x269 0x0606060606060606
2115 20:52:52.611626 MTRR: Fixed MSR 0x26a 0x0606060606060606
2116 20:52:52.614954 MTRR: Fixed MSR 0x26b 0x0606060606060606
2117 20:52:52.621331 MTRR: Fixed MSR 0x26c 0x0606060606060606
2118 20:52:52.624748 MTRR: Fixed MSR 0x26d 0x0606060606060606
2119 20:52:52.628219 MTRR: Fixed MSR 0x26e 0x0606060606060606
2120 20:52:52.631173 MTRR: Fixed MSR 0x26f 0x0606060606060606
2121 20:52:52.638790 MTRR: Fixed MSR 0x258 0x0606060606060606
2122 20:52:52.639514 call enable_fixed_mtrr()
2123 20:52:52.645350 MTRR: Fixed MSR 0x259 0x0000000000000000
2124 20:52:52.649020 MTRR: Fixed MSR 0x268 0x0606060606060606
2125 20:52:52.652189 MTRR: Fixed MSR 0x269 0x0606060606060606
2126 20:52:52.655711 MTRR: Fixed MSR 0x26a 0x0606060606060606
2127 20:52:52.662123 MTRR: Fixed MSR 0x26b 0x0606060606060606
2128 20:52:52.665635 MTRR: Fixed MSR 0x26c 0x0606060606060606
2129 20:52:52.668879 MTRR: Fixed MSR 0x26d 0x0606060606060606
2130 20:52:52.671907 MTRR: Fixed MSR 0x26e 0x0606060606060606
2131 20:52:52.678479 MTRR: Fixed MSR 0x26f 0x0606060606060606
2132 20:52:52.681943 CPU physical address size: 39 bits
2133 20:52:52.685078 call enable_fixed_mtrr()
2134 20:52:52.691890 BS: BS_PAYLOAD_LOAD entry times (exec / console): 108 / 6 ms
2135 20:52:52.695253 CPU physical address size: 39 bits
2136 20:52:52.698750 CPU physical address size: 39 bits
2137 20:52:52.704927 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2138 20:52:52.711716 Checking segment from ROM address 0xffc02b38
2139 20:52:52.715327 Checking segment from ROM address 0xffc02b54
2140 20:52:52.718562 Loading segment from ROM address 0xffc02b38
2141 20:52:52.721637 code (compression=0)
2142 20:52:52.731592 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2143 20:52:52.738171 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2144 20:52:52.740919 it's not compressed!
2145 20:52:52.879761 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2146 20:52:52.886166 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2147 20:52:52.892977 Loading segment from ROM address 0xffc02b54
2148 20:52:52.893161 Entry Point 0x30000000
2149 20:52:52.896491 Loaded segments
2150 20:52:52.902694 BS: BS_PAYLOAD_LOAD run times (exec / console): 142 / 63 ms
2151 20:52:52.945735 Finalizing chipset.
2152 20:52:52.949171 Finalizing SMM.
2153 20:52:52.949629 APMC done.
2154 20:52:52.955610 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2155 20:52:52.959228 mp_park_aps done after 0 msecs.
2156 20:52:52.962275 Jumping to boot code at 0x30000000(0x76b25000)
2157 20:52:52.972328 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2158 20:52:52.972776
2159 20:52:52.973131
2160 20:52:52.975435
2161 20:52:52.975877 Starting depthcharge on Voema...
2162 20:52:52.976942 end: 2.2.3 depthcharge-start (duration 00:00:16) [common]
2163 20:52:52.977550 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2164 20:52:52.977976 Setting prompt string to ['volteer:']
2165 20:52:52.978385 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2166 20:52:52.979207
2167 20:52:52.985418 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2168 20:52:52.985865
2169 20:52:52.992010 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2170 20:52:52.992454
2171 20:52:52.998839 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2172 20:52:52.999309
2173 20:52:53.002033 Failed to find eMMC card reader
2174 20:52:53.002475
2175 20:52:53.002824 Wipe memory regions:
2176 20:52:53.005386
2177 20:52:53.008549 [0x00000000001000, 0x000000000a0000)
2178 20:52:53.008996
2179 20:52:53.011948 [0x00000000100000, 0x00000030000000)
2180 20:52:53.012388
2181 20:52:53.040817 [0x00000032662db0, 0x000000769ef000)
2182 20:52:53.041442
2183 20:52:53.079246 [0x00000100000000, 0x00000280400000)
2184 20:52:53.079401
2185 20:52:53.283558 ec_init: CrosEC protocol v3 supported (256, 256)
2186 20:52:53.284165
2187 20:52:53.290282 update_port_state: port C0 state: usb enable 1 mux conn 0
2188 20:52:53.290909
2189 20:52:53.296576 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2190 20:52:53.300075
2191 20:52:53.303069 pmc_check_ipc_sts: STS_BUSY done after 1611 us
2192 20:52:53.303563
2193 20:52:53.309523 send_conn_disc_msg: pmc_send_cmd succeeded
2194 20:52:53.310015
2195 20:52:53.741041 R8152: Initializing
2196 20:52:53.741633
2197 20:52:53.744413 Version 6 (ocp_data = 5c30)
2198 20:52:53.744903
2199 20:52:53.747451 R8152: Done initializing
2200 20:52:53.747939
2201 20:52:53.751135 Adding net device
2202 20:52:53.751772
2203 20:52:54.055769 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2204 20:52:54.056358
2205 20:52:54.056748
2206 20:52:54.057109
2207 20:52:54.059165 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2209 20:52:54.161046 volteer: tftpboot 192.168.201.1 8785134/tftp-deploy-m1mwol1u/kernel/bzImage 8785134/tftp-deploy-m1mwol1u/kernel/cmdline 8785134/tftp-deploy-m1mwol1u/ramdisk/ramdisk.cpio.gz
2210 20:52:54.161780 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2211 20:52:54.162286 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:42)
2212 20:52:54.167274 tftpboot 192.168.201.1 8785134/tftp-deploy-m1mwol1u/kernel/bzImoy-m1mwol1u/kernel/cmdline 8785134/tftp-deploy-m1mwol1u/ramdisk/ramdisk.cpio.gz
2213 20:52:54.167797
2214 20:52:54.168190 Waiting for link
2215 20:52:54.168557
2216 20:52:54.370474 done.
2217 20:52:54.371111
2218 20:52:54.371575 MAC: 00:24:32:30:78:74
2219 20:52:54.372121
2220 20:52:54.373371 Sending DHCP discover... done.
2221 20:52:54.373859
2222 20:52:54.377136 Waiting for reply... done.
2223 20:52:54.377946
2224 20:52:54.380126 Sending DHCP request... done.
2225 20:52:54.380692
2226 20:52:54.383602 Waiting for reply... done.
2227 20:52:54.384089
2228 20:52:54.386562 My ip is 192.168.201.14
2229 20:52:54.387094
2230 20:52:54.390123 The DHCP server ip is 192.168.201.1
2231 20:52:54.390614
2232 20:52:54.393487 TFTP server IP predefined by user: 192.168.201.1
2233 20:52:54.394089
2234 20:52:54.403225 Bootfile predefined by user: 8785134/tftp-deploy-m1mwol1u/kernel/bzImage
2235 20:52:54.403825
2236 20:52:54.406585 Sending tftp read request... done.
2237 20:52:54.407212
2238 20:52:54.410072 Waiting for the transfer...
2239 20:52:54.410562
2240 20:52:55.123798 00000000 ################################################################
2241 20:52:55.124408
2242 20:52:55.860166 00080000 ################################################################
2243 20:52:55.860721
2244 20:52:56.547158 00100000 ################################################################
2245 20:52:56.547758
2246 20:52:57.263214 00180000 ################################################################
2247 20:52:57.263850
2248 20:52:57.971992 00200000 ################################################################
2249 20:52:57.972531
2250 20:52:58.621905 00280000 ################################################################
2251 20:52:58.622057
2252 20:52:59.243053 00300000 ################################################################
2253 20:52:59.243354
2254 20:52:59.900480 00380000 ################################################################
2255 20:52:59.901070
2256 20:53:00.508349 00400000 ################################################################
2257 20:53:00.508502
2258 20:53:01.153320 00480000 ################################################################
2259 20:53:01.153631
2260 20:53:01.864472 00500000 ################################################################
2261 20:53:01.865099
2262 20:53:02.589891 00580000 ################################################################
2263 20:53:02.590513
2264 20:53:03.299609 00600000 ################################################################
2265 20:53:03.300223
2266 20:53:03.985275 00680000 ################################################################
2267 20:53:03.985550
2268 20:53:04.583338 00700000 ################################################################
2269 20:53:04.583522
2270 20:53:05.290226 00780000 ################################################################
2271 20:53:05.290914
2272 20:53:06.012220 00800000 ################################################################
2273 20:53:06.012855
2274 20:53:06.744781 00880000 ################################################################
2275 20:53:06.745385
2276 20:53:07.102811 00900000 ################################## done.
2277 20:53:07.103436
2278 20:53:07.106206 The bootfile was 9711616 bytes long.
2279 20:53:07.106809
2280 20:53:07.109641 Sending tftp read request... done.
2281 20:53:07.110263
2282 20:53:07.112726 Waiting for the transfer...
2283 20:53:07.113278
2284 20:53:07.815295 00000000 ################################################################
2285 20:53:07.815859
2286 20:53:08.520902 00080000 ################################################################
2287 20:53:08.521452
2288 20:53:09.231991 00100000 ################################################################
2289 20:53:09.232572
2290 20:53:09.946663 00180000 ################################################################
2291 20:53:09.947306
2292 20:53:10.667667 00200000 ################################################################
2293 20:53:10.668284
2294 20:53:11.369723 00280000 ################################################################
2295 20:53:11.370293
2296 20:53:12.090362 00300000 ################################################################
2297 20:53:12.090999
2298 20:53:12.818959 00380000 ################################################################
2299 20:53:12.819623
2300 20:53:13.555429 00400000 ################################################################
2301 20:53:13.556040
2302 20:53:14.269986 00480000 ################################################################
2303 20:53:14.270542
2304 20:53:14.648625 00500000 ################################### done.
2305 20:53:14.649189
2306 20:53:14.651773 Sending tftp read request... done.
2307 20:53:14.652231
2308 20:53:14.655184 Waiting for the transfer...
2309 20:53:14.655641
2310 20:53:14.656097 00000000 # done.
2311 20:53:14.656533
2312 20:53:14.665095 Command line loaded dynamically from TFTP file: 8785134/tftp-deploy-m1mwol1u/kernel/cmdline
2313 20:53:14.665665
2314 20:53:14.688688 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8785134/extract-nfsrootfs-xi54azw0,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2315 20:53:14.689308
2316 20:53:14.696202 Shutting down all USB controllers.
2317 20:53:14.696808
2318 20:53:14.697314 Removing current net device
2319 20:53:14.697814
2320 20:53:14.700082 Finalizing coreboot
2321 20:53:14.700685
2322 20:53:14.706298 Exiting depthcharge with code 4 at timestamp: 30444216
2323 20:53:14.706942
2324 20:53:14.707458
2325 20:53:14.707931 Starting kernel ...
2326 20:53:14.708388
2327 20:53:14.708845
2328 20:53:14.709311
2329 20:53:14.710751 end: 2.2.4 bootloader-commands (duration 00:00:22) [common]
2330 20:53:14.711425 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2331 20:53:14.711910 Setting prompt string to ['Linux version [0-9]']
2332 20:53:14.712413 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2333 20:53:14.712903 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2335 20:57:36.712408 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2337 20:57:36.713587 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2339 20:57:36.714492 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2342 20:57:36.716148 end: 2 depthcharge-action (duration 00:05:00) [common]
2344 20:57:36.717094 Cleaning after the job
2345 20:57:36.717180 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785134/tftp-deploy-m1mwol1u/ramdisk
2346 20:57:36.717671 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785134/tftp-deploy-m1mwol1u/kernel
2347 20:57:36.718426 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785134/tftp-deploy-m1mwol1u/nfsrootfs
2348 20:57:36.769509 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785134/tftp-deploy-m1mwol1u/modules
2349 20:57:36.769832 start: 4.1 power-off (timeout 00:00:30) [common]
2350 20:57:36.769990 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-1' '--port=1' '--command=off'
2351 20:57:36.789071 >> Command sent successfully.
2352 20:57:36.791026 Returned 0 in 0 seconds
2353 20:57:36.892200 end: 4.1 power-off (duration 00:00:00) [common]
2355 20:57:36.893817 start: 4.2 read-feedback (timeout 00:10:00) [common]
2356 20:57:36.895079 Listened to connection for namespace 'common' for up to 1s
2357 20:57:37.899203 Finalising connection for namespace 'common'
2358 20:57:37.899949 Disconnecting from shell: Finalise
2359 20:57:38.001476 end: 4.2 read-feedback (duration 00:00:01) [common]
2360 20:57:38.002129 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8785134
2361 20:57:38.163097 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8785134
2362 20:57:38.163303 JobError: Your job cannot terminate cleanly.