Boot log: asus-C436FA-Flip-hatch

    1 20:54:12.778393  lava-dispatcher, installed at version: 2022.11
    2 20:54:12.778576  start: 0 validate
    3 20:54:12.778707  Start time: 2023-01-18 20:54:12.778701+00:00 (UTC)
    4 20:54:12.778831  Using caching service: 'http://localhost/cache/?uri=%s'
    5 20:54:12.778989  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230114.0%2Famd64%2Finitrd.cpio.gz exists
    6 20:54:13.068270  Using caching service: 'http://localhost/cache/?uri=%s'
    7 20:54:13.068454  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.269-cip88-rt28%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
    8 20:54:13.357329  Using caching service: 'http://localhost/cache/?uri=%s'
    9 20:54:13.357546  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230114.0%2Famd64%2Ffull.rootfs.tar.xz exists
   10 20:54:13.648180  Using caching service: 'http://localhost/cache/?uri=%s'
   11 20:54:13.648354  Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.269-cip88-rt28%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
   12 20:54:13.937221  validate duration: 1.16
   14 20:54:13.937543  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 20:54:13.937658  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 20:54:13.937752  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 20:54:13.937852  Not decompressing ramdisk as can be used compressed.
   18 20:54:13.937942  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230114.0/amd64/initrd.cpio.gz
   19 20:54:13.938010  saving as /var/lib/lava/dispatcher/tmp/8785150/tftp-deploy-xrt4btdr/ramdisk/initrd.cpio.gz
   20 20:54:13.938073  total size: 5432122 (5MB)
   21 20:54:13.939195  progress   0% (0MB)
   22 20:54:13.940651  progress   5% (0MB)
   23 20:54:13.942031  progress  10% (0MB)
   24 20:54:13.943399  progress  15% (0MB)
   25 20:54:13.944867  progress  20% (1MB)
   26 20:54:13.946212  progress  25% (1MB)
   27 20:54:13.947514  progress  30% (1MB)
   28 20:54:13.948988  progress  35% (1MB)
   29 20:54:13.950351  progress  40% (2MB)
   30 20:54:13.951644  progress  45% (2MB)
   31 20:54:13.952935  progress  50% (2MB)
   32 20:54:13.954423  progress  55% (2MB)
   33 20:54:13.955716  progress  60% (3MB)
   34 20:54:13.957060  progress  65% (3MB)
   35 20:54:13.958577  progress  70% (3MB)
   36 20:54:13.959873  progress  75% (3MB)
   37 20:54:13.961163  progress  80% (4MB)
   38 20:54:13.962521  progress  85% (4MB)
   39 20:54:13.963975  progress  90% (4MB)
   40 20:54:13.965301  progress  95% (4MB)
   41 20:54:13.966652  progress 100% (5MB)
   42 20:54:13.966925  5MB downloaded in 0.03s (179.59MB/s)
   43 20:54:13.967085  end: 1.1.1 http-download (duration 00:00:00) [common]
   45 20:54:13.967332  end: 1.1 download-retry (duration 00:00:00) [common]
   46 20:54:13.967424  start: 1.2 download-retry (timeout 00:10:00) [common]
   47 20:54:13.967514  start: 1.2.1 http-download (timeout 00:10:00) [common]
   48 20:54:13.967618  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.269-cip88-rt28/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
   49 20:54:13.967687  saving as /var/lib/lava/dispatcher/tmp/8785150/tftp-deploy-xrt4btdr/kernel/bzImage
   50 20:54:13.967750  total size: 9711616 (9MB)
   51 20:54:13.967812  No compression specified
   52 20:54:13.968931  progress   0% (0MB)
   53 20:54:13.971350  progress   5% (0MB)
   54 20:54:13.973847  progress  10% (0MB)
   55 20:54:13.976282  progress  15% (1MB)
   56 20:54:13.978713  progress  20% (1MB)
   57 20:54:13.981115  progress  25% (2MB)
   58 20:54:13.983459  progress  30% (2MB)
   59 20:54:13.985955  progress  35% (3MB)
   60 20:54:13.988343  progress  40% (3MB)
   61 20:54:13.990836  progress  45% (4MB)
   62 20:54:13.993304  progress  50% (4MB)
   63 20:54:13.995717  progress  55% (5MB)
   64 20:54:13.997995  progress  60% (5MB)
   65 20:54:14.000357  progress  65% (6MB)
   66 20:54:14.002815  progress  70% (6MB)
   67 20:54:14.005237  progress  75% (6MB)
   68 20:54:14.007648  progress  80% (7MB)
   69 20:54:14.009884  progress  85% (7MB)
   70 20:54:14.012257  progress  90% (8MB)
   71 20:54:14.014743  progress  95% (8MB)
   72 20:54:14.017151  progress 100% (9MB)
   73 20:54:14.017364  9MB downloaded in 0.05s (186.70MB/s)
   74 20:54:14.017558  end: 1.2.1 http-download (duration 00:00:00) [common]
   76 20:54:14.017804  end: 1.2 download-retry (duration 00:00:00) [common]
   77 20:54:14.017897  start: 1.3 download-retry (timeout 00:10:00) [common]
   78 20:54:14.017987  start: 1.3.1 http-download (timeout 00:10:00) [common]
   79 20:54:14.018096  downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230114.0/amd64/full.rootfs.tar.xz
   80 20:54:14.018165  saving as /var/lib/lava/dispatcher/tmp/8785150/tftp-deploy-xrt4btdr/nfsrootfs/full.rootfs.tar
   81 20:54:14.018229  total size: 123911640 (118MB)
   82 20:54:14.018292  Using unxz to decompress xz
   83 20:54:14.021499  progress   0% (0MB)
   84 20:54:14.469584  progress   5% (5MB)
   85 20:54:14.920288  progress  10% (11MB)
   86 20:54:15.367893  progress  15% (17MB)
   87 20:54:15.829183  progress  20% (23MB)
   88 20:54:16.159032  progress  25% (29MB)
   89 20:54:16.492574  progress  30% (35MB)
   90 20:54:16.756414  progress  35% (41MB)
   91 20:54:16.920151  progress  40% (47MB)
   92 20:54:17.279391  progress  45% (53MB)
   93 20:54:17.634057  progress  50% (59MB)
   94 20:54:17.962844  progress  55% (65MB)
   95 20:54:18.308312  progress  60% (70MB)
   96 20:54:18.633530  progress  65% (76MB)
   97 20:54:19.001986  progress  70% (82MB)
   98 20:54:19.402153  progress  75% (88MB)
   99 20:54:19.804732  progress  80% (94MB)
  100 20:54:19.928101  progress  85% (100MB)
  101 20:54:20.088030  progress  90% (106MB)
  102 20:54:20.410746  progress  95% (112MB)
  103 20:54:20.776449  progress 100% (118MB)
  104 20:54:20.782092  118MB downloaded in 6.76s (17.47MB/s)
  105 20:54:20.782355  end: 1.3.1 http-download (duration 00:00:07) [common]
  107 20:54:20.782628  end: 1.3 download-retry (duration 00:00:07) [common]
  108 20:54:20.782723  start: 1.4 download-retry (timeout 00:09:53) [common]
  109 20:54:20.782815  start: 1.4.1 http-download (timeout 00:09:53) [common]
  110 20:54:20.782934  downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.269-cip88-rt28/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
  111 20:54:20.783005  saving as /var/lib/lava/dispatcher/tmp/8785150/tftp-deploy-xrt4btdr/modules/modules.tar
  112 20:54:20.783068  total size: 64664 (0MB)
  113 20:54:20.783133  Using unxz to decompress xz
  114 20:54:20.786173  progress  50% (0MB)
  115 20:54:20.786541  progress 100% (0MB)
  116 20:54:20.790785  0MB downloaded in 0.01s (8.00MB/s)
  117 20:54:20.791006  end: 1.4.1 http-download (duration 00:00:00) [common]
  119 20:54:20.791275  end: 1.4 download-retry (duration 00:00:00) [common]
  120 20:54:20.791372  start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
  121 20:54:20.791473  start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
  122 20:54:22.503705  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/8785150/extract-nfsrootfs-16dt7n7j
  123 20:54:22.503921  end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
  124 20:54:22.504027  start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
  125 20:54:22.504167  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31
  126 20:54:22.504272  makedir: /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin
  127 20:54:22.504359  makedir: /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/tests
  128 20:54:22.504443  makedir: /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/results
  129 20:54:22.504541  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-add-keys
  130 20:54:22.504674  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-add-sources
  131 20:54:22.504794  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-background-process-start
  132 20:54:22.504910  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-background-process-stop
  133 20:54:22.505024  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-common-functions
  134 20:54:22.505136  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-echo-ipv4
  135 20:54:22.505248  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-install-packages
  136 20:54:22.505361  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-installed-packages
  137 20:54:22.505511  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-os-build
  138 20:54:22.505621  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-probe-channel
  139 20:54:22.505732  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-probe-ip
  140 20:54:22.505844  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-target-ip
  141 20:54:22.505956  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-target-mac
  142 20:54:22.506066  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-target-storage
  143 20:54:22.506181  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-test-case
  144 20:54:22.506297  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-test-event
  145 20:54:22.506408  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-test-feedback
  146 20:54:22.506518  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-test-raise
  147 20:54:22.506627  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-test-reference
  148 20:54:22.506737  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-test-runner
  149 20:54:22.506847  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-test-set
  150 20:54:22.506956  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-test-shell
  151 20:54:22.507067  Updating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-install-packages (oe)
  152 20:54:22.507182  Updating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/bin/lava-installed-packages (oe)
  153 20:54:22.507281  Creating /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/environment
  154 20:54:22.507369  LAVA metadata
  155 20:54:22.507438  - LAVA_JOB_ID=8785150
  156 20:54:22.507505  - LAVA_DISPATCHER_IP=192.168.201.1
  157 20:54:22.507605  start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
  158 20:54:22.507672  skipped lava-vland-overlay
  159 20:54:22.507751  end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
  160 20:54:22.507834  start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
  161 20:54:22.507898  skipped lava-multinode-overlay
  162 20:54:22.507975  end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
  163 20:54:22.508058  start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
  164 20:54:22.508134  Loading test definitions
  165 20:54:22.508226  start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
  166 20:54:22.508301  Using /lava-8785150 at stage 0
  167 20:54:22.508396  Fetching tests from https://github.com/kernelci/test-definitions
  168 20:54:22.508477  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/0/tests/0_ltp-mm'
  169 20:54:24.856212  Running '/usr/bin/git checkout kernelci.org
  170 20:54:24.993250  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
  171 20:54:24.994044  uuid=8785150_1.5.2.3.1 testdef=None
  172 20:54:24.994207  end: 1.5.2.3.1 git-repo-action (duration 00:00:02) [common]
  174 20:54:24.994470  start: 1.5.2.3.2 test-overlay (timeout 00:09:49) [common]
  175 20:54:24.995274  end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
  177 20:54:24.995522  start: 1.5.2.3.3 test-install-overlay (timeout 00:09:49) [common]
  178 20:54:24.996522  end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
  180 20:54:24.996774  start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:49) [common]
  181 20:54:24.997800  runner path: /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/0/tests/0_ltp-mm test_uuid 8785150_1.5.2.3.1
  182 20:54:24.997898  SKIPFILE='skipfile-lkft.yaml'
  183 20:54:24.997968  SKIP_INSTALL='true'
  184 20:54:24.998031  TST_CMDFILES='mm'
  185 20:54:24.998175  end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
  187 20:54:24.998396  Creating lava-test-runner.conf files
  188 20:54:24.998464  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/8785150/lava-overlay-ziplvx31/lava-8785150/0 for stage 0
  189 20:54:24.998554  - 0_ltp-mm
  190 20:54:24.998657  end: 1.5.2.3 test-definition (duration 00:00:02) [common]
  191 20:54:24.998751  start: 1.5.2.4 compress-overlay (timeout 00:09:49) [common]
  192 20:54:32.486214  end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
  193 20:54:32.486375  start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:41) [common]
  194 20:54:32.486478  end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
  195 20:54:32.486587  end: 1.5.2 lava-overlay (duration 00:00:10) [common]
  196 20:54:32.486683  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:41) [common]
  197 20:54:32.588382  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  198 20:54:32.588740  start: 1.5.4 extract-modules (timeout 00:09:41) [common]
  199 20:54:32.588944  extracting modules file /var/lib/lava/dispatcher/tmp/8785150/tftp-deploy-xrt4btdr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8785150/extract-nfsrootfs-16dt7n7j
  200 20:54:32.593202  extracting modules file /var/lib/lava/dispatcher/tmp/8785150/tftp-deploy-xrt4btdr/modules/modules.tar to /var/lib/lava/dispatcher/tmp/8785150/extract-overlay-ramdisk-ydu1cxu4/ramdisk
  201 20:54:32.597168  end: 1.5.4 extract-modules (duration 00:00:00) [common]
  202 20:54:32.597278  start: 1.5.5 apply-overlay-tftp (timeout 00:09:41) [common]
  203 20:54:32.597377  [common] Applying overlay to NFS
  204 20:54:32.597491  [common] Applying overlay /var/lib/lava/dispatcher/tmp/8785150/compress-overlay-w9582ejj/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/8785150/extract-nfsrootfs-16dt7n7j
  205 20:54:33.068250  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  206 20:54:33.068424  start: 1.5.6 configure-preseed-file (timeout 00:09:41) [common]
  207 20:54:33.068527  end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
  208 20:54:33.068630  start: 1.5.7 compress-ramdisk (timeout 00:09:41) [common]
  209 20:54:33.068715  Building ramdisk /var/lib/lava/dispatcher/tmp/8785150/extract-overlay-ramdisk-ydu1cxu4/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/8785150/extract-overlay-ramdisk-ydu1cxu4/ramdisk
  210 20:54:33.102053  >> 24777 blocks

  211 20:54:33.574810  rename /var/lib/lava/dispatcher/tmp/8785150/extract-overlay-ramdisk-ydu1cxu4/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/8785150/tftp-deploy-xrt4btdr/ramdisk/ramdisk.cpio.gz
  212 20:54:33.575238  end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
  213 20:54:33.575375  start: 1.5.8 prepare-kernel (timeout 00:09:40) [common]
  214 20:54:33.575483  start: 1.5.8.1 prepare-fit (timeout 00:09:40) [common]
  215 20:54:33.575589  No mkimage arch provided, not using FIT.
  216 20:54:33.575683  end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
  217 20:54:33.575778  end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
  218 20:54:33.575882  end: 1.5 prepare-tftp-overlay (duration 00:00:13) [common]
  219 20:54:33.575985  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:40) [common]
  220 20:54:33.576068  No LXC device requested
  221 20:54:33.576156  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  222 20:54:33.576255  start: 1.7 deploy-device-env (timeout 00:09:40) [common]
  223 20:54:33.576343  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  224 20:54:33.576434  Checking files for TFTP limit of 4294967296 bytes.
  225 20:54:33.576844  end: 1 tftp-deploy (duration 00:00:20) [common]
  226 20:54:33.576959  start: 2 depthcharge-action (timeout 00:05:00) [common]
  227 20:54:33.577068  start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
  228 20:54:33.577206  substitutions:
  229 20:54:33.577277  - {DTB}: None
  230 20:54:33.577390  - {INITRD}: 8785150/tftp-deploy-xrt4btdr/ramdisk/ramdisk.cpio.gz
  231 20:54:33.577478  - {KERNEL}: 8785150/tftp-deploy-xrt4btdr/kernel/bzImage
  232 20:54:33.577541  - {LAVA_MAC}: None
  233 20:54:33.577601  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/8785150/extract-nfsrootfs-16dt7n7j
  234 20:54:33.577671  - {NFS_SERVER_IP}: 192.168.201.1
  235 20:54:33.577732  - {PRESEED_CONFIG}: None
  236 20:54:33.577791  - {PRESEED_LOCAL}: None
  237 20:54:33.577850  - {RAMDISK}: 8785150/tftp-deploy-xrt4btdr/ramdisk/ramdisk.cpio.gz
  238 20:54:33.577910  - {ROOT_PART}: None
  239 20:54:33.577977  - {ROOT}: None
  240 20:54:33.578035  - {SERVER_IP}: 192.168.201.1
  241 20:54:33.578093  - {TEE}: None
  242 20:54:33.578152  Parsed boot commands:
  243 20:54:33.578209  - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
  244 20:54:33.578385  Parsed boot commands: tftpboot 192.168.201.1 8785150/tftp-deploy-xrt4btdr/kernel/bzImage 8785150/tftp-deploy-xrt4btdr/kernel/cmdline 8785150/tftp-deploy-xrt4btdr/ramdisk/ramdisk.cpio.gz
  245 20:54:33.578486  end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
  246 20:54:33.578589  start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
  247 20:54:33.578686  start: 2.2.1 reset-connection (timeout 00:05:00) [common]
  248 20:54:33.578795  start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
  249 20:54:33.578882  Not connected, no need to disconnect.
  250 20:54:33.578994  end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
  251 20:54:33.579096  start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
  252 20:54:33.579178  [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
  253 20:54:33.581773  Setting prompt string to ['lava-test: # ']
  254 20:54:33.582106  end: 2.2.1.2 connect-device (duration 00:00:00) [common]
  255 20:54:33.582223  end: 2.2.1 reset-connection (duration 00:00:00) [common]
  256 20:54:33.582325  start: 2.2.2 reset-device (timeout 00:05:00) [common]
  257 20:54:33.582431  start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
  258 20:54:33.582628  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
  259 20:54:33.601548  >> Command sent successfully.

  260 20:54:33.603424  Returned 0 in 0 seconds
  261 20:54:33.704212  end: 2.2.2.1 pdu-reboot (duration 00:00:00) [common]
  263 20:54:33.704537  end: 2.2.2 reset-device (duration 00:00:00) [common]
  264 20:54:33.704638  start: 2.2.3 depthcharge-start (timeout 00:05:00) [common]
  265 20:54:33.704724  Setting prompt string to 'Starting depthcharge on Helios...'
  266 20:54:33.704792  Changing prompt to 'Starting depthcharge on Helios...'
  267 20:54:33.704863  depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
  268 20:54:33.705136  [Enter `^Ec?' for help]
  269 20:54:40.476820  
  270 20:54:40.477600  
  271 20:54:40.486335  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  272 20:54:40.490409  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  273 20:54:40.497100  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  274 20:54:40.500506  CPU: AES supported, TXT NOT supported, VT supported
  275 20:54:40.507303  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  276 20:54:40.510319  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  277 20:54:40.517130  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  278 20:54:40.520461  VBOOT: Loading verstage.
  279 20:54:40.523639  FMAP: Found "FLASH" version 1.1 at 0xc04000.
  280 20:54:40.530320  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  281 20:54:40.533519  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  282 20:54:40.536906  CBFS @ c08000 size 3f8000
  283 20:54:40.543414  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  284 20:54:40.546597  CBFS: Locating 'fallback/verstage'
  285 20:54:40.549983  CBFS: Found @ offset 10fb80 size 1072c
  286 20:54:40.553328  
  287 20:54:40.553809  
  288 20:54:40.563239  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  289 20:54:40.577699  Probing TPM: . done!
  290 20:54:40.580962  TPM ready after 0 ms
  291 20:54:40.584364  Connected to device vid:did:rid of 1ae0:0028:00
  292 20:54:40.594918  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
  293 20:54:40.598187  Initialized TPM device CR50 revision 0
  294 20:54:40.636655  tlcl_send_startup: Startup return code is 0
  295 20:54:40.637226  TPM: setup succeeded
  296 20:54:40.649540  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  297 20:54:40.653633  Chrome EC: UHEPI supported
  298 20:54:40.656607  Phase 1
  299 20:54:40.660264  FMAP: area GBB found @ c05000 (12288 bytes)
  300 20:54:40.666666  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
  301 20:54:40.669973  Phase 2
  302 20:54:40.670569  Phase 3
  303 20:54:40.673078  FMAP: area GBB found @ c05000 (12288 bytes)
  304 20:54:40.679453  VB2:vb2_report_dev_firmware() This is developer signed firmware
  305 20:54:40.685956  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  306 20:54:40.689282  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  307 20:54:40.695910  VB2:vb2_verify_keyblock() Checking keyblock signature...
  308 20:54:40.711881  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  309 20:54:40.715172  FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
  310 20:54:40.721561  VB2:vb2_verify_fw_preamble() Verifying preamble.
  311 20:54:40.726238  Phase 4
  312 20:54:40.729600  FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
  313 20:54:40.736118  VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
  314 20:54:40.916166  VB2:vb2_rsa_verify_digest() Digest check failed!
  315 20:54:40.921932  VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
  316 20:54:40.922423  Saving nvdata
  317 20:54:40.925701  Reboot requested (10020007)
  318 20:54:40.928965  board_reset() called!
  319 20:54:40.929488  full_reset() called!
  320 20:54:45.443960  
  321 20:54:45.444742  
  322 20:54:45.453747  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
  323 20:54:45.457081  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
  324 20:54:45.463954  CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
  325 20:54:45.467139  CPU: AES supported, TXT NOT supported, VT supported
  326 20:54:45.473605  MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
  327 20:54:45.477009  PCH: device id 0284 (rev 00) is Cometlake-U Premium
  328 20:54:45.483763  IGD: device id 9b41 (rev 02) is CometLake ULT GT2
  329 20:54:45.486885  VBOOT: Loading verstage.
  330 20:54:45.490312  FMAP: Found "FLASH" version 1.1 at 0xc04000.
  331 20:54:45.496712  FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
  332 20:54:45.503090  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  333 20:54:45.503579  CBFS @ c08000 size 3f8000
  334 20:54:45.509701  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  335 20:54:45.512835  CBFS: Locating 'fallback/verstage'
  336 20:54:45.516221  CBFS: Found @ offset 10fb80 size 1072c
  337 20:54:45.520778  
  338 20:54:45.521269  
  339 20:54:45.530691  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
  340 20:54:45.544900  Probing TPM: . done!
  341 20:54:45.548766  TPM ready after 0 ms
  342 20:54:45.551953  Connected to device vid:did:rid of 1ae0:0028:00
  343 20:54:45.561657  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
  344 20:54:45.565491  Initialized TPM device CR50 revision 0
  345 20:54:45.604347  tlcl_send_startup: Startup return code is 0
  346 20:54:45.604919  TPM: setup succeeded
  347 20:54:45.617143  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
  348 20:54:45.621025  Chrome EC: UHEPI supported
  349 20:54:45.623995  Phase 1
  350 20:54:45.627041  FMAP: area GBB found @ c05000 (12288 bytes)
  351 20:54:45.634271  VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
  352 20:54:45.640141  VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
  353 20:54:45.643578  Recovery requested (1009000e)
  354 20:54:45.649432  Saving nvdata
  355 20:54:45.655362  tlcl_extend: response is 0
  356 20:54:45.664276  tlcl_extend: response is 0
  357 20:54:45.671261  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  358 20:54:45.673896  CBFS @ c08000 size 3f8000
  359 20:54:45.680501  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  360 20:54:45.683824  CBFS: Locating 'fallback/romstage'
  361 20:54:45.687664  CBFS: Found @ offset 80 size 145fc
  362 20:54:45.691058  Accumulated console time in verstage 98 ms
  363 20:54:45.691144  
  364 20:54:45.691212  
  365 20:54:45.704160  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
  366 20:54:45.710604  VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
  367 20:54:45.713997  pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
  368 20:54:45.717258  gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
  369 20:54:45.723182  gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
  370 20:54:45.726494  gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
  371 20:54:45.730376  gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
  372 20:54:45.733662  TCO_STS:   0000 0000
  373 20:54:45.736286  GEN_PMCON: e0015238 00000200
  374 20:54:45.739634  GBLRST_CAUSE: 00000000 00000000
  375 20:54:45.739719  prev_sleep_state 5
  376 20:54:45.743521  Boot Count incremented to 45025
  377 20:54:45.750702  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  378 20:54:45.753962  CBFS @ c08000 size 3f8000
  379 20:54:45.760518  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  380 20:54:45.760601  CBFS: Locating 'fspm.bin'
  381 20:54:45.763747  CBFS: Found @ offset 5ffc0 size 71000
  382 20:54:45.766969  
  383 20:54:45.770296  Chrome EC: UHEPI supported
  384 20:54:45.776972  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
  385 20:54:45.780209  Probing TPM:  done!
  386 20:54:45.787440  Connected to device vid:did:rid of 1ae0:0028:00
  387 20:54:45.797065  Firmware version: B2-C:0 RO_A:0.0.10/29d77172 RW_B:0.3.23/cr50_v1.9308_87_mp.320-aa1dd98
  388 20:54:45.803021  Initialized TPM device CR50 revision 0
  389 20:54:45.812306  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  390 20:54:45.818259  MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
  391 20:54:45.822120  
  392 20:54:45.822193  MRC cache found, size 1948
  393 20:54:45.825288  bootmode is set to: 2
  394 20:54:45.828666  PRMRR disabled by config.
  395 20:54:45.831786  SPD INDEX = 1
  396 20:54:45.835093  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  397 20:54:45.838462  CBFS @ c08000 size 3f8000
  398 20:54:45.845136  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  399 20:54:45.845219  CBFS: Locating 'spd.bin'
  400 20:54:45.848407  CBFS: Found @ offset 5fb80 size 400
  401 20:54:45.851608  SPD: module type is LPDDR3
  402 20:54:45.854800  SPD: module part is 
  403 20:54:45.861340  SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
  404 20:54:45.864757  SPD: device width 4 bits, bus width 8 bits
  405 20:54:45.868015  SPD: module size is 4096 MB (per channel)
  406 20:54:45.871242  memory slot: 0 configuration done.
  407 20:54:45.874504  memory slot: 2 configuration done.
  408 20:54:45.926496  CBMEM:
  409 20:54:45.929865  IMD: root @ 99fff000 254 entries.
  410 20:54:45.933189  IMD: root @ 99ffec00 62 entries.
  411 20:54:45.936469  External stage cache:
  412 20:54:45.939722  IMD: root @ 9abff000 254 entries.
  413 20:54:45.943035  IMD: root @ 9abfec00 62 entries.
  414 20:54:45.949634  Chrome EC: clear events_b mask to 0x0000000020004000
  415 20:54:45.962198  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  416 20:54:45.975779  tlcl_write: response is 0
  417 20:54:45.984919  src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
  418 20:54:45.990895  MRC: TPM MRC hash updated successfully.
  419 20:54:45.990978  2 DIMMs found
  420 20:54:45.994277  SMM Memory Map
  421 20:54:45.997563  SMRAM       : 0x9a000000 0x1000000
  422 20:54:46.000915   Subregion 0: 0x9a000000 0xa00000
  423 20:54:46.004206   Subregion 1: 0x9aa00000 0x200000
  424 20:54:46.007501   Subregion 2: 0x9ac00000 0x400000
  425 20:54:46.011340  top_of_ram = 0x9a000000
  426 20:54:46.014617  MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
  427 20:54:46.021226  MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
  428 20:54:46.024563  MTRR Range: Start=ff000000 End=0 (Size 1000000)
  429 20:54:46.030992  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  430 20:54:46.034304  CBFS @ c08000 size 3f8000
  431 20:54:46.037604  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  432 20:54:46.040927  CBFS: Locating 'fallback/postcar'
  433 20:54:46.047337  CBFS: Found @ offset 107000 size 4b44
  434 20:54:46.053981  Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
  435 20:54:46.063884  Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
  436 20:54:46.066615  Processing 180 relocs. Offset value of 0x97c0c000
  437 20:54:46.075547  Accumulated console time in romstage 286 ms
  438 20:54:46.075632  
  439 20:54:46.075713  
  440 20:54:46.085317  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
  441 20:54:46.091979  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  442 20:54:46.095311  CBFS @ c08000 size 3f8000
  443 20:54:46.098638  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  444 20:54:46.101973  
  445 20:54:46.105204  CBFS: Locating 'fallback/ramstage'
  446 20:54:46.108540  CBFS: Found @ offset 43380 size 1b9e8
  447 20:54:46.114546  Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
  448 20:54:46.147287  Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
  449 20:54:46.150546  Processing 3976 relocs. Offset value of 0x98db0000
  450 20:54:46.157197  Accumulated console time in postcar 52 ms
  451 20:54:46.157284  
  452 20:54:46.157352  
  453 20:54:46.167008  coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
  454 20:54:46.173421  FMAP: area RO_VPD found @ c00000 (16384 bytes)
  455 20:54:46.176605  WARNING: RO_VPD is uninitialized or empty.
  456 20:54:46.179952  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  457 20:54:46.186528  FMAP: area RW_VPD found @ af8000 (8192 bytes)
  458 20:54:46.186613  Normal boot.
  459 20:54:46.193240  BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
  460 20:54:46.196510  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  461 20:54:46.199796  CBFS @ c08000 size 3f8000
  462 20:54:46.206401  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  463 20:54:46.209713  CBFS: Locating 'cpu_microcode_blob.bin'
  464 20:54:46.212984  CBFS: Found @ offset 14700 size 2ec00
  465 20:54:46.216286  microcode: sig=0x806ec pf=0x4 revision=0xc9
  466 20:54:46.219477  
  467 20:54:46.219562  Skip microcode update
  468 20:54:46.226120  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  469 20:54:46.229498  CBFS @ c08000 size 3f8000
  470 20:54:46.232670  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  471 20:54:46.236046  CBFS: Locating 'fsps.bin'
  472 20:54:46.238712  CBFS: Found @ offset d1fc0 size 35000
  473 20:54:46.265446  Detected 4 core, 8 thread CPU.
  474 20:54:46.268619  Setting up SMI for CPU
  475 20:54:46.271984  IED base = 0x9ac00000
  476 20:54:46.272070  IED size = 0x00400000
  477 20:54:46.275201  
  478 20:54:46.275288  Will perform SMM setup.
  479 20:54:46.281768  CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
  480 20:54:46.288263  Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
  481 20:54:46.291507  Processing 16 relocs. Offset value of 0x00030000
  482 20:54:46.294814  
  483 20:54:46.294900  Attempting to start 7 APs
  484 20:54:46.301298  Waiting for 10ms after sending INIT.
  485 20:54:46.315019  Waiting for 1st SIPI to complete...AP: slot 2 apic_id 1.
  486 20:54:46.315108  done.
  487 20:54:46.318355  AP: slot 3 apic_id 2.
  488 20:54:46.321590  AP: slot 6 apic_id 3.
  489 20:54:46.324827  Waiting for 2nd SIPI to complete...done.
  490 20:54:46.328100  AP: slot 1 apic_id 5.
  491 20:54:46.328186  AP: slot 4 apic_id 4.
  492 20:54:46.331358  AP: slot 7 apic_id 7.
  493 20:54:46.334673  AP: slot 5 apic_id 6.
  494 20:54:46.341181  Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
  495 20:54:46.348290  Processing 13 relocs. Offset value of 0x00038000
  496 20:54:46.354874  SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
  497 20:54:46.358166  Installing SMM handler to 0x9a000000
  498 20:54:46.364817  Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
  499 20:54:46.371378  Processing 658 relocs. Offset value of 0x9a010000
  500 20:54:46.377980  Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
  501 20:54:46.381224  Processing 13 relocs. Offset value of 0x9a008000
  502 20:54:46.387810  SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
  503 20:54:46.394414  SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
  504 20:54:46.401013  SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
  505 20:54:46.404217  SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
  506 20:54:46.410968  SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
  507 20:54:46.417584  SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
  508 20:54:46.423955  SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
  509 20:54:46.430555  SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
  510 20:54:46.433838  Clearing SMI status registers
  511 20:54:46.433923  SMI_STS: PM1 
  512 20:54:46.437035  PM1_STS: PWRBTN 
  513 20:54:46.437124  TCO_STS: SECOND_TO 
  514 20:54:46.440372  New SMBASE 0x9a000000
  515 20:54:46.443689  In relocation handler: CPU 0
  516 20:54:46.447013  New SMBASE=0x9a000000 IEDBASE=0x9ac00000
  517 20:54:46.454036  Writing SMRR. base = 0x9a000006, mask=0xff000800
  518 20:54:46.454121  Relocation complete.
  519 20:54:46.456565  New SMBASE 0x99fff800
  520 20:54:46.459970  In relocation handler: CPU 2
  521 20:54:46.463215  New SMBASE=0x99fff800 IEDBASE=0x9ac00000
  522 20:54:46.466551  Writing SMRR. base = 0x9a000006, mask=0xff000800
  523 20:54:46.469799  Relocation complete.
  524 20:54:46.473106  New SMBASE 0x99fff000
  525 20:54:46.476453  In relocation handler: CPU 4
  526 20:54:46.479659  New SMBASE=0x99fff000 IEDBASE=0x9ac00000
  527 20:54:46.482926  Writing SMRR. base = 0x9a000006, mask=0xff000800
  528 20:54:46.486269  Relocation complete.
  529 20:54:46.489609  New SMBASE 0x99fffc00
  530 20:54:46.492933  In relocation handler: CPU 1
  531 20:54:46.496271  New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
  532 20:54:46.499598  Writing SMRR. base = 0x9a000006, mask=0xff000800
  533 20:54:46.502814  Relocation complete.
  534 20:54:46.506183  New SMBASE 0x99ffec00
  535 20:54:46.509558  In relocation handler: CPU 5
  536 20:54:46.512872  New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
  537 20:54:46.516111  Writing SMRR. base = 0x9a000006, mask=0xff000800
  538 20:54:46.519438  Relocation complete.
  539 20:54:46.522696  New SMBASE 0x99ffe400
  540 20:54:46.526015  In relocation handler: CPU 7
  541 20:54:46.529207  New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
  542 20:54:46.532476  Writing SMRR. base = 0x9a000006, mask=0xff000800
  543 20:54:46.535734  Relocation complete.
  544 20:54:46.539059  New SMBASE 0x99fff400
  545 20:54:46.542546  In relocation handler: CPU 3
  546 20:54:46.545828  New SMBASE=0x99fff400 IEDBASE=0x9ac00000
  547 20:54:46.548969  Writing SMRR. base = 0x9a000006, mask=0xff000800
  548 20:54:46.552363  Relocation complete.
  549 20:54:46.555610  New SMBASE 0x99ffe800
  550 20:54:46.558853  In relocation handler: CPU 6
  551 20:54:46.562096  New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
  552 20:54:46.565261  Writing SMRR. base = 0x9a000006, mask=0xff000800
  553 20:54:46.568593  Relocation complete.
  554 20:54:46.571793  Initializing CPU #0
  555 20:54:46.575110  CPU: vendor Intel device 806ec
  556 20:54:46.578344  CPU: family 06, model 8e, stepping 0c
  557 20:54:46.582197  Clearing out pending MCEs
  558 20:54:46.582282  Setting up local APIC...
  559 20:54:46.585446   apic_id: 0x00 done.
  560 20:54:46.588715  Turbo is available but hidden
  561 20:54:46.591903  Turbo is available and visible
  562 20:54:46.591989  VMX status: enabled
  563 20:54:46.595171  
  564 20:54:46.598326  IA32_FEATURE_CONTROL status: locked
  565 20:54:46.598410  Skip microcode update
  566 20:54:46.601655  CPU #0 initialized
  567 20:54:46.604928  Initializing CPU #2
  568 20:54:46.605013  Initializing CPU #7
  569 20:54:46.608095  Initializing CPU #5
  570 20:54:46.608180  Initializing CPU #3
  571 20:54:46.611413  Initializing CPU #6
  572 20:54:46.614659  CPU: vendor Intel device 806ec
  573 20:54:46.617945  CPU: family 06, model 8e, stepping 0c
  574 20:54:46.621243  CPU: vendor Intel device 806ec
  575 20:54:46.624530  CPU: family 06, model 8e, stepping 0c
  576 20:54:46.628409  Clearing out pending MCEs
  577 20:54:46.631054  Clearing out pending MCEs
  578 20:54:46.634375  Setting up local APIC...
  579 20:54:46.638321  CPU: vendor Intel device 806ec
  580 20:54:46.641578  CPU: family 06, model 8e, stepping 0c
  581 20:54:46.644893  CPU: vendor Intel device 806ec
  582 20:54:46.647653  CPU: family 06, model 8e, stepping 0c
  583 20:54:46.650858  Clearing out pending MCEs
  584 20:54:46.650943  Clearing out pending MCEs
  585 20:54:46.654764  Setting up local APIC...
  586 20:54:46.658054  Setting up local APIC...
  587 20:54:46.661301  Setting up local APIC...
  588 20:54:46.664615  CPU: vendor Intel device 806ec
  589 20:54:46.668044  CPU: family 06, model 8e, stepping 0c
  590 20:54:46.671335  Clearing out pending MCEs
  591 20:54:46.671420   apic_id: 0x03 done.
  592 20:54:46.674534   apic_id: 0x02 done.
  593 20:54:46.674619  VMX status: enabled
  594 20:54:46.677258  VMX status: enabled
  595 20:54:46.680592  IA32_FEATURE_CONTROL status: locked
  596 20:54:46.684416  IA32_FEATURE_CONTROL status: locked
  597 20:54:46.687627  Skip microcode update
  598 20:54:46.690873  Skip microcode update
  599 20:54:46.690958  CPU #6 initialized
  600 20:54:46.694179  CPU #3 initialized
  601 20:54:46.694265  Initializing CPU #4
  602 20:54:46.697516   apic_id: 0x07 done.
  603 20:54:46.700837   apic_id: 0x06 done.
  604 20:54:46.700922  VMX status: enabled
  605 20:54:46.703585  VMX status: enabled
  606 20:54:46.707470  IA32_FEATURE_CONTROL status: locked
  607 20:54:46.710155  IA32_FEATURE_CONTROL status: locked
  608 20:54:46.713536  Skip microcode update
  609 20:54:46.717453  Skip microcode update
  610 20:54:46.717537  Setting up local APIC...
  611 20:54:46.720056  CPU #5 initialized
  612 20:54:46.720141  CPU #7 initialized
  613 20:54:46.724010  
  614 20:54:46.724097   apic_id: 0x01 done.
  615 20:54:46.727156  Initializing CPU #1
  616 20:54:46.730459  CPU: vendor Intel device 806ec
  617 20:54:46.733708  CPU: family 06, model 8e, stepping 0c
  618 20:54:46.737069  CPU: vendor Intel device 806ec
  619 20:54:46.740353  CPU: family 06, model 8e, stepping 0c
  620 20:54:46.743643  Clearing out pending MCEs
  621 20:54:46.747024  Clearing out pending MCEs
  622 20:54:46.747123  Setting up local APIC...
  623 20:54:46.749725  VMX status: enabled
  624 20:54:46.753008  Setting up local APIC...
  625 20:54:46.756327  IA32_FEATURE_CONTROL status: locked
  626 20:54:46.756412   apic_id: 0x05 done.
  627 20:54:46.759579   apic_id: 0x04 done.
  628 20:54:46.762891  VMX status: enabled
  629 20:54:46.762976  VMX status: enabled
  630 20:54:46.766182  IA32_FEATURE_CONTROL status: locked
  631 20:54:46.772805  IA32_FEATURE_CONTROL status: locked
  632 20:54:46.772890  Skip microcode update
  633 20:54:46.776207  Skip microcode update
  634 20:54:46.776293  CPU #1 initialized
  635 20:54:46.779380  CPU #4 initialized
  636 20:54:46.783389  Skip microcode update
  637 20:54:46.783475  CPU #2 initialized
  638 20:54:46.789683  bsp_do_flight_plan done after 461 msecs.
  639 20:54:46.792988  CPU: frequency set to 4200 MHz
  640 20:54:46.793073  Enabling SMIs.
  641 20:54:46.796327  Locking SMM.
  642 20:54:46.809584  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
  643 20:54:46.812832  CBFS @ c08000 size 3f8000
  644 20:54:46.819387  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
  645 20:54:46.819473  CBFS: Locating 'vbt.bin'
  646 20:54:46.825846  CBFS: Found @ offset 5f5c0 size 499
  647 20:54:46.829101  Found a VBT of 4608 bytes after decompression
  648 20:54:47.013573  Display FSP Version Info HOB
  649 20:54:47.016766  Reference Code - CPU = 9.0.1e.30
  650 20:54:47.020095  uCode Version = 0.0.0.ca
  651 20:54:47.023441  TXT ACM version = ff.ff.ff.ffff
  652 20:54:47.026713  Display FSP Version Info HOB
  653 20:54:47.029899  Reference Code - ME = 9.0.1e.30
  654 20:54:47.033248  MEBx version = 0.0.0.0
  655 20:54:47.036561  ME Firmware Version = Consumer SKU
  656 20:54:47.039809  Display FSP Version Info HOB
  657 20:54:47.043148  Reference Code - CML PCH = 9.0.1e.30
  658 20:54:47.046553  PCH-CRID Status = Disabled
  659 20:54:47.049788  PCH-CRID Original Value = ff.ff.ff.ffff
  660 20:54:47.053036  PCH-CRID New Value = ff.ff.ff.ffff
  661 20:54:47.056310  OPROM - RST - RAID = ff.ff.ff.ffff
  662 20:54:47.059575  ChipsetInit Base Version = ff.ff.ff.ffff
  663 20:54:47.062904  ChipsetInit Oem Version = ff.ff.ff.ffff
  664 20:54:47.066180  Display FSP Version Info HOB
  665 20:54:47.072720  Reference Code - SA - System Agent = 9.0.1e.30
  666 20:54:47.075966  Reference Code - MRC = 0.7.1.6c
  667 20:54:47.079286  SA - PCIe Version = 9.0.1e.30
  668 20:54:47.079372  SA-CRID Status = Disabled
  669 20:54:47.082497  SA-CRID Original Value = 0.0.0.c
  670 20:54:47.085829  
  671 20:54:47.085915  SA-CRID New Value = 0.0.0.c
  672 20:54:47.089238  OPROM - VBIOS = ff.ff.ff.ffff
  673 20:54:47.092484  RTC Init
  674 20:54:47.095859  Set power on after power failure.
  675 20:54:47.096040  Disabling Deep S3
  676 20:54:47.099119  Disabling Deep S3
  677 20:54:47.102174  Disabling Deep S4
  678 20:54:47.102359  Disabling Deep S4
  679 20:54:47.105500  Disabling Deep S5
  680 20:54:47.105677  Disabling Deep S5
  681 20:54:47.112200  BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 195 exit 1
  682 20:54:47.115382  Enumerating buses...
  683 20:54:47.118642  Show all devs... Before device enumeration.
  684 20:54:47.121975  Root Device: enabled 1
  685 20:54:47.125691  CPU_CLUSTER: 0: enabled 1
  686 20:54:47.126219  DOMAIN: 0000: enabled 1
  687 20:54:47.128993  APIC: 00: enabled 1
  688 20:54:47.132039  PCI: 00:00.0: enabled 1
  689 20:54:47.132526  PCI: 00:02.0: enabled 1
  690 20:54:47.135303  PCI: 00:04.0: enabled 0
  691 20:54:47.138698  PCI: 00:05.0: enabled 0
  692 20:54:47.141727  PCI: 00:12.0: enabled 1
  693 20:54:47.142212  PCI: 00:12.5: enabled 0
  694 20:54:47.145025  PCI: 00:12.6: enabled 0
  695 20:54:47.148326  PCI: 00:14.0: enabled 1
  696 20:54:47.151650  PCI: 00:14.1: enabled 0
  697 20:54:47.152144  PCI: 00:14.3: enabled 1
  698 20:54:47.154919  PCI: 00:14.5: enabled 0
  699 20:54:47.158241  PCI: 00:15.0: enabled 1
  700 20:54:47.161520  PCI: 00:15.1: enabled 1
  701 20:54:47.161966  PCI: 00:15.2: enabled 0
  702 20:54:47.164975  PCI: 00:15.3: enabled 0
  703 20:54:47.168020  PCI: 00:16.0: enabled 1
  704 20:54:47.171450  PCI: 00:16.1: enabled 0
  705 20:54:47.172038  PCI: 00:16.2: enabled 0
  706 20:54:47.174554  PCI: 00:16.3: enabled 0
  707 20:54:47.177725  PCI: 00:16.4: enabled 0
  708 20:54:47.181105  PCI: 00:16.5: enabled 0
  709 20:54:47.181614  PCI: 00:17.0: enabled 1
  710 20:54:47.184671  PCI: 00:19.0: enabled 1
  711 20:54:47.187688  PCI: 00:19.1: enabled 0
  712 20:54:47.191092  PCI: 00:19.2: enabled 0
  713 20:54:47.191684  PCI: 00:1a.0: enabled 0
  714 20:54:47.194192  PCI: 00:1c.0: enabled 0
  715 20:54:47.197486  PCI: 00:1c.1: enabled 0
  716 20:54:47.197973  PCI: 00:1c.2: enabled 0
  717 20:54:47.200835  
  718 20:54:47.201319  PCI: 00:1c.3: enabled 0
  719 20:54:47.204441  PCI: 00:1c.4: enabled 0
  720 20:54:47.207405  PCI: 00:1c.5: enabled 0
  721 20:54:47.207892  PCI: 00:1c.6: enabled 0
  722 20:54:47.210760  
  723 20:54:47.211246  PCI: 00:1c.7: enabled 0
  724 20:54:47.214383  PCI: 00:1d.0: enabled 1
  725 20:54:47.217505  PCI: 00:1d.1: enabled 0
  726 20:54:47.217992  PCI: 00:1d.2: enabled 0
  727 20:54:47.220557  PCI: 00:1d.3: enabled 0
  728 20:54:47.223922  PCI: 00:1d.4: enabled 0
  729 20:54:47.227493  PCI: 00:1d.5: enabled 1
  730 20:54:47.228130  PCI: 00:1e.0: enabled 1
  731 20:54:47.230768  PCI: 00:1e.1: enabled 0
  732 20:54:47.233787  PCI: 00:1e.2: enabled 1
  733 20:54:47.237003  PCI: 00:1e.3: enabled 1
  734 20:54:47.237529  PCI: 00:1f.0: enabled 1
  735 20:54:47.240209  PCI: 00:1f.1: enabled 1
  736 20:54:47.243804  PCI: 00:1f.2: enabled 1
  737 20:54:47.246886  PCI: 00:1f.3: enabled 1
  738 20:54:47.247394  PCI: 00:1f.4: enabled 1
  739 20:54:47.250226  PCI: 00:1f.5: enabled 1
  740 20:54:47.252901  PCI: 00:1f.6: enabled 0
  741 20:54:47.256250  USB0 port 0: enabled 1
  742 20:54:47.256837  I2C: 00:15: enabled 1
  743 20:54:47.259589  I2C: 00:5d: enabled 1
  744 20:54:47.262786  GENERIC: 0.0: enabled 1
  745 20:54:47.263377  I2C: 00:1a: enabled 1
  746 20:54:47.266148  I2C: 00:38: enabled 1
  747 20:54:47.269608  I2C: 00:39: enabled 1
  748 20:54:47.270197  I2C: 00:3a: enabled 1
  749 20:54:47.272757  I2C: 00:3b: enabled 1
  750 20:54:47.275847  PCI: 00:00.0: enabled 1
  751 20:54:47.276334  SPI: 00: enabled 1
  752 20:54:47.279079  SPI: 01: enabled 1
  753 20:54:47.282547  PNP: 0c09.0: enabled 1
  754 20:54:47.283151  USB2 port 0: enabled 1
  755 20:54:47.285467  USB2 port 1: enabled 1
  756 20:54:47.288845  USB2 port 2: enabled 0
  757 20:54:47.292272  USB2 port 3: enabled 0
  758 20:54:47.292857  USB2 port 5: enabled 0
  759 20:54:47.295607  USB2 port 6: enabled 1
  760 20:54:47.298747  USB2 port 9: enabled 1
  761 20:54:47.299238  USB3 port 0: enabled 1
  762 20:54:47.302600  USB3 port 1: enabled 1
  763 20:54:47.305281  USB3 port 2: enabled 1
  764 20:54:47.308593  USB3 port 3: enabled 1
  765 20:54:47.309082  USB3 port 4: enabled 0
  766 20:54:47.311894  APIC: 05: enabled 1
  767 20:54:47.314989  APIC: 01: enabled 1
  768 20:54:47.315479  APIC: 02: enabled 1
  769 20:54:47.318380  APIC: 04: enabled 1
  770 20:54:47.318869  APIC: 06: enabled 1
  771 20:54:47.321536  APIC: 03: enabled 1
  772 20:54:47.324797  APIC: 07: enabled 1
  773 20:54:47.325285  Compare with tree...
  774 20:54:47.328351  Root Device: enabled 1
  775 20:54:47.331413   CPU_CLUSTER: 0: enabled 1
  776 20:54:47.334815    APIC: 00: enabled 1
  777 20:54:47.335326    APIC: 05: enabled 1
  778 20:54:47.338093    APIC: 01: enabled 1
  779 20:54:47.341357    APIC: 02: enabled 1
  780 20:54:47.341878    APIC: 04: enabled 1
  781 20:54:47.344559    APIC: 06: enabled 1
  782 20:54:47.348005    APIC: 03: enabled 1
  783 20:54:47.348496    APIC: 07: enabled 1
  784 20:54:47.351197   DOMAIN: 0000: enabled 1
  785 20:54:47.354533    PCI: 00:00.0: enabled 1
  786 20:54:47.357625    PCI: 00:02.0: enabled 1
  787 20:54:47.360966    PCI: 00:04.0: enabled 0
  788 20:54:47.361480    PCI: 00:05.0: enabled 0
  789 20:54:47.364499    PCI: 00:12.0: enabled 1
  790 20:54:47.367712    PCI: 00:12.5: enabled 0
  791 20:54:47.371145    PCI: 00:12.6: enabled 0
  792 20:54:47.374333    PCI: 00:14.0: enabled 1
  793 20:54:47.374837     USB0 port 0: enabled 1
  794 20:54:47.377643      USB2 port 0: enabled 1
  795 20:54:47.380895      USB2 port 1: enabled 1
  796 20:54:47.384152      USB2 port 2: enabled 0
  797 20:54:47.387492      USB2 port 3: enabled 0
  798 20:54:47.387946      USB2 port 5: enabled 0
  799 20:54:47.390790      USB2 port 6: enabled 1
  800 20:54:47.394285      USB2 port 9: enabled 1
  801 20:54:47.397669      USB3 port 0: enabled 1
  802 20:54:47.400793      USB3 port 1: enabled 1
  803 20:54:47.403887      USB3 port 2: enabled 1
  804 20:54:47.404333      USB3 port 3: enabled 1
  805 20:54:47.407197      USB3 port 4: enabled 0
  806 20:54:47.410307    PCI: 00:14.1: enabled 0
  807 20:54:47.413739    PCI: 00:14.3: enabled 1
  808 20:54:47.416955    PCI: 00:14.5: enabled 0
  809 20:54:47.417420    PCI: 00:15.0: enabled 1
  810 20:54:47.420546  
  811 20:54:47.421098     I2C: 00:15: enabled 1
  812 20:54:47.423743    PCI: 00:15.1: enabled 1
  813 20:54:47.426748     I2C: 00:5d: enabled 1
  814 20:54:47.430154     GENERIC: 0.0: enabled 1
  815 20:54:47.430709    PCI: 00:15.2: enabled 0
  816 20:54:47.433615  
  817 20:54:47.434158    PCI: 00:15.3: enabled 0
  818 20:54:47.436833    PCI: 00:16.0: enabled 1
  819 20:54:47.439450    PCI: 00:16.1: enabled 0
  820 20:54:47.443272    PCI: 00:16.2: enabled 0
  821 20:54:47.443714    PCI: 00:16.3: enabled 0
  822 20:54:47.446481    PCI: 00:16.4: enabled 0
  823 20:54:47.449841    PCI: 00:16.5: enabled 0
  824 20:54:47.453070    PCI: 00:17.0: enabled 1
  825 20:54:47.456354    PCI: 00:19.0: enabled 1
  826 20:54:47.456893     I2C: 00:1a: enabled 1
  827 20:54:47.459618     I2C: 00:38: enabled 1
  828 20:54:47.462932     I2C: 00:39: enabled 1
  829 20:54:47.466126     I2C: 00:3a: enabled 1
  830 20:54:47.469481     I2C: 00:3b: enabled 1
  831 20:54:47.469971    PCI: 00:19.1: enabled 0
  832 20:54:47.472716    PCI: 00:19.2: enabled 0
  833 20:54:47.476182    PCI: 00:1a.0: enabled 0
  834 20:54:47.479259    PCI: 00:1c.0: enabled 0
  835 20:54:47.482766    PCI: 00:1c.1: enabled 0
  836 20:54:47.483381    PCI: 00:1c.2: enabled 0
  837 20:54:47.486020    PCI: 00:1c.3: enabled 0
  838 20:54:47.489203    PCI: 00:1c.4: enabled 0
  839 20:54:47.492375    PCI: 00:1c.5: enabled 0
  840 20:54:47.495963    PCI: 00:1c.6: enabled 0
  841 20:54:47.496587    PCI: 00:1c.7: enabled 0
  842 20:54:47.499104    PCI: 00:1d.0: enabled 1
  843 20:54:47.502280    PCI: 00:1d.1: enabled 0
  844 20:54:47.505338    PCI: 00:1d.2: enabled 0
  845 20:54:47.508953    PCI: 00:1d.3: enabled 0
  846 20:54:47.509607    PCI: 00:1d.4: enabled 0
  847 20:54:47.512035    PCI: 00:1d.5: enabled 1
  848 20:54:47.515390     PCI: 00:00.0: enabled 1
  849 20:54:47.518796    PCI: 00:1e.0: enabled 1
  850 20:54:47.522070    PCI: 00:1e.1: enabled 0
  851 20:54:47.522562    PCI: 00:1e.2: enabled 1
  852 20:54:47.525473     SPI: 00: enabled 1
  853 20:54:47.528832    PCI: 00:1e.3: enabled 1
  854 20:54:47.529454     SPI: 01: enabled 1
  855 20:54:47.532220  
  856 20:54:47.532819    PCI: 00:1f.0: enabled 1
  857 20:54:47.535522     PNP: 0c09.0: enabled 1
  858 20:54:47.538595    PCI: 00:1f.1: enabled 1
  859 20:54:47.541854    PCI: 00:1f.2: enabled 1
  860 20:54:47.542447    PCI: 00:1f.3: enabled 1
  861 20:54:47.545018  
  862 20:54:47.545536    PCI: 00:1f.4: enabled 1
  863 20:54:47.548311    PCI: 00:1f.5: enabled 1
  864 20:54:47.551612    PCI: 00:1f.6: enabled 0
  865 20:54:47.554878  Root Device scanning...
  866 20:54:47.558207  scan_static_bus for Root Device
  867 20:54:47.558705  CPU_CLUSTER: 0 enabled
  868 20:54:47.561543  DOMAIN: 0000 enabled
  869 20:54:47.564166  DOMAIN: 0000 scanning...
  870 20:54:47.567497  PCI: pci_scan_bus for bus 00
  871 20:54:47.570813  PCI: 00:00.0 [8086/0000] ops
  872 20:54:47.574112  PCI: 00:00.0 [8086/9b61] enabled
  873 20:54:47.577492  PCI: 00:02.0 [8086/0000] bus ops
  874 20:54:47.580707  PCI: 00:02.0 [8086/9b41] enabled
  875 20:54:47.584258  PCI: 00:04.0 [8086/1903] disabled
  876 20:54:47.587327  PCI: 00:08.0 [8086/1911] enabled
  877 20:54:47.590447  PCI: 00:12.0 [8086/02f9] enabled
  878 20:54:47.593670  PCI: 00:14.0 [8086/0000] bus ops
  879 20:54:47.597206  PCI: 00:14.0 [8086/02ed] enabled
  880 20:54:47.600439  PCI: 00:14.2 [8086/02ef] enabled
  881 20:54:47.603606  PCI: 00:14.3 [8086/02f0] enabled
  882 20:54:47.606746  PCI: 00:15.0 [8086/0000] bus ops
  883 20:54:47.609875  PCI: 00:15.0 [8086/02e8] enabled
  884 20:54:47.614024  PCI: 00:15.1 [8086/0000] bus ops
  885 20:54:47.617068  PCI: 00:15.1 [8086/02e9] enabled
  886 20:54:47.620001  PCI: 00:16.0 [8086/0000] ops
  887 20:54:47.623339  PCI: 00:16.0 [8086/02e0] enabled
  888 20:54:47.626467  PCI: 00:17.0 [8086/0000] ops
  889 20:54:47.629919  PCI: 00:17.0 [8086/02d3] enabled
  890 20:54:47.633053  PCI: 00:19.0 [8086/0000] bus ops
  891 20:54:47.636423  PCI: 00:19.0 [8086/02c5] enabled
  892 20:54:47.639531  PCI: 00:1d.0 [8086/0000] bus ops
  893 20:54:47.642643  PCI: 00:1d.0 [8086/02b0] enabled
  894 20:54:47.649221  PCI: Static device PCI: 00:1d.5 not found, disabling it.
  895 20:54:47.653214  PCI: 00:1e.0 [8086/0000] ops
  896 20:54:47.655904  PCI: 00:1e.0 [8086/02a8] enabled
  897 20:54:47.659465  PCI: 00:1e.2 [8086/0000] bus ops
  898 20:54:47.662639  PCI: 00:1e.2 [8086/02aa] enabled
  899 20:54:47.665737  PCI: 00:1e.3 [8086/0000] bus ops
  900 20:54:47.669303  PCI: 00:1e.3 [8086/02ab] enabled
  901 20:54:47.672405  PCI: 00:1f.0 [8086/0000] bus ops
  902 20:54:47.675969  PCI: 00:1f.0 [8086/0284] enabled
  903 20:54:47.679137  PCI: Static device PCI: 00:1f.1 not found, disabling it.
  904 20:54:47.685832  PCI: Static device PCI: 00:1f.2 not found, disabling it.
  905 20:54:47.689000  PCI: 00:1f.3 [8086/0000] bus ops
  906 20:54:47.692600  PCI: 00:1f.3 [8086/02c8] enabled
  907 20:54:47.695631  PCI: 00:1f.4 [8086/0000] bus ops
  908 20:54:47.698794  PCI: 00:1f.4 [8086/02a3] enabled
  909 20:54:47.702331  PCI: 00:1f.5 [8086/0000] bus ops
  910 20:54:47.704893  PCI: 00:1f.5 [8086/02a4] enabled
  911 20:54:47.708102  PCI: Leftover static devices:
  912 20:54:47.712204  PCI: 00:05.0
  913 20:54:47.712827  PCI: 00:12.5
  914 20:54:47.713225  PCI: 00:12.6
  915 20:54:47.715194  PCI: 00:14.1
  916 20:54:47.715676  PCI: 00:14.5
  917 20:54:47.718562  PCI: 00:15.2
  918 20:54:47.719046  PCI: 00:15.3
  919 20:54:47.719429  PCI: 00:16.1
  920 20:54:47.721499  PCI: 00:16.2
  921 20:54:47.722088  PCI: 00:16.3
  922 20:54:47.724907  PCI: 00:16.4
  923 20:54:47.725522  PCI: 00:16.5
  924 20:54:47.727928  PCI: 00:19.1
  925 20:54:47.728415  PCI: 00:19.2
  926 20:54:47.728799  PCI: 00:1a.0
  927 20:54:47.731228  PCI: 00:1c.0
  928 20:54:47.731713  PCI: 00:1c.1
  929 20:54:47.734494  PCI: 00:1c.2
  930 20:54:47.734981  PCI: 00:1c.3
  931 20:54:47.735365  PCI: 00:1c.4
  932 20:54:47.737662  
  933 20:54:47.738149  PCI: 00:1c.5
  934 20:54:47.738536  PCI: 00:1c.6
  935 20:54:47.741242  PCI: 00:1c.7
  936 20:54:47.741826  PCI: 00:1d.1
  937 20:54:47.744685  PCI: 00:1d.2
  938 20:54:47.745167  PCI: 00:1d.3
  939 20:54:47.745596  PCI: 00:1d.4
  940 20:54:47.747832  PCI: 00:1d.5
  941 20:54:47.748319  PCI: 00:1e.1
  942 20:54:47.750326  PCI: 00:1f.1
  943 20:54:47.750862  PCI: 00:1f.2
  944 20:54:47.754247  PCI: 00:1f.6
  945 20:54:47.754759  PCI: Check your devicetree.cb.
  946 20:54:47.757581  PCI: 00:02.0 scanning...
  947 20:54:47.760388  scan_generic_bus for PCI: 00:02.0
  948 20:54:47.766984  scan_generic_bus for PCI: 00:02.0 done
  949 20:54:47.770378  scan_bus: scanning of bus PCI: 00:02.0 took 10185 usecs
  950 20:54:47.774137  PCI: 00:14.0 scanning...
  951 20:54:47.777526  scan_static_bus for PCI: 00:14.0
  952 20:54:47.779980  USB0 port 0 enabled
  953 20:54:47.783334  USB0 port 0 scanning...
  954 20:54:47.786898  scan_static_bus for USB0 port 0
  955 20:54:47.787494  USB2 port 0 enabled
  956 20:54:47.790065  USB2 port 1 enabled
  957 20:54:47.793314  USB2 port 2 disabled
  958 20:54:47.793837  USB2 port 3 disabled
  959 20:54:47.797027  USB2 port 5 disabled
  960 20:54:47.797643  USB2 port 6 enabled
  961 20:54:47.799996  USB2 port 9 enabled
  962 20:54:47.803378  USB3 port 0 enabled
  963 20:54:47.803968  USB3 port 1 enabled
  964 20:54:47.806411  USB3 port 2 enabled
  965 20:54:47.809610  USB3 port 3 enabled
  966 20:54:47.810117  USB3 port 4 disabled
  967 20:54:47.812763  USB2 port 0 scanning...
  968 20:54:47.815990  scan_static_bus for USB2 port 0
  969 20:54:47.819308  scan_static_bus for USB2 port 0 done
  970 20:54:47.826127  scan_bus: scanning of bus USB2 port 0 took 9708 usecs
  971 20:54:47.828759  USB2 port 1 scanning...
  972 20:54:47.832663  scan_static_bus for USB2 port 1
  973 20:54:47.835873  scan_static_bus for USB2 port 1 done
  974 20:54:47.839104  scan_bus: scanning of bus USB2 port 1 took 9709 usecs
  975 20:54:47.842392  USB2 port 6 scanning...
  976 20:54:47.845700  scan_static_bus for USB2 port 6
  977 20:54:47.848899  scan_static_bus for USB2 port 6 done
  978 20:54:47.855365  scan_bus: scanning of bus USB2 port 6 took 9702 usecs
  979 20:54:47.858789  USB2 port 9 scanning...
  980 20:54:47.861454  scan_static_bus for USB2 port 9
  981 20:54:47.864791  scan_static_bus for USB2 port 9 done
  982 20:54:47.871487  scan_bus: scanning of bus USB2 port 9 took 9708 usecs
  983 20:54:47.872051  USB3 port 0 scanning...
  984 20:54:47.874728  scan_static_bus for USB3 port 0
  985 20:54:47.881158  scan_static_bus for USB3 port 0 done
  986 20:54:47.884876  scan_bus: scanning of bus USB3 port 0 took 9708 usecs
  987 20:54:47.887753  USB3 port 1 scanning...
  988 20:54:47.891013  scan_static_bus for USB3 port 1
  989 20:54:47.894360  scan_static_bus for USB3 port 1 done
  990 20:54:47.900971  scan_bus: scanning of bus USB3 port 1 took 9707 usecs
  991 20:54:47.904155  USB3 port 2 scanning...
  992 20:54:47.907447  scan_static_bus for USB3 port 2
  993 20:54:47.910705  scan_static_bus for USB3 port 2 done
  994 20:54:47.913883  scan_bus: scanning of bus USB3 port 2 took 9700 usecs
  995 20:54:47.917313  USB3 port 3 scanning...
  996 20:54:47.920433  scan_static_bus for USB3 port 3
  997 20:54:47.923864  scan_static_bus for USB3 port 3 done
  998 20:54:47.930327  scan_bus: scanning of bus USB3 port 3 took 9709 usecs
  999 20:54:47.933593  scan_static_bus for USB0 port 0 done
 1000 20:54:47.939987  scan_bus: scanning of bus USB0 port 0 took 155426 usecs
 1001 20:54:47.943329  scan_static_bus for PCI: 00:14.0 done
 1002 20:54:47.949838  scan_bus: scanning of bus PCI: 00:14.0 took 173040 usecs
 1003 20:54:47.950597  PCI: 00:15.0 scanning...
 1004 20:54:47.952986  
 1005 20:54:47.956440  scan_generic_bus for PCI: 00:15.0
 1006 20:54:47.959732  bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
 1007 20:54:47.962989  scan_generic_bus for PCI: 00:15.0 done
 1008 20:54:47.969833  scan_bus: scanning of bus PCI: 00:15.0 took 14311 usecs
 1009 20:54:47.972878  PCI: 00:15.1 scanning...
 1010 20:54:47.976359  scan_generic_bus for PCI: 00:15.1
 1011 20:54:47.979482  bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
 1012 20:54:47.982728  bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
 1013 20:54:47.986202  scan_generic_bus for PCI: 00:15.1 done
 1014 20:54:47.992771  scan_bus: scanning of bus PCI: 00:15.1 took 18624 usecs
 1015 20:54:47.995823  PCI: 00:19.0 scanning...
 1016 20:54:47.999094  scan_generic_bus for PCI: 00:19.0
 1017 20:54:48.002378  bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
 1018 20:54:48.009123  bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
 1019 20:54:48.012107  bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
 1020 20:54:48.015163  bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
 1021 20:54:48.018226  bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
 1022 20:54:48.021694  scan_generic_bus for PCI: 00:19.0 done
 1023 20:54:48.025043  
 1024 20:54:48.028538  scan_bus: scanning of bus PCI: 00:19.0 took 30741 usecs
 1025 20:54:48.031568  PCI: 00:1d.0 scanning...
 1026 20:54:48.034813  do_pci_scan_bridge for PCI: 00:1d.0
 1027 20:54:48.038127  PCI: pci_scan_bus for bus 01
 1028 20:54:48.041829  PCI: 01:00.0 [1c5c/1327] enabled
 1029 20:54:48.044840  Enabling Common Clock Configuration
 1030 20:54:48.051508  L1 Sub-State supported from root port 29
 1031 20:54:48.052005  L1 Sub-State Support = 0xf
 1032 20:54:48.054493  CommonModeRestoreTime = 0x28
 1033 20:54:48.061260  Power On Value = 0x16, Power On Scale = 0x0
 1034 20:54:48.061898  ASPM: Enabled L1
 1035 20:54:48.067717  scan_bus: scanning of bus PCI: 00:1d.0 took 32802 usecs
 1036 20:54:48.071250  PCI: 00:1e.2 scanning...
 1037 20:54:48.074670  scan_generic_bus for PCI: 00:1e.2
 1038 20:54:48.077617  bus: PCI: 00:1e.2[0]->SPI: 00 enabled
 1039 20:54:48.080929  scan_generic_bus for PCI: 00:1e.2 done
 1040 20:54:48.087801  scan_bus: scanning of bus PCI: 00:1e.2 took 14018 usecs
 1041 20:54:48.090838  PCI: 00:1e.3 scanning...
 1042 20:54:48.094218  scan_generic_bus for PCI: 00:1e.3
 1043 20:54:48.097650  bus: PCI: 00:1e.3[0]->SPI: 01 enabled
 1044 20:54:48.100701  scan_generic_bus for PCI: 00:1e.3 done
 1045 20:54:48.106751  scan_bus: scanning of bus PCI: 00:1e.3 took 14007 usecs
 1046 20:54:48.109897  PCI: 00:1f.0 scanning...
 1047 20:54:48.113118  scan_static_bus for PCI: 00:1f.0
 1048 20:54:48.113635  PNP: 0c09.0 enabled
 1049 20:54:48.116482  scan_static_bus for PCI: 00:1f.0 done
 1050 20:54:48.123161  scan_bus: scanning of bus PCI: 00:1f.0 took 12055 usecs
 1051 20:54:48.126353  PCI: 00:1f.3 scanning...
 1052 20:54:48.133335  scan_bus: scanning of bus PCI: 00:1f.3 took 2861 usecs
 1053 20:54:48.133983  PCI: 00:1f.4 scanning...
 1054 20:54:48.139782  scan_generic_bus for PCI: 00:1f.4
 1055 20:54:48.142916  scan_generic_bus for PCI: 00:1f.4 done
 1056 20:54:48.146275  scan_bus: scanning of bus PCI: 00:1f.4 took 10187 usecs
 1057 20:54:48.149629  PCI: 00:1f.5 scanning...
 1058 20:54:48.152963  scan_generic_bus for PCI: 00:1f.5
 1059 20:54:48.159431  scan_generic_bus for PCI: 00:1f.5 done
 1060 20:54:48.162718  scan_bus: scanning of bus PCI: 00:1f.5 took 10185 usecs
 1061 20:54:48.169344  scan_bus: scanning of bus DOMAIN: 0000 took 605093 usecs
 1062 20:54:48.172933  scan_static_bus for Root Device done
 1063 20:54:48.178752  scan_bus: scanning of bus Root Device took 624962 usecs
 1064 20:54:48.179289  done
 1065 20:54:48.182040  Chrome EC: UHEPI supported
 1066 20:54:48.188429  FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
 1067 20:54:48.195237  MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
 1068 20:54:48.198625  SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
 1069 20:54:48.202007  
 1070 20:54:48.208430  FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
 1071 20:54:48.211947  SPI flash protection: WPSW=0 SRP0=1
 1072 20:54:48.214949  MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
 1073 20:54:48.221519  BS: BS_DEV_ENUMERATE times (ms): entry 0 run 9 exit 2
 1074 20:54:48.224602  found VGA at PCI: 00:02.0
 1075 20:54:48.228106  Setting up VGA for PCI: 00:02.0
 1076 20:54:48.231197  Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
 1077 20:54:48.237782  Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
 1078 20:54:48.238250  Allocating resources...
 1079 20:54:48.241206  Reading resources...
 1080 20:54:48.244495  Root Device read_resources bus 0 link: 0
 1081 20:54:48.251093  CPU_CLUSTER: 0 read_resources bus 0 link: 0
 1082 20:54:48.254335  CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
 1083 20:54:48.260928  DOMAIN: 0000 read_resources bus 0 link: 0
 1084 20:54:48.267535  PCI: 00:14.0 read_resources bus 0 link: 0
 1085 20:54:48.270790  USB0 port 0 read_resources bus 0 link: 0
 1086 20:54:48.278162  USB0 port 0 read_resources bus 0 link: 0 done
 1087 20:54:48.281190  PCI: 00:14.0 read_resources bus 0 link: 0 done
 1088 20:54:48.289058  PCI: 00:15.0 read_resources bus 1 link: 0
 1089 20:54:48.292334  PCI: 00:15.0 read_resources bus 1 link: 0 done
 1090 20:54:48.299173  PCI: 00:15.1 read_resources bus 2 link: 0
 1091 20:54:48.301666  PCI: 00:15.1 read_resources bus 2 link: 0 done
 1092 20:54:48.309245  PCI: 00:19.0 read_resources bus 3 link: 0
 1093 20:54:48.315632  PCI: 00:19.0 read_resources bus 3 link: 0 done
 1094 20:54:48.318924  PCI: 00:1d.0 read_resources bus 1 link: 0
 1095 20:54:48.325547  PCI: 00:1d.0 read_resources bus 1 link: 0 done
 1096 20:54:48.329109  PCI: 00:1e.2 read_resources bus 4 link: 0
 1097 20:54:48.335617  PCI: 00:1e.2 read_resources bus 4 link: 0 done
 1098 20:54:48.339039  PCI: 00:1e.3 read_resources bus 5 link: 0
 1099 20:54:48.345527  PCI: 00:1e.3 read_resources bus 5 link: 0 done
 1100 20:54:48.348922  PCI: 00:1f.0 read_resources bus 0 link: 0
 1101 20:54:48.355570  PCI: 00:1f.0 read_resources bus 0 link: 0 done
 1102 20:54:48.362103  DOMAIN: 0000 read_resources bus 0 link: 0 done
 1103 20:54:48.365254  Root Device read_resources bus 0 link: 0 done
 1104 20:54:48.368386  Done reading resources.
 1105 20:54:48.374953  Show resources in subtree (Root Device)...After reading.
 1106 20:54:48.378318   Root Device child on link 0 CPU_CLUSTER: 0
 1107 20:54:48.381679    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1108 20:54:48.385091     APIC: 00
 1109 20:54:48.385713     APIC: 05
 1110 20:54:48.386108     APIC: 01
 1111 20:54:48.388198     APIC: 02
 1112 20:54:48.388694     APIC: 04
 1113 20:54:48.391493     APIC: 06
 1114 20:54:48.392022     APIC: 03
 1115 20:54:48.392418     APIC: 07
 1116 20:54:48.398111    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1117 20:54:48.407944    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
 1118 20:54:48.457785    DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
 1119 20:54:48.458383     PCI: 00:00.0
 1120 20:54:48.458905     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1121 20:54:48.459743     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1122 20:54:48.460169     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1123 20:54:48.460533     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1124 20:54:48.473783     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1125 20:54:48.476983     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1126 20:54:48.484018     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1127 20:54:48.493420     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1128 20:54:48.503514     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1129 20:54:48.509555     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1130 20:54:48.519599     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1131 20:54:48.529644     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1132 20:54:48.539325     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1133 20:54:48.548836     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1134 20:54:48.558684     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1135 20:54:48.568494     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1136 20:54:48.569089     PCI: 00:02.0
 1137 20:54:48.578498     PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
 1138 20:54:48.591797     PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
 1139 20:54:48.598089     PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
 1140 20:54:48.601263     PCI: 00:04.0
 1141 20:54:48.601898     PCI: 00:08.0
 1142 20:54:48.610945     PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1143 20:54:48.614200     PCI: 00:12.0
 1144 20:54:48.623898     PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1145 20:54:48.627346     PCI: 00:14.0 child on link 0 USB0 port 0
 1146 20:54:48.637049     PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
 1147 20:54:48.643361      USB0 port 0 child on link 0 USB2 port 0
 1148 20:54:48.643807       USB2 port 0
 1149 20:54:48.646596       USB2 port 1
 1150 20:54:48.647035       USB2 port 2
 1151 20:54:48.650103       USB2 port 3
 1152 20:54:48.650679       USB2 port 5
 1153 20:54:48.653499       USB2 port 6
 1154 20:54:48.653944       USB2 port 9
 1155 20:54:48.656533       USB3 port 0
 1156 20:54:48.656995       USB3 port 1
 1157 20:54:48.659809       USB3 port 2
 1158 20:54:48.660253       USB3 port 3
 1159 20:54:48.663264       USB3 port 4
 1160 20:54:48.666348     PCI: 00:14.2
 1161 20:54:48.676395     PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
 1162 20:54:48.686310     PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1163 20:54:48.686892     PCI: 00:14.3
 1164 20:54:48.696065     PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1165 20:54:48.699047     PCI: 00:15.0 child on link 0 I2C: 01:15
 1166 20:54:48.708772     PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1167 20:54:48.712263  
 1168 20:54:48.712845      I2C: 01:15
 1169 20:54:48.715228     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1170 20:54:48.725126     PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1171 20:54:48.728469      I2C: 02:5d
 1172 20:54:48.728976      GENERIC: 0.0
 1173 20:54:48.731681     PCI: 00:16.0
 1174 20:54:48.741740     PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1175 20:54:48.742336     PCI: 00:17.0
 1176 20:54:48.751391     PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
 1177 20:54:48.761322     PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
 1178 20:54:48.767598     PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
 1179 20:54:48.777488     PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
 1180 20:54:48.787906     PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
 1181 20:54:48.793753     PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
 1182 20:54:48.800706     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1183 20:54:48.810432     PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1184 20:54:48.811051      I2C: 03:1a
 1185 20:54:48.813753      I2C: 03:38
 1186 20:54:48.814412      I2C: 03:39
 1187 20:54:48.816862      I2C: 03:3a
 1188 20:54:48.817365      I2C: 03:3b
 1189 20:54:48.820134     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1190 20:54:48.830060     PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
 1191 20:54:48.839638     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
 1192 20:54:48.849594     PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
 1193 20:54:48.850196      PCI: 01:00.0
 1194 20:54:48.859284      PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1195 20:54:48.862570     PCI: 00:1e.0
 1196 20:54:48.872634     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1197 20:54:48.881909     PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
 1198 20:54:48.888541     PCI: 00:1e.2 child on link 0 SPI: 00
 1199 20:54:48.898766     PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1200 20:54:48.899384      SPI: 00
 1201 20:54:48.901875     PCI: 00:1e.3 child on link 0 SPI: 01
 1202 20:54:48.911924     PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
 1203 20:54:48.915000      SPI: 01
 1204 20:54:48.918357     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1205 20:54:48.924964     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1206 20:54:48.928217  
 1207 20:54:48.934918     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1208 20:54:48.937939      PNP: 0c09.0
 1209 20:54:48.945144      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1210 20:54:48.948461     PCI: 00:1f.3
 1211 20:54:48.957930     PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
 1212 20:54:48.968045     PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
 1213 20:54:48.968575     PCI: 00:1f.4
 1214 20:54:48.971245  
 1215 20:54:48.977295     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1216 20:54:48.987308     PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
 1217 20:54:48.990578     PCI: 00:1f.5
 1218 20:54:49.000741     PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
 1219 20:54:49.007125  DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
 1220 20:54:49.010455  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
 1221 20:54:49.020305  PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
 1222 20:54:49.023640  PCI: 00:02.0 20 *  [0x0 - 0x3f] io
 1223 20:54:49.027018  PCI: 00:17.0 20 *  [0x40 - 0x5f] io
 1224 20:54:49.029461  PCI: 00:17.0 18 *  [0x60 - 0x67] io
 1225 20:54:49.033282  PCI: 00:17.0 1c *  [0x68 - 0x6b] io
 1226 20:54:49.039665  DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
 1227 20:54:49.046166  DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
 1228 20:54:49.052803  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
 1229 20:54:49.062193  PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
 1230 20:54:49.068655  PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
 1231 20:54:49.072085  PCI: 01:00.0 10 *  [0x0 - 0x3fff] mem
 1232 20:54:49.081854  PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
 1233 20:54:49.085195  PCI: 00:02.0 18 *  [0x0 - 0xfffffff] prefmem
 1234 20:54:49.091605  PCI: 00:02.0 10 *  [0x10000000 - 0x10ffffff] mem
 1235 20:54:49.094848  PCI: 00:1d.0 20 *  [0x11000000 - 0x110fffff] mem
 1236 20:54:49.101921  PCI: 00:1f.3 20 *  [0x11100000 - 0x111fffff] mem
 1237 20:54:49.105312  PCI: 00:14.0 10 *  [0x11200000 - 0x1120ffff] mem
 1238 20:54:49.111563  PCI: 00:14.3 10 *  [0x11210000 - 0x11213fff] mem
 1239 20:54:49.115153  PCI: 00:1f.3 10 *  [0x11214000 - 0x11217fff] mem
 1240 20:54:49.121571  PCI: 00:14.2 10 *  [0x11218000 - 0x11219fff] mem
 1241 20:54:49.124802  PCI: 00:17.0 10 *  [0x1121a000 - 0x1121bfff] mem
 1242 20:54:49.131034  PCI: 00:08.0 10 *  [0x1121c000 - 0x1121cfff] mem
 1243 20:54:49.134257  PCI: 00:12.0 10 *  [0x1121d000 - 0x1121dfff] mem
 1244 20:54:49.137738  PCI: 00:14.2 18 *  [0x1121e000 - 0x1121efff] mem
 1245 20:54:49.141049  
 1246 20:54:49.144323  PCI: 00:15.0 10 *  [0x1121f000 - 0x1121ffff] mem
 1247 20:54:49.147155  PCI: 00:15.1 10 *  [0x11220000 - 0x11220fff] mem
 1248 20:54:49.153849  PCI: 00:16.0 10 *  [0x11221000 - 0x11221fff] mem
 1249 20:54:49.156981  PCI: 00:19.0 10 *  [0x11222000 - 0x11222fff] mem
 1250 20:54:49.163718  PCI: 00:1e.0 18 *  [0x11223000 - 0x11223fff] mem
 1251 20:54:49.166942  PCI: 00:1e.2 10 *  [0x11224000 - 0x11224fff] mem
 1252 20:54:49.173484  PCI: 00:1e.3 10 *  [0x11225000 - 0x11225fff] mem
 1253 20:54:49.176797  PCI: 00:1f.5 10 *  [0x11226000 - 0x11226fff] mem
 1254 20:54:49.183573  PCI: 00:17.0 24 *  [0x11227000 - 0x112277ff] mem
 1255 20:54:49.186750  PCI: 00:17.0 14 *  [0x11228000 - 0x112280ff] mem
 1256 20:54:49.193778  PCI: 00:1f.4 10 *  [0x11229000 - 0x112290ff] mem
 1257 20:54:49.200195  DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
 1258 20:54:49.203029  
 1259 20:54:49.206544  avoid_fixed_resources: DOMAIN: 0000
 1260 20:54:49.209967  avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
 1261 20:54:49.216575  avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
 1262 20:54:49.226078  constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
 1263 20:54:49.232419  constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
 1264 20:54:49.238684  constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
 1265 20:54:49.249114  constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
 1266 20:54:49.255551  constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
 1267 20:54:49.261704  constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
 1268 20:54:49.271441  constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
 1269 20:54:49.278048  constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
 1270 20:54:49.284592  avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
 1271 20:54:49.291094  avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
 1272 20:54:49.294498  Setting resources...
 1273 20:54:49.301167  DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
 1274 20:54:49.304341  PCI: 00:02.0 20 *  [0x1c00 - 0x1c3f] io
 1275 20:54:49.307793  PCI: 00:17.0 20 *  [0x1c40 - 0x1c5f] io
 1276 20:54:49.314022  PCI: 00:17.0 18 *  [0x1c60 - 0x1c67] io
 1277 20:54:49.317247  PCI: 00:17.0 1c *  [0x1c68 - 0x1c6b] io
 1278 20:54:49.323901  DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
 1279 20:54:49.330429  PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
 1280 20:54:49.337082  PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
 1281 20:54:49.343695  DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
 1282 20:54:49.350141  PCI: 00:02.0 18 *  [0xc0000000 - 0xcfffffff] prefmem
 1283 20:54:49.353612  PCI: 00:02.0 10 *  [0xd0000000 - 0xd0ffffff] mem
 1284 20:54:49.359996  PCI: 00:1d.0 20 *  [0xd1000000 - 0xd10fffff] mem
 1285 20:54:49.363511  PCI: 00:1f.3 20 *  [0xd1100000 - 0xd11fffff] mem
 1286 20:54:49.369989  PCI: 00:14.0 10 *  [0xd1200000 - 0xd120ffff] mem
 1287 20:54:49.373189  PCI: 00:14.3 10 *  [0xd1210000 - 0xd1213fff] mem
 1288 20:54:49.376491  PCI: 00:1f.3 10 *  [0xd1214000 - 0xd1217fff] mem
 1289 20:54:49.382959  PCI: 00:14.2 10 *  [0xd1218000 - 0xd1219fff] mem
 1290 20:54:49.386228  PCI: 00:17.0 10 *  [0xd121a000 - 0xd121bfff] mem
 1291 20:54:49.392871  PCI: 00:08.0 10 *  [0xd121c000 - 0xd121cfff] mem
 1292 20:54:49.396145  PCI: 00:12.0 10 *  [0xd121d000 - 0xd121dfff] mem
 1293 20:54:49.402853  PCI: 00:14.2 18 *  [0xd121e000 - 0xd121efff] mem
 1294 20:54:49.406052  PCI: 00:15.0 10 *  [0xd121f000 - 0xd121ffff] mem
 1295 20:54:49.412916  PCI: 00:15.1 10 *  [0xd1220000 - 0xd1220fff] mem
 1296 20:54:49.416252  PCI: 00:16.0 10 *  [0xd1221000 - 0xd1221fff] mem
 1297 20:54:49.422164  PCI: 00:19.0 10 *  [0xd1222000 - 0xd1222fff] mem
 1298 20:54:49.425461  PCI: 00:1e.0 18 *  [0xd1223000 - 0xd1223fff] mem
 1299 20:54:49.431752  PCI: 00:1e.2 10 *  [0xd1224000 - 0xd1224fff] mem
 1300 20:54:49.435005  PCI: 00:1e.3 10 *  [0xd1225000 - 0xd1225fff] mem
 1301 20:54:49.441503  PCI: 00:1f.5 10 *  [0xd1226000 - 0xd1226fff] mem
 1302 20:54:49.444733  PCI: 00:17.0 24 *  [0xd1227000 - 0xd12277ff] mem
 1303 20:54:49.451286  PCI: 00:17.0 14 *  [0xd1228000 - 0xd12280ff] mem
 1304 20:54:49.454542  PCI: 00:1f.4 10 *  [0xd1229000 - 0xd12290ff] mem
 1305 20:54:49.464522  DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
 1306 20:54:49.471059  PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
 1307 20:54:49.477536  PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
 1308 20:54:49.484023  PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
 1309 20:54:49.490716  PCI: 01:00.0 10 *  [0xd1000000 - 0xd1003fff] mem
 1310 20:54:49.497341  PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
 1311 20:54:49.500566  Root Device assign_resources, bus 0 link: 0
 1312 20:54:49.507508  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1313 20:54:49.513873  PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
 1314 20:54:49.523869  PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
 1315 20:54:49.530121  PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
 1316 20:54:49.539686  PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
 1317 20:54:49.546151  PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
 1318 20:54:49.556750  PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
 1319 20:54:49.559923  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1320 20:54:49.566377  PCI: 00:14.0 assign_resources, bus 0 link: 0
 1321 20:54:49.572984  PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
 1322 20:54:49.582715  PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
 1323 20:54:49.589396  PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
 1324 20:54:49.599624  PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
 1325 20:54:49.602070  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1326 20:54:49.608822  PCI: 00:15.0 assign_resources, bus 1 link: 0
 1327 20:54:49.615390  PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
 1328 20:54:49.622080  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1329 20:54:49.625937  PCI: 00:15.1 assign_resources, bus 2 link: 0
 1330 20:54:49.635104  PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
 1331 20:54:49.641707  PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
 1332 20:54:49.647982  PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
 1333 20:54:49.657912  PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
 1334 20:54:49.664464  PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
 1335 20:54:49.670673  PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
 1336 20:54:49.680604  PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
 1337 20:54:49.687145  PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
 1338 20:54:49.693889  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1339 20:54:49.696988  PCI: 00:19.0 assign_resources, bus 3 link: 0
 1340 20:54:49.706515  PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
 1341 20:54:49.716852  PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
 1342 20:54:49.723187  PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
 1343 20:54:49.729713  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1344 20:54:49.736374  PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
 1345 20:54:49.742898  PCI: 00:1d.0 assign_resources, bus 1 link: 0
 1346 20:54:49.749456  PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
 1347 20:54:49.759261  PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
 1348 20:54:49.762010  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1349 20:54:49.765191  PCI: 00:1e.2 assign_resources, bus 4 link: 0
 1350 20:54:49.775745  PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
 1351 20:54:49.779141  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1352 20:54:49.785459  PCI: 00:1e.3 assign_resources, bus 5 link: 0
 1353 20:54:49.788203  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1354 20:54:49.794717  PCI: 00:1f.0 assign_resources, bus 0 link: 0
 1355 20:54:49.798043  LPC: Trying to open IO window from 800 size 1ff
 1356 20:54:49.807894  PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
 1357 20:54:49.814574  PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
 1358 20:54:49.824402  PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
 1359 20:54:49.830385  PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
 1360 20:54:49.837087  DOMAIN: 0000 assign_resources, bus 0 link: 0
 1361 20:54:49.840337  Root Device assign_resources, bus 0 link: 0
 1362 20:54:49.843615  Done setting resources.
 1363 20:54:49.850159  Show resources in subtree (Root Device)...After assigning values.
 1364 20:54:49.853389   Root Device child on link 0 CPU_CLUSTER: 0
 1365 20:54:49.860087    CPU_CLUSTER: 0 child on link 0 APIC: 00
 1366 20:54:49.860177     APIC: 00
 1367 20:54:49.860266     APIC: 05
 1368 20:54:49.863266     APIC: 01
 1369 20:54:49.863355     APIC: 02
 1370 20:54:49.863443     APIC: 04
 1371 20:54:49.866628  
 1372 20:54:49.866718     APIC: 06
 1373 20:54:49.866805     APIC: 03
 1374 20:54:49.869824     APIC: 07
 1375 20:54:49.873143    DOMAIN: 0000 child on link 0 PCI: 00:00.0
 1376 20:54:49.883085    DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
 1377 20:54:49.892471    DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
 1378 20:54:49.895823     PCI: 00:00.0
 1379 20:54:49.905606     PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
 1380 20:54:49.915587     PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
 1381 20:54:49.925711     PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
 1382 20:54:49.932691     PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
 1383 20:54:49.941760     PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
 1384 20:54:49.951793     PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
 1385 20:54:49.961295     PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
 1386 20:54:49.971859     PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
 1387 20:54:49.981198     PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
 1388 20:54:49.988096     PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
 1389 20:54:49.997343     PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
 1390 20:54:50.007623     PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
 1391 20:54:50.017837     PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
 1392 20:54:50.027431     PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
 1393 20:54:50.036984     PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
 1394 20:54:50.046663     PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
 1395 20:54:50.047264     PCI: 00:02.0
 1396 20:54:50.059835     PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
 1397 20:54:50.069594     PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
 1398 20:54:50.079700     PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
 1399 20:54:50.080305     PCI: 00:04.0
 1400 20:54:50.083031     PCI: 00:08.0
 1401 20:54:50.092395     PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
 1402 20:54:50.093008     PCI: 00:12.0
 1403 20:54:50.102301     PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
 1404 20:54:50.109141     PCI: 00:14.0 child on link 0 USB0 port 0
 1405 20:54:50.118899     PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
 1406 20:54:50.121479      USB0 port 0 child on link 0 USB2 port 0
 1407 20:54:50.124890       USB2 port 0
 1408 20:54:50.125415       USB2 port 1
 1409 20:54:50.128432       USB2 port 2
 1410 20:54:50.129023       USB2 port 3
 1411 20:54:50.131554       USB2 port 5
 1412 20:54:50.135025       USB2 port 6
 1413 20:54:50.135629       USB2 port 9
 1414 20:54:50.138038       USB3 port 0
 1415 20:54:50.138528       USB3 port 1
 1416 20:54:50.141434       USB3 port 2
 1417 20:54:50.141929       USB3 port 3
 1418 20:54:50.144565       USB3 port 4
 1419 20:54:50.145058     PCI: 00:14.2
 1420 20:54:50.154281     PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
 1421 20:54:50.167491     PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
 1422 20:54:50.167948     PCI: 00:14.3
 1423 20:54:50.177178     PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
 1424 20:54:50.180557     PCI: 00:15.0 child on link 0 I2C: 01:15
 1425 20:54:50.183818  
 1426 20:54:50.193627     PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
 1427 20:54:50.194075      I2C: 01:15
 1428 20:54:50.197041     PCI: 00:15.1 child on link 0 I2C: 02:5d
 1429 20:54:50.210306     PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
 1430 20:54:50.210758      I2C: 02:5d
 1431 20:54:50.213610      GENERIC: 0.0
 1432 20:54:50.214059     PCI: 00:16.0
 1433 20:54:50.222805     PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
 1434 20:54:50.226166     PCI: 00:17.0
 1435 20:54:50.236219     PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
 1436 20:54:50.246134     PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
 1437 20:54:50.255829     PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
 1438 20:54:50.265679     PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
 1439 20:54:50.272144     PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
 1440 20:54:50.281993     PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
 1441 20:54:50.285190  
 1442 20:54:50.288433     PCI: 00:19.0 child on link 0 I2C: 03:1a
 1443 20:54:50.298360     PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
 1444 20:54:50.298861      I2C: 03:1a
 1445 20:54:50.301608      I2C: 03:38
 1446 20:54:50.302043      I2C: 03:39
 1447 20:54:50.304883      I2C: 03:3a
 1448 20:54:50.305341      I2C: 03:3b
 1449 20:54:50.311513     PCI: 00:1d.0 child on link 0 PCI: 01:00.0
 1450 20:54:50.321421     PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
 1451 20:54:50.330709     PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
 1452 20:54:50.340443     PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
 1453 20:54:50.341014      PCI: 01:00.0
 1454 20:54:50.353780      PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
 1455 20:54:50.354274     PCI: 00:1e.0
 1456 20:54:50.363859     PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
 1457 20:54:50.376959     PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
 1458 20:54:50.380153     PCI: 00:1e.2 child on link 0 SPI: 00
 1459 20:54:50.389866     PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
 1460 20:54:50.390404      SPI: 00
 1461 20:54:50.396416     PCI: 00:1e.3 child on link 0 SPI: 01
 1462 20:54:50.406227     PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
 1463 20:54:50.406675      SPI: 01
 1464 20:54:50.409506     PCI: 00:1f.0 child on link 0 PNP: 0c09.0
 1465 20:54:50.412873  
 1466 20:54:50.419516     PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
 1467 20:54:50.429348     PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
 1468 20:54:50.429933      PNP: 0c09.0
 1469 20:54:50.439216      PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
 1470 20:54:50.442423     PCI: 00:1f.3
 1471 20:54:50.451997     PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
 1472 20:54:50.461814     PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
 1473 20:54:50.462286     PCI: 00:1f.4
 1474 20:54:50.471100     PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
 1475 20:54:50.481316     PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
 1476 20:54:50.484696     PCI: 00:1f.5
 1477 20:54:50.493867     PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
 1478 20:54:50.497157  Done allocating resources.
 1479 20:54:50.503724  BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
 1480 20:54:50.504173  Enabling resources...
 1481 20:54:50.510929  PCI: 00:00.0 subsystem <- 8086/9b61
 1482 20:54:50.511417  PCI: 00:00.0 cmd <- 06
 1483 20:54:50.514263  PCI: 00:02.0 subsystem <- 8086/9b41
 1484 20:54:50.517663  
 1485 20:54:50.518107  PCI: 00:02.0 cmd <- 03
 1486 20:54:50.520946  PCI: 00:08.0 cmd <- 06
 1487 20:54:50.524330  PCI: 00:12.0 subsystem <- 8086/02f9
 1488 20:54:50.527526  PCI: 00:12.0 cmd <- 02
 1489 20:54:50.530727  PCI: 00:14.0 subsystem <- 8086/02ed
 1490 20:54:50.533795  PCI: 00:14.0 cmd <- 02
 1491 20:54:50.537116  PCI: 00:14.2 cmd <- 02
 1492 20:54:50.540439  PCI: 00:14.3 subsystem <- 8086/02f0
 1493 20:54:50.543640  PCI: 00:14.3 cmd <- 02
 1494 20:54:50.546985  PCI: 00:15.0 subsystem <- 8086/02e8
 1495 20:54:50.547071  PCI: 00:15.0 cmd <- 02
 1496 20:54:50.550365  
 1497 20:54:50.553005  PCI: 00:15.1 subsystem <- 8086/02e9
 1498 20:54:50.553090  PCI: 00:15.1 cmd <- 02
 1499 20:54:50.559584  PCI: 00:16.0 subsystem <- 8086/02e0
 1500 20:54:50.559670  PCI: 00:16.0 cmd <- 02
 1501 20:54:50.566195  PCI: 00:17.0 subsystem <- 8086/02d3
 1502 20:54:50.566281  PCI: 00:17.0 cmd <- 03
 1503 20:54:50.569452  PCI: 00:19.0 subsystem <- 8086/02c5
 1504 20:54:50.572675  PCI: 00:19.0 cmd <- 02
 1505 20:54:50.576482  PCI: 00:1d.0 bridge ctrl <- 0013
 1506 20:54:50.579651  PCI: 00:1d.0 subsystem <- 8086/02b0
 1507 20:54:50.582873  PCI: 00:1d.0 cmd <- 06
 1508 20:54:50.586240  PCI: 00:1e.0 subsystem <- 8086/02a8
 1509 20:54:50.588943  PCI: 00:1e.0 cmd <- 06
 1510 20:54:50.592250  PCI: 00:1e.2 subsystem <- 8086/02aa
 1511 20:54:50.595486  PCI: 00:1e.2 cmd <- 06
 1512 20:54:50.598694  PCI: 00:1e.3 subsystem <- 8086/02ab
 1513 20:54:50.602043  PCI: 00:1e.3 cmd <- 02
 1514 20:54:50.605312  PCI: 00:1f.0 subsystem <- 8086/0284
 1515 20:54:50.608667  PCI: 00:1f.0 cmd <- 407
 1516 20:54:50.612012  PCI: 00:1f.3 subsystem <- 8086/02c8
 1517 20:54:50.615122  PCI: 00:1f.3 cmd <- 02
 1518 20:54:50.618347  PCI: 00:1f.4 subsystem <- 8086/02a3
 1519 20:54:50.621663  PCI: 00:1f.4 cmd <- 03
 1520 20:54:50.624956  PCI: 00:1f.5 subsystem <- 8086/02a4
 1521 20:54:50.628306  PCI: 00:1f.5 cmd <- 406
 1522 20:54:50.635673  PCI: 01:00.0 cmd <- 02
 1523 20:54:50.640904  done.
 1524 20:54:50.654670  ME: Version: 14.0.39.1367
 1525 20:54:50.661276  BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 13
 1526 20:54:50.664602  Initializing devices...
 1527 20:54:50.664687  Root Device init ...
 1528 20:54:50.670659  Chrome EC: Set SMI mask to 0x0000000000000000
 1529 20:54:50.674014  Chrome EC: clear events_b mask to 0x0000000000000000
 1530 20:54:50.677257  
 1531 20:54:50.680500  Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
 1532 20:54:50.687134  Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
 1533 20:54:50.693695  Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
 1534 20:54:50.697095  Chrome EC: Set WAKE mask to 0x0000000000000000
 1535 20:54:50.703816  Root Device init finished in 35159 usecs
 1536 20:54:50.703958  CPU_CLUSTER: 0 init ...
 1537 20:54:50.707110  
 1538 20:54:50.710419  CPU_CLUSTER: 0 init finished in 2446 usecs
 1539 20:54:50.715762  PCI: 00:00.0 init ...
 1540 20:54:50.719020  CPU TDP: 15 Watts
 1541 20:54:50.722371  CPU PL2 = 64 Watts
 1542 20:54:50.725033  PCI: 00:00.0 init finished in 7077 usecs
 1543 20:54:50.728370  PCI: 00:02.0 init ...
 1544 20:54:50.731750  PCI: 00:02.0 init finished in 2244 usecs
 1545 20:54:50.735007  PCI: 00:08.0 init ...
 1546 20:54:50.738373  PCI: 00:08.0 init finished in 2253 usecs
 1547 20:54:50.741720  PCI: 00:12.0 init ...
 1548 20:54:50.744963  PCI: 00:12.0 init finished in 2242 usecs
 1549 20:54:50.748169  PCI: 00:14.0 init ...
 1550 20:54:50.751575  PCI: 00:14.0 init finished in 2251 usecs
 1551 20:54:50.754688  PCI: 00:14.2 init ...
 1552 20:54:50.757942  PCI: 00:14.2 init finished in 2253 usecs
 1553 20:54:50.761160  PCI: 00:14.3 init ...
 1554 20:54:50.764382  PCI: 00:14.3 init finished in 2270 usecs
 1555 20:54:50.768246  PCI: 00:15.0 init ...
 1556 20:54:50.771585  DW I2C bus 0 at 0xd121f000 (400 KHz)
 1557 20:54:50.777516  PCI: 00:15.0 init finished in 5975 usecs
 1558 20:54:50.777957  PCI: 00:15.1 init ...
 1559 20:54:50.780801  DW I2C bus 1 at 0xd1220000 (400 KHz)
 1560 20:54:50.787864  PCI: 00:15.1 init finished in 5965 usecs
 1561 20:54:50.791057  PCI: 00:16.0 init ...
 1562 20:54:50.794099  PCI: 00:16.0 init finished in 2251 usecs
 1563 20:54:50.797382  PCI: 00:19.0 init ...
 1564 20:54:50.800730  DW I2C bus 4 at 0xd1222000 (400 KHz)
 1565 20:54:50.804097  PCI: 00:19.0 init finished in 5975 usecs
 1566 20:54:50.807445  PCI: 00:1d.0 init ...
 1567 20:54:50.810685  Initializing PCH PCIe bridge.
 1568 20:54:50.813338  PCI: 00:1d.0 init finished in 5284 usecs
 1569 20:54:50.817302  PCI: 00:1f.0 init ...
 1570 20:54:50.820700  IOAPIC: Initializing IOAPIC at 0xfec00000
 1571 20:54:50.826736  IOAPIC: Bootstrap Processor Local APIC = 0x00
 1572 20:54:50.826865  IOAPIC: ID = 0x02
 1573 20:54:50.830076  IOAPIC: Dumping registers
 1574 20:54:50.833406    reg 0x0000: 0x02000000
 1575 20:54:50.836784    reg 0x0001: 0x00770020
 1576 20:54:50.840025    reg 0x0002: 0x00000000
 1577 20:54:50.843430  PCI: 00:1f.0 init finished in 23553 usecs
 1578 20:54:50.846723  PCI: 00:1f.4 init ...
 1579 20:54:50.849964  PCI: 00:1f.4 init finished in 2261 usecs
 1580 20:54:50.861770  PCI: 01:00.0 init ...
 1581 20:54:50.865193  PCI: 01:00.0 init finished in 2244 usecs
 1582 20:54:50.869095  PNP: 0c09.0 init ...
 1583 20:54:50.872415  Google Chrome EC uptime: 11.100 seconds
 1584 20:54:50.875663  
 1585 20:54:50.878907  Google Chrome AP resets since EC boot: 0
 1586 20:54:50.882080  Google Chrome most recent AP reset causes:
 1587 20:54:50.888590  Google Chrome EC reset flags at last EC boot: reset-pin
 1588 20:54:50.891921  PNP: 0c09.0 init finished in 20567 usecs
 1589 20:54:50.895239  Devices initialized
 1590 20:54:50.898457  Show all devs... After init.
 1591 20:54:50.898894  Root Device: enabled 1
 1592 20:54:50.901749  CPU_CLUSTER: 0: enabled 1
 1593 20:54:50.905113  DOMAIN: 0000: enabled 1
 1594 20:54:50.905600  APIC: 00: enabled 1
 1595 20:54:50.908281  PCI: 00:00.0: enabled 1
 1596 20:54:50.911679  PCI: 00:02.0: enabled 1
 1597 20:54:50.915051  PCI: 00:04.0: enabled 0
 1598 20:54:50.915490  PCI: 00:05.0: enabled 0
 1599 20:54:50.918483  PCI: 00:12.0: enabled 1
 1600 20:54:50.921758  PCI: 00:12.5: enabled 0
 1601 20:54:50.925138  PCI: 00:12.6: enabled 0
 1602 20:54:50.925638  PCI: 00:14.0: enabled 1
 1603 20:54:50.928379  PCI: 00:14.1: enabled 0
 1604 20:54:50.931113  PCI: 00:14.3: enabled 1
 1605 20:54:50.934443  PCI: 00:14.5: enabled 0
 1606 20:54:50.934881  PCI: 00:15.0: enabled 1
 1607 20:54:50.938305  PCI: 00:15.1: enabled 1
 1608 20:54:50.941024  PCI: 00:15.2: enabled 0
 1609 20:54:50.944396  PCI: 00:15.3: enabled 0
 1610 20:54:50.944960  PCI: 00:16.0: enabled 1
 1611 20:54:50.947636  PCI: 00:16.1: enabled 0
 1612 20:54:50.950940  PCI: 00:16.2: enabled 0
 1613 20:54:50.954206  PCI: 00:16.3: enabled 0
 1614 20:54:50.954747  PCI: 00:16.4: enabled 0
 1615 20:54:50.957549  PCI: 00:16.5: enabled 0
 1616 20:54:50.960793  PCI: 00:17.0: enabled 1
 1617 20:54:50.963989  PCI: 00:19.0: enabled 1
 1618 20:54:50.964428  PCI: 00:19.1: enabled 0
 1619 20:54:50.967299  PCI: 00:19.2: enabled 0
 1620 20:54:50.970732  PCI: 00:1a.0: enabled 0
 1621 20:54:50.973987  PCI: 00:1c.0: enabled 0
 1622 20:54:50.974423  PCI: 00:1c.1: enabled 0
 1623 20:54:50.977359  PCI: 00:1c.2: enabled 0
 1624 20:54:50.980576  PCI: 00:1c.3: enabled 0
 1625 20:54:50.983896  PCI: 00:1c.4: enabled 0
 1626 20:54:50.984337  PCI: 00:1c.5: enabled 0
 1627 20:54:50.987105  PCI: 00:1c.6: enabled 0
 1628 20:54:50.990275  PCI: 00:1c.7: enabled 0
 1629 20:54:50.990727  PCI: 00:1d.0: enabled 1
 1630 20:54:50.993442  
 1631 20:54:50.993885  PCI: 00:1d.1: enabled 0
 1632 20:54:50.996653  PCI: 00:1d.2: enabled 0
 1633 20:54:50.999932  PCI: 00:1d.3: enabled 0
 1634 20:54:51.000372  PCI: 00:1d.4: enabled 0
 1635 20:54:51.003165  
 1636 20:54:51.003604  PCI: 00:1d.5: enabled 0
 1637 20:54:51.006496  PCI: 00:1e.0: enabled 1
 1638 20:54:51.009717  PCI: 00:1e.1: enabled 0
 1639 20:54:51.010156  PCI: 00:1e.2: enabled 1
 1640 20:54:51.013099  PCI: 00:1e.3: enabled 1
 1641 20:54:51.016432  PCI: 00:1f.0: enabled 1
 1642 20:54:51.019793  PCI: 00:1f.1: enabled 0
 1643 20:54:51.020235  PCI: 00:1f.2: enabled 0
 1644 20:54:51.023015  PCI: 00:1f.3: enabled 1
 1645 20:54:51.026342  PCI: 00:1f.4: enabled 1
 1646 20:54:51.029622  PCI: 00:1f.5: enabled 1
 1647 20:54:51.030057  PCI: 00:1f.6: enabled 0
 1648 20:54:51.032756  USB0 port 0: enabled 1
 1649 20:54:51.036087  I2C: 01:15: enabled 1
 1650 20:54:51.036524  I2C: 02:5d: enabled 1
 1651 20:54:51.039400  
 1652 20:54:51.039842  GENERIC: 0.0: enabled 1
 1653 20:54:51.042641  I2C: 03:1a: enabled 1
 1654 20:54:51.045893  I2C: 03:38: enabled 1
 1655 20:54:51.046333  I2C: 03:39: enabled 1
 1656 20:54:51.049059  I2C: 03:3a: enabled 1
 1657 20:54:51.052482  I2C: 03:3b: enabled 1
 1658 20:54:51.052919  PCI: 00:00.0: enabled 1
 1659 20:54:51.055599  SPI: 00: enabled 1
 1660 20:54:51.059011  SPI: 01: enabled 1
 1661 20:54:51.059504  PNP: 0c09.0: enabled 1
 1662 20:54:51.062266  USB2 port 0: enabled 1
 1663 20:54:51.065568  USB2 port 1: enabled 1
 1664 20:54:51.066010  USB2 port 2: enabled 0
 1665 20:54:51.068800  USB2 port 3: enabled 0
 1666 20:54:51.072126  USB2 port 5: enabled 0
 1667 20:54:51.075348  USB2 port 6: enabled 1
 1668 20:54:51.075821  USB2 port 9: enabled 1
 1669 20:54:51.078523  USB3 port 0: enabled 1
 1670 20:54:51.081829  USB3 port 1: enabled 1
 1671 20:54:51.082286  USB3 port 2: enabled 1
 1672 20:54:51.085099  USB3 port 3: enabled 1
 1673 20:54:51.088215  USB3 port 4: enabled 0
 1674 20:54:51.091514  APIC: 05: enabled 1
 1675 20:54:51.091978  APIC: 01: enabled 1
 1676 20:54:51.094850  APIC: 02: enabled 1
 1677 20:54:51.095404  APIC: 04: enabled 1
 1678 20:54:51.097893  APIC: 06: enabled 1
 1679 20:54:51.101346  APIC: 03: enabled 1
 1680 20:54:51.101822  APIC: 07: enabled 1
 1681 20:54:51.104611  PCI: 00:08.0: enabled 1
 1682 20:54:51.107932  PCI: 00:14.2: enabled 1
 1683 20:54:51.108369  PCI: 01:00.0: enabled 1
 1684 20:54:51.111210  
 1685 20:54:51.114429  Disabling ACPI via APMC:
 1686 20:54:51.114866  done.
 1687 20:54:51.121001  FMAP: area RW_ELOG found @ af0000 (16384 bytes)
 1688 20:54:51.124275  ELOG: NV offset 0xaf0000 size 0x4000
 1689 20:54:51.130781  ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
 1690 20:54:51.137330  ELOG: Event(17) added with size 13 at 2023-01-18 20:54:51 UTC
 1691 20:54:51.143749  POST: Unexpected post code in previous boot: 0x73
 1692 20:54:51.149910  ELOG: Event(A3) added with size 11 at 2023-01-18 20:54:51 UTC
 1693 20:54:51.156478  ELOG: Event(A6) added with size 13 at 2023-01-18 20:54:51 UTC
 1694 20:54:51.163191  ELOG: Event(92) added with size 9 at 2023-01-18 20:54:51 UTC
 1695 20:54:51.169639  ELOG: Event(93) added with size 9 at 2023-01-18 20:54:51 UTC
 1696 20:54:51.172836  ELOG: Event(9A) added with size 9 at 2023-01-18 20:54:51 UTC
 1697 20:54:51.176111  
 1698 20:54:51.179470  ELOG: Event(9E) added with size 10 at 2023-01-18 20:54:51 UTC
 1699 20:54:51.186175  ELOG: Event(9F) added with size 14 at 2023-01-18 20:54:51 UTC
 1700 20:54:51.192574  BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
 1701 20:54:51.199730  ELOG: Event(A1) added with size 10 at 2023-01-18 20:54:51 UTC
 1702 20:54:51.206256  elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
 1703 20:54:51.212949  ELOG: Event(A0) added with size 9 at 2023-01-18 20:54:51 UTC
 1704 20:54:51.219548  elog_add_boot_reason: Logged dev mode boot
 1705 20:54:51.220043  Finalize devices...
 1706 20:54:51.222114  PCI: 00:17.0 final
 1707 20:54:51.222597  Devices finalized
 1708 20:54:51.229311  FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
 1709 20:54:51.235862  BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
 1710 20:54:51.239157  ME: HFSTS1                  : 0x90000245
 1711 20:54:51.242533  ME: HFSTS2                  : 0x3B850126
 1712 20:54:51.245704  ME: HFSTS3                  : 0x00000020
 1713 20:54:51.251680  ME: HFSTS4                  : 0x00004800
 1714 20:54:51.255056  ME: HFSTS5                  : 0x00000000
 1715 20:54:51.258464  ME: HFSTS6                  : 0x40400006
 1716 20:54:51.261630  ME: Manufacturing Mode      : NO
 1717 20:54:51.264894  ME: FW Partition Table      : OK
 1718 20:54:51.268147  ME: Bringup Loader Failure  : NO
 1719 20:54:51.271551  ME: Firmware Init Complete  : YES
 1720 20:54:51.274887  ME: Boot Options Present    : NO
 1721 20:54:51.278179  ME: Update In Progress      : NO
 1722 20:54:51.281443  ME: D0i3 Support            : YES
 1723 20:54:51.284677  ME: Low Power State Enabled : NO
 1724 20:54:51.288152  ME: CPU Replaced            : NO
 1725 20:54:51.291414  ME: CPU Replacement Valid   : YES
 1726 20:54:51.294498  ME: Current Working State   : 5
 1727 20:54:51.297762  ME: Current Operation State : 1
 1728 20:54:51.301047  ME: Current Operation Mode  : 0
 1729 20:54:51.304420  ME: Error Code              : 0
 1730 20:54:51.307672  ME: CPU Debug Disabled      : YES
 1731 20:54:51.311020  ME: TXT Support             : NO
 1732 20:54:51.317462  BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
 1733 20:54:51.323965  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1734 20:54:51.324470  CBFS @ c08000 size 3f8000
 1735 20:54:51.330642  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1736 20:54:51.333852  CBFS: Locating 'fallback/dsdt.aml'
 1737 20:54:51.337122  CBFS: Found @ offset 10bb80 size 3fa5
 1738 20:54:51.340547  
 1739 20:54:51.343993  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1740 20:54:51.347158  CBFS @ c08000 size 3f8000
 1741 20:54:51.353065  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1742 20:54:51.356459  CBFS: Locating 'fallback/slic'
 1743 20:54:51.359778  CBFS: 'fallback/slic' not found.
 1744 20:54:51.363038  ACPI: Writing ACPI tables at 99b3e000.
 1745 20:54:51.366335  ACPI:    * FACS
 1746 20:54:51.366778  ACPI:    * DSDT
 1747 20:54:51.372823  Ramoops buffer: 0x100000@0x99a3d000.
 1748 20:54:51.375972  FMAP: area RO_VPD found @ c00000 (16384 bytes)
 1749 20:54:51.379338  FMAP: area RW_VPD found @ af8000 (8192 bytes)
 1750 20:54:51.383156  Google Chrome EC: version:
 1751 20:54:51.386416  	ro: helios_v2.0.2659-56403530b
 1752 20:54:51.389710  	rw: helios_v2.0.2849-c41de27e7d
 1753 20:54:51.392861    running image: 1
 1754 20:54:51.396141  ACPI:    * FADT
 1755 20:54:51.396643  SCI is IRQ9
 1756 20:54:51.402719  ACPI: added table 1/32, length now 40
 1757 20:54:51.403164  ACPI:     * SSDT
 1758 20:54:51.406032  Found 1 CPU(s) with 8 core(s) each.
 1759 20:54:51.409147  Error: Could not locate 'wifi_sar' in VPD.
 1760 20:54:51.415806  Checking CBFS for default SAR values
 1761 20:54:51.419436  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1762 20:54:51.422694  CBFS @ c08000 size 3f8000
 1763 20:54:51.429273  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1764 20:54:51.432636  CBFS: Locating 'wifi_sar_defaults.hex'
 1765 20:54:51.435979  CBFS: Found @ offset 5fac0 size 77
 1766 20:54:51.438668  \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
 1767 20:54:51.445394  \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
 1768 20:54:51.448757  \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
 1769 20:54:51.455377  \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
 1770 20:54:51.458732  failed to find key in VPD: dsm_calib_r0_0
 1771 20:54:51.468795  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
 1772 20:54:51.471403  \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
 1773 20:54:51.477872  failed to find key in VPD: dsm_calib_r0_1
 1774 20:54:51.484524  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
 1775 20:54:51.491144  \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
 1776 20:54:51.494255  failed to find key in VPD: dsm_calib_r0_2
 1777 20:54:51.504314  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
 1778 20:54:51.510647  \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
 1779 20:54:51.513930  failed to find key in VPD: dsm_calib_r0_3
 1780 20:54:51.523846  Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
 1781 20:54:51.527264  \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
 1782 20:54:51.533831  \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
 1783 20:54:51.537228  \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
 1784 20:54:51.540503  EC returned error result code 1
 1785 20:54:51.543759  EC returned error result code 1
 1786 20:54:51.547007  EC returned error result code 1
 1787 20:54:51.553561  PS2K: Bad resp from EC. Vivaldi disabled!
 1788 20:54:51.556908  \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
 1789 20:54:51.563538  \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
 1790 20:54:51.569874  \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
 1791 20:54:51.573157  \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
 1792 20:54:51.579910  \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
 1793 20:54:51.586527  \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
 1794 20:54:51.589788  \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
 1795 20:54:51.596305  \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
 1796 20:54:51.599582  ACPI: added table 2/32, length now 44
 1797 20:54:51.602895  ACPI:    * MCFG
 1798 20:54:51.606119  ACPI: added table 3/32, length now 48
 1799 20:54:51.609404  ACPI:    * TPM2
 1800 20:54:51.612808  TPM2 log created at 99a2d000
 1801 20:54:51.616056  ACPI: added table 4/32, length now 52
 1802 20:54:51.616501  ACPI:    * MADT
 1803 20:54:51.619324  SCI is IRQ9
 1804 20:54:51.622500  ACPI: added table 5/32, length now 56
 1805 20:54:51.622946  current = 99b43ac0
 1806 20:54:51.625904  ACPI:    * DMAR
 1807 20:54:51.629336  ACPI: added table 6/32, length now 60
 1808 20:54:51.632666  ACPI:    * IGD OpRegion
 1809 20:54:51.633108  GMA: Found VBT in CBFS
 1810 20:54:51.635429  
 1811 20:54:51.635890  GMA: Found valid VBT in CBFS
 1812 20:54:51.642032  ACPI: added table 7/32, length now 64
 1813 20:54:51.642480  ACPI:    * HPET
 1814 20:54:51.645413  ACPI: added table 8/32, length now 68
 1815 20:54:51.648978  ACPI: done.
 1816 20:54:51.649455  ACPI tables: 31744 bytes.
 1817 20:54:51.652076  smbios_write_tables: 99a2c000
 1818 20:54:51.655333  EC returned error result code 3
 1819 20:54:51.658640  Couldn't obtain OEM name from CBI
 1820 20:54:51.661802  
 1821 20:54:51.662250  Create SMBIOS type 17
 1822 20:54:51.665043  PCI: 00:00.0 (Intel Cannonlake)
 1823 20:54:51.668319  PCI: 00:14.3 (Intel WiFi)
 1824 20:54:51.671445  SMBIOS tables: 939 bytes.
 1825 20:54:51.674995  Writing table forward entry at 0x00000500
 1826 20:54:51.681365  Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
 1827 20:54:51.684692  Writing coreboot table at 0x99b62000
 1828 20:54:51.691117   0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
 1829 20:54:51.694433   1. 0000000000001000-000000000009ffff: RAM
 1830 20:54:51.700991   2. 00000000000a0000-00000000000fffff: RESERVED
 1831 20:54:51.704335   3. 0000000000100000-0000000099a2bfff: RAM
 1832 20:54:51.710795   4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
 1833 20:54:51.714030   5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
 1834 20:54:51.720568   6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
 1835 20:54:51.727103   7. 000000009a000000-000000009f7fffff: RESERVED
 1836 20:54:51.730471   8. 00000000e0000000-00000000efffffff: RESERVED
 1837 20:54:51.737129   9. 00000000fc000000-00000000fc000fff: RESERVED
 1838 20:54:51.740398  10. 00000000fe000000-00000000fe00ffff: RESERVED
 1839 20:54:51.743597  11. 00000000fed10000-00000000fed17fff: RESERVED
 1840 20:54:51.750273  12. 00000000fed80000-00000000fed83fff: RESERVED
 1841 20:54:51.753612  13. 00000000fed90000-00000000fed91fff: RESERVED
 1842 20:54:51.760032  14. 00000000feda0000-00000000feda1fff: RESERVED
 1843 20:54:51.763344  15. 0000000100000000-000000045e7fffff: RAM
 1844 20:54:51.766584  Graphics framebuffer located at 0xc0000000
 1845 20:54:51.769968  Passing 5 GPIOs to payload:
 1846 20:54:51.776406              NAME |       PORT | POLARITY |     VALUE
 1847 20:54:51.782398     write protect |  undefined |     high |       low
 1848 20:54:51.786254               lid |  undefined |     high |      high
 1849 20:54:51.792727             power |  undefined |     high |       low
 1850 20:54:51.796035             oprom |  undefined |     high |       low
 1851 20:54:51.802131          EC in RW | 0x000000cb |     high |       low
 1852 20:54:51.802585  Board ID: 4
 1853 20:54:51.809267  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1854 20:54:51.812450  CBFS @ c08000 size 3f8000
 1855 20:54:51.815823  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1856 20:54:51.818500  
 1857 20:54:51.821683  Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
 1858 20:54:51.825011  coreboot table: 1492 bytes.
 1859 20:54:51.828074  IMD ROOT    0. 99fff000 00001000
 1860 20:54:51.831794  IMD SMALL   1. 99ffe000 00001000
 1861 20:54:51.834821  FSP MEMORY  2. 99c4e000 003b0000
 1862 20:54:51.837983  CONSOLE     3. 99c2e000 00020000
 1863 20:54:51.841408  FMAP        4. 99c2d000 0000054e
 1864 20:54:51.844620  TIME STAMP  5. 99c2c000 00000910
 1865 20:54:51.848011  VBOOT WORK  6. 99c18000 00014000
 1866 20:54:51.851299  MRC DATA    7. 99c16000 00001958
 1867 20:54:51.854536  ROMSTG STCK 8. 99c15000 00001000
 1868 20:54:51.857820  AFTER CAR   9. 99c0b000 0000a000
 1869 20:54:51.861127  RAMSTAGE   10. 99baf000 0005c000
 1870 20:54:51.864230  REFCODE    11. 99b7a000 00035000
 1871 20:54:51.867542  SMM BACKUP 12. 99b6a000 00010000
 1872 20:54:51.870777  COREBOOT   13. 99b62000 00008000
 1873 20:54:51.874008  
 1874 20:54:51.877468  ACPI       14. 99b3e000 00024000
 1875 20:54:51.880817  ACPI GNVS  15. 99b3d000 00001000
 1876 20:54:51.884055  RAMOOPS    16. 99a3d000 00100000
 1877 20:54:51.887530  TPM2 TCGLOG17. 99a2d000 00010000
 1878 20:54:51.890810  SMBIOS     18. 99a2c000 00000800
 1879 20:54:51.891259  IMD small region:
 1880 20:54:51.893976    IMD ROOT    0. 99ffec00 00000400
 1881 20:54:51.897395    FSP RUNTIME 1. 99ffebe0 00000004
 1882 20:54:51.900692    EC HOSTEVENT 2. 99ffebc0 00000008
 1883 20:54:51.904118    POWER STATE 3. 99ffeb80 00000040
 1884 20:54:51.910044    ROMSTAGE    4. 99ffeb60 00000004
 1885 20:54:51.914064    MEM INFO    5. 99ffe9a0 000001b9
 1886 20:54:51.916405    VPD         6. 99ffe920 0000006c
 1887 20:54:51.920358  MTRR: Physical address space:
 1888 20:54:51.926308  0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
 1889 20:54:51.929489  0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
 1890 20:54:51.936191  0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
 1891 20:54:51.942848  0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
 1892 20:54:51.949463  0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
 1893 20:54:51.956276  0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
 1894 20:54:51.962712  0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
 1895 20:54:51.965896  MTRR: Fixed MSR 0x250 0x0606060606060606
 1896 20:54:51.969119  MTRR: Fixed MSR 0x258 0x0606060606060606
 1897 20:54:51.972401  
 1898 20:54:51.975103  MTRR: Fixed MSR 0x259 0x0000000000000000
 1899 20:54:51.979017  MTRR: Fixed MSR 0x268 0x0606060606060606
 1900 20:54:51.981712  MTRR: Fixed MSR 0x269 0x0606060606060606
 1901 20:54:51.985014  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1902 20:54:51.988183  
 1903 20:54:51.991529  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1904 20:54:51.994699  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1905 20:54:51.998078  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1906 20:54:52.004692  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1907 20:54:52.007868  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1908 20:54:52.011241  call enable_fixed_mtrr()
 1909 20:54:52.014416  CPU physical address size: 39 bits
 1910 20:54:52.017818  MTRR: default type WB/UC MTRR counts: 6/8.
 1911 20:54:52.020886  MTRR: WB selected as default type.
 1912 20:54:52.027525  MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
 1913 20:54:52.033996  MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
 1914 20:54:52.040839  MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
 1915 20:54:52.047255  MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
 1916 20:54:52.053833  MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
 1917 20:54:52.060349  MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
 1918 20:54:52.060849  
 1919 20:54:52.061243  MTRR check
 1920 20:54:52.063710  Fixed MTRRs   : Enabled
 1921 20:54:52.067060  Variable MTRRs: Enabled
 1922 20:54:52.067567  
 1923 20:54:52.070225  MTRR: Fixed MSR 0x250 0x0606060606060606
 1924 20:54:52.073455  MTRR: Fixed MSR 0x258 0x0606060606060606
 1925 20:54:52.079898  MTRR: Fixed MSR 0x259 0x0000000000000000
 1926 20:54:52.083253  MTRR: Fixed MSR 0x268 0x0606060606060606
 1927 20:54:52.086727  MTRR: Fixed MSR 0x269 0x0606060606060606
 1928 20:54:52.090003  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1929 20:54:52.096603  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1930 20:54:52.099751  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1931 20:54:52.103158  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1932 20:54:52.106441  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1933 20:54:52.113028  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1934 20:54:52.116110  BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
 1935 20:54:52.119512  call enable_fixed_mtrr()
 1936 20:54:52.126168  FMAP: area COREBOOT found @ c08000 (4161536 bytes)
 1937 20:54:52.129490  CPU physical address size: 39 bits
 1938 20:54:52.132834  CBFS @ c08000 size 3f8000
 1939 20:54:52.136055  CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
 1940 20:54:52.139282  CBFS: Locating 'fallback/payload'
 1941 20:54:52.145688  MTRR: Fixed MSR 0x250 0x0606060606060606
 1942 20:54:52.149075  MTRR: Fixed MSR 0x250 0x0606060606060606
 1943 20:54:52.152467  MTRR: Fixed MSR 0x258 0x0606060606060606
 1944 20:54:52.155686  MTRR: Fixed MSR 0x259 0x0000000000000000
 1945 20:54:52.162299  MTRR: Fixed MSR 0x268 0x0606060606060606
 1946 20:54:52.165481  MTRR: Fixed MSR 0x269 0x0606060606060606
 1947 20:54:52.168861  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1948 20:54:52.171965  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1949 20:54:52.178600  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1950 20:54:52.181750  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1951 20:54:52.185194  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1952 20:54:52.187896  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1953 20:54:52.194617  MTRR: Fixed MSR 0x258 0x0606060606060606
 1954 20:54:52.197789  call enable_fixed_mtrr()
 1955 20:54:52.200998  MTRR: Fixed MSR 0x259 0x0000000000000000
 1956 20:54:52.204252  MTRR: Fixed MSR 0x268 0x0606060606060606
 1957 20:54:52.207708  MTRR: Fixed MSR 0x269 0x0606060606060606
 1958 20:54:52.213871  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1959 20:54:52.216959  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1960 20:54:52.220782  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1961 20:54:52.223894  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1962 20:54:52.230575  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1963 20:54:52.233918  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1964 20:54:52.236549  CPU physical address size: 39 bits
 1965 20:54:52.239908  call enable_fixed_mtrr()
 1966 20:54:52.243233  MTRR: Fixed MSR 0x250 0x0606060606060606
 1967 20:54:52.246471  MTRR: Fixed MSR 0x258 0x0606060606060606
 1968 20:54:52.253241  MTRR: Fixed MSR 0x259 0x0000000000000000
 1969 20:54:52.256444  MTRR: Fixed MSR 0x268 0x0606060606060606
 1970 20:54:52.259643  MTRR: Fixed MSR 0x269 0x0606060606060606
 1971 20:54:52.262858  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1972 20:54:52.269388  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1973 20:54:52.272857  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1974 20:54:52.276202  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1975 20:54:52.279397  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1976 20:54:52.286417  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1977 20:54:52.289689  MTRR: Fixed MSR 0x250 0x0606060606060606
 1978 20:54:52.292343  call enable_fixed_mtrr()
 1979 20:54:52.295643  MTRR: Fixed MSR 0x258 0x0606060606060606
 1980 20:54:52.298918  MTRR: Fixed MSR 0x259 0x0000000000000000
 1981 20:54:52.302260  MTRR: Fixed MSR 0x268 0x0606060606060606
 1982 20:54:52.309051  MTRR: Fixed MSR 0x269 0x0606060606060606
 1983 20:54:52.312372  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1984 20:54:52.315702  MTRR: Fixed MSR 0x26b 0x0606060606060606
 1985 20:54:52.318995  MTRR: Fixed MSR 0x26c 0x0606060606060606
 1986 20:54:52.325819  MTRR: Fixed MSR 0x26d 0x0606060606060606
 1987 20:54:52.329174  MTRR: Fixed MSR 0x26e 0x0606060606060606
 1988 20:54:52.332350  MTRR: Fixed MSR 0x26f 0x0606060606060606
 1989 20:54:52.335114  CPU physical address size: 39 bits
 1990 20:54:52.338288  call enable_fixed_mtrr()
 1991 20:54:52.342302  CPU physical address size: 39 bits
 1992 20:54:52.348240  CBFS: Found @ offset 1c96c0 size 3f798
 1993 20:54:52.351557  MTRR: Fixed MSR 0x250 0x0606060606060606
 1994 20:54:52.354882  MTRR: Fixed MSR 0x258 0x0606060606060606
 1995 20:54:52.358033  MTRR: Fixed MSR 0x259 0x0000000000000000
 1996 20:54:52.361484  MTRR: Fixed MSR 0x268 0x0606060606060606
 1997 20:54:52.368107  MTRR: Fixed MSR 0x269 0x0606060606060606
 1998 20:54:52.371409  MTRR: Fixed MSR 0x26a 0x0606060606060606
 1999 20:54:52.374684  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2000 20:54:52.377915  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2001 20:54:52.384413  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2002 20:54:52.387582  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2003 20:54:52.390858  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2004 20:54:52.397550  MTRR: Fixed MSR 0x250 0x0606060606060606
 2005 20:54:52.397950  call enable_fixed_mtrr()
 2006 20:54:52.404106  MTRR: Fixed MSR 0x258 0x0606060606060606
 2007 20:54:52.407274  MTRR: Fixed MSR 0x259 0x0000000000000000
 2008 20:54:52.410549  MTRR: Fixed MSR 0x268 0x0606060606060606
 2009 20:54:52.413804  MTRR: Fixed MSR 0x269 0x0606060606060606
 2010 20:54:52.420825  MTRR: Fixed MSR 0x26a 0x0606060606060606
 2011 20:54:52.424082  MTRR: Fixed MSR 0x26b 0x0606060606060606
 2012 20:54:52.427242  MTRR: Fixed MSR 0x26c 0x0606060606060606
 2013 20:54:52.430531  MTRR: Fixed MSR 0x26d 0x0606060606060606
 2014 20:54:52.437238  MTRR: Fixed MSR 0x26e 0x0606060606060606
 2015 20:54:52.440382  MTRR: Fixed MSR 0x26f 0x0606060606060606
 2016 20:54:52.443562  CPU physical address size: 39 bits
 2017 20:54:52.446780  call enable_fixed_mtrr()
 2018 20:54:52.450070  CPU physical address size: 39 bits
 2019 20:54:52.453409  Checking segment from ROM address 0xffdd16f8
 2020 20:54:52.456734  CPU physical address size: 39 bits
 2021 20:54:52.462624  Checking segment from ROM address 0xffdd1714
 2022 20:54:52.465926  Loading segment from ROM address 0xffdd16f8
 2023 20:54:52.469330    code (compression=0)
 2024 20:54:52.475942    New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
 2025 20:54:52.485789  Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
 2026 20:54:52.489067  it's not compressed!
 2027 20:54:52.580153  [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
 2028 20:54:52.586820  Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
 2029 20:54:52.590079  Loading segment from ROM address 0xffdd1714
 2030 20:54:52.593260  
 2031 20:54:52.593740    Entry Point 0x30000000
 2032 20:54:52.596617  Loaded segments
 2033 20:54:52.602497  Finalizing chipset.
 2034 20:54:52.605878  Finalizing SMM.
 2035 20:54:52.609028  BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
 2036 20:54:52.612331  mp_park_aps done after 0 msecs.
 2037 20:54:52.619045  Jumping to boot code at 30000000(99b62000)
 2038 20:54:52.625623  CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
 2039 20:54:52.626072  
 2040 20:54:52.626427  
 2041 20:54:52.626756  
 2042 20:54:52.628768  Starting depthcharge on Helios...
 2043 20:54:52.629256  
 2044 20:54:52.630331  end: 2.2.3 depthcharge-start (duration 00:00:19) [common]
 2045 20:54:52.630885  start: 2.2.4 bootloader-commands (timeout 00:04:41) [common]
 2046 20:54:52.631308  Setting prompt string to ['hatch:']
 2047 20:54:52.631719  bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:41)
 2048 20:54:52.638843  WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
 2049 20:54:52.639292  
 2050 20:54:52.644813  WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
 2051 20:54:52.645259  
 2052 20:54:52.651965  board_setup: Info: eMMC controller not present; skipping
 2053 20:54:52.652411  
 2054 20:54:52.655170  New NVMe Controller 0x30053ac0 @ 00:1d:00
 2055 20:54:52.655642  
 2056 20:54:52.661928  board_setup: Info: SDHCI controller not present; skipping
 2057 20:54:52.662398  
 2058 20:54:52.668277  vboot_create_vbsd: creating legacy VbSharedDataHeader structure
 2059 20:54:52.668790  
 2060 20:54:52.669345  Wipe memory regions:
 2061 20:54:52.669758  
 2062 20:54:52.671545  	[0x00000000001000, 0x000000000a0000)
 2063 20:54:52.671991  
 2064 20:54:52.678329  	[0x00000000100000, 0x00000030000000)
 2065 20:54:52.678829  
 2066 20:54:52.744707  	[0x00000030657430, 0x00000099a2c000)
 2067 20:54:52.745281  
 2068 20:54:52.885116  	[0x00000100000000, 0x0000045e800000)
 2069 20:54:52.885728  
 2070 20:54:54.268238  R8152: Initializing
 2071 20:54:54.268848  
 2072 20:54:54.271531  Version 9 (ocp_data = 6010)
 2073 20:54:54.272020  
 2074 20:54:54.275327  R8152: Done initializing
 2075 20:54:54.275819  
 2076 20:54:54.278688  Adding net device
 2077 20:54:54.279171  
 2078 20:54:54.761828  R8152: Initializing
 2079 20:54:54.762422  
 2080 20:54:54.765035  Version 6 (ocp_data = 5c30)
 2081 20:54:54.765553  
 2082 20:54:54.768246  R8152: Done initializing
 2083 20:54:54.768719  
 2084 20:54:54.774974  net_add_device: Attemp to include the same device
 2085 20:54:54.775452  
 2086 20:54:54.782028  [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
 2087 20:54:54.782515  
 2088 20:54:54.782888  
 2089 20:54:54.783237  
 2090 20:54:54.784075  Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2092 20:54:54.885852  hatch: tftpboot 192.168.201.1 8785150/tftp-deploy-xrt4btdr/kernel/bzImage 8785150/tftp-deploy-xrt4btdr/kernel/cmdline 8785150/tftp-deploy-xrt4btdr/ramdisk/ramdisk.cpio.gz
 2093 20:54:54.886547  Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2094 20:54:54.886994  bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:39)
 2095 20:54:54.891571  tftpboot 192.168.201.1 8785150/tftp-deploy-xrt4btdr/kernel/bzImoy-xrt4btdr/kernel/cmdline 8785150/tftp-deploy-xrt4btdr/ramdisk/ramdisk.cpio.gz
 2096 20:54:54.892205  
 2097 20:54:54.892625  Waiting for link
 2098 20:54:54.892979  
 2099 20:54:55.092453  done.
 2100 20:54:55.093076  
 2101 20:54:55.093509  MAC: 00:24:32:50:19:be
 2102 20:54:55.093865  
 2103 20:54:55.095490  Sending DHCP discover... done.
 2104 20:54:55.095965  
 2105 20:54:55.099034  Waiting for reply... done.
 2106 20:54:55.099652  
 2107 20:54:55.102242  Sending DHCP request... done.
 2108 20:54:55.102716  
 2109 20:54:55.105490  Waiting for reply... done.
 2110 20:54:55.105964  
 2111 20:54:55.108678  My ip is 192.168.201.15
 2112 20:54:55.109186  
 2113 20:54:55.112234  The DHCP server ip is 192.168.201.1
 2114 20:54:55.112814  
 2115 20:54:55.115564  TFTP server IP predefined by user: 192.168.201.1
 2116 20:54:55.116161  
 2117 20:54:55.121883  Bootfile predefined by user: 8785150/tftp-deploy-xrt4btdr/kernel/bzImage
 2118 20:54:55.122460  
 2119 20:54:55.128549  Sending tftp read request... done.
 2120 20:54:55.129128  
 2121 20:54:55.133253  Waiting for the transfer... 
 2122 20:54:55.133920  
 2123 20:54:55.831518  00000000 ################################################################
 2124 20:54:55.832069  
 2125 20:54:56.534532  00080000 ################################################################
 2126 20:54:56.535180  
 2127 20:54:57.115257  00100000 ################################################################
 2128 20:54:57.115414  
 2129 20:54:57.688153  00180000 ################################################################
 2130 20:54:57.688294  
 2131 20:54:58.285346  00200000 ################################################################
 2132 20:54:58.285649  
 2133 20:54:58.968816  00280000 ################################################################
 2134 20:54:58.969342  
 2135 20:54:59.653842  00300000 ################################################################
 2136 20:54:59.654518  
 2137 20:55:00.334984  00380000 ################################################################
 2138 20:55:00.335520  
 2139 20:55:01.005351  00400000 ################################################################
 2140 20:55:01.005914  
 2141 20:55:01.630427  00480000 ################################################################
 2142 20:55:01.630581  
 2143 20:55:02.306180  00500000 ################################################################
 2144 20:55:02.306720  
 2145 20:55:02.982883  00580000 ################################################################
 2146 20:55:02.983399  
 2147 20:55:03.673787  00600000 ################################################################
 2148 20:55:03.674337  
 2149 20:55:04.355278  00680000 ################################################################
 2150 20:55:04.355859  
 2151 20:55:05.033745  00700000 ################################################################
 2152 20:55:05.034329  
 2153 20:55:05.698731  00780000 ################################################################
 2154 20:55:05.699266  
 2155 20:55:06.339633  00800000 ################################################################
 2156 20:55:06.340177  
 2157 20:55:06.971984  00880000 ################################################################
 2158 20:55:06.972150  
 2159 20:55:07.276748  00900000 ################################## done.
 2160 20:55:07.276904  
 2161 20:55:07.280051  The bootfile was 9711616 bytes long.
 2162 20:55:07.280135  
 2163 20:55:07.283486  Sending tftp read request... done.
 2164 20:55:07.283566  
 2165 20:55:07.286649  Waiting for the transfer... 
 2166 20:55:07.286730  
 2167 20:55:07.854346  00000000 ################################################################
 2168 20:55:07.854512  
 2169 20:55:08.433412  00080000 ################################################################
 2170 20:55:08.433584  
 2171 20:55:09.006338  00100000 ################################################################
 2172 20:55:09.006497  
 2173 20:55:09.583453  00180000 ################################################################
 2174 20:55:09.583608  
 2175 20:55:10.161846  00200000 ################################################################
 2176 20:55:10.162028  
 2177 20:55:10.777689  00280000 ################################################################
 2178 20:55:10.778272  
 2179 20:55:11.446066  00300000 ################################################################
 2180 20:55:11.446612  
 2181 20:55:12.146520  00380000 ################################################################
 2182 20:55:12.147100  
 2183 20:55:12.837399  00400000 ################################################################
 2184 20:55:12.837974  
 2185 20:55:13.530925  00480000 ################################################################
 2186 20:55:13.531494  
 2187 20:55:13.883254  00500000 ################################### done.
 2188 20:55:13.883417  
 2189 20:55:13.886548  Sending tftp read request... done.
 2190 20:55:13.886641  
 2191 20:55:13.889864  Waiting for the transfer... 
 2192 20:55:13.890047  
 2193 20:55:13.890139  00000000 # done.
 2194 20:55:13.890220  
 2195 20:55:13.899707  Command line loaded dynamically from TFTP file: 8785150/tftp-deploy-xrt4btdr/kernel/cmdline
 2196 20:55:13.899905  
 2197 20:55:13.922824  The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8  console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/8785150/extract-nfsrootfs-16dt7n7j,tcp,hard ip=dhcp tftpserverip=192.168.201.1
 2198 20:55:13.923135  
 2199 20:55:13.929447  ec_init(0): CrosEC protocol v3 supported (256, 256)
 2200 20:55:13.929796  
 2201 20:55:13.936465  Shutting down all USB controllers.
 2202 20:55:13.936785  
 2203 20:55:13.937036  Removing current net device
 2204 20:55:13.937268  
 2205 20:55:13.940693  Finalizing coreboot
 2206 20:55:13.941201  
 2207 20:55:13.947367  Exiting depthcharge with code 4 at timestamp: 28679599
 2208 20:55:13.947860  
 2209 20:55:13.948249  
 2210 20:55:13.948615  Starting kernel ...
 2211 20:55:13.948961  
 2212 20:55:13.949299  
 2213 20:55:13.949684  
 2214 20:55:13.951026  end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
 2215 20:55:13.951588  start: 2.2.5 auto-login-action (timeout 00:04:20) [common]
 2216 20:55:13.952022  Setting prompt string to ['Linux version [0-9]']
 2217 20:55:13.952427  Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
 2218 20:55:13.952847  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
 2220 20:59:33.951819  end: 2.2.5 auto-login-action (duration 00:04:20) [common]
 2222 20:59:33.952133  depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 260 seconds'
 2224 20:59:33.952383  end: 2.2 depthcharge-retry (duration 00:05:00) [common]
 2227 20:59:33.952849  end: 2 depthcharge-action (duration 00:05:00) [common]
 2229 20:59:33.953101  Cleaning after the job
 2230 20:59:33.953186  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785150/tftp-deploy-xrt4btdr/ramdisk
 2231 20:59:33.953745  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785150/tftp-deploy-xrt4btdr/kernel
 2232 20:59:33.954458  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785150/tftp-deploy-xrt4btdr/nfsrootfs
 2233 20:59:34.003765  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/8785150/tftp-deploy-xrt4btdr/modules
 2234 20:59:34.004138  start: 4.1 power-off (timeout 00:00:30) [common]
 2235 20:59:34.004296  Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
 2236 20:59:34.023987  >> Command sent successfully.

 2237 20:59:34.025976  Returned 0 in 0 seconds
 2238 20:59:34.126776  end: 4.1 power-off (duration 00:00:00) [common]
 2240 20:59:34.127111  start: 4.2 read-feedback (timeout 00:10:00) [common]
 2241 20:59:34.127361  Listened to connection for namespace 'common' for up to 1s
 2242 20:59:35.132567  Finalising connection for namespace 'common'
 2243 20:59:35.133242  Disconnecting from shell: Finalise
 2244 20:59:35.234752  end: 4.2 read-feedback (duration 00:00:01) [common]
 2245 20:59:35.235378  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/8785150
 2246 20:59:35.432613  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/8785150
 2247 20:59:35.432821  JobError: Your job cannot terminate cleanly.