Boot log: acer-cb317-1h-c3z6-dedede
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:17:30.606847 lava-dispatcher, installed at version: 2023.01
2 12:17:30.607012 start: 0 validate
3 12:17:30.607129 Start time: 2023-03-22 12:17:30.607124+00:00 (UTC)
4 12:17:30.607250 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:17:30.607370 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 12:17:30.901877 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:17:30.902536 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.277-cip94-rt29%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:17:31.207330 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:17:31.207497 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:17:31.501429 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:17:31.501590 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.277-cip94-rt29%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:17:31.795319 validate duration: 1.19
14 12:17:31.795628 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:17:31.795819 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:17:31.795915 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:17:31.796019 Not decompressing ramdisk as can be used compressed.
18 12:17:31.796106 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/initrd.cpio.gz
19 12:17:31.796173 saving as /var/lib/lava/dispatcher/tmp/9729475/tftp-deploy-_lcudwjg/ramdisk/initrd.cpio.gz
20 12:17:31.796236 total size: 5432123 (5MB)
21 12:17:31.797124 progress 0% (0MB)
22 12:17:31.798592 progress 5% (0MB)
23 12:17:31.799988 progress 10% (0MB)
24 12:17:31.801329 progress 15% (0MB)
25 12:17:31.802820 progress 20% (1MB)
26 12:17:31.804176 progress 25% (1MB)
27 12:17:31.805493 progress 30% (1MB)
28 12:17:31.806964 progress 35% (1MB)
29 12:17:31.808285 progress 40% (2MB)
30 12:17:31.809599 progress 45% (2MB)
31 12:17:31.810909 progress 50% (2MB)
32 12:17:31.812425 progress 55% (2MB)
33 12:17:31.813747 progress 60% (3MB)
34 12:17:31.815063 progress 65% (3MB)
35 12:17:31.816538 progress 70% (3MB)
36 12:17:31.817898 progress 75% (3MB)
37 12:17:31.819211 progress 80% (4MB)
38 12:17:31.820529 progress 85% (4MB)
39 12:17:31.821992 progress 90% (4MB)
40 12:17:31.823300 progress 95% (4MB)
41 12:17:31.824646 progress 100% (5MB)
42 12:17:31.824852 5MB downloaded in 0.03s (181.07MB/s)
43 12:17:31.825008 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:17:31.825271 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:17:31.825364 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:17:31.825455 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:17:31.825567 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.277-cip94-rt29/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:17:31.825639 saving as /var/lib/lava/dispatcher/tmp/9729475/tftp-deploy-_lcudwjg/kernel/bzImage
50 12:17:31.825703 total size: 9834496 (9MB)
51 12:17:31.825766 No compression specified
52 12:17:31.826664 progress 0% (0MB)
53 12:17:31.829181 progress 5% (0MB)
54 12:17:31.831629 progress 10% (0MB)
55 12:17:31.834074 progress 15% (1MB)
56 12:17:31.836535 progress 20% (1MB)
57 12:17:31.838910 progress 25% (2MB)
58 12:17:31.841321 progress 30% (2MB)
59 12:17:31.843727 progress 35% (3MB)
60 12:17:31.846126 progress 40% (3MB)
61 12:17:31.848545 progress 45% (4MB)
62 12:17:31.850925 progress 50% (4MB)
63 12:17:31.853343 progress 55% (5MB)
64 12:17:31.855764 progress 60% (5MB)
65 12:17:31.858147 progress 65% (6MB)
66 12:17:31.860519 progress 70% (6MB)
67 12:17:31.862856 progress 75% (7MB)
68 12:17:31.865226 progress 80% (7MB)
69 12:17:31.867557 progress 85% (8MB)
70 12:17:31.869894 progress 90% (8MB)
71 12:17:31.872285 progress 95% (8MB)
72 12:17:31.874644 progress 100% (9MB)
73 12:17:31.874769 9MB downloaded in 0.05s (191.17MB/s)
74 12:17:31.874919 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:17:31.875163 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:17:31.875254 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:17:31.875349 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:17:31.875458 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/full.rootfs.tar.xz
80 12:17:31.875526 saving as /var/lib/lava/dispatcher/tmp/9729475/tftp-deploy-_lcudwjg/nfsrootfs/full.rootfs.tar
81 12:17:31.875588 total size: 133351768 (127MB)
82 12:17:31.875651 Using unxz to decompress xz
83 12:17:31.878741 progress 0% (0MB)
84 12:17:32.217683 progress 5% (6MB)
85 12:17:32.578603 progress 10% (12MB)
86 12:17:32.854503 progress 15% (19MB)
87 12:17:33.043357 progress 20% (25MB)
88 12:17:33.295789 progress 25% (31MB)
89 12:17:33.640387 progress 30% (38MB)
90 12:17:33.995675 progress 35% (44MB)
91 12:17:34.394057 progress 40% (50MB)
92 12:17:34.786344 progress 45% (57MB)
93 12:17:35.147481 progress 50% (63MB)
94 12:17:35.526998 progress 55% (69MB)
95 12:17:35.895745 progress 60% (76MB)
96 12:17:36.266100 progress 65% (82MB)
97 12:17:36.632059 progress 70% (89MB)
98 12:17:36.998507 progress 75% (95MB)
99 12:17:37.441827 progress 80% (101MB)
100 12:17:37.880397 progress 85% (108MB)
101 12:17:38.154606 progress 90% (114MB)
102 12:17:38.501222 progress 95% (120MB)
103 12:17:38.895578 progress 100% (127MB)
104 12:17:38.901320 127MB downloaded in 7.03s (18.10MB/s)
105 12:17:38.901607 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:17:38.901879 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:17:38.901972 start: 1.4 download-retry (timeout 00:09:53) [common]
109 12:17:38.902070 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 12:17:38.902191 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.277-cip94-rt29/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:17:38.902262 saving as /var/lib/lava/dispatcher/tmp/9729475/tftp-deploy-_lcudwjg/modules/modules.tar
112 12:17:38.902326 total size: 462060 (0MB)
113 12:17:38.902397 Using unxz to decompress xz
114 12:17:38.905352 progress 7% (0MB)
115 12:17:38.905726 progress 14% (0MB)
116 12:17:38.905961 progress 21% (0MB)
117 12:17:38.907294 progress 28% (0MB)
118 12:17:38.909325 progress 35% (0MB)
119 12:17:38.911273 progress 42% (0MB)
120 12:17:38.913311 progress 49% (0MB)
121 12:17:38.915178 progress 56% (0MB)
122 12:17:38.917146 progress 63% (0MB)
123 12:17:38.918984 progress 70% (0MB)
124 12:17:38.921164 progress 78% (0MB)
125 12:17:38.923268 progress 85% (0MB)
126 12:17:38.925084 progress 92% (0MB)
127 12:17:38.927300 progress 99% (0MB)
128 12:17:38.934160 0MB downloaded in 0.03s (13.85MB/s)
129 12:17:38.934438 end: 1.4.1 http-download (duration 00:00:00) [common]
131 12:17:38.934715 end: 1.4 download-retry (duration 00:00:00) [common]
132 12:17:38.934817 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
133 12:17:38.934918 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
134 12:17:40.200709 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729475/extract-nfsrootfs-1m6j3lfs
135 12:17:40.200902 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
136 12:17:40.201012 start: 1.5.2 lava-overlay (timeout 00:09:52) [common]
137 12:17:40.201150 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f
138 12:17:40.201254 makedir: /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin
139 12:17:40.201346 makedir: /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/tests
140 12:17:40.201428 makedir: /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/results
141 12:17:40.201523 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-add-keys
142 12:17:40.201657 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-add-sources
143 12:17:40.201774 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-background-process-start
144 12:17:40.201889 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-background-process-stop
145 12:17:40.202009 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-common-functions
146 12:17:40.202120 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-echo-ipv4
147 12:17:40.202238 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-install-packages
148 12:17:40.202349 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-installed-packages
149 12:17:40.202461 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-os-build
150 12:17:40.202580 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-probe-channel
151 12:17:40.202690 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-probe-ip
152 12:17:40.202808 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-target-ip
153 12:17:40.202918 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-target-mac
154 12:17:40.203026 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-target-storage
155 12:17:40.203146 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-test-case
156 12:17:40.203257 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-test-event
157 12:17:40.203372 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-test-feedback
158 12:17:40.203482 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-test-raise
159 12:17:40.203590 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-test-reference
160 12:17:40.203742 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-test-runner
161 12:17:40.203852 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-test-set
162 12:17:40.203967 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-test-shell
163 12:17:40.204078 Updating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-install-packages (oe)
164 12:17:40.204193 Updating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/bin/lava-installed-packages (oe)
165 12:17:40.204298 Creating /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/environment
166 12:17:40.204383 environment:
167 12:17:40.204454 - battery_disconnected=1
168 12:17:40.204528 LAVA metadata
169 12:17:40.204590 - LAVA_JOB_ID=9729475
170 12:17:40.204652 - LAVA_DISPATCHER_IP=192.168.201.1
171 12:17:40.204748 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:52) [common]
172 12:17:40.204821 skipped lava-vland-overlay
173 12:17:40.204898 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
174 12:17:40.204979 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:52) [common]
175 12:17:40.205043 skipped lava-multinode-overlay
176 12:17:40.205124 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
177 12:17:40.205205 start: 1.5.2.3 test-definition (timeout 00:09:52) [common]
178 12:17:40.205276 Loading test definitions
179 12:17:40.205365 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:52) [common]
180 12:17:40.205445 Using /lava-9729475 at stage 0
181 12:17:40.205698 uuid=9729475_1.5.2.3.1 testdef=None
182 12:17:40.205789 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
183 12:17:40.205878 start: 1.5.2.3.2 test-overlay (timeout 00:09:52) [common]
184 12:17:40.206368 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
186 12:17:40.206611 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:52) [common]
187 12:17:40.207196 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
189 12:17:40.207443 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:52) [common]
190 12:17:40.208047 runner path: /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/0/tests/0_dmesg test_uuid 9729475_1.5.2.3.1
191 12:17:40.208195 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
193 12:17:40.208440 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:52) [common]
194 12:17:40.208515 Using /lava-9729475 at stage 1
195 12:17:40.208761 uuid=9729475_1.5.2.3.5 testdef=None
196 12:17:40.208852 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
197 12:17:40.208948 start: 1.5.2.3.6 test-overlay (timeout 00:09:52) [common]
198 12:17:40.209404 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
200 12:17:40.209642 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:52) [common]
201 12:17:40.210231 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
203 12:17:40.210480 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:52) [common]
204 12:17:40.211044 runner path: /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/1/tests/1_bootrr test_uuid 9729475_1.5.2.3.5
205 12:17:40.211187 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
207 12:17:40.211410 Creating lava-test-runner.conf files
208 12:17:40.211476 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/0 for stage 0
209 12:17:40.211565 - 0_dmesg
210 12:17:40.211641 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729475/lava-overlay-nvlhky9f/lava-9729475/1 for stage 1
211 12:17:40.211762 - 1_bootrr
212 12:17:40.211860 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
213 12:17:40.211948 start: 1.5.2.4 compress-overlay (timeout 00:09:52) [common]
214 12:17:40.217911 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
215 12:17:40.218026 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:52) [common]
216 12:17:40.218120 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
217 12:17:40.218210 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
218 12:17:40.218306 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:52) [common]
219 12:17:40.321038 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
220 12:17:40.321399 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
221 12:17:40.321656 extracting modules file /var/lib/lava/dispatcher/tmp/9729475/tftp-deploy-_lcudwjg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729475/extract-nfsrootfs-1m6j3lfs
222 12:17:40.332796 extracting modules file /var/lib/lava/dispatcher/tmp/9729475/tftp-deploy-_lcudwjg/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729475/extract-overlay-ramdisk-3oyt14f6/ramdisk
223 12:17:40.343532 end: 1.5.4 extract-modules (duration 00:00:00) [common]
224 12:17:40.343688 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
225 12:17:40.343824 [common] Applying overlay to NFS
226 12:17:40.343897 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729475/compress-overlay-a3z_e0qb/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729475/extract-nfsrootfs-1m6j3lfs
227 12:17:40.348013 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
228 12:17:40.348131 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
229 12:17:40.348224 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
230 12:17:40.348320 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
231 12:17:40.348402 Building ramdisk /var/lib/lava/dispatcher/tmp/9729475/extract-overlay-ramdisk-3oyt14f6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729475/extract-overlay-ramdisk-3oyt14f6/ramdisk
232 12:17:40.388402 >> 30005 blocks
233 12:17:40.929135 rename /var/lib/lava/dispatcher/tmp/9729475/extract-overlay-ramdisk-3oyt14f6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729475/tftp-deploy-_lcudwjg/ramdisk/ramdisk.cpio.gz
234 12:17:40.929545 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
235 12:17:40.929676 start: 1.5.8 prepare-kernel (timeout 00:09:51) [common]
236 12:17:40.929778 start: 1.5.8.1 prepare-fit (timeout 00:09:51) [common]
237 12:17:40.929877 No mkimage arch provided, not using FIT.
238 12:17:40.929968 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
239 12:17:40.930060 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
240 12:17:40.930172 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
241 12:17:40.930261 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:51) [common]
242 12:17:40.930337 No LXC device requested
243 12:17:40.930418 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
244 12:17:40.930514 start: 1.7 deploy-device-env (timeout 00:09:51) [common]
245 12:17:40.930596 end: 1.7 deploy-device-env (duration 00:00:00) [common]
246 12:17:40.930663 Checking files for TFTP limit of 4294967296 bytes.
247 12:17:40.931049 end: 1 tftp-deploy (duration 00:00:09) [common]
248 12:17:40.931153 start: 2 depthcharge-action (timeout 00:05:00) [common]
249 12:17:40.931246 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
250 12:17:40.931383 substitutions:
251 12:17:40.931455 - {DTB}: None
252 12:17:40.931521 - {INITRD}: 9729475/tftp-deploy-_lcudwjg/ramdisk/ramdisk.cpio.gz
253 12:17:40.931582 - {KERNEL}: 9729475/tftp-deploy-_lcudwjg/kernel/bzImage
254 12:17:40.931648 - {LAVA_MAC}: None
255 12:17:40.931729 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729475/extract-nfsrootfs-1m6j3lfs
256 12:17:40.931803 - {NFS_SERVER_IP}: 192.168.201.1
257 12:17:40.931859 - {PRESEED_CONFIG}: None
258 12:17:40.931924 - {PRESEED_LOCAL}: None
259 12:17:40.931981 - {RAMDISK}: 9729475/tftp-deploy-_lcudwjg/ramdisk/ramdisk.cpio.gz
260 12:17:40.932037 - {ROOT_PART}: None
261 12:17:40.932092 - {ROOT}: None
262 12:17:40.932146 - {SERVER_IP}: 192.168.201.1
263 12:17:40.932200 - {TEE}: None
264 12:17:40.932262 Parsed boot commands:
265 12:17:40.932316 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
266 12:17:40.932473 Parsed boot commands: tftpboot 192.168.201.1 9729475/tftp-deploy-_lcudwjg/kernel/bzImage 9729475/tftp-deploy-_lcudwjg/kernel/cmdline 9729475/tftp-deploy-_lcudwjg/ramdisk/ramdisk.cpio.gz
267 12:17:40.932573 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
268 12:17:40.932662 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
269 12:17:40.932757 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
270 12:17:40.932854 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
271 12:17:40.932922 Not connected, no need to disconnect.
272 12:17:40.932997 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
273 12:17:40.933078 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
274 12:17:40.933152 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-6'
275 12:17:40.935944 Setting prompt string to ['lava-test: # ']
276 12:17:40.936241 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
277 12:17:40.936344 end: 2.2.1 reset-connection (duration 00:00:00) [common]
278 12:17:40.936443 start: 2.2.2 reset-device (timeout 00:05:00) [common]
279 12:17:40.936545 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
280 12:17:40.936715 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-6' '--port=1' '--command=reboot'
281 12:17:46.077340 >> Command sent successfully.
282 12:17:46.085850 Returned 0 in 5 seconds
283 12:17:46.187383 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
285 12:17:46.188707 end: 2.2.2 reset-device (duration 00:00:05) [common]
286 12:17:46.189165 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
287 12:17:46.189573 Setting prompt string to 'Starting depthcharge on Magolor...'
288 12:17:46.189884 Changing prompt to 'Starting depthcharge on Magolor...'
289 12:17:46.190202 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
290 12:17:46.191294 [Enter `^Ec?' for help]
291 12:17:47.319219
292 12:17:47.319904
293 12:17:47.329497 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
294 12:17:47.332851 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
295 12:17:47.339183 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
296 12:17:47.342849 CPU: AES supported, TXT NOT supported, VT supported
297 12:17:47.348913 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
298 12:17:47.352346 PCH: device id 4d87 (rev 01) is Jasperlake Super
299 12:17:47.355561 IGD: device id 4e55 (rev 01) is Jasperlake GT4
300 12:17:47.359687 VBOOT: Loading verstage.
301 12:17:47.365855 FMAP: Found "FLASH" version 1.1 at 0xc04000.
302 12:17:47.369586 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
303 12:17:47.375970 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
304 12:17:47.379794 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
305 12:17:47.383304
306 12:17:47.383967
307 12:17:47.394258 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
308 12:17:47.407738 Probing TPM: . done!
309 12:17:47.411235 TPM ready after 0 ms
310 12:17:47.414368 Connected to device vid:did:rid of 1ae0:0028:00
311 12:17:47.424714 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
312 12:17:47.432015 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
313 12:17:47.435283 Initialized TPM device CR50 revision 0
314 12:17:47.489187 tlcl_send_startup: Startup return code is 0
315 12:17:47.489807 TPM: setup succeeded
316 12:17:47.503968 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
317 12:17:47.517469 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 12:17:47.529672 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
319 12:17:47.539408 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
320 12:17:47.542780 Chrome EC: UHEPI supported
321 12:17:47.546305 Phase 1
322 12:17:47.550019 FMAP: area GBB found @ c05000 (12288 bytes)
323 12:17:47.557021 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
324 12:17:47.563956 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
325 12:17:47.567491 Recovery requested (1009000e)
326 12:17:47.570224 TPM: Extending digest for VBOOT: boot mode into PCR 0
327 12:17:47.582110 tlcl_extend: response is 0
328 12:17:47.588822 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
329 12:17:47.598490 tlcl_extend: response is 0
330 12:17:47.605780 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
331 12:17:47.609483 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
332 12:17:47.615669 BS: verstage times (exec / console): total (unknown) / 124 ms
333 12:17:47.616158
334 12:17:47.616513
335 12:17:47.626973 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
336 12:17:47.634491 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
337 12:17:47.638026 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
338 12:17:47.642078 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
339 12:17:47.645664 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
340 12:17:47.652861 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
341 12:17:47.656481 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
342 12:17:47.657015 TCO_STS: 0000 0001
343 12:17:47.660187 GEN_PMCON: d0015038 00002200
344 12:17:47.663653 GBLRST_CAUSE: 00000000 00000000
345 12:17:47.667281 prev_sleep_state 5
346 12:17:47.671212 Boot Count incremented to 7773
347 12:17:47.674972 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
348 12:17:47.678417 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
349 12:17:47.683238 Chrome EC: UHEPI supported
350 12:17:47.716956 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
351 12:17:47.723944 Probing TPM: done!
352 12:17:47.729359 Connected to device vid:did:rid of 1ae0:0028:00
353 12:17:47.739743 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
354 12:17:47.749205 Initialized TPM device CR50 revision 0
355 12:17:47.758870 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
356 12:17:47.765329 MRC: Hash idx 0x100b comparison successful.
357 12:17:47.768515 MRC cache found, size 5458
358 12:17:47.768983 bootmode is set to: 2
359 12:17:47.772482 SPD INDEX = 0
360 12:17:47.775542 CBFS: Found 'spd.bin' @0x40c40 size 0x600
361 12:17:47.778906 SPD: module type is LPDDR4X
362 12:17:47.785358 SPD: module part number is MT53E512M32D2NP-046 WT:E
363 12:17:47.792139 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
364 12:17:47.795009 SPD: device width 16 bits, bus width 32 bits
365 12:17:47.798306 SPD: module size is 4096 MB (per channel)
366 12:17:47.801659 meminit_channels: DRAM half-populated
367 12:17:47.884641 CBMEM:
368 12:17:47.888154 IMD: root @ 0x76fff000 254 entries.
369 12:17:47.891219 IMD: root @ 0x76ffec00 62 entries.
370 12:17:47.894544 FMAP: area RO_VPD found @ c00000 (16384 bytes)
371 12:17:47.901231 WARNING: RO_VPD is uninitialized or empty.
372 12:17:47.904520 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
373 12:17:47.908218 External stage cache:
374 12:17:47.911411 IMD: root @ 0x7b3ff000 254 entries.
375 12:17:47.915301 IMD: root @ 0x7b3fec00 62 entries.
376 12:17:47.924874 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
377 12:17:47.931774 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
378 12:17:47.937968 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
379 12:17:47.946662 MRC: 'RECOVERY_MRC_CACHE' does not need update.
380 12:17:47.950298 cse_lite: Skip switching to RW in the recovery path
381 12:17:47.953023 1 DIMMs found
382 12:17:47.953487 SMM Memory Map
383 12:17:47.957042 SMRAM : 0x7b000000 0x800000
384 12:17:47.959620 Subregion 0: 0x7b000000 0x200000
385 12:17:47.963456 Subregion 1: 0x7b200000 0x200000
386 12:17:47.969719 Subregion 2: 0x7b400000 0x400000
387 12:17:47.970168 top_of_ram = 0x77000000
388 12:17:47.976411 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
389 12:17:47.979850 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
390 12:17:47.986534 MTRR Range: Start=ff000000 End=0 (Size 1000000)
391 12:17:47.989894 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
392 12:17:47.996494 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
393 12:17:48.008761 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
394 12:17:48.011650 Processing 188 relocs. Offset value of 0x74c0e000
395 12:17:48.022006 BS: romstage times (exec / console): total (unknown) / 255 ms
396 12:17:48.026592
397 12:17:48.027033
398 12:17:48.036335 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
399 12:17:48.039721 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
400 12:17:48.046207 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
401 12:17:48.052925 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
402 12:17:48.108958 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
403 12:17:48.115903 Processing 4805 relocs. Offset value of 0x75da8000
404 12:17:48.119159 BS: postcar times (exec / console): total (unknown) / 42 ms
405 12:17:48.122300
406 12:17:48.122748
407 12:17:48.132442 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
408 12:17:48.132893 Normal boot
409 12:17:48.135810 EC returned error result code 3
410 12:17:48.139319 FW_CONFIG value is 0x204
411 12:17:48.142770 GENERIC: 0.0 disabled by fw_config
412 12:17:48.149175 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
413 12:17:48.152667 I2C: 00:10 disabled by fw_config
414 12:17:48.156177 I2C: 00:10 disabled by fw_config
415 12:17:48.159290 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
416 12:17:48.165788 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
417 12:17:48.169226 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
418 12:17:48.176170 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
419 12:17:48.179077 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
420 12:17:48.182689 I2C: 00:10 disabled by fw_config
421 12:17:48.189904 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
422 12:17:48.195888 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
423 12:17:48.199043 I2C: 00:1a disabled by fw_config
424 12:17:48.202542 I2C: 00:1a disabled by fw_config
425 12:17:48.209040 fw_config match found: AUDIO_AMP=UNPROVISIONED
426 12:17:48.212529 fw_config match found: AUDIO_AMP=UNPROVISIONED
427 12:17:48.215896 GENERIC: 0.0 disabled by fw_config
428 12:17:48.222472 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
429 12:17:48.225821 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
430 12:17:48.232258 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
431 12:17:48.235881 microcode: Update skipped, already up-to-date
432 12:17:48.242468 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
433 12:17:48.268284 Detected 2 core, 2 thread CPU.
434 12:17:48.271473 Setting up SMI for CPU
435 12:17:48.274374 IED base = 0x7b400000
436 12:17:48.274871 IED size = 0x00400000
437 12:17:48.278142 Will perform SMM setup.
438 12:17:48.281379 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
439 12:17:48.291039 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
440 12:17:48.294888 Processing 16 relocs. Offset value of 0x00030000
441 12:17:48.298115 Attempting to start 1 APs
442 12:17:48.301432 Waiting for 10ms after sending INIT.
443 12:17:48.317735 Waiting for 1st SIPI to complete...done.
444 12:17:48.318298 AP: slot 1 apic_id 2.
445 12:17:48.324638 Waiting for 2nd SIPI to complete...done.
446 12:17:48.331126 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
447 12:17:48.337731 Processing 13 relocs. Offset value of 0x00038000
448 12:17:48.338346 Unable to locate Global NVS
449 12:17:48.344451 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
450 12:17:48.351348 Installing permanent SMM handler to 0x7b000000
451 12:17:48.357725 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
452 12:17:48.364598 Processing 704 relocs. Offset value of 0x7b010000
453 12:17:48.371230 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
454 12:17:48.377900 Processing 13 relocs. Offset value of 0x7b008000
455 12:17:48.384546 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
456 12:17:48.385002 Unable to locate Global NVS
457 12:17:48.394727 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
458 12:17:48.397939 Clearing SMI status registers
459 12:17:48.398488 SMI_STS: PM1
460 12:17:48.401150 PM1_STS: PWRBTN
461 12:17:48.401598 TCO_STS: INTRD_DET
462 12:17:48.405095 GPE0 STD STS:
463 12:17:48.412625 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
464 12:17:48.413255 In relocation handler: CPU 0
465 12:17:48.419114 New SMBASE=0x7b000000 IEDBASE=0x7b400000
466 12:17:48.423182 Writing SMRR. base = 0x7b000006, mask=0xff800800
467 12:17:48.426215 Relocation complete.
468 12:17:48.432871 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
469 12:17:48.436206 In relocation handler: CPU 1
470 12:17:48.439443 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
471 12:17:48.442636 Writing SMRR. base = 0x7b000006, mask=0xff800800
472 12:17:48.446107 Relocation complete.
473 12:17:48.449878 Initializing CPU #0
474 12:17:48.452721 CPU: vendor Intel device 906c0
475 12:17:48.456030 CPU: family 06, model 9c, stepping 00
476 12:17:48.459291 Clearing out pending MCEs
477 12:17:48.459783 Setting up local APIC...
478 12:17:48.462704 apic_id: 0x00 done.
479 12:17:48.465753 Turbo is available but hidden
480 12:17:48.469020 Turbo is available and visible
481 12:17:48.472770 microcode: Update skipped, already up-to-date
482 12:17:48.476549 CPU #0 initialized
483 12:17:48.479149 Initializing CPU #1
484 12:17:48.482483 CPU: vendor Intel device 906c0
485 12:17:48.485959 CPU: family 06, model 9c, stepping 00
486 12:17:48.486415 Clearing out pending MCEs
487 12:17:48.489121 Setting up local APIC...
488 12:17:48.492502 apic_id: 0x02 done.
489 12:17:48.495878 microcode: Update skipped, already up-to-date
490 12:17:48.499475 CPU #1 initialized
491 12:17:48.503907 bsp_do_flight_plan done after 175 msecs.
492 12:17:48.506243 CPU: frequency set to 2800 MHz
493 12:17:48.509630 Enabling SMIs.
494 12:17:48.512640 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms
495 12:17:48.524556 Probing TPM: done!
496 12:17:48.531422 Connected to device vid:did:rid of 1ae0:0028:00
497 12:17:48.541065 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
498 12:17:48.544334 Initialized TPM device CR50 revision 0
499 12:17:48.547485 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
500 12:17:48.554682 Found a VBT of 7680 bytes after decompression
501 12:17:48.561162 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
502 12:17:48.596097 Detected 2 core, 2 thread CPU.
503 12:17:48.599837 Detected 2 core, 2 thread CPU.
504 12:17:48.961133 Display FSP Version Info HOB
505 12:17:48.964605 Reference Code - CPU = 8.7.22.30
506 12:17:48.967297 uCode Version = 24.0.0.1f
507 12:17:48.970822 TXT ACM version = ff.ff.ff.ffff
508 12:17:48.973937 Reference Code - ME = 8.7.22.30
509 12:17:48.977473 MEBx version = 0.0.0.0
510 12:17:48.980677 ME Firmware Version = Consumer SKU
511 12:17:48.984236 Reference Code - PCH = 8.7.22.30
512 12:17:48.987685 PCH-CRID Status = Disabled
513 12:17:48.991284 PCH-CRID Original Value = ff.ff.ff.ffff
514 12:17:48.995396 PCH-CRID New Value = ff.ff.ff.ffff
515 12:17:48.998799 OPROM - RST - RAID = ff.ff.ff.ffff
516 12:17:48.999297 PCH Hsio Version = 4.0.0.0
517 12:17:49.005949 Reference Code - SA - System Agent = 8.7.22.30
518 12:17:49.009099 Reference Code - MRC = 0.0.4.68
519 12:17:49.012837 SA - PCIe Version = 8.7.22.30
520 12:17:49.013347 SA-CRID Status = Disabled
521 12:17:49.015791 SA-CRID Original Value = 0.0.0.0
522 12:17:49.019025 SA-CRID New Value = 0.0.0.0
523 12:17:49.022298 OPROM - VBIOS = ff.ff.ff.ffff
524 12:17:49.029424 IO Manageability Engine FW Version = ff.ff.ff.ffff
525 12:17:49.032563 PHY Build Version = ff.ff.ff.ffff
526 12:17:49.035741 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
527 12:17:49.042341 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
528 12:17:49.045638 ITSS IRQ Polarities Before:
529 12:17:49.046150 IPC0: 0xffffffff
530 12:17:49.048906 IPC1: 0xffffffff
531 12:17:49.049413 IPC2: 0xffffffff
532 12:17:49.052267 IPC3: 0xffffffff
533 12:17:49.055613 ITSS IRQ Polarities After:
534 12:17:49.056246 IPC0: 0xffffffff
535 12:17:49.058876 IPC1: 0xffffffff
536 12:17:49.059382 IPC2: 0xffffffff
537 12:17:49.062324 IPC3: 0xffffffff
538 12:17:49.072740 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
539 12:17:49.079146 BS: BS_DEV_INIT_CHIPS run times (exec / console): 403 / 156 ms
540 12:17:49.082948 Enumerating buses...
541 12:17:49.085983 Show all devs... Before device enumeration.
542 12:17:49.089009 Root Device: enabled 1
543 12:17:49.092722 CPU_CLUSTER: 0: enabled 1
544 12:17:49.093233 DOMAIN: 0000: enabled 1
545 12:17:49.095358 PCI: 00:00.0: enabled 1
546 12:17:49.098867 PCI: 00:02.0: enabled 1
547 12:17:49.101986 PCI: 00:04.0: enabled 1
548 12:17:49.102491 PCI: 00:05.0: enabled 1
549 12:17:49.105656 PCI: 00:09.0: enabled 0
550 12:17:49.108833 PCI: 00:12.6: enabled 0
551 12:17:49.112024 PCI: 00:14.0: enabled 1
552 12:17:49.112482 PCI: 00:14.1: enabled 0
553 12:17:49.115444 PCI: 00:14.2: enabled 0
554 12:17:49.119080 PCI: 00:14.3: enabled 1
555 12:17:49.119667 PCI: 00:14.5: enabled 1
556 12:17:49.122319 PCI: 00:15.0: enabled 1
557 12:17:49.125550 PCI: 00:15.1: enabled 1
558 12:17:49.129006 PCI: 00:15.2: enabled 1
559 12:17:49.129574 PCI: 00:15.3: enabled 1
560 12:17:49.132094 PCI: 00:16.0: enabled 1
561 12:17:49.135627 PCI: 00:16.1: enabled 0
562 12:17:49.139442 PCI: 00:16.4: enabled 0
563 12:17:49.140064 PCI: 00:16.5: enabled 0
564 12:17:49.142545 PCI: 00:17.0: enabled 0
565 12:17:49.145669 PCI: 00:19.0: enabled 1
566 12:17:49.149185 PCI: 00:19.1: enabled 0
567 12:17:49.149789 PCI: 00:19.2: enabled 1
568 12:17:49.152314 PCI: 00:1a.0: enabled 1
569 12:17:49.155607 PCI: 00:1c.0: enabled 0
570 12:17:49.156248 PCI: 00:1c.1: enabled 0
571 12:17:49.158699 PCI: 00:1c.2: enabled 0
572 12:17:49.162352 PCI: 00:1c.3: enabled 0
573 12:17:49.165796 PCI: 00:1c.4: enabled 0
574 12:17:49.166398 PCI: 00:1c.5: enabled 0
575 12:17:49.168864 PCI: 00:1c.6: enabled 0
576 12:17:49.172126 PCI: 00:1c.7: enabled 1
577 12:17:49.175245 PCI: 00:1e.0: enabled 0
578 12:17:49.175778 PCI: 00:1e.1: enabled 0
579 12:17:49.178847 PCI: 00:1e.2: enabled 1
580 12:17:49.181860 PCI: 00:1e.3: enabled 0
581 12:17:49.185775 PCI: 00:1f.0: enabled 1
582 12:17:49.186274 PCI: 00:1f.1: enabled 1
583 12:17:49.188486 PCI: 00:1f.2: enabled 1
584 12:17:49.191796 PCI: 00:1f.3: enabled 1
585 12:17:49.192298 PCI: 00:1f.4: enabled 0
586 12:17:49.195098 PCI: 00:1f.5: enabled 1
587 12:17:49.198657 PCI: 00:1f.7: enabled 0
588 12:17:49.201989 GENERIC: 0.0: enabled 1
589 12:17:49.202493 GENERIC: 0.0: enabled 1
590 12:17:49.205049 USB0 port 0: enabled 1
591 12:17:49.208693 GENERIC: 0.0: enabled 1
592 12:17:49.211914 I2C: 00:2c: enabled 1
593 12:17:49.212364 I2C: 00:15: enabled 1
594 12:17:49.215246 GENERIC: 0.0: enabled 0
595 12:17:49.218392 I2C: 00:15: enabled 1
596 12:17:49.218921 I2C: 00:10: enabled 0
597 12:17:49.222398 I2C: 00:10: enabled 0
598 12:17:49.225325 I2C: 00:2c: enabled 1
599 12:17:49.225885 I2C: 00:40: enabled 1
600 12:17:49.228455 I2C: 00:10: enabled 1
601 12:17:49.232059 I2C: 00:39: enabled 1
602 12:17:49.232512 I2C: 00:36: enabled 1
603 12:17:49.234881 I2C: 00:10: enabled 0
604 12:17:49.239335 I2C: 00:0c: enabled 1
605 12:17:49.239938 I2C: 00:50: enabled 1
606 12:17:49.241711 I2C: 00:1a: enabled 1
607 12:17:49.244664 I2C: 00:1a: enabled 0
608 12:17:49.245114 I2C: 00:1a: enabled 0
609 12:17:49.248318 I2C: 00:28: enabled 1
610 12:17:49.252031 I2C: 00:29: enabled 1
611 12:17:49.252633 PCI: 00:00.0: enabled 1
612 12:17:49.255282 SPI: 00: enabled 1
613 12:17:49.258675 PNP: 0c09.0: enabled 1
614 12:17:49.259173 GENERIC: 0.0: enabled 0
615 12:17:49.261821 USB2 port 0: enabled 1
616 12:17:49.265475 USB2 port 1: enabled 1
617 12:17:49.268229 USB2 port 2: enabled 1
618 12:17:49.268731 USB2 port 3: enabled 1
619 12:17:49.271661 USB2 port 4: enabled 0
620 12:17:49.275171 USB2 port 5: enabled 1
621 12:17:49.275770 USB2 port 6: enabled 0
622 12:17:49.278822 USB2 port 7: enabled 1
623 12:17:49.282045 USB3 port 0: enabled 1
624 12:17:49.282750 USB3 port 1: enabled 1
625 12:17:49.285243 USB3 port 2: enabled 1
626 12:17:49.288175 USB3 port 3: enabled 1
627 12:17:49.288791 APIC: 00: enabled 1
628 12:17:49.292068 APIC: 02: enabled 1
629 12:17:49.295289 Compare with tree...
630 12:17:49.295879 Root Device: enabled 1
631 12:17:49.298739 CPU_CLUSTER: 0: enabled 1
632 12:17:49.301876 APIC: 00: enabled 1
633 12:17:49.305146 APIC: 02: enabled 1
634 12:17:49.305733 DOMAIN: 0000: enabled 1
635 12:17:49.308388 PCI: 00:00.0: enabled 1
636 12:17:49.311735 PCI: 00:02.0: enabled 1
637 12:17:49.315111 PCI: 00:04.0: enabled 1
638 12:17:49.318757 GENERIC: 0.0: enabled 1
639 12:17:49.319355 PCI: 00:05.0: enabled 1
640 12:17:49.321902 GENERIC: 0.0: enabled 1
641 12:17:49.325161 PCI: 00:09.0: enabled 0
642 12:17:49.328816 PCI: 00:12.6: enabled 0
643 12:17:49.331844 PCI: 00:14.0: enabled 1
644 12:17:49.332411 USB0 port 0: enabled 1
645 12:17:49.334823 USB2 port 0: enabled 1
646 12:17:49.338502 USB2 port 1: enabled 1
647 12:17:49.341511 USB2 port 2: enabled 1
648 12:17:49.345424 USB2 port 3: enabled 1
649 12:17:49.346008 USB2 port 4: enabled 0
650 12:17:49.348401 USB2 port 5: enabled 1
651 12:17:49.352140 USB2 port 6: enabled 0
652 12:17:49.354808 USB2 port 7: enabled 1
653 12:17:49.358269 USB3 port 0: enabled 1
654 12:17:49.362038 USB3 port 1: enabled 1
655 12:17:49.362637 USB3 port 2: enabled 1
656 12:17:49.364946 USB3 port 3: enabled 1
657 12:17:49.368403 PCI: 00:14.1: enabled 0
658 12:17:49.371628 PCI: 00:14.2: enabled 0
659 12:17:49.374844 PCI: 00:14.3: enabled 1
660 12:17:49.375334 GENERIC: 0.0: enabled 1
661 12:17:49.378312 PCI: 00:14.5: enabled 1
662 12:17:49.381899 PCI: 00:15.0: enabled 1
663 12:17:49.384800 I2C: 00:2c: enabled 1
664 12:17:49.385295 I2C: 00:15: enabled 1
665 12:17:49.388393 PCI: 00:15.1: enabled 1
666 12:17:49.391430 PCI: 00:15.2: enabled 1
667 12:17:49.394765 GENERIC: 0.0: enabled 0
668 12:17:49.398497 I2C: 00:15: enabled 1
669 12:17:49.399113 I2C: 00:10: enabled 0
670 12:17:49.401741 I2C: 00:10: enabled 0
671 12:17:49.405234 I2C: 00:2c: enabled 1
672 12:17:49.408481 I2C: 00:40: enabled 1
673 12:17:49.409094 I2C: 00:10: enabled 1
674 12:17:49.411466 I2C: 00:39: enabled 1
675 12:17:49.414902 PCI: 00:15.3: enabled 1
676 12:17:49.417825 I2C: 00:36: enabled 1
677 12:17:49.418321 I2C: 00:10: enabled 0
678 12:17:49.421515 I2C: 00:0c: enabled 1
679 12:17:49.424748 I2C: 00:50: enabled 1
680 12:17:49.428047 PCI: 00:16.0: enabled 1
681 12:17:49.431518 PCI: 00:16.1: enabled 0
682 12:17:49.432170 PCI: 00:16.4: enabled 0
683 12:17:49.435014 PCI: 00:16.5: enabled 0
684 12:17:49.438363 PCI: 00:17.0: enabled 0
685 12:17:49.441996 PCI: 00:19.0: enabled 1
686 12:17:49.444920 I2C: 00:1a: enabled 1
687 12:17:49.445417 I2C: 00:1a: enabled 0
688 12:17:49.448169 I2C: 00:1a: enabled 0
689 12:17:49.451854 I2C: 00:28: enabled 1
690 12:17:49.454501 I2C: 00:29: enabled 1
691 12:17:49.455018 PCI: 00:19.1: enabled 0
692 12:17:49.458552 PCI: 00:19.2: enabled 1
693 12:17:49.461298 PCI: 00:1a.0: enabled 1
694 12:17:49.464502 PCI: 00:1e.0: enabled 0
695 12:17:49.468257 PCI: 00:1e.1: enabled 0
696 12:17:49.468875 PCI: 00:1e.2: enabled 1
697 12:17:49.471086 SPI: 00: enabled 1
698 12:17:49.474535 PCI: 00:1e.3: enabled 0
699 12:17:49.478171 PCI: 00:1f.0: enabled 1
700 12:17:49.478782 PNP: 0c09.0: enabled 1
701 12:17:49.481163 PCI: 00:1f.1: enabled 1
702 12:17:49.484729 PCI: 00:1f.2: enabled 1
703 12:17:49.487930 PCI: 00:1f.3: enabled 1
704 12:17:49.491098 GENERIC: 0.0: enabled 0
705 12:17:49.491609 PCI: 00:1f.4: enabled 0
706 12:17:49.494721 PCI: 00:1f.5: enabled 1
707 12:17:49.498759 PCI: 00:1f.7: enabled 0
708 12:17:49.501144 Root Device scanning...
709 12:17:49.504742 scan_static_bus for Root Device
710 12:17:49.505357 CPU_CLUSTER: 0 enabled
711 12:17:49.507956 DOMAIN: 0000 enabled
712 12:17:49.511497 DOMAIN: 0000 scanning...
713 12:17:49.514659 PCI: pci_scan_bus for bus 00
714 12:17:49.518138 PCI: 00:00.0 [8086/0000] ops
715 12:17:49.521022 PCI: 00:00.0 [8086/4e22] enabled
716 12:17:49.524733 PCI: 00:02.0 [8086/0000] bus ops
717 12:17:49.528244 PCI: 00:02.0 [8086/4e55] enabled
718 12:17:49.531167 PCI: 00:04.0 [8086/0000] bus ops
719 12:17:49.534668 PCI: 00:04.0 [8086/4e03] enabled
720 12:17:49.537872 PCI: 00:05.0 [8086/0000] bus ops
721 12:17:49.541165 PCI: 00:05.0 [8086/4e19] enabled
722 12:17:49.544270 PCI: 00:08.0 [8086/4e11] enabled
723 12:17:49.548040 PCI: 00:14.0 [8086/0000] bus ops
724 12:17:49.551362 PCI: 00:14.0 [8086/4ded] enabled
725 12:17:49.554338 PCI: 00:14.2 [8086/4def] disabled
726 12:17:49.557697 PCI: 00:14.3 [8086/0000] bus ops
727 12:17:49.561449 PCI: 00:14.3 [8086/4df0] enabled
728 12:17:49.564726 PCI: 00:14.5 [8086/0000] ops
729 12:17:49.565246 PCI: 00:14.5 [8086/4df8] enabled
730 12:17:49.567917 PCI: 00:15.0 [8086/0000] bus ops
731 12:17:49.571152 PCI: 00:15.0 [8086/4de8] enabled
732 12:17:49.574940 PCI: 00:15.1 [8086/0000] bus ops
733 12:17:49.578103 PCI: 00:15.1 [8086/4de9] enabled
734 12:17:49.580837 PCI: 00:15.2 [8086/0000] bus ops
735 12:17:49.584712 PCI: 00:15.2 [8086/4dea] enabled
736 12:17:49.587962 PCI: 00:15.3 [8086/0000] bus ops
737 12:17:49.591129 PCI: 00:15.3 [8086/4deb] enabled
738 12:17:49.594583 PCI: 00:16.0 [8086/0000] ops
739 12:17:49.597695 PCI: 00:16.0 [8086/4de0] enabled
740 12:17:49.600889 PCI: 00:19.0 [8086/0000] bus ops
741 12:17:49.604265 PCI: 00:19.0 [8086/4dc5] enabled
742 12:17:49.607619 PCI: 00:19.2 [8086/0000] ops
743 12:17:49.611850 PCI: 00:19.2 [8086/4dc7] enabled
744 12:17:49.614236 PCI: 00:1a.0 [8086/0000] ops
745 12:17:49.617993 PCI: 00:1a.0 [8086/4dc4] enabled
746 12:17:49.621074 PCI: 00:1e.0 [8086/0000] ops
747 12:17:49.624415 PCI: 00:1e.0 [8086/4da8] disabled
748 12:17:49.627571 PCI: 00:1e.2 [8086/0000] bus ops
749 12:17:49.630932 PCI: 00:1e.2 [8086/4daa] enabled
750 12:17:49.634184 PCI: 00:1f.0 [8086/0000] bus ops
751 12:17:49.637554 PCI: 00:1f.0 [8086/4d87] enabled
752 12:17:49.644458 PCI: Static device PCI: 00:1f.1 not found, disabling it.
753 12:17:49.645066 RTC Init
754 12:17:49.648247 Set power on after power failure.
755 12:17:49.651384 Disabling Deep S3
756 12:17:49.651991 Disabling Deep S3
757 12:17:49.654227 Disabling Deep S4
758 12:17:49.654721 Disabling Deep S4
759 12:17:49.658105 Disabling Deep S5
760 12:17:49.658679 Disabling Deep S5
761 12:17:49.660719 PCI: 00:1f.2 [0000/0000] hidden
762 12:17:49.664418 PCI: 00:1f.3 [8086/0000] bus ops
763 12:17:49.667673 PCI: 00:1f.3 [8086/4dc8] enabled
764 12:17:49.671621 PCI: 00:1f.5 [8086/0000] bus ops
765 12:17:49.675013 PCI: 00:1f.5 [8086/4da4] enabled
766 12:17:49.678878 PCI: Leftover static devices:
767 12:17:49.679371 PCI: 00:12.6
768 12:17:49.682109 PCI: 00:09.0
769 12:17:49.682601 PCI: 00:14.1
770 12:17:49.685466 PCI: 00:16.1
771 12:17:49.685958 PCI: 00:16.4
772 12:17:49.686345 PCI: 00:16.5
773 12:17:49.688853 PCI: 00:17.0
774 12:17:49.689344 PCI: 00:19.1
775 12:17:49.692190 PCI: 00:1e.1
776 12:17:49.692696 PCI: 00:1e.3
777 12:17:49.693089 PCI: 00:1f.1
778 12:17:49.695462 PCI: 00:1f.4
779 12:17:49.695983 PCI: 00:1f.7
780 12:17:49.698791 PCI: Check your devicetree.cb.
781 12:17:49.702295 PCI: 00:02.0 scanning...
782 12:17:49.706174 scan_generic_bus for PCI: 00:02.0
783 12:17:49.708695 scan_generic_bus for PCI: 00:02.0 done
784 12:17:49.715478 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
785 12:17:49.716036 PCI: 00:04.0 scanning...
786 12:17:49.718899 scan_generic_bus for PCI: 00:04.0
787 12:17:49.722262 GENERIC: 0.0 enabled
788 12:17:49.728776 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
789 12:17:49.731896 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
790 12:17:49.735753 PCI: 00:05.0 scanning...
791 12:17:49.738781 scan_generic_bus for PCI: 00:05.0
792 12:17:49.742050 GENERIC: 0.0 enabled
793 12:17:49.748798 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
794 12:17:49.752337 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
795 12:17:49.755244 PCI: 00:14.0 scanning...
796 12:17:49.758643 scan_static_bus for PCI: 00:14.0
797 12:17:49.762524 USB0 port 0 enabled
798 12:17:49.763070 USB0 port 0 scanning...
799 12:17:49.765258 scan_static_bus for USB0 port 0
800 12:17:49.768465 USB2 port 0 enabled
801 12:17:49.771953 USB2 port 1 enabled
802 12:17:49.772403 USB2 port 2 enabled
803 12:17:49.775241 USB2 port 3 enabled
804 12:17:49.775710 USB2 port 4 disabled
805 12:17:49.778586 USB2 port 5 enabled
806 12:17:49.781828 USB2 port 6 disabled
807 12:17:49.782278 USB2 port 7 enabled
808 12:17:49.785231 USB3 port 0 enabled
809 12:17:49.785680 USB3 port 1 enabled
810 12:17:49.788745 USB3 port 2 enabled
811 12:17:49.791676 USB3 port 3 enabled
812 12:17:49.792157 USB2 port 0 scanning...
813 12:17:49.795115 scan_static_bus for USB2 port 0
814 12:17:49.801975 scan_static_bus for USB2 port 0 done
815 12:17:49.805124 scan_bus: bus USB2 port 0 finished in 6 msecs
816 12:17:49.808970 USB2 port 1 scanning...
817 12:17:49.812361 scan_static_bus for USB2 port 1
818 12:17:49.815334 scan_static_bus for USB2 port 1 done
819 12:17:49.819023 scan_bus: bus USB2 port 1 finished in 6 msecs
820 12:17:49.821815 USB2 port 2 scanning...
821 12:17:49.825072 scan_static_bus for USB2 port 2
822 12:17:49.828429 scan_static_bus for USB2 port 2 done
823 12:17:49.832325 scan_bus: bus USB2 port 2 finished in 6 msecs
824 12:17:49.835130 USB2 port 3 scanning...
825 12:17:49.838806 scan_static_bus for USB2 port 3
826 12:17:49.842307 scan_static_bus for USB2 port 3 done
827 12:17:49.848274 scan_bus: bus USB2 port 3 finished in 6 msecs
828 12:17:49.848772 USB2 port 5 scanning...
829 12:17:49.851709 scan_static_bus for USB2 port 5
830 12:17:49.858419 scan_static_bus for USB2 port 5 done
831 12:17:49.861488 scan_bus: bus USB2 port 5 finished in 6 msecs
832 12:17:49.865119 USB2 port 7 scanning...
833 12:17:49.868608 scan_static_bus for USB2 port 7
834 12:17:49.871907 scan_static_bus for USB2 port 7 done
835 12:17:49.874767 scan_bus: bus USB2 port 7 finished in 6 msecs
836 12:17:49.878160 USB3 port 0 scanning...
837 12:17:49.882214 scan_static_bus for USB3 port 0
838 12:17:49.885500 scan_static_bus for USB3 port 0 done
839 12:17:49.888728 scan_bus: bus USB3 port 0 finished in 6 msecs
840 12:17:49.891664 USB3 port 1 scanning...
841 12:17:49.895117 scan_static_bus for USB3 port 1
842 12:17:49.898302 scan_static_bus for USB3 port 1 done
843 12:17:49.904895 scan_bus: bus USB3 port 1 finished in 6 msecs
844 12:17:49.905412 USB3 port 2 scanning...
845 12:17:49.908238 scan_static_bus for USB3 port 2
846 12:17:49.915055 scan_static_bus for USB3 port 2 done
847 12:17:49.918587 scan_bus: bus USB3 port 2 finished in 6 msecs
848 12:17:49.921719 USB3 port 3 scanning...
849 12:17:49.925065 scan_static_bus for USB3 port 3
850 12:17:49.928659 scan_static_bus for USB3 port 3 done
851 12:17:49.931502 scan_bus: bus USB3 port 3 finished in 6 msecs
852 12:17:49.934921 scan_static_bus for USB0 port 0 done
853 12:17:49.941628 scan_bus: bus USB0 port 0 finished in 172 msecs
854 12:17:49.945282 scan_static_bus for PCI: 00:14.0 done
855 12:17:49.948358 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
856 12:17:49.951849 PCI: 00:14.3 scanning...
857 12:17:49.955555 scan_static_bus for PCI: 00:14.3
858 12:17:49.958786 GENERIC: 0.0 enabled
859 12:17:49.961649 scan_static_bus for PCI: 00:14.3 done
860 12:17:49.964629 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
861 12:17:49.968436 PCI: 00:15.0 scanning...
862 12:17:49.971643 scan_static_bus for PCI: 00:15.0
863 12:17:49.974925 I2C: 00:2c enabled
864 12:17:49.975436 I2C: 00:15 enabled
865 12:17:49.978230 scan_static_bus for PCI: 00:15.0 done
866 12:17:49.985494 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
867 12:17:49.988132 PCI: 00:15.1 scanning...
868 12:17:49.991672 scan_static_bus for PCI: 00:15.1
869 12:17:49.994798 scan_static_bus for PCI: 00:15.1 done
870 12:17:49.998551 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
871 12:17:50.001608 PCI: 00:15.2 scanning...
872 12:17:50.004921 scan_static_bus for PCI: 00:15.2
873 12:17:50.008100 GENERIC: 0.0 disabled
874 12:17:50.008722 I2C: 00:15 enabled
875 12:17:50.011728 I2C: 00:10 disabled
876 12:17:50.015121 I2C: 00:10 disabled
877 12:17:50.015622 I2C: 00:2c enabled
878 12:17:50.017919 I2C: 00:40 enabled
879 12:17:50.018413 I2C: 00:10 enabled
880 12:17:50.021700 I2C: 00:39 enabled
881 12:17:50.025251 scan_static_bus for PCI: 00:15.2 done
882 12:17:50.028337 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
883 12:17:50.031361 PCI: 00:15.3 scanning...
884 12:17:50.035160 scan_static_bus for PCI: 00:15.3
885 12:17:50.038507 I2C: 00:36 enabled
886 12:17:50.039081 I2C: 00:10 disabled
887 12:17:50.041605 I2C: 00:0c enabled
888 12:17:50.044711 I2C: 00:50 enabled
889 12:17:50.048247 scan_static_bus for PCI: 00:15.3 done
890 12:17:50.051463 scan_bus: bus PCI: 00:15.3 finished in 15 msecs
891 12:17:50.054990 PCI: 00:19.0 scanning...
892 12:17:50.057735 scan_static_bus for PCI: 00:19.0
893 12:17:50.061765 I2C: 00:1a enabled
894 12:17:50.062267 I2C: 00:1a disabled
895 12:17:50.064552 I2C: 00:1a disabled
896 12:17:50.065049 I2C: 00:28 enabled
897 12:17:50.068662 I2C: 00:29 enabled
898 12:17:50.071621 scan_static_bus for PCI: 00:19.0 done
899 12:17:50.078058 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
900 12:17:50.078564 PCI: 00:1e.2 scanning...
901 12:17:50.081953 scan_generic_bus for PCI: 00:1e.2
902 12:17:50.085335 SPI: 00 enabled
903 12:17:50.091085 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
904 12:17:50.094498 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
905 12:17:50.097916 PCI: 00:1f.0 scanning...
906 12:17:50.101680 scan_static_bus for PCI: 00:1f.0
907 12:17:50.104527 PNP: 0c09.0 enabled
908 12:17:50.105026 PNP: 0c09.0 scanning...
909 12:17:50.108087 scan_static_bus for PNP: 0c09.0
910 12:17:50.111248 scan_static_bus for PNP: 0c09.0 done
911 12:17:50.117914 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
912 12:17:50.121400 scan_static_bus for PCI: 00:1f.0 done
913 12:17:50.124867 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
914 12:17:50.128601 PCI: 00:1f.3 scanning...
915 12:17:50.131237 scan_static_bus for PCI: 00:1f.3
916 12:17:50.134944 GENERIC: 0.0 disabled
917 12:17:50.138207 scan_static_bus for PCI: 00:1f.3 done
918 12:17:50.141303 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
919 12:17:50.144361 PCI: 00:1f.5 scanning...
920 12:17:50.148259 scan_generic_bus for PCI: 00:1f.5
921 12:17:50.151877 scan_generic_bus for PCI: 00:1f.5 done
922 12:17:50.158161 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
923 12:17:50.161232 scan_bus: bus DOMAIN: 0000 finished in 647 msecs
924 12:17:50.164810 scan_static_bus for Root Device done
925 12:17:50.171494 scan_bus: bus Root Device finished in 666 msecs
926 12:17:50.172162 done
927 12:17:50.177743 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1086 ms
928 12:17:50.181031 Chrome EC: UHEPI supported
929 12:17:50.187553 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
930 12:17:50.194517 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
931 12:17:50.197632 SPI flash protection: WPSW=0 SRP0=1
932 12:17:50.201012 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
933 12:17:50.208301 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
934 12:17:50.210831 found VGA at PCI: 00:02.0
935 12:17:50.215114 Setting up VGA for PCI: 00:02.0
936 12:17:50.217813 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
937 12:17:50.224405 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
938 12:17:50.225014 Allocating resources...
939 12:17:50.228142 Reading resources...
940 12:17:50.231319 Root Device read_resources bus 0 link: 0
941 12:17:50.237961 CPU_CLUSTER: 0 read_resources bus 0 link: 0
942 12:17:50.241237 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
943 12:17:50.247875 DOMAIN: 0000 read_resources bus 0 link: 0
944 12:17:50.252124 PCI: 00:04.0 read_resources bus 1 link: 0
945 12:17:50.255148 PCI: 00:04.0 read_resources bus 1 link: 0 done
946 12:17:50.262581 PCI: 00:05.0 read_resources bus 2 link: 0
947 12:17:50.265589 PCI: 00:05.0 read_resources bus 2 link: 0 done
948 12:17:50.269338 PCI: 00:14.0 read_resources bus 0 link: 0
949 12:17:50.276278 USB0 port 0 read_resources bus 0 link: 0
950 12:17:50.283044 USB0 port 0 read_resources bus 0 link: 0 done
951 12:17:50.338225 PCI: 00:14.0 read_resources bus 0 link: 0 done
952 12:17:50.338859 PCI: 00:14.3 read_resources bus 0 link: 0
953 12:17:50.339726 PCI: 00:14.3 read_resources bus 0 link: 0 done
954 12:17:50.340226 PCI: 00:15.0 read_resources bus 0 link: 0
955 12:17:50.340726 PCI: 00:15.0 read_resources bus 0 link: 0 done
956 12:17:50.341110 PCI: 00:15.2 read_resources bus 0 link: 0
957 12:17:50.341898 PCI: 00:15.2 read_resources bus 0 link: 0 done
958 12:17:50.342350 PCI: 00:15.3 read_resources bus 0 link: 0
959 12:17:50.342741 PCI: 00:15.3 read_resources bus 0 link: 0 done
960 12:17:50.343175 PCI: 00:19.0 read_resources bus 0 link: 0
961 12:17:50.343589 PCI: 00:19.0 read_resources bus 0 link: 0 done
962 12:17:50.370825 PCI: 00:1e.2 read_resources bus 3 link: 0
963 12:17:50.371301 PCI: 00:1e.2 read_resources bus 3 link: 0 done
964 12:17:50.372007 PCI: 00:1f.0 read_resources bus 0 link: 0
965 12:17:50.372384 PCI: 00:1f.0 read_resources bus 0 link: 0 done
966 12:17:50.372719 PCI: 00:1f.3 read_resources bus 0 link: 0
967 12:17:50.373084 PCI: 00:1f.3 read_resources bus 0 link: 0 done
968 12:17:50.375593 DOMAIN: 0000 read_resources bus 0 link: 0 done
969 12:17:50.378164 Root Device read_resources bus 0 link: 0 done
970 12:17:50.378614 Done reading resources.
971 12:17:50.382029 Show resources in subtree (Root Device)...After reading.
972 12:17:50.388252 Root Device child on link 0 CPU_CLUSTER: 0
973 12:17:50.391553 CPU_CLUSTER: 0 child on link 0 APIC: 00
974 12:17:50.392027 APIC: 00
975 12:17:50.395168 APIC: 02
976 12:17:50.398476 DOMAIN: 0000 child on link 0 PCI: 00:00.0
977 12:17:50.408629 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
978 12:17:50.418102 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
979 12:17:50.418690 PCI: 00:00.0
980 12:17:50.428221 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
981 12:17:50.438735 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
982 12:17:50.448267 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
983 12:17:50.454962 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
984 12:17:50.464972 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
985 12:17:50.474690 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
986 12:17:50.485053 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
987 12:17:50.494598 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
988 12:17:50.504825 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
989 12:17:50.511386 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
990 12:17:50.521333 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
991 12:17:50.531115 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
992 12:17:50.541133 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
993 12:17:50.547812 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
994 12:17:50.557983 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
995 12:17:50.568163 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
996 12:17:50.577999 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
997 12:17:50.588009 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
998 12:17:50.598606 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
999 12:17:50.599168 PCI: 00:02.0
1000 12:17:50.608113 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1001 12:17:50.618357 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1002 12:17:50.628124 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1003 12:17:50.631047 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1004 12:17:50.641457 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1005 12:17:50.644568 GENERIC: 0.0
1006 12:17:50.647501 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1007 12:17:50.658065 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1008 12:17:50.660793 GENERIC: 0.0
1009 12:17:50.661284 PCI: 00:08.0
1010 12:17:50.671146 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 12:17:50.674220 PCI: 00:14.0 child on link 0 USB0 port 0
1012 12:17:50.684631 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1013 12:17:50.691196 USB0 port 0 child on link 0 USB2 port 0
1014 12:17:50.691657 USB2 port 0
1015 12:17:50.694364 USB2 port 1
1016 12:17:50.694927 USB2 port 2
1017 12:17:50.697297 USB2 port 3
1018 12:17:50.697797 USB2 port 4
1019 12:17:50.700890 USB2 port 5
1020 12:17:50.704292 USB2 port 6
1021 12:17:50.704794 USB2 port 7
1022 12:17:50.707519 USB3 port 0
1023 12:17:50.708066 USB3 port 1
1024 12:17:50.710795 USB3 port 2
1025 12:17:50.711359 USB3 port 3
1026 12:17:50.714129 PCI: 00:14.2
1027 12:17:50.717686 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1028 12:17:50.727550 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1029 12:17:50.730800 GENERIC: 0.0
1030 12:17:50.731345 PCI: 00:14.5
1031 12:17:50.740634 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1032 12:17:50.744170 PCI: 00:15.0 child on link 0 I2C: 00:2c
1033 12:17:50.753961 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1034 12:17:50.757396 I2C: 00:2c
1035 12:17:50.757989 I2C: 00:15
1036 12:17:50.760413 PCI: 00:15.1
1037 12:17:50.770272 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1038 12:17:50.774195 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1039 12:17:50.783686 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1040 12:17:50.787368 GENERIC: 0.0
1041 12:17:50.787994 I2C: 00:15
1042 12:17:50.790794 I2C: 00:10
1043 12:17:50.791419 I2C: 00:10
1044 12:17:50.791972 I2C: 00:2c
1045 12:17:50.793912 I2C: 00:40
1046 12:17:50.794535 I2C: 00:10
1047 12:17:50.797333 I2C: 00:39
1048 12:17:50.800454 PCI: 00:15.3 child on link 0 I2C: 00:36
1049 12:17:50.810686 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1050 12:17:50.813727 I2C: 00:36
1051 12:17:50.814278 I2C: 00:10
1052 12:17:50.817468 I2C: 00:0c
1053 12:17:50.818059 I2C: 00:50
1054 12:17:50.820376 PCI: 00:16.0
1055 12:17:50.830789 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1056 12:17:50.833468 PCI: 00:19.0 child on link 0 I2C: 00:1a
1057 12:17:50.843810 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1058 12:17:50.844400 I2C: 00:1a
1059 12:17:50.847416 I2C: 00:1a
1060 12:17:50.847935 I2C: 00:1a
1061 12:17:50.850762 I2C: 00:28
1062 12:17:50.851255 I2C: 00:29
1063 12:17:50.853936 PCI: 00:19.2
1064 12:17:50.863669 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1065 12:17:50.873449 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1066 12:17:50.873970 PCI: 00:1a.0
1067 12:17:50.883333 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1068 12:17:50.886767 PCI: 00:1e.0
1069 12:17:50.890198 PCI: 00:1e.2 child on link 0 SPI: 00
1070 12:17:50.900389 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1071 12:17:50.903579 SPI: 00
1072 12:17:50.907009 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1073 12:17:50.913649 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1074 12:17:50.917011 PNP: 0c09.0
1075 12:17:50.927329 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1076 12:17:50.927972 PCI: 00:1f.2
1077 12:17:50.938116 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1078 12:17:50.944612 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1079 12:17:50.951224 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1080 12:17:50.961719 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1081 12:17:50.971475 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1082 12:17:50.972119 GENERIC: 0.0
1083 12:17:50.974679 PCI: 00:1f.5
1084 12:17:50.981368 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1085 12:17:50.990981 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1086 12:17:50.998197 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1087 12:17:51.004523 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1088 12:17:51.011238 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1089 12:17:51.018424 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1090 12:17:51.027580 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1091 12:17:51.031510 DOMAIN: 0000: Resource ranges:
1092 12:17:51.034539 * Base: 1000, Size: 800, Tag: 100
1093 12:17:51.037655 * Base: 1900, Size: e700, Tag: 100
1094 12:17:51.041594 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1095 12:17:51.047654 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1096 12:17:51.054797 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1097 12:17:51.064451 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1098 12:17:51.070535 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1099 12:17:51.077424 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1100 12:17:51.087642 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1101 12:17:51.093753 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1102 12:17:51.100973 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1103 12:17:51.110474 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1104 12:17:51.117469 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1105 12:17:51.124329 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1106 12:17:51.130433 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1107 12:17:51.140416 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1108 12:17:51.147635 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1109 12:17:51.153698 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1110 12:17:51.163654 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1111 12:17:51.170438 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1112 12:17:51.177284 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1113 12:17:51.186917 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1114 12:17:51.193381 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1115 12:17:51.200100 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1116 12:17:51.209807 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1117 12:17:51.217051 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1118 12:17:51.220197 DOMAIN: 0000: Resource ranges:
1119 12:17:51.223342 * Base: 7fc00000, Size: 40400000, Tag: 200
1120 12:17:51.229982 * Base: d0000000, Size: 2b000000, Tag: 200
1121 12:17:51.233166 * Base: fb001000, Size: 2fff000, Tag: 200
1122 12:17:51.236578 * Base: fe010000, Size: 22000, Tag: 200
1123 12:17:51.239971 * Base: fe033000, Size: a4d000, Tag: 200
1124 12:17:51.246921 * Base: fea88000, Size: 2f8000, Tag: 200
1125 12:17:51.249867 * Base: fed88000, Size: 8000, Tag: 200
1126 12:17:51.253105 * Base: fed93000, Size: d000, Tag: 200
1127 12:17:51.256763 * Base: feda2000, Size: 125e000, Tag: 200
1128 12:17:51.263162 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1129 12:17:51.269595 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1130 12:17:51.276626 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1131 12:17:51.283160 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1132 12:17:51.289782 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1133 12:17:51.296117 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1134 12:17:51.302695 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1135 12:17:51.309867 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1136 12:17:51.316374 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1137 12:17:51.323024 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1138 12:17:51.330188 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1139 12:17:51.336613 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1140 12:17:51.343019 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1141 12:17:51.349890 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1142 12:17:51.356561 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1143 12:17:51.362922 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1144 12:17:51.369332 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1145 12:17:51.376221 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1146 12:17:51.383204 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1147 12:17:51.389639 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1148 12:17:51.396355 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1149 12:17:51.402811 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1150 12:17:51.409585 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1151 12:17:51.412479 Root Device assign_resources, bus 0 link: 0
1152 12:17:51.419236 DOMAIN: 0000 assign_resources, bus 0 link: 0
1153 12:17:51.426291 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1154 12:17:51.436146 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1155 12:17:51.442648 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1156 12:17:51.452455 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1157 12:17:51.455916 PCI: 00:04.0 assign_resources, bus 1 link: 0
1158 12:17:51.459107 PCI: 00:04.0 assign_resources, bus 1 link: 0
1159 12:17:51.469113 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1160 12:17:51.472283 PCI: 00:05.0 assign_resources, bus 2 link: 0
1161 12:17:51.478811 PCI: 00:05.0 assign_resources, bus 2 link: 0
1162 12:17:51.485388 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1163 12:17:51.495454 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1164 12:17:51.499101 PCI: 00:14.0 assign_resources, bus 0 link: 0
1165 12:17:51.502338 PCI: 00:14.0 assign_resources, bus 0 link: 0
1166 12:17:51.512545 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1167 12:17:51.515987 PCI: 00:14.3 assign_resources, bus 0 link: 0
1168 12:17:51.519513 PCI: 00:14.3 assign_resources, bus 0 link: 0
1169 12:17:51.529425 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1170 12:17:51.536112 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1171 12:17:51.542996 PCI: 00:15.0 assign_resources, bus 0 link: 0
1172 12:17:51.546001 PCI: 00:15.0 assign_resources, bus 0 link: 0
1173 12:17:51.552562 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1174 12:17:51.562605 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1175 12:17:51.566369 PCI: 00:15.2 assign_resources, bus 0 link: 0
1176 12:17:51.572716 PCI: 00:15.2 assign_resources, bus 0 link: 0
1177 12:17:51.579287 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1178 12:17:51.582990 PCI: 00:15.3 assign_resources, bus 0 link: 0
1179 12:17:51.589491 PCI: 00:15.3 assign_resources, bus 0 link: 0
1180 12:17:51.595881 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1181 12:17:51.605717 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1182 12:17:51.609060 PCI: 00:19.0 assign_resources, bus 0 link: 0
1183 12:17:51.612311 PCI: 00:19.0 assign_resources, bus 0 link: 0
1184 12:17:51.622384 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1185 12:17:51.629173 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1186 12:17:51.639293 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1187 12:17:51.642250 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1188 12:17:51.649452 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1189 12:17:51.652192 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1190 12:17:51.655810 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1191 12:17:51.662418 LPC: Trying to open IO window from 800 size 1ff
1192 12:17:51.668733 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1193 12:17:51.678889 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1194 12:17:51.682630 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1195 12:17:51.685741 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1196 12:17:51.695711 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1197 12:17:51.699313 DOMAIN: 0000 assign_resources, bus 0 link: 0
1198 12:17:51.705635 Root Device assign_resources, bus 0 link: 0
1199 12:17:51.705803 Done setting resources.
1200 12:17:51.712492 Show resources in subtree (Root Device)...After assigning values.
1201 12:17:51.719499 Root Device child on link 0 CPU_CLUSTER: 0
1202 12:17:51.722456 CPU_CLUSTER: 0 child on link 0 APIC: 00
1203 12:17:51.722659 APIC: 00
1204 12:17:51.725566 APIC: 02
1205 12:17:51.729782 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1206 12:17:51.739135 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1207 12:17:51.748915 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1208 12:17:51.749174 PCI: 00:00.0
1209 12:17:51.758967 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1210 12:17:51.769410 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1211 12:17:51.779000 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1212 12:17:51.785834 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1213 12:17:51.796108 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1214 12:17:51.806218 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1215 12:17:51.815607 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1216 12:17:51.826007 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1217 12:17:51.832347 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1218 12:17:51.841955 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1219 12:17:51.852116 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1220 12:17:51.861963 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1221 12:17:51.872003 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1222 12:17:51.878731 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1223 12:17:51.888453 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1224 12:17:51.898348 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1225 12:17:51.908659 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1226 12:17:51.918321 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1227 12:17:51.928305 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1228 12:17:51.928393 PCI: 00:02.0
1229 12:17:51.938300 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1230 12:17:51.951786 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1231 12:17:51.958354 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1232 12:17:51.964850 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1233 12:17:51.974872 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1234 12:17:51.974962 GENERIC: 0.0
1235 12:17:51.981512 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1236 12:17:51.991655 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1237 12:17:51.991784 GENERIC: 0.0
1238 12:17:51.994869 PCI: 00:08.0
1239 12:17:52.005011 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1240 12:17:52.008154 PCI: 00:14.0 child on link 0 USB0 port 0
1241 12:17:52.018207 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1242 12:17:52.025375 USB0 port 0 child on link 0 USB2 port 0
1243 12:17:52.025463 USB2 port 0
1244 12:17:52.028377 USB2 port 1
1245 12:17:52.028464 USB2 port 2
1246 12:17:52.031680 USB2 port 3
1247 12:17:52.031774 USB2 port 4
1248 12:17:52.034767 USB2 port 5
1249 12:17:52.034853 USB2 port 6
1250 12:17:52.038611 USB2 port 7
1251 12:17:52.038699 USB3 port 0
1252 12:17:52.041759 USB3 port 1
1253 12:17:52.041846 USB3 port 2
1254 12:17:52.045205 USB3 port 3
1255 12:17:52.048000 PCI: 00:14.2
1256 12:17:52.051592 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1257 12:17:52.061780 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1258 12:17:52.065135 GENERIC: 0.0
1259 12:17:52.065222 PCI: 00:14.5
1260 12:17:52.074818 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1261 12:17:52.078126 PCI: 00:15.0 child on link 0 I2C: 00:2c
1262 12:17:52.087919 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1263 12:17:52.091519 I2C: 00:2c
1264 12:17:52.091606 I2C: 00:15
1265 12:17:52.094567 PCI: 00:15.1
1266 12:17:52.104584 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1267 12:17:52.108014 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1268 12:17:52.118094 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1269 12:17:52.121400 GENERIC: 0.0
1270 12:17:52.121482 I2C: 00:15
1271 12:17:52.124522 I2C: 00:10
1272 12:17:52.124600 I2C: 00:10
1273 12:17:52.128155 I2C: 00:2c
1274 12:17:52.128233 I2C: 00:40
1275 12:17:52.131348 I2C: 00:10
1276 12:17:52.131425 I2C: 00:39
1277 12:17:52.138438 PCI: 00:15.3 child on link 0 I2C: 00:36
1278 12:17:52.148005 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1279 12:17:52.148089 I2C: 00:36
1280 12:17:52.151288 I2C: 00:10
1281 12:17:52.151363 I2C: 00:0c
1282 12:17:52.154545 I2C: 00:50
1283 12:17:52.154620 PCI: 00:16.0
1284 12:17:52.164886 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1285 12:17:52.167901 PCI: 00:19.0 child on link 0 I2C: 00:1a
1286 12:17:52.181051 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1287 12:17:52.181141 I2C: 00:1a
1288 12:17:52.181211 I2C: 00:1a
1289 12:17:52.185156 I2C: 00:1a
1290 12:17:52.185242 I2C: 00:28
1291 12:17:52.188266 I2C: 00:29
1292 12:17:52.188346 PCI: 00:19.2
1293 12:17:52.201654 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1294 12:17:52.211018 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1295 12:17:52.211108 PCI: 00:1a.0
1296 12:17:52.221009 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1297 12:17:52.224651 PCI: 00:1e.0
1298 12:17:52.227615 PCI: 00:1e.2 child on link 0 SPI: 00
1299 12:17:52.238023 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1300 12:17:52.241150 SPI: 00
1301 12:17:52.244211 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1302 12:17:52.254111 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1303 12:17:52.254201 PNP: 0c09.0
1304 12:17:52.264157 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1305 12:17:52.264248 PCI: 00:1f.2
1306 12:17:52.274587 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1307 12:17:52.284059 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1308 12:17:52.287200 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1309 12:17:52.297899 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1310 12:17:52.307190 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1311 12:17:52.310492 GENERIC: 0.0
1312 12:17:52.310583 PCI: 00:1f.5
1313 12:17:52.320775 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1314 12:17:52.323966 Done allocating resources.
1315 12:17:52.330363 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2098 ms
1316 12:17:52.333988 Enabling resources...
1317 12:17:52.337282 PCI: 00:00.0 subsystem <- 8086/4e22
1318 12:17:52.340499 PCI: 00:00.0 cmd <- 06
1319 12:17:52.343938 PCI: 00:02.0 subsystem <- 8086/4e55
1320 12:17:52.347422 PCI: 00:02.0 cmd <- 03
1321 12:17:52.350860 PCI: 00:04.0 subsystem <- 8086/4e03
1322 12:17:52.353680 PCI: 00:04.0 cmd <- 02
1323 12:17:52.357341 PCI: 00:05.0 bridge ctrl <- 0003
1324 12:17:52.360180 PCI: 00:05.0 subsystem <- 8086/4e19
1325 12:17:52.360269 PCI: 00:05.0 cmd <- 02
1326 12:17:52.363618 PCI: 00:08.0 cmd <- 06
1327 12:17:52.367430 PCI: 00:14.0 subsystem <- 8086/4ded
1328 12:17:52.370630 PCI: 00:14.0 cmd <- 02
1329 12:17:52.373603 PCI: 00:14.3 subsystem <- 8086/4df0
1330 12:17:52.377400 PCI: 00:14.3 cmd <- 02
1331 12:17:52.380279 PCI: 00:14.5 subsystem <- 8086/4df8
1332 12:17:52.384634 PCI: 00:14.5 cmd <- 06
1333 12:17:52.387254 PCI: 00:15.0 subsystem <- 8086/4de8
1334 12:17:52.390277 PCI: 00:15.0 cmd <- 02
1335 12:17:52.393643 PCI: 00:15.1 subsystem <- 8086/4de9
1336 12:17:52.393733 PCI: 00:15.1 cmd <- 02
1337 12:17:52.400556 PCI: 00:15.2 subsystem <- 8086/4dea
1338 12:17:52.400647 PCI: 00:15.2 cmd <- 02
1339 12:17:52.403490 PCI: 00:15.3 subsystem <- 8086/4deb
1340 12:17:52.406895 PCI: 00:15.3 cmd <- 02
1341 12:17:52.410087 PCI: 00:16.0 subsystem <- 8086/4de0
1342 12:17:52.413353 PCI: 00:16.0 cmd <- 02
1343 12:17:52.416822 PCI: 00:19.0 subsystem <- 8086/4dc5
1344 12:17:52.420288 PCI: 00:19.0 cmd <- 02
1345 12:17:52.423510 PCI: 00:19.2 subsystem <- 8086/4dc7
1346 12:17:52.427054 PCI: 00:19.2 cmd <- 06
1347 12:17:52.430162 PCI: 00:1a.0 subsystem <- 8086/4dc4
1348 12:17:52.433195 PCI: 00:1a.0 cmd <- 06
1349 12:17:52.436692 PCI: 00:1e.2 subsystem <- 8086/4daa
1350 12:17:52.436782 PCI: 00:1e.2 cmd <- 06
1351 12:17:52.443136 PCI: 00:1f.0 subsystem <- 8086/4d87
1352 12:17:52.443227 PCI: 00:1f.0 cmd <- 407
1353 12:17:52.446645 PCI: 00:1f.3 subsystem <- 8086/4dc8
1354 12:17:52.449855 PCI: 00:1f.3 cmd <- 02
1355 12:17:52.453256 PCI: 00:1f.5 subsystem <- 8086/4da4
1356 12:17:52.456425 PCI: 00:1f.5 cmd <- 406
1357 12:17:52.460743 done.
1358 12:17:52.464110 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1359 12:17:52.467400 Initializing devices...
1360 12:17:52.471405 Root Device init
1361 12:17:52.471493 mainboard: EC init
1362 12:17:52.477750 Chrome EC: Set SMI mask to 0x0000000000000000
1363 12:17:52.480702 Chrome EC: clear events_b mask to 0x0000000000000000
1364 12:17:52.487573 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1365 12:17:52.494218 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1366 12:17:52.500747 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1367 12:17:52.504012 Chrome EC: Set WAKE mask to 0x0000000000000000
1368 12:17:52.507456 Root Device init finished in 35 msecs
1369 12:17:52.511915 PCI: 00:00.0 init
1370 12:17:52.514772 CPU TDP = 6 Watts
1371 12:17:52.514860 CPU PL1 = 7 Watts
1372 12:17:52.518359 CPU PL2 = 12 Watts
1373 12:17:52.521501 PCI: 00:00.0 init finished in 6 msecs
1374 12:17:52.524993 PCI: 00:02.0 init
1375 12:17:52.528167 GMA: Found VBT in CBFS
1376 12:17:52.528254 GMA: Found valid VBT in CBFS
1377 12:17:52.535347 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1378 12:17:52.541827 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1379 12:17:52.548096 PCI: 00:02.0 init finished in 18 msecs
1380 12:17:52.548184 PCI: 00:08.0 init
1381 12:17:52.551570 PCI: 00:08.0 init finished in 0 msecs
1382 12:17:52.555046 PCI: 00:14.0 init
1383 12:17:52.558337 XHCI: Updated LFPS sampling OFF time to 9 ms
1384 12:17:52.565077 PCI: 00:14.0 init finished in 4 msecs
1385 12:17:52.565165 PCI: 00:15.0 init
1386 12:17:52.568412 I2C bus 0 version 0x3230302a
1387 12:17:52.571599 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1388 12:17:52.578495 PCI: 00:15.0 init finished in 6 msecs
1389 12:17:52.578583 PCI: 00:15.1 init
1390 12:17:52.581611 I2C bus 1 version 0x3230302a
1391 12:17:52.585113 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1392 12:17:52.588733 PCI: 00:15.1 init finished in 6 msecs
1393 12:17:52.591848 PCI: 00:15.2 init
1394 12:17:52.595017 I2C bus 2 version 0x3230302a
1395 12:17:52.598480 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1396 12:17:52.601792 PCI: 00:15.2 init finished in 6 msecs
1397 12:17:52.604801 PCI: 00:15.3 init
1398 12:17:52.608249 I2C bus 3 version 0x3230302a
1399 12:17:52.611493 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1400 12:17:52.614786 PCI: 00:15.3 init finished in 6 msecs
1401 12:17:52.614874 PCI: 00:16.0 init
1402 12:17:52.621898 PCI: 00:16.0 init finished in 0 msecs
1403 12:17:52.621986 PCI: 00:19.0 init
1404 12:17:52.624974 I2C bus 4 version 0x3230302a
1405 12:17:52.628172 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1406 12:17:52.631532 PCI: 00:19.0 init finished in 6 msecs
1407 12:17:52.635127 PCI: 00:1a.0 init
1408 12:17:52.638578 PCI: 00:1a.0 init finished in 0 msecs
1409 12:17:52.642142 PCI: 00:1f.0 init
1410 12:17:52.645431 IOAPIC: Initializing IOAPIC at 0xfec00000
1411 12:17:52.651555 IOAPIC: Bootstrap Processor Local APIC = 0x00
1412 12:17:52.651643 IOAPIC: ID = 0x02
1413 12:17:52.655005 IOAPIC: Dumping registers
1414 12:17:52.658414 reg 0x0000: 0x02000000
1415 12:17:52.658502 reg 0x0001: 0x00770020
1416 12:17:52.661570 reg 0x0002: 0x00000000
1417 12:17:52.665449 PCI: 00:1f.0 init finished in 21 msecs
1418 12:17:52.668285 PCI: 00:1f.2 init
1419 12:17:52.672244 Disabling ACPI via APMC.
1420 12:17:52.675869 APMC done.
1421 12:17:52.678803 PCI: 00:1f.2 init finished in 5 msecs
1422 12:17:52.689349 PNP: 0c09.0 init
1423 12:17:52.693313 Google Chrome EC uptime: 6.550 seconds
1424 12:17:52.699527 Google Chrome AP resets since EC boot: 0
1425 12:17:52.702576 Google Chrome most recent AP reset causes:
1426 12:17:52.709501 Google Chrome EC reset flags at last EC boot: reset-pin
1427 12:17:52.712561 PNP: 0c09.0 init finished in 18 msecs
1428 12:17:52.712649 Devices initialized
1429 12:17:52.715889 Show all devs... After init.
1430 12:17:52.719226 Root Device: enabled 1
1431 12:17:52.722361 CPU_CLUSTER: 0: enabled 1
1432 12:17:52.725993 DOMAIN: 0000: enabled 1
1433 12:17:52.726083 PCI: 00:00.0: enabled 1
1434 12:17:52.729491 PCI: 00:02.0: enabled 1
1435 12:17:52.732725 PCI: 00:04.0: enabled 1
1436 12:17:52.732816 PCI: 00:05.0: enabled 1
1437 12:17:52.735793 PCI: 00:09.0: enabled 0
1438 12:17:52.739351 PCI: 00:12.6: enabled 0
1439 12:17:52.742293 PCI: 00:14.0: enabled 1
1440 12:17:52.742383 PCI: 00:14.1: enabled 0
1441 12:17:52.745875 PCI: 00:14.2: enabled 0
1442 12:17:52.749120 PCI: 00:14.3: enabled 1
1443 12:17:52.752463 PCI: 00:14.5: enabled 1
1444 12:17:52.752553 PCI: 00:15.0: enabled 1
1445 12:17:52.755860 PCI: 00:15.1: enabled 1
1446 12:17:52.759377 PCI: 00:15.2: enabled 1
1447 12:17:52.762355 PCI: 00:15.3: enabled 1
1448 12:17:52.762445 PCI: 00:16.0: enabled 1
1449 12:17:52.765844 PCI: 00:16.1: enabled 0
1450 12:17:52.769155 PCI: 00:16.4: enabled 0
1451 12:17:52.769251 PCI: 00:16.5: enabled 0
1452 12:17:52.772407 PCI: 00:17.0: enabled 0
1453 12:17:52.776155 PCI: 00:19.0: enabled 1
1454 12:17:52.779497 PCI: 00:19.1: enabled 0
1455 12:17:52.779609 PCI: 00:19.2: enabled 1
1456 12:17:52.782416 PCI: 00:1a.0: enabled 1
1457 12:17:52.785857 PCI: 00:1c.0: enabled 0
1458 12:17:52.789135 PCI: 00:1c.1: enabled 0
1459 12:17:52.789269 PCI: 00:1c.2: enabled 0
1460 12:17:52.792249 PCI: 00:1c.3: enabled 0
1461 12:17:52.795596 PCI: 00:1c.4: enabled 0
1462 12:17:52.798813 PCI: 00:1c.5: enabled 0
1463 12:17:52.798981 PCI: 00:1c.6: enabled 0
1464 12:17:52.802448 PCI: 00:1c.7: enabled 1
1465 12:17:52.806126 PCI: 00:1e.0: enabled 0
1466 12:17:52.806349 PCI: 00:1e.1: enabled 0
1467 12:17:52.809147 PCI: 00:1e.2: enabled 1
1468 12:17:52.812894 PCI: 00:1e.3: enabled 0
1469 12:17:52.815740 PCI: 00:1f.0: enabled 1
1470 12:17:52.816074 PCI: 00:1f.1: enabled 0
1471 12:17:52.819248 PCI: 00:1f.2: enabled 1
1472 12:17:52.822761 PCI: 00:1f.3: enabled 1
1473 12:17:52.825886 PCI: 00:1f.4: enabled 0
1474 12:17:52.826350 PCI: 00:1f.5: enabled 1
1475 12:17:52.829430 PCI: 00:1f.7: enabled 0
1476 12:17:52.832375 GENERIC: 0.0: enabled 1
1477 12:17:52.835836 GENERIC: 0.0: enabled 1
1478 12:17:52.836302 USB0 port 0: enabled 1
1479 12:17:52.839132 GENERIC: 0.0: enabled 1
1480 12:17:52.842570 I2C: 00:2c: enabled 1
1481 12:17:52.843034 I2C: 00:15: enabled 1
1482 12:17:52.845879 GENERIC: 0.0: enabled 0
1483 12:17:52.849221 I2C: 00:15: enabled 1
1484 12:17:52.849686 I2C: 00:10: enabled 0
1485 12:17:52.852794 I2C: 00:10: enabled 0
1486 12:17:52.855685 I2C: 00:2c: enabled 1
1487 12:17:52.856187 I2C: 00:40: enabled 1
1488 12:17:52.859040 I2C: 00:10: enabled 1
1489 12:17:52.862541 I2C: 00:39: enabled 1
1490 12:17:52.863005 I2C: 00:36: enabled 1
1491 12:17:52.865504 I2C: 00:10: enabled 0
1492 12:17:52.869420 I2C: 00:0c: enabled 1
1493 12:17:52.869887 I2C: 00:50: enabled 1
1494 12:17:52.872541 I2C: 00:1a: enabled 1
1495 12:17:52.875513 I2C: 00:1a: enabled 0
1496 12:17:52.876019 I2C: 00:1a: enabled 0
1497 12:17:52.879065 I2C: 00:28: enabled 1
1498 12:17:52.882295 I2C: 00:29: enabled 1
1499 12:17:52.885884 PCI: 00:00.0: enabled 1
1500 12:17:52.886359 SPI: 00: enabled 1
1501 12:17:52.889168 PNP: 0c09.0: enabled 1
1502 12:17:52.892270 GENERIC: 0.0: enabled 0
1503 12:17:52.892736 USB2 port 0: enabled 1
1504 12:17:52.895899 USB2 port 1: enabled 1
1505 12:17:52.898916 USB2 port 2: enabled 1
1506 12:17:52.899382 USB2 port 3: enabled 1
1507 12:17:52.902392 USB2 port 4: enabled 0
1508 12:17:52.905821 USB2 port 5: enabled 1
1509 12:17:52.906287 USB2 port 6: enabled 0
1510 12:17:52.908934 USB2 port 7: enabled 1
1511 12:17:52.912677 USB3 port 0: enabled 1
1512 12:17:52.916012 USB3 port 1: enabled 1
1513 12:17:52.916474 USB3 port 2: enabled 1
1514 12:17:52.918893 USB3 port 3: enabled 1
1515 12:17:52.922273 APIC: 00: enabled 1
1516 12:17:52.922734 APIC: 02: enabled 1
1517 12:17:52.925647 PCI: 00:08.0: enabled 1
1518 12:17:52.932355 BS: BS_DEV_INIT run times (exec / console): 22 / 438 ms
1519 12:17:52.935733 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1520 12:17:52.938699 ELOG: NV offset 0xbfa000 size 0x1000
1521 12:17:52.946273 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1522 12:17:52.953117 ELOG: Event(17) added with size 13 at 2023-03-22 12:17:52 UTC
1523 12:17:52.960140 ELOG: Event(92) added with size 9 at 2023-03-22 12:17:52 UTC
1524 12:17:52.966166 ELOG: Event(93) added with size 9 at 2023-03-22 12:17:52 UTC
1525 12:17:52.973145 ELOG: Event(9E) added with size 10 at 2023-03-22 12:17:52 UTC
1526 12:17:52.979948 ELOG: Event(9F) added with size 14 at 2023-03-22 12:17:52 UTC
1527 12:17:52.983018 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1528 12:17:52.989459 ELOG: Event(A1) added with size 10 at 2023-03-22 12:17:52 UTC
1529 12:17:52.999887 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1530 12:17:53.003253 ELOG: Event(A0) added with size 9 at 2023-03-22 12:17:52 UTC
1531 12:17:53.009617 elog_add_boot_reason: Logged dev mode boot
1532 12:17:53.016682 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1533 12:17:53.017134 Finalize devices...
1534 12:17:53.020206 Devices finalized
1535 12:17:53.023383 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1536 12:17:53.030051 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1537 12:17:53.036476 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1538 12:17:53.039671 ME: HFSTS1 : 0x80030045
1539 12:17:53.042997 ME: HFSTS2 : 0x30280136
1540 12:17:53.046391 ME: HFSTS3 : 0x00000050
1541 12:17:53.052922 ME: HFSTS4 : 0x00004000
1542 12:17:53.056424 ME: HFSTS5 : 0x00000000
1543 12:17:53.059811 ME: HFSTS6 : 0x40400006
1544 12:17:53.062892 ME: Manufacturing Mode : NO
1545 12:17:53.066194 ME: FW Partition Table : OK
1546 12:17:53.070128 ME: Bringup Loader Failure : NO
1547 12:17:53.073718 ME: Firmware Init Complete : NO
1548 12:17:53.076175 ME: Boot Options Present : NO
1549 12:17:53.079256 ME: Update In Progress : NO
1550 12:17:53.082884 ME: D0i3 Support : YES
1551 12:17:53.085763 ME: Low Power State Enabled : NO
1552 12:17:53.089551 ME: CPU Replaced : YES
1553 12:17:53.092421 ME: CPU Replacement Valid : YES
1554 12:17:53.095860 ME: Current Working State : 5
1555 12:17:53.099194 ME: Current Operation State : 1
1556 12:17:53.102674 ME: Current Operation Mode : 3
1557 12:17:53.105766 ME: Error Code : 0
1558 12:17:53.109356 ME: CPU Debug Disabled : YES
1559 12:17:53.112695 ME: TXT Support : NO
1560 12:17:53.118999 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1561 12:17:53.122400 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1562 12:17:53.129253 ACPI: Writing ACPI tables at 76b27000.
1563 12:17:53.129342 ACPI: * FACS
1564 12:17:53.132840 ACPI: * DSDT
1565 12:17:53.136237 Ramoops buffer: 0x100000@0x76a26000.
1566 12:17:53.139771 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1567 12:17:53.146084 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1568 12:17:53.149325 Google Chrome EC: version:
1569 12:17:53.152703 ro: magolor_1.1.9999-103b6f9
1570 12:17:53.152836 rw: magolor_1.1.9999-103b6f9
1571 12:17:53.156299 running image: 1
1572 12:17:53.162668 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1573 12:17:53.166117 ACPI: * FADT
1574 12:17:53.166304 SCI is IRQ9
1575 12:17:53.169659 ACPI: added table 1/32, length now 40
1576 12:17:53.172710 ACPI: * SSDT
1577 12:17:53.176610 Found 1 CPU(s) with 2 core(s) each.
1578 12:17:53.179596 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1579 12:17:53.186639 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1580 12:17:53.189630 Could not locate 'wifi_sar' in VPD.
1581 12:17:53.193093 Checking CBFS for default SAR values
1582 12:17:53.199320 wifi_sar_defaults.hex has bad len in CBFS
1583 12:17:53.203412 failed from getting SAR limits!
1584 12:17:53.205957 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1585 12:17:53.209442 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1586 12:17:53.215861 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1587 12:17:53.219547 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1588 12:17:53.226309 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1589 12:17:53.229761 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1590 12:17:53.235787 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1591 12:17:53.242535 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1592 12:17:53.249675 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1593 12:17:53.252769 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1594 12:17:53.259765 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1595 12:17:53.265777 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1596 12:17:53.269629 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1597 12:17:53.275550 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1598 12:17:53.279363 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1599 12:17:53.286667 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1600 12:17:53.290062 PS2K: Passing 101 keymaps to kernel
1601 12:17:53.296445 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1602 12:17:53.303307 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1603 12:17:53.306798 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1604 12:17:53.313373 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1605 12:17:53.316707 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1606 12:17:53.323545 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1607 12:17:53.330086 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1608 12:17:53.337172 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1609 12:17:53.339919 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1610 12:17:53.347022 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1611 12:17:53.349984 ACPI: added table 2/32, length now 44
1612 12:17:53.353265 ACPI: * MCFG
1613 12:17:53.356658 ACPI: added table 3/32, length now 48
1614 12:17:53.357155 ACPI: * TPM2
1615 12:17:53.359958 TPM2 log created at 0x76a16000
1616 12:17:53.363039 ACPI: added table 4/32, length now 52
1617 12:17:53.366118 ACPI: * MADT
1618 12:17:53.366573 SCI is IRQ9
1619 12:17:53.369669 ACPI: added table 5/32, length now 56
1620 12:17:53.373068 current = 76b2d580
1621 12:17:53.376428 ACPI: * DMAR
1622 12:17:53.379685 ACPI: added table 6/32, length now 60
1623 12:17:53.383181 ACPI: added table 7/32, length now 64
1624 12:17:53.383743 ACPI: * HPET
1625 12:17:53.386323 ACPI: added table 8/32, length now 68
1626 12:17:53.389503 ACPI: done.
1627 12:17:53.392798 ACPI tables: 26304 bytes.
1628 12:17:53.396695 smbios_write_tables: 76a15000
1629 12:17:53.399899 EC returned error result code 3
1630 12:17:53.403088 Couldn't obtain OEM name from CBI
1631 12:17:53.403531 Create SMBIOS type 16
1632 12:17:53.406173 Create SMBIOS type 17
1633 12:17:53.409350 GENERIC: 0.0 (WIFI Device)
1634 12:17:53.413045 SMBIOS tables: 913 bytes.
1635 12:17:53.416661 Writing table forward entry at 0x00000500
1636 12:17:53.422699 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1637 12:17:53.426041 Writing coreboot table at 0x76b4b000
1638 12:17:53.432657 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1639 12:17:53.435983 1. 0000000000001000-000000000009ffff: RAM
1640 12:17:53.443019 2. 00000000000a0000-00000000000fffff: RESERVED
1641 12:17:53.446314 3. 0000000000100000-0000000076a14fff: RAM
1642 12:17:53.453670 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1643 12:17:53.456199 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1644 12:17:53.463559 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1645 12:17:53.466379 7. 0000000077000000-000000007fbfffff: RESERVED
1646 12:17:53.472754 8. 00000000c0000000-00000000cfffffff: RESERVED
1647 12:17:53.476021 9. 00000000fb000000-00000000fb000fff: RESERVED
1648 12:17:53.483316 10. 00000000fe000000-00000000fe00ffff: RESERVED
1649 12:17:53.486314 11. 00000000fea80000-00000000fea87fff: RESERVED
1650 12:17:53.489265 12. 00000000fed80000-00000000fed87fff: RESERVED
1651 12:17:53.495813 13. 00000000fed90000-00000000fed92fff: RESERVED
1652 12:17:53.499200 14. 00000000feda0000-00000000feda1fff: RESERVED
1653 12:17:53.506166 15. 0000000100000000-00000001803fffff: RAM
1654 12:17:53.506748 Passing 4 GPIOs to payload:
1655 12:17:53.512852 NAME | PORT | POLARITY | VALUE
1656 12:17:53.519358 lid | undefined | high | high
1657 12:17:53.522600 power | undefined | high | low
1658 12:17:53.529179 oprom | undefined | high | low
1659 12:17:53.532414 EC in RW | 0x000000b9 | high | low
1660 12:17:53.539176 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 26d7
1661 12:17:53.542676 coreboot table: 1504 bytes.
1662 12:17:53.546180 IMD ROOT 0. 0x76fff000 0x00001000
1663 12:17:53.549476 IMD SMALL 1. 0x76ffe000 0x00001000
1664 12:17:53.552403 FSP MEMORY 2. 0x76c4e000 0x003b0000
1665 12:17:53.559137 CONSOLE 3. 0x76c2e000 0x00020000
1666 12:17:53.563179 FMAP 4. 0x76c2d000 0x00000578
1667 12:17:53.566005 TIME STAMP 5. 0x76c2c000 0x00000910
1668 12:17:53.569721 VBOOT WORK 6. 0x76c18000 0x00014000
1669 12:17:53.572284 ROMSTG STCK 7. 0x76c17000 0x00001000
1670 12:17:53.576056 AFTER CAR 8. 0x76c0d000 0x0000a000
1671 12:17:53.579182 RAMSTAGE 9. 0x76ba7000 0x00066000
1672 12:17:53.582456 REFCODE 10. 0x76b67000 0x00040000
1673 12:17:53.589355 SMM BACKUP 11. 0x76b57000 0x00010000
1674 12:17:53.592806 4f444749 12. 0x76b55000 0x00002000
1675 12:17:53.596051 EXT VBT13. 0x76b53000 0x00001c43
1676 12:17:53.599239 COREBOOT 14. 0x76b4b000 0x00008000
1677 12:17:53.602615 ACPI 15. 0x76b27000 0x00024000
1678 12:17:53.606086 ACPI GNVS 16. 0x76b26000 0x00001000
1679 12:17:53.608979 RAMOOPS 17. 0x76a26000 0x00100000
1680 12:17:53.612549 TPM2 TCGLOG18. 0x76a16000 0x00010000
1681 12:17:53.615534 SMBIOS 19. 0x76a15000 0x00000800
1682 12:17:53.619048 IMD small region:
1683 12:17:53.622941 IMD ROOT 0. 0x76ffec00 0x00000400
1684 12:17:53.625851 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1685 12:17:53.628805 VPD 2. 0x76ffeb80 0x0000004c
1686 12:17:53.636208 POWER STATE 3. 0x76ffeb40 0x00000040
1687 12:17:53.639256 ROMSTAGE 4. 0x76ffeb20 0x00000004
1688 12:17:53.642286 MEM INFO 5. 0x76ffe940 0x000001e0
1689 12:17:53.648971 BS: BS_WRITE_TABLES run times (exec / console): 7 / 517 ms
1690 12:17:53.652599 MTRR: Physical address space:
1691 12:17:53.658981 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1692 12:17:53.662543 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1693 12:17:53.669452 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1694 12:17:53.675870 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1695 12:17:53.682363 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1696 12:17:53.689298 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1697 12:17:53.695601 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1698 12:17:53.698663 MTRR: Fixed MSR 0x250 0x0606060606060606
1699 12:17:53.702092 MTRR: Fixed MSR 0x258 0x0606060606060606
1700 12:17:53.705744 MTRR: Fixed MSR 0x259 0x0000000000000000
1701 12:17:53.712352 MTRR: Fixed MSR 0x268 0x0606060606060606
1702 12:17:53.715423 MTRR: Fixed MSR 0x269 0x0606060606060606
1703 12:17:53.718919 MTRR: Fixed MSR 0x26a 0x0606060606060606
1704 12:17:53.722071 MTRR: Fixed MSR 0x26b 0x0606060606060606
1705 12:17:53.728789 MTRR: Fixed MSR 0x26c 0x0606060606060606
1706 12:17:53.732587 MTRR: Fixed MSR 0x26d 0x0606060606060606
1707 12:17:53.735265 MTRR: Fixed MSR 0x26e 0x0606060606060606
1708 12:17:53.739384 MTRR: Fixed MSR 0x26f 0x0606060606060606
1709 12:17:53.741875 call enable_fixed_mtrr()
1710 12:17:53.745908 CPU physical address size: 39 bits
1711 12:17:53.752043 MTRR: default type WB/UC MTRR counts: 6/5.
1712 12:17:53.755501 MTRR: UC selected as default type.
1713 12:17:53.762372 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1714 12:17:53.765496 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1715 12:17:53.772008 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1716 12:17:53.778425 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1717 12:17:53.785075 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1718 12:17:53.785532
1719 12:17:53.788516 MTRR check
1720 12:17:53.789065 Fixed MTRRs : Enabled
1721 12:17:53.792883 Variable MTRRs: Enabled
1722 12:17:53.793400
1723 12:17:53.795150 MTRR: Fixed MSR 0x250 0x0606060606060606
1724 12:17:53.801866 MTRR: Fixed MSR 0x258 0x0606060606060606
1725 12:17:53.805372 MTRR: Fixed MSR 0x259 0x0000000000000000
1726 12:17:53.808614 MTRR: Fixed MSR 0x268 0x0606060606060606
1727 12:17:53.812086 MTRR: Fixed MSR 0x269 0x0606060606060606
1728 12:17:53.815271 MTRR: Fixed MSR 0x26a 0x0606060606060606
1729 12:17:53.821746 MTRR: Fixed MSR 0x26b 0x0606060606060606
1730 12:17:53.825290 MTRR: Fixed MSR 0x26c 0x0606060606060606
1731 12:17:53.828389 MTRR: Fixed MSR 0x26d 0x0606060606060606
1732 12:17:53.832054 MTRR: Fixed MSR 0x26e 0x0606060606060606
1733 12:17:53.838615 MTRR: Fixed MSR 0x26f 0x0606060606060606
1734 12:17:53.842234 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1735 12:17:53.845045 call enable_fixed_mtrr()
1736 12:17:53.849520 Checking cr50 for pending updates
1737 12:17:53.853257 CPU physical address size: 39 bits
1738 12:17:53.856394 Reading cr50 TPM mode
1739 12:17:53.866782 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1740 12:17:53.873421 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1741 12:17:53.877223 Checking segment from ROM address 0xfff9d5b8
1742 12:17:53.883644 Checking segment from ROM address 0xfff9d5d4
1743 12:17:53.887174 Loading segment from ROM address 0xfff9d5b8
1744 12:17:53.890493 code (compression=0)
1745 12:17:53.897010 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1746 12:17:53.907013 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1747 12:17:53.909871 it's not compressed!
1748 12:17:54.035565 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1749 12:17:54.041989 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1750 12:17:54.049452 Loading segment from ROM address 0xfff9d5d4
1751 12:17:54.052447 Entry Point 0x30000000
1752 12:17:54.053031 Loaded segments
1753 12:17:54.059413 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1754 12:17:54.075746 Finalizing chipset.
1755 12:17:54.079176 Finalizing SMM.
1756 12:17:54.079742 APMC done.
1757 12:17:54.085180 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1758 12:17:54.088924 mp_park_aps done after 0 msecs.
1759 12:17:54.091890 Jumping to boot code at 0x30000000(0x76b4b000)
1760 12:17:54.102624 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1761 12:17:54.103074
1762 12:17:54.103440
1763 12:17:54.103821
1764 12:17:54.105611 Starting depthcharge on Magolor...
1765 12:17:54.106077
1766 12:17:54.107039 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1767 12:17:54.107548 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1768 12:17:54.108016 Setting prompt string to ['dedede:']
1769 12:17:54.108429 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1770 12:17:54.115778 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1771 12:17:54.116242
1772 12:17:54.121976 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1773 12:17:54.122435
1774 12:17:54.125314 fw_config match found: AUDIO_AMP=UNPROVISIONED
1775 12:17:54.125775
1776 12:17:54.128845 Wipe memory regions:
1777 12:17:54.129288
1778 12:17:54.131892 [0x00000000001000, 0x000000000a0000)
1779 12:17:54.132352
1780 12:17:54.135386 [0x00000000100000, 0x00000030000000)
1781 12:17:54.264135
1782 12:17:54.267208 [0x00000031062170, 0x00000076a15000)
1783 12:17:54.435756
1784 12:17:54.439034 [0x00000100000000, 0x00000180400000)
1785 12:17:55.500771
1786 12:17:55.501045 R8152: Initializing
1787 12:17:55.501222
1788 12:17:55.504096 Version 6 (ocp_data = 5c30)
1789 12:17:55.507465
1790 12:17:55.507682 R8152: Done initializing
1791 12:17:55.507882
1792 12:17:55.510753 Adding net device
1793 12:17:55.510965
1794 12:17:55.514117 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1795 12:17:55.517469
1796 12:17:55.517701
1797 12:17:55.517871
1798 12:17:55.518306 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1800 12:17:55.619435 dedede: tftpboot 192.168.201.1 9729475/tftp-deploy-_lcudwjg/kernel/bzImage 9729475/tftp-deploy-_lcudwjg/kernel/cmdline 9729475/tftp-deploy-_lcudwjg/ramdisk/ramdisk.cpio.gz
1801 12:17:55.620064 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1802 12:17:55.620602 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1803 12:17:55.624915 tftpboot 192.168.201.1 9729475/tftp-deploy-_lcudwjg/kernel/bzImagoy-_lcudwjg/kernel/cmdline 9729475/tftp-deploy-_lcudwjg/ramdisk/ramdisk.cpio.gz
1804 12:17:55.625408
1805 12:17:55.625754 Waiting for link
1806 12:17:55.826667
1807 12:17:55.826808 done.
1808 12:17:55.826878
1809 12:17:55.826942 MAC: 00:24:32:30:7b:5a
1810 12:17:55.827005
1811 12:17:55.829700 Sending DHCP discover... done.
1812 12:17:55.829788
1813 12:17:55.833252 Waiting for reply... done.
1814 12:17:55.833340
1815 12:17:55.837009 Sending DHCP request... done.
1816 12:17:55.837098
1817 12:17:55.840058 Waiting for reply... done.
1818 12:17:55.840145
1819 12:17:55.842890 My ip is 192.168.201.19
1820 12:17:55.842976
1821 12:17:55.846589 The DHCP server ip is 192.168.201.1
1822 12:17:55.846676
1823 12:17:55.849758 TFTP server IP predefined by user: 192.168.201.1
1824 12:17:55.849857
1825 12:17:55.856624 Bootfile predefined by user: 9729475/tftp-deploy-_lcudwjg/kernel/bzImage
1826 12:17:55.856722
1827 12:17:55.859909 Sending tftp read request... done.
1828 12:17:55.860005
1829 12:17:55.863015 Waiting for the transfer...
1830 12:17:55.863112
1831 12:17:56.558223 00000000 ################################################################
1832 12:17:56.558364
1833 12:17:57.118848 00080000 ################################################################
1834 12:17:57.119001
1835 12:17:57.683203 00100000 ################################################################
1836 12:17:57.683349
1837 12:17:58.283914 00180000 ################################################################
1838 12:17:58.284051
1839 12:17:58.868851 00200000 ################################################################
1840 12:17:58.869005
1841 12:17:59.429718 00280000 ################################################################
1842 12:17:59.429874
1843 12:17:59.987734 00300000 ################################################################
1844 12:17:59.987899
1845 12:18:00.546243 00380000 ################################################################
1846 12:18:00.546391
1847 12:18:01.124684 00400000 ################################################################
1848 12:18:01.124844
1849 12:18:01.672219 00480000 ################################################################
1850 12:18:01.672356
1851 12:18:02.212193 00500000 ################################################################
1852 12:18:02.212338
1853 12:18:02.754591 00580000 ################################################################
1854 12:18:02.754744
1855 12:18:03.298727 00600000 ################################################################
1856 12:18:03.298881
1857 12:18:03.863415 00680000 ################################################################
1858 12:18:03.863567
1859 12:18:04.507919 00700000 ################################################################
1860 12:18:04.508474
1861 12:18:05.165576 00780000 ################################################################
1862 12:18:05.166114
1863 12:18:05.816228 00800000 ################################################################
1864 12:18:05.816931
1865 12:18:06.457010 00880000 ################################################################
1866 12:18:06.457610
1867 12:18:06.959817 00900000 ################################################# done.
1868 12:18:06.960356
1869 12:18:06.963113 The bootfile was 9834496 bytes long.
1870 12:18:06.963561
1871 12:18:06.966903 Sending tftp read request... done.
1872 12:18:06.967346
1873 12:18:06.969705 Waiting for the transfer...
1874 12:18:06.970144
1875 12:18:07.541194 00000000 ################################################################
1876 12:18:07.541347
1877 12:18:08.100937 00080000 ################################################################
1878 12:18:08.101088
1879 12:18:08.698230 00100000 ################################################################
1880 12:18:08.698384
1881 12:18:09.291587 00180000 ################################################################
1882 12:18:09.291779
1883 12:18:09.879889 00200000 ################################################################
1884 12:18:09.880045
1885 12:18:10.473254 00280000 ################################################################
1886 12:18:10.473407
1887 12:18:11.060188 00300000 ################################################################
1888 12:18:11.060340
1889 12:18:11.639585 00380000 ################################################################
1890 12:18:11.639776
1891 12:18:12.227455 00400000 ################################################################
1892 12:18:12.227609
1893 12:18:12.846950 00480000 ################################################################
1894 12:18:12.847105
1895 12:18:13.415309 00500000 ################################################################
1896 12:18:13.415451
1897 12:18:13.795297 00580000 ############################################ done.
1898 12:18:13.795448
1899 12:18:13.798327 Sending tftp read request... done.
1900 12:18:13.798413
1901 12:18:13.801472 Waiting for the transfer...
1902 12:18:13.801557
1903 12:18:13.801624 00000000 # done.
1904 12:18:13.801691
1905 12:18:13.811580 Command line loaded dynamically from TFTP file: 9729475/tftp-deploy-_lcudwjg/kernel/cmdline
1906 12:18:13.811666
1907 12:18:13.831545 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729475/extract-nfsrootfs-1m6j3lfs,tcp,hard ip=dhcp tftpserverip=192.168.201.1
1908 12:18:13.831659
1909 12:18:13.834749 ec_init: CrosEC protocol v3 supported (256, 256)
1910 12:18:13.841638
1911 12:18:13.844892 Shutting down all USB controllers.
1912 12:18:13.844979
1913 12:18:13.845048 Removing current net device
1914 12:18:13.845112
1915 12:18:13.848415 Finalizing coreboot
1916 12:18:13.848514
1917 12:18:13.855555 Exiting depthcharge with code 4 at timestamp: 26577909
1918 12:18:13.855648
1919 12:18:13.855730
1920 12:18:13.855799 Starting kernel ...
1921 12:18:13.855865
1922 12:18:13.855929
1923 12:18:13.856313 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
1924 12:18:13.856426 start: 2.2.5 auto-login-action (timeout 00:04:27) [common]
1925 12:18:13.856509 Setting prompt string to ['Linux version [0-9]']
1926 12:18:13.856585 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1927 12:18:13.856662 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1929 12:22:40.857403 end: 2.2.5 auto-login-action (duration 00:04:27) [common]
1931 12:22:40.858558 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 267 seconds'
1933 12:22:40.859451 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1936 12:22:40.860978 end: 2 depthcharge-action (duration 00:05:00) [common]
1938 12:22:40.861925 Cleaning after the job
1939 12:22:40.862013 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729475/tftp-deploy-_lcudwjg/ramdisk
1940 12:22:40.862511 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729475/tftp-deploy-_lcudwjg/kernel
1941 12:22:40.863199 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729475/tftp-deploy-_lcudwjg/nfsrootfs
1942 12:22:40.895485 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729475/tftp-deploy-_lcudwjg/modules
1943 12:22:40.896015 start: 5.1 power-off (timeout 00:00:30) [common]
1944 12:22:40.896179 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-6' '--port=1' '--command=off'
1945 12:22:40.972413 >> Command sent successfully.
1946 12:22:40.977315 Returned 0 in 0 seconds
1947 12:22:41.078743 end: 5.1 power-off (duration 00:00:00) [common]
1949 12:22:41.080375 start: 5.2 read-feedback (timeout 00:10:00) [common]
1950 12:22:41.081590 Listened to connection for namespace 'common' for up to 1s
1952 12:22:41.083153 Listened to connection for namespace 'common' for up to 1s
1953 12:22:42.084452 Finalising connection for namespace 'common'
1954 12:22:42.085160 Disconnecting from shell: Finalise
1955 12:22:42.085578
1956 12:22:42.187088 end: 5.2 read-feedback (duration 00:00:01) [common]
1957 12:22:42.187762 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729475
1958 12:22:42.322281 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729475
1959 12:22:42.322480 JobError: Your job cannot terminate cleanly.