Boot log: acer-cb317-1h-c3z6-dedede
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:17:07.647124 lava-dispatcher, installed at version: 2023.01
2 12:17:07.647331 start: 0 validate
3 12:17:07.647476 Start time: 2023-03-22 12:17:07.647465+00:00 (UTC)
4 12:17:07.647630 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:17:07.647770 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
6 12:17:07.938245 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:17:07.938431 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.277-cip94-rt29%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:17:08.229081 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:17:08.229255 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.277-cip94-rt29%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:17:12.850549 validate duration: 5.20
12 12:17:12.850865 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:17:12.851099 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:17:12.851218 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:17:12.851340 Not decompressing ramdisk as can be used compressed.
16 12:17:12.851447 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
17 12:17:12.851523 saving as /var/lib/lava/dispatcher/tmp/9729426/tftp-deploy-60t5nmpz/ramdisk/rootfs.cpio.gz
18 12:17:12.851592 total size: 8429740 (8MB)
19 12:17:13.568925 progress 0% (0MB)
20 12:17:13.579851 progress 5% (0MB)
21 12:17:13.590859 progress 10% (0MB)
22 12:17:13.599565 progress 15% (1MB)
23 12:17:13.605134 progress 20% (1MB)
24 12:17:13.609717 progress 25% (2MB)
25 12:17:13.613546 progress 30% (2MB)
26 12:17:13.616980 progress 35% (2MB)
27 12:17:13.620045 progress 40% (3MB)
28 12:17:13.622914 progress 45% (3MB)
29 12:17:13.625657 progress 50% (4MB)
30 12:17:13.628221 progress 55% (4MB)
31 12:17:13.630638 progress 60% (4MB)
32 12:17:13.632910 progress 65% (5MB)
33 12:17:13.635227 progress 70% (5MB)
34 12:17:13.637337 progress 75% (6MB)
35 12:17:13.639609 progress 80% (6MB)
36 12:17:13.641878 progress 85% (6MB)
37 12:17:13.644147 progress 90% (7MB)
38 12:17:13.646400 progress 95% (7MB)
39 12:17:13.648685 progress 100% (8MB)
40 12:17:13.648833 8MB downloaded in 0.80s (10.08MB/s)
41 12:17:13.649004 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:17:13.649280 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:17:13.649381 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:17:13.649479 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:17:13.649598 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.277-cip94-rt29/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:17:13.649679 saving as /var/lib/lava/dispatcher/tmp/9729426/tftp-deploy-60t5nmpz/kernel/bzImage
48 12:17:13.649749 total size: 9834496 (9MB)
49 12:17:13.649817 No compression specified
50 12:17:13.650774 progress 0% (0MB)
51 12:17:13.653528 progress 5% (0MB)
52 12:17:13.656205 progress 10% (0MB)
53 12:17:13.658867 progress 15% (1MB)
54 12:17:13.661556 progress 20% (1MB)
55 12:17:13.664216 progress 25% (2MB)
56 12:17:13.666863 progress 30% (2MB)
57 12:17:13.669504 progress 35% (3MB)
58 12:17:13.672153 progress 40% (3MB)
59 12:17:13.674799 progress 45% (4MB)
60 12:17:13.677449 progress 50% (4MB)
61 12:17:13.680095 progress 55% (5MB)
62 12:17:13.682735 progress 60% (5MB)
63 12:17:13.685401 progress 65% (6MB)
64 12:17:13.688026 progress 70% (6MB)
65 12:17:13.690632 progress 75% (7MB)
66 12:17:13.693234 progress 80% (7MB)
67 12:17:13.695833 progress 85% (8MB)
68 12:17:13.698436 progress 90% (8MB)
69 12:17:13.701041 progress 95% (8MB)
70 12:17:13.703666 progress 100% (9MB)
71 12:17:13.703795 9MB downloaded in 0.05s (173.55MB/s)
72 12:17:13.703960 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:17:13.704229 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:17:13.704334 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:17:13.704435 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:17:13.704556 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.277-cip94-rt29/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:17:13.704635 saving as /var/lib/lava/dispatcher/tmp/9729426/tftp-deploy-60t5nmpz/modules/modules.tar
79 12:17:13.704705 total size: 462060 (0MB)
80 12:17:13.704773 Using unxz to decompress xz
81 12:17:13.707982 progress 7% (0MB)
82 12:17:13.708385 progress 14% (0MB)
83 12:17:13.708645 progress 21% (0MB)
84 12:17:13.710145 progress 28% (0MB)
85 12:17:13.712416 progress 35% (0MB)
86 12:17:13.714444 progress 42% (0MB)
87 12:17:13.716834 progress 49% (0MB)
88 12:17:13.718949 progress 56% (0MB)
89 12:17:13.721315 progress 63% (0MB)
90 12:17:13.723337 progress 70% (0MB)
91 12:17:13.725741 progress 78% (0MB)
92 12:17:13.728036 progress 85% (0MB)
93 12:17:13.729921 progress 92% (0MB)
94 12:17:13.732396 progress 99% (0MB)
95 12:17:13.740014 0MB downloaded in 0.04s (12.48MB/s)
96 12:17:13.740313 end: 1.3.1 http-download (duration 00:00:00) [common]
98 12:17:13.740606 end: 1.3 download-retry (duration 00:00:00) [common]
99 12:17:13.740713 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
100 12:17:13.740820 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
101 12:17:13.740918 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
102 12:17:13.741014 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
103 12:17:13.741217 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds
104 12:17:13.741340 makedir: /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin
105 12:17:13.741439 makedir: /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/tests
106 12:17:13.741532 makedir: /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/results
107 12:17:13.741650 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-add-keys
108 12:17:13.741802 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-add-sources
109 12:17:13.741954 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-background-process-start
110 12:17:13.742087 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-background-process-stop
111 12:17:13.742216 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-common-functions
112 12:17:13.742342 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-echo-ipv4
113 12:17:13.742471 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-install-packages
114 12:17:13.742597 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-installed-packages
115 12:17:13.742722 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-os-build
116 12:17:13.742848 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-probe-channel
117 12:17:13.742973 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-probe-ip
118 12:17:13.743107 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-target-ip
119 12:17:13.743235 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-target-mac
120 12:17:13.743359 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-target-storage
121 12:17:13.743484 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-test-case
122 12:17:13.743609 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-test-event
123 12:17:13.743732 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-test-feedback
124 12:17:13.743857 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-test-raise
125 12:17:13.743987 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-test-reference
126 12:17:13.744125 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-test-runner
127 12:17:13.744261 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-test-set
128 12:17:13.744398 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-test-shell
129 12:17:13.744540 Updating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-install-packages (oe)
130 12:17:13.744675 Updating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/bin/lava-installed-packages (oe)
131 12:17:13.744793 Creating /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/environment
132 12:17:13.744897 LAVA metadata
133 12:17:13.744979 - LAVA_JOB_ID=9729426
134 12:17:13.745056 - LAVA_DISPATCHER_IP=192.168.201.1
135 12:17:13.745169 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
136 12:17:13.745245 skipped lava-vland-overlay
137 12:17:13.745333 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
138 12:17:13.745430 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
139 12:17:13.745504 skipped lava-multinode-overlay
140 12:17:13.745592 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
141 12:17:13.745687 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
142 12:17:13.745770 Loading test definitions
143 12:17:13.745882 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
144 12:17:13.745967 Using /lava-9729426 at stage 0
145 12:17:13.746268 uuid=9729426_1.4.2.3.1 testdef=None
146 12:17:13.746371 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
147 12:17:13.746475 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
148 12:17:13.747044 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
150 12:17:13.747356 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
151 12:17:13.748010 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
153 12:17:13.748284 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
154 12:17:13.748887 runner path: /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/0/tests/0_dmesg test_uuid 9729426_1.4.2.3.1
155 12:17:13.749053 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
157 12:17:13.749312 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
158 12:17:13.749395 Using /lava-9729426 at stage 1
159 12:17:13.749669 uuid=9729426_1.4.2.3.5 testdef=None
160 12:17:13.749768 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
161 12:17:13.749867 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
162 12:17:13.750534 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
164 12:17:13.750812 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
165 12:17:13.751488 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
167 12:17:13.751753 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
168 12:17:13.752373 runner path: /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/1/tests/1_bootrr test_uuid 9729426_1.4.2.3.5
169 12:17:13.752532 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
171 12:17:13.752769 Creating lava-test-runner.conf files
172 12:17:13.752842 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/0 for stage 0
173 12:17:13.752933 - 0_dmesg
174 12:17:13.753018 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729426/lava-overlay-w2ctlfds/lava-9729426/1 for stage 1
175 12:17:13.753111 - 1_bootrr
176 12:17:13.753214 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
177 12:17:13.753310 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
178 12:17:13.760375 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
179 12:17:13.760501 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
180 12:17:13.760602 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
181 12:17:13.760701 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
182 12:17:13.760800 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
183 12:17:13.965755 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
184 12:17:13.966130 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
185 12:17:13.966249 extracting modules file /var/lib/lava/dispatcher/tmp/9729426/tftp-deploy-60t5nmpz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729426/extract-overlay-ramdisk-d1qcigch/ramdisk
186 12:17:13.979015 end: 1.4.4 extract-modules (duration 00:00:00) [common]
187 12:17:13.979191 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
188 12:17:13.979298 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729426/compress-overlay-ixmo7kvt/overlay-1.4.2.4.tar.gz to ramdisk
189 12:17:13.979382 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729426/compress-overlay-ixmo7kvt/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729426/extract-overlay-ramdisk-d1qcigch/ramdisk
190 12:17:13.984067 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
191 12:17:13.984201 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
192 12:17:13.984308 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
193 12:17:13.984412 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
194 12:17:13.984504 Building ramdisk /var/lib/lava/dispatcher/tmp/9729426/extract-overlay-ramdisk-d1qcigch/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729426/extract-overlay-ramdisk-d1qcigch/ramdisk
195 12:17:14.064198 >> 53634 blocks
196 12:17:14.965617 rename /var/lib/lava/dispatcher/tmp/9729426/extract-overlay-ramdisk-d1qcigch/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729426/tftp-deploy-60t5nmpz/ramdisk/ramdisk.cpio.gz
197 12:17:14.966046 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
198 12:17:14.966175 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
199 12:17:14.966462 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
200 12:17:14.966568 No mkimage arch provided, not using FIT.
201 12:17:14.966668 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
202 12:17:14.966768 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
203 12:17:14.966883 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
204 12:17:14.966992 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
205 12:17:14.967080 No LXC device requested
206 12:17:14.967183 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
207 12:17:14.967282 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
208 12:17:14.967375 end: 1.6 deploy-device-env (duration 00:00:00) [common]
209 12:17:14.967453 Checking files for TFTP limit of 4294967296 bytes.
210 12:17:14.967870 end: 1 tftp-deploy (duration 00:00:02) [common]
211 12:17:14.967992 start: 2 depthcharge-action (timeout 00:05:00) [common]
212 12:17:14.968096 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
213 12:17:14.968236 substitutions:
214 12:17:14.968313 - {DTB}: None
215 12:17:14.968388 - {INITRD}: 9729426/tftp-deploy-60t5nmpz/ramdisk/ramdisk.cpio.gz
216 12:17:14.968456 - {KERNEL}: 9729426/tftp-deploy-60t5nmpz/kernel/bzImage
217 12:17:14.968522 - {LAVA_MAC}: None
218 12:17:14.968586 - {PRESEED_CONFIG}: None
219 12:17:14.968650 - {PRESEED_LOCAL}: None
220 12:17:14.968714 - {RAMDISK}: 9729426/tftp-deploy-60t5nmpz/ramdisk/ramdisk.cpio.gz
221 12:17:14.968777 - {ROOT_PART}: None
222 12:17:14.968840 - {ROOT}: None
223 12:17:14.968902 - {SERVER_IP}: 192.168.201.1
224 12:17:14.968964 - {TEE}: None
225 12:17:14.969027 Parsed boot commands:
226 12:17:14.969089 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
227 12:17:14.969259 Parsed boot commands: tftpboot 192.168.201.1 9729426/tftp-deploy-60t5nmpz/kernel/bzImage 9729426/tftp-deploy-60t5nmpz/kernel/cmdline 9729426/tftp-deploy-60t5nmpz/ramdisk/ramdisk.cpio.gz
228 12:17:14.969361 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
229 12:17:14.969456 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
230 12:17:14.969561 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
231 12:17:14.969659 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
232 12:17:14.969736 Not connected, no need to disconnect.
233 12:17:14.969821 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
234 12:17:14.969913 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
235 12:17:14.969988 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost acer-cb317-1h-c3z6-dedede-cbg-2'
236 12:17:14.973134 Setting prompt string to ['lava-test: # ']
237 12:17:14.973472 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
238 12:17:14.973594 end: 2.2.1 reset-connection (duration 00:00:00) [common]
239 12:17:14.973728 start: 2.2.2 reset-device (timeout 00:05:00) [common]
240 12:17:14.973834 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
241 12:17:14.974044 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-2' '--port=1' '--command=reboot'
242 12:17:20.105749 >> Command sent successfully.
243 12:17:20.108107 Returned 0 in 5 seconds
244 12:17:20.208902 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
246 12:17:20.209283 end: 2.2.2 reset-device (duration 00:00:05) [common]
247 12:17:20.209400 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
248 12:17:20.209499 Setting prompt string to 'Starting depthcharge on Magolor...'
249 12:17:20.209570 Changing prompt to 'Starting depthcharge on Magolor...'
250 12:17:20.209649 depthcharge-start: Wait for prompt Starting depthcharge on Magolor... (timeout 00:05:00)
251 12:17:20.209957 [Enter `^Ec?' for help]
252 12:17:21.345386
253 12:17:21.345542
254 12:17:21.355349 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 bootblock starting (log level: 8)...
255 12:17:21.359029 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz
256 12:17:21.362601 CPU: ID 906c0, Jasperlake A0, ucode: 2400001f
257 12:17:21.368891 CPU: AES supported, TXT NOT supported, VT supported
258 12:17:21.372527 MCH: device id 4e22 (rev 00) is Jasperlake SKU4-1
259 12:17:21.379883 PCH: device id 4d87 (rev 01) is Jasperlake Super
260 12:17:21.382963 IGD: device id 4e55 (rev 01) is Jasperlake GT4
261 12:17:21.387091 VBOOT: Loading verstage.
262 12:17:21.390011 FMAP: Found "FLASH" version 1.1 at 0xc04000.
263 12:17:21.396213 FMAP: base = 0xff000000 size = 0x1000000 #areas = 32
264 12:17:21.404166 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
265 12:17:21.407956 CBFS: Found 'fallback/verstage' @0xfa740 size 0x155ec
266 12:17:21.408060
267 12:17:21.408148
268 12:17:21.417851 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 verstage starting (log level: 8)...
269 12:17:21.433895 Probing TPM: . done!
270 12:17:21.436984 TPM ready after 0 ms
271 12:17:21.440528 Connected to device vid:did:rid of 1ae0:0028:00
272 12:17:21.451318 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
273 12:17:21.459050 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
274 12:17:21.510178 Initialized TPM device CR50 revision 0
275 12:17:21.528345 tlcl_send_startup: Startup return code is 0
276 12:17:21.528491 TPM: setup succeeded
277 12:17:21.538618 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
278 12:17:21.552259 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
279 12:17:21.567292 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
280 12:17:21.578057 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
281 12:17:21.581836 Chrome EC: UHEPI supported
282 12:17:21.581941 Phase 1
283 12:17:21.589108 FMAP: area GBB found @ c05000 (12288 bytes)
284 12:17:21.596157 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
285 12:17:21.602412 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
286 12:17:21.605554 Recovery requested (1009000e)
287 12:17:21.609622 TPM: Extending digest for VBOOT: boot mode into PCR 0
288 12:17:21.620132 tlcl_extend: response is 0
289 12:17:21.626526 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
290 12:17:21.636251 tlcl_extend: response is 0
291 12:17:21.642541 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
292 12:17:21.646271 CBFS: Found 'fallback/romstage' @0x80 size 0x1bde4
293 12:17:21.652408 BS: verstage times (exec / console): total (unknown) / 124 ms
294 12:17:21.656162
295 12:17:21.656257
296 12:17:21.665882 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 romstage starting (log level: 8)...
297 12:17:21.672649 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
298 12:17:21.675687 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
299 12:17:21.679414 gpe0_sts[0]: 00000010 gpe0_en[0]: 00000000
300 12:17:21.685837 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
301 12:17:21.689328 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
302 12:17:21.692355 gpe0_sts[3]: 00080000 gpe0_en[3]: 00010000
303 12:17:21.696078 TCO_STS: 0000 0001
304 12:17:21.699390 GEN_PMCON: d0015038 00002200
305 12:17:21.702487 GBLRST_CAUSE: 00000000 00000000
306 12:17:21.702585 prev_sleep_state 5
307 12:17:21.706146 Boot Count incremented to 431
308 12:17:21.713730 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
309 12:17:21.717254 CBFS: Found 'fspm.bin' @0x44fc0 size 0x79000
310 12:17:21.720884 Chrome EC: UHEPI supported
311 12:17:21.727497 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
312 12:17:21.734228 Probing TPM: done!
313 12:17:21.740232 Connected to device vid:did:rid of 1ae0:0028:00
314 12:17:21.750650 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
315 12:17:21.758433 Initialized TPM device CR50 revision 0
316 12:17:21.768184 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
317 12:17:21.775020 MRC: Hash idx 0x100b comparison successful.
318 12:17:21.778115 MRC cache found, size 5458
319 12:17:21.778209 bootmode is set to: 2
320 12:17:21.781864 SPD INDEX = 0
321 12:17:21.784970 CBFS: Found 'spd.bin' @0x40c40 size 0x600
322 12:17:21.788636 SPD: module type is LPDDR4X
323 12:17:21.795042 SPD: module part number is MT53E512M32D2NP-046 WT:E
324 12:17:21.802068 SPD: banks 8, ranks 1, rows 16, columns 10, density 16384 Mb
325 12:17:21.805038 SPD: device width 16 bits, bus width 32 bits
326 12:17:21.808124 SPD: module size is 4096 MB (per channel)
327 12:17:21.811527 meminit_channels: DRAM half-populated
328 12:17:21.894145 CBMEM:
329 12:17:21.897242 IMD: root @ 0x76fff000 254 entries.
330 12:17:21.900594 IMD: root @ 0x76ffec00 62 entries.
331 12:17:21.904227 FMAP: area RO_VPD found @ c00000 (16384 bytes)
332 12:17:21.910490 WARNING: RO_VPD is uninitialized or empty.
333 12:17:21.914164 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
334 12:17:21.918034 External stage cache:
335 12:17:21.921156 IMD: root @ 0x7b3ff000 254 entries.
336 12:17:21.924224 IMD: root @ 0x7b3fec00 62 entries.
337 12:17:21.934221 FMAP: area RECOVERY_MRC_CACHE found @ bca000 (65536 bytes)
338 12:17:21.940983 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
339 12:17:21.947326 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
340 12:17:21.955936 MRC: 'RECOVERY_MRC_CACHE' does not need update.
341 12:17:21.959442 cse_lite: Skip switching to RW in the recovery path
342 12:17:21.962737 1 DIMMs found
343 12:17:21.962843 SMM Memory Map
344 12:17:21.965671 SMRAM : 0x7b000000 0x800000
345 12:17:21.969313 Subregion 0: 0x7b000000 0x200000
346 12:17:21.972354 Subregion 1: 0x7b200000 0x200000
347 12:17:21.979203 Subregion 2: 0x7b400000 0x400000
348 12:17:21.979303 top_of_ram = 0x77000000
349 12:17:21.985914 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
350 12:17:21.988943 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
351 12:17:21.995988 MTRR Range: Start=ff000000 End=0 (Size 1000000)
352 12:17:21.999019 CBFS: Found 'fallback/postcar' @0xf5940 size 0x4d9c
353 12:17:22.005529 Decompressing stage fallback/postcar @ 0x76c0dfc0 (36304 bytes)
354 12:17:22.017785 Loading module at 0x76c0e000 with entry 0x76c0e000. filesize: 0x4a50 memsize: 0x8d90
355 12:17:22.024117 Processing 188 relocs. Offset value of 0x74c0e000
356 12:17:22.031000 BS: romstage times (exec / console): total (unknown) / 256 ms
357 12:17:22.035623
358 12:17:22.035723
359 12:17:22.046049 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 postcar starting (log level: 8)...
360 12:17:22.049328 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
361 12:17:22.055891 CBFS: Found 'fallback/ramstage' @0x20f80 size 0x1f488
362 12:17:22.062651 Decompressing stage fallback/ramstage @ 0x76ba7fc0 (413104 bytes)
363 12:17:22.118342 Loading module at 0x76ba8000 with entry 0x76ba8000. filesize: 0x4ec20 memsize: 0x64d70
364 12:17:22.124712 Processing 4805 relocs. Offset value of 0x75da8000
365 12:17:22.128150 BS: postcar times (exec / console): total (unknown) / 42 ms
366 12:17:22.131936
367 12:17:22.132035
368 12:17:22.141665 coreboot-v1.9308_26_0.0.22-18292-gb7f2ee574a Tue Apr 26 08:50:11 UTC 2022 ramstage starting (log level: 8)...
369 12:17:22.141770 Normal boot
370 12:17:22.145535 EC returned error result code 3
371 12:17:22.148710 FW_CONFIG value is 0x204
372 12:17:22.151670 GENERIC: 0.0 disabled by fw_config
373 12:17:22.158451 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
374 12:17:22.161991 I2C: 00:10 disabled by fw_config
375 12:17:22.165034 I2C: 00:10 disabled by fw_config
376 12:17:22.168812 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
377 12:17:22.175565 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
378 12:17:22.178943 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
379 12:17:22.186418 fw_config match found: TS_SOURCE=TS_UNPROVISIONED
380 12:17:22.190115 fw_config match found: CAMERA_WFC=CAMERA_UNPROVISIONED
381 12:17:22.193114 I2C: 00:10 disabled by fw_config
382 12:17:22.199804 fw_config match found: CAMERA_VCM=CAMERA_VCM_UNPROVISIONED
383 12:17:22.206273 fw_config match found: AUDIO_CODEC_SOURCE=AUDIO_CODEC_UNPROVISIONED
384 12:17:22.210043 I2C: 00:1a disabled by fw_config
385 12:17:22.212751 I2C: 00:1a disabled by fw_config
386 12:17:22.216238 fw_config match found: AUDIO_AMP=UNPROVISIONED
387 12:17:22.223265 fw_config match found: AUDIO_AMP=UNPROVISIONED
388 12:17:22.226299 GENERIC: 0.0 disabled by fw_config
389 12:17:22.229431 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
390 12:17:22.236240 CBFS: Found 'cpu_microcode_blob.bin' @0x1bf00 size 0x5000
391 12:17:22.239271 microcode: sig=0x906c0 pf=0x1 revision=0x2400001f
392 12:17:22.246287 microcode: Update skipped, already up-to-date
393 12:17:22.249426 CBFS: Found 'fsps.bin' @0xbefc0 size 0x36906
394 12:17:22.277362 Detected 2 core, 2 thread CPU.
395 12:17:22.280609 Setting up SMI for CPU
396 12:17:22.284102 IED base = 0x7b400000
397 12:17:22.284205 IED size = 0x00400000
398 12:17:22.287667 Will perform SMM setup.
399 12:17:22.290615 CPU: Intel(R) Celeron(R) N4500 @ 1.10GHz.
400 12:17:22.301123 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
401 12:17:22.303910 Processing 16 relocs. Offset value of 0x00030000
402 12:17:22.308039 Attempting to start 1 APs
403 12:17:22.311097 Waiting for 10ms after sending INIT.
404 12:17:22.327817 Waiting for 1st SIPI to complete...done.
405 12:17:22.327940 AP: slot 1 apic_id 2.
406 12:17:22.334255 Waiting for 2nd SIPI to complete...done.
407 12:17:22.340903 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
408 12:17:22.347935 Processing 13 relocs. Offset value of 0x00038000
409 12:17:22.348040 Unable to locate Global NVS
410 12:17:22.357138 SMM Module: stub loaded at 0x00038000. Will call 0x76bc5fe2(0x00000000)
411 12:17:22.360819 Installing permanent SMM handler to 0x7b000000
412 12:17:22.367431 Loading module at 0x7b010000 with entry 0x7b010a91. filesize: 0xba48 memsize: 0x10b10
413 12:17:22.374085 Processing 704 relocs. Offset value of 0x7b010000
414 12:17:22.380449 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
415 12:17:22.387533 Processing 13 relocs. Offset value of 0x7b008000
416 12:17:22.393763 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
417 12:17:22.397356 Unable to locate Global NVS
418 12:17:22.403909 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010a91(0x00000000)
419 12:17:22.407584 Clearing SMI status registers
420 12:17:22.407692 SMI_STS: PM1
421 12:17:22.410494 PM1_STS: PWRBTN
422 12:17:22.410598 TCO_STS: INTRD_DET
423 12:17:22.414053 GPE0 STD STS:
424 12:17:22.420326 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
425 12:17:22.424111 In relocation handler: CPU 0
426 12:17:22.427056 New SMBASE=0x7b000000 IEDBASE=0x7b400000
427 12:17:22.433742 Writing SMRR. base = 0x7b000006, mask=0xff800800
428 12:17:22.433842 Relocation complete.
429 12:17:22.440467 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
430 12:17:22.443598 In relocation handler: CPU 1
431 12:17:22.450328 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
432 12:17:22.453654 Writing SMRR. base = 0x7b000006, mask=0xff800800
433 12:17:22.457667 Relocation complete.
434 12:17:22.457767 Initializing CPU #0
435 12:17:22.460640 CPU: vendor Intel device 906c0
436 12:17:22.463748 CPU: family 06, model 9c, stepping 00
437 12:17:22.467182 Clearing out pending MCEs
438 12:17:22.470539 Setting up local APIC...
439 12:17:22.473505 apic_id: 0x00 done.
440 12:17:22.477234 Turbo is available but hidden
441 12:17:22.480581 Turbo is available and visible
442 12:17:22.483662 microcode: Update skipped, already up-to-date
443 12:17:22.487074 CPU #0 initialized
444 12:17:22.487181 Initializing CPU #1
445 12:17:22.490019 CPU: vendor Intel device 906c0
446 12:17:22.493574 CPU: family 06, model 9c, stepping 00
447 12:17:22.497176 Clearing out pending MCEs
448 12:17:22.500111 Setting up local APIC...
449 12:17:22.503758 apic_id: 0x02 done.
450 12:17:22.506980 microcode: Update skipped, already up-to-date
451 12:17:22.509898 CPU #1 initialized
452 12:17:22.513551 bsp_do_flight_plan done after 175 msecs.
453 12:17:22.516456 CPU: frequency set to 2800 MHz
454 12:17:22.516557 Enabling SMIs.
455 12:17:22.523418 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 86 / 289 ms
456 12:17:22.534042 Probing TPM: done!
457 12:17:22.540732 Connected to device vid:did:rid of 1ae0:0028:00
458 12:17:22.550321 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_B:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
459 12:17:22.554160 Initialized TPM device CR50 revision 0
460 12:17:22.557184 CBFS: Found 'vbt.bin' @0x445c0 size 0x4bc
461 12:17:22.564053 Found a VBT of 7680 bytes after decompression
462 12:17:22.570282 WEAK: src/soc/intel/jasperlake/fsp_params.c/mainboard_silicon_init_params called
463 12:17:22.606030 Detected 2 core, 2 thread CPU.
464 12:17:22.608955 Detected 2 core, 2 thread CPU.
465 12:17:22.972176 Display FSP Version Info HOB
466 12:17:22.975596 Reference Code - CPU = 8.7.22.30
467 12:17:22.978739 uCode Version = 24.0.0.1f
468 12:17:22.981902 TXT ACM version = ff.ff.ff.ffff
469 12:17:22.984967 Reference Code - ME = 8.7.22.30
470 12:17:22.988646 MEBx version = 0.0.0.0
471 12:17:22.992222 ME Firmware Version = Consumer SKU
472 12:17:22.995363 Reference Code - PCH = 8.7.22.30
473 12:17:22.998913 PCH-CRID Status = Disabled
474 12:17:23.001968 PCH-CRID Original Value = ff.ff.ff.ffff
475 12:17:23.005287 PCH-CRID New Value = ff.ff.ff.ffff
476 12:17:23.008727 OPROM - RST - RAID = ff.ff.ff.ffff
477 12:17:23.012197 PCH Hsio Version = 4.0.0.0
478 12:17:23.014937 Reference Code - SA - System Agent = 8.7.22.30
479 12:17:23.019011 Reference Code - MRC = 0.0.4.68
480 12:17:23.021759 SA - PCIe Version = 8.7.22.30
481 12:17:23.025216 SA-CRID Status = Disabled
482 12:17:23.028290 SA-CRID Original Value = 0.0.0.0
483 12:17:23.031661 SA-CRID New Value = 0.0.0.0
484 12:17:23.035206 OPROM - VBIOS = ff.ff.ff.ffff
485 12:17:23.038868 IO Manageability Engine FW Version = ff.ff.ff.ffff
486 12:17:23.041627 PHY Build Version = ff.ff.ff.ffff
487 12:17:23.045034 Thunderbolt(TM) FW Version = ff.ff.ff.ffff
488 12:17:23.051539 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
489 12:17:23.055293 ITSS IRQ Polarities Before:
490 12:17:23.058727 IPC0: 0xffffffff
491 12:17:23.058860 IPC1: 0xffffffff
492 12:17:23.061595 IPC2: 0xffffffff
493 12:17:23.061705 IPC3: 0xffffffff
494 12:17:23.065089 ITSS IRQ Polarities After:
495 12:17:23.068305 IPC0: 0xffffffff
496 12:17:23.068434 IPC1: 0xffffffff
497 12:17:23.071399 IPC2: 0xffffffff
498 12:17:23.071509 IPC3: 0xffffffff
499 12:17:23.085300 pcie_rp_update_dev: Couldn't find PCIe Root Port #8 (originally PCI: 00:1c.7) which was enabled in devicetree, removing.
500 12:17:23.091523 BS: BS_DEV_INIT_CHIPS run times (exec / console): 405 / 156 ms
501 12:17:23.091635 Enumerating buses...
502 12:17:23.098340 Show all devs... Before device enumeration.
503 12:17:23.098441 Root Device: enabled 1
504 12:17:23.101451 CPU_CLUSTER: 0: enabled 1
505 12:17:23.105034 DOMAIN: 0000: enabled 1
506 12:17:23.108202 PCI: 00:00.0: enabled 1
507 12:17:23.108301 PCI: 00:02.0: enabled 1
508 12:17:23.111490 PCI: 00:04.0: enabled 1
509 12:17:23.114961 PCI: 00:05.0: enabled 1
510 12:17:23.118093 PCI: 00:09.0: enabled 0
511 12:17:23.118190 PCI: 00:12.6: enabled 0
512 12:17:23.121050 PCI: 00:14.0: enabled 1
513 12:17:23.124300 PCI: 00:14.1: enabled 0
514 12:17:23.128065 PCI: 00:14.2: enabled 0
515 12:17:23.128196 PCI: 00:14.3: enabled 1
516 12:17:23.131057 PCI: 00:14.5: enabled 1
517 12:17:23.134719 PCI: 00:15.0: enabled 1
518 12:17:23.137632 PCI: 00:15.1: enabled 1
519 12:17:23.137761 PCI: 00:15.2: enabled 1
520 12:17:23.141201 PCI: 00:15.3: enabled 1
521 12:17:23.144650 PCI: 00:16.0: enabled 1
522 12:17:23.144786 PCI: 00:16.1: enabled 0
523 12:17:23.148121 PCI: 00:16.4: enabled 0
524 12:17:23.151495 PCI: 00:16.5: enabled 0
525 12:17:23.154880 PCI: 00:17.0: enabled 0
526 12:17:23.155013 PCI: 00:19.0: enabled 1
527 12:17:23.157639 PCI: 00:19.1: enabled 0
528 12:17:23.161190 PCI: 00:19.2: enabled 1
529 12:17:23.164685 PCI: 00:1a.0: enabled 1
530 12:17:23.164785 PCI: 00:1c.0: enabled 0
531 12:17:23.167761 PCI: 00:1c.1: enabled 0
532 12:17:23.170723 PCI: 00:1c.2: enabled 0
533 12:17:23.174265 PCI: 00:1c.3: enabled 0
534 12:17:23.174364 PCI: 00:1c.4: enabled 0
535 12:17:23.177553 PCI: 00:1c.5: enabled 0
536 12:17:23.181014 PCI: 00:1c.6: enabled 0
537 12:17:23.184441 PCI: 00:1c.7: enabled 1
538 12:17:23.184553 PCI: 00:1e.0: enabled 0
539 12:17:23.187437 PCI: 00:1e.1: enabled 0
540 12:17:23.190526 PCI: 00:1e.2: enabled 1
541 12:17:23.190626 PCI: 00:1e.3: enabled 0
542 12:17:23.194258 PCI: 00:1f.0: enabled 1
543 12:17:23.197550 PCI: 00:1f.1: enabled 1
544 12:17:23.200800 PCI: 00:1f.2: enabled 1
545 12:17:23.200901 PCI: 00:1f.3: enabled 1
546 12:17:23.203796 PCI: 00:1f.4: enabled 0
547 12:17:23.207449 PCI: 00:1f.5: enabled 1
548 12:17:23.210584 PCI: 00:1f.7: enabled 0
549 12:17:23.210682 GENERIC: 0.0: enabled 1
550 12:17:23.214363 GENERIC: 0.0: enabled 1
551 12:17:23.217161 USB0 port 0: enabled 1
552 12:17:23.220967 GENERIC: 0.0: enabled 1
553 12:17:23.221066 I2C: 00:2c: enabled 1
554 12:17:23.224024 I2C: 00:15: enabled 1
555 12:17:23.227098 GENERIC: 0.0: enabled 0
556 12:17:23.227197 I2C: 00:15: enabled 1
557 12:17:23.230461 I2C: 00:10: enabled 0
558 12:17:23.233900 I2C: 00:10: enabled 0
559 12:17:23.233999 I2C: 00:2c: enabled 1
560 12:17:23.236938 I2C: 00:40: enabled 1
561 12:17:23.240146 I2C: 00:10: enabled 1
562 12:17:23.240248 I2C: 00:39: enabled 1
563 12:17:23.244045 I2C: 00:36: enabled 1
564 12:17:23.246933 I2C: 00:10: enabled 0
565 12:17:23.247031 I2C: 00:0c: enabled 1
566 12:17:23.250377 I2C: 00:50: enabled 1
567 12:17:23.253750 I2C: 00:1a: enabled 1
568 12:17:23.253848 I2C: 00:1a: enabled 0
569 12:17:23.256739 I2C: 00:1a: enabled 0
570 12:17:23.260103 I2C: 00:28: enabled 1
571 12:17:23.260206 I2C: 00:29: enabled 1
572 12:17:23.263643 PCI: 00:00.0: enabled 1
573 12:17:23.267053 SPI: 00: enabled 1
574 12:17:23.267163 PNP: 0c09.0: enabled 1
575 12:17:23.270414 GENERIC: 0.0: enabled 0
576 12:17:23.274066 USB2 port 0: enabled 1
577 12:17:23.276774 USB2 port 1: enabled 1
578 12:17:23.276875 USB2 port 2: enabled 1
579 12:17:23.280255 USB2 port 3: enabled 1
580 12:17:23.283293 USB2 port 4: enabled 0
581 12:17:23.283393 USB2 port 5: enabled 1
582 12:17:23.287126 USB2 port 6: enabled 0
583 12:17:23.290061 USB2 port 7: enabled 1
584 12:17:23.293369 USB3 port 0: enabled 1
585 12:17:23.293470 USB3 port 1: enabled 1
586 12:17:23.297037 USB3 port 2: enabled 1
587 12:17:23.300239 USB3 port 3: enabled 1
588 12:17:23.300341 APIC: 00: enabled 1
589 12:17:23.303209 APIC: 02: enabled 1
590 12:17:23.307094 Compare with tree...
591 12:17:23.307196 Root Device: enabled 1
592 12:17:23.310313 CPU_CLUSTER: 0: enabled 1
593 12:17:23.313365 APIC: 00: enabled 1
594 12:17:23.313464 APIC: 02: enabled 1
595 12:17:23.316750 DOMAIN: 0000: enabled 1
596 12:17:23.320280 PCI: 00:00.0: enabled 1
597 12:17:23.323420 PCI: 00:02.0: enabled 1
598 12:17:23.326937 PCI: 00:04.0: enabled 1
599 12:17:23.327039 GENERIC: 0.0: enabled 1
600 12:17:23.330011 PCI: 00:05.0: enabled 1
601 12:17:23.333236 GENERIC: 0.0: enabled 1
602 12:17:23.336855 PCI: 00:09.0: enabled 0
603 12:17:23.340014 PCI: 00:12.6: enabled 0
604 12:17:23.340115 PCI: 00:14.0: enabled 1
605 12:17:23.343670 USB0 port 0: enabled 1
606 12:17:23.346562 USB2 port 0: enabled 1
607 12:17:23.349636 USB2 port 1: enabled 1
608 12:17:23.352785 USB2 port 2: enabled 1
609 12:17:23.356312 USB2 port 3: enabled 1
610 12:17:23.356414 USB2 port 4: enabled 0
611 12:17:23.359730 USB2 port 5: enabled 1
612 12:17:23.362813 USB2 port 6: enabled 0
613 12:17:23.366156 USB2 port 7: enabled 1
614 12:17:23.369491 USB3 port 0: enabled 1
615 12:17:23.369594 USB3 port 1: enabled 1
616 12:17:23.372933 USB3 port 2: enabled 1
617 12:17:23.376403 USB3 port 3: enabled 1
618 12:17:23.379425 PCI: 00:14.1: enabled 0
619 12:17:23.382774 PCI: 00:14.2: enabled 0
620 12:17:23.382874 PCI: 00:14.3: enabled 1
621 12:17:23.386177 GENERIC: 0.0: enabled 1
622 12:17:23.389821 PCI: 00:14.5: enabled 1
623 12:17:23.392569 PCI: 00:15.0: enabled 1
624 12:17:23.395973 I2C: 00:2c: enabled 1
625 12:17:23.396073 I2C: 00:15: enabled 1
626 12:17:23.399512 PCI: 00:15.1: enabled 1
627 12:17:23.402632 PCI: 00:15.2: enabled 1
628 12:17:23.406259 GENERIC: 0.0: enabled 0
629 12:17:23.409469 I2C: 00:15: enabled 1
630 12:17:23.409573 I2C: 00:10: enabled 0
631 12:17:23.412550 I2C: 00:10: enabled 0
632 12:17:23.416431 I2C: 00:2c: enabled 1
633 12:17:23.419363 I2C: 00:40: enabled 1
634 12:17:23.419463 I2C: 00:10: enabled 1
635 12:17:23.422440 I2C: 00:39: enabled 1
636 12:17:23.425912 PCI: 00:15.3: enabled 1
637 12:17:23.429361 I2C: 00:36: enabled 1
638 12:17:23.432571 I2C: 00:10: enabled 0
639 12:17:23.432660 I2C: 00:0c: enabled 1
640 12:17:23.435861 I2C: 00:50: enabled 1
641 12:17:23.440094 PCI: 00:16.0: enabled 1
642 12:17:23.440191 PCI: 00:16.1: enabled 0
643 12:17:23.443822 PCI: 00:16.4: enabled 0
644 12:17:23.447526 PCI: 00:16.5: enabled 0
645 12:17:23.450660 PCI: 00:17.0: enabled 0
646 12:17:23.450757 PCI: 00:19.0: enabled 1
647 12:17:23.453768 I2C: 00:1a: enabled 1
648 12:17:23.457355 I2C: 00:1a: enabled 0
649 12:17:23.460425 I2C: 00:1a: enabled 0
650 12:17:23.460512 I2C: 00:28: enabled 1
651 12:17:23.463786 I2C: 00:29: enabled 1
652 12:17:23.467251 PCI: 00:19.1: enabled 0
653 12:17:23.470197 PCI: 00:19.2: enabled 1
654 12:17:23.473716 PCI: 00:1a.0: enabled 1
655 12:17:23.473816 PCI: 00:1e.0: enabled 0
656 12:17:23.477016 PCI: 00:1e.1: enabled 0
657 12:17:23.479958 PCI: 00:1e.2: enabled 1
658 12:17:23.483477 SPI: 00: enabled 1
659 12:17:23.483576 PCI: 00:1e.3: enabled 0
660 12:17:23.487166 PCI: 00:1f.0: enabled 1
661 12:17:23.490059 PNP: 0c09.0: enabled 1
662 12:17:23.493321 PCI: 00:1f.1: enabled 1
663 12:17:23.496894 PCI: 00:1f.2: enabled 1
664 12:17:23.496993 PCI: 00:1f.3: enabled 1
665 12:17:23.500030 GENERIC: 0.0: enabled 0
666 12:17:23.503787 PCI: 00:1f.4: enabled 0
667 12:17:23.506835 PCI: 00:1f.5: enabled 1
668 12:17:23.509940 PCI: 00:1f.7: enabled 0
669 12:17:23.510039 Root Device scanning...
670 12:17:23.513903 scan_static_bus for Root Device
671 12:17:23.516885 CPU_CLUSTER: 0 enabled
672 12:17:23.520054 DOMAIN: 0000 enabled
673 12:17:23.523029 DOMAIN: 0000 scanning...
674 12:17:23.523138 PCI: pci_scan_bus for bus 00
675 12:17:23.526855 PCI: 00:00.0 [8086/0000] ops
676 12:17:23.529803 PCI: 00:00.0 [8086/4e22] enabled
677 12:17:23.533267 PCI: 00:02.0 [8086/0000] bus ops
678 12:17:23.536517 PCI: 00:02.0 [8086/4e55] enabled
679 12:17:23.540201 PCI: 00:04.0 [8086/0000] bus ops
680 12:17:23.543260 PCI: 00:04.0 [8086/4e03] enabled
681 12:17:23.546305 PCI: 00:05.0 [8086/0000] bus ops
682 12:17:23.549969 PCI: 00:05.0 [8086/4e19] enabled
683 12:17:23.553054 PCI: 00:08.0 [8086/4e11] enabled
684 12:17:23.556724 PCI: 00:14.0 [8086/0000] bus ops
685 12:17:23.559760 PCI: 00:14.0 [8086/4ded] enabled
686 12:17:23.563360 PCI: 00:14.2 [8086/4def] disabled
687 12:17:23.566593 PCI: 00:14.3 [8086/0000] bus ops
688 12:17:23.569526 PCI: 00:14.3 [8086/4df0] enabled
689 12:17:23.573285 PCI: 00:14.5 [8086/0000] ops
690 12:17:23.576225 PCI: 00:14.5 [8086/4df8] enabled
691 12:17:23.579708 PCI: 00:15.0 [8086/0000] bus ops
692 12:17:23.583140 PCI: 00:15.0 [8086/4de8] enabled
693 12:17:23.586194 PCI: 00:15.1 [8086/0000] bus ops
694 12:17:23.590055 PCI: 00:15.1 [8086/4de9] enabled
695 12:17:23.593066 PCI: 00:15.2 [8086/0000] bus ops
696 12:17:23.596641 PCI: 00:15.2 [8086/4dea] enabled
697 12:17:23.600118 PCI: 00:15.3 [8086/0000] bus ops
698 12:17:23.603027 PCI: 00:15.3 [8086/4deb] enabled
699 12:17:23.606699 PCI: 00:16.0 [8086/0000] ops
700 12:17:23.609665 PCI: 00:16.0 [8086/4de0] enabled
701 12:17:23.613064 PCI: 00:19.0 [8086/0000] bus ops
702 12:17:23.616059 PCI: 00:19.0 [8086/4dc5] enabled
703 12:17:23.620108 PCI: 00:19.2 [8086/0000] ops
704 12:17:23.622933 PCI: 00:19.2 [8086/4dc7] enabled
705 12:17:23.626110 PCI: 00:1a.0 [8086/0000] ops
706 12:17:23.629492 PCI: 00:1a.0 [8086/4dc4] enabled
707 12:17:23.633487 PCI: 00:1e.0 [8086/0000] ops
708 12:17:23.636248 PCI: 00:1e.0 [8086/4da8] disabled
709 12:17:23.639343 PCI: 00:1e.2 [8086/0000] bus ops
710 12:17:23.643126 PCI: 00:1e.2 [8086/4daa] enabled
711 12:17:23.646276 PCI: 00:1f.0 [8086/0000] bus ops
712 12:17:23.649487 PCI: 00:1f.0 [8086/4d87] enabled
713 12:17:23.656047 PCI: Static device PCI: 00:1f.1 not found, disabling it.
714 12:17:23.656145 RTC Init
715 12:17:23.659761 Set power on after power failure.
716 12:17:23.662905 Disabling Deep S3
717 12:17:23.662991 Disabling Deep S3
718 12:17:23.666005 Disabling Deep S4
719 12:17:23.666087 Disabling Deep S4
720 12:17:23.669003 Disabling Deep S5
721 12:17:23.669092 Disabling Deep S5
722 12:17:23.672830 PCI: 00:1f.2 [0000/0000] hidden
723 12:17:23.676051 PCI: 00:1f.3 [8086/0000] bus ops
724 12:17:23.679149 PCI: 00:1f.3 [8086/4dc8] enabled
725 12:17:23.682738 PCI: 00:1f.5 [8086/0000] bus ops
726 12:17:23.686254 PCI: 00:1f.5 [8086/4da4] enabled
727 12:17:23.689648 PCI: Leftover static devices:
728 12:17:23.692676 PCI: 00:12.6
729 12:17:23.692775 PCI: 00:09.0
730 12:17:23.692852 PCI: 00:14.1
731 12:17:23.696197 PCI: 00:16.1
732 12:17:23.696295 PCI: 00:16.4
733 12:17:23.699321 PCI: 00:16.5
734 12:17:23.699418 PCI: 00:17.0
735 12:17:23.702569 PCI: 00:19.1
736 12:17:23.702666 PCI: 00:1e.1
737 12:17:23.702744 PCI: 00:1e.3
738 12:17:23.706030 PCI: 00:1f.1
739 12:17:23.706128 PCI: 00:1f.4
740 12:17:23.708933 PCI: 00:1f.7
741 12:17:23.712455 PCI: Check your devicetree.cb.
742 12:17:23.712556 PCI: 00:02.0 scanning...
743 12:17:23.716063 scan_generic_bus for PCI: 00:02.0
744 12:17:23.722161 scan_generic_bus for PCI: 00:02.0 done
745 12:17:23.725854 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
746 12:17:23.729064 PCI: 00:04.0 scanning...
747 12:17:23.732358 scan_generic_bus for PCI: 00:04.0
748 12:17:23.732457 GENERIC: 0.0 enabled
749 12:17:23.739107 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
750 12:17:23.745569 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
751 12:17:23.745663 PCI: 00:05.0 scanning...
752 12:17:23.752442 scan_generic_bus for PCI: 00:05.0
753 12:17:23.752531 GENERIC: 0.0 enabled
754 12:17:23.759186 bus: PCI: 00:05.0[0]->scan_generic_bus for PCI: 00:05.0 done
755 12:17:23.762647 scan_bus: bus PCI: 00:05.0 finished in 11 msecs
756 12:17:23.765833 PCI: 00:14.0 scanning...
757 12:17:23.769067 scan_static_bus for PCI: 00:14.0
758 12:17:23.772066 USB0 port 0 enabled
759 12:17:23.775642 USB0 port 0 scanning...
760 12:17:23.778773 scan_static_bus for USB0 port 0
761 12:17:23.778858 USB2 port 0 enabled
762 12:17:23.782457 USB2 port 1 enabled
763 12:17:23.782539 USB2 port 2 enabled
764 12:17:23.785705 USB2 port 3 enabled
765 12:17:23.788736 USB2 port 4 disabled
766 12:17:23.788823 USB2 port 5 enabled
767 12:17:23.792242 USB2 port 6 disabled
768 12:17:23.795852 USB2 port 7 enabled
769 12:17:23.795941 USB3 port 0 enabled
770 12:17:23.798702 USB3 port 1 enabled
771 12:17:23.798787 USB3 port 2 enabled
772 12:17:23.802262 USB3 port 3 enabled
773 12:17:23.805191 USB2 port 0 scanning...
774 12:17:23.808856 scan_static_bus for USB2 port 0
775 12:17:23.811846 scan_static_bus for USB2 port 0 done
776 12:17:23.815387 scan_bus: bus USB2 port 0 finished in 6 msecs
777 12:17:23.818760 USB2 port 1 scanning...
778 12:17:23.822646 scan_static_bus for USB2 port 1
779 12:17:23.825484 scan_static_bus for USB2 port 1 done
780 12:17:23.831912 scan_bus: bus USB2 port 1 finished in 6 msecs
781 12:17:23.832004 USB2 port 2 scanning...
782 12:17:23.835617 scan_static_bus for USB2 port 2
783 12:17:23.838756 scan_static_bus for USB2 port 2 done
784 12:17:23.845318 scan_bus: bus USB2 port 2 finished in 6 msecs
785 12:17:23.848606 USB2 port 3 scanning...
786 12:17:23.851787 scan_static_bus for USB2 port 3
787 12:17:23.855259 scan_static_bus for USB2 port 3 done
788 12:17:23.858444 scan_bus: bus USB2 port 3 finished in 6 msecs
789 12:17:23.862304 USB2 port 5 scanning...
790 12:17:23.865178 scan_static_bus for USB2 port 5
791 12:17:23.868566 scan_static_bus for USB2 port 5 done
792 12:17:23.871899 scan_bus: bus USB2 port 5 finished in 6 msecs
793 12:17:23.875163 USB2 port 7 scanning...
794 12:17:23.878935 scan_static_bus for USB2 port 7
795 12:17:23.882349 scan_static_bus for USB2 port 7 done
796 12:17:23.888716 scan_bus: bus USB2 port 7 finished in 6 msecs
797 12:17:23.888806 USB3 port 0 scanning...
798 12:17:23.891878 scan_static_bus for USB3 port 0
799 12:17:23.895485 scan_static_bus for USB3 port 0 done
800 12:17:23.901923 scan_bus: bus USB3 port 0 finished in 6 msecs
801 12:17:23.905259 USB3 port 1 scanning...
802 12:17:23.908635 scan_static_bus for USB3 port 1
803 12:17:23.912163 scan_static_bus for USB3 port 1 done
804 12:17:23.914878 scan_bus: bus USB3 port 1 finished in 6 msecs
805 12:17:23.918549 USB3 port 2 scanning...
806 12:17:23.922199 scan_static_bus for USB3 port 2
807 12:17:23.924912 scan_static_bus for USB3 port 2 done
808 12:17:23.928284 scan_bus: bus USB3 port 2 finished in 6 msecs
809 12:17:23.931856 USB3 port 3 scanning...
810 12:17:23.934909 scan_static_bus for USB3 port 3
811 12:17:23.938145 scan_static_bus for USB3 port 3 done
812 12:17:23.945078 scan_bus: bus USB3 port 3 finished in 6 msecs
813 12:17:23.948563 scan_static_bus for USB0 port 0 done
814 12:17:23.951609 scan_bus: bus USB0 port 0 finished in 172 msecs
815 12:17:23.954755 scan_static_bus for PCI: 00:14.0 done
816 12:17:23.961599 scan_bus: bus PCI: 00:14.0 finished in 189 msecs
817 12:17:23.961698 PCI: 00:14.3 scanning...
818 12:17:23.965272 scan_static_bus for PCI: 00:14.3
819 12:17:23.968561 GENERIC: 0.0 enabled
820 12:17:23.971827 scan_static_bus for PCI: 00:14.3 done
821 12:17:23.978243 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
822 12:17:23.978343 PCI: 00:15.0 scanning...
823 12:17:23.981757 scan_static_bus for PCI: 00:15.0
824 12:17:23.984910 I2C: 00:2c enabled
825 12:17:23.988598 I2C: 00:15 enabled
826 12:17:23.991653 scan_static_bus for PCI: 00:15.0 done
827 12:17:23.995373 scan_bus: bus PCI: 00:15.0 finished in 11 msecs
828 12:17:23.998618 PCI: 00:15.1 scanning...
829 12:17:24.001728 scan_static_bus for PCI: 00:15.1
830 12:17:24.004775 scan_static_bus for PCI: 00:15.1 done
831 12:17:24.012116 scan_bus: bus PCI: 00:15.1 finished in 7 msecs
832 12:17:24.012216 PCI: 00:15.2 scanning...
833 12:17:24.014843 scan_static_bus for PCI: 00:15.2
834 12:17:24.019535 GENERIC: 0.0 disabled
835 12:17:24.019646 I2C: 00:15 enabled
836 12:17:24.023112 I2C: 00:10 disabled
837 12:17:24.026261 I2C: 00:10 disabled
838 12:17:24.026425 I2C: 00:2c enabled
839 12:17:24.029717 I2C: 00:40 enabled
840 12:17:24.029831 I2C: 00:10 enabled
841 12:17:24.033317 I2C: 00:39 enabled
842 12:17:24.036953 scan_static_bus for PCI: 00:15.2 done
843 12:17:24.040754 scan_bus: bus PCI: 00:15.2 finished in 23 msecs
844 12:17:24.043699 PCI: 00:15.3 scanning...
845 12:17:24.047316 scan_static_bus for PCI: 00:15.3
846 12:17:24.050307 I2C: 00:36 enabled
847 12:17:24.050413 I2C: 00:10 disabled
848 12:17:24.053310 I2C: 00:0c enabled
849 12:17:24.053413 I2C: 00:50 enabled
850 12:17:24.060286 scan_static_bus for PCI: 00:15.3 done
851 12:17:24.063284 scan_bus: bus PCI: 00:15.3 finished in 15 msecs
852 12:17:24.067271 PCI: 00:19.0 scanning...
853 12:17:24.070323 scan_static_bus for PCI: 00:19.0
854 12:17:24.070429 I2C: 00:1a enabled
855 12:17:24.073420 I2C: 00:1a disabled
856 12:17:24.077162 I2C: 00:1a disabled
857 12:17:24.077265 I2C: 00:28 enabled
858 12:17:24.080306 I2C: 00:29 enabled
859 12:17:24.083216 scan_static_bus for PCI: 00:19.0 done
860 12:17:24.087146 scan_bus: bus PCI: 00:19.0 finished in 17 msecs
861 12:17:24.090072 PCI: 00:1e.2 scanning...
862 12:17:24.093277 scan_generic_bus for PCI: 00:1e.2
863 12:17:24.096432 SPI: 00 enabled
864 12:17:24.103440 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
865 12:17:24.106684 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
866 12:17:24.109984 PCI: 00:1f.0 scanning...
867 12:17:24.113011 scan_static_bus for PCI: 00:1f.0
868 12:17:24.113109 PNP: 0c09.0 enabled
869 12:17:24.116872 PNP: 0c09.0 scanning...
870 12:17:24.120329 scan_static_bus for PNP: 0c09.0
871 12:17:24.123022 scan_static_bus for PNP: 0c09.0 done
872 12:17:24.130103 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
873 12:17:24.133063 scan_static_bus for PCI: 00:1f.0 done
874 12:17:24.136609 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
875 12:17:24.139604 PCI: 00:1f.3 scanning...
876 12:17:24.143199 scan_static_bus for PCI: 00:1f.3
877 12:17:24.146252 GENERIC: 0.0 disabled
878 12:17:24.150170 scan_static_bus for PCI: 00:1f.3 done
879 12:17:24.153241 scan_bus: bus PCI: 00:1f.3 finished in 9 msecs
880 12:17:24.156742 PCI: 00:1f.5 scanning...
881 12:17:24.159895 scan_generic_bus for PCI: 00:1f.5
882 12:17:24.163079 scan_generic_bus for PCI: 00:1f.5 done
883 12:17:24.170018 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
884 12:17:24.173087 scan_bus: bus DOMAIN: 0000 finished in 647 msecs
885 12:17:24.176216 scan_static_bus for Root Device done
886 12:17:24.182930 scan_bus: bus Root Device finished in 666 msecs
887 12:17:24.183031 done
888 12:17:24.189722 BS: BS_DEV_ENUMERATE run times (exec / console): 6 / 1087 ms
889 12:17:24.192840 Chrome EC: UHEPI supported
890 12:17:24.199799 FMAP: area UNIFIED_MRC_CACHE found @ bca000 (196608 bytes)
891 12:17:24.206372 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
892 12:17:24.209397 SPI flash protection: WPSW=0 SRP0=1
893 12:17:24.213280 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
894 12:17:24.219795 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
895 12:17:24.222746 found VGA at PCI: 00:02.0
896 12:17:24.225926 Setting up VGA for PCI: 00:02.0
897 12:17:24.229753 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
898 12:17:24.236289 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
899 12:17:24.236389 Allocating resources...
900 12:17:24.239919 Reading resources...
901 12:17:24.242470 Root Device read_resources bus 0 link: 0
902 12:17:24.249802 CPU_CLUSTER: 0 read_resources bus 0 link: 0
903 12:17:24.252614 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
904 12:17:24.259230 DOMAIN: 0000 read_resources bus 0 link: 0
905 12:17:24.262881 PCI: 00:04.0 read_resources bus 1 link: 0
906 12:17:24.269093 PCI: 00:04.0 read_resources bus 1 link: 0 done
907 12:17:24.272863 PCI: 00:05.0 read_resources bus 2 link: 0
908 12:17:24.276027 PCI: 00:05.0 read_resources bus 2 link: 0 done
909 12:17:24.283001 PCI: 00:14.0 read_resources bus 0 link: 0
910 12:17:24.286164 USB0 port 0 read_resources bus 0 link: 0
911 12:17:24.293281 USB0 port 0 read_resources bus 0 link: 0 done
912 12:17:24.296989 PCI: 00:14.0 read_resources bus 0 link: 0 done
913 12:17:24.303550 PCI: 00:14.3 read_resources bus 0 link: 0
914 12:17:24.306567 PCI: 00:14.3 read_resources bus 0 link: 0 done
915 12:17:24.362771 PCI: 00:15.0 read_resources bus 0 link: 0
916 12:17:24.363103 PCI: 00:15.0 read_resources bus 0 link: 0 done
917 12:17:24.363195 PCI: 00:15.2 read_resources bus 0 link: 0
918 12:17:24.363272 PCI: 00:15.2 read_resources bus 0 link: 0 done
919 12:17:24.364142 PCI: 00:15.3 read_resources bus 0 link: 0
920 12:17:24.364438 PCI: 00:15.3 read_resources bus 0 link: 0 done
921 12:17:24.364527 PCI: 00:19.0 read_resources bus 0 link: 0
922 12:17:24.364609 PCI: 00:19.0 read_resources bus 0 link: 0 done
923 12:17:24.364688 PCI: 00:1e.2 read_resources bus 3 link: 0
924 12:17:24.364766 PCI: 00:1e.2 read_resources bus 3 link: 0 done
925 12:17:24.364844 PCI: 00:1f.0 read_resources bus 0 link: 0
926 12:17:24.378076 PCI: 00:1f.0 read_resources bus 0 link: 0 done
927 12:17:24.378745 PCI: 00:1f.3 read_resources bus 0 link: 0
928 12:17:24.378846 PCI: 00:1f.3 read_resources bus 0 link: 0 done
929 12:17:24.381320 DOMAIN: 0000 read_resources bus 0 link: 0 done
930 12:17:24.388199 Root Device read_resources bus 0 link: 0 done
931 12:17:24.388300 Done reading resources.
932 12:17:24.394240 Show resources in subtree (Root Device)...After reading.
933 12:17:24.397485 Root Device child on link 0 CPU_CLUSTER: 0
934 12:17:24.404653 CPU_CLUSTER: 0 child on link 0 APIC: 00
935 12:17:24.404754 APIC: 00
936 12:17:24.404832 APIC: 02
937 12:17:24.411014 DOMAIN: 0000 child on link 0 PCI: 00:00.0
938 12:17:24.417805 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
939 12:17:24.427794 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
940 12:17:24.430914 PCI: 00:00.0
941 12:17:24.441067 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
942 12:17:24.451010 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
943 12:17:24.458019 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
944 12:17:24.467434 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
945 12:17:24.477926 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
946 12:17:24.487793 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
947 12:17:24.497505 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
948 12:17:24.504192 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
949 12:17:24.513849 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
950 12:17:24.524024 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
951 12:17:24.534236 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
952 12:17:24.543835 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
953 12:17:24.550852 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
954 12:17:24.560513 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
955 12:17:24.570501 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
956 12:17:24.580474 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
957 12:17:24.590561 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
958 12:17:24.600550 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
959 12:17:24.607105 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
960 12:17:24.610608 PCI: 00:02.0
961 12:17:24.620319 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
962 12:17:24.630391 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
963 12:17:24.640087 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
964 12:17:24.643778 PCI: 00:04.0 child on link 0 GENERIC: 0.0
965 12:17:24.653984 PCI: 00:04.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
966 12:17:24.656847 GENERIC: 0.0
967 12:17:24.659979 PCI: 00:05.0 child on link 0 GENERIC: 0.0
968 12:17:24.670188 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
969 12:17:24.673175 GENERIC: 0.0
970 12:17:24.673267 PCI: 00:08.0
971 12:17:24.683088 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
972 12:17:24.686727 PCI: 00:14.0 child on link 0 USB0 port 0
973 12:17:24.696886 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
974 12:17:24.700815 USB0 port 0 child on link 0 USB2 port 0
975 12:17:24.704787 USB2 port 0
976 12:17:24.704885 USB2 port 1
977 12:17:24.708429 USB2 port 2
978 12:17:24.708525 USB2 port 3
979 12:17:24.711642 USB2 port 4
980 12:17:24.711730 USB2 port 5
981 12:17:24.714526 USB2 port 6
982 12:17:24.714619 USB2 port 7
983 12:17:24.717883 USB3 port 0
984 12:17:24.721910 USB3 port 1
985 12:17:24.722003 USB3 port 2
986 12:17:24.724876 USB3 port 3
987 12:17:24.724968 PCI: 00:14.2
988 12:17:24.728017 PCI: 00:14.3 child on link 0 GENERIC: 0.0
989 12:17:24.738516 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
990 12:17:24.741623 GENERIC: 0.0
991 12:17:24.741712 PCI: 00:14.5
992 12:17:24.751148 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
993 12:17:24.757655 PCI: 00:15.0 child on link 0 I2C: 00:2c
994 12:17:24.767813 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
995 12:17:24.767911 I2C: 00:2c
996 12:17:24.771024 I2C: 00:15
997 12:17:24.771117 PCI: 00:15.1
998 12:17:24.781259 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
999 12:17:24.787571 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1000 12:17:24.797709 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1001 12:17:24.797805 GENERIC: 0.0
1002 12:17:24.801140 I2C: 00:15
1003 12:17:24.801239 I2C: 00:10
1004 12:17:24.801316 I2C: 00:10
1005 12:17:24.804355 I2C: 00:2c
1006 12:17:24.804444 I2C: 00:40
1007 12:17:24.807803 I2C: 00:10
1008 12:17:24.807906 I2C: 00:39
1009 12:17:24.814037 PCI: 00:15.3 child on link 0 I2C: 00:36
1010 12:17:24.824290 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1011 12:17:24.824391 I2C: 00:36
1012 12:17:24.827374 I2C: 00:10
1013 12:17:24.827472 I2C: 00:0c
1014 12:17:24.830969 I2C: 00:50
1015 12:17:24.831067 PCI: 00:16.0
1016 12:17:24.841250 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1017 12:17:24.844225 PCI: 00:19.0 child on link 0 I2C: 00:1a
1018 12:17:24.853787 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1019 12:17:24.857661 I2C: 00:1a
1020 12:17:24.857759 I2C: 00:1a
1021 12:17:24.861066 I2C: 00:1a
1022 12:17:24.861165 I2C: 00:28
1023 12:17:24.864054 I2C: 00:29
1024 12:17:24.864190 PCI: 00:19.2
1025 12:17:24.877647 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1026 12:17:24.886987 PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1027 12:17:24.887096 PCI: 00:1a.0
1028 12:17:24.897082 PCI: 00:1a.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1029 12:17:24.900780 PCI: 00:1e.0
1030 12:17:24.903878 PCI: 00:1e.2 child on link 0 SPI: 00
1031 12:17:24.913518 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1032 12:17:24.913622 SPI: 00
1033 12:17:24.917219 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1034 12:17:24.927101 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1035 12:17:24.930035 PNP: 0c09.0
1036 12:17:24.936655 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1037 12:17:24.940310 PCI: 00:1f.2
1038 12:17:24.950006 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1039 12:17:24.956926 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1040 12:17:24.963439 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1041 12:17:24.973647 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1042 12:17:24.983304 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1043 12:17:24.983408 GENERIC: 0.0
1044 12:17:24.986545 PCI: 00:1f.5
1045 12:17:24.993493 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1046 12:17:25.003488 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1047 12:17:25.010190 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1048 12:17:25.016788 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1049 12:17:25.023213 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1050 12:17:25.029707 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1051 12:17:25.039841 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1052 12:17:25.042920 DOMAIN: 0000: Resource ranges:
1053 12:17:25.046611 * Base: 1000, Size: 800, Tag: 100
1054 12:17:25.049620 * Base: 1900, Size: e700, Tag: 100
1055 12:17:25.053035 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1056 12:17:25.059597 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1057 12:17:25.066461 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1058 12:17:25.076378 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1059 12:17:25.082733 update_constraints: PCI: 00:00.0 01 base fea80000 limit fea87fff mem (fixed)
1060 12:17:25.089645 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1061 12:17:25.099189 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1062 12:17:25.106294 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1063 12:17:25.112764 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1064 12:17:25.122324 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1065 12:17:25.129013 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1066 12:17:25.136082 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1067 12:17:25.145931 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1068 12:17:25.152797 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1069 12:17:25.158858 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1070 12:17:25.169075 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1071 12:17:25.175428 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1072 12:17:25.182270 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1073 12:17:25.192471 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1074 12:17:25.198691 update_constraints: PCI: 00:00.0 10 base 100000000 limit 1803fffff mem (fixed)
1075 12:17:25.205136 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1076 12:17:25.215342 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1077 12:17:25.221943 update_constraints: PCI: 00:19.2 10 base fe032000 limit fe032fff mem (fixed)
1078 12:17:25.228741 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1079 12:17:25.232021 DOMAIN: 0000: Resource ranges:
1080 12:17:25.238379 * Base: 7fc00000, Size: 40400000, Tag: 200
1081 12:17:25.242124 * Base: d0000000, Size: 2b000000, Tag: 200
1082 12:17:25.245062 * Base: fb001000, Size: 2fff000, Tag: 200
1083 12:17:25.248707 * Base: fe010000, Size: 22000, Tag: 200
1084 12:17:25.255187 * Base: fe033000, Size: a4d000, Tag: 200
1085 12:17:25.258380 * Base: fea88000, Size: 2f8000, Tag: 200
1086 12:17:25.261910 * Base: fed88000, Size: 8000, Tag: 200
1087 12:17:25.264946 * Base: fed93000, Size: d000, Tag: 200
1088 12:17:25.271423 * Base: feda2000, Size: 125e000, Tag: 200
1089 12:17:25.276006 * Base: 180400000, Size: 7e7fc00000, Tag: 100200
1090 12:17:25.282534 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1091 12:17:25.289149 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1092 12:17:25.295995 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1093 12:17:25.302307 PCI: 00:1f.3 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1094 12:17:25.309252 PCI: 00:04.0 10 * [0x7fd00000 - 0x7fd0ffff] limit: 7fd0ffff mem
1095 12:17:25.315585 PCI: 00:14.0 10 * [0x7fd10000 - 0x7fd1ffff] limit: 7fd1ffff mem
1096 12:17:25.322709 PCI: 00:14.3 10 * [0x7fd20000 - 0x7fd23fff] limit: 7fd23fff mem
1097 12:17:25.328751 PCI: 00:1f.3 10 * [0x7fd24000 - 0x7fd27fff] limit: 7fd27fff mem
1098 12:17:25.335887 PCI: 00:08.0 10 * [0x7fd28000 - 0x7fd28fff] limit: 7fd28fff mem
1099 12:17:25.341995 PCI: 00:14.5 10 * [0x7fd29000 - 0x7fd29fff] limit: 7fd29fff mem
1100 12:17:25.348593 PCI: 00:15.0 10 * [0x7fd2a000 - 0x7fd2afff] limit: 7fd2afff mem
1101 12:17:25.355158 PCI: 00:15.1 10 * [0x7fd2b000 - 0x7fd2bfff] limit: 7fd2bfff mem
1102 12:17:25.361865 PCI: 00:15.2 10 * [0x7fd2c000 - 0x7fd2cfff] limit: 7fd2cfff mem
1103 12:17:25.368670 PCI: 00:15.3 10 * [0x7fd2d000 - 0x7fd2dfff] limit: 7fd2dfff mem
1104 12:17:25.375524 PCI: 00:16.0 10 * [0x7fd2e000 - 0x7fd2efff] limit: 7fd2efff mem
1105 12:17:25.382027 PCI: 00:19.0 10 * [0x7fd2f000 - 0x7fd2ffff] limit: 7fd2ffff mem
1106 12:17:25.388924 PCI: 00:19.2 18 * [0x7fd30000 - 0x7fd30fff] limit: 7fd30fff mem
1107 12:17:25.395588 PCI: 00:1a.0 10 * [0x7fd31000 - 0x7fd31fff] limit: 7fd31fff mem
1108 12:17:25.402551 PCI: 00:1e.2 10 * [0x7fd32000 - 0x7fd32fff] limit: 7fd32fff mem
1109 12:17:25.408860 PCI: 00:1f.5 10 * [0x7fd33000 - 0x7fd33fff] limit: 7fd33fff mem
1110 12:17:25.415345 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1111 12:17:25.422338 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1112 12:17:25.425639 Root Device assign_resources, bus 0 link: 0
1113 12:17:25.431798 DOMAIN: 0000 assign_resources, bus 0 link: 0
1114 12:17:25.438486 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1115 12:17:25.448930 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1116 12:17:25.455005 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1117 12:17:25.464966 PCI: 00:04.0 10 <- [0x007fd00000 - 0x007fd0ffff] size 0x00010000 gran 0x10 mem64
1118 12:17:25.468636 PCI: 00:04.0 assign_resources, bus 1 link: 0
1119 12:17:25.472036 PCI: 00:04.0 assign_resources, bus 1 link: 0
1120 12:17:25.481556 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1121 12:17:25.485285 PCI: 00:05.0 assign_resources, bus 2 link: 0
1122 12:17:25.491731 PCI: 00:05.0 assign_resources, bus 2 link: 0
1123 12:17:25.498351 PCI: 00:08.0 10 <- [0x007fd28000 - 0x007fd28fff] size 0x00001000 gran 0x0c mem64
1124 12:17:25.508379 PCI: 00:14.0 10 <- [0x007fd10000 - 0x007fd1ffff] size 0x00010000 gran 0x10 mem64
1125 12:17:25.511890 PCI: 00:14.0 assign_resources, bus 0 link: 0
1126 12:17:25.515416 PCI: 00:14.0 assign_resources, bus 0 link: 0
1127 12:17:25.525031 PCI: 00:14.3 10 <- [0x007fd20000 - 0x007fd23fff] size 0x00004000 gran 0x0e mem64
1128 12:17:25.528655 PCI: 00:14.3 assign_resources, bus 0 link: 0
1129 12:17:25.531797 PCI: 00:14.3 assign_resources, bus 0 link: 0
1130 12:17:25.541920 PCI: 00:14.5 10 <- [0x007fd29000 - 0x007fd29fff] size 0x00001000 gran 0x0c mem64
1131 12:17:25.548394 PCI: 00:15.0 10 <- [0x007fd2a000 - 0x007fd2afff] size 0x00001000 gran 0x0c mem64
1132 12:17:25.554906 PCI: 00:15.0 assign_resources, bus 0 link: 0
1133 12:17:25.558345 PCI: 00:15.0 assign_resources, bus 0 link: 0
1134 12:17:25.568740 PCI: 00:15.1 10 <- [0x007fd2b000 - 0x007fd2bfff] size 0x00001000 gran 0x0c mem64
1135 12:17:25.574880 PCI: 00:15.2 10 <- [0x007fd2c000 - 0x007fd2cfff] size 0x00001000 gran 0x0c mem64
1136 12:17:25.578440 PCI: 00:15.2 assign_resources, bus 0 link: 0
1137 12:17:25.584634 PCI: 00:15.2 assign_resources, bus 0 link: 0
1138 12:17:25.591601 PCI: 00:15.3 10 <- [0x007fd2d000 - 0x007fd2dfff] size 0x00001000 gran 0x0c mem64
1139 12:17:25.597798 PCI: 00:15.3 assign_resources, bus 0 link: 0
1140 12:17:25.601487 PCI: 00:15.3 assign_resources, bus 0 link: 0
1141 12:17:25.611023 PCI: 00:16.0 10 <- [0x007fd2e000 - 0x007fd2efff] size 0x00001000 gran 0x0c mem64
1142 12:17:25.618225 PCI: 00:19.0 10 <- [0x007fd2f000 - 0x007fd2ffff] size 0x00001000 gran 0x0c mem64
1143 12:17:25.621125 PCI: 00:19.0 assign_resources, bus 0 link: 0
1144 12:17:25.627485 PCI: 00:19.0 assign_resources, bus 0 link: 0
1145 12:17:25.634430 PCI: 00:19.2 18 <- [0x007fd30000 - 0x007fd30fff] size 0x00001000 gran 0x0c mem64
1146 12:17:25.644612 PCI: 00:1a.0 10 <- [0x007fd31000 - 0x007fd31fff] size 0x00001000 gran 0x0c mem64
1147 12:17:25.650834 PCI: 00:1e.2 10 <- [0x007fd32000 - 0x007fd32fff] size 0x00001000 gran 0x0c mem64
1148 12:17:25.654320 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1149 12:17:25.661054 PCI: 00:1e.2 assign_resources, bus 3 link: 0
1150 12:17:25.664679 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1151 12:17:25.671412 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1152 12:17:25.674139 LPC: Trying to open IO window from 800 size 1ff
1153 12:17:25.683989 PCI: 00:1f.3 10 <- [0x007fd24000 - 0x007fd27fff] size 0x00004000 gran 0x0e mem64
1154 12:17:25.690902 PCI: 00:1f.3 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 mem64
1155 12:17:25.693966 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1156 12:17:25.701184 PCI: 00:1f.3 assign_resources, bus 0 link: 0
1157 12:17:25.707284 PCI: 00:1f.5 10 <- [0x007fd33000 - 0x007fd33fff] size 0x00001000 gran 0x0c mem
1158 12:17:25.714197 DOMAIN: 0000 assign_resources, bus 0 link: 0
1159 12:17:25.717678 Root Device assign_resources, bus 0 link: 0
1160 12:17:25.720751 Done setting resources.
1161 12:17:25.727639 Show resources in subtree (Root Device)...After assigning values.
1162 12:17:25.730750 Root Device child on link 0 CPU_CLUSTER: 0
1163 12:17:25.733901 CPU_CLUSTER: 0 child on link 0 APIC: 00
1164 12:17:25.737482 APIC: 00
1165 12:17:25.737572 APIC: 02
1166 12:17:25.740365 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1167 12:17:25.750823 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1168 12:17:25.760524 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1169 12:17:25.764051 PCI: 00:00.0
1170 12:17:25.774049 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1171 12:17:25.780601 PCI: 00:00.0 resource base fea80000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1172 12:17:25.791078 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1173 12:17:25.800409 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1174 12:17:25.810322 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1175 12:17:25.820420 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1176 12:17:25.826859 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1177 12:17:25.836889 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1178 12:17:25.847201 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1179 12:17:25.856567 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1180 12:17:25.866631 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1181 12:17:25.876434 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1182 12:17:25.882943 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1183 12:17:25.892950 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1184 12:17:25.903053 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1185 12:17:25.912808 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1186 12:17:25.922755 PCI: 00:00.0 resource base 100000000 size 80400000 align 0 gran 0 limit 0 flags e0004200 index 10
1187 12:17:25.929622 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1188 12:17:25.939772 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1189 12:17:25.943017 PCI: 00:02.0
1190 12:17:25.952562 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1191 12:17:25.962783 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1192 12:17:25.972850 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1193 12:17:25.976094 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 12:17:25.985883 PCI: 00:04.0 resource base 7fd00000 size 10000 align 16 gran 16 limit 7fd0ffff flags 60000201 index 10
1195 12:17:25.989556 GENERIC: 0.0
1196 12:17:25.992617 PCI: 00:05.0 child on link 0 GENERIC: 0.0
1197 12:17:26.005795 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1198 12:17:26.005897 GENERIC: 0.0
1199 12:17:26.009547 PCI: 00:08.0
1200 12:17:26.019221 PCI: 00:08.0 resource base 7fd28000 size 1000 align 12 gran 12 limit 7fd28fff flags 60000201 index 10
1201 12:17:26.022389 PCI: 00:14.0 child on link 0 USB0 port 0
1202 12:17:26.032444 PCI: 00:14.0 resource base 7fd10000 size 10000 align 16 gran 16 limit 7fd1ffff flags 60000201 index 10
1203 12:17:26.035867 USB0 port 0 child on link 0 USB2 port 0
1204 12:17:26.038981 USB2 port 0
1205 12:17:26.042212 USB2 port 1
1206 12:17:26.042305 USB2 port 2
1207 12:17:26.045259 USB2 port 3
1208 12:17:26.045346 USB2 port 4
1209 12:17:26.049021 USB2 port 5
1210 12:17:26.049117 USB2 port 6
1211 12:17:26.052175 USB2 port 7
1212 12:17:26.052259 USB3 port 0
1213 12:17:26.055265 USB3 port 1
1214 12:17:26.055353 USB3 port 2
1215 12:17:26.059159 USB3 port 3
1216 12:17:26.059252 PCI: 00:14.2
1217 12:17:26.065517 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1218 12:17:26.075087 PCI: 00:14.3 resource base 7fd20000 size 4000 align 14 gran 14 limit 7fd23fff flags 60000201 index 10
1219 12:17:26.075188 GENERIC: 0.0
1220 12:17:26.078851 PCI: 00:14.5
1221 12:17:26.089012 PCI: 00:14.5 resource base 7fd29000 size 1000 align 12 gran 12 limit 7fd29fff flags 60000201 index 10
1222 12:17:26.091910 PCI: 00:15.0 child on link 0 I2C: 00:2c
1223 12:17:26.101947 PCI: 00:15.0 resource base 7fd2a000 size 1000 align 12 gran 12 limit 7fd2afff flags 60000201 index 10
1224 12:17:26.104915 I2C: 00:2c
1225 12:17:26.105014 I2C: 00:15
1226 12:17:26.108475 PCI: 00:15.1
1227 12:17:26.118555 PCI: 00:15.1 resource base 7fd2b000 size 1000 align 12 gran 12 limit 7fd2bfff flags 60000201 index 10
1228 12:17:26.121516 PCI: 00:15.2 child on link 0 GENERIC: 0.0
1229 12:17:26.132165 PCI: 00:15.2 resource base 7fd2c000 size 1000 align 12 gran 12 limit 7fd2cfff flags 60000201 index 10
1230 12:17:26.134763 GENERIC: 0.0
1231 12:17:26.134863 I2C: 00:15
1232 12:17:26.138555 I2C: 00:10
1233 12:17:26.138653 I2C: 00:10
1234 12:17:26.142006 I2C: 00:2c
1235 12:17:26.142102 I2C: 00:40
1236 12:17:26.145191 I2C: 00:10
1237 12:17:26.145288 I2C: 00:39
1238 12:17:26.151523 PCI: 00:15.3 child on link 0 I2C: 00:36
1239 12:17:26.161778 PCI: 00:15.3 resource base 7fd2d000 size 1000 align 12 gran 12 limit 7fd2dfff flags 60000201 index 10
1240 12:17:26.161876 I2C: 00:36
1241 12:17:26.164703 I2C: 00:10
1242 12:17:26.164801 I2C: 00:0c
1243 12:17:26.168396 I2C: 00:50
1244 12:17:26.168493 PCI: 00:16.0
1245 12:17:26.178064 PCI: 00:16.0 resource base 7fd2e000 size 1000 align 12 gran 12 limit 7fd2efff flags 60000201 index 10
1246 12:17:26.181245 PCI: 00:19.0 child on link 0 I2C: 00:1a
1247 12:17:26.194545 PCI: 00:19.0 resource base 7fd2f000 size 1000 align 12 gran 12 limit 7fd2ffff flags 60000201 index 10
1248 12:17:26.194644 I2C: 00:1a
1249 12:17:26.194721 I2C: 00:1a
1250 12:17:26.198151 I2C: 00:1a
1251 12:17:26.198249 I2C: 00:28
1252 12:17:26.201460 I2C: 00:29
1253 12:17:26.201557 PCI: 00:19.2
1254 12:17:26.214731 PCI: 00:19.2 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1255 12:17:26.224518 PCI: 00:19.2 resource base 7fd30000 size 1000 align 12 gran 12 limit 7fd30fff flags 60000201 index 18
1256 12:17:26.224621 PCI: 00:1a.0
1257 12:17:26.238196 PCI: 00:1a.0 resource base 7fd31000 size 1000 align 12 gran 12 limit 7fd31fff flags 60000201 index 10
1258 12:17:26.238298 PCI: 00:1e.0
1259 12:17:26.241295 PCI: 00:1e.2 child on link 0 SPI: 00
1260 12:17:26.251377 PCI: 00:1e.2 resource base 7fd32000 size 1000 align 12 gran 12 limit 7fd32fff flags 60000201 index 10
1261 12:17:26.254573 SPI: 00
1262 12:17:26.257543 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1263 12:17:26.267105 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1264 12:17:26.267205 PNP: 0c09.0
1265 12:17:26.277342 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1266 12:17:26.277441 PCI: 00:1f.2
1267 12:17:26.287593 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1268 12:17:26.297117 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 1901 flags c0000100 index 1
1269 12:17:26.300157 PCI: 00:1f.3 child on link 0 GENERIC: 0.0
1270 12:17:26.310257 PCI: 00:1f.3 resource base 7fd24000 size 4000 align 14 gran 14 limit 7fd27fff flags 60000201 index 10
1271 12:17:26.323929 PCI: 00:1f.3 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60000201 index 20
1272 12:17:26.324035 GENERIC: 0.0
1273 12:17:26.327412 PCI: 00:1f.5
1274 12:17:26.336754 PCI: 00:1f.5 resource base 7fd33000 size 1000 align 12 gran 12 limit 7fd33fff flags 60000200 index 10
1275 12:17:26.340401 Done allocating resources.
1276 12:17:26.343196 BS: BS_DEV_RESOURCES run times (exec / console): 21 / 2099 ms
1277 12:17:26.347104 Enabling resources...
1278 12:17:26.350122 PCI: 00:00.0 subsystem <- 8086/4e22
1279 12:17:26.353193 PCI: 00:00.0 cmd <- 06
1280 12:17:26.356514 PCI: 00:02.0 subsystem <- 8086/4e55
1281 12:17:26.360350 PCI: 00:02.0 cmd <- 03
1282 12:17:26.363529 PCI: 00:04.0 subsystem <- 8086/4e03
1283 12:17:26.366666 PCI: 00:04.0 cmd <- 02
1284 12:17:26.369954 PCI: 00:05.0 bridge ctrl <- 0003
1285 12:17:26.373675 PCI: 00:05.0 subsystem <- 8086/4e19
1286 12:17:26.376878 PCI: 00:05.0 cmd <- 02
1287 12:17:26.376968 PCI: 00:08.0 cmd <- 06
1288 12:17:26.383217 PCI: 00:14.0 subsystem <- 8086/4ded
1289 12:17:26.383309 PCI: 00:14.0 cmd <- 02
1290 12:17:26.387102 PCI: 00:14.3 subsystem <- 8086/4df0
1291 12:17:26.390171 PCI: 00:14.3 cmd <- 02
1292 12:17:26.393292 PCI: 00:14.5 subsystem <- 8086/4df8
1293 12:17:26.396821 PCI: 00:14.5 cmd <- 06
1294 12:17:26.399975 PCI: 00:15.0 subsystem <- 8086/4de8
1295 12:17:26.402927 PCI: 00:15.0 cmd <- 02
1296 12:17:26.406639 PCI: 00:15.1 subsystem <- 8086/4de9
1297 12:17:26.409772 PCI: 00:15.1 cmd <- 02
1298 12:17:26.412990 PCI: 00:15.2 subsystem <- 8086/4dea
1299 12:17:26.413080 PCI: 00:15.2 cmd <- 02
1300 12:17:26.420459 PCI: 00:15.3 subsystem <- 8086/4deb
1301 12:17:26.420552 PCI: 00:15.3 cmd <- 02
1302 12:17:26.423250 PCI: 00:16.0 subsystem <- 8086/4de0
1303 12:17:26.426946 PCI: 00:16.0 cmd <- 02
1304 12:17:26.430078 PCI: 00:19.0 subsystem <- 8086/4dc5
1305 12:17:26.433705 PCI: 00:19.0 cmd <- 02
1306 12:17:26.436545 PCI: 00:19.2 subsystem <- 8086/4dc7
1307 12:17:26.439705 PCI: 00:19.2 cmd <- 06
1308 12:17:26.443378 PCI: 00:1a.0 subsystem <- 8086/4dc4
1309 12:17:26.446351 PCI: 00:1a.0 cmd <- 06
1310 12:17:26.449859 PCI: 00:1e.2 subsystem <- 8086/4daa
1311 12:17:26.452914 PCI: 00:1e.2 cmd <- 06
1312 12:17:26.456675 PCI: 00:1f.0 subsystem <- 8086/4d87
1313 12:17:26.456772 PCI: 00:1f.0 cmd <- 407
1314 12:17:26.463151 PCI: 00:1f.3 subsystem <- 8086/4dc8
1315 12:17:26.463249 PCI: 00:1f.3 cmd <- 02
1316 12:17:26.466394 PCI: 00:1f.5 subsystem <- 8086/4da4
1317 12:17:26.470005 PCI: 00:1f.5 cmd <- 406
1318 12:17:26.474532 done.
1319 12:17:26.477583 BS: BS_DEV_ENABLE run times (exec / console): 6 / 122 ms
1320 12:17:26.480949 Initializing devices...
1321 12:17:26.484669 Root Device init
1322 12:17:26.484767 mainboard: EC init
1323 12:17:26.490961 Chrome EC: Set SMI mask to 0x0000000000000000
1324 12:17:26.494118 Chrome EC: clear events_b mask to 0x0000000000000000
1325 12:17:26.501361 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1326 12:17:26.507491 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001000101e
1327 12:17:26.514068 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001000101e
1328 12:17:26.517424 Chrome EC: Set WAKE mask to 0x0000000000000000
1329 12:17:26.524100 Root Device init finished in 35 msecs
1330 12:17:26.527155 PCI: 00:00.0 init
1331 12:17:26.527292 CPU TDP = 6 Watts
1332 12:17:26.530655 CPU PL1 = 7 Watts
1333 12:17:26.533903 CPU PL2 = 12 Watts
1334 12:17:26.537374 PCI: 00:00.0 init finished in 6 msecs
1335 12:17:26.537474 PCI: 00:02.0 init
1336 12:17:26.540899 GMA: Found VBT in CBFS
1337 12:17:26.543925 GMA: Found valid VBT in CBFS
1338 12:17:26.551125 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1339 12:17:26.557717 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1340 12:17:26.560792 PCI: 00:02.0 init finished in 18 msecs
1341 12:17:26.564106 PCI: 00:08.0 init
1342 12:17:26.567781 PCI: 00:08.0 init finished in 0 msecs
1343 12:17:26.570980 PCI: 00:14.0 init
1344 12:17:26.574007 XHCI: Updated LFPS sampling OFF time to 9 ms
1345 12:17:26.577178 PCI: 00:14.0 init finished in 4 msecs
1346 12:17:26.580393 PCI: 00:15.0 init
1347 12:17:26.584101 I2C bus 0 version 0x3230302a
1348 12:17:26.587325 DW I2C bus 0 at 0x7fd2a000 (400 KHz)
1349 12:17:26.590563 PCI: 00:15.0 init finished in 6 msecs
1350 12:17:26.593853 PCI: 00:15.1 init
1351 12:17:26.597554 I2C bus 1 version 0x3230302a
1352 12:17:26.600788 DW I2C bus 1 at 0x7fd2b000 (400 KHz)
1353 12:17:26.603808 PCI: 00:15.1 init finished in 6 msecs
1354 12:17:26.603907 PCI: 00:15.2 init
1355 12:17:26.607531 I2C bus 2 version 0x3230302a
1356 12:17:26.610802 DW I2C bus 2 at 0x7fd2c000 (400 KHz)
1357 12:17:26.617105 PCI: 00:15.2 init finished in 6 msecs
1358 12:17:26.617205 PCI: 00:15.3 init
1359 12:17:26.620851 I2C bus 3 version 0x3230302a
1360 12:17:26.624062 DW I2C bus 3 at 0x7fd2d000 (400 KHz)
1361 12:17:26.627053 PCI: 00:15.3 init finished in 6 msecs
1362 12:17:26.630640 PCI: 00:16.0 init
1363 12:17:26.633694 PCI: 00:16.0 init finished in 0 msecs
1364 12:17:26.637490 PCI: 00:19.0 init
1365 12:17:26.640586 I2C bus 4 version 0x3230302a
1366 12:17:26.643572 DW I2C bus 4 at 0x7fd2f000 (400 KHz)
1367 12:17:26.647098 PCI: 00:19.0 init finished in 6 msecs
1368 12:17:26.650686 PCI: 00:1a.0 init
1369 12:17:26.653544 PCI: 00:1a.0 init finished in 0 msecs
1370 12:17:26.657188 PCI: 00:1f.0 init
1371 12:17:26.660709 IOAPIC: Initializing IOAPIC at 0xfec00000
1372 12:17:26.663792 IOAPIC: Bootstrap Processor Local APIC = 0x00
1373 12:17:26.666824 IOAPIC: ID = 0x02
1374 12:17:26.670667 IOAPIC: Dumping registers
1375 12:17:26.670753 reg 0x0000: 0x02000000
1376 12:17:26.673914 reg 0x0001: 0x00770020
1377 12:17:26.676935 reg 0x0002: 0x00000000
1378 12:17:26.680187 PCI: 00:1f.0 init finished in 21 msecs
1379 12:17:26.683613 PCI: 00:1f.2 init
1380 12:17:26.683697 Disabling ACPI via APMC.
1381 12:17:26.689312 APMC done.
1382 12:17:26.692362 PCI: 00:1f.2 init finished in 5 msecs
1383 12:17:26.703987 PNP: 0c09.0 init
1384 12:17:26.707182 Google Chrome EC uptime: 6.549 seconds
1385 12:17:26.713322 Google Chrome AP resets since EC boot: 0
1386 12:17:26.717269 Google Chrome most recent AP reset causes:
1387 12:17:26.723717 Google Chrome EC reset flags at last EC boot: reset-pin
1388 12:17:26.726849 PNP: 0c09.0 init finished in 18 msecs
1389 12:17:26.726939 Devices initialized
1390 12:17:26.730234 Show all devs... After init.
1391 12:17:26.734006 Root Device: enabled 1
1392 12:17:26.736880 CPU_CLUSTER: 0: enabled 1
1393 12:17:26.740433 DOMAIN: 0000: enabled 1
1394 12:17:26.740527 PCI: 00:00.0: enabled 1
1395 12:17:26.743400 PCI: 00:02.0: enabled 1
1396 12:17:26.746923 PCI: 00:04.0: enabled 1
1397 12:17:26.747017 PCI: 00:05.0: enabled 1
1398 12:17:26.749885 PCI: 00:09.0: enabled 0
1399 12:17:26.753652 PCI: 00:12.6: enabled 0
1400 12:17:26.756552 PCI: 00:14.0: enabled 1
1401 12:17:26.756646 PCI: 00:14.1: enabled 0
1402 12:17:26.760321 PCI: 00:14.2: enabled 0
1403 12:17:26.763274 PCI: 00:14.3: enabled 1
1404 12:17:26.766726 PCI: 00:14.5: enabled 1
1405 12:17:26.766825 PCI: 00:15.0: enabled 1
1406 12:17:26.770255 PCI: 00:15.1: enabled 1
1407 12:17:26.773209 PCI: 00:15.2: enabled 1
1408 12:17:26.776646 PCI: 00:15.3: enabled 1
1409 12:17:26.776746 PCI: 00:16.0: enabled 1
1410 12:17:26.779829 PCI: 00:16.1: enabled 0
1411 12:17:26.782974 PCI: 00:16.4: enabled 0
1412 12:17:26.783072 PCI: 00:16.5: enabled 0
1413 12:17:26.786771 PCI: 00:17.0: enabled 0
1414 12:17:26.789949 PCI: 00:19.0: enabled 1
1415 12:17:26.793073 PCI: 00:19.1: enabled 0
1416 12:17:26.793173 PCI: 00:19.2: enabled 1
1417 12:17:26.796307 PCI: 00:1a.0: enabled 1
1418 12:17:26.800072 PCI: 00:1c.0: enabled 0
1419 12:17:26.803303 PCI: 00:1c.1: enabled 0
1420 12:17:26.803401 PCI: 00:1c.2: enabled 0
1421 12:17:26.806409 PCI: 00:1c.3: enabled 0
1422 12:17:26.809720 PCI: 00:1c.4: enabled 0
1423 12:17:26.812890 PCI: 00:1c.5: enabled 0
1424 12:17:26.812990 PCI: 00:1c.6: enabled 0
1425 12:17:26.816217 PCI: 00:1c.7: enabled 1
1426 12:17:26.819874 PCI: 00:1e.0: enabled 0
1427 12:17:26.823018 PCI: 00:1e.1: enabled 0
1428 12:17:26.823129 PCI: 00:1e.2: enabled 1
1429 12:17:26.826345 PCI: 00:1e.3: enabled 0
1430 12:17:26.829957 PCI: 00:1f.0: enabled 1
1431 12:17:26.830068 PCI: 00:1f.1: enabled 0
1432 12:17:26.833552 PCI: 00:1f.2: enabled 1
1433 12:17:26.836612 PCI: 00:1f.3: enabled 1
1434 12:17:26.839572 PCI: 00:1f.4: enabled 0
1435 12:17:26.839671 PCI: 00:1f.5: enabled 1
1436 12:17:26.843385 PCI: 00:1f.7: enabled 0
1437 12:17:26.846440 GENERIC: 0.0: enabled 1
1438 12:17:26.850056 GENERIC: 0.0: enabled 1
1439 12:17:26.850155 USB0 port 0: enabled 1
1440 12:17:26.852999 GENERIC: 0.0: enabled 1
1441 12:17:26.856561 I2C: 00:2c: enabled 1
1442 12:17:26.856661 I2C: 00:15: enabled 1
1443 12:17:26.859487 GENERIC: 0.0: enabled 0
1444 12:17:26.863244 I2C: 00:15: enabled 1
1445 12:17:26.863343 I2C: 00:10: enabled 0
1446 12:17:26.866262 I2C: 00:10: enabled 0
1447 12:17:26.869853 I2C: 00:2c: enabled 1
1448 12:17:26.869958 I2C: 00:40: enabled 1
1449 12:17:26.872810 I2C: 00:10: enabled 1
1450 12:17:26.876549 I2C: 00:39: enabled 1
1451 12:17:26.876656 I2C: 00:36: enabled 1
1452 12:17:26.879421 I2C: 00:10: enabled 0
1453 12:17:26.882925 I2C: 00:0c: enabled 1
1454 12:17:26.883008 I2C: 00:50: enabled 1
1455 12:17:26.886089 I2C: 00:1a: enabled 1
1456 12:17:26.889406 I2C: 00:1a: enabled 0
1457 12:17:26.889495 I2C: 00:1a: enabled 0
1458 12:17:26.892680 I2C: 00:28: enabled 1
1459 12:17:26.896280 I2C: 00:29: enabled 1
1460 12:17:26.899419 PCI: 00:00.0: enabled 1
1461 12:17:26.899505 SPI: 00: enabled 1
1462 12:17:26.902651 PNP: 0c09.0: enabled 1
1463 12:17:26.906431 GENERIC: 0.0: enabled 0
1464 12:17:26.906530 USB2 port 0: enabled 1
1465 12:17:26.909796 USB2 port 1: enabled 1
1466 12:17:26.912627 USB2 port 2: enabled 1
1467 12:17:26.912715 USB2 port 3: enabled 1
1468 12:17:26.915904 USB2 port 4: enabled 0
1469 12:17:26.919568 USB2 port 5: enabled 1
1470 12:17:26.922863 USB2 port 6: enabled 0
1471 12:17:26.922949 USB2 port 7: enabled 1
1472 12:17:26.925988 USB3 port 0: enabled 1
1473 12:17:26.929276 USB3 port 1: enabled 1
1474 12:17:26.929361 USB3 port 2: enabled 1
1475 12:17:26.932403 USB3 port 3: enabled 1
1476 12:17:26.935619 APIC: 00: enabled 1
1477 12:17:26.935703 APIC: 02: enabled 1
1478 12:17:26.939531 PCI: 00:08.0: enabled 1
1479 12:17:26.945947 BS: BS_DEV_INIT run times (exec / console): 23 / 438 ms
1480 12:17:26.949210 FMAP: area RW_ELOG found @ bfa000 (4096 bytes)
1481 12:17:26.952407 ELOG: NV offset 0xbfa000 size 0x1000
1482 12:17:26.960013 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1483 12:17:26.966519 ELOG: Event(17) added with size 13 at 2023-03-22 12:17:25 UTC
1484 12:17:26.973418 ELOG: Event(92) added with size 9 at 2023-03-22 12:17:25 UTC
1485 12:17:26.979809 ELOG: Event(93) added with size 9 at 2023-03-22 12:17:25 UTC
1486 12:17:26.986894 ELOG: Event(9E) added with size 10 at 2023-03-22 12:17:25 UTC
1487 12:17:26.993614 ELOG: Event(9F) added with size 14 at 2023-03-22 12:17:25 UTC
1488 12:17:26.997250 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1489 12:17:27.003538 ELOG: Event(A1) added with size 10 at 2023-03-22 12:17:25 UTC
1490 12:17:27.013028 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1491 12:17:27.020230 ELOG: Event(A0) added with size 9 at 2023-03-22 12:17:26 UTC
1492 12:17:27.023187 elog_add_boot_reason: Logged dev mode boot
1493 12:17:27.029794 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1494 12:17:27.029892 Finalize devices...
1495 12:17:27.033097 Devices finalized
1496 12:17:27.036810 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1497 12:17:27.043303 FMAP: area RW_NVRAM found @ bfe000 (8192 bytes)
1498 12:17:27.050569 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1499 12:17:27.053402 ME: HFSTS1 : 0x80030045
1500 12:17:27.056770 ME: HFSTS2 : 0x30280136
1501 12:17:27.059756 ME: HFSTS3 : 0x00000050
1502 12:17:27.066480 ME: HFSTS4 : 0x00004000
1503 12:17:27.070013 ME: HFSTS5 : 0x00000000
1504 12:17:27.073433 ME: HFSTS6 : 0x40400006
1505 12:17:27.076465 ME: Manufacturing Mode : NO
1506 12:17:27.079562 ME: FW Partition Table : OK
1507 12:17:27.082952 ME: Bringup Loader Failure : NO
1508 12:17:27.086408 ME: Firmware Init Complete : NO
1509 12:17:27.089501 ME: Boot Options Present : NO
1510 12:17:27.092871 ME: Update In Progress : NO
1511 12:17:27.096644 ME: D0i3 Support : YES
1512 12:17:27.099494 ME: Low Power State Enabled : NO
1513 12:17:27.102971 ME: CPU Replaced : YES
1514 12:17:27.106433 ME: CPU Replacement Valid : YES
1515 12:17:27.109862 ME: Current Working State : 5
1516 12:17:27.112976 ME: Current Operation State : 1
1517 12:17:27.116120 ME: Current Operation Mode : 3
1518 12:17:27.119980 ME: Error Code : 0
1519 12:17:27.123005 ME: CPU Debug Disabled : YES
1520 12:17:27.126369 ME: TXT Support : NO
1521 12:17:27.133159 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 77 ms
1522 12:17:27.136316 CBFS: Found 'fallback/dsdt.aml' @0x41280 size 0x32d2
1523 12:17:27.143251 ACPI: Writing ACPI tables at 76b27000.
1524 12:17:27.143348 ACPI: * FACS
1525 12:17:27.147250 ACPI: * DSDT
1526 12:17:27.150395 Ramoops buffer: 0x100000@0x76a26000.
1527 12:17:27.153446 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1528 12:17:27.159933 FMAP: area RW_VPD found @ bfc000 (8192 bytes)
1529 12:17:27.163738 Google Chrome EC: version:
1530 12:17:27.166971 ro: magolor_1.1.9999-103b6f9
1531 12:17:27.169866 rw: magolor_1.1.9999-103b6f9
1532 12:17:27.169964 running image: 1
1533 12:17:27.176565 PCI space above 4GB MMIO is at 0x180400000, len = 0x7e7fc00000
1534 12:17:27.180015 ACPI: * FADT
1535 12:17:27.180115 SCI is IRQ9
1536 12:17:27.186466 ACPI: added table 1/32, length now 40
1537 12:17:27.186566 ACPI: * SSDT
1538 12:17:27.190017 Found 1 CPU(s) with 2 core(s) each.
1539 12:17:27.193504 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1540 12:17:27.199755 \_SB.PCI0.IPU0.IPU0: Intel MIPI Camera Device I2C address 00h
1541 12:17:27.203196 Could not locate 'wifi_sar' in VPD.
1542 12:17:27.206535 Checking CBFS for default SAR values
1543 12:17:27.213212 wifi_sar_defaults.hex has bad len in CBFS
1544 12:17:27.216285 failed from getting SAR limits!
1545 12:17:27.219727 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1546 12:17:27.226481 \_SB.PCI0.I2C0.H02C: Synaptics Touchpad at I2C: 00:2c
1547 12:17:27.230151 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 00:15
1548 12:17:27.236548 \_SB.PCI0.I2C2.H015: ELAN Touchscreen at I2C: 00:15
1549 12:17:27.239792 \_SB.PCI0.I2C2.H02C: WDT Touchscreen at I2C: 00:2c
1550 12:17:27.246702 \_SB.PCI0.I2C2.H040: G2 Touchscreen at I2C: 00:40
1551 12:17:27.249824 \_SB.PCI0.I2C2.D010: ELAN Touchscreen at I2C: 00:10
1552 12:17:27.256892 \_SB.PCI0.I2C2.D039: Raydium Touchscreen at I2C: 00:39
1553 12:17:27.263026 \_SB.PCI0.I2C3.CAM0: Intel MIPI Camera Device I2C address 036h
1554 12:17:27.266800 \_SB.PCI0.I2C3.VCM0: Intel MIPI Camera Device I2C address 0ch
1555 12:17:27.273190 \_SB.PCI0.I2C3.NVM0: Intel MIPI Camera Device I2C address 050h
1556 12:17:27.280208 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 00:1a
1557 12:17:27.283340 \_SB.PCI0.I2C4.D028: Realtek SPK AMP L at I2C: 00:28
1558 12:17:27.289925 \_SB.PCI0.I2C4.D029: Realtek SPK AMP R at I2C: 00:29
1559 12:17:27.293213 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1560 12:17:27.300411 PS2K: Physmap: [ EA E9 E7 91 92 94 95 A0 AE B0 ]
1561 12:17:27.303822 PS2K: Passing 101 keymaps to kernel
1562 12:17:27.310094 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1563 12:17:27.316754 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port at USB2 port 1
1564 12:17:27.320220 \_SB.PCI0.XHCI.RHUB.HS03: Left Type-A Port at USB2 port 2
1565 12:17:27.326997 \_SB.PCI0.XHCI.RHUB.HS04: Right Type-A Port at USB2 port 3
1566 12:17:27.330334 \_SB.PCI0.XHCI.RHUB.HS06: Camera at USB2 port 5
1567 12:17:27.337180 \_SB.PCI0.XHCI.RHUB.HS08: Bluetooth at USB2 port 7
1568 12:17:27.343493 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1569 12:17:27.349812 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port at USB3 port 1
1570 12:17:27.353728 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1571 12:17:27.360132 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port at USB3 port 3
1572 12:17:27.363265 ACPI: added table 2/32, length now 44
1573 12:17:27.366503 ACPI: * MCFG
1574 12:17:27.370263 ACPI: added table 3/32, length now 48
1575 12:17:27.370362 ACPI: * TPM2
1576 12:17:27.373520 TPM2 log created at 0x76a16000
1577 12:17:27.376611 ACPI: added table 4/32, length now 52
1578 12:17:27.379861 ACPI: * MADT
1579 12:17:27.379960 SCI is IRQ9
1580 12:17:27.383550 ACPI: added table 5/32, length now 56
1581 12:17:27.386734 current = 76b2d580
1582 12:17:27.389973 ACPI: * DMAR
1583 12:17:27.393033 ACPI: added table 6/32, length now 60
1584 12:17:27.396721 ACPI: added table 7/32, length now 64
1585 12:17:27.396820 ACPI: * HPET
1586 12:17:27.399886 ACPI: added table 8/32, length now 68
1587 12:17:27.403198 ACPI: done.
1588 12:17:27.406784 ACPI tables: 26304 bytes.
1589 12:17:27.409875 smbios_write_tables: 76a15000
1590 12:17:27.413281 EC returned error result code 3
1591 12:17:27.416709 Couldn't obtain OEM name from CBI
1592 12:17:27.419921 Create SMBIOS type 16
1593 12:17:27.420037 Create SMBIOS type 17
1594 12:17:27.423281 GENERIC: 0.0 (WIFI Device)
1595 12:17:27.426183 SMBIOS tables: 913 bytes.
1596 12:17:27.429741 Writing table forward entry at 0x00000500
1597 12:17:27.436424 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum d929
1598 12:17:27.439642 Writing coreboot table at 0x76b4b000
1599 12:17:27.446586 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1600 12:17:27.449574 1. 0000000000001000-000000000009ffff: RAM
1601 12:17:27.456674 2. 00000000000a0000-00000000000fffff: RESERVED
1602 12:17:27.459757 3. 0000000000100000-0000000076a14fff: RAM
1603 12:17:27.466176 4. 0000000076a15000-0000000076ba7fff: CONFIGURATION TABLES
1604 12:17:27.469458 5. 0000000076ba8000-0000000076c0cfff: RAMSTAGE
1605 12:17:27.476413 6. 0000000076c0d000-0000000076ffffff: CONFIGURATION TABLES
1606 12:17:27.479620 7. 0000000077000000-000000007fbfffff: RESERVED
1607 12:17:27.486495 8. 00000000c0000000-00000000cfffffff: RESERVED
1608 12:17:27.489959 9. 00000000fb000000-00000000fb000fff: RESERVED
1609 12:17:27.496248 10. 00000000fe000000-00000000fe00ffff: RESERVED
1610 12:17:27.499306 11. 00000000fea80000-00000000fea87fff: RESERVED
1611 12:17:27.503033 12. 00000000fed80000-00000000fed87fff: RESERVED
1612 12:17:27.509201 13. 00000000fed90000-00000000fed92fff: RESERVED
1613 12:17:27.512694 14. 00000000feda0000-00000000feda1fff: RESERVED
1614 12:17:27.519381 15. 0000000100000000-00000001803fffff: RAM
1615 12:17:27.522931 Passing 4 GPIOs to payload:
1616 12:17:27.525868 NAME | PORT | POLARITY | VALUE
1617 12:17:27.532700 lid | undefined | high | low
1618 12:17:27.536061 power | undefined | high | low
1619 12:17:27.542410 oprom | undefined | high | low
1620 12:17:27.546144 EC in RW | 0x000000b9 | high | low
1621 12:17:27.552924 Wrote coreboot table at: 0x76b4b000, 0x5c8 bytes, checksum 3fc6
1622 12:17:27.555920 coreboot table: 1504 bytes.
1623 12:17:27.559159 IMD ROOT 0. 0x76fff000 0x00001000
1624 12:17:27.562266 IMD SMALL 1. 0x76ffe000 0x00001000
1625 12:17:27.568977 FSP MEMORY 2. 0x76c4e000 0x003b0000
1626 12:17:27.572718 CONSOLE 3. 0x76c2e000 0x00020000
1627 12:17:27.575947 FMAP 4. 0x76c2d000 0x00000578
1628 12:17:27.579134 TIME STAMP 5. 0x76c2c000 0x00000910
1629 12:17:27.582243 VBOOT WORK 6. 0x76c18000 0x00014000
1630 12:17:27.585545 ROMSTG STCK 7. 0x76c17000 0x00001000
1631 12:17:27.588718 AFTER CAR 8. 0x76c0d000 0x0000a000
1632 12:17:27.592614 RAMSTAGE 9. 0x76ba7000 0x00066000
1633 12:17:27.598772 REFCODE 10. 0x76b67000 0x00040000
1634 12:17:27.602180 SMM BACKUP 11. 0x76b57000 0x00010000
1635 12:17:27.605727 4f444749 12. 0x76b55000 0x00002000
1636 12:17:27.609033 EXT VBT13. 0x76b53000 0x00001c43
1637 12:17:27.612115 COREBOOT 14. 0x76b4b000 0x00008000
1638 12:17:27.615915 ACPI 15. 0x76b27000 0x00024000
1639 12:17:27.618957 ACPI GNVS 16. 0x76b26000 0x00001000
1640 12:17:27.622289 RAMOOPS 17. 0x76a26000 0x00100000
1641 12:17:27.625824 TPM2 TCGLOG18. 0x76a16000 0x00010000
1642 12:17:27.628787 SMBIOS 19. 0x76a15000 0x00000800
1643 12:17:27.632328 IMD small region:
1644 12:17:27.635372 IMD ROOT 0. 0x76ffec00 0x00000400
1645 12:17:27.639046 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1646 12:17:27.645642 VPD 2. 0x76ffeb80 0x0000004c
1647 12:17:27.648685 POWER STATE 3. 0x76ffeb40 0x00000040
1648 12:17:27.652279 ROMSTAGE 4. 0x76ffeb20 0x00000004
1649 12:17:27.655798 MEM INFO 5. 0x76ffe940 0x000001e0
1650 12:17:27.662213 BS: BS_WRITE_TABLES run times (exec / console): 6 / 517 ms
1651 12:17:27.665147 MTRR: Physical address space:
1652 12:17:27.671832 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1653 12:17:27.675469 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1654 12:17:27.682228 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1655 12:17:27.688506 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1656 12:17:27.695517 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1657 12:17:27.701852 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1658 12:17:27.708729 0x0000000100000000 - 0x0000000180400000 size 0x80400000 type 6
1659 12:17:27.712145 MTRR: Fixed MSR 0x250 0x0606060606060606
1660 12:17:27.715282 MTRR: Fixed MSR 0x258 0x0606060606060606
1661 12:17:27.721779 MTRR: Fixed MSR 0x259 0x0000000000000000
1662 12:17:27.725002 MTRR: Fixed MSR 0x268 0x0606060606060606
1663 12:17:27.728833 MTRR: Fixed MSR 0x269 0x0606060606060606
1664 12:17:27.731628 MTRR: Fixed MSR 0x26a 0x0606060606060606
1665 12:17:27.738347 MTRR: Fixed MSR 0x26b 0x0606060606060606
1666 12:17:27.741946 MTRR: Fixed MSR 0x26c 0x0606060606060606
1667 12:17:27.744747 MTRR: Fixed MSR 0x26d 0x0606060606060606
1668 12:17:27.748059 MTRR: Fixed MSR 0x26e 0x0606060606060606
1669 12:17:27.751586 MTRR: Fixed MSR 0x26f 0x0606060606060606
1670 12:17:27.755479 call enable_fixed_mtrr()
1671 12:17:27.758331 CPU physical address size: 39 bits
1672 12:17:27.765700 MTRR: default type WB/UC MTRR counts: 6/5.
1673 12:17:27.768632 MTRR: UC selected as default type.
1674 12:17:27.774889 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1675 12:17:27.778851 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1676 12:17:27.785063 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1677 12:17:27.792177 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1678 12:17:27.798623 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
1679 12:17:27.798723
1680 12:17:27.801744 MTRR check
1681 12:17:27.801843 Fixed MTRRs : Enabled
1682 12:17:27.804937 Variable MTRRs: Enabled
1683 12:17:27.805035
1684 12:17:27.808878 MTRR: Fixed MSR 0x250 0x0606060606060606
1685 12:17:27.814889 MTRR: Fixed MSR 0x258 0x0606060606060606
1686 12:17:27.818634 MTRR: Fixed MSR 0x259 0x0000000000000000
1687 12:17:27.821795 MTRR: Fixed MSR 0x268 0x0606060606060606
1688 12:17:27.825019 MTRR: Fixed MSR 0x269 0x0606060606060606
1689 12:17:27.831836 MTRR: Fixed MSR 0x26a 0x0606060606060606
1690 12:17:27.835040 MTRR: Fixed MSR 0x26b 0x0606060606060606
1691 12:17:27.838058 MTRR: Fixed MSR 0x26c 0x0606060606060606
1692 12:17:27.841548 MTRR: Fixed MSR 0x26d 0x0606060606060606
1693 12:17:27.845094 MTRR: Fixed MSR 0x26e 0x0606060606060606
1694 12:17:27.851842 MTRR: Fixed MSR 0x26f 0x0606060606060606
1695 12:17:27.854914 BS: BS_WRITE_TABLES exit times (exec / console): 1 / 143 ms
1696 12:17:27.858462 call enable_fixed_mtrr()
1697 12:17:27.862052 Checking cr50 for pending updates
1698 12:17:27.866077 CPU physical address size: 39 bits
1699 12:17:27.869353 Reading cr50 TPM mode
1700 12:17:27.879400 BS: BS_PAYLOAD_LOAD entry times (exec / console): 11 / 6 ms
1701 12:17:27.886424 CBFS: Found 'fallback/payload' @0x395580 size 0x4ae38
1702 12:17:27.890260 Checking segment from ROM address 0xfff9d5b8
1703 12:17:27.896710 Checking segment from ROM address 0xfff9d5d4
1704 12:17:27.899896 Loading segment from ROM address 0xfff9d5b8
1705 12:17:27.903079 code (compression=0)
1706 12:17:27.910215 New segment dstaddr 0x30000000 memsize 0x1062170 srcaddr 0xfff9d5f0 filesize 0x4ae00
1707 12:17:27.920081 Loading Segment: addr: 0x30000000 memsz: 0x0000000001062170 filesz: 0x000000000004ae00
1708 12:17:27.923032 it's not compressed!
1709 12:17:28.047876 [ 0x30000000, 3004ae00, 0x31062170) <- fff9d5f0
1710 12:17:28.054758 Clearing Segment: addr: 0x000000003004ae00 memsz: 0x0000000001017370
1711 12:17:28.062046 Loading segment from ROM address 0xfff9d5d4
1712 12:17:28.065748 Entry Point 0x30000000
1713 12:17:28.065848 Loaded segments
1714 12:17:28.072309 BS: BS_PAYLOAD_LOAD run times (exec / console): 126 / 60 ms
1715 12:17:28.088340 Finalizing chipset.
1716 12:17:28.091812 Finalizing SMM.
1717 12:17:28.091914 APMC done.
1718 12:17:28.098254 BS: BS_PAYLOAD_LOAD exit times (exec / console): 15 / 5 ms
1719 12:17:28.101367 mp_park_aps done after 0 msecs.
1720 12:17:28.105326 Jumping to boot code at 0x30000000(0x76b4b000)
1721 12:17:28.114808 CPU0: stack: 0x76bfb000 - 0x76bfc000, lowest used address 0x76bfb918, stack used: 1768 bytes
1722 12:17:28.114912
1723 12:17:28.115000
1724 12:17:28.115073
1725 12:17:28.117892 Starting depthcharge on Magolor...
1726 12:17:28.117990
1727 12:17:28.118345 end: 2.2.3 depthcharge-start (duration 00:00:08) [common]
1728 12:17:28.118461 start: 2.2.4 bootloader-commands (timeout 00:04:47) [common]
1729 12:17:28.118556 Setting prompt string to ['dedede:']
1730 12:17:28.118645 bootloader-commands: Wait for prompt ['dedede:'] (timeout 00:04:47)
1731 12:17:28.128035 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
1732 12:17:28.128136
1733 12:17:28.134950 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
1734 12:17:28.135050
1735 12:17:28.138561 fw_config match found: AUDIO_AMP=UNPROVISIONED
1736 12:17:28.138659
1737 12:17:28.141692 Wipe memory regions:
1738 12:17:28.141800
1739 12:17:28.145140 [0x00000000001000, 0x000000000a0000)
1740 12:17:28.145239
1741 12:17:28.148129 [0x00000000100000, 0x00000030000000)
1742 12:17:28.276450
1743 12:17:28.279944 [0x00000031062170, 0x00000076a15000)
1744 12:17:28.448632
1745 12:17:28.451917 [0x00000100000000, 0x00000180400000)
1746 12:17:29.515691
1747 12:17:29.515884 R8152: Initializing
1748 12:17:29.516006
1749 12:17:29.518980 Version 9 (ocp_data = 6010)
1750 12:17:29.519090
1751 12:17:29.522044 R8152: Done initializing
1752 12:17:29.522131
1753 12:17:29.525188 Adding net device
1754 12:17:29.525278
1755 12:17:29.528292 [firmware-dedede-13606.B-collabora] Apr 28 2022 09:20:48
1756 12:17:29.528381
1757 12:17:29.531669
1758 12:17:29.531758
1759 12:17:29.532041 Setting prompt string to ['dedede:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1761 12:17:29.632798 dedede: tftpboot 192.168.201.1 9729426/tftp-deploy-60t5nmpz/kernel/bzImage 9729426/tftp-deploy-60t5nmpz/kernel/cmdline 9729426/tftp-deploy-60t5nmpz/ramdisk/ramdisk.cpio.gz
1762 12:17:29.632971 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1763 12:17:29.633079 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:45)
1764 12:17:29.637241 tftpboot 192.168.201.1 9729426/tftp-deploy-60t5nmpz/kernel/bzImoy-60t5nmpz/kernel/cmdline 9729426/tftp-deploy-60t5nmpz/ramdisk/ramdisk.cpio.gz
1765 12:17:29.637341
1766 12:17:29.637420 Waiting for link
1767 12:17:29.839558
1768 12:17:29.839708 done.
1769 12:17:29.839802
1770 12:17:29.839876 MAC: 00:e0:4c:78:86:ac
1771 12:17:29.839947
1772 12:17:29.842509 Sending DHCP discover... done.
1773 12:17:29.842616
1774 12:17:29.845693 Waiting for reply... done.
1775 12:17:29.845792
1776 12:17:29.849567 Sending DHCP request... done.
1777 12:17:29.849687
1778 12:17:29.852955 Waiting for reply... done.
1779 12:17:29.853055
1780 12:17:29.855895 My ip is 192.168.201.16
1781 12:17:29.855995
1782 12:17:29.859221 The DHCP server ip is 192.168.201.1
1783 12:17:29.859321
1784 12:17:29.862354 TFTP server IP predefined by user: 192.168.201.1
1785 12:17:29.862454
1786 12:17:29.869274 Bootfile predefined by user: 9729426/tftp-deploy-60t5nmpz/kernel/bzImage
1787 12:17:29.869376
1788 12:17:29.872730 Sending tftp read request... done.
1789 12:17:29.872830
1790 12:17:29.875721 Waiting for the transfer...
1791 12:17:29.875822
1792 12:17:30.153190 00000000 ################################################################
1793 12:17:30.153362
1794 12:17:30.424858 00080000 ################################################################
1795 12:17:30.425014
1796 12:17:30.697403 00100000 ################################################################
1797 12:17:30.697546
1798 12:17:30.965710 00180000 ################################################################
1799 12:17:30.965870
1800 12:17:31.229007 00200000 ################################################################
1801 12:17:31.229158
1802 12:17:31.475268 00280000 ################################################################
1803 12:17:31.475421
1804 12:17:31.720624 00300000 ################################################################
1805 12:17:31.720774
1806 12:17:31.971088 00380000 ################################################################
1807 12:17:31.971247
1808 12:17:32.221202 00400000 ################################################################
1809 12:17:32.221359
1810 12:17:32.492254 00480000 ################################################################
1811 12:17:32.492401
1812 12:17:32.737478 00500000 ################################################################
1813 12:17:32.737665
1814 12:17:33.003557 00580000 ################################################################
1815 12:17:33.003708
1816 12:17:33.261210 00600000 ################################################################
1817 12:17:33.261357
1818 12:17:33.504273 00680000 ################################################################
1819 12:17:33.504435
1820 12:17:33.769943 00700000 ################################################################
1821 12:17:33.770113
1822 12:17:34.030813 00780000 ################################################################
1823 12:17:34.030970
1824 12:17:34.276079 00800000 ################################################################
1825 12:17:34.276238
1826 12:17:34.528329 00880000 ################################################################
1827 12:17:34.528481
1828 12:17:34.724589 00900000 ################################################# done.
1829 12:17:34.724739
1830 12:17:34.727736 The bootfile was 9834496 bytes long.
1831 12:17:34.727827
1832 12:17:34.730912 Sending tftp read request... done.
1833 12:17:34.731009
1834 12:17:34.734061 Waiting for the transfer...
1835 12:17:34.734152
1836 12:17:34.983669 00000000 ################################################################
1837 12:17:34.983826
1838 12:17:35.228712 00080000 ################################################################
1839 12:17:35.228880
1840 12:17:35.474332 00100000 ################################################################
1841 12:17:35.474494
1842 12:17:35.720502 00180000 ################################################################
1843 12:17:35.720655
1844 12:17:35.968897 00200000 ################################################################
1845 12:17:35.969046
1846 12:17:36.216039 00280000 ################################################################
1847 12:17:36.216190
1848 12:17:36.482713 00300000 ################################################################
1849 12:17:36.482862
1850 12:17:36.747179 00380000 ################################################################
1851 12:17:36.747324
1852 12:17:37.010509 00400000 ################################################################
1853 12:17:37.010662
1854 12:17:37.292332 00480000 ################################################################
1855 12:17:37.292487
1856 12:17:37.571533 00500000 ################################################################
1857 12:17:37.571705
1858 12:17:37.841486 00580000 ################################################################
1859 12:17:37.841635
1860 12:17:38.117139 00600000 ################################################################
1861 12:17:38.117293
1862 12:17:38.388203 00680000 ################################################################
1863 12:17:38.388357
1864 12:17:38.672981 00700000 ################################################################
1865 12:17:38.673144
1866 12:17:38.959900 00780000 ################################################################
1867 12:17:38.960058
1868 12:17:39.226218 00800000 ################################################################
1869 12:17:39.226374
1870 12:17:39.365993 00880000 ################################## done.
1871 12:17:39.366146
1872 12:17:39.368975 Sending tftp read request... done.
1873 12:17:39.369074
1874 12:17:39.372841 Waiting for the transfer...
1875 12:17:39.372940
1876 12:17:39.373017 00000000 # done.
1877 12:17:39.373091
1878 12:17:39.382410 Command line loaded dynamically from TFTP file: 9729426/tftp-deploy-60t5nmpz/kernel/cmdline
1879 12:17:39.382511
1880 12:17:39.395859 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
1881 12:17:39.395964
1882 12:17:39.402012 ec_init: CrosEC protocol v3 supported (256, 256)
1883 12:17:39.409266
1884 12:17:39.412913 Shutting down all USB controllers.
1885 12:17:39.413012
1886 12:17:39.413088 Removing current net device
1887 12:17:39.413160
1888 12:17:39.416170 Finalizing coreboot
1889 12:17:39.416268
1890 12:17:39.422396 Exiting depthcharge with code 4 at timestamp: 18114831
1891 12:17:39.422493
1892 12:17:39.422570
1893 12:17:39.422642 Starting kernel ...
1894 12:17:39.422709
1895 12:17:39.422774
1896 12:17:39.423191 end: 2.2.4 bootloader-commands (duration 00:00:11) [common]
1897 12:17:39.423306 start: 2.2.5 auto-login-action (timeout 00:04:36) [common]
1898 12:17:39.423393 Setting prompt string to ['Linux version [0-9]']
1899 12:17:39.423471 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
1900 12:17:39.423551 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
1902 12:22:15.424227 end: 2.2.5 auto-login-action (duration 00:04:36) [common]
1904 12:22:15.425358 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 276 seconds'
1906 12:22:15.426229 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
1909 12:22:15.427760 end: 2 depthcharge-action (duration 00:05:00) [common]
1911 12:22:15.428975 Cleaning after the job
1912 12:22:15.429444 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729426/tftp-deploy-60t5nmpz/ramdisk
1913 12:22:15.432674 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729426/tftp-deploy-60t5nmpz/kernel
1914 12:22:15.435727 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729426/tftp-deploy-60t5nmpz/modules
1915 12:22:15.437416 start: 5.1 power-off (timeout 00:00:30) [common]
1916 12:22:15.438248 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=acer-cb317-1h-c3z6-dedede-cbg-2' '--port=1' '--command=off'
1917 12:22:15.528832 >> Command sent successfully.
1918 12:22:15.537964 Returned 0 in 0 seconds
1919 12:22:15.639567 end: 5.1 power-off (duration 00:00:00) [common]
1921 12:22:15.641070 start: 5.2 read-feedback (timeout 00:10:00) [common]
1922 12:22:15.642168 Listened to connection for namespace 'common' for up to 1s
1924 12:22:15.643523 Listened to connection for namespace 'common' for up to 1s
1925 12:22:16.643380 Finalising connection for namespace 'common'
1926 12:22:16.644031 Disconnecting from shell: Finalise
1927 12:22:16.644423
1928 12:22:16.745881 end: 5.2 read-feedback (duration 00:00:01) [common]
1929 12:22:16.746461 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729426
1930 12:22:16.773109 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729426
1931 12:22:16.773722 JobError: Your job cannot terminate cleanly.