Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:17:07.957184 lava-dispatcher, installed at version: 2023.01
2 12:17:07.957387 start: 0 validate
3 12:17:07.957512 Start time: 2023-03-22 12:17:07.957503+00:00 (UTC)
4 12:17:07.957644 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:17:07.957770 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230310.0%2Fx86%2Frootfs.cpio.gz exists
6 12:17:08.250139 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:17:08.250902 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.277-cip94-rt29%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:17:12.255563 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:17:12.256310 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.277-cip94-rt29%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
10 12:17:12.556949 validate duration: 4.60
12 12:17:12.558340 start: 1 tftp-deploy (timeout 00:10:00) [common]
13 12:17:12.559200 start: 1.1 download-retry (timeout 00:10:00) [common]
14 12:17:12.559770 start: 1.1.1 http-download (timeout 00:10:00) [common]
15 12:17:12.560329 Not decompressing ramdisk as can be used compressed.
16 12:17:12.560859 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230310.0/x86/rootfs.cpio.gz
17 12:17:12.561239 saving as /var/lib/lava/dispatcher/tmp/9729432/tftp-deploy-27jf8j8c/ramdisk/rootfs.cpio.gz
18 12:17:12.561585 total size: 8429740 (8MB)
19 12:17:13.274145 progress 0% (0MB)
20 12:17:13.285991 progress 5% (0MB)
21 12:17:13.297590 progress 10% (0MB)
22 12:17:13.307087 progress 15% (1MB)
23 12:17:13.313301 progress 20% (1MB)
24 12:17:13.318079 progress 25% (2MB)
25 12:17:13.322133 progress 30% (2MB)
26 12:17:13.325708 progress 35% (2MB)
27 12:17:13.328731 progress 40% (3MB)
28 12:17:13.331718 progress 45% (3MB)
29 12:17:13.334607 progress 50% (4MB)
30 12:17:13.337161 progress 55% (4MB)
31 12:17:13.339677 progress 60% (4MB)
32 12:17:13.341955 progress 65% (5MB)
33 12:17:13.344245 progress 70% (5MB)
34 12:17:13.346222 progress 75% (6MB)
35 12:17:13.348327 progress 80% (6MB)
36 12:17:13.350406 progress 85% (6MB)
37 12:17:13.352502 progress 90% (7MB)
38 12:17:13.354642 progress 95% (7MB)
39 12:17:13.356706 progress 100% (8MB)
40 12:17:13.356843 8MB downloaded in 0.80s (10.11MB/s)
41 12:17:13.357031 end: 1.1.1 http-download (duration 00:00:01) [common]
43 12:17:13.357322 end: 1.1 download-retry (duration 00:00:01) [common]
44 12:17:13.357413 start: 1.2 download-retry (timeout 00:09:59) [common]
45 12:17:13.357500 start: 1.2.1 http-download (timeout 00:09:59) [common]
46 12:17:13.357598 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.277-cip94-rt29/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
47 12:17:13.357664 saving as /var/lib/lava/dispatcher/tmp/9729432/tftp-deploy-27jf8j8c/kernel/bzImage
48 12:17:13.357724 total size: 9834496 (9MB)
49 12:17:13.357784 No compression specified
50 12:17:13.358702 progress 0% (0MB)
51 12:17:13.361192 progress 5% (0MB)
52 12:17:13.363622 progress 10% (0MB)
53 12:17:13.365994 progress 15% (1MB)
54 12:17:13.368448 progress 20% (1MB)
55 12:17:13.370889 progress 25% (2MB)
56 12:17:13.373272 progress 30% (2MB)
57 12:17:13.375695 progress 35% (3MB)
58 12:17:13.378067 progress 40% (3MB)
59 12:17:13.380505 progress 45% (4MB)
60 12:17:13.382966 progress 50% (4MB)
61 12:17:13.385408 progress 55% (5MB)
62 12:17:13.387834 progress 60% (5MB)
63 12:17:13.390234 progress 65% (6MB)
64 12:17:13.392572 progress 70% (6MB)
65 12:17:13.394958 progress 75% (7MB)
66 12:17:13.397294 progress 80% (7MB)
67 12:17:13.399674 progress 85% (8MB)
68 12:17:13.402024 progress 90% (8MB)
69 12:17:13.404405 progress 95% (8MB)
70 12:17:13.406808 progress 100% (9MB)
71 12:17:13.406926 9MB downloaded in 0.05s (190.64MB/s)
72 12:17:13.407077 end: 1.2.1 http-download (duration 00:00:00) [common]
74 12:17:13.407318 end: 1.2 download-retry (duration 00:00:00) [common]
75 12:17:13.407407 start: 1.3 download-retry (timeout 00:09:59) [common]
76 12:17:13.407494 start: 1.3.1 http-download (timeout 00:09:59) [common]
77 12:17:13.407596 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.277-cip94-rt29/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
78 12:17:13.407665 saving as /var/lib/lava/dispatcher/tmp/9729432/tftp-deploy-27jf8j8c/modules/modules.tar
79 12:17:13.407731 total size: 462060 (0MB)
80 12:17:13.407800 Using unxz to decompress xz
81 12:17:13.411005 progress 7% (0MB)
82 12:17:13.411382 progress 14% (0MB)
83 12:17:13.411647 progress 21% (0MB)
84 12:17:13.413195 progress 28% (0MB)
85 12:17:13.415286 progress 35% (0MB)
86 12:17:13.417097 progress 42% (0MB)
87 12:17:13.419229 progress 49% (0MB)
88 12:17:13.421132 progress 56% (0MB)
89 12:17:13.423133 progress 63% (0MB)
90 12:17:13.424935 progress 70% (0MB)
91 12:17:13.427140 progress 78% (0MB)
92 12:17:13.429221 progress 85% (0MB)
93 12:17:13.430961 progress 92% (0MB)
94 12:17:13.433337 progress 99% (0MB)
95 12:17:13.440352 0MB downloaded in 0.03s (13.51MB/s)
96 12:17:13.440651 end: 1.3.1 http-download (duration 00:00:00) [common]
98 12:17:13.440924 end: 1.3 download-retry (duration 00:00:00) [common]
99 12:17:13.441024 start: 1.4 prepare-tftp-overlay (timeout 00:09:59) [common]
100 12:17:13.441119 start: 1.4.1 extract-nfsrootfs (timeout 00:09:59) [common]
101 12:17:13.441205 end: 1.4.1 extract-nfsrootfs (duration 00:00:00) [common]
102 12:17:13.441297 start: 1.4.2 lava-overlay (timeout 00:09:59) [common]
103 12:17:13.441481 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n
104 12:17:13.441590 makedir: /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin
105 12:17:13.441677 makedir: /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/tests
106 12:17:13.441759 makedir: /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/results
107 12:17:13.441866 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-add-keys
108 12:17:13.442000 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-add-sources
109 12:17:13.442164 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-background-process-start
110 12:17:13.442277 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-background-process-stop
111 12:17:13.442387 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-common-functions
112 12:17:13.442496 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-echo-ipv4
113 12:17:13.442607 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-install-packages
114 12:17:13.442720 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-installed-packages
115 12:17:13.442826 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-os-build
116 12:17:13.442933 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-probe-channel
117 12:17:13.443043 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-probe-ip
118 12:17:13.443151 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-target-ip
119 12:17:13.443258 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-target-mac
120 12:17:13.443365 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-target-storage
121 12:17:13.443477 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-test-case
122 12:17:13.443584 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-test-event
123 12:17:13.443690 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-test-feedback
124 12:17:13.443797 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-test-raise
125 12:17:13.443908 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-test-reference
126 12:17:13.444015 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-test-runner
127 12:17:13.444123 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-test-set
128 12:17:13.444231 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-test-shell
129 12:17:13.444341 Updating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-install-packages (oe)
130 12:17:13.444454 Updating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/bin/lava-installed-packages (oe)
131 12:17:13.444554 Creating /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/environment
132 12:17:13.444693 LAVA metadata
133 12:17:13.444765 - LAVA_JOB_ID=9729432
134 12:17:13.444831 - LAVA_DISPATCHER_IP=192.168.201.1
135 12:17:13.444934 start: 1.4.2.1 lava-vland-overlay (timeout 00:09:59) [common]
136 12:17:13.445004 skipped lava-vland-overlay
137 12:17:13.445081 end: 1.4.2.1 lava-vland-overlay (duration 00:00:00) [common]
138 12:17:13.445166 start: 1.4.2.2 lava-multinode-overlay (timeout 00:09:59) [common]
139 12:17:13.445230 skipped lava-multinode-overlay
140 12:17:13.445304 end: 1.4.2.2 lava-multinode-overlay (duration 00:00:00) [common]
141 12:17:13.445387 start: 1.4.2.3 test-definition (timeout 00:09:59) [common]
142 12:17:13.445463 Loading test definitions
143 12:17:13.445561 start: 1.4.2.3.1 inline-repo-action (timeout 00:09:59) [common]
144 12:17:13.445637 Using /lava-9729432 at stage 0
145 12:17:13.445897 uuid=9729432_1.4.2.3.1 testdef=None
146 12:17:13.445988 end: 1.4.2.3.1 inline-repo-action (duration 00:00:00) [common]
147 12:17:13.446103 start: 1.4.2.3.2 test-overlay (timeout 00:09:59) [common]
148 12:17:13.446634 end: 1.4.2.3.2 test-overlay (duration 00:00:00) [common]
150 12:17:13.446891 start: 1.4.2.3.3 test-install-overlay (timeout 00:09:59) [common]
151 12:17:13.447452 end: 1.4.2.3.3 test-install-overlay (duration 00:00:00) [common]
153 12:17:13.447691 start: 1.4.2.3.4 test-runscript-overlay (timeout 00:09:59) [common]
154 12:17:13.448226 runner path: /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/0/tests/0_dmesg test_uuid 9729432_1.4.2.3.1
155 12:17:13.448372 end: 1.4.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
157 12:17:13.448623 start: 1.4.2.3.5 inline-repo-action (timeout 00:09:59) [common]
158 12:17:13.448712 Using /lava-9729432 at stage 1
159 12:17:13.448956 uuid=9729432_1.4.2.3.5 testdef=None
160 12:17:13.449047 end: 1.4.2.3.5 inline-repo-action (duration 00:00:00) [common]
161 12:17:13.449137 start: 1.4.2.3.6 test-overlay (timeout 00:09:59) [common]
162 12:17:13.449648 end: 1.4.2.3.6 test-overlay (duration 00:00:00) [common]
164 12:17:13.449871 start: 1.4.2.3.7 test-install-overlay (timeout 00:09:59) [common]
165 12:17:13.450475 end: 1.4.2.3.7 test-install-overlay (duration 00:00:00) [common]
167 12:17:13.450750 start: 1.4.2.3.8 test-runscript-overlay (timeout 00:09:59) [common]
168 12:17:13.451290 runner path: /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/1/tests/1_bootrr test_uuid 9729432_1.4.2.3.5
169 12:17:13.451463 end: 1.4.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
171 12:17:13.451673 Creating lava-test-runner.conf files
172 12:17:13.451736 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/0 for stage 0
173 12:17:13.451817 - 0_dmesg
174 12:17:13.451894 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729432/lava-overlay-zmv3_08n/lava-9729432/1 for stage 1
175 12:17:13.451974 - 1_bootrr
176 12:17:13.452065 end: 1.4.2.3 test-definition (duration 00:00:00) [common]
177 12:17:13.452155 start: 1.4.2.4 compress-overlay (timeout 00:09:59) [common]
178 12:17:13.459101 end: 1.4.2.4 compress-overlay (duration 00:00:00) [common]
179 12:17:13.459298 start: 1.4.2.5 persistent-nfs-overlay (timeout 00:09:59) [common]
180 12:17:13.459423 end: 1.4.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
181 12:17:13.459547 end: 1.4.2 lava-overlay (duration 00:00:00) [common]
182 12:17:13.459668 start: 1.4.3 extract-overlay-ramdisk (timeout 00:09:59) [common]
183 12:17:13.653089 end: 1.4.3 extract-overlay-ramdisk (duration 00:00:00) [common]
184 12:17:13.653640 start: 1.4.4 extract-modules (timeout 00:09:59) [common]
185 12:17:13.653847 extracting modules file /var/lib/lava/dispatcher/tmp/9729432/tftp-deploy-27jf8j8c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729432/extract-overlay-ramdisk-uplrdice/ramdisk
186 12:17:13.665768 end: 1.4.4 extract-modules (duration 00:00:00) [common]
187 12:17:13.665971 start: 1.4.5 apply-overlay-tftp (timeout 00:09:59) [common]
188 12:17:13.666110 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729432/compress-overlay-ws4qxhw1/overlay-1.4.2.4.tar.gz to ramdisk
189 12:17:13.666187 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729432/compress-overlay-ws4qxhw1/overlay-1.4.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729432/extract-overlay-ramdisk-uplrdice/ramdisk
190 12:17:13.670514 end: 1.4.5 apply-overlay-tftp (duration 00:00:00) [common]
191 12:17:13.670637 start: 1.4.6 configure-preseed-file (timeout 00:09:59) [common]
192 12:17:13.670777 end: 1.4.6 configure-preseed-file (duration 00:00:00) [common]
193 12:17:13.670911 start: 1.4.7 compress-ramdisk (timeout 00:09:59) [common]
194 12:17:13.671001 Building ramdisk /var/lib/lava/dispatcher/tmp/9729432/extract-overlay-ramdisk-uplrdice/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729432/extract-overlay-ramdisk-uplrdice/ramdisk
195 12:17:13.744009 >> 53634 blocks
196 12:17:14.594428 rename /var/lib/lava/dispatcher/tmp/9729432/extract-overlay-ramdisk-uplrdice/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729432/tftp-deploy-27jf8j8c/ramdisk/ramdisk.cpio.gz
197 12:17:14.594851 end: 1.4.7 compress-ramdisk (duration 00:00:01) [common]
198 12:17:14.594972 start: 1.4.8 prepare-kernel (timeout 00:09:58) [common]
199 12:17:14.595259 start: 1.4.8.1 prepare-fit (timeout 00:09:58) [common]
200 12:17:14.595355 No mkimage arch provided, not using FIT.
201 12:17:14.595447 end: 1.4.8.1 prepare-fit (duration 00:00:00) [common]
202 12:17:14.595533 end: 1.4.8 prepare-kernel (duration 00:00:00) [common]
203 12:17:14.595627 end: 1.4 prepare-tftp-overlay (duration 00:00:01) [common]
204 12:17:14.595721 start: 1.5 lxc-create-udev-rule-action (timeout 00:09:58) [common]
205 12:17:14.595801 No LXC device requested
206 12:17:14.595891 end: 1.5 lxc-create-udev-rule-action (duration 00:00:00) [common]
207 12:17:14.595984 start: 1.6 deploy-device-env (timeout 00:09:58) [common]
208 12:17:14.596071 end: 1.6 deploy-device-env (duration 00:00:00) [common]
209 12:17:14.596144 Checking files for TFTP limit of 4294967296 bytes.
210 12:17:14.596538 end: 1 tftp-deploy (duration 00:00:02) [common]
211 12:17:14.596646 start: 2 depthcharge-action (timeout 00:05:00) [common]
212 12:17:14.596748 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
213 12:17:14.596877 substitutions:
214 12:17:14.596948 - {DTB}: None
215 12:17:14.597014 - {INITRD}: 9729432/tftp-deploy-27jf8j8c/ramdisk/ramdisk.cpio.gz
216 12:17:14.597076 - {KERNEL}: 9729432/tftp-deploy-27jf8j8c/kernel/bzImage
217 12:17:14.597137 - {LAVA_MAC}: None
218 12:17:14.597197 - {PRESEED_CONFIG}: None
219 12:17:14.597257 - {PRESEED_LOCAL}: None
220 12:17:14.597315 - {RAMDISK}: 9729432/tftp-deploy-27jf8j8c/ramdisk/ramdisk.cpio.gz
221 12:17:14.597374 - {ROOT_PART}: None
222 12:17:14.597432 - {ROOT}: None
223 12:17:14.597489 - {SERVER_IP}: 192.168.201.1
224 12:17:14.597546 - {TEE}: None
225 12:17:14.597603 Parsed boot commands:
226 12:17:14.597660 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
227 12:17:14.597813 Parsed boot commands: tftpboot 192.168.201.1 9729432/tftp-deploy-27jf8j8c/kernel/bzImage 9729432/tftp-deploy-27jf8j8c/kernel/cmdline 9729432/tftp-deploy-27jf8j8c/ramdisk/ramdisk.cpio.gz
228 12:17:14.597906 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
229 12:17:14.597996 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
230 12:17:14.598101 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
231 12:17:14.598193 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
232 12:17:14.598264 Not connected, no need to disconnect.
233 12:17:14.598344 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
234 12:17:14.598429 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
235 12:17:14.598497 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-14'
236 12:17:14.601480 Setting prompt string to ['lava-test: # ']
237 12:17:14.601784 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
238 12:17:14.601900 end: 2.2.1 reset-connection (duration 00:00:00) [common]
239 12:17:14.602005 start: 2.2.2 reset-device (timeout 00:05:00) [common]
240 12:17:14.602115 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
241 12:17:14.602315 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=reboot'
242 12:17:19.737847 >> Command sent successfully.
243 12:17:19.740078 Returned 0 in 5 seconds
244 12:17:19.840514 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
246 12:17:19.840965 end: 2.2.2 reset-device (duration 00:00:05) [common]
247 12:17:19.841066 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
248 12:17:19.841156 Setting prompt string to 'Starting depthcharge on Voema...'
249 12:17:19.841224 Changing prompt to 'Starting depthcharge on Voema...'
250 12:17:19.841297 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
251 12:17:19.841569 [Enter `^Ec?' for help]
252 12:17:21.405520
253 12:17:21.405686
254 12:17:21.415351 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
255 12:17:21.418478 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
256 12:17:21.425853 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
257 12:17:21.428869 CPU: AES supported, TXT NOT supported, VT supported
258 12:17:21.436188 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
259 12:17:21.439222 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
260 12:17:21.445985 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
261 12:17:21.449119 VBOOT: Loading verstage.
262 12:17:21.452658 FMAP: Found "FLASH" version 1.1 at 0x1804000.
263 12:17:21.459188 FMAP: base = 0x0 size = 0x2000000 #areas = 32
264 12:17:21.462700 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
265 12:17:21.472810 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
266 12:17:21.479000 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
267 12:17:21.479159
268 12:17:21.479230
269 12:17:21.489149 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
270 12:17:21.505662 Probing TPM: . done!
271 12:17:21.509187 TPM ready after 0 ms
272 12:17:21.512212 Connected to device vid:did:rid of 1ae0:0028:00
273 12:17:21.523518 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
274 12:17:21.530379 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
275 12:17:21.533546 Initialized TPM device CR50 revision 0
276 12:17:21.589814 tlcl_send_startup: Startup return code is 0
277 12:17:21.589969 TPM: setup succeeded
278 12:17:21.604600 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
279 12:17:21.618238 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
280 12:17:21.631174 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
281 12:17:21.641259 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
282 12:17:21.644966 Chrome EC: UHEPI supported
283 12:17:21.648041 Phase 1
284 12:17:21.651537 FMAP: area GBB found @ 1805000 (458752 bytes)
285 12:17:21.660972 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
286 12:17:21.667602 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
287 12:17:21.674203 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
288 12:17:21.681299 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
289 12:17:21.684095 Recovery requested (1009000e)
290 12:17:21.687590 TPM: Extending digest for VBOOT: boot mode into PCR 0
291 12:17:21.699555 tlcl_extend: response is 0
292 12:17:21.706308 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
293 12:17:21.716070 tlcl_extend: response is 0
294 12:17:21.723022 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
295 12:17:21.729301 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
296 12:17:21.736097 BS: verstage times (exec / console): total (unknown) / 142 ms
297 12:17:21.736207
298 12:17:21.736294
299 12:17:21.749213 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
300 12:17:21.755997 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
301 12:17:21.758930 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
302 12:17:21.762109 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
303 12:17:21.769130 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
304 12:17:21.772501 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
305 12:17:21.775750 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
306 12:17:21.778678 TCO_STS: 0000 0000
307 12:17:21.782164 GEN_PMCON: d0015038 00002200
308 12:17:21.785572 GBLRST_CAUSE: 00000000 00000000
309 12:17:21.788885 HPR_CAUSE0: 00000000
310 12:17:21.788996 prev_sleep_state 5
311 12:17:21.791758 Boot Count incremented to 5714
312 12:17:21.798516 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
313 12:17:21.805397 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
314 12:17:21.815080 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
315 12:17:21.821953 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
316 12:17:21.825106 Chrome EC: UHEPI supported
317 12:17:21.831399 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
318 12:17:21.842676 Probing TPM: done!
319 12:17:21.849426 Connected to device vid:did:rid of 1ae0:0028:00
320 12:17:21.859433 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
321 12:17:21.862436 Initialized TPM device CR50 revision 0
322 12:17:21.877818 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
323 12:17:21.884054 MRC: Hash idx 0x100b comparison successful.
324 12:17:21.887351 MRC cache found, size faa8
325 12:17:21.887461 bootmode is set to: 2
326 12:17:21.891236 SPD index = 2
327 12:17:21.897734 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
328 12:17:21.900736 SPD: module type is LPDDR4X
329 12:17:21.904137 SPD: module part number is MT53D1G64D4NW-046
330 12:17:21.911377 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
331 12:17:21.914948 SPD: device width 16 bits, bus width 16 bits
332 12:17:21.918479 SPD: module size is 2048 MB (per channel)
333 12:17:22.349419 CBMEM:
334 12:17:22.352371 IMD: root @ 0x76fff000 254 entries.
335 12:17:22.355853 IMD: root @ 0x76ffec00 62 entries.
336 12:17:22.358988 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
337 12:17:22.365377 FMAP: area RW_VPD found @ f35000 (8192 bytes)
338 12:17:22.369037 External stage cache:
339 12:17:22.372160 IMD: root @ 0x7b3ff000 254 entries.
340 12:17:22.375367 IMD: root @ 0x7b3fec00 62 entries.
341 12:17:22.390774 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
342 12:17:22.397526 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
343 12:17:22.404085 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
344 12:17:22.417945 MRC: 'RECOVERY_MRC_CACHE' does not need update.
345 12:17:22.424572 cse_lite: Skip switching to RW in the recovery path
346 12:17:22.424659 8 DIMMs found
347 12:17:22.424730 SMM Memory Map
348 12:17:22.430678 SMRAM : 0x7b000000 0x800000
349 12:17:22.434510 Subregion 0: 0x7b000000 0x200000
350 12:17:22.437554 Subregion 1: 0x7b200000 0x200000
351 12:17:22.440858 Subregion 2: 0x7b400000 0x400000
352 12:17:22.440946 top_of_ram = 0x77000000
353 12:17:22.447695 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
354 12:17:22.454256 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
355 12:17:22.457167 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
356 12:17:22.463847 MTRR Range: Start=ff000000 End=0 (Size 1000000)
357 12:17:22.470423 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
358 12:17:22.477223 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
359 12:17:22.487441 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
360 12:17:22.494489 Processing 211 relocs. Offset value of 0x74c0b000
361 12:17:22.501500 BS: romstage times (exec / console): total (unknown) / 276 ms
362 12:17:22.506380
363 12:17:22.506487
364 12:17:22.516302 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
365 12:17:22.519669 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
366 12:17:22.529373 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
367 12:17:22.536246 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
368 12:17:22.543183 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
369 12:17:22.548926 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
370 12:17:22.592934 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
371 12:17:22.599295 Processing 5008 relocs. Offset value of 0x75d98000
372 12:17:22.603092 BS: postcar times (exec / console): total (unknown) / 59 ms
373 12:17:22.606231
374 12:17:22.606316
375 12:17:22.615909 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
376 12:17:22.615999 Normal boot
377 12:17:22.619301 FW_CONFIG value is 0x804c02
378 12:17:22.622533 PCI: 00:07.0 disabled by fw_config
379 12:17:22.625660 PCI: 00:07.1 disabled by fw_config
380 12:17:22.629454 PCI: 00:0d.2 disabled by fw_config
381 12:17:22.636064 PCI: 00:1c.7 disabled by fw_config
382 12:17:22.639159 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
383 12:17:22.646187 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
384 12:17:22.649245 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
385 12:17:22.655775 GENERIC: 0.0 disabled by fw_config
386 12:17:22.659518 GENERIC: 1.0 disabled by fw_config
387 12:17:22.662520 fw_config match found: DB_USB=USB3_ACTIVE
388 12:17:22.665990 fw_config match found: DB_USB=USB3_ACTIVE
389 12:17:22.668996 fw_config match found: DB_USB=USB3_ACTIVE
390 12:17:22.675936 fw_config match found: DB_USB=USB3_ACTIVE
391 12:17:22.678819 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
392 12:17:22.685596 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
393 12:17:22.695550 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
394 12:17:22.702185 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
395 12:17:22.705644 microcode: sig=0x806c1 pf=0x80 revision=0x86
396 12:17:22.712066 microcode: Update skipped, already up-to-date
397 12:17:22.719238 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
398 12:17:22.746642 Detected 4 core, 8 thread CPU.
399 12:17:22.750030 Setting up SMI for CPU
400 12:17:22.753309 IED base = 0x7b400000
401 12:17:22.753536 IED size = 0x00400000
402 12:17:22.756668 Will perform SMM setup.
403 12:17:22.763015 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
404 12:17:22.769917 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
405 12:17:22.776607 Processing 16 relocs. Offset value of 0x00030000
406 12:17:22.779620 Attempting to start 7 APs
407 12:17:22.783289 Waiting for 10ms after sending INIT.
408 12:17:22.798647 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
409 12:17:22.799114 done.
410 12:17:22.801807 AP: slot 6 apic_id 6.
411 12:17:22.805753 AP: slot 3 apic_id 7.
412 12:17:22.806283 AP: slot 4 apic_id 2.
413 12:17:22.809000 AP: slot 7 apic_id 3.
414 12:17:22.812536 AP: slot 5 apic_id 4.
415 12:17:22.813082 AP: slot 2 apic_id 5.
416 12:17:22.818780 Waiting for 2nd SIPI to complete...done.
417 12:17:22.825790 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
418 12:17:22.832141 Processing 13 relocs. Offset value of 0x00038000
419 12:17:22.832649 Unable to locate Global NVS
420 12:17:22.841982 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
421 12:17:22.844976 Installing permanent SMM handler to 0x7b000000
422 12:17:22.855467 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
423 12:17:22.858827 Processing 794 relocs. Offset value of 0x7b010000
424 12:17:22.868931 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
425 12:17:22.871859 Processing 13 relocs. Offset value of 0x7b008000
426 12:17:22.878675 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
427 12:17:22.885039 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
428 12:17:22.888618 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
429 12:17:22.894861 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
430 12:17:22.902111 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
431 12:17:22.908618 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
432 12:17:22.915296 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
433 12:17:22.915937 Unable to locate Global NVS
434 12:17:22.924781 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
435 12:17:22.928710 Clearing SMI status registers
436 12:17:22.929304 SMI_STS: PM1
437 12:17:22.931436 PM1_STS: PWRBTN
438 12:17:22.938276 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
439 12:17:22.941372 In relocation handler: CPU 0
440 12:17:22.944659 New SMBASE=0x7b000000 IEDBASE=0x7b400000
441 12:17:22.951786 Writing SMRR. base = 0x7b000006, mask=0xff800c00
442 12:17:22.952332 Relocation complete.
443 12:17:22.961434 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
444 12:17:22.961973 In relocation handler: CPU 1
445 12:17:22.967269 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
446 12:17:22.967721 Relocation complete.
447 12:17:22.977287 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
448 12:17:22.977814 In relocation handler: CPU 3
449 12:17:22.984433 New SMBASE=0x7afff400 IEDBASE=0x7b400000
450 12:17:22.985026 Relocation complete.
451 12:17:22.994490 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
452 12:17:22.994941 In relocation handler: CPU 6
453 12:17:23.000863 New SMBASE=0x7affe800 IEDBASE=0x7b400000
454 12:17:23.003684 Writing SMRR. base = 0x7b000006, mask=0xff800c00
455 12:17:23.007335 Relocation complete.
456 12:17:23.014204 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
457 12:17:23.017145 In relocation handler: CPU 7
458 12:17:23.020728 New SMBASE=0x7affe400 IEDBASE=0x7b400000
459 12:17:23.023648 Relocation complete.
460 12:17:23.030678 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
461 12:17:23.033610 In relocation handler: CPU 2
462 12:17:23.037903 New SMBASE=0x7afff800 IEDBASE=0x7b400000
463 12:17:23.040621 Relocation complete.
464 12:17:23.047769 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
465 12:17:23.050730 In relocation handler: CPU 5
466 12:17:23.053778 New SMBASE=0x7affec00 IEDBASE=0x7b400000
467 12:17:23.057429 Writing SMRR. base = 0x7b000006, mask=0xff800c00
468 12:17:23.061086 Relocation complete.
469 12:17:23.067302 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
470 12:17:23.070988 In relocation handler: CPU 4
471 12:17:23.074056 New SMBASE=0x7afff000 IEDBASE=0x7b400000
472 12:17:23.080452 Writing SMRR. base = 0x7b000006, mask=0xff800c00
473 12:17:23.083869 Relocation complete.
474 12:17:23.084410 Initializing CPU #0
475 12:17:23.086900 CPU: vendor Intel device 806c1
476 12:17:23.090725 CPU: family 06, model 8c, stepping 01
477 12:17:23.093997 Clearing out pending MCEs
478 12:17:23.096531 Setting up local APIC...
479 12:17:23.100311 apic_id: 0x00 done.
480 12:17:23.103222 Turbo is available but hidden
481 12:17:23.106893 Turbo is available and visible
482 12:17:23.110406 microcode: Update skipped, already up-to-date
483 12:17:23.113513 CPU #0 initialized
484 12:17:23.113964 Initializing CPU #4
485 12:17:23.117119 Initializing CPU #5
486 12:17:23.120111 CPU: vendor Intel device 806c1
487 12:17:23.123117 CPU: family 06, model 8c, stepping 01
488 12:17:23.126560 Initializing CPU #7
489 12:17:23.126997 Clearing out pending MCEs
490 12:17:23.129735 CPU: vendor Intel device 806c1
491 12:17:23.136923 CPU: family 06, model 8c, stepping 01
492 12:17:23.137467 Setting up local APIC...
493 12:17:23.139696 Initializing CPU #3
494 12:17:23.143235 Initializing CPU #6
495 12:17:23.143672 CPU: vendor Intel device 806c1
496 12:17:23.150223 CPU: family 06, model 8c, stepping 01
497 12:17:23.153402 CPU: vendor Intel device 806c1
498 12:17:23.156716 CPU: family 06, model 8c, stepping 01
499 12:17:23.157256 Clearing out pending MCEs
500 12:17:23.159747 Clearing out pending MCEs
501 12:17:23.163602 Setting up local APIC...
502 12:17:23.167381 Clearing out pending MCEs
503 12:17:23.167857 apic_id: 0x02 done.
504 12:17:23.170614 Setting up local APIC...
505 12:17:23.173891 Setting up local APIC...
506 12:17:23.177463 microcode: Update skipped, already up-to-date
507 12:17:23.180693 apic_id: 0x03 done.
508 12:17:23.181232 CPU #4 initialized
509 12:17:23.186779 microcode: Update skipped, already up-to-date
510 12:17:23.187358 Initializing CPU #1
511 12:17:23.190658 apic_id: 0x06 done.
512 12:17:23.194234 apic_id: 0x07 done.
513 12:17:23.196950 microcode: Update skipped, already up-to-date
514 12:17:23.200570 microcode: Update skipped, already up-to-date
515 12:17:23.203531 CPU #6 initialized
516 12:17:23.207412 CPU #3 initialized
517 12:17:23.207978 Initializing CPU #2
518 12:17:23.209975 CPU: vendor Intel device 806c1
519 12:17:23.213782 CPU: family 06, model 8c, stepping 01
520 12:17:23.217118 CPU: vendor Intel device 806c1
521 12:17:23.220332 CPU: family 06, model 8c, stepping 01
522 12:17:23.223938 Clearing out pending MCEs
523 12:17:23.226689 Clearing out pending MCEs
524 12:17:23.230669 Setting up local APIC...
525 12:17:23.233356 CPU: vendor Intel device 806c1
526 12:17:23.236501 CPU: family 06, model 8c, stepping 01
527 12:17:23.240671 Setting up local APIC...
528 12:17:23.241233 Clearing out pending MCEs
529 12:17:23.243500 apic_id: 0x04 done.
530 12:17:23.246455 CPU #7 initialized
531 12:17:23.250416 microcode: Update skipped, already up-to-date
532 12:17:23.253510 apic_id: 0x05 done.
533 12:17:23.254048 CPU #5 initialized
534 12:17:23.260399 microcode: Update skipped, already up-to-date
535 12:17:23.260842 Setting up local APIC...
536 12:17:23.263737 CPU #2 initialized
537 12:17:23.266679 apic_id: 0x01 done.
538 12:17:23.270457 microcode: Update skipped, already up-to-date
539 12:17:23.273198 CPU #1 initialized
540 12:17:23.276812 bsp_do_flight_plan done after 454 msecs.
541 12:17:23.279644 CPU: frequency set to 4400 MHz
542 12:17:23.280087 Enabling SMIs.
543 12:17:23.287027 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
544 12:17:23.303228 SATAXPCIE1 indicates PCIe NVMe is present
545 12:17:23.307273 Probing TPM: done!
546 12:17:23.310370 Connected to device vid:did:rid of 1ae0:0028:00
547 12:17:23.321017 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_A:0.5.120/cr50_v2.94_mp.81-9de2b2fcb6
548 12:17:23.324279 Initialized TPM device CR50 revision 0
549 12:17:23.327568 Enabling S0i3.4
550 12:17:23.334573 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
551 12:17:23.337177 Found a VBT of 8704 bytes after decompression
552 12:17:23.344389 cse_lite: CSE RO boot. HybridStorageMode disabled
553 12:17:23.350275 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
554 12:17:23.424856 FSPS returned 0
555 12:17:23.428029 Executing Phase 1 of FspMultiPhaseSiInit
556 12:17:23.438143 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
557 12:17:23.441310 port C0 DISC req: usage 1 usb3 1 usb2 5
558 12:17:23.444499 Raw Buffer output 0 00000511
559 12:17:23.448095 Raw Buffer output 1 00000000
560 12:17:23.451708 pmc_send_ipc_cmd succeeded
561 12:17:23.458187 port C1 DISC req: usage 1 usb3 2 usb2 3
562 12:17:23.458725 Raw Buffer output 0 00000321
563 12:17:23.461938 Raw Buffer output 1 00000000
564 12:17:23.465636 pmc_send_ipc_cmd succeeded
565 12:17:23.471334 Detected 4 core, 8 thread CPU.
566 12:17:23.473772 Detected 4 core, 8 thread CPU.
567 12:17:23.674701 Display FSP Version Info HOB
568 12:17:23.677827 Reference Code - CPU = a.0.4c.31
569 12:17:23.681671 uCode Version = 0.0.0.86
570 12:17:23.684649 TXT ACM version = ff.ff.ff.ffff
571 12:17:23.687913 Reference Code - ME = a.0.4c.31
572 12:17:23.691368 MEBx version = 0.0.0.0
573 12:17:23.694835 ME Firmware Version = Consumer SKU
574 12:17:23.698037 Reference Code - PCH = a.0.4c.31
575 12:17:23.701698 PCH-CRID Status = Disabled
576 12:17:23.704949 PCH-CRID Original Value = ff.ff.ff.ffff
577 12:17:23.708188 PCH-CRID New Value = ff.ff.ff.ffff
578 12:17:23.711564 OPROM - RST - RAID = ff.ff.ff.ffff
579 12:17:23.715025 PCH Hsio Version = 4.0.0.0
580 12:17:23.718343 Reference Code - SA - System Agent = a.0.4c.31
581 12:17:23.721273 Reference Code - MRC = 2.0.0.1
582 12:17:23.724943 SA - PCIe Version = a.0.4c.31
583 12:17:23.728164 SA-CRID Status = Disabled
584 12:17:23.731265 SA-CRID Original Value = 0.0.0.1
585 12:17:23.734640 SA-CRID New Value = 0.0.0.1
586 12:17:23.738111 OPROM - VBIOS = ff.ff.ff.ffff
587 12:17:23.742025 IO Manageability Engine FW Version = 11.1.4.0
588 12:17:23.745405 PHY Build Version = 0.0.0.e0
589 12:17:23.749301 Thunderbolt(TM) FW Version = 0.0.0.0
590 12:17:23.755549 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
591 12:17:23.756002 ITSS IRQ Polarities Before:
592 12:17:23.758726 IPC0: 0xffffffff
593 12:17:23.759173 IPC1: 0xffffffff
594 12:17:23.761883 IPC2: 0xffffffff
595 12:17:23.765557 IPC3: 0xffffffff
596 12:17:23.766000 ITSS IRQ Polarities After:
597 12:17:23.768361 IPC0: 0xffffffff
598 12:17:23.768804 IPC1: 0xffffffff
599 12:17:23.772113 IPC2: 0xffffffff
600 12:17:23.775432 IPC3: 0xffffffff
601 12:17:23.778386 Found PCIe Root Port #9 at PCI: 00:1d.0.
602 12:17:23.788682 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
603 12:17:23.802218 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
604 12:17:23.815017 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
605 12:17:23.821559 BS: BS_DEV_INIT_CHIPS run times (exec / console): 290 / 236 ms
606 12:17:23.822120 Enumerating buses...
607 12:17:23.828526 Show all devs... Before device enumeration.
608 12:17:23.829065 Root Device: enabled 1
609 12:17:23.831538 DOMAIN: 0000: enabled 1
610 12:17:23.834731 CPU_CLUSTER: 0: enabled 1
611 12:17:23.838018 PCI: 00:00.0: enabled 1
612 12:17:23.838488 PCI: 00:02.0: enabled 1
613 12:17:23.841317 PCI: 00:04.0: enabled 1
614 12:17:23.844670 PCI: 00:05.0: enabled 1
615 12:17:23.848001 PCI: 00:06.0: enabled 0
616 12:17:23.848552 PCI: 00:07.0: enabled 0
617 12:17:23.851357 PCI: 00:07.1: enabled 0
618 12:17:23.854525 PCI: 00:07.2: enabled 0
619 12:17:23.855027 PCI: 00:07.3: enabled 0
620 12:17:23.858119 PCI: 00:08.0: enabled 1
621 12:17:23.861108 PCI: 00:09.0: enabled 0
622 12:17:23.864875 PCI: 00:0a.0: enabled 0
623 12:17:23.865317 PCI: 00:0d.0: enabled 1
624 12:17:23.867855 PCI: 00:0d.1: enabled 0
625 12:17:23.871064 PCI: 00:0d.2: enabled 0
626 12:17:23.874632 PCI: 00:0d.3: enabled 0
627 12:17:23.875075 PCI: 00:0e.0: enabled 0
628 12:17:23.878281 PCI: 00:10.2: enabled 1
629 12:17:23.881192 PCI: 00:10.6: enabled 0
630 12:17:23.884547 PCI: 00:10.7: enabled 0
631 12:17:23.885001 PCI: 00:12.0: enabled 0
632 12:17:23.888231 PCI: 00:12.6: enabled 0
633 12:17:23.891213 PCI: 00:13.0: enabled 0
634 12:17:23.891663 PCI: 00:14.0: enabled 1
635 12:17:23.894499 PCI: 00:14.1: enabled 0
636 12:17:23.897520 PCI: 00:14.2: enabled 1
637 12:17:23.901486 PCI: 00:14.3: enabled 1
638 12:17:23.902031 PCI: 00:15.0: enabled 1
639 12:17:23.904500 PCI: 00:15.1: enabled 1
640 12:17:23.907744 PCI: 00:15.2: enabled 1
641 12:17:23.911158 PCI: 00:15.3: enabled 1
642 12:17:23.911632 PCI: 00:16.0: enabled 1
643 12:17:23.914456 PCI: 00:16.1: enabled 0
644 12:17:23.918296 PCI: 00:16.2: enabled 0
645 12:17:23.921456 PCI: 00:16.3: enabled 0
646 12:17:23.922050 PCI: 00:16.4: enabled 0
647 12:17:23.924721 PCI: 00:16.5: enabled 0
648 12:17:23.927835 PCI: 00:17.0: enabled 1
649 12:17:23.928378 PCI: 00:19.0: enabled 0
650 12:17:23.930950 PCI: 00:19.1: enabled 1
651 12:17:23.934273 PCI: 00:19.2: enabled 0
652 12:17:23.938155 PCI: 00:1c.0: enabled 1
653 12:17:23.938686 PCI: 00:1c.1: enabled 0
654 12:17:23.941441 PCI: 00:1c.2: enabled 0
655 12:17:23.944639 PCI: 00:1c.3: enabled 0
656 12:17:23.948162 PCI: 00:1c.4: enabled 0
657 12:17:23.948711 PCI: 00:1c.5: enabled 0
658 12:17:23.951263 PCI: 00:1c.6: enabled 1
659 12:17:23.954885 PCI: 00:1c.7: enabled 0
660 12:17:23.958041 PCI: 00:1d.0: enabled 1
661 12:17:23.958603 PCI: 00:1d.1: enabled 0
662 12:17:23.961037 PCI: 00:1d.2: enabled 1
663 12:17:23.964374 PCI: 00:1d.3: enabled 0
664 12:17:23.967273 PCI: 00:1e.0: enabled 1
665 12:17:23.967720 PCI: 00:1e.1: enabled 0
666 12:17:23.970760 PCI: 00:1e.2: enabled 1
667 12:17:23.974581 PCI: 00:1e.3: enabled 1
668 12:17:23.975024 PCI: 00:1f.0: enabled 1
669 12:17:23.977530 PCI: 00:1f.1: enabled 0
670 12:17:23.980848 PCI: 00:1f.2: enabled 1
671 12:17:23.984567 PCI: 00:1f.3: enabled 1
672 12:17:23.985111 PCI: 00:1f.4: enabled 0
673 12:17:23.987277 PCI: 00:1f.5: enabled 1
674 12:17:23.990885 PCI: 00:1f.6: enabled 0
675 12:17:23.993745 PCI: 00:1f.7: enabled 0
676 12:17:23.994212 APIC: 00: enabled 1
677 12:17:23.997677 GENERIC: 0.0: enabled 1
678 12:17:24.000816 GENERIC: 0.0: enabled 1
679 12:17:24.001339 GENERIC: 1.0: enabled 1
680 12:17:24.004005 GENERIC: 0.0: enabled 1
681 12:17:24.007461 GENERIC: 1.0: enabled 1
682 12:17:24.010878 USB0 port 0: enabled 1
683 12:17:24.011332 GENERIC: 0.0: enabled 1
684 12:17:24.013995 USB0 port 0: enabled 1
685 12:17:24.017676 GENERIC: 0.0: enabled 1
686 12:17:24.018280 I2C: 00:1a: enabled 1
687 12:17:24.020633 I2C: 00:31: enabled 1
688 12:17:24.024100 I2C: 00:32: enabled 1
689 12:17:24.027632 I2C: 00:10: enabled 1
690 12:17:24.028172 I2C: 00:15: enabled 1
691 12:17:24.030783 GENERIC: 0.0: enabled 0
692 12:17:24.034413 GENERIC: 1.0: enabled 0
693 12:17:24.034968 GENERIC: 0.0: enabled 1
694 12:17:24.037477 SPI: 00: enabled 1
695 12:17:24.040836 SPI: 00: enabled 1
696 12:17:24.041533 PNP: 0c09.0: enabled 1
697 12:17:24.044191 GENERIC: 0.0: enabled 1
698 12:17:24.047328 USB3 port 0: enabled 1
699 12:17:24.047883 USB3 port 1: enabled 1
700 12:17:24.050772 USB3 port 2: enabled 0
701 12:17:24.054018 USB3 port 3: enabled 0
702 12:17:24.057579 USB2 port 0: enabled 0
703 12:17:24.058174 USB2 port 1: enabled 1
704 12:17:24.060527 USB2 port 2: enabled 1
705 12:17:24.063927 USB2 port 3: enabled 0
706 12:17:24.064483 USB2 port 4: enabled 1
707 12:17:24.066942 USB2 port 5: enabled 0
708 12:17:24.070427 USB2 port 6: enabled 0
709 12:17:24.073583 USB2 port 7: enabled 0
710 12:17:24.074195 USB2 port 8: enabled 0
711 12:17:24.077220 USB2 port 9: enabled 0
712 12:17:24.080521 USB3 port 0: enabled 0
713 12:17:24.081078 USB3 port 1: enabled 1
714 12:17:24.083350 USB3 port 2: enabled 0
715 12:17:24.086857 USB3 port 3: enabled 0
716 12:17:24.090272 GENERIC: 0.0: enabled 1
717 12:17:24.090722 GENERIC: 1.0: enabled 1
718 12:17:24.093429 APIC: 01: enabled 1
719 12:17:24.093874 APIC: 05: enabled 1
720 12:17:24.096805 APIC: 07: enabled 1
721 12:17:24.100260 APIC: 02: enabled 1
722 12:17:24.100733 APIC: 04: enabled 1
723 12:17:24.103915 APIC: 06: enabled 1
724 12:17:24.106642 APIC: 03: enabled 1
725 12:17:24.107085 Compare with tree...
726 12:17:24.109834 Root Device: enabled 1
727 12:17:24.113758 DOMAIN: 0000: enabled 1
728 12:17:24.114371 PCI: 00:00.0: enabled 1
729 12:17:24.117041 PCI: 00:02.0: enabled 1
730 12:17:24.119760 PCI: 00:04.0: enabled 1
731 12:17:24.123882 GENERIC: 0.0: enabled 1
732 12:17:24.127045 PCI: 00:05.0: enabled 1
733 12:17:24.127487 PCI: 00:06.0: enabled 0
734 12:17:24.130499 PCI: 00:07.0: enabled 0
735 12:17:24.133692 GENERIC: 0.0: enabled 1
736 12:17:24.136912 PCI: 00:07.1: enabled 0
737 12:17:24.140217 GENERIC: 1.0: enabled 1
738 12:17:24.143371 PCI: 00:07.2: enabled 0
739 12:17:24.143936 GENERIC: 0.0: enabled 1
740 12:17:24.146486 PCI: 00:07.3: enabled 0
741 12:17:24.150117 GENERIC: 1.0: enabled 1
742 12:17:24.153720 PCI: 00:08.0: enabled 1
743 12:17:24.156663 PCI: 00:09.0: enabled 0
744 12:17:24.157103 PCI: 00:0a.0: enabled 0
745 12:17:24.159700 PCI: 00:0d.0: enabled 1
746 12:17:24.163747 USB0 port 0: enabled 1
747 12:17:24.166721 USB3 port 0: enabled 1
748 12:17:24.170397 USB3 port 1: enabled 1
749 12:17:24.170944 USB3 port 2: enabled 0
750 12:17:24.173469 USB3 port 3: enabled 0
751 12:17:24.176840 PCI: 00:0d.1: enabled 0
752 12:17:24.179835 PCI: 00:0d.2: enabled 0
753 12:17:24.183448 GENERIC: 0.0: enabled 1
754 12:17:24.183887 PCI: 00:0d.3: enabled 0
755 12:17:24.186530 PCI: 00:0e.0: enabled 0
756 12:17:24.189656 PCI: 00:10.2: enabled 1
757 12:17:24.193608 PCI: 00:10.6: enabled 0
758 12:17:24.196553 PCI: 00:10.7: enabled 0
759 12:17:24.197108 PCI: 00:12.0: enabled 0
760 12:17:24.199638 PCI: 00:12.6: enabled 0
761 12:17:24.202805 PCI: 00:13.0: enabled 0
762 12:17:24.206351 PCI: 00:14.0: enabled 1
763 12:17:24.210149 USB0 port 0: enabled 1
764 12:17:24.210709 USB2 port 0: enabled 0
765 12:17:24.212917 USB2 port 1: enabled 1
766 12:17:24.216832 USB2 port 2: enabled 1
767 12:17:24.219851 USB2 port 3: enabled 0
768 12:17:24.223051 USB2 port 4: enabled 1
769 12:17:24.226435 USB2 port 5: enabled 0
770 12:17:24.226986 USB2 port 6: enabled 0
771 12:17:24.230038 USB2 port 7: enabled 0
772 12:17:24.233255 USB2 port 8: enabled 0
773 12:17:24.236290 USB2 port 9: enabled 0
774 12:17:24.239598 USB3 port 0: enabled 0
775 12:17:24.240151 USB3 port 1: enabled 1
776 12:17:24.242934 USB3 port 2: enabled 0
777 12:17:24.246674 USB3 port 3: enabled 0
778 12:17:24.249694 PCI: 00:14.1: enabled 0
779 12:17:24.252877 PCI: 00:14.2: enabled 1
780 12:17:24.253428 PCI: 00:14.3: enabled 1
781 12:17:24.256259 GENERIC: 0.0: enabled 1
782 12:17:24.259637 PCI: 00:15.0: enabled 1
783 12:17:24.262906 I2C: 00:1a: enabled 1
784 12:17:24.266330 I2C: 00:31: enabled 1
785 12:17:24.266896 I2C: 00:32: enabled 1
786 12:17:24.269195 PCI: 00:15.1: enabled 1
787 12:17:24.272641 I2C: 00:10: enabled 1
788 12:17:24.276353 PCI: 00:15.2: enabled 1
789 12:17:24.279841 PCI: 00:15.3: enabled 1
790 12:17:24.280397 PCI: 00:16.0: enabled 1
791 12:17:24.282917 PCI: 00:16.1: enabled 0
792 12:17:24.286001 PCI: 00:16.2: enabled 0
793 12:17:24.289700 PCI: 00:16.3: enabled 0
794 12:17:24.292301 PCI: 00:16.4: enabled 0
795 12:17:24.292744 PCI: 00:16.5: enabled 0
796 12:17:24.295644 PCI: 00:17.0: enabled 1
797 12:17:24.298984 PCI: 00:19.0: enabled 0
798 12:17:24.302448 PCI: 00:19.1: enabled 1
799 12:17:24.305949 I2C: 00:15: enabled 1
800 12:17:24.306447 PCI: 00:19.2: enabled 0
801 12:17:24.309227 PCI: 00:1d.0: enabled 1
802 12:17:24.312505 GENERIC: 0.0: enabled 1
803 12:17:24.315344 PCI: 00:1e.0: enabled 1
804 12:17:24.319286 PCI: 00:1e.1: enabled 0
805 12:17:24.319828 PCI: 00:1e.2: enabled 1
806 12:17:24.322096 SPI: 00: enabled 1
807 12:17:24.325970 PCI: 00:1e.3: enabled 1
808 12:17:24.326561 SPI: 00: enabled 1
809 12:17:24.328885 PCI: 00:1f.0: enabled 1
810 12:17:24.332090 PNP: 0c09.0: enabled 1
811 12:17:24.335245 PCI: 00:1f.1: enabled 0
812 12:17:24.338344 PCI: 00:1f.2: enabled 1
813 12:17:24.342176 GENERIC: 0.0: enabled 1
814 12:17:24.342711 GENERIC: 0.0: enabled 1
815 12:17:24.345459 GENERIC: 1.0: enabled 1
816 12:17:24.395701 PCI: 00:1f.3: enabled 1
817 12:17:24.396309 PCI: 00:1f.4: enabled 0
818 12:17:24.396672 PCI: 00:1f.5: enabled 1
819 12:17:24.396995 PCI: 00:1f.6: enabled 0
820 12:17:24.397306 PCI: 00:1f.7: enabled 0
821 12:17:24.397607 CPU_CLUSTER: 0: enabled 1
822 12:17:24.397903 APIC: 00: enabled 1
823 12:17:24.398238 APIC: 01: enabled 1
824 12:17:24.398539 APIC: 05: enabled 1
825 12:17:24.398827 APIC: 07: enabled 1
826 12:17:24.399462 APIC: 02: enabled 1
827 12:17:24.399778 APIC: 04: enabled 1
828 12:17:24.400074 APIC: 06: enabled 1
829 12:17:24.400363 APIC: 03: enabled 1
830 12:17:24.400648 Root Device scanning...
831 12:17:24.400934 scan_static_bus for Root Device
832 12:17:24.401236 DOMAIN: 0000 enabled
833 12:17:24.401524 CPU_CLUSTER: 0 enabled
834 12:17:24.402162 DOMAIN: 0000 scanning...
835 12:17:24.402483 PCI: pci_scan_bus for bus 00
836 12:17:24.403717 PCI: 00:00.0 [8086/0000] ops
837 12:17:24.404155 PCI: 00:00.0 [8086/9a12] enabled
838 12:17:24.407868 PCI: 00:02.0 [8086/0000] bus ops
839 12:17:24.410617 PCI: 00:02.0 [8086/9a40] enabled
840 12:17:24.414213 PCI: 00:04.0 [8086/0000] bus ops
841 12:17:24.417835 PCI: 00:04.0 [8086/9a03] enabled
842 12:17:24.420958 PCI: 00:05.0 [8086/9a19] enabled
843 12:17:24.424414 PCI: 00:07.0 [0000/0000] hidden
844 12:17:24.427772 PCI: 00:08.0 [8086/9a11] enabled
845 12:17:24.430962 PCI: 00:0a.0 [8086/9a0d] disabled
846 12:17:24.433975 PCI: 00:0d.0 [8086/0000] bus ops
847 12:17:24.437287 PCI: 00:0d.0 [8086/9a13] enabled
848 12:17:24.440803 PCI: 00:14.0 [8086/0000] bus ops
849 12:17:24.444004 PCI: 00:14.0 [8086/a0ed] enabled
850 12:17:24.447640 PCI: 00:14.2 [8086/a0ef] enabled
851 12:17:24.450934 PCI: 00:14.3 [8086/0000] bus ops
852 12:17:24.454052 PCI: 00:14.3 [8086/a0f0] enabled
853 12:17:24.457422 PCI: 00:15.0 [8086/0000] bus ops
854 12:17:24.461217 PCI: 00:15.0 [8086/a0e8] enabled
855 12:17:24.463645 PCI: 00:15.1 [8086/0000] bus ops
856 12:17:24.467509 PCI: 00:15.1 [8086/a0e9] enabled
857 12:17:24.470771 PCI: 00:15.2 [8086/0000] bus ops
858 12:17:24.473988 PCI: 00:15.2 [8086/a0ea] enabled
859 12:17:24.477338 PCI: 00:15.3 [8086/0000] bus ops
860 12:17:24.480513 PCI: 00:15.3 [8086/a0eb] enabled
861 12:17:24.483622 PCI: 00:16.0 [8086/0000] ops
862 12:17:24.487731 PCI: 00:16.0 [8086/a0e0] enabled
863 12:17:24.494343 PCI: Static device PCI: 00:17.0 not found, disabling it.
864 12:17:24.497467 PCI: 00:19.0 [8086/0000] bus ops
865 12:17:24.500487 PCI: 00:19.0 [8086/a0c5] disabled
866 12:17:24.503478 PCI: 00:19.1 [8086/0000] bus ops
867 12:17:24.506738 PCI: 00:19.1 [8086/a0c6] enabled
868 12:17:24.510004 PCI: 00:1d.0 [8086/0000] bus ops
869 12:17:24.513583 PCI: 00:1d.0 [8086/a0b0] enabled
870 12:17:24.517221 PCI: 00:1e.0 [8086/0000] ops
871 12:17:24.520201 PCI: 00:1e.0 [8086/a0a8] enabled
872 12:17:24.523913 PCI: 00:1e.2 [8086/0000] bus ops
873 12:17:24.526769 PCI: 00:1e.2 [8086/a0aa] enabled
874 12:17:24.530587 PCI: 00:1e.3 [8086/0000] bus ops
875 12:17:24.533464 PCI: 00:1e.3 [8086/a0ab] enabled
876 12:17:24.536816 PCI: 00:1f.0 [8086/0000] bus ops
877 12:17:24.540071 PCI: 00:1f.0 [8086/a087] enabled
878 12:17:24.540610 RTC Init
879 12:17:24.543407 Set power on after power failure.
880 12:17:24.546513 Disabling Deep S3
881 12:17:24.546958 Disabling Deep S3
882 12:17:24.550307 Disabling Deep S4
883 12:17:24.550868 Disabling Deep S4
884 12:17:24.553282 Disabling Deep S5
885 12:17:24.553720 Disabling Deep S5
886 12:17:24.556321 PCI: 00:1f.2 [0000/0000] hidden
887 12:17:24.559798 PCI: 00:1f.3 [8086/0000] bus ops
888 12:17:24.563129 PCI: 00:1f.3 [8086/a0c8] enabled
889 12:17:24.566512 PCI: 00:1f.5 [8086/0000] bus ops
890 12:17:24.569558 PCI: 00:1f.5 [8086/a0a4] enabled
891 12:17:24.572889 PCI: Leftover static devices:
892 12:17:24.576379 PCI: 00:10.2
893 12:17:24.576819 PCI: 00:10.6
894 12:17:24.579971 PCI: 00:10.7
895 12:17:24.580506 PCI: 00:06.0
896 12:17:24.580882 PCI: 00:07.1
897 12:17:24.582817 PCI: 00:07.2
898 12:17:24.583258 PCI: 00:07.3
899 12:17:24.586341 PCI: 00:09.0
900 12:17:24.586778 PCI: 00:0d.1
901 12:17:24.587122 PCI: 00:0d.2
902 12:17:24.589567 PCI: 00:0d.3
903 12:17:24.590007 PCI: 00:0e.0
904 12:17:24.593197 PCI: 00:12.0
905 12:17:24.593736 PCI: 00:12.6
906 12:17:24.596536 PCI: 00:13.0
907 12:17:24.597074 PCI: 00:14.1
908 12:17:24.597426 PCI: 00:16.1
909 12:17:24.600243 PCI: 00:16.2
910 12:17:24.600694 PCI: 00:16.3
911 12:17:24.603228 PCI: 00:16.4
912 12:17:24.603669 PCI: 00:16.5
913 12:17:24.604016 PCI: 00:17.0
914 12:17:24.606372 PCI: 00:19.2
915 12:17:24.606874 PCI: 00:1e.1
916 12:17:24.609922 PCI: 00:1f.1
917 12:17:24.610511 PCI: 00:1f.4
918 12:17:24.610869 PCI: 00:1f.6
919 12:17:24.612850 PCI: 00:1f.7
920 12:17:24.616165 PCI: Check your devicetree.cb.
921 12:17:24.619393 PCI: 00:02.0 scanning...
922 12:17:24.623269 scan_generic_bus for PCI: 00:02.0
923 12:17:24.626508 scan_generic_bus for PCI: 00:02.0 done
924 12:17:24.629362 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
925 12:17:24.632964 PCI: 00:04.0 scanning...
926 12:17:24.636192 scan_generic_bus for PCI: 00:04.0
927 12:17:24.639610 GENERIC: 0.0 enabled
928 12:17:24.646415 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
929 12:17:24.649522 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
930 12:17:24.652658 PCI: 00:0d.0 scanning...
931 12:17:24.655853 scan_static_bus for PCI: 00:0d.0
932 12:17:24.659545 USB0 port 0 enabled
933 12:17:24.659977 USB0 port 0 scanning...
934 12:17:24.662579 scan_static_bus for USB0 port 0
935 12:17:24.665645 USB3 port 0 enabled
936 12:17:24.669409 USB3 port 1 enabled
937 12:17:24.669864 USB3 port 2 disabled
938 12:17:24.672539 USB3 port 3 disabled
939 12:17:24.675798 USB3 port 0 scanning...
940 12:17:24.678911 scan_static_bus for USB3 port 0
941 12:17:24.682302 scan_static_bus for USB3 port 0 done
942 12:17:24.685585 scan_bus: bus USB3 port 0 finished in 6 msecs
943 12:17:24.688695 USB3 port 1 scanning...
944 12:17:24.692237 scan_static_bus for USB3 port 1
945 12:17:24.695454 scan_static_bus for USB3 port 1 done
946 12:17:24.702608 scan_bus: bus USB3 port 1 finished in 6 msecs
947 12:17:24.705570 scan_static_bus for USB0 port 0 done
948 12:17:24.709154 scan_bus: bus USB0 port 0 finished in 43 msecs
949 12:17:24.711935 scan_static_bus for PCI: 00:0d.0 done
950 12:17:24.718530 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
951 12:17:24.718986 PCI: 00:14.0 scanning...
952 12:17:24.725463 scan_static_bus for PCI: 00:14.0
953 12:17:24.726038 USB0 port 0 enabled
954 12:17:24.728291 USB0 port 0 scanning...
955 12:17:24.731968 scan_static_bus for USB0 port 0
956 12:17:24.735309 USB2 port 0 disabled
957 12:17:24.735749 USB2 port 1 enabled
958 12:17:24.738170 USB2 port 2 enabled
959 12:17:24.738682 USB2 port 3 disabled
960 12:17:24.742193 USB2 port 4 enabled
961 12:17:24.745193 USB2 port 5 disabled
962 12:17:24.745729 USB2 port 6 disabled
963 12:17:24.748572 USB2 port 7 disabled
964 12:17:24.752037 USB2 port 8 disabled
965 12:17:24.752597 USB2 port 9 disabled
966 12:17:24.754760 USB3 port 0 disabled
967 12:17:24.758673 USB3 port 1 enabled
968 12:17:24.759226 USB3 port 2 disabled
969 12:17:24.761627 USB3 port 3 disabled
970 12:17:24.764897 USB2 port 1 scanning...
971 12:17:24.768486 scan_static_bus for USB2 port 1
972 12:17:24.771945 scan_static_bus for USB2 port 1 done
973 12:17:24.774887 scan_bus: bus USB2 port 1 finished in 6 msecs
974 12:17:24.778551 USB2 port 2 scanning...
975 12:17:24.782304 scan_static_bus for USB2 port 2
976 12:17:24.784584 scan_static_bus for USB2 port 2 done
977 12:17:24.788660 scan_bus: bus USB2 port 2 finished in 6 msecs
978 12:17:24.792004 USB2 port 4 scanning...
979 12:17:24.795294 scan_static_bus for USB2 port 4
980 12:17:24.798189 scan_static_bus for USB2 port 4 done
981 12:17:24.804738 scan_bus: bus USB2 port 4 finished in 6 msecs
982 12:17:24.805280 USB3 port 1 scanning...
983 12:17:24.808363 scan_static_bus for USB3 port 1
984 12:17:24.815213 scan_static_bus for USB3 port 1 done
985 12:17:24.817978 scan_bus: bus USB3 port 1 finished in 6 msecs
986 12:17:24.821585 scan_static_bus for USB0 port 0 done
987 12:17:24.828087 scan_bus: bus USB0 port 0 finished in 93 msecs
988 12:17:24.831034 scan_static_bus for PCI: 00:14.0 done
989 12:17:24.834628 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
990 12:17:24.838159 PCI: 00:14.3 scanning...
991 12:17:24.841194 scan_static_bus for PCI: 00:14.3
992 12:17:24.844167 GENERIC: 0.0 enabled
993 12:17:24.847881 scan_static_bus for PCI: 00:14.3 done
994 12:17:24.850949 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
995 12:17:24.854545 PCI: 00:15.0 scanning...
996 12:17:24.857384 scan_static_bus for PCI: 00:15.0
997 12:17:24.861084 I2C: 00:1a enabled
998 12:17:24.861534 I2C: 00:31 enabled
999 12:17:24.864772 I2C: 00:32 enabled
1000 12:17:24.867530 scan_static_bus for PCI: 00:15.0 done
1001 12:17:24.870801 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1002 12:17:24.874545 PCI: 00:15.1 scanning...
1003 12:17:24.877671 scan_static_bus for PCI: 00:15.1
1004 12:17:24.880905 I2C: 00:10 enabled
1005 12:17:24.884314 scan_static_bus for PCI: 00:15.1 done
1006 12:17:24.887577 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1007 12:17:24.890830 PCI: 00:15.2 scanning...
1008 12:17:24.894054 scan_static_bus for PCI: 00:15.2
1009 12:17:24.897326 scan_static_bus for PCI: 00:15.2 done
1010 12:17:24.904457 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1011 12:17:24.907561 PCI: 00:15.3 scanning...
1012 12:17:24.910782 scan_static_bus for PCI: 00:15.3
1013 12:17:24.913920 scan_static_bus for PCI: 00:15.3 done
1014 12:17:24.917115 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1015 12:17:24.921283 PCI: 00:19.1 scanning...
1016 12:17:24.924109 scan_static_bus for PCI: 00:19.1
1017 12:17:24.927639 I2C: 00:15 enabled
1018 12:17:24.930619 scan_static_bus for PCI: 00:19.1 done
1019 12:17:24.933771 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1020 12:17:24.937129 PCI: 00:1d.0 scanning...
1021 12:17:24.941061 do_pci_scan_bridge for PCI: 00:1d.0
1022 12:17:24.944331 PCI: pci_scan_bus for bus 01
1023 12:17:24.946796 PCI: 01:00.0 [15b7/5009] enabled
1024 12:17:24.950365 GENERIC: 0.0 enabled
1025 12:17:24.954130 Enabling Common Clock Configuration
1026 12:17:24.956998 L1 Sub-State supported from root port 29
1027 12:17:24.960063 L1 Sub-State Support = 0x5
1028 12:17:24.963731 CommonModeRestoreTime = 0x28
1029 12:17:24.966566 Power On Value = 0x16, Power On Scale = 0x0
1030 12:17:24.970092 ASPM: Enabled L1
1031 12:17:24.973249 PCIe: Max_Payload_Size adjusted to 128
1032 12:17:24.977115 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1033 12:17:24.980845 PCI: 00:1e.2 scanning...
1034 12:17:24.984407 scan_generic_bus for PCI: 00:1e.2
1035 12:17:24.984864 SPI: 00 enabled
1036 12:17:24.990846 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1037 12:17:24.997422 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1038 12:17:25.000376 PCI: 00:1e.3 scanning...
1039 12:17:25.003832 scan_generic_bus for PCI: 00:1e.3
1040 12:17:25.004375 SPI: 00 enabled
1041 12:17:25.010398 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1042 12:17:25.013761 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1043 12:17:25.017305 PCI: 00:1f.0 scanning...
1044 12:17:25.020604 scan_static_bus for PCI: 00:1f.0
1045 12:17:25.023836 PNP: 0c09.0 enabled
1046 12:17:25.027466 PNP: 0c09.0 scanning...
1047 12:17:25.030946 scan_static_bus for PNP: 0c09.0
1048 12:17:25.033951 scan_static_bus for PNP: 0c09.0 done
1049 12:17:25.037191 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1050 12:17:25.040772 scan_static_bus for PCI: 00:1f.0 done
1051 12:17:25.047401 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1052 12:17:25.050039 PCI: 00:1f.2 scanning...
1053 12:17:25.054103 scan_static_bus for PCI: 00:1f.2
1054 12:17:25.054656 GENERIC: 0.0 enabled
1055 12:17:25.056923 GENERIC: 0.0 scanning...
1056 12:17:25.060195 scan_static_bus for GENERIC: 0.0
1057 12:17:25.063606 GENERIC: 0.0 enabled
1058 12:17:25.064118 GENERIC: 1.0 enabled
1059 12:17:25.070425 scan_static_bus for GENERIC: 0.0 done
1060 12:17:25.073185 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1061 12:17:25.076609 scan_static_bus for PCI: 00:1f.2 done
1062 12:17:25.083410 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1063 12:17:25.083954 PCI: 00:1f.3 scanning...
1064 12:17:25.086551 scan_static_bus for PCI: 00:1f.3
1065 12:17:25.093442 scan_static_bus for PCI: 00:1f.3 done
1066 12:17:25.096193 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1067 12:17:25.100317 PCI: 00:1f.5 scanning...
1068 12:17:25.103165 scan_generic_bus for PCI: 00:1f.5
1069 12:17:25.106402 scan_generic_bus for PCI: 00:1f.5 done
1070 12:17:25.113643 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1071 12:17:25.116763 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1072 12:17:25.120232 scan_static_bus for Root Device done
1073 12:17:25.126726 scan_bus: bus Root Device finished in 736 msecs
1074 12:17:25.127265 done
1075 12:17:25.132573 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1076 12:17:25.135883 Chrome EC: UHEPI supported
1077 12:17:25.139200 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1078 12:17:25.146479 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1079 12:17:25.149151 SPI flash protection: WPSW=0 SRP0=1
1080 12:17:25.156712 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1081 12:17:25.162704 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1082 12:17:25.163285 found VGA at PCI: 00:02.0
1083 12:17:25.165949 Setting up VGA for PCI: 00:02.0
1084 12:17:25.172292 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1085 12:17:25.176047 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1086 12:17:25.179187 Allocating resources...
1087 12:17:25.182757 Reading resources...
1088 12:17:25.185633 Root Device read_resources bus 0 link: 0
1089 12:17:25.188704 DOMAIN: 0000 read_resources bus 0 link: 0
1090 12:17:25.197040 PCI: 00:04.0 read_resources bus 1 link: 0
1091 12:17:25.199850 PCI: 00:04.0 read_resources bus 1 link: 0 done
1092 12:17:25.206941 PCI: 00:0d.0 read_resources bus 0 link: 0
1093 12:17:25.209742 USB0 port 0 read_resources bus 0 link: 0
1094 12:17:25.216250 USB0 port 0 read_resources bus 0 link: 0 done
1095 12:17:25.220231 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1096 12:17:25.226268 PCI: 00:14.0 read_resources bus 0 link: 0
1097 12:17:25.229509 USB0 port 0 read_resources bus 0 link: 0
1098 12:17:25.236293 USB0 port 0 read_resources bus 0 link: 0 done
1099 12:17:25.239284 PCI: 00:14.0 read_resources bus 0 link: 0 done
1100 12:17:25.246013 PCI: 00:14.3 read_resources bus 0 link: 0
1101 12:17:25.249341 PCI: 00:14.3 read_resources bus 0 link: 0 done
1102 12:17:25.252552 PCI: 00:15.0 read_resources bus 0 link: 0
1103 12:17:25.260169 PCI: 00:15.0 read_resources bus 0 link: 0 done
1104 12:17:25.263145 PCI: 00:15.1 read_resources bus 0 link: 0
1105 12:17:25.269696 PCI: 00:15.1 read_resources bus 0 link: 0 done
1106 12:17:25.272969 PCI: 00:19.1 read_resources bus 0 link: 0
1107 12:17:25.280178 PCI: 00:19.1 read_resources bus 0 link: 0 done
1108 12:17:25.283119 PCI: 00:1d.0 read_resources bus 1 link: 0
1109 12:17:25.290365 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1110 12:17:25.293239 PCI: 00:1e.2 read_resources bus 2 link: 0
1111 12:17:25.300426 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1112 12:17:25.303716 PCI: 00:1e.3 read_resources bus 3 link: 0
1113 12:17:25.310196 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1114 12:17:25.313524 PCI: 00:1f.0 read_resources bus 0 link: 0
1115 12:17:25.320426 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1116 12:17:25.323337 PCI: 00:1f.2 read_resources bus 0 link: 0
1117 12:17:25.326288 GENERIC: 0.0 read_resources bus 0 link: 0
1118 12:17:25.334337 GENERIC: 0.0 read_resources bus 0 link: 0 done
1119 12:17:25.337114 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1120 12:17:25.344189 DOMAIN: 0000 read_resources bus 0 link: 0 done
1121 12:17:25.347272 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1122 12:17:25.354176 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1123 12:17:25.357550 Root Device read_resources bus 0 link: 0 done
1124 12:17:25.360658 Done reading resources.
1125 12:17:25.367210 Show resources in subtree (Root Device)...After reading.
1126 12:17:25.370403 Root Device child on link 0 DOMAIN: 0000
1127 12:17:25.373892 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1128 12:17:25.383999 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1129 12:17:25.394191 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1130 12:17:25.397654 PCI: 00:00.0
1131 12:17:25.406969 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1132 12:17:25.413679 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1133 12:17:25.423581 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1134 12:17:25.433932 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1135 12:17:25.443476 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1136 12:17:25.453832 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1137 12:17:25.463918 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1138 12:17:25.470544 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1139 12:17:25.480501 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1140 12:17:25.490195 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1141 12:17:25.499847 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1142 12:17:25.510238 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1143 12:17:25.516366 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1144 12:17:25.526377 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1145 12:17:25.536645 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1146 12:17:25.546473 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1147 12:17:25.556590 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1148 12:17:25.566739 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1149 12:17:25.573102 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1150 12:17:25.583027 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1151 12:17:25.586248 PCI: 00:02.0
1152 12:17:25.596051 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1153 12:17:25.606231 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1154 12:17:25.615772 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1155 12:17:25.619332 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1156 12:17:25.629766 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1157 12:17:25.633043 GENERIC: 0.0
1158 12:17:25.633587 PCI: 00:05.0
1159 12:17:25.642695 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1160 12:17:25.649449 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1161 12:17:25.649920 GENERIC: 0.0
1162 12:17:25.652435 PCI: 00:08.0
1163 12:17:25.662713 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 12:17:25.663271 PCI: 00:0a.0
1165 12:17:25.665966 PCI: 00:0d.0 child on link 0 USB0 port 0
1166 12:17:25.675771 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1167 12:17:25.682341 USB0 port 0 child on link 0 USB3 port 0
1168 12:17:25.682931 USB3 port 0
1169 12:17:25.685656 USB3 port 1
1170 12:17:25.686277 USB3 port 2
1171 12:17:25.689179 USB3 port 3
1172 12:17:25.692372 PCI: 00:14.0 child on link 0 USB0 port 0
1173 12:17:25.701820 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1174 12:17:25.708630 USB0 port 0 child on link 0 USB2 port 0
1175 12:17:25.709192 USB2 port 0
1176 12:17:25.711860 USB2 port 1
1177 12:17:25.712307 USB2 port 2
1178 12:17:25.715086 USB2 port 3
1179 12:17:25.715535 USB2 port 4
1180 12:17:25.718359 USB2 port 5
1181 12:17:25.718806 USB2 port 6
1182 12:17:25.721924 USB2 port 7
1183 12:17:25.722409 USB2 port 8
1184 12:17:25.725495 USB2 port 9
1185 12:17:25.728339 USB3 port 0
1186 12:17:25.728787 USB3 port 1
1187 12:17:25.732225 USB3 port 2
1188 12:17:25.732671 USB3 port 3
1189 12:17:25.734880 PCI: 00:14.2
1190 12:17:25.745147 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1191 12:17:25.755026 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 12:17:25.757939 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1193 12:17:25.768114 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1194 12:17:25.771572 GENERIC: 0.0
1195 12:17:25.774689 PCI: 00:15.0 child on link 0 I2C: 00:1a
1196 12:17:25.784963 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 12:17:25.785507 I2C: 00:1a
1198 12:17:25.788092 I2C: 00:31
1199 12:17:25.788647 I2C: 00:32
1200 12:17:25.794679 PCI: 00:15.1 child on link 0 I2C: 00:10
1201 12:17:25.804186 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 12:17:25.804767 I2C: 00:10
1203 12:17:25.808070 PCI: 00:15.2
1204 12:17:25.817321 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1205 12:17:25.817843 PCI: 00:15.3
1206 12:17:25.828029 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1207 12:17:25.831120 PCI: 00:16.0
1208 12:17:25.840621 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1209 12:17:25.841207 PCI: 00:19.0
1210 12:17:25.844487 PCI: 00:19.1 child on link 0 I2C: 00:15
1211 12:17:25.854222 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1212 12:17:25.856999 I2C: 00:15
1213 12:17:25.860197 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1214 12:17:25.870192 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1215 12:17:25.880627 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1216 12:17:25.890362 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1217 12:17:25.890983 GENERIC: 0.0
1218 12:17:25.893594 PCI: 01:00.0
1219 12:17:25.903235 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 12:17:25.913504 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1221 12:17:25.914124 PCI: 00:1e.0
1222 12:17:25.927098 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1223 12:17:25.930273 PCI: 00:1e.2 child on link 0 SPI: 00
1224 12:17:25.939576 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1225 12:17:25.940160 SPI: 00
1226 12:17:25.943540 PCI: 00:1e.3 child on link 0 SPI: 00
1227 12:17:25.953106 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1228 12:17:25.956388 SPI: 00
1229 12:17:25.959520 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1230 12:17:25.969609 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1231 12:17:25.970060 PNP: 0c09.0
1232 12:17:25.979532 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1233 12:17:25.982753 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1234 12:17:25.992957 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1235 12:17:26.002813 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1236 12:17:26.005840 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1237 12:17:26.009222 GENERIC: 0.0
1238 12:17:26.009719 GENERIC: 1.0
1239 12:17:26.012507 PCI: 00:1f.3
1240 12:17:26.022761 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1241 12:17:26.033026 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1242 12:17:26.033631 PCI: 00:1f.5
1243 12:17:26.042682 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1244 12:17:26.045720 CPU_CLUSTER: 0 child on link 0 APIC: 00
1245 12:17:26.049609 APIC: 00
1246 12:17:26.050258 APIC: 01
1247 12:17:26.052371 APIC: 05
1248 12:17:26.052939 APIC: 07
1249 12:17:26.053491 APIC: 02
1250 12:17:26.055492 APIC: 04
1251 12:17:26.056002 APIC: 06
1252 12:17:26.059013 APIC: 03
1253 12:17:26.065813 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1254 12:17:26.072178 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1255 12:17:26.079188 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1256 12:17:26.082188 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1257 12:17:26.089177 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1258 12:17:26.092109 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1259 12:17:26.098373 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1260 12:17:26.105932 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1261 12:17:26.115589 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1262 12:17:26.122207 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1263 12:17:26.129069 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1264 12:17:26.135269 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1265 12:17:26.141876 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1266 12:17:26.148175 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1267 12:17:26.151621 DOMAIN: 0000: Resource ranges:
1268 12:17:26.158439 * Base: 1000, Size: 800, Tag: 100
1269 12:17:26.161733 * Base: 1900, Size: e700, Tag: 100
1270 12:17:26.164832 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1271 12:17:26.171357 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1272 12:17:26.178274 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1273 12:17:26.188291 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1274 12:17:26.194387 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1275 12:17:26.201661 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1276 12:17:26.211162 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1277 12:17:26.217921 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1278 12:17:26.224843 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1279 12:17:26.234300 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1280 12:17:26.240976 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1281 12:17:26.247533 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1282 12:17:26.258102 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1283 12:17:26.264670 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1284 12:17:26.270728 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1285 12:17:26.281036 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1286 12:17:26.287830 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1287 12:17:26.294092 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1288 12:17:26.300825 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1289 12:17:26.310735 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1290 12:17:26.317348 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1291 12:17:26.327688 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1292 12:17:26.334359 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1293 12:17:26.340635 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1294 12:17:26.347217 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1295 12:17:26.350878 DOMAIN: 0000: Resource ranges:
1296 12:17:26.357531 * Base: 7fc00000, Size: 40400000, Tag: 200
1297 12:17:26.360715 * Base: d0000000, Size: 28000000, Tag: 200
1298 12:17:26.363952 * Base: fa000000, Size: 1000000, Tag: 200
1299 12:17:26.370374 * Base: fb001000, Size: 2fff000, Tag: 200
1300 12:17:26.373923 * Base: fe010000, Size: 2e000, Tag: 200
1301 12:17:26.377021 * Base: fe03f000, Size: d41000, Tag: 200
1302 12:17:26.380635 * Base: fed88000, Size: 8000, Tag: 200
1303 12:17:26.386643 * Base: fed93000, Size: d000, Tag: 200
1304 12:17:26.390594 * Base: feda2000, Size: 1e000, Tag: 200
1305 12:17:26.393494 * Base: fede0000, Size: 1220000, Tag: 200
1306 12:17:26.400415 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1307 12:17:26.406634 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1308 12:17:26.413392 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1309 12:17:26.420215 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1310 12:17:26.426697 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1311 12:17:26.433414 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1312 12:17:26.439797 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1313 12:17:26.446923 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1314 12:17:26.453470 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1315 12:17:26.459827 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1316 12:17:26.466280 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1317 12:17:26.473407 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1318 12:17:26.479422 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1319 12:17:26.486516 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1320 12:17:26.492778 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1321 12:17:26.499198 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1322 12:17:26.505989 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1323 12:17:26.512541 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1324 12:17:26.519405 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1325 12:17:26.526340 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1326 12:17:26.532702 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1327 12:17:26.539020 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1328 12:17:26.545719 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1329 12:17:26.552157 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1330 12:17:26.559575 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1331 12:17:26.562943 PCI: 00:1d.0: Resource ranges:
1332 12:17:26.569405 * Base: 7fc00000, Size: 100000, Tag: 200
1333 12:17:26.575816 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1334 12:17:26.582636 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1335 12:17:26.588582 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1336 12:17:26.595309 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1337 12:17:26.602509 Root Device assign_resources, bus 0 link: 0
1338 12:17:26.605425 DOMAIN: 0000 assign_resources, bus 0 link: 0
1339 12:17:26.615571 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1340 12:17:26.622087 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1341 12:17:26.631763 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1342 12:17:26.638759 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1343 12:17:26.641970 PCI: 00:04.0 assign_resources, bus 1 link: 0
1344 12:17:26.648886 PCI: 00:04.0 assign_resources, bus 1 link: 0
1345 12:17:26.655554 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1346 12:17:26.665304 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1347 12:17:26.671804 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1348 12:17:26.677981 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1349 12:17:26.681960 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1350 12:17:26.691749 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1351 12:17:26.694837 PCI: 00:14.0 assign_resources, bus 0 link: 0
1352 12:17:26.697987 PCI: 00:14.0 assign_resources, bus 0 link: 0
1353 12:17:26.708346 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1354 12:17:26.714880 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1355 12:17:26.724538 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1356 12:17:26.727699 PCI: 00:14.3 assign_resources, bus 0 link: 0
1357 12:17:26.731224 PCI: 00:14.3 assign_resources, bus 0 link: 0
1358 12:17:26.741347 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1359 12:17:26.744398 PCI: 00:15.0 assign_resources, bus 0 link: 0
1360 12:17:26.750903 PCI: 00:15.0 assign_resources, bus 0 link: 0
1361 12:17:26.758140 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1362 12:17:26.764520 PCI: 00:15.1 assign_resources, bus 0 link: 0
1363 12:17:26.767554 PCI: 00:15.1 assign_resources, bus 0 link: 0
1364 12:17:26.774397 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1365 12:17:26.784569 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1366 12:17:26.790753 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1367 12:17:26.801336 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1368 12:17:26.804475 PCI: 00:19.1 assign_resources, bus 0 link: 0
1369 12:17:26.811005 PCI: 00:19.1 assign_resources, bus 0 link: 0
1370 12:17:26.817606 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1371 12:17:26.827797 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1372 12:17:26.837368 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1373 12:17:26.840535 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1374 12:17:26.850449 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1375 12:17:26.856733 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1376 12:17:26.863889 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1377 12:17:26.869964 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1378 12:17:26.876864 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1379 12:17:26.880093 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1380 12:17:26.887164 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1381 12:17:26.893357 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1382 12:17:26.896489 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1383 12:17:26.903175 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1384 12:17:26.906334 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1385 12:17:26.913220 LPC: Trying to open IO window from 800 size 1ff
1386 12:17:26.919374 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1387 12:17:26.929510 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1388 12:17:26.936087 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1389 12:17:26.939172 DOMAIN: 0000 assign_resources, bus 0 link: 0
1390 12:17:26.946279 Root Device assign_resources, bus 0 link: 0
1391 12:17:26.949136 Done setting resources.
1392 12:17:26.955846 Show resources in subtree (Root Device)...After assigning values.
1393 12:17:26.959409 Root Device child on link 0 DOMAIN: 0000
1394 12:17:26.962598 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1395 12:17:26.972406 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1396 12:17:26.982586 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1397 12:17:26.982696 PCI: 00:00.0
1398 12:17:26.992452 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1399 12:17:27.002151 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1400 12:17:27.012609 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1401 12:17:27.021989 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1402 12:17:27.032192 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1403 12:17:27.038909 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1404 12:17:27.048638 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1405 12:17:27.058938 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1406 12:17:27.068549 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1407 12:17:27.078774 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1408 12:17:27.088412 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1409 12:17:27.094896 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1410 12:17:27.105287 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1411 12:17:27.115322 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1412 12:17:27.125247 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1413 12:17:27.134771 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1414 12:17:27.144923 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1415 12:17:27.154554 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1416 12:17:27.161448 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1417 12:17:27.171825 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1418 12:17:27.174582 PCI: 00:02.0
1419 12:17:27.184819 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1420 12:17:27.194689 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1421 12:17:27.204216 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1422 12:17:27.208199 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1423 12:17:27.221324 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1424 12:17:27.221869 GENERIC: 0.0
1425 12:17:27.224509 PCI: 00:05.0
1426 12:17:27.234500 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1427 12:17:27.238135 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1428 12:17:27.240965 GENERIC: 0.0
1429 12:17:27.241458 PCI: 00:08.0
1430 12:17:27.250976 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1431 12:17:27.254620 PCI: 00:0a.0
1432 12:17:27.257725 PCI: 00:0d.0 child on link 0 USB0 port 0
1433 12:17:27.267625 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1434 12:17:27.274107 USB0 port 0 child on link 0 USB3 port 0
1435 12:17:27.274608 USB3 port 0
1436 12:17:27.278155 USB3 port 1
1437 12:17:27.278759 USB3 port 2
1438 12:17:27.281461 USB3 port 3
1439 12:17:27.283976 PCI: 00:14.0 child on link 0 USB0 port 0
1440 12:17:27.294130 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1441 12:17:27.297689 USB0 port 0 child on link 0 USB2 port 0
1442 12:17:27.301129 USB2 port 0
1443 12:17:27.304189 USB2 port 1
1444 12:17:27.304679 USB2 port 2
1445 12:17:27.307269 USB2 port 3
1446 12:17:27.307759 USB2 port 4
1447 12:17:27.310917 USB2 port 5
1448 12:17:27.311429 USB2 port 6
1449 12:17:27.314487 USB2 port 7
1450 12:17:27.314933 USB2 port 8
1451 12:17:27.317520 USB2 port 9
1452 12:17:27.317958 USB3 port 0
1453 12:17:27.321040 USB3 port 1
1454 12:17:27.321581 USB3 port 2
1455 12:17:27.324258 USB3 port 3
1456 12:17:27.324857 PCI: 00:14.2
1457 12:17:27.337897 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1458 12:17:27.347466 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1459 12:17:27.350359 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1460 12:17:27.360708 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1461 12:17:27.364304 GENERIC: 0.0
1462 12:17:27.367226 PCI: 00:15.0 child on link 0 I2C: 00:1a
1463 12:17:27.377295 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1464 12:17:27.380425 I2C: 00:1a
1465 12:17:27.381007 I2C: 00:31
1466 12:17:27.381394 I2C: 00:32
1467 12:17:27.387130 PCI: 00:15.1 child on link 0 I2C: 00:10
1468 12:17:27.396836 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1469 12:17:27.397415 I2C: 00:10
1470 12:17:27.400522 PCI: 00:15.2
1471 12:17:27.410176 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1472 12:17:27.413375 PCI: 00:15.3
1473 12:17:27.423570 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1474 12:17:27.424173 PCI: 00:16.0
1475 12:17:27.433558 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1476 12:17:27.436847 PCI: 00:19.0
1477 12:17:27.439679 PCI: 00:19.1 child on link 0 I2C: 00:15
1478 12:17:27.449598 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1479 12:17:27.453024 I2C: 00:15
1480 12:17:27.456291 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1481 12:17:27.466322 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1482 12:17:27.476085 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1483 12:17:27.489396 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1484 12:17:27.490010 GENERIC: 0.0
1485 12:17:27.492550 PCI: 01:00.0
1486 12:17:27.502809 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1487 12:17:27.512693 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1488 12:17:27.513161 PCI: 00:1e.0
1489 12:17:27.526468 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1490 12:17:27.529791 PCI: 00:1e.2 child on link 0 SPI: 00
1491 12:17:27.539129 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1492 12:17:27.539723 SPI: 00
1493 12:17:27.546298 PCI: 00:1e.3 child on link 0 SPI: 00
1494 12:17:27.556169 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1495 12:17:27.556774 SPI: 00
1496 12:17:27.559065 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1497 12:17:27.568771 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1498 12:17:27.572465 PNP: 0c09.0
1499 12:17:27.579509 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1500 12:17:27.585566 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1501 12:17:27.592264 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1502 12:17:27.602050 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1503 12:17:27.609037 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1504 12:17:27.609511 GENERIC: 0.0
1505 12:17:27.612147 GENERIC: 1.0
1506 12:17:27.612616 PCI: 00:1f.3
1507 12:17:27.621604 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1508 12:17:27.631935 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1509 12:17:27.635879 PCI: 00:1f.5
1510 12:17:27.645438 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1511 12:17:27.648539 CPU_CLUSTER: 0 child on link 0 APIC: 00
1512 12:17:27.651611 APIC: 00
1513 12:17:27.652234 APIC: 01
1514 12:17:27.652607 APIC: 05
1515 12:17:27.655915 APIC: 07
1516 12:17:27.656472 APIC: 02
1517 12:17:27.658794 APIC: 04
1518 12:17:27.659427 APIC: 06
1519 12:17:27.659809 APIC: 03
1520 12:17:27.662287 Done allocating resources.
1521 12:17:27.668638 BS: BS_DEV_RESOURCES run times (exec / console): 26 / 2475 ms
1522 12:17:27.675305 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1523 12:17:27.678474 Configure GPIOs for I2S audio on UP4.
1524 12:17:27.685202 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1525 12:17:27.688187 Enabling resources...
1526 12:17:27.691328 PCI: 00:00.0 subsystem <- 8086/9a12
1527 12:17:27.695281 PCI: 00:00.0 cmd <- 06
1528 12:17:27.698393 PCI: 00:02.0 subsystem <- 8086/9a40
1529 12:17:27.701192 PCI: 00:02.0 cmd <- 03
1530 12:17:27.704887 PCI: 00:04.0 subsystem <- 8086/9a03
1531 12:17:27.705339 PCI: 00:04.0 cmd <- 02
1532 12:17:27.711493 PCI: 00:05.0 subsystem <- 8086/9a19
1533 12:17:27.711971 PCI: 00:05.0 cmd <- 02
1534 12:17:27.715020 PCI: 00:08.0 subsystem <- 8086/9a11
1535 12:17:27.718185 PCI: 00:08.0 cmd <- 06
1536 12:17:27.721462 PCI: 00:0d.0 subsystem <- 8086/9a13
1537 12:17:27.724867 PCI: 00:0d.0 cmd <- 02
1538 12:17:27.728732 PCI: 00:14.0 subsystem <- 8086/a0ed
1539 12:17:27.731736 PCI: 00:14.0 cmd <- 02
1540 12:17:27.734984 PCI: 00:14.2 subsystem <- 8086/a0ef
1541 12:17:27.738207 PCI: 00:14.2 cmd <- 02
1542 12:17:27.741416 PCI: 00:14.3 subsystem <- 8086/a0f0
1543 12:17:27.744524 PCI: 00:14.3 cmd <- 02
1544 12:17:27.747991 PCI: 00:15.0 subsystem <- 8086/a0e8
1545 12:17:27.751583 PCI: 00:15.0 cmd <- 02
1546 12:17:27.754682 PCI: 00:15.1 subsystem <- 8086/a0e9
1547 12:17:27.755175 PCI: 00:15.1 cmd <- 02
1548 12:17:27.761299 PCI: 00:15.2 subsystem <- 8086/a0ea
1549 12:17:27.761898 PCI: 00:15.2 cmd <- 02
1550 12:17:27.764640 PCI: 00:15.3 subsystem <- 8086/a0eb
1551 12:17:27.768340 PCI: 00:15.3 cmd <- 02
1552 12:17:27.770947 PCI: 00:16.0 subsystem <- 8086/a0e0
1553 12:17:27.774313 PCI: 00:16.0 cmd <- 02
1554 12:17:27.778130 PCI: 00:19.1 subsystem <- 8086/a0c6
1555 12:17:27.781718 PCI: 00:19.1 cmd <- 02
1556 12:17:27.784345 PCI: 00:1d.0 bridge ctrl <- 0013
1557 12:17:27.787770 PCI: 00:1d.0 subsystem <- 8086/a0b0
1558 12:17:27.790704 PCI: 00:1d.0 cmd <- 06
1559 12:17:27.794040 PCI: 00:1e.0 subsystem <- 8086/a0a8
1560 12:17:27.797244 PCI: 00:1e.0 cmd <- 06
1561 12:17:27.800621 PCI: 00:1e.2 subsystem <- 8086/a0aa
1562 12:17:27.803904 PCI: 00:1e.2 cmd <- 06
1563 12:17:27.807074 PCI: 00:1e.3 subsystem <- 8086/a0ab
1564 12:17:27.807535 PCI: 00:1e.3 cmd <- 02
1565 12:17:27.814127 PCI: 00:1f.0 subsystem <- 8086/a087
1566 12:17:27.814570 PCI: 00:1f.0 cmd <- 407
1567 12:17:27.817786 PCI: 00:1f.3 subsystem <- 8086/a0c8
1568 12:17:27.821123 PCI: 00:1f.3 cmd <- 02
1569 12:17:27.824006 PCI: 00:1f.5 subsystem <- 8086/a0a4
1570 12:17:27.827225 PCI: 00:1f.5 cmd <- 406
1571 12:17:27.831976 PCI: 01:00.0 cmd <- 02
1572 12:17:27.836242 done.
1573 12:17:27.839567 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1574 12:17:27.842731 Initializing devices...
1575 12:17:27.846016 Root Device init
1576 12:17:27.849843 Chrome EC: Set SMI mask to 0x0000000000000000
1577 12:17:27.856440 Chrome EC: clear events_b mask to 0x0000000000000000
1578 12:17:27.862879 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1579 12:17:27.866195 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1580 12:17:27.872842 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1581 12:17:27.879170 Chrome EC: Set WAKE mask to 0x0000000000000000
1582 12:17:27.882471 fw_config match found: DB_USB=USB3_ACTIVE
1583 12:17:27.889369 Configure Right Type-C port orientation for retimer
1584 12:17:27.892719 Root Device init finished in 43 msecs
1585 12:17:27.895973 PCI: 00:00.0 init
1586 12:17:27.899052 CPU TDP = 9 Watts
1587 12:17:27.899513 CPU PL1 = 9 Watts
1588 12:17:27.902835 CPU PL2 = 40 Watts
1589 12:17:27.903293 CPU PL4 = 83 Watts
1590 12:17:27.908732 PCI: 00:00.0 init finished in 8 msecs
1591 12:17:27.909184 PCI: 00:02.0 init
1592 12:17:27.912627 GMA: Found VBT in CBFS
1593 12:17:27.915908 GMA: Found valid VBT in CBFS
1594 12:17:27.922484 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1595 12:17:27.928621 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1596 12:17:27.932344 PCI: 00:02.0 init finished in 18 msecs
1597 12:17:27.935657 PCI: 00:05.0 init
1598 12:17:27.938574 PCI: 00:05.0 init finished in 0 msecs
1599 12:17:27.941650 PCI: 00:08.0 init
1600 12:17:27.945288 PCI: 00:08.0 init finished in 0 msecs
1601 12:17:27.948288 PCI: 00:14.0 init
1602 12:17:27.951482 PCI: 00:14.0 init finished in 0 msecs
1603 12:17:27.954758 PCI: 00:14.2 init
1604 12:17:27.958046 PCI: 00:14.2 init finished in 0 msecs
1605 12:17:27.958158 PCI: 00:15.0 init
1606 12:17:27.961775 I2C bus 0 version 0x3230302a
1607 12:17:27.964874 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1608 12:17:27.971506 PCI: 00:15.0 init finished in 6 msecs
1609 12:17:27.971620 PCI: 00:15.1 init
1610 12:17:27.974761 I2C bus 1 version 0x3230302a
1611 12:17:27.977823 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1612 12:17:27.981541 PCI: 00:15.1 init finished in 6 msecs
1613 12:17:27.984680 PCI: 00:15.2 init
1614 12:17:27.988033 I2C bus 2 version 0x3230302a
1615 12:17:27.991981 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1616 12:17:27.994610 PCI: 00:15.2 init finished in 6 msecs
1617 12:17:27.998553 PCI: 00:15.3 init
1618 12:17:28.001176 I2C bus 3 version 0x3230302a
1619 12:17:28.004649 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1620 12:17:28.008364 PCI: 00:15.3 init finished in 6 msecs
1621 12:17:28.011260 PCI: 00:16.0 init
1622 12:17:28.015014 PCI: 00:16.0 init finished in 0 msecs
1623 12:17:28.017943 PCI: 00:19.1 init
1624 12:17:28.018057 I2C bus 5 version 0x3230302a
1625 12:17:28.024680 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1626 12:17:28.027709 PCI: 00:19.1 init finished in 6 msecs
1627 12:17:28.027833 PCI: 00:1d.0 init
1628 12:17:28.031377 Initializing PCH PCIe bridge.
1629 12:17:28.034350 PCI: 00:1d.0 init finished in 3 msecs
1630 12:17:28.038702 PCI: 00:1f.0 init
1631 12:17:28.041941 IOAPIC: Initializing IOAPIC at 0xfec00000
1632 12:17:28.048994 IOAPIC: Bootstrap Processor Local APIC = 0x00
1633 12:17:28.049150 IOAPIC: ID = 0x02
1634 12:17:28.052086 IOAPIC: Dumping registers
1635 12:17:28.055368 reg 0x0000: 0x02000000
1636 12:17:28.058759 reg 0x0001: 0x00770020
1637 12:17:28.058855 reg 0x0002: 0x00000000
1638 12:17:28.065545 PCI: 00:1f.0 init finished in 21 msecs
1639 12:17:28.065666 PCI: 00:1f.2 init
1640 12:17:28.068338 Disabling ACPI via APMC.
1641 12:17:28.073582 APMC done.
1642 12:17:28.076836 PCI: 00:1f.2 init finished in 6 msecs
1643 12:17:28.088966 PCI: 01:00.0 init
1644 12:17:28.091457 PCI: 01:00.0 init finished in 0 msecs
1645 12:17:28.095460 PNP: 0c09.0 init
1646 12:17:28.102249 Google Chrome EC uptime: 8.295 seconds
1647 12:17:28.105246 Google Chrome AP resets since EC boot: 1
1648 12:17:28.108650 Google Chrome most recent AP reset causes:
1649 12:17:28.111769 0.453: 32775 shutdown: entering G3
1650 12:17:28.118443 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1651 12:17:28.121499 PNP: 0c09.0 init finished in 23 msecs
1652 12:17:28.128319 Devices initialized
1653 12:17:28.131897 Show all devs... After init.
1654 12:17:28.134900 Root Device: enabled 1
1655 12:17:28.134997 DOMAIN: 0000: enabled 1
1656 12:17:28.137986 CPU_CLUSTER: 0: enabled 1
1657 12:17:28.141539 PCI: 00:00.0: enabled 1
1658 12:17:28.144984 PCI: 00:02.0: enabled 1
1659 12:17:28.145117 PCI: 00:04.0: enabled 1
1660 12:17:28.148343 PCI: 00:05.0: enabled 1
1661 12:17:28.151322 PCI: 00:06.0: enabled 0
1662 12:17:28.154623 PCI: 00:07.0: enabled 0
1663 12:17:28.154720 PCI: 00:07.1: enabled 0
1664 12:17:28.157814 PCI: 00:07.2: enabled 0
1665 12:17:28.161629 PCI: 00:07.3: enabled 0
1666 12:17:28.164832 PCI: 00:08.0: enabled 1
1667 12:17:28.164965 PCI: 00:09.0: enabled 0
1668 12:17:28.167891 PCI: 00:0a.0: enabled 0
1669 12:17:28.170960 PCI: 00:0d.0: enabled 1
1670 12:17:28.174493 PCI: 00:0d.1: enabled 0
1671 12:17:28.174594 PCI: 00:0d.2: enabled 0
1672 12:17:28.178038 PCI: 00:0d.3: enabled 0
1673 12:17:28.181506 PCI: 00:0e.0: enabled 0
1674 12:17:28.184666 PCI: 00:10.2: enabled 1
1675 12:17:28.184757 PCI: 00:10.6: enabled 0
1676 12:17:28.188033 PCI: 00:10.7: enabled 0
1677 12:17:28.190963 PCI: 00:12.0: enabled 0
1678 12:17:28.191056 PCI: 00:12.6: enabled 0
1679 12:17:28.194282 PCI: 00:13.0: enabled 0
1680 12:17:28.197495 PCI: 00:14.0: enabled 1
1681 12:17:28.200790 PCI: 00:14.1: enabled 0
1682 12:17:28.200881 PCI: 00:14.2: enabled 1
1683 12:17:28.204198 PCI: 00:14.3: enabled 1
1684 12:17:28.208004 PCI: 00:15.0: enabled 1
1685 12:17:28.210740 PCI: 00:15.1: enabled 1
1686 12:17:28.210838 PCI: 00:15.2: enabled 1
1687 12:17:28.214393 PCI: 00:15.3: enabled 1
1688 12:17:28.217851 PCI: 00:16.0: enabled 1
1689 12:17:28.220979 PCI: 00:16.1: enabled 0
1690 12:17:28.221114 PCI: 00:16.2: enabled 0
1691 12:17:28.223876 PCI: 00:16.3: enabled 0
1692 12:17:28.227762 PCI: 00:16.4: enabled 0
1693 12:17:28.227855 PCI: 00:16.5: enabled 0
1694 12:17:28.230631 PCI: 00:17.0: enabled 0
1695 12:17:28.234337 PCI: 00:19.0: enabled 0
1696 12:17:28.237454 PCI: 00:19.1: enabled 1
1697 12:17:28.237550 PCI: 00:19.2: enabled 0
1698 12:17:28.240770 PCI: 00:1c.0: enabled 1
1699 12:17:28.244347 PCI: 00:1c.1: enabled 0
1700 12:17:28.247329 PCI: 00:1c.2: enabled 0
1701 12:17:28.247418 PCI: 00:1c.3: enabled 0
1702 12:17:28.250968 PCI: 00:1c.4: enabled 0
1703 12:17:28.254188 PCI: 00:1c.5: enabled 0
1704 12:17:28.257378 PCI: 00:1c.6: enabled 1
1705 12:17:28.257456 PCI: 00:1c.7: enabled 0
1706 12:17:28.260747 PCI: 00:1d.0: enabled 1
1707 12:17:28.263905 PCI: 00:1d.1: enabled 0
1708 12:17:28.267105 PCI: 00:1d.2: enabled 1
1709 12:17:28.267217 PCI: 00:1d.3: enabled 0
1710 12:17:28.270854 PCI: 00:1e.0: enabled 1
1711 12:17:28.274482 PCI: 00:1e.1: enabled 0
1712 12:17:28.274649 PCI: 00:1e.2: enabled 1
1713 12:17:28.277466 PCI: 00:1e.3: enabled 1
1714 12:17:28.280909 PCI: 00:1f.0: enabled 1
1715 12:17:28.283915 PCI: 00:1f.1: enabled 0
1716 12:17:28.284047 PCI: 00:1f.2: enabled 1
1717 12:17:28.287498 PCI: 00:1f.3: enabled 1
1718 12:17:28.290676 PCI: 00:1f.4: enabled 0
1719 12:17:28.293849 PCI: 00:1f.5: enabled 1
1720 12:17:28.294014 PCI: 00:1f.6: enabled 0
1721 12:17:28.297736 PCI: 00:1f.7: enabled 0
1722 12:17:28.300783 APIC: 00: enabled 1
1723 12:17:28.300913 GENERIC: 0.0: enabled 1
1724 12:17:28.304066 GENERIC: 0.0: enabled 1
1725 12:17:28.307312 GENERIC: 1.0: enabled 1
1726 12:17:28.310568 GENERIC: 0.0: enabled 1
1727 12:17:28.310754 GENERIC: 1.0: enabled 1
1728 12:17:28.313956 USB0 port 0: enabled 1
1729 12:17:28.317309 GENERIC: 0.0: enabled 1
1730 12:17:28.320795 USB0 port 0: enabled 1
1731 12:17:28.320996 GENERIC: 0.0: enabled 1
1732 12:17:28.323819 I2C: 00:1a: enabled 1
1733 12:17:28.327364 I2C: 00:31: enabled 1
1734 12:17:28.327583 I2C: 00:32: enabled 1
1735 12:17:28.330689 I2C: 00:10: enabled 1
1736 12:17:28.334546 I2C: 00:15: enabled 1
1737 12:17:28.334769 GENERIC: 0.0: enabled 0
1738 12:17:28.337464 GENERIC: 1.0: enabled 0
1739 12:17:28.340301 GENERIC: 0.0: enabled 1
1740 12:17:28.340540 SPI: 00: enabled 1
1741 12:17:28.343617 SPI: 00: enabled 1
1742 12:17:28.347088 PNP: 0c09.0: enabled 1
1743 12:17:28.347342 GENERIC: 0.0: enabled 1
1744 12:17:28.350453 USB3 port 0: enabled 1
1745 12:17:28.353523 USB3 port 1: enabled 1
1746 12:17:28.356944 USB3 port 2: enabled 0
1747 12:17:28.357264 USB3 port 3: enabled 0
1748 12:17:28.361127 USB2 port 0: enabled 0
1749 12:17:28.364220 USB2 port 1: enabled 1
1750 12:17:28.364645 USB2 port 2: enabled 1
1751 12:17:28.367155 USB2 port 3: enabled 0
1752 12:17:28.370548 USB2 port 4: enabled 1
1753 12:17:28.374503 USB2 port 5: enabled 0
1754 12:17:28.375071 USB2 port 6: enabled 0
1755 12:17:28.377326 USB2 port 7: enabled 0
1756 12:17:28.380766 USB2 port 8: enabled 0
1757 12:17:28.381376 USB2 port 9: enabled 0
1758 12:17:28.383875 USB3 port 0: enabled 0
1759 12:17:28.387433 USB3 port 1: enabled 1
1760 12:17:28.387983 USB3 port 2: enabled 0
1761 12:17:28.390551 USB3 port 3: enabled 0
1762 12:17:28.393896 GENERIC: 0.0: enabled 1
1763 12:17:28.396864 GENERIC: 1.0: enabled 1
1764 12:17:28.397345 APIC: 01: enabled 1
1765 12:17:28.400151 APIC: 05: enabled 1
1766 12:17:28.400612 APIC: 07: enabled 1
1767 12:17:28.403938 APIC: 02: enabled 1
1768 12:17:28.407239 APIC: 04: enabled 1
1769 12:17:28.407684 APIC: 06: enabled 1
1770 12:17:28.410551 APIC: 03: enabled 1
1771 12:17:28.414035 PCI: 01:00.0: enabled 1
1772 12:17:28.417089 BS: BS_DEV_INIT run times (exec / console): 31 / 540 ms
1773 12:17:28.423667 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1774 12:17:28.427196 ELOG: NV offset 0xf30000 size 0x1000
1775 12:17:28.433656 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1776 12:17:28.440674 ELOG: Event(17) added with size 13 at 2023-03-22 12:17:28 UTC
1777 12:17:28.446856 ELOG: Event(92) added with size 9 at 2023-03-22 12:17:28 UTC
1778 12:17:28.453366 ELOG: Event(93) added with size 9 at 2023-03-22 12:17:28 UTC
1779 12:17:28.460238 ELOG: Event(9E) added with size 10 at 2023-03-22 12:17:28 UTC
1780 12:17:28.466865 ELOG: Event(9F) added with size 14 at 2023-03-22 12:17:28 UTC
1781 12:17:28.473131 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1782 12:17:28.479801 ELOG: Event(A1) added with size 10 at 2023-03-22 12:17:28 UTC
1783 12:17:28.486316 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1784 12:17:28.493173 ELOG: Event(A0) added with size 9 at 2023-03-22 12:17:28 UTC
1785 12:17:28.496480 elog_add_boot_reason: Logged dev mode boot
1786 12:17:28.502652 BS: BS_POST_DEVICE entry times (exec / console): 0 / 24 ms
1787 12:17:28.503242 Finalize devices...
1788 12:17:28.506454 Devices finalized
1789 12:17:28.512883 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1790 12:17:28.516320 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1791 12:17:28.522954 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1792 12:17:28.526160 ME: HFSTS1 : 0x80030055
1793 12:17:28.533041 ME: HFSTS2 : 0x30280116
1794 12:17:28.535935 ME: HFSTS3 : 0x00000050
1795 12:17:28.539104 ME: HFSTS4 : 0x00004000
1796 12:17:28.546367 ME: HFSTS5 : 0x00000000
1797 12:17:28.549656 ME: HFSTS6 : 0x40400006
1798 12:17:28.552716 ME: Manufacturing Mode : YES
1799 12:17:28.555925 ME: SPI Protection Mode Enabled : NO
1800 12:17:28.562851 ME: FW Partition Table : OK
1801 12:17:28.565671 ME: Bringup Loader Failure : NO
1802 12:17:28.569280 ME: Firmware Init Complete : NO
1803 12:17:28.572736 ME: Boot Options Present : NO
1804 12:17:28.575733 ME: Update In Progress : NO
1805 12:17:28.579167 ME: D0i3 Support : YES
1806 12:17:28.582487 ME: Low Power State Enabled : NO
1807 12:17:28.586120 ME: CPU Replaced : YES
1808 12:17:28.592410 ME: CPU Replacement Valid : YES
1809 12:17:28.595831 ME: Current Working State : 5
1810 12:17:28.599111 ME: Current Operation State : 1
1811 12:17:28.602453 ME: Current Operation Mode : 3
1812 12:17:28.605619 ME: Error Code : 0
1813 12:17:28.608821 ME: Enhanced Debug Mode : NO
1814 12:17:28.612481 ME: CPU Debug Disabled : YES
1815 12:17:28.615802 ME: TXT Support : NO
1816 12:17:28.622279 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1817 12:17:28.629116 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1818 12:17:28.632432 CBFS: 'fallback/slic' not found.
1819 12:17:28.639048 ACPI: Writing ACPI tables at 76b01000.
1820 12:17:28.639634 ACPI: * FACS
1821 12:17:28.642185 ACPI: * DSDT
1822 12:17:28.645861 Ramoops buffer: 0x100000@0x76a00000.
1823 12:17:28.649208 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1824 12:17:28.655529 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1825 12:17:28.658922 Google Chrome EC: version:
1826 12:17:28.662114 ro: voema_v2.0.10114-a447f03e46
1827 12:17:28.665132 rw: voema_v2.0.10132-7b2059e3bc
1828 12:17:28.665578 running image: 2
1829 12:17:28.672150 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1830 12:17:28.676970 ACPI: * FADT
1831 12:17:28.677415 SCI is IRQ9
1832 12:17:28.683795 ACPI: added table 1/32, length now 40
1833 12:17:28.684394 ACPI: * SSDT
1834 12:17:28.686667 Found 1 CPU(s) with 8 core(s) each.
1835 12:17:28.693345 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1836 12:17:28.696880 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1837 12:17:28.700506 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1838 12:17:28.703489 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1839 12:17:28.710182 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1840 12:17:28.716377 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1841 12:17:28.719695 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1842 12:17:28.726874 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1843 12:17:28.733664 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1844 12:17:28.736805 \_SB.PCI0.RP09: Added StorageD3Enable property
1845 12:17:28.742905 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1846 12:17:28.746163 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1847 12:17:28.752990 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1848 12:17:28.756327 PS2K: Passing 80 keymaps to kernel
1849 12:17:28.763219 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1850 12:17:28.770045 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1851 12:17:28.776691 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1852 12:17:28.783570 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1853 12:17:28.790179 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1854 12:17:28.796839 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1855 12:17:28.803215 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1856 12:17:28.809786 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1857 12:17:28.813217 ACPI: added table 2/32, length now 44
1858 12:17:28.816761 ACPI: * MCFG
1859 12:17:28.819767 ACPI: added table 3/32, length now 48
1860 12:17:28.820362 ACPI: * TPM2
1861 12:17:28.822889 TPM2 log created at 0x769f0000
1862 12:17:28.826165 ACPI: added table 4/32, length now 52
1863 12:17:28.829464 ACPI: * MADT
1864 12:17:28.830061 SCI is IRQ9
1865 12:17:28.833369 ACPI: added table 5/32, length now 56
1866 12:17:28.836601 current = 76b09850
1867 12:17:28.837270 ACPI: * DMAR
1868 12:17:28.842856 ACPI: added table 6/32, length now 60
1869 12:17:28.846053 ACPI: added table 7/32, length now 64
1870 12:17:28.846715 ACPI: * HPET
1871 12:17:28.849513 ACPI: added table 8/32, length now 68
1872 12:17:28.853151 ACPI: done.
1873 12:17:28.856128 ACPI tables: 35216 bytes.
1874 12:17:28.856575 smbios_write_tables: 769ef000
1875 12:17:28.860797 EC returned error result code 3
1876 12:17:28.864011 Couldn't obtain OEM name from CBI
1877 12:17:28.868123 Create SMBIOS type 16
1878 12:17:28.871276 Create SMBIOS type 17
1879 12:17:28.874547 GENERIC: 0.0 (WIFI Device)
1880 12:17:28.877844 SMBIOS tables: 1734 bytes.
1881 12:17:28.881014 Writing table forward entry at 0x00000500
1882 12:17:28.887587 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1883 12:17:28.891149 Writing coreboot table at 0x76b25000
1884 12:17:28.897702 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1885 12:17:28.900731 1. 0000000000001000-000000000009ffff: RAM
1886 12:17:28.904159 2. 00000000000a0000-00000000000fffff: RESERVED
1887 12:17:28.911009 3. 0000000000100000-00000000769eefff: RAM
1888 12:17:28.914281 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1889 12:17:28.920657 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1890 12:17:28.928048 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1891 12:17:28.931046 7. 0000000077000000-000000007fbfffff: RESERVED
1892 12:17:28.934015 8. 00000000c0000000-00000000cfffffff: RESERVED
1893 12:17:28.940437 9. 00000000f8000000-00000000f9ffffff: RESERVED
1894 12:17:28.944335 10. 00000000fb000000-00000000fb000fff: RESERVED
1895 12:17:28.950663 11. 00000000fe000000-00000000fe00ffff: RESERVED
1896 12:17:28.953961 12. 00000000fed80000-00000000fed87fff: RESERVED
1897 12:17:28.960403 13. 00000000fed90000-00000000fed92fff: RESERVED
1898 12:17:28.963687 14. 00000000feda0000-00000000feda1fff: RESERVED
1899 12:17:28.970437 15. 00000000fedc0000-00000000feddffff: RESERVED
1900 12:17:28.973961 16. 0000000100000000-00000004803fffff: RAM
1901 12:17:28.977499 Passing 4 GPIOs to payload:
1902 12:17:28.980768 NAME | PORT | POLARITY | VALUE
1903 12:17:28.987117 lid | undefined | high | high
1904 12:17:28.993854 power | undefined | high | low
1905 12:17:28.996978 oprom | undefined | high | low
1906 12:17:29.003655 EC in RW | 0x000000e5 | high | high
1907 12:17:29.010043 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 7e26
1908 12:17:29.013625 coreboot table: 1576 bytes.
1909 12:17:29.016675 IMD ROOT 0. 0x76fff000 0x00001000
1910 12:17:29.019707 IMD SMALL 1. 0x76ffe000 0x00001000
1911 12:17:29.023000 FSP MEMORY 2. 0x76c4e000 0x003b0000
1912 12:17:29.026661 VPD 3. 0x76c4d000 0x00000367
1913 12:17:29.029988 RO MCACHE 4. 0x76c4c000 0x00000fdc
1914 12:17:29.032937 CONSOLE 5. 0x76c2c000 0x00020000
1915 12:17:29.036168 FMAP 6. 0x76c2b000 0x00000578
1916 12:17:29.042595 TIME STAMP 7. 0x76c2a000 0x00000910
1917 12:17:29.046400 VBOOT WORK 8. 0x76c16000 0x00014000
1918 12:17:29.049538 ROMSTG STCK 9. 0x76c15000 0x00001000
1919 12:17:29.052769 AFTER CAR 10. 0x76c0a000 0x0000b000
1920 12:17:29.056220 RAMSTAGE 11. 0x76b97000 0x00073000
1921 12:17:29.059469 REFCODE 12. 0x76b42000 0x00055000
1922 12:17:29.062648 SMM BACKUP 13. 0x76b32000 0x00010000
1923 12:17:29.065825 4f444749 14. 0x76b30000 0x00002000
1924 12:17:29.069206 EXT VBT15. 0x76b2d000 0x0000219f
1925 12:17:29.075768 COREBOOT 16. 0x76b25000 0x00008000
1926 12:17:29.079024 ACPI 17. 0x76b01000 0x00024000
1927 12:17:29.082312 ACPI GNVS 18. 0x76b00000 0x00001000
1928 12:17:29.085476 RAMOOPS 19. 0x76a00000 0x00100000
1929 12:17:29.088724 TPM2 TCGLOG20. 0x769f0000 0x00010000
1930 12:17:29.092186 SMBIOS 21. 0x769ef000 0x00000800
1931 12:17:29.095796 IMD small region:
1932 12:17:29.099161 IMD ROOT 0. 0x76ffec00 0x00000400
1933 12:17:29.102371 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1934 12:17:29.105475 POWER STATE 2. 0x76ffeb80 0x00000044
1935 12:17:29.112325 ROMSTAGE 3. 0x76ffeb60 0x00000004
1936 12:17:29.115348 MEM INFO 4. 0x76ffe980 0x000001e0
1937 12:17:29.122329 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1938 12:17:29.122431 MTRR: Physical address space:
1939 12:17:29.128780 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1940 12:17:29.135156 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1941 12:17:29.141988 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1942 12:17:29.148324 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1943 12:17:29.154955 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1944 12:17:29.162085 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1945 12:17:29.168354 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1946 12:17:29.171628 MTRR: Fixed MSR 0x250 0x0606060606060606
1947 12:17:29.174914 MTRR: Fixed MSR 0x258 0x0606060606060606
1948 12:17:29.178192 MTRR: Fixed MSR 0x259 0x0000000000000000
1949 12:17:29.185119 MTRR: Fixed MSR 0x268 0x0606060606060606
1950 12:17:29.188363 MTRR: Fixed MSR 0x269 0x0606060606060606
1951 12:17:29.191680 MTRR: Fixed MSR 0x26a 0x0606060606060606
1952 12:17:29.194753 MTRR: Fixed MSR 0x26b 0x0606060606060606
1953 12:17:29.201600 MTRR: Fixed MSR 0x26c 0x0606060606060606
1954 12:17:29.204819 MTRR: Fixed MSR 0x26d 0x0606060606060606
1955 12:17:29.207994 MTRR: Fixed MSR 0x26e 0x0606060606060606
1956 12:17:29.211213 MTRR: Fixed MSR 0x26f 0x0606060606060606
1957 12:17:29.215847 call enable_fixed_mtrr()
1958 12:17:29.219587 CPU physical address size: 39 bits
1959 12:17:29.226206 MTRR: default type WB/UC MTRR counts: 6/7.
1960 12:17:29.229376 MTRR: WB selected as default type.
1961 12:17:29.235988 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1962 12:17:29.239177 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1963 12:17:29.245894 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1964 12:17:29.252362 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
1965 12:17:29.259501 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1966 12:17:29.265647 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
1967 12:17:29.269117
1968 12:17:29.269206 MTRR check
1969 12:17:29.272839 Fixed MTRRs : Enabled
1970 12:17:29.272938 Variable MTRRs: Enabled
1971 12:17:29.273017
1972 12:17:29.279310 MTRR: Fixed MSR 0x250 0x0606060606060606
1973 12:17:29.282647 MTRR: Fixed MSR 0x258 0x0606060606060606
1974 12:17:29.285845 MTRR: Fixed MSR 0x259 0x0000000000000000
1975 12:17:29.289186 MTRR: Fixed MSR 0x268 0x0606060606060606
1976 12:17:29.295721 MTRR: Fixed MSR 0x269 0x0606060606060606
1977 12:17:29.298979 MTRR: Fixed MSR 0x26a 0x0606060606060606
1978 12:17:29.302220 MTRR: Fixed MSR 0x26b 0x0606060606060606
1979 12:17:29.305884 MTRR: Fixed MSR 0x26c 0x0606060606060606
1980 12:17:29.312454 MTRR: Fixed MSR 0x26d 0x0606060606060606
1981 12:17:29.315725 MTRR: Fixed MSR 0x26e 0x0606060606060606
1982 12:17:29.319042 MTRR: Fixed MSR 0x26f 0x0606060606060606
1983 12:17:29.325951 MTRR: Fixed MSR 0x250 0x0606060606060606
1984 12:17:29.326136 call enable_fixed_mtrr()
1985 12:17:29.332530 MTRR: Fixed MSR 0x258 0x0606060606060606
1986 12:17:29.336214 MTRR: Fixed MSR 0x259 0x0000000000000000
1987 12:17:29.339188 MTRR: Fixed MSR 0x268 0x0606060606060606
1988 12:17:29.342854 MTRR: Fixed MSR 0x269 0x0606060606060606
1989 12:17:29.349026 MTRR: Fixed MSR 0x26a 0x0606060606060606
1990 12:17:29.352548 MTRR: Fixed MSR 0x26b 0x0606060606060606
1991 12:17:29.355965 MTRR: Fixed MSR 0x26c 0x0606060606060606
1992 12:17:29.359450 MTRR: Fixed MSR 0x26d 0x0606060606060606
1993 12:17:29.365520 MTRR: Fixed MSR 0x26e 0x0606060606060606
1994 12:17:29.369353 MTRR: Fixed MSR 0x26f 0x0606060606060606
1995 12:17:29.372588 CPU physical address size: 39 bits
1996 12:17:29.377665 call enable_fixed_mtrr()
1997 12:17:29.380907 MTRR: Fixed MSR 0x250 0x0606060606060606
1998 12:17:29.387495 MTRR: Fixed MSR 0x250 0x0606060606060606
1999 12:17:29.390610 MTRR: Fixed MSR 0x258 0x0606060606060606
2000 12:17:29.393823 MTRR: Fixed MSR 0x259 0x0000000000000000
2001 12:17:29.397165 MTRR: Fixed MSR 0x268 0x0606060606060606
2002 12:17:29.403721 MTRR: Fixed MSR 0x269 0x0606060606060606
2003 12:17:29.406919 MTRR: Fixed MSR 0x26a 0x0606060606060606
2004 12:17:29.410661 MTRR: Fixed MSR 0x26b 0x0606060606060606
2005 12:17:29.413880 MTRR: Fixed MSR 0x26c 0x0606060606060606
2006 12:17:29.420539 MTRR: Fixed MSR 0x26d 0x0606060606060606
2007 12:17:29.423769 MTRR: Fixed MSR 0x26e 0x0606060606060606
2008 12:17:29.426983 MTRR: Fixed MSR 0x26f 0x0606060606060606
2009 12:17:29.434236 MTRR: Fixed MSR 0x258 0x0606060606060606
2010 12:17:29.434435 call enable_fixed_mtrr()
2011 12:17:29.440556 MTRR: Fixed MSR 0x259 0x0000000000000000
2012 12:17:29.443885 MTRR: Fixed MSR 0x268 0x0606060606060606
2013 12:17:29.447204 MTRR: Fixed MSR 0x269 0x0606060606060606
2014 12:17:29.450384 MTRR: Fixed MSR 0x26a 0x0606060606060606
2015 12:17:29.456926 MTRR: Fixed MSR 0x26b 0x0606060606060606
2016 12:17:29.460370 MTRR: Fixed MSR 0x26c 0x0606060606060606
2017 12:17:29.463969 MTRR: Fixed MSR 0x26d 0x0606060606060606
2018 12:17:29.467322 MTRR: Fixed MSR 0x26e 0x0606060606060606
2019 12:17:29.474019 MTRR: Fixed MSR 0x26f 0x0606060606060606
2020 12:17:29.477158 CPU physical address size: 39 bits
2021 12:17:29.481130 call enable_fixed_mtrr()
2022 12:17:29.488275 BS: BS_WRITE_TABLES exit times (exec / console): 4 / 150 ms
2023 12:17:29.491355 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 12:17:29.495306 Checking cr50 for pending updates
2025 12:17:29.498495 MTRR: Fixed MSR 0x258 0x0606060606060606
2026 12:17:29.505004 MTRR: Fixed MSR 0x259 0x0000000000000000
2027 12:17:29.508973 MTRR: Fixed MSR 0x268 0x0606060606060606
2028 12:17:29.512102 MTRR: Fixed MSR 0x269 0x0606060606060606
2029 12:17:29.515167 MTRR: Fixed MSR 0x26a 0x0606060606060606
2030 12:17:29.518948 MTRR: Fixed MSR 0x26b 0x0606060606060606
2031 12:17:29.525356 MTRR: Fixed MSR 0x26c 0x0606060606060606
2032 12:17:29.528660 MTRR: Fixed MSR 0x26d 0x0606060606060606
2033 12:17:29.532073 MTRR: Fixed MSR 0x26e 0x0606060606060606
2034 12:17:29.535218 MTRR: Fixed MSR 0x26f 0x0606060606060606
2035 12:17:29.540949 Reading cr50 TPM mode
2036 12:17:29.544085 call enable_fixed_mtrr()
2037 12:17:29.548042 CPU physical address size: 39 bits
2038 12:17:29.551100 MTRR: Fixed MSR 0x250 0x0606060606060606
2039 12:17:29.554894 MTRR: Fixed MSR 0x250 0x0606060606060606
2040 12:17:29.557760 MTRR: Fixed MSR 0x258 0x0606060606060606
2041 12:17:29.564260 MTRR: Fixed MSR 0x259 0x0000000000000000
2042 12:17:29.567852 MTRR: Fixed MSR 0x268 0x0606060606060606
2043 12:17:29.570717 MTRR: Fixed MSR 0x269 0x0606060606060606
2044 12:17:29.574181 MTRR: Fixed MSR 0x26a 0x0606060606060606
2045 12:17:29.580720 MTRR: Fixed MSR 0x26b 0x0606060606060606
2046 12:17:29.583959 MTRR: Fixed MSR 0x26c 0x0606060606060606
2047 12:17:29.587550 MTRR: Fixed MSR 0x26d 0x0606060606060606
2048 12:17:29.590889 MTRR: Fixed MSR 0x26e 0x0606060606060606
2049 12:17:29.593797 MTRR: Fixed MSR 0x26f 0x0606060606060606
2050 12:17:29.601065 MTRR: Fixed MSR 0x258 0x0606060606060606
2051 12:17:29.607522 MTRR: Fixed MSR 0x259 0x0000000000000000
2052 12:17:29.610904 MTRR: Fixed MSR 0x268 0x0606060606060606
2053 12:17:29.614032 MTRR: Fixed MSR 0x269 0x0606060606060606
2054 12:17:29.617238 MTRR: Fixed MSR 0x26a 0x0606060606060606
2055 12:17:29.620926 MTRR: Fixed MSR 0x26b 0x0606060606060606
2056 12:17:29.627513 MTRR: Fixed MSR 0x26c 0x0606060606060606
2057 12:17:29.630848 MTRR: Fixed MSR 0x26d 0x0606060606060606
2058 12:17:29.634052 MTRR: Fixed MSR 0x26e 0x0606060606060606
2059 12:17:29.637268 MTRR: Fixed MSR 0x26f 0x0606060606060606
2060 12:17:29.642551 call enable_fixed_mtrr()
2061 12:17:29.645654 call enable_fixed_mtrr()
2062 12:17:29.648935 CPU physical address size: 39 bits
2063 12:17:29.652262 CPU physical address size: 39 bits
2064 12:17:29.657047 CPU physical address size: 39 bits
2065 12:17:29.662864 CPU physical address size: 39 bits
2066 12:17:29.669272 BS: BS_PAYLOAD_LOAD entry times (exec / console): 49 / 8 ms
2067 12:17:29.676479 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2068 12:17:29.683029 Checking segment from ROM address 0xffc02b38
2069 12:17:29.686031 Checking segment from ROM address 0xffc02b54
2070 12:17:29.689813 Loading segment from ROM address 0xffc02b38
2071 12:17:29.692921 code (compression=0)
2072 12:17:29.702903 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2073 12:17:29.709526 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2074 12:17:29.712650 it's not compressed!
2075 12:17:29.852218 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2076 12:17:29.858692 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2077 12:17:29.865926 Loading segment from ROM address 0xffc02b54
2078 12:17:29.868622 Entry Point 0x30000000
2079 12:17:29.868736 Loaded segments
2080 12:17:29.875636 BS: BS_PAYLOAD_LOAD run times (exec / console): 137 / 63 ms
2081 12:17:29.920528 Finalizing chipset.
2082 12:17:29.923764 Finalizing SMM.
2083 12:17:29.923856 APMC done.
2084 12:17:29.930921 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2085 12:17:29.933825 mp_park_aps done after 0 msecs.
2086 12:17:29.936885 Jumping to boot code at 0x30000000(0x76b25000)
2087 12:17:29.947249 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2088 12:17:29.947350
2089 12:17:29.947426
2090 12:17:29.949944
2091 12:17:29.950043 Starting depthcharge on Voema...
2092 12:17:29.950526 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2093 12:17:29.950660 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2094 12:17:29.950762 Setting prompt string to ['volteer:']
2095 12:17:29.950884 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2096 12:17:29.953181
2097 12:17:29.960235 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2098 12:17:29.960341
2099 12:17:29.966375 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2100 12:17:29.966477
2101 12:17:29.973322 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2102 12:17:29.973433
2103 12:17:29.976660 Failed to find eMMC card reader
2104 12:17:29.976775
2105 12:17:29.979711 Wipe memory regions:
2106 12:17:29.979817
2107 12:17:29.983049 [0x00000000001000, 0x000000000a0000)
2108 12:17:29.983167
2109 12:17:29.986666 [0x00000000100000, 0x00000030000000)
2110 12:17:30.020683
2111 12:17:30.024276 [0x00000032662db0, 0x000000769ef000)
2112 12:17:30.073114
2113 12:17:30.076267 [0x00000100000000, 0x00000480400000)
2114 12:17:30.685050
2115 12:17:30.688570 ec_init: CrosEC protocol v3 supported (256, 256)
2116 12:17:31.119104
2117 12:17:31.119243 R8152: Initializing
2118 12:17:31.119313
2119 12:17:31.122323 Version 6 (ocp_data = 5c30)
2120 12:17:31.122409
2121 12:17:31.125469 R8152: Done initializing
2122 12:17:31.125555
2123 12:17:31.128951 Adding net device
2124 12:17:31.430615
2125 12:17:31.433412 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2126 12:17:31.433504
2127 12:17:31.433571
2128 12:17:31.433633
2129 12:17:31.436971 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2131 12:17:31.537728 volteer: tftpboot 192.168.201.1 9729432/tftp-deploy-27jf8j8c/kernel/bzImage 9729432/tftp-deploy-27jf8j8c/kernel/cmdline 9729432/tftp-deploy-27jf8j8c/ramdisk/ramdisk.cpio.gz
2132 12:17:31.537915 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2133 12:17:31.538022 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2134 12:17:31.542019 tftpboot 192.168.201.1 9729432/tftp-deploy-27jf8j8c/kernel/bzImoy-27jf8j8c/kernel/cmdline 9729432/tftp-deploy-27jf8j8c/ramdisk/ramdisk.cpio.gz
2135 12:17:31.542177
2136 12:17:31.542264 Waiting for link
2137 12:17:31.745150
2138 12:17:31.745316 done.
2139 12:17:31.745407
2140 12:17:31.745489 MAC: 00:24:32:30:7e:22
2141 12:17:31.745569
2142 12:17:31.748510 Sending DHCP discover... done.
2143 12:17:31.748619
2144 12:17:31.751792 Waiting for reply... done.
2145 12:17:31.751898
2146 12:17:31.755151 Sending DHCP request... done.
2147 12:17:31.755241
2148 12:17:31.761392 Waiting for reply... done.
2149 12:17:31.761528
2150 12:17:31.761617 My ip is 192.168.201.21
2151 12:17:31.761710
2152 12:17:31.764703 The DHCP server ip is 192.168.201.1
2153 12:17:31.768497
2154 12:17:31.771712 TFTP server IP predefined by user: 192.168.201.1
2155 12:17:31.771821
2156 12:17:31.778396 Bootfile predefined by user: 9729432/tftp-deploy-27jf8j8c/kernel/bzImage
2157 12:17:31.778490
2158 12:17:31.781603 Sending tftp read request... done.
2159 12:17:31.781727
2160 12:17:31.784775 Waiting for the transfer...
2161 12:17:31.784886
2162 12:17:32.351110 00000000 ################################################################
2163 12:17:32.351298
2164 12:17:32.924265 00080000 ################################################################
2165 12:17:32.924441
2166 12:17:33.483913 00100000 ################################################################
2167 12:17:33.484062
2168 12:17:34.046024 00180000 ################################################################
2169 12:17:34.046200
2170 12:17:34.611773 00200000 ################################################################
2171 12:17:34.611921
2172 12:17:35.173525 00280000 ################################################################
2173 12:17:35.173672
2174 12:17:35.705962 00300000 ################################################################
2175 12:17:35.706161
2176 12:17:36.221493 00380000 ################################################################
2177 12:17:36.221635
2178 12:17:36.742143 00400000 ################################################################
2179 12:17:36.742292
2180 12:17:37.269434 00480000 ################################################################
2181 12:17:37.269582
2182 12:17:37.790979 00500000 ################################################################
2183 12:17:37.791218
2184 12:17:38.307026 00580000 ################################################################
2185 12:17:38.307171
2186 12:17:38.830374 00600000 ################################################################
2187 12:17:38.830517
2188 12:17:39.347363 00680000 ################################################################
2189 12:17:39.347583
2190 12:17:39.864141 00700000 ################################################################
2191 12:17:39.864287
2192 12:17:40.382319 00780000 ################################################################
2193 12:17:40.382458
2194 12:17:40.903960 00800000 ################################################################
2195 12:17:40.904100
2196 12:17:41.433827 00880000 ################################################################
2197 12:17:41.433969
2198 12:17:41.832577 00900000 ################################################# done.
2199 12:17:41.832754
2200 12:17:41.835767 The bootfile was 9834496 bytes long.
2201 12:17:41.835879
2202 12:17:41.839322 Sending tftp read request... done.
2203 12:17:41.839433
2204 12:17:41.842738 Waiting for the transfer...
2205 12:17:41.842846
2206 12:17:42.374343 00000000 ################################################################
2207 12:17:42.374490
2208 12:17:42.901200 00080000 ################################################################
2209 12:17:42.901346
2210 12:17:43.428870 00100000 ################################################################
2211 12:17:43.429019
2212 12:17:43.957223 00180000 ################################################################
2213 12:17:43.957368
2214 12:17:44.482873 00200000 ################################################################
2215 12:17:44.483018
2216 12:17:45.007845 00280000 ################################################################
2217 12:17:45.007984
2218 12:17:45.533490 00300000 ################################################################
2219 12:17:45.533632
2220 12:17:46.067617 00380000 ################################################################
2221 12:17:46.067757
2222 12:17:46.585294 00400000 ################################################################
2223 12:17:46.585434
2224 12:17:47.111088 00480000 ################################################################
2225 12:17:47.111238
2226 12:17:47.640229 00500000 ################################################################
2227 12:17:47.640378
2228 12:17:48.163016 00580000 ################################################################
2229 12:17:48.163193
2230 12:17:48.689822 00600000 ################################################################
2231 12:17:48.689973
2232 12:17:49.220998 00680000 ################################################################
2233 12:17:49.221156
2234 12:17:49.746189 00700000 ################################################################
2235 12:17:49.746341
2236 12:17:50.269748 00780000 ################################################################
2237 12:17:50.269896
2238 12:17:50.793038 00800000 ################################################################
2239 12:17:50.793177
2240 12:17:51.068722 00880000 ################################## done.
2241 12:17:51.068897
2242 12:17:51.072163 Sending tftp read request... done.
2243 12:17:51.072275
2244 12:17:51.075659 Waiting for the transfer...
2245 12:17:51.075768
2246 12:17:51.075856 00000000 # done.
2247 12:17:51.079133
2248 12:17:51.085207 Command line loaded dynamically from TFTP file: 9729432/tftp-deploy-27jf8j8c/kernel/cmdline
2249 12:17:51.085316
2250 12:17:51.098417 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/ram0 ip=dhcp tftpserverip=192.168.201.1
2251 12:17:51.103917
2252 12:17:51.107420 Shutting down all USB controllers.
2253 12:17:51.107529
2254 12:17:51.107618 Removing current net device
2255 12:17:51.107701
2256 12:17:51.110771 Finalizing coreboot
2257 12:17:51.110879
2258 12:17:51.117487 Exiting depthcharge with code 4 at timestamp: 29739022
2259 12:17:51.117578
2260 12:17:51.117648
2261 12:17:51.117712 Starting kernel ...
2262 12:17:51.117774
2263 12:17:51.117838
2264 12:17:51.118244 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2265 12:17:51.118377 start: 2.2.5 auto-login-action (timeout 00:04:23) [common]
2266 12:17:51.118461 Setting prompt string to ['Linux version [0-9]']
2267 12:17:51.118534 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2268 12:17:51.118608 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2270 12:22:14.118603 end: 2.2.5 auto-login-action (duration 00:04:23) [common]
2272 12:22:14.118822 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 263 seconds'
2274 12:22:14.118985 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2277 12:22:14.119333 end: 2 depthcharge-action (duration 00:05:00) [common]
2279 12:22:14.119564 Cleaning after the job
2280 12:22:14.119650 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729432/tftp-deploy-27jf8j8c/ramdisk
2281 12:22:14.120426 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729432/tftp-deploy-27jf8j8c/kernel
2282 12:22:14.121220 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729432/tftp-deploy-27jf8j8c/modules
2283 12:22:14.121588 start: 5.1 power-off (timeout 00:00:30) [common]
2284 12:22:14.121778 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-14' '--port=1' '--command=off'
2285 12:22:14.198632 >> Command sent successfully.
2286 12:22:14.200752 Returned 0 in 0 seconds
2287 12:22:14.301514 end: 5.1 power-off (duration 00:00:00) [common]
2289 12:22:14.301847 start: 5.2 read-feedback (timeout 00:10:00) [common]
2290 12:22:14.302131 Listened to connection for namespace 'common' for up to 1s
2291 12:22:15.306158 Finalising connection for namespace 'common'
2292 12:22:15.306340 Disconnecting from shell: Finalise
2293 12:22:15.306423
2294 12:22:15.407179 end: 5.2 read-feedback (duration 00:00:01) [common]
2295 12:22:15.407343 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729432
2296 12:22:15.412994 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729432
2297 12:22:15.413126 JobError: Your job cannot terminate cleanly.