Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:17:02.516457 lava-dispatcher, installed at version: 2023.01
2 12:17:02.516654 start: 0 validate
3 12:17:02.516778 Start time: 2023-03-22 12:17:02.516772+00:00 (UTC)
4 12:17:02.516903 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:17:02.517039 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 12:17:02.810955 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:17:02.811700 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.277-cip94-rt29%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:17:06.817733 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:17:06.818423 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:17:07.108032 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:17:07.108772 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.277-cip94-rt29%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:17:07.615417 validate duration: 5.10
14 12:17:07.615748 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:17:07.615929 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:17:07.616039 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:17:07.616147 Not decompressing ramdisk as can be used compressed.
18 12:17:07.616242 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/initrd.cpio.gz
19 12:17:07.616313 saving as /var/lib/lava/dispatcher/tmp/9729429/tftp-deploy-xb0bke2f/ramdisk/initrd.cpio.gz
20 12:17:07.616381 total size: 5432123 (5MB)
21 12:17:07.617338 progress 0% (0MB)
22 12:17:07.618975 progress 5% (0MB)
23 12:17:07.620468 progress 10% (0MB)
24 12:17:07.621940 progress 15% (0MB)
25 12:17:07.623572 progress 20% (1MB)
26 12:17:07.625039 progress 25% (1MB)
27 12:17:07.626495 progress 30% (1MB)
28 12:17:07.628119 progress 35% (1MB)
29 12:17:07.629572 progress 40% (2MB)
30 12:17:07.631013 progress 45% (2MB)
31 12:17:07.632444 progress 50% (2MB)
32 12:17:07.634045 progress 55% (2MB)
33 12:17:07.635476 progress 60% (3MB)
34 12:17:07.636907 progress 65% (3MB)
35 12:17:07.638519 progress 70% (3MB)
36 12:17:07.639949 progress 75% (3MB)
37 12:17:07.641380 progress 80% (4MB)
38 12:17:07.642805 progress 85% (4MB)
39 12:17:07.644398 progress 90% (4MB)
40 12:17:07.645829 progress 95% (4MB)
41 12:17:07.647282 progress 100% (5MB)
42 12:17:07.647503 5MB downloaded in 0.03s (166.48MB/s)
43 12:17:07.647669 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:17:07.647948 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:17:07.648047 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:17:07.648142 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:17:07.648256 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.277-cip94-rt29/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:17:07.648333 saving as /var/lib/lava/dispatcher/tmp/9729429/tftp-deploy-xb0bke2f/kernel/bzImage
50 12:17:07.648401 total size: 9834496 (9MB)
51 12:17:07.648467 No compression specified
52 12:17:07.649408 progress 0% (0MB)
53 12:17:07.652105 progress 5% (0MB)
54 12:17:07.654761 progress 10% (0MB)
55 12:17:07.657424 progress 15% (1MB)
56 12:17:07.660128 progress 20% (1MB)
57 12:17:07.662810 progress 25% (2MB)
58 12:17:07.665515 progress 30% (2MB)
59 12:17:07.668225 progress 35% (3MB)
60 12:17:07.670876 progress 40% (3MB)
61 12:17:07.673543 progress 45% (4MB)
62 12:17:07.676232 progress 50% (4MB)
63 12:17:07.678889 progress 55% (5MB)
64 12:17:07.681583 progress 60% (5MB)
65 12:17:07.684191 progress 65% (6MB)
66 12:17:07.686796 progress 70% (6MB)
67 12:17:07.689402 progress 75% (7MB)
68 12:17:07.691996 progress 80% (7MB)
69 12:17:07.694598 progress 85% (8MB)
70 12:17:07.697204 progress 90% (8MB)
71 12:17:07.699795 progress 95% (8MB)
72 12:17:07.702421 progress 100% (9MB)
73 12:17:07.702552 9MB downloaded in 0.05s (173.22MB/s)
74 12:17:07.702717 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:17:07.702985 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:17:07.703085 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:17:07.703186 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:17:07.703307 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230317.0/amd64/full.rootfs.tar.xz
80 12:17:07.703382 saving as /var/lib/lava/dispatcher/tmp/9729429/tftp-deploy-xb0bke2f/nfsrootfs/full.rootfs.tar
81 12:17:07.703450 total size: 133351768 (127MB)
82 12:17:07.703518 Using unxz to decompress xz
83 12:17:07.706748 progress 0% (0MB)
84 12:17:08.079173 progress 5% (6MB)
85 12:17:08.488165 progress 10% (12MB)
86 12:17:08.801691 progress 15% (19MB)
87 12:17:09.011772 progress 20% (25MB)
88 12:17:09.289308 progress 25% (31MB)
89 12:17:09.663013 progress 30% (38MB)
90 12:17:10.057165 progress 35% (44MB)
91 12:17:10.495060 progress 40% (50MB)
92 12:17:10.914455 progress 45% (57MB)
93 12:17:11.304685 progress 50% (63MB)
94 12:17:11.712771 progress 55% (69MB)
95 12:17:12.107469 progress 60% (76MB)
96 12:17:12.506869 progress 65% (82MB)
97 12:17:12.904667 progress 70% (89MB)
98 12:17:13.305560 progress 75% (95MB)
99 12:17:13.788122 progress 80% (101MB)
100 12:17:14.268710 progress 85% (108MB)
101 12:17:14.575023 progress 90% (114MB)
102 12:17:14.956222 progress 95% (120MB)
103 12:17:15.389175 progress 100% (127MB)
104 12:17:15.395458 127MB downloaded in 7.69s (16.53MB/s)
105 12:17:15.395763 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:17:15.396051 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:17:15.396152 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:17:15.396247 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:17:15.396405 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.277-cip94-rt29/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:17:15.396484 saving as /var/lib/lava/dispatcher/tmp/9729429/tftp-deploy-xb0bke2f/modules/modules.tar
112 12:17:15.396552 total size: 462060 (0MB)
113 12:17:15.396621 Using unxz to decompress xz
114 12:17:15.399696 progress 7% (0MB)
115 12:17:15.400083 progress 14% (0MB)
116 12:17:15.400335 progress 21% (0MB)
117 12:17:15.401881 progress 28% (0MB)
118 12:17:15.404154 progress 35% (0MB)
119 12:17:15.406166 progress 42% (0MB)
120 12:17:15.408551 progress 49% (0MB)
121 12:17:15.410717 progress 56% (0MB)
122 12:17:15.412886 progress 63% (0MB)
123 12:17:15.415027 progress 70% (0MB)
124 12:17:15.417691 progress 78% (0MB)
125 12:17:15.419940 progress 85% (0MB)
126 12:17:15.421887 progress 92% (0MB)
127 12:17:15.424288 progress 99% (0MB)
128 12:17:15.431585 0MB downloaded in 0.04s (12.58MB/s)
129 12:17:15.431858 end: 1.4.1 http-download (duration 00:00:00) [common]
131 12:17:15.432144 end: 1.4 download-retry (duration 00:00:00) [common]
132 12:17:15.432246 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
133 12:17:15.432352 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
134 12:17:16.786663 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729429/extract-nfsrootfs-ww0qy5fp
135 12:17:16.786882 end: 1.5.1 extract-nfsrootfs (duration 00:00:01) [common]
136 12:17:16.787012 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
137 12:17:16.787181 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw
138 12:17:16.787318 makedir: /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin
139 12:17:16.787434 makedir: /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/tests
140 12:17:16.787546 makedir: /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/results
141 12:17:16.787674 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-add-keys
142 12:17:16.787837 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-add-sources
143 12:17:16.787983 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-background-process-start
144 12:17:16.788129 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-background-process-stop
145 12:17:16.788275 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-common-functions
146 12:17:16.788418 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-echo-ipv4
147 12:17:16.788562 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-install-packages
148 12:17:16.788706 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-installed-packages
149 12:17:16.788848 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-os-build
150 12:17:16.788992 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-probe-channel
151 12:17:16.789135 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-probe-ip
152 12:17:16.789286 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-target-ip
153 12:17:16.789430 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-target-mac
154 12:17:16.789573 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-target-storage
155 12:17:16.789720 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-test-case
156 12:17:16.789863 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-test-event
157 12:17:16.790005 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-test-feedback
158 12:17:16.790148 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-test-raise
159 12:17:16.790290 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-test-reference
160 12:17:16.790433 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-test-runner
161 12:17:16.790574 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-test-set
162 12:17:16.790721 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-test-shell
163 12:17:16.790865 Updating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-install-packages (oe)
164 12:17:16.791013 Updating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/bin/lava-installed-packages (oe)
165 12:17:16.791141 Creating /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/environment
166 12:17:16.791254 LAVA metadata
167 12:17:16.791342 - LAVA_JOB_ID=9729429
168 12:17:16.791432 - LAVA_DISPATCHER_IP=192.168.201.1
169 12:17:16.791567 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
170 12:17:16.791650 skipped lava-vland-overlay
171 12:17:16.791765 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
172 12:17:16.791877 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
173 12:17:16.791957 skipped lava-multinode-overlay
174 12:17:16.792068 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
175 12:17:16.792179 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
176 12:17:16.792277 Loading test definitions
177 12:17:16.792405 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
178 12:17:16.792498 Using /lava-9729429 at stage 0
179 12:17:16.792820 uuid=9729429_1.5.2.3.1 testdef=None
180 12:17:16.792932 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
181 12:17:16.793050 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
182 12:17:16.793670 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
184 12:17:16.793963 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
185 12:17:16.794621 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
187 12:17:16.794924 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
188 12:17:16.795553 runner path: /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/0/tests/0_dmesg test_uuid 9729429_1.5.2.3.1
189 12:17:16.795731 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
191 12:17:16.796027 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
192 12:17:16.796120 Using /lava-9729429 at stage 1
193 12:17:16.796418 uuid=9729429_1.5.2.3.5 testdef=None
194 12:17:16.796531 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
195 12:17:16.796650 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
196 12:17:16.797170 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
198 12:17:16.797474 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
199 12:17:16.798138 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
201 12:17:16.798438 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
202 12:17:16.799088 runner path: /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/1/tests/1_bootrr test_uuid 9729429_1.5.2.3.5
203 12:17:16.799263 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
205 12:17:16.799525 Creating lava-test-runner.conf files
206 12:17:16.799618 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/0 for stage 0
207 12:17:16.799734 - 0_dmesg
208 12:17:16.799832 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729429/lava-overlay-yns1dipw/lava-9729429/1 for stage 1
209 12:17:16.799950 - 1_bootrr
210 12:17:16.800071 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
211 12:17:16.800184 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
212 12:17:16.806552 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
213 12:17:16.806686 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
214 12:17:16.806807 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
215 12:17:16.806928 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
216 12:17:16.807044 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
217 12:17:16.920059 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
218 12:17:16.920441 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
219 12:17:16.920741 extracting modules file /var/lib/lava/dispatcher/tmp/9729429/tftp-deploy-xb0bke2f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729429/extract-nfsrootfs-ww0qy5fp
220 12:17:16.932662 extracting modules file /var/lib/lava/dispatcher/tmp/9729429/tftp-deploy-xb0bke2f/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729429/extract-overlay-ramdisk-v6euluth/ramdisk
221 12:17:16.944319 end: 1.5.4 extract-modules (duration 00:00:00) [common]
222 12:17:16.944468 start: 1.5.5 apply-overlay-tftp (timeout 00:09:51) [common]
223 12:17:16.944581 [common] Applying overlay to NFS
224 12:17:16.944677 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729429/compress-overlay-60zag1je/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729429/extract-nfsrootfs-ww0qy5fp
225 12:17:16.949174 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
226 12:17:16.949316 start: 1.5.6 configure-preseed-file (timeout 00:09:51) [common]
227 12:17:16.949436 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
228 12:17:16.949562 start: 1.5.7 compress-ramdisk (timeout 00:09:51) [common]
229 12:17:16.949663 Building ramdisk /var/lib/lava/dispatcher/tmp/9729429/extract-overlay-ramdisk-v6euluth/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729429/extract-overlay-ramdisk-v6euluth/ramdisk
230 12:17:16.993564 >> 30005 blocks
231 12:17:17.582747 rename /var/lib/lava/dispatcher/tmp/9729429/extract-overlay-ramdisk-v6euluth/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729429/tftp-deploy-xb0bke2f/ramdisk/ramdisk.cpio.gz
232 12:17:17.583192 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
233 12:17:17.583351 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
234 12:17:17.583485 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
235 12:17:17.583602 No mkimage arch provided, not using FIT.
236 12:17:17.583723 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
237 12:17:17.583841 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
238 12:17:17.583974 end: 1.5 prepare-tftp-overlay (duration 00:00:02) [common]
239 12:17:17.584099 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
240 12:17:17.584201 No LXC device requested
241 12:17:17.584320 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
242 12:17:17.584446 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
243 12:17:17.584557 end: 1.7 deploy-device-env (duration 00:00:00) [common]
244 12:17:17.584647 Checking files for TFTP limit of 4294967296 bytes.
245 12:17:17.585093 end: 1 tftp-deploy (duration 00:00:10) [common]
246 12:17:17.585233 start: 2 depthcharge-action (timeout 00:05:00) [common]
247 12:17:17.585362 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
248 12:17:17.585520 substitutions:
249 12:17:17.585607 - {DTB}: None
250 12:17:17.585697 - {INITRD}: 9729429/tftp-deploy-xb0bke2f/ramdisk/ramdisk.cpio.gz
251 12:17:17.585784 - {KERNEL}: 9729429/tftp-deploy-xb0bke2f/kernel/bzImage
252 12:17:17.585870 - {LAVA_MAC}: None
253 12:17:17.585956 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729429/extract-nfsrootfs-ww0qy5fp
254 12:17:17.586041 - {NFS_SERVER_IP}: 192.168.201.1
255 12:17:17.586125 - {PRESEED_CONFIG}: None
256 12:17:17.586210 - {PRESEED_LOCAL}: None
257 12:17:17.586293 - {RAMDISK}: 9729429/tftp-deploy-xb0bke2f/ramdisk/ramdisk.cpio.gz
258 12:17:17.586377 - {ROOT_PART}: None
259 12:17:17.586459 - {ROOT}: None
260 12:17:17.586541 - {SERVER_IP}: 192.168.201.1
261 12:17:17.586623 - {TEE}: None
262 12:17:17.586705 Parsed boot commands:
263 12:17:17.586787 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
264 12:17:17.586990 Parsed boot commands: tftpboot 192.168.201.1 9729429/tftp-deploy-xb0bke2f/kernel/bzImage 9729429/tftp-deploy-xb0bke2f/kernel/cmdline 9729429/tftp-deploy-xb0bke2f/ramdisk/ramdisk.cpio.gz
265 12:17:17.587113 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
266 12:17:17.587232 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
267 12:17:17.587362 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
268 12:17:17.587480 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
269 12:17:17.587573 Not connected, no need to disconnect.
270 12:17:17.587684 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
271 12:17:17.587795 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
272 12:17:17.587885 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-11'
273 12:17:17.590943 Setting prompt string to ['lava-test: # ']
274 12:17:17.591273 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
275 12:17:17.591409 end: 2.2.1 reset-connection (duration 00:00:00) [common]
276 12:17:17.591540 start: 2.2.2 reset-device (timeout 00:05:00) [common]
277 12:17:17.591662 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
278 12:17:17.591879 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=reboot'
279 12:17:22.735950 >> Command sent successfully.
280 12:17:22.745128 Returned 0 in 5 seconds
281 12:17:22.846788 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
283 12:17:22.848281 end: 2.2.2 reset-device (duration 00:00:05) [common]
284 12:17:22.848801 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
285 12:17:22.849283 Setting prompt string to 'Starting depthcharge on Voema...'
286 12:17:22.849644 Changing prompt to 'Starting depthcharge on Voema...'
287 12:17:22.850013 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
288 12:17:22.851220 [Enter `^Ec?' for help]
289 12:17:24.404379
290 12:17:24.404556
291 12:17:24.414074 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
292 12:17:24.417037 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz
293 12:17:24.423875 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
294 12:17:24.427052 CPU: AES supported, TXT NOT supported, VT supported
295 12:17:24.434260 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
296 12:17:24.437805 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
297 12:17:24.444708 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
298 12:17:24.447326 VBOOT: Loading verstage.
299 12:17:24.451122 FMAP: Found "FLASH" version 1.1 at 0x1804000.
300 12:17:24.457148 FMAP: base = 0x0 size = 0x2000000 #areas = 32
301 12:17:24.460753 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
302 12:17:24.471170 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
303 12:17:24.477270 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
304 12:17:24.477371
305 12:17:24.477467
306 12:17:24.488398 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
307 12:17:24.504679 Probing TPM: . done!
308 12:17:24.508341 TPM ready after 0 ms
309 12:17:24.511203 Connected to device vid:did:rid of 1ae0:0028:00
310 12:17:24.522489 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
311 12:17:24.528904 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
312 12:17:24.532739 Initialized TPM device CR50 revision 0
313 12:17:24.590305 tlcl_send_startup: Startup return code is 0
314 12:17:24.590497 TPM: setup succeeded
315 12:17:24.605580 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
316 12:17:24.619982 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
317 12:17:24.632688 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
318 12:17:24.642747 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
319 12:17:24.646071 Chrome EC: UHEPI supported
320 12:17:24.649092 Phase 1
321 12:17:24.653149 FMAP: area GBB found @ 1805000 (458752 bytes)
322 12:17:24.662531 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
323 12:17:24.669771 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
324 12:17:24.676154 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
325 12:17:24.682506 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
326 12:17:24.686269 Recovery requested (1009000e)
327 12:17:24.689520 TPM: Extending digest for VBOOT: boot mode into PCR 0
328 12:17:24.701401 tlcl_extend: response is 0
329 12:17:24.708177 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
330 12:17:24.717394 tlcl_extend: response is 0
331 12:17:24.723952 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
332 12:17:24.730627 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
333 12:17:24.737862 BS: verstage times (exec / console): total (unknown) / 142 ms
334 12:17:24.738413
335 12:17:24.738872
336 12:17:24.750596 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
337 12:17:24.757009 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
338 12:17:24.760181 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
339 12:17:24.763626 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
340 12:17:24.770097 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
341 12:17:24.773297 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
342 12:17:24.777030 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
343 12:17:24.780478 TCO_STS: 0000 0000
344 12:17:24.783138 GEN_PMCON: d0015038 00002200
345 12:17:24.786686 GBLRST_CAUSE: 00000000 00000000
346 12:17:24.789683 HPR_CAUSE0: 00000000
347 12:17:24.790276 prev_sleep_state 5
348 12:17:24.793132 Boot Count incremented to 15444
349 12:17:24.800495 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
350 12:17:24.807090 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
351 12:17:24.816556 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
352 12:17:24.823363 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
353 12:17:24.826479 Chrome EC: UHEPI supported
354 12:17:24.833193 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
355 12:17:24.844021 Probing TPM: done!
356 12:17:24.850664 Connected to device vid:did:rid of 1ae0:0028:00
357 12:17:24.860435 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
358 12:17:24.864429 Initialized TPM device CR50 revision 0
359 12:17:24.879242 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
360 12:17:24.885563 MRC: Hash idx 0x100b comparison successful.
361 12:17:24.888726 MRC cache found, size faa8
362 12:17:24.889177 bootmode is set to: 2
363 12:17:24.891753 SPD index = 2
364 12:17:24.898564 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
365 12:17:24.901918 SPD: module type is LPDDR4X
366 12:17:24.905158 SPD: module part number is MT53D1G64D4NW-046
367 12:17:24.911819 SPD: banks 8, ranks 1, rows 17, columns 10, density 16384 Mb
368 12:17:24.915261 SPD: device width 16 bits, bus width 16 bits
369 12:17:24.922215 SPD: module size is 2048 MB (per channel)
370 12:17:25.350578 CBMEM:
371 12:17:25.353658 IMD: root @ 0x76fff000 254 entries.
372 12:17:25.357429 IMD: root @ 0x76ffec00 62 entries.
373 12:17:25.360772 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
374 12:17:25.366889 FMAP: area RW_VPD found @ f35000 (8192 bytes)
375 12:17:25.370621 External stage cache:
376 12:17:25.373917 IMD: root @ 0x7b3ff000 254 entries.
377 12:17:25.377657 IMD: root @ 0x7b3fec00 62 entries.
378 12:17:25.391708 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
379 12:17:25.398206 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
380 12:17:25.404966 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
381 12:17:25.418252 MRC: 'RECOVERY_MRC_CACHE' does not need update.
382 12:17:25.425130 cse_lite: Skip switching to RW in the recovery path
383 12:17:25.425252 8 DIMMs found
384 12:17:25.425332 SMM Memory Map
385 12:17:25.431814 SMRAM : 0x7b000000 0x800000
386 12:17:25.434914 Subregion 0: 0x7b000000 0x200000
387 12:17:25.438418 Subregion 1: 0x7b200000 0x200000
388 12:17:25.441425 Subregion 2: 0x7b400000 0x400000
389 12:17:25.441520 top_of_ram = 0x77000000
390 12:17:25.448477 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
391 12:17:25.455137 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
392 12:17:25.458048 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
393 12:17:25.465126 MTRR Range: Start=ff000000 End=0 (Size 1000000)
394 12:17:25.471329 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
395 12:17:25.477903 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
396 12:17:25.488850 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
397 12:17:25.495167 Processing 211 relocs. Offset value of 0x74c0b000
398 12:17:25.501733 BS: romstage times (exec / console): total (unknown) / 277 ms
399 12:17:25.507284
400 12:17:25.507407
401 12:17:25.517046 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
402 12:17:25.520869 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
403 12:17:25.530691 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
404 12:17:25.537279 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
405 12:17:25.543458 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
406 12:17:25.550563 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
407 12:17:25.594156 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
408 12:17:25.600263 Processing 5008 relocs. Offset value of 0x75d98000
409 12:17:25.603850 BS: postcar times (exec / console): total (unknown) / 59 ms
410 12:17:25.607469
411 12:17:25.607574
412 12:17:25.616862 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
413 12:17:25.616961 Normal boot
414 12:17:25.620433 FW_CONFIG value is 0x804c02
415 12:17:25.623942 PCI: 00:07.0 disabled by fw_config
416 12:17:25.627037 PCI: 00:07.1 disabled by fw_config
417 12:17:25.633879 PCI: 00:0d.2 disabled by fw_config
418 12:17:25.637081 PCI: 00:1c.7 disabled by fw_config
419 12:17:25.640277 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
420 12:17:25.646721 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 12:17:25.653592 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 12:17:25.657474 GENERIC: 0.0 disabled by fw_config
423 12:17:25.660352 GENERIC: 1.0 disabled by fw_config
424 12:17:25.663427 fw_config match found: DB_USB=USB3_ACTIVE
425 12:17:25.667223 fw_config match found: DB_USB=USB3_ACTIVE
426 12:17:25.670070 fw_config match found: DB_USB=USB3_ACTIVE
427 12:17:25.676678 fw_config match found: DB_USB=USB3_ACTIVE
428 12:17:25.680187 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
429 12:17:25.689896 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
430 12:17:25.696440 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
431 12:17:25.703620 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
432 12:17:25.709847 microcode: sig=0x806c1 pf=0x80 revision=0x86
433 12:17:25.713227 microcode: Update skipped, already up-to-date
434 12:17:25.719720 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
435 12:17:25.747999 Detected 4 core, 8 thread CPU.
436 12:17:25.751152 Setting up SMI for CPU
437 12:17:25.754647 IED base = 0x7b400000
438 12:17:25.754745 IED size = 0x00400000
439 12:17:25.757516 Will perform SMM setup.
440 12:17:25.764401 CPU: 11th Gen Intel(R) Core(TM) i7-1160G7 @ 1.20GHz.
441 12:17:25.771087 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
442 12:17:25.777790 Processing 16 relocs. Offset value of 0x00030000
443 12:17:25.780978 Attempting to start 7 APs
444 12:17:25.784407 Waiting for 10ms after sending INIT.
445 12:17:25.799903 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
446 12:17:25.802831 AP: slot 7 apic_id 5.
447 12:17:25.806287 AP: slot 4 apic_id 4.
448 12:17:25.806384 AP: slot 5 apic_id 6.
449 12:17:25.809547 AP: slot 2 apic_id 7.
450 12:17:25.813128 AP: slot 3 apic_id 3.
451 12:17:25.813235 AP: slot 6 apic_id 2.
452 12:17:25.813314 done.
453 12:17:25.819683 Waiting for 2nd SIPI to complete...done.
454 12:17:25.826611 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
455 12:17:25.833088 Processing 13 relocs. Offset value of 0x00038000
456 12:17:25.836057 Unable to locate Global NVS
457 12:17:25.842965 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
458 12:17:25.846112 Installing permanent SMM handler to 0x7b000000
459 12:17:25.856229 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
460 12:17:25.859282 Processing 794 relocs. Offset value of 0x7b010000
461 12:17:25.869394 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
462 12:17:25.872785 Processing 13 relocs. Offset value of 0x7b008000
463 12:17:25.879135 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
464 12:17:25.886136 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
465 12:17:25.889119 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
466 12:17:25.895686 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
467 12:17:25.902612 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
468 12:17:25.909096 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
469 12:17:25.915590 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
470 12:17:25.915684 Unable to locate Global NVS
471 12:17:25.926280 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
472 12:17:25.929084 Clearing SMI status registers
473 12:17:25.929181 SMI_STS: PM1
474 12:17:25.932302 PM1_STS: PWRBTN
475 12:17:25.939183 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
476 12:17:25.942448 In relocation handler: CPU 0
477 12:17:25.945386 New SMBASE=0x7b000000 IEDBASE=0x7b400000
478 12:17:25.952799 Writing SMRR. base = 0x7b000006, mask=0xff800c00
479 12:17:25.952894 Relocation complete.
480 12:17:25.962396 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
481 12:17:25.962491 In relocation handler: CPU 1
482 12:17:25.968665 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
483 12:17:25.968760 Relocation complete.
484 12:17:25.978755 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
485 12:17:25.978849 In relocation handler: CPU 5
486 12:17:25.985567 New SMBASE=0x7affec00 IEDBASE=0x7b400000
487 12:17:25.989023 Writing SMRR. base = 0x7b000006, mask=0xff800c00
488 12:17:25.992424 Relocation complete.
489 12:17:25.998885 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
490 12:17:26.002128 In relocation handler: CPU 2
491 12:17:26.005391 New SMBASE=0x7afff800 IEDBASE=0x7b400000
492 12:17:26.008315 Relocation complete.
493 12:17:26.014923 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
494 12:17:26.018612 In relocation handler: CPU 7
495 12:17:26.022133 New SMBASE=0x7affe400 IEDBASE=0x7b400000
496 12:17:26.025099 Relocation complete.
497 12:17:26.031516 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
498 12:17:26.034781 In relocation handler: CPU 4
499 12:17:26.038536 New SMBASE=0x7afff000 IEDBASE=0x7b400000
500 12:17:26.045051 Writing SMRR. base = 0x7b000006, mask=0xff800c00
501 12:17:26.045148 Relocation complete.
502 12:17:26.051562 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
503 12:17:26.054643 In relocation handler: CPU 6
504 12:17:26.058356 New SMBASE=0x7affe800 IEDBASE=0x7b400000
505 12:17:26.065086 Writing SMRR. base = 0x7b000006, mask=0xff800c00
506 12:17:26.068181 Relocation complete.
507 12:17:26.074542 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
508 12:17:26.078127 In relocation handler: CPU 3
509 12:17:26.081384 New SMBASE=0x7afff400 IEDBASE=0x7b400000
510 12:17:26.084717 Relocation complete.
511 12:17:26.084812 Initializing CPU #0
512 12:17:26.087982 CPU: vendor Intel device 806c1
513 12:17:26.091250 CPU: family 06, model 8c, stepping 01
514 12:17:26.094582 Clearing out pending MCEs
515 12:17:26.098094 Setting up local APIC...
516 12:17:26.101530 apic_id: 0x00 done.
517 12:17:26.104455 Turbo is available but hidden
518 12:17:26.104542 Turbo is available and visible
519 12:17:26.111606 microcode: Update skipped, already up-to-date
520 12:17:26.114374 CPU #0 initialized
521 12:17:26.114470 Initializing CPU #6
522 12:17:26.117741 Initializing CPU #3
523 12:17:26.121340 CPU: vendor Intel device 806c1
524 12:17:26.124361 CPU: family 06, model 8c, stepping 01
525 12:17:26.124443 Initializing CPU #5
526 12:17:26.127662 Initializing CPU #2
527 12:17:26.131677 CPU: vendor Intel device 806c1
528 12:17:26.134779 CPU: family 06, model 8c, stepping 01
529 12:17:26.137931 CPU: vendor Intel device 806c1
530 12:17:26.140999 CPU: family 06, model 8c, stepping 01
531 12:17:26.144516 Clearing out pending MCEs
532 12:17:26.148046 Clearing out pending MCEs
533 12:17:26.151192 Setting up local APIC...
534 12:17:26.151278 Initializing CPU #4
535 12:17:26.154426 Initializing CPU #7
536 12:17:26.157455 CPU: vendor Intel device 806c1
537 12:17:26.161473 CPU: family 06, model 8c, stepping 01
538 12:17:26.164185 CPU: vendor Intel device 806c1
539 12:17:26.168115 CPU: family 06, model 8c, stepping 01
540 12:17:26.171835 Clearing out pending MCEs
541 12:17:26.171920 apic_id: 0x06 done.
542 12:17:26.175862 Clearing out pending MCEs
543 12:17:26.178915 Setting up local APIC...
544 12:17:26.179004 Initializing CPU #1
545 12:17:26.182394 apic_id: 0x04 done.
546 12:17:26.185387 Setting up local APIC...
547 12:17:26.189038 CPU: vendor Intel device 806c1
548 12:17:26.192150 CPU: family 06, model 8c, stepping 01
549 12:17:26.195497 Clearing out pending MCEs
550 12:17:26.195593 Clearing out pending MCEs
551 12:17:26.198985 Setting up local APIC...
552 12:17:26.202010 Setting up local APIC...
553 12:17:26.205235 CPU: vendor Intel device 806c1
554 12:17:26.208942 CPU: family 06, model 8c, stepping 01
555 12:17:26.212308 apic_id: 0x05 done.
556 12:17:26.215703 microcode: Update skipped, already up-to-date
557 12:17:26.219035 microcode: Update skipped, already up-to-date
558 12:17:26.222229 Clearing out pending MCEs
559 12:17:26.225326 apic_id: 0x07 done.
560 12:17:26.228732 microcode: Update skipped, already up-to-date
561 12:17:26.235263 microcode: Update skipped, already up-to-date
562 12:17:26.235358 CPU #5 initialized
563 12:17:26.238562 CPU #2 initialized
564 12:17:26.238659 apic_id: 0x02 done.
565 12:17:26.242041 Setting up local APIC...
566 12:17:26.248676 microcode: Update skipped, already up-to-date
567 12:17:26.248798 apic_id: 0x03 done.
568 12:17:26.252213 CPU #6 initialized
569 12:17:26.255494 microcode: Update skipped, already up-to-date
570 12:17:26.259125 CPU #4 initialized
571 12:17:26.259222 CPU #7 initialized
572 12:17:26.262106 CPU #3 initialized
573 12:17:26.265349 Setting up local APIC...
574 12:17:26.265446 apic_id: 0x01 done.
575 12:17:26.271984 microcode: Update skipped, already up-to-date
576 12:17:26.272092 CPU #1 initialized
577 12:17:26.278485 bsp_do_flight_plan done after 454 msecs.
578 12:17:26.281878 CPU: frequency set to 4400 MHz
579 12:17:26.281976 Enabling SMIs.
580 12:17:26.288011 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
581 12:17:26.304179 SATAXPCIE1 indicates PCIe NVMe is present
582 12:17:26.307680 Probing TPM: done!
583 12:17:26.311027 Connected to device vid:did:rid of 1ae0:0028:00
584 12:17:26.321543 Firmware version: B2-C:0 RO_A:0.0.11/bc74f7dc RW_B:0.5.30/cr50_v1.9311_mp.7-535187521e
585 12:17:26.324919 Initialized TPM device CR50 revision 0
586 12:17:26.328653 Enabling S0i3.4
587 12:17:26.335080 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
588 12:17:26.338557 Found a VBT of 8704 bytes after decompression
589 12:17:26.345039 cse_lite: CSE RO boot. HybridStorageMode disabled
590 12:17:26.351384 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
591 12:17:26.427256 FSPS returned 0
592 12:17:26.430676 Executing Phase 1 of FspMultiPhaseSiInit
593 12:17:26.440274 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
594 12:17:26.444019 port C0 DISC req: usage 1 usb3 1 usb2 5
595 12:17:26.447043 Raw Buffer output 0 00000511
596 12:17:26.450483 Raw Buffer output 1 00000000
597 12:17:26.454049 pmc_send_ipc_cmd succeeded
598 12:17:26.461008 port C1 DISC req: usage 1 usb3 2 usb2 3
599 12:17:26.461106 Raw Buffer output 0 00000321
600 12:17:26.463833 Raw Buffer output 1 00000000
601 12:17:26.468086 pmc_send_ipc_cmd succeeded
602 12:17:26.473211 Detected 4 core, 8 thread CPU.
603 12:17:26.476887 Detected 4 core, 8 thread CPU.
604 12:17:26.676855 Display FSP Version Info HOB
605 12:17:26.680335 Reference Code - CPU = a.0.4c.31
606 12:17:26.683050 uCode Version = 0.0.0.86
607 12:17:26.686424 TXT ACM version = ff.ff.ff.ffff
608 12:17:26.689645 Reference Code - ME = a.0.4c.31
609 12:17:26.693431 MEBx version = 0.0.0.0
610 12:17:26.696190 ME Firmware Version = Consumer SKU
611 12:17:26.699471 Reference Code - PCH = a.0.4c.31
612 12:17:26.702839 PCH-CRID Status = Disabled
613 12:17:26.706165 PCH-CRID Original Value = ff.ff.ff.ffff
614 12:17:26.709408 PCH-CRID New Value = ff.ff.ff.ffff
615 12:17:26.713484 OPROM - RST - RAID = ff.ff.ff.ffff
616 12:17:26.716207 PCH Hsio Version = 4.0.0.0
617 12:17:26.719395 Reference Code - SA - System Agent = a.0.4c.31
618 12:17:26.722620 Reference Code - MRC = 2.0.0.1
619 12:17:26.725953 SA - PCIe Version = a.0.4c.31
620 12:17:26.729547 SA-CRID Status = Disabled
621 12:17:26.733131 SA-CRID Original Value = 0.0.0.1
622 12:17:26.735979 SA-CRID New Value = 0.0.0.1
623 12:17:26.740000 OPROM - VBIOS = ff.ff.ff.ffff
624 12:17:26.742911 IO Manageability Engine FW Version = 11.1.4.0
625 12:17:26.746146 PHY Build Version = 0.0.0.e0
626 12:17:26.749733 Thunderbolt(TM) FW Version = 0.0.0.0
627 12:17:26.757237 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
628 12:17:26.757336 ITSS IRQ Polarities Before:
629 12:17:26.760655 IPC0: 0xffffffff
630 12:17:26.760751 IPC1: 0xffffffff
631 12:17:26.763692 IPC2: 0xffffffff
632 12:17:26.767119 IPC3: 0xffffffff
633 12:17:26.767216 ITSS IRQ Polarities After:
634 12:17:26.770685 IPC0: 0xffffffff
635 12:17:26.770782 IPC1: 0xffffffff
636 12:17:26.773768 IPC2: 0xffffffff
637 12:17:26.776833 IPC3: 0xffffffff
638 12:17:26.780445 Found PCIe Root Port #9 at PCI: 00:1d.0.
639 12:17:26.790526 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
640 12:17:26.803396 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
641 12:17:26.816794 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
642 12:17:26.823486 BS: BS_DEV_INIT_CHIPS run times (exec / console): 291 / 236 ms
643 12:17:26.823584 Enumerating buses...
644 12:17:26.830171 Show all devs... Before device enumeration.
645 12:17:26.830269 Root Device: enabled 1
646 12:17:26.833405 DOMAIN: 0000: enabled 1
647 12:17:26.836824 CPU_CLUSTER: 0: enabled 1
648 12:17:26.840175 PCI: 00:00.0: enabled 1
649 12:17:26.840272 PCI: 00:02.0: enabled 1
650 12:17:26.843341 PCI: 00:04.0: enabled 1
651 12:17:26.846384 PCI: 00:05.0: enabled 1
652 12:17:26.846482 PCI: 00:06.0: enabled 0
653 12:17:26.850231 PCI: 00:07.0: enabled 0
654 12:17:26.853471 PCI: 00:07.1: enabled 0
655 12:17:26.856927 PCI: 00:07.2: enabled 0
656 12:17:26.857025 PCI: 00:07.3: enabled 0
657 12:17:26.859640 PCI: 00:08.0: enabled 1
658 12:17:26.863218 PCI: 00:09.0: enabled 0
659 12:17:26.866761 PCI: 00:0a.0: enabled 0
660 12:17:26.866859 PCI: 00:0d.0: enabled 1
661 12:17:26.869772 PCI: 00:0d.1: enabled 0
662 12:17:26.873498 PCI: 00:0d.2: enabled 0
663 12:17:26.876512 PCI: 00:0d.3: enabled 0
664 12:17:26.876609 PCI: 00:0e.0: enabled 0
665 12:17:26.879913 PCI: 00:10.2: enabled 1
666 12:17:26.883498 PCI: 00:10.6: enabled 0
667 12:17:26.886450 PCI: 00:10.7: enabled 0
668 12:17:26.886547 PCI: 00:12.0: enabled 0
669 12:17:26.889789 PCI: 00:12.6: enabled 0
670 12:17:26.893013 PCI: 00:13.0: enabled 0
671 12:17:26.893111 PCI: 00:14.0: enabled 1
672 12:17:26.896263 PCI: 00:14.1: enabled 0
673 12:17:26.899848 PCI: 00:14.2: enabled 1
674 12:17:26.903101 PCI: 00:14.3: enabled 1
675 12:17:26.903199 PCI: 00:15.0: enabled 1
676 12:17:26.906136 PCI: 00:15.1: enabled 1
677 12:17:26.909904 PCI: 00:15.2: enabled 1
678 12:17:26.913324 PCI: 00:15.3: enabled 1
679 12:17:26.913421 PCI: 00:16.0: enabled 1
680 12:17:26.916482 PCI: 00:16.1: enabled 0
681 12:17:26.919899 PCI: 00:16.2: enabled 0
682 12:17:26.922873 PCI: 00:16.3: enabled 0
683 12:17:26.922970 PCI: 00:16.4: enabled 0
684 12:17:26.926604 PCI: 00:16.5: enabled 0
685 12:17:26.929489 PCI: 00:17.0: enabled 1
686 12:17:26.929586 PCI: 00:19.0: enabled 0
687 12:17:26.932949 PCI: 00:19.1: enabled 1
688 12:17:26.936480 PCI: 00:19.2: enabled 0
689 12:17:26.939422 PCI: 00:1c.0: enabled 1
690 12:17:26.939525 PCI: 00:1c.1: enabled 0
691 12:17:26.942850 PCI: 00:1c.2: enabled 0
692 12:17:26.946392 PCI: 00:1c.3: enabled 0
693 12:17:26.949410 PCI: 00:1c.4: enabled 0
694 12:17:26.949508 PCI: 00:1c.5: enabled 0
695 12:17:26.952600 PCI: 00:1c.6: enabled 1
696 12:17:26.956524 PCI: 00:1c.7: enabled 0
697 12:17:26.959722 PCI: 00:1d.0: enabled 1
698 12:17:26.959820 PCI: 00:1d.1: enabled 0
699 12:17:26.962636 PCI: 00:1d.2: enabled 1
700 12:17:26.965916 PCI: 00:1d.3: enabled 0
701 12:17:26.969070 PCI: 00:1e.0: enabled 1
702 12:17:26.969168 PCI: 00:1e.1: enabled 0
703 12:17:26.972930 PCI: 00:1e.2: enabled 1
704 12:17:26.976112 PCI: 00:1e.3: enabled 1
705 12:17:26.976210 PCI: 00:1f.0: enabled 1
706 12:17:26.979110 PCI: 00:1f.1: enabled 0
707 12:17:26.982772 PCI: 00:1f.2: enabled 1
708 12:17:26.985852 PCI: 00:1f.3: enabled 1
709 12:17:26.985950 PCI: 00:1f.4: enabled 0
710 12:17:26.989836 PCI: 00:1f.5: enabled 1
711 12:17:26.992659 PCI: 00:1f.6: enabled 0
712 12:17:26.996217 PCI: 00:1f.7: enabled 0
713 12:17:26.996315 APIC: 00: enabled 1
714 12:17:26.999292 GENERIC: 0.0: enabled 1
715 12:17:27.002355 GENERIC: 0.0: enabled 1
716 12:17:27.002453 GENERIC: 1.0: enabled 1
717 12:17:27.005815 GENERIC: 0.0: enabled 1
718 12:17:27.009297 GENERIC: 1.0: enabled 1
719 12:17:27.013390 USB0 port 0: enabled 1
720 12:17:27.013489 GENERIC: 0.0: enabled 1
721 12:17:27.015772 USB0 port 0: enabled 1
722 12:17:27.018992 GENERIC: 0.0: enabled 1
723 12:17:27.019090 I2C: 00:1a: enabled 1
724 12:17:27.022287 I2C: 00:31: enabled 1
725 12:17:27.025926 I2C: 00:32: enabled 1
726 12:17:27.029120 I2C: 00:10: enabled 1
727 12:17:27.029227 I2C: 00:15: enabled 1
728 12:17:27.032444 GENERIC: 0.0: enabled 0
729 12:17:27.035966 GENERIC: 1.0: enabled 0
730 12:17:27.036063 GENERIC: 0.0: enabled 1
731 12:17:27.039011 SPI: 00: enabled 1
732 12:17:27.042459 SPI: 00: enabled 1
733 12:17:27.042557 PNP: 0c09.0: enabled 1
734 12:17:27.045510 GENERIC: 0.0: enabled 1
735 12:17:27.049248 USB3 port 0: enabled 1
736 12:17:27.049346 USB3 port 1: enabled 1
737 12:17:27.052295 USB3 port 2: enabled 0
738 12:17:27.055790 USB3 port 3: enabled 0
739 12:17:27.059270 USB2 port 0: enabled 0
740 12:17:27.059367 USB2 port 1: enabled 1
741 12:17:27.062756 USB2 port 2: enabled 1
742 12:17:27.065339 USB2 port 3: enabled 0
743 12:17:27.065437 USB2 port 4: enabled 1
744 12:17:27.068889 USB2 port 5: enabled 0
745 12:17:27.072005 USB2 port 6: enabled 0
746 12:17:27.075398 USB2 port 7: enabled 0
747 12:17:27.075496 USB2 port 8: enabled 0
748 12:17:27.078547 USB2 port 9: enabled 0
749 12:17:27.082134 USB3 port 0: enabled 0
750 12:17:27.082232 USB3 port 1: enabled 1
751 12:17:27.085161 USB3 port 2: enabled 0
752 12:17:27.088670 USB3 port 3: enabled 0
753 12:17:27.088768 GENERIC: 0.0: enabled 1
754 12:17:27.092620 GENERIC: 1.0: enabled 1
755 12:17:27.095781 APIC: 01: enabled 1
756 12:17:27.095878 APIC: 07: enabled 1
757 12:17:27.098696 APIC: 03: enabled 1
758 12:17:27.102499 APIC: 04: enabled 1
759 12:17:27.102597 APIC: 06: enabled 1
760 12:17:27.105403 APIC: 02: enabled 1
761 12:17:27.108593 APIC: 05: enabled 1
762 12:17:27.108690 Compare with tree...
763 12:17:27.112277 Root Device: enabled 1
764 12:17:27.115590 DOMAIN: 0000: enabled 1
765 12:17:27.115688 PCI: 00:00.0: enabled 1
766 12:17:27.118733 PCI: 00:02.0: enabled 1
767 12:17:27.122129 PCI: 00:04.0: enabled 1
768 12:17:27.125528 GENERIC: 0.0: enabled 1
769 12:17:27.128822 PCI: 00:05.0: enabled 1
770 12:17:27.128919 PCI: 00:06.0: enabled 0
771 12:17:27.131894 PCI: 00:07.0: enabled 0
772 12:17:27.135528 GENERIC: 0.0: enabled 1
773 12:17:27.138378 PCI: 00:07.1: enabled 0
774 12:17:27.142086 GENERIC: 1.0: enabled 1
775 12:17:27.142183 PCI: 00:07.2: enabled 0
776 12:17:27.145086 GENERIC: 0.0: enabled 1
777 12:17:27.148579 PCI: 00:07.3: enabled 0
778 12:17:27.151656 GENERIC: 1.0: enabled 1
779 12:17:27.155166 PCI: 00:08.0: enabled 1
780 12:17:27.158319 PCI: 00:09.0: enabled 0
781 12:17:27.158422 PCI: 00:0a.0: enabled 0
782 12:17:27.162018 PCI: 00:0d.0: enabled 1
783 12:17:27.165049 USB0 port 0: enabled 1
784 12:17:27.168659 USB3 port 0: enabled 1
785 12:17:27.171910 USB3 port 1: enabled 1
786 12:17:27.172007 USB3 port 2: enabled 0
787 12:17:27.175469 USB3 port 3: enabled 0
788 12:17:27.178269 PCI: 00:0d.1: enabled 0
789 12:17:27.181831 PCI: 00:0d.2: enabled 0
790 12:17:27.185013 GENERIC: 0.0: enabled 1
791 12:17:27.185111 PCI: 00:0d.3: enabled 0
792 12:17:27.188257 PCI: 00:0e.0: enabled 0
793 12:17:27.191929 PCI: 00:10.2: enabled 1
794 12:17:27.194948 PCI: 00:10.6: enabled 0
795 12:17:27.198544 PCI: 00:10.7: enabled 0
796 12:17:27.198640 PCI: 00:12.0: enabled 0
797 12:17:27.201561 PCI: 00:12.6: enabled 0
798 12:17:27.205002 PCI: 00:13.0: enabled 0
799 12:17:27.208405 PCI: 00:14.0: enabled 1
800 12:17:27.211631 USB0 port 0: enabled 1
801 12:17:27.211728 USB2 port 0: enabled 0
802 12:17:27.215261 USB2 port 1: enabled 1
803 12:17:27.218533 USB2 port 2: enabled 1
804 12:17:27.221653 USB2 port 3: enabled 0
805 12:17:27.224657 USB2 port 4: enabled 1
806 12:17:27.224752 USB2 port 5: enabled 0
807 12:17:27.228019 USB2 port 6: enabled 0
808 12:17:27.231383 USB2 port 7: enabled 0
809 12:17:27.235113 USB2 port 8: enabled 0
810 12:17:27.237950 USB2 port 9: enabled 0
811 12:17:27.241480 USB3 port 0: enabled 0
812 12:17:27.241576 USB3 port 1: enabled 1
813 12:17:27.244957 USB3 port 2: enabled 0
814 12:17:27.248263 USB3 port 3: enabled 0
815 12:17:27.251672 PCI: 00:14.1: enabled 0
816 12:17:27.254678 PCI: 00:14.2: enabled 1
817 12:17:27.254774 PCI: 00:14.3: enabled 1
818 12:17:27.258169 GENERIC: 0.0: enabled 1
819 12:17:27.261324 PCI: 00:15.0: enabled 1
820 12:17:27.265210 I2C: 00:1a: enabled 1
821 12:17:27.268066 I2C: 00:31: enabled 1
822 12:17:27.268163 I2C: 00:32: enabled 1
823 12:17:27.271127 PCI: 00:15.1: enabled 1
824 12:17:27.274693 I2C: 00:10: enabled 1
825 12:17:27.277824 PCI: 00:15.2: enabled 1
826 12:17:27.281544 PCI: 00:15.3: enabled 1
827 12:17:27.281640 PCI: 00:16.0: enabled 1
828 12:17:27.284634 PCI: 00:16.1: enabled 0
829 12:17:27.288031 PCI: 00:16.2: enabled 0
830 12:17:27.291217 PCI: 00:16.3: enabled 0
831 12:17:27.291313 PCI: 00:16.4: enabled 0
832 12:17:27.294484 PCI: 00:16.5: enabled 0
833 12:17:27.297817 PCI: 00:17.0: enabled 1
834 12:17:27.301223 PCI: 00:19.0: enabled 0
835 12:17:27.304651 PCI: 00:19.1: enabled 1
836 12:17:27.304747 I2C: 00:15: enabled 1
837 12:17:27.307790 PCI: 00:19.2: enabled 0
838 12:17:27.311614 PCI: 00:1d.0: enabled 1
839 12:17:27.314508 GENERIC: 0.0: enabled 1
840 12:17:27.318212 PCI: 00:1e.0: enabled 1
841 12:17:27.318308 PCI: 00:1e.1: enabled 0
842 12:17:27.321327 PCI: 00:1e.2: enabled 1
843 12:17:27.324784 SPI: 00: enabled 1
844 12:17:27.327801 PCI: 00:1e.3: enabled 1
845 12:17:27.327897 SPI: 00: enabled 1
846 12:17:27.331040 PCI: 00:1f.0: enabled 1
847 12:17:27.334852 PNP: 0c09.0: enabled 1
848 12:17:27.337718 PCI: 00:1f.1: enabled 0
849 12:17:27.341038 PCI: 00:1f.2: enabled 1
850 12:17:27.341134 GENERIC: 0.0: enabled 1
851 12:17:27.344456 GENERIC: 0.0: enabled 1
852 12:17:27.347578 GENERIC: 1.0: enabled 1
853 12:17:27.351221 PCI: 00:1f.3: enabled 1
854 12:17:27.354215 PCI: 00:1f.4: enabled 0
855 12:17:27.354311 PCI: 00:1f.5: enabled 1
856 12:17:27.357400 PCI: 00:1f.6: enabled 0
857 12:17:27.361136 PCI: 00:1f.7: enabled 0
858 12:17:27.364495 CPU_CLUSTER: 0: enabled 1
859 12:17:27.367247 APIC: 00: enabled 1
860 12:17:27.367343 APIC: 01: enabled 1
861 12:17:27.370904 APIC: 07: enabled 1
862 12:17:27.422616 APIC: 03: enabled 1
863 12:17:27.422726 APIC: 04: enabled 1
864 12:17:27.422802 APIC: 06: enabled 1
865 12:17:27.423085 APIC: 02: enabled 1
866 12:17:27.423191 APIC: 05: enabled 1
867 12:17:27.423267 Root Device scanning...
868 12:17:27.423543 scan_static_bus for Root Device
869 12:17:27.423632 DOMAIN: 0000 enabled
870 12:17:27.423704 CPU_CLUSTER: 0 enabled
871 12:17:27.423771 DOMAIN: 0000 scanning...
872 12:17:27.423837 PCI: pci_scan_bus for bus 00
873 12:17:27.423910 PCI: 00:00.0 [8086/0000] ops
874 12:17:27.423974 PCI: 00:00.0 [8086/9a12] enabled
875 12:17:27.424038 PCI: 00:02.0 [8086/0000] bus ops
876 12:17:27.424298 PCI: 00:02.0 [8086/9a40] enabled
877 12:17:27.424371 PCI: 00:04.0 [8086/0000] bus ops
878 12:17:27.424437 PCI: 00:04.0 [8086/9a03] enabled
879 12:17:27.424502 PCI: 00:05.0 [8086/9a19] enabled
880 12:17:27.469712 PCI: 00:07.0 [0000/0000] hidden
881 12:17:27.469815 PCI: 00:08.0 [8086/9a11] enabled
882 12:17:27.470082 PCI: 00:0a.0 [8086/9a0d] disabled
883 12:17:27.470169 PCI: 00:0d.0 [8086/0000] bus ops
884 12:17:27.470428 PCI: 00:0d.0 [8086/9a13] enabled
885 12:17:27.470506 PCI: 00:14.0 [8086/0000] bus ops
886 12:17:27.470769 PCI: 00:14.0 [8086/a0ed] enabled
887 12:17:27.470843 PCI: 00:14.2 [8086/a0ef] enabled
888 12:17:27.470911 PCI: 00:14.3 [8086/0000] bus ops
889 12:17:27.470980 PCI: 00:14.3 [8086/a0f0] enabled
890 12:17:27.471412 PCI: 00:15.0 [8086/0000] bus ops
891 12:17:27.471745 PCI: 00:15.0 [8086/a0e8] enabled
892 12:17:27.471819 PCI: 00:15.1 [8086/0000] bus ops
893 12:17:27.474725 PCI: 00:15.1 [8086/a0e9] enabled
894 12:17:27.474808 PCI: 00:15.2 [8086/0000] bus ops
895 12:17:27.477607 PCI: 00:15.2 [8086/a0ea] enabled
896 12:17:27.477684 PCI: 00:15.3 [8086/0000] bus ops
897 12:17:27.480799 PCI: 00:15.3 [8086/a0eb] enabled
898 12:17:27.484511 PCI: 00:16.0 [8086/0000] ops
899 12:17:27.487934 PCI: 00:16.0 [8086/a0e0] enabled
900 12:17:27.494187 PCI: Static device PCI: 00:17.0 not found, disabling it.
901 12:17:27.497289 PCI: 00:19.0 [8086/0000] bus ops
902 12:17:27.500607 PCI: 00:19.0 [8086/a0c5] disabled
903 12:17:27.504198 PCI: 00:19.1 [8086/0000] bus ops
904 12:17:27.507069 PCI: 00:19.1 [8086/a0c6] enabled
905 12:17:27.510492 PCI: 00:1d.0 [8086/0000] bus ops
906 12:17:27.514110 PCI: 00:1d.0 [8086/a0b0] enabled
907 12:17:27.517650 PCI: 00:1e.0 [8086/0000] ops
908 12:17:27.520703 PCI: 00:1e.0 [8086/a0a8] enabled
909 12:17:27.524038 PCI: 00:1e.2 [8086/0000] bus ops
910 12:17:27.527260 PCI: 00:1e.2 [8086/a0aa] enabled
911 12:17:27.530329 PCI: 00:1e.3 [8086/0000] bus ops
912 12:17:27.533850 PCI: 00:1e.3 [8086/a0ab] enabled
913 12:17:27.536965 PCI: 00:1f.0 [8086/0000] bus ops
914 12:17:27.539953 PCI: 00:1f.0 [8086/a087] enabled
915 12:17:27.540035 RTC Init
916 12:17:27.546693 Set power on after power failure.
917 12:17:27.546782 Disabling Deep S3
918 12:17:27.550256 Disabling Deep S3
919 12:17:27.550339 Disabling Deep S4
920 12:17:27.553715 Disabling Deep S4
921 12:17:27.553798 Disabling Deep S5
922 12:17:27.556649 Disabling Deep S5
923 12:17:27.560117 PCI: 00:1f.2 [0000/0000] hidden
924 12:17:27.563504 PCI: 00:1f.3 [8086/0000] bus ops
925 12:17:27.567057 PCI: 00:1f.3 [8086/a0c8] enabled
926 12:17:27.570193 PCI: 00:1f.5 [8086/0000] bus ops
927 12:17:27.573041 PCI: 00:1f.5 [8086/a0a4] enabled
928 12:17:27.576386 PCI: Leftover static devices:
929 12:17:27.576468 PCI: 00:10.2
930 12:17:27.579808 PCI: 00:10.6
931 12:17:27.579894 PCI: 00:10.7
932 12:17:27.579967 PCI: 00:06.0
933 12:17:27.583551 PCI: 00:07.1
934 12:17:27.583633 PCI: 00:07.2
935 12:17:27.587083 PCI: 00:07.3
936 12:17:27.587166 PCI: 00:09.0
937 12:17:27.589752 PCI: 00:0d.1
938 12:17:27.589833 PCI: 00:0d.2
939 12:17:27.589900 PCI: 00:0d.3
940 12:17:27.593352 PCI: 00:0e.0
941 12:17:27.593430 PCI: 00:12.0
942 12:17:27.596463 PCI: 00:12.6
943 12:17:27.596550 PCI: 00:13.0
944 12:17:27.596634 PCI: 00:14.1
945 12:17:27.600046 PCI: 00:16.1
946 12:17:27.600149 PCI: 00:16.2
947 12:17:27.602853 PCI: 00:16.3
948 12:17:27.602945 PCI: 00:16.4
949 12:17:27.606251 PCI: 00:16.5
950 12:17:27.606344 PCI: 00:17.0
951 12:17:27.606430 PCI: 00:19.2
952 12:17:27.609788 PCI: 00:1e.1
953 12:17:27.609883 PCI: 00:1f.1
954 12:17:27.612911 PCI: 00:1f.4
955 12:17:27.613003 PCI: 00:1f.6
956 12:17:27.613076 PCI: 00:1f.7
957 12:17:27.616142 PCI: Check your devicetree.cb.
958 12:17:27.620029 PCI: 00:02.0 scanning...
959 12:17:27.622922 scan_generic_bus for PCI: 00:02.0
960 12:17:27.626044 scan_generic_bus for PCI: 00:02.0 done
961 12:17:27.633046 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
962 12:17:27.636161 PCI: 00:04.0 scanning...
963 12:17:27.639386 scan_generic_bus for PCI: 00:04.0
964 12:17:27.639477 GENERIC: 0.0 enabled
965 12:17:27.645975 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
966 12:17:27.652990 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
967 12:17:27.653081 PCI: 00:0d.0 scanning...
968 12:17:27.656194 scan_static_bus for PCI: 00:0d.0
969 12:17:27.659888 USB0 port 0 enabled
970 12:17:27.662676 USB0 port 0 scanning...
971 12:17:27.666095 scan_static_bus for USB0 port 0
972 12:17:27.669263 USB3 port 0 enabled
973 12:17:27.669356 USB3 port 1 enabled
974 12:17:27.672271 USB3 port 2 disabled
975 12:17:27.672364 USB3 port 3 disabled
976 12:17:27.676040 USB3 port 0 scanning...
977 12:17:27.678985 scan_static_bus for USB3 port 0
978 12:17:27.682393 scan_static_bus for USB3 port 0 done
979 12:17:27.688730 scan_bus: bus USB3 port 0 finished in 6 msecs
980 12:17:27.688821 USB3 port 1 scanning...
981 12:17:27.692797 scan_static_bus for USB3 port 1
982 12:17:27.699178 scan_static_bus for USB3 port 1 done
983 12:17:27.703011 scan_bus: bus USB3 port 1 finished in 6 msecs
984 12:17:27.705589 scan_static_bus for USB0 port 0 done
985 12:17:27.712355 scan_bus: bus USB0 port 0 finished in 43 msecs
986 12:17:27.716124 scan_static_bus for PCI: 00:0d.0 done
987 12:17:27.718787 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
988 12:17:27.722502 PCI: 00:14.0 scanning...
989 12:17:27.725727 scan_static_bus for PCI: 00:14.0
990 12:17:27.728935 USB0 port 0 enabled
991 12:17:27.729027 USB0 port 0 scanning...
992 12:17:27.732308 scan_static_bus for USB0 port 0
993 12:17:27.735697 USB2 port 0 disabled
994 12:17:27.738527 USB2 port 1 enabled
995 12:17:27.738621 USB2 port 2 enabled
996 12:17:27.741836 USB2 port 3 disabled
997 12:17:27.745847 USB2 port 4 enabled
998 12:17:27.745940 USB2 port 5 disabled
999 12:17:27.748314 USB2 port 6 disabled
1000 12:17:27.752016 USB2 port 7 disabled
1001 12:17:27.752110 USB2 port 8 disabled
1002 12:17:27.755187 USB2 port 9 disabled
1003 12:17:27.755288 USB3 port 0 disabled
1004 12:17:27.758689 USB3 port 1 enabled
1005 12:17:27.761525 USB3 port 2 disabled
1006 12:17:27.761619 USB3 port 3 disabled
1007 12:17:27.765187 USB2 port 1 scanning...
1008 12:17:27.768516 scan_static_bus for USB2 port 1
1009 12:17:27.771800 scan_static_bus for USB2 port 1 done
1010 12:17:27.778451 scan_bus: bus USB2 port 1 finished in 6 msecs
1011 12:17:27.778544 USB2 port 2 scanning...
1012 12:17:27.781509 scan_static_bus for USB2 port 2
1013 12:17:27.788273 scan_static_bus for USB2 port 2 done
1014 12:17:27.791855 scan_bus: bus USB2 port 2 finished in 6 msecs
1015 12:17:27.795062 USB2 port 4 scanning...
1016 12:17:27.798463 scan_static_bus for USB2 port 4
1017 12:17:27.801462 scan_static_bus for USB2 port 4 done
1018 12:17:27.804689 scan_bus: bus USB2 port 4 finished in 6 msecs
1019 12:17:27.808656 USB3 port 1 scanning...
1020 12:17:27.811530 scan_static_bus for USB3 port 1
1021 12:17:27.814786 scan_static_bus for USB3 port 1 done
1022 12:17:27.821325 scan_bus: bus USB3 port 1 finished in 6 msecs
1023 12:17:27.825066 scan_static_bus for USB0 port 0 done
1024 12:17:27.828297 scan_bus: bus USB0 port 0 finished in 93 msecs
1025 12:17:27.831058 scan_static_bus for PCI: 00:14.0 done
1026 12:17:27.838098 scan_bus: bus PCI: 00:14.0 finished in 109 msecs
1027 12:17:27.838192 PCI: 00:14.3 scanning...
1028 12:17:27.841095 scan_static_bus for PCI: 00:14.3
1029 12:17:27.844820 GENERIC: 0.0 enabled
1030 12:17:27.848171 scan_static_bus for PCI: 00:14.3 done
1031 12:17:27.854627 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1032 12:17:27.854722 PCI: 00:15.0 scanning...
1033 12:17:27.857898 scan_static_bus for PCI: 00:15.0
1034 12:17:27.861909 I2C: 00:1a enabled
1035 12:17:27.864502 I2C: 00:31 enabled
1036 12:17:27.864594 I2C: 00:32 enabled
1037 12:17:27.868315 scan_static_bus for PCI: 00:15.0 done
1038 12:17:27.874855 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1039 12:17:27.877747 PCI: 00:15.1 scanning...
1040 12:17:27.881171 scan_static_bus for PCI: 00:15.1
1041 12:17:27.881275 I2C: 00:10 enabled
1042 12:17:27.884684 scan_static_bus for PCI: 00:15.1 done
1043 12:17:27.891066 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1044 12:17:27.894835 PCI: 00:15.2 scanning...
1045 12:17:27.898049 scan_static_bus for PCI: 00:15.2
1046 12:17:27.901322 scan_static_bus for PCI: 00:15.2 done
1047 12:17:27.904279 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1048 12:17:27.907618 PCI: 00:15.3 scanning...
1049 12:17:27.910968 scan_static_bus for PCI: 00:15.3
1050 12:17:27.914184 scan_static_bus for PCI: 00:15.3 done
1051 12:17:27.920996 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1052 12:17:27.921095 PCI: 00:19.1 scanning...
1053 12:17:27.924541 scan_static_bus for PCI: 00:19.1
1054 12:17:27.927967 I2C: 00:15 enabled
1055 12:17:27.930786 scan_static_bus for PCI: 00:19.1 done
1056 12:17:27.937529 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1057 12:17:27.937625 PCI: 00:1d.0 scanning...
1058 12:17:27.944336 do_pci_scan_bridge for PCI: 00:1d.0
1059 12:17:27.944435 PCI: pci_scan_bus for bus 01
1060 12:17:27.947388 PCI: 01:00.0 [15b7/5009] enabled
1061 12:17:27.951189 GENERIC: 0.0 enabled
1062 12:17:27.954202 Enabling Common Clock Configuration
1063 12:17:27.960913 L1 Sub-State supported from root port 29
1064 12:17:27.961009 L1 Sub-State Support = 0x5
1065 12:17:27.964460 CommonModeRestoreTime = 0x28
1066 12:17:27.970377 Power On Value = 0x16, Power On Scale = 0x0
1067 12:17:27.970473 ASPM: Enabled L1
1068 12:17:27.973676 PCIe: Max_Payload_Size adjusted to 128
1069 12:17:27.980353 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1070 12:17:27.983893 PCI: 00:1e.2 scanning...
1071 12:17:27.987131 scan_generic_bus for PCI: 00:1e.2
1072 12:17:27.987227 SPI: 00 enabled
1073 12:17:27.993827 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1074 12:17:27.997366 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1075 12:17:28.000884 PCI: 00:1e.3 scanning...
1076 12:17:28.004136 scan_generic_bus for PCI: 00:1e.3
1077 12:17:28.007236 SPI: 00 enabled
1078 12:17:28.014244 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1079 12:17:28.017279 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1080 12:17:28.020600 PCI: 00:1f.0 scanning...
1081 12:17:28.023727 scan_static_bus for PCI: 00:1f.0
1082 12:17:28.023825 PNP: 0c09.0 enabled
1083 12:17:28.027147 PNP: 0c09.0 scanning...
1084 12:17:28.030852 scan_static_bus for PNP: 0c09.0
1085 12:17:28.034002 scan_static_bus for PNP: 0c09.0 done
1086 12:17:28.040447 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1087 12:17:28.043465 scan_static_bus for PCI: 00:1f.0 done
1088 12:17:28.046817 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1089 12:17:28.050119 PCI: 00:1f.2 scanning...
1090 12:17:28.053444 scan_static_bus for PCI: 00:1f.2
1091 12:17:28.057109 GENERIC: 0.0 enabled
1092 12:17:28.060207 GENERIC: 0.0 scanning...
1093 12:17:28.063365 scan_static_bus for GENERIC: 0.0
1094 12:17:28.063462 GENERIC: 0.0 enabled
1095 12:17:28.066973 GENERIC: 1.0 enabled
1096 12:17:28.069861 scan_static_bus for GENERIC: 0.0 done
1097 12:17:28.076662 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1098 12:17:28.079770 scan_static_bus for PCI: 00:1f.2 done
1099 12:17:28.083446 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1100 12:17:28.086406 PCI: 00:1f.3 scanning...
1101 12:17:28.089660 scan_static_bus for PCI: 00:1f.3
1102 12:17:28.093557 scan_static_bus for PCI: 00:1f.3 done
1103 12:17:28.099673 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1104 12:17:28.099771 PCI: 00:1f.5 scanning...
1105 12:17:28.103572 scan_generic_bus for PCI: 00:1f.5
1106 12:17:28.109929 scan_generic_bus for PCI: 00:1f.5 done
1107 12:17:28.112943 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1108 12:17:28.119671 scan_bus: bus DOMAIN: 0000 finished in 716 msecs
1109 12:17:28.122694 scan_static_bus for Root Device done
1110 12:17:28.126468 scan_bus: bus Root Device finished in 735 msecs
1111 12:17:28.126565 done
1112 12:17:28.132476 BS: BS_DEV_ENUMERATE run times (exec / console): 10 / 1295 ms
1113 12:17:28.135927 Chrome EC: UHEPI supported
1114 12:17:28.142385 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1115 12:17:28.149386 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1116 12:17:28.152369 SPI flash protection: WPSW=0 SRP0=1
1117 12:17:28.155607 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1118 12:17:28.162128 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1119 12:17:28.166048 found VGA at PCI: 00:02.0
1120 12:17:28.169072 Setting up VGA for PCI: 00:02.0
1121 12:17:28.175706 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1122 12:17:28.178878 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1123 12:17:28.182064 Allocating resources...
1124 12:17:28.185600 Reading resources...
1125 12:17:28.188826 Root Device read_resources bus 0 link: 0
1126 12:17:28.192366 DOMAIN: 0000 read_resources bus 0 link: 0
1127 12:17:28.198690 PCI: 00:04.0 read_resources bus 1 link: 0
1128 12:17:28.201966 PCI: 00:04.0 read_resources bus 1 link: 0 done
1129 12:17:28.208353 PCI: 00:0d.0 read_resources bus 0 link: 0
1130 12:17:28.211939 USB0 port 0 read_resources bus 0 link: 0
1131 12:17:28.218698 USB0 port 0 read_resources bus 0 link: 0 done
1132 12:17:28.221876 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1133 12:17:28.224896 PCI: 00:14.0 read_resources bus 0 link: 0
1134 12:17:28.231674 USB0 port 0 read_resources bus 0 link: 0
1135 12:17:28.235194 USB0 port 0 read_resources bus 0 link: 0 done
1136 12:17:28.241803 PCI: 00:14.0 read_resources bus 0 link: 0 done
1137 12:17:28.245230 PCI: 00:14.3 read_resources bus 0 link: 0
1138 12:17:28.252074 PCI: 00:14.3 read_resources bus 0 link: 0 done
1139 12:17:28.254971 PCI: 00:15.0 read_resources bus 0 link: 0
1140 12:17:28.262323 PCI: 00:15.0 read_resources bus 0 link: 0 done
1141 12:17:28.265468 PCI: 00:15.1 read_resources bus 0 link: 0
1142 12:17:28.271801 PCI: 00:15.1 read_resources bus 0 link: 0 done
1143 12:17:28.275168 PCI: 00:19.1 read_resources bus 0 link: 0
1144 12:17:28.282041 PCI: 00:19.1 read_resources bus 0 link: 0 done
1145 12:17:28.285662 PCI: 00:1d.0 read_resources bus 1 link: 0
1146 12:17:28.292240 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1147 12:17:28.295755 PCI: 00:1e.2 read_resources bus 2 link: 0
1148 12:17:28.302210 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1149 12:17:28.305523 PCI: 00:1e.3 read_resources bus 3 link: 0
1150 12:17:28.311994 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1151 12:17:28.315162 PCI: 00:1f.0 read_resources bus 0 link: 0
1152 12:17:28.321952 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1153 12:17:28.324929 PCI: 00:1f.2 read_resources bus 0 link: 0
1154 12:17:28.328431 GENERIC: 0.0 read_resources bus 0 link: 0
1155 12:17:28.335517 GENERIC: 0.0 read_resources bus 0 link: 0 done
1156 12:17:28.338790 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1157 12:17:28.345907 DOMAIN: 0000 read_resources bus 0 link: 0 done
1158 12:17:28.349242 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1159 12:17:28.356050 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1160 12:17:28.359484 Root Device read_resources bus 0 link: 0 done
1161 12:17:28.362638 Done reading resources.
1162 12:17:28.369104 Show resources in subtree (Root Device)...After reading.
1163 12:17:28.372532 Root Device child on link 0 DOMAIN: 0000
1164 12:17:28.375893 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1165 12:17:28.386051 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1166 12:17:28.395706 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1167 12:17:28.398929 PCI: 00:00.0
1168 12:17:28.408936 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1169 12:17:28.415490 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1170 12:17:28.426137 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1171 12:17:28.435698 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1172 12:17:28.445747 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1173 12:17:28.455479 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1174 12:17:28.465209 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1175 12:17:28.472338 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1176 12:17:28.482214 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1177 12:17:28.492335 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1178 12:17:28.502009 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1179 12:17:28.511685 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1180 12:17:28.518540 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1181 12:17:28.528877 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1182 12:17:28.538200 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1183 12:17:28.548417 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1184 12:17:28.558608 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1185 12:17:28.568152 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1186 12:17:28.575342 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1187 12:17:28.584783 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1188 12:17:28.588199 PCI: 00:02.0
1189 12:17:28.598433 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1190 12:17:28.608144 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1191 12:17:28.617964 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1192 12:17:28.621120 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1193 12:17:28.631359 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1194 12:17:28.634513 GENERIC: 0.0
1195 12:17:28.634608 PCI: 00:05.0
1196 12:17:28.645012 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1197 12:17:28.651274 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1198 12:17:28.651369 GENERIC: 0.0
1199 12:17:28.654578 PCI: 00:08.0
1200 12:17:28.664440 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1201 12:17:28.664536 PCI: 00:0a.0
1202 12:17:28.668017 PCI: 00:0d.0 child on link 0 USB0 port 0
1203 12:17:28.677955 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1204 12:17:28.684358 USB0 port 0 child on link 0 USB3 port 0
1205 12:17:28.684470 USB3 port 0
1206 12:17:28.687581 USB3 port 1
1207 12:17:28.687662 USB3 port 2
1208 12:17:28.690898 USB3 port 3
1209 12:17:28.694214 PCI: 00:14.0 child on link 0 USB0 port 0
1210 12:17:28.704241 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1211 12:17:28.710742 USB0 port 0 child on link 0 USB2 port 0
1212 12:17:28.710837 USB2 port 0
1213 12:17:28.714396 USB2 port 1
1214 12:17:28.714490 USB2 port 2
1215 12:17:28.717821 USB2 port 3
1216 12:17:28.717915 USB2 port 4
1217 12:17:28.720901 USB2 port 5
1218 12:17:28.720995 USB2 port 6
1219 12:17:28.724405 USB2 port 7
1220 12:17:28.724499 USB2 port 8
1221 12:17:28.727483 USB2 port 9
1222 12:17:28.727577 USB3 port 0
1223 12:17:28.730644 USB3 port 1
1224 12:17:28.730754 USB3 port 2
1225 12:17:28.734096 USB3 port 3
1226 12:17:28.734190 PCI: 00:14.2
1227 12:17:28.743963 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1228 12:17:28.754092 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1229 12:17:28.760917 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1230 12:17:28.770676 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1231 12:17:28.770774 GENERIC: 0.0
1232 12:17:28.777081 PCI: 00:15.0 child on link 0 I2C: 00:1a
1233 12:17:28.787090 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 12:17:28.787189 I2C: 00:1a
1235 12:17:28.790473 I2C: 00:31
1236 12:17:28.790556 I2C: 00:32
1237 12:17:28.793751 PCI: 00:15.1 child on link 0 I2C: 00:10
1238 12:17:28.803699 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1239 12:17:28.807008 I2C: 00:10
1240 12:17:28.807127 PCI: 00:15.2
1241 12:17:28.816763 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1242 12:17:28.820502 PCI: 00:15.3
1243 12:17:28.830374 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1244 12:17:28.830464 PCI: 00:16.0
1245 12:17:28.840201 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1246 12:17:28.843944 PCI: 00:19.0
1247 12:17:28.847064 PCI: 00:19.1 child on link 0 I2C: 00:15
1248 12:17:28.856821 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1249 12:17:28.860145 I2C: 00:15
1250 12:17:28.863930 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1251 12:17:28.873543 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1252 12:17:28.883340 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1253 12:17:28.889898 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1254 12:17:28.893434 GENERIC: 0.0
1255 12:17:28.893520 PCI: 01:00.0
1256 12:17:28.903705 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1257 12:17:28.913186 PCI: 01:00.0 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 20
1258 12:17:28.916455 PCI: 00:1e.0
1259 12:17:28.926507 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1260 12:17:28.929910 PCI: 00:1e.2 child on link 0 SPI: 00
1261 12:17:28.939705 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1262 12:17:28.943465 SPI: 00
1263 12:17:28.946680 PCI: 00:1e.3 child on link 0 SPI: 00
1264 12:17:28.956071 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1265 12:17:28.956157 SPI: 00
1266 12:17:28.963213 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1267 12:17:28.969405 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1268 12:17:28.972935 PNP: 0c09.0
1269 12:17:28.982909 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1270 12:17:28.986366 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1271 12:17:28.996361 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1272 12:17:29.002465 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1273 12:17:29.009576 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1274 12:17:29.009669 GENERIC: 0.0
1275 12:17:29.012678 GENERIC: 1.0
1276 12:17:29.012758 PCI: 00:1f.3
1277 12:17:29.022676 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1278 12:17:29.036010 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1279 12:17:29.036104 PCI: 00:1f.5
1280 12:17:29.046221 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1281 12:17:29.049278 CPU_CLUSTER: 0 child on link 0 APIC: 00
1282 12:17:29.049366 APIC: 00
1283 12:17:29.052486 APIC: 01
1284 12:17:29.052565 APIC: 07
1285 12:17:29.055864 APIC: 03
1286 12:17:29.055945 APIC: 04
1287 12:17:29.056014 APIC: 06
1288 12:17:29.059286 APIC: 02
1289 12:17:29.059365 APIC: 05
1290 12:17:29.068977 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1291 12:17:29.072659 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1292 12:17:29.079045 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1293 12:17:29.085850 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1294 12:17:29.089364 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1295 12:17:29.092825 PCI: 01:00.0 20 * [0x4000 - 0x40ff] mem
1296 12:17:29.102377 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1297 12:17:29.108863 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1298 12:17:29.115312 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1299 12:17:29.122117 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1300 12:17:29.128667 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1301 12:17:29.135300 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1302 12:17:29.145514 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1303 12:17:29.152170 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1304 12:17:29.155594 DOMAIN: 0000: Resource ranges:
1305 12:17:29.158454 * Base: 1000, Size: 800, Tag: 100
1306 12:17:29.162115 * Base: 1900, Size: e700, Tag: 100
1307 12:17:29.168357 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1308 12:17:29.175297 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1309 12:17:29.181807 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1310 12:17:29.188479 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1311 12:17:29.195110 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1312 12:17:29.205314 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1313 12:17:29.211541 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1314 12:17:29.218088 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1315 12:17:29.228015 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1316 12:17:29.235117 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1317 12:17:29.241295 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1318 12:17:29.251361 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1319 12:17:29.258243 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1320 12:17:29.264843 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1321 12:17:29.274614 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1322 12:17:29.281006 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1323 12:17:29.288084 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1324 12:17:29.297631 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1325 12:17:29.304422 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1326 12:17:29.311329 update_constraints: PCI: 00:00.0 10 base 100000000 limit 4803fffff mem (fixed)
1327 12:17:29.321076 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1328 12:17:29.327442 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1329 12:17:29.334450 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1330 12:17:29.344677 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1331 12:17:29.350709 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1332 12:17:29.354307 DOMAIN: 0000: Resource ranges:
1333 12:17:29.357422 * Base: 7fc00000, Size: 40400000, Tag: 200
1334 12:17:29.364185 * Base: d0000000, Size: 28000000, Tag: 200
1335 12:17:29.367727 * Base: fa000000, Size: 1000000, Tag: 200
1336 12:17:29.370993 * Base: fb001000, Size: 2fff000, Tag: 200
1337 12:17:29.373878 * Base: fe010000, Size: 2e000, Tag: 200
1338 12:17:29.380565 * Base: fe03f000, Size: d41000, Tag: 200
1339 12:17:29.383836 * Base: fed88000, Size: 8000, Tag: 200
1340 12:17:29.387116 * Base: fed93000, Size: d000, Tag: 200
1341 12:17:29.390962 * Base: feda2000, Size: 1e000, Tag: 200
1342 12:17:29.397243 * Base: fede0000, Size: 1220000, Tag: 200
1343 12:17:29.400452 * Base: 480400000, Size: 7b7fc00000, Tag: 100200
1344 12:17:29.407089 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1345 12:17:29.413759 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1346 12:17:29.420504 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1347 12:17:29.427131 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1348 12:17:29.433772 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1349 12:17:29.440549 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1350 12:17:29.447565 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1351 12:17:29.453338 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1352 12:17:29.460350 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1353 12:17:29.466740 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1354 12:17:29.473967 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1355 12:17:29.480117 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1356 12:17:29.486809 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1357 12:17:29.493205 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1358 12:17:29.500215 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1359 12:17:29.506577 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1360 12:17:29.513570 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1361 12:17:29.519897 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1362 12:17:29.526479 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1363 12:17:29.532985 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1364 12:17:29.540048 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1365 12:17:29.546497 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1366 12:17:29.553163 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1367 12:17:29.563303 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1368 12:17:29.566164 PCI: 00:1d.0: Resource ranges:
1369 12:17:29.569822 * Base: 7fc00000, Size: 100000, Tag: 200
1370 12:17:29.576320 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1371 12:17:29.583136 PCI: 01:00.0 20 * [0x7fc04000 - 0x7fc040ff] limit: 7fc040ff mem
1372 12:17:29.592665 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1373 12:17:29.600110 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1374 12:17:29.602833 Root Device assign_resources, bus 0 link: 0
1375 12:17:29.609608 DOMAIN: 0000 assign_resources, bus 0 link: 0
1376 12:17:29.616189 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1377 12:17:29.625640 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1378 12:17:29.632612 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1379 12:17:29.638994 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1380 12:17:29.645576 PCI: 00:04.0 assign_resources, bus 1 link: 0
1381 12:17:29.649229 PCI: 00:04.0 assign_resources, bus 1 link: 0
1382 12:17:29.658832 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1383 12:17:29.665475 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1384 12:17:29.675414 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1385 12:17:29.678638 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1386 12:17:29.685387 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1387 12:17:29.691993 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1388 12:17:29.694913 PCI: 00:14.0 assign_resources, bus 0 link: 0
1389 12:17:29.701588 PCI: 00:14.0 assign_resources, bus 0 link: 0
1390 12:17:29.708357 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1391 12:17:29.718120 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1392 12:17:29.724585 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1393 12:17:29.731626 PCI: 00:14.3 assign_resources, bus 0 link: 0
1394 12:17:29.734734 PCI: 00:14.3 assign_resources, bus 0 link: 0
1395 12:17:29.744373 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1396 12:17:29.748173 PCI: 00:15.0 assign_resources, bus 0 link: 0
1397 12:17:29.751301 PCI: 00:15.0 assign_resources, bus 0 link: 0
1398 12:17:29.761355 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1399 12:17:29.764570 PCI: 00:15.1 assign_resources, bus 0 link: 0
1400 12:17:29.771445 PCI: 00:15.1 assign_resources, bus 0 link: 0
1401 12:17:29.777459 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1402 12:17:29.787897 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1403 12:17:29.794648 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1404 12:17:29.804004 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1405 12:17:29.807166 PCI: 00:19.1 assign_resources, bus 0 link: 0
1406 12:17:29.810420 PCI: 00:19.1 assign_resources, bus 0 link: 0
1407 12:17:29.820998 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1408 12:17:29.830574 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1409 12:17:29.840288 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1410 12:17:29.843555 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1411 12:17:29.850538 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1412 12:17:29.860255 PCI: 01:00.0 20 <- [0x007fc04000 - 0x007fc040ff] size 0x00000100 gran 0x08 mem64
1413 12:17:29.863503 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1414 12:17:29.873714 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1415 12:17:29.877014 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1416 12:17:29.883691 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1417 12:17:29.889781 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1418 12:17:29.896948 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1419 12:17:29.900054 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1420 12:17:29.903408 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1421 12:17:29.910173 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1422 12:17:29.913432 LPC: Trying to open IO window from 800 size 1ff
1423 12:17:29.923400 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1424 12:17:29.929942 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1425 12:17:29.939530 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1426 12:17:29.943062 DOMAIN: 0000 assign_resources, bus 0 link: 0
1427 12:17:29.949968 Root Device assign_resources, bus 0 link: 0
1428 12:17:29.950065 Done setting resources.
1429 12:17:29.956509 Show resources in subtree (Root Device)...After assigning values.
1430 12:17:29.959888 Root Device child on link 0 DOMAIN: 0000
1431 12:17:29.966686 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1432 12:17:29.976329 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1433 12:17:29.985926 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1434 12:17:29.986025 PCI: 00:00.0
1435 12:17:29.995823 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1436 12:17:30.006110 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1437 12:17:30.016386 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1438 12:17:30.025793 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1439 12:17:30.032512 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1440 12:17:30.042724 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1441 12:17:30.052262 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1442 12:17:30.062561 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1443 12:17:30.072529 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1444 12:17:30.078952 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1445 12:17:30.088782 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1446 12:17:30.098756 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1447 12:17:30.108784 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1448 12:17:30.118626 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1449 12:17:30.125758 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1450 12:17:30.135476 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1451 12:17:30.145109 PCI: 00:00.0 resource base 100000000 size 380400000 align 0 gran 0 limit 0 flags e0004200 index 10
1452 12:17:30.155349 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1453 12:17:30.165129 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1454 12:17:30.175391 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1455 12:17:30.175484 PCI: 00:02.0
1456 12:17:30.188220 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1457 12:17:30.198190 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1458 12:17:30.208056 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1459 12:17:30.211528 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1460 12:17:30.221536 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1461 12:17:30.224917 GENERIC: 0.0
1462 12:17:30.225003 PCI: 00:05.0
1463 12:17:30.234656 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1464 12:17:30.241458 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1465 12:17:30.241549 GENERIC: 0.0
1466 12:17:30.244932 PCI: 00:08.0
1467 12:17:30.254565 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1468 12:17:30.254653 PCI: 00:0a.0
1469 12:17:30.261400 PCI: 00:0d.0 child on link 0 USB0 port 0
1470 12:17:30.271419 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1471 12:17:30.274475 USB0 port 0 child on link 0 USB3 port 0
1472 12:17:30.278037 USB3 port 0
1473 12:17:30.278120 USB3 port 1
1474 12:17:30.281152 USB3 port 2
1475 12:17:30.281243 USB3 port 3
1476 12:17:30.287646 PCI: 00:14.0 child on link 0 USB0 port 0
1477 12:17:30.297876 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1478 12:17:30.301149 USB0 port 0 child on link 0 USB2 port 0
1479 12:17:30.304380 USB2 port 0
1480 12:17:30.304471 USB2 port 1
1481 12:17:30.307876 USB2 port 2
1482 12:17:30.307964 USB2 port 3
1483 12:17:30.311303 USB2 port 4
1484 12:17:30.311397 USB2 port 5
1485 12:17:30.314334 USB2 port 6
1486 12:17:30.314423 USB2 port 7
1487 12:17:30.317756 USB2 port 8
1488 12:17:30.317844 USB2 port 9
1489 12:17:30.321274 USB3 port 0
1490 12:17:30.321356 USB3 port 1
1491 12:17:30.324334 USB3 port 2
1492 12:17:30.327679 USB3 port 3
1493 12:17:30.327765 PCI: 00:14.2
1494 12:17:30.337506 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1495 12:17:30.347491 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1496 12:17:30.354389 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1497 12:17:30.364454 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1498 12:17:30.364546 GENERIC: 0.0
1499 12:17:30.371025 PCI: 00:15.0 child on link 0 I2C: 00:1a
1500 12:17:30.380647 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1501 12:17:30.380736 I2C: 00:1a
1502 12:17:30.384288 I2C: 00:31
1503 12:17:30.384368 I2C: 00:32
1504 12:17:30.387425 PCI: 00:15.1 child on link 0 I2C: 00:10
1505 12:17:30.400581 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1506 12:17:30.400676 I2C: 00:10
1507 12:17:30.404044 PCI: 00:15.2
1508 12:17:30.413882 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1509 12:17:30.413986 PCI: 00:15.3
1510 12:17:30.423650 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1511 12:17:30.427346 PCI: 00:16.0
1512 12:17:30.437466 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1513 12:17:30.437557 PCI: 00:19.0
1514 12:17:30.443683 PCI: 00:19.1 child on link 0 I2C: 00:15
1515 12:17:30.453488 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1516 12:17:30.453576 I2C: 00:15
1517 12:17:30.460585 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1518 12:17:30.467179 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1519 12:17:30.480137 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1520 12:17:30.490152 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1521 12:17:30.493561 GENERIC: 0.0
1522 12:17:30.493643 PCI: 01:00.0
1523 12:17:30.503407 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1524 12:17:30.513278 PCI: 01:00.0 resource base 7fc04000 size 100 align 12 gran 8 limit 7fc040ff flags 60000201 index 20
1525 12:17:30.516657 PCI: 00:1e.0
1526 12:17:30.526753 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1527 12:17:30.530169 PCI: 00:1e.2 child on link 0 SPI: 00
1528 12:17:30.543493 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1529 12:17:30.543590 SPI: 00
1530 12:17:30.546658 PCI: 00:1e.3 child on link 0 SPI: 00
1531 12:17:30.556462 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1532 12:17:30.559855 SPI: 00
1533 12:17:30.563233 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1534 12:17:30.573248 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1535 12:17:30.573351 PNP: 0c09.0
1536 12:17:30.582971 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1537 12:17:30.586341 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1538 12:17:30.596077 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1539 12:17:30.605937 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1540 12:17:30.609641 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1541 12:17:30.612797 GENERIC: 0.0
1542 12:17:30.612898 GENERIC: 1.0
1543 12:17:30.616118 PCI: 00:1f.3
1544 12:17:30.626443 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1545 12:17:30.636302 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1546 12:17:30.639402 PCI: 00:1f.5
1547 12:17:30.649377 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1548 12:17:30.652497 CPU_CLUSTER: 0 child on link 0 APIC: 00
1549 12:17:30.652595 APIC: 00
1550 12:17:30.656062 APIC: 01
1551 12:17:30.656160 APIC: 07
1552 12:17:30.656236 APIC: 03
1553 12:17:30.659391 APIC: 04
1554 12:17:30.659488 APIC: 06
1555 12:17:30.662672 APIC: 02
1556 12:17:30.662768 APIC: 05
1557 12:17:30.665627 Done allocating resources.
1558 12:17:30.672333 BS: BS_DEV_RESOURCES run times (exec / console): 27 / 2475 ms
1559 12:17:30.675814 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1560 12:17:30.681993 Configure GPIOs for I2S audio on UP4.
1561 12:17:30.688832 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1562 12:17:30.688930 Enabling resources...
1563 12:17:30.695787 PCI: 00:00.0 subsystem <- 8086/9a12
1564 12:17:30.695885 PCI: 00:00.0 cmd <- 06
1565 12:17:30.699192 PCI: 00:02.0 subsystem <- 8086/9a40
1566 12:17:30.702312 PCI: 00:02.0 cmd <- 03
1567 12:17:30.705726 PCI: 00:04.0 subsystem <- 8086/9a03
1568 12:17:30.709258 PCI: 00:04.0 cmd <- 02
1569 12:17:30.711861 PCI: 00:05.0 subsystem <- 8086/9a19
1570 12:17:30.715458 PCI: 00:05.0 cmd <- 02
1571 12:17:30.718693 PCI: 00:08.0 subsystem <- 8086/9a11
1572 12:17:30.721945 PCI: 00:08.0 cmd <- 06
1573 12:17:30.725182 PCI: 00:0d.0 subsystem <- 8086/9a13
1574 12:17:30.728683 PCI: 00:0d.0 cmd <- 02
1575 12:17:30.731928 PCI: 00:14.0 subsystem <- 8086/a0ed
1576 12:17:30.735401 PCI: 00:14.0 cmd <- 02
1577 12:17:30.738702 PCI: 00:14.2 subsystem <- 8086/a0ef
1578 12:17:30.738799 PCI: 00:14.2 cmd <- 02
1579 12:17:30.745288 PCI: 00:14.3 subsystem <- 8086/a0f0
1580 12:17:30.745388 PCI: 00:14.3 cmd <- 02
1581 12:17:30.748417 PCI: 00:15.0 subsystem <- 8086/a0e8
1582 12:17:30.751916 PCI: 00:15.0 cmd <- 02
1583 12:17:30.755314 PCI: 00:15.1 subsystem <- 8086/a0e9
1584 12:17:30.758371 PCI: 00:15.1 cmd <- 02
1585 12:17:30.761697 PCI: 00:15.2 subsystem <- 8086/a0ea
1586 12:17:30.765289 PCI: 00:15.2 cmd <- 02
1587 12:17:30.768610 PCI: 00:15.3 subsystem <- 8086/a0eb
1588 12:17:30.771970 PCI: 00:15.3 cmd <- 02
1589 12:17:30.775254 PCI: 00:16.0 subsystem <- 8086/a0e0
1590 12:17:30.778457 PCI: 00:16.0 cmd <- 02
1591 12:17:30.781476 PCI: 00:19.1 subsystem <- 8086/a0c6
1592 12:17:30.785071 PCI: 00:19.1 cmd <- 02
1593 12:17:30.787942 PCI: 00:1d.0 bridge ctrl <- 0013
1594 12:17:30.792009 PCI: 00:1d.0 subsystem <- 8086/a0b0
1595 12:17:30.792097 PCI: 00:1d.0 cmd <- 06
1596 12:17:30.798419 PCI: 00:1e.0 subsystem <- 8086/a0a8
1597 12:17:30.798505 PCI: 00:1e.0 cmd <- 06
1598 12:17:30.801730 PCI: 00:1e.2 subsystem <- 8086/a0aa
1599 12:17:30.805133 PCI: 00:1e.2 cmd <- 06
1600 12:17:30.808187 PCI: 00:1e.3 subsystem <- 8086/a0ab
1601 12:17:30.811292 PCI: 00:1e.3 cmd <- 02
1602 12:17:30.814926 PCI: 00:1f.0 subsystem <- 8086/a087
1603 12:17:30.818031 PCI: 00:1f.0 cmd <- 407
1604 12:17:30.821566 PCI: 00:1f.3 subsystem <- 8086/a0c8
1605 12:17:30.824367 PCI: 00:1f.3 cmd <- 02
1606 12:17:30.828153 PCI: 00:1f.5 subsystem <- 8086/a0a4
1607 12:17:30.831449 PCI: 00:1f.5 cmd <- 406
1608 12:17:30.834394 PCI: 01:00.0 cmd <- 02
1609 12:17:30.839373 done.
1610 12:17:30.842837 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1611 12:17:30.845682 Initializing devices...
1612 12:17:30.848973 Root Device init
1613 12:17:30.852296 Chrome EC: Set SMI mask to 0x0000000000000000
1614 12:17:30.859787 Chrome EC: clear events_b mask to 0x0000000000000000
1615 12:17:30.866641 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1616 12:17:30.873288 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1617 12:17:30.879653 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1618 12:17:30.882815 Chrome EC: Set WAKE mask to 0x0000000000000000
1619 12:17:30.890338 fw_config match found: DB_USB=USB3_ACTIVE
1620 12:17:30.894226 Configure Right Type-C port orientation for retimer
1621 12:17:30.897132 Root Device init finished in 46 msecs
1622 12:17:30.901289 PCI: 00:00.0 init
1623 12:17:30.904855 CPU TDP = 9 Watts
1624 12:17:30.904953 CPU PL1 = 9 Watts
1625 12:17:30.908138 CPU PL2 = 40 Watts
1626 12:17:30.911547 CPU PL4 = 83 Watts
1627 12:17:30.914675 PCI: 00:00.0 init finished in 8 msecs
1628 12:17:30.914771 PCI: 00:02.0 init
1629 12:17:30.918093 GMA: Found VBT in CBFS
1630 12:17:30.921189 GMA: Found valid VBT in CBFS
1631 12:17:30.927495 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1632 12:17:30.934379 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1633 12:17:30.937570 PCI: 00:02.0 init finished in 18 msecs
1634 12:17:30.941110 PCI: 00:05.0 init
1635 12:17:30.944437 PCI: 00:05.0 init finished in 0 msecs
1636 12:17:30.947170 PCI: 00:08.0 init
1637 12:17:30.950553 PCI: 00:08.0 init finished in 0 msecs
1638 12:17:30.953870 PCI: 00:14.0 init
1639 12:17:30.957316 PCI: 00:14.0 init finished in 0 msecs
1640 12:17:30.960946 PCI: 00:14.2 init
1641 12:17:30.964105 PCI: 00:14.2 init finished in 0 msecs
1642 12:17:30.967312 PCI: 00:15.0 init
1643 12:17:30.970348 I2C bus 0 version 0x3230302a
1644 12:17:30.973948 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1645 12:17:30.976999 PCI: 00:15.0 init finished in 6 msecs
1646 12:17:30.980222 PCI: 00:15.1 init
1647 12:17:30.980317 I2C bus 1 version 0x3230302a
1648 12:17:30.986668 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1649 12:17:30.990269 PCI: 00:15.1 init finished in 6 msecs
1650 12:17:30.990365 PCI: 00:15.2 init
1651 12:17:30.993516 I2C bus 2 version 0x3230302a
1652 12:17:30.997101 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1653 12:17:31.003373 PCI: 00:15.2 init finished in 6 msecs
1654 12:17:31.003471 PCI: 00:15.3 init
1655 12:17:31.006848 I2C bus 3 version 0x3230302a
1656 12:17:31.009851 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1657 12:17:31.013010 PCI: 00:15.3 init finished in 6 msecs
1658 12:17:31.016433 PCI: 00:16.0 init
1659 12:17:31.019603 PCI: 00:16.0 init finished in 0 msecs
1660 12:17:31.023072 PCI: 00:19.1 init
1661 12:17:31.026394 I2C bus 5 version 0x3230302a
1662 12:17:31.029591 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1663 12:17:31.033412 PCI: 00:19.1 init finished in 6 msecs
1664 12:17:31.036274 PCI: 00:1d.0 init
1665 12:17:31.039535 Initializing PCH PCIe bridge.
1666 12:17:31.042973 PCI: 00:1d.0 init finished in 3 msecs
1667 12:17:31.046018 PCI: 00:1f.0 init
1668 12:17:31.049939 IOAPIC: Initializing IOAPIC at 0xfec00000
1669 12:17:31.052719 IOAPIC: Bootstrap Processor Local APIC = 0x00
1670 12:17:31.056416 IOAPIC: ID = 0x02
1671 12:17:31.059322 IOAPIC: Dumping registers
1672 12:17:31.062795 reg 0x0000: 0x02000000
1673 12:17:31.062892 reg 0x0001: 0x00770020
1674 12:17:31.066130 reg 0x0002: 0x00000000
1675 12:17:31.069475 PCI: 00:1f.0 init finished in 21 msecs
1676 12:17:31.072610 PCI: 00:1f.2 init
1677 12:17:31.075869 Disabling ACPI via APMC.
1678 12:17:31.079593 APMC done.
1679 12:17:31.083415 PCI: 00:1f.2 init finished in 6 msecs
1680 12:17:31.094596 PCI: 01:00.0 init
1681 12:17:31.097983 PCI: 01:00.0 init finished in 0 msecs
1682 12:17:31.101149 PNP: 0c09.0 init
1683 12:17:31.104548 Google Chrome EC uptime: 8.268 seconds
1684 12:17:31.110768 Google Chrome AP resets since EC boot: 1
1685 12:17:31.114561 Google Chrome most recent AP reset causes:
1686 12:17:31.118079 0.451: 32775 shutdown: entering G3
1687 12:17:31.124377 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1688 12:17:31.127750 PNP: 0c09.0 init finished in 22 msecs
1689 12:17:31.132896 Devices initialized
1690 12:17:31.136447 Show all devs... After init.
1691 12:17:31.139501 Root Device: enabled 1
1692 12:17:31.139598 DOMAIN: 0000: enabled 1
1693 12:17:31.143009 CPU_CLUSTER: 0: enabled 1
1694 12:17:31.146333 PCI: 00:00.0: enabled 1
1695 12:17:31.149351 PCI: 00:02.0: enabled 1
1696 12:17:31.149447 PCI: 00:04.0: enabled 1
1697 12:17:31.152979 PCI: 00:05.0: enabled 1
1698 12:17:31.156195 PCI: 00:06.0: enabled 0
1699 12:17:31.159801 PCI: 00:07.0: enabled 0
1700 12:17:31.159898 PCI: 00:07.1: enabled 0
1701 12:17:31.162861 PCI: 00:07.2: enabled 0
1702 12:17:31.166662 PCI: 00:07.3: enabled 0
1703 12:17:31.169552 PCI: 00:08.0: enabled 1
1704 12:17:31.169649 PCI: 00:09.0: enabled 0
1705 12:17:31.172712 PCI: 00:0a.0: enabled 0
1706 12:17:31.176053 PCI: 00:0d.0: enabled 1
1707 12:17:31.179641 PCI: 00:0d.1: enabled 0
1708 12:17:31.179739 PCI: 00:0d.2: enabled 0
1709 12:17:31.182798 PCI: 00:0d.3: enabled 0
1710 12:17:31.186266 PCI: 00:0e.0: enabled 0
1711 12:17:31.186363 PCI: 00:10.2: enabled 1
1712 12:17:31.189197 PCI: 00:10.6: enabled 0
1713 12:17:31.192592 PCI: 00:10.7: enabled 0
1714 12:17:31.196010 PCI: 00:12.0: enabled 0
1715 12:17:31.196107 PCI: 00:12.6: enabled 0
1716 12:17:31.199390 PCI: 00:13.0: enabled 0
1717 12:17:31.202787 PCI: 00:14.0: enabled 1
1718 12:17:31.205853 PCI: 00:14.1: enabled 0
1719 12:17:31.205949 PCI: 00:14.2: enabled 1
1720 12:17:31.209079 PCI: 00:14.3: enabled 1
1721 12:17:31.212381 PCI: 00:15.0: enabled 1
1722 12:17:31.215896 PCI: 00:15.1: enabled 1
1723 12:17:31.215993 PCI: 00:15.2: enabled 1
1724 12:17:31.218981 PCI: 00:15.3: enabled 1
1725 12:17:31.222226 PCI: 00:16.0: enabled 1
1726 12:17:31.225654 PCI: 00:16.1: enabled 0
1727 12:17:31.225750 PCI: 00:16.2: enabled 0
1728 12:17:31.228784 PCI: 00:16.3: enabled 0
1729 12:17:31.232377 PCI: 00:16.4: enabled 0
1730 12:17:31.232473 PCI: 00:16.5: enabled 0
1731 12:17:31.235999 PCI: 00:17.0: enabled 0
1732 12:17:31.239143 PCI: 00:19.0: enabled 0
1733 12:17:31.242531 PCI: 00:19.1: enabled 1
1734 12:17:31.242631 PCI: 00:19.2: enabled 0
1735 12:17:31.245517 PCI: 00:1c.0: enabled 1
1736 12:17:31.249143 PCI: 00:1c.1: enabled 0
1737 12:17:31.252462 PCI: 00:1c.2: enabled 0
1738 12:17:31.252559 PCI: 00:1c.3: enabled 0
1739 12:17:31.255639 PCI: 00:1c.4: enabled 0
1740 12:17:31.258786 PCI: 00:1c.5: enabled 0
1741 12:17:31.261907 PCI: 00:1c.6: enabled 1
1742 12:17:31.262003 PCI: 00:1c.7: enabled 0
1743 12:17:31.265307 PCI: 00:1d.0: enabled 1
1744 12:17:31.269004 PCI: 00:1d.1: enabled 0
1745 12:17:31.272088 PCI: 00:1d.2: enabled 1
1746 12:17:31.272184 PCI: 00:1d.3: enabled 0
1747 12:17:31.275278 PCI: 00:1e.0: enabled 1
1748 12:17:31.278644 PCI: 00:1e.1: enabled 0
1749 12:17:31.278741 PCI: 00:1e.2: enabled 1
1750 12:17:31.281953 PCI: 00:1e.3: enabled 1
1751 12:17:31.285500 PCI: 00:1f.0: enabled 1
1752 12:17:31.288798 PCI: 00:1f.1: enabled 0
1753 12:17:31.288895 PCI: 00:1f.2: enabled 1
1754 12:17:31.292126 PCI: 00:1f.3: enabled 1
1755 12:17:31.295184 PCI: 00:1f.4: enabled 0
1756 12:17:31.298693 PCI: 00:1f.5: enabled 1
1757 12:17:31.298790 PCI: 00:1f.6: enabled 0
1758 12:17:31.302057 PCI: 00:1f.7: enabled 0
1759 12:17:31.305174 APIC: 00: enabled 1
1760 12:17:31.305283 GENERIC: 0.0: enabled 1
1761 12:17:31.308362 GENERIC: 0.0: enabled 1
1762 12:17:31.311809 GENERIC: 1.0: enabled 1
1763 12:17:31.315515 GENERIC: 0.0: enabled 1
1764 12:17:31.315613 GENERIC: 1.0: enabled 1
1765 12:17:31.318717 USB0 port 0: enabled 1
1766 12:17:31.321743 GENERIC: 0.0: enabled 1
1767 12:17:31.325227 USB0 port 0: enabled 1
1768 12:17:31.325325 GENERIC: 0.0: enabled 1
1769 12:17:31.328351 I2C: 00:1a: enabled 1
1770 12:17:31.331859 I2C: 00:31: enabled 1
1771 12:17:31.331956 I2C: 00:32: enabled 1
1772 12:17:31.335100 I2C: 00:10: enabled 1
1773 12:17:31.338434 I2C: 00:15: enabled 1
1774 12:17:31.338532 GENERIC: 0.0: enabled 0
1775 12:17:31.341875 GENERIC: 1.0: enabled 0
1776 12:17:31.345058 GENERIC: 0.0: enabled 1
1777 12:17:31.345155 SPI: 00: enabled 1
1778 12:17:31.348310 SPI: 00: enabled 1
1779 12:17:31.351708 PNP: 0c09.0: enabled 1
1780 12:17:31.355252 GENERIC: 0.0: enabled 1
1781 12:17:31.355349 USB3 port 0: enabled 1
1782 12:17:31.358083 USB3 port 1: enabled 1
1783 12:17:31.361770 USB3 port 2: enabled 0
1784 12:17:31.361867 USB3 port 3: enabled 0
1785 12:17:31.364775 USB2 port 0: enabled 0
1786 12:17:31.368521 USB2 port 1: enabled 1
1787 12:17:31.368618 USB2 port 2: enabled 1
1788 12:17:31.371510 USB2 port 3: enabled 0
1789 12:17:31.374893 USB2 port 4: enabled 1
1790 12:17:31.378212 USB2 port 5: enabled 0
1791 12:17:31.378310 USB2 port 6: enabled 0
1792 12:17:31.381294 USB2 port 7: enabled 0
1793 12:17:31.384725 USB2 port 8: enabled 0
1794 12:17:31.384822 USB2 port 9: enabled 0
1795 12:17:31.388402 USB3 port 0: enabled 0
1796 12:17:31.391788 USB3 port 1: enabled 1
1797 12:17:31.394616 USB3 port 2: enabled 0
1798 12:17:31.394717 USB3 port 3: enabled 0
1799 12:17:31.398380 GENERIC: 0.0: enabled 1
1800 12:17:31.401122 GENERIC: 1.0: enabled 1
1801 12:17:31.401230 APIC: 01: enabled 1
1802 12:17:31.404579 APIC: 07: enabled 1
1803 12:17:31.407880 APIC: 03: enabled 1
1804 12:17:31.407979 APIC: 04: enabled 1
1805 12:17:31.411297 APIC: 06: enabled 1
1806 12:17:31.411395 APIC: 02: enabled 1
1807 12:17:31.414380 APIC: 05: enabled 1
1808 12:17:31.418085 PCI: 01:00.0: enabled 1
1809 12:17:31.424341 BS: BS_DEV_INIT run times (exec / console): 33 / 540 ms
1810 12:17:31.427966 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1811 12:17:31.431058 ELOG: NV offset 0xf30000 size 0x1000
1812 12:17:31.438067 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1813 12:17:31.444566 ELOG: Event(17) added with size 13 at 2023-03-22 12:17:31 UTC
1814 12:17:31.451877 ELOG: Event(92) added with size 9 at 2023-03-22 12:17:31 UTC
1815 12:17:31.458048 ELOG: Event(93) added with size 9 at 2023-03-22 12:17:31 UTC
1816 12:17:31.464601 ELOG: Event(9E) added with size 10 at 2023-03-22 12:17:31 UTC
1817 12:17:31.471163 ELOG: Event(9F) added with size 14 at 2023-03-22 12:17:31 UTC
1818 12:17:31.477832 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1819 12:17:31.484048 ELOG: Event(A1) added with size 10 at 2023-03-22 12:17:31 UTC
1820 12:17:31.490809 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1821 12:17:31.497736 ELOG: Event(A0) added with size 9 at 2023-03-22 12:17:31 UTC
1822 12:17:31.500858 elog_add_boot_reason: Logged dev mode boot
1823 12:17:31.507526 BS: BS_POST_DEVICE entry times (exec / console): 1 / 24 ms
1824 12:17:31.507627 Finalize devices...
1825 12:17:31.510577 Devices finalized
1826 12:17:31.517132 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1827 12:17:31.520772 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1828 12:17:31.526929 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1829 12:17:31.530200 ME: HFSTS1 : 0x80030055
1830 12:17:31.537050 ME: HFSTS2 : 0x30280116
1831 12:17:31.540133 ME: HFSTS3 : 0x00000050
1832 12:17:31.546957 ME: HFSTS4 : 0x00004000
1833 12:17:31.550175 ME: HFSTS5 : 0x00000000
1834 12:17:31.554026 ME: HFSTS6 : 0x40400006
1835 12:17:31.556871 ME: Manufacturing Mode : YES
1836 12:17:31.563480 ME: SPI Protection Mode Enabled : NO
1837 12:17:31.567141 ME: FW Partition Table : OK
1838 12:17:31.570062 ME: Bringup Loader Failure : NO
1839 12:17:31.573259 ME: Firmware Init Complete : NO
1840 12:17:31.576369 ME: Boot Options Present : NO
1841 12:17:31.580165 ME: Update In Progress : NO
1842 12:17:31.583182 ME: D0i3 Support : YES
1843 12:17:31.586282 ME: Low Power State Enabled : NO
1844 12:17:31.592869 ME: CPU Replaced : YES
1845 12:17:31.596879 ME: CPU Replacement Valid : YES
1846 12:17:31.599829 ME: Current Working State : 5
1847 12:17:31.603327 ME: Current Operation State : 1
1848 12:17:31.606718 ME: Current Operation Mode : 3
1849 12:17:31.609530 ME: Error Code : 0
1850 12:17:31.612971 ME: Enhanced Debug Mode : NO
1851 12:17:31.616495 ME: CPU Debug Disabled : YES
1852 12:17:31.619628 ME: TXT Support : NO
1853 12:17:31.626650 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1854 12:17:31.636142 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1855 12:17:31.639344 CBFS: 'fallback/slic' not found.
1856 12:17:31.642664 ACPI: Writing ACPI tables at 76b01000.
1857 12:17:31.642762 ACPI: * FACS
1858 12:17:31.646302 ACPI: * DSDT
1859 12:17:31.649392 Ramoops buffer: 0x100000@0x76a00000.
1860 12:17:31.652608 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1861 12:17:31.658992 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1862 12:17:31.662700 Google Chrome EC: version:
1863 12:17:31.665749 ro: voema_v2.0.10114-a447f03e46
1864 12:17:31.669648 rw: voema_v2.0.10114-a447f03e46
1865 12:17:31.672303 running image: 2
1866 12:17:31.675897 PCI space above 4GB MMIO is at 0x480400000, len = 0x7b7fc00000
1867 12:17:31.681318 ACPI: * FADT
1868 12:17:31.681415 SCI is IRQ9
1869 12:17:31.687810 ACPI: added table 1/32, length now 40
1870 12:17:31.687907 ACPI: * SSDT
1871 12:17:31.690887 Found 1 CPU(s) with 8 core(s) each.
1872 12:17:31.697645 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1873 12:17:31.700767 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1874 12:17:31.704297 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1875 12:17:31.707396 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1876 12:17:31.714240 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1877 12:17:31.720982 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1878 12:17:31.723910 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1879 12:17:31.730823 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1880 12:17:31.737461 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1881 12:17:31.740639 \_SB.PCI0.RP09: Added StorageD3Enable property
1882 12:17:31.747238 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1883 12:17:31.751202 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1884 12:17:31.757152 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1885 12:17:31.760625 PS2K: Passing 80 keymaps to kernel
1886 12:17:31.767173 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1887 12:17:31.773725 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1888 12:17:31.780516 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1889 12:17:31.787518 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1890 12:17:31.794064 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1891 12:17:31.800521 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1892 12:17:31.807111 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1893 12:17:31.813640 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1894 12:17:31.816870 ACPI: added table 2/32, length now 44
1895 12:17:31.816968 ACPI: * MCFG
1896 12:17:31.820227 ACPI: added table 3/32, length now 48
1897 12:17:31.823806 ACPI: * TPM2
1898 12:17:31.826873 TPM2 log created at 0x769f0000
1899 12:17:31.830205 ACPI: added table 4/32, length now 52
1900 12:17:31.830304 ACPI: * MADT
1901 12:17:31.833679 SCI is IRQ9
1902 12:17:31.836602 ACPI: added table 5/32, length now 56
1903 12:17:31.840011 current = 76b09850
1904 12:17:31.840106 ACPI: * DMAR
1905 12:17:31.843497 ACPI: added table 6/32, length now 60
1906 12:17:31.846542 ACPI: added table 7/32, length now 64
1907 12:17:31.850196 ACPI: * HPET
1908 12:17:31.853171 ACPI: added table 8/32, length now 68
1909 12:17:31.853272 ACPI: done.
1910 12:17:31.856798 ACPI tables: 35216 bytes.
1911 12:17:31.859928 smbios_write_tables: 769ef000
1912 12:17:31.863662 EC returned error result code 3
1913 12:17:31.866595 Couldn't obtain OEM name from CBI
1914 12:17:31.870031 Create SMBIOS type 16
1915 12:17:31.873099 Create SMBIOS type 17
1916 12:17:31.876696 GENERIC: 0.0 (WIFI Device)
1917 12:17:31.876795 SMBIOS tables: 1734 bytes.
1918 12:17:31.883195 Writing table forward entry at 0x00000500
1919 12:17:31.889756 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1920 12:17:31.893321 Writing coreboot table at 0x76b25000
1921 12:17:31.899534 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1922 12:17:31.903031 1. 0000000000001000-000000000009ffff: RAM
1923 12:17:31.906622 2. 00000000000a0000-00000000000fffff: RESERVED
1924 12:17:31.912823 3. 0000000000100000-00000000769eefff: RAM
1925 12:17:31.916281 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1926 12:17:31.922970 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1927 12:17:31.929820 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1928 12:17:31.932779 7. 0000000077000000-000000007fbfffff: RESERVED
1929 12:17:31.936332 8. 00000000c0000000-00000000cfffffff: RESERVED
1930 12:17:31.942974 9. 00000000f8000000-00000000f9ffffff: RESERVED
1931 12:17:31.946367 10. 00000000fb000000-00000000fb000fff: RESERVED
1932 12:17:31.953133 11. 00000000fe000000-00000000fe00ffff: RESERVED
1933 12:17:31.956259 12. 00000000fed80000-00000000fed87fff: RESERVED
1934 12:17:31.962684 13. 00000000fed90000-00000000fed92fff: RESERVED
1935 12:17:31.965979 14. 00000000feda0000-00000000feda1fff: RESERVED
1936 12:17:31.972853 15. 00000000fedc0000-00000000feddffff: RESERVED
1937 12:17:31.976171 16. 0000000100000000-00000004803fffff: RAM
1938 12:17:31.979293 Passing 4 GPIOs to payload:
1939 12:17:31.982591 NAME | PORT | POLARITY | VALUE
1940 12:17:31.989065 lid | undefined | high | high
1941 12:17:31.996103 power | undefined | high | low
1942 12:17:31.999269 oprom | undefined | high | low
1943 12:17:32.005924 EC in RW | 0x000000e5 | high | high
1944 12:17:32.012456 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum f1ab
1945 12:17:32.012555 coreboot table: 1576 bytes.
1946 12:17:32.018979 IMD ROOT 0. 0x76fff000 0x00001000
1947 12:17:32.022676 IMD SMALL 1. 0x76ffe000 0x00001000
1948 12:17:32.025850 FSP MEMORY 2. 0x76c4e000 0x003b0000
1949 12:17:32.029118 VPD 3. 0x76c4d000 0x00000367
1950 12:17:32.032523 RO MCACHE 4. 0x76c4c000 0x00000fdc
1951 12:17:32.035645 CONSOLE 5. 0x76c2c000 0x00020000
1952 12:17:32.039279 FMAP 6. 0x76c2b000 0x00000578
1953 12:17:32.042039 TIME STAMP 7. 0x76c2a000 0x00000910
1954 12:17:32.049190 VBOOT WORK 8. 0x76c16000 0x00014000
1955 12:17:32.052473 ROMSTG STCK 9. 0x76c15000 0x00001000
1956 12:17:32.055413 AFTER CAR 10. 0x76c0a000 0x0000b000
1957 12:17:32.058747 RAMSTAGE 11. 0x76b97000 0x00073000
1958 12:17:32.062548 REFCODE 12. 0x76b42000 0x00055000
1959 12:17:32.065214 SMM BACKUP 13. 0x76b32000 0x00010000
1960 12:17:32.068747 4f444749 14. 0x76b30000 0x00002000
1961 12:17:32.072295 EXT VBT15. 0x76b2d000 0x0000219f
1962 12:17:32.075399 COREBOOT 16. 0x76b25000 0x00008000
1963 12:17:32.082189 ACPI 17. 0x76b01000 0x00024000
1964 12:17:32.085460 ACPI GNVS 18. 0x76b00000 0x00001000
1965 12:17:32.088702 RAMOOPS 19. 0x76a00000 0x00100000
1966 12:17:32.091755 TPM2 TCGLOG20. 0x769f0000 0x00010000
1967 12:17:32.095234 SMBIOS 21. 0x769ef000 0x00000800
1968 12:17:32.098564 IMD small region:
1969 12:17:32.101724 IMD ROOT 0. 0x76ffec00 0x00000400
1970 12:17:32.105321 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1971 12:17:32.108470 POWER STATE 2. 0x76ffeb80 0x00000044
1972 12:17:32.112112 ROMSTAGE 3. 0x76ffeb60 0x00000004
1973 12:17:32.118436 MEM INFO 4. 0x76ffe980 0x000001e0
1974 12:17:32.121792 BS: BS_WRITE_TABLES run times (exec / console): 6 / 484 ms
1975 12:17:32.125076 MTRR: Physical address space:
1976 12:17:32.131656 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1977 12:17:32.138096 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1978 12:17:32.145076 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1979 12:17:32.151487 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1980 12:17:32.158376 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1981 12:17:32.164539 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1982 12:17:32.171419 0x0000000100000000 - 0x0000000480400000 size 0x380400000 type 6
1983 12:17:32.174567 MTRR: Fixed MSR 0x250 0x0606060606060606
1984 12:17:32.178212 MTRR: Fixed MSR 0x258 0x0606060606060606
1985 12:17:32.181118 MTRR: Fixed MSR 0x259 0x0000000000000000
1986 12:17:32.184824 MTRR: Fixed MSR 0x268 0x0606060606060606
1987 12:17:32.191368 MTRR: Fixed MSR 0x269 0x0606060606060606
1988 12:17:32.194405 MTRR: Fixed MSR 0x26a 0x0606060606060606
1989 12:17:32.197996 MTRR: Fixed MSR 0x26b 0x0606060606060606
1990 12:17:32.201050 MTRR: Fixed MSR 0x26c 0x0606060606060606
1991 12:17:32.207784 MTRR: Fixed MSR 0x26d 0x0606060606060606
1992 12:17:32.211339 MTRR: Fixed MSR 0x26e 0x0606060606060606
1993 12:17:32.214416 MTRR: Fixed MSR 0x26f 0x0606060606060606
1994 12:17:32.219198 call enable_fixed_mtrr()
1995 12:17:32.222313 CPU physical address size: 39 bits
1996 12:17:32.229189 MTRR: default type WB/UC MTRR counts: 6/7.
1997 12:17:32.232437 MTRR: WB selected as default type.
1998 12:17:32.238497 MTRR: 0 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1999 12:17:32.242162 MTRR: 1 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2000 12:17:32.248647 MTRR: 2 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2001 12:17:32.255188 MTRR: 3 base 0x0000000090000000 mask 0x0000007ff0000000 type 0
2002 12:17:32.262120 MTRR: 4 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
2003 12:17:32.268665 MTRR: 5 base 0x00000000c0000000 mask 0x0000007fc0000000 type 0
2004 12:17:32.275907 MTRR: Fixed MSR 0x250 0x0606060606060606
2005 12:17:32.278904 MTRR: Fixed MSR 0x258 0x0606060606060606
2006 12:17:32.282814 MTRR: Fixed MSR 0x259 0x0000000000000000
2007 12:17:32.286038 MTRR: Fixed MSR 0x268 0x0606060606060606
2008 12:17:32.292755 MTRR: Fixed MSR 0x269 0x0606060606060606
2009 12:17:32.295537 MTRR: Fixed MSR 0x26a 0x0606060606060606
2010 12:17:32.299212 MTRR: Fixed MSR 0x26b 0x0606060606060606
2011 12:17:32.302513 MTRR: Fixed MSR 0x26c 0x0606060606060606
2012 12:17:32.309556 MTRR: Fixed MSR 0x26d 0x0606060606060606
2013 12:17:32.312268 MTRR: Fixed MSR 0x26e 0x0606060606060606
2014 12:17:32.315905 MTRR: Fixed MSR 0x26f 0x0606060606060606
2015 12:17:32.316012
2016 12:17:32.320117 MTRR check
2017 12:17:32.323465 call enable_fixed_mtrr()
2018 12:17:32.323561 Fixed MTRRs : Enabled
2019 12:17:32.326684 Variable MTRRs: Enabled
2020 12:17:32.326779
2021 12:17:32.329854 CPU physical address size: 39 bits
2022 12:17:32.333284 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 12:17:32.340072 MTRR: Fixed MSR 0x250 0x0606060606060606
2024 12:17:32.343058 MTRR: Fixed MSR 0x258 0x0606060606060606
2025 12:17:32.346317 MTRR: Fixed MSR 0x259 0x0000000000000000
2026 12:17:32.349881 MTRR: Fixed MSR 0x268 0x0606060606060606
2027 12:17:32.356448 MTRR: Fixed MSR 0x269 0x0606060606060606
2028 12:17:32.359571 MTRR: Fixed MSR 0x26a 0x0606060606060606
2029 12:17:32.362826 MTRR: Fixed MSR 0x26b 0x0606060606060606
2030 12:17:32.366322 MTRR: Fixed MSR 0x26c 0x0606060606060606
2031 12:17:32.373126 MTRR: Fixed MSR 0x26d 0x0606060606060606
2032 12:17:32.376107 MTRR: Fixed MSR 0x26e 0x0606060606060606
2033 12:17:32.379429 MTRR: Fixed MSR 0x26f 0x0606060606060606
2034 12:17:32.386896 MTRR: Fixed MSR 0x258 0x0606060606060606
2035 12:17:32.386992 call enable_fixed_mtrr()
2036 12:17:32.393882 MTRR: Fixed MSR 0x259 0x0000000000000000
2037 12:17:32.396757 MTRR: Fixed MSR 0x268 0x0606060606060606
2038 12:17:32.400208 MTRR: Fixed MSR 0x269 0x0606060606060606
2039 12:17:32.403916 MTRR: Fixed MSR 0x26a 0x0606060606060606
2040 12:17:32.410194 MTRR: Fixed MSR 0x26b 0x0606060606060606
2041 12:17:32.413733 MTRR: Fixed MSR 0x26c 0x0606060606060606
2042 12:17:32.416943 MTRR: Fixed MSR 0x26d 0x0606060606060606
2043 12:17:32.420186 MTRR: Fixed MSR 0x26e 0x0606060606060606
2044 12:17:32.426394 MTRR: Fixed MSR 0x26f 0x0606060606060606
2045 12:17:32.430093 BS: BS_WRITE_TABLES exit times (exec / console): 52 / 152 ms
2046 12:17:32.436721 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 12:17:32.439972 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 12:17:32.442901 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 12:17:32.446827 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 12:17:32.453398 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 12:17:32.456311 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 12:17:32.459732 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 12:17:32.463043 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 12:17:32.469390 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 12:17:32.472907 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 12:17:32.476087 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 12:17:32.479320 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 12:17:32.487551 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 12:17:32.487647 call enable_fixed_mtrr()
2060 12:17:32.494348 MTRR: Fixed MSR 0x259 0x0000000000000000
2061 12:17:32.497714 MTRR: Fixed MSR 0x268 0x0606060606060606
2062 12:17:32.500988 MTRR: Fixed MSR 0x269 0x0606060606060606
2063 12:17:32.504201 MTRR: Fixed MSR 0x26a 0x0606060606060606
2064 12:17:32.511053 MTRR: Fixed MSR 0x26b 0x0606060606060606
2065 12:17:32.514686 MTRR: Fixed MSR 0x26c 0x0606060606060606
2066 12:17:32.517568 MTRR: Fixed MSR 0x26d 0x0606060606060606
2067 12:17:32.521329 MTRR: Fixed MSR 0x26e 0x0606060606060606
2068 12:17:32.527383 MTRR: Fixed MSR 0x26f 0x0606060606060606
2069 12:17:32.530476 CPU physical address size: 39 bits
2070 12:17:32.535715 call enable_fixed_mtrr()
2071 12:17:32.538806 MTRR: Fixed MSR 0x250 0x0606060606060606
2072 12:17:32.546073 MTRR: Fixed MSR 0x250 0x0606060606060606
2073 12:17:32.548800 MTRR: Fixed MSR 0x258 0x0606060606060606
2074 12:17:32.552097 MTRR: Fixed MSR 0x259 0x0000000000000000
2075 12:17:32.555629 MTRR: Fixed MSR 0x268 0x0606060606060606
2076 12:17:32.562603 MTRR: Fixed MSR 0x269 0x0606060606060606
2077 12:17:32.565511 MTRR: Fixed MSR 0x26a 0x0606060606060606
2078 12:17:32.569111 MTRR: Fixed MSR 0x26b 0x0606060606060606
2079 12:17:32.572050 MTRR: Fixed MSR 0x26c 0x0606060606060606
2080 12:17:32.578786 MTRR: Fixed MSR 0x26d 0x0606060606060606
2081 12:17:32.582044 MTRR: Fixed MSR 0x26e 0x0606060606060606
2082 12:17:32.585444 MTRR: Fixed MSR 0x26f 0x0606060606060606
2083 12:17:32.593052 MTRR: Fixed MSR 0x258 0x0606060606060606
2084 12:17:32.593149 call enable_fixed_mtrr()
2085 12:17:32.599503 MTRR: Fixed MSR 0x259 0x0000000000000000
2086 12:17:32.602896 MTRR: Fixed MSR 0x268 0x0606060606060606
2087 12:17:32.606266 MTRR: Fixed MSR 0x269 0x0606060606060606
2088 12:17:32.609465 MTRR: Fixed MSR 0x26a 0x0606060606060606
2089 12:17:32.616129 MTRR: Fixed MSR 0x26b 0x0606060606060606
2090 12:17:32.619745 MTRR: Fixed MSR 0x26c 0x0606060606060606
2091 12:17:32.622949 MTRR: Fixed MSR 0x26d 0x0606060606060606
2092 12:17:32.626138 MTRR: Fixed MSR 0x26e 0x0606060606060606
2093 12:17:32.632808 MTRR: Fixed MSR 0x26f 0x0606060606060606
2094 12:17:32.636157 CPU physical address size: 39 bits
2095 12:17:32.640717 call enable_fixed_mtrr()
2096 12:17:32.644199 CPU physical address size: 39 bits
2097 12:17:32.647398 CPU physical address size: 39 bits
2098 12:17:32.652946 call enable_fixed_mtrr()
2099 12:17:32.656223 CPU physical address size: 39 bits
2100 12:17:32.660092 Checking cr50 for pending updates
2101 12:17:32.663723 CPU physical address size: 39 bits
2102 12:17:32.667131 Reading cr50 TPM mode
2103 12:17:32.678127 BS: BS_PAYLOAD_LOAD entry times (exec / console): 235 / 6 ms
2104 12:17:32.687725 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2105 12:17:32.691105 Checking segment from ROM address 0xffc02b38
2106 12:17:32.694052 Checking segment from ROM address 0xffc02b54
2107 12:17:32.700720 Loading segment from ROM address 0xffc02b38
2108 12:17:32.700820 code (compression=0)
2109 12:17:32.711287 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2110 12:17:32.720785 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2111 12:17:32.720885 it's not compressed!
2112 12:17:32.870916 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2113 12:17:32.877437 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2114 12:17:32.884519 Loading segment from ROM address 0xffc02b54
2115 12:17:32.887578 Entry Point 0x30000000
2116 12:17:32.887676 Loaded segments
2117 12:17:32.894342 BS: BS_PAYLOAD_LOAD run times (exec / console): 146 / 63 ms
2118 12:17:32.939881 Finalizing chipset.
2119 12:17:32.943001 Finalizing SMM.
2120 12:17:32.943101 APMC done.
2121 12:17:32.950266 BS: BS_PAYLOAD_LOAD exit times (exec / console): 44 / 5 ms
2122 12:17:32.953062 mp_park_aps done after 0 msecs.
2123 12:17:32.956924 Jumping to boot code at 0x30000000(0x76b25000)
2124 12:17:32.966068 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2125 12:17:32.966166
2126 12:17:32.966247
2127 12:17:32.969462
2128 12:17:32.969563 Starting depthcharge on Voema...
2129 12:17:32.969925 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2130 12:17:32.970042 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2131 12:17:32.970138 Setting prompt string to ['volteer:']
2132 12:17:32.970230 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2133 12:17:32.973158
2134 12:17:32.979509 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2135 12:17:32.979608
2136 12:17:32.986304 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2137 12:17:32.986401
2138 12:17:32.992662 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2139 12:17:32.992759
2140 12:17:32.995848 Failed to find eMMC card reader
2141 12:17:32.995945
2142 12:17:32.996021 Wipe memory regions:
2143 12:17:32.999309
2144 12:17:33.002888 [0x00000000001000, 0x000000000a0000)
2145 12:17:33.002986
2146 12:17:33.005668 [0x00000000100000, 0x00000030000000)
2147 12:17:33.045013
2148 12:17:33.048487 [0x00000032662db0, 0x000000769ef000)
2149 12:17:33.103621
2150 12:17:33.106539 [0x00000100000000, 0x00000480400000)
2151 12:17:33.786658
2152 12:17:33.789372 ec_init: CrosEC protocol v3 supported (256, 256)
2153 12:17:34.220966
2154 12:17:34.221117 R8152: Initializing
2155 12:17:34.221197
2156 12:17:34.223874 Version 6 (ocp_data = 5c30)
2157 12:17:34.223971
2158 12:17:34.227147 R8152: Done initializing
2159 12:17:34.227245
2160 12:17:34.230674 Adding net device
2161 12:17:34.531799
2162 12:17:34.535293 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2163 12:17:34.535402
2164 12:17:34.535549
2165 12:17:34.535684
2166 12:17:34.538741 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2168 12:17:34.639640 volteer: tftpboot 192.168.201.1 9729429/tftp-deploy-xb0bke2f/kernel/bzImage 9729429/tftp-deploy-xb0bke2f/kernel/cmdline 9729429/tftp-deploy-xb0bke2f/ramdisk/ramdisk.cpio.gz
2169 12:17:34.640346 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2170 12:17:34.640793 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2171 12:17:34.645400 tftpboot 192.168.201.1 9729429/tftp-deploy-xb0bke2f/kernel/bzImoy-xb0bke2f/kernel/cmdline 9729429/tftp-deploy-xb0bke2f/ramdisk/ramdisk.cpio.gz
2172 12:17:34.645916
2173 12:17:34.646280 Waiting for link
2174 12:17:34.848491
2175 12:17:34.849028 done.
2176 12:17:34.849494
2177 12:17:34.849839 MAC: 00:24:32:30:77:d1
2178 12:17:34.850211
2179 12:17:34.851713 Sending DHCP discover... done.
2180 12:17:34.852134
2181 12:17:34.854690 Waiting for reply... done.
2182 12:17:34.855078
2183 12:17:34.857988 Sending DHCP request... done.
2184 12:17:34.858436
2185 12:17:34.865260 Waiting for reply... done.
2186 12:17:34.865758
2187 12:17:34.866114 My ip is 192.168.201.13
2188 12:17:34.866461
2189 12:17:34.868688 The DHCP server ip is 192.168.201.1
2190 12:17:34.871879
2191 12:17:34.875412 TFTP server IP predefined by user: 192.168.201.1
2192 12:17:34.875820
2193 12:17:34.881819 Bootfile predefined by user: 9729429/tftp-deploy-xb0bke2f/kernel/bzImage
2194 12:17:34.882304
2195 12:17:34.885356 Sending tftp read request... done.
2196 12:17:34.885765
2197 12:17:34.891971 Waiting for the transfer...
2198 12:17:34.892444
2199 12:17:35.451674 00000000 ################################################################
2200 12:17:35.451821
2201 12:17:36.037564 00080000 ################################################################
2202 12:17:36.037715
2203 12:17:36.639389 00100000 ################################################################
2204 12:17:36.639554
2205 12:17:37.243729 00180000 ################################################################
2206 12:17:37.243888
2207 12:17:37.818041 00200000 ################################################################
2208 12:17:37.818202
2209 12:17:38.387802 00280000 ################################################################
2210 12:17:38.387963
2211 12:17:38.974330 00300000 ################################################################
2212 12:17:38.974492
2213 12:17:39.542397 00380000 ################################################################
2214 12:17:39.542567
2215 12:17:40.142432 00400000 ################################################################
2216 12:17:40.142596
2217 12:17:40.724681 00480000 ################################################################
2218 12:17:40.724844
2219 12:17:41.305783 00500000 ################################################################
2220 12:17:41.305945
2221 12:17:41.877644 00580000 ################################################################
2222 12:17:41.877800
2223 12:17:42.459010 00600000 ################################################################
2224 12:17:42.459171
2225 12:17:43.027096 00680000 ################################################################
2226 12:17:43.027258
2227 12:17:43.595973 00700000 ################################################################
2228 12:17:43.596135
2229 12:17:44.161320 00780000 ################################################################
2230 12:17:44.161484
2231 12:17:44.706125 00800000 ################################################################
2232 12:17:44.706287
2233 12:17:45.281770 00880000 ################################################################
2234 12:17:45.281929
2235 12:17:45.713626 00900000 ################################################# done.
2236 12:17:45.713781
2237 12:17:45.717093 The bootfile was 9834496 bytes long.
2238 12:17:45.717192
2239 12:17:45.720296 Sending tftp read request... done.
2240 12:17:45.720393
2241 12:17:45.723748 Waiting for the transfer...
2242 12:17:45.723845
2243 12:17:46.294172 00000000 ################################################################
2244 12:17:46.294321
2245 12:17:46.891337 00080000 ################################################################
2246 12:17:46.891508
2247 12:17:47.540286 00100000 ################################################################
2248 12:17:47.540853
2249 12:17:48.219340 00180000 ################################################################
2250 12:17:48.219855
2251 12:17:48.893502 00200000 ################################################################
2252 12:17:48.894038
2253 12:17:49.566496 00280000 ################################################################
2254 12:17:49.567014
2255 12:17:50.233430 00300000 ################################################################
2256 12:17:50.234107
2257 12:17:50.918950 00380000 ################################################################
2258 12:17:50.919503
2259 12:17:51.603247 00400000 ################################################################
2260 12:17:51.603842
2261 12:17:52.278549 00480000 ################################################################
2262 12:17:52.278709
2263 12:17:52.910583 00500000 ################################################################
2264 12:17:52.911113
2265 12:17:53.375988 00580000 ############################################ done.
2266 12:17:53.376508
2267 12:17:53.379249 Sending tftp read request... done.
2268 12:17:53.379687
2269 12:17:53.382747 Waiting for the transfer...
2270 12:17:53.383187
2271 12:17:53.383531 00000000 # done.
2272 12:17:53.383859
2273 12:17:53.392645 Command line loaded dynamically from TFTP file: 9729429/tftp-deploy-xb0bke2f/kernel/cmdline
2274 12:17:53.393101
2275 12:17:53.412109 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729429/extract-nfsrootfs-ww0qy5fp,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2276 12:17:53.415487
2277 12:17:53.418983 Shutting down all USB controllers.
2278 12:17:53.419418
2279 12:17:53.419759 Removing current net device
2280 12:17:53.420081
2281 12:17:53.422625 Finalizing coreboot
2282 12:17:53.423061
2283 12:17:53.428949 Exiting depthcharge with code 4 at timestamp: 29051348
2284 12:17:53.429454
2285 12:17:53.429794
2286 12:17:53.430115 Starting kernel ...
2287 12:17:53.430426
2288 12:17:53.430726
2289 12:17:53.431890 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2290 12:17:53.432427 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2291 12:17:53.432799 Setting prompt string to ['Linux version [0-9]']
2292 12:17:53.433146 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2293 12:17:53.433535 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2295 12:22:17.433544 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2297 12:22:17.434684 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2299 12:22:17.435567 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2302 12:22:17.437012 end: 2 depthcharge-action (duration 00:05:00) [common]
2304 12:22:17.438295 Cleaning after the job
2305 12:22:17.438760 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729429/tftp-deploy-xb0bke2f/ramdisk
2306 12:22:17.441116 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729429/tftp-deploy-xb0bke2f/kernel
2307 12:22:17.444102 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729429/tftp-deploy-xb0bke2f/nfsrootfs
2308 12:22:17.504329 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729429/tftp-deploy-xb0bke2f/modules
2309 12:22:17.504797 start: 5.1 power-off (timeout 00:00:30) [common]
2310 12:22:17.504969 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-11' '--port=1' '--command=off'
2311 12:22:17.582710 >> Command sent successfully.
2312 12:22:17.588467 Returned 0 in 0 seconds
2313 12:22:17.689894 end: 5.1 power-off (duration 00:00:00) [common]
2315 12:22:17.691491 start: 5.2 read-feedback (timeout 00:10:00) [common]
2316 12:22:17.692662 Listened to connection for namespace 'common' for up to 1s
2317 12:22:18.697521 Finalising connection for namespace 'common'
2318 12:22:18.698243 Disconnecting from shell: Finalise
2319 12:22:18.698681
2320 12:22:18.800086 end: 5.2 read-feedback (duration 00:00:01) [common]
2321 12:22:18.800783 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729429
2322 12:22:18.899945 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729429
2323 12:22:18.900156 JobError: Your job cannot terminate cleanly.