Boot log: asus-cx9400-volteer
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:17:10.540908 lava-dispatcher, installed at version: 2023.01
2 12:17:10.541087 start: 0 validate
3 12:17:10.541199 Start time: 2023-03-22 12:17:10.541194+00:00 (UTC)
4 12:17:10.541315 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:17:10.541437 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 12:17:10.838471 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:17:10.838641 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.277-cip94-rt29%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:17:11.131656 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:17:11.131833 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:17:15.975932 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:17:15.976609 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.277-cip94-rt29%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:17:16.277838 validate duration: 5.74
14 12:17:16.279315 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:17:16.279882 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:17:16.280350 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:17:16.280832 Not decompressing ramdisk as can be used compressed.
18 12:17:16.281249 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/initrd.cpio.gz
19 12:17:16.281582 saving as /var/lib/lava/dispatcher/tmp/9729433/tftp-deploy-nr_ffje2/ramdisk/initrd.cpio.gz
20 12:17:16.281900 total size: 5672849 (5MB)
21 12:17:17.003751 progress 0% (0MB)
22 12:17:17.011506 progress 5% (0MB)
23 12:17:17.019109 progress 10% (0MB)
24 12:17:17.025884 progress 15% (0MB)
25 12:17:17.033732 progress 20% (1MB)
26 12:17:17.038959 progress 25% (1MB)
27 12:17:17.042519 progress 30% (1MB)
28 12:17:17.045927 progress 35% (1MB)
29 12:17:17.049024 progress 40% (2MB)
30 12:17:17.051383 progress 45% (2MB)
31 12:17:17.053983 progress 50% (2MB)
32 12:17:17.056285 progress 55% (3MB)
33 12:17:17.058338 progress 60% (3MB)
34 12:17:17.060394 progress 65% (3MB)
35 12:17:17.062381 progress 70% (3MB)
36 12:17:17.064130 progress 75% (4MB)
37 12:17:17.065901 progress 80% (4MB)
38 12:17:17.067701 progress 85% (4MB)
39 12:17:17.069265 progress 90% (4MB)
40 12:17:17.070865 progress 95% (5MB)
41 12:17:17.072493 progress 100% (5MB)
42 12:17:17.072618 5MB downloaded in 0.79s (6.84MB/s)
43 12:17:17.072781 end: 1.1.1 http-download (duration 00:00:01) [common]
45 12:17:17.073059 end: 1.1 download-retry (duration 00:00:01) [common]
46 12:17:17.073158 start: 1.2 download-retry (timeout 00:09:59) [common]
47 12:17:17.073257 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 12:17:17.073379 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.277-cip94-rt29/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:17:17.073456 saving as /var/lib/lava/dispatcher/tmp/9729433/tftp-deploy-nr_ffje2/kernel/bzImage
50 12:17:17.073525 total size: 9834496 (9MB)
51 12:17:17.073592 No compression specified
52 12:17:17.074508 progress 0% (0MB)
53 12:17:17.077083 progress 5% (0MB)
54 12:17:17.079530 progress 10% (0MB)
55 12:17:17.081919 progress 15% (1MB)
56 12:17:17.084312 progress 20% (1MB)
57 12:17:17.086702 progress 25% (2MB)
58 12:17:17.089101 progress 30% (2MB)
59 12:17:17.091509 progress 35% (3MB)
60 12:17:17.093900 progress 40% (3MB)
61 12:17:17.096299 progress 45% (4MB)
62 12:17:17.098661 progress 50% (4MB)
63 12:17:17.101065 progress 55% (5MB)
64 12:17:17.103404 progress 60% (5MB)
65 12:17:17.105833 progress 65% (6MB)
66 12:17:17.108193 progress 70% (6MB)
67 12:17:17.110496 progress 75% (7MB)
68 12:17:17.112941 progress 80% (7MB)
69 12:17:17.115240 progress 85% (8MB)
70 12:17:17.117612 progress 90% (8MB)
71 12:17:17.119956 progress 95% (8MB)
72 12:17:17.122256 progress 100% (9MB)
73 12:17:17.122399 9MB downloaded in 0.05s (191.91MB/s)
74 12:17:17.122542 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:17:17.122775 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:17:17.122862 start: 1.3 download-retry (timeout 00:09:59) [common]
78 12:17:17.122947 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 12:17:17.123054 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/full.rootfs.tar.xz
80 12:17:17.123123 saving as /var/lib/lava/dispatcher/tmp/9729433/tftp-deploy-nr_ffje2/nfsrootfs/full.rootfs.tar
81 12:17:17.123184 total size: 125916488 (120MB)
82 12:17:17.123244 Using unxz to decompress xz
83 12:17:17.126565 progress 0% (0MB)
84 12:17:17.566005 progress 5% (6MB)
85 12:17:18.014072 progress 10% (12MB)
86 12:17:18.465620 progress 15% (18MB)
87 12:17:18.921308 progress 20% (24MB)
88 12:17:19.250134 progress 25% (30MB)
89 12:17:19.587869 progress 30% (36MB)
90 12:17:19.842293 progress 35% (42MB)
91 12:17:20.030079 progress 40% (48MB)
92 12:17:20.381286 progress 45% (54MB)
93 12:17:20.738445 progress 50% (60MB)
94 12:17:21.074455 progress 55% (66MB)
95 12:17:21.424323 progress 60% (72MB)
96 12:17:21.754153 progress 65% (78MB)
97 12:17:22.131962 progress 70% (84MB)
98 12:17:22.540254 progress 75% (90MB)
99 12:17:22.949094 progress 80% (96MB)
100 12:17:23.046004 progress 85% (102MB)
101 12:17:23.204466 progress 90% (108MB)
102 12:17:23.528626 progress 95% (114MB)
103 12:17:23.892466 progress 100% (120MB)
104 12:17:23.898348 120MB downloaded in 6.78s (17.72MB/s)
105 12:17:23.898635 end: 1.3.1 http-download (duration 00:00:07) [common]
107 12:17:23.898897 end: 1.3 download-retry (duration 00:00:07) [common]
108 12:17:23.898989 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:17:23.899079 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:17:23.899197 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.277-cip94-rt29/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:17:23.899270 saving as /var/lib/lava/dispatcher/tmp/9729433/tftp-deploy-nr_ffje2/modules/modules.tar
112 12:17:23.899334 total size: 462060 (0MB)
113 12:17:23.899396 Using unxz to decompress xz
114 12:17:23.902382 progress 7% (0MB)
115 12:17:23.902750 progress 14% (0MB)
116 12:17:23.902986 progress 21% (0MB)
117 12:17:23.904371 progress 28% (0MB)
118 12:17:23.906370 progress 35% (0MB)
119 12:17:23.908218 progress 42% (0MB)
120 12:17:23.910336 progress 49% (0MB)
121 12:17:23.912338 progress 56% (0MB)
122 12:17:23.914273 progress 63% (0MB)
123 12:17:23.916065 progress 70% (0MB)
124 12:17:23.918181 progress 78% (0MB)
125 12:17:23.920246 progress 85% (0MB)
126 12:17:23.921911 progress 92% (0MB)
127 12:17:23.924155 progress 99% (0MB)
128 12:17:23.930922 0MB downloaded in 0.03s (13.95MB/s)
129 12:17:23.931184 end: 1.4.1 http-download (duration 00:00:00) [common]
131 12:17:23.931447 end: 1.4 download-retry (duration 00:00:00) [common]
132 12:17:23.931542 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
133 12:17:23.931639 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
134 12:17:25.620901 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729433/extract-nfsrootfs-rhkqgwcd
135 12:17:25.621104 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
136 12:17:25.621210 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
137 12:17:25.621347 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7
138 12:17:25.621454 makedir: /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin
139 12:17:25.621539 makedir: /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/tests
140 12:17:25.621640 makedir: /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/results
141 12:17:25.621751 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-add-keys
142 12:17:25.621879 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-add-sources
143 12:17:25.621994 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-background-process-start
144 12:17:25.622106 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-background-process-stop
145 12:17:25.622217 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-common-functions
146 12:17:25.622327 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-echo-ipv4
147 12:17:25.622436 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-install-packages
148 12:17:25.622544 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-installed-packages
149 12:17:25.622652 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-os-build
150 12:17:25.622759 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-probe-channel
151 12:17:25.622867 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-probe-ip
152 12:17:25.622975 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-target-ip
153 12:17:25.623083 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-target-mac
154 12:17:25.623191 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-target-storage
155 12:17:25.623304 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-test-case
156 12:17:25.623413 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-test-event
157 12:17:25.623520 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-test-feedback
158 12:17:25.623630 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-test-raise
159 12:17:25.624050 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-test-reference
160 12:17:25.624164 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-test-runner
161 12:17:25.624274 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-test-set
162 12:17:25.624383 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-test-shell
163 12:17:25.624493 Updating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-install-packages (oe)
164 12:17:25.624605 Updating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/bin/lava-installed-packages (oe)
165 12:17:25.624702 Creating /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/environment
166 12:17:25.624787 LAVA metadata
167 12:17:25.624855 - LAVA_JOB_ID=9729433
168 12:17:25.624919 - LAVA_DISPATCHER_IP=192.168.201.1
169 12:17:25.625016 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
170 12:17:25.625081 skipped lava-vland-overlay
171 12:17:25.625156 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
172 12:17:25.625238 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
173 12:17:25.625300 skipped lava-multinode-overlay
174 12:17:25.625373 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
175 12:17:25.625452 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
176 12:17:25.625524 Loading test definitions
177 12:17:25.625613 start: 1.5.2.3.1 git-repo-action (timeout 00:09:51) [common]
178 12:17:25.625683 Using /lava-9729433 at stage 0
179 12:17:25.625777 Fetching tests from https://github.com/kernelci/test-definitions
180 12:17:25.625857 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/0/tests/0_ltp-ipc'
181 12:17:31.969740 Running '/usr/bin/git checkout kernelci.org
182 12:17:32.112971 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/0/tests/0_ltp-ipc/automated/linux/ltp/ltp.yaml
183 12:17:32.113718 uuid=9729433_1.5.2.3.1 testdef=None
184 12:17:32.113896 end: 1.5.2.3.1 git-repo-action (duration 00:00:06) [common]
186 12:17:32.114173 start: 1.5.2.3.2 test-overlay (timeout 00:09:44) [common]
187 12:17:32.114969 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
189 12:17:32.115252 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:44) [common]
190 12:17:32.116307 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
192 12:17:32.116585 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:44) [common]
193 12:17:32.117577 runner path: /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/0/tests/0_ltp-ipc test_uuid 9729433_1.5.2.3.1
194 12:17:32.117676 SKIPFILE='skipfile-lkft.yaml'
195 12:17:32.117753 SKIP_INSTALL='true'
196 12:17:32.117834 TST_CMDFILES='ipc'
197 12:17:32.117997 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
199 12:17:32.118235 Creating lava-test-runner.conf files
200 12:17:32.118316 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729433/lava-overlay-oai7zzs7/lava-9729433/0 for stage 0
201 12:17:32.118423 - 0_ltp-ipc
202 12:17:32.118537 end: 1.5.2.3 test-definition (duration 00:00:06) [common]
203 12:17:32.118641 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
204 12:17:39.603584 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
205 12:17:39.603817 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:37) [common]
206 12:17:39.603920 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
207 12:17:39.604024 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
208 12:17:39.604117 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:37) [common]
209 12:17:39.711559 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
210 12:17:39.711958 start: 1.5.4 extract-modules (timeout 00:09:37) [common]
211 12:17:39.712066 extracting modules file /var/lib/lava/dispatcher/tmp/9729433/tftp-deploy-nr_ffje2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729433/extract-nfsrootfs-rhkqgwcd
212 12:17:39.723137 extracting modules file /var/lib/lava/dispatcher/tmp/9729433/tftp-deploy-nr_ffje2/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729433/extract-overlay-ramdisk-bbo62ri0/ramdisk
213 12:17:39.733898 end: 1.5.4 extract-modules (duration 00:00:00) [common]
214 12:17:39.734059 start: 1.5.5 apply-overlay-tftp (timeout 00:09:37) [common]
215 12:17:39.734152 [common] Applying overlay to NFS
216 12:17:39.734223 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729433/compress-overlay-yfkf979q/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729433/extract-nfsrootfs-rhkqgwcd
217 12:17:40.523368 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
218 12:17:40.523533 start: 1.5.6 configure-preseed-file (timeout 00:09:36) [common]
219 12:17:40.523633 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
220 12:17:40.523765 start: 1.5.7 compress-ramdisk (timeout 00:09:36) [common]
221 12:17:40.523850 Building ramdisk /var/lib/lava/dispatcher/tmp/9729433/extract-overlay-ramdisk-bbo62ri0/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729433/extract-overlay-ramdisk-bbo62ri0/ramdisk
222 12:17:40.565746 >> 31023 blocks
223 12:17:41.122784 rename /var/lib/lava/dispatcher/tmp/9729433/extract-overlay-ramdisk-bbo62ri0/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729433/tftp-deploy-nr_ffje2/ramdisk/ramdisk.cpio.gz
224 12:17:41.123198 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
225 12:17:41.123321 start: 1.5.8 prepare-kernel (timeout 00:09:35) [common]
226 12:17:41.123424 start: 1.5.8.1 prepare-fit (timeout 00:09:35) [common]
227 12:17:41.123516 No mkimage arch provided, not using FIT.
228 12:17:41.123607 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
229 12:17:41.123698 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
230 12:17:41.123804 end: 1.5 prepare-tftp-overlay (duration 00:00:17) [common]
231 12:17:41.123901 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:35) [common]
232 12:17:41.123979 No LXC device requested
233 12:17:41.124061 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
234 12:17:41.124149 start: 1.7 deploy-device-env (timeout 00:09:35) [common]
235 12:17:41.124234 end: 1.7 deploy-device-env (duration 00:00:00) [common]
236 12:17:41.124305 Checking files for TFTP limit of 4294967296 bytes.
237 12:17:41.124685 end: 1 tftp-deploy (duration 00:00:25) [common]
238 12:17:41.124793 start: 2 depthcharge-action (timeout 00:05:00) [common]
239 12:17:41.124899 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
240 12:17:41.125034 substitutions:
241 12:17:41.125105 - {DTB}: None
242 12:17:41.125171 - {INITRD}: 9729433/tftp-deploy-nr_ffje2/ramdisk/ramdisk.cpio.gz
243 12:17:41.125232 - {KERNEL}: 9729433/tftp-deploy-nr_ffje2/kernel/bzImage
244 12:17:41.125292 - {LAVA_MAC}: None
245 12:17:41.125350 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729433/extract-nfsrootfs-rhkqgwcd
246 12:17:41.125410 - {NFS_SERVER_IP}: 192.168.201.1
247 12:17:41.125467 - {PRESEED_CONFIG}: None
248 12:17:41.125524 - {PRESEED_LOCAL}: None
249 12:17:41.125581 - {RAMDISK}: 9729433/tftp-deploy-nr_ffje2/ramdisk/ramdisk.cpio.gz
250 12:17:41.125637 - {ROOT_PART}: None
251 12:17:41.125694 - {ROOT}: None
252 12:17:41.125749 - {SERVER_IP}: 192.168.201.1
253 12:17:41.125805 - {TEE}: None
254 12:17:41.125861 Parsed boot commands:
255 12:17:41.125917 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
256 12:17:41.126070 Parsed boot commands: tftpboot 192.168.201.1 9729433/tftp-deploy-nr_ffje2/kernel/bzImage 9729433/tftp-deploy-nr_ffje2/kernel/cmdline 9729433/tftp-deploy-nr_ffje2/ramdisk/ramdisk.cpio.gz
257 12:17:41.126165 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
258 12:17:41.126255 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
259 12:17:41.126352 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
260 12:17:41.126445 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
261 12:17:41.126521 Not connected, no need to disconnect.
262 12:17:41.126600 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
263 12:17:41.126686 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
264 12:17:41.126756 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-8'
265 12:17:41.129905 Setting prompt string to ['lava-test: # ']
266 12:17:41.130209 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
267 12:17:41.130318 end: 2.2.1 reset-connection (duration 00:00:00) [common]
268 12:17:41.130413 start: 2.2.2 reset-device (timeout 00:05:00) [common]
269 12:17:41.130506 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
270 12:17:41.130683 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=reboot'
271 12:17:46.271882 >> Command sent successfully.
272 12:17:46.280748 Returned 0 in 5 seconds
273 12:17:46.382527 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
275 12:17:46.384168 end: 2.2.2 reset-device (duration 00:00:05) [common]
276 12:17:46.384718 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
277 12:17:46.385207 Setting prompt string to 'Starting depthcharge on Voema...'
278 12:17:46.385577 Changing prompt to 'Starting depthcharge on Voema...'
279 12:17:46.385978 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
280 12:17:46.387323 [Enter `^Ec?' for help]
281 12:17:47.977060
282 12:17:47.977667
283 12:17:47.986132 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
284 12:17:47.992712 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
285 12:17:47.996249 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
286 12:17:47.999767 CPU: AES supported, TXT NOT supported, VT supported
287 12:17:48.005900 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
288 12:17:48.012674 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
289 12:17:48.016372 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
290 12:17:48.019721 VBOOT: Loading verstage.
291 12:17:48.026011 FMAP: Found "FLASH" version 1.1 at 0x1804000.
292 12:17:48.029128 FMAP: base = 0x0 size = 0x2000000 #areas = 32
293 12:17:48.035780 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
294 12:17:48.042719 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
295 12:17:48.049056 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
296 12:17:48.052622
297 12:17:48.053063
298 12:17:48.062206 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
299 12:17:48.077767 Probing TPM: . done!
300 12:17:48.080304 TPM ready after 0 ms
301 12:17:48.084201 Connected to device vid:did:rid of 1ae0:0028:00
302 12:17:48.095176 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
303 12:17:48.102242 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
304 12:17:48.105035 Initialized TPM device CR50 revision 0
305 12:17:48.156887 tlcl_send_startup: Startup return code is 0
306 12:17:48.157353 TPM: setup succeeded
307 12:17:48.172205 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
308 12:17:48.186549 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
309 12:17:48.199242 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
310 12:17:48.209299 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
311 12:17:48.213032 Chrome EC: UHEPI supported
312 12:17:48.215924 Phase 1
313 12:17:48.219457 FMAP: area GBB found @ 1805000 (458752 bytes)
314 12:17:48.229205 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
315 12:17:48.236289 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
316 12:17:48.242883 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
317 12:17:48.249122 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
318 12:17:48.252578 Recovery requested (1009000e)
319 12:17:48.255994 TPM: Extending digest for VBOOT: boot mode into PCR 0
320 12:17:48.267383 tlcl_extend: response is 0
321 12:17:48.273936 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
322 12:17:48.283804 tlcl_extend: response is 0
323 12:17:48.290932 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
324 12:17:48.297044 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
325 12:17:48.304093 BS: verstage times (exec / console): total (unknown) / 142 ms
326 12:17:48.304705
327 12:17:48.305093
328 12:17:48.317407 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
329 12:17:48.323811 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
330 12:17:48.327017 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
331 12:17:48.330209 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
332 12:17:48.336582 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
333 12:17:48.340053 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
334 12:17:48.343723 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
335 12:17:48.346686 TCO_STS: 0000 0000
336 12:17:48.350452 GEN_PMCON: d0015038 00002200
337 12:17:48.353237 GBLRST_CAUSE: 00000000 00000000
338 12:17:48.356855 HPR_CAUSE0: 00000000
339 12:17:48.357362 prev_sleep_state 5
340 12:17:48.359871 Boot Count incremented to 17289
341 12:17:48.366508 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
342 12:17:48.372919 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
343 12:17:48.382782 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
344 12:17:48.389716 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
345 12:17:48.393140 Chrome EC: UHEPI supported
346 12:17:48.399354 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
347 12:17:48.410844 Probing TPM: done!
348 12:17:48.419108 Connected to device vid:did:rid of 1ae0:0028:00
349 12:17:48.426169 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
350 12:17:48.436116 Initialized TPM device CR50 revision 0
351 12:17:48.446195 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
352 12:17:48.452404 MRC: Hash idx 0x100b comparison successful.
353 12:17:48.455985 MRC cache found, size faa8
354 12:17:48.456543 bootmode is set to: 2
355 12:17:48.459435 SPD index = 0
356 12:17:48.465886 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
357 12:17:48.468898 SPD: module type is LPDDR4X
358 12:17:48.476541 SPD: module part number is MT53E512M64D4NW-046
359 12:17:48.479139 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
360 12:17:48.485464 SPD: device width 16 bits, bus width 16 bits
361 12:17:48.488788 SPD: module size is 1024 MB (per channel)
362 12:17:48.922275 CBMEM:
363 12:17:48.925695 IMD: root @ 0x76fff000 254 entries.
364 12:17:48.929053 IMD: root @ 0x76ffec00 62 entries.
365 12:17:48.932257 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
366 12:17:48.939613 FMAP: area RW_VPD found @ f35000 (8192 bytes)
367 12:17:48.942467 External stage cache:
368 12:17:48.945153 IMD: root @ 0x7b3ff000 254 entries.
369 12:17:48.949168 IMD: root @ 0x7b3fec00 62 entries.
370 12:17:48.964339 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
371 12:17:48.970832 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
372 12:17:48.977487 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
373 12:17:48.991214 MRC: 'RECOVERY_MRC_CACHE' does not need update.
374 12:17:48.994706 cse_lite: Skip switching to RW in the recovery path
375 12:17:48.998070 8 DIMMs found
376 12:17:48.998564 SMM Memory Map
377 12:17:49.002338 SMRAM : 0x7b000000 0x800000
378 12:17:49.005896 Subregion 0: 0x7b000000 0x200000
379 12:17:49.009102 Subregion 1: 0x7b200000 0x200000
380 12:17:49.012491 Subregion 2: 0x7b400000 0x400000
381 12:17:49.015819 top_of_ram = 0x77000000
382 12:17:49.021982 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
383 12:17:49.025361 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
384 12:17:49.032376 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
385 12:17:49.035070 MTRR Range: Start=ff000000 End=0 (Size 1000000)
386 12:17:49.045255 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
387 12:17:49.051876 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
388 12:17:49.061662 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
389 12:17:49.065016 Processing 211 relocs. Offset value of 0x74c0b000
390 12:17:49.073774 BS: romstage times (exec / console): total (unknown) / 277 ms
391 12:17:49.079871
392 12:17:49.080422
393 12:17:49.090166 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
394 12:17:49.093249 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
395 12:17:49.103321 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
396 12:17:49.109996 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
397 12:17:49.116838 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
398 12:17:49.123172 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
399 12:17:49.170262 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
400 12:17:49.177272 Processing 5008 relocs. Offset value of 0x75d98000
401 12:17:49.180591 BS: postcar times (exec / console): total (unknown) / 59 ms
402 12:17:49.183295
403 12:17:49.183828
404 12:17:49.193669 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
405 12:17:49.194173 Normal boot
406 12:17:49.196857 FW_CONFIG value is 0x804c02
407 12:17:49.200319 PCI: 00:07.0 disabled by fw_config
408 12:17:49.203664 PCI: 00:07.1 disabled by fw_config
409 12:17:49.207376 PCI: 00:0d.2 disabled by fw_config
410 12:17:49.210102 PCI: 00:1c.7 disabled by fw_config
411 12:17:49.217027 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
412 12:17:49.223518 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
413 12:17:49.226701 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
414 12:17:49.230370 GENERIC: 0.0 disabled by fw_config
415 12:17:49.233584 GENERIC: 1.0 disabled by fw_config
416 12:17:49.240427 fw_config match found: DB_USB=USB3_ACTIVE
417 12:17:49.243672 fw_config match found: DB_USB=USB3_ACTIVE
418 12:17:49.246820 fw_config match found: DB_USB=USB3_ACTIVE
419 12:17:49.253665 fw_config match found: DB_USB=USB3_ACTIVE
420 12:17:49.256934 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
421 12:17:49.263415 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
422 12:17:49.273225 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
423 12:17:49.279935 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
424 12:17:49.283199 microcode: sig=0x806c1 pf=0x80 revision=0x86
425 12:17:49.289524 microcode: Update skipped, already up-to-date
426 12:17:49.296466 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
427 12:17:49.324104 Detected 4 core, 8 thread CPU.
428 12:17:49.327680 Setting up SMI for CPU
429 12:17:49.331062 IED base = 0x7b400000
430 12:17:49.331650 IED size = 0x00400000
431 12:17:49.333675 Will perform SMM setup.
432 12:17:49.341171 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
433 12:17:49.346879 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
434 12:17:49.353299 Processing 16 relocs. Offset value of 0x00030000
435 12:17:49.356845 Attempting to start 7 APs
436 12:17:49.360066 Waiting for 10ms after sending INIT.
437 12:17:49.376260 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
438 12:17:49.379559 AP: slot 5 apic_id 6.
439 12:17:49.382706 AP: slot 4 apic_id 7.
440 12:17:49.383267 AP: slot 3 apic_id 5.
441 12:17:49.385796 AP: slot 7 apic_id 4.
442 12:17:49.389226 AP: slot 2 apic_id 2.
443 12:17:49.389723 AP: slot 6 apic_id 3.
444 12:17:49.390118 done.
445 12:17:49.395807 Waiting for 2nd SIPI to complete...done.
446 12:17:49.402577 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
447 12:17:49.408907 Processing 13 relocs. Offset value of 0x00038000
448 12:17:49.412277 Unable to locate Global NVS
449 12:17:49.419031 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
450 12:17:49.422822 Installing permanent SMM handler to 0x7b000000
451 12:17:49.432338 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
452 12:17:49.436115 Processing 794 relocs. Offset value of 0x7b010000
453 12:17:49.445552 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
454 12:17:49.448763 Processing 13 relocs. Offset value of 0x7b008000
455 12:17:49.455271 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
456 12:17:49.461985 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
457 12:17:49.465376 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
458 12:17:49.472232 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
459 12:17:49.478784 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
460 12:17:49.485364 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
461 12:17:49.491585 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
462 12:17:49.494981 Unable to locate Global NVS
463 12:17:49.501634 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
464 12:17:49.505141 Clearing SMI status registers
465 12:17:49.505700 SMI_STS: PM1
466 12:17:49.508463 PM1_STS: PWRBTN
467 12:17:49.514768 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
468 12:17:49.518255 In relocation handler: CPU 0
469 12:17:49.521708 New SMBASE=0x7b000000 IEDBASE=0x7b400000
470 12:17:49.528269 Writing SMRR. base = 0x7b000006, mask=0xff800c00
471 12:17:49.531608 Relocation complete.
472 12:17:49.537904 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
473 12:17:49.541305 In relocation handler: CPU 1
474 12:17:49.545044 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
475 12:17:49.545532 Relocation complete.
476 12:17:49.554818 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
477 12:17:49.558547 In relocation handler: CPU 2
478 12:17:49.561489 New SMBASE=0x7afff800 IEDBASE=0x7b400000
479 12:17:49.564872 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 12:17:49.568188 Relocation complete.
481 12:17:49.574912 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
482 12:17:49.578186 In relocation handler: CPU 6
483 12:17:49.581345 New SMBASE=0x7affe800 IEDBASE=0x7b400000
484 12:17:49.585242 Relocation complete.
485 12:17:49.591398 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
486 12:17:49.595492 In relocation handler: CPU 4
487 12:17:49.598474 New SMBASE=0x7afff000 IEDBASE=0x7b400000
488 12:17:49.600887 Relocation complete.
489 12:17:49.607857 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
490 12:17:49.611825 In relocation handler: CPU 3
491 12:17:49.614645 New SMBASE=0x7afff400 IEDBASE=0x7b400000
492 12:17:49.618238 Relocation complete.
493 12:17:49.624580 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
494 12:17:49.627570 In relocation handler: CPU 7
495 12:17:49.630938 New SMBASE=0x7affe400 IEDBASE=0x7b400000
496 12:17:49.637554 Writing SMRR. base = 0x7b000006, mask=0xff800c00
497 12:17:49.638146 Relocation complete.
498 12:17:49.647078 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
499 12:17:49.647629 In relocation handler: CPU 5
500 12:17:49.654022 New SMBASE=0x7affec00 IEDBASE=0x7b400000
501 12:17:49.658099 Writing SMRR. base = 0x7b000006, mask=0xff800c00
502 12:17:49.660614 Relocation complete.
503 12:17:49.661101 Initializing CPU #0
504 12:17:49.664532 CPU: vendor Intel device 806c1
505 12:17:49.667633 CPU: family 06, model 8c, stepping 01
506 12:17:49.671016 Clearing out pending MCEs
507 12:17:49.674199 Setting up local APIC...
508 12:17:49.677653 apic_id: 0x00 done.
509 12:17:49.680757 Turbo is available but hidden
510 12:17:49.684309 Turbo is available and visible
511 12:17:49.687471 microcode: Update skipped, already up-to-date
512 12:17:49.690974 CPU #0 initialized
513 12:17:49.691465 Initializing CPU #3
514 12:17:49.694322 Initializing CPU #7
515 12:17:49.697644 CPU: vendor Intel device 806c1
516 12:17:49.701066 CPU: family 06, model 8c, stepping 01
517 12:17:49.703880 CPU: vendor Intel device 806c1
518 12:17:49.707583 CPU: family 06, model 8c, stepping 01
519 12:17:49.710835 Clearing out pending MCEs
520 12:17:49.714364 Clearing out pending MCEs
521 12:17:49.714904 Setting up local APIC...
522 12:17:49.717421 Initializing CPU #6
523 12:17:49.720538 Initializing CPU #2
524 12:17:49.724043 CPU: vendor Intel device 806c1
525 12:17:49.727602 CPU: family 06, model 8c, stepping 01
526 12:17:49.728175 apic_id: 0x04 done.
527 12:17:49.730740 Setting up local APIC...
528 12:17:49.733901 CPU: vendor Intel device 806c1
529 12:17:49.737163 CPU: family 06, model 8c, stepping 01
530 12:17:49.740856 Clearing out pending MCEs
531 12:17:49.743559 Clearing out pending MCEs
532 12:17:49.747189 Setting up local APIC...
533 12:17:49.747636 Initializing CPU #1
534 12:17:49.753785 microcode: Update skipped, already up-to-date
535 12:17:49.754297 apic_id: 0x05 done.
536 12:17:49.757378 CPU #7 initialized
537 12:17:49.760377 microcode: Update skipped, already up-to-date
538 12:17:49.764141 apic_id: 0x03 done.
539 12:17:49.766885 Setting up local APIC...
540 12:17:49.767332 CPU #3 initialized
541 12:17:49.773422 microcode: Update skipped, already up-to-date
542 12:17:49.773891 apic_id: 0x02 done.
543 12:17:49.777152 CPU #6 initialized
544 12:17:49.780303 microcode: Update skipped, already up-to-date
545 12:17:49.784151 Initializing CPU #4
546 12:17:49.784594 Initializing CPU #5
547 12:17:49.787172 CPU: vendor Intel device 806c1
548 12:17:49.793555 CPU: family 06, model 8c, stepping 01
549 12:17:49.796917 CPU: vendor Intel device 806c1
550 12:17:49.800369 CPU: family 06, model 8c, stepping 01
551 12:17:49.800811 Clearing out pending MCEs
552 12:17:49.803310 Clearing out pending MCEs
553 12:17:49.806931 Setting up local APIC...
554 12:17:49.810326 CPU #2 initialized
555 12:17:49.810876 Setting up local APIC...
556 12:17:49.813100 CPU: vendor Intel device 806c1
557 12:17:49.816343 CPU: family 06, model 8c, stepping 01
558 12:17:49.819950 apic_id: 0x06 done.
559 12:17:49.823368 apic_id: 0x07 done.
560 12:17:49.827071 microcode: Update skipped, already up-to-date
561 12:17:49.833497 microcode: Update skipped, already up-to-date
562 12:17:49.834046 CPU #5 initialized
563 12:17:49.836342 CPU #4 initialized
564 12:17:49.840026 Clearing out pending MCEs
565 12:17:49.840574 Setting up local APIC...
566 12:17:49.843315 apic_id: 0x01 done.
567 12:17:49.846221 microcode: Update skipped, already up-to-date
568 12:17:49.849721 CPU #1 initialized
569 12:17:49.852853 bsp_do_flight_plan done after 455 msecs.
570 12:17:49.856457 CPU: frequency set to 4000 MHz
571 12:17:49.859578 Enabling SMIs.
572 12:17:49.866036 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 348 / 317 ms
573 12:17:49.881477 SATAXPCIE1 indicates PCIe NVMe is present
574 12:17:49.884599 Probing TPM: done!
575 12:17:49.887646 Connected to device vid:did:rid of 1ae0:0028:00
576 12:17:49.898874 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
577 12:17:49.901955 Initialized TPM device CR50 revision 0
578 12:17:49.905179 Enabling S0i3.4
579 12:17:49.911796 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
580 12:17:49.915002 Found a VBT of 8704 bytes after decompression
581 12:17:49.921718 cse_lite: CSE RO boot. HybridStorageMode disabled
582 12:17:49.928347 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
583 12:17:50.004457 FSPS returned 0
584 12:17:50.008119 Executing Phase 1 of FspMultiPhaseSiInit
585 12:17:50.017684 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
586 12:17:50.020939 port C0 DISC req: usage 1 usb3 1 usb2 5
587 12:17:50.024437 Raw Buffer output 0 00000511
588 12:17:50.027241 Raw Buffer output 1 00000000
589 12:17:50.031362 pmc_send_ipc_cmd succeeded
590 12:17:50.038331 port C1 DISC req: usage 1 usb3 2 usb2 3
591 12:17:50.038929 Raw Buffer output 0 00000321
592 12:17:50.041042 Raw Buffer output 1 00000000
593 12:17:50.045342 pmc_send_ipc_cmd succeeded
594 12:17:50.050868 Detected 4 core, 8 thread CPU.
595 12:17:50.054446 Detected 4 core, 8 thread CPU.
596 12:17:50.287829 Display FSP Version Info HOB
597 12:17:50.290819 Reference Code - CPU = a.0.4c.31
598 12:17:50.294869 uCode Version = 0.0.0.86
599 12:17:50.297789 TXT ACM version = ff.ff.ff.ffff
600 12:17:50.300835 Reference Code - ME = a.0.4c.31
601 12:17:50.304393 MEBx version = 0.0.0.0
602 12:17:50.307388 ME Firmware Version = Consumer SKU
603 12:17:50.311045 Reference Code - PCH = a.0.4c.31
604 12:17:50.314117 PCH-CRID Status = Disabled
605 12:17:50.317544 PCH-CRID Original Value = ff.ff.ff.ffff
606 12:17:50.320944 PCH-CRID New Value = ff.ff.ff.ffff
607 12:17:50.324088 OPROM - RST - RAID = ff.ff.ff.ffff
608 12:17:50.327873 PCH Hsio Version = 4.0.0.0
609 12:17:50.330698 Reference Code - SA - System Agent = a.0.4c.31
610 12:17:50.334007 Reference Code - MRC = 2.0.0.1
611 12:17:50.337104 SA - PCIe Version = a.0.4c.31
612 12:17:50.340562 SA-CRID Status = Disabled
613 12:17:50.344041 SA-CRID Original Value = 0.0.0.1
614 12:17:50.347115 SA-CRID New Value = 0.0.0.1
615 12:17:50.350582 OPROM - VBIOS = ff.ff.ff.ffff
616 12:17:50.353601 IO Manageability Engine FW Version = 11.1.4.0
617 12:17:50.356886 PHY Build Version = 0.0.0.e0
618 12:17:50.360374 Thunderbolt(TM) FW Version = 0.0.0.0
619 12:17:50.367385 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
620 12:17:50.370689 ITSS IRQ Polarities Before:
621 12:17:50.371130 IPC0: 0xffffffff
622 12:17:50.373231 IPC1: 0xffffffff
623 12:17:50.373710 IPC2: 0xffffffff
624 12:17:50.376947 IPC3: 0xffffffff
625 12:17:50.380535 ITSS IRQ Polarities After:
626 12:17:50.380976 IPC0: 0xffffffff
627 12:17:50.383373 IPC1: 0xffffffff
628 12:17:50.383837 IPC2: 0xffffffff
629 12:17:50.386771 IPC3: 0xffffffff
630 12:17:50.390349 Found PCIe Root Port #9 at PCI: 00:1d.0.
631 12:17:50.403493 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
632 12:17:50.413579 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
633 12:17:50.427168 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
634 12:17:50.433595 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
635 12:17:50.436265 Enumerating buses...
636 12:17:50.439890 Show all devs... Before device enumeration.
637 12:17:50.443182 Root Device: enabled 1
638 12:17:50.446702 DOMAIN: 0000: enabled 1
639 12:17:50.447296 CPU_CLUSTER: 0: enabled 1
640 12:17:50.450413 PCI: 00:00.0: enabled 1
641 12:17:50.453173 PCI: 00:02.0: enabled 1
642 12:17:50.456865 PCI: 00:04.0: enabled 1
643 12:17:50.457360 PCI: 00:05.0: enabled 1
644 12:17:50.460012 PCI: 00:06.0: enabled 0
645 12:17:50.463167 PCI: 00:07.0: enabled 0
646 12:17:50.465953 PCI: 00:07.1: enabled 0
647 12:17:50.466445 PCI: 00:07.2: enabled 0
648 12:17:50.469363 PCI: 00:07.3: enabled 0
649 12:17:50.473434 PCI: 00:08.0: enabled 1
650 12:17:50.473995 PCI: 00:09.0: enabled 0
651 12:17:50.476297 PCI: 00:0a.0: enabled 0
652 12:17:50.479399 PCI: 00:0d.0: enabled 1
653 12:17:50.482798 PCI: 00:0d.1: enabled 0
654 12:17:50.483290 PCI: 00:0d.2: enabled 0
655 12:17:50.486362 PCI: 00:0d.3: enabled 0
656 12:17:50.489398 PCI: 00:0e.0: enabled 0
657 12:17:50.492849 PCI: 00:10.2: enabled 1
658 12:17:50.493447 PCI: 00:10.6: enabled 0
659 12:17:50.495822 PCI: 00:10.7: enabled 0
660 12:17:50.499744 PCI: 00:12.0: enabled 0
661 12:17:50.502953 PCI: 00:12.6: enabled 0
662 12:17:50.503539 PCI: 00:13.0: enabled 0
663 12:17:50.505887 PCI: 00:14.0: enabled 1
664 12:17:50.509135 PCI: 00:14.1: enabled 0
665 12:17:50.512735 PCI: 00:14.2: enabled 1
666 12:17:50.513299 PCI: 00:14.3: enabled 1
667 12:17:50.515393 PCI: 00:15.0: enabled 1
668 12:17:50.519004 PCI: 00:15.1: enabled 1
669 12:17:50.522315 PCI: 00:15.2: enabled 1
670 12:17:50.522844 PCI: 00:15.3: enabled 1
671 12:17:50.525500 PCI: 00:16.0: enabled 1
672 12:17:50.529015 PCI: 00:16.1: enabled 0
673 12:17:50.529518 PCI: 00:16.2: enabled 0
674 12:17:50.532128 PCI: 00:16.3: enabled 0
675 12:17:50.535792 PCI: 00:16.4: enabled 0
676 12:17:50.538970 PCI: 00:16.5: enabled 0
677 12:17:50.539567 PCI: 00:17.0: enabled 1
678 12:17:50.541961 PCI: 00:19.0: enabled 0
679 12:17:50.545304 PCI: 00:19.1: enabled 1
680 12:17:50.548498 PCI: 00:19.2: enabled 0
681 12:17:50.548992 PCI: 00:1c.0: enabled 1
682 12:17:50.551796 PCI: 00:1c.1: enabled 0
683 12:17:50.555978 PCI: 00:1c.2: enabled 0
684 12:17:50.558997 PCI: 00:1c.3: enabled 0
685 12:17:50.559513 PCI: 00:1c.4: enabled 0
686 12:17:50.562064 PCI: 00:1c.5: enabled 0
687 12:17:50.565698 PCI: 00:1c.6: enabled 1
688 12:17:50.568799 PCI: 00:1c.7: enabled 0
689 12:17:50.569290 PCI: 00:1d.0: enabled 1
690 12:17:50.571968 PCI: 00:1d.1: enabled 0
691 12:17:50.575315 PCI: 00:1d.2: enabled 1
692 12:17:50.578682 PCI: 00:1d.3: enabled 0
693 12:17:50.579176 PCI: 00:1e.0: enabled 1
694 12:17:50.582351 PCI: 00:1e.1: enabled 0
695 12:17:50.585316 PCI: 00:1e.2: enabled 1
696 12:17:50.585809 PCI: 00:1e.3: enabled 1
697 12:17:50.588649 PCI: 00:1f.0: enabled 1
698 12:17:50.591636 PCI: 00:1f.1: enabled 0
699 12:17:50.595518 PCI: 00:1f.2: enabled 1
700 12:17:50.596159 PCI: 00:1f.3: enabled 1
701 12:17:50.598626 PCI: 00:1f.4: enabled 0
702 12:17:50.602262 PCI: 00:1f.5: enabled 1
703 12:17:50.604955 PCI: 00:1f.6: enabled 0
704 12:17:50.605485 PCI: 00:1f.7: enabled 0
705 12:17:50.608559 APIC: 00: enabled 1
706 12:17:50.611676 GENERIC: 0.0: enabled 1
707 12:17:50.612347 GENERIC: 0.0: enabled 1
708 12:17:50.615002 GENERIC: 1.0: enabled 1
709 12:17:50.618381 GENERIC: 0.0: enabled 1
710 12:17:50.621853 GENERIC: 1.0: enabled 1
711 12:17:50.622442 USB0 port 0: enabled 1
712 12:17:50.624802 GENERIC: 0.0: enabled 1
713 12:17:50.628390 USB0 port 0: enabled 1
714 12:17:50.631678 GENERIC: 0.0: enabled 1
715 12:17:50.632302 I2C: 00:1a: enabled 1
716 12:17:50.634635 I2C: 00:31: enabled 1
717 12:17:50.638517 I2C: 00:32: enabled 1
718 12:17:50.639011 I2C: 00:10: enabled 1
719 12:17:50.641623 I2C: 00:15: enabled 1
720 12:17:50.645172 GENERIC: 0.0: enabled 0
721 12:17:50.645666 GENERIC: 1.0: enabled 0
722 12:17:50.648209 GENERIC: 0.0: enabled 1
723 12:17:50.651146 SPI: 00: enabled 1
724 12:17:50.651637 SPI: 00: enabled 1
725 12:17:50.654776 PNP: 0c09.0: enabled 1
726 12:17:50.658068 GENERIC: 0.0: enabled 1
727 12:17:50.661556 USB3 port 0: enabled 1
728 12:17:50.662052 USB3 port 1: enabled 1
729 12:17:50.664556 USB3 port 2: enabled 0
730 12:17:50.667846 USB3 port 3: enabled 0
731 12:17:50.668427 USB2 port 0: enabled 0
732 12:17:50.671486 USB2 port 1: enabled 1
733 12:17:50.674407 USB2 port 2: enabled 1
734 12:17:50.674948 USB2 port 3: enabled 0
735 12:17:50.677775 USB2 port 4: enabled 1
736 12:17:50.681093 USB2 port 5: enabled 0
737 12:17:50.684438 USB2 port 6: enabled 0
738 12:17:50.684937 USB2 port 7: enabled 0
739 12:17:50.688160 USB2 port 8: enabled 0
740 12:17:50.691188 USB2 port 9: enabled 0
741 12:17:50.691633 USB3 port 0: enabled 0
742 12:17:50.694551 USB3 port 1: enabled 1
743 12:17:50.697883 USB3 port 2: enabled 0
744 12:17:50.701054 USB3 port 3: enabled 0
745 12:17:50.701593 GENERIC: 0.0: enabled 1
746 12:17:50.704462 GENERIC: 1.0: enabled 1
747 12:17:50.707872 APIC: 01: enabled 1
748 12:17:50.708359 APIC: 02: enabled 1
749 12:17:50.711086 APIC: 05: enabled 1
750 12:17:50.711604 APIC: 07: enabled 1
751 12:17:50.714297 APIC: 06: enabled 1
752 12:17:50.718073 APIC: 03: enabled 1
753 12:17:50.718587 APIC: 04: enabled 1
754 12:17:50.720877 Compare with tree...
755 12:17:50.724483 Root Device: enabled 1
756 12:17:50.724923 DOMAIN: 0000: enabled 1
757 12:17:50.727550 PCI: 00:00.0: enabled 1
758 12:17:50.730800 PCI: 00:02.0: enabled 1
759 12:17:50.734075 PCI: 00:04.0: enabled 1
760 12:17:50.737672 GENERIC: 0.0: enabled 1
761 12:17:50.738116 PCI: 00:05.0: enabled 1
762 12:17:50.741103 PCI: 00:06.0: enabled 0
763 12:17:50.744198 PCI: 00:07.0: enabled 0
764 12:17:50.747880 GENERIC: 0.0: enabled 1
765 12:17:50.751268 PCI: 00:07.1: enabled 0
766 12:17:50.753961 GENERIC: 1.0: enabled 1
767 12:17:50.754504 PCI: 00:07.2: enabled 0
768 12:17:50.757667 GENERIC: 0.0: enabled 1
769 12:17:50.760816 PCI: 00:07.3: enabled 0
770 12:17:50.764558 GENERIC: 1.0: enabled 1
771 12:17:50.767167 PCI: 00:08.0: enabled 1
772 12:17:50.767616 PCI: 00:09.0: enabled 0
773 12:17:50.770761 PCI: 00:0a.0: enabled 0
774 12:17:50.774370 PCI: 00:0d.0: enabled 1
775 12:17:50.777154 USB0 port 0: enabled 1
776 12:17:50.780736 USB3 port 0: enabled 1
777 12:17:50.781182 USB3 port 1: enabled 1
778 12:17:50.783801 USB3 port 2: enabled 0
779 12:17:50.787262 USB3 port 3: enabled 0
780 12:17:50.791204 PCI: 00:0d.1: enabled 0
781 12:17:50.793537 PCI: 00:0d.2: enabled 0
782 12:17:50.794031 GENERIC: 0.0: enabled 1
783 12:17:50.797351 PCI: 00:0d.3: enabled 0
784 12:17:50.800499 PCI: 00:0e.0: enabled 0
785 12:17:50.804267 PCI: 00:10.2: enabled 1
786 12:17:50.807256 PCI: 00:10.6: enabled 0
787 12:17:50.807773 PCI: 00:10.7: enabled 0
788 12:17:50.810717 PCI: 00:12.0: enabled 0
789 12:17:50.813770 PCI: 00:12.6: enabled 0
790 12:17:50.817490 PCI: 00:13.0: enabled 0
791 12:17:50.820799 PCI: 00:14.0: enabled 1
792 12:17:50.821360 USB0 port 0: enabled 1
793 12:17:50.824019 USB2 port 0: enabled 0
794 12:17:50.827156 USB2 port 1: enabled 1
795 12:17:50.830789 USB2 port 2: enabled 1
796 12:17:50.833665 USB2 port 3: enabled 0
797 12:17:50.837017 USB2 port 4: enabled 1
798 12:17:50.837506 USB2 port 5: enabled 0
799 12:17:50.840354 USB2 port 6: enabled 0
800 12:17:50.843810 USB2 port 7: enabled 0
801 12:17:50.847323 USB2 port 8: enabled 0
802 12:17:50.850004 USB2 port 9: enabled 0
803 12:17:50.850497 USB3 port 0: enabled 0
804 12:17:50.853936 USB3 port 1: enabled 1
805 12:17:50.857452 USB3 port 2: enabled 0
806 12:17:50.860115 USB3 port 3: enabled 0
807 12:17:50.863592 PCI: 00:14.1: enabled 0
808 12:17:50.866761 PCI: 00:14.2: enabled 1
809 12:17:50.867253 PCI: 00:14.3: enabled 1
810 12:17:50.870262 GENERIC: 0.0: enabled 1
811 12:17:50.873414 PCI: 00:15.0: enabled 1
812 12:17:50.876904 I2C: 00:1a: enabled 1
813 12:17:50.877582 I2C: 00:31: enabled 1
814 12:17:50.879829 I2C: 00:32: enabled 1
815 12:17:50.883338 PCI: 00:15.1: enabled 1
816 12:17:50.886685 I2C: 00:10: enabled 1
817 12:17:50.890054 PCI: 00:15.2: enabled 1
818 12:17:50.890649 PCI: 00:15.3: enabled 1
819 12:17:50.893605 PCI: 00:16.0: enabled 1
820 12:17:50.896480 PCI: 00:16.1: enabled 0
821 12:17:50.900383 PCI: 00:16.2: enabled 0
822 12:17:50.903202 PCI: 00:16.3: enabled 0
823 12:17:50.903674 PCI: 00:16.4: enabled 0
824 12:17:50.906671 PCI: 00:16.5: enabled 0
825 12:17:50.910303 PCI: 00:17.0: enabled 1
826 12:17:50.913649 PCI: 00:19.0: enabled 0
827 12:17:50.916975 PCI: 00:19.1: enabled 1
828 12:17:50.917458 I2C: 00:15: enabled 1
829 12:17:50.920586 PCI: 00:19.2: enabled 0
830 12:17:50.923754 PCI: 00:1d.0: enabled 1
831 12:17:50.973500 GENERIC: 0.0: enabled 1
832 12:17:50.974072 PCI: 00:1e.0: enabled 1
833 12:17:50.974473 PCI: 00:1e.1: enabled 0
834 12:17:50.975364 PCI: 00:1e.2: enabled 1
835 12:17:50.975830 SPI: 00: enabled 1
836 12:17:50.976295 PCI: 00:1e.3: enabled 1
837 12:17:50.976741 SPI: 00: enabled 1
838 12:17:50.977178 PCI: 00:1f.0: enabled 1
839 12:17:50.977672 PNP: 0c09.0: enabled 1
840 12:17:50.978231 PCI: 00:1f.1: enabled 0
841 12:17:50.978638 PCI: 00:1f.2: enabled 1
842 12:17:50.978981 GENERIC: 0.0: enabled 1
843 12:17:50.979315 GENERIC: 0.0: enabled 1
844 12:17:50.979643 GENERIC: 1.0: enabled 1
845 12:17:50.980009 PCI: 00:1f.3: enabled 1
846 12:17:50.980333 PCI: 00:1f.4: enabled 0
847 12:17:50.980647 PCI: 00:1f.5: enabled 1
848 12:17:50.981348 PCI: 00:1f.6: enabled 0
849 12:17:50.981733 PCI: 00:1f.7: enabled 0
850 12:17:51.025656 CPU_CLUSTER: 0: enabled 1
851 12:17:51.026244 APIC: 00: enabled 1
852 12:17:51.026747 APIC: 01: enabled 1
853 12:17:51.027599 APIC: 02: enabled 1
854 12:17:51.028048 APIC: 05: enabled 1
855 12:17:51.028501 APIC: 07: enabled 1
856 12:17:51.028938 APIC: 06: enabled 1
857 12:17:51.029364 APIC: 03: enabled 1
858 12:17:51.029783 APIC: 04: enabled 1
859 12:17:51.030202 Root Device scanning...
860 12:17:51.030622 scan_static_bus for Root Device
861 12:17:51.031038 DOMAIN: 0000 enabled
862 12:17:51.031453 CPU_CLUSTER: 0 enabled
863 12:17:51.031909 DOMAIN: 0000 scanning...
864 12:17:51.032331 PCI: pci_scan_bus for bus 00
865 12:17:51.032745 PCI: 00:00.0 [8086/0000] ops
866 12:17:51.033526 PCI: 00:00.0 [8086/9a12] enabled
867 12:17:51.033937 PCI: 00:02.0 [8086/0000] bus ops
868 12:17:51.034369 PCI: 00:02.0 [8086/9a40] enabled
869 12:17:51.075351 PCI: 00:04.0 [8086/0000] bus ops
870 12:17:51.075988 PCI: 00:04.0 [8086/9a03] enabled
871 12:17:51.076847 PCI: 00:05.0 [8086/9a19] enabled
872 12:17:51.077412 PCI: 00:07.0 [0000/0000] hidden
873 12:17:51.078015 PCI: 00:08.0 [8086/9a11] enabled
874 12:17:51.078580 PCI: 00:0a.0 [8086/9a0d] disabled
875 12:17:51.079092 PCI: 00:0d.0 [8086/0000] bus ops
876 12:17:51.079542 PCI: 00:0d.0 [8086/9a13] enabled
877 12:17:51.080418 PCI: 00:14.0 [8086/0000] bus ops
878 12:17:51.080971 PCI: 00:14.0 [8086/a0ed] enabled
879 12:17:51.081451 PCI: 00:14.2 [8086/a0ef] enabled
880 12:17:51.081812 PCI: 00:14.3 [8086/0000] bus ops
881 12:17:51.082153 PCI: 00:14.3 [8086/a0f0] enabled
882 12:17:51.082496 PCI: 00:15.0 [8086/0000] bus ops
883 12:17:51.082965 PCI: 00:15.0 [8086/a0e8] enabled
884 12:17:51.098668 PCI: 00:15.1 [8086/0000] bus ops
885 12:17:51.099318 PCI: 00:15.1 [8086/a0e9] enabled
886 12:17:51.099840 PCI: 00:15.2 [8086/0000] bus ops
887 12:17:51.100276 PCI: 00:15.2 [8086/a0ea] enabled
888 12:17:51.100738 PCI: 00:15.3 [8086/0000] bus ops
889 12:17:51.101152 PCI: 00:15.3 [8086/a0eb] enabled
890 12:17:51.102039 PCI: 00:16.0 [8086/0000] ops
891 12:17:51.102492 PCI: 00:16.0 [8086/a0e0] enabled
892 12:17:51.105608 PCI: Static device PCI: 00:17.0 not found, disabling it.
893 12:17:51.108764 PCI: 00:19.0 [8086/0000] bus ops
894 12:17:51.112132 PCI: 00:19.0 [8086/a0c5] disabled
895 12:17:51.115315 PCI: 00:19.1 [8086/0000] bus ops
896 12:17:51.118646 PCI: 00:19.1 [8086/a0c6] enabled
897 12:17:51.121876 PCI: 00:1d.0 [8086/0000] bus ops
898 12:17:51.125458 PCI: 00:1d.0 [8086/a0b0] enabled
899 12:17:51.128485 PCI: 00:1e.0 [8086/0000] ops
900 12:17:51.131623 PCI: 00:1e.0 [8086/a0a8] enabled
901 12:17:51.134472 PCI: 00:1e.2 [8086/0000] bus ops
902 12:17:51.138093 PCI: 00:1e.2 [8086/a0aa] enabled
903 12:17:51.141487 PCI: 00:1e.3 [8086/0000] bus ops
904 12:17:51.144449 PCI: 00:1e.3 [8086/a0ab] enabled
905 12:17:51.147618 PCI: 00:1f.0 [8086/0000] bus ops
906 12:17:51.151191 PCI: 00:1f.0 [8086/a087] enabled
907 12:17:51.154378 RTC Init
908 12:17:51.157882 Set power on after power failure.
909 12:17:51.158345 Disabling Deep S3
910 12:17:51.160713 Disabling Deep S3
911 12:17:51.164288 Disabling Deep S4
912 12:17:51.164772 Disabling Deep S4
913 12:17:51.167611 Disabling Deep S5
914 12:17:51.168083 Disabling Deep S5
915 12:17:51.170662 PCI: 00:1f.2 [0000/0000] hidden
916 12:17:51.174222 PCI: 00:1f.3 [8086/0000] bus ops
917 12:17:51.177282 PCI: 00:1f.3 [8086/a0c8] enabled
918 12:17:51.181043 PCI: 00:1f.5 [8086/0000] bus ops
919 12:17:51.184124 PCI: 00:1f.5 [8086/a0a4] enabled
920 12:17:51.187440 PCI: Leftover static devices:
921 12:17:51.190791 PCI: 00:10.2
922 12:17:51.191254 PCI: 00:10.6
923 12:17:51.191597 PCI: 00:10.7
924 12:17:51.194203 PCI: 00:06.0
925 12:17:51.194630 PCI: 00:07.1
926 12:17:51.197307 PCI: 00:07.2
927 12:17:51.197741 PCI: 00:07.3
928 12:17:51.201038 PCI: 00:09.0
929 12:17:51.201642 PCI: 00:0d.1
930 12:17:51.202029 PCI: 00:0d.2
931 12:17:51.204643 PCI: 00:0d.3
932 12:17:51.205111 PCI: 00:0e.0
933 12:17:51.207981 PCI: 00:12.0
934 12:17:51.208419 PCI: 00:12.6
935 12:17:51.208759 PCI: 00:13.0
936 12:17:51.210638 PCI: 00:14.1
937 12:17:51.211080 PCI: 00:16.1
938 12:17:51.213759 PCI: 00:16.2
939 12:17:51.214206 PCI: 00:16.3
940 12:17:51.214562 PCI: 00:16.4
941 12:17:51.217007 PCI: 00:16.5
942 12:17:51.217634 PCI: 00:17.0
943 12:17:51.220672 PCI: 00:19.2
944 12:17:51.221161 PCI: 00:1e.1
945 12:17:51.223786 PCI: 00:1f.1
946 12:17:51.224288 PCI: 00:1f.4
947 12:17:51.224657 PCI: 00:1f.6
948 12:17:51.227260 PCI: 00:1f.7
949 12:17:51.230217 PCI: Check your devicetree.cb.
950 12:17:51.230585 PCI: 00:02.0 scanning...
951 12:17:51.237312 scan_generic_bus for PCI: 00:02.0
952 12:17:51.240308 scan_generic_bus for PCI: 00:02.0 done
953 12:17:51.244039 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
954 12:17:51.246921 PCI: 00:04.0 scanning...
955 12:17:51.250444 scan_generic_bus for PCI: 00:04.0
956 12:17:51.253373 GENERIC: 0.0 enabled
957 12:17:51.257187 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
958 12:17:51.263535 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
959 12:17:51.266825 PCI: 00:0d.0 scanning...
960 12:17:51.270535 scan_static_bus for PCI: 00:0d.0
961 12:17:51.270839 USB0 port 0 enabled
962 12:17:51.273726 USB0 port 0 scanning...
963 12:17:51.276667 scan_static_bus for USB0 port 0
964 12:17:51.280614 USB3 port 0 enabled
965 12:17:51.280846 USB3 port 1 enabled
966 12:17:51.283191 USB3 port 2 disabled
967 12:17:51.286967 USB3 port 3 disabled
968 12:17:51.287283 USB3 port 0 scanning...
969 12:17:51.290425 scan_static_bus for USB3 port 0
970 12:17:51.296363 scan_static_bus for USB3 port 0 done
971 12:17:51.299776 scan_bus: bus USB3 port 0 finished in 6 msecs
972 12:17:51.303145 USB3 port 1 scanning...
973 12:17:51.306799 scan_static_bus for USB3 port 1
974 12:17:51.310217 scan_static_bus for USB3 port 1 done
975 12:17:51.313723 scan_bus: bus USB3 port 1 finished in 6 msecs
976 12:17:51.316997 scan_static_bus for USB0 port 0 done
977 12:17:51.323368 scan_bus: bus USB0 port 0 finished in 43 msecs
978 12:17:51.326726 scan_static_bus for PCI: 00:0d.0 done
979 12:17:51.330188 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
980 12:17:51.333537 PCI: 00:14.0 scanning...
981 12:17:51.336641 scan_static_bus for PCI: 00:14.0
982 12:17:51.340060 USB0 port 0 enabled
983 12:17:51.343233 USB0 port 0 scanning...
984 12:17:51.346552 scan_static_bus for USB0 port 0
985 12:17:51.347033 USB2 port 0 disabled
986 12:17:51.349516 USB2 port 1 enabled
987 12:17:51.353171 USB2 port 2 enabled
988 12:17:51.353562 USB2 port 3 disabled
989 12:17:51.356114 USB2 port 4 enabled
990 12:17:51.359796 USB2 port 5 disabled
991 12:17:51.360172 USB2 port 6 disabled
992 12:17:51.362928 USB2 port 7 disabled
993 12:17:51.363325 USB2 port 8 disabled
994 12:17:51.366558 USB2 port 9 disabled
995 12:17:51.369305 USB3 port 0 disabled
996 12:17:51.369683 USB3 port 1 enabled
997 12:17:51.372870 USB3 port 2 disabled
998 12:17:51.376238 USB3 port 3 disabled
999 12:17:51.376629 USB2 port 1 scanning...
1000 12:17:51.379727 scan_static_bus for USB2 port 1
1001 12:17:51.386595 scan_static_bus for USB2 port 1 done
1002 12:17:51.389649 scan_bus: bus USB2 port 1 finished in 6 msecs
1003 12:17:51.392834 USB2 port 2 scanning...
1004 12:17:51.396359 scan_static_bus for USB2 port 2
1005 12:17:51.399106 scan_static_bus for USB2 port 2 done
1006 12:17:51.402569 scan_bus: bus USB2 port 2 finished in 6 msecs
1007 12:17:51.406230 USB2 port 4 scanning...
1008 12:17:51.409361 scan_static_bus for USB2 port 4
1009 12:17:51.412309 scan_static_bus for USB2 port 4 done
1010 12:17:51.419227 scan_bus: bus USB2 port 4 finished in 6 msecs
1011 12:17:51.419629 USB3 port 1 scanning...
1012 12:17:51.422271 scan_static_bus for USB3 port 1
1013 12:17:51.429082 scan_static_bus for USB3 port 1 done
1014 12:17:51.432615 scan_bus: bus USB3 port 1 finished in 6 msecs
1015 12:17:51.436129 scan_static_bus for USB0 port 0 done
1016 12:17:51.438974 scan_bus: bus USB0 port 0 finished in 93 msecs
1017 12:17:51.445578 scan_static_bus for PCI: 00:14.0 done
1018 12:17:51.448642 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1019 12:17:51.452139 PCI: 00:14.3 scanning...
1020 12:17:51.455570 scan_static_bus for PCI: 00:14.3
1021 12:17:51.458746 GENERIC: 0.0 enabled
1022 12:17:51.462155 scan_static_bus for PCI: 00:14.3 done
1023 12:17:51.465280 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1024 12:17:51.468601 PCI: 00:15.0 scanning...
1025 12:17:51.471549 scan_static_bus for PCI: 00:15.0
1026 12:17:51.475077 I2C: 00:1a enabled
1027 12:17:51.475575 I2C: 00:31 enabled
1028 12:17:51.478860 I2C: 00:32 enabled
1029 12:17:51.481601 scan_static_bus for PCI: 00:15.0 done
1030 12:17:51.485446 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1031 12:17:51.489085 PCI: 00:15.1 scanning...
1032 12:17:51.492261 scan_static_bus for PCI: 00:15.1
1033 12:17:51.495542 I2C: 00:10 enabled
1034 12:17:51.499097 scan_static_bus for PCI: 00:15.1 done
1035 12:17:51.501841 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1036 12:17:51.505070 PCI: 00:15.2 scanning...
1037 12:17:51.508829 scan_static_bus for PCI: 00:15.2
1038 12:17:51.512194 scan_static_bus for PCI: 00:15.2 done
1039 12:17:51.518721 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1040 12:17:51.519173 PCI: 00:15.3 scanning...
1041 12:17:51.522497 scan_static_bus for PCI: 00:15.3
1042 12:17:51.528646 scan_static_bus for PCI: 00:15.3 done
1043 12:17:51.531814 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1044 12:17:51.535313 PCI: 00:19.1 scanning...
1045 12:17:51.538505 scan_static_bus for PCI: 00:19.1
1046 12:17:51.538947 I2C: 00:15 enabled
1047 12:17:51.545220 scan_static_bus for PCI: 00:19.1 done
1048 12:17:51.548771 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1049 12:17:51.551619 PCI: 00:1d.0 scanning...
1050 12:17:51.555199 do_pci_scan_bridge for PCI: 00:1d.0
1051 12:17:51.558275 PCI: pci_scan_bus for bus 01
1052 12:17:51.561719 PCI: 01:00.0 [1c5c/174a] enabled
1053 12:17:51.564922 GENERIC: 0.0 enabled
1054 12:17:51.568599 Enabling Common Clock Configuration
1055 12:17:51.571643 L1 Sub-State supported from root port 29
1056 12:17:51.574691 L1 Sub-State Support = 0xf
1057 12:17:51.578185 CommonModeRestoreTime = 0x28
1058 12:17:51.581504 Power On Value = 0x16, Power On Scale = 0x0
1059 12:17:51.584916 ASPM: Enabled L1
1060 12:17:51.587963 PCIe: Max_Payload_Size adjusted to 128
1061 12:17:51.590664 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1062 12:17:51.594224 PCI: 00:1e.2 scanning...
1063 12:17:51.597242 scan_generic_bus for PCI: 00:1e.2
1064 12:17:51.600794 SPI: 00 enabled
1065 12:17:51.607472 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1066 12:17:51.610695 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1067 12:17:51.614216 PCI: 00:1e.3 scanning...
1068 12:17:51.617516 scan_generic_bus for PCI: 00:1e.3
1069 12:17:51.617624 SPI: 00 enabled
1070 12:17:51.624024 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1071 12:17:51.630316 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1072 12:17:51.630405 PCI: 00:1f.0 scanning...
1073 12:17:51.633678 scan_static_bus for PCI: 00:1f.0
1074 12:17:51.637409 PNP: 0c09.0 enabled
1075 12:17:51.640356 PNP: 0c09.0 scanning...
1076 12:17:51.643844 scan_static_bus for PNP: 0c09.0
1077 12:17:51.647078 scan_static_bus for PNP: 0c09.0 done
1078 12:17:51.650603 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1079 12:17:51.657043 scan_static_bus for PCI: 00:1f.0 done
1080 12:17:51.660082 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1081 12:17:51.663559 PCI: 00:1f.2 scanning...
1082 12:17:51.667004 scan_static_bus for PCI: 00:1f.2
1083 12:17:51.670281 GENERIC: 0.0 enabled
1084 12:17:51.670366 GENERIC: 0.0 scanning...
1085 12:17:51.673389 scan_static_bus for GENERIC: 0.0
1086 12:17:51.676284 GENERIC: 0.0 enabled
1087 12:17:51.680086 GENERIC: 1.0 enabled
1088 12:17:51.683464 scan_static_bus for GENERIC: 0.0 done
1089 12:17:51.686184 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1090 12:17:51.689749 scan_static_bus for PCI: 00:1f.2 done
1091 12:17:51.696360 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1092 12:17:51.699815 PCI: 00:1f.3 scanning...
1093 12:17:51.703348 scan_static_bus for PCI: 00:1f.3
1094 12:17:51.706236 scan_static_bus for PCI: 00:1f.3 done
1095 12:17:51.709437 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1096 12:17:51.712853 PCI: 00:1f.5 scanning...
1097 12:17:51.716071 scan_generic_bus for PCI: 00:1f.5
1098 12:17:51.719991 scan_generic_bus for PCI: 00:1f.5 done
1099 12:17:51.726151 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1100 12:17:51.729669 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1101 12:17:51.733282 scan_static_bus for Root Device done
1102 12:17:51.739431 scan_bus: bus Root Device finished in 736 msecs
1103 12:17:51.739775 done
1104 12:17:51.745769 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1105 12:17:51.748940 Chrome EC: UHEPI supported
1106 12:17:51.756432 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1107 12:17:51.762372 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1108 12:17:51.765721 SPI flash protection: WPSW=0 SRP0=0
1109 12:17:51.769831 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1110 12:17:51.776267 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1111 12:17:51.779271 found VGA at PCI: 00:02.0
1112 12:17:51.782595 Setting up VGA for PCI: 00:02.0
1113 12:17:51.785692 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1114 12:17:51.792285 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1115 12:17:51.795779 Allocating resources...
1116 12:17:51.796221 Reading resources...
1117 12:17:51.802239 Root Device read_resources bus 0 link: 0
1118 12:17:51.805334 DOMAIN: 0000 read_resources bus 0 link: 0
1119 12:17:51.808988 PCI: 00:04.0 read_resources bus 1 link: 0
1120 12:17:51.815607 PCI: 00:04.0 read_resources bus 1 link: 0 done
1121 12:17:51.818547 PCI: 00:0d.0 read_resources bus 0 link: 0
1122 12:17:51.825561 USB0 port 0 read_resources bus 0 link: 0
1123 12:17:51.829143 USB0 port 0 read_resources bus 0 link: 0 done
1124 12:17:51.835174 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1125 12:17:51.838752 PCI: 00:14.0 read_resources bus 0 link: 0
1126 12:17:51.844800 USB0 port 0 read_resources bus 0 link: 0
1127 12:17:51.848122 USB0 port 0 read_resources bus 0 link: 0 done
1128 12:17:51.854373 PCI: 00:14.0 read_resources bus 0 link: 0 done
1129 12:17:51.858219 PCI: 00:14.3 read_resources bus 0 link: 0
1130 12:17:51.864707 PCI: 00:14.3 read_resources bus 0 link: 0 done
1131 12:17:51.867775 PCI: 00:15.0 read_resources bus 0 link: 0
1132 12:17:51.874403 PCI: 00:15.0 read_resources bus 0 link: 0 done
1133 12:17:51.877639 PCI: 00:15.1 read_resources bus 0 link: 0
1134 12:17:51.884101 PCI: 00:15.1 read_resources bus 0 link: 0 done
1135 12:17:51.887775 PCI: 00:19.1 read_resources bus 0 link: 0
1136 12:17:51.894464 PCI: 00:19.1 read_resources bus 0 link: 0 done
1137 12:17:51.897786 PCI: 00:1d.0 read_resources bus 1 link: 0
1138 12:17:51.904695 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1139 12:17:51.908102 PCI: 00:1e.2 read_resources bus 2 link: 0
1140 12:17:51.914783 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1141 12:17:51.917975 PCI: 00:1e.3 read_resources bus 3 link: 0
1142 12:17:51.924603 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1143 12:17:51.927829 PCI: 00:1f.0 read_resources bus 0 link: 0
1144 12:17:51.934723 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1145 12:17:51.937852 PCI: 00:1f.2 read_resources bus 0 link: 0
1146 12:17:51.940967 GENERIC: 0.0 read_resources bus 0 link: 0
1147 12:17:51.948603 GENERIC: 0.0 read_resources bus 0 link: 0 done
1148 12:17:51.951676 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1149 12:17:51.958957 DOMAIN: 0000 read_resources bus 0 link: 0 done
1150 12:17:51.962376 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1151 12:17:51.968734 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1152 12:17:51.972239 Root Device read_resources bus 0 link: 0 done
1153 12:17:51.975425 Done reading resources.
1154 12:17:51.982225 Show resources in subtree (Root Device)...After reading.
1155 12:17:51.985455 Root Device child on link 0 DOMAIN: 0000
1156 12:17:51.989193 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1157 12:17:51.998516 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1158 12:17:52.008343 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1159 12:17:52.011618 PCI: 00:00.0
1160 12:17:52.021558 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1161 12:17:52.028266 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1162 12:17:52.038329 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1163 12:17:52.048148 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1164 12:17:52.057747 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1165 12:17:52.067675 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1166 12:17:52.078011 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1167 12:17:52.084474 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1168 12:17:52.094234 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1169 12:17:52.104501 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1170 12:17:52.114183 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1171 12:17:52.123814 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1172 12:17:52.134636 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1173 12:17:52.141020 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1174 12:17:52.150341 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1175 12:17:52.160354 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1176 12:17:52.170185 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1177 12:17:52.180035 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1178 12:17:52.190289 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1179 12:17:52.199935 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1180 12:17:52.200031 PCI: 00:02.0
1181 12:17:52.210299 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1182 12:17:52.220212 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1183 12:17:52.229758 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1184 12:17:52.233250 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1185 12:17:52.242940 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1186 12:17:52.246403 GENERIC: 0.0
1187 12:17:52.246488 PCI: 00:05.0
1188 12:17:52.256087 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1189 12:17:52.262847 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1190 12:17:52.262934 GENERIC: 0.0
1191 12:17:52.266225 PCI: 00:08.0
1192 12:17:52.276136 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 12:17:52.276223 PCI: 00:0a.0
1194 12:17:52.282757 PCI: 00:0d.0 child on link 0 USB0 port 0
1195 12:17:52.292533 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1196 12:17:52.296143 USB0 port 0 child on link 0 USB3 port 0
1197 12:17:52.299064 USB3 port 0
1198 12:17:52.299142 USB3 port 1
1199 12:17:52.302434 USB3 port 2
1200 12:17:52.302507 USB3 port 3
1201 12:17:52.308868 PCI: 00:14.0 child on link 0 USB0 port 0
1202 12:17:52.319157 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1203 12:17:52.322485 USB0 port 0 child on link 0 USB2 port 0
1204 12:17:52.322560 USB2 port 0
1205 12:17:52.325679 USB2 port 1
1206 12:17:52.329176 USB2 port 2
1207 12:17:52.329250 USB2 port 3
1208 12:17:52.332211 USB2 port 4
1209 12:17:52.332283 USB2 port 5
1210 12:17:52.335787 USB2 port 6
1211 12:17:52.335858 USB2 port 7
1212 12:17:52.338909 USB2 port 8
1213 12:17:52.338977 USB2 port 9
1214 12:17:52.342390 USB3 port 0
1215 12:17:52.342461 USB3 port 1
1216 12:17:52.345422 USB3 port 2
1217 12:17:52.345494 USB3 port 3
1218 12:17:52.348724 PCI: 00:14.2
1219 12:17:52.358704 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1220 12:17:52.368989 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1221 12:17:52.371880 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1222 12:17:52.382250 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1223 12:17:52.384951 GENERIC: 0.0
1224 12:17:52.388305 PCI: 00:15.0 child on link 0 I2C: 00:1a
1225 12:17:52.398298 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1226 12:17:52.401720 I2C: 00:1a
1227 12:17:52.401803 I2C: 00:31
1228 12:17:52.405240 I2C: 00:32
1229 12:17:52.408320 PCI: 00:15.1 child on link 0 I2C: 00:10
1230 12:17:52.418505 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1231 12:17:52.418592 I2C: 00:10
1232 12:17:52.421319 PCI: 00:15.2
1233 12:17:52.431414 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1234 12:17:52.431496 PCI: 00:15.3
1235 12:17:52.441140 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1236 12:17:52.444629 PCI: 00:16.0
1237 12:17:52.454453 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1238 12:17:52.454535 PCI: 00:19.0
1239 12:17:52.461058 PCI: 00:19.1 child on link 0 I2C: 00:15
1240 12:17:52.471228 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1241 12:17:52.471312 I2C: 00:15
1242 12:17:52.477634 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1243 12:17:52.484319 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1244 12:17:52.494297 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1245 12:17:52.504171 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1246 12:17:52.504265 GENERIC: 0.0
1247 12:17:52.507380 PCI: 01:00.0
1248 12:17:52.517387 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1249 12:17:52.527296 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1250 12:17:52.537326 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1251 12:17:52.537413 PCI: 00:1e.0
1252 12:17:52.550300 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1253 12:17:52.553625 PCI: 00:1e.2 child on link 0 SPI: 00
1254 12:17:52.563915 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1255 12:17:52.564001 SPI: 00
1256 12:17:52.566800 PCI: 00:1e.3 child on link 0 SPI: 00
1257 12:17:52.576758 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1258 12:17:52.580023 SPI: 00
1259 12:17:52.583180 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1260 12:17:52.593419 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1261 12:17:52.593505 PNP: 0c09.0
1262 12:17:52.603263 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1263 12:17:52.606464 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1264 12:17:52.616495 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1265 12:17:52.627131 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1266 12:17:52.630460 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1267 12:17:52.632831 GENERIC: 0.0
1268 12:17:52.632916 GENERIC: 1.0
1269 12:17:52.636387 PCI: 00:1f.3
1270 12:17:52.645982 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1271 12:17:52.656195 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1272 12:17:52.656282 PCI: 00:1f.5
1273 12:17:52.665737 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1274 12:17:52.672509 CPU_CLUSTER: 0 child on link 0 APIC: 00
1275 12:17:52.672594 APIC: 00
1276 12:17:52.672660 APIC: 01
1277 12:17:52.675823 APIC: 02
1278 12:17:52.675911 APIC: 05
1279 12:17:52.675978 APIC: 07
1280 12:17:52.679393 APIC: 06
1281 12:17:52.679477 APIC: 03
1282 12:17:52.682718 APIC: 04
1283 12:17:52.688992 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1284 12:17:52.695606 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1285 12:17:52.702329 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1286 12:17:52.705432 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1287 12:17:52.711938 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1288 12:17:52.715951 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1289 12:17:52.719217 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1290 12:17:52.725558 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1291 12:17:52.735147 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1292 12:17:52.741863 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1293 12:17:52.748702 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1294 12:17:52.755031 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1295 12:17:52.762154 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1296 12:17:52.771708 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1297 12:17:52.778501 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1298 12:17:52.781532 DOMAIN: 0000: Resource ranges:
1299 12:17:52.785343 * Base: 1000, Size: 800, Tag: 100
1300 12:17:52.788535 * Base: 1900, Size: e700, Tag: 100
1301 12:17:52.794868 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1302 12:17:52.801554 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1303 12:17:52.808454 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1304 12:17:52.815101 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1305 12:17:52.821586 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1306 12:17:52.831834 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1307 12:17:52.838266 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1308 12:17:52.845127 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1309 12:17:52.854863 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1310 12:17:52.861725 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1311 12:17:52.868193 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1312 12:17:52.877863 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1313 12:17:52.884592 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1314 12:17:52.891072 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1315 12:17:52.901210 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1316 12:17:52.907642 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1317 12:17:52.914099 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1318 12:17:52.924149 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1319 12:17:52.930486 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1320 12:17:52.937062 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1321 12:17:52.947081 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1322 12:17:52.953751 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1323 12:17:52.960507 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1324 12:17:52.970091 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1325 12:17:52.976726 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1326 12:17:52.980024 DOMAIN: 0000: Resource ranges:
1327 12:17:52.983269 * Base: 7fc00000, Size: 40400000, Tag: 200
1328 12:17:52.990154 * Base: d0000000, Size: 28000000, Tag: 200
1329 12:17:52.993644 * Base: fa000000, Size: 1000000, Tag: 200
1330 12:17:52.996671 * Base: fb001000, Size: 2fff000, Tag: 200
1331 12:17:53.003466 * Base: fe010000, Size: 2e000, Tag: 200
1332 12:17:53.006521 * Base: fe03f000, Size: d41000, Tag: 200
1333 12:17:53.010342 * Base: fed88000, Size: 8000, Tag: 200
1334 12:17:53.013247 * Base: fed93000, Size: d000, Tag: 200
1335 12:17:53.017200 * Base: feda2000, Size: 1e000, Tag: 200
1336 12:17:53.023002 * Base: fede0000, Size: 1220000, Tag: 200
1337 12:17:53.026518 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1338 12:17:53.033072 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1339 12:17:53.039918 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1340 12:17:53.046261 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1341 12:17:53.052997 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1342 12:17:53.059339 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1343 12:17:53.066168 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1344 12:17:53.073000 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1345 12:17:53.079150 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1346 12:17:53.085805 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1347 12:17:53.092347 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1348 12:17:53.099010 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1349 12:17:53.105420 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1350 12:17:53.112367 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1351 12:17:53.118887 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1352 12:17:53.125181 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1353 12:17:53.132017 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1354 12:17:53.139078 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1355 12:17:53.145315 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1356 12:17:53.152304 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1357 12:17:53.158356 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1358 12:17:53.165628 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1359 12:17:53.171978 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1360 12:17:53.181658 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1361 12:17:53.188757 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1362 12:17:53.191900 PCI: 00:1d.0: Resource ranges:
1363 12:17:53.195621 * Base: 7fc00000, Size: 100000, Tag: 200
1364 12:17:53.201779 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1365 12:17:53.208484 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1366 12:17:53.214826 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1367 12:17:53.225474 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1368 12:17:53.231605 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1369 12:17:53.234662 Root Device assign_resources, bus 0 link: 0
1370 12:17:53.241576 DOMAIN: 0000 assign_resources, bus 0 link: 0
1371 12:17:53.247794 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1372 12:17:53.258541 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1373 12:17:53.264691 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1374 12:17:53.274130 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1375 12:17:53.277951 PCI: 00:04.0 assign_resources, bus 1 link: 0
1376 12:17:53.284171 PCI: 00:04.0 assign_resources, bus 1 link: 0
1377 12:17:53.290941 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1378 12:17:53.301003 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1379 12:17:53.307740 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1380 12:17:53.311118 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1381 12:17:53.318244 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1382 12:17:53.324253 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1383 12:17:53.330556 PCI: 00:14.0 assign_resources, bus 0 link: 0
1384 12:17:53.333881 PCI: 00:14.0 assign_resources, bus 0 link: 0
1385 12:17:53.343771 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1386 12:17:53.350497 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1387 12:17:53.360805 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1388 12:17:53.363491 PCI: 00:14.3 assign_resources, bus 0 link: 0
1389 12:17:53.366786 PCI: 00:14.3 assign_resources, bus 0 link: 0
1390 12:17:53.376993 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1391 12:17:53.380088 PCI: 00:15.0 assign_resources, bus 0 link: 0
1392 12:17:53.386444 PCI: 00:15.0 assign_resources, bus 0 link: 0
1393 12:17:53.393137 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1394 12:17:53.399885 PCI: 00:15.1 assign_resources, bus 0 link: 0
1395 12:17:53.403248 PCI: 00:15.1 assign_resources, bus 0 link: 0
1396 12:17:53.413229 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1397 12:17:53.419569 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1398 12:17:53.429285 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1399 12:17:53.435970 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1400 12:17:53.439359 PCI: 00:19.1 assign_resources, bus 0 link: 0
1401 12:17:53.446135 PCI: 00:19.1 assign_resources, bus 0 link: 0
1402 12:17:53.452346 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1403 12:17:53.463015 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1404 12:17:53.472157 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1405 12:17:53.475770 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1406 12:17:53.485763 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1407 12:17:53.492422 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1408 12:17:53.502662 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1409 12:17:53.505455 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1410 12:17:53.515185 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1411 12:17:53.518877 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1412 12:17:53.522057 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1413 12:17:53.531744 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1414 12:17:53.535158 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1415 12:17:53.541889 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1416 12:17:53.545268 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1417 12:17:53.551754 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1418 12:17:53.555222 LPC: Trying to open IO window from 800 size 1ff
1419 12:17:53.564809 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1420 12:17:53.571376 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1421 12:17:53.581213 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1422 12:17:53.584593 DOMAIN: 0000 assign_resources, bus 0 link: 0
1423 12:17:53.587676 Root Device assign_resources, bus 0 link: 0
1424 12:17:53.591133 Done setting resources.
1425 12:17:53.598101 Show resources in subtree (Root Device)...After assigning values.
1426 12:17:53.601203 Root Device child on link 0 DOMAIN: 0000
1427 12:17:53.607784 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1428 12:17:53.617654 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1429 12:17:53.627491 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1430 12:17:53.628037 PCI: 00:00.0
1431 12:17:53.637354 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1432 12:17:53.647398 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1433 12:17:53.657519 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1434 12:17:53.667370 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1435 12:17:53.673532 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1436 12:17:53.683197 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1437 12:17:53.693711 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1438 12:17:53.703011 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1439 12:17:53.713027 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1440 12:17:53.723009 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1441 12:17:53.729391 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1442 12:17:53.739383 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1443 12:17:53.749774 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1444 12:17:53.759040 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1445 12:17:53.769240 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1446 12:17:53.778814 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1447 12:17:53.789131 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1448 12:17:53.795236 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1449 12:17:53.805299 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1450 12:17:53.815071 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1451 12:17:53.818536 PCI: 00:02.0
1452 12:17:53.828477 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1453 12:17:53.838234 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1454 12:17:53.848259 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1455 12:17:53.851297 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1456 12:17:53.861324 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1457 12:17:53.864728 GENERIC: 0.0
1458 12:17:53.867739 PCI: 00:05.0
1459 12:17:53.877513 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1460 12:17:53.880747 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1461 12:17:53.884314 GENERIC: 0.0
1462 12:17:53.884789 PCI: 00:08.0
1463 12:17:53.894524 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1464 12:17:53.897683 PCI: 00:0a.0
1465 12:17:53.901046 PCI: 00:0d.0 child on link 0 USB0 port 0
1466 12:17:53.911004 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1467 12:17:53.917378 USB0 port 0 child on link 0 USB3 port 0
1468 12:17:53.917821 USB3 port 0
1469 12:17:53.921006 USB3 port 1
1470 12:17:53.921543 USB3 port 2
1471 12:17:53.924018 USB3 port 3
1472 12:17:53.927398 PCI: 00:14.0 child on link 0 USB0 port 0
1473 12:17:53.937132 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1474 12:17:53.943564 USB0 port 0 child on link 0 USB2 port 0
1475 12:17:53.944054 USB2 port 0
1476 12:17:53.947323 USB2 port 1
1477 12:17:53.947916 USB2 port 2
1478 12:17:53.950653 USB2 port 3
1479 12:17:53.951206 USB2 port 4
1480 12:17:53.953755 USB2 port 5
1481 12:17:53.954200 USB2 port 6
1482 12:17:53.956663 USB2 port 7
1483 12:17:53.957108 USB2 port 8
1484 12:17:53.960270 USB2 port 9
1485 12:17:53.963280 USB3 port 0
1486 12:17:53.963740 USB3 port 1
1487 12:17:53.966983 USB3 port 2
1488 12:17:53.967660 USB3 port 3
1489 12:17:53.970590 PCI: 00:14.2
1490 12:17:53.980111 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1491 12:17:53.989758 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1492 12:17:53.993227 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1493 12:17:54.003345 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1494 12:17:54.006695 GENERIC: 0.0
1495 12:17:54.009699 PCI: 00:15.0 child on link 0 I2C: 00:1a
1496 12:17:54.019842 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1497 12:17:54.022904 I2C: 00:1a
1498 12:17:54.023395 I2C: 00:31
1499 12:17:54.026123 I2C: 00:32
1500 12:17:54.029783 PCI: 00:15.1 child on link 0 I2C: 00:10
1501 12:17:54.038924 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1502 12:17:54.042520 I2C: 00:10
1503 12:17:54.042963 PCI: 00:15.2
1504 12:17:54.052282 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1505 12:17:54.055942 PCI: 00:15.3
1506 12:17:54.065465 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1507 12:17:54.068656 PCI: 00:16.0
1508 12:17:54.078776 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1509 12:17:54.079314 PCI: 00:19.0
1510 12:17:54.085184 PCI: 00:19.1 child on link 0 I2C: 00:15
1511 12:17:54.095023 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1512 12:17:54.095470 I2C: 00:15
1513 12:17:54.098438 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1514 12:17:54.108508 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1515 12:17:54.121480 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1516 12:17:54.131285 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1517 12:17:54.134540 GENERIC: 0.0
1518 12:17:54.135007 PCI: 01:00.0
1519 12:17:54.144774 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1520 12:17:54.154359 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1521 12:17:54.167827 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1522 12:17:54.168369 PCI: 00:1e.0
1523 12:17:54.177601 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1524 12:17:54.184005 PCI: 00:1e.2 child on link 0 SPI: 00
1525 12:17:54.194029 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1526 12:17:54.194481 SPI: 00
1527 12:17:54.197418 PCI: 00:1e.3 child on link 0 SPI: 00
1528 12:17:54.210340 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1529 12:17:54.210906 SPI: 00
1530 12:17:54.213852 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1531 12:17:54.223808 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1532 12:17:54.224390 PNP: 0c09.0
1533 12:17:54.233716 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1534 12:17:54.237047 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1535 12:17:54.246630 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1536 12:17:54.256889 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1537 12:17:54.260336 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1538 12:17:54.263544 GENERIC: 0.0
1539 12:17:54.266301 GENERIC: 1.0
1540 12:17:54.266760 PCI: 00:1f.3
1541 12:17:54.277064 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1542 12:17:54.286435 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1543 12:17:54.289746 PCI: 00:1f.5
1544 12:17:54.299550 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1545 12:17:54.303079 CPU_CLUSTER: 0 child on link 0 APIC: 00
1546 12:17:54.306486 APIC: 00
1547 12:17:54.306962 APIC: 01
1548 12:17:54.309505 APIC: 02
1549 12:17:54.310084 APIC: 05
1550 12:17:54.310442 APIC: 07
1551 12:17:54.312760 APIC: 06
1552 12:17:54.313203 APIC: 03
1553 12:17:54.313624 APIC: 04
1554 12:17:54.316221 Done allocating resources.
1555 12:17:54.322905 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1556 12:17:54.329238 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1557 12:17:54.332408 Configure GPIOs for I2S audio on UP4.
1558 12:17:54.339482 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1559 12:17:54.342843 Enabling resources...
1560 12:17:54.346083 PCI: 00:00.0 subsystem <- 8086/9a12
1561 12:17:54.349618 PCI: 00:00.0 cmd <- 06
1562 12:17:54.352696 PCI: 00:02.0 subsystem <- 8086/9a40
1563 12:17:54.355860 PCI: 00:02.0 cmd <- 03
1564 12:17:54.359272 PCI: 00:04.0 subsystem <- 8086/9a03
1565 12:17:54.362399 PCI: 00:04.0 cmd <- 02
1566 12:17:54.365816 PCI: 00:05.0 subsystem <- 8086/9a19
1567 12:17:54.366386 PCI: 00:05.0 cmd <- 02
1568 12:17:54.372247 PCI: 00:08.0 subsystem <- 8086/9a11
1569 12:17:54.372705 PCI: 00:08.0 cmd <- 06
1570 12:17:54.376232 PCI: 00:0d.0 subsystem <- 8086/9a13
1571 12:17:54.379278 PCI: 00:0d.0 cmd <- 02
1572 12:17:54.382358 PCI: 00:14.0 subsystem <- 8086/a0ed
1573 12:17:54.385810 PCI: 00:14.0 cmd <- 02
1574 12:17:54.389086 PCI: 00:14.2 subsystem <- 8086/a0ef
1575 12:17:54.392429 PCI: 00:14.2 cmd <- 02
1576 12:17:54.395607 PCI: 00:14.3 subsystem <- 8086/a0f0
1577 12:17:54.399061 PCI: 00:14.3 cmd <- 02
1578 12:17:54.402503 PCI: 00:15.0 subsystem <- 8086/a0e8
1579 12:17:54.405525 PCI: 00:15.0 cmd <- 02
1580 12:17:54.408725 PCI: 00:15.1 subsystem <- 8086/a0e9
1581 12:17:54.412168 PCI: 00:15.1 cmd <- 02
1582 12:17:54.415215 PCI: 00:15.2 subsystem <- 8086/a0ea
1583 12:17:54.415659 PCI: 00:15.2 cmd <- 02
1584 12:17:54.422212 PCI: 00:15.3 subsystem <- 8086/a0eb
1585 12:17:54.422654 PCI: 00:15.3 cmd <- 02
1586 12:17:54.425601 PCI: 00:16.0 subsystem <- 8086/a0e0
1587 12:17:54.428873 PCI: 00:16.0 cmd <- 02
1588 12:17:54.432415 PCI: 00:19.1 subsystem <- 8086/a0c6
1589 12:17:54.435497 PCI: 00:19.1 cmd <- 02
1590 12:17:54.438787 PCI: 00:1d.0 bridge ctrl <- 0013
1591 12:17:54.441973 PCI: 00:1d.0 subsystem <- 8086/a0b0
1592 12:17:54.445458 PCI: 00:1d.0 cmd <- 06
1593 12:17:54.448444 PCI: 00:1e.0 subsystem <- 8086/a0a8
1594 12:17:54.451813 PCI: 00:1e.0 cmd <- 06
1595 12:17:54.455534 PCI: 00:1e.2 subsystem <- 8086/a0aa
1596 12:17:54.458518 PCI: 00:1e.2 cmd <- 06
1597 12:17:54.461448 PCI: 00:1e.3 subsystem <- 8086/a0ab
1598 12:17:54.464820 PCI: 00:1e.3 cmd <- 02
1599 12:17:54.468484 PCI: 00:1f.0 subsystem <- 8086/a087
1600 12:17:54.471741 PCI: 00:1f.0 cmd <- 407
1601 12:17:54.474678 PCI: 00:1f.3 subsystem <- 8086/a0c8
1602 12:17:54.475154 PCI: 00:1f.3 cmd <- 02
1603 12:17:54.481589 PCI: 00:1f.5 subsystem <- 8086/a0a4
1604 12:17:54.482048 PCI: 00:1f.5 cmd <- 406
1605 12:17:54.486918 PCI: 01:00.0 cmd <- 02
1606 12:17:54.491922 done.
1607 12:17:54.494621 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1608 12:17:54.498188 Initializing devices...
1609 12:17:54.501388 Root Device init
1610 12:17:54.504834 Chrome EC: Set SMI mask to 0x0000000000000000
1611 12:17:54.511042 Chrome EC: clear events_b mask to 0x0000000000000000
1612 12:17:54.517896 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1613 12:17:54.520946 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1614 12:17:54.527656 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1615 12:17:54.534254 Chrome EC: Set WAKE mask to 0x0000000000000000
1616 12:17:54.537546 fw_config match found: DB_USB=USB3_ACTIVE
1617 12:17:54.544097 Configure Right Type-C port orientation for retimer
1618 12:17:54.547756 Root Device init finished in 42 msecs
1619 12:17:54.550911 PCI: 00:00.0 init
1620 12:17:54.554228 CPU TDP = 9 Watts
1621 12:17:54.554303 CPU PL1 = 9 Watts
1622 12:17:54.557679 CPU PL2 = 40 Watts
1623 12:17:54.557755 CPU PL4 = 83 Watts
1624 12:17:54.563618 PCI: 00:00.0 init finished in 8 msecs
1625 12:17:54.563703 PCI: 00:02.0 init
1626 12:17:54.567206 GMA: Found VBT in CBFS
1627 12:17:54.570083 GMA: Found valid VBT in CBFS
1628 12:17:54.576731 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1629 12:17:54.583809 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1630 12:17:54.586838 PCI: 00:02.0 init finished in 18 msecs
1631 12:17:54.590323 PCI: 00:05.0 init
1632 12:17:54.593417 PCI: 00:05.0 init finished in 0 msecs
1633 12:17:54.596947 PCI: 00:08.0 init
1634 12:17:54.600353 PCI: 00:08.0 init finished in 0 msecs
1635 12:17:54.603457 PCI: 00:14.0 init
1636 12:17:54.606346 PCI: 00:14.0 init finished in 0 msecs
1637 12:17:54.606433 PCI: 00:14.2 init
1638 12:17:54.613021 PCI: 00:14.2 init finished in 0 msecs
1639 12:17:54.613108 PCI: 00:15.0 init
1640 12:17:54.616508 I2C bus 0 version 0x3230302a
1641 12:17:54.620030 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1642 12:17:54.626574 PCI: 00:15.0 init finished in 6 msecs
1643 12:17:54.626676 PCI: 00:15.1 init
1644 12:17:54.630010 I2C bus 1 version 0x3230302a
1645 12:17:54.633272 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1646 12:17:54.636303 PCI: 00:15.1 init finished in 6 msecs
1647 12:17:54.640131 PCI: 00:15.2 init
1648 12:17:54.642870 I2C bus 2 version 0x3230302a
1649 12:17:54.646138 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1650 12:17:54.649608 PCI: 00:15.2 init finished in 6 msecs
1651 12:17:54.653188 PCI: 00:15.3 init
1652 12:17:54.656514 I2C bus 3 version 0x3230302a
1653 12:17:54.659723 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1654 12:17:54.662794 PCI: 00:15.3 init finished in 6 msecs
1655 12:17:54.666030 PCI: 00:16.0 init
1656 12:17:54.669309 PCI: 00:16.0 init finished in 0 msecs
1657 12:17:54.672941 PCI: 00:19.1 init
1658 12:17:54.673027 I2C bus 5 version 0x3230302a
1659 12:17:54.679292 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1660 12:17:54.682466 PCI: 00:19.1 init finished in 6 msecs
1661 12:17:54.682551 PCI: 00:1d.0 init
1662 12:17:54.686189 Initializing PCH PCIe bridge.
1663 12:17:54.689211 PCI: 00:1d.0 init finished in 3 msecs
1664 12:17:54.693645 PCI: 00:1f.0 init
1665 12:17:54.696825 IOAPIC: Initializing IOAPIC at 0xfec00000
1666 12:17:54.703385 IOAPIC: Bootstrap Processor Local APIC = 0x00
1667 12:17:54.703471 IOAPIC: ID = 0x02
1668 12:17:54.706596 IOAPIC: Dumping registers
1669 12:17:54.710417 reg 0x0000: 0x02000000
1670 12:17:54.713363 reg 0x0001: 0x00770020
1671 12:17:54.713453 reg 0x0002: 0x00000000
1672 12:17:54.720132 PCI: 00:1f.0 init finished in 21 msecs
1673 12:17:54.720217 PCI: 00:1f.2 init
1674 12:17:54.723274 Disabling ACPI via APMC.
1675 12:17:54.726731 APMC done.
1676 12:17:54.729780 PCI: 00:1f.2 init finished in 5 msecs
1677 12:17:54.741895 PCI: 01:00.0 init
1678 12:17:54.745114 PCI: 01:00.0 init finished in 0 msecs
1679 12:17:54.748443 PNP: 0c09.0 init
1680 12:17:54.752081 Google Chrome EC uptime: 8.400 seconds
1681 12:17:54.759017 Google Chrome AP resets since EC boot: 1
1682 12:17:54.761802 Google Chrome most recent AP reset causes:
1683 12:17:54.765487 0.348: 32775 shutdown: entering G3
1684 12:17:54.771814 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1685 12:17:54.775185 PNP: 0c09.0 init finished in 22 msecs
1686 12:17:54.780761 Devices initialized
1687 12:17:54.784279 Show all devs... After init.
1688 12:17:54.787750 Root Device: enabled 1
1689 12:17:54.787837 DOMAIN: 0000: enabled 1
1690 12:17:54.790737 CPU_CLUSTER: 0: enabled 1
1691 12:17:54.794450 PCI: 00:00.0: enabled 1
1692 12:17:54.797554 PCI: 00:02.0: enabled 1
1693 12:17:54.797633 PCI: 00:04.0: enabled 1
1694 12:17:54.800729 PCI: 00:05.0: enabled 1
1695 12:17:54.804193 PCI: 00:06.0: enabled 0
1696 12:17:54.807263 PCI: 00:07.0: enabled 0
1697 12:17:54.807349 PCI: 00:07.1: enabled 0
1698 12:17:54.810934 PCI: 00:07.2: enabled 0
1699 12:17:54.814403 PCI: 00:07.3: enabled 0
1700 12:17:54.817370 PCI: 00:08.0: enabled 1
1701 12:17:54.817457 PCI: 00:09.0: enabled 0
1702 12:17:54.821015 PCI: 00:0a.0: enabled 0
1703 12:17:54.824391 PCI: 00:0d.0: enabled 1
1704 12:17:54.827206 PCI: 00:0d.1: enabled 0
1705 12:17:54.827299 PCI: 00:0d.2: enabled 0
1706 12:17:54.830841 PCI: 00:0d.3: enabled 0
1707 12:17:54.834222 PCI: 00:0e.0: enabled 0
1708 12:17:54.837333 PCI: 00:10.2: enabled 1
1709 12:17:54.837441 PCI: 00:10.6: enabled 0
1710 12:17:54.840447 PCI: 00:10.7: enabled 0
1711 12:17:54.843847 PCI: 00:12.0: enabled 0
1712 12:17:54.843964 PCI: 00:12.6: enabled 0
1713 12:17:54.846922 PCI: 00:13.0: enabled 0
1714 12:17:54.850521 PCI: 00:14.0: enabled 1
1715 12:17:54.853586 PCI: 00:14.1: enabled 0
1716 12:17:54.853742 PCI: 00:14.2: enabled 1
1717 12:17:54.857210 PCI: 00:14.3: enabled 1
1718 12:17:54.861364 PCI: 00:15.0: enabled 1
1719 12:17:54.863552 PCI: 00:15.1: enabled 1
1720 12:17:54.863798 PCI: 00:15.2: enabled 1
1721 12:17:54.867322 PCI: 00:15.3: enabled 1
1722 12:17:54.870363 PCI: 00:16.0: enabled 1
1723 12:17:54.873955 PCI: 00:16.1: enabled 0
1724 12:17:54.874437 PCI: 00:16.2: enabled 0
1725 12:17:54.877202 PCI: 00:16.3: enabled 0
1726 12:17:54.880818 PCI: 00:16.4: enabled 0
1727 12:17:54.883881 PCI: 00:16.5: enabled 0
1728 12:17:54.884374 PCI: 00:17.0: enabled 0
1729 12:17:54.887324 PCI: 00:19.0: enabled 0
1730 12:17:54.890774 PCI: 00:19.1: enabled 1
1731 12:17:54.891438 PCI: 00:19.2: enabled 0
1732 12:17:54.894515 PCI: 00:1c.0: enabled 1
1733 12:17:54.897244 PCI: 00:1c.1: enabled 0
1734 12:17:54.900368 PCI: 00:1c.2: enabled 0
1735 12:17:54.900870 PCI: 00:1c.3: enabled 0
1736 12:17:54.904134 PCI: 00:1c.4: enabled 0
1737 12:17:54.906943 PCI: 00:1c.5: enabled 0
1738 12:17:54.910669 PCI: 00:1c.6: enabled 1
1739 12:17:54.911110 PCI: 00:1c.7: enabled 0
1740 12:17:54.913564 PCI: 00:1d.0: enabled 1
1741 12:17:54.917270 PCI: 00:1d.1: enabled 0
1742 12:17:54.920621 PCI: 00:1d.2: enabled 1
1743 12:17:54.921059 PCI: 00:1d.3: enabled 0
1744 12:17:54.923608 PCI: 00:1e.0: enabled 1
1745 12:17:54.926746 PCI: 00:1e.1: enabled 0
1746 12:17:54.930795 PCI: 00:1e.2: enabled 1
1747 12:17:54.931259 PCI: 00:1e.3: enabled 1
1748 12:17:54.933522 PCI: 00:1f.0: enabled 1
1749 12:17:54.936838 PCI: 00:1f.1: enabled 0
1750 12:17:54.937284 PCI: 00:1f.2: enabled 1
1751 12:17:54.940402 PCI: 00:1f.3: enabled 1
1752 12:17:54.943475 PCI: 00:1f.4: enabled 0
1753 12:17:54.947094 PCI: 00:1f.5: enabled 1
1754 12:17:54.947606 PCI: 00:1f.6: enabled 0
1755 12:17:54.950489 PCI: 00:1f.7: enabled 0
1756 12:17:54.953498 APIC: 00: enabled 1
1757 12:17:54.956703 GENERIC: 0.0: enabled 1
1758 12:17:54.957175 GENERIC: 0.0: enabled 1
1759 12:17:54.960024 GENERIC: 1.0: enabled 1
1760 12:17:54.963171 GENERIC: 0.0: enabled 1
1761 12:17:54.963669 GENERIC: 1.0: enabled 1
1762 12:17:54.966397 USB0 port 0: enabled 1
1763 12:17:54.969852 GENERIC: 0.0: enabled 1
1764 12:17:54.973405 USB0 port 0: enabled 1
1765 12:17:54.973865 GENERIC: 0.0: enabled 1
1766 12:17:54.976775 I2C: 00:1a: enabled 1
1767 12:17:54.979953 I2C: 00:31: enabled 1
1768 12:17:54.980443 I2C: 00:32: enabled 1
1769 12:17:54.983127 I2C: 00:10: enabled 1
1770 12:17:54.986460 I2C: 00:15: enabled 1
1771 12:17:54.989544 GENERIC: 0.0: enabled 0
1772 12:17:54.990010 GENERIC: 1.0: enabled 0
1773 12:17:54.993100 GENERIC: 0.0: enabled 1
1774 12:17:54.996302 SPI: 00: enabled 1
1775 12:17:54.996743 SPI: 00: enabled 1
1776 12:17:54.999873 PNP: 0c09.0: enabled 1
1777 12:17:55.003031 GENERIC: 0.0: enabled 1
1778 12:17:55.003468 USB3 port 0: enabled 1
1779 12:17:55.006027 USB3 port 1: enabled 1
1780 12:17:55.009540 USB3 port 2: enabled 0
1781 12:17:55.009981 USB3 port 3: enabled 0
1782 12:17:55.013083 USB2 port 0: enabled 0
1783 12:17:55.016241 USB2 port 1: enabled 1
1784 12:17:55.019131 USB2 port 2: enabled 1
1785 12:17:55.019570 USB2 port 3: enabled 0
1786 12:17:55.022832 USB2 port 4: enabled 1
1787 12:17:55.025984 USB2 port 5: enabled 0
1788 12:17:55.026425 USB2 port 6: enabled 0
1789 12:17:55.029316 USB2 port 7: enabled 0
1790 12:17:55.032335 USB2 port 8: enabled 0
1791 12:17:55.035650 USB2 port 9: enabled 0
1792 12:17:55.035774 USB3 port 0: enabled 0
1793 12:17:55.038958 USB3 port 1: enabled 1
1794 12:17:55.042450 USB3 port 2: enabled 0
1795 12:17:55.042535 USB3 port 3: enabled 0
1796 12:17:55.045427 GENERIC: 0.0: enabled 1
1797 12:17:55.048963 GENERIC: 1.0: enabled 1
1798 12:17:55.049048 APIC: 01: enabled 1
1799 12:17:55.052099 APIC: 02: enabled 1
1800 12:17:55.055897 APIC: 05: enabled 1
1801 12:17:55.055982 APIC: 07: enabled 1
1802 12:17:55.058783 APIC: 06: enabled 1
1803 12:17:55.062012 APIC: 03: enabled 1
1804 12:17:55.062096 APIC: 04: enabled 1
1805 12:17:55.065374 PCI: 01:00.0: enabled 1
1806 12:17:55.072857 BS: BS_DEV_INIT run times (exec / console): 30 / 540 ms
1807 12:17:55.076253 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1808 12:17:55.079445 ELOG: NV offset 0xf30000 size 0x1000
1809 12:17:55.086451 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1810 12:17:55.092742 ELOG: Event(17) added with size 13 at 2023-03-22 12:17:55 UTC
1811 12:17:55.099664 ELOG: Event(16) added with size 11 at 2023-03-22 12:17:55 UTC
1812 12:17:55.102925 Erasing flash addr f30000 + 4 KiB
1813 12:17:55.164015 ELOG: Event(92) added with size 9 at 2023-03-22 12:17:55 UTC
1814 12:17:55.170759 ELOG: Event(93) added with size 9 at 2023-03-22 12:17:55 UTC
1815 12:17:55.177187 ELOG: Event(9E) added with size 10 at 2023-03-22 12:17:55 UTC
1816 12:17:55.184186 ELOG: Event(9F) added with size 14 at 2023-03-22 12:17:55 UTC
1817 12:17:55.190342 BS: BS_DEV_INIT exit times (exec / console): 33 / 55 ms
1818 12:17:55.196998 ELOG: Event(A1) added with size 10 at 2023-03-22 12:17:55 UTC
1819 12:17:55.203856 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1820 12:17:55.206818 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1821 12:17:55.210592 Finalize devices...
1822 12:17:55.211039 Devices finalized
1823 12:17:55.217182 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1824 12:17:55.223320 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1825 12:17:55.227232 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1826 12:17:55.233768 ME: HFSTS1 : 0x80030055
1827 12:17:55.236930 ME: HFSTS2 : 0x30280116
1828 12:17:55.243354 ME: HFSTS3 : 0x00000050
1829 12:17:55.246542 ME: HFSTS4 : 0x00004000
1830 12:17:55.249877 ME: HFSTS5 : 0x00000000
1831 12:17:55.256529 ME: HFSTS6 : 0x00400006
1832 12:17:55.259953 ME: Manufacturing Mode : YES
1833 12:17:55.263438 ME: SPI Protection Mode Enabled : NO
1834 12:17:55.266655 ME: FW Partition Table : OK
1835 12:17:55.270147 ME: Bringup Loader Failure : NO
1836 12:17:55.272909 ME: Firmware Init Complete : NO
1837 12:17:55.276998 ME: Boot Options Present : NO
1838 12:17:55.279711 ME: Update In Progress : NO
1839 12:17:55.286159 ME: D0i3 Support : YES
1840 12:17:55.290208 ME: Low Power State Enabled : NO
1841 12:17:55.292682 ME: CPU Replaced : YES
1842 12:17:55.296092 ME: CPU Replacement Valid : YES
1843 12:17:55.299483 ME: Current Working State : 5
1844 12:17:55.302947 ME: Current Operation State : 1
1845 12:17:55.306248 ME: Current Operation Mode : 3
1846 12:17:55.309655 ME: Error Code : 0
1847 12:17:55.316350 ME: Enhanced Debug Mode : NO
1848 12:17:55.319207 ME: CPU Debug Disabled : YES
1849 12:17:55.322693 ME: TXT Support : NO
1850 12:17:55.329674 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1851 12:17:55.336161 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1852 12:17:55.339376 CBFS: 'fallback/slic' not found.
1853 12:17:55.342646 ACPI: Writing ACPI tables at 76b01000.
1854 12:17:55.346037 ACPI: * FACS
1855 12:17:55.346196 ACPI: * DSDT
1856 12:17:55.349180 Ramoops buffer: 0x100000@0x76a00000.
1857 12:17:55.355717 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1858 12:17:55.359164 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1859 12:17:55.362264 Google Chrome EC: version:
1860 12:17:55.365844 ro: voema_v2.0.7540-147f8d37d1
1861 12:17:55.369106 rw: voema_v2.0.7540-147f8d37d1
1862 12:17:55.372180 running image: 2
1863 12:17:55.378756 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1864 12:17:55.382423 ACPI: * FADT
1865 12:17:55.382582 SCI is IRQ9
1866 12:17:55.385777 ACPI: added table 1/32, length now 40
1867 12:17:55.389251 ACPI: * SSDT
1868 12:17:55.392393 Found 1 CPU(s) with 8 core(s) each.
1869 12:17:55.395490 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1870 12:17:55.402459 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1871 12:17:55.405537 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1872 12:17:55.409206 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1873 12:17:55.415408 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1874 12:17:55.422031 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1875 12:17:55.425253 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1876 12:17:55.431975 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1877 12:17:55.439026 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1878 12:17:55.441774 \_SB.PCI0.RP09: Added StorageD3Enable property
1879 12:17:55.445153 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1880 12:17:55.451781 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1881 12:17:55.458833 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1882 12:17:55.461631 PS2K: Passing 80 keymaps to kernel
1883 12:17:55.468689 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1884 12:17:55.475495 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1885 12:17:55.482085 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1886 12:17:55.488021 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1887 12:17:55.494546 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1888 12:17:55.501971 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1889 12:17:55.507750 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1890 12:17:55.514623 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1891 12:17:55.517659 ACPI: added table 2/32, length now 44
1892 12:17:55.517883 ACPI: * MCFG
1893 12:17:55.524499 ACPI: added table 3/32, length now 48
1894 12:17:55.524730 ACPI: * TPM2
1895 12:17:55.527629 TPM2 log created at 0x769f0000
1896 12:17:55.530828 ACPI: added table 4/32, length now 52
1897 12:17:55.534231 ACPI: * MADT
1898 12:17:55.534473 SCI is IRQ9
1899 12:17:55.537812 ACPI: added table 5/32, length now 56
1900 12:17:55.540917 current = 76b09850
1901 12:17:55.541157 ACPI: * DMAR
1902 12:17:55.547793 ACPI: added table 6/32, length now 60
1903 12:17:55.550708 ACPI: added table 7/32, length now 64
1904 12:17:55.550950 ACPI: * HPET
1905 12:17:55.554073 ACPI: added table 8/32, length now 68
1906 12:17:55.557286 ACPI: done.
1907 12:17:55.560462 ACPI tables: 35216 bytes.
1908 12:17:55.560716 smbios_write_tables: 769ef000
1909 12:17:55.564211 EC returned error result code 3
1910 12:17:55.567643 Couldn't obtain OEM name from CBI
1911 12:17:55.572752 Create SMBIOS type 16
1912 12:17:55.575968 Create SMBIOS type 17
1913 12:17:55.579579 GENERIC: 0.0 (WIFI Device)
1914 12:17:55.582354 SMBIOS tables: 1750 bytes.
1915 12:17:55.586198 Writing table forward entry at 0x00000500
1916 12:17:55.592540 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1917 12:17:55.595812 Writing coreboot table at 0x76b25000
1918 12:17:55.602851 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1919 12:17:55.606173 1. 0000000000001000-000000000009ffff: RAM
1920 12:17:55.609359 2. 00000000000a0000-00000000000fffff: RESERVED
1921 12:17:55.616046 3. 0000000000100000-00000000769eefff: RAM
1922 12:17:55.619088 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1923 12:17:55.625570 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1924 12:17:55.632180 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1925 12:17:55.635661 7. 0000000077000000-000000007fbfffff: RESERVED
1926 12:17:55.642026 8. 00000000c0000000-00000000cfffffff: RESERVED
1927 12:17:55.646009 9. 00000000f8000000-00000000f9ffffff: RESERVED
1928 12:17:55.648736 10. 00000000fb000000-00000000fb000fff: RESERVED
1929 12:17:55.655646 11. 00000000fe000000-00000000fe00ffff: RESERVED
1930 12:17:55.659067 12. 00000000fed80000-00000000fed87fff: RESERVED
1931 12:17:55.665427 13. 00000000fed90000-00000000fed92fff: RESERVED
1932 12:17:55.668913 14. 00000000feda0000-00000000feda1fff: RESERVED
1933 12:17:55.675085 15. 00000000fedc0000-00000000feddffff: RESERVED
1934 12:17:55.678557 16. 0000000100000000-00000002803fffff: RAM
1935 12:17:55.682102 Passing 4 GPIOs to payload:
1936 12:17:55.684871 NAME | PORT | POLARITY | VALUE
1937 12:17:55.691521 lid | undefined | high | high
1938 12:17:55.698296 power | undefined | high | low
1939 12:17:55.701619 oprom | undefined | high | low
1940 12:17:55.708157 EC in RW | 0x000000e5 | high | high
1941 12:17:55.715159 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 8c73
1942 12:17:55.718365 coreboot table: 1576 bytes.
1943 12:17:55.721670 IMD ROOT 0. 0x76fff000 0x00001000
1944 12:17:55.724830 IMD SMALL 1. 0x76ffe000 0x00001000
1945 12:17:55.727904 FSP MEMORY 2. 0x76c4e000 0x003b0000
1946 12:17:55.731315 VPD 3. 0x76c4d000 0x00000367
1947 12:17:55.734432 RO MCACHE 4. 0x76c4c000 0x00000fdc
1948 12:17:55.737652 CONSOLE 5. 0x76c2c000 0x00020000
1949 12:17:55.744537 FMAP 6. 0x76c2b000 0x00000578
1950 12:17:55.747635 TIME STAMP 7. 0x76c2a000 0x00000910
1951 12:17:55.751088 VBOOT WORK 8. 0x76c16000 0x00014000
1952 12:17:55.754983 ROMSTG STCK 9. 0x76c15000 0x00001000
1953 12:17:55.757394 AFTER CAR 10. 0x76c0a000 0x0000b000
1954 12:17:55.761219 RAMSTAGE 11. 0x76b97000 0x00073000
1955 12:17:55.764992 REFCODE 12. 0x76b42000 0x00055000
1956 12:17:55.767462 SMM BACKUP 13. 0x76b32000 0x00010000
1957 12:17:55.774252 4f444749 14. 0x76b30000 0x00002000
1958 12:17:55.777670 EXT VBT15. 0x76b2d000 0x0000219f
1959 12:17:55.780449 COREBOOT 16. 0x76b25000 0x00008000
1960 12:17:55.784235 ACPI 17. 0x76b01000 0x00024000
1961 12:17:55.787263 ACPI GNVS 18. 0x76b00000 0x00001000
1962 12:17:55.790405 RAMOOPS 19. 0x76a00000 0x00100000
1963 12:17:55.793915 TPM2 TCGLOG20. 0x769f0000 0x00010000
1964 12:17:55.797279 SMBIOS 21. 0x769ef000 0x00000800
1965 12:17:55.800515 IMD small region:
1966 12:17:55.803915 IMD ROOT 0. 0x76ffec00 0x00000400
1967 12:17:55.807163 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1968 12:17:55.810066 POWER STATE 2. 0x76ffeb80 0x00000044
1969 12:17:55.816663 ROMSTAGE 3. 0x76ffeb60 0x00000004
1970 12:17:55.819955 MEM INFO 4. 0x76ffe980 0x000001e0
1971 12:17:55.826725 BS: BS_WRITE_TABLES run times (exec / console): 8 / 484 ms
1972 12:17:55.829977 MTRR: Physical address space:
1973 12:17:55.833113 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1974 12:17:55.839994 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1975 12:17:55.846815 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1976 12:17:55.853145 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1977 12:17:55.860070 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1978 12:17:55.867014 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1979 12:17:55.873392 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1980 12:17:55.876428 MTRR: Fixed MSR 0x250 0x0606060606060606
1981 12:17:55.879819 MTRR: Fixed MSR 0x258 0x0606060606060606
1982 12:17:55.883049 MTRR: Fixed MSR 0x259 0x0000000000000000
1983 12:17:55.889743 MTRR: Fixed MSR 0x268 0x0606060606060606
1984 12:17:55.892842 MTRR: Fixed MSR 0x269 0x0606060606060606
1985 12:17:55.896444 MTRR: Fixed MSR 0x26a 0x0606060606060606
1986 12:17:55.899841 MTRR: Fixed MSR 0x26b 0x0606060606060606
1987 12:17:55.906374 MTRR: Fixed MSR 0x26c 0x0606060606060606
1988 12:17:55.909364 MTRR: Fixed MSR 0x26d 0x0606060606060606
1989 12:17:55.912721 MTRR: Fixed MSR 0x26e 0x0606060606060606
1990 12:17:55.916055 MTRR: Fixed MSR 0x26f 0x0606060606060606
1991 12:17:55.920788 call enable_fixed_mtrr()
1992 12:17:55.923804 CPU physical address size: 39 bits
1993 12:17:55.930734 MTRR: default type WB/UC MTRR counts: 6/6.
1994 12:17:55.934145 MTRR: UC selected as default type.
1995 12:17:55.940552 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
1996 12:17:55.944158 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
1997 12:17:55.950135 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
1998 12:17:55.956781 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
1999 12:17:55.963543 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2000 12:17:55.970004 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2001 12:17:55.970083
2002 12:17:55.973614 MTRR check
2003 12:17:55.976781 Fixed MTRRs : Enabled
2004 12:17:55.976857 Variable MTRRs: Enabled
2005 12:17:55.976926
2006 12:17:55.983512 MTRR: Fixed MSR 0x250 0x0606060606060606
2007 12:17:55.986576 MTRR: Fixed MSR 0x258 0x0606060606060606
2008 12:17:55.989864 MTRR: Fixed MSR 0x259 0x0000000000000000
2009 12:17:55.993547 MTRR: Fixed MSR 0x268 0x0606060606060606
2010 12:17:55.999949 MTRR: Fixed MSR 0x269 0x0606060606060606
2011 12:17:56.003191 MTRR: Fixed MSR 0x26a 0x0606060606060606
2012 12:17:56.006881 MTRR: Fixed MSR 0x26b 0x0606060606060606
2013 12:17:56.009606 MTRR: Fixed MSR 0x26c 0x0606060606060606
2014 12:17:56.013161 MTRR: Fixed MSR 0x26d 0x0606060606060606
2015 12:17:56.019753 MTRR: Fixed MSR 0x26e 0x0606060606060606
2016 12:17:56.023317 MTRR: Fixed MSR 0x26f 0x0606060606060606
2017 12:17:56.029963 BS: BS_WRITE_TABLES exit times (exec / console): 2 / 150 ms
2018 12:17:56.033017 call enable_fixed_mtrr()
2019 12:17:56.035962 Checking cr50 for pending updates
2020 12:17:56.040326 CPU physical address size: 39 bits
2021 12:17:56.043684 MTRR: Fixed MSR 0x250 0x0606060606060606
2022 12:17:56.046992 MTRR: Fixed MSR 0x250 0x0606060606060606
2023 12:17:56.050186 MTRR: Fixed MSR 0x258 0x0606060606060606
2024 12:17:56.056978 MTRR: Fixed MSR 0x259 0x0000000000000000
2025 12:17:56.060013 MTRR: Fixed MSR 0x268 0x0606060606060606
2026 12:17:56.063894 MTRR: Fixed MSR 0x269 0x0606060606060606
2027 12:17:56.066876 MTRR: Fixed MSR 0x26a 0x0606060606060606
2028 12:17:56.074131 MTRR: Fixed MSR 0x26b 0x0606060606060606
2029 12:17:56.076909 MTRR: Fixed MSR 0x26c 0x0606060606060606
2030 12:17:56.080069 MTRR: Fixed MSR 0x26d 0x0606060606060606
2031 12:17:56.083806 MTRR: Fixed MSR 0x26e 0x0606060606060606
2032 12:17:56.089675 MTRR: Fixed MSR 0x26f 0x0606060606060606
2033 12:17:56.093035 MTRR: Fixed MSR 0x258 0x0606060606060606
2034 12:17:56.096168 call enable_fixed_mtrr()
2035 12:17:56.100209 MTRR: Fixed MSR 0x259 0x0000000000000000
2036 12:17:56.102916 MTRR: Fixed MSR 0x268 0x0606060606060606
2037 12:17:56.109621 MTRR: Fixed MSR 0x269 0x0606060606060606
2038 12:17:56.112740 MTRR: Fixed MSR 0x26a 0x0606060606060606
2039 12:17:56.116051 MTRR: Fixed MSR 0x26b 0x0606060606060606
2040 12:17:56.119799 MTRR: Fixed MSR 0x26c 0x0606060606060606
2041 12:17:56.126439 MTRR: Fixed MSR 0x26d 0x0606060606060606
2042 12:17:56.129829 MTRR: Fixed MSR 0x26e 0x0606060606060606
2043 12:17:56.132967 MTRR: Fixed MSR 0x26f 0x0606060606060606
2044 12:17:56.136400 CPU physical address size: 39 bits
2045 12:17:56.143011 call enable_fixed_mtrr()
2046 12:17:56.146016 MTRR: Fixed MSR 0x250 0x0606060606060606
2047 12:17:56.149328 MTRR: Fixed MSR 0x250 0x0606060606060606
2048 12:17:56.152717 MTRR: Fixed MSR 0x258 0x0606060606060606
2049 12:17:56.159553 MTRR: Fixed MSR 0x259 0x0000000000000000
2050 12:17:56.162569 MTRR: Fixed MSR 0x268 0x0606060606060606
2051 12:17:56.166085 MTRR: Fixed MSR 0x269 0x0606060606060606
2052 12:17:56.169342 MTRR: Fixed MSR 0x26a 0x0606060606060606
2053 12:17:56.172671 MTRR: Fixed MSR 0x26b 0x0606060606060606
2054 12:17:56.179606 MTRR: Fixed MSR 0x26c 0x0606060606060606
2055 12:17:56.182811 MTRR: Fixed MSR 0x26d 0x0606060606060606
2056 12:17:56.185946 MTRR: Fixed MSR 0x26e 0x0606060606060606
2057 12:17:56.189296 MTRR: Fixed MSR 0x26f 0x0606060606060606
2058 12:17:56.197373 MTRR: Fixed MSR 0x258 0x0606060606060606
2059 12:17:56.200330 MTRR: Fixed MSR 0x259 0x0000000000000000
2060 12:17:56.203657 MTRR: Fixed MSR 0x268 0x0606060606060606
2061 12:17:56.206672 MTRR: Fixed MSR 0x269 0x0606060606060606
2062 12:17:56.213344 MTRR: Fixed MSR 0x26a 0x0606060606060606
2063 12:17:56.216762 MTRR: Fixed MSR 0x26b 0x0606060606060606
2064 12:17:56.219931 MTRR: Fixed MSR 0x26c 0x0606060606060606
2065 12:17:56.223243 MTRR: Fixed MSR 0x26d 0x0606060606060606
2066 12:17:56.229916 MTRR: Fixed MSR 0x26e 0x0606060606060606
2067 12:17:56.233300 MTRR: Fixed MSR 0x26f 0x0606060606060606
2068 12:17:56.236553 call enable_fixed_mtrr()
2069 12:17:56.240121 call enable_fixed_mtrr()
2070 12:17:56.243123 CPU physical address size: 39 bits
2071 12:17:56.246422 MTRR: Fixed MSR 0x250 0x0606060606060606
2072 12:17:56.249788 MTRR: Fixed MSR 0x250 0x0606060606060606
2073 12:17:56.253267 MTRR: Fixed MSR 0x258 0x0606060606060606
2074 12:17:56.259607 MTRR: Fixed MSR 0x259 0x0000000000000000
2075 12:17:56.263358 MTRR: Fixed MSR 0x268 0x0606060606060606
2076 12:17:56.266565 MTRR: Fixed MSR 0x269 0x0606060606060606
2077 12:17:56.270236 MTRR: Fixed MSR 0x26a 0x0606060606060606
2078 12:17:56.276590 MTRR: Fixed MSR 0x26b 0x0606060606060606
2079 12:17:56.279861 MTRR: Fixed MSR 0x26c 0x0606060606060606
2080 12:17:56.283725 MTRR: Fixed MSR 0x26d 0x0606060606060606
2081 12:17:56.286732 MTRR: Fixed MSR 0x26e 0x0606060606060606
2082 12:17:56.292904 MTRR: Fixed MSR 0x26f 0x0606060606060606
2083 12:17:56.296074 MTRR: Fixed MSR 0x258 0x0606060606060606
2084 12:17:56.299535 call enable_fixed_mtrr()
2085 12:17:56.302769 MTRR: Fixed MSR 0x259 0x0000000000000000
2086 12:17:56.306061 MTRR: Fixed MSR 0x268 0x0606060606060606
2087 12:17:56.312554 MTRR: Fixed MSR 0x269 0x0606060606060606
2088 12:17:56.316178 MTRR: Fixed MSR 0x26a 0x0606060606060606
2089 12:17:56.319435 MTRR: Fixed MSR 0x26b 0x0606060606060606
2090 12:17:56.322686 MTRR: Fixed MSR 0x26c 0x0606060606060606
2091 12:17:56.329334 MTRR: Fixed MSR 0x26d 0x0606060606060606
2092 12:17:56.332848 MTRR: Fixed MSR 0x26e 0x0606060606060606
2093 12:17:56.335891 MTRR: Fixed MSR 0x26f 0x0606060606060606
2094 12:17:56.339193 CPU physical address size: 39 bits
2095 12:17:56.343554 call enable_fixed_mtrr()
2096 12:17:56.346690 CPU physical address size: 39 bits
2097 12:17:56.350934 CPU physical address size: 39 bits
2098 12:17:56.354393 Reading cr50 TPM mode
2099 12:17:56.357803 CPU physical address size: 39 bits
2100 12:17:56.364520 BS: BS_PAYLOAD_LOAD entry times (exec / console): 323 / 6 ms
2101 12:17:56.374352 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2102 12:17:56.377663 Checking segment from ROM address 0xffc02b38
2103 12:17:56.380665 Checking segment from ROM address 0xffc02b54
2104 12:17:56.387769 Loading segment from ROM address 0xffc02b38
2105 12:17:56.387846 code (compression=0)
2106 12:17:56.397204 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2107 12:17:56.407012 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2108 12:17:56.407105 it's not compressed!
2109 12:17:56.547464 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2110 12:17:56.553757 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2111 12:17:56.560199 Loading segment from ROM address 0xffc02b54
2112 12:17:56.563831 Entry Point 0x30000000
2113 12:17:56.563921 Loaded segments
2114 12:17:56.570243 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2115 12:17:56.613370 Finalizing chipset.
2116 12:17:56.616514 Finalizing SMM.
2117 12:17:56.616606 APMC done.
2118 12:17:56.623003 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2119 12:17:56.626155 mp_park_aps done after 0 msecs.
2120 12:17:56.630011 Jumping to boot code at 0x30000000(0x76b25000)
2121 12:17:56.639529 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2122 12:17:56.639619
2123 12:17:56.643079
2124 12:17:56.643167
2125 12:17:56.643539 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2126 12:17:56.643654 start: 2.2.4 bootloader-commands (timeout 00:04:44) [common]
2127 12:17:56.643759 Setting prompt string to ['volteer:']
2128 12:17:56.643853 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:44)
2129 12:17:56.646407 Starting depthcharge on Voema...
2130 12:17:56.646496
2131 12:17:56.652781 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2132 12:17:56.652869
2133 12:17:56.659362 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2134 12:17:56.659450
2135 12:17:56.665781 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2136 12:17:56.665869
2137 12:17:56.669342 Failed to find eMMC card reader
2138 12:17:56.669430
2139 12:17:56.672474 Wipe memory regions:
2140 12:17:56.672561
2141 12:17:56.675851 [0x00000000001000, 0x000000000a0000)
2142 12:17:56.675940
2143 12:17:56.679288 [0x00000000100000, 0x00000030000000)
2144 12:17:56.705281
2145 12:17:56.708584 [0x00000032662db0, 0x000000769ef000)
2146 12:17:56.744271
2147 12:17:56.747928 [0x00000100000000, 0x00000280400000)
2148 12:17:56.947188
2149 12:17:56.950361 ec_init: CrosEC protocol v3 supported (256, 256)
2150 12:17:56.950453
2151 12:17:56.956837 update_port_state: port C0 state: usb enable 1 mux conn 0
2152 12:17:56.956927
2153 12:17:56.963818 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2154 12:17:56.968331
2155 12:17:56.971384 pmc_check_ipc_sts: STS_BUSY done after 1512 us
2156 12:17:56.971473
2157 12:17:56.975423 send_conn_disc_msg: pmc_send_cmd succeeded
2158 12:17:57.406205
2159 12:17:57.406360 R8152: Initializing
2160 12:17:57.406455
2161 12:17:57.409454 Version 6 (ocp_data = 5c30)
2162 12:17:57.409542
2163 12:17:57.412896 R8152: Done initializing
2164 12:17:57.412984
2165 12:17:57.416078 Adding net device
2166 12:17:57.718666
2167 12:17:57.721970 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2168 12:17:57.722061
2169 12:17:57.722150
2170 12:17:57.722233
2171 12:17:57.725593 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2173 12:17:57.826391 volteer: tftpboot 192.168.201.1 9729433/tftp-deploy-nr_ffje2/kernel/bzImage 9729433/tftp-deploy-nr_ffje2/kernel/cmdline 9729433/tftp-deploy-nr_ffje2/ramdisk/ramdisk.cpio.gz
2174 12:17:57.826548 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2175 12:17:57.826652 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2176 12:17:57.831833 tftpboot 192.168.201.1 9729433/tftp-deploy-nr_ffje2/kernel/bzImay-nr_ffje2/kernel/cmdline 9729433/tftp-deploy-nr_ffje2/ramdisk/ramdisk.cpio.gz
2177 12:17:57.831926
2178 12:17:57.832015 Waiting for link
2179 12:17:58.034375
2180 12:17:58.034577 done.
2181 12:17:58.034729
2182 12:17:58.034868 MAC: 00:24:32:30:79:42
2183 12:17:58.035002
2184 12:17:58.037265 Sending DHCP discover... done.
2185 12:17:58.037431
2186 12:17:58.041086 Waiting for reply... done.
2187 12:17:58.041274
2188 12:17:58.043776 Sending DHCP request... done.
2189 12:17:58.043964
2190 12:17:58.050761 Waiting for reply... done.
2191 12:17:58.051051
2192 12:17:58.051308 My ip is 192.168.201.13
2193 12:17:58.051551
2194 12:17:58.053894 The DHCP server ip is 192.168.201.1
2195 12:17:58.054151
2196 12:17:58.061197 TFTP server IP predefined by user: 192.168.201.1
2197 12:17:58.061612
2198 12:17:58.067312 Bootfile predefined by user: 9729433/tftp-deploy-nr_ffje2/kernel/bzImage
2199 12:17:58.067788
2200 12:17:58.071528 Sending tftp read request... done.
2201 12:17:58.072004
2202 12:17:58.077240 Waiting for the transfer...
2203 12:17:58.077700
2204 12:17:58.628115 00000000 ################################################################
2205 12:17:58.628261
2206 12:17:59.188022 00080000 ################################################################
2207 12:17:59.188163
2208 12:17:59.767481 00100000 ################################################################
2209 12:17:59.767627
2210 12:18:00.330553 00180000 ################################################################
2211 12:18:00.330710
2212 12:18:00.919527 00200000 ################################################################
2213 12:18:00.920091
2214 12:18:01.480330 00280000 ################################################################
2215 12:18:01.480469
2216 12:18:02.043820 00300000 ################################################################
2217 12:18:02.043972
2218 12:18:02.576183 00380000 ################################################################
2219 12:18:02.576335
2220 12:18:03.117575 00400000 ################################################################
2221 12:18:03.117717
2222 12:18:03.683556 00480000 ################################################################
2223 12:18:03.683716
2224 12:18:04.302620 00500000 ################################################################
2225 12:18:04.303158
2226 12:18:04.984412 00580000 ################################################################
2227 12:18:04.984949
2228 12:18:05.677373 00600000 ################################################################
2229 12:18:05.677954
2230 12:18:06.324202 00680000 ################################################################
2231 12:18:06.324794
2232 12:18:07.003671 00700000 ################################################################
2233 12:18:07.004224
2234 12:18:07.619769 00780000 ################################################################
2235 12:18:07.619913
2236 12:18:08.238164 00800000 ################################################################
2237 12:18:08.238310
2238 12:18:08.864617 00880000 ################################################################
2239 12:18:08.864769
2240 12:18:09.337316 00900000 ################################################# done.
2241 12:18:09.337459
2242 12:18:09.340685 The bootfile was 9834496 bytes long.
2243 12:18:09.340767
2244 12:18:09.344539 Sending tftp read request... done.
2245 12:18:09.344619
2246 12:18:09.347339 Waiting for the transfer...
2247 12:18:09.347419
2248 12:18:09.947279 00000000 ################################################################
2249 12:18:09.947418
2250 12:18:10.566212 00080000 ################################################################
2251 12:18:10.566358
2252 12:18:11.181617 00100000 ################################################################
2253 12:18:11.181775
2254 12:18:11.800120 00180000 ################################################################
2255 12:18:11.800271
2256 12:18:12.385127 00200000 ################################################################
2257 12:18:12.385273
2258 12:18:13.013512 00280000 ################################################################
2259 12:18:13.013660
2260 12:18:13.583962 00300000 ################################################################
2261 12:18:13.584109
2262 12:18:14.235782 00380000 ################################################################
2263 12:18:14.236351
2264 12:18:14.920398 00400000 ################################################################
2265 12:18:14.920543
2266 12:18:15.615887 00480000 ################################################################
2267 12:18:15.616430
2268 12:18:16.323986 00500000 ################################################################
2269 12:18:16.324565
2270 12:18:17.032964 00580000 ################################################################
2271 12:18:17.033529
2272 12:18:17.126786 00600000 ######### done.
2273 12:18:17.127289
2274 12:18:17.129551 Sending tftp read request... done.
2275 12:18:17.129988
2276 12:18:17.133009 Waiting for the transfer...
2277 12:18:17.133445
2278 12:18:17.133788 00000000 # done.
2279 12:18:17.134115
2280 12:18:17.142971 Command line loaded dynamically from TFTP file: 9729433/tftp-deploy-nr_ffje2/kernel/cmdline
2281 12:18:17.143501
2282 12:18:17.165894 The command line is: console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729433/extract-nfsrootfs-rhkqgwcd,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2283 12:18:17.170615
2284 12:18:17.173373 Shutting down all USB controllers.
2285 12:18:17.173877
2286 12:18:17.174372 Removing current net device
2287 12:18:17.174842
2288 12:18:17.176475 Finalizing coreboot
2289 12:18:17.176979
2290 12:18:17.183671 Exiting depthcharge with code 4 at timestamp: 29245984
2291 12:18:17.184406
2292 12:18:17.184918
2293 12:18:17.185386 Starting kernel ...
2294 12:18:17.185838
2295 12:18:17.186285
2296 12:18:17.187747 end: 2.2.4 bootloader-commands (duration 00:00:21) [common]
2297 12:18:17.188376 start: 2.2.5 auto-login-action (timeout 00:04:24) [common]
2298 12:18:17.188851 Setting prompt string to ['Linux version [0-9]']
2299 12:18:17.189334 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2300 12:18:17.189832 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2302 12:22:41.189405 end: 2.2.5 auto-login-action (duration 00:04:24) [common]
2304 12:22:41.191262 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 264 seconds'
2306 12:22:41.192785 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2309 12:22:41.194197 end: 2 depthcharge-action (duration 00:05:00) [common]
2311 12:22:41.194438 Cleaning after the job
2312 12:22:41.194527 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729433/tftp-deploy-nr_ffje2/ramdisk
2313 12:22:41.195038 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729433/tftp-deploy-nr_ffje2/kernel
2314 12:22:41.195740 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729433/tftp-deploy-nr_ffje2/nfsrootfs
2315 12:22:41.248860 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729433/tftp-deploy-nr_ffje2/modules
2316 12:22:41.249333 start: 4.1 power-off (timeout 00:00:30) [common]
2317 12:22:41.249498 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-8' '--port=1' '--command=off'
2318 12:22:41.324584 >> Command sent successfully.
2319 12:22:41.329086 Returned 0 in 0 seconds
2320 12:22:41.430423 end: 4.1 power-off (duration 00:00:00) [common]
2322 12:22:41.431868 start: 4.2 read-feedback (timeout 00:10:00) [common]
2323 12:22:41.432954 Listened to connection for namespace 'common' for up to 1s
2324 12:22:42.437573 Finalising connection for namespace 'common'
2325 12:22:42.437813 Disconnecting from shell: Finalise
2326 12:22:42.437942
2327 12:22:42.539370 end: 4.2 read-feedback (duration 00:00:01) [common]
2328 12:22:42.540059 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729433
2329 12:22:42.693923 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729433
2330 12:22:42.694120 JobError: Your job cannot terminate cleanly.