Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:20:07.726224 lava-dispatcher, installed at version: 2023.01
2 12:20:07.726421 start: 0 validate
3 12:20:07.726551 Start time: 2023-03-22 12:20:07.726541+00:00 (UTC)
4 12:20:07.726680 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:20:07.726813 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 12:20:08.022315 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:20:08.023125 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.277-cip94-rt29%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:20:08.316675 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:20:08.317422 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:20:08.610491 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:20:08.611255 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.277-cip94-rt29%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:20:08.909007 validate duration: 1.18
14 12:20:08.909386 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:20:08.909512 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:20:08.909626 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:20:08.909736 Not decompressing ramdisk as can be used compressed.
18 12:20:08.909827 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/initrd.cpio.gz
19 12:20:08.909904 saving as /var/lib/lava/dispatcher/tmp/9729462/tftp-deploy-mhyv2v41/ramdisk/initrd.cpio.gz
20 12:20:08.909973 total size: 5672849 (5MB)
21 12:20:08.910898 progress 0% (0MB)
22 12:20:08.912588 progress 5% (0MB)
23 12:20:08.914200 progress 10% (0MB)
24 12:20:08.915696 progress 15% (0MB)
25 12:20:08.917322 progress 20% (1MB)
26 12:20:08.918956 progress 25% (1MB)
27 12:20:08.920469 progress 30% (1MB)
28 12:20:08.922057 progress 35% (1MB)
29 12:20:08.923685 progress 40% (2MB)
30 12:20:08.925095 progress 45% (2MB)
31 12:20:08.926673 progress 50% (2MB)
32 12:20:08.928296 progress 55% (3MB)
33 12:20:08.929704 progress 60% (3MB)
34 12:20:08.931319 progress 65% (3MB)
35 12:20:08.932944 progress 70% (3MB)
36 12:20:08.934378 progress 75% (4MB)
37 12:20:08.936009 progress 80% (4MB)
38 12:20:08.937598 progress 85% (4MB)
39 12:20:08.939011 progress 90% (4MB)
40 12:20:08.940634 progress 95% (5MB)
41 12:20:08.942224 progress 100% (5MB)
42 12:20:08.942346 5MB downloaded in 0.03s (167.14MB/s)
43 12:20:08.942506 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:20:08.942771 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:20:08.942869 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:20:08.942963 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:20:08.943085 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.277-cip94-rt29/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:20:08.943202 saving as /var/lib/lava/dispatcher/tmp/9729462/tftp-deploy-mhyv2v41/kernel/bzImage
50 12:20:08.943272 total size: 9834496 (9MB)
51 12:20:08.943339 No compression specified
52 12:20:08.944306 progress 0% (0MB)
53 12:20:08.947006 progress 5% (0MB)
54 12:20:08.949667 progress 10% (0MB)
55 12:20:08.952292 progress 15% (1MB)
56 12:20:08.954906 progress 20% (1MB)
57 12:20:08.957555 progress 25% (2MB)
58 12:20:08.960294 progress 30% (2MB)
59 12:20:08.963013 progress 35% (3MB)
60 12:20:08.965669 progress 40% (3MB)
61 12:20:08.968367 progress 45% (4MB)
62 12:20:08.970980 progress 50% (4MB)
63 12:20:08.973664 progress 55% (5MB)
64 12:20:08.976420 progress 60% (5MB)
65 12:20:08.979074 progress 65% (6MB)
66 12:20:08.981696 progress 70% (6MB)
67 12:20:08.984352 progress 75% (7MB)
68 12:20:08.986974 progress 80% (7MB)
69 12:20:08.989618 progress 85% (8MB)
70 12:20:08.992400 progress 90% (8MB)
71 12:20:08.995027 progress 95% (8MB)
72 12:20:08.997686 progress 100% (9MB)
73 12:20:08.997814 9MB downloaded in 0.05s (171.98MB/s)
74 12:20:08.997976 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:20:08.998239 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:20:08.998343 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:20:08.998440 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:20:08.998559 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/full.rootfs.tar.xz
80 12:20:08.998634 saving as /var/lib/lava/dispatcher/tmp/9729462/tftp-deploy-mhyv2v41/nfsrootfs/full.rootfs.tar
81 12:20:08.998703 total size: 125916488 (120MB)
82 12:20:08.998771 Using unxz to decompress xz
83 12:20:09.002253 progress 0% (0MB)
84 12:20:09.494435 progress 5% (6MB)
85 12:20:09.998034 progress 10% (12MB)
86 12:20:10.505711 progress 15% (18MB)
87 12:20:11.014545 progress 20% (24MB)
88 12:20:11.383729 progress 25% (30MB)
89 12:20:11.763514 progress 30% (36MB)
90 12:20:12.047890 progress 35% (42MB)
91 12:20:12.257696 progress 40% (48MB)
92 12:20:12.650053 progress 45% (54MB)
93 12:20:13.047901 progress 50% (60MB)
94 12:20:13.422362 progress 55% (66MB)
95 12:20:13.810751 progress 60% (72MB)
96 12:20:14.176165 progress 65% (78MB)
97 12:20:14.598349 progress 70% (84MB)
98 12:20:15.056961 progress 75% (90MB)
99 12:20:15.514380 progress 80% (96MB)
100 12:20:15.623406 progress 85% (102MB)
101 12:20:15.800619 progress 90% (108MB)
102 12:20:16.164535 progress 95% (114MB)
103 12:20:16.572454 progress 100% (120MB)
104 12:20:16.579016 120MB downloaded in 7.58s (15.84MB/s)
105 12:20:16.579343 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:20:16.579636 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:20:16.579742 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:20:16.579941 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:20:16.580070 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.277-cip94-rt29/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:20:16.580149 saving as /var/lib/lava/dispatcher/tmp/9729462/tftp-deploy-mhyv2v41/modules/modules.tar
112 12:20:16.580218 total size: 462060 (0MB)
113 12:20:16.580288 Using unxz to decompress xz
114 12:20:16.583590 progress 7% (0MB)
115 12:20:16.583996 progress 14% (0MB)
116 12:20:16.584253 progress 21% (0MB)
117 12:20:16.585726 progress 28% (0MB)
118 12:20:16.587953 progress 35% (0MB)
119 12:20:16.589960 progress 42% (0MB)
120 12:20:16.592349 progress 49% (0MB)
121 12:20:16.594396 progress 56% (0MB)
122 12:20:16.596786 progress 63% (0MB)
123 12:20:16.598778 progress 70% (0MB)
124 12:20:16.601200 progress 78% (0MB)
125 12:20:16.603456 progress 85% (0MB)
126 12:20:16.605382 progress 92% (0MB)
127 12:20:16.607856 progress 99% (0MB)
128 12:20:16.615189 0MB downloaded in 0.03s (12.60MB/s)
129 12:20:16.615473 end: 1.4.1 http-download (duration 00:00:00) [common]
131 12:20:16.615767 end: 1.4 download-retry (duration 00:00:00) [common]
132 12:20:16.615872 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
133 12:20:16.615979 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
134 12:20:18.498566 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729462/extract-nfsrootfs-ls7m1ck6
135 12:20:18.498785 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
136 12:20:18.498949 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
137 12:20:18.499190 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt
138 12:20:18.499308 makedir: /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin
139 12:20:18.499404 makedir: /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/tests
140 12:20:18.499494 makedir: /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/results
141 12:20:18.499604 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-add-keys
142 12:20:18.499749 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-add-sources
143 12:20:18.499878 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-background-process-start
144 12:20:18.500004 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-background-process-stop
145 12:20:18.500126 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-common-functions
146 12:20:18.500247 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-echo-ipv4
147 12:20:18.500368 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-install-packages
148 12:20:18.500488 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-installed-packages
149 12:20:18.500610 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-os-build
150 12:20:18.500731 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-probe-channel
151 12:20:18.500852 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-probe-ip
152 12:20:18.500972 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-target-ip
153 12:20:18.501092 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-target-mac
154 12:20:18.501211 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-target-storage
155 12:20:18.501334 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-test-case
156 12:20:18.501454 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-test-event
157 12:20:18.501573 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-test-feedback
158 12:20:18.501694 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-test-raise
159 12:20:18.501812 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-test-reference
160 12:20:18.501932 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-test-runner
161 12:20:18.502053 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-test-set
162 12:20:18.502174 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-test-shell
163 12:20:18.502296 Updating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-install-packages (oe)
164 12:20:18.502421 Updating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/bin/lava-installed-packages (oe)
165 12:20:18.502527 Creating /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/environment
166 12:20:18.502621 LAVA metadata
167 12:20:18.502697 - LAVA_JOB_ID=9729462
168 12:20:18.502767 - LAVA_DISPATCHER_IP=192.168.201.1
169 12:20:18.502874 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
170 12:20:18.502946 skipped lava-vland-overlay
171 12:20:18.503031 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
172 12:20:18.503156 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
173 12:20:18.503249 skipped lava-multinode-overlay
174 12:20:18.503331 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
175 12:20:18.503420 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
176 12:20:18.503500 Loading test definitions
177 12:20:18.503599 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
178 12:20:18.503676 Using /lava-9729462 at stage 0
179 12:20:18.503779 Fetching tests from https://github.com/kernelci/test-definitions
180 12:20:18.503865 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/0/tests/0_ltp-mm'
181 12:20:22.401506 Running '/usr/bin/git checkout kernelci.org
182 12:20:22.550398 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/0/tests/0_ltp-mm/automated/linux/ltp/ltp.yaml
183 12:20:22.551250 uuid=9729462_1.5.2.3.1 testdef=None
184 12:20:22.551421 end: 1.5.2.3.1 git-repo-action (duration 00:00:04) [common]
186 12:20:22.551708 start: 1.5.2.3.2 test-overlay (timeout 00:09:46) [common]
187 12:20:22.552575 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
189 12:20:22.552841 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:46) [common]
190 12:20:22.554018 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
192 12:20:22.554294 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:46) [common]
193 12:20:22.555404 runner path: /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/0/tests/0_ltp-mm test_uuid 9729462_1.5.2.3.1
194 12:20:22.555509 SKIPFILE='skipfile-lkft.yaml'
195 12:20:22.555584 SKIP_INSTALL='true'
196 12:20:22.555653 TST_CMDFILES='mm'
197 12:20:22.555801 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
199 12:20:22.556045 Creating lava-test-runner.conf files
200 12:20:22.556118 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729462/lava-overlay-2_vui9mt/lava-9729462/0 for stage 0
201 12:20:22.556215 - 0_ltp-mm
202 12:20:22.556328 end: 1.5.2.3 test-definition (duration 00:00:04) [common]
203 12:20:22.556431 start: 1.5.2.4 compress-overlay (timeout 00:09:46) [common]
204 12:20:30.725337 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
205 12:20:30.725523 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:38) [common]
206 12:20:30.725639 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
207 12:20:30.725751 end: 1.5.2 lava-overlay (duration 00:00:12) [common]
208 12:20:30.725857 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:38) [common]
209 12:20:30.844401 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
210 12:20:30.844792 start: 1.5.4 extract-modules (timeout 00:09:38) [common]
211 12:20:30.844915 extracting modules file /var/lib/lava/dispatcher/tmp/9729462/tftp-deploy-mhyv2v41/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729462/extract-nfsrootfs-ls7m1ck6
212 12:20:30.857133 extracting modules file /var/lib/lava/dispatcher/tmp/9729462/tftp-deploy-mhyv2v41/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729462/extract-overlay-ramdisk-nnlzlqus/ramdisk
213 12:20:30.868893 end: 1.5.4 extract-modules (duration 00:00:00) [common]
214 12:20:30.869066 start: 1.5.5 apply-overlay-tftp (timeout 00:09:38) [common]
215 12:20:30.869177 [common] Applying overlay to NFS
216 12:20:30.869264 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729462/compress-overlay-a4xzkv8m/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729462/extract-nfsrootfs-ls7m1ck6
217 12:20:31.738804 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
218 12:20:31.738995 start: 1.5.6 configure-preseed-file (timeout 00:09:37) [common]
219 12:20:31.739117 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
220 12:20:31.739226 start: 1.5.7 compress-ramdisk (timeout 00:09:37) [common]
221 12:20:31.739319 Building ramdisk /var/lib/lava/dispatcher/tmp/9729462/extract-overlay-ramdisk-nnlzlqus/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729462/extract-overlay-ramdisk-nnlzlqus/ramdisk
222 12:20:31.786425 >> 31023 blocks
223 12:20:32.406501 rename /var/lib/lava/dispatcher/tmp/9729462/extract-overlay-ramdisk-nnlzlqus/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729462/tftp-deploy-mhyv2v41/ramdisk/ramdisk.cpio.gz
224 12:20:32.406977 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
225 12:20:32.407141 start: 1.5.8 prepare-kernel (timeout 00:09:37) [common]
226 12:20:32.407275 start: 1.5.8.1 prepare-fit (timeout 00:09:37) [common]
227 12:20:32.407403 No mkimage arch provided, not using FIT.
228 12:20:32.407520 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
229 12:20:32.407638 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
230 12:20:32.407766 end: 1.5 prepare-tftp-overlay (duration 00:00:16) [common]
231 12:20:32.407895 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:37) [common]
232 12:20:32.407999 No LXC device requested
233 12:20:32.408115 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
234 12:20:32.408240 start: 1.7 deploy-device-env (timeout 00:09:37) [common]
235 12:20:32.408351 end: 1.7 deploy-device-env (duration 00:00:00) [common]
236 12:20:32.408446 Checking files for TFTP limit of 4294967296 bytes.
237 12:20:32.408897 end: 1 tftp-deploy (duration 00:00:23) [common]
238 12:20:32.409027 start: 2 depthcharge-action (timeout 00:05:00) [common]
239 12:20:32.409150 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
240 12:20:32.409309 substitutions:
241 12:20:32.409397 - {DTB}: None
242 12:20:32.409489 - {INITRD}: 9729462/tftp-deploy-mhyv2v41/ramdisk/ramdisk.cpio.gz
243 12:20:32.409577 - {KERNEL}: 9729462/tftp-deploy-mhyv2v41/kernel/bzImage
244 12:20:32.409665 - {LAVA_MAC}: None
245 12:20:32.409750 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729462/extract-nfsrootfs-ls7m1ck6
246 12:20:32.409841 - {NFS_SERVER_IP}: 192.168.201.1
247 12:20:32.409927 - {PRESEED_CONFIG}: None
248 12:20:32.410011 - {PRESEED_LOCAL}: None
249 12:20:32.410095 - {RAMDISK}: 9729462/tftp-deploy-mhyv2v41/ramdisk/ramdisk.cpio.gz
250 12:20:32.410181 - {ROOT_PART}: None
251 12:20:32.410264 - {ROOT}: None
252 12:20:32.410347 - {SERVER_IP}: 192.168.201.1
253 12:20:32.410429 - {TEE}: None
254 12:20:32.410516 Parsed boot commands:
255 12:20:32.410599 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
256 12:20:32.410803 Parsed boot commands: tftpboot 192.168.201.1 9729462/tftp-deploy-mhyv2v41/kernel/bzImage 9729462/tftp-deploy-mhyv2v41/kernel/cmdline 9729462/tftp-deploy-mhyv2v41/ramdisk/ramdisk.cpio.gz
257 12:20:32.410924 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
258 12:20:32.411043 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
259 12:20:32.411179 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
260 12:20:32.411302 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
261 12:20:32.411401 Not connected, no need to disconnect.
262 12:20:32.411513 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
263 12:20:32.411629 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
264 12:20:32.411718 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
265 12:20:32.414975 Setting prompt string to ['lava-test: # ']
266 12:20:32.415323 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
267 12:20:32.415462 end: 2.2.1 reset-connection (duration 00:00:00) [common]
268 12:20:32.415585 start: 2.2.2 reset-device (timeout 00:05:00) [common]
269 12:20:32.415710 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
270 12:20:32.415923 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
271 12:20:37.553359 >> Command sent successfully.
272 12:20:37.555875 Returned 0 in 5 seconds
273 12:20:37.656703 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
275 12:20:37.657274 end: 2.2.2 reset-device (duration 00:00:05) [common]
276 12:20:37.657462 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
277 12:20:37.657623 Setting prompt string to 'Starting depthcharge on Helios...'
278 12:20:37.657755 Changing prompt to 'Starting depthcharge on Helios...'
279 12:20:37.657896 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
280 12:20:37.658355 [Enter `^Ec?' for help]
281 12:20:38.279352
282 12:20:38.279609
283 12:20:38.289060 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
284 12:20:38.292101 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
285 12:20:38.298841 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
286 12:20:38.302445 CPU: AES supported, TXT NOT supported, VT supported
287 12:20:38.309035 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
288 12:20:38.312607 PCH: device id 0284 (rev 00) is Cometlake-U Premium
289 12:20:38.318971 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
290 12:20:38.322711 VBOOT: Loading verstage.
291 12:20:38.325610 FMAP: Found "FLASH" version 1.1 at 0xc04000.
292 12:20:38.332168 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
293 12:20:38.335871 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
294 12:20:38.338995 CBFS @ c08000 size 3f8000
295 12:20:38.345586 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
296 12:20:38.349163 CBFS: Locating 'fallback/verstage'
297 12:20:38.352285 CBFS: Found @ offset 10fb80 size 1072c
298 12:20:38.355808
299 12:20:38.355906
300 12:20:38.365987 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
301 12:20:38.379664 Probing TPM: . done!
302 12:20:38.383034 TPM ready after 0 ms
303 12:20:38.386235 Connected to device vid:did:rid of 1ae0:0028:00
304 12:20:38.396318 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
305 12:20:38.399884 Initialized TPM device CR50 revision 0
306 12:20:38.443914 tlcl_send_startup: Startup return code is 0
307 12:20:38.444085 TPM: setup succeeded
308 12:20:38.456053 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
309 12:20:38.460547 Chrome EC: UHEPI supported
310 12:20:38.463052 Phase 1
311 12:20:38.466852 FMAP: area GBB found @ c05000 (12288 bytes)
312 12:20:38.473357 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
313 12:20:38.473462 Phase 2
314 12:20:38.476685 Phase 3
315 12:20:38.480124 FMAP: area GBB found @ c05000 (12288 bytes)
316 12:20:38.486707 VB2:vb2_report_dev_firmware() This is developer signed firmware
317 12:20:38.493761 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
318 12:20:38.496919 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
319 12:20:38.503871 VB2:vb2_verify_keyblock() Checking keyblock signature...
320 12:20:38.519256 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
321 12:20:38.522403 FMAP: area VBLOCK_B found @ 768000 (65536 bytes)
322 12:20:38.529087 VB2:vb2_verify_fw_preamble() Verifying preamble.
323 12:20:38.533327 Phase 4
324 12:20:38.536801 FMAP: area FW_MAIN_B found @ 778000 (3506112 bytes)
325 12:20:38.543534 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
326 12:20:38.722798 VB2:vb2_rsa_verify_digest() Digest check failed!
327 12:20:38.729773 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
328 12:20:38.730288 Saving nvdata
329 12:20:38.733057 Reboot requested (10020007)
330 12:20:38.735756 board_reset() called!
331 12:20:38.736135 full_reset() called!
332 12:20:43.246278
333 12:20:43.246442
334 12:20:43.256094 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
335 12:20:43.259509 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
336 12:20:43.265549 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
337 12:20:43.268891 CPU: AES supported, TXT NOT supported, VT supported
338 12:20:43.275884 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
339 12:20:43.279010 PCH: device id 0284 (rev 00) is Cometlake-U Premium
340 12:20:43.285599 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
341 12:20:43.288931 VBOOT: Loading verstage.
342 12:20:43.292534 FMAP: Found "FLASH" version 1.1 at 0xc04000.
343 12:20:43.298996 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
344 12:20:43.301897 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
345 12:20:43.305503 CBFS @ c08000 size 3f8000
346 12:20:43.312126 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
347 12:20:43.315607 CBFS: Locating 'fallback/verstage'
348 12:20:43.318541 CBFS: Found @ offset 10fb80 size 1072c
349 12:20:43.322601
350 12:20:43.322696
351 12:20:43.332677 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
352 12:20:43.347067 Probing TPM: . done!
353 12:20:43.350163 TPM ready after 0 ms
354 12:20:43.353700 Connected to device vid:did:rid of 1ae0:0028:00
355 12:20:43.363860 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
356 12:20:43.367317 Initialized TPM device CR50 revision 0
357 12:20:43.410886 tlcl_send_startup: Startup return code is 0
358 12:20:43.411007 TPM: setup succeeded
359 12:20:43.423429 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
360 12:20:43.427421 Chrome EC: UHEPI supported
361 12:20:43.430484 Phase 1
362 12:20:43.434134 FMAP: area GBB found @ c05000 (12288 bytes)
363 12:20:43.440739 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
364 12:20:43.447959 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
365 12:20:43.450788 Recovery requested (1009000e)
366 12:20:43.456747 Saving nvdata
367 12:20:43.462371 tlcl_extend: response is 0
368 12:20:43.471614 tlcl_extend: response is 0
369 12:20:43.478697 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
370 12:20:43.481868 CBFS @ c08000 size 3f8000
371 12:20:43.488133 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
372 12:20:43.491832 CBFS: Locating 'fallback/romstage'
373 12:20:43.495028 CBFS: Found @ offset 80 size 145fc
374 12:20:43.498185 Accumulated console time in verstage 98 ms
375 12:20:43.498282
376 12:20:43.498357
377 12:20:43.511306 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
378 12:20:43.517976 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
379 12:20:43.521363 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
380 12:20:43.524895 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
381 12:20:43.531573 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
382 12:20:43.534543 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
383 12:20:43.538915 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
384 12:20:43.540860 TCO_STS: 0000 0000
385 12:20:43.544499 GEN_PMCON: e0015238 00000200
386 12:20:43.548073 GBLRST_CAUSE: 00000000 00000000
387 12:20:43.548190 prev_sleep_state 5
388 12:20:43.551535 Boot Count incremented to 48648
389 12:20:43.558065 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
390 12:20:43.561722 CBFS @ c08000 size 3f8000
391 12:20:43.568079 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
392 12:20:43.568179 CBFS: Locating 'fspm.bin'
393 12:20:43.571712 CBFS: Found @ offset 5ffc0 size 71000
394 12:20:43.575464 Chrome EC: UHEPI supported
395 12:20:43.582884 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
396 12:20:43.587943 Probing TPM: done!
397 12:20:43.594710 Connected to device vid:did:rid of 1ae0:0028:00
398 12:20:43.604471 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
399 12:20:43.610497 Initialized TPM device CR50 revision 0
400 12:20:43.619519 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
401 12:20:43.626442 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
402 12:20:43.629970 MRC cache found, size 1948
403 12:20:43.633129 bootmode is set to: 2
404 12:20:43.635915 PRMRR disabled by config.
405 12:20:43.639475 SPD INDEX = 1
406 12:20:43.643011 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
407 12:20:43.645960 CBFS @ c08000 size 3f8000
408 12:20:43.652470 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
409 12:20:43.652570 CBFS: Locating 'spd.bin'
410 12:20:43.655927 CBFS: Found @ offset 5fb80 size 400
411 12:20:43.659297 SPD: module type is LPDDR3
412 12:20:43.662528 SPD: module part is
413 12:20:43.669206 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
414 12:20:43.672164 SPD: device width 4 bits, bus width 8 bits
415 12:20:43.675774 SPD: module size is 4096 MB (per channel)
416 12:20:43.678760 memory slot: 0 configuration done.
417 12:20:43.682366 memory slot: 2 configuration done.
418 12:20:43.734046 CBMEM:
419 12:20:43.737457 IMD: root @ 99fff000 254 entries.
420 12:20:43.740541 IMD: root @ 99ffec00 62 entries.
421 12:20:43.744131 External stage cache:
422 12:20:43.747096 IMD: root @ 9abff000 254 entries.
423 12:20:43.750741 IMD: root @ 9abfec00 62 entries.
424 12:20:43.757283 Chrome EC: clear events_b mask to 0x0000000020004000
425 12:20:43.769986 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
426 12:20:43.780068 tlcl_write: response is 0
427 12:20:43.792183 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 12:20:43.798539 MRC: TPM MRC hash updated successfully.
429 12:20:43.798667 2 DIMMs found
430 12:20:43.801950 SMM Memory Map
431 12:20:43.805499 SMRAM : 0x9a000000 0x1000000
432 12:20:43.808965 Subregion 0: 0x9a000000 0xa00000
433 12:20:43.812242 Subregion 1: 0x9aa00000 0x200000
434 12:20:43.816128 Subregion 2: 0x9ac00000 0x400000
435 12:20:43.818498 top_of_ram = 0x9a000000
436 12:20:43.821805 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
437 12:20:43.828698 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
438 12:20:43.831880 MTRR Range: Start=ff000000 End=0 (Size 1000000)
439 12:20:43.838380 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
440 12:20:43.841691 CBFS @ c08000 size 3f8000
441 12:20:43.844966 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
442 12:20:43.848908 CBFS: Locating 'fallback/postcar'
443 12:20:43.855364 CBFS: Found @ offset 107000 size 4b44
444 12:20:43.858228 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
445 12:20:43.870721 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
446 12:20:43.873703 Processing 180 relocs. Offset value of 0x97c0c000
447 12:20:43.882846 Accumulated console time in romstage 286 ms
448 12:20:43.882946
449 12:20:43.883024
450 12:20:43.892445 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
451 12:20:43.898864 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
452 12:20:43.902094 CBFS @ c08000 size 3f8000
453 12:20:43.905863 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
454 12:20:43.912488 CBFS: Locating 'fallback/ramstage'
455 12:20:43.915526 CBFS: Found @ offset 43380 size 1b9e8
456 12:20:43.922484 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
457 12:20:43.954204 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
458 12:20:43.957206 Processing 3976 relocs. Offset value of 0x98db0000
459 12:20:43.963912 Accumulated console time in postcar 52 ms
460 12:20:43.964011
461 12:20:43.964090
462 12:20:43.974691 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
463 12:20:43.980540 FMAP: area RO_VPD found @ c00000 (16384 bytes)
464 12:20:43.984089 WARNING: RO_VPD is uninitialized or empty.
465 12:20:43.987745 FMAP: area RW_VPD found @ af8000 (8192 bytes)
466 12:20:43.993847 FMAP: area RW_VPD found @ af8000 (8192 bytes)
467 12:20:43.993948 Normal boot.
468 12:20:44.000435 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
469 12:20:44.003954 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
470 12:20:44.007095 CBFS @ c08000 size 3f8000
471 12:20:44.013989 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
472 12:20:44.017266 CBFS: Locating 'cpu_microcode_blob.bin'
473 12:20:44.020648 CBFS: Found @ offset 14700 size 2ec00
474 12:20:44.023529 microcode: sig=0x806ec pf=0x4 revision=0xc9
475 12:20:44.027019 Skip microcode update
476 12:20:44.034128 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
477 12:20:44.034230 CBFS @ c08000 size 3f8000
478 12:20:44.040507 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
479 12:20:44.043336 CBFS: Locating 'fsps.bin'
480 12:20:44.046785 CBFS: Found @ offset d1fc0 size 35000
481 12:20:44.072318 Detected 4 core, 8 thread CPU.
482 12:20:44.075462 Setting up SMI for CPU
483 12:20:44.079095 IED base = 0x9ac00000
484 12:20:44.079196 IED size = 0x00400000
485 12:20:44.082277 Will perform SMM setup.
486 12:20:44.089148 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
487 12:20:44.096071 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
488 12:20:44.098816 Processing 16 relocs. Offset value of 0x00030000
489 12:20:44.102443 Attempting to start 7 APs
490 12:20:44.105940 Waiting for 10ms after sending INIT.
491 12:20:44.122130 Waiting for 1st SIPI to complete...done.
492 12:20:44.122230 AP: slot 2 apic_id 1.
493 12:20:44.128603 Waiting for 2nd SIPI to complete...done.
494 12:20:44.128703 AP: slot 5 apic_id 5.
495 12:20:44.132093 AP: slot 4 apic_id 4.
496 12:20:44.135298 AP: slot 1 apic_id 3.
497 12:20:44.135425 AP: slot 3 apic_id 2.
498 12:20:44.139019 AP: slot 6 apic_id 6.
499 12:20:44.141808 AP: slot 7 apic_id 7.
500 12:20:44.148673 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
501 12:20:44.155202 Processing 13 relocs. Offset value of 0x00038000
502 12:20:44.158566 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
503 12:20:44.165368 Installing SMM handler to 0x9a000000
504 12:20:44.171673 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
505 12:20:44.178354 Processing 658 relocs. Offset value of 0x9a010000
506 12:20:44.184865 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
507 12:20:44.187846 Processing 13 relocs. Offset value of 0x9a008000
508 12:20:44.195033 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
509 12:20:44.201453 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
510 12:20:44.204733 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
511 12:20:44.211425 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
512 12:20:44.217879 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
513 12:20:44.224842 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
514 12:20:44.227860 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
515 12:20:44.234440 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
516 12:20:44.238075 Clearing SMI status registers
517 12:20:44.241681 SMI_STS: PM1
518 12:20:44.241779 PM1_STS: PWRBTN
519 12:20:44.244624 TCO_STS: SECOND_TO
520 12:20:44.248354 New SMBASE 0x9a000000
521 12:20:44.251203 In relocation handler: CPU 0
522 12:20:44.254409 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
523 12:20:44.257861 Writing SMRR. base = 0x9a000006, mask=0xff000800
524 12:20:44.261124 Relocation complete.
525 12:20:44.264394 New SMBASE 0x99fff800
526 12:20:44.264500 In relocation handler: CPU 2
527 12:20:44.271376 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
528 12:20:44.274933 Writing SMRR. base = 0x9a000006, mask=0xff000800
529 12:20:44.277702 Relocation complete.
530 12:20:44.281031 New SMBASE 0x99fff400
531 12:20:44.281129 In relocation handler: CPU 3
532 12:20:44.288225 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
533 12:20:44.291261 Writing SMRR. base = 0x9a000006, mask=0xff000800
534 12:20:44.294819 Relocation complete.
535 12:20:44.294917 New SMBASE 0x99fffc00
536 12:20:44.297824 In relocation handler: CPU 1
537 12:20:44.304456 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
538 12:20:44.307917 Writing SMRR. base = 0x9a000006, mask=0xff000800
539 12:20:44.310786 Relocation complete.
540 12:20:44.310882 New SMBASE 0x99fff000
541 12:20:44.314262 In relocation handler: CPU 4
542 12:20:44.321227 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
543 12:20:44.324480 Writing SMRR. base = 0x9a000006, mask=0xff000800
544 12:20:44.327391 Relocation complete.
545 12:20:44.327489 New SMBASE 0x99ffec00
546 12:20:44.331131 In relocation handler: CPU 5
547 12:20:44.334226 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
548 12:20:44.341000 Writing SMRR. base = 0x9a000006, mask=0xff000800
549 12:20:44.344008 Relocation complete.
550 12:20:44.344105 New SMBASE 0x99ffe800
551 12:20:44.347462 In relocation handler: CPU 6
552 12:20:44.350818 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
553 12:20:44.357809 Writing SMRR. base = 0x9a000006, mask=0xff000800
554 12:20:44.361341 Relocation complete.
555 12:20:44.361446 New SMBASE 0x99ffe400
556 12:20:44.364356 In relocation handler: CPU 7
557 12:20:44.367389 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
558 12:20:44.374260 Writing SMRR. base = 0x9a000006, mask=0xff000800
559 12:20:44.374358 Relocation complete.
560 12:20:44.377245 Initializing CPU #0
561 12:20:44.380795 CPU: vendor Intel device 806ec
562 12:20:44.384060 CPU: family 06, model 8e, stepping 0c
563 12:20:44.387231 Clearing out pending MCEs
564 12:20:44.390823 Setting up local APIC...
565 12:20:44.390921 apic_id: 0x00 done.
566 12:20:44.393789 Turbo is available but hidden
567 12:20:44.397359 Turbo is available and visible
568 12:20:44.400357 VMX status: enabled
569 12:20:44.404234 IA32_FEATURE_CONTROL status: locked
570 12:20:44.407348 Skip microcode update
571 12:20:44.407445 CPU #0 initialized
572 12:20:44.410376 Initializing CPU #2
573 12:20:44.414017 Initializing CPU #5
574 12:20:44.414114 Initializing CPU #4
575 12:20:44.416983 CPU: vendor Intel device 806ec
576 12:20:44.420793 CPU: family 06, model 8e, stepping 0c
577 12:20:44.423535 CPU: vendor Intel device 806ec
578 12:20:44.427022 CPU: family 06, model 8e, stepping 0c
579 12:20:44.430356 Clearing out pending MCEs
580 12:20:44.433348 Clearing out pending MCEs
581 12:20:44.437081 Setting up local APIC...
582 12:20:44.437178 Initializing CPU #6
583 12:20:44.440309 Initializing CPU #7
584 12:20:44.443890 CPU: vendor Intel device 806ec
585 12:20:44.446835 CPU: family 06, model 8e, stepping 0c
586 12:20:44.450487 CPU: vendor Intel device 806ec
587 12:20:44.453628 CPU: family 06, model 8e, stepping 0c
588 12:20:44.457160 CPU: vendor Intel device 806ec
589 12:20:44.460507 CPU: family 06, model 8e, stepping 0c
590 12:20:44.463416 Clearing out pending MCEs
591 12:20:44.467037 Initializing CPU #1
592 12:20:44.467142 Initializing CPU #3
593 12:20:44.470263 CPU: vendor Intel device 806ec
594 12:20:44.473348 CPU: family 06, model 8e, stepping 0c
595 12:20:44.476903 CPU: vendor Intel device 806ec
596 12:20:44.479838 CPU: family 06, model 8e, stepping 0c
597 12:20:44.483579 Clearing out pending MCEs
598 12:20:44.486765 Clearing out pending MCEs
599 12:20:44.490196 Setting up local APIC...
600 12:20:44.493117 Setting up local APIC...
601 12:20:44.493214 Clearing out pending MCEs
602 12:20:44.496747 Clearing out pending MCEs
603 12:20:44.499726 Setting up local APIC...
604 12:20:44.503504 apic_id: 0x04 done.
605 12:20:44.503601 Setting up local APIC...
606 12:20:44.506517 apic_id: 0x01 done.
607 12:20:44.510104 Setting up local APIC...
608 12:20:44.510201 VMX status: enabled
609 12:20:44.513042 Setting up local APIC...
610 12:20:44.516641 apic_id: 0x07 done.
611 12:20:44.516747 apic_id: 0x06 done.
612 12:20:44.519758 VMX status: enabled
613 12:20:44.523373 VMX status: enabled
614 12:20:44.526265 IA32_FEATURE_CONTROL status: locked
615 12:20:44.529944 IA32_FEATURE_CONTROL status: locked
616 12:20:44.530041 Skip microcode update
617 12:20:44.533205 Skip microcode update
618 12:20:44.536663 CPU #7 initialized
619 12:20:44.536762 CPU #6 initialized
620 12:20:44.539753 apic_id: 0x02 done.
621 12:20:44.543383 apic_id: 0x03 done.
622 12:20:44.543481 VMX status: enabled
623 12:20:44.546407 VMX status: enabled
624 12:20:44.550016 IA32_FEATURE_CONTROL status: locked
625 12:20:44.553086 IA32_FEATURE_CONTROL status: locked
626 12:20:44.556102 Skip microcode update
627 12:20:44.556199 Skip microcode update
628 12:20:44.559746 CPU #3 initialized
629 12:20:44.563199 CPU #1 initialized
630 12:20:44.563298 VMX status: enabled
631 12:20:44.566311 apic_id: 0x05 done.
632 12:20:44.569511 IA32_FEATURE_CONTROL status: locked
633 12:20:44.569611 VMX status: enabled
634 12:20:44.572736 Skip microcode update
635 12:20:44.575960 IA32_FEATURE_CONTROL status: locked
636 12:20:44.579327 CPU #4 initialized
637 12:20:44.582698 Skip microcode update
638 12:20:44.586223 IA32_FEATURE_CONTROL status: locked
639 12:20:44.586322 CPU #5 initialized
640 12:20:44.589591 Skip microcode update
641 12:20:44.593061 CPU #2 initialized
642 12:20:44.595821 bsp_do_flight_plan done after 466 msecs.
643 12:20:44.599092 CPU: frequency set to 4200 MHz
644 12:20:44.599193 Enabling SMIs.
645 12:20:44.602797 Locking SMM.
646 12:20:44.616475 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
647 12:20:44.619445 CBFS @ c08000 size 3f8000
648 12:20:44.625985 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
649 12:20:44.626085 CBFS: Locating 'vbt.bin'
650 12:20:44.629361 CBFS: Found @ offset 5f5c0 size 499
651 12:20:44.636413 Found a VBT of 4608 bytes after decompression
652 12:20:44.819219 Display FSP Version Info HOB
653 12:20:44.822785 Reference Code - CPU = 9.0.1e.30
654 12:20:44.825706 uCode Version = 0.0.0.ca
655 12:20:44.829312 TXT ACM version = ff.ff.ff.ffff
656 12:20:44.832814 Display FSP Version Info HOB
657 12:20:44.835712 Reference Code - ME = 9.0.1e.30
658 12:20:44.839030 MEBx version = 0.0.0.0
659 12:20:44.843044 ME Firmware Version = Consumer SKU
660 12:20:44.845825 Display FSP Version Info HOB
661 12:20:44.849055 Reference Code - CML PCH = 9.0.1e.30
662 12:20:44.852866 PCH-CRID Status = Disabled
663 12:20:44.855703 PCH-CRID Original Value = ff.ff.ff.ffff
664 12:20:44.859307 PCH-CRID New Value = ff.ff.ff.ffff
665 12:20:44.862276 OPROM - RST - RAID = ff.ff.ff.ffff
666 12:20:44.865725 ChipsetInit Base Version = ff.ff.ff.ffff
667 12:20:44.869536 ChipsetInit Oem Version = ff.ff.ff.ffff
668 12:20:44.872696 Display FSP Version Info HOB
669 12:20:44.879073 Reference Code - SA - System Agent = 9.0.1e.30
670 12:20:44.882085 Reference Code - MRC = 0.7.1.6c
671 12:20:44.882184 SA - PCIe Version = 9.0.1e.30
672 12:20:44.885530 SA-CRID Status = Disabled
673 12:20:44.889036 SA-CRID Original Value = 0.0.0.c
674 12:20:44.892164 SA-CRID New Value = 0.0.0.c
675 12:20:44.895329 OPROM - VBIOS = ff.ff.ff.ffff
676 12:20:44.898629 RTC Init
677 12:20:44.901991 Set power on after power failure.
678 12:20:44.902090 Disabling Deep S3
679 12:20:44.905642 Disabling Deep S3
680 12:20:44.905741 Disabling Deep S4
681 12:20:44.908979 Disabling Deep S4
682 12:20:44.909078 Disabling Deep S5
683 12:20:44.912392 Disabling Deep S5
684 12:20:44.918729 BS: BS_DEV_INIT_CHIPS times (ms): entry 37 run 194 exit 1
685 12:20:44.918828 Enumerating buses...
686 12:20:44.925519 Show all devs... Before device enumeration.
687 12:20:44.925620 Root Device: enabled 1
688 12:20:44.928554 CPU_CLUSTER: 0: enabled 1
689 12:20:44.932502 DOMAIN: 0000: enabled 1
690 12:20:44.935213 APIC: 00: enabled 1
691 12:20:44.935311 PCI: 00:00.0: enabled 1
692 12:20:44.938768 PCI: 00:02.0: enabled 1
693 12:20:44.941848 PCI: 00:04.0: enabled 0
694 12:20:44.945334 PCI: 00:05.0: enabled 0
695 12:20:44.945432 PCI: 00:12.0: enabled 1
696 12:20:44.948714 PCI: 00:12.5: enabled 0
697 12:20:44.951942 PCI: 00:12.6: enabled 0
698 12:20:44.955339 PCI: 00:14.0: enabled 1
699 12:20:44.955437 PCI: 00:14.1: enabled 0
700 12:20:44.958404 PCI: 00:14.3: enabled 1
701 12:20:44.961957 PCI: 00:14.5: enabled 0
702 12:20:44.962056 PCI: 00:15.0: enabled 1
703 12:20:44.964931 PCI: 00:15.1: enabled 1
704 12:20:44.968405 PCI: 00:15.2: enabled 0
705 12:20:44.972054 PCI: 00:15.3: enabled 0
706 12:20:44.972154 PCI: 00:16.0: enabled 1
707 12:20:44.974837 PCI: 00:16.1: enabled 0
708 12:20:44.978448 PCI: 00:16.2: enabled 0
709 12:20:44.981810 PCI: 00:16.3: enabled 0
710 12:20:44.981909 PCI: 00:16.4: enabled 0
711 12:20:44.984882 PCI: 00:16.5: enabled 0
712 12:20:44.988455 PCI: 00:17.0: enabled 1
713 12:20:44.991537 PCI: 00:19.0: enabled 1
714 12:20:44.991635 PCI: 00:19.1: enabled 0
715 12:20:44.994911 PCI: 00:19.2: enabled 0
716 12:20:44.997962 PCI: 00:1a.0: enabled 0
717 12:20:44.998061 PCI: 00:1c.0: enabled 0
718 12:20:45.001748 PCI: 00:1c.1: enabled 0
719 12:20:45.004703 PCI: 00:1c.2: enabled 0
720 12:20:45.008038 PCI: 00:1c.3: enabled 0
721 12:20:45.008141 PCI: 00:1c.4: enabled 0
722 12:20:45.011457 PCI: 00:1c.5: enabled 0
723 12:20:45.014775 PCI: 00:1c.6: enabled 0
724 12:20:45.017984 PCI: 00:1c.7: enabled 0
725 12:20:45.018083 PCI: 00:1d.0: enabled 1
726 12:20:45.021405 PCI: 00:1d.1: enabled 0
727 12:20:45.024635 PCI: 00:1d.2: enabled 0
728 12:20:45.028118 PCI: 00:1d.3: enabled 0
729 12:20:45.028216 PCI: 00:1d.4: enabled 0
730 12:20:45.031474 PCI: 00:1d.5: enabled 1
731 12:20:45.034510 PCI: 00:1e.0: enabled 1
732 12:20:45.034608 PCI: 00:1e.1: enabled 0
733 12:20:45.038152 PCI: 00:1e.2: enabled 1
734 12:20:45.041529 PCI: 00:1e.3: enabled 1
735 12:20:45.044544 PCI: 00:1f.0: enabled 1
736 12:20:45.044643 PCI: 00:1f.1: enabled 1
737 12:20:45.048256 PCI: 00:1f.2: enabled 1
738 12:20:45.050991 PCI: 00:1f.3: enabled 1
739 12:20:45.054479 PCI: 00:1f.4: enabled 1
740 12:20:45.054576 PCI: 00:1f.5: enabled 1
741 12:20:45.057905 PCI: 00:1f.6: enabled 0
742 12:20:45.061186 USB0 port 0: enabled 1
743 12:20:45.061284 I2C: 00:15: enabled 1
744 12:20:45.064750 I2C: 00:5d: enabled 1
745 12:20:45.067607 GENERIC: 0.0: enabled 1
746 12:20:45.071306 I2C: 00:1a: enabled 1
747 12:20:45.071403 I2C: 00:38: enabled 1
748 12:20:45.074391 I2C: 00:39: enabled 1
749 12:20:45.077857 I2C: 00:3a: enabled 1
750 12:20:45.077954 I2C: 00:3b: enabled 1
751 12:20:45.080904 PCI: 00:00.0: enabled 1
752 12:20:45.084891 SPI: 00: enabled 1
753 12:20:45.084991 SPI: 01: enabled 1
754 12:20:45.087309 PNP: 0c09.0: enabled 1
755 12:20:45.091070 USB2 port 0: enabled 1
756 12:20:45.091173 USB2 port 1: enabled 1
757 12:20:45.094226 USB2 port 2: enabled 0
758 12:20:45.097683 USB2 port 3: enabled 0
759 12:20:45.097781 USB2 port 5: enabled 0
760 12:20:45.100667 USB2 port 6: enabled 1
761 12:20:45.104348 USB2 port 9: enabled 1
762 12:20:45.104444 USB3 port 0: enabled 1
763 12:20:45.108092 USB3 port 1: enabled 1
764 12:20:45.111105 USB3 port 2: enabled 1
765 12:20:45.114155 USB3 port 3: enabled 1
766 12:20:45.114252 USB3 port 4: enabled 0
767 12:20:45.117286 APIC: 03: enabled 1
768 12:20:45.120683 APIC: 01: enabled 1
769 12:20:45.120780 APIC: 02: enabled 1
770 12:20:45.123823 APIC: 04: enabled 1
771 12:20:45.123920 APIC: 05: enabled 1
772 12:20:45.127124 APIC: 06: enabled 1
773 12:20:45.131065 APIC: 07: enabled 1
774 12:20:45.131168 Compare with tree...
775 12:20:45.134449 Root Device: enabled 1
776 12:20:45.137386 CPU_CLUSTER: 0: enabled 1
777 12:20:45.137483 APIC: 00: enabled 1
778 12:20:45.140357 APIC: 03: enabled 1
779 12:20:45.144314 APIC: 01: enabled 1
780 12:20:45.144411 APIC: 02: enabled 1
781 12:20:45.147519 APIC: 04: enabled 1
782 12:20:45.150590 APIC: 05: enabled 1
783 12:20:45.153794 APIC: 06: enabled 1
784 12:20:45.153891 APIC: 07: enabled 1
785 12:20:45.157385 DOMAIN: 0000: enabled 1
786 12:20:45.160811 PCI: 00:00.0: enabled 1
787 12:20:45.164101 PCI: 00:02.0: enabled 1
788 12:20:45.164198 PCI: 00:04.0: enabled 0
789 12:20:45.167587 PCI: 00:05.0: enabled 0
790 12:20:45.170677 PCI: 00:12.0: enabled 1
791 12:20:45.173571 PCI: 00:12.5: enabled 0
792 12:20:45.177184 PCI: 00:12.6: enabled 0
793 12:20:45.177281 PCI: 00:14.0: enabled 1
794 12:20:45.180168 USB0 port 0: enabled 1
795 12:20:45.183810 USB2 port 0: enabled 1
796 12:20:45.187431 USB2 port 1: enabled 1
797 12:20:45.190346 USB2 port 2: enabled 0
798 12:20:45.190443 USB2 port 3: enabled 0
799 12:20:45.193425 USB2 port 5: enabled 0
800 12:20:45.197075 USB2 port 6: enabled 1
801 12:20:45.200349 USB2 port 9: enabled 1
802 12:20:45.203981 USB3 port 0: enabled 1
803 12:20:45.207315 USB3 port 1: enabled 1
804 12:20:45.207412 USB3 port 2: enabled 1
805 12:20:45.210325 USB3 port 3: enabled 1
806 12:20:45.213848 USB3 port 4: enabled 0
807 12:20:45.216580 PCI: 00:14.1: enabled 0
808 12:20:45.220384 PCI: 00:14.3: enabled 1
809 12:20:45.220482 PCI: 00:14.5: enabled 0
810 12:20:45.223103 PCI: 00:15.0: enabled 1
811 12:20:45.226905 I2C: 00:15: enabled 1
812 12:20:45.230190 PCI: 00:15.1: enabled 1
813 12:20:45.230288 I2C: 00:5d: enabled 1
814 12:20:45.233427 GENERIC: 0.0: enabled 1
815 12:20:45.236981 PCI: 00:15.2: enabled 0
816 12:20:45.239933 PCI: 00:15.3: enabled 0
817 12:20:45.243229 PCI: 00:16.0: enabled 1
818 12:20:45.243326 PCI: 00:16.1: enabled 0
819 12:20:45.247200 PCI: 00:16.2: enabled 0
820 12:20:45.249960 PCI: 00:16.3: enabled 0
821 12:20:45.253155 PCI: 00:16.4: enabled 0
822 12:20:45.256543 PCI: 00:16.5: enabled 0
823 12:20:45.256642 PCI: 00:17.0: enabled 1
824 12:20:45.259900 PCI: 00:19.0: enabled 1
825 12:20:45.263430 I2C: 00:1a: enabled 1
826 12:20:45.266764 I2C: 00:38: enabled 1
827 12:20:45.269498 I2C: 00:39: enabled 1
828 12:20:45.269595 I2C: 00:3a: enabled 1
829 12:20:45.273304 I2C: 00:3b: enabled 1
830 12:20:45.276442 PCI: 00:19.1: enabled 0
831 12:20:45.279980 PCI: 00:19.2: enabled 0
832 12:20:45.280078 PCI: 00:1a.0: enabled 0
833 12:20:45.282886 PCI: 00:1c.0: enabled 0
834 12:20:45.286515 PCI: 00:1c.1: enabled 0
835 12:20:45.290055 PCI: 00:1c.2: enabled 0
836 12:20:45.292842 PCI: 00:1c.3: enabled 0
837 12:20:45.292940 PCI: 00:1c.4: enabled 0
838 12:20:45.296664 PCI: 00:1c.5: enabled 0
839 12:20:45.299788 PCI: 00:1c.6: enabled 0
840 12:20:45.302916 PCI: 00:1c.7: enabled 0
841 12:20:45.306398 PCI: 00:1d.0: enabled 1
842 12:20:45.306496 PCI: 00:1d.1: enabled 0
843 12:20:45.309454 PCI: 00:1d.2: enabled 0
844 12:20:45.312786 PCI: 00:1d.3: enabled 0
845 12:20:45.316353 PCI: 00:1d.4: enabled 0
846 12:20:45.319096 PCI: 00:1d.5: enabled 1
847 12:20:45.319195 PCI: 00:00.0: enabled 1
848 12:20:45.322636 PCI: 00:1e.0: enabled 1
849 12:20:45.326264 PCI: 00:1e.1: enabled 0
850 12:20:45.329583 PCI: 00:1e.2: enabled 1
851 12:20:45.329682 SPI: 00: enabled 1
852 12:20:45.332359 PCI: 00:1e.3: enabled 1
853 12:20:45.335708 SPI: 01: enabled 1
854 12:20:45.339034 PCI: 00:1f.0: enabled 1
855 12:20:45.339140 PNP: 0c09.0: enabled 1
856 12:20:45.342500 PCI: 00:1f.1: enabled 1
857 12:20:45.345843 PCI: 00:1f.2: enabled 1
858 12:20:45.349235 PCI: 00:1f.3: enabled 1
859 12:20:45.352875 PCI: 00:1f.4: enabled 1
860 12:20:45.352973 PCI: 00:1f.5: enabled 1
861 12:20:45.355533 PCI: 00:1f.6: enabled 0
862 12:20:45.359184 Root Device scanning...
863 12:20:45.362753 scan_static_bus for Root Device
864 12:20:45.365792 CPU_CLUSTER: 0 enabled
865 12:20:45.365890 DOMAIN: 0000 enabled
866 12:20:45.369236 DOMAIN: 0000 scanning...
867 12:20:45.372441 PCI: pci_scan_bus for bus 00
868 12:20:45.375751 PCI: 00:00.0 [8086/0000] ops
869 12:20:45.379211 PCI: 00:00.0 [8086/9b61] enabled
870 12:20:45.382215 PCI: 00:02.0 [8086/0000] bus ops
871 12:20:45.385747 PCI: 00:02.0 [8086/9b41] enabled
872 12:20:45.388869 PCI: 00:04.0 [8086/1903] disabled
873 12:20:45.392250 PCI: 00:08.0 [8086/1911] enabled
874 12:20:45.395293 PCI: 00:12.0 [8086/02f9] enabled
875 12:20:45.399026 PCI: 00:14.0 [8086/0000] bus ops
876 12:20:45.402015 PCI: 00:14.0 [8086/02ed] enabled
877 12:20:45.405469 PCI: 00:14.2 [8086/02ef] enabled
878 12:20:45.409043 PCI: 00:14.3 [8086/02f0] enabled
879 12:20:45.412529 PCI: 00:15.0 [8086/0000] bus ops
880 12:20:45.416022 PCI: 00:15.0 [8086/02e8] enabled
881 12:20:45.418752 PCI: 00:15.1 [8086/0000] bus ops
882 12:20:45.422354 PCI: 00:15.1 [8086/02e9] enabled
883 12:20:45.425226 PCI: 00:16.0 [8086/0000] ops
884 12:20:45.428829 PCI: 00:16.0 [8086/02e0] enabled
885 12:20:45.431928 PCI: 00:17.0 [8086/0000] ops
886 12:20:45.435282 PCI: 00:17.0 [8086/02d3] enabled
887 12:20:45.438682 PCI: 00:19.0 [8086/0000] bus ops
888 12:20:45.441780 PCI: 00:19.0 [8086/02c5] enabled
889 12:20:45.445443 PCI: 00:1d.0 [8086/0000] bus ops
890 12:20:45.448559 PCI: 00:1d.0 [8086/02b0] enabled
891 12:20:45.455219 PCI: Static device PCI: 00:1d.5 not found, disabling it.
892 12:20:45.458582 PCI: 00:1e.0 [8086/0000] ops
893 12:20:45.462002 PCI: 00:1e.0 [8086/02a8] enabled
894 12:20:45.465197 PCI: 00:1e.2 [8086/0000] bus ops
895 12:20:45.468641 PCI: 00:1e.2 [8086/02aa] enabled
896 12:20:45.472052 PCI: 00:1e.3 [8086/0000] bus ops
897 12:20:45.474946 PCI: 00:1e.3 [8086/02ab] enabled
898 12:20:45.478437 PCI: 00:1f.0 [8086/0000] bus ops
899 12:20:45.481703 PCI: 00:1f.0 [8086/0284] enabled
900 12:20:45.485096 PCI: Static device PCI: 00:1f.1 not found, disabling it.
901 12:20:45.492075 PCI: Static device PCI: 00:1f.2 not found, disabling it.
902 12:20:45.495055 PCI: 00:1f.3 [8086/0000] bus ops
903 12:20:45.498062 PCI: 00:1f.3 [8086/02c8] enabled
904 12:20:45.501582 PCI: 00:1f.4 [8086/0000] bus ops
905 12:20:45.505468 PCI: 00:1f.4 [8086/02a3] enabled
906 12:20:45.508237 PCI: 00:1f.5 [8086/0000] bus ops
907 12:20:45.511862 PCI: 00:1f.5 [8086/02a4] enabled
908 12:20:45.514919 PCI: Leftover static devices:
909 12:20:45.515016 PCI: 00:05.0
910 12:20:45.518626 PCI: 00:12.5
911 12:20:45.518723 PCI: 00:12.6
912 12:20:45.518801 PCI: 00:14.1
913 12:20:45.522022 PCI: 00:14.5
914 12:20:45.522118 PCI: 00:15.2
915 12:20:45.525037 PCI: 00:15.3
916 12:20:45.525134 PCI: 00:16.1
917 12:20:45.527998 PCI: 00:16.2
918 12:20:45.528095 PCI: 00:16.3
919 12:20:45.528172 PCI: 00:16.4
920 12:20:45.531315 PCI: 00:16.5
921 12:20:45.531412 PCI: 00:19.1
922 12:20:45.535001 PCI: 00:19.2
923 12:20:45.535107 PCI: 00:1a.0
924 12:20:45.535184 PCI: 00:1c.0
925 12:20:45.537850 PCI: 00:1c.1
926 12:20:45.537947 PCI: 00:1c.2
927 12:20:45.541270 PCI: 00:1c.3
928 12:20:45.541367 PCI: 00:1c.4
929 12:20:45.541444 PCI: 00:1c.5
930 12:20:45.544700 PCI: 00:1c.6
931 12:20:45.544803 PCI: 00:1c.7
932 12:20:45.548223 PCI: 00:1d.1
933 12:20:45.548320 PCI: 00:1d.2
934 12:20:45.551431 PCI: 00:1d.3
935 12:20:45.551528 PCI: 00:1d.4
936 12:20:45.551605 PCI: 00:1d.5
937 12:20:45.554880 PCI: 00:1e.1
938 12:20:45.554977 PCI: 00:1f.1
939 12:20:45.558217 PCI: 00:1f.2
940 12:20:45.558321 PCI: 00:1f.6
941 12:20:45.561099 PCI: Check your devicetree.cb.
942 12:20:45.564563 PCI: 00:02.0 scanning...
943 12:20:45.567941 scan_generic_bus for PCI: 00:02.0
944 12:20:45.571057 scan_generic_bus for PCI: 00:02.0 done
945 12:20:45.578024 scan_bus: scanning of bus PCI: 00:02.0 took 10184 usecs
946 12:20:45.578122 PCI: 00:14.0 scanning...
947 12:20:45.581459 scan_static_bus for PCI: 00:14.0
948 12:20:45.584852 USB0 port 0 enabled
949 12:20:45.587760 USB0 port 0 scanning...
950 12:20:45.591209 scan_static_bus for USB0 port 0
951 12:20:45.594745 USB2 port 0 enabled
952 12:20:45.594842 USB2 port 1 enabled
953 12:20:45.597730 USB2 port 2 disabled
954 12:20:45.597828 USB2 port 3 disabled
955 12:20:45.600882 USB2 port 5 disabled
956 12:20:45.604367 USB2 port 6 enabled
957 12:20:45.604464 USB2 port 9 enabled
958 12:20:45.607878 USB3 port 0 enabled
959 12:20:45.611274 USB3 port 1 enabled
960 12:20:45.611371 USB3 port 2 enabled
961 12:20:45.614251 USB3 port 3 enabled
962 12:20:45.614348 USB3 port 4 disabled
963 12:20:45.617957 USB2 port 0 scanning...
964 12:20:45.620938 scan_static_bus for USB2 port 0
965 12:20:45.624501 scan_static_bus for USB2 port 0 done
966 12:20:45.630595 scan_bus: scanning of bus USB2 port 0 took 9695 usecs
967 12:20:45.634068 USB2 port 1 scanning...
968 12:20:45.637508 scan_static_bus for USB2 port 1
969 12:20:45.640884 scan_static_bus for USB2 port 1 done
970 12:20:45.647300 scan_bus: scanning of bus USB2 port 1 took 9695 usecs
971 12:20:45.647398 USB2 port 6 scanning...
972 12:20:45.650809 scan_static_bus for USB2 port 6
973 12:20:45.654210 scan_static_bus for USB2 port 6 done
974 12:20:45.661183 scan_bus: scanning of bus USB2 port 6 took 9702 usecs
975 12:20:45.664277 USB2 port 9 scanning...
976 12:20:45.667253 scan_static_bus for USB2 port 9
977 12:20:45.670549 scan_static_bus for USB2 port 9 done
978 12:20:45.677268 scan_bus: scanning of bus USB2 port 9 took 9701 usecs
979 12:20:45.677372 USB3 port 0 scanning...
980 12:20:45.680452 scan_static_bus for USB3 port 0
981 12:20:45.687630 scan_static_bus for USB3 port 0 done
982 12:20:45.690469 scan_bus: scanning of bus USB3 port 0 took 9704 usecs
983 12:20:45.693634 USB3 port 1 scanning...
984 12:20:45.696927 scan_static_bus for USB3 port 1
985 12:20:45.700549 scan_static_bus for USB3 port 1 done
986 12:20:45.707054 scan_bus: scanning of bus USB3 port 1 took 9694 usecs
987 12:20:45.707160 USB3 port 2 scanning...
988 12:20:45.710059 scan_static_bus for USB3 port 2
989 12:20:45.716715 scan_static_bus for USB3 port 2 done
990 12:20:45.720231 scan_bus: scanning of bus USB3 port 2 took 9694 usecs
991 12:20:45.723298 USB3 port 3 scanning...
992 12:20:45.726970 scan_static_bus for USB3 port 3
993 12:20:45.730449 scan_static_bus for USB3 port 3 done
994 12:20:45.736930 scan_bus: scanning of bus USB3 port 3 took 9702 usecs
995 12:20:45.740460 scan_static_bus for USB0 port 0 done
996 12:20:45.743386 scan_bus: scanning of bus USB0 port 0 took 155314 usecs
997 12:20:45.749956 scan_static_bus for PCI: 00:14.0 done
998 12:20:45.753530 scan_bus: scanning of bus PCI: 00:14.0 took 172936 usecs
999 12:20:45.756471 PCI: 00:15.0 scanning...
1000 12:20:45.759855 scan_generic_bus for PCI: 00:15.0
1001 12:20:45.763187 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1002 12:20:45.769759 scan_generic_bus for PCI: 00:15.0 done
1003 12:20:45.773081 scan_bus: scanning of bus PCI: 00:15.0 took 14293 usecs
1004 12:20:45.776549 PCI: 00:15.1 scanning...
1005 12:20:45.779803 scan_generic_bus for PCI: 00:15.1
1006 12:20:45.783276 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1007 12:20:45.789745 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1008 12:20:45.793256 scan_generic_bus for PCI: 00:15.1 done
1009 12:20:45.799812 scan_bus: scanning of bus PCI: 00:15.1 took 18581 usecs
1010 12:20:45.799910 PCI: 00:19.0 scanning...
1011 12:20:45.803114 scan_generic_bus for PCI: 00:19.0
1012 12:20:45.809467 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1013 12:20:45.812949 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1014 12:20:45.816590 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1015 12:20:45.819334 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1016 12:20:45.826036 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1017 12:20:45.829776 scan_generic_bus for PCI: 00:19.0 done
1018 12:20:45.832808 scan_bus: scanning of bus PCI: 00:19.0 took 30714 usecs
1019 12:20:45.836355 PCI: 00:1d.0 scanning...
1020 12:20:45.839637 do_pci_scan_bridge for PCI: 00:1d.0
1021 12:20:45.842725 PCI: pci_scan_bus for bus 01
1022 12:20:45.846242 PCI: 01:00.0 [1c5c/1327] enabled
1023 12:20:45.849236 Enabling Common Clock Configuration
1024 12:20:45.856465 L1 Sub-State supported from root port 29
1025 12:20:45.859475 L1 Sub-State Support = 0xf
1026 12:20:45.859572 CommonModeRestoreTime = 0x28
1027 12:20:45.866154 Power On Value = 0x16, Power On Scale = 0x0
1028 12:20:45.866252 ASPM: Enabled L1
1029 12:20:45.872800 scan_bus: scanning of bus PCI: 00:1d.0 took 32774 usecs
1030 12:20:45.876101 PCI: 00:1e.2 scanning...
1031 12:20:45.879447 scan_generic_bus for PCI: 00:1e.2
1032 12:20:45.882343 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1033 12:20:45.885607 scan_generic_bus for PCI: 00:1e.2 done
1034 12:20:45.892628 scan_bus: scanning of bus PCI: 00:1e.2 took 14001 usecs
1035 12:20:45.896148 PCI: 00:1e.3 scanning...
1036 12:20:45.899200 scan_generic_bus for PCI: 00:1e.3
1037 12:20:45.902597 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1038 12:20:45.905530 scan_generic_bus for PCI: 00:1e.3 done
1039 12:20:45.912188 scan_bus: scanning of bus PCI: 00:1e.3 took 14000 usecs
1040 12:20:45.915688 PCI: 00:1f.0 scanning...
1041 12:20:45.919066 scan_static_bus for PCI: 00:1f.0
1042 12:20:45.919170 PNP: 0c09.0 enabled
1043 12:20:45.922175 scan_static_bus for PCI: 00:1f.0 done
1044 12:20:45.928524 scan_bus: scanning of bus PCI: 00:1f.0 took 12033 usecs
1045 12:20:45.932151 PCI: 00:1f.3 scanning...
1046 12:20:45.938822 scan_bus: scanning of bus PCI: 00:1f.3 took 2851 usecs
1047 12:20:45.938922 PCI: 00:1f.4 scanning...
1048 12:20:45.942346 scan_generic_bus for PCI: 00:1f.4
1049 12:20:45.948478 scan_generic_bus for PCI: 00:1f.4 done
1050 12:20:45.951920 scan_bus: scanning of bus PCI: 00:1f.4 took 10185 usecs
1051 12:20:45.955589 PCI: 00:1f.5 scanning...
1052 12:20:45.958610 scan_generic_bus for PCI: 00:1f.5
1053 12:20:45.962232 scan_generic_bus for PCI: 00:1f.5 done
1054 12:20:45.968377 scan_bus: scanning of bus PCI: 00:1f.5 took 10183 usecs
1055 12:20:45.975004 scan_bus: scanning of bus DOMAIN: 0000 took 604842 usecs
1056 12:20:45.978548 scan_static_bus for Root Device done
1057 12:20:45.985077 scan_bus: scanning of bus Root Device took 624711 usecs
1058 12:20:45.985176 done
1059 12:20:45.988440 Chrome EC: UHEPI supported
1060 12:20:45.995075 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1061 12:20:45.998337 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1062 12:20:46.004960 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1063 12:20:46.012072 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1064 12:20:46.015064 SPI flash protection: WPSW=0 SRP0=0
1065 12:20:46.021694 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1066 12:20:46.024833 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1067 12:20:46.028365 found VGA at PCI: 00:02.0
1068 12:20:46.031357 Setting up VGA for PCI: 00:02.0
1069 12:20:46.038548 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1070 12:20:46.041810 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1071 12:20:46.045084 Allocating resources...
1072 12:20:46.048104 Reading resources...
1073 12:20:46.051768 Root Device read_resources bus 0 link: 0
1074 12:20:46.054815 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1075 12:20:46.061160 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1076 12:20:46.064842 DOMAIN: 0000 read_resources bus 0 link: 0
1077 12:20:46.072049 PCI: 00:14.0 read_resources bus 0 link: 0
1078 12:20:46.075104 USB0 port 0 read_resources bus 0 link: 0
1079 12:20:46.083720 USB0 port 0 read_resources bus 0 link: 0 done
1080 12:20:46.086590 PCI: 00:14.0 read_resources bus 0 link: 0 done
1081 12:20:46.094368 PCI: 00:15.0 read_resources bus 1 link: 0
1082 12:20:46.097796 PCI: 00:15.0 read_resources bus 1 link: 0 done
1083 12:20:46.104212 PCI: 00:15.1 read_resources bus 2 link: 0
1084 12:20:46.107044 PCI: 00:15.1 read_resources bus 2 link: 0 done
1085 12:20:46.115287 PCI: 00:19.0 read_resources bus 3 link: 0
1086 12:20:46.121306 PCI: 00:19.0 read_resources bus 3 link: 0 done
1087 12:20:46.124808 PCI: 00:1d.0 read_resources bus 1 link: 0
1088 12:20:46.131059 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1089 12:20:46.134466 PCI: 00:1e.2 read_resources bus 4 link: 0
1090 12:20:46.141458 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1091 12:20:46.144208 PCI: 00:1e.3 read_resources bus 5 link: 0
1092 12:20:46.150930 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1093 12:20:46.154481 PCI: 00:1f.0 read_resources bus 0 link: 0
1094 12:20:46.160734 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1095 12:20:46.167337 DOMAIN: 0000 read_resources bus 0 link: 0 done
1096 12:20:46.170709 Root Device read_resources bus 0 link: 0 done
1097 12:20:46.174301 Done reading resources.
1098 12:20:46.181046 Show resources in subtree (Root Device)...After reading.
1099 12:20:46.183740 Root Device child on link 0 CPU_CLUSTER: 0
1100 12:20:46.187358 CPU_CLUSTER: 0 child on link 0 APIC: 00
1101 12:20:46.190777 APIC: 00
1102 12:20:46.190875 APIC: 03
1103 12:20:46.190954 APIC: 01
1104 12:20:46.194220 APIC: 02
1105 12:20:46.194318 APIC: 04
1106 12:20:46.197047 APIC: 05
1107 12:20:46.197146 APIC: 06
1108 12:20:46.197226 APIC: 07
1109 12:20:46.203834 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1110 12:20:46.210577 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1111 12:20:46.260482 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1112 12:20:46.260594 PCI: 00:00.0
1113 12:20:46.261748 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1114 12:20:46.262426 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1115 12:20:46.262902 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1116 12:20:46.263175 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1117 12:20:46.310084 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1118 12:20:46.310388 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1119 12:20:46.311217 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1120 12:20:46.311514 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1121 12:20:46.311795 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1122 12:20:46.314816 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1123 12:20:46.325131 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1124 12:20:46.334823 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1125 12:20:46.344424 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1126 12:20:46.354353 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1127 12:20:46.364591 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1128 12:20:46.374189 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1129 12:20:46.374291 PCI: 00:02.0
1130 12:20:46.384432 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1131 12:20:46.394118 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1132 12:20:46.404117 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1133 12:20:46.404218 PCI: 00:04.0
1134 12:20:46.407193 PCI: 00:08.0
1135 12:20:46.417151 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1136 12:20:46.417251 PCI: 00:12.0
1137 12:20:46.427222 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 12:20:46.433764 PCI: 00:14.0 child on link 0 USB0 port 0
1139 12:20:46.443592 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1140 12:20:46.446946 USB0 port 0 child on link 0 USB2 port 0
1141 12:20:46.450446 USB2 port 0
1142 12:20:46.450546 USB2 port 1
1143 12:20:46.453895 USB2 port 2
1144 12:20:46.453994 USB2 port 3
1145 12:20:46.456762 USB2 port 5
1146 12:20:46.456861 USB2 port 6
1147 12:20:46.460391 USB2 port 9
1148 12:20:46.460490 USB3 port 0
1149 12:20:46.463419 USB3 port 1
1150 12:20:46.463518 USB3 port 2
1151 12:20:46.466948 USB3 port 3
1152 12:20:46.467048 USB3 port 4
1153 12:20:46.469970 PCI: 00:14.2
1154 12:20:46.480146 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1155 12:20:46.489895 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1156 12:20:46.489995 PCI: 00:14.3
1157 12:20:46.500063 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1158 12:20:46.506377 PCI: 00:15.0 child on link 0 I2C: 01:15
1159 12:20:46.516108 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1160 12:20:46.516208 I2C: 01:15
1161 12:20:46.522545 PCI: 00:15.1 child on link 0 I2C: 02:5d
1162 12:20:46.532832 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1163 12:20:46.532937 I2C: 02:5d
1164 12:20:46.535950 GENERIC: 0.0
1165 12:20:46.536049 PCI: 00:16.0
1166 12:20:46.545721 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1167 12:20:46.549668 PCI: 00:17.0
1168 12:20:46.555632 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1169 12:20:46.565760 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1170 12:20:46.575440 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1171 12:20:46.582342 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1172 12:20:46.592412 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1173 12:20:46.598980 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1174 12:20:46.605504 PCI: 00:19.0 child on link 0 I2C: 03:1a
1175 12:20:46.615328 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1176 12:20:46.615429 I2C: 03:1a
1177 12:20:46.618937 I2C: 03:38
1178 12:20:46.619036 I2C: 03:39
1179 12:20:46.619125 I2C: 03:3a
1180 12:20:46.622179 I2C: 03:3b
1181 12:20:46.625224 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1182 12:20:46.635128 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1183 12:20:46.645182 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1184 12:20:46.655455 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1185 12:20:46.655553 PCI: 01:00.0
1186 12:20:46.665449 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1187 12:20:46.668276 PCI: 00:1e.0
1188 12:20:46.678364 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1189 12:20:46.688366 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1190 12:20:46.691472 PCI: 00:1e.2 child on link 0 SPI: 00
1191 12:20:46.701169 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1192 12:20:46.704546 SPI: 00
1193 12:20:46.708232 PCI: 00:1e.3 child on link 0 SPI: 01
1194 12:20:46.717750 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1195 12:20:46.717849 SPI: 01
1196 12:20:46.721649 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1197 12:20:46.731079 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1198 12:20:46.741354 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1199 12:20:46.741453 PNP: 0c09.0
1200 12:20:46.751229 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1201 12:20:46.751328 PCI: 00:1f.3
1202 12:20:46.761084 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1203 12:20:46.771075 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1204 12:20:46.773900 PCI: 00:1f.4
1205 12:20:46.784068 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1206 12:20:46.794059 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1207 12:20:46.794159 PCI: 00:1f.5
1208 12:20:46.803659 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1209 12:20:46.810439 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1210 12:20:46.817101 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1211 12:20:46.824003 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1212 12:20:46.826993 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1213 12:20:46.830574 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1214 12:20:46.833583 PCI: 00:17.0 18 * [0x60 - 0x67] io
1215 12:20:46.837262 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1216 12:20:46.843766 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1217 12:20:46.850113 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1218 12:20:46.860039 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1219 12:20:46.866895 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1220 12:20:46.873150 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1221 12:20:46.876575 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1222 12:20:46.886731 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1223 12:20:46.889925 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1224 12:20:46.896423 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1225 12:20:46.899889 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1226 12:20:46.906701 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1227 12:20:46.909715 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1228 12:20:46.916445 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1229 12:20:46.919454 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1230 12:20:46.922875 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1231 12:20:46.929390 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1232 12:20:46.932923 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1233 12:20:46.939843 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1234 12:20:46.943064 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1235 12:20:46.949649 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1236 12:20:46.953074 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1237 12:20:46.959189 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1238 12:20:46.962349 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1239 12:20:46.969356 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1240 12:20:46.972863 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1241 12:20:46.979427 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1242 12:20:46.982680 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1243 12:20:46.989199 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1244 12:20:46.992668 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1245 12:20:46.999012 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1246 12:20:47.005556 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1247 12:20:47.009054 avoid_fixed_resources: DOMAIN: 0000
1248 12:20:47.015773 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1249 12:20:47.022240 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1250 12:20:47.028562 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1251 12:20:47.035584 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1252 12:20:47.045221 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1253 12:20:47.051968 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1254 12:20:47.058361 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1255 12:20:47.068254 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1256 12:20:47.075309 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1257 12:20:47.081966 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1258 12:20:47.088219 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1259 12:20:47.098088 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1260 12:20:47.098183 Setting resources...
1261 12:20:47.105015 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1262 12:20:47.108300 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1263 12:20:47.115004 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1264 12:20:47.117884 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1265 12:20:47.121405 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1266 12:20:47.128031 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1267 12:20:47.134665 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1268 12:20:47.141365 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1269 12:20:47.147924 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1270 12:20:47.154432 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1271 12:20:47.157535 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1272 12:20:47.164236 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1273 12:20:47.167766 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1274 12:20:47.174015 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1275 12:20:47.177313 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1276 12:20:47.180962 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1277 12:20:47.187510 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1278 12:20:47.190837 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1279 12:20:47.197364 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1280 12:20:47.200351 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1281 12:20:47.207498 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1282 12:20:47.210370 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1283 12:20:47.216986 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1284 12:20:47.220626 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1285 12:20:47.227077 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1286 12:20:47.230129 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1287 12:20:47.236995 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1288 12:20:47.240749 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1289 12:20:47.246901 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1290 12:20:47.250651 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1291 12:20:47.256644 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1292 12:20:47.260324 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1293 12:20:47.266862 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1294 12:20:47.273473 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1295 12:20:47.283479 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1296 12:20:47.289641 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1297 12:20:47.293447 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1298 12:20:47.302888 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1299 12:20:47.306455 Root Device assign_resources, bus 0 link: 0
1300 12:20:47.309771 DOMAIN: 0000 assign_resources, bus 0 link: 0
1301 12:20:47.320447 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1302 12:20:47.326610 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1303 12:20:47.336217 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1304 12:20:47.343290 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1305 12:20:47.353332 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1306 12:20:47.359687 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1307 12:20:47.366153 PCI: 00:14.0 assign_resources, bus 0 link: 0
1308 12:20:47.369697 PCI: 00:14.0 assign_resources, bus 0 link: 0
1309 12:20:47.379665 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1310 12:20:47.386100 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1311 12:20:47.396048 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1312 12:20:47.402475 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1313 12:20:47.405583 PCI: 00:15.0 assign_resources, bus 1 link: 0
1314 12:20:47.412332 PCI: 00:15.0 assign_resources, bus 1 link: 0
1315 12:20:47.419219 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1316 12:20:47.425701 PCI: 00:15.1 assign_resources, bus 2 link: 0
1317 12:20:47.429343 PCI: 00:15.1 assign_resources, bus 2 link: 0
1318 12:20:47.438917 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1319 12:20:47.445588 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1320 12:20:47.452209 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1321 12:20:47.461779 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1322 12:20:47.468574 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1323 12:20:47.475050 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1324 12:20:47.485627 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1325 12:20:47.491623 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1326 12:20:47.498098 PCI: 00:19.0 assign_resources, bus 3 link: 0
1327 12:20:47.501765 PCI: 00:19.0 assign_resources, bus 3 link: 0
1328 12:20:47.511521 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1329 12:20:47.518273 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1330 12:20:47.528073 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1331 12:20:47.531556 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1332 12:20:47.541222 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1333 12:20:47.544197 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 12:20:47.554456 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1335 12:20:47.560815 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1336 12:20:47.567553 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1337 12:20:47.570519 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1338 12:20:47.580957 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1339 12:20:47.583769 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1340 12:20:47.587623 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1341 12:20:47.594452 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1342 12:20:47.597610 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1343 12:20:47.604211 LPC: Trying to open IO window from 800 size 1ff
1344 12:20:47.610686 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1345 12:20:47.620540 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1346 12:20:47.627369 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1347 12:20:47.637051 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1348 12:20:47.640395 DOMAIN: 0000 assign_resources, bus 0 link: 0
1349 12:20:47.646702 Root Device assign_resources, bus 0 link: 0
1350 12:20:47.646799 Done setting resources.
1351 12:20:47.653455 Show resources in subtree (Root Device)...After assigning values.
1352 12:20:47.660218 Root Device child on link 0 CPU_CLUSTER: 0
1353 12:20:47.664007 CPU_CLUSTER: 0 child on link 0 APIC: 00
1354 12:20:47.664105 APIC: 00
1355 12:20:47.667014 APIC: 03
1356 12:20:47.667120 APIC: 01
1357 12:20:47.667199 APIC: 02
1358 12:20:47.670176 APIC: 04
1359 12:20:47.670270 APIC: 05
1360 12:20:47.673260 APIC: 06
1361 12:20:47.673354 APIC: 07
1362 12:20:47.676781 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1363 12:20:47.686188 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1364 12:20:47.699888 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1365 12:20:47.699983 PCI: 00:00.0
1366 12:20:47.709708 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1367 12:20:47.719290 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1368 12:20:47.729738 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1369 12:20:47.739044 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1370 12:20:47.746277 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1371 12:20:47.755894 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1372 12:20:47.765725 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1373 12:20:47.775583 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1374 12:20:47.785773 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1375 12:20:47.791915 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1376 12:20:47.801891 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1377 12:20:47.812108 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1378 12:20:47.821836 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1379 12:20:47.831897 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1380 12:20:47.841931 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1381 12:20:47.851465 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1382 12:20:47.851568 PCI: 00:02.0
1383 12:20:47.861385 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1384 12:20:47.871136 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1385 12:20:47.881868 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1386 12:20:47.884948 PCI: 00:04.0
1387 12:20:47.885049 PCI: 00:08.0
1388 12:20:47.894376 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1389 12:20:47.897967 PCI: 00:12.0
1390 12:20:47.908125 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1391 12:20:47.910919 PCI: 00:14.0 child on link 0 USB0 port 0
1392 12:20:47.921126 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1393 12:20:47.927763 USB0 port 0 child on link 0 USB2 port 0
1394 12:20:47.927866 USB2 port 0
1395 12:20:47.930803 USB2 port 1
1396 12:20:47.930905 USB2 port 2
1397 12:20:47.934699 USB2 port 3
1398 12:20:47.934800 USB2 port 5
1399 12:20:47.937451 USB2 port 6
1400 12:20:47.937553 USB2 port 9
1401 12:20:47.940946 USB3 port 0
1402 12:20:47.944306 USB3 port 1
1403 12:20:47.944408 USB3 port 2
1404 12:20:47.947521 USB3 port 3
1405 12:20:47.947622 USB3 port 4
1406 12:20:47.951003 PCI: 00:14.2
1407 12:20:47.960470 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1408 12:20:47.970341 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1409 12:20:47.970439 PCI: 00:14.3
1410 12:20:47.984084 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1411 12:20:47.986907 PCI: 00:15.0 child on link 0 I2C: 01:15
1412 12:20:47.996891 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1413 12:20:47.996989 I2C: 01:15
1414 12:20:48.003468 PCI: 00:15.1 child on link 0 I2C: 02:5d
1415 12:20:48.013790 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1416 12:20:48.013888 I2C: 02:5d
1417 12:20:48.016612 GENERIC: 0.0
1418 12:20:48.016710 PCI: 00:16.0
1419 12:20:48.026688 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1420 12:20:48.030159 PCI: 00:17.0
1421 12:20:48.040157 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1422 12:20:48.049763 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1423 12:20:48.059862 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1424 12:20:48.069512 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1425 12:20:48.076388 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1426 12:20:48.086485 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1427 12:20:48.093197 PCI: 00:19.0 child on link 0 I2C: 03:1a
1428 12:20:48.102611 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1429 12:20:48.102711 I2C: 03:1a
1430 12:20:48.106125 I2C: 03:38
1431 12:20:48.106222 I2C: 03:39
1432 12:20:48.109213 I2C: 03:3a
1433 12:20:48.109311 I2C: 03:3b
1434 12:20:48.116251 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1435 12:20:48.122783 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1436 12:20:48.132534 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1437 12:20:48.146042 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1438 12:20:48.146141 PCI: 01:00.0
1439 12:20:48.155645 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1440 12:20:48.159075 PCI: 00:1e.0
1441 12:20:48.168990 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1442 12:20:48.179005 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1443 12:20:48.182030 PCI: 00:1e.2 child on link 0 SPI: 00
1444 12:20:48.195663 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1445 12:20:48.195762 SPI: 00
1446 12:20:48.198606 PCI: 00:1e.3 child on link 0 SPI: 01
1447 12:20:48.208800 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1448 12:20:48.211928 SPI: 01
1449 12:20:48.215333 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1450 12:20:48.224994 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1451 12:20:48.231580 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1452 12:20:48.235041 PNP: 0c09.0
1453 12:20:48.241664 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1454 12:20:48.244680 PCI: 00:1f.3
1455 12:20:48.254673 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1456 12:20:48.264796 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1457 12:20:48.268087 PCI: 00:1f.4
1458 12:20:48.277993 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1459 12:20:48.288035 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1460 12:20:48.288136 PCI: 00:1f.5
1461 12:20:48.297499 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1462 12:20:48.300821 Done allocating resources.
1463 12:20:48.307491 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1464 12:20:48.311020 Enabling resources...
1465 12:20:48.313887 PCI: 00:00.0 subsystem <- 8086/9b61
1466 12:20:48.317487 PCI: 00:00.0 cmd <- 06
1467 12:20:48.320471 PCI: 00:02.0 subsystem <- 8086/9b41
1468 12:20:48.323997 PCI: 00:02.0 cmd <- 03
1469 12:20:48.324096 PCI: 00:08.0 cmd <- 06
1470 12:20:48.330641 PCI: 00:12.0 subsystem <- 8086/02f9
1471 12:20:48.330740 PCI: 00:12.0 cmd <- 02
1472 12:20:48.334176 PCI: 00:14.0 subsystem <- 8086/02ed
1473 12:20:48.336947 PCI: 00:14.0 cmd <- 02
1474 12:20:48.340488 PCI: 00:14.2 cmd <- 02
1475 12:20:48.343489 PCI: 00:14.3 subsystem <- 8086/02f0
1476 12:20:48.347028 PCI: 00:14.3 cmd <- 02
1477 12:20:48.350185 PCI: 00:15.0 subsystem <- 8086/02e8
1478 12:20:48.353867 PCI: 00:15.0 cmd <- 02
1479 12:20:48.356862 PCI: 00:15.1 subsystem <- 8086/02e9
1480 12:20:48.360565 PCI: 00:15.1 cmd <- 02
1481 12:20:48.363613 PCI: 00:16.0 subsystem <- 8086/02e0
1482 12:20:48.366938 PCI: 00:16.0 cmd <- 02
1483 12:20:48.370057 PCI: 00:17.0 subsystem <- 8086/02d3
1484 12:20:48.370157 PCI: 00:17.0 cmd <- 03
1485 12:20:48.376643 PCI: 00:19.0 subsystem <- 8086/02c5
1486 12:20:48.376743 PCI: 00:19.0 cmd <- 02
1487 12:20:48.380033 PCI: 00:1d.0 bridge ctrl <- 0013
1488 12:20:48.383697 PCI: 00:1d.0 subsystem <- 8086/02b0
1489 12:20:48.387197 PCI: 00:1d.0 cmd <- 06
1490 12:20:48.390449 PCI: 00:1e.0 subsystem <- 8086/02a8
1491 12:20:48.393485 PCI: 00:1e.0 cmd <- 06
1492 12:20:48.396730 PCI: 00:1e.2 subsystem <- 8086/02aa
1493 12:20:48.400057 PCI: 00:1e.2 cmd <- 06
1494 12:20:48.403049 PCI: 00:1e.3 subsystem <- 8086/02ab
1495 12:20:48.406781 PCI: 00:1e.3 cmd <- 02
1496 12:20:48.409881 PCI: 00:1f.0 subsystem <- 8086/0284
1497 12:20:48.413267 PCI: 00:1f.0 cmd <- 407
1498 12:20:48.416685 PCI: 00:1f.3 subsystem <- 8086/02c8
1499 12:20:48.419608 PCI: 00:1f.3 cmd <- 02
1500 12:20:48.423224 PCI: 00:1f.4 subsystem <- 8086/02a3
1501 12:20:48.426267 PCI: 00:1f.4 cmd <- 03
1502 12:20:48.429323 PCI: 00:1f.5 subsystem <- 8086/02a4
1503 12:20:48.432921 PCI: 00:1f.5 cmd <- 406
1504 12:20:48.440459 PCI: 01:00.0 cmd <- 02
1505 12:20:48.445999 done.
1506 12:20:48.457711 ME: Version: 14.0.39.1367
1507 12:20:48.464220 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1508 12:20:48.467853 Initializing devices...
1509 12:20:48.467953 Root Device init ...
1510 12:20:48.474171 Chrome EC: Set SMI mask to 0x0000000000000000
1511 12:20:48.477780 Chrome EC: clear events_b mask to 0x0000000000000000
1512 12:20:48.484462 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1513 12:20:48.491786 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1514 12:20:48.497681 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1515 12:20:48.500911 Chrome EC: Set WAKE mask to 0x0000000000000000
1516 12:20:48.504255 Root Device init finished in 35239 usecs
1517 12:20:48.507675 CPU_CLUSTER: 0 init ...
1518 12:20:48.514241 CPU_CLUSTER: 0 init finished in 2448 usecs
1519 12:20:48.518592 PCI: 00:00.0 init ...
1520 12:20:48.522161 CPU TDP: 15 Watts
1521 12:20:48.525171 CPU PL2 = 64 Watts
1522 12:20:48.528488 PCI: 00:00.0 init finished in 7084 usecs
1523 12:20:48.532049 PCI: 00:02.0 init ...
1524 12:20:48.535007 PCI: 00:02.0 init finished in 2254 usecs
1525 12:20:48.538093 PCI: 00:08.0 init ...
1526 12:20:48.542057 PCI: 00:08.0 init finished in 2252 usecs
1527 12:20:48.544735 PCI: 00:12.0 init ...
1528 12:20:48.548325 PCI: 00:12.0 init finished in 2253 usecs
1529 12:20:48.551715 PCI: 00:14.0 init ...
1530 12:20:48.554670 PCI: 00:14.0 init finished in 2243 usecs
1531 12:20:48.558449 PCI: 00:14.2 init ...
1532 12:20:48.561331 PCI: 00:14.2 init finished in 2252 usecs
1533 12:20:48.564968 PCI: 00:14.3 init ...
1534 12:20:48.568040 PCI: 00:14.3 init finished in 2272 usecs
1535 12:20:48.570990 PCI: 00:15.0 init ...
1536 12:20:48.574589 DW I2C bus 0 at 0xd121f000 (400 KHz)
1537 12:20:48.577667 PCI: 00:15.0 init finished in 5977 usecs
1538 12:20:48.581297 PCI: 00:15.1 init ...
1539 12:20:48.584535 DW I2C bus 1 at 0xd1220000 (400 KHz)
1540 12:20:48.591179 PCI: 00:15.1 init finished in 5979 usecs
1541 12:20:48.591278 PCI: 00:16.0 init ...
1542 12:20:48.597834 PCI: 00:16.0 init finished in 2244 usecs
1543 12:20:48.600964 PCI: 00:19.0 init ...
1544 12:20:48.604329 DW I2C bus 4 at 0xd1222000 (400 KHz)
1545 12:20:48.607718 PCI: 00:19.0 init finished in 5976 usecs
1546 12:20:48.611091 PCI: 00:1d.0 init ...
1547 12:20:48.614186 Initializing PCH PCIe bridge.
1548 12:20:48.617791 PCI: 00:1d.0 init finished in 5287 usecs
1549 12:20:48.620694 PCI: 00:1f.0 init ...
1550 12:20:48.624535 IOAPIC: Initializing IOAPIC at 0xfec00000
1551 12:20:48.630684 IOAPIC: Bootstrap Processor Local APIC = 0x00
1552 12:20:48.630783 IOAPIC: ID = 0x02
1553 12:20:48.634296 IOAPIC: Dumping registers
1554 12:20:48.637460 reg 0x0000: 0x02000000
1555 12:20:48.641043 reg 0x0001: 0x00770020
1556 12:20:48.641141 reg 0x0002: 0x00000000
1557 12:20:48.647074 PCI: 00:1f.0 init finished in 23548 usecs
1558 12:20:48.650662 PCI: 00:1f.4 init ...
1559 12:20:48.653743 PCI: 00:1f.4 init finished in 2263 usecs
1560 12:20:48.664668 PCI: 01:00.0 init ...
1561 12:20:48.668070 PCI: 01:00.0 init finished in 2254 usecs
1562 12:20:48.672438 PNP: 0c09.0 init ...
1563 12:20:48.675490 Google Chrome EC uptime: 11.052 seconds
1564 12:20:48.682012 Google Chrome AP resets since EC boot: 0
1565 12:20:48.685739 Google Chrome most recent AP reset causes:
1566 12:20:48.692074 Google Chrome EC reset flags at last EC boot: reset-pin
1567 12:20:48.695118 PNP: 0c09.0 init finished in 20569 usecs
1568 12:20:48.698887 Devices initialized
1569 12:20:48.702320 Show all devs... After init.
1570 12:20:48.702417 Root Device: enabled 1
1571 12:20:48.705062 CPU_CLUSTER: 0: enabled 1
1572 12:20:48.708478 DOMAIN: 0000: enabled 1
1573 12:20:48.708576 APIC: 00: enabled 1
1574 12:20:48.712253 PCI: 00:00.0: enabled 1
1575 12:20:48.715168 PCI: 00:02.0: enabled 1
1576 12:20:48.718339 PCI: 00:04.0: enabled 0
1577 12:20:48.718437 PCI: 00:05.0: enabled 0
1578 12:20:48.721995 PCI: 00:12.0: enabled 1
1579 12:20:48.724981 PCI: 00:12.5: enabled 0
1580 12:20:48.728241 PCI: 00:12.6: enabled 0
1581 12:20:48.728338 PCI: 00:14.0: enabled 1
1582 12:20:48.731610 PCI: 00:14.1: enabled 0
1583 12:20:48.735001 PCI: 00:14.3: enabled 1
1584 12:20:48.738128 PCI: 00:14.5: enabled 0
1585 12:20:48.738226 PCI: 00:15.0: enabled 1
1586 12:20:48.741372 PCI: 00:15.1: enabled 1
1587 12:20:48.744654 PCI: 00:15.2: enabled 0
1588 12:20:48.744753 PCI: 00:15.3: enabled 0
1589 12:20:48.747964 PCI: 00:16.0: enabled 1
1590 12:20:48.751346 PCI: 00:16.1: enabled 0
1591 12:20:48.754467 PCI: 00:16.2: enabled 0
1592 12:20:48.754566 PCI: 00:16.3: enabled 0
1593 12:20:48.758149 PCI: 00:16.4: enabled 0
1594 12:20:48.760962 PCI: 00:16.5: enabled 0
1595 12:20:48.764634 PCI: 00:17.0: enabled 1
1596 12:20:48.764732 PCI: 00:19.0: enabled 1
1597 12:20:48.767912 PCI: 00:19.1: enabled 0
1598 12:20:48.770863 PCI: 00:19.2: enabled 0
1599 12:20:48.774466 PCI: 00:1a.0: enabled 0
1600 12:20:48.774565 PCI: 00:1c.0: enabled 0
1601 12:20:48.777970 PCI: 00:1c.1: enabled 0
1602 12:20:48.781002 PCI: 00:1c.2: enabled 0
1603 12:20:48.784574 PCI: 00:1c.3: enabled 0
1604 12:20:48.784672 PCI: 00:1c.4: enabled 0
1605 12:20:48.787531 PCI: 00:1c.5: enabled 0
1606 12:20:48.791240 PCI: 00:1c.6: enabled 0
1607 12:20:48.794170 PCI: 00:1c.7: enabled 0
1608 12:20:48.794268 PCI: 00:1d.0: enabled 1
1609 12:20:48.797655 PCI: 00:1d.1: enabled 0
1610 12:20:48.800759 PCI: 00:1d.2: enabled 0
1611 12:20:48.800857 PCI: 00:1d.3: enabled 0
1612 12:20:48.803877 PCI: 00:1d.4: enabled 0
1613 12:20:48.807401 PCI: 00:1d.5: enabled 0
1614 12:20:48.810866 PCI: 00:1e.0: enabled 1
1615 12:20:48.810964 PCI: 00:1e.1: enabled 0
1616 12:20:48.814042 PCI: 00:1e.2: enabled 1
1617 12:20:48.817523 PCI: 00:1e.3: enabled 1
1618 12:20:48.820733 PCI: 00:1f.0: enabled 1
1619 12:20:48.820832 PCI: 00:1f.1: enabled 0
1620 12:20:48.823900 PCI: 00:1f.2: enabled 0
1621 12:20:48.826959 PCI: 00:1f.3: enabled 1
1622 12:20:48.830327 PCI: 00:1f.4: enabled 1
1623 12:20:48.830429 PCI: 00:1f.5: enabled 1
1624 12:20:48.833829 PCI: 00:1f.6: enabled 0
1625 12:20:48.836951 USB0 port 0: enabled 1
1626 12:20:48.837049 I2C: 01:15: enabled 1
1627 12:20:48.840469 I2C: 02:5d: enabled 1
1628 12:20:48.843665 GENERIC: 0.0: enabled 1
1629 12:20:48.846968 I2C: 03:1a: enabled 1
1630 12:20:48.847066 I2C: 03:38: enabled 1
1631 12:20:48.850242 I2C: 03:39: enabled 1
1632 12:20:48.853767 I2C: 03:3a: enabled 1
1633 12:20:48.853864 I2C: 03:3b: enabled 1
1634 12:20:48.856965 PCI: 00:00.0: enabled 1
1635 12:20:48.859949 SPI: 00: enabled 1
1636 12:20:48.860050 SPI: 01: enabled 1
1637 12:20:48.863555 PNP: 0c09.0: enabled 1
1638 12:20:48.866711 USB2 port 0: enabled 1
1639 12:20:48.866809 USB2 port 1: enabled 1
1640 12:20:48.869808 USB2 port 2: enabled 0
1641 12:20:48.873300 USB2 port 3: enabled 0
1642 12:20:48.873399 USB2 port 5: enabled 0
1643 12:20:48.876330 USB2 port 6: enabled 1
1644 12:20:48.879824 USB2 port 9: enabled 1
1645 12:20:48.883492 USB3 port 0: enabled 1
1646 12:20:48.883590 USB3 port 1: enabled 1
1647 12:20:48.886705 USB3 port 2: enabled 1
1648 12:20:48.889620 USB3 port 3: enabled 1
1649 12:20:48.889718 USB3 port 4: enabled 0
1650 12:20:48.893267 APIC: 03: enabled 1
1651 12:20:48.896133 APIC: 01: enabled 1
1652 12:20:48.896231 APIC: 02: enabled 1
1653 12:20:48.899658 APIC: 04: enabled 1
1654 12:20:48.899756 APIC: 05: enabled 1
1655 12:20:48.902699 APIC: 06: enabled 1
1656 12:20:48.906164 APIC: 07: enabled 1
1657 12:20:48.906263 PCI: 00:08.0: enabled 1
1658 12:20:48.909769 PCI: 00:14.2: enabled 1
1659 12:20:48.912650 PCI: 01:00.0: enabled 1
1660 12:20:48.916034 Disabling ACPI via APMC:
1661 12:20:48.919615 done.
1662 12:20:48.922824 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1663 12:20:48.926376 ELOG: NV offset 0xaf0000 size 0x4000
1664 12:20:48.933440 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1665 12:20:48.940697 ELOG: Event(17) added with size 13 at 2023-03-22 12:20:48 UTC
1666 12:20:48.947267 ELOG: Event(92) added with size 9 at 2023-03-22 12:20:48 UTC
1667 12:20:48.953697 ELOG: Event(93) added with size 9 at 2023-03-22 12:20:48 UTC
1668 12:20:48.960314 ELOG: Event(9A) added with size 9 at 2023-03-22 12:20:48 UTC
1669 12:20:48.966984 ELOG: Event(9E) added with size 10 at 2023-03-22 12:20:48 UTC
1670 12:20:48.973580 ELOG: Event(9F) added with size 14 at 2023-03-22 12:20:48 UTC
1671 12:20:48.976679 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1672 12:20:48.984478 ELOG: Event(A1) added with size 10 at 2023-03-22 12:20:48 UTC
1673 12:20:48.994183 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1674 12:20:49.000595 ELOG: Event(A0) added with size 9 at 2023-03-22 12:20:49 UTC
1675 12:20:49.007397 ELOG: Event(16) added with size 11 at 2023-03-22 12:20:49 UTC
1676 12:20:49.010780 Erasing flash addr af0000 + 4 KiB
1677 12:20:49.072125 elog_add_boot_reason: Logged dev mode boot
1678 12:20:49.072235 Finalize devices...
1679 12:20:49.075817 PCI: 00:17.0 final
1680 12:20:49.078814 Devices finalized
1681 12:20:49.082559 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1682 12:20:49.089126 BS: BS_POST_DEVICE times (ms): entry 51 run 0 exit 0
1683 12:20:49.092192 ME: HFSTS1 : 0x90000245
1684 12:20:49.095192 ME: HFSTS2 : 0x3B850126
1685 12:20:49.101772 ME: HFSTS3 : 0x00000020
1686 12:20:49.105274 ME: HFSTS4 : 0x00004800
1687 12:20:49.108931 ME: HFSTS5 : 0x00000000
1688 12:20:49.112336 ME: HFSTS6 : 0x40400006
1689 12:20:49.115265 ME: Manufacturing Mode : NO
1690 12:20:49.118883 ME: FW Partition Table : OK
1691 12:20:49.121979 ME: Bringup Loader Failure : NO
1692 12:20:49.125589 ME: Firmware Init Complete : YES
1693 12:20:49.128916 ME: Boot Options Present : NO
1694 12:20:49.132451 ME: Update In Progress : NO
1695 12:20:49.135102 ME: D0i3 Support : YES
1696 12:20:49.138322 ME: Low Power State Enabled : NO
1697 12:20:49.141509 ME: CPU Replaced : NO
1698 12:20:49.144785 ME: CPU Replacement Valid : YES
1699 12:20:49.148044 ME: Current Working State : 5
1700 12:20:49.151413 ME: Current Operation State : 1
1701 12:20:49.154884 ME: Current Operation Mode : 0
1702 12:20:49.158017 ME: Error Code : 0
1703 12:20:49.161469 ME: CPU Debug Disabled : YES
1704 12:20:49.164800 ME: TXT Support : NO
1705 12:20:49.171653 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1706 12:20:49.178068 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1707 12:20:49.178168 CBFS @ c08000 size 3f8000
1708 12:20:49.185111 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1709 12:20:49.187783 CBFS: Locating 'fallback/dsdt.aml'
1710 12:20:49.191507 CBFS: Found @ offset 10bb80 size 3fa5
1711 12:20:49.197628 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1712 12:20:49.201184 CBFS @ c08000 size 3f8000
1713 12:20:49.204546 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1714 12:20:49.207822 CBFS: Locating 'fallback/slic'
1715 12:20:49.216088 CBFS: 'fallback/slic' not found.
1716 12:20:49.220000 ACPI: Writing ACPI tables at 99b3e000.
1717 12:20:49.220097 ACPI: * FACS
1718 12:20:49.222753 ACPI: * DSDT
1719 12:20:49.226464 Ramoops buffer: 0x100000@0x99a3d000.
1720 12:20:49.229555 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1721 12:20:49.236258 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1722 12:20:49.239230 Google Chrome EC: version:
1723 12:20:49.242699 ro: helios_v2.0.2659-56403530b
1724 12:20:49.245605 rw: helios_v2.0.2849-c41de27e7d
1725 12:20:49.245703 running image: 1
1726 12:20:49.250270 ACPI: * FADT
1727 12:20:49.250367 SCI is IRQ9
1728 12:20:49.257022 ACPI: added table 1/32, length now 40
1729 12:20:49.257119 ACPI: * SSDT
1730 12:20:49.260552 Found 1 CPU(s) with 8 core(s) each.
1731 12:20:49.263601 Error: Could not locate 'wifi_sar' in VPD.
1732 12:20:49.270055 Checking CBFS for default SAR values
1733 12:20:49.273144 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1734 12:20:49.276899 CBFS @ c08000 size 3f8000
1735 12:20:49.283310 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1736 12:20:49.286269 CBFS: Locating 'wifi_sar_defaults.hex'
1737 12:20:49.289936 CBFS: Found @ offset 5fac0 size 77
1738 12:20:49.293383 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1739 12:20:49.300164 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1740 12:20:49.302941 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1741 12:20:49.309911 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1742 12:20:49.312897 failed to find key in VPD: dsm_calib_r0_0
1743 12:20:49.322635 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1744 12:20:49.325854 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1745 12:20:49.332719 failed to find key in VPD: dsm_calib_r0_1
1746 12:20:49.339543 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1747 12:20:49.346032 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1748 12:20:49.349709 failed to find key in VPD: dsm_calib_r0_2
1749 12:20:49.358914 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1750 12:20:49.362159 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1751 12:20:49.368780 failed to find key in VPD: dsm_calib_r0_3
1752 12:20:49.375497 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1753 12:20:49.382212 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1754 12:20:49.384940 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1755 12:20:49.391692 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1756 12:20:49.395079 EC returned error result code 1
1757 12:20:49.399103 EC returned error result code 1
1758 12:20:49.402249 EC returned error result code 1
1759 12:20:49.405819 PS2K: Bad resp from EC. Vivaldi disabled!
1760 12:20:49.412463 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1761 12:20:49.419033 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1762 12:20:49.421922 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1763 12:20:49.429022 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1764 12:20:49.435298 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1765 12:20:49.438400 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1766 12:20:49.444915 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1767 12:20:49.451881 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1768 12:20:49.454737 ACPI: added table 2/32, length now 44
1769 12:20:49.458339 ACPI: * MCFG
1770 12:20:49.461804 ACPI: added table 3/32, length now 48
1771 12:20:49.461903 ACPI: * TPM2
1772 12:20:49.464924 TPM2 log created at 99a2d000
1773 12:20:49.468302 ACPI: added table 4/32, length now 52
1774 12:20:49.471627 ACPI: * MADT
1775 12:20:49.471722 SCI is IRQ9
1776 12:20:49.474838 ACPI: added table 5/32, length now 56
1777 12:20:49.477853 current = 99b43ac0
1778 12:20:49.477950 ACPI: * DMAR
1779 12:20:49.484415 ACPI: added table 6/32, length now 60
1780 12:20:49.484513 ACPI: * IGD OpRegion
1781 12:20:49.487970 GMA: Found VBT in CBFS
1782 12:20:49.491422 GMA: Found valid VBT in CBFS
1783 12:20:49.494769 ACPI: added table 7/32, length now 64
1784 12:20:49.497735 ACPI: * HPET
1785 12:20:49.501281 ACPI: added table 8/32, length now 68
1786 12:20:49.501378 ACPI: done.
1787 12:20:49.504622 ACPI tables: 31744 bytes.
1788 12:20:49.508139 smbios_write_tables: 99a2c000
1789 12:20:49.511546 EC returned error result code 3
1790 12:20:49.514951 Couldn't obtain OEM name from CBI
1791 12:20:49.518219 Create SMBIOS type 17
1792 12:20:49.521112 PCI: 00:00.0 (Intel Cannonlake)
1793 12:20:49.524607 PCI: 00:14.3 (Intel WiFi)
1794 12:20:49.524703 SMBIOS tables: 939 bytes.
1795 12:20:49.531362 Writing table forward entry at 0x00000500
1796 12:20:49.534273 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1797 12:20:49.540986 Writing coreboot table at 0x99b62000
1798 12:20:49.544809 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1799 12:20:49.550903 1. 0000000000001000-000000000009ffff: RAM
1800 12:20:49.554538 2. 00000000000a0000-00000000000fffff: RESERVED
1801 12:20:49.558004 3. 0000000000100000-0000000099a2bfff: RAM
1802 12:20:49.564148 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1803 12:20:49.570621 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1804 12:20:49.574183 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1805 12:20:49.580677 7. 000000009a000000-000000009f7fffff: RESERVED
1806 12:20:49.584114 8. 00000000e0000000-00000000efffffff: RESERVED
1807 12:20:49.590226 9. 00000000fc000000-00000000fc000fff: RESERVED
1808 12:20:49.593466 10. 00000000fe000000-00000000fe00ffff: RESERVED
1809 12:20:49.600623 11. 00000000fed10000-00000000fed17fff: RESERVED
1810 12:20:49.603949 12. 00000000fed80000-00000000fed83fff: RESERVED
1811 12:20:49.610749 13. 00000000fed90000-00000000fed91fff: RESERVED
1812 12:20:49.613642 14. 00000000feda0000-00000000feda1fff: RESERVED
1813 12:20:49.616689 15. 0000000100000000-000000045e7fffff: RAM
1814 12:20:49.623475 Graphics framebuffer located at 0xc0000000
1815 12:20:49.623572 Passing 5 GPIOs to payload:
1816 12:20:49.630452 NAME | PORT | POLARITY | VALUE
1817 12:20:49.636512 write protect | undefined | high | low
1818 12:20:49.639544 lid | undefined | high | high
1819 12:20:49.646203 power | undefined | high | low
1820 12:20:49.649922 oprom | undefined | high | low
1821 12:20:49.656235 EC in RW | 0x000000cb | high | low
1822 12:20:49.656332 Board ID: 4
1823 12:20:49.662725 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1824 12:20:49.666563 CBFS @ c08000 size 3f8000
1825 12:20:49.669490 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1826 12:20:49.675905 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1827 12:20:49.679352 coreboot table: 1492 bytes.
1828 12:20:49.682617 IMD ROOT 0. 99fff000 00001000
1829 12:20:49.686478 IMD SMALL 1. 99ffe000 00001000
1830 12:20:49.689239 FSP MEMORY 2. 99c4e000 003b0000
1831 12:20:49.692704 CONSOLE 3. 99c2e000 00020000
1832 12:20:49.696000 FMAP 4. 99c2d000 0000054e
1833 12:20:49.699206 TIME STAMP 5. 99c2c000 00000910
1834 12:20:49.702627 VBOOT WORK 6. 99c18000 00014000
1835 12:20:49.706114 MRC DATA 7. 99c16000 00001958
1836 12:20:49.709369 ROMSTG STCK 8. 99c15000 00001000
1837 12:20:49.712591 AFTER CAR 9. 99c0b000 0000a000
1838 12:20:49.715826 RAMSTAGE 10. 99baf000 0005c000
1839 12:20:49.719253 REFCODE 11. 99b7a000 00035000
1840 12:20:49.722616 SMM BACKUP 12. 99b6a000 00010000
1841 12:20:49.726017 COREBOOT 13. 99b62000 00008000
1842 12:20:49.729212 ACPI 14. 99b3e000 00024000
1843 12:20:49.732509 ACPI GNVS 15. 99b3d000 00001000
1844 12:20:49.736187 RAMOOPS 16. 99a3d000 00100000
1845 12:20:49.739206 TPM2 TCGLOG17. 99a2d000 00010000
1846 12:20:49.742300 SMBIOS 18. 99a2c000 00000800
1847 12:20:49.745716 IMD small region:
1848 12:20:49.749161 IMD ROOT 0. 99ffec00 00000400
1849 12:20:49.752344 FSP RUNTIME 1. 99ffebe0 00000004
1850 12:20:49.755344 EC HOSTEVENT 2. 99ffebc0 00000008
1851 12:20:49.759004 POWER STATE 3. 99ffeb80 00000040
1852 12:20:49.762487 ROMSTAGE 4. 99ffeb60 00000004
1853 12:20:49.765691 MEM INFO 5. 99ffe9a0 000001b9
1854 12:20:49.768604 VPD 6. 99ffe920 0000006c
1855 12:20:49.772122 MTRR: Physical address space:
1856 12:20:49.778680 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1857 12:20:49.785632 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1858 12:20:49.791940 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1859 12:20:49.798579 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1860 12:20:49.805366 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1861 12:20:49.812159 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1862 12:20:49.815017 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1863 12:20:49.822250 MTRR: Fixed MSR 0x250 0x0606060606060606
1864 12:20:49.824813 MTRR: Fixed MSR 0x258 0x0606060606060606
1865 12:20:49.828326 MTRR: Fixed MSR 0x259 0x0000000000000000
1866 12:20:49.831767 MTRR: Fixed MSR 0x268 0x0606060606060606
1867 12:20:49.838526 MTRR: Fixed MSR 0x269 0x0606060606060606
1868 12:20:49.841321 MTRR: Fixed MSR 0x26a 0x0606060606060606
1869 12:20:49.844855 MTRR: Fixed MSR 0x26b 0x0606060606060606
1870 12:20:49.847825 MTRR: Fixed MSR 0x26c 0x0606060606060606
1871 12:20:49.854478 MTRR: Fixed MSR 0x26d 0x0606060606060606
1872 12:20:49.858172 MTRR: Fixed MSR 0x26e 0x0606060606060606
1873 12:20:49.861457 MTRR: Fixed MSR 0x26f 0x0606060606060606
1874 12:20:49.864785 call enable_fixed_mtrr()
1875 12:20:49.868119 CPU physical address size: 39 bits
1876 12:20:49.871195 MTRR: default type WB/UC MTRR counts: 6/8.
1877 12:20:49.877647 MTRR: WB selected as default type.
1878 12:20:49.881240 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1879 12:20:49.887879 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1880 12:20:49.894474 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1881 12:20:49.900842 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1882 12:20:49.907566 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1883 12:20:49.913818 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1884 12:20:49.917183 MTRR: Fixed MSR 0x250 0x0606060606060606
1885 12:20:49.924211 MTRR: Fixed MSR 0x258 0x0606060606060606
1886 12:20:49.927390 MTRR: Fixed MSR 0x259 0x0000000000000000
1887 12:20:49.931018 MTRR: Fixed MSR 0x268 0x0606060606060606
1888 12:20:49.933953 MTRR: Fixed MSR 0x269 0x0606060606060606
1889 12:20:49.940397 MTRR: Fixed MSR 0x26a 0x0606060606060606
1890 12:20:49.944088 MTRR: Fixed MSR 0x26b 0x0606060606060606
1891 12:20:49.946941 MTRR: Fixed MSR 0x26c 0x0606060606060606
1892 12:20:49.950543 MTRR: Fixed MSR 0x26d 0x0606060606060606
1893 12:20:49.956925 MTRR: Fixed MSR 0x26e 0x0606060606060606
1894 12:20:49.960545 MTRR: Fixed MSR 0x26f 0x0606060606060606
1895 12:20:49.960646
1896 12:20:49.960748 MTRR check
1897 12:20:49.963553 call enable_fixed_mtrr()
1898 12:20:49.967067 Fixed MTRRs : Enabled
1899 12:20:49.967178 Variable MTRRs: Enabled
1900 12:20:49.970046
1901 12:20:49.973447 CPU physical address size: 39 bits
1902 12:20:49.976815 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1903 12:20:49.983344 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 12:20:49.986979 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 12:20:49.990154 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 12:20:49.993136 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 12:20:49.996839 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 12:20:50.003498 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 12:20:50.006890 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 12:20:50.009957 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 12:20:50.013145 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 12:20:50.019595 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 12:20:50.022826 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 12:20:50.026162 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 12:20:50.033304 MTRR: Fixed MSR 0x258 0x0606060606060606
1916 12:20:50.033406 call enable_fixed_mtrr()
1917 12:20:50.039839 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 12:20:50.042728 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 12:20:50.046119 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 12:20:50.049064 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 12:20:50.052694 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 12:20:50.059299 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 12:20:50.062321 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 12:20:50.065927 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 12:20:50.069431 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 12:20:50.075438 CPU physical address size: 39 bits
1927 12:20:50.075574 call enable_fixed_mtrr()
1928 12:20:50.082527 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 12:20:50.085379 MTRR: Fixed MSR 0x250 0x0606060606060606
1930 12:20:50.089010 MTRR: Fixed MSR 0x258 0x0606060606060606
1931 12:20:50.092033 MTRR: Fixed MSR 0x259 0x0000000000000000
1932 12:20:50.099124 MTRR: Fixed MSR 0x268 0x0606060606060606
1933 12:20:50.101934 MTRR: Fixed MSR 0x269 0x0606060606060606
1934 12:20:50.105566 MTRR: Fixed MSR 0x26a 0x0606060606060606
1935 12:20:50.108694 MTRR: Fixed MSR 0x26b 0x0606060606060606
1936 12:20:50.115604 MTRR: Fixed MSR 0x26c 0x0606060606060606
1937 12:20:50.118868 MTRR: Fixed MSR 0x26d 0x0606060606060606
1938 12:20:50.121951 MTRR: Fixed MSR 0x26e 0x0606060606060606
1939 12:20:50.125171 MTRR: Fixed MSR 0x26f 0x0606060606060606
1940 12:20:50.132293 MTRR: Fixed MSR 0x258 0x0606060606060606
1941 12:20:50.132395 call enable_fixed_mtrr()
1942 12:20:50.138803 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 12:20:50.142046 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 12:20:50.145165 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 12:20:50.148677 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 12:20:50.154915 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 12:20:50.158572 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 12:20:50.161595 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 12:20:50.165185 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 12:20:50.168165 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 12:20:50.175880 CPU physical address size: 39 bits
1952 12:20:50.178476 call enable_fixed_mtrr()
1953 12:20:50.181493 MTRR: Fixed MSR 0x250 0x0606060606060606
1954 12:20:50.184975 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 12:20:50.188133 MTRR: Fixed MSR 0x258 0x0606060606060606
1956 12:20:50.191567 MTRR: Fixed MSR 0x259 0x0000000000000000
1957 12:20:50.197893 MTRR: Fixed MSR 0x268 0x0606060606060606
1958 12:20:50.201463 MTRR: Fixed MSR 0x269 0x0606060606060606
1959 12:20:50.204510 MTRR: Fixed MSR 0x26a 0x0606060606060606
1960 12:20:50.208195 MTRR: Fixed MSR 0x26b 0x0606060606060606
1961 12:20:50.214875 MTRR: Fixed MSR 0x26c 0x0606060606060606
1962 12:20:50.217931 MTRR: Fixed MSR 0x26d 0x0606060606060606
1963 12:20:50.220961 MTRR: Fixed MSR 0x26e 0x0606060606060606
1964 12:20:50.224646 MTRR: Fixed MSR 0x26f 0x0606060606060606
1965 12:20:50.231113 MTRR: Fixed MSR 0x258 0x0606060606060606
1966 12:20:50.231213 call enable_fixed_mtrr()
1967 12:20:50.237587 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 12:20:50.240911 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 12:20:50.244282 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 12:20:50.248013 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 12:20:50.254220 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 12:20:50.257996 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 12:20:50.261161 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 12:20:50.264279 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 12:20:50.270783 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 12:20:50.273828 CPU physical address size: 39 bits
1977 12:20:50.277469 call enable_fixed_mtrr()
1978 12:20:50.280342 CPU physical address size: 39 bits
1979 12:20:50.284041 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1980 12:20:50.287053 CPU physical address size: 39 bits
1981 12:20:50.290518 CPU physical address size: 39 bits
1982 12:20:50.293866 CBFS @ c08000 size 3f8000
1983 12:20:50.300230 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1984 12:20:50.303601 CBFS: Locating 'fallback/payload'
1985 12:20:50.307641 CBFS: Found @ offset 1c96c0 size 3f798
1986 12:20:50.313404 Checking segment from ROM address 0xffdd16f8
1987 12:20:50.317097 Checking segment from ROM address 0xffdd1714
1988 12:20:50.320002 Loading segment from ROM address 0xffdd16f8
1989 12:20:50.323446 code (compression=0)
1990 12:20:50.333516 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1991 12:20:50.339880 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1992 12:20:50.343015 it's not compressed!
1993 12:20:50.435325 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1994 12:20:50.441813 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1995 12:20:50.445417 Loading segment from ROM address 0xffdd1714
1996 12:20:50.448422 Entry Point 0x30000000
1997 12:20:50.451837 Loaded segments
1998 12:20:50.457662 Finalizing chipset.
1999 12:20:50.460963 Finalizing SMM.
2000 12:20:50.463988 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2001 12:20:50.467298 mp_park_aps done after 0 msecs.
2002 12:20:50.473881 Jumping to boot code at 30000000(99b62000)
2003 12:20:50.480766 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2004 12:20:50.480877
2005 12:20:50.480963
2006 12:20:50.481036
2007 12:20:50.483662 Starting depthcharge on Helios...
2008 12:20:50.483762
2009 12:20:50.484131 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2010 12:20:50.484244 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2011 12:20:50.484338 Setting prompt string to ['hatch:']
2012 12:20:50.484432 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2013 12:20:50.493927 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2014 12:20:50.494031
2015 12:20:50.500489 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2016 12:20:50.500593
2017 12:20:50.507241 board_setup: Info: eMMC controller not present; skipping
2018 12:20:50.507347
2019 12:20:50.510661 New NVMe Controller 0x30053ac0 @ 00:1d:00
2020 12:20:50.510763
2021 12:20:50.516690 board_setup: Info: SDHCI controller not present; skipping
2022 12:20:50.516790
2023 12:20:50.523783 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2024 12:20:50.523884
2025 12:20:50.523963 Wipe memory regions:
2026 12:20:50.524036
2027 12:20:50.526720 [0x00000000001000, 0x000000000a0000)
2028 12:20:50.526818
2029 12:20:50.533322 [0x00000000100000, 0x00000030000000)
2030 12:20:50.596598
2031 12:20:50.599646 [0x00000030657430, 0x00000099a2c000)
2032 12:20:50.746581
2033 12:20:50.749963 [0x00000100000000, 0x0000045e800000)
2034 12:20:52.206332
2035 12:20:52.206845 R8152: Initializing
2036 12:20:52.207233
2037 12:20:52.210289 Version 9 (ocp_data = 6010)
2038 12:20:52.213916
2039 12:20:52.214330 R8152: Done initializing
2040 12:20:52.214658
2041 12:20:52.217333 Adding net device
2042 12:20:52.700661
2043 12:20:52.701206 R8152: Initializing
2044 12:20:52.701555
2045 12:20:52.703521 Version 6 (ocp_data = 5c30)
2046 12:20:52.703920
2047 12:20:52.706414 R8152: Done initializing
2048 12:20:52.706503
2049 12:20:52.710202 net_add_device: Attemp to include the same device
2050 12:20:52.713284
2051 12:20:52.720278 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2052 12:20:52.720466
2053 12:20:52.720560
2054 12:20:52.720644
2055 12:20:52.720959 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2057 12:20:52.821958 hatch: tftpboot 192.168.201.1 9729462/tftp-deploy-mhyv2v41/kernel/bzImage 9729462/tftp-deploy-mhyv2v41/kernel/cmdline 9729462/tftp-deploy-mhyv2v41/ramdisk/ramdisk.cpio.gz
2058 12:20:52.822599 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2059 12:20:52.823023 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2060 12:20:52.827766 tftpboot 192.168.201.1 9729462/tftp-deploy-mhyv2v41/kernel/bzImaoy-mhyv2v41/kernel/cmdline 9729462/tftp-deploy-mhyv2v41/ramdisk/ramdisk.cpio.gz
2061 12:20:52.828196
2062 12:20:52.828512 Waiting for link
2063 12:20:53.029117
2064 12:20:53.029667 done.
2065 12:20:53.030177
2066 12:20:53.030573 MAC: 00:24:32:50:1a:59
2067 12:20:53.030950
2068 12:20:53.031899 Sending DHCP discover... done.
2069 12:20:53.032346
2070 12:20:53.035425 Waiting for reply... done.
2071 12:20:53.036232
2072 12:20:53.038228 Sending DHCP request... done.
2073 12:20:53.038692
2074 12:20:53.042040 Waiting for reply... done.
2075 12:20:53.042552
2076 12:20:53.045307 My ip is 192.168.201.14
2077 12:20:53.045822
2078 12:20:53.048346 The DHCP server ip is 192.168.201.1
2079 12:20:53.048861
2080 12:20:53.055182 TFTP server IP predefined by user: 192.168.201.1
2081 12:20:53.055690
2082 12:20:53.061956 Bootfile predefined by user: 9729462/tftp-deploy-mhyv2v41/kernel/bzImage
2083 12:20:53.062472
2084 12:20:53.064920 Sending tftp read request... done.
2085 12:20:53.065480
2086 12:20:53.068342 Waiting for the transfer...
2087 12:20:53.068757
2088 12:20:53.789076 00000000 ################################################################
2089 12:20:53.789622
2090 12:20:54.513361 00080000 ################################################################
2091 12:20:54.513885
2092 12:20:55.241274 00100000 ################################################################
2093 12:20:55.241785
2094 12:20:55.979836 00180000 ################################################################
2095 12:20:55.980457
2096 12:20:56.708566 00200000 ################################################################
2097 12:20:56.709065
2098 12:20:57.420095 00280000 ################################################################
2099 12:20:57.420635
2100 12:20:58.147557 00300000 ################################################################
2101 12:20:58.148084
2102 12:20:58.876919 00380000 ################################################################
2103 12:20:58.877489
2104 12:20:59.605531 00400000 ################################################################
2105 12:20:59.606089
2106 12:21:00.348921 00480000 ################################################################
2107 12:21:00.349485
2108 12:21:01.062086 00500000 ################################################################
2109 12:21:01.062609
2110 12:21:01.799477 00580000 ################################################################
2111 12:21:01.800035
2112 12:21:02.533884 00600000 ################################################################
2113 12:21:02.534433
2114 12:21:03.258703 00680000 ################################################################
2115 12:21:03.259277
2116 12:21:03.986658 00700000 ################################################################
2117 12:21:03.987218
2118 12:21:04.713937 00780000 ################################################################
2119 12:21:04.714679
2120 12:21:05.431545 00800000 ################################################################
2121 12:21:05.432048
2122 12:21:06.140869 00880000 ################################################################
2123 12:21:06.141456
2124 12:21:06.681614 00900000 ################################################# done.
2125 12:21:06.682167
2126 12:21:06.684720 The bootfile was 9834496 bytes long.
2127 12:21:06.685180
2128 12:21:06.688259 Sending tftp read request... done.
2129 12:21:06.688715
2130 12:21:06.691166 Waiting for the transfer...
2131 12:21:06.691644
2132 12:21:07.395345 00000000 ################################################################
2133 12:21:07.396023
2134 12:21:08.107202 00080000 ################################################################
2135 12:21:08.107785
2136 12:21:08.824212 00100000 ################################################################
2137 12:21:08.824755
2138 12:21:09.524442 00180000 ################################################################
2139 12:21:09.524972
2140 12:21:10.238369 00200000 ################################################################
2141 12:21:10.238958
2142 12:21:10.954580 00280000 ################################################################
2143 12:21:10.955140
2144 12:21:11.687547 00300000 ################################################################
2145 12:21:11.688081
2146 12:21:12.415285 00380000 ################################################################
2147 12:21:12.415829
2148 12:21:13.103494 00400000 ################################################################
2149 12:21:13.104092
2150 12:21:13.777905 00480000 ################################################################
2151 12:21:13.778069
2152 12:21:14.363497 00500000 ################################################################
2153 12:21:14.363666
2154 12:21:14.953164 00580000 ################################################################
2155 12:21:14.953337
2156 12:21:15.033534 00600000 ######### done.
2157 12:21:15.033674
2158 12:21:15.037225 Sending tftp read request... done.
2159 12:21:15.037332
2160 12:21:15.040457 Waiting for the transfer...
2161 12:21:15.040564
2162 12:21:15.040648 00000000 # done.
2163 12:21:15.040729
2164 12:21:15.050034 Command line loaded dynamically from TFTP file: 9729462/tftp-deploy-mhyv2v41/kernel/cmdline
2165 12:21:15.050162
2166 12:21:15.076616 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729462/extract-nfsrootfs-ls7m1ck6,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2167 12:21:15.077014
2168 12:21:15.083396 ec_init(0): CrosEC protocol v3 supported (256, 256)
2169 12:21:15.087290
2170 12:21:15.090438 Shutting down all USB controllers.
2171 12:21:15.090891
2172 12:21:15.091322 Removing current net device
2173 12:21:15.094151
2174 12:21:15.094727 Finalizing coreboot
2175 12:21:15.095145
2176 12:21:15.100622 Exiting depthcharge with code 4 at timestamp: 32049938
2177 12:21:15.101073
2178 12:21:15.101429
2179 12:21:15.101762 Starting kernel ...
2180 12:21:15.102088
2181 12:21:15.103610 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2182 12:21:15.104139 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2183 12:21:15.104604 Setting prompt string to ['Linux version [0-9]']
2184 12:21:15.104974 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2185 12:21:15.105339 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2186 12:21:15.106275
2188 12:25:32.104410 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2190 12:25:32.104664 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2192 12:25:32.104854 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2195 12:25:32.105155 end: 2 depthcharge-action (duration 00:05:00) [common]
2197 12:25:32.105424 Cleaning after the job
2198 12:25:32.105525 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729462/tftp-deploy-mhyv2v41/ramdisk
2199 12:25:32.106083 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729462/tftp-deploy-mhyv2v41/kernel
2200 12:25:32.106857 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729462/tftp-deploy-mhyv2v41/nfsrootfs
2201 12:25:32.162326 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729462/tftp-deploy-mhyv2v41/modules
2202 12:25:32.162851 start: 4.1 power-off (timeout 00:00:30) [common]
2203 12:25:32.163048 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2204 12:25:32.242770 >> Command sent successfully.
2205 12:25:32.245623 Returned 0 in 0 seconds
2206 12:25:32.346501 end: 4.1 power-off (duration 00:00:00) [common]
2208 12:25:32.346896 start: 4.2 read-feedback (timeout 00:10:00) [common]
2209 12:25:32.347195 Listened to connection for namespace 'common' for up to 1s
2211 12:25:32.347819 Listened to connection for namespace 'common' for up to 1s
2212 12:25:33.351163 Finalising connection for namespace 'common'
2213 12:25:33.351358 Disconnecting from shell: Finalise
2214 12:25:33.351453
2215 12:25:33.452233 end: 4.2 read-feedback (duration 00:00:01) [common]
2216 12:25:33.452414 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729462
2217 12:25:33.618777 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729462
2218 12:25:33.618997 JobError: Your job cannot terminate cleanly.