Boot log: asus-C436FA-Flip-hatch
- Errors: 2
- Boot result: FAIL
- Kernel Errors: 0
- Warnings: 0
- Kernel Warnings: 0
1 12:26:07.962888 lava-dispatcher, installed at version: 2023.01
2 12:26:07.963080 start: 0 validate
3 12:26:07.963237 Start time: 2023-03-22 12:26:07.963231+00:00 (UTC)
4 12:26:07.963373 Using caching service: 'http://localhost/cache/?uri=%s'
5 12:26:07.963511 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Finitrd.cpio.gz exists
6 12:26:08.253701 Using caching service: 'http://localhost/cache/?uri=%s'
7 12:26:08.253887 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.277-cip94-rt29%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 12:26:08.536511 Using caching service: 'http://localhost/cache/?uri=%s'
9 12:26:08.536686 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230317.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 12:26:08.825409 Using caching service: 'http://localhost/cache/?uri=%s'
11 12:26:08.825582 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.277-cip94-rt29%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 12:26:09.116790 validate duration: 1.15
14 12:26:09.117187 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 12:26:09.117332 start: 1.1 download-retry (timeout 00:10:00) [common]
16 12:26:09.117449 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 12:26:09.117577 Not decompressing ramdisk as can be used compressed.
18 12:26:09.117673 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/initrd.cpio.gz
19 12:26:09.117762 saving as /var/lib/lava/dispatcher/tmp/9729461/tftp-deploy-2j210pwj/ramdisk/initrd.cpio.gz
20 12:26:09.117837 total size: 5672849 (5MB)
21 12:26:09.118838 progress 0% (0MB)
22 12:26:09.120618 progress 5% (0MB)
23 12:26:09.122353 progress 10% (0MB)
24 12:26:09.123946 progress 15% (0MB)
25 12:26:09.125699 progress 20% (1MB)
26 12:26:09.127486 progress 25% (1MB)
27 12:26:09.129017 progress 30% (1MB)
28 12:26:09.130667 progress 35% (1MB)
29 12:26:09.132379 progress 40% (2MB)
30 12:26:09.133895 progress 45% (2MB)
31 12:26:09.135618 progress 50% (2MB)
32 12:26:09.137351 progress 55% (3MB)
33 12:26:09.138879 progress 60% (3MB)
34 12:26:09.140623 progress 65% (3MB)
35 12:26:09.142326 progress 70% (3MB)
36 12:26:09.143881 progress 75% (4MB)
37 12:26:09.145597 progress 80% (4MB)
38 12:26:09.147325 progress 85% (4MB)
39 12:26:09.148887 progress 90% (4MB)
40 12:26:09.150582 progress 95% (5MB)
41 12:26:09.152324 progress 100% (5MB)
42 12:26:09.152454 5MB downloaded in 0.03s (156.31MB/s)
43 12:26:09.152633 end: 1.1.1 http-download (duration 00:00:00) [common]
45 12:26:09.152924 end: 1.1 download-retry (duration 00:00:00) [common]
46 12:26:09.153038 start: 1.2 download-retry (timeout 00:10:00) [common]
47 12:26:09.153145 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 12:26:09.153275 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.277-cip94-rt29/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 12:26:09.153359 saving as /var/lib/lava/dispatcher/tmp/9729461/tftp-deploy-2j210pwj/kernel/bzImage
50 12:26:09.153431 total size: 9834496 (9MB)
51 12:26:09.153512 No compression specified
52 12:26:09.154489 progress 0% (0MB)
53 12:26:09.157367 progress 5% (0MB)
54 12:26:09.160189 progress 10% (0MB)
55 12:26:09.163001 progress 15% (1MB)
56 12:26:09.165819 progress 20% (1MB)
57 12:26:09.168638 progress 25% (2MB)
58 12:26:09.171462 progress 30% (2MB)
59 12:26:09.174271 progress 35% (3MB)
60 12:26:09.177107 progress 40% (3MB)
61 12:26:09.179992 progress 45% (4MB)
62 12:26:09.182853 progress 50% (4MB)
63 12:26:09.185696 progress 55% (5MB)
64 12:26:09.188588 progress 60% (5MB)
65 12:26:09.191393 progress 65% (6MB)
66 12:26:09.194122 progress 70% (6MB)
67 12:26:09.196890 progress 75% (7MB)
68 12:26:09.199600 progress 80% (7MB)
69 12:26:09.202321 progress 85% (8MB)
70 12:26:09.205066 progress 90% (8MB)
71 12:26:09.207758 progress 95% (8MB)
72 12:26:09.210483 progress 100% (9MB)
73 12:26:09.210619 9MB downloaded in 0.06s (164.02MB/s)
74 12:26:09.210788 end: 1.2.1 http-download (duration 00:00:00) [common]
76 12:26:09.211079 end: 1.2 download-retry (duration 00:00:00) [common]
77 12:26:09.211206 start: 1.3 download-retry (timeout 00:10:00) [common]
78 12:26:09.211333 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 12:26:09.211471 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230317.0/amd64/full.rootfs.tar.xz
80 12:26:09.211556 saving as /var/lib/lava/dispatcher/tmp/9729461/tftp-deploy-2j210pwj/nfsrootfs/full.rootfs.tar
81 12:26:09.211628 total size: 125916488 (120MB)
82 12:26:09.211722 Using unxz to decompress xz
83 12:26:09.214920 progress 0% (0MB)
84 12:26:09.709606 progress 5% (6MB)
85 12:26:10.214818 progress 10% (12MB)
86 12:26:10.731110 progress 15% (18MB)
87 12:26:11.240615 progress 20% (24MB)
88 12:26:11.611392 progress 25% (30MB)
89 12:26:11.991853 progress 30% (36MB)
90 12:26:12.277142 progress 35% (42MB)
91 12:26:12.487418 progress 40% (48MB)
92 12:26:12.882100 progress 45% (54MB)
93 12:26:13.282098 progress 50% (60MB)
94 12:26:13.659987 progress 55% (66MB)
95 12:26:14.052739 progress 60% (72MB)
96 12:26:14.422400 progress 65% (78MB)
97 12:26:14.846780 progress 70% (84MB)
98 12:26:15.308476 progress 75% (90MB)
99 12:26:15.768688 progress 80% (96MB)
100 12:26:15.879296 progress 85% (102MB)
101 12:26:16.063873 progress 90% (108MB)
102 12:26:16.444273 progress 95% (114MB)
103 12:26:16.868511 progress 100% (120MB)
104 12:26:16.875214 120MB downloaded in 7.66s (15.67MB/s)
105 12:26:16.875527 end: 1.3.1 http-download (duration 00:00:08) [common]
107 12:26:16.875829 end: 1.3 download-retry (duration 00:00:08) [common]
108 12:26:16.875947 start: 1.4 download-retry (timeout 00:09:52) [common]
109 12:26:16.876049 start: 1.4.1 http-download (timeout 00:09:52) [common]
110 12:26:16.876189 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.277-cip94-rt29/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 12:26:16.876273 saving as /var/lib/lava/dispatcher/tmp/9729461/tftp-deploy-2j210pwj/modules/modules.tar
112 12:26:16.876352 total size: 462060 (0MB)
113 12:26:16.876437 Using unxz to decompress xz
114 12:26:16.879551 progress 7% (0MB)
115 12:26:16.879975 progress 14% (0MB)
116 12:26:16.880250 progress 21% (0MB)
117 12:26:16.881719 progress 28% (0MB)
118 12:26:16.883984 progress 35% (0MB)
119 12:26:16.886011 progress 42% (0MB)
120 12:26:16.888456 progress 49% (0MB)
121 12:26:16.890557 progress 56% (0MB)
122 12:26:16.892794 progress 63% (0MB)
123 12:26:16.894831 progress 70% (0MB)
124 12:26:16.897361 progress 78% (0MB)
125 12:26:16.899823 progress 85% (0MB)
126 12:26:16.901698 progress 92% (0MB)
127 12:26:16.904159 progress 99% (0MB)
128 12:26:16.911678 0MB downloaded in 0.04s (12.48MB/s)
129 12:26:16.911973 end: 1.4.1 http-download (duration 00:00:00) [common]
131 12:26:16.912284 end: 1.4 download-retry (duration 00:00:00) [common]
132 12:26:16.912399 start: 1.5 prepare-tftp-overlay (timeout 00:09:52) [common]
133 12:26:16.912511 start: 1.5.1 extract-nfsrootfs (timeout 00:09:52) [common]
134 12:26:18.751303 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/9729461/extract-nfsrootfs-2y6inzqr
135 12:26:18.751525 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
136 12:26:18.751641 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
137 12:26:18.751788 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa
138 12:26:18.751903 makedir: /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin
139 12:26:18.751997 makedir: /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/tests
140 12:26:18.752086 makedir: /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/results
141 12:26:18.752197 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-add-keys
142 12:26:18.752342 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-add-sources
143 12:26:18.752473 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-background-process-start
144 12:26:18.752599 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-background-process-stop
145 12:26:18.752726 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-common-functions
146 12:26:18.752848 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-echo-ipv4
147 12:26:18.752970 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-install-packages
148 12:26:18.753091 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-installed-packages
149 12:26:18.753212 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-os-build
150 12:26:18.753333 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-probe-channel
151 12:26:18.753454 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-probe-ip
152 12:26:18.753574 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-target-ip
153 12:26:18.753695 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-target-mac
154 12:26:18.753814 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-target-storage
155 12:26:18.753940 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-test-case
156 12:26:18.754060 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-test-event
157 12:26:18.754180 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-test-feedback
158 12:26:18.754302 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-test-raise
159 12:26:18.754420 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-test-reference
160 12:26:18.754542 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-test-runner
161 12:26:18.754683 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-test-set
162 12:26:18.754851 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-test-shell
163 12:26:18.755018 Updating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-install-packages (oe)
164 12:26:18.755169 Updating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/bin/lava-installed-packages (oe)
165 12:26:18.755280 Creating /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/environment
166 12:26:18.755380 LAVA metadata
167 12:26:18.755458 - LAVA_JOB_ID=9729461
168 12:26:18.755530 - LAVA_DISPATCHER_IP=192.168.201.1
169 12:26:18.755640 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
170 12:26:18.755713 skipped lava-vland-overlay
171 12:26:18.755798 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
172 12:26:18.755889 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
173 12:26:18.755958 skipped lava-multinode-overlay
174 12:26:18.756040 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
175 12:26:18.756129 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
176 12:26:18.756211 Loading test definitions
177 12:26:18.756312 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
178 12:26:18.756389 Using /lava-9729461 at stage 0
179 12:26:18.756491 Fetching tests from https://github.com/kernelci/test-definitions
180 12:26:18.756578 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/0/tests/0_ltp-timers'
181 12:26:24.754948 Running '/usr/bin/git checkout kernelci.org
182 12:26:24.904089 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
183 12:26:24.904815 uuid=9729461_1.5.2.3.1 testdef=None
184 12:26:24.904991 end: 1.5.2.3.1 git-repo-action (duration 00:00:06) [common]
186 12:26:24.905275 start: 1.5.2.3.2 test-overlay (timeout 00:09:44) [common]
187 12:26:24.906005 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
189 12:26:24.906275 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:44) [common]
190 12:26:24.907196 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
192 12:26:24.907471 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:44) [common]
193 12:26:24.908313 runner path: /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/0/tests/0_ltp-timers test_uuid 9729461_1.5.2.3.1
194 12:26:24.908413 GRP_TEST='TMR'
195 12:26:24.908488 SKIPFILE='skipfile-lkft.yaml'
196 12:26:24.908556 SKIP_INSTALL='true'
197 12:26:24.908622 TST_CMDFILES=''
198 12:26:24.908764 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
200 12:26:24.909009 Creating lava-test-runner.conf files
201 12:26:24.909085 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/9729461/lava-overlay-4_i5spaa/lava-9729461/0 for stage 0
202 12:26:24.909182 - 0_ltp-timers
203 12:26:24.909300 end: 1.5.2.3 test-definition (duration 00:00:06) [common]
204 12:26:24.909405 start: 1.5.2.4 compress-overlay (timeout 00:09:44) [common]
205 12:26:33.175437 end: 1.5.2.4 compress-overlay (duration 00:00:08) [common]
206 12:26:33.175604 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:36) [common]
207 12:26:33.175712 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
208 12:26:33.175824 end: 1.5.2 lava-overlay (duration 00:00:14) [common]
209 12:26:33.175925 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:36) [common]
210 12:26:33.296273 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
211 12:26:33.296652 start: 1.5.4 extract-modules (timeout 00:09:36) [common]
212 12:26:33.296780 extracting modules file /var/lib/lava/dispatcher/tmp/9729461/tftp-deploy-2j210pwj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729461/extract-nfsrootfs-2y6inzqr
213 12:26:33.309301 extracting modules file /var/lib/lava/dispatcher/tmp/9729461/tftp-deploy-2j210pwj/modules/modules.tar to /var/lib/lava/dispatcher/tmp/9729461/extract-overlay-ramdisk-9f04qop6/ramdisk
214 12:26:33.321435 end: 1.5.4 extract-modules (duration 00:00:00) [common]
215 12:26:33.321598 start: 1.5.5 apply-overlay-tftp (timeout 00:09:36) [common]
216 12:26:33.321710 [common] Applying overlay to NFS
217 12:26:33.321791 [common] Applying overlay /var/lib/lava/dispatcher/tmp/9729461/compress-overlay-ukk0qwu1/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/9729461/extract-nfsrootfs-2y6inzqr
218 12:26:34.184089 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
219 12:26:34.184282 start: 1.5.6 configure-preseed-file (timeout 00:09:35) [common]
220 12:26:34.184397 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
221 12:26:34.184502 start: 1.5.7 compress-ramdisk (timeout 00:09:35) [common]
222 12:26:34.184597 Building ramdisk /var/lib/lava/dispatcher/tmp/9729461/extract-overlay-ramdisk-9f04qop6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/9729461/extract-overlay-ramdisk-9f04qop6/ramdisk
223 12:26:34.229821 >> 31023 blocks
224 12:26:34.857732 rename /var/lib/lava/dispatcher/tmp/9729461/extract-overlay-ramdisk-9f04qop6/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/9729461/tftp-deploy-2j210pwj/ramdisk/ramdisk.cpio.gz
225 12:26:34.858169 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
226 12:26:34.858318 start: 1.5.8 prepare-kernel (timeout 00:09:34) [common]
227 12:26:34.858431 start: 1.5.8.1 prepare-fit (timeout 00:09:34) [common]
228 12:26:34.858552 No mkimage arch provided, not using FIT.
229 12:26:34.858655 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
230 12:26:34.858767 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
231 12:26:34.858881 end: 1.5 prepare-tftp-overlay (duration 00:00:18) [common]
232 12:26:34.858995 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:34) [common]
233 12:26:34.859095 No LXC device requested
234 12:26:34.859190 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
235 12:26:34.859307 start: 1.7 deploy-device-env (timeout 00:09:34) [common]
236 12:26:34.859406 end: 1.7 deploy-device-env (duration 00:00:00) [common]
237 12:26:34.859499 Checking files for TFTP limit of 4294967296 bytes.
238 12:26:34.859926 end: 1 tftp-deploy (duration 00:00:26) [common]
239 12:26:34.860053 start: 2 depthcharge-action (timeout 00:05:00) [common]
240 12:26:34.860159 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
241 12:26:34.860316 substitutions:
242 12:26:34.860398 - {DTB}: None
243 12:26:34.860481 - {INITRD}: 9729461/tftp-deploy-2j210pwj/ramdisk/ramdisk.cpio.gz
244 12:26:34.860554 - {KERNEL}: 9729461/tftp-deploy-2j210pwj/kernel/bzImage
245 12:26:34.860621 - {LAVA_MAC}: None
246 12:26:34.860688 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/9729461/extract-nfsrootfs-2y6inzqr
247 12:26:34.860768 - {NFS_SERVER_IP}: 192.168.201.1
248 12:26:34.860834 - {PRESEED_CONFIG}: None
249 12:26:34.860899 - {PRESEED_LOCAL}: None
250 12:26:34.860970 - {RAMDISK}: 9729461/tftp-deploy-2j210pwj/ramdisk/ramdisk.cpio.gz
251 12:26:34.861037 - {ROOT_PART}: None
252 12:26:34.861100 - {ROOT}: None
253 12:26:34.861162 - {SERVER_IP}: 192.168.201.1
254 12:26:34.861236 - {TEE}: None
255 12:26:34.861301 Parsed boot commands:
256 12:26:34.861363 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
257 12:26:34.861541 Parsed boot commands: tftpboot 192.168.201.1 9729461/tftp-deploy-2j210pwj/kernel/bzImage 9729461/tftp-deploy-2j210pwj/kernel/cmdline 9729461/tftp-deploy-2j210pwj/ramdisk/ramdisk.cpio.gz
258 12:26:34.861649 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
259 12:26:34.861760 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
260 12:26:34.861873 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
261 12:26:34.861985 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
262 12:26:34.862070 Not connected, no need to disconnect.
263 12:26:34.862159 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
264 12:26:34.862268 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
265 12:26:34.862349 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-4'
266 12:26:34.865492 Setting prompt string to ['lava-test: # ']
267 12:26:34.865833 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
268 12:26:34.865964 end: 2.2.1 reset-connection (duration 00:00:00) [common]
269 12:26:34.866078 start: 2.2.2 reset-device (timeout 00:05:00) [common]
270 12:26:34.866193 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
271 12:26:34.866390 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=reboot'
272 12:26:40.010860 >> Command sent successfully.
273 12:26:40.019998 Returned 0 in 5 seconds
274 12:26:40.121607 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
276 12:26:40.123022 end: 2.2.2 reset-device (duration 00:00:05) [common]
277 12:26:40.123557 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
278 12:26:40.124097 Setting prompt string to 'Starting depthcharge on Helios...'
279 12:26:40.124543 Changing prompt to 'Starting depthcharge on Helios...'
280 12:26:40.124915 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
281 12:26:40.126128 [Enter `^Ec?' for help]
282 12:26:40.736146
283 12:26:40.736702
284 12:26:40.745463 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
285 12:26:40.748736 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
286 12:26:40.755381 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
287 12:26:40.758661 CPU: AES supported, TXT NOT supported, VT supported
288 12:26:40.765868 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
289 12:26:40.768942 PCH: device id 0284 (rev 00) is Cometlake-U Premium
290 12:26:40.775923 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
291 12:26:40.778778 VBOOT: Loading verstage.
292 12:26:40.782302 FMAP: Found "FLASH" version 1.1 at 0xc04000.
293 12:26:40.788802 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
294 12:26:40.792465 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
295 12:26:40.795331 CBFS @ c08000 size 3f8000
296 12:26:40.802049 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
297 12:26:40.805686 CBFS: Locating 'fallback/verstage'
298 12:26:40.808976 CBFS: Found @ offset 10fb80 size 1072c
299 12:26:40.813376
300 12:26:40.813861
301 12:26:40.823184 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
302 12:26:40.836852 Probing TPM: . done!
303 12:26:40.840468 TPM ready after 0 ms
304 12:26:40.843608 Connected to device vid:did:rid of 1ae0:0028:00
305 12:26:40.853509 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
306 12:26:40.857297 Initialized TPM device CR50 revision 0
307 12:26:40.900479 tlcl_send_startup: Startup return code is 0
308 12:26:40.901042 TPM: setup succeeded
309 12:26:40.913756 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
310 12:26:40.917148 Chrome EC: UHEPI supported
311 12:26:40.920477 Phase 1
312 12:26:40.923875 FMAP: area GBB found @ c05000 (12288 bytes)
313 12:26:40.930665 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
314 12:26:40.934258 Phase 2
315 12:26:40.934809 Phase 3
316 12:26:40.937473 FMAP: area GBB found @ c05000 (12288 bytes)
317 12:26:40.944103 VB2:vb2_report_dev_firmware() This is developer signed firmware
318 12:26:40.950451 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
319 12:26:40.954363 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 12:26:40.960476 VB2:vb2_verify_keyblock() Checking keyblock signature...
321 12:26:40.976287 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
322 12:26:40.979546 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 12:26:40.986394 VB2:vb2_verify_fw_preamble() Verifying preamble.
324 12:26:40.990455 Phase 4
325 12:26:40.993296 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
326 12:26:41.000196 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
327 12:26:41.179629 VB2:vb2_rsa_verify_digest() Digest check failed!
328 12:26:41.186086 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
329 12:26:41.186195 Saving nvdata
330 12:26:41.189147 Reboot requested (10020007)
331 12:26:41.192434 board_reset() called!
332 12:26:41.192551 full_reset() called!
333 12:26:45.712782
334 12:26:45.713398
335 12:26:45.713905 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
336 12:26:45.716591 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
337 12:26:45.724354 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
338 12:26:45.728207 CPU: AES supported, TXT NOT supported, VT supported
339 12:26:45.731401 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
340 12:26:45.739197 PCH: device id 0284 (rev 00) is Cometlake-U Premium
341 12:26:45.743046 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
342 12:26:45.746918 VBOOT: Loading verstage.
343 12:26:45.750491 FMAP: Found "FLASH" version 1.1 at 0xc04000.
344 12:26:45.754936 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
345 12:26:45.762097 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
346 12:26:45.765682 CBFS @ c08000 size 3f8000
347 12:26:45.769398 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
348 12:26:45.773251 CBFS: Locating 'fallback/verstage'
349 12:26:45.776941 CBFS: Found @ offset 10fb80 size 1072c
350 12:26:45.780607
351 12:26:45.781056
352 12:26:45.787767 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
353 12:26:45.804394 Probing TPM: . done!
354 12:26:45.808589 TPM ready after 0 ms
355 12:26:45.812194 Connected to device vid:did:rid of 1ae0:0028:00
356 12:26:45.822955 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
357 12:26:45.875226 Initialized TPM device CR50 revision 0
358 12:26:45.883453 tlcl_send_startup: Startup return code is 0
359 12:26:45.884012 TPM: setup succeeded
360 12:26:45.896073 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
361 12:26:45.900270 Chrome EC: UHEPI supported
362 12:26:45.903360 Phase 1
363 12:26:45.907190 FMAP: area GBB found @ c05000 (12288 bytes)
364 12:26:45.913094 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
365 12:26:45.919824 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
366 12:26:45.923109 Recovery requested (1009000e)
367 12:26:45.929037 Saving nvdata
368 12:26:45.935274 tlcl_extend: response is 0
369 12:26:45.944446 tlcl_extend: response is 0
370 12:26:45.951182 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
371 12:26:45.954999 CBFS @ c08000 size 3f8000
372 12:26:45.961173 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
373 12:26:45.964383 CBFS: Locating 'fallback/romstage'
374 12:26:45.967606 CBFS: Found @ offset 80 size 145fc
375 12:26:45.971409 Accumulated console time in verstage 98 ms
376 12:26:45.971950
377 12:26:45.972307
378 12:26:45.984509 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
379 12:26:45.990891 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
380 12:26:45.994171 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
381 12:26:45.996920 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
382 12:26:46.003640 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
383 12:26:46.007274 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
384 12:26:46.010286 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
385 12:26:46.013893 TCO_STS: 0000 0000
386 12:26:46.016870 GEN_PMCON: e0015238 00000200
387 12:26:46.020325 GBLRST_CAUSE: 00000000 00000000
388 12:26:46.020772 prev_sleep_state 5
389 12:26:46.023871 Boot Count incremented to 48649
390 12:26:46.030733 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
391 12:26:46.033943 CBFS @ c08000 size 3f8000
392 12:26:46.040535 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
393 12:26:46.041075 CBFS: Locating 'fspm.bin'
394 12:26:46.047266 CBFS: Found @ offset 5ffc0 size 71000
395 12:26:46.050463 Chrome EC: UHEPI supported
396 12:26:46.057098 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
397 12:26:46.060793 Probing TPM: done!
398 12:26:46.067315 Connected to device vid:did:rid of 1ae0:0028:00
399 12:26:46.077631 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.7/cr50_v1.9308_87_mp.514-29d5b602
400 12:26:46.083237 Initialized TPM device CR50 revision 0
401 12:26:46.092504 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
402 12:26:46.098920 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
403 12:26:46.102292 MRC cache found, size 1948
404 12:26:46.105178 bootmode is set to: 2
405 12:26:46.108811 PRMRR disabled by config.
406 12:26:46.111783 SPD INDEX = 1
407 12:26:46.115687 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
408 12:26:46.118538 CBFS @ c08000 size 3f8000
409 12:26:46.125170 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
410 12:26:46.125619 CBFS: Locating 'spd.bin'
411 12:26:46.128487 CBFS: Found @ offset 5fb80 size 400
412 12:26:46.131540 SPD: module type is LPDDR3
413 12:26:46.135079 SPD: module part is
414 12:26:46.141562 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
415 12:26:46.145038 SPD: device width 4 bits, bus width 8 bits
416 12:26:46.148430 SPD: module size is 4096 MB (per channel)
417 12:26:46.151713 memory slot: 0 configuration done.
418 12:26:46.155078 memory slot: 2 configuration done.
419 12:26:46.206429 CBMEM:
420 12:26:46.209826 IMD: root @ 99fff000 254 entries.
421 12:26:46.212641 IMD: root @ 99ffec00 62 entries.
422 12:26:46.216506 External stage cache:
423 12:26:46.219719 IMD: root @ 9abff000 254 entries.
424 12:26:46.222970 IMD: root @ 9abfec00 62 entries.
425 12:26:46.229475 Chrome EC: clear events_b mask to 0x0000000020004000
426 12:26:46.242321 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
427 12:26:46.255453 tlcl_write: response is 0
428 12:26:46.264896 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
429 12:26:46.271003 MRC: TPM MRC hash updated successfully.
430 12:26:46.271485 2 DIMMs found
431 12:26:46.274205 SMM Memory Map
432 12:26:46.278429 SMRAM : 0x9a000000 0x1000000
433 12:26:46.281274 Subregion 0: 0x9a000000 0xa00000
434 12:26:46.284754 Subregion 1: 0x9aa00000 0x200000
435 12:26:46.288022 Subregion 2: 0x9ac00000 0x400000
436 12:26:46.290957 top_of_ram = 0x9a000000
437 12:26:46.294364 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
438 12:26:46.300983 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
439 12:26:46.304320 MTRR Range: Start=ff000000 End=0 (Size 1000000)
440 12:26:46.310820 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
441 12:26:46.313884 CBFS @ c08000 size 3f8000
442 12:26:46.317947 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
443 12:26:46.321156 CBFS: Locating 'fallback/postcar'
444 12:26:46.327187 CBFS: Found @ offset 107000 size 4b44
445 12:26:46.330954 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
446 12:26:46.343142 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
447 12:26:46.346226 Processing 180 relocs. Offset value of 0x97c0c000
448 12:26:46.354757 Accumulated console time in romstage 286 ms
449 12:26:46.355362
450 12:26:46.355734
451 12:26:46.364753 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
452 12:26:46.371667 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
453 12:26:46.375000 CBFS @ c08000 size 3f8000
454 12:26:46.378379 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
455 12:26:46.381351 CBFS: Locating 'fallback/ramstage'
456 12:26:46.388444 CBFS: Found @ offset 43380 size 1b9e8
457 12:26:46.395212 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
458 12:26:46.426760 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
459 12:26:46.430085 Processing 3976 relocs. Offset value of 0x98db0000
460 12:26:46.436578 Accumulated console time in postcar 52 ms
461 12:26:46.437040
462 12:26:46.437393
463 12:26:46.446078 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
464 12:26:46.453214 FMAP: area RO_VPD found @ c00000 (16384 bytes)
465 12:26:46.456703 WARNING: RO_VPD is uninitialized or empty.
466 12:26:46.459636 FMAP: area RW_VPD found @ af8000 (8192 bytes)
467 12:26:46.466773 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 12:26:46.467351 Normal boot.
469 12:26:46.472971 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
470 12:26:46.476464 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
471 12:26:46.479650 CBFS @ c08000 size 3f8000
472 12:26:46.486606 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
473 12:26:46.489635 CBFS: Locating 'cpu_microcode_blob.bin'
474 12:26:46.493066 CBFS: Found @ offset 14700 size 2ec00
475 12:26:46.495980 microcode: sig=0x806ec pf=0x4 revision=0xc9
476 12:26:46.499660 Skip microcode update
477 12:26:46.505743 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
478 12:26:46.506308 CBFS @ c08000 size 3f8000
479 12:26:46.512537 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
480 12:26:46.515662 CBFS: Locating 'fsps.bin'
481 12:26:46.519215 CBFS: Found @ offset d1fc0 size 35000
482 12:26:46.544584 Detected 4 core, 8 thread CPU.
483 12:26:46.547969 Setting up SMI for CPU
484 12:26:46.551133 IED base = 0x9ac00000
485 12:26:46.551689 IED size = 0x00400000
486 12:26:46.554791 Will perform SMM setup.
487 12:26:46.561314 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
488 12:26:46.567772 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
489 12:26:46.570895 Processing 16 relocs. Offset value of 0x00030000
490 12:26:46.575146 Attempting to start 7 APs
491 12:26:46.578069 Waiting for 10ms after sending INIT.
492 12:26:46.594724 Waiting for 1st SIPI to complete...AP: slot 4 apic_id 1.
493 12:26:46.595299 done.
494 12:26:46.597699 AP: slot 6 apic_id 7.
495 12:26:46.601218 AP: slot 7 apic_id 6.
496 12:26:46.601752 AP: slot 5 apic_id 4.
497 12:26:46.604587 AP: slot 3 apic_id 5.
498 12:26:46.607608 Waiting for 2nd SIPI to complete...done.
499 12:26:46.611036 AP: slot 1 apic_id 3.
500 12:26:46.613935 AP: slot 2 apic_id 2.
501 12:26:46.620995 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
502 12:26:46.627196 Processing 13 relocs. Offset value of 0x00038000
503 12:26:46.631343 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
504 12:26:46.637653 Installing SMM handler to 0x9a000000
505 12:26:46.644092 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
506 12:26:46.650629 Processing 658 relocs. Offset value of 0x9a010000
507 12:26:46.656959 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
508 12:26:46.660461 Processing 13 relocs. Offset value of 0x9a008000
509 12:26:46.667142 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
510 12:26:46.673845 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
511 12:26:46.680334 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
512 12:26:46.683449 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
513 12:26:46.690496 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
514 12:26:46.697043 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
515 12:26:46.700061 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
516 12:26:46.706916 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
517 12:26:46.710844 Clearing SMI status registers
518 12:26:46.713844 SMI_STS: PM1
519 12:26:46.714388 PM1_STS: PWRBTN
520 12:26:46.716896 TCO_STS: SECOND_TO
521 12:26:46.720188 New SMBASE 0x9a000000
522 12:26:46.724102 In relocation handler: CPU 0
523 12:26:46.726896 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
524 12:26:46.730352 Writing SMRR. base = 0x9a000006, mask=0xff000800
525 12:26:46.733360 Relocation complete.
526 12:26:46.737236 New SMBASE 0x99fff000
527 12:26:46.737689 In relocation handler: CPU 4
528 12:26:46.743961 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
529 12:26:46.747332 Writing SMRR. base = 0x9a000006, mask=0xff000800
530 12:26:46.750381 Relocation complete.
531 12:26:46.753379 New SMBASE 0x99ffe800
532 12:26:46.753900 In relocation handler: CPU 6
533 12:26:46.760730 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
534 12:26:46.763518 Writing SMRR. base = 0x9a000006, mask=0xff000800
535 12:26:46.766395 Relocation complete.
536 12:26:46.766843 New SMBASE 0x99ffe400
537 12:26:46.770036 In relocation handler: CPU 7
538 12:26:46.776871 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
539 12:26:46.779924 Writing SMRR. base = 0x9a000006, mask=0xff000800
540 12:26:46.783511 Relocation complete.
541 12:26:46.783958 New SMBASE 0x99fff800
542 12:26:46.786944 In relocation handler: CPU 2
543 12:26:46.793450 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
544 12:26:46.797099 Writing SMRR. base = 0x9a000006, mask=0xff000800
545 12:26:46.799942 Relocation complete.
546 12:26:46.800391 New SMBASE 0x99fffc00
547 12:26:46.803390 In relocation handler: CPU 1
548 12:26:46.806507 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
549 12:26:46.812797 Writing SMRR. base = 0x9a000006, mask=0xff000800
550 12:26:46.816045 Relocation complete.
551 12:26:46.816523 New SMBASE 0x99fff400
552 12:26:46.819952 In relocation handler: CPU 3
553 12:26:46.823161 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
554 12:26:46.829438 Writing SMRR. base = 0x9a000006, mask=0xff000800
555 12:26:46.833006 Relocation complete.
556 12:26:46.833436 New SMBASE 0x99ffec00
557 12:26:46.836340 In relocation handler: CPU 5
558 12:26:46.839487 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
559 12:26:46.845958 Writing SMRR. base = 0x9a000006, mask=0xff000800
560 12:26:46.846431 Relocation complete.
561 12:26:46.849197 Initializing CPU #0
562 12:26:46.852945 CPU: vendor Intel device 806ec
563 12:26:46.856343 CPU: family 06, model 8e, stepping 0c
564 12:26:46.859881 Clearing out pending MCEs
565 12:26:46.862785 Setting up local APIC...
566 12:26:46.863250 apic_id: 0x00 done.
567 12:26:46.865905 Turbo is available but hidden
568 12:26:46.869594 Turbo is available and visible
569 12:26:46.872565 VMX status: enabled
570 12:26:46.876146 IA32_FEATURE_CONTROL status: locked
571 12:26:46.879236 Skip microcode update
572 12:26:46.879638 CPU #0 initialized
573 12:26:46.882244 Initializing CPU #4
574 12:26:46.886415 Initializing CPU #3
575 12:26:46.886924 Initializing CPU #5
576 12:26:46.889853 CPU: vendor Intel device 806ec
577 12:26:46.892524 CPU: family 06, model 8e, stepping 0c
578 12:26:46.896241 CPU: vendor Intel device 806ec
579 12:26:46.899262 CPU: family 06, model 8e, stepping 0c
580 12:26:46.902840 Clearing out pending MCEs
581 12:26:46.906343 Clearing out pending MCEs
582 12:26:46.909446 Setting up local APIC...
583 12:26:46.909887 Initializing CPU #7
584 12:26:46.912731 Initializing CPU #6
585 12:26:46.915865 CPU: vendor Intel device 806ec
586 12:26:46.919446 CPU: family 06, model 8e, stepping 0c
587 12:26:46.922496 Initializing CPU #2
588 12:26:46.922939 Initializing CPU #1
589 12:26:46.925525 CPU: vendor Intel device 806ec
590 12:26:46.929043 CPU: family 06, model 8e, stepping 0c
591 12:26:46.932457 CPU: vendor Intel device 806ec
592 12:26:46.935653 CPU: family 06, model 8e, stepping 0c
593 12:26:46.938770 Clearing out pending MCEs
594 12:26:46.942032 Clearing out pending MCEs
595 12:26:46.945325 Setting up local APIC...
596 12:26:46.949431 CPU: vendor Intel device 806ec
597 12:26:46.952425 CPU: family 06, model 8e, stepping 0c
598 12:26:46.955750 Clearing out pending MCEs
599 12:26:46.956296 apic_id: 0x05 done.
600 12:26:46.958967 Setting up local APIC...
601 12:26:46.962358 apic_id: 0x02 done.
602 12:26:46.965590 Setting up local APIC...
603 12:26:46.966133 Setting up local APIC...
604 12:26:46.968714 VMX status: enabled
605 12:26:46.971965 apic_id: 0x04 done.
606 12:26:46.975240 IA32_FEATURE_CONTROL status: locked
607 12:26:46.975782 VMX status: enabled
608 12:26:46.978949 Skip microcode update
609 12:26:46.981973 IA32_FEATURE_CONTROL status: locked
610 12:26:46.985469 CPU #3 initialized
611 12:26:46.985912 Skip microcode update
612 12:26:46.988493 VMX status: enabled
613 12:26:46.991568 apic_id: 0x03 done.
614 12:26:46.995379 IA32_FEATURE_CONTROL status: locked
615 12:26:46.995922 VMX status: enabled
616 12:26:46.999068 Skip microcode update
617 12:26:47.001787 IA32_FEATURE_CONTROL status: locked
618 12:26:47.005663 CPU #2 initialized
619 12:26:47.006209 Skip microcode update
620 12:26:47.008728 CPU #5 initialized
621 12:26:47.009168 CPU #1 initialized
622 12:26:47.011680 apic_id: 0x01 done.
623 12:26:47.014720 Clearing out pending MCEs
624 12:26:47.018864 CPU: vendor Intel device 806ec
625 12:26:47.022016 CPU: family 06, model 8e, stepping 0c
626 12:26:47.025107 Setting up local APIC...
627 12:26:47.025559 VMX status: enabled
628 12:26:47.028420 Clearing out pending MCEs
629 12:26:47.031615 apic_id: 0x06 done.
630 12:26:47.034708 Setting up local APIC...
631 12:26:47.038189 IA32_FEATURE_CONTROL status: locked
632 12:26:47.038723 VMX status: enabled
633 12:26:47.041313 apic_id: 0x07 done.
634 12:26:47.044695 IA32_FEATURE_CONTROL status: locked
635 12:26:47.048007 VMX status: enabled
636 12:26:47.048540 Skip microcode update
637 12:26:47.051224 IA32_FEATURE_CONTROL status: locked
638 12:26:47.054454 CPU #7 initialized
639 12:26:47.058346 Skip microcode update
640 12:26:47.058808 Skip microcode update
641 12:26:47.061593 CPU #6 initialized
642 12:26:47.064813 CPU #4 initialized
643 12:26:47.068072 bsp_do_flight_plan done after 456 msecs.
644 12:26:47.071361 CPU: frequency set to 4200 MHz
645 12:26:47.071894 Enabling SMIs.
646 12:26:47.074412 Locking SMM.
647 12:26:47.088018 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
648 12:26:47.091538 CBFS @ c08000 size 3f8000
649 12:26:47.097609 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
650 12:26:47.098150 CBFS: Locating 'vbt.bin'
651 12:26:47.104368 CBFS: Found @ offset 5f5c0 size 499
652 12:26:47.107272 Found a VBT of 4608 bytes after decompression
653 12:26:47.290861 Display FSP Version Info HOB
654 12:26:47.294143 Reference Code - CPU = 9.0.1e.30
655 12:26:47.296976 uCode Version = 0.0.0.ca
656 12:26:47.300516 TXT ACM version = ff.ff.ff.ffff
657 12:26:47.303988 Display FSP Version Info HOB
658 12:26:47.307354 Reference Code - ME = 9.0.1e.30
659 12:26:47.310858 MEBx version = 0.0.0.0
660 12:26:47.313616 ME Firmware Version = Consumer SKU
661 12:26:47.317132 Display FSP Version Info HOB
662 12:26:47.320685 Reference Code - CML PCH = 9.0.1e.30
663 12:26:47.323908 PCH-CRID Status = Disabled
664 12:26:47.326760 PCH-CRID Original Value = ff.ff.ff.ffff
665 12:26:47.330194 PCH-CRID New Value = ff.ff.ff.ffff
666 12:26:47.333886 OPROM - RST - RAID = ff.ff.ff.ffff
667 12:26:47.337002 ChipsetInit Base Version = ff.ff.ff.ffff
668 12:26:47.340386 ChipsetInit Oem Version = ff.ff.ff.ffff
669 12:26:47.343424 Display FSP Version Info HOB
670 12:26:47.350811 Reference Code - SA - System Agent = 9.0.1e.30
671 12:26:47.354054 Reference Code - MRC = 0.7.1.6c
672 12:26:47.354605 SA - PCIe Version = 9.0.1e.30
673 12:26:47.356919 SA-CRID Status = Disabled
674 12:26:47.360154 SA-CRID Original Value = 0.0.0.c
675 12:26:47.363402 SA-CRID New Value = 0.0.0.c
676 12:26:47.366862 OPROM - VBIOS = ff.ff.ff.ffff
677 12:26:47.369936 RTC Init
678 12:26:47.373222 Set power on after power failure.
679 12:26:47.373667 Disabling Deep S3
680 12:26:47.376498 Disabling Deep S3
681 12:26:47.376938 Disabling Deep S4
682 12:26:47.379765 Disabling Deep S4
683 12:26:47.380206 Disabling Deep S5
684 12:26:47.384065 Disabling Deep S5
685 12:26:47.390505 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 193 exit 1
686 12:26:47.391055 Enumerating buses...
687 12:26:47.396887 Show all devs... Before device enumeration.
688 12:26:47.397437 Root Device: enabled 1
689 12:26:47.400005 CPU_CLUSTER: 0: enabled 1
690 12:26:47.403455 DOMAIN: 0000: enabled 1
691 12:26:47.406397 APIC: 00: enabled 1
692 12:26:47.406942 PCI: 00:00.0: enabled 1
693 12:26:47.410231 PCI: 00:02.0: enabled 1
694 12:26:47.413151 PCI: 00:04.0: enabled 0
695 12:26:47.416584 PCI: 00:05.0: enabled 0
696 12:26:47.417027 PCI: 00:12.0: enabled 1
697 12:26:47.419504 PCI: 00:12.5: enabled 0
698 12:26:47.423421 PCI: 00:12.6: enabled 0
699 12:26:47.426355 PCI: 00:14.0: enabled 1
700 12:26:47.426908 PCI: 00:14.1: enabled 0
701 12:26:47.429708 PCI: 00:14.3: enabled 1
702 12:26:47.432594 PCI: 00:14.5: enabled 0
703 12:26:47.433037 PCI: 00:15.0: enabled 1
704 12:26:47.436215 PCI: 00:15.1: enabled 1
705 12:26:47.439669 PCI: 00:15.2: enabled 0
706 12:26:47.442842 PCI: 00:15.3: enabled 0
707 12:26:47.443425 PCI: 00:16.0: enabled 1
708 12:26:47.446329 PCI: 00:16.1: enabled 0
709 12:26:47.449685 PCI: 00:16.2: enabled 0
710 12:26:47.452601 PCI: 00:16.3: enabled 0
711 12:26:47.453048 PCI: 00:16.4: enabled 0
712 12:26:47.456373 PCI: 00:16.5: enabled 0
713 12:26:47.459613 PCI: 00:17.0: enabled 1
714 12:26:47.463047 PCI: 00:19.0: enabled 1
715 12:26:47.463655 PCI: 00:19.1: enabled 0
716 12:26:47.465990 PCI: 00:19.2: enabled 0
717 12:26:47.469247 PCI: 00:1a.0: enabled 0
718 12:26:47.469801 PCI: 00:1c.0: enabled 0
719 12:26:47.472603 PCI: 00:1c.1: enabled 0
720 12:26:47.476249 PCI: 00:1c.2: enabled 0
721 12:26:47.479717 PCI: 00:1c.3: enabled 0
722 12:26:47.480270 PCI: 00:1c.4: enabled 0
723 12:26:47.482575 PCI: 00:1c.5: enabled 0
724 12:26:47.485801 PCI: 00:1c.6: enabled 0
725 12:26:47.489448 PCI: 00:1c.7: enabled 0
726 12:26:47.490006 PCI: 00:1d.0: enabled 1
727 12:26:47.492366 PCI: 00:1d.1: enabled 0
728 12:26:47.496384 PCI: 00:1d.2: enabled 0
729 12:26:47.499781 PCI: 00:1d.3: enabled 0
730 12:26:47.500339 PCI: 00:1d.4: enabled 0
731 12:26:47.502779 PCI: 00:1d.5: enabled 1
732 12:26:47.506101 PCI: 00:1e.0: enabled 1
733 12:26:47.508915 PCI: 00:1e.1: enabled 0
734 12:26:47.509368 PCI: 00:1e.2: enabled 1
735 12:26:47.512337 PCI: 00:1e.3: enabled 1
736 12:26:47.516015 PCI: 00:1f.0: enabled 1
737 12:26:47.516568 PCI: 00:1f.1: enabled 1
738 12:26:47.519195 PCI: 00:1f.2: enabled 1
739 12:26:47.522005 PCI: 00:1f.3: enabled 1
740 12:26:47.526081 PCI: 00:1f.4: enabled 1
741 12:26:47.526628 PCI: 00:1f.5: enabled 1
742 12:26:47.528905 PCI: 00:1f.6: enabled 0
743 12:26:47.532033 USB0 port 0: enabled 1
744 12:26:47.535625 I2C: 00:15: enabled 1
745 12:26:47.536067 I2C: 00:5d: enabled 1
746 12:26:47.538574 GENERIC: 0.0: enabled 1
747 12:26:47.542215 I2C: 00:1a: enabled 1
748 12:26:47.542656 I2C: 00:38: enabled 1
749 12:26:47.545199 I2C: 00:39: enabled 1
750 12:26:47.549081 I2C: 00:3a: enabled 1
751 12:26:47.549639 I2C: 00:3b: enabled 1
752 12:26:47.551976 PCI: 00:00.0: enabled 1
753 12:26:47.555707 SPI: 00: enabled 1
754 12:26:47.556189 SPI: 01: enabled 1
755 12:26:47.559285 PNP: 0c09.0: enabled 1
756 12:26:47.562336 USB2 port 0: enabled 1
757 12:26:47.562814 USB2 port 1: enabled 1
758 12:26:47.565287 USB2 port 2: enabled 0
759 12:26:47.568414 USB2 port 3: enabled 0
760 12:26:47.568863 USB2 port 5: enabled 0
761 12:26:47.572241 USB2 port 6: enabled 1
762 12:26:47.575423 USB2 port 9: enabled 1
763 12:26:47.578565 USB3 port 0: enabled 1
764 12:26:47.579003 USB3 port 1: enabled 1
765 12:26:47.582078 USB3 port 2: enabled 1
766 12:26:47.585156 USB3 port 3: enabled 1
767 12:26:47.585658 USB3 port 4: enabled 0
768 12:26:47.588553 APIC: 03: enabled 1
769 12:26:47.591875 APIC: 02: enabled 1
770 12:26:47.592279 APIC: 05: enabled 1
771 12:26:47.595135 APIC: 01: enabled 1
772 12:26:47.595537 APIC: 04: enabled 1
773 12:26:47.598217 APIC: 07: enabled 1
774 12:26:47.601565 APIC: 06: enabled 1
775 12:26:47.601967 Compare with tree...
776 12:26:47.605330 Root Device: enabled 1
777 12:26:47.608437 CPU_CLUSTER: 0: enabled 1
778 12:26:47.611652 APIC: 00: enabled 1
779 12:26:47.612148 APIC: 03: enabled 1
780 12:26:47.614898 APIC: 02: enabled 1
781 12:26:47.618829 APIC: 05: enabled 1
782 12:26:47.619401 APIC: 01: enabled 1
783 12:26:47.621800 APIC: 04: enabled 1
784 12:26:47.625179 APIC: 07: enabled 1
785 12:26:47.625685 APIC: 06: enabled 1
786 12:26:47.628115 DOMAIN: 0000: enabled 1
787 12:26:47.631181 PCI: 00:00.0: enabled 1
788 12:26:47.634828 PCI: 00:02.0: enabled 1
789 12:26:47.635290 PCI: 00:04.0: enabled 0
790 12:26:47.637937 PCI: 00:05.0: enabled 0
791 12:26:47.641695 PCI: 00:12.0: enabled 1
792 12:26:47.644671 PCI: 00:12.5: enabled 0
793 12:26:47.648131 PCI: 00:12.6: enabled 0
794 12:26:47.648535 PCI: 00:14.0: enabled 1
795 12:26:47.651263 USB0 port 0: enabled 1
796 12:26:47.654872 USB2 port 0: enabled 1
797 12:26:47.657849 USB2 port 1: enabled 1
798 12:26:47.661478 USB2 port 2: enabled 0
799 12:26:47.661886 USB2 port 3: enabled 0
800 12:26:47.665038 USB2 port 5: enabled 0
801 12:26:47.668269 USB2 port 6: enabled 1
802 12:26:47.671414 USB2 port 9: enabled 1
803 12:26:47.674370 USB3 port 0: enabled 1
804 12:26:47.678557 USB3 port 1: enabled 1
805 12:26:47.679078 USB3 port 2: enabled 1
806 12:26:47.681692 USB3 port 3: enabled 1
807 12:26:47.684612 USB3 port 4: enabled 0
808 12:26:47.687902 PCI: 00:14.1: enabled 0
809 12:26:47.691593 PCI: 00:14.3: enabled 1
810 12:26:47.692109 PCI: 00:14.5: enabled 0
811 12:26:47.694731 PCI: 00:15.0: enabled 1
812 12:26:47.697653 I2C: 00:15: enabled 1
813 12:26:47.700877 PCI: 00:15.1: enabled 1
814 12:26:47.704887 I2C: 00:5d: enabled 1
815 12:26:47.705404 GENERIC: 0.0: enabled 1
816 12:26:47.707862 PCI: 00:15.2: enabled 0
817 12:26:47.711245 PCI: 00:15.3: enabled 0
818 12:26:47.714239 PCI: 00:16.0: enabled 1
819 12:26:47.717486 PCI: 00:16.1: enabled 0
820 12:26:47.717894 PCI: 00:16.2: enabled 0
821 12:26:47.720614 PCI: 00:16.3: enabled 0
822 12:26:47.723955 PCI: 00:16.4: enabled 0
823 12:26:47.727750 PCI: 00:16.5: enabled 0
824 12:26:47.730929 PCI: 00:17.0: enabled 1
825 12:26:47.731396 PCI: 00:19.0: enabled 1
826 12:26:47.734039 I2C: 00:1a: enabled 1
827 12:26:47.737198 I2C: 00:38: enabled 1
828 12:26:47.740684 I2C: 00:39: enabled 1
829 12:26:47.741103 I2C: 00:3a: enabled 1
830 12:26:47.743831 I2C: 00:3b: enabled 1
831 12:26:47.747492 PCI: 00:19.1: enabled 0
832 12:26:47.750411 PCI: 00:19.2: enabled 0
833 12:26:47.754104 PCI: 00:1a.0: enabled 0
834 12:26:47.754517 PCI: 00:1c.0: enabled 0
835 12:26:47.757085 PCI: 00:1c.1: enabled 0
836 12:26:47.760633 PCI: 00:1c.2: enabled 0
837 12:26:47.763567 PCI: 00:1c.3: enabled 0
838 12:26:47.767508 PCI: 00:1c.4: enabled 0
839 12:26:47.767919 PCI: 00:1c.5: enabled 0
840 12:26:47.770724 PCI: 00:1c.6: enabled 0
841 12:26:47.773881 PCI: 00:1c.7: enabled 0
842 12:26:47.776965 PCI: 00:1d.0: enabled 1
843 12:26:47.777377 PCI: 00:1d.1: enabled 0
844 12:26:47.780524 PCI: 00:1d.2: enabled 0
845 12:26:47.783874 PCI: 00:1d.3: enabled 0
846 12:26:47.787114 PCI: 00:1d.4: enabled 0
847 12:26:47.790174 PCI: 00:1d.5: enabled 1
848 12:26:47.790554 PCI: 00:00.0: enabled 1
849 12:26:47.793403 PCI: 00:1e.0: enabled 1
850 12:26:47.796823 PCI: 00:1e.1: enabled 0
851 12:26:47.799935 PCI: 00:1e.2: enabled 1
852 12:26:47.803906 SPI: 00: enabled 1
853 12:26:47.804414 PCI: 00:1e.3: enabled 1
854 12:26:47.807224 SPI: 01: enabled 1
855 12:26:47.810424 PCI: 00:1f.0: enabled 1
856 12:26:47.813553 PNP: 0c09.0: enabled 1
857 12:26:47.814017 PCI: 00:1f.1: enabled 1
858 12:26:47.816650 PCI: 00:1f.2: enabled 1
859 12:26:47.819890 PCI: 00:1f.3: enabled 1
860 12:26:47.823565 PCI: 00:1f.4: enabled 1
861 12:26:47.826860 PCI: 00:1f.5: enabled 1
862 12:26:47.827385 PCI: 00:1f.6: enabled 0
863 12:26:47.830375 Root Device scanning...
864 12:26:47.833205 scan_static_bus for Root Device
865 12:26:47.836967 CPU_CLUSTER: 0 enabled
866 12:26:47.837367 DOMAIN: 0000 enabled
867 12:26:47.840272 DOMAIN: 0000 scanning...
868 12:26:47.843357 PCI: pci_scan_bus for bus 00
869 12:26:47.846567 PCI: 00:00.0 [8086/0000] ops
870 12:26:47.850272 PCI: 00:00.0 [8086/9b61] enabled
871 12:26:47.853138 PCI: 00:02.0 [8086/0000] bus ops
872 12:26:47.856632 PCI: 00:02.0 [8086/9b41] enabled
873 12:26:47.860226 PCI: 00:04.0 [8086/1903] disabled
874 12:26:47.863164 PCI: 00:08.0 [8086/1911] enabled
875 12:26:47.866928 PCI: 00:12.0 [8086/02f9] enabled
876 12:26:47.869805 PCI: 00:14.0 [8086/0000] bus ops
877 12:26:47.873372 PCI: 00:14.0 [8086/02ed] enabled
878 12:26:47.876403 PCI: 00:14.2 [8086/02ef] enabled
879 12:26:47.879923 PCI: 00:14.3 [8086/02f0] enabled
880 12:26:47.883704 PCI: 00:15.0 [8086/0000] bus ops
881 12:26:47.886793 PCI: 00:15.0 [8086/02e8] enabled
882 12:26:47.890206 PCI: 00:15.1 [8086/0000] bus ops
883 12:26:47.893356 PCI: 00:15.1 [8086/02e9] enabled
884 12:26:47.896739 PCI: 00:16.0 [8086/0000] ops
885 12:26:47.900126 PCI: 00:16.0 [8086/02e0] enabled
886 12:26:47.903036 PCI: 00:17.0 [8086/0000] ops
887 12:26:47.906984 PCI: 00:17.0 [8086/02d3] enabled
888 12:26:47.910523 PCI: 00:19.0 [8086/0000] bus ops
889 12:26:47.912912 PCI: 00:19.0 [8086/02c5] enabled
890 12:26:47.916599 PCI: 00:1d.0 [8086/0000] bus ops
891 12:26:47.919772 PCI: 00:1d.0 [8086/02b0] enabled
892 12:26:47.926712 PCI: Static device PCI: 00:1d.5 not found, disabling it.
893 12:26:47.929770 PCI: 00:1e.0 [8086/0000] ops
894 12:26:47.933459 PCI: 00:1e.0 [8086/02a8] enabled
895 12:26:47.936691 PCI: 00:1e.2 [8086/0000] bus ops
896 12:26:47.939799 PCI: 00:1e.2 [8086/02aa] enabled
897 12:26:47.943325 PCI: 00:1e.3 [8086/0000] bus ops
898 12:26:47.946120 PCI: 00:1e.3 [8086/02ab] enabled
899 12:26:47.950049 PCI: 00:1f.0 [8086/0000] bus ops
900 12:26:47.952722 PCI: 00:1f.0 [8086/0284] enabled
901 12:26:47.956657 PCI: Static device PCI: 00:1f.1 not found, disabling it.
902 12:26:47.963208 PCI: Static device PCI: 00:1f.2 not found, disabling it.
903 12:26:47.966353 PCI: 00:1f.3 [8086/0000] bus ops
904 12:26:47.969297 PCI: 00:1f.3 [8086/02c8] enabled
905 12:26:47.972906 PCI: 00:1f.4 [8086/0000] bus ops
906 12:26:47.975776 PCI: 00:1f.4 [8086/02a3] enabled
907 12:26:47.979644 PCI: 00:1f.5 [8086/0000] bus ops
908 12:26:47.982822 PCI: 00:1f.5 [8086/02a4] enabled
909 12:26:47.986408 PCI: Leftover static devices:
910 12:26:47.986821 PCI: 00:05.0
911 12:26:47.989493 PCI: 00:12.5
912 12:26:47.990000 PCI: 00:12.6
913 12:26:47.993402 PCI: 00:14.1
914 12:26:47.993916 PCI: 00:14.5
915 12:26:47.994244 PCI: 00:15.2
916 12:26:47.996037 PCI: 00:15.3
917 12:26:47.996441 PCI: 00:16.1
918 12:26:47.999183 PCI: 00:16.2
919 12:26:47.999685 PCI: 00:16.3
920 12:26:48.000013 PCI: 00:16.4
921 12:26:48.002437 PCI: 00:16.5
922 12:26:48.002856 PCI: 00:19.1
923 12:26:48.006219 PCI: 00:19.2
924 12:26:48.006618 PCI: 00:1a.0
925 12:26:48.009432 PCI: 00:1c.0
926 12:26:48.009931 PCI: 00:1c.1
927 12:26:48.010250 PCI: 00:1c.2
928 12:26:48.012558 PCI: 00:1c.3
929 12:26:48.012961 PCI: 00:1c.4
930 12:26:48.015725 PCI: 00:1c.5
931 12:26:48.016124 PCI: 00:1c.6
932 12:26:48.016441 PCI: 00:1c.7
933 12:26:48.019179 PCI: 00:1d.1
934 12:26:48.019724 PCI: 00:1d.2
935 12:26:48.022654 PCI: 00:1d.3
936 12:26:48.023240 PCI: 00:1d.4
937 12:26:48.023595 PCI: 00:1d.5
938 12:26:48.025731 PCI: 00:1e.1
939 12:26:48.026167 PCI: 00:1f.1
940 12:26:48.029237 PCI: 00:1f.2
941 12:26:48.029782 PCI: 00:1f.6
942 12:26:48.032274 PCI: Check your devicetree.cb.
943 12:26:48.036042 PCI: 00:02.0 scanning...
944 12:26:48.039583 scan_generic_bus for PCI: 00:02.0
945 12:26:48.042568 scan_generic_bus for PCI: 00:02.0 done
946 12:26:48.049063 scan_bus: scanning of bus PCI: 00:02.0 took 10191 usecs
947 12:26:48.052336 PCI: 00:14.0 scanning...
948 12:26:48.056026 scan_static_bus for PCI: 00:14.0
949 12:26:48.056570 USB0 port 0 enabled
950 12:26:48.058815 USB0 port 0 scanning...
951 12:26:48.062703 scan_static_bus for USB0 port 0
952 12:26:48.065743 USB2 port 0 enabled
953 12:26:48.066182 USB2 port 1 enabled
954 12:26:48.069236 USB2 port 2 disabled
955 12:26:48.072200 USB2 port 3 disabled
956 12:26:48.072642 USB2 port 5 disabled
957 12:26:48.075276 USB2 port 6 enabled
958 12:26:48.075717 USB2 port 9 enabled
959 12:26:48.079170 USB3 port 0 enabled
960 12:26:48.082073 USB3 port 1 enabled
961 12:26:48.082514 USB3 port 2 enabled
962 12:26:48.085744 USB3 port 3 enabled
963 12:26:48.088982 USB3 port 4 disabled
964 12:26:48.089526 USB2 port 0 scanning...
965 12:26:48.092370 scan_static_bus for USB2 port 0
966 12:26:48.099388 scan_static_bus for USB2 port 0 done
967 12:26:48.102407 scan_bus: scanning of bus USB2 port 0 took 9711 usecs
968 12:26:48.105773 USB2 port 1 scanning...
969 12:26:48.108602 scan_static_bus for USB2 port 1
970 12:26:48.111681 scan_static_bus for USB2 port 1 done
971 12:26:48.119045 scan_bus: scanning of bus USB2 port 1 took 9709 usecs
972 12:26:48.119618 USB2 port 6 scanning...
973 12:26:48.122209 scan_static_bus for USB2 port 6
974 12:26:48.128889 scan_static_bus for USB2 port 6 done
975 12:26:48.131829 scan_bus: scanning of bus USB2 port 6 took 9706 usecs
976 12:26:48.135183 USB2 port 9 scanning...
977 12:26:48.138747 scan_static_bus for USB2 port 9
978 12:26:48.141982 scan_static_bus for USB2 port 9 done
979 12:26:48.148908 scan_bus: scanning of bus USB2 port 9 took 9708 usecs
980 12:26:48.149452 USB3 port 0 scanning...
981 12:26:48.152161 scan_static_bus for USB3 port 0
982 12:26:48.158729 scan_static_bus for USB3 port 0 done
983 12:26:48.162017 scan_bus: scanning of bus USB3 port 0 took 9693 usecs
984 12:26:48.165076 USB3 port 1 scanning...
985 12:26:48.168273 scan_static_bus for USB3 port 1
986 12:26:48.171949 scan_static_bus for USB3 port 1 done
987 12:26:48.178636 scan_bus: scanning of bus USB3 port 1 took 9707 usecs
988 12:26:48.179075 USB3 port 2 scanning...
989 12:26:48.181931 scan_static_bus for USB3 port 2
990 12:26:48.188530 scan_static_bus for USB3 port 2 done
991 12:26:48.192458 scan_bus: scanning of bus USB3 port 2 took 9707 usecs
992 12:26:48.195319 USB3 port 3 scanning...
993 12:26:48.198609 scan_static_bus for USB3 port 3
994 12:26:48.201646 scan_static_bus for USB3 port 3 done
995 12:26:48.208654 scan_bus: scanning of bus USB3 port 3 took 9708 usecs
996 12:26:48.211976 scan_static_bus for USB0 port 0 done
997 12:26:48.218476 scan_bus: scanning of bus USB0 port 0 took 155422 usecs
998 12:26:48.222034 scan_static_bus for PCI: 00:14.0 done
999 12:26:48.225193 scan_bus: scanning of bus PCI: 00:14.0 took 173048 usecs
1000 12:26:48.228953 PCI: 00:15.0 scanning...
1001 12:26:48.231908 scan_generic_bus for PCI: 00:15.0
1002 12:26:48.235377 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1003 12:26:48.241700 scan_generic_bus for PCI: 00:15.0 done
1004 12:26:48.244730 scan_bus: scanning of bus PCI: 00:15.0 took 14301 usecs
1005 12:26:48.248558 PCI: 00:15.1 scanning...
1006 12:26:48.251952 scan_generic_bus for PCI: 00:15.1
1007 12:26:48.254952 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1008 12:26:48.261910 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1009 12:26:48.265134 scan_generic_bus for PCI: 00:15.1 done
1010 12:26:48.271411 scan_bus: scanning of bus PCI: 00:15.1 took 18593 usecs
1011 12:26:48.272035 PCI: 00:19.0 scanning...
1012 12:26:48.277509 scan_generic_bus for PCI: 00:19.0
1013 12:26:48.281407 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1014 12:26:48.284688 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1015 12:26:48.287826 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1016 12:26:48.291424 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1017 12:26:48.298067 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1018 12:26:48.301493 scan_generic_bus for PCI: 00:19.0 done
1019 12:26:48.307905 scan_bus: scanning of bus PCI: 00:19.0 took 30726 usecs
1020 12:26:48.308350 PCI: 00:1d.0 scanning...
1021 12:26:48.310856 do_pci_scan_bridge for PCI: 00:1d.0
1022 12:26:48.314406 PCI: pci_scan_bus for bus 01
1023 12:26:48.317412 PCI: 01:00.0 [1c5c/1327] enabled
1024 12:26:48.324644 Enabling Common Clock Configuration
1025 12:26:48.327634 L1 Sub-State supported from root port 29
1026 12:26:48.330859 L1 Sub-State Support = 0xf
1027 12:26:48.333925 CommonModeRestoreTime = 0x28
1028 12:26:48.337232 Power On Value = 0x16, Power On Scale = 0x0
1029 12:26:48.337686 ASPM: Enabled L1
1030 12:26:48.344722 scan_bus: scanning of bus PCI: 00:1d.0 took 32800 usecs
1031 12:26:48.347670 PCI: 00:1e.2 scanning...
1032 12:26:48.351259 scan_generic_bus for PCI: 00:1e.2
1033 12:26:48.354027 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1034 12:26:48.357550 scan_generic_bus for PCI: 00:1e.2 done
1035 12:26:48.363879 scan_bus: scanning of bus PCI: 00:1e.2 took 14008 usecs
1036 12:26:48.367691 PCI: 00:1e.3 scanning...
1037 12:26:48.370855 scan_generic_bus for PCI: 00:1e.3
1038 12:26:48.374229 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1039 12:26:48.377355 scan_generic_bus for PCI: 00:1e.3 done
1040 12:26:48.384009 scan_bus: scanning of bus PCI: 00:1e.3 took 14019 usecs
1041 12:26:48.387286 PCI: 00:1f.0 scanning...
1042 12:26:48.390488 scan_static_bus for PCI: 00:1f.0
1043 12:26:48.391032 PNP: 0c09.0 enabled
1044 12:26:48.393402 scan_static_bus for PCI: 00:1f.0 done
1045 12:26:48.400950 scan_bus: scanning of bus PCI: 00:1f.0 took 12050 usecs
1046 12:26:48.403604 PCI: 00:1f.3 scanning...
1047 12:26:48.410210 scan_bus: scanning of bus PCI: 00:1f.3 took 2862 usecs
1048 12:26:48.410765 PCI: 00:1f.4 scanning...
1049 12:26:48.417489 scan_generic_bus for PCI: 00:1f.4
1050 12:26:48.420174 scan_generic_bus for PCI: 00:1f.4 done
1051 12:26:48.423734 scan_bus: scanning of bus PCI: 00:1f.4 took 10188 usecs
1052 12:26:48.426857 PCI: 00:1f.5 scanning...
1053 12:26:48.430605 scan_generic_bus for PCI: 00:1f.5
1054 12:26:48.433483 scan_generic_bus for PCI: 00:1f.5 done
1055 12:26:48.439951 scan_bus: scanning of bus PCI: 00:1f.5 took 10187 usecs
1056 12:26:48.447367 scan_bus: scanning of bus DOMAIN: 0000 took 605214 usecs
1057 12:26:48.450444 scan_static_bus for Root Device done
1058 12:26:48.456935 scan_bus: scanning of bus Root Device took 625141 usecs
1059 12:26:48.457472 done
1060 12:26:48.460334 Chrome EC: UHEPI supported
1061 12:26:48.466797 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1062 12:26:48.470015 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1063 12:26:48.476514 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1064 12:26:48.483892 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1065 12:26:48.486861 SPI flash protection: WPSW=0 SRP0=0
1066 12:26:48.493804 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1067 12:26:48.497006 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1068 12:26:48.500654 found VGA at PCI: 00:02.0
1069 12:26:48.503756 Setting up VGA for PCI: 00:02.0
1070 12:26:48.510272 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1071 12:26:48.513569 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1072 12:26:48.516408 Allocating resources...
1073 12:26:48.520022 Reading resources...
1074 12:26:48.523147 Root Device read_resources bus 0 link: 0
1075 12:26:48.526384 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1076 12:26:48.533511 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1077 12:26:48.536476 DOMAIN: 0000 read_resources bus 0 link: 0
1078 12:26:48.544084 PCI: 00:14.0 read_resources bus 0 link: 0
1079 12:26:48.547066 USB0 port 0 read_resources bus 0 link: 0
1080 12:26:48.555598 USB0 port 0 read_resources bus 0 link: 0 done
1081 12:26:48.558865 PCI: 00:14.0 read_resources bus 0 link: 0 done
1082 12:26:48.565816 PCI: 00:15.0 read_resources bus 1 link: 0
1083 12:26:48.569100 PCI: 00:15.0 read_resources bus 1 link: 0 done
1084 12:26:48.576277 PCI: 00:15.1 read_resources bus 2 link: 0
1085 12:26:48.579418 PCI: 00:15.1 read_resources bus 2 link: 0 done
1086 12:26:48.586894 PCI: 00:19.0 read_resources bus 3 link: 0
1087 12:26:48.593782 PCI: 00:19.0 read_resources bus 3 link: 0 done
1088 12:26:48.596680 PCI: 00:1d.0 read_resources bus 1 link: 0
1089 12:26:48.603317 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1090 12:26:48.607251 PCI: 00:1e.2 read_resources bus 4 link: 0
1091 12:26:48.613268 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1092 12:26:48.616387 PCI: 00:1e.3 read_resources bus 5 link: 0
1093 12:26:48.622925 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1094 12:26:48.626660 PCI: 00:1f.0 read_resources bus 0 link: 0
1095 12:26:48.633243 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1096 12:26:48.639723 DOMAIN: 0000 read_resources bus 0 link: 0 done
1097 12:26:48.642787 Root Device read_resources bus 0 link: 0 done
1098 12:26:48.646487 Done reading resources.
1099 12:26:48.652812 Show resources in subtree (Root Device)...After reading.
1100 12:26:48.655967 Root Device child on link 0 CPU_CLUSTER: 0
1101 12:26:48.659185 CPU_CLUSTER: 0 child on link 0 APIC: 00
1102 12:26:48.663079 APIC: 00
1103 12:26:48.663563 APIC: 03
1104 12:26:48.663911 APIC: 02
1105 12:26:48.666323 APIC: 05
1106 12:26:48.666761 APIC: 01
1107 12:26:48.667147 APIC: 04
1108 12:26:48.669792 APIC: 07
1109 12:26:48.670338 APIC: 06
1110 12:26:48.676010 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1111 12:26:48.682862 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1112 12:26:48.735696 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1113 12:26:48.736279 PCI: 00:00.0
1114 12:26:48.737125 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1115 12:26:48.737512 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1116 12:26:48.737849 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1117 12:26:48.738193 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1118 12:26:48.785609 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1119 12:26:48.786167 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1120 12:26:48.786528 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1121 12:26:48.787383 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1122 12:26:48.787848 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1123 12:26:48.789321 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1124 12:26:48.796050 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1125 12:26:48.806453 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1126 12:26:48.816041 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1127 12:26:48.825735 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1128 12:26:48.835433 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1129 12:26:48.845671 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1130 12:26:48.846206 PCI: 00:02.0
1131 12:26:48.855482 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1132 12:26:48.868475 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1133 12:26:48.875684 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1134 12:26:48.878571 PCI: 00:04.0
1135 12:26:48.879138 PCI: 00:08.0
1136 12:26:48.888790 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1137 12:26:48.892061 PCI: 00:12.0
1138 12:26:48.902327 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1139 12:26:48.905328 PCI: 00:14.0 child on link 0 USB0 port 0
1140 12:26:48.915166 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1141 12:26:48.918274 USB0 port 0 child on link 0 USB2 port 0
1142 12:26:48.921347 USB2 port 0
1143 12:26:48.921788 USB2 port 1
1144 12:26:48.925534 USB2 port 2
1145 12:26:48.926070 USB2 port 3
1146 12:26:48.928564 USB2 port 5
1147 12:26:48.929103 USB2 port 6
1148 12:26:48.932033 USB2 port 9
1149 12:26:48.934926 USB3 port 0
1150 12:26:48.935506 USB3 port 1
1151 12:26:48.938058 USB3 port 2
1152 12:26:48.938494 USB3 port 3
1153 12:26:48.941374 USB3 port 4
1154 12:26:48.941915 PCI: 00:14.2
1155 12:26:48.951826 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1156 12:26:48.961273 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1157 12:26:48.964386 PCI: 00:14.3
1158 12:26:48.974644 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1159 12:26:48.977738 PCI: 00:15.0 child on link 0 I2C: 01:15
1160 12:26:48.988053 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1161 12:26:48.988616 I2C: 01:15
1162 12:26:48.994464 PCI: 00:15.1 child on link 0 I2C: 02:5d
1163 12:26:49.004866 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1164 12:26:49.005427 I2C: 02:5d
1165 12:26:49.007971 GENERIC: 0.0
1166 12:26:49.008417 PCI: 00:16.0
1167 12:26:49.017580 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1168 12:26:49.020953 PCI: 00:17.0
1169 12:26:49.027739 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1170 12:26:49.037614 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1171 12:26:49.047596 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1172 12:26:49.053674 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1173 12:26:49.063862 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1174 12:26:49.070496 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1175 12:26:49.077040 PCI: 00:19.0 child on link 0 I2C: 03:1a
1176 12:26:49.087022 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1177 12:26:49.087595 I2C: 03:1a
1178 12:26:49.090291 I2C: 03:38
1179 12:26:49.090740 I2C: 03:39
1180 12:26:49.093681 I2C: 03:3a
1181 12:26:49.094226 I2C: 03:3b
1182 12:26:49.097274 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1183 12:26:49.107110 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1184 12:26:49.117549 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1185 12:26:49.127004 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1186 12:26:49.127582 PCI: 01:00.0
1187 12:26:49.137042 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1188 12:26:49.140050 PCI: 00:1e.0
1189 12:26:49.150371 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1190 12:26:49.160160 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1191 12:26:49.163247 PCI: 00:1e.2 child on link 0 SPI: 00
1192 12:26:49.173114 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1193 12:26:49.176513 SPI: 00
1194 12:26:49.179541 PCI: 00:1e.3 child on link 0 SPI: 01
1195 12:26:49.189896 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1196 12:26:49.190564 SPI: 01
1197 12:26:49.196664 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1198 12:26:49.202981 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1199 12:26:49.213066 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1200 12:26:49.213611 PNP: 0c09.0
1201 12:26:49.222815 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1202 12:26:49.226344 PCI: 00:1f.3
1203 12:26:49.236073 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1204 12:26:49.246657 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1205 12:26:49.247286 PCI: 00:1f.4
1206 12:26:49.256152 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1207 12:26:49.266106 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1208 12:26:49.266686 PCI: 00:1f.5
1209 12:26:49.275800 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1210 12:26:49.282864 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1211 12:26:49.289087 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1212 12:26:49.295740 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1213 12:26:49.298627 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1214 12:26:49.302448 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1215 12:26:49.305497 PCI: 00:17.0 18 * [0x60 - 0x67] io
1216 12:26:49.309330 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1217 12:26:49.315738 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1218 12:26:49.322624 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1219 12:26:49.332486 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1220 12:26:49.338574 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1221 12:26:49.344996 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1222 12:26:49.352613 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1223 12:26:49.359042 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1224 12:26:49.362317 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1225 12:26:49.368707 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1226 12:26:49.371999 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1227 12:26:49.378699 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1228 12:26:49.381611 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1229 12:26:49.388065 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1230 12:26:49.391697 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1231 12:26:49.398313 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1232 12:26:49.401126 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1233 12:26:49.404734 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1234 12:26:49.411277 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1235 12:26:49.415028 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1236 12:26:49.421252 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1237 12:26:49.424720 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1238 12:26:49.431293 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1239 12:26:49.435232 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1240 12:26:49.441465 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1241 12:26:49.444830 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1242 12:26:49.451733 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1243 12:26:49.454668 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1244 12:26:49.461285 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1245 12:26:49.464510 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1246 12:26:49.471233 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1247 12:26:49.477493 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1248 12:26:49.481587 avoid_fixed_resources: DOMAIN: 0000
1249 12:26:49.487641 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1250 12:26:49.494567 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1251 12:26:49.501099 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1252 12:26:49.511128 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1253 12:26:49.517892 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1254 12:26:49.524454 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1255 12:26:49.530458 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1256 12:26:49.540367 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1257 12:26:49.547613 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1258 12:26:49.554321 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1259 12:26:49.563861 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1260 12:26:49.570521 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1261 12:26:49.571066 Setting resources...
1262 12:26:49.576819 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1263 12:26:49.583890 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1264 12:26:49.587007 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1265 12:26:49.590253 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1266 12:26:49.593316 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1267 12:26:49.600272 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1268 12:26:49.606993 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1269 12:26:49.613333 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1270 12:26:49.619798 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1271 12:26:49.627147 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1272 12:26:49.629745 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1273 12:26:49.636673 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1274 12:26:49.639624 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1275 12:26:49.646613 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1276 12:26:49.649808 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1277 12:26:49.656445 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1278 12:26:49.659687 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1279 12:26:49.662859 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1280 12:26:49.669392 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1281 12:26:49.673610 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1282 12:26:49.679850 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1283 12:26:49.683237 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1284 12:26:49.689538 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1285 12:26:49.693027 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1286 12:26:49.699819 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1287 12:26:49.702860 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1288 12:26:49.709759 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1289 12:26:49.712538 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1290 12:26:49.719233 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1291 12:26:49.722884 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1292 12:26:49.729596 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1293 12:26:49.732620 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1294 12:26:49.740055 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1295 12:26:49.748704 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1296 12:26:49.755685 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1297 12:26:49.762235 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1298 12:26:49.765460 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1299 12:26:49.775619 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1300 12:26:49.778841 Root Device assign_resources, bus 0 link: 0
1301 12:26:49.782031 DOMAIN: 0000 assign_resources, bus 0 link: 0
1302 12:26:49.792636 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1303 12:26:49.799163 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1304 12:26:49.809105 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1305 12:26:49.815950 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1306 12:26:49.825687 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1307 12:26:49.832570 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1308 12:26:49.838606 PCI: 00:14.0 assign_resources, bus 0 link: 0
1309 12:26:49.842247 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 12:26:49.851749 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1311 12:26:49.858667 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1312 12:26:49.865535 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1313 12:26:49.875921 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1314 12:26:49.878926 PCI: 00:15.0 assign_resources, bus 1 link: 0
1315 12:26:49.885675 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 12:26:49.892627 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1317 12:26:49.899349 PCI: 00:15.1 assign_resources, bus 2 link: 0
1318 12:26:49.902399 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 12:26:49.912052 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1320 12:26:49.918291 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1321 12:26:49.924753 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1322 12:26:49.934971 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1323 12:26:49.941492 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1324 12:26:49.948153 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1325 12:26:49.958249 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1326 12:26:49.964937 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1327 12:26:49.971075 PCI: 00:19.0 assign_resources, bus 3 link: 0
1328 12:26:49.974630 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 12:26:49.984474 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1330 12:26:49.990760 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1331 12:26:50.001348 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1332 12:26:50.004195 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1333 12:26:50.014116 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1334 12:26:50.017082 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1335 12:26:50.027147 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1336 12:26:50.033928 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1337 12:26:50.040471 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1338 12:26:50.043464 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 12:26:50.053287 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1340 12:26:50.056909 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1341 12:26:50.059992 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 12:26:50.066429 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1343 12:26:50.070216 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 12:26:50.076435 LPC: Trying to open IO window from 800 size 1ff
1345 12:26:50.083148 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1346 12:26:50.093042 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1347 12:26:50.099700 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1348 12:26:50.110060 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1349 12:26:50.113274 DOMAIN: 0000 assign_resources, bus 0 link: 0
1350 12:26:50.119546 Root Device assign_resources, bus 0 link: 0
1351 12:26:50.120075 Done setting resources.
1352 12:26:50.125950 Show resources in subtree (Root Device)...After assigning values.
1353 12:26:50.132574 Root Device child on link 0 CPU_CLUSTER: 0
1354 12:26:50.136129 CPU_CLUSTER: 0 child on link 0 APIC: 00
1355 12:26:50.136566 APIC: 00
1356 12:26:50.139312 APIC: 03
1357 12:26:50.139750 APIC: 02
1358 12:26:50.142277 APIC: 05
1359 12:26:50.142712 APIC: 01
1360 12:26:50.143055 APIC: 04
1361 12:26:50.145982 APIC: 07
1362 12:26:50.146419 APIC: 06
1363 12:26:50.149071 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1364 12:26:50.158696 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1365 12:26:50.172269 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1366 12:26:50.172794 PCI: 00:00.0
1367 12:26:50.182129 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1368 12:26:50.192010 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1369 12:26:50.202113 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1370 12:26:50.211807 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1371 12:26:50.218235 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1372 12:26:50.228598 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1373 12:26:50.238326 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1374 12:26:50.247687 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1375 12:26:50.257657 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1376 12:26:50.264546 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1377 12:26:50.274683 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1378 12:26:50.284589 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1379 12:26:50.294415 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1380 12:26:50.304053 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1381 12:26:50.313881 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1382 12:26:50.324386 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1383 12:26:50.324935 PCI: 00:02.0
1384 12:26:50.334454 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1385 12:26:50.347011 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1386 12:26:50.353656 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1387 12:26:50.356719 PCI: 00:04.0
1388 12:26:50.357166 PCI: 00:08.0
1389 12:26:50.367006 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1390 12:26:50.369793 PCI: 00:12.0
1391 12:26:50.379989 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1392 12:26:50.383098 PCI: 00:14.0 child on link 0 USB0 port 0
1393 12:26:50.396635 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1394 12:26:50.400022 USB0 port 0 child on link 0 USB2 port 0
1395 12:26:50.400563 USB2 port 0
1396 12:26:50.403481 USB2 port 1
1397 12:26:50.406041 USB2 port 2
1398 12:26:50.406511 USB2 port 3
1399 12:26:50.409563 USB2 port 5
1400 12:26:50.410095 USB2 port 6
1401 12:26:50.412625 USB2 port 9
1402 12:26:50.413077 USB3 port 0
1403 12:26:50.416534 USB3 port 1
1404 12:26:50.417070 USB3 port 2
1405 12:26:50.419625 USB3 port 3
1406 12:26:50.420072 USB3 port 4
1407 12:26:50.423014 PCI: 00:14.2
1408 12:26:50.432933 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1409 12:26:50.442587 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1410 12:26:50.445894 PCI: 00:14.3
1411 12:26:50.455874 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1412 12:26:50.458997 PCI: 00:15.0 child on link 0 I2C: 01:15
1413 12:26:50.469476 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1414 12:26:50.472188 I2C: 01:15
1415 12:26:50.475686 PCI: 00:15.1 child on link 0 I2C: 02:5d
1416 12:26:50.485909 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1417 12:26:50.486462 I2C: 02:5d
1418 12:26:50.488665 GENERIC: 0.0
1419 12:26:50.489114 PCI: 00:16.0
1420 12:26:50.502157 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1421 12:26:50.502707 PCI: 00:17.0
1422 12:26:50.512128 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1423 12:26:50.521710 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1424 12:26:50.532036 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1425 12:26:50.541895 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1426 12:26:50.551691 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1427 12:26:50.561624 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1428 12:26:50.564619 PCI: 00:19.0 child on link 0 I2C: 03:1a
1429 12:26:50.574807 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1430 12:26:50.575371 I2C: 03:1a
1431 12:26:50.577833 I2C: 03:38
1432 12:26:50.578311 I2C: 03:39
1433 12:26:50.581653 I2C: 03:3a
1434 12:26:50.582191 I2C: 03:3b
1435 12:26:50.588383 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1436 12:26:50.598029 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1437 12:26:50.607930 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1438 12:26:50.618017 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1439 12:26:50.618561 PCI: 01:00.0
1440 12:26:50.627540 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1441 12:26:50.630969 PCI: 00:1e.0
1442 12:26:50.641081 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1443 12:26:50.650702 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1444 12:26:50.657809 PCI: 00:1e.2 child on link 0 SPI: 00
1445 12:26:50.667698 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1446 12:26:50.668241 SPI: 00
1447 12:26:50.670920 PCI: 00:1e.3 child on link 0 SPI: 01
1448 12:26:50.680281 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1449 12:26:50.684209 SPI: 01
1450 12:26:50.687239 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1451 12:26:50.697099 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1452 12:26:50.703580 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1453 12:26:50.706781 PNP: 0c09.0
1454 12:26:50.717085 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1455 12:26:50.717644 PCI: 00:1f.3
1456 12:26:50.726996 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1457 12:26:50.736993 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1458 12:26:50.739847 PCI: 00:1f.4
1459 12:26:50.749562 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1460 12:26:50.760006 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1461 12:26:50.760561 PCI: 00:1f.5
1462 12:26:50.769846 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1463 12:26:50.772939 Done allocating resources.
1464 12:26:50.779199 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1465 12:26:50.783000 Enabling resources...
1466 12:26:50.786509 PCI: 00:00.0 subsystem <- 8086/9b61
1467 12:26:50.789908 PCI: 00:00.0 cmd <- 06
1468 12:26:50.792956 PCI: 00:02.0 subsystem <- 8086/9b41
1469 12:26:50.796171 PCI: 00:02.0 cmd <- 03
1470 12:26:50.796619 PCI: 00:08.0 cmd <- 06
1471 12:26:50.803176 PCI: 00:12.0 subsystem <- 8086/02f9
1472 12:26:50.803719 PCI: 00:12.0 cmd <- 02
1473 12:26:50.806255 PCI: 00:14.0 subsystem <- 8086/02ed
1474 12:26:50.809967 PCI: 00:14.0 cmd <- 02
1475 12:26:50.812626 PCI: 00:14.2 cmd <- 02
1476 12:26:50.815675 PCI: 00:14.3 subsystem <- 8086/02f0
1477 12:26:50.819522 PCI: 00:14.3 cmd <- 02
1478 12:26:50.822756 PCI: 00:15.0 subsystem <- 8086/02e8
1479 12:26:50.825645 PCI: 00:15.0 cmd <- 02
1480 12:26:50.829410 PCI: 00:15.1 subsystem <- 8086/02e9
1481 12:26:50.832412 PCI: 00:15.1 cmd <- 02
1482 12:26:50.835948 PCI: 00:16.0 subsystem <- 8086/02e0
1483 12:26:50.839240 PCI: 00:16.0 cmd <- 02
1484 12:26:50.842155 PCI: 00:17.0 subsystem <- 8086/02d3
1485 12:26:50.842603 PCI: 00:17.0 cmd <- 03
1486 12:26:50.848984 PCI: 00:19.0 subsystem <- 8086/02c5
1487 12:26:50.849434 PCI: 00:19.0 cmd <- 02
1488 12:26:50.852336 PCI: 00:1d.0 bridge ctrl <- 0013
1489 12:26:50.855487 PCI: 00:1d.0 subsystem <- 8086/02b0
1490 12:26:50.859361 PCI: 00:1d.0 cmd <- 06
1491 12:26:50.862827 PCI: 00:1e.0 subsystem <- 8086/02a8
1492 12:26:50.865625 PCI: 00:1e.0 cmd <- 06
1493 12:26:50.869053 PCI: 00:1e.2 subsystem <- 8086/02aa
1494 12:26:50.872080 PCI: 00:1e.2 cmd <- 06
1495 12:26:50.875588 PCI: 00:1e.3 subsystem <- 8086/02ab
1496 12:26:50.879073 PCI: 00:1e.3 cmd <- 02
1497 12:26:50.882352 PCI: 00:1f.0 subsystem <- 8086/0284
1498 12:26:50.886026 PCI: 00:1f.0 cmd <- 407
1499 12:26:50.889058 PCI: 00:1f.3 subsystem <- 8086/02c8
1500 12:26:50.892339 PCI: 00:1f.3 cmd <- 02
1501 12:26:50.895493 PCI: 00:1f.4 subsystem <- 8086/02a3
1502 12:26:50.898862 PCI: 00:1f.4 cmd <- 03
1503 12:26:50.902193 PCI: 00:1f.5 subsystem <- 8086/02a4
1504 12:26:50.905068 PCI: 00:1f.5 cmd <- 406
1505 12:26:50.913109 PCI: 01:00.0 cmd <- 02
1506 12:26:50.917916 done.
1507 12:26:50.929781 ME: Version: 14.0.39.1367
1508 12:26:50.936386 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 11
1509 12:26:50.939157 Initializing devices...
1510 12:26:50.939705 Root Device init ...
1511 12:26:50.945338 Chrome EC: Set SMI mask to 0x0000000000000000
1512 12:26:50.949327 Chrome EC: clear events_b mask to 0x0000000000000000
1513 12:26:50.955934 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1514 12:26:50.962590 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1515 12:26:50.969541 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1516 12:26:50.972437 Chrome EC: Set WAKE mask to 0x0000000000000000
1517 12:26:50.975700 Root Device init finished in 35161 usecs
1518 12:26:50.979532 CPU_CLUSTER: 0 init ...
1519 12:26:50.986164 CPU_CLUSTER: 0 init finished in 2447 usecs
1520 12:26:50.990022 PCI: 00:00.0 init ...
1521 12:26:50.993541 CPU TDP: 15 Watts
1522 12:26:50.997157 CPU PL2 = 64 Watts
1523 12:26:51.000224 PCI: 00:00.0 init finished in 7081 usecs
1524 12:26:51.003632 PCI: 00:02.0 init ...
1525 12:26:51.006870 PCI: 00:02.0 init finished in 2251 usecs
1526 12:26:51.009875 PCI: 00:08.0 init ...
1527 12:26:51.013252 PCI: 00:08.0 init finished in 2252 usecs
1528 12:26:51.016351 PCI: 00:12.0 init ...
1529 12:26:51.019889 PCI: 00:12.0 init finished in 2251 usecs
1530 12:26:51.022963 PCI: 00:14.0 init ...
1531 12:26:51.026445 PCI: 00:14.0 init finished in 2253 usecs
1532 12:26:51.029454 PCI: 00:14.2 init ...
1533 12:26:51.033082 PCI: 00:14.2 init finished in 2252 usecs
1534 12:26:51.036060 PCI: 00:14.3 init ...
1535 12:26:51.039888 PCI: 00:14.3 init finished in 2270 usecs
1536 12:26:51.042810 PCI: 00:15.0 init ...
1537 12:26:51.045881 DW I2C bus 0 at 0xd121f000 (400 KHz)
1538 12:26:51.049530 PCI: 00:15.0 init finished in 5975 usecs
1539 12:26:51.052898 PCI: 00:15.1 init ...
1540 12:26:51.056210 DW I2C bus 1 at 0xd1220000 (400 KHz)
1541 12:26:51.062814 PCI: 00:15.1 init finished in 5975 usecs
1542 12:26:51.063440 PCI: 00:16.0 init ...
1543 12:26:51.069398 PCI: 00:16.0 init finished in 2251 usecs
1544 12:26:51.072931 PCI: 00:19.0 init ...
1545 12:26:51.076485 DW I2C bus 4 at 0xd1222000 (400 KHz)
1546 12:26:51.079289 PCI: 00:19.0 init finished in 5974 usecs
1547 12:26:51.082626 PCI: 00:1d.0 init ...
1548 12:26:51.085913 Initializing PCH PCIe bridge.
1549 12:26:51.089213 PCI: 00:1d.0 init finished in 5285 usecs
1550 12:26:51.092288 PCI: 00:1f.0 init ...
1551 12:26:51.095864 IOAPIC: Initializing IOAPIC at 0xfec00000
1552 12:26:51.102921 IOAPIC: Bootstrap Processor Local APIC = 0x00
1553 12:26:51.103535 IOAPIC: ID = 0x02
1554 12:26:51.106198 IOAPIC: Dumping registers
1555 12:26:51.109178 reg 0x0000: 0x02000000
1556 12:26:51.112545 reg 0x0001: 0x00770020
1557 12:26:51.113096 reg 0x0002: 0x00000000
1558 12:26:51.118955 PCI: 00:1f.0 init finished in 23534 usecs
1559 12:26:51.122392 PCI: 00:1f.4 init ...
1560 12:26:51.125178 PCI: 00:1f.4 init finished in 2263 usecs
1561 12:26:51.136484 PCI: 01:00.0 init ...
1562 12:26:51.139254 PCI: 01:00.0 init finished in 2251 usecs
1563 12:26:51.143426 PNP: 0c09.0 init ...
1564 12:26:51.146935 Google Chrome EC uptime: 11.066 seconds
1565 12:26:51.153907 Google Chrome AP resets since EC boot: 0
1566 12:26:51.156922 Google Chrome most recent AP reset causes:
1567 12:26:51.163559 Google Chrome EC reset flags at last EC boot: reset-pin
1568 12:26:51.167137 PNP: 0c09.0 init finished in 20634 usecs
1569 12:26:51.170397 Devices initialized
1570 12:26:51.173299 Show all devs... After init.
1571 12:26:51.173745 Root Device: enabled 1
1572 12:26:51.176738 CPU_CLUSTER: 0: enabled 1
1573 12:26:51.180260 DOMAIN: 0000: enabled 1
1574 12:26:51.180709 APIC: 00: enabled 1
1575 12:26:51.183768 PCI: 00:00.0: enabled 1
1576 12:26:51.186916 PCI: 00:02.0: enabled 1
1577 12:26:51.189987 PCI: 00:04.0: enabled 0
1578 12:26:51.190536 PCI: 00:05.0: enabled 0
1579 12:26:51.193089 PCI: 00:12.0: enabled 1
1580 12:26:51.196397 PCI: 00:12.5: enabled 0
1581 12:26:51.200206 PCI: 00:12.6: enabled 0
1582 12:26:51.200755 PCI: 00:14.0: enabled 1
1583 12:26:51.203313 PCI: 00:14.1: enabled 0
1584 12:26:51.206769 PCI: 00:14.3: enabled 1
1585 12:26:51.207339 PCI: 00:14.5: enabled 0
1586 12:26:51.209877 PCI: 00:15.0: enabled 1
1587 12:26:51.212863 PCI: 00:15.1: enabled 1
1588 12:26:51.216418 PCI: 00:15.2: enabled 0
1589 12:26:51.216969 PCI: 00:15.3: enabled 0
1590 12:26:51.219493 PCI: 00:16.0: enabled 1
1591 12:26:51.222988 PCI: 00:16.1: enabled 0
1592 12:26:51.226595 PCI: 00:16.2: enabled 0
1593 12:26:51.227040 PCI: 00:16.3: enabled 0
1594 12:26:51.229585 PCI: 00:16.4: enabled 0
1595 12:26:51.233240 PCI: 00:16.5: enabled 0
1596 12:26:51.235934 PCI: 00:17.0: enabled 1
1597 12:26:51.236383 PCI: 00:19.0: enabled 1
1598 12:26:51.239452 PCI: 00:19.1: enabled 0
1599 12:26:51.243178 PCI: 00:19.2: enabled 0
1600 12:26:51.246060 PCI: 00:1a.0: enabled 0
1601 12:26:51.246662 PCI: 00:1c.0: enabled 0
1602 12:26:51.249759 PCI: 00:1c.1: enabled 0
1603 12:26:51.252887 PCI: 00:1c.2: enabled 0
1604 12:26:51.253330 PCI: 00:1c.3: enabled 0
1605 12:26:51.255922 PCI: 00:1c.4: enabled 0
1606 12:26:51.259343 PCI: 00:1c.5: enabled 0
1607 12:26:51.262247 PCI: 00:1c.6: enabled 0
1608 12:26:51.262652 PCI: 00:1c.7: enabled 0
1609 12:26:51.265907 PCI: 00:1d.0: enabled 1
1610 12:26:51.269320 PCI: 00:1d.1: enabled 0
1611 12:26:51.272350 PCI: 00:1d.2: enabled 0
1612 12:26:51.272760 PCI: 00:1d.3: enabled 0
1613 12:26:51.275562 PCI: 00:1d.4: enabled 0
1614 12:26:51.278906 PCI: 00:1d.5: enabled 0
1615 12:26:51.282126 PCI: 00:1e.0: enabled 1
1616 12:26:51.282537 PCI: 00:1e.1: enabled 0
1617 12:26:51.286305 PCI: 00:1e.2: enabled 1
1618 12:26:51.289475 PCI: 00:1e.3: enabled 1
1619 12:26:51.292398 PCI: 00:1f.0: enabled 1
1620 12:26:51.292809 PCI: 00:1f.1: enabled 0
1621 12:26:51.295702 PCI: 00:1f.2: enabled 0
1622 12:26:51.298804 PCI: 00:1f.3: enabled 1
1623 12:26:51.299242 PCI: 00:1f.4: enabled 1
1624 12:26:51.302335 PCI: 00:1f.5: enabled 1
1625 12:26:51.305460 PCI: 00:1f.6: enabled 0
1626 12:26:51.309056 USB0 port 0: enabled 1
1627 12:26:51.309462 I2C: 01:15: enabled 1
1628 12:26:51.312357 I2C: 02:5d: enabled 1
1629 12:26:51.315556 GENERIC: 0.0: enabled 1
1630 12:26:51.315967 I2C: 03:1a: enabled 1
1631 12:26:51.319061 I2C: 03:38: enabled 1
1632 12:26:51.322489 I2C: 03:39: enabled 1
1633 12:26:51.323004 I2C: 03:3a: enabled 1
1634 12:26:51.325334 I2C: 03:3b: enabled 1
1635 12:26:51.328888 PCI: 00:00.0: enabled 1
1636 12:26:51.329407 SPI: 00: enabled 1
1637 12:26:51.331824 SPI: 01: enabled 1
1638 12:26:51.335878 PNP: 0c09.0: enabled 1
1639 12:26:51.336396 USB2 port 0: enabled 1
1640 12:26:51.338838 USB2 port 1: enabled 1
1641 12:26:51.341927 USB2 port 2: enabled 0
1642 12:26:51.345434 USB2 port 3: enabled 0
1643 12:26:51.345841 USB2 port 5: enabled 0
1644 12:26:51.348447 USB2 port 6: enabled 1
1645 12:26:51.352102 USB2 port 9: enabled 1
1646 12:26:51.352602 USB3 port 0: enabled 1
1647 12:26:51.355178 USB3 port 1: enabled 1
1648 12:26:51.358570 USB3 port 2: enabled 1
1649 12:26:51.359123 USB3 port 3: enabled 1
1650 12:26:51.362180 USB3 port 4: enabled 0
1651 12:26:51.364835 APIC: 03: enabled 1
1652 12:26:51.365245 APIC: 02: enabled 1
1653 12:26:51.368458 APIC: 05: enabled 1
1654 12:26:51.371759 APIC: 01: enabled 1
1655 12:26:51.372289 APIC: 04: enabled 1
1656 12:26:51.375246 APIC: 07: enabled 1
1657 12:26:51.378166 APIC: 06: enabled 1
1658 12:26:51.378577 PCI: 00:08.0: enabled 1
1659 12:26:51.381763 PCI: 00:14.2: enabled 1
1660 12:26:51.385119 PCI: 01:00.0: enabled 1
1661 12:26:51.388648 Disabling ACPI via APMC:
1662 12:26:51.391675 done.
1663 12:26:51.394867 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1664 12:26:51.398858 ELOG: NV offset 0xaf0000 size 0x4000
1665 12:26:51.405585 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1666 12:26:51.411771 ELOG: Event(17) added with size 13 at 2023-03-22 12:26:51 UTC
1667 12:26:51.418749 ELOG: Event(92) added with size 9 at 2023-03-22 12:26:51 UTC
1668 12:26:51.425277 ELOG: Event(93) added with size 9 at 2023-03-22 12:26:51 UTC
1669 12:26:51.431673 ELOG: Event(9A) added with size 9 at 2023-03-22 12:26:51 UTC
1670 12:26:51.438073 ELOG: Event(9E) added with size 10 at 2023-03-22 12:26:51 UTC
1671 12:26:51.445047 ELOG: Event(9F) added with size 14 at 2023-03-22 12:26:51 UTC
1672 12:26:51.448226 BS: BS_DEV_INIT times (ms): entry 0 run 27 exit 6
1673 12:26:51.455653 ELOG: Event(A1) added with size 10 at 2023-03-22 12:26:51 UTC
1674 12:26:51.465359 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1675 12:26:51.472021 ELOG: Event(A0) added with size 9 at 2023-03-22 12:26:51 UTC
1676 12:26:51.475064 elog_add_boot_reason: Logged dev mode boot
1677 12:26:51.478548 Finalize devices...
1678 12:26:51.479158 PCI: 00:17.0 final
1679 12:26:51.481673 Devices finalized
1680 12:26:51.485580 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1681 12:26:51.491978 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1682 12:26:51.494924 ME: HFSTS1 : 0x90000245
1683 12:26:51.498481 ME: HFSTS2 : 0x3B850126
1684 12:26:51.504788 ME: HFSTS3 : 0x00000020
1685 12:26:51.507872 ME: HFSTS4 : 0x00004800
1686 12:26:51.511312 ME: HFSTS5 : 0x00000000
1687 12:26:51.515322 ME: HFSTS6 : 0x40400006
1688 12:26:51.518611 ME: Manufacturing Mode : NO
1689 12:26:51.521479 ME: FW Partition Table : OK
1690 12:26:51.524830 ME: Bringup Loader Failure : NO
1691 12:26:51.527981 ME: Firmware Init Complete : YES
1692 12:26:51.531484 ME: Boot Options Present : NO
1693 12:26:51.534901 ME: Update In Progress : NO
1694 12:26:51.538298 ME: D0i3 Support : YES
1695 12:26:51.541047 ME: Low Power State Enabled : NO
1696 12:26:51.544247 ME: CPU Replaced : NO
1697 12:26:51.548171 ME: CPU Replacement Valid : YES
1698 12:26:51.551323 ME: Current Working State : 5
1699 12:26:51.554554 ME: Current Operation State : 1
1700 12:26:51.557904 ME: Current Operation Mode : 0
1701 12:26:51.561311 ME: Error Code : 0
1702 12:26:51.564198 ME: CPU Debug Disabled : YES
1703 12:26:51.567259 ME: TXT Support : NO
1704 12:26:51.573883 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1705 12:26:51.580644 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1706 12:26:51.581189 CBFS @ c08000 size 3f8000
1707 12:26:51.587997 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1708 12:26:51.590991 CBFS: Locating 'fallback/dsdt.aml'
1709 12:26:51.597470 CBFS: Found @ offset 10bb80 size 3fa5
1710 12:26:51.600681 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1711 12:26:51.603999 CBFS @ c08000 size 3f8000
1712 12:26:51.610579 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1713 12:26:51.613733 CBFS: Locating 'fallback/slic'
1714 12:26:51.617140 CBFS: 'fallback/slic' not found.
1715 12:26:51.620361 ACPI: Writing ACPI tables at 99b3e000.
1716 12:26:51.624187 ACPI: * FACS
1717 12:26:51.624753 ACPI: * DSDT
1718 12:26:51.627286 Ramoops buffer: 0x100000@0x99a3d000.
1719 12:26:51.634079 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1720 12:26:51.637281 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1721 12:26:51.640336 Google Chrome EC: version:
1722 12:26:51.643751 ro: helios_v2.0.2659-56403530b
1723 12:26:51.647507 rw: helios_v2.0.2849-c41de27e7d
1724 12:26:51.650364 running image: 1
1725 12:26:51.653939 ACPI: * FADT
1726 12:26:51.654494 SCI is IRQ9
1727 12:26:51.657227 ACPI: added table 1/32, length now 40
1728 12:26:51.660127 ACPI: * SSDT
1729 12:26:51.663562 Found 1 CPU(s) with 8 core(s) each.
1730 12:26:51.666832 Error: Could not locate 'wifi_sar' in VPD.
1731 12:26:51.673484 Checking CBFS for default SAR values
1732 12:26:51.676322 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1733 12:26:51.679793 CBFS @ c08000 size 3f8000
1734 12:26:51.686778 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1735 12:26:51.689543 CBFS: Locating 'wifi_sar_defaults.hex'
1736 12:26:51.693101 CBFS: Found @ offset 5fac0 size 77
1737 12:26:51.696757 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1738 12:26:51.702930 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1739 12:26:51.706524 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1740 12:26:51.712828 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1741 12:26:51.716129 failed to find key in VPD: dsm_calib_r0_0
1742 12:26:51.725816 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1743 12:26:51.729435 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1744 12:26:51.733315 failed to find key in VPD: dsm_calib_r0_1
1745 12:26:51.742949 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1746 12:26:51.749102 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1747 12:26:51.752871 failed to find key in VPD: dsm_calib_r0_2
1748 12:26:51.762675 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1749 12:26:51.765953 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1750 12:26:51.772568 failed to find key in VPD: dsm_calib_r0_3
1751 12:26:51.778929 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1752 12:26:51.785648 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1753 12:26:51.789013 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1754 12:26:51.792016 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1755 12:26:51.796154 EC returned error result code 1
1756 12:26:51.800007 EC returned error result code 1
1757 12:26:51.807192 EC returned error result code 1
1758 12:26:51.810280 PS2K: Bad resp from EC. Vivaldi disabled!
1759 12:26:51.816520 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1760 12:26:51.819939 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1761 12:26:51.826896 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1762 12:26:51.830319 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1763 12:26:51.836453 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1764 12:26:51.842917 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1765 12:26:51.849726 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1766 12:26:51.856676 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1767 12:26:51.860059 ACPI: added table 2/32, length now 44
1768 12:26:51.860604 ACPI: * MCFG
1769 12:26:51.862911 ACPI: added table 3/32, length now 48
1770 12:26:51.866156 ACPI: * TPM2
1771 12:26:51.869640 TPM2 log created at 99a2d000
1772 12:26:51.872630 ACPI: added table 4/32, length now 52
1773 12:26:51.873084 ACPI: * MADT
1774 12:26:51.875925 SCI is IRQ9
1775 12:26:51.879890 ACPI: added table 5/32, length now 56
1776 12:26:51.880434 current = 99b43ac0
1777 12:26:51.883003 ACPI: * DMAR
1778 12:26:51.885895 ACPI: added table 6/32, length now 60
1779 12:26:51.889447 ACPI: * IGD OpRegion
1780 12:26:51.892618 GMA: Found VBT in CBFS
1781 12:26:51.893181 GMA: Found valid VBT in CBFS
1782 12:26:51.899204 ACPI: added table 7/32, length now 64
1783 12:26:51.899659 ACPI: * HPET
1784 12:26:51.902931 ACPI: added table 8/32, length now 68
1785 12:26:51.905919 ACPI: done.
1786 12:26:51.906370 ACPI tables: 31744 bytes.
1787 12:26:51.909911 smbios_write_tables: 99a2c000
1788 12:26:51.912481 EC returned error result code 3
1789 12:26:51.918985 Couldn't obtain OEM name from CBI
1790 12:26:51.919473 Create SMBIOS type 17
1791 12:26:51.922125 PCI: 00:00.0 (Intel Cannonlake)
1792 12:26:51.925434 PCI: 00:14.3 (Intel WiFi)
1793 12:26:51.928886 SMBIOS tables: 939 bytes.
1794 12:26:51.932598 Writing table forward entry at 0x00000500
1795 12:26:51.939008 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1796 12:26:51.942146 Writing coreboot table at 0x99b62000
1797 12:26:51.948539 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1798 12:26:51.952347 1. 0000000000001000-000000000009ffff: RAM
1799 12:26:51.959039 2. 00000000000a0000-00000000000fffff: RESERVED
1800 12:26:51.962617 3. 0000000000100000-0000000099a2bfff: RAM
1801 12:26:51.968732 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1802 12:26:51.971888 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1803 12:26:51.978712 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1804 12:26:51.981548 7. 000000009a000000-000000009f7fffff: RESERVED
1805 12:26:51.988670 8. 00000000e0000000-00000000efffffff: RESERVED
1806 12:26:51.991984 9. 00000000fc000000-00000000fc000fff: RESERVED
1807 12:26:51.998116 10. 00000000fe000000-00000000fe00ffff: RESERVED
1808 12:26:52.001139 11. 00000000fed10000-00000000fed17fff: RESERVED
1809 12:26:52.008099 12. 00000000fed80000-00000000fed83fff: RESERVED
1810 12:26:52.011493 13. 00000000fed90000-00000000fed91fff: RESERVED
1811 12:26:52.018293 14. 00000000feda0000-00000000feda1fff: RESERVED
1812 12:26:52.021278 15. 0000000100000000-000000045e7fffff: RAM
1813 12:26:52.024716 Graphics framebuffer located at 0xc0000000
1814 12:26:52.027563 Passing 5 GPIOs to payload:
1815 12:26:52.034617 NAME | PORT | POLARITY | VALUE
1816 12:26:52.037887 write protect | undefined | high | low
1817 12:26:52.044254 lid | undefined | high | high
1818 12:26:52.047317 power | undefined | high | low
1819 12:26:52.054338 oprom | undefined | high | low
1820 12:26:52.061006 EC in RW | 0x000000cb | high | low
1821 12:26:52.061554 Board ID: 4
1822 12:26:52.067742 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1823 12:26:52.068302 CBFS @ c08000 size 3f8000
1824 12:26:52.074214 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1825 12:26:52.080832 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 6264
1826 12:26:52.084028 coreboot table: 1492 bytes.
1827 12:26:52.087314 IMD ROOT 0. 99fff000 00001000
1828 12:26:52.090948 IMD SMALL 1. 99ffe000 00001000
1829 12:26:52.094310 FSP MEMORY 2. 99c4e000 003b0000
1830 12:26:52.097530 CONSOLE 3. 99c2e000 00020000
1831 12:26:52.100443 FMAP 4. 99c2d000 0000054e
1832 12:26:52.103712 TIME STAMP 5. 99c2c000 00000910
1833 12:26:52.107269 VBOOT WORK 6. 99c18000 00014000
1834 12:26:52.110164 MRC DATA 7. 99c16000 00001958
1835 12:26:52.113421 ROMSTG STCK 8. 99c15000 00001000
1836 12:26:52.116970 AFTER CAR 9. 99c0b000 0000a000
1837 12:26:52.120110 RAMSTAGE 10. 99baf000 0005c000
1838 12:26:52.123649 REFCODE 11. 99b7a000 00035000
1839 12:26:52.126473 SMM BACKUP 12. 99b6a000 00010000
1840 12:26:52.130212 COREBOOT 13. 99b62000 00008000
1841 12:26:52.133268 ACPI 14. 99b3e000 00024000
1842 12:26:52.136712 ACPI GNVS 15. 99b3d000 00001000
1843 12:26:52.139737 RAMOOPS 16. 99a3d000 00100000
1844 12:26:52.143408 TPM2 TCGLOG17. 99a2d000 00010000
1845 12:26:52.146604 SMBIOS 18. 99a2c000 00000800
1846 12:26:52.150383 IMD small region:
1847 12:26:52.153426 IMD ROOT 0. 99ffec00 00000400
1848 12:26:52.156620 FSP RUNTIME 1. 99ffebe0 00000004
1849 12:26:52.159856 EC HOSTEVENT 2. 99ffebc0 00000008
1850 12:26:52.163007 POWER STATE 3. 99ffeb80 00000040
1851 12:26:52.166381 ROMSTAGE 4. 99ffeb60 00000004
1852 12:26:52.169743 MEM INFO 5. 99ffe9a0 000001b9
1853 12:26:52.172739 VPD 6. 99ffe920 0000006c
1854 12:26:52.176118 MTRR: Physical address space:
1855 12:26:52.183305 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1856 12:26:52.189729 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1857 12:26:52.196087 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1858 12:26:52.199349 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1859 12:26:52.205848 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1860 12:26:52.212743 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1861 12:26:52.219048 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1862 12:26:52.222599 MTRR: Fixed MSR 0x250 0x0606060606060606
1863 12:26:52.228705 MTRR: Fixed MSR 0x258 0x0606060606060606
1864 12:26:52.232226 MTRR: Fixed MSR 0x259 0x0000000000000000
1865 12:26:52.235825 MTRR: Fixed MSR 0x268 0x0606060606060606
1866 12:26:52.238792 MTRR: Fixed MSR 0x269 0x0606060606060606
1867 12:26:52.245339 MTRR: Fixed MSR 0x26a 0x0606060606060606
1868 12:26:52.249037 MTRR: Fixed MSR 0x26b 0x0606060606060606
1869 12:26:52.251918 MTRR: Fixed MSR 0x26c 0x0606060606060606
1870 12:26:52.255512 MTRR: Fixed MSR 0x26d 0x0606060606060606
1871 12:26:52.262162 MTRR: Fixed MSR 0x26e 0x0606060606060606
1872 12:26:52.265673 MTRR: Fixed MSR 0x26f 0x0606060606060606
1873 12:26:52.268692 call enable_fixed_mtrr()
1874 12:26:52.272254 CPU physical address size: 39 bits
1875 12:26:52.275409 MTRR: default type WB/UC MTRR counts: 6/8.
1876 12:26:52.278900 MTRR: WB selected as default type.
1877 12:26:52.285403 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1878 12:26:52.292284 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1879 12:26:52.298400 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1880 12:26:52.305306 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1881 12:26:52.311715 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1882 12:26:52.318567 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1883 12:26:52.321532 MTRR: Fixed MSR 0x250 0x0606060606060606
1884 12:26:52.324568 MTRR: Fixed MSR 0x258 0x0606060606060606
1885 12:26:52.331243 MTRR: Fixed MSR 0x259 0x0000000000000000
1886 12:26:52.334843 MTRR: Fixed MSR 0x268 0x0606060606060606
1887 12:26:52.337753 MTRR: Fixed MSR 0x269 0x0606060606060606
1888 12:26:52.341637 MTRR: Fixed MSR 0x26a 0x0606060606060606
1889 12:26:52.344443 MTRR: Fixed MSR 0x26b 0x0606060606060606
1890 12:26:52.351263 MTRR: Fixed MSR 0x26c 0x0606060606060606
1891 12:26:52.354765 MTRR: Fixed MSR 0x26d 0x0606060606060606
1892 12:26:52.358096 MTRR: Fixed MSR 0x26e 0x0606060606060606
1893 12:26:52.361328 MTRR: Fixed MSR 0x26f 0x0606060606060606
1894 12:26:52.361818
1895 12:26:52.364179 MTRR check
1896 12:26:52.367279 Fixed MTRRs : Enabled
1897 12:26:52.367730 Variable MTRRs: Enabled
1898 12:26:52.368084
1899 12:26:52.371385 call enable_fixed_mtrr()
1900 12:26:52.377876 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1901 12:26:52.380964 CPU physical address size: 39 bits
1902 12:26:52.387597 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1903 12:26:52.391000 MTRR: Fixed MSR 0x250 0x0606060606060606
1904 12:26:52.394362 MTRR: Fixed MSR 0x250 0x0606060606060606
1905 12:26:52.397237 MTRR: Fixed MSR 0x258 0x0606060606060606
1906 12:26:52.404697 MTRR: Fixed MSR 0x259 0x0000000000000000
1907 12:26:52.407774 MTRR: Fixed MSR 0x268 0x0606060606060606
1908 12:26:52.410739 MTRR: Fixed MSR 0x269 0x0606060606060606
1909 12:26:52.414226 MTRR: Fixed MSR 0x26a 0x0606060606060606
1910 12:26:52.417446 MTRR: Fixed MSR 0x26b 0x0606060606060606
1911 12:26:52.423670 MTRR: Fixed MSR 0x26c 0x0606060606060606
1912 12:26:52.427287 MTRR: Fixed MSR 0x26d 0x0606060606060606
1913 12:26:52.430426 MTRR: Fixed MSR 0x26e 0x0606060606060606
1914 12:26:52.434094 MTRR: Fixed MSR 0x26f 0x0606060606060606
1915 12:26:52.440429 MTRR: Fixed MSR 0x258 0x0606060606060606
1916 12:26:52.443768 call enable_fixed_mtrr()
1917 12:26:52.446748 MTRR: Fixed MSR 0x259 0x0000000000000000
1918 12:26:52.450559 MTRR: Fixed MSR 0x268 0x0606060606060606
1919 12:26:52.453302 MTRR: Fixed MSR 0x269 0x0606060606060606
1920 12:26:52.456776 MTRR: Fixed MSR 0x26a 0x0606060606060606
1921 12:26:52.463622 MTRR: Fixed MSR 0x26b 0x0606060606060606
1922 12:26:52.466803 MTRR: Fixed MSR 0x26c 0x0606060606060606
1923 12:26:52.470547 MTRR: Fixed MSR 0x26d 0x0606060606060606
1924 12:26:52.473345 MTRR: Fixed MSR 0x26e 0x0606060606060606
1925 12:26:52.479729 MTRR: Fixed MSR 0x26f 0x0606060606060606
1926 12:26:52.482982 CPU physical address size: 39 bits
1927 12:26:52.486578 call enable_fixed_mtrr()
1928 12:26:52.490046 MTRR: Fixed MSR 0x250 0x0606060606060606
1929 12:26:52.493208 MTRR: Fixed MSR 0x258 0x0606060606060606
1930 12:26:52.496119 MTRR: Fixed MSR 0x259 0x0000000000000000
1931 12:26:52.503692 MTRR: Fixed MSR 0x268 0x0606060606060606
1932 12:26:52.506510 MTRR: Fixed MSR 0x269 0x0606060606060606
1933 12:26:52.510200 MTRR: Fixed MSR 0x26a 0x0606060606060606
1934 12:26:52.513297 MTRR: Fixed MSR 0x26b 0x0606060606060606
1935 12:26:52.519651 MTRR: Fixed MSR 0x26c 0x0606060606060606
1936 12:26:52.522927 MTRR: Fixed MSR 0x26d 0x0606060606060606
1937 12:26:52.525816 MTRR: Fixed MSR 0x26e 0x0606060606060606
1938 12:26:52.529119 MTRR: Fixed MSR 0x26f 0x0606060606060606
1939 12:26:52.536584 MTRR: Fixed MSR 0x250 0x0606060606060606
1940 12:26:52.537155 call enable_fixed_mtrr()
1941 12:26:52.543310 MTRR: Fixed MSR 0x258 0x0606060606060606
1942 12:26:52.546271 MTRR: Fixed MSR 0x259 0x0000000000000000
1943 12:26:52.549611 MTRR: Fixed MSR 0x268 0x0606060606060606
1944 12:26:52.552876 MTRR: Fixed MSR 0x269 0x0606060606060606
1945 12:26:52.556409 MTRR: Fixed MSR 0x26a 0x0606060606060606
1946 12:26:52.563023 MTRR: Fixed MSR 0x26b 0x0606060606060606
1947 12:26:52.566249 MTRR: Fixed MSR 0x26c 0x0606060606060606
1948 12:26:52.569478 MTRR: Fixed MSR 0x26d 0x0606060606060606
1949 12:26:52.572729 MTRR: Fixed MSR 0x26e 0x0606060606060606
1950 12:26:52.579437 MTRR: Fixed MSR 0x26f 0x0606060606060606
1951 12:26:52.582486 CPU physical address size: 39 bits
1952 12:26:52.585948 call enable_fixed_mtrr()
1953 12:26:52.589220 CPU physical address size: 39 bits
1954 12:26:52.592662 MTRR: Fixed MSR 0x250 0x0606060606060606
1955 12:26:52.596822 MTRR: Fixed MSR 0x250 0x0606060606060606
1956 12:26:52.599150 MTRR: Fixed MSR 0x258 0x0606060606060606
1957 12:26:52.605784 MTRR: Fixed MSR 0x259 0x0000000000000000
1958 12:26:52.609545 MTRR: Fixed MSR 0x268 0x0606060606060606
1959 12:26:52.612476 MTRR: Fixed MSR 0x269 0x0606060606060606
1960 12:26:52.616046 MTRR: Fixed MSR 0x26a 0x0606060606060606
1961 12:26:52.622305 MTRR: Fixed MSR 0x26b 0x0606060606060606
1962 12:26:52.625314 MTRR: Fixed MSR 0x26c 0x0606060606060606
1963 12:26:52.628562 MTRR: Fixed MSR 0x26d 0x0606060606060606
1964 12:26:52.632541 MTRR: Fixed MSR 0x26e 0x0606060606060606
1965 12:26:52.639239 MTRR: Fixed MSR 0x26f 0x0606060606060606
1966 12:26:52.642272 MTRR: Fixed MSR 0x258 0x0606060606060606
1967 12:26:52.645611 MTRR: Fixed MSR 0x259 0x0000000000000000
1968 12:26:52.648435 MTRR: Fixed MSR 0x268 0x0606060606060606
1969 12:26:52.655066 MTRR: Fixed MSR 0x269 0x0606060606060606
1970 12:26:52.658813 MTRR: Fixed MSR 0x26a 0x0606060606060606
1971 12:26:52.661872 MTRR: Fixed MSR 0x26b 0x0606060606060606
1972 12:26:52.665356 MTRR: Fixed MSR 0x26c 0x0606060606060606
1973 12:26:52.671673 MTRR: Fixed MSR 0x26d 0x0606060606060606
1974 12:26:52.675249 MTRR: Fixed MSR 0x26e 0x0606060606060606
1975 12:26:52.678607 MTRR: Fixed MSR 0x26f 0x0606060606060606
1976 12:26:52.681887 call enable_fixed_mtrr()
1977 12:26:52.685691 call enable_fixed_mtrr()
1978 12:26:52.688558 CPU physical address size: 39 bits
1979 12:26:52.691441 CPU physical address size: 39 bits
1980 12:26:52.695215 CPU physical address size: 39 bits
1981 12:26:52.698049 CBFS @ c08000 size 3f8000
1982 12:26:52.704956 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1983 12:26:52.707780 CBFS: Locating 'fallback/payload'
1984 12:26:52.711806 CBFS: Found @ offset 1c96c0 size 3f798
1985 12:26:52.715291 Checking segment from ROM address 0xffdd16f8
1986 12:26:52.721600 Checking segment from ROM address 0xffdd1714
1987 12:26:52.724713 Loading segment from ROM address 0xffdd16f8
1988 12:26:52.727831 code (compression=0)
1989 12:26:52.734742 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1990 12:26:52.744233 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1991 12:26:52.747574 it's not compressed!
1992 12:26:52.839056 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1993 12:26:52.845406 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1994 12:26:52.848728 Loading segment from ROM address 0xffdd1714
1995 12:26:52.851906 Entry Point 0x30000000
1996 12:26:52.855022 Loaded segments
1997 12:26:52.860923 Finalizing chipset.
1998 12:26:52.863934 Finalizing SMM.
1999 12:26:52.867055 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 89 exit 5
2000 12:26:52.870881 mp_park_aps done after 0 msecs.
2001 12:26:52.877579 Jumping to boot code at 30000000(99b62000)
2002 12:26:52.883735 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2003 12:26:52.884260
2004 12:26:52.884619
2005 12:26:52.884966
2006 12:26:52.887317 Starting depthcharge on Helios...
2007 12:26:52.887759
2008 12:26:52.888776 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2009 12:26:52.889404 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2010 12:26:52.889885 Setting prompt string to ['hatch:']
2011 12:26:52.890294 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2012 12:26:52.897227 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2013 12:26:52.897787
2014 12:26:52.904045 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2015 12:26:52.904584
2016 12:26:52.910646 board_setup: Info: eMMC controller not present; skipping
2017 12:26:52.911234
2018 12:26:52.913817 New NVMe Controller 0x30053ac0 @ 00:1d:00
2019 12:26:52.914361
2020 12:26:52.920219 board_setup: Info: SDHCI controller not present; skipping
2021 12:26:52.920763
2022 12:26:52.926664 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2023 12:26:52.927254
2024 12:26:52.927615 Wipe memory regions:
2025 12:26:52.927938
2026 12:26:52.929700 [0x00000000001000, 0x000000000a0000)
2027 12:26:52.930138
2028 12:26:52.936325 [0x00000000100000, 0x00000030000000)
2029 12:26:53.000153
2030 12:26:53.003203 [0x00000030657430, 0x00000099a2c000)
2031 12:26:53.150296
2032 12:26:53.152800 [0x00000100000000, 0x0000045e800000)
2033 12:26:54.611065
2034 12:26:54.611634 R8152: Initializing
2035 12:26:54.611989
2036 12:26:54.614246 Version 9 (ocp_data = 6010)
2037 12:26:54.617906
2038 12:26:54.618448 R8152: Done initializing
2039 12:26:54.618930
2040 12:26:54.621143 Adding net device
2041 12:26:55.104442
2042 12:26:55.104981 R8152: Initializing
2043 12:26:55.105327
2044 12:26:55.107197 Version 6 (ocp_data = 5c30)
2045 12:26:55.107628
2046 12:26:55.110368 R8152: Done initializing
2047 12:26:55.110792
2048 12:26:55.113459 net_add_device: Attemp to include the same device
2049 12:26:55.117420
2050 12:26:55.124263 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2051 12:26:55.124825
2052 12:26:55.125176
2053 12:26:55.125492
2054 12:26:55.126206 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2056 12:26:55.227828 hatch: tftpboot 192.168.201.1 9729461/tftp-deploy-2j210pwj/kernel/bzImage 9729461/tftp-deploy-2j210pwj/kernel/cmdline 9729461/tftp-deploy-2j210pwj/ramdisk/ramdisk.cpio.gz
2057 12:26:55.228471 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2058 12:26:55.228895 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2059 12:26:55.234047 tftpboot 192.168.201.1 9729461/tftp-deploy-2j210pwj/kernel/bzImoy-2j210pwj/kernel/cmdline 9729461/tftp-deploy-2j210pwj/ramdisk/ramdisk.cpio.gz
2060 12:26:55.234510
2061 12:26:55.234861 Waiting for link
2062 12:26:55.435192
2063 12:26:55.435727 done.
2064 12:26:55.436080
2065 12:26:55.436411 MAC: 00:24:32:50:1a:59
2066 12:26:55.436732
2067 12:26:55.438374 Sending DHCP discover... done.
2068 12:26:55.438812
2069 12:26:55.441813 Waiting for reply... done.
2070 12:26:55.442407
2071 12:26:55.444800 Sending DHCP request... done.
2072 12:26:55.445240
2073 12:26:55.448406 Waiting for reply... done.
2074 12:26:55.448992
2075 12:26:55.451387 My ip is 192.168.201.14
2076 12:26:55.451824
2077 12:26:55.454555 The DHCP server ip is 192.168.201.1
2078 12:26:55.455020
2079 12:26:55.457958 TFTP server IP predefined by user: 192.168.201.1
2080 12:26:55.458506
2081 12:26:55.464439 Bootfile predefined by user: 9729461/tftp-deploy-2j210pwj/kernel/bzImage
2082 12:26:55.464980
2083 12:26:55.467457 Sending tftp read request... done.
2084 12:26:55.470556
2085 12:26:55.475673 Waiting for the transfer...
2086 12:26:55.476221
2087 12:26:56.201209 00000000 ################################################################
2088 12:26:56.201688
2089 12:26:56.924505 00080000 ################################################################
2090 12:26:56.925020
2091 12:26:57.663414 00100000 ################################################################
2092 12:26:57.664006
2093 12:26:58.394163 00180000 ################################################################
2094 12:26:58.394717
2095 12:26:59.134507 00200000 ################################################################
2096 12:26:59.135280
2097 12:26:59.868273 00280000 ################################################################
2098 12:26:59.868771
2099 12:27:00.584323 00300000 ################################################################
2100 12:27:00.584861
2101 12:27:01.321706 00380000 ################################################################
2102 12:27:01.322282
2103 12:27:02.067734 00400000 ################################################################
2104 12:27:02.068299
2105 12:27:02.740665 00480000 ################################################################
2106 12:27:02.740835
2107 12:27:03.446608 00500000 ################################################################
2108 12:27:03.447224
2109 12:27:04.140230 00580000 ################################################################
2110 12:27:04.140399
2111 12:27:04.828702 00600000 ################################################################
2112 12:27:04.829265
2113 12:27:05.562181 00680000 ################################################################
2114 12:27:05.562720
2115 12:27:06.274864 00700000 ################################################################
2116 12:27:06.275400
2117 12:27:06.980311 00780000 ################################################################
2118 12:27:06.980843
2119 12:27:07.703876 00800000 ################################################################
2120 12:27:07.704405
2121 12:27:08.441904 00880000 ################################################################
2122 12:27:08.442471
2123 12:27:08.994587 00900000 ################################################# done.
2124 12:27:08.995179
2125 12:27:08.998134 The bootfile was 9834496 bytes long.
2126 12:27:08.998696
2127 12:27:09.000986 Sending tftp read request... done.
2128 12:27:09.001428
2129 12:27:09.004099 Waiting for the transfer...
2130 12:27:09.004555
2131 12:27:09.675718 00000000 ################################################################
2132 12:27:09.676220
2133 12:27:10.346397 00080000 ################################################################
2134 12:27:10.346938
2135 12:27:11.026663 00100000 ################################################################
2136 12:27:11.027257
2137 12:27:11.726618 00180000 ################################################################
2138 12:27:11.727174
2139 12:27:12.423256 00200000 ################################################################
2140 12:27:12.423809
2141 12:27:13.113300 00280000 ################################################################
2142 12:27:13.113864
2143 12:27:13.808099 00300000 ################################################################
2144 12:27:13.808673
2145 12:27:14.498329 00380000 ################################################################
2146 12:27:14.498867
2147 12:27:15.191984 00400000 ################################################################
2148 12:27:15.192577
2149 12:27:15.884087 00480000 ################################################################
2150 12:27:15.884628
2151 12:27:16.578399 00500000 ################################################################
2152 12:27:16.578957
2153 12:27:17.278481 00580000 ################################################################
2154 12:27:17.279051
2155 12:27:17.371398 00600000 ######### done.
2156 12:27:17.371938
2157 12:27:17.374917 Sending tftp read request... done.
2158 12:27:17.375400
2159 12:27:17.378039 Waiting for the transfer...
2160 12:27:17.378481
2161 12:27:17.378890 00000000 # done.
2162 12:27:17.379300
2163 12:27:17.387848 Command line loaded dynamically from TFTP file: 9729461/tftp-deploy-2j210pwj/kernel/cmdline
2164 12:27:17.388372
2165 12:27:17.411584 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/9729461/extract-nfsrootfs-2y6inzqr,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2166 12:27:17.412139
2167 12:27:17.417819 ec_init(0): CrosEC protocol v3 supported (256, 256)
2168 12:27:17.421990
2169 12:27:17.425058 Shutting down all USB controllers.
2170 12:27:17.425611
2171 12:27:17.425964 Removing current net device
2172 12:27:17.428577
2173 12:27:17.429019 Finalizing coreboot
2174 12:27:17.429382
2175 12:27:17.435029 Exiting depthcharge with code 4 at timestamp: 31926720
2176 12:27:17.435568
2177 12:27:17.435922
2178 12:27:17.436249 Starting kernel ...
2179 12:27:17.436565
2180 12:27:17.437798 end: 2.2.4 bootloader-commands (duration 00:00:25) [common]
2181 12:27:17.438353 start: 2.2.5 auto-login-action (timeout 00:04:17) [common]
2182 12:27:17.438770 Setting prompt string to ['Linux version [0-9]']
2183 12:27:17.439178 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2184 12:27:17.439546 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2185 12:27:17.440404
2187 12:31:34.438606 end: 2.2.5 auto-login-action (duration 00:04:17) [common]
2189 12:31:34.438843 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 257 seconds'
2191 12:31:34.439024 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2194 12:31:34.439339 end: 2 depthcharge-action (duration 00:05:00) [common]
2196 12:31:34.439598 Cleaning after the job
2197 12:31:34.439703 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729461/tftp-deploy-2j210pwj/ramdisk
2198 12:31:34.440246 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729461/tftp-deploy-2j210pwj/kernel
2199 12:31:34.440954 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729461/tftp-deploy-2j210pwj/nfsrootfs
2200 12:31:34.489090 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/9729461/tftp-deploy-2j210pwj/modules
2201 12:31:34.489609 start: 4.1 power-off (timeout 00:00:30) [common]
2202 12:31:34.489794 Calling: 'nice' 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-4' '--port=1' '--command=off'
2203 12:31:34.565301 >> Command sent successfully.
2204 12:31:34.567739 Returned 0 in 0 seconds
2205 12:31:34.668564 end: 4.1 power-off (duration 00:00:00) [common]
2207 12:31:34.668951 start: 4.2 read-feedback (timeout 00:10:00) [common]
2208 12:31:34.669221 Listened to connection for namespace 'common' for up to 1s
2210 12:31:34.669821 Listened to connection for namespace 'common' for up to 1s
2211 12:31:35.671904 Finalising connection for namespace 'common'
2212 12:31:35.672607 Disconnecting from shell: Finalise
2213 12:31:35.673000
2214 12:31:35.774279 end: 4.2 read-feedback (duration 00:00:01) [common]
2215 12:31:35.774850 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/9729461
2216 12:31:35.940243 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/9729461
2217 12:31:35.940458 JobError: Your job cannot terminate cleanly.