Boot log: asus-cx9400-volteer
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 00:48:21.402811 lava-dispatcher, installed at version: 2023.03
2 00:48:21.403018 start: 0 validate
3 00:48:21.403140 Start time: 2023-05-23 00:48:21.403133+00:00 (UTC)
4 00:48:21.403254 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:48:21.403382 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230512.0%2Famd64%2Finitrd.cpio.gz exists
6 00:48:21.692047 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:48:21.692841 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.280-cip95-rt30%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 00:48:21.983871 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:48:21.984680 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye%2F20230512.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 00:48:22.273747 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:48:22.274516 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.280-cip95-rt30%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 00:48:22.563646 validate duration: 1.16
14 00:48:22.564047 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 00:48:22.564187 start: 1.1 download-retry (timeout 00:10:00) [common]
16 00:48:22.564313 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 00:48:22.564479 Not decompressing ramdisk as can be used compressed.
18 00:48:22.564601 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230512.0/amd64/initrd.cpio.gz
19 00:48:22.564701 saving as /var/lib/lava/dispatcher/tmp/10419539/tftp-deploy-ypnugl2a/ramdisk/initrd.cpio.gz
20 00:48:22.564799 total size: 5432841 (5MB)
21 00:48:22.566234 progress 0% (0MB)
22 00:48:22.568759 progress 5% (0MB)
23 00:48:22.571024 progress 10% (0MB)
24 00:48:22.573273 progress 15% (0MB)
25 00:48:22.575760 progress 20% (1MB)
26 00:48:22.577995 progress 25% (1MB)
27 00:48:22.580260 progress 30% (1MB)
28 00:48:22.582743 progress 35% (1MB)
29 00:48:22.585010 progress 40% (2MB)
30 00:48:22.587229 progress 45% (2MB)
31 00:48:22.589538 progress 50% (2MB)
32 00:48:22.592073 progress 55% (2MB)
33 00:48:22.594295 progress 60% (3MB)
34 00:48:22.596555 progress 65% (3MB)
35 00:48:22.599017 progress 70% (3MB)
36 00:48:22.601278 progress 75% (3MB)
37 00:48:22.603498 progress 80% (4MB)
38 00:48:22.605679 progress 85% (4MB)
39 00:48:22.608162 progress 90% (4MB)
40 00:48:22.610339 progress 95% (4MB)
41 00:48:22.612605 progress 100% (5MB)
42 00:48:22.612931 5MB downloaded in 0.05s (107.66MB/s)
43 00:48:22.613143 end: 1.1.1 http-download (duration 00:00:00) [common]
45 00:48:22.613512 end: 1.1 download-retry (duration 00:00:00) [common]
46 00:48:22.613638 start: 1.2 download-retry (timeout 00:10:00) [common]
47 00:48:22.613764 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 00:48:22.613954 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.280-cip95-rt30/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 00:48:22.614063 saving as /var/lib/lava/dispatcher/tmp/10419539/tftp-deploy-ypnugl2a/kernel/bzImage
50 00:48:22.614160 total size: 10862592 (10MB)
51 00:48:22.614256 No compression specified
52 00:48:22.615784 progress 0% (0MB)
53 00:48:22.618631 progress 5% (0MB)
54 00:48:22.621574 progress 10% (1MB)
55 00:48:22.624301 progress 15% (1MB)
56 00:48:22.627142 progress 20% (2MB)
57 00:48:22.629867 progress 25% (2MB)
58 00:48:22.632865 progress 30% (3MB)
59 00:48:22.635796 progress 35% (3MB)
60 00:48:22.638623 progress 40% (4MB)
61 00:48:22.641549 progress 45% (4MB)
62 00:48:22.644261 progress 50% (5MB)
63 00:48:22.647090 progress 55% (5MB)
64 00:48:22.649791 progress 60% (6MB)
65 00:48:22.652658 progress 65% (6MB)
66 00:48:22.655455 progress 70% (7MB)
67 00:48:22.658191 progress 75% (7MB)
68 00:48:22.661152 progress 80% (8MB)
69 00:48:22.663869 progress 85% (8MB)
70 00:48:22.666738 progress 90% (9MB)
71 00:48:22.669415 progress 95% (9MB)
72 00:48:22.672275 progress 100% (10MB)
73 00:48:22.672448 10MB downloaded in 0.06s (177.74MB/s)
74 00:48:22.672589 end: 1.2.1 http-download (duration 00:00:00) [common]
76 00:48:22.672815 end: 1.2 download-retry (duration 00:00:00) [common]
77 00:48:22.672899 start: 1.3 download-retry (timeout 00:10:00) [common]
78 00:48:22.672982 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 00:48:22.673120 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye/20230512.0/amd64/full.rootfs.tar.xz
80 00:48:22.673189 saving as /var/lib/lava/dispatcher/tmp/10419539/tftp-deploy-ypnugl2a/nfsrootfs/full.rootfs.tar
81 00:48:22.673248 total size: 133405360 (127MB)
82 00:48:22.673307 Using unxz to decompress xz
83 00:48:22.677035 progress 0% (0MB)
84 00:48:23.022600 progress 5% (6MB)
85 00:48:23.383206 progress 10% (12MB)
86 00:48:23.678265 progress 15% (19MB)
87 00:48:23.882096 progress 20% (25MB)
88 00:48:24.130212 progress 25% (31MB)
89 00:48:24.479263 progress 30% (38MB)
90 00:48:24.828377 progress 35% (44MB)
91 00:48:25.231911 progress 40% (50MB)
92 00:48:25.624206 progress 45% (57MB)
93 00:48:25.982979 progress 50% (63MB)
94 00:48:26.366098 progress 55% (70MB)
95 00:48:26.734323 progress 60% (76MB)
96 00:48:27.104663 progress 65% (82MB)
97 00:48:27.472695 progress 70% (89MB)
98 00:48:27.845828 progress 75% (95MB)
99 00:48:28.292661 progress 80% (101MB)
100 00:48:28.736623 progress 85% (108MB)
101 00:48:29.021090 progress 90% (114MB)
102 00:48:29.387416 progress 95% (120MB)
103 00:48:29.789227 progress 100% (127MB)
104 00:48:29.794253 127MB downloaded in 7.12s (17.87MB/s)
105 00:48:29.794648 end: 1.3.1 http-download (duration 00:00:07) [common]
107 00:48:29.795063 end: 1.3 download-retry (duration 00:00:07) [common]
108 00:48:29.795201 start: 1.4 download-retry (timeout 00:09:53) [common]
109 00:48:29.795339 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 00:48:29.795555 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.280-cip95-rt30/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 00:48:29.795669 saving as /var/lib/lava/dispatcher/tmp/10419539/tftp-deploy-ypnugl2a/modules/modules.tar
112 00:48:29.795769 total size: 484052 (0MB)
113 00:48:29.795871 Using unxz to decompress xz
114 00:48:29.800639 progress 6% (0MB)
115 00:48:29.801206 progress 13% (0MB)
116 00:48:29.801575 progress 20% (0MB)
117 00:48:29.802794 progress 27% (0MB)
118 00:48:29.804864 progress 33% (0MB)
119 00:48:29.806680 progress 40% (0MB)
120 00:48:29.808871 progress 47% (0MB)
121 00:48:29.810790 progress 54% (0MB)
122 00:48:29.812857 progress 60% (0MB)
123 00:48:29.814716 progress 67% (0MB)
124 00:48:29.816854 progress 74% (0MB)
125 00:48:29.819388 progress 81% (0MB)
126 00:48:29.821440 progress 88% (0MB)
127 00:48:29.823215 progress 94% (0MB)
128 00:48:29.825628 progress 100% (0MB)
129 00:48:29.831868 0MB downloaded in 0.04s (12.79MB/s)
130 00:48:29.832247 end: 1.4.1 http-download (duration 00:00:00) [common]
132 00:48:29.832680 end: 1.4 download-retry (duration 00:00:00) [common]
133 00:48:29.832823 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 00:48:29.832967 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 00:48:31.900590 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10419539/extract-nfsrootfs-7tifxep1
136 00:48:31.900778 end: 1.5.1 extract-nfsrootfs (duration 00:00:02) [common]
137 00:48:31.900876 start: 1.5.2 lava-overlay (timeout 00:09:51) [common]
138 00:48:31.901076 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux
139 00:48:31.901199 makedir: /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin
140 00:48:31.901298 makedir: /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/tests
141 00:48:31.901391 makedir: /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/results
142 00:48:31.901490 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-add-keys
143 00:48:31.901625 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-add-sources
144 00:48:31.901754 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-background-process-start
145 00:48:31.901878 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-background-process-stop
146 00:48:31.901998 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-common-functions
147 00:48:31.902117 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-echo-ipv4
148 00:48:31.902236 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-install-packages
149 00:48:31.902354 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-installed-packages
150 00:48:31.902472 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-os-build
151 00:48:31.902591 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-probe-channel
152 00:48:31.902710 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-probe-ip
153 00:48:31.902827 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-target-ip
154 00:48:31.902944 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-target-mac
155 00:48:31.903060 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-target-storage
156 00:48:31.903180 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-test-case
157 00:48:31.903301 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-test-event
158 00:48:31.903418 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-test-feedback
159 00:48:31.903536 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-test-raise
160 00:48:31.903652 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-test-reference
161 00:48:31.903775 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-test-runner
162 00:48:31.903909 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-test-set
163 00:48:31.904053 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-test-shell
164 00:48:31.904174 Updating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-install-packages (oe)
165 00:48:31.904327 Updating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/bin/lava-installed-packages (oe)
166 00:48:31.904450 Creating /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/environment
167 00:48:31.904542 LAVA metadata
168 00:48:31.904619 - LAVA_JOB_ID=10419539
169 00:48:31.904681 - LAVA_DISPATCHER_IP=192.168.201.1
170 00:48:31.904779 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:51) [common]
171 00:48:31.904842 skipped lava-vland-overlay
172 00:48:31.904915 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 00:48:31.904991 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:51) [common]
174 00:48:31.905051 skipped lava-multinode-overlay
175 00:48:31.905120 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 00:48:31.905196 start: 1.5.2.3 test-definition (timeout 00:09:51) [common]
177 00:48:31.905267 Loading test definitions
178 00:48:31.905354 start: 1.5.2.3.1 inline-repo-action (timeout 00:09:51) [common]
179 00:48:31.905422 Using /lava-10419539 at stage 0
180 00:48:31.905714 uuid=10419539_1.5.2.3.1 testdef=None
181 00:48:31.905801 end: 1.5.2.3.1 inline-repo-action (duration 00:00:00) [common]
182 00:48:31.905883 start: 1.5.2.3.2 test-overlay (timeout 00:09:51) [common]
183 00:48:31.906377 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
185 00:48:31.906592 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:51) [common]
186 00:48:31.907218 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
188 00:48:31.907444 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:51) [common]
189 00:48:31.908100 runner path: /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/0/tests/0_dmesg test_uuid 10419539_1.5.2.3.1
190 00:48:31.908252 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
192 00:48:31.908472 start: 1.5.2.3.5 inline-repo-action (timeout 00:09:51) [common]
193 00:48:31.908542 Using /lava-10419539 at stage 1
194 00:48:31.908820 uuid=10419539_1.5.2.3.5 testdef=None
195 00:48:31.908905 end: 1.5.2.3.5 inline-repo-action (duration 00:00:00) [common]
196 00:48:31.908986 start: 1.5.2.3.6 test-overlay (timeout 00:09:51) [common]
197 00:48:31.909438 end: 1.5.2.3.6 test-overlay (duration 00:00:00) [common]
199 00:48:31.909647 start: 1.5.2.3.7 test-install-overlay (timeout 00:09:51) [common]
200 00:48:31.910270 end: 1.5.2.3.7 test-install-overlay (duration 00:00:00) [common]
202 00:48:31.910493 start: 1.5.2.3.8 test-runscript-overlay (timeout 00:09:51) [common]
203 00:48:31.911099 runner path: /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/1/tests/1_bootrr test_uuid 10419539_1.5.2.3.5
204 00:48:31.911246 end: 1.5.2.3.8 test-runscript-overlay (duration 00:00:00) [common]
206 00:48:31.911447 Creating lava-test-runner.conf files
207 00:48:31.911508 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/0 for stage 0
208 00:48:31.911595 - 0_dmesg
209 00:48:31.911671 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10419539/lava-overlay-uu9jj2ux/lava-10419539/1 for stage 1
210 00:48:31.911757 - 1_bootrr
211 00:48:31.911848 end: 1.5.2.3 test-definition (duration 00:00:00) [common]
212 00:48:31.911931 start: 1.5.2.4 compress-overlay (timeout 00:09:51) [common]
213 00:48:31.919328 end: 1.5.2.4 compress-overlay (duration 00:00:00) [common]
214 00:48:31.919436 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:51) [common]
215 00:48:31.919519 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
216 00:48:31.919603 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
217 00:48:31.919684 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:51) [common]
218 00:48:32.053480 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
219 00:48:32.053901 start: 1.5.4 extract-modules (timeout 00:09:51) [common]
220 00:48:32.054050 extracting modules file /var/lib/lava/dispatcher/tmp/10419539/tftp-deploy-ypnugl2a/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10419539/extract-nfsrootfs-7tifxep1
221 00:48:32.082051 extracting modules file /var/lib/lava/dispatcher/tmp/10419539/tftp-deploy-ypnugl2a/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10419539/extract-overlay-ramdisk-_fkyrfyn/ramdisk
222 00:48:32.110434 end: 1.5.4 extract-modules (duration 00:00:00) [common]
223 00:48:32.110628 start: 1.5.5 apply-overlay-tftp (timeout 00:09:50) [common]
224 00:48:32.110754 [common] Applying overlay to NFS
225 00:48:32.110858 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10419539/compress-overlay-lzi8yfjy/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10419539/extract-nfsrootfs-7tifxep1
226 00:48:32.119091 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
227 00:48:32.119212 start: 1.5.6 configure-preseed-file (timeout 00:09:50) [common]
228 00:48:32.119304 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
229 00:48:32.119393 start: 1.5.7 compress-ramdisk (timeout 00:09:50) [common]
230 00:48:32.119478 Building ramdisk /var/lib/lava/dispatcher/tmp/10419539/extract-overlay-ramdisk-_fkyrfyn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10419539/extract-overlay-ramdisk-_fkyrfyn/ramdisk
231 00:48:32.193627 >> 30349 blocks
232 00:48:32.783815 rename /var/lib/lava/dispatcher/tmp/10419539/extract-overlay-ramdisk-_fkyrfyn/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10419539/tftp-deploy-ypnugl2a/ramdisk/ramdisk.cpio.gz
233 00:48:32.784283 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
234 00:48:32.784402 start: 1.5.8 prepare-kernel (timeout 00:09:50) [common]
235 00:48:32.784505 start: 1.5.8.1 prepare-fit (timeout 00:09:50) [common]
236 00:48:32.784596 No mkimage arch provided, not using FIT.
237 00:48:32.784686 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
238 00:48:32.784774 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
239 00:48:32.784881 end: 1.5 prepare-tftp-overlay (duration 00:00:03) [common]
240 00:48:32.784973 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:50) [common]
241 00:48:32.785052 No LXC device requested
242 00:48:32.785131 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
243 00:48:32.785218 start: 1.7 deploy-device-env (timeout 00:09:50) [common]
244 00:48:32.785300 end: 1.7 deploy-device-env (duration 00:00:00) [common]
245 00:48:32.785372 Checking files for TFTP limit of 4294967296 bytes.
246 00:48:32.785776 end: 1 tftp-deploy (duration 00:00:10) [common]
247 00:48:32.785878 start: 2 depthcharge-action (timeout 00:05:00) [common]
248 00:48:32.785972 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
249 00:48:32.786098 substitutions:
250 00:48:32.786167 - {DTB}: None
251 00:48:32.786233 - {INITRD}: 10419539/tftp-deploy-ypnugl2a/ramdisk/ramdisk.cpio.gz
252 00:48:32.786292 - {KERNEL}: 10419539/tftp-deploy-ypnugl2a/kernel/bzImage
253 00:48:32.786350 - {LAVA_MAC}: None
254 00:48:32.786407 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10419539/extract-nfsrootfs-7tifxep1
255 00:48:32.786464 - {NFS_SERVER_IP}: 192.168.201.1
256 00:48:32.786520 - {PRESEED_CONFIG}: None
257 00:48:32.786576 - {PRESEED_LOCAL}: None
258 00:48:32.786631 - {RAMDISK}: 10419539/tftp-deploy-ypnugl2a/ramdisk/ramdisk.cpio.gz
259 00:48:32.786687 - {ROOT_PART}: None
260 00:48:32.786741 - {ROOT}: None
261 00:48:32.786796 - {SERVER_IP}: 192.168.201.1
262 00:48:32.786850 - {TEE}: None
263 00:48:32.786903 Parsed boot commands:
264 00:48:32.786957 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
265 00:48:32.787131 Parsed boot commands: tftpboot 192.168.201.1 10419539/tftp-deploy-ypnugl2a/kernel/bzImage 10419539/tftp-deploy-ypnugl2a/kernel/cmdline 10419539/tftp-deploy-ypnugl2a/ramdisk/ramdisk.cpio.gz
266 00:48:32.787222 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
267 00:48:32.787304 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
268 00:48:32.787395 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
269 00:48:32.787484 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
270 00:48:32.787554 Not connected, no need to disconnect.
271 00:48:32.787628 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
272 00:48:32.787709 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
273 00:48:32.787775 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-cx9400-volteer-cbg-6'
274 00:48:32.791198 Setting prompt string to ['lava-test: # ']
275 00:48:32.791520 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
276 00:48:32.791627 end: 2.2.1 reset-connection (duration 00:00:00) [common]
277 00:48:32.791725 start: 2.2.2 reset-device (timeout 00:05:00) [common]
278 00:48:32.791817 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
279 00:48:32.792213 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=reboot'
280 00:48:37.926267 >> Command sent successfully.
281 00:48:37.928729 Returned 0 in 5 seconds
282 00:48:38.029092 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
284 00:48:38.029531 end: 2.2.2 reset-device (duration 00:00:05) [common]
285 00:48:38.029664 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
286 00:48:38.029792 Setting prompt string to 'Starting depthcharge on Voema...'
287 00:48:38.029889 Changing prompt to 'Starting depthcharge on Voema...'
288 00:48:38.029992 depthcharge-start: Wait for prompt Starting depthcharge on Voema... (timeout 00:05:00)
289 00:48:38.030353 [Enter `^Ec?' for help]
290 00:48:39.629654
291 00:48:39.630239
292 00:48:39.639203 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 bootblock starting (log level: 8)...
293 00:48:39.642692 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz
294 00:48:39.649150 CPU: ID 806c1, Tigerlake B0, ucode: 00000086
295 00:48:39.652540 CPU: AES supported, TXT NOT supported, VT supported
296 00:48:39.659598 MCH: device id 9a12 (rev 01) is Tigerlake-Y-4-2
297 00:48:39.665668 PCH: device id a087 (rev 20) is Tigerlake-Y Premium SKU
298 00:48:39.669066 IGD: device id 9a40 (rev 01) is Tigerlake Y GT2
299 00:48:39.672445 VBOOT: Loading verstage.
300 00:48:39.675812 FMAP: Found "FLASH" version 1.1 at 0x1804000.
301 00:48:39.682872 FMAP: base = 0x0 size = 0x2000000 #areas = 32
302 00:48:39.685919 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
303 00:48:39.696452 CBFS: mcache @0xfef45600 built for 70 files, used 0xfdc of 0x1800 bytes
304 00:48:39.703321 CBFS: Found 'fallback/verstage' @0x165e40 size 0x147ec in mcache @0xfef45984
305 00:48:39.703830
306 00:48:39.704262
307 00:48:39.716107 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 verstage starting (log level: 8)...
308 00:48:39.729678 Probing TPM: . done!
309 00:48:39.733258 TPM ready after 0 ms
310 00:48:39.736458 Connected to device vid:did:rid of 1ae0:0028:00
311 00:48:39.747618 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
312 00:48:39.754340 Current CR50_BOARD_CFG = 0x80000001, matches desired = 0x00000001
313 00:48:39.757759 Initialized TPM device CR50 revision 0
314 00:48:39.809848 tlcl_send_startup: Startup return code is 0
315 00:48:39.810306 TPM: setup succeeded
316 00:48:39.824915 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1007 return code 0
317 00:48:39.838935 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
318 00:48:39.852056 VB2:secdata_kernel_check_v1() secdata_kernel: incomplete data (missing 27 bytes)
319 00:48:39.861715 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x1008 return code 0
320 00:48:39.865111 Chrome EC: UHEPI supported
321 00:48:39.868788 Phase 1
322 00:48:39.872017 FMAP: area GBB found @ 1805000 (458752 bytes)
323 00:48:39.881699 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
324 00:48:39.888595 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
325 00:48:39.895560 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
326 00:48:39.901842 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x7
327 00:48:39.905455 Recovery requested (1009000e)
328 00:48:39.908882 TPM: Extending digest for VBOOT: boot mode into PCR 0
329 00:48:39.919841 tlcl_extend: response is 0
330 00:48:39.926686 TPM: Extending digest for VBOOT: GBB HWID into PCR 1
331 00:48:39.936586 tlcl_extend: response is 0
332 00:48:39.943313 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
333 00:48:39.949939 CBFS: Found 'fallback/romstage' @0x80 size 0x1bf24 in mcache @0xfef45638
334 00:48:39.956612 BS: verstage times (exec / console): total (unknown) / 142 ms
335 00:48:39.957153
336 00:48:39.957676
337 00:48:39.969720 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 romstage starting (log level: 8)...
338 00:48:39.976283 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
339 00:48:39.979517 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
340 00:48:39.982946 gpe0_sts[0]: 00200000 gpe0_en[0]: 00000000
341 00:48:39.989590 gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000
342 00:48:39.992786 gpe0_sts[2]: 00001000 gpe0_en[2]: 00000000
343 00:48:39.996122 gpe0_sts[3]: 00000000 gpe0_en[3]: 00092000
344 00:48:39.999411 TCO_STS: 0000 0000
345 00:48:40.002771 GEN_PMCON: d0015038 00002200
346 00:48:40.005791 GBLRST_CAUSE: 00000000 00000000
347 00:48:40.009262 HPR_CAUSE0: 00000000
348 00:48:40.009687 prev_sleep_state 5
349 00:48:40.012754 Boot Count incremented to 19517
350 00:48:40.019130 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
351 00:48:40.025894 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
352 00:48:40.036098 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
353 00:48:40.042707 CBFS: Found 'fspm.bin' @0x78fc0 size 0xa5000 in mcache @0xfef4585c
354 00:48:40.046309 Chrome EC: UHEPI supported
355 00:48:40.052493 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
356 00:48:40.063792 Probing TPM: done!
357 00:48:40.071214 Connected to device vid:did:rid of 1ae0:0028:00
358 00:48:40.081721 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
359 00:48:40.088413 Initialized TPM device CR50 revision 0
360 00:48:40.098380 src/security/tpm/tss/tcg-2.0/tss.c:231 index 0x100b return code 0
361 00:48:40.105024 MRC: Hash idx 0x100b comparison successful.
362 00:48:40.108427 MRC cache found, size faa8
363 00:48:40.108830 bootmode is set to: 2
364 00:48:40.111513 SPD index = 0
365 00:48:40.118163 CBFS: Found 'spd.bin' @0x72940 size 0x600 in mcache @0xfef4579c
366 00:48:40.121705 SPD: module type is LPDDR4X
367 00:48:40.128328 SPD: module part number is MT53E512M64D4NW-046
368 00:48:40.131719 SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb
369 00:48:40.138149 SPD: device width 16 bits, bus width 16 bits
370 00:48:40.141595 SPD: module size is 1024 MB (per channel)
371 00:48:40.574677 CBMEM:
372 00:48:40.578210 IMD: root @ 0x76fff000 254 entries.
373 00:48:40.581478 IMD: root @ 0x76ffec00 62 entries.
374 00:48:40.585400 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
375 00:48:40.591602 FMAP: area RW_VPD found @ f35000 (8192 bytes)
376 00:48:40.594862 External stage cache:
377 00:48:40.598215 IMD: root @ 0x7b3ff000 254 entries.
378 00:48:40.601730 IMD: root @ 0x7b3fec00 62 entries.
379 00:48:40.616535 FMAP: area RECOVERY_MRC_CACHE found @ f00000 (65536 bytes)
380 00:48:40.623251 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
381 00:48:40.629889 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
382 00:48:40.644053 MRC: 'RECOVERY_MRC_CACHE' does not need update.
383 00:48:40.647454 cse_lite: Skip switching to RW in the recovery path
384 00:48:40.651450 8 DIMMs found
385 00:48:40.651537 SMM Memory Map
386 00:48:40.654981 SMRAM : 0x7b000000 0x800000
387 00:48:40.657893 Subregion 0: 0x7b000000 0x200000
388 00:48:40.661252 Subregion 1: 0x7b200000 0x200000
389 00:48:40.664953 Subregion 2: 0x7b400000 0x400000
390 00:48:40.668145 top_of_ram = 0x77000000
391 00:48:40.674472 MTRR Range: Start=76000000 End=77000000 (Size 1000000)
392 00:48:40.678117 MTRR Range: Start=7b000000 End=7b800000 (Size 800000)
393 00:48:40.684431 MTRR Range: Start=f9000000 End=fa000000 (Size 1000000)
394 00:48:40.687773 MTRR Range: Start=ff000000 End=0 (Size 1000000)
395 00:48:40.698312 CBFS: Found 'fallback/postcar' @0x160900 size 0x54f8 in mcache @0xfef4594c
396 00:48:40.704350 Decompressing stage fallback/postcar @ 0x76c0afc0 (38208 bytes)
397 00:48:40.714412 Loading module at 0x76c0b000 with entry 0x76c0b000. filesize: 0x5150 memsize: 0x9500
398 00:48:40.717318 Processing 211 relocs. Offset value of 0x74c0b000
399 00:48:40.726125 BS: romstage times (exec / console): total (unknown) / 277 ms
400 00:48:40.732375
401 00:48:40.732453
402 00:48:40.742294 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 postcar starting (log level: 8)...
403 00:48:40.745875 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
404 00:48:40.756072 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
405 00:48:40.762794 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
406 00:48:40.769049 CBFS: Found 'fallback/ramstage' @0x524c0 size 0x1fbe3 in mcache @0x76c4c0ec
407 00:48:40.775595 Decompressing stage fallback/ramstage @ 0x76b97fc0 (463536 bytes)
408 00:48:40.822560 Loading module at 0x76b98000 with entry 0x76b98000. filesize: 0x4d5d8 memsize: 0x71270
409 00:48:40.828828 Processing 5008 relocs. Offset value of 0x75d98000
410 00:48:40.832189 BS: postcar times (exec / console): total (unknown) / 59 ms
411 00:48:40.835676
412 00:48:40.835779
413 00:48:40.845882 coreboot-v1.9308_26_0.0.22-18730-gcb819b1082 Tue May 4 00:08:52 UTC 2021 ramstage starting (log level: 8)...
414 00:48:40.845969 Normal boot
415 00:48:40.849273 FW_CONFIG value is 0x804c02
416 00:48:40.852772 PCI: 00:07.0 disabled by fw_config
417 00:48:40.855947 PCI: 00:07.1 disabled by fw_config
418 00:48:40.859029 PCI: 00:0d.2 disabled by fw_config
419 00:48:40.862521 PCI: 00:1c.7 disabled by fw_config
420 00:48:40.869323 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
421 00:48:40.875909 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
422 00:48:40.879499 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
423 00:48:40.882415 GENERIC: 0.0 disabled by fw_config
424 00:48:40.885911 GENERIC: 1.0 disabled by fw_config
425 00:48:40.892739 fw_config match found: DB_USB=USB3_ACTIVE
426 00:48:40.895867 fw_config match found: DB_USB=USB3_ACTIVE
427 00:48:40.899100 fw_config match found: DB_USB=USB3_ACTIVE
428 00:48:40.905694 fw_config match found: DB_USB=USB3_ACTIVE
429 00:48:40.909273 FMAP: area COREBOOT found @ 1875000 (7909376 bytes)
430 00:48:40.915917 MMAP window: SPI flash base=0x1000000, Host base=0xff000000, Size=0x1000000
431 00:48:40.925473 MMAP window: SPI flash base=0x500000, Host base=0xf9500000, Size=0xb00000
432 00:48:40.931872 CBFS: Found 'cpu_microcode_blob.bin' @0x1c040 size 0x36400 in mcache @0x76c4c09c
433 00:48:40.935292 microcode: sig=0x806c1 pf=0x80 revision=0x86
434 00:48:40.942121 microcode: Update skipped, already up-to-date
435 00:48:40.948666 CBFS: Found 'fsps.bin' @0x11efc0 size 0x418f9 in mcache @0x76c4c30c
436 00:48:40.976351 Detected 4 core, 8 thread CPU.
437 00:48:40.979597 Setting up SMI for CPU
438 00:48:40.982617 IED base = 0x7b400000
439 00:48:40.982702 IED size = 0x00400000
440 00:48:40.986107 Will perform SMM setup.
441 00:48:40.992684 CPU: 11th Gen Intel(R) Core(TM) i5-1130G7 @ 1.10GHz.
442 00:48:40.999331 Loading module at 0x00030000 with entry 0x00030000. filesize: 0x170 memsize: 0x170
443 00:48:41.006177 Processing 16 relocs. Offset value of 0x00030000
444 00:48:41.009148 Attempting to start 7 APs
445 00:48:41.012716 Waiting for 10ms after sending INIT.
446 00:48:41.028246 Waiting for 1st SIPI to complete...AP: slot 1 apic_id 1.
447 00:48:41.028335 done.
448 00:48:41.031217 AP: slot 6 apic_id 3.
449 00:48:41.034762 AP: slot 2 apic_id 7.
450 00:48:41.034846 AP: slot 5 apic_id 6.
451 00:48:41.038300 AP: slot 4 apic_id 4.
452 00:48:41.041170 AP: slot 7 apic_id 5.
453 00:48:41.041254 AP: slot 3 apic_id 2.
454 00:48:41.047967 Waiting for 2nd SIPI to complete...done.
455 00:48:41.054388 Loading module at 0x00038000 with entry 0x00038000. filesize: 0x1b8 memsize: 0x1b8
456 00:48:41.061217 Processing 13 relocs. Offset value of 0x00038000
457 00:48:41.061328 Unable to locate Global NVS
458 00:48:41.071053 SMM Module: stub loaded at 0x00038000. Will call 0x76bb6318(0x00000000)
459 00:48:41.074638 Installing permanent SMM handler to 0x7b000000
460 00:48:41.084687 Loading module at 0x7b010000 with entry 0x7b010c16. filesize: 0xa7c8 memsize: 0xf908
461 00:48:41.087735 Processing 794 relocs. Offset value of 0x7b010000
462 00:48:41.098025 Loading module at 0x7b008000 with entry 0x7b008000. filesize: 0x1b8 memsize: 0x1b8
463 00:48:41.101104 Processing 13 relocs. Offset value of 0x7b008000
464 00:48:41.107928 SMM Module: placing jmp sequence at 0x7b007c00 rel16 0x03fd
465 00:48:41.114526 SMM Module: placing jmp sequence at 0x7b007800 rel16 0x07fd
466 00:48:41.117542 SMM Module: placing jmp sequence at 0x7b007400 rel16 0x0bfd
467 00:48:41.124360 SMM Module: placing jmp sequence at 0x7b007000 rel16 0x0ffd
468 00:48:41.130719 SMM Module: placing jmp sequence at 0x7b006c00 rel16 0x13fd
469 00:48:41.137723 SMM Module: placing jmp sequence at 0x7b006800 rel16 0x17fd
470 00:48:41.144592 SMM Module: placing jmp sequence at 0x7b006400 rel16 0x1bfd
471 00:48:41.144690 Unable to locate Global NVS
472 00:48:41.153865 SMM Module: stub loaded at 0x7b008000. Will call 0x7b010c16(0x00000000)
473 00:48:41.157534 Clearing SMI status registers
474 00:48:41.157656 SMI_STS: PM1
475 00:48:41.160366 PM1_STS: PWRBTN
476 00:48:41.167286 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7b000000, cpu = 0
477 00:48:41.170539 In relocation handler: CPU 0
478 00:48:41.174005 New SMBASE=0x7b000000 IEDBASE=0x7b400000
479 00:48:41.180402 Writing SMRR. base = 0x7b000006, mask=0xff800c00
480 00:48:41.180500 Relocation complete.
481 00:48:41.190421 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afffc00, cpu = 1
482 00:48:41.193520 In relocation handler: CPU 1
483 00:48:41.197179 New SMBASE=0x7afffc00 IEDBASE=0x7b400000
484 00:48:41.197291 Relocation complete.
485 00:48:41.206791 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff800, cpu = 2
486 00:48:41.210357 In relocation handler: CPU 2
487 00:48:41.214036 New SMBASE=0x7afff800 IEDBASE=0x7b400000
488 00:48:41.214149 Relocation complete.
489 00:48:41.224217 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affec00, cpu = 5
490 00:48:41.224330 In relocation handler: CPU 5
491 00:48:41.230607 New SMBASE=0x7affec00 IEDBASE=0x7b400000
492 00:48:41.233783 Writing SMRR. base = 0x7b000006, mask=0xff800c00
493 00:48:41.236975 Relocation complete.
494 00:48:41.243542 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff400, cpu = 3
495 00:48:41.247104 In relocation handler: CPU 3
496 00:48:41.250691 New SMBASE=0x7afff400 IEDBASE=0x7b400000
497 00:48:41.256601 Writing SMRR. base = 0x7b000006, mask=0xff800c00
498 00:48:41.256688 Relocation complete.
499 00:48:41.263155 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe800, cpu = 6
500 00:48:41.266709 In relocation handler: CPU 6
501 00:48:41.273409 New SMBASE=0x7affe800 IEDBASE=0x7b400000
502 00:48:41.273487 Relocation complete.
503 00:48:41.279808 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7affe400, cpu = 7
504 00:48:41.283188 In relocation handler: CPU 7
505 00:48:41.290044 New SMBASE=0x7affe400 IEDBASE=0x7b400000
506 00:48:41.290122 Relocation complete.
507 00:48:41.296823 smm_do_relocation : curr_smbase 0x30000 perm_smbase 0x7afff000, cpu = 4
508 00:48:41.299937 In relocation handler: CPU 4
509 00:48:41.306755 New SMBASE=0x7afff000 IEDBASE=0x7b400000
510 00:48:41.310835 Writing SMRR. base = 0x7b000006, mask=0xff800c00
511 00:48:41.314197 Relocation complete.
512 00:48:41.314282 Initializing CPU #0
513 00:48:41.317306 CPU: vendor Intel device 806c1
514 00:48:41.320728 CPU: family 06, model 8c, stepping 01
515 00:48:41.324446 Clearing out pending MCEs
516 00:48:41.327495 Setting up local APIC...
517 00:48:41.327579 apic_id: 0x00 done.
518 00:48:41.330661 Turbo is available but hidden
519 00:48:41.334699 Turbo is available and visible
520 00:48:41.340905 microcode: Update skipped, already up-to-date
521 00:48:41.340993 CPU #0 initialized
522 00:48:41.344242 Initializing CPU #6
523 00:48:41.347220 Initializing CPU #3
524 00:48:41.347291 CPU: vendor Intel device 806c1
525 00:48:41.353959 CPU: family 06, model 8c, stepping 01
526 00:48:41.357201 CPU: vendor Intel device 806c1
527 00:48:41.360396 CPU: family 06, model 8c, stepping 01
528 00:48:41.363833 Clearing out pending MCEs
529 00:48:41.363963 Clearing out pending MCEs
530 00:48:41.367410 Setting up local APIC...
531 00:48:41.370441 Initializing CPU #4
532 00:48:41.370541 Initializing CPU #7
533 00:48:41.373848 CPU: vendor Intel device 806c1
534 00:48:41.377369 CPU: family 06, model 8c, stepping 01
535 00:48:41.380666 CPU: vendor Intel device 806c1
536 00:48:41.383920 CPU: family 06, model 8c, stepping 01
537 00:48:41.387390 Clearing out pending MCEs
538 00:48:41.390652 Clearing out pending MCEs
539 00:48:41.394252 Setting up local APIC...
540 00:48:41.394359 apic_id: 0x03 done.
541 00:48:41.397450 Setting up local APIC...
542 00:48:41.400606 Initializing CPU #1
543 00:48:41.403779 microcode: Update skipped, already up-to-date
544 00:48:41.407015 apic_id: 0x02 done.
545 00:48:41.407118 CPU #6 initialized
546 00:48:41.413786 microcode: Update skipped, already up-to-date
547 00:48:41.417113 apic_id: 0x04 done.
548 00:48:41.417210 Setting up local APIC...
549 00:48:41.420204 CPU: vendor Intel device 806c1
550 00:48:41.423898 CPU: family 06, model 8c, stepping 01
551 00:48:41.426881 apic_id: 0x05 done.
552 00:48:41.430620 microcode: Update skipped, already up-to-date
553 00:48:41.436833 microcode: Update skipped, already up-to-date
554 00:48:41.436913 CPU #4 initialized
555 00:48:41.440742 CPU #7 initialized
556 00:48:41.443937 CPU #3 initialized
557 00:48:41.444055 Clearing out pending MCEs
558 00:48:41.447229 Initializing CPU #5
559 00:48:41.450294 Initializing CPU #2
560 00:48:41.453479 CPU: vendor Intel device 806c1
561 00:48:41.457108 CPU: family 06, model 8c, stepping 01
562 00:48:41.460596 CPU: vendor Intel device 806c1
563 00:48:41.463843 CPU: family 06, model 8c, stepping 01
564 00:48:41.467136 Clearing out pending MCEs
565 00:48:41.467226 Clearing out pending MCEs
566 00:48:41.470472 Setting up local APIC...
567 00:48:41.473816 Setting up local APIC...
568 00:48:41.477256 apic_id: 0x06 done.
569 00:48:41.477339 Setting up local APIC...
570 00:48:41.480366 apic_id: 0x01 done.
571 00:48:41.483873 apic_id: 0x07 done.
572 00:48:41.486697 microcode: Update skipped, already up-to-date
573 00:48:41.490222 microcode: Update skipped, already up-to-date
574 00:48:41.493698 CPU #5 initialized
575 00:48:41.496821 CPU #2 initialized
576 00:48:41.500317 microcode: Update skipped, already up-to-date
577 00:48:41.503435 CPU #1 initialized
578 00:48:41.506788 bsp_do_flight_plan done after 455 msecs.
579 00:48:41.510393 CPU: frequency set to 4000 MHz
580 00:48:41.510476 Enabling SMIs.
581 00:48:41.516602 BS: BS_DEV_INIT_CHIPS entry times (exec / console): 347 / 317 ms
582 00:48:41.533922 SATAXPCIE1 indicates PCIe NVMe is present
583 00:48:41.536718 Probing TPM: done!
584 00:48:41.540295 Connected to device vid:did:rid of 1ae0:0028:00
585 00:48:41.550707 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.6.20/cr50_v1.9308_B.947-551594aae6
586 00:48:41.553754 Initialized TPM device CR50 revision 0
587 00:48:41.557032 Enabling S0i3.4
588 00:48:41.564289 CBFS: Found 'vbt.bin' @0x78a40 size 0x4f0 in mcache @0x76c4c1fc
589 00:48:41.567395 Found a VBT of 8704 bytes after decompression
590 00:48:41.574231 cse_lite: CSE RO boot. HybridStorageMode disabled
591 00:48:41.580404 WEAK: src/soc/intel/tigerlake/fsp_params.c/mainboard_silicon_init_params called
592 00:48:41.655480 FSPS returned 0
593 00:48:41.658950 Executing Phase 1 of FspMultiPhaseSiInit
594 00:48:41.668953 FSP MultiPhaseSiInit src/soc/intel/tigerlake/fsp_params.c/platform_fsp_multi_phase_init_cb called
595 00:48:41.672384 port C0 DISC req: usage 1 usb3 1 usb2 5
596 00:48:41.675557 Raw Buffer output 0 00000511
597 00:48:41.678906 Raw Buffer output 1 00000000
598 00:48:41.682772 pmc_send_ipc_cmd succeeded
599 00:48:41.689567 port C1 DISC req: usage 1 usb3 2 usb2 3
600 00:48:41.689652 Raw Buffer output 0 00000321
601 00:48:41.693031 Raw Buffer output 1 00000000
602 00:48:41.697101 pmc_send_ipc_cmd succeeded
603 00:48:41.702447 Detected 4 core, 8 thread CPU.
604 00:48:41.705106 Detected 4 core, 8 thread CPU.
605 00:48:41.939329 Display FSP Version Info HOB
606 00:48:41.942894 Reference Code - CPU = a.0.4c.31
607 00:48:41.946293 uCode Version = 0.0.0.86
608 00:48:41.949539 TXT ACM version = ff.ff.ff.ffff
609 00:48:41.952873 Reference Code - ME = a.0.4c.31
610 00:48:41.956030 MEBx version = 0.0.0.0
611 00:48:41.959275 ME Firmware Version = Consumer SKU
612 00:48:41.962768 Reference Code - PCH = a.0.4c.31
613 00:48:41.965890 PCH-CRID Status = Disabled
614 00:48:41.969442 PCH-CRID Original Value = ff.ff.ff.ffff
615 00:48:41.973252 PCH-CRID New Value = ff.ff.ff.ffff
616 00:48:41.976284 OPROM - RST - RAID = ff.ff.ff.ffff
617 00:48:41.979242 PCH Hsio Version = 4.0.0.0
618 00:48:41.982842 Reference Code - SA - System Agent = a.0.4c.31
619 00:48:41.986564 Reference Code - MRC = 2.0.0.1
620 00:48:41.989693 SA - PCIe Version = a.0.4c.31
621 00:48:41.992612 SA-CRID Status = Disabled
622 00:48:41.996293 SA-CRID Original Value = 0.0.0.1
623 00:48:41.999562 SA-CRID New Value = 0.0.0.1
624 00:48:42.002886 OPROM - VBIOS = ff.ff.ff.ffff
625 00:48:42.006294 IO Manageability Engine FW Version = 11.1.4.0
626 00:48:42.009663 PHY Build Version = 0.0.0.e0
627 00:48:42.012534 Thunderbolt(TM) FW Version = 0.0.0.0
628 00:48:42.019501 System Agent Manageability Engine FW Version = ff.ff.ff.ffff
629 00:48:42.022532 ITSS IRQ Polarities Before:
630 00:48:42.022616 IPC0: 0xffffffff
631 00:48:42.026298 IPC1: 0xffffffff
632 00:48:42.026380 IPC2: 0xffffffff
633 00:48:42.029159 IPC3: 0xffffffff
634 00:48:42.032440 ITSS IRQ Polarities After:
635 00:48:42.032524 IPC0: 0xffffffff
636 00:48:42.035937 IPC1: 0xffffffff
637 00:48:42.036057 IPC2: 0xffffffff
638 00:48:42.039319 IPC3: 0xffffffff
639 00:48:42.042541 Found PCIe Root Port #9 at PCI: 00:1d.0.
640 00:48:42.056335 pcie_rp_update_dev: Couldn't find PCIe Root Port #1 (originally PCI: 00:1c.0) which was enabled in devicetree, removing.
641 00:48:42.066004 pcie_rp_update_dev: Couldn't find PCIe Root Port #7 (originally PCI: 00:1c.6) which was enabled in devicetree, removing.
642 00:48:42.079543 pcie_rp_update_dev: Couldn't find PCIe Root Port #11 (originally PCI: 00:1d.2) which was enabled in devicetree, removing.
643 00:48:42.085929 BS: BS_DEV_INIT_CHIPS run times (exec / console): 326 / 236 ms
644 00:48:42.086014 Enumerating buses...
645 00:48:42.092248 Show all devs... Before device enumeration.
646 00:48:42.092332 Root Device: enabled 1
647 00:48:42.096073 DOMAIN: 0000: enabled 1
648 00:48:42.099238 CPU_CLUSTER: 0: enabled 1
649 00:48:42.102610 PCI: 00:00.0: enabled 1
650 00:48:42.102694 PCI: 00:02.0: enabled 1
651 00:48:42.105782 PCI: 00:04.0: enabled 1
652 00:48:42.109336 PCI: 00:05.0: enabled 1
653 00:48:42.112616 PCI: 00:06.0: enabled 0
654 00:48:42.112700 PCI: 00:07.0: enabled 0
655 00:48:42.115538 PCI: 00:07.1: enabled 0
656 00:48:42.118987 PCI: 00:07.2: enabled 0
657 00:48:42.122294 PCI: 00:07.3: enabled 0
658 00:48:42.122377 PCI: 00:08.0: enabled 1
659 00:48:42.125666 PCI: 00:09.0: enabled 0
660 00:48:42.128977 PCI: 00:0a.0: enabled 0
661 00:48:42.132191 PCI: 00:0d.0: enabled 1
662 00:48:42.132275 PCI: 00:0d.1: enabled 0
663 00:48:42.135449 PCI: 00:0d.2: enabled 0
664 00:48:42.138733 PCI: 00:0d.3: enabled 0
665 00:48:42.138816 PCI: 00:0e.0: enabled 0
666 00:48:42.142598 PCI: 00:10.2: enabled 1
667 00:48:42.145752 PCI: 00:10.6: enabled 0
668 00:48:42.149128 PCI: 00:10.7: enabled 0
669 00:48:42.149210 PCI: 00:12.0: enabled 0
670 00:48:42.152190 PCI: 00:12.6: enabled 0
671 00:48:42.155364 PCI: 00:13.0: enabled 0
672 00:48:42.160045 PCI: 00:14.0: enabled 1
673 00:48:42.160128 PCI: 00:14.1: enabled 0
674 00:48:42.162572 PCI: 00:14.2: enabled 1
675 00:48:42.165660 PCI: 00:14.3: enabled 1
676 00:48:42.168731 PCI: 00:15.0: enabled 1
677 00:48:42.168814 PCI: 00:15.1: enabled 1
678 00:48:42.172391 PCI: 00:15.2: enabled 1
679 00:48:42.175669 PCI: 00:15.3: enabled 1
680 00:48:42.179308 PCI: 00:16.0: enabled 1
681 00:48:42.179391 PCI: 00:16.1: enabled 0
682 00:48:42.181905 PCI: 00:16.2: enabled 0
683 00:48:42.185210 PCI: 00:16.3: enabled 0
684 00:48:42.185292 PCI: 00:16.4: enabled 0
685 00:48:42.188713 PCI: 00:16.5: enabled 0
686 00:48:42.191939 PCI: 00:17.0: enabled 1
687 00:48:42.195476 PCI: 00:19.0: enabled 0
688 00:48:42.195559 PCI: 00:19.1: enabled 1
689 00:48:42.198647 PCI: 00:19.2: enabled 0
690 00:48:42.202483 PCI: 00:1c.0: enabled 1
691 00:48:42.205452 PCI: 00:1c.1: enabled 0
692 00:48:42.205539 PCI: 00:1c.2: enabled 0
693 00:48:42.208453 PCI: 00:1c.3: enabled 0
694 00:48:42.212177 PCI: 00:1c.4: enabled 0
695 00:48:42.215668 PCI: 00:1c.5: enabled 0
696 00:48:42.215751 PCI: 00:1c.6: enabled 1
697 00:48:42.218558 PCI: 00:1c.7: enabled 0
698 00:48:42.222015 PCI: 00:1d.0: enabled 1
699 00:48:42.222105 PCI: 00:1d.1: enabled 0
700 00:48:42.225481 PCI: 00:1d.2: enabled 1
701 00:48:42.229178 PCI: 00:1d.3: enabled 0
702 00:48:42.231898 PCI: 00:1e.0: enabled 1
703 00:48:42.232010 PCI: 00:1e.1: enabled 0
704 00:48:42.235390 PCI: 00:1e.2: enabled 1
705 00:48:42.238726 PCI: 00:1e.3: enabled 1
706 00:48:42.242058 PCI: 00:1f.0: enabled 1
707 00:48:42.242142 PCI: 00:1f.1: enabled 0
708 00:48:42.245457 PCI: 00:1f.2: enabled 1
709 00:48:42.248833 PCI: 00:1f.3: enabled 1
710 00:48:42.252206 PCI: 00:1f.4: enabled 0
711 00:48:42.252290 PCI: 00:1f.5: enabled 1
712 00:48:42.255511 PCI: 00:1f.6: enabled 0
713 00:48:42.258478 PCI: 00:1f.7: enabled 0
714 00:48:42.258561 APIC: 00: enabled 1
715 00:48:42.261764 GENERIC: 0.0: enabled 1
716 00:48:42.265621 GENERIC: 0.0: enabled 1
717 00:48:42.268631 GENERIC: 1.0: enabled 1
718 00:48:42.268716 GENERIC: 0.0: enabled 1
719 00:48:42.271682 GENERIC: 1.0: enabled 1
720 00:48:42.275583 USB0 port 0: enabled 1
721 00:48:42.275693 GENERIC: 0.0: enabled 1
722 00:48:42.278939 USB0 port 0: enabled 1
723 00:48:42.281820 GENERIC: 0.0: enabled 1
724 00:48:42.285062 I2C: 00:1a: enabled 1
725 00:48:42.285146 I2C: 00:31: enabled 1
726 00:48:42.288770 I2C: 00:32: enabled 1
727 00:48:42.291992 I2C: 00:10: enabled 1
728 00:48:42.292090 I2C: 00:15: enabled 1
729 00:48:42.295286 GENERIC: 0.0: enabled 0
730 00:48:42.298521 GENERIC: 1.0: enabled 0
731 00:48:42.301873 GENERIC: 0.0: enabled 1
732 00:48:42.301958 SPI: 00: enabled 1
733 00:48:42.305189 SPI: 00: enabled 1
734 00:48:42.305273 PNP: 0c09.0: enabled 1
735 00:48:42.308633 GENERIC: 0.0: enabled 1
736 00:48:42.312045 USB3 port 0: enabled 1
737 00:48:42.315553 USB3 port 1: enabled 1
738 00:48:42.315637 USB3 port 2: enabled 0
739 00:48:42.318302 USB3 port 3: enabled 0
740 00:48:42.321913 USB2 port 0: enabled 0
741 00:48:42.321998 USB2 port 1: enabled 1
742 00:48:42.325079 USB2 port 2: enabled 1
743 00:48:42.328925 USB2 port 3: enabled 0
744 00:48:42.329009 USB2 port 4: enabled 1
745 00:48:42.331929 USB2 port 5: enabled 0
746 00:48:42.334873 USB2 port 6: enabled 0
747 00:48:42.338644 USB2 port 7: enabled 0
748 00:48:42.338727 USB2 port 8: enabled 0
749 00:48:42.342036 USB2 port 9: enabled 0
750 00:48:42.344952 USB3 port 0: enabled 0
751 00:48:42.345035 USB3 port 1: enabled 1
752 00:48:42.348837 USB3 port 2: enabled 0
753 00:48:42.351624 USB3 port 3: enabled 0
754 00:48:42.355408 GENERIC: 0.0: enabled 1
755 00:48:42.355493 GENERIC: 1.0: enabled 1
756 00:48:42.358466 APIC: 01: enabled 1
757 00:48:42.362040 APIC: 07: enabled 1
758 00:48:42.362124 APIC: 02: enabled 1
759 00:48:42.365351 APIC: 04: enabled 1
760 00:48:42.365435 APIC: 06: enabled 1
761 00:48:42.368131 APIC: 03: enabled 1
762 00:48:42.371842 APIC: 05: enabled 1
763 00:48:42.371925 Compare with tree...
764 00:48:42.374931 Root Device: enabled 1
765 00:48:42.378648 DOMAIN: 0000: enabled 1
766 00:48:42.381630 PCI: 00:00.0: enabled 1
767 00:48:42.381714 PCI: 00:02.0: enabled 1
768 00:48:42.385316 PCI: 00:04.0: enabled 1
769 00:48:42.388297 GENERIC: 0.0: enabled 1
770 00:48:42.391859 PCI: 00:05.0: enabled 1
771 00:48:42.394865 PCI: 00:06.0: enabled 0
772 00:48:42.394949 PCI: 00:07.0: enabled 0
773 00:48:42.398326 GENERIC: 0.0: enabled 1
774 00:48:42.401342 PCI: 00:07.1: enabled 0
775 00:48:42.404642 GENERIC: 1.0: enabled 1
776 00:48:42.408141 PCI: 00:07.2: enabled 0
777 00:48:42.408227 GENERIC: 0.0: enabled 1
778 00:48:42.411485 PCI: 00:07.3: enabled 0
779 00:48:42.415171 GENERIC: 1.0: enabled 1
780 00:48:42.418105 PCI: 00:08.0: enabled 1
781 00:48:42.421510 PCI: 00:09.0: enabled 0
782 00:48:42.421595 PCI: 00:0a.0: enabled 0
783 00:48:42.424705 PCI: 00:0d.0: enabled 1
784 00:48:42.428054 USB0 port 0: enabled 1
785 00:48:42.431291 USB3 port 0: enabled 1
786 00:48:42.434673 USB3 port 1: enabled 1
787 00:48:42.434755 USB3 port 2: enabled 0
788 00:48:42.438067 USB3 port 3: enabled 0
789 00:48:42.441470 PCI: 00:0d.1: enabled 0
790 00:48:42.444664 PCI: 00:0d.2: enabled 0
791 00:48:42.448063 GENERIC: 0.0: enabled 1
792 00:48:42.448142 PCI: 00:0d.3: enabled 0
793 00:48:42.451592 PCI: 00:0e.0: enabled 0
794 00:48:42.454740 PCI: 00:10.2: enabled 1
795 00:48:42.457915 PCI: 00:10.6: enabled 0
796 00:48:42.461407 PCI: 00:10.7: enabled 0
797 00:48:42.461481 PCI: 00:12.0: enabled 0
798 00:48:42.465016 PCI: 00:12.6: enabled 0
799 00:48:42.467805 PCI: 00:13.0: enabled 0
800 00:48:42.471252 PCI: 00:14.0: enabled 1
801 00:48:42.474727 USB0 port 0: enabled 1
802 00:48:42.474806 USB2 port 0: enabled 0
803 00:48:42.477986 USB2 port 1: enabled 1
804 00:48:42.481338 USB2 port 2: enabled 1
805 00:48:42.484640 USB2 port 3: enabled 0
806 00:48:42.487919 USB2 port 4: enabled 1
807 00:48:42.490934 USB2 port 5: enabled 0
808 00:48:42.491008 USB2 port 6: enabled 0
809 00:48:42.494754 USB2 port 7: enabled 0
810 00:48:42.497896 USB2 port 8: enabled 0
811 00:48:42.501001 USB2 port 9: enabled 0
812 00:48:42.504294 USB3 port 0: enabled 0
813 00:48:42.507707 USB3 port 1: enabled 1
814 00:48:42.507781 USB3 port 2: enabled 0
815 00:48:42.510949 USB3 port 3: enabled 0
816 00:48:42.514726 PCI: 00:14.1: enabled 0
817 00:48:42.517795 PCI: 00:14.2: enabled 1
818 00:48:42.520838 PCI: 00:14.3: enabled 1
819 00:48:42.520943 GENERIC: 0.0: enabled 1
820 00:48:42.524217 PCI: 00:15.0: enabled 1
821 00:48:42.528005 I2C: 00:1a: enabled 1
822 00:48:42.531058 I2C: 00:31: enabled 1
823 00:48:42.531159 I2C: 00:32: enabled 1
824 00:48:42.534357 PCI: 00:15.1: enabled 1
825 00:48:42.537825 I2C: 00:10: enabled 1
826 00:48:42.541176 PCI: 00:15.2: enabled 1
827 00:48:42.544611 PCI: 00:15.3: enabled 1
828 00:48:42.544686 PCI: 00:16.0: enabled 1
829 00:48:42.547803 PCI: 00:16.1: enabled 0
830 00:48:42.551077 PCI: 00:16.2: enabled 0
831 00:48:42.554684 PCI: 00:16.3: enabled 0
832 00:48:42.554758 PCI: 00:16.4: enabled 0
833 00:48:42.558570 PCI: 00:16.5: enabled 0
834 00:48:42.562024 PCI: 00:17.0: enabled 1
835 00:48:42.565942 PCI: 00:19.0: enabled 0
836 00:48:42.566025 PCI: 00:19.1: enabled 1
837 00:48:42.569212 I2C: 00:15: enabled 1
838 00:48:42.572739 PCI: 00:19.2: enabled 0
839 00:48:42.575640 PCI: 00:1d.0: enabled 1
840 00:48:42.575723 GENERIC: 0.0: enabled 1
841 00:48:42.579241 PCI: 00:1e.0: enabled 1
842 00:48:42.582618 PCI: 00:1e.1: enabled 0
843 00:48:42.585913 PCI: 00:1e.2: enabled 1
844 00:48:42.589275 SPI: 00: enabled 1
845 00:48:42.589359 PCI: 00:1e.3: enabled 1
846 00:48:42.592793 SPI: 00: enabled 1
847 00:48:42.595514 PCI: 00:1f.0: enabled 1
848 00:48:42.647257 PNP: 0c09.0: enabled 1
849 00:48:42.647434 PCI: 00:1f.1: enabled 0
850 00:48:42.647552 PCI: 00:1f.2: enabled 1
851 00:48:42.647836 GENERIC: 0.0: enabled 1
852 00:48:42.647925 GENERIC: 0.0: enabled 1
853 00:48:42.648008 GENERIC: 1.0: enabled 1
854 00:48:42.648077 PCI: 00:1f.3: enabled 1
855 00:48:42.648343 PCI: 00:1f.4: enabled 0
856 00:48:42.648456 PCI: 00:1f.5: enabled 1
857 00:48:42.648560 PCI: 00:1f.6: enabled 0
858 00:48:42.648676 PCI: 00:1f.7: enabled 0
859 00:48:42.648777 CPU_CLUSTER: 0: enabled 1
860 00:48:42.648875 APIC: 00: enabled 1
861 00:48:42.648973 APIC: 01: enabled 1
862 00:48:42.649069 APIC: 07: enabled 1
863 00:48:42.649462 APIC: 02: enabled 1
864 00:48:42.649539 APIC: 04: enabled 1
865 00:48:42.649609 APIC: 06: enabled 1
866 00:48:42.649858 APIC: 03: enabled 1
867 00:48:42.649928 APIC: 05: enabled 1
868 00:48:42.662215 Root Device scanning...
869 00:48:42.662413 scan_static_bus for Root Device
870 00:48:42.662523 DOMAIN: 0000 enabled
871 00:48:42.662616 CPU_CLUSTER: 0 enabled
872 00:48:42.662706 DOMAIN: 0000 scanning...
873 00:48:42.665324 PCI: pci_scan_bus for bus 00
874 00:48:42.665463 PCI: 00:00.0 [8086/0000] ops
875 00:48:42.668969 PCI: 00:00.0 [8086/9a12] enabled
876 00:48:42.672049 PCI: 00:02.0 [8086/0000] bus ops
877 00:48:42.675319 PCI: 00:02.0 [8086/9a40] enabled
878 00:48:42.679029 PCI: 00:04.0 [8086/0000] bus ops
879 00:48:42.682188 PCI: 00:04.0 [8086/9a03] enabled
880 00:48:42.685469 PCI: 00:05.0 [8086/9a19] enabled
881 00:48:42.688860 PCI: 00:07.0 [0000/0000] hidden
882 00:48:42.692187 PCI: 00:08.0 [8086/9a11] enabled
883 00:48:42.695798 PCI: 00:0a.0 [8086/9a0d] disabled
884 00:48:42.698720 PCI: 00:0d.0 [8086/0000] bus ops
885 00:48:42.702421 PCI: 00:0d.0 [8086/9a13] enabled
886 00:48:42.705346 PCI: 00:14.0 [8086/0000] bus ops
887 00:48:42.708379 PCI: 00:14.0 [8086/a0ed] enabled
888 00:48:42.711565 PCI: 00:14.2 [8086/a0ef] enabled
889 00:48:42.715234 PCI: 00:14.3 [8086/0000] bus ops
890 00:48:42.718820 PCI: 00:14.3 [8086/a0f0] enabled
891 00:48:42.722161 PCI: 00:15.0 [8086/0000] bus ops
892 00:48:42.725009 PCI: 00:15.0 [8086/a0e8] enabled
893 00:48:42.728148 PCI: 00:15.1 [8086/0000] bus ops
894 00:48:42.731510 PCI: 00:15.1 [8086/a0e9] enabled
895 00:48:42.735406 PCI: 00:15.2 [8086/0000] bus ops
896 00:48:42.738556 PCI: 00:15.2 [8086/a0ea] enabled
897 00:48:42.741881 PCI: 00:15.3 [8086/0000] bus ops
898 00:48:42.745032 PCI: 00:15.3 [8086/a0eb] enabled
899 00:48:42.748616 PCI: 00:16.0 [8086/0000] ops
900 00:48:42.751913 PCI: 00:16.0 [8086/a0e0] enabled
901 00:48:42.758972 PCI: Static device PCI: 00:17.0 not found, disabling it.
902 00:48:42.761846 PCI: 00:19.0 [8086/0000] bus ops
903 00:48:42.764938 PCI: 00:19.0 [8086/a0c5] disabled
904 00:48:42.768628 PCI: 00:19.1 [8086/0000] bus ops
905 00:48:42.771931 PCI: 00:19.1 [8086/a0c6] enabled
906 00:48:42.775400 PCI: 00:1d.0 [8086/0000] bus ops
907 00:48:42.778928 PCI: 00:1d.0 [8086/a0b0] enabled
908 00:48:42.782144 PCI: 00:1e.0 [8086/0000] ops
909 00:48:42.785299 PCI: 00:1e.0 [8086/a0a8] enabled
910 00:48:42.788430 PCI: 00:1e.2 [8086/0000] bus ops
911 00:48:42.792401 PCI: 00:1e.2 [8086/a0aa] enabled
912 00:48:42.795793 PCI: 00:1e.3 [8086/0000] bus ops
913 00:48:42.798517 PCI: 00:1e.3 [8086/a0ab] enabled
914 00:48:42.802214 PCI: 00:1f.0 [8086/0000] bus ops
915 00:48:42.805008 PCI: 00:1f.0 [8086/a087] enabled
916 00:48:42.805474 RTC Init
917 00:48:42.808520 Set power on after power failure.
918 00:48:42.811710 Disabling Deep S3
919 00:48:42.812158 Disabling Deep S3
920 00:48:42.815258 Disabling Deep S4
921 00:48:42.818594 Disabling Deep S4
922 00:48:42.819058 Disabling Deep S5
923 00:48:42.821690 Disabling Deep S5
924 00:48:42.825091 PCI: 00:1f.2 [0000/0000] hidden
925 00:48:42.828421 PCI: 00:1f.3 [8086/0000] bus ops
926 00:48:42.831609 PCI: 00:1f.3 [8086/a0c8] enabled
927 00:48:42.834947 PCI: 00:1f.5 [8086/0000] bus ops
928 00:48:42.838482 PCI: 00:1f.5 [8086/a0a4] enabled
929 00:48:42.841721 PCI: Leftover static devices:
930 00:48:42.842133 PCI: 00:10.2
931 00:48:42.842462 PCI: 00:10.6
932 00:48:42.845112 PCI: 00:10.7
933 00:48:42.845610 PCI: 00:06.0
934 00:48:42.848405 PCI: 00:07.1
935 00:48:42.848850 PCI: 00:07.2
936 00:48:42.849187 PCI: 00:07.3
937 00:48:42.851608 PCI: 00:09.0
938 00:48:42.852049 PCI: 00:0d.1
939 00:48:42.854794 PCI: 00:0d.2
940 00:48:42.855206 PCI: 00:0d.3
941 00:48:42.858127 PCI: 00:0e.0
942 00:48:42.858575 PCI: 00:12.0
943 00:48:42.858918 PCI: 00:12.6
944 00:48:42.861466 PCI: 00:13.0
945 00:48:42.861879 PCI: 00:14.1
946 00:48:42.864964 PCI: 00:16.1
947 00:48:42.865426 PCI: 00:16.2
948 00:48:42.865763 PCI: 00:16.3
949 00:48:42.868535 PCI: 00:16.4
950 00:48:42.868949 PCI: 00:16.5
951 00:48:42.871980 PCI: 00:17.0
952 00:48:42.872396 PCI: 00:19.2
953 00:48:42.872730 PCI: 00:1e.1
954 00:48:42.875149 PCI: 00:1f.1
955 00:48:42.875564 PCI: 00:1f.4
956 00:48:42.878357 PCI: 00:1f.6
957 00:48:42.878850 PCI: 00:1f.7
958 00:48:42.882133 PCI: Check your devicetree.cb.
959 00:48:42.885425 PCI: 00:02.0 scanning...
960 00:48:42.888486 scan_generic_bus for PCI: 00:02.0
961 00:48:42.892120 scan_generic_bus for PCI: 00:02.0 done
962 00:48:42.894966 scan_bus: bus PCI: 00:02.0 finished in 7 msecs
963 00:48:42.898730 PCI: 00:04.0 scanning...
964 00:48:42.901535 scan_generic_bus for PCI: 00:04.0
965 00:48:42.905358 GENERIC: 0.0 enabled
966 00:48:42.911529 bus: PCI: 00:04.0[0]->scan_generic_bus for PCI: 00:04.0 done
967 00:48:42.914835 scan_bus: bus PCI: 00:04.0 finished in 11 msecs
968 00:48:42.918291 PCI: 00:0d.0 scanning...
969 00:48:42.921283 scan_static_bus for PCI: 00:0d.0
970 00:48:42.924682 USB0 port 0 enabled
971 00:48:42.925142 USB0 port 0 scanning...
972 00:48:42.928407 scan_static_bus for USB0 port 0
973 00:48:42.931904 USB3 port 0 enabled
974 00:48:42.935273 USB3 port 1 enabled
975 00:48:42.935798 USB3 port 2 disabled
976 00:48:42.938349 USB3 port 3 disabled
977 00:48:42.941849 USB3 port 0 scanning...
978 00:48:42.945305 scan_static_bus for USB3 port 0
979 00:48:42.948458 scan_static_bus for USB3 port 0 done
980 00:48:42.951485 scan_bus: bus USB3 port 0 finished in 6 msecs
981 00:48:42.955186 USB3 port 1 scanning...
982 00:48:42.957973 scan_static_bus for USB3 port 1
983 00:48:42.961746 scan_static_bus for USB3 port 1 done
984 00:48:42.968112 scan_bus: bus USB3 port 1 finished in 6 msecs
985 00:48:42.971924 scan_static_bus for USB0 port 0 done
986 00:48:42.974708 scan_bus: bus USB0 port 0 finished in 43 msecs
987 00:48:42.977981 scan_static_bus for PCI: 00:0d.0 done
988 00:48:42.984747 scan_bus: bus PCI: 00:0d.0 finished in 60 msecs
989 00:48:42.985171 PCI: 00:14.0 scanning...
990 00:48:42.988326 scan_static_bus for PCI: 00:14.0
991 00:48:42.991735 USB0 port 0 enabled
992 00:48:42.994610 USB0 port 0 scanning...
993 00:48:42.997706 scan_static_bus for USB0 port 0
994 00:48:43.001388 USB2 port 0 disabled
995 00:48:43.001469 USB2 port 1 enabled
996 00:48:43.004187 USB2 port 2 enabled
997 00:48:43.004267 USB2 port 3 disabled
998 00:48:43.007714 USB2 port 4 enabled
999 00:48:43.011433 USB2 port 5 disabled
1000 00:48:43.011846 USB2 port 6 disabled
1001 00:48:43.014624 USB2 port 7 disabled
1002 00:48:43.018141 USB2 port 8 disabled
1003 00:48:43.018582 USB2 port 9 disabled
1004 00:48:43.021472 USB3 port 0 disabled
1005 00:48:43.024458 USB3 port 1 enabled
1006 00:48:43.024882 USB3 port 2 disabled
1007 00:48:43.028521 USB3 port 3 disabled
1008 00:48:43.031178 USB2 port 1 scanning...
1009 00:48:43.035545 scan_static_bus for USB2 port 1
1010 00:48:43.038043 scan_static_bus for USB2 port 1 done
1011 00:48:43.041728 scan_bus: bus USB2 port 1 finished in 6 msecs
1012 00:48:43.044229 USB2 port 2 scanning...
1013 00:48:43.047566 scan_static_bus for USB2 port 2
1014 00:48:43.051477 scan_static_bus for USB2 port 2 done
1015 00:48:43.054536 scan_bus: bus USB2 port 2 finished in 6 msecs
1016 00:48:43.057715 USB2 port 4 scanning...
1017 00:48:43.061421 scan_static_bus for USB2 port 4
1018 00:48:43.064642 scan_static_bus for USB2 port 4 done
1019 00:48:43.071082 scan_bus: bus USB2 port 4 finished in 6 msecs
1020 00:48:43.071625 USB3 port 1 scanning...
1021 00:48:43.074382 scan_static_bus for USB3 port 1
1022 00:48:43.081357 scan_static_bus for USB3 port 1 done
1023 00:48:43.084460 scan_bus: bus USB3 port 1 finished in 6 msecs
1024 00:48:43.087681 scan_static_bus for USB0 port 0 done
1025 00:48:43.091257 scan_bus: bus USB0 port 0 finished in 93 msecs
1026 00:48:43.097678 scan_static_bus for PCI: 00:14.0 done
1027 00:48:43.100831 scan_bus: bus PCI: 00:14.0 finished in 110 msecs
1028 00:48:43.104256 PCI: 00:14.3 scanning...
1029 00:48:43.108022 scan_static_bus for PCI: 00:14.3
1030 00:48:43.111410 GENERIC: 0.0 enabled
1031 00:48:43.114202 scan_static_bus for PCI: 00:14.3 done
1032 00:48:43.117799 scan_bus: bus PCI: 00:14.3 finished in 9 msecs
1033 00:48:43.120971 PCI: 00:15.0 scanning...
1034 00:48:43.124347 scan_static_bus for PCI: 00:15.0
1035 00:48:43.127522 I2C: 00:1a enabled
1036 00:48:43.128013 I2C: 00:31 enabled
1037 00:48:43.131219 I2C: 00:32 enabled
1038 00:48:43.135065 scan_static_bus for PCI: 00:15.0 done
1039 00:48:43.138785 scan_bus: bus PCI: 00:15.0 finished in 12 msecs
1040 00:48:43.141744 PCI: 00:15.1 scanning...
1041 00:48:43.145373 scan_static_bus for PCI: 00:15.1
1042 00:48:43.148053 I2C: 00:10 enabled
1043 00:48:43.151686 scan_static_bus for PCI: 00:15.1 done
1044 00:48:43.154831 scan_bus: bus PCI: 00:15.1 finished in 9 msecs
1045 00:48:43.158300 PCI: 00:15.2 scanning...
1046 00:48:43.161552 scan_static_bus for PCI: 00:15.2
1047 00:48:43.164580 scan_static_bus for PCI: 00:15.2 done
1048 00:48:43.171746 scan_bus: bus PCI: 00:15.2 finished in 7 msecs
1049 00:48:43.172341 PCI: 00:15.3 scanning...
1050 00:48:43.175091 scan_static_bus for PCI: 00:15.3
1051 00:48:43.181438 scan_static_bus for PCI: 00:15.3 done
1052 00:48:43.184640 scan_bus: bus PCI: 00:15.3 finished in 7 msecs
1053 00:48:43.188023 PCI: 00:19.1 scanning...
1054 00:48:43.191468 scan_static_bus for PCI: 00:19.1
1055 00:48:43.192060 I2C: 00:15 enabled
1056 00:48:43.197897 scan_static_bus for PCI: 00:19.1 done
1057 00:48:43.201256 scan_bus: bus PCI: 00:19.1 finished in 9 msecs
1058 00:48:43.204597 PCI: 00:1d.0 scanning...
1059 00:48:43.208154 do_pci_scan_bridge for PCI: 00:1d.0
1060 00:48:43.211756 PCI: pci_scan_bus for bus 01
1061 00:48:43.214289 PCI: 01:00.0 [1c5c/174a] enabled
1062 00:48:43.214755 GENERIC: 0.0 enabled
1063 00:48:43.221203 Enabling Common Clock Configuration
1064 00:48:43.224386 L1 Sub-State supported from root port 29
1065 00:48:43.227657 L1 Sub-State Support = 0xf
1066 00:48:43.231484 CommonModeRestoreTime = 0x28
1067 00:48:43.234285 Power On Value = 0x16, Power On Scale = 0x0
1068 00:48:43.234854 ASPM: Enabled L1
1069 00:48:43.240634 PCIe: Max_Payload_Size adjusted to 128
1070 00:48:43.244159 scan_bus: bus PCI: 00:1d.0 finished in 35 msecs
1071 00:48:43.247302 PCI: 00:1e.2 scanning...
1072 00:48:43.251064 scan_generic_bus for PCI: 00:1e.2
1073 00:48:43.251763 SPI: 00 enabled
1074 00:48:43.257740 bus: PCI: 00:1e.2[0]->scan_generic_bus for PCI: 00:1e.2 done
1075 00:48:43.263978 scan_bus: bus PCI: 00:1e.2 finished in 11 msecs
1076 00:48:43.267006 PCI: 00:1e.3 scanning...
1077 00:48:43.270819 scan_generic_bus for PCI: 00:1e.3
1078 00:48:43.271297 SPI: 00 enabled
1079 00:48:43.277243 bus: PCI: 00:1e.3[0]->scan_generic_bus for PCI: 00:1e.3 done
1080 00:48:43.280315 scan_bus: bus PCI: 00:1e.3 finished in 11 msecs
1081 00:48:43.283434 PCI: 00:1f.0 scanning...
1082 00:48:43.287102 scan_static_bus for PCI: 00:1f.0
1083 00:48:43.290727 PNP: 0c09.0 enabled
1084 00:48:43.293859 PNP: 0c09.0 scanning...
1085 00:48:43.296581 scan_static_bus for PNP: 0c09.0
1086 00:48:43.300527 scan_static_bus for PNP: 0c09.0 done
1087 00:48:43.303485 scan_bus: bus PNP: 0c09.0 finished in 6 msecs
1088 00:48:43.307379 scan_static_bus for PCI: 00:1f.0 done
1089 00:48:43.313502 scan_bus: bus PCI: 00:1f.0 finished in 23 msecs
1090 00:48:43.316408 PCI: 00:1f.2 scanning...
1091 00:48:43.319834 scan_static_bus for PCI: 00:1f.2
1092 00:48:43.320351 GENERIC: 0.0 enabled
1093 00:48:43.323439 GENERIC: 0.0 scanning...
1094 00:48:43.326405 scan_static_bus for GENERIC: 0.0
1095 00:48:43.329667 GENERIC: 0.0 enabled
1096 00:48:43.330128 GENERIC: 1.0 enabled
1097 00:48:43.336297 scan_static_bus for GENERIC: 0.0 done
1098 00:48:43.339541 scan_bus: bus GENERIC: 0.0 finished in 11 msecs
1099 00:48:43.343766 scan_static_bus for PCI: 00:1f.2 done
1100 00:48:43.349616 scan_bus: bus PCI: 00:1f.2 finished in 28 msecs
1101 00:48:43.350038 PCI: 00:1f.3 scanning...
1102 00:48:43.353315 scan_static_bus for PCI: 00:1f.3
1103 00:48:43.360203 scan_static_bus for PCI: 00:1f.3 done
1104 00:48:43.363297 scan_bus: bus PCI: 00:1f.3 finished in 7 msecs
1105 00:48:43.366238 PCI: 00:1f.5 scanning...
1106 00:48:43.369740 scan_generic_bus for PCI: 00:1f.5
1107 00:48:43.373283 scan_generic_bus for PCI: 00:1f.5 done
1108 00:48:43.376336 scan_bus: bus PCI: 00:1f.5 finished in 7 msecs
1109 00:48:43.383194 scan_bus: bus DOMAIN: 0000 finished in 717 msecs
1110 00:48:43.386130 scan_static_bus for Root Device done
1111 00:48:43.392791 scan_bus: bus Root Device finished in 737 msecs
1112 00:48:43.393320 done
1113 00:48:43.399214 BS: BS_DEV_ENUMERATE run times (exec / console): 11 / 1296 ms
1114 00:48:43.402940 Chrome EC: UHEPI supported
1115 00:48:43.405941 FMAP: area UNIFIED_MRC_CACHE found @ f00000 (196608 bytes)
1116 00:48:43.412716 SF: Detected 00 0000 with sector size 0x1000, total 0x2000000
1117 00:48:43.415924 SPI flash protection: WPSW=0 SRP0=0
1118 00:48:43.423039 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1119 00:48:43.429356 BS: BS_DEV_ENUMERATE exit times (exec / console): 1 / 23 ms
1120 00:48:43.429838 found VGA at PCI: 00:02.0
1121 00:48:43.432583 Setting up VGA for PCI: 00:02.0
1122 00:48:43.439146 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1123 00:48:43.442709 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1124 00:48:43.446094 Allocating resources...
1125 00:48:43.449056 Reading resources...
1126 00:48:43.452942 Root Device read_resources bus 0 link: 0
1127 00:48:43.455879 DOMAIN: 0000 read_resources bus 0 link: 0
1128 00:48:43.462879 PCI: 00:04.0 read_resources bus 1 link: 0
1129 00:48:43.465887 PCI: 00:04.0 read_resources bus 1 link: 0 done
1130 00:48:43.473470 PCI: 00:0d.0 read_resources bus 0 link: 0
1131 00:48:43.476503 USB0 port 0 read_resources bus 0 link: 0
1132 00:48:43.483545 USB0 port 0 read_resources bus 0 link: 0 done
1133 00:48:43.486561 PCI: 00:0d.0 read_resources bus 0 link: 0 done
1134 00:48:43.492871 PCI: 00:14.0 read_resources bus 0 link: 0
1135 00:48:43.495857 USB0 port 0 read_resources bus 0 link: 0
1136 00:48:43.502789 USB0 port 0 read_resources bus 0 link: 0 done
1137 00:48:43.506029 PCI: 00:14.0 read_resources bus 0 link: 0 done
1138 00:48:43.512416 PCI: 00:14.3 read_resources bus 0 link: 0
1139 00:48:43.515908 PCI: 00:14.3 read_resources bus 0 link: 0 done
1140 00:48:43.519170 PCI: 00:15.0 read_resources bus 0 link: 0
1141 00:48:43.527022 PCI: 00:15.0 read_resources bus 0 link: 0 done
1142 00:48:43.530572 PCI: 00:15.1 read_resources bus 0 link: 0
1143 00:48:43.536676 PCI: 00:15.1 read_resources bus 0 link: 0 done
1144 00:48:43.540414 PCI: 00:19.1 read_resources bus 0 link: 0
1145 00:48:43.547579 PCI: 00:19.1 read_resources bus 0 link: 0 done
1146 00:48:43.550701 PCI: 00:1d.0 read_resources bus 1 link: 0
1147 00:48:43.557563 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1148 00:48:43.560780 PCI: 00:1e.2 read_resources bus 2 link: 0
1149 00:48:43.567659 PCI: 00:1e.2 read_resources bus 2 link: 0 done
1150 00:48:43.570897 PCI: 00:1e.3 read_resources bus 3 link: 0
1151 00:48:43.577602 PCI: 00:1e.3 read_resources bus 3 link: 0 done
1152 00:48:43.580726 PCI: 00:1f.0 read_resources bus 0 link: 0
1153 00:48:43.587449 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1154 00:48:43.591297 PCI: 00:1f.2 read_resources bus 0 link: 0
1155 00:48:43.594146 GENERIC: 0.0 read_resources bus 0 link: 0
1156 00:48:43.600917 GENERIC: 0.0 read_resources bus 0 link: 0 done
1157 00:48:43.604067 PCI: 00:1f.2 read_resources bus 0 link: 0 done
1158 00:48:43.611209 DOMAIN: 0000 read_resources bus 0 link: 0 done
1159 00:48:43.614754 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1160 00:48:43.621510 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1161 00:48:43.624470 Root Device read_resources bus 0 link: 0 done
1162 00:48:43.627762 Done reading resources.
1163 00:48:43.634384 Show resources in subtree (Root Device)...After reading.
1164 00:48:43.637923 Root Device child on link 0 DOMAIN: 0000
1165 00:48:43.641321 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1166 00:48:43.651028 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1167 00:48:43.660988 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1168 00:48:43.664578 PCI: 00:00.0
1169 00:48:43.674419 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1170 00:48:43.681091 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1171 00:48:43.691170 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1172 00:48:43.700994 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1173 00:48:43.710835 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1174 00:48:43.720661 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1175 00:48:43.730618 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1176 00:48:43.737468 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1177 00:48:43.747310 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1178 00:48:43.757317 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1179 00:48:43.766867 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1180 00:48:43.777185 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1181 00:48:43.783732 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1182 00:48:43.793826 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1183 00:48:43.803823 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1184 00:48:43.814115 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1185 00:48:43.823350 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1186 00:48:43.833456 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1187 00:48:43.840224 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1188 00:48:43.850537 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1189 00:48:43.853637 PCI: 00:02.0
1190 00:48:43.863661 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1191 00:48:43.873411 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1192 00:48:43.883559 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1193 00:48:43.887028 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1194 00:48:43.896447 PCI: 00:04.0 resource base 0 size 20000 align 17 gran 17 limit ffffffffffffffff flags 201 index 10
1195 00:48:43.899998 GENERIC: 0.0
1196 00:48:43.900566 PCI: 00:05.0
1197 00:48:43.909797 PCI: 00:05.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1198 00:48:43.916595 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1199 00:48:43.917174 GENERIC: 0.0
1200 00:48:43.919922 PCI: 00:08.0
1201 00:48:43.930470 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1202 00:48:43.930989 PCI: 00:0a.0
1203 00:48:43.933003 PCI: 00:0d.0 child on link 0 USB0 port 0
1204 00:48:43.942952 PCI: 00:0d.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1205 00:48:43.950156 USB0 port 0 child on link 0 USB3 port 0
1206 00:48:43.950580 USB3 port 0
1207 00:48:43.952972 USB3 port 1
1208 00:48:43.953397 USB3 port 2
1209 00:48:43.956267 USB3 port 3
1210 00:48:43.959687 PCI: 00:14.0 child on link 0 USB0 port 0
1211 00:48:43.969956 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1212 00:48:43.976299 USB0 port 0 child on link 0 USB2 port 0
1213 00:48:43.976724 USB2 port 0
1214 00:48:43.979999 USB2 port 1
1215 00:48:43.980413 USB2 port 2
1216 00:48:43.983250 USB2 port 3
1217 00:48:43.983610 USB2 port 4
1218 00:48:43.986104 USB2 port 5
1219 00:48:43.986523 USB2 port 6
1220 00:48:43.989748 USB2 port 7
1221 00:48:43.990170 USB2 port 8
1222 00:48:43.993027 USB2 port 9
1223 00:48:43.993445 USB3 port 0
1224 00:48:43.996129 USB3 port 1
1225 00:48:43.996576 USB3 port 2
1226 00:48:43.999619 USB3 port 3
1227 00:48:44.000071 PCI: 00:14.2
1228 00:48:44.009786 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1229 00:48:44.019210 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1230 00:48:44.026132 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1231 00:48:44.035796 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1232 00:48:44.035950 GENERIC: 0.0
1233 00:48:44.042699 PCI: 00:15.0 child on link 0 I2C: 00:1a
1234 00:48:44.052913 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1235 00:48:44.053068 I2C: 00:1a
1236 00:48:44.055984 I2C: 00:31
1237 00:48:44.056156 I2C: 00:32
1238 00:48:44.059133 PCI: 00:15.1 child on link 0 I2C: 00:10
1239 00:48:44.069088 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1240 00:48:44.072724 I2C: 00:10
1241 00:48:44.073018 PCI: 00:15.2
1242 00:48:44.082620 PCI: 00:15.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1243 00:48:44.086370 PCI: 00:15.3
1244 00:48:44.096216 PCI: 00:15.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1245 00:48:44.096932 PCI: 00:16.0
1246 00:48:44.106178 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1247 00:48:44.109549 PCI: 00:19.0
1248 00:48:44.113387 PCI: 00:19.1 child on link 0 I2C: 00:15
1249 00:48:44.122288 PCI: 00:19.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1250 00:48:44.125915 I2C: 00:15
1251 00:48:44.129577 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1252 00:48:44.138973 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1253 00:48:44.148650 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1254 00:48:44.155648 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1255 00:48:44.159298 GENERIC: 0.0
1256 00:48:44.159830 PCI: 01:00.0
1257 00:48:44.168606 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1258 00:48:44.179022 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 18
1259 00:48:44.188870 PCI: 01:00.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 1c
1260 00:48:44.189506 PCI: 00:1e.0
1261 00:48:44.202230 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1262 00:48:44.205092 PCI: 00:1e.2 child on link 0 SPI: 00
1263 00:48:44.215077 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1264 00:48:44.215648 SPI: 00
1265 00:48:44.221794 PCI: 00:1e.3 child on link 0 SPI: 00
1266 00:48:44.232402 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1267 00:48:44.232932 SPI: 00
1268 00:48:44.235778 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1269 00:48:44.245645 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1270 00:48:44.246206 PNP: 0c09.0
1271 00:48:44.255630 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1272 00:48:44.258925 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1273 00:48:44.268382 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1274 00:48:44.278662 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1275 00:48:44.281757 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1276 00:48:44.285248 GENERIC: 0.0
1277 00:48:44.288843 GENERIC: 1.0
1278 00:48:44.289386 PCI: 00:1f.3
1279 00:48:44.298933 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1280 00:48:44.308149 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1281 00:48:44.311879 PCI: 00:1f.5
1282 00:48:44.318038 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1283 00:48:44.325064 CPU_CLUSTER: 0 child on link 0 APIC: 00
1284 00:48:44.325529 APIC: 00
1285 00:48:44.325895 APIC: 01
1286 00:48:44.328547 APIC: 07
1287 00:48:44.329000 APIC: 02
1288 00:48:44.331698 APIC: 04
1289 00:48:44.332188 APIC: 06
1290 00:48:44.332555 APIC: 03
1291 00:48:44.334804 APIC: 05
1292 00:48:44.341768 ==== Resource allocator: DOMAIN: 0000 - Pass 1 (gathering requirements) ===
1293 00:48:44.347938 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff
1294 00:48:44.354761 PCI: 00:1d.0 io: size: 0 align: 12 gran: 12 limit: ffff done
1295 00:48:44.358335 PCI: 00:1d.0 mem: size: 0 align: 20 gran: 20 limit: ffffffff
1296 00:48:44.364462 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1297 00:48:44.367902 PCI: 01:00.0 18 * [0x4000 - 0x4fff] mem
1298 00:48:44.371378 PCI: 01:00.0 1c * [0x5000 - 0x5fff] mem
1299 00:48:44.378552 PCI: 00:1d.0 mem: size: 100000 align: 20 gran: 20 limit: ffffffff done
1300 00:48:44.387891 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1301 00:48:44.394842 PCI: 00:1d.0 prefmem: size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1302 00:48:44.401111 === Resource allocator: DOMAIN: 0000 - Pass 2 (allocating resources) ===
1303 00:48:44.408075 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1304 00:48:44.414365 update_constraints: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1305 00:48:44.424350 update_constraints: PNP: 0c09.0 00 base 00000800 limit 000009fe io (fixed)
1306 00:48:44.431393 update_constraints: PCI: 00:1f.2 01 base 00001800 limit 000018ff io (fixed)
1307 00:48:44.434710 DOMAIN: 0000: Resource ranges:
1308 00:48:44.438469 * Base: 1000, Size: 800, Tag: 100
1309 00:48:44.440921 * Base: 1900, Size: e700, Tag: 100
1310 00:48:44.448019 PCI: 00:02.0 20 * [0x1000 - 0x103f] limit: 103f io
1311 00:48:44.454521 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff done
1312 00:48:44.461535 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff
1313 00:48:44.467439 update_constraints: PCI: 00:00.0 00 base c0000000 limit cfffffff mem (fixed)
1314 00:48:44.473779 update_constraints: PCI: 00:00.0 01 base fedc0000 limit feddffff mem (fixed)
1315 00:48:44.483855 update_constraints: PCI: 00:00.0 02 base feda0000 limit feda0fff mem (fixed)
1316 00:48:44.490379 update_constraints: PCI: 00:00.0 03 base feda1000 limit feda1fff mem (fixed)
1317 00:48:44.496961 update_constraints: PCI: 00:00.0 04 base fb000000 limit fb000fff mem (fixed)
1318 00:48:44.506756 update_constraints: PCI: 00:00.0 05 base fed80000 limit fed83fff mem (fixed)
1319 00:48:44.513463 update_constraints: PCI: 00:00.0 06 base fed90000 limit fed90fff mem (fixed)
1320 00:48:44.520423 update_constraints: PCI: 00:00.0 07 base fed92000 limit fed92fff mem (fixed)
1321 00:48:44.530360 update_constraints: PCI: 00:00.0 08 base fed84000 limit fed84fff mem (fixed)
1322 00:48:44.536766 update_constraints: PCI: 00:00.0 09 base fed85000 limit fed85fff mem (fixed)
1323 00:48:44.543404 update_constraints: PCI: 00:00.0 0a base fed86000 limit fed86fff mem (fixed)
1324 00:48:44.549904 update_constraints: PCI: 00:00.0 0b base fed87000 limit fed87fff mem (fixed)
1325 00:48:44.559885 update_constraints: PCI: 00:00.0 0c base fed91000 limit fed91fff mem (fixed)
1326 00:48:44.567062 update_constraints: PCI: 00:00.0 0d base 00000000 limit 0009ffff mem (fixed)
1327 00:48:44.573594 update_constraints: PCI: 00:00.0 0e base 000c0000 limit 76ffffff mem (fixed)
1328 00:48:44.583943 update_constraints: PCI: 00:00.0 0f base 77000000 limit 7fbfffff mem (fixed)
1329 00:48:44.590123 update_constraints: PCI: 00:00.0 10 base 100000000 limit 2803fffff mem (fixed)
1330 00:48:44.597457 update_constraints: PCI: 00:00.0 11 base 000a0000 limit 000bffff mem (fixed)
1331 00:48:44.606588 update_constraints: PCI: 00:00.0 12 base 000c0000 limit 000fffff mem (fixed)
1332 00:48:44.613281 update_constraints: PCI: 00:00.0 13 base f8000000 limit f9ffffff mem (fixed)
1333 00:48:44.619947 update_constraints: PCI: 00:1e.0 10 base fe03e000 limit fe03efff mem (fixed)
1334 00:48:44.630015 update_constraints: PCI: 00:1f.2 00 base fe000000 limit fe00ffff mem (fixed)
1335 00:48:44.633600 DOMAIN: 0000: Resource ranges:
1336 00:48:44.636879 * Base: 7fc00000, Size: 40400000, Tag: 200
1337 00:48:44.640120 * Base: d0000000, Size: 28000000, Tag: 200
1338 00:48:44.646284 * Base: fa000000, Size: 1000000, Tag: 200
1339 00:48:44.649950 * Base: fb001000, Size: 2fff000, Tag: 200
1340 00:48:44.653050 * Base: fe010000, Size: 2e000, Tag: 200
1341 00:48:44.656327 * Base: fe03f000, Size: d41000, Tag: 200
1342 00:48:44.662790 * Base: fed88000, Size: 8000, Tag: 200
1343 00:48:44.666372 * Base: fed93000, Size: d000, Tag: 200
1344 00:48:44.669643 * Base: feda2000, Size: 1e000, Tag: 200
1345 00:48:44.672911 * Base: fede0000, Size: 1220000, Tag: 200
1346 00:48:44.679750 * Base: 280400000, Size: 7d7fc00000, Tag: 100200
1347 00:48:44.686620 PCI: 00:02.0 18 * [0x80000000 - 0x8fffffff] limit: 8fffffff prefmem
1348 00:48:44.692790 PCI: 00:02.0 10 * [0x90000000 - 0x90ffffff] limit: 90ffffff mem
1349 00:48:44.699779 PCI: 00:05.0 10 * [0x91000000 - 0x91ffffff] limit: 91ffffff mem
1350 00:48:44.706088 PCI: 00:1d.0 20 * [0x7fc00000 - 0x7fcfffff] limit: 7fcfffff mem
1351 00:48:44.712663 PCI: 00:1f.3 20 * [0x7fd00000 - 0x7fdfffff] limit: 7fdfffff mem
1352 00:48:44.719309 PCI: 00:04.0 10 * [0x7fe00000 - 0x7fe1ffff] limit: 7fe1ffff mem
1353 00:48:44.725715 PCI: 00:0d.0 10 * [0x7fe20000 - 0x7fe2ffff] limit: 7fe2ffff mem
1354 00:48:44.732422 PCI: 00:14.0 10 * [0x7fe30000 - 0x7fe3ffff] limit: 7fe3ffff mem
1355 00:48:44.739467 PCI: 00:14.2 10 * [0x7fe40000 - 0x7fe43fff] limit: 7fe43fff mem
1356 00:48:44.745777 PCI: 00:14.3 10 * [0x7fe44000 - 0x7fe47fff] limit: 7fe47fff mem
1357 00:48:44.752676 PCI: 00:1f.3 10 * [0x7fe48000 - 0x7fe4bfff] limit: 7fe4bfff mem
1358 00:48:44.759094 PCI: 00:08.0 10 * [0x7fe4c000 - 0x7fe4cfff] limit: 7fe4cfff mem
1359 00:48:44.765854 PCI: 00:14.2 18 * [0x7fe4d000 - 0x7fe4dfff] limit: 7fe4dfff mem
1360 00:48:44.773112 PCI: 00:15.0 10 * [0x7fe4e000 - 0x7fe4efff] limit: 7fe4efff mem
1361 00:48:44.779341 PCI: 00:15.1 10 * [0x7fe4f000 - 0x7fe4ffff] limit: 7fe4ffff mem
1362 00:48:44.786110 PCI: 00:15.2 10 * [0x7fe50000 - 0x7fe50fff] limit: 7fe50fff mem
1363 00:48:44.792447 PCI: 00:15.3 10 * [0x7fe51000 - 0x7fe51fff] limit: 7fe51fff mem
1364 00:48:44.799021 PCI: 00:16.0 10 * [0x7fe52000 - 0x7fe52fff] limit: 7fe52fff mem
1365 00:48:44.805663 PCI: 00:19.1 10 * [0x7fe53000 - 0x7fe53fff] limit: 7fe53fff mem
1366 00:48:44.812711 PCI: 00:1e.2 10 * [0x7fe54000 - 0x7fe54fff] limit: 7fe54fff mem
1367 00:48:44.818902 PCI: 00:1e.3 10 * [0x7fe55000 - 0x7fe55fff] limit: 7fe55fff mem
1368 00:48:44.825795 PCI: 00:1f.5 10 * [0x7fe56000 - 0x7fe56fff] limit: 7fe56fff mem
1369 00:48:44.832527 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: 7fffffffff done
1370 00:48:44.842273 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff
1371 00:48:44.845644 PCI: 00:1d.0: Resource ranges:
1372 00:48:44.848596 * Base: 7fc00000, Size: 100000, Tag: 200
1373 00:48:44.855463 PCI: 01:00.0 10 * [0x7fc00000 - 0x7fc03fff] limit: 7fc03fff mem
1374 00:48:44.862063 PCI: 01:00.0 18 * [0x7fc04000 - 0x7fc04fff] limit: 7fc04fff mem
1375 00:48:44.869094 PCI: 01:00.0 1c * [0x7fc05000 - 0x7fc05fff] limit: 7fc05fff mem
1376 00:48:44.875796 PCI: 00:1d.0 mem: base: 7fc00000 size: 100000 align: 20 gran: 20 limit: 7fcfffff done
1377 00:48:44.885630 === Resource allocator: DOMAIN: 0000 - resource allocation complete ===
1378 00:48:44.888941 Root Device assign_resources, bus 0 link: 0
1379 00:48:44.891759 DOMAIN: 0000 assign_resources, bus 0 link: 0
1380 00:48:44.901927 PCI: 00:02.0 10 <- [0x0090000000 - 0x0090ffffff] size 0x01000000 gran 0x18 mem64
1381 00:48:44.908648 PCI: 00:02.0 18 <- [0x0080000000 - 0x008fffffff] size 0x10000000 gran 0x1c prefmem64
1382 00:48:44.918390 PCI: 00:02.0 20 <- [0x0000001000 - 0x000000103f] size 0x00000040 gran 0x06 io
1383 00:48:44.924819 PCI: 00:04.0 10 <- [0x007fe00000 - 0x007fe1ffff] size 0x00020000 gran 0x11 mem64
1384 00:48:44.931582 PCI: 00:04.0 assign_resources, bus 1 link: 0
1385 00:48:44.935037 PCI: 00:04.0 assign_resources, bus 1 link: 0
1386 00:48:44.944956 PCI: 00:05.0 10 <- [0x0091000000 - 0x0091ffffff] size 0x01000000 gran 0x18 mem64
1387 00:48:44.951748 PCI: 00:08.0 10 <- [0x007fe4c000 - 0x007fe4cfff] size 0x00001000 gran 0x0c mem64
1388 00:48:44.961998 PCI: 00:0d.0 10 <- [0x007fe20000 - 0x007fe2ffff] size 0x00010000 gran 0x10 mem64
1389 00:48:44.964561 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1390 00:48:44.968044 PCI: 00:0d.0 assign_resources, bus 0 link: 0
1391 00:48:44.978305 PCI: 00:14.0 10 <- [0x007fe30000 - 0x007fe3ffff] size 0x00010000 gran 0x10 mem64
1392 00:48:44.981069 PCI: 00:14.0 assign_resources, bus 0 link: 0
1393 00:48:44.988375 PCI: 00:14.0 assign_resources, bus 0 link: 0
1394 00:48:44.995066 PCI: 00:14.2 10 <- [0x007fe40000 - 0x007fe43fff] size 0x00004000 gran 0x0e mem64
1395 00:48:45.001131 PCI: 00:14.2 18 <- [0x007fe4d000 - 0x007fe4dfff] size 0x00001000 gran 0x0c mem64
1396 00:48:45.011382 PCI: 00:14.3 10 <- [0x007fe44000 - 0x007fe47fff] size 0x00004000 gran 0x0e mem64
1397 00:48:45.014627 PCI: 00:14.3 assign_resources, bus 0 link: 0
1398 00:48:45.021074 PCI: 00:14.3 assign_resources, bus 0 link: 0
1399 00:48:45.027950 PCI: 00:15.0 10 <- [0x007fe4e000 - 0x007fe4efff] size 0x00001000 gran 0x0c mem64
1400 00:48:45.034687 PCI: 00:15.0 assign_resources, bus 0 link: 0
1401 00:48:45.037811 PCI: 00:15.0 assign_resources, bus 0 link: 0
1402 00:48:45.044454 PCI: 00:15.1 10 <- [0x007fe4f000 - 0x007fe4ffff] size 0x00001000 gran 0x0c mem64
1403 00:48:45.051122 PCI: 00:15.1 assign_resources, bus 0 link: 0
1404 00:48:45.054179 PCI: 00:15.1 assign_resources, bus 0 link: 0
1405 00:48:45.064333 PCI: 00:15.2 10 <- [0x007fe50000 - 0x007fe50fff] size 0x00001000 gran 0x0c mem64
1406 00:48:45.070651 PCI: 00:15.3 10 <- [0x007fe51000 - 0x007fe51fff] size 0x00001000 gran 0x0c mem64
1407 00:48:45.080687 PCI: 00:16.0 10 <- [0x007fe52000 - 0x007fe52fff] size 0x00001000 gran 0x0c mem64
1408 00:48:45.087555 PCI: 00:19.1 10 <- [0x007fe53000 - 0x007fe53fff] size 0x00001000 gran 0x0c mem64
1409 00:48:45.094276 PCI: 00:19.1 assign_resources, bus 0 link: 0
1410 00:48:45.097451 PCI: 00:19.1 assign_resources, bus 0 link: 0
1411 00:48:45.107248 PCI: 00:1d.0 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
1412 00:48:45.117649 PCI: 00:1d.0 24 <- [0xffffffffffffffff - 0xfffffffffffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1413 00:48:45.123724 PCI: 00:1d.0 20 <- [0x007fc00000 - 0x007fcfffff] size 0x00100000 gran 0x14 bus 01 mem
1414 00:48:45.130752 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1415 00:48:45.137034 PCI: 01:00.0 10 <- [0x007fc00000 - 0x007fc03fff] size 0x00004000 gran 0x0e mem64
1416 00:48:45.143902 PCI: 01:00.0 18 <- [0x007fc04000 - 0x007fc04fff] size 0x00001000 gran 0x0c mem
1417 00:48:45.153706 PCI: 01:00.0 1c <- [0x007fc05000 - 0x007fc05fff] size 0x00001000 gran 0x0c mem
1418 00:48:45.156700 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1419 00:48:45.167135 PCI: 00:1e.2 10 <- [0x007fe54000 - 0x007fe54fff] size 0x00001000 gran 0x0c mem64
1420 00:48:45.170537 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1421 00:48:45.177155 PCI: 00:1e.2 assign_resources, bus 2 link: 0
1422 00:48:45.183510 PCI: 00:1e.3 10 <- [0x007fe55000 - 0x007fe55fff] size 0x00001000 gran 0x0c mem64
1423 00:48:45.186714 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1424 00:48:45.193446 PCI: 00:1e.3 assign_resources, bus 3 link: 0
1425 00:48:45.196804 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1426 00:48:45.203747 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1427 00:48:45.206551 LPC: Trying to open IO window from 800 size 1ff
1428 00:48:45.217286 PCI: 00:1f.3 10 <- [0x007fe48000 - 0x007fe4bfff] size 0x00004000 gran 0x0e mem64
1429 00:48:45.223338 PCI: 00:1f.3 20 <- [0x007fd00000 - 0x007fdfffff] size 0x00100000 gran 0x14 mem64
1430 00:48:45.233602 PCI: 00:1f.5 10 <- [0x007fe56000 - 0x007fe56fff] size 0x00001000 gran 0x0c mem
1431 00:48:45.236238 DOMAIN: 0000 assign_resources, bus 0 link: 0
1432 00:48:45.240133 Root Device assign_resources, bus 0 link: 0
1433 00:48:45.243277 Done setting resources.
1434 00:48:45.249899 Show resources in subtree (Root Device)...After assigning values.
1435 00:48:45.253149 Root Device child on link 0 DOMAIN: 0000
1436 00:48:45.259845 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1437 00:48:45.269737 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1438 00:48:45.276096 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit 7fffffffff flags 40040200 index 10000100
1439 00:48:45.279581 PCI: 00:00.0
1440 00:48:45.289735 PCI: 00:00.0 resource base c0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1441 00:48:45.299648 PCI: 00:00.0 resource base fedc0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 1
1442 00:48:45.309598 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1443 00:48:45.315919 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1444 00:48:45.326110 PCI: 00:00.0 resource base fb000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1445 00:48:45.336228 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1446 00:48:45.346172 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 6
1447 00:48:45.357027 PCI: 00:00.0 resource base fed92000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1448 00:48:45.366021 PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1449 00:48:45.372833 PCI: 00:00.0 resource base fed85000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 9
1450 00:48:45.382492 PCI: 00:00.0 resource base fed86000 size 1000 align 0 gran 0 limit 0 flags f0000200 index a
1451 00:48:45.392505 PCI: 00:00.0 resource base fed87000 size 1000 align 0 gran 0 limit 0 flags f0000200 index b
1452 00:48:45.402216 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index c
1453 00:48:45.409400 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index d
1454 00:48:45.419173 PCI: 00:00.0 resource base c0000 size 76f40000 align 0 gran 0 limit 0 flags e0004200 index e
1455 00:48:45.429134 PCI: 00:00.0 resource base 77000000 size 8c00000 align 0 gran 0 limit 0 flags f0000200 index f
1456 00:48:45.438628 PCI: 00:00.0 resource base 100000000 size 180400000 align 0 gran 0 limit 0 flags e0004200 index 10
1457 00:48:45.449050 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index 11
1458 00:48:45.458628 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index 12
1459 00:48:45.468817 PCI: 00:00.0 resource base f8000000 size 2000000 align 0 gran 0 limit 0 flags f0000200 index 13
1460 00:48:45.469344 PCI: 00:02.0
1461 00:48:45.478535 PCI: 00:02.0 resource base 90000000 size 1000000 align 24 gran 24 limit 90ffffff flags 60000201 index 10
1462 00:48:45.491805 PCI: 00:02.0 resource base 80000000 size 10000000 align 28 gran 28 limit 8fffffff flags 60001201 index 18
1463 00:48:45.498576 PCI: 00:02.0 resource base 1000 size 40 align 6 gran 6 limit 103f flags 60000100 index 20
1464 00:48:45.505360 PCI: 00:04.0 child on link 0 GENERIC: 0.0
1465 00:48:45.515452 PCI: 00:04.0 resource base 7fe00000 size 20000 align 17 gran 17 limit 7fe1ffff flags 60000201 index 10
1466 00:48:45.518573 GENERIC: 0.0
1467 00:48:45.519299 PCI: 00:05.0
1468 00:48:45.528391 PCI: 00:05.0 resource base 91000000 size 1000000 align 24 gran 24 limit 91ffffff flags 60000201 index 10
1469 00:48:45.534825 PCI: 00:07.0 child on link 0 GENERIC: 0.0
1470 00:48:45.535248 GENERIC: 0.0
1471 00:48:45.538063 PCI: 00:08.0
1472 00:48:45.548427 PCI: 00:08.0 resource base 7fe4c000 size 1000 align 12 gran 12 limit 7fe4cfff flags 60000201 index 10
1473 00:48:45.548916 PCI: 00:0a.0
1474 00:48:45.555069 PCI: 00:0d.0 child on link 0 USB0 port 0
1475 00:48:45.565097 PCI: 00:0d.0 resource base 7fe20000 size 10000 align 16 gran 16 limit 7fe2ffff flags 60000201 index 10
1476 00:48:45.568028 USB0 port 0 child on link 0 USB3 port 0
1477 00:48:45.571422 USB3 port 0
1478 00:48:45.571839 USB3 port 1
1479 00:48:45.574799 USB3 port 2
1480 00:48:45.575215 USB3 port 3
1481 00:48:45.578089 PCI: 00:14.0 child on link 0 USB0 port 0
1482 00:48:45.591489 PCI: 00:14.0 resource base 7fe30000 size 10000 align 16 gran 16 limit 7fe3ffff flags 60000201 index 10
1483 00:48:45.594553 USB0 port 0 child on link 0 USB2 port 0
1484 00:48:45.595073 USB2 port 0
1485 00:48:45.598089 USB2 port 1
1486 00:48:45.601557 USB2 port 2
1487 00:48:45.602022 USB2 port 3
1488 00:48:45.604821 USB2 port 4
1489 00:48:45.605243 USB2 port 5
1490 00:48:45.608386 USB2 port 6
1491 00:48:45.608811 USB2 port 7
1492 00:48:45.611244 USB2 port 8
1493 00:48:45.611765 USB2 port 9
1494 00:48:45.614721 USB3 port 0
1495 00:48:45.615143 USB3 port 1
1496 00:48:45.618050 USB3 port 2
1497 00:48:45.618472 USB3 port 3
1498 00:48:45.621242 PCI: 00:14.2
1499 00:48:45.631059 PCI: 00:14.2 resource base 7fe40000 size 4000 align 14 gran 14 limit 7fe43fff flags 60000201 index 10
1500 00:48:45.641135 PCI: 00:14.2 resource base 7fe4d000 size 1000 align 12 gran 12 limit 7fe4dfff flags 60000201 index 18
1501 00:48:45.644595 PCI: 00:14.3 child on link 0 GENERIC: 0.0
1502 00:48:45.657559 PCI: 00:14.3 resource base 7fe44000 size 4000 align 14 gran 14 limit 7fe47fff flags 60000201 index 10
1503 00:48:45.657983 GENERIC: 0.0
1504 00:48:45.660827 PCI: 00:15.0 child on link 0 I2C: 00:1a
1505 00:48:45.674123 PCI: 00:15.0 resource base 7fe4e000 size 1000 align 12 gran 12 limit 7fe4efff flags 60000201 index 10
1506 00:48:45.674628 I2C: 00:1a
1507 00:48:45.675106 I2C: 00:31
1508 00:48:45.677579 I2C: 00:32
1509 00:48:45.681052 PCI: 00:15.1 child on link 0 I2C: 00:10
1510 00:48:45.690984 PCI: 00:15.1 resource base 7fe4f000 size 1000 align 12 gran 12 limit 7fe4ffff flags 60000201 index 10
1511 00:48:45.693965 I2C: 00:10
1512 00:48:45.694412 PCI: 00:15.2
1513 00:48:45.704637 PCI: 00:15.2 resource base 7fe50000 size 1000 align 12 gran 12 limit 7fe50fff flags 60000201 index 10
1514 00:48:45.707353 PCI: 00:15.3
1515 00:48:45.717631 PCI: 00:15.3 resource base 7fe51000 size 1000 align 12 gran 12 limit 7fe51fff flags 60000201 index 10
1516 00:48:45.720651 PCI: 00:16.0
1517 00:48:45.730794 PCI: 00:16.0 resource base 7fe52000 size 1000 align 12 gran 12 limit 7fe52fff flags 60000201 index 10
1518 00:48:45.731228 PCI: 00:19.0
1519 00:48:45.737288 PCI: 00:19.1 child on link 0 I2C: 00:15
1520 00:48:45.747461 PCI: 00:19.1 resource base 7fe53000 size 1000 align 12 gran 12 limit 7fe53fff flags 60000201 index 10
1521 00:48:45.748089 I2C: 00:15
1522 00:48:45.750621 PCI: 00:1d.0 child on link 0 GENERIC: 0.0
1523 00:48:45.760349 PCI: 00:1d.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 20080102 index 1c
1524 00:48:45.774065 PCI: 00:1d.0 resource base ffffffffffffffff size 0 align 20 gran 20 limit ffffffffffffffff flags 20081202 index 24
1525 00:48:45.783368 PCI: 00:1d.0 resource base 7fc00000 size 100000 align 20 gran 20 limit 7fcfffff flags 60080202 index 20
1526 00:48:45.783451 GENERIC: 0.0
1527 00:48:45.786848 PCI: 01:00.0
1528 00:48:45.796427 PCI: 01:00.0 resource base 7fc00000 size 4000 align 14 gran 14 limit 7fc03fff flags 60000201 index 10
1529 00:48:45.806474 PCI: 01:00.0 resource base 7fc04000 size 1000 align 12 gran 12 limit 7fc04fff flags 60000200 index 18
1530 00:48:45.816431 PCI: 01:00.0 resource base 7fc05000 size 1000 align 12 gran 12 limit 7fc05fff flags 60000200 index 1c
1531 00:48:45.819931 PCI: 00:1e.0
1532 00:48:45.830129 PCI: 00:1e.0 resource base fe03e000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1533 00:48:45.832975 PCI: 00:1e.2 child on link 0 SPI: 00
1534 00:48:45.846586 PCI: 00:1e.2 resource base 7fe54000 size 1000 align 12 gran 12 limit 7fe54fff flags 60000201 index 10
1535 00:48:45.846674 SPI: 00
1536 00:48:45.850126 PCI: 00:1e.3 child on link 0 SPI: 00
1537 00:48:45.859799 PCI: 00:1e.3 resource base 7fe55000 size 1000 align 12 gran 12 limit 7fe55fff flags 60000201 index 10
1538 00:48:45.863234 SPI: 00
1539 00:48:45.866223 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1540 00:48:45.876562 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1541 00:48:45.876647 PNP: 0c09.0
1542 00:48:45.886608 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1543 00:48:45.889555 PCI: 00:1f.2 child on link 0 GENERIC: 0.0
1544 00:48:45.899530 PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 0
1545 00:48:45.909902 PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 18ff flags c0000100 index 1
1546 00:48:45.912847 GENERIC: 0.0 child on link 0 GENERIC: 0.0
1547 00:48:45.916304 GENERIC: 0.0
1548 00:48:45.916388 GENERIC: 1.0
1549 00:48:45.919664 PCI: 00:1f.3
1550 00:48:45.930148 PCI: 00:1f.3 resource base 7fe48000 size 4000 align 14 gran 14 limit 7fe4bfff flags 60000201 index 10
1551 00:48:45.939319 PCI: 00:1f.3 resource base 7fd00000 size 100000 align 20 gran 20 limit 7fdfffff flags 60000201 index 20
1552 00:48:45.942952 PCI: 00:1f.5
1553 00:48:45.952667 PCI: 00:1f.5 resource base 7fe56000 size 1000 align 12 gran 12 limit 7fe56fff flags 60000200 index 10
1554 00:48:45.956074 CPU_CLUSTER: 0 child on link 0 APIC: 00
1555 00:48:45.956152 APIC: 00
1556 00:48:45.959102 APIC: 01
1557 00:48:45.959202 APIC: 07
1558 00:48:45.959276 APIC: 02
1559 00:48:45.962826 APIC: 04
1560 00:48:45.962901 APIC: 06
1561 00:48:45.966962 APIC: 03
1562 00:48:45.967057 APIC: 05
1563 00:48:45.969493 Done allocating resources.
1564 00:48:45.976105 BS: BS_DEV_RESOURCES run times (exec / console): 28 / 2514 ms
1565 00:48:45.979443 fw_config match found: AUDIO=MAX98373_ALC5682I_I2S_UP4
1566 00:48:45.985795 Configure GPIOs for I2S audio on UP4.
1567 00:48:45.992550 BS: BS_DEV_ENABLE entry times (exec / console): 2 / 9 ms
1568 00:48:45.992630 Enabling resources...
1569 00:48:45.999795 PCI: 00:00.0 subsystem <- 8086/9a12
1570 00:48:45.999900 PCI: 00:00.0 cmd <- 06
1571 00:48:46.002741 PCI: 00:02.0 subsystem <- 8086/9a40
1572 00:48:46.006013 PCI: 00:02.0 cmd <- 03
1573 00:48:46.009376 PCI: 00:04.0 subsystem <- 8086/9a03
1574 00:48:46.012825 PCI: 00:04.0 cmd <- 02
1575 00:48:46.015911 PCI: 00:05.0 subsystem <- 8086/9a19
1576 00:48:46.019578 PCI: 00:05.0 cmd <- 02
1577 00:48:46.022447 PCI: 00:08.0 subsystem <- 8086/9a11
1578 00:48:46.026185 PCI: 00:08.0 cmd <- 06
1579 00:48:46.029411 PCI: 00:0d.0 subsystem <- 8086/9a13
1580 00:48:46.032523 PCI: 00:0d.0 cmd <- 02
1581 00:48:46.035738 PCI: 00:14.0 subsystem <- 8086/a0ed
1582 00:48:46.039392 PCI: 00:14.0 cmd <- 02
1583 00:48:46.042408 PCI: 00:14.2 subsystem <- 8086/a0ef
1584 00:48:46.042488 PCI: 00:14.2 cmd <- 02
1585 00:48:46.048781 PCI: 00:14.3 subsystem <- 8086/a0f0
1586 00:48:46.048861 PCI: 00:14.3 cmd <- 02
1587 00:48:46.052295 PCI: 00:15.0 subsystem <- 8086/a0e8
1588 00:48:46.055423 PCI: 00:15.0 cmd <- 02
1589 00:48:46.058999 PCI: 00:15.1 subsystem <- 8086/a0e9
1590 00:48:46.062077 PCI: 00:15.1 cmd <- 02
1591 00:48:46.065466 PCI: 00:15.2 subsystem <- 8086/a0ea
1592 00:48:46.068899 PCI: 00:15.2 cmd <- 02
1593 00:48:46.072239 PCI: 00:15.3 subsystem <- 8086/a0eb
1594 00:48:46.075593 PCI: 00:15.3 cmd <- 02
1595 00:48:46.078645 PCI: 00:16.0 subsystem <- 8086/a0e0
1596 00:48:46.081984 PCI: 00:16.0 cmd <- 02
1597 00:48:46.085347 PCI: 00:19.1 subsystem <- 8086/a0c6
1598 00:48:46.088822 PCI: 00:19.1 cmd <- 02
1599 00:48:46.092076 PCI: 00:1d.0 bridge ctrl <- 0013
1600 00:48:46.095477 PCI: 00:1d.0 subsystem <- 8086/a0b0
1601 00:48:46.095560 PCI: 00:1d.0 cmd <- 06
1602 00:48:46.102267 PCI: 00:1e.0 subsystem <- 8086/a0a8
1603 00:48:46.102348 PCI: 00:1e.0 cmd <- 06
1604 00:48:46.105137 PCI: 00:1e.2 subsystem <- 8086/a0aa
1605 00:48:46.108367 PCI: 00:1e.2 cmd <- 06
1606 00:48:46.111895 PCI: 00:1e.3 subsystem <- 8086/a0ab
1607 00:48:46.114976 PCI: 00:1e.3 cmd <- 02
1608 00:48:46.118414 PCI: 00:1f.0 subsystem <- 8086/a087
1609 00:48:46.121499 PCI: 00:1f.0 cmd <- 407
1610 00:48:46.125311 PCI: 00:1f.3 subsystem <- 8086/a0c8
1611 00:48:46.128253 PCI: 00:1f.3 cmd <- 02
1612 00:48:46.132161 PCI: 00:1f.5 subsystem <- 8086/a0a4
1613 00:48:46.134896 PCI: 00:1f.5 cmd <- 406
1614 00:48:46.138670 PCI: 01:00.0 cmd <- 02
1615 00:48:46.142902 done.
1616 00:48:46.146265 BS: BS_DEV_ENABLE run times (exec / console): 10 / 140 ms
1617 00:48:46.149886 Initializing devices...
1618 00:48:46.152717 Root Device init
1619 00:48:46.155989 Chrome EC: Set SMI mask to 0x0000000000000000
1620 00:48:46.162872 Chrome EC: clear events_b mask to 0x0000000000000000
1621 00:48:46.169335 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1622 00:48:46.175877 Chrome EC: Set S3 LAZY WAKE mask to 0x000000001800101e
1623 00:48:46.179288 Chrome EC: Set S0iX LAZY WAKE mask to 0x000000001800101e
1624 00:48:46.185858 Chrome EC: Set WAKE mask to 0x0000000000000000
1625 00:48:46.189448 fw_config match found: DB_USB=USB3_ACTIVE
1626 00:48:46.195803 Configure Right Type-C port orientation for retimer
1627 00:48:46.199462 Root Device init finished in 42 msecs
1628 00:48:46.202326 PCI: 00:00.0 init
1629 00:48:46.205920 CPU TDP = 9 Watts
1630 00:48:46.206038 CPU PL1 = 9 Watts
1631 00:48:46.209402 CPU PL2 = 40 Watts
1632 00:48:46.209548 CPU PL4 = 83 Watts
1633 00:48:46.212665 PCI: 00:00.0 init finished in 8 msecs
1634 00:48:46.215835 PCI: 00:02.0 init
1635 00:48:46.219096 GMA: Found VBT in CBFS
1636 00:48:46.222673 GMA: Found valid VBT in CBFS
1637 00:48:46.225829 framebuffer_info: bytes_per_line: 7680, bits_per_pixel: 32
1638 00:48:46.236277 x_res x y_res: 1920 x 1080, size: 8294400 at 0x80000000
1639 00:48:46.239590 PCI: 00:02.0 init finished in 18 msecs
1640 00:48:46.242345 PCI: 00:05.0 init
1641 00:48:46.245824 PCI: 00:05.0 init finished in 0 msecs
1642 00:48:46.245907 PCI: 00:08.0 init
1643 00:48:46.252744 PCI: 00:08.0 init finished in 0 msecs
1644 00:48:46.252828 PCI: 00:14.0 init
1645 00:48:46.259022 PCI: 00:14.0 init finished in 0 msecs
1646 00:48:46.259131 PCI: 00:14.2 init
1647 00:48:46.262330 PCI: 00:14.2 init finished in 0 msecs
1648 00:48:46.266452 PCI: 00:15.0 init
1649 00:48:46.269504 I2C bus 0 version 0x3230302a
1650 00:48:46.273114 DW I2C bus 0 at 0x7fe4e000 (400 KHz)
1651 00:48:46.276099 PCI: 00:15.0 init finished in 6 msecs
1652 00:48:46.279616 PCI: 00:15.1 init
1653 00:48:46.282781 I2C bus 1 version 0x3230302a
1654 00:48:46.286578 DW I2C bus 1 at 0x7fe4f000 (400 KHz)
1655 00:48:46.289829 PCI: 00:15.1 init finished in 6 msecs
1656 00:48:46.293211 PCI: 00:15.2 init
1657 00:48:46.295845 I2C bus 2 version 0x3230302a
1658 00:48:46.299694 DW I2C bus 2 at 0x7fe50000 (400 KHz)
1659 00:48:46.302899 PCI: 00:15.2 init finished in 6 msecs
1660 00:48:46.302982 PCI: 00:15.3 init
1661 00:48:46.306229 I2C bus 3 version 0x3230302a
1662 00:48:46.309236 DW I2C bus 3 at 0x7fe51000 (400 KHz)
1663 00:48:46.316165 PCI: 00:15.3 init finished in 6 msecs
1664 00:48:46.316253 PCI: 00:16.0 init
1665 00:48:46.319415 PCI: 00:16.0 init finished in 0 msecs
1666 00:48:46.322972 PCI: 00:19.1 init
1667 00:48:46.326344 I2C bus 5 version 0x3230302a
1668 00:48:46.329933 DW I2C bus 5 at 0x7fe53000 (400 KHz)
1669 00:48:46.333005 PCI: 00:19.1 init finished in 6 msecs
1670 00:48:46.335981 PCI: 00:1d.0 init
1671 00:48:46.339689 Initializing PCH PCIe bridge.
1672 00:48:46.342772 PCI: 00:1d.0 init finished in 3 msecs
1673 00:48:46.346303 PCI: 00:1f.0 init
1674 00:48:46.349395 IOAPIC: Initializing IOAPIC at 0xfec00000
1675 00:48:46.356335 IOAPIC: Bootstrap Processor Local APIC = 0x00
1676 00:48:46.356418 IOAPIC: ID = 0x02
1677 00:48:46.359696 IOAPIC: Dumping registers
1678 00:48:46.362924 reg 0x0000: 0x02000000
1679 00:48:46.363007 reg 0x0001: 0x00770020
1680 00:48:46.366130 reg 0x0002: 0x00000000
1681 00:48:46.369601 PCI: 00:1f.0 init finished in 21 msecs
1682 00:48:46.372909 PCI: 00:1f.2 init
1683 00:48:46.376831 Disabling ACPI via APMC.
1684 00:48:46.379762 APMC done.
1685 00:48:46.383455 PCI: 00:1f.2 init finished in 5 msecs
1686 00:48:46.394090 PCI: 01:00.0 init
1687 00:48:46.397465 PCI: 01:00.0 init finished in 0 msecs
1688 00:48:46.400581 PNP: 0c09.0 init
1689 00:48:46.403761 Google Chrome EC uptime: 8.406 seconds
1690 00:48:46.410352 Google Chrome AP resets since EC boot: 1
1691 00:48:46.413714 Google Chrome most recent AP reset causes:
1692 00:48:46.417205 0.348: 32775 shutdown: entering G3
1693 00:48:46.423684 Google Chrome EC reset flags at last EC boot: reset-pin | sysjump
1694 00:48:46.427555 PNP: 0c09.0 init finished in 22 msecs
1695 00:48:46.433088 Devices initialized
1696 00:48:46.436339 Show all devs... After init.
1697 00:48:46.439176 Root Device: enabled 1
1698 00:48:46.439273 DOMAIN: 0000: enabled 1
1699 00:48:46.442650 CPU_CLUSTER: 0: enabled 1
1700 00:48:46.446284 PCI: 00:00.0: enabled 1
1701 00:48:46.449277 PCI: 00:02.0: enabled 1
1702 00:48:46.449359 PCI: 00:04.0: enabled 1
1703 00:48:46.452605 PCI: 00:05.0: enabled 1
1704 00:48:46.455839 PCI: 00:06.0: enabled 0
1705 00:48:46.459872 PCI: 00:07.0: enabled 0
1706 00:48:46.459977 PCI: 00:07.1: enabled 0
1707 00:48:46.462634 PCI: 00:07.2: enabled 0
1708 00:48:46.466030 PCI: 00:07.3: enabled 0
1709 00:48:46.469110 PCI: 00:08.0: enabled 1
1710 00:48:46.469190 PCI: 00:09.0: enabled 0
1711 00:48:46.472760 PCI: 00:0a.0: enabled 0
1712 00:48:46.475927 PCI: 00:0d.0: enabled 1
1713 00:48:46.479286 PCI: 00:0d.1: enabled 0
1714 00:48:46.479367 PCI: 00:0d.2: enabled 0
1715 00:48:46.482908 PCI: 00:0d.3: enabled 0
1716 00:48:46.485959 PCI: 00:0e.0: enabled 0
1717 00:48:46.486064 PCI: 00:10.2: enabled 1
1718 00:48:46.489403 PCI: 00:10.6: enabled 0
1719 00:48:46.492614 PCI: 00:10.7: enabled 0
1720 00:48:46.496039 PCI: 00:12.0: enabled 0
1721 00:48:46.496119 PCI: 00:12.6: enabled 0
1722 00:48:46.499102 PCI: 00:13.0: enabled 0
1723 00:48:46.502913 PCI: 00:14.0: enabled 1
1724 00:48:46.506205 PCI: 00:14.1: enabled 0
1725 00:48:46.506285 PCI: 00:14.2: enabled 1
1726 00:48:46.509459 PCI: 00:14.3: enabled 1
1727 00:48:46.512571 PCI: 00:15.0: enabled 1
1728 00:48:46.515837 PCI: 00:15.1: enabled 1
1729 00:48:46.515945 PCI: 00:15.2: enabled 1
1730 00:48:46.519594 PCI: 00:15.3: enabled 1
1731 00:48:46.522883 PCI: 00:16.0: enabled 1
1732 00:48:46.522983 PCI: 00:16.1: enabled 0
1733 00:48:46.525767 PCI: 00:16.2: enabled 0
1734 00:48:46.529509 PCI: 00:16.3: enabled 0
1735 00:48:46.532645 PCI: 00:16.4: enabled 0
1736 00:48:46.532722 PCI: 00:16.5: enabled 0
1737 00:48:46.535546 PCI: 00:17.0: enabled 0
1738 00:48:46.539137 PCI: 00:19.0: enabled 0
1739 00:48:46.542446 PCI: 00:19.1: enabled 1
1740 00:48:46.542526 PCI: 00:19.2: enabled 0
1741 00:48:46.545632 PCI: 00:1c.0: enabled 1
1742 00:48:46.549632 PCI: 00:1c.1: enabled 0
1743 00:48:46.552713 PCI: 00:1c.2: enabled 0
1744 00:48:46.552795 PCI: 00:1c.3: enabled 0
1745 00:48:46.555815 PCI: 00:1c.4: enabled 0
1746 00:48:46.559231 PCI: 00:1c.5: enabled 0
1747 00:48:46.559355 PCI: 00:1c.6: enabled 1
1748 00:48:46.562257 PCI: 00:1c.7: enabled 0
1749 00:48:46.565896 PCI: 00:1d.0: enabled 1
1750 00:48:46.569317 PCI: 00:1d.1: enabled 0
1751 00:48:46.569398 PCI: 00:1d.2: enabled 1
1752 00:48:46.572501 PCI: 00:1d.3: enabled 0
1753 00:48:46.575889 PCI: 00:1e.0: enabled 1
1754 00:48:46.578903 PCI: 00:1e.1: enabled 0
1755 00:48:46.578999 PCI: 00:1e.2: enabled 1
1756 00:48:46.582766 PCI: 00:1e.3: enabled 1
1757 00:48:46.586023 PCI: 00:1f.0: enabled 1
1758 00:48:46.589412 PCI: 00:1f.1: enabled 0
1759 00:48:46.589492 PCI: 00:1f.2: enabled 1
1760 00:48:46.592229 PCI: 00:1f.3: enabled 1
1761 00:48:46.595757 PCI: 00:1f.4: enabled 0
1762 00:48:46.595861 PCI: 00:1f.5: enabled 1
1763 00:48:46.598861 PCI: 00:1f.6: enabled 0
1764 00:48:46.602351 PCI: 00:1f.7: enabled 0
1765 00:48:46.605712 APIC: 00: enabled 1
1766 00:48:46.605794 GENERIC: 0.0: enabled 1
1767 00:48:46.608923 GENERIC: 0.0: enabled 1
1768 00:48:46.612262 GENERIC: 1.0: enabled 1
1769 00:48:46.616074 GENERIC: 0.0: enabled 1
1770 00:48:46.616156 GENERIC: 1.0: enabled 1
1771 00:48:46.619001 USB0 port 0: enabled 1
1772 00:48:46.622443 GENERIC: 0.0: enabled 1
1773 00:48:46.622556 USB0 port 0: enabled 1
1774 00:48:46.625750 GENERIC: 0.0: enabled 1
1775 00:48:46.629065 I2C: 00:1a: enabled 1
1776 00:48:46.629148 I2C: 00:31: enabled 1
1777 00:48:46.632161 I2C: 00:32: enabled 1
1778 00:48:46.635727 I2C: 00:10: enabled 1
1779 00:48:46.638992 I2C: 00:15: enabled 1
1780 00:48:46.639074 GENERIC: 0.0: enabled 0
1781 00:48:46.642297 GENERIC: 1.0: enabled 0
1782 00:48:46.645784 GENERIC: 0.0: enabled 1
1783 00:48:46.645873 SPI: 00: enabled 1
1784 00:48:46.648963 SPI: 00: enabled 1
1785 00:48:46.652241 PNP: 0c09.0: enabled 1
1786 00:48:46.652323 GENERIC: 0.0: enabled 1
1787 00:48:46.655650 USB3 port 0: enabled 1
1788 00:48:46.658599 USB3 port 1: enabled 1
1789 00:48:46.658742 USB3 port 2: enabled 0
1790 00:48:46.662001 USB3 port 3: enabled 0
1791 00:48:46.665441 USB2 port 0: enabled 0
1792 00:48:46.668762 USB2 port 1: enabled 1
1793 00:48:46.668869 USB2 port 2: enabled 1
1794 00:48:46.672417 USB2 port 3: enabled 0
1795 00:48:46.675849 USB2 port 4: enabled 1
1796 00:48:46.675931 USB2 port 5: enabled 0
1797 00:48:46.678980 USB2 port 6: enabled 0
1798 00:48:46.682590 USB2 port 7: enabled 0
1799 00:48:46.682669 USB2 port 8: enabled 0
1800 00:48:46.685707 USB2 port 9: enabled 0
1801 00:48:46.688822 USB3 port 0: enabled 0
1802 00:48:46.691876 USB3 port 1: enabled 1
1803 00:48:46.692014 USB3 port 2: enabled 0
1804 00:48:46.695347 USB3 port 3: enabled 0
1805 00:48:46.698748 GENERIC: 0.0: enabled 1
1806 00:48:46.698829 GENERIC: 1.0: enabled 1
1807 00:48:46.702196 APIC: 01: enabled 1
1808 00:48:46.705528 APIC: 07: enabled 1
1809 00:48:46.705609 APIC: 02: enabled 1
1810 00:48:46.708575 APIC: 04: enabled 1
1811 00:48:46.711827 APIC: 06: enabled 1
1812 00:48:46.711932 APIC: 03: enabled 1
1813 00:48:46.715300 APIC: 05: enabled 1
1814 00:48:46.719030 PCI: 01:00.0: enabled 1
1815 00:48:46.721739 BS: BS_DEV_INIT run times (exec / console): 29 / 540 ms
1816 00:48:46.728692 FMAP: area RW_ELOG found @ f30000 (4096 bytes)
1817 00:48:46.731597 ELOG: NV offset 0xf30000 size 0x1000
1818 00:48:46.738847 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1819 00:48:46.744916 ELOG: Event(17) added with size 13 at 2023-05-23 00:48:46 UTC
1820 00:48:46.751938 ELOG: Event(92) added with size 9 at 2023-05-23 00:48:46 UTC
1821 00:48:46.758773 ELOG: Event(93) added with size 9 at 2023-05-23 00:48:46 UTC
1822 00:48:46.765104 ELOG: Event(9E) added with size 10 at 2023-05-23 00:48:46 UTC
1823 00:48:46.771619 ELOG: Event(9F) added with size 14 at 2023-05-23 00:48:46 UTC
1824 00:48:46.775163 BS: BS_DEV_INIT exit times (exec / console): 3 / 45 ms
1825 00:48:46.782157 ELOG: Event(A1) added with size 10 at 2023-05-23 00:48:46 UTC
1826 00:48:46.788428 elog_add_boot_reason: Logged recovery mode boot, reason: 0x1b
1827 00:48:46.794769 BS: BS_POST_DEVICE entry times (exec / console): 0 / 12 ms
1828 00:48:46.798034 Finalize devices...
1829 00:48:46.798161 Devices finalized
1830 00:48:46.804955 BS: BS_POST_DEVICE run times (exec / console): 0 / 4 ms
1831 00:48:46.808253 FMAP: area RW_NVRAM found @ f37000 (24576 bytes)
1832 00:48:46.815019 BS: BS_POST_DEVICE exit times (exec / console): 0 / 5 ms
1833 00:48:46.818205 ME: HFSTS1 : 0x80030055
1834 00:48:46.824873 ME: HFSTS2 : 0x30280116
1835 00:48:46.828319 ME: HFSTS3 : 0x00000050
1836 00:48:46.834588 ME: HFSTS4 : 0x00004000
1837 00:48:46.837931 ME: HFSTS5 : 0x00000000
1838 00:48:46.841589 ME: HFSTS6 : 0x00400006
1839 00:48:46.844799 ME: Manufacturing Mode : YES
1840 00:48:46.847894 ME: SPI Protection Mode Enabled : NO
1841 00:48:46.854702 ME: FW Partition Table : OK
1842 00:48:46.857947 ME: Bringup Loader Failure : NO
1843 00:48:46.861180 ME: Firmware Init Complete : NO
1844 00:48:46.864574 ME: Boot Options Present : NO
1845 00:48:46.868156 ME: Update In Progress : NO
1846 00:48:46.871090 ME: D0i3 Support : YES
1847 00:48:46.874708 ME: Low Power State Enabled : NO
1848 00:48:46.877941 ME: CPU Replaced : YES
1849 00:48:46.884559 ME: CPU Replacement Valid : YES
1850 00:48:46.887681 ME: Current Working State : 5
1851 00:48:46.890950 ME: Current Operation State : 1
1852 00:48:46.894969 ME: Current Operation Mode : 3
1853 00:48:46.897937 ME: Error Code : 0
1854 00:48:46.900958 ME: Enhanced Debug Mode : NO
1855 00:48:46.904314 ME: CPU Debug Disabled : YES
1856 00:48:46.907891 ME: TXT Support : NO
1857 00:48:46.914395 BS: BS_OS_RESUME_CHECK exit times (exec / console): 0 / 94 ms
1858 00:48:46.921067 CBFS: Found 'fallback/dsdt.aml' @0x72f80 size 0x5a67 in mcache @0x76c4c1c4
1859 00:48:46.924805 CBFS: 'fallback/slic' not found.
1860 00:48:46.930863 ACPI: Writing ACPI tables at 76b01000.
1861 00:48:46.930946 ACPI: * FACS
1862 00:48:46.934289 ACPI: * DSDT
1863 00:48:46.937850 Ramoops buffer: 0x100000@0x76a00000.
1864 00:48:46.941284 FMAP: area RO_VPD found @ 1800000 (16384 bytes)
1865 00:48:46.947774 FMAP: area RW_VPD found @ f35000 (8192 bytes)
1866 00:48:46.950854 Google Chrome EC: version:
1867 00:48:46.955114 ro: voema_v2.0.7540-147f8d37d1
1868 00:48:46.958003 rw: voema_v2.0.7540-147f8d37d1
1869 00:48:46.958076 running image: 2
1870 00:48:46.964186 PCI space above 4GB MMIO is at 0x280400000, len = 0x7d7fc00000
1871 00:48:46.968698 ACPI: * FADT
1872 00:48:46.968785 SCI is IRQ9
1873 00:48:46.975670 ACPI: added table 1/32, length now 40
1874 00:48:46.975784 ACPI: * SSDT
1875 00:48:46.978507 Found 1 CPU(s) with 8 core(s) each.
1876 00:48:46.985643 \_SB.PCI0.PMC: Intel Tigerlake at PCI: 00:1f.2
1877 00:48:46.988442 \_SB.DPTF: Intel DPTF at GENERIC: 0.0
1878 00:48:46.992364 \_SB.PCI0.CNVW: WIFI Device GENERIC: 0.0
1879 00:48:46.995241 \_SB.PCI0.I2C0.RT58: Headset Codec at I2C: 00:1a
1880 00:48:47.002067 \_SB.PCI0.I2C0.MAXR: Maxim MAX98373 Codec address 031h
1881 00:48:47.008737 \_SB.PCI0.I2C0.MAXL: Maxim MAX98373 Codec address 032h
1882 00:48:47.011854 \_SB.PCI0.I2C1.H010: ELAN Touchscreen at I2C: 00:10
1883 00:48:47.018326 \_SB.PCI0.I2C5.D015: ELAN Touchpad at I2C: 00:15
1884 00:48:47.025247 \_SB.PCI0.RP09: Enable RTD3 for PCI: 00:1d.0 (Intel PCIe Runtime D3)
1885 00:48:47.028537 \_SB.PCI0.RP09: Added StorageD3Enable property
1886 00:48:47.031678 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1887 00:48:47.038286 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 00
1888 00:48:47.045510 PS2K: Physmap: [ EA E7 91 92 93 94 95 A0 AE B0 ]
1889 00:48:47.048311 PS2K: Passing 80 keymaps to kernel
1890 00:48:47.055376 \_SB.PCI0.TXHC.RHUB.SS01: USB3 Type-C Port C0 (MLB) at USB3 port 0
1891 00:48:47.061530 \_SB.PCI0.TXHC.RHUB.SS02: USB3 Type-C Port C1 (DB) at USB3 port 1
1892 00:48:47.068462 \_SB.PCI0.XHCI.RHUB.HS02: USB2 Type-A Port A1 (DB) at USB2 port 1
1893 00:48:47.075045 \_SB.PCI0.XHCI.RHUB.HS03: USB2 Type-C Port C1 (DB) at USB2 port 2
1894 00:48:47.082013 \_SB.PCI0.XHCI.RHUB.HS05: USB2 Type-C Port C0 (MLB) at USB2 port 4
1895 00:48:47.088584 \_SB.PCI0.XHCI.RHUB.SS02: USB3 Type-A Port A1 (DB) at USB3 port 1
1896 00:48:47.094976 \_SB.PCI0.PMC.MUX.CON0: Intel PMC MUX CONN Driver at GENERIC: 0.0
1897 00:48:47.098452 \_SB.PCI0.PMC.MUX.CON1: Intel PMC MUX CONN Driver at GENERIC: 1.0
1898 00:48:47.104625 ACPI: added table 2/32, length now 44
1899 00:48:47.104703 ACPI: * MCFG
1900 00:48:47.107944 ACPI: added table 3/32, length now 48
1901 00:48:47.111121 ACPI: * TPM2
1902 00:48:47.114689 TPM2 log created at 0x769f0000
1903 00:48:47.118061 ACPI: added table 4/32, length now 52
1904 00:48:47.118141 ACPI: * MADT
1905 00:48:47.121177 SCI is IRQ9
1906 00:48:47.124533 ACPI: added table 5/32, length now 56
1907 00:48:47.124612 current = 76b09850
1908 00:48:47.127884 ACPI: * DMAR
1909 00:48:47.131361 ACPI: added table 6/32, length now 60
1910 00:48:47.134366 ACPI: added table 7/32, length now 64
1911 00:48:47.137942 ACPI: * HPET
1912 00:48:47.141539 ACPI: added table 8/32, length now 68
1913 00:48:47.141611 ACPI: done.
1914 00:48:47.144736 ACPI tables: 35216 bytes.
1915 00:48:47.147702 smbios_write_tables: 769ef000
1916 00:48:47.151001 EC returned error result code 3
1917 00:48:47.154510 Couldn't obtain OEM name from CBI
1918 00:48:47.158229 Create SMBIOS type 16
1919 00:48:47.161022 Create SMBIOS type 17
1920 00:48:47.161098 GENERIC: 0.0 (WIFI Device)
1921 00:48:47.164978 SMBIOS tables: 1750 bytes.
1922 00:48:47.171605 Writing table forward entry at 0x00000500
1923 00:48:47.174548 Wrote coreboot table at: 0x00000500, 0x10 bytes, checksum 392c
1924 00:48:47.180968 Writing coreboot table at 0x76b25000
1925 00:48:47.184385 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1926 00:48:47.191359 1. 0000000000001000-000000000009ffff: RAM
1927 00:48:47.194873 2. 00000000000a0000-00000000000fffff: RESERVED
1928 00:48:47.197544 3. 0000000000100000-00000000769eefff: RAM
1929 00:48:47.204153 4. 00000000769ef000-0000000076b97fff: CONFIGURATION TABLES
1930 00:48:47.210965 5. 0000000076b98000-0000000076c09fff: RAMSTAGE
1931 00:48:47.214573 6. 0000000076c0a000-0000000076ffffff: CONFIGURATION TABLES
1932 00:48:47.220872 7. 0000000077000000-000000007fbfffff: RESERVED
1933 00:48:47.224112 8. 00000000c0000000-00000000cfffffff: RESERVED
1934 00:48:47.231012 9. 00000000f8000000-00000000f9ffffff: RESERVED
1935 00:48:47.234052 10. 00000000fb000000-00000000fb000fff: RESERVED
1936 00:48:47.241007 11. 00000000fe000000-00000000fe00ffff: RESERVED
1937 00:48:47.244224 12. 00000000fed80000-00000000fed87fff: RESERVED
1938 00:48:47.247219 13. 00000000fed90000-00000000fed92fff: RESERVED
1939 00:48:47.254163 14. 00000000feda0000-00000000feda1fff: RESERVED
1940 00:48:47.257255 15. 00000000fedc0000-00000000feddffff: RESERVED
1941 00:48:47.264473 16. 0000000100000000-00000002803fffff: RAM
1942 00:48:47.267077 Passing 4 GPIOs to payload:
1943 00:48:47.270399 NAME | PORT | POLARITY | VALUE
1944 00:48:47.277283 lid | undefined | high | high
1945 00:48:47.280916 power | undefined | high | low
1946 00:48:47.287215 oprom | undefined | high | low
1947 00:48:47.290617 EC in RW | 0x000000e5 | high | high
1948 00:48:47.297304 Wrote coreboot table at: 0x76b25000, 0x610 bytes, checksum 24
1949 00:48:47.300547 coreboot table: 1576 bytes.
1950 00:48:47.303731 IMD ROOT 0. 0x76fff000 0x00001000
1951 00:48:47.307043 IMD SMALL 1. 0x76ffe000 0x00001000
1952 00:48:47.313771 FSP MEMORY 2. 0x76c4e000 0x003b0000
1953 00:48:47.317278 VPD 3. 0x76c4d000 0x00000367
1954 00:48:47.320646 RO MCACHE 4. 0x76c4c000 0x00000fdc
1955 00:48:47.324006 CONSOLE 5. 0x76c2c000 0x00020000
1956 00:48:47.327407 FMAP 6. 0x76c2b000 0x00000578
1957 00:48:47.330574 TIME STAMP 7. 0x76c2a000 0x00000910
1958 00:48:47.333900 VBOOT WORK 8. 0x76c16000 0x00014000
1959 00:48:47.337730 ROMSTG STCK 9. 0x76c15000 0x00001000
1960 00:48:47.340811 AFTER CAR 10. 0x76c0a000 0x0000b000
1961 00:48:47.347520 RAMSTAGE 11. 0x76b97000 0x00073000
1962 00:48:47.350760 REFCODE 12. 0x76b42000 0x00055000
1963 00:48:47.353716 SMM BACKUP 13. 0x76b32000 0x00010000
1964 00:48:47.357057 4f444749 14. 0x76b30000 0x00002000
1965 00:48:47.360462 EXT VBT15. 0x76b2d000 0x0000219f
1966 00:48:47.364072 COREBOOT 16. 0x76b25000 0x00008000
1967 00:48:47.367458 ACPI 17. 0x76b01000 0x00024000
1968 00:48:47.370716 ACPI GNVS 18. 0x76b00000 0x00001000
1969 00:48:47.373768 RAMOOPS 19. 0x76a00000 0x00100000
1970 00:48:47.380603 TPM2 TCGLOG20. 0x769f0000 0x00010000
1971 00:48:47.383937 SMBIOS 21. 0x769ef000 0x00000800
1972 00:48:47.384049 IMD small region:
1973 00:48:47.387488 IMD ROOT 0. 0x76ffec00 0x00000400
1974 00:48:47.393745 FSP RUNTIME 1. 0x76ffebe0 0x00000004
1975 00:48:47.397504 POWER STATE 2. 0x76ffeb80 0x00000044
1976 00:48:47.400645 ROMSTAGE 3. 0x76ffeb60 0x00000004
1977 00:48:47.404160 MEM INFO 4. 0x76ffe980 0x000001e0
1978 00:48:47.410287 BS: BS_WRITE_TABLES run times (exec / console): 5 / 484 ms
1979 00:48:47.413831 MTRR: Physical address space:
1980 00:48:47.420346 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1981 00:48:47.427597 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1982 00:48:47.430747 0x00000000000c0000 - 0x0000000077000000 size 0x76f40000 type 6
1983 00:48:47.437300 0x0000000077000000 - 0x0000000080000000 size 0x09000000 type 0
1984 00:48:47.443692 0x0000000080000000 - 0x0000000090000000 size 0x10000000 type 1
1985 00:48:47.450172 0x0000000090000000 - 0x0000000100000000 size 0x70000000 type 0
1986 00:48:47.457272 0x0000000100000000 - 0x0000000280400000 size 0x180400000 type 6
1987 00:48:47.460174 MTRR: Fixed MSR 0x250 0x0606060606060606
1988 00:48:47.463395 MTRR: Fixed MSR 0x258 0x0606060606060606
1989 00:48:47.470169 MTRR: Fixed MSR 0x259 0x0000000000000000
1990 00:48:47.473326 MTRR: Fixed MSR 0x268 0x0606060606060606
1991 00:48:47.476826 MTRR: Fixed MSR 0x269 0x0606060606060606
1992 00:48:47.480665 MTRR: Fixed MSR 0x26a 0x0606060606060606
1993 00:48:47.487138 MTRR: Fixed MSR 0x26b 0x0606060606060606
1994 00:48:47.489874 MTRR: Fixed MSR 0x26c 0x0606060606060606
1995 00:48:47.493273 MTRR: Fixed MSR 0x26d 0x0606060606060606
1996 00:48:47.496500 MTRR: Fixed MSR 0x26e 0x0606060606060606
1997 00:48:47.503804 MTRR: Fixed MSR 0x26f 0x0606060606060606
1998 00:48:47.506488 call enable_fixed_mtrr()
1999 00:48:47.509850 CPU physical address size: 39 bits
2000 00:48:47.513317 MTRR: default type WB/UC MTRR counts: 6/6.
2001 00:48:47.516986 MTRR: UC selected as default type.
2002 00:48:47.523074 MTRR: 0 base 0x0000000000000000 mask 0x0000007f80000000 type 6
2003 00:48:47.530066 MTRR: 1 base 0x0000000077000000 mask 0x0000007fff000000 type 0
2004 00:48:47.537592 MTRR: 2 base 0x0000000078000000 mask 0x0000007ff8000000 type 0
2005 00:48:47.542950 MTRR: 3 base 0x0000000080000000 mask 0x0000007ff0000000 type 1
2006 00:48:47.550030 MTRR: 4 base 0x0000000100000000 mask 0x0000007f00000000 type 6
2007 00:48:47.553166 MTRR: 5 base 0x0000000200000000 mask 0x0000007f00000000 type 6
2008 00:48:47.560910 MTRR: Fixed MSR 0x250 0x0606060606060606
2009 00:48:47.564299 MTRR: Fixed MSR 0x258 0x0606060606060606
2010 00:48:47.567397 MTRR: Fixed MSR 0x259 0x0000000000000000
2011 00:48:47.570415 MTRR: Fixed MSR 0x268 0x0606060606060606
2012 00:48:47.577833 MTRR: Fixed MSR 0x269 0x0606060606060606
2013 00:48:47.580611 MTRR: Fixed MSR 0x26a 0x0606060606060606
2014 00:48:47.584167 MTRR: Fixed MSR 0x26b 0x0606060606060606
2015 00:48:47.587237 MTRR: Fixed MSR 0x26c 0x0606060606060606
2016 00:48:47.593943 MTRR: Fixed MSR 0x26d 0x0606060606060606
2017 00:48:47.596980 MTRR: Fixed MSR 0x26e 0x0606060606060606
2018 00:48:47.600438 MTRR: Fixed MSR 0x26f 0x0606060606060606
2019 00:48:47.600520
2020 00:48:47.603668 MTRR check
2021 00:48:47.607190 call enable_fixed_mtrr()
2022 00:48:47.607262 Fixed MTRRs : Enabled
2023 00:48:47.610723 Variable MTRRs: Enabled
2024 00:48:47.610793
2025 00:48:47.613770 CPU physical address size: 39 bits
2026 00:48:47.621135 BS: BS_WRITE_TABLES exit times (exec / console): 50 / 151 ms
2027 00:48:47.624240 MTRR: Fixed MSR 0x250 0x0606060606060606
2028 00:48:47.630604 MTRR: Fixed MSR 0x250 0x0606060606060606
2029 00:48:47.634249 MTRR: Fixed MSR 0x258 0x0606060606060606
2030 00:48:47.637455 MTRR: Fixed MSR 0x259 0x0000000000000000
2031 00:48:47.640752 MTRR: Fixed MSR 0x268 0x0606060606060606
2032 00:48:47.647562 MTRR: Fixed MSR 0x269 0x0606060606060606
2033 00:48:47.650347 MTRR: Fixed MSR 0x26a 0x0606060606060606
2034 00:48:47.653691 MTRR: Fixed MSR 0x26b 0x0606060606060606
2035 00:48:47.657100 MTRR: Fixed MSR 0x26c 0x0606060606060606
2036 00:48:47.663787 MTRR: Fixed MSR 0x26d 0x0606060606060606
2037 00:48:47.667239 MTRR: Fixed MSR 0x26e 0x0606060606060606
2038 00:48:47.670142 MTRR: Fixed MSR 0x26f 0x0606060606060606
2039 00:48:47.677396 MTRR: Fixed MSR 0x258 0x0606060606060606
2040 00:48:47.677479 call enable_fixed_mtrr()
2041 00:48:47.683760 MTRR: Fixed MSR 0x259 0x0000000000000000
2042 00:48:47.687135 MTRR: Fixed MSR 0x268 0x0606060606060606
2043 00:48:47.690063 MTRR: Fixed MSR 0x269 0x0606060606060606
2044 00:48:47.693566 MTRR: Fixed MSR 0x26a 0x0606060606060606
2045 00:48:47.700586 MTRR: Fixed MSR 0x26b 0x0606060606060606
2046 00:48:47.703583 MTRR: Fixed MSR 0x26c 0x0606060606060606
2047 00:48:47.706744 MTRR: Fixed MSR 0x26d 0x0606060606060606
2048 00:48:47.710500 MTRR: Fixed MSR 0x26e 0x0606060606060606
2049 00:48:47.716568 MTRR: Fixed MSR 0x26f 0x0606060606060606
2050 00:48:47.720348 CPU physical address size: 39 bits
2051 00:48:47.723260 call enable_fixed_mtrr()
2052 00:48:47.726946 MTRR: Fixed MSR 0x250 0x0606060606060606
2053 00:48:47.730119 MTRR: Fixed MSR 0x250 0x0606060606060606
2054 00:48:47.736736 MTRR: Fixed MSR 0x258 0x0606060606060606
2055 00:48:47.740159 MTRR: Fixed MSR 0x259 0x0000000000000000
2056 00:48:47.743268 MTRR: Fixed MSR 0x268 0x0606060606060606
2057 00:48:47.746480 MTRR: Fixed MSR 0x269 0x0606060606060606
2058 00:48:47.753303 MTRR: Fixed MSR 0x26a 0x0606060606060606
2059 00:48:47.757265 MTRR: Fixed MSR 0x26b 0x0606060606060606
2060 00:48:47.760037 MTRR: Fixed MSR 0x26c 0x0606060606060606
2061 00:48:47.763172 MTRR: Fixed MSR 0x26d 0x0606060606060606
2062 00:48:47.770339 MTRR: Fixed MSR 0x26e 0x0606060606060606
2063 00:48:47.773188 MTRR: Fixed MSR 0x26f 0x0606060606060606
2064 00:48:47.776725 MTRR: Fixed MSR 0x258 0x0606060606060606
2065 00:48:47.783052 MTRR: Fixed MSR 0x259 0x0000000000000000
2066 00:48:47.786549 MTRR: Fixed MSR 0x268 0x0606060606060606
2067 00:48:47.789917 MTRR: Fixed MSR 0x269 0x0606060606060606
2068 00:48:47.793235 MTRR: Fixed MSR 0x26a 0x0606060606060606
2069 00:48:47.799660 MTRR: Fixed MSR 0x26b 0x0606060606060606
2070 00:48:47.802906 MTRR: Fixed MSR 0x26c 0x0606060606060606
2071 00:48:47.805991 MTRR: Fixed MSR 0x26d 0x0606060606060606
2072 00:48:47.809706 MTRR: Fixed MSR 0x26e 0x0606060606060606
2073 00:48:47.816680 MTRR: Fixed MSR 0x26f 0x0606060606060606
2074 00:48:47.819277 call enable_fixed_mtrr()
2075 00:48:47.819359 call enable_fixed_mtrr()
2076 00:48:47.826411 MTRR: Fixed MSR 0x250 0x0606060606060606
2077 00:48:47.829193 MTRR: Fixed MSR 0x250 0x0606060606060606
2078 00:48:47.832519 MTRR: Fixed MSR 0x258 0x0606060606060606
2079 00:48:47.836184 MTRR: Fixed MSR 0x259 0x0000000000000000
2080 00:48:47.842512 MTRR: Fixed MSR 0x268 0x0606060606060606
2081 00:48:47.846088 MTRR: Fixed MSR 0x269 0x0606060606060606
2082 00:48:47.849257 MTRR: Fixed MSR 0x26a 0x0606060606060606
2083 00:48:47.852458 MTRR: Fixed MSR 0x26b 0x0606060606060606
2084 00:48:47.859501 MTRR: Fixed MSR 0x26c 0x0606060606060606
2085 00:48:47.862720 MTRR: Fixed MSR 0x26d 0x0606060606060606
2086 00:48:47.865588 MTRR: Fixed MSR 0x26e 0x0606060606060606
2087 00:48:47.868883 MTRR: Fixed MSR 0x26f 0x0606060606060606
2088 00:48:47.876561 MTRR: Fixed MSR 0x258 0x0606060606060606
2089 00:48:47.879486 MTRR: Fixed MSR 0x259 0x0000000000000000
2090 00:48:47.882760 MTRR: Fixed MSR 0x268 0x0606060606060606
2091 00:48:47.886311 MTRR: Fixed MSR 0x269 0x0606060606060606
2092 00:48:47.892885 MTRR: Fixed MSR 0x26a 0x0606060606060606
2093 00:48:47.896192 MTRR: Fixed MSR 0x26b 0x0606060606060606
2094 00:48:47.899457 MTRR: Fixed MSR 0x26c 0x0606060606060606
2095 00:48:47.902970 MTRR: Fixed MSR 0x26d 0x0606060606060606
2096 00:48:47.909153 MTRR: Fixed MSR 0x26e 0x0606060606060606
2097 00:48:47.912769 MTRR: Fixed MSR 0x26f 0x0606060606060606
2098 00:48:47.916482 call enable_fixed_mtrr()
2099 00:48:47.919308 call enable_fixed_mtrr()
2100 00:48:47.922585 CPU physical address size: 39 bits
2101 00:48:47.925949 CPU physical address size: 39 bits
2102 00:48:47.929403 CPU physical address size: 39 bits
2103 00:48:47.933571 Checking cr50 for pending updates
2104 00:48:47.937415 CPU physical address size: 39 bits
2105 00:48:47.940579 CPU physical address size: 39 bits
2106 00:48:47.943810 Reading cr50 TPM mode
2107 00:48:47.953836 BS: BS_PAYLOAD_LOAD entry times (exec / console): 320 / 6 ms
2108 00:48:47.963748 CBFS: Found 'fallback/payload' @0x38db00 size 0x4be9c in mcache @0x76c4cf60
2109 00:48:47.966586 Checking segment from ROM address 0xffc02b38
2110 00:48:47.970340 Checking segment from ROM address 0xffc02b54
2111 00:48:47.976957 Loading segment from ROM address 0xffc02b38
2112 00:48:47.977067 code (compression=0)
2113 00:48:47.986779 New segment dstaddr 0x30000000 memsize 0x2662db0 srcaddr 0xffc02b70 filesize 0x4be64
2114 00:48:47.996684 Loading Segment: addr: 0x30000000 memsz: 0x0000000002662db0 filesz: 0x000000000004be64
2115 00:48:47.996770 it's not compressed!
2116 00:48:48.136158 [ 0x30000000, 3004be64, 0x32662db0) <- ffc02b70
2117 00:48:48.142755 Clearing Segment: addr: 0x000000003004be64 memsz: 0x0000000002616f4c
2118 00:48:48.149313 Loading segment from ROM address 0xffc02b54
2119 00:48:48.149395 Entry Point 0x30000000
2120 00:48:48.152776 Loaded segments
2121 00:48:48.159174 BS: BS_PAYLOAD_LOAD run times (exec / console): 135 / 63 ms
2122 00:48:48.202712 Finalizing chipset.
2123 00:48:48.205699 Finalizing SMM.
2124 00:48:48.205784 APMC done.
2125 00:48:48.212180 BS: BS_PAYLOAD_LOAD exit times (exec / console): 42 / 5 ms
2126 00:48:48.215787 mp_park_aps done after 0 msecs.
2127 00:48:48.219376 Jumping to boot code at 0x30000000(0x76b25000)
2128 00:48:48.228564 CPU0: stack: 0x76bee000 - 0x76bef000, lowest used address 0x76beea78, stack used: 1416 bytes
2129 00:48:48.228672
2130 00:48:48.228782
2131 00:48:48.228880
2132 00:48:48.232502 Starting depthcharge on Voema...
2133 00:48:48.232588
2134 00:48:48.232940 end: 2.2.3 depthcharge-start (duration 00:00:10) [common]
2135 00:48:48.233038 start: 2.2.4 bootloader-commands (timeout 00:04:45) [common]
2136 00:48:48.233138 Setting prompt string to ['volteer:']
2137 00:48:48.233256 bootloader-commands: Wait for prompt ['volteer:'] (timeout 00:04:45)
2138 00:48:48.242155 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2139 00:48:48.242240
2140 00:48:48.248815 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2141 00:48:48.248896
2142 00:48:48.252391 Looking for NVMe Controller 0x3005f220 @ 00:1d:00
2143 00:48:48.255442
2144 00:48:48.258380 Failed to find eMMC card reader
2145 00:48:48.258492
2146 00:48:48.258584 Wipe memory regions:
2147 00:48:48.258671
2148 00:48:48.265268 [0x00000000001000, 0x000000000a0000)
2149 00:48:48.265344
2150 00:48:48.268425 [0x00000000100000, 0x00000030000000)
2151 00:48:48.293389
2152 00:48:48.296957 [0x00000032662db0, 0x000000769ef000)
2153 00:48:48.332173
2154 00:48:48.335499 [0x00000100000000, 0x00000280400000)
2155 00:48:48.535086
2156 00:48:48.537890 ec_init: CrosEC protocol v3 supported (256, 256)
2157 00:48:48.537980
2158 00:48:48.545147 update_port_state: port C0 state: usb enable 1 mux conn 0
2159 00:48:48.545230
2160 00:48:48.551367 update_port_state: port C0 req: usage 0 usb3 1 usb2 9 ufp 1 ori_hsl 0 ori_sbu 0 dbg_acc 1
2161 00:48:48.555976
2162 00:48:48.559532 pmc_check_ipc_sts: STS_BUSY done after 1612 us
2163 00:48:48.559615
2164 00:48:48.562904 send_conn_disc_msg: pmc_send_cmd succeeded
2165 00:48:48.994698
2166 00:48:48.994839 R8152: Initializing
2167 00:48:48.994906
2168 00:48:48.997759 Version 6 (ocp_data = 5c30)
2169 00:48:48.997842
2170 00:48:49.001138 R8152: Done initializing
2171 00:48:49.001220
2172 00:48:49.004035 Adding net device
2173 00:48:49.306966
2174 00:48:49.309736 [firmware-volteer-13672.B-collabora] Oct 22 2021 06:32:35
2175 00:48:49.309874
2176 00:48:49.309956
2177 00:48:49.310050
2178 00:48:49.313427 Setting prompt string to ['volteer:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2180 00:48:49.413773 volteer: tftpboot 192.168.201.1 10419539/tftp-deploy-ypnugl2a/kernel/bzImage 10419539/tftp-deploy-ypnugl2a/kernel/cmdline 10419539/tftp-deploy-ypnugl2a/ramdisk/ramdisk.cpio.gz
2181 00:48:49.413943 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2182 00:48:49.414072 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:43)
2183 00:48:49.418108 tftpboot 192.168.201.1 10419539/tftp-deploy-ypnugl2a/kernel/bzIploy-ypnugl2a/kernel/cmdline 10419539/tftp-deploy-ypnugl2a/ramdisk/ramdisk.cpio.gz
2184 00:48:49.418203
2185 00:48:49.418269 Waiting for link
2186 00:48:49.621102
2187 00:48:49.621240 done.
2188 00:48:49.621307
2189 00:48:49.621368 MAC: 00:24:32:30:7e:47
2190 00:48:49.621443
2191 00:48:49.624319 Sending DHCP discover... done.
2192 00:48:49.624402
2193 00:48:49.627814 Waiting for reply... done.
2194 00:48:49.627896
2195 00:48:49.630947 Sending DHCP request... done.
2196 00:48:49.631034
2197 00:48:49.634418 Waiting for reply... done.
2198 00:48:49.634502
2199 00:48:49.637523 My ip is 192.168.201.19
2200 00:48:49.637604
2201 00:48:49.641025 The DHCP server ip is 192.168.201.1
2202 00:48:49.641108
2203 00:48:49.647499 TFTP server IP predefined by user: 192.168.201.1
2204 00:48:49.647583
2205 00:48:49.653906 Bootfile predefined by user: 10419539/tftp-deploy-ypnugl2a/kernel/bzImage
2206 00:48:49.653992
2207 00:48:49.657301 Sending tftp read request... done.
2208 00:48:49.657383
2209 00:48:49.660703 Waiting for the transfer...
2210 00:48:49.660786
2211 00:48:50.205900 00000000 ################################################################
2212 00:48:50.206030
2213 00:48:50.753224 00080000 ################################################################
2214 00:48:50.753353
2215 00:48:51.314688 00100000 ################################################################
2216 00:48:51.314835
2217 00:48:51.936737 00180000 ################################################################
2218 00:48:51.937291
2219 00:48:52.626473 00200000 ################################################################
2220 00:48:52.626964
2221 00:48:53.222309 00280000 ################################################################
2222 00:48:53.222440
2223 00:48:53.756240 00300000 ################################################################
2224 00:48:53.756371
2225 00:48:54.290711 00380000 ################################################################
2226 00:48:54.290906
2227 00:48:54.822628 00400000 ################################################################
2228 00:48:54.822825
2229 00:48:55.344701 00480000 ################################################################
2230 00:48:55.344889
2231 00:48:55.877058 00500000 ################################################################
2232 00:48:55.877240
2233 00:48:56.419648 00580000 ################################################################
2234 00:48:56.419806
2235 00:48:56.955085 00600000 ################################################################
2236 00:48:56.955267
2237 00:48:57.485136 00680000 ################################################################
2238 00:48:57.485284
2239 00:48:58.021480 00700000 ################################################################
2240 00:48:58.021612
2241 00:48:58.552923 00780000 ################################################################
2242 00:48:58.553087
2243 00:48:59.087653 00800000 ################################################################
2244 00:48:59.087805
2245 00:48:59.617071 00880000 ################################################################
2246 00:48:59.617216
2247 00:49:00.150007 00900000 ################################################################
2248 00:49:00.150158
2249 00:49:00.685613 00980000 ################################################################
2250 00:49:00.685749
2251 00:49:01.084138 00a00000 ############################################### done.
2252 00:49:01.084288
2253 00:49:01.087785 The bootfile was 10862592 bytes long.
2254 00:49:01.087885
2255 00:49:01.090840 Sending tftp read request... done.
2256 00:49:01.090939
2257 00:49:01.094568 Waiting for the transfer...
2258 00:49:01.094656
2259 00:49:01.653172 00000000 ################################################################
2260 00:49:01.653320
2261 00:49:02.197718 00080000 ################################################################
2262 00:49:02.197849
2263 00:49:02.744639 00100000 ################################################################
2264 00:49:02.744778
2265 00:49:03.299048 00180000 ################################################################
2266 00:49:03.299184
2267 00:49:03.846608 00200000 ################################################################
2268 00:49:03.846760
2269 00:49:04.383602 00280000 ################################################################
2270 00:49:04.383784
2271 00:49:04.929266 00300000 ################################################################
2272 00:49:04.929430
2273 00:49:05.490136 00380000 ################################################################
2274 00:49:05.490268
2275 00:49:06.026443 00400000 ################################################################
2276 00:49:06.026634
2277 00:49:06.548646 00480000 ################################################################
2278 00:49:06.548815
2279 00:49:07.111273 00500000 ################################################################
2280 00:49:07.111439
2281 00:49:07.524450 00580000 ################################################ done.
2282 00:49:07.524613
2283 00:49:07.527873 Sending tftp read request... done.
2284 00:49:07.528025
2285 00:49:07.530985 Waiting for the transfer...
2286 00:49:07.531071
2287 00:49:07.531136 00000000 # done.
2288 00:49:07.531199
2289 00:49:07.542630 Command line loaded dynamically from TFTP file: 10419539/tftp-deploy-ypnugl2a/kernel/cmdline
2290 00:49:07.542752
2291 00:49:07.561068 The command line is: console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10419539/extract-nfsrootfs-7tifxep1,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2292 00:49:07.564979
2293 00:49:07.568160 Shutting down all USB controllers.
2294 00:49:07.568258
2295 00:49:07.568347 Removing current net device
2296 00:49:07.568428
2297 00:49:07.571120 Finalizing coreboot
2298 00:49:07.571209
2299 00:49:07.577678 Exiting depthcharge with code 4 at timestamp: 27987740
2300 00:49:07.577777
2301 00:49:07.577870
2302 00:49:07.577957 Starting kernel ...
2303 00:49:07.578042
2304 00:49:07.578125
2305 00:49:07.578525 end: 2.2.4 bootloader-commands (duration 00:00:19) [common]
2306 00:49:07.578639 start: 2.2.5 auto-login-action (timeout 00:04:25) [common]
2307 00:49:07.578732 Setting prompt string to ['Linux version [0-9]']
2308 00:49:07.578850 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2309 00:49:07.578965 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2311 00:53:32.579481 end: 2.2.5 auto-login-action (duration 00:04:25) [common]
2313 00:53:32.580492 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 265 seconds'
2315 00:53:32.581237 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2318 00:53:32.582551 end: 2 depthcharge-action (duration 00:05:00) [common]
2320 00:53:32.583587 Cleaning after the job
2321 00:53:32.583997 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419539/tftp-deploy-ypnugl2a/ramdisk
2322 00:53:32.584834 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419539/tftp-deploy-ypnugl2a/kernel
2323 00:53:32.586042 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419539/tftp-deploy-ypnugl2a/nfsrootfs
2324 00:53:32.641838 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419539/tftp-deploy-ypnugl2a/modules
2325 00:53:32.642458 start: 5.1 power-off (timeout 00:00:30) [common]
2326 00:53:32.642624 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-cx9400-volteer-cbg-6' '--port=1' '--command=off'
2327 00:53:32.719919 >> Command sent successfully.
2328 00:53:32.724708 Returned 0 in 0 seconds
2329 00:53:32.825646 end: 5.1 power-off (duration 00:00:00) [common]
2331 00:53:32.827023 start: 5.2 read-feedback (timeout 00:10:00) [common]
2332 00:53:32.828222 Listened to connection for namespace 'common' for up to 1s
2333 00:53:33.828059 Finalising connection for namespace 'common'
2334 00:53:33.828241 Disconnecting from shell: Finalise
2335 00:53:33.828321
2336 00:53:33.928709 end: 5.2 read-feedback (duration 00:00:01) [common]
2337 00:53:33.928957 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10419539
2338 00:53:34.189126 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10419539
2339 00:53:34.189321 JobError: Your job cannot terminate cleanly.