Boot log: asus-C436FA-Flip-hatch
- Boot result: FAIL
- Errors: 2
- Warnings: 0
- Kernel Warnings: 0
- Kernel Errors: 0
1 00:48:02.464177 lava-dispatcher, installed at version: 2023.03
2 00:48:02.464387 start: 0 validate
3 00:48:02.464518 Start time: 2023-05-23 00:48:02.464510+00:00 (UTC)
4 00:48:02.464650 Using caching service: 'http://localhost/cache/?uri=%s'
5 00:48:02.464780 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230512.0%2Famd64%2Finitrd.cpio.gz exists
6 00:48:02.758684 Using caching service: 'http://localhost/cache/?uri=%s'
7 00:48:02.759488 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.280-cip95-rt30%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fkernel%2FbzImage exists
8 00:48:06.766301 Using caching service: 'http://localhost/cache/?uri=%s'
9 00:48:06.767071 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbullseye-ltp%2F20230512.0%2Famd64%2Ffull.rootfs.tar.xz exists
10 00:48:07.060991 Using caching service: 'http://localhost/cache/?uri=%s'
11 00:48:07.061808 Validating that http://localhost/cache/?uri=http%3A%2F%2Fstorage.kernelci.org%2Fcip%2Flinux-4.19.y-cip-rt%2Fv4.19.280-cip95-rt30%2Fx86_64%2Fdefconfig%2Bx86-chromebook%2Fgcc-10%2Fmodules.tar.xz exists
12 00:48:08.065268 validate duration: 5.60
14 00:48:08.065575 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 00:48:08.065707 start: 1.1 download-retry (timeout 00:10:00) [common]
16 00:48:08.065792 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 00:48:08.065911 Not decompressing ramdisk as can be used compressed.
18 00:48:08.066027 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230512.0/amd64/initrd.cpio.gz
19 00:48:08.066124 saving as /var/lib/lava/dispatcher/tmp/10419496/tftp-deploy-l5je_zb4/ramdisk/initrd.cpio.gz
20 00:48:08.066183 total size: 5671581 (5MB)
21 00:48:08.067216 progress 0% (0MB)
22 00:48:08.068800 progress 5% (0MB)
23 00:48:08.070384 progress 10% (0MB)
24 00:48:08.071908 progress 15% (0MB)
25 00:48:08.073558 progress 20% (1MB)
26 00:48:08.075120 progress 25% (1MB)
27 00:48:08.076539 progress 30% (1MB)
28 00:48:08.078097 progress 35% (1MB)
29 00:48:08.079603 progress 40% (2MB)
30 00:48:08.080982 progress 45% (2MB)
31 00:48:08.082578 progress 50% (2MB)
32 00:48:08.084092 progress 55% (3MB)
33 00:48:08.085536 progress 60% (3MB)
34 00:48:08.087169 progress 65% (3MB)
35 00:48:08.088731 progress 70% (3MB)
36 00:48:08.090177 progress 75% (4MB)
37 00:48:08.091691 progress 80% (4MB)
38 00:48:08.093196 progress 85% (4MB)
39 00:48:08.094618 progress 90% (4MB)
40 00:48:08.096134 progress 95% (5MB)
41 00:48:08.097736 progress 100% (5MB)
42 00:48:08.097844 5MB downloaded in 0.03s (170.85MB/s)
43 00:48:08.097988 end: 1.1.1 http-download (duration 00:00:00) [common]
45 00:48:08.098252 end: 1.1 download-retry (duration 00:00:00) [common]
46 00:48:08.098335 start: 1.2 download-retry (timeout 00:10:00) [common]
47 00:48:08.098416 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 00:48:08.098541 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.280-cip95-rt30/x86_64/defconfig+x86-chromebook/gcc-10/kernel/bzImage
49 00:48:08.098609 saving as /var/lib/lava/dispatcher/tmp/10419496/tftp-deploy-l5je_zb4/kernel/bzImage
50 00:48:08.098668 total size: 10862592 (10MB)
51 00:48:08.098726 No compression specified
52 00:48:08.099806 progress 0% (0MB)
53 00:48:08.102996 progress 5% (0MB)
54 00:48:08.105917 progress 10% (1MB)
55 00:48:08.108619 progress 15% (1MB)
56 00:48:08.111567 progress 20% (2MB)
57 00:48:08.114287 progress 25% (2MB)
58 00:48:08.117207 progress 30% (3MB)
59 00:48:08.120193 progress 35% (3MB)
60 00:48:08.123033 progress 40% (4MB)
61 00:48:08.125906 progress 45% (4MB)
62 00:48:08.128577 progress 50% (5MB)
63 00:48:08.131449 progress 55% (5MB)
64 00:48:08.134152 progress 60% (6MB)
65 00:48:08.137038 progress 65% (6MB)
66 00:48:08.139872 progress 70% (7MB)
67 00:48:08.142580 progress 75% (7MB)
68 00:48:08.145359 progress 80% (8MB)
69 00:48:08.148013 progress 85% (8MB)
70 00:48:08.150828 progress 90% (9MB)
71 00:48:08.153451 progress 95% (9MB)
72 00:48:08.156299 progress 100% (10MB)
73 00:48:08.156469 10MB downloaded in 0.06s (179.24MB/s)
74 00:48:08.156615 end: 1.2.1 http-download (duration 00:00:00) [common]
76 00:48:08.156839 end: 1.2 download-retry (duration 00:00:00) [common]
77 00:48:08.156961 start: 1.3 download-retry (timeout 00:10:00) [common]
78 00:48:08.157044 start: 1.3.1 http-download (timeout 00:10:00) [common]
79 00:48:08.157182 downloading http://storage.kernelci.org/images/rootfs/debian/bullseye-ltp/20230512.0/amd64/full.rootfs.tar.xz
80 00:48:08.157250 saving as /var/lib/lava/dispatcher/tmp/10419496/tftp-deploy-l5je_zb4/nfsrootfs/full.rootfs.tar
81 00:48:08.157331 total size: 125882924 (120MB)
82 00:48:08.157406 Using unxz to decompress xz
83 00:48:08.161074 progress 0% (0MB)
84 00:48:08.640860 progress 5% (6MB)
85 00:48:09.129839 progress 10% (12MB)
86 00:48:09.628661 progress 15% (18MB)
87 00:48:10.129947 progress 20% (24MB)
88 00:48:10.474492 progress 25% (30MB)
89 00:48:10.812141 progress 30% (36MB)
90 00:48:11.082629 progress 35% (42MB)
91 00:48:11.280108 progress 40% (48MB)
92 00:48:11.649924 progress 45% (54MB)
93 00:48:12.019942 progress 50% (60MB)
94 00:48:12.361768 progress 55% (66MB)
95 00:48:12.725066 progress 60% (72MB)
96 00:48:13.066102 progress 65% (78MB)
97 00:48:13.457645 progress 70% (84MB)
98 00:48:13.880672 progress 75% (90MB)
99 00:48:14.302742 progress 80% (96MB)
100 00:48:14.398127 progress 85% (102MB)
101 00:48:14.560598 progress 90% (108MB)
102 00:48:14.898409 progress 95% (114MB)
103 00:48:15.268238 progress 100% (120MB)
104 00:48:15.274113 120MB downloaded in 7.12s (16.87MB/s)
105 00:48:15.274393 end: 1.3.1 http-download (duration 00:00:07) [common]
107 00:48:15.274650 end: 1.3 download-retry (duration 00:00:07) [common]
108 00:48:15.274742 start: 1.4 download-retry (timeout 00:09:53) [common]
109 00:48:15.274828 start: 1.4.1 http-download (timeout 00:09:53) [common]
110 00:48:15.274966 downloading http://storage.kernelci.org/cip/linux-4.19.y-cip-rt/v4.19.280-cip95-rt30/x86_64/defconfig+x86-chromebook/gcc-10/modules.tar.xz
111 00:48:15.275037 saving as /var/lib/lava/dispatcher/tmp/10419496/tftp-deploy-l5je_zb4/modules/modules.tar
112 00:48:15.275099 total size: 484052 (0MB)
113 00:48:15.275162 Using unxz to decompress xz
114 00:48:15.278797 progress 6% (0MB)
115 00:48:15.279173 progress 13% (0MB)
116 00:48:15.279402 progress 20% (0MB)
117 00:48:15.280885 progress 27% (0MB)
118 00:48:15.282951 progress 33% (0MB)
119 00:48:15.284796 progress 40% (0MB)
120 00:48:15.286981 progress 47% (0MB)
121 00:48:15.288921 progress 54% (0MB)
122 00:48:15.290986 progress 60% (0MB)
123 00:48:15.292911 progress 67% (0MB)
124 00:48:15.295073 progress 74% (0MB)
125 00:48:15.297761 progress 81% (0MB)
126 00:48:15.299600 progress 88% (0MB)
127 00:48:15.301445 progress 94% (0MB)
128 00:48:15.303893 progress 100% (0MB)
129 00:48:15.310432 0MB downloaded in 0.04s (13.07MB/s)
130 00:48:15.310692 end: 1.4.1 http-download (duration 00:00:00) [common]
132 00:48:15.310954 end: 1.4 download-retry (duration 00:00:00) [common]
133 00:48:15.311049 start: 1.5 prepare-tftp-overlay (timeout 00:09:53) [common]
134 00:48:15.311157 start: 1.5.1 extract-nfsrootfs (timeout 00:09:53) [common]
135 00:48:18.052744 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/10419496/extract-nfsrootfs-i97l94z6
136 00:48:18.052940 end: 1.5.1 extract-nfsrootfs (duration 00:00:03) [common]
137 00:48:18.053046 start: 1.5.2 lava-overlay (timeout 00:09:50) [common]
138 00:48:18.053215 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x
139 00:48:18.053338 makedir: /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin
140 00:48:18.053434 makedir: /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/tests
141 00:48:18.053563 makedir: /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/results
142 00:48:18.053678 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-add-keys
143 00:48:18.053816 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-add-sources
144 00:48:18.053939 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-background-process-start
145 00:48:18.054062 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-background-process-stop
146 00:48:18.054189 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-common-functions
147 00:48:18.054309 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-echo-ipv4
148 00:48:18.054430 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-install-packages
149 00:48:18.054549 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-installed-packages
150 00:48:18.054667 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-os-build
151 00:48:18.054789 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-probe-channel
152 00:48:18.054908 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-probe-ip
153 00:48:18.055026 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-target-ip
154 00:48:18.055144 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-target-mac
155 00:48:18.055260 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-target-storage
156 00:48:18.055380 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-test-case
157 00:48:18.055499 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-test-event
158 00:48:18.055617 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-test-feedback
159 00:48:18.055735 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-test-raise
160 00:48:18.055851 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-test-reference
161 00:48:18.055968 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-test-runner
162 00:48:18.056085 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-test-set
163 00:48:18.056202 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-test-shell
164 00:48:18.056320 Updating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-install-packages (oe)
165 00:48:18.056466 Updating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/bin/lava-installed-packages (oe)
166 00:48:18.056589 Creating /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/environment
167 00:48:18.056685 LAVA metadata
168 00:48:18.056754 - LAVA_JOB_ID=10419496
169 00:48:18.056818 - LAVA_DISPATCHER_IP=192.168.201.1
170 00:48:18.056917 start: 1.5.2.1 lava-vland-overlay (timeout 00:09:50) [common]
171 00:48:18.056983 skipped lava-vland-overlay
172 00:48:18.057057 end: 1.5.2.1 lava-vland-overlay (duration 00:00:00) [common]
173 00:48:18.057135 start: 1.5.2.2 lava-multinode-overlay (timeout 00:09:50) [common]
174 00:48:18.057198 skipped lava-multinode-overlay
175 00:48:18.057270 end: 1.5.2.2 lava-multinode-overlay (duration 00:00:00) [common]
176 00:48:18.057347 start: 1.5.2.3 test-definition (timeout 00:09:50) [common]
177 00:48:18.057419 Loading test definitions
178 00:48:18.057507 start: 1.5.2.3.1 git-repo-action (timeout 00:09:50) [common]
179 00:48:18.057699 Using /lava-10419496 at stage 0
180 00:48:18.057791 Fetching tests from https://github.com/kernelci/test-definitions
181 00:48:18.057868 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/0/tests/0_ltp-timers'
182 00:48:20.660101 Running '/usr/bin/git checkout kernelci.org
183 00:48:20.802169 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/0/tests/0_ltp-timers/automated/linux/ltp-open-posix/ltp-open-posix.yaml
184 00:48:20.802844 uuid=10419496_1.5.2.3.1 testdef=None
185 00:48:20.803005 end: 1.5.2.3.1 git-repo-action (duration 00:00:03) [common]
187 00:48:20.803246 start: 1.5.2.3.2 test-overlay (timeout 00:09:47) [common]
188 00:48:20.803892 end: 1.5.2.3.2 test-overlay (duration 00:00:00) [common]
190 00:48:20.804121 start: 1.5.2.3.3 test-install-overlay (timeout 00:09:47) [common]
191 00:48:20.804988 end: 1.5.2.3.3 test-install-overlay (duration 00:00:00) [common]
193 00:48:20.805219 start: 1.5.2.3.4 test-runscript-overlay (timeout 00:09:47) [common]
194 00:48:20.806076 runner path: /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/0/tests/0_ltp-timers test_uuid 10419496_1.5.2.3.1
195 00:48:20.806163 GRP_TEST='TMR'
196 00:48:20.806241 SKIPFILE='skipfile-lkft.yaml'
197 00:48:20.806313 SKIP_INSTALL='true'
198 00:48:20.806394 TST_CMDFILES=''
199 00:48:20.806567 end: 1.5.2.3.4 test-runscript-overlay (duration 00:00:00) [common]
201 00:48:20.806773 Creating lava-test-runner.conf files
202 00:48:20.806836 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/10419496/lava-overlay-evvmwq1x/lava-10419496/0 for stage 0
203 00:48:20.806922 - 0_ltp-timers
204 00:48:20.807027 end: 1.5.2.3 test-definition (duration 00:00:03) [common]
205 00:48:20.807114 start: 1.5.2.4 compress-overlay (timeout 00:09:47) [common]
206 00:48:28.268042 end: 1.5.2.4 compress-overlay (duration 00:00:07) [common]
207 00:48:28.268198 start: 1.5.2.5 persistent-nfs-overlay (timeout 00:09:40) [common]
208 00:48:28.268295 end: 1.5.2.5 persistent-nfs-overlay (duration 00:00:00) [common]
209 00:48:28.268397 end: 1.5.2 lava-overlay (duration 00:00:10) [common]
210 00:48:28.268487 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:40) [common]
211 00:48:28.404653 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:00) [common]
212 00:48:28.405033 start: 1.5.4 extract-modules (timeout 00:09:40) [common]
213 00:48:28.405155 extracting modules file /var/lib/lava/dispatcher/tmp/10419496/tftp-deploy-l5je_zb4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10419496/extract-nfsrootfs-i97l94z6
214 00:48:28.424618 extracting modules file /var/lib/lava/dispatcher/tmp/10419496/tftp-deploy-l5je_zb4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/10419496/extract-overlay-ramdisk-4wt438rn/ramdisk
215 00:48:28.444195 end: 1.5.4 extract-modules (duration 00:00:00) [common]
216 00:48:28.444362 start: 1.5.5 apply-overlay-tftp (timeout 00:09:40) [common]
217 00:48:28.444457 [common] Applying overlay to NFS
218 00:48:28.444527 [common] Applying overlay /var/lib/lava/dispatcher/tmp/10419496/compress-overlay-7m8re8ot/overlay-1.5.2.4.tar.gz to directory /var/lib/lava/dispatcher/tmp/10419496/extract-nfsrootfs-i97l94z6
219 00:48:29.345378 end: 1.5.5 apply-overlay-tftp (duration 00:00:01) [common]
220 00:48:29.345573 start: 1.5.6 configure-preseed-file (timeout 00:09:39) [common]
221 00:48:29.345721 end: 1.5.6 configure-preseed-file (duration 00:00:00) [common]
222 00:48:29.345809 start: 1.5.7 compress-ramdisk (timeout 00:09:39) [common]
223 00:48:29.345893 Building ramdisk /var/lib/lava/dispatcher/tmp/10419496/extract-overlay-ramdisk-4wt438rn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/10419496/extract-overlay-ramdisk-4wt438rn/ramdisk
224 00:48:29.422495 >> 31368 blocks
225 00:48:30.035183 rename /var/lib/lava/dispatcher/tmp/10419496/extract-overlay-ramdisk-4wt438rn/ramdisk.cpio.gz to /var/lib/lava/dispatcher/tmp/10419496/tftp-deploy-l5je_zb4/ramdisk/ramdisk.cpio.gz
226 00:48:30.035628 end: 1.5.7 compress-ramdisk (duration 00:00:01) [common]
227 00:48:30.035752 start: 1.5.8 prepare-kernel (timeout 00:09:38) [common]
228 00:48:30.035852 start: 1.5.8.1 prepare-fit (timeout 00:09:38) [common]
229 00:48:30.035945 No mkimage arch provided, not using FIT.
230 00:48:30.036035 end: 1.5.8.1 prepare-fit (duration 00:00:00) [common]
231 00:48:30.036114 end: 1.5.8 prepare-kernel (duration 00:00:00) [common]
232 00:48:30.036221 end: 1.5 prepare-tftp-overlay (duration 00:00:15) [common]
233 00:48:30.036312 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:38) [common]
234 00:48:30.036394 No LXC device requested
235 00:48:30.036473 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
236 00:48:30.036561 start: 1.7 deploy-device-env (timeout 00:09:38) [common]
237 00:48:30.036643 end: 1.7 deploy-device-env (duration 00:00:00) [common]
238 00:48:30.036716 Checking files for TFTP limit of 4294967296 bytes.
239 00:48:30.037120 end: 1 tftp-deploy (duration 00:00:22) [common]
240 00:48:30.037264 start: 2 depthcharge-action (timeout 00:05:00) [common]
241 00:48:30.037354 start: 2.1 depthcharge-overlay (timeout 00:05:00) [common]
242 00:48:30.037477 substitutions:
243 00:48:30.037599 - {DTB}: None
244 00:48:30.037664 - {INITRD}: 10419496/tftp-deploy-l5je_zb4/ramdisk/ramdisk.cpio.gz
245 00:48:30.037725 - {KERNEL}: 10419496/tftp-deploy-l5je_zb4/kernel/bzImage
246 00:48:30.037783 - {LAVA_MAC}: None
247 00:48:30.037843 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/10419496/extract-nfsrootfs-i97l94z6
248 00:48:30.037926 - {NFS_SERVER_IP}: 192.168.201.1
249 00:48:30.038003 - {PRESEED_CONFIG}: None
250 00:48:30.038082 - {PRESEED_LOCAL}: None
251 00:48:30.038157 - {RAMDISK}: 10419496/tftp-deploy-l5je_zb4/ramdisk/ramdisk.cpio.gz
252 00:48:30.038232 - {ROOT_PART}: None
253 00:48:30.038306 - {ROOT}: None
254 00:48:30.038399 - {SERVER_IP}: 192.168.201.1
255 00:48:30.038493 - {TEE}: None
256 00:48:30.038587 Parsed boot commands:
257 00:48:30.038679 - tftpboot 192.168.201.1 {DEPTHCHARGE_KERNEL} {CMDLINE} {DEPTHCHARGE_RAMDISK}
258 00:48:30.038912 Parsed boot commands: tftpboot 192.168.201.1 10419496/tftp-deploy-l5je_zb4/kernel/bzImage 10419496/tftp-deploy-l5je_zb4/kernel/cmdline 10419496/tftp-deploy-l5je_zb4/ramdisk/ramdisk.cpio.gz
259 00:48:30.039040 end: 2.1 depthcharge-overlay (duration 00:00:00) [common]
260 00:48:30.039166 start: 2.2 depthcharge-retry (timeout 00:05:00) [common]
261 00:48:30.039303 start: 2.2.1 reset-connection (timeout 00:05:00) [common]
262 00:48:30.039430 start: 2.2.1.1 disconnect-device (timeout 00:05:00) [common]
263 00:48:30.039536 Not connected, no need to disconnect.
264 00:48:30.039654 end: 2.2.1.1 disconnect-device (duration 00:00:00) [common]
265 00:48:30.039778 start: 2.2.1.2 connect-device (timeout 00:05:00) [common]
266 00:48:30.039878 [common] connect-device Connecting to device using '/usr/bin/console -k -f -M localhost asus-C436FA-Flip-hatch-cbg-3'
267 00:48:30.043786 Setting prompt string to ['lava-test: # ']
268 00:48:30.044193 end: 2.2.1.2 connect-device (duration 00:00:00) [common]
269 00:48:30.044347 end: 2.2.1 reset-connection (duration 00:00:00) [common]
270 00:48:30.044463 start: 2.2.2 reset-device (timeout 00:05:00) [common]
271 00:48:30.044574 start: 2.2.2.1 pdu-reboot (timeout 00:05:00) [common]
272 00:48:30.044777 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=reboot'
273 00:48:35.183375 >> Command sent successfully.
274 00:48:35.186081 Returned 0 in 5 seconds
275 00:48:35.286525 end: 2.2.2.1 pdu-reboot (duration 00:00:05) [common]
277 00:48:35.286894 end: 2.2.2 reset-device (duration 00:00:05) [common]
278 00:48:35.287012 start: 2.2.3 depthcharge-start (timeout 00:04:55) [common]
279 00:48:35.287118 Setting prompt string to 'Starting depthcharge on Helios...'
280 00:48:35.287194 Changing prompt to 'Starting depthcharge on Helios...'
281 00:48:35.287285 depthcharge-start: Wait for prompt Starting depthcharge on Helios... (timeout 00:05:00)
282 00:48:35.287635 [Enter `^Ec?' for help]
283 00:48:35.907524
284 00:48:35.907995
285 00:48:35.918268 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
286 00:48:35.921295 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
287 00:48:35.924884 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
288 00:48:35.931528 CPU: AES supported, TXT NOT supported, VT supported
289 00:48:35.937817 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
290 00:48:35.941603 PCH: device id 0284 (rev 00) is Cometlake-U Premium
291 00:48:35.948140 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
292 00:48:35.951580 VBOOT: Loading verstage.
293 00:48:35.954785 FMAP: Found "FLASH" version 1.1 at 0xc04000.
294 00:48:35.961846 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
295 00:48:35.965007 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
296 00:48:35.968336 CBFS @ c08000 size 3f8000
297 00:48:35.975288 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
298 00:48:35.978574 CBFS: Locating 'fallback/verstage'
299 00:48:35.982060 CBFS: Found @ offset 10fb80 size 1072c
300 00:48:35.982145
301 00:48:35.982211
302 00:48:35.994939 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
303 00:48:36.008334 Probing TPM: . done!
304 00:48:36.011523 TPM ready after 0 ms
305 00:48:36.014997 Connected to device vid:did:rid of 1ae0:0028:00
306 00:48:36.025085 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
307 00:48:36.028737 Initialized TPM device CR50 revision 0
308 00:48:36.072473 tlcl_send_startup: Startup return code is 0
309 00:48:36.072570 TPM: setup succeeded
310 00:48:36.085098 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
311 00:48:36.089024 Chrome EC: UHEPI supported
312 00:48:36.091890 Phase 1
313 00:48:36.095571 FMAP: area GBB found @ c05000 (12288 bytes)
314 00:48:36.101995 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x0 / 0x0
315 00:48:36.105269 Phase 2
316 00:48:36.105352 Phase 3
317 00:48:36.108691 FMAP: area GBB found @ c05000 (12288 bytes)
318 00:48:36.115065 VB2:vb2_report_dev_firmware() This is developer signed firmware
319 00:48:36.121703 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
320 00:48:36.125334 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
321 00:48:36.131958 VB2:vb2_verify_keyblock() Checking keyblock signature...
322 00:48:36.147826 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
323 00:48:36.150723 FMAP: area VBLOCK_A found @ 400000 (65536 bytes)
324 00:48:36.157375 VB2:vb2_verify_fw_preamble() Verifying preamble.
325 00:48:36.161777 Phase 4
326 00:48:36.165050 FMAP: area FW_MAIN_A found @ 410000 (3506112 bytes)
327 00:48:36.171457 VB2:vb2api_init_hash() HW crypto for hash_alg 2 not supported, using SW
328 00:48:36.351031 VB2:vb2_rsa_verify_digest() Digest check failed!
329 00:48:36.357800 VB2:vb2api_fail() Need recovery, reason: 0x1b / 0x7
330 00:48:36.357951 Saving nvdata
331 00:48:36.360784 Reboot requested (10020007)
332 00:48:36.364438 board_reset() called!
333 00:48:36.364523 full_reset() called!
334 00:48:40.875151
335 00:48:40.875317
336 00:48:40.884666 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 bootblock starting (log level: 8)...
337 00:48:40.888495 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz
338 00:48:40.895259 CPU: ID 806ec, Whiskeylake V0, ucode: 000000c9
339 00:48:40.898359 CPU: AES supported, TXT NOT supported, VT supported
340 00:48:40.905095 MCH: device id 9b61 (rev 0c) is CometLake-U (4+2)
341 00:48:40.907949 PCH: device id 0284 (rev 00) is Cometlake-U Premium
342 00:48:40.914990 IGD: device id 9b41 (rev 02) is CometLake ULT GT2
343 00:48:40.917841 VBOOT: Loading verstage.
344 00:48:40.921737 FMAP: Found "FLASH" version 1.1 at 0xc04000.
345 00:48:40.928361 FMAP: base = 0xff000000 size = 0x1000000 #areas = 31
346 00:48:40.931580 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
347 00:48:40.934817 CBFS @ c08000 size 3f8000
348 00:48:40.941449 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
349 00:48:40.944548 CBFS: Locating 'fallback/verstage'
350 00:48:40.947787 CBFS: Found @ offset 10fb80 size 1072c
351 00:48:40.951118
352 00:48:40.951204
353 00:48:40.960891 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 verstage starting (log level: 8)...
354 00:48:40.975295 Probing TPM: . done!
355 00:48:40.978869 TPM ready after 0 ms
356 00:48:40.982416 Connected to device vid:did:rid of 1ae0:0028:00
357 00:48:40.992248 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
358 00:48:40.995926 Initialized TPM device CR50 revision 0
359 00:48:41.040176 tlcl_send_startup: Startup return code is 0
360 00:48:41.040277 TPM: setup succeeded
361 00:48:41.053249 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x1007 return code 0
362 00:48:41.056717 Chrome EC: UHEPI supported
363 00:48:41.059908 Phase 1
364 00:48:41.063271 FMAP: area GBB found @ c05000 (12288 bytes)
365 00:48:41.069956 VB2:vb2_check_recovery() Recovery reason from previous boot: 0x1b / 0x7
366 00:48:41.076537 VB2:vb2_check_recovery() We have a recovery request: 0x1b / 0x0
367 00:48:41.080440 Recovery requested (1009000e)
368 00:48:41.086018 Saving nvdata
369 00:48:41.091806 tlcl_extend: response is 0
370 00:48:41.100544 tlcl_extend: response is 0
371 00:48:41.107508 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
372 00:48:41.111312 CBFS @ c08000 size 3f8000
373 00:48:41.117675 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
374 00:48:41.120957 CBFS: Locating 'fallback/romstage'
375 00:48:41.124253 CBFS: Found @ offset 80 size 145fc
376 00:48:41.128107 Accumulated console time in verstage 98 ms
377 00:48:41.128194
378 00:48:41.128262
379 00:48:41.141072 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 romstage starting (log level: 8)...
380 00:48:41.147462 VB2:vb2api_ec_sync() In recovery mode, skipping EC sync
381 00:48:41.150725 pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00001c00
382 00:48:41.153891 gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000
383 00:48:41.161082 gpe0_sts[1]: 00200000 gpe0_en[1]: 00000000
384 00:48:41.164357 gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000
385 00:48:41.167609 gpe0_sts[3]: 00000000 gpe0_en[3]: 00010000
386 00:48:41.170957 TCO_STS: 0000 0000
387 00:48:41.174286 GEN_PMCON: e0015238 00000200
388 00:48:41.177060 GBLRST_CAUSE: 00000000 00000000
389 00:48:41.177148 prev_sleep_state 5
390 00:48:41.180457 Boot Count incremented to 56893
391 00:48:41.187303 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
392 00:48:41.190589 CBFS @ c08000 size 3f8000
393 00:48:41.197240 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
394 00:48:41.197330 CBFS: Locating 'fspm.bin'
395 00:48:41.200398 CBFS: Found @ offset 5ffc0 size 71000
396 00:48:41.204836 Chrome EC: UHEPI supported
397 00:48:41.211893 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
398 00:48:41.217450 Probing TPM: done!
399 00:48:41.224335 Connected to device vid:did:rid of 1ae0:0028:00
400 00:48:41.233931 Firmware version: B2-C:0 RO_B:0.0.11/4d655eab RW_A:0.5.153/cr50_v2.94_mp.151-b967c9caf7
401 00:48:41.239729 Initialized TPM device CR50 revision 0
402 00:48:41.248987 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
403 00:48:41.255123 MRC: Hash comparison successful. Using data from RECOVERY_MRC_CACHE
404 00:48:41.259039 MRC cache found, size 1948
405 00:48:41.261890 bootmode is set to: 2
406 00:48:41.265246 PRMRR disabled by config.
407 00:48:41.265358 SPD INDEX = 1
408 00:48:41.272128 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
409 00:48:41.275607 CBFS @ c08000 size 3f8000
410 00:48:41.282215 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
411 00:48:41.282304 CBFS: Locating 'spd.bin'
412 00:48:41.285335 CBFS: Found @ offset 5fb80 size 400
413 00:48:41.288414 SPD: module type is LPDDR3
414 00:48:41.292647 SPD: module part is
415 00:48:41.298431 SPD: banks 16, ranks 2, rows 15, columns 11, density 8192 Mb
416 00:48:41.301737 SPD: device width 4 bits, bus width 8 bits
417 00:48:41.305412 SPD: module size is 4096 MB (per channel)
418 00:48:41.308969 memory slot: 0 configuration done.
419 00:48:41.311827 memory slot: 2 configuration done.
420 00:48:41.363172 CBMEM:
421 00:48:41.366555 IMD: root @ 99fff000 254 entries.
422 00:48:41.370166 IMD: root @ 99ffec00 62 entries.
423 00:48:41.373426 External stage cache:
424 00:48:41.376614 IMD: root @ 9abff000 254 entries.
425 00:48:41.379896 IMD: root @ 9abfec00 62 entries.
426 00:48:41.383391 Chrome EC: clear events_b mask to 0x0000000020004000
427 00:48:41.399301 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
428 00:48:41.412824 tlcl_write: response is 0
429 00:48:41.421494 src/security/tpm/tss/tcg-2.0/tss.c:223 index 0x100b return code 0
430 00:48:41.428044 MRC: TPM MRC hash updated successfully.
431 00:48:41.428133 2 DIMMs found
432 00:48:41.431291 SMM Memory Map
433 00:48:41.434939 SMRAM : 0x9a000000 0x1000000
434 00:48:41.438088 Subregion 0: 0x9a000000 0xa00000
435 00:48:41.441344 Subregion 1: 0x9aa00000 0x200000
436 00:48:41.445195 Subregion 2: 0x9ac00000 0x400000
437 00:48:41.448053 top_of_ram = 0x9a000000
438 00:48:41.451997 MTRR Range: Start=99000000 End=9a000000 (Size 1000000)
439 00:48:41.458722 MTRR Range: Start=9a000000 End=9b000000 (Size 1000000)
440 00:48:41.461534 MTRR Range: Start=ff000000 End=0 (Size 1000000)
441 00:48:41.468185 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
442 00:48:41.471377 CBFS @ c08000 size 3f8000
443 00:48:41.474735 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
444 00:48:41.477942 CBFS: Locating 'fallback/postcar'
445 00:48:41.481252 CBFS: Found @ offset 107000 size 4b44
446 00:48:41.488429 Decompressing stage fallback/postcar @ 0x99c0bfc0 (35640 bytes)
447 00:48:41.500989 Loading module at 99c0c000 with entry 99c0c000. filesize: 0x4818 memsize: 0x8af8
448 00:48:41.503645 Processing 180 relocs. Offset value of 0x97c0c000
449 00:48:41.512513 Accumulated console time in romstage 286 ms
450 00:48:41.512600
451 00:48:41.512667
452 00:48:41.522578 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 postcar starting (log level: 8)...
453 00:48:41.528963 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
454 00:48:41.532203 CBFS @ c08000 size 3f8000
455 00:48:41.535381 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
456 00:48:41.542035 CBFS: Locating 'fallback/ramstage'
457 00:48:41.545968 CBFS: Found @ offset 43380 size 1b9e8
458 00:48:41.551941 Decompressing stage fallback/ramstage @ 0x99baffc0 (372088 bytes)
459 00:48:41.584267 Loading module at 99bb0000 with entry 99bb0000. filesize: 0x40940 memsize: 0x5ad38
460 00:48:41.587790 Processing 3976 relocs. Offset value of 0x98db0000
461 00:48:41.594430 Accumulated console time in postcar 52 ms
462 00:48:41.594517
463 00:48:41.594585
464 00:48:41.604098 coreboot-v1.9308_26_0.0.22-11197-gc9b4b7136b Thu Mar 18 05:35:38 UTC 2021 ramstage starting (log level: 8)...
465 00:48:41.610806 FMAP: area RO_VPD found @ c00000 (16384 bytes)
466 00:48:41.614082 WARNING: RO_VPD is uninitialized or empty.
467 00:48:41.617501 FMAP: area RW_VPD found @ af8000 (8192 bytes)
468 00:48:41.623600 FMAP: area RW_VPD found @ af8000 (8192 bytes)
469 00:48:41.623704 Normal boot.
470 00:48:41.630507 BS: BS_PRE_DEVICE times (ms): entry 0 run 0 exit 0
471 00:48:41.633523 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
472 00:48:41.637360 CBFS @ c08000 size 3f8000
473 00:48:41.643431 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
474 00:48:41.647177 CBFS: Locating 'cpu_microcode_blob.bin'
475 00:48:41.650341 CBFS: Found @ offset 14700 size 2ec00
476 00:48:41.653729 microcode: sig=0x806ec pf=0x4 revision=0xc9
477 00:48:41.656943 Skip microcode update
478 00:48:41.663503 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
479 00:48:41.663598 CBFS @ c08000 size 3f8000
480 00:48:41.670552 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
481 00:48:41.673770 CBFS: Locating 'fsps.bin'
482 00:48:41.676711 CBFS: Found @ offset d1fc0 size 35000
483 00:48:41.702105 Detected 4 core, 8 thread CPU.
484 00:48:41.705331 Setting up SMI for CPU
485 00:48:41.709099 IED base = 0x9ac00000
486 00:48:41.709195 IED size = 0x00400000
487 00:48:41.712314 Will perform SMM setup.
488 00:48:41.719125 CPU: Intel(R) Core(TM) i5-10210U CPU @ 1.60GHz.
489 00:48:41.725032 Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170
490 00:48:41.728375 Processing 16 relocs. Offset value of 0x00030000
491 00:48:41.732384 Attempting to start 7 APs
492 00:48:41.735735 Waiting for 10ms after sending INIT.
493 00:48:41.751787 Waiting for 1st SIPI to complete...AP: slot 4 apic_id 1.
494 00:48:41.751880 done.
495 00:48:41.755006 AP: slot 6 apic_id 4.
496 00:48:41.758632 AP: slot 7 apic_id 5.
497 00:48:41.758716 AP: slot 2 apic_id 3.
498 00:48:41.761827 AP: slot 1 apic_id 2.
499 00:48:41.765067 Waiting for 2nd SIPI to complete...done.
500 00:48:41.768395 AP: slot 3 apic_id 7.
501 00:48:41.771670 AP: slot 5 apic_id 6.
502 00:48:41.778380 Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8
503 00:48:41.785013 Processing 13 relocs. Offset value of 0x00038000
504 00:48:41.788217 SMM Module: stub loaded at 00038000. Will call 99bcb71d(00000000)
505 00:48:41.795328 Installing SMM handler to 0x9a000000
506 00:48:41.801632 Loading module at 9a010000 with entry 9a010a52. filesize: 0x7e88 memsize: 0xcf58
507 00:48:41.805187 Processing 658 relocs. Offset value of 0x9a010000
508 00:48:41.815086 Loading module at 9a008000 with entry 9a008000. filesize: 0x1a8 memsize: 0x1a8
509 00:48:41.817902 Processing 13 relocs. Offset value of 0x9a008000
510 00:48:41.824708 SMM Module: placing jmp sequence at 9a007c00 rel16 0x03fd
511 00:48:41.831419 SMM Module: placing jmp sequence at 9a007800 rel16 0x07fd
512 00:48:41.837979 SMM Module: placing jmp sequence at 9a007400 rel16 0x0bfd
513 00:48:41.841166 SMM Module: placing jmp sequence at 9a007000 rel16 0x0ffd
514 00:48:41.847888 SMM Module: placing jmp sequence at 9a006c00 rel16 0x13fd
515 00:48:41.854229 SMM Module: placing jmp sequence at 9a006800 rel16 0x17fd
516 00:48:41.857882 SMM Module: placing jmp sequence at 9a006400 rel16 0x1bfd
517 00:48:41.864258 SMM Module: stub loaded at 9a008000. Will call 9a010a52(00000000)
518 00:48:41.867981 Clearing SMI status registers
519 00:48:41.871218 SMI_STS: PM1
520 00:48:41.871349 PM1_STS: PWRBTN
521 00:48:41.874546 TCO_STS: SECOND_TO
522 00:48:41.877935 New SMBASE 0x9a000000
523 00:48:41.881052 In relocation handler: CPU 0
524 00:48:41.884651 New SMBASE=0x9a000000 IEDBASE=0x9ac00000
525 00:48:41.887640 Writing SMRR. base = 0x9a000006, mask=0xff000800
526 00:48:41.891473 Relocation complete.
527 00:48:41.894788 New SMBASE 0x99fff000
528 00:48:41.894966 In relocation handler: CPU 4
529 00:48:41.901294 New SMBASE=0x99fff000 IEDBASE=0x9ac00000
530 00:48:41.904462 Writing SMRR. base = 0x9a000006, mask=0xff000800
531 00:48:41.907879 Relocation complete.
532 00:48:41.911102 New SMBASE 0x99ffe400
533 00:48:41.911193 In relocation handler: CPU 7
534 00:48:41.917859 New SMBASE=0x99ffe400 IEDBASE=0x9ac00000
535 00:48:41.921205 Writing SMRR. base = 0x9a000006, mask=0xff000800
536 00:48:41.924554 Relocation complete.
537 00:48:41.924668 New SMBASE 0x99ffe800
538 00:48:41.928002 In relocation handler: CPU 6
539 00:48:41.934591 New SMBASE=0x99ffe800 IEDBASE=0x9ac00000
540 00:48:41.937854 Writing SMRR. base = 0x9a000006, mask=0xff000800
541 00:48:41.941122 Relocation complete.
542 00:48:41.941230 New SMBASE 0x99fff400
543 00:48:41.944491 In relocation handler: CPU 3
544 00:48:41.947679 New SMBASE=0x99fff400 IEDBASE=0x9ac00000
545 00:48:41.954156 Writing SMRR. base = 0x9a000006, mask=0xff000800
546 00:48:41.957911 Relocation complete.
547 00:48:41.958020 New SMBASE 0x99ffec00
548 00:48:41.961155 In relocation handler: CPU 5
549 00:48:41.964216 New SMBASE=0x99ffec00 IEDBASE=0x9ac00000
550 00:48:41.971072 Writing SMRR. base = 0x9a000006, mask=0xff000800
551 00:48:41.974589 Relocation complete.
552 00:48:41.974706 New SMBASE 0x99fffc00
553 00:48:41.977396 In relocation handler: CPU 1
554 00:48:41.981161 New SMBASE=0x99fffc00 IEDBASE=0x9ac00000
555 00:48:41.987792 Writing SMRR. base = 0x9a000006, mask=0xff000800
556 00:48:41.987882 Relocation complete.
557 00:48:41.991290 New SMBASE 0x99fff800
558 00:48:41.993969 In relocation handler: CPU 2
559 00:48:41.997160 New SMBASE=0x99fff800 IEDBASE=0x9ac00000
560 00:48:42.003996 Writing SMRR. base = 0x9a000006, mask=0xff000800
561 00:48:42.004089 Relocation complete.
562 00:48:42.007250 Initializing CPU #0
563 00:48:42.010651 CPU: vendor Intel device 806ec
564 00:48:42.013750 CPU: family 06, model 8e, stepping 0c
565 00:48:42.017095 Clearing out pending MCEs
566 00:48:42.020429 Setting up local APIC...
567 00:48:42.020518 apic_id: 0x00 done.
568 00:48:42.023874 Turbo is available but hidden
569 00:48:42.027193 Turbo is available and visible
570 00:48:42.030699 VMX status: enabled
571 00:48:42.034061 IA32_FEATURE_CONTROL status: locked
572 00:48:42.037530 Skip microcode update
573 00:48:42.037637 CPU #0 initialized
574 00:48:42.040834 Initializing CPU #4
575 00:48:42.040926 Initializing CPU #1
576 00:48:42.043600 Initializing CPU #2
577 00:48:42.046994 CPU: vendor Intel device 806ec
578 00:48:42.050358 CPU: family 06, model 8e, stepping 0c
579 00:48:42.054191 CPU: vendor Intel device 806ec
580 00:48:42.057360 CPU: family 06, model 8e, stepping 0c
581 00:48:42.060546 Clearing out pending MCEs
582 00:48:42.063668 Clearing out pending MCEs
583 00:48:42.066974 Setting up local APIC...
584 00:48:42.070518 CPU: vendor Intel device 806ec
585 00:48:42.073861 CPU: family 06, model 8e, stepping 0c
586 00:48:42.073947 Clearing out pending MCEs
587 00:48:42.077232 apic_id: 0x02 done.
588 00:48:42.080453 Setting up local APIC...
589 00:48:42.083603 Setting up local APIC...
590 00:48:42.083721 Initializing CPU #7
591 00:48:42.086927 Initializing CPU #6
592 00:48:42.090223 VMX status: enabled
593 00:48:42.090310 apic_id: 0x03 done.
594 00:48:42.093489 IA32_FEATURE_CONTROL status: locked
595 00:48:42.096702 VMX status: enabled
596 00:48:42.100312 Skip microcode update
597 00:48:42.103239 IA32_FEATURE_CONTROL status: locked
598 00:48:42.103336 CPU #1 initialized
599 00:48:42.107206 Skip microcode update
600 00:48:42.109969 apic_id: 0x01 done.
601 00:48:42.110071 CPU: vendor Intel device 806ec
602 00:48:42.116929 CPU: family 06, model 8e, stepping 0c
603 00:48:42.120115 CPU: vendor Intel device 806ec
604 00:48:42.123174 CPU: family 06, model 8e, stepping 0c
605 00:48:42.126953 Clearing out pending MCEs
606 00:48:42.127036 Clearing out pending MCEs
607 00:48:42.130228 Setting up local APIC...
608 00:48:42.133626 CPU #2 initialized
609 00:48:42.133708 Setting up local APIC...
610 00:48:42.136986 Initializing CPU #5
611 00:48:42.140167 Initializing CPU #3
612 00:48:42.143438 CPU: vendor Intel device 806ec
613 00:48:42.146768 CPU: family 06, model 8e, stepping 0c
614 00:48:42.150105 CPU: vendor Intel device 806ec
615 00:48:42.153298 CPU: family 06, model 8e, stepping 0c
616 00:48:42.156541 Clearing out pending MCEs
617 00:48:42.156655 Clearing out pending MCEs
618 00:48:42.160002 Setting up local APIC...
619 00:48:42.163362 apic_id: 0x05 done.
620 00:48:42.163479 apic_id: 0x04 done.
621 00:48:42.166339 VMX status: enabled
622 00:48:42.169522 VMX status: enabled
623 00:48:42.172954 IA32_FEATURE_CONTROL status: locked
624 00:48:42.176344 IA32_FEATURE_CONTROL status: locked
625 00:48:42.179758 Skip microcode update
626 00:48:42.179869 Skip microcode update
627 00:48:42.182808 CPU #7 initialized
628 00:48:42.182900 CPU #6 initialized
629 00:48:42.186043 VMX status: enabled
630 00:48:42.189521 Setting up local APIC...
631 00:48:42.193276 IA32_FEATURE_CONTROL status: locked
632 00:48:42.196519 apic_id: 0x06 done.
633 00:48:42.196628 apic_id: 0x07 done.
634 00:48:42.199930 VMX status: enabled
635 00:48:42.200045 VMX status: enabled
636 00:48:42.202696 IA32_FEATURE_CONTROL status: locked
637 00:48:42.209245 IA32_FEATURE_CONTROL status: locked
638 00:48:42.209344 Skip microcode update
639 00:48:42.212519 Skip microcode update
640 00:48:42.215870 CPU #5 initialized
641 00:48:42.215960 CPU #3 initialized
642 00:48:42.219220 Skip microcode update
643 00:48:42.219310 CPU #4 initialized
644 00:48:42.225977 bsp_do_flight_plan done after 457 msecs.
645 00:48:42.229054 CPU: frequency set to 4200 MHz
646 00:48:42.229145 Enabling SMIs.
647 00:48:42.232442 Locking SMM.
648 00:48:42.245690 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
649 00:48:42.249068 CBFS @ c08000 size 3f8000
650 00:48:42.255676 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
651 00:48:42.255808 CBFS: Locating 'vbt.bin'
652 00:48:42.258924 CBFS: Found @ offset 5f5c0 size 499
653 00:48:42.266201 Found a VBT of 4608 bytes after decompression
654 00:48:42.451261 Display FSP Version Info HOB
655 00:48:42.454582 Reference Code - CPU = 9.0.1e.30
656 00:48:42.457991 uCode Version = 0.0.0.ca
657 00:48:42.461265 TXT ACM version = ff.ff.ff.ffff
658 00:48:42.464733 Display FSP Version Info HOB
659 00:48:42.468080 Reference Code - ME = 9.0.1e.30
660 00:48:42.471854 MEBx version = 0.0.0.0
661 00:48:42.474799 ME Firmware Version = Consumer SKU
662 00:48:42.478152 Display FSP Version Info HOB
663 00:48:42.481552 Reference Code - CML PCH = 9.0.1e.30
664 00:48:42.484763 PCH-CRID Status = Disabled
665 00:48:42.487973 PCH-CRID Original Value = ff.ff.ff.ffff
666 00:48:42.491234 PCH-CRID New Value = ff.ff.ff.ffff
667 00:48:42.494477 OPROM - RST - RAID = ff.ff.ff.ffff
668 00:48:42.497902 ChipsetInit Base Version = ff.ff.ff.ffff
669 00:48:42.500917 ChipsetInit Oem Version = ff.ff.ff.ffff
670 00:48:42.504840 Display FSP Version Info HOB
671 00:48:42.511120 Reference Code - SA - System Agent = 9.0.1e.30
672 00:48:42.514257 Reference Code - MRC = 0.7.1.6c
673 00:48:42.514373 SA - PCIe Version = 9.0.1e.30
674 00:48:42.518065 SA-CRID Status = Disabled
675 00:48:42.521275 SA-CRID Original Value = 0.0.0.c
676 00:48:42.524304 SA-CRID New Value = 0.0.0.c
677 00:48:42.527968 OPROM - VBIOS = ff.ff.ff.ffff
678 00:48:42.531392 RTC Init
679 00:48:42.534690 Set power on after power failure.
680 00:48:42.534801 Disabling Deep S3
681 00:48:42.537870 Disabling Deep S3
682 00:48:42.537956 Disabling Deep S4
683 00:48:42.541163 Disabling Deep S4
684 00:48:42.541249 Disabling Deep S5
685 00:48:42.544214 Disabling Deep S5
686 00:48:42.551103 BS: BS_DEV_INIT_CHIPS times (ms): entry 36 run 196 exit 1
687 00:48:42.551204 Enumerating buses...
688 00:48:42.557420 Show all devs... Before device enumeration.
689 00:48:42.557541 Root Device: enabled 1
690 00:48:42.560819 CPU_CLUSTER: 0: enabled 1
691 00:48:42.564234 DOMAIN: 0000: enabled 1
692 00:48:42.567588 APIC: 00: enabled 1
693 00:48:42.567705 PCI: 00:00.0: enabled 1
694 00:48:42.571081 PCI: 00:02.0: enabled 1
695 00:48:42.574374 PCI: 00:04.0: enabled 0
696 00:48:42.577720 PCI: 00:05.0: enabled 0
697 00:48:42.577808 PCI: 00:12.0: enabled 1
698 00:48:42.580525 PCI: 00:12.5: enabled 0
699 00:48:42.583876 PCI: 00:12.6: enabled 0
700 00:48:42.587294 PCI: 00:14.0: enabled 1
701 00:48:42.587382 PCI: 00:14.1: enabled 0
702 00:48:42.590509 PCI: 00:14.3: enabled 1
703 00:48:42.593913 PCI: 00:14.5: enabled 0
704 00:48:42.594001 PCI: 00:15.0: enabled 1
705 00:48:42.597309 PCI: 00:15.1: enabled 1
706 00:48:42.600626 PCI: 00:15.2: enabled 0
707 00:48:42.603968 PCI: 00:15.3: enabled 0
708 00:48:42.604056 PCI: 00:16.0: enabled 1
709 00:48:42.607077 PCI: 00:16.1: enabled 0
710 00:48:42.610218 PCI: 00:16.2: enabled 0
711 00:48:42.613802 PCI: 00:16.3: enabled 0
712 00:48:42.613900 PCI: 00:16.4: enabled 0
713 00:48:42.617443 PCI: 00:16.5: enabled 0
714 00:48:42.620509 PCI: 00:17.0: enabled 1
715 00:48:42.620598 PCI: 00:19.0: enabled 1
716 00:48:42.623604 PCI: 00:19.1: enabled 0
717 00:48:42.627532 PCI: 00:19.2: enabled 0
718 00:48:42.630530 PCI: 00:1a.0: enabled 0
719 00:48:42.630624 PCI: 00:1c.0: enabled 0
720 00:48:42.634125 PCI: 00:1c.1: enabled 0
721 00:48:42.637447 PCI: 00:1c.2: enabled 0
722 00:48:42.640883 PCI: 00:1c.3: enabled 0
723 00:48:42.640969 PCI: 00:1c.4: enabled 0
724 00:48:42.643947 PCI: 00:1c.5: enabled 0
725 00:48:42.647186 PCI: 00:1c.6: enabled 0
726 00:48:42.650359 PCI: 00:1c.7: enabled 0
727 00:48:42.650483 PCI: 00:1d.0: enabled 1
728 00:48:42.653868 PCI: 00:1d.1: enabled 0
729 00:48:42.656861 PCI: 00:1d.2: enabled 0
730 00:48:42.656966 PCI: 00:1d.3: enabled 0
731 00:48:42.660117 PCI: 00:1d.4: enabled 0
732 00:48:42.663501 PCI: 00:1d.5: enabled 1
733 00:48:42.666984 PCI: 00:1e.0: enabled 1
734 00:48:42.667091 PCI: 00:1e.1: enabled 0
735 00:48:42.670467 PCI: 00:1e.2: enabled 1
736 00:48:42.673723 PCI: 00:1e.3: enabled 1
737 00:48:42.677073 PCI: 00:1f.0: enabled 1
738 00:48:42.677170 PCI: 00:1f.1: enabled 1
739 00:48:42.680605 PCI: 00:1f.2: enabled 1
740 00:48:42.683522 PCI: 00:1f.3: enabled 1
741 00:48:42.687054 PCI: 00:1f.4: enabled 1
742 00:48:42.687139 PCI: 00:1f.5: enabled 1
743 00:48:42.690305 PCI: 00:1f.6: enabled 0
744 00:48:42.693663 USB0 port 0: enabled 1
745 00:48:42.693748 I2C: 00:15: enabled 1
746 00:48:42.697319 I2C: 00:5d: enabled 1
747 00:48:42.700406 GENERIC: 0.0: enabled 1
748 00:48:42.700491 I2C: 00:1a: enabled 1
749 00:48:42.703182 I2C: 00:38: enabled 1
750 00:48:42.706540 I2C: 00:39: enabled 1
751 00:48:42.709782 I2C: 00:3a: enabled 1
752 00:48:42.709932 I2C: 00:3b: enabled 1
753 00:48:42.713234 PCI: 00:00.0: enabled 1
754 00:48:42.716454 SPI: 00: enabled 1
755 00:48:42.716554 SPI: 01: enabled 1
756 00:48:42.719685 PNP: 0c09.0: enabled 1
757 00:48:42.723564 USB2 port 0: enabled 1
758 00:48:42.723680 USB2 port 1: enabled 1
759 00:48:42.726855 USB2 port 2: enabled 0
760 00:48:42.729904 USB2 port 3: enabled 0
761 00:48:42.729988 USB2 port 5: enabled 0
762 00:48:42.733232 USB2 port 6: enabled 1
763 00:48:42.736824 USB2 port 9: enabled 1
764 00:48:42.736928 USB3 port 0: enabled 1
765 00:48:42.740071 USB3 port 1: enabled 1
766 00:48:42.743210 USB3 port 2: enabled 1
767 00:48:42.746390 USB3 port 3: enabled 1
768 00:48:42.746469 USB3 port 4: enabled 0
769 00:48:42.749810 APIC: 02: enabled 1
770 00:48:42.749917 APIC: 03: enabled 1
771 00:48:42.753362 APIC: 07: enabled 1
772 00:48:42.756610 APIC: 01: enabled 1
773 00:48:42.756689 APIC: 06: enabled 1
774 00:48:42.759923 APIC: 04: enabled 1
775 00:48:42.763088 APIC: 05: enabled 1
776 00:48:42.763176 Compare with tree...
777 00:48:42.766255 Root Device: enabled 1
778 00:48:42.769787 CPU_CLUSTER: 0: enabled 1
779 00:48:42.769874 APIC: 00: enabled 1
780 00:48:42.773177 APIC: 02: enabled 1
781 00:48:42.776504 APIC: 03: enabled 1
782 00:48:42.776620 APIC: 07: enabled 1
783 00:48:42.779289 APIC: 01: enabled 1
784 00:48:42.782632 APIC: 06: enabled 1
785 00:48:42.785994 APIC: 04: enabled 1
786 00:48:42.786081 APIC: 05: enabled 1
787 00:48:42.789447 DOMAIN: 0000: enabled 1
788 00:48:42.792490 PCI: 00:00.0: enabled 1
789 00:48:42.796024 PCI: 00:02.0: enabled 1
790 00:48:42.796103 PCI: 00:04.0: enabled 0
791 00:48:42.799425 PCI: 00:05.0: enabled 0
792 00:48:42.803237 PCI: 00:12.0: enabled 1
793 00:48:42.805893 PCI: 00:12.5: enabled 0
794 00:48:42.809438 PCI: 00:12.6: enabled 0
795 00:48:42.809529 PCI: 00:14.0: enabled 1
796 00:48:42.812721 USB0 port 0: enabled 1
797 00:48:42.816139 USB2 port 0: enabled 1
798 00:48:42.819326 USB2 port 1: enabled 1
799 00:48:42.822510 USB2 port 2: enabled 0
800 00:48:42.822622 USB2 port 3: enabled 0
801 00:48:42.825891 USB2 port 5: enabled 0
802 00:48:42.829292 USB2 port 6: enabled 1
803 00:48:42.832563 USB2 port 9: enabled 1
804 00:48:42.835885 USB3 port 0: enabled 1
805 00:48:42.839053 USB3 port 1: enabled 1
806 00:48:42.839134 USB3 port 2: enabled 1
807 00:48:42.842288 USB3 port 3: enabled 1
808 00:48:42.845360 USB3 port 4: enabled 0
809 00:48:42.849008 PCI: 00:14.1: enabled 0
810 00:48:42.852356 PCI: 00:14.3: enabled 1
811 00:48:42.852443 PCI: 00:14.5: enabled 0
812 00:48:42.855971 PCI: 00:15.0: enabled 1
813 00:48:42.859169 I2C: 00:15: enabled 1
814 00:48:42.862333 PCI: 00:15.1: enabled 1
815 00:48:42.862447 I2C: 00:5d: enabled 1
816 00:48:42.865399 GENERIC: 0.0: enabled 1
817 00:48:42.869215 PCI: 00:15.2: enabled 0
818 00:48:42.872291 PCI: 00:15.3: enabled 0
819 00:48:42.875562 PCI: 00:16.0: enabled 1
820 00:48:42.875678 PCI: 00:16.1: enabled 0
821 00:48:42.878674 PCI: 00:16.2: enabled 0
822 00:48:42.881793 PCI: 00:16.3: enabled 0
823 00:48:42.884997 PCI: 00:16.4: enabled 0
824 00:48:42.888486 PCI: 00:16.5: enabled 0
825 00:48:42.888573 PCI: 00:17.0: enabled 1
826 00:48:42.892171 PCI: 00:19.0: enabled 1
827 00:48:42.895228 I2C: 00:1a: enabled 1
828 00:48:42.898637 I2C: 00:38: enabled 1
829 00:48:42.902003 I2C: 00:39: enabled 1
830 00:48:42.902090 I2C: 00:3a: enabled 1
831 00:48:42.905392 I2C: 00:3b: enabled 1
832 00:48:42.908864 PCI: 00:19.1: enabled 0
833 00:48:42.911651 PCI: 00:19.2: enabled 0
834 00:48:42.914937 PCI: 00:1a.0: enabled 0
835 00:48:42.915024 PCI: 00:1c.0: enabled 0
836 00:48:42.918191 PCI: 00:1c.1: enabled 0
837 00:48:42.921903 PCI: 00:1c.2: enabled 0
838 00:48:42.925019 PCI: 00:1c.3: enabled 0
839 00:48:42.927908 PCI: 00:1c.4: enabled 0
840 00:48:42.928022 PCI: 00:1c.5: enabled 0
841 00:48:42.931216 PCI: 00:1c.6: enabled 0
842 00:48:42.934534 PCI: 00:1c.7: enabled 0
843 00:48:42.937841 PCI: 00:1d.0: enabled 1
844 00:48:42.937974 PCI: 00:1d.1: enabled 0
845 00:48:42.941521 PCI: 00:1d.2: enabled 0
846 00:48:42.944536 PCI: 00:1d.3: enabled 0
847 00:48:42.947873 PCI: 00:1d.4: enabled 0
848 00:48:42.951482 PCI: 00:1d.5: enabled 1
849 00:48:42.954632 PCI: 00:00.0: enabled 1
850 00:48:42.954720 PCI: 00:1e.0: enabled 1
851 00:48:42.957761 PCI: 00:1e.1: enabled 0
852 00:48:42.961380 PCI: 00:1e.2: enabled 1
853 00:48:42.964456 SPI: 00: enabled 1
854 00:48:42.964542 PCI: 00:1e.3: enabled 1
855 00:48:42.967820 SPI: 01: enabled 1
856 00:48:42.971189 PCI: 00:1f.0: enabled 1
857 00:48:42.974296 PNP: 0c09.0: enabled 1
858 00:48:42.974403 PCI: 00:1f.1: enabled 1
859 00:48:42.977847 PCI: 00:1f.2: enabled 1
860 00:48:42.981119 PCI: 00:1f.3: enabled 1
861 00:48:42.984368 PCI: 00:1f.4: enabled 1
862 00:48:42.987645 PCI: 00:1f.5: enabled 1
863 00:48:42.987743 PCI: 00:1f.6: enabled 0
864 00:48:42.990962 Root Device scanning...
865 00:48:42.994455 scan_static_bus for Root Device
866 00:48:42.997583 CPU_CLUSTER: 0 enabled
867 00:48:43.000854 DOMAIN: 0000 enabled
868 00:48:43.000939 DOMAIN: 0000 scanning...
869 00:48:43.004037 PCI: pci_scan_bus for bus 00
870 00:48:43.007325 PCI: 00:00.0 [8086/0000] ops
871 00:48:43.010787 PCI: 00:00.0 [8086/9b61] enabled
872 00:48:43.014202 PCI: 00:02.0 [8086/0000] bus ops
873 00:48:43.017470 PCI: 00:02.0 [8086/9b41] enabled
874 00:48:43.020823 PCI: 00:04.0 [8086/1903] disabled
875 00:48:43.024117 PCI: 00:08.0 [8086/1911] enabled
876 00:48:43.027573 PCI: 00:12.0 [8086/02f9] enabled
877 00:48:43.030209 PCI: 00:14.0 [8086/0000] bus ops
878 00:48:43.033755 PCI: 00:14.0 [8086/02ed] enabled
879 00:48:43.037081 PCI: 00:14.2 [8086/02ef] enabled
880 00:48:43.040272 PCI: 00:14.3 [8086/02f0] enabled
881 00:48:43.043478 PCI: 00:15.0 [8086/0000] bus ops
882 00:48:43.047661 PCI: 00:15.0 [8086/02e8] enabled
883 00:48:43.050364 PCI: 00:15.1 [8086/0000] bus ops
884 00:48:43.053713 PCI: 00:15.1 [8086/02e9] enabled
885 00:48:43.056714 PCI: 00:16.0 [8086/0000] ops
886 00:48:43.060565 PCI: 00:16.0 [8086/02e0] enabled
887 00:48:43.063797 PCI: 00:17.0 [8086/0000] ops
888 00:48:43.066923 PCI: 00:17.0 [8086/02d3] enabled
889 00:48:43.070616 PCI: 00:19.0 [8086/0000] bus ops
890 00:48:43.073682 PCI: 00:19.0 [8086/02c5] enabled
891 00:48:43.076973 PCI: 00:1d.0 [8086/0000] bus ops
892 00:48:43.080082 PCI: 00:1d.0 [8086/02b0] enabled
893 00:48:43.087033 PCI: Static device PCI: 00:1d.5 not found, disabling it.
894 00:48:43.090216 PCI: 00:1e.0 [8086/0000] ops
895 00:48:43.093841 PCI: 00:1e.0 [8086/02a8] enabled
896 00:48:43.097227 PCI: 00:1e.2 [8086/0000] bus ops
897 00:48:43.100443 PCI: 00:1e.2 [8086/02aa] enabled
898 00:48:43.103762 PCI: 00:1e.3 [8086/0000] bus ops
899 00:48:43.106971 PCI: 00:1e.3 [8086/02ab] enabled
900 00:48:43.110318 PCI: 00:1f.0 [8086/0000] bus ops
901 00:48:43.113634 PCI: 00:1f.0 [8086/0284] enabled
902 00:48:43.116784 PCI: Static device PCI: 00:1f.1 not found, disabling it.
903 00:48:43.123526 PCI: Static device PCI: 00:1f.2 not found, disabling it.
904 00:48:43.126759 PCI: 00:1f.3 [8086/0000] bus ops
905 00:48:43.130003 PCI: 00:1f.3 [8086/02c8] enabled
906 00:48:43.133219 PCI: 00:1f.4 [8086/0000] bus ops
907 00:48:43.136582 PCI: 00:1f.4 [8086/02a3] enabled
908 00:48:43.139917 PCI: 00:1f.5 [8086/0000] bus ops
909 00:48:43.143407 PCI: 00:1f.5 [8086/02a4] enabled
910 00:48:43.146648 PCI: Leftover static devices:
911 00:48:43.146727 PCI: 00:05.0
912 00:48:43.149927 PCI: 00:12.5
913 00:48:43.150027 PCI: 00:12.6
914 00:48:43.153463 PCI: 00:14.1
915 00:48:43.153567 PCI: 00:14.5
916 00:48:43.156805 PCI: 00:15.2
917 00:48:43.156883 PCI: 00:15.3
918 00:48:43.156984 PCI: 00:16.1
919 00:48:43.160085 PCI: 00:16.2
920 00:48:43.160187 PCI: 00:16.3
921 00:48:43.163136 PCI: 00:16.4
922 00:48:43.163242 PCI: 00:16.5
923 00:48:43.163343 PCI: 00:19.1
924 00:48:43.166293 PCI: 00:19.2
925 00:48:43.166404 PCI: 00:1a.0
926 00:48:43.169770 PCI: 00:1c.0
927 00:48:43.169850 PCI: 00:1c.1
928 00:48:43.169952 PCI: 00:1c.2
929 00:48:43.173269 PCI: 00:1c.3
930 00:48:43.173372 PCI: 00:1c.4
931 00:48:43.176177 PCI: 00:1c.5
932 00:48:43.176282 PCI: 00:1c.6
933 00:48:43.176382 PCI: 00:1c.7
934 00:48:43.180315 PCI: 00:1d.1
935 00:48:43.180418 PCI: 00:1d.2
936 00:48:43.183246 PCI: 00:1d.3
937 00:48:43.183336 PCI: 00:1d.4
938 00:48:43.186379 PCI: 00:1d.5
939 00:48:43.186459 PCI: 00:1e.1
940 00:48:43.186526 PCI: 00:1f.1
941 00:48:43.189560 PCI: 00:1f.2
942 00:48:43.189644 PCI: 00:1f.6
943 00:48:43.192816 PCI: Check your devicetree.cb.
944 00:48:43.196601 PCI: 00:02.0 scanning...
945 00:48:43.199714 scan_generic_bus for PCI: 00:02.0
946 00:48:43.203129 scan_generic_bus for PCI: 00:02.0 done
947 00:48:43.210009 scan_bus: scanning of bus PCI: 00:02.0 took 10175 usecs
948 00:48:43.212697 PCI: 00:14.0 scanning...
949 00:48:43.216510 scan_static_bus for PCI: 00:14.0
950 00:48:43.216592 USB0 port 0 enabled
951 00:48:43.220047 USB0 port 0 scanning...
952 00:48:43.223292 scan_static_bus for USB0 port 0
953 00:48:43.226009 USB2 port 0 enabled
954 00:48:43.226092 USB2 port 1 enabled
955 00:48:43.229757 USB2 port 2 disabled
956 00:48:43.232886 USB2 port 3 disabled
957 00:48:43.232969 USB2 port 5 disabled
958 00:48:43.236152 USB2 port 6 enabled
959 00:48:43.239555 USB2 port 9 enabled
960 00:48:43.239639 USB3 port 0 enabled
961 00:48:43.243155 USB3 port 1 enabled
962 00:48:43.243240 USB3 port 2 enabled
963 00:48:43.246401 USB3 port 3 enabled
964 00:48:43.249726 USB3 port 4 disabled
965 00:48:43.249809 USB2 port 0 scanning...
966 00:48:43.253408 scan_static_bus for USB2 port 0
967 00:48:43.259447 scan_static_bus for USB2 port 0 done
968 00:48:43.262727 scan_bus: scanning of bus USB2 port 0 took 9703 usecs
969 00:48:43.265958 USB2 port 1 scanning...
970 00:48:43.269239 scan_static_bus for USB2 port 1
971 00:48:43.272994 scan_static_bus for USB2 port 1 done
972 00:48:43.279154 scan_bus: scanning of bus USB2 port 1 took 9705 usecs
973 00:48:43.279239 USB2 port 6 scanning...
974 00:48:43.282955 scan_static_bus for USB2 port 6
975 00:48:43.289478 scan_static_bus for USB2 port 6 done
976 00:48:43.292763 scan_bus: scanning of bus USB2 port 6 took 9696 usecs
977 00:48:43.295674 USB2 port 9 scanning...
978 00:48:43.299594 scan_static_bus for USB2 port 9
979 00:48:43.302638 scan_static_bus for USB2 port 9 done
980 00:48:43.309449 scan_bus: scanning of bus USB2 port 9 took 9696 usecs
981 00:48:43.309573 USB3 port 0 scanning...
982 00:48:43.312773 scan_static_bus for USB3 port 0
983 00:48:43.319119 scan_static_bus for USB3 port 0 done
984 00:48:43.322355 scan_bus: scanning of bus USB3 port 0 took 9703 usecs
985 00:48:43.325656 USB3 port 1 scanning...
986 00:48:43.329081 scan_static_bus for USB3 port 1
987 00:48:43.332984 scan_static_bus for USB3 port 1 done
988 00:48:43.339444 scan_bus: scanning of bus USB3 port 1 took 9705 usecs
989 00:48:43.339530 USB3 port 2 scanning...
990 00:48:43.342845 scan_static_bus for USB3 port 2
991 00:48:43.349415 scan_static_bus for USB3 port 2 done
992 00:48:43.352840 scan_bus: scanning of bus USB3 port 2 took 9702 usecs
993 00:48:43.356031 USB3 port 3 scanning...
994 00:48:43.359202 scan_static_bus for USB3 port 3
995 00:48:43.362612 scan_static_bus for USB3 port 3 done
996 00:48:43.369176 scan_bus: scanning of bus USB3 port 3 took 9702 usecs
997 00:48:43.372294 scan_static_bus for USB0 port 0 done
998 00:48:43.375570 scan_bus: scanning of bus USB0 port 0 took 155347 usecs
999 00:48:43.382528 scan_static_bus for PCI: 00:14.0 done
1000 00:48:43.385666 scan_bus: scanning of bus PCI: 00:14.0 took 172951 usecs
1001 00:48:43.389379 PCI: 00:15.0 scanning...
1002 00:48:43.392498 scan_generic_bus for PCI: 00:15.0
1003 00:48:43.395387 bus: PCI: 00:15.0[0]->I2C: 01:15 enabled
1004 00:48:43.402359 scan_generic_bus for PCI: 00:15.0 done
1005 00:48:43.405737 scan_bus: scanning of bus PCI: 00:15.0 took 14306 usecs
1006 00:48:43.408959 PCI: 00:15.1 scanning...
1007 00:48:43.412593 scan_generic_bus for PCI: 00:15.1
1008 00:48:43.415691 bus: PCI: 00:15.1[0]->I2C: 02:5d enabled
1009 00:48:43.422372 bus: PCI: 00:15.1[0]->GENERIC: 0.0 enabled
1010 00:48:43.425448 scan_generic_bus for PCI: 00:15.1 done
1011 00:48:43.432183 scan_bus: scanning of bus PCI: 00:15.1 took 18665 usecs
1012 00:48:43.432261 PCI: 00:19.0 scanning...
1013 00:48:43.435205 scan_generic_bus for PCI: 00:19.0
1014 00:48:43.442205 bus: PCI: 00:19.0[0]->I2C: 03:1a enabled
1015 00:48:43.445563 bus: PCI: 00:19.0[0]->I2C: 03:38 enabled
1016 00:48:43.448926 bus: PCI: 00:19.0[0]->I2C: 03:39 enabled
1017 00:48:43.451739 bus: PCI: 00:19.0[0]->I2C: 03:3a enabled
1018 00:48:43.459072 bus: PCI: 00:19.0[0]->I2C: 03:3b enabled
1019 00:48:43.461649 scan_generic_bus for PCI: 00:19.0 done
1020 00:48:43.465493 scan_bus: scanning of bus PCI: 00:19.0 took 30716 usecs
1021 00:48:43.468942 PCI: 00:1d.0 scanning...
1022 00:48:43.471610 do_pci_scan_bridge for PCI: 00:1d.0
1023 00:48:43.475479 PCI: pci_scan_bus for bus 01
1024 00:48:43.478702 PCI: 01:00.0 [1c5c/1327] enabled
1025 00:48:43.482003 Enabling Common Clock Configuration
1026 00:48:43.488926 L1 Sub-State supported from root port 29
1027 00:48:43.491642 L1 Sub-State Support = 0xf
1028 00:48:43.491727 CommonModeRestoreTime = 0x28
1029 00:48:43.498793 Power On Value = 0x16, Power On Scale = 0x0
1030 00:48:43.498869 ASPM: Enabled L1
1031 00:48:43.505669 scan_bus: scanning of bus PCI: 00:1d.0 took 32774 usecs
1032 00:48:43.508623 PCI: 00:1e.2 scanning...
1033 00:48:43.511796 scan_generic_bus for PCI: 00:1e.2
1034 00:48:43.514998 bus: PCI: 00:1e.2[0]->SPI: 00 enabled
1035 00:48:43.518252 scan_generic_bus for PCI: 00:1e.2 done
1036 00:48:43.524890 scan_bus: scanning of bus PCI: 00:1e.2 took 14002 usecs
1037 00:48:43.528833 PCI: 00:1e.3 scanning...
1038 00:48:43.531603 scan_generic_bus for PCI: 00:1e.3
1039 00:48:43.535082 bus: PCI: 00:1e.3[0]->SPI: 01 enabled
1040 00:48:43.538219 scan_generic_bus for PCI: 00:1e.3 done
1041 00:48:43.545164 scan_bus: scanning of bus PCI: 00:1e.3 took 13998 usecs
1042 00:48:43.545256 PCI: 00:1f.0 scanning...
1043 00:48:43.548379 scan_static_bus for PCI: 00:1f.0
1044 00:48:43.551754 PNP: 0c09.0 enabled
1045 00:48:43.555206 scan_static_bus for PCI: 00:1f.0 done
1046 00:48:43.561445 scan_bus: scanning of bus PCI: 00:1f.0 took 12071 usecs
1047 00:48:43.565116 PCI: 00:1f.3 scanning...
1048 00:48:43.568293 scan_bus: scanning of bus PCI: 00:1f.3 took 2859 usecs
1049 00:48:43.571511 PCI: 00:1f.4 scanning...
1050 00:48:43.574923 scan_generic_bus for PCI: 00:1f.4
1051 00:48:43.578275 scan_generic_bus for PCI: 00:1f.4 done
1052 00:48:43.584597 scan_bus: scanning of bus PCI: 00:1f.4 took 10175 usecs
1053 00:48:43.587947 PCI: 00:1f.5 scanning...
1054 00:48:43.591317 scan_generic_bus for PCI: 00:1f.5
1055 00:48:43.595288 scan_generic_bus for PCI: 00:1f.5 done
1056 00:48:43.601452 scan_bus: scanning of bus PCI: 00:1f.5 took 10184 usecs
1057 00:48:43.608070 scan_bus: scanning of bus DOMAIN: 0000 took 604966 usecs
1058 00:48:43.611708 scan_static_bus for Root Device done
1059 00:48:43.614620 scan_bus: scanning of bus Root Device took 624823 usecs
1060 00:48:43.618380 done
1061 00:48:43.621651 Chrome EC: UHEPI supported
1062 00:48:43.624906 FMAP: area RECOVERY_MRC_CACHE found @ ad0000 (65536 bytes)
1063 00:48:43.631231 MRC: Checking cached data update for 'RECOVERY_MRC_CACHE'.
1064 00:48:43.637959 SF: Detected 00 0000 with sector size 0x1000, total 0x1000000
1065 00:48:43.644786 FMAP: area UNIFIED_MRC_CACHE found @ ad0000 (131072 bytes)
1066 00:48:43.647939 SPI flash protection: WPSW=0 SRP0=1
1067 00:48:43.654379 MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'.
1068 00:48:43.657762 BS: BS_DEV_ENUMERATE times (ms): entry 0 run 10 exit 2
1069 00:48:43.661035 found VGA at PCI: 00:02.0
1070 00:48:43.664236 Setting up VGA for PCI: 00:02.0
1071 00:48:43.670726 Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
1072 00:48:43.674500 Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
1073 00:48:43.678012 Allocating resources...
1074 00:48:43.681422 Reading resources...
1075 00:48:43.684400 Root Device read_resources bus 0 link: 0
1076 00:48:43.687578 CPU_CLUSTER: 0 read_resources bus 0 link: 0
1077 00:48:43.694170 CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
1078 00:48:43.697442 DOMAIN: 0000 read_resources bus 0 link: 0
1079 00:48:43.704822 PCI: 00:14.0 read_resources bus 0 link: 0
1080 00:48:43.708048 USB0 port 0 read_resources bus 0 link: 0
1081 00:48:43.715803 USB0 port 0 read_resources bus 0 link: 0 done
1082 00:48:43.719661 PCI: 00:14.0 read_resources bus 0 link: 0 done
1083 00:48:43.726336 PCI: 00:15.0 read_resources bus 1 link: 0
1084 00:48:43.729963 PCI: 00:15.0 read_resources bus 1 link: 0 done
1085 00:48:43.736238 PCI: 00:15.1 read_resources bus 2 link: 0
1086 00:48:43.739467 PCI: 00:15.1 read_resources bus 2 link: 0 done
1087 00:48:43.747375 PCI: 00:19.0 read_resources bus 3 link: 0
1088 00:48:43.753668 PCI: 00:19.0 read_resources bus 3 link: 0 done
1089 00:48:43.757360 PCI: 00:1d.0 read_resources bus 1 link: 0
1090 00:48:43.763936 PCI: 00:1d.0 read_resources bus 1 link: 0 done
1091 00:48:43.767071 PCI: 00:1e.2 read_resources bus 4 link: 0
1092 00:48:43.773699 PCI: 00:1e.2 read_resources bus 4 link: 0 done
1093 00:48:43.776866 PCI: 00:1e.3 read_resources bus 5 link: 0
1094 00:48:43.783840 PCI: 00:1e.3 read_resources bus 5 link: 0 done
1095 00:48:43.787126 PCI: 00:1f.0 read_resources bus 0 link: 0
1096 00:48:43.793525 PCI: 00:1f.0 read_resources bus 0 link: 0 done
1097 00:48:43.800263 DOMAIN: 0000 read_resources bus 0 link: 0 done
1098 00:48:43.803483 Root Device read_resources bus 0 link: 0 done
1099 00:48:43.806739 Done reading resources.
1100 00:48:43.810215 Show resources in subtree (Root Device)...After reading.
1101 00:48:43.816845 Root Device child on link 0 CPU_CLUSTER: 0
1102 00:48:43.819961 CPU_CLUSTER: 0 child on link 0 APIC: 00
1103 00:48:43.820045 APIC: 00
1104 00:48:43.823344 APIC: 02
1105 00:48:43.823433 APIC: 03
1106 00:48:43.826637 APIC: 07
1107 00:48:43.826720 APIC: 01
1108 00:48:43.826786 APIC: 06
1109 00:48:43.829924 APIC: 04
1110 00:48:43.830042 APIC: 05
1111 00:48:43.833935 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1112 00:48:43.890051 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
1113 00:48:43.890350 DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
1114 00:48:43.890423 PCI: 00:00.0
1115 00:48:43.890498 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1116 00:48:43.890844 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1117 00:48:43.891199 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1118 00:48:43.939184 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1119 00:48:43.939457 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1120 00:48:43.939728 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1121 00:48:43.939837 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1122 00:48:43.941211 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1123 00:48:43.941476 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1124 00:48:43.989523 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1125 00:48:43.989652 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1126 00:48:43.989922 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1127 00:48:43.990031 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1128 00:48:43.990582 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1129 00:48:43.997312 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1130 00:48:44.007098 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1131 00:48:44.007186 PCI: 00:02.0
1132 00:48:44.017123 PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10
1133 00:48:44.027011 PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18
1134 00:48:44.036899 PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20
1135 00:48:44.036985 PCI: 00:04.0
1136 00:48:44.040203 PCI: 00:08.0
1137 00:48:44.050042 PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1138 00:48:44.050128 PCI: 00:12.0
1139 00:48:44.059779 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1140 00:48:44.066504 PCI: 00:14.0 child on link 0 USB0 port 0
1141 00:48:44.076425 PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10
1142 00:48:44.080059 USB0 port 0 child on link 0 USB2 port 0
1143 00:48:44.080168 USB2 port 0
1144 00:48:44.083250 USB2 port 1
1145 00:48:44.086326 USB2 port 2
1146 00:48:44.086433 USB2 port 3
1147 00:48:44.089934 USB2 port 5
1148 00:48:44.090016 USB2 port 6
1149 00:48:44.092859 USB2 port 9
1150 00:48:44.092959 USB3 port 0
1151 00:48:44.096558 USB3 port 1
1152 00:48:44.096687 USB3 port 2
1153 00:48:44.099833 USB3 port 3
1154 00:48:44.099909 USB3 port 4
1155 00:48:44.102847 PCI: 00:14.2
1156 00:48:44.113323 PCI: 00:14.2 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10
1157 00:48:44.122483 PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1158 00:48:44.122563 PCI: 00:14.3
1159 00:48:44.132438 PCI: 00:14.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1160 00:48:44.139068 PCI: 00:15.0 child on link 0 I2C: 01:15
1161 00:48:44.149020 PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1162 00:48:44.149098 I2C: 01:15
1163 00:48:44.152320 PCI: 00:15.1 child on link 0 I2C: 02:5d
1164 00:48:44.162815 PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1165 00:48:44.165859 I2C: 02:5d
1166 00:48:44.166018 GENERIC: 0.0
1167 00:48:44.169227 PCI: 00:16.0
1168 00:48:44.178867 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1169 00:48:44.178969 PCI: 00:17.0
1170 00:48:44.188982 PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10
1171 00:48:44.199273 PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14
1172 00:48:44.205575 PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
1173 00:48:44.215465 PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
1174 00:48:44.221777 PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
1175 00:48:44.232099 PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24
1176 00:48:44.235276 PCI: 00:19.0 child on link 0 I2C: 03:1a
1177 00:48:44.245460 PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1178 00:48:44.248376 I2C: 03:1a
1179 00:48:44.248480 I2C: 03:38
1180 00:48:44.251777 I2C: 03:39
1181 00:48:44.251876 I2C: 03:3a
1182 00:48:44.255053 I2C: 03:3b
1183 00:48:44.258308 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1184 00:48:44.268664 PCI: 00:1d.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
1185 00:48:44.278193 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24
1186 00:48:44.284630 PCI: 00:1d.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
1187 00:48:44.288117 PCI: 01:00.0
1188 00:48:44.298037 PCI: 01:00.0 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1189 00:48:44.298121 PCI: 00:1e.0
1190 00:48:44.311518 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1191 00:48:44.321188 PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18
1192 00:48:44.324950 PCI: 00:1e.2 child on link 0 SPI: 00
1193 00:48:44.334498 PCI: 00:1e.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1194 00:48:44.334583 SPI: 00
1195 00:48:44.341064 PCI: 00:1e.3 child on link 0 SPI: 01
1196 00:48:44.350862 PCI: 00:1e.3 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10
1197 00:48:44.350980 SPI: 01
1198 00:48:44.354153 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1199 00:48:44.364159 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1200 00:48:44.373963 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1201 00:48:44.374066 PNP: 0c09.0
1202 00:48:44.384165 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1203 00:48:44.384255 PCI: 00:1f.3
1204 00:48:44.394172 PCI: 00:1f.3 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
1205 00:48:44.403618 PCI: 00:1f.3 resource base 0 size 100000 align 20 gran 20 limit ffffffffffffffff flags 201 index 20
1206 00:48:44.407477 PCI: 00:1f.4
1207 00:48:44.417067 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1208 00:48:44.426798 PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10
1209 00:48:44.426887 PCI: 00:1f.5
1210 00:48:44.436576 PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
1211 00:48:44.443826 DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
1212 00:48:44.450477 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
1213 00:48:44.457216 PCI: 00:1d.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
1214 00:48:44.460457 PCI: 00:02.0 20 * [0x0 - 0x3f] io
1215 00:48:44.463112 PCI: 00:17.0 20 * [0x40 - 0x5f] io
1216 00:48:44.466528 PCI: 00:17.0 18 * [0x60 - 0x67] io
1217 00:48:44.469882 PCI: 00:17.0 1c * [0x68 - 0x6b] io
1218 00:48:44.477030 DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done
1219 00:48:44.483566 DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
1220 00:48:44.490209 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff
1221 00:48:44.499894 PCI: 00:1d.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done
1222 00:48:44.506744 PCI: 00:1d.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
1223 00:48:44.510101 PCI: 01:00.0 10 * [0x0 - 0x3fff] mem
1224 00:48:44.520355 PCI: 00:1d.0 mem: base: 4000 size: 100000 align: 20 gran: 20 limit: ffffffff done
1225 00:48:44.523193 PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem
1226 00:48:44.526981 PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem
1227 00:48:44.533427 PCI: 00:1d.0 20 * [0x11000000 - 0x110fffff] mem
1228 00:48:44.536459 PCI: 00:1f.3 20 * [0x11100000 - 0x111fffff] mem
1229 00:48:44.543434 PCI: 00:14.0 10 * [0x11200000 - 0x1120ffff] mem
1230 00:48:44.546550 PCI: 00:14.3 10 * [0x11210000 - 0x11213fff] mem
1231 00:48:44.553130 PCI: 00:1f.3 10 * [0x11214000 - 0x11217fff] mem
1232 00:48:44.556428 PCI: 00:14.2 10 * [0x11218000 - 0x11219fff] mem
1233 00:48:44.563070 PCI: 00:17.0 10 * [0x1121a000 - 0x1121bfff] mem
1234 00:48:44.566231 PCI: 00:08.0 10 * [0x1121c000 - 0x1121cfff] mem
1235 00:48:44.572668 PCI: 00:12.0 10 * [0x1121d000 - 0x1121dfff] mem
1236 00:48:44.576053 PCI: 00:14.2 18 * [0x1121e000 - 0x1121efff] mem
1237 00:48:44.582460 PCI: 00:15.0 10 * [0x1121f000 - 0x1121ffff] mem
1238 00:48:44.585819 PCI: 00:15.1 10 * [0x11220000 - 0x11220fff] mem
1239 00:48:44.592249 PCI: 00:16.0 10 * [0x11221000 - 0x11221fff] mem
1240 00:48:44.595651 PCI: 00:19.0 10 * [0x11222000 - 0x11222fff] mem
1241 00:48:44.602631 PCI: 00:1e.0 18 * [0x11223000 - 0x11223fff] mem
1242 00:48:44.605696 PCI: 00:1e.2 10 * [0x11224000 - 0x11224fff] mem
1243 00:48:44.608896 PCI: 00:1e.3 10 * [0x11225000 - 0x11225fff] mem
1244 00:48:44.615843 PCI: 00:1f.5 10 * [0x11226000 - 0x11226fff] mem
1245 00:48:44.619031 PCI: 00:17.0 24 * [0x11227000 - 0x112277ff] mem
1246 00:48:44.625473 PCI: 00:17.0 14 * [0x11228000 - 0x112280ff] mem
1247 00:48:44.628724 PCI: 00:1f.4 10 * [0x11229000 - 0x112290ff] mem
1248 00:48:44.638950 DOMAIN: 0000 mem: base: 11229100 size: 11229100 align: 28 gran: 0 limit: ffffffff done
1249 00:48:44.641940 avoid_fixed_resources: DOMAIN: 0000
1250 00:48:44.648963 avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
1251 00:48:44.655435 avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
1252 00:48:44.661460 constrain_resources: PCI: 00:00.0 00 base e0000000 limit efffffff mem (fixed)
1253 00:48:44.668770 constrain_resources: PCI: 00:00.0 09 base 00000000 limit 0009ffff mem (fixed)
1254 00:48:44.678145 constrain_resources: PCI: 00:00.0 0a base 000c0000 limit 99ffffff mem (fixed)
1255 00:48:44.684759 constrain_resources: PCI: 00:00.0 0b base 9a000000 limit 9affffff mem (fixed)
1256 00:48:44.692023 constrain_resources: PCI: 00:00.0 0c base 9b000000 limit 9f7fffff mem (fixed)
1257 00:48:44.701898 constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed)
1258 00:48:44.708470 constrain_resources: PCI: 00:1f.0 20 base 00001800 limit 000018ff io (fixed)
1259 00:48:44.714999 constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed)
1260 00:48:44.721443 avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f
1261 00:48:44.731593 avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff
1262 00:48:44.732029 Setting resources...
1263 00:48:44.738472 DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f
1264 00:48:44.741539 PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io
1265 00:48:44.747880 PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io
1266 00:48:44.751487 PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io
1267 00:48:44.754851 PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io
1268 00:48:44.761014 DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done
1269 00:48:44.768081 PCI: 00:1d.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f
1270 00:48:44.774733 PCI: 00:1d.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done
1271 00:48:44.781460 DOMAIN: 0000 mem: base:c0000000 size:11229100 align:28 gran:0 limit:dfffffff
1272 00:48:44.784170 PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem
1273 00:48:44.790897 PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem
1274 00:48:44.794133 PCI: 00:1d.0 20 * [0xd1000000 - 0xd10fffff] mem
1275 00:48:44.801346 PCI: 00:1f.3 20 * [0xd1100000 - 0xd11fffff] mem
1276 00:48:44.804481 PCI: 00:14.0 10 * [0xd1200000 - 0xd120ffff] mem
1277 00:48:44.811213 PCI: 00:14.3 10 * [0xd1210000 - 0xd1213fff] mem
1278 00:48:44.814203 PCI: 00:1f.3 10 * [0xd1214000 - 0xd1217fff] mem
1279 00:48:44.820305 PCI: 00:14.2 10 * [0xd1218000 - 0xd1219fff] mem
1280 00:48:44.824213 PCI: 00:17.0 10 * [0xd121a000 - 0xd121bfff] mem
1281 00:48:44.830713 PCI: 00:08.0 10 * [0xd121c000 - 0xd121cfff] mem
1282 00:48:44.833940 PCI: 00:12.0 10 * [0xd121d000 - 0xd121dfff] mem
1283 00:48:44.840426 PCI: 00:14.2 18 * [0xd121e000 - 0xd121efff] mem
1284 00:48:44.843815 PCI: 00:15.0 10 * [0xd121f000 - 0xd121ffff] mem
1285 00:48:44.850275 PCI: 00:15.1 10 * [0xd1220000 - 0xd1220fff] mem
1286 00:48:44.853763 PCI: 00:16.0 10 * [0xd1221000 - 0xd1221fff] mem
1287 00:48:44.860162 PCI: 00:19.0 10 * [0xd1222000 - 0xd1222fff] mem
1288 00:48:44.863135 PCI: 00:1e.0 18 * [0xd1223000 - 0xd1223fff] mem
1289 00:48:44.866847 PCI: 00:1e.2 10 * [0xd1224000 - 0xd1224fff] mem
1290 00:48:44.873301 PCI: 00:1e.3 10 * [0xd1225000 - 0xd1225fff] mem
1291 00:48:44.876578 PCI: 00:1f.5 10 * [0xd1226000 - 0xd1226fff] mem
1292 00:48:44.883335 PCI: 00:17.0 24 * [0xd1227000 - 0xd12277ff] mem
1293 00:48:44.886527 PCI: 00:17.0 14 * [0xd1228000 - 0xd12280ff] mem
1294 00:48:44.893355 PCI: 00:1f.4 10 * [0xd1229000 - 0xd12290ff] mem
1295 00:48:44.899721 DOMAIN: 0000 mem: next_base: d1229100 size: 11229100 align: 28 gran: 0 done
1296 00:48:44.906197 PCI: 00:1d.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
1297 00:48:44.915935 PCI: 00:1d.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
1298 00:48:44.922512 PCI: 00:1d.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff
1299 00:48:44.926005 PCI: 01:00.0 10 * [0xd1000000 - 0xd1003fff] mem
1300 00:48:44.936146 PCI: 00:1d.0 mem: next_base: d1004000 size: 100000 align: 20 gran: 20 done
1301 00:48:44.939458 Root Device assign_resources, bus 0 link: 0
1302 00:48:44.942903 DOMAIN: 0000 assign_resources, bus 0 link: 0
1303 00:48:44.952742 PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64
1304 00:48:44.959328 PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64
1305 00:48:44.968870 PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io
1306 00:48:44.975694 PCI: 00:08.0 10 <- [0x00d121c000 - 0x00d121cfff] size 0x00001000 gran 0x0c mem64
1307 00:48:44.985740 PCI: 00:12.0 10 <- [0x00d121d000 - 0x00d121dfff] size 0x00001000 gran 0x0c mem64
1308 00:48:44.991929 PCI: 00:14.0 10 <- [0x00d1200000 - 0x00d120ffff] size 0x00010000 gran 0x10 mem64
1309 00:48:44.998814 PCI: 00:14.0 assign_resources, bus 0 link: 0
1310 00:48:45.001884 PCI: 00:14.0 assign_resources, bus 0 link: 0
1311 00:48:45.012048 PCI: 00:14.2 10 <- [0x00d1218000 - 0x00d1219fff] size 0x00002000 gran 0x0d mem64
1312 00:48:45.018665 PCI: 00:14.2 18 <- [0x00d121e000 - 0x00d121efff] size 0x00001000 gran 0x0c mem64
1313 00:48:45.025123 PCI: 00:14.3 10 <- [0x00d1210000 - 0x00d1213fff] size 0x00004000 gran 0x0e mem64
1314 00:48:45.035326 PCI: 00:15.0 10 <- [0x00d121f000 - 0x00d121ffff] size 0x00001000 gran 0x0c mem64
1315 00:48:45.038872 PCI: 00:15.0 assign_resources, bus 1 link: 0
1316 00:48:45.045325 PCI: 00:15.0 assign_resources, bus 1 link: 0
1317 00:48:45.052036 PCI: 00:15.1 10 <- [0x00d1220000 - 0x00d1220fff] size 0x00001000 gran 0x0c mem64
1318 00:48:45.058798 PCI: 00:15.1 assign_resources, bus 2 link: 0
1319 00:48:45.061687 PCI: 00:15.1 assign_resources, bus 2 link: 0
1320 00:48:45.068508 PCI: 00:16.0 10 <- [0x00d1221000 - 0x00d1221fff] size 0x00001000 gran 0x0c mem64
1321 00:48:45.079086 PCI: 00:17.0 10 <- [0x00d121a000 - 0x00d121bfff] size 0x00002000 gran 0x0d mem
1322 00:48:45.085198 PCI: 00:17.0 14 <- [0x00d1228000 - 0x00d12280ff] size 0x00000100 gran 0x08 mem
1323 00:48:45.095153 PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io
1324 00:48:45.101816 PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io
1325 00:48:45.108696 PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io
1326 00:48:45.118321 PCI: 00:17.0 24 <- [0x00d1227000 - 0x00d12277ff] size 0x00000800 gran 0x0b mem
1327 00:48:45.124927 PCI: 00:19.0 10 <- [0x00d1222000 - 0x00d1222fff] size 0x00001000 gran 0x0c mem64
1328 00:48:45.128626 PCI: 00:19.0 assign_resources, bus 3 link: 0
1329 00:48:45.135322 PCI: 00:19.0 assign_resources, bus 3 link: 0
1330 00:48:45.141848 PCI: 00:1d.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io
1331 00:48:45.151791 PCI: 00:1d.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
1332 00:48:45.161721 PCI: 00:1d.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem
1333 00:48:45.165193 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1334 00:48:45.174403 PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1003fff] size 0x00004000 gran 0x0e mem64
1335 00:48:45.178150 PCI: 00:1d.0 assign_resources, bus 1 link: 0
1336 00:48:45.187500 PCI: 00:1e.0 18 <- [0x00d1223000 - 0x00d1223fff] size 0x00001000 gran 0x0c mem64
1337 00:48:45.194692 PCI: 00:1e.2 10 <- [0x00d1224000 - 0x00d1224fff] size 0x00001000 gran 0x0c mem64
1338 00:48:45.197246 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1339 00:48:45.203986 PCI: 00:1e.2 assign_resources, bus 4 link: 0
1340 00:48:45.211205 PCI: 00:1e.3 10 <- [0x00d1225000 - 0x00d1225fff] size 0x00001000 gran 0x0c mem64
1341 00:48:45.217298 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1342 00:48:45.220506 PCI: 00:1e.3 assign_resources, bus 5 link: 0
1343 00:48:45.227367 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1344 00:48:45.230642 PCI: 00:1f.0 assign_resources, bus 0 link: 0
1345 00:48:45.237023 LPC: Trying to open IO window from 800 size 1ff
1346 00:48:45.243718 PCI: 00:1f.3 10 <- [0x00d1214000 - 0x00d1217fff] size 0x00004000 gran 0x0e mem64
1347 00:48:45.253679 PCI: 00:1f.3 20 <- [0x00d1100000 - 0x00d11fffff] size 0x00100000 gran 0x14 mem64
1348 00:48:45.260316 PCI: 00:1f.4 10 <- [0x00d1229000 - 0x00d12290ff] size 0x00000100 gran 0x08 mem64
1349 00:48:45.266911 PCI: 00:1f.5 10 <- [0x00d1226000 - 0x00d1226fff] size 0x00001000 gran 0x0c mem
1350 00:48:45.274008 DOMAIN: 0000 assign_resources, bus 0 link: 0
1351 00:48:45.277534 Root Device assign_resources, bus 0 link: 0
1352 00:48:45.280206 Done setting resources.
1353 00:48:45.287272 Show resources in subtree (Root Device)...After assigning values.
1354 00:48:45.290491 Root Device child on link 0 CPU_CLUSTER: 0
1355 00:48:45.297540 CPU_CLUSTER: 0 child on link 0 APIC: 00
1356 00:48:45.297661 APIC: 00
1357 00:48:45.297752 APIC: 02
1358 00:48:45.300633 APIC: 03
1359 00:48:45.300713 APIC: 07
1360 00:48:45.300777 APIC: 01
1361 00:48:45.303982 APIC: 06
1362 00:48:45.304061 APIC: 04
1363 00:48:45.307444 APIC: 05
1364 00:48:45.310164 DOMAIN: 0000 child on link 0 PCI: 00:00.0
1365 00:48:45.320218 DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000
1366 00:48:45.330141 DOMAIN: 0000 resource base c0000000 size 11229100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100
1367 00:48:45.333388 PCI: 00:00.0
1368 00:48:45.343113 PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index 0
1369 00:48:45.350110 PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1
1370 00:48:45.359961 PCI: 00:00.0 resource base feda0000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2
1371 00:48:45.370158 PCI: 00:00.0 resource base feda1000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3
1372 00:48:45.379469 PCI: 00:00.0 resource base fc000000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4
1373 00:48:45.389780 PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5
1374 00:48:45.399901 PCI: 00:00.0 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags f0000200 index 6
1375 00:48:45.406320 PCI: 00:00.0 resource base fed90000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 7
1376 00:48:45.416399 PCI: 00:00.0 resource base fed91000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 8
1377 00:48:45.425700 PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 9
1378 00:48:45.435571 PCI: 00:00.0 resource base c0000 size 99f40000 align 0 gran 0 limit 0 flags e0004200 index a
1379 00:48:45.446105 PCI: 00:00.0 resource base 9a000000 size 1000000 align 0 gran 0 limit 0 flags f0004200 index b
1380 00:48:45.455860 PCI: 00:00.0 resource base 9b000000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index c
1381 00:48:45.465790 PCI: 00:00.0 resource base 100000000 size 35e800000 align 0 gran 0 limit 0 flags e0004200 index d
1382 00:48:45.472082 PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index e
1383 00:48:45.482613 PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index f
1384 00:48:45.485465 PCI: 00:02.0
1385 00:48:45.495092 PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10
1386 00:48:45.505037 PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18
1387 00:48:45.515224 PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20
1388 00:48:45.515322 PCI: 00:04.0
1389 00:48:45.518382 PCI: 00:08.0
1390 00:48:45.528723 PCI: 00:08.0 resource base d121c000 size 1000 align 12 gran 12 limit d121cfff flags 60000201 index 10
1391 00:48:45.528817 PCI: 00:12.0
1392 00:48:45.541813 PCI: 00:12.0 resource base d121d000 size 1000 align 12 gran 12 limit d121dfff flags 60000201 index 10
1393 00:48:45.544779 PCI: 00:14.0 child on link 0 USB0 port 0
1394 00:48:45.554661 PCI: 00:14.0 resource base d1200000 size 10000 align 16 gran 16 limit d120ffff flags 60000201 index 10
1395 00:48:45.558429 USB0 port 0 child on link 0 USB2 port 0
1396 00:48:45.561403 USB2 port 0
1397 00:48:45.561488 USB2 port 1
1398 00:48:45.564881 USB2 port 2
1399 00:48:45.564963 USB2 port 3
1400 00:48:45.568220 USB2 port 5
1401 00:48:45.571518 USB2 port 6
1402 00:48:45.571617 USB2 port 9
1403 00:48:45.574723 USB3 port 0
1404 00:48:45.574821 USB3 port 1
1405 00:48:45.577866 USB3 port 2
1406 00:48:45.577949 USB3 port 3
1407 00:48:45.581103 USB3 port 4
1408 00:48:45.581224 PCI: 00:14.2
1409 00:48:45.590984 PCI: 00:14.2 resource base d1218000 size 2000 align 13 gran 13 limit d1219fff flags 60000201 index 10
1410 00:48:45.601013 PCI: 00:14.2 resource base d121e000 size 1000 align 12 gran 12 limit d121efff flags 60000201 index 18
1411 00:48:45.604760 PCI: 00:14.3
1412 00:48:45.614527 PCI: 00:14.3 resource base d1210000 size 4000 align 14 gran 14 limit d1213fff flags 60000201 index 10
1413 00:48:45.617690 PCI: 00:15.0 child on link 0 I2C: 01:15
1414 00:48:45.627489 PCI: 00:15.0 resource base d121f000 size 1000 align 12 gran 12 limit d121ffff flags 60000201 index 10
1415 00:48:45.631030 I2C: 01:15
1416 00:48:45.634296 PCI: 00:15.1 child on link 0 I2C: 02:5d
1417 00:48:45.644039 PCI: 00:15.1 resource base d1220000 size 1000 align 12 gran 12 limit d1220fff flags 60000201 index 10
1418 00:48:45.647584 I2C: 02:5d
1419 00:48:45.647665 GENERIC: 0.0
1420 00:48:45.650734 PCI: 00:16.0
1421 00:48:45.660422 PCI: 00:16.0 resource base d1221000 size 1000 align 12 gran 12 limit d1221fff flags 60000201 index 10
1422 00:48:45.660569 PCI: 00:17.0
1423 00:48:45.673820 PCI: 00:17.0 resource base d121a000 size 2000 align 13 gran 13 limit d121bfff flags 60000200 index 10
1424 00:48:45.683573 PCI: 00:17.0 resource base d1228000 size 100 align 12 gran 8 limit d12280ff flags 60000200 index 14
1425 00:48:45.690246 PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18
1426 00:48:45.700584 PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c
1427 00:48:45.709980 PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20
1428 00:48:45.720068 PCI: 00:17.0 resource base d1227000 size 800 align 12 gran 11 limit d12277ff flags 60000200 index 24
1429 00:48:45.723263 PCI: 00:19.0 child on link 0 I2C: 03:1a
1430 00:48:45.733561 PCI: 00:19.0 resource base d1222000 size 1000 align 12 gran 12 limit d1222fff flags 60000201 index 10
1431 00:48:45.736877 I2C: 03:1a
1432 00:48:45.736983 I2C: 03:38
1433 00:48:45.740275 I2C: 03:39
1434 00:48:45.740352 I2C: 03:3a
1435 00:48:45.743475 I2C: 03:3b
1436 00:48:45.746858 PCI: 00:1d.0 child on link 0 PCI: 01:00.0
1437 00:48:45.756271 PCI: 00:1d.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c
1438 00:48:45.766176 PCI: 00:1d.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
1439 00:48:45.776504 PCI: 00:1d.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20
1440 00:48:45.779509 PCI: 01:00.0
1441 00:48:45.789443 PCI: 01:00.0 resource base d1000000 size 4000 align 14 gran 14 limit d1003fff flags 60000201 index 10
1442 00:48:45.789558 PCI: 00:1e.0
1443 00:48:45.802594 PCI: 00:1e.0 resource base fe032000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10
1444 00:48:45.812262 PCI: 00:1e.0 resource base d1223000 size 1000 align 12 gran 12 limit d1223fff flags 60000201 index 18
1445 00:48:45.816033 PCI: 00:1e.2 child on link 0 SPI: 00
1446 00:48:45.825827 PCI: 00:1e.2 resource base d1224000 size 1000 align 12 gran 12 limit d1224fff flags 60000201 index 10
1447 00:48:45.825915 SPI: 00
1448 00:48:45.832447 PCI: 00:1e.3 child on link 0 SPI: 01
1449 00:48:45.842435 PCI: 00:1e.3 resource base d1225000 size 1000 align 12 gran 12 limit d1225fff flags 60000201 index 10
1450 00:48:45.842546 SPI: 01
1451 00:48:45.848880 PCI: 00:1f.0 child on link 0 PNP: 0c09.0
1452 00:48:45.855413 PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0
1453 00:48:45.865112 PCI: 00:1f.0 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 20
1454 00:48:45.865222 PNP: 0c09.0
1455 00:48:45.875468 PNP: 0c09.0 resource base 800 size 1ff align 0 gran 0 limit 0 flags c0000100 index 0
1456 00:48:45.878569 PCI: 00:1f.3
1457 00:48:45.888247 PCI: 00:1f.3 resource base d1214000 size 4000 align 14 gran 14 limit d1217fff flags 60000201 index 10
1458 00:48:45.898642 PCI: 00:1f.3 resource base d1100000 size 100000 align 20 gran 20 limit d11fffff flags 60000201 index 20
1459 00:48:45.898725 PCI: 00:1f.4
1460 00:48:45.908121 PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20
1461 00:48:45.918215 PCI: 00:1f.4 resource base d1229000 size 100 align 12 gran 8 limit d12290ff flags 60000201 index 10
1462 00:48:45.921197 PCI: 00:1f.5
1463 00:48:45.931140 PCI: 00:1f.5 resource base d1226000 size 1000 align 12 gran 12 limit d1226fff flags 60000200 index 10
1464 00:48:45.934237 Done allocating resources.
1465 00:48:45.937969 BS: BS_DEV_RESOURCES times (ms): entry 0 run 30 exit 0
1466 00:48:45.940897 Enabling resources...
1467 00:48:45.944351 PCI: 00:00.0 subsystem <- 8086/9b61
1468 00:48:45.947777 PCI: 00:00.0 cmd <- 06
1469 00:48:45.950788 PCI: 00:02.0 subsystem <- 8086/9b41
1470 00:48:45.954748 PCI: 00:02.0 cmd <- 03
1471 00:48:45.957377 PCI: 00:08.0 cmd <- 06
1472 00:48:45.960795 PCI: 00:12.0 subsystem <- 8086/02f9
1473 00:48:45.963969 PCI: 00:12.0 cmd <- 02
1474 00:48:45.967339 PCI: 00:14.0 subsystem <- 8086/02ed
1475 00:48:45.970971 PCI: 00:14.0 cmd <- 02
1476 00:48:45.971055 PCI: 00:14.2 cmd <- 02
1477 00:48:45.977709 PCI: 00:14.3 subsystem <- 8086/02f0
1478 00:48:45.977793 PCI: 00:14.3 cmd <- 02
1479 00:48:45.984171 PCI: 00:15.0 subsystem <- 8086/02e8
1480 00:48:45.984282 PCI: 00:15.0 cmd <- 02
1481 00:48:45.987475 PCI: 00:15.1 subsystem <- 8086/02e9
1482 00:48:45.990699 PCI: 00:15.1 cmd <- 02
1483 00:48:45.994495 PCI: 00:16.0 subsystem <- 8086/02e0
1484 00:48:45.997709 PCI: 00:16.0 cmd <- 02
1485 00:48:46.000785 PCI: 00:17.0 subsystem <- 8086/02d3
1486 00:48:46.003949 PCI: 00:17.0 cmd <- 03
1487 00:48:46.007309 PCI: 00:19.0 subsystem <- 8086/02c5
1488 00:48:46.010604 PCI: 00:19.0 cmd <- 02
1489 00:48:46.013892 PCI: 00:1d.0 bridge ctrl <- 0013
1490 00:48:46.017287 PCI: 00:1d.0 subsystem <- 8086/02b0
1491 00:48:46.020701 PCI: 00:1d.0 cmd <- 06
1492 00:48:46.023921 PCI: 00:1e.0 subsystem <- 8086/02a8
1493 00:48:46.027076 PCI: 00:1e.0 cmd <- 06
1494 00:48:46.030620 PCI: 00:1e.2 subsystem <- 8086/02aa
1495 00:48:46.030807 PCI: 00:1e.2 cmd <- 06
1496 00:48:46.037611 PCI: 00:1e.3 subsystem <- 8086/02ab
1497 00:48:46.037702 PCI: 00:1e.3 cmd <- 02
1498 00:48:46.043860 PCI: 00:1f.0 subsystem <- 8086/0284
1499 00:48:46.043948 PCI: 00:1f.0 cmd <- 407
1500 00:48:46.046879 PCI: 00:1f.3 subsystem <- 8086/02c8
1501 00:48:46.050537 PCI: 00:1f.3 cmd <- 02
1502 00:48:46.053749 PCI: 00:1f.4 subsystem <- 8086/02a3
1503 00:48:46.056754 PCI: 00:1f.4 cmd <- 03
1504 00:48:46.060479 PCI: 00:1f.5 subsystem <- 8086/02a4
1505 00:48:46.063933 PCI: 00:1f.5 cmd <- 406
1506 00:48:46.072616 PCI: 01:00.0 cmd <- 02
1507 00:48:46.077857 done.
1508 00:48:46.090573 ME: Version: 14.0.39.1367
1509 00:48:46.097499 BS: BS_DEV_ENABLE times (ms): entry 0 run 17 exit 12
1510 00:48:46.100701 Initializing devices...
1511 00:48:46.100786 Root Device init ...
1512 00:48:46.107556 Chrome EC: Set SMI mask to 0x0000000000000000
1513 00:48:46.110848 Chrome EC: clear events_b mask to 0x0000000000000000
1514 00:48:46.117000 Chrome EC: Set S5 LAZY WAKE mask to 0x0000000000000006
1515 00:48:46.123756 Chrome EC: Set S3 LAZY WAKE mask to 0x0000000014001006
1516 00:48:46.130219 Chrome EC: Set S0iX LAZY WAKE mask to 0x0000000014081006
1517 00:48:46.133797 Chrome EC: Set WAKE mask to 0x0000000000000000
1518 00:48:46.137109 Root Device init finished in 35212 usecs
1519 00:48:46.140792 CPU_CLUSTER: 0 init ...
1520 00:48:46.146967 CPU_CLUSTER: 0 init finished in 2447 usecs
1521 00:48:46.151730 PCI: 00:00.0 init ...
1522 00:48:46.154895 CPU TDP: 15 Watts
1523 00:48:46.158396 CPU PL2 = 64 Watts
1524 00:48:46.161443 PCI: 00:00.0 init finished in 7083 usecs
1525 00:48:46.164586 PCI: 00:02.0 init ...
1526 00:48:46.168488 PCI: 00:02.0 init finished in 2253 usecs
1527 00:48:46.171622 PCI: 00:08.0 init ...
1528 00:48:46.174943 PCI: 00:08.0 init finished in 2252 usecs
1529 00:48:46.178091 PCI: 00:12.0 init ...
1530 00:48:46.181284 PCI: 00:12.0 init finished in 2252 usecs
1531 00:48:46.184480 PCI: 00:14.0 init ...
1532 00:48:46.187829 PCI: 00:14.0 init finished in 2243 usecs
1533 00:48:46.191547 PCI: 00:14.2 init ...
1534 00:48:46.194788 PCI: 00:14.2 init finished in 2254 usecs
1535 00:48:46.197966 PCI: 00:14.3 init ...
1536 00:48:46.201158 PCI: 00:14.3 init finished in 2270 usecs
1537 00:48:46.205107 PCI: 00:15.0 init ...
1538 00:48:46.208124 DW I2C bus 0 at 0xd121f000 (400 KHz)
1539 00:48:46.211248 PCI: 00:15.0 init finished in 5970 usecs
1540 00:48:46.214813 PCI: 00:15.1 init ...
1541 00:48:46.218038 DW I2C bus 1 at 0xd1220000 (400 KHz)
1542 00:48:46.221064 PCI: 00:15.1 init finished in 5979 usecs
1543 00:48:46.224932 PCI: 00:16.0 init ...
1544 00:48:46.228255 PCI: 00:16.0 init finished in 2244 usecs
1545 00:48:46.232130 PCI: 00:19.0 init ...
1546 00:48:46.235349 DW I2C bus 4 at 0xd1222000 (400 KHz)
1547 00:48:46.241542 PCI: 00:19.0 init finished in 5977 usecs
1548 00:48:46.241639 PCI: 00:1d.0 init ...
1549 00:48:46.245550 Initializing PCH PCIe bridge.
1550 00:48:46.248556 PCI: 00:1d.0 init finished in 5286 usecs
1551 00:48:46.253407 PCI: 00:1f.0 init ...
1552 00:48:46.256364 IOAPIC: Initializing IOAPIC at 0xfec00000
1553 00:48:46.263611 IOAPIC: Bootstrap Processor Local APIC = 0x00
1554 00:48:46.263719 IOAPIC: ID = 0x02
1555 00:48:46.266508 IOAPIC: Dumping registers
1556 00:48:46.269732 reg 0x0000: 0x02000000
1557 00:48:46.273419 reg 0x0001: 0x00770020
1558 00:48:46.273503 reg 0x0002: 0x00000000
1559 00:48:46.279905 PCI: 00:1f.0 init finished in 23543 usecs
1560 00:48:46.283800 PCI: 00:1f.4 init ...
1561 00:48:46.287092 PCI: 00:1f.4 init finished in 2263 usecs
1562 00:48:46.298004 PCI: 01:00.0 init ...
1563 00:48:46.301214 PCI: 01:00.0 init finished in 2252 usecs
1564 00:48:46.304945 PNP: 0c09.0 init ...
1565 00:48:46.308764 Google Chrome EC uptime: 11.098 seconds
1566 00:48:46.314969 Google Chrome AP resets since EC boot: 0
1567 00:48:46.318161 Google Chrome most recent AP reset causes:
1568 00:48:46.324971 Google Chrome EC reset flags at last EC boot: reset-pin
1569 00:48:46.328757 PNP: 0c09.0 init finished in 20605 usecs
1570 00:48:46.331411 Devices initialized
1571 00:48:46.335231 Show all devs... After init.
1572 00:48:46.335315 Root Device: enabled 1
1573 00:48:46.338482 CPU_CLUSTER: 0: enabled 1
1574 00:48:46.341832 DOMAIN: 0000: enabled 1
1575 00:48:46.341916 APIC: 00: enabled 1
1576 00:48:46.344803 PCI: 00:00.0: enabled 1
1577 00:48:46.348172 PCI: 00:02.0: enabled 1
1578 00:48:46.351508 PCI: 00:04.0: enabled 0
1579 00:48:46.351595 PCI: 00:05.0: enabled 0
1580 00:48:46.354579 PCI: 00:12.0: enabled 1
1581 00:48:46.358308 PCI: 00:12.5: enabled 0
1582 00:48:46.361727 PCI: 00:12.6: enabled 0
1583 00:48:46.361810 PCI: 00:14.0: enabled 1
1584 00:48:46.365095 PCI: 00:14.1: enabled 0
1585 00:48:46.368130 PCI: 00:14.3: enabled 1
1586 00:48:46.368214 PCI: 00:14.5: enabled 0
1587 00:48:46.371191 PCI: 00:15.0: enabled 1
1588 00:48:46.375051 PCI: 00:15.1: enabled 1
1589 00:48:46.378130 PCI: 00:15.2: enabled 0
1590 00:48:46.378213 PCI: 00:15.3: enabled 0
1591 00:48:46.381131 PCI: 00:16.0: enabled 1
1592 00:48:46.385007 PCI: 00:16.1: enabled 0
1593 00:48:46.387996 PCI: 00:16.2: enabled 0
1594 00:48:46.388079 PCI: 00:16.3: enabled 0
1595 00:48:46.391250 PCI: 00:16.4: enabled 0
1596 00:48:46.394686 PCI: 00:16.5: enabled 0
1597 00:48:46.397646 PCI: 00:17.0: enabled 1
1598 00:48:46.397729 PCI: 00:19.0: enabled 1
1599 00:48:46.401456 PCI: 00:19.1: enabled 0
1600 00:48:46.404532 PCI: 00:19.2: enabled 0
1601 00:48:46.404615 PCI: 00:1a.0: enabled 0
1602 00:48:46.407684 PCI: 00:1c.0: enabled 0
1603 00:48:46.411378 PCI: 00:1c.1: enabled 0
1604 00:48:46.414608 PCI: 00:1c.2: enabled 0
1605 00:48:46.414690 PCI: 00:1c.3: enabled 0
1606 00:48:46.417878 PCI: 00:1c.4: enabled 0
1607 00:48:46.420873 PCI: 00:1c.5: enabled 0
1608 00:48:46.424554 PCI: 00:1c.6: enabled 0
1609 00:48:46.424636 PCI: 00:1c.7: enabled 0
1610 00:48:46.427792 PCI: 00:1d.0: enabled 1
1611 00:48:46.430859 PCI: 00:1d.1: enabled 0
1612 00:48:46.434655 PCI: 00:1d.2: enabled 0
1613 00:48:46.434754 PCI: 00:1d.3: enabled 0
1614 00:48:46.437490 PCI: 00:1d.4: enabled 0
1615 00:48:46.440850 PCI: 00:1d.5: enabled 0
1616 00:48:46.444082 PCI: 00:1e.0: enabled 1
1617 00:48:46.444165 PCI: 00:1e.1: enabled 0
1618 00:48:46.447171 PCI: 00:1e.2: enabled 1
1619 00:48:46.451124 PCI: 00:1e.3: enabled 1
1620 00:48:46.451207 PCI: 00:1f.0: enabled 1
1621 00:48:46.454208 PCI: 00:1f.1: enabled 0
1622 00:48:46.457380 PCI: 00:1f.2: enabled 0
1623 00:48:46.460573 PCI: 00:1f.3: enabled 1
1624 00:48:46.460682 PCI: 00:1f.4: enabled 1
1625 00:48:46.464139 PCI: 00:1f.5: enabled 1
1626 00:48:46.467238 PCI: 00:1f.6: enabled 0
1627 00:48:46.470353 USB0 port 0: enabled 1
1628 00:48:46.470455 I2C: 01:15: enabled 1
1629 00:48:46.474126 I2C: 02:5d: enabled 1
1630 00:48:46.477364 GENERIC: 0.0: enabled 1
1631 00:48:46.477437 I2C: 03:1a: enabled 1
1632 00:48:46.480771 I2C: 03:38: enabled 1
1633 00:48:46.483904 I2C: 03:39: enabled 1
1634 00:48:46.483976 I2C: 03:3a: enabled 1
1635 00:48:46.487432 I2C: 03:3b: enabled 1
1636 00:48:46.490701 PCI: 00:00.0: enabled 1
1637 00:48:46.490784 SPI: 00: enabled 1
1638 00:48:46.493999 SPI: 01: enabled 1
1639 00:48:46.497155 PNP: 0c09.0: enabled 1
1640 00:48:46.497237 USB2 port 0: enabled 1
1641 00:48:46.500755 USB2 port 1: enabled 1
1642 00:48:46.503534 USB2 port 2: enabled 0
1643 00:48:46.503617 USB2 port 3: enabled 0
1644 00:48:46.506746 USB2 port 5: enabled 0
1645 00:48:46.510622 USB2 port 6: enabled 1
1646 00:48:46.513700 USB2 port 9: enabled 1
1647 00:48:46.513782 USB3 port 0: enabled 1
1648 00:48:46.516923 USB3 port 1: enabled 1
1649 00:48:46.520062 USB3 port 2: enabled 1
1650 00:48:46.520162 USB3 port 3: enabled 1
1651 00:48:46.523963 USB3 port 4: enabled 0
1652 00:48:46.527153 APIC: 02: enabled 1
1653 00:48:46.527234 APIC: 03: enabled 1
1654 00:48:46.530221 APIC: 07: enabled 1
1655 00:48:46.533526 APIC: 01: enabled 1
1656 00:48:46.533608 APIC: 06: enabled 1
1657 00:48:46.536687 APIC: 04: enabled 1
1658 00:48:46.536768 APIC: 05: enabled 1
1659 00:48:46.540213 PCI: 00:08.0: enabled 1
1660 00:48:46.543322 PCI: 00:14.2: enabled 1
1661 00:48:46.546447 PCI: 01:00.0: enabled 1
1662 00:48:46.550235 Disabling ACPI via APMC:
1663 00:48:46.550316 done.
1664 00:48:46.557348 FMAP: area RW_ELOG found @ af0000 (16384 bytes)
1665 00:48:46.559892 ELOG: NV offset 0xaf0000 size 0x4000
1666 00:48:46.566840 ELOG: area is 4096 bytes, full threshold 3842, shrink size 1024
1667 00:48:46.573447 ELOG: Event(17) added with size 13 at 2023-05-23 00:48:46 UTC
1668 00:48:46.580277 POST: Unexpected post code in previous boot: 0x73
1669 00:48:46.586469 ELOG: Event(A3) added with size 11 at 2023-05-23 00:48:46 UTC
1670 00:48:46.593207 ELOG: Event(A6) added with size 13 at 2023-05-23 00:48:46 UTC
1671 00:48:46.599690 ELOG: Event(92) added with size 9 at 2023-05-23 00:48:46 UTC
1672 00:48:46.602984 ELOG: Event(93) added with size 9 at 2023-05-23 00:48:46 UTC
1673 00:48:46.609959 ELOG: Event(9A) added with size 9 at 2023-05-23 00:48:46 UTC
1674 00:48:46.616881 ELOG: Event(9E) added with size 10 at 2023-05-23 00:48:46 UTC
1675 00:48:46.623350 ELOG: Event(9F) added with size 14 at 2023-05-23 00:48:46 UTC
1676 00:48:46.629633 BS: BS_DEV_INIT times (ms): entry 0 run 28 exit 6
1677 00:48:46.636535 ELOG: Event(A1) added with size 10 at 2023-05-23 00:48:46 UTC
1678 00:48:46.642797 elog_add_boot_reason: Logged recovery mode boot (Dev-switch on), reason: 0x1b
1679 00:48:46.649634 ELOG: Event(A0) added with size 9 at 2023-05-23 00:48:46 UTC
1680 00:48:46.652984 elog_add_boot_reason: Logged dev mode boot
1681 00:48:46.656164 Finalize devices...
1682 00:48:46.659783 PCI: 00:17.0 final
1683 00:48:46.659885 Devices finalized
1684 00:48:46.666591 FMAP: area RW_NVRAM found @ afa000 (24576 bytes)
1685 00:48:46.669783 BS: BS_POST_DEVICE times (ms): entry 1 run 0 exit 0
1686 00:48:46.676156 ME: HFSTS1 : 0x90000245
1687 00:48:46.679435 ME: HFSTS2 : 0x3B850126
1688 00:48:46.683060 ME: HFSTS3 : 0x00000020
1689 00:48:46.685993 ME: HFSTS4 : 0x00004800
1690 00:48:46.689728 ME: HFSTS5 : 0x00000000
1691 00:48:46.696077 ME: HFSTS6 : 0x40400006
1692 00:48:46.699478 ME: Manufacturing Mode : NO
1693 00:48:46.702639 ME: FW Partition Table : OK
1694 00:48:46.706573 ME: Bringup Loader Failure : NO
1695 00:48:46.709744 ME: Firmware Init Complete : YES
1696 00:48:46.712776 ME: Boot Options Present : NO
1697 00:48:46.716168 ME: Update In Progress : NO
1698 00:48:46.719480 ME: D0i3 Support : YES
1699 00:48:46.722591 ME: Low Power State Enabled : NO
1700 00:48:46.725860 ME: CPU Replaced : NO
1701 00:48:46.729527 ME: CPU Replacement Valid : YES
1702 00:48:46.732808 ME: Current Working State : 5
1703 00:48:46.736012 ME: Current Operation State : 1
1704 00:48:46.739204 ME: Current Operation Mode : 0
1705 00:48:46.742276 ME: Error Code : 0
1706 00:48:46.745981 ME: CPU Debug Disabled : YES
1707 00:48:46.749143 ME: TXT Support : NO
1708 00:48:46.752270 BS: BS_OS_RESUME_CHECK times (ms): entry 0 run 0 exit 0
1709 00:48:46.759153 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1710 00:48:46.762339 CBFS @ c08000 size 3f8000
1711 00:48:46.768908 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1712 00:48:46.772047 CBFS: Locating 'fallback/dsdt.aml'
1713 00:48:46.775309 CBFS: Found @ offset 10bb80 size 3fa5
1714 00:48:46.779013 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1715 00:48:46.781986 CBFS @ c08000 size 3f8000
1716 00:48:46.788752 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1717 00:48:46.791756 CBFS: Locating 'fallback/slic'
1718 00:48:46.795266 CBFS: 'fallback/slic' not found.
1719 00:48:46.801818 ACPI: Writing ACPI tables at 99b3e000.
1720 00:48:46.801927 ACPI: * FACS
1721 00:48:46.805389 ACPI: * DSDT
1722 00:48:46.808359 Ramoops buffer: 0x100000@0x99a3d000.
1723 00:48:46.812116 FMAP: area RO_VPD found @ c00000 (16384 bytes)
1724 00:48:46.818414 FMAP: area RW_VPD found @ af8000 (8192 bytes)
1725 00:48:46.821638 Google Chrome EC: version:
1726 00:48:46.824960 ro: helios_v2.0.2659-56403530b
1727 00:48:46.828527 rw: helios_v2.0.2849-c41de27e7d
1728 00:48:46.828613 running image: 1
1729 00:48:46.832474 ACPI: * FADT
1730 00:48:46.832558 SCI is IRQ9
1731 00:48:46.839067 ACPI: added table 1/32, length now 40
1732 00:48:46.839152 ACPI: * SSDT
1733 00:48:46.842947 Found 1 CPU(s) with 8 core(s) each.
1734 00:48:46.846028 Error: Could not locate 'wifi_sar' in VPD.
1735 00:48:46.852955 Checking CBFS for default SAR values
1736 00:48:46.856211 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1737 00:48:46.859380 CBFS @ c08000 size 3f8000
1738 00:48:46.866243 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1739 00:48:46.869449 CBFS: Locating 'wifi_sar_defaults.hex'
1740 00:48:46.872706 CBFS: Found @ offset 5fac0 size 77
1741 00:48:46.875904 \_SB.PCI0.WFA3: Intel WiFi PCI: 00:14.3
1742 00:48:46.882458 \_SB.PCI0.I2C0.D015: ELAN Touchpad at I2C: 01:15
1743 00:48:46.885545 \_SB.PCI0.I2C1.H05D: Goodix Touchscreen at I2C: 02:5d
1744 00:48:46.892507 \_SB.PCI0.I2C4.RT58: Realtek RT5682 at I2C: 03:1a
1745 00:48:46.895503 failed to find key in VPD: dsm_calib_r0_0
1746 00:48:46.905786 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_0 and dsm_calib_temp_0
1747 00:48:46.909213 \_SB.PCI0.I2C4.RTWL: Realtek RT1011 Codec address 038h
1748 00:48:46.912484 failed to find key in VPD: dsm_calib_r0_1
1749 00:48:46.922337 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_1 and dsm_calib_temp_0
1750 00:48:46.928672 \_SB.PCI0.I2C4.RTWR: Realtek RT1011 Codec address 039h
1751 00:48:46.931887 failed to find key in VPD: dsm_calib_r0_2
1752 00:48:46.942252 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_2 and dsm_calib_temp_0
1753 00:48:46.945421 \_SB.PCI0.I2C4.RTTL: Realtek RT1011 Codec address 03ah
1754 00:48:46.951798 failed to find key in VPD: dsm_calib_r0_3
1755 00:48:46.958557 Failed to get dsm_calib parameters from VPD with key dsm_calib_r0_3 and dsm_calib_temp_0
1756 00:48:46.964917 \_SB.PCI0.I2C4.RTTR: Realtek RT1011 Codec address 03bh
1757 00:48:46.968229 \_SB.PCI0.SPI0.S001: SPI Device at SPI: 00
1758 00:48:46.971490 \_SB.PCI0.SPI1.CRFP: SPI Device at SPI: 01
1759 00:48:46.975862 EC returned error result code 1
1760 00:48:46.979663 EC returned error result code 1
1761 00:48:46.982892 EC returned error result code 1
1762 00:48:46.990033 PS2K: Bad resp from EC. Vivaldi disabled!
1763 00:48:46.993221 \_SB.PCI0.XHCI.RHUB.HS01: Left Type-C Port at USB2 port 0
1764 00:48:46.999999 \_SB.PCI0.XHCI.RHUB.HS02: Right Type-C Port 1 at USB2 port 1
1765 00:48:47.006348 \_SB.PCI0.XHCI.RHUB.HS07: Camera at USB2 port 6
1766 00:48:47.009962 \_SB.PCI0.XHCI.RHUB.HS10: Bluetooth at USB2 port 9
1767 00:48:47.016101 \_SB.PCI0.XHCI.RHUB.SS01: Left Type-C Port at USB3 port 0
1768 00:48:47.022850 \_SB.PCI0.XHCI.RHUB.SS02: Right Type-C Port 1 at USB3 port 1
1769 00:48:47.029775 \_SB.PCI0.XHCI.RHUB.SS03: Left Type-A Port at USB3 port 2
1770 00:48:47.032870 \_SB.PCI0.XHCI.RHUB.SS04: Right Type-A Port 1 at USB3 port 3
1771 00:48:47.039316 ACPI: added table 2/32, length now 44
1772 00:48:47.039400 ACPI: * MCFG
1773 00:48:47.042552 ACPI: added table 3/32, length now 48
1774 00:48:47.045738 ACPI: * TPM2
1775 00:48:47.049821 TPM2 log created at 99a2d000
1776 00:48:47.052831 ACPI: added table 4/32, length now 52
1777 00:48:47.052915 ACPI: * MADT
1778 00:48:47.055947 SCI is IRQ9
1779 00:48:47.059136 ACPI: added table 5/32, length now 56
1780 00:48:47.059220 current = 99b43ac0
1781 00:48:47.062215 ACPI: * DMAR
1782 00:48:47.065904 ACPI: added table 6/32, length now 60
1783 00:48:47.068879 ACPI: * IGD OpRegion
1784 00:48:47.068964 GMA: Found VBT in CBFS
1785 00:48:47.072457 GMA: Found valid VBT in CBFS
1786 00:48:47.075806 ACPI: added table 7/32, length now 64
1787 00:48:47.078939 ACPI: * HPET
1788 00:48:47.082871 ACPI: added table 8/32, length now 68
1789 00:48:47.085778 ACPI: done.
1790 00:48:47.085860 ACPI tables: 31744 bytes.
1791 00:48:47.089426 smbios_write_tables: 99a2c000
1792 00:48:47.092824 EC returned error result code 3
1793 00:48:47.096131 Couldn't obtain OEM name from CBI
1794 00:48:47.099275 Create SMBIOS type 17
1795 00:48:47.102805 PCI: 00:00.0 (Intel Cannonlake)
1796 00:48:47.106215 PCI: 00:14.3 (Intel WiFi)
1797 00:48:47.109294 SMBIOS tables: 939 bytes.
1798 00:48:47.112276 Writing table forward entry at 0x00000500
1799 00:48:47.119119 Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4628
1800 00:48:47.122226 Writing coreboot table at 0x99b62000
1801 00:48:47.128927 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
1802 00:48:47.131999 1. 0000000000001000-000000000009ffff: RAM
1803 00:48:47.135852 2. 00000000000a0000-00000000000fffff: RESERVED
1804 00:48:47.142215 3. 0000000000100000-0000000099a2bfff: RAM
1805 00:48:47.149104 4. 0000000099a2c000-0000000099baffff: CONFIGURATION TABLES
1806 00:48:47.151874 5. 0000000099bb0000-0000000099c0afff: RAMSTAGE
1807 00:48:47.159076 6. 0000000099c0b000-0000000099ffffff: CONFIGURATION TABLES
1808 00:48:47.162321 7. 000000009a000000-000000009f7fffff: RESERVED
1809 00:48:47.168630 8. 00000000e0000000-00000000efffffff: RESERVED
1810 00:48:47.171750 9. 00000000fc000000-00000000fc000fff: RESERVED
1811 00:48:47.178545 10. 00000000fe000000-00000000fe00ffff: RESERVED
1812 00:48:47.181873 11. 00000000fed10000-00000000fed17fff: RESERVED
1813 00:48:47.185228 12. 00000000fed80000-00000000fed83fff: RESERVED
1814 00:48:47.191944 13. 00000000fed90000-00000000fed91fff: RESERVED
1815 00:48:47.194977 14. 00000000feda0000-00000000feda1fff: RESERVED
1816 00:48:47.201435 15. 0000000100000000-000000045e7fffff: RAM
1817 00:48:47.205334 Graphics framebuffer located at 0xc0000000
1818 00:48:47.208873 Passing 5 GPIOs to payload:
1819 00:48:47.211459 NAME | PORT | POLARITY | VALUE
1820 00:48:47.218337 write protect | undefined | high | low
1821 00:48:47.221802 lid | undefined | high | high
1822 00:48:47.228257 power | undefined | high | low
1823 00:48:47.234915 oprom | undefined | high | low
1824 00:48:47.238008 EC in RW | 0x000000cb | high | low
1825 00:48:47.241797 Board ID: 4
1826 00:48:47.245009 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1827 00:48:47.248283 CBFS @ c08000 size 3f8000
1828 00:48:47.254658 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1829 00:48:47.261194 Wrote coreboot table at: 99b62000, 0x5bc bytes, checksum 4d87
1830 00:48:47.261278 coreboot table: 1492 bytes.
1831 00:48:47.264925 IMD ROOT 0. 99fff000 00001000
1832 00:48:47.268086 IMD SMALL 1. 99ffe000 00001000
1833 00:48:47.271480 FSP MEMORY 2. 99c4e000 003b0000
1834 00:48:47.274556 CONSOLE 3. 99c2e000 00020000
1835 00:48:47.277791 FMAP 4. 99c2d000 0000054e
1836 00:48:47.281541 TIME STAMP 5. 99c2c000 00000910
1837 00:48:47.284628 VBOOT WORK 6. 99c18000 00014000
1838 00:48:47.287865 MRC DATA 7. 99c16000 00001958
1839 00:48:47.291561 ROMSTG STCK 8. 99c15000 00001000
1840 00:48:47.294690 AFTER CAR 9. 99c0b000 0000a000
1841 00:48:47.298041 RAMSTAGE 10. 99baf000 0005c000
1842 00:48:47.301527 REFCODE 11. 99b7a000 00035000
1843 00:48:47.304639 SMM BACKUP 12. 99b6a000 00010000
1844 00:48:47.307819 COREBOOT 13. 99b62000 00008000
1845 00:48:47.311451 ACPI 14. 99b3e000 00024000
1846 00:48:47.314691 ACPI GNVS 15. 99b3d000 00001000
1847 00:48:47.317754 RAMOOPS 16. 99a3d000 00100000
1848 00:48:47.321353 TPM2 TCGLOG17. 99a2d000 00010000
1849 00:48:47.324512 SMBIOS 18. 99a2c000 00000800
1850 00:48:47.328194 IMD small region:
1851 00:48:47.331147 IMD ROOT 0. 99ffec00 00000400
1852 00:48:47.334506 FSP RUNTIME 1. 99ffebe0 00000004
1853 00:48:47.337695 EC HOSTEVENT 2. 99ffebc0 00000008
1854 00:48:47.341223 POWER STATE 3. 99ffeb80 00000040
1855 00:48:47.344323 ROMSTAGE 4. 99ffeb60 00000004
1856 00:48:47.348028 MEM INFO 5. 99ffe9a0 000001b9
1857 00:48:47.351162 VPD 6. 99ffe920 0000006c
1858 00:48:47.354511 MTRR: Physical address space:
1859 00:48:47.361156 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6
1860 00:48:47.367693 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0
1861 00:48:47.374051 0x00000000000c0000 - 0x000000009b000000 size 0x9af40000 type 6
1862 00:48:47.381051 0x000000009b000000 - 0x00000000c0000000 size 0x25000000 type 0
1863 00:48:47.387395 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1
1864 00:48:47.394355 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0
1865 00:48:47.400920 0x0000000100000000 - 0x000000045e800000 size 0x35e800000 type 6
1866 00:48:47.404083 MTRR: Fixed MSR 0x250 0x0606060606060606
1867 00:48:47.407263 MTRR: Fixed MSR 0x258 0x0606060606060606
1868 00:48:47.410868 MTRR: Fixed MSR 0x259 0x0000000000000000
1869 00:48:47.414135 MTRR: Fixed MSR 0x268 0x0606060606060606
1870 00:48:47.420354 MTRR: Fixed MSR 0x269 0x0606060606060606
1871 00:48:47.424097 MTRR: Fixed MSR 0x26a 0x0606060606060606
1872 00:48:47.427118 MTRR: Fixed MSR 0x26b 0x0606060606060606
1873 00:48:47.430227 MTRR: Fixed MSR 0x26c 0x0606060606060606
1874 00:48:47.437057 MTRR: Fixed MSR 0x26d 0x0606060606060606
1875 00:48:47.440684 MTRR: Fixed MSR 0x26e 0x0606060606060606
1876 00:48:47.443728 MTRR: Fixed MSR 0x26f 0x0606060606060606
1877 00:48:47.447324 call enable_fixed_mtrr()
1878 00:48:47.450348 CPU physical address size: 39 bits
1879 00:48:47.456740 MTRR: default type WB/UC MTRR counts: 6/8.
1880 00:48:47.460654 MTRR: WB selected as default type.
1881 00:48:47.463941 MTRR: 0 base 0x000000009b000000 mask 0x0000007fff000000 type 0
1882 00:48:47.469898 MTRR: 1 base 0x000000009c000000 mask 0x0000007ffc000000 type 0
1883 00:48:47.477201 MTRR: 2 base 0x00000000a0000000 mask 0x0000007fe0000000 type 0
1884 00:48:47.483390 MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1
1885 00:48:47.490032 MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0
1886 00:48:47.496563 MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0
1887 00:48:47.500316 MTRR: Fixed MSR 0x250 0x0606060606060606
1888 00:48:47.506515 MTRR: Fixed MSR 0x258 0x0606060606060606
1889 00:48:47.509753 MTRR: Fixed MSR 0x259 0x0000000000000000
1890 00:48:47.513043 MTRR: Fixed MSR 0x268 0x0606060606060606
1891 00:48:47.516195 MTRR: Fixed MSR 0x269 0x0606060606060606
1892 00:48:47.522792 MTRR: Fixed MSR 0x26a 0x0606060606060606
1893 00:48:47.526614 MTRR: Fixed MSR 0x26b 0x0606060606060606
1894 00:48:47.529702 MTRR: Fixed MSR 0x26c 0x0606060606060606
1895 00:48:47.532823 MTRR: Fixed MSR 0x26d 0x0606060606060606
1896 00:48:47.539615 MTRR: Fixed MSR 0x26e 0x0606060606060606
1897 00:48:47.543496 MTRR: Fixed MSR 0x26f 0x0606060606060606
1898 00:48:47.543628
1899 00:48:47.543697 MTRR check
1900 00:48:47.546536 Fixed MTRRs : Enabled
1901 00:48:47.549628 Variable MTRRs: Enabled
1902 00:48:47.549727
1903 00:48:47.552577 call enable_fixed_mtrr()
1904 00:48:47.556170 BS: BS_WRITE_TABLES times (ms): entry 0 run 9 exit 2
1905 00:48:47.559698 CPU physical address size: 39 bits
1906 00:48:47.566309 FMAP: area COREBOOT found @ c08000 (4161536 bytes)
1907 00:48:47.569502 MTRR: Fixed MSR 0x250 0x0606060606060606
1908 00:48:47.572846 MTRR: Fixed MSR 0x250 0x0606060606060606
1909 00:48:47.579360 MTRR: Fixed MSR 0x258 0x0606060606060606
1910 00:48:47.582581 MTRR: Fixed MSR 0x259 0x0000000000000000
1911 00:48:47.586315 MTRR: Fixed MSR 0x268 0x0606060606060606
1912 00:48:47.589807 MTRR: Fixed MSR 0x269 0x0606060606060606
1913 00:48:47.596189 MTRR: Fixed MSR 0x26a 0x0606060606060606
1914 00:48:47.599170 MTRR: Fixed MSR 0x26b 0x0606060606060606
1915 00:48:47.602372 MTRR: Fixed MSR 0x26c 0x0606060606060606
1916 00:48:47.605872 MTRR: Fixed MSR 0x26d 0x0606060606060606
1917 00:48:47.609278 MTRR: Fixed MSR 0x26e 0x0606060606060606
1918 00:48:47.615762 MTRR: Fixed MSR 0x26f 0x0606060606060606
1919 00:48:47.619053 MTRR: Fixed MSR 0x258 0x0606060606060606
1920 00:48:47.622147 call enable_fixed_mtrr()
1921 00:48:47.625432 MTRR: Fixed MSR 0x259 0x0000000000000000
1922 00:48:47.629104 MTRR: Fixed MSR 0x268 0x0606060606060606
1923 00:48:47.635644 MTRR: Fixed MSR 0x269 0x0606060606060606
1924 00:48:47.639219 MTRR: Fixed MSR 0x26a 0x0606060606060606
1925 00:48:47.642440 MTRR: Fixed MSR 0x26b 0x0606060606060606
1926 00:48:47.645355 MTRR: Fixed MSR 0x26c 0x0606060606060606
1927 00:48:47.649060 MTRR: Fixed MSR 0x26d 0x0606060606060606
1928 00:48:47.655341 MTRR: Fixed MSR 0x26e 0x0606060606060606
1929 00:48:47.658971 MTRR: Fixed MSR 0x26f 0x0606060606060606
1930 00:48:47.662024 CPU physical address size: 39 bits
1931 00:48:47.665628 call enable_fixed_mtrr()
1932 00:48:47.668918 CBFS @ c08000 size 3f8000
1933 00:48:47.675366 CBFS: 'COREBOOT Locator' located CBFS at [c08000:1000000)
1934 00:48:47.678528 MTRR: Fixed MSR 0x250 0x0606060606060606
1935 00:48:47.681852 MTRR: Fixed MSR 0x250 0x0606060606060606
1936 00:48:47.685057 MTRR: Fixed MSR 0x258 0x0606060606060606
1937 00:48:47.688755 MTRR: Fixed MSR 0x259 0x0000000000000000
1938 00:48:47.695123 MTRR: Fixed MSR 0x268 0x0606060606060606
1939 00:48:47.698439 MTRR: Fixed MSR 0x269 0x0606060606060606
1940 00:48:47.701780 MTRR: Fixed MSR 0x26a 0x0606060606060606
1941 00:48:47.705712 MTRR: Fixed MSR 0x26b 0x0606060606060606
1942 00:48:47.711763 MTRR: Fixed MSR 0x26c 0x0606060606060606
1943 00:48:47.714941 MTRR: Fixed MSR 0x26d 0x0606060606060606
1944 00:48:47.718732 MTRR: Fixed MSR 0x26e 0x0606060606060606
1945 00:48:47.722068 MTRR: Fixed MSR 0x26f 0x0606060606060606
1946 00:48:47.728478 MTRR: Fixed MSR 0x258 0x0606060606060606
1947 00:48:47.732186 MTRR: Fixed MSR 0x259 0x0000000000000000
1948 00:48:47.735449 MTRR: Fixed MSR 0x268 0x0606060606060606
1949 00:48:47.738557 MTRR: Fixed MSR 0x269 0x0606060606060606
1950 00:48:47.745286 MTRR: Fixed MSR 0x26a 0x0606060606060606
1951 00:48:47.748440 MTRR: Fixed MSR 0x26b 0x0606060606060606
1952 00:48:47.751525 MTRR: Fixed MSR 0x26c 0x0606060606060606
1953 00:48:47.755218 MTRR: Fixed MSR 0x26d 0x0606060606060606
1954 00:48:47.758333 MTRR: Fixed MSR 0x26e 0x0606060606060606
1955 00:48:47.764976 MTRR: Fixed MSR 0x26f 0x0606060606060606
1956 00:48:47.768489 call enable_fixed_mtrr()
1957 00:48:47.768602 call enable_fixed_mtrr()
1958 00:48:47.771612 CPU physical address size: 39 bits
1959 00:48:47.778009 CPU physical address size: 39 bits
1960 00:48:47.781231 MTRR: Fixed MSR 0x250 0x0606060606060606
1961 00:48:47.785029 MTRR: Fixed MSR 0x250 0x0606060606060606
1962 00:48:47.788236 MTRR: Fixed MSR 0x258 0x0606060606060606
1963 00:48:47.794576 MTRR: Fixed MSR 0x259 0x0000000000000000
1964 00:48:47.797814 MTRR: Fixed MSR 0x268 0x0606060606060606
1965 00:48:47.800985 MTRR: Fixed MSR 0x269 0x0606060606060606
1966 00:48:47.804262 MTRR: Fixed MSR 0x26a 0x0606060606060606
1967 00:48:47.811269 MTRR: Fixed MSR 0x26b 0x0606060606060606
1968 00:48:47.814443 MTRR: Fixed MSR 0x26c 0x0606060606060606
1969 00:48:47.817489 MTRR: Fixed MSR 0x26d 0x0606060606060606
1970 00:48:47.820795 MTRR: Fixed MSR 0x26e 0x0606060606060606
1971 00:48:47.824580 MTRR: Fixed MSR 0x26f 0x0606060606060606
1972 00:48:47.831007 MTRR: Fixed MSR 0x258 0x0606060606060606
1973 00:48:47.834316 MTRR: Fixed MSR 0x259 0x0000000000000000
1974 00:48:47.837522 MTRR: Fixed MSR 0x268 0x0606060606060606
1975 00:48:47.844313 MTRR: Fixed MSR 0x269 0x0606060606060606
1976 00:48:47.847473 MTRR: Fixed MSR 0x26a 0x0606060606060606
1977 00:48:47.850586 MTRR: Fixed MSR 0x26b 0x0606060606060606
1978 00:48:47.853740 MTRR: Fixed MSR 0x26c 0x0606060606060606
1979 00:48:47.857465 MTRR: Fixed MSR 0x26d 0x0606060606060606
1980 00:48:47.864174 MTRR: Fixed MSR 0x26e 0x0606060606060606
1981 00:48:47.867479 MTRR: Fixed MSR 0x26f 0x0606060606060606
1982 00:48:47.870193 call enable_fixed_mtrr()
1983 00:48:47.873809 call enable_fixed_mtrr()
1984 00:48:47.876887 CPU physical address size: 39 bits
1985 00:48:47.880662 CPU physical address size: 39 bits
1986 00:48:47.883855 CBFS: Locating 'fallback/payload'
1987 00:48:47.887177 CPU physical address size: 39 bits
1988 00:48:47.890405 CBFS: Found @ offset 1c96c0 size 3f798
1989 00:48:47.893663 Checking segment from ROM address 0xffdd16f8
1990 00:48:47.899929 Checking segment from ROM address 0xffdd1714
1991 00:48:47.903786 Loading segment from ROM address 0xffdd16f8
1992 00:48:47.906547 code (compression=0)
1993 00:48:47.913507 New segment dstaddr 0x30000000 memsize 0x657430 srcaddr 0xffdd1730 filesize 0x3f760
1994 00:48:47.923493 Loading Segment: addr: 0x30000000 memsz: 0x0000000000657430 filesz: 0x000000000003f760
1995 00:48:47.926872 it's not compressed!
1996 00:48:48.017979 [ 0x30000000, 3003f760, 0x30657430) <- ffdd1730
1997 00:48:48.024442 Clearing Segment: addr: 0x000000003003f760 memsz: 0x0000000000617cd0
1998 00:48:48.027619 Loading segment from ROM address 0xffdd1714
1999 00:48:48.031333 Entry Point 0x30000000
2000 00:48:48.034197 Loaded segments
2001 00:48:48.039929 Finalizing chipset.
2002 00:48:48.043169 Finalizing SMM.
2003 00:48:48.046411 BS: BS_PAYLOAD_LOAD times (ms): entry 0 run 88 exit 5
2004 00:48:48.049765 mp_park_aps done after 0 msecs.
2005 00:48:48.056391 Jumping to boot code at 30000000(99b62000)
2006 00:48:48.063185 CPU0: stack: 99bf9000 - 99bfa000, lowest used address 99bf99d8, stack used: 1576 bytes
2007 00:48:48.063325
2008 00:48:48.063452
2009 00:48:48.063581
2010 00:48:48.066976 Starting depthcharge on Helios...
2011 00:48:48.067111
2012 00:48:48.067549 end: 2.2.3 depthcharge-start (duration 00:00:13) [common]
2013 00:48:48.067702 start: 2.2.4 bootloader-commands (timeout 00:04:42) [common]
2014 00:48:48.067846 Setting prompt string to ['hatch:']
2015 00:48:48.067992 bootloader-commands: Wait for prompt ['hatch:'] (timeout 00:04:42)
2016 00:48:48.076394 WARNING: can't convert coreboot GPIOs, 'lid' won't be resampled at runtime!
2017 00:48:48.076513
2018 00:48:48.083238 WARNING: can't convert coreboot GPIOs, 'power' won't be resampled at runtime!
2019 00:48:48.083349
2020 00:48:48.089956 board_setup: Info: eMMC controller not present; skipping
2021 00:48:48.090042
2022 00:48:48.092942 New NVMe Controller 0x30053ac0 @ 00:1d:00
2023 00:48:48.093023
2024 00:48:48.099379 board_setup: Info: SDHCI controller not present; skipping
2025 00:48:48.099459
2026 00:48:48.106302 vboot_create_vbsd: creating legacy VbSharedDataHeader structure
2027 00:48:48.106393
2028 00:48:48.106460 Wipe memory regions:
2029 00:48:48.106521
2030 00:48:48.109383 [0x00000000001000, 0x000000000a0000)
2031 00:48:48.109492
2032 00:48:48.112550 [0x00000000100000, 0x00000030000000)
2033 00:48:48.179278
2034 00:48:48.182229 [0x00000030657430, 0x00000099a2c000)
2035 00:48:48.319581
2036 00:48:48.322670 [0x00000100000000, 0x0000045e800000)
2037 00:48:49.705668
2038 00:48:49.705808 R8152: Initializing
2039 00:48:49.705876
2040 00:48:49.708756 Version 9 (ocp_data = 6010)
2041 00:48:49.713342
2042 00:48:49.713424 R8152: Done initializing
2043 00:48:49.713490
2044 00:48:49.716365 Adding net device
2045 00:48:50.199402
2046 00:48:50.199543 R8152: Initializing
2047 00:48:50.199641
2048 00:48:50.203043 Version 6 (ocp_data = 5c30)
2049 00:48:50.203154
2050 00:48:50.205833 R8152: Done initializing
2051 00:48:50.205914
2052 00:48:50.208927 net_add_device: Attemp to include the same device
2053 00:48:50.212616
2054 00:48:50.219974 [firmware-hatch-12672.B-collabora] Jul 21 2021 08:27:58
2055 00:48:50.220056
2056 00:48:50.220120
2057 00:48:50.220178
2058 00:48:50.220455 Setting prompt string to ['hatch:', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2060 00:48:50.320838 hatch: tftpboot 192.168.201.1 10419496/tftp-deploy-l5je_zb4/kernel/bzImage 10419496/tftp-deploy-l5je_zb4/kernel/cmdline 10419496/tftp-deploy-l5je_zb4/ramdisk/ramdisk.cpio.gz
2061 00:48:50.321010 Setting prompt string to ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2062 00:48:50.321116 bootloader-commands: Wait for prompt ['Starting kernel', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:04:40)
2063 00:48:50.325183 tftpboot 192.168.201.1 10419496/tftp-deploy-l5je_zb4/kernel/bzIploy-l5je_zb4/kernel/cmdline 10419496/tftp-deploy-l5je_zb4/ramdisk/ramdisk.cpio.gz
2064 00:48:50.325273
2065 00:48:50.325395 Waiting for link
2066 00:48:50.525948
2067 00:48:50.526090 done.
2068 00:48:50.526183
2069 00:48:50.526264 MAC: 00:24:32:50:19:be
2070 00:48:50.526343
2071 00:48:50.528983 Sending DHCP discover... done.
2072 00:48:50.529068
2073 00:48:50.532585 Waiting for reply... done.
2074 00:48:50.532671
2075 00:48:50.535587 Sending DHCP request... done.
2076 00:48:50.535674
2077 00:48:50.542317 Waiting for reply... done.
2078 00:48:50.542431
2079 00:48:50.542530 My ip is 192.168.201.15
2080 00:48:50.542621
2081 00:48:50.546065 The DHCP server ip is 192.168.201.1
2082 00:48:50.548914
2083 00:48:50.552009 TFTP server IP predefined by user: 192.168.201.1
2084 00:48:50.552092
2085 00:48:50.558682 Bootfile predefined by user: 10419496/tftp-deploy-l5je_zb4/kernel/bzImage
2086 00:48:50.558780
2087 00:48:50.562406 Sending tftp read request... done.
2088 00:48:50.562490
2089 00:48:50.565330 Waiting for the transfer...
2090 00:48:50.565431
2091 00:48:51.095134 00000000 ################################################################
2092 00:48:51.095298
2093 00:48:51.603505 00080000 ################################################################
2094 00:48:51.603724
2095 00:48:52.116739 00100000 ################################################################
2096 00:48:52.116876
2097 00:48:52.630436 00180000 ################################################################
2098 00:48:52.630587
2099 00:48:53.138719 00200000 ################################################################
2100 00:48:53.138848
2101 00:48:53.670047 00280000 ################################################################
2102 00:48:53.670211
2103 00:48:54.181652 00300000 ################################################################
2104 00:48:54.181827
2105 00:48:54.684952 00380000 ################################################################
2106 00:48:54.685138
2107 00:48:55.241281 00400000 ################################################################
2108 00:48:55.241447
2109 00:48:55.757370 00480000 ################################################################
2110 00:48:55.757543
2111 00:48:56.283138 00500000 ################################################################
2112 00:48:56.283314
2113 00:48:56.800725 00580000 ################################################################
2114 00:48:56.800868
2115 00:48:57.309661 00600000 ################################################################
2116 00:48:57.309808
2117 00:48:57.812592 00680000 ################################################################
2118 00:48:57.812766
2119 00:48:58.316279 00700000 ################################################################
2120 00:48:58.316456
2121 00:48:58.819634 00780000 ################################################################
2122 00:48:58.819811
2123 00:48:59.327294 00800000 ################################################################
2124 00:48:59.327445
2125 00:48:59.841771 00880000 ################################################################
2126 00:48:59.841941
2127 00:49:00.344346 00900000 ################################################################
2128 00:49:00.344535
2129 00:49:00.859873 00980000 ################################################################
2130 00:49:00.860048
2131 00:49:01.232208 00a00000 ############################################### done.
2132 00:49:01.232384
2133 00:49:01.235519 The bootfile was 10862592 bytes long.
2134 00:49:01.235635
2135 00:49:01.238562 Sending tftp read request... done.
2136 00:49:01.238679
2137 00:49:01.241812 Waiting for the transfer...
2138 00:49:01.241930
2139 00:49:01.754181 00000000 ################################################################
2140 00:49:01.754345
2141 00:49:02.277426 00080000 ################################################################
2142 00:49:02.277621
2143 00:49:02.814023 00100000 ################################################################
2144 00:49:02.814172
2145 00:49:03.347824 00180000 ################################################################
2146 00:49:03.347961
2147 00:49:03.877314 00200000 ################################################################
2148 00:49:03.877452
2149 00:49:04.426256 00280000 ################################################################
2150 00:49:04.426392
2151 00:49:05.042448 00300000 ################################################################
2152 00:49:05.043035
2153 00:49:05.684496 00380000 ################################################################
2154 00:49:05.684630
2155 00:49:06.283276 00400000 ################################################################
2156 00:49:06.283453
2157 00:49:06.889403 00480000 ################################################################
2158 00:49:06.889559
2159 00:49:07.491479 00500000 ################################################################
2160 00:49:07.491743
2161 00:49:08.108368 00580000 ################################################################
2162 00:49:08.108873
2163 00:49:08.247675 00600000 ############# done.
2164 00:49:08.248178
2165 00:49:08.250853 Sending tftp read request... done.
2166 00:49:08.251282
2167 00:49:08.254098 Waiting for the transfer...
2168 00:49:08.254524
2169 00:49:08.254863 00000000 # done.
2170 00:49:08.255185
2171 00:49:08.264934 Command line loaded dynamically from TFTP file: 10419496/tftp-deploy-l5je_zb4/kernel/cmdline
2172 00:49:08.265465
2173 00:49:08.290549 The command line is: earlyprintk=uart8250,mmio32,0xfedc6000,115200n8 console_msg_format=syslog earlycon console=ttyS0,115200n8 root=/dev/nfs rw nfsroot=192.168.201.1:/var/lib/lava/dispatcher/tmp/10419496/extract-nfsrootfs-i97l94z6,tcp,hard ip=dhcp tftpserverip=192.168.201.1
2174 00:49:08.291075
2175 00:49:08.297375 ec_init(0): CrosEC protocol v3 supported (256, 256)
2176 00:49:08.301111
2177 00:49:08.304757 Shutting down all USB controllers.
2178 00:49:08.305421
2179 00:49:08.305914 Removing current net device
2180 00:49:08.308936
2181 00:49:08.309487 Finalizing coreboot
2182 00:49:08.309879
2183 00:49:08.315579 Exiting depthcharge with code 4 at timestamp: 27610665
2184 00:49:08.316004
2185 00:49:08.316354
2186 00:49:08.316669 Starting kernel ...
2187 00:49:08.316965
2188 00:49:08.317256
2189 00:49:08.318912 end: 2.2.4 bootloader-commands (duration 00:00:20) [common]
2190 00:49:08.319394 start: 2.2.5 auto-login-action (timeout 00:04:22) [common]
2191 00:49:08.319765 Setting prompt string to ['Linux version [0-9]']
2192 00:49:08.320119 Setting prompt string to ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}']
2193 00:49:08.320500 auto-login-action: Wait for prompt ['Linux version [0-9]', 'Tftp failed.', 'Dhcp release failed.', 'No space left for ramdisk', 'TFTP failed for ramdisk.', 'Dhcp release failed.', 'Out of space adding TFTP server IP to the command line.', 'No network device.', 'Error code \\d+( \\([\\w\\s]+\\))?\\r\\n', '(Bulk read error(.*)){3}'] (timeout 00:05:00)
2195 00:53:30.319641 end: 2.2.5 auto-login-action (duration 00:04:22) [common]
2197 00:53:30.319841 depthcharge-retry failed: 1 of 1 attempts. 'auto-login-action timed out after 262 seconds'
2199 00:53:30.320004 end: 2.2 depthcharge-retry (duration 00:05:00) [common]
2202 00:53:30.320258 end: 2 depthcharge-action (duration 00:05:00) [common]
2204 00:53:30.320473 Cleaning after the job
2205 00:53:30.320565 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419496/tftp-deploy-l5je_zb4/ramdisk
2206 00:53:30.321432 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419496/tftp-deploy-l5je_zb4/kernel
2207 00:53:30.322750 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419496/tftp-deploy-l5je_zb4/nfsrootfs
2208 00:53:30.409558 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/10419496/tftp-deploy-l5je_zb4/modules
2209 00:53:30.410250 start: 4.1 power-off (timeout 00:00:30) [common]
2210 00:53:30.410422 Calling: 'pduclient' '--daemon=localhost' '--hostname=asus-C436FA-Flip-hatch-cbg-3' '--port=1' '--command=off'
2211 00:53:30.485671 >> Command sent successfully.
2212 00:53:30.487962 Returned 0 in 0 seconds
2213 00:53:30.588349 end: 4.1 power-off (duration 00:00:00) [common]
2215 00:53:30.588660 start: 4.2 read-feedback (timeout 00:10:00) [common]
2216 00:53:30.588923 Listened to connection for namespace 'common' for up to 1s
2218 00:53:30.589287 Listened to connection for namespace 'common' for up to 1s
2219 00:53:31.589628 Finalising connection for namespace 'common'
2220 00:53:31.589805 Disconnecting from shell: Finalise
2221 00:53:31.589883
2222 00:53:31.690210 end: 4.2 read-feedback (duration 00:00:01) [common]
2223 00:53:31.690349 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/10419496
2224 00:53:32.087928 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/10419496
2225 00:53:32.088124 JobError: Your job cannot terminate cleanly.